Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Matsushita 10200 specific support for 32-bit ELF |
2571583a | 2 | Copyright (C) 1996-2017 Free Software Foundation, Inc. |
252b5132 | 3 | |
cd123cb7 | 4 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 5 | |
cd123cb7 NC |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
252b5132 | 10 | |
cd123cb7 NC |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
252b5132 | 15 | |
cd123cb7 NC |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
252b5132 | 21 | #include "sysdep.h" |
3db64b00 | 22 | #include "bfd.h" |
252b5132 RH |
23 | #include "libbfd.h" |
24 | #include "elf-bfd.h" | |
25 | ||
2c3fc389 NC |
26 | static bfd_boolean |
27 | mn10200_elf_relax_delete_bytes (bfd *, asection *, bfd_vma, int); | |
28 | static bfd_boolean | |
29 | mn10200_elf_symbol_address_p (bfd *, asection *, Elf_Internal_Sym *, bfd_vma); | |
30 | ||
31 | enum reloc_type | |
32 | { | |
252b5132 RH |
33 | R_MN10200_NONE = 0, |
34 | R_MN10200_32, | |
35 | R_MN10200_16, | |
36 | R_MN10200_8, | |
37 | R_MN10200_24, | |
38 | R_MN10200_PCREL8, | |
39 | R_MN10200_PCREL16, | |
40 | R_MN10200_PCREL24, | |
41 | R_MN10200_MAX | |
42 | }; | |
43 | ||
2c3fc389 NC |
44 | static reloc_howto_type elf_mn10200_howto_table[] = |
45 | { | |
252b5132 RH |
46 | /* Dummy relocation. Does nothing. */ |
47 | HOWTO (R_MN10200_NONE, | |
48 | 0, | |
6346d5ca AM |
49 | 3, |
50 | 0, | |
b34976b6 | 51 | FALSE, |
252b5132 | 52 | 0, |
6346d5ca | 53 | complain_overflow_dont, |
252b5132 RH |
54 | bfd_elf_generic_reloc, |
55 | "R_MN10200_NONE", | |
b34976b6 | 56 | FALSE, |
252b5132 RH |
57 | 0, |
58 | 0, | |
b34976b6 | 59 | FALSE), |
252b5132 RH |
60 | /* Standard 32 bit reloc. */ |
61 | HOWTO (R_MN10200_32, | |
62 | 0, | |
63 | 2, | |
64 | 32, | |
b34976b6 | 65 | FALSE, |
252b5132 RH |
66 | 0, |
67 | complain_overflow_bitfield, | |
68 | bfd_elf_generic_reloc, | |
69 | "R_MN10200_32", | |
b34976b6 | 70 | FALSE, |
252b5132 RH |
71 | 0xffffffff, |
72 | 0xffffffff, | |
b34976b6 | 73 | FALSE), |
252b5132 RH |
74 | /* Standard 16 bit reloc. */ |
75 | HOWTO (R_MN10200_16, | |
76 | 0, | |
77 | 1, | |
78 | 16, | |
b34976b6 | 79 | FALSE, |
252b5132 RH |
80 | 0, |
81 | complain_overflow_bitfield, | |
82 | bfd_elf_generic_reloc, | |
83 | "R_MN10200_16", | |
b34976b6 | 84 | FALSE, |
252b5132 RH |
85 | 0xffff, |
86 | 0xffff, | |
b34976b6 | 87 | FALSE), |
252b5132 RH |
88 | /* Standard 8 bit reloc. */ |
89 | HOWTO (R_MN10200_8, | |
90 | 0, | |
91 | 0, | |
92 | 8, | |
b34976b6 | 93 | FALSE, |
252b5132 RH |
94 | 0, |
95 | complain_overflow_bitfield, | |
96 | bfd_elf_generic_reloc, | |
97 | "R_MN10200_8", | |
b34976b6 | 98 | FALSE, |
252b5132 RH |
99 | 0xff, |
100 | 0xff, | |
b34976b6 | 101 | FALSE), |
252b5132 RH |
102 | /* Standard 24 bit reloc. */ |
103 | HOWTO (R_MN10200_24, | |
104 | 0, | |
105 | 2, | |
106 | 24, | |
b34976b6 | 107 | FALSE, |
252b5132 RH |
108 | 0, |
109 | complain_overflow_bitfield, | |
110 | bfd_elf_generic_reloc, | |
111 | "R_MN10200_24", | |
b34976b6 | 112 | FALSE, |
252b5132 RH |
113 | 0xffffff, |
114 | 0xffffff, | |
b34976b6 | 115 | FALSE), |
252b5132 RH |
116 | /* Simple 8 pc-relative reloc. */ |
117 | HOWTO (R_MN10200_PCREL8, | |
118 | 0, | |
119 | 0, | |
120 | 8, | |
b34976b6 | 121 | TRUE, |
252b5132 RH |
122 | 0, |
123 | complain_overflow_bitfield, | |
124 | bfd_elf_generic_reloc, | |
125 | "R_MN10200_PCREL8", | |
b34976b6 | 126 | FALSE, |
252b5132 RH |
127 | 0xff, |
128 | 0xff, | |
b34976b6 | 129 | TRUE), |
252b5132 RH |
130 | /* Simple 16 pc-relative reloc. */ |
131 | HOWTO (R_MN10200_PCREL16, | |
132 | 0, | |
133 | 1, | |
134 | 16, | |
b34976b6 | 135 | TRUE, |
252b5132 RH |
136 | 0, |
137 | complain_overflow_bitfield, | |
138 | bfd_elf_generic_reloc, | |
139 | "R_MN10200_PCREL16", | |
b34976b6 | 140 | FALSE, |
252b5132 RH |
141 | 0xffff, |
142 | 0xffff, | |
b34976b6 | 143 | TRUE), |
252b5132 RH |
144 | /* Simple 32bit pc-relative reloc with a 1 byte adjustment |
145 | to get the pc-relative offset correct. */ | |
146 | HOWTO (R_MN10200_PCREL24, | |
147 | 0, | |
148 | 2, | |
149 | 24, | |
b34976b6 | 150 | TRUE, |
252b5132 RH |
151 | 0, |
152 | complain_overflow_bitfield, | |
153 | bfd_elf_generic_reloc, | |
154 | "R_MN10200_PCREL24", | |
b34976b6 | 155 | FALSE, |
252b5132 RH |
156 | 0xffffff, |
157 | 0xffffff, | |
b34976b6 | 158 | TRUE), |
252b5132 RH |
159 | }; |
160 | ||
2c3fc389 NC |
161 | struct mn10200_reloc_map |
162 | { | |
252b5132 RH |
163 | bfd_reloc_code_real_type bfd_reloc_val; |
164 | unsigned char elf_reloc_val; | |
165 | }; | |
166 | ||
2c3fc389 NC |
167 | static const struct mn10200_reloc_map mn10200_reloc_map[] = |
168 | { | |
27def10f KH |
169 | { BFD_RELOC_NONE , R_MN10200_NONE , }, |
170 | { BFD_RELOC_32 , R_MN10200_32 , }, | |
171 | { BFD_RELOC_16 , R_MN10200_16 , }, | |
172 | { BFD_RELOC_8 , R_MN10200_8 , }, | |
173 | { BFD_RELOC_24 , R_MN10200_24 , }, | |
174 | { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , }, | |
252b5132 RH |
175 | { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, }, |
176 | { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, }, | |
177 | }; | |
178 | ||
179 | static reloc_howto_type * | |
2c3fc389 NC |
180 | bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
181 | bfd_reloc_code_real_type code) | |
252b5132 RH |
182 | { |
183 | unsigned int i; | |
184 | ||
185 | for (i = 0; | |
186 | i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map); | |
187 | i++) | |
188 | { | |
189 | if (mn10200_reloc_map[i].bfd_reloc_val == code) | |
190 | return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val]; | |
191 | } | |
192 | ||
193 | return NULL; | |
194 | } | |
195 | ||
157090f7 AM |
196 | static reloc_howto_type * |
197 | bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
198 | const char *r_name) | |
199 | { | |
200 | unsigned int i; | |
201 | ||
202 | for (i = 0; | |
203 | i < (sizeof (elf_mn10200_howto_table) | |
204 | / sizeof (elf_mn10200_howto_table[0])); | |
205 | i++) | |
206 | if (elf_mn10200_howto_table[i].name != NULL | |
207 | && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0) | |
208 | return &elf_mn10200_howto_table[i]; | |
209 | ||
210 | return NULL; | |
211 | } | |
212 | ||
252b5132 RH |
213 | /* Set the howto pointer for an MN10200 ELF reloc. */ |
214 | ||
215 | static void | |
2c3fc389 NC |
216 | mn10200_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, |
217 | arelent *cache_ptr, | |
218 | Elf_Internal_Rela *dst) | |
252b5132 RH |
219 | { |
220 | unsigned int r_type; | |
221 | ||
222 | r_type = ELF32_R_TYPE (dst->r_info); | |
223 | BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX); | |
224 | cache_ptr->howto = &elf_mn10200_howto_table[r_type]; | |
225 | } | |
226 | ||
227 | /* Perform a relocation as part of a final link. */ | |
917583ad | 228 | |
252b5132 | 229 | static bfd_reloc_status_type |
2c3fc389 NC |
230 | mn10200_elf_final_link_relocate (reloc_howto_type *howto, |
231 | bfd *input_bfd, | |
232 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
233 | asection *input_section, | |
234 | bfd_byte *contents, | |
235 | bfd_vma offset, | |
236 | bfd_vma value, | |
237 | bfd_vma addend, | |
238 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
239 | asection *sym_sec ATTRIBUTE_UNUSED, | |
240 | int is_local ATTRIBUTE_UNUSED) | |
252b5132 RH |
241 | { |
242 | unsigned long r_type = howto->type; | |
243 | bfd_byte *hit_data = contents + offset; | |
244 | ||
245 | switch (r_type) | |
246 | { | |
247 | ||
248 | case R_MN10200_NONE: | |
249 | return bfd_reloc_ok; | |
250 | ||
251 | case R_MN10200_32: | |
252 | value += addend; | |
253 | bfd_put_32 (input_bfd, value, hit_data); | |
254 | return bfd_reloc_ok; | |
255 | ||
256 | case R_MN10200_16: | |
257 | value += addend; | |
258 | ||
27def10f | 259 | if ((long) value > 0x7fff || (long) value < -0x8000) |
252b5132 RH |
260 | return bfd_reloc_overflow; |
261 | ||
262 | bfd_put_16 (input_bfd, value, hit_data); | |
263 | return bfd_reloc_ok; | |
264 | ||
265 | case R_MN10200_8: | |
266 | value += addend; | |
267 | ||
27def10f | 268 | if ((long) value > 0x7f || (long) value < -0x80) |
252b5132 RH |
269 | return bfd_reloc_overflow; |
270 | ||
271 | bfd_put_8 (input_bfd, value, hit_data); | |
272 | return bfd_reloc_ok; | |
273 | ||
274 | case R_MN10200_24: | |
275 | value += addend; | |
276 | ||
27def10f | 277 | if ((long) value > 0x7fffff || (long) value < -0x800000) |
252b5132 RH |
278 | return bfd_reloc_overflow; |
279 | ||
280 | value &= 0xffffff; | |
281 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
282 | bfd_put_32 (input_bfd, value, hit_data); | |
283 | return bfd_reloc_ok; | |
284 | ||
285 | case R_MN10200_PCREL8: | |
286 | value -= (input_section->output_section->vma | |
287 | + input_section->output_offset); | |
288 | value -= (offset + 1); | |
289 | value += addend; | |
290 | ||
27def10f KH |
291 | if ((long) value > 0xff || (long) value < -0x100) |
292 | return bfd_reloc_overflow; | |
252b5132 RH |
293 | |
294 | bfd_put_8 (input_bfd, value, hit_data); | |
295 | return bfd_reloc_ok; | |
296 | ||
297 | case R_MN10200_PCREL16: | |
298 | value -= (input_section->output_section->vma | |
299 | + input_section->output_offset); | |
300 | value -= (offset + 2); | |
301 | value += addend; | |
302 | ||
27def10f KH |
303 | if ((long) value > 0xffff || (long) value < -0x10000) |
304 | return bfd_reloc_overflow; | |
252b5132 RH |
305 | |
306 | bfd_put_16 (input_bfd, value, hit_data); | |
307 | return bfd_reloc_ok; | |
308 | ||
309 | case R_MN10200_PCREL24: | |
310 | value -= (input_section->output_section->vma | |
311 | + input_section->output_offset); | |
312 | value -= (offset + 3); | |
313 | value += addend; | |
314 | ||
27def10f KH |
315 | if ((long) value > 0xffffff || (long) value < -0x1000000) |
316 | return bfd_reloc_overflow; | |
252b5132 RH |
317 | |
318 | value &= 0xffffff; | |
319 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
320 | bfd_put_32 (input_bfd, value, hit_data); | |
321 | return bfd_reloc_ok; | |
322 | ||
323 | default: | |
324 | return bfd_reloc_notsupported; | |
325 | } | |
326 | } | |
252b5132 RH |
327 | \f |
328 | /* Relocate an MN10200 ELF section. */ | |
b34976b6 | 329 | static bfd_boolean |
2c3fc389 NC |
330 | mn10200_elf_relocate_section (bfd *output_bfd, |
331 | struct bfd_link_info *info, | |
332 | bfd *input_bfd, | |
333 | asection *input_section, | |
334 | bfd_byte *contents, | |
335 | Elf_Internal_Rela *relocs, | |
336 | Elf_Internal_Sym *local_syms, | |
337 | asection **local_sections) | |
252b5132 RH |
338 | { |
339 | Elf_Internal_Shdr *symtab_hdr; | |
340 | struct elf_link_hash_entry **sym_hashes; | |
341 | Elf_Internal_Rela *rel, *relend; | |
342 | ||
343 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
344 | sym_hashes = elf_sym_hashes (input_bfd); | |
345 | ||
346 | rel = relocs; | |
347 | relend = relocs + input_section->reloc_count; | |
348 | for (; rel < relend; rel++) | |
349 | { | |
350 | int r_type; | |
351 | reloc_howto_type *howto; | |
352 | unsigned long r_symndx; | |
353 | Elf_Internal_Sym *sym; | |
354 | asection *sec; | |
355 | struct elf_link_hash_entry *h; | |
356 | bfd_vma relocation; | |
357 | bfd_reloc_status_type r; | |
358 | ||
359 | r_symndx = ELF32_R_SYM (rel->r_info); | |
360 | r_type = ELF32_R_TYPE (rel->r_info); | |
361 | howto = elf_mn10200_howto_table + r_type; | |
362 | ||
252b5132 RH |
363 | h = NULL; |
364 | sym = NULL; | |
365 | sec = NULL; | |
366 | if (r_symndx < symtab_hdr->sh_info) | |
367 | { | |
368 | sym = local_syms + r_symndx; | |
369 | sec = local_sections[r_symndx]; | |
8517fae7 | 370 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
252b5132 RH |
371 | } |
372 | else | |
373 | { | |
62d887d4 | 374 | bfd_boolean unresolved_reloc, warned, ignored; |
59c2e50f | 375 | |
b2a8e766 AM |
376 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
377 | r_symndx, symtab_hdr, sym_hashes, | |
378 | h, sec, relocation, | |
62d887d4 | 379 | unresolved_reloc, warned, ignored); |
252b5132 RH |
380 | } |
381 | ||
dbaa2011 | 382 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 383 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 384 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 385 | |
0e1862bb | 386 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
387 | continue; |
388 | ||
252b5132 RH |
389 | r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, |
390 | input_section, | |
391 | contents, rel->r_offset, | |
392 | relocation, rel->r_addend, | |
393 | info, sec, h == NULL); | |
394 | ||
395 | if (r != bfd_reloc_ok) | |
396 | { | |
397 | const char *name; | |
27def10f | 398 | const char *msg = (const char *) 0; |
252b5132 RH |
399 | |
400 | if (h != NULL) | |
401 | name = h->root.root.string; | |
402 | else | |
403 | { | |
404 | name = (bfd_elf_string_from_elf_section | |
405 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
406 | if (name == NULL || *name == '\0') | |
407 | name = bfd_section_name (input_bfd, sec); | |
408 | } | |
409 | ||
410 | switch (r) | |
411 | { | |
412 | case bfd_reloc_overflow: | |
1a72702b AM |
413 | (*info->callbacks->reloc_overflow) |
414 | (info, (h ? &h->root : NULL), name, howto->name, | |
415 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
416 | break; |
417 | ||
418 | case bfd_reloc_undefined: | |
1a72702b AM |
419 | (*info->callbacks->undefined_symbol) (info, name, input_bfd, |
420 | input_section, | |
421 | rel->r_offset, TRUE); | |
252b5132 RH |
422 | break; |
423 | ||
424 | case bfd_reloc_outofrange: | |
425 | msg = _("internal error: out of range error"); | |
426 | goto common_error; | |
427 | ||
428 | case bfd_reloc_notsupported: | |
429 | msg = _("internal error: unsupported relocation error"); | |
430 | goto common_error; | |
431 | ||
432 | case bfd_reloc_dangerous: | |
433 | msg = _("internal error: dangerous error"); | |
434 | goto common_error; | |
435 | ||
436 | default: | |
437 | msg = _("internal error: unknown error"); | |
438 | /* fall through */ | |
439 | ||
440 | common_error: | |
1a72702b AM |
441 | (*info->callbacks->warning) (info, msg, name, input_bfd, |
442 | input_section, rel->r_offset); | |
252b5132 RH |
443 | break; |
444 | } | |
445 | } | |
446 | } | |
447 | ||
b34976b6 | 448 | return TRUE; |
252b5132 RH |
449 | } |
450 | ||
2c3fc389 NC |
451 | /* Delete some bytes from a section while relaxing. */ |
452 | ||
453 | static bfd_boolean | |
454 | mn10200_elf_relax_delete_bytes (bfd *abfd, asection *sec, | |
455 | bfd_vma addr, int count) | |
456 | { | |
457 | Elf_Internal_Shdr *symtab_hdr; | |
458 | unsigned int sec_shndx; | |
459 | bfd_byte *contents; | |
460 | Elf_Internal_Rela *irel, *irelend; | |
461 | bfd_vma toaddr; | |
462 | Elf_Internal_Sym *isym; | |
463 | Elf_Internal_Sym *isymend; | |
464 | struct elf_link_hash_entry **sym_hashes; | |
465 | struct elf_link_hash_entry **end_hashes; | |
466 | unsigned int symcount; | |
467 | ||
468 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
469 | ||
470 | contents = elf_section_data (sec)->this_hdr.contents; | |
471 | ||
472 | toaddr = sec->size; | |
473 | ||
474 | irel = elf_section_data (sec)->relocs; | |
475 | irelend = irel + sec->reloc_count; | |
476 | ||
477 | /* Actually delete the bytes. */ | |
478 | memmove (contents + addr, contents + addr + count, | |
479 | (size_t) (toaddr - addr - count)); | |
480 | sec->size -= count; | |
481 | ||
482 | /* Adjust all the relocs. */ | |
483 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
484 | { | |
485 | /* Get the new reloc address. */ | |
486 | if ((irel->r_offset > addr | |
487 | && irel->r_offset < toaddr)) | |
488 | irel->r_offset -= count; | |
489 | } | |
490 | ||
491 | /* Adjust the local symbols defined in this section. */ | |
492 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
493 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
494 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
495 | { | |
496 | if (isym->st_shndx == sec_shndx | |
497 | && isym->st_value > addr | |
498 | && isym->st_value < toaddr) | |
499 | isym->st_value -= count; | |
500 | } | |
501 | ||
502 | /* Now adjust the global symbols defined in this section. */ | |
503 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
504 | - symtab_hdr->sh_info); | |
505 | sym_hashes = elf_sym_hashes (abfd); | |
506 | end_hashes = sym_hashes + symcount; | |
507 | for (; sym_hashes < end_hashes; sym_hashes++) | |
508 | { | |
509 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
510 | if ((sym_hash->root.type == bfd_link_hash_defined | |
511 | || sym_hash->root.type == bfd_link_hash_defweak) | |
512 | && sym_hash->root.u.def.section == sec | |
513 | && sym_hash->root.u.def.value > addr | |
514 | && sym_hash->root.u.def.value < toaddr) | |
515 | { | |
516 | sym_hash->root.u.def.value -= count; | |
517 | } | |
518 | } | |
519 | ||
520 | return TRUE; | |
521 | } | |
522 | ||
252b5132 RH |
523 | /* This function handles relaxing for the mn10200. |
524 | ||
4cc11e76 | 525 | There are quite a few relaxing opportunities available on the mn10200: |
252b5132 RH |
526 | |
527 | * jsr:24 -> jsr:16 2 bytes | |
528 | ||
529 | * jmp:24 -> jmp:16 2 bytes | |
530 | * jmp:16 -> bra:8 1 byte | |
531 | ||
532 | * If the previous instruction is a conditional branch | |
533 | around the jump/bra, we may be able to reverse its condition | |
534 | and change its target to the jump's target. The jump/bra | |
535 | can then be deleted. 2 bytes | |
536 | ||
537 | * mov abs24 -> mov abs16 2 byte savings | |
538 | ||
539 | * Most instructions which accept imm24 can relax to imm16 2 bytes | |
540 | - Most instructions which accept imm16 can relax to imm8 1 byte | |
541 | ||
542 | * Most instructions which accept d24 can relax to d16 2 bytes | |
543 | - Most instructions which accept d16 can relax to d8 1 byte | |
544 | ||
545 | abs24, imm24, d24 all look the same at the reloc level. It | |
546 | might make the code simpler if we had different relocs for | |
547 | the various relaxable operand types. | |
a7c10850 | 548 | |
252b5132 RH |
549 | We don't handle imm16->imm8 or d16->d8 as they're very rare |
550 | and somewhat more difficult to support. */ | |
551 | ||
b34976b6 | 552 | static bfd_boolean |
2c3fc389 NC |
553 | mn10200_elf_relax_section (bfd *abfd, |
554 | asection *sec, | |
555 | struct bfd_link_info *link_info, | |
556 | bfd_boolean *again) | |
252b5132 RH |
557 | { |
558 | Elf_Internal_Shdr *symtab_hdr; | |
559 | Elf_Internal_Rela *internal_relocs; | |
252b5132 RH |
560 | Elf_Internal_Rela *irel, *irelend; |
561 | bfd_byte *contents = NULL; | |
6cdc0ccc | 562 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
563 | |
564 | /* Assume nothing changes. */ | |
b34976b6 | 565 | *again = FALSE; |
252b5132 | 566 | |
1049f94e | 567 | /* We don't have to do anything for a relocatable link, if |
252b5132 RH |
568 | this section does not have relocs, or if this is not a |
569 | code section. */ | |
0e1862bb | 570 | if (bfd_link_relocatable (link_info) |
252b5132 RH |
571 | || (sec->flags & SEC_RELOC) == 0 |
572 | || sec->reloc_count == 0 | |
573 | || (sec->flags & SEC_CODE) == 0) | |
b34976b6 | 574 | return TRUE; |
252b5132 | 575 | |
252b5132 RH |
576 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
577 | ||
578 | /* Get a copy of the native relocations. */ | |
45d6a902 | 579 | internal_relocs = (_bfd_elf_link_read_relocs |
2c3fc389 | 580 | (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, |
252b5132 RH |
581 | link_info->keep_memory)); |
582 | if (internal_relocs == NULL) | |
583 | goto error_return; | |
252b5132 RH |
584 | |
585 | /* Walk through them looking for relaxing opportunities. */ | |
586 | irelend = internal_relocs + sec->reloc_count; | |
587 | for (irel = internal_relocs; irel < irelend; irel++) | |
588 | { | |
589 | bfd_vma symval; | |
590 | ||
591 | /* If this isn't something that can be relaxed, then ignore | |
592 | this reloc. */ | |
593 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE | |
594 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8 | |
595 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX) | |
596 | continue; | |
597 | ||
598 | /* Get the section contents if we haven't done so already. */ | |
599 | if (contents == NULL) | |
600 | { | |
601 | /* Get cached copy if it exists. */ | |
602 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
603 | contents = elf_section_data (sec)->this_hdr.contents; | |
604 | else | |
605 | { | |
606 | /* Go get them off disk. */ | |
eea6121a | 607 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
608 | goto error_return; |
609 | } | |
610 | } | |
611 | ||
6cdc0ccc AM |
612 | /* Read this BFD's local symbols if we haven't done so already. */ |
613 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
252b5132 | 614 | { |
6cdc0ccc AM |
615 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
616 | if (isymbuf == NULL) | |
617 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
618 | symtab_hdr->sh_info, 0, | |
619 | NULL, NULL, NULL); | |
620 | if (isymbuf == NULL) | |
621 | goto error_return; | |
252b5132 RH |
622 | } |
623 | ||
624 | /* Get the value of the symbol referred to by the reloc. */ | |
625 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
626 | { | |
9ad5cbcf | 627 | /* A local symbol. */ |
6cdc0ccc | 628 | Elf_Internal_Sym *isym; |
252b5132 RH |
629 | asection *sym_sec; |
630 | ||
6cdc0ccc AM |
631 | isym = isymbuf + ELF32_R_SYM (irel->r_info); |
632 | if (isym->st_shndx == SHN_UNDEF) | |
9ad5cbcf | 633 | sym_sec = bfd_und_section_ptr; |
6cdc0ccc | 634 | else if (isym->st_shndx == SHN_ABS) |
9ad5cbcf | 635 | sym_sec = bfd_abs_section_ptr; |
6cdc0ccc | 636 | else if (isym->st_shndx == SHN_COMMON) |
9ad5cbcf AM |
637 | sym_sec = bfd_com_section_ptr; |
638 | else | |
6cdc0ccc AM |
639 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
640 | symval = (isym->st_value | |
252b5132 RH |
641 | + sym_sec->output_section->vma |
642 | + sym_sec->output_offset); | |
643 | } | |
644 | else | |
645 | { | |
646 | unsigned long indx; | |
647 | struct elf_link_hash_entry *h; | |
648 | ||
649 | /* An external symbol. */ | |
650 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
651 | h = elf_sym_hashes (abfd)[indx]; | |
652 | BFD_ASSERT (h != NULL); | |
653 | if (h->root.type != bfd_link_hash_defined | |
654 | && h->root.type != bfd_link_hash_defweak) | |
655 | { | |
656 | /* This appears to be a reference to an undefined | |
657 | symbol. Just ignore it--it will be caught by the | |
658 | regular reloc processing. */ | |
659 | continue; | |
660 | } | |
661 | ||
662 | symval = (h->root.u.def.value | |
663 | + h->root.u.def.section->output_section->vma | |
664 | + h->root.u.def.section->output_offset); | |
665 | } | |
666 | ||
667 | /* For simplicity of coding, we are going to modify the section | |
668 | contents, the section relocs, and the BFD symbol table. We | |
669 | must tell the rest of the code not to free up this | |
670 | information. It would be possible to instead create a table | |
671 | of changes which have to be made, as is done in coff-mips.c; | |
672 | that would be more work, but would require less memory when | |
673 | the linker is run. */ | |
674 | ||
252b5132 RH |
675 | /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative |
676 | branch/call. */ | |
677 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24) | |
678 | { | |
679 | bfd_vma value = symval; | |
680 | ||
681 | /* Deal with pc-relative gunk. */ | |
682 | value -= (sec->output_section->vma + sec->output_offset); | |
683 | value -= (irel->r_offset + 3); | |
684 | value += irel->r_addend; | |
685 | ||
686 | /* See if the value will fit in 16 bits, note the high value is | |
687 | 0x7fff + 2 as the target will be two bytes closer if we are | |
688 | able to relax. */ | |
27def10f | 689 | if ((long) value < 0x8001 && (long) value > -0x8000) |
252b5132 RH |
690 | { |
691 | unsigned char code; | |
692 | ||
693 | /* Get the opcode. */ | |
694 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
695 | ||
696 | if (code != 0xe0 && code != 0xe1) | |
697 | continue; | |
698 | ||
699 | /* Note that we've changed the relocs, section contents, etc. */ | |
700 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 701 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 702 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
703 | |
704 | /* Fix the opcode. */ | |
705 | if (code == 0xe0) | |
706 | bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2); | |
707 | else if (code == 0xe1) | |
708 | bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2); | |
709 | ||
710 | /* Fix the relocation's type. */ | |
711 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
712 | R_MN10200_PCREL16); | |
713 | ||
714 | /* The opcode got shorter too, so we have to fix the offset. */ | |
715 | irel->r_offset -= 1; | |
716 | ||
717 | /* Delete two bytes of data. */ | |
718 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
719 | irel->r_offset + 1, 2)) | |
720 | goto error_return; | |
721 | ||
722 | /* That will change things, so, we should relax again. | |
723 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 724 | *again = TRUE; |
252b5132 RH |
725 | } |
726 | } | |
727 | ||
728 | /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative | |
729 | branch. */ | |
730 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16) | |
731 | { | |
732 | bfd_vma value = symval; | |
733 | ||
734 | /* Deal with pc-relative gunk. */ | |
735 | value -= (sec->output_section->vma + sec->output_offset); | |
736 | value -= (irel->r_offset + 2); | |
737 | value += irel->r_addend; | |
738 | ||
739 | /* See if the value will fit in 8 bits, note the high value is | |
740 | 0x7f + 1 as the target will be one bytes closer if we are | |
741 | able to relax. */ | |
27def10f | 742 | if ((long) value < 0x80 && (long) value > -0x80) |
252b5132 RH |
743 | { |
744 | unsigned char code; | |
745 | ||
746 | /* Get the opcode. */ | |
747 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
748 | ||
749 | if (code != 0xfc) | |
750 | continue; | |
751 | ||
752 | /* Note that we've changed the relocs, section contents, etc. */ | |
753 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 754 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 755 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
756 | |
757 | /* Fix the opcode. */ | |
758 | bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1); | |
759 | ||
760 | /* Fix the relocation's type. */ | |
761 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
762 | R_MN10200_PCREL8); | |
763 | ||
764 | /* Delete one byte of data. */ | |
765 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
766 | irel->r_offset + 1, 1)) | |
767 | goto error_return; | |
768 | ||
769 | /* That will change things, so, we should relax again. | |
770 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 771 | *again = TRUE; |
252b5132 RH |
772 | } |
773 | } | |
774 | ||
775 | /* Try to eliminate an unconditional 8 bit pc-relative branch | |
776 | which immediately follows a conditional 8 bit pc-relative | |
777 | branch around the unconditional branch. | |
778 | ||
779 | original: new: | |
780 | bCC lab1 bCC' lab2 | |
781 | bra lab2 | |
782 | lab1: lab1: | |
783 | ||
252b5132 RH |
784 | This happens when the bCC can't reach lab2 at assembly time, |
785 | but due to other relaxations it can reach at link time. */ | |
786 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8) | |
787 | { | |
788 | Elf_Internal_Rela *nrel; | |
789 | bfd_vma value = symval; | |
790 | unsigned char code; | |
791 | ||
792 | /* Deal with pc-relative gunk. */ | |
793 | value -= (sec->output_section->vma + sec->output_offset); | |
794 | value -= (irel->r_offset + 1); | |
795 | value += irel->r_addend; | |
796 | ||
797 | /* Do nothing if this reloc is the last byte in the section. */ | |
eea6121a | 798 | if (irel->r_offset == sec->size) |
252b5132 RH |
799 | continue; |
800 | ||
801 | /* See if the next instruction is an unconditional pc-relative | |
802 | branch, more often than not this test will fail, so we | |
803 | test it first to speed things up. */ | |
804 | code = bfd_get_8 (abfd, contents + irel->r_offset + 1); | |
805 | if (code != 0xea) | |
806 | continue; | |
807 | ||
808 | /* Also make sure the next relocation applies to the next | |
809 | instruction and that it's a pc-relative 8 bit branch. */ | |
810 | nrel = irel + 1; | |
811 | if (nrel == irelend | |
812 | || irel->r_offset + 2 != nrel->r_offset | |
813 | || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8) | |
814 | continue; | |
815 | ||
816 | /* Make sure our destination immediately follows the | |
817 | unconditional branch. */ | |
818 | if (symval != (sec->output_section->vma + sec->output_offset | |
819 | + irel->r_offset + 3)) | |
820 | continue; | |
821 | ||
822 | /* Now make sure we are a conditional branch. This may not | |
a7c10850 | 823 | be necessary, but why take the chance. |
252b5132 RH |
824 | |
825 | Note these checks assume that R_MN10200_PCREL8 relocs | |
826 | only occur on bCC and bCCx insns. If they occured | |
827 | elsewhere, we'd need to know the start of this insn | |
828 | for this check to be accurate. */ | |
829 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
830 | if (code != 0xe0 && code != 0xe1 && code != 0xe2 | |
831 | && code != 0xe3 && code != 0xe4 && code != 0xe5 | |
832 | && code != 0xe6 && code != 0xe7 && code != 0xe8 | |
833 | && code != 0xe9 && code != 0xec && code != 0xed | |
834 | && code != 0xee && code != 0xef && code != 0xfc | |
835 | && code != 0xfd && code != 0xfe && code != 0xff) | |
836 | continue; | |
837 | ||
838 | /* We also have to be sure there is no symbol/label | |
839 | at the unconditional branch. */ | |
6cdc0ccc AM |
840 | if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf, |
841 | irel->r_offset + 1)) | |
252b5132 RH |
842 | continue; |
843 | ||
844 | /* Note that we've changed the relocs, section contents, etc. */ | |
845 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 846 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 847 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
848 | |
849 | /* Reverse the condition of the first branch. */ | |
850 | switch (code) | |
851 | { | |
27def10f KH |
852 | case 0xfc: |
853 | code = 0xfd; | |
854 | break; | |
855 | case 0xfd: | |
856 | code = 0xfc; | |
857 | break; | |
858 | case 0xfe: | |
859 | code = 0xff; | |
860 | break; | |
861 | case 0xff: | |
862 | code = 0xfe; | |
863 | break; | |
864 | case 0xe8: | |
865 | code = 0xe9; | |
866 | break; | |
867 | case 0xe9: | |
868 | code = 0xe8; | |
869 | break; | |
870 | case 0xe0: | |
871 | code = 0xe2; | |
872 | break; | |
873 | case 0xe2: | |
874 | code = 0xe0; | |
875 | break; | |
876 | case 0xe3: | |
877 | code = 0xe1; | |
878 | break; | |
879 | case 0xe1: | |
880 | code = 0xe3; | |
881 | break; | |
882 | case 0xe4: | |
883 | code = 0xe6; | |
884 | break; | |
885 | case 0xe6: | |
886 | code = 0xe4; | |
887 | break; | |
888 | case 0xe7: | |
889 | code = 0xe5; | |
890 | break; | |
891 | case 0xe5: | |
892 | code = 0xe7; | |
893 | break; | |
894 | case 0xec: | |
895 | code = 0xed; | |
896 | break; | |
897 | case 0xed: | |
898 | code = 0xec; | |
899 | break; | |
900 | case 0xee: | |
901 | code = 0xef; | |
902 | break; | |
903 | case 0xef: | |
904 | code = 0xee; | |
905 | break; | |
252b5132 RH |
906 | } |
907 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
a7c10850 | 908 | |
252b5132 RH |
909 | /* Set the reloc type and symbol for the first branch |
910 | from the second branch. */ | |
911 | irel->r_info = nrel->r_info; | |
912 | ||
913 | /* Make the reloc for the second branch a null reloc. */ | |
914 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
915 | R_MN10200_NONE); | |
916 | ||
917 | /* Delete two bytes of data. */ | |
918 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
919 | irel->r_offset + 1, 2)) | |
920 | goto error_return; | |
921 | ||
922 | /* That will change things, so, we should relax again. | |
923 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 924 | *again = TRUE; |
252b5132 RH |
925 | } |
926 | ||
927 | /* Try to turn a 24bit immediate, displacement or absolute address | |
928 | into a 16bit immediate, displacement or absolute address. */ | |
929 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24) | |
930 | { | |
931 | bfd_vma value = symval; | |
932 | ||
a7c10850 | 933 | /* See if the value will fit in 16 bits. |
252b5132 RH |
934 | We allow any 16bit match here. We prune those we can't |
935 | handle below. */ | |
27def10f | 936 | if ((long) value < 0x7fff && (long) value > -0x8000) |
252b5132 RH |
937 | { |
938 | unsigned char code; | |
939 | ||
940 | /* All insns which have 24bit operands are 5 bytes long, | |
941 | the first byte will always be 0xf4, but we double check | |
942 | it just in case. */ | |
943 | ||
944 | /* Get the first opcode. */ | |
945 | code = bfd_get_8 (abfd, contents + irel->r_offset - 2); | |
946 | ||
947 | if (code != 0xf4) | |
948 | continue; | |
949 | ||
950 | /* Get the second opcode. */ | |
951 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
952 | ||
953 | switch (code & 0xfc) | |
954 | { | |
955 | /* mov imm24,dn -> mov imm16,dn */ | |
956 | case 0x70: | |
957 | /* Not safe if the high bit is on as relaxing may | |
958 | move the value out of high mem and thus not fit | |
959 | in a signed 16bit value. */ | |
960 | if (value & 0x8000) | |
961 | continue; | |
962 | ||
4cc11e76 | 963 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 964 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 965 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 966 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
967 | |
968 | /* Fix the opcode. */ | |
969 | bfd_put_8 (abfd, 0xf8 + (code & 0x03), | |
970 | contents + irel->r_offset - 2); | |
971 | ||
972 | /* Fix the relocation's type. */ | |
973 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
974 | R_MN10200_16); | |
975 | ||
976 | /* The opcode got shorter too, so we have to fix the | |
977 | offset. */ | |
978 | irel->r_offset -= 1; | |
979 | ||
980 | /* Delete two bytes of data. */ | |
981 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
982 | irel->r_offset + 1, 2)) | |
983 | goto error_return; | |
984 | ||
985 | /* That will change things, so, we should relax again. | |
986 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 987 | *again = TRUE; |
252b5132 RH |
988 | break; |
989 | ||
a7c10850 | 990 | /* mov imm24,an -> mov imm16,an |
252b5132 RH |
991 | cmp imm24,an -> cmp imm16,an |
992 | mov (abs24),dn -> mov (abs16),dn | |
993 | mov dn,(abs24) -> mov dn,(abs16) | |
994 | movb dn,(abs24) -> movb dn,(abs16) | |
995 | movbu (abs24),dn -> movbu (abs16),dn */ | |
996 | case 0x74: | |
997 | case 0x7c: | |
998 | case 0xc0: | |
999 | case 0x40: | |
1000 | case 0x44: | |
1001 | case 0xc8: | |
4cc11e76 | 1002 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1003 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1004 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1005 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1006 | |
1007 | if ((code & 0xfc) == 0x74) | |
1008 | code = 0xdc + (code & 0x03); | |
1009 | else if ((code & 0xfc) == 0x7c) | |
1010 | code = 0xec + (code & 0x03); | |
1011 | else if ((code & 0xfc) == 0xc0) | |
1012 | code = 0xc8 + (code & 0x03); | |
1013 | else if ((code & 0xfc) == 0x40) | |
1014 | code = 0xc0 + (code & 0x03); | |
1015 | else if ((code & 0xfc) == 0x44) | |
1016 | code = 0xc4 + (code & 0x03); | |
1017 | else if ((code & 0xfc) == 0xc8) | |
1018 | code = 0xcc + (code & 0x03); | |
1019 | ||
1020 | /* Fix the opcode. */ | |
1021 | bfd_put_8 (abfd, code, contents + irel->r_offset - 2); | |
1022 | ||
1023 | /* Fix the relocation's type. */ | |
1024 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1025 | R_MN10200_16); | |
1026 | ||
1027 | /* The opcode got shorter too, so we have to fix the | |
1028 | offset. */ | |
1029 | irel->r_offset -= 1; | |
1030 | ||
1031 | /* Delete two bytes of data. */ | |
1032 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1033 | irel->r_offset + 1, 2)) | |
1034 | goto error_return; | |
1035 | ||
1036 | /* That will change things, so, we should relax again. | |
1037 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1038 | *again = TRUE; |
252b5132 RH |
1039 | break; |
1040 | ||
1041 | /* cmp imm24,dn -> cmp imm16,dn | |
1042 | mov (abs24),an -> mov (abs16),an | |
1043 | mov an,(abs24) -> mov an,(abs16) | |
1044 | add imm24,dn -> add imm16,dn | |
1045 | add imm24,an -> add imm16,an | |
1046 | sub imm24,dn -> sub imm16,dn | |
a7c10850 | 1047 | sub imm24,an -> sub imm16,an |
252b5132 RH |
1048 | And all d24->d16 in memory ops. */ |
1049 | case 0x78: | |
1050 | case 0xd0: | |
1051 | case 0x50: | |
1052 | case 0x60: | |
1053 | case 0x64: | |
1054 | case 0x68: | |
1055 | case 0x6c: | |
1056 | case 0x80: | |
1057 | case 0xf0: | |
1058 | case 0x00: | |
1059 | case 0x10: | |
1060 | case 0xb0: | |
1061 | case 0x30: | |
1062 | case 0xa0: | |
1063 | case 0x20: | |
1064 | case 0x90: | |
1065 | /* Not safe if the high bit is on as relaxing may | |
1066 | move the value out of high mem and thus not fit | |
1067 | in a signed 16bit value. */ | |
1068 | if (((code & 0xfc) == 0x78 | |
27def10f KH |
1069 | || (code & 0xfc) == 0x60 |
1070 | || (code & 0xfc) == 0x64 | |
1071 | || (code & 0xfc) == 0x68 | |
1072 | || (code & 0xfc) == 0x6c | |
1073 | || (code & 0xfc) == 0x80 | |
1074 | || (code & 0xfc) == 0xf0 | |
1075 | || (code & 0xfc) == 0x00 | |
1076 | || (code & 0xfc) == 0x10 | |
1077 | || (code & 0xfc) == 0xb0 | |
1078 | || (code & 0xfc) == 0x30 | |
1079 | || (code & 0xfc) == 0xa0 | |
1080 | || (code & 0xfc) == 0x20 | |
1081 | || (code & 0xfc) == 0x90) | |
1082 | && (value & 0x8000) != 0) | |
252b5132 RH |
1083 | continue; |
1084 | ||
4cc11e76 | 1085 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1086 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1087 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1088 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1089 | |
1090 | /* Fix the opcode. */ | |
1091 | bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2); | |
1092 | ||
1093 | if ((code & 0xfc) == 0x78) | |
1094 | code = 0x48 + (code & 0x03); | |
1095 | else if ((code & 0xfc) == 0xd0) | |
1096 | code = 0x30 + (code & 0x03); | |
1097 | else if ((code & 0xfc) == 0x50) | |
1098 | code = 0x20 + (code & 0x03); | |
1099 | else if ((code & 0xfc) == 0x60) | |
1100 | code = 0x18 + (code & 0x03); | |
1101 | else if ((code & 0xfc) == 0x64) | |
1102 | code = 0x08 + (code & 0x03); | |
1103 | else if ((code & 0xfc) == 0x68) | |
1104 | code = 0x1c + (code & 0x03); | |
1105 | else if ((code & 0xfc) == 0x6c) | |
1106 | code = 0x0c + (code & 0x03); | |
1107 | else if ((code & 0xfc) == 0x80) | |
1108 | code = 0xc0 + (code & 0x07); | |
1109 | else if ((code & 0xfc) == 0xf0) | |
1110 | code = 0xb0 + (code & 0x07); | |
1111 | else if ((code & 0xfc) == 0x00) | |
1112 | code = 0x80 + (code & 0x07); | |
1113 | else if ((code & 0xfc) == 0x10) | |
1114 | code = 0xa0 + (code & 0x07); | |
1115 | else if ((code & 0xfc) == 0xb0) | |
1116 | code = 0x70 + (code & 0x07); | |
1117 | else if ((code & 0xfc) == 0x30) | |
1118 | code = 0x60 + (code & 0x07); | |
1119 | else if ((code & 0xfc) == 0xa0) | |
1120 | code = 0xd0 + (code & 0x07); | |
1121 | else if ((code & 0xfc) == 0x20) | |
1122 | code = 0x90 + (code & 0x07); | |
1123 | else if ((code & 0xfc) == 0x90) | |
1124 | code = 0x50 + (code & 0x07); | |
1125 | ||
1126 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
1127 | ||
1128 | /* Fix the relocation's type. */ | |
1129 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1130 | R_MN10200_16); | |
1131 | ||
1132 | /* Delete one bytes of data. */ | |
1133 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1134 | irel->r_offset + 2, 1)) | |
1135 | goto error_return; | |
1136 | ||
1137 | /* That will change things, so, we should relax again. | |
1138 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1139 | *again = TRUE; |
252b5132 RH |
1140 | break; |
1141 | ||
1142 | /* movb (abs24),dn ->movbu (abs16),dn extxb bn */ | |
1143 | case 0xc4: | |
1144 | /* Note that we've changed the reldection contents, etc. */ | |
1145 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 1146 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1147 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1148 | |
1149 | bfd_put_8 (abfd, 0xcc + (code & 0x03), | |
1150 | contents + irel->r_offset - 2); | |
1151 | ||
1152 | bfd_put_8 (abfd, 0xb8 + (code & 0x03), | |
1153 | contents + irel->r_offset - 1); | |
1154 | ||
1155 | /* Fix the relocation's type. */ | |
1156 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1157 | R_MN10200_16); | |
1158 | ||
1159 | /* The reloc will be applied one byte in front of its | |
1160 | current location. */ | |
1161 | irel->r_offset -= 1; | |
1162 | ||
1163 | /* Delete one bytes of data. */ | |
1164 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1165 | irel->r_offset + 2, 1)) | |
1166 | goto error_return; | |
1167 | ||
1168 | /* That will change things, so, we should relax again. | |
1169 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1170 | *again = TRUE; |
252b5132 RH |
1171 | break; |
1172 | } | |
1173 | } | |
1174 | } | |
1175 | } | |
1176 | ||
6cdc0ccc AM |
1177 | if (isymbuf != NULL |
1178 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
252b5132 RH |
1179 | { |
1180 | if (! link_info->keep_memory) | |
6cdc0ccc | 1181 | free (isymbuf); |
252b5132 RH |
1182 | else |
1183 | { | |
6cdc0ccc AM |
1184 | /* Cache the symbols for elf_link_input_bfd. */ |
1185 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
252b5132 | 1186 | } |
9ad5cbcf AM |
1187 | } |
1188 | ||
6cdc0ccc AM |
1189 | if (contents != NULL |
1190 | && elf_section_data (sec)->this_hdr.contents != contents) | |
252b5132 RH |
1191 | { |
1192 | if (! link_info->keep_memory) | |
6cdc0ccc AM |
1193 | free (contents); |
1194 | else | |
252b5132 | 1195 | { |
6cdc0ccc AM |
1196 | /* Cache the section contents for elf_link_input_bfd. */ |
1197 | elf_section_data (sec)->this_hdr.contents = contents; | |
252b5132 | 1198 | } |
252b5132 RH |
1199 | } |
1200 | ||
6cdc0ccc AM |
1201 | if (internal_relocs != NULL |
1202 | && elf_section_data (sec)->relocs != internal_relocs) | |
1203 | free (internal_relocs); | |
1204 | ||
b34976b6 | 1205 | return TRUE; |
252b5132 RH |
1206 | |
1207 | error_return: | |
6cdc0ccc AM |
1208 | if (isymbuf != NULL |
1209 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1210 | free (isymbuf); | |
1211 | if (contents != NULL | |
1212 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1213 | free (contents); | |
1214 | if (internal_relocs != NULL | |
1215 | && elf_section_data (sec)->relocs != internal_relocs) | |
1216 | free (internal_relocs); | |
9ad5cbcf | 1217 | |
b34976b6 | 1218 | return FALSE; |
252b5132 RH |
1219 | } |
1220 | ||
b34976b6 AM |
1221 | /* Return TRUE if a symbol exists at the given address, else return |
1222 | FALSE. */ | |
1223 | static bfd_boolean | |
2c3fc389 NC |
1224 | mn10200_elf_symbol_address_p (bfd *abfd, |
1225 | asection *sec, | |
1226 | Elf_Internal_Sym *isym, | |
1227 | bfd_vma addr) | |
252b5132 RH |
1228 | { |
1229 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1230 | unsigned int sec_shndx; |
6cdc0ccc | 1231 | Elf_Internal_Sym *isymend; |
9ad5cbcf AM |
1232 | struct elf_link_hash_entry **sym_hashes; |
1233 | struct elf_link_hash_entry **end_hashes; | |
1234 | unsigned int symcount; | |
252b5132 | 1235 | |
9ad5cbcf | 1236 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 | 1237 | |
6cdc0ccc | 1238 | /* Examine all the local symbols. */ |
9ad5cbcf | 1239 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
6cdc0ccc | 1240 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) |
252b5132 | 1241 | { |
6cdc0ccc AM |
1242 | if (isym->st_shndx == sec_shndx |
1243 | && isym->st_value == addr) | |
b34976b6 | 1244 | return TRUE; |
252b5132 RH |
1245 | } |
1246 | ||
9ad5cbcf AM |
1247 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1248 | - symtab_hdr->sh_info); | |
1249 | sym_hashes = elf_sym_hashes (abfd); | |
1250 | end_hashes = sym_hashes + symcount; | |
1251 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1252 | { |
9ad5cbcf AM |
1253 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1254 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1255 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1256 | && sym_hash->root.u.def.section == sec | |
1257 | && sym_hash->root.u.def.value == addr) | |
b34976b6 | 1258 | return TRUE; |
252b5132 | 1259 | } |
9ad5cbcf | 1260 | |
b34976b6 | 1261 | return FALSE; |
252b5132 RH |
1262 | } |
1263 | ||
1264 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1265 | which uses mn10200_elf_relocate_section. */ | |
1266 | ||
1267 | static bfd_byte * | |
2c3fc389 NC |
1268 | mn10200_elf_get_relocated_section_contents (bfd *output_bfd, |
1269 | struct bfd_link_info *link_info, | |
1270 | struct bfd_link_order *link_order, | |
1271 | bfd_byte *data, | |
1272 | bfd_boolean relocatable, | |
1273 | asymbol **symbols) | |
252b5132 RH |
1274 | { |
1275 | Elf_Internal_Shdr *symtab_hdr; | |
1276 | asection *input_section = link_order->u.indirect.section; | |
1277 | bfd *input_bfd = input_section->owner; | |
1278 | asection **sections = NULL; | |
1279 | Elf_Internal_Rela *internal_relocs = NULL; | |
6cdc0ccc | 1280 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
1281 | |
1282 | /* We only need to handle the case of relaxing, or of having a | |
1283 | particular set of section contents, specially. */ | |
1049f94e | 1284 | if (relocatable |
252b5132 RH |
1285 | || elf_section_data (input_section)->this_hdr.contents == NULL) |
1286 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1287 | link_order, data, | |
1049f94e | 1288 | relocatable, |
252b5132 RH |
1289 | symbols); |
1290 | ||
1291 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1292 | ||
1293 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
eea6121a | 1294 | (size_t) input_section->size); |
252b5132 RH |
1295 | |
1296 | if ((input_section->flags & SEC_RELOC) != 0 | |
1297 | && input_section->reloc_count > 0) | |
1298 | { | |
6cdc0ccc AM |
1299 | Elf_Internal_Sym *isym; |
1300 | Elf_Internal_Sym *isymend; | |
252b5132 | 1301 | asection **secpp; |
9ad5cbcf | 1302 | bfd_size_type amt; |
252b5132 | 1303 | |
45d6a902 | 1304 | internal_relocs = (_bfd_elf_link_read_relocs |
2c3fc389 | 1305 | (input_bfd, input_section, NULL, |
b34976b6 | 1306 | (Elf_Internal_Rela *) NULL, FALSE)); |
252b5132 RH |
1307 | if (internal_relocs == NULL) |
1308 | goto error_return; | |
1309 | ||
6cdc0ccc AM |
1310 | if (symtab_hdr->sh_info != 0) |
1311 | { | |
1312 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1313 | if (isymbuf == NULL) | |
1314 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
1315 | symtab_hdr->sh_info, 0, | |
1316 | NULL, NULL, NULL); | |
1317 | if (isymbuf == NULL) | |
1318 | goto error_return; | |
1319 | } | |
252b5132 | 1320 | |
9ad5cbcf AM |
1321 | amt = symtab_hdr->sh_info; |
1322 | amt *= sizeof (asection *); | |
1323 | sections = (asection **) bfd_malloc (amt); | |
1324 | if (sections == NULL && amt != 0) | |
252b5132 RH |
1325 | goto error_return; |
1326 | ||
6cdc0ccc AM |
1327 | isymend = isymbuf + symtab_hdr->sh_info; |
1328 | for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) | |
252b5132 RH |
1329 | { |
1330 | asection *isec; | |
1331 | ||
6cdc0ccc | 1332 | if (isym->st_shndx == SHN_UNDEF) |
252b5132 | 1333 | isec = bfd_und_section_ptr; |
6cdc0ccc | 1334 | else if (isym->st_shndx == SHN_ABS) |
252b5132 | 1335 | isec = bfd_abs_section_ptr; |
6cdc0ccc | 1336 | else if (isym->st_shndx == SHN_COMMON) |
252b5132 RH |
1337 | isec = bfd_com_section_ptr; |
1338 | else | |
6cdc0ccc | 1339 | isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); |
252b5132 RH |
1340 | |
1341 | *secpp = isec; | |
1342 | } | |
1343 | ||
1344 | if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1345 | input_section, data, internal_relocs, | |
6cdc0ccc | 1346 | isymbuf, sections)) |
252b5132 RH |
1347 | goto error_return; |
1348 | ||
1349 | if (sections != NULL) | |
1350 | free (sections); | |
6cdc0ccc AM |
1351 | if (isymbuf != NULL |
1352 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1353 | free (isymbuf); | |
1354 | if (elf_section_data (input_section)->relocs != internal_relocs) | |
252b5132 | 1355 | free (internal_relocs); |
252b5132 RH |
1356 | } |
1357 | ||
1358 | return data; | |
1359 | ||
1360 | error_return: | |
252b5132 RH |
1361 | if (sections != NULL) |
1362 | free (sections); | |
6cdc0ccc AM |
1363 | if (isymbuf != NULL |
1364 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1365 | free (isymbuf); | |
1366 | if (internal_relocs != NULL | |
1367 | && elf_section_data (input_section)->relocs != internal_relocs) | |
1368 | free (internal_relocs); | |
252b5132 RH |
1369 | return NULL; |
1370 | } | |
1371 | ||
6d00b590 | 1372 | #define TARGET_LITTLE_SYM mn10200_elf32_vec |
252b5132 RH |
1373 | #define TARGET_LITTLE_NAME "elf32-mn10200" |
1374 | #define ELF_ARCH bfd_arch_mn10200 | |
aa4f99bb AO |
1375 | #define ELF_MACHINE_CODE EM_MN10200 |
1376 | #define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200 | |
252b5132 RH |
1377 | #define ELF_MAXPAGESIZE 0x1000 |
1378 | ||
b491616a | 1379 | #define elf_backend_rela_normal 1 |
252b5132 RH |
1380 | #define elf_info_to_howto mn10200_info_to_howto |
1381 | #define elf_info_to_howto_rel 0 | |
1382 | #define elf_backend_relocate_section mn10200_elf_relocate_section | |
1383 | #define bfd_elf32_bfd_relax_section mn10200_elf_relax_section | |
1384 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
1385 | mn10200_elf_get_relocated_section_contents | |
1386 | ||
1387 | #define elf_symbol_leading_char '_' | |
1388 | ||
1389 | #include "elf32-target.h" |