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252b5132 | 1 | /* 32-bit ELF support for ARM |
6f2750fe | 2 | Copyright (C) 1998-2016 Free Software Foundation, Inc. |
252b5132 RH |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 8 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
6e6718a3 | 21 | #include "sysdep.h" |
2468f9c9 PB |
22 | #include <limits.h> |
23 | ||
3db64b00 | 24 | #include "bfd.h" |
6034aab8 | 25 | #include "bfd_stdint.h" |
00a97672 | 26 | #include "libiberty.h" |
7f266840 DJ |
27 | #include "libbfd.h" |
28 | #include "elf-bfd.h" | |
b38cadfb | 29 | #include "elf-nacl.h" |
00a97672 | 30 | #include "elf-vxworks.h" |
ee065d83 | 31 | #include "elf/arm.h" |
7f266840 | 32 | |
00a97672 RS |
33 | /* Return the relocation section associated with NAME. HTAB is the |
34 | bfd's elf32_arm_link_hash_entry. */ | |
35 | #define RELOC_SECTION(HTAB, NAME) \ | |
36 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
37 | ||
38 | /* Return size of a relocation entry. HTAB is the bfd's | |
39 | elf32_arm_link_hash_entry. */ | |
40 | #define RELOC_SIZE(HTAB) \ | |
41 | ((HTAB)->use_rel \ | |
42 | ? sizeof (Elf32_External_Rel) \ | |
43 | : sizeof (Elf32_External_Rela)) | |
44 | ||
45 | /* Return function to swap relocations in. HTAB is the bfd's | |
46 | elf32_arm_link_hash_entry. */ | |
47 | #define SWAP_RELOC_IN(HTAB) \ | |
48 | ((HTAB)->use_rel \ | |
49 | ? bfd_elf32_swap_reloc_in \ | |
50 | : bfd_elf32_swap_reloca_in) | |
51 | ||
52 | /* Return function to swap relocations out. HTAB is the bfd's | |
53 | elf32_arm_link_hash_entry. */ | |
54 | #define SWAP_RELOC_OUT(HTAB) \ | |
55 | ((HTAB)->use_rel \ | |
56 | ? bfd_elf32_swap_reloc_out \ | |
57 | : bfd_elf32_swap_reloca_out) | |
58 | ||
7f266840 DJ |
59 | #define elf_info_to_howto 0 |
60 | #define elf_info_to_howto_rel elf32_arm_info_to_howto | |
61 | ||
62 | #define ARM_ELF_ABI_VERSION 0 | |
63 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
64 | ||
79f08007 YZ |
65 | /* The Adjusted Place, as defined by AAELF. */ |
66 | #define Pa(X) ((X) & 0xfffffffc) | |
67 | ||
3e6b1042 DJ |
68 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
69 | struct bfd_link_info *link_info, | |
70 | asection *sec, | |
71 | bfd_byte *contents); | |
72 | ||
7f266840 DJ |
73 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
74 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
75 | in that slot. */ | |
76 | ||
c19d1205 | 77 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 78 | { |
8029a119 | 79 | /* No relocation. */ |
7f266840 DJ |
80 | HOWTO (R_ARM_NONE, /* type */ |
81 | 0, /* rightshift */ | |
6346d5ca | 82 | 3, /* size (0 = byte, 1 = short, 2 = long) */ |
7f266840 DJ |
83 | 0, /* bitsize */ |
84 | FALSE, /* pc_relative */ | |
85 | 0, /* bitpos */ | |
86 | complain_overflow_dont,/* complain_on_overflow */ | |
87 | bfd_elf_generic_reloc, /* special_function */ | |
88 | "R_ARM_NONE", /* name */ | |
89 | FALSE, /* partial_inplace */ | |
90 | 0, /* src_mask */ | |
91 | 0, /* dst_mask */ | |
92 | FALSE), /* pcrel_offset */ | |
93 | ||
94 | HOWTO (R_ARM_PC24, /* type */ | |
95 | 2, /* rightshift */ | |
96 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
97 | 24, /* bitsize */ | |
98 | TRUE, /* pc_relative */ | |
99 | 0, /* bitpos */ | |
100 | complain_overflow_signed,/* complain_on_overflow */ | |
101 | bfd_elf_generic_reloc, /* special_function */ | |
102 | "R_ARM_PC24", /* name */ | |
103 | FALSE, /* partial_inplace */ | |
104 | 0x00ffffff, /* src_mask */ | |
105 | 0x00ffffff, /* dst_mask */ | |
106 | TRUE), /* pcrel_offset */ | |
107 | ||
108 | /* 32 bit absolute */ | |
109 | HOWTO (R_ARM_ABS32, /* type */ | |
110 | 0, /* rightshift */ | |
111 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
112 | 32, /* bitsize */ | |
113 | FALSE, /* pc_relative */ | |
114 | 0, /* bitpos */ | |
115 | complain_overflow_bitfield,/* complain_on_overflow */ | |
116 | bfd_elf_generic_reloc, /* special_function */ | |
117 | "R_ARM_ABS32", /* name */ | |
118 | FALSE, /* partial_inplace */ | |
119 | 0xffffffff, /* src_mask */ | |
120 | 0xffffffff, /* dst_mask */ | |
121 | FALSE), /* pcrel_offset */ | |
122 | ||
123 | /* standard 32bit pc-relative reloc */ | |
124 | HOWTO (R_ARM_REL32, /* type */ | |
125 | 0, /* rightshift */ | |
126 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
127 | 32, /* bitsize */ | |
128 | TRUE, /* pc_relative */ | |
129 | 0, /* bitpos */ | |
130 | complain_overflow_bitfield,/* complain_on_overflow */ | |
131 | bfd_elf_generic_reloc, /* special_function */ | |
132 | "R_ARM_REL32", /* name */ | |
133 | FALSE, /* partial_inplace */ | |
134 | 0xffffffff, /* src_mask */ | |
135 | 0xffffffff, /* dst_mask */ | |
136 | TRUE), /* pcrel_offset */ | |
137 | ||
c19d1205 | 138 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 139 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 DJ |
140 | 0, /* rightshift */ |
141 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
4962c51a MS |
142 | 32, /* bitsize */ |
143 | TRUE, /* pc_relative */ | |
7f266840 | 144 | 0, /* bitpos */ |
4962c51a | 145 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 146 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 147 | "R_ARM_LDR_PC_G0", /* name */ |
7f266840 | 148 | FALSE, /* partial_inplace */ |
4962c51a MS |
149 | 0xffffffff, /* src_mask */ |
150 | 0xffffffff, /* dst_mask */ | |
151 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
152 | |
153 | /* 16 bit absolute */ | |
154 | HOWTO (R_ARM_ABS16, /* type */ | |
155 | 0, /* rightshift */ | |
156 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
157 | 16, /* bitsize */ | |
158 | FALSE, /* pc_relative */ | |
159 | 0, /* bitpos */ | |
160 | complain_overflow_bitfield,/* complain_on_overflow */ | |
161 | bfd_elf_generic_reloc, /* special_function */ | |
162 | "R_ARM_ABS16", /* name */ | |
163 | FALSE, /* partial_inplace */ | |
164 | 0x0000ffff, /* src_mask */ | |
165 | 0x0000ffff, /* dst_mask */ | |
166 | FALSE), /* pcrel_offset */ | |
167 | ||
168 | /* 12 bit absolute */ | |
169 | HOWTO (R_ARM_ABS12, /* type */ | |
170 | 0, /* rightshift */ | |
171 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
172 | 12, /* bitsize */ | |
173 | FALSE, /* pc_relative */ | |
174 | 0, /* bitpos */ | |
175 | complain_overflow_bitfield,/* complain_on_overflow */ | |
176 | bfd_elf_generic_reloc, /* special_function */ | |
177 | "R_ARM_ABS12", /* name */ | |
178 | FALSE, /* partial_inplace */ | |
00a97672 RS |
179 | 0x00000fff, /* src_mask */ |
180 | 0x00000fff, /* dst_mask */ | |
7f266840 DJ |
181 | FALSE), /* pcrel_offset */ |
182 | ||
183 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
184 | 6, /* rightshift */ | |
185 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
186 | 5, /* bitsize */ | |
187 | FALSE, /* pc_relative */ | |
188 | 0, /* bitpos */ | |
189 | complain_overflow_bitfield,/* complain_on_overflow */ | |
190 | bfd_elf_generic_reloc, /* special_function */ | |
191 | "R_ARM_THM_ABS5", /* name */ | |
192 | FALSE, /* partial_inplace */ | |
193 | 0x000007e0, /* src_mask */ | |
194 | 0x000007e0, /* dst_mask */ | |
195 | FALSE), /* pcrel_offset */ | |
196 | ||
197 | /* 8 bit absolute */ | |
198 | HOWTO (R_ARM_ABS8, /* type */ | |
199 | 0, /* rightshift */ | |
200 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
201 | 8, /* bitsize */ | |
202 | FALSE, /* pc_relative */ | |
203 | 0, /* bitpos */ | |
204 | complain_overflow_bitfield,/* complain_on_overflow */ | |
205 | bfd_elf_generic_reloc, /* special_function */ | |
206 | "R_ARM_ABS8", /* name */ | |
207 | FALSE, /* partial_inplace */ | |
208 | 0x000000ff, /* src_mask */ | |
209 | 0x000000ff, /* dst_mask */ | |
210 | FALSE), /* pcrel_offset */ | |
211 | ||
212 | HOWTO (R_ARM_SBREL32, /* type */ | |
213 | 0, /* rightshift */ | |
214 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
215 | 32, /* bitsize */ | |
216 | FALSE, /* pc_relative */ | |
217 | 0, /* bitpos */ | |
218 | complain_overflow_dont,/* complain_on_overflow */ | |
219 | bfd_elf_generic_reloc, /* special_function */ | |
220 | "R_ARM_SBREL32", /* name */ | |
221 | FALSE, /* partial_inplace */ | |
222 | 0xffffffff, /* src_mask */ | |
223 | 0xffffffff, /* dst_mask */ | |
224 | FALSE), /* pcrel_offset */ | |
225 | ||
c19d1205 | 226 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 DJ |
227 | 1, /* rightshift */ |
228 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
f6ebfac0 | 229 | 24, /* bitsize */ |
7f266840 DJ |
230 | TRUE, /* pc_relative */ |
231 | 0, /* bitpos */ | |
232 | complain_overflow_signed,/* complain_on_overflow */ | |
233 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 234 | "R_ARM_THM_CALL", /* name */ |
7f266840 | 235 | FALSE, /* partial_inplace */ |
7f6ab9f8 AM |
236 | 0x07ff2fff, /* src_mask */ |
237 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
238 | TRUE), /* pcrel_offset */ |
239 | ||
240 | HOWTO (R_ARM_THM_PC8, /* type */ | |
241 | 1, /* rightshift */ | |
242 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
243 | 8, /* bitsize */ | |
244 | TRUE, /* pc_relative */ | |
245 | 0, /* bitpos */ | |
246 | complain_overflow_signed,/* complain_on_overflow */ | |
247 | bfd_elf_generic_reloc, /* special_function */ | |
248 | "R_ARM_THM_PC8", /* name */ | |
249 | FALSE, /* partial_inplace */ | |
250 | 0x000000ff, /* src_mask */ | |
251 | 0x000000ff, /* dst_mask */ | |
252 | TRUE), /* pcrel_offset */ | |
253 | ||
c19d1205 | 254 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 DJ |
255 | 1, /* rightshift */ |
256 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
257 | 32, /* bitsize */ |
258 | FALSE, /* pc_relative */ | |
7f266840 DJ |
259 | 0, /* bitpos */ |
260 | complain_overflow_signed,/* complain_on_overflow */ | |
261 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 262 | "R_ARM_BREL_ADJ", /* name */ |
7f266840 | 263 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
264 | 0xffffffff, /* src_mask */ |
265 | 0xffffffff, /* dst_mask */ | |
266 | FALSE), /* pcrel_offset */ | |
7f266840 | 267 | |
0855e32b | 268 | HOWTO (R_ARM_TLS_DESC, /* type */ |
7f266840 | 269 | 0, /* rightshift */ |
0855e32b NS |
270 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
271 | 32, /* bitsize */ | |
7f266840 DJ |
272 | FALSE, /* pc_relative */ |
273 | 0, /* bitpos */ | |
0855e32b | 274 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 275 | bfd_elf_generic_reloc, /* special_function */ |
0855e32b | 276 | "R_ARM_TLS_DESC", /* name */ |
7f266840 | 277 | FALSE, /* partial_inplace */ |
0855e32b NS |
278 | 0xffffffff, /* src_mask */ |
279 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
280 | FALSE), /* pcrel_offset */ |
281 | ||
282 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
283 | 0, /* rightshift */ | |
284 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
285 | 0, /* bitsize */ | |
286 | FALSE, /* pc_relative */ | |
287 | 0, /* bitpos */ | |
288 | complain_overflow_signed,/* complain_on_overflow */ | |
289 | bfd_elf_generic_reloc, /* special_function */ | |
290 | "R_ARM_SWI8", /* name */ | |
291 | FALSE, /* partial_inplace */ | |
292 | 0x00000000, /* src_mask */ | |
293 | 0x00000000, /* dst_mask */ | |
294 | FALSE), /* pcrel_offset */ | |
295 | ||
296 | /* BLX instruction for the ARM. */ | |
297 | HOWTO (R_ARM_XPC25, /* type */ | |
298 | 2, /* rightshift */ | |
299 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 300 | 24, /* bitsize */ |
7f266840 DJ |
301 | TRUE, /* pc_relative */ |
302 | 0, /* bitpos */ | |
303 | complain_overflow_signed,/* complain_on_overflow */ | |
304 | bfd_elf_generic_reloc, /* special_function */ | |
305 | "R_ARM_XPC25", /* name */ | |
306 | FALSE, /* partial_inplace */ | |
307 | 0x00ffffff, /* src_mask */ | |
308 | 0x00ffffff, /* dst_mask */ | |
309 | TRUE), /* pcrel_offset */ | |
310 | ||
311 | /* BLX instruction for the Thumb. */ | |
312 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
313 | 2, /* rightshift */ | |
314 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 315 | 24, /* bitsize */ |
7f266840 DJ |
316 | TRUE, /* pc_relative */ |
317 | 0, /* bitpos */ | |
318 | complain_overflow_signed,/* complain_on_overflow */ | |
319 | bfd_elf_generic_reloc, /* special_function */ | |
320 | "R_ARM_THM_XPC22", /* name */ | |
321 | FALSE, /* partial_inplace */ | |
7f6ab9f8 AM |
322 | 0x07ff2fff, /* src_mask */ |
323 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
324 | TRUE), /* pcrel_offset */ |
325 | ||
ba93b8ac | 326 | /* Dynamic TLS relocations. */ |
7f266840 | 327 | |
ba93b8ac | 328 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
99059e56 RM |
329 | 0, /* rightshift */ |
330 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
331 | 32, /* bitsize */ | |
332 | FALSE, /* pc_relative */ | |
333 | 0, /* bitpos */ | |
334 | complain_overflow_bitfield,/* complain_on_overflow */ | |
335 | bfd_elf_generic_reloc, /* special_function */ | |
336 | "R_ARM_TLS_DTPMOD32", /* name */ | |
337 | TRUE, /* partial_inplace */ | |
338 | 0xffffffff, /* src_mask */ | |
339 | 0xffffffff, /* dst_mask */ | |
340 | FALSE), /* pcrel_offset */ | |
7f266840 | 341 | |
ba93b8ac | 342 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
99059e56 RM |
343 | 0, /* rightshift */ |
344 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
345 | 32, /* bitsize */ | |
346 | FALSE, /* pc_relative */ | |
347 | 0, /* bitpos */ | |
348 | complain_overflow_bitfield,/* complain_on_overflow */ | |
349 | bfd_elf_generic_reloc, /* special_function */ | |
350 | "R_ARM_TLS_DTPOFF32", /* name */ | |
351 | TRUE, /* partial_inplace */ | |
352 | 0xffffffff, /* src_mask */ | |
353 | 0xffffffff, /* dst_mask */ | |
354 | FALSE), /* pcrel_offset */ | |
7f266840 | 355 | |
ba93b8ac | 356 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
99059e56 RM |
357 | 0, /* rightshift */ |
358 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
359 | 32, /* bitsize */ | |
360 | FALSE, /* pc_relative */ | |
361 | 0, /* bitpos */ | |
362 | complain_overflow_bitfield,/* complain_on_overflow */ | |
363 | bfd_elf_generic_reloc, /* special_function */ | |
364 | "R_ARM_TLS_TPOFF32", /* name */ | |
365 | TRUE, /* partial_inplace */ | |
366 | 0xffffffff, /* src_mask */ | |
367 | 0xffffffff, /* dst_mask */ | |
368 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
369 | |
370 | /* Relocs used in ARM Linux */ | |
371 | ||
372 | HOWTO (R_ARM_COPY, /* type */ | |
99059e56 RM |
373 | 0, /* rightshift */ |
374 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
375 | 32, /* bitsize */ | |
376 | FALSE, /* pc_relative */ | |
377 | 0, /* bitpos */ | |
378 | complain_overflow_bitfield,/* complain_on_overflow */ | |
379 | bfd_elf_generic_reloc, /* special_function */ | |
380 | "R_ARM_COPY", /* name */ | |
381 | TRUE, /* partial_inplace */ | |
382 | 0xffffffff, /* src_mask */ | |
383 | 0xffffffff, /* dst_mask */ | |
384 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
385 | |
386 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
99059e56 RM |
387 | 0, /* rightshift */ |
388 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
389 | 32, /* bitsize */ | |
390 | FALSE, /* pc_relative */ | |
391 | 0, /* bitpos */ | |
392 | complain_overflow_bitfield,/* complain_on_overflow */ | |
393 | bfd_elf_generic_reloc, /* special_function */ | |
394 | "R_ARM_GLOB_DAT", /* name */ | |
395 | TRUE, /* partial_inplace */ | |
396 | 0xffffffff, /* src_mask */ | |
397 | 0xffffffff, /* dst_mask */ | |
398 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
399 | |
400 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
99059e56 RM |
401 | 0, /* rightshift */ |
402 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
403 | 32, /* bitsize */ | |
404 | FALSE, /* pc_relative */ | |
405 | 0, /* bitpos */ | |
406 | complain_overflow_bitfield,/* complain_on_overflow */ | |
407 | bfd_elf_generic_reloc, /* special_function */ | |
408 | "R_ARM_JUMP_SLOT", /* name */ | |
409 | TRUE, /* partial_inplace */ | |
410 | 0xffffffff, /* src_mask */ | |
411 | 0xffffffff, /* dst_mask */ | |
412 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
413 | |
414 | HOWTO (R_ARM_RELATIVE, /* type */ | |
99059e56 RM |
415 | 0, /* rightshift */ |
416 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
417 | 32, /* bitsize */ | |
418 | FALSE, /* pc_relative */ | |
419 | 0, /* bitpos */ | |
420 | complain_overflow_bitfield,/* complain_on_overflow */ | |
421 | bfd_elf_generic_reloc, /* special_function */ | |
422 | "R_ARM_RELATIVE", /* name */ | |
423 | TRUE, /* partial_inplace */ | |
424 | 0xffffffff, /* src_mask */ | |
425 | 0xffffffff, /* dst_mask */ | |
426 | FALSE), /* pcrel_offset */ | |
7f266840 | 427 | |
c19d1205 | 428 | HOWTO (R_ARM_GOTOFF32, /* type */ |
99059e56 RM |
429 | 0, /* rightshift */ |
430 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
431 | 32, /* bitsize */ | |
432 | FALSE, /* pc_relative */ | |
433 | 0, /* bitpos */ | |
434 | complain_overflow_bitfield,/* complain_on_overflow */ | |
435 | bfd_elf_generic_reloc, /* special_function */ | |
436 | "R_ARM_GOTOFF32", /* name */ | |
437 | TRUE, /* partial_inplace */ | |
438 | 0xffffffff, /* src_mask */ | |
439 | 0xffffffff, /* dst_mask */ | |
440 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
441 | |
442 | HOWTO (R_ARM_GOTPC, /* type */ | |
99059e56 RM |
443 | 0, /* rightshift */ |
444 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
445 | 32, /* bitsize */ | |
446 | TRUE, /* pc_relative */ | |
447 | 0, /* bitpos */ | |
448 | complain_overflow_bitfield,/* complain_on_overflow */ | |
449 | bfd_elf_generic_reloc, /* special_function */ | |
450 | "R_ARM_GOTPC", /* name */ | |
451 | TRUE, /* partial_inplace */ | |
452 | 0xffffffff, /* src_mask */ | |
453 | 0xffffffff, /* dst_mask */ | |
454 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
455 | |
456 | HOWTO (R_ARM_GOT32, /* type */ | |
99059e56 RM |
457 | 0, /* rightshift */ |
458 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
459 | 32, /* bitsize */ | |
460 | FALSE, /* pc_relative */ | |
461 | 0, /* bitpos */ | |
462 | complain_overflow_bitfield,/* complain_on_overflow */ | |
463 | bfd_elf_generic_reloc, /* special_function */ | |
464 | "R_ARM_GOT32", /* name */ | |
465 | TRUE, /* partial_inplace */ | |
466 | 0xffffffff, /* src_mask */ | |
467 | 0xffffffff, /* dst_mask */ | |
468 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
469 | |
470 | HOWTO (R_ARM_PLT32, /* type */ | |
99059e56 RM |
471 | 2, /* rightshift */ |
472 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
473 | 24, /* bitsize */ | |
474 | TRUE, /* pc_relative */ | |
475 | 0, /* bitpos */ | |
476 | complain_overflow_bitfield,/* complain_on_overflow */ | |
477 | bfd_elf_generic_reloc, /* special_function */ | |
478 | "R_ARM_PLT32", /* name */ | |
479 | FALSE, /* partial_inplace */ | |
480 | 0x00ffffff, /* src_mask */ | |
481 | 0x00ffffff, /* dst_mask */ | |
482 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
483 | |
484 | HOWTO (R_ARM_CALL, /* type */ | |
485 | 2, /* rightshift */ | |
486 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
487 | 24, /* bitsize */ | |
488 | TRUE, /* pc_relative */ | |
489 | 0, /* bitpos */ | |
490 | complain_overflow_signed,/* complain_on_overflow */ | |
491 | bfd_elf_generic_reloc, /* special_function */ | |
492 | "R_ARM_CALL", /* name */ | |
493 | FALSE, /* partial_inplace */ | |
494 | 0x00ffffff, /* src_mask */ | |
495 | 0x00ffffff, /* dst_mask */ | |
496 | TRUE), /* pcrel_offset */ | |
497 | ||
498 | HOWTO (R_ARM_JUMP24, /* type */ | |
499 | 2, /* rightshift */ | |
500 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
501 | 24, /* bitsize */ | |
502 | TRUE, /* pc_relative */ | |
503 | 0, /* bitpos */ | |
504 | complain_overflow_signed,/* complain_on_overflow */ | |
505 | bfd_elf_generic_reloc, /* special_function */ | |
506 | "R_ARM_JUMP24", /* name */ | |
507 | FALSE, /* partial_inplace */ | |
508 | 0x00ffffff, /* src_mask */ | |
509 | 0x00ffffff, /* dst_mask */ | |
510 | TRUE), /* pcrel_offset */ | |
511 | ||
c19d1205 ZW |
512 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
513 | 1, /* rightshift */ | |
514 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
515 | 24, /* bitsize */ | |
516 | TRUE, /* pc_relative */ | |
7f266840 | 517 | 0, /* bitpos */ |
c19d1205 | 518 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 519 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 520 | "R_ARM_THM_JUMP24", /* name */ |
7f266840 | 521 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
522 | 0x07ff2fff, /* src_mask */ |
523 | 0x07ff2fff, /* dst_mask */ | |
524 | TRUE), /* pcrel_offset */ | |
7f266840 | 525 | |
c19d1205 | 526 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 527 | 0, /* rightshift */ |
c19d1205 ZW |
528 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
529 | 32, /* bitsize */ | |
7f266840 DJ |
530 | FALSE, /* pc_relative */ |
531 | 0, /* bitpos */ | |
532 | complain_overflow_dont,/* complain_on_overflow */ | |
533 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 534 | "R_ARM_BASE_ABS", /* name */ |
7f266840 | 535 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
536 | 0xffffffff, /* src_mask */ |
537 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
538 | FALSE), /* pcrel_offset */ |
539 | ||
540 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
541 | 0, /* rightshift */ | |
542 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
543 | 12, /* bitsize */ | |
544 | TRUE, /* pc_relative */ | |
545 | 0, /* bitpos */ | |
546 | complain_overflow_dont,/* complain_on_overflow */ | |
547 | bfd_elf_generic_reloc, /* special_function */ | |
548 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
549 | FALSE, /* partial_inplace */ | |
550 | 0x00000fff, /* src_mask */ | |
551 | 0x00000fff, /* dst_mask */ | |
552 | TRUE), /* pcrel_offset */ | |
553 | ||
554 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
555 | 0, /* rightshift */ | |
556 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
557 | 12, /* bitsize */ | |
558 | TRUE, /* pc_relative */ | |
559 | 8, /* bitpos */ | |
560 | complain_overflow_dont,/* complain_on_overflow */ | |
561 | bfd_elf_generic_reloc, /* special_function */ | |
562 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
563 | FALSE, /* partial_inplace */ | |
564 | 0x00000fff, /* src_mask */ | |
565 | 0x00000fff, /* dst_mask */ | |
566 | TRUE), /* pcrel_offset */ | |
567 | ||
568 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
569 | 0, /* rightshift */ | |
570 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
571 | 12, /* bitsize */ | |
572 | TRUE, /* pc_relative */ | |
573 | 16, /* bitpos */ | |
574 | complain_overflow_dont,/* complain_on_overflow */ | |
575 | bfd_elf_generic_reloc, /* special_function */ | |
576 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
577 | FALSE, /* partial_inplace */ | |
578 | 0x00000fff, /* src_mask */ | |
579 | 0x00000fff, /* dst_mask */ | |
580 | TRUE), /* pcrel_offset */ | |
581 | ||
582 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
583 | 0, /* rightshift */ | |
584 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
585 | 12, /* bitsize */ | |
586 | FALSE, /* pc_relative */ | |
587 | 0, /* bitpos */ | |
588 | complain_overflow_dont,/* complain_on_overflow */ | |
589 | bfd_elf_generic_reloc, /* special_function */ | |
590 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
591 | FALSE, /* partial_inplace */ | |
592 | 0x00000fff, /* src_mask */ | |
593 | 0x00000fff, /* dst_mask */ | |
594 | FALSE), /* pcrel_offset */ | |
595 | ||
596 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
597 | 0, /* rightshift */ | |
598 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
599 | 8, /* bitsize */ | |
600 | FALSE, /* pc_relative */ | |
601 | 12, /* bitpos */ | |
602 | complain_overflow_dont,/* complain_on_overflow */ | |
603 | bfd_elf_generic_reloc, /* special_function */ | |
604 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
605 | FALSE, /* partial_inplace */ | |
606 | 0x000ff000, /* src_mask */ | |
607 | 0x000ff000, /* dst_mask */ | |
608 | FALSE), /* pcrel_offset */ | |
609 | ||
610 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
611 | 0, /* rightshift */ | |
612 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
613 | 8, /* bitsize */ | |
614 | FALSE, /* pc_relative */ | |
615 | 20, /* bitpos */ | |
616 | complain_overflow_dont,/* complain_on_overflow */ | |
617 | bfd_elf_generic_reloc, /* special_function */ | |
618 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
619 | FALSE, /* partial_inplace */ | |
620 | 0x0ff00000, /* src_mask */ | |
621 | 0x0ff00000, /* dst_mask */ | |
622 | FALSE), /* pcrel_offset */ | |
623 | ||
624 | HOWTO (R_ARM_TARGET1, /* type */ | |
625 | 0, /* rightshift */ | |
626 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
627 | 32, /* bitsize */ | |
628 | FALSE, /* pc_relative */ | |
629 | 0, /* bitpos */ | |
630 | complain_overflow_dont,/* complain_on_overflow */ | |
631 | bfd_elf_generic_reloc, /* special_function */ | |
632 | "R_ARM_TARGET1", /* name */ | |
633 | FALSE, /* partial_inplace */ | |
634 | 0xffffffff, /* src_mask */ | |
635 | 0xffffffff, /* dst_mask */ | |
636 | FALSE), /* pcrel_offset */ | |
637 | ||
638 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
639 | 0, /* rightshift */ | |
640 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
641 | 32, /* bitsize */ | |
642 | FALSE, /* pc_relative */ | |
643 | 0, /* bitpos */ | |
644 | complain_overflow_dont,/* complain_on_overflow */ | |
645 | bfd_elf_generic_reloc, /* special_function */ | |
646 | "R_ARM_ROSEGREL32", /* name */ | |
647 | FALSE, /* partial_inplace */ | |
648 | 0xffffffff, /* src_mask */ | |
649 | 0xffffffff, /* dst_mask */ | |
650 | FALSE), /* pcrel_offset */ | |
651 | ||
652 | HOWTO (R_ARM_V4BX, /* type */ | |
653 | 0, /* rightshift */ | |
654 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
655 | 32, /* bitsize */ | |
656 | FALSE, /* pc_relative */ | |
657 | 0, /* bitpos */ | |
658 | complain_overflow_dont,/* complain_on_overflow */ | |
659 | bfd_elf_generic_reloc, /* special_function */ | |
660 | "R_ARM_V4BX", /* name */ | |
661 | FALSE, /* partial_inplace */ | |
662 | 0xffffffff, /* src_mask */ | |
663 | 0xffffffff, /* dst_mask */ | |
664 | FALSE), /* pcrel_offset */ | |
665 | ||
666 | HOWTO (R_ARM_TARGET2, /* type */ | |
667 | 0, /* rightshift */ | |
668 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
669 | 32, /* bitsize */ | |
670 | FALSE, /* pc_relative */ | |
671 | 0, /* bitpos */ | |
672 | complain_overflow_signed,/* complain_on_overflow */ | |
673 | bfd_elf_generic_reloc, /* special_function */ | |
674 | "R_ARM_TARGET2", /* name */ | |
675 | FALSE, /* partial_inplace */ | |
676 | 0xffffffff, /* src_mask */ | |
677 | 0xffffffff, /* dst_mask */ | |
678 | TRUE), /* pcrel_offset */ | |
679 | ||
680 | HOWTO (R_ARM_PREL31, /* type */ | |
681 | 0, /* rightshift */ | |
682 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
683 | 31, /* bitsize */ | |
684 | TRUE, /* pc_relative */ | |
685 | 0, /* bitpos */ | |
686 | complain_overflow_signed,/* complain_on_overflow */ | |
687 | bfd_elf_generic_reloc, /* special_function */ | |
688 | "R_ARM_PREL31", /* name */ | |
689 | FALSE, /* partial_inplace */ | |
690 | 0x7fffffff, /* src_mask */ | |
691 | 0x7fffffff, /* dst_mask */ | |
692 | TRUE), /* pcrel_offset */ | |
c19d1205 ZW |
693 | |
694 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
695 | 0, /* rightshift */ | |
696 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
697 | 16, /* bitsize */ | |
698 | FALSE, /* pc_relative */ | |
699 | 0, /* bitpos */ | |
700 | complain_overflow_dont,/* complain_on_overflow */ | |
701 | bfd_elf_generic_reloc, /* special_function */ | |
702 | "R_ARM_MOVW_ABS_NC", /* name */ | |
703 | FALSE, /* partial_inplace */ | |
39623e12 PB |
704 | 0x000f0fff, /* src_mask */ |
705 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
706 | FALSE), /* pcrel_offset */ |
707 | ||
708 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
709 | 0, /* rightshift */ | |
710 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
711 | 16, /* bitsize */ | |
712 | FALSE, /* pc_relative */ | |
713 | 0, /* bitpos */ | |
714 | complain_overflow_bitfield,/* complain_on_overflow */ | |
715 | bfd_elf_generic_reloc, /* special_function */ | |
716 | "R_ARM_MOVT_ABS", /* name */ | |
717 | FALSE, /* partial_inplace */ | |
39623e12 PB |
718 | 0x000f0fff, /* src_mask */ |
719 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
720 | FALSE), /* pcrel_offset */ |
721 | ||
722 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
723 | 0, /* rightshift */ | |
724 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
725 | 16, /* bitsize */ | |
726 | TRUE, /* pc_relative */ | |
727 | 0, /* bitpos */ | |
728 | complain_overflow_dont,/* complain_on_overflow */ | |
729 | bfd_elf_generic_reloc, /* special_function */ | |
730 | "R_ARM_MOVW_PREL_NC", /* name */ | |
731 | FALSE, /* partial_inplace */ | |
39623e12 PB |
732 | 0x000f0fff, /* src_mask */ |
733 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
734 | TRUE), /* pcrel_offset */ |
735 | ||
736 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
737 | 0, /* rightshift */ | |
738 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
739 | 16, /* bitsize */ | |
740 | TRUE, /* pc_relative */ | |
741 | 0, /* bitpos */ | |
742 | complain_overflow_bitfield,/* complain_on_overflow */ | |
743 | bfd_elf_generic_reloc, /* special_function */ | |
744 | "R_ARM_MOVT_PREL", /* name */ | |
745 | FALSE, /* partial_inplace */ | |
39623e12 PB |
746 | 0x000f0fff, /* src_mask */ |
747 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
748 | TRUE), /* pcrel_offset */ |
749 | ||
750 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
751 | 0, /* rightshift */ | |
752 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
753 | 16, /* bitsize */ | |
754 | FALSE, /* pc_relative */ | |
755 | 0, /* bitpos */ | |
756 | complain_overflow_dont,/* complain_on_overflow */ | |
757 | bfd_elf_generic_reloc, /* special_function */ | |
758 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
759 | FALSE, /* partial_inplace */ | |
760 | 0x040f70ff, /* src_mask */ | |
761 | 0x040f70ff, /* dst_mask */ | |
762 | FALSE), /* pcrel_offset */ | |
763 | ||
764 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
765 | 0, /* rightshift */ | |
766 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
767 | 16, /* bitsize */ | |
768 | FALSE, /* pc_relative */ | |
769 | 0, /* bitpos */ | |
770 | complain_overflow_bitfield,/* complain_on_overflow */ | |
771 | bfd_elf_generic_reloc, /* special_function */ | |
772 | "R_ARM_THM_MOVT_ABS", /* name */ | |
773 | FALSE, /* partial_inplace */ | |
774 | 0x040f70ff, /* src_mask */ | |
775 | 0x040f70ff, /* dst_mask */ | |
776 | FALSE), /* pcrel_offset */ | |
777 | ||
778 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
779 | 0, /* rightshift */ | |
780 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
781 | 16, /* bitsize */ | |
782 | TRUE, /* pc_relative */ | |
783 | 0, /* bitpos */ | |
784 | complain_overflow_dont,/* complain_on_overflow */ | |
785 | bfd_elf_generic_reloc, /* special_function */ | |
786 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
787 | FALSE, /* partial_inplace */ | |
788 | 0x040f70ff, /* src_mask */ | |
789 | 0x040f70ff, /* dst_mask */ | |
790 | TRUE), /* pcrel_offset */ | |
791 | ||
792 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
793 | 0, /* rightshift */ | |
794 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
795 | 16, /* bitsize */ | |
796 | TRUE, /* pc_relative */ | |
797 | 0, /* bitpos */ | |
798 | complain_overflow_bitfield,/* complain_on_overflow */ | |
799 | bfd_elf_generic_reloc, /* special_function */ | |
800 | "R_ARM_THM_MOVT_PREL", /* name */ | |
801 | FALSE, /* partial_inplace */ | |
802 | 0x040f70ff, /* src_mask */ | |
803 | 0x040f70ff, /* dst_mask */ | |
804 | TRUE), /* pcrel_offset */ | |
805 | ||
806 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
807 | 1, /* rightshift */ | |
808 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
809 | 19, /* bitsize */ | |
810 | TRUE, /* pc_relative */ | |
811 | 0, /* bitpos */ | |
812 | complain_overflow_signed,/* complain_on_overflow */ | |
813 | bfd_elf_generic_reloc, /* special_function */ | |
814 | "R_ARM_THM_JUMP19", /* name */ | |
815 | FALSE, /* partial_inplace */ | |
816 | 0x043f2fff, /* src_mask */ | |
817 | 0x043f2fff, /* dst_mask */ | |
818 | TRUE), /* pcrel_offset */ | |
819 | ||
820 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
821 | 1, /* rightshift */ | |
822 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
823 | 6, /* bitsize */ | |
824 | TRUE, /* pc_relative */ | |
825 | 0, /* bitpos */ | |
826 | complain_overflow_unsigned,/* complain_on_overflow */ | |
827 | bfd_elf_generic_reloc, /* special_function */ | |
828 | "R_ARM_THM_JUMP6", /* name */ | |
829 | FALSE, /* partial_inplace */ | |
830 | 0x02f8, /* src_mask */ | |
831 | 0x02f8, /* dst_mask */ | |
832 | TRUE), /* pcrel_offset */ | |
833 | ||
834 | /* These are declared as 13-bit signed relocations because we can | |
835 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
836 | versa. */ | |
837 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
838 | 0, /* rightshift */ | |
839 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
840 | 13, /* bitsize */ | |
841 | TRUE, /* pc_relative */ | |
842 | 0, /* bitpos */ | |
2cab6cc3 | 843 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
844 | bfd_elf_generic_reloc, /* special_function */ |
845 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
846 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
847 | 0xffffffff, /* src_mask */ |
848 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
849 | TRUE), /* pcrel_offset */ |
850 | ||
851 | HOWTO (R_ARM_THM_PC12, /* type */ | |
852 | 0, /* rightshift */ | |
853 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
854 | 13, /* bitsize */ | |
855 | TRUE, /* pc_relative */ | |
856 | 0, /* bitpos */ | |
2cab6cc3 | 857 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
858 | bfd_elf_generic_reloc, /* special_function */ |
859 | "R_ARM_THM_PC12", /* name */ | |
860 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
861 | 0xffffffff, /* src_mask */ |
862 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
863 | TRUE), /* pcrel_offset */ |
864 | ||
865 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
866 | 0, /* rightshift */ | |
867 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
868 | 32, /* bitsize */ | |
869 | FALSE, /* pc_relative */ | |
870 | 0, /* bitpos */ | |
871 | complain_overflow_dont,/* complain_on_overflow */ | |
872 | bfd_elf_generic_reloc, /* special_function */ | |
873 | "R_ARM_ABS32_NOI", /* name */ | |
874 | FALSE, /* partial_inplace */ | |
875 | 0xffffffff, /* src_mask */ | |
876 | 0xffffffff, /* dst_mask */ | |
877 | FALSE), /* pcrel_offset */ | |
878 | ||
879 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
880 | 0, /* rightshift */ | |
881 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
882 | 32, /* bitsize */ | |
883 | TRUE, /* pc_relative */ | |
884 | 0, /* bitpos */ | |
885 | complain_overflow_dont,/* complain_on_overflow */ | |
886 | bfd_elf_generic_reloc, /* special_function */ | |
887 | "R_ARM_REL32_NOI", /* name */ | |
888 | FALSE, /* partial_inplace */ | |
889 | 0xffffffff, /* src_mask */ | |
890 | 0xffffffff, /* dst_mask */ | |
891 | FALSE), /* pcrel_offset */ | |
7f266840 | 892 | |
4962c51a MS |
893 | /* Group relocations. */ |
894 | ||
895 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
896 | 0, /* rightshift */ | |
897 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
898 | 32, /* bitsize */ | |
899 | TRUE, /* pc_relative */ | |
900 | 0, /* bitpos */ | |
901 | complain_overflow_dont,/* complain_on_overflow */ | |
902 | bfd_elf_generic_reloc, /* special_function */ | |
903 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
904 | FALSE, /* partial_inplace */ | |
905 | 0xffffffff, /* src_mask */ | |
906 | 0xffffffff, /* dst_mask */ | |
907 | TRUE), /* pcrel_offset */ | |
908 | ||
909 | HOWTO (R_ARM_ALU_PC_G0, /* type */ | |
910 | 0, /* rightshift */ | |
911 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
912 | 32, /* bitsize */ | |
913 | TRUE, /* pc_relative */ | |
914 | 0, /* bitpos */ | |
915 | complain_overflow_dont,/* complain_on_overflow */ | |
916 | bfd_elf_generic_reloc, /* special_function */ | |
917 | "R_ARM_ALU_PC_G0", /* name */ | |
918 | FALSE, /* partial_inplace */ | |
919 | 0xffffffff, /* src_mask */ | |
920 | 0xffffffff, /* dst_mask */ | |
921 | TRUE), /* pcrel_offset */ | |
922 | ||
923 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
924 | 0, /* rightshift */ | |
925 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
926 | 32, /* bitsize */ | |
927 | TRUE, /* pc_relative */ | |
928 | 0, /* bitpos */ | |
929 | complain_overflow_dont,/* complain_on_overflow */ | |
930 | bfd_elf_generic_reloc, /* special_function */ | |
931 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
932 | FALSE, /* partial_inplace */ | |
933 | 0xffffffff, /* src_mask */ | |
934 | 0xffffffff, /* dst_mask */ | |
935 | TRUE), /* pcrel_offset */ | |
936 | ||
937 | HOWTO (R_ARM_ALU_PC_G1, /* type */ | |
938 | 0, /* rightshift */ | |
939 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
940 | 32, /* bitsize */ | |
941 | TRUE, /* pc_relative */ | |
942 | 0, /* bitpos */ | |
943 | complain_overflow_dont,/* complain_on_overflow */ | |
944 | bfd_elf_generic_reloc, /* special_function */ | |
945 | "R_ARM_ALU_PC_G1", /* name */ | |
946 | FALSE, /* partial_inplace */ | |
947 | 0xffffffff, /* src_mask */ | |
948 | 0xffffffff, /* dst_mask */ | |
949 | TRUE), /* pcrel_offset */ | |
950 | ||
951 | HOWTO (R_ARM_ALU_PC_G2, /* type */ | |
952 | 0, /* rightshift */ | |
953 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
954 | 32, /* bitsize */ | |
955 | TRUE, /* pc_relative */ | |
956 | 0, /* bitpos */ | |
957 | complain_overflow_dont,/* complain_on_overflow */ | |
958 | bfd_elf_generic_reloc, /* special_function */ | |
959 | "R_ARM_ALU_PC_G2", /* name */ | |
960 | FALSE, /* partial_inplace */ | |
961 | 0xffffffff, /* src_mask */ | |
962 | 0xffffffff, /* dst_mask */ | |
963 | TRUE), /* pcrel_offset */ | |
964 | ||
965 | HOWTO (R_ARM_LDR_PC_G1, /* type */ | |
966 | 0, /* rightshift */ | |
967 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
968 | 32, /* bitsize */ | |
969 | TRUE, /* pc_relative */ | |
970 | 0, /* bitpos */ | |
971 | complain_overflow_dont,/* complain_on_overflow */ | |
972 | bfd_elf_generic_reloc, /* special_function */ | |
973 | "R_ARM_LDR_PC_G1", /* name */ | |
974 | FALSE, /* partial_inplace */ | |
975 | 0xffffffff, /* src_mask */ | |
976 | 0xffffffff, /* dst_mask */ | |
977 | TRUE), /* pcrel_offset */ | |
978 | ||
979 | HOWTO (R_ARM_LDR_PC_G2, /* type */ | |
980 | 0, /* rightshift */ | |
981 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
982 | 32, /* bitsize */ | |
983 | TRUE, /* pc_relative */ | |
984 | 0, /* bitpos */ | |
985 | complain_overflow_dont,/* complain_on_overflow */ | |
986 | bfd_elf_generic_reloc, /* special_function */ | |
987 | "R_ARM_LDR_PC_G2", /* name */ | |
988 | FALSE, /* partial_inplace */ | |
989 | 0xffffffff, /* src_mask */ | |
990 | 0xffffffff, /* dst_mask */ | |
991 | TRUE), /* pcrel_offset */ | |
992 | ||
993 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ | |
994 | 0, /* rightshift */ | |
995 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
996 | 32, /* bitsize */ | |
997 | TRUE, /* pc_relative */ | |
998 | 0, /* bitpos */ | |
999 | complain_overflow_dont,/* complain_on_overflow */ | |
1000 | bfd_elf_generic_reloc, /* special_function */ | |
1001 | "R_ARM_LDRS_PC_G0", /* name */ | |
1002 | FALSE, /* partial_inplace */ | |
1003 | 0xffffffff, /* src_mask */ | |
1004 | 0xffffffff, /* dst_mask */ | |
1005 | TRUE), /* pcrel_offset */ | |
1006 | ||
1007 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ | |
1008 | 0, /* rightshift */ | |
1009 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1010 | 32, /* bitsize */ | |
1011 | TRUE, /* pc_relative */ | |
1012 | 0, /* bitpos */ | |
1013 | complain_overflow_dont,/* complain_on_overflow */ | |
1014 | bfd_elf_generic_reloc, /* special_function */ | |
1015 | "R_ARM_LDRS_PC_G1", /* name */ | |
1016 | FALSE, /* partial_inplace */ | |
1017 | 0xffffffff, /* src_mask */ | |
1018 | 0xffffffff, /* dst_mask */ | |
1019 | TRUE), /* pcrel_offset */ | |
1020 | ||
1021 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ | |
1022 | 0, /* rightshift */ | |
1023 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1024 | 32, /* bitsize */ | |
1025 | TRUE, /* pc_relative */ | |
1026 | 0, /* bitpos */ | |
1027 | complain_overflow_dont,/* complain_on_overflow */ | |
1028 | bfd_elf_generic_reloc, /* special_function */ | |
1029 | "R_ARM_LDRS_PC_G2", /* name */ | |
1030 | FALSE, /* partial_inplace */ | |
1031 | 0xffffffff, /* src_mask */ | |
1032 | 0xffffffff, /* dst_mask */ | |
1033 | TRUE), /* pcrel_offset */ | |
1034 | ||
1035 | HOWTO (R_ARM_LDC_PC_G0, /* type */ | |
1036 | 0, /* rightshift */ | |
1037 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1038 | 32, /* bitsize */ | |
1039 | TRUE, /* pc_relative */ | |
1040 | 0, /* bitpos */ | |
1041 | complain_overflow_dont,/* complain_on_overflow */ | |
1042 | bfd_elf_generic_reloc, /* special_function */ | |
1043 | "R_ARM_LDC_PC_G0", /* name */ | |
1044 | FALSE, /* partial_inplace */ | |
1045 | 0xffffffff, /* src_mask */ | |
1046 | 0xffffffff, /* dst_mask */ | |
1047 | TRUE), /* pcrel_offset */ | |
1048 | ||
1049 | HOWTO (R_ARM_LDC_PC_G1, /* type */ | |
1050 | 0, /* rightshift */ | |
1051 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1052 | 32, /* bitsize */ | |
1053 | TRUE, /* pc_relative */ | |
1054 | 0, /* bitpos */ | |
1055 | complain_overflow_dont,/* complain_on_overflow */ | |
1056 | bfd_elf_generic_reloc, /* special_function */ | |
1057 | "R_ARM_LDC_PC_G1", /* name */ | |
1058 | FALSE, /* partial_inplace */ | |
1059 | 0xffffffff, /* src_mask */ | |
1060 | 0xffffffff, /* dst_mask */ | |
1061 | TRUE), /* pcrel_offset */ | |
1062 | ||
1063 | HOWTO (R_ARM_LDC_PC_G2, /* type */ | |
1064 | 0, /* rightshift */ | |
1065 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1066 | 32, /* bitsize */ | |
1067 | TRUE, /* pc_relative */ | |
1068 | 0, /* bitpos */ | |
1069 | complain_overflow_dont,/* complain_on_overflow */ | |
1070 | bfd_elf_generic_reloc, /* special_function */ | |
1071 | "R_ARM_LDC_PC_G2", /* name */ | |
1072 | FALSE, /* partial_inplace */ | |
1073 | 0xffffffff, /* src_mask */ | |
1074 | 0xffffffff, /* dst_mask */ | |
1075 | TRUE), /* pcrel_offset */ | |
1076 | ||
1077 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ | |
1078 | 0, /* rightshift */ | |
1079 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1080 | 32, /* bitsize */ | |
1081 | TRUE, /* pc_relative */ | |
1082 | 0, /* bitpos */ | |
1083 | complain_overflow_dont,/* complain_on_overflow */ | |
1084 | bfd_elf_generic_reloc, /* special_function */ | |
1085 | "R_ARM_ALU_SB_G0_NC", /* name */ | |
1086 | FALSE, /* partial_inplace */ | |
1087 | 0xffffffff, /* src_mask */ | |
1088 | 0xffffffff, /* dst_mask */ | |
1089 | TRUE), /* pcrel_offset */ | |
1090 | ||
1091 | HOWTO (R_ARM_ALU_SB_G0, /* type */ | |
1092 | 0, /* rightshift */ | |
1093 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1094 | 32, /* bitsize */ | |
1095 | TRUE, /* pc_relative */ | |
1096 | 0, /* bitpos */ | |
1097 | complain_overflow_dont,/* complain_on_overflow */ | |
1098 | bfd_elf_generic_reloc, /* special_function */ | |
1099 | "R_ARM_ALU_SB_G0", /* name */ | |
1100 | FALSE, /* partial_inplace */ | |
1101 | 0xffffffff, /* src_mask */ | |
1102 | 0xffffffff, /* dst_mask */ | |
1103 | TRUE), /* pcrel_offset */ | |
1104 | ||
1105 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ | |
1106 | 0, /* rightshift */ | |
1107 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1108 | 32, /* bitsize */ | |
1109 | TRUE, /* pc_relative */ | |
1110 | 0, /* bitpos */ | |
1111 | complain_overflow_dont,/* complain_on_overflow */ | |
1112 | bfd_elf_generic_reloc, /* special_function */ | |
1113 | "R_ARM_ALU_SB_G1_NC", /* name */ | |
1114 | FALSE, /* partial_inplace */ | |
1115 | 0xffffffff, /* src_mask */ | |
1116 | 0xffffffff, /* dst_mask */ | |
1117 | TRUE), /* pcrel_offset */ | |
1118 | ||
1119 | HOWTO (R_ARM_ALU_SB_G1, /* type */ | |
1120 | 0, /* rightshift */ | |
1121 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1122 | 32, /* bitsize */ | |
1123 | TRUE, /* pc_relative */ | |
1124 | 0, /* bitpos */ | |
1125 | complain_overflow_dont,/* complain_on_overflow */ | |
1126 | bfd_elf_generic_reloc, /* special_function */ | |
1127 | "R_ARM_ALU_SB_G1", /* name */ | |
1128 | FALSE, /* partial_inplace */ | |
1129 | 0xffffffff, /* src_mask */ | |
1130 | 0xffffffff, /* dst_mask */ | |
1131 | TRUE), /* pcrel_offset */ | |
1132 | ||
1133 | HOWTO (R_ARM_ALU_SB_G2, /* type */ | |
1134 | 0, /* rightshift */ | |
1135 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1136 | 32, /* bitsize */ | |
1137 | TRUE, /* pc_relative */ | |
1138 | 0, /* bitpos */ | |
1139 | complain_overflow_dont,/* complain_on_overflow */ | |
1140 | bfd_elf_generic_reloc, /* special_function */ | |
1141 | "R_ARM_ALU_SB_G2", /* name */ | |
1142 | FALSE, /* partial_inplace */ | |
1143 | 0xffffffff, /* src_mask */ | |
1144 | 0xffffffff, /* dst_mask */ | |
1145 | TRUE), /* pcrel_offset */ | |
1146 | ||
1147 | HOWTO (R_ARM_LDR_SB_G0, /* type */ | |
1148 | 0, /* rightshift */ | |
1149 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1150 | 32, /* bitsize */ | |
1151 | TRUE, /* pc_relative */ | |
1152 | 0, /* bitpos */ | |
1153 | complain_overflow_dont,/* complain_on_overflow */ | |
1154 | bfd_elf_generic_reloc, /* special_function */ | |
1155 | "R_ARM_LDR_SB_G0", /* name */ | |
1156 | FALSE, /* partial_inplace */ | |
1157 | 0xffffffff, /* src_mask */ | |
1158 | 0xffffffff, /* dst_mask */ | |
1159 | TRUE), /* pcrel_offset */ | |
1160 | ||
1161 | HOWTO (R_ARM_LDR_SB_G1, /* type */ | |
1162 | 0, /* rightshift */ | |
1163 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1164 | 32, /* bitsize */ | |
1165 | TRUE, /* pc_relative */ | |
1166 | 0, /* bitpos */ | |
1167 | complain_overflow_dont,/* complain_on_overflow */ | |
1168 | bfd_elf_generic_reloc, /* special_function */ | |
1169 | "R_ARM_LDR_SB_G1", /* name */ | |
1170 | FALSE, /* partial_inplace */ | |
1171 | 0xffffffff, /* src_mask */ | |
1172 | 0xffffffff, /* dst_mask */ | |
1173 | TRUE), /* pcrel_offset */ | |
1174 | ||
1175 | HOWTO (R_ARM_LDR_SB_G2, /* type */ | |
1176 | 0, /* rightshift */ | |
1177 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1178 | 32, /* bitsize */ | |
1179 | TRUE, /* pc_relative */ | |
1180 | 0, /* bitpos */ | |
1181 | complain_overflow_dont,/* complain_on_overflow */ | |
1182 | bfd_elf_generic_reloc, /* special_function */ | |
1183 | "R_ARM_LDR_SB_G2", /* name */ | |
1184 | FALSE, /* partial_inplace */ | |
1185 | 0xffffffff, /* src_mask */ | |
1186 | 0xffffffff, /* dst_mask */ | |
1187 | TRUE), /* pcrel_offset */ | |
1188 | ||
1189 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ | |
1190 | 0, /* rightshift */ | |
1191 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1192 | 32, /* bitsize */ | |
1193 | TRUE, /* pc_relative */ | |
1194 | 0, /* bitpos */ | |
1195 | complain_overflow_dont,/* complain_on_overflow */ | |
1196 | bfd_elf_generic_reloc, /* special_function */ | |
1197 | "R_ARM_LDRS_SB_G0", /* name */ | |
1198 | FALSE, /* partial_inplace */ | |
1199 | 0xffffffff, /* src_mask */ | |
1200 | 0xffffffff, /* dst_mask */ | |
1201 | TRUE), /* pcrel_offset */ | |
1202 | ||
1203 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ | |
1204 | 0, /* rightshift */ | |
1205 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1206 | 32, /* bitsize */ | |
1207 | TRUE, /* pc_relative */ | |
1208 | 0, /* bitpos */ | |
1209 | complain_overflow_dont,/* complain_on_overflow */ | |
1210 | bfd_elf_generic_reloc, /* special_function */ | |
1211 | "R_ARM_LDRS_SB_G1", /* name */ | |
1212 | FALSE, /* partial_inplace */ | |
1213 | 0xffffffff, /* src_mask */ | |
1214 | 0xffffffff, /* dst_mask */ | |
1215 | TRUE), /* pcrel_offset */ | |
1216 | ||
1217 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ | |
1218 | 0, /* rightshift */ | |
1219 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1220 | 32, /* bitsize */ | |
1221 | TRUE, /* pc_relative */ | |
1222 | 0, /* bitpos */ | |
1223 | complain_overflow_dont,/* complain_on_overflow */ | |
1224 | bfd_elf_generic_reloc, /* special_function */ | |
1225 | "R_ARM_LDRS_SB_G2", /* name */ | |
1226 | FALSE, /* partial_inplace */ | |
1227 | 0xffffffff, /* src_mask */ | |
1228 | 0xffffffff, /* dst_mask */ | |
1229 | TRUE), /* pcrel_offset */ | |
1230 | ||
1231 | HOWTO (R_ARM_LDC_SB_G0, /* type */ | |
1232 | 0, /* rightshift */ | |
1233 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1234 | 32, /* bitsize */ | |
1235 | TRUE, /* pc_relative */ | |
1236 | 0, /* bitpos */ | |
1237 | complain_overflow_dont,/* complain_on_overflow */ | |
1238 | bfd_elf_generic_reloc, /* special_function */ | |
1239 | "R_ARM_LDC_SB_G0", /* name */ | |
1240 | FALSE, /* partial_inplace */ | |
1241 | 0xffffffff, /* src_mask */ | |
1242 | 0xffffffff, /* dst_mask */ | |
1243 | TRUE), /* pcrel_offset */ | |
1244 | ||
1245 | HOWTO (R_ARM_LDC_SB_G1, /* type */ | |
1246 | 0, /* rightshift */ | |
1247 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1248 | 32, /* bitsize */ | |
1249 | TRUE, /* pc_relative */ | |
1250 | 0, /* bitpos */ | |
1251 | complain_overflow_dont,/* complain_on_overflow */ | |
1252 | bfd_elf_generic_reloc, /* special_function */ | |
1253 | "R_ARM_LDC_SB_G1", /* name */ | |
1254 | FALSE, /* partial_inplace */ | |
1255 | 0xffffffff, /* src_mask */ | |
1256 | 0xffffffff, /* dst_mask */ | |
1257 | TRUE), /* pcrel_offset */ | |
1258 | ||
1259 | HOWTO (R_ARM_LDC_SB_G2, /* type */ | |
1260 | 0, /* rightshift */ | |
1261 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1262 | 32, /* bitsize */ | |
1263 | TRUE, /* pc_relative */ | |
1264 | 0, /* bitpos */ | |
1265 | complain_overflow_dont,/* complain_on_overflow */ | |
1266 | bfd_elf_generic_reloc, /* special_function */ | |
1267 | "R_ARM_LDC_SB_G2", /* name */ | |
1268 | FALSE, /* partial_inplace */ | |
1269 | 0xffffffff, /* src_mask */ | |
1270 | 0xffffffff, /* dst_mask */ | |
1271 | TRUE), /* pcrel_offset */ | |
1272 | ||
1273 | /* End of group relocations. */ | |
c19d1205 | 1274 | |
c19d1205 ZW |
1275 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1276 | 0, /* rightshift */ | |
1277 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1278 | 16, /* bitsize */ | |
1279 | FALSE, /* pc_relative */ | |
1280 | 0, /* bitpos */ | |
1281 | complain_overflow_dont,/* complain_on_overflow */ | |
1282 | bfd_elf_generic_reloc, /* special_function */ | |
1283 | "R_ARM_MOVW_BREL_NC", /* name */ | |
1284 | FALSE, /* partial_inplace */ | |
1285 | 0x0000ffff, /* src_mask */ | |
1286 | 0x0000ffff, /* dst_mask */ | |
1287 | FALSE), /* pcrel_offset */ | |
1288 | ||
1289 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1290 | 0, /* rightshift */ | |
1291 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1292 | 16, /* bitsize */ | |
1293 | FALSE, /* pc_relative */ | |
1294 | 0, /* bitpos */ | |
1295 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1296 | bfd_elf_generic_reloc, /* special_function */ | |
1297 | "R_ARM_MOVT_BREL", /* name */ | |
1298 | FALSE, /* partial_inplace */ | |
1299 | 0x0000ffff, /* src_mask */ | |
1300 | 0x0000ffff, /* dst_mask */ | |
1301 | FALSE), /* pcrel_offset */ | |
1302 | ||
1303 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1304 | 0, /* rightshift */ | |
1305 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1306 | 16, /* bitsize */ | |
1307 | FALSE, /* pc_relative */ | |
1308 | 0, /* bitpos */ | |
1309 | complain_overflow_dont,/* complain_on_overflow */ | |
1310 | bfd_elf_generic_reloc, /* special_function */ | |
1311 | "R_ARM_MOVW_BREL", /* name */ | |
1312 | FALSE, /* partial_inplace */ | |
1313 | 0x0000ffff, /* src_mask */ | |
1314 | 0x0000ffff, /* dst_mask */ | |
1315 | FALSE), /* pcrel_offset */ | |
1316 | ||
1317 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1318 | 0, /* rightshift */ | |
1319 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1320 | 16, /* bitsize */ | |
1321 | FALSE, /* pc_relative */ | |
1322 | 0, /* bitpos */ | |
1323 | complain_overflow_dont,/* complain_on_overflow */ | |
1324 | bfd_elf_generic_reloc, /* special_function */ | |
1325 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
1326 | FALSE, /* partial_inplace */ | |
1327 | 0x040f70ff, /* src_mask */ | |
1328 | 0x040f70ff, /* dst_mask */ | |
1329 | FALSE), /* pcrel_offset */ | |
1330 | ||
1331 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1332 | 0, /* rightshift */ | |
1333 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1334 | 16, /* bitsize */ | |
1335 | FALSE, /* pc_relative */ | |
1336 | 0, /* bitpos */ | |
1337 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1338 | bfd_elf_generic_reloc, /* special_function */ | |
1339 | "R_ARM_THM_MOVT_BREL", /* name */ | |
1340 | FALSE, /* partial_inplace */ | |
1341 | 0x040f70ff, /* src_mask */ | |
1342 | 0x040f70ff, /* dst_mask */ | |
1343 | FALSE), /* pcrel_offset */ | |
1344 | ||
1345 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1346 | 0, /* rightshift */ | |
1347 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1348 | 16, /* bitsize */ | |
1349 | FALSE, /* pc_relative */ | |
1350 | 0, /* bitpos */ | |
1351 | complain_overflow_dont,/* complain_on_overflow */ | |
1352 | bfd_elf_generic_reloc, /* special_function */ | |
1353 | "R_ARM_THM_MOVW_BREL", /* name */ | |
1354 | FALSE, /* partial_inplace */ | |
1355 | 0x040f70ff, /* src_mask */ | |
1356 | 0x040f70ff, /* dst_mask */ | |
1357 | FALSE), /* pcrel_offset */ | |
1358 | ||
0855e32b NS |
1359 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
1360 | 0, /* rightshift */ | |
1361 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1362 | 32, /* bitsize */ | |
1363 | FALSE, /* pc_relative */ | |
1364 | 0, /* bitpos */ | |
1365 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1366 | NULL, /* special_function */ | |
1367 | "R_ARM_TLS_GOTDESC", /* name */ | |
1368 | TRUE, /* partial_inplace */ | |
1369 | 0xffffffff, /* src_mask */ | |
1370 | 0xffffffff, /* dst_mask */ | |
1371 | FALSE), /* pcrel_offset */ | |
1372 | ||
1373 | HOWTO (R_ARM_TLS_CALL, /* type */ | |
1374 | 0, /* rightshift */ | |
1375 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1376 | 24, /* bitsize */ | |
1377 | FALSE, /* pc_relative */ | |
1378 | 0, /* bitpos */ | |
1379 | complain_overflow_dont,/* complain_on_overflow */ | |
1380 | bfd_elf_generic_reloc, /* special_function */ | |
1381 | "R_ARM_TLS_CALL", /* name */ | |
1382 | FALSE, /* partial_inplace */ | |
1383 | 0x00ffffff, /* src_mask */ | |
1384 | 0x00ffffff, /* dst_mask */ | |
1385 | FALSE), /* pcrel_offset */ | |
1386 | ||
1387 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ | |
1388 | 0, /* rightshift */ | |
1389 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1390 | 0, /* bitsize */ | |
1391 | FALSE, /* pc_relative */ | |
1392 | 0, /* bitpos */ | |
1393 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1394 | bfd_elf_generic_reloc, /* special_function */ | |
1395 | "R_ARM_TLS_DESCSEQ", /* name */ | |
1396 | FALSE, /* partial_inplace */ | |
1397 | 0x00000000, /* src_mask */ | |
1398 | 0x00000000, /* dst_mask */ | |
1399 | FALSE), /* pcrel_offset */ | |
1400 | ||
1401 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ | |
1402 | 0, /* rightshift */ | |
1403 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1404 | 24, /* bitsize */ | |
1405 | FALSE, /* pc_relative */ | |
1406 | 0, /* bitpos */ | |
1407 | complain_overflow_dont,/* complain_on_overflow */ | |
1408 | bfd_elf_generic_reloc, /* special_function */ | |
1409 | "R_ARM_THM_TLS_CALL", /* name */ | |
1410 | FALSE, /* partial_inplace */ | |
1411 | 0x07ff07ff, /* src_mask */ | |
1412 | 0x07ff07ff, /* dst_mask */ | |
1413 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1414 | |
1415 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1416 | 0, /* rightshift */ | |
1417 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1418 | 32, /* bitsize */ | |
1419 | FALSE, /* pc_relative */ | |
1420 | 0, /* bitpos */ | |
1421 | complain_overflow_dont,/* complain_on_overflow */ | |
1422 | bfd_elf_generic_reloc, /* special_function */ | |
1423 | "R_ARM_PLT32_ABS", /* name */ | |
1424 | FALSE, /* partial_inplace */ | |
1425 | 0xffffffff, /* src_mask */ | |
1426 | 0xffffffff, /* dst_mask */ | |
1427 | FALSE), /* pcrel_offset */ | |
1428 | ||
1429 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1430 | 0, /* rightshift */ | |
1431 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1432 | 32, /* bitsize */ | |
1433 | FALSE, /* pc_relative */ | |
1434 | 0, /* bitpos */ | |
1435 | complain_overflow_dont,/* complain_on_overflow */ | |
1436 | bfd_elf_generic_reloc, /* special_function */ | |
1437 | "R_ARM_GOT_ABS", /* name */ | |
1438 | FALSE, /* partial_inplace */ | |
1439 | 0xffffffff, /* src_mask */ | |
1440 | 0xffffffff, /* dst_mask */ | |
1441 | FALSE), /* pcrel_offset */ | |
1442 | ||
1443 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1444 | 0, /* rightshift */ | |
1445 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1446 | 32, /* bitsize */ | |
1447 | TRUE, /* pc_relative */ | |
1448 | 0, /* bitpos */ | |
1449 | complain_overflow_dont, /* complain_on_overflow */ | |
1450 | bfd_elf_generic_reloc, /* special_function */ | |
1451 | "R_ARM_GOT_PREL", /* name */ | |
1452 | FALSE, /* partial_inplace */ | |
1453 | 0xffffffff, /* src_mask */ | |
1454 | 0xffffffff, /* dst_mask */ | |
1455 | TRUE), /* pcrel_offset */ | |
1456 | ||
1457 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1458 | 0, /* rightshift */ | |
1459 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1460 | 12, /* bitsize */ | |
1461 | FALSE, /* pc_relative */ | |
1462 | 0, /* bitpos */ | |
1463 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1464 | bfd_elf_generic_reloc, /* special_function */ | |
1465 | "R_ARM_GOT_BREL12", /* name */ | |
1466 | FALSE, /* partial_inplace */ | |
1467 | 0x00000fff, /* src_mask */ | |
1468 | 0x00000fff, /* dst_mask */ | |
1469 | FALSE), /* pcrel_offset */ | |
1470 | ||
1471 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1472 | 0, /* rightshift */ | |
1473 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1474 | 12, /* bitsize */ | |
1475 | FALSE, /* pc_relative */ | |
1476 | 0, /* bitpos */ | |
1477 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1478 | bfd_elf_generic_reloc, /* special_function */ | |
1479 | "R_ARM_GOTOFF12", /* name */ | |
1480 | FALSE, /* partial_inplace */ | |
1481 | 0x00000fff, /* src_mask */ | |
1482 | 0x00000fff, /* dst_mask */ | |
1483 | FALSE), /* pcrel_offset */ | |
1484 | ||
1485 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ | |
1486 | ||
1487 | /* GNU extension to record C++ vtable member usage */ | |
1488 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ | |
99059e56 RM |
1489 | 0, /* rightshift */ |
1490 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1491 | 0, /* bitsize */ | |
1492 | FALSE, /* pc_relative */ | |
1493 | 0, /* bitpos */ | |
1494 | complain_overflow_dont, /* complain_on_overflow */ | |
1495 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
1496 | "R_ARM_GNU_VTENTRY", /* name */ | |
1497 | FALSE, /* partial_inplace */ | |
1498 | 0, /* src_mask */ | |
1499 | 0, /* dst_mask */ | |
1500 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1501 | |
1502 | /* GNU extension to record C++ vtable hierarchy */ | |
1503 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
99059e56 RM |
1504 | 0, /* rightshift */ |
1505 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1506 | 0, /* bitsize */ | |
1507 | FALSE, /* pc_relative */ | |
1508 | 0, /* bitpos */ | |
1509 | complain_overflow_dont, /* complain_on_overflow */ | |
1510 | NULL, /* special_function */ | |
1511 | "R_ARM_GNU_VTINHERIT", /* name */ | |
1512 | FALSE, /* partial_inplace */ | |
1513 | 0, /* src_mask */ | |
1514 | 0, /* dst_mask */ | |
1515 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1516 | |
1517 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1518 | 1, /* rightshift */ | |
1519 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1520 | 11, /* bitsize */ | |
1521 | TRUE, /* pc_relative */ | |
1522 | 0, /* bitpos */ | |
1523 | complain_overflow_signed, /* complain_on_overflow */ | |
1524 | bfd_elf_generic_reloc, /* special_function */ | |
1525 | "R_ARM_THM_JUMP11", /* name */ | |
1526 | FALSE, /* partial_inplace */ | |
1527 | 0x000007ff, /* src_mask */ | |
1528 | 0x000007ff, /* dst_mask */ | |
1529 | TRUE), /* pcrel_offset */ | |
1530 | ||
1531 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1532 | 1, /* rightshift */ | |
1533 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1534 | 8, /* bitsize */ | |
1535 | TRUE, /* pc_relative */ | |
1536 | 0, /* bitpos */ | |
1537 | complain_overflow_signed, /* complain_on_overflow */ | |
1538 | bfd_elf_generic_reloc, /* special_function */ | |
1539 | "R_ARM_THM_JUMP8", /* name */ | |
1540 | FALSE, /* partial_inplace */ | |
1541 | 0x000000ff, /* src_mask */ | |
1542 | 0x000000ff, /* dst_mask */ | |
1543 | TRUE), /* pcrel_offset */ | |
ba93b8ac | 1544 | |
c19d1205 ZW |
1545 | /* TLS relocations */ |
1546 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
99059e56 RM |
1547 | 0, /* rightshift */ |
1548 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1549 | 32, /* bitsize */ | |
1550 | FALSE, /* pc_relative */ | |
1551 | 0, /* bitpos */ | |
1552 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1553 | NULL, /* special_function */ | |
1554 | "R_ARM_TLS_GD32", /* name */ | |
1555 | TRUE, /* partial_inplace */ | |
1556 | 0xffffffff, /* src_mask */ | |
1557 | 0xffffffff, /* dst_mask */ | |
1558 | FALSE), /* pcrel_offset */ | |
ba93b8ac | 1559 | |
ba93b8ac | 1560 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
99059e56 RM |
1561 | 0, /* rightshift */ |
1562 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1563 | 32, /* bitsize */ | |
1564 | FALSE, /* pc_relative */ | |
1565 | 0, /* bitpos */ | |
1566 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1567 | bfd_elf_generic_reloc, /* special_function */ | |
1568 | "R_ARM_TLS_LDM32", /* name */ | |
1569 | TRUE, /* partial_inplace */ | |
1570 | 0xffffffff, /* src_mask */ | |
1571 | 0xffffffff, /* dst_mask */ | |
1572 | FALSE), /* pcrel_offset */ | |
ba93b8ac | 1573 | |
c19d1205 | 1574 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
99059e56 RM |
1575 | 0, /* rightshift */ |
1576 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1577 | 32, /* bitsize */ | |
1578 | FALSE, /* pc_relative */ | |
1579 | 0, /* bitpos */ | |
1580 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1581 | bfd_elf_generic_reloc, /* special_function */ | |
1582 | "R_ARM_TLS_LDO32", /* name */ | |
1583 | TRUE, /* partial_inplace */ | |
1584 | 0xffffffff, /* src_mask */ | |
1585 | 0xffffffff, /* dst_mask */ | |
1586 | FALSE), /* pcrel_offset */ | |
ba93b8ac | 1587 | |
ba93b8ac | 1588 | HOWTO (R_ARM_TLS_IE32, /* type */ |
99059e56 RM |
1589 | 0, /* rightshift */ |
1590 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1591 | 32, /* bitsize */ | |
1592 | FALSE, /* pc_relative */ | |
1593 | 0, /* bitpos */ | |
1594 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1595 | NULL, /* special_function */ | |
1596 | "R_ARM_TLS_IE32", /* name */ | |
1597 | TRUE, /* partial_inplace */ | |
1598 | 0xffffffff, /* src_mask */ | |
1599 | 0xffffffff, /* dst_mask */ | |
1600 | FALSE), /* pcrel_offset */ | |
7f266840 | 1601 | |
c19d1205 | 1602 | HOWTO (R_ARM_TLS_LE32, /* type */ |
99059e56 RM |
1603 | 0, /* rightshift */ |
1604 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1605 | 32, /* bitsize */ | |
1606 | FALSE, /* pc_relative */ | |
1607 | 0, /* bitpos */ | |
1608 | complain_overflow_bitfield,/* complain_on_overflow */ | |
75c11999 | 1609 | NULL, /* special_function */ |
99059e56 RM |
1610 | "R_ARM_TLS_LE32", /* name */ |
1611 | TRUE, /* partial_inplace */ | |
1612 | 0xffffffff, /* src_mask */ | |
1613 | 0xffffffff, /* dst_mask */ | |
1614 | FALSE), /* pcrel_offset */ | |
7f266840 | 1615 | |
c19d1205 ZW |
1616 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1617 | 0, /* rightshift */ | |
1618 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1619 | 12, /* bitsize */ | |
1620 | FALSE, /* pc_relative */ | |
7f266840 | 1621 | 0, /* bitpos */ |
c19d1205 | 1622 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1623 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1624 | "R_ARM_TLS_LDO12", /* name */ |
7f266840 | 1625 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1626 | 0x00000fff, /* src_mask */ |
1627 | 0x00000fff, /* dst_mask */ | |
1628 | FALSE), /* pcrel_offset */ | |
7f266840 | 1629 | |
c19d1205 ZW |
1630 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1631 | 0, /* rightshift */ | |
1632 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1633 | 12, /* bitsize */ | |
1634 | FALSE, /* pc_relative */ | |
7f266840 | 1635 | 0, /* bitpos */ |
c19d1205 | 1636 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1637 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1638 | "R_ARM_TLS_LE12", /* name */ |
7f266840 | 1639 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1640 | 0x00000fff, /* src_mask */ |
1641 | 0x00000fff, /* dst_mask */ | |
1642 | FALSE), /* pcrel_offset */ | |
7f266840 | 1643 | |
c19d1205 | 1644 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 DJ |
1645 | 0, /* rightshift */ |
1646 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
1647 | 12, /* bitsize */ |
1648 | FALSE, /* pc_relative */ | |
7f266840 | 1649 | 0, /* bitpos */ |
c19d1205 | 1650 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1651 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1652 | "R_ARM_TLS_IE12GP", /* name */ |
7f266840 | 1653 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1654 | 0x00000fff, /* src_mask */ |
1655 | 0x00000fff, /* dst_mask */ | |
1656 | FALSE), /* pcrel_offset */ | |
0855e32b | 1657 | |
34e77a92 | 1658 | /* 112-127 private relocations. */ |
0855e32b NS |
1659 | EMPTY_HOWTO (112), |
1660 | EMPTY_HOWTO (113), | |
1661 | EMPTY_HOWTO (114), | |
1662 | EMPTY_HOWTO (115), | |
1663 | EMPTY_HOWTO (116), | |
1664 | EMPTY_HOWTO (117), | |
1665 | EMPTY_HOWTO (118), | |
1666 | EMPTY_HOWTO (119), | |
1667 | EMPTY_HOWTO (120), | |
1668 | EMPTY_HOWTO (121), | |
1669 | EMPTY_HOWTO (122), | |
1670 | EMPTY_HOWTO (123), | |
1671 | EMPTY_HOWTO (124), | |
1672 | EMPTY_HOWTO (125), | |
1673 | EMPTY_HOWTO (126), | |
1674 | EMPTY_HOWTO (127), | |
34e77a92 RS |
1675 | |
1676 | /* R_ARM_ME_TOO, obsolete. */ | |
0855e32b NS |
1677 | EMPTY_HOWTO (128), |
1678 | ||
1679 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ | |
1680 | 0, /* rightshift */ | |
1681 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1682 | 0, /* bitsize */ | |
1683 | FALSE, /* pc_relative */ | |
1684 | 0, /* bitpos */ | |
1685 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1686 | bfd_elf_generic_reloc, /* special_function */ | |
1687 | "R_ARM_THM_TLS_DESCSEQ",/* name */ | |
1688 | FALSE, /* partial_inplace */ | |
1689 | 0x00000000, /* src_mask */ | |
1690 | 0x00000000, /* dst_mask */ | |
1691 | FALSE), /* pcrel_offset */ | |
72d98d16 MG |
1692 | EMPTY_HOWTO (130), |
1693 | EMPTY_HOWTO (131), | |
1694 | HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */ | |
1695 | 0, /* rightshift. */ | |
1696 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1697 | 16, /* bitsize. */ | |
1698 | FALSE, /* pc_relative. */ | |
1699 | 0, /* bitpos. */ | |
1700 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1701 | bfd_elf_generic_reloc, /* special_function. */ | |
1702 | "R_ARM_THM_ALU_ABS_G0_NC",/* name. */ | |
1703 | FALSE, /* partial_inplace. */ | |
1704 | 0x00000000, /* src_mask. */ | |
1705 | 0x00000000, /* dst_mask. */ | |
1706 | FALSE), /* pcrel_offset. */ | |
1707 | HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */ | |
1708 | 0, /* rightshift. */ | |
1709 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1710 | 16, /* bitsize. */ | |
1711 | FALSE, /* pc_relative. */ | |
1712 | 0, /* bitpos. */ | |
1713 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1714 | bfd_elf_generic_reloc, /* special_function. */ | |
1715 | "R_ARM_THM_ALU_ABS_G1_NC",/* name. */ | |
1716 | FALSE, /* partial_inplace. */ | |
1717 | 0x00000000, /* src_mask. */ | |
1718 | 0x00000000, /* dst_mask. */ | |
1719 | FALSE), /* pcrel_offset. */ | |
1720 | HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */ | |
1721 | 0, /* rightshift. */ | |
1722 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1723 | 16, /* bitsize. */ | |
1724 | FALSE, /* pc_relative. */ | |
1725 | 0, /* bitpos. */ | |
1726 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1727 | bfd_elf_generic_reloc, /* special_function. */ | |
1728 | "R_ARM_THM_ALU_ABS_G2_NC",/* name. */ | |
1729 | FALSE, /* partial_inplace. */ | |
1730 | 0x00000000, /* src_mask. */ | |
1731 | 0x00000000, /* dst_mask. */ | |
1732 | FALSE), /* pcrel_offset. */ | |
1733 | HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */ | |
1734 | 0, /* rightshift. */ | |
1735 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1736 | 16, /* bitsize. */ | |
1737 | FALSE, /* pc_relative. */ | |
1738 | 0, /* bitpos. */ | |
1739 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1740 | bfd_elf_generic_reloc, /* special_function. */ | |
1741 | "R_ARM_THM_ALU_ABS_G3_NC",/* name. */ | |
1742 | FALSE, /* partial_inplace. */ | |
1743 | 0x00000000, /* src_mask. */ | |
1744 | 0x00000000, /* dst_mask. */ | |
1745 | FALSE), /* pcrel_offset. */ | |
c19d1205 ZW |
1746 | }; |
1747 | ||
34e77a92 RS |
1748 | /* 160 onwards: */ |
1749 | static reloc_howto_type elf32_arm_howto_table_2[1] = | |
1750 | { | |
1751 | HOWTO (R_ARM_IRELATIVE, /* type */ | |
99059e56 RM |
1752 | 0, /* rightshift */ |
1753 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1754 | 32, /* bitsize */ | |
1755 | FALSE, /* pc_relative */ | |
1756 | 0, /* bitpos */ | |
1757 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1758 | bfd_elf_generic_reloc, /* special_function */ | |
1759 | "R_ARM_IRELATIVE", /* name */ | |
1760 | TRUE, /* partial_inplace */ | |
1761 | 0xffffffff, /* src_mask */ | |
1762 | 0xffffffff, /* dst_mask */ | |
1763 | FALSE) /* pcrel_offset */ | |
34e77a92 | 1764 | }; |
c19d1205 | 1765 | |
34e77a92 RS |
1766 | /* 249-255 extended, currently unused, relocations: */ |
1767 | static reloc_howto_type elf32_arm_howto_table_3[4] = | |
7f266840 DJ |
1768 | { |
1769 | HOWTO (R_ARM_RREL32, /* type */ | |
1770 | 0, /* rightshift */ | |
1771 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1772 | 0, /* bitsize */ | |
1773 | FALSE, /* pc_relative */ | |
1774 | 0, /* bitpos */ | |
1775 | complain_overflow_dont,/* complain_on_overflow */ | |
1776 | bfd_elf_generic_reloc, /* special_function */ | |
1777 | "R_ARM_RREL32", /* name */ | |
1778 | FALSE, /* partial_inplace */ | |
1779 | 0, /* src_mask */ | |
1780 | 0, /* dst_mask */ | |
1781 | FALSE), /* pcrel_offset */ | |
1782 | ||
1783 | HOWTO (R_ARM_RABS32, /* type */ | |
1784 | 0, /* rightshift */ | |
1785 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1786 | 0, /* bitsize */ | |
1787 | FALSE, /* pc_relative */ | |
1788 | 0, /* bitpos */ | |
1789 | complain_overflow_dont,/* complain_on_overflow */ | |
1790 | bfd_elf_generic_reloc, /* special_function */ | |
1791 | "R_ARM_RABS32", /* name */ | |
1792 | FALSE, /* partial_inplace */ | |
1793 | 0, /* src_mask */ | |
1794 | 0, /* dst_mask */ | |
1795 | FALSE), /* pcrel_offset */ | |
1796 | ||
1797 | HOWTO (R_ARM_RPC24, /* type */ | |
1798 | 0, /* rightshift */ | |
1799 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1800 | 0, /* bitsize */ | |
1801 | FALSE, /* pc_relative */ | |
1802 | 0, /* bitpos */ | |
1803 | complain_overflow_dont,/* complain_on_overflow */ | |
1804 | bfd_elf_generic_reloc, /* special_function */ | |
1805 | "R_ARM_RPC24", /* name */ | |
1806 | FALSE, /* partial_inplace */ | |
1807 | 0, /* src_mask */ | |
1808 | 0, /* dst_mask */ | |
1809 | FALSE), /* pcrel_offset */ | |
1810 | ||
1811 | HOWTO (R_ARM_RBASE, /* type */ | |
1812 | 0, /* rightshift */ | |
1813 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1814 | 0, /* bitsize */ | |
1815 | FALSE, /* pc_relative */ | |
1816 | 0, /* bitpos */ | |
1817 | complain_overflow_dont,/* complain_on_overflow */ | |
1818 | bfd_elf_generic_reloc, /* special_function */ | |
1819 | "R_ARM_RBASE", /* name */ | |
1820 | FALSE, /* partial_inplace */ | |
1821 | 0, /* src_mask */ | |
1822 | 0, /* dst_mask */ | |
1823 | FALSE) /* pcrel_offset */ | |
1824 | }; | |
1825 | ||
1826 | static reloc_howto_type * | |
1827 | elf32_arm_howto_from_type (unsigned int r_type) | |
1828 | { | |
906e58ca | 1829 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1830 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1831 | |
34e77a92 RS |
1832 | if (r_type == R_ARM_IRELATIVE) |
1833 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; | |
1834 | ||
c19d1205 | 1835 | if (r_type >= R_ARM_RREL32 |
34e77a92 RS |
1836 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
1837 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; | |
7f266840 | 1838 | |
c19d1205 | 1839 | return NULL; |
7f266840 DJ |
1840 | } |
1841 | ||
1842 | static void | |
1843 | elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc, | |
1844 | Elf_Internal_Rela * elf_reloc) | |
1845 | { | |
1846 | unsigned int r_type; | |
1847 | ||
1848 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
1849 | bfd_reloc->howto = elf32_arm_howto_from_type (r_type); | |
1850 | } | |
1851 | ||
1852 | struct elf32_arm_reloc_map | |
1853 | { | |
1854 | bfd_reloc_code_real_type bfd_reloc_val; | |
1855 | unsigned char elf_reloc_val; | |
1856 | }; | |
1857 | ||
1858 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
1859 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
1860 | { | |
1861 | {BFD_RELOC_NONE, R_ARM_NONE}, | |
1862 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, | |
39b41c9c PB |
1863 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
1864 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
7f266840 DJ |
1865 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
1866 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
1867 | {BFD_RELOC_32, R_ARM_ABS32}, | |
1868 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
1869 | {BFD_RELOC_8, R_ARM_ABS8}, | |
1870 | {BFD_RELOC_16, R_ARM_ABS16}, | |
1871 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
1872 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, | |
c19d1205 ZW |
1873 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
1874 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
1875 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
1876 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
1877 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
1878 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
7f266840 DJ |
1879 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
1880 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
1881 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
c19d1205 | 1882 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, |
7f266840 | 1883 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, |
b43420e6 | 1884 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, |
7f266840 DJ |
1885 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, |
1886 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
1887 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, | |
1888 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
1889 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
1890 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac DJ |
1891 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
1892 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
0855e32b NS |
1893 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, |
1894 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, | |
1895 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, | |
1896 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, | |
1897 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, | |
1898 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, | |
ba93b8ac DJ |
1899 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
1900 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
1901 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
1902 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
1903 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
1904 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, | |
1905 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
1906 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
34e77a92 | 1907 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, |
c19d1205 ZW |
1908 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
1909 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
1910 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
1911 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
1912 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
1913 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
1914 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
1915 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
1916 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
1917 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
1918 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
1919 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
1920 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
1921 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
1922 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
1923 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
1924 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
1925 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
1926 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
1927 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
1928 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
1929 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
1930 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
1931 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
1932 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
1933 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
1934 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
1935 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
1936 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
1937 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
1938 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
1939 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
1940 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
1941 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
1942 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
1943 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
1944 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 | 1945 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
72d98d16 MG |
1946 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}, |
1947 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC}, | |
1948 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC}, | |
1949 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC}, | |
1950 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC} | |
7f266840 DJ |
1951 | }; |
1952 | ||
1953 | static reloc_howto_type * | |
f1c71a59 ZW |
1954 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
1955 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
1956 | { |
1957 | unsigned int i; | |
8029a119 | 1958 | |
906e58ca | 1959 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
1960 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
1961 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 1962 | |
c19d1205 | 1963 | return NULL; |
7f266840 DJ |
1964 | } |
1965 | ||
157090f7 AM |
1966 | static reloc_howto_type * |
1967 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1968 | const char *r_name) | |
1969 | { | |
1970 | unsigned int i; | |
1971 | ||
906e58ca | 1972 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
1973 | if (elf32_arm_howto_table_1[i].name != NULL |
1974 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
1975 | return &elf32_arm_howto_table_1[i]; | |
1976 | ||
906e58ca | 1977 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
1978 | if (elf32_arm_howto_table_2[i].name != NULL |
1979 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
1980 | return &elf32_arm_howto_table_2[i]; | |
1981 | ||
34e77a92 RS |
1982 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
1983 | if (elf32_arm_howto_table_3[i].name != NULL | |
1984 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) | |
1985 | return &elf32_arm_howto_table_3[i]; | |
1986 | ||
157090f7 AM |
1987 | return NULL; |
1988 | } | |
1989 | ||
906e58ca NC |
1990 | /* Support for core dump NOTE sections. */ |
1991 | ||
7f266840 | 1992 | static bfd_boolean |
f1c71a59 | 1993 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1994 | { |
1995 | int offset; | |
1996 | size_t size; | |
1997 | ||
1998 | switch (note->descsz) | |
1999 | { | |
2000 | default: | |
2001 | return FALSE; | |
2002 | ||
8029a119 | 2003 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 | 2004 | /* pr_cursig */ |
228e534f | 2005 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
7f266840 DJ |
2006 | |
2007 | /* pr_pid */ | |
228e534f | 2008 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
7f266840 DJ |
2009 | |
2010 | /* pr_reg */ | |
2011 | offset = 72; | |
2012 | size = 72; | |
2013 | ||
2014 | break; | |
2015 | } | |
2016 | ||
2017 | /* Make a ".reg/999" section. */ | |
2018 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
2019 | size, note->descpos + offset); | |
2020 | } | |
2021 | ||
2022 | static bfd_boolean | |
f1c71a59 | 2023 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
2024 | { |
2025 | switch (note->descsz) | |
2026 | { | |
2027 | default: | |
2028 | return FALSE; | |
2029 | ||
8029a119 | 2030 | case 124: /* Linux/ARM elf_prpsinfo. */ |
228e534f | 2031 | elf_tdata (abfd)->core->pid |
4395ee08 | 2032 | = bfd_get_32 (abfd, note->descdata + 12); |
228e534f | 2033 | elf_tdata (abfd)->core->program |
7f266840 | 2034 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); |
228e534f | 2035 | elf_tdata (abfd)->core->command |
7f266840 DJ |
2036 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); |
2037 | } | |
2038 | ||
2039 | /* Note that for some reason, a spurious space is tacked | |
2040 | onto the end of the args in some (at least one anyway) | |
2041 | implementations, so strip it off if it exists. */ | |
7f266840 | 2042 | { |
228e534f | 2043 | char *command = elf_tdata (abfd)->core->command; |
7f266840 DJ |
2044 | int n = strlen (command); |
2045 | ||
2046 | if (0 < n && command[n - 1] == ' ') | |
2047 | command[n - 1] = '\0'; | |
2048 | } | |
2049 | ||
2050 | return TRUE; | |
2051 | } | |
2052 | ||
1f20dca5 UW |
2053 | static char * |
2054 | elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz, | |
2055 | int note_type, ...) | |
2056 | { | |
2057 | switch (note_type) | |
2058 | { | |
2059 | default: | |
2060 | return NULL; | |
2061 | ||
2062 | case NT_PRPSINFO: | |
2063 | { | |
2064 | char data[124]; | |
2065 | va_list ap; | |
2066 | ||
2067 | va_start (ap, note_type); | |
2068 | memset (data, 0, sizeof (data)); | |
2069 | strncpy (data + 28, va_arg (ap, const char *), 16); | |
2070 | strncpy (data + 44, va_arg (ap, const char *), 80); | |
2071 | va_end (ap); | |
2072 | ||
2073 | return elfcore_write_note (abfd, buf, bufsiz, | |
2074 | "CORE", note_type, data, sizeof (data)); | |
2075 | } | |
2076 | ||
2077 | case NT_PRSTATUS: | |
2078 | { | |
2079 | char data[148]; | |
2080 | va_list ap; | |
2081 | long pid; | |
2082 | int cursig; | |
2083 | const void *greg; | |
2084 | ||
2085 | va_start (ap, note_type); | |
2086 | memset (data, 0, sizeof (data)); | |
2087 | pid = va_arg (ap, long); | |
2088 | bfd_put_32 (abfd, pid, data + 24); | |
2089 | cursig = va_arg (ap, int); | |
2090 | bfd_put_16 (abfd, cursig, data + 12); | |
2091 | greg = va_arg (ap, const void *); | |
2092 | memcpy (data + 72, greg, 72); | |
2093 | va_end (ap); | |
2094 | ||
2095 | return elfcore_write_note (abfd, buf, bufsiz, | |
2096 | "CORE", note_type, data, sizeof (data)); | |
2097 | } | |
2098 | } | |
2099 | } | |
2100 | ||
6d00b590 | 2101 | #define TARGET_LITTLE_SYM arm_elf32_le_vec |
7f266840 | 2102 | #define TARGET_LITTLE_NAME "elf32-littlearm" |
6d00b590 | 2103 | #define TARGET_BIG_SYM arm_elf32_be_vec |
7f266840 DJ |
2104 | #define TARGET_BIG_NAME "elf32-bigarm" |
2105 | ||
2106 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
2107 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1f20dca5 | 2108 | #define elf_backend_write_core_note elf32_arm_nabi_write_core_note |
7f266840 | 2109 | |
252b5132 RH |
2110 | typedef unsigned long int insn32; |
2111 | typedef unsigned short int insn16; | |
2112 | ||
3a4a14e9 PB |
2113 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
2114 | interworkable. */ | |
57e8b36a | 2115 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 2116 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
2117 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
2118 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 2119 | |
252b5132 RH |
2120 | /* The linker script knows the section names for placement. |
2121 | The entry_names are used to do simple name mangling on the stubs. | |
2122 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 2123 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
2124 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
2125 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
2126 | ||
2127 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
2128 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
2129 | ||
c7b8f16e JB |
2130 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
2131 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
2132 | ||
a504d23a LA |
2133 | #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer" |
2134 | #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x" | |
2135 | ||
845b51d6 PB |
2136 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
2137 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
2138 | ||
7413f23f DJ |
2139 | #define STUB_ENTRY_NAME "__%s_veneer" |
2140 | ||
252b5132 RH |
2141 | /* The name of the dynamic interpreter. This is put in the .interp |
2142 | section. */ | |
2143 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
2144 | ||
0855e32b | 2145 | static const unsigned long tls_trampoline [] = |
b38cadfb NC |
2146 | { |
2147 | 0xe08e0000, /* add r0, lr, r0 */ | |
2148 | 0xe5901004, /* ldr r1, [r0,#4] */ | |
2149 | 0xe12fff11, /* bx r1 */ | |
2150 | }; | |
0855e32b NS |
2151 | |
2152 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = | |
b38cadfb NC |
2153 | { |
2154 | 0xe52d2004, /* push {r2} */ | |
2155 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ | |
2156 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ | |
2157 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ | |
2158 | 0xe081100f, /* 2: add r1, pc */ | |
2159 | 0xe12fff12, /* bx r2 */ | |
2160 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 | |
99059e56 | 2161 | + dl_tlsdesc_lazy_resolver(GOT) */ |
b38cadfb NC |
2162 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ |
2163 | }; | |
0855e32b | 2164 | |
5e681ec4 PB |
2165 | #ifdef FOUR_WORD_PLT |
2166 | ||
252b5132 RH |
2167 | /* The first entry in a procedure linkage table looks like |
2168 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 2169 | called before the relocation has been set up calls the dynamic |
9b485d32 | 2170 | linker first. */ |
e5a52504 | 2171 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2172 | { |
2173 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2174 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
2175 | 0xe08fe00e, /* add lr, pc, lr */ | |
2176 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2177 | }; | |
5e681ec4 PB |
2178 | |
2179 | /* Subsequent entries in a procedure linkage table look like | |
2180 | this. */ | |
e5a52504 | 2181 | static const bfd_vma elf32_arm_plt_entry [] = |
b38cadfb NC |
2182 | { |
2183 | 0xe28fc600, /* add ip, pc, #NN */ | |
2184 | 0xe28cca00, /* add ip, ip, #NN */ | |
2185 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
2186 | 0x00000000, /* unused */ | |
2187 | }; | |
5e681ec4 | 2188 | |
eed94f8f | 2189 | #else /* not FOUR_WORD_PLT */ |
5e681ec4 | 2190 | |
5e681ec4 PB |
2191 | /* The first entry in a procedure linkage table looks like |
2192 | this. It is set up so that any shared library function that is | |
2193 | called before the relocation has been set up calls the dynamic | |
2194 | linker first. */ | |
e5a52504 | 2195 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2196 | { |
2197 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2198 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
2199 | 0xe08fe00e, /* add lr, pc, lr */ | |
2200 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2201 | 0x00000000, /* &GOT[0] - . */ | |
2202 | }; | |
252b5132 | 2203 | |
1db37fe6 YG |
2204 | /* By default subsequent entries in a procedure linkage table look like |
2205 | this. Offsets that don't fit into 28 bits will cause link error. */ | |
2206 | static const bfd_vma elf32_arm_plt_entry_short [] = | |
b38cadfb NC |
2207 | { |
2208 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
2209 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2210 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2211 | }; | |
5e681ec4 | 2212 | |
1db37fe6 YG |
2213 | /* When explicitly asked, we'll use this "long" entry format |
2214 | which can cope with arbitrary displacements. */ | |
2215 | static const bfd_vma elf32_arm_plt_entry_long [] = | |
2216 | { | |
2217 | 0xe28fc200, /* add ip, pc, #0xN0000000 */ | |
2218 | 0xe28cc600, /* add ip, ip, #0xNN00000 */ | |
2219 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2220 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2221 | }; | |
2222 | ||
2223 | static bfd_boolean elf32_arm_use_long_plt_entry = FALSE; | |
2224 | ||
eed94f8f NC |
2225 | #endif /* not FOUR_WORD_PLT */ |
2226 | ||
2227 | /* The first entry in a procedure linkage table looks like this. | |
2228 | It is set up so that any shared library function that is called before the | |
2229 | relocation has been set up calls the dynamic linker first. */ | |
2230 | static const bfd_vma elf32_thumb2_plt0_entry [] = | |
2231 | { | |
2232 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2233 | an instruction maybe encoded to one or two array elements. */ | |
2234 | 0xf8dfb500, /* push {lr} */ | |
2235 | 0x44fee008, /* ldr.w lr, [pc, #8] */ | |
469a3493 | 2236 | /* add lr, pc */ |
eed94f8f NC |
2237 | 0xff08f85e, /* ldr.w pc, [lr, #8]! */ |
2238 | 0x00000000, /* &GOT[0] - . */ | |
2239 | }; | |
2240 | ||
2241 | /* Subsequent entries in a procedure linkage table for thumb only target | |
2242 | look like this. */ | |
2243 | static const bfd_vma elf32_thumb2_plt_entry [] = | |
2244 | { | |
2245 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2246 | an instruction maybe encoded to one or two array elements. */ | |
2247 | 0x0c00f240, /* movw ip, #0xNNNN */ | |
2248 | 0x0c00f2c0, /* movt ip, #0xNNNN */ | |
2249 | 0xf8dc44fc, /* add ip, pc */ | |
2250 | 0xbf00f000 /* ldr.w pc, [ip] */ | |
469a3493 | 2251 | /* nop */ |
eed94f8f | 2252 | }; |
252b5132 | 2253 | |
00a97672 RS |
2254 | /* The format of the first entry in the procedure linkage table |
2255 | for a VxWorks executable. */ | |
2256 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
b38cadfb NC |
2257 | { |
2258 | 0xe52dc008, /* str ip,[sp,#-8]! */ | |
2259 | 0xe59fc000, /* ldr ip,[pc] */ | |
2260 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
2261 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
2262 | }; | |
00a97672 RS |
2263 | |
2264 | /* The format of subsequent entries in a VxWorks executable. */ | |
2265 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
b38cadfb NC |
2266 | { |
2267 | 0xe59fc000, /* ldr ip,[pc] */ | |
2268 | 0xe59cf000, /* ldr pc,[ip] */ | |
2269 | 0x00000000, /* .long @got */ | |
2270 | 0xe59fc000, /* ldr ip,[pc] */ | |
2271 | 0xea000000, /* b _PLT */ | |
2272 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2273 | }; | |
00a97672 RS |
2274 | |
2275 | /* The format of entries in a VxWorks shared library. */ | |
2276 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
b38cadfb NC |
2277 | { |
2278 | 0xe59fc000, /* ldr ip,[pc] */ | |
2279 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
2280 | 0x00000000, /* .long @got */ | |
2281 | 0xe59fc000, /* ldr ip,[pc] */ | |
2282 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
2283 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2284 | }; | |
00a97672 | 2285 | |
b7693d02 DJ |
2286 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
2287 | #define PLT_THUMB_STUB_SIZE 4 | |
2288 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
b38cadfb NC |
2289 | { |
2290 | 0x4778, /* bx pc */ | |
2291 | 0x46c0 /* nop */ | |
2292 | }; | |
b7693d02 | 2293 | |
e5a52504 MM |
2294 | /* The entries in a PLT when using a DLL-based target with multiple |
2295 | address spaces. */ | |
906e58ca | 2296 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
b38cadfb NC |
2297 | { |
2298 | 0xe51ff004, /* ldr pc, [pc, #-4] */ | |
2299 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ | |
2300 | }; | |
2301 | ||
2302 | /* The first entry in a procedure linkage table looks like | |
2303 | this. It is set up so that any shared library function that is | |
2304 | called before the relocation has been set up calls the dynamic | |
2305 | linker first. */ | |
2306 | static const bfd_vma elf32_arm_nacl_plt0_entry [] = | |
2307 | { | |
2308 | /* First bundle: */ | |
2309 | 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */ | |
2310 | 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */ | |
2311 | 0xe08cc00f, /* add ip, ip, pc */ | |
2312 | 0xe52dc008, /* str ip, [sp, #-8]! */ | |
2313 | /* Second bundle: */ | |
edccdf7c RM |
2314 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2315 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2316 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2317 | 0xe12fff1c, /* bx ip */ |
b38cadfb | 2318 | /* Third bundle: */ |
edccdf7c RM |
2319 | 0xe320f000, /* nop */ |
2320 | 0xe320f000, /* nop */ | |
2321 | 0xe320f000, /* nop */ | |
b38cadfb NC |
2322 | /* .Lplt_tail: */ |
2323 | 0xe50dc004, /* str ip, [sp, #-4] */ | |
2324 | /* Fourth bundle: */ | |
edccdf7c RM |
2325 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2326 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2327 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2328 | 0xe12fff1c, /* bx ip */ |
b38cadfb NC |
2329 | }; |
2330 | #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4) | |
2331 | ||
2332 | /* Subsequent entries in a procedure linkage table look like this. */ | |
2333 | static const bfd_vma elf32_arm_nacl_plt_entry [] = | |
2334 | { | |
2335 | 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */ | |
2336 | 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */ | |
2337 | 0xe08cc00f, /* add ip, ip, pc */ | |
2338 | 0xea000000, /* b .Lplt_tail */ | |
2339 | }; | |
e5a52504 | 2340 | |
906e58ca NC |
2341 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
2342 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) | |
2343 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) | |
2344 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) | |
2345 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) | |
2346 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) | |
c5423981 TG |
2347 | #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4) |
2348 | #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4) | |
906e58ca | 2349 | |
461a49ca | 2350 | enum stub_insn_type |
b38cadfb NC |
2351 | { |
2352 | THUMB16_TYPE = 1, | |
2353 | THUMB32_TYPE, | |
2354 | ARM_TYPE, | |
2355 | DATA_TYPE | |
2356 | }; | |
461a49ca | 2357 | |
48229727 JB |
2358 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2359 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2360 | is inserted in arm_build_one_stub(). */ | |
2361 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2362 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
2363 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} | |
2364 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2365 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2366 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2367 | |
2368 | typedef struct | |
2369 | { | |
b38cadfb NC |
2370 | bfd_vma data; |
2371 | enum stub_insn_type type; | |
2372 | unsigned int r_type; | |
2373 | int reloc_addend; | |
461a49ca DJ |
2374 | } insn_sequence; |
2375 | ||
fea2b4d6 CL |
2376 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2377 | to reach the stub if necessary. */ | |
461a49ca | 2378 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
b38cadfb NC |
2379 | { |
2380 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2381 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2382 | }; | |
906e58ca | 2383 | |
fea2b4d6 CL |
2384 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2385 | available. */ | |
461a49ca | 2386 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
b38cadfb NC |
2387 | { |
2388 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2389 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2390 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2391 | }; | |
906e58ca | 2392 | |
d3626fb0 | 2393 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2394 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
b38cadfb NC |
2395 | { |
2396 | THUMB16_INSN (0xb401), /* push {r0} */ | |
2397 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2398 | THUMB16_INSN (0x4684), /* mov ip, r0 */ | |
2399 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2400 | THUMB16_INSN (0x4760), /* bx ip */ | |
2401 | THUMB16_INSN (0xbf00), /* nop */ | |
2402 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2403 | }; | |
906e58ca | 2404 | |
d3626fb0 CL |
2405 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2406 | allowed. */ | |
2407 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
b38cadfb NC |
2408 | { |
2409 | THUMB16_INSN (0x4778), /* bx pc */ | |
2410 | THUMB16_INSN (0x46c0), /* nop */ | |
2411 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2412 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2413 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2414 | }; | |
d3626fb0 | 2415 | |
fea2b4d6 CL |
2416 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2417 | available. */ | |
461a49ca | 2418 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
b38cadfb NC |
2419 | { |
2420 | THUMB16_INSN (0x4778), /* bx pc */ | |
2421 | THUMB16_INSN (0x46c0), /* nop */ | |
2422 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2423 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2424 | }; | |
906e58ca | 2425 | |
fea2b4d6 CL |
2426 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2427 | one, when the destination is close enough. */ | |
461a49ca | 2428 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
b38cadfb NC |
2429 | { |
2430 | THUMB16_INSN (0x4778), /* bx pc */ | |
2431 | THUMB16_INSN (0x46c0), /* nop */ | |
2432 | ARM_REL_INSN (0xea000000, -8), /* b (X-8) */ | |
2433 | }; | |
c820be07 | 2434 | |
cf3eccff | 2435 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2436 | blx to reach the stub if necessary. */ |
cf3eccff | 2437 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
b38cadfb NC |
2438 | { |
2439 | ARM_INSN (0xe59fc000), /* ldr ip, [pc] */ | |
2440 | ARM_INSN (0xe08ff00c), /* add pc, pc, ip */ | |
2441 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
2442 | }; | |
906e58ca | 2443 | |
cf3eccff DJ |
2444 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2445 | blx to reach the stub if necessary. We can not add into pc; | |
2446 | it is not guaranteed to mode switch (different in ARMv6 and | |
2447 | ARMv7). */ | |
2448 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
b38cadfb NC |
2449 | { |
2450 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2451 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2452 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2453 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2454 | }; | |
cf3eccff | 2455 | |
ebe24dd4 CL |
2456 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2457 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
b38cadfb NC |
2458 | { |
2459 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2460 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2461 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2462 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2463 | }; | |
ebe24dd4 CL |
2464 | |
2465 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2466 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
b38cadfb NC |
2467 | { |
2468 | THUMB16_INSN (0x4778), /* bx pc */ | |
2469 | THUMB16_INSN (0x46c0), /* nop */ | |
2470 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2471 | ARM_INSN (0xe08cf00f), /* add pc, ip, pc */ | |
2472 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
2473 | }; | |
ebe24dd4 | 2474 | |
d3626fb0 CL |
2475 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2476 | architectures. */ | |
ebe24dd4 | 2477 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
b38cadfb NC |
2478 | { |
2479 | THUMB16_INSN (0xb401), /* push {r0} */ | |
2480 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2481 | THUMB16_INSN (0x46fc), /* mov ip, pc */ | |
2482 | THUMB16_INSN (0x4484), /* add ip, r0 */ | |
2483 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2484 | THUMB16_INSN (0x4760), /* bx ip */ | |
2485 | DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ | |
2486 | }; | |
ebe24dd4 | 2487 | |
d3626fb0 CL |
2488 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2489 | allowed. */ | |
2490 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
b38cadfb NC |
2491 | { |
2492 | THUMB16_INSN (0x4778), /* bx pc */ | |
2493 | THUMB16_INSN (0x46c0), /* nop */ | |
2494 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2495 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2496 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2497 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2498 | }; | |
d3626fb0 | 2499 | |
0855e32b NS |
2500 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
2501 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2502 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = | |
2503 | { | |
b38cadfb NC |
2504 | ARM_INSN (0xe59f1000), /* ldr r1, [pc] */ |
2505 | ARM_INSN (0xe08ff001), /* add pc, pc, r1 */ | |
2506 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
0855e32b NS |
2507 | }; |
2508 | ||
2509 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a | |
2510 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2511 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = | |
2512 | { | |
b38cadfb NC |
2513 | THUMB16_INSN (0x4778), /* bx pc */ |
2514 | THUMB16_INSN (0x46c0), /* nop */ | |
2515 | ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */ | |
2516 | ARM_INSN (0xe081f00f), /* add pc, r1, pc */ | |
2517 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
0855e32b NS |
2518 | }; |
2519 | ||
7a89b94e NC |
2520 | /* NaCl ARM -> ARM long branch stub. */ |
2521 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] = | |
2522 | { | |
2523 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
2524 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ | |
2525 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2526 | ARM_INSN (0xe320f000), /* nop */ | |
2527 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2528 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2529 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2530 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2531 | }; | |
2532 | ||
2533 | /* NaCl ARM -> ARM long branch stub, PIC. */ | |
2534 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] = | |
2535 | { | |
2536 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
2537 | ARM_INSN (0xe08cc00f), /* add ip, ip, pc */ | |
2538 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ | |
2539 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2540 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2541 | DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */ | |
2542 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2543 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2544 | }; | |
2545 | ||
2546 | ||
48229727 JB |
2547 | /* Cortex-A8 erratum-workaround stubs. */ |
2548 | ||
2549 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2550 | can't use a conditional branch to reach this stub). */ | |
2551 | ||
2552 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
b38cadfb NC |
2553 | { |
2554 | THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */ | |
2555 | THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */ | |
2556 | THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2557 | }; | |
48229727 JB |
2558 | |
2559 | /* Stub used for b.w and bl.w instructions. */ | |
2560 | ||
2561 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
b38cadfb NC |
2562 | { |
2563 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2564 | }; | |
48229727 JB |
2565 | |
2566 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
b38cadfb NC |
2567 | { |
2568 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2569 | }; | |
48229727 JB |
2570 | |
2571 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2572 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2573 | real destination using an ARM-mode branch. */ | |
2574 | ||
2575 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
b38cadfb NC |
2576 | { |
2577 | ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */ | |
2578 | }; | |
48229727 | 2579 | |
9553db3c NC |
2580 | /* For each section group there can be a specially created linker section |
2581 | to hold the stubs for that group. The name of the stub section is based | |
2582 | upon the name of another section within that group with the suffix below | |
2583 | applied. | |
2584 | ||
2585 | PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to | |
2586 | create what appeared to be a linker stub section when it actually | |
2587 | contained user code/data. For example, consider this fragment: | |
b38cadfb | 2588 | |
9553db3c NC |
2589 | const char * stubborn_problems[] = { "np" }; |
2590 | ||
2591 | If this is compiled with "-fPIC -fdata-sections" then gcc produces a | |
2592 | section called: | |
2593 | ||
2594 | .data.rel.local.stubborn_problems | |
2595 | ||
2596 | This then causes problems in arm32_arm_build_stubs() as it triggers: | |
2597 | ||
2598 | // Ignore non-stub sections. | |
2599 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
2600 | continue; | |
2601 | ||
2602 | And so the section would be ignored instead of being processed. Hence | |
2603 | the change in definition of STUB_SUFFIX to a name that cannot be a valid | |
2604 | C identifier. */ | |
2605 | #define STUB_SUFFIX ".__stub" | |
906e58ca | 2606 | |
738a79f6 CL |
2607 | /* One entry per long/short branch stub defined above. */ |
2608 | #define DEF_STUBS \ | |
2609 | DEF_STUB(long_branch_any_any) \ | |
2610 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
2611 | DEF_STUB(long_branch_thumb_only) \ | |
2612 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
2613 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
2614 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
2615 | DEF_STUB(long_branch_any_arm_pic) \ | |
2616 | DEF_STUB(long_branch_any_thumb_pic) \ | |
2617 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
2618 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
2619 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
48229727 | 2620 | DEF_STUB(long_branch_thumb_only_pic) \ |
0855e32b NS |
2621 | DEF_STUB(long_branch_any_tls_pic) \ |
2622 | DEF_STUB(long_branch_v4t_thumb_tls_pic) \ | |
7a89b94e NC |
2623 | DEF_STUB(long_branch_arm_nacl) \ |
2624 | DEF_STUB(long_branch_arm_nacl_pic) \ | |
48229727 JB |
2625 | DEF_STUB(a8_veneer_b_cond) \ |
2626 | DEF_STUB(a8_veneer_b) \ | |
2627 | DEF_STUB(a8_veneer_bl) \ | |
2628 | DEF_STUB(a8_veneer_blx) | |
738a79f6 CL |
2629 | |
2630 | #define DEF_STUB(x) arm_stub_##x, | |
b38cadfb NC |
2631 | enum elf32_arm_stub_type |
2632 | { | |
906e58ca | 2633 | arm_stub_none, |
738a79f6 | 2634 | DEF_STUBS |
4f4faa4d | 2635 | max_stub_type |
738a79f6 CL |
2636 | }; |
2637 | #undef DEF_STUB | |
2638 | ||
8d9d9490 TP |
2639 | /* Note the first a8_veneer type. */ |
2640 | const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond; | |
2641 | ||
738a79f6 CL |
2642 | typedef struct |
2643 | { | |
d3ce72d0 | 2644 | const insn_sequence* template_sequence; |
738a79f6 CL |
2645 | int template_size; |
2646 | } stub_def; | |
2647 | ||
2648 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
b38cadfb NC |
2649 | static const stub_def stub_definitions[] = |
2650 | { | |
738a79f6 CL |
2651 | {NULL, 0}, |
2652 | DEF_STUBS | |
906e58ca NC |
2653 | }; |
2654 | ||
2655 | struct elf32_arm_stub_hash_entry | |
2656 | { | |
2657 | /* Base hash table entry structure. */ | |
2658 | struct bfd_hash_entry root; | |
2659 | ||
2660 | /* The stub section. */ | |
2661 | asection *stub_sec; | |
2662 | ||
2663 | /* Offset within stub_sec of the beginning of this stub. */ | |
2664 | bfd_vma stub_offset; | |
2665 | ||
2666 | /* Given the symbol's value and its section we can determine its final | |
2667 | value when building the stubs (so the stub knows where to jump). */ | |
2668 | bfd_vma target_value; | |
2669 | asection *target_section; | |
2670 | ||
8d9d9490 TP |
2671 | /* Same as above but for the source of the branch to the stub. Used for |
2672 | Cortex-A8 erratum workaround to patch it to branch to the stub. As | |
2673 | such, source section does not need to be recorded since Cortex-A8 erratum | |
2674 | workaround stubs are only generated when both source and target are in the | |
2675 | same section. */ | |
2676 | bfd_vma source_value; | |
48229727 JB |
2677 | |
2678 | /* The instruction which caused this stub to be generated (only valid for | |
2679 | Cortex-A8 erratum workaround stubs at present). */ | |
2680 | unsigned long orig_insn; | |
2681 | ||
461a49ca | 2682 | /* The stub type. */ |
906e58ca | 2683 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2684 | /* Its encoding size in bytes. */ |
2685 | int stub_size; | |
2686 | /* Its template. */ | |
2687 | const insn_sequence *stub_template; | |
2688 | /* The size of the template (number of entries). */ | |
2689 | int stub_template_size; | |
906e58ca NC |
2690 | |
2691 | /* The symbol table entry, if any, that this was derived from. */ | |
2692 | struct elf32_arm_link_hash_entry *h; | |
2693 | ||
35fc36a8 RS |
2694 | /* Type of branch. */ |
2695 | enum arm_st_branch_type branch_type; | |
906e58ca NC |
2696 | |
2697 | /* Where this stub is being called from, or, in the case of combined | |
2698 | stub sections, the first input section in the group. */ | |
2699 | asection *id_sec; | |
7413f23f DJ |
2700 | |
2701 | /* The name for the local symbol at the start of this stub. The | |
2702 | stub name in the hash table has to be unique; this does not, so | |
2703 | it can be friendlier. */ | |
2704 | char *output_name; | |
906e58ca NC |
2705 | }; |
2706 | ||
e489d0ae PB |
2707 | /* Used to build a map of a section. This is required for mixed-endian |
2708 | code/data. */ | |
2709 | ||
2710 | typedef struct elf32_elf_section_map | |
2711 | { | |
2712 | bfd_vma vma; | |
2713 | char type; | |
2714 | } | |
2715 | elf32_arm_section_map; | |
2716 | ||
c7b8f16e JB |
2717 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2718 | ||
2719 | typedef enum | |
2720 | { | |
2721 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2722 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2723 | VFP11_ERRATUM_ARM_VENEER, | |
2724 | VFP11_ERRATUM_THUMB_VENEER | |
2725 | } | |
2726 | elf32_vfp11_erratum_type; | |
2727 | ||
2728 | typedef struct elf32_vfp11_erratum_list | |
2729 | { | |
2730 | struct elf32_vfp11_erratum_list *next; | |
2731 | bfd_vma vma; | |
2732 | union | |
2733 | { | |
2734 | struct | |
2735 | { | |
2736 | struct elf32_vfp11_erratum_list *veneer; | |
2737 | unsigned int vfp_insn; | |
2738 | } b; | |
2739 | struct | |
2740 | { | |
2741 | struct elf32_vfp11_erratum_list *branch; | |
2742 | unsigned int id; | |
2743 | } v; | |
2744 | } u; | |
2745 | elf32_vfp11_erratum_type type; | |
2746 | } | |
2747 | elf32_vfp11_erratum_list; | |
2748 | ||
a504d23a LA |
2749 | /* Information about a STM32L4XX erratum veneer, or a branch to such a |
2750 | veneer. */ | |
2751 | typedef enum | |
2752 | { | |
2753 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER, | |
2754 | STM32L4XX_ERRATUM_VENEER | |
2755 | } | |
2756 | elf32_stm32l4xx_erratum_type; | |
2757 | ||
2758 | typedef struct elf32_stm32l4xx_erratum_list | |
2759 | { | |
2760 | struct elf32_stm32l4xx_erratum_list *next; | |
2761 | bfd_vma vma; | |
2762 | union | |
2763 | { | |
2764 | struct | |
2765 | { | |
2766 | struct elf32_stm32l4xx_erratum_list *veneer; | |
2767 | unsigned int insn; | |
2768 | } b; | |
2769 | struct | |
2770 | { | |
2771 | struct elf32_stm32l4xx_erratum_list *branch; | |
2772 | unsigned int id; | |
2773 | } v; | |
2774 | } u; | |
2775 | elf32_stm32l4xx_erratum_type type; | |
2776 | } | |
2777 | elf32_stm32l4xx_erratum_list; | |
2778 | ||
2468f9c9 PB |
2779 | typedef enum |
2780 | { | |
2781 | DELETE_EXIDX_ENTRY, | |
2782 | INSERT_EXIDX_CANTUNWIND_AT_END | |
2783 | } | |
2784 | arm_unwind_edit_type; | |
2785 | ||
2786 | /* A (sorted) list of edits to apply to an unwind table. */ | |
2787 | typedef struct arm_unwind_table_edit | |
2788 | { | |
2789 | arm_unwind_edit_type type; | |
2790 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
2791 | section different from the one we're currently writing out, so record the | |
2792 | (text) section this edit relates to here. */ | |
2793 | asection *linked_section; | |
2794 | unsigned int index; | |
2795 | struct arm_unwind_table_edit *next; | |
2796 | } | |
2797 | arm_unwind_table_edit; | |
2798 | ||
8e3de13a | 2799 | typedef struct _arm_elf_section_data |
e489d0ae | 2800 | { |
2468f9c9 | 2801 | /* Information about mapping symbols. */ |
e489d0ae | 2802 | struct bfd_elf_section_data elf; |
8e3de13a | 2803 | unsigned int mapcount; |
c7b8f16e | 2804 | unsigned int mapsize; |
e489d0ae | 2805 | elf32_arm_section_map *map; |
2468f9c9 | 2806 | /* Information about CPU errata. */ |
c7b8f16e JB |
2807 | unsigned int erratumcount; |
2808 | elf32_vfp11_erratum_list *erratumlist; | |
a504d23a LA |
2809 | unsigned int stm32l4xx_erratumcount; |
2810 | elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist; | |
491d01d3 | 2811 | unsigned int additional_reloc_count; |
2468f9c9 PB |
2812 | /* Information about unwind tables. */ |
2813 | union | |
2814 | { | |
2815 | /* Unwind info attached to a text section. */ | |
2816 | struct | |
2817 | { | |
2818 | asection *arm_exidx_sec; | |
2819 | } text; | |
2820 | ||
2821 | /* Unwind info attached to an .ARM.exidx section. */ | |
2822 | struct | |
2823 | { | |
2824 | arm_unwind_table_edit *unwind_edit_list; | |
2825 | arm_unwind_table_edit *unwind_edit_tail; | |
2826 | } exidx; | |
2827 | } u; | |
8e3de13a NC |
2828 | } |
2829 | _arm_elf_section_data; | |
e489d0ae PB |
2830 | |
2831 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 2832 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 2833 | |
48229727 JB |
2834 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
2835 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
2836 | so may be created multiple times: we use an array of these entries whilst | |
2837 | relaxing which we can refresh easily, then create stubs for each potentially | |
2838 | erratum-triggering instruction once we've settled on a solution. */ | |
2839 | ||
b38cadfb NC |
2840 | struct a8_erratum_fix |
2841 | { | |
48229727 JB |
2842 | bfd *input_bfd; |
2843 | asection *section; | |
2844 | bfd_vma offset; | |
8d9d9490 | 2845 | bfd_vma target_offset; |
48229727 JB |
2846 | unsigned long orig_insn; |
2847 | char *stub_name; | |
2848 | enum elf32_arm_stub_type stub_type; | |
35fc36a8 | 2849 | enum arm_st_branch_type branch_type; |
48229727 JB |
2850 | }; |
2851 | ||
2852 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
2853 | erratum. */ | |
2854 | ||
b38cadfb NC |
2855 | struct a8_erratum_reloc |
2856 | { | |
48229727 JB |
2857 | bfd_vma from; |
2858 | bfd_vma destination; | |
92750f34 DJ |
2859 | struct elf32_arm_link_hash_entry *hash; |
2860 | const char *sym_name; | |
48229727 | 2861 | unsigned int r_type; |
35fc36a8 | 2862 | enum arm_st_branch_type branch_type; |
48229727 JB |
2863 | bfd_boolean non_a8_stub; |
2864 | }; | |
2865 | ||
ba93b8ac DJ |
2866 | /* The size of the thread control block. */ |
2867 | #define TCB_SIZE 8 | |
2868 | ||
34e77a92 RS |
2869 | /* ARM-specific information about a PLT entry, over and above the usual |
2870 | gotplt_union. */ | |
b38cadfb NC |
2871 | struct arm_plt_info |
2872 | { | |
34e77a92 RS |
2873 | /* We reference count Thumb references to a PLT entry separately, |
2874 | so that we can emit the Thumb trampoline only if needed. */ | |
2875 | bfd_signed_vma thumb_refcount; | |
2876 | ||
2877 | /* Some references from Thumb code may be eliminated by BL->BLX | |
2878 | conversion, so record them separately. */ | |
2879 | bfd_signed_vma maybe_thumb_refcount; | |
2880 | ||
2881 | /* How many of the recorded PLT accesses were from non-call relocations. | |
2882 | This information is useful when deciding whether anything takes the | |
2883 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all | |
2884 | non-call references to the function should resolve directly to the | |
2885 | real runtime target. */ | |
2886 | unsigned int noncall_refcount; | |
2887 | ||
2888 | /* Since PLT entries have variable size if the Thumb prologue is | |
2889 | used, we need to record the index into .got.plt instead of | |
2890 | recomputing it from the PLT offset. */ | |
2891 | bfd_signed_vma got_offset; | |
2892 | }; | |
2893 | ||
2894 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ | |
b38cadfb NC |
2895 | struct arm_local_iplt_info |
2896 | { | |
34e77a92 RS |
2897 | /* The information that is usually found in the generic ELF part of |
2898 | the hash table entry. */ | |
2899 | union gotplt_union root; | |
2900 | ||
2901 | /* The information that is usually found in the ARM-specific part of | |
2902 | the hash table entry. */ | |
2903 | struct arm_plt_info arm; | |
2904 | ||
2905 | /* A list of all potential dynamic relocations against this symbol. */ | |
2906 | struct elf_dyn_relocs *dyn_relocs; | |
2907 | }; | |
2908 | ||
0ffa91dd | 2909 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
2910 | { |
2911 | struct elf_obj_tdata root; | |
2912 | ||
2913 | /* tls_type for each local got entry. */ | |
2914 | char *local_got_tls_type; | |
ee065d83 | 2915 | |
0855e32b NS |
2916 | /* GOTPLT entries for TLS descriptors. */ |
2917 | bfd_vma *local_tlsdesc_gotent; | |
2918 | ||
34e77a92 RS |
2919 | /* Information for local symbols that need entries in .iplt. */ |
2920 | struct arm_local_iplt_info **local_iplt; | |
2921 | ||
bf21ed78 MS |
2922 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
2923 | int no_enum_size_warning; | |
a9dc9481 JM |
2924 | |
2925 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
2926 | int no_wchar_size_warning; | |
ba93b8ac DJ |
2927 | }; |
2928 | ||
0ffa91dd NC |
2929 | #define elf_arm_tdata(bfd) \ |
2930 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 2931 | |
0ffa91dd NC |
2932 | #define elf32_arm_local_got_tls_type(bfd) \ |
2933 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
2934 | ||
0855e32b NS |
2935 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
2936 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) | |
2937 | ||
34e77a92 RS |
2938 | #define elf32_arm_local_iplt(bfd) \ |
2939 | (elf_arm_tdata (bfd)->local_iplt) | |
2940 | ||
0ffa91dd NC |
2941 | #define is_arm_elf(bfd) \ |
2942 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
2943 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 2944 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac DJ |
2945 | |
2946 | static bfd_boolean | |
2947 | elf32_arm_mkobject (bfd *abfd) | |
2948 | { | |
0ffa91dd | 2949 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 2950 | ARM_ELF_DATA); |
ba93b8ac DJ |
2951 | } |
2952 | ||
ba93b8ac DJ |
2953 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
2954 | ||
ba96a88f | 2955 | /* Arm ELF linker hash entry. */ |
252b5132 | 2956 | struct elf32_arm_link_hash_entry |
b38cadfb NC |
2957 | { |
2958 | struct elf_link_hash_entry root; | |
252b5132 | 2959 | |
b38cadfb NC |
2960 | /* Track dynamic relocs copied for this symbol. */ |
2961 | struct elf_dyn_relocs *dyn_relocs; | |
b7693d02 | 2962 | |
b38cadfb NC |
2963 | /* ARM-specific PLT information. */ |
2964 | struct arm_plt_info plt; | |
ba93b8ac DJ |
2965 | |
2966 | #define GOT_UNKNOWN 0 | |
2967 | #define GOT_NORMAL 1 | |
2968 | #define GOT_TLS_GD 2 | |
2969 | #define GOT_TLS_IE 4 | |
0855e32b NS |
2970 | #define GOT_TLS_GDESC 8 |
2971 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) | |
b38cadfb | 2972 | unsigned int tls_type : 8; |
34e77a92 | 2973 | |
b38cadfb NC |
2974 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ |
2975 | unsigned int is_iplt : 1; | |
34e77a92 | 2976 | |
b38cadfb | 2977 | unsigned int unused : 23; |
a4fd1a8e | 2978 | |
b38cadfb NC |
2979 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
2980 | starting at the end of the jump table. */ | |
2981 | bfd_vma tlsdesc_got; | |
0855e32b | 2982 | |
b38cadfb NC |
2983 | /* The symbol marking the real symbol location for exported thumb |
2984 | symbols with Arm stubs. */ | |
2985 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 2986 | |
b38cadfb | 2987 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 2988 | symbol. */ |
b38cadfb NC |
2989 | struct elf32_arm_stub_hash_entry *stub_cache; |
2990 | }; | |
252b5132 | 2991 | |
252b5132 | 2992 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
2993 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
2994 | (elf_link_hash_traverse \ | |
2995 | (&(table)->root, \ | |
b7693d02 | 2996 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
2997 | (info))) |
2998 | ||
2999 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
3000 | #define elf32_arm_hash_table(info) \ | |
4dfe6ac6 NC |
3001 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
3002 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) | |
252b5132 | 3003 | |
906e58ca NC |
3004 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
3005 | ((struct elf32_arm_stub_hash_entry *) \ | |
3006 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
3007 | ||
21d799b5 NC |
3008 | /* Array to keep track of which stub sections have been created, and |
3009 | information on stub grouping. */ | |
3010 | struct map_stub | |
3011 | { | |
3012 | /* This is the section to which stubs in the group will be | |
3013 | attached. */ | |
3014 | asection *link_sec; | |
3015 | /* The stub section. */ | |
3016 | asection *stub_sec; | |
3017 | }; | |
3018 | ||
0855e32b NS |
3019 | #define elf32_arm_compute_jump_table_size(htab) \ |
3020 | ((htab)->next_tls_desc_index * 4) | |
3021 | ||
9b485d32 | 3022 | /* ARM ELF linker hash table. */ |
252b5132 | 3023 | struct elf32_arm_link_hash_table |
906e58ca NC |
3024 | { |
3025 | /* The main hash table. */ | |
3026 | struct elf_link_hash_table root; | |
252b5132 | 3027 | |
906e58ca NC |
3028 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
3029 | bfd_size_type thumb_glue_size; | |
252b5132 | 3030 | |
906e58ca NC |
3031 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
3032 | bfd_size_type arm_glue_size; | |
252b5132 | 3033 | |
906e58ca NC |
3034 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
3035 | bfd_size_type bx_glue_size; | |
845b51d6 | 3036 | |
906e58ca NC |
3037 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
3038 | veneer has been populated. */ | |
3039 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 3040 | |
906e58ca NC |
3041 | /* The size in bytes of the section containing glue for VFP11 erratum |
3042 | veneers. */ | |
3043 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 3044 | |
a504d23a LA |
3045 | /* The size in bytes of the section containing glue for STM32L4XX erratum |
3046 | veneers. */ | |
3047 | bfd_size_type stm32l4xx_erratum_glue_size; | |
3048 | ||
48229727 JB |
3049 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
3050 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
3051 | elf32_arm_write_section(). */ | |
3052 | struct a8_erratum_fix *a8_erratum_fixes; | |
3053 | unsigned int num_a8_erratum_fixes; | |
3054 | ||
906e58ca NC |
3055 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
3056 | bfd * bfd_of_glue_owner; | |
ba96a88f | 3057 | |
906e58ca NC |
3058 | /* Nonzero to output a BE8 image. */ |
3059 | int byteswap_code; | |
e489d0ae | 3060 | |
906e58ca NC |
3061 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
3062 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
3063 | int target1_is_rel; | |
9c504268 | 3064 | |
906e58ca NC |
3065 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
3066 | int target2_reloc; | |
eb043451 | 3067 | |
906e58ca NC |
3068 | /* 0 = Ignore R_ARM_V4BX. |
3069 | 1 = Convert BX to MOV PC. | |
3070 | 2 = Generate v4 interworing stubs. */ | |
3071 | int fix_v4bx; | |
319850b4 | 3072 | |
48229727 JB |
3073 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
3074 | int fix_cortex_a8; | |
3075 | ||
2de70689 MGD |
3076 | /* Whether we should fix the ARM1176 BLX immediate issue. */ |
3077 | int fix_arm1176; | |
3078 | ||
906e58ca NC |
3079 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
3080 | int use_blx; | |
33bfe774 | 3081 | |
906e58ca NC |
3082 | /* What sort of code sequences we should look for which may trigger the |
3083 | VFP11 denorm erratum. */ | |
3084 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 3085 | |
906e58ca NC |
3086 | /* Global counter for the number of fixes we have emitted. */ |
3087 | int num_vfp11_fixes; | |
c7b8f16e | 3088 | |
a504d23a LA |
3089 | /* What sort of code sequences we should look for which may trigger the |
3090 | STM32L4XX erratum. */ | |
3091 | bfd_arm_stm32l4xx_fix stm32l4xx_fix; | |
3092 | ||
3093 | /* Global counter for the number of fixes we have emitted. */ | |
3094 | int num_stm32l4xx_fixes; | |
3095 | ||
906e58ca NC |
3096 | /* Nonzero to force PIC branch veneers. */ |
3097 | int pic_veneer; | |
27e55c4d | 3098 | |
906e58ca NC |
3099 | /* The number of bytes in the initial entry in the PLT. */ |
3100 | bfd_size_type plt_header_size; | |
e5a52504 | 3101 | |
906e58ca NC |
3102 | /* The number of bytes in the subsequent PLT etries. */ |
3103 | bfd_size_type plt_entry_size; | |
e5a52504 | 3104 | |
906e58ca NC |
3105 | /* True if the target system is VxWorks. */ |
3106 | int vxworks_p; | |
00a97672 | 3107 | |
906e58ca NC |
3108 | /* True if the target system is Symbian OS. */ |
3109 | int symbian_p; | |
e5a52504 | 3110 | |
b38cadfb NC |
3111 | /* True if the target system is Native Client. */ |
3112 | int nacl_p; | |
3113 | ||
906e58ca NC |
3114 | /* True if the target uses REL relocations. */ |
3115 | int use_rel; | |
4e7fd91e | 3116 | |
0855e32b NS |
3117 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
3118 | bfd_vma next_tls_desc_index; | |
3119 | ||
3120 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ | |
3121 | bfd_vma num_tls_desc; | |
3122 | ||
906e58ca | 3123 | /* Short-cuts to get to dynamic linker sections. */ |
906e58ca NC |
3124 | asection *sdynbss; |
3125 | asection *srelbss; | |
5e681ec4 | 3126 | |
906e58ca NC |
3127 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
3128 | asection *srelplt2; | |
00a97672 | 3129 | |
0855e32b NS |
3130 | /* The offset into splt of the PLT entry for the TLS descriptor |
3131 | resolver. Special values are 0, if not necessary (or not found | |
3132 | to be necessary yet), and -1 if needed but not determined | |
3133 | yet. */ | |
3134 | bfd_vma dt_tlsdesc_plt; | |
3135 | ||
3136 | /* The offset into sgot of the GOT entry used by the PLT entry | |
3137 | above. */ | |
b38cadfb | 3138 | bfd_vma dt_tlsdesc_got; |
0855e32b NS |
3139 | |
3140 | /* Offset in .plt section of tls_arm_trampoline. */ | |
3141 | bfd_vma tls_trampoline; | |
3142 | ||
906e58ca NC |
3143 | /* Data for R_ARM_TLS_LDM32 relocations. */ |
3144 | union | |
3145 | { | |
3146 | bfd_signed_vma refcount; | |
3147 | bfd_vma offset; | |
3148 | } tls_ldm_got; | |
b7693d02 | 3149 | |
87d72d41 AM |
3150 | /* Small local sym cache. */ |
3151 | struct sym_cache sym_cache; | |
906e58ca NC |
3152 | |
3153 | /* For convenience in allocate_dynrelocs. */ | |
3154 | bfd * obfd; | |
3155 | ||
0855e32b NS |
3156 | /* The amount of space used by the reserved portion of the sgotplt |
3157 | section, plus whatever space is used by the jump slots. */ | |
3158 | bfd_vma sgotplt_jump_table_size; | |
3159 | ||
906e58ca NC |
3160 | /* The stub hash table. */ |
3161 | struct bfd_hash_table stub_hash_table; | |
3162 | ||
3163 | /* Linker stub bfd. */ | |
3164 | bfd *stub_bfd; | |
3165 | ||
3166 | /* Linker call-backs. */ | |
6bde4c52 TP |
3167 | asection * (*add_stub_section) (const char *, asection *, asection *, |
3168 | unsigned int); | |
906e58ca NC |
3169 | void (*layout_sections_again) (void); |
3170 | ||
3171 | /* Array to keep track of which stub sections have been created, and | |
3172 | information on stub grouping. */ | |
21d799b5 | 3173 | struct map_stub *stub_group; |
906e58ca | 3174 | |
fe33d2fa | 3175 | /* Number of elements in stub_group. */ |
7292b3ac | 3176 | unsigned int top_id; |
fe33d2fa | 3177 | |
906e58ca NC |
3178 | /* Assorted information used by elf32_arm_size_stubs. */ |
3179 | unsigned int bfd_count; | |
7292b3ac | 3180 | unsigned int top_index; |
906e58ca NC |
3181 | asection **input_list; |
3182 | }; | |
252b5132 | 3183 | |
a504d23a LA |
3184 | static inline int |
3185 | ctz (unsigned int mask) | |
3186 | { | |
3187 | #if GCC_VERSION >= 3004 | |
3188 | return __builtin_ctz (mask); | |
3189 | #else | |
3190 | unsigned int i; | |
3191 | ||
3192 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3193 | { | |
3194 | if (mask & 0x1) | |
3195 | break; | |
3196 | mask = (mask >> 1); | |
3197 | } | |
3198 | return i; | |
3199 | #endif | |
3200 | } | |
3201 | ||
3202 | static inline int | |
3203 | popcount (unsigned int mask) | |
3204 | { | |
3205 | #if GCC_VERSION >= 3004 | |
3206 | return __builtin_popcount (mask); | |
3207 | #else | |
3208 | unsigned int i, sum = 0; | |
3209 | ||
3210 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3211 | { | |
3212 | if (mask & 0x1) | |
3213 | sum++; | |
3214 | mask = (mask >> 1); | |
3215 | } | |
3216 | return sum; | |
3217 | #endif | |
3218 | } | |
3219 | ||
780a67af NC |
3220 | /* Create an entry in an ARM ELF linker hash table. */ |
3221 | ||
3222 | static struct bfd_hash_entry * | |
57e8b36a | 3223 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
99059e56 RM |
3224 | struct bfd_hash_table * table, |
3225 | const char * string) | |
780a67af NC |
3226 | { |
3227 | struct elf32_arm_link_hash_entry * ret = | |
3228 | (struct elf32_arm_link_hash_entry *) entry; | |
3229 | ||
3230 | /* Allocate the structure if it has not already been allocated by a | |
3231 | subclass. */ | |
906e58ca | 3232 | if (ret == NULL) |
21d799b5 | 3233 | ret = (struct elf32_arm_link_hash_entry *) |
99059e56 | 3234 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); |
57e8b36a | 3235 | if (ret == NULL) |
780a67af NC |
3236 | return (struct bfd_hash_entry *) ret; |
3237 | ||
3238 | /* Call the allocation method of the superclass. */ | |
3239 | ret = ((struct elf32_arm_link_hash_entry *) | |
3240 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
3241 | table, string)); | |
57e8b36a | 3242 | if (ret != NULL) |
b7693d02 | 3243 | { |
0bdcacaf | 3244 | ret->dyn_relocs = NULL; |
ba93b8ac | 3245 | ret->tls_type = GOT_UNKNOWN; |
0855e32b | 3246 | ret->tlsdesc_got = (bfd_vma) -1; |
34e77a92 RS |
3247 | ret->plt.thumb_refcount = 0; |
3248 | ret->plt.maybe_thumb_refcount = 0; | |
3249 | ret->plt.noncall_refcount = 0; | |
3250 | ret->plt.got_offset = -1; | |
3251 | ret->is_iplt = FALSE; | |
a4fd1a8e | 3252 | ret->export_glue = NULL; |
906e58ca NC |
3253 | |
3254 | ret->stub_cache = NULL; | |
b7693d02 | 3255 | } |
780a67af NC |
3256 | |
3257 | return (struct bfd_hash_entry *) ret; | |
3258 | } | |
3259 | ||
34e77a92 RS |
3260 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
3261 | symbols. */ | |
3262 | ||
3263 | static bfd_boolean | |
3264 | elf32_arm_allocate_local_sym_info (bfd *abfd) | |
3265 | { | |
3266 | if (elf_local_got_refcounts (abfd) == NULL) | |
3267 | { | |
3268 | bfd_size_type num_syms; | |
3269 | bfd_size_type size; | |
3270 | char *data; | |
3271 | ||
3272 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; | |
3273 | size = num_syms * (sizeof (bfd_signed_vma) | |
3274 | + sizeof (struct arm_local_iplt_info *) | |
3275 | + sizeof (bfd_vma) | |
3276 | + sizeof (char)); | |
3277 | data = bfd_zalloc (abfd, size); | |
3278 | if (data == NULL) | |
3279 | return FALSE; | |
3280 | ||
3281 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data; | |
3282 | data += num_syms * sizeof (bfd_signed_vma); | |
3283 | ||
3284 | elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data; | |
3285 | data += num_syms * sizeof (struct arm_local_iplt_info *); | |
3286 | ||
3287 | elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data; | |
3288 | data += num_syms * sizeof (bfd_vma); | |
3289 | ||
3290 | elf32_arm_local_got_tls_type (abfd) = data; | |
3291 | } | |
3292 | return TRUE; | |
3293 | } | |
3294 | ||
3295 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs | |
3296 | to input bfd ABFD. Create the information if it doesn't already exist. | |
3297 | Return null if an allocation fails. */ | |
3298 | ||
3299 | static struct arm_local_iplt_info * | |
3300 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) | |
3301 | { | |
3302 | struct arm_local_iplt_info **ptr; | |
3303 | ||
3304 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
3305 | return NULL; | |
3306 | ||
3307 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); | |
3308 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; | |
3309 | if (*ptr == NULL) | |
3310 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); | |
3311 | return *ptr; | |
3312 | } | |
3313 | ||
3314 | /* Try to obtain PLT information for the symbol with index R_SYMNDX | |
3315 | in ABFD's symbol table. If the symbol is global, H points to its | |
3316 | hash table entry, otherwise H is null. | |
3317 | ||
3318 | Return true if the symbol does have PLT information. When returning | |
3319 | true, point *ROOT_PLT at the target-independent reference count/offset | |
3320 | union and *ARM_PLT at the ARM-specific information. */ | |
3321 | ||
3322 | static bfd_boolean | |
3323 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h, | |
3324 | unsigned long r_symndx, union gotplt_union **root_plt, | |
3325 | struct arm_plt_info **arm_plt) | |
3326 | { | |
3327 | struct arm_local_iplt_info *local_iplt; | |
3328 | ||
3329 | if (h != NULL) | |
3330 | { | |
3331 | *root_plt = &h->root.plt; | |
3332 | *arm_plt = &h->plt; | |
3333 | return TRUE; | |
3334 | } | |
3335 | ||
3336 | if (elf32_arm_local_iplt (abfd) == NULL) | |
3337 | return FALSE; | |
3338 | ||
3339 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; | |
3340 | if (local_iplt == NULL) | |
3341 | return FALSE; | |
3342 | ||
3343 | *root_plt = &local_iplt->root; | |
3344 | *arm_plt = &local_iplt->arm; | |
3345 | return TRUE; | |
3346 | } | |
3347 | ||
3348 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub | |
3349 | before it. */ | |
3350 | ||
3351 | static bfd_boolean | |
3352 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, | |
3353 | struct arm_plt_info *arm_plt) | |
3354 | { | |
3355 | struct elf32_arm_link_hash_table *htab; | |
3356 | ||
3357 | htab = elf32_arm_hash_table (info); | |
3358 | return (arm_plt->thumb_refcount != 0 | |
3359 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)); | |
3360 | } | |
3361 | ||
3362 | /* Return a pointer to the head of the dynamic reloc list that should | |
3363 | be used for local symbol ISYM, which is symbol number R_SYMNDX in | |
3364 | ABFD's symbol table. Return null if an error occurs. */ | |
3365 | ||
3366 | static struct elf_dyn_relocs ** | |
3367 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, | |
3368 | Elf_Internal_Sym *isym) | |
3369 | { | |
3370 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) | |
3371 | { | |
3372 | struct arm_local_iplt_info *local_iplt; | |
3373 | ||
3374 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
3375 | if (local_iplt == NULL) | |
3376 | return NULL; | |
3377 | return &local_iplt->dyn_relocs; | |
3378 | } | |
3379 | else | |
3380 | { | |
3381 | /* Track dynamic relocs needed for local syms too. | |
3382 | We really need local syms available to do this | |
3383 | easily. Oh well. */ | |
3384 | asection *s; | |
3385 | void *vpp; | |
3386 | ||
3387 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
3388 | if (s == NULL) | |
3389 | abort (); | |
3390 | ||
3391 | vpp = &elf_section_data (s)->local_dynrel; | |
3392 | return (struct elf_dyn_relocs **) vpp; | |
3393 | } | |
3394 | } | |
3395 | ||
906e58ca NC |
3396 | /* Initialize an entry in the stub hash table. */ |
3397 | ||
3398 | static struct bfd_hash_entry * | |
3399 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
3400 | struct bfd_hash_table *table, | |
3401 | const char *string) | |
3402 | { | |
3403 | /* Allocate the structure if it has not already been allocated by a | |
3404 | subclass. */ | |
3405 | if (entry == NULL) | |
3406 | { | |
21d799b5 | 3407 | entry = (struct bfd_hash_entry *) |
99059e56 | 3408 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); |
906e58ca NC |
3409 | if (entry == NULL) |
3410 | return entry; | |
3411 | } | |
3412 | ||
3413 | /* Call the allocation method of the superclass. */ | |
3414 | entry = bfd_hash_newfunc (entry, table, string); | |
3415 | if (entry != NULL) | |
3416 | { | |
3417 | struct elf32_arm_stub_hash_entry *eh; | |
3418 | ||
3419 | /* Initialize the local fields. */ | |
3420 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
3421 | eh->stub_sec = NULL; | |
3422 | eh->stub_offset = 0; | |
8d9d9490 | 3423 | eh->source_value = 0; |
906e58ca NC |
3424 | eh->target_value = 0; |
3425 | eh->target_section = NULL; | |
cedfb179 | 3426 | eh->orig_insn = 0; |
906e58ca | 3427 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
3428 | eh->stub_size = 0; |
3429 | eh->stub_template = NULL; | |
3430 | eh->stub_template_size = 0; | |
906e58ca NC |
3431 | eh->h = NULL; |
3432 | eh->id_sec = NULL; | |
d8d2f433 | 3433 | eh->output_name = NULL; |
906e58ca NC |
3434 | } |
3435 | ||
3436 | return entry; | |
3437 | } | |
3438 | ||
00a97672 | 3439 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
3440 | shortcuts to them in our hash table. */ |
3441 | ||
3442 | static bfd_boolean | |
57e8b36a | 3443 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3444 | { |
3445 | struct elf32_arm_link_hash_table *htab; | |
3446 | ||
e5a52504 | 3447 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3448 | if (htab == NULL) |
3449 | return FALSE; | |
3450 | ||
e5a52504 MM |
3451 | /* BPABI objects never have a GOT, or associated sections. */ |
3452 | if (htab->symbian_p) | |
3453 | return TRUE; | |
3454 | ||
5e681ec4 PB |
3455 | if (! _bfd_elf_create_got_section (dynobj, info)) |
3456 | return FALSE; | |
3457 | ||
5e681ec4 PB |
3458 | return TRUE; |
3459 | } | |
3460 | ||
34e77a92 RS |
3461 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
3462 | ||
3463 | static bfd_boolean | |
3464 | create_ifunc_sections (struct bfd_link_info *info) | |
3465 | { | |
3466 | struct elf32_arm_link_hash_table *htab; | |
3467 | const struct elf_backend_data *bed; | |
3468 | bfd *dynobj; | |
3469 | asection *s; | |
3470 | flagword flags; | |
b38cadfb | 3471 | |
34e77a92 RS |
3472 | htab = elf32_arm_hash_table (info); |
3473 | dynobj = htab->root.dynobj; | |
3474 | bed = get_elf_backend_data (dynobj); | |
3475 | flags = bed->dynamic_sec_flags; | |
3476 | ||
3477 | if (htab->root.iplt == NULL) | |
3478 | { | |
3d4d4302 AM |
3479 | s = bfd_make_section_anyway_with_flags (dynobj, ".iplt", |
3480 | flags | SEC_READONLY | SEC_CODE); | |
34e77a92 | 3481 | if (s == NULL |
a0f49396 | 3482 | || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment)) |
34e77a92 RS |
3483 | return FALSE; |
3484 | htab->root.iplt = s; | |
3485 | } | |
3486 | ||
3487 | if (htab->root.irelplt == NULL) | |
3488 | { | |
3d4d4302 AM |
3489 | s = bfd_make_section_anyway_with_flags (dynobj, |
3490 | RELOC_SECTION (htab, ".iplt"), | |
3491 | flags | SEC_READONLY); | |
34e77a92 | 3492 | if (s == NULL |
a0f49396 | 3493 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) |
34e77a92 RS |
3494 | return FALSE; |
3495 | htab->root.irelplt = s; | |
3496 | } | |
3497 | ||
3498 | if (htab->root.igotplt == NULL) | |
3499 | { | |
3d4d4302 | 3500 | s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags); |
34e77a92 RS |
3501 | if (s == NULL |
3502 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) | |
3503 | return FALSE; | |
3504 | htab->root.igotplt = s; | |
3505 | } | |
3506 | return TRUE; | |
3507 | } | |
3508 | ||
eed94f8f NC |
3509 | /* Determine if we're dealing with a Thumb only architecture. */ |
3510 | ||
3511 | static bfd_boolean | |
3512 | using_thumb_only (struct elf32_arm_link_hash_table *globals) | |
3513 | { | |
2fd158eb TP |
3514 | int arch; |
3515 | int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3516 | Tag_CPU_arch_profile); | |
eed94f8f | 3517 | |
2fd158eb TP |
3518 | if (profile) |
3519 | return profile == 'M'; | |
eed94f8f | 3520 | |
2fd158eb | 3521 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
eed94f8f | 3522 | |
2fd158eb TP |
3523 | if (arch == TAG_CPU_ARCH_V6_M |
3524 | || arch == TAG_CPU_ARCH_V6S_M | |
3525 | || arch == TAG_CPU_ARCH_V7E_M | |
3526 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3527 | || arch == TAG_CPU_ARCH_V8M_MAIN) | |
3528 | return TRUE; | |
eed94f8f | 3529 | |
2fd158eb | 3530 | return FALSE; |
eed94f8f NC |
3531 | } |
3532 | ||
3533 | /* Determine if we're dealing with a Thumb-2 object. */ | |
3534 | ||
3535 | static bfd_boolean | |
3536 | using_thumb2 (struct elf32_arm_link_hash_table *globals) | |
3537 | { | |
3538 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3539 | Tag_CPU_arch); | |
3540 | return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7; | |
3541 | } | |
3542 | ||
00a97672 RS |
3543 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
3544 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
3545 | hash table. */ |
3546 | ||
3547 | static bfd_boolean | |
57e8b36a | 3548 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3549 | { |
3550 | struct elf32_arm_link_hash_table *htab; | |
3551 | ||
3552 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3553 | if (htab == NULL) |
3554 | return FALSE; | |
3555 | ||
362d30a1 | 3556 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
5e681ec4 PB |
3557 | return FALSE; |
3558 | ||
3559 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
3560 | return FALSE; | |
3561 | ||
3d4d4302 | 3562 | htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss"); |
0e1862bb | 3563 | if (!bfd_link_pic (info)) |
3d4d4302 AM |
3564 | htab->srelbss = bfd_get_linker_section (dynobj, |
3565 | RELOC_SECTION (htab, ".bss")); | |
00a97672 RS |
3566 | |
3567 | if (htab->vxworks_p) | |
3568 | { | |
3569 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
3570 | return FALSE; | |
3571 | ||
0e1862bb | 3572 | if (bfd_link_pic (info)) |
00a97672 RS |
3573 | { |
3574 | htab->plt_header_size = 0; | |
3575 | htab->plt_entry_size | |
3576 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
3577 | } | |
3578 | else | |
3579 | { | |
3580 | htab->plt_header_size | |
3581 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
3582 | htab->plt_entry_size | |
3583 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
3584 | } | |
aebf9be7 NC |
3585 | |
3586 | if (elf_elfheader (dynobj)) | |
3587 | elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32; | |
00a97672 | 3588 | } |
eed94f8f NC |
3589 | else |
3590 | { | |
3591 | /* PR ld/16017 | |
3592 | Test for thumb only architectures. Note - we cannot just call | |
3593 | using_thumb_only() as the attributes in the output bfd have not been | |
3594 | initialised at this point, so instead we use the input bfd. */ | |
3595 | bfd * saved_obfd = htab->obfd; | |
3596 | ||
3597 | htab->obfd = dynobj; | |
3598 | if (using_thumb_only (htab)) | |
3599 | { | |
3600 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
3601 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); | |
3602 | } | |
3603 | htab->obfd = saved_obfd; | |
3604 | } | |
5e681ec4 | 3605 | |
362d30a1 RS |
3606 | if (!htab->root.splt |
3607 | || !htab->root.srelplt | |
e5a52504 | 3608 | || !htab->sdynbss |
0e1862bb | 3609 | || (!bfd_link_pic (info) && !htab->srelbss)) |
5e681ec4 PB |
3610 | abort (); |
3611 | ||
3612 | return TRUE; | |
3613 | } | |
3614 | ||
906e58ca NC |
3615 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
3616 | ||
3617 | static void | |
3618 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
3619 | struct elf_link_hash_entry *dir, | |
3620 | struct elf_link_hash_entry *ind) | |
3621 | { | |
3622 | struct elf32_arm_link_hash_entry *edir, *eind; | |
3623 | ||
3624 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
3625 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
3626 | ||
0bdcacaf | 3627 | if (eind->dyn_relocs != NULL) |
906e58ca | 3628 | { |
0bdcacaf | 3629 | if (edir->dyn_relocs != NULL) |
906e58ca | 3630 | { |
0bdcacaf RS |
3631 | struct elf_dyn_relocs **pp; |
3632 | struct elf_dyn_relocs *p; | |
906e58ca NC |
3633 | |
3634 | /* Add reloc counts against the indirect sym to the direct sym | |
3635 | list. Merge any entries against the same section. */ | |
0bdcacaf | 3636 | for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) |
906e58ca | 3637 | { |
0bdcacaf | 3638 | struct elf_dyn_relocs *q; |
906e58ca | 3639 | |
0bdcacaf RS |
3640 | for (q = edir->dyn_relocs; q != NULL; q = q->next) |
3641 | if (q->sec == p->sec) | |
906e58ca NC |
3642 | { |
3643 | q->pc_count += p->pc_count; | |
3644 | q->count += p->count; | |
3645 | *pp = p->next; | |
3646 | break; | |
3647 | } | |
3648 | if (q == NULL) | |
3649 | pp = &p->next; | |
3650 | } | |
0bdcacaf | 3651 | *pp = edir->dyn_relocs; |
906e58ca NC |
3652 | } |
3653 | ||
0bdcacaf RS |
3654 | edir->dyn_relocs = eind->dyn_relocs; |
3655 | eind->dyn_relocs = NULL; | |
906e58ca NC |
3656 | } |
3657 | ||
3658 | if (ind->root.type == bfd_link_hash_indirect) | |
3659 | { | |
3660 | /* Copy over PLT info. */ | |
34e77a92 RS |
3661 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
3662 | eind->plt.thumb_refcount = 0; | |
3663 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; | |
3664 | eind->plt.maybe_thumb_refcount = 0; | |
3665 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; | |
3666 | eind->plt.noncall_refcount = 0; | |
3667 | ||
3668 | /* We should only allocate a function to .iplt once the final | |
3669 | symbol information is known. */ | |
3670 | BFD_ASSERT (!eind->is_iplt); | |
906e58ca NC |
3671 | |
3672 | if (dir->got.refcount <= 0) | |
3673 | { | |
3674 | edir->tls_type = eind->tls_type; | |
3675 | eind->tls_type = GOT_UNKNOWN; | |
3676 | } | |
3677 | } | |
3678 | ||
3679 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
3680 | } | |
3681 | ||
68faa637 AM |
3682 | /* Destroy an ARM elf linker hash table. */ |
3683 | ||
3684 | static void | |
d495ab0d | 3685 | elf32_arm_link_hash_table_free (bfd *obfd) |
68faa637 AM |
3686 | { |
3687 | struct elf32_arm_link_hash_table *ret | |
d495ab0d | 3688 | = (struct elf32_arm_link_hash_table *) obfd->link.hash; |
68faa637 AM |
3689 | |
3690 | bfd_hash_table_free (&ret->stub_hash_table); | |
d495ab0d | 3691 | _bfd_elf_link_hash_table_free (obfd); |
68faa637 AM |
3692 | } |
3693 | ||
906e58ca NC |
3694 | /* Create an ARM elf linker hash table. */ |
3695 | ||
3696 | static struct bfd_link_hash_table * | |
3697 | elf32_arm_link_hash_table_create (bfd *abfd) | |
3698 | { | |
3699 | struct elf32_arm_link_hash_table *ret; | |
3700 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); | |
3701 | ||
7bf52ea2 | 3702 | ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt); |
906e58ca NC |
3703 | if (ret == NULL) |
3704 | return NULL; | |
3705 | ||
3706 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
3707 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
3708 | sizeof (struct elf32_arm_link_hash_entry), |
3709 | ARM_ELF_DATA)) | |
906e58ca NC |
3710 | { |
3711 | free (ret); | |
3712 | return NULL; | |
3713 | } | |
3714 | ||
906e58ca | 3715 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
a504d23a | 3716 | ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE; |
906e58ca NC |
3717 | #ifdef FOUR_WORD_PLT |
3718 | ret->plt_header_size = 16; | |
3719 | ret->plt_entry_size = 16; | |
3720 | #else | |
3721 | ret->plt_header_size = 20; | |
1db37fe6 | 3722 | ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12; |
906e58ca | 3723 | #endif |
906e58ca | 3724 | ret->use_rel = 1; |
906e58ca | 3725 | ret->obfd = abfd; |
906e58ca NC |
3726 | |
3727 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
3728 | sizeof (struct elf32_arm_stub_hash_entry))) | |
3729 | { | |
d495ab0d | 3730 | _bfd_elf_link_hash_table_free (abfd); |
906e58ca NC |
3731 | return NULL; |
3732 | } | |
d495ab0d | 3733 | ret->root.root.hash_table_free = elf32_arm_link_hash_table_free; |
906e58ca NC |
3734 | |
3735 | return &ret->root.root; | |
3736 | } | |
3737 | ||
cd1dac3d DG |
3738 | /* Determine what kind of NOPs are available. */ |
3739 | ||
3740 | static bfd_boolean | |
3741 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) | |
3742 | { | |
3743 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3744 | Tag_CPU_arch); | |
3745 | return arch == TAG_CPU_ARCH_V6T2 | |
3746 | || arch == TAG_CPU_ARCH_V6K | |
9e3c6df6 PB |
3747 | || arch == TAG_CPU_ARCH_V7 |
3748 | || arch == TAG_CPU_ARCH_V7E_M; | |
cd1dac3d DG |
3749 | } |
3750 | ||
3751 | static bfd_boolean | |
3752 | arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals) | |
3753 | { | |
3754 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3755 | Tag_CPU_arch); | |
9e3c6df6 PB |
3756 | return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7 |
3757 | || arch == TAG_CPU_ARCH_V7E_M); | |
cd1dac3d DG |
3758 | } |
3759 | ||
f4ac8484 DJ |
3760 | static bfd_boolean |
3761 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) | |
3762 | { | |
3763 | switch (stub_type) | |
3764 | { | |
fea2b4d6 CL |
3765 | case arm_stub_long_branch_thumb_only: |
3766 | case arm_stub_long_branch_v4t_thumb_arm: | |
3767 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 | 3768 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
12352d3f | 3769 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
ebe24dd4 | 3770 | case arm_stub_long_branch_thumb_only_pic: |
f4ac8484 DJ |
3771 | return TRUE; |
3772 | case arm_stub_none: | |
3773 | BFD_FAIL (); | |
3774 | return FALSE; | |
3775 | break; | |
3776 | default: | |
3777 | return FALSE; | |
3778 | } | |
3779 | } | |
3780 | ||
906e58ca NC |
3781 | /* Determine the type of stub needed, if any, for a call. */ |
3782 | ||
3783 | static enum elf32_arm_stub_type | |
3784 | arm_type_of_stub (struct bfd_link_info *info, | |
3785 | asection *input_sec, | |
3786 | const Elf_Internal_Rela *rel, | |
34e77a92 | 3787 | unsigned char st_type, |
35fc36a8 | 3788 | enum arm_st_branch_type *actual_branch_type, |
906e58ca | 3789 | struct elf32_arm_link_hash_entry *hash, |
c820be07 NC |
3790 | bfd_vma destination, |
3791 | asection *sym_sec, | |
3792 | bfd *input_bfd, | |
3793 | const char *name) | |
906e58ca NC |
3794 | { |
3795 | bfd_vma location; | |
3796 | bfd_signed_vma branch_offset; | |
3797 | unsigned int r_type; | |
3798 | struct elf32_arm_link_hash_table * globals; | |
3799 | int thumb2; | |
3800 | int thumb_only; | |
3801 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5fa9e92f | 3802 | int use_plt = 0; |
35fc36a8 | 3803 | enum arm_st_branch_type branch_type = *actual_branch_type; |
34e77a92 RS |
3804 | union gotplt_union *root_plt; |
3805 | struct arm_plt_info *arm_plt; | |
906e58ca | 3806 | |
35fc36a8 | 3807 | if (branch_type == ST_BRANCH_LONG) |
da5938a2 NC |
3808 | return stub_type; |
3809 | ||
906e58ca | 3810 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3811 | if (globals == NULL) |
3812 | return stub_type; | |
906e58ca NC |
3813 | |
3814 | thumb_only = using_thumb_only (globals); | |
3815 | ||
3816 | thumb2 = using_thumb2 (globals); | |
3817 | ||
3818 | /* Determine where the call point is. */ | |
3819 | location = (input_sec->output_offset | |
3820 | + input_sec->output_section->vma | |
3821 | + rel->r_offset); | |
3822 | ||
906e58ca NC |
3823 | r_type = ELF32_R_TYPE (rel->r_info); |
3824 | ||
39f21624 NC |
3825 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
3826 | are considering a function call relocation. */ | |
c5423981 TG |
3827 | if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
3828 | || r_type == R_ARM_THM_JUMP19) | |
39f21624 NC |
3829 | && branch_type == ST_BRANCH_TO_ARM) |
3830 | branch_type = ST_BRANCH_TO_THUMB; | |
3831 | ||
34e77a92 RS |
3832 | /* For TLS call relocs, it is the caller's responsibility to provide |
3833 | the address of the appropriate trampoline. */ | |
3834 | if (r_type != R_ARM_TLS_CALL | |
3835 | && r_type != R_ARM_THM_TLS_CALL | |
3836 | && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info), | |
3837 | &root_plt, &arm_plt) | |
3838 | && root_plt->offset != (bfd_vma) -1) | |
5fa9e92f | 3839 | { |
34e77a92 | 3840 | asection *splt; |
fe33d2fa | 3841 | |
34e77a92 RS |
3842 | if (hash == NULL || hash->is_iplt) |
3843 | splt = globals->root.iplt; | |
3844 | else | |
3845 | splt = globals->root.splt; | |
3846 | if (splt != NULL) | |
b38cadfb | 3847 | { |
34e77a92 RS |
3848 | use_plt = 1; |
3849 | ||
3850 | /* Note when dealing with PLT entries: the main PLT stub is in | |
3851 | ARM mode, so if the branch is in Thumb mode, another | |
3852 | Thumb->ARM stub will be inserted later just before the ARM | |
3853 | PLT stub. We don't take this extra distance into account | |
3854 | here, because if a long branch stub is needed, we'll add a | |
3855 | Thumb->Arm one and branch directly to the ARM PLT entry | |
3856 | because it avoids spreading offset corrections in several | |
3857 | places. */ | |
3858 | ||
3859 | destination = (splt->output_section->vma | |
3860 | + splt->output_offset | |
3861 | + root_plt->offset); | |
3862 | st_type = STT_FUNC; | |
3863 | branch_type = ST_BRANCH_TO_ARM; | |
3864 | } | |
5fa9e92f | 3865 | } |
34e77a92 RS |
3866 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
3867 | BFD_ASSERT (st_type != STT_GNU_IFUNC); | |
906e58ca | 3868 | |
fe33d2fa CL |
3869 | branch_offset = (bfd_signed_vma)(destination - location); |
3870 | ||
0855e32b | 3871 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
c5423981 | 3872 | || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19) |
906e58ca | 3873 | { |
5fa9e92f CL |
3874 | /* Handle cases where: |
3875 | - this call goes too far (different Thumb/Thumb2 max | |
99059e56 | 3876 | distance) |
155d87d7 | 3877 | - it's a Thumb->Arm call and blx is not available, or it's a |
99059e56 RM |
3878 | Thumb->Arm branch (not bl). A stub is needed in this case, |
3879 | but only if this call is not through a PLT entry. Indeed, | |
3880 | PLT stubs handle mode switching already. | |
5fa9e92f | 3881 | */ |
906e58ca NC |
3882 | if ((!thumb2 |
3883 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
3884 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
3885 | || (thumb2 | |
3886 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
3887 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
c5423981 TG |
3888 | || (thumb2 |
3889 | && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET | |
3890 | || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET)) | |
3891 | && (r_type == R_ARM_THM_JUMP19)) | |
35fc36a8 | 3892 | || (branch_type == ST_BRANCH_TO_ARM |
0855e32b NS |
3893 | && (((r_type == R_ARM_THM_CALL |
3894 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) | |
c5423981 TG |
3895 | || (r_type == R_ARM_THM_JUMP24) |
3896 | || (r_type == R_ARM_THM_JUMP19)) | |
5fa9e92f | 3897 | && !use_plt)) |
906e58ca | 3898 | { |
35fc36a8 | 3899 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3900 | { |
3901 | /* Thumb to thumb. */ | |
3902 | if (!thumb_only) | |
3903 | { | |
0e1862bb | 3904 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 3905 | /* PIC stubs. */ |
155d87d7 | 3906 | ? ((globals->use_blx |
9553db3c | 3907 | && (r_type == R_ARM_THM_CALL)) |
155d87d7 CL |
3908 | /* V5T and above. Stub starts with ARM code, so |
3909 | we must be able to switch mode before | |
3910 | reaching it, which is only possible for 'bl' | |
3911 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 3912 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 3913 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 3914 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
3915 | |
3916 | /* non-PIC stubs. */ | |
155d87d7 | 3917 | : ((globals->use_blx |
9553db3c | 3918 | && (r_type == R_ARM_THM_CALL)) |
c2b4a39d CL |
3919 | /* V5T and above. */ |
3920 | ? arm_stub_long_branch_any_any | |
3921 | /* V4T. */ | |
d3626fb0 | 3922 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
3923 | } |
3924 | else | |
3925 | { | |
0e1862bb | 3926 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
ebe24dd4 CL |
3927 | /* PIC stub. */ |
3928 | ? arm_stub_long_branch_thumb_only_pic | |
c2b4a39d CL |
3929 | /* non-PIC stub. */ |
3930 | : arm_stub_long_branch_thumb_only; | |
906e58ca NC |
3931 | } |
3932 | } | |
3933 | else | |
3934 | { | |
3935 | /* Thumb to arm. */ | |
c820be07 NC |
3936 | if (sym_sec != NULL |
3937 | && sym_sec->owner != NULL | |
3938 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3939 | { | |
3940 | (*_bfd_error_handler) | |
3941 | (_("%B(%s): warning: interworking not enabled.\n" | |
3942 | " first occurrence: %B: Thumb call to ARM"), | |
3943 | sym_sec->owner, input_bfd, name); | |
3944 | } | |
3945 | ||
0855e32b | 3946 | stub_type = |
0e1862bb | 3947 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 3948 | /* PIC stubs. */ |
0855e32b | 3949 | ? (r_type == R_ARM_THM_TLS_CALL |
6a631e86 | 3950 | /* TLS PIC stubs. */ |
0855e32b NS |
3951 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic |
3952 | : arm_stub_long_branch_v4t_thumb_tls_pic) | |
3953 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) | |
3954 | /* V5T PIC and above. */ | |
3955 | ? arm_stub_long_branch_any_arm_pic | |
3956 | /* V4T PIC stub. */ | |
3957 | : arm_stub_long_branch_v4t_thumb_arm_pic)) | |
c2b4a39d CL |
3958 | |
3959 | /* non-PIC stubs. */ | |
0855e32b | 3960 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
c2b4a39d CL |
3961 | /* V5T and above. */ |
3962 | ? arm_stub_long_branch_any_any | |
3963 | /* V4T. */ | |
3964 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
3965 | |
3966 | /* Handle v4t short branches. */ | |
fea2b4d6 | 3967 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
3968 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
3969 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 3970 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
3971 | } |
3972 | } | |
3973 | } | |
fe33d2fa CL |
3974 | else if (r_type == R_ARM_CALL |
3975 | || r_type == R_ARM_JUMP24 | |
0855e32b NS |
3976 | || r_type == R_ARM_PLT32 |
3977 | || r_type == R_ARM_TLS_CALL) | |
906e58ca | 3978 | { |
35fc36a8 | 3979 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3980 | { |
3981 | /* Arm to thumb. */ | |
c820be07 NC |
3982 | |
3983 | if (sym_sec != NULL | |
3984 | && sym_sec->owner != NULL | |
3985 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3986 | { | |
3987 | (*_bfd_error_handler) | |
3988 | (_("%B(%s): warning: interworking not enabled.\n" | |
c2b4a39d | 3989 | " first occurrence: %B: ARM call to Thumb"), |
c820be07 NC |
3990 | sym_sec->owner, input_bfd, name); |
3991 | } | |
3992 | ||
3993 | /* We have an extra 2-bytes reach because of | |
3994 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
3995 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
3996 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
0855e32b | 3997 | || (r_type == R_ARM_CALL && !globals->use_blx) |
4116d8d7 PB |
3998 | || (r_type == R_ARM_JUMP24) |
3999 | || (r_type == R_ARM_PLT32)) | |
906e58ca | 4000 | { |
0e1862bb | 4001 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4002 | /* PIC stubs. */ |
ebe24dd4 CL |
4003 | ? ((globals->use_blx) |
4004 | /* V5T and above. */ | |
4005 | ? arm_stub_long_branch_any_thumb_pic | |
4006 | /* V4T stub. */ | |
4007 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
4008 | ||
c2b4a39d CL |
4009 | /* non-PIC stubs. */ |
4010 | : ((globals->use_blx) | |
4011 | /* V5T and above. */ | |
4012 | ? arm_stub_long_branch_any_any | |
4013 | /* V4T. */ | |
4014 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
4015 | } |
4016 | } | |
4017 | else | |
4018 | { | |
4019 | /* Arm to arm. */ | |
4020 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
4021 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
4022 | { | |
0855e32b | 4023 | stub_type = |
0e1862bb | 4024 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4025 | /* PIC stubs. */ |
0855e32b | 4026 | ? (r_type == R_ARM_TLS_CALL |
6a631e86 | 4027 | /* TLS PIC Stub. */ |
0855e32b | 4028 | ? arm_stub_long_branch_any_tls_pic |
7a89b94e NC |
4029 | : (globals->nacl_p |
4030 | ? arm_stub_long_branch_arm_nacl_pic | |
4031 | : arm_stub_long_branch_any_arm_pic)) | |
c2b4a39d | 4032 | /* non-PIC stubs. */ |
7a89b94e NC |
4033 | : (globals->nacl_p |
4034 | ? arm_stub_long_branch_arm_nacl | |
4035 | : arm_stub_long_branch_any_any); | |
906e58ca NC |
4036 | } |
4037 | } | |
4038 | } | |
4039 | ||
fe33d2fa CL |
4040 | /* If a stub is needed, record the actual destination type. */ |
4041 | if (stub_type != arm_stub_none) | |
35fc36a8 | 4042 | *actual_branch_type = branch_type; |
fe33d2fa | 4043 | |
906e58ca NC |
4044 | return stub_type; |
4045 | } | |
4046 | ||
4047 | /* Build a name for an entry in the stub hash table. */ | |
4048 | ||
4049 | static char * | |
4050 | elf32_arm_stub_name (const asection *input_section, | |
4051 | const asection *sym_sec, | |
4052 | const struct elf32_arm_link_hash_entry *hash, | |
fe33d2fa CL |
4053 | const Elf_Internal_Rela *rel, |
4054 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4055 | { |
4056 | char *stub_name; | |
4057 | bfd_size_type len; | |
4058 | ||
4059 | if (hash) | |
4060 | { | |
fe33d2fa | 4061 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4062 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4063 | if (stub_name != NULL) |
fe33d2fa | 4064 | sprintf (stub_name, "%08x_%s+%x_%d", |
906e58ca NC |
4065 | input_section->id & 0xffffffff, |
4066 | hash->root.root.root.string, | |
fe33d2fa CL |
4067 | (int) rel->r_addend & 0xffffffff, |
4068 | (int) stub_type); | |
906e58ca NC |
4069 | } |
4070 | else | |
4071 | { | |
fe33d2fa | 4072 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4073 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4074 | if (stub_name != NULL) |
fe33d2fa | 4075 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
906e58ca NC |
4076 | input_section->id & 0xffffffff, |
4077 | sym_sec->id & 0xffffffff, | |
0855e32b NS |
4078 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
4079 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL | |
4080 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
fe33d2fa CL |
4081 | (int) rel->r_addend & 0xffffffff, |
4082 | (int) stub_type); | |
906e58ca NC |
4083 | } |
4084 | ||
4085 | return stub_name; | |
4086 | } | |
4087 | ||
4088 | /* Look up an entry in the stub hash. Stub entries are cached because | |
4089 | creating the stub name takes a bit of time. */ | |
4090 | ||
4091 | static struct elf32_arm_stub_hash_entry * | |
4092 | elf32_arm_get_stub_entry (const asection *input_section, | |
4093 | const asection *sym_sec, | |
4094 | struct elf_link_hash_entry *hash, | |
4095 | const Elf_Internal_Rela *rel, | |
fe33d2fa CL |
4096 | struct elf32_arm_link_hash_table *htab, |
4097 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4098 | { |
4099 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4100 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
4101 | const asection *id_sec; | |
4102 | ||
4103 | if ((input_section->flags & SEC_CODE) == 0) | |
4104 | return NULL; | |
4105 | ||
4106 | /* If this input section is part of a group of sections sharing one | |
4107 | stub section, then use the id of the first section in the group. | |
4108 | Stub names need to include a section id, as there may well be | |
4109 | more than one stub used to reach say, printf, and we need to | |
4110 | distinguish between them. */ | |
4111 | id_sec = htab->stub_group[input_section->id].link_sec; | |
4112 | ||
4113 | if (h != NULL && h->stub_cache != NULL | |
4114 | && h->stub_cache->h == h | |
fe33d2fa CL |
4115 | && h->stub_cache->id_sec == id_sec |
4116 | && h->stub_cache->stub_type == stub_type) | |
906e58ca NC |
4117 | { |
4118 | stub_entry = h->stub_cache; | |
4119 | } | |
4120 | else | |
4121 | { | |
4122 | char *stub_name; | |
4123 | ||
fe33d2fa | 4124 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
906e58ca NC |
4125 | if (stub_name == NULL) |
4126 | return NULL; | |
4127 | ||
4128 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
4129 | stub_name, FALSE, FALSE); | |
4130 | if (h != NULL) | |
4131 | h->stub_cache = stub_entry; | |
4132 | ||
4133 | free (stub_name); | |
4134 | } | |
4135 | ||
4136 | return stub_entry; | |
4137 | } | |
4138 | ||
daa4adae TP |
4139 | /* Whether veneers of type STUB_TYPE require to be in a dedicated output |
4140 | section. */ | |
4141 | ||
4142 | static bfd_boolean | |
4143 | arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type) | |
4144 | { | |
4145 | if (stub_type >= max_stub_type) | |
4146 | abort (); /* Should be unreachable. */ | |
4147 | ||
4148 | return FALSE; | |
4149 | } | |
4150 | ||
4151 | /* Required alignment (as a power of 2) for the dedicated section holding | |
4152 | veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed | |
4153 | with input sections. */ | |
4154 | ||
4155 | static int | |
4156 | arm_dedicated_stub_output_section_required_alignment | |
4157 | (enum elf32_arm_stub_type stub_type) | |
4158 | { | |
4159 | if (stub_type >= max_stub_type) | |
4160 | abort (); /* Should be unreachable. */ | |
4161 | ||
4162 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4163 | return 0; | |
4164 | } | |
4165 | ||
4166 | /* Name of the dedicated output section to put veneers of type STUB_TYPE, or | |
4167 | NULL if veneers of this type are interspersed with input sections. */ | |
4168 | ||
4169 | static const char * | |
4170 | arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type) | |
4171 | { | |
4172 | if (stub_type >= max_stub_type) | |
4173 | abort (); /* Should be unreachable. */ | |
4174 | ||
4175 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4176 | return NULL; | |
4177 | } | |
4178 | ||
4179 | /* If veneers of type STUB_TYPE should go in a dedicated output section, | |
4180 | returns the address of the hash table field in HTAB holding a pointer to the | |
4181 | corresponding input section. Otherwise, returns NULL. */ | |
4182 | ||
4183 | static asection ** | |
4184 | arm_dedicated_stub_input_section_ptr | |
4185 | (struct elf32_arm_link_hash_table *htab ATTRIBUTE_UNUSED, | |
4186 | enum elf32_arm_stub_type stub_type) | |
4187 | { | |
4188 | if (stub_type >= max_stub_type) | |
4189 | abort (); /* Should be unreachable. */ | |
4190 | ||
4191 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4192 | return NULL; | |
4193 | } | |
4194 | ||
4195 | /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION | |
4196 | is the section that branch into veneer and can be NULL if stub should go in | |
4197 | a dedicated output section. Returns a pointer to the stub section, and the | |
4198 | section to which the stub section will be attached (in *LINK_SEC_P). | |
48229727 | 4199 | LINK_SEC_P may be NULL. */ |
906e58ca | 4200 | |
48229727 JB |
4201 | static asection * |
4202 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
daa4adae TP |
4203 | struct elf32_arm_link_hash_table *htab, |
4204 | enum elf32_arm_stub_type stub_type) | |
906e58ca | 4205 | { |
daa4adae TP |
4206 | asection *link_sec, *out_sec, **stub_sec_p; |
4207 | const char *stub_sec_prefix; | |
4208 | bfd_boolean dedicated_output_section = | |
4209 | arm_dedicated_stub_output_section_required (stub_type); | |
4210 | int align; | |
906e58ca | 4211 | |
daa4adae | 4212 | if (dedicated_output_section) |
906e58ca | 4213 | { |
daa4adae TP |
4214 | bfd *output_bfd = htab->obfd; |
4215 | const char *out_sec_name = | |
4216 | arm_dedicated_stub_output_section_name (stub_type); | |
4217 | link_sec = NULL; | |
4218 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
4219 | stub_sec_prefix = out_sec_name; | |
4220 | align = arm_dedicated_stub_output_section_required_alignment (stub_type); | |
4221 | out_sec = bfd_get_section_by_name (output_bfd, out_sec_name); | |
4222 | if (out_sec == NULL) | |
906e58ca | 4223 | { |
daa4adae TP |
4224 | (*_bfd_error_handler) (_("No address assigned to the veneers output " |
4225 | "section %s"), out_sec_name); | |
4226 | return NULL; | |
906e58ca | 4227 | } |
daa4adae TP |
4228 | } |
4229 | else | |
4230 | { | |
4231 | link_sec = htab->stub_group[section->id].link_sec; | |
4232 | BFD_ASSERT (link_sec != NULL); | |
4233 | stub_sec_p = &htab->stub_group[section->id].stub_sec; | |
4234 | if (*stub_sec_p == NULL) | |
4235 | stub_sec_p = &htab->stub_group[link_sec->id].stub_sec; | |
4236 | stub_sec_prefix = link_sec->name; | |
4237 | out_sec = link_sec->output_section; | |
4238 | align = htab->nacl_p ? 4 : 3; | |
906e58ca | 4239 | } |
b38cadfb | 4240 | |
daa4adae TP |
4241 | if (*stub_sec_p == NULL) |
4242 | { | |
4243 | size_t namelen; | |
4244 | bfd_size_type len; | |
4245 | char *s_name; | |
4246 | ||
4247 | namelen = strlen (stub_sec_prefix); | |
4248 | len = namelen + sizeof (STUB_SUFFIX); | |
4249 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); | |
4250 | if (s_name == NULL) | |
4251 | return NULL; | |
4252 | ||
4253 | memcpy (s_name, stub_sec_prefix, namelen); | |
4254 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
4255 | *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec, | |
4256 | align); | |
4257 | if (*stub_sec_p == NULL) | |
4258 | return NULL; | |
4259 | ||
4260 | out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE | |
4261 | | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | |
4262 | | SEC_KEEP; | |
4263 | } | |
4264 | ||
4265 | if (!dedicated_output_section) | |
4266 | htab->stub_group[section->id].stub_sec = *stub_sec_p; | |
4267 | ||
48229727 JB |
4268 | if (link_sec_p) |
4269 | *link_sec_p = link_sec; | |
b38cadfb | 4270 | |
daa4adae | 4271 | return *stub_sec_p; |
48229727 JB |
4272 | } |
4273 | ||
4274 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
4275 | stub entry are initialised. */ | |
4276 | ||
4277 | static struct elf32_arm_stub_hash_entry * | |
daa4adae TP |
4278 | elf32_arm_add_stub (const char *stub_name, asection *section, |
4279 | struct elf32_arm_link_hash_table *htab, | |
4280 | enum elf32_arm_stub_type stub_type) | |
48229727 JB |
4281 | { |
4282 | asection *link_sec; | |
4283 | asection *stub_sec; | |
4284 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4285 | ||
daa4adae TP |
4286 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab, |
4287 | stub_type); | |
48229727 JB |
4288 | if (stub_sec == NULL) |
4289 | return NULL; | |
906e58ca NC |
4290 | |
4291 | /* Enter this entry into the linker stub hash table. */ | |
4292 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
4293 | TRUE, FALSE); | |
4294 | if (stub_entry == NULL) | |
4295 | { | |
6bde4c52 TP |
4296 | if (section == NULL) |
4297 | section = stub_sec; | |
906e58ca NC |
4298 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), |
4299 | section->owner, | |
4300 | stub_name); | |
4301 | return NULL; | |
4302 | } | |
4303 | ||
4304 | stub_entry->stub_sec = stub_sec; | |
4305 | stub_entry->stub_offset = 0; | |
4306 | stub_entry->id_sec = link_sec; | |
4307 | ||
906e58ca NC |
4308 | return stub_entry; |
4309 | } | |
4310 | ||
4311 | /* Store an Arm insn into an output section not processed by | |
4312 | elf32_arm_write_section. */ | |
4313 | ||
4314 | static void | |
8029a119 NC |
4315 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
4316 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4317 | { |
4318 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4319 | bfd_putl32 (val, ptr); | |
4320 | else | |
4321 | bfd_putb32 (val, ptr); | |
4322 | } | |
4323 | ||
4324 | /* Store a 16-bit Thumb insn into an output section not processed by | |
4325 | elf32_arm_write_section. */ | |
4326 | ||
4327 | static void | |
8029a119 NC |
4328 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
4329 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4330 | { |
4331 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4332 | bfd_putl16 (val, ptr); | |
4333 | else | |
4334 | bfd_putb16 (val, ptr); | |
4335 | } | |
4336 | ||
a504d23a LA |
4337 | /* Store a Thumb2 insn into an output section not processed by |
4338 | elf32_arm_write_section. */ | |
4339 | ||
4340 | static void | |
4341 | put_thumb2_insn (struct elf32_arm_link_hash_table * htab, | |
b98e6871 | 4342 | bfd * output_bfd, bfd_vma val, bfd_byte * ptr) |
a504d23a LA |
4343 | { |
4344 | /* T2 instructions are 16-bit streamed. */ | |
4345 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4346 | { | |
4347 | bfd_putl16 ((val >> 16) & 0xffff, ptr); | |
4348 | bfd_putl16 ((val & 0xffff), ptr + 2); | |
4349 | } | |
4350 | else | |
4351 | { | |
4352 | bfd_putb16 ((val >> 16) & 0xffff, ptr); | |
4353 | bfd_putb16 ((val & 0xffff), ptr + 2); | |
4354 | } | |
4355 | } | |
4356 | ||
0855e32b NS |
4357 | /* If it's possible to change R_TYPE to a more efficient access |
4358 | model, return the new reloc type. */ | |
4359 | ||
4360 | static unsigned | |
b38cadfb | 4361 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, |
0855e32b NS |
4362 | struct elf_link_hash_entry *h) |
4363 | { | |
4364 | int is_local = (h == NULL); | |
4365 | ||
0e1862bb L |
4366 | if (bfd_link_pic (info) |
4367 | || (h && h->root.type == bfd_link_hash_undefweak)) | |
0855e32b NS |
4368 | return r_type; |
4369 | ||
b38cadfb | 4370 | /* We do not support relaxations for Old TLS models. */ |
0855e32b NS |
4371 | switch (r_type) |
4372 | { | |
4373 | case R_ARM_TLS_GOTDESC: | |
4374 | case R_ARM_TLS_CALL: | |
4375 | case R_ARM_THM_TLS_CALL: | |
4376 | case R_ARM_TLS_DESCSEQ: | |
4377 | case R_ARM_THM_TLS_DESCSEQ: | |
4378 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; | |
4379 | } | |
4380 | ||
4381 | return r_type; | |
4382 | } | |
4383 | ||
48229727 JB |
4384 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
4385 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
4386 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
34e77a92 RS |
4387 | const char *, unsigned char, enum arm_st_branch_type, |
4388 | struct elf_link_hash_entry *, bfd_boolean *, char **); | |
48229727 | 4389 | |
4563a860 JB |
4390 | static unsigned int |
4391 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) | |
4392 | { | |
4393 | switch (stub_type) | |
4394 | { | |
4395 | case arm_stub_a8_veneer_b_cond: | |
4396 | case arm_stub_a8_veneer_b: | |
4397 | case arm_stub_a8_veneer_bl: | |
4398 | return 2; | |
4399 | ||
4400 | case arm_stub_long_branch_any_any: | |
4401 | case arm_stub_long_branch_v4t_arm_thumb: | |
4402 | case arm_stub_long_branch_thumb_only: | |
4403 | case arm_stub_long_branch_v4t_thumb_thumb: | |
4404 | case arm_stub_long_branch_v4t_thumb_arm: | |
4405 | case arm_stub_short_branch_v4t_thumb_arm: | |
4406 | case arm_stub_long_branch_any_arm_pic: | |
4407 | case arm_stub_long_branch_any_thumb_pic: | |
4408 | case arm_stub_long_branch_v4t_thumb_thumb_pic: | |
4409 | case arm_stub_long_branch_v4t_arm_thumb_pic: | |
4410 | case arm_stub_long_branch_v4t_thumb_arm_pic: | |
4411 | case arm_stub_long_branch_thumb_only_pic: | |
0855e32b NS |
4412 | case arm_stub_long_branch_any_tls_pic: |
4413 | case arm_stub_long_branch_v4t_thumb_tls_pic: | |
4563a860 JB |
4414 | case arm_stub_a8_veneer_blx: |
4415 | return 4; | |
b38cadfb | 4416 | |
7a89b94e NC |
4417 | case arm_stub_long_branch_arm_nacl: |
4418 | case arm_stub_long_branch_arm_nacl_pic: | |
4419 | return 16; | |
4420 | ||
4563a860 JB |
4421 | default: |
4422 | abort (); /* Should be unreachable. */ | |
4423 | } | |
4424 | } | |
4425 | ||
4f4faa4d TP |
4426 | /* Returns whether stubs of type STUB_TYPE take over the symbol they are |
4427 | veneering (TRUE) or have their own symbol (FALSE). */ | |
4428 | ||
4429 | static bfd_boolean | |
4430 | arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type) | |
4431 | { | |
4432 | if (stub_type >= max_stub_type) | |
4433 | abort (); /* Should be unreachable. */ | |
4434 | ||
4435 | return FALSE; | |
4436 | } | |
4437 | ||
d7c5bd02 TP |
4438 | /* Returns the padding needed for the dedicated section used stubs of type |
4439 | STUB_TYPE. */ | |
4440 | ||
4441 | static int | |
4442 | arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type) | |
4443 | { | |
4444 | if (stub_type >= max_stub_type) | |
4445 | abort (); /* Should be unreachable. */ | |
4446 | ||
4447 | return 0; | |
4448 | } | |
4449 | ||
906e58ca NC |
4450 | static bfd_boolean |
4451 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, | |
4452 | void * in_arg) | |
4453 | { | |
7a89b94e | 4454 | #define MAXRELOCS 3 |
906e58ca | 4455 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 4456 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 4457 | struct bfd_link_info *info; |
906e58ca NC |
4458 | asection *stub_sec; |
4459 | bfd *stub_bfd; | |
906e58ca NC |
4460 | bfd_byte *loc; |
4461 | bfd_vma sym_value; | |
4462 | int template_size; | |
4463 | int size; | |
d3ce72d0 | 4464 | const insn_sequence *template_sequence; |
906e58ca | 4465 | int i; |
48229727 JB |
4466 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
4467 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
4468 | int nrelocs = 0; | |
906e58ca NC |
4469 | |
4470 | /* Massage our args to the form they really have. */ | |
4471 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
4472 | info = (struct bfd_link_info *) in_arg; | |
4473 | ||
4474 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
4475 | if (globals == NULL) |
4476 | return FALSE; | |
906e58ca | 4477 | |
906e58ca NC |
4478 | stub_sec = stub_entry->stub_sec; |
4479 | ||
4dfe6ac6 | 4480 | if ((globals->fix_cortex_a8 < 0) |
4563a860 JB |
4481 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
4482 | /* We have to do less-strictly-aligned fixes last. */ | |
eb7c4339 | 4483 | return TRUE; |
fe33d2fa | 4484 | |
906e58ca NC |
4485 | /* Make a note of the offset within the stubs for this entry. */ |
4486 | stub_entry->stub_offset = stub_sec->size; | |
4487 | loc = stub_sec->contents + stub_entry->stub_offset; | |
4488 | ||
4489 | stub_bfd = stub_sec->owner; | |
4490 | ||
906e58ca NC |
4491 | /* This is the address of the stub destination. */ |
4492 | sym_value = (stub_entry->target_value | |
4493 | + stub_entry->target_section->output_offset | |
4494 | + stub_entry->target_section->output_section->vma); | |
4495 | ||
d3ce72d0 | 4496 | template_sequence = stub_entry->stub_template; |
461a49ca | 4497 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
4498 | |
4499 | size = 0; | |
461a49ca | 4500 | for (i = 0; i < template_size; i++) |
906e58ca | 4501 | { |
d3ce72d0 | 4502 | switch (template_sequence[i].type) |
461a49ca DJ |
4503 | { |
4504 | case THUMB16_TYPE: | |
48229727 | 4505 | { |
d3ce72d0 NC |
4506 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
4507 | if (template_sequence[i].reloc_addend != 0) | |
48229727 | 4508 | { |
99059e56 RM |
4509 | /* We've borrowed the reloc_addend field to mean we should |
4510 | insert a condition code into this (Thumb-1 branch) | |
4511 | instruction. See THUMB16_BCOND_INSN. */ | |
4512 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
4513 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
48229727 | 4514 | } |
fe33d2fa | 4515 | bfd_put_16 (stub_bfd, data, loc + size); |
48229727 JB |
4516 | size += 2; |
4517 | } | |
461a49ca | 4518 | break; |
906e58ca | 4519 | |
48229727 | 4520 | case THUMB32_TYPE: |
fe33d2fa CL |
4521 | bfd_put_16 (stub_bfd, |
4522 | (template_sequence[i].data >> 16) & 0xffff, | |
4523 | loc + size); | |
4524 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, | |
4525 | loc + size + 2); | |
99059e56 RM |
4526 | if (template_sequence[i].r_type != R_ARM_NONE) |
4527 | { | |
4528 | stub_reloc_idx[nrelocs] = i; | |
4529 | stub_reloc_offset[nrelocs++] = size; | |
4530 | } | |
4531 | size += 4; | |
4532 | break; | |
48229727 | 4533 | |
461a49ca | 4534 | case ARM_TYPE: |
fe33d2fa CL |
4535 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
4536 | loc + size); | |
461a49ca DJ |
4537 | /* Handle cases where the target is encoded within the |
4538 | instruction. */ | |
d3ce72d0 | 4539 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 4540 | { |
48229727 JB |
4541 | stub_reloc_idx[nrelocs] = i; |
4542 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4543 | } |
4544 | size += 4; | |
4545 | break; | |
4546 | ||
4547 | case DATA_TYPE: | |
d3ce72d0 | 4548 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
4549 | stub_reloc_idx[nrelocs] = i; |
4550 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4551 | size += 4; |
4552 | break; | |
4553 | ||
4554 | default: | |
4555 | BFD_FAIL (); | |
4556 | return FALSE; | |
4557 | } | |
906e58ca | 4558 | } |
461a49ca | 4559 | |
906e58ca NC |
4560 | stub_sec->size += size; |
4561 | ||
461a49ca DJ |
4562 | /* Stub size has already been computed in arm_size_one_stub. Check |
4563 | consistency. */ | |
4564 | BFD_ASSERT (size == stub_entry->stub_size); | |
4565 | ||
906e58ca | 4566 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
35fc36a8 | 4567 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4568 | sym_value |= 1; |
4569 | ||
48229727 JB |
4570 | /* Assume there is at least one and at most MAXRELOCS entries to relocate |
4571 | in each stub. */ | |
4572 | BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS); | |
c820be07 | 4573 | |
48229727 | 4574 | for (i = 0; i < nrelocs; i++) |
8d9d9490 TP |
4575 | { |
4576 | Elf_Internal_Rela rel; | |
4577 | bfd_boolean unresolved_reloc; | |
4578 | char *error_message; | |
4579 | bfd_vma points_to = | |
4580 | sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend; | |
4581 | ||
4582 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
4583 | rel.r_info = ELF32_R_INFO (0, | |
4584 | template_sequence[stub_reloc_idx[i]].r_type); | |
4585 | rel.r_addend = 0; | |
4586 | ||
4587 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
4588 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
4589 | template should refer back to the instruction after the original | |
4590 | branch. We use target_section as Cortex-A8 erratum workaround stubs | |
4591 | are only generated when both source and target are in the same | |
4592 | section. */ | |
4593 | points_to = stub_entry->target_section->output_section->vma | |
4594 | + stub_entry->target_section->output_offset | |
4595 | + stub_entry->source_value; | |
4596 | ||
4597 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
4598 | (template_sequence[stub_reloc_idx[i]].r_type), | |
4599 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, | |
4600 | points_to, info, stub_entry->target_section, "", STT_FUNC, | |
4601 | stub_entry->branch_type, | |
4602 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, | |
4603 | &error_message); | |
4604 | } | |
906e58ca NC |
4605 | |
4606 | return TRUE; | |
48229727 | 4607 | #undef MAXRELOCS |
906e58ca NC |
4608 | } |
4609 | ||
48229727 JB |
4610 | /* Calculate the template, template size and instruction size for a stub. |
4611 | Return value is the instruction size. */ | |
906e58ca | 4612 | |
48229727 JB |
4613 | static unsigned int |
4614 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
4615 | const insn_sequence **stub_template, | |
4616 | int *stub_template_size) | |
906e58ca | 4617 | { |
d3ce72d0 | 4618 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
4619 | int template_size = 0, i; |
4620 | unsigned int size; | |
906e58ca | 4621 | |
d3ce72d0 | 4622 | template_sequence = stub_definitions[stub_type].template_sequence; |
2a229407 AM |
4623 | if (stub_template) |
4624 | *stub_template = template_sequence; | |
4625 | ||
48229727 | 4626 | template_size = stub_definitions[stub_type].template_size; |
2a229407 AM |
4627 | if (stub_template_size) |
4628 | *stub_template_size = template_size; | |
906e58ca NC |
4629 | |
4630 | size = 0; | |
461a49ca DJ |
4631 | for (i = 0; i < template_size; i++) |
4632 | { | |
d3ce72d0 | 4633 | switch (template_sequence[i].type) |
461a49ca DJ |
4634 | { |
4635 | case THUMB16_TYPE: | |
4636 | size += 2; | |
4637 | break; | |
4638 | ||
4639 | case ARM_TYPE: | |
48229727 | 4640 | case THUMB32_TYPE: |
461a49ca DJ |
4641 | case DATA_TYPE: |
4642 | size += 4; | |
4643 | break; | |
4644 | ||
4645 | default: | |
4646 | BFD_FAIL (); | |
2a229407 | 4647 | return 0; |
461a49ca DJ |
4648 | } |
4649 | } | |
4650 | ||
48229727 JB |
4651 | return size; |
4652 | } | |
4653 | ||
4654 | /* As above, but don't actually build the stub. Just bump offset so | |
4655 | we know stub section sizes. */ | |
4656 | ||
4657 | static bfd_boolean | |
4658 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, | |
c7e2358a | 4659 | void *in_arg ATTRIBUTE_UNUSED) |
48229727 JB |
4660 | { |
4661 | struct elf32_arm_stub_hash_entry *stub_entry; | |
d3ce72d0 | 4662 | const insn_sequence *template_sequence; |
48229727 JB |
4663 | int template_size, size; |
4664 | ||
4665 | /* Massage our args to the form they really have. */ | |
4666 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
48229727 JB |
4667 | |
4668 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) | |
4669 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); | |
4670 | ||
d3ce72d0 | 4671 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
4672 | &template_size); |
4673 | ||
461a49ca | 4674 | stub_entry->stub_size = size; |
d3ce72d0 | 4675 | stub_entry->stub_template = template_sequence; |
461a49ca DJ |
4676 | stub_entry->stub_template_size = template_size; |
4677 | ||
906e58ca NC |
4678 | size = (size + 7) & ~7; |
4679 | stub_entry->stub_sec->size += size; | |
461a49ca | 4680 | |
906e58ca NC |
4681 | return TRUE; |
4682 | } | |
4683 | ||
4684 | /* External entry points for sizing and building linker stubs. */ | |
4685 | ||
4686 | /* Set up various things so that we can make a list of input sections | |
4687 | for each output section included in the link. Returns -1 on error, | |
4688 | 0 when no stubs will be needed, and 1 on success. */ | |
4689 | ||
4690 | int | |
4691 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
4692 | struct bfd_link_info *info) | |
4693 | { | |
4694 | bfd *input_bfd; | |
4695 | unsigned int bfd_count; | |
7292b3ac | 4696 | unsigned int top_id, top_index; |
906e58ca NC |
4697 | asection *section; |
4698 | asection **input_list, **list; | |
4699 | bfd_size_type amt; | |
4700 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4701 | ||
4dfe6ac6 NC |
4702 | if (htab == NULL) |
4703 | return 0; | |
906e58ca NC |
4704 | if (! is_elf_hash_table (htab)) |
4705 | return 0; | |
4706 | ||
4707 | /* Count the number of input BFDs and find the top input section id. */ | |
4708 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
4709 | input_bfd != NULL; | |
c72f2fb2 | 4710 | input_bfd = input_bfd->link.next) |
906e58ca NC |
4711 | { |
4712 | bfd_count += 1; | |
4713 | for (section = input_bfd->sections; | |
4714 | section != NULL; | |
4715 | section = section->next) | |
4716 | { | |
4717 | if (top_id < section->id) | |
4718 | top_id = section->id; | |
4719 | } | |
4720 | } | |
4721 | htab->bfd_count = bfd_count; | |
4722 | ||
4723 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 4724 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
4725 | if (htab->stub_group == NULL) |
4726 | return -1; | |
fe33d2fa | 4727 | htab->top_id = top_id; |
906e58ca NC |
4728 | |
4729 | /* We can't use output_bfd->section_count here to find the top output | |
4730 | section index as some sections may have been removed, and | |
4731 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
4732 | for (section = output_bfd->sections, top_index = 0; | |
4733 | section != NULL; | |
4734 | section = section->next) | |
4735 | { | |
4736 | if (top_index < section->index) | |
4737 | top_index = section->index; | |
4738 | } | |
4739 | ||
4740 | htab->top_index = top_index; | |
4741 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 4742 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
4743 | htab->input_list = input_list; |
4744 | if (input_list == NULL) | |
4745 | return -1; | |
4746 | ||
4747 | /* For sections we aren't interested in, mark their entries with a | |
4748 | value we can check later. */ | |
4749 | list = input_list + top_index; | |
4750 | do | |
4751 | *list = bfd_abs_section_ptr; | |
4752 | while (list-- != input_list); | |
4753 | ||
4754 | for (section = output_bfd->sections; | |
4755 | section != NULL; | |
4756 | section = section->next) | |
4757 | { | |
4758 | if ((section->flags & SEC_CODE) != 0) | |
4759 | input_list[section->index] = NULL; | |
4760 | } | |
4761 | ||
4762 | return 1; | |
4763 | } | |
4764 | ||
4765 | /* The linker repeatedly calls this function for each input section, | |
4766 | in the order that input sections are linked into output sections. | |
4767 | Build lists of input sections to determine groupings between which | |
4768 | we may insert linker stubs. */ | |
4769 | ||
4770 | void | |
4771 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
4772 | asection *isec) | |
4773 | { | |
4774 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4775 | ||
4dfe6ac6 NC |
4776 | if (htab == NULL) |
4777 | return; | |
4778 | ||
906e58ca NC |
4779 | if (isec->output_section->index <= htab->top_index) |
4780 | { | |
4781 | asection **list = htab->input_list + isec->output_section->index; | |
4782 | ||
a7470592 | 4783 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
4784 | { |
4785 | /* Steal the link_sec pointer for our list. */ | |
4786 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
4787 | /* This happens to make the list in reverse order, | |
07d72278 | 4788 | which we reverse later. */ |
906e58ca NC |
4789 | PREV_SEC (isec) = *list; |
4790 | *list = isec; | |
4791 | } | |
4792 | } | |
4793 | } | |
4794 | ||
4795 | /* See whether we can group stub sections together. Grouping stub | |
4796 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 4797 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
4798 | .fini output sections respectively, because glibc splits the |
4799 | _init and _fini functions into multiple parts. Putting a stub in | |
4800 | the middle of a function is not a good idea. */ | |
4801 | ||
4802 | static void | |
4803 | group_sections (struct elf32_arm_link_hash_table *htab, | |
4804 | bfd_size_type stub_group_size, | |
07d72278 | 4805 | bfd_boolean stubs_always_after_branch) |
906e58ca | 4806 | { |
07d72278 | 4807 | asection **list = htab->input_list; |
906e58ca NC |
4808 | |
4809 | do | |
4810 | { | |
4811 | asection *tail = *list; | |
07d72278 | 4812 | asection *head; |
906e58ca NC |
4813 | |
4814 | if (tail == bfd_abs_section_ptr) | |
4815 | continue; | |
4816 | ||
07d72278 DJ |
4817 | /* Reverse the list: we must avoid placing stubs at the |
4818 | beginning of the section because the beginning of the text | |
4819 | section may be required for an interrupt vector in bare metal | |
4820 | code. */ | |
4821 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
4822 | head = NULL; |
4823 | while (tail != NULL) | |
99059e56 RM |
4824 | { |
4825 | /* Pop from tail. */ | |
4826 | asection *item = tail; | |
4827 | tail = PREV_SEC (item); | |
e780aef2 | 4828 | |
99059e56 RM |
4829 | /* Push on head. */ |
4830 | NEXT_SEC (item) = head; | |
4831 | head = item; | |
4832 | } | |
07d72278 DJ |
4833 | |
4834 | while (head != NULL) | |
906e58ca NC |
4835 | { |
4836 | asection *curr; | |
07d72278 | 4837 | asection *next; |
e780aef2 CL |
4838 | bfd_vma stub_group_start = head->output_offset; |
4839 | bfd_vma end_of_next; | |
906e58ca | 4840 | |
07d72278 | 4841 | curr = head; |
e780aef2 | 4842 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 4843 | { |
e780aef2 CL |
4844 | next = NEXT_SEC (curr); |
4845 | end_of_next = next->output_offset + next->size; | |
4846 | if (end_of_next - stub_group_start >= stub_group_size) | |
4847 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 4848 | break; |
e780aef2 CL |
4849 | /* Add NEXT to the group. */ |
4850 | curr = next; | |
8cd931b7 | 4851 | } |
906e58ca | 4852 | |
07d72278 | 4853 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 4854 | than stub_group_size and thus can be handled by one stub |
07d72278 | 4855 | section. (Or the head section is itself larger than |
906e58ca NC |
4856 | stub_group_size, in which case we may be toast.) |
4857 | We should really be keeping track of the total size of | |
4858 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 4859 | section size. */ |
906e58ca NC |
4860 | do |
4861 | { | |
07d72278 | 4862 | next = NEXT_SEC (head); |
906e58ca | 4863 | /* Set up this stub group. */ |
07d72278 | 4864 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 4865 | } |
07d72278 | 4866 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
4867 | |
4868 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
4869 | bytes after the stub section can be handled by it too. */ |
4870 | if (!stubs_always_after_branch) | |
906e58ca | 4871 | { |
e780aef2 CL |
4872 | stub_group_start = curr->output_offset + curr->size; |
4873 | ||
8cd931b7 | 4874 | while (next != NULL) |
906e58ca | 4875 | { |
e780aef2 CL |
4876 | end_of_next = next->output_offset + next->size; |
4877 | if (end_of_next - stub_group_start >= stub_group_size) | |
4878 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 4879 | break; |
e780aef2 | 4880 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
4881 | head = next; |
4882 | next = NEXT_SEC (head); | |
4883 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
4884 | } |
4885 | } | |
07d72278 | 4886 | head = next; |
906e58ca NC |
4887 | } |
4888 | } | |
07d72278 | 4889 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
4890 | |
4891 | free (htab->input_list); | |
4892 | #undef PREV_SEC | |
07d72278 | 4893 | #undef NEXT_SEC |
906e58ca NC |
4894 | } |
4895 | ||
48229727 JB |
4896 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
4897 | erratum fix. */ | |
4898 | ||
4899 | static int | |
4900 | a8_reloc_compare (const void *a, const void *b) | |
4901 | { | |
21d799b5 NC |
4902 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
4903 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
4904 | |
4905 | if (ra->from < rb->from) | |
4906 | return -1; | |
4907 | else if (ra->from > rb->from) | |
4908 | return 1; | |
4909 | else | |
4910 | return 0; | |
4911 | } | |
4912 | ||
4913 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
4914 | const char *, char **); | |
4915 | ||
4916 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
4917 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 4918 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
4919 | otherwise. */ |
4920 | ||
81694485 NC |
4921 | static bfd_boolean |
4922 | cortex_a8_erratum_scan (bfd *input_bfd, | |
4923 | struct bfd_link_info *info, | |
48229727 JB |
4924 | struct a8_erratum_fix **a8_fixes_p, |
4925 | unsigned int *num_a8_fixes_p, | |
4926 | unsigned int *a8_fix_table_size_p, | |
4927 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
4928 | unsigned int num_a8_relocs, |
4929 | unsigned prev_num_a8_fixes, | |
4930 | bfd_boolean *stub_changed_p) | |
48229727 JB |
4931 | { |
4932 | asection *section; | |
4933 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4934 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
4935 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
4936 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
4937 | ||
4dfe6ac6 NC |
4938 | if (htab == NULL) |
4939 | return FALSE; | |
4940 | ||
48229727 JB |
4941 | for (section = input_bfd->sections; |
4942 | section != NULL; | |
4943 | section = section->next) | |
4944 | { | |
4945 | bfd_byte *contents = NULL; | |
4946 | struct _arm_elf_section_data *sec_data; | |
4947 | unsigned int span; | |
4948 | bfd_vma base_vma; | |
4949 | ||
4950 | if (elf_section_type (section) != SHT_PROGBITS | |
99059e56 RM |
4951 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 |
4952 | || (section->flags & SEC_EXCLUDE) != 0 | |
4953 | || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS) | |
4954 | || (section->output_section == bfd_abs_section_ptr)) | |
4955 | continue; | |
48229727 JB |
4956 | |
4957 | base_vma = section->output_section->vma + section->output_offset; | |
4958 | ||
4959 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
99059e56 | 4960 | contents = elf_section_data (section)->this_hdr.contents; |
48229727 | 4961 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) |
99059e56 | 4962 | return TRUE; |
48229727 JB |
4963 | |
4964 | sec_data = elf32_arm_section_data (section); | |
4965 | ||
4966 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
4967 | { |
4968 | unsigned int span_start = sec_data->map[span].vma; | |
4969 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
4970 | ? section->size : sec_data->map[span + 1].vma; | |
4971 | unsigned int i; | |
4972 | char span_type = sec_data->map[span].type; | |
4973 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; | |
4974 | ||
4975 | if (span_type != 't') | |
4976 | continue; | |
4977 | ||
4978 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
4979 | if (((base_vma + span_start) & ~0xfff) | |
48229727 | 4980 | == ((base_vma + span_end) & ~0xfff)) |
99059e56 RM |
4981 | continue; |
4982 | ||
4983 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
4984 | ||
4985 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
4986 | * The branch target is in the same 4KB region as the | |
4987 | first half of the branch. | |
4988 | * The instruction before the branch is a 32-bit | |
4989 | length non-branch instruction. */ | |
4990 | for (i = span_start; i < span_end;) | |
4991 | { | |
4992 | unsigned int insn = bfd_getl16 (&contents[i]); | |
4993 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; | |
48229727 JB |
4994 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; |
4995 | ||
99059e56 RM |
4996 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) |
4997 | insn_32bit = TRUE; | |
48229727 JB |
4998 | |
4999 | if (insn_32bit) | |
99059e56 RM |
5000 | { |
5001 | /* Load the rest of the insn (in manual-friendly order). */ | |
5002 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
5003 | ||
5004 | /* Encoding T4: B<c>.W. */ | |
5005 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
5006 | /* Encoding T1: BL<c>.W. */ | |
5007 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
5008 | /* Encoding T2: BLX<c>.W. */ | |
5009 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
48229727 JB |
5010 | /* Encoding T3: B<c>.W (not permitted in IT block). */ |
5011 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
5012 | && (insn & 0x07f00000) != 0x03800000; | |
5013 | } | |
5014 | ||
5015 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
fe33d2fa | 5016 | |
99059e56 | 5017 | if (((base_vma + i) & 0xfff) == 0xffe |
81694485 NC |
5018 | && insn_32bit |
5019 | && is_32bit_branch | |
5020 | && last_was_32bit | |
5021 | && ! last_was_branch) | |
99059e56 RM |
5022 | { |
5023 | bfd_signed_vma offset = 0; | |
5024 | bfd_boolean force_target_arm = FALSE; | |
48229727 | 5025 | bfd_boolean force_target_thumb = FALSE; |
99059e56 RM |
5026 | bfd_vma target; |
5027 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5028 | struct a8_erratum_reloc key, *found; | |
5029 | bfd_boolean use_plt = FALSE; | |
48229727 | 5030 | |
99059e56 RM |
5031 | key.from = base_vma + i; |
5032 | found = (struct a8_erratum_reloc *) | |
5033 | bsearch (&key, a8_relocs, num_a8_relocs, | |
5034 | sizeof (struct a8_erratum_reloc), | |
5035 | &a8_reloc_compare); | |
48229727 JB |
5036 | |
5037 | if (found) | |
5038 | { | |
5039 | char *error_message = NULL; | |
5040 | struct elf_link_hash_entry *entry; | |
5041 | ||
5042 | /* We don't care about the error returned from this | |
99059e56 | 5043 | function, only if there is glue or not. */ |
48229727 JB |
5044 | entry = find_thumb_glue (info, found->sym_name, |
5045 | &error_message); | |
5046 | ||
5047 | if (entry) | |
5048 | found->non_a8_stub = TRUE; | |
5049 | ||
92750f34 | 5050 | /* Keep a simpler condition, for the sake of clarity. */ |
362d30a1 | 5051 | if (htab->root.splt != NULL && found->hash != NULL |
92750f34 DJ |
5052 | && found->hash->root.plt.offset != (bfd_vma) -1) |
5053 | use_plt = TRUE; | |
5054 | ||
5055 | if (found->r_type == R_ARM_THM_CALL) | |
5056 | { | |
35fc36a8 RS |
5057 | if (found->branch_type == ST_BRANCH_TO_ARM |
5058 | || use_plt) | |
92750f34 DJ |
5059 | force_target_arm = TRUE; |
5060 | else | |
5061 | force_target_thumb = TRUE; | |
5062 | } | |
48229727 JB |
5063 | } |
5064 | ||
99059e56 | 5065 | /* Check if we have an offending branch instruction. */ |
48229727 JB |
5066 | |
5067 | if (found && found->non_a8_stub) | |
5068 | /* We've already made a stub for this instruction, e.g. | |
5069 | it's a long branch or a Thumb->ARM stub. Assume that | |
5070 | stub will suffice to work around the A8 erratum (see | |
5071 | setting of always_after_branch above). */ | |
5072 | ; | |
99059e56 RM |
5073 | else if (is_bcc) |
5074 | { | |
5075 | offset = (insn & 0x7ff) << 1; | |
5076 | offset |= (insn & 0x3f0000) >> 4; | |
5077 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
5078 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
5079 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
5080 | if (offset & 0x100000) | |
5081 | offset |= ~ ((bfd_signed_vma) 0xfffff); | |
5082 | stub_type = arm_stub_a8_veneer_b_cond; | |
5083 | } | |
5084 | else if (is_b || is_bl || is_blx) | |
5085 | { | |
5086 | int s = (insn & 0x4000000) != 0; | |
5087 | int j1 = (insn & 0x2000) != 0; | |
5088 | int j2 = (insn & 0x800) != 0; | |
5089 | int i1 = !(j1 ^ s); | |
5090 | int i2 = !(j2 ^ s); | |
5091 | ||
5092 | offset = (insn & 0x7ff) << 1; | |
5093 | offset |= (insn & 0x3ff0000) >> 4; | |
5094 | offset |= i2 << 22; | |
5095 | offset |= i1 << 23; | |
5096 | offset |= s << 24; | |
5097 | if (offset & 0x1000000) | |
5098 | offset |= ~ ((bfd_signed_vma) 0xffffff); | |
5099 | ||
5100 | if (is_blx) | |
5101 | offset &= ~ ((bfd_signed_vma) 3); | |
5102 | ||
5103 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
5104 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
5105 | } | |
5106 | ||
5107 | if (stub_type != arm_stub_none) | |
5108 | { | |
5109 | bfd_vma pc_for_insn = base_vma + i + 4; | |
48229727 JB |
5110 | |
5111 | /* The original instruction is a BL, but the target is | |
99059e56 | 5112 | an ARM instruction. If we were not making a stub, |
48229727 JB |
5113 | the BL would have been converted to a BLX. Use the |
5114 | BLX stub instead in that case. */ | |
5115 | if (htab->use_blx && force_target_arm | |
5116 | && stub_type == arm_stub_a8_veneer_bl) | |
5117 | { | |
5118 | stub_type = arm_stub_a8_veneer_blx; | |
5119 | is_blx = TRUE; | |
5120 | is_bl = FALSE; | |
5121 | } | |
5122 | /* Conversely, if the original instruction was | |
5123 | BLX but the target is Thumb mode, use the BL | |
5124 | stub. */ | |
5125 | else if (force_target_thumb | |
5126 | && stub_type == arm_stub_a8_veneer_blx) | |
5127 | { | |
5128 | stub_type = arm_stub_a8_veneer_bl; | |
5129 | is_blx = FALSE; | |
5130 | is_bl = TRUE; | |
5131 | } | |
5132 | ||
99059e56 RM |
5133 | if (is_blx) |
5134 | pc_for_insn &= ~ ((bfd_vma) 3); | |
48229727 | 5135 | |
99059e56 RM |
5136 | /* If we found a relocation, use the proper destination, |
5137 | not the offset in the (unrelocated) instruction. | |
48229727 JB |
5138 | Note this is always done if we switched the stub type |
5139 | above. */ | |
99059e56 RM |
5140 | if (found) |
5141 | offset = | |
81694485 | 5142 | (bfd_signed_vma) (found->destination - pc_for_insn); |
48229727 | 5143 | |
99059e56 RM |
5144 | /* If the stub will use a Thumb-mode branch to a |
5145 | PLT target, redirect it to the preceding Thumb | |
5146 | entry point. */ | |
5147 | if (stub_type != arm_stub_a8_veneer_blx && use_plt) | |
5148 | offset -= PLT_THUMB_STUB_SIZE; | |
7d24e6a6 | 5149 | |
99059e56 | 5150 | target = pc_for_insn + offset; |
48229727 | 5151 | |
99059e56 RM |
5152 | /* The BLX stub is ARM-mode code. Adjust the offset to |
5153 | take the different PC value (+8 instead of +4) into | |
48229727 | 5154 | account. */ |
99059e56 RM |
5155 | if (stub_type == arm_stub_a8_veneer_blx) |
5156 | offset += 4; | |
5157 | ||
5158 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
5159 | { | |
5160 | char *stub_name = NULL; | |
5161 | ||
5162 | if (num_a8_fixes == a8_fix_table_size) | |
5163 | { | |
5164 | a8_fix_table_size *= 2; | |
5165 | a8_fixes = (struct a8_erratum_fix *) | |
5166 | bfd_realloc (a8_fixes, | |
5167 | sizeof (struct a8_erratum_fix) | |
5168 | * a8_fix_table_size); | |
5169 | } | |
48229727 | 5170 | |
eb7c4339 NS |
5171 | if (num_a8_fixes < prev_num_a8_fixes) |
5172 | { | |
5173 | /* If we're doing a subsequent scan, | |
5174 | check if we've found the same fix as | |
5175 | before, and try and reuse the stub | |
5176 | name. */ | |
5177 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
5178 | if ((a8_fixes[num_a8_fixes].section != section) | |
5179 | || (a8_fixes[num_a8_fixes].offset != i)) | |
5180 | { | |
5181 | free (stub_name); | |
5182 | stub_name = NULL; | |
5183 | *stub_changed_p = TRUE; | |
5184 | } | |
5185 | } | |
5186 | ||
5187 | if (!stub_name) | |
5188 | { | |
21d799b5 | 5189 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
5190 | if (stub_name != NULL) |
5191 | sprintf (stub_name, "%x:%x", section->id, i); | |
5192 | } | |
48229727 | 5193 | |
99059e56 RM |
5194 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; |
5195 | a8_fixes[num_a8_fixes].section = section; | |
5196 | a8_fixes[num_a8_fixes].offset = i; | |
8d9d9490 TP |
5197 | a8_fixes[num_a8_fixes].target_offset = |
5198 | target - base_vma; | |
99059e56 RM |
5199 | a8_fixes[num_a8_fixes].orig_insn = insn; |
5200 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
5201 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
5202 | a8_fixes[num_a8_fixes].branch_type = | |
35fc36a8 | 5203 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; |
48229727 | 5204 | |
99059e56 RM |
5205 | num_a8_fixes++; |
5206 | } | |
5207 | } | |
5208 | } | |
48229727 | 5209 | |
99059e56 RM |
5210 | i += insn_32bit ? 4 : 2; |
5211 | last_was_32bit = insn_32bit; | |
48229727 | 5212 | last_was_branch = is_32bit_branch; |
99059e56 RM |
5213 | } |
5214 | } | |
48229727 JB |
5215 | |
5216 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
99059e56 | 5217 | free (contents); |
48229727 | 5218 | } |
fe33d2fa | 5219 | |
48229727 JB |
5220 | *a8_fixes_p = a8_fixes; |
5221 | *num_a8_fixes_p = num_a8_fixes; | |
5222 | *a8_fix_table_size_p = a8_fix_table_size; | |
fe33d2fa | 5223 | |
81694485 | 5224 | return FALSE; |
48229727 JB |
5225 | } |
5226 | ||
b715f643 TP |
5227 | /* Create or update a stub entry depending on whether the stub can already be |
5228 | found in HTAB. The stub is identified by: | |
5229 | - its type STUB_TYPE | |
5230 | - its source branch (note that several can share the same stub) whose | |
5231 | section and relocation (if any) are given by SECTION and IRELA | |
5232 | respectively | |
5233 | - its target symbol whose input section, hash, name, value and branch type | |
5234 | are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE | |
5235 | respectively | |
5236 | ||
5237 | If found, the value of the stub's target symbol is updated from SYM_VALUE | |
5238 | and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to | |
5239 | TRUE and the stub entry is initialized. | |
5240 | ||
5241 | Returns whether the stub could be successfully created or updated, or FALSE | |
5242 | if an error occured. */ | |
5243 | ||
5244 | static bfd_boolean | |
5245 | elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab, | |
5246 | enum elf32_arm_stub_type stub_type, asection *section, | |
5247 | Elf_Internal_Rela *irela, asection *sym_sec, | |
5248 | struct elf32_arm_link_hash_entry *hash, char *sym_name, | |
5249 | bfd_vma sym_value, enum arm_st_branch_type branch_type, | |
5250 | bfd_boolean *new_stub) | |
5251 | { | |
5252 | const asection *id_sec; | |
5253 | char *stub_name; | |
5254 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5255 | unsigned int r_type; | |
4f4faa4d | 5256 | bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type); |
b715f643 TP |
5257 | |
5258 | BFD_ASSERT (stub_type != arm_stub_none); | |
5259 | *new_stub = FALSE; | |
5260 | ||
4f4faa4d TP |
5261 | if (sym_claimed) |
5262 | stub_name = sym_name; | |
5263 | else | |
5264 | { | |
5265 | BFD_ASSERT (irela); | |
5266 | BFD_ASSERT (section); | |
b715f643 | 5267 | |
4f4faa4d TP |
5268 | /* Support for grouping stub sections. */ |
5269 | id_sec = htab->stub_group[section->id].link_sec; | |
b715f643 | 5270 | |
4f4faa4d TP |
5271 | /* Get the name of this stub. */ |
5272 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, | |
5273 | stub_type); | |
5274 | if (!stub_name) | |
5275 | return FALSE; | |
5276 | } | |
b715f643 TP |
5277 | |
5278 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE, | |
5279 | FALSE); | |
5280 | /* The proper stub has already been created, just update its value. */ | |
5281 | if (stub_entry != NULL) | |
5282 | { | |
4f4faa4d TP |
5283 | if (!sym_claimed) |
5284 | free (stub_name); | |
b715f643 TP |
5285 | stub_entry->target_value = sym_value; |
5286 | return TRUE; | |
5287 | } | |
5288 | ||
daa4adae | 5289 | stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type); |
b715f643 TP |
5290 | if (stub_entry == NULL) |
5291 | { | |
4f4faa4d TP |
5292 | if (!sym_claimed) |
5293 | free (stub_name); | |
b715f643 TP |
5294 | return FALSE; |
5295 | } | |
5296 | ||
5297 | stub_entry->target_value = sym_value; | |
5298 | stub_entry->target_section = sym_sec; | |
5299 | stub_entry->stub_type = stub_type; | |
5300 | stub_entry->h = hash; | |
5301 | stub_entry->branch_type = branch_type; | |
5302 | ||
4f4faa4d TP |
5303 | if (sym_claimed) |
5304 | stub_entry->output_name = sym_name; | |
5305 | else | |
b715f643 | 5306 | { |
4f4faa4d TP |
5307 | if (sym_name == NULL) |
5308 | sym_name = "unnamed"; | |
5309 | stub_entry->output_name = (char *) | |
5310 | bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME) | |
5311 | + strlen (sym_name)); | |
5312 | if (stub_entry->output_name == NULL) | |
5313 | { | |
5314 | free (stub_name); | |
5315 | return FALSE; | |
5316 | } | |
b715f643 | 5317 | |
4f4faa4d TP |
5318 | /* For historical reasons, use the existing names for ARM-to-Thumb and |
5319 | Thumb-to-ARM stubs. */ | |
5320 | r_type = ELF32_R_TYPE (irela->r_info); | |
5321 | if ((r_type == (unsigned int) R_ARM_THM_CALL | |
5322 | || r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5323 | || r_type == (unsigned int) R_ARM_THM_JUMP19) | |
5324 | && branch_type == ST_BRANCH_TO_ARM) | |
5325 | sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
5326 | else if ((r_type == (unsigned int) R_ARM_CALL | |
5327 | || r_type == (unsigned int) R_ARM_JUMP24) | |
5328 | && branch_type == ST_BRANCH_TO_THUMB) | |
5329 | sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
5330 | else | |
5331 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name); | |
5332 | } | |
b715f643 TP |
5333 | |
5334 | *new_stub = TRUE; | |
5335 | return TRUE; | |
5336 | } | |
5337 | ||
906e58ca NC |
5338 | /* Determine and set the size of the stub section for a final link. |
5339 | ||
5340 | The basic idea here is to examine all the relocations looking for | |
5341 | PC-relative calls to a target that is unreachable with a "bl" | |
5342 | instruction. */ | |
5343 | ||
5344 | bfd_boolean | |
5345 | elf32_arm_size_stubs (bfd *output_bfd, | |
5346 | bfd *stub_bfd, | |
5347 | struct bfd_link_info *info, | |
5348 | bfd_signed_vma group_size, | |
7a89b94e | 5349 | asection * (*add_stub_section) (const char *, asection *, |
6bde4c52 | 5350 | asection *, |
7a89b94e | 5351 | unsigned int), |
906e58ca NC |
5352 | void (*layout_sections_again) (void)) |
5353 | { | |
5354 | bfd_size_type stub_group_size; | |
07d72278 | 5355 | bfd_boolean stubs_always_after_branch; |
906e58ca | 5356 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 5357 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 5358 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
5359 | struct a8_erratum_reloc *a8_relocs = NULL; |
5360 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
5361 | ||
4dfe6ac6 NC |
5362 | if (htab == NULL) |
5363 | return FALSE; | |
5364 | ||
48229727 JB |
5365 | if (htab->fix_cortex_a8) |
5366 | { | |
21d799b5 | 5367 | a8_fixes = (struct a8_erratum_fix *) |
99059e56 | 5368 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); |
21d799b5 | 5369 | a8_relocs = (struct a8_erratum_reloc *) |
99059e56 | 5370 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); |
48229727 | 5371 | } |
906e58ca NC |
5372 | |
5373 | /* Propagate mach to stub bfd, because it may not have been | |
5374 | finalized when we created stub_bfd. */ | |
5375 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
5376 | bfd_get_mach (output_bfd)); | |
5377 | ||
5378 | /* Stash our params away. */ | |
5379 | htab->stub_bfd = stub_bfd; | |
5380 | htab->add_stub_section = add_stub_section; | |
5381 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 5382 | stubs_always_after_branch = group_size < 0; |
48229727 JB |
5383 | |
5384 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page | |
5385 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
5386 | crude way of enforcing that. */ | |
5387 | if (htab->fix_cortex_a8) | |
5388 | stubs_always_after_branch = 1; | |
5389 | ||
906e58ca NC |
5390 | if (group_size < 0) |
5391 | stub_group_size = -group_size; | |
5392 | else | |
5393 | stub_group_size = group_size; | |
5394 | ||
5395 | if (stub_group_size == 1) | |
5396 | { | |
5397 | /* Default values. */ | |
5398 | /* Thumb branch range is +-4MB has to be used as the default | |
5399 | maximum size (a given section can contain both ARM and Thumb | |
5400 | code, so the worst case has to be taken into account). | |
5401 | ||
5402 | This value is 24K less than that, which allows for 2025 | |
5403 | 12-byte stubs. If we exceed that, then we will fail to link. | |
5404 | The user will have to relink with an explicit group size | |
5405 | option. */ | |
5406 | stub_group_size = 4170000; | |
5407 | } | |
5408 | ||
07d72278 | 5409 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 5410 | |
3ae046cc NS |
5411 | /* If we're applying the cortex A8 fix, we need to determine the |
5412 | program header size now, because we cannot change it later -- | |
5413 | that could alter section placements. Notice the A8 erratum fix | |
5414 | ends up requiring the section addresses to remain unchanged | |
5415 | modulo the page size. That's something we cannot represent | |
5416 | inside BFD, and we don't want to force the section alignment to | |
5417 | be the page size. */ | |
5418 | if (htab->fix_cortex_a8) | |
5419 | (*htab->layout_sections_again) (); | |
5420 | ||
906e58ca NC |
5421 | while (1) |
5422 | { | |
5423 | bfd *input_bfd; | |
5424 | unsigned int bfd_indx; | |
5425 | asection *stub_sec; | |
d7c5bd02 | 5426 | enum elf32_arm_stub_type stub_type; |
eb7c4339 NS |
5427 | bfd_boolean stub_changed = FALSE; |
5428 | unsigned prev_num_a8_fixes = num_a8_fixes; | |
906e58ca | 5429 | |
48229727 | 5430 | num_a8_fixes = 0; |
906e58ca NC |
5431 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
5432 | input_bfd != NULL; | |
c72f2fb2 | 5433 | input_bfd = input_bfd->link.next, bfd_indx++) |
906e58ca NC |
5434 | { |
5435 | Elf_Internal_Shdr *symtab_hdr; | |
5436 | asection *section; | |
5437 | Elf_Internal_Sym *local_syms = NULL; | |
5438 | ||
99059e56 RM |
5439 | if (!is_arm_elf (input_bfd)) |
5440 | continue; | |
adbcc655 | 5441 | |
48229727 JB |
5442 | num_a8_relocs = 0; |
5443 | ||
906e58ca NC |
5444 | /* We'll need the symbol table in a second. */ |
5445 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
5446 | if (symtab_hdr->sh_info == 0) | |
5447 | continue; | |
5448 | ||
5449 | /* Walk over each section attached to the input bfd. */ | |
5450 | for (section = input_bfd->sections; | |
5451 | section != NULL; | |
5452 | section = section->next) | |
5453 | { | |
5454 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
5455 | ||
5456 | /* If there aren't any relocs, then there's nothing more | |
5457 | to do. */ | |
5458 | if ((section->flags & SEC_RELOC) == 0 | |
5459 | || section->reloc_count == 0 | |
5460 | || (section->flags & SEC_CODE) == 0) | |
5461 | continue; | |
5462 | ||
5463 | /* If this section is a link-once section that will be | |
5464 | discarded, then don't create any stubs. */ | |
5465 | if (section->output_section == NULL | |
5466 | || section->output_section->owner != output_bfd) | |
5467 | continue; | |
5468 | ||
5469 | /* Get the relocs. */ | |
5470 | internal_relocs | |
5471 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
5472 | NULL, info->keep_memory); | |
5473 | if (internal_relocs == NULL) | |
5474 | goto error_ret_free_local; | |
5475 | ||
5476 | /* Now examine each relocation. */ | |
5477 | irela = internal_relocs; | |
5478 | irelaend = irela + section->reloc_count; | |
5479 | for (; irela < irelaend; irela++) | |
5480 | { | |
5481 | unsigned int r_type, r_indx; | |
906e58ca NC |
5482 | asection *sym_sec; |
5483 | bfd_vma sym_value; | |
5484 | bfd_vma destination; | |
5485 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 5486 | const char *sym_name; |
34e77a92 | 5487 | unsigned char st_type; |
35fc36a8 | 5488 | enum arm_st_branch_type branch_type; |
48229727 | 5489 | bfd_boolean created_stub = FALSE; |
906e58ca NC |
5490 | |
5491 | r_type = ELF32_R_TYPE (irela->r_info); | |
5492 | r_indx = ELF32_R_SYM (irela->r_info); | |
5493 | ||
5494 | if (r_type >= (unsigned int) R_ARM_max) | |
5495 | { | |
5496 | bfd_set_error (bfd_error_bad_value); | |
5497 | error_ret_free_internal: | |
5498 | if (elf_section_data (section)->relocs == NULL) | |
5499 | free (internal_relocs); | |
15dd01b1 TP |
5500 | /* Fall through. */ |
5501 | error_ret_free_local: | |
5502 | if (local_syms != NULL | |
5503 | && (symtab_hdr->contents | |
5504 | != (unsigned char *) local_syms)) | |
5505 | free (local_syms); | |
5506 | return FALSE; | |
906e58ca | 5507 | } |
b38cadfb | 5508 | |
0855e32b NS |
5509 | hash = NULL; |
5510 | if (r_indx >= symtab_hdr->sh_info) | |
5511 | hash = elf32_arm_hash_entry | |
5512 | (elf_sym_hashes (input_bfd) | |
5513 | [r_indx - symtab_hdr->sh_info]); | |
b38cadfb | 5514 | |
0855e32b NS |
5515 | /* Only look for stubs on branch instructions, or |
5516 | non-relaxed TLSCALL */ | |
906e58ca | 5517 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
5518 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
5519 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
5520 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
5521 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 | 5522 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
0855e32b NS |
5523 | && (r_type != (unsigned int) R_ARM_PLT32) |
5524 | && !((r_type == (unsigned int) R_ARM_TLS_CALL | |
5525 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
5526 | && r_type == elf32_arm_tls_transition | |
5527 | (info, r_type, &hash->root) | |
5528 | && ((hash ? hash->tls_type | |
5529 | : (elf32_arm_local_got_tls_type | |
5530 | (input_bfd)[r_indx])) | |
5531 | & GOT_TLS_GDESC) != 0)) | |
906e58ca NC |
5532 | continue; |
5533 | ||
5534 | /* Now determine the call target, its name, value, | |
5535 | section. */ | |
5536 | sym_sec = NULL; | |
5537 | sym_value = 0; | |
5538 | destination = 0; | |
7413f23f | 5539 | sym_name = NULL; |
b38cadfb | 5540 | |
0855e32b NS |
5541 | if (r_type == (unsigned int) R_ARM_TLS_CALL |
5542 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
5543 | { | |
5544 | /* A non-relaxed TLS call. The target is the | |
5545 | plt-resident trampoline and nothing to do | |
5546 | with the symbol. */ | |
5547 | BFD_ASSERT (htab->tls_trampoline > 0); | |
5548 | sym_sec = htab->root.splt; | |
5549 | sym_value = htab->tls_trampoline; | |
5550 | hash = 0; | |
34e77a92 | 5551 | st_type = STT_FUNC; |
35fc36a8 | 5552 | branch_type = ST_BRANCH_TO_ARM; |
0855e32b NS |
5553 | } |
5554 | else if (!hash) | |
906e58ca NC |
5555 | { |
5556 | /* It's a local symbol. */ | |
5557 | Elf_Internal_Sym *sym; | |
906e58ca NC |
5558 | |
5559 | if (local_syms == NULL) | |
5560 | { | |
5561 | local_syms | |
5562 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
5563 | if (local_syms == NULL) | |
5564 | local_syms | |
5565 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
5566 | symtab_hdr->sh_info, 0, | |
5567 | NULL, NULL, NULL); | |
5568 | if (local_syms == NULL) | |
5569 | goto error_ret_free_internal; | |
5570 | } | |
5571 | ||
5572 | sym = local_syms + r_indx; | |
f6d250ce TS |
5573 | if (sym->st_shndx == SHN_UNDEF) |
5574 | sym_sec = bfd_und_section_ptr; | |
5575 | else if (sym->st_shndx == SHN_ABS) | |
5576 | sym_sec = bfd_abs_section_ptr; | |
5577 | else if (sym->st_shndx == SHN_COMMON) | |
5578 | sym_sec = bfd_com_section_ptr; | |
5579 | else | |
5580 | sym_sec = | |
5581 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); | |
5582 | ||
ffcb4889 NS |
5583 | if (!sym_sec) |
5584 | /* This is an undefined symbol. It can never | |
6a631e86 | 5585 | be resolved. */ |
ffcb4889 | 5586 | continue; |
fe33d2fa | 5587 | |
906e58ca NC |
5588 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
5589 | sym_value = sym->st_value; | |
5590 | destination = (sym_value + irela->r_addend | |
5591 | + sym_sec->output_offset | |
5592 | + sym_sec->output_section->vma); | |
34e77a92 | 5593 | st_type = ELF_ST_TYPE (sym->st_info); |
39d911fc TP |
5594 | branch_type = |
5595 | ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
7413f23f DJ |
5596 | sym_name |
5597 | = bfd_elf_string_from_elf_section (input_bfd, | |
5598 | symtab_hdr->sh_link, | |
5599 | sym->st_name); | |
906e58ca NC |
5600 | } |
5601 | else | |
5602 | { | |
5603 | /* It's an external symbol. */ | |
906e58ca NC |
5604 | while (hash->root.root.type == bfd_link_hash_indirect |
5605 | || hash->root.root.type == bfd_link_hash_warning) | |
5606 | hash = ((struct elf32_arm_link_hash_entry *) | |
5607 | hash->root.root.u.i.link); | |
5608 | ||
5609 | if (hash->root.root.type == bfd_link_hash_defined | |
5610 | || hash->root.root.type == bfd_link_hash_defweak) | |
5611 | { | |
5612 | sym_sec = hash->root.root.u.def.section; | |
5613 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
5614 | |
5615 | struct elf32_arm_link_hash_table *globals = | |
5616 | elf32_arm_hash_table (info); | |
5617 | ||
5618 | /* For a destination in a shared library, | |
5619 | use the PLT stub as target address to | |
5620 | decide whether a branch stub is | |
5621 | needed. */ | |
4dfe6ac6 | 5622 | if (globals != NULL |
362d30a1 | 5623 | && globals->root.splt != NULL |
4dfe6ac6 | 5624 | && hash != NULL |
022f8312 CL |
5625 | && hash->root.plt.offset != (bfd_vma) -1) |
5626 | { | |
362d30a1 | 5627 | sym_sec = globals->root.splt; |
022f8312 CL |
5628 | sym_value = hash->root.plt.offset; |
5629 | if (sym_sec->output_section != NULL) | |
5630 | destination = (sym_value | |
5631 | + sym_sec->output_offset | |
5632 | + sym_sec->output_section->vma); | |
5633 | } | |
5634 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
5635 | destination = (sym_value + irela->r_addend |
5636 | + sym_sec->output_offset | |
5637 | + sym_sec->output_section->vma); | |
5638 | } | |
69c5861e CL |
5639 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
5640 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
5641 | { | |
5642 | /* For a shared library, use the PLT stub as | |
5643 | target address to decide whether a long | |
5644 | branch stub is needed. | |
5645 | For absolute code, they cannot be handled. */ | |
5646 | struct elf32_arm_link_hash_table *globals = | |
5647 | elf32_arm_hash_table (info); | |
5648 | ||
4dfe6ac6 | 5649 | if (globals != NULL |
362d30a1 | 5650 | && globals->root.splt != NULL |
4dfe6ac6 | 5651 | && hash != NULL |
69c5861e CL |
5652 | && hash->root.plt.offset != (bfd_vma) -1) |
5653 | { | |
362d30a1 | 5654 | sym_sec = globals->root.splt; |
69c5861e CL |
5655 | sym_value = hash->root.plt.offset; |
5656 | if (sym_sec->output_section != NULL) | |
5657 | destination = (sym_value | |
5658 | + sym_sec->output_offset | |
5659 | + sym_sec->output_section->vma); | |
5660 | } | |
5661 | else | |
5662 | continue; | |
5663 | } | |
906e58ca NC |
5664 | else |
5665 | { | |
5666 | bfd_set_error (bfd_error_bad_value); | |
5667 | goto error_ret_free_internal; | |
5668 | } | |
34e77a92 | 5669 | st_type = hash->root.type; |
39d911fc TP |
5670 | branch_type = |
5671 | ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
7413f23f | 5672 | sym_name = hash->root.root.root.string; |
906e58ca NC |
5673 | } |
5674 | ||
48229727 | 5675 | do |
7413f23f | 5676 | { |
b715f643 TP |
5677 | bfd_boolean new_stub; |
5678 | ||
48229727 JB |
5679 | /* Determine what (if any) linker stub is needed. */ |
5680 | stub_type = arm_type_of_stub (info, section, irela, | |
34e77a92 RS |
5681 | st_type, &branch_type, |
5682 | hash, destination, sym_sec, | |
48229727 JB |
5683 | input_bfd, sym_name); |
5684 | if (stub_type == arm_stub_none) | |
5685 | break; | |
5686 | ||
48229727 JB |
5687 | /* We've either created a stub for this reloc already, |
5688 | or we are about to. */ | |
b715f643 TP |
5689 | created_stub = |
5690 | elf32_arm_create_stub (htab, stub_type, section, irela, | |
5691 | sym_sec, hash, | |
5692 | (char *) sym_name, sym_value, | |
5693 | branch_type, &new_stub); | |
7413f23f | 5694 | |
b715f643 TP |
5695 | if (!created_stub) |
5696 | goto error_ret_free_internal; | |
5697 | else if (!new_stub) | |
5698 | break; | |
99059e56 | 5699 | else |
b715f643 | 5700 | stub_changed = TRUE; |
99059e56 RM |
5701 | } |
5702 | while (0); | |
5703 | ||
5704 | /* Look for relocations which might trigger Cortex-A8 | |
5705 | erratum. */ | |
5706 | if (htab->fix_cortex_a8 | |
5707 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5708 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
5709 | || r_type == (unsigned int) R_ARM_THM_CALL | |
5710 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
5711 | { | |
5712 | bfd_vma from = section->output_section->vma | |
5713 | + section->output_offset | |
5714 | + irela->r_offset; | |
5715 | ||
5716 | if ((from & 0xfff) == 0xffe) | |
5717 | { | |
5718 | /* Found a candidate. Note we haven't checked the | |
5719 | destination is within 4K here: if we do so (and | |
5720 | don't create an entry in a8_relocs) we can't tell | |
5721 | that a branch should have been relocated when | |
5722 | scanning later. */ | |
5723 | if (num_a8_relocs == a8_reloc_table_size) | |
5724 | { | |
5725 | a8_reloc_table_size *= 2; | |
5726 | a8_relocs = (struct a8_erratum_reloc *) | |
5727 | bfd_realloc (a8_relocs, | |
5728 | sizeof (struct a8_erratum_reloc) | |
5729 | * a8_reloc_table_size); | |
5730 | } | |
5731 | ||
5732 | a8_relocs[num_a8_relocs].from = from; | |
5733 | a8_relocs[num_a8_relocs].destination = destination; | |
5734 | a8_relocs[num_a8_relocs].r_type = r_type; | |
5735 | a8_relocs[num_a8_relocs].branch_type = branch_type; | |
5736 | a8_relocs[num_a8_relocs].sym_name = sym_name; | |
5737 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
5738 | a8_relocs[num_a8_relocs].hash = hash; | |
5739 | ||
5740 | num_a8_relocs++; | |
5741 | } | |
5742 | } | |
906e58ca NC |
5743 | } |
5744 | ||
99059e56 RM |
5745 | /* We're done with the internal relocs, free them. */ |
5746 | if (elf_section_data (section)->relocs == NULL) | |
5747 | free (internal_relocs); | |
5748 | } | |
48229727 | 5749 | |
99059e56 | 5750 | if (htab->fix_cortex_a8) |
48229727 | 5751 | { |
99059e56 RM |
5752 | /* Sort relocs which might apply to Cortex-A8 erratum. */ |
5753 | qsort (a8_relocs, num_a8_relocs, | |
eb7c4339 | 5754 | sizeof (struct a8_erratum_reloc), |
99059e56 | 5755 | &a8_reloc_compare); |
48229727 | 5756 | |
99059e56 RM |
5757 | /* Scan for branches which might trigger Cortex-A8 erratum. */ |
5758 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
48229727 | 5759 | &num_a8_fixes, &a8_fix_table_size, |
eb7c4339 NS |
5760 | a8_relocs, num_a8_relocs, |
5761 | prev_num_a8_fixes, &stub_changed) | |
5762 | != 0) | |
48229727 | 5763 | goto error_ret_free_local; |
5e681ec4 | 5764 | } |
7f991970 AM |
5765 | |
5766 | if (local_syms != NULL | |
5767 | && symtab_hdr->contents != (unsigned char *) local_syms) | |
5768 | { | |
5769 | if (!info->keep_memory) | |
5770 | free (local_syms); | |
5771 | else | |
5772 | symtab_hdr->contents = (unsigned char *) local_syms; | |
5773 | } | |
5e681ec4 PB |
5774 | } |
5775 | ||
eb7c4339 | 5776 | if (prev_num_a8_fixes != num_a8_fixes) |
99059e56 | 5777 | stub_changed = TRUE; |
48229727 | 5778 | |
906e58ca NC |
5779 | if (!stub_changed) |
5780 | break; | |
5e681ec4 | 5781 | |
906e58ca NC |
5782 | /* OK, we've added some stubs. Find out the new size of the |
5783 | stub sections. */ | |
5784 | for (stub_sec = htab->stub_bfd->sections; | |
5785 | stub_sec != NULL; | |
5786 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
5787 | { |
5788 | /* Ignore non-stub sections. */ | |
5789 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
5790 | continue; | |
5791 | ||
5792 | stub_sec->size = 0; | |
5793 | } | |
b34b2d70 | 5794 | |
d7c5bd02 | 5795 | /* Compute stub section size, considering padding. */ |
906e58ca | 5796 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
d7c5bd02 TP |
5797 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; |
5798 | stub_type++) | |
5799 | { | |
5800 | int size, padding; | |
5801 | asection **stub_sec_p; | |
5802 | ||
5803 | padding = arm_dedicated_stub_section_padding (stub_type); | |
5804 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
5805 | /* Skip if no stub input section or no stub section padding | |
5806 | required. */ | |
5807 | if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0) | |
5808 | continue; | |
5809 | /* Stub section padding required but no dedicated section. */ | |
5810 | BFD_ASSERT (stub_sec_p); | |
5811 | ||
5812 | size = (*stub_sec_p)->size; | |
5813 | size = (size + padding - 1) & ~(padding - 1); | |
5814 | (*stub_sec_p)->size = size; | |
5815 | } | |
906e58ca | 5816 | |
48229727 JB |
5817 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
5818 | if (htab->fix_cortex_a8) | |
99059e56 RM |
5819 | for (i = 0; i < num_a8_fixes; i++) |
5820 | { | |
48229727 | 5821 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, |
daa4adae | 5822 | a8_fixes[i].section, htab, a8_fixes[i].stub_type); |
48229727 JB |
5823 | |
5824 | if (stub_sec == NULL) | |
7f991970 | 5825 | return FALSE; |
48229727 | 5826 | |
99059e56 RM |
5827 | stub_sec->size |
5828 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
5829 | NULL); | |
5830 | } | |
48229727 JB |
5831 | |
5832 | ||
906e58ca NC |
5833 | /* Ask the linker to do its stuff. */ |
5834 | (*htab->layout_sections_again) (); | |
ba93b8ac DJ |
5835 | } |
5836 | ||
48229727 JB |
5837 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
5838 | if (htab->fix_cortex_a8) | |
5839 | { | |
5840 | for (i = 0; i < num_a8_fixes; i++) | |
99059e56 RM |
5841 | { |
5842 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5843 | char *stub_name = a8_fixes[i].stub_name; | |
5844 | asection *section = a8_fixes[i].section; | |
5845 | unsigned int section_id = a8_fixes[i].section->id; | |
5846 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
5847 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
5848 | const insn_sequence *template_sequence; | |
5849 | int template_size, size = 0; | |
5850 | ||
5851 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
5852 | TRUE, FALSE); | |
5853 | if (stub_entry == NULL) | |
5854 | { | |
5855 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
5856 | section->owner, | |
5857 | stub_name); | |
5858 | return FALSE; | |
5859 | } | |
5860 | ||
5861 | stub_entry->stub_sec = stub_sec; | |
5862 | stub_entry->stub_offset = 0; | |
5863 | stub_entry->id_sec = link_sec; | |
5864 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
8d9d9490 | 5865 | stub_entry->source_value = a8_fixes[i].offset; |
99059e56 | 5866 | stub_entry->target_section = a8_fixes[i].section; |
8d9d9490 | 5867 | stub_entry->target_value = a8_fixes[i].target_offset; |
99059e56 | 5868 | stub_entry->orig_insn = a8_fixes[i].orig_insn; |
35fc36a8 | 5869 | stub_entry->branch_type = a8_fixes[i].branch_type; |
48229727 | 5870 | |
99059e56 RM |
5871 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
5872 | &template_sequence, | |
5873 | &template_size); | |
48229727 | 5874 | |
99059e56 RM |
5875 | stub_entry->stub_size = size; |
5876 | stub_entry->stub_template = template_sequence; | |
5877 | stub_entry->stub_template_size = template_size; | |
5878 | } | |
48229727 JB |
5879 | |
5880 | /* Stash the Cortex-A8 erratum fix array for use later in | |
99059e56 | 5881 | elf32_arm_write_section(). */ |
48229727 JB |
5882 | htab->a8_erratum_fixes = a8_fixes; |
5883 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
5884 | } | |
5885 | else | |
5886 | { | |
5887 | htab->a8_erratum_fixes = NULL; | |
5888 | htab->num_a8_erratum_fixes = 0; | |
5889 | } | |
906e58ca | 5890 | return TRUE; |
5e681ec4 PB |
5891 | } |
5892 | ||
906e58ca NC |
5893 | /* Build all the stubs associated with the current output file. The |
5894 | stubs are kept in a hash table attached to the main linker hash | |
5895 | table. We also set up the .plt entries for statically linked PIC | |
5896 | functions here. This function is called via arm_elf_finish in the | |
5897 | linker. */ | |
252b5132 | 5898 | |
906e58ca NC |
5899 | bfd_boolean |
5900 | elf32_arm_build_stubs (struct bfd_link_info *info) | |
252b5132 | 5901 | { |
906e58ca NC |
5902 | asection *stub_sec; |
5903 | struct bfd_hash_table *table; | |
5904 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 5905 | |
906e58ca | 5906 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
5907 | if (htab == NULL) |
5908 | return FALSE; | |
252b5132 | 5909 | |
906e58ca NC |
5910 | for (stub_sec = htab->stub_bfd->sections; |
5911 | stub_sec != NULL; | |
5912 | stub_sec = stub_sec->next) | |
252b5132 | 5913 | { |
906e58ca NC |
5914 | bfd_size_type size; |
5915 | ||
8029a119 | 5916 | /* Ignore non-stub sections. */ |
906e58ca NC |
5917 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
5918 | continue; | |
5919 | ||
d7c5bd02 TP |
5920 | /* Allocate memory to hold the linker stubs. Zeroing the stub sections |
5921 | must at least be done for stub section requiring padding. */ | |
906e58ca | 5922 | size = stub_sec->size; |
21d799b5 | 5923 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca NC |
5924 | if (stub_sec->contents == NULL && size != 0) |
5925 | return FALSE; | |
5926 | stub_sec->size = 0; | |
252b5132 RH |
5927 | } |
5928 | ||
906e58ca NC |
5929 | /* Build the stubs as directed by the stub hash table. */ |
5930 | table = &htab->stub_hash_table; | |
5931 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
5932 | if (htab->fix_cortex_a8) |
5933 | { | |
5934 | /* Place the cortex a8 stubs last. */ | |
5935 | htab->fix_cortex_a8 = -1; | |
5936 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
5937 | } | |
252b5132 | 5938 | |
906e58ca | 5939 | return TRUE; |
252b5132 RH |
5940 | } |
5941 | ||
9b485d32 NC |
5942 | /* Locate the Thumb encoded calling stub for NAME. */ |
5943 | ||
252b5132 | 5944 | static struct elf_link_hash_entry * |
57e8b36a NC |
5945 | find_thumb_glue (struct bfd_link_info *link_info, |
5946 | const char *name, | |
f2a9dd69 | 5947 | char **error_message) |
252b5132 RH |
5948 | { |
5949 | char *tmp_name; | |
5950 | struct elf_link_hash_entry *hash; | |
5951 | struct elf32_arm_link_hash_table *hash_table; | |
5952 | ||
5953 | /* We need a pointer to the armelf specific hash table. */ | |
5954 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
5955 | if (hash_table == NULL) |
5956 | return NULL; | |
252b5132 | 5957 | |
21d799b5 | 5958 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 5959 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
5960 | |
5961 | BFD_ASSERT (tmp_name); | |
5962 | ||
5963 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
5964 | ||
5965 | hash = elf_link_hash_lookup | |
b34976b6 | 5966 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 5967 | |
b1657152 AM |
5968 | if (hash == NULL |
5969 | && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"), | |
5970 | tmp_name, name) == -1) | |
5971 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
5972 | |
5973 | free (tmp_name); | |
5974 | ||
5975 | return hash; | |
5976 | } | |
5977 | ||
9b485d32 NC |
5978 | /* Locate the ARM encoded calling stub for NAME. */ |
5979 | ||
252b5132 | 5980 | static struct elf_link_hash_entry * |
57e8b36a NC |
5981 | find_arm_glue (struct bfd_link_info *link_info, |
5982 | const char *name, | |
f2a9dd69 | 5983 | char **error_message) |
252b5132 RH |
5984 | { |
5985 | char *tmp_name; | |
5986 | struct elf_link_hash_entry *myh; | |
5987 | struct elf32_arm_link_hash_table *hash_table; | |
5988 | ||
5989 | /* We need a pointer to the elfarm specific hash table. */ | |
5990 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
5991 | if (hash_table == NULL) |
5992 | return NULL; | |
252b5132 | 5993 | |
21d799b5 | 5994 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 5995 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
5996 | |
5997 | BFD_ASSERT (tmp_name); | |
5998 | ||
5999 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
6000 | ||
6001 | myh = elf_link_hash_lookup | |
b34976b6 | 6002 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 6003 | |
b1657152 AM |
6004 | if (myh == NULL |
6005 | && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"), | |
6006 | tmp_name, name) == -1) | |
6007 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
6008 | |
6009 | free (tmp_name); | |
6010 | ||
6011 | return myh; | |
6012 | } | |
6013 | ||
8f6277f5 | 6014 | /* ARM->Thumb glue (static images): |
252b5132 RH |
6015 | |
6016 | .arm | |
6017 | __func_from_arm: | |
6018 | ldr r12, __func_addr | |
6019 | bx r12 | |
6020 | __func_addr: | |
906e58ca | 6021 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 6022 | |
26079076 PB |
6023 | (v5t static images) |
6024 | .arm | |
6025 | __func_from_arm: | |
6026 | ldr pc, __func_addr | |
6027 | __func_addr: | |
906e58ca | 6028 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 6029 | |
8f6277f5 PB |
6030 | (relocatable images) |
6031 | .arm | |
6032 | __func_from_arm: | |
6033 | ldr r12, __func_offset | |
6034 | add r12, r12, pc | |
6035 | bx r12 | |
6036 | __func_offset: | |
8029a119 | 6037 | .word func - . */ |
8f6277f5 PB |
6038 | |
6039 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
6040 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
6041 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
6042 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
6043 | ||
26079076 PB |
6044 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
6045 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
6046 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
6047 | ||
8f6277f5 PB |
6048 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
6049 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
6050 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
6051 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
6052 | ||
9b485d32 | 6053 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 6054 | |
8029a119 NC |
6055 | .thumb .thumb |
6056 | .align 2 .align 2 | |
6057 | __func_from_thumb: __func_from_thumb: | |
6058 | bx pc push {r6, lr} | |
6059 | nop ldr r6, __func_addr | |
6060 | .arm mov lr, pc | |
6061 | b func bx r6 | |
99059e56 RM |
6062 | .arm |
6063 | ;; back_to_thumb | |
6064 | ldmia r13! {r6, lr} | |
6065 | bx lr | |
6066 | __func_addr: | |
6067 | .word func */ | |
252b5132 RH |
6068 | |
6069 | #define THUMB2ARM_GLUE_SIZE 8 | |
6070 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
6071 | static const insn16 t2a2_noop_insn = 0x46c0; | |
6072 | static const insn32 t2a3_b_insn = 0xea000000; | |
6073 | ||
c7b8f16e | 6074 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
a504d23a LA |
6075 | #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16 |
6076 | #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24 | |
c7b8f16e | 6077 | |
845b51d6 PB |
6078 | #define ARM_BX_VENEER_SIZE 12 |
6079 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
6080 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
6081 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
6082 | ||
7e392df6 | 6083 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
6084 | static void |
6085 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
6086 | { |
6087 | asection * s; | |
8029a119 | 6088 | bfd_byte * contents; |
252b5132 | 6089 | |
8029a119 | 6090 | if (size == 0) |
3e6b1042 DJ |
6091 | { |
6092 | /* Do not include empty glue sections in the output. */ | |
6093 | if (abfd != NULL) | |
6094 | { | |
3d4d4302 | 6095 | s = bfd_get_linker_section (abfd, name); |
3e6b1042 DJ |
6096 | if (s != NULL) |
6097 | s->flags |= SEC_EXCLUDE; | |
6098 | } | |
6099 | return; | |
6100 | } | |
252b5132 | 6101 | |
8029a119 | 6102 | BFD_ASSERT (abfd != NULL); |
252b5132 | 6103 | |
3d4d4302 | 6104 | s = bfd_get_linker_section (abfd, name); |
8029a119 | 6105 | BFD_ASSERT (s != NULL); |
252b5132 | 6106 | |
21d799b5 | 6107 | contents = (bfd_byte *) bfd_alloc (abfd, size); |
252b5132 | 6108 | |
8029a119 NC |
6109 | BFD_ASSERT (s->size == size); |
6110 | s->contents = contents; | |
6111 | } | |
906e58ca | 6112 | |
8029a119 NC |
6113 | bfd_boolean |
6114 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) | |
6115 | { | |
6116 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 6117 | |
8029a119 NC |
6118 | globals = elf32_arm_hash_table (info); |
6119 | BFD_ASSERT (globals != NULL); | |
906e58ca | 6120 | |
8029a119 NC |
6121 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6122 | globals->arm_glue_size, | |
6123 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 6124 | |
8029a119 NC |
6125 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6126 | globals->thumb_glue_size, | |
6127 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 6128 | |
8029a119 NC |
6129 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6130 | globals->vfp11_erratum_glue_size, | |
6131 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 6132 | |
a504d23a LA |
6133 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6134 | globals->stm32l4xx_erratum_glue_size, | |
6135 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
6136 | ||
8029a119 NC |
6137 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6138 | globals->bx_glue_size, | |
845b51d6 PB |
6139 | ARM_BX_GLUE_SECTION_NAME); |
6140 | ||
b34976b6 | 6141 | return TRUE; |
252b5132 RH |
6142 | } |
6143 | ||
a4fd1a8e | 6144 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
6145 | returns the symbol identifying the stub. */ |
6146 | ||
a4fd1a8e | 6147 | static struct elf_link_hash_entry * |
57e8b36a NC |
6148 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
6149 | struct elf_link_hash_entry * h) | |
252b5132 RH |
6150 | { |
6151 | const char * name = h->root.root.string; | |
63b0f745 | 6152 | asection * s; |
252b5132 RH |
6153 | char * tmp_name; |
6154 | struct elf_link_hash_entry * myh; | |
14a793b2 | 6155 | struct bfd_link_hash_entry * bh; |
252b5132 | 6156 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 6157 | bfd_vma val; |
2f475487 | 6158 | bfd_size_type size; |
252b5132 RH |
6159 | |
6160 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
6161 | BFD_ASSERT (globals != NULL); |
6162 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6163 | ||
3d4d4302 | 6164 | s = bfd_get_linker_section |
252b5132 RH |
6165 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); |
6166 | ||
252b5132 RH |
6167 | BFD_ASSERT (s != NULL); |
6168 | ||
21d799b5 | 6169 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 6170 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
6171 | |
6172 | BFD_ASSERT (tmp_name); | |
6173 | ||
6174 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
6175 | ||
6176 | myh = elf_link_hash_lookup | |
b34976b6 | 6177 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
6178 | |
6179 | if (myh != NULL) | |
6180 | { | |
9b485d32 | 6181 | /* We've already seen this guy. */ |
252b5132 | 6182 | free (tmp_name); |
a4fd1a8e | 6183 | return myh; |
252b5132 RH |
6184 | } |
6185 | ||
57e8b36a NC |
6186 | /* The only trick here is using hash_table->arm_glue_size as the value. |
6187 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
6188 | putting it. The +1 on the value marks that the stub has not been |
6189 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 6190 | bh = NULL; |
dc810e39 AM |
6191 | val = globals->arm_glue_size + 1; |
6192 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
6193 | tmp_name, BSF_GLOBAL, s, val, | |
b34976b6 | 6194 | NULL, TRUE, FALSE, &bh); |
252b5132 | 6195 | |
b7693d02 DJ |
6196 | myh = (struct elf_link_hash_entry *) bh; |
6197 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6198 | myh->forced_local = 1; | |
6199 | ||
252b5132 RH |
6200 | free (tmp_name); |
6201 | ||
0e1862bb L |
6202 | if (bfd_link_pic (link_info) |
6203 | || globals->root.is_relocatable_executable | |
27e55c4d | 6204 | || globals->pic_veneer) |
2f475487 | 6205 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
6206 | else if (globals->use_blx) |
6207 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 6208 | else |
2f475487 AM |
6209 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
6210 | ||
6211 | s->size += size; | |
6212 | globals->arm_glue_size += size; | |
252b5132 | 6213 | |
a4fd1a8e | 6214 | return myh; |
252b5132 RH |
6215 | } |
6216 | ||
845b51d6 PB |
6217 | /* Allocate space for ARMv4 BX veneers. */ |
6218 | ||
6219 | static void | |
6220 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
6221 | { | |
6222 | asection * s; | |
6223 | struct elf32_arm_link_hash_table *globals; | |
6224 | char *tmp_name; | |
6225 | struct elf_link_hash_entry *myh; | |
6226 | struct bfd_link_hash_entry *bh; | |
6227 | bfd_vma val; | |
6228 | ||
6229 | /* BX PC does not need a veneer. */ | |
6230 | if (reg == 15) | |
6231 | return; | |
6232 | ||
6233 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
6234 | BFD_ASSERT (globals != NULL); |
6235 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6236 | ||
6237 | /* Check if this veneer has already been allocated. */ | |
6238 | if (globals->bx_glue_offset[reg]) | |
6239 | return; | |
6240 | ||
3d4d4302 | 6241 | s = bfd_get_linker_section |
845b51d6 PB |
6242 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); |
6243 | ||
6244 | BFD_ASSERT (s != NULL); | |
6245 | ||
6246 | /* Add symbol for veneer. */ | |
21d799b5 NC |
6247 | tmp_name = (char *) |
6248 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
906e58ca | 6249 | |
845b51d6 | 6250 | BFD_ASSERT (tmp_name); |
906e58ca | 6251 | |
845b51d6 | 6252 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 6253 | |
845b51d6 PB |
6254 | myh = elf_link_hash_lookup |
6255 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 6256 | |
845b51d6 | 6257 | BFD_ASSERT (myh == NULL); |
906e58ca | 6258 | |
845b51d6 PB |
6259 | bh = NULL; |
6260 | val = globals->bx_glue_size; | |
6261 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
99059e56 RM |
6262 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
6263 | NULL, TRUE, FALSE, &bh); | |
845b51d6 PB |
6264 | |
6265 | myh = (struct elf_link_hash_entry *) bh; | |
6266 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6267 | myh->forced_local = 1; | |
6268 | ||
6269 | s->size += ARM_BX_VENEER_SIZE; | |
6270 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
6271 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
6272 | } | |
6273 | ||
6274 | ||
c7b8f16e JB |
6275 | /* Add an entry to the code/data map for section SEC. */ |
6276 | ||
6277 | static void | |
6278 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
6279 | { | |
6280 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
6281 | unsigned int newidx; | |
906e58ca | 6282 | |
c7b8f16e JB |
6283 | if (sec_data->map == NULL) |
6284 | { | |
21d799b5 | 6285 | sec_data->map = (elf32_arm_section_map *) |
99059e56 | 6286 | bfd_malloc (sizeof (elf32_arm_section_map)); |
c7b8f16e JB |
6287 | sec_data->mapcount = 0; |
6288 | sec_data->mapsize = 1; | |
6289 | } | |
906e58ca | 6290 | |
c7b8f16e | 6291 | newidx = sec_data->mapcount++; |
906e58ca | 6292 | |
c7b8f16e JB |
6293 | if (sec_data->mapcount > sec_data->mapsize) |
6294 | { | |
6295 | sec_data->mapsize *= 2; | |
21d799b5 | 6296 | sec_data->map = (elf32_arm_section_map *) |
99059e56 RM |
6297 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize |
6298 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
6299 | } |
6300 | ||
6301 | if (sec_data->map) | |
6302 | { | |
6303 | sec_data->map[newidx].vma = vma; | |
6304 | sec_data->map[newidx].type = type; | |
c7b8f16e | 6305 | } |
c7b8f16e JB |
6306 | } |
6307 | ||
6308 | ||
6309 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
6310 | veneers are handled for now. */ | |
6311 | ||
6312 | static bfd_vma | |
6313 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
99059e56 RM |
6314 | elf32_vfp11_erratum_list *branch, |
6315 | bfd *branch_bfd, | |
6316 | asection *branch_sec, | |
6317 | unsigned int offset) | |
c7b8f16e JB |
6318 | { |
6319 | asection *s; | |
6320 | struct elf32_arm_link_hash_table *hash_table; | |
6321 | char *tmp_name; | |
6322 | struct elf_link_hash_entry *myh; | |
6323 | struct bfd_link_hash_entry *bh; | |
6324 | bfd_vma val; | |
6325 | struct _arm_elf_section_data *sec_data; | |
c7b8f16e | 6326 | elf32_vfp11_erratum_list *newerr; |
906e58ca | 6327 | |
c7b8f16e | 6328 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
6329 | BFD_ASSERT (hash_table != NULL); |
6330 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 6331 | |
3d4d4302 | 6332 | s = bfd_get_linker_section |
c7b8f16e | 6333 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); |
906e58ca | 6334 | |
c7b8f16e | 6335 | sec_data = elf32_arm_section_data (s); |
906e58ca | 6336 | |
c7b8f16e | 6337 | BFD_ASSERT (s != NULL); |
906e58ca | 6338 | |
21d799b5 | 6339 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 6340 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
906e58ca | 6341 | |
c7b8f16e | 6342 | BFD_ASSERT (tmp_name); |
906e58ca | 6343 | |
c7b8f16e JB |
6344 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
6345 | hash_table->num_vfp11_fixes); | |
906e58ca | 6346 | |
c7b8f16e JB |
6347 | myh = elf_link_hash_lookup |
6348 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 6349 | |
c7b8f16e | 6350 | BFD_ASSERT (myh == NULL); |
906e58ca | 6351 | |
c7b8f16e JB |
6352 | bh = NULL; |
6353 | val = hash_table->vfp11_erratum_glue_size; | |
6354 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
99059e56 RM |
6355 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
6356 | NULL, TRUE, FALSE, &bh); | |
c7b8f16e JB |
6357 | |
6358 | myh = (struct elf_link_hash_entry *) bh; | |
6359 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6360 | myh->forced_local = 1; | |
6361 | ||
6362 | /* Link veneer back to calling location. */ | |
c7e2358a | 6363 | sec_data->erratumcount += 1; |
21d799b5 NC |
6364 | newerr = (elf32_vfp11_erratum_list *) |
6365 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 6366 | |
c7b8f16e JB |
6367 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
6368 | newerr->vma = -1; | |
6369 | newerr->u.v.branch = branch; | |
6370 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
6371 | branch->u.b.veneer = newerr; | |
6372 | ||
6373 | newerr->next = sec_data->erratumlist; | |
6374 | sec_data->erratumlist = newerr; | |
6375 | ||
6376 | /* A symbol for the return from the veneer. */ | |
6377 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6378 | hash_table->num_vfp11_fixes); | |
6379 | ||
6380 | myh = elf_link_hash_lookup | |
6381 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 6382 | |
c7b8f16e JB |
6383 | if (myh != NULL) |
6384 | abort (); | |
6385 | ||
6386 | bh = NULL; | |
6387 | val = offset + 4; | |
6388 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
6389 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
906e58ca | 6390 | |
c7b8f16e JB |
6391 | myh = (struct elf_link_hash_entry *) bh; |
6392 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6393 | myh->forced_local = 1; | |
6394 | ||
6395 | free (tmp_name); | |
906e58ca | 6396 | |
c7b8f16e JB |
6397 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
6398 | entry for that symbol to the code/data map for the section. */ | |
6399 | if (hash_table->vfp11_erratum_glue_size == 0) | |
6400 | { | |
6401 | bh = NULL; | |
6402 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
99059e56 | 6403 | ever requires this erratum fix. */ |
c7b8f16e JB |
6404 | _bfd_generic_link_add_one_symbol (link_info, |
6405 | hash_table->bfd_of_glue_owner, "$a", | |
6406 | BSF_LOCAL, s, 0, NULL, | |
99059e56 | 6407 | TRUE, FALSE, &bh); |
c7b8f16e JB |
6408 | |
6409 | myh = (struct elf_link_hash_entry *) bh; | |
6410 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
6411 | myh->forced_local = 1; | |
906e58ca | 6412 | |
c7b8f16e | 6413 | /* The elf32_arm_init_maps function only cares about symbols from input |
99059e56 RM |
6414 | BFDs. We must make a note of this generated mapping symbol |
6415 | ourselves so that code byteswapping works properly in | |
6416 | elf32_arm_write_section. */ | |
c7b8f16e JB |
6417 | elf32_arm_section_map_add (s, 'a', 0); |
6418 | } | |
906e58ca | 6419 | |
c7b8f16e JB |
6420 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
6421 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
6422 | hash_table->num_vfp11_fixes++; | |
906e58ca | 6423 | |
c7b8f16e JB |
6424 | /* The offset of the veneer. */ |
6425 | return val; | |
6426 | } | |
6427 | ||
a504d23a LA |
6428 | /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode |
6429 | veneers need to be handled because used only in Cortex-M. */ | |
6430 | ||
6431 | static bfd_vma | |
6432 | record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info, | |
6433 | elf32_stm32l4xx_erratum_list *branch, | |
6434 | bfd *branch_bfd, | |
6435 | asection *branch_sec, | |
6436 | unsigned int offset, | |
6437 | bfd_size_type veneer_size) | |
6438 | { | |
6439 | asection *s; | |
6440 | struct elf32_arm_link_hash_table *hash_table; | |
6441 | char *tmp_name; | |
6442 | struct elf_link_hash_entry *myh; | |
6443 | struct bfd_link_hash_entry *bh; | |
6444 | bfd_vma val; | |
6445 | struct _arm_elf_section_data *sec_data; | |
6446 | elf32_stm32l4xx_erratum_list *newerr; | |
6447 | ||
6448 | hash_table = elf32_arm_hash_table (link_info); | |
6449 | BFD_ASSERT (hash_table != NULL); | |
6450 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
6451 | ||
6452 | s = bfd_get_linker_section | |
6453 | (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
6454 | ||
6455 | BFD_ASSERT (s != NULL); | |
6456 | ||
6457 | sec_data = elf32_arm_section_data (s); | |
6458 | ||
6459 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
6460 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
6461 | ||
6462 | BFD_ASSERT (tmp_name); | |
6463 | ||
6464 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
6465 | hash_table->num_stm32l4xx_fixes); | |
6466 | ||
6467 | myh = elf_link_hash_lookup | |
6468 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
6469 | ||
6470 | BFD_ASSERT (myh == NULL); | |
6471 | ||
6472 | bh = NULL; | |
6473 | val = hash_table->stm32l4xx_erratum_glue_size; | |
6474 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
6475 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
6476 | NULL, TRUE, FALSE, &bh); | |
6477 | ||
6478 | myh = (struct elf_link_hash_entry *) bh; | |
6479 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6480 | myh->forced_local = 1; | |
6481 | ||
6482 | /* Link veneer back to calling location. */ | |
6483 | sec_data->stm32l4xx_erratumcount += 1; | |
6484 | newerr = (elf32_stm32l4xx_erratum_list *) | |
6485 | bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list)); | |
6486 | ||
6487 | newerr->type = STM32L4XX_ERRATUM_VENEER; | |
6488 | newerr->vma = -1; | |
6489 | newerr->u.v.branch = branch; | |
6490 | newerr->u.v.id = hash_table->num_stm32l4xx_fixes; | |
6491 | branch->u.b.veneer = newerr; | |
6492 | ||
6493 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
6494 | sec_data->stm32l4xx_erratumlist = newerr; | |
6495 | ||
6496 | /* A symbol for the return from the veneer. */ | |
6497 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6498 | hash_table->num_stm32l4xx_fixes); | |
6499 | ||
6500 | myh = elf_link_hash_lookup | |
6501 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
6502 | ||
6503 | if (myh != NULL) | |
6504 | abort (); | |
6505 | ||
6506 | bh = NULL; | |
6507 | val = offset + 4; | |
6508 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
6509 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
6510 | ||
6511 | myh = (struct elf_link_hash_entry *) bh; | |
6512 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6513 | myh->forced_local = 1; | |
6514 | ||
6515 | free (tmp_name); | |
6516 | ||
6517 | /* Generate a mapping symbol for the veneer section, and explicitly add an | |
6518 | entry for that symbol to the code/data map for the section. */ | |
6519 | if (hash_table->stm32l4xx_erratum_glue_size == 0) | |
6520 | { | |
6521 | bh = NULL; | |
6522 | /* Creates a THUMB symbol since there is no other choice. */ | |
6523 | _bfd_generic_link_add_one_symbol (link_info, | |
6524 | hash_table->bfd_of_glue_owner, "$t", | |
6525 | BSF_LOCAL, s, 0, NULL, | |
6526 | TRUE, FALSE, &bh); | |
6527 | ||
6528 | myh = (struct elf_link_hash_entry *) bh; | |
6529 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
6530 | myh->forced_local = 1; | |
6531 | ||
6532 | /* The elf32_arm_init_maps function only cares about symbols from input | |
6533 | BFDs. We must make a note of this generated mapping symbol | |
6534 | ourselves so that code byteswapping works properly in | |
6535 | elf32_arm_write_section. */ | |
6536 | elf32_arm_section_map_add (s, 't', 0); | |
6537 | } | |
6538 | ||
6539 | s->size += veneer_size; | |
6540 | hash_table->stm32l4xx_erratum_glue_size += veneer_size; | |
6541 | hash_table->num_stm32l4xx_fixes++; | |
6542 | ||
6543 | /* The offset of the veneer. */ | |
6544 | return val; | |
6545 | } | |
6546 | ||
8029a119 | 6547 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
6548 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
6549 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
6550 | |
6551 | /* Create a fake section for use by the ARM backend of the linker. */ | |
6552 | ||
6553 | static bfd_boolean | |
6554 | arm_make_glue_section (bfd * abfd, const char * name) | |
6555 | { | |
6556 | asection * sec; | |
6557 | ||
3d4d4302 | 6558 | sec = bfd_get_linker_section (abfd, name); |
8029a119 NC |
6559 | if (sec != NULL) |
6560 | /* Already made. */ | |
6561 | return TRUE; | |
6562 | ||
3d4d4302 | 6563 | sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); |
8029a119 NC |
6564 | |
6565 | if (sec == NULL | |
6566 | || !bfd_set_section_alignment (abfd, sec, 2)) | |
6567 | return FALSE; | |
6568 | ||
6569 | /* Set the gc mark to prevent the section from being removed by garbage | |
6570 | collection, despite the fact that no relocs refer to this section. */ | |
6571 | sec->gc_mark = 1; | |
6572 | ||
6573 | return TRUE; | |
6574 | } | |
6575 | ||
1db37fe6 YG |
6576 | /* Set size of .plt entries. This function is called from the |
6577 | linker scripts in ld/emultempl/{armelf}.em. */ | |
6578 | ||
6579 | void | |
6580 | bfd_elf32_arm_use_long_plt (void) | |
6581 | { | |
6582 | elf32_arm_use_long_plt_entry = TRUE; | |
6583 | } | |
6584 | ||
8afb0e02 NC |
6585 | /* Add the glue sections to ABFD. This function is called from the |
6586 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 6587 | |
b34976b6 | 6588 | bfd_boolean |
57e8b36a NC |
6589 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
6590 | struct bfd_link_info *info) | |
252b5132 | 6591 | { |
a504d23a LA |
6592 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
6593 | bfd_boolean dostm32l4xx = globals | |
6594 | && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE; | |
6595 | bfd_boolean addglue; | |
6596 | ||
8afb0e02 NC |
6597 | /* If we are only performing a partial |
6598 | link do not bother adding the glue. */ | |
0e1862bb | 6599 | if (bfd_link_relocatable (info)) |
b34976b6 | 6600 | return TRUE; |
252b5132 | 6601 | |
a504d23a | 6602 | addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
8029a119 NC |
6603 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) |
6604 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
6605 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
a504d23a LA |
6606 | |
6607 | if (!dostm32l4xx) | |
6608 | return addglue; | |
6609 | ||
6610 | return addglue | |
6611 | && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
8afb0e02 NC |
6612 | } |
6613 | ||
daa4adae TP |
6614 | /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This |
6615 | ensures they are not marked for deletion by | |
6616 | strip_excluded_output_sections () when veneers are going to be created | |
6617 | later. Not doing so would trigger assert on empty section size in | |
6618 | lang_size_sections_1 (). */ | |
6619 | ||
6620 | void | |
6621 | bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info) | |
6622 | { | |
6623 | enum elf32_arm_stub_type stub_type; | |
6624 | ||
6625 | /* If we are only performing a partial | |
6626 | link do not bother adding the glue. */ | |
6627 | if (bfd_link_relocatable (info)) | |
6628 | return; | |
6629 | ||
6630 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) | |
6631 | { | |
6632 | asection *out_sec; | |
6633 | const char *out_sec_name; | |
6634 | ||
6635 | if (!arm_dedicated_stub_output_section_required (stub_type)) | |
6636 | continue; | |
6637 | ||
6638 | out_sec_name = arm_dedicated_stub_output_section_name (stub_type); | |
6639 | out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name); | |
6640 | if (out_sec != NULL) | |
6641 | out_sec->flags |= SEC_KEEP; | |
6642 | } | |
6643 | } | |
6644 | ||
8afb0e02 NC |
6645 | /* Select a BFD to be used to hold the sections used by the glue code. |
6646 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 6647 | {armelf/pe}.em. */ |
8afb0e02 | 6648 | |
b34976b6 | 6649 | bfd_boolean |
57e8b36a | 6650 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
6651 | { |
6652 | struct elf32_arm_link_hash_table *globals; | |
6653 | ||
6654 | /* If we are only performing a partial link | |
6655 | do not bother getting a bfd to hold the glue. */ | |
0e1862bb | 6656 | if (bfd_link_relocatable (info)) |
b34976b6 | 6657 | return TRUE; |
8afb0e02 | 6658 | |
b7693d02 DJ |
6659 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
6660 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
6661 | ||
8afb0e02 | 6662 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
6663 | BFD_ASSERT (globals != NULL); |
6664 | ||
6665 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 6666 | return TRUE; |
8afb0e02 | 6667 | |
252b5132 RH |
6668 | /* Save the bfd for later use. */ |
6669 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 6670 | |
b34976b6 | 6671 | return TRUE; |
252b5132 RH |
6672 | } |
6673 | ||
906e58ca NC |
6674 | static void |
6675 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 6676 | { |
2de70689 MGD |
6677 | int cpu_arch; |
6678 | ||
b38cadfb | 6679 | cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
2de70689 MGD |
6680 | Tag_CPU_arch); |
6681 | ||
6682 | if (globals->fix_arm1176) | |
6683 | { | |
6684 | if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) | |
6685 | globals->use_blx = 1; | |
6686 | } | |
6687 | else | |
6688 | { | |
6689 | if (cpu_arch > TAG_CPU_ARCH_V4T) | |
6690 | globals->use_blx = 1; | |
6691 | } | |
39b41c9c PB |
6692 | } |
6693 | ||
b34976b6 | 6694 | bfd_boolean |
57e8b36a | 6695 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 6696 | struct bfd_link_info *link_info) |
252b5132 RH |
6697 | { |
6698 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 6699 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
6700 | Elf_Internal_Rela *irel, *irelend; |
6701 | bfd_byte *contents = NULL; | |
252b5132 RH |
6702 | |
6703 | asection *sec; | |
6704 | struct elf32_arm_link_hash_table *globals; | |
6705 | ||
6706 | /* If we are only performing a partial link do not bother | |
6707 | to construct any glue. */ | |
0e1862bb | 6708 | if (bfd_link_relocatable (link_info)) |
b34976b6 | 6709 | return TRUE; |
252b5132 | 6710 | |
39ce1a6a NC |
6711 | /* Here we have a bfd that is to be included on the link. We have a |
6712 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 6713 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 6714 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
6715 | |
6716 | check_use_blx (globals); | |
252b5132 | 6717 | |
d504ffc8 | 6718 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 6719 | { |
d003868e AM |
6720 | _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."), |
6721 | abfd); | |
e489d0ae PB |
6722 | return FALSE; |
6723 | } | |
f21f3fe0 | 6724 | |
39ce1a6a NC |
6725 | /* PR 5398: If we have not decided to include any loadable sections in |
6726 | the output then we will not have a glue owner bfd. This is OK, it | |
6727 | just means that there is nothing else for us to do here. */ | |
6728 | if (globals->bfd_of_glue_owner == NULL) | |
6729 | return TRUE; | |
6730 | ||
252b5132 RH |
6731 | /* Rummage around all the relocs and map the glue vectors. */ |
6732 | sec = abfd->sections; | |
6733 | ||
6734 | if (sec == NULL) | |
b34976b6 | 6735 | return TRUE; |
252b5132 RH |
6736 | |
6737 | for (; sec != NULL; sec = sec->next) | |
6738 | { | |
6739 | if (sec->reloc_count == 0) | |
6740 | continue; | |
6741 | ||
2f475487 AM |
6742 | if ((sec->flags & SEC_EXCLUDE) != 0) |
6743 | continue; | |
6744 | ||
0ffa91dd | 6745 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 6746 | |
9b485d32 | 6747 | /* Load the relocs. */ |
6cdc0ccc | 6748 | internal_relocs |
906e58ca | 6749 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
252b5132 | 6750 | |
6cdc0ccc AM |
6751 | if (internal_relocs == NULL) |
6752 | goto error_return; | |
252b5132 | 6753 | |
6cdc0ccc AM |
6754 | irelend = internal_relocs + sec->reloc_count; |
6755 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
6756 | { |
6757 | long r_type; | |
6758 | unsigned long r_index; | |
252b5132 RH |
6759 | |
6760 | struct elf_link_hash_entry *h; | |
6761 | ||
6762 | r_type = ELF32_R_TYPE (irel->r_info); | |
6763 | r_index = ELF32_R_SYM (irel->r_info); | |
6764 | ||
9b485d32 | 6765 | /* These are the only relocation types we care about. */ |
ba96a88f | 6766 | if ( r_type != R_ARM_PC24 |
845b51d6 | 6767 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
6768 | continue; |
6769 | ||
6770 | /* Get the section contents if we haven't done so already. */ | |
6771 | if (contents == NULL) | |
6772 | { | |
6773 | /* Get cached copy if it exists. */ | |
6774 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
6775 | contents = elf_section_data (sec)->this_hdr.contents; | |
6776 | else | |
6777 | { | |
6778 | /* Go get them off disk. */ | |
57e8b36a | 6779 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
6780 | goto error_return; |
6781 | } | |
6782 | } | |
6783 | ||
845b51d6 PB |
6784 | if (r_type == R_ARM_V4BX) |
6785 | { | |
6786 | int reg; | |
6787 | ||
6788 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
6789 | record_arm_bx_glue (link_info, reg); | |
6790 | continue; | |
6791 | } | |
6792 | ||
a7c10850 | 6793 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
6794 | h = NULL; |
6795 | ||
9b485d32 | 6796 | /* We don't care about local symbols. */ |
252b5132 RH |
6797 | if (r_index < symtab_hdr->sh_info) |
6798 | continue; | |
6799 | ||
9b485d32 | 6800 | /* This is an external symbol. */ |
252b5132 RH |
6801 | r_index -= symtab_hdr->sh_info; |
6802 | h = (struct elf_link_hash_entry *) | |
6803 | elf_sym_hashes (abfd)[r_index]; | |
6804 | ||
6805 | /* If the relocation is against a static symbol it must be within | |
6806 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
6807 | if (h == NULL) | |
6808 | continue; | |
6809 | ||
d504ffc8 DJ |
6810 | /* If the call will go through a PLT entry then we do not need |
6811 | glue. */ | |
362d30a1 | 6812 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
b7693d02 DJ |
6813 | continue; |
6814 | ||
252b5132 RH |
6815 | switch (r_type) |
6816 | { | |
6817 | case R_ARM_PC24: | |
6818 | /* This one is a call from arm code. We need to look up | |
99059e56 RM |
6819 | the target of the call. If it is a thumb target, we |
6820 | insert glue. */ | |
39d911fc TP |
6821 | if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal) |
6822 | == ST_BRANCH_TO_THUMB) | |
252b5132 RH |
6823 | record_arm_to_thumb_glue (link_info, h); |
6824 | break; | |
6825 | ||
252b5132 | 6826 | default: |
c6596c5e | 6827 | abort (); |
252b5132 RH |
6828 | } |
6829 | } | |
6cdc0ccc AM |
6830 | |
6831 | if (contents != NULL | |
6832 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6833 | free (contents); | |
6834 | contents = NULL; | |
6835 | ||
6836 | if (internal_relocs != NULL | |
6837 | && elf_section_data (sec)->relocs != internal_relocs) | |
6838 | free (internal_relocs); | |
6839 | internal_relocs = NULL; | |
252b5132 RH |
6840 | } |
6841 | ||
b34976b6 | 6842 | return TRUE; |
9a5aca8c | 6843 | |
252b5132 | 6844 | error_return: |
6cdc0ccc AM |
6845 | if (contents != NULL |
6846 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6847 | free (contents); | |
6848 | if (internal_relocs != NULL | |
6849 | && elf_section_data (sec)->relocs != internal_relocs) | |
6850 | free (internal_relocs); | |
9a5aca8c | 6851 | |
b34976b6 | 6852 | return FALSE; |
252b5132 | 6853 | } |
7e392df6 | 6854 | #endif |
252b5132 | 6855 | |
eb043451 | 6856 | |
c7b8f16e JB |
6857 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
6858 | ||
6859 | void | |
6860 | bfd_elf32_arm_init_maps (bfd *abfd) | |
6861 | { | |
6862 | Elf_Internal_Sym *isymbuf; | |
6863 | Elf_Internal_Shdr *hdr; | |
6864 | unsigned int i, localsyms; | |
6865 | ||
af1f4419 NC |
6866 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
6867 | if (! is_arm_elf (abfd)) | |
6868 | return; | |
6869 | ||
c7b8f16e JB |
6870 | if ((abfd->flags & DYNAMIC) != 0) |
6871 | return; | |
6872 | ||
0ffa91dd | 6873 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
6874 | localsyms = hdr->sh_info; |
6875 | ||
6876 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
6877 | should contain the number of local symbols, which should come before any | |
6878 | global symbols. Mapping symbols are always local. */ | |
6879 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
6880 | NULL); | |
6881 | ||
6882 | /* No internal symbols read? Skip this BFD. */ | |
6883 | if (isymbuf == NULL) | |
6884 | return; | |
6885 | ||
6886 | for (i = 0; i < localsyms; i++) | |
6887 | { | |
6888 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
6889 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
6890 | const char *name; | |
906e58ca | 6891 | |
c7b8f16e | 6892 | if (sec != NULL |
99059e56 RM |
6893 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) |
6894 | { | |
6895 | name = bfd_elf_string_from_elf_section (abfd, | |
6896 | hdr->sh_link, isym->st_name); | |
906e58ca | 6897 | |
99059e56 | 6898 | if (bfd_is_arm_special_symbol_name (name, |
c7b8f16e | 6899 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) |
99059e56 RM |
6900 | elf32_arm_section_map_add (sec, name[1], isym->st_value); |
6901 | } | |
c7b8f16e JB |
6902 | } |
6903 | } | |
6904 | ||
6905 | ||
48229727 JB |
6906 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
6907 | say what they wanted. */ | |
6908 | ||
6909 | void | |
6910 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6911 | { | |
6912 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
6913 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
6914 | ||
4dfe6ac6 NC |
6915 | if (globals == NULL) |
6916 | return; | |
6917 | ||
48229727 JB |
6918 | if (globals->fix_cortex_a8 == -1) |
6919 | { | |
6920 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
6921 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
6922 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
6923 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
6924 | globals->fix_cortex_a8 = 1; | |
6925 | else | |
6926 | globals->fix_cortex_a8 = 0; | |
6927 | } | |
6928 | } | |
6929 | ||
6930 | ||
c7b8f16e JB |
6931 | void |
6932 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6933 | { | |
6934 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 6935 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 6936 | |
4dfe6ac6 NC |
6937 | if (globals == NULL) |
6938 | return; | |
c7b8f16e JB |
6939 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
6940 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
6941 | { | |
6942 | switch (globals->vfp11_fix) | |
99059e56 RM |
6943 | { |
6944 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
6945 | case BFD_ARM_VFP11_FIX_NONE: | |
6946 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
6947 | break; | |
6948 | ||
6949 | default: | |
6950 | /* Give a warning, but do as the user requests anyway. */ | |
6951 | (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum " | |
6952 | "workaround is not necessary for target architecture"), obfd); | |
6953 | } | |
c7b8f16e JB |
6954 | } |
6955 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
6956 | /* For earlier architectures, we might need the workaround, but do not | |
6957 | enable it by default. If users is running with broken hardware, they | |
6958 | must enable the erratum fix explicitly. */ | |
6959 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
6960 | } | |
6961 | ||
a504d23a LA |
6962 | void |
6963 | bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6964 | { | |
6965 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
6966 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
6967 | ||
6968 | if (globals == NULL) | |
6969 | return; | |
6970 | ||
6971 | /* We assume only Cortex-M4 may require the fix. */ | |
6972 | if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M | |
6973 | || out_attr[Tag_CPU_arch_profile].i != 'M') | |
6974 | { | |
6975 | if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE) | |
6976 | /* Give a warning, but do as the user requests anyway. */ | |
6977 | (*_bfd_error_handler) | |
6978 | (_("%B: warning: selected STM32L4XX erratum " | |
6979 | "workaround is not necessary for target architecture"), obfd); | |
6980 | } | |
6981 | } | |
c7b8f16e | 6982 | |
906e58ca NC |
6983 | enum bfd_arm_vfp11_pipe |
6984 | { | |
c7b8f16e JB |
6985 | VFP11_FMAC, |
6986 | VFP11_LS, | |
6987 | VFP11_DS, | |
6988 | VFP11_BAD | |
6989 | }; | |
6990 | ||
6991 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
6992 | registers, or X:RX for double-precision registers, where RX is the group of | |
6993 | four bits in the instruction encoding and X is the single extension bit. | |
6994 | RX and X fields are specified using their lowest (starting) bit. The return | |
6995 | value is: | |
6996 | ||
6997 | 0...31: single-precision registers s0...s31 | |
6998 | 32...63: double-precision registers d0...d31. | |
906e58ca | 6999 | |
c7b8f16e JB |
7000 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
7001 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 7002 | |
c7b8f16e JB |
7003 | static unsigned int |
7004 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, | |
99059e56 | 7005 | unsigned int x) |
c7b8f16e JB |
7006 | { |
7007 | if (is_double) | |
7008 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
7009 | else | |
7010 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
7011 | } | |
7012 | ||
7013 | /* Set bits in *WMASK according to a register number REG as encoded by | |
7014 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
7015 | ||
7016 | static void | |
7017 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
7018 | { | |
7019 | if (reg < 32) | |
7020 | *wmask |= 1 << reg; | |
7021 | else if (reg < 48) | |
7022 | *wmask |= 3 << ((reg - 32) * 2); | |
7023 | } | |
7024 | ||
7025 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
7026 | ||
7027 | static bfd_boolean | |
7028 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) | |
7029 | { | |
7030 | int i; | |
906e58ca | 7031 | |
c7b8f16e JB |
7032 | for (i = 0; i < numregs; i++) |
7033 | { | |
7034 | unsigned int reg = regs[i]; | |
7035 | ||
7036 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
99059e56 | 7037 | return TRUE; |
906e58ca | 7038 | |
c7b8f16e JB |
7039 | reg -= 32; |
7040 | ||
7041 | if (reg >= 16) | |
99059e56 | 7042 | continue; |
906e58ca | 7043 | |
c7b8f16e | 7044 | if ((wmask & (3 << (reg * 2))) != 0) |
99059e56 | 7045 | return TRUE; |
c7b8f16e | 7046 | } |
906e58ca | 7047 | |
c7b8f16e JB |
7048 | return FALSE; |
7049 | } | |
7050 | ||
7051 | /* In this function, we're interested in two things: finding input registers | |
7052 | for VFP data-processing instructions, and finding the set of registers which | |
7053 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
7054 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
7055 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
7056 | implemented by the chip in question). DP registers are marked by setting | |
7057 | both SP registers in the write mask). */ | |
7058 | ||
7059 | static enum bfd_arm_vfp11_pipe | |
7060 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
99059e56 | 7061 | int *numregs) |
c7b8f16e | 7062 | { |
91d6fa6a | 7063 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
c7b8f16e JB |
7064 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
7065 | ||
7066 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
7067 | { | |
7068 | unsigned int pqrs; | |
7069 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
7070 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
7071 | ||
7072 | pqrs = ((insn & 0x00800000) >> 20) | |
99059e56 RM |
7073 | | ((insn & 0x00300000) >> 19) |
7074 | | ((insn & 0x00000040) >> 6); | |
c7b8f16e JB |
7075 | |
7076 | switch (pqrs) | |
99059e56 RM |
7077 | { |
7078 | case 0: /* fmac[sd]. */ | |
7079 | case 1: /* fnmac[sd]. */ | |
7080 | case 2: /* fmsc[sd]. */ | |
7081 | case 3: /* fnmsc[sd]. */ | |
7082 | vpipe = VFP11_FMAC; | |
7083 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7084 | regs[0] = fd; | |
7085 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
7086 | regs[2] = fm; | |
7087 | *numregs = 3; | |
7088 | break; | |
7089 | ||
7090 | case 4: /* fmul[sd]. */ | |
7091 | case 5: /* fnmul[sd]. */ | |
7092 | case 6: /* fadd[sd]. */ | |
7093 | case 7: /* fsub[sd]. */ | |
7094 | vpipe = VFP11_FMAC; | |
7095 | goto vfp_binop; | |
7096 | ||
7097 | case 8: /* fdiv[sd]. */ | |
7098 | vpipe = VFP11_DS; | |
7099 | vfp_binop: | |
7100 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7101 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
7102 | regs[1] = fm; | |
7103 | *numregs = 2; | |
7104 | break; | |
7105 | ||
7106 | case 15: /* extended opcode. */ | |
7107 | { | |
7108 | unsigned int extn = ((insn >> 15) & 0x1e) | |
7109 | | ((insn >> 7) & 1); | |
7110 | ||
7111 | switch (extn) | |
7112 | { | |
7113 | case 0: /* fcpy[sd]. */ | |
7114 | case 1: /* fabs[sd]. */ | |
7115 | case 2: /* fneg[sd]. */ | |
7116 | case 8: /* fcmp[sd]. */ | |
7117 | case 9: /* fcmpe[sd]. */ | |
7118 | case 10: /* fcmpz[sd]. */ | |
7119 | case 11: /* fcmpez[sd]. */ | |
7120 | case 16: /* fuito[sd]. */ | |
7121 | case 17: /* fsito[sd]. */ | |
7122 | case 24: /* ftoui[sd]. */ | |
7123 | case 25: /* ftouiz[sd]. */ | |
7124 | case 26: /* ftosi[sd]. */ | |
7125 | case 27: /* ftosiz[sd]. */ | |
7126 | /* These instructions will not bounce due to underflow. */ | |
7127 | *numregs = 0; | |
7128 | vpipe = VFP11_FMAC; | |
7129 | break; | |
7130 | ||
7131 | case 3: /* fsqrt[sd]. */ | |
7132 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
7133 | registers to cause the erratum in previous instructions. */ | |
7134 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7135 | vpipe = VFP11_DS; | |
7136 | break; | |
7137 | ||
7138 | case 15: /* fcvt{ds,sd}. */ | |
7139 | { | |
7140 | int rnum = 0; | |
7141 | ||
7142 | bfd_arm_vfp11_write_mask (destmask, fd); | |
c7b8f16e JB |
7143 | |
7144 | /* Only FCVTSD can underflow. */ | |
99059e56 RM |
7145 | if ((insn & 0x100) != 0) |
7146 | regs[rnum++] = fm; | |
c7b8f16e | 7147 | |
99059e56 | 7148 | *numregs = rnum; |
c7b8f16e | 7149 | |
99059e56 RM |
7150 | vpipe = VFP11_FMAC; |
7151 | } | |
7152 | break; | |
c7b8f16e | 7153 | |
99059e56 RM |
7154 | default: |
7155 | return VFP11_BAD; | |
7156 | } | |
7157 | } | |
7158 | break; | |
c7b8f16e | 7159 | |
99059e56 RM |
7160 | default: |
7161 | return VFP11_BAD; | |
7162 | } | |
c7b8f16e JB |
7163 | } |
7164 | /* Two-register transfer. */ | |
7165 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
7166 | { | |
7167 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 7168 | |
c7b8f16e JB |
7169 | if ((insn & 0x100000) == 0) |
7170 | { | |
99059e56 RM |
7171 | if (is_double) |
7172 | bfd_arm_vfp11_write_mask (destmask, fm); | |
7173 | else | |
7174 | { | |
7175 | bfd_arm_vfp11_write_mask (destmask, fm); | |
7176 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
7177 | } | |
c7b8f16e JB |
7178 | } |
7179 | ||
91d6fa6a | 7180 | vpipe = VFP11_LS; |
c7b8f16e JB |
7181 | } |
7182 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
7183 | { | |
7184 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
7185 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 7186 | |
c7b8f16e | 7187 | switch (puw) |
99059e56 RM |
7188 | { |
7189 | case 0: /* Two-reg transfer. We should catch these above. */ | |
7190 | abort (); | |
906e58ca | 7191 | |
99059e56 RM |
7192 | case 2: /* fldm[sdx]. */ |
7193 | case 3: | |
7194 | case 5: | |
7195 | { | |
7196 | unsigned int i, offset = insn & 0xff; | |
c7b8f16e | 7197 | |
99059e56 RM |
7198 | if (is_double) |
7199 | offset >>= 1; | |
c7b8f16e | 7200 | |
99059e56 RM |
7201 | for (i = fd; i < fd + offset; i++) |
7202 | bfd_arm_vfp11_write_mask (destmask, i); | |
7203 | } | |
7204 | break; | |
906e58ca | 7205 | |
99059e56 RM |
7206 | case 4: /* fld[sd]. */ |
7207 | case 6: | |
7208 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7209 | break; | |
906e58ca | 7210 | |
99059e56 RM |
7211 | default: |
7212 | return VFP11_BAD; | |
7213 | } | |
c7b8f16e | 7214 | |
91d6fa6a | 7215 | vpipe = VFP11_LS; |
c7b8f16e JB |
7216 | } |
7217 | /* Single-register transfer. Note L==0. */ | |
7218 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
7219 | { | |
7220 | unsigned int opcode = (insn >> 21) & 7; | |
7221 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
7222 | ||
7223 | switch (opcode) | |
99059e56 RM |
7224 | { |
7225 | case 0: /* fmsr/fmdlr. */ | |
7226 | case 1: /* fmdhr. */ | |
7227 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
7228 | destination register. I don't know if this is exactly right, | |
7229 | but it is the conservative choice. */ | |
7230 | bfd_arm_vfp11_write_mask (destmask, fn); | |
7231 | break; | |
7232 | ||
7233 | case 7: /* fmxr. */ | |
7234 | break; | |
7235 | } | |
c7b8f16e | 7236 | |
91d6fa6a | 7237 | vpipe = VFP11_LS; |
c7b8f16e JB |
7238 | } |
7239 | ||
91d6fa6a | 7240 | return vpipe; |
c7b8f16e JB |
7241 | } |
7242 | ||
7243 | ||
7244 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
7245 | ||
7246 | ||
7247 | /* Look for potentially-troublesome code sequences which might trigger the | |
7248 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
7249 | (available from ARM) for details of the erratum. A short version is | |
7250 | described in ld.texinfo. */ | |
7251 | ||
7252 | bfd_boolean | |
7253 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) | |
7254 | { | |
7255 | asection *sec; | |
7256 | bfd_byte *contents = NULL; | |
7257 | int state = 0; | |
7258 | int regs[3], numregs = 0; | |
7259 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
7260 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 7261 | |
4dfe6ac6 NC |
7262 | if (globals == NULL) |
7263 | return FALSE; | |
7264 | ||
c7b8f16e JB |
7265 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
7266 | The states transition as follows: | |
906e58ca | 7267 | |
c7b8f16e | 7268 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
99059e56 RM |
7269 | A VFP FMAC-pipeline instruction has been seen. Fill |
7270 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
7271 | instruction in 'first_fmac'. | |
c7b8f16e JB |
7272 | |
7273 | 1 -> 2 | |
99059e56 RM |
7274 | Any instruction, except for a VFP instruction which overwrites |
7275 | regs[*]. | |
906e58ca | 7276 | |
c7b8f16e JB |
7277 | 1 -> 3 [ -> 0 ] or |
7278 | 2 -> 3 [ -> 0 ] | |
99059e56 RM |
7279 | A VFP instruction has been seen which overwrites any of regs[*]. |
7280 | We must make a veneer! Reset state to 0 before examining next | |
7281 | instruction. | |
906e58ca | 7282 | |
c7b8f16e | 7283 | 2 -> 0 |
99059e56 RM |
7284 | If we fail to match anything in state 2, reset to state 0 and reset |
7285 | the instruction pointer to the instruction after 'first_fmac'. | |
c7b8f16e JB |
7286 | |
7287 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
7288 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 7289 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
7290 | |
7291 | /* If we are only performing a partial link do not bother | |
7292 | to construct any glue. */ | |
0e1862bb | 7293 | if (bfd_link_relocatable (link_info)) |
c7b8f16e JB |
7294 | return TRUE; |
7295 | ||
0ffa91dd NC |
7296 | /* Skip if this bfd does not correspond to an ELF image. */ |
7297 | if (! is_arm_elf (abfd)) | |
7298 | return TRUE; | |
906e58ca | 7299 | |
c7b8f16e JB |
7300 | /* We should have chosen a fix type by the time we get here. */ |
7301 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
7302 | ||
7303 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
7304 | return TRUE; | |
2e6030b9 | 7305 | |
33a7ffc2 JM |
7306 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
7307 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
7308 | return TRUE; | |
7309 | ||
c7b8f16e JB |
7310 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7311 | { | |
7312 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
7313 | struct _arm_elf_section_data *sec_data; | |
7314 | ||
7315 | /* If we don't have executable progbits, we're not interested in this | |
99059e56 | 7316 | section. Also skip if section is to be excluded. */ |
c7b8f16e | 7317 | if (elf_section_type (sec) != SHT_PROGBITS |
99059e56 RM |
7318 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 |
7319 | || (sec->flags & SEC_EXCLUDE) != 0 | |
dbaa2011 | 7320 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
33a7ffc2 | 7321 | || sec->output_section == bfd_abs_section_ptr |
99059e56 RM |
7322 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
7323 | continue; | |
c7b8f16e JB |
7324 | |
7325 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 7326 | |
c7b8f16e | 7327 | if (sec_data->mapcount == 0) |
99059e56 | 7328 | continue; |
906e58ca | 7329 | |
c7b8f16e JB |
7330 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
7331 | contents = elf_section_data (sec)->this_hdr.contents; | |
7332 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
7333 | goto error_return; | |
7334 | ||
7335 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
7336 | elf32_arm_compare_mapping); | |
7337 | ||
7338 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
7339 | { |
7340 | unsigned int span_start = sec_data->map[span].vma; | |
7341 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
c7b8f16e | 7342 | ? sec->size : sec_data->map[span + 1].vma; |
99059e56 RM |
7343 | char span_type = sec_data->map[span].type; |
7344 | ||
7345 | /* FIXME: Only ARM mode is supported at present. We may need to | |
7346 | support Thumb-2 mode also at some point. */ | |
7347 | if (span_type != 'a') | |
7348 | continue; | |
7349 | ||
7350 | for (i = span_start; i < span_end;) | |
7351 | { | |
7352 | unsigned int next_i = i + 4; | |
7353 | unsigned int insn = bfd_big_endian (abfd) | |
7354 | ? (contents[i] << 24) | |
7355 | | (contents[i + 1] << 16) | |
7356 | | (contents[i + 2] << 8) | |
7357 | | contents[i + 3] | |
7358 | : (contents[i + 3] << 24) | |
7359 | | (contents[i + 2] << 16) | |
7360 | | (contents[i + 1] << 8) | |
7361 | | contents[i]; | |
7362 | unsigned int writemask = 0; | |
7363 | enum bfd_arm_vfp11_pipe vpipe; | |
7364 | ||
7365 | switch (state) | |
7366 | { | |
7367 | case 0: | |
7368 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, | |
7369 | &numregs); | |
7370 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
7371 | operands on either the FMAC or the DS pipeline. This might | |
7372 | lead to slightly overenthusiastic veneer insertion. */ | |
7373 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) | |
7374 | { | |
7375 | state = use_vector ? 1 : 2; | |
7376 | first_fmac = i; | |
7377 | veneer_of_insn = insn; | |
7378 | } | |
7379 | break; | |
7380 | ||
7381 | case 1: | |
7382 | { | |
7383 | int other_regs[3], other_numregs; | |
7384 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 7385 | other_regs, |
99059e56 RM |
7386 | &other_numregs); |
7387 | if (vpipe != VFP11_BAD | |
7388 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 7389 | numregs)) |
99059e56 RM |
7390 | state = 3; |
7391 | else | |
7392 | state = 2; | |
7393 | } | |
7394 | break; | |
7395 | ||
7396 | case 2: | |
7397 | { | |
7398 | int other_regs[3], other_numregs; | |
7399 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 7400 | other_regs, |
99059e56 RM |
7401 | &other_numregs); |
7402 | if (vpipe != VFP11_BAD | |
7403 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 7404 | numregs)) |
99059e56 RM |
7405 | state = 3; |
7406 | else | |
7407 | { | |
7408 | state = 0; | |
7409 | next_i = first_fmac + 4; | |
7410 | } | |
7411 | } | |
7412 | break; | |
7413 | ||
7414 | case 3: | |
7415 | abort (); /* Should be unreachable. */ | |
7416 | } | |
7417 | ||
7418 | if (state == 3) | |
7419 | { | |
7420 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) | |
7421 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
7422 | ||
7423 | elf32_arm_section_data (sec)->erratumcount += 1; | |
7424 | ||
7425 | newerr->u.b.vfp_insn = veneer_of_insn; | |
7426 | ||
7427 | switch (span_type) | |
7428 | { | |
7429 | case 'a': | |
7430 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
7431 | break; | |
7432 | ||
7433 | default: | |
7434 | abort (); | |
7435 | } | |
7436 | ||
7437 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
c7b8f16e JB |
7438 | first_fmac); |
7439 | ||
99059e56 | 7440 | newerr->vma = -1; |
c7b8f16e | 7441 | |
99059e56 RM |
7442 | newerr->next = sec_data->erratumlist; |
7443 | sec_data->erratumlist = newerr; | |
c7b8f16e | 7444 | |
99059e56 RM |
7445 | state = 0; |
7446 | } | |
c7b8f16e | 7447 | |
99059e56 RM |
7448 | i = next_i; |
7449 | } | |
7450 | } | |
906e58ca | 7451 | |
c7b8f16e | 7452 | if (contents != NULL |
99059e56 RM |
7453 | && elf_section_data (sec)->this_hdr.contents != contents) |
7454 | free (contents); | |
c7b8f16e JB |
7455 | contents = NULL; |
7456 | } | |
7457 | ||
7458 | return TRUE; | |
7459 | ||
7460 | error_return: | |
7461 | if (contents != NULL | |
7462 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7463 | free (contents); | |
906e58ca | 7464 | |
c7b8f16e JB |
7465 | return FALSE; |
7466 | } | |
7467 | ||
7468 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
7469 | after sections have been laid out, using specially-named symbols. */ | |
7470 | ||
7471 | void | |
7472 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
7473 | struct bfd_link_info *link_info) | |
7474 | { | |
7475 | asection *sec; | |
7476 | struct elf32_arm_link_hash_table *globals; | |
7477 | char *tmp_name; | |
906e58ca | 7478 | |
0e1862bb | 7479 | if (bfd_link_relocatable (link_info)) |
c7b8f16e | 7480 | return; |
2e6030b9 MS |
7481 | |
7482 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 7483 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
7484 | return; |
7485 | ||
c7b8f16e | 7486 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
7487 | if (globals == NULL) |
7488 | return; | |
906e58ca | 7489 | |
21d799b5 | 7490 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 7491 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
c7b8f16e JB |
7492 | |
7493 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
7494 | { | |
7495 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
7496 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 7497 | |
c7b8f16e | 7498 | for (; errnode != NULL; errnode = errnode->next) |
99059e56 RM |
7499 | { |
7500 | struct elf_link_hash_entry *myh; | |
7501 | bfd_vma vma; | |
7502 | ||
7503 | switch (errnode->type) | |
7504 | { | |
7505 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
7506 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
7507 | /* Find veneer symbol. */ | |
7508 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
c7b8f16e JB |
7509 | errnode->u.b.veneer->u.v.id); |
7510 | ||
99059e56 RM |
7511 | myh = elf_link_hash_lookup |
7512 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
c7b8f16e | 7513 | |
a504d23a LA |
7514 | if (myh == NULL) |
7515 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
7516 | "`%s'"), abfd, tmp_name); | |
7517 | ||
7518 | vma = myh->root.u.def.section->output_section->vma | |
7519 | + myh->root.u.def.section->output_offset | |
7520 | + myh->root.u.def.value; | |
7521 | ||
7522 | errnode->u.b.veneer->vma = vma; | |
7523 | break; | |
7524 | ||
7525 | case VFP11_ERRATUM_ARM_VENEER: | |
7526 | case VFP11_ERRATUM_THUMB_VENEER: | |
7527 | /* Find return location. */ | |
7528 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7529 | errnode->u.v.id); | |
7530 | ||
7531 | myh = elf_link_hash_lookup | |
7532 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
7533 | ||
7534 | if (myh == NULL) | |
7535 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
7536 | "`%s'"), abfd, tmp_name); | |
7537 | ||
7538 | vma = myh->root.u.def.section->output_section->vma | |
7539 | + myh->root.u.def.section->output_offset | |
7540 | + myh->root.u.def.value; | |
7541 | ||
7542 | errnode->u.v.branch->vma = vma; | |
7543 | break; | |
7544 | ||
7545 | default: | |
7546 | abort (); | |
7547 | } | |
7548 | } | |
7549 | } | |
7550 | ||
7551 | free (tmp_name); | |
7552 | } | |
7553 | ||
7554 | /* Find virtual-memory addresses for STM32L4XX erratum veneers and | |
7555 | return locations after sections have been laid out, using | |
7556 | specially-named symbols. */ | |
7557 | ||
7558 | void | |
7559 | bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd, | |
7560 | struct bfd_link_info *link_info) | |
7561 | { | |
7562 | asection *sec; | |
7563 | struct elf32_arm_link_hash_table *globals; | |
7564 | char *tmp_name; | |
7565 | ||
7566 | if (bfd_link_relocatable (link_info)) | |
7567 | return; | |
7568 | ||
7569 | /* Skip if this bfd does not correspond to an ELF image. */ | |
7570 | if (! is_arm_elf (abfd)) | |
7571 | return; | |
7572 | ||
7573 | globals = elf32_arm_hash_table (link_info); | |
7574 | if (globals == NULL) | |
7575 | return; | |
7576 | ||
7577 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
7578 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
7579 | ||
7580 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
7581 | { | |
7582 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
7583 | elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist; | |
7584 | ||
7585 | for (; errnode != NULL; errnode = errnode->next) | |
7586 | { | |
7587 | struct elf_link_hash_entry *myh; | |
7588 | bfd_vma vma; | |
7589 | ||
7590 | switch (errnode->type) | |
7591 | { | |
7592 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
7593 | /* Find veneer symbol. */ | |
7594 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
7595 | errnode->u.b.veneer->u.v.id); | |
7596 | ||
7597 | myh = elf_link_hash_lookup | |
7598 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
7599 | ||
7600 | if (myh == NULL) | |
7601 | (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer " | |
7602 | "`%s'"), abfd, tmp_name); | |
7603 | ||
7604 | vma = myh->root.u.def.section->output_section->vma | |
7605 | + myh->root.u.def.section->output_offset | |
7606 | + myh->root.u.def.value; | |
7607 | ||
7608 | errnode->u.b.veneer->vma = vma; | |
7609 | break; | |
7610 | ||
7611 | case STM32L4XX_ERRATUM_VENEER: | |
7612 | /* Find return location. */ | |
7613 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7614 | errnode->u.v.id); | |
7615 | ||
7616 | myh = elf_link_hash_lookup | |
7617 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
7618 | ||
7619 | if (myh == NULL) | |
7620 | (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer " | |
7621 | "`%s'"), abfd, tmp_name); | |
7622 | ||
7623 | vma = myh->root.u.def.section->output_section->vma | |
7624 | + myh->root.u.def.section->output_offset | |
7625 | + myh->root.u.def.value; | |
7626 | ||
7627 | errnode->u.v.branch->vma = vma; | |
7628 | break; | |
7629 | ||
7630 | default: | |
7631 | abort (); | |
7632 | } | |
7633 | } | |
7634 | } | |
7635 | ||
7636 | free (tmp_name); | |
7637 | } | |
7638 | ||
7639 | static inline bfd_boolean | |
7640 | is_thumb2_ldmia (const insn32 insn) | |
7641 | { | |
7642 | /* Encoding T2: LDM<c>.W <Rn>{!},<registers> | |
7643 | 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
7644 | return (insn & 0xffd02000) == 0xe8900000; | |
7645 | } | |
7646 | ||
7647 | static inline bfd_boolean | |
7648 | is_thumb2_ldmdb (const insn32 insn) | |
7649 | { | |
7650 | /* Encoding T1: LDMDB<c> <Rn>{!},<registers> | |
7651 | 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
7652 | return (insn & 0xffd02000) == 0xe9100000; | |
7653 | } | |
7654 | ||
7655 | static inline bfd_boolean | |
7656 | is_thumb2_vldm (const insn32 insn) | |
7657 | { | |
7658 | /* A6.5 Extension register load or store instruction | |
7659 | A7.7.229 | |
9239bbd3 CM |
7660 | We look for SP 32-bit and DP 64-bit registers. |
7661 | Encoding T1 VLDM{mode}<c> <Rn>{!}, <list> | |
7662 | <list> is consecutive 64-bit registers | |
7663 | 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii | |
a504d23a LA |
7664 | Encoding T2 VLDM{mode}<c> <Rn>{!}, <list> |
7665 | <list> is consecutive 32-bit registers | |
7666 | 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii | |
7667 | if P==0 && U==1 && W==1 && Rn=1101 VPOP | |
7668 | if PUW=010 || PUW=011 || PUW=101 VLDM. */ | |
7669 | return | |
9239bbd3 CM |
7670 | (((insn & 0xfe100f00) == 0xec100b00) || |
7671 | ((insn & 0xfe100f00) == 0xec100a00)) | |
a504d23a LA |
7672 | && /* (IA without !). */ |
7673 | (((((insn << 7) >> 28) & 0xd) == 0x4) | |
9239bbd3 | 7674 | /* (IA with !), includes VPOP (when reg number is SP). */ |
a504d23a LA |
7675 | || ((((insn << 7) >> 28) & 0xd) == 0x5) |
7676 | /* (DB with !). */ | |
7677 | || ((((insn << 7) >> 28) & 0xd) == 0x9)); | |
7678 | } | |
7679 | ||
7680 | /* STM STM32L4XX erratum : This function assumes that it receives an LDM or | |
7681 | VLDM opcode and: | |
7682 | - computes the number and the mode of memory accesses | |
7683 | - decides if the replacement should be done: | |
7684 | . replaces only if > 8-word accesses | |
7685 | . or (testing purposes only) replaces all accesses. */ | |
7686 | ||
7687 | static bfd_boolean | |
7688 | stm32l4xx_need_create_replacing_stub (const insn32 insn, | |
7689 | bfd_arm_stm32l4xx_fix stm32l4xx_fix) | |
7690 | { | |
9239bbd3 | 7691 | int nb_words = 0; |
a504d23a LA |
7692 | |
7693 | /* The field encoding the register list is the same for both LDMIA | |
7694 | and LDMDB encodings. */ | |
7695 | if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn)) | |
9239bbd3 | 7696 | nb_words = popcount (insn & 0x0000ffff); |
a504d23a | 7697 | else if (is_thumb2_vldm (insn)) |
9239bbd3 | 7698 | nb_words = (insn & 0xff); |
a504d23a LA |
7699 | |
7700 | /* DEFAULT mode accounts for the real bug condition situation, | |
7701 | ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ | |
7702 | return | |
9239bbd3 | 7703 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 : |
a504d23a LA |
7704 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE; |
7705 | } | |
7706 | ||
7707 | /* Look for potentially-troublesome code sequences which might trigger | |
7708 | the STM STM32L4XX erratum. */ | |
7709 | ||
7710 | bfd_boolean | |
7711 | bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd, | |
7712 | struct bfd_link_info *link_info) | |
7713 | { | |
7714 | asection *sec; | |
7715 | bfd_byte *contents = NULL; | |
7716 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
7717 | ||
7718 | if (globals == NULL) | |
7719 | return FALSE; | |
7720 | ||
7721 | /* If we are only performing a partial link do not bother | |
7722 | to construct any glue. */ | |
7723 | if (bfd_link_relocatable (link_info)) | |
7724 | return TRUE; | |
7725 | ||
7726 | /* Skip if this bfd does not correspond to an ELF image. */ | |
7727 | if (! is_arm_elf (abfd)) | |
7728 | return TRUE; | |
7729 | ||
7730 | if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE) | |
7731 | return TRUE; | |
7732 | ||
7733 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ | |
7734 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
7735 | return TRUE; | |
7736 | ||
7737 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
7738 | { | |
7739 | unsigned int i, span; | |
7740 | struct _arm_elf_section_data *sec_data; | |
7741 | ||
7742 | /* If we don't have executable progbits, we're not interested in this | |
7743 | section. Also skip if section is to be excluded. */ | |
7744 | if (elf_section_type (sec) != SHT_PROGBITS | |
7745 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
7746 | || (sec->flags & SEC_EXCLUDE) != 0 | |
7747 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS | |
7748 | || sec->output_section == bfd_abs_section_ptr | |
7749 | || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0) | |
7750 | continue; | |
7751 | ||
7752 | sec_data = elf32_arm_section_data (sec); | |
c7b8f16e | 7753 | |
a504d23a LA |
7754 | if (sec_data->mapcount == 0) |
7755 | continue; | |
c7b8f16e | 7756 | |
a504d23a LA |
7757 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
7758 | contents = elf_section_data (sec)->this_hdr.contents; | |
7759 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
7760 | goto error_return; | |
c7b8f16e | 7761 | |
a504d23a LA |
7762 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), |
7763 | elf32_arm_compare_mapping); | |
c7b8f16e | 7764 | |
a504d23a LA |
7765 | for (span = 0; span < sec_data->mapcount; span++) |
7766 | { | |
7767 | unsigned int span_start = sec_data->map[span].vma; | |
7768 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
7769 | ? sec->size : sec_data->map[span + 1].vma; | |
7770 | char span_type = sec_data->map[span].type; | |
7771 | int itblock_current_pos = 0; | |
c7b8f16e | 7772 | |
a504d23a LA |
7773 | /* Only Thumb2 mode need be supported with this CM4 specific |
7774 | code, we should not encounter any arm mode eg span_type | |
7775 | != 'a'. */ | |
7776 | if (span_type != 't') | |
7777 | continue; | |
c7b8f16e | 7778 | |
a504d23a LA |
7779 | for (i = span_start; i < span_end;) |
7780 | { | |
7781 | unsigned int insn = bfd_get_16 (abfd, &contents[i]); | |
7782 | bfd_boolean insn_32bit = FALSE; | |
7783 | bfd_boolean is_ldm = FALSE; | |
7784 | bfd_boolean is_vldm = FALSE; | |
7785 | bfd_boolean is_not_last_in_it_block = FALSE; | |
7786 | ||
7787 | /* The first 16-bits of all 32-bit thumb2 instructions start | |
7788 | with opcode[15..13]=0b111 and the encoded op1 can be anything | |
7789 | except opcode[12..11]!=0b00. | |
7790 | See 32-bit Thumb instruction encoding. */ | |
7791 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
7792 | insn_32bit = TRUE; | |
c7b8f16e | 7793 | |
a504d23a LA |
7794 | /* Compute the predicate that tells if the instruction |
7795 | is concerned by the IT block | |
7796 | - Creates an error if there is a ldm that is not | |
7797 | last in the IT block thus cannot be replaced | |
7798 | - Otherwise we can create a branch at the end of the | |
7799 | IT block, it will be controlled naturally by IT | |
7800 | with the proper pseudo-predicate | |
7801 | - So the only interesting predicate is the one that | |
7802 | tells that we are not on the last item of an IT | |
7803 | block. */ | |
7804 | if (itblock_current_pos != 0) | |
7805 | is_not_last_in_it_block = !!--itblock_current_pos; | |
906e58ca | 7806 | |
a504d23a LA |
7807 | if (insn_32bit) |
7808 | { | |
7809 | /* Load the rest of the insn (in manual-friendly order). */ | |
7810 | insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]); | |
7811 | is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn); | |
7812 | is_vldm = is_thumb2_vldm (insn); | |
7813 | ||
7814 | /* Veneers are created for (v)ldm depending on | |
7815 | option flags and memory accesses conditions; but | |
7816 | if the instruction is not the last instruction of | |
7817 | an IT block, we cannot create a jump there, so we | |
7818 | bail out. */ | |
7819 | if ((is_ldm || is_vldm) && | |
7820 | stm32l4xx_need_create_replacing_stub | |
7821 | (insn, globals->stm32l4xx_fix)) | |
7822 | { | |
7823 | if (is_not_last_in_it_block) | |
7824 | { | |
7825 | (*_bfd_error_handler) | |
7826 | /* Note - overlong line used here to allow for translation. */ | |
7827 | (_("\ | |
7828 | %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n" | |
7829 | "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"), | |
7830 | abfd, sec, (long)i); | |
7831 | } | |
7832 | else | |
7833 | { | |
7834 | elf32_stm32l4xx_erratum_list *newerr = | |
7835 | (elf32_stm32l4xx_erratum_list *) | |
7836 | bfd_zmalloc | |
7837 | (sizeof (elf32_stm32l4xx_erratum_list)); | |
7838 | ||
7839 | elf32_arm_section_data (sec) | |
7840 | ->stm32l4xx_erratumcount += 1; | |
7841 | newerr->u.b.insn = insn; | |
7842 | /* We create only thumb branches. */ | |
7843 | newerr->type = | |
7844 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER; | |
7845 | record_stm32l4xx_erratum_veneer | |
7846 | (link_info, newerr, abfd, sec, | |
7847 | i, | |
7848 | is_ldm ? | |
7849 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE: | |
7850 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
7851 | newerr->vma = -1; | |
7852 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
7853 | sec_data->stm32l4xx_erratumlist = newerr; | |
7854 | } | |
7855 | } | |
7856 | } | |
7857 | else | |
7858 | { | |
7859 | /* A7.7.37 IT p208 | |
7860 | IT blocks are only encoded in T1 | |
7861 | Encoding T1: IT{x{y{z}}} <firstcond> | |
7862 | 1 0 1 1 - 1 1 1 1 - firstcond - mask | |
7863 | if mask = '0000' then see 'related encodings' | |
7864 | We don't deal with UNPREDICTABLE, just ignore these. | |
7865 | There can be no nested IT blocks so an IT block | |
7866 | is naturally a new one for which it is worth | |
7867 | computing its size. */ | |
7868 | bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) && | |
7869 | ((insn & 0x000f) != 0x0000); | |
7870 | /* If we have a new IT block we compute its size. */ | |
7871 | if (is_newitblock) | |
7872 | { | |
7873 | /* Compute the number of instructions controlled | |
7874 | by the IT block, it will be used to decide | |
7875 | whether we are inside an IT block or not. */ | |
7876 | unsigned int mask = insn & 0x000f; | |
7877 | itblock_current_pos = 4 - ctz (mask); | |
7878 | } | |
7879 | } | |
7880 | ||
7881 | i += insn_32bit ? 4 : 2; | |
99059e56 RM |
7882 | } |
7883 | } | |
a504d23a LA |
7884 | |
7885 | if (contents != NULL | |
7886 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7887 | free (contents); | |
7888 | contents = NULL; | |
c7b8f16e | 7889 | } |
906e58ca | 7890 | |
a504d23a LA |
7891 | return TRUE; |
7892 | ||
7893 | error_return: | |
7894 | if (contents != NULL | |
7895 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7896 | free (contents); | |
c7b8f16e | 7897 | |
a504d23a LA |
7898 | return FALSE; |
7899 | } | |
c7b8f16e | 7900 | |
eb043451 PB |
7901 | /* Set target relocation values needed during linking. */ |
7902 | ||
7903 | void | |
bf21ed78 MS |
7904 | bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, |
7905 | struct bfd_link_info *link_info, | |
eb043451 | 7906 | int target1_is_rel, |
319850b4 | 7907 | char * target2_type, |
99059e56 | 7908 | int fix_v4bx, |
c7b8f16e | 7909 | int use_blx, |
99059e56 | 7910 | bfd_arm_vfp11_fix vfp11_fix, |
a504d23a | 7911 | bfd_arm_stm32l4xx_fix stm32l4xx_fix, |
a9dc9481 | 7912 | int no_enum_warn, int no_wchar_warn, |
2de70689 MGD |
7913 | int pic_veneer, int fix_cortex_a8, |
7914 | int fix_arm1176) | |
eb043451 PB |
7915 | { |
7916 | struct elf32_arm_link_hash_table *globals; | |
7917 | ||
7918 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7919 | if (globals == NULL) |
7920 | return; | |
eb043451 PB |
7921 | |
7922 | globals->target1_is_rel = target1_is_rel; | |
7923 | if (strcmp (target2_type, "rel") == 0) | |
7924 | globals->target2_reloc = R_ARM_REL32; | |
eeac373a PB |
7925 | else if (strcmp (target2_type, "abs") == 0) |
7926 | globals->target2_reloc = R_ARM_ABS32; | |
eb043451 PB |
7927 | else if (strcmp (target2_type, "got-rel") == 0) |
7928 | globals->target2_reloc = R_ARM_GOT_PREL; | |
7929 | else | |
7930 | { | |
7931 | _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."), | |
7932 | target2_type); | |
7933 | } | |
319850b4 | 7934 | globals->fix_v4bx = fix_v4bx; |
33bfe774 | 7935 | globals->use_blx |= use_blx; |
c7b8f16e | 7936 | globals->vfp11_fix = vfp11_fix; |
a504d23a | 7937 | globals->stm32l4xx_fix = stm32l4xx_fix; |
27e55c4d | 7938 | globals->pic_veneer = pic_veneer; |
48229727 | 7939 | globals->fix_cortex_a8 = fix_cortex_a8; |
2de70689 | 7940 | globals->fix_arm1176 = fix_arm1176; |
bf21ed78 | 7941 | |
0ffa91dd NC |
7942 | BFD_ASSERT (is_arm_elf (output_bfd)); |
7943 | elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; | |
a9dc9481 | 7944 | elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn; |
eb043451 | 7945 | } |
eb043451 | 7946 | |
12a0a0fd | 7947 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 7948 | |
12a0a0fd PB |
7949 | static void |
7950 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
7951 | { | |
7952 | bfd_vma upper; | |
7953 | bfd_vma lower; | |
7954 | int reloc_sign; | |
7955 | ||
7956 | BFD_ASSERT ((offset & 1) == 0); | |
7957 | ||
7958 | upper = bfd_get_16 (abfd, insn); | |
7959 | lower = bfd_get_16 (abfd, insn + 2); | |
7960 | reloc_sign = (offset < 0) ? 1 : 0; | |
7961 | upper = (upper & ~(bfd_vma) 0x7ff) | |
7962 | | ((offset >> 12) & 0x3ff) | |
7963 | | (reloc_sign << 10); | |
906e58ca | 7964 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
7965 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
7966 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
7967 | | ((offset >> 1) & 0x7ff); | |
7968 | bfd_put_16 (abfd, upper, insn); | |
7969 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
7970 | } |
7971 | ||
9b485d32 NC |
7972 | /* Thumb code calling an ARM function. */ |
7973 | ||
252b5132 | 7974 | static int |
57e8b36a NC |
7975 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
7976 | const char * name, | |
7977 | bfd * input_bfd, | |
7978 | bfd * output_bfd, | |
7979 | asection * input_section, | |
7980 | bfd_byte * hit_data, | |
7981 | asection * sym_sec, | |
7982 | bfd_vma offset, | |
7983 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
7984 | bfd_vma val, |
7985 | char **error_message) | |
252b5132 | 7986 | { |
bcbdc74c | 7987 | asection * s = 0; |
dc810e39 | 7988 | bfd_vma my_offset; |
252b5132 | 7989 | long int ret_offset; |
bcbdc74c NC |
7990 | struct elf_link_hash_entry * myh; |
7991 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 7992 | |
f2a9dd69 | 7993 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 7994 | if (myh == NULL) |
b34976b6 | 7995 | return FALSE; |
252b5132 RH |
7996 | |
7997 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
7998 | BFD_ASSERT (globals != NULL); |
7999 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8000 | ||
8001 | my_offset = myh->root.u.def.value; | |
8002 | ||
3d4d4302 AM |
8003 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8004 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 RH |
8005 | |
8006 | BFD_ASSERT (s != NULL); | |
8007 | BFD_ASSERT (s->contents != NULL); | |
8008 | BFD_ASSERT (s->output_section != NULL); | |
8009 | ||
8010 | if ((my_offset & 0x01) == 0x01) | |
8011 | { | |
8012 | if (sym_sec != NULL | |
8013 | && sym_sec->owner != NULL | |
8014 | && !INTERWORK_FLAG (sym_sec->owner)) | |
8015 | { | |
8f615d07 | 8016 | (*_bfd_error_handler) |
d003868e | 8017 | (_("%B(%s): warning: interworking not enabled.\n" |
3aaeb7d3 | 8018 | " first occurrence: %B: Thumb call to ARM"), |
d003868e | 8019 | sym_sec->owner, input_bfd, name); |
252b5132 | 8020 | |
b34976b6 | 8021 | return FALSE; |
252b5132 RH |
8022 | } |
8023 | ||
8024 | --my_offset; | |
8025 | myh->root.u.def.value = my_offset; | |
8026 | ||
52ab56c2 PB |
8027 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
8028 | s->contents + my_offset); | |
252b5132 | 8029 | |
52ab56c2 PB |
8030 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
8031 | s->contents + my_offset + 2); | |
252b5132 RH |
8032 | |
8033 | ret_offset = | |
9b485d32 NC |
8034 | /* Address of destination of the stub. */ |
8035 | ((bfd_signed_vma) val) | |
252b5132 | 8036 | - ((bfd_signed_vma) |
57e8b36a NC |
8037 | /* Offset from the start of the current section |
8038 | to the start of the stubs. */ | |
9b485d32 NC |
8039 | (s->output_offset |
8040 | /* Offset of the start of this stub from the start of the stubs. */ | |
8041 | + my_offset | |
8042 | /* Address of the start of the current section. */ | |
8043 | + s->output_section->vma) | |
8044 | /* The branch instruction is 4 bytes into the stub. */ | |
8045 | + 4 | |
8046 | /* ARM branches work from the pc of the instruction + 8. */ | |
8047 | + 8); | |
252b5132 | 8048 | |
52ab56c2 PB |
8049 | put_arm_insn (globals, output_bfd, |
8050 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
8051 | s->contents + my_offset + 4); | |
252b5132 RH |
8052 | } |
8053 | ||
8054 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
8055 | ||
427bfd90 NC |
8056 | /* Now go back and fix up the original BL insn to point to here. */ |
8057 | ret_offset = | |
8058 | /* Address of where the stub is located. */ | |
8059 | (s->output_section->vma + s->output_offset + my_offset) | |
8060 | /* Address of where the BL is located. */ | |
57e8b36a NC |
8061 | - (input_section->output_section->vma + input_section->output_offset |
8062 | + offset) | |
427bfd90 NC |
8063 | /* Addend in the relocation. */ |
8064 | - addend | |
8065 | /* Biassing for PC-relative addressing. */ | |
8066 | - 8; | |
252b5132 | 8067 | |
12a0a0fd | 8068 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 8069 | |
b34976b6 | 8070 | return TRUE; |
252b5132 RH |
8071 | } |
8072 | ||
a4fd1a8e | 8073 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 8074 | |
a4fd1a8e PB |
8075 | static struct elf_link_hash_entry * |
8076 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
8077 | const char * name, | |
8078 | bfd * input_bfd, | |
8079 | bfd * output_bfd, | |
8080 | asection * sym_sec, | |
8081 | bfd_vma val, | |
8029a119 NC |
8082 | asection * s, |
8083 | char ** error_message) | |
252b5132 | 8084 | { |
dc810e39 | 8085 | bfd_vma my_offset; |
252b5132 | 8086 | long int ret_offset; |
bcbdc74c NC |
8087 | struct elf_link_hash_entry * myh; |
8088 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 8089 | |
f2a9dd69 | 8090 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 8091 | if (myh == NULL) |
a4fd1a8e | 8092 | return NULL; |
252b5132 RH |
8093 | |
8094 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
8095 | BFD_ASSERT (globals != NULL); |
8096 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8097 | ||
8098 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
8099 | |
8100 | if ((my_offset & 0x01) == 0x01) | |
8101 | { | |
8102 | if (sym_sec != NULL | |
8103 | && sym_sec->owner != NULL | |
8104 | && !INTERWORK_FLAG (sym_sec->owner)) | |
8105 | { | |
8f615d07 | 8106 | (*_bfd_error_handler) |
d003868e AM |
8107 | (_("%B(%s): warning: interworking not enabled.\n" |
8108 | " first occurrence: %B: arm call to thumb"), | |
8109 | sym_sec->owner, input_bfd, name); | |
252b5132 | 8110 | } |
9b485d32 | 8111 | |
252b5132 RH |
8112 | --my_offset; |
8113 | myh->root.u.def.value = my_offset; | |
8114 | ||
0e1862bb L |
8115 | if (bfd_link_pic (info) |
8116 | || globals->root.is_relocatable_executable | |
27e55c4d | 8117 | || globals->pic_veneer) |
8f6277f5 PB |
8118 | { |
8119 | /* For relocatable objects we can't use absolute addresses, | |
8120 | so construct the address from a relative offset. */ | |
8121 | /* TODO: If the offset is small it's probably worth | |
8122 | constructing the address with adds. */ | |
52ab56c2 PB |
8123 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
8124 | s->contents + my_offset); | |
8125 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
8126 | s->contents + my_offset + 4); | |
8127 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
8128 | s->contents + my_offset + 8); | |
8f6277f5 PB |
8129 | /* Adjust the offset by 4 for the position of the add, |
8130 | and 8 for the pipeline offset. */ | |
8131 | ret_offset = (val - (s->output_offset | |
8132 | + s->output_section->vma | |
8133 | + my_offset + 12)) | |
8134 | | 1; | |
8135 | bfd_put_32 (output_bfd, ret_offset, | |
8136 | s->contents + my_offset + 12); | |
8137 | } | |
26079076 PB |
8138 | else if (globals->use_blx) |
8139 | { | |
8140 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
8141 | s->contents + my_offset); | |
8142 | ||
8143 | /* It's a thumb address. Add the low order bit. */ | |
8144 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
8145 | s->contents + my_offset + 4); | |
8146 | } | |
8f6277f5 PB |
8147 | else |
8148 | { | |
52ab56c2 PB |
8149 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
8150 | s->contents + my_offset); | |
252b5132 | 8151 | |
52ab56c2 PB |
8152 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
8153 | s->contents + my_offset + 4); | |
252b5132 | 8154 | |
8f6277f5 PB |
8155 | /* It's a thumb address. Add the low order bit. */ |
8156 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
8157 | s->contents + my_offset + 8); | |
8029a119 NC |
8158 | |
8159 | my_offset += 12; | |
8f6277f5 | 8160 | } |
252b5132 RH |
8161 | } |
8162 | ||
8163 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
8164 | ||
a4fd1a8e PB |
8165 | return myh; |
8166 | } | |
8167 | ||
8168 | /* Arm code calling a Thumb function. */ | |
8169 | ||
8170 | static int | |
8171 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
8172 | const char * name, | |
8173 | bfd * input_bfd, | |
8174 | bfd * output_bfd, | |
8175 | asection * input_section, | |
8176 | bfd_byte * hit_data, | |
8177 | asection * sym_sec, | |
8178 | bfd_vma offset, | |
8179 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
8180 | bfd_vma val, |
8181 | char **error_message) | |
a4fd1a8e PB |
8182 | { |
8183 | unsigned long int tmp; | |
8184 | bfd_vma my_offset; | |
8185 | asection * s; | |
8186 | long int ret_offset; | |
8187 | struct elf_link_hash_entry * myh; | |
8188 | struct elf32_arm_link_hash_table * globals; | |
8189 | ||
8190 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
8191 | BFD_ASSERT (globals != NULL); |
8192 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8193 | ||
3d4d4302 AM |
8194 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8195 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
8196 | BFD_ASSERT (s != NULL); |
8197 | BFD_ASSERT (s->contents != NULL); | |
8198 | BFD_ASSERT (s->output_section != NULL); | |
8199 | ||
8200 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 8201 | sym_sec, val, s, error_message); |
a4fd1a8e PB |
8202 | if (!myh) |
8203 | return FALSE; | |
8204 | ||
8205 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
8206 | tmp = bfd_get_32 (input_bfd, hit_data); |
8207 | tmp = tmp & 0xFF000000; | |
8208 | ||
9b485d32 | 8209 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
8210 | ret_offset = (s->output_offset |
8211 | + my_offset | |
8212 | + s->output_section->vma | |
8213 | - (input_section->output_offset | |
8214 | + input_section->output_section->vma | |
8215 | + offset + addend) | |
8216 | - 8); | |
9a5aca8c | 8217 | |
252b5132 RH |
8218 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
8219 | ||
dc810e39 | 8220 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 8221 | |
b34976b6 | 8222 | return TRUE; |
252b5132 RH |
8223 | } |
8224 | ||
a4fd1a8e PB |
8225 | /* Populate Arm stub for an exported Thumb function. */ |
8226 | ||
8227 | static bfd_boolean | |
8228 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) | |
8229 | { | |
8230 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
8231 | asection * s; | |
8232 | struct elf_link_hash_entry * myh; | |
8233 | struct elf32_arm_link_hash_entry *eh; | |
8234 | struct elf32_arm_link_hash_table * globals; | |
8235 | asection *sec; | |
8236 | bfd_vma val; | |
f2a9dd69 | 8237 | char *error_message; |
a4fd1a8e | 8238 | |
906e58ca | 8239 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
8240 | /* Allocate stubs for exported Thumb functions on v4t. */ |
8241 | if (eh->export_glue == NULL) | |
8242 | return TRUE; | |
8243 | ||
8244 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
8245 | BFD_ASSERT (globals != NULL); |
8246 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8247 | ||
3d4d4302 AM |
8248 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8249 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
8250 | BFD_ASSERT (s != NULL); |
8251 | BFD_ASSERT (s->contents != NULL); | |
8252 | BFD_ASSERT (s->output_section != NULL); | |
8253 | ||
8254 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
8255 | |
8256 | BFD_ASSERT (sec->output_section != NULL); | |
8257 | ||
a4fd1a8e PB |
8258 | val = eh->export_glue->root.u.def.value + sec->output_offset |
8259 | + sec->output_section->vma; | |
8029a119 | 8260 | |
a4fd1a8e PB |
8261 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
8262 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
8263 | globals->obfd, sec, val, s, |
8264 | &error_message); | |
a4fd1a8e PB |
8265 | BFD_ASSERT (myh); |
8266 | return TRUE; | |
8267 | } | |
8268 | ||
845b51d6 PB |
8269 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
8270 | ||
8271 | static bfd_vma | |
8272 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
8273 | { | |
8274 | bfd_byte *p; | |
8275 | bfd_vma glue_addr; | |
8276 | asection *s; | |
8277 | struct elf32_arm_link_hash_table *globals; | |
8278 | ||
8279 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
8280 | BFD_ASSERT (globals != NULL); |
8281 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8282 | ||
3d4d4302 AM |
8283 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8284 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
8285 | BFD_ASSERT (s != NULL); |
8286 | BFD_ASSERT (s->contents != NULL); | |
8287 | BFD_ASSERT (s->output_section != NULL); | |
8288 | ||
8289 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
8290 | ||
8291 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
8292 | ||
8293 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
8294 | { | |
8295 | p = s->contents + glue_addr; | |
8296 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
8297 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
8298 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
8299 | globals->bx_glue_offset[reg] |= 1; | |
8300 | } | |
8301 | ||
8302 | return glue_addr + s->output_section->vma + s->output_offset; | |
8303 | } | |
8304 | ||
a4fd1a8e PB |
8305 | /* Generate Arm stubs for exported Thumb symbols. */ |
8306 | static void | |
906e58ca | 8307 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
8308 | struct bfd_link_info *link_info) |
8309 | { | |
8310 | struct elf32_arm_link_hash_table * globals; | |
8311 | ||
8029a119 NC |
8312 | if (link_info == NULL) |
8313 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
8314 | return; |
8315 | ||
8316 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
8317 | if (globals == NULL) |
8318 | return; | |
8319 | ||
84c08195 PB |
8320 | /* If blx is available then exported Thumb symbols are OK and there is |
8321 | nothing to do. */ | |
a4fd1a8e PB |
8322 | if (globals->use_blx) |
8323 | return; | |
8324 | ||
8325 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
8326 | link_info); | |
8327 | } | |
8328 | ||
47beaa6a RS |
8329 | /* Reserve space for COUNT dynamic relocations in relocation selection |
8330 | SRELOC. */ | |
8331 | ||
8332 | static void | |
8333 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, | |
8334 | bfd_size_type count) | |
8335 | { | |
8336 | struct elf32_arm_link_hash_table *htab; | |
8337 | ||
8338 | htab = elf32_arm_hash_table (info); | |
8339 | BFD_ASSERT (htab->root.dynamic_sections_created); | |
8340 | if (sreloc == NULL) | |
8341 | abort (); | |
8342 | sreloc->size += RELOC_SIZE (htab) * count; | |
8343 | } | |
8344 | ||
34e77a92 RS |
8345 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
8346 | dynamic, the relocations should go in SRELOC, otherwise they should | |
8347 | go in the special .rel.iplt section. */ | |
8348 | ||
8349 | static void | |
8350 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, | |
8351 | bfd_size_type count) | |
8352 | { | |
8353 | struct elf32_arm_link_hash_table *htab; | |
8354 | ||
8355 | htab = elf32_arm_hash_table (info); | |
8356 | if (!htab->root.dynamic_sections_created) | |
8357 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; | |
8358 | else | |
8359 | { | |
8360 | BFD_ASSERT (sreloc != NULL); | |
8361 | sreloc->size += RELOC_SIZE (htab) * count; | |
8362 | } | |
8363 | } | |
8364 | ||
47beaa6a RS |
8365 | /* Add relocation REL to the end of relocation section SRELOC. */ |
8366 | ||
8367 | static void | |
8368 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, | |
8369 | asection *sreloc, Elf_Internal_Rela *rel) | |
8370 | { | |
8371 | bfd_byte *loc; | |
8372 | struct elf32_arm_link_hash_table *htab; | |
8373 | ||
8374 | htab = elf32_arm_hash_table (info); | |
34e77a92 RS |
8375 | if (!htab->root.dynamic_sections_created |
8376 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) | |
8377 | sreloc = htab->root.irelplt; | |
47beaa6a RS |
8378 | if (sreloc == NULL) |
8379 | abort (); | |
8380 | loc = sreloc->contents; | |
8381 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); | |
8382 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) | |
8383 | abort (); | |
8384 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); | |
8385 | } | |
8386 | ||
34e77a92 RS |
8387 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
8388 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than | |
8389 | to .plt. */ | |
8390 | ||
8391 | static void | |
8392 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, | |
8393 | bfd_boolean is_iplt_entry, | |
8394 | union gotplt_union *root_plt, | |
8395 | struct arm_plt_info *arm_plt) | |
8396 | { | |
8397 | struct elf32_arm_link_hash_table *htab; | |
8398 | asection *splt; | |
8399 | asection *sgotplt; | |
8400 | ||
8401 | htab = elf32_arm_hash_table (info); | |
8402 | ||
8403 | if (is_iplt_entry) | |
8404 | { | |
8405 | splt = htab->root.iplt; | |
8406 | sgotplt = htab->root.igotplt; | |
8407 | ||
99059e56 RM |
8408 | /* NaCl uses a special first entry in .iplt too. */ |
8409 | if (htab->nacl_p && splt->size == 0) | |
8410 | splt->size += htab->plt_header_size; | |
8411 | ||
34e77a92 RS |
8412 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ |
8413 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); | |
8414 | } | |
8415 | else | |
8416 | { | |
8417 | splt = htab->root.splt; | |
8418 | sgotplt = htab->root.sgotplt; | |
8419 | ||
8420 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ | |
8421 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
8422 | ||
8423 | /* If this is the first .plt entry, make room for the special | |
8424 | first entry. */ | |
8425 | if (splt->size == 0) | |
8426 | splt->size += htab->plt_header_size; | |
9f19ab6d WN |
8427 | |
8428 | htab->next_tls_desc_index++; | |
34e77a92 RS |
8429 | } |
8430 | ||
8431 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ | |
8432 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
8433 | splt->size += PLT_THUMB_STUB_SIZE; | |
8434 | root_plt->offset = splt->size; | |
8435 | splt->size += htab->plt_entry_size; | |
8436 | ||
8437 | if (!htab->symbian_p) | |
8438 | { | |
8439 | /* We also need to make an entry in the .got.plt section, which | |
8440 | will be placed in the .got section by the linker script. */ | |
9f19ab6d WN |
8441 | if (is_iplt_entry) |
8442 | arm_plt->got_offset = sgotplt->size; | |
8443 | else | |
8444 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; | |
34e77a92 RS |
8445 | sgotplt->size += 4; |
8446 | } | |
8447 | } | |
8448 | ||
b38cadfb NC |
8449 | static bfd_vma |
8450 | arm_movw_immediate (bfd_vma value) | |
8451 | { | |
8452 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); | |
8453 | } | |
8454 | ||
8455 | static bfd_vma | |
8456 | arm_movt_immediate (bfd_vma value) | |
8457 | { | |
8458 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); | |
8459 | } | |
8460 | ||
34e77a92 RS |
8461 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, |
8462 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). | |
8463 | Otherwise, DYNINDX is the index of the symbol in the dynamic | |
8464 | symbol table and SYM_VALUE is undefined. | |
8465 | ||
8466 | ROOT_PLT points to the offset of the PLT entry from the start of its | |
8467 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific | |
57460bcf | 8468 | bookkeeping information. |
34e77a92 | 8469 | |
57460bcf NC |
8470 | Returns FALSE if there was a problem. */ |
8471 | ||
8472 | static bfd_boolean | |
34e77a92 RS |
8473 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, |
8474 | union gotplt_union *root_plt, | |
8475 | struct arm_plt_info *arm_plt, | |
8476 | int dynindx, bfd_vma sym_value) | |
8477 | { | |
8478 | struct elf32_arm_link_hash_table *htab; | |
8479 | asection *sgot; | |
8480 | asection *splt; | |
8481 | asection *srel; | |
8482 | bfd_byte *loc; | |
8483 | bfd_vma plt_index; | |
8484 | Elf_Internal_Rela rel; | |
8485 | bfd_vma plt_header_size; | |
8486 | bfd_vma got_header_size; | |
8487 | ||
8488 | htab = elf32_arm_hash_table (info); | |
8489 | ||
8490 | /* Pick the appropriate sections and sizes. */ | |
8491 | if (dynindx == -1) | |
8492 | { | |
8493 | splt = htab->root.iplt; | |
8494 | sgot = htab->root.igotplt; | |
8495 | srel = htab->root.irelplt; | |
8496 | ||
8497 | /* There are no reserved entries in .igot.plt, and no special | |
8498 | first entry in .iplt. */ | |
8499 | got_header_size = 0; | |
8500 | plt_header_size = 0; | |
8501 | } | |
8502 | else | |
8503 | { | |
8504 | splt = htab->root.splt; | |
8505 | sgot = htab->root.sgotplt; | |
8506 | srel = htab->root.srelplt; | |
8507 | ||
8508 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; | |
8509 | plt_header_size = htab->plt_header_size; | |
8510 | } | |
8511 | BFD_ASSERT (splt != NULL && srel != NULL); | |
8512 | ||
8513 | /* Fill in the entry in the procedure linkage table. */ | |
8514 | if (htab->symbian_p) | |
8515 | { | |
8516 | BFD_ASSERT (dynindx >= 0); | |
8517 | put_arm_insn (htab, output_bfd, | |
8518 | elf32_arm_symbian_plt_entry[0], | |
8519 | splt->contents + root_plt->offset); | |
8520 | bfd_put_32 (output_bfd, | |
8521 | elf32_arm_symbian_plt_entry[1], | |
8522 | splt->contents + root_plt->offset + 4); | |
8523 | ||
8524 | /* Fill in the entry in the .rel.plt section. */ | |
8525 | rel.r_offset = (splt->output_section->vma | |
8526 | + splt->output_offset | |
8527 | + root_plt->offset + 4); | |
8528 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT); | |
8529 | ||
8530 | /* Get the index in the procedure linkage table which | |
8531 | corresponds to this symbol. This is the index of this symbol | |
8532 | in all the symbols for which we are making plt entries. The | |
8533 | first entry in the procedure linkage table is reserved. */ | |
8534 | plt_index = ((root_plt->offset - plt_header_size) | |
8535 | / htab->plt_entry_size); | |
8536 | } | |
8537 | else | |
8538 | { | |
8539 | bfd_vma got_offset, got_address, plt_address; | |
8540 | bfd_vma got_displacement, initial_got_entry; | |
8541 | bfd_byte * ptr; | |
8542 | ||
8543 | BFD_ASSERT (sgot != NULL); | |
8544 | ||
8545 | /* Get the offset into the .(i)got.plt table of the entry that | |
8546 | corresponds to this function. */ | |
8547 | got_offset = (arm_plt->got_offset & -2); | |
8548 | ||
8549 | /* Get the index in the procedure linkage table which | |
8550 | corresponds to this symbol. This is the index of this symbol | |
8551 | in all the symbols for which we are making plt entries. | |
8552 | After the reserved .got.plt entries, all symbols appear in | |
8553 | the same order as in .plt. */ | |
8554 | plt_index = (got_offset - got_header_size) / 4; | |
8555 | ||
8556 | /* Calculate the address of the GOT entry. */ | |
8557 | got_address = (sgot->output_section->vma | |
8558 | + sgot->output_offset | |
8559 | + got_offset); | |
8560 | ||
8561 | /* ...and the address of the PLT entry. */ | |
8562 | plt_address = (splt->output_section->vma | |
8563 | + splt->output_offset | |
8564 | + root_plt->offset); | |
8565 | ||
8566 | ptr = splt->contents + root_plt->offset; | |
0e1862bb | 8567 | if (htab->vxworks_p && bfd_link_pic (info)) |
34e77a92 RS |
8568 | { |
8569 | unsigned int i; | |
8570 | bfd_vma val; | |
8571 | ||
8572 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
8573 | { | |
8574 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
8575 | if (i == 2) | |
8576 | val |= got_address - sgot->output_section->vma; | |
8577 | if (i == 5) | |
8578 | val |= plt_index * RELOC_SIZE (htab); | |
8579 | if (i == 2 || i == 5) | |
8580 | bfd_put_32 (output_bfd, val, ptr); | |
8581 | else | |
8582 | put_arm_insn (htab, output_bfd, val, ptr); | |
8583 | } | |
8584 | } | |
8585 | else if (htab->vxworks_p) | |
8586 | { | |
8587 | unsigned int i; | |
8588 | bfd_vma val; | |
8589 | ||
8590 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
8591 | { | |
8592 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
8593 | if (i == 2) | |
8594 | val |= got_address; | |
8595 | if (i == 4) | |
8596 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); | |
8597 | if (i == 5) | |
8598 | val |= plt_index * RELOC_SIZE (htab); | |
8599 | if (i == 2 || i == 5) | |
8600 | bfd_put_32 (output_bfd, val, ptr); | |
8601 | else | |
8602 | put_arm_insn (htab, output_bfd, val, ptr); | |
8603 | } | |
8604 | ||
8605 | loc = (htab->srelplt2->contents | |
8606 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
8607 | ||
8608 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation | |
8609 | referencing the GOT for this PLT entry. */ | |
8610 | rel.r_offset = plt_address + 8; | |
8611 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
8612 | rel.r_addend = got_offset; | |
8613 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
8614 | loc += RELOC_SIZE (htab); | |
8615 | ||
8616 | /* Create the R_ARM_ABS32 relocation referencing the | |
8617 | beginning of the PLT for this GOT entry. */ | |
8618 | rel.r_offset = got_address; | |
8619 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
8620 | rel.r_addend = 0; | |
8621 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
8622 | } | |
b38cadfb NC |
8623 | else if (htab->nacl_p) |
8624 | { | |
8625 | /* Calculate the displacement between the PLT slot and the | |
8626 | common tail that's part of the special initial PLT slot. */ | |
6034aab8 | 8627 | int32_t tail_displacement |
b38cadfb NC |
8628 | = ((splt->output_section->vma + splt->output_offset |
8629 | + ARM_NACL_PLT_TAIL_OFFSET) | |
8630 | - (plt_address + htab->plt_entry_size + 4)); | |
8631 | BFD_ASSERT ((tail_displacement & 3) == 0); | |
8632 | tail_displacement >>= 2; | |
8633 | ||
8634 | BFD_ASSERT ((tail_displacement & 0xff000000) == 0 | |
8635 | || (-tail_displacement & 0xff000000) == 0); | |
8636 | ||
8637 | /* Calculate the displacement between the PLT slot and the entry | |
8638 | in the GOT. The offset accounts for the value produced by | |
8639 | adding to pc in the penultimate instruction of the PLT stub. */ | |
6034aab8 | 8640 | got_displacement = (got_address |
99059e56 | 8641 | - (plt_address + htab->plt_entry_size)); |
b38cadfb NC |
8642 | |
8643 | /* NaCl does not support interworking at all. */ | |
8644 | BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)); | |
8645 | ||
8646 | put_arm_insn (htab, output_bfd, | |
8647 | elf32_arm_nacl_plt_entry[0] | |
8648 | | arm_movw_immediate (got_displacement), | |
8649 | ptr + 0); | |
8650 | put_arm_insn (htab, output_bfd, | |
8651 | elf32_arm_nacl_plt_entry[1] | |
8652 | | arm_movt_immediate (got_displacement), | |
8653 | ptr + 4); | |
8654 | put_arm_insn (htab, output_bfd, | |
8655 | elf32_arm_nacl_plt_entry[2], | |
8656 | ptr + 8); | |
8657 | put_arm_insn (htab, output_bfd, | |
8658 | elf32_arm_nacl_plt_entry[3] | |
8659 | | (tail_displacement & 0x00ffffff), | |
8660 | ptr + 12); | |
8661 | } | |
57460bcf NC |
8662 | else if (using_thumb_only (htab)) |
8663 | { | |
eed94f8f | 8664 | /* PR ld/16017: Generate thumb only PLT entries. */ |
469a3493 | 8665 | if (!using_thumb2 (htab)) |
eed94f8f NC |
8666 | { |
8667 | /* FIXME: We ought to be able to generate thumb-1 PLT | |
8668 | instructions... */ | |
8669 | _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"), | |
8670 | output_bfd); | |
8671 | return FALSE; | |
8672 | } | |
57460bcf | 8673 | |
eed94f8f NC |
8674 | /* Calculate the displacement between the PLT slot and the entry in |
8675 | the GOT. The 12-byte offset accounts for the value produced by | |
8676 | adding to pc in the 3rd instruction of the PLT stub. */ | |
8677 | got_displacement = got_address - (plt_address + 12); | |
8678 | ||
8679 | /* As we are using 32 bit instructions we have to use 'put_arm_insn' | |
8680 | instead of 'put_thumb_insn'. */ | |
8681 | put_arm_insn (htab, output_bfd, | |
8682 | elf32_thumb2_plt_entry[0] | |
8683 | | ((got_displacement & 0x000000ff) << 16) | |
8684 | | ((got_displacement & 0x00000700) << 20) | |
8685 | | ((got_displacement & 0x00000800) >> 1) | |
8686 | | ((got_displacement & 0x0000f000) >> 12), | |
8687 | ptr + 0); | |
8688 | put_arm_insn (htab, output_bfd, | |
8689 | elf32_thumb2_plt_entry[1] | |
8690 | | ((got_displacement & 0x00ff0000) ) | |
8691 | | ((got_displacement & 0x07000000) << 4) | |
8692 | | ((got_displacement & 0x08000000) >> 17) | |
8693 | | ((got_displacement & 0xf0000000) >> 28), | |
8694 | ptr + 4); | |
8695 | put_arm_insn (htab, output_bfd, | |
8696 | elf32_thumb2_plt_entry[2], | |
8697 | ptr + 8); | |
8698 | put_arm_insn (htab, output_bfd, | |
8699 | elf32_thumb2_plt_entry[3], | |
8700 | ptr + 12); | |
57460bcf | 8701 | } |
34e77a92 RS |
8702 | else |
8703 | { | |
8704 | /* Calculate the displacement between the PLT slot and the | |
8705 | entry in the GOT. The eight-byte offset accounts for the | |
8706 | value produced by adding to pc in the first instruction | |
8707 | of the PLT stub. */ | |
8708 | got_displacement = got_address - (plt_address + 8); | |
8709 | ||
34e77a92 RS |
8710 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
8711 | { | |
8712 | put_thumb_insn (htab, output_bfd, | |
8713 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
8714 | put_thumb_insn (htab, output_bfd, | |
8715 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
8716 | } | |
8717 | ||
1db37fe6 YG |
8718 | if (!elf32_arm_use_long_plt_entry) |
8719 | { | |
8720 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); | |
8721 | ||
8722 | put_arm_insn (htab, output_bfd, | |
8723 | elf32_arm_plt_entry_short[0] | |
8724 | | ((got_displacement & 0x0ff00000) >> 20), | |
8725 | ptr + 0); | |
8726 | put_arm_insn (htab, output_bfd, | |
8727 | elf32_arm_plt_entry_short[1] | |
8728 | | ((got_displacement & 0x000ff000) >> 12), | |
8729 | ptr+ 4); | |
8730 | put_arm_insn (htab, output_bfd, | |
8731 | elf32_arm_plt_entry_short[2] | |
8732 | | (got_displacement & 0x00000fff), | |
8733 | ptr + 8); | |
34e77a92 | 8734 | #ifdef FOUR_WORD_PLT |
1db37fe6 | 8735 | bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12); |
34e77a92 | 8736 | #endif |
1db37fe6 YG |
8737 | } |
8738 | else | |
8739 | { | |
8740 | put_arm_insn (htab, output_bfd, | |
8741 | elf32_arm_plt_entry_long[0] | |
8742 | | ((got_displacement & 0xf0000000) >> 28), | |
8743 | ptr + 0); | |
8744 | put_arm_insn (htab, output_bfd, | |
8745 | elf32_arm_plt_entry_long[1] | |
8746 | | ((got_displacement & 0x0ff00000) >> 20), | |
8747 | ptr + 4); | |
8748 | put_arm_insn (htab, output_bfd, | |
8749 | elf32_arm_plt_entry_long[2] | |
8750 | | ((got_displacement & 0x000ff000) >> 12), | |
8751 | ptr+ 8); | |
8752 | put_arm_insn (htab, output_bfd, | |
8753 | elf32_arm_plt_entry_long[3] | |
8754 | | (got_displacement & 0x00000fff), | |
8755 | ptr + 12); | |
8756 | } | |
34e77a92 RS |
8757 | } |
8758 | ||
8759 | /* Fill in the entry in the .rel(a).(i)plt section. */ | |
8760 | rel.r_offset = got_address; | |
8761 | rel.r_addend = 0; | |
8762 | if (dynindx == -1) | |
8763 | { | |
8764 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. | |
8765 | The dynamic linker or static executable then calls SYM_VALUE | |
8766 | to determine the correct run-time value of the .igot.plt entry. */ | |
8767 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
8768 | initial_got_entry = sym_value; | |
8769 | } | |
8770 | else | |
8771 | { | |
8772 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); | |
8773 | initial_got_entry = (splt->output_section->vma | |
8774 | + splt->output_offset); | |
8775 | } | |
8776 | ||
8777 | /* Fill in the entry in the global offset table. */ | |
8778 | bfd_put_32 (output_bfd, initial_got_entry, | |
8779 | sgot->contents + got_offset); | |
8780 | } | |
8781 | ||
aba8c3de WN |
8782 | if (dynindx == -1) |
8783 | elf32_arm_add_dynreloc (output_bfd, info, srel, &rel); | |
8784 | else | |
8785 | { | |
8786 | loc = srel->contents + plt_index * RELOC_SIZE (htab); | |
8787 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
8788 | } | |
57460bcf NC |
8789 | |
8790 | return TRUE; | |
34e77a92 RS |
8791 | } |
8792 | ||
eb043451 PB |
8793 | /* Some relocations map to different relocations depending on the |
8794 | target. Return the real relocation. */ | |
8029a119 | 8795 | |
eb043451 PB |
8796 | static int |
8797 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
8798 | int r_type) | |
8799 | { | |
8800 | switch (r_type) | |
8801 | { | |
8802 | case R_ARM_TARGET1: | |
8803 | if (globals->target1_is_rel) | |
8804 | return R_ARM_REL32; | |
8805 | else | |
8806 | return R_ARM_ABS32; | |
8807 | ||
8808 | case R_ARM_TARGET2: | |
8809 | return globals->target2_reloc; | |
8810 | ||
8811 | default: | |
8812 | return r_type; | |
8813 | } | |
8814 | } | |
eb043451 | 8815 | |
ba93b8ac DJ |
8816 | /* Return the base VMA address which should be subtracted from real addresses |
8817 | when resolving @dtpoff relocation. | |
8818 | This is PT_TLS segment p_vaddr. */ | |
8819 | ||
8820 | static bfd_vma | |
8821 | dtpoff_base (struct bfd_link_info *info) | |
8822 | { | |
8823 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
8824 | if (elf_hash_table (info)->tls_sec == NULL) | |
8825 | return 0; | |
8826 | return elf_hash_table (info)->tls_sec->vma; | |
8827 | } | |
8828 | ||
8829 | /* Return the relocation value for @tpoff relocation | |
8830 | if STT_TLS virtual address is ADDRESS. */ | |
8831 | ||
8832 | static bfd_vma | |
8833 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
8834 | { | |
8835 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
8836 | bfd_vma base; | |
8837 | ||
8838 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
8839 | if (htab->tls_sec == NULL) | |
8840 | return 0; | |
8841 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
8842 | return address - htab->tls_sec->vma + base; | |
8843 | } | |
8844 | ||
00a97672 RS |
8845 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
8846 | VALUE is the relocation value. */ | |
8847 | ||
8848 | static bfd_reloc_status_type | |
8849 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
8850 | { | |
8851 | if (value > 0xfff) | |
8852 | return bfd_reloc_overflow; | |
8853 | ||
8854 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
8855 | bfd_put_32 (abfd, value, data); | |
8856 | return bfd_reloc_ok; | |
8857 | } | |
8858 | ||
0855e32b NS |
8859 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
8860 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or | |
8861 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. | |
8862 | ||
8863 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller | |
8864 | is to then call final_link_relocate. Return other values in the | |
62672b10 NS |
8865 | case of error. |
8866 | ||
8867 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing | |
8868 | the pre-relaxed code. It would be nice if the relocs were updated | |
8869 | to match the optimization. */ | |
0855e32b | 8870 | |
b38cadfb | 8871 | static bfd_reloc_status_type |
0855e32b | 8872 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, |
b38cadfb | 8873 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, |
0855e32b NS |
8874 | Elf_Internal_Rela *rel, unsigned long is_local) |
8875 | { | |
8876 | unsigned long insn; | |
b38cadfb | 8877 | |
0855e32b NS |
8878 | switch (ELF32_R_TYPE (rel->r_info)) |
8879 | { | |
8880 | default: | |
8881 | return bfd_reloc_notsupported; | |
b38cadfb | 8882 | |
0855e32b NS |
8883 | case R_ARM_TLS_GOTDESC: |
8884 | if (is_local) | |
8885 | insn = 0; | |
8886 | else | |
8887 | { | |
8888 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
8889 | if (insn & 1) | |
8890 | insn -= 5; /* THUMB */ | |
8891 | else | |
8892 | insn -= 8; /* ARM */ | |
8893 | } | |
8894 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
8895 | return bfd_reloc_continue; | |
8896 | ||
8897 | case R_ARM_THM_TLS_DESCSEQ: | |
8898 | /* Thumb insn. */ | |
8899 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); | |
8900 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ | |
8901 | { | |
8902 | if (is_local) | |
8903 | /* nop */ | |
8904 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
8905 | } | |
8906 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ | |
8907 | { | |
8908 | if (is_local) | |
8909 | /* nop */ | |
8910 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
8911 | else | |
8912 | /* ldr rx,[ry] */ | |
8913 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); | |
8914 | } | |
8915 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ | |
8916 | { | |
8917 | if (is_local) | |
8918 | /* nop */ | |
8919 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
8920 | else | |
8921 | /* mov r0, rx */ | |
8922 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), | |
8923 | contents + rel->r_offset); | |
8924 | } | |
8925 | else | |
8926 | { | |
8927 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
8928 | /* It's a 32 bit instruction, fetch the rest of it for | |
8929 | error generation. */ | |
8930 | insn = (insn << 16) | |
8931 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); | |
8932 | (*_bfd_error_handler) | |
8933 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"), | |
8934 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
8935 | return bfd_reloc_notsupported; | |
8936 | } | |
8937 | break; | |
b38cadfb | 8938 | |
0855e32b NS |
8939 | case R_ARM_TLS_DESCSEQ: |
8940 | /* arm insn. */ | |
8941 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
8942 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ | |
8943 | { | |
8944 | if (is_local) | |
8945 | /* mov rx, ry */ | |
8946 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), | |
8947 | contents + rel->r_offset); | |
8948 | } | |
8949 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ | |
8950 | { | |
8951 | if (is_local) | |
8952 | /* nop */ | |
8953 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
8954 | else | |
8955 | /* ldr rx,[ry] */ | |
8956 | bfd_put_32 (input_bfd, insn & 0xfffff000, | |
8957 | contents + rel->r_offset); | |
8958 | } | |
8959 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ | |
8960 | { | |
8961 | if (is_local) | |
8962 | /* nop */ | |
8963 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
8964 | else | |
8965 | /* mov r0, rx */ | |
8966 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), | |
8967 | contents + rel->r_offset); | |
8968 | } | |
8969 | else | |
8970 | { | |
8971 | (*_bfd_error_handler) | |
8972 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"), | |
8973 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
8974 | return bfd_reloc_notsupported; | |
8975 | } | |
8976 | break; | |
8977 | ||
8978 | case R_ARM_TLS_CALL: | |
8979 | /* GD->IE relaxation, turn the instruction into 'nop' or | |
8980 | 'ldr r0, [pc,r0]' */ | |
8981 | insn = is_local ? 0xe1a00000 : 0xe79f0000; | |
8982 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
8983 | break; | |
b38cadfb | 8984 | |
0855e32b | 8985 | case R_ARM_THM_TLS_CALL: |
6a631e86 | 8986 | /* GD->IE relaxation. */ |
0855e32b NS |
8987 | if (!is_local) |
8988 | /* add r0,pc; ldr r0, [r0] */ | |
8989 | insn = 0x44786800; | |
8990 | else if (arch_has_thumb2_nop (globals)) | |
8991 | /* nop.w */ | |
8992 | insn = 0xf3af8000; | |
8993 | else | |
8994 | /* nop; nop */ | |
8995 | insn = 0xbf00bf00; | |
b38cadfb | 8996 | |
0855e32b NS |
8997 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); |
8998 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); | |
8999 | break; | |
9000 | } | |
9001 | return bfd_reloc_ok; | |
9002 | } | |
9003 | ||
4962c51a MS |
9004 | /* For a given value of n, calculate the value of G_n as required to |
9005 | deal with group relocations. We return it in the form of an | |
9006 | encoded constant-and-rotation, together with the final residual. If n is | |
9007 | specified as less than zero, then final_residual is filled with the | |
9008 | input value and no further action is performed. */ | |
9009 | ||
9010 | static bfd_vma | |
9011 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
9012 | { | |
9013 | int current_n; | |
9014 | bfd_vma g_n; | |
9015 | bfd_vma encoded_g_n = 0; | |
9016 | bfd_vma residual = value; /* Also known as Y_n. */ | |
9017 | ||
9018 | for (current_n = 0; current_n <= n; current_n++) | |
9019 | { | |
9020 | int shift; | |
9021 | ||
9022 | /* Calculate which part of the value to mask. */ | |
9023 | if (residual == 0) | |
99059e56 | 9024 | shift = 0; |
4962c51a | 9025 | else |
99059e56 RM |
9026 | { |
9027 | int msb; | |
9028 | ||
9029 | /* Determine the most significant bit in the residual and | |
9030 | align the resulting value to a 2-bit boundary. */ | |
9031 | for (msb = 30; msb >= 0; msb -= 2) | |
9032 | if (residual & (3 << msb)) | |
9033 | break; | |
9034 | ||
9035 | /* The desired shift is now (msb - 6), or zero, whichever | |
9036 | is the greater. */ | |
9037 | shift = msb - 6; | |
9038 | if (shift < 0) | |
9039 | shift = 0; | |
9040 | } | |
4962c51a MS |
9041 | |
9042 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
9043 | g_n = residual & (0xff << shift); | |
9044 | encoded_g_n = (g_n >> shift) | |
99059e56 | 9045 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); |
4962c51a MS |
9046 | |
9047 | /* Calculate the residual for the next time around. */ | |
9048 | residual &= ~g_n; | |
9049 | } | |
9050 | ||
9051 | *final_residual = residual; | |
9052 | ||
9053 | return encoded_g_n; | |
9054 | } | |
9055 | ||
9056 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
9057 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 9058 | |
4962c51a | 9059 | static int |
906e58ca | 9060 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
9061 | { |
9062 | int opcode = insn & 0x1e00000; | |
9063 | ||
9064 | if (opcode == 1 << 23) /* ADD */ | |
9065 | return 1; | |
9066 | ||
9067 | if (opcode == 1 << 22) /* SUB */ | |
9068 | return -1; | |
9069 | ||
9070 | return 0; | |
9071 | } | |
9072 | ||
252b5132 | 9073 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 9074 | |
252b5132 | 9075 | static bfd_reloc_status_type |
57e8b36a NC |
9076 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
9077 | bfd * input_bfd, | |
9078 | bfd * output_bfd, | |
9079 | asection * input_section, | |
9080 | bfd_byte * contents, | |
9081 | Elf_Internal_Rela * rel, | |
9082 | bfd_vma value, | |
9083 | struct bfd_link_info * info, | |
9084 | asection * sym_sec, | |
9085 | const char * sym_name, | |
34e77a92 RS |
9086 | unsigned char st_type, |
9087 | enum arm_st_branch_type branch_type, | |
0945cdfd | 9088 | struct elf_link_hash_entry * h, |
f2a9dd69 | 9089 | bfd_boolean * unresolved_reloc_p, |
8029a119 | 9090 | char ** error_message) |
252b5132 RH |
9091 | { |
9092 | unsigned long r_type = howto->type; | |
9093 | unsigned long r_symndx; | |
9094 | bfd_byte * hit_data = contents + rel->r_offset; | |
252b5132 | 9095 | bfd_vma * local_got_offsets; |
0855e32b | 9096 | bfd_vma * local_tlsdesc_gotents; |
34e77a92 RS |
9097 | asection * sgot; |
9098 | asection * splt; | |
252b5132 | 9099 | asection * sreloc = NULL; |
362d30a1 | 9100 | asection * srelgot; |
252b5132 | 9101 | bfd_vma addend; |
ba96a88f | 9102 | bfd_signed_vma signed_addend; |
34e77a92 RS |
9103 | unsigned char dynreloc_st_type; |
9104 | bfd_vma dynreloc_value; | |
ba96a88f | 9105 | struct elf32_arm_link_hash_table * globals; |
34e77a92 RS |
9106 | struct elf32_arm_link_hash_entry *eh; |
9107 | union gotplt_union *root_plt; | |
9108 | struct arm_plt_info *arm_plt; | |
9109 | bfd_vma plt_offset; | |
9110 | bfd_vma gotplt_offset; | |
9111 | bfd_boolean has_iplt_entry; | |
f21f3fe0 | 9112 | |
9c504268 | 9113 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
9114 | if (globals == NULL) |
9115 | return bfd_reloc_notsupported; | |
9c504268 | 9116 | |
0ffa91dd NC |
9117 | BFD_ASSERT (is_arm_elf (input_bfd)); |
9118 | ||
9119 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 9120 | target. We pick the right one here. */ |
eb043451 | 9121 | r_type = arm_real_reloc_type (globals, r_type); |
0855e32b NS |
9122 | |
9123 | /* It is possible to have linker relaxations on some TLS access | |
9124 | models. Update our information here. */ | |
9125 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
9126 | ||
eb043451 PB |
9127 | if (r_type != howto->type) |
9128 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 9129 | |
34e77a92 | 9130 | eh = (struct elf32_arm_link_hash_entry *) h; |
362d30a1 | 9131 | sgot = globals->root.sgot; |
252b5132 | 9132 | local_got_offsets = elf_local_got_offsets (input_bfd); |
0855e32b NS |
9133 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
9134 | ||
34e77a92 RS |
9135 | if (globals->root.dynamic_sections_created) |
9136 | srelgot = globals->root.srelgot; | |
9137 | else | |
9138 | srelgot = NULL; | |
9139 | ||
252b5132 RH |
9140 | r_symndx = ELF32_R_SYM (rel->r_info); |
9141 | ||
4e7fd91e | 9142 | if (globals->use_rel) |
ba96a88f | 9143 | { |
4e7fd91e PB |
9144 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
9145 | ||
9146 | if (addend & ((howto->src_mask + 1) >> 1)) | |
9147 | { | |
9148 | signed_addend = -1; | |
9149 | signed_addend &= ~ howto->src_mask; | |
9150 | signed_addend |= addend; | |
9151 | } | |
9152 | else | |
9153 | signed_addend = addend; | |
ba96a88f NC |
9154 | } |
9155 | else | |
4e7fd91e | 9156 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 9157 | |
39f21624 NC |
9158 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
9159 | are resolving a function call relocation. */ | |
9160 | if (using_thumb_only (globals) | |
9161 | && (r_type == R_ARM_THM_CALL | |
9162 | || r_type == R_ARM_THM_JUMP24) | |
9163 | && branch_type == ST_BRANCH_TO_ARM) | |
9164 | branch_type = ST_BRANCH_TO_THUMB; | |
9165 | ||
34e77a92 RS |
9166 | /* Record the symbol information that should be used in dynamic |
9167 | relocations. */ | |
9168 | dynreloc_st_type = st_type; | |
9169 | dynreloc_value = value; | |
9170 | if (branch_type == ST_BRANCH_TO_THUMB) | |
9171 | dynreloc_value |= 1; | |
9172 | ||
9173 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and | |
9174 | VALUE appropriately for relocations that we resolve at link time. */ | |
9175 | has_iplt_entry = FALSE; | |
9176 | if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt) | |
9177 | && root_plt->offset != (bfd_vma) -1) | |
9178 | { | |
9179 | plt_offset = root_plt->offset; | |
9180 | gotplt_offset = arm_plt->got_offset; | |
9181 | ||
9182 | if (h == NULL || eh->is_iplt) | |
9183 | { | |
9184 | has_iplt_entry = TRUE; | |
9185 | splt = globals->root.iplt; | |
9186 | ||
9187 | /* Populate .iplt entries here, because not all of them will | |
9188 | be seen by finish_dynamic_symbol. The lower bit is set if | |
9189 | we have already populated the entry. */ | |
9190 | if (plt_offset & 1) | |
9191 | plt_offset--; | |
9192 | else | |
9193 | { | |
57460bcf NC |
9194 | if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, |
9195 | -1, dynreloc_value)) | |
9196 | root_plt->offset |= 1; | |
9197 | else | |
9198 | return bfd_reloc_notsupported; | |
34e77a92 RS |
9199 | } |
9200 | ||
9201 | /* Static relocations always resolve to the .iplt entry. */ | |
9202 | st_type = STT_FUNC; | |
9203 | value = (splt->output_section->vma | |
9204 | + splt->output_offset | |
9205 | + plt_offset); | |
9206 | branch_type = ST_BRANCH_TO_ARM; | |
9207 | ||
9208 | /* If there are non-call relocations that resolve to the .iplt | |
9209 | entry, then all dynamic ones must too. */ | |
9210 | if (arm_plt->noncall_refcount != 0) | |
9211 | { | |
9212 | dynreloc_st_type = st_type; | |
9213 | dynreloc_value = value; | |
9214 | } | |
9215 | } | |
9216 | else | |
9217 | /* We populate the .plt entry in finish_dynamic_symbol. */ | |
9218 | splt = globals->root.splt; | |
9219 | } | |
9220 | else | |
9221 | { | |
9222 | splt = NULL; | |
9223 | plt_offset = (bfd_vma) -1; | |
9224 | gotplt_offset = (bfd_vma) -1; | |
9225 | } | |
9226 | ||
252b5132 RH |
9227 | switch (r_type) |
9228 | { | |
9229 | case R_ARM_NONE: | |
28a094c2 DJ |
9230 | /* We don't need to find a value for this symbol. It's just a |
9231 | marker. */ | |
9232 | *unresolved_reloc_p = FALSE; | |
252b5132 RH |
9233 | return bfd_reloc_ok; |
9234 | ||
00a97672 RS |
9235 | case R_ARM_ABS12: |
9236 | if (!globals->vxworks_p) | |
9237 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
9238 | ||
252b5132 RH |
9239 | case R_ARM_PC24: |
9240 | case R_ARM_ABS32: | |
bb224fc3 | 9241 | case R_ARM_ABS32_NOI: |
252b5132 | 9242 | case R_ARM_REL32: |
bb224fc3 | 9243 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
9244 | case R_ARM_CALL: |
9245 | case R_ARM_JUMP24: | |
dfc5f959 | 9246 | case R_ARM_XPC25: |
eb043451 | 9247 | case R_ARM_PREL31: |
7359ea65 | 9248 | case R_ARM_PLT32: |
7359ea65 DJ |
9249 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
9250 | will use the symbol's value, which may point to a PLT entry, but we | |
9251 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
9252 | branches in this object should go to it, except if the PLT is too |
9253 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 9254 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
99059e56 | 9255 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
9256 | && r_type != R_ARM_CALL |
9257 | && r_type != R_ARM_JUMP24 | |
9258 | && r_type != R_ARM_PLT32) | |
34e77a92 | 9259 | && plt_offset != (bfd_vma) -1) |
7359ea65 | 9260 | { |
34e77a92 RS |
9261 | /* If we've created a .plt section, and assigned a PLT entry |
9262 | to this function, it must either be a STT_GNU_IFUNC reference | |
9263 | or not be known to bind locally. In other cases, we should | |
9264 | have cleared the PLT entry by now. */ | |
9265 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); | |
7359ea65 DJ |
9266 | |
9267 | value = (splt->output_section->vma | |
9268 | + splt->output_offset | |
34e77a92 | 9269 | + plt_offset); |
0945cdfd | 9270 | *unresolved_reloc_p = FALSE; |
7359ea65 DJ |
9271 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
9272 | contents, rel->r_offset, value, | |
00a97672 | 9273 | rel->r_addend); |
7359ea65 DJ |
9274 | } |
9275 | ||
67687978 PB |
9276 | /* When generating a shared object or relocatable executable, these |
9277 | relocations are copied into the output file to be resolved at | |
9278 | run time. */ | |
0e1862bb L |
9279 | if ((bfd_link_pic (info) |
9280 | || globals->root.is_relocatable_executable) | |
7359ea65 | 9281 | && (input_section->flags & SEC_ALLOC) |
4dfe6ac6 | 9282 | && !(globals->vxworks_p |
3348747a NS |
9283 | && strcmp (input_section->output_section->name, |
9284 | ".tls_vars") == 0) | |
bb224fc3 | 9285 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 9286 | || !SYMBOL_CALLS_LOCAL (info, h)) |
ca6b5f82 AM |
9287 | && !(input_bfd == globals->stub_bfd |
9288 | && strstr (input_section->name, STUB_SUFFIX)) | |
7359ea65 DJ |
9289 | && (h == NULL |
9290 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
9291 | || h->root.type != bfd_link_hash_undefweak) | |
9292 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
9293 | && r_type != R_ARM_CALL |
9294 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 9295 | && r_type != R_ARM_PREL31 |
7359ea65 | 9296 | && r_type != R_ARM_PLT32) |
252b5132 | 9297 | { |
947216bf | 9298 | Elf_Internal_Rela outrel; |
b34976b6 | 9299 | bfd_boolean skip, relocate; |
f21f3fe0 | 9300 | |
52db4ec2 JW |
9301 | if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) |
9302 | && !h->def_regular) | |
9303 | { | |
9304 | char *v = _("shared object"); | |
9305 | ||
0e1862bb | 9306 | if (bfd_link_executable (info)) |
52db4ec2 JW |
9307 | v = _("PIE executable"); |
9308 | ||
9309 | (*_bfd_error_handler) | |
9310 | (_("%B: relocation %s against external or undefined symbol `%s'" | |
9311 | " can not be used when making a %s; recompile with -fPIC"), input_bfd, | |
9312 | elf32_arm_howto_table_1[r_type].name, h->root.root.string, v); | |
9313 | return bfd_reloc_notsupported; | |
9314 | } | |
9315 | ||
0945cdfd DJ |
9316 | *unresolved_reloc_p = FALSE; |
9317 | ||
34e77a92 | 9318 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
252b5132 | 9319 | { |
83bac4b0 NC |
9320 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
9321 | ! globals->use_rel); | |
f21f3fe0 | 9322 | |
83bac4b0 | 9323 | if (sreloc == NULL) |
252b5132 | 9324 | return bfd_reloc_notsupported; |
252b5132 | 9325 | } |
f21f3fe0 | 9326 | |
b34976b6 AM |
9327 | skip = FALSE; |
9328 | relocate = FALSE; | |
f21f3fe0 | 9329 | |
00a97672 | 9330 | outrel.r_addend = addend; |
c629eae0 JJ |
9331 | outrel.r_offset = |
9332 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
9333 | rel->r_offset); | |
9334 | if (outrel.r_offset == (bfd_vma) -1) | |
b34976b6 | 9335 | skip = TRUE; |
0bb2d96a | 9336 | else if (outrel.r_offset == (bfd_vma) -2) |
b34976b6 | 9337 | skip = TRUE, relocate = TRUE; |
252b5132 RH |
9338 | outrel.r_offset += (input_section->output_section->vma |
9339 | + input_section->output_offset); | |
f21f3fe0 | 9340 | |
252b5132 | 9341 | if (skip) |
0bb2d96a | 9342 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
9343 | else if (h != NULL |
9344 | && h->dynindx != -1 | |
0e1862bb | 9345 | && (!bfd_link_pic (info) |
a496fbc8 | 9346 | || !SYMBOLIC_BIND (info, h) |
f5385ebf | 9347 | || !h->def_regular)) |
5e681ec4 | 9348 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
9349 | else |
9350 | { | |
a16385dc MM |
9351 | int symbol; |
9352 | ||
5e681ec4 | 9353 | /* This symbol is local, or marked to become local. */ |
34e77a92 | 9354 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI); |
a16385dc | 9355 | if (globals->symbian_p) |
6366ff1e | 9356 | { |
74541ad4 AM |
9357 | asection *osec; |
9358 | ||
6366ff1e MM |
9359 | /* On Symbian OS, the data segment and text segement |
9360 | can be relocated independently. Therefore, we | |
9361 | must indicate the segment to which this | |
9362 | relocation is relative. The BPABI allows us to | |
9363 | use any symbol in the right segment; we just use | |
9364 | the section symbol as it is convenient. (We | |
9365 | cannot use the symbol given by "h" directly as it | |
74541ad4 AM |
9366 | will not appear in the dynamic symbol table.) |
9367 | ||
9368 | Note that the dynamic linker ignores the section | |
9369 | symbol value, so we don't subtract osec->vma | |
9370 | from the emitted reloc addend. */ | |
10dbd1f3 | 9371 | if (sym_sec) |
74541ad4 | 9372 | osec = sym_sec->output_section; |
10dbd1f3 | 9373 | else |
74541ad4 AM |
9374 | osec = input_section->output_section; |
9375 | symbol = elf_section_data (osec)->dynindx; | |
9376 | if (symbol == 0) | |
9377 | { | |
9378 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
9379 | ||
9380 | if ((osec->flags & SEC_READONLY) == 0 | |
9381 | && htab->data_index_section != NULL) | |
9382 | osec = htab->data_index_section; | |
9383 | else | |
9384 | osec = htab->text_index_section; | |
9385 | symbol = elf_section_data (osec)->dynindx; | |
9386 | } | |
6366ff1e MM |
9387 | BFD_ASSERT (symbol != 0); |
9388 | } | |
a16385dc MM |
9389 | else |
9390 | /* On SVR4-ish systems, the dynamic loader cannot | |
9391 | relocate the text and data segments independently, | |
9392 | so the symbol does not matter. */ | |
9393 | symbol = 0; | |
34e77a92 RS |
9394 | if (dynreloc_st_type == STT_GNU_IFUNC) |
9395 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve | |
9396 | to the .iplt entry. Instead, every non-call reference | |
9397 | must use an R_ARM_IRELATIVE relocation to obtain the | |
9398 | correct run-time address. */ | |
9399 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); | |
9400 | else | |
9401 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 RS |
9402 | if (globals->use_rel) |
9403 | relocate = TRUE; | |
9404 | else | |
34e77a92 | 9405 | outrel.r_addend += dynreloc_value; |
252b5132 | 9406 | } |
f21f3fe0 | 9407 | |
47beaa6a | 9408 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); |
9a5aca8c | 9409 | |
f21f3fe0 | 9410 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 9411 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 9412 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
9413 | if (! relocate) |
9414 | return bfd_reloc_ok; | |
9a5aca8c | 9415 | |
f21f3fe0 | 9416 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
34e77a92 RS |
9417 | contents, rel->r_offset, |
9418 | dynreloc_value, (bfd_vma) 0); | |
252b5132 RH |
9419 | } |
9420 | else switch (r_type) | |
9421 | { | |
00a97672 RS |
9422 | case R_ARM_ABS12: |
9423 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
9424 | ||
dfc5f959 | 9425 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
9426 | case R_ARM_CALL: |
9427 | case R_ARM_JUMP24: | |
8029a119 | 9428 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 9429 | case R_ARM_PLT32: |
906e58ca | 9430 | { |
906e58ca NC |
9431 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
9432 | ||
dfc5f959 | 9433 | if (r_type == R_ARM_XPC25) |
252b5132 | 9434 | { |
dfc5f959 NC |
9435 | /* Check for Arm calling Arm function. */ |
9436 | /* FIXME: Should we translate the instruction into a BL | |
9437 | instruction instead ? */ | |
35fc36a8 | 9438 | if (branch_type != ST_BRANCH_TO_THUMB) |
d003868e AM |
9439 | (*_bfd_error_handler) |
9440 | (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."), | |
9441 | input_bfd, | |
9442 | h ? h->root.root.string : "(local)"); | |
dfc5f959 | 9443 | } |
155d87d7 | 9444 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
9445 | { |
9446 | /* Check for Arm calling Thumb function. */ | |
35fc36a8 | 9447 | if (branch_type == ST_BRANCH_TO_THUMB) |
dfc5f959 | 9448 | { |
f2a9dd69 DJ |
9449 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
9450 | output_bfd, input_section, | |
9451 | hit_data, sym_sec, rel->r_offset, | |
9452 | signed_addend, value, | |
9453 | error_message)) | |
9454 | return bfd_reloc_ok; | |
9455 | else | |
9456 | return bfd_reloc_dangerous; | |
dfc5f959 | 9457 | } |
252b5132 | 9458 | } |
ba96a88f | 9459 | |
906e58ca | 9460 | /* Check if a stub has to be inserted because the |
8029a119 | 9461 | destination is too far or we are changing mode. */ |
155d87d7 CL |
9462 | if ( r_type == R_ARM_CALL |
9463 | || r_type == R_ARM_JUMP24 | |
9464 | || r_type == R_ARM_PLT32) | |
906e58ca | 9465 | { |
fe33d2fa CL |
9466 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
9467 | struct elf32_arm_link_hash_entry *hash; | |
9468 | ||
9469 | hash = (struct elf32_arm_link_hash_entry *) h; | |
9470 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
9471 | st_type, &branch_type, |
9472 | hash, value, sym_sec, | |
fe33d2fa | 9473 | input_bfd, sym_name); |
5fa9e92f | 9474 | |
fe33d2fa | 9475 | if (stub_type != arm_stub_none) |
906e58ca NC |
9476 | { |
9477 | /* The target is out of reach, so redirect the | |
9478 | branch to the local stub for this function. */ | |
906e58ca NC |
9479 | stub_entry = elf32_arm_get_stub_entry (input_section, |
9480 | sym_sec, h, | |
fe33d2fa CL |
9481 | rel, globals, |
9482 | stub_type); | |
9cd3e4e5 NC |
9483 | { |
9484 | if (stub_entry != NULL) | |
9485 | value = (stub_entry->stub_offset | |
9486 | + stub_entry->stub_sec->output_offset | |
9487 | + stub_entry->stub_sec->output_section->vma); | |
9488 | ||
9489 | if (plt_offset != (bfd_vma) -1) | |
9490 | *unresolved_reloc_p = FALSE; | |
9491 | } | |
906e58ca | 9492 | } |
fe33d2fa CL |
9493 | else |
9494 | { | |
9495 | /* If the call goes through a PLT entry, make sure to | |
9496 | check distance to the right destination address. */ | |
34e77a92 | 9497 | if (plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
9498 | { |
9499 | value = (splt->output_section->vma | |
9500 | + splt->output_offset | |
34e77a92 | 9501 | + plt_offset); |
fe33d2fa CL |
9502 | *unresolved_reloc_p = FALSE; |
9503 | /* The PLT entry is in ARM mode, regardless of the | |
9504 | target function. */ | |
35fc36a8 | 9505 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
9506 | } |
9507 | } | |
906e58ca NC |
9508 | } |
9509 | ||
dea514f5 PB |
9510 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
9511 | where: | |
9512 | S is the address of the symbol in the relocation. | |
9513 | P is address of the instruction being relocated. | |
9514 | A is the addend (extracted from the instruction) in bytes. | |
9515 | ||
9516 | S is held in 'value'. | |
9517 | P is the base address of the section containing the | |
9518 | instruction plus the offset of the reloc into that | |
9519 | section, ie: | |
9520 | (input_section->output_section->vma + | |
9521 | input_section->output_offset + | |
9522 | rel->r_offset). | |
9523 | A is the addend, converted into bytes, ie: | |
9524 | (signed_addend * 4) | |
9525 | ||
9526 | Note: None of these operations have knowledge of the pipeline | |
9527 | size of the processor, thus it is up to the assembler to | |
9528 | encode this information into the addend. */ | |
9529 | value -= (input_section->output_section->vma | |
9530 | + input_section->output_offset); | |
9531 | value -= rel->r_offset; | |
4e7fd91e PB |
9532 | if (globals->use_rel) |
9533 | value += (signed_addend << howto->size); | |
9534 | else | |
9535 | /* RELA addends do not have to be adjusted by howto->size. */ | |
9536 | value += signed_addend; | |
23080146 | 9537 | |
dcb5e6e6 NC |
9538 | signed_addend = value; |
9539 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 9540 | |
5ab79981 | 9541 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 9542 | the next instruction unless a PLT entry will be created. |
77b4f08f | 9543 | Do the same for local undefined symbols (but not for STN_UNDEF). |
cd1dac3d DG |
9544 | The jump to the next instruction is optimized as a NOP depending |
9545 | on the architecture. */ | |
ffcb4889 | 9546 | if (h ? (h->root.type == bfd_link_hash_undefweak |
34e77a92 | 9547 | && plt_offset == (bfd_vma) -1) |
77b4f08f | 9548 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
5ab79981 | 9549 | { |
cd1dac3d DG |
9550 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
9551 | ||
9552 | if (arch_has_arm_nop (globals)) | |
9553 | value |= 0x0320f000; | |
9554 | else | |
9555 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
9556 | } |
9557 | else | |
59f2c4e7 | 9558 | { |
9b485d32 | 9559 | /* Perform a signed range check. */ |
dcb5e6e6 | 9560 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
9561 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
9562 | return bfd_reloc_overflow; | |
9a5aca8c | 9563 | |
5ab79981 | 9564 | addend = (value & 2); |
39b41c9c | 9565 | |
5ab79981 PB |
9566 | value = (signed_addend & howto->dst_mask) |
9567 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 9568 | |
5ab79981 PB |
9569 | if (r_type == R_ARM_CALL) |
9570 | { | |
155d87d7 | 9571 | /* Set the H bit in the BLX instruction. */ |
35fc36a8 | 9572 | if (branch_type == ST_BRANCH_TO_THUMB) |
155d87d7 CL |
9573 | { |
9574 | if (addend) | |
9575 | value |= (1 << 24); | |
9576 | else | |
9577 | value &= ~(bfd_vma)(1 << 24); | |
9578 | } | |
9579 | ||
5ab79981 | 9580 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 9581 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 9582 | case, mode switching is performed by the stub. */ |
35fc36a8 | 9583 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
5ab79981 | 9584 | value |= (1 << 28); |
63e1a0fc | 9585 | else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) |
5ab79981 PB |
9586 | { |
9587 | value &= ~(bfd_vma)(1 << 28); | |
9588 | value |= (1 << 24); | |
9589 | } | |
39b41c9c PB |
9590 | } |
9591 | } | |
906e58ca | 9592 | } |
252b5132 | 9593 | break; |
f21f3fe0 | 9594 | |
252b5132 RH |
9595 | case R_ARM_ABS32: |
9596 | value += addend; | |
35fc36a8 | 9597 | if (branch_type == ST_BRANCH_TO_THUMB) |
252b5132 RH |
9598 | value |= 1; |
9599 | break; | |
f21f3fe0 | 9600 | |
bb224fc3 MS |
9601 | case R_ARM_ABS32_NOI: |
9602 | value += addend; | |
9603 | break; | |
9604 | ||
252b5132 | 9605 | case R_ARM_REL32: |
a8bc6c78 | 9606 | value += addend; |
35fc36a8 | 9607 | if (branch_type == ST_BRANCH_TO_THUMB) |
a8bc6c78 | 9608 | value |= 1; |
252b5132 | 9609 | value -= (input_section->output_section->vma |
62efb346 | 9610 | + input_section->output_offset + rel->r_offset); |
252b5132 | 9611 | break; |
eb043451 | 9612 | |
bb224fc3 MS |
9613 | case R_ARM_REL32_NOI: |
9614 | value += addend; | |
9615 | value -= (input_section->output_section->vma | |
9616 | + input_section->output_offset + rel->r_offset); | |
9617 | break; | |
9618 | ||
eb043451 PB |
9619 | case R_ARM_PREL31: |
9620 | value -= (input_section->output_section->vma | |
9621 | + input_section->output_offset + rel->r_offset); | |
9622 | value += signed_addend; | |
9623 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
9624 | { | |
8029a119 | 9625 | /* Check for overflow. */ |
eb043451 PB |
9626 | if ((value ^ (value >> 1)) & (1 << 30)) |
9627 | return bfd_reloc_overflow; | |
9628 | } | |
9629 | value &= 0x7fffffff; | |
9630 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
35fc36a8 | 9631 | if (branch_type == ST_BRANCH_TO_THUMB) |
eb043451 PB |
9632 | value |= 1; |
9633 | break; | |
252b5132 | 9634 | } |
f21f3fe0 | 9635 | |
252b5132 RH |
9636 | bfd_put_32 (input_bfd, value, hit_data); |
9637 | return bfd_reloc_ok; | |
9638 | ||
9639 | case R_ARM_ABS8: | |
fd0fd00c MJ |
9640 | /* PR 16202: Refectch the addend using the correct size. */ |
9641 | if (globals->use_rel) | |
9642 | addend = bfd_get_8 (input_bfd, hit_data); | |
252b5132 | 9643 | value += addend; |
4e67d4ca DG |
9644 | |
9645 | /* There is no way to tell whether the user intended to use a signed or | |
9646 | unsigned addend. When checking for overflow we accept either, | |
9647 | as specified by the AAELF. */ | |
9648 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
9649 | return bfd_reloc_overflow; |
9650 | ||
9651 | bfd_put_8 (input_bfd, value, hit_data); | |
9652 | return bfd_reloc_ok; | |
9653 | ||
9654 | case R_ARM_ABS16: | |
fd0fd00c MJ |
9655 | /* PR 16202: Refectch the addend using the correct size. */ |
9656 | if (globals->use_rel) | |
9657 | addend = bfd_get_16 (input_bfd, hit_data); | |
252b5132 RH |
9658 | value += addend; |
9659 | ||
4e67d4ca DG |
9660 | /* See comment for R_ARM_ABS8. */ |
9661 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
9662 | return bfd_reloc_overflow; |
9663 | ||
9664 | bfd_put_16 (input_bfd, value, hit_data); | |
9665 | return bfd_reloc_ok; | |
9666 | ||
252b5132 | 9667 | case R_ARM_THM_ABS5: |
9b485d32 | 9668 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
9669 | if (globals->use_rel) |
9670 | { | |
9671 | /* Need to refetch addend. */ | |
9672 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
9673 | /* ??? Need to determine shift amount from operand size. */ | |
9674 | addend >>= howto->rightshift; | |
9675 | } | |
252b5132 RH |
9676 | value += addend; |
9677 | ||
9678 | /* ??? Isn't value unsigned? */ | |
9679 | if ((long) value > 0x1f || (long) value < -0x10) | |
9680 | return bfd_reloc_overflow; | |
9681 | ||
9682 | /* ??? Value needs to be properly shifted into place first. */ | |
9683 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
9684 | bfd_put_16 (input_bfd, value, hit_data); | |
9685 | return bfd_reloc_ok; | |
9686 | ||
2cab6cc3 MS |
9687 | case R_ARM_THM_ALU_PREL_11_0: |
9688 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
9689 | { | |
9690 | bfd_vma insn; | |
9691 | bfd_signed_vma relocation; | |
9692 | ||
9693 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 9694 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 9695 | |
99059e56 RM |
9696 | if (globals->use_rel) |
9697 | { | |
9698 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
9699 | | ((insn & (1 << 26)) >> 15); | |
9700 | if (insn & 0xf00000) | |
9701 | signed_addend = -signed_addend; | |
9702 | } | |
2cab6cc3 MS |
9703 | |
9704 | relocation = value + signed_addend; | |
79f08007 | 9705 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
9706 | + input_section->output_offset |
9707 | + rel->r_offset); | |
2cab6cc3 | 9708 | |
b6518b38 | 9709 | value = relocation; |
2cab6cc3 | 9710 | |
99059e56 RM |
9711 | if (value >= 0x1000) |
9712 | return bfd_reloc_overflow; | |
2cab6cc3 MS |
9713 | |
9714 | insn = (insn & 0xfb0f8f00) | (value & 0xff) | |
99059e56 RM |
9715 | | ((value & 0x700) << 4) |
9716 | | ((value & 0x800) << 15); | |
9717 | if (relocation < 0) | |
9718 | insn |= 0xa00000; | |
2cab6cc3 MS |
9719 | |
9720 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
9721 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
9722 | ||
99059e56 | 9723 | return bfd_reloc_ok; |
2cab6cc3 MS |
9724 | } |
9725 | ||
e1ec24c6 NC |
9726 | case R_ARM_THM_PC8: |
9727 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
9728 | but it is supported for compatibility with third party libraries | |
9729 | generated by other compilers, specifically the ARM/IAR. */ | |
9730 | { | |
9731 | bfd_vma insn; | |
9732 | bfd_signed_vma relocation; | |
9733 | ||
9734 | insn = bfd_get_16 (input_bfd, hit_data); | |
9735 | ||
99059e56 | 9736 | if (globals->use_rel) |
79f08007 | 9737 | addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4; |
e1ec24c6 NC |
9738 | |
9739 | relocation = value + addend; | |
79f08007 | 9740 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
9741 | + input_section->output_offset |
9742 | + rel->r_offset); | |
e1ec24c6 | 9743 | |
b6518b38 | 9744 | value = relocation; |
e1ec24c6 NC |
9745 | |
9746 | /* We do not check for overflow of this reloc. Although strictly | |
9747 | speaking this is incorrect, it appears to be necessary in order | |
9748 | to work with IAR generated relocs. Since GCC and GAS do not | |
9749 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
9750 | a problem for them. */ | |
9751 | value &= 0x3fc; | |
9752 | ||
9753 | insn = (insn & 0xff00) | (value >> 2); | |
9754 | ||
9755 | bfd_put_16 (input_bfd, insn, hit_data); | |
9756 | ||
99059e56 | 9757 | return bfd_reloc_ok; |
e1ec24c6 NC |
9758 | } |
9759 | ||
2cab6cc3 MS |
9760 | case R_ARM_THM_PC12: |
9761 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
9762 | { | |
9763 | bfd_vma insn; | |
9764 | bfd_signed_vma relocation; | |
9765 | ||
9766 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 9767 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 9768 | |
99059e56 RM |
9769 | if (globals->use_rel) |
9770 | { | |
9771 | signed_addend = insn & 0xfff; | |
9772 | if (!(insn & (1 << 23))) | |
9773 | signed_addend = -signed_addend; | |
9774 | } | |
2cab6cc3 MS |
9775 | |
9776 | relocation = value + signed_addend; | |
79f08007 | 9777 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
9778 | + input_section->output_offset |
9779 | + rel->r_offset); | |
2cab6cc3 | 9780 | |
b6518b38 | 9781 | value = relocation; |
2cab6cc3 | 9782 | |
99059e56 RM |
9783 | if (value >= 0x1000) |
9784 | return bfd_reloc_overflow; | |
2cab6cc3 MS |
9785 | |
9786 | insn = (insn & 0xff7ff000) | value; | |
99059e56 RM |
9787 | if (relocation >= 0) |
9788 | insn |= (1 << 23); | |
2cab6cc3 MS |
9789 | |
9790 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
9791 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
9792 | ||
99059e56 | 9793 | return bfd_reloc_ok; |
2cab6cc3 MS |
9794 | } |
9795 | ||
dfc5f959 | 9796 | case R_ARM_THM_XPC22: |
c19d1205 | 9797 | case R_ARM_THM_CALL: |
bd97cb95 | 9798 | case R_ARM_THM_JUMP24: |
dfc5f959 | 9799 | /* Thumb BL (branch long instruction). */ |
252b5132 | 9800 | { |
b34976b6 | 9801 | bfd_vma relocation; |
99059e56 | 9802 | bfd_vma reloc_sign; |
b34976b6 AM |
9803 | bfd_boolean overflow = FALSE; |
9804 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
9805 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
9806 | bfd_signed_vma reloc_signed_max; |
9807 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 9808 | bfd_vma check; |
252b5132 | 9809 | bfd_signed_vma signed_check; |
e95de063 | 9810 | int bitsize; |
cd1dac3d | 9811 | const int thumb2 = using_thumb2 (globals); |
252b5132 | 9812 | |
5ab79981 | 9813 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
9814 | the next instruction unless a PLT entry will be created. |
9815 | The jump to the next instruction is optimized as a NOP.W for | |
9816 | Thumb-2 enabled architectures. */ | |
19540007 | 9817 | if (h && h->root.type == bfd_link_hash_undefweak |
34e77a92 | 9818 | && plt_offset == (bfd_vma) -1) |
5ab79981 | 9819 | { |
cd1dac3d DG |
9820 | if (arch_has_thumb2_nop (globals)) |
9821 | { | |
9822 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
9823 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
9824 | } | |
9825 | else | |
9826 | { | |
9827 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
9828 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
9829 | } | |
5ab79981 PB |
9830 | return bfd_reloc_ok; |
9831 | } | |
9832 | ||
e95de063 | 9833 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
99059e56 | 9834 | with Thumb-1) involving the J1 and J2 bits. */ |
4e7fd91e PB |
9835 | if (globals->use_rel) |
9836 | { | |
99059e56 RM |
9837 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
9838 | bfd_vma upper = upper_insn & 0x3ff; | |
9839 | bfd_vma lower = lower_insn & 0x7ff; | |
e95de063 MS |
9840 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; |
9841 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
99059e56 RM |
9842 | bfd_vma i1 = j1 ^ s ? 0 : 1; |
9843 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
e95de063 | 9844 | |
99059e56 RM |
9845 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); |
9846 | /* Sign extend. */ | |
9847 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
e95de063 | 9848 | |
4e7fd91e PB |
9849 | signed_addend = addend; |
9850 | } | |
cb1afa5c | 9851 | |
dfc5f959 NC |
9852 | if (r_type == R_ARM_THM_XPC22) |
9853 | { | |
9854 | /* Check for Thumb to Thumb call. */ | |
9855 | /* FIXME: Should we translate the instruction into a BL | |
9856 | instruction instead ? */ | |
35fc36a8 | 9857 | if (branch_type == ST_BRANCH_TO_THUMB) |
d003868e AM |
9858 | (*_bfd_error_handler) |
9859 | (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."), | |
9860 | input_bfd, | |
9861 | h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
9862 | } |
9863 | else | |
252b5132 | 9864 | { |
dfc5f959 NC |
9865 | /* If it is not a call to Thumb, assume call to Arm. |
9866 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
9867 | function call at all, but rather a long jump. Calls through |
9868 | the PLT do not require stubs. */ | |
34e77a92 | 9869 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
dfc5f959 | 9870 | { |
bd97cb95 | 9871 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
9872 | { |
9873 | /* Convert BL to BLX. */ | |
9874 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
9875 | } | |
155d87d7 CL |
9876 | else if (( r_type != R_ARM_THM_CALL) |
9877 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
9878 | { |
9879 | if (elf32_thumb_to_arm_stub | |
9880 | (info, sym_name, input_bfd, output_bfd, input_section, | |
9881 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
9882 | error_message)) | |
9883 | return bfd_reloc_ok; | |
9884 | else | |
9885 | return bfd_reloc_dangerous; | |
9886 | } | |
da5938a2 | 9887 | } |
35fc36a8 RS |
9888 | else if (branch_type == ST_BRANCH_TO_THUMB |
9889 | && globals->use_blx | |
bd97cb95 | 9890 | && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
9891 | { |
9892 | /* Make sure this is a BL. */ | |
9893 | lower_insn |= 0x1800; | |
9894 | } | |
252b5132 | 9895 | } |
f21f3fe0 | 9896 | |
fe33d2fa | 9897 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
155d87d7 | 9898 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
9899 | { |
9900 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 9901 | is too far. */ |
fe33d2fa CL |
9902 | struct elf32_arm_stub_hash_entry *stub_entry; |
9903 | struct elf32_arm_link_hash_entry *hash; | |
9904 | ||
9905 | hash = (struct elf32_arm_link_hash_entry *) h; | |
9906 | ||
9907 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
9908 | st_type, &branch_type, |
9909 | hash, value, sym_sec, | |
fe33d2fa CL |
9910 | input_bfd, sym_name); |
9911 | ||
9912 | if (stub_type != arm_stub_none) | |
906e58ca NC |
9913 | { |
9914 | /* The target is out of reach or we are changing modes, so | |
9915 | redirect the branch to the local stub for this | |
9916 | function. */ | |
9917 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
9918 | sym_sec, h, | |
fe33d2fa CL |
9919 | rel, globals, |
9920 | stub_type); | |
906e58ca | 9921 | if (stub_entry != NULL) |
9cd3e4e5 NC |
9922 | { |
9923 | value = (stub_entry->stub_offset | |
9924 | + stub_entry->stub_sec->output_offset | |
9925 | + stub_entry->stub_sec->output_section->vma); | |
9926 | ||
9927 | if (plt_offset != (bfd_vma) -1) | |
9928 | *unresolved_reloc_p = FALSE; | |
9929 | } | |
906e58ca | 9930 | |
f4ac8484 | 9931 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 9932 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
9933 | { |
9934 | if ((stub_entry | |
9935 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
35fc36a8 | 9936 | || branch_type != ST_BRANCH_TO_THUMB) |
f4ac8484 DJ |
9937 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
9938 | } | |
906e58ca NC |
9939 | } |
9940 | } | |
9941 | ||
fe33d2fa | 9942 | /* Handle calls via the PLT. */ |
34e77a92 | 9943 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
9944 | { |
9945 | value = (splt->output_section->vma | |
9946 | + splt->output_offset | |
34e77a92 | 9947 | + plt_offset); |
fe33d2fa | 9948 | |
eed94f8f NC |
9949 | if (globals->use_blx |
9950 | && r_type == R_ARM_THM_CALL | |
9951 | && ! using_thumb_only (globals)) | |
fe33d2fa CL |
9952 | { |
9953 | /* If the Thumb BLX instruction is available, convert | |
9954 | the BL to a BLX instruction to call the ARM-mode | |
9955 | PLT entry. */ | |
9956 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
35fc36a8 | 9957 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
9958 | } |
9959 | else | |
9960 | { | |
eed94f8f NC |
9961 | if (! using_thumb_only (globals)) |
9962 | /* Target the Thumb stub before the ARM PLT entry. */ | |
9963 | value -= PLT_THUMB_STUB_SIZE; | |
35fc36a8 | 9964 | branch_type = ST_BRANCH_TO_THUMB; |
fe33d2fa CL |
9965 | } |
9966 | *unresolved_reloc_p = FALSE; | |
9967 | } | |
9968 | ||
ba96a88f | 9969 | relocation = value + signed_addend; |
f21f3fe0 | 9970 | |
252b5132 | 9971 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
9972 | + input_section->output_offset |
9973 | + rel->r_offset); | |
9a5aca8c | 9974 | |
252b5132 RH |
9975 | check = relocation >> howto->rightshift; |
9976 | ||
9977 | /* If this is a signed value, the rightshift just dropped | |
9978 | leading 1 bits (assuming twos complement). */ | |
9979 | if ((bfd_signed_vma) relocation >= 0) | |
9980 | signed_check = check; | |
9981 | else | |
9982 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
9983 | ||
e95de063 MS |
9984 | /* Calculate the permissable maximum and minimum values for |
9985 | this relocation according to whether we're relocating for | |
9986 | Thumb-2 or not. */ | |
9987 | bitsize = howto->bitsize; | |
9988 | if (!thumb2) | |
9989 | bitsize -= 2; | |
f6ebfac0 | 9990 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
9991 | reloc_signed_min = ~reloc_signed_max; |
9992 | ||
252b5132 | 9993 | /* Assumes two's complement. */ |
ba96a88f | 9994 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
b34976b6 | 9995 | overflow = TRUE; |
252b5132 | 9996 | |
bd97cb95 | 9997 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
9998 | /* For a BLX instruction, make sure that the relocation is rounded up |
9999 | to a word boundary. This follows the semantics of the instruction | |
10000 | which specifies that bit 1 of the target address will come from bit | |
10001 | 1 of the base address. */ | |
10002 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 10003 | |
e95de063 MS |
10004 | /* Put RELOCATION back into the insn. Assumes two's complement. |
10005 | We use the Thumb-2 encoding, which is safe even if dealing with | |
10006 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
99059e56 | 10007 | reloc_sign = (signed_check < 0) ? 1 : 0; |
e95de063 | 10008 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) |
99059e56 RM |
10009 | | ((relocation >> 12) & 0x3ff) |
10010 | | (reloc_sign << 10); | |
906e58ca | 10011 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
99059e56 RM |
10012 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
10013 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
10014 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 10015 | |
252b5132 RH |
10016 | /* Put the relocated value back in the object file: */ |
10017 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
10018 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
10019 | ||
10020 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
10021 | } | |
10022 | break; | |
10023 | ||
c19d1205 ZW |
10024 | case R_ARM_THM_JUMP19: |
10025 | /* Thumb32 conditional branch instruction. */ | |
10026 | { | |
10027 | bfd_vma relocation; | |
10028 | bfd_boolean overflow = FALSE; | |
10029 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
10030 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
10031 | bfd_signed_vma reloc_signed_max = 0xffffe; |
10032 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 | 10033 | bfd_signed_vma signed_check; |
c5423981 TG |
10034 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
10035 | struct elf32_arm_stub_hash_entry *stub_entry; | |
10036 | struct elf32_arm_link_hash_entry *hash; | |
c19d1205 ZW |
10037 | |
10038 | /* Need to refetch the addend, reconstruct the top three bits, | |
10039 | and squish the two 11 bit pieces together. */ | |
10040 | if (globals->use_rel) | |
10041 | { | |
10042 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 10043 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
10044 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
10045 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
10046 | bfd_vma lower = (lower_insn & 0x07ff); | |
10047 | ||
a00a1f35 MS |
10048 | upper |= J1 << 6; |
10049 | upper |= J2 << 7; | |
10050 | upper |= (!S) << 8; | |
c19d1205 ZW |
10051 | upper -= 0x0100; /* Sign extend. */ |
10052 | ||
10053 | addend = (upper << 12) | (lower << 1); | |
10054 | signed_addend = addend; | |
10055 | } | |
10056 | ||
bd97cb95 | 10057 | /* Handle calls via the PLT. */ |
34e77a92 | 10058 | if (plt_offset != (bfd_vma) -1) |
bd97cb95 DJ |
10059 | { |
10060 | value = (splt->output_section->vma | |
10061 | + splt->output_offset | |
34e77a92 | 10062 | + plt_offset); |
bd97cb95 DJ |
10063 | /* Target the Thumb stub before the ARM PLT entry. */ |
10064 | value -= PLT_THUMB_STUB_SIZE; | |
10065 | *unresolved_reloc_p = FALSE; | |
10066 | } | |
10067 | ||
c5423981 TG |
10068 | hash = (struct elf32_arm_link_hash_entry *)h; |
10069 | ||
10070 | stub_type = arm_type_of_stub (info, input_section, rel, | |
10071 | st_type, &branch_type, | |
10072 | hash, value, sym_sec, | |
10073 | input_bfd, sym_name); | |
10074 | if (stub_type != arm_stub_none) | |
10075 | { | |
10076 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
10077 | sym_sec, h, | |
10078 | rel, globals, | |
10079 | stub_type); | |
10080 | if (stub_entry != NULL) | |
10081 | { | |
10082 | value = (stub_entry->stub_offset | |
10083 | + stub_entry->stub_sec->output_offset | |
10084 | + stub_entry->stub_sec->output_section->vma); | |
10085 | } | |
10086 | } | |
c19d1205 | 10087 | |
99059e56 | 10088 | relocation = value + signed_addend; |
c19d1205 ZW |
10089 | relocation -= (input_section->output_section->vma |
10090 | + input_section->output_offset | |
10091 | + rel->r_offset); | |
a00a1f35 | 10092 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 10093 | |
c19d1205 ZW |
10094 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
10095 | overflow = TRUE; | |
10096 | ||
10097 | /* Put RELOCATION back into the insn. */ | |
10098 | { | |
10099 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
10100 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
10101 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
10102 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
10103 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
10104 | ||
a00a1f35 | 10105 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
10106 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
10107 | } | |
10108 | ||
10109 | /* Put the relocated value back in the object file: */ | |
10110 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
10111 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
10112 | ||
10113 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
10114 | } | |
10115 | ||
10116 | case R_ARM_THM_JUMP11: | |
10117 | case R_ARM_THM_JUMP8: | |
10118 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
10119 | /* Thumb B (branch) instruction). */ |
10120 | { | |
6cf9e9fe | 10121 | bfd_signed_vma relocation; |
51c5503b NC |
10122 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
10123 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
10124 | bfd_signed_vma signed_check; |
10125 | ||
c19d1205 ZW |
10126 | /* CZB cannot jump backward. */ |
10127 | if (r_type == R_ARM_THM_JUMP6) | |
10128 | reloc_signed_min = 0; | |
10129 | ||
4e7fd91e | 10130 | if (globals->use_rel) |
6cf9e9fe | 10131 | { |
4e7fd91e PB |
10132 | /* Need to refetch addend. */ |
10133 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
10134 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10135 | { | |
10136 | signed_addend = -1; | |
10137 | signed_addend &= ~ howto->src_mask; | |
10138 | signed_addend |= addend; | |
10139 | } | |
10140 | else | |
10141 | signed_addend = addend; | |
10142 | /* The value in the insn has been right shifted. We need to | |
10143 | undo this, so that we can perform the address calculation | |
10144 | in terms of bytes. */ | |
10145 | signed_addend <<= howto->rightshift; | |
6cf9e9fe | 10146 | } |
6cf9e9fe | 10147 | relocation = value + signed_addend; |
51c5503b NC |
10148 | |
10149 | relocation -= (input_section->output_section->vma | |
10150 | + input_section->output_offset | |
10151 | + rel->r_offset); | |
10152 | ||
6cf9e9fe NC |
10153 | relocation >>= howto->rightshift; |
10154 | signed_check = relocation; | |
c19d1205 ZW |
10155 | |
10156 | if (r_type == R_ARM_THM_JUMP6) | |
10157 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
10158 | else | |
10159 | relocation &= howto->dst_mask; | |
51c5503b | 10160 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 10161 | |
51c5503b NC |
10162 | bfd_put_16 (input_bfd, relocation, hit_data); |
10163 | ||
10164 | /* Assumes two's complement. */ | |
10165 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
10166 | return bfd_reloc_overflow; | |
10167 | ||
10168 | return bfd_reloc_ok; | |
10169 | } | |
cedb70c5 | 10170 | |
8375c36b PB |
10171 | case R_ARM_ALU_PCREL7_0: |
10172 | case R_ARM_ALU_PCREL15_8: | |
10173 | case R_ARM_ALU_PCREL23_15: | |
10174 | { | |
10175 | bfd_vma insn; | |
10176 | bfd_vma relocation; | |
10177 | ||
10178 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
10179 | if (globals->use_rel) |
10180 | { | |
10181 | /* Extract the addend. */ | |
10182 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
10183 | signed_addend = addend; | |
10184 | } | |
8375c36b PB |
10185 | relocation = value + signed_addend; |
10186 | ||
10187 | relocation -= (input_section->output_section->vma | |
10188 | + input_section->output_offset | |
10189 | + rel->r_offset); | |
10190 | insn = (insn & ~0xfff) | |
10191 | | ((howto->bitpos << 7) & 0xf00) | |
10192 | | ((relocation >> howto->bitpos) & 0xff); | |
10193 | bfd_put_32 (input_bfd, value, hit_data); | |
10194 | } | |
10195 | return bfd_reloc_ok; | |
10196 | ||
252b5132 RH |
10197 | case R_ARM_GNU_VTINHERIT: |
10198 | case R_ARM_GNU_VTENTRY: | |
10199 | return bfd_reloc_ok; | |
10200 | ||
c19d1205 | 10201 | case R_ARM_GOTOFF32: |
252b5132 | 10202 | /* Relocation is relative to the start of the |
99059e56 | 10203 | global offset table. */ |
252b5132 RH |
10204 | |
10205 | BFD_ASSERT (sgot != NULL); | |
10206 | if (sgot == NULL) | |
99059e56 | 10207 | return bfd_reloc_notsupported; |
9a5aca8c | 10208 | |
cedb70c5 | 10209 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
10210 | address by one, so that attempts to call the function pointer will |
10211 | correctly interpret it as Thumb code. */ | |
35fc36a8 | 10212 | if (branch_type == ST_BRANCH_TO_THUMB) |
ee29b9fb RE |
10213 | value += 1; |
10214 | ||
252b5132 | 10215 | /* Note that sgot->output_offset is not involved in this |
99059e56 RM |
10216 | calculation. We always want the start of .got. If we |
10217 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
10218 | permitted by the ABI, we might have to change this | |
10219 | calculation. */ | |
252b5132 | 10220 | value -= sgot->output_section->vma; |
f21f3fe0 | 10221 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 10222 | contents, rel->r_offset, value, |
00a97672 | 10223 | rel->r_addend); |
252b5132 RH |
10224 | |
10225 | case R_ARM_GOTPC: | |
a7c10850 | 10226 | /* Use global offset table as symbol value. */ |
252b5132 | 10227 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 10228 | |
252b5132 | 10229 | if (sgot == NULL) |
99059e56 | 10230 | return bfd_reloc_notsupported; |
252b5132 | 10231 | |
0945cdfd | 10232 | *unresolved_reloc_p = FALSE; |
252b5132 | 10233 | value = sgot->output_section->vma; |
f21f3fe0 | 10234 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 10235 | contents, rel->r_offset, value, |
00a97672 | 10236 | rel->r_addend); |
f21f3fe0 | 10237 | |
252b5132 | 10238 | case R_ARM_GOT32: |
eb043451 | 10239 | case R_ARM_GOT_PREL: |
252b5132 | 10240 | /* Relocation is to the entry for this symbol in the |
99059e56 | 10241 | global offset table. */ |
252b5132 RH |
10242 | if (sgot == NULL) |
10243 | return bfd_reloc_notsupported; | |
f21f3fe0 | 10244 | |
34e77a92 RS |
10245 | if (dynreloc_st_type == STT_GNU_IFUNC |
10246 | && plt_offset != (bfd_vma) -1 | |
10247 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) | |
10248 | { | |
10249 | /* We have a relocation against a locally-binding STT_GNU_IFUNC | |
10250 | symbol, and the relocation resolves directly to the runtime | |
10251 | target rather than to the .iplt entry. This means that any | |
10252 | .got entry would be the same value as the .igot.plt entry, | |
10253 | so there's no point creating both. */ | |
10254 | sgot = globals->root.igotplt; | |
10255 | value = sgot->output_offset + gotplt_offset; | |
10256 | } | |
10257 | else if (h != NULL) | |
252b5132 RH |
10258 | { |
10259 | bfd_vma off; | |
f21f3fe0 | 10260 | |
252b5132 RH |
10261 | off = h->got.offset; |
10262 | BFD_ASSERT (off != (bfd_vma) -1); | |
b436d854 | 10263 | if ((off & 1) != 0) |
252b5132 | 10264 | { |
b436d854 RS |
10265 | /* We have already processsed one GOT relocation against |
10266 | this symbol. */ | |
10267 | off &= ~1; | |
10268 | if (globals->root.dynamic_sections_created | |
10269 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
10270 | *unresolved_reloc_p = FALSE; | |
10271 | } | |
10272 | else | |
10273 | { | |
10274 | Elf_Internal_Rela outrel; | |
10275 | ||
6f820c85 | 10276 | if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h)) |
b436d854 RS |
10277 | { |
10278 | /* If the symbol doesn't resolve locally in a static | |
10279 | object, we have an undefined reference. If the | |
10280 | symbol doesn't resolve locally in a dynamic object, | |
10281 | it should be resolved by the dynamic linker. */ | |
10282 | if (globals->root.dynamic_sections_created) | |
10283 | { | |
10284 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); | |
10285 | *unresolved_reloc_p = FALSE; | |
10286 | } | |
10287 | else | |
10288 | outrel.r_info = 0; | |
10289 | outrel.r_addend = 0; | |
10290 | } | |
252b5132 RH |
10291 | else |
10292 | { | |
34e77a92 | 10293 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 10294 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
0e1862bb | 10295 | else if (bfd_link_pic (info) && |
31943882 WN |
10296 | (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
10297 | || h->root.type != bfd_link_hash_undefweak)) | |
99059e56 RM |
10298 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
10299 | else | |
10300 | outrel.r_info = 0; | |
34e77a92 | 10301 | outrel.r_addend = dynreloc_value; |
b436d854 | 10302 | } |
ee29b9fb | 10303 | |
b436d854 RS |
10304 | /* The GOT entry is initialized to zero by default. |
10305 | See if we should install a different value. */ | |
10306 | if (outrel.r_addend != 0 | |
10307 | && (outrel.r_info == 0 || globals->use_rel)) | |
10308 | { | |
10309 | bfd_put_32 (output_bfd, outrel.r_addend, | |
10310 | sgot->contents + off); | |
10311 | outrel.r_addend = 0; | |
252b5132 | 10312 | } |
f21f3fe0 | 10313 | |
b436d854 RS |
10314 | if (outrel.r_info != 0) |
10315 | { | |
10316 | outrel.r_offset = (sgot->output_section->vma | |
10317 | + sgot->output_offset | |
10318 | + off); | |
10319 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
10320 | } | |
10321 | h->got.offset |= 1; | |
10322 | } | |
252b5132 RH |
10323 | value = sgot->output_offset + off; |
10324 | } | |
10325 | else | |
10326 | { | |
10327 | bfd_vma off; | |
f21f3fe0 | 10328 | |
252b5132 RH |
10329 | BFD_ASSERT (local_got_offsets != NULL && |
10330 | local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 10331 | |
252b5132 | 10332 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 10333 | |
252b5132 RH |
10334 | /* The offset must always be a multiple of 4. We use the |
10335 | least significant bit to record whether we have already | |
9b485d32 | 10336 | generated the necessary reloc. */ |
252b5132 RH |
10337 | if ((off & 1) != 0) |
10338 | off &= ~1; | |
10339 | else | |
10340 | { | |
00a97672 | 10341 | if (globals->use_rel) |
34e77a92 | 10342 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); |
f21f3fe0 | 10343 | |
0e1862bb | 10344 | if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC) |
252b5132 | 10345 | { |
947216bf | 10346 | Elf_Internal_Rela outrel; |
f21f3fe0 | 10347 | |
34e77a92 | 10348 | outrel.r_addend = addend + dynreloc_value; |
252b5132 | 10349 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 10350 | + sgot->output_offset |
252b5132 | 10351 | + off); |
34e77a92 | 10352 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 10353 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
34e77a92 RS |
10354 | else |
10355 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
47beaa6a | 10356 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
252b5132 | 10357 | } |
f21f3fe0 | 10358 | |
252b5132 RH |
10359 | local_got_offsets[r_symndx] |= 1; |
10360 | } | |
f21f3fe0 | 10361 | |
252b5132 RH |
10362 | value = sgot->output_offset + off; |
10363 | } | |
eb043451 PB |
10364 | if (r_type != R_ARM_GOT32) |
10365 | value += sgot->output_section->vma; | |
9a5aca8c | 10366 | |
f21f3fe0 | 10367 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 10368 | contents, rel->r_offset, value, |
00a97672 | 10369 | rel->r_addend); |
f21f3fe0 | 10370 | |
ba93b8ac DJ |
10371 | case R_ARM_TLS_LDO32: |
10372 | value = value - dtpoff_base (info); | |
10373 | ||
10374 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
10375 | contents, rel->r_offset, value, |
10376 | rel->r_addend); | |
ba93b8ac DJ |
10377 | |
10378 | case R_ARM_TLS_LDM32: | |
10379 | { | |
10380 | bfd_vma off; | |
10381 | ||
362d30a1 | 10382 | if (sgot == NULL) |
ba93b8ac DJ |
10383 | abort (); |
10384 | ||
10385 | off = globals->tls_ldm_got.offset; | |
10386 | ||
10387 | if ((off & 1) != 0) | |
10388 | off &= ~1; | |
10389 | else | |
10390 | { | |
10391 | /* If we don't know the module number, create a relocation | |
10392 | for it. */ | |
0e1862bb | 10393 | if (bfd_link_pic (info)) |
ba93b8ac DJ |
10394 | { |
10395 | Elf_Internal_Rela outrel; | |
ba93b8ac | 10396 | |
362d30a1 | 10397 | if (srelgot == NULL) |
ba93b8ac DJ |
10398 | abort (); |
10399 | ||
00a97672 | 10400 | outrel.r_addend = 0; |
362d30a1 RS |
10401 | outrel.r_offset = (sgot->output_section->vma |
10402 | + sgot->output_offset + off); | |
ba93b8ac DJ |
10403 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
10404 | ||
00a97672 RS |
10405 | if (globals->use_rel) |
10406 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10407 | sgot->contents + off); |
ba93b8ac | 10408 | |
47beaa6a | 10409 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
10410 | } |
10411 | else | |
362d30a1 | 10412 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
ba93b8ac DJ |
10413 | |
10414 | globals->tls_ldm_got.offset |= 1; | |
10415 | } | |
10416 | ||
362d30a1 | 10417 | value = sgot->output_section->vma + sgot->output_offset + off |
ba93b8ac DJ |
10418 | - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); |
10419 | ||
10420 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
10421 | contents, rel->r_offset, value, | |
00a97672 | 10422 | rel->r_addend); |
ba93b8ac DJ |
10423 | } |
10424 | ||
0855e32b NS |
10425 | case R_ARM_TLS_CALL: |
10426 | case R_ARM_THM_TLS_CALL: | |
ba93b8ac DJ |
10427 | case R_ARM_TLS_GD32: |
10428 | case R_ARM_TLS_IE32: | |
0855e32b NS |
10429 | case R_ARM_TLS_GOTDESC: |
10430 | case R_ARM_TLS_DESCSEQ: | |
10431 | case R_ARM_THM_TLS_DESCSEQ: | |
ba93b8ac | 10432 | { |
0855e32b NS |
10433 | bfd_vma off, offplt; |
10434 | int indx = 0; | |
ba93b8ac DJ |
10435 | char tls_type; |
10436 | ||
0855e32b | 10437 | BFD_ASSERT (sgot != NULL); |
ba93b8ac | 10438 | |
ba93b8ac DJ |
10439 | if (h != NULL) |
10440 | { | |
10441 | bfd_boolean dyn; | |
10442 | dyn = globals->root.dynamic_sections_created; | |
0e1862bb L |
10443 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
10444 | bfd_link_pic (info), | |
10445 | h) | |
10446 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
10447 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
10448 | { | |
10449 | *unresolved_reloc_p = FALSE; | |
10450 | indx = h->dynindx; | |
10451 | } | |
10452 | off = h->got.offset; | |
0855e32b | 10453 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
ba93b8ac DJ |
10454 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
10455 | } | |
10456 | else | |
10457 | { | |
0855e32b | 10458 | BFD_ASSERT (local_got_offsets != NULL); |
ba93b8ac | 10459 | off = local_got_offsets[r_symndx]; |
0855e32b | 10460 | offplt = local_tlsdesc_gotents[r_symndx]; |
ba93b8ac DJ |
10461 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
10462 | } | |
10463 | ||
0855e32b | 10464 | /* Linker relaxations happens from one of the |
b38cadfb | 10465 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ |
0855e32b | 10466 | if (ELF32_R_TYPE(rel->r_info) != r_type) |
b38cadfb | 10467 | tls_type = GOT_TLS_IE; |
0855e32b NS |
10468 | |
10469 | BFD_ASSERT (tls_type != GOT_UNKNOWN); | |
ba93b8ac DJ |
10470 | |
10471 | if ((off & 1) != 0) | |
10472 | off &= ~1; | |
10473 | else | |
10474 | { | |
10475 | bfd_boolean need_relocs = FALSE; | |
10476 | Elf_Internal_Rela outrel; | |
ba93b8ac DJ |
10477 | int cur_off = off; |
10478 | ||
10479 | /* The GOT entries have not been initialized yet. Do it | |
10480 | now, and emit any relocations. If both an IE GOT and a | |
10481 | GD GOT are necessary, we emit the GD first. */ | |
10482 | ||
0e1862bb | 10483 | if ((bfd_link_pic (info) || indx != 0) |
ba93b8ac DJ |
10484 | && (h == NULL |
10485 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
10486 | || h->root.type != bfd_link_hash_undefweak)) | |
10487 | { | |
10488 | need_relocs = TRUE; | |
0855e32b | 10489 | BFD_ASSERT (srelgot != NULL); |
ba93b8ac DJ |
10490 | } |
10491 | ||
0855e32b NS |
10492 | if (tls_type & GOT_TLS_GDESC) |
10493 | { | |
47beaa6a RS |
10494 | bfd_byte *loc; |
10495 | ||
0855e32b NS |
10496 | /* We should have relaxed, unless this is an undefined |
10497 | weak symbol. */ | |
10498 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) | |
0e1862bb | 10499 | || bfd_link_pic (info)); |
0855e32b | 10500 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 |
99059e56 | 10501 | <= globals->root.sgotplt->size); |
0855e32b NS |
10502 | |
10503 | outrel.r_addend = 0; | |
10504 | outrel.r_offset = (globals->root.sgotplt->output_section->vma | |
10505 | + globals->root.sgotplt->output_offset | |
10506 | + offplt | |
10507 | + globals->sgotplt_jump_table_size); | |
b38cadfb | 10508 | |
0855e32b NS |
10509 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); |
10510 | sreloc = globals->root.srelplt; | |
10511 | loc = sreloc->contents; | |
10512 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); | |
10513 | BFD_ASSERT (loc + RELOC_SIZE (globals) | |
99059e56 | 10514 | <= sreloc->contents + sreloc->size); |
0855e32b NS |
10515 | |
10516 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
10517 | ||
10518 | /* For globals, the first word in the relocation gets | |
10519 | the relocation index and the top bit set, or zero, | |
10520 | if we're binding now. For locals, it gets the | |
10521 | symbol's offset in the tls section. */ | |
99059e56 | 10522 | bfd_put_32 (output_bfd, |
0855e32b NS |
10523 | !h ? value - elf_hash_table (info)->tls_sec->vma |
10524 | : info->flags & DF_BIND_NOW ? 0 | |
10525 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), | |
b38cadfb NC |
10526 | globals->root.sgotplt->contents + offplt |
10527 | + globals->sgotplt_jump_table_size); | |
10528 | ||
0855e32b | 10529 | /* Second word in the relocation is always zero. */ |
99059e56 | 10530 | bfd_put_32 (output_bfd, 0, |
b38cadfb NC |
10531 | globals->root.sgotplt->contents + offplt |
10532 | + globals->sgotplt_jump_table_size + 4); | |
0855e32b | 10533 | } |
ba93b8ac DJ |
10534 | if (tls_type & GOT_TLS_GD) |
10535 | { | |
10536 | if (need_relocs) | |
10537 | { | |
00a97672 | 10538 | outrel.r_addend = 0; |
362d30a1 RS |
10539 | outrel.r_offset = (sgot->output_section->vma |
10540 | + sgot->output_offset | |
00a97672 | 10541 | + cur_off); |
ba93b8ac | 10542 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 10543 | |
00a97672 RS |
10544 | if (globals->use_rel) |
10545 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10546 | sgot->contents + cur_off); |
00a97672 | 10547 | |
47beaa6a | 10548 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
10549 | |
10550 | if (indx == 0) | |
10551 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
362d30a1 | 10552 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
10553 | else |
10554 | { | |
00a97672 | 10555 | outrel.r_addend = 0; |
ba93b8ac DJ |
10556 | outrel.r_info = ELF32_R_INFO (indx, |
10557 | R_ARM_TLS_DTPOFF32); | |
10558 | outrel.r_offset += 4; | |
00a97672 RS |
10559 | |
10560 | if (globals->use_rel) | |
10561 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10562 | sgot->contents + cur_off + 4); |
00a97672 | 10563 | |
47beaa6a RS |
10564 | elf32_arm_add_dynreloc (output_bfd, info, |
10565 | srelgot, &outrel); | |
ba93b8ac DJ |
10566 | } |
10567 | } | |
10568 | else | |
10569 | { | |
10570 | /* If we are not emitting relocations for a | |
10571 | general dynamic reference, then we must be in a | |
10572 | static link or an executable link with the | |
10573 | symbol binding locally. Mark it as belonging | |
10574 | to module 1, the executable. */ | |
10575 | bfd_put_32 (output_bfd, 1, | |
362d30a1 | 10576 | sgot->contents + cur_off); |
ba93b8ac | 10577 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
362d30a1 | 10578 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
10579 | } |
10580 | ||
10581 | cur_off += 8; | |
10582 | } | |
10583 | ||
10584 | if (tls_type & GOT_TLS_IE) | |
10585 | { | |
10586 | if (need_relocs) | |
10587 | { | |
00a97672 RS |
10588 | if (indx == 0) |
10589 | outrel.r_addend = value - dtpoff_base (info); | |
10590 | else | |
10591 | outrel.r_addend = 0; | |
362d30a1 RS |
10592 | outrel.r_offset = (sgot->output_section->vma |
10593 | + sgot->output_offset | |
ba93b8ac DJ |
10594 | + cur_off); |
10595 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
10596 | ||
00a97672 RS |
10597 | if (globals->use_rel) |
10598 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10599 | sgot->contents + cur_off); |
ba93b8ac | 10600 | |
47beaa6a | 10601 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
10602 | } |
10603 | else | |
10604 | bfd_put_32 (output_bfd, tpoff (info, value), | |
362d30a1 | 10605 | sgot->contents + cur_off); |
ba93b8ac DJ |
10606 | cur_off += 4; |
10607 | } | |
10608 | ||
10609 | if (h != NULL) | |
10610 | h->got.offset |= 1; | |
10611 | else | |
10612 | local_got_offsets[r_symndx] |= 1; | |
10613 | } | |
10614 | ||
10615 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32) | |
10616 | off += 8; | |
0855e32b NS |
10617 | else if (tls_type & GOT_TLS_GDESC) |
10618 | off = offplt; | |
10619 | ||
10620 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL | |
10621 | || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) | |
10622 | { | |
10623 | bfd_signed_vma offset; | |
12352d3f PB |
10624 | /* TLS stubs are arm mode. The original symbol is a |
10625 | data object, so branch_type is bogus. */ | |
10626 | branch_type = ST_BRANCH_TO_ARM; | |
0855e32b | 10627 | enum elf32_arm_stub_type stub_type |
34e77a92 RS |
10628 | = arm_type_of_stub (info, input_section, rel, |
10629 | st_type, &branch_type, | |
0855e32b NS |
10630 | (struct elf32_arm_link_hash_entry *)h, |
10631 | globals->tls_trampoline, globals->root.splt, | |
10632 | input_bfd, sym_name); | |
10633 | ||
10634 | if (stub_type != arm_stub_none) | |
10635 | { | |
10636 | struct elf32_arm_stub_hash_entry *stub_entry | |
10637 | = elf32_arm_get_stub_entry | |
10638 | (input_section, globals->root.splt, 0, rel, | |
10639 | globals, stub_type); | |
10640 | offset = (stub_entry->stub_offset | |
10641 | + stub_entry->stub_sec->output_offset | |
10642 | + stub_entry->stub_sec->output_section->vma); | |
10643 | } | |
10644 | else | |
10645 | offset = (globals->root.splt->output_section->vma | |
10646 | + globals->root.splt->output_offset | |
10647 | + globals->tls_trampoline); | |
10648 | ||
10649 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL) | |
10650 | { | |
10651 | unsigned long inst; | |
b38cadfb NC |
10652 | |
10653 | offset -= (input_section->output_section->vma | |
10654 | + input_section->output_offset | |
10655 | + rel->r_offset + 8); | |
0855e32b NS |
10656 | |
10657 | inst = offset >> 2; | |
10658 | inst &= 0x00ffffff; | |
10659 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); | |
10660 | } | |
10661 | else | |
10662 | { | |
10663 | /* Thumb blx encodes the offset in a complicated | |
10664 | fashion. */ | |
10665 | unsigned upper_insn, lower_insn; | |
10666 | unsigned neg; | |
10667 | ||
b38cadfb NC |
10668 | offset -= (input_section->output_section->vma |
10669 | + input_section->output_offset | |
0855e32b | 10670 | + rel->r_offset + 4); |
b38cadfb | 10671 | |
12352d3f PB |
10672 | if (stub_type != arm_stub_none |
10673 | && arm_stub_is_thumb (stub_type)) | |
10674 | { | |
10675 | lower_insn = 0xd000; | |
10676 | } | |
10677 | else | |
10678 | { | |
10679 | lower_insn = 0xc000; | |
6a631e86 | 10680 | /* Round up the offset to a word boundary. */ |
12352d3f PB |
10681 | offset = (offset + 2) & ~2; |
10682 | } | |
10683 | ||
0855e32b NS |
10684 | neg = offset < 0; |
10685 | upper_insn = (0xf000 | |
10686 | | ((offset >> 12) & 0x3ff) | |
10687 | | (neg << 10)); | |
12352d3f | 10688 | lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) |
0855e32b | 10689 | | (((!((offset >> 22) & 1)) ^ neg) << 11) |
12352d3f | 10690 | | ((offset >> 1) & 0x7ff); |
0855e32b NS |
10691 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
10692 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
10693 | return bfd_reloc_ok; | |
10694 | } | |
10695 | } | |
10696 | /* These relocations needs special care, as besides the fact | |
10697 | they point somewhere in .gotplt, the addend must be | |
10698 | adjusted accordingly depending on the type of instruction | |
6a631e86 | 10699 | we refer to. */ |
0855e32b NS |
10700 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) |
10701 | { | |
10702 | unsigned long data, insn; | |
10703 | unsigned thumb; | |
b38cadfb | 10704 | |
0855e32b NS |
10705 | data = bfd_get_32 (input_bfd, hit_data); |
10706 | thumb = data & 1; | |
10707 | data &= ~1u; | |
b38cadfb | 10708 | |
0855e32b NS |
10709 | if (thumb) |
10710 | { | |
10711 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); | |
10712 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
10713 | insn = (insn << 16) | |
10714 | | bfd_get_16 (input_bfd, | |
10715 | contents + rel->r_offset - data + 2); | |
10716 | if ((insn & 0xf800c000) == 0xf000c000) | |
10717 | /* bl/blx */ | |
10718 | value = -6; | |
10719 | else if ((insn & 0xffffff00) == 0x4400) | |
10720 | /* add */ | |
10721 | value = -5; | |
10722 | else | |
10723 | { | |
10724 | (*_bfd_error_handler) | |
10725 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"), | |
10726 | input_bfd, input_section, | |
10727 | (unsigned long)rel->r_offset, insn); | |
10728 | return bfd_reloc_notsupported; | |
10729 | } | |
10730 | } | |
10731 | else | |
10732 | { | |
10733 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); | |
10734 | ||
10735 | switch (insn >> 24) | |
10736 | { | |
10737 | case 0xeb: /* bl */ | |
10738 | case 0xfa: /* blx */ | |
10739 | value = -4; | |
10740 | break; | |
10741 | ||
10742 | case 0xe0: /* add */ | |
10743 | value = -8; | |
10744 | break; | |
b38cadfb | 10745 | |
0855e32b NS |
10746 | default: |
10747 | (*_bfd_error_handler) | |
10748 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"), | |
10749 | input_bfd, input_section, | |
10750 | (unsigned long)rel->r_offset, insn); | |
10751 | return bfd_reloc_notsupported; | |
10752 | } | |
10753 | } | |
b38cadfb | 10754 | |
0855e32b NS |
10755 | value += ((globals->root.sgotplt->output_section->vma |
10756 | + globals->root.sgotplt->output_offset + off) | |
10757 | - (input_section->output_section->vma | |
10758 | + input_section->output_offset | |
10759 | + rel->r_offset) | |
10760 | + globals->sgotplt_jump_table_size); | |
10761 | } | |
10762 | else | |
10763 | value = ((globals->root.sgot->output_section->vma | |
10764 | + globals->root.sgot->output_offset + off) | |
10765 | - (input_section->output_section->vma | |
10766 | + input_section->output_offset + rel->r_offset)); | |
ba93b8ac DJ |
10767 | |
10768 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
10769 | contents, rel->r_offset, value, | |
00a97672 | 10770 | rel->r_addend); |
ba93b8ac DJ |
10771 | } |
10772 | ||
10773 | case R_ARM_TLS_LE32: | |
3cbc1e5e | 10774 | if (bfd_link_dll (info)) |
ba93b8ac DJ |
10775 | { |
10776 | (*_bfd_error_handler) | |
10777 | (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), | |
10778 | input_bfd, input_section, | |
10779 | (long) rel->r_offset, howto->name); | |
46691134 | 10780 | return bfd_reloc_notsupported; |
ba93b8ac DJ |
10781 | } |
10782 | else | |
10783 | value = tpoff (info, value); | |
906e58ca | 10784 | |
ba93b8ac | 10785 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
10786 | contents, rel->r_offset, value, |
10787 | rel->r_addend); | |
ba93b8ac | 10788 | |
319850b4 JB |
10789 | case R_ARM_V4BX: |
10790 | if (globals->fix_v4bx) | |
845b51d6 PB |
10791 | { |
10792 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 10793 | |
845b51d6 PB |
10794 | /* Ensure that we have a BX instruction. */ |
10795 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 10796 | |
845b51d6 PB |
10797 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
10798 | { | |
10799 | /* Branch to veneer. */ | |
10800 | bfd_vma glue_addr; | |
10801 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
10802 | glue_addr -= input_section->output_section->vma | |
10803 | + input_section->output_offset | |
10804 | + rel->r_offset + 8; | |
10805 | insn = (insn & 0xf0000000) | 0x0a000000 | |
10806 | | ((glue_addr >> 2) & 0x00ffffff); | |
10807 | } | |
10808 | else | |
10809 | { | |
10810 | /* Preserve Rm (lowest four bits) and the condition code | |
10811 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
10812 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
10813 | } | |
319850b4 | 10814 | |
845b51d6 PB |
10815 | bfd_put_32 (input_bfd, insn, hit_data); |
10816 | } | |
319850b4 JB |
10817 | return bfd_reloc_ok; |
10818 | ||
b6895b4f PB |
10819 | case R_ARM_MOVW_ABS_NC: |
10820 | case R_ARM_MOVT_ABS: | |
10821 | case R_ARM_MOVW_PREL_NC: | |
10822 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
10823 | /* Until we properly support segment-base-relative addressing then |
10824 | we assume the segment base to be zero, as for the group relocations. | |
10825 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
10826 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
10827 | case R_ARM_MOVW_BREL_NC: | |
10828 | case R_ARM_MOVW_BREL: | |
10829 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
10830 | { |
10831 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
10832 | ||
10833 | if (globals->use_rel) | |
10834 | { | |
10835 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 10836 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 10837 | } |
92f5d02b | 10838 | |
b6895b4f | 10839 | value += signed_addend; |
b6895b4f PB |
10840 | |
10841 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
10842 | value -= (input_section->output_section->vma | |
10843 | + input_section->output_offset + rel->r_offset); | |
10844 | ||
92f5d02b | 10845 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
99059e56 | 10846 | return bfd_reloc_overflow; |
92f5d02b | 10847 | |
35fc36a8 | 10848 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
10849 | value |= 1; |
10850 | ||
10851 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
99059e56 | 10852 | || r_type == R_ARM_MOVT_BREL) |
b6895b4f PB |
10853 | value >>= 16; |
10854 | ||
10855 | insn &= 0xfff0f000; | |
10856 | insn |= value & 0xfff; | |
10857 | insn |= (value & 0xf000) << 4; | |
10858 | bfd_put_32 (input_bfd, insn, hit_data); | |
10859 | } | |
10860 | return bfd_reloc_ok; | |
10861 | ||
10862 | case R_ARM_THM_MOVW_ABS_NC: | |
10863 | case R_ARM_THM_MOVT_ABS: | |
10864 | case R_ARM_THM_MOVW_PREL_NC: | |
10865 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
10866 | /* Until we properly support segment-base-relative addressing then |
10867 | we assume the segment base to be zero, as for the above relocations. | |
10868 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
10869 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
10870 | as R_ARM_THM_MOVT_ABS. */ | |
10871 | case R_ARM_THM_MOVW_BREL_NC: | |
10872 | case R_ARM_THM_MOVW_BREL: | |
10873 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
10874 | { |
10875 | bfd_vma insn; | |
906e58ca | 10876 | |
b6895b4f PB |
10877 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
10878 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
10879 | ||
10880 | if (globals->use_rel) | |
10881 | { | |
10882 | addend = ((insn >> 4) & 0xf000) | |
10883 | | ((insn >> 15) & 0x0800) | |
10884 | | ((insn >> 4) & 0x0700) | |
10885 | | (insn & 0x00ff); | |
39623e12 | 10886 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 10887 | } |
92f5d02b | 10888 | |
b6895b4f | 10889 | value += signed_addend; |
b6895b4f PB |
10890 | |
10891 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
10892 | value -= (input_section->output_section->vma | |
10893 | + input_section->output_offset + rel->r_offset); | |
10894 | ||
92f5d02b | 10895 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
99059e56 | 10896 | return bfd_reloc_overflow; |
92f5d02b | 10897 | |
35fc36a8 | 10898 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
10899 | value |= 1; |
10900 | ||
10901 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
99059e56 | 10902 | || r_type == R_ARM_THM_MOVT_BREL) |
b6895b4f PB |
10903 | value >>= 16; |
10904 | ||
10905 | insn &= 0xfbf08f00; | |
10906 | insn |= (value & 0xf000) << 4; | |
10907 | insn |= (value & 0x0800) << 15; | |
10908 | insn |= (value & 0x0700) << 4; | |
10909 | insn |= (value & 0x00ff); | |
10910 | ||
10911 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10912 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10913 | } | |
10914 | return bfd_reloc_ok; | |
10915 | ||
4962c51a MS |
10916 | case R_ARM_ALU_PC_G0_NC: |
10917 | case R_ARM_ALU_PC_G1_NC: | |
10918 | case R_ARM_ALU_PC_G0: | |
10919 | case R_ARM_ALU_PC_G1: | |
10920 | case R_ARM_ALU_PC_G2: | |
10921 | case R_ARM_ALU_SB_G0_NC: | |
10922 | case R_ARM_ALU_SB_G1_NC: | |
10923 | case R_ARM_ALU_SB_G0: | |
10924 | case R_ARM_ALU_SB_G1: | |
10925 | case R_ARM_ALU_SB_G2: | |
10926 | { | |
10927 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 10928 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 10929 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 10930 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 10931 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 RM |
10932 | bfd_vma residual; |
10933 | bfd_vma g_n; | |
4962c51a | 10934 | bfd_signed_vma signed_value; |
99059e56 RM |
10935 | int group = 0; |
10936 | ||
10937 | /* Determine which group of bits to select. */ | |
10938 | switch (r_type) | |
10939 | { | |
10940 | case R_ARM_ALU_PC_G0_NC: | |
10941 | case R_ARM_ALU_PC_G0: | |
10942 | case R_ARM_ALU_SB_G0_NC: | |
10943 | case R_ARM_ALU_SB_G0: | |
10944 | group = 0; | |
10945 | break; | |
10946 | ||
10947 | case R_ARM_ALU_PC_G1_NC: | |
10948 | case R_ARM_ALU_PC_G1: | |
10949 | case R_ARM_ALU_SB_G1_NC: | |
10950 | case R_ARM_ALU_SB_G1: | |
10951 | group = 1; | |
10952 | break; | |
10953 | ||
10954 | case R_ARM_ALU_PC_G2: | |
10955 | case R_ARM_ALU_SB_G2: | |
10956 | group = 2; | |
10957 | break; | |
10958 | ||
10959 | default: | |
10960 | abort (); | |
10961 | } | |
10962 | ||
10963 | /* If REL, extract the addend from the insn. If RELA, it will | |
10964 | have already been fetched for us. */ | |
4962c51a | 10965 | if (globals->use_rel) |
99059e56 RM |
10966 | { |
10967 | int negative; | |
10968 | bfd_vma constant = insn & 0xff; | |
10969 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
10970 | ||
10971 | if (rotation == 0) | |
10972 | signed_addend = constant; | |
10973 | else | |
10974 | { | |
10975 | /* Compensate for the fact that in the instruction, the | |
10976 | rotation is stored in multiples of 2 bits. */ | |
10977 | rotation *= 2; | |
10978 | ||
10979 | /* Rotate "constant" right by "rotation" bits. */ | |
10980 | signed_addend = (constant >> rotation) | | |
10981 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
10982 | } | |
10983 | ||
10984 | /* Determine if the instruction is an ADD or a SUB. | |
10985 | (For REL, this determines the sign of the addend.) */ | |
10986 | negative = identify_add_or_sub (insn); | |
10987 | if (negative == 0) | |
10988 | { | |
10989 | (*_bfd_error_handler) | |
10990 | (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"), | |
10991 | input_bfd, input_section, | |
10992 | (long) rel->r_offset, howto->name); | |
10993 | return bfd_reloc_overflow; | |
10994 | } | |
10995 | ||
10996 | signed_addend *= negative; | |
10997 | } | |
4962c51a MS |
10998 | |
10999 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11000 | if (r_type == R_ARM_ALU_PC_G0_NC |
11001 | || r_type == R_ARM_ALU_PC_G1_NC | |
11002 | || r_type == R_ARM_ALU_PC_G0 | |
11003 | || r_type == R_ARM_ALU_PC_G1 | |
11004 | || r_type == R_ARM_ALU_PC_G2) | |
11005 | /* PC relative. */ | |
11006 | signed_value = value - pc + signed_addend; | |
11007 | else | |
11008 | /* Section base relative. */ | |
11009 | signed_value = value - sb + signed_addend; | |
11010 | ||
11011 | /* If the target symbol is a Thumb function, then set the | |
11012 | Thumb bit in the address. */ | |
35fc36a8 | 11013 | if (branch_type == ST_BRANCH_TO_THUMB) |
4962c51a MS |
11014 | signed_value |= 1; |
11015 | ||
99059e56 RM |
11016 | /* Calculate the value of the relevant G_n, in encoded |
11017 | constant-with-rotation format. */ | |
b6518b38 NC |
11018 | g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11019 | group, &residual); | |
99059e56 RM |
11020 | |
11021 | /* Check for overflow if required. */ | |
11022 | if ((r_type == R_ARM_ALU_PC_G0 | |
11023 | || r_type == R_ARM_ALU_PC_G1 | |
11024 | || r_type == R_ARM_ALU_PC_G2 | |
11025 | || r_type == R_ARM_ALU_SB_G0 | |
11026 | || r_type == R_ARM_ALU_SB_G1 | |
11027 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
11028 | { | |
11029 | (*_bfd_error_handler) | |
11030 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
11031 | input_bfd, input_section, | |
b6518b38 NC |
11032 | (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value, |
11033 | howto->name); | |
99059e56 RM |
11034 | return bfd_reloc_overflow; |
11035 | } | |
11036 | ||
11037 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
11038 | not to destroy the S bit. */ | |
11039 | insn &= 0xff1ff000; | |
11040 | ||
11041 | /* Set the opcode according to whether the value to go in the | |
11042 | place is negative. */ | |
11043 | if (signed_value < 0) | |
11044 | insn |= 1 << 22; | |
11045 | else | |
11046 | insn |= 1 << 23; | |
11047 | ||
11048 | /* Encode the offset. */ | |
11049 | insn |= g_n; | |
4962c51a MS |
11050 | |
11051 | bfd_put_32 (input_bfd, insn, hit_data); | |
11052 | } | |
11053 | return bfd_reloc_ok; | |
11054 | ||
11055 | case R_ARM_LDR_PC_G0: | |
11056 | case R_ARM_LDR_PC_G1: | |
11057 | case R_ARM_LDR_PC_G2: | |
11058 | case R_ARM_LDR_SB_G0: | |
11059 | case R_ARM_LDR_SB_G1: | |
11060 | case R_ARM_LDR_SB_G2: | |
11061 | { | |
11062 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11063 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11064 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11065 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11066 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 11067 | bfd_vma residual; |
4962c51a | 11068 | bfd_signed_vma signed_value; |
99059e56 RM |
11069 | int group = 0; |
11070 | ||
11071 | /* Determine which groups of bits to calculate. */ | |
11072 | switch (r_type) | |
11073 | { | |
11074 | case R_ARM_LDR_PC_G0: | |
11075 | case R_ARM_LDR_SB_G0: | |
11076 | group = 0; | |
11077 | break; | |
11078 | ||
11079 | case R_ARM_LDR_PC_G1: | |
11080 | case R_ARM_LDR_SB_G1: | |
11081 | group = 1; | |
11082 | break; | |
11083 | ||
11084 | case R_ARM_LDR_PC_G2: | |
11085 | case R_ARM_LDR_SB_G2: | |
11086 | group = 2; | |
11087 | break; | |
11088 | ||
11089 | default: | |
11090 | abort (); | |
11091 | } | |
11092 | ||
11093 | /* If REL, extract the addend from the insn. If RELA, it will | |
11094 | have already been fetched for us. */ | |
4962c51a | 11095 | if (globals->use_rel) |
99059e56 RM |
11096 | { |
11097 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
11098 | signed_addend = negative * (insn & 0xfff); | |
11099 | } | |
4962c51a MS |
11100 | |
11101 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11102 | if (r_type == R_ARM_LDR_PC_G0 |
11103 | || r_type == R_ARM_LDR_PC_G1 | |
11104 | || r_type == R_ARM_LDR_PC_G2) | |
11105 | /* PC relative. */ | |
11106 | signed_value = value - pc + signed_addend; | |
11107 | else | |
11108 | /* Section base relative. */ | |
11109 | signed_value = value - sb + signed_addend; | |
11110 | ||
11111 | /* Calculate the value of the relevant G_{n-1} to obtain | |
11112 | the residual at that stage. */ | |
b6518b38 NC |
11113 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11114 | group - 1, &residual); | |
99059e56 RM |
11115 | |
11116 | /* Check for overflow. */ | |
11117 | if (residual >= 0x1000) | |
11118 | { | |
11119 | (*_bfd_error_handler) | |
11120 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
b6518b38 NC |
11121 | input_bfd, input_section, |
11122 | (long) rel->r_offset, labs (signed_value), howto->name); | |
99059e56 RM |
11123 | return bfd_reloc_overflow; |
11124 | } | |
11125 | ||
11126 | /* Mask out the value and U bit. */ | |
11127 | insn &= 0xff7ff000; | |
11128 | ||
11129 | /* Set the U bit if the value to go in the place is non-negative. */ | |
11130 | if (signed_value >= 0) | |
11131 | insn |= 1 << 23; | |
11132 | ||
11133 | /* Encode the offset. */ | |
11134 | insn |= residual; | |
4962c51a MS |
11135 | |
11136 | bfd_put_32 (input_bfd, insn, hit_data); | |
11137 | } | |
11138 | return bfd_reloc_ok; | |
11139 | ||
11140 | case R_ARM_LDRS_PC_G0: | |
11141 | case R_ARM_LDRS_PC_G1: | |
11142 | case R_ARM_LDRS_PC_G2: | |
11143 | case R_ARM_LDRS_SB_G0: | |
11144 | case R_ARM_LDRS_SB_G1: | |
11145 | case R_ARM_LDRS_SB_G2: | |
11146 | { | |
11147 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11148 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11149 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11150 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11151 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 11152 | bfd_vma residual; |
4962c51a | 11153 | bfd_signed_vma signed_value; |
99059e56 RM |
11154 | int group = 0; |
11155 | ||
11156 | /* Determine which groups of bits to calculate. */ | |
11157 | switch (r_type) | |
11158 | { | |
11159 | case R_ARM_LDRS_PC_G0: | |
11160 | case R_ARM_LDRS_SB_G0: | |
11161 | group = 0; | |
11162 | break; | |
11163 | ||
11164 | case R_ARM_LDRS_PC_G1: | |
11165 | case R_ARM_LDRS_SB_G1: | |
11166 | group = 1; | |
11167 | break; | |
11168 | ||
11169 | case R_ARM_LDRS_PC_G2: | |
11170 | case R_ARM_LDRS_SB_G2: | |
11171 | group = 2; | |
11172 | break; | |
11173 | ||
11174 | default: | |
11175 | abort (); | |
11176 | } | |
11177 | ||
11178 | /* If REL, extract the addend from the insn. If RELA, it will | |
11179 | have already been fetched for us. */ | |
4962c51a | 11180 | if (globals->use_rel) |
99059e56 RM |
11181 | { |
11182 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
11183 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
11184 | } | |
4962c51a MS |
11185 | |
11186 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11187 | if (r_type == R_ARM_LDRS_PC_G0 |
11188 | || r_type == R_ARM_LDRS_PC_G1 | |
11189 | || r_type == R_ARM_LDRS_PC_G2) | |
11190 | /* PC relative. */ | |
11191 | signed_value = value - pc + signed_addend; | |
11192 | else | |
11193 | /* Section base relative. */ | |
11194 | signed_value = value - sb + signed_addend; | |
11195 | ||
11196 | /* Calculate the value of the relevant G_{n-1} to obtain | |
11197 | the residual at that stage. */ | |
b6518b38 NC |
11198 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11199 | group - 1, &residual); | |
99059e56 RM |
11200 | |
11201 | /* Check for overflow. */ | |
11202 | if (residual >= 0x100) | |
11203 | { | |
11204 | (*_bfd_error_handler) | |
11205 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
b6518b38 NC |
11206 | input_bfd, input_section, |
11207 | (long) rel->r_offset, labs (signed_value), howto->name); | |
99059e56 RM |
11208 | return bfd_reloc_overflow; |
11209 | } | |
11210 | ||
11211 | /* Mask out the value and U bit. */ | |
11212 | insn &= 0xff7ff0f0; | |
11213 | ||
11214 | /* Set the U bit if the value to go in the place is non-negative. */ | |
11215 | if (signed_value >= 0) | |
11216 | insn |= 1 << 23; | |
11217 | ||
11218 | /* Encode the offset. */ | |
11219 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
4962c51a MS |
11220 | |
11221 | bfd_put_32 (input_bfd, insn, hit_data); | |
11222 | } | |
11223 | return bfd_reloc_ok; | |
11224 | ||
11225 | case R_ARM_LDC_PC_G0: | |
11226 | case R_ARM_LDC_PC_G1: | |
11227 | case R_ARM_LDC_PC_G2: | |
11228 | case R_ARM_LDC_SB_G0: | |
11229 | case R_ARM_LDC_SB_G1: | |
11230 | case R_ARM_LDC_SB_G2: | |
11231 | { | |
11232 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11233 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11234 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11235 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11236 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 11237 | bfd_vma residual; |
4962c51a | 11238 | bfd_signed_vma signed_value; |
99059e56 RM |
11239 | int group = 0; |
11240 | ||
11241 | /* Determine which groups of bits to calculate. */ | |
11242 | switch (r_type) | |
11243 | { | |
11244 | case R_ARM_LDC_PC_G0: | |
11245 | case R_ARM_LDC_SB_G0: | |
11246 | group = 0; | |
11247 | break; | |
11248 | ||
11249 | case R_ARM_LDC_PC_G1: | |
11250 | case R_ARM_LDC_SB_G1: | |
11251 | group = 1; | |
11252 | break; | |
11253 | ||
11254 | case R_ARM_LDC_PC_G2: | |
11255 | case R_ARM_LDC_SB_G2: | |
11256 | group = 2; | |
11257 | break; | |
11258 | ||
11259 | default: | |
11260 | abort (); | |
11261 | } | |
11262 | ||
11263 | /* If REL, extract the addend from the insn. If RELA, it will | |
11264 | have already been fetched for us. */ | |
4962c51a | 11265 | if (globals->use_rel) |
99059e56 RM |
11266 | { |
11267 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
11268 | signed_addend = negative * ((insn & 0xff) << 2); | |
11269 | } | |
4962c51a MS |
11270 | |
11271 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11272 | if (r_type == R_ARM_LDC_PC_G0 |
11273 | || r_type == R_ARM_LDC_PC_G1 | |
11274 | || r_type == R_ARM_LDC_PC_G2) | |
11275 | /* PC relative. */ | |
11276 | signed_value = value - pc + signed_addend; | |
11277 | else | |
11278 | /* Section base relative. */ | |
11279 | signed_value = value - sb + signed_addend; | |
11280 | ||
11281 | /* Calculate the value of the relevant G_{n-1} to obtain | |
11282 | the residual at that stage. */ | |
b6518b38 NC |
11283 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11284 | group - 1, &residual); | |
99059e56 RM |
11285 | |
11286 | /* Check for overflow. (The absolute value to go in the place must be | |
11287 | divisible by four and, after having been divided by four, must | |
11288 | fit in eight bits.) */ | |
11289 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
11290 | { | |
11291 | (*_bfd_error_handler) | |
11292 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
11293 | input_bfd, input_section, | |
b6518b38 | 11294 | (long) rel->r_offset, labs (signed_value), howto->name); |
99059e56 RM |
11295 | return bfd_reloc_overflow; |
11296 | } | |
11297 | ||
11298 | /* Mask out the value and U bit. */ | |
11299 | insn &= 0xff7fff00; | |
11300 | ||
11301 | /* Set the U bit if the value to go in the place is non-negative. */ | |
11302 | if (signed_value >= 0) | |
11303 | insn |= 1 << 23; | |
11304 | ||
11305 | /* Encode the offset. */ | |
11306 | insn |= residual >> 2; | |
4962c51a MS |
11307 | |
11308 | bfd_put_32 (input_bfd, insn, hit_data); | |
11309 | } | |
11310 | return bfd_reloc_ok; | |
11311 | ||
72d98d16 MG |
11312 | case R_ARM_THM_ALU_ABS_G0_NC: |
11313 | case R_ARM_THM_ALU_ABS_G1_NC: | |
11314 | case R_ARM_THM_ALU_ABS_G2_NC: | |
11315 | case R_ARM_THM_ALU_ABS_G3_NC: | |
11316 | { | |
11317 | const int shift_array[4] = {0, 8, 16, 24}; | |
11318 | bfd_vma insn = bfd_get_16 (input_bfd, hit_data); | |
11319 | bfd_vma addr = value; | |
11320 | int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC]; | |
11321 | ||
11322 | /* Compute address. */ | |
11323 | if (globals->use_rel) | |
11324 | signed_addend = insn & 0xff; | |
11325 | addr += signed_addend; | |
11326 | if (branch_type == ST_BRANCH_TO_THUMB) | |
11327 | addr |= 1; | |
11328 | /* Clean imm8 insn. */ | |
11329 | insn &= 0xff00; | |
11330 | /* And update with correct part of address. */ | |
11331 | insn |= (addr >> shift) & 0xff; | |
11332 | /* Update insn. */ | |
11333 | bfd_put_16 (input_bfd, insn, hit_data); | |
11334 | } | |
11335 | ||
11336 | *unresolved_reloc_p = FALSE; | |
11337 | return bfd_reloc_ok; | |
11338 | ||
252b5132 RH |
11339 | default: |
11340 | return bfd_reloc_notsupported; | |
11341 | } | |
11342 | } | |
11343 | ||
98c1d4aa NC |
11344 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
11345 | static void | |
57e8b36a NC |
11346 | arm_add_to_rel (bfd * abfd, |
11347 | bfd_byte * address, | |
11348 | reloc_howto_type * howto, | |
11349 | bfd_signed_vma increment) | |
98c1d4aa | 11350 | { |
98c1d4aa NC |
11351 | bfd_signed_vma addend; |
11352 | ||
bd97cb95 DJ |
11353 | if (howto->type == R_ARM_THM_CALL |
11354 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 11355 | { |
9a5aca8c AM |
11356 | int upper_insn, lower_insn; |
11357 | int upper, lower; | |
98c1d4aa | 11358 | |
9a5aca8c AM |
11359 | upper_insn = bfd_get_16 (abfd, address); |
11360 | lower_insn = bfd_get_16 (abfd, address + 2); | |
11361 | upper = upper_insn & 0x7ff; | |
11362 | lower = lower_insn & 0x7ff; | |
11363 | ||
11364 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 11365 | addend += increment; |
9a5aca8c | 11366 | addend >>= 1; |
98c1d4aa | 11367 | |
9a5aca8c AM |
11368 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
11369 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
11370 | ||
dc810e39 AM |
11371 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
11372 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
11373 | } |
11374 | else | |
11375 | { | |
11376 | bfd_vma contents; | |
11377 | ||
11378 | contents = bfd_get_32 (abfd, address); | |
11379 | ||
11380 | /* Get the (signed) value from the instruction. */ | |
11381 | addend = contents & howto->src_mask; | |
11382 | if (addend & ((howto->src_mask + 1) >> 1)) | |
11383 | { | |
11384 | bfd_signed_vma mask; | |
11385 | ||
11386 | mask = -1; | |
11387 | mask &= ~ howto->src_mask; | |
11388 | addend |= mask; | |
11389 | } | |
11390 | ||
11391 | /* Add in the increment, (which is a byte value). */ | |
11392 | switch (howto->type) | |
11393 | { | |
11394 | default: | |
11395 | addend += increment; | |
11396 | break; | |
11397 | ||
11398 | case R_ARM_PC24: | |
c6596c5e | 11399 | case R_ARM_PLT32: |
5b5bb741 PB |
11400 | case R_ARM_CALL: |
11401 | case R_ARM_JUMP24: | |
9a5aca8c | 11402 | addend <<= howto->size; |
dc810e39 | 11403 | addend += increment; |
9a5aca8c AM |
11404 | |
11405 | /* Should we check for overflow here ? */ | |
11406 | ||
11407 | /* Drop any undesired bits. */ | |
11408 | addend >>= howto->rightshift; | |
11409 | break; | |
11410 | } | |
11411 | ||
11412 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
11413 | ||
11414 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 11415 | } |
98c1d4aa | 11416 | } |
252b5132 | 11417 | |
ba93b8ac DJ |
11418 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
11419 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
11420 | || (R_TYPE) == R_ARM_TLS_LDO32 \ | |
11421 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
11422 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ | |
11423 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
11424 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
11425 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
0855e32b NS |
11426 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
11427 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) | |
11428 | ||
11429 | /* Specific set of relocations for the gnu tls dialect. */ | |
11430 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ | |
11431 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ | |
11432 | || (R_TYPE) == R_ARM_TLS_CALL \ | |
11433 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ | |
11434 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ | |
11435 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) | |
ba93b8ac | 11436 | |
252b5132 | 11437 | /* Relocate an ARM ELF section. */ |
906e58ca | 11438 | |
b34976b6 | 11439 | static bfd_boolean |
57e8b36a NC |
11440 | elf32_arm_relocate_section (bfd * output_bfd, |
11441 | struct bfd_link_info * info, | |
11442 | bfd * input_bfd, | |
11443 | asection * input_section, | |
11444 | bfd_byte * contents, | |
11445 | Elf_Internal_Rela * relocs, | |
11446 | Elf_Internal_Sym * local_syms, | |
11447 | asection ** local_sections) | |
252b5132 | 11448 | { |
b34976b6 AM |
11449 | Elf_Internal_Shdr *symtab_hdr; |
11450 | struct elf_link_hash_entry **sym_hashes; | |
11451 | Elf_Internal_Rela *rel; | |
11452 | Elf_Internal_Rela *relend; | |
11453 | const char *name; | |
b32d3aa2 | 11454 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 11455 | |
4e7fd91e | 11456 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
11457 | if (globals == NULL) |
11458 | return FALSE; | |
b491616a | 11459 | |
0ffa91dd | 11460 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
11461 | sym_hashes = elf_sym_hashes (input_bfd); |
11462 | ||
11463 | rel = relocs; | |
11464 | relend = relocs + input_section->reloc_count; | |
11465 | for (; rel < relend; rel++) | |
11466 | { | |
ba96a88f NC |
11467 | int r_type; |
11468 | reloc_howto_type * howto; | |
11469 | unsigned long r_symndx; | |
11470 | Elf_Internal_Sym * sym; | |
11471 | asection * sec; | |
252b5132 | 11472 | struct elf_link_hash_entry * h; |
ba96a88f NC |
11473 | bfd_vma relocation; |
11474 | bfd_reloc_status_type r; | |
11475 | arelent bfd_reloc; | |
ba93b8ac | 11476 | char sym_type; |
0945cdfd | 11477 | bfd_boolean unresolved_reloc = FALSE; |
f2a9dd69 | 11478 | char *error_message = NULL; |
f21f3fe0 | 11479 | |
252b5132 | 11480 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 11481 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 11482 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 11483 | |
ba96a88f | 11484 | if ( r_type == R_ARM_GNU_VTENTRY |
99059e56 RM |
11485 | || r_type == R_ARM_GNU_VTINHERIT) |
11486 | continue; | |
252b5132 | 11487 | |
b32d3aa2 | 11488 | bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
ba96a88f | 11489 | howto = bfd_reloc.howto; |
252b5132 | 11490 | |
252b5132 RH |
11491 | h = NULL; |
11492 | sym = NULL; | |
11493 | sec = NULL; | |
9b485d32 | 11494 | |
252b5132 RH |
11495 | if (r_symndx < symtab_hdr->sh_info) |
11496 | { | |
11497 | sym = local_syms + r_symndx; | |
ba93b8ac | 11498 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 11499 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
11500 | |
11501 | /* An object file might have a reference to a local | |
11502 | undefined symbol. This is a daft object file, but we | |
11503 | should at least do something about it. V4BX & NONE | |
11504 | relocations do not use the symbol and are explicitly | |
77b4f08f TS |
11505 | allowed to use the undefined symbol, so allow those. |
11506 | Likewise for relocations against STN_UNDEF. */ | |
ffcb4889 NS |
11507 | if (r_type != R_ARM_V4BX |
11508 | && r_type != R_ARM_NONE | |
77b4f08f | 11509 | && r_symndx != STN_UNDEF |
ffcb4889 NS |
11510 | && bfd_is_und_section (sec) |
11511 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
1a72702b AM |
11512 | (*info->callbacks->undefined_symbol) |
11513 | (info, bfd_elf_string_from_elf_section | |
11514 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
11515 | input_bfd, input_section, | |
11516 | rel->r_offset, TRUE); | |
b38cadfb | 11517 | |
4e7fd91e | 11518 | if (globals->use_rel) |
f8df10f4 | 11519 | { |
4e7fd91e PB |
11520 | relocation = (sec->output_section->vma |
11521 | + sec->output_offset | |
11522 | + sym->st_value); | |
0e1862bb | 11523 | if (!bfd_link_relocatable (info) |
ab96bf03 AM |
11524 | && (sec->flags & SEC_MERGE) |
11525 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 11526 | { |
4e7fd91e PB |
11527 | asection *msec; |
11528 | bfd_vma addend, value; | |
11529 | ||
39623e12 | 11530 | switch (r_type) |
4e7fd91e | 11531 | { |
39623e12 PB |
11532 | case R_ARM_MOVW_ABS_NC: |
11533 | case R_ARM_MOVT_ABS: | |
11534 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
11535 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
11536 | addend = (addend ^ 0x8000) - 0x8000; | |
11537 | break; | |
f8df10f4 | 11538 | |
39623e12 PB |
11539 | case R_ARM_THM_MOVW_ABS_NC: |
11540 | case R_ARM_THM_MOVT_ABS: | |
11541 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
11542 | << 16; | |
11543 | value |= bfd_get_16 (input_bfd, | |
11544 | contents + rel->r_offset + 2); | |
11545 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
11546 | | ((value & 0x04000000) >> 15); | |
11547 | addend = (addend ^ 0x8000) - 0x8000; | |
11548 | break; | |
f8df10f4 | 11549 | |
39623e12 PB |
11550 | default: |
11551 | if (howto->rightshift | |
11552 | || (howto->src_mask & (howto->src_mask + 1))) | |
11553 | { | |
11554 | (*_bfd_error_handler) | |
11555 | (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"), | |
11556 | input_bfd, input_section, | |
11557 | (long) rel->r_offset, howto->name); | |
11558 | return FALSE; | |
11559 | } | |
11560 | ||
11561 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
11562 | ||
11563 | /* Get the (signed) value from the instruction. */ | |
11564 | addend = value & howto->src_mask; | |
11565 | if (addend & ((howto->src_mask + 1) >> 1)) | |
11566 | { | |
11567 | bfd_signed_vma mask; | |
11568 | ||
11569 | mask = -1; | |
11570 | mask &= ~ howto->src_mask; | |
11571 | addend |= mask; | |
11572 | } | |
11573 | break; | |
4e7fd91e | 11574 | } |
39623e12 | 11575 | |
4e7fd91e PB |
11576 | msec = sec; |
11577 | addend = | |
11578 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
11579 | - relocation; | |
11580 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 | 11581 | |
cc643b88 | 11582 | /* Cases here must match those in the preceding |
39623e12 PB |
11583 | switch statement. */ |
11584 | switch (r_type) | |
11585 | { | |
11586 | case R_ARM_MOVW_ABS_NC: | |
11587 | case R_ARM_MOVT_ABS: | |
11588 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
11589 | | (addend & 0xfff); | |
11590 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
11591 | break; | |
11592 | ||
11593 | case R_ARM_THM_MOVW_ABS_NC: | |
11594 | case R_ARM_THM_MOVT_ABS: | |
11595 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
11596 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
11597 | bfd_put_16 (input_bfd, value >> 16, | |
11598 | contents + rel->r_offset); | |
11599 | bfd_put_16 (input_bfd, value, | |
11600 | contents + rel->r_offset + 2); | |
11601 | break; | |
11602 | ||
11603 | default: | |
11604 | value = (value & ~ howto->dst_mask) | |
11605 | | (addend & howto->dst_mask); | |
11606 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
11607 | break; | |
11608 | } | |
f8df10f4 | 11609 | } |
f8df10f4 | 11610 | } |
4e7fd91e PB |
11611 | else |
11612 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
11613 | } |
11614 | else | |
11615 | { | |
62d887d4 | 11616 | bfd_boolean warned, ignored; |
560e09e9 | 11617 | |
b2a8e766 AM |
11618 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
11619 | r_symndx, symtab_hdr, sym_hashes, | |
11620 | h, sec, relocation, | |
62d887d4 | 11621 | unresolved_reloc, warned, ignored); |
ba93b8ac DJ |
11622 | |
11623 | sym_type = h->type; | |
252b5132 RH |
11624 | } |
11625 | ||
dbaa2011 | 11626 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 11627 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 11628 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 11629 | |
0e1862bb | 11630 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
11631 | { |
11632 | /* This is a relocatable link. We don't have to change | |
11633 | anything, unless the reloc is against a section symbol, | |
11634 | in which case we have to adjust according to where the | |
11635 | section symbol winds up in the output section. */ | |
11636 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
11637 | { | |
11638 | if (globals->use_rel) | |
11639 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
11640 | howto, (bfd_signed_vma) sec->output_offset); | |
11641 | else | |
11642 | rel->r_addend += sec->output_offset; | |
11643 | } | |
11644 | continue; | |
11645 | } | |
11646 | ||
252b5132 RH |
11647 | if (h != NULL) |
11648 | name = h->root.root.string; | |
11649 | else | |
11650 | { | |
11651 | name = (bfd_elf_string_from_elf_section | |
11652 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
11653 | if (name == NULL || *name == '\0') | |
11654 | name = bfd_section_name (input_bfd, sec); | |
11655 | } | |
f21f3fe0 | 11656 | |
cf35638d | 11657 | if (r_symndx != STN_UNDEF |
ba93b8ac DJ |
11658 | && r_type != R_ARM_NONE |
11659 | && (h == NULL | |
11660 | || h->root.type == bfd_link_hash_defined | |
11661 | || h->root.type == bfd_link_hash_defweak) | |
11662 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
11663 | { | |
11664 | (*_bfd_error_handler) | |
11665 | ((sym_type == STT_TLS | |
11666 | ? _("%B(%A+0x%lx): %s used with TLS symbol %s") | |
11667 | : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")), | |
11668 | input_bfd, | |
11669 | input_section, | |
11670 | (long) rel->r_offset, | |
11671 | howto->name, | |
11672 | name); | |
11673 | } | |
11674 | ||
0855e32b | 11675 | /* We call elf32_arm_final_link_relocate unless we're completely |
99059e56 RM |
11676 | done, i.e., the relaxation produced the final output we want, |
11677 | and we won't let anybody mess with it. Also, we have to do | |
11678 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation | |
6a631e86 | 11679 | both in relaxed and non-relaxed cases. */ |
39d911fc TP |
11680 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) |
11681 | || (IS_ARM_TLS_GNU_RELOC (r_type) | |
11682 | && !((h ? elf32_arm_hash_entry (h)->tls_type : | |
11683 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) | |
11684 | & GOT_TLS_GDESC))) | |
11685 | { | |
11686 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, | |
11687 | contents, rel, h == NULL); | |
11688 | /* This may have been marked unresolved because it came from | |
11689 | a shared library. But we've just dealt with that. */ | |
11690 | unresolved_reloc = 0; | |
11691 | } | |
11692 | else | |
11693 | r = bfd_reloc_continue; | |
b38cadfb | 11694 | |
39d911fc TP |
11695 | if (r == bfd_reloc_continue) |
11696 | { | |
11697 | unsigned char branch_type = | |
11698 | h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal) | |
11699 | : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
11700 | ||
11701 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, | |
11702 | input_section, contents, rel, | |
11703 | relocation, info, sec, name, | |
11704 | sym_type, branch_type, h, | |
11705 | &unresolved_reloc, | |
11706 | &error_message); | |
11707 | } | |
0945cdfd DJ |
11708 | |
11709 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
11710 | because such sections are not SEC_ALLOC and thus ld.so will | |
11711 | not process them. */ | |
11712 | if (unresolved_reloc | |
99059e56 RM |
11713 | && !((input_section->flags & SEC_DEBUGGING) != 0 |
11714 | && h->def_dynamic) | |
1d5316ab AM |
11715 | && _bfd_elf_section_offset (output_bfd, info, input_section, |
11716 | rel->r_offset) != (bfd_vma) -1) | |
0945cdfd DJ |
11717 | { |
11718 | (*_bfd_error_handler) | |
843fe662 L |
11719 | (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), |
11720 | input_bfd, | |
11721 | input_section, | |
11722 | (long) rel->r_offset, | |
11723 | howto->name, | |
11724 | h->root.root.string); | |
0945cdfd DJ |
11725 | return FALSE; |
11726 | } | |
252b5132 RH |
11727 | |
11728 | if (r != bfd_reloc_ok) | |
11729 | { | |
252b5132 RH |
11730 | switch (r) |
11731 | { | |
11732 | case bfd_reloc_overflow: | |
cf919dfd PB |
11733 | /* If the overflowing reloc was to an undefined symbol, |
11734 | we have already printed one error message and there | |
11735 | is no point complaining again. */ | |
1a72702b AM |
11736 | if (!h || h->root.type != bfd_link_hash_undefined) |
11737 | (*info->callbacks->reloc_overflow) | |
11738 | (info, (h ? &h->root : NULL), name, howto->name, | |
11739 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
11740 | break; |
11741 | ||
11742 | case bfd_reloc_undefined: | |
1a72702b AM |
11743 | (*info->callbacks->undefined_symbol) |
11744 | (info, name, input_bfd, input_section, rel->r_offset, TRUE); | |
252b5132 RH |
11745 | break; |
11746 | ||
11747 | case bfd_reloc_outofrange: | |
f2a9dd69 | 11748 | error_message = _("out of range"); |
252b5132 RH |
11749 | goto common_error; |
11750 | ||
11751 | case bfd_reloc_notsupported: | |
f2a9dd69 | 11752 | error_message = _("unsupported relocation"); |
252b5132 RH |
11753 | goto common_error; |
11754 | ||
11755 | case bfd_reloc_dangerous: | |
f2a9dd69 | 11756 | /* error_message should already be set. */ |
252b5132 RH |
11757 | goto common_error; |
11758 | ||
11759 | default: | |
f2a9dd69 | 11760 | error_message = _("unknown error"); |
8029a119 | 11761 | /* Fall through. */ |
252b5132 RH |
11762 | |
11763 | common_error: | |
f2a9dd69 | 11764 | BFD_ASSERT (error_message != NULL); |
1a72702b AM |
11765 | (*info->callbacks->reloc_dangerous) |
11766 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
11767 | break; |
11768 | } | |
11769 | } | |
11770 | } | |
11771 | ||
b34976b6 | 11772 | return TRUE; |
252b5132 RH |
11773 | } |
11774 | ||
91d6fa6a | 11775 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 11776 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 11777 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
11778 | maintaining that condition). */ |
11779 | ||
11780 | static void | |
11781 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
11782 | arm_unwind_table_edit **tail, | |
11783 | arm_unwind_edit_type type, | |
11784 | asection *linked_section, | |
91d6fa6a | 11785 | unsigned int tindex) |
2468f9c9 | 11786 | { |
21d799b5 NC |
11787 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
11788 | xmalloc (sizeof (arm_unwind_table_edit)); | |
b38cadfb | 11789 | |
2468f9c9 PB |
11790 | new_edit->type = type; |
11791 | new_edit->linked_section = linked_section; | |
91d6fa6a | 11792 | new_edit->index = tindex; |
b38cadfb | 11793 | |
91d6fa6a | 11794 | if (tindex > 0) |
2468f9c9 PB |
11795 | { |
11796 | new_edit->next = NULL; | |
11797 | ||
11798 | if (*tail) | |
11799 | (*tail)->next = new_edit; | |
11800 | ||
11801 | (*tail) = new_edit; | |
11802 | ||
11803 | if (!*head) | |
11804 | (*head) = new_edit; | |
11805 | } | |
11806 | else | |
11807 | { | |
11808 | new_edit->next = *head; | |
11809 | ||
11810 | if (!*tail) | |
11811 | *tail = new_edit; | |
11812 | ||
11813 | *head = new_edit; | |
11814 | } | |
11815 | } | |
11816 | ||
11817 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
11818 | ||
11819 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
11820 | static void | |
11821 | adjust_exidx_size(asection *exidx_sec, int adjust) | |
11822 | { | |
11823 | asection *out_sec; | |
11824 | ||
11825 | if (!exidx_sec->rawsize) | |
11826 | exidx_sec->rawsize = exidx_sec->size; | |
11827 | ||
11828 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); | |
11829 | out_sec = exidx_sec->output_section; | |
11830 | /* Adjust size of output section. */ | |
11831 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); | |
11832 | } | |
11833 | ||
11834 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
11835 | static void | |
11836 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) | |
11837 | { | |
11838 | struct _arm_elf_section_data *exidx_arm_data; | |
11839 | ||
11840 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
11841 | add_unwind_table_edit ( | |
11842 | &exidx_arm_data->u.exidx.unwind_edit_list, | |
11843 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
11844 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
11845 | ||
491d01d3 YU |
11846 | exidx_arm_data->additional_reloc_count++; |
11847 | ||
2468f9c9 PB |
11848 | adjust_exidx_size(exidx_sec, 8); |
11849 | } | |
11850 | ||
11851 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
11852 | made to those tables, such that: | |
b38cadfb | 11853 | |
2468f9c9 PB |
11854 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. |
11855 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
99059e56 | 11856 | codes which have been inlined into the index). |
2468f9c9 | 11857 | |
85fdf906 AH |
11858 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
11859 | ||
2468f9c9 | 11860 | The edits are applied when the tables are written |
b38cadfb | 11861 | (in elf32_arm_write_section). */ |
2468f9c9 PB |
11862 | |
11863 | bfd_boolean | |
11864 | elf32_arm_fix_exidx_coverage (asection **text_section_order, | |
11865 | unsigned int num_text_sections, | |
85fdf906 AH |
11866 | struct bfd_link_info *info, |
11867 | bfd_boolean merge_exidx_entries) | |
2468f9c9 PB |
11868 | { |
11869 | bfd *inp; | |
11870 | unsigned int last_second_word = 0, i; | |
11871 | asection *last_exidx_sec = NULL; | |
11872 | asection *last_text_sec = NULL; | |
11873 | int last_unwind_type = -1; | |
11874 | ||
11875 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
11876 | text sections. */ | |
c72f2fb2 | 11877 | for (inp = info->input_bfds; inp != NULL; inp = inp->link.next) |
2468f9c9 PB |
11878 | { |
11879 | asection *sec; | |
b38cadfb | 11880 | |
2468f9c9 | 11881 | for (sec = inp->sections; sec != NULL; sec = sec->next) |
99059e56 | 11882 | { |
2468f9c9 PB |
11883 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); |
11884 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
b38cadfb | 11885 | |
dec9d5df | 11886 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 | 11887 | continue; |
b38cadfb | 11888 | |
2468f9c9 PB |
11889 | if (elf_sec->linked_to) |
11890 | { | |
11891 | Elf_Internal_Shdr *linked_hdr | |
99059e56 | 11892 | = &elf_section_data (elf_sec->linked_to)->this_hdr; |
2468f9c9 | 11893 | struct _arm_elf_section_data *linked_sec_arm_data |
99059e56 | 11894 | = get_arm_elf_section_data (linked_hdr->bfd_section); |
2468f9c9 PB |
11895 | |
11896 | if (linked_sec_arm_data == NULL) | |
99059e56 | 11897 | continue; |
2468f9c9 PB |
11898 | |
11899 | /* Link this .ARM.exidx section back from the text section it | |
99059e56 | 11900 | describes. */ |
2468f9c9 PB |
11901 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; |
11902 | } | |
11903 | } | |
11904 | } | |
11905 | ||
11906 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
11907 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 11908 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
11909 | |
11910 | for (i = 0; i < num_text_sections; i++) | |
11911 | { | |
11912 | asection *sec = text_section_order[i]; | |
11913 | asection *exidx_sec; | |
11914 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
11915 | struct _arm_elf_section_data *exidx_arm_data; | |
11916 | bfd_byte *contents = NULL; | |
11917 | int deleted_exidx_bytes = 0; | |
11918 | bfd_vma j; | |
11919 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
11920 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
11921 | Elf_Internal_Shdr *hdr; | |
11922 | bfd *ibfd; | |
11923 | ||
11924 | if (arm_data == NULL) | |
99059e56 | 11925 | continue; |
2468f9c9 PB |
11926 | |
11927 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
11928 | if (exidx_sec == NULL) | |
11929 | { | |
11930 | /* Section has no unwind data. */ | |
11931 | if (last_unwind_type == 0 || !last_exidx_sec) | |
11932 | continue; | |
11933 | ||
11934 | /* Ignore zero sized sections. */ | |
11935 | if (sec->size == 0) | |
11936 | continue; | |
11937 | ||
11938 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
11939 | last_unwind_type = 0; | |
11940 | continue; | |
11941 | } | |
11942 | ||
22a8f80e PB |
11943 | /* Skip /DISCARD/ sections. */ |
11944 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
11945 | continue; | |
11946 | ||
2468f9c9 PB |
11947 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
11948 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
99059e56 | 11949 | continue; |
b38cadfb | 11950 | |
2468f9c9 PB |
11951 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
11952 | if (exidx_arm_data == NULL) | |
99059e56 | 11953 | continue; |
b38cadfb | 11954 | |
2468f9c9 | 11955 | ibfd = exidx_sec->owner; |
b38cadfb | 11956 | |
2468f9c9 PB |
11957 | if (hdr->contents != NULL) |
11958 | contents = hdr->contents; | |
11959 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
11960 | /* An error? */ | |
11961 | continue; | |
11962 | ||
ac06903d YU |
11963 | if (last_unwind_type > 0) |
11964 | { | |
11965 | unsigned int first_word = bfd_get_32 (ibfd, contents); | |
11966 | /* Add cantunwind if first unwind item does not match section | |
11967 | start. */ | |
11968 | if (first_word != sec->vma) | |
11969 | { | |
11970 | insert_cantunwind_after (last_text_sec, last_exidx_sec); | |
11971 | last_unwind_type = 0; | |
11972 | } | |
11973 | } | |
11974 | ||
2468f9c9 PB |
11975 | for (j = 0; j < hdr->sh_size; j += 8) |
11976 | { | |
11977 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
11978 | int unwind_type; | |
11979 | int elide = 0; | |
11980 | ||
11981 | /* An EXIDX_CANTUNWIND entry. */ | |
11982 | if (second_word == 1) | |
11983 | { | |
11984 | if (last_unwind_type == 0) | |
11985 | elide = 1; | |
11986 | unwind_type = 0; | |
11987 | } | |
11988 | /* Inlined unwinding data. Merge if equal to previous. */ | |
11989 | else if ((second_word & 0x80000000) != 0) | |
11990 | { | |
85fdf906 AH |
11991 | if (merge_exidx_entries |
11992 | && last_second_word == second_word && last_unwind_type == 1) | |
2468f9c9 PB |
11993 | elide = 1; |
11994 | unwind_type = 1; | |
11995 | last_second_word = second_word; | |
11996 | } | |
11997 | /* Normal table entry. In theory we could merge these too, | |
11998 | but duplicate entries are likely to be much less common. */ | |
11999 | else | |
12000 | unwind_type = 2; | |
12001 | ||
491d01d3 | 12002 | if (elide && !bfd_link_relocatable (info)) |
2468f9c9 PB |
12003 | { |
12004 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
12005 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
12006 | ||
12007 | deleted_exidx_bytes += 8; | |
12008 | } | |
12009 | ||
12010 | last_unwind_type = unwind_type; | |
12011 | } | |
12012 | ||
12013 | /* Free contents if we allocated it ourselves. */ | |
12014 | if (contents != hdr->contents) | |
99059e56 | 12015 | free (contents); |
2468f9c9 PB |
12016 | |
12017 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
12018 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
12019 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
b38cadfb | 12020 | |
2468f9c9 PB |
12021 | if (deleted_exidx_bytes > 0) |
12022 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); | |
12023 | ||
12024 | last_exidx_sec = exidx_sec; | |
12025 | last_text_sec = sec; | |
12026 | } | |
12027 | ||
12028 | /* Add terminating CANTUNWIND entry. */ | |
491d01d3 YU |
12029 | if (!bfd_link_relocatable (info) && last_exidx_sec |
12030 | && last_unwind_type != 0) | |
2468f9c9 PB |
12031 | insert_cantunwind_after(last_text_sec, last_exidx_sec); |
12032 | ||
12033 | return TRUE; | |
12034 | } | |
12035 | ||
3e6b1042 DJ |
12036 | static bfd_boolean |
12037 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, | |
12038 | bfd *ibfd, const char *name) | |
12039 | { | |
12040 | asection *sec, *osec; | |
12041 | ||
3d4d4302 | 12042 | sec = bfd_get_linker_section (ibfd, name); |
3e6b1042 DJ |
12043 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) |
12044 | return TRUE; | |
12045 | ||
12046 | osec = sec->output_section; | |
12047 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
12048 | return TRUE; | |
12049 | ||
12050 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
12051 | sec->output_offset, sec->size)) | |
12052 | return FALSE; | |
12053 | ||
12054 | return TRUE; | |
12055 | } | |
12056 | ||
12057 | static bfd_boolean | |
12058 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) | |
12059 | { | |
12060 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
fe33d2fa | 12061 | asection *sec, *osec; |
3e6b1042 | 12062 | |
4dfe6ac6 NC |
12063 | if (globals == NULL) |
12064 | return FALSE; | |
12065 | ||
3e6b1042 DJ |
12066 | /* Invoke the regular ELF backend linker to do all the work. */ |
12067 | if (!bfd_elf_final_link (abfd, info)) | |
12068 | return FALSE; | |
12069 | ||
fe33d2fa CL |
12070 | /* Process stub sections (eg BE8 encoding, ...). */ |
12071 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
7292b3ac | 12072 | unsigned int i; |
cdb21a0a NS |
12073 | for (i=0; i<htab->top_id; i++) |
12074 | { | |
12075 | sec = htab->stub_group[i].stub_sec; | |
12076 | /* Only process it once, in its link_sec slot. */ | |
12077 | if (sec && i == htab->stub_group[i].link_sec->id) | |
12078 | { | |
12079 | osec = sec->output_section; | |
12080 | elf32_arm_write_section (abfd, info, sec, sec->contents); | |
12081 | if (! bfd_set_section_contents (abfd, osec, sec->contents, | |
12082 | sec->output_offset, sec->size)) | |
12083 | return FALSE; | |
12084 | } | |
fe33d2fa | 12085 | } |
fe33d2fa | 12086 | |
3e6b1042 DJ |
12087 | /* Write out any glue sections now that we have created all the |
12088 | stubs. */ | |
12089 | if (globals->bfd_of_glue_owner != NULL) | |
12090 | { | |
12091 | if (! elf32_arm_output_glue_section (info, abfd, | |
12092 | globals->bfd_of_glue_owner, | |
12093 | ARM2THUMB_GLUE_SECTION_NAME)) | |
12094 | return FALSE; | |
12095 | ||
12096 | if (! elf32_arm_output_glue_section (info, abfd, | |
12097 | globals->bfd_of_glue_owner, | |
12098 | THUMB2ARM_GLUE_SECTION_NAME)) | |
12099 | return FALSE; | |
12100 | ||
12101 | if (! elf32_arm_output_glue_section (info, abfd, | |
12102 | globals->bfd_of_glue_owner, | |
12103 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
12104 | return FALSE; | |
12105 | ||
a504d23a LA |
12106 | if (! elf32_arm_output_glue_section (info, abfd, |
12107 | globals->bfd_of_glue_owner, | |
12108 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME)) | |
12109 | return FALSE; | |
12110 | ||
3e6b1042 DJ |
12111 | if (! elf32_arm_output_glue_section (info, abfd, |
12112 | globals->bfd_of_glue_owner, | |
12113 | ARM_BX_GLUE_SECTION_NAME)) | |
12114 | return FALSE; | |
12115 | } | |
12116 | ||
12117 | return TRUE; | |
12118 | } | |
12119 | ||
5968a7b8 NC |
12120 | /* Return a best guess for the machine number based on the attributes. */ |
12121 | ||
12122 | static unsigned int | |
12123 | bfd_arm_get_mach_from_attributes (bfd * abfd) | |
12124 | { | |
12125 | int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
12126 | ||
12127 | switch (arch) | |
12128 | { | |
12129 | case TAG_CPU_ARCH_V4: return bfd_mach_arm_4; | |
12130 | case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T; | |
12131 | case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T; | |
12132 | ||
12133 | case TAG_CPU_ARCH_V5TE: | |
12134 | { | |
12135 | char * name; | |
12136 | ||
12137 | BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES); | |
12138 | name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s; | |
12139 | ||
12140 | if (name) | |
12141 | { | |
12142 | if (strcmp (name, "IWMMXT2") == 0) | |
12143 | return bfd_mach_arm_iWMMXt2; | |
12144 | ||
12145 | if (strcmp (name, "IWMMXT") == 0) | |
6034aab8 | 12146 | return bfd_mach_arm_iWMMXt; |
088ca6c1 NC |
12147 | |
12148 | if (strcmp (name, "XSCALE") == 0) | |
12149 | { | |
12150 | int wmmx; | |
12151 | ||
12152 | BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES); | |
12153 | wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i; | |
12154 | switch (wmmx) | |
12155 | { | |
12156 | case 1: return bfd_mach_arm_iWMMXt; | |
12157 | case 2: return bfd_mach_arm_iWMMXt2; | |
12158 | default: return bfd_mach_arm_XScale; | |
12159 | } | |
12160 | } | |
5968a7b8 NC |
12161 | } |
12162 | ||
12163 | return bfd_mach_arm_5TE; | |
12164 | } | |
12165 | ||
12166 | default: | |
12167 | return bfd_mach_arm_unknown; | |
12168 | } | |
12169 | } | |
12170 | ||
c178919b NC |
12171 | /* Set the right machine number. */ |
12172 | ||
12173 | static bfd_boolean | |
57e8b36a | 12174 | elf32_arm_object_p (bfd *abfd) |
c178919b | 12175 | { |
5a6c6817 | 12176 | unsigned int mach; |
57e8b36a | 12177 | |
5a6c6817 | 12178 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 12179 | |
5968a7b8 NC |
12180 | if (mach == bfd_mach_arm_unknown) |
12181 | { | |
12182 | if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
12183 | mach = bfd_mach_arm_ep9312; | |
12184 | else | |
12185 | mach = bfd_arm_get_mach_from_attributes (abfd); | |
12186 | } | |
c178919b | 12187 | |
5968a7b8 | 12188 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
c178919b NC |
12189 | return TRUE; |
12190 | } | |
12191 | ||
fc830a83 | 12192 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 12193 | |
b34976b6 | 12194 | static bfd_boolean |
57e8b36a | 12195 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
12196 | { |
12197 | if (elf_flags_init (abfd) | |
12198 | && elf_elfheader (abfd)->e_flags != flags) | |
12199 | { | |
fc830a83 NC |
12200 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
12201 | { | |
fd2ec330 | 12202 | if (flags & EF_ARM_INTERWORK) |
d003868e AM |
12203 | (*_bfd_error_handler) |
12204 | (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), | |
12205 | abfd); | |
fc830a83 | 12206 | else |
d003868e AM |
12207 | _bfd_error_handler |
12208 | (_("Warning: Clearing the interworking flag of %B due to outside request"), | |
12209 | abfd); | |
fc830a83 | 12210 | } |
252b5132 RH |
12211 | } |
12212 | else | |
12213 | { | |
12214 | elf_elfheader (abfd)->e_flags = flags; | |
b34976b6 | 12215 | elf_flags_init (abfd) = TRUE; |
252b5132 RH |
12216 | } |
12217 | ||
b34976b6 | 12218 | return TRUE; |
252b5132 RH |
12219 | } |
12220 | ||
fc830a83 | 12221 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 12222 | |
b34976b6 | 12223 | static bfd_boolean |
57e8b36a | 12224 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
12225 | { |
12226 | flagword in_flags; | |
12227 | flagword out_flags; | |
12228 | ||
0ffa91dd | 12229 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
b34976b6 | 12230 | return TRUE; |
252b5132 | 12231 | |
fc830a83 | 12232 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
12233 | out_flags = elf_elfheader (obfd)->e_flags; |
12234 | ||
fc830a83 NC |
12235 | if (elf_flags_init (obfd) |
12236 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
12237 | && in_flags != out_flags) | |
252b5132 | 12238 | { |
252b5132 | 12239 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 12240 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
b34976b6 | 12241 | return FALSE; |
252b5132 RH |
12242 | |
12243 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 12244 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
b34976b6 | 12245 | return FALSE; |
252b5132 RH |
12246 | |
12247 | /* If the src and dest have different interworking flags | |
99059e56 | 12248 | then turn off the interworking bit. */ |
fd2ec330 | 12249 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 12250 | { |
fd2ec330 | 12251 | if (out_flags & EF_ARM_INTERWORK) |
d003868e AM |
12252 | _bfd_error_handler |
12253 | (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), | |
12254 | obfd, ibfd); | |
252b5132 | 12255 | |
fd2ec330 | 12256 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 12257 | } |
1006ba19 PB |
12258 | |
12259 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
12260 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
12261 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
12262 | } |
12263 | ||
12264 | elf_elfheader (obfd)->e_flags = in_flags; | |
b34976b6 | 12265 | elf_flags_init (obfd) = TRUE; |
252b5132 | 12266 | |
e2349352 | 12267 | return _bfd_elf_copy_private_bfd_data (ibfd, obfd); |
ee065d83 PB |
12268 | } |
12269 | ||
12270 | /* Values for Tag_ABI_PCS_R9_use. */ | |
12271 | enum | |
12272 | { | |
12273 | AEABI_R9_V6, | |
12274 | AEABI_R9_SB, | |
12275 | AEABI_R9_TLS, | |
12276 | AEABI_R9_unused | |
12277 | }; | |
12278 | ||
12279 | /* Values for Tag_ABI_PCS_RW_data. */ | |
12280 | enum | |
12281 | { | |
12282 | AEABI_PCS_RW_data_absolute, | |
12283 | AEABI_PCS_RW_data_PCrel, | |
12284 | AEABI_PCS_RW_data_SBrel, | |
12285 | AEABI_PCS_RW_data_unused | |
12286 | }; | |
12287 | ||
12288 | /* Values for Tag_ABI_enum_size. */ | |
12289 | enum | |
12290 | { | |
12291 | AEABI_enum_unused, | |
12292 | AEABI_enum_short, | |
12293 | AEABI_enum_wide, | |
12294 | AEABI_enum_forced_wide | |
12295 | }; | |
12296 | ||
104d59d1 JM |
12297 | /* Determine whether an object attribute tag takes an integer, a |
12298 | string or both. */ | |
906e58ca | 12299 | |
104d59d1 JM |
12300 | static int |
12301 | elf32_arm_obj_attrs_arg_type (int tag) | |
12302 | { | |
12303 | if (tag == Tag_compatibility) | |
3483fe2e | 12304 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 12305 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
12306 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
12307 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
12308 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 12309 | else if (tag < 32) |
3483fe2e | 12310 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 12311 | else |
3483fe2e | 12312 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
12313 | } |
12314 | ||
5aa6ff7c AS |
12315 | /* The ABI defines that Tag_conformance should be emitted first, and that |
12316 | Tag_nodefaults should be second (if either is defined). This sets those | |
12317 | two positions, and bumps up the position of all the remaining tags to | |
12318 | compensate. */ | |
12319 | static int | |
12320 | elf32_arm_obj_attrs_order (int num) | |
12321 | { | |
3de4a297 | 12322 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
5aa6ff7c | 12323 | return Tag_conformance; |
3de4a297 | 12324 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
5aa6ff7c AS |
12325 | return Tag_nodefaults; |
12326 | if ((num - 2) < Tag_nodefaults) | |
12327 | return num - 2; | |
12328 | if ((num - 1) < Tag_conformance) | |
12329 | return num - 1; | |
12330 | return num; | |
12331 | } | |
12332 | ||
e8b36cd1 JM |
12333 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
12334 | static bfd_boolean | |
12335 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) | |
12336 | { | |
12337 | if ((tag & 127) < 64) | |
12338 | { | |
12339 | _bfd_error_handler | |
12340 | (_("%B: Unknown mandatory EABI object attribute %d"), | |
12341 | abfd, tag); | |
12342 | bfd_set_error (bfd_error_bad_value); | |
12343 | return FALSE; | |
12344 | } | |
12345 | else | |
12346 | { | |
12347 | _bfd_error_handler | |
12348 | (_("Warning: %B: Unknown EABI object attribute %d"), | |
12349 | abfd, tag); | |
12350 | return TRUE; | |
12351 | } | |
12352 | } | |
12353 | ||
91e22acd AS |
12354 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
12355 | Returns -1 if no architecture could be read. */ | |
12356 | ||
12357 | static int | |
12358 | get_secondary_compatible_arch (bfd *abfd) | |
12359 | { | |
12360 | obj_attribute *attr = | |
12361 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
12362 | ||
12363 | /* Note: the tag and its argument below are uleb128 values, though | |
12364 | currently-defined values fit in one byte for each. */ | |
12365 | if (attr->s | |
12366 | && attr->s[0] == Tag_CPU_arch | |
12367 | && (attr->s[1] & 128) != 128 | |
12368 | && attr->s[2] == 0) | |
12369 | return attr->s[1]; | |
12370 | ||
12371 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
12372 | return -1; | |
12373 | } | |
12374 | ||
12375 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
12376 | The tag is removed if ARCH is -1. */ | |
12377 | ||
8e79c3df | 12378 | static void |
91e22acd | 12379 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 12380 | { |
91e22acd AS |
12381 | obj_attribute *attr = |
12382 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 12383 | |
91e22acd AS |
12384 | if (arch == -1) |
12385 | { | |
12386 | attr->s = NULL; | |
12387 | return; | |
8e79c3df | 12388 | } |
91e22acd AS |
12389 | |
12390 | /* Note: the tag and its argument below are uleb128 values, though | |
12391 | currently-defined values fit in one byte for each. */ | |
12392 | if (!attr->s) | |
21d799b5 | 12393 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
12394 | attr->s[0] = Tag_CPU_arch; |
12395 | attr->s[1] = arch; | |
12396 | attr->s[2] = '\0'; | |
8e79c3df CM |
12397 | } |
12398 | ||
91e22acd AS |
12399 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
12400 | into account. */ | |
12401 | ||
12402 | static int | |
12403 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
12404 | int newtag, int secondary_compat) | |
8e79c3df | 12405 | { |
91e22acd AS |
12406 | #define T(X) TAG_CPU_ARCH_##X |
12407 | int tagl, tagh, result; | |
12408 | const int v6t2[] = | |
12409 | { | |
12410 | T(V6T2), /* PRE_V4. */ | |
12411 | T(V6T2), /* V4. */ | |
12412 | T(V6T2), /* V4T. */ | |
12413 | T(V6T2), /* V5T. */ | |
12414 | T(V6T2), /* V5TE. */ | |
12415 | T(V6T2), /* V5TEJ. */ | |
12416 | T(V6T2), /* V6. */ | |
12417 | T(V7), /* V6KZ. */ | |
12418 | T(V6T2) /* V6T2. */ | |
12419 | }; | |
12420 | const int v6k[] = | |
12421 | { | |
12422 | T(V6K), /* PRE_V4. */ | |
12423 | T(V6K), /* V4. */ | |
12424 | T(V6K), /* V4T. */ | |
12425 | T(V6K), /* V5T. */ | |
12426 | T(V6K), /* V5TE. */ | |
12427 | T(V6K), /* V5TEJ. */ | |
12428 | T(V6K), /* V6. */ | |
12429 | T(V6KZ), /* V6KZ. */ | |
12430 | T(V7), /* V6T2. */ | |
12431 | T(V6K) /* V6K. */ | |
12432 | }; | |
12433 | const int v7[] = | |
12434 | { | |
12435 | T(V7), /* PRE_V4. */ | |
12436 | T(V7), /* V4. */ | |
12437 | T(V7), /* V4T. */ | |
12438 | T(V7), /* V5T. */ | |
12439 | T(V7), /* V5TE. */ | |
12440 | T(V7), /* V5TEJ. */ | |
12441 | T(V7), /* V6. */ | |
12442 | T(V7), /* V6KZ. */ | |
12443 | T(V7), /* V6T2. */ | |
12444 | T(V7), /* V6K. */ | |
12445 | T(V7) /* V7. */ | |
12446 | }; | |
12447 | const int v6_m[] = | |
12448 | { | |
12449 | -1, /* PRE_V4. */ | |
12450 | -1, /* V4. */ | |
12451 | T(V6K), /* V4T. */ | |
12452 | T(V6K), /* V5T. */ | |
12453 | T(V6K), /* V5TE. */ | |
12454 | T(V6K), /* V5TEJ. */ | |
12455 | T(V6K), /* V6. */ | |
12456 | T(V6KZ), /* V6KZ. */ | |
12457 | T(V7), /* V6T2. */ | |
12458 | T(V6K), /* V6K. */ | |
12459 | T(V7), /* V7. */ | |
12460 | T(V6_M) /* V6_M. */ | |
12461 | }; | |
12462 | const int v6s_m[] = | |
12463 | { | |
12464 | -1, /* PRE_V4. */ | |
12465 | -1, /* V4. */ | |
12466 | T(V6K), /* V4T. */ | |
12467 | T(V6K), /* V5T. */ | |
12468 | T(V6K), /* V5TE. */ | |
12469 | T(V6K), /* V5TEJ. */ | |
12470 | T(V6K), /* V6. */ | |
12471 | T(V6KZ), /* V6KZ. */ | |
12472 | T(V7), /* V6T2. */ | |
12473 | T(V6K), /* V6K. */ | |
12474 | T(V7), /* V7. */ | |
12475 | T(V6S_M), /* V6_M. */ | |
12476 | T(V6S_M) /* V6S_M. */ | |
12477 | }; | |
9e3c6df6 PB |
12478 | const int v7e_m[] = |
12479 | { | |
12480 | -1, /* PRE_V4. */ | |
12481 | -1, /* V4. */ | |
12482 | T(V7E_M), /* V4T. */ | |
12483 | T(V7E_M), /* V5T. */ | |
12484 | T(V7E_M), /* V5TE. */ | |
12485 | T(V7E_M), /* V5TEJ. */ | |
12486 | T(V7E_M), /* V6. */ | |
12487 | T(V7E_M), /* V6KZ. */ | |
12488 | T(V7E_M), /* V6T2. */ | |
12489 | T(V7E_M), /* V6K. */ | |
12490 | T(V7E_M), /* V7. */ | |
12491 | T(V7E_M), /* V6_M. */ | |
12492 | T(V7E_M), /* V6S_M. */ | |
12493 | T(V7E_M) /* V7E_M. */ | |
12494 | }; | |
bca38921 MGD |
12495 | const int v8[] = |
12496 | { | |
12497 | T(V8), /* PRE_V4. */ | |
12498 | T(V8), /* V4. */ | |
12499 | T(V8), /* V4T. */ | |
12500 | T(V8), /* V5T. */ | |
12501 | T(V8), /* V5TE. */ | |
12502 | T(V8), /* V5TEJ. */ | |
12503 | T(V8), /* V6. */ | |
12504 | T(V8), /* V6KZ. */ | |
12505 | T(V8), /* V6T2. */ | |
12506 | T(V8), /* V6K. */ | |
12507 | T(V8), /* V7. */ | |
12508 | T(V8), /* V6_M. */ | |
12509 | T(V8), /* V6S_M. */ | |
12510 | T(V8), /* V7E_M. */ | |
12511 | T(V8) /* V8. */ | |
12512 | }; | |
2fd158eb TP |
12513 | const int v8m_baseline[] = |
12514 | { | |
12515 | -1, /* PRE_V4. */ | |
12516 | -1, /* V4. */ | |
12517 | -1, /* V4T. */ | |
12518 | -1, /* V5T. */ | |
12519 | -1, /* V5TE. */ | |
12520 | -1, /* V5TEJ. */ | |
12521 | -1, /* V6. */ | |
12522 | -1, /* V6KZ. */ | |
12523 | -1, /* V6T2. */ | |
12524 | -1, /* V6K. */ | |
12525 | -1, /* V7. */ | |
12526 | T(V8M_BASE), /* V6_M. */ | |
12527 | T(V8M_BASE), /* V6S_M. */ | |
12528 | -1, /* V7E_M. */ | |
12529 | -1, /* V8. */ | |
12530 | -1, | |
12531 | T(V8M_BASE) /* V8-M BASELINE. */ | |
12532 | }; | |
12533 | const int v8m_mainline[] = | |
12534 | { | |
12535 | -1, /* PRE_V4. */ | |
12536 | -1, /* V4. */ | |
12537 | -1, /* V4T. */ | |
12538 | -1, /* V5T. */ | |
12539 | -1, /* V5TE. */ | |
12540 | -1, /* V5TEJ. */ | |
12541 | -1, /* V6. */ | |
12542 | -1, /* V6KZ. */ | |
12543 | -1, /* V6T2. */ | |
12544 | -1, /* V6K. */ | |
12545 | T(V8M_MAIN), /* V7. */ | |
12546 | T(V8M_MAIN), /* V6_M. */ | |
12547 | T(V8M_MAIN), /* V6S_M. */ | |
12548 | T(V8M_MAIN), /* V7E_M. */ | |
12549 | -1, /* V8. */ | |
12550 | -1, | |
12551 | T(V8M_MAIN), /* V8-M BASELINE. */ | |
12552 | T(V8M_MAIN) /* V8-M MAINLINE. */ | |
12553 | }; | |
91e22acd AS |
12554 | const int v4t_plus_v6_m[] = |
12555 | { | |
12556 | -1, /* PRE_V4. */ | |
12557 | -1, /* V4. */ | |
12558 | T(V4T), /* V4T. */ | |
12559 | T(V5T), /* V5T. */ | |
12560 | T(V5TE), /* V5TE. */ | |
12561 | T(V5TEJ), /* V5TEJ. */ | |
12562 | T(V6), /* V6. */ | |
12563 | T(V6KZ), /* V6KZ. */ | |
12564 | T(V6T2), /* V6T2. */ | |
12565 | T(V6K), /* V6K. */ | |
12566 | T(V7), /* V7. */ | |
12567 | T(V6_M), /* V6_M. */ | |
12568 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 12569 | T(V7E_M), /* V7E_M. */ |
bca38921 | 12570 | T(V8), /* V8. */ |
4ed7ed8d | 12571 | -1, /* Unused. */ |
2fd158eb TP |
12572 | T(V8M_BASE), /* V8-M BASELINE. */ |
12573 | T(V8M_MAIN), /* V8-M MAINLINE. */ | |
91e22acd AS |
12574 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
12575 | }; | |
12576 | const int *comb[] = | |
12577 | { | |
12578 | v6t2, | |
12579 | v6k, | |
12580 | v7, | |
12581 | v6_m, | |
12582 | v6s_m, | |
9e3c6df6 | 12583 | v7e_m, |
bca38921 | 12584 | v8, |
4ed7ed8d | 12585 | NULL, |
2fd158eb TP |
12586 | v8m_baseline, |
12587 | v8m_mainline, | |
91e22acd AS |
12588 | /* Pseudo-architecture. */ |
12589 | v4t_plus_v6_m | |
12590 | }; | |
12591 | ||
12592 | /* Check we've not got a higher architecture than we know about. */ | |
12593 | ||
9e3c6df6 | 12594 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 12595 | { |
3895f852 | 12596 | _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd); |
91e22acd AS |
12597 | return -1; |
12598 | } | |
12599 | ||
12600 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
12601 | ||
12602 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
12603 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
12604 | oldtag = T(V4T_PLUS_V6_M); | |
12605 | ||
12606 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
12607 | input. */ | |
12608 | ||
12609 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
12610 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
12611 | newtag = T(V4T_PLUS_V6_M); | |
12612 | ||
12613 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
12614 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
12615 | ||
12616 | /* Architectures before V6KZ add features monotonically. */ | |
12617 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
12618 | return result; | |
12619 | ||
4ed7ed8d | 12620 | result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1; |
91e22acd AS |
12621 | |
12622 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
12623 | as the canonical version. */ | |
12624 | if (result == T(V4T_PLUS_V6_M)) | |
12625 | { | |
12626 | result = T(V4T); | |
12627 | *secondary_compat_out = T(V6_M); | |
12628 | } | |
12629 | else | |
12630 | *secondary_compat_out = -1; | |
12631 | ||
12632 | if (result == -1) | |
12633 | { | |
3895f852 | 12634 | _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"), |
91e22acd AS |
12635 | ibfd, oldtag, newtag); |
12636 | return -1; | |
12637 | } | |
12638 | ||
12639 | return result; | |
12640 | #undef T | |
8e79c3df CM |
12641 | } |
12642 | ||
ac56ee8f MGD |
12643 | /* Query attributes object to see if integer divide instructions may be |
12644 | present in an object. */ | |
12645 | static bfd_boolean | |
12646 | elf32_arm_attributes_accept_div (const obj_attribute *attr) | |
12647 | { | |
12648 | int arch = attr[Tag_CPU_arch].i; | |
12649 | int profile = attr[Tag_CPU_arch_profile].i; | |
12650 | ||
12651 | switch (attr[Tag_DIV_use].i) | |
12652 | { | |
12653 | case 0: | |
12654 | /* Integer divide allowed if instruction contained in archetecture. */ | |
12655 | if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) | |
12656 | return TRUE; | |
12657 | else if (arch >= TAG_CPU_ARCH_V7E_M) | |
12658 | return TRUE; | |
12659 | else | |
12660 | return FALSE; | |
12661 | ||
12662 | case 1: | |
12663 | /* Integer divide explicitly prohibited. */ | |
12664 | return FALSE; | |
12665 | ||
12666 | default: | |
12667 | /* Unrecognised case - treat as allowing divide everywhere. */ | |
12668 | case 2: | |
12669 | /* Integer divide allowed in ARM state. */ | |
12670 | return TRUE; | |
12671 | } | |
12672 | } | |
12673 | ||
12674 | /* Query attributes object to see if integer divide instructions are | |
12675 | forbidden to be in the object. This is not the inverse of | |
12676 | elf32_arm_attributes_accept_div. */ | |
12677 | static bfd_boolean | |
12678 | elf32_arm_attributes_forbid_div (const obj_attribute *attr) | |
12679 | { | |
12680 | return attr[Tag_DIV_use].i == 1; | |
12681 | } | |
12682 | ||
ee065d83 PB |
12683 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
12684 | are conflicting attributes. */ | |
906e58ca | 12685 | |
ee065d83 PB |
12686 | static bfd_boolean |
12687 | elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) | |
12688 | { | |
104d59d1 JM |
12689 | obj_attribute *in_attr; |
12690 | obj_attribute *out_attr; | |
ee065d83 PB |
12691 | /* Some tags have 0 = don't care, 1 = strong requirement, |
12692 | 2 = weak requirement. */ | |
91e22acd | 12693 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 12694 | int i; |
91e22acd | 12695 | bfd_boolean result = TRUE; |
9274e9de | 12696 | const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section; |
ee065d83 | 12697 | |
3e6b1042 DJ |
12698 | /* Skip the linker stubs file. This preserves previous behavior |
12699 | of accepting unknown attributes in the first input file - but | |
12700 | is that a bug? */ | |
12701 | if (ibfd->flags & BFD_LINKER_CREATED) | |
12702 | return TRUE; | |
12703 | ||
9274e9de TG |
12704 | /* Skip any input that hasn't attribute section. |
12705 | This enables to link object files without attribute section with | |
12706 | any others. */ | |
12707 | if (bfd_get_section_by_name (ibfd, sec_name) == NULL) | |
12708 | return TRUE; | |
12709 | ||
104d59d1 | 12710 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
12711 | { |
12712 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 12713 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 | 12714 | |
cd21e546 MGD |
12715 | out_attr = elf_known_obj_attributes_proc (obfd); |
12716 | ||
004ae526 PB |
12717 | /* Use the Tag_null value to indicate the attributes have been |
12718 | initialized. */ | |
cd21e546 | 12719 | out_attr[0].i = 1; |
004ae526 | 12720 | |
cd21e546 MGD |
12721 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
12722 | the attribute's value to Tag_MPextension_use. */ | |
12723 | if (out_attr[Tag_MPextension_use_legacy].i != 0) | |
12724 | { | |
12725 | if (out_attr[Tag_MPextension_use].i != 0 | |
12726 | && out_attr[Tag_MPextension_use_legacy].i | |
99059e56 | 12727 | != out_attr[Tag_MPextension_use].i) |
cd21e546 MGD |
12728 | { |
12729 | _bfd_error_handler | |
12730 | (_("Error: %B has both the current and legacy " | |
12731 | "Tag_MPextension_use attributes"), ibfd); | |
12732 | result = FALSE; | |
12733 | } | |
12734 | ||
12735 | out_attr[Tag_MPextension_use] = | |
12736 | out_attr[Tag_MPextension_use_legacy]; | |
12737 | out_attr[Tag_MPextension_use_legacy].type = 0; | |
12738 | out_attr[Tag_MPextension_use_legacy].i = 0; | |
12739 | } | |
12740 | ||
12741 | return result; | |
ee065d83 PB |
12742 | } |
12743 | ||
104d59d1 JM |
12744 | in_attr = elf_known_obj_attributes_proc (ibfd); |
12745 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
12746 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
12747 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
12748 | { | |
5c294fee TG |
12749 | /* Ignore mismatches if the object doesn't use floating point or is |
12750 | floating point ABI independent. */ | |
12751 | if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none | |
12752 | || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none | |
12753 | && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible)) | |
ee065d83 | 12754 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; |
5c294fee TG |
12755 | else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none |
12756 | && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible) | |
ee065d83 PB |
12757 | { |
12758 | _bfd_error_handler | |
3895f852 | 12759 | (_("error: %B uses VFP register arguments, %B does not"), |
deddc40b NS |
12760 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
12761 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
91e22acd | 12762 | result = FALSE; |
ee065d83 PB |
12763 | } |
12764 | } | |
12765 | ||
3de4a297 | 12766 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
12767 | { |
12768 | /* Merge this attribute with existing attributes. */ | |
12769 | switch (i) | |
12770 | { | |
12771 | case Tag_CPU_raw_name: | |
12772 | case Tag_CPU_name: | |
6a631e86 | 12773 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
12774 | break; |
12775 | ||
12776 | case Tag_ABI_optimization_goals: | |
12777 | case Tag_ABI_FP_optimization_goals: | |
12778 | /* Use the first value seen. */ | |
12779 | break; | |
12780 | ||
12781 | case Tag_CPU_arch: | |
91e22acd AS |
12782 | { |
12783 | int secondary_compat = -1, secondary_compat_out = -1; | |
12784 | unsigned int saved_out_attr = out_attr[i].i; | |
70e99720 TG |
12785 | int arch_attr; |
12786 | static const char *name_table[] = | |
12787 | { | |
91e22acd AS |
12788 | /* These aren't real CPU names, but we can't guess |
12789 | that from the architecture version alone. */ | |
12790 | "Pre v4", | |
12791 | "ARM v4", | |
12792 | "ARM v4T", | |
12793 | "ARM v5T", | |
12794 | "ARM v5TE", | |
12795 | "ARM v5TEJ", | |
12796 | "ARM v6", | |
12797 | "ARM v6KZ", | |
12798 | "ARM v6T2", | |
12799 | "ARM v6K", | |
12800 | "ARM v7", | |
12801 | "ARM v6-M", | |
bca38921 | 12802 | "ARM v6S-M", |
2fd158eb TP |
12803 | "ARM v8", |
12804 | "", | |
12805 | "ARM v8-M.baseline", | |
12806 | "ARM v8-M.mainline", | |
91e22acd AS |
12807 | }; |
12808 | ||
12809 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
12810 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
12811 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
70e99720 TG |
12812 | arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i, |
12813 | &secondary_compat_out, | |
12814 | in_attr[i].i, | |
12815 | secondary_compat); | |
12816 | ||
12817 | /* Return with error if failed to merge. */ | |
12818 | if (arch_attr == -1) | |
12819 | return FALSE; | |
12820 | ||
12821 | out_attr[i].i = arch_attr; | |
12822 | ||
91e22acd AS |
12823 | set_secondary_compatible_arch (obfd, secondary_compat_out); |
12824 | ||
12825 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
12826 | if (out_attr[i].i == saved_out_attr) | |
12827 | ; /* Leave the names alone. */ | |
12828 | else if (out_attr[i].i == in_attr[i].i) | |
12829 | { | |
12830 | /* The output architecture has been changed to match the | |
12831 | input architecture. Use the input names. */ | |
12832 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
12833 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
12834 | : NULL; | |
12835 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
12836 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
12837 | : NULL; | |
12838 | } | |
12839 | else | |
12840 | { | |
12841 | out_attr[Tag_CPU_name].s = NULL; | |
12842 | out_attr[Tag_CPU_raw_name].s = NULL; | |
12843 | } | |
12844 | ||
12845 | /* If we still don't have a value for Tag_CPU_name, | |
12846 | make one up now. Tag_CPU_raw_name remains blank. */ | |
12847 | if (out_attr[Tag_CPU_name].s == NULL | |
12848 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
12849 | out_attr[Tag_CPU_name].s = | |
12850 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
12851 | } | |
12852 | break; | |
12853 | ||
ee065d83 PB |
12854 | case Tag_ARM_ISA_use: |
12855 | case Tag_THUMB_ISA_use: | |
ee065d83 | 12856 | case Tag_WMMX_arch: |
91e22acd AS |
12857 | case Tag_Advanced_SIMD_arch: |
12858 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 12859 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
12860 | case Tag_ABI_FP_exceptions: |
12861 | case Tag_ABI_FP_user_exceptions: | |
12862 | case Tag_ABI_FP_number_model: | |
75375b3e | 12863 | case Tag_FP_HP_extension: |
91e22acd AS |
12864 | case Tag_CPU_unaligned_access: |
12865 | case Tag_T2EE_use: | |
91e22acd | 12866 | case Tag_MPextension_use: |
ee065d83 PB |
12867 | /* Use the largest value specified. */ |
12868 | if (in_attr[i].i > out_attr[i].i) | |
12869 | out_attr[i].i = in_attr[i].i; | |
12870 | break; | |
12871 | ||
75375b3e | 12872 | case Tag_ABI_align_preserved: |
91e22acd AS |
12873 | case Tag_ABI_PCS_RO_data: |
12874 | /* Use the smallest value specified. */ | |
12875 | if (in_attr[i].i < out_attr[i].i) | |
12876 | out_attr[i].i = in_attr[i].i; | |
12877 | break; | |
12878 | ||
75375b3e | 12879 | case Tag_ABI_align_needed: |
91e22acd | 12880 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
75375b3e MGD |
12881 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
12882 | || out_attr[Tag_ABI_align_preserved].i == 0)) | |
ee065d83 | 12883 | { |
91e22acd AS |
12884 | /* This error message should be enabled once all non-conformant |
12885 | binaries in the toolchain have had the attributes set | |
12886 | properly. | |
ee065d83 | 12887 | _bfd_error_handler |
3895f852 | 12888 | (_("error: %B: 8-byte data alignment conflicts with %B"), |
91e22acd AS |
12889 | obfd, ibfd); |
12890 | result = FALSE; */ | |
ee065d83 | 12891 | } |
91e22acd AS |
12892 | /* Fall through. */ |
12893 | case Tag_ABI_FP_denormal: | |
12894 | case Tag_ABI_PCS_GOT_use: | |
12895 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
12896 | value if greater than 2 (for future-proofing). */ | |
12897 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
12898 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
12899 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
12900 | out_attr[i].i = in_attr[i].i; |
12901 | break; | |
91e22acd | 12902 | |
75375b3e MGD |
12903 | case Tag_Virtualization_use: |
12904 | /* The virtualization tag effectively stores two bits of | |
12905 | information: the intended use of TrustZone (in bit 0), and the | |
12906 | intended use of Virtualization (in bit 1). */ | |
12907 | if (out_attr[i].i == 0) | |
12908 | out_attr[i].i = in_attr[i].i; | |
12909 | else if (in_attr[i].i != 0 | |
12910 | && in_attr[i].i != out_attr[i].i) | |
12911 | { | |
12912 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) | |
12913 | out_attr[i].i = 3; | |
12914 | else | |
12915 | { | |
12916 | _bfd_error_handler | |
12917 | (_("error: %B: unable to merge virtualization attributes " | |
12918 | "with %B"), | |
12919 | obfd, ibfd); | |
12920 | result = FALSE; | |
12921 | } | |
12922 | } | |
12923 | break; | |
91e22acd AS |
12924 | |
12925 | case Tag_CPU_arch_profile: | |
12926 | if (out_attr[i].i != in_attr[i].i) | |
12927 | { | |
12928 | /* 0 will merge with anything. | |
12929 | 'A' and 'S' merge to 'A'. | |
12930 | 'R' and 'S' merge to 'R'. | |
99059e56 | 12931 | 'M' and 'A|R|S' is an error. */ |
91e22acd AS |
12932 | if (out_attr[i].i == 0 |
12933 | || (out_attr[i].i == 'S' | |
12934 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
12935 | out_attr[i].i = in_attr[i].i; | |
12936 | else if (in_attr[i].i == 0 | |
12937 | || (in_attr[i].i == 'S' | |
12938 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
6a631e86 | 12939 | ; /* Do nothing. */ |
91e22acd AS |
12940 | else |
12941 | { | |
12942 | _bfd_error_handler | |
3895f852 | 12943 | (_("error: %B: Conflicting architecture profiles %c/%c"), |
91e22acd AS |
12944 | ibfd, |
12945 | in_attr[i].i ? in_attr[i].i : '0', | |
12946 | out_attr[i].i ? out_attr[i].i : '0'); | |
12947 | result = FALSE; | |
12948 | } | |
12949 | } | |
12950 | break; | |
15afaa63 TP |
12951 | |
12952 | case Tag_DSP_extension: | |
12953 | /* No need to change output value if any of: | |
12954 | - pre (<=) ARMv5T input architecture (do not have DSP) | |
12955 | - M input profile not ARMv7E-M and do not have DSP. */ | |
12956 | if (in_attr[Tag_CPU_arch].i <= 3 | |
12957 | || (in_attr[Tag_CPU_arch_profile].i == 'M' | |
12958 | && in_attr[Tag_CPU_arch].i != 13 | |
12959 | && in_attr[i].i == 0)) | |
12960 | ; /* Do nothing. */ | |
12961 | /* Output value should be 0 if DSP part of architecture, ie. | |
12962 | - post (>=) ARMv5te architecture output | |
12963 | - A, R or S profile output or ARMv7E-M output architecture. */ | |
12964 | else if (out_attr[Tag_CPU_arch].i >= 4 | |
12965 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
12966 | || out_attr[Tag_CPU_arch_profile].i == 'R' | |
12967 | || out_attr[Tag_CPU_arch_profile].i == 'S' | |
12968 | || out_attr[Tag_CPU_arch].i == 13)) | |
12969 | out_attr[i].i = 0; | |
12970 | /* Otherwise, DSP instructions are added and not part of output | |
12971 | architecture. */ | |
12972 | else | |
12973 | out_attr[i].i = 1; | |
12974 | break; | |
12975 | ||
75375b3e | 12976 | case Tag_FP_arch: |
62f3b8c8 | 12977 | { |
4547cb56 NC |
12978 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
12979 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch | |
12980 | when it's 0. It might mean absence of FP hardware if | |
99654aaf | 12981 | Tag_FP_arch is zero. */ |
4547cb56 | 12982 | |
a715796b | 12983 | #define VFP_VERSION_COUNT 9 |
62f3b8c8 PB |
12984 | static const struct |
12985 | { | |
12986 | int ver; | |
12987 | int regs; | |
bca38921 | 12988 | } vfp_versions[VFP_VERSION_COUNT] = |
62f3b8c8 PB |
12989 | { |
12990 | {0, 0}, | |
12991 | {1, 16}, | |
12992 | {2, 16}, | |
12993 | {3, 32}, | |
12994 | {3, 16}, | |
12995 | {4, 32}, | |
bca38921 | 12996 | {4, 16}, |
a715796b TG |
12997 | {8, 32}, |
12998 | {8, 16} | |
62f3b8c8 PB |
12999 | }; |
13000 | int ver; | |
13001 | int regs; | |
13002 | int newval; | |
13003 | ||
4547cb56 NC |
13004 | /* If the output has no requirement about FP hardware, |
13005 | follow the requirement of the input. */ | |
13006 | if (out_attr[i].i == 0) | |
13007 | { | |
13008 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); | |
13009 | out_attr[i].i = in_attr[i].i; | |
13010 | out_attr[Tag_ABI_HardFP_use].i | |
13011 | = in_attr[Tag_ABI_HardFP_use].i; | |
13012 | break; | |
13013 | } | |
13014 | /* If the input has no requirement about FP hardware, do | |
13015 | nothing. */ | |
13016 | else if (in_attr[i].i == 0) | |
13017 | { | |
13018 | BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0); | |
13019 | break; | |
13020 | } | |
13021 | ||
13022 | /* Both the input and the output have nonzero Tag_FP_arch. | |
99654aaf | 13023 | So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */ |
4547cb56 NC |
13024 | |
13025 | /* If both the input and the output have zero Tag_ABI_HardFP_use, | |
13026 | do nothing. */ | |
13027 | if (in_attr[Tag_ABI_HardFP_use].i == 0 | |
13028 | && out_attr[Tag_ABI_HardFP_use].i == 0) | |
13029 | ; | |
13030 | /* If the input and the output have different Tag_ABI_HardFP_use, | |
99654aaf | 13031 | the combination of them is 0 (implied by Tag_FP_arch). */ |
4547cb56 NC |
13032 | else if (in_attr[Tag_ABI_HardFP_use].i |
13033 | != out_attr[Tag_ABI_HardFP_use].i) | |
99654aaf | 13034 | out_attr[Tag_ABI_HardFP_use].i = 0; |
4547cb56 NC |
13035 | |
13036 | /* Now we can handle Tag_FP_arch. */ | |
13037 | ||
bca38921 MGD |
13038 | /* Values of VFP_VERSION_COUNT or more aren't defined, so just |
13039 | pick the biggest. */ | |
13040 | if (in_attr[i].i >= VFP_VERSION_COUNT | |
13041 | && in_attr[i].i > out_attr[i].i) | |
62f3b8c8 PB |
13042 | { |
13043 | out_attr[i] = in_attr[i]; | |
13044 | break; | |
13045 | } | |
13046 | /* The output uses the superset of input features | |
13047 | (ISA version) and registers. */ | |
13048 | ver = vfp_versions[in_attr[i].i].ver; | |
13049 | if (ver < vfp_versions[out_attr[i].i].ver) | |
13050 | ver = vfp_versions[out_attr[i].i].ver; | |
13051 | regs = vfp_versions[in_attr[i].i].regs; | |
13052 | if (regs < vfp_versions[out_attr[i].i].regs) | |
13053 | regs = vfp_versions[out_attr[i].i].regs; | |
13054 | /* This assumes all possible supersets are also a valid | |
99059e56 | 13055 | options. */ |
bca38921 | 13056 | for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--) |
62f3b8c8 PB |
13057 | { |
13058 | if (regs == vfp_versions[newval].regs | |
13059 | && ver == vfp_versions[newval].ver) | |
13060 | break; | |
13061 | } | |
13062 | out_attr[i].i = newval; | |
13063 | } | |
b1cc4aeb | 13064 | break; |
ee065d83 PB |
13065 | case Tag_PCS_config: |
13066 | if (out_attr[i].i == 0) | |
13067 | out_attr[i].i = in_attr[i].i; | |
b6009aca | 13068 | else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i) |
ee065d83 PB |
13069 | { |
13070 | /* It's sometimes ok to mix different configs, so this is only | |
99059e56 | 13071 | a warning. */ |
ee065d83 PB |
13072 | _bfd_error_handler |
13073 | (_("Warning: %B: Conflicting platform configuration"), ibfd); | |
13074 | } | |
13075 | break; | |
13076 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
13077 | if (in_attr[i].i != out_attr[i].i |
13078 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
13079 | && in_attr[i].i != AEABI_R9_unused) |
13080 | { | |
13081 | _bfd_error_handler | |
3895f852 | 13082 | (_("error: %B: Conflicting use of R9"), ibfd); |
91e22acd | 13083 | result = FALSE; |
ee065d83 PB |
13084 | } |
13085 | if (out_attr[i].i == AEABI_R9_unused) | |
13086 | out_attr[i].i = in_attr[i].i; | |
13087 | break; | |
13088 | case Tag_ABI_PCS_RW_data: | |
13089 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
13090 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
13091 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
13092 | { | |
13093 | _bfd_error_handler | |
3895f852 | 13094 | (_("error: %B: SB relative addressing conflicts with use of R9"), |
ee065d83 | 13095 | ibfd); |
91e22acd | 13096 | result = FALSE; |
ee065d83 PB |
13097 | } |
13098 | /* Use the smallest value specified. */ | |
13099 | if (in_attr[i].i < out_attr[i].i) | |
13100 | out_attr[i].i = in_attr[i].i; | |
13101 | break; | |
ee065d83 | 13102 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
13103 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
13104 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
13105 | { |
13106 | _bfd_error_handler | |
a9dc9481 JM |
13107 | (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
13108 | ibfd, in_attr[i].i, out_attr[i].i); | |
ee065d83 | 13109 | } |
a9dc9481 | 13110 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
13111 | out_attr[i].i = in_attr[i].i; |
13112 | break; | |
ee065d83 PB |
13113 | case Tag_ABI_enum_size: |
13114 | if (in_attr[i].i != AEABI_enum_unused) | |
13115 | { | |
13116 | if (out_attr[i].i == AEABI_enum_unused | |
13117 | || out_attr[i].i == AEABI_enum_forced_wide) | |
13118 | { | |
13119 | /* The existing object is compatible with anything. | |
13120 | Use whatever requirements the new object has. */ | |
13121 | out_attr[i].i = in_attr[i].i; | |
13122 | } | |
13123 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 13124 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 13125 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 13126 | { |
91e22acd | 13127 | static const char *aeabi_enum_names[] = |
bf21ed78 | 13128 | { "", "variable-size", "32-bit", "" }; |
91e22acd AS |
13129 | const char *in_name = |
13130 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
13131 | ? aeabi_enum_names[in_attr[i].i] | |
13132 | : "<unknown>"; | |
13133 | const char *out_name = | |
13134 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
13135 | ? aeabi_enum_names[out_attr[i].i] | |
13136 | : "<unknown>"; | |
ee065d83 | 13137 | _bfd_error_handler |
bf21ed78 | 13138 | (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 13139 | ibfd, in_name, out_name); |
ee065d83 PB |
13140 | } |
13141 | } | |
13142 | break; | |
13143 | case Tag_ABI_VFP_args: | |
13144 | /* Aready done. */ | |
13145 | break; | |
13146 | case Tag_ABI_WMMX_args: | |
13147 | if (in_attr[i].i != out_attr[i].i) | |
13148 | { | |
13149 | _bfd_error_handler | |
3895f852 | 13150 | (_("error: %B uses iWMMXt register arguments, %B does not"), |
ee065d83 | 13151 | ibfd, obfd); |
91e22acd | 13152 | result = FALSE; |
ee065d83 PB |
13153 | } |
13154 | break; | |
7b86a9fa AS |
13155 | case Tag_compatibility: |
13156 | /* Merged in target-independent code. */ | |
13157 | break; | |
91e22acd | 13158 | case Tag_ABI_HardFP_use: |
4547cb56 | 13159 | /* This is handled along with Tag_FP_arch. */ |
91e22acd AS |
13160 | break; |
13161 | case Tag_ABI_FP_16bit_format: | |
13162 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
13163 | { | |
13164 | if (in_attr[i].i != out_attr[i].i) | |
13165 | { | |
13166 | _bfd_error_handler | |
3895f852 | 13167 | (_("error: fp16 format mismatch between %B and %B"), |
91e22acd AS |
13168 | ibfd, obfd); |
13169 | result = FALSE; | |
13170 | } | |
13171 | } | |
13172 | if (in_attr[i].i != 0) | |
13173 | out_attr[i].i = in_attr[i].i; | |
13174 | break; | |
7b86a9fa | 13175 | |
cd21e546 | 13176 | case Tag_DIV_use: |
ac56ee8f MGD |
13177 | /* A value of zero on input means that the divide instruction may |
13178 | be used if available in the base architecture as specified via | |
13179 | Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that | |
13180 | the user did not want divide instructions. A value of 2 | |
13181 | explicitly means that divide instructions were allowed in ARM | |
13182 | and Thumb state. */ | |
13183 | if (in_attr[i].i == out_attr[i].i) | |
13184 | /* Do nothing. */ ; | |
13185 | else if (elf32_arm_attributes_forbid_div (in_attr) | |
13186 | && !elf32_arm_attributes_accept_div (out_attr)) | |
13187 | out_attr[i].i = 1; | |
13188 | else if (elf32_arm_attributes_forbid_div (out_attr) | |
13189 | && elf32_arm_attributes_accept_div (in_attr)) | |
13190 | out_attr[i].i = in_attr[i].i; | |
13191 | else if (in_attr[i].i == 2) | |
13192 | out_attr[i].i = in_attr[i].i; | |
cd21e546 MGD |
13193 | break; |
13194 | ||
13195 | case Tag_MPextension_use_legacy: | |
13196 | /* We don't output objects with Tag_MPextension_use_legacy - we | |
13197 | move the value to Tag_MPextension_use. */ | |
13198 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) | |
13199 | { | |
13200 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) | |
13201 | { | |
13202 | _bfd_error_handler | |
13203 | (_("%B has has both the current and legacy " | |
b38cadfb | 13204 | "Tag_MPextension_use attributes"), |
cd21e546 MGD |
13205 | ibfd); |
13206 | result = FALSE; | |
13207 | } | |
13208 | } | |
13209 | ||
13210 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) | |
13211 | out_attr[Tag_MPextension_use] = in_attr[i]; | |
13212 | ||
13213 | break; | |
13214 | ||
91e22acd | 13215 | case Tag_nodefaults: |
2d0bb761 AS |
13216 | /* This tag is set if it exists, but the value is unused (and is |
13217 | typically zero). We don't actually need to do anything here - | |
13218 | the merge happens automatically when the type flags are merged | |
13219 | below. */ | |
91e22acd AS |
13220 | break; |
13221 | case Tag_also_compatible_with: | |
13222 | /* Already done in Tag_CPU_arch. */ | |
13223 | break; | |
13224 | case Tag_conformance: | |
13225 | /* Keep the attribute if it matches. Throw it away otherwise. | |
13226 | No attribute means no claim to conform. */ | |
13227 | if (!in_attr[i].s || !out_attr[i].s | |
13228 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
13229 | out_attr[i].s = NULL; | |
13230 | break; | |
3cfad14c | 13231 | |
91e22acd | 13232 | default: |
e8b36cd1 JM |
13233 | result |
13234 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); | |
91e22acd AS |
13235 | } |
13236 | ||
13237 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
13238 | if (in_attr[i].type && !out_attr[i].type) | |
13239 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
13240 | } |
13241 | ||
104d59d1 | 13242 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
5488d830 MGD |
13243 | if (!_bfd_elf_merge_object_attributes (ibfd, obfd)) |
13244 | return FALSE; | |
ee065d83 | 13245 | |
104d59d1 | 13246 | /* Check for any attributes not known on ARM. */ |
e8b36cd1 | 13247 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
91e22acd | 13248 | |
91e22acd | 13249 | return result; |
252b5132 RH |
13250 | } |
13251 | ||
3a4a14e9 PB |
13252 | |
13253 | /* Return TRUE if the two EABI versions are incompatible. */ | |
13254 | ||
13255 | static bfd_boolean | |
13256 | elf32_arm_versions_compatible (unsigned iver, unsigned over) | |
13257 | { | |
13258 | /* v4 and v5 are the same spec before and after it was released, | |
13259 | so allow mixing them. */ | |
13260 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
13261 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
13262 | return TRUE; | |
13263 | ||
13264 | return (iver == over); | |
13265 | } | |
13266 | ||
252b5132 RH |
13267 | /* Merge backend specific data from an object file to the output |
13268 | object file when linking. */ | |
9b485d32 | 13269 | |
b34976b6 | 13270 | static bfd_boolean |
21d799b5 | 13271 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd); |
252b5132 | 13272 | |
9b485d32 NC |
13273 | /* Display the flags field. */ |
13274 | ||
b34976b6 | 13275 | static bfd_boolean |
57e8b36a | 13276 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 13277 | { |
fc830a83 NC |
13278 | FILE * file = (FILE *) ptr; |
13279 | unsigned long flags; | |
252b5132 RH |
13280 | |
13281 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
13282 | ||
13283 | /* Print normal ELF private data. */ | |
13284 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
13285 | ||
fc830a83 | 13286 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
13287 | /* Ignore init flag - it may not be set, despite the flags field |
13288 | containing valid data. */ | |
252b5132 RH |
13289 | |
13290 | /* xgettext:c-format */ | |
9b485d32 | 13291 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 13292 | |
fc830a83 NC |
13293 | switch (EF_ARM_EABI_VERSION (flags)) |
13294 | { | |
13295 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 13296 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
13297 | official ARM ELF extended ABI. Hence they are only decoded if |
13298 | the EABI version is not set. */ | |
fd2ec330 | 13299 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 13300 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 13301 | |
fd2ec330 | 13302 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 13303 | fprintf (file, " [APCS-26]"); |
fc830a83 | 13304 | else |
6c571f00 | 13305 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 13306 | |
96a846ea RE |
13307 | if (flags & EF_ARM_VFP_FLOAT) |
13308 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
13309 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
13310 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
13311 | else |
13312 | fprintf (file, _(" [FPA float format]")); | |
13313 | ||
fd2ec330 | 13314 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 13315 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 13316 | |
fd2ec330 | 13317 | if (flags & EF_ARM_PIC) |
9b485d32 | 13318 | fprintf (file, _(" [position independent]")); |
fc830a83 | 13319 | |
fd2ec330 | 13320 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 13321 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 13322 | |
fd2ec330 | 13323 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 13324 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 13325 | |
fd2ec330 | 13326 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 13327 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 13328 | |
96a846ea RE |
13329 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
13330 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
13331 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
13332 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 13333 | break; |
9a5aca8c | 13334 | |
fc830a83 | 13335 | case EF_ARM_EABI_VER1: |
9b485d32 | 13336 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 13337 | |
fc830a83 | 13338 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 13339 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 13340 | else |
9b485d32 | 13341 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 13342 | |
fc830a83 NC |
13343 | flags &= ~ EF_ARM_SYMSARESORTED; |
13344 | break; | |
9a5aca8c | 13345 | |
fd2ec330 PB |
13346 | case EF_ARM_EABI_VER2: |
13347 | fprintf (file, _(" [Version2 EABI]")); | |
13348 | ||
13349 | if (flags & EF_ARM_SYMSARESORTED) | |
13350 | fprintf (file, _(" [sorted symbol table]")); | |
13351 | else | |
13352 | fprintf (file, _(" [unsorted symbol table]")); | |
13353 | ||
13354 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
13355 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
13356 | ||
13357 | if (flags & EF_ARM_MAPSYMSFIRST) | |
13358 | fprintf (file, _(" [mapping symbols precede others]")); | |
13359 | ||
99e4ae17 | 13360 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
13361 | | EF_ARM_MAPSYMSFIRST); |
13362 | break; | |
13363 | ||
d507cf36 PB |
13364 | case EF_ARM_EABI_VER3: |
13365 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
13366 | break; |
13367 | ||
13368 | case EF_ARM_EABI_VER4: | |
13369 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 13370 | goto eabi; |
d507cf36 | 13371 | |
3a4a14e9 PB |
13372 | case EF_ARM_EABI_VER5: |
13373 | fprintf (file, _(" [Version5 EABI]")); | |
3bfcb652 NC |
13374 | |
13375 | if (flags & EF_ARM_ABI_FLOAT_SOFT) | |
13376 | fprintf (file, _(" [soft-float ABI]")); | |
13377 | ||
13378 | if (flags & EF_ARM_ABI_FLOAT_HARD) | |
13379 | fprintf (file, _(" [hard-float ABI]")); | |
13380 | ||
13381 | flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD); | |
13382 | ||
3a4a14e9 | 13383 | eabi: |
d507cf36 PB |
13384 | if (flags & EF_ARM_BE8) |
13385 | fprintf (file, _(" [BE8]")); | |
13386 | ||
13387 | if (flags & EF_ARM_LE8) | |
13388 | fprintf (file, _(" [LE8]")); | |
13389 | ||
13390 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
13391 | break; | |
13392 | ||
fc830a83 | 13393 | default: |
9b485d32 | 13394 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
13395 | break; |
13396 | } | |
252b5132 | 13397 | |
fc830a83 | 13398 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 13399 | |
fc830a83 | 13400 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 13401 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 13402 | |
a5721edd | 13403 | flags &= ~EF_ARM_RELEXEC; |
fc830a83 NC |
13404 | |
13405 | if (flags) | |
9b485d32 | 13406 | fprintf (file, _("<Unrecognised flag bits set>")); |
9a5aca8c | 13407 | |
252b5132 RH |
13408 | fputc ('\n', file); |
13409 | ||
b34976b6 | 13410 | return TRUE; |
252b5132 RH |
13411 | } |
13412 | ||
13413 | static int | |
57e8b36a | 13414 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 13415 | { |
2f0ca46a NC |
13416 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
13417 | { | |
13418 | case STT_ARM_TFUNC: | |
13419 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 13420 | |
2f0ca46a NC |
13421 | case STT_ARM_16BIT: |
13422 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
13423 | This allows us to distinguish between data used by Thumb instructions | |
13424 | and non-data (which is probably code) inside Thumb regions of an | |
13425 | executable. */ | |
1a0eb693 | 13426 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
13427 | return ELF_ST_TYPE (elf_sym->st_info); |
13428 | break; | |
9a5aca8c | 13429 | |
ce855c42 NC |
13430 | default: |
13431 | break; | |
2f0ca46a NC |
13432 | } |
13433 | ||
13434 | return type; | |
252b5132 | 13435 | } |
f21f3fe0 | 13436 | |
252b5132 | 13437 | static asection * |
07adf181 AM |
13438 | elf32_arm_gc_mark_hook (asection *sec, |
13439 | struct bfd_link_info *info, | |
13440 | Elf_Internal_Rela *rel, | |
13441 | struct elf_link_hash_entry *h, | |
13442 | Elf_Internal_Sym *sym) | |
252b5132 RH |
13443 | { |
13444 | if (h != NULL) | |
07adf181 | 13445 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
13446 | { |
13447 | case R_ARM_GNU_VTINHERIT: | |
13448 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
13449 | return NULL; |
13450 | } | |
9ad5cbcf | 13451 | |
07adf181 | 13452 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
13453 | } |
13454 | ||
780a67af NC |
13455 | /* Update the got entry reference counts for the section being removed. */ |
13456 | ||
b34976b6 | 13457 | static bfd_boolean |
ba93b8ac DJ |
13458 | elf32_arm_gc_sweep_hook (bfd * abfd, |
13459 | struct bfd_link_info * info, | |
13460 | asection * sec, | |
13461 | const Elf_Internal_Rela * relocs) | |
252b5132 | 13462 | { |
5e681ec4 PB |
13463 | Elf_Internal_Shdr *symtab_hdr; |
13464 | struct elf_link_hash_entry **sym_hashes; | |
13465 | bfd_signed_vma *local_got_refcounts; | |
13466 | const Elf_Internal_Rela *rel, *relend; | |
eb043451 PB |
13467 | struct elf32_arm_link_hash_table * globals; |
13468 | ||
0e1862bb | 13469 | if (bfd_link_relocatable (info)) |
7dda2462 TG |
13470 | return TRUE; |
13471 | ||
eb043451 | 13472 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13473 | if (globals == NULL) |
13474 | return FALSE; | |
5e681ec4 PB |
13475 | |
13476 | elf_section_data (sec)->local_dynrel = NULL; | |
13477 | ||
0ffa91dd | 13478 | symtab_hdr = & elf_symtab_hdr (abfd); |
5e681ec4 PB |
13479 | sym_hashes = elf_sym_hashes (abfd); |
13480 | local_got_refcounts = elf_local_got_refcounts (abfd); | |
13481 | ||
906e58ca | 13482 | check_use_blx (globals); |
bd97cb95 | 13483 | |
5e681ec4 PB |
13484 | relend = relocs + sec->reloc_count; |
13485 | for (rel = relocs; rel < relend; rel++) | |
eb043451 | 13486 | { |
3eb128b2 AM |
13487 | unsigned long r_symndx; |
13488 | struct elf_link_hash_entry *h = NULL; | |
f6e32f6d | 13489 | struct elf32_arm_link_hash_entry *eh; |
eb043451 | 13490 | int r_type; |
34e77a92 | 13491 | bfd_boolean call_reloc_p; |
f6e32f6d RS |
13492 | bfd_boolean may_become_dynamic_p; |
13493 | bfd_boolean may_need_local_target_p; | |
34e77a92 RS |
13494 | union gotplt_union *root_plt; |
13495 | struct arm_plt_info *arm_plt; | |
5e681ec4 | 13496 | |
3eb128b2 AM |
13497 | r_symndx = ELF32_R_SYM (rel->r_info); |
13498 | if (r_symndx >= symtab_hdr->sh_info) | |
13499 | { | |
13500 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
13501 | while (h->root.type == bfd_link_hash_indirect | |
13502 | || h->root.type == bfd_link_hash_warning) | |
13503 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
13504 | } | |
f6e32f6d RS |
13505 | eh = (struct elf32_arm_link_hash_entry *) h; |
13506 | ||
34e77a92 | 13507 | call_reloc_p = FALSE; |
f6e32f6d RS |
13508 | may_become_dynamic_p = FALSE; |
13509 | may_need_local_target_p = FALSE; | |
3eb128b2 | 13510 | |
eb043451 | 13511 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 13512 | r_type = arm_real_reloc_type (globals, r_type); |
eb043451 PB |
13513 | switch (r_type) |
13514 | { | |
13515 | case R_ARM_GOT32: | |
eb043451 | 13516 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
13517 | case R_ARM_TLS_GD32: |
13518 | case R_ARM_TLS_IE32: | |
3eb128b2 | 13519 | if (h != NULL) |
eb043451 | 13520 | { |
eb043451 PB |
13521 | if (h->got.refcount > 0) |
13522 | h->got.refcount -= 1; | |
13523 | } | |
13524 | else if (local_got_refcounts != NULL) | |
13525 | { | |
13526 | if (local_got_refcounts[r_symndx] > 0) | |
13527 | local_got_refcounts[r_symndx] -= 1; | |
13528 | } | |
13529 | break; | |
13530 | ||
ba93b8ac | 13531 | case R_ARM_TLS_LDM32: |
4dfe6ac6 | 13532 | globals->tls_ldm_got.refcount -= 1; |
ba93b8ac DJ |
13533 | break; |
13534 | ||
eb043451 PB |
13535 | case R_ARM_PC24: |
13536 | case R_ARM_PLT32: | |
5b5bb741 PB |
13537 | case R_ARM_CALL: |
13538 | case R_ARM_JUMP24: | |
eb043451 | 13539 | case R_ARM_PREL31: |
c19d1205 | 13540 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
13541 | case R_ARM_THM_JUMP24: |
13542 | case R_ARM_THM_JUMP19: | |
34e77a92 | 13543 | call_reloc_p = TRUE; |
f6e32f6d RS |
13544 | may_need_local_target_p = TRUE; |
13545 | break; | |
13546 | ||
13547 | case R_ARM_ABS12: | |
13548 | if (!globals->vxworks_p) | |
13549 | { | |
13550 | may_need_local_target_p = TRUE; | |
13551 | break; | |
13552 | } | |
13553 | /* Fall through. */ | |
13554 | case R_ARM_ABS32: | |
13555 | case R_ARM_ABS32_NOI: | |
13556 | case R_ARM_REL32: | |
13557 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
13558 | case R_ARM_MOVW_ABS_NC: |
13559 | case R_ARM_MOVT_ABS: | |
13560 | case R_ARM_MOVW_PREL_NC: | |
13561 | case R_ARM_MOVT_PREL: | |
13562 | case R_ARM_THM_MOVW_ABS_NC: | |
13563 | case R_ARM_THM_MOVT_ABS: | |
13564 | case R_ARM_THM_MOVW_PREL_NC: | |
13565 | case R_ARM_THM_MOVT_PREL: | |
b7693d02 | 13566 | /* Should the interworking branches be here also? */ |
0e1862bb | 13567 | if ((bfd_link_pic (info) || globals->root.is_relocatable_executable) |
34e77a92 RS |
13568 | && (sec->flags & SEC_ALLOC) != 0) |
13569 | { | |
13570 | if (h == NULL | |
469a3493 | 13571 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
34e77a92 RS |
13572 | { |
13573 | call_reloc_p = TRUE; | |
13574 | may_need_local_target_p = TRUE; | |
13575 | } | |
13576 | else | |
13577 | may_become_dynamic_p = TRUE; | |
13578 | } | |
f6e32f6d RS |
13579 | else |
13580 | may_need_local_target_p = TRUE; | |
13581 | break; | |
b7693d02 | 13582 | |
f6e32f6d RS |
13583 | default: |
13584 | break; | |
13585 | } | |
5e681ec4 | 13586 | |
34e77a92 RS |
13587 | if (may_need_local_target_p |
13588 | && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt)) | |
f6e32f6d | 13589 | { |
27586251 HPN |
13590 | /* If PLT refcount book-keeping is wrong and too low, we'll |
13591 | see a zero value (going to -1) for the root PLT reference | |
13592 | count. */ | |
13593 | if (root_plt->refcount >= 0) | |
13594 | { | |
13595 | BFD_ASSERT (root_plt->refcount != 0); | |
13596 | root_plt->refcount -= 1; | |
13597 | } | |
13598 | else | |
13599 | /* A value of -1 means the symbol has become local, forced | |
13600 | or seeing a hidden definition. Any other negative value | |
13601 | is an error. */ | |
13602 | BFD_ASSERT (root_plt->refcount == -1); | |
34e77a92 RS |
13603 | |
13604 | if (!call_reloc_p) | |
13605 | arm_plt->noncall_refcount--; | |
5e681ec4 | 13606 | |
f6e32f6d | 13607 | if (r_type == R_ARM_THM_CALL) |
34e77a92 | 13608 | arm_plt->maybe_thumb_refcount--; |
bd97cb95 | 13609 | |
f6e32f6d RS |
13610 | if (r_type == R_ARM_THM_JUMP24 |
13611 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 13612 | arm_plt->thumb_refcount--; |
f6e32f6d | 13613 | } |
5e681ec4 | 13614 | |
34e77a92 | 13615 | if (may_become_dynamic_p) |
f6e32f6d RS |
13616 | { |
13617 | struct elf_dyn_relocs **pp; | |
13618 | struct elf_dyn_relocs *p; | |
5e681ec4 | 13619 | |
34e77a92 | 13620 | if (h != NULL) |
9c489990 | 13621 | pp = &(eh->dyn_relocs); |
34e77a92 RS |
13622 | else |
13623 | { | |
13624 | Elf_Internal_Sym *isym; | |
13625 | ||
13626 | isym = bfd_sym_from_r_symndx (&globals->sym_cache, | |
13627 | abfd, r_symndx); | |
13628 | if (isym == NULL) | |
13629 | return FALSE; | |
13630 | pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); | |
13631 | if (pp == NULL) | |
13632 | return FALSE; | |
13633 | } | |
9c489990 | 13634 | for (; (p = *pp) != NULL; pp = &p->next) |
f6e32f6d RS |
13635 | if (p->sec == sec) |
13636 | { | |
13637 | /* Everything must go for SEC. */ | |
13638 | *pp = p->next; | |
13639 | break; | |
13640 | } | |
eb043451 PB |
13641 | } |
13642 | } | |
5e681ec4 | 13643 | |
b34976b6 | 13644 | return TRUE; |
252b5132 RH |
13645 | } |
13646 | ||
780a67af NC |
13647 | /* Look through the relocs for a section during the first phase. */ |
13648 | ||
b34976b6 | 13649 | static bfd_boolean |
57e8b36a NC |
13650 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
13651 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 13652 | { |
b34976b6 AM |
13653 | Elf_Internal_Shdr *symtab_hdr; |
13654 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
13655 | const Elf_Internal_Rela *rel; |
13656 | const Elf_Internal_Rela *rel_end; | |
13657 | bfd *dynobj; | |
5e681ec4 | 13658 | asection *sreloc; |
5e681ec4 | 13659 | struct elf32_arm_link_hash_table *htab; |
f6e32f6d RS |
13660 | bfd_boolean call_reloc_p; |
13661 | bfd_boolean may_become_dynamic_p; | |
13662 | bfd_boolean may_need_local_target_p; | |
ce98a316 | 13663 | unsigned long nsyms; |
9a5aca8c | 13664 | |
0e1862bb | 13665 | if (bfd_link_relocatable (info)) |
b34976b6 | 13666 | return TRUE; |
9a5aca8c | 13667 | |
0ffa91dd NC |
13668 | BFD_ASSERT (is_arm_elf (abfd)); |
13669 | ||
5e681ec4 | 13670 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13671 | if (htab == NULL) |
13672 | return FALSE; | |
13673 | ||
5e681ec4 | 13674 | sreloc = NULL; |
9a5aca8c | 13675 | |
67687978 PB |
13676 | /* Create dynamic sections for relocatable executables so that we can |
13677 | copy relocations. */ | |
13678 | if (htab->root.is_relocatable_executable | |
13679 | && ! htab->root.dynamic_sections_created) | |
13680 | { | |
13681 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
13682 | return FALSE; | |
13683 | } | |
13684 | ||
cbc704f3 RS |
13685 | if (htab->root.dynobj == NULL) |
13686 | htab->root.dynobj = abfd; | |
34e77a92 RS |
13687 | if (!create_ifunc_sections (info)) |
13688 | return FALSE; | |
cbc704f3 RS |
13689 | |
13690 | dynobj = htab->root.dynobj; | |
13691 | ||
0ffa91dd | 13692 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 13693 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 | 13694 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
b38cadfb | 13695 | |
252b5132 RH |
13696 | rel_end = relocs + sec->reloc_count; |
13697 | for (rel = relocs; rel < rel_end; rel++) | |
13698 | { | |
34e77a92 | 13699 | Elf_Internal_Sym *isym; |
252b5132 | 13700 | struct elf_link_hash_entry *h; |
b7693d02 | 13701 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 13702 | unsigned long r_symndx; |
eb043451 | 13703 | int r_type; |
9a5aca8c | 13704 | |
252b5132 | 13705 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 13706 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 13707 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 13708 | |
ce98a316 NC |
13709 | if (r_symndx >= nsyms |
13710 | /* PR 9934: It is possible to have relocations that do not | |
13711 | refer to symbols, thus it is also possible to have an | |
13712 | object file containing relocations but no symbol table. */ | |
cf35638d | 13713 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
ba93b8ac DJ |
13714 | { |
13715 | (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd, | |
ce98a316 | 13716 | r_symndx); |
ba93b8ac DJ |
13717 | return FALSE; |
13718 | } | |
13719 | ||
34e77a92 RS |
13720 | h = NULL; |
13721 | isym = NULL; | |
13722 | if (nsyms > 0) | |
973a3492 | 13723 | { |
34e77a92 RS |
13724 | if (r_symndx < symtab_hdr->sh_info) |
13725 | { | |
13726 | /* A local symbol. */ | |
13727 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, | |
13728 | abfd, r_symndx); | |
13729 | if (isym == NULL) | |
13730 | return FALSE; | |
13731 | } | |
13732 | else | |
13733 | { | |
13734 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
13735 | while (h->root.type == bfd_link_hash_indirect | |
13736 | || h->root.type == bfd_link_hash_warning) | |
13737 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
81fbe831 AM |
13738 | |
13739 | /* PR15323, ref flags aren't set for references in the | |
13740 | same object. */ | |
13741 | h->root.non_ir_ref = 1; | |
34e77a92 | 13742 | } |
973a3492 | 13743 | } |
9a5aca8c | 13744 | |
b7693d02 DJ |
13745 | eh = (struct elf32_arm_link_hash_entry *) h; |
13746 | ||
f6e32f6d RS |
13747 | call_reloc_p = FALSE; |
13748 | may_become_dynamic_p = FALSE; | |
13749 | may_need_local_target_p = FALSE; | |
13750 | ||
0855e32b NS |
13751 | /* Could be done earlier, if h were already available. */ |
13752 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
eb043451 | 13753 | switch (r_type) |
99059e56 | 13754 | { |
5e681ec4 | 13755 | case R_ARM_GOT32: |
eb043451 | 13756 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
13757 | case R_ARM_TLS_GD32: |
13758 | case R_ARM_TLS_IE32: | |
0855e32b NS |
13759 | case R_ARM_TLS_GOTDESC: |
13760 | case R_ARM_TLS_DESCSEQ: | |
13761 | case R_ARM_THM_TLS_DESCSEQ: | |
13762 | case R_ARM_TLS_CALL: | |
13763 | case R_ARM_THM_TLS_CALL: | |
5e681ec4 | 13764 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
13765 | { |
13766 | int tls_type, old_tls_type; | |
5e681ec4 | 13767 | |
ba93b8ac DJ |
13768 | switch (r_type) |
13769 | { | |
13770 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
b38cadfb | 13771 | |
ba93b8ac | 13772 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
b38cadfb | 13773 | |
0855e32b NS |
13774 | case R_ARM_TLS_GOTDESC: |
13775 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: | |
13776 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: | |
13777 | tls_type = GOT_TLS_GDESC; break; | |
b38cadfb | 13778 | |
ba93b8ac DJ |
13779 | default: tls_type = GOT_NORMAL; break; |
13780 | } | |
252b5132 | 13781 | |
0e1862bb | 13782 | if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE)) |
eea6dad2 KM |
13783 | info->flags |= DF_STATIC_TLS; |
13784 | ||
ba93b8ac DJ |
13785 | if (h != NULL) |
13786 | { | |
13787 | h->got.refcount++; | |
13788 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
13789 | } | |
13790 | else | |
13791 | { | |
ba93b8ac | 13792 | /* This is a global offset table entry for a local symbol. */ |
34e77a92 RS |
13793 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
13794 | return FALSE; | |
13795 | elf_local_got_refcounts (abfd)[r_symndx] += 1; | |
ba93b8ac DJ |
13796 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
13797 | } | |
13798 | ||
0855e32b | 13799 | /* If a variable is accessed with both tls methods, two |
99059e56 | 13800 | slots may be created. */ |
0855e32b NS |
13801 | if (GOT_TLS_GD_ANY_P (old_tls_type) |
13802 | && GOT_TLS_GD_ANY_P (tls_type)) | |
13803 | tls_type |= old_tls_type; | |
13804 | ||
13805 | /* We will already have issued an error message if there | |
13806 | is a TLS/non-TLS mismatch, based on the symbol | |
13807 | type. So just combine any TLS types needed. */ | |
ba93b8ac DJ |
13808 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
13809 | && tls_type != GOT_NORMAL) | |
13810 | tls_type |= old_tls_type; | |
13811 | ||
0855e32b | 13812 | /* If the symbol is accessed in both IE and GDESC |
99059e56 RM |
13813 | method, we're able to relax. Turn off the GDESC flag, |
13814 | without messing up with any other kind of tls types | |
6a631e86 | 13815 | that may be involved. */ |
0855e32b NS |
13816 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) |
13817 | tls_type &= ~GOT_TLS_GDESC; | |
13818 | ||
ba93b8ac DJ |
13819 | if (old_tls_type != tls_type) |
13820 | { | |
13821 | if (h != NULL) | |
13822 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
13823 | else | |
13824 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
13825 | } | |
13826 | } | |
8029a119 | 13827 | /* Fall through. */ |
ba93b8ac DJ |
13828 | |
13829 | case R_ARM_TLS_LDM32: | |
13830 | if (r_type == R_ARM_TLS_LDM32) | |
13831 | htab->tls_ldm_got.refcount++; | |
8029a119 | 13832 | /* Fall through. */ |
252b5132 | 13833 | |
c19d1205 | 13834 | case R_ARM_GOTOFF32: |
5e681ec4 | 13835 | case R_ARM_GOTPC: |
cbc704f3 RS |
13836 | if (htab->root.sgot == NULL |
13837 | && !create_got_section (htab->root.dynobj, info)) | |
13838 | return FALSE; | |
252b5132 RH |
13839 | break; |
13840 | ||
252b5132 | 13841 | case R_ARM_PC24: |
7359ea65 | 13842 | case R_ARM_PLT32: |
5b5bb741 PB |
13843 | case R_ARM_CALL: |
13844 | case R_ARM_JUMP24: | |
eb043451 | 13845 | case R_ARM_PREL31: |
c19d1205 | 13846 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
13847 | case R_ARM_THM_JUMP24: |
13848 | case R_ARM_THM_JUMP19: | |
f6e32f6d RS |
13849 | call_reloc_p = TRUE; |
13850 | may_need_local_target_p = TRUE; | |
13851 | break; | |
13852 | ||
13853 | case R_ARM_ABS12: | |
13854 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
13855 | ldr __GOTT_INDEX__ offsets. */ | |
13856 | if (!htab->vxworks_p) | |
13857 | { | |
13858 | may_need_local_target_p = TRUE; | |
13859 | break; | |
13860 | } | |
aebf9be7 NC |
13861 | else goto jump_over; |
13862 | ||
f6e32f6d | 13863 | /* Fall through. */ |
39623e12 | 13864 | |
96c23d59 JM |
13865 | case R_ARM_MOVW_ABS_NC: |
13866 | case R_ARM_MOVT_ABS: | |
13867 | case R_ARM_THM_MOVW_ABS_NC: | |
13868 | case R_ARM_THM_MOVT_ABS: | |
0e1862bb | 13869 | if (bfd_link_pic (info)) |
96c23d59 JM |
13870 | { |
13871 | (*_bfd_error_handler) | |
13872 | (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), | |
13873 | abfd, elf32_arm_howto_table_1[r_type].name, | |
13874 | (h) ? h->root.root.string : "a local symbol"); | |
13875 | bfd_set_error (bfd_error_bad_value); | |
13876 | return FALSE; | |
13877 | } | |
13878 | ||
13879 | /* Fall through. */ | |
39623e12 PB |
13880 | case R_ARM_ABS32: |
13881 | case R_ARM_ABS32_NOI: | |
aebf9be7 | 13882 | jump_over: |
0e1862bb | 13883 | if (h != NULL && bfd_link_executable (info)) |
97323ad1 WN |
13884 | { |
13885 | h->pointer_equality_needed = 1; | |
13886 | } | |
13887 | /* Fall through. */ | |
39623e12 PB |
13888 | case R_ARM_REL32: |
13889 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
13890 | case R_ARM_MOVW_PREL_NC: |
13891 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
13892 | case R_ARM_THM_MOVW_PREL_NC: |
13893 | case R_ARM_THM_MOVT_PREL: | |
39623e12 | 13894 | |
b7693d02 | 13895 | /* Should the interworking branches be listed here? */ |
0e1862bb | 13896 | if ((bfd_link_pic (info) || htab->root.is_relocatable_executable) |
34e77a92 RS |
13897 | && (sec->flags & SEC_ALLOC) != 0) |
13898 | { | |
13899 | if (h == NULL | |
469a3493 | 13900 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
34e77a92 RS |
13901 | { |
13902 | /* In shared libraries and relocatable executables, | |
13903 | we treat local relative references as calls; | |
13904 | see the related SYMBOL_CALLS_LOCAL code in | |
13905 | allocate_dynrelocs. */ | |
13906 | call_reloc_p = TRUE; | |
13907 | may_need_local_target_p = TRUE; | |
13908 | } | |
13909 | else | |
13910 | /* We are creating a shared library or relocatable | |
13911 | executable, and this is a reloc against a global symbol, | |
13912 | or a non-PC-relative reloc against a local symbol. | |
13913 | We may need to copy the reloc into the output. */ | |
13914 | may_become_dynamic_p = TRUE; | |
13915 | } | |
f6e32f6d RS |
13916 | else |
13917 | may_need_local_target_p = TRUE; | |
252b5132 RH |
13918 | break; |
13919 | ||
99059e56 RM |
13920 | /* This relocation describes the C++ object vtable hierarchy. |
13921 | Reconstruct it for later use during GC. */ | |
13922 | case R_ARM_GNU_VTINHERIT: | |
13923 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
13924 | return FALSE; | |
13925 | break; | |
13926 | ||
13927 | /* This relocation describes which C++ vtable entries are actually | |
13928 | used. Record for later use during GC. */ | |
13929 | case R_ARM_GNU_VTENTRY: | |
13930 | BFD_ASSERT (h != NULL); | |
13931 | if (h != NULL | |
13932 | && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
13933 | return FALSE; | |
13934 | break; | |
13935 | } | |
f6e32f6d RS |
13936 | |
13937 | if (h != NULL) | |
13938 | { | |
13939 | if (call_reloc_p) | |
13940 | /* We may need a .plt entry if the function this reloc | |
13941 | refers to is in a different object, regardless of the | |
13942 | symbol's type. We can't tell for sure yet, because | |
13943 | something later might force the symbol local. */ | |
13944 | h->needs_plt = 1; | |
13945 | else if (may_need_local_target_p) | |
13946 | /* If this reloc is in a read-only section, we might | |
13947 | need a copy reloc. We can't check reliably at this | |
13948 | stage whether the section is read-only, as input | |
13949 | sections have not yet been mapped to output sections. | |
13950 | Tentatively set the flag for now, and correct in | |
13951 | adjust_dynamic_symbol. */ | |
13952 | h->non_got_ref = 1; | |
13953 | } | |
13954 | ||
34e77a92 RS |
13955 | if (may_need_local_target_p |
13956 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) | |
f6e32f6d | 13957 | { |
34e77a92 RS |
13958 | union gotplt_union *root_plt; |
13959 | struct arm_plt_info *arm_plt; | |
13960 | struct arm_local_iplt_info *local_iplt; | |
13961 | ||
13962 | if (h != NULL) | |
13963 | { | |
13964 | root_plt = &h->plt; | |
13965 | arm_plt = &eh->plt; | |
13966 | } | |
13967 | else | |
13968 | { | |
13969 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
13970 | if (local_iplt == NULL) | |
13971 | return FALSE; | |
13972 | root_plt = &local_iplt->root; | |
13973 | arm_plt = &local_iplt->arm; | |
13974 | } | |
13975 | ||
f6e32f6d RS |
13976 | /* If the symbol is a function that doesn't bind locally, |
13977 | this relocation will need a PLT entry. */ | |
a8c887dd NC |
13978 | if (root_plt->refcount != -1) |
13979 | root_plt->refcount += 1; | |
34e77a92 RS |
13980 | |
13981 | if (!call_reloc_p) | |
13982 | arm_plt->noncall_refcount++; | |
f6e32f6d RS |
13983 | |
13984 | /* It's too early to use htab->use_blx here, so we have to | |
13985 | record possible blx references separately from | |
13986 | relocs that definitely need a thumb stub. */ | |
13987 | ||
13988 | if (r_type == R_ARM_THM_CALL) | |
34e77a92 | 13989 | arm_plt->maybe_thumb_refcount += 1; |
f6e32f6d RS |
13990 | |
13991 | if (r_type == R_ARM_THM_JUMP24 | |
13992 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 13993 | arm_plt->thumb_refcount += 1; |
f6e32f6d RS |
13994 | } |
13995 | ||
13996 | if (may_become_dynamic_p) | |
13997 | { | |
13998 | struct elf_dyn_relocs *p, **head; | |
13999 | ||
14000 | /* Create a reloc section in dynobj. */ | |
14001 | if (sreloc == NULL) | |
14002 | { | |
14003 | sreloc = _bfd_elf_make_dynamic_reloc_section | |
14004 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
14005 | ||
14006 | if (sreloc == NULL) | |
14007 | return FALSE; | |
14008 | ||
14009 | /* BPABI objects never have dynamic relocations mapped. */ | |
14010 | if (htab->symbian_p) | |
14011 | { | |
14012 | flagword flags; | |
14013 | ||
14014 | flags = bfd_get_section_flags (dynobj, sreloc); | |
14015 | flags &= ~(SEC_LOAD | SEC_ALLOC); | |
14016 | bfd_set_section_flags (dynobj, sreloc, flags); | |
14017 | } | |
14018 | } | |
14019 | ||
14020 | /* If this is a global symbol, count the number of | |
14021 | relocations we need for this symbol. */ | |
14022 | if (h != NULL) | |
14023 | head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; | |
14024 | else | |
14025 | { | |
34e77a92 RS |
14026 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
14027 | if (head == NULL) | |
f6e32f6d | 14028 | return FALSE; |
f6e32f6d RS |
14029 | } |
14030 | ||
14031 | p = *head; | |
14032 | if (p == NULL || p->sec != sec) | |
14033 | { | |
14034 | bfd_size_type amt = sizeof *p; | |
14035 | ||
14036 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); | |
14037 | if (p == NULL) | |
14038 | return FALSE; | |
14039 | p->next = *head; | |
14040 | *head = p; | |
14041 | p->sec = sec; | |
14042 | p->count = 0; | |
14043 | p->pc_count = 0; | |
14044 | } | |
14045 | ||
469a3493 | 14046 | if (elf32_arm_howto_from_type (r_type)->pc_relative) |
f6e32f6d RS |
14047 | p->pc_count += 1; |
14048 | p->count += 1; | |
14049 | } | |
252b5132 | 14050 | } |
f21f3fe0 | 14051 | |
b34976b6 | 14052 | return TRUE; |
252b5132 RH |
14053 | } |
14054 | ||
6a5bb875 PB |
14055 | /* Unwinding tables are not referenced directly. This pass marks them as |
14056 | required if the corresponding code section is marked. */ | |
14057 | ||
14058 | static bfd_boolean | |
906e58ca NC |
14059 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
14060 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
14061 | { |
14062 | bfd *sub; | |
14063 | Elf_Internal_Shdr **elf_shdrp; | |
14064 | bfd_boolean again; | |
14065 | ||
7f6ab9f8 AM |
14066 | _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); |
14067 | ||
6a5bb875 PB |
14068 | /* Marking EH data may cause additional code sections to be marked, |
14069 | requiring multiple passes. */ | |
14070 | again = TRUE; | |
14071 | while (again) | |
14072 | { | |
14073 | again = FALSE; | |
c72f2fb2 | 14074 | for (sub = info->input_bfds; sub != NULL; sub = sub->link.next) |
6a5bb875 PB |
14075 | { |
14076 | asection *o; | |
14077 | ||
0ffa91dd | 14078 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
14079 | continue; |
14080 | ||
14081 | elf_shdrp = elf_elfsections (sub); | |
14082 | for (o = sub->sections; o != NULL; o = o->next) | |
14083 | { | |
14084 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 14085 | |
6a5bb875 | 14086 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
14087 | if (hdr->sh_type == SHT_ARM_EXIDX |
14088 | && hdr->sh_link | |
14089 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
14090 | && !o->gc_mark |
14091 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
14092 | { | |
14093 | again = TRUE; | |
14094 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) | |
14095 | return FALSE; | |
14096 | } | |
14097 | } | |
14098 | } | |
14099 | } | |
14100 | ||
14101 | return TRUE; | |
14102 | } | |
14103 | ||
3c9458e9 NC |
14104 | /* Treat mapping symbols as special target symbols. */ |
14105 | ||
14106 | static bfd_boolean | |
14107 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) | |
14108 | { | |
b0796911 PB |
14109 | return bfd_is_arm_special_symbol_name (sym->name, |
14110 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
14111 | } |
14112 | ||
0367ecfb NC |
14113 | /* This is a copy of elf_find_function() from elf.c except that |
14114 | ARM mapping symbols are ignored when looking for function names | |
14115 | and STT_ARM_TFUNC is considered to a function type. */ | |
252b5132 | 14116 | |
0367ecfb NC |
14117 | static bfd_boolean |
14118 | arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, | |
0367ecfb | 14119 | asymbol ** symbols, |
fb167eb2 | 14120 | asection * section, |
0367ecfb NC |
14121 | bfd_vma offset, |
14122 | const char ** filename_ptr, | |
14123 | const char ** functionname_ptr) | |
14124 | { | |
14125 | const char * filename = NULL; | |
14126 | asymbol * func = NULL; | |
14127 | bfd_vma low_func = 0; | |
14128 | asymbol ** p; | |
252b5132 RH |
14129 | |
14130 | for (p = symbols; *p != NULL; p++) | |
14131 | { | |
14132 | elf_symbol_type *q; | |
14133 | ||
14134 | q = (elf_symbol_type *) *p; | |
14135 | ||
252b5132 RH |
14136 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
14137 | { | |
14138 | default: | |
14139 | break; | |
14140 | case STT_FILE: | |
14141 | filename = bfd_asymbol_name (&q->symbol); | |
14142 | break; | |
252b5132 RH |
14143 | case STT_FUNC: |
14144 | case STT_ARM_TFUNC: | |
9d2da7ca | 14145 | case STT_NOTYPE: |
b0796911 | 14146 | /* Skip mapping symbols. */ |
0367ecfb | 14147 | if ((q->symbol.flags & BSF_LOCAL) |
b0796911 PB |
14148 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
14149 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
0367ecfb NC |
14150 | continue; |
14151 | /* Fall through. */ | |
6b40fcba | 14152 | if (bfd_get_section (&q->symbol) == section |
252b5132 RH |
14153 | && q->symbol.value >= low_func |
14154 | && q->symbol.value <= offset) | |
14155 | { | |
14156 | func = (asymbol *) q; | |
14157 | low_func = q->symbol.value; | |
14158 | } | |
14159 | break; | |
14160 | } | |
14161 | } | |
14162 | ||
14163 | if (func == NULL) | |
b34976b6 | 14164 | return FALSE; |
252b5132 | 14165 | |
0367ecfb NC |
14166 | if (filename_ptr) |
14167 | *filename_ptr = filename; | |
14168 | if (functionname_ptr) | |
14169 | *functionname_ptr = bfd_asymbol_name (func); | |
14170 | ||
14171 | return TRUE; | |
906e58ca | 14172 | } |
0367ecfb NC |
14173 | |
14174 | ||
14175 | /* Find the nearest line to a particular section and offset, for error | |
14176 | reporting. This code is a duplicate of the code in elf.c, except | |
14177 | that it uses arm_elf_find_function. */ | |
14178 | ||
14179 | static bfd_boolean | |
14180 | elf32_arm_find_nearest_line (bfd * abfd, | |
0367ecfb | 14181 | asymbol ** symbols, |
fb167eb2 | 14182 | asection * section, |
0367ecfb NC |
14183 | bfd_vma offset, |
14184 | const char ** filename_ptr, | |
14185 | const char ** functionname_ptr, | |
fb167eb2 AM |
14186 | unsigned int * line_ptr, |
14187 | unsigned int * discriminator_ptr) | |
0367ecfb NC |
14188 | { |
14189 | bfd_boolean found = FALSE; | |
14190 | ||
fb167eb2 | 14191 | if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset, |
0367ecfb | 14192 | filename_ptr, functionname_ptr, |
fb167eb2 AM |
14193 | line_ptr, discriminator_ptr, |
14194 | dwarf_debug_sections, 0, | |
0367ecfb NC |
14195 | & elf_tdata (abfd)->dwarf2_find_line_info)) |
14196 | { | |
14197 | if (!*functionname_ptr) | |
fb167eb2 | 14198 | arm_elf_find_function (abfd, symbols, section, offset, |
0367ecfb NC |
14199 | *filename_ptr ? NULL : filename_ptr, |
14200 | functionname_ptr); | |
f21f3fe0 | 14201 | |
0367ecfb NC |
14202 | return TRUE; |
14203 | } | |
14204 | ||
fb167eb2 AM |
14205 | /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain |
14206 | uses DWARF1. */ | |
14207 | ||
0367ecfb NC |
14208 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, |
14209 | & found, filename_ptr, | |
14210 | functionname_ptr, line_ptr, | |
14211 | & elf_tdata (abfd)->line_info)) | |
14212 | return FALSE; | |
14213 | ||
14214 | if (found && (*functionname_ptr || *line_ptr)) | |
14215 | return TRUE; | |
14216 | ||
14217 | if (symbols == NULL) | |
14218 | return FALSE; | |
14219 | ||
fb167eb2 | 14220 | if (! arm_elf_find_function (abfd, symbols, section, offset, |
0367ecfb NC |
14221 | filename_ptr, functionname_ptr)) |
14222 | return FALSE; | |
14223 | ||
14224 | *line_ptr = 0; | |
b34976b6 | 14225 | return TRUE; |
252b5132 RH |
14226 | } |
14227 | ||
4ab527b0 FF |
14228 | static bfd_boolean |
14229 | elf32_arm_find_inliner_info (bfd * abfd, | |
14230 | const char ** filename_ptr, | |
14231 | const char ** functionname_ptr, | |
14232 | unsigned int * line_ptr) | |
14233 | { | |
14234 | bfd_boolean found; | |
14235 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, | |
14236 | functionname_ptr, line_ptr, | |
14237 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
14238 | return found; | |
14239 | } | |
14240 | ||
252b5132 RH |
14241 | /* Adjust a symbol defined by a dynamic object and referenced by a |
14242 | regular object. The current definition is in some section of the | |
14243 | dynamic object, but we're not including those sections. We have to | |
14244 | change the definition to something the rest of the link can | |
14245 | understand. */ | |
14246 | ||
b34976b6 | 14247 | static bfd_boolean |
57e8b36a NC |
14248 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
14249 | struct elf_link_hash_entry * h) | |
252b5132 RH |
14250 | { |
14251 | bfd * dynobj; | |
14252 | asection * s; | |
b7693d02 | 14253 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 14254 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 14255 | |
67687978 | 14256 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
14257 | if (globals == NULL) |
14258 | return FALSE; | |
14259 | ||
252b5132 RH |
14260 | dynobj = elf_hash_table (info)->dynobj; |
14261 | ||
14262 | /* Make sure we know what is going on here. */ | |
14263 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 14264 | && (h->needs_plt |
34e77a92 | 14265 | || h->type == STT_GNU_IFUNC |
f6e332e6 | 14266 | || h->u.weakdef != NULL |
f5385ebf AM |
14267 | || (h->def_dynamic |
14268 | && h->ref_regular | |
14269 | && !h->def_regular))); | |
252b5132 | 14270 | |
b7693d02 DJ |
14271 | eh = (struct elf32_arm_link_hash_entry *) h; |
14272 | ||
252b5132 RH |
14273 | /* If this is a function, put it in the procedure linkage table. We |
14274 | will fill in the contents of the procedure linkage table later, | |
14275 | when we know the address of the .got section. */ | |
34e77a92 | 14276 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
252b5132 | 14277 | { |
34e77a92 RS |
14278 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
14279 | symbol binds locally. */ | |
5e681ec4 | 14280 | if (h->plt.refcount <= 0 |
34e77a92 RS |
14281 | || (h->type != STT_GNU_IFUNC |
14282 | && (SYMBOL_CALLS_LOCAL (info, h) | |
14283 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
14284 | && h->root.type == bfd_link_hash_undefweak)))) | |
252b5132 RH |
14285 | { |
14286 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
14287 | file, but the symbol was never referred to by a dynamic |
14288 | object, or if all references were garbage collected. In | |
14289 | such a case, we don't actually need to build a procedure | |
14290 | linkage table, and we can just do a PC24 reloc instead. */ | |
14291 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
14292 | eh->plt.thumb_refcount = 0; |
14293 | eh->plt.maybe_thumb_refcount = 0; | |
14294 | eh->plt.noncall_refcount = 0; | |
f5385ebf | 14295 | h->needs_plt = 0; |
252b5132 RH |
14296 | } |
14297 | ||
b34976b6 | 14298 | return TRUE; |
252b5132 | 14299 | } |
5e681ec4 | 14300 | else |
b7693d02 DJ |
14301 | { |
14302 | /* It's possible that we incorrectly decided a .plt reloc was | |
14303 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
14304 | in check_relocs. We can't decide accurately between function | |
14305 | and non-function syms in check-relocs; Objects loaded later in | |
14306 | the link may change h->type. So fix it now. */ | |
14307 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
14308 | eh->plt.thumb_refcount = 0; |
14309 | eh->plt.maybe_thumb_refcount = 0; | |
14310 | eh->plt.noncall_refcount = 0; | |
b7693d02 | 14311 | } |
252b5132 RH |
14312 | |
14313 | /* If this is a weak symbol, and there is a real definition, the | |
14314 | processor independent code will have arranged for us to see the | |
14315 | real definition first, and we can just use the same value. */ | |
f6e332e6 | 14316 | if (h->u.weakdef != NULL) |
252b5132 | 14317 | { |
f6e332e6 AM |
14318 | BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined |
14319 | || h->u.weakdef->root.type == bfd_link_hash_defweak); | |
14320 | h->root.u.def.section = h->u.weakdef->root.u.def.section; | |
14321 | h->root.u.def.value = h->u.weakdef->root.u.def.value; | |
b34976b6 | 14322 | return TRUE; |
252b5132 RH |
14323 | } |
14324 | ||
ba93b8ac DJ |
14325 | /* If there are no non-GOT references, we do not need a copy |
14326 | relocation. */ | |
14327 | if (!h->non_got_ref) | |
14328 | return TRUE; | |
14329 | ||
252b5132 RH |
14330 | /* This is a reference to a symbol defined by a dynamic object which |
14331 | is not a function. */ | |
14332 | ||
14333 | /* If we are creating a shared library, we must presume that the | |
14334 | only references to the symbol are via the global offset table. | |
14335 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
14336 | be handled correctly by relocate_section. Relocatable executables |
14337 | can reference data in shared objects directly, so we don't need to | |
14338 | do anything here. */ | |
0e1862bb | 14339 | if (bfd_link_pic (info) || globals->root.is_relocatable_executable) |
b34976b6 | 14340 | return TRUE; |
252b5132 RH |
14341 | |
14342 | /* We must allocate the symbol in our .dynbss section, which will | |
14343 | become part of the .bss section of the executable. There will be | |
14344 | an entry for this symbol in the .dynsym section. The dynamic | |
14345 | object will contain position independent code, so all references | |
14346 | from the dynamic object to this symbol will go through the global | |
14347 | offset table. The dynamic linker will use the .dynsym entry to | |
14348 | determine the address it must put in the global offset table, so | |
14349 | both the dynamic object and the regular object will refer to the | |
14350 | same memory location for the variable. */ | |
3d4d4302 | 14351 | s = bfd_get_linker_section (dynobj, ".dynbss"); |
252b5132 RH |
14352 | BFD_ASSERT (s != NULL); |
14353 | ||
5522f910 NC |
14354 | /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic |
14355 | linker to copy the initial value out of the dynamic object and into | |
14356 | the runtime process image. We need to remember the offset into the | |
00a97672 | 14357 | .rel(a).bss section we are going to use. */ |
5522f910 NC |
14358 | if (info->nocopyreloc == 0 |
14359 | && (h->root.u.def.section->flags & SEC_ALLOC) != 0 | |
5522f910 | 14360 | && h->size != 0) |
252b5132 RH |
14361 | { |
14362 | asection *srel; | |
14363 | ||
3d4d4302 | 14364 | srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss")); |
47beaa6a | 14365 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
f5385ebf | 14366 | h->needs_copy = 1; |
252b5132 RH |
14367 | } |
14368 | ||
6cabe1ea | 14369 | return _bfd_elf_adjust_dynamic_copy (info, h, s); |
252b5132 RH |
14370 | } |
14371 | ||
5e681ec4 PB |
14372 | /* Allocate space in .plt, .got and associated reloc sections for |
14373 | dynamic relocs. */ | |
14374 | ||
14375 | static bfd_boolean | |
47beaa6a | 14376 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
14377 | { |
14378 | struct bfd_link_info *info; | |
14379 | struct elf32_arm_link_hash_table *htab; | |
14380 | struct elf32_arm_link_hash_entry *eh; | |
0bdcacaf | 14381 | struct elf_dyn_relocs *p; |
5e681ec4 PB |
14382 | |
14383 | if (h->root.type == bfd_link_hash_indirect) | |
14384 | return TRUE; | |
14385 | ||
e6a6bb22 AM |
14386 | eh = (struct elf32_arm_link_hash_entry *) h; |
14387 | ||
5e681ec4 PB |
14388 | info = (struct bfd_link_info *) inf; |
14389 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
14390 | if (htab == NULL) |
14391 | return FALSE; | |
5e681ec4 | 14392 | |
34e77a92 | 14393 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
5e681ec4 PB |
14394 | && h->plt.refcount > 0) |
14395 | { | |
14396 | /* Make sure this symbol is output as a dynamic symbol. | |
14397 | Undefined weak syms won't yet be marked as dynamic. */ | |
14398 | if (h->dynindx == -1 | |
f5385ebf | 14399 | && !h->forced_local) |
5e681ec4 | 14400 | { |
c152c796 | 14401 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
14402 | return FALSE; |
14403 | } | |
14404 | ||
34e77a92 RS |
14405 | /* If the call in the PLT entry binds locally, the associated |
14406 | GOT entry should use an R_ARM_IRELATIVE relocation instead of | |
14407 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather | |
14408 | than the .plt section. */ | |
14409 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) | |
14410 | { | |
14411 | eh->is_iplt = 1; | |
14412 | if (eh->plt.noncall_refcount == 0 | |
14413 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
14414 | /* All non-call references can be resolved directly. | |
14415 | This means that they can (and in some cases, must) | |
14416 | resolve directly to the run-time target, rather than | |
14417 | to the PLT. That in turns means that any .got entry | |
14418 | would be equal to the .igot.plt entry, so there's | |
14419 | no point having both. */ | |
14420 | h->got.refcount = 0; | |
14421 | } | |
14422 | ||
0e1862bb | 14423 | if (bfd_link_pic (info) |
34e77a92 | 14424 | || eh->is_iplt |
7359ea65 | 14425 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 | 14426 | { |
34e77a92 | 14427 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
b7693d02 | 14428 | |
5e681ec4 PB |
14429 | /* If this symbol is not defined in a regular file, and we are |
14430 | not generating a shared library, then set the symbol to this | |
14431 | location in the .plt. This is required to make function | |
14432 | pointers compare as equal between the normal executable and | |
14433 | the shared library. */ | |
0e1862bb | 14434 | if (! bfd_link_pic (info) |
f5385ebf | 14435 | && !h->def_regular) |
5e681ec4 | 14436 | { |
34e77a92 | 14437 | h->root.u.def.section = htab->root.splt; |
5e681ec4 | 14438 | h->root.u.def.value = h->plt.offset; |
5e681ec4 | 14439 | |
67d74e43 DJ |
14440 | /* Make sure the function is not marked as Thumb, in case |
14441 | it is the target of an ABS32 relocation, which will | |
14442 | point to the PLT entry. */ | |
39d911fc | 14443 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
67d74e43 | 14444 | } |
022f8312 | 14445 | |
00a97672 RS |
14446 | /* VxWorks executables have a second set of relocations for |
14447 | each PLT entry. They go in a separate relocation section, | |
14448 | which is processed by the kernel loader. */ | |
0e1862bb | 14449 | if (htab->vxworks_p && !bfd_link_pic (info)) |
00a97672 RS |
14450 | { |
14451 | /* There is a relocation for the initial PLT entry: | |
14452 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
14453 | if (h->plt.offset == htab->plt_header_size) | |
47beaa6a | 14454 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
00a97672 RS |
14455 | |
14456 | /* There are two extra relocations for each subsequent | |
14457 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
14458 | and an R_ARM_32 relocation for the PLT entry. */ | |
47beaa6a | 14459 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
00a97672 | 14460 | } |
5e681ec4 PB |
14461 | } |
14462 | else | |
14463 | { | |
14464 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 14465 | h->needs_plt = 0; |
5e681ec4 PB |
14466 | } |
14467 | } | |
14468 | else | |
14469 | { | |
14470 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 14471 | h->needs_plt = 0; |
5e681ec4 PB |
14472 | } |
14473 | ||
0855e32b NS |
14474 | eh = (struct elf32_arm_link_hash_entry *) h; |
14475 | eh->tlsdesc_got = (bfd_vma) -1; | |
14476 | ||
5e681ec4 PB |
14477 | if (h->got.refcount > 0) |
14478 | { | |
14479 | asection *s; | |
14480 | bfd_boolean dyn; | |
ba93b8ac DJ |
14481 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
14482 | int indx; | |
5e681ec4 PB |
14483 | |
14484 | /* Make sure this symbol is output as a dynamic symbol. | |
14485 | Undefined weak syms won't yet be marked as dynamic. */ | |
14486 | if (h->dynindx == -1 | |
f5385ebf | 14487 | && !h->forced_local) |
5e681ec4 | 14488 | { |
c152c796 | 14489 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
14490 | return FALSE; |
14491 | } | |
14492 | ||
e5a52504 MM |
14493 | if (!htab->symbian_p) |
14494 | { | |
362d30a1 | 14495 | s = htab->root.sgot; |
e5a52504 | 14496 | h->got.offset = s->size; |
ba93b8ac DJ |
14497 | |
14498 | if (tls_type == GOT_UNKNOWN) | |
14499 | abort (); | |
14500 | ||
14501 | if (tls_type == GOT_NORMAL) | |
14502 | /* Non-TLS symbols need one GOT slot. */ | |
14503 | s->size += 4; | |
14504 | else | |
14505 | { | |
99059e56 RM |
14506 | if (tls_type & GOT_TLS_GDESC) |
14507 | { | |
0855e32b | 14508 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ |
99059e56 | 14509 | eh->tlsdesc_got |
0855e32b NS |
14510 | = (htab->root.sgotplt->size |
14511 | - elf32_arm_compute_jump_table_size (htab)); | |
99059e56 RM |
14512 | htab->root.sgotplt->size += 8; |
14513 | h->got.offset = (bfd_vma) -2; | |
34e77a92 | 14514 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 14515 | reloc in the middle of .got.plt. */ |
99059e56 RM |
14516 | htab->num_tls_desc++; |
14517 | } | |
0855e32b | 14518 | |
ba93b8ac | 14519 | if (tls_type & GOT_TLS_GD) |
0855e32b NS |
14520 | { |
14521 | /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If | |
14522 | the symbol is both GD and GDESC, got.offset may | |
14523 | have been overwritten. */ | |
14524 | h->got.offset = s->size; | |
14525 | s->size += 8; | |
14526 | } | |
14527 | ||
ba93b8ac DJ |
14528 | if (tls_type & GOT_TLS_IE) |
14529 | /* R_ARM_TLS_IE32 needs one GOT slot. */ | |
14530 | s->size += 4; | |
14531 | } | |
14532 | ||
e5a52504 | 14533 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac DJ |
14534 | |
14535 | indx = 0; | |
0e1862bb L |
14536 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
14537 | bfd_link_pic (info), | |
14538 | h) | |
14539 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
14540 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
14541 | indx = h->dynindx; | |
14542 | ||
14543 | if (tls_type != GOT_NORMAL | |
0e1862bb | 14544 | && (bfd_link_pic (info) || indx != 0) |
ba93b8ac DJ |
14545 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
14546 | || h->root.type != bfd_link_hash_undefweak)) | |
14547 | { | |
14548 | if (tls_type & GOT_TLS_IE) | |
47beaa6a | 14549 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
14550 | |
14551 | if (tls_type & GOT_TLS_GD) | |
47beaa6a | 14552 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 14553 | |
b38cadfb | 14554 | if (tls_type & GOT_TLS_GDESC) |
0855e32b | 14555 | { |
47beaa6a | 14556 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
0855e32b NS |
14557 | /* GDESC needs a trampoline to jump to. */ |
14558 | htab->tls_trampoline = -1; | |
14559 | } | |
14560 | ||
14561 | /* Only GD needs it. GDESC just emits one relocation per | |
14562 | 2 entries. */ | |
b38cadfb | 14563 | if ((tls_type & GOT_TLS_GD) && indx != 0) |
47beaa6a | 14564 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 14565 | } |
6f820c85 | 14566 | else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h)) |
b436d854 RS |
14567 | { |
14568 | if (htab->root.dynamic_sections_created) | |
14569 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ | |
14570 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
14571 | } | |
34e77a92 RS |
14572 | else if (h->type == STT_GNU_IFUNC |
14573 | && eh->plt.noncall_refcount == 0) | |
14574 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; | |
14575 | they all resolve dynamically instead. Reserve room for the | |
14576 | GOT entry's R_ARM_IRELATIVE relocation. */ | |
14577 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); | |
0e1862bb L |
14578 | else if (bfd_link_pic (info) |
14579 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
14580 | || h->root.type != bfd_link_hash_undefweak)) | |
b436d854 | 14581 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ |
47beaa6a | 14582 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e5a52504 | 14583 | } |
5e681ec4 PB |
14584 | } |
14585 | else | |
14586 | h->got.offset = (bfd_vma) -1; | |
14587 | ||
a4fd1a8e PB |
14588 | /* Allocate stubs for exported Thumb functions on v4t. */ |
14589 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 14590 | && h->def_regular |
39d911fc | 14591 | && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB |
a4fd1a8e PB |
14592 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
14593 | { | |
14594 | struct elf_link_hash_entry * th; | |
14595 | struct bfd_link_hash_entry * bh; | |
14596 | struct elf_link_hash_entry * myh; | |
14597 | char name[1024]; | |
14598 | asection *s; | |
14599 | bh = NULL; | |
14600 | /* Create a new symbol to regist the real location of the function. */ | |
14601 | s = h->root.u.def.section; | |
906e58ca | 14602 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
14603 | _bfd_generic_link_add_one_symbol (info, s->owner, |
14604 | name, BSF_GLOBAL, s, | |
14605 | h->root.u.def.value, | |
14606 | NULL, TRUE, FALSE, &bh); | |
14607 | ||
14608 | myh = (struct elf_link_hash_entry *) bh; | |
35fc36a8 | 14609 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
a4fd1a8e | 14610 | myh->forced_local = 1; |
39d911fc | 14611 | ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB); |
a4fd1a8e PB |
14612 | eh->export_glue = myh; |
14613 | th = record_arm_to_thumb_glue (info, h); | |
14614 | /* Point the symbol at the stub. */ | |
14615 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
39d911fc | 14616 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
a4fd1a8e PB |
14617 | h->root.u.def.section = th->root.u.def.section; |
14618 | h->root.u.def.value = th->root.u.def.value & ~1; | |
14619 | } | |
14620 | ||
0bdcacaf | 14621 | if (eh->dyn_relocs == NULL) |
5e681ec4 PB |
14622 | return TRUE; |
14623 | ||
14624 | /* In the shared -Bsymbolic case, discard space allocated for | |
14625 | dynamic pc-relative relocs against symbols which turn out to be | |
14626 | defined in regular objects. For the normal shared case, discard | |
14627 | space for pc-relative relocs that have become local due to symbol | |
14628 | visibility changes. */ | |
14629 | ||
0e1862bb | 14630 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable) |
5e681ec4 | 14631 | { |
469a3493 RM |
14632 | /* Relocs that use pc_count are PC-relative forms, which will appear |
14633 | on something like ".long foo - ." or "movw REG, foo - .". We want | |
14634 | calls to protected symbols to resolve directly to the function | |
14635 | rather than going via the plt. If people want function pointer | |
14636 | comparisons to work as expected then they should avoid writing | |
14637 | assembly like ".long foo - .". */ | |
ba93b8ac DJ |
14638 | if (SYMBOL_CALLS_LOCAL (info, h)) |
14639 | { | |
0bdcacaf | 14640 | struct elf_dyn_relocs **pp; |
ba93b8ac | 14641 | |
0bdcacaf | 14642 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
ba93b8ac DJ |
14643 | { |
14644 | p->count -= p->pc_count; | |
14645 | p->pc_count = 0; | |
14646 | if (p->count == 0) | |
14647 | *pp = p->next; | |
14648 | else | |
14649 | pp = &p->next; | |
14650 | } | |
14651 | } | |
14652 | ||
4dfe6ac6 | 14653 | if (htab->vxworks_p) |
3348747a | 14654 | { |
0bdcacaf | 14655 | struct elf_dyn_relocs **pp; |
3348747a | 14656 | |
0bdcacaf | 14657 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
3348747a | 14658 | { |
0bdcacaf | 14659 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
3348747a NS |
14660 | *pp = p->next; |
14661 | else | |
14662 | pp = &p->next; | |
14663 | } | |
14664 | } | |
14665 | ||
ba93b8ac | 14666 | /* Also discard relocs on undefined weak syms with non-default |
99059e56 | 14667 | visibility. */ |
0bdcacaf | 14668 | if (eh->dyn_relocs != NULL |
5e681ec4 | 14669 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 AM |
14670 | { |
14671 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) | |
0bdcacaf | 14672 | eh->dyn_relocs = NULL; |
22d606e9 AM |
14673 | |
14674 | /* Make sure undefined weak symbols are output as a dynamic | |
14675 | symbol in PIEs. */ | |
14676 | else if (h->dynindx == -1 | |
14677 | && !h->forced_local) | |
14678 | { | |
14679 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
14680 | return FALSE; | |
14681 | } | |
14682 | } | |
14683 | ||
67687978 PB |
14684 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
14685 | && h->root.type == bfd_link_hash_new) | |
14686 | { | |
14687 | /* Output absolute symbols so that we can create relocations | |
14688 | against them. For normal symbols we output a relocation | |
14689 | against the section that contains them. */ | |
14690 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
14691 | return FALSE; | |
14692 | } | |
14693 | ||
5e681ec4 PB |
14694 | } |
14695 | else | |
14696 | { | |
14697 | /* For the non-shared case, discard space for relocs against | |
14698 | symbols which turn out to need copy relocs or are not | |
14699 | dynamic. */ | |
14700 | ||
f5385ebf AM |
14701 | if (!h->non_got_ref |
14702 | && ((h->def_dynamic | |
14703 | && !h->def_regular) | |
5e681ec4 PB |
14704 | || (htab->root.dynamic_sections_created |
14705 | && (h->root.type == bfd_link_hash_undefweak | |
14706 | || h->root.type == bfd_link_hash_undefined)))) | |
14707 | { | |
14708 | /* Make sure this symbol is output as a dynamic symbol. | |
14709 | Undefined weak syms won't yet be marked as dynamic. */ | |
14710 | if (h->dynindx == -1 | |
f5385ebf | 14711 | && !h->forced_local) |
5e681ec4 | 14712 | { |
c152c796 | 14713 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
14714 | return FALSE; |
14715 | } | |
14716 | ||
14717 | /* If that succeeded, we know we'll be keeping all the | |
14718 | relocs. */ | |
14719 | if (h->dynindx != -1) | |
14720 | goto keep; | |
14721 | } | |
14722 | ||
0bdcacaf | 14723 | eh->dyn_relocs = NULL; |
5e681ec4 PB |
14724 | |
14725 | keep: ; | |
14726 | } | |
14727 | ||
14728 | /* Finally, allocate space. */ | |
0bdcacaf | 14729 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
5e681ec4 | 14730 | { |
0bdcacaf | 14731 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
34e77a92 RS |
14732 | if (h->type == STT_GNU_IFUNC |
14733 | && eh->plt.noncall_refcount == 0 | |
14734 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
14735 | elf32_arm_allocate_irelocs (info, sreloc, p->count); | |
14736 | else | |
14737 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
5e681ec4 PB |
14738 | } |
14739 | ||
14740 | return TRUE; | |
14741 | } | |
14742 | ||
08d1f311 DJ |
14743 | /* Find any dynamic relocs that apply to read-only sections. */ |
14744 | ||
14745 | static bfd_boolean | |
8029a119 | 14746 | elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) |
08d1f311 | 14747 | { |
8029a119 | 14748 | struct elf32_arm_link_hash_entry * eh; |
0bdcacaf | 14749 | struct elf_dyn_relocs * p; |
08d1f311 | 14750 | |
08d1f311 | 14751 | eh = (struct elf32_arm_link_hash_entry *) h; |
0bdcacaf | 14752 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
08d1f311 | 14753 | { |
0bdcacaf | 14754 | asection *s = p->sec; |
08d1f311 DJ |
14755 | |
14756 | if (s != NULL && (s->flags & SEC_READONLY) != 0) | |
14757 | { | |
14758 | struct bfd_link_info *info = (struct bfd_link_info *) inf; | |
14759 | ||
14760 | info->flags |= DF_TEXTREL; | |
14761 | ||
14762 | /* Not an error, just cut short the traversal. */ | |
14763 | return FALSE; | |
14764 | } | |
14765 | } | |
14766 | return TRUE; | |
14767 | } | |
14768 | ||
d504ffc8 DJ |
14769 | void |
14770 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
14771 | int byteswap_code) | |
14772 | { | |
14773 | struct elf32_arm_link_hash_table *globals; | |
14774 | ||
14775 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
14776 | if (globals == NULL) |
14777 | return; | |
14778 | ||
d504ffc8 DJ |
14779 | globals->byteswap_code = byteswap_code; |
14780 | } | |
14781 | ||
252b5132 RH |
14782 | /* Set the sizes of the dynamic sections. */ |
14783 | ||
b34976b6 | 14784 | static bfd_boolean |
57e8b36a NC |
14785 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
14786 | struct bfd_link_info * info) | |
252b5132 RH |
14787 | { |
14788 | bfd * dynobj; | |
14789 | asection * s; | |
b34976b6 AM |
14790 | bfd_boolean plt; |
14791 | bfd_boolean relocs; | |
5e681ec4 PB |
14792 | bfd *ibfd; |
14793 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 14794 | |
5e681ec4 | 14795 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
14796 | if (htab == NULL) |
14797 | return FALSE; | |
14798 | ||
252b5132 RH |
14799 | dynobj = elf_hash_table (info)->dynobj; |
14800 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 14801 | check_use_blx (htab); |
252b5132 RH |
14802 | |
14803 | if (elf_hash_table (info)->dynamic_sections_created) | |
14804 | { | |
14805 | /* Set the contents of the .interp section to the interpreter. */ | |
9b8b325a | 14806 | if (bfd_link_executable (info) && !info->nointerp) |
252b5132 | 14807 | { |
3d4d4302 | 14808 | s = bfd_get_linker_section (dynobj, ".interp"); |
252b5132 | 14809 | BFD_ASSERT (s != NULL); |
eea6121a | 14810 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
14811 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
14812 | } | |
14813 | } | |
5e681ec4 PB |
14814 | |
14815 | /* Set up .got offsets for local syms, and space for local dynamic | |
14816 | relocs. */ | |
c72f2fb2 | 14817 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
252b5132 | 14818 | { |
5e681ec4 PB |
14819 | bfd_signed_vma *local_got; |
14820 | bfd_signed_vma *end_local_got; | |
34e77a92 | 14821 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
5e681ec4 | 14822 | char *local_tls_type; |
0855e32b | 14823 | bfd_vma *local_tlsdesc_gotent; |
5e681ec4 PB |
14824 | bfd_size_type locsymcount; |
14825 | Elf_Internal_Shdr *symtab_hdr; | |
14826 | asection *srel; | |
4dfe6ac6 | 14827 | bfd_boolean is_vxworks = htab->vxworks_p; |
34e77a92 | 14828 | unsigned int symndx; |
5e681ec4 | 14829 | |
0ffa91dd | 14830 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
14831 | continue; |
14832 | ||
14833 | for (s = ibfd->sections; s != NULL; s = s->next) | |
14834 | { | |
0bdcacaf | 14835 | struct elf_dyn_relocs *p; |
5e681ec4 | 14836 | |
0bdcacaf | 14837 | for (p = (struct elf_dyn_relocs *) |
99059e56 | 14838 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
5e681ec4 | 14839 | { |
0bdcacaf RS |
14840 | if (!bfd_is_abs_section (p->sec) |
14841 | && bfd_is_abs_section (p->sec->output_section)) | |
5e681ec4 PB |
14842 | { |
14843 | /* Input section has been discarded, either because | |
14844 | it is a copy of a linkonce section or due to | |
14845 | linker script /DISCARD/, so we'll be discarding | |
14846 | the relocs too. */ | |
14847 | } | |
3348747a | 14848 | else if (is_vxworks |
0bdcacaf | 14849 | && strcmp (p->sec->output_section->name, |
3348747a NS |
14850 | ".tls_vars") == 0) |
14851 | { | |
14852 | /* Relocations in vxworks .tls_vars sections are | |
14853 | handled specially by the loader. */ | |
14854 | } | |
5e681ec4 PB |
14855 | else if (p->count != 0) |
14856 | { | |
0bdcacaf | 14857 | srel = elf_section_data (p->sec)->sreloc; |
47beaa6a | 14858 | elf32_arm_allocate_dynrelocs (info, srel, p->count); |
0bdcacaf | 14859 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
5e681ec4 PB |
14860 | info->flags |= DF_TEXTREL; |
14861 | } | |
14862 | } | |
14863 | } | |
14864 | ||
14865 | local_got = elf_local_got_refcounts (ibfd); | |
14866 | if (!local_got) | |
14867 | continue; | |
14868 | ||
0ffa91dd | 14869 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
14870 | locsymcount = symtab_hdr->sh_info; |
14871 | end_local_got = local_got + locsymcount; | |
34e77a92 | 14872 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
ba93b8ac | 14873 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
0855e32b | 14874 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
34e77a92 | 14875 | symndx = 0; |
362d30a1 RS |
14876 | s = htab->root.sgot; |
14877 | srel = htab->root.srelgot; | |
0855e32b | 14878 | for (; local_got < end_local_got; |
34e77a92 RS |
14879 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
14880 | ++local_tlsdesc_gotent, ++symndx) | |
5e681ec4 | 14881 | { |
0855e32b | 14882 | *local_tlsdesc_gotent = (bfd_vma) -1; |
34e77a92 RS |
14883 | local_iplt = *local_iplt_ptr; |
14884 | if (local_iplt != NULL) | |
14885 | { | |
14886 | struct elf_dyn_relocs *p; | |
14887 | ||
14888 | if (local_iplt->root.refcount > 0) | |
14889 | { | |
14890 | elf32_arm_allocate_plt_entry (info, TRUE, | |
14891 | &local_iplt->root, | |
14892 | &local_iplt->arm); | |
14893 | if (local_iplt->arm.noncall_refcount == 0) | |
14894 | /* All references to the PLT are calls, so all | |
14895 | non-call references can resolve directly to the | |
14896 | run-time target. This means that the .got entry | |
14897 | would be the same as the .igot.plt entry, so there's | |
14898 | no point creating both. */ | |
14899 | *local_got = 0; | |
14900 | } | |
14901 | else | |
14902 | { | |
14903 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); | |
14904 | local_iplt->root.offset = (bfd_vma) -1; | |
14905 | } | |
14906 | ||
14907 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) | |
14908 | { | |
14909 | asection *psrel; | |
14910 | ||
14911 | psrel = elf_section_data (p->sec)->sreloc; | |
14912 | if (local_iplt->arm.noncall_refcount == 0) | |
14913 | elf32_arm_allocate_irelocs (info, psrel, p->count); | |
14914 | else | |
14915 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); | |
14916 | } | |
14917 | } | |
5e681ec4 PB |
14918 | if (*local_got > 0) |
14919 | { | |
34e77a92 RS |
14920 | Elf_Internal_Sym *isym; |
14921 | ||
eea6121a | 14922 | *local_got = s->size; |
ba93b8ac DJ |
14923 | if (*local_tls_type & GOT_TLS_GD) |
14924 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
14925 | s->size += 8; | |
0855e32b NS |
14926 | if (*local_tls_type & GOT_TLS_GDESC) |
14927 | { | |
14928 | *local_tlsdesc_gotent = htab->root.sgotplt->size | |
14929 | - elf32_arm_compute_jump_table_size (htab); | |
14930 | htab->root.sgotplt->size += 8; | |
14931 | *local_got = (bfd_vma) -2; | |
34e77a92 | 14932 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 14933 | reloc in the middle of .got.plt. */ |
99059e56 | 14934 | htab->num_tls_desc++; |
0855e32b | 14935 | } |
ba93b8ac DJ |
14936 | if (*local_tls_type & GOT_TLS_IE) |
14937 | s->size += 4; | |
ba93b8ac | 14938 | |
0855e32b NS |
14939 | if (*local_tls_type & GOT_NORMAL) |
14940 | { | |
14941 | /* If the symbol is both GD and GDESC, *local_got | |
14942 | may have been overwritten. */ | |
14943 | *local_got = s->size; | |
14944 | s->size += 4; | |
14945 | } | |
14946 | ||
34e77a92 RS |
14947 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); |
14948 | if (isym == NULL) | |
14949 | return FALSE; | |
14950 | ||
14951 | /* If all references to an STT_GNU_IFUNC PLT are calls, | |
14952 | then all non-call references, including this GOT entry, | |
14953 | resolve directly to the run-time target. */ | |
14954 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC | |
14955 | && (local_iplt == NULL | |
14956 | || local_iplt->arm.noncall_refcount == 0)) | |
14957 | elf32_arm_allocate_irelocs (info, srel, 1); | |
0e1862bb | 14958 | else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC) |
0855e32b | 14959 | { |
0e1862bb | 14960 | if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)) |
3064e1ff JB |
14961 | || *local_tls_type & GOT_TLS_GD) |
14962 | elf32_arm_allocate_dynrelocs (info, srel, 1); | |
99059e56 | 14963 | |
0e1862bb | 14964 | if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC) |
3064e1ff JB |
14965 | { |
14966 | elf32_arm_allocate_dynrelocs (info, | |
14967 | htab->root.srelplt, 1); | |
14968 | htab->tls_trampoline = -1; | |
14969 | } | |
0855e32b | 14970 | } |
5e681ec4 PB |
14971 | } |
14972 | else | |
14973 | *local_got = (bfd_vma) -1; | |
14974 | } | |
252b5132 RH |
14975 | } |
14976 | ||
ba93b8ac DJ |
14977 | if (htab->tls_ldm_got.refcount > 0) |
14978 | { | |
14979 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
14980 | for R_ARM_TLS_LDM32 relocations. */ | |
362d30a1 RS |
14981 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
14982 | htab->root.sgot->size += 8; | |
0e1862bb | 14983 | if (bfd_link_pic (info)) |
47beaa6a | 14984 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
14985 | } |
14986 | else | |
14987 | htab->tls_ldm_got.offset = -1; | |
14988 | ||
5e681ec4 PB |
14989 | /* Allocate global sym .plt and .got entries, and space for global |
14990 | sym dynamic relocs. */ | |
47beaa6a | 14991 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
252b5132 | 14992 | |
d504ffc8 | 14993 | /* Here we rummage through the found bfds to collect glue information. */ |
c72f2fb2 | 14994 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
c7b8f16e | 14995 | { |
0ffa91dd | 14996 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
14997 | continue; |
14998 | ||
c7b8f16e JB |
14999 | /* Initialise mapping tables for code/data. */ |
15000 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 15001 | |
c7b8f16e | 15002 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
a504d23a LA |
15003 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info) |
15004 | || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info)) | |
99059e56 RM |
15005 | /* xgettext:c-format */ |
15006 | _bfd_error_handler (_("Errors encountered processing file %s"), | |
c7b8f16e JB |
15007 | ibfd->filename); |
15008 | } | |
d504ffc8 | 15009 | |
3e6b1042 DJ |
15010 | /* Allocate space for the glue sections now that we've sized them. */ |
15011 | bfd_elf32_arm_allocate_interworking_sections (info); | |
15012 | ||
0855e32b NS |
15013 | /* For every jump slot reserved in the sgotplt, reloc_count is |
15014 | incremented. However, when we reserve space for TLS descriptors, | |
15015 | it's not incremented, so in order to compute the space reserved | |
15016 | for them, it suffices to multiply the reloc count by the jump | |
15017 | slot size. */ | |
15018 | if (htab->root.srelplt) | |
15019 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab); | |
15020 | ||
15021 | if (htab->tls_trampoline) | |
15022 | { | |
15023 | if (htab->root.splt->size == 0) | |
15024 | htab->root.splt->size += htab->plt_header_size; | |
b38cadfb | 15025 | |
0855e32b NS |
15026 | htab->tls_trampoline = htab->root.splt->size; |
15027 | htab->root.splt->size += htab->plt_entry_size; | |
b38cadfb | 15028 | |
0855e32b | 15029 | /* If we're not using lazy TLS relocations, don't generate the |
99059e56 | 15030 | PLT and GOT entries they require. */ |
0855e32b NS |
15031 | if (!(info->flags & DF_BIND_NOW)) |
15032 | { | |
15033 | htab->dt_tlsdesc_got = htab->root.sgot->size; | |
15034 | htab->root.sgot->size += 4; | |
15035 | ||
15036 | htab->dt_tlsdesc_plt = htab->root.splt->size; | |
15037 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); | |
15038 | } | |
15039 | } | |
15040 | ||
252b5132 RH |
15041 | /* The check_relocs and adjust_dynamic_symbol entry points have |
15042 | determined the sizes of the various dynamic sections. Allocate | |
15043 | memory for them. */ | |
b34976b6 AM |
15044 | plt = FALSE; |
15045 | relocs = FALSE; | |
252b5132 RH |
15046 | for (s = dynobj->sections; s != NULL; s = s->next) |
15047 | { | |
15048 | const char * name; | |
252b5132 RH |
15049 | |
15050 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
15051 | continue; | |
15052 | ||
15053 | /* It's OK to base decisions on the section name, because none | |
15054 | of the dynobj section names depend upon the input files. */ | |
15055 | name = bfd_get_section_name (dynobj, s); | |
15056 | ||
34e77a92 | 15057 | if (s == htab->root.splt) |
252b5132 | 15058 | { |
c456f082 AM |
15059 | /* Remember whether there is a PLT. */ |
15060 | plt = s->size != 0; | |
252b5132 | 15061 | } |
0112cd26 | 15062 | else if (CONST_STRNEQ (name, ".rel")) |
252b5132 | 15063 | { |
c456f082 | 15064 | if (s->size != 0) |
252b5132 | 15065 | { |
252b5132 | 15066 | /* Remember whether there are any reloc sections other |
00a97672 | 15067 | than .rel(a).plt and .rela.plt.unloaded. */ |
362d30a1 | 15068 | if (s != htab->root.srelplt && s != htab->srelplt2) |
b34976b6 | 15069 | relocs = TRUE; |
252b5132 RH |
15070 | |
15071 | /* We use the reloc_count field as a counter if we need | |
15072 | to copy relocs into the output file. */ | |
15073 | s->reloc_count = 0; | |
15074 | } | |
15075 | } | |
34e77a92 RS |
15076 | else if (s != htab->root.sgot |
15077 | && s != htab->root.sgotplt | |
15078 | && s != htab->root.iplt | |
15079 | && s != htab->root.igotplt | |
15080 | && s != htab->sdynbss) | |
252b5132 RH |
15081 | { |
15082 | /* It's not one of our sections, so don't allocate space. */ | |
15083 | continue; | |
15084 | } | |
15085 | ||
c456f082 | 15086 | if (s->size == 0) |
252b5132 | 15087 | { |
c456f082 | 15088 | /* If we don't need this section, strip it from the |
00a97672 RS |
15089 | output file. This is mostly to handle .rel(a).bss and |
15090 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
15091 | create_dynamic_sections, because they must be created |
15092 | before the linker maps input sections to output | |
15093 | sections. The linker does that before | |
15094 | adjust_dynamic_symbol is called, and it is that | |
15095 | function which decides whether anything needs to go | |
15096 | into these sections. */ | |
8423293d | 15097 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
15098 | continue; |
15099 | } | |
15100 | ||
c456f082 AM |
15101 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
15102 | continue; | |
15103 | ||
252b5132 | 15104 | /* Allocate memory for the section contents. */ |
21d799b5 | 15105 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 15106 | if (s->contents == NULL) |
b34976b6 | 15107 | return FALSE; |
252b5132 RH |
15108 | } |
15109 | ||
15110 | if (elf_hash_table (info)->dynamic_sections_created) | |
15111 | { | |
15112 | /* Add some entries to the .dynamic section. We fill in the | |
15113 | values later, in elf32_arm_finish_dynamic_sections, but we | |
15114 | must add the entries now so that we get the correct size for | |
15115 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
15116 | dynamic linker and used by the debugger. */ | |
dc810e39 | 15117 | #define add_dynamic_entry(TAG, VAL) \ |
5a580b3a | 15118 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
dc810e39 | 15119 | |
0e1862bb | 15120 | if (bfd_link_executable (info)) |
252b5132 | 15121 | { |
dc810e39 | 15122 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
b34976b6 | 15123 | return FALSE; |
252b5132 RH |
15124 | } |
15125 | ||
15126 | if (plt) | |
15127 | { | |
dc810e39 AM |
15128 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
15129 | || !add_dynamic_entry (DT_PLTRELSZ, 0) | |
00a97672 RS |
15130 | || !add_dynamic_entry (DT_PLTREL, |
15131 | htab->use_rel ? DT_REL : DT_RELA) | |
dc810e39 | 15132 | || !add_dynamic_entry (DT_JMPREL, 0)) |
b34976b6 | 15133 | return FALSE; |
0855e32b NS |
15134 | |
15135 | if (htab->dt_tlsdesc_plt && | |
b38cadfb | 15136 | (!add_dynamic_entry (DT_TLSDESC_PLT,0) |
0855e32b | 15137 | || !add_dynamic_entry (DT_TLSDESC_GOT,0))) |
b38cadfb | 15138 | return FALSE; |
252b5132 RH |
15139 | } |
15140 | ||
15141 | if (relocs) | |
15142 | { | |
00a97672 RS |
15143 | if (htab->use_rel) |
15144 | { | |
15145 | if (!add_dynamic_entry (DT_REL, 0) | |
15146 | || !add_dynamic_entry (DT_RELSZ, 0) | |
15147 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) | |
15148 | return FALSE; | |
15149 | } | |
15150 | else | |
15151 | { | |
15152 | if (!add_dynamic_entry (DT_RELA, 0) | |
15153 | || !add_dynamic_entry (DT_RELASZ, 0) | |
15154 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) | |
15155 | return FALSE; | |
15156 | } | |
252b5132 RH |
15157 | } |
15158 | ||
08d1f311 DJ |
15159 | /* If any dynamic relocs apply to a read-only section, |
15160 | then we need a DT_TEXTREL entry. */ | |
15161 | if ((info->flags & DF_TEXTREL) == 0) | |
8029a119 NC |
15162 | elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs, |
15163 | info); | |
08d1f311 | 15164 | |
99e4ae17 | 15165 | if ((info->flags & DF_TEXTREL) != 0) |
252b5132 | 15166 | { |
dc810e39 | 15167 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
b34976b6 | 15168 | return FALSE; |
252b5132 | 15169 | } |
7a2b07ff NS |
15170 | if (htab->vxworks_p |
15171 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) | |
15172 | return FALSE; | |
252b5132 | 15173 | } |
8532796c | 15174 | #undef add_dynamic_entry |
252b5132 | 15175 | |
b34976b6 | 15176 | return TRUE; |
252b5132 RH |
15177 | } |
15178 | ||
0855e32b NS |
15179 | /* Size sections even though they're not dynamic. We use it to setup |
15180 | _TLS_MODULE_BASE_, if needed. */ | |
15181 | ||
15182 | static bfd_boolean | |
15183 | elf32_arm_always_size_sections (bfd *output_bfd, | |
99059e56 | 15184 | struct bfd_link_info *info) |
0855e32b NS |
15185 | { |
15186 | asection *tls_sec; | |
15187 | ||
0e1862bb | 15188 | if (bfd_link_relocatable (info)) |
0855e32b NS |
15189 | return TRUE; |
15190 | ||
15191 | tls_sec = elf_hash_table (info)->tls_sec; | |
15192 | ||
15193 | if (tls_sec) | |
15194 | { | |
15195 | struct elf_link_hash_entry *tlsbase; | |
15196 | ||
15197 | tlsbase = elf_link_hash_lookup | |
15198 | (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE); | |
15199 | ||
15200 | if (tlsbase) | |
99059e56 RM |
15201 | { |
15202 | struct bfd_link_hash_entry *bh = NULL; | |
0855e32b | 15203 | const struct elf_backend_data *bed |
99059e56 | 15204 | = get_elf_backend_data (output_bfd); |
0855e32b | 15205 | |
99059e56 | 15206 | if (!(_bfd_generic_link_add_one_symbol |
0855e32b NS |
15207 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, |
15208 | tls_sec, 0, NULL, FALSE, | |
15209 | bed->collect, &bh))) | |
15210 | return FALSE; | |
b38cadfb | 15211 | |
99059e56 RM |
15212 | tlsbase->type = STT_TLS; |
15213 | tlsbase = (struct elf_link_hash_entry *)bh; | |
15214 | tlsbase->def_regular = 1; | |
15215 | tlsbase->other = STV_HIDDEN; | |
15216 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); | |
0855e32b NS |
15217 | } |
15218 | } | |
15219 | return TRUE; | |
15220 | } | |
15221 | ||
252b5132 RH |
15222 | /* Finish up dynamic symbol handling. We set the contents of various |
15223 | dynamic sections here. */ | |
15224 | ||
b34976b6 | 15225 | static bfd_boolean |
906e58ca NC |
15226 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
15227 | struct bfd_link_info * info, | |
15228 | struct elf_link_hash_entry * h, | |
15229 | Elf_Internal_Sym * sym) | |
252b5132 | 15230 | { |
e5a52504 | 15231 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 15232 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 15233 | |
e5a52504 | 15234 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
15235 | if (htab == NULL) |
15236 | return FALSE; | |
15237 | ||
b7693d02 | 15238 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
15239 | |
15240 | if (h->plt.offset != (bfd_vma) -1) | |
15241 | { | |
34e77a92 | 15242 | if (!eh->is_iplt) |
e5a52504 | 15243 | { |
34e77a92 | 15244 | BFD_ASSERT (h->dynindx != -1); |
57460bcf NC |
15245 | if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, |
15246 | h->dynindx, 0)) | |
15247 | return FALSE; | |
e5a52504 | 15248 | } |
57e8b36a | 15249 | |
f5385ebf | 15250 | if (!h->def_regular) |
252b5132 RH |
15251 | { |
15252 | /* Mark the symbol as undefined, rather than as defined in | |
3a635617 | 15253 | the .plt section. */ |
252b5132 | 15254 | sym->st_shndx = SHN_UNDEF; |
3a635617 | 15255 | /* If the symbol is weak we need to clear the value. |
d982ba73 PB |
15256 | Otherwise, the PLT entry would provide a definition for |
15257 | the symbol even if the symbol wasn't defined anywhere, | |
3a635617 WN |
15258 | and so the symbol would never be NULL. Leave the value if |
15259 | there were any relocations where pointer equality matters | |
15260 | (this is a clue for the dynamic linker, to make function | |
15261 | pointer comparisons work between an application and shared | |
15262 | library). */ | |
97323ad1 | 15263 | if (!h->ref_regular_nonweak || !h->pointer_equality_needed) |
d982ba73 | 15264 | sym->st_value = 0; |
252b5132 | 15265 | } |
34e77a92 RS |
15266 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
15267 | { | |
15268 | /* At least one non-call relocation references this .iplt entry, | |
15269 | so the .iplt entry is the function's canonical address. */ | |
15270 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); | |
39d911fc | 15271 | ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM); |
34e77a92 RS |
15272 | sym->st_shndx = (_bfd_elf_section_from_bfd_section |
15273 | (output_bfd, htab->root.iplt->output_section)); | |
15274 | sym->st_value = (h->plt.offset | |
15275 | + htab->root.iplt->output_section->vma | |
15276 | + htab->root.iplt->output_offset); | |
15277 | } | |
252b5132 RH |
15278 | } |
15279 | ||
f5385ebf | 15280 | if (h->needs_copy) |
252b5132 RH |
15281 | { |
15282 | asection * s; | |
947216bf | 15283 | Elf_Internal_Rela rel; |
252b5132 RH |
15284 | |
15285 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
15286 | BFD_ASSERT (h->dynindx != -1 |
15287 | && (h->root.type == bfd_link_hash_defined | |
15288 | || h->root.type == bfd_link_hash_defweak)); | |
15289 | ||
362d30a1 | 15290 | s = htab->srelbss; |
252b5132 RH |
15291 | BFD_ASSERT (s != NULL); |
15292 | ||
00a97672 | 15293 | rel.r_addend = 0; |
252b5132 RH |
15294 | rel.r_offset = (h->root.u.def.value |
15295 | + h->root.u.def.section->output_section->vma | |
15296 | + h->root.u.def.section->output_offset); | |
15297 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
47beaa6a | 15298 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
252b5132 RH |
15299 | } |
15300 | ||
00a97672 RS |
15301 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
15302 | the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative | |
15303 | to the ".got" section. */ | |
9637f6ef | 15304 | if (h == htab->root.hdynamic |
00a97672 | 15305 | || (!htab->vxworks_p && h == htab->root.hgot)) |
252b5132 RH |
15306 | sym->st_shndx = SHN_ABS; |
15307 | ||
b34976b6 | 15308 | return TRUE; |
252b5132 RH |
15309 | } |
15310 | ||
0855e32b NS |
15311 | static void |
15312 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
15313 | void *contents, | |
15314 | const unsigned long *template, unsigned count) | |
15315 | { | |
15316 | unsigned ix; | |
b38cadfb | 15317 | |
0855e32b NS |
15318 | for (ix = 0; ix != count; ix++) |
15319 | { | |
15320 | unsigned long insn = template[ix]; | |
15321 | ||
15322 | /* Emit mov pc,rx if bx is not permitted. */ | |
15323 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) | |
15324 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
15325 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); | |
15326 | } | |
15327 | } | |
15328 | ||
99059e56 RM |
15329 | /* Install the special first PLT entry for elf32-arm-nacl. Unlike |
15330 | other variants, NaCl needs this entry in a static executable's | |
15331 | .iplt too. When we're handling that case, GOT_DISPLACEMENT is | |
15332 | zero. For .iplt really only the last bundle is useful, and .iplt | |
15333 | could have a shorter first entry, with each individual PLT entry's | |
15334 | relative branch calculated differently so it targets the last | |
15335 | bundle instead of the instruction before it (labelled .Lplt_tail | |
15336 | above). But it's simpler to keep the size and layout of PLT0 | |
15337 | consistent with the dynamic case, at the cost of some dead code at | |
15338 | the start of .iplt and the one dead store to the stack at the start | |
15339 | of .Lplt_tail. */ | |
15340 | static void | |
15341 | arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
15342 | asection *plt, bfd_vma got_displacement) | |
15343 | { | |
15344 | unsigned int i; | |
15345 | ||
15346 | put_arm_insn (htab, output_bfd, | |
15347 | elf32_arm_nacl_plt0_entry[0] | |
15348 | | arm_movw_immediate (got_displacement), | |
15349 | plt->contents + 0); | |
15350 | put_arm_insn (htab, output_bfd, | |
15351 | elf32_arm_nacl_plt0_entry[1] | |
15352 | | arm_movt_immediate (got_displacement), | |
15353 | plt->contents + 4); | |
15354 | ||
15355 | for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i) | |
15356 | put_arm_insn (htab, output_bfd, | |
15357 | elf32_arm_nacl_plt0_entry[i], | |
15358 | plt->contents + (i * 4)); | |
15359 | } | |
15360 | ||
252b5132 RH |
15361 | /* Finish up the dynamic sections. */ |
15362 | ||
b34976b6 | 15363 | static bfd_boolean |
57e8b36a | 15364 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
15365 | { |
15366 | bfd * dynobj; | |
15367 | asection * sgot; | |
15368 | asection * sdyn; | |
4dfe6ac6 NC |
15369 | struct elf32_arm_link_hash_table *htab; |
15370 | ||
15371 | htab = elf32_arm_hash_table (info); | |
15372 | if (htab == NULL) | |
15373 | return FALSE; | |
252b5132 RH |
15374 | |
15375 | dynobj = elf_hash_table (info)->dynobj; | |
15376 | ||
362d30a1 | 15377 | sgot = htab->root.sgotplt; |
894891db NC |
15378 | /* A broken linker script might have discarded the dynamic sections. |
15379 | Catch this here so that we do not seg-fault later on. */ | |
15380 | if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) | |
15381 | return FALSE; | |
3d4d4302 | 15382 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
252b5132 RH |
15383 | |
15384 | if (elf_hash_table (info)->dynamic_sections_created) | |
15385 | { | |
15386 | asection *splt; | |
15387 | Elf32_External_Dyn *dyncon, *dynconend; | |
15388 | ||
362d30a1 | 15389 | splt = htab->root.splt; |
24a1ba0f | 15390 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
cbc704f3 | 15391 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
252b5132 RH |
15392 | |
15393 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 15394 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 15395 | |
252b5132 RH |
15396 | for (; dyncon < dynconend; dyncon++) |
15397 | { | |
15398 | Elf_Internal_Dyn dyn; | |
15399 | const char * name; | |
15400 | asection * s; | |
15401 | ||
15402 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
15403 | ||
15404 | switch (dyn.d_tag) | |
15405 | { | |
229fcec5 MM |
15406 | unsigned int type; |
15407 | ||
252b5132 | 15408 | default: |
7a2b07ff NS |
15409 | if (htab->vxworks_p |
15410 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) | |
15411 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
15412 | break; |
15413 | ||
229fcec5 MM |
15414 | case DT_HASH: |
15415 | name = ".hash"; | |
15416 | goto get_vma_if_bpabi; | |
15417 | case DT_STRTAB: | |
15418 | name = ".dynstr"; | |
15419 | goto get_vma_if_bpabi; | |
15420 | case DT_SYMTAB: | |
15421 | name = ".dynsym"; | |
15422 | goto get_vma_if_bpabi; | |
c0042f5d MM |
15423 | case DT_VERSYM: |
15424 | name = ".gnu.version"; | |
15425 | goto get_vma_if_bpabi; | |
15426 | case DT_VERDEF: | |
15427 | name = ".gnu.version_d"; | |
15428 | goto get_vma_if_bpabi; | |
15429 | case DT_VERNEED: | |
15430 | name = ".gnu.version_r"; | |
15431 | goto get_vma_if_bpabi; | |
15432 | ||
252b5132 | 15433 | case DT_PLTGOT: |
4ade44b7 | 15434 | name = htab->symbian_p ? ".got" : ".got.plt"; |
252b5132 RH |
15435 | goto get_vma; |
15436 | case DT_JMPREL: | |
00a97672 | 15437 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 | 15438 | get_vma: |
4ade44b7 | 15439 | s = bfd_get_linker_section (dynobj, name); |
05456594 NC |
15440 | if (s == NULL) |
15441 | { | |
05456594 | 15442 | (*_bfd_error_handler) |
4ade44b7 | 15443 | (_("could not find section %s"), name); |
05456594 NC |
15444 | bfd_set_error (bfd_error_invalid_operation); |
15445 | return FALSE; | |
15446 | } | |
229fcec5 | 15447 | if (!htab->symbian_p) |
4ade44b7 | 15448 | dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; |
229fcec5 MM |
15449 | else |
15450 | /* In the BPABI, tags in the PT_DYNAMIC section point | |
15451 | at the file offset, not the memory address, for the | |
15452 | convenience of the post linker. */ | |
4ade44b7 | 15453 | dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset; |
252b5132 RH |
15454 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
15455 | break; | |
15456 | ||
229fcec5 MM |
15457 | get_vma_if_bpabi: |
15458 | if (htab->symbian_p) | |
15459 | goto get_vma; | |
15460 | break; | |
15461 | ||
252b5132 | 15462 | case DT_PLTRELSZ: |
362d30a1 | 15463 | s = htab->root.srelplt; |
252b5132 | 15464 | BFD_ASSERT (s != NULL); |
eea6121a | 15465 | dyn.d_un.d_val = s->size; |
252b5132 RH |
15466 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
15467 | break; | |
906e58ca | 15468 | |
252b5132 | 15469 | case DT_RELSZ: |
00a97672 | 15470 | case DT_RELASZ: |
229fcec5 MM |
15471 | if (!htab->symbian_p) |
15472 | { | |
15473 | /* My reading of the SVR4 ABI indicates that the | |
15474 | procedure linkage table relocs (DT_JMPREL) should be | |
15475 | included in the overall relocs (DT_REL). This is | |
15476 | what Solaris does. However, UnixWare can not handle | |
15477 | that case. Therefore, we override the DT_RELSZ entry | |
15478 | here to make it not include the JMPREL relocs. Since | |
00a97672 | 15479 | the linker script arranges for .rel(a).plt to follow all |
229fcec5 MM |
15480 | other relocation sections, we don't have to worry |
15481 | about changing the DT_REL entry. */ | |
362d30a1 | 15482 | s = htab->root.srelplt; |
229fcec5 MM |
15483 | if (s != NULL) |
15484 | dyn.d_un.d_val -= s->size; | |
15485 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
15486 | break; | |
15487 | } | |
8029a119 | 15488 | /* Fall through. */ |
229fcec5 MM |
15489 | |
15490 | case DT_REL: | |
15491 | case DT_RELA: | |
229fcec5 MM |
15492 | /* In the BPABI, the DT_REL tag must point at the file |
15493 | offset, not the VMA, of the first relocation | |
15494 | section. So, we use code similar to that in | |
15495 | elflink.c, but do not check for SHF_ALLOC on the | |
15496 | relcoation section, since relocations sections are | |
15497 | never allocated under the BPABI. The comments above | |
15498 | about Unixware notwithstanding, we include all of the | |
15499 | relocations here. */ | |
15500 | if (htab->symbian_p) | |
15501 | { | |
15502 | unsigned int i; | |
15503 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) | |
15504 | ? SHT_REL : SHT_RELA); | |
15505 | dyn.d_un.d_val = 0; | |
15506 | for (i = 1; i < elf_numsections (output_bfd); i++) | |
15507 | { | |
906e58ca | 15508 | Elf_Internal_Shdr *hdr |
229fcec5 MM |
15509 | = elf_elfsections (output_bfd)[i]; |
15510 | if (hdr->sh_type == type) | |
15511 | { | |
906e58ca | 15512 | if (dyn.d_tag == DT_RELSZ |
229fcec5 MM |
15513 | || dyn.d_tag == DT_RELASZ) |
15514 | dyn.d_un.d_val += hdr->sh_size; | |
de52dba4 AM |
15515 | else if ((ufile_ptr) hdr->sh_offset |
15516 | <= dyn.d_un.d_val - 1) | |
229fcec5 MM |
15517 | dyn.d_un.d_val = hdr->sh_offset; |
15518 | } | |
15519 | } | |
15520 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
15521 | } | |
252b5132 | 15522 | break; |
88f7bcd5 | 15523 | |
0855e32b | 15524 | case DT_TLSDESC_PLT: |
99059e56 | 15525 | s = htab->root.splt; |
0855e32b NS |
15526 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
15527 | + htab->dt_tlsdesc_plt); | |
15528 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
15529 | break; | |
15530 | ||
15531 | case DT_TLSDESC_GOT: | |
99059e56 | 15532 | s = htab->root.sgot; |
0855e32b | 15533 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
99059e56 | 15534 | + htab->dt_tlsdesc_got); |
0855e32b NS |
15535 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
15536 | break; | |
15537 | ||
88f7bcd5 NC |
15538 | /* Set the bottom bit of DT_INIT/FINI if the |
15539 | corresponding function is Thumb. */ | |
15540 | case DT_INIT: | |
15541 | name = info->init_function; | |
15542 | goto get_sym; | |
15543 | case DT_FINI: | |
15544 | name = info->fini_function; | |
15545 | get_sym: | |
15546 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 15547 | then there is nothing to adjust. */ |
88f7bcd5 NC |
15548 | if (dyn.d_un.d_val != 0) |
15549 | { | |
15550 | struct elf_link_hash_entry * eh; | |
15551 | ||
15552 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
b34976b6 | 15553 | FALSE, FALSE, TRUE); |
39d911fc TP |
15554 | if (eh != NULL |
15555 | && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal) | |
15556 | == ST_BRANCH_TO_THUMB) | |
88f7bcd5 NC |
15557 | { |
15558 | dyn.d_un.d_val |= 1; | |
b34976b6 | 15559 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
15560 | } |
15561 | } | |
15562 | break; | |
252b5132 RH |
15563 | } |
15564 | } | |
15565 | ||
24a1ba0f | 15566 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 15567 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 15568 | { |
00a97672 RS |
15569 | const bfd_vma *plt0_entry; |
15570 | bfd_vma got_address, plt_address, got_displacement; | |
15571 | ||
15572 | /* Calculate the addresses of the GOT and PLT. */ | |
15573 | got_address = sgot->output_section->vma + sgot->output_offset; | |
15574 | plt_address = splt->output_section->vma + splt->output_offset; | |
15575 | ||
15576 | if (htab->vxworks_p) | |
15577 | { | |
15578 | /* The VxWorks GOT is relocated by the dynamic linker. | |
15579 | Therefore, we must emit relocations rather than simply | |
15580 | computing the values now. */ | |
15581 | Elf_Internal_Rela rel; | |
15582 | ||
15583 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
15584 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
15585 | splt->contents + 0); | |
15586 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
15587 | splt->contents + 4); | |
15588 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
15589 | splt->contents + 8); | |
00a97672 RS |
15590 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
15591 | ||
8029a119 | 15592 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
15593 | rel.r_offset = plt_address + 12; |
15594 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
15595 | rel.r_addend = 0; | |
15596 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
15597 | htab->srelplt2->contents); | |
15598 | } | |
b38cadfb | 15599 | else if (htab->nacl_p) |
99059e56 RM |
15600 | arm_nacl_put_plt0 (htab, output_bfd, splt, |
15601 | got_address + 8 - (plt_address + 16)); | |
eed94f8f NC |
15602 | else if (using_thumb_only (htab)) |
15603 | { | |
15604 | got_displacement = got_address - (plt_address + 12); | |
15605 | ||
15606 | plt0_entry = elf32_thumb2_plt0_entry; | |
15607 | put_arm_insn (htab, output_bfd, plt0_entry[0], | |
15608 | splt->contents + 0); | |
15609 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
15610 | splt->contents + 4); | |
15611 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
15612 | splt->contents + 8); | |
15613 | ||
15614 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 12); | |
15615 | } | |
00a97672 RS |
15616 | else |
15617 | { | |
15618 | got_displacement = got_address - (plt_address + 16); | |
15619 | ||
15620 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
15621 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
15622 | splt->contents + 0); | |
15623 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
15624 | splt->contents + 4); | |
15625 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
15626 | splt->contents + 8); | |
15627 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
15628 | splt->contents + 12); | |
5e681ec4 | 15629 | |
5e681ec4 | 15630 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
15631 | /* The displacement value goes in the otherwise-unused |
15632 | last word of the second entry. */ | |
15633 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 15634 | #else |
00a97672 | 15635 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 15636 | #endif |
00a97672 | 15637 | } |
f7a74f8c | 15638 | } |
252b5132 RH |
15639 | |
15640 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
15641 | really seem like the right value. */ | |
74541ad4 AM |
15642 | if (splt->output_section->owner == output_bfd) |
15643 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 | 15644 | |
0855e32b NS |
15645 | if (htab->dt_tlsdesc_plt) |
15646 | { | |
15647 | bfd_vma got_address | |
15648 | = sgot->output_section->vma + sgot->output_offset; | |
15649 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma | |
15650 | + htab->root.sgot->output_offset); | |
15651 | bfd_vma plt_address | |
15652 | = splt->output_section->vma + splt->output_offset; | |
15653 | ||
b38cadfb | 15654 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
15655 | splt->contents + htab->dt_tlsdesc_plt, |
15656 | dl_tlsdesc_lazy_trampoline, 6); | |
15657 | ||
15658 | bfd_put_32 (output_bfd, | |
15659 | gotplt_address + htab->dt_tlsdesc_got | |
15660 | - (plt_address + htab->dt_tlsdesc_plt) | |
15661 | - dl_tlsdesc_lazy_trampoline[6], | |
15662 | splt->contents + htab->dt_tlsdesc_plt + 24); | |
15663 | bfd_put_32 (output_bfd, | |
15664 | got_address - (plt_address + htab->dt_tlsdesc_plt) | |
15665 | - dl_tlsdesc_lazy_trampoline[7], | |
15666 | splt->contents + htab->dt_tlsdesc_plt + 24 + 4); | |
15667 | } | |
15668 | ||
15669 | if (htab->tls_trampoline) | |
15670 | { | |
b38cadfb | 15671 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
15672 | splt->contents + htab->tls_trampoline, |
15673 | tls_trampoline, 3); | |
15674 | #ifdef FOUR_WORD_PLT | |
15675 | bfd_put_32 (output_bfd, 0x00000000, | |
15676 | splt->contents + htab->tls_trampoline + 12); | |
b38cadfb | 15677 | #endif |
0855e32b NS |
15678 | } |
15679 | ||
0e1862bb L |
15680 | if (htab->vxworks_p |
15681 | && !bfd_link_pic (info) | |
15682 | && htab->root.splt->size > 0) | |
00a97672 RS |
15683 | { |
15684 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
15685 | incorrect symbol indexes. */ | |
15686 | int num_plts; | |
eed62c48 | 15687 | unsigned char *p; |
00a97672 | 15688 | |
362d30a1 | 15689 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
00a97672 RS |
15690 | / htab->plt_entry_size); |
15691 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
15692 | ||
15693 | for (; num_plts; num_plts--) | |
15694 | { | |
15695 | Elf_Internal_Rela rel; | |
15696 | ||
15697 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
15698 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
15699 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
15700 | p += RELOC_SIZE (htab); | |
15701 | ||
15702 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
15703 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
15704 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
15705 | p += RELOC_SIZE (htab); | |
15706 | } | |
15707 | } | |
252b5132 RH |
15708 | } |
15709 | ||
99059e56 RM |
15710 | if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0) |
15711 | /* NaCl uses a special first entry in .iplt too. */ | |
15712 | arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0); | |
15713 | ||
252b5132 | 15714 | /* Fill in the first three entries in the global offset table. */ |
229fcec5 | 15715 | if (sgot) |
252b5132 | 15716 | { |
229fcec5 MM |
15717 | if (sgot->size > 0) |
15718 | { | |
15719 | if (sdyn == NULL) | |
15720 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
15721 | else | |
15722 | bfd_put_32 (output_bfd, | |
15723 | sdyn->output_section->vma + sdyn->output_offset, | |
15724 | sgot->contents); | |
15725 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
15726 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
15727 | } | |
252b5132 | 15728 | |
229fcec5 MM |
15729 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
15730 | } | |
252b5132 | 15731 | |
b34976b6 | 15732 | return TRUE; |
252b5132 RH |
15733 | } |
15734 | ||
ba96a88f | 15735 | static void |
57e8b36a | 15736 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
ba96a88f | 15737 | { |
9b485d32 | 15738 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 15739 | struct elf32_arm_link_hash_table *globals; |
ac4c9b04 | 15740 | struct elf_segment_map *m; |
ba96a88f NC |
15741 | |
15742 | i_ehdrp = elf_elfheader (abfd); | |
15743 | ||
94a3258f PB |
15744 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
15745 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
15746 | else | |
7394f108 | 15747 | _bfd_elf_post_process_headers (abfd, link_info); |
ba96a88f | 15748 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 15749 | |
93204d3a PB |
15750 | if (link_info) |
15751 | { | |
15752 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 15753 | if (globals != NULL && globals->byteswap_code) |
93204d3a PB |
15754 | i_ehdrp->e_flags |= EF_ARM_BE8; |
15755 | } | |
3bfcb652 NC |
15756 | |
15757 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5 | |
15758 | && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) | |
15759 | { | |
15760 | int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); | |
5c294fee | 15761 | if (abi == AEABI_VFP_args_vfp) |
3bfcb652 NC |
15762 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; |
15763 | else | |
15764 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; | |
15765 | } | |
ac4c9b04 MG |
15766 | |
15767 | /* Scan segment to set p_flags attribute if it contains only sections with | |
15768 | SHF_ARM_NOREAD flag. */ | |
15769 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) | |
15770 | { | |
15771 | unsigned int j; | |
15772 | ||
15773 | if (m->count == 0) | |
15774 | continue; | |
15775 | for (j = 0; j < m->count; j++) | |
15776 | { | |
15777 | if (!(elf_section_flags (m->sections[j]) & SHF_ARM_NOREAD)) | |
15778 | break; | |
15779 | } | |
15780 | if (j == m->count) | |
15781 | { | |
15782 | m->p_flags = PF_X; | |
15783 | m->p_flags_valid = 1; | |
15784 | } | |
15785 | } | |
ba96a88f NC |
15786 | } |
15787 | ||
99e4ae17 | 15788 | static enum elf_reloc_type_class |
7e612e98 AM |
15789 | elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
15790 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
15791 | const Elf_Internal_Rela *rela) | |
99e4ae17 | 15792 | { |
f51e552e | 15793 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
15794 | { |
15795 | case R_ARM_RELATIVE: | |
15796 | return reloc_class_relative; | |
15797 | case R_ARM_JUMP_SLOT: | |
15798 | return reloc_class_plt; | |
15799 | case R_ARM_COPY: | |
15800 | return reloc_class_copy; | |
109575d7 JW |
15801 | case R_ARM_IRELATIVE: |
15802 | return reloc_class_ifunc; | |
99e4ae17 AJ |
15803 | default: |
15804 | return reloc_class_normal; | |
15805 | } | |
15806 | } | |
15807 | ||
e489d0ae | 15808 | static void |
57e8b36a | 15809 | elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) |
e16bb312 | 15810 | { |
5a6c6817 | 15811 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
15812 | } |
15813 | ||
40a18ebd NC |
15814 | /* Return TRUE if this is an unwinding table entry. */ |
15815 | ||
15816 | static bfd_boolean | |
15817 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) | |
15818 | { | |
0112cd26 NC |
15819 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
15820 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
15821 | } |
15822 | ||
15823 | ||
15824 | /* Set the type and flags for an ARM section. We do this by | |
15825 | the section name, which is a hack, but ought to work. */ | |
15826 | ||
15827 | static bfd_boolean | |
15828 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) | |
15829 | { | |
15830 | const char * name; | |
15831 | ||
15832 | name = bfd_get_section_name (abfd, sec); | |
15833 | ||
15834 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
15835 | { | |
15836 | hdr->sh_type = SHT_ARM_EXIDX; | |
15837 | hdr->sh_flags |= SHF_LINK_ORDER; | |
15838 | } | |
ac4c9b04 MG |
15839 | |
15840 | if (sec->flags & SEC_ELF_NOREAD) | |
15841 | hdr->sh_flags |= SHF_ARM_NOREAD; | |
15842 | ||
40a18ebd NC |
15843 | return TRUE; |
15844 | } | |
15845 | ||
6dc132d9 L |
15846 | /* Handle an ARM specific section when reading an object file. This is |
15847 | called when bfd_section_from_shdr finds a section with an unknown | |
15848 | type. */ | |
40a18ebd NC |
15849 | |
15850 | static bfd_boolean | |
15851 | elf32_arm_section_from_shdr (bfd *abfd, | |
15852 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
15853 | const char *name, |
15854 | int shindex) | |
40a18ebd NC |
15855 | { |
15856 | /* There ought to be a place to keep ELF backend specific flags, but | |
15857 | at the moment there isn't one. We just keep track of the | |
15858 | sections by their name, instead. Fortunately, the ABI gives | |
15859 | names for all the ARM specific sections, so we will probably get | |
15860 | away with this. */ | |
15861 | switch (hdr->sh_type) | |
15862 | { | |
15863 | case SHT_ARM_EXIDX: | |
0951f019 RE |
15864 | case SHT_ARM_PREEMPTMAP: |
15865 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
15866 | break; |
15867 | ||
15868 | default: | |
15869 | return FALSE; | |
15870 | } | |
15871 | ||
6dc132d9 | 15872 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
40a18ebd NC |
15873 | return FALSE; |
15874 | ||
15875 | return TRUE; | |
15876 | } | |
e489d0ae | 15877 | |
44444f50 NC |
15878 | static _arm_elf_section_data * |
15879 | get_arm_elf_section_data (asection * sec) | |
15880 | { | |
47b2e99c JZ |
15881 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
15882 | return elf32_arm_section_data (sec); | |
44444f50 NC |
15883 | else |
15884 | return NULL; | |
8e3de13a NC |
15885 | } |
15886 | ||
4e617b1e PB |
15887 | typedef struct |
15888 | { | |
57402f1e | 15889 | void *flaginfo; |
4e617b1e | 15890 | struct bfd_link_info *info; |
91a5743d PB |
15891 | asection *sec; |
15892 | int sec_shndx; | |
6e0b88f1 AM |
15893 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
15894 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
15895 | } output_arch_syminfo; |
15896 | ||
15897 | enum map_symbol_type | |
15898 | { | |
15899 | ARM_MAP_ARM, | |
15900 | ARM_MAP_THUMB, | |
15901 | ARM_MAP_DATA | |
15902 | }; | |
15903 | ||
15904 | ||
7413f23f | 15905 | /* Output a single mapping symbol. */ |
4e617b1e PB |
15906 | |
15907 | static bfd_boolean | |
7413f23f DJ |
15908 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
15909 | enum map_symbol_type type, | |
15910 | bfd_vma offset) | |
4e617b1e PB |
15911 | { |
15912 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
15913 | Elf_Internal_Sym sym; |
15914 | ||
91a5743d PB |
15915 | sym.st_value = osi->sec->output_section->vma |
15916 | + osi->sec->output_offset | |
15917 | + offset; | |
4e617b1e PB |
15918 | sym.st_size = 0; |
15919 | sym.st_other = 0; | |
15920 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 15921 | sym.st_shndx = osi->sec_shndx; |
35fc36a8 | 15922 | sym.st_target_internal = 0; |
fe33d2fa | 15923 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
57402f1e | 15924 | return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
15925 | } |
15926 | ||
34e77a92 RS |
15927 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
15928 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ | |
4e617b1e PB |
15929 | |
15930 | static bfd_boolean | |
34e77a92 RS |
15931 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
15932 | bfd_boolean is_iplt_entry_p, | |
15933 | union gotplt_union *root_plt, | |
15934 | struct arm_plt_info *arm_plt) | |
4e617b1e | 15935 | { |
4e617b1e | 15936 | struct elf32_arm_link_hash_table *htab; |
34e77a92 | 15937 | bfd_vma addr, plt_header_size; |
4e617b1e | 15938 | |
34e77a92 | 15939 | if (root_plt->offset == (bfd_vma) -1) |
4e617b1e PB |
15940 | return TRUE; |
15941 | ||
4dfe6ac6 NC |
15942 | htab = elf32_arm_hash_table (osi->info); |
15943 | if (htab == NULL) | |
15944 | return FALSE; | |
15945 | ||
34e77a92 RS |
15946 | if (is_iplt_entry_p) |
15947 | { | |
15948 | osi->sec = htab->root.iplt; | |
15949 | plt_header_size = 0; | |
15950 | } | |
15951 | else | |
15952 | { | |
15953 | osi->sec = htab->root.splt; | |
15954 | plt_header_size = htab->plt_header_size; | |
15955 | } | |
15956 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section | |
15957 | (osi->info->output_bfd, osi->sec->output_section)); | |
15958 | ||
15959 | addr = root_plt->offset & -2; | |
4e617b1e PB |
15960 | if (htab->symbian_p) |
15961 | { | |
7413f23f | 15962 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 15963 | return FALSE; |
7413f23f | 15964 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
4e617b1e PB |
15965 | return FALSE; |
15966 | } | |
15967 | else if (htab->vxworks_p) | |
15968 | { | |
7413f23f | 15969 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 15970 | return FALSE; |
7413f23f | 15971 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
4e617b1e | 15972 | return FALSE; |
7413f23f | 15973 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
4e617b1e | 15974 | return FALSE; |
7413f23f | 15975 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
4e617b1e PB |
15976 | return FALSE; |
15977 | } | |
b38cadfb NC |
15978 | else if (htab->nacl_p) |
15979 | { | |
15980 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) | |
15981 | return FALSE; | |
15982 | } | |
eed94f8f NC |
15983 | else if (using_thumb_only (htab)) |
15984 | { | |
15985 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr)) | |
15986 | return FALSE; | |
6a631e86 | 15987 | } |
4e617b1e PB |
15988 | else |
15989 | { | |
34e77a92 | 15990 | bfd_boolean thumb_stub_p; |
bd97cb95 | 15991 | |
34e77a92 RS |
15992 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
15993 | if (thumb_stub_p) | |
4e617b1e | 15994 | { |
7413f23f | 15995 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
4e617b1e PB |
15996 | return FALSE; |
15997 | } | |
15998 | #ifdef FOUR_WORD_PLT | |
7413f23f | 15999 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 16000 | return FALSE; |
7413f23f | 16001 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
4e617b1e PB |
16002 | return FALSE; |
16003 | #else | |
906e58ca | 16004 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
16005 | so only need to output a mapping symbol for the first PLT entry and |
16006 | entries with thumb thunks. */ | |
34e77a92 | 16007 | if (thumb_stub_p || addr == plt_header_size) |
4e617b1e | 16008 | { |
7413f23f | 16009 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e PB |
16010 | return FALSE; |
16011 | } | |
16012 | #endif | |
16013 | } | |
16014 | ||
16015 | return TRUE; | |
16016 | } | |
16017 | ||
34e77a92 RS |
16018 | /* Output mapping symbols for PLT entries associated with H. */ |
16019 | ||
16020 | static bfd_boolean | |
16021 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) | |
16022 | { | |
16023 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
16024 | struct elf32_arm_link_hash_entry *eh; | |
16025 | ||
16026 | if (h->root.type == bfd_link_hash_indirect) | |
16027 | return TRUE; | |
16028 | ||
16029 | if (h->root.type == bfd_link_hash_warning) | |
16030 | /* When warning symbols are created, they **replace** the "real" | |
16031 | entry in the hash table, thus we never get to see the real | |
16032 | symbol in a hash traversal. So look at it now. */ | |
16033 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
16034 | ||
16035 | eh = (struct elf32_arm_link_hash_entry *) h; | |
16036 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), | |
16037 | &h->plt, &eh->plt); | |
16038 | } | |
16039 | ||
4f4faa4d TP |
16040 | /* Bind a veneered symbol to its veneer identified by its hash entry |
16041 | STUB_ENTRY. The veneered location thus loose its symbol. */ | |
16042 | ||
16043 | static void | |
16044 | arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry) | |
16045 | { | |
16046 | struct elf32_arm_link_hash_entry *hash = stub_entry->h; | |
16047 | ||
16048 | BFD_ASSERT (hash); | |
16049 | hash->root.root.u.def.section = stub_entry->stub_sec; | |
16050 | hash->root.root.u.def.value = stub_entry->stub_offset; | |
16051 | hash->root.size = stub_entry->stub_size; | |
16052 | } | |
16053 | ||
7413f23f DJ |
16054 | /* Output a single local symbol for a generated stub. */ |
16055 | ||
16056 | static bfd_boolean | |
16057 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, | |
16058 | bfd_vma offset, bfd_vma size) | |
16059 | { | |
7413f23f DJ |
16060 | Elf_Internal_Sym sym; |
16061 | ||
7413f23f DJ |
16062 | sym.st_value = osi->sec->output_section->vma |
16063 | + osi->sec->output_offset | |
16064 | + offset; | |
16065 | sym.st_size = size; | |
16066 | sym.st_other = 0; | |
16067 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
16068 | sym.st_shndx = osi->sec_shndx; | |
35fc36a8 | 16069 | sym.st_target_internal = 0; |
57402f1e | 16070 | return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 16071 | } |
4e617b1e | 16072 | |
da5938a2 | 16073 | static bfd_boolean |
8029a119 NC |
16074 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
16075 | void * in_arg) | |
da5938a2 NC |
16076 | { |
16077 | struct elf32_arm_stub_hash_entry *stub_entry; | |
da5938a2 NC |
16078 | asection *stub_sec; |
16079 | bfd_vma addr; | |
7413f23f | 16080 | char *stub_name; |
9a008db3 | 16081 | output_arch_syminfo *osi; |
d3ce72d0 | 16082 | const insn_sequence *template_sequence; |
461a49ca DJ |
16083 | enum stub_insn_type prev_type; |
16084 | int size; | |
16085 | int i; | |
16086 | enum map_symbol_type sym_type; | |
da5938a2 NC |
16087 | |
16088 | /* Massage our args to the form they really have. */ | |
16089 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 16090 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 16091 | |
da5938a2 NC |
16092 | stub_sec = stub_entry->stub_sec; |
16093 | ||
16094 | /* Ensure this stub is attached to the current section being | |
7413f23f | 16095 | processed. */ |
da5938a2 NC |
16096 | if (stub_sec != osi->sec) |
16097 | return TRUE; | |
16098 | ||
7413f23f | 16099 | addr = (bfd_vma) stub_entry->stub_offset; |
d3ce72d0 | 16100 | template_sequence = stub_entry->stub_template; |
4f4faa4d TP |
16101 | |
16102 | if (arm_stub_sym_claimed (stub_entry->stub_type)) | |
16103 | arm_stub_claim_sym (stub_entry); | |
16104 | else | |
7413f23f | 16105 | { |
4f4faa4d TP |
16106 | stub_name = stub_entry->output_name; |
16107 | switch (template_sequence[0].type) | |
16108 | { | |
16109 | case ARM_TYPE: | |
16110 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, | |
16111 | stub_entry->stub_size)) | |
16112 | return FALSE; | |
16113 | break; | |
16114 | case THUMB16_TYPE: | |
16115 | case THUMB32_TYPE: | |
16116 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, | |
16117 | stub_entry->stub_size)) | |
16118 | return FALSE; | |
16119 | break; | |
16120 | default: | |
16121 | BFD_FAIL (); | |
16122 | return 0; | |
16123 | } | |
7413f23f | 16124 | } |
da5938a2 | 16125 | |
461a49ca DJ |
16126 | prev_type = DATA_TYPE; |
16127 | size = 0; | |
16128 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
16129 | { | |
d3ce72d0 | 16130 | switch (template_sequence[i].type) |
461a49ca DJ |
16131 | { |
16132 | case ARM_TYPE: | |
16133 | sym_type = ARM_MAP_ARM; | |
16134 | break; | |
16135 | ||
16136 | case THUMB16_TYPE: | |
48229727 | 16137 | case THUMB32_TYPE: |
461a49ca DJ |
16138 | sym_type = ARM_MAP_THUMB; |
16139 | break; | |
16140 | ||
16141 | case DATA_TYPE: | |
16142 | sym_type = ARM_MAP_DATA; | |
16143 | break; | |
16144 | ||
16145 | default: | |
16146 | BFD_FAIL (); | |
4e31c731 | 16147 | return FALSE; |
461a49ca DJ |
16148 | } |
16149 | ||
d3ce72d0 | 16150 | if (template_sequence[i].type != prev_type) |
461a49ca | 16151 | { |
d3ce72d0 | 16152 | prev_type = template_sequence[i].type; |
461a49ca DJ |
16153 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
16154 | return FALSE; | |
16155 | } | |
16156 | ||
d3ce72d0 | 16157 | switch (template_sequence[i].type) |
461a49ca DJ |
16158 | { |
16159 | case ARM_TYPE: | |
48229727 | 16160 | case THUMB32_TYPE: |
461a49ca DJ |
16161 | size += 4; |
16162 | break; | |
16163 | ||
16164 | case THUMB16_TYPE: | |
16165 | size += 2; | |
16166 | break; | |
16167 | ||
16168 | case DATA_TYPE: | |
16169 | size += 4; | |
16170 | break; | |
16171 | ||
16172 | default: | |
16173 | BFD_FAIL (); | |
4e31c731 | 16174 | return FALSE; |
461a49ca DJ |
16175 | } |
16176 | } | |
16177 | ||
da5938a2 NC |
16178 | return TRUE; |
16179 | } | |
16180 | ||
33811162 DG |
16181 | /* Output mapping symbols for linker generated sections, |
16182 | and for those data-only sections that do not have a | |
16183 | $d. */ | |
4e617b1e PB |
16184 | |
16185 | static bfd_boolean | |
16186 | elf32_arm_output_arch_local_syms (bfd *output_bfd, | |
906e58ca | 16187 | struct bfd_link_info *info, |
57402f1e | 16188 | void *flaginfo, |
6e0b88f1 AM |
16189 | int (*func) (void *, const char *, |
16190 | Elf_Internal_Sym *, | |
16191 | asection *, | |
16192 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
16193 | { |
16194 | output_arch_syminfo osi; | |
16195 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
16196 | bfd_vma offset; |
16197 | bfd_size_type size; | |
33811162 | 16198 | bfd *input_bfd; |
4e617b1e PB |
16199 | |
16200 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
16201 | if (htab == NULL) |
16202 | return FALSE; | |
16203 | ||
906e58ca | 16204 | check_use_blx (htab); |
91a5743d | 16205 | |
57402f1e | 16206 | osi.flaginfo = flaginfo; |
4e617b1e PB |
16207 | osi.info = info; |
16208 | osi.func = func; | |
906e58ca | 16209 | |
33811162 DG |
16210 | /* Add a $d mapping symbol to data-only sections that |
16211 | don't have any mapping symbol. This may result in (harmless) redundant | |
16212 | mapping symbols. */ | |
16213 | for (input_bfd = info->input_bfds; | |
16214 | input_bfd != NULL; | |
c72f2fb2 | 16215 | input_bfd = input_bfd->link.next) |
33811162 DG |
16216 | { |
16217 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
16218 | for (osi.sec = input_bfd->sections; | |
16219 | osi.sec != NULL; | |
16220 | osi.sec = osi.sec->next) | |
16221 | { | |
16222 | if (osi.sec->output_section != NULL | |
f7dd8c79 DJ |
16223 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
16224 | != 0) | |
33811162 DG |
16225 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
16226 | == SEC_HAS_CONTENTS | |
16227 | && get_arm_elf_section_data (osi.sec) != NULL | |
501abfe0 | 16228 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
7d500b83 CL |
16229 | && osi.sec->size > 0 |
16230 | && (osi.sec->flags & SEC_EXCLUDE) == 0) | |
33811162 DG |
16231 | { |
16232 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16233 | (output_bfd, osi.sec->output_section); | |
16234 | if (osi.sec_shndx != (int)SHN_BAD) | |
16235 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
16236 | } | |
16237 | } | |
16238 | } | |
16239 | ||
91a5743d PB |
16240 | /* ARM->Thumb glue. */ |
16241 | if (htab->arm_glue_size > 0) | |
16242 | { | |
3d4d4302 AM |
16243 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
16244 | ARM2THUMB_GLUE_SECTION_NAME); | |
91a5743d PB |
16245 | |
16246 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16247 | (output_bfd, osi.sec->output_section); | |
0e1862bb | 16248 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable |
91a5743d PB |
16249 | || htab->pic_veneer) |
16250 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
16251 | else if (htab->use_blx) | |
16252 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
16253 | else | |
16254 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 16255 | |
91a5743d PB |
16256 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
16257 | { | |
7413f23f DJ |
16258 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
16259 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
16260 | } |
16261 | } | |
16262 | ||
16263 | /* Thumb->ARM glue. */ | |
16264 | if (htab->thumb_glue_size > 0) | |
16265 | { | |
3d4d4302 AM |
16266 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
16267 | THUMB2ARM_GLUE_SECTION_NAME); | |
91a5743d PB |
16268 | |
16269 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16270 | (output_bfd, osi.sec->output_section); | |
16271 | size = THUMB2ARM_GLUE_SIZE; | |
16272 | ||
16273 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
16274 | { | |
7413f23f DJ |
16275 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
16276 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
16277 | } |
16278 | } | |
16279 | ||
845b51d6 PB |
16280 | /* ARMv4 BX veneers. */ |
16281 | if (htab->bx_glue_size > 0) | |
16282 | { | |
3d4d4302 AM |
16283 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
16284 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
16285 | |
16286 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16287 | (output_bfd, osi.sec->output_section); | |
16288 | ||
7413f23f | 16289 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
16290 | } |
16291 | ||
8029a119 NC |
16292 | /* Long calls stubs. */ |
16293 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
16294 | { | |
da5938a2 | 16295 | asection* stub_sec; |
8029a119 | 16296 | |
da5938a2 NC |
16297 | for (stub_sec = htab->stub_bfd->sections; |
16298 | stub_sec != NULL; | |
8029a119 NC |
16299 | stub_sec = stub_sec->next) |
16300 | { | |
16301 | /* Ignore non-stub sections. */ | |
16302 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
16303 | continue; | |
da5938a2 | 16304 | |
8029a119 | 16305 | osi.sec = stub_sec; |
da5938a2 | 16306 | |
8029a119 NC |
16307 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
16308 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 16309 | |
8029a119 NC |
16310 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
16311 | } | |
16312 | } | |
da5938a2 | 16313 | |
91a5743d | 16314 | /* Finally, output mapping symbols for the PLT. */ |
34e77a92 | 16315 | if (htab->root.splt && htab->root.splt->size > 0) |
4e617b1e | 16316 | { |
34e77a92 RS |
16317 | osi.sec = htab->root.splt; |
16318 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
16319 | (output_bfd, osi.sec->output_section)); | |
16320 | ||
16321 | /* Output mapping symbols for the plt header. SymbianOS does not have a | |
16322 | plt header. */ | |
16323 | if (htab->vxworks_p) | |
16324 | { | |
16325 | /* VxWorks shared libraries have no PLT header. */ | |
0e1862bb | 16326 | if (!bfd_link_pic (info)) |
34e77a92 RS |
16327 | { |
16328 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
16329 | return FALSE; | |
16330 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
16331 | return FALSE; | |
16332 | } | |
16333 | } | |
b38cadfb NC |
16334 | else if (htab->nacl_p) |
16335 | { | |
16336 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
16337 | return FALSE; | |
16338 | } | |
eed94f8f NC |
16339 | else if (using_thumb_only (htab)) |
16340 | { | |
16341 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0)) | |
16342 | return FALSE; | |
16343 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
16344 | return FALSE; | |
16345 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16)) | |
16346 | return FALSE; | |
16347 | } | |
34e77a92 | 16348 | else if (!htab->symbian_p) |
4e617b1e | 16349 | { |
7413f23f | 16350 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e | 16351 | return FALSE; |
34e77a92 RS |
16352 | #ifndef FOUR_WORD_PLT |
16353 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) | |
4e617b1e | 16354 | return FALSE; |
34e77a92 | 16355 | #endif |
4e617b1e PB |
16356 | } |
16357 | } | |
99059e56 RM |
16358 | if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0) |
16359 | { | |
16360 | /* NaCl uses a special first entry in .iplt too. */ | |
16361 | osi.sec = htab->root.iplt; | |
16362 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
16363 | (output_bfd, osi.sec->output_section)); | |
16364 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
16365 | return FALSE; | |
16366 | } | |
34e77a92 RS |
16367 | if ((htab->root.splt && htab->root.splt->size > 0) |
16368 | || (htab->root.iplt && htab->root.iplt->size > 0)) | |
4e617b1e | 16369 | { |
34e77a92 RS |
16370 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
16371 | for (input_bfd = info->input_bfds; | |
16372 | input_bfd != NULL; | |
c72f2fb2 | 16373 | input_bfd = input_bfd->link.next) |
34e77a92 RS |
16374 | { |
16375 | struct arm_local_iplt_info **local_iplt; | |
16376 | unsigned int i, num_syms; | |
4e617b1e | 16377 | |
34e77a92 RS |
16378 | local_iplt = elf32_arm_local_iplt (input_bfd); |
16379 | if (local_iplt != NULL) | |
16380 | { | |
16381 | num_syms = elf_symtab_hdr (input_bfd).sh_info; | |
16382 | for (i = 0; i < num_syms; i++) | |
16383 | if (local_iplt[i] != NULL | |
16384 | && !elf32_arm_output_plt_map_1 (&osi, TRUE, | |
16385 | &local_iplt[i]->root, | |
16386 | &local_iplt[i]->arm)) | |
16387 | return FALSE; | |
16388 | } | |
16389 | } | |
16390 | } | |
0855e32b NS |
16391 | if (htab->dt_tlsdesc_plt != 0) |
16392 | { | |
16393 | /* Mapping symbols for the lazy tls trampoline. */ | |
16394 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt)) | |
16395 | return FALSE; | |
b38cadfb | 16396 | |
0855e32b NS |
16397 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
16398 | htab->dt_tlsdesc_plt + 24)) | |
16399 | return FALSE; | |
16400 | } | |
16401 | if (htab->tls_trampoline != 0) | |
16402 | { | |
16403 | /* Mapping symbols for the tls trampoline. */ | |
16404 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) | |
16405 | return FALSE; | |
16406 | #ifdef FOUR_WORD_PLT | |
16407 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
16408 | htab->tls_trampoline + 12)) | |
16409 | return FALSE; | |
b38cadfb | 16410 | #endif |
0855e32b | 16411 | } |
b38cadfb | 16412 | |
4e617b1e PB |
16413 | return TRUE; |
16414 | } | |
16415 | ||
e489d0ae PB |
16416 | /* Allocate target specific section data. */ |
16417 | ||
16418 | static bfd_boolean | |
16419 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) | |
16420 | { | |
f592407e AM |
16421 | if (!sec->used_by_bfd) |
16422 | { | |
16423 | _arm_elf_section_data *sdata; | |
16424 | bfd_size_type amt = sizeof (*sdata); | |
e489d0ae | 16425 | |
21d799b5 | 16426 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e AM |
16427 | if (sdata == NULL) |
16428 | return FALSE; | |
16429 | sec->used_by_bfd = sdata; | |
16430 | } | |
e489d0ae PB |
16431 | |
16432 | return _bfd_elf_new_section_hook (abfd, sec); | |
16433 | } | |
16434 | ||
16435 | ||
16436 | /* Used to order a list of mapping symbols by address. */ | |
16437 | ||
16438 | static int | |
16439 | elf32_arm_compare_mapping (const void * a, const void * b) | |
16440 | { | |
7f6a71ff JM |
16441 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
16442 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
16443 | ||
16444 | if (amap->vma > bmap->vma) | |
16445 | return 1; | |
16446 | else if (amap->vma < bmap->vma) | |
16447 | return -1; | |
16448 | else if (amap->type > bmap->type) | |
16449 | /* Ensure results do not depend on the host qsort for objects with | |
16450 | multiple mapping symbols at the same address by sorting on type | |
16451 | after vma. */ | |
16452 | return 1; | |
16453 | else if (amap->type < bmap->type) | |
16454 | return -1; | |
16455 | else | |
16456 | return 0; | |
e489d0ae PB |
16457 | } |
16458 | ||
2468f9c9 PB |
16459 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
16460 | ||
16461 | static unsigned long | |
16462 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
16463 | { | |
16464 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
16465 | } | |
16466 | ||
16467 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
16468 | relocations. */ | |
16469 | ||
16470 | static void | |
16471 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
16472 | { | |
16473 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
16474 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
b38cadfb | 16475 | |
2468f9c9 PB |
16476 | /* High bit of first word is supposed to be zero. */ |
16477 | if ((first_word & 0x80000000ul) == 0) | |
16478 | first_word = offset_prel31 (first_word, offset); | |
b38cadfb | 16479 | |
2468f9c9 PB |
16480 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 |
16481 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
16482 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
16483 | second_word = offset_prel31 (second_word, offset); | |
b38cadfb | 16484 | |
2468f9c9 PB |
16485 | bfd_put_32 (output_bfd, first_word, to); |
16486 | bfd_put_32 (output_bfd, second_word, to + 4); | |
16487 | } | |
e489d0ae | 16488 | |
48229727 JB |
16489 | /* Data for make_branch_to_a8_stub(). */ |
16490 | ||
b38cadfb NC |
16491 | struct a8_branch_to_stub_data |
16492 | { | |
48229727 JB |
16493 | asection *writing_section; |
16494 | bfd_byte *contents; | |
16495 | }; | |
16496 | ||
16497 | ||
16498 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
16499 | places for a particular section. */ | |
16500 | ||
16501 | static bfd_boolean | |
16502 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, | |
99059e56 | 16503 | void *in_arg) |
48229727 JB |
16504 | { |
16505 | struct elf32_arm_stub_hash_entry *stub_entry; | |
16506 | struct a8_branch_to_stub_data *data; | |
16507 | bfd_byte *contents; | |
16508 | unsigned long branch_insn; | |
16509 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
16510 | bfd_signed_vma branch_offset; | |
16511 | bfd *abfd; | |
8d9d9490 | 16512 | unsigned int loc; |
48229727 JB |
16513 | |
16514 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
16515 | data = (struct a8_branch_to_stub_data *) in_arg; | |
16516 | ||
16517 | if (stub_entry->target_section != data->writing_section | |
4563a860 | 16518 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
48229727 JB |
16519 | return TRUE; |
16520 | ||
16521 | contents = data->contents; | |
16522 | ||
8d9d9490 TP |
16523 | /* We use target_section as Cortex-A8 erratum workaround stubs are only |
16524 | generated when both source and target are in the same section. */ | |
48229727 JB |
16525 | veneered_insn_loc = stub_entry->target_section->output_section->vma |
16526 | + stub_entry->target_section->output_offset | |
8d9d9490 | 16527 | + stub_entry->source_value; |
48229727 JB |
16528 | |
16529 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
16530 | + stub_entry->stub_sec->output_offset | |
16531 | + stub_entry->stub_offset; | |
16532 | ||
16533 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
16534 | veneered_insn_loc &= ~3u; | |
16535 | ||
16536 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
16537 | ||
16538 | abfd = stub_entry->target_section->owner; | |
8d9d9490 | 16539 | loc = stub_entry->source_value; |
48229727 JB |
16540 | |
16541 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
16542 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
16543 | This check is just to be on the safe side... */ | |
16544 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
16545 | { | |
16546 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is " | |
16547 | "allocated in unsafe location"), abfd); | |
16548 | return FALSE; | |
16549 | } | |
16550 | ||
16551 | switch (stub_entry->stub_type) | |
16552 | { | |
16553 | case arm_stub_a8_veneer_b: | |
16554 | case arm_stub_a8_veneer_b_cond: | |
16555 | branch_insn = 0xf0009000; | |
16556 | goto jump24; | |
16557 | ||
16558 | case arm_stub_a8_veneer_blx: | |
16559 | branch_insn = 0xf000e800; | |
16560 | goto jump24; | |
16561 | ||
16562 | case arm_stub_a8_veneer_bl: | |
16563 | { | |
16564 | unsigned int i1, j1, i2, j2, s; | |
16565 | ||
16566 | branch_insn = 0xf000d000; | |
16567 | ||
16568 | jump24: | |
16569 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
16570 | { | |
16571 | /* There's not much we can do apart from complain if this | |
16572 | happens. */ | |
16573 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out " | |
16574 | "of range (input file too large)"), abfd); | |
16575 | return FALSE; | |
16576 | } | |
16577 | ||
16578 | /* i1 = not(j1 eor s), so: | |
16579 | not i1 = j1 eor s | |
16580 | j1 = (not i1) eor s. */ | |
16581 | ||
16582 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
16583 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
16584 | i2 = (branch_offset >> 22) & 1; | |
16585 | i1 = (branch_offset >> 23) & 1; | |
16586 | s = (branch_offset >> 24) & 1; | |
16587 | j1 = (!i1) ^ s; | |
16588 | j2 = (!i2) ^ s; | |
16589 | branch_insn |= j2 << 11; | |
16590 | branch_insn |= j1 << 13; | |
16591 | branch_insn |= s << 26; | |
16592 | } | |
16593 | break; | |
16594 | ||
16595 | default: | |
16596 | BFD_FAIL (); | |
16597 | return FALSE; | |
16598 | } | |
16599 | ||
8d9d9490 TP |
16600 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]); |
16601 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]); | |
48229727 JB |
16602 | |
16603 | return TRUE; | |
16604 | } | |
16605 | ||
a504d23a LA |
16606 | /* Beginning of stm32l4xx work-around. */ |
16607 | ||
16608 | /* Functions encoding instructions necessary for the emission of the | |
16609 | fix-stm32l4xx-629360. | |
16610 | Encoding is extracted from the | |
16611 | ARM (C) Architecture Reference Manual | |
16612 | ARMv7-A and ARMv7-R edition | |
16613 | ARM DDI 0406C.b (ID072512). */ | |
16614 | ||
16615 | static inline bfd_vma | |
82188b29 | 16616 | create_instruction_branch_absolute (int branch_offset) |
a504d23a LA |
16617 | { |
16618 | /* A8.8.18 B (A8-334) | |
16619 | B target_address (Encoding T4). */ | |
16620 | /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */ | |
16621 | /* jump offset is: S:I1:I2:imm10:imm11:0. */ | |
16622 | /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */ | |
16623 | ||
a504d23a LA |
16624 | int s = ((branch_offset & 0x1000000) >> 24); |
16625 | int j1 = s ^ !((branch_offset & 0x800000) >> 23); | |
16626 | int j2 = s ^ !((branch_offset & 0x400000) >> 22); | |
16627 | ||
16628 | if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24)) | |
16629 | BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch."); | |
16630 | ||
16631 | bfd_vma patched_inst = 0xf0009000 | |
16632 | | s << 26 /* S. */ | |
16633 | | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */ | |
16634 | | j1 << 13 /* J1. */ | |
16635 | | j2 << 11 /* J2. */ | |
16636 | | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */ | |
16637 | ||
16638 | return patched_inst; | |
16639 | } | |
16640 | ||
16641 | static inline bfd_vma | |
16642 | create_instruction_ldmia (int base_reg, int wback, int reg_mask) | |
16643 | { | |
16644 | /* A8.8.57 LDM/LDMIA/LDMFD (A8-396) | |
16645 | LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */ | |
16646 | bfd_vma patched_inst = 0xe8900000 | |
16647 | | (/*W=*/wback << 21) | |
16648 | | (base_reg << 16) | |
16649 | | (reg_mask & 0x0000ffff); | |
16650 | ||
16651 | return patched_inst; | |
16652 | } | |
16653 | ||
16654 | static inline bfd_vma | |
16655 | create_instruction_ldmdb (int base_reg, int wback, int reg_mask) | |
16656 | { | |
16657 | /* A8.8.60 LDMDB/LDMEA (A8-402) | |
16658 | LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */ | |
16659 | bfd_vma patched_inst = 0xe9100000 | |
16660 | | (/*W=*/wback << 21) | |
16661 | | (base_reg << 16) | |
16662 | | (reg_mask & 0x0000ffff); | |
16663 | ||
16664 | return patched_inst; | |
16665 | } | |
16666 | ||
16667 | static inline bfd_vma | |
16668 | create_instruction_mov (int target_reg, int source_reg) | |
16669 | { | |
16670 | /* A8.8.103 MOV (register) (A8-486) | |
16671 | MOV Rd, Rm (Encoding T1). */ | |
16672 | bfd_vma patched_inst = 0x4600 | |
16673 | | (target_reg & 0x7) | |
16674 | | ((target_reg & 0x8) >> 3) << 7 | |
16675 | | (source_reg << 3); | |
16676 | ||
16677 | return patched_inst; | |
16678 | } | |
16679 | ||
16680 | static inline bfd_vma | |
16681 | create_instruction_sub (int target_reg, int source_reg, int value) | |
16682 | { | |
16683 | /* A8.8.221 SUB (immediate) (A8-708) | |
16684 | SUB Rd, Rn, #value (Encoding T3). */ | |
16685 | bfd_vma patched_inst = 0xf1a00000 | |
16686 | | (target_reg << 8) | |
16687 | | (source_reg << 16) | |
16688 | | (/*S=*/0 << 20) | |
16689 | | ((value & 0x800) >> 11) << 26 | |
16690 | | ((value & 0x700) >> 8) << 12 | |
16691 | | (value & 0x0ff); | |
16692 | ||
16693 | return patched_inst; | |
16694 | } | |
16695 | ||
16696 | static inline bfd_vma | |
9239bbd3 | 16697 | create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words, |
a504d23a LA |
16698 | int first_reg) |
16699 | { | |
16700 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
16701 | VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */ |
16702 | bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00) | |
a504d23a LA |
16703 | | (/*W=*/wback << 21) |
16704 | | (base_reg << 16) | |
9239bbd3 CM |
16705 | | (num_words & 0x000000ff) |
16706 | | (((unsigned)first_reg >> 1) & 0x0000000f) << 12 | |
a504d23a LA |
16707 | | (first_reg & 0x00000001) << 22; |
16708 | ||
16709 | return patched_inst; | |
16710 | } | |
16711 | ||
16712 | static inline bfd_vma | |
9239bbd3 CM |
16713 | create_instruction_vldmdb (int base_reg, int is_dp, int num_words, |
16714 | int first_reg) | |
a504d23a LA |
16715 | { |
16716 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
16717 | VLMD{MODE} Rn!, {} (Encoding T1 or T2). */ |
16718 | bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00) | |
a504d23a | 16719 | | (base_reg << 16) |
9239bbd3 CM |
16720 | | (num_words & 0x000000ff) |
16721 | | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12 | |
a504d23a LA |
16722 | | (first_reg & 0x00000001) << 22; |
16723 | ||
16724 | return patched_inst; | |
16725 | } | |
16726 | ||
16727 | static inline bfd_vma | |
16728 | create_instruction_udf_w (int value) | |
16729 | { | |
16730 | /* A8.8.247 UDF (A8-758) | |
16731 | Undefined (Encoding T2). */ | |
16732 | bfd_vma patched_inst = 0xf7f0a000 | |
16733 | | (value & 0x00000fff) | |
16734 | | (value & 0x000f0000) << 16; | |
16735 | ||
16736 | return patched_inst; | |
16737 | } | |
16738 | ||
16739 | static inline bfd_vma | |
16740 | create_instruction_udf (int value) | |
16741 | { | |
16742 | /* A8.8.247 UDF (A8-758) | |
16743 | Undefined (Encoding T1). */ | |
16744 | bfd_vma patched_inst = 0xde00 | |
16745 | | (value & 0xff); | |
16746 | ||
16747 | return patched_inst; | |
16748 | } | |
16749 | ||
16750 | /* Functions writing an instruction in memory, returning the next | |
16751 | memory position to write to. */ | |
16752 | ||
16753 | static inline bfd_byte * | |
16754 | push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab, | |
16755 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
16756 | { | |
16757 | put_thumb2_insn (htab, output_bfd, insn, pt); | |
16758 | return pt + 4; | |
16759 | } | |
16760 | ||
16761 | static inline bfd_byte * | |
16762 | push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab, | |
16763 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
16764 | { | |
16765 | put_thumb_insn (htab, output_bfd, insn, pt); | |
16766 | return pt + 2; | |
16767 | } | |
16768 | ||
16769 | /* Function filling up a region in memory with T1 and T2 UDFs taking | |
16770 | care of alignment. */ | |
16771 | ||
16772 | static bfd_byte * | |
16773 | stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab, | |
16774 | bfd * output_bfd, | |
16775 | const bfd_byte * const base_stub_contents, | |
16776 | bfd_byte * const from_stub_contents, | |
16777 | const bfd_byte * const end_stub_contents) | |
16778 | { | |
16779 | bfd_byte *current_stub_contents = from_stub_contents; | |
16780 | ||
16781 | /* Fill the remaining of the stub with deterministic contents : UDF | |
16782 | instructions. | |
16783 | Check if realignment is needed on modulo 4 frontier using T1, to | |
16784 | further use T2. */ | |
16785 | if ((current_stub_contents < end_stub_contents) | |
16786 | && !((current_stub_contents - base_stub_contents) % 2) | |
16787 | && ((current_stub_contents - base_stub_contents) % 4)) | |
16788 | current_stub_contents = | |
16789 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
16790 | create_instruction_udf (0)); | |
16791 | ||
16792 | for (; current_stub_contents < end_stub_contents;) | |
16793 | current_stub_contents = | |
16794 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16795 | create_instruction_udf_w (0)); | |
16796 | ||
16797 | return current_stub_contents; | |
16798 | } | |
16799 | ||
16800 | /* Functions writing the stream of instructions equivalent to the | |
16801 | derived sequence for ldmia, ldmdb, vldm respectively. */ | |
16802 | ||
16803 | static void | |
16804 | stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab, | |
16805 | bfd * output_bfd, | |
16806 | const insn32 initial_insn, | |
16807 | const bfd_byte *const initial_insn_addr, | |
16808 | bfd_byte *const base_stub_contents) | |
16809 | { | |
16810 | int wback = (initial_insn & 0x00200000) >> 21; | |
16811 | int ri, rn = (initial_insn & 0x000F0000) >> 16; | |
16812 | int insn_all_registers = initial_insn & 0x0000ffff; | |
16813 | int insn_low_registers, insn_high_registers; | |
16814 | int usable_register_mask; | |
16815 | int nb_registers = popcount (insn_all_registers); | |
16816 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; | |
16817 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
16818 | bfd_byte *current_stub_contents = base_stub_contents; | |
16819 | ||
16820 | BFD_ASSERT (is_thumb2_ldmia (initial_insn)); | |
16821 | ||
16822 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
16823 | smaller than 8 registers load sequences that do not cause the | |
16824 | hardware issue. */ | |
16825 | if (nb_registers <= 8) | |
16826 | { | |
16827 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
16828 | current_stub_contents = | |
16829 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16830 | initial_insn); | |
16831 | ||
16832 | /* B initial_insn_addr+4. */ | |
16833 | if (!restore_pc) | |
16834 | current_stub_contents = | |
16835 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16836 | create_instruction_branch_absolute | |
82188b29 NC |
16837 | (initial_insn_addr - current_stub_contents)); |
16838 | ||
a504d23a LA |
16839 | |
16840 | /* Fill the remaining of the stub with deterministic contents. */ | |
16841 | current_stub_contents = | |
16842 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
16843 | base_stub_contents, current_stub_contents, | |
16844 | base_stub_contents + | |
16845 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
16846 | ||
16847 | return; | |
16848 | } | |
16849 | ||
16850 | /* - reg_list[13] == 0. */ | |
16851 | BFD_ASSERT ((insn_all_registers & (1 << 13))==0); | |
16852 | ||
16853 | /* - reg_list[14] & reg_list[15] != 1. */ | |
16854 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
16855 | ||
16856 | /* - if (wback==1) reg_list[rn] == 0. */ | |
16857 | BFD_ASSERT (!wback || !restore_rn); | |
16858 | ||
16859 | /* - nb_registers > 8. */ | |
16860 | BFD_ASSERT (popcount (insn_all_registers) > 8); | |
16861 | ||
16862 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
16863 | ||
16864 | /* In the following algorithm, we split this wide LDM using 2 LDM insns: | |
16865 | - One with the 7 lowest registers (register mask 0x007F) | |
16866 | This LDM will finally contain between 2 and 7 registers | |
16867 | - One with the 7 highest registers (register mask 0xDF80) | |
16868 | This ldm will finally contain between 2 and 7 registers. */ | |
16869 | insn_low_registers = insn_all_registers & 0x007F; | |
16870 | insn_high_registers = insn_all_registers & 0xDF80; | |
16871 | ||
16872 | /* A spare register may be needed during this veneer to temporarily | |
16873 | handle the base register. This register will be restored with the | |
16874 | last LDM operation. | |
16875 | The usable register may be any general purpose register (that | |
16876 | excludes PC, SP, LR : register mask is 0x1FFF). */ | |
16877 | usable_register_mask = 0x1FFF; | |
16878 | ||
16879 | /* Generate the stub function. */ | |
16880 | if (wback) | |
16881 | { | |
16882 | /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */ | |
16883 | current_stub_contents = | |
16884 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16885 | create_instruction_ldmia | |
16886 | (rn, /*wback=*/1, insn_low_registers)); | |
16887 | ||
16888 | /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */ | |
16889 | current_stub_contents = | |
16890 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16891 | create_instruction_ldmia | |
16892 | (rn, /*wback=*/1, insn_high_registers)); | |
16893 | if (!restore_pc) | |
16894 | { | |
16895 | /* B initial_insn_addr+4. */ | |
16896 | current_stub_contents = | |
16897 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16898 | create_instruction_branch_absolute | |
82188b29 | 16899 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
16900 | } |
16901 | } | |
16902 | else /* if (!wback). */ | |
16903 | { | |
16904 | ri = rn; | |
16905 | ||
16906 | /* If Rn is not part of the high-register-list, move it there. */ | |
16907 | if (!(insn_high_registers & (1 << rn))) | |
16908 | { | |
16909 | /* Choose a Ri in the high-register-list that will be restored. */ | |
16910 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
16911 | ||
16912 | /* MOV Ri, Rn. */ | |
16913 | current_stub_contents = | |
16914 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
16915 | create_instruction_mov (ri, rn)); | |
16916 | } | |
16917 | ||
16918 | /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */ | |
16919 | current_stub_contents = | |
16920 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16921 | create_instruction_ldmia | |
16922 | (ri, /*wback=*/1, insn_low_registers)); | |
16923 | ||
16924 | /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */ | |
16925 | current_stub_contents = | |
16926 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16927 | create_instruction_ldmia | |
16928 | (ri, /*wback=*/0, insn_high_registers)); | |
16929 | ||
16930 | if (!restore_pc) | |
16931 | { | |
16932 | /* B initial_insn_addr+4. */ | |
16933 | current_stub_contents = | |
16934 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16935 | create_instruction_branch_absolute | |
82188b29 | 16936 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
16937 | } |
16938 | } | |
16939 | ||
16940 | /* Fill the remaining of the stub with deterministic contents. */ | |
16941 | current_stub_contents = | |
16942 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
16943 | base_stub_contents, current_stub_contents, | |
16944 | base_stub_contents + | |
16945 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
16946 | } | |
16947 | ||
16948 | static void | |
16949 | stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab, | |
16950 | bfd * output_bfd, | |
16951 | const insn32 initial_insn, | |
16952 | const bfd_byte *const initial_insn_addr, | |
16953 | bfd_byte *const base_stub_contents) | |
16954 | { | |
16955 | int wback = (initial_insn & 0x00200000) >> 21; | |
16956 | int ri, rn = (initial_insn & 0x000f0000) >> 16; | |
16957 | int insn_all_registers = initial_insn & 0x0000ffff; | |
16958 | int insn_low_registers, insn_high_registers; | |
16959 | int usable_register_mask; | |
16960 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; | |
16961 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
16962 | int nb_registers = popcount (insn_all_registers); | |
16963 | bfd_byte *current_stub_contents = base_stub_contents; | |
16964 | ||
16965 | BFD_ASSERT (is_thumb2_ldmdb (initial_insn)); | |
16966 | ||
16967 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
16968 | smaller than 8 registers load sequences that do not cause the | |
16969 | hardware issue. */ | |
16970 | if (nb_registers <= 8) | |
16971 | { | |
16972 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
16973 | current_stub_contents = | |
16974 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16975 | initial_insn); | |
16976 | ||
16977 | /* B initial_insn_addr+4. */ | |
16978 | current_stub_contents = | |
16979 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
16980 | create_instruction_branch_absolute | |
82188b29 | 16981 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
16982 | |
16983 | /* Fill the remaining of the stub with deterministic contents. */ | |
16984 | current_stub_contents = | |
16985 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
16986 | base_stub_contents, current_stub_contents, | |
16987 | base_stub_contents + | |
16988 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
16989 | ||
16990 | return; | |
16991 | } | |
16992 | ||
16993 | /* - reg_list[13] == 0. */ | |
16994 | BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0); | |
16995 | ||
16996 | /* - reg_list[14] & reg_list[15] != 1. */ | |
16997 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
16998 | ||
16999 | /* - if (wback==1) reg_list[rn] == 0. */ | |
17000 | BFD_ASSERT (!wback || !restore_rn); | |
17001 | ||
17002 | /* - nb_registers > 8. */ | |
17003 | BFD_ASSERT (popcount (insn_all_registers) > 8); | |
17004 | ||
17005 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
17006 | ||
17007 | /* In the following algorithm, we split this wide LDM using 2 LDM insn: | |
17008 | - One with the 7 lowest registers (register mask 0x007F) | |
17009 | This LDM will finally contain between 2 and 7 registers | |
17010 | - One with the 7 highest registers (register mask 0xDF80) | |
17011 | This ldm will finally contain between 2 and 7 registers. */ | |
17012 | insn_low_registers = insn_all_registers & 0x007F; | |
17013 | insn_high_registers = insn_all_registers & 0xDF80; | |
17014 | ||
17015 | /* A spare register may be needed during this veneer to temporarily | |
17016 | handle the base register. This register will be restored with | |
17017 | the last LDM operation. | |
17018 | The usable register may be any general purpose register (that excludes | |
17019 | PC, SP, LR : register mask is 0x1FFF). */ | |
17020 | usable_register_mask = 0x1FFF; | |
17021 | ||
17022 | /* Generate the stub function. */ | |
17023 | if (!wback && !restore_pc && !restore_rn) | |
17024 | { | |
17025 | /* Choose a Ri in the low-register-list that will be restored. */ | |
17026 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
17027 | ||
17028 | /* MOV Ri, Rn. */ | |
17029 | current_stub_contents = | |
17030 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17031 | create_instruction_mov (ri, rn)); | |
17032 | ||
17033 | /* LDMDB Ri!, {R-high-register-list}. */ | |
17034 | current_stub_contents = | |
17035 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17036 | create_instruction_ldmdb | |
17037 | (ri, /*wback=*/1, insn_high_registers)); | |
17038 | ||
17039 | /* LDMDB Ri, {R-low-register-list}. */ | |
17040 | current_stub_contents = | |
17041 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17042 | create_instruction_ldmdb | |
17043 | (ri, /*wback=*/0, insn_low_registers)); | |
17044 | ||
17045 | /* B initial_insn_addr+4. */ | |
17046 | current_stub_contents = | |
17047 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17048 | create_instruction_branch_absolute | |
82188b29 | 17049 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17050 | } |
17051 | else if (wback && !restore_pc && !restore_rn) | |
17052 | { | |
17053 | /* LDMDB Rn!, {R-high-register-list}. */ | |
17054 | current_stub_contents = | |
17055 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17056 | create_instruction_ldmdb | |
17057 | (rn, /*wback=*/1, insn_high_registers)); | |
17058 | ||
17059 | /* LDMDB Rn!, {R-low-register-list}. */ | |
17060 | current_stub_contents = | |
17061 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17062 | create_instruction_ldmdb | |
17063 | (rn, /*wback=*/1, insn_low_registers)); | |
17064 | ||
17065 | /* B initial_insn_addr+4. */ | |
17066 | current_stub_contents = | |
17067 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17068 | create_instruction_branch_absolute | |
82188b29 | 17069 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17070 | } |
17071 | else if (!wback && restore_pc && !restore_rn) | |
17072 | { | |
17073 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17074 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17075 | ||
17076 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
17077 | current_stub_contents = | |
17078 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17079 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
17080 | ||
17081 | /* LDMIA Ri!, {R-low-register-list}. */ | |
17082 | current_stub_contents = | |
17083 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17084 | create_instruction_ldmia | |
17085 | (ri, /*wback=*/1, insn_low_registers)); | |
17086 | ||
17087 | /* LDMIA Ri, {R-high-register-list}. */ | |
17088 | current_stub_contents = | |
17089 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17090 | create_instruction_ldmia | |
17091 | (ri, /*wback=*/0, insn_high_registers)); | |
17092 | } | |
17093 | else if (wback && restore_pc && !restore_rn) | |
17094 | { | |
17095 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17096 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17097 | ||
17098 | /* SUB Rn, Rn, #(4*nb_registers) */ | |
17099 | current_stub_contents = | |
17100 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17101 | create_instruction_sub (rn, rn, (4 * nb_registers))); | |
17102 | ||
17103 | /* MOV Ri, Rn. */ | |
17104 | current_stub_contents = | |
17105 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17106 | create_instruction_mov (ri, rn)); | |
17107 | ||
17108 | /* LDMIA Ri!, {R-low-register-list}. */ | |
17109 | current_stub_contents = | |
17110 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17111 | create_instruction_ldmia | |
17112 | (ri, /*wback=*/1, insn_low_registers)); | |
17113 | ||
17114 | /* LDMIA Ri, {R-high-register-list}. */ | |
17115 | current_stub_contents = | |
17116 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17117 | create_instruction_ldmia | |
17118 | (ri, /*wback=*/0, insn_high_registers)); | |
17119 | } | |
17120 | else if (!wback && !restore_pc && restore_rn) | |
17121 | { | |
17122 | ri = rn; | |
17123 | if (!(insn_low_registers & (1 << rn))) | |
17124 | { | |
17125 | /* Choose a Ri in the low-register-list that will be restored. */ | |
17126 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
17127 | ||
17128 | /* MOV Ri, Rn. */ | |
17129 | current_stub_contents = | |
17130 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17131 | create_instruction_mov (ri, rn)); | |
17132 | } | |
17133 | ||
17134 | /* LDMDB Ri!, {R-high-register-list}. */ | |
17135 | current_stub_contents = | |
17136 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17137 | create_instruction_ldmdb | |
17138 | (ri, /*wback=*/1, insn_high_registers)); | |
17139 | ||
17140 | /* LDMDB Ri, {R-low-register-list}. */ | |
17141 | current_stub_contents = | |
17142 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17143 | create_instruction_ldmdb | |
17144 | (ri, /*wback=*/0, insn_low_registers)); | |
17145 | ||
17146 | /* B initial_insn_addr+4. */ | |
17147 | current_stub_contents = | |
17148 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17149 | create_instruction_branch_absolute | |
82188b29 | 17150 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17151 | } |
17152 | else if (!wback && restore_pc && restore_rn) | |
17153 | { | |
17154 | ri = rn; | |
17155 | if (!(insn_high_registers & (1 << rn))) | |
17156 | { | |
17157 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17158 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17159 | } | |
17160 | ||
17161 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
17162 | current_stub_contents = | |
17163 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17164 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
17165 | ||
17166 | /* LDMIA Ri!, {R-low-register-list}. */ | |
17167 | current_stub_contents = | |
17168 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17169 | create_instruction_ldmia | |
17170 | (ri, /*wback=*/1, insn_low_registers)); | |
17171 | ||
17172 | /* LDMIA Ri, {R-high-register-list}. */ | |
17173 | current_stub_contents = | |
17174 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17175 | create_instruction_ldmia | |
17176 | (ri, /*wback=*/0, insn_high_registers)); | |
17177 | } | |
17178 | else if (wback && restore_rn) | |
17179 | { | |
17180 | /* The assembler should not have accepted to encode this. */ | |
17181 | BFD_ASSERT (0 && "Cannot patch an instruction that has an " | |
17182 | "undefined behavior.\n"); | |
17183 | } | |
17184 | ||
17185 | /* Fill the remaining of the stub with deterministic contents. */ | |
17186 | current_stub_contents = | |
17187 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17188 | base_stub_contents, current_stub_contents, | |
17189 | base_stub_contents + | |
17190 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
17191 | ||
17192 | } | |
17193 | ||
17194 | static void | |
17195 | stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab, | |
17196 | bfd * output_bfd, | |
17197 | const insn32 initial_insn, | |
17198 | const bfd_byte *const initial_insn_addr, | |
17199 | bfd_byte *const base_stub_contents) | |
17200 | { | |
9239bbd3 | 17201 | int num_words = ((unsigned int) initial_insn << 24) >> 24; |
a504d23a LA |
17202 | bfd_byte *current_stub_contents = base_stub_contents; |
17203 | ||
17204 | BFD_ASSERT (is_thumb2_vldm (initial_insn)); | |
17205 | ||
17206 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
9239bbd3 | 17207 | smaller than 8 words load sequences that do not cause the |
a504d23a | 17208 | hardware issue. */ |
9239bbd3 | 17209 | if (num_words <= 8) |
a504d23a LA |
17210 | { |
17211 | /* Untouched instruction. */ | |
17212 | current_stub_contents = | |
17213 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17214 | initial_insn); | |
17215 | ||
17216 | /* B initial_insn_addr+4. */ | |
17217 | current_stub_contents = | |
17218 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17219 | create_instruction_branch_absolute | |
82188b29 | 17220 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17221 | } |
17222 | else | |
17223 | { | |
9239bbd3 CM |
17224 | bfd_boolean is_dp = /* DP encoding. */ |
17225 | (initial_insn & 0xfe100f00) == 0xec100b00; | |
a504d23a LA |
17226 | bfd_boolean is_ia_nobang = /* (IA without !). */ |
17227 | (((initial_insn << 7) >> 28) & 0xd) == 0x4; | |
17228 | bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */ | |
17229 | (((initial_insn << 7) >> 28) & 0xd) == 0x5; | |
17230 | bfd_boolean is_db_bang = /* (DB with !). */ | |
17231 | (((initial_insn << 7) >> 28) & 0xd) == 0x9; | |
9239bbd3 | 17232 | int base_reg = ((unsigned int) initial_insn << 12) >> 28; |
a504d23a | 17233 | /* d = UInt (Vd:D);. */ |
9239bbd3 | 17234 | int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1) |
a504d23a LA |
17235 | | (((unsigned int)initial_insn << 9) >> 31); |
17236 | ||
9239bbd3 CM |
17237 | /* Compute the number of 8-words chunks needed to split. */ |
17238 | int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8); | |
a504d23a LA |
17239 | int chunk; |
17240 | ||
17241 | /* The test coverage has been done assuming the following | |
17242 | hypothesis that exactly one of the previous is_ predicates is | |
17243 | true. */ | |
9239bbd3 CM |
17244 | BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang) |
17245 | && !(is_ia_nobang & is_ia_bang & is_db_bang)); | |
a504d23a | 17246 | |
9239bbd3 | 17247 | /* We treat the cutting of the words in one pass for all |
a504d23a LA |
17248 | cases, then we emit the adjustments: |
17249 | ||
17250 | vldm rx, {...} | |
17251 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
17252 | -> sub rx, rx, #size (list) | |
17253 | ||
17254 | vldm rx!, {...} | |
17255 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
17256 | This also handles vpop instruction (when rx is sp) | |
17257 | ||
17258 | vldmd rx!, {...} | |
17259 | -> vldmb rx!, {8_words_or_less} for each needed 8_word. */ | |
9239bbd3 | 17260 | for (chunk = 0; chunk < chunks; ++chunk) |
a504d23a | 17261 | { |
9239bbd3 CM |
17262 | bfd_vma new_insn = 0; |
17263 | ||
a504d23a LA |
17264 | if (is_ia_nobang || is_ia_bang) |
17265 | { | |
9239bbd3 CM |
17266 | new_insn = create_instruction_vldmia |
17267 | (base_reg, | |
17268 | is_dp, | |
17269 | /*wback= . */1, | |
17270 | chunks - (chunk + 1) ? | |
17271 | 8 : num_words - chunk * 8, | |
17272 | first_reg + chunk * 8); | |
a504d23a LA |
17273 | } |
17274 | else if (is_db_bang) | |
17275 | { | |
9239bbd3 CM |
17276 | new_insn = create_instruction_vldmdb |
17277 | (base_reg, | |
17278 | is_dp, | |
17279 | chunks - (chunk + 1) ? | |
17280 | 8 : num_words - chunk * 8, | |
17281 | first_reg + chunk * 8); | |
a504d23a | 17282 | } |
9239bbd3 CM |
17283 | |
17284 | if (new_insn) | |
17285 | current_stub_contents = | |
17286 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17287 | new_insn); | |
a504d23a LA |
17288 | } |
17289 | ||
17290 | /* Only this case requires the base register compensation | |
17291 | subtract. */ | |
17292 | if (is_ia_nobang) | |
17293 | { | |
17294 | current_stub_contents = | |
17295 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17296 | create_instruction_sub | |
9239bbd3 | 17297 | (base_reg, base_reg, 4*num_words)); |
a504d23a LA |
17298 | } |
17299 | ||
17300 | /* B initial_insn_addr+4. */ | |
17301 | current_stub_contents = | |
17302 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17303 | create_instruction_branch_absolute | |
82188b29 | 17304 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17305 | } |
17306 | ||
17307 | /* Fill the remaining of the stub with deterministic contents. */ | |
17308 | current_stub_contents = | |
17309 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17310 | base_stub_contents, current_stub_contents, | |
17311 | base_stub_contents + | |
17312 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
17313 | } | |
17314 | ||
17315 | static void | |
17316 | stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab, | |
17317 | bfd * output_bfd, | |
17318 | const insn32 wrong_insn, | |
17319 | const bfd_byte *const wrong_insn_addr, | |
17320 | bfd_byte *const stub_contents) | |
17321 | { | |
17322 | if (is_thumb2_ldmia (wrong_insn)) | |
17323 | stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd, | |
17324 | wrong_insn, wrong_insn_addr, | |
17325 | stub_contents); | |
17326 | else if (is_thumb2_ldmdb (wrong_insn)) | |
17327 | stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd, | |
17328 | wrong_insn, wrong_insn_addr, | |
17329 | stub_contents); | |
17330 | else if (is_thumb2_vldm (wrong_insn)) | |
17331 | stm32l4xx_create_replacing_stub_vldm (htab, output_bfd, | |
17332 | wrong_insn, wrong_insn_addr, | |
17333 | stub_contents); | |
17334 | } | |
17335 | ||
17336 | /* End of stm32l4xx work-around. */ | |
17337 | ||
17338 | ||
491d01d3 YU |
17339 | static void |
17340 | elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info, | |
17341 | asection *output_sec, Elf_Internal_Rela *rel) | |
17342 | { | |
17343 | BFD_ASSERT (output_sec && rel); | |
17344 | struct bfd_elf_section_reloc_data *output_reldata; | |
17345 | struct elf32_arm_link_hash_table *htab; | |
17346 | struct bfd_elf_section_data *oesd = elf_section_data (output_sec); | |
17347 | Elf_Internal_Shdr *rel_hdr; | |
17348 | ||
17349 | ||
17350 | if (oesd->rel.hdr) | |
17351 | { | |
17352 | rel_hdr = oesd->rel.hdr; | |
17353 | output_reldata = &(oesd->rel); | |
17354 | } | |
17355 | else if (oesd->rela.hdr) | |
17356 | { | |
17357 | rel_hdr = oesd->rela.hdr; | |
17358 | output_reldata = &(oesd->rela); | |
17359 | } | |
17360 | else | |
17361 | { | |
17362 | abort (); | |
17363 | } | |
17364 | ||
17365 | bfd_byte *erel = rel_hdr->contents; | |
17366 | erel += output_reldata->count * rel_hdr->sh_entsize; | |
17367 | htab = elf32_arm_hash_table (info); | |
17368 | SWAP_RELOC_OUT (htab) (output_bfd, rel, erel); | |
17369 | output_reldata->count++; | |
17370 | } | |
17371 | ||
e489d0ae PB |
17372 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
17373 | written out as normal. */ | |
17374 | ||
17375 | static bfd_boolean | |
c7b8f16e | 17376 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
17377 | struct bfd_link_info *link_info, |
17378 | asection *sec, | |
e489d0ae PB |
17379 | bfd_byte *contents) |
17380 | { | |
48229727 | 17381 | unsigned int mapcount, errcount; |
8e3de13a | 17382 | _arm_elf_section_data *arm_data; |
c7b8f16e | 17383 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 17384 | elf32_arm_section_map *map; |
c7b8f16e | 17385 | elf32_vfp11_erratum_list *errnode; |
a504d23a | 17386 | elf32_stm32l4xx_erratum_list *stm32l4xx_errnode; |
e489d0ae PB |
17387 | bfd_vma ptr; |
17388 | bfd_vma end; | |
c7b8f16e | 17389 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 17390 | bfd_byte tmp; |
48229727 | 17391 | unsigned int i; |
57e8b36a | 17392 | |
4dfe6ac6 NC |
17393 | if (globals == NULL) |
17394 | return FALSE; | |
17395 | ||
8e3de13a NC |
17396 | /* If this section has not been allocated an _arm_elf_section_data |
17397 | structure then we cannot record anything. */ | |
17398 | arm_data = get_arm_elf_section_data (sec); | |
17399 | if (arm_data == NULL) | |
17400 | return FALSE; | |
17401 | ||
17402 | mapcount = arm_data->mapcount; | |
17403 | map = arm_data->map; | |
c7b8f16e JB |
17404 | errcount = arm_data->erratumcount; |
17405 | ||
17406 | if (errcount != 0) | |
17407 | { | |
17408 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
17409 | ||
17410 | for (errnode = arm_data->erratumlist; errnode != 0; | |
99059e56 RM |
17411 | errnode = errnode->next) |
17412 | { | |
17413 | bfd_vma target = errnode->vma - offset; | |
17414 | ||
17415 | switch (errnode->type) | |
17416 | { | |
17417 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
17418 | { | |
17419 | bfd_vma branch_to_veneer; | |
17420 | /* Original condition code of instruction, plus bit mask for | |
17421 | ARM B instruction. */ | |
17422 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
17423 | | 0x0a000000; | |
c7b8f16e JB |
17424 | |
17425 | /* The instruction is before the label. */ | |
91d6fa6a | 17426 | target -= 4; |
c7b8f16e JB |
17427 | |
17428 | /* Above offset included in -4 below. */ | |
17429 | branch_to_veneer = errnode->u.b.veneer->vma | |
99059e56 | 17430 | - errnode->vma - 4; |
c7b8f16e JB |
17431 | |
17432 | if ((signed) branch_to_veneer < -(1 << 25) | |
17433 | || (signed) branch_to_veneer >= (1 << 25)) | |
17434 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
17435 | "range"), output_bfd); | |
17436 | ||
99059e56 RM |
17437 | insn |= (branch_to_veneer >> 2) & 0xffffff; |
17438 | contents[endianflip ^ target] = insn & 0xff; | |
17439 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
17440 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
17441 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
17442 | } | |
17443 | break; | |
c7b8f16e JB |
17444 | |
17445 | case VFP11_ERRATUM_ARM_VENEER: | |
99059e56 RM |
17446 | { |
17447 | bfd_vma branch_from_veneer; | |
17448 | unsigned int insn; | |
c7b8f16e | 17449 | |
99059e56 RM |
17450 | /* Take size of veneer into account. */ |
17451 | branch_from_veneer = errnode->u.v.branch->vma | |
17452 | - errnode->vma - 12; | |
c7b8f16e JB |
17453 | |
17454 | if ((signed) branch_from_veneer < -(1 << 25) | |
17455 | || (signed) branch_from_veneer >= (1 << 25)) | |
17456 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
17457 | "range"), output_bfd); | |
17458 | ||
99059e56 RM |
17459 | /* Original instruction. */ |
17460 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
17461 | contents[endianflip ^ target] = insn & 0xff; | |
17462 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
17463 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
17464 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
17465 | ||
17466 | /* Branch back to insn after original insn. */ | |
17467 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
17468 | contents[endianflip ^ (target + 4)] = insn & 0xff; | |
17469 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
17470 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
17471 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
17472 | } | |
17473 | break; | |
c7b8f16e | 17474 | |
99059e56 RM |
17475 | default: |
17476 | abort (); | |
17477 | } | |
17478 | } | |
c7b8f16e | 17479 | } |
e489d0ae | 17480 | |
a504d23a LA |
17481 | if (arm_data->stm32l4xx_erratumcount != 0) |
17482 | { | |
17483 | for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist; | |
17484 | stm32l4xx_errnode != 0; | |
17485 | stm32l4xx_errnode = stm32l4xx_errnode->next) | |
17486 | { | |
17487 | bfd_vma target = stm32l4xx_errnode->vma - offset; | |
17488 | ||
17489 | switch (stm32l4xx_errnode->type) | |
17490 | { | |
17491 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
17492 | { | |
17493 | unsigned int insn; | |
17494 | bfd_vma branch_to_veneer = | |
17495 | stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma; | |
17496 | ||
17497 | if ((signed) branch_to_veneer < -(1 << 24) | |
17498 | || (signed) branch_to_veneer >= (1 << 24)) | |
17499 | { | |
17500 | bfd_vma out_of_range = | |
17501 | ((signed) branch_to_veneer < -(1 << 24)) ? | |
17502 | - branch_to_veneer - (1 << 24) : | |
17503 | ((signed) branch_to_veneer >= (1 << 24)) ? | |
17504 | branch_to_veneer - (1 << 24) : 0; | |
17505 | ||
17506 | (*_bfd_error_handler) | |
17507 | (_("%B(%#x): error: Cannot create STM32L4XX veneer. " | |
eee926f2 | 17508 | "Jump out of range by %ld bytes. " |
a504d23a LA |
17509 | "Cannot encode branch instruction. "), |
17510 | output_bfd, | |
eee926f2 | 17511 | (long) (stm32l4xx_errnode->vma - 4), |
a504d23a LA |
17512 | out_of_range); |
17513 | continue; | |
17514 | } | |
17515 | ||
17516 | insn = create_instruction_branch_absolute | |
82188b29 | 17517 | (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma); |
a504d23a LA |
17518 | |
17519 | /* The instruction is before the label. */ | |
17520 | target -= 4; | |
17521 | ||
17522 | put_thumb2_insn (globals, output_bfd, | |
17523 | (bfd_vma) insn, contents + target); | |
17524 | } | |
17525 | break; | |
17526 | ||
17527 | case STM32L4XX_ERRATUM_VENEER: | |
17528 | { | |
82188b29 NC |
17529 | bfd_byte * veneer; |
17530 | bfd_byte * veneer_r; | |
a504d23a LA |
17531 | unsigned int insn; |
17532 | ||
82188b29 NC |
17533 | veneer = contents + target; |
17534 | veneer_r = veneer | |
17535 | + stm32l4xx_errnode->u.b.veneer->vma | |
17536 | - stm32l4xx_errnode->vma - 4; | |
a504d23a LA |
17537 | |
17538 | if ((signed) (veneer_r - veneer - | |
17539 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE > | |
17540 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE ? | |
17541 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE : | |
17542 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24) | |
17543 | || (signed) (veneer_r - veneer) >= (1 << 24)) | |
17544 | { | |
17545 | (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX " | |
17546 | "veneer."), output_bfd); | |
17547 | continue; | |
17548 | } | |
17549 | ||
17550 | /* Original instruction. */ | |
17551 | insn = stm32l4xx_errnode->u.v.branch->u.b.insn; | |
17552 | ||
17553 | stm32l4xx_create_replacing_stub | |
17554 | (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer); | |
17555 | } | |
17556 | break; | |
17557 | ||
17558 | default: | |
17559 | abort (); | |
17560 | } | |
17561 | } | |
17562 | } | |
17563 | ||
2468f9c9 PB |
17564 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
17565 | { | |
17566 | arm_unwind_table_edit *edit_node | |
99059e56 | 17567 | = arm_data->u.exidx.unwind_edit_list; |
2468f9c9 | 17568 | /* Now, sec->size is the size of the section we will write. The original |
99059e56 | 17569 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND |
2468f9c9 PB |
17570 | markers) was sec->rawsize. (This isn't the case if we perform no |
17571 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 17572 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
17573 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
17574 | unsigned int in_index, out_index; | |
17575 | bfd_vma add_to_offsets = 0; | |
17576 | ||
17577 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) | |
99059e56 | 17578 | { |
2468f9c9 PB |
17579 | if (edit_node) |
17580 | { | |
17581 | unsigned int edit_index = edit_node->index; | |
b38cadfb | 17582 | |
2468f9c9 | 17583 | if (in_index < edit_index && in_index * 8 < input_size) |
99059e56 | 17584 | { |
2468f9c9 PB |
17585 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, |
17586 | contents + in_index * 8, add_to_offsets); | |
17587 | out_index++; | |
17588 | in_index++; | |
17589 | } | |
17590 | else if (in_index == edit_index | |
17591 | || (in_index * 8 >= input_size | |
17592 | && edit_index == UINT_MAX)) | |
99059e56 | 17593 | { |
2468f9c9 PB |
17594 | switch (edit_node->type) |
17595 | { | |
17596 | case DELETE_EXIDX_ENTRY: | |
17597 | in_index++; | |
17598 | add_to_offsets += 8; | |
17599 | break; | |
b38cadfb | 17600 | |
2468f9c9 PB |
17601 | case INSERT_EXIDX_CANTUNWIND_AT_END: |
17602 | { | |
99059e56 | 17603 | asection *text_sec = edit_node->linked_section; |
2468f9c9 PB |
17604 | bfd_vma text_offset = text_sec->output_section->vma |
17605 | + text_sec->output_offset | |
17606 | + text_sec->size; | |
17607 | bfd_vma exidx_offset = offset + out_index * 8; | |
99059e56 | 17608 | unsigned long prel31_offset; |
2468f9c9 PB |
17609 | |
17610 | /* Note: this is meant to be equivalent to an | |
17611 | R_ARM_PREL31 relocation. These synthetic | |
17612 | EXIDX_CANTUNWIND markers are not relocated by the | |
17613 | usual BFD method. */ | |
17614 | prel31_offset = (text_offset - exidx_offset) | |
17615 | & 0x7ffffffful; | |
491d01d3 YU |
17616 | if (bfd_link_relocatable (link_info)) |
17617 | { | |
17618 | /* Here relocation for new EXIDX_CANTUNWIND is | |
17619 | created, so there is no need to | |
17620 | adjust offset by hand. */ | |
17621 | prel31_offset = text_sec->output_offset | |
17622 | + text_sec->size; | |
17623 | ||
17624 | /* New relocation entity. */ | |
17625 | asection *text_out = text_sec->output_section; | |
17626 | Elf_Internal_Rela rel; | |
17627 | rel.r_addend = 0; | |
17628 | rel.r_offset = exidx_offset; | |
17629 | rel.r_info = ELF32_R_INFO (text_out->target_index, | |
17630 | R_ARM_PREL31); | |
17631 | ||
17632 | elf32_arm_add_relocation (output_bfd, link_info, | |
17633 | sec->output_section, | |
17634 | &rel); | |
17635 | } | |
2468f9c9 PB |
17636 | |
17637 | /* First address we can't unwind. */ | |
17638 | bfd_put_32 (output_bfd, prel31_offset, | |
17639 | &edited_contents[out_index * 8]); | |
17640 | ||
17641 | /* Code for EXIDX_CANTUNWIND. */ | |
17642 | bfd_put_32 (output_bfd, 0x1, | |
17643 | &edited_contents[out_index * 8 + 4]); | |
17644 | ||
17645 | out_index++; | |
17646 | add_to_offsets -= 8; | |
17647 | } | |
17648 | break; | |
17649 | } | |
b38cadfb | 17650 | |
2468f9c9 PB |
17651 | edit_node = edit_node->next; |
17652 | } | |
17653 | } | |
17654 | else | |
17655 | { | |
17656 | /* No more edits, copy remaining entries verbatim. */ | |
17657 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
17658 | contents + in_index * 8, add_to_offsets); | |
17659 | out_index++; | |
17660 | in_index++; | |
17661 | } | |
17662 | } | |
17663 | ||
17664 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
17665 | bfd_set_section_contents (output_bfd, sec->output_section, | |
17666 | edited_contents, | |
17667 | (file_ptr) sec->output_offset, sec->size); | |
17668 | ||
17669 | return TRUE; | |
17670 | } | |
17671 | ||
48229727 JB |
17672 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
17673 | if (globals->fix_cortex_a8) | |
17674 | { | |
17675 | struct a8_branch_to_stub_data data; | |
17676 | ||
17677 | data.writing_section = sec; | |
17678 | data.contents = contents; | |
17679 | ||
a504d23a LA |
17680 | bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub, |
17681 | & data); | |
48229727 JB |
17682 | } |
17683 | ||
e489d0ae PB |
17684 | if (mapcount == 0) |
17685 | return FALSE; | |
17686 | ||
c7b8f16e | 17687 | if (globals->byteswap_code) |
e489d0ae | 17688 | { |
c7b8f16e | 17689 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 17690 | |
c7b8f16e JB |
17691 | ptr = map[0].vma; |
17692 | for (i = 0; i < mapcount; i++) | |
99059e56 RM |
17693 | { |
17694 | if (i == mapcount - 1) | |
c7b8f16e | 17695 | end = sec->size; |
99059e56 RM |
17696 | else |
17697 | end = map[i + 1].vma; | |
e489d0ae | 17698 | |
99059e56 | 17699 | switch (map[i].type) |
e489d0ae | 17700 | { |
c7b8f16e JB |
17701 | case 'a': |
17702 | /* Byte swap code words. */ | |
17703 | while (ptr + 3 < end) | |
99059e56 RM |
17704 | { |
17705 | tmp = contents[ptr]; | |
17706 | contents[ptr] = contents[ptr + 3]; | |
17707 | contents[ptr + 3] = tmp; | |
17708 | tmp = contents[ptr + 1]; | |
17709 | contents[ptr + 1] = contents[ptr + 2]; | |
17710 | contents[ptr + 2] = tmp; | |
17711 | ptr += 4; | |
17712 | } | |
c7b8f16e | 17713 | break; |
e489d0ae | 17714 | |
c7b8f16e JB |
17715 | case 't': |
17716 | /* Byte swap code halfwords. */ | |
17717 | while (ptr + 1 < end) | |
99059e56 RM |
17718 | { |
17719 | tmp = contents[ptr]; | |
17720 | contents[ptr] = contents[ptr + 1]; | |
17721 | contents[ptr + 1] = tmp; | |
17722 | ptr += 2; | |
17723 | } | |
c7b8f16e JB |
17724 | break; |
17725 | ||
17726 | case 'd': | |
17727 | /* Leave data alone. */ | |
17728 | break; | |
17729 | } | |
99059e56 RM |
17730 | ptr = end; |
17731 | } | |
e489d0ae | 17732 | } |
8e3de13a | 17733 | |
93204d3a | 17734 | free (map); |
47b2e99c | 17735 | arm_data->mapcount = -1; |
c7b8f16e | 17736 | arm_data->mapsize = 0; |
8e3de13a | 17737 | arm_data->map = NULL; |
8e3de13a | 17738 | |
e489d0ae PB |
17739 | return FALSE; |
17740 | } | |
17741 | ||
0beaef2b PB |
17742 | /* Mangle thumb function symbols as we read them in. */ |
17743 | ||
8384fb8f | 17744 | static bfd_boolean |
0beaef2b PB |
17745 | elf32_arm_swap_symbol_in (bfd * abfd, |
17746 | const void *psrc, | |
17747 | const void *pshn, | |
17748 | Elf_Internal_Sym *dst) | |
17749 | { | |
8384fb8f AM |
17750 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
17751 | return FALSE; | |
39d911fc | 17752 | dst->st_target_internal = 0; |
0beaef2b PB |
17753 | |
17754 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
35fc36a8 | 17755 | the address. */ |
63e1a0fc PB |
17756 | if (ELF_ST_TYPE (dst->st_info) == STT_FUNC |
17757 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) | |
0beaef2b | 17758 | { |
63e1a0fc PB |
17759 | if (dst->st_value & 1) |
17760 | { | |
17761 | dst->st_value &= ~(bfd_vma) 1; | |
39d911fc TP |
17762 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, |
17763 | ST_BRANCH_TO_THUMB); | |
63e1a0fc PB |
17764 | } |
17765 | else | |
39d911fc | 17766 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM); |
35fc36a8 RS |
17767 | } |
17768 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) | |
17769 | { | |
17770 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); | |
39d911fc | 17771 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB); |
0beaef2b | 17772 | } |
35fc36a8 | 17773 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
39d911fc | 17774 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG); |
35fc36a8 | 17775 | else |
39d911fc | 17776 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN); |
35fc36a8 | 17777 | |
8384fb8f | 17778 | return TRUE; |
0beaef2b PB |
17779 | } |
17780 | ||
17781 | ||
17782 | /* Mangle thumb function symbols as we write them out. */ | |
17783 | ||
17784 | static void | |
17785 | elf32_arm_swap_symbol_out (bfd *abfd, | |
17786 | const Elf_Internal_Sym *src, | |
17787 | void *cdst, | |
17788 | void *shndx) | |
17789 | { | |
17790 | Elf_Internal_Sym newsym; | |
17791 | ||
17792 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
17793 | of the address set, as per the new EABI. We do this unconditionally | |
17794 | because objcopy does not set the elf header flags until after | |
17795 | it writes out the symbol table. */ | |
39d911fc | 17796 | if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB) |
0beaef2b PB |
17797 | { |
17798 | newsym = *src; | |
34e77a92 RS |
17799 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
17800 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad | 17801 | if (newsym.st_shndx != SHN_UNDEF) |
99059e56 RM |
17802 | { |
17803 | /* Do this only for defined symbols. At link type, the static | |
17804 | linker will simulate the work of dynamic linker of resolving | |
17805 | symbols and will carry over the thumbness of found symbols to | |
17806 | the output symbol table. It's not clear how it happens, but | |
17807 | the thumbness of undefined symbols can well be different at | |
17808 | runtime, and writing '1' for them will be confusing for users | |
17809 | and possibly for dynamic linker itself. | |
17810 | */ | |
17811 | newsym.st_value |= 1; | |
17812 | } | |
906e58ca | 17813 | |
0beaef2b PB |
17814 | src = &newsym; |
17815 | } | |
17816 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
17817 | } | |
17818 | ||
b294bdf8 MM |
17819 | /* Add the PT_ARM_EXIDX program header. */ |
17820 | ||
17821 | static bfd_boolean | |
906e58ca | 17822 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
17823 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
17824 | { | |
17825 | struct elf_segment_map *m; | |
17826 | asection *sec; | |
17827 | ||
17828 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
17829 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
17830 | { | |
17831 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
17832 | want to add another one. This situation arises when running | |
17833 | "strip"; the input binary already has the header. */ | |
12bd6957 | 17834 | m = elf_seg_map (abfd); |
b294bdf8 MM |
17835 | while (m && m->p_type != PT_ARM_EXIDX) |
17836 | m = m->next; | |
17837 | if (!m) | |
17838 | { | |
21d799b5 | 17839 | m = (struct elf_segment_map *) |
99059e56 | 17840 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); |
b294bdf8 MM |
17841 | if (m == NULL) |
17842 | return FALSE; | |
17843 | m->p_type = PT_ARM_EXIDX; | |
17844 | m->count = 1; | |
17845 | m->sections[0] = sec; | |
17846 | ||
12bd6957 AM |
17847 | m->next = elf_seg_map (abfd); |
17848 | elf_seg_map (abfd) = m; | |
b294bdf8 MM |
17849 | } |
17850 | } | |
17851 | ||
17852 | return TRUE; | |
17853 | } | |
17854 | ||
17855 | /* We may add a PT_ARM_EXIDX program header. */ | |
17856 | ||
17857 | static int | |
a6b96beb AM |
17858 | elf32_arm_additional_program_headers (bfd *abfd, |
17859 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
17860 | { |
17861 | asection *sec; | |
17862 | ||
17863 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
17864 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
17865 | return 1; | |
17866 | else | |
17867 | return 0; | |
17868 | } | |
17869 | ||
34e77a92 RS |
17870 | /* Hook called by the linker routine which adds symbols from an object |
17871 | file. */ | |
17872 | ||
17873 | static bfd_boolean | |
17874 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, | |
17875 | Elf_Internal_Sym *sym, const char **namep, | |
17876 | flagword *flagsp, asection **secp, bfd_vma *valp) | |
17877 | { | |
a43942db | 17878 | if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC |
f1885d1e AM |
17879 | && (abfd->flags & DYNAMIC) == 0 |
17880 | && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour) | |
a43942db | 17881 | elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc; |
34e77a92 | 17882 | |
c792917c NC |
17883 | if (elf32_arm_hash_table (info) == NULL) |
17884 | return FALSE; | |
17885 | ||
34e77a92 RS |
17886 | if (elf32_arm_hash_table (info)->vxworks_p |
17887 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, | |
17888 | flagsp, secp, valp)) | |
17889 | return FALSE; | |
17890 | ||
17891 | return TRUE; | |
17892 | } | |
17893 | ||
0beaef2b | 17894 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
17895 | const struct elf_size_info elf32_arm_size_info = |
17896 | { | |
0beaef2b PB |
17897 | sizeof (Elf32_External_Ehdr), |
17898 | sizeof (Elf32_External_Phdr), | |
17899 | sizeof (Elf32_External_Shdr), | |
17900 | sizeof (Elf32_External_Rel), | |
17901 | sizeof (Elf32_External_Rela), | |
17902 | sizeof (Elf32_External_Sym), | |
17903 | sizeof (Elf32_External_Dyn), | |
17904 | sizeof (Elf_External_Note), | |
17905 | 4, | |
17906 | 1, | |
17907 | 32, 2, | |
17908 | ELFCLASS32, EV_CURRENT, | |
17909 | bfd_elf32_write_out_phdrs, | |
17910 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 17911 | bfd_elf32_checksum_contents, |
0beaef2b PB |
17912 | bfd_elf32_write_relocs, |
17913 | elf32_arm_swap_symbol_in, | |
17914 | elf32_arm_swap_symbol_out, | |
17915 | bfd_elf32_slurp_reloc_table, | |
17916 | bfd_elf32_slurp_symbol_table, | |
17917 | bfd_elf32_swap_dyn_in, | |
17918 | bfd_elf32_swap_dyn_out, | |
17919 | bfd_elf32_swap_reloc_in, | |
17920 | bfd_elf32_swap_reloc_out, | |
17921 | bfd_elf32_swap_reloca_in, | |
17922 | bfd_elf32_swap_reloca_out | |
17923 | }; | |
17924 | ||
685e70ae VK |
17925 | static bfd_vma |
17926 | read_code32 (const bfd *abfd, const bfd_byte *addr) | |
17927 | { | |
17928 | /* V7 BE8 code is always little endian. */ | |
17929 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
17930 | return bfd_getl32 (addr); | |
17931 | ||
17932 | return bfd_get_32 (abfd, addr); | |
17933 | } | |
17934 | ||
17935 | static bfd_vma | |
17936 | read_code16 (const bfd *abfd, const bfd_byte *addr) | |
17937 | { | |
17938 | /* V7 BE8 code is always little endian. */ | |
17939 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
17940 | return bfd_getl16 (addr); | |
17941 | ||
17942 | return bfd_get_16 (abfd, addr); | |
17943 | } | |
17944 | ||
6a631e86 YG |
17945 | /* Return size of plt0 entry starting at ADDR |
17946 | or (bfd_vma) -1 if size can not be determined. */ | |
17947 | ||
17948 | static bfd_vma | |
17949 | elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr) | |
17950 | { | |
17951 | bfd_vma first_word; | |
17952 | bfd_vma plt0_size; | |
17953 | ||
685e70ae | 17954 | first_word = read_code32 (abfd, addr); |
6a631e86 YG |
17955 | |
17956 | if (first_word == elf32_arm_plt0_entry[0]) | |
17957 | plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry); | |
17958 | else if (first_word == elf32_thumb2_plt0_entry[0]) | |
17959 | plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
17960 | else | |
17961 | /* We don't yet handle this PLT format. */ | |
17962 | return (bfd_vma) -1; | |
17963 | ||
17964 | return plt0_size; | |
17965 | } | |
17966 | ||
17967 | /* Return size of plt entry starting at offset OFFSET | |
17968 | of plt section located at address START | |
17969 | or (bfd_vma) -1 if size can not be determined. */ | |
17970 | ||
17971 | static bfd_vma | |
17972 | elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset) | |
17973 | { | |
17974 | bfd_vma first_insn; | |
17975 | bfd_vma plt_size = 0; | |
17976 | const bfd_byte *addr = start + offset; | |
17977 | ||
17978 | /* PLT entry size if fixed on Thumb-only platforms. */ | |
685e70ae | 17979 | if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0]) |
6a631e86 YG |
17980 | return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); |
17981 | ||
17982 | /* Respect Thumb stub if necessary. */ | |
685e70ae | 17983 | if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0]) |
6a631e86 YG |
17984 | { |
17985 | plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub); | |
17986 | } | |
17987 | ||
17988 | /* Strip immediate from first add. */ | |
685e70ae | 17989 | first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00; |
6a631e86 YG |
17990 | |
17991 | #ifdef FOUR_WORD_PLT | |
17992 | if (first_insn == elf32_arm_plt_entry[0]) | |
17993 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry); | |
17994 | #else | |
17995 | if (first_insn == elf32_arm_plt_entry_long[0]) | |
17996 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long); | |
17997 | else if (first_insn == elf32_arm_plt_entry_short[0]) | |
17998 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short); | |
17999 | #endif | |
18000 | else | |
18001 | /* We don't yet handle this PLT format. */ | |
18002 | return (bfd_vma) -1; | |
18003 | ||
18004 | return plt_size; | |
18005 | } | |
18006 | ||
18007 | /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */ | |
18008 | ||
18009 | static long | |
18010 | elf32_arm_get_synthetic_symtab (bfd *abfd, | |
18011 | long symcount ATTRIBUTE_UNUSED, | |
18012 | asymbol **syms ATTRIBUTE_UNUSED, | |
18013 | long dynsymcount, | |
18014 | asymbol **dynsyms, | |
18015 | asymbol **ret) | |
18016 | { | |
18017 | asection *relplt; | |
18018 | asymbol *s; | |
18019 | arelent *p; | |
18020 | long count, i, n; | |
18021 | size_t size; | |
18022 | Elf_Internal_Shdr *hdr; | |
18023 | char *names; | |
18024 | asection *plt; | |
18025 | bfd_vma offset; | |
18026 | bfd_byte *data; | |
18027 | ||
18028 | *ret = NULL; | |
18029 | ||
18030 | if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0) | |
18031 | return 0; | |
18032 | ||
18033 | if (dynsymcount <= 0) | |
18034 | return 0; | |
18035 | ||
18036 | relplt = bfd_get_section_by_name (abfd, ".rel.plt"); | |
18037 | if (relplt == NULL) | |
18038 | return 0; | |
18039 | ||
18040 | hdr = &elf_section_data (relplt)->this_hdr; | |
18041 | if (hdr->sh_link != elf_dynsymtab (abfd) | |
18042 | || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA)) | |
18043 | return 0; | |
18044 | ||
18045 | plt = bfd_get_section_by_name (abfd, ".plt"); | |
18046 | if (plt == NULL) | |
18047 | return 0; | |
18048 | ||
18049 | if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE)) | |
18050 | return -1; | |
18051 | ||
18052 | data = plt->contents; | |
18053 | if (data == NULL) | |
18054 | { | |
18055 | if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL) | |
18056 | return -1; | |
18057 | bfd_cache_section_contents((asection *) plt, data); | |
18058 | } | |
18059 | ||
18060 | count = relplt->size / hdr->sh_entsize; | |
18061 | size = count * sizeof (asymbol); | |
18062 | p = relplt->relocation; | |
18063 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
18064 | { | |
18065 | size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt"); | |
18066 | if (p->addend != 0) | |
18067 | size += sizeof ("+0x") - 1 + 8; | |
18068 | } | |
18069 | ||
18070 | s = *ret = (asymbol *) bfd_malloc (size); | |
18071 | if (s == NULL) | |
18072 | return -1; | |
18073 | ||
18074 | offset = elf32_arm_plt0_size (abfd, data); | |
18075 | if (offset == (bfd_vma) -1) | |
18076 | return -1; | |
18077 | ||
18078 | names = (char *) (s + count); | |
18079 | p = relplt->relocation; | |
18080 | n = 0; | |
18081 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
18082 | { | |
18083 | size_t len; | |
18084 | ||
18085 | bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset); | |
18086 | if (plt_size == (bfd_vma) -1) | |
18087 | break; | |
18088 | ||
18089 | *s = **p->sym_ptr_ptr; | |
18090 | /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since | |
18091 | we are defining a symbol, ensure one of them is set. */ | |
18092 | if ((s->flags & BSF_LOCAL) == 0) | |
18093 | s->flags |= BSF_GLOBAL; | |
18094 | s->flags |= BSF_SYNTHETIC; | |
18095 | s->section = plt; | |
18096 | s->value = offset; | |
18097 | s->name = names; | |
18098 | s->udata.p = NULL; | |
18099 | len = strlen ((*p->sym_ptr_ptr)->name); | |
18100 | memcpy (names, (*p->sym_ptr_ptr)->name, len); | |
18101 | names += len; | |
18102 | if (p->addend != 0) | |
18103 | { | |
18104 | char buf[30], *a; | |
18105 | ||
18106 | memcpy (names, "+0x", sizeof ("+0x") - 1); | |
18107 | names += sizeof ("+0x") - 1; | |
18108 | bfd_sprintf_vma (abfd, buf, p->addend); | |
18109 | for (a = buf; *a == '0'; ++a) | |
18110 | ; | |
18111 | len = strlen (a); | |
18112 | memcpy (names, a, len); | |
18113 | names += len; | |
18114 | } | |
18115 | memcpy (names, "@plt", sizeof ("@plt")); | |
18116 | names += sizeof ("@plt"); | |
18117 | ++s, ++n; | |
18118 | offset += plt_size; | |
18119 | } | |
18120 | ||
18121 | return n; | |
18122 | } | |
18123 | ||
ac4c9b04 MG |
18124 | static bfd_boolean |
18125 | elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr) | |
18126 | { | |
18127 | if (hdr->sh_flags & SHF_ARM_NOREAD) | |
18128 | *flags |= SEC_ELF_NOREAD; | |
18129 | return TRUE; | |
18130 | } | |
18131 | ||
18132 | static flagword | |
18133 | elf32_arm_lookup_section_flags (char *flag_name) | |
18134 | { | |
18135 | if (!strcmp (flag_name, "SHF_ARM_NOREAD")) | |
18136 | return SHF_ARM_NOREAD; | |
18137 | ||
18138 | return SEC_NO_FLAGS; | |
18139 | } | |
18140 | ||
491d01d3 YU |
18141 | static unsigned int |
18142 | elf32_arm_count_additional_relocs (asection *sec) | |
18143 | { | |
18144 | struct _arm_elf_section_data *arm_data; | |
18145 | arm_data = get_arm_elf_section_data (sec); | |
18146 | return arm_data->additional_reloc_count; | |
18147 | } | |
18148 | ||
5522f910 NC |
18149 | /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which |
18150 | has a type >= SHT_LOOS. Returns TRUE if these fields were initialised | |
18151 | FALSE otherwise. ISECTION is the best guess matching section from the | |
18152 | input bfd IBFD, but it might be NULL. */ | |
18153 | ||
18154 | static bfd_boolean | |
18155 | elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED, | |
18156 | bfd *obfd ATTRIBUTE_UNUSED, | |
18157 | const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED, | |
18158 | Elf_Internal_Shdr *osection) | |
18159 | { | |
18160 | switch (osection->sh_type) | |
18161 | { | |
18162 | case SHT_ARM_EXIDX: | |
18163 | { | |
18164 | Elf_Internal_Shdr **oheaders = elf_elfsections (obfd); | |
18165 | Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd); | |
18166 | unsigned i = 0; | |
18167 | ||
18168 | osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER; | |
18169 | osection->sh_info = 0; | |
18170 | ||
18171 | /* The sh_link field must be set to the text section associated with | |
18172 | this index section. Unfortunately the ARM EHABI does not specify | |
18173 | exactly how to determine this association. Our caller does try | |
18174 | to match up OSECTION with its corresponding input section however | |
18175 | so that is a good first guess. */ | |
18176 | if (isection != NULL | |
18177 | && osection->bfd_section != NULL | |
18178 | && isection->bfd_section != NULL | |
18179 | && isection->bfd_section->output_section != NULL | |
18180 | && isection->bfd_section->output_section == osection->bfd_section | |
18181 | && iheaders != NULL | |
18182 | && isection->sh_link > 0 | |
18183 | && isection->sh_link < elf_numsections (ibfd) | |
18184 | && iheaders[isection->sh_link]->bfd_section != NULL | |
18185 | && iheaders[isection->sh_link]->bfd_section->output_section != NULL | |
18186 | ) | |
18187 | { | |
18188 | for (i = elf_numsections (obfd); i-- > 0;) | |
18189 | if (oheaders[i]->bfd_section | |
18190 | == iheaders[isection->sh_link]->bfd_section->output_section) | |
18191 | break; | |
18192 | } | |
18193 | ||
18194 | if (i == 0) | |
18195 | { | |
18196 | /* Failing that we have to find a matching section ourselves. If | |
18197 | we had the output section name available we could compare that | |
18198 | with input section names. Unfortunately we don't. So instead | |
18199 | we use a simple heuristic and look for the nearest executable | |
18200 | section before this one. */ | |
18201 | for (i = elf_numsections (obfd); i-- > 0;) | |
18202 | if (oheaders[i] == osection) | |
18203 | break; | |
18204 | if (i == 0) | |
18205 | break; | |
18206 | ||
18207 | while (i-- > 0) | |
18208 | if (oheaders[i]->sh_type == SHT_PROGBITS | |
18209 | && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR)) | |
18210 | == (SHF_ALLOC | SHF_EXECINSTR)) | |
18211 | break; | |
18212 | } | |
18213 | ||
18214 | if (i) | |
18215 | { | |
18216 | osection->sh_link = i; | |
18217 | /* If the text section was part of a group | |
18218 | then the index section should be too. */ | |
18219 | if (oheaders[i]->sh_flags & SHF_GROUP) | |
18220 | osection->sh_flags |= SHF_GROUP; | |
18221 | return TRUE; | |
18222 | } | |
18223 | } | |
18224 | break; | |
18225 | ||
18226 | case SHT_ARM_PREEMPTMAP: | |
18227 | osection->sh_flags = SHF_ALLOC; | |
18228 | break; | |
18229 | ||
18230 | case SHT_ARM_ATTRIBUTES: | |
18231 | case SHT_ARM_DEBUGOVERLAY: | |
18232 | case SHT_ARM_OVERLAYSECTION: | |
18233 | default: | |
18234 | break; | |
18235 | } | |
18236 | ||
18237 | return FALSE; | |
18238 | } | |
18239 | ||
18240 | #undef elf_backend_copy_special_section_fields | |
18241 | #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields | |
18242 | ||
252b5132 | 18243 | #define ELF_ARCH bfd_arch_arm |
ae95ffa6 | 18244 | #define ELF_TARGET_ID ARM_ELF_DATA |
252b5132 | 18245 | #define ELF_MACHINE_CODE EM_ARM |
d0facd1b NC |
18246 | #ifdef __QNXTARGET__ |
18247 | #define ELF_MAXPAGESIZE 0x1000 | |
18248 | #else | |
7572ca89 | 18249 | #define ELF_MAXPAGESIZE 0x10000 |
d0facd1b | 18250 | #endif |
b1342370 | 18251 | #define ELF_MINPAGESIZE 0x1000 |
24718e3b | 18252 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 18253 | |
ba93b8ac DJ |
18254 | #define bfd_elf32_mkobject elf32_arm_mkobject |
18255 | ||
99e4ae17 AJ |
18256 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
18257 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
18258 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
18259 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
18260 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create | |
dc810e39 | 18261 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
b38cadfb | 18262 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
252b5132 | 18263 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
4ab527b0 | 18264 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
e489d0ae | 18265 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 18266 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
3e6b1042 | 18267 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
6a631e86 | 18268 | #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab |
252b5132 RH |
18269 | |
18270 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type | |
18271 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook | |
6a5bb875 | 18272 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
252b5132 RH |
18273 | #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook |
18274 | #define elf_backend_check_relocs elf32_arm_check_relocs | |
dc810e39 | 18275 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 18276 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 18277 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
5e681ec4 | 18278 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
18279 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
18280 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
18281 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
0855e32b | 18282 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
74541ad4 | 18283 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ba96a88f | 18284 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
99e4ae17 | 18285 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 18286 | #define elf_backend_object_p elf32_arm_object_p |
40a18ebd NC |
18287 | #define elf_backend_fake_sections elf32_arm_fake_sections |
18288 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
e16bb312 | 18289 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
5e681ec4 | 18290 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol |
0beaef2b | 18291 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 18292 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
906e58ca NC |
18293 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
18294 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
18295 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing | |
34e77a92 | 18296 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
491d01d3 | 18297 | #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs |
906e58ca NC |
18298 | |
18299 | #define elf_backend_can_refcount 1 | |
18300 | #define elf_backend_can_gc_sections 1 | |
18301 | #define elf_backend_plt_readonly 1 | |
18302 | #define elf_backend_want_got_plt 1 | |
18303 | #define elf_backend_want_plt_sym 0 | |
18304 | #define elf_backend_may_use_rel_p 1 | |
18305 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 18306 | #define elf_backend_default_use_rela_p 0 |
252b5132 | 18307 | |
04f7c78d | 18308 | #define elf_backend_got_header_size 12 |
b68a20d6 | 18309 | #define elf_backend_extern_protected_data 1 |
04f7c78d | 18310 | |
906e58ca NC |
18311 | #undef elf_backend_obj_attrs_vendor |
18312 | #define elf_backend_obj_attrs_vendor "aeabi" | |
18313 | #undef elf_backend_obj_attrs_section | |
18314 | #define elf_backend_obj_attrs_section ".ARM.attributes" | |
18315 | #undef elf_backend_obj_attrs_arg_type | |
18316 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type | |
18317 | #undef elf_backend_obj_attrs_section_type | |
104d59d1 | 18318 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
b38cadfb NC |
18319 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
18320 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown | |
104d59d1 | 18321 | |
ac4c9b04 MG |
18322 | #undef elf_backend_section_flags |
18323 | #define elf_backend_section_flags elf32_arm_section_flags | |
18324 | #undef elf_backend_lookup_section_flags_hook | |
18325 | #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags | |
18326 | ||
252b5132 | 18327 | #include "elf32-target.h" |
7f266840 | 18328 | |
b38cadfb NC |
18329 | /* Native Client targets. */ |
18330 | ||
18331 | #undef TARGET_LITTLE_SYM | |
6d00b590 | 18332 | #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec |
b38cadfb NC |
18333 | #undef TARGET_LITTLE_NAME |
18334 | #define TARGET_LITTLE_NAME "elf32-littlearm-nacl" | |
18335 | #undef TARGET_BIG_SYM | |
6d00b590 | 18336 | #define TARGET_BIG_SYM arm_elf32_nacl_be_vec |
b38cadfb NC |
18337 | #undef TARGET_BIG_NAME |
18338 | #define TARGET_BIG_NAME "elf32-bigarm-nacl" | |
18339 | ||
18340 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
18341 | appropriately for NaCl. */ | |
18342 | ||
18343 | static struct bfd_link_hash_table * | |
18344 | elf32_arm_nacl_link_hash_table_create (bfd *abfd) | |
18345 | { | |
18346 | struct bfd_link_hash_table *ret; | |
18347 | ||
18348 | ret = elf32_arm_link_hash_table_create (abfd); | |
18349 | if (ret) | |
18350 | { | |
18351 | struct elf32_arm_link_hash_table *htab | |
18352 | = (struct elf32_arm_link_hash_table *) ret; | |
18353 | ||
18354 | htab->nacl_p = 1; | |
18355 | ||
18356 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry); | |
18357 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry); | |
18358 | } | |
18359 | return ret; | |
18360 | } | |
18361 | ||
18362 | /* Since NaCl doesn't use the ARM-specific unwind format, we don't | |
18363 | really need to use elf32_arm_modify_segment_map. But we do it | |
18364 | anyway just to reduce gratuitous differences with the stock ARM backend. */ | |
18365 | ||
18366 | static bfd_boolean | |
18367 | elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info) | |
18368 | { | |
18369 | return (elf32_arm_modify_segment_map (abfd, info) | |
18370 | && nacl_modify_segment_map (abfd, info)); | |
18371 | } | |
18372 | ||
887badb3 RM |
18373 | static void |
18374 | elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker) | |
18375 | { | |
18376 | elf32_arm_final_write_processing (abfd, linker); | |
18377 | nacl_final_write_processing (abfd, linker); | |
18378 | } | |
18379 | ||
6a631e86 YG |
18380 | static bfd_vma |
18381 | elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt, | |
18382 | const arelent *rel ATTRIBUTE_UNUSED) | |
18383 | { | |
18384 | return plt->vma | |
18385 | + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) + | |
18386 | i * ARRAY_SIZE (elf32_arm_nacl_plt_entry)); | |
18387 | } | |
887badb3 | 18388 | |
b38cadfb | 18389 | #undef elf32_bed |
6a631e86 | 18390 | #define elf32_bed elf32_arm_nacl_bed |
b38cadfb NC |
18391 | #undef bfd_elf32_bfd_link_hash_table_create |
18392 | #define bfd_elf32_bfd_link_hash_table_create \ | |
18393 | elf32_arm_nacl_link_hash_table_create | |
18394 | #undef elf_backend_plt_alignment | |
6a631e86 | 18395 | #define elf_backend_plt_alignment 4 |
b38cadfb NC |
18396 | #undef elf_backend_modify_segment_map |
18397 | #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map | |
18398 | #undef elf_backend_modify_program_headers | |
18399 | #define elf_backend_modify_program_headers nacl_modify_program_headers | |
887badb3 RM |
18400 | #undef elf_backend_final_write_processing |
18401 | #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing | |
6a631e86 YG |
18402 | #undef bfd_elf32_get_synthetic_symtab |
18403 | #undef elf_backend_plt_sym_val | |
18404 | #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val | |
5522f910 | 18405 | #undef elf_backend_copy_special_section_fields |
b38cadfb | 18406 | |
887badb3 RM |
18407 | #undef ELF_MINPAGESIZE |
18408 | #undef ELF_COMMONPAGESIZE | |
18409 | ||
b38cadfb NC |
18410 | |
18411 | #include "elf32-target.h" | |
18412 | ||
18413 | /* Reset to defaults. */ | |
18414 | #undef elf_backend_plt_alignment | |
18415 | #undef elf_backend_modify_segment_map | |
18416 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map | |
18417 | #undef elf_backend_modify_program_headers | |
887badb3 RM |
18418 | #undef elf_backend_final_write_processing |
18419 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
18420 | #undef ELF_MINPAGESIZE | |
18421 | #define ELF_MINPAGESIZE 0x1000 | |
18422 | #undef ELF_COMMONPAGESIZE | |
18423 | #define ELF_COMMONPAGESIZE 0x1000 | |
18424 | ||
b38cadfb | 18425 | |
906e58ca | 18426 | /* VxWorks Targets. */ |
4e7fd91e | 18427 | |
906e58ca | 18428 | #undef TARGET_LITTLE_SYM |
6d00b590 | 18429 | #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec |
906e58ca | 18430 | #undef TARGET_LITTLE_NAME |
4e7fd91e | 18431 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" |
906e58ca | 18432 | #undef TARGET_BIG_SYM |
6d00b590 | 18433 | #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec |
906e58ca | 18434 | #undef TARGET_BIG_NAME |
4e7fd91e PB |
18435 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" |
18436 | ||
18437 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
18438 | appropriately for VxWorks. */ | |
906e58ca | 18439 | |
4e7fd91e PB |
18440 | static struct bfd_link_hash_table * |
18441 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
18442 | { | |
18443 | struct bfd_link_hash_table *ret; | |
18444 | ||
18445 | ret = elf32_arm_link_hash_table_create (abfd); | |
18446 | if (ret) | |
18447 | { | |
18448 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 18449 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e | 18450 | htab->use_rel = 0; |
00a97672 | 18451 | htab->vxworks_p = 1; |
4e7fd91e PB |
18452 | } |
18453 | return ret; | |
906e58ca | 18454 | } |
4e7fd91e | 18455 | |
00a97672 RS |
18456 | static void |
18457 | elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) | |
18458 | { | |
18459 | elf32_arm_final_write_processing (abfd, linker); | |
18460 | elf_vxworks_final_write_processing (abfd, linker); | |
18461 | } | |
18462 | ||
906e58ca | 18463 | #undef elf32_bed |
4e7fd91e PB |
18464 | #define elf32_bed elf32_arm_vxworks_bed |
18465 | ||
906e58ca NC |
18466 | #undef bfd_elf32_bfd_link_hash_table_create |
18467 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
906e58ca NC |
18468 | #undef elf_backend_final_write_processing |
18469 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
18470 | #undef elf_backend_emit_relocs | |
18471 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs | |
4e7fd91e | 18472 | |
906e58ca | 18473 | #undef elf_backend_may_use_rel_p |
00a97672 | 18474 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 18475 | #undef elf_backend_may_use_rela_p |
00a97672 | 18476 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 18477 | #undef elf_backend_default_use_rela_p |
00a97672 | 18478 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 18479 | #undef elf_backend_want_plt_sym |
00a97672 | 18480 | #define elf_backend_want_plt_sym 1 |
906e58ca | 18481 | #undef ELF_MAXPAGESIZE |
00a97672 | 18482 | #define ELF_MAXPAGESIZE 0x1000 |
4e7fd91e PB |
18483 | |
18484 | #include "elf32-target.h" | |
18485 | ||
18486 | ||
21d799b5 NC |
18487 | /* Merge backend specific data from an object file to the output |
18488 | object file when linking. */ | |
18489 | ||
18490 | static bfd_boolean | |
18491 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
18492 | { | |
18493 | flagword out_flags; | |
18494 | flagword in_flags; | |
18495 | bfd_boolean flags_compatible = TRUE; | |
18496 | asection *sec; | |
18497 | ||
cc643b88 | 18498 | /* Check if we have the same endianness. */ |
21d799b5 NC |
18499 | if (! _bfd_generic_verify_endian_match (ibfd, obfd)) |
18500 | return FALSE; | |
18501 | ||
18502 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
18503 | return TRUE; | |
18504 | ||
18505 | if (!elf32_arm_merge_eabi_attributes (ibfd, obfd)) | |
18506 | return FALSE; | |
18507 | ||
18508 | /* The input BFD must have had its flags initialised. */ | |
18509 | /* The following seems bogus to me -- The flags are initialized in | |
18510 | the assembler but I don't think an elf_flags_init field is | |
18511 | written into the object. */ | |
18512 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
18513 | ||
18514 | in_flags = elf_elfheader (ibfd)->e_flags; | |
18515 | out_flags = elf_elfheader (obfd)->e_flags; | |
18516 | ||
18517 | /* In theory there is no reason why we couldn't handle this. However | |
18518 | in practice it isn't even close to working and there is no real | |
18519 | reason to want it. */ | |
18520 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
18521 | && !(ibfd->flags & DYNAMIC) | |
18522 | && (in_flags & EF_ARM_BE8)) | |
18523 | { | |
18524 | _bfd_error_handler (_("error: %B is already in final BE8 format"), | |
18525 | ibfd); | |
18526 | return FALSE; | |
18527 | } | |
18528 | ||
18529 | if (!elf_flags_init (obfd)) | |
18530 | { | |
18531 | /* If the input is the default architecture and had the default | |
18532 | flags then do not bother setting the flags for the output | |
18533 | architecture, instead allow future merges to do this. If no | |
18534 | future merges ever set these flags then they will retain their | |
99059e56 RM |
18535 | uninitialised values, which surprise surprise, correspond |
18536 | to the default values. */ | |
21d799b5 NC |
18537 | if (bfd_get_arch_info (ibfd)->the_default |
18538 | && elf_elfheader (ibfd)->e_flags == 0) | |
18539 | return TRUE; | |
18540 | ||
18541 | elf_flags_init (obfd) = TRUE; | |
18542 | elf_elfheader (obfd)->e_flags = in_flags; | |
18543 | ||
18544 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
18545 | && bfd_get_arch_info (obfd)->the_default) | |
18546 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
18547 | ||
18548 | return TRUE; | |
18549 | } | |
18550 | ||
18551 | /* Determine what should happen if the input ARM architecture | |
18552 | does not match the output ARM architecture. */ | |
18553 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
18554 | return FALSE; | |
18555 | ||
18556 | /* Identical flags must be compatible. */ | |
18557 | if (in_flags == out_flags) | |
18558 | return TRUE; | |
18559 | ||
18560 | /* Check to see if the input BFD actually contains any sections. If | |
18561 | not, its flags may not have been initialised either, but it | |
18562 | cannot actually cause any incompatiblity. Do not short-circuit | |
18563 | dynamic objects; their section list may be emptied by | |
18564 | elf_link_add_object_symbols. | |
18565 | ||
18566 | Also check to see if there are no code sections in the input. | |
18567 | In this case there is no need to check for code specific flags. | |
18568 | XXX - do we need to worry about floating-point format compatability | |
18569 | in data sections ? */ | |
18570 | if (!(ibfd->flags & DYNAMIC)) | |
18571 | { | |
18572 | bfd_boolean null_input_bfd = TRUE; | |
18573 | bfd_boolean only_data_sections = TRUE; | |
18574 | ||
18575 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
18576 | { | |
18577 | /* Ignore synthetic glue sections. */ | |
18578 | if (strcmp (sec->name, ".glue_7") | |
18579 | && strcmp (sec->name, ".glue_7t")) | |
18580 | { | |
18581 | if ((bfd_get_section_flags (ibfd, sec) | |
18582 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
18583 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
99059e56 | 18584 | only_data_sections = FALSE; |
21d799b5 NC |
18585 | |
18586 | null_input_bfd = FALSE; | |
18587 | break; | |
18588 | } | |
18589 | } | |
18590 | ||
18591 | if (null_input_bfd || only_data_sections) | |
18592 | return TRUE; | |
18593 | } | |
18594 | ||
18595 | /* Complain about various flag mismatches. */ | |
18596 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
18597 | EF_ARM_EABI_VERSION (out_flags))) | |
18598 | { | |
18599 | _bfd_error_handler | |
18600 | (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"), | |
18601 | ibfd, obfd, | |
18602 | (in_flags & EF_ARM_EABIMASK) >> 24, | |
18603 | (out_flags & EF_ARM_EABIMASK) >> 24); | |
18604 | return FALSE; | |
18605 | } | |
18606 | ||
18607 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
18608 | /* VxWorks libraries do not use these flags. */ | |
18609 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
18610 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
18611 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
18612 | { | |
18613 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
18614 | { | |
18615 | _bfd_error_handler | |
18616 | (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"), | |
18617 | ibfd, obfd, | |
18618 | in_flags & EF_ARM_APCS_26 ? 26 : 32, | |
18619 | out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
18620 | flags_compatible = FALSE; | |
18621 | } | |
18622 | ||
18623 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
18624 | { | |
18625 | if (in_flags & EF_ARM_APCS_FLOAT) | |
18626 | _bfd_error_handler | |
18627 | (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"), | |
18628 | ibfd, obfd); | |
18629 | else | |
18630 | _bfd_error_handler | |
18631 | (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"), | |
18632 | ibfd, obfd); | |
18633 | ||
18634 | flags_compatible = FALSE; | |
18635 | } | |
18636 | ||
18637 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
18638 | { | |
18639 | if (in_flags & EF_ARM_VFP_FLOAT) | |
18640 | _bfd_error_handler | |
18641 | (_("error: %B uses VFP instructions, whereas %B does not"), | |
18642 | ibfd, obfd); | |
18643 | else | |
18644 | _bfd_error_handler | |
18645 | (_("error: %B uses FPA instructions, whereas %B does not"), | |
18646 | ibfd, obfd); | |
18647 | ||
18648 | flags_compatible = FALSE; | |
18649 | } | |
18650 | ||
18651 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
18652 | { | |
18653 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
18654 | _bfd_error_handler | |
18655 | (_("error: %B uses Maverick instructions, whereas %B does not"), | |
18656 | ibfd, obfd); | |
18657 | else | |
18658 | _bfd_error_handler | |
18659 | (_("error: %B does not use Maverick instructions, whereas %B does"), | |
18660 | ibfd, obfd); | |
18661 | ||
18662 | flags_compatible = FALSE; | |
18663 | } | |
18664 | ||
18665 | #ifdef EF_ARM_SOFT_FLOAT | |
18666 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
18667 | { | |
18668 | /* We can allow interworking between code that is VFP format | |
18669 | layout, and uses either soft float or integer regs for | |
18670 | passing floating point arguments and results. We already | |
18671 | know that the APCS_FLOAT flags match; similarly for VFP | |
18672 | flags. */ | |
18673 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
18674 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
18675 | { | |
18676 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
18677 | _bfd_error_handler | |
18678 | (_("error: %B uses software FP, whereas %B uses hardware FP"), | |
18679 | ibfd, obfd); | |
18680 | else | |
18681 | _bfd_error_handler | |
18682 | (_("error: %B uses hardware FP, whereas %B uses software FP"), | |
18683 | ibfd, obfd); | |
18684 | ||
18685 | flags_compatible = FALSE; | |
18686 | } | |
18687 | } | |
18688 | #endif | |
18689 | ||
18690 | /* Interworking mismatch is only a warning. */ | |
18691 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
18692 | { | |
18693 | if (in_flags & EF_ARM_INTERWORK) | |
18694 | { | |
18695 | _bfd_error_handler | |
18696 | (_("Warning: %B supports interworking, whereas %B does not"), | |
18697 | ibfd, obfd); | |
18698 | } | |
18699 | else | |
18700 | { | |
18701 | _bfd_error_handler | |
18702 | (_("Warning: %B does not support interworking, whereas %B does"), | |
18703 | ibfd, obfd); | |
18704 | } | |
18705 | } | |
18706 | } | |
18707 | ||
18708 | return flags_compatible; | |
18709 | } | |
18710 | ||
18711 | ||
906e58ca | 18712 | /* Symbian OS Targets. */ |
7f266840 | 18713 | |
906e58ca | 18714 | #undef TARGET_LITTLE_SYM |
6d00b590 | 18715 | #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec |
906e58ca | 18716 | #undef TARGET_LITTLE_NAME |
7f266840 | 18717 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" |
906e58ca | 18718 | #undef TARGET_BIG_SYM |
6d00b590 | 18719 | #define TARGET_BIG_SYM arm_elf32_symbian_be_vec |
906e58ca | 18720 | #undef TARGET_BIG_NAME |
7f266840 DJ |
18721 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" |
18722 | ||
18723 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
18724 | appropriately for Symbian OS. */ | |
906e58ca | 18725 | |
7f266840 DJ |
18726 | static struct bfd_link_hash_table * |
18727 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) | |
18728 | { | |
18729 | struct bfd_link_hash_table *ret; | |
18730 | ||
18731 | ret = elf32_arm_link_hash_table_create (abfd); | |
18732 | if (ret) | |
18733 | { | |
18734 | struct elf32_arm_link_hash_table *htab | |
18735 | = (struct elf32_arm_link_hash_table *)ret; | |
18736 | /* There is no PLT header for Symbian OS. */ | |
18737 | htab->plt_header_size = 0; | |
95720a86 DJ |
18738 | /* The PLT entries are each one instruction and one word. */ |
18739 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); | |
7f266840 | 18740 | htab->symbian_p = 1; |
33bfe774 JB |
18741 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
18742 | htab->use_blx = 1; | |
67687978 | 18743 | htab->root.is_relocatable_executable = 1; |
7f266840 DJ |
18744 | } |
18745 | return ret; | |
906e58ca | 18746 | } |
7f266840 | 18747 | |
b35d266b | 18748 | static const struct bfd_elf_special_section |
551b43fd | 18749 | elf32_arm_symbian_special_sections[] = |
7f266840 | 18750 | { |
5cd3778d MM |
18751 | /* In a BPABI executable, the dynamic linking sections do not go in |
18752 | the loadable read-only segment. The post-linker may wish to | |
18753 | refer to these sections, but they are not part of the final | |
18754 | program image. */ | |
0112cd26 NC |
18755 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
18756 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, | |
18757 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, | |
18758 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, | |
18759 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, | |
5cd3778d MM |
18760 | /* These sections do not need to be writable as the SymbianOS |
18761 | postlinker will arrange things so that no dynamic relocation is | |
18762 | required. */ | |
0112cd26 NC |
18763 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
18764 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, | |
18765 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, | |
18766 | { NULL, 0, 0, 0, 0 } | |
7f266840 DJ |
18767 | }; |
18768 | ||
c3c76620 | 18769 | static void |
906e58ca | 18770 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
a4fd1a8e | 18771 | struct bfd_link_info *link_info) |
c3c76620 MM |
18772 | { |
18773 | /* BPABI objects are never loaded directly by an OS kernel; they are | |
18774 | processed by a postlinker first, into an OS-specific format. If | |
18775 | the D_PAGED bit is set on the file, BFD will align segments on | |
18776 | page boundaries, so that an OS can directly map the file. With | |
18777 | BPABI objects, that just results in wasted space. In addition, | |
18778 | because we clear the D_PAGED bit, map_sections_to_segments will | |
18779 | recognize that the program headers should not be mapped into any | |
18780 | loadable segment. */ | |
18781 | abfd->flags &= ~D_PAGED; | |
906e58ca | 18782 | elf32_arm_begin_write_processing (abfd, link_info); |
c3c76620 | 18783 | } |
7f266840 DJ |
18784 | |
18785 | static bfd_boolean | |
906e58ca | 18786 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
b294bdf8 | 18787 | struct bfd_link_info *info) |
7f266840 DJ |
18788 | { |
18789 | struct elf_segment_map *m; | |
18790 | asection *dynsec; | |
18791 | ||
7f266840 DJ |
18792 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
18793 | segment. However, because the .dynamic section is not marked | |
18794 | with SEC_LOAD, the generic ELF code will not create such a | |
18795 | segment. */ | |
18796 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); | |
18797 | if (dynsec) | |
18798 | { | |
12bd6957 | 18799 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
8ded5a0f AM |
18800 | if (m->p_type == PT_DYNAMIC) |
18801 | break; | |
18802 | ||
18803 | if (m == NULL) | |
18804 | { | |
18805 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); | |
12bd6957 AM |
18806 | m->next = elf_seg_map (abfd); |
18807 | elf_seg_map (abfd) = m; | |
8ded5a0f | 18808 | } |
7f266840 DJ |
18809 | } |
18810 | ||
b294bdf8 MM |
18811 | /* Also call the generic arm routine. */ |
18812 | return elf32_arm_modify_segment_map (abfd, info); | |
7f266840 DJ |
18813 | } |
18814 | ||
95720a86 DJ |
18815 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
18816 | or (bfd_vma) -1 if it should not be included. */ | |
18817 | ||
18818 | static bfd_vma | |
18819 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, | |
18820 | const arelent *rel ATTRIBUTE_UNUSED) | |
18821 | { | |
18822 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; | |
18823 | } | |
18824 | ||
8029a119 | 18825 | #undef elf32_bed |
7f266840 DJ |
18826 | #define elf32_bed elf32_arm_symbian_bed |
18827 | ||
18828 | /* The dynamic sections are not allocated on SymbianOS; the postlinker | |
18829 | will process them and then discard them. */ | |
906e58ca | 18830 | #undef ELF_DYNAMIC_SEC_FLAGS |
7f266840 DJ |
18831 | #define ELF_DYNAMIC_SEC_FLAGS \ |
18832 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) | |
18833 | ||
00a97672 | 18834 | #undef elf_backend_emit_relocs |
c3c76620 | 18835 | |
906e58ca NC |
18836 | #undef bfd_elf32_bfd_link_hash_table_create |
18837 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create | |
18838 | #undef elf_backend_special_sections | |
18839 | #define elf_backend_special_sections elf32_arm_symbian_special_sections | |
18840 | #undef elf_backend_begin_write_processing | |
18841 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing | |
18842 | #undef elf_backend_final_write_processing | |
18843 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
18844 | ||
18845 | #undef elf_backend_modify_segment_map | |
7f266840 DJ |
18846 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
18847 | ||
18848 | /* There is no .got section for BPABI objects, and hence no header. */ | |
906e58ca | 18849 | #undef elf_backend_got_header_size |
7f266840 DJ |
18850 | #define elf_backend_got_header_size 0 |
18851 | ||
18852 | /* Similarly, there is no .got.plt section. */ | |
906e58ca | 18853 | #undef elf_backend_want_got_plt |
7f266840 DJ |
18854 | #define elf_backend_want_got_plt 0 |
18855 | ||
906e58ca | 18856 | #undef elf_backend_plt_sym_val |
95720a86 DJ |
18857 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
18858 | ||
906e58ca | 18859 | #undef elf_backend_may_use_rel_p |
00a97672 | 18860 | #define elf_backend_may_use_rel_p 1 |
906e58ca | 18861 | #undef elf_backend_may_use_rela_p |
00a97672 | 18862 | #define elf_backend_may_use_rela_p 0 |
906e58ca | 18863 | #undef elf_backend_default_use_rela_p |
00a97672 | 18864 | #define elf_backend_default_use_rela_p 0 |
906e58ca | 18865 | #undef elf_backend_want_plt_sym |
00a97672 | 18866 | #define elf_backend_want_plt_sym 0 |
906e58ca | 18867 | #undef ELF_MAXPAGESIZE |
00a97672 | 18868 | #define ELF_MAXPAGESIZE 0x8000 |
4e7fd91e | 18869 | |
7f266840 | 18870 | #include "elf32-target.h" |