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2009-09-01 Tristan Gingold <gingold@adacore.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6 2230 DEF_STUBS
eb7c4339
NS		 2231 /* Note the first a8_veneer type */
2232 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2233};
2234#undef DEF_STUB
2235
2236typedef struct
2237{
d3ce72d0 2238 const insn_sequence* template_sequence;
738a79f6
CL		 2239 int template_size;
2240} stub_def;
2241
2242#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2243static const stub_def stub_definitions[] = {
2244 {NULL, 0},
2245 DEF_STUBS
906e58ca
NC		 2246};
2247
2248struct elf32_arm_stub_hash_entry
2249{
2250 /* Base hash table entry structure. */
2251 struct bfd_hash_entry root;
2252
2253 /* The stub section. */
2254 asection *stub_sec;
2255
2256 /* Offset within stub_sec of the beginning of this stub. */
2257 bfd_vma stub_offset;
2258
2259 /* Given the symbol's value and its section we can determine its final
2260 value when building the stubs (so the stub knows where to jump). */
2261 bfd_vma target_value;
2262 asection *target_section;
2263
48229727
JB		 2264 /* Offset to apply to relocation referencing target_value. */
2265 bfd_vma target_addend;
2266
2267 /* The instruction which caused this stub to be generated (only valid for
2268 Cortex-A8 erratum workaround stubs at present). */
2269 unsigned long orig_insn;
2270
461a49ca 2271 /* The stub type. */
906e58ca 2272 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2273 /* Its encoding size in bytes. */
2274 int stub_size;
2275 /* Its template. */
2276 const insn_sequence *stub_template;
2277 /* The size of the template (number of entries). */
2278 int stub_template_size;
906e58ca
NC		 2279
2280 /* The symbol table entry, if any, that this was derived from. */
2281 struct elf32_arm_link_hash_entry *h;
2282
2283 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2284 unsigned char st_type;
2285
2286 /* Where this stub is being called from, or, in the case of combined
2287 stub sections, the first input section in the group. */
2288 asection *id_sec;
7413f23f
DJ		 2289
2290 /* The name for the local symbol at the start of this stub. The
2291 stub name in the hash table has to be unique; this does not, so
2292 it can be friendlier. */
2293 char *output_name;
906e58ca
NC		 2294};
2295
e489d0ae
PB		 2296/* Used to build a map of a section. This is required for mixed-endian
2297 code/data. */
2298
2299typedef struct elf32_elf_section_map
2300{
2301 bfd_vma vma;
2302 char type;
2303}
2304elf32_arm_section_map;
2305
c7b8f16e
JB		 2306/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2307
2308typedef enum
2309{
2310 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2311 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2312 VFP11_ERRATUM_ARM_VENEER,
2313 VFP11_ERRATUM_THUMB_VENEER
2314}
2315elf32_vfp11_erratum_type;
2316
2317typedef struct elf32_vfp11_erratum_list
2318{
2319 struct elf32_vfp11_erratum_list *next;
2320 bfd_vma vma;
2321 union
2322 {
2323 struct
2324 {
2325 struct elf32_vfp11_erratum_list *veneer;
2326 unsigned int vfp_insn;
2327 } b;
2328 struct
2329 {
2330 struct elf32_vfp11_erratum_list *branch;
2331 unsigned int id;
2332 } v;
2333 } u;
2334 elf32_vfp11_erratum_type type;
2335}
2336elf32_vfp11_erratum_list;
2337
2468f9c9
PB		 2338typedef enum
2339{
2340 DELETE_EXIDX_ENTRY,
2341 INSERT_EXIDX_CANTUNWIND_AT_END
2342}
2343arm_unwind_edit_type;
2344
2345/* A (sorted) list of edits to apply to an unwind table. */
2346typedef struct arm_unwind_table_edit
2347{
2348 arm_unwind_edit_type type;
2349 /* Note: we sometimes want to insert an unwind entry corresponding to a
2350 section different from the one we're currently writing out, so record the
2351 (text) section this edit relates to here. */
2352 asection *linked_section;
2353 unsigned int index;
2354 struct arm_unwind_table_edit *next;
2355}
2356arm_unwind_table_edit;
2357
8e3de13a 2358typedef struct _arm_elf_section_data
e489d0ae 2359{
2468f9c9 2360 /* Information about mapping symbols. */
e489d0ae 2361 struct bfd_elf_section_data elf;
8e3de13a 2362 unsigned int mapcount;
c7b8f16e 2363 unsigned int mapsize;
e489d0ae 2364 elf32_arm_section_map *map;
2468f9c9 2365 /* Information about CPU errata. */
c7b8f16e
JB		 2366 unsigned int erratumcount;
2367 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2368 /* Information about unwind tables. */
2369 union
2370 {
2371 /* Unwind info attached to a text section. */
2372 struct
2373 {
2374 asection *arm_exidx_sec;
2375 } text;
2376
2377 /* Unwind info attached to an .ARM.exidx section. */
2378 struct
2379 {
2380 arm_unwind_table_edit *unwind_edit_list;
2381 arm_unwind_table_edit *unwind_edit_tail;
2382 } exidx;
2383 } u;
8e3de13a
NC		 2384}
2385_arm_elf_section_data;
e489d0ae
PB		 2386
2387#define elf32_arm_section_data(sec) \
8e3de13a 2388 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2389
48229727
JB		 2390/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2391 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2392 so may be created multiple times: we use an array of these entries whilst
2393 relaxing which we can refresh easily, then create stubs for each potentially
2394 erratum-triggering instruction once we've settled on a solution. */
2395
2396struct a8_erratum_fix {
2397 bfd *input_bfd;
2398 asection *section;
2399 bfd_vma offset;
2400 bfd_vma addend;
2401 unsigned long orig_insn;
2402 char *stub_name;
2403 enum elf32_arm_stub_type stub_type;
2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
2412 unsigned int r_type;
2413 unsigned char st_type;
2414 const char *sym_name;
2415 bfd_boolean non_a8_stub;
2416};
2417
ba93b8ac
DJ		 2418/* The size of the thread control block. */
2419#define TCB_SIZE 8
2420
0ffa91dd 2421struct elf_arm_obj_tdata
ba93b8ac
DJ		 2422{
2423 struct elf_obj_tdata root;
2424
2425 /* tls_type for each local got entry. */
2426 char *local_got_tls_type;
ee065d83 2427
bf21ed78
MS		 2428 /* Zero to warn when linking objects with incompatible enum sizes. */
2429 int no_enum_size_warning;
a9dc9481
JM		 2430
2431 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2432 int no_wchar_size_warning;
ba93b8ac
DJ		 2433};
2434
0ffa91dd
NC		 2435#define elf_arm_tdata(bfd) \
2436 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2437
0ffa91dd
NC		 2438#define elf32_arm_local_got_tls_type(bfd) \
2439 (elf_arm_tdata (bfd)->local_got_tls_type)
2440
2441#define is_arm_elf(bfd) \
2442 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2443 && elf_tdata (bfd) != NULL \
2444 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2445
2446static bfd_boolean
2447elf32_arm_mkobject (bfd *abfd)
2448{
0ffa91dd
NC		 2449 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2450 ARM_ELF_TDATA);
ba93b8ac
DJ		 2451}
2452
252b5132
RH		 2453/* The ARM linker needs to keep track of the number of relocs that it
2454 decides to copy in check_relocs for each symbol. This is so that
2455 it can discard PC relative relocs if it doesn't need them when
2456 linking with -Bsymbolic. We store the information in a field
2457 extending the regular ELF linker hash table. */
2458
ba93b8ac
DJ		 2459/* This structure keeps track of the number of relocs we have copied
2460 for a given symbol. */
5e681ec4 2461struct elf32_arm_relocs_copied
917583ad
NC		 2462 {
2463 /* Next section. */
5e681ec4 2464 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2465 /* A section in dynobj. */
2466 asection * section;
2467 /* Number of relocs copied in this section. */
2468 bfd_size_type count;
ba93b8ac
DJ		 2469 /* Number of PC-relative relocs copied in this section. */
2470 bfd_size_type pc_count;
917583ad 2471 };
252b5132 2472
ba93b8ac
DJ		 2473#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2474
ba96a88f 2475/* Arm ELF linker hash entry. */
252b5132 2476struct elf32_arm_link_hash_entry
917583ad
NC		 2477 {
2478 struct elf_link_hash_entry root;
252b5132 2479
917583ad 2480 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2481 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2482
2483 /* We reference count Thumb references to a PLT entry separately,
2484 so that we can emit the Thumb trampoline only if needed. */
2485 bfd_signed_vma plt_thumb_refcount;
2486
bd97cb95
DJ		 2487 /* Some references from Thumb code may be eliminated by BL->BLX
2488 conversion, so record them separately. */
2489 bfd_signed_vma plt_maybe_thumb_refcount;
2490
b7693d02
DJ		 2491 /* Since PLT entries have variable size if the Thumb prologue is
2492 used, we need to record the index into .got.plt instead of
2493 recomputing it from the PLT offset. */
2494 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2495
2496#define GOT_UNKNOWN 0
2497#define GOT_NORMAL 1
2498#define GOT_TLS_GD 2
2499#define GOT_TLS_IE 4
2500 unsigned char tls_type;
a4fd1a8e
PB		 2501
2502 /* The symbol marking the real symbol location for exported thumb
2503 symbols with Arm stubs. */
2504 struct elf_link_hash_entry *export_glue;
906e58ca 2505
da5938a2 2506 /* A pointer to the most recently used stub hash entry against this
8029a119 2507 symbol. */
da5938a2 2508 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2509 };
252b5132 2510
252b5132 2511/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2512#define elf32_arm_link_hash_traverse(table, func, info) \
2513 (elf_link_hash_traverse \
2514 (&(table)->root, \
b7693d02 2515 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2516 (info)))
2517
2518/* Get the ARM elf linker hash table from a link_info structure. */
2519#define elf32_arm_hash_table(info) \
2520 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2521
906e58ca
NC		 2522#define arm_stub_hash_lookup(table, string, create, copy) \
2523 ((struct elf32_arm_stub_hash_entry *) \
2524 bfd_hash_lookup ((table), (string), (create), (copy)))
2525
9b485d32 2526/* ARM ELF linker hash table. */
252b5132 2527struct elf32_arm_link_hash_table
906e58ca
NC		 2528{
2529 /* The main hash table. */
2530 struct elf_link_hash_table root;
252b5132 2531
906e58ca
NC		 2532 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2533 bfd_size_type thumb_glue_size;
252b5132 2534
906e58ca
NC		 2535 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2536 bfd_size_type arm_glue_size;
252b5132 2537
906e58ca
NC		 2538 /* The size in bytes of section containing the ARMv4 BX veneers. */
2539 bfd_size_type bx_glue_size;
845b51d6 2540
906e58ca
NC		 2541 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2542 veneer has been populated. */
2543 bfd_vma bx_glue_offset[15];
845b51d6 2544
906e58ca
NC		 2545 /* The size in bytes of the section containing glue for VFP11 erratum
2546 veneers. */
2547 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2548
48229727
JB		 2549 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2550 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2551 elf32_arm_write_section(). */
2552 struct a8_erratum_fix *a8_erratum_fixes;
2553 unsigned int num_a8_erratum_fixes;
2554
906e58ca
NC		 2555 /* An arbitrary input BFD chosen to hold the glue sections. */
2556 bfd * bfd_of_glue_owner;
ba96a88f 2557
906e58ca
NC		 2558 /* Nonzero to output a BE8 image. */
2559 int byteswap_code;
e489d0ae 2560
906e58ca
NC		 2561 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2562 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2563 int target1_is_rel;
9c504268 2564
906e58ca
NC		 2565 /* The relocation to use for R_ARM_TARGET2 relocations. */
2566 int target2_reloc;
eb043451 2567
906e58ca
NC		 2568 /* 0 = Ignore R_ARM_V4BX.
2569 1 = Convert BX to MOV PC.
2570 2 = Generate v4 interworing stubs. */
2571 int fix_v4bx;
319850b4 2572
48229727
JB		 2573 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2574 int fix_cortex_a8;
2575
906e58ca
NC		 2576 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2577 int use_blx;
33bfe774 2578
906e58ca
NC		 2579 /* What sort of code sequences we should look for which may trigger the
2580 VFP11 denorm erratum. */
2581 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2582
906e58ca
NC		 2583 /* Global counter for the number of fixes we have emitted. */
2584 int num_vfp11_fixes;
c7b8f16e 2585
906e58ca
NC		 2586 /* Nonzero to force PIC branch veneers. */
2587 int pic_veneer;
27e55c4d 2588
906e58ca
NC		 2589 /* The number of bytes in the initial entry in the PLT. */
2590 bfd_size_type plt_header_size;
e5a52504 2591
906e58ca
NC		 2592 /* The number of bytes in the subsequent PLT etries. */
2593 bfd_size_type plt_entry_size;
e5a52504 2594
906e58ca
NC		 2595 /* True if the target system is VxWorks. */
2596 int vxworks_p;
00a97672 2597
906e58ca
NC		 2598 /* True if the target system is Symbian OS. */
2599 int symbian_p;
e5a52504 2600
906e58ca
NC		 2601 /* True if the target uses REL relocations. */
2602 int use_rel;
4e7fd91e 2603
906e58ca
NC		 2604 /* Short-cuts to get to dynamic linker sections. */
2605 asection *sgot;
2606 asection *sgotplt;
2607 asection *srelgot;
2608 asection *splt;
2609 asection *srelplt;
2610 asection *sdynbss;
2611 asection *srelbss;
5e681ec4 2612
906e58ca
NC		 2613 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2614 asection *srelplt2;
00a97672 2615
906e58ca
NC		 2616 /* Data for R_ARM_TLS_LDM32 relocations. */
2617 union
2618 {
2619 bfd_signed_vma refcount;
2620 bfd_vma offset;
2621 } tls_ldm_got;
b7693d02 2622
87d72d41
AM		 2623 /* Small local sym cache. */
2624 struct sym_cache sym_cache;
906e58ca
NC		 2625
2626 /* For convenience in allocate_dynrelocs. */
2627 bfd * obfd;
2628
2629 /* The stub hash table. */
2630 struct bfd_hash_table stub_hash_table;
2631
2632 /* Linker stub bfd. */
2633 bfd *stub_bfd;
2634
2635 /* Linker call-backs. */
2636 asection * (*add_stub_section) (const char *, asection *);
2637 void (*layout_sections_again) (void);
2638
2639 /* Array to keep track of which stub sections have been created, and
2640 information on stub grouping. */
2641 struct map_stub
2642 {
2643 /* This is the section to which stubs in the group will be
2644 attached. */
2645 asection *link_sec;
2646 /* The stub section. */
2647 asection *stub_sec;
2648 } *stub_group;
2649
2650 /* Assorted information used by elf32_arm_size_stubs. */
2651 unsigned int bfd_count;
2652 int top_index;
2653 asection **input_list;
2654};
252b5132 2655
780a67af
NC		 2656/* Create an entry in an ARM ELF linker hash table. */
2657
2658static struct bfd_hash_entry *
57e8b36a
NC		 2659elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2660 struct bfd_hash_table * table,
2661 const char * string)
780a67af
NC		 2662{
2663 struct elf32_arm_link_hash_entry * ret =
2664 (struct elf32_arm_link_hash_entry *) entry;
2665
2666 /* Allocate the structure if it has not already been allocated by a
2667 subclass. */
906e58ca 2668 if (ret == NULL)
57e8b36a
NC		 2669 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2670 if (ret == NULL)
780a67af
NC		 2671 return (struct bfd_hash_entry *) ret;
2672
2673 /* Call the allocation method of the superclass. */
2674 ret = ((struct elf32_arm_link_hash_entry *)
2675 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2676 table, string));
57e8b36a 2677 if (ret != NULL)
b7693d02
DJ		 2678 {
2679 ret->relocs_copied = NULL;
ba93b8ac 2680 ret->tls_type = GOT_UNKNOWN;
b7693d02 2681 ret->plt_thumb_refcount = 0;
bd97cb95 2682 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2683 ret->plt_got_offset = -1;
a4fd1a8e 2684 ret->export_glue = NULL;
906e58ca
NC		 2685
2686 ret->stub_cache = NULL;
b7693d02 2687 }
780a67af
NC		 2688
2689 return (struct bfd_hash_entry *) ret;
2690}
2691
906e58ca
NC		 2692/* Initialize an entry in the stub hash table. */
2693
2694static struct bfd_hash_entry *
2695stub_hash_newfunc (struct bfd_hash_entry *entry,
2696 struct bfd_hash_table *table,
2697 const char *string)
2698{
2699 /* Allocate the structure if it has not already been allocated by a
2700 subclass. */
2701 if (entry == NULL)
2702 {
2703 entry = bfd_hash_allocate (table,
2704 sizeof (struct elf32_arm_stub_hash_entry));
2705 if (entry == NULL)
2706 return entry;
2707 }
2708
2709 /* Call the allocation method of the superclass. */
2710 entry = bfd_hash_newfunc (entry, table, string);
2711 if (entry != NULL)
2712 {
2713 struct elf32_arm_stub_hash_entry *eh;
2714
2715 /* Initialize the local fields. */
2716 eh = (struct elf32_arm_stub_hash_entry *) entry;
2717 eh->stub_sec = NULL;
2718 eh->stub_offset = 0;
2719 eh->target_value = 0;
2720 eh->target_section = NULL;
cedfb179
DK		 2721 eh->target_addend = 0;
2722 eh->orig_insn = 0;
906e58ca 2723 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2724 eh->stub_size = 0;
2725 eh->stub_template = NULL;
2726 eh->stub_template_size = 0;
906e58ca
NC		 2727 eh->h = NULL;
2728 eh->id_sec = NULL;
d8d2f433 2729 eh->output_name = NULL;
906e58ca
NC		 2730 }
2731
2732 return entry;
2733}
2734
00a97672 2735/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2736 shortcuts to them in our hash table. */
2737
2738static bfd_boolean
57e8b36a 2739create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2740{
2741 struct elf32_arm_link_hash_table *htab;
2742
e5a52504
MM		 2743 htab = elf32_arm_hash_table (info);
2744 /* BPABI objects never have a GOT, or associated sections. */
2745 if (htab->symbian_p)
2746 return TRUE;
2747
5e681ec4
PB		 2748 if (! _bfd_elf_create_got_section (dynobj, info))
2749 return FALSE;
2750
5e681ec4
PB		 2751 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2752 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2753 if (!htab->sgot || !htab->sgotplt)
2754 abort ();
2755
64e77c6d
L		 2756 htab->srelgot = bfd_get_section_by_name (dynobj,
2757 RELOC_SECTION (htab, ".got"));
2758 if (htab->srelgot == NULL)
5e681ec4
PB		 2759 return FALSE;
2760 return TRUE;
2761}
2762
00a97672
RS		 2763/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2764 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2765 hash table. */
2766
2767static bfd_boolean
57e8b36a 2768elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2769{
2770 struct elf32_arm_link_hash_table *htab;
2771
2772 htab = elf32_arm_hash_table (info);
2773 if (!htab->sgot && !create_got_section (dynobj, info))
2774 return FALSE;
2775
2776 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2777 return FALSE;
2778
2779 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2780 htab->srelplt = bfd_get_section_by_name (dynobj,
2781 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2782 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2783 if (!info->shared)
00a97672
RS		 2784 htab->srelbss = bfd_get_section_by_name (dynobj,
2785 RELOC_SECTION (htab, ".bss"));
2786
2787 if (htab->vxworks_p)
2788 {
2789 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2790 return FALSE;
2791
2792 if (info->shared)
2793 {
2794 htab->plt_header_size = 0;
2795 htab->plt_entry_size
2796 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2797 }
2798 else
2799 {
2800 htab->plt_header_size
2801 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2802 htab->plt_entry_size
2803 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2804 }
2805 }
5e681ec4 2806
906e58ca 2807 if (!htab->splt
e5a52504
MM		 2808 || !htab->srelplt
2809 || !htab->sdynbss
5e681ec4
PB		 2810 || (!info->shared && !htab->srelbss))
2811 abort ();
2812
2813 return TRUE;
2814}
2815
906e58ca
NC		 2816/* Copy the extra info we tack onto an elf_link_hash_entry. */
2817
2818static void
2819elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2820 struct elf_link_hash_entry *dir,
2821 struct elf_link_hash_entry *ind)
2822{
2823 struct elf32_arm_link_hash_entry *edir, *eind;
2824
2825 edir = (struct elf32_arm_link_hash_entry *) dir;
2826 eind = (struct elf32_arm_link_hash_entry *) ind;
2827
2828 if (eind->relocs_copied != NULL)
2829 {
2830 if (edir->relocs_copied != NULL)
2831 {
2832 struct elf32_arm_relocs_copied **pp;
2833 struct elf32_arm_relocs_copied *p;
2834
2835 /* Add reloc counts against the indirect sym to the direct sym
2836 list. Merge any entries against the same section. */
2837 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2838 {
2839 struct elf32_arm_relocs_copied *q;
2840
2841 for (q = edir->relocs_copied; q != NULL; q = q->next)
2842 if (q->section == p->section)
2843 {
2844 q->pc_count += p->pc_count;
2845 q->count += p->count;
2846 *pp = p->next;
2847 break;
2848 }
2849 if (q == NULL)
2850 pp = &p->next;
2851 }
2852 *pp = edir->relocs_copied;
2853 }
2854
2855 edir->relocs_copied = eind->relocs_copied;
2856 eind->relocs_copied = NULL;
2857 }
2858
2859 if (ind->root.type == bfd_link_hash_indirect)
2860 {
2861 /* Copy over PLT info. */
2862 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2863 eind->plt_thumb_refcount = 0;
2864 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2865 eind->plt_maybe_thumb_refcount = 0;
2866
2867 if (dir->got.refcount <= 0)
2868 {
2869 edir->tls_type = eind->tls_type;
2870 eind->tls_type = GOT_UNKNOWN;
2871 }
2872 }
2873
2874 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2875}
2876
2877/* Create an ARM elf linker hash table. */
2878
2879static struct bfd_link_hash_table *
2880elf32_arm_link_hash_table_create (bfd *abfd)
2881{
2882 struct elf32_arm_link_hash_table *ret;
2883 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2884
2885 ret = bfd_malloc (amt);
2886 if (ret == NULL)
2887 return NULL;
2888
2889 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2890 elf32_arm_link_hash_newfunc,
2891 sizeof (struct elf32_arm_link_hash_entry)))
2892 {
2893 free (ret);
2894 return NULL;
2895 }
2896
2897 ret->sgot = NULL;
2898 ret->sgotplt = NULL;
2899 ret->srelgot = NULL;
2900 ret->splt = NULL;
2901 ret->srelplt = NULL;
2902 ret->sdynbss = NULL;
2903 ret->srelbss = NULL;
2904 ret->srelplt2 = NULL;
2905 ret->thumb_glue_size = 0;
2906 ret->arm_glue_size = 0;
2907 ret->bx_glue_size = 0;
2908 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2909 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2910 ret->vfp11_erratum_glue_size = 0;
2911 ret->num_vfp11_fixes = 0;
48229727 2912 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2913 ret->bfd_of_glue_owner = NULL;
2914 ret->byteswap_code = 0;
2915 ret->target1_is_rel = 0;
2916 ret->target2_reloc = R_ARM_NONE;
2917#ifdef FOUR_WORD_PLT
2918 ret->plt_header_size = 16;
2919 ret->plt_entry_size = 16;
2920#else
2921 ret->plt_header_size = 20;
2922 ret->plt_entry_size = 12;
2923#endif
2924 ret->fix_v4bx = 0;
2925 ret->use_blx = 0;
2926 ret->vxworks_p = 0;
2927 ret->symbian_p = 0;
2928 ret->use_rel = 1;
87d72d41 2929 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2930 ret->obfd = abfd;
2931 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2932 ret->stub_bfd = NULL;
2933 ret->add_stub_section = NULL;
2934 ret->layout_sections_again = NULL;
2935 ret->stub_group = NULL;
2936 ret->bfd_count = 0;
2937 ret->top_index = 0;
2938 ret->input_list = NULL;
906e58ca
NC		 2939
2940 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2941 sizeof (struct elf32_arm_stub_hash_entry)))
2942 {
2943 free (ret);
2944 return NULL;
2945 }
2946
2947 return &ret->root.root;
2948}
2949
2950/* Free the derived linker hash table. */
2951
2952static void
2953elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2954{
2955 struct elf32_arm_link_hash_table *ret
2956 = (struct elf32_arm_link_hash_table *) hash;
2957
2958 bfd_hash_table_free (&ret->stub_hash_table);
2959 _bfd_generic_link_hash_table_free (hash);
2960}
2961
2962/* Determine if we're dealing with a Thumb only architecture. */
2963
2964static bfd_boolean
2965using_thumb_only (struct elf32_arm_link_hash_table *globals)
2966{
2967 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2968 Tag_CPU_arch);
2969 int profile;
2970
2971 if (arch != TAG_CPU_ARCH_V7)
2972 return FALSE;
2973
2974 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2975 Tag_CPU_arch_profile);
2976
2977 return profile == 'M';
2978}
2979
2980/* Determine if we're dealing with a Thumb-2 object. */
2981
2982static bfd_boolean
2983using_thumb2 (struct elf32_arm_link_hash_table *globals)
2984{
2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
2987 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2988}
2989
cd1dac3d
DG		 2990/* Determine what kind of NOPs are available. */
2991
2992static bfd_boolean
2993arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
2994{
2995 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2996 Tag_CPU_arch);
2997 return arch == TAG_CPU_ARCH_V6T2
2998 || arch == TAG_CPU_ARCH_V6K
2999 || arch == TAG_CPU_ARCH_V7;
3000}
3001
3002static bfd_boolean
3003arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3004{
3005 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3006 Tag_CPU_arch);
3007 return arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7;
3008}
3009
f4ac8484
DJ		 3010static bfd_boolean
3011arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3012{
3013 switch (stub_type)
3014 {
fea2b4d6
CL		 3015 case arm_stub_long_branch_thumb_only:
3016 case arm_stub_long_branch_v4t_thumb_arm:
3017 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3018 case arm_stub_long_branch_v4t_thumb_arm_pic:
3019 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3020 return TRUE;
3021 case arm_stub_none:
3022 BFD_FAIL ();
3023 return FALSE;
3024 break;
3025 default:
3026 return FALSE;
3027 }
3028}
3029
906e58ca
NC		 3030/* Determine the type of stub needed, if any, for a call. */
3031
3032static enum elf32_arm_stub_type
3033arm_type_of_stub (struct bfd_link_info *info,
3034 asection *input_sec,
3035 const Elf_Internal_Rela *rel,
3036 unsigned char st_type,
3037 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3038 bfd_vma destination,
3039 asection *sym_sec,
3040 bfd *input_bfd,
3041 const char *name)
906e58ca
NC		 3042{
3043 bfd_vma location;
3044 bfd_signed_vma branch_offset;
3045 unsigned int r_type;
3046 struct elf32_arm_link_hash_table * globals;
3047 int thumb2;
3048 int thumb_only;
3049 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3050 int use_plt = 0;
906e58ca 3051
da5938a2 3052 /* We don't know the actual type of destination in case it is of
8029a119 3053 type STT_SECTION: give up. */
da5938a2
NC		 3054 if (st_type == STT_SECTION)
3055 return stub_type;
3056
906e58ca
NC		 3057 globals = elf32_arm_hash_table (info);
3058
3059 thumb_only = using_thumb_only (globals);
3060
3061 thumb2 = using_thumb2 (globals);
3062
3063 /* Determine where the call point is. */
3064 location = (input_sec->output_offset
3065 + input_sec->output_section->vma
3066 + rel->r_offset);
3067
3068 branch_offset = (bfd_signed_vma)(destination - location);
3069
3070 r_type = ELF32_R_TYPE (rel->r_info);
3071
5fa9e92f 3072 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3073 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3074 {
3075 use_plt = 1;
3076 /* Note when dealing with PLT entries: the main PLT stub is in
3077 ARM mode, so if the branch is in Thumb mode, another
3078 Thumb->ARM stub will be inserted later just before the ARM
3079 PLT stub. We don't take this extra distance into account
3080 here, because if a long branch stub is needed, we'll add a
3081 Thumb->Arm one and branch directly to the ARM PLT entry
3082 because it avoids spreading offset corrections in several
3083 places. */
3084 }
906e58ca 3085
155d87d7 3086 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3087 {
5fa9e92f
CL		 3088 /* Handle cases where:
3089 - this call goes too far (different Thumb/Thumb2 max
3090 distance)
155d87d7
CL		 3091 - it's a Thumb->Arm call and blx is not available, or it's a
3092 Thumb->Arm branch (not bl). A stub is needed in this case,
3093 but only if this call is not through a PLT entry. Indeed,
3094 PLT stubs handle mode switching already.
5fa9e92f 3095 */
906e58ca
NC		 3096 if ((!thumb2
3097 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3098 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3099 || (thumb2
3100 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3101 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3102 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3103 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3104 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3105 && !use_plt))
906e58ca
NC		 3106 {
3107 if (st_type == STT_ARM_TFUNC)
3108 {
3109 /* Thumb to thumb. */
3110 if (!thumb_only)
3111 {
3112 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3113 /* PIC stubs. */
155d87d7
CL		 3114 ? ((globals->use_blx
3115 && (r_type ==R_ARM_THM_CALL))
3116 /* V5T and above. Stub starts with ARM code, so
3117 we must be able to switch mode before
3118 reaching it, which is only possible for 'bl'
3119 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3120 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3121 /* On V4T, use Thumb code only. */
d3626fb0 3122 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3123
3124 /* non-PIC stubs. */
155d87d7
CL		 3125 : ((globals->use_blx
3126 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3127 /* V5T and above. */
3128 ? arm_stub_long_branch_any_any
3129 /* V4T. */
d3626fb0 3130 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3131 }
3132 else
3133 {
3134 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3135 /* PIC stub. */
3136 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3137 /* non-PIC stub. */
3138 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3139 }
3140 }
3141 else
3142 {
3143 /* Thumb to arm. */
c820be07
NC		 3144 if (sym_sec != NULL
3145 && sym_sec->owner != NULL
3146 && !INTERWORK_FLAG (sym_sec->owner))
3147 {
3148 (*_bfd_error_handler)
3149 (_("%B(%s): warning: interworking not enabled.\n"
3150 " first occurrence: %B: Thumb call to ARM"),
3151 sym_sec->owner, input_bfd, name);
3152 }
3153
906e58ca 3154 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3155 /* PIC stubs. */
155d87d7
CL		 3156 ? ((globals->use_blx
3157 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3158 /* V5T and above. */
cf3eccff 3159 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3160 /* V4T PIC stub. */
3161 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3162
3163 /* non-PIC stubs. */
155d87d7
CL		 3164 : ((globals->use_blx
3165 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3166 /* V5T and above. */
3167 ? arm_stub_long_branch_any_any
3168 /* V4T. */
3169 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3170
3171 /* Handle v4t short branches. */
fea2b4d6 3172 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3173 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3174 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3175 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3176 }
3177 }
3178 }
155d87d7 3179 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3180 {
3181 if (st_type == STT_ARM_TFUNC)
3182 {
3183 /* Arm to thumb. */
c820be07
NC		 3184
3185 if (sym_sec != NULL
3186 && sym_sec->owner != NULL
3187 && !INTERWORK_FLAG (sym_sec->owner))
3188 {
3189 (*_bfd_error_handler)
3190 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3191 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3192 sym_sec->owner, input_bfd, name);
3193 }
3194
3195 /* We have an extra 2-bytes reach because of
3196 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3197 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3198 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3199 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3200 || (r_type == R_ARM_JUMP24)
3201 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3202 {
3203 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3204 /* PIC stubs. */
ebe24dd4
CL		 3205 ? ((globals->use_blx)
3206 /* V5T and above. */
3207 ? arm_stub_long_branch_any_thumb_pic
3208 /* V4T stub. */
3209 : arm_stub_long_branch_v4t_arm_thumb_pic)
3210
c2b4a39d
CL		 3211 /* non-PIC stubs. */
3212 : ((globals->use_blx)
3213 /* V5T and above. */
3214 ? arm_stub_long_branch_any_any
3215 /* V4T. */
3216 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3217 }
3218 }
3219 else
3220 {
3221 /* Arm to arm. */
3222 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3223 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3224 {
3225 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3226 /* PIC stubs. */
cf3eccff 3227 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3228 /* non-PIC stubs. */
fea2b4d6 3229 : arm_stub_long_branch_any_any;
906e58ca
NC		 3230 }
3231 }
3232 }
3233
3234 return stub_type;
3235}
3236
3237/* Build a name for an entry in the stub hash table. */
3238
3239static char *
3240elf32_arm_stub_name (const asection *input_section,
3241 const asection *sym_sec,
3242 const struct elf32_arm_link_hash_entry *hash,
3243 const Elf_Internal_Rela *rel)
3244{
3245 char *stub_name;
3246 bfd_size_type len;
3247
3248 if (hash)
3249 {
3250 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3251 stub_name = bfd_malloc (len);
3252 if (stub_name != NULL)
3253 sprintf (stub_name, "%08x_%s+%x",
3254 input_section->id & 0xffffffff,
3255 hash->root.root.root.string,
3256 (int) rel->r_addend & 0xffffffff);
3257 }
3258 else
3259 {
3260 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3261 stub_name = bfd_malloc (len);
3262 if (stub_name != NULL)
3263 sprintf (stub_name, "%08x_%x:%x+%x",
3264 input_section->id & 0xffffffff,
3265 sym_sec->id & 0xffffffff,
3266 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3267 (int) rel->r_addend & 0xffffffff);
3268 }
3269
3270 return stub_name;
3271}
3272
3273/* Look up an entry in the stub hash. Stub entries are cached because
3274 creating the stub name takes a bit of time. */
3275
3276static struct elf32_arm_stub_hash_entry *
3277elf32_arm_get_stub_entry (const asection *input_section,
3278 const asection *sym_sec,
3279 struct elf_link_hash_entry *hash,
3280 const Elf_Internal_Rela *rel,
3281 struct elf32_arm_link_hash_table *htab)
3282{
3283 struct elf32_arm_stub_hash_entry *stub_entry;
3284 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3285 const asection *id_sec;
3286
3287 if ((input_section->flags & SEC_CODE) == 0)
3288 return NULL;
3289
3290 /* If this input section is part of a group of sections sharing one
3291 stub section, then use the id of the first section in the group.
3292 Stub names need to include a section id, as there may well be
3293 more than one stub used to reach say, printf, and we need to
3294 distinguish between them. */
3295 id_sec = htab->stub_group[input_section->id].link_sec;
3296
3297 if (h != NULL && h->stub_cache != NULL
3298 && h->stub_cache->h == h
3299 && h->stub_cache->id_sec == id_sec)
3300 {
3301 stub_entry = h->stub_cache;
3302 }
3303 else
3304 {
3305 char *stub_name;
3306
3307 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3308 if (stub_name == NULL)
3309 return NULL;
3310
3311 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3312 stub_name, FALSE, FALSE);
3313 if (h != NULL)
3314 h->stub_cache = stub_entry;
3315
3316 free (stub_name);
3317 }
3318
3319 return stub_entry;
3320}
3321
48229727
JB		 3322/* Find or create a stub section. Returns a pointer to the stub section, and
3323 the section to which the stub section will be attached (in *LINK_SEC_P).
3324 LINK_SEC_P may be NULL. */
906e58ca 3325
48229727
JB		 3326static asection *
3327elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3328 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3329{
3330 asection *link_sec;
3331 asection *stub_sec;
906e58ca
NC		 3332
3333 link_sec = htab->stub_group[section->id].link_sec;
3334 stub_sec = htab->stub_group[section->id].stub_sec;
3335 if (stub_sec == NULL)
3336 {
3337 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3338 if (stub_sec == NULL)
3339 {
3340 size_t namelen;
3341 bfd_size_type len;
3342 char *s_name;
3343
3344 namelen = strlen (link_sec->name);
3345 len = namelen + sizeof (STUB_SUFFIX);
3346 s_name = bfd_alloc (htab->stub_bfd, len);
3347 if (s_name == NULL)
3348 return NULL;
3349
3350 memcpy (s_name, link_sec->name, namelen);
3351 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3352 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3353 if (stub_sec == NULL)
3354 return NULL;
3355 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3356 }
3357 htab->stub_group[section->id].stub_sec = stub_sec;
3358 }
48229727
JB		 3359
3360 if (link_sec_p)
3361 *link_sec_p = link_sec;
3362
3363 return stub_sec;
3364}
3365
3366/* Add a new stub entry to the stub hash. Not all fields of the new
3367 stub entry are initialised. */
3368
3369static struct elf32_arm_stub_hash_entry *
3370elf32_arm_add_stub (const char *stub_name,
3371 asection *section,
3372 struct elf32_arm_link_hash_table *htab)
3373{
3374 asection *link_sec;
3375 asection *stub_sec;
3376 struct elf32_arm_stub_hash_entry *stub_entry;
3377
3378 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3379 if (stub_sec == NULL)
3380 return NULL;
906e58ca
NC		 3381
3382 /* Enter this entry into the linker stub hash table. */
3383 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3384 TRUE, FALSE);
3385 if (stub_entry == NULL)
3386 {
3387 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3388 section->owner,
3389 stub_name);
3390 return NULL;
3391 }
3392
3393 stub_entry->stub_sec = stub_sec;
3394 stub_entry->stub_offset = 0;
3395 stub_entry->id_sec = link_sec;
3396
906e58ca
NC		 3397 return stub_entry;
3398}
3399
3400/* Store an Arm insn into an output section not processed by
3401 elf32_arm_write_section. */
3402
3403static void
8029a119
NC		 3404put_arm_insn (struct elf32_arm_link_hash_table * htab,
3405 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3406{
3407 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3408 bfd_putl32 (val, ptr);
3409 else
3410 bfd_putb32 (val, ptr);
3411}
3412
3413/* Store a 16-bit Thumb insn into an output section not processed by
3414 elf32_arm_write_section. */
3415
3416static void
8029a119
NC		 3417put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3418 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3419{
3420 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3421 bfd_putl16 (val, ptr);
3422 else
3423 bfd_putb16 (val, ptr);
3424}
3425
48229727
JB		 3426static bfd_reloc_status_type elf32_arm_final_link_relocate
3427 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3428 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3429 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3430
906e58ca
NC		 3431static bfd_boolean
3432arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3433 void * in_arg)
3434{
48229727 3435#define MAXRELOCS 2
906e58ca
NC		 3436 struct elf32_arm_stub_hash_entry *stub_entry;
3437 struct bfd_link_info *info;
3438 struct elf32_arm_link_hash_table *htab;
3439 asection *stub_sec;
3440 bfd *stub_bfd;
3441 bfd_vma stub_addr;
3442 bfd_byte *loc;
3443 bfd_vma sym_value;
3444 int template_size;
3445 int size;
d3ce72d0 3446 const insn_sequence *template_sequence;
906e58ca
NC		 3447 int i;
3448 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3449 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3450 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3451 int nrelocs = 0;
906e58ca
NC		 3452
3453 /* Massage our args to the form they really have. */
3454 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3455 info = (struct bfd_link_info *) in_arg;
3456
3457 globals = elf32_arm_hash_table (info);
3458
3459 htab = elf32_arm_hash_table (info);
3460 stub_sec = stub_entry->stub_sec;
3461
eb7c4339
NS		 3462 if ((htab->fix_cortex_a8 < 0)
3463 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3464 /* We have to do the a8 fixes last, as they are less aligned than
3465 the other veneers. */
3466 return TRUE;
3467
906e58ca
NC		 3468 /* Make a note of the offset within the stubs for this entry. */
3469 stub_entry->stub_offset = stub_sec->size;
3470 loc = stub_sec->contents + stub_entry->stub_offset;
3471
3472 stub_bfd = stub_sec->owner;
3473
3474 /* This is the address of the start of the stub. */
3475 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3476 + stub_entry->stub_offset;
3477
3478 /* This is the address of the stub destination. */
3479 sym_value = (stub_entry->target_value
3480 + stub_entry->target_section->output_offset
3481 + stub_entry->target_section->output_section->vma);
3482
d3ce72d0 3483 template_sequence = stub_entry->stub_template;
461a49ca 3484 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3485
3486 size = 0;
461a49ca 3487 for (i = 0; i < template_size; i++)
906e58ca 3488 {
d3ce72d0 3489 switch (template_sequence[i].type)
461a49ca
DJ		 3490 {
3491 case THUMB16_TYPE:
48229727 3492 {
d3ce72d0
NC		 3493 bfd_vma data = (bfd_vma) template_sequence[i].data;
3494 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3495 {
3496 /* We've borrowed the reloc_addend field to mean we should
3497 insert a condition code into this (Thumb-1 branch)
3498 instruction. See THUMB16_BCOND_INSN. */
3499 BFD_ASSERT ((data & 0xff00) == 0xd000);
3500 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3501 }
3502 put_thumb_insn (globals, stub_bfd, data, loc + size);
3503 size += 2;
3504 }
461a49ca 3505 break;
906e58ca 3506
48229727 3507 case THUMB32_TYPE:
d3ce72d0
NC		 3508 put_thumb_insn (globals, stub_bfd,
3509 (template_sequence[i].data >> 16) & 0xffff,
48229727 3510 loc + size);
d3ce72d0 3511 put_thumb_insn (globals, stub_bfd, template_sequence[i].data & 0xffff,
48229727 3512 loc + size + 2);
d3ce72d0 3513 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3514 {
3515 stub_reloc_idx[nrelocs] = i;
3516 stub_reloc_offset[nrelocs++] = size;
3517 }
3518 size += 4;
3519 break;
3520
461a49ca 3521 case ARM_TYPE:
d3ce72d0
NC		 3522 put_arm_insn (globals, stub_bfd, template_sequence[i].data,
3523 loc + size);
461a49ca
DJ		 3524 /* Handle cases where the target is encoded within the
3525 instruction. */
d3ce72d0 3526 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3527 {
48229727
JB		 3528 stub_reloc_idx[nrelocs] = i;
3529 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3530 }
3531 size += 4;
3532 break;
3533
3534 case DATA_TYPE:
d3ce72d0 3535 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3536 stub_reloc_idx[nrelocs] = i;
3537 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3538 size += 4;
3539 break;
3540
3541 default:
3542 BFD_FAIL ();
3543 return FALSE;
3544 }
906e58ca 3545 }
461a49ca 3546
906e58ca
NC		 3547 stub_sec->size += size;
3548
461a49ca
DJ		 3549 /* Stub size has already been computed in arm_size_one_stub. Check
3550 consistency. */
3551 BFD_ASSERT (size == stub_entry->stub_size);
3552
906e58ca
NC		 3553 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3554 if (stub_entry->st_type == STT_ARM_TFUNC)
3555 sym_value |= 1;
3556
48229727
JB		 3557 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3558 in each stub. */
3559 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3560
48229727 3561 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3562 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3563 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3564 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3565 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3566 {
3567 Elf_Internal_Rela rel;
3568 bfd_boolean unresolved_reloc;
3569 char *error_message;
3570 int sym_flags
d3ce72d0 3571 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3572 ? STT_ARM_TFUNC : 0;
3573 bfd_vma points_to = sym_value + stub_entry->target_addend;
3574
3575 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3576 rel.r_info = ELF32_R_INFO (0,
3577 template_sequence[stub_reloc_idx[i]].r_type);
3578 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3579
3580 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3581 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3582 template should refer back to the instruction after the original
3583 branch. */
3584 points_to = sym_value;
3585
33c6a8fc
JB		 3586 /* There may be unintended consequences if this is not true. */
3587 BFD_ASSERT (stub_entry->h == NULL);
3588
48229727
JB		 3589 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3590 properly. We should probably use this function unconditionally,
3591 rather than only for certain relocations listed in the enclosing
3592 conditional, for the sake of consistency. */
3593 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3594 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3595 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3596 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3597 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3598 &error_message);
3599 }
3600 else
3601 {
3602 _bfd_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3603 (template_sequence[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
48229727
JB		 3604 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3605 sym_value + stub_entry->target_addend,
d3ce72d0 3606 template_sequence[stub_reloc_idx[i]].reloc_addend);
48229727 3607 }
906e58ca
NC		 3608
3609 return TRUE;
48229727 3610#undef MAXRELOCS
906e58ca
NC		 3611}
3612
48229727
JB		 3613/* Calculate the template, template size and instruction size for a stub.
3614 Return value is the instruction size. */
906e58ca 3615
48229727
JB		 3616static unsigned int
3617find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3618 const insn_sequence **stub_template,
3619 int *stub_template_size)
906e58ca 3620{
d3ce72d0 3621 const insn_sequence *template_sequence = NULL;
48229727
JB		 3622 int template_size = 0, i;
3623 unsigned int size;
906e58ca 3624
d3ce72d0 3625 template_sequence = stub_definitions[stub_type].template_sequence;
48229727 3626 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3627
3628 size = 0;
461a49ca
DJ		 3629 for (i = 0; i < template_size; i++)
3630 {
d3ce72d0 3631 switch (template_sequence[i].type)
461a49ca
DJ		 3632 {
3633 case THUMB16_TYPE:
3634 size += 2;
3635 break;
3636
3637 case ARM_TYPE:
48229727 3638 case THUMB32_TYPE:
461a49ca
DJ		 3639 case DATA_TYPE:
3640 size += 4;
3641 break;
3642
3643 default:
3644 BFD_FAIL ();
3645 return FALSE;
3646 }
3647 }
3648
48229727 3649 if (stub_template)
d3ce72d0 3650 *stub_template = template_sequence;
48229727
JB		 3651
3652 if (stub_template_size)
3653 *stub_template_size = template_size;
3654
3655 return size;
3656}
3657
3658/* As above, but don't actually build the stub. Just bump offset so
3659 we know stub section sizes. */
3660
3661static bfd_boolean
3662arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3663 void * in_arg)
3664{
3665 struct elf32_arm_stub_hash_entry *stub_entry;
3666 struct elf32_arm_link_hash_table *htab;
d3ce72d0 3667 const insn_sequence *template_sequence;
48229727
JB		 3668 int template_size, size;
3669
3670 /* Massage our args to the form they really have. */
3671 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3672 htab = (struct elf32_arm_link_hash_table *) in_arg;
3673
3674 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3675 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3676
d3ce72d0 3677 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3678 &template_size);
3679
461a49ca 3680 stub_entry->stub_size = size;
d3ce72d0 3681 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3682 stub_entry->stub_template_size = template_size;
3683
906e58ca
NC		 3684 size = (size + 7) & ~7;
3685 stub_entry->stub_sec->size += size;
461a49ca 3686
906e58ca
NC		 3687 return TRUE;
3688}
3689
3690/* External entry points for sizing and building linker stubs. */
3691
3692/* Set up various things so that we can make a list of input sections
3693 for each output section included in the link. Returns -1 on error,
3694 0 when no stubs will be needed, and 1 on success. */
3695
3696int
3697elf32_arm_setup_section_lists (bfd *output_bfd,
3698 struct bfd_link_info *info)
3699{
3700 bfd *input_bfd;
3701 unsigned int bfd_count;
3702 int top_id, top_index;
3703 asection *section;
3704 asection **input_list, **list;
3705 bfd_size_type amt;
3706 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3707
3708 if (! is_elf_hash_table (htab))
3709 return 0;
3710
3711 /* Count the number of input BFDs and find the top input section id. */
3712 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3713 input_bfd != NULL;
3714 input_bfd = input_bfd->link_next)
3715 {
3716 bfd_count += 1;
3717 for (section = input_bfd->sections;
3718 section != NULL;
3719 section = section->next)
3720 {
3721 if (top_id < section->id)
3722 top_id = section->id;
3723 }
3724 }
3725 htab->bfd_count = bfd_count;
3726
3727 amt = sizeof (struct map_stub) * (top_id + 1);
3728 htab->stub_group = bfd_zmalloc (amt);
3729 if (htab->stub_group == NULL)
3730 return -1;
3731
3732 /* We can't use output_bfd->section_count here to find the top output
3733 section index as some sections may have been removed, and
3734 _bfd_strip_section_from_output doesn't renumber the indices. */
3735 for (section = output_bfd->sections, top_index = 0;
3736 section != NULL;
3737 section = section->next)
3738 {
3739 if (top_index < section->index)
3740 top_index = section->index;
3741 }
3742
3743 htab->top_index = top_index;
3744 amt = sizeof (asection *) * (top_index + 1);
3745 input_list = bfd_malloc (amt);
3746 htab->input_list = input_list;
3747 if (input_list == NULL)
3748 return -1;
3749
3750 /* For sections we aren't interested in, mark their entries with a
3751 value we can check later. */
3752 list = input_list + top_index;
3753 do
3754 *list = bfd_abs_section_ptr;
3755 while (list-- != input_list);
3756
3757 for (section = output_bfd->sections;
3758 section != NULL;
3759 section = section->next)
3760 {
3761 if ((section->flags & SEC_CODE) != 0)
3762 input_list[section->index] = NULL;
3763 }
3764
3765 return 1;
3766}
3767
3768/* The linker repeatedly calls this function for each input section,
3769 in the order that input sections are linked into output sections.
3770 Build lists of input sections to determine groupings between which
3771 we may insert linker stubs. */
3772
3773void
3774elf32_arm_next_input_section (struct bfd_link_info *info,
3775 asection *isec)
3776{
3777 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3778
3779 if (isec->output_section->index <= htab->top_index)
3780 {
3781 asection **list = htab->input_list + isec->output_section->index;
3782
3783 if (*list != bfd_abs_section_ptr)
3784 {
3785 /* Steal the link_sec pointer for our list. */
3786#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3787 /* This happens to make the list in reverse order,
07d72278 3788 which we reverse later. */
906e58ca
NC		 3789 PREV_SEC (isec) = *list;
3790 *list = isec;
3791 }
3792 }
3793}
3794
3795/* See whether we can group stub sections together. Grouping stub
3796 sections may result in fewer stubs. More importantly, we need to
07d72278 3797 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3798 .fini output sections respectively, because glibc splits the
3799 _init and _fini functions into multiple parts. Putting a stub in
3800 the middle of a function is not a good idea. */
3801
3802static void
3803group_sections (struct elf32_arm_link_hash_table *htab,
3804 bfd_size_type stub_group_size,
07d72278 3805 bfd_boolean stubs_always_after_branch)
906e58ca 3806{
07d72278 3807 asection **list = htab->input_list;
906e58ca
NC		 3808
3809 do
3810 {
3811 asection *tail = *list;
07d72278 3812 asection *head;
906e58ca
NC		 3813
3814 if (tail == bfd_abs_section_ptr)
3815 continue;
3816
07d72278
DJ		 3817 /* Reverse the list: we must avoid placing stubs at the
3818 beginning of the section because the beginning of the text
3819 section may be required for an interrupt vector in bare metal
3820 code. */
3821#define NEXT_SEC PREV_SEC
e780aef2
CL		 3822 head = NULL;
3823 while (tail != NULL)
3824 {
3825 /* Pop from tail. */
3826 asection *item = tail;
3827 tail = PREV_SEC (item);
3828
3829 /* Push on head. */
3830 NEXT_SEC (item) = head;
3831 head = item;
3832 }
07d72278
DJ		 3833
3834 while (head != NULL)
906e58ca
NC		 3835 {
3836 asection *curr;
07d72278 3837 asection *next;
e780aef2
CL		 3838 bfd_vma stub_group_start = head->output_offset;
3839 bfd_vma end_of_next;
906e58ca 3840
07d72278 3841 curr = head;
e780aef2 3842 while (NEXT_SEC (curr) != NULL)
8cd931b7 3843 {
e780aef2
CL		 3844 next = NEXT_SEC (curr);
3845 end_of_next = next->output_offset + next->size;
3846 if (end_of_next - stub_group_start >= stub_group_size)
3847 /* End of NEXT is too far from start, so stop. */
8cd931b7 3848 break;
e780aef2
CL		 3849 /* Add NEXT to the group. */
3850 curr = next;
8cd931b7 3851 }
906e58ca 3852
07d72278 3853 /* OK, the size from the start to the start of CURR is less
906e58ca 3854 than stub_group_size and thus can be handled by one stub
07d72278 3855 section. (Or the head section is itself larger than
906e58ca
NC		 3856 stub_group_size, in which case we may be toast.)
3857 We should really be keeping track of the total size of
3858 stubs added here, as stubs contribute to the final output
7fb9f789 3859 section size. */
906e58ca
NC		 3860 do
3861 {
07d72278 3862 next = NEXT_SEC (head);
906e58ca 3863 /* Set up this stub group. */
07d72278 3864 htab->stub_group[head->id].link_sec = curr;
906e58ca 3865 }
07d72278 3866 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3867
3868 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3869 bytes after the stub section can be handled by it too. */
3870 if (!stubs_always_after_branch)
906e58ca 3871 {
e780aef2
CL		 3872 stub_group_start = curr->output_offset + curr->size;
3873
8cd931b7 3874 while (next != NULL)
906e58ca 3875 {
e780aef2
CL		 3876 end_of_next = next->output_offset + next->size;
3877 if (end_of_next - stub_group_start >= stub_group_size)
3878 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3879 break;
e780aef2 3880 /* Add NEXT to the stub group. */
07d72278
DJ		 3881 head = next;
3882 next = NEXT_SEC (head);
3883 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3884 }
3885 }
07d72278 3886 head = next;
906e58ca
NC		 3887 }
3888 }
07d72278 3889 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3890
3891 free (htab->input_list);
3892#undef PREV_SEC
07d72278 3893#undef NEXT_SEC
906e58ca
NC		 3894}
3895
48229727
JB		 3896/* Comparison function for sorting/searching relocations relating to Cortex-A8
3897 erratum fix. */
3898
3899static int
3900a8_reloc_compare (const void *a, const void *b)
3901{
3902 const struct a8_erratum_reloc *ra = a, *rb = b;
3903
3904 if (ra->from < rb->from)
3905 return -1;
3906 else if (ra->from > rb->from)
3907 return 1;
3908 else
3909 return 0;
3910}
3911
3912static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3913 const char *, char **);
3914
3915/* Helper function to scan code for sequences which might trigger the Cortex-A8
3916 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3917 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3918 otherwise. */
3919
81694485
NC		 3920static bfd_boolean
3921cortex_a8_erratum_scan (bfd *input_bfd,
3922 struct bfd_link_info *info,
48229727
JB		 3923 struct a8_erratum_fix **a8_fixes_p,
3924 unsigned int *num_a8_fixes_p,
3925 unsigned int *a8_fix_table_size_p,
3926 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3927 unsigned int num_a8_relocs,
3928 unsigned prev_num_a8_fixes,
3929 bfd_boolean *stub_changed_p)
48229727
JB		 3930{
3931 asection *section;
3932 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3933 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3934 unsigned int num_a8_fixes = *num_a8_fixes_p;
3935 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3936
3937 for (section = input_bfd->sections;
3938 section != NULL;
3939 section = section->next)
3940 {
3941 bfd_byte *contents = NULL;
3942 struct _arm_elf_section_data *sec_data;
3943 unsigned int span;
3944 bfd_vma base_vma;
3945
3946 if (elf_section_type (section) != SHT_PROGBITS
3947 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3948 || (section->flags & SEC_EXCLUDE) != 0
3949 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3950 || (section->output_section == bfd_abs_section_ptr))
3951 continue;
3952
3953 base_vma = section->output_section->vma + section->output_offset;
3954
3955 if (elf_section_data (section)->this_hdr.contents != NULL)
3956 contents = elf_section_data (section)->this_hdr.contents;
3957 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3958 return TRUE;
48229727
JB		 3959
3960 sec_data = elf32_arm_section_data (section);
3961
3962 for (span = 0; span < sec_data->mapcount; span++)
3963 {
3964 unsigned int span_start = sec_data->map[span].vma;
3965 unsigned int span_end = (span == sec_data->mapcount - 1)
3966 ? section->size : sec_data->map[span + 1].vma;
3967 unsigned int i;
3968 char span_type = sec_data->map[span].type;
3969 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3970
3971 if (span_type != 't')
3972 continue;
3973
3974 /* Span is entirely within a single 4KB region: skip scanning. */
3975 if (((base_vma + span_start) & ~0xfff)
3976 == ((base_vma + span_end) & ~0xfff))
3977 continue;
3978
3979 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3980
3981 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3982 * The branch target is in the same 4KB region as the
3983 first half of the branch.
3984 * The instruction before the branch is a 32-bit
81694485 3985 length non-branch instruction. */
48229727
JB		 3986 for (i = span_start; i < span_end;)
3987 {
3988 unsigned int insn = bfd_getl16 (&contents[i]);
3989 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3990 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3991
3992 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3993 insn_32bit = TRUE;
3994
3995 if (insn_32bit)
3996 {
3997 /* Load the rest of the insn (in manual-friendly order). */
3998 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3999
4000 /* Encoding T4: B<c>.W. */
4001 is_b = (insn & 0xf800d000) == 0xf0009000;
4002 /* Encoding T1: BL<c>.W. */
4003 is_bl = (insn & 0xf800d000) == 0xf000d000;
4004 /* Encoding T2: BLX<c>.W. */
4005 is_blx = (insn & 0xf800d000) == 0xf000c000;
4006 /* Encoding T3: B<c>.W (not permitted in IT block). */
4007 is_bcc = (insn & 0xf800d000) == 0xf0008000
4008 && (insn & 0x07f00000) != 0x03800000;
4009 }
4010
4011 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4012
81694485
NC		 4013 if (((base_vma + i) & 0xfff) == 0xffe
4014 && insn_32bit
4015 && is_32bit_branch
4016 && last_was_32bit
4017 && ! last_was_branch)
48229727 4018 {
81694485 4019 bfd_signed_vma offset;
48229727
JB		 4020 bfd_boolean force_target_arm = FALSE;
4021 bfd_boolean force_target_thumb = FALSE;
4022 bfd_vma target;
4023 enum elf32_arm_stub_type stub_type = arm_stub_none;
4024 struct a8_erratum_reloc key, *found;
4025
4026 key.from = base_vma + i;
4027 found = bsearch (&key, a8_relocs, num_a8_relocs,
4028 sizeof (struct a8_erratum_reloc),
4029 &a8_reloc_compare);
4030
4031 if (found)
4032 {
4033 char *error_message = NULL;
4034 struct elf_link_hash_entry *entry;
4035
4036 /* We don't care about the error returned from this
4037 function, only if there is glue or not. */
4038 entry = find_thumb_glue (info, found->sym_name,
4039 &error_message);
4040
4041 if (entry)
4042 found->non_a8_stub = TRUE;
4043
4044 if (found->r_type == R_ARM_THM_CALL
4045 && found->st_type != STT_ARM_TFUNC)
4046 force_target_arm = TRUE;
4047 else if (found->r_type == R_ARM_THM_CALL
4048 && found->st_type == STT_ARM_TFUNC)
4049 force_target_thumb = TRUE;
4050 }
4051
4052 /* Check if we have an offending branch instruction. */
4053
4054 if (found && found->non_a8_stub)
4055 /* We've already made a stub for this instruction, e.g.
4056 it's a long branch or a Thumb->ARM stub. Assume that
4057 stub will suffice to work around the A8 erratum (see
4058 setting of always_after_branch above). */
4059 ;
4060 else if (is_bcc)
4061 {
4062 offset = (insn & 0x7ff) << 1;
4063 offset |= (insn & 0x3f0000) >> 4;
4064 offset |= (insn & 0x2000) ? 0x40000 : 0;
4065 offset |= (insn & 0x800) ? 0x80000 : 0;
4066 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4067 if (offset & 0x100000)
81694485 4068 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4069 stub_type = arm_stub_a8_veneer_b_cond;
4070 }
4071 else if (is_b || is_bl || is_blx)
4072 {
4073 int s = (insn & 0x4000000) != 0;
4074 int j1 = (insn & 0x2000) != 0;
4075 int j2 = (insn & 0x800) != 0;
4076 int i1 = !(j1 ^ s);
4077 int i2 = !(j2 ^ s);
4078
4079 offset = (insn & 0x7ff) << 1;
4080 offset |= (insn & 0x3ff0000) >> 4;
4081 offset |= i2 << 22;
4082 offset |= i1 << 23;
4083 offset |= s << 24;
4084 if (offset & 0x1000000)
81694485 4085 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4086
4087 if (is_blx)
81694485 4088 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4089
4090 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4091 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4092 }
4093
4094 if (stub_type != arm_stub_none)
4095 {
4096 bfd_vma pc_for_insn = base_vma + i + 4;
4097
4098 /* The original instruction is a BL, but the target is
4099 an ARM instruction. If we were not making a stub,
4100 the BL would have been converted to a BLX. Use the
4101 BLX stub instead in that case. */
4102 if (htab->use_blx && force_target_arm
4103 && stub_type == arm_stub_a8_veneer_bl)
4104 {
4105 stub_type = arm_stub_a8_veneer_blx;
4106 is_blx = TRUE;
4107 is_bl = FALSE;
4108 }
4109 /* Conversely, if the original instruction was
4110 BLX but the target is Thumb mode, use the BL
4111 stub. */
4112 else if (force_target_thumb
4113 && stub_type == arm_stub_a8_veneer_blx)
4114 {
4115 stub_type = arm_stub_a8_veneer_bl;
4116 is_blx = FALSE;
4117 is_bl = TRUE;
4118 }
4119
4120 if (is_blx)
81694485 4121 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4122
4123 /* If we found a relocation, use the proper destination,
4124 not the offset in the (unrelocated) instruction.
4125 Note this is always done if we switched the stub type
4126 above. */
4127 if (found)
81694485
NC		 4128 offset =
4129 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4130
4131 target = pc_for_insn + offset;
4132
4133 /* The BLX stub is ARM-mode code. Adjust the offset to
4134 take the different PC value (+8 instead of +4) into
4135 account. */
4136 if (stub_type == arm_stub_a8_veneer_blx)
4137 offset += 4;
4138
4139 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4140 {
eb7c4339 4141 char *stub_name = NULL;
48229727
JB		 4142
4143 if (num_a8_fixes == a8_fix_table_size)
4144 {
4145 a8_fix_table_size *= 2;
4146 a8_fixes = bfd_realloc (a8_fixes,
4147 sizeof (struct a8_erratum_fix)
4148 * a8_fix_table_size);
4149 }
4150
eb7c4339
NS		 4151 if (num_a8_fixes < prev_num_a8_fixes)
4152 {
4153 /* If we're doing a subsequent scan,
4154 check if we've found the same fix as
4155 before, and try and reuse the stub
4156 name. */
4157 stub_name = a8_fixes[num_a8_fixes].stub_name;
4158 if ((a8_fixes[num_a8_fixes].section != section)
4159 || (a8_fixes[num_a8_fixes].offset != i))
4160 {
4161 free (stub_name);
4162 stub_name = NULL;
4163 *stub_changed_p = TRUE;
4164 }
4165 }
4166
4167 if (!stub_name)
4168 {
4169 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4170 if (stub_name != NULL)
4171 sprintf (stub_name, "%x:%x", section->id, i);
4172 }
48229727
JB		 4173
4174 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4175 a8_fixes[num_a8_fixes].section = section;
4176 a8_fixes[num_a8_fixes].offset = i;
4177 a8_fixes[num_a8_fixes].addend = offset;
4178 a8_fixes[num_a8_fixes].orig_insn = insn;
4179 a8_fixes[num_a8_fixes].stub_name = stub_name;
4180 a8_fixes[num_a8_fixes].stub_type = stub_type;
4181
4182 num_a8_fixes++;
4183 }
4184 }
4185 }
4186
4187 i += insn_32bit ? 4 : 2;
4188 last_was_32bit = insn_32bit;
4189 last_was_branch = is_32bit_branch;
4190 }
4191 }
4192
4193 if (elf_section_data (section)->this_hdr.contents == NULL)
4194 free (contents);
4195 }
4196
4197 *a8_fixes_p = a8_fixes;
4198 *num_a8_fixes_p = num_a8_fixes;
4199 *a8_fix_table_size_p = a8_fix_table_size;
4200
81694485 4201 return FALSE;
48229727
JB		 4202}
4203
906e58ca
NC		 4204/* Determine and set the size of the stub section for a final link.
4205
4206 The basic idea here is to examine all the relocations looking for
4207 PC-relative calls to a target that is unreachable with a "bl"
4208 instruction. */
4209
4210bfd_boolean
4211elf32_arm_size_stubs (bfd *output_bfd,
4212 bfd *stub_bfd,
4213 struct bfd_link_info *info,
4214 bfd_signed_vma group_size,
4215 asection * (*add_stub_section) (const char *, asection *),
4216 void (*layout_sections_again) (void))
4217{
4218 bfd_size_type stub_group_size;
07d72278 4219 bfd_boolean stubs_always_after_branch;
906e58ca 4220 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4221 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4222 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4223 struct a8_erratum_reloc *a8_relocs = NULL;
4224 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4225
4226 if (htab->fix_cortex_a8)
4227 {
4228 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4229 * a8_fix_table_size);
4230 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4231 * a8_reloc_table_size);
4232 }
906e58ca
NC		 4233
4234 /* Propagate mach to stub bfd, because it may not have been
4235 finalized when we created stub_bfd. */
4236 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4237 bfd_get_mach (output_bfd));
4238
4239 /* Stash our params away. */
4240 htab->stub_bfd = stub_bfd;
4241 htab->add_stub_section = add_stub_section;
4242 htab->layout_sections_again = layout_sections_again;
07d72278 4243 stubs_always_after_branch = group_size < 0;
48229727
JB		 4244
4245 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4246 as the first half of a 32-bit branch straddling two 4K pages. This is a
4247 crude way of enforcing that. */
4248 if (htab->fix_cortex_a8)
4249 stubs_always_after_branch = 1;
4250
906e58ca
NC		 4251 if (group_size < 0)
4252 stub_group_size = -group_size;
4253 else
4254 stub_group_size = group_size;
4255
4256 if (stub_group_size == 1)
4257 {
4258 /* Default values. */
4259 /* Thumb branch range is +-4MB has to be used as the default
4260 maximum size (a given section can contain both ARM and Thumb
4261 code, so the worst case has to be taken into account).
4262
4263 This value is 24K less than that, which allows for 2025
4264 12-byte stubs. If we exceed that, then we will fail to link.
4265 The user will have to relink with an explicit group size
4266 option. */
4267 stub_group_size = 4170000;
4268 }
4269
07d72278 4270 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4271
3ae046cc
NS		 4272 /* If we're applying the cortex A8 fix, we need to determine the
4273 program header size now, because we cannot change it later --
4274 that could alter section placements. Notice the A8 erratum fix
4275 ends up requiring the section addresses to remain unchanged
4276 modulo the page size. That's something we cannot represent
4277 inside BFD, and we don't want to force the section alignment to
4278 be the page size. */
4279 if (htab->fix_cortex_a8)
4280 (*htab->layout_sections_again) ();
4281
906e58ca
NC		 4282 while (1)
4283 {
4284 bfd *input_bfd;
4285 unsigned int bfd_indx;
4286 asection *stub_sec;
eb7c4339
NS		 4287 bfd_boolean stub_changed = FALSE;
4288 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4289
48229727 4290 num_a8_fixes = 0;
906e58ca
NC		 4291 for (input_bfd = info->input_bfds, bfd_indx = 0;
4292 input_bfd != NULL;
4293 input_bfd = input_bfd->link_next, bfd_indx++)
4294 {
4295 Elf_Internal_Shdr *symtab_hdr;
4296 asection *section;
4297 Elf_Internal_Sym *local_syms = NULL;
4298
48229727
JB		 4299 num_a8_relocs = 0;
4300
906e58ca
NC		 4301 /* We'll need the symbol table in a second. */
4302 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4303 if (symtab_hdr->sh_info == 0)
4304 continue;
4305
4306 /* Walk over each section attached to the input bfd. */
4307 for (section = input_bfd->sections;
4308 section != NULL;
4309 section = section->next)
4310 {
4311 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4312
4313 /* If there aren't any relocs, then there's nothing more
4314 to do. */
4315 if ((section->flags & SEC_RELOC) == 0
4316 || section->reloc_count == 0
4317 || (section->flags & SEC_CODE) == 0)
4318 continue;
4319
4320 /* If this section is a link-once section that will be
4321 discarded, then don't create any stubs. */
4322 if (section->output_section == NULL
4323 || section->output_section->owner != output_bfd)
4324 continue;
4325
4326 /* Get the relocs. */
4327 internal_relocs
4328 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4329 NULL, info->keep_memory);
4330 if (internal_relocs == NULL)
4331 goto error_ret_free_local;
4332
4333 /* Now examine each relocation. */
4334 irela = internal_relocs;
4335 irelaend = irela + section->reloc_count;
4336 for (; irela < irelaend; irela++)
4337 {
4338 unsigned int r_type, r_indx;
4339 enum elf32_arm_stub_type stub_type;
4340 struct elf32_arm_stub_hash_entry *stub_entry;
4341 asection *sym_sec;
4342 bfd_vma sym_value;
4343 bfd_vma destination;
4344 struct elf32_arm_link_hash_entry *hash;
7413f23f 4345 const char *sym_name;
906e58ca
NC		 4346 char *stub_name;
4347 const asection *id_sec;
4348 unsigned char st_type;
48229727 4349 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4350
4351 r_type = ELF32_R_TYPE (irela->r_info);
4352 r_indx = ELF32_R_SYM (irela->r_info);
4353
4354 if (r_type >= (unsigned int) R_ARM_max)
4355 {
4356 bfd_set_error (bfd_error_bad_value);
4357 error_ret_free_internal:
4358 if (elf_section_data (section)->relocs == NULL)
4359 free (internal_relocs);
4360 goto error_ret_free_local;
4361 }
4362
155d87d7 4363 /* Only look for stubs on branch instructions. */
906e58ca 4364 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4365 && (r_type != (unsigned int) R_ARM_THM_CALL)
4366 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4367 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4368 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4369 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4370 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4371 continue;
4372
4373 /* Now determine the call target, its name, value,
4374 section. */
4375 sym_sec = NULL;
4376 sym_value = 0;
4377 destination = 0;
4378 hash = NULL;
7413f23f 4379 sym_name = NULL;
906e58ca
NC		 4380 if (r_indx < symtab_hdr->sh_info)
4381 {
4382 /* It's a local symbol. */
4383 Elf_Internal_Sym *sym;
4384 Elf_Internal_Shdr *hdr;
4385
4386 if (local_syms == NULL)
4387 {
4388 local_syms
4389 = (Elf_Internal_Sym *) symtab_hdr->contents;
4390 if (local_syms == NULL)
4391 local_syms
4392 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4393 symtab_hdr->sh_info, 0,
4394 NULL, NULL, NULL);
4395 if (local_syms == NULL)
4396 goto error_ret_free_internal;
4397 }
4398
4399 sym = local_syms + r_indx;
4400 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4401 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4402 if (!sym_sec)
4403 /* This is an undefined symbol. It can never
4404 be resolved. */
4405 continue;
4406
906e58ca
NC		 4407 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4408 sym_value = sym->st_value;
4409 destination = (sym_value + irela->r_addend
4410 + sym_sec->output_offset
4411 + sym_sec->output_section->vma);
4412 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4413 sym_name
4414 = bfd_elf_string_from_elf_section (input_bfd,
4415 symtab_hdr->sh_link,
4416 sym->st_name);
906e58ca
NC		 4417 }
4418 else
4419 {
4420 /* It's an external symbol. */
4421 int e_indx;
4422
4423 e_indx = r_indx - symtab_hdr->sh_info;
4424 hash = ((struct elf32_arm_link_hash_entry *)
4425 elf_sym_hashes (input_bfd)[e_indx]);
4426
4427 while (hash->root.root.type == bfd_link_hash_indirect
4428 || hash->root.root.type == bfd_link_hash_warning)
4429 hash = ((struct elf32_arm_link_hash_entry *)
4430 hash->root.root.u.i.link);
4431
4432 if (hash->root.root.type == bfd_link_hash_defined
4433 || hash->root.root.type == bfd_link_hash_defweak)
4434 {
4435 sym_sec = hash->root.root.u.def.section;
4436 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4437
4438 struct elf32_arm_link_hash_table *globals =
4439 elf32_arm_hash_table (info);
4440
4441 /* For a destination in a shared library,
4442 use the PLT stub as target address to
4443 decide whether a branch stub is
4444 needed. */
4445 if (globals->splt != NULL && hash != NULL
4446 && hash->root.plt.offset != (bfd_vma) -1)
4447 {
4448 sym_sec = globals->splt;
4449 sym_value = hash->root.plt.offset;
4450 if (sym_sec->output_section != NULL)
4451 destination = (sym_value
4452 + sym_sec->output_offset
4453 + sym_sec->output_section->vma);
4454 }
4455 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4456 destination = (sym_value + irela->r_addend
4457 + sym_sec->output_offset
4458 + sym_sec->output_section->vma);
4459 }
69c5861e
CL		 4460 else if ((hash->root.root.type == bfd_link_hash_undefined)
4461 || (hash->root.root.type == bfd_link_hash_undefweak))
4462 {
4463 /* For a shared library, use the PLT stub as
4464 target address to decide whether a long
4465 branch stub is needed.
4466 For absolute code, they cannot be handled. */
4467 struct elf32_arm_link_hash_table *globals =
4468 elf32_arm_hash_table (info);
4469
4470 if (globals->splt != NULL && hash != NULL
4471 && hash->root.plt.offset != (bfd_vma) -1)
4472 {
4473 sym_sec = globals->splt;
4474 sym_value = hash->root.plt.offset;
4475 if (sym_sec->output_section != NULL)
4476 destination = (sym_value
4477 + sym_sec->output_offset
4478 + sym_sec->output_section->vma);
4479 }
4480 else
4481 continue;
4482 }
906e58ca
NC		 4483 else
4484 {
4485 bfd_set_error (bfd_error_bad_value);
4486 goto error_ret_free_internal;
4487 }
4488 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4489 sym_name = hash->root.root.root.string;
906e58ca
NC		 4490 }
4491
48229727 4492 do
7413f23f 4493 {
48229727
JB		 4494 /* Determine what (if any) linker stub is needed. */
4495 stub_type = arm_type_of_stub (info, section, irela,
4496 st_type, hash,
4497 destination, sym_sec,
4498 input_bfd, sym_name);
4499 if (stub_type == arm_stub_none)
4500 break;
4501
4502 /* Support for grouping stub sections. */
4503 id_sec = htab->stub_group[section->id].link_sec;
4504
4505 /* Get the name of this stub. */
4506 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4507 irela);
4508 if (!stub_name)
4509 goto error_ret_free_internal;
4510
4511 /* We've either created a stub for this reloc already,
4512 or we are about to. */
4513 created_stub = TRUE;
4514
4515 stub_entry = arm_stub_hash_lookup
4516 (&htab->stub_hash_table, stub_name,
4517 FALSE, FALSE);
4518 if (stub_entry != NULL)
4519 {
4520 /* The proper stub has already been created. */
4521 free (stub_name);
eb7c4339 4522 stub_entry->target_value = sym_value;
48229727
JB		 4523 break;
4524 }
7413f23f 4525
48229727
JB		 4526 stub_entry = elf32_arm_add_stub (stub_name, section,
4527 htab);
4528 if (stub_entry == NULL)
4529 {
4530 free (stub_name);
4531 goto error_ret_free_internal;
4532 }
7413f23f 4533
48229727
JB		 4534 stub_entry->target_value = sym_value;
4535 stub_entry->target_section = sym_sec;
4536 stub_entry->stub_type = stub_type;
4537 stub_entry->h = hash;
4538 stub_entry->st_type = st_type;
4539
4540 if (sym_name == NULL)
4541 sym_name = "unnamed";
4542 stub_entry->output_name
4543 = bfd_alloc (htab->stub_bfd,
4544 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4545 + strlen (sym_name));
4546 if (stub_entry->output_name == NULL)
4547 {
4548 free (stub_name);
4549 goto error_ret_free_internal;
4550 }
4551
4552 /* For historical reasons, use the existing names for
4553 ARM-to-Thumb and Thumb-to-ARM stubs. */
4554 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4555 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4556 && st_type != STT_ARM_TFUNC)
4557 sprintf (stub_entry->output_name,
4558 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4559 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4560 || (r_type == (unsigned int) R_ARM_JUMP24))
4561 && st_type == STT_ARM_TFUNC)
4562 sprintf (stub_entry->output_name,
4563 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4564 else
4565 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4566 sym_name);
4567
4568 stub_changed = TRUE;
4569 }
4570 while (0);
4571
4572 /* Look for relocations which might trigger Cortex-A8
4573 erratum. */
4574 if (htab->fix_cortex_a8
4575 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4576 || r_type == (unsigned int) R_ARM_THM_JUMP19
4577 || r_type == (unsigned int) R_ARM_THM_CALL
4578 || r_type == (unsigned int) R_ARM_THM_XPC22))
4579 {
4580 bfd_vma from = section->output_section->vma
4581 + section->output_offset
4582 + irela->r_offset;
4583
4584 if ((from & 0xfff) == 0xffe)
4585 {
4586 /* Found a candidate. Note we haven't checked the
4587 destination is within 4K here: if we do so (and
4588 don't create an entry in a8_relocs) we can't tell
4589 that a branch should have been relocated when
4590 scanning later. */
4591 if (num_a8_relocs == a8_reloc_table_size)
4592 {
4593 a8_reloc_table_size *= 2;
4594 a8_relocs = bfd_realloc (a8_relocs,
4595 sizeof (struct a8_erratum_reloc)
4596 * a8_reloc_table_size);
4597 }
4598
4599 a8_relocs[num_a8_relocs].from = from;
4600 a8_relocs[num_a8_relocs].destination = destination;
4601 a8_relocs[num_a8_relocs].r_type = r_type;
4602 a8_relocs[num_a8_relocs].st_type = st_type;
4603 a8_relocs[num_a8_relocs].sym_name = sym_name;
4604 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4605
4606 num_a8_relocs++;
4607 }
4608 }
906e58ca
NC		 4609 }
4610
48229727
JB		 4611 /* We're done with the internal relocs, free them. */
4612 if (elf_section_data (section)->relocs == NULL)
4613 free (internal_relocs);
4614 }
4615
4616 if (htab->fix_cortex_a8)
4617 {
4618 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4619 qsort (a8_relocs, num_a8_relocs,
4620 sizeof (struct a8_erratum_reloc),
48229727
JB		 4621 &a8_reloc_compare);
4622
4623 /* Scan for branches which might trigger Cortex-A8 erratum. */
4624 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4625 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4626 a8_relocs, num_a8_relocs,
4627 prev_num_a8_fixes, &stub_changed)
4628 != 0)
48229727 4629 goto error_ret_free_local;
5e681ec4 4630 }
5e681ec4
PB		 4631 }
4632
eb7c4339 4633 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4634 stub_changed = TRUE;
4635
906e58ca
NC		 4636 if (!stub_changed)
4637 break;
5e681ec4 4638
906e58ca
NC		 4639 /* OK, we've added some stubs. Find out the new size of the
4640 stub sections. */
4641 for (stub_sec = htab->stub_bfd->sections;
4642 stub_sec != NULL;
4643 stub_sec = stub_sec->next)
3e6b1042
DJ		 4644 {
4645 /* Ignore non-stub sections. */
4646 if (!strstr (stub_sec->name, STUB_SUFFIX))
4647 continue;
4648
4649 stub_sec->size = 0;
4650 }
b34b2d70 4651
906e58ca
NC		 4652 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4653
48229727
JB		 4654 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4655 if (htab->fix_cortex_a8)
4656 for (i = 0; i < num_a8_fixes; i++)
4657 {
4658 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4659 a8_fixes[i].section, htab);
4660
4661 if (stub_sec == NULL)
4662 goto error_ret_free_local;
4663
4664 stub_sec->size
4665 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4666 NULL);
4667 }
4668
4669
906e58ca
NC		 4670 /* Ask the linker to do its stuff. */
4671 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4672 }
4673
48229727
JB		 4674 /* Add stubs for Cortex-A8 erratum fixes now. */
4675 if (htab->fix_cortex_a8)
4676 {
4677 for (i = 0; i < num_a8_fixes; i++)
4678 {
4679 struct elf32_arm_stub_hash_entry *stub_entry;
4680 char *stub_name = a8_fixes[i].stub_name;
4681 asection *section = a8_fixes[i].section;
4682 unsigned int section_id = a8_fixes[i].section->id;
4683 asection *link_sec = htab->stub_group[section_id].link_sec;
4684 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4685 const insn_sequence *template_sequence;
48229727
JB		 4686 int template_size, size = 0;
4687
4688 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4689 TRUE, FALSE);
4690 if (stub_entry == NULL)
4691 {
4692 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4693 section->owner,
4694 stub_name);
4695 return FALSE;
4696 }
4697
4698 stub_entry->stub_sec = stub_sec;
4699 stub_entry->stub_offset = 0;
4700 stub_entry->id_sec = link_sec;
4701 stub_entry->stub_type = a8_fixes[i].stub_type;
4702 stub_entry->target_section = a8_fixes[i].section;
4703 stub_entry->target_value = a8_fixes[i].offset;
4704 stub_entry->target_addend = a8_fixes[i].addend;
4705 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4706 stub_entry->st_type = STT_ARM_TFUNC;
4707
d3ce72d0
NC		 4708 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4709 &template_sequence,
48229727
JB		 4710 &template_size);
4711
4712 stub_entry->stub_size = size;
d3ce72d0 4713 stub_entry->stub_template = template_sequence;
48229727
JB		 4714 stub_entry->stub_template_size = template_size;
4715 }
4716
4717 /* Stash the Cortex-A8 erratum fix array for use later in
4718 elf32_arm_write_section(). */
4719 htab->a8_erratum_fixes = a8_fixes;
4720 htab->num_a8_erratum_fixes = num_a8_fixes;
4721 }
4722 else
4723 {
4724 htab->a8_erratum_fixes = NULL;
4725 htab->num_a8_erratum_fixes = 0;
4726 }
906e58ca
NC		 4727 return TRUE;
4728
4729 error_ret_free_local:
4730 return FALSE;
5e681ec4
PB		 4731}
4732
906e58ca
NC		 4733/* Build all the stubs associated with the current output file. The
4734 stubs are kept in a hash table attached to the main linker hash
4735 table. We also set up the .plt entries for statically linked PIC
4736 functions here. This function is called via arm_elf_finish in the
4737 linker. */
252b5132 4738
906e58ca
NC		 4739bfd_boolean
4740elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4741{
906e58ca
NC		 4742 asection *stub_sec;
4743 struct bfd_hash_table *table;
4744 struct elf32_arm_link_hash_table *htab;
252b5132 4745
906e58ca 4746 htab = elf32_arm_hash_table (info);
252b5132 4747
906e58ca
NC		 4748 for (stub_sec = htab->stub_bfd->sections;
4749 stub_sec != NULL;
4750 stub_sec = stub_sec->next)
252b5132 4751 {
906e58ca
NC		 4752 bfd_size_type size;
4753
8029a119 4754 /* Ignore non-stub sections. */
906e58ca
NC		 4755 if (!strstr (stub_sec->name, STUB_SUFFIX))
4756 continue;
4757
4758 /* Allocate memory to hold the linker stubs. */
4759 size = stub_sec->size;
4760 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4761 if (stub_sec->contents == NULL && size != 0)
4762 return FALSE;
4763 stub_sec->size = 0;
252b5132
RH		 4764 }
4765
906e58ca
NC		 4766 /* Build the stubs as directed by the stub hash table. */
4767 table = &htab->stub_hash_table;
4768 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4769 if (htab->fix_cortex_a8)
4770 {
4771 /* Place the cortex a8 stubs last. */
4772 htab->fix_cortex_a8 = -1;
4773 bfd_hash_traverse (table, arm_build_one_stub, info);
4774 }
252b5132 4775
906e58ca 4776 return TRUE;
252b5132
RH		 4777}
4778
9b485d32
NC		 4779/* Locate the Thumb encoded calling stub for NAME. */
4780
252b5132 4781static struct elf_link_hash_entry *
57e8b36a
NC		 4782find_thumb_glue (struct bfd_link_info *link_info,
4783 const char *name,
f2a9dd69 4784 char **error_message)
252b5132
RH		 4785{
4786 char *tmp_name;
4787 struct elf_link_hash_entry *hash;
4788 struct elf32_arm_link_hash_table *hash_table;
4789
4790 /* We need a pointer to the armelf specific hash table. */
4791 hash_table = elf32_arm_hash_table (link_info);
4792
57e8b36a
NC		 4793 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4794 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4795
4796 BFD_ASSERT (tmp_name);
4797
4798 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4799
4800 hash = elf_link_hash_lookup
b34976b6 4801 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4802
b1657152
AM		 4803 if (hash == NULL
4804 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4805 tmp_name, name) == -1)
4806 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4807
4808 free (tmp_name);
4809
4810 return hash;
4811}
4812
9b485d32
NC		 4813/* Locate the ARM encoded calling stub for NAME. */
4814
252b5132 4815static struct elf_link_hash_entry *
57e8b36a
NC		 4816find_arm_glue (struct bfd_link_info *link_info,
4817 const char *name,
f2a9dd69 4818 char **error_message)
252b5132
RH		 4819{
4820 char *tmp_name;
4821 struct elf_link_hash_entry *myh;
4822 struct elf32_arm_link_hash_table *hash_table;
4823
4824 /* We need a pointer to the elfarm specific hash table. */
4825 hash_table = elf32_arm_hash_table (link_info);
4826
57e8b36a
NC		 4827 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4828 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4829
4830 BFD_ASSERT (tmp_name);
4831
4832 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4833
4834 myh = elf_link_hash_lookup
b34976b6 4835 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4836
b1657152
AM		 4837 if (myh == NULL
4838 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4839 tmp_name, name) == -1)
4840 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4841
4842 free (tmp_name);
4843
4844 return myh;
4845}
4846
8f6277f5 4847/* ARM->Thumb glue (static images):
252b5132
RH		 4848
4849 .arm
4850 __func_from_arm:
4851 ldr r12, __func_addr
4852 bx r12
4853 __func_addr:
906e58ca 4854 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4855
26079076
PB		 4856 (v5t static images)
4857 .arm
4858 __func_from_arm:
4859 ldr pc, __func_addr
4860 __func_addr:
906e58ca 4861 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4862
8f6277f5
PB		 4863 (relocatable images)
4864 .arm
4865 __func_from_arm:
4866 ldr r12, __func_offset
4867 add r12, r12, pc
4868 bx r12
4869 __func_offset:
8029a119 4870 .word func - . */
8f6277f5
PB		 4871
4872#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4873static const insn32 a2t1_ldr_insn = 0xe59fc000;
4874static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4875static const insn32 a2t3_func_addr_insn = 0x00000001;
4876
26079076
PB		 4877#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4878static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4879static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4880
8f6277f5
PB		 4881#define ARM2THUMB_PIC_GLUE_SIZE 16
4882static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4883static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4884static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4885
9b485d32 4886/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4887
8029a119
NC		 4888 .thumb .thumb
4889 .align 2 .align 2
4890 __func_from_thumb: __func_from_thumb:
4891 bx pc push {r6, lr}
4892 nop ldr r6, __func_addr
4893 .arm mov lr, pc
4894 b func bx r6
fcef9eb7
NC		 4895 .arm
4896 ;; back_to_thumb
4897 ldmia r13! {r6, lr}
4898 bx lr
8029a119
NC		 4899 __func_addr:
4900 .word func */
252b5132
RH		 4901
4902#define THUMB2ARM_GLUE_SIZE 8
4903static const insn16 t2a1_bx_pc_insn = 0x4778;
4904static const insn16 t2a2_noop_insn = 0x46c0;
4905static const insn32 t2a3_b_insn = 0xea000000;
4906
c7b8f16e
JB		 4907#define VFP11_ERRATUM_VENEER_SIZE 8
4908
845b51d6
PB		 4909#define ARM_BX_VENEER_SIZE 12
4910static const insn32 armbx1_tst_insn = 0xe3100001;
4911static const insn32 armbx2_moveq_insn = 0x01a0f000;
4912static const insn32 armbx3_bx_insn = 0xe12fff10;
4913
7e392df6 4914#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4915static void
4916arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4917{
4918 asection * s;
8029a119 4919 bfd_byte * contents;
252b5132 4920
8029a119 4921 if (size == 0)
3e6b1042
DJ		 4922 {
4923 /* Do not include empty glue sections in the output. */
4924 if (abfd != NULL)
4925 {
4926 s = bfd_get_section_by_name (abfd, name);
4927 if (s != NULL)
4928 s->flags |= SEC_EXCLUDE;
4929 }
4930 return;
4931 }
252b5132 4932
8029a119 4933 BFD_ASSERT (abfd != NULL);
252b5132 4934
8029a119
NC		 4935 s = bfd_get_section_by_name (abfd, name);
4936 BFD_ASSERT (s != NULL);
252b5132 4937
8029a119 4938 contents = bfd_alloc (abfd, size);
252b5132 4939
8029a119
NC		 4940 BFD_ASSERT (s->size == size);
4941 s->contents = contents;
4942}
906e58ca 4943
8029a119
NC		 4944bfd_boolean
4945bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4946{
4947 struct elf32_arm_link_hash_table * globals;
906e58ca 4948
8029a119
NC		 4949 globals = elf32_arm_hash_table (info);
4950 BFD_ASSERT (globals != NULL);
906e58ca 4951
8029a119
NC		 4952 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4953 globals->arm_glue_size,
4954 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4955
8029a119
NC		 4956 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4957 globals->thumb_glue_size,
4958 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4959
8029a119
NC		 4960 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4961 globals->vfp11_erratum_glue_size,
4962 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4963
8029a119
NC		 4964 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4965 globals->bx_glue_size,
845b51d6
PB		 4966 ARM_BX_GLUE_SECTION_NAME);
4967
b34976b6 4968 return TRUE;
252b5132
RH		 4969}
4970
a4fd1a8e 4971/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4972 returns the symbol identifying the stub. */
4973
a4fd1a8e 4974static struct elf_link_hash_entry *
57e8b36a
NC		 4975record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4976 struct elf_link_hash_entry * h)
252b5132
RH		 4977{
4978 const char * name = h->root.root.string;
63b0f745 4979 asection * s;
252b5132
RH		 4980 char * tmp_name;
4981 struct elf_link_hash_entry * myh;
14a793b2 4982 struct bfd_link_hash_entry * bh;
252b5132 4983 struct elf32_arm_link_hash_table * globals;
dc810e39 4984 bfd_vma val;
2f475487 4985 bfd_size_type size;
252b5132
RH		 4986
4987 globals = elf32_arm_hash_table (link_info);
4988
4989 BFD_ASSERT (globals != NULL);
4990 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4991
4992 s = bfd_get_section_by_name
4993 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4994
252b5132
RH		 4995 BFD_ASSERT (s != NULL);
4996
57e8b36a 4997 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4998
4999 BFD_ASSERT (tmp_name);
5000
5001 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5002
5003 myh = elf_link_hash_lookup
b34976b6 5004 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5005
5006 if (myh != NULL)
5007 {
9b485d32 5008 /* We've already seen this guy. */
252b5132 5009 free (tmp_name);
a4fd1a8e 5010 return myh;
252b5132
RH		 5011 }
5012
57e8b36a
NC		 5013 /* The only trick here is using hash_table->arm_glue_size as the value.
5014 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5015 putting it. The +1 on the value marks that the stub has not been
5016 output yet - not that it is a Thumb function. */
14a793b2 5017 bh = NULL;
dc810e39
AM		 5018 val = globals->arm_glue_size + 1;
5019 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5020 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5021 NULL, TRUE, FALSE, &bh);
252b5132 5022
b7693d02
DJ		 5023 myh = (struct elf_link_hash_entry *) bh;
5024 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5025 myh->forced_local = 1;
5026
252b5132
RH		 5027 free (tmp_name);
5028
27e55c4d
PB		 5029 if (link_info->shared || globals->root.is_relocatable_executable
5030 || globals->pic_veneer)
2f475487 5031 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5032 else if (globals->use_blx)
5033 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5034 else
2f475487
AM		 5035 size = ARM2THUMB_STATIC_GLUE_SIZE;
5036
5037 s->size += size;
5038 globals->arm_glue_size += size;
252b5132 5039
a4fd1a8e 5040 return myh;
252b5132
RH		 5041}
5042
845b51d6
PB		 5043/* Allocate space for ARMv4 BX veneers. */
5044
5045static void
5046record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5047{
5048 asection * s;
5049 struct elf32_arm_link_hash_table *globals;
5050 char *tmp_name;
5051 struct elf_link_hash_entry *myh;
5052 struct bfd_link_hash_entry *bh;
5053 bfd_vma val;
5054
5055 /* BX PC does not need a veneer. */
5056 if (reg == 15)
5057 return;
5058
5059 globals = elf32_arm_hash_table (link_info);
5060
5061 BFD_ASSERT (globals != NULL);
5062 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5063
5064 /* Check if this veneer has already been allocated. */
5065 if (globals->bx_glue_offset[reg])
5066 return;
5067
5068 s = bfd_get_section_by_name
5069 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5070
5071 BFD_ASSERT (s != NULL);
5072
5073 /* Add symbol for veneer. */
5074 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5075
845b51d6 5076 BFD_ASSERT (tmp_name);
906e58ca 5077
845b51d6 5078 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5079
845b51d6
PB		 5080 myh = elf_link_hash_lookup
5081 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5082
845b51d6 5083 BFD_ASSERT (myh == NULL);
906e58ca 5084
845b51d6
PB		 5085 bh = NULL;
5086 val = globals->bx_glue_size;
5087 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5088 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5089 NULL, TRUE, FALSE, &bh);
5090
5091 myh = (struct elf_link_hash_entry *) bh;
5092 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5093 myh->forced_local = 1;
5094
5095 s->size += ARM_BX_VENEER_SIZE;
5096 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5097 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5098}
5099
5100
c7b8f16e
JB		 5101/* Add an entry to the code/data map for section SEC. */
5102
5103static void
5104elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5105{
5106 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5107 unsigned int newidx;
906e58ca 5108
c7b8f16e
JB		 5109 if (sec_data->map == NULL)
5110 {
5111 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5112 sec_data->mapcount = 0;
5113 sec_data->mapsize = 1;
5114 }
906e58ca 5115
c7b8f16e 5116 newidx = sec_data->mapcount++;
906e58ca 5117
c7b8f16e
JB		 5118 if (sec_data->mapcount > sec_data->mapsize)
5119 {
5120 sec_data->mapsize *= 2;
515ef31d
NC		 5121 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5122 * sizeof (elf32_arm_section_map));
5123 }
5124
5125 if (sec_data->map)
5126 {
5127 sec_data->map[newidx].vma = vma;
5128 sec_data->map[newidx].type = type;
c7b8f16e 5129 }
c7b8f16e
JB		 5130}
5131
5132
5133/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5134 veneers are handled for now. */
5135
5136static bfd_vma
5137record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5138 elf32_vfp11_erratum_list *branch,
5139 bfd *branch_bfd,
5140 asection *branch_sec,
5141 unsigned int offset)
5142{
5143 asection *s;
5144 struct elf32_arm_link_hash_table *hash_table;
5145 char *tmp_name;
5146 struct elf_link_hash_entry *myh;
5147 struct bfd_link_hash_entry *bh;
5148 bfd_vma val;
5149 struct _arm_elf_section_data *sec_data;
5150 int errcount;
5151 elf32_vfp11_erratum_list *newerr;
906e58ca 5152
c7b8f16e 5153 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5154
c7b8f16e
JB		 5155 BFD_ASSERT (hash_table != NULL);
5156 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5157
c7b8f16e
JB		 5158 s = bfd_get_section_by_name
5159 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5160
c7b8f16e 5161 sec_data = elf32_arm_section_data (s);
906e58ca 5162
c7b8f16e 5163 BFD_ASSERT (s != NULL);
906e58ca 5164
c7b8f16e
JB		 5165 tmp_name = bfd_malloc ((bfd_size_type) strlen
5166 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5167
c7b8f16e 5168 BFD_ASSERT (tmp_name);
906e58ca 5169
c7b8f16e
JB		 5170 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5171 hash_table->num_vfp11_fixes);
906e58ca 5172
c7b8f16e
JB		 5173 myh = elf_link_hash_lookup
5174 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5175
c7b8f16e 5176 BFD_ASSERT (myh == NULL);
906e58ca 5177
c7b8f16e
JB		 5178 bh = NULL;
5179 val = hash_table->vfp11_erratum_glue_size;
5180 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5181 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5182 NULL, TRUE, FALSE, &bh);
5183
5184 myh = (struct elf_link_hash_entry *) bh;
5185 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5186 myh->forced_local = 1;
5187
5188 /* Link veneer back to calling location. */
5189 errcount = ++(sec_data->erratumcount);
5190 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5191
c7b8f16e
JB		 5192 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5193 newerr->vma = -1;
5194 newerr->u.v.branch = branch;
5195 newerr->u.v.id = hash_table->num_vfp11_fixes;
5196 branch->u.b.veneer = newerr;
5197
5198 newerr->next = sec_data->erratumlist;
5199 sec_data->erratumlist = newerr;
5200
5201 /* A symbol for the return from the veneer. */
5202 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5203 hash_table->num_vfp11_fixes);
5204
5205 myh = elf_link_hash_lookup
5206 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5207
c7b8f16e
JB		 5208 if (myh != NULL)
5209 abort ();
5210
5211 bh = NULL;
5212 val = offset + 4;
5213 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5214 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5215
c7b8f16e
JB		 5216 myh = (struct elf_link_hash_entry *) bh;
5217 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5218 myh->forced_local = 1;
5219
5220 free (tmp_name);
906e58ca 5221
c7b8f16e
JB		 5222 /* Generate a mapping symbol for the veneer section, and explicitly add an
5223 entry for that symbol to the code/data map for the section. */
5224 if (hash_table->vfp11_erratum_glue_size == 0)
5225 {
5226 bh = NULL;
5227 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5228 ever requires this erratum fix. */
5229 _bfd_generic_link_add_one_symbol (link_info,
5230 hash_table->bfd_of_glue_owner, "$a",
5231 BSF_LOCAL, s, 0, NULL,
5232 TRUE, FALSE, &bh);
5233
5234 myh = (struct elf_link_hash_entry *) bh;
5235 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5236 myh->forced_local = 1;
906e58ca 5237
c7b8f16e
JB		 5238 /* The elf32_arm_init_maps function only cares about symbols from input
5239 BFDs. We must make a note of this generated mapping symbol
5240 ourselves so that code byteswapping works properly in
5241 elf32_arm_write_section. */
5242 elf32_arm_section_map_add (s, 'a', 0);
5243 }
906e58ca 5244
c7b8f16e
JB		 5245 s->size += VFP11_ERRATUM_VENEER_SIZE;
5246 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5247 hash_table->num_vfp11_fixes++;
906e58ca 5248
c7b8f16e
JB		 5249 /* The offset of the veneer. */
5250 return val;
5251}
5252
8029a119 5253#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5254 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5255 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5256
5257/* Create a fake section for use by the ARM backend of the linker. */
5258
5259static bfd_boolean
5260arm_make_glue_section (bfd * abfd, const char * name)
5261{
5262 asection * sec;
5263
5264 sec = bfd_get_section_by_name (abfd, name);
5265 if (sec != NULL)
5266 /* Already made. */
5267 return TRUE;
5268
5269 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5270
5271 if (sec == NULL
5272 || !bfd_set_section_alignment (abfd, sec, 2))
5273 return FALSE;
5274
5275 /* Set the gc mark to prevent the section from being removed by garbage
5276 collection, despite the fact that no relocs refer to this section. */
5277 sec->gc_mark = 1;
5278
5279 return TRUE;
5280}
5281
8afb0e02
NC		 5282/* Add the glue sections to ABFD. This function is called from the
5283 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5284
b34976b6 5285bfd_boolean
57e8b36a
NC		 5286bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5287 struct bfd_link_info *info)
252b5132 5288{
8afb0e02
NC		 5289 /* If we are only performing a partial
5290 link do not bother adding the glue. */
1049f94e 5291 if (info->relocatable)
b34976b6 5292 return TRUE;
252b5132 5293
8029a119
NC		 5294 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5295 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5296 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5297 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5298}
5299
5300/* Select a BFD to be used to hold the sections used by the glue code.
5301 This function is called from the linker scripts in ld/emultempl/
8029a119 5302 {armelf/pe}.em. */
8afb0e02 5303
b34976b6 5304bfd_boolean
57e8b36a 5305bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5306{
5307 struct elf32_arm_link_hash_table *globals;
5308
5309 /* If we are only performing a partial link
5310 do not bother getting a bfd to hold the glue. */
1049f94e 5311 if (info->relocatable)
b34976b6 5312 return TRUE;
8afb0e02 5313
b7693d02
DJ		 5314 /* Make sure we don't attach the glue sections to a dynamic object. */
5315 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5316
8afb0e02
NC		 5317 globals = elf32_arm_hash_table (info);
5318
5319 BFD_ASSERT (globals != NULL);
5320
5321 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5322 return TRUE;
8afb0e02 5323
252b5132
RH		 5324 /* Save the bfd for later use. */
5325 globals->bfd_of_glue_owner = abfd;
cedb70c5 5326
b34976b6 5327 return TRUE;
252b5132
RH		 5328}
5329
906e58ca
NC		 5330static void
5331check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5332{
104d59d1
JM		 5333 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5334 Tag_CPU_arch) > 2)
39b41c9c
PB		 5335 globals->use_blx = 1;
5336}
5337
b34976b6 5338bfd_boolean
57e8b36a 5339bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5340 struct bfd_link_info *link_info)
252b5132
RH		 5341{
5342 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5343 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5344 Elf_Internal_Rela *irel, *irelend;
5345 bfd_byte *contents = NULL;
252b5132
RH		 5346
5347 asection *sec;
5348 struct elf32_arm_link_hash_table *globals;
5349
5350 /* If we are only performing a partial link do not bother
5351 to construct any glue. */
1049f94e 5352 if (link_info->relocatable)
b34976b6 5353 return TRUE;
252b5132 5354
39ce1a6a
NC		 5355 /* Here we have a bfd that is to be included on the link. We have a
5356 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5357 globals = elf32_arm_hash_table (link_info);
5358
5359 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5360
5361 check_use_blx (globals);
252b5132 5362
d504ffc8 5363 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5364 {
d003868e
AM		 5365 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5366 abfd);
e489d0ae
PB		 5367 return FALSE;
5368 }
f21f3fe0 5369
39ce1a6a
NC		 5370 /* PR 5398: If we have not decided to include any loadable sections in
5371 the output then we will not have a glue owner bfd. This is OK, it
5372 just means that there is nothing else for us to do here. */
5373 if (globals->bfd_of_glue_owner == NULL)
5374 return TRUE;
5375
252b5132
RH		 5376 /* Rummage around all the relocs and map the glue vectors. */
5377 sec = abfd->sections;
5378
5379 if (sec == NULL)
b34976b6 5380 return TRUE;
252b5132
RH		 5381
5382 for (; sec != NULL; sec = sec->next)
5383 {
5384 if (sec->reloc_count == 0)
5385 continue;
5386
2f475487
AM		 5387 if ((sec->flags & SEC_EXCLUDE) != 0)
5388 continue;
5389
0ffa91dd 5390 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5391
9b485d32 5392 /* Load the relocs. */
6cdc0ccc 5393 internal_relocs
906e58ca 5394 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5395
6cdc0ccc
AM		 5396 if (internal_relocs == NULL)
5397 goto error_return;
252b5132 5398
6cdc0ccc
AM		 5399 irelend = internal_relocs + sec->reloc_count;
5400 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5401 {
5402 long r_type;
5403 unsigned long r_index;
252b5132
RH		 5404
5405 struct elf_link_hash_entry *h;
5406
5407 r_type = ELF32_R_TYPE (irel->r_info);
5408 r_index = ELF32_R_SYM (irel->r_info);
5409
9b485d32 5410 /* These are the only relocation types we care about. */
ba96a88f 5411 if ( r_type != R_ARM_PC24
845b51d6 5412 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5413 continue;
5414
5415 /* Get the section contents if we haven't done so already. */
5416 if (contents == NULL)
5417 {
5418 /* Get cached copy if it exists. */
5419 if (elf_section_data (sec)->this_hdr.contents != NULL)
5420 contents = elf_section_data (sec)->this_hdr.contents;
5421 else
5422 {
5423 /* Go get them off disk. */
57e8b36a 5424 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5425 goto error_return;
5426 }
5427 }
5428
845b51d6
PB		 5429 if (r_type == R_ARM_V4BX)
5430 {
5431 int reg;
5432
5433 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5434 record_arm_bx_glue (link_info, reg);
5435 continue;
5436 }
5437
a7c10850 5438 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5439 h = NULL;
5440
9b485d32 5441 /* We don't care about local symbols. */
252b5132
RH		 5442 if (r_index < symtab_hdr->sh_info)
5443 continue;
5444
9b485d32 5445 /* This is an external symbol. */
252b5132
RH		 5446 r_index -= symtab_hdr->sh_info;
5447 h = (struct elf_link_hash_entry *)
5448 elf_sym_hashes (abfd)[r_index];
5449
5450 /* If the relocation is against a static symbol it must be within
5451 the current section and so cannot be a cross ARM/Thumb relocation. */
5452 if (h == NULL)
5453 continue;
5454
d504ffc8
DJ		 5455 /* If the call will go through a PLT entry then we do not need
5456 glue. */
5457 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5458 continue;
5459
252b5132
RH		 5460 switch (r_type)
5461 {
5462 case R_ARM_PC24:
5463 /* This one is a call from arm code. We need to look up
2f0ca46a 5464 the target of the call. If it is a thumb target, we
252b5132 5465 insert glue. */
ebe24dd4 5466 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5467 record_arm_to_thumb_glue (link_info, h);
5468 break;
5469
252b5132 5470 default:
c6596c5e 5471 abort ();
252b5132
RH		 5472 }
5473 }
6cdc0ccc
AM		 5474
5475 if (contents != NULL
5476 && elf_section_data (sec)->this_hdr.contents != contents)
5477 free (contents);
5478 contents = NULL;
5479
5480 if (internal_relocs != NULL
5481 && elf_section_data (sec)->relocs != internal_relocs)
5482 free (internal_relocs);
5483 internal_relocs = NULL;
252b5132
RH		 5484 }
5485
b34976b6 5486 return TRUE;
9a5aca8c 5487
252b5132 5488error_return:
6cdc0ccc
AM		 5489 if (contents != NULL
5490 && elf_section_data (sec)->this_hdr.contents != contents)
5491 free (contents);
5492 if (internal_relocs != NULL
5493 && elf_section_data (sec)->relocs != internal_relocs)
5494 free (internal_relocs);
9a5aca8c 5495
b34976b6 5496 return FALSE;
252b5132 5497}
7e392df6 5498#endif
252b5132 5499
eb043451 5500
c7b8f16e
JB		 5501/* Initialise maps of ARM/Thumb/data for input BFDs. */
5502
5503void
5504bfd_elf32_arm_init_maps (bfd *abfd)
5505{
5506 Elf_Internal_Sym *isymbuf;
5507 Elf_Internal_Shdr *hdr;
5508 unsigned int i, localsyms;
5509
af1f4419
NC		 5510 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5511 if (! is_arm_elf (abfd))
5512 return;
5513
c7b8f16e
JB		 5514 if ((abfd->flags & DYNAMIC) != 0)
5515 return;
5516
0ffa91dd 5517 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5518 localsyms = hdr->sh_info;
5519
5520 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5521 should contain the number of local symbols, which should come before any
5522 global symbols. Mapping symbols are always local. */
5523 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5524 NULL);
5525
5526 /* No internal symbols read? Skip this BFD. */
5527 if (isymbuf == NULL)
5528 return;
5529
5530 for (i = 0; i < localsyms; i++)
5531 {
5532 Elf_Internal_Sym *isym = &isymbuf[i];
5533 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5534 const char *name;
906e58ca 5535
c7b8f16e
JB		 5536 if (sec != NULL
5537 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5538 {
5539 name = bfd_elf_string_from_elf_section (abfd,
5540 hdr->sh_link, isym->st_name);
906e58ca 5541
c7b8f16e
JB		 5542 if (bfd_is_arm_special_symbol_name (name,
5543 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5544 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5545 }
5546 }
5547}
5548
5549
48229727
JB		 5550/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5551 say what they wanted. */
5552
5553void
5554bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5555{
5556 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5557 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5558
5559 if (globals->fix_cortex_a8 == -1)
5560 {
5561 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5562 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5563 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5564 || out_attr[Tag_CPU_arch_profile].i == 0))
5565 globals->fix_cortex_a8 = 1;
5566 else
5567 globals->fix_cortex_a8 = 0;
5568 }
5569}
5570
5571
c7b8f16e
JB		 5572void
5573bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5574{
5575 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5576 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5577
c7b8f16e
JB		 5578 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5579 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5580 {
5581 switch (globals->vfp11_fix)
5582 {
5583 case BFD_ARM_VFP11_FIX_DEFAULT:
5584 case BFD_ARM_VFP11_FIX_NONE:
5585 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5586 break;
906e58ca 5587
c7b8f16e
JB		 5588 default:
5589 /* Give a warning, but do as the user requests anyway. */
5590 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5591 "workaround is not necessary for target architecture"), obfd);
5592 }
5593 }
5594 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5595 /* For earlier architectures, we might need the workaround, but do not
5596 enable it by default. If users is running with broken hardware, they
5597 must enable the erratum fix explicitly. */
5598 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5599}
5600
5601
906e58ca
NC		 5602enum bfd_arm_vfp11_pipe
5603{
c7b8f16e
JB		 5604 VFP11_FMAC,
5605 VFP11_LS,
5606 VFP11_DS,
5607 VFP11_BAD
5608};
5609
5610/* Return a VFP register number. This is encoded as RX:X for single-precision
5611 registers, or X:RX for double-precision registers, where RX is the group of
5612 four bits in the instruction encoding and X is the single extension bit.
5613 RX and X fields are specified using their lowest (starting) bit. The return
5614 value is:
5615
5616 0...31: single-precision registers s0...s31
5617 32...63: double-precision registers d0...d31.
906e58ca 5618
c7b8f16e
JB		 5619 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5620 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5621
c7b8f16e
JB		 5622static unsigned int
5623bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5624 unsigned int x)
5625{
5626 if (is_double)
5627 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5628 else
5629 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5630}
5631
5632/* Set bits in *WMASK according to a register number REG as encoded by
5633 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5634
5635static void
5636bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5637{
5638 if (reg < 32)
5639 *wmask |= 1 << reg;
5640 else if (reg < 48)
5641 *wmask |= 3 << ((reg - 32) * 2);
5642}
5643
5644/* Return TRUE if WMASK overwrites anything in REGS. */
5645
5646static bfd_boolean
5647bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5648{
5649 int i;
906e58ca 5650
c7b8f16e
JB		 5651 for (i = 0; i < numregs; i++)
5652 {
5653 unsigned int reg = regs[i];
5654
5655 if (reg < 32 && (wmask & (1 << reg)) != 0)
5656 return TRUE;
906e58ca 5657
c7b8f16e
JB		 5658 reg -= 32;
5659
5660 if (reg >= 16)
5661 continue;
906e58ca 5662
c7b8f16e
JB		 5663 if ((wmask & (3 << (reg * 2))) != 0)
5664 return TRUE;
5665 }
906e58ca 5666
c7b8f16e
JB		 5667 return FALSE;
5668}
5669
5670/* In this function, we're interested in two things: finding input registers
5671 for VFP data-processing instructions, and finding the set of registers which
5672 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5673 hold the written set, so FLDM etc. are easy to deal with (we're only
5674 interested in 32 SP registers or 16 dp registers, due to the VFP version
5675 implemented by the chip in question). DP registers are marked by setting
5676 both SP registers in the write mask). */
5677
5678static enum bfd_arm_vfp11_pipe
5679bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5680 int *numregs)
5681{
5682 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5683 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5684
5685 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5686 {
5687 unsigned int pqrs;
5688 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5689 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5690
5691 pqrs = ((insn & 0x00800000) >> 20)
5692 | ((insn & 0x00300000) >> 19)
5693 | ((insn & 0x00000040) >> 6);
5694
5695 switch (pqrs)
5696 {
5697 case 0: /* fmac[sd]. */
5698 case 1: /* fnmac[sd]. */
5699 case 2: /* fmsc[sd]. */
5700 case 3: /* fnmsc[sd]. */
5701 pipe = VFP11_FMAC;
5702 bfd_arm_vfp11_write_mask (destmask, fd);
5703 regs[0] = fd;
5704 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5705 regs[2] = fm;
5706 *numregs = 3;
5707 break;
5708
5709 case 4: /* fmul[sd]. */
5710 case 5: /* fnmul[sd]. */
5711 case 6: /* fadd[sd]. */
5712 case 7: /* fsub[sd]. */
5713 pipe = VFP11_FMAC;
5714 goto vfp_binop;
5715
5716 case 8: /* fdiv[sd]. */
5717 pipe = VFP11_DS;
5718 vfp_binop:
5719 bfd_arm_vfp11_write_mask (destmask, fd);
5720 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5721 regs[1] = fm;
5722 *numregs = 2;
5723 break;
5724
5725 case 15: /* extended opcode. */
5726 {
5727 unsigned int extn = ((insn >> 15) & 0x1e)
5728 | ((insn >> 7) & 1);
5729
5730 switch (extn)
5731 {
5732 case 0: /* fcpy[sd]. */
5733 case 1: /* fabs[sd]. */
5734 case 2: /* fneg[sd]. */
5735 case 8: /* fcmp[sd]. */
5736 case 9: /* fcmpe[sd]. */
5737 case 10: /* fcmpz[sd]. */
5738 case 11: /* fcmpez[sd]. */
5739 case 16: /* fuito[sd]. */
5740 case 17: /* fsito[sd]. */
5741 case 24: /* ftoui[sd]. */
5742 case 25: /* ftouiz[sd]. */
5743 case 26: /* ftosi[sd]. */
5744 case 27: /* ftosiz[sd]. */
5745 /* These instructions will not bounce due to underflow. */
5746 *numregs = 0;
5747 pipe = VFP11_FMAC;
5748 break;
5749
5750 case 3: /* fsqrt[sd]. */
5751 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5752 registers to cause the erratum in previous instructions. */
5753 bfd_arm_vfp11_write_mask (destmask, fd);
5754 pipe = VFP11_DS;
5755 break;
5756
5757 case 15: /* fcvt{ds,sd}. */
5758 {
5759 int rnum = 0;
5760
5761 bfd_arm_vfp11_write_mask (destmask, fd);
5762
5763 /* Only FCVTSD can underflow. */
5764 if ((insn & 0x100) != 0)
5765 regs[rnum++] = fm;
5766
5767 *numregs = rnum;
5768
5769 pipe = VFP11_FMAC;
5770 }
5771 break;
5772
5773 default:
5774 return VFP11_BAD;
5775 }
5776 }
5777 break;
5778
5779 default:
5780 return VFP11_BAD;
5781 }
5782 }
5783 /* Two-register transfer. */
5784 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5785 {
5786 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5787
c7b8f16e
JB		 5788 if ((insn & 0x100000) == 0)
5789 {
5790 if (is_double)
5791 bfd_arm_vfp11_write_mask (destmask, fm);
5792 else
5793 {
5794 bfd_arm_vfp11_write_mask (destmask, fm);
5795 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5796 }
5797 }
5798
5799 pipe = VFP11_LS;
5800 }
5801 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5802 {
5803 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5804 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5805
c7b8f16e
JB		 5806 switch (puw)
5807 {
5808 case 0: /* Two-reg transfer. We should catch these above. */
5809 abort ();
906e58ca 5810
c7b8f16e
JB		 5811 case 2: /* fldm[sdx]. */
5812 case 3:
5813 case 5:
5814 {
5815 unsigned int i, offset = insn & 0xff;
5816
5817 if (is_double)
5818 offset >>= 1;
5819
5820 for (i = fd; i < fd + offset; i++)
5821 bfd_arm_vfp11_write_mask (destmask, i);
5822 }
5823 break;
906e58ca 5824
c7b8f16e
JB		 5825 case 4: /* fld[sd]. */
5826 case 6:
5827 bfd_arm_vfp11_write_mask (destmask, fd);
5828 break;
906e58ca 5829
c7b8f16e
JB		 5830 default:
5831 return VFP11_BAD;
5832 }
5833
5834 pipe = VFP11_LS;
5835 }
5836 /* Single-register transfer. Note L==0. */
5837 else if ((insn & 0x0f100e10) == 0x0e000a10)
5838 {
5839 unsigned int opcode = (insn >> 21) & 7;
5840 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5841
5842 switch (opcode)
5843 {
5844 case 0: /* fmsr/fmdlr. */
5845 case 1: /* fmdhr. */
5846 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5847 destination register. I don't know if this is exactly right,
5848 but it is the conservative choice. */
5849 bfd_arm_vfp11_write_mask (destmask, fn);
5850 break;
5851
5852 case 7: /* fmxr. */
5853 break;
5854 }
5855
5856 pipe = VFP11_LS;
5857 }
5858
5859 return pipe;
5860}
5861
5862
5863static int elf32_arm_compare_mapping (const void * a, const void * b);
5864
5865
5866/* Look for potentially-troublesome code sequences which might trigger the
5867 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5868 (available from ARM) for details of the erratum. A short version is
5869 described in ld.texinfo. */
5870
5871bfd_boolean
5872bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5873{
5874 asection *sec;
5875 bfd_byte *contents = NULL;
5876 int state = 0;
5877 int regs[3], numregs = 0;
5878 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5879 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5880
c7b8f16e
JB		 5881 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5882 The states transition as follows:
906e58ca 5883
c7b8f16e
JB		 5884 0 -> 1 (vector) or 0 -> 2 (scalar)
5885 A VFP FMAC-pipeline instruction has been seen. Fill
5886 regs[0]..regs[numregs-1] with its input operands. Remember this
5887 instruction in 'first_fmac'.
5888
5889 1 -> 2
5890 Any instruction, except for a VFP instruction which overwrites
5891 regs[*].
906e58ca 5892
c7b8f16e
JB		 5893 1 -> 3 [ -> 0 ] or
5894 2 -> 3 [ -> 0 ]
5895 A VFP instruction has been seen which overwrites any of regs[*].
5896 We must make a veneer! Reset state to 0 before examining next
5897 instruction.
906e58ca 5898
c7b8f16e
JB		 5899 2 -> 0
5900 If we fail to match anything in state 2, reset to state 0 and reset
5901 the instruction pointer to the instruction after 'first_fmac'.
5902
5903 If the VFP11 vector mode is in use, there must be at least two unrelated
5904 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5905 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5906
5907 /* If we are only performing a partial link do not bother
5908 to construct any glue. */
5909 if (link_info->relocatable)
5910 return TRUE;
5911
0ffa91dd
NC		 5912 /* Skip if this bfd does not correspond to an ELF image. */
5913 if (! is_arm_elf (abfd))
5914 return TRUE;
906e58ca 5915
c7b8f16e
JB		 5916 /* We should have chosen a fix type by the time we get here. */
5917 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5918
5919 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5920 return TRUE;
2e6030b9 5921
33a7ffc2
JM		 5922 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5923 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5924 return TRUE;
5925
c7b8f16e
JB		 5926 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5927 {
5928 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5929 struct _arm_elf_section_data *sec_data;
5930
5931 /* If we don't have executable progbits, we're not interested in this
5932 section. Also skip if section is to be excluded. */
5933 if (elf_section_type (sec) != SHT_PROGBITS
5934 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5935 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5936 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5937 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5938 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5939 continue;
5940
5941 sec_data = elf32_arm_section_data (sec);
906e58ca 5942
c7b8f16e
JB		 5943 if (sec_data->mapcount == 0)
5944 continue;
906e58ca 5945
c7b8f16e
JB		 5946 if (elf_section_data (sec)->this_hdr.contents != NULL)
5947 contents = elf_section_data (sec)->this_hdr.contents;
5948 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5949 goto error_return;
5950
5951 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5952 elf32_arm_compare_mapping);
5953
5954 for (span = 0; span < sec_data->mapcount; span++)
5955 {
5956 unsigned int span_start = sec_data->map[span].vma;
5957 unsigned int span_end = (span == sec_data->mapcount - 1)
5958 ? sec->size : sec_data->map[span + 1].vma;
5959 char span_type = sec_data->map[span].type;
906e58ca 5960
c7b8f16e
JB		 5961 /* FIXME: Only ARM mode is supported at present. We may need to
5962 support Thumb-2 mode also at some point. */
5963 if (span_type != 'a')
5964 continue;
5965
5966 for (i = span_start; i < span_end;)
5967 {
5968 unsigned int next_i = i + 4;
5969 unsigned int insn = bfd_big_endian (abfd)
5970 ? (contents[i] << 24)
5971 | (contents[i + 1] << 16)
5972 | (contents[i + 2] << 8)
5973 | contents[i + 3]
5974 : (contents[i + 3] << 24)
5975 | (contents[i + 2] << 16)
5976 | (contents[i + 1] << 8)
5977 | contents[i];
5978 unsigned int writemask = 0;
5979 enum bfd_arm_vfp11_pipe pipe;
5980
5981 switch (state)
5982 {
5983 case 0:
5984 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5985 &numregs);
5986 /* I'm assuming the VFP11 erratum can trigger with denorm
5987 operands on either the FMAC or the DS pipeline. This might
5988 lead to slightly overenthusiastic veneer insertion. */
5989 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5990 {
5991 state = use_vector ? 1 : 2;
5992 first_fmac = i;
5993 veneer_of_insn = insn;
5994 }
5995 break;
5996
5997 case 1:
5998 {
5999 int other_regs[3], other_numregs;
6000 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6001 other_regs,
6002 &other_numregs);
6003 if (pipe != VFP11_BAD
6004 && bfd_arm_vfp11_antidependency (writemask, regs,
6005 numregs))
6006 state = 3;
6007 else
6008 state = 2;
6009 }
6010 break;
6011
6012 case 2:
6013 {
6014 int other_regs[3], other_numregs;
6015 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6016 other_regs,
6017 &other_numregs);
6018 if (pipe != VFP11_BAD
6019 && bfd_arm_vfp11_antidependency (writemask, regs,
6020 numregs))
6021 state = 3;
6022 else
6023 {
6024 state = 0;
6025 next_i = first_fmac + 4;
6026 }
6027 }
6028 break;
6029
6030 case 3:
6031 abort (); /* Should be unreachable. */
6032 }
6033
6034 if (state == 3)
6035 {
6036 elf32_vfp11_erratum_list *newerr
6037 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6038 int errcount;
6039
6040 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6041
6042 newerr->u.b.vfp_insn = veneer_of_insn;
6043
6044 switch (span_type)
6045 {
6046 case 'a':
6047 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6048 break;
906e58ca 6049
c7b8f16e
JB		 6050 default:
6051 abort ();
6052 }
6053
6054 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6055 first_fmac);
6056
6057 newerr->vma = -1;
6058
6059 newerr->next = sec_data->erratumlist;
6060 sec_data->erratumlist = newerr;
6061
6062 state = 0;
6063 }
6064
6065 i = next_i;
6066 }
6067 }
906e58ca 6068
c7b8f16e
JB		 6069 if (contents != NULL
6070 && elf_section_data (sec)->this_hdr.contents != contents)
6071 free (contents);
6072 contents = NULL;
6073 }
6074
6075 return TRUE;
6076
6077error_return:
6078 if (contents != NULL
6079 && elf_section_data (sec)->this_hdr.contents != contents)
6080 free (contents);
906e58ca 6081
c7b8f16e
JB		 6082 return FALSE;
6083}
6084
6085/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6086 after sections have been laid out, using specially-named symbols. */
6087
6088void
6089bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6090 struct bfd_link_info *link_info)
6091{
6092 asection *sec;
6093 struct elf32_arm_link_hash_table *globals;
6094 char *tmp_name;
906e58ca 6095
c7b8f16e
JB		 6096 if (link_info->relocatable)
6097 return;
2e6030b9
MS		 6098
6099 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6100 if (! is_arm_elf (abfd))
2e6030b9
MS		 6101 return;
6102
c7b8f16e 6103 globals = elf32_arm_hash_table (link_info);
906e58ca 6104
c7b8f16e
JB		 6105 tmp_name = bfd_malloc ((bfd_size_type) strlen
6106 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6107
6108 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6109 {
6110 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6111 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6112
c7b8f16e
JB		 6113 for (; errnode != NULL; errnode = errnode->next)
6114 {
6115 struct elf_link_hash_entry *myh;
6116 bfd_vma vma;
6117
6118 switch (errnode->type)
6119 {
6120 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6121 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6122 /* Find veneer symbol. */
6123 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6124 errnode->u.b.veneer->u.v.id);
6125
6126 myh = elf_link_hash_lookup
6127 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6128
6129 if (myh == NULL)
6130 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6131 "`%s'"), abfd, tmp_name);
6132
6133 vma = myh->root.u.def.section->output_section->vma
6134 + myh->root.u.def.section->output_offset
6135 + myh->root.u.def.value;
6136
6137 errnode->u.b.veneer->vma = vma;
6138 break;
6139
6140 case VFP11_ERRATUM_ARM_VENEER:
6141 case VFP11_ERRATUM_THUMB_VENEER:
6142 /* Find return location. */
6143 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6144 errnode->u.v.id);
6145
6146 myh = elf_link_hash_lookup
6147 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6148
6149 if (myh == NULL)
6150 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6151 "`%s'"), abfd, tmp_name);
6152
6153 vma = myh->root.u.def.section->output_section->vma
6154 + myh->root.u.def.section->output_offset
6155 + myh->root.u.def.value;
6156
6157 errnode->u.v.branch->vma = vma;
6158 break;
906e58ca 6159
c7b8f16e
JB		 6160 default:
6161 abort ();
6162 }
6163 }
6164 }
906e58ca 6165
c7b8f16e
JB		 6166 free (tmp_name);
6167}
6168
6169
eb043451
PB		 6170/* Set target relocation values needed during linking. */
6171
6172void
bf21ed78
MS		 6173bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6174 struct bfd_link_info *link_info,
eb043451 6175 int target1_is_rel,
319850b4 6176 char * target2_type,
33bfe774 6177 int fix_v4bx,
c7b8f16e 6178 int use_blx,
bf21ed78 6179 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6180 int no_enum_warn, int no_wchar_warn,
48229727 6181 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6182{
6183 struct elf32_arm_link_hash_table *globals;
6184
6185 globals = elf32_arm_hash_table (link_info);
6186
6187 globals->target1_is_rel = target1_is_rel;
6188 if (strcmp (target2_type, "rel") == 0)
6189 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6190 else if (strcmp (target2_type, "abs") == 0)
6191 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6192 else if (strcmp (target2_type, "got-rel") == 0)
6193 globals->target2_reloc = R_ARM_GOT_PREL;
6194 else
6195 {
6196 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6197 target2_type);
6198 }
319850b4 6199 globals->fix_v4bx = fix_v4bx;
33bfe774 6200 globals->use_blx |= use_blx;
c7b8f16e 6201 globals->vfp11_fix = vfp11_fix;
27e55c4d 6202 globals->pic_veneer = pic_veneer;
48229727 6203 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6204
0ffa91dd
NC		 6205 BFD_ASSERT (is_arm_elf (output_bfd));
6206 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6207 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6208}
eb043451 6209
12a0a0fd 6210/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6211
12a0a0fd
PB		 6212static void
6213insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6214{
6215 bfd_vma upper;
6216 bfd_vma lower;
6217 int reloc_sign;
6218
6219 BFD_ASSERT ((offset & 1) == 0);
6220
6221 upper = bfd_get_16 (abfd, insn);
6222 lower = bfd_get_16 (abfd, insn + 2);
6223 reloc_sign = (offset < 0) ? 1 : 0;
6224 upper = (upper & ~(bfd_vma) 0x7ff)
6225 | ((offset >> 12) & 0x3ff)
6226 | (reloc_sign << 10);
906e58ca 6227 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6228 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6229 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6230 | ((offset >> 1) & 0x7ff);
6231 bfd_put_16 (abfd, upper, insn);
6232 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6233}
6234
9b485d32
NC		 6235/* Thumb code calling an ARM function. */
6236
252b5132 6237static int
57e8b36a
NC		 6238elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6239 const char * name,
6240 bfd * input_bfd,
6241 bfd * output_bfd,
6242 asection * input_section,
6243 bfd_byte * hit_data,
6244 asection * sym_sec,
6245 bfd_vma offset,
6246 bfd_signed_vma addend,
f2a9dd69
DJ		 6247 bfd_vma val,
6248 char **error_message)
252b5132 6249{
bcbdc74c 6250 asection * s = 0;
dc810e39 6251 bfd_vma my_offset;
252b5132 6252 long int ret_offset;
bcbdc74c
NC		 6253 struct elf_link_hash_entry * myh;
6254 struct elf32_arm_link_hash_table * globals;
252b5132 6255
f2a9dd69 6256 myh = find_thumb_glue (info, name, error_message);
252b5132 6257 if (myh == NULL)
b34976b6 6258 return FALSE;
252b5132
RH		 6259
6260 globals = elf32_arm_hash_table (info);
6261
6262 BFD_ASSERT (globals != NULL);
6263 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6264
6265 my_offset = myh->root.u.def.value;
6266
6267 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6268 THUMB2ARM_GLUE_SECTION_NAME);
6269
6270 BFD_ASSERT (s != NULL);
6271 BFD_ASSERT (s->contents != NULL);
6272 BFD_ASSERT (s->output_section != NULL);
6273
6274 if ((my_offset & 0x01) == 0x01)
6275 {
6276 if (sym_sec != NULL
6277 && sym_sec->owner != NULL
6278 && !INTERWORK_FLAG (sym_sec->owner))
6279 {
8f615d07 6280 (*_bfd_error_handler)
d003868e
AM		 6281 (_("%B(%s): warning: interworking not enabled.\n"
6282 " first occurrence: %B: thumb call to arm"),
6283 sym_sec->owner, input_bfd, name);
252b5132 6284
b34976b6 6285 return FALSE;
252b5132
RH		 6286 }
6287
6288 --my_offset;
6289 myh->root.u.def.value = my_offset;
6290
52ab56c2
PB		 6291 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6292 s->contents + my_offset);
252b5132 6293
52ab56c2
PB		 6294 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6295 s->contents + my_offset + 2);
252b5132
RH		 6296
6297 ret_offset =
9b485d32
NC		 6298 /* Address of destination of the stub. */
6299 ((bfd_signed_vma) val)
252b5132 6300 - ((bfd_signed_vma)
57e8b36a
NC		 6301 /* Offset from the start of the current section
6302 to the start of the stubs. */
9b485d32
NC		 6303 (s->output_offset
6304 /* Offset of the start of this stub from the start of the stubs. */
6305 + my_offset
6306 /* Address of the start of the current section. */
6307 + s->output_section->vma)
6308 /* The branch instruction is 4 bytes into the stub. */
6309 + 4
6310 /* ARM branches work from the pc of the instruction + 8. */
6311 + 8);
252b5132 6312
52ab56c2
PB		 6313 put_arm_insn (globals, output_bfd,
6314 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6315 s->contents + my_offset + 4);
252b5132
RH		 6316 }
6317
6318 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6319
427bfd90
NC		 6320 /* Now go back and fix up the original BL insn to point to here. */
6321 ret_offset =
6322 /* Address of where the stub is located. */
6323 (s->output_section->vma + s->output_offset + my_offset)
6324 /* Address of where the BL is located. */
57e8b36a
NC		 6325 - (input_section->output_section->vma + input_section->output_offset
6326 + offset)
427bfd90
NC		 6327 /* Addend in the relocation. */
6328 - addend
6329 /* Biassing for PC-relative addressing. */
6330 - 8;
252b5132 6331
12a0a0fd 6332 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6333
b34976b6 6334 return TRUE;
252b5132
RH		 6335}
6336
a4fd1a8e 6337/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6338
a4fd1a8e
PB		 6339static struct elf_link_hash_entry *
6340elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6341 const char * name,
6342 bfd * input_bfd,
6343 bfd * output_bfd,
6344 asection * sym_sec,
6345 bfd_vma val,
8029a119
NC		 6346 asection * s,
6347 char ** error_message)
252b5132 6348{
dc810e39 6349 bfd_vma my_offset;
252b5132 6350 long int ret_offset;
bcbdc74c
NC		 6351 struct elf_link_hash_entry * myh;
6352 struct elf32_arm_link_hash_table * globals;
252b5132 6353
f2a9dd69 6354 myh = find_arm_glue (info, name, error_message);
252b5132 6355 if (myh == NULL)
a4fd1a8e 6356 return NULL;
252b5132
RH		 6357
6358 globals = elf32_arm_hash_table (info);
6359
6360 BFD_ASSERT (globals != NULL);
6361 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6362
6363 my_offset = myh->root.u.def.value;
252b5132
RH		 6364
6365 if ((my_offset & 0x01) == 0x01)
6366 {
6367 if (sym_sec != NULL
6368 && sym_sec->owner != NULL
6369 && !INTERWORK_FLAG (sym_sec->owner))
6370 {
8f615d07 6371 (*_bfd_error_handler)
d003868e
AM		 6372 (_("%B(%s): warning: interworking not enabled.\n"
6373 " first occurrence: %B: arm call to thumb"),
6374 sym_sec->owner, input_bfd, name);
252b5132 6375 }
9b485d32 6376
252b5132
RH		 6377 --my_offset;
6378 myh->root.u.def.value = my_offset;
6379
27e55c4d
PB		 6380 if (info->shared || globals->root.is_relocatable_executable
6381 || globals->pic_veneer)
8f6277f5
PB		 6382 {
6383 /* For relocatable objects we can't use absolute addresses,
6384 so construct the address from a relative offset. */
6385 /* TODO: If the offset is small it's probably worth
6386 constructing the address with adds. */
52ab56c2
PB		 6387 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6388 s->contents + my_offset);
6389 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6390 s->contents + my_offset + 4);
6391 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6392 s->contents + my_offset + 8);
8f6277f5
PB		 6393 /* Adjust the offset by 4 for the position of the add,
6394 and 8 for the pipeline offset. */
6395 ret_offset = (val - (s->output_offset
6396 + s->output_section->vma
6397 + my_offset + 12))
6398 | 1;
6399 bfd_put_32 (output_bfd, ret_offset,
6400 s->contents + my_offset + 12);
6401 }
26079076
PB		 6402 else if (globals->use_blx)
6403 {
6404 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6405 s->contents + my_offset);
6406
6407 /* It's a thumb address. Add the low order bit. */
6408 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6409 s->contents + my_offset + 4);
6410 }
8f6277f5
PB		 6411 else
6412 {
52ab56c2
PB		 6413 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6414 s->contents + my_offset);
252b5132 6415
52ab56c2
PB		 6416 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6417 s->contents + my_offset + 4);
252b5132 6418
8f6277f5
PB		 6419 /* It's a thumb address. Add the low order bit. */
6420 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6421 s->contents + my_offset + 8);
8029a119
NC		 6422
6423 my_offset += 12;
8f6277f5 6424 }
252b5132
RH		 6425 }
6426
6427 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6428
a4fd1a8e
PB		 6429 return myh;
6430}
6431
6432/* Arm code calling a Thumb function. */
6433
6434static int
6435elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6436 const char * name,
6437 bfd * input_bfd,
6438 bfd * output_bfd,
6439 asection * input_section,
6440 bfd_byte * hit_data,
6441 asection * sym_sec,
6442 bfd_vma offset,
6443 bfd_signed_vma addend,
f2a9dd69
DJ		 6444 bfd_vma val,
6445 char **error_message)
a4fd1a8e
PB		 6446{
6447 unsigned long int tmp;
6448 bfd_vma my_offset;
6449 asection * s;
6450 long int ret_offset;
6451 struct elf_link_hash_entry * myh;
6452 struct elf32_arm_link_hash_table * globals;
6453
6454 globals = elf32_arm_hash_table (info);
6455
6456 BFD_ASSERT (globals != NULL);
6457 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6458
6459 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6460 ARM2THUMB_GLUE_SECTION_NAME);
6461 BFD_ASSERT (s != NULL);
6462 BFD_ASSERT (s->contents != NULL);
6463 BFD_ASSERT (s->output_section != NULL);
6464
6465 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6466 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6467 if (!myh)
6468 return FALSE;
6469
6470 my_offset = myh->root.u.def.value;
252b5132
RH		 6471 tmp = bfd_get_32 (input_bfd, hit_data);
6472 tmp = tmp & 0xFF000000;
6473
9b485d32 6474 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6475 ret_offset = (s->output_offset
6476 + my_offset
6477 + s->output_section->vma
6478 - (input_section->output_offset
6479 + input_section->output_section->vma
6480 + offset + addend)
6481 - 8);
9a5aca8c 6482
252b5132
RH		 6483 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6484
dc810e39 6485 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6486
b34976b6 6487 return TRUE;
252b5132
RH		 6488}
6489
a4fd1a8e
PB		 6490/* Populate Arm stub for an exported Thumb function. */
6491
6492static bfd_boolean
6493elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6494{
6495 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6496 asection * s;
6497 struct elf_link_hash_entry * myh;
6498 struct elf32_arm_link_hash_entry *eh;
6499 struct elf32_arm_link_hash_table * globals;
6500 asection *sec;
6501 bfd_vma val;
f2a9dd69 6502 char *error_message;
a4fd1a8e 6503
906e58ca 6504 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6505 /* Allocate stubs for exported Thumb functions on v4t. */
6506 if (eh->export_glue == NULL)
6507 return TRUE;
6508
6509 globals = elf32_arm_hash_table (info);
6510
6511 BFD_ASSERT (globals != NULL);
6512 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6513
6514 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6515 ARM2THUMB_GLUE_SECTION_NAME);
6516 BFD_ASSERT (s != NULL);
6517 BFD_ASSERT (s->contents != NULL);
6518 BFD_ASSERT (s->output_section != NULL);
6519
6520 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6521
6522 BFD_ASSERT (sec->output_section != NULL);
6523
a4fd1a8e
PB		 6524 val = eh->export_glue->root.u.def.value + sec->output_offset
6525 + sec->output_section->vma;
8029a119 6526
a4fd1a8e
PB		 6527 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6528 h->root.u.def.section->owner,
f2a9dd69
DJ		 6529 globals->obfd, sec, val, s,
6530 &error_message);
a4fd1a8e
PB		 6531 BFD_ASSERT (myh);
6532 return TRUE;
6533}
6534
845b51d6
PB		 6535/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6536
6537static bfd_vma
6538elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6539{
6540 bfd_byte *p;
6541 bfd_vma glue_addr;
6542 asection *s;
6543 struct elf32_arm_link_hash_table *globals;
6544
6545 globals = elf32_arm_hash_table (info);
6546
6547 BFD_ASSERT (globals != NULL);
6548 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6549
6550 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6551 ARM_BX_GLUE_SECTION_NAME);
6552 BFD_ASSERT (s != NULL);
6553 BFD_ASSERT (s->contents != NULL);
6554 BFD_ASSERT (s->output_section != NULL);
6555
6556 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6557
6558 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6559
6560 if ((globals->bx_glue_offset[reg] & 1) == 0)
6561 {
6562 p = s->contents + glue_addr;
6563 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6564 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6565 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6566 globals->bx_glue_offset[reg] |= 1;
6567 }
6568
6569 return glue_addr + s->output_section->vma + s->output_offset;
6570}
6571
a4fd1a8e
PB		 6572/* Generate Arm stubs for exported Thumb symbols. */
6573static void
906e58ca 6574elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6575 struct bfd_link_info *link_info)
6576{
6577 struct elf32_arm_link_hash_table * globals;
6578
8029a119
NC		 6579 if (link_info == NULL)
6580 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6581 return;
6582
6583 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6584 /* If blx is available then exported Thumb symbols are OK and there is
6585 nothing to do. */
a4fd1a8e
PB		 6586 if (globals->use_blx)
6587 return;
6588
6589 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6590 link_info);
6591}
6592
eb043451
PB		 6593/* Some relocations map to different relocations depending on the
6594 target. Return the real relocation. */
8029a119 6595
eb043451
PB		 6596static int
6597arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6598 int r_type)
6599{
6600 switch (r_type)
6601 {
6602 case R_ARM_TARGET1:
6603 if (globals->target1_is_rel)
6604 return R_ARM_REL32;
6605 else
6606 return R_ARM_ABS32;
6607
6608 case R_ARM_TARGET2:
6609 return globals->target2_reloc;
6610
6611 default:
6612 return r_type;
6613 }
6614}
eb043451 6615
ba93b8ac
DJ		 6616/* Return the base VMA address which should be subtracted from real addresses
6617 when resolving @dtpoff relocation.
6618 This is PT_TLS segment p_vaddr. */
6619
6620static bfd_vma
6621dtpoff_base (struct bfd_link_info *info)
6622{
6623 /* If tls_sec is NULL, we should have signalled an error already. */
6624 if (elf_hash_table (info)->tls_sec == NULL)
6625 return 0;
6626 return elf_hash_table (info)->tls_sec->vma;
6627}
6628
6629/* Return the relocation value for @tpoff relocation
6630 if STT_TLS virtual address is ADDRESS. */
6631
6632static bfd_vma
6633tpoff (struct bfd_link_info *info, bfd_vma address)
6634{
6635 struct elf_link_hash_table *htab = elf_hash_table (info);
6636 bfd_vma base;
6637
6638 /* If tls_sec is NULL, we should have signalled an error already. */
6639 if (htab->tls_sec == NULL)
6640 return 0;
6641 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6642 return address - htab->tls_sec->vma + base;
6643}
6644
00a97672
RS		 6645/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6646 VALUE is the relocation value. */
6647
6648static bfd_reloc_status_type
6649elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6650{
6651 if (value > 0xfff)
6652 return bfd_reloc_overflow;
6653
6654 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6655 bfd_put_32 (abfd, value, data);
6656 return bfd_reloc_ok;
6657}
6658
4962c51a
MS		 6659/* For a given value of n, calculate the value of G_n as required to
6660 deal with group relocations. We return it in the form of an
6661 encoded constant-and-rotation, together with the final residual. If n is
6662 specified as less than zero, then final_residual is filled with the
6663 input value and no further action is performed. */
6664
6665static bfd_vma
6666calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6667{
6668 int current_n;
6669 bfd_vma g_n;
6670 bfd_vma encoded_g_n = 0;
6671 bfd_vma residual = value; /* Also known as Y_n. */
6672
6673 for (current_n = 0; current_n <= n; current_n++)
6674 {
6675 int shift;
6676
6677 /* Calculate which part of the value to mask. */
6678 if (residual == 0)
6679 shift = 0;
6680 else
6681 {
6682 int msb;
6683
6684 /* Determine the most significant bit in the residual and
6685 align the resulting value to a 2-bit boundary. */
6686 for (msb = 30; msb >= 0; msb -= 2)
6687 if (residual & (3 << msb))
6688 break;
6689
6690 /* The desired shift is now (msb - 6), or zero, whichever
6691 is the greater. */
6692 shift = msb - 6;
6693 if (shift < 0)
6694 shift = 0;
6695 }
6696
6697 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6698 g_n = residual & (0xff << shift);
6699 encoded_g_n = (g_n >> shift)
6700 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6701
6702 /* Calculate the residual for the next time around. */
6703 residual &= ~g_n;
6704 }
6705
6706 *final_residual = residual;
6707
6708 return encoded_g_n;
6709}
6710
6711/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6712 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6713
4962c51a 6714static int
906e58ca 6715identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6716{
6717 int opcode = insn & 0x1e00000;
6718
6719 if (opcode == 1 << 23) /* ADD */
6720 return 1;
6721
6722 if (opcode == 1 << 22) /* SUB */
6723 return -1;
6724
6725 return 0;
6726}
6727
252b5132 6728/* Perform a relocation as part of a final link. */
9b485d32 6729
252b5132 6730static bfd_reloc_status_type
57e8b36a
NC		 6731elf32_arm_final_link_relocate (reloc_howto_type * howto,
6732 bfd * input_bfd,
6733 bfd * output_bfd,
6734 asection * input_section,
6735 bfd_byte * contents,
6736 Elf_Internal_Rela * rel,
6737 bfd_vma value,
6738 struct bfd_link_info * info,
6739 asection * sym_sec,
6740 const char * sym_name,
6741 int sym_flags,
0945cdfd 6742 struct elf_link_hash_entry * h,
f2a9dd69 6743 bfd_boolean * unresolved_reloc_p,
8029a119 6744 char ** error_message)
252b5132
RH		 6745{
6746 unsigned long r_type = howto->type;
6747 unsigned long r_symndx;
6748 bfd_byte * hit_data = contents + rel->r_offset;
6749 bfd * dynobj = NULL;
6750 Elf_Internal_Shdr * symtab_hdr;
6751 struct elf_link_hash_entry ** sym_hashes;
6752 bfd_vma * local_got_offsets;
6753 asection * sgot = NULL;
6754 asection * splt = NULL;
6755 asection * sreloc = NULL;
252b5132 6756 bfd_vma addend;
ba96a88f
NC		 6757 bfd_signed_vma signed_addend;
6758 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6759
9c504268
PB		 6760 globals = elf32_arm_hash_table (info);
6761
0ffa91dd
NC		 6762 BFD_ASSERT (is_arm_elf (input_bfd));
6763
6764 /* Some relocation types map to different relocations depending on the
9c504268 6765 target. We pick the right one here. */
eb043451
PB		 6766 r_type = arm_real_reloc_type (globals, r_type);
6767 if (r_type != howto->type)
6768 howto = elf32_arm_howto_from_type (r_type);
9c504268 6769
cac15327
NC		 6770 /* If the start address has been set, then set the EF_ARM_HASENTRY
6771 flag. Setting this more than once is redundant, but the cost is
6772 not too high, and it keeps the code simple.
99e4ae17 6773
cac15327
NC		 6774 The test is done here, rather than somewhere else, because the
6775 start address is only set just before the final link commences.
6776
6777 Note - if the user deliberately sets a start address of 0, the
6778 flag will not be set. */
6779 if (bfd_get_start_address (output_bfd) != 0)
6780 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6781
252b5132
RH		 6782 dynobj = elf_hash_table (info)->dynobj;
6783 if (dynobj)
6784 {
6785 sgot = bfd_get_section_by_name (dynobj, ".got");
6786 splt = bfd_get_section_by_name (dynobj, ".plt");
6787 }
0ffa91dd 6788 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6789 sym_hashes = elf_sym_hashes (input_bfd);
6790 local_got_offsets = elf_local_got_offsets (input_bfd);
6791 r_symndx = ELF32_R_SYM (rel->r_info);
6792
4e7fd91e 6793 if (globals->use_rel)
ba96a88f 6794 {
4e7fd91e
PB		 6795 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6796
6797 if (addend & ((howto->src_mask + 1) >> 1))
6798 {
6799 signed_addend = -1;
6800 signed_addend &= ~ howto->src_mask;
6801 signed_addend |= addend;
6802 }
6803 else
6804 signed_addend = addend;
ba96a88f
NC		 6805 }
6806 else
4e7fd91e 6807 addend = signed_addend = rel->r_addend;
f21f3fe0 6808
252b5132
RH		 6809 switch (r_type)
6810 {
6811 case R_ARM_NONE:
28a094c2
DJ		 6812 /* We don't need to find a value for this symbol. It's just a
6813 marker. */
6814 *unresolved_reloc_p = FALSE;
252b5132
RH		 6815 return bfd_reloc_ok;
6816
00a97672
RS		 6817 case R_ARM_ABS12:
6818 if (!globals->vxworks_p)
6819 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6820
252b5132
RH		 6821 case R_ARM_PC24:
6822 case R_ARM_ABS32:
bb224fc3 6823 case R_ARM_ABS32_NOI:
252b5132 6824 case R_ARM_REL32:
bb224fc3 6825 case R_ARM_REL32_NOI:
5b5bb741
PB		 6826 case R_ARM_CALL:
6827 case R_ARM_JUMP24:
dfc5f959 6828 case R_ARM_XPC25:
eb043451 6829 case R_ARM_PREL31:
7359ea65 6830 case R_ARM_PLT32:
7359ea65
DJ		 6831 /* Handle relocations which should use the PLT entry. ABS32/REL32
6832 will use the symbol's value, which may point to a PLT entry, but we
6833 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6834 branches in this object should go to it, except if the PLT is too
6835 far away, in which case a long branch stub should be inserted. */
bb224fc3 6836 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6837 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6838 && r_type != R_ARM_CALL
6839 && r_type != R_ARM_JUMP24
6840 && r_type != R_ARM_PLT32)
7359ea65 6841 && h != NULL
c84cd8ee 6842 && splt != NULL
7359ea65
DJ		 6843 && h->plt.offset != (bfd_vma) -1)
6844 {
c84cd8ee
DJ		 6845 /* If we've created a .plt section, and assigned a PLT entry to
6846 this function, it should not be known to bind locally. If
6847 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6848 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6849
6850 value = (splt->output_section->vma
6851 + splt->output_offset
6852 + h->plt.offset);
0945cdfd 6853 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6854 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6855 contents, rel->r_offset, value,
00a97672 6856 rel->r_addend);
7359ea65
DJ		 6857 }
6858
67687978
PB		 6859 /* When generating a shared object or relocatable executable, these
6860 relocations are copied into the output file to be resolved at
6861 run time. */
6862 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6863 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6864 && !(elf32_arm_hash_table (info)->vxworks_p
6865 && strcmp (input_section->output_section->name,
6866 ".tls_vars") == 0)
bb224fc3 6867 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6868 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6869 && (h == NULL
6870 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6871 || h->root.type != bfd_link_hash_undefweak)
6872 && r_type != R_ARM_PC24
5b5bb741
PB		 6873 && r_type != R_ARM_CALL
6874 && r_type != R_ARM_JUMP24
ee06dc07 6875 && r_type != R_ARM_PREL31
7359ea65 6876 && r_type != R_ARM_PLT32)
252b5132 6877 {
947216bf
AM		 6878 Elf_Internal_Rela outrel;
6879 bfd_byte *loc;
b34976b6 6880 bfd_boolean skip, relocate;
f21f3fe0 6881
0945cdfd
DJ		 6882 *unresolved_reloc_p = FALSE;
6883
252b5132
RH		 6884 if (sreloc == NULL)
6885 {
83bac4b0
NC		 6886 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6887 ! globals->use_rel);
f21f3fe0 6888
83bac4b0 6889 if (sreloc == NULL)
252b5132 6890 return bfd_reloc_notsupported;
252b5132 6891 }
f21f3fe0 6892
b34976b6
AM		 6893 skip = FALSE;
6894 relocate = FALSE;
f21f3fe0 6895
00a97672 6896 outrel.r_addend = addend;
c629eae0
JJ		 6897 outrel.r_offset =
6898 _bfd_elf_section_offset (output_bfd, info, input_section,
6899 rel->r_offset);
6900 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6901 skip = TRUE;
0bb2d96a 6902 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6903 skip = TRUE, relocate = TRUE;
252b5132
RH		 6904 outrel.r_offset += (input_section->output_section->vma
6905 + input_section->output_offset);
f21f3fe0 6906
252b5132 6907 if (skip)
0bb2d96a 6908 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6909 else if (h != NULL
6910 && h->dynindx != -1
7359ea65 6911 && (!info->shared
5e681ec4 6912 || !info->symbolic
f5385ebf 6913 || !h->def_regular))
5e681ec4 6914 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6915 else
6916 {
a16385dc
MM		 6917 int symbol;
6918
5e681ec4 6919 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6920 if (sym_flags == STT_ARM_TFUNC)
6921 value |= 1;
a16385dc 6922 if (globals->symbian_p)
6366ff1e 6923 {
74541ad4
AM		 6924 asection *osec;
6925
6366ff1e
MM		 6926 /* On Symbian OS, the data segment and text segement
6927 can be relocated independently. Therefore, we
6928 must indicate the segment to which this
6929 relocation is relative. The BPABI allows us to
6930 use any symbol in the right segment; we just use
6931 the section symbol as it is convenient. (We
6932 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6933 will not appear in the dynamic symbol table.)
6934
6935 Note that the dynamic linker ignores the section
6936 symbol value, so we don't subtract osec->vma
6937 from the emitted reloc addend. */
10dbd1f3 6938 if (sym_sec)
74541ad4 6939 osec = sym_sec->output_section;
10dbd1f3 6940 else
74541ad4
AM		 6941 osec = input_section->output_section;
6942 symbol = elf_section_data (osec)->dynindx;
6943 if (symbol == 0)
6944 {
6945 struct elf_link_hash_table *htab = elf_hash_table (info);
6946
6947 if ((osec->flags & SEC_READONLY) == 0
6948 && htab->data_index_section != NULL)
6949 osec = htab->data_index_section;
6950 else
6951 osec = htab->text_index_section;
6952 symbol = elf_section_data (osec)->dynindx;
6953 }
6366ff1e
MM		 6954 BFD_ASSERT (symbol != 0);
6955 }
a16385dc
MM		 6956 else
6957 /* On SVR4-ish systems, the dynamic loader cannot
6958 relocate the text and data segments independently,
6959 so the symbol does not matter. */
6960 symbol = 0;
6961 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6962 if (globals->use_rel)
6963 relocate = TRUE;
6964 else
6965 outrel.r_addend += value;
252b5132 6966 }
f21f3fe0 6967
947216bf 6968 loc = sreloc->contents;
00a97672
RS		 6969 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6970 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6971
f21f3fe0 6972 /* If this reloc is against an external symbol, we do not want to
252b5132 6973 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6974 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6975 if (! relocate)
6976 return bfd_reloc_ok;
9a5aca8c 6977
f21f3fe0 6978 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6979 contents, rel->r_offset, value,
6980 (bfd_vma) 0);
6981 }
6982 else switch (r_type)
6983 {
00a97672
RS		 6984 case R_ARM_ABS12:
6985 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6986
dfc5f959 6987 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6988 case R_ARM_CALL:
6989 case R_ARM_JUMP24:
8029a119 6990 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6991 case R_ARM_PLT32:
906e58ca 6992 {
906e58ca
NC		 6993 bfd_signed_vma branch_offset;
6994 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6995
dfc5f959 6996 if (r_type == R_ARM_XPC25)
252b5132 6997 {
dfc5f959
NC		 6998 /* Check for Arm calling Arm function. */
6999 /* FIXME: Should we translate the instruction into a BL
7000 instruction instead ? */
7001 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7002 (*_bfd_error_handler)
7003 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7004 input_bfd,
7005 h ? h->root.root.string : "(local)");
dfc5f959 7006 }
155d87d7 7007 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7008 {
7009 /* Check for Arm calling Thumb function. */
7010 if (sym_flags == STT_ARM_TFUNC)
7011 {
f2a9dd69
DJ		 7012 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7013 output_bfd, input_section,
7014 hit_data, sym_sec, rel->r_offset,
7015 signed_addend, value,
7016 error_message))
7017 return bfd_reloc_ok;
7018 else
7019 return bfd_reloc_dangerous;
dfc5f959 7020 }
252b5132 7021 }
ba96a88f 7022
906e58ca 7023 /* Check if a stub has to be inserted because the
8029a119 7024 destination is too far or we are changing mode. */
155d87d7
CL		 7025 if ( r_type == R_ARM_CALL
7026 || r_type == R_ARM_JUMP24
7027 || r_type == R_ARM_PLT32)
906e58ca 7028 {
ffcb4889
NS		 7029 bfd_vma from;
7030
5fa9e92f
CL		 7031 /* If the call goes through a PLT entry, make sure to
7032 check distance to the right destination address. */
7033 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7034 {
7035 value = (splt->output_section->vma
7036 + splt->output_offset
7037 + h->plt.offset);
7038 *unresolved_reloc_p = FALSE;
7039 }
7040
7041 from = (input_section->output_section->vma
7042 + input_section->output_offset
7043 + rel->r_offset);
7044 branch_offset = (bfd_signed_vma)(value - from);
7045
906e58ca
NC		 7046 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
7047 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 7048 || ((sym_flags == STT_ARM_TFUNC)
7049 && (((r_type == R_ARM_CALL) && !globals->use_blx)
7050 || (r_type == R_ARM_JUMP24)
7051 || (r_type == R_ARM_PLT32) ))
7052 )
906e58ca
NC		 7053 {
7054 /* The target is out of reach, so redirect the
7055 branch to the local stub for this function. */
7056
7057 stub_entry = elf32_arm_get_stub_entry (input_section,
7058 sym_sec, h,
7059 rel, globals);
7060 if (stub_entry != NULL)
7061 value = (stub_entry->stub_offset
7062 + stub_entry->stub_sec->output_offset
7063 + stub_entry->stub_sec->output_section->vma);
7064 }
7065 }
7066
dea514f5
PB		 7067 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7068 where:
7069 S is the address of the symbol in the relocation.
7070 P is address of the instruction being relocated.
7071 A is the addend (extracted from the instruction) in bytes.
7072
7073 S is held in 'value'.
7074 P is the base address of the section containing the
7075 instruction plus the offset of the reloc into that
7076 section, ie:
7077 (input_section->output_section->vma +
7078 input_section->output_offset +
7079 rel->r_offset).
7080 A is the addend, converted into bytes, ie:
7081 (signed_addend * 4)
7082
7083 Note: None of these operations have knowledge of the pipeline
7084 size of the processor, thus it is up to the assembler to
7085 encode this information into the addend. */
7086 value -= (input_section->output_section->vma
7087 + input_section->output_offset);
7088 value -= rel->r_offset;
4e7fd91e
PB		 7089 if (globals->use_rel)
7090 value += (signed_addend << howto->size);
7091 else
7092 /* RELA addends do not have to be adjusted by howto->size. */
7093 value += signed_addend;
23080146 7094
dcb5e6e6
NC		 7095 signed_addend = value;
7096 signed_addend >>= howto->rightshift;
9a5aca8c 7097
5ab79981 7098 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7099 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7100 Do the same for local undefined symbols.
7101 The jump to the next instruction is optimized as a NOP depending
7102 on the architecture. */
ffcb4889
NS		 7103 if (h ? (h->root.type == bfd_link_hash_undefweak
7104 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7105 : bfd_is_und_section (sym_sec))
5ab79981 7106 {
cd1dac3d
DG		 7107 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7108
7109 if (arch_has_arm_nop (globals))
7110 value |= 0x0320f000;
7111 else
7112 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7113 }
7114 else
59f2c4e7 7115 {
9b485d32 7116 /* Perform a signed range check. */
dcb5e6e6 7117 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7118 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7119 return bfd_reloc_overflow;
9a5aca8c 7120
5ab79981 7121 addend = (value & 2);
39b41c9c 7122
5ab79981
PB		 7123 value = (signed_addend & howto->dst_mask)
7124 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7125
5ab79981
PB		 7126 if (r_type == R_ARM_CALL)
7127 {
155d87d7
CL		 7128 /* Set the H bit in the BLX instruction. */
7129 if (sym_flags == STT_ARM_TFUNC)
7130 {
7131 if (addend)
7132 value |= (1 << 24);
7133 else
7134 value &= ~(bfd_vma)(1 << 24);
7135 }
7136
5ab79981 7137 /* Select the correct instruction (BL or BLX). */
906e58ca 7138 /* Only if we are not handling a BL to a stub. In this
8029a119 7139 case, mode switching is performed by the stub. */
906e58ca 7140 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7141 value |= (1 << 28);
7142 else
7143 {
7144 value &= ~(bfd_vma)(1 << 28);
7145 value |= (1 << 24);
7146 }
39b41c9c
PB		 7147 }
7148 }
906e58ca 7149 }
252b5132 7150 break;
f21f3fe0 7151
252b5132
RH		 7152 case R_ARM_ABS32:
7153 value += addend;
7154 if (sym_flags == STT_ARM_TFUNC)
7155 value |= 1;
7156 break;
f21f3fe0 7157
bb224fc3
MS		 7158 case R_ARM_ABS32_NOI:
7159 value += addend;
7160 break;
7161
252b5132 7162 case R_ARM_REL32:
a8bc6c78
PB		 7163 value += addend;
7164 if (sym_flags == STT_ARM_TFUNC)
7165 value |= 1;
252b5132 7166 value -= (input_section->output_section->vma
62efb346 7167 + input_section->output_offset + rel->r_offset);
252b5132 7168 break;
eb043451 7169
bb224fc3
MS		 7170 case R_ARM_REL32_NOI:
7171 value += addend;
7172 value -= (input_section->output_section->vma
7173 + input_section->output_offset + rel->r_offset);
7174 break;
7175
eb043451
PB		 7176 case R_ARM_PREL31:
7177 value -= (input_section->output_section->vma
7178 + input_section->output_offset + rel->r_offset);
7179 value += signed_addend;
7180 if (! h || h->root.type != bfd_link_hash_undefweak)
7181 {
8029a119 7182 /* Check for overflow. */
eb043451
PB		 7183 if ((value ^ (value >> 1)) & (1 << 30))
7184 return bfd_reloc_overflow;
7185 }
7186 value &= 0x7fffffff;
7187 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7188 if (sym_flags == STT_ARM_TFUNC)
7189 value |= 1;
7190 break;
252b5132 7191 }
f21f3fe0 7192
252b5132
RH		 7193 bfd_put_32 (input_bfd, value, hit_data);
7194 return bfd_reloc_ok;
7195
7196 case R_ARM_ABS8:
7197 value += addend;
7198 if ((long) value > 0x7f || (long) value < -0x80)
7199 return bfd_reloc_overflow;
7200
7201 bfd_put_8 (input_bfd, value, hit_data);
7202 return bfd_reloc_ok;
7203
7204 case R_ARM_ABS16:
7205 value += addend;
7206
7207 if ((long) value > 0x7fff || (long) value < -0x8000)
7208 return bfd_reloc_overflow;
7209
7210 bfd_put_16 (input_bfd, value, hit_data);
7211 return bfd_reloc_ok;
7212
252b5132 7213 case R_ARM_THM_ABS5:
9b485d32 7214 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7215 if (globals->use_rel)
7216 {
7217 /* Need to refetch addend. */
7218 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7219 /* ??? Need to determine shift amount from operand size. */
7220 addend >>= howto->rightshift;
7221 }
252b5132
RH		 7222 value += addend;
7223
7224 /* ??? Isn't value unsigned? */
7225 if ((long) value > 0x1f || (long) value < -0x10)
7226 return bfd_reloc_overflow;
7227
7228 /* ??? Value needs to be properly shifted into place first. */
7229 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7230 bfd_put_16 (input_bfd, value, hit_data);
7231 return bfd_reloc_ok;
7232
2cab6cc3
MS		 7233 case R_ARM_THM_ALU_PREL_11_0:
7234 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7235 {
7236 bfd_vma insn;
7237 bfd_signed_vma relocation;
7238
7239 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7240 | bfd_get_16 (input_bfd, hit_data + 2);
7241
7242 if (globals->use_rel)
7243 {
7244 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7245 | ((insn & (1 << 26)) >> 15);
7246 if (insn & 0xf00000)
7247 signed_addend = -signed_addend;
7248 }
7249
7250 relocation = value + signed_addend;
7251 relocation -= (input_section->output_section->vma
7252 + input_section->output_offset
7253 + rel->r_offset);
7254
7255 value = abs (relocation);
7256
7257 if (value >= 0x1000)
7258 return bfd_reloc_overflow;
7259
7260 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7261 | ((value & 0x700) << 4)
7262 | ((value & 0x800) << 15);
7263 if (relocation < 0)
7264 insn |= 0xa00000;
7265
7266 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7267 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7268
7269 return bfd_reloc_ok;
7270 }
7271
e1ec24c6
NC		 7272 case R_ARM_THM_PC8:
7273 /* PR 10073: This reloc is not generated by the GNU toolchain,
7274 but it is supported for compatibility with third party libraries
7275 generated by other compilers, specifically the ARM/IAR. */
7276 {
7277 bfd_vma insn;
7278 bfd_signed_vma relocation;
7279
7280 insn = bfd_get_16 (input_bfd, hit_data);
7281
7282 if (globals->use_rel)
7283 addend = (insn & 0x00ff) << 2;
7284
7285 relocation = value + addend;
7286 relocation -= (input_section->output_section->vma
7287 + input_section->output_offset
7288 + rel->r_offset);
7289
7290 value = abs (relocation);
7291
7292 /* We do not check for overflow of this reloc. Although strictly
7293 speaking this is incorrect, it appears to be necessary in order
7294 to work with IAR generated relocs. Since GCC and GAS do not
7295 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7296 a problem for them. */
7297 value &= 0x3fc;
7298
7299 insn = (insn & 0xff00) | (value >> 2);
7300
7301 bfd_put_16 (input_bfd, insn, hit_data);
7302
7303 return bfd_reloc_ok;
7304 }
7305
2cab6cc3
MS		 7306 case R_ARM_THM_PC12:
7307 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7308 {
7309 bfd_vma insn;
7310 bfd_signed_vma relocation;
7311
7312 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7313 | bfd_get_16 (input_bfd, hit_data + 2);
7314
7315 if (globals->use_rel)
7316 {
7317 signed_addend = insn & 0xfff;
7318 if (!(insn & (1 << 23)))
7319 signed_addend = -signed_addend;
7320 }
7321
7322 relocation = value + signed_addend;
7323 relocation -= (input_section->output_section->vma
7324 + input_section->output_offset
7325 + rel->r_offset);
7326
7327 value = abs (relocation);
7328
7329 if (value >= 0x1000)
7330 return bfd_reloc_overflow;
7331
7332 insn = (insn & 0xff7ff000) | value;
7333 if (relocation >= 0)
7334 insn |= (1 << 23);
7335
7336 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7337 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7338
7339 return bfd_reloc_ok;
7340 }
7341
dfc5f959 7342 case R_ARM_THM_XPC22:
c19d1205 7343 case R_ARM_THM_CALL:
bd97cb95 7344 case R_ARM_THM_JUMP24:
dfc5f959 7345 /* Thumb BL (branch long instruction). */
252b5132 7346 {
b34976b6 7347 bfd_vma relocation;
e95de063 7348 bfd_vma reloc_sign;
b34976b6
AM		 7349 bfd_boolean overflow = FALSE;
7350 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7351 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7352 bfd_signed_vma reloc_signed_max;
7353 bfd_signed_vma reloc_signed_min;
b34976b6 7354 bfd_vma check;
252b5132 7355 bfd_signed_vma signed_check;
e95de063 7356 int bitsize;
cd1dac3d 7357 const int thumb2 = using_thumb2 (globals);
252b5132 7358
5ab79981 7359 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7360 the next instruction unless a PLT entry will be created.
7361 The jump to the next instruction is optimized as a NOP.W for
7362 Thumb-2 enabled architectures. */
19540007
JM		 7363 if (h && h->root.type == bfd_link_hash_undefweak
7364 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7365 {
cd1dac3d
DG		 7366 if (arch_has_thumb2_nop (globals))
7367 {
7368 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7369 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7370 }
7371 else
7372 {
7373 bfd_put_16 (input_bfd, 0xe000, hit_data);
7374 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7375 }
5ab79981
PB		 7376 return bfd_reloc_ok;
7377 }
7378
e95de063
MS		 7379 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7380 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7381 if (globals->use_rel)
7382 {
e95de063
MS		 7383 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7384 bfd_vma upper = upper_insn & 0x3ff;
7385 bfd_vma lower = lower_insn & 0x7ff;
7386 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7387 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7388 bfd_vma i1 = j1 ^ s ? 0 : 1;
7389 bfd_vma i2 = j2 ^ s ? 0 : 1;
7390
7391 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7392 /* Sign extend. */
7393 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7394
4e7fd91e
PB		 7395 signed_addend = addend;
7396 }
cb1afa5c 7397
dfc5f959
NC		 7398 if (r_type == R_ARM_THM_XPC22)
7399 {
7400 /* Check for Thumb to Thumb call. */
7401 /* FIXME: Should we translate the instruction into a BL
7402 instruction instead ? */
7403 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7404 (*_bfd_error_handler)
7405 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7406 input_bfd,
7407 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7408 }
7409 else
252b5132 7410 {
dfc5f959
NC		 7411 /* If it is not a call to Thumb, assume call to Arm.
7412 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7413 function call at all, but rather a long jump. Calls through
7414 the PLT do not require stubs. */
7415 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7416 && (h == NULL || splt == NULL
7417 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7418 {
bd97cb95 7419 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7420 {
7421 /* Convert BL to BLX. */
7422 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7423 }
155d87d7
CL		 7424 else if (( r_type != R_ARM_THM_CALL)
7425 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7426 {
7427 if (elf32_thumb_to_arm_stub
7428 (info, sym_name, input_bfd, output_bfd, input_section,
7429 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7430 error_message))
7431 return bfd_reloc_ok;
7432 else
7433 return bfd_reloc_dangerous;
7434 }
da5938a2 7435 }
bd97cb95
DJ		 7436 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7437 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7438 {
7439 /* Make sure this is a BL. */
7440 lower_insn |= 0x1800;
7441 }
252b5132 7442 }
f21f3fe0 7443
b7693d02
DJ		 7444 /* Handle calls via the PLT. */
7445 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7446 {
7447 value = (splt->output_section->vma
7448 + splt->output_offset
7449 + h->plt.offset);
bd97cb95 7450 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7451 {
7452 /* If the Thumb BLX instruction is available, convert the
7453 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7454 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7455 }
7456 else
7457 /* Target the Thumb stub before the ARM PLT entry. */
7458 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7459 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7460 }
7461
155d87d7 7462 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7463 {
7464 /* Check if a stub has to be inserted because the destination
8029a119 7465 is too far. */
906e58ca
NC		 7466 bfd_vma from;
7467 bfd_signed_vma branch_offset;
7468 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7469
7470 from = (input_section->output_section->vma
7471 + input_section->output_offset
7472 + rel->r_offset);
7473 branch_offset = (bfd_signed_vma)(value - from);
7474
7475 if ((!thumb2
7476 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7477 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7478 ||
7479 (thumb2
7480 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7481 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7482 || ((sym_flags != STT_ARM_TFUNC)
7483 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7484 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7485 {
7486 /* The target is out of reach or we are changing modes, so
7487 redirect the branch to the local stub for this
7488 function. */
7489 stub_entry = elf32_arm_get_stub_entry (input_section,
7490 sym_sec, h,
7491 rel, globals);
7492 if (stub_entry != NULL)
7493 value = (stub_entry->stub_offset
7494 + stub_entry->stub_sec->output_offset
7495 + stub_entry->stub_sec->output_section->vma);
7496
f4ac8484 7497 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7498 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7499 {
7500 if ((stub_entry
7501 && !arm_stub_is_thumb (stub_entry->stub_type))
7502 || (sym_flags != STT_ARM_TFUNC))
7503 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7504 }
906e58ca
NC		 7505 }
7506 }
7507
ba96a88f 7508 relocation = value + signed_addend;
f21f3fe0 7509
252b5132 7510 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7511 + input_section->output_offset
7512 + rel->r_offset);
9a5aca8c 7513
252b5132
RH		 7514 check = relocation >> howto->rightshift;
7515
7516 /* If this is a signed value, the rightshift just dropped
7517 leading 1 bits (assuming twos complement). */
7518 if ((bfd_signed_vma) relocation >= 0)
7519 signed_check = check;
7520 else
7521 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7522
e95de063
MS		 7523 /* Calculate the permissable maximum and minimum values for
7524 this relocation according to whether we're relocating for
7525 Thumb-2 or not. */
7526 bitsize = howto->bitsize;
7527 if (!thumb2)
7528 bitsize -= 2;
7529 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7530 reloc_signed_min = ~reloc_signed_max;
7531
252b5132 7532 /* Assumes two's complement. */
ba96a88f 7533 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7534 overflow = TRUE;
252b5132 7535
bd97cb95 7536 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7537 /* For a BLX instruction, make sure that the relocation is rounded up
7538 to a word boundary. This follows the semantics of the instruction
7539 which specifies that bit 1 of the target address will come from bit
7540 1 of the base address. */
7541 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7542
e95de063
MS		 7543 /* Put RELOCATION back into the insn. Assumes two's complement.
7544 We use the Thumb-2 encoding, which is safe even if dealing with
7545 a Thumb-1 instruction by virtue of our overflow check above. */
7546 reloc_sign = (signed_check < 0) ? 1 : 0;
7547 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7548 | ((relocation >> 12) & 0x3ff)
7549 | (reloc_sign << 10);
906e58ca 7550 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7551 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7552 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7553 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7554
252b5132
RH		 7555 /* Put the relocated value back in the object file: */
7556 bfd_put_16 (input_bfd, upper_insn, hit_data);
7557 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7558
7559 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7560 }
7561 break;
7562
c19d1205
ZW		 7563 case R_ARM_THM_JUMP19:
7564 /* Thumb32 conditional branch instruction. */
7565 {
7566 bfd_vma relocation;
7567 bfd_boolean overflow = FALSE;
7568 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7569 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7570 bfd_signed_vma reloc_signed_max = 0xffffe;
7571 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7572 bfd_signed_vma signed_check;
7573
7574 /* Need to refetch the addend, reconstruct the top three bits,
7575 and squish the two 11 bit pieces together. */
7576 if (globals->use_rel)
7577 {
7578 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7579 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7580 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7581 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7582 bfd_vma lower = (lower_insn & 0x07ff);
7583
a00a1f35
MS		 7584 upper |= J1 << 6;
7585 upper |= J2 << 7;
7586 upper |= (!S) << 8;
c19d1205
ZW		 7587 upper -= 0x0100; /* Sign extend. */
7588
7589 addend = (upper << 12) | (lower << 1);
7590 signed_addend = addend;
7591 }
7592
bd97cb95
DJ		 7593 /* Handle calls via the PLT. */
7594 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7595 {
7596 value = (splt->output_section->vma
7597 + splt->output_offset
7598 + h->plt.offset);
7599 /* Target the Thumb stub before the ARM PLT entry. */
7600 value -= PLT_THUMB_STUB_SIZE;
7601 *unresolved_reloc_p = FALSE;
7602 }
7603
c19d1205
ZW		 7604 /* ??? Should handle interworking? GCC might someday try to
7605 use this for tail calls. */
7606
7607 relocation = value + signed_addend;
7608 relocation -= (input_section->output_section->vma
7609 + input_section->output_offset
7610 + rel->r_offset);
a00a1f35 7611 signed_check = (bfd_signed_vma) relocation;
c19d1205 7612
c19d1205
ZW		 7613 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7614 overflow = TRUE;
7615
7616 /* Put RELOCATION back into the insn. */
7617 {
7618 bfd_vma S = (relocation & 0x00100000) >> 20;
7619 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7620 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7621 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7622 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7623
a00a1f35 7624 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7625 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7626 }
7627
7628 /* Put the relocated value back in the object file: */
7629 bfd_put_16 (input_bfd, upper_insn, hit_data);
7630 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7631
7632 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7633 }
7634
7635 case R_ARM_THM_JUMP11:
7636 case R_ARM_THM_JUMP8:
7637 case R_ARM_THM_JUMP6:
51c5503b
NC		 7638 /* Thumb B (branch) instruction). */
7639 {
6cf9e9fe 7640 bfd_signed_vma relocation;
51c5503b
NC		 7641 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7642 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7643 bfd_signed_vma signed_check;
7644
c19d1205
ZW		 7645 /* CZB cannot jump backward. */
7646 if (r_type == R_ARM_THM_JUMP6)
7647 reloc_signed_min = 0;
7648
4e7fd91e 7649 if (globals->use_rel)
6cf9e9fe 7650 {
4e7fd91e
PB		 7651 /* Need to refetch addend. */
7652 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7653 if (addend & ((howto->src_mask + 1) >> 1))
7654 {
7655 signed_addend = -1;
7656 signed_addend &= ~ howto->src_mask;
7657 signed_addend |= addend;
7658 }
7659 else
7660 signed_addend = addend;
7661 /* The value in the insn has been right shifted. We need to
7662 undo this, so that we can perform the address calculation
7663 in terms of bytes. */
7664 signed_addend <<= howto->rightshift;
6cf9e9fe 7665 }
6cf9e9fe 7666 relocation = value + signed_addend;
51c5503b
NC		 7667
7668 relocation -= (input_section->output_section->vma
7669 + input_section->output_offset
7670 + rel->r_offset);
7671
6cf9e9fe
NC		 7672 relocation >>= howto->rightshift;
7673 signed_check = relocation;
c19d1205
ZW		 7674
7675 if (r_type == R_ARM_THM_JUMP6)
7676 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7677 else
7678 relocation &= howto->dst_mask;
51c5503b 7679 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7680
51c5503b
NC		 7681 bfd_put_16 (input_bfd, relocation, hit_data);
7682
7683 /* Assumes two's complement. */
7684 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7685 return bfd_reloc_overflow;
7686
7687 return bfd_reloc_ok;
7688 }
cedb70c5 7689
8375c36b
PB		 7690 case R_ARM_ALU_PCREL7_0:
7691 case R_ARM_ALU_PCREL15_8:
7692 case R_ARM_ALU_PCREL23_15:
7693 {
7694 bfd_vma insn;
7695 bfd_vma relocation;
7696
7697 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7698 if (globals->use_rel)
7699 {
7700 /* Extract the addend. */
7701 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7702 signed_addend = addend;
7703 }
8375c36b
PB		 7704 relocation = value + signed_addend;
7705
7706 relocation -= (input_section->output_section->vma
7707 + input_section->output_offset
7708 + rel->r_offset);
7709 insn = (insn & ~0xfff)
7710 | ((howto->bitpos << 7) & 0xf00)
7711 | ((relocation >> howto->bitpos) & 0xff);
7712 bfd_put_32 (input_bfd, value, hit_data);
7713 }
7714 return bfd_reloc_ok;
7715
252b5132
RH		 7716 case R_ARM_GNU_VTINHERIT:
7717 case R_ARM_GNU_VTENTRY:
7718 return bfd_reloc_ok;
7719
c19d1205 7720 case R_ARM_GOTOFF32:
252b5132
RH		 7721 /* Relocation is relative to the start of the
7722 global offset table. */
7723
7724 BFD_ASSERT (sgot != NULL);
7725 if (sgot == NULL)
7726 return bfd_reloc_notsupported;
9a5aca8c 7727
cedb70c5 7728 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7729 address by one, so that attempts to call the function pointer will
7730 correctly interpret it as Thumb code. */
7731 if (sym_flags == STT_ARM_TFUNC)
7732 value += 1;
7733
252b5132
RH		 7734 /* Note that sgot->output_offset is not involved in this
7735 calculation. We always want the start of .got. If we
7736 define _GLOBAL_OFFSET_TABLE in a different way, as is
7737 permitted by the ABI, we might have to change this
9b485d32 7738 calculation. */
252b5132 7739 value -= sgot->output_section->vma;
f21f3fe0 7740 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7741 contents, rel->r_offset, value,
00a97672 7742 rel->r_addend);
252b5132
RH		 7743
7744 case R_ARM_GOTPC:
a7c10850 7745 /* Use global offset table as symbol value. */
252b5132 7746 BFD_ASSERT (sgot != NULL);
f21f3fe0 7747
252b5132
RH		 7748 if (sgot == NULL)
7749 return bfd_reloc_notsupported;
7750
0945cdfd 7751 *unresolved_reloc_p = FALSE;
252b5132 7752 value = sgot->output_section->vma;
f21f3fe0 7753 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7754 contents, rel->r_offset, value,
00a97672 7755 rel->r_addend);
f21f3fe0 7756
252b5132 7757 case R_ARM_GOT32:
eb043451 7758 case R_ARM_GOT_PREL:
252b5132 7759 /* Relocation is to the entry for this symbol in the
9b485d32 7760 global offset table. */
252b5132
RH		 7761 if (sgot == NULL)
7762 return bfd_reloc_notsupported;
f21f3fe0 7763
252b5132
RH		 7764 if (h != NULL)
7765 {
7766 bfd_vma off;
5e681ec4 7767 bfd_boolean dyn;
f21f3fe0 7768
252b5132
RH		 7769 off = h->got.offset;
7770 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7771 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7772
5e681ec4 7773 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7774 || (info->shared
5e681ec4
PB		 7775 && SYMBOL_REFERENCES_LOCAL (info, h))
7776 || (ELF_ST_VISIBILITY (h->other)
7777 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7778 {
7779 /* This is actually a static link, or it is a -Bsymbolic link
7780 and the symbol is defined locally. We must initialize this
7781 entry in the global offset table. Since the offset must
7782 always be a multiple of 4, we use the least significant bit
7783 to record whether we have initialized it already.
f21f3fe0 7784
00a97672 7785 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7786 entry to initialize the value. This is done in the
9b485d32 7787 finish_dynamic_symbol routine. */
252b5132
RH		 7788 if ((off & 1) != 0)
7789 off &= ~1;
7790 else
7791 {
ee29b9fb
RE		 7792 /* If we are addressing a Thumb function, we need to
7793 adjust the address by one, so that attempts to
7794 call the function pointer will correctly
7795 interpret it as Thumb code. */
7796 if (sym_flags == STT_ARM_TFUNC)
7797 value |= 1;
7798
252b5132
RH		 7799 bfd_put_32 (output_bfd, value, sgot->contents + off);
7800 h->got.offset |= 1;
7801 }
7802 }
0945cdfd
DJ		 7803 else
7804 *unresolved_reloc_p = FALSE;
f21f3fe0 7805
252b5132
RH		 7806 value = sgot->output_offset + off;
7807 }
7808 else
7809 {
7810 bfd_vma off;
f21f3fe0 7811
252b5132
RH		 7812 BFD_ASSERT (local_got_offsets != NULL &&
7813 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7814
252b5132 7815 off = local_got_offsets[r_symndx];
f21f3fe0 7816
252b5132
RH		 7817 /* The offset must always be a multiple of 4. We use the
7818 least significant bit to record whether we have already
9b485d32 7819 generated the necessary reloc. */
252b5132
RH		 7820 if ((off & 1) != 0)
7821 off &= ~1;
7822 else
7823 {
b7693d02
DJ		 7824 /* If we are addressing a Thumb function, we need to
7825 adjust the address by one, so that attempts to
7826 call the function pointer will correctly
7827 interpret it as Thumb code. */
7828 if (sym_flags == STT_ARM_TFUNC)
7829 value |= 1;
7830
00a97672
RS		 7831 if (globals->use_rel)
7832 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7833
252b5132
RH		 7834 if (info->shared)
7835 {
7836 asection * srelgot;
947216bf
AM		 7837 Elf_Internal_Rela outrel;
7838 bfd_byte *loc;
f21f3fe0 7839
00a97672
RS		 7840 srelgot = (bfd_get_section_by_name
7841 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7842 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7843
00a97672 7844 outrel.r_addend = addend + value;
252b5132 7845 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7846 + sgot->output_offset
252b5132
RH		 7847 + off);
7848 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7849 loc = srelgot->contents;
00a97672
RS		 7850 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7851 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7852 }
f21f3fe0 7853
252b5132
RH		 7854 local_got_offsets[r_symndx] |= 1;
7855 }
f21f3fe0 7856
252b5132
RH		 7857 value = sgot->output_offset + off;
7858 }
eb043451
PB		 7859 if (r_type != R_ARM_GOT32)
7860 value += sgot->output_section->vma;
9a5aca8c 7861
f21f3fe0 7862 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7863 contents, rel->r_offset, value,
00a97672 7864 rel->r_addend);
f21f3fe0 7865
ba93b8ac
DJ		 7866 case R_ARM_TLS_LDO32:
7867 value = value - dtpoff_base (info);
7868
7869 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7870 contents, rel->r_offset, value,
7871 rel->r_addend);
ba93b8ac
DJ		 7872
7873 case R_ARM_TLS_LDM32:
7874 {
7875 bfd_vma off;
7876
7877 if (globals->sgot == NULL)
7878 abort ();
7879
7880 off = globals->tls_ldm_got.offset;
7881
7882 if ((off & 1) != 0)
7883 off &= ~1;
7884 else
7885 {
7886 /* If we don't know the module number, create a relocation
7887 for it. */
7888 if (info->shared)
7889 {
7890 Elf_Internal_Rela outrel;
7891 bfd_byte *loc;
7892
7893 if (globals->srelgot == NULL)
7894 abort ();
7895
00a97672 7896 outrel.r_addend = 0;
ba93b8ac
DJ		 7897 outrel.r_offset = (globals->sgot->output_section->vma
7898 + globals->sgot->output_offset + off);
7899 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7900
00a97672
RS		 7901 if (globals->use_rel)
7902 bfd_put_32 (output_bfd, outrel.r_addend,
7903 globals->sgot->contents + off);
ba93b8ac
DJ		 7904
7905 loc = globals->srelgot->contents;
00a97672
RS		 7906 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7907 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7908 }
7909 else
7910 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7911
7912 globals->tls_ldm_got.offset |= 1;
7913 }
7914
906e58ca 7915 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7916 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7917
7918 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7919 contents, rel->r_offset, value,
00a97672 7920 rel->r_addend);
ba93b8ac
DJ		 7921 }
7922
7923 case R_ARM_TLS_GD32:
7924 case R_ARM_TLS_IE32:
7925 {
7926 bfd_vma off;
7927 int indx;
7928 char tls_type;
7929
7930 if (globals->sgot == NULL)
7931 abort ();
7932
7933 indx = 0;
7934 if (h != NULL)
7935 {
7936 bfd_boolean dyn;
7937 dyn = globals->root.dynamic_sections_created;
7938 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7939 && (!info->shared
7940 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7941 {
7942 *unresolved_reloc_p = FALSE;
7943 indx = h->dynindx;
7944 }
7945 off = h->got.offset;
7946 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7947 }
7948 else
7949 {
7950 if (local_got_offsets == NULL)
7951 abort ();
7952 off = local_got_offsets[r_symndx];
7953 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7954 }
7955
7956 if (tls_type == GOT_UNKNOWN)
7957 abort ();
7958
7959 if ((off & 1) != 0)
7960 off &= ~1;
7961 else
7962 {
7963 bfd_boolean need_relocs = FALSE;
7964 Elf_Internal_Rela outrel;
7965 bfd_byte *loc = NULL;
7966 int cur_off = off;
7967
7968 /* The GOT entries have not been initialized yet. Do it
7969 now, and emit any relocations. If both an IE GOT and a
7970 GD GOT are necessary, we emit the GD first. */
7971
7972 if ((info->shared || indx != 0)
7973 && (h == NULL
7974 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7975 || h->root.type != bfd_link_hash_undefweak))
7976 {
7977 need_relocs = TRUE;
7978 if (globals->srelgot == NULL)
7979 abort ();
7980 loc = globals->srelgot->contents;
00a97672 7981 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7982 }
7983
7984 if (tls_type & GOT_TLS_GD)
7985 {
7986 if (need_relocs)
7987 {
00a97672 7988 outrel.r_addend = 0;
ba93b8ac 7989 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7990 + globals->sgot->output_offset
7991 + cur_off);
ba93b8ac 7992 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7993
00a97672
RS		 7994 if (globals->use_rel)
7995 bfd_put_32 (output_bfd, outrel.r_addend,
7996 globals->sgot->contents + cur_off);
7997
7998 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7999 globals->srelgot->reloc_count++;
00a97672 8000 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8001
8002 if (indx == 0)
8003 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8004 globals->sgot->contents + cur_off + 4);
8005 else
8006 {
00a97672 8007 outrel.r_addend = 0;
ba93b8ac
DJ		 8008 outrel.r_info = ELF32_R_INFO (indx,
8009 R_ARM_TLS_DTPOFF32);
8010 outrel.r_offset += 4;
00a97672
RS		 8011
8012 if (globals->use_rel)
8013 bfd_put_32 (output_bfd, outrel.r_addend,
8014 globals->sgot->contents + cur_off + 4);
8015
8016
8017 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8018 globals->srelgot->reloc_count++;
00a97672 8019 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8020 }
8021 }
8022 else
8023 {
8024 /* If we are not emitting relocations for a
8025 general dynamic reference, then we must be in a
8026 static link or an executable link with the
8027 symbol binding locally. Mark it as belonging
8028 to module 1, the executable. */
8029 bfd_put_32 (output_bfd, 1,
8030 globals->sgot->contents + cur_off);
8031 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8032 globals->sgot->contents + cur_off + 4);
8033 }
8034
8035 cur_off += 8;
8036 }
8037
8038 if (tls_type & GOT_TLS_IE)
8039 {
8040 if (need_relocs)
8041 {
00a97672
RS		 8042 if (indx == 0)
8043 outrel.r_addend = value - dtpoff_base (info);
8044 else
8045 outrel.r_addend = 0;
ba93b8ac
DJ		 8046 outrel.r_offset = (globals->sgot->output_section->vma
8047 + globals->sgot->output_offset
8048 + cur_off);
8049 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8050
00a97672
RS		 8051 if (globals->use_rel)
8052 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8053 globals->sgot->contents + cur_off);
8054
00a97672 8055 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8056 globals->srelgot->reloc_count++;
00a97672 8057 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8058 }
8059 else
8060 bfd_put_32 (output_bfd, tpoff (info, value),
8061 globals->sgot->contents + cur_off);
8062 cur_off += 4;
8063 }
8064
8065 if (h != NULL)
8066 h->got.offset |= 1;
8067 else
8068 local_got_offsets[r_symndx] |= 1;
8069 }
8070
8071 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8072 off += 8;
906e58ca 8073 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8074 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8075
8076 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8077 contents, rel->r_offset, value,
00a97672 8078 rel->r_addend);
ba93b8ac
DJ		 8079 }
8080
8081 case R_ARM_TLS_LE32:
8082 if (info->shared)
8083 {
8084 (*_bfd_error_handler)
8085 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8086 input_bfd, input_section,
8087 (long) rel->r_offset, howto->name);
906e58ca 8088 return FALSE;
ba93b8ac
DJ		 8089 }
8090 else
8091 value = tpoff (info, value);
906e58ca 8092
ba93b8ac 8093 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8094 contents, rel->r_offset, value,
8095 rel->r_addend);
ba93b8ac 8096
319850b4
JB		 8097 case R_ARM_V4BX:
8098 if (globals->fix_v4bx)
845b51d6
PB		 8099 {
8100 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8101
845b51d6
PB		 8102 /* Ensure that we have a BX instruction. */
8103 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8104
845b51d6
PB		 8105 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8106 {
8107 /* Branch to veneer. */
8108 bfd_vma glue_addr;
8109 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8110 glue_addr -= input_section->output_section->vma
8111 + input_section->output_offset
8112 + rel->r_offset + 8;
8113 insn = (insn & 0xf0000000) | 0x0a000000
8114 | ((glue_addr >> 2) & 0x00ffffff);
8115 }
8116 else
8117 {
8118 /* Preserve Rm (lowest four bits) and the condition code
8119 (highest four bits). Other bits encode MOV PC,Rm. */
8120 insn = (insn & 0xf000000f) | 0x01a0f000;
8121 }
319850b4 8122
845b51d6
PB		 8123 bfd_put_32 (input_bfd, insn, hit_data);
8124 }
319850b4
JB		 8125 return bfd_reloc_ok;
8126
b6895b4f
PB		 8127 case R_ARM_MOVW_ABS_NC:
8128 case R_ARM_MOVT_ABS:
8129 case R_ARM_MOVW_PREL_NC:
8130 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8131 /* Until we properly support segment-base-relative addressing then
8132 we assume the segment base to be zero, as for the group relocations.
8133 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8134 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8135 case R_ARM_MOVW_BREL_NC:
8136 case R_ARM_MOVW_BREL:
8137 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8138 {
8139 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8140
8141 if (globals->use_rel)
8142 {
8143 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8144 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8145 }
92f5d02b 8146
b6895b4f 8147 value += signed_addend;
b6895b4f
PB		 8148
8149 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8150 value -= (input_section->output_section->vma
8151 + input_section->output_offset + rel->r_offset);
8152
92f5d02b
MS		 8153 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8154 return bfd_reloc_overflow;
8155
8156 if (sym_flags == STT_ARM_TFUNC)
8157 value |= 1;
8158
8159 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8160 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8161 value >>= 16;
8162
8163 insn &= 0xfff0f000;
8164 insn |= value & 0xfff;
8165 insn |= (value & 0xf000) << 4;
8166 bfd_put_32 (input_bfd, insn, hit_data);
8167 }
8168 return bfd_reloc_ok;
8169
8170 case R_ARM_THM_MOVW_ABS_NC:
8171 case R_ARM_THM_MOVT_ABS:
8172 case R_ARM_THM_MOVW_PREL_NC:
8173 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8174 /* Until we properly support segment-base-relative addressing then
8175 we assume the segment base to be zero, as for the above relocations.
8176 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8177 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8178 as R_ARM_THM_MOVT_ABS. */
8179 case R_ARM_THM_MOVW_BREL_NC:
8180 case R_ARM_THM_MOVW_BREL:
8181 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8182 {
8183 bfd_vma insn;
906e58ca 8184
b6895b4f
PB		 8185 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8186 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8187
8188 if (globals->use_rel)
8189 {
8190 addend = ((insn >> 4) & 0xf000)
8191 | ((insn >> 15) & 0x0800)
8192 | ((insn >> 4) & 0x0700)
8193 | (insn & 0x00ff);
39623e12 8194 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8195 }
92f5d02b 8196
b6895b4f 8197 value += signed_addend;
b6895b4f
PB		 8198
8199 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8200 value -= (input_section->output_section->vma
8201 + input_section->output_offset + rel->r_offset);
8202
92f5d02b
MS		 8203 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8204 return bfd_reloc_overflow;
8205
8206 if (sym_flags == STT_ARM_TFUNC)
8207 value |= 1;
8208
8209 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8210 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8211 value >>= 16;
8212
8213 insn &= 0xfbf08f00;
8214 insn |= (value & 0xf000) << 4;
8215 insn |= (value & 0x0800) << 15;
8216 insn |= (value & 0x0700) << 4;
8217 insn |= (value & 0x00ff);
8218
8219 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8220 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8221 }
8222 return bfd_reloc_ok;
8223
4962c51a
MS		 8224 case R_ARM_ALU_PC_G0_NC:
8225 case R_ARM_ALU_PC_G1_NC:
8226 case R_ARM_ALU_PC_G0:
8227 case R_ARM_ALU_PC_G1:
8228 case R_ARM_ALU_PC_G2:
8229 case R_ARM_ALU_SB_G0_NC:
8230 case R_ARM_ALU_SB_G1_NC:
8231 case R_ARM_ALU_SB_G0:
8232 case R_ARM_ALU_SB_G1:
8233 case R_ARM_ALU_SB_G2:
8234 {
8235 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8236 bfd_vma pc = input_section->output_section->vma
8237 + input_section->output_offset + rel->r_offset;
8238 /* sb should be the origin of the *segment* containing the symbol.
8239 It is not clear how to obtain this OS-dependent value, so we
8240 make an arbitrary choice of zero. */
8241 bfd_vma sb = 0;
8242 bfd_vma residual;
8243 bfd_vma g_n;
8244 bfd_signed_vma signed_value;
8245 int group = 0;
8246
8247 /* Determine which group of bits to select. */
8248 switch (r_type)
8249 {
8250 case R_ARM_ALU_PC_G0_NC:
8251 case R_ARM_ALU_PC_G0:
8252 case R_ARM_ALU_SB_G0_NC:
8253 case R_ARM_ALU_SB_G0:
8254 group = 0;
8255 break;
8256
8257 case R_ARM_ALU_PC_G1_NC:
8258 case R_ARM_ALU_PC_G1:
8259 case R_ARM_ALU_SB_G1_NC:
8260 case R_ARM_ALU_SB_G1:
8261 group = 1;
8262 break;
8263
8264 case R_ARM_ALU_PC_G2:
8265 case R_ARM_ALU_SB_G2:
8266 group = 2;
8267 break;
8268
8269 default:
906e58ca 8270 abort ();
4962c51a
MS		 8271 }
8272
8273 /* If REL, extract the addend from the insn. If RELA, it will
8274 have already been fetched for us. */
8275 if (globals->use_rel)
8276 {
8277 int negative;
8278 bfd_vma constant = insn & 0xff;
8279 bfd_vma rotation = (insn & 0xf00) >> 8;
8280
8281 if (rotation == 0)
8282 signed_addend = constant;
8283 else
8284 {
8285 /* Compensate for the fact that in the instruction, the
8286 rotation is stored in multiples of 2 bits. */
8287 rotation *= 2;
8288
8289 /* Rotate "constant" right by "rotation" bits. */
8290 signed_addend = (constant >> rotation) |
8291 (constant << (8 * sizeof (bfd_vma) - rotation));
8292 }
8293
8294 /* Determine if the instruction is an ADD or a SUB.
8295 (For REL, this determines the sign of the addend.) */
8296 negative = identify_add_or_sub (insn);
8297 if (negative == 0)
8298 {
8299 (*_bfd_error_handler)
8300 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8301 input_bfd, input_section,
8302 (long) rel->r_offset, howto->name);
906e58ca 8303 return bfd_reloc_overflow;
4962c51a
MS		 8304 }
8305
8306 signed_addend *= negative;
8307 }
8308
8309 /* Compute the value (X) to go in the place. */
8310 if (r_type == R_ARM_ALU_PC_G0_NC
8311 || r_type == R_ARM_ALU_PC_G1_NC
8312 || r_type == R_ARM_ALU_PC_G0
8313 || r_type == R_ARM_ALU_PC_G1
8314 || r_type == R_ARM_ALU_PC_G2)
8315 /* PC relative. */
8316 signed_value = value - pc + signed_addend;
8317 else
8318 /* Section base relative. */
8319 signed_value = value - sb + signed_addend;
8320
8321 /* If the target symbol is a Thumb function, then set the
8322 Thumb bit in the address. */
8323 if (sym_flags == STT_ARM_TFUNC)
8324 signed_value |= 1;
8325
8326 /* Calculate the value of the relevant G_n, in encoded
8327 constant-with-rotation format. */
8328 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8329 &residual);
8330
8331 /* Check for overflow if required. */
8332 if ((r_type == R_ARM_ALU_PC_G0
8333 || r_type == R_ARM_ALU_PC_G1
8334 || r_type == R_ARM_ALU_PC_G2
8335 || r_type == R_ARM_ALU_SB_G0
8336 || r_type == R_ARM_ALU_SB_G1
8337 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8338 {
8339 (*_bfd_error_handler)
8340 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8341 input_bfd, input_section,
8342 (long) rel->r_offset, abs (signed_value), howto->name);
8343 return bfd_reloc_overflow;
8344 }
8345
8346 /* Mask out the value and the ADD/SUB part of the opcode; take care
8347 not to destroy the S bit. */
8348 insn &= 0xff1ff000;
8349
8350 /* Set the opcode according to whether the value to go in the
8351 place is negative. */
8352 if (signed_value < 0)
8353 insn |= 1 << 22;
8354 else
8355 insn |= 1 << 23;
8356
8357 /* Encode the offset. */
8358 insn |= g_n;
8359
8360 bfd_put_32 (input_bfd, insn, hit_data);
8361 }
8362 return bfd_reloc_ok;
8363
8364 case R_ARM_LDR_PC_G0:
8365 case R_ARM_LDR_PC_G1:
8366 case R_ARM_LDR_PC_G2:
8367 case R_ARM_LDR_SB_G0:
8368 case R_ARM_LDR_SB_G1:
8369 case R_ARM_LDR_SB_G2:
8370 {
8371 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8372 bfd_vma pc = input_section->output_section->vma
8373 + input_section->output_offset + rel->r_offset;
8374 bfd_vma sb = 0; /* See note above. */
8375 bfd_vma residual;
8376 bfd_signed_vma signed_value;
8377 int group = 0;
8378
8379 /* Determine which groups of bits to calculate. */
8380 switch (r_type)
8381 {
8382 case R_ARM_LDR_PC_G0:
8383 case R_ARM_LDR_SB_G0:
8384 group = 0;
8385 break;
8386
8387 case R_ARM_LDR_PC_G1:
8388 case R_ARM_LDR_SB_G1:
8389 group = 1;
8390 break;
8391
8392 case R_ARM_LDR_PC_G2:
8393 case R_ARM_LDR_SB_G2:
8394 group = 2;
8395 break;
8396
8397 default:
906e58ca 8398 abort ();
4962c51a
MS		 8399 }
8400
8401 /* If REL, extract the addend from the insn. If RELA, it will
8402 have already been fetched for us. */
8403 if (globals->use_rel)
8404 {
8405 int negative = (insn & (1 << 23)) ? 1 : -1;
8406 signed_addend = negative * (insn & 0xfff);
8407 }
8408
8409 /* Compute the value (X) to go in the place. */
8410 if (r_type == R_ARM_LDR_PC_G0
8411 || r_type == R_ARM_LDR_PC_G1
8412 || r_type == R_ARM_LDR_PC_G2)
8413 /* PC relative. */
8414 signed_value = value - pc + signed_addend;
8415 else
8416 /* Section base relative. */
8417 signed_value = value - sb + signed_addend;
8418
8419 /* Calculate the value of the relevant G_{n-1} to obtain
8420 the residual at that stage. */
8421 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8422
8423 /* Check for overflow. */
8424 if (residual >= 0x1000)
8425 {
8426 (*_bfd_error_handler)
8427 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8428 input_bfd, input_section,
8429 (long) rel->r_offset, abs (signed_value), howto->name);
8430 return bfd_reloc_overflow;
8431 }
8432
8433 /* Mask out the value and U bit. */
8434 insn &= 0xff7ff000;
8435
8436 /* Set the U bit if the value to go in the place is non-negative. */
8437 if (signed_value >= 0)
8438 insn |= 1 << 23;
8439
8440 /* Encode the offset. */
8441 insn |= residual;
8442
8443 bfd_put_32 (input_bfd, insn, hit_data);
8444 }
8445 return bfd_reloc_ok;
8446
8447 case R_ARM_LDRS_PC_G0:
8448 case R_ARM_LDRS_PC_G1:
8449 case R_ARM_LDRS_PC_G2:
8450 case R_ARM_LDRS_SB_G0:
8451 case R_ARM_LDRS_SB_G1:
8452 case R_ARM_LDRS_SB_G2:
8453 {
8454 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8455 bfd_vma pc = input_section->output_section->vma
8456 + input_section->output_offset + rel->r_offset;
8457 bfd_vma sb = 0; /* See note above. */
8458 bfd_vma residual;
8459 bfd_signed_vma signed_value;
8460 int group = 0;
8461
8462 /* Determine which groups of bits to calculate. */
8463 switch (r_type)
8464 {
8465 case R_ARM_LDRS_PC_G0:
8466 case R_ARM_LDRS_SB_G0:
8467 group = 0;
8468 break;
8469
8470 case R_ARM_LDRS_PC_G1:
8471 case R_ARM_LDRS_SB_G1:
8472 group = 1;
8473 break;
8474
8475 case R_ARM_LDRS_PC_G2:
8476 case R_ARM_LDRS_SB_G2:
8477 group = 2;
8478 break;
8479
8480 default:
906e58ca 8481 abort ();
4962c51a
MS		 8482 }
8483
8484 /* If REL, extract the addend from the insn. If RELA, it will
8485 have already been fetched for us. */
8486 if (globals->use_rel)
8487 {
8488 int negative = (insn & (1 << 23)) ? 1 : -1;
8489 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8490 }
8491
8492 /* Compute the value (X) to go in the place. */
8493 if (r_type == R_ARM_LDRS_PC_G0
8494 || r_type == R_ARM_LDRS_PC_G1
8495 || r_type == R_ARM_LDRS_PC_G2)
8496 /* PC relative. */
8497 signed_value = value - pc + signed_addend;
8498 else
8499 /* Section base relative. */
8500 signed_value = value - sb + signed_addend;
8501
8502 /* Calculate the value of the relevant G_{n-1} to obtain
8503 the residual at that stage. */
8504 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8505
8506 /* Check for overflow. */
8507 if (residual >= 0x100)
8508 {
8509 (*_bfd_error_handler)
8510 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8511 input_bfd, input_section,
8512 (long) rel->r_offset, abs (signed_value), howto->name);
8513 return bfd_reloc_overflow;
8514 }
8515
8516 /* Mask out the value and U bit. */
8517 insn &= 0xff7ff0f0;
8518
8519 /* Set the U bit if the value to go in the place is non-negative. */
8520 if (signed_value >= 0)
8521 insn |= 1 << 23;
8522
8523 /* Encode the offset. */
8524 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8525
8526 bfd_put_32 (input_bfd, insn, hit_data);
8527 }
8528 return bfd_reloc_ok;
8529
8530 case R_ARM_LDC_PC_G0:
8531 case R_ARM_LDC_PC_G1:
8532 case R_ARM_LDC_PC_G2:
8533 case R_ARM_LDC_SB_G0:
8534 case R_ARM_LDC_SB_G1:
8535 case R_ARM_LDC_SB_G2:
8536 {
8537 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8538 bfd_vma pc = input_section->output_section->vma
8539 + input_section->output_offset + rel->r_offset;
8540 bfd_vma sb = 0; /* See note above. */
8541 bfd_vma residual;
8542 bfd_signed_vma signed_value;
8543 int group = 0;
8544
8545 /* Determine which groups of bits to calculate. */
8546 switch (r_type)
8547 {
8548 case R_ARM_LDC_PC_G0:
8549 case R_ARM_LDC_SB_G0:
8550 group = 0;
8551 break;
8552
8553 case R_ARM_LDC_PC_G1:
8554 case R_ARM_LDC_SB_G1:
8555 group = 1;
8556 break;
8557
8558 case R_ARM_LDC_PC_G2:
8559 case R_ARM_LDC_SB_G2:
8560 group = 2;
8561 break;
8562
8563 default:
906e58ca 8564 abort ();
4962c51a
MS		 8565 }
8566
8567 /* If REL, extract the addend from the insn. If RELA, it will
8568 have already been fetched for us. */
8569 if (globals->use_rel)
8570 {
8571 int negative = (insn & (1 << 23)) ? 1 : -1;
8572 signed_addend = negative * ((insn & 0xff) << 2);
8573 }
8574
8575 /* Compute the value (X) to go in the place. */
8576 if (r_type == R_ARM_LDC_PC_G0
8577 || r_type == R_ARM_LDC_PC_G1
8578 || r_type == R_ARM_LDC_PC_G2)
8579 /* PC relative. */
8580 signed_value = value - pc + signed_addend;
8581 else
8582 /* Section base relative. */
8583 signed_value = value - sb + signed_addend;
8584
8585 /* Calculate the value of the relevant G_{n-1} to obtain
8586 the residual at that stage. */
8587 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8588
8589 /* Check for overflow. (The absolute value to go in the place must be
8590 divisible by four and, after having been divided by four, must
8591 fit in eight bits.) */
8592 if ((residual & 0x3) != 0 || residual >= 0x400)
8593 {
8594 (*_bfd_error_handler)
8595 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8596 input_bfd, input_section,
8597 (long) rel->r_offset, abs (signed_value), howto->name);
8598 return bfd_reloc_overflow;
8599 }
8600
8601 /* Mask out the value and U bit. */
8602 insn &= 0xff7fff00;
8603
8604 /* Set the U bit if the value to go in the place is non-negative. */
8605 if (signed_value >= 0)
8606 insn |= 1 << 23;
8607
8608 /* Encode the offset. */
8609 insn |= residual >> 2;
8610
8611 bfd_put_32 (input_bfd, insn, hit_data);
8612 }
8613 return bfd_reloc_ok;
8614
252b5132
RH		 8615 default:
8616 return bfd_reloc_notsupported;
8617 }
8618}
8619
98c1d4aa
NC		 8620/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8621static void
57e8b36a
NC		 8622arm_add_to_rel (bfd * abfd,
8623 bfd_byte * address,
8624 reloc_howto_type * howto,
8625 bfd_signed_vma increment)
98c1d4aa 8626{
98c1d4aa
NC		 8627 bfd_signed_vma addend;
8628
bd97cb95
DJ		 8629 if (howto->type == R_ARM_THM_CALL
8630 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8631 {
9a5aca8c
AM		 8632 int upper_insn, lower_insn;
8633 int upper, lower;
98c1d4aa 8634
9a5aca8c
AM		 8635 upper_insn = bfd_get_16 (abfd, address);
8636 lower_insn = bfd_get_16 (abfd, address + 2);
8637 upper = upper_insn & 0x7ff;
8638 lower = lower_insn & 0x7ff;
8639
8640 addend = (upper << 12) | (lower << 1);
ddda4409 8641 addend += increment;
9a5aca8c 8642 addend >>= 1;
98c1d4aa 8643
9a5aca8c
AM		 8644 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8645 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8646
dc810e39
AM		 8647 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8648 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8649 }
8650 else
8651 {
8652 bfd_vma contents;
8653
8654 contents = bfd_get_32 (abfd, address);
8655
8656 /* Get the (signed) value from the instruction. */
8657 addend = contents & howto->src_mask;
8658 if (addend & ((howto->src_mask + 1) >> 1))
8659 {
8660 bfd_signed_vma mask;
8661
8662 mask = -1;
8663 mask &= ~ howto->src_mask;
8664 addend |= mask;
8665 }
8666
8667 /* Add in the increment, (which is a byte value). */
8668 switch (howto->type)
8669 {
8670 default:
8671 addend += increment;
8672 break;
8673
8674 case R_ARM_PC24:
c6596c5e 8675 case R_ARM_PLT32:
5b5bb741
PB		 8676 case R_ARM_CALL:
8677 case R_ARM_JUMP24:
9a5aca8c 8678 addend <<= howto->size;
dc810e39 8679 addend += increment;
9a5aca8c
AM		 8680
8681 /* Should we check for overflow here ? */
8682
8683 /* Drop any undesired bits. */
8684 addend >>= howto->rightshift;
8685 break;
8686 }
8687
8688 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8689
8690 bfd_put_32 (abfd, contents, address);
ddda4409 8691 }
98c1d4aa 8692}
252b5132 8693
ba93b8ac
DJ		 8694#define IS_ARM_TLS_RELOC(R_TYPE) \
8695 ((R_TYPE) == R_ARM_TLS_GD32 \
8696 || (R_TYPE) == R_ARM_TLS_LDO32 \
8697 || (R_TYPE) == R_ARM_TLS_LDM32 \
8698 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8699 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8700 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8701 || (R_TYPE) == R_ARM_TLS_LE32 \
8702 || (R_TYPE) == R_ARM_TLS_IE32)
8703
252b5132 8704/* Relocate an ARM ELF section. */
906e58ca 8705
b34976b6 8706static bfd_boolean
57e8b36a
NC		 8707elf32_arm_relocate_section (bfd * output_bfd,
8708 struct bfd_link_info * info,
8709 bfd * input_bfd,
8710 asection * input_section,
8711 bfd_byte * contents,
8712 Elf_Internal_Rela * relocs,
8713 Elf_Internal_Sym * local_syms,
8714 asection ** local_sections)
252b5132 8715{
b34976b6
AM		 8716 Elf_Internal_Shdr *symtab_hdr;
8717 struct elf_link_hash_entry **sym_hashes;
8718 Elf_Internal_Rela *rel;
8719 Elf_Internal_Rela *relend;
8720 const char *name;
b32d3aa2 8721 struct elf32_arm_link_hash_table * globals;
252b5132 8722
4e7fd91e 8723 globals = elf32_arm_hash_table (info);
b491616a 8724
0ffa91dd 8725 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8726 sym_hashes = elf_sym_hashes (input_bfd);
8727
8728 rel = relocs;
8729 relend = relocs + input_section->reloc_count;
8730 for (; rel < relend; rel++)
8731 {
ba96a88f
NC		 8732 int r_type;
8733 reloc_howto_type * howto;
8734 unsigned long r_symndx;
8735 Elf_Internal_Sym * sym;
8736 asection * sec;
252b5132 8737 struct elf_link_hash_entry * h;
ba96a88f
NC		 8738 bfd_vma relocation;
8739 bfd_reloc_status_type r;
8740 arelent bfd_reloc;
ba93b8ac 8741 char sym_type;
0945cdfd 8742 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8743 char *error_message = NULL;
f21f3fe0 8744
252b5132 8745 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8746 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8747 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8748
ba96a88f
NC		 8749 if ( r_type == R_ARM_GNU_VTENTRY
8750 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8751 continue;
8752
b32d3aa2 8753 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8754 howto = bfd_reloc.howto;
252b5132 8755
252b5132
RH		 8756 h = NULL;
8757 sym = NULL;
8758 sec = NULL;
9b485d32 8759
252b5132
RH		 8760 if (r_symndx < symtab_hdr->sh_info)
8761 {
8762 sym = local_syms + r_symndx;
ba93b8ac 8763 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8764 sec = local_sections[r_symndx];
ffcb4889
NS		 8765
8766 /* An object file might have a reference to a local
8767 undefined symbol. This is a daft object file, but we
8768 should at least do something about it. V4BX & NONE
8769 relocations do not use the symbol and are explicitly
8770 allowed to use the undefined symbol, so allow those. */
8771 if (r_type != R_ARM_V4BX
8772 && r_type != R_ARM_NONE
8773 && bfd_is_und_section (sec)
8774 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8775 {
8776 if (!info->callbacks->undefined_symbol
8777 (info, bfd_elf_string_from_elf_section
8778 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8779 input_bfd, input_section,
8780 rel->r_offset, TRUE))
8781 return FALSE;
8782 }
8783
4e7fd91e 8784 if (globals->use_rel)
f8df10f4 8785 {
4e7fd91e
PB		 8786 relocation = (sec->output_section->vma
8787 + sec->output_offset
8788 + sym->st_value);
ab96bf03
AM		 8789 if (!info->relocatable
8790 && (sec->flags & SEC_MERGE)
8791 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8792 {
4e7fd91e
PB		 8793 asection *msec;
8794 bfd_vma addend, value;
8795
39623e12 8796 switch (r_type)
4e7fd91e 8797 {
39623e12
PB		 8798 case R_ARM_MOVW_ABS_NC:
8799 case R_ARM_MOVT_ABS:
8800 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8801 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8802 addend = (addend ^ 0x8000) - 0x8000;
8803 break;
f8df10f4 8804
39623e12
PB		 8805 case R_ARM_THM_MOVW_ABS_NC:
8806 case R_ARM_THM_MOVT_ABS:
8807 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8808 << 16;
8809 value |= bfd_get_16 (input_bfd,
8810 contents + rel->r_offset + 2);
8811 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8812 | ((value & 0x04000000) >> 15);
8813 addend = (addend ^ 0x8000) - 0x8000;
8814 break;
f8df10f4 8815
39623e12
PB		 8816 default:
8817 if (howto->rightshift
8818 || (howto->src_mask & (howto->src_mask + 1)))
8819 {
8820 (*_bfd_error_handler)
8821 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8822 input_bfd, input_section,
8823 (long) rel->r_offset, howto->name);
8824 return FALSE;
8825 }
8826
8827 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8828
8829 /* Get the (signed) value from the instruction. */
8830 addend = value & howto->src_mask;
8831 if (addend & ((howto->src_mask + 1) >> 1))
8832 {
8833 bfd_signed_vma mask;
8834
8835 mask = -1;
8836 mask &= ~ howto->src_mask;
8837 addend |= mask;
8838 }
8839 break;
4e7fd91e 8840 }
39623e12 8841
4e7fd91e
PB		 8842 msec = sec;
8843 addend =
8844 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8845 - relocation;
8846 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8847
8848 /* Cases here must match those in the preceeding
8849 switch statement. */
8850 switch (r_type)
8851 {
8852 case R_ARM_MOVW_ABS_NC:
8853 case R_ARM_MOVT_ABS:
8854 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8855 | (addend & 0xfff);
8856 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8857 break;
8858
8859 case R_ARM_THM_MOVW_ABS_NC:
8860 case R_ARM_THM_MOVT_ABS:
8861 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8862 | (addend & 0xff) | ((addend & 0x0800) << 15);
8863 bfd_put_16 (input_bfd, value >> 16,
8864 contents + rel->r_offset);
8865 bfd_put_16 (input_bfd, value,
8866 contents + rel->r_offset + 2);
8867 break;
8868
8869 default:
8870 value = (value & ~ howto->dst_mask)
8871 | (addend & howto->dst_mask);
8872 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8873 break;
8874 }
f8df10f4 8875 }
f8df10f4 8876 }
4e7fd91e
PB		 8877 else
8878 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8879 }
8880 else
8881 {
560e09e9 8882 bfd_boolean warned;
560e09e9 8883
b2a8e766
AM		 8884 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8885 r_symndx, symtab_hdr, sym_hashes,
8886 h, sec, relocation,
8887 unresolved_reloc, warned);
ba93b8ac
DJ		 8888
8889 sym_type = h->type;
252b5132
RH		 8890 }
8891
ab96bf03
AM		 8892 if (sec != NULL && elf_discarded_section (sec))
8893 {
8894 /* For relocs against symbols from removed linkonce sections,
8895 or sections discarded by a linker script, we just want the
8896 section contents zeroed. Avoid any special processing. */
8897 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8898 rel->r_info = 0;
8899 rel->r_addend = 0;
8900 continue;
8901 }
8902
8903 if (info->relocatable)
8904 {
8905 /* This is a relocatable link. We don't have to change
8906 anything, unless the reloc is against a section symbol,
8907 in which case we have to adjust according to where the
8908 section symbol winds up in the output section. */
8909 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8910 {
8911 if (globals->use_rel)
8912 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8913 howto, (bfd_signed_vma) sec->output_offset);
8914 else
8915 rel->r_addend += sec->output_offset;
8916 }
8917 continue;
8918 }
8919
252b5132
RH		 8920 if (h != NULL)
8921 name = h->root.root.string;
8922 else
8923 {
8924 name = (bfd_elf_string_from_elf_section
8925 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8926 if (name == NULL || *name == '\0')
8927 name = bfd_section_name (input_bfd, sec);
8928 }
f21f3fe0 8929
ba93b8ac
DJ		 8930 if (r_symndx != 0
8931 && r_type != R_ARM_NONE
8932 && (h == NULL
8933 || h->root.type == bfd_link_hash_defined
8934 || h->root.type == bfd_link_hash_defweak)
8935 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8936 {
8937 (*_bfd_error_handler)
8938 ((sym_type == STT_TLS
8939 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8940 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8941 input_bfd,
8942 input_section,
8943 (long) rel->r_offset,
8944 howto->name,
8945 name);
8946 }
8947
252b5132
RH		 8948 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8949 input_section, contents, rel,
8950 relocation, info, sec, name,
8951 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8952 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8953 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8954
8955 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8956 because such sections are not SEC_ALLOC and thus ld.so will
8957 not process them. */
8958 if (unresolved_reloc
8959 && !((input_section->flags & SEC_DEBUGGING) != 0
8960 && h->def_dynamic))
8961 {
8962 (*_bfd_error_handler)
843fe662
L		 8963 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8964 input_bfd,
8965 input_section,
8966 (long) rel->r_offset,
8967 howto->name,
8968 h->root.root.string);
0945cdfd
DJ		 8969 return FALSE;
8970 }
252b5132
RH		 8971
8972 if (r != bfd_reloc_ok)
8973 {
252b5132
RH		 8974 switch (r)
8975 {
8976 case bfd_reloc_overflow:
cf919dfd
PB		 8977 /* If the overflowing reloc was to an undefined symbol,
8978 we have already printed one error message and there
8979 is no point complaining again. */
8980 if ((! h ||
8981 h->root.type != bfd_link_hash_undefined)
8982 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8983 (info, (h ? &h->root : NULL), name, howto->name,
8984 (bfd_vma) 0, input_bfd, input_section,
8985 rel->r_offset))))
b34976b6 8986 return FALSE;
252b5132
RH		 8987 break;
8988
8989 case bfd_reloc_undefined:
8990 if (!((*info->callbacks->undefined_symbol)
8991 (info, name, input_bfd, input_section,
b34976b6
AM		 8992 rel->r_offset, TRUE)))
8993 return FALSE;
252b5132
RH		 8994 break;
8995
8996 case bfd_reloc_outofrange:
f2a9dd69 8997 error_message = _("out of range");
252b5132
RH		 8998 goto common_error;
8999
9000 case bfd_reloc_notsupported:
f2a9dd69 9001 error_message = _("unsupported relocation");
252b5132
RH		 9002 goto common_error;
9003
9004 case bfd_reloc_dangerous:
f2a9dd69 9005 /* error_message should already be set. */
252b5132
RH		 9006 goto common_error;
9007
9008 default:
f2a9dd69 9009 error_message = _("unknown error");
8029a119 9010 /* Fall through. */
252b5132
RH		 9011
9012 common_error:
f2a9dd69
DJ		 9013 BFD_ASSERT (error_message != NULL);
9014 if (!((*info->callbacks->reloc_dangerous)
9015 (info, error_message, input_bfd, input_section,
252b5132 9016 rel->r_offset)))
b34976b6 9017 return FALSE;
252b5132
RH		 9018 break;
9019 }
9020 }
9021 }
9022
b34976b6 9023 return TRUE;
252b5132
RH		 9024}
9025
2468f9c9
PB		 9026/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
9027 adds the edit to the start of the list. (The list must be built in order of
9028 ascending INDEX: the function's callers are primarily responsible for
9029 maintaining that condition). */
9030
9031static void
9032add_unwind_table_edit (arm_unwind_table_edit **head,
9033 arm_unwind_table_edit **tail,
9034 arm_unwind_edit_type type,
9035 asection *linked_section,
9036 unsigned int index)
9037{
9038 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
9039
9040 new_edit->type = type;
9041 new_edit->linked_section = linked_section;
9042 new_edit->index = index;
9043
9044 if (index > 0)
9045 {
9046 new_edit->next = NULL;
9047
9048 if (*tail)
9049 (*tail)->next = new_edit;
9050
9051 (*tail) = new_edit;
9052
9053 if (!*head)
9054 (*head) = new_edit;
9055 }
9056 else
9057 {
9058 new_edit->next = *head;
9059
9060 if (!*tail)
9061 *tail = new_edit;
9062
9063 *head = new_edit;
9064 }
9065}
9066
9067static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9068
9069/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9070static void
9071adjust_exidx_size(asection *exidx_sec, int adjust)
9072{
9073 asection *out_sec;
9074
9075 if (!exidx_sec->rawsize)
9076 exidx_sec->rawsize = exidx_sec->size;
9077
9078 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9079 out_sec = exidx_sec->output_section;
9080 /* Adjust size of output section. */
9081 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9082}
9083
9084/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9085static void
9086insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9087{
9088 struct _arm_elf_section_data *exidx_arm_data;
9089
9090 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9091 add_unwind_table_edit (
9092 &exidx_arm_data->u.exidx.unwind_edit_list,
9093 &exidx_arm_data->u.exidx.unwind_edit_tail,
9094 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9095
9096 adjust_exidx_size(exidx_sec, 8);
9097}
9098
9099/* Scan .ARM.exidx tables, and create a list describing edits which should be
9100 made to those tables, such that:
9101
9102 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9103 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9104 codes which have been inlined into the index).
9105
9106 The edits are applied when the tables are written
9107 (in elf32_arm_write_section).
9108*/
9109
9110bfd_boolean
9111elf32_arm_fix_exidx_coverage (asection **text_section_order,
9112 unsigned int num_text_sections,
9113 struct bfd_link_info *info)
9114{
9115 bfd *inp;
9116 unsigned int last_second_word = 0, i;
9117 asection *last_exidx_sec = NULL;
9118 asection *last_text_sec = NULL;
9119 int last_unwind_type = -1;
9120
9121 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9122 text sections. */
9123 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9124 {
9125 asection *sec;
9126
9127 for (sec = inp->sections; sec != NULL; sec = sec->next)
9128 {
9129 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9130 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9131
dec9d5df 9132 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9133 continue;
9134
9135 if (elf_sec->linked_to)
9136 {
9137 Elf_Internal_Shdr *linked_hdr
9138 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9139 struct _arm_elf_section_data *linked_sec_arm_data
9140 = get_arm_elf_section_data (linked_hdr->bfd_section);
9141
9142 if (linked_sec_arm_data == NULL)
9143 continue;
9144
9145 /* Link this .ARM.exidx section back from the text section it
9146 describes. */
9147 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9148 }
9149 }
9150 }
9151
9152 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9153 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9154 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
9155 */
9156
9157 for (i = 0; i < num_text_sections; i++)
9158 {
9159 asection *sec = text_section_order[i];
9160 asection *exidx_sec;
9161 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9162 struct _arm_elf_section_data *exidx_arm_data;
9163 bfd_byte *contents = NULL;
9164 int deleted_exidx_bytes = 0;
9165 bfd_vma j;
9166 arm_unwind_table_edit *unwind_edit_head = NULL;
9167 arm_unwind_table_edit *unwind_edit_tail = NULL;
9168 Elf_Internal_Shdr *hdr;
9169 bfd *ibfd;
9170
9171 if (arm_data == NULL)
9172 continue;
9173
9174 exidx_sec = arm_data->u.text.arm_exidx_sec;
9175 if (exidx_sec == NULL)
9176 {
9177 /* Section has no unwind data. */
9178 if (last_unwind_type == 0 || !last_exidx_sec)
9179 continue;
9180
9181 /* Ignore zero sized sections. */
9182 if (sec->size == 0)
9183 continue;
9184
9185 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9186 last_unwind_type = 0;
9187 continue;
9188 }
9189
22a8f80e
PB		 9190 /* Skip /DISCARD/ sections. */
9191 if (bfd_is_abs_section (exidx_sec->output_section))
9192 continue;
9193
2468f9c9
PB		 9194 hdr = &elf_section_data (exidx_sec)->this_hdr;
9195 if (hdr->sh_type != SHT_ARM_EXIDX)
9196 continue;
9197
9198 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9199 if (exidx_arm_data == NULL)
9200 continue;
9201
9202 ibfd = exidx_sec->owner;
9203
9204 if (hdr->contents != NULL)
9205 contents = hdr->contents;
9206 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9207 /* An error? */
9208 continue;
9209
9210 for (j = 0; j < hdr->sh_size; j += 8)
9211 {
9212 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9213 int unwind_type;
9214 int elide = 0;
9215
9216 /* An EXIDX_CANTUNWIND entry. */
9217 if (second_word == 1)
9218 {
9219 if (last_unwind_type == 0)
9220 elide = 1;
9221 unwind_type = 0;
9222 }
9223 /* Inlined unwinding data. Merge if equal to previous. */
9224 else if ((second_word & 0x80000000) != 0)
9225 {
9226 if (last_second_word == second_word && last_unwind_type == 1)
9227 elide = 1;
9228 unwind_type = 1;
9229 last_second_word = second_word;
9230 }
9231 /* Normal table entry. In theory we could merge these too,
9232 but duplicate entries are likely to be much less common. */
9233 else
9234 unwind_type = 2;
9235
9236 if (elide)
9237 {
9238 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9239 DELETE_EXIDX_ENTRY, NULL, j / 8);
9240
9241 deleted_exidx_bytes += 8;
9242 }
9243
9244 last_unwind_type = unwind_type;
9245 }
9246
9247 /* Free contents if we allocated it ourselves. */
9248 if (contents != hdr->contents)
9249 free (contents);
9250
9251 /* Record edits to be applied later (in elf32_arm_write_section). */
9252 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9253 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9254
9255 if (deleted_exidx_bytes > 0)
9256 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9257
9258 last_exidx_sec = exidx_sec;
9259 last_text_sec = sec;
9260 }
9261
9262 /* Add terminating CANTUNWIND entry. */
9263 if (last_exidx_sec && last_unwind_type != 0)
9264 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9265
9266 return TRUE;
9267}
9268
3e6b1042
DJ		 9269static bfd_boolean
9270elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9271 bfd *ibfd, const char *name)
9272{
9273 asection *sec, *osec;
9274
9275 sec = bfd_get_section_by_name (ibfd, name);
9276 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9277 return TRUE;
9278
9279 osec = sec->output_section;
9280 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9281 return TRUE;
9282
9283 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9284 sec->output_offset, sec->size))
9285 return FALSE;
9286
9287 return TRUE;
9288}
9289
9290static bfd_boolean
9291elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9292{
9293 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9294
9295 /* Invoke the regular ELF backend linker to do all the work. */
9296 if (!bfd_elf_final_link (abfd, info))
9297 return FALSE;
9298
9299 /* Write out any glue sections now that we have created all the
9300 stubs. */
9301 if (globals->bfd_of_glue_owner != NULL)
9302 {
9303 if (! elf32_arm_output_glue_section (info, abfd,
9304 globals->bfd_of_glue_owner,
9305 ARM2THUMB_GLUE_SECTION_NAME))
9306 return FALSE;
9307
9308 if (! elf32_arm_output_glue_section (info, abfd,
9309 globals->bfd_of_glue_owner,
9310 THUMB2ARM_GLUE_SECTION_NAME))
9311 return FALSE;
9312
9313 if (! elf32_arm_output_glue_section (info, abfd,
9314 globals->bfd_of_glue_owner,
9315 VFP11_ERRATUM_VENEER_SECTION_NAME))
9316 return FALSE;
9317
9318 if (! elf32_arm_output_glue_section (info, abfd,
9319 globals->bfd_of_glue_owner,
9320 ARM_BX_GLUE_SECTION_NAME))
9321 return FALSE;
9322 }
9323
9324 return TRUE;
9325}
9326
c178919b
NC		 9327/* Set the right machine number. */
9328
9329static bfd_boolean
57e8b36a 9330elf32_arm_object_p (bfd *abfd)
c178919b 9331{
5a6c6817 9332 unsigned int mach;
57e8b36a 9333
5a6c6817 9334 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9335
5a6c6817
NC		 9336 if (mach != bfd_mach_arm_unknown)
9337 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9338
9339 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9340 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9341
e16bb312 9342 else
5a6c6817 9343 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9344
9345 return TRUE;
9346}
9347
fc830a83 9348/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9349
b34976b6 9350static bfd_boolean
57e8b36a 9351elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9352{
9353 if (elf_flags_init (abfd)
9354 && elf_elfheader (abfd)->e_flags != flags)
9355 {
fc830a83
NC		 9356 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9357 {
fd2ec330 9358 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9359 (*_bfd_error_handler)
9360 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9361 abfd);
fc830a83 9362 else
d003868e
AM		 9363 _bfd_error_handler
9364 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9365 abfd);
fc830a83 9366 }
252b5132
RH		 9367 }
9368 else
9369 {
9370 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9371 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9372 }
9373
b34976b6 9374 return TRUE;
252b5132
RH		 9375}
9376
fc830a83 9377/* Copy backend specific data from one object module to another. */
9b485d32 9378
b34976b6 9379static bfd_boolean
57e8b36a 9380elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9381{
9382 flagword in_flags;
9383 flagword out_flags;
9384
0ffa91dd 9385 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9386 return TRUE;
252b5132 9387
fc830a83 9388 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9389 out_flags = elf_elfheader (obfd)->e_flags;
9390
fc830a83
NC		 9391 if (elf_flags_init (obfd)
9392 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9393 && in_flags != out_flags)
252b5132 9394 {
252b5132 9395 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9396 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9397 return FALSE;
252b5132
RH		 9398
9399 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9400 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9401 return FALSE;
252b5132
RH		 9402
9403 /* If the src and dest have different interworking flags
9404 then turn off the interworking bit. */
fd2ec330 9405 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9406 {
fd2ec330 9407 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9408 _bfd_error_handler
9409 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9410 obfd, ibfd);
252b5132 9411
fd2ec330 9412 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9413 }
1006ba19
PB		 9414
9415 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9416 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9417 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9418 }
9419
9420 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9421 elf_flags_init (obfd) = TRUE;
252b5132 9422
94a3258f
PB		 9423 /* Also copy the EI_OSABI field. */
9424 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9425 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9426
104d59d1
JM		 9427 /* Copy object attributes. */
9428 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9429
9430 return TRUE;
9431}
9432
9433/* Values for Tag_ABI_PCS_R9_use. */
9434enum
9435{
9436 AEABI_R9_V6,
9437 AEABI_R9_SB,
9438 AEABI_R9_TLS,
9439 AEABI_R9_unused
9440};
9441
9442/* Values for Tag_ABI_PCS_RW_data. */
9443enum
9444{
9445 AEABI_PCS_RW_data_absolute,
9446 AEABI_PCS_RW_data_PCrel,
9447 AEABI_PCS_RW_data_SBrel,
9448 AEABI_PCS_RW_data_unused
9449};
9450
9451/* Values for Tag_ABI_enum_size. */
9452enum
9453{
9454 AEABI_enum_unused,
9455 AEABI_enum_short,
9456 AEABI_enum_wide,
9457 AEABI_enum_forced_wide
9458};
9459
104d59d1
JM		 9460/* Determine whether an object attribute tag takes an integer, a
9461 string or both. */
906e58ca 9462
104d59d1
JM		 9463static int
9464elf32_arm_obj_attrs_arg_type (int tag)
9465{
9466 if (tag == Tag_compatibility)
3483fe2e 9467 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9468 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9469 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9470 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9471 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9472 else if (tag < 32)
3483fe2e 9473 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9474 else
3483fe2e 9475 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9476}
9477
5aa6ff7c
AS		 9478/* The ABI defines that Tag_conformance should be emitted first, and that
9479 Tag_nodefaults should be second (if either is defined). This sets those
9480 two positions, and bumps up the position of all the remaining tags to
9481 compensate. */
9482static int
9483elf32_arm_obj_attrs_order (int num)
9484{
9485 if (num == 4)
9486 return Tag_conformance;
9487 if (num == 5)
9488 return Tag_nodefaults;
9489 if ((num - 2) < Tag_nodefaults)
9490 return num - 2;
9491 if ((num - 1) < Tag_conformance)
9492 return num - 1;
9493 return num;
9494}
9495
91e22acd
AS		 9496/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9497 Returns -1 if no architecture could be read. */
9498
9499static int
9500get_secondary_compatible_arch (bfd *abfd)
9501{
9502 obj_attribute *attr =
9503 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9504
9505 /* Note: the tag and its argument below are uleb128 values, though
9506 currently-defined values fit in one byte for each. */
9507 if (attr->s
9508 && attr->s[0] == Tag_CPU_arch
9509 && (attr->s[1] & 128) != 128
9510 && attr->s[2] == 0)
9511 return attr->s[1];
9512
9513 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9514 return -1;
9515}
9516
9517/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9518 The tag is removed if ARCH is -1. */
9519
8e79c3df 9520static void
91e22acd 9521set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9522{
91e22acd
AS		 9523 obj_attribute *attr =
9524 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9525
91e22acd
AS		 9526 if (arch == -1)
9527 {
9528 attr->s = NULL;
9529 return;
8e79c3df 9530 }
91e22acd
AS		 9531
9532 /* Note: the tag and its argument below are uleb128 values, though
9533 currently-defined values fit in one byte for each. */
9534 if (!attr->s)
9535 attr->s = bfd_alloc (abfd, 3);
9536 attr->s[0] = Tag_CPU_arch;
9537 attr->s[1] = arch;
9538 attr->s[2] = '\0';
8e79c3df
CM		 9539}
9540
91e22acd
AS		 9541/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9542 into account. */
9543
9544static int
9545tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9546 int newtag, int secondary_compat)
8e79c3df 9547{
91e22acd
AS		 9548#define T(X) TAG_CPU_ARCH_##X
9549 int tagl, tagh, result;
9550 const int v6t2[] =
9551 {
9552 T(V6T2), /* PRE_V4. */
9553 T(V6T2), /* V4. */
9554 T(V6T2), /* V4T. */
9555 T(V6T2), /* V5T. */
9556 T(V6T2), /* V5TE. */
9557 T(V6T2), /* V5TEJ. */
9558 T(V6T2), /* V6. */
9559 T(V7), /* V6KZ. */
9560 T(V6T2) /* V6T2. */
9561 };
9562 const int v6k[] =
9563 {
9564 T(V6K), /* PRE_V4. */
9565 T(V6K), /* V4. */
9566 T(V6K), /* V4T. */
9567 T(V6K), /* V5T. */
9568 T(V6K), /* V5TE. */
9569 T(V6K), /* V5TEJ. */
9570 T(V6K), /* V6. */
9571 T(V6KZ), /* V6KZ. */
9572 T(V7), /* V6T2. */
9573 T(V6K) /* V6K. */
9574 };
9575 const int v7[] =
9576 {
9577 T(V7), /* PRE_V4. */
9578 T(V7), /* V4. */
9579 T(V7), /* V4T. */
9580 T(V7), /* V5T. */
9581 T(V7), /* V5TE. */
9582 T(V7), /* V5TEJ. */
9583 T(V7), /* V6. */
9584 T(V7), /* V6KZ. */
9585 T(V7), /* V6T2. */
9586 T(V7), /* V6K. */
9587 T(V7) /* V7. */
9588 };
9589 const int v6_m[] =
9590 {
9591 -1, /* PRE_V4. */
9592 -1, /* V4. */
9593 T(V6K), /* V4T. */
9594 T(V6K), /* V5T. */
9595 T(V6K), /* V5TE. */
9596 T(V6K), /* V5TEJ. */
9597 T(V6K), /* V6. */
9598 T(V6KZ), /* V6KZ. */
9599 T(V7), /* V6T2. */
9600 T(V6K), /* V6K. */
9601 T(V7), /* V7. */
9602 T(V6_M) /* V6_M. */
9603 };
9604 const int v6s_m[] =
9605 {
9606 -1, /* PRE_V4. */
9607 -1, /* V4. */
9608 T(V6K), /* V4T. */
9609 T(V6K), /* V5T. */
9610 T(V6K), /* V5TE. */
9611 T(V6K), /* V5TEJ. */
9612 T(V6K), /* V6. */
9613 T(V6KZ), /* V6KZ. */
9614 T(V7), /* V6T2. */
9615 T(V6K), /* V6K. */
9616 T(V7), /* V7. */
9617 T(V6S_M), /* V6_M. */
9618 T(V6S_M) /* V6S_M. */
9619 };
9620 const int v4t_plus_v6_m[] =
9621 {
9622 -1, /* PRE_V4. */
9623 -1, /* V4. */
9624 T(V4T), /* V4T. */
9625 T(V5T), /* V5T. */
9626 T(V5TE), /* V5TE. */
9627 T(V5TEJ), /* V5TEJ. */
9628 T(V6), /* V6. */
9629 T(V6KZ), /* V6KZ. */
9630 T(V6T2), /* V6T2. */
9631 T(V6K), /* V6K. */
9632 T(V7), /* V7. */
9633 T(V6_M), /* V6_M. */
9634 T(V6S_M), /* V6S_M. */
9635 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9636 };
9637 const int *comb[] =
9638 {
9639 v6t2,
9640 v6k,
9641 v7,
9642 v6_m,
9643 v6s_m,
9644 /* Pseudo-architecture. */
9645 v4t_plus_v6_m
9646 };
9647
9648 /* Check we've not got a higher architecture than we know about. */
9649
9650 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9651 {
3895f852 9652 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9653 return -1;
9654 }
9655
9656 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9657
9658 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9659 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9660 oldtag = T(V4T_PLUS_V6_M);
9661
9662 /* And override the new tag if we have a Tag_also_compatible_with on the
9663 input. */
9664
9665 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9666 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9667 newtag = T(V4T_PLUS_V6_M);
9668
9669 tagl = (oldtag < newtag) ? oldtag : newtag;
9670 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9671
9672 /* Architectures before V6KZ add features monotonically. */
9673 if (tagh <= TAG_CPU_ARCH_V6KZ)
9674 return result;
9675
9676 result = comb[tagh - T(V6T2)][tagl];
9677
9678 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9679 as the canonical version. */
9680 if (result == T(V4T_PLUS_V6_M))
9681 {
9682 result = T(V4T);
9683 *secondary_compat_out = T(V6_M);
9684 }
9685 else
9686 *secondary_compat_out = -1;
9687
9688 if (result == -1)
9689 {
3895f852 9690 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9691 ibfd, oldtag, newtag);
9692 return -1;
9693 }
9694
9695 return result;
9696#undef T
8e79c3df
CM		 9697}
9698
ee065d83
PB		 9699/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9700 are conflicting attributes. */
906e58ca 9701
ee065d83
PB		 9702static bfd_boolean
9703elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9704{
104d59d1
JM		 9705 obj_attribute *in_attr;
9706 obj_attribute *out_attr;
9707 obj_attribute_list *in_list;
8e79c3df 9708 obj_attribute_list *out_list;
91e22acd 9709 obj_attribute_list **out_listp;
ee065d83
PB		 9710 /* Some tags have 0 = don't care, 1 = strong requirement,
9711 2 = weak requirement. */
91e22acd 9712 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9713 /* For use with Tag_VFP_arch. */
9714 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9715 int i;
91e22acd 9716 bfd_boolean result = TRUE;
ee065d83 9717
3e6b1042
DJ		 9718 /* Skip the linker stubs file. This preserves previous behavior
9719 of accepting unknown attributes in the first input file - but
9720 is that a bug? */
9721 if (ibfd->flags & BFD_LINKER_CREATED)
9722 return TRUE;
9723
104d59d1 9724 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9725 {
9726 /* This is the first object. Copy the attributes. */
104d59d1 9727 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9728
9729 /* Use the Tag_null value to indicate the attributes have been
9730 initialized. */
104d59d1 9731 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9732
ee065d83
PB		 9733 return TRUE;
9734 }
9735
104d59d1
JM		 9736 in_attr = elf_known_obj_attributes_proc (ibfd);
9737 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9738 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9739 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9740 {
8e79c3df 9741 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9742 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9743 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9744 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9745 {
9746 _bfd_error_handler
3895f852 9747 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9748 ibfd, obfd);
91e22acd 9749 result = FALSE;
ee065d83
PB		 9750 }
9751 }
9752
104d59d1 9753 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9754 {
9755 /* Merge this attribute with existing attributes. */
9756 switch (i)
9757 {
9758 case Tag_CPU_raw_name:
9759 case Tag_CPU_name:
91e22acd 9760 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9761 break;
9762
9763 case Tag_ABI_optimization_goals:
9764 case Tag_ABI_FP_optimization_goals:
9765 /* Use the first value seen. */
9766 break;
9767
9768 case Tag_CPU_arch:
91e22acd
AS		 9769 {
9770 int secondary_compat = -1, secondary_compat_out = -1;
9771 unsigned int saved_out_attr = out_attr[i].i;
9772 static const char *name_table[] = {
9773 /* These aren't real CPU names, but we can't guess
9774 that from the architecture version alone. */
9775 "Pre v4",
9776 "ARM v4",
9777 "ARM v4T",
9778 "ARM v5T",
9779 "ARM v5TE",
9780 "ARM v5TEJ",
9781 "ARM v6",
9782 "ARM v6KZ",
9783 "ARM v6T2",
9784 "ARM v6K",
9785 "ARM v7",
9786 "ARM v6-M",
9787 "ARM v6S-M"
9788 };
9789
9790 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9791 secondary_compat = get_secondary_compatible_arch (ibfd);
9792 secondary_compat_out = get_secondary_compatible_arch (obfd);
9793 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9794 &secondary_compat_out,
9795 in_attr[i].i,
9796 secondary_compat);
9797 set_secondary_compatible_arch (obfd, secondary_compat_out);
9798
9799 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9800 if (out_attr[i].i == saved_out_attr)
9801 ; /* Leave the names alone. */
9802 else if (out_attr[i].i == in_attr[i].i)
9803 {
9804 /* The output architecture has been changed to match the
9805 input architecture. Use the input names. */
9806 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9807 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9808 : NULL;
9809 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9810 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9811 : NULL;
9812 }
9813 else
9814 {
9815 out_attr[Tag_CPU_name].s = NULL;
9816 out_attr[Tag_CPU_raw_name].s = NULL;
9817 }
9818
9819 /* If we still don't have a value for Tag_CPU_name,
9820 make one up now. Tag_CPU_raw_name remains blank. */
9821 if (out_attr[Tag_CPU_name].s == NULL
9822 && out_attr[i].i < ARRAY_SIZE (name_table))
9823 out_attr[Tag_CPU_name].s =
9824 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9825 }
9826 break;
9827
ee065d83
PB		 9828 case Tag_ARM_ISA_use:
9829 case Tag_THUMB_ISA_use:
ee065d83 9830 case Tag_WMMX_arch:
91e22acd
AS		 9831 case Tag_Advanced_SIMD_arch:
9832 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9833 case Tag_ABI_FP_rounding:
ee065d83
PB		 9834 case Tag_ABI_FP_exceptions:
9835 case Tag_ABI_FP_user_exceptions:
9836 case Tag_ABI_FP_number_model:
91e22acd
AS		 9837 case Tag_VFP_HP_extension:
9838 case Tag_CPU_unaligned_access:
9839 case Tag_T2EE_use:
9840 case Tag_Virtualization_use:
9841 case Tag_MPextension_use:
ee065d83
PB		 9842 /* Use the largest value specified. */
9843 if (in_attr[i].i > out_attr[i].i)
9844 out_attr[i].i = in_attr[i].i;
9845 break;
9846
91e22acd
AS		 9847 case Tag_ABI_align8_preserved:
9848 case Tag_ABI_PCS_RO_data:
9849 /* Use the smallest value specified. */
9850 if (in_attr[i].i < out_attr[i].i)
9851 out_attr[i].i = in_attr[i].i;
9852 break;
9853
9854 case Tag_ABI_align8_needed:
9855 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9856 && (in_attr[Tag_ABI_align8_preserved].i == 0
9857 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9858 {
91e22acd
AS		 9859 /* This error message should be enabled once all non-conformant
9860 binaries in the toolchain have had the attributes set
9861 properly.
ee065d83 9862 _bfd_error_handler
3895f852 9863 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9864 obfd, ibfd);
9865 result = FALSE; */
ee065d83 9866 }
91e22acd
AS		 9867 /* Fall through. */
9868 case Tag_ABI_FP_denormal:
9869 case Tag_ABI_PCS_GOT_use:
9870 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9871 value if greater than 2 (for future-proofing). */
9872 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9873 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9874 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9875 out_attr[i].i = in_attr[i].i;
9876 break;
91e22acd
AS		 9877
9878
9879 case Tag_CPU_arch_profile:
9880 if (out_attr[i].i != in_attr[i].i)
9881 {
9882 /* 0 will merge with anything.
9883 'A' and 'S' merge to 'A'.
9884 'R' and 'S' merge to 'R'.
9885 'M' and 'A|R|S' is an error. */
9886 if (out_attr[i].i == 0
9887 || (out_attr[i].i == 'S'
9888 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9889 out_attr[i].i = in_attr[i].i;
9890 else if (in_attr[i].i == 0
9891 || (in_attr[i].i == 'S'
9892 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9893 ; /* Do nothing. */
9894 else
9895 {
9896 _bfd_error_handler
3895f852 9897 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9898 ibfd,
9899 in_attr[i].i ? in_attr[i].i : '0',
9900 out_attr[i].i ? out_attr[i].i : '0');
9901 result = FALSE;
9902 }
9903 }
9904 break;
b1cc4aeb 9905 case Tag_VFP_arch:
91e22acd
AS		 9906 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9907 largest value if greater than 4 (for future-proofing). */
9908 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9909 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9910 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9911 out_attr[i].i = in_attr[i].i;
9912 break;
ee065d83
PB		 9913 case Tag_PCS_config:
9914 if (out_attr[i].i == 0)
9915 out_attr[i].i = in_attr[i].i;
9916 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9917 {
9918 /* It's sometimes ok to mix different configs, so this is only
9919 a warning. */
9920 _bfd_error_handler
9921 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9922 }
9923 break;
9924 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9925 if (in_attr[i].i != out_attr[i].i
9926 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9927 && in_attr[i].i != AEABI_R9_unused)
9928 {
9929 _bfd_error_handler
3895f852 9930 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9931 result = FALSE;
ee065d83
PB		 9932 }
9933 if (out_attr[i].i == AEABI_R9_unused)
9934 out_attr[i].i = in_attr[i].i;
9935 break;
9936 case Tag_ABI_PCS_RW_data:
9937 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9938 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9939 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9940 {
9941 _bfd_error_handler
3895f852 9942 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9943 ibfd);
91e22acd 9944 result = FALSE;
ee065d83
PB		 9945 }
9946 /* Use the smallest value specified. */
9947 if (in_attr[i].i < out_attr[i].i)
9948 out_attr[i].i = in_attr[i].i;
9949 break;
ee065d83 9950 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9951 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9952 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9953 {
9954 _bfd_error_handler
a9dc9481
JM		 9955 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9956 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9957 }
a9dc9481 9958 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9959 out_attr[i].i = in_attr[i].i;
9960 break;
ee065d83
PB		 9961 case Tag_ABI_enum_size:
9962 if (in_attr[i].i != AEABI_enum_unused)
9963 {
9964 if (out_attr[i].i == AEABI_enum_unused
9965 || out_attr[i].i == AEABI_enum_forced_wide)
9966 {
9967 /* The existing object is compatible with anything.
9968 Use whatever requirements the new object has. */
9969 out_attr[i].i = in_attr[i].i;
9970 }
9971 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9972 && out_attr[i].i != in_attr[i].i
0ffa91dd 9973 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9974 {
91e22acd 9975 static const char *aeabi_enum_names[] =
bf21ed78 9976 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9977 const char *in_name =
9978 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9979 ? aeabi_enum_names[in_attr[i].i]
9980 : "<unknown>";
9981 const char *out_name =
9982 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9983 ? aeabi_enum_names[out_attr[i].i]
9984 : "<unknown>";
ee065d83 9985 _bfd_error_handler
bf21ed78 9986 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9987 ibfd, in_name, out_name);
ee065d83
PB		 9988 }
9989 }
9990 break;
9991 case Tag_ABI_VFP_args:
9992 /* Aready done. */
9993 break;
9994 case Tag_ABI_WMMX_args:
9995 if (in_attr[i].i != out_attr[i].i)
9996 {
9997 _bfd_error_handler
3895f852 9998 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9999 ibfd, obfd);
91e22acd 10000 result = FALSE;
ee065d83
PB		 10001 }
10002 break;
7b86a9fa
AS		 10003 case Tag_compatibility:
10004 /* Merged in target-independent code. */
10005 break;
91e22acd
AS		 10006 case Tag_ABI_HardFP_use:
10007 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
10008 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
10009 || (in_attr[i].i == 2 && out_attr[i].i == 1))
10010 out_attr[i].i = 3;
10011 else if (in_attr[i].i > out_attr[i].i)
10012 out_attr[i].i = in_attr[i].i;
10013 break;
10014 case Tag_ABI_FP_16bit_format:
10015 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10016 {
10017 if (in_attr[i].i != out_attr[i].i)
10018 {
10019 _bfd_error_handler
3895f852 10020 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10021 ibfd, obfd);
10022 result = FALSE;
10023 }
10024 }
10025 if (in_attr[i].i != 0)
10026 out_attr[i].i = in_attr[i].i;
10027 break;
7b86a9fa 10028
91e22acd 10029 case Tag_nodefaults:
2d0bb761
AS		 10030 /* This tag is set if it exists, but the value is unused (and is
10031 typically zero). We don't actually need to do anything here -
10032 the merge happens automatically when the type flags are merged
10033 below. */
91e22acd
AS		 10034 break;
10035 case Tag_also_compatible_with:
10036 /* Already done in Tag_CPU_arch. */
10037 break;
10038 case Tag_conformance:
10039 /* Keep the attribute if it matches. Throw it away otherwise.
10040 No attribute means no claim to conform. */
10041 if (!in_attr[i].s || !out_attr[i].s
10042 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10043 out_attr[i].s = NULL;
10044 break;
3cfad14c 10045
91e22acd 10046 default:
3cfad14c 10047 {
91e22acd
AS		 10048 bfd *err_bfd = NULL;
10049
10050 /* The "known_obj_attributes" table does contain some undefined
10051 attributes. Ensure that there are unused. */
10052 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10053 err_bfd = obfd;
10054 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10055 err_bfd = ibfd;
10056
10057 if (err_bfd != NULL)
10058 {
10059 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10060 if ((i & 127) < 64)
10061 {
10062 _bfd_error_handler
10063 (_("%B: Unknown mandatory EABI object attribute %d"),
10064 err_bfd, i);
10065 bfd_set_error (bfd_error_bad_value);
10066 result = FALSE;
10067 }
10068 else
10069 {
10070 _bfd_error_handler
10071 (_("Warning: %B: Unknown EABI object attribute %d"),
10072 err_bfd, i);
10073 }
10074 }
10075
10076 /* Only pass on attributes that match in both inputs. */
10077 if (in_attr[i].i != out_attr[i].i
10078 || in_attr[i].s != out_attr[i].s
10079 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10080 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10081 {
10082 out_attr[i].i = 0;
10083 out_attr[i].s = NULL;
10084 }
3cfad14c 10085 }
91e22acd
AS		 10086 }
10087
10088 /* If out_attr was copied from in_attr then it won't have a type yet. */
10089 if (in_attr[i].type && !out_attr[i].type)
10090 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10091 }
10092
104d59d1
JM		 10093 /* Merge Tag_compatibility attributes and any common GNU ones. */
10094 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 10095
104d59d1
JM		 10096 /* Check for any attributes not known on ARM. */
10097 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10098 out_listp = &elf_other_obj_attributes_proc (obfd);
10099 out_list = *out_listp;
8e79c3df 10100
91e22acd 10101 for (; in_list || out_list; )
ee065d83 10102 {
91e22acd
AS		 10103 bfd *err_bfd = NULL;
10104 int err_tag = 0;
8e79c3df
CM		 10105
10106 /* The tags for each list are in numerical order. */
10107 /* If the tags are equal, then merge. */
91e22acd 10108 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10109 {
91e22acd
AS		 10110 /* This attribute only exists in obfd. We can't merge, and we don't
10111 know what the tag means, so delete it. */
10112 err_bfd = obfd;
10113 err_tag = out_list->tag;
10114 *out_listp = out_list->next;
10115 out_list = *out_listp;
8e79c3df 10116 }
91e22acd 10117 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10118 {
91e22acd
AS		 10119 /* This attribute only exists in ibfd. We can't merge, and we don't
10120 know what the tag means, so ignore it. */
10121 err_bfd = ibfd;
10122 err_tag = in_list->tag;
8e79c3df 10123 in_list = in_list->next;
eb111b1f 10124 }
91e22acd
AS		 10125 else /* The tags are equal. */
10126 {
10127 /* As present, all attributes in the list are unknown, and
10128 therefore can't be merged meaningfully. */
10129 err_bfd = obfd;
10130 err_tag = out_list->tag;
10131
10132 /* Only pass on attributes that match in both inputs. */
10133 if (in_list->attr.i != out_list->attr.i
10134 || in_list->attr.s != out_list->attr.s
10135 || (in_list->attr.s && out_list->attr.s
10136 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10137 {
10138 /* No match. Delete the attribute. */
10139 *out_listp = out_list->next;
10140 out_list = *out_listp;
10141 }
10142 else
10143 {
10144 /* Matched. Keep the attribute and move to the next. */
10145 out_list = out_list->next;
10146 in_list = in_list->next;
10147 }
10148 }
10149
10150 if (err_bfd)
10151 {
10152 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10153 if ((err_tag & 127) < 64)
10154 {
10155 _bfd_error_handler
10156 (_("%B: Unknown mandatory EABI object attribute %d"),
10157 err_bfd, err_tag);
10158 bfd_set_error (bfd_error_bad_value);
10159 result = FALSE;
10160 }
10161 else
10162 {
10163 _bfd_error_handler
10164 (_("Warning: %B: Unknown EABI object attribute %d"),
10165 err_bfd, err_tag);
10166 }
10167 }
ee065d83 10168 }
91e22acd 10169 return result;
252b5132
RH		 10170}
10171
3a4a14e9
PB		 10172
10173/* Return TRUE if the two EABI versions are incompatible. */
10174
10175static bfd_boolean
10176elf32_arm_versions_compatible (unsigned iver, unsigned over)
10177{
10178 /* v4 and v5 are the same spec before and after it was released,
10179 so allow mixing them. */
10180 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10181 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10182 return TRUE;
10183
10184 return (iver == over);
10185}
10186
252b5132
RH		 10187/* Merge backend specific data from an object file to the output
10188 object file when linking. */
9b485d32 10189
b34976b6 10190static bfd_boolean
57e8b36a 10191elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10192{
10193 flagword out_flags;
10194 flagword in_flags;
b34976b6 10195 bfd_boolean flags_compatible = TRUE;
cf919dfd 10196 asection *sec;
252b5132 10197
9b485d32 10198 /* Check if we have the same endianess. */
82e51918 10199 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10200 return FALSE;
1fe494a5 10201
0ffa91dd 10202 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10203 return TRUE;
252b5132 10204
ee065d83
PB		 10205 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10206 return FALSE;
10207
252b5132
RH		 10208 /* The input BFD must have had its flags initialised. */
10209 /* The following seems bogus to me -- The flags are initialized in
10210 the assembler but I don't think an elf_flags_init field is
9b485d32 10211 written into the object. */
252b5132
RH		 10212 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10213
10214 in_flags = elf_elfheader (ibfd)->e_flags;
10215 out_flags = elf_elfheader (obfd)->e_flags;
10216
23684067
PB		 10217 /* In theory there is no reason why we couldn't handle this. However
10218 in practice it isn't even close to working and there is no real
10219 reason to want it. */
10220 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10221 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10222 && (in_flags & EF_ARM_BE8))
10223 {
3895f852 10224 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10225 ibfd);
10226 return FALSE;
10227 }
10228
252b5132
RH		 10229 if (!elf_flags_init (obfd))
10230 {
fe077fa6
NC		 10231 /* If the input is the default architecture and had the default
10232 flags then do not bother setting the flags for the output
10233 architecture, instead allow future merges to do this. If no
10234 future merges ever set these flags then they will retain their
10235 uninitialised values, which surprise surprise, correspond
252b5132 10236 to the default values. */
fe077fa6
NC		 10237 if (bfd_get_arch_info (ibfd)->the_default
10238 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10239 return TRUE;
252b5132 10240
b34976b6 10241 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10242 elf_elfheader (obfd)->e_flags = in_flags;
10243
10244 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10245 && bfd_get_arch_info (obfd)->the_default)
10246 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10247
b34976b6 10248 return TRUE;
252b5132
RH		 10249 }
10250
5a6c6817
NC		 10251 /* Determine what should happen if the input ARM architecture
10252 does not match the output ARM architecture. */
10253 if (! bfd_arm_merge_machines (ibfd, obfd))
10254 return FALSE;
e16bb312 10255
1006ba19 10256 /* Identical flags must be compatible. */
252b5132 10257 if (in_flags == out_flags)
b34976b6 10258 return TRUE;
252b5132 10259
35a0f415
DJ		 10260 /* Check to see if the input BFD actually contains any sections. If
10261 not, its flags may not have been initialised either, but it
8e3de13a 10262 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10263 dynamic objects; their section list may be emptied by
d1f161ea 10264 elf_link_add_object_symbols.
35a0f415 10265
d1f161ea
NC		 10266 Also check to see if there are no code sections in the input.
10267 In this case there is no need to check for code specific flags.
10268 XXX - do we need to worry about floating-point format compatability
10269 in data sections ? */
35a0f415 10270 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10271 {
35a0f415 10272 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10273 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10274
10275 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10276 {
35a0f415
DJ		 10277 /* Ignore synthetic glue sections. */
10278 if (strcmp (sec->name, ".glue_7")
10279 && strcmp (sec->name, ".glue_7t"))
10280 {
d1f161ea
NC		 10281 if ((bfd_get_section_flags (ibfd, sec)
10282 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10283 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10284 only_data_sections = FALSE;
10285
35a0f415
DJ		 10286 null_input_bfd = FALSE;
10287 break;
10288 }
cf919dfd 10289 }
d1f161ea
NC		 10290
10291 if (null_input_bfd || only_data_sections)
35a0f415 10292 return TRUE;
cf919dfd 10293 }
cf919dfd 10294
252b5132 10295 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10296 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10297 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10298 {
d003868e 10299 _bfd_error_handler
3895f852 10300 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10301 ibfd, obfd,
10302 (in_flags & EF_ARM_EABIMASK) >> 24,
10303 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10304 return FALSE;
fc830a83 10305 }
252b5132 10306
1006ba19 10307 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10308 /* VxWorks libraries do not use these flags. */
10309 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10310 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10311 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10312 {
fd2ec330 10313 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10314 {
d003868e 10315 _bfd_error_handler
3895f852 10316 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10317 ibfd, obfd,
10318 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10319 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10320 flags_compatible = FALSE;
1006ba19 10321 }
252b5132 10322
fd2ec330 10323 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10324 {
5eefb65f 10325 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10326 _bfd_error_handler
3895f852 10327 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10328 ibfd, obfd);
5eefb65f 10329 else
d003868e 10330 _bfd_error_handler
3895f852 10331 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10332 ibfd, obfd);
63b0f745 10333
b34976b6 10334 flags_compatible = FALSE;
1006ba19 10335 }
252b5132 10336
96a846ea 10337 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10338 {
96a846ea 10339 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10340 _bfd_error_handler
3895f852 10341 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10342 ibfd, obfd);
5eefb65f 10343 else
d003868e 10344 _bfd_error_handler
3895f852 10345 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10346 ibfd, obfd);
fde78edd
NC		 10347
10348 flags_compatible = FALSE;
10349 }
10350
10351 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10352 {
10353 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10354 _bfd_error_handler
3895f852 10355 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10356 ibfd, obfd);
fde78edd 10357 else
d003868e 10358 _bfd_error_handler
3895f852 10359 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10360 ibfd, obfd);
63b0f745 10361
b34976b6 10362 flags_compatible = FALSE;
1006ba19 10363 }
96a846ea
RE		 10364
10365#ifdef EF_ARM_SOFT_FLOAT
10366 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10367 {
10368 /* We can allow interworking between code that is VFP format
10369 layout, and uses either soft float or integer regs for
10370 passing floating point arguments and results. We already
10371 know that the APCS_FLOAT flags match; similarly for VFP
10372 flags. */
10373 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10374 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10375 {
10376 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10377 _bfd_error_handler
3895f852 10378 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10379 ibfd, obfd);
96a846ea 10380 else
d003868e 10381 _bfd_error_handler
3895f852 10382 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10383 ibfd, obfd);
96a846ea 10384
b34976b6 10385 flags_compatible = FALSE;
96a846ea
RE		 10386 }
10387 }
ee43f35e 10388#endif
252b5132 10389
1006ba19 10390 /* Interworking mismatch is only a warning. */
fd2ec330 10391 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10392 {
e3c8793a
NC		 10393 if (in_flags & EF_ARM_INTERWORK)
10394 {
d003868e
AM		 10395 _bfd_error_handler
10396 (_("Warning: %B supports interworking, whereas %B does not"),
10397 ibfd, obfd);
e3c8793a
NC		 10398 }
10399 else
10400 {
d003868e
AM		 10401 _bfd_error_handler
10402 (_("Warning: %B does not support interworking, whereas %B does"),
10403 ibfd, obfd);
e3c8793a 10404 }
8f615d07 10405 }
252b5132 10406 }
63b0f745 10407
1006ba19 10408 return flags_compatible;
252b5132
RH		 10409}
10410
9b485d32
NC		 10411/* Display the flags field. */
10412
b34976b6 10413static bfd_boolean
57e8b36a 10414elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10415{
fc830a83
NC		 10416 FILE * file = (FILE *) ptr;
10417 unsigned long flags;
252b5132
RH		 10418
10419 BFD_ASSERT (abfd != NULL && ptr != NULL);
10420
10421 /* Print normal ELF private data. */
10422 _bfd_elf_print_private_bfd_data (abfd, ptr);
10423
fc830a83 10424 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10425 /* Ignore init flag - it may not be set, despite the flags field
10426 containing valid data. */
252b5132
RH		 10427
10428 /* xgettext:c-format */
9b485d32 10429 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10430
fc830a83
NC		 10431 switch (EF_ARM_EABI_VERSION (flags))
10432 {
10433 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10434 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10435 official ARM ELF extended ABI. Hence they are only decoded if
10436 the EABI version is not set. */
fd2ec330 10437 if (flags & EF_ARM_INTERWORK)
9b485d32 10438 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10439
fd2ec330 10440 if (flags & EF_ARM_APCS_26)
6c571f00 10441 fprintf (file, " [APCS-26]");
fc830a83 10442 else
6c571f00 10443 fprintf (file, " [APCS-32]");
9a5aca8c 10444
96a846ea
RE		 10445 if (flags & EF_ARM_VFP_FLOAT)
10446 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10447 else if (flags & EF_ARM_MAVERICK_FLOAT)
10448 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10449 else
10450 fprintf (file, _(" [FPA float format]"));
10451
fd2ec330 10452 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10453 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10454
fd2ec330 10455 if (flags & EF_ARM_PIC)
9b485d32 10456 fprintf (file, _(" [position independent]"));
fc830a83 10457
fd2ec330 10458 if (flags & EF_ARM_NEW_ABI)
9b485d32 10459 fprintf (file, _(" [new ABI]"));
9a5aca8c 10460
fd2ec330 10461 if (flags & EF_ARM_OLD_ABI)
9b485d32 10462 fprintf (file, _(" [old ABI]"));
9a5aca8c 10463
fd2ec330 10464 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10465 fprintf (file, _(" [software FP]"));
9a5aca8c 10466
96a846ea
RE		 10467 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10468 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10469 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10470 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10471 break;
9a5aca8c 10472
fc830a83 10473 case EF_ARM_EABI_VER1:
9b485d32 10474 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10475
fc830a83 10476 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10477 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10478 else
9b485d32 10479 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10480
fc830a83
NC		 10481 flags &= ~ EF_ARM_SYMSARESORTED;
10482 break;
9a5aca8c 10483
fd2ec330
PB		 10484 case EF_ARM_EABI_VER2:
10485 fprintf (file, _(" [Version2 EABI]"));
10486
10487 if (flags & EF_ARM_SYMSARESORTED)
10488 fprintf (file, _(" [sorted symbol table]"));
10489 else
10490 fprintf (file, _(" [unsorted symbol table]"));
10491
10492 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10493 fprintf (file, _(" [dynamic symbols use segment index]"));
10494
10495 if (flags & EF_ARM_MAPSYMSFIRST)
10496 fprintf (file, _(" [mapping symbols precede others]"));
10497
99e4ae17 10498 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10499 | EF_ARM_MAPSYMSFIRST);
10500 break;
10501
d507cf36
PB		 10502 case EF_ARM_EABI_VER3:
10503 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10504 break;
10505
10506 case EF_ARM_EABI_VER4:
10507 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10508 goto eabi;
d507cf36 10509
3a4a14e9
PB		 10510 case EF_ARM_EABI_VER5:
10511 fprintf (file, _(" [Version5 EABI]"));
10512 eabi:
d507cf36
PB		 10513 if (flags & EF_ARM_BE8)
10514 fprintf (file, _(" [BE8]"));
10515
10516 if (flags & EF_ARM_LE8)
10517 fprintf (file, _(" [LE8]"));
10518
10519 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10520 break;
10521
fc830a83 10522 default:
9b485d32 10523 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10524 break;
10525 }
252b5132 10526
fc830a83 10527 flags &= ~ EF_ARM_EABIMASK;
252b5132 10528
fc830a83 10529 if (flags & EF_ARM_RELEXEC)
9b485d32 10530 fprintf (file, _(" [relocatable executable]"));
252b5132 10531
fc830a83 10532 if (flags & EF_ARM_HASENTRY)
9b485d32 10533 fprintf (file, _(" [has entry point]"));
252b5132 10534
fc830a83
NC		 10535 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10536
10537 if (flags)
9b485d32 10538 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10539
252b5132
RH		 10540 fputc ('\n', file);
10541
b34976b6 10542 return TRUE;
252b5132
RH		 10543}
10544
10545static int
57e8b36a 10546elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10547{
2f0ca46a
NC		 10548 switch (ELF_ST_TYPE (elf_sym->st_info))
10549 {
10550 case STT_ARM_TFUNC:
10551 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10552
2f0ca46a
NC		 10553 case STT_ARM_16BIT:
10554 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10555 This allows us to distinguish between data used by Thumb instructions
10556 and non-data (which is probably code) inside Thumb regions of an
10557 executable. */
1a0eb693 10558 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10559 return ELF_ST_TYPE (elf_sym->st_info);
10560 break;
9a5aca8c 10561
ce855c42
NC		 10562 default:
10563 break;
2f0ca46a
NC		 10564 }
10565
10566 return type;
252b5132 10567}
f21f3fe0 10568
252b5132 10569static asection *
07adf181
AM		 10570elf32_arm_gc_mark_hook (asection *sec,
10571 struct bfd_link_info *info,
10572 Elf_Internal_Rela *rel,
10573 struct elf_link_hash_entry *h,
10574 Elf_Internal_Sym *sym)
252b5132
RH		 10575{
10576 if (h != NULL)
07adf181 10577 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10578 {
10579 case R_ARM_GNU_VTINHERIT:
10580 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10581 return NULL;
10582 }
9ad5cbcf 10583
07adf181 10584 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10585}
10586
780a67af
NC		 10587/* Update the got entry reference counts for the section being removed. */
10588
b34976b6 10589static bfd_boolean
ba93b8ac
DJ		 10590elf32_arm_gc_sweep_hook (bfd * abfd,
10591 struct bfd_link_info * info,
10592 asection * sec,
10593 const Elf_Internal_Rela * relocs)
252b5132 10594{
5e681ec4
PB		 10595 Elf_Internal_Shdr *symtab_hdr;
10596 struct elf_link_hash_entry **sym_hashes;
10597 bfd_signed_vma *local_got_refcounts;
10598 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10599 struct elf32_arm_link_hash_table * globals;
10600
7dda2462
TG		 10601 if (info->relocatable)
10602 return TRUE;
10603
eb043451 10604 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10605
10606 elf_section_data (sec)->local_dynrel = NULL;
10607
0ffa91dd 10608 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10609 sym_hashes = elf_sym_hashes (abfd);
10610 local_got_refcounts = elf_local_got_refcounts (abfd);
10611
906e58ca 10612 check_use_blx (globals);
bd97cb95 10613
5e681ec4
PB		 10614 relend = relocs + sec->reloc_count;
10615 for (rel = relocs; rel < relend; rel++)
eb043451 10616 {
3eb128b2
AM		 10617 unsigned long r_symndx;
10618 struct elf_link_hash_entry *h = NULL;
eb043451 10619 int r_type;
5e681ec4 10620
3eb128b2
AM		 10621 r_symndx = ELF32_R_SYM (rel->r_info);
10622 if (r_symndx >= symtab_hdr->sh_info)
10623 {
10624 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10625 while (h->root.type == bfd_link_hash_indirect
10626 || h->root.type == bfd_link_hash_warning)
10627 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10628 }
10629
eb043451 10630 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10631 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10632 switch (r_type)
10633 {
10634 case R_ARM_GOT32:
eb043451 10635 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10636 case R_ARM_TLS_GD32:
10637 case R_ARM_TLS_IE32:
3eb128b2 10638 if (h != NULL)
eb043451 10639 {
eb043451
PB		 10640 if (h->got.refcount > 0)
10641 h->got.refcount -= 1;
10642 }
10643 else if (local_got_refcounts != NULL)
10644 {
10645 if (local_got_refcounts[r_symndx] > 0)
10646 local_got_refcounts[r_symndx] -= 1;
10647 }
10648 break;
10649
ba93b8ac
DJ		 10650 case R_ARM_TLS_LDM32:
10651 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10652 break;
10653
eb043451 10654 case R_ARM_ABS32:
bb224fc3 10655 case R_ARM_ABS32_NOI:
eb043451 10656 case R_ARM_REL32:
bb224fc3 10657 case R_ARM_REL32_NOI:
eb043451
PB		 10658 case R_ARM_PC24:
10659 case R_ARM_PLT32:
5b5bb741
PB		 10660 case R_ARM_CALL:
10661 case R_ARM_JUMP24:
eb043451 10662 case R_ARM_PREL31:
c19d1205 10663 case R_ARM_THM_CALL:
bd97cb95
DJ		 10664 case R_ARM_THM_JUMP24:
10665 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10666 case R_ARM_MOVW_ABS_NC:
10667 case R_ARM_MOVT_ABS:
10668 case R_ARM_MOVW_PREL_NC:
10669 case R_ARM_MOVT_PREL:
10670 case R_ARM_THM_MOVW_ABS_NC:
10671 case R_ARM_THM_MOVT_ABS:
10672 case R_ARM_THM_MOVW_PREL_NC:
10673 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10674 /* Should the interworking branches be here also? */
10675
3eb128b2 10676 if (h != NULL)
eb043451
PB		 10677 {
10678 struct elf32_arm_link_hash_entry *eh;
10679 struct elf32_arm_relocs_copied **pp;
10680 struct elf32_arm_relocs_copied *p;
5e681ec4 10681
b7693d02 10682 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10683
eb043451 10684 if (h->plt.refcount > 0)
b7693d02
DJ		 10685 {
10686 h->plt.refcount -= 1;
bd97cb95
DJ		 10687 if (r_type == R_ARM_THM_CALL)
10688 eh->plt_maybe_thumb_refcount--;
10689
10690 if (r_type == R_ARM_THM_JUMP24
10691 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10692 eh->plt_thumb_refcount--;
10693 }
5e681ec4 10694
eb043451 10695 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10696 || r_type == R_ARM_REL32
10697 || r_type == R_ARM_ABS32_NOI
10698 || r_type == R_ARM_REL32_NOI)
eb043451 10699 {
eb043451
PB		 10700 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10701 pp = &p->next)
10702 if (p->section == sec)
10703 {
10704 p->count -= 1;
bb224fc3
MS		 10705 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10706 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10707 p->pc_count -= 1;
eb043451
PB		 10708 if (p->count == 0)
10709 *pp = p->next;
10710 break;
10711 }
10712 }
10713 }
10714 break;
5e681ec4 10715
eb043451
PB		 10716 default:
10717 break;
10718 }
10719 }
5e681ec4 10720
b34976b6 10721 return TRUE;
252b5132
RH		 10722}
10723
780a67af
NC		 10724/* Look through the relocs for a section during the first phase. */
10725
b34976b6 10726static bfd_boolean
57e8b36a
NC		 10727elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10728 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10729{
b34976b6
AM		 10730 Elf_Internal_Shdr *symtab_hdr;
10731 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10732 const Elf_Internal_Rela *rel;
10733 const Elf_Internal_Rela *rel_end;
10734 bfd *dynobj;
5e681ec4 10735 asection *sreloc;
b34976b6 10736 bfd_vma *local_got_offsets;
5e681ec4 10737 struct elf32_arm_link_hash_table *htab;
39623e12 10738 bfd_boolean needs_plt;
ce98a316 10739 unsigned long nsyms;
9a5aca8c 10740
1049f94e 10741 if (info->relocatable)
b34976b6 10742 return TRUE;
9a5aca8c 10743
0ffa91dd
NC		 10744 BFD_ASSERT (is_arm_elf (abfd));
10745
5e681ec4
PB		 10746 htab = elf32_arm_hash_table (info);
10747 sreloc = NULL;
9a5aca8c 10748
67687978
PB		 10749 /* Create dynamic sections for relocatable executables so that we can
10750 copy relocations. */
10751 if (htab->root.is_relocatable_executable
10752 && ! htab->root.dynamic_sections_created)
10753 {
10754 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10755 return FALSE;
10756 }
10757
252b5132
RH		 10758 dynobj = elf_hash_table (info)->dynobj;
10759 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10760
0ffa91dd 10761 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10762 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10763 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10764
252b5132
RH		 10765 rel_end = relocs + sec->reloc_count;
10766 for (rel = relocs; rel < rel_end; rel++)
10767 {
10768 struct elf_link_hash_entry *h;
b7693d02 10769 struct elf32_arm_link_hash_entry *eh;
252b5132 10770 unsigned long r_symndx;
eb043451 10771 int r_type;
9a5aca8c 10772
252b5132 10773 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10774 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10775 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10776
ce98a316
NC		 10777 if (r_symndx >= nsyms
10778 /* PR 9934: It is possible to have relocations that do not
10779 refer to symbols, thus it is also possible to have an
10780 object file containing relocations but no symbol table. */
10781 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10782 {
10783 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10784 r_symndx);
ba93b8ac
DJ		 10785 return FALSE;
10786 }
10787
ce98a316 10788 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10789 h = NULL;
10790 else
973a3492
L		 10791 {
10792 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10793 while (h->root.type == bfd_link_hash_indirect
10794 || h->root.type == bfd_link_hash_warning)
10795 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10796 }
9a5aca8c 10797
b7693d02
DJ		 10798 eh = (struct elf32_arm_link_hash_entry *) h;
10799
eb043451 10800 switch (r_type)
252b5132 10801 {
5e681ec4 10802 case R_ARM_GOT32:
eb043451 10803 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10804 case R_ARM_TLS_GD32:
10805 case R_ARM_TLS_IE32:
5e681ec4 10806 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10807 {
10808 int tls_type, old_tls_type;
5e681ec4 10809
ba93b8ac
DJ		 10810 switch (r_type)
10811 {
10812 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10813 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10814 default: tls_type = GOT_NORMAL; break;
10815 }
252b5132 10816
ba93b8ac
DJ		 10817 if (h != NULL)
10818 {
10819 h->got.refcount++;
10820 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10821 }
10822 else
10823 {
10824 bfd_signed_vma *local_got_refcounts;
10825
10826 /* This is a global offset table entry for a local symbol. */
10827 local_got_refcounts = elf_local_got_refcounts (abfd);
10828 if (local_got_refcounts == NULL)
10829 {
10830 bfd_size_type size;
906e58ca 10831
ba93b8ac 10832 size = symtab_hdr->sh_info;
906e58ca 10833 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10834 local_got_refcounts = bfd_zalloc (abfd, size);
10835 if (local_got_refcounts == NULL)
10836 return FALSE;
10837 elf_local_got_refcounts (abfd) = local_got_refcounts;
10838 elf32_arm_local_got_tls_type (abfd)
10839 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10840 }
10841 local_got_refcounts[r_symndx] += 1;
10842 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10843 }
10844
10845 /* We will already have issued an error message if there is a
10846 TLS / non-TLS mismatch, based on the symbol type. We don't
10847 support any linker relaxations. So just combine any TLS
10848 types needed. */
10849 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10850 && tls_type != GOT_NORMAL)
10851 tls_type |= old_tls_type;
10852
10853 if (old_tls_type != tls_type)
10854 {
10855 if (h != NULL)
10856 elf32_arm_hash_entry (h)->tls_type = tls_type;
10857 else
10858 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10859 }
10860 }
8029a119 10861 /* Fall through. */
ba93b8ac
DJ		 10862
10863 case R_ARM_TLS_LDM32:
10864 if (r_type == R_ARM_TLS_LDM32)
10865 htab->tls_ldm_got.refcount++;
8029a119 10866 /* Fall through. */
252b5132 10867
c19d1205 10868 case R_ARM_GOTOFF32:
5e681ec4
PB		 10869 case R_ARM_GOTPC:
10870 if (htab->sgot == NULL)
10871 {
10872 if (htab->root.dynobj == NULL)
10873 htab->root.dynobj = abfd;
10874 if (!create_got_section (htab->root.dynobj, info))
10875 return FALSE;
10876 }
252b5132
RH		 10877 break;
10878
00a97672
RS		 10879 case R_ARM_ABS12:
10880 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10881 ldr __GOTT_INDEX__ offsets. */
10882 if (!htab->vxworks_p)
10883 break;
8029a119 10884 /* Fall through. */
00a97672 10885
252b5132 10886 case R_ARM_PC24:
7359ea65 10887 case R_ARM_PLT32:
5b5bb741
PB		 10888 case R_ARM_CALL:
10889 case R_ARM_JUMP24:
eb043451 10890 case R_ARM_PREL31:
c19d1205 10891 case R_ARM_THM_CALL:
bd97cb95
DJ		 10892 case R_ARM_THM_JUMP24:
10893 case R_ARM_THM_JUMP19:
39623e12
PB		 10894 needs_plt = 1;
10895 goto normal_reloc;
10896
96c23d59
JM		 10897 case R_ARM_MOVW_ABS_NC:
10898 case R_ARM_MOVT_ABS:
10899 case R_ARM_THM_MOVW_ABS_NC:
10900 case R_ARM_THM_MOVT_ABS:
10901 if (info->shared)
10902 {
10903 (*_bfd_error_handler)
10904 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10905 abfd, elf32_arm_howto_table_1[r_type].name,
10906 (h) ? h->root.root.string : "a local symbol");
10907 bfd_set_error (bfd_error_bad_value);
10908 return FALSE;
10909 }
10910
10911 /* Fall through. */
39623e12
PB		 10912 case R_ARM_ABS32:
10913 case R_ARM_ABS32_NOI:
10914 case R_ARM_REL32:
10915 case R_ARM_REL32_NOI:
b6895b4f
PB		 10916 case R_ARM_MOVW_PREL_NC:
10917 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10918 case R_ARM_THM_MOVW_PREL_NC:
10919 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10920 needs_plt = 0;
10921 normal_reloc:
10922
b7693d02 10923 /* Should the interworking branches be listed here? */
7359ea65 10924 if (h != NULL)
5e681ec4
PB		 10925 {
10926 /* If this reloc is in a read-only section, we might
10927 need a copy reloc. We can't check reliably at this
10928 stage whether the section is read-only, as input
10929 sections have not yet been mapped to output sections.
10930 Tentatively set the flag for now, and correct in
10931 adjust_dynamic_symbol. */
7359ea65 10932 if (!info->shared)
f5385ebf 10933 h->non_got_ref = 1;
7359ea65 10934
5e681ec4 10935 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10936 refers to is in a different object. We can't tell for
10937 sure yet, because something later might force the
10938 symbol local. */
39623e12 10939 if (needs_plt)
f5385ebf 10940 h->needs_plt = 1;
4f199be3
DJ		 10941
10942 /* If we create a PLT entry, this relocation will reference
10943 it, even if it's an ABS32 relocation. */
10944 h->plt.refcount += 1;
b7693d02 10945
bd97cb95
DJ		 10946 /* It's too early to use htab->use_blx here, so we have to
10947 record possible blx references separately from
10948 relocs that definitely need a thumb stub. */
10949
c19d1205 10950 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10951 eh->plt_maybe_thumb_refcount += 1;
10952
10953 if (r_type == R_ARM_THM_JUMP24
10954 || r_type == R_ARM_THM_JUMP19)
b7693d02 10955 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10956 }
10957
67687978
PB		 10958 /* If we are creating a shared library or relocatable executable,
10959 and this is a reloc against a global symbol, or a non PC
10960 relative reloc against a local symbol, then we need to copy
10961 the reloc into the shared library. However, if we are linking
10962 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10963 global symbol which is defined in an object we are
10964 including in the link (i.e., DEF_REGULAR is set). At
10965 this point we have not seen all the input files, so it is
10966 possible that DEF_REGULAR is not set now but will be set
10967 later (it is never cleared). We account for that
10968 possibility below by storing information in the
5e681ec4 10969 relocs_copied field of the hash table entry. */
67687978 10970 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10971 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10972 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10973 || (h != NULL && ! h->needs_plt
10974 && (! info->symbolic || ! h->def_regular))))
252b5132 10975 {
5e681ec4
PB		 10976 struct elf32_arm_relocs_copied *p, **head;
10977
252b5132
RH		 10978 /* When creating a shared object, we must copy these
10979 reloc types into the output file. We create a reloc
10980 section in dynobj and make room for this reloc. */
83bac4b0 10981 if (sreloc == NULL)
252b5132 10982 {
83bac4b0
NC		 10983 sreloc = _bfd_elf_make_dynamic_reloc_section
10984 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10985
83bac4b0 10986 if (sreloc == NULL)
b34976b6 10987 return FALSE;
252b5132 10988
83bac4b0 10989 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10990 if (htab->symbian_p)
252b5132 10991 {
83bac4b0 10992 flagword flags;
5e681ec4 10993
83bac4b0 10994 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10995 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10996 bfd_set_section_flags (dynobj, sreloc, flags);
10997 }
252b5132
RH		 10998 }
10999
5e681ec4
PB		 11000 /* If this is a global symbol, we count the number of
11001 relocations we need for this symbol. */
11002 if (h != NULL)
252b5132 11003 {
5e681ec4
PB		 11004 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11005 }
11006 else
11007 {
11008 /* Track dynamic relocs needed for local syms too.
11009 We really need local syms available to do this
11010 easily. Oh well. */
5e681ec4 11011 asection *s;
6edfbbad 11012 void *vpp;
87d72d41 11013 Elf_Internal_Sym *isym;
6edfbbad 11014
87d72d41
AM		 11015 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11016 abfd, r_symndx);
11017 if (isym == NULL)
5e681ec4 11018 return FALSE;
57e8b36a 11019
87d72d41
AM		 11020 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11021 if (s == NULL)
11022 s = sec;
11023
6edfbbad
DJ		 11024 vpp = &elf_section_data (s)->local_dynrel;
11025 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 11026 }
57e8b36a 11027
5e681ec4
PB		 11028 p = *head;
11029 if (p == NULL || p->section != sec)
11030 {
11031 bfd_size_type amt = sizeof *p;
57e8b36a 11032
5e681ec4 11033 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 11034 if (p == NULL)
5e681ec4
PB		 11035 return FALSE;
11036 p->next = *head;
11037 *head = p;
11038 p->section = sec;
11039 p->count = 0;
ba93b8ac 11040 p->pc_count = 0;
252b5132 11041 }
57e8b36a 11042
bb224fc3 11043 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11044 p->pc_count += 1;
71a976dd 11045 p->count += 1;
252b5132
RH		 11046 }
11047 break;
11048
11049 /* This relocation describes the C++ object vtable hierarchy.
11050 Reconstruct it for later use during GC. */
11051 case R_ARM_GNU_VTINHERIT:
c152c796 11052 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11053 return FALSE;
252b5132 11054 break;
9a5aca8c 11055
252b5132
RH		 11056 /* This relocation describes which C++ vtable entries are actually
11057 used. Record for later use during GC. */
11058 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11059 BFD_ASSERT (h != NULL);
11060 if (h != NULL
11061 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11062 return FALSE;
252b5132
RH		 11063 break;
11064 }
11065 }
f21f3fe0 11066
b34976b6 11067 return TRUE;
252b5132
RH		 11068}
11069
6a5bb875
PB		 11070/* Unwinding tables are not referenced directly. This pass marks them as
11071 required if the corresponding code section is marked. */
11072
11073static bfd_boolean
906e58ca
NC		 11074elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11075 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11076{
11077 bfd *sub;
11078 Elf_Internal_Shdr **elf_shdrp;
11079 bfd_boolean again;
11080
11081 /* Marking EH data may cause additional code sections to be marked,
11082 requiring multiple passes. */
11083 again = TRUE;
11084 while (again)
11085 {
11086 again = FALSE;
11087 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11088 {
11089 asection *o;
11090
0ffa91dd 11091 if (! is_arm_elf (sub))
6a5bb875
PB		 11092 continue;
11093
11094 elf_shdrp = elf_elfsections (sub);
11095 for (o = sub->sections; o != NULL; o = o->next)
11096 {
11097 Elf_Internal_Shdr *hdr;
0ffa91dd 11098
6a5bb875 11099 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11100 if (hdr->sh_type == SHT_ARM_EXIDX
11101 && hdr->sh_link
11102 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11103 && !o->gc_mark
11104 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11105 {
11106 again = TRUE;
11107 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11108 return FALSE;
11109 }
11110 }
11111 }
11112 }
11113
11114 return TRUE;
11115}
11116
3c9458e9
NC		 11117/* Treat mapping symbols as special target symbols. */
11118
11119static bfd_boolean
11120elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11121{
b0796911
PB		 11122 return bfd_is_arm_special_symbol_name (sym->name,
11123 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11124}
11125
0367ecfb
NC		 11126/* This is a copy of elf_find_function() from elf.c except that
11127 ARM mapping symbols are ignored when looking for function names
11128 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11129
0367ecfb
NC		 11130static bfd_boolean
11131arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11132 asection * section,
11133 asymbol ** symbols,
11134 bfd_vma offset,
11135 const char ** filename_ptr,
11136 const char ** functionname_ptr)
11137{
11138 const char * filename = NULL;
11139 asymbol * func = NULL;
11140 bfd_vma low_func = 0;
11141 asymbol ** p;
252b5132
RH		 11142
11143 for (p = symbols; *p != NULL; p++)
11144 {
11145 elf_symbol_type *q;
11146
11147 q = (elf_symbol_type *) *p;
11148
252b5132
RH		 11149 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11150 {
11151 default:
11152 break;
11153 case STT_FILE:
11154 filename = bfd_asymbol_name (&q->symbol);
11155 break;
252b5132
RH		 11156 case STT_FUNC:
11157 case STT_ARM_TFUNC:
9d2da7ca 11158 case STT_NOTYPE:
b0796911 11159 /* Skip mapping symbols. */
0367ecfb 11160 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11161 && bfd_is_arm_special_symbol_name (q->symbol.name,
11162 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11163 continue;
11164 /* Fall through. */
6b40fcba 11165 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11166 && q->symbol.value >= low_func
11167 && q->symbol.value <= offset)
11168 {
11169 func = (asymbol *) q;
11170 low_func = q->symbol.value;
11171 }
11172 break;
11173 }
11174 }
11175
11176 if (func == NULL)
b34976b6 11177 return FALSE;
252b5132 11178
0367ecfb
NC		 11179 if (filename_ptr)
11180 *filename_ptr = filename;
11181 if (functionname_ptr)
11182 *functionname_ptr = bfd_asymbol_name (func);
11183
11184 return TRUE;
906e58ca 11185}
0367ecfb
NC		 11186
11187
11188/* Find the nearest line to a particular section and offset, for error
11189 reporting. This code is a duplicate of the code in elf.c, except
11190 that it uses arm_elf_find_function. */
11191
11192static bfd_boolean
11193elf32_arm_find_nearest_line (bfd * abfd,
11194 asection * section,
11195 asymbol ** symbols,
11196 bfd_vma offset,
11197 const char ** filename_ptr,
11198 const char ** functionname_ptr,
11199 unsigned int * line_ptr)
11200{
11201 bfd_boolean found = FALSE;
11202
11203 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11204
11205 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11206 filename_ptr, functionname_ptr,
11207 line_ptr, 0,
11208 & elf_tdata (abfd)->dwarf2_find_line_info))
11209 {
11210 if (!*functionname_ptr)
11211 arm_elf_find_function (abfd, section, symbols, offset,
11212 *filename_ptr ? NULL : filename_ptr,
11213 functionname_ptr);
f21f3fe0 11214
0367ecfb
NC		 11215 return TRUE;
11216 }
11217
11218 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11219 & found, filename_ptr,
11220 functionname_ptr, line_ptr,
11221 & elf_tdata (abfd)->line_info))
11222 return FALSE;
11223
11224 if (found && (*functionname_ptr || *line_ptr))
11225 return TRUE;
11226
11227 if (symbols == NULL)
11228 return FALSE;
11229
11230 if (! arm_elf_find_function (abfd, section, symbols, offset,
11231 filename_ptr, functionname_ptr))
11232 return FALSE;
11233
11234 *line_ptr = 0;
b34976b6 11235 return TRUE;
252b5132
RH		 11236}
11237
4ab527b0
FF		 11238static bfd_boolean
11239elf32_arm_find_inliner_info (bfd * abfd,
11240 const char ** filename_ptr,
11241 const char ** functionname_ptr,
11242 unsigned int * line_ptr)
11243{
11244 bfd_boolean found;
11245 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11246 functionname_ptr, line_ptr,
11247 & elf_tdata (abfd)->dwarf2_find_line_info);
11248 return found;
11249}
11250
252b5132
RH		 11251/* Adjust a symbol defined by a dynamic object and referenced by a
11252 regular object. The current definition is in some section of the
11253 dynamic object, but we're not including those sections. We have to
11254 change the definition to something the rest of the link can
11255 understand. */
11256
b34976b6 11257static bfd_boolean
57e8b36a
NC		 11258elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11259 struct elf_link_hash_entry * h)
252b5132
RH		 11260{
11261 bfd * dynobj;
11262 asection * s;
b7693d02 11263 struct elf32_arm_link_hash_entry * eh;
67687978 11264 struct elf32_arm_link_hash_table *globals;
252b5132 11265
67687978 11266 globals = elf32_arm_hash_table (info);
252b5132
RH		 11267 dynobj = elf_hash_table (info)->dynobj;
11268
11269 /* Make sure we know what is going on here. */
11270 BFD_ASSERT (dynobj != NULL
f5385ebf 11271 && (h->needs_plt
f6e332e6 11272 || h->u.weakdef != NULL
f5385ebf
AM		 11273 || (h->def_dynamic
11274 && h->ref_regular
11275 && !h->def_regular)));
252b5132 11276
b7693d02
DJ		 11277 eh = (struct elf32_arm_link_hash_entry *) h;
11278
252b5132
RH		 11279 /* If this is a function, put it in the procedure linkage table. We
11280 will fill in the contents of the procedure linkage table later,
11281 when we know the address of the .got section. */
0f88be7a 11282 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11283 || h->needs_plt)
252b5132 11284 {
5e681ec4
PB		 11285 if (h->plt.refcount <= 0
11286 || SYMBOL_CALLS_LOCAL (info, h)
11287 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11288 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11289 {
11290 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11291 file, but the symbol was never referred to by a dynamic
11292 object, or if all references were garbage collected. In
11293 such a case, we don't actually need to build a procedure
11294 linkage table, and we can just do a PC24 reloc instead. */
11295 h->plt.offset = (bfd_vma) -1;
b7693d02 11296 eh->plt_thumb_refcount = 0;
bd97cb95 11297 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11298 h->needs_plt = 0;
252b5132
RH		 11299 }
11300
b34976b6 11301 return TRUE;
252b5132 11302 }
5e681ec4 11303 else
b7693d02
DJ		 11304 {
11305 /* It's possible that we incorrectly decided a .plt reloc was
11306 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11307 in check_relocs. We can't decide accurately between function
11308 and non-function syms in check-relocs; Objects loaded later in
11309 the link may change h->type. So fix it now. */
11310 h->plt.offset = (bfd_vma) -1;
11311 eh->plt_thumb_refcount = 0;
bd97cb95 11312 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11313 }
252b5132
RH		 11314
11315 /* If this is a weak symbol, and there is a real definition, the
11316 processor independent code will have arranged for us to see the
11317 real definition first, and we can just use the same value. */
f6e332e6 11318 if (h->u.weakdef != NULL)
252b5132 11319 {
f6e332e6
AM		 11320 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11321 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11322 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11323 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11324 return TRUE;
252b5132
RH		 11325 }
11326
ba93b8ac
DJ		 11327 /* If there are no non-GOT references, we do not need a copy
11328 relocation. */
11329 if (!h->non_got_ref)
11330 return TRUE;
11331
252b5132
RH		 11332 /* This is a reference to a symbol defined by a dynamic object which
11333 is not a function. */
11334
11335 /* If we are creating a shared library, we must presume that the
11336 only references to the symbol are via the global offset table.
11337 For such cases we need not do anything here; the relocations will
67687978
PB		 11338 be handled correctly by relocate_section. Relocatable executables
11339 can reference data in shared objects directly, so we don't need to
11340 do anything here. */
11341 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11342 return TRUE;
252b5132 11343
909272ee
AM		 11344 if (h->size == 0)
11345 {
11346 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11347 h->root.root.string);
11348 return TRUE;
11349 }
11350
252b5132
RH		 11351 /* We must allocate the symbol in our .dynbss section, which will
11352 become part of the .bss section of the executable. There will be
11353 an entry for this symbol in the .dynsym section. The dynamic
11354 object will contain position independent code, so all references
11355 from the dynamic object to this symbol will go through the global
11356 offset table. The dynamic linker will use the .dynsym entry to
11357 determine the address it must put in the global offset table, so
11358 both the dynamic object and the regular object will refer to the
11359 same memory location for the variable. */
252b5132
RH		 11360 s = bfd_get_section_by_name (dynobj, ".dynbss");
11361 BFD_ASSERT (s != NULL);
11362
11363 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11364 copy the initial value out of the dynamic object and into the
11365 runtime process image. We need to remember the offset into the
00a97672 11366 .rel(a).bss section we are going to use. */
252b5132
RH		 11367 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11368 {
11369 asection *srel;
11370
00a97672 11371 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11372 BFD_ASSERT (srel != NULL);
00a97672 11373 srel->size += RELOC_SIZE (globals);
f5385ebf 11374 h->needs_copy = 1;
252b5132
RH		 11375 }
11376
027297b7 11377 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11378}
11379
5e681ec4
PB		 11380/* Allocate space in .plt, .got and associated reloc sections for
11381 dynamic relocs. */
11382
11383static bfd_boolean
57e8b36a 11384allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11385{
11386 struct bfd_link_info *info;
11387 struct elf32_arm_link_hash_table *htab;
11388 struct elf32_arm_link_hash_entry *eh;
11389 struct elf32_arm_relocs_copied *p;
bd97cb95 11390 bfd_signed_vma thumb_refs;
5e681ec4 11391
b7693d02
DJ		 11392 eh = (struct elf32_arm_link_hash_entry *) h;
11393
5e681ec4
PB		 11394 if (h->root.type == bfd_link_hash_indirect)
11395 return TRUE;
11396
11397 if (h->root.type == bfd_link_hash_warning)
11398 /* When warning symbols are created, they **replace** the "real"
11399 entry in the hash table, thus we never get to see the real
11400 symbol in a hash traversal. So look at it now. */
11401 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11402
11403 info = (struct bfd_link_info *) inf;
11404 htab = elf32_arm_hash_table (info);
11405
11406 if (htab->root.dynamic_sections_created
11407 && h->plt.refcount > 0)
11408 {
11409 /* Make sure this symbol is output as a dynamic symbol.
11410 Undefined weak syms won't yet be marked as dynamic. */
11411 if (h->dynindx == -1
f5385ebf 11412 && !h->forced_local)
5e681ec4 11413 {
c152c796 11414 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11415 return FALSE;
11416 }
11417
11418 if (info->shared
7359ea65 11419 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11420 {
11421 asection *s = htab->splt;
11422
11423 /* If this is the first .plt entry, make room for the special
11424 first entry. */
eea6121a 11425 if (s->size == 0)
e5a52504 11426 s->size += htab->plt_header_size;
5e681ec4 11427
eea6121a 11428 h->plt.offset = s->size;
5e681ec4 11429
b7693d02
DJ		 11430 /* If we will insert a Thumb trampoline before this PLT, leave room
11431 for it. */
bd97cb95
DJ		 11432 thumb_refs = eh->plt_thumb_refcount;
11433 if (!htab->use_blx)
11434 thumb_refs += eh->plt_maybe_thumb_refcount;
11435
11436 if (thumb_refs > 0)
b7693d02
DJ		 11437 {
11438 h->plt.offset += PLT_THUMB_STUB_SIZE;
11439 s->size += PLT_THUMB_STUB_SIZE;
11440 }
11441
5e681ec4
PB		 11442 /* If this symbol is not defined in a regular file, and we are
11443 not generating a shared library, then set the symbol to this
11444 location in the .plt. This is required to make function
11445 pointers compare as equal between the normal executable and
11446 the shared library. */
11447 if (! info->shared
f5385ebf 11448 && !h->def_regular)
5e681ec4
PB		 11449 {
11450 h->root.u.def.section = s;
11451 h->root.u.def.value = h->plt.offset;
11452 }
11453
022f8312
CL		 11454 /* Make sure the function is not marked as Thumb, in case
11455 it is the target of an ABS32 relocation, which will
11456 point to the PLT entry. */
11457 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11458 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11459
5e681ec4 11460 /* Make room for this entry. */
e5a52504 11461 s->size += htab->plt_entry_size;
5e681ec4 11462
e5a52504 11463 if (!htab->symbian_p)
b7693d02
DJ		 11464 {
11465 /* We also need to make an entry in the .got.plt section, which
11466 will be placed in the .got section by the linker script. */
11467 eh->plt_got_offset = htab->sgotplt->size;
11468 htab->sgotplt->size += 4;
11469 }
5e681ec4 11470
00a97672
RS		 11471 /* We also need to make an entry in the .rel(a).plt section. */
11472 htab->srelplt->size += RELOC_SIZE (htab);
11473
11474 /* VxWorks executables have a second set of relocations for
11475 each PLT entry. They go in a separate relocation section,
11476 which is processed by the kernel loader. */
11477 if (htab->vxworks_p && !info->shared)
11478 {
11479 /* There is a relocation for the initial PLT entry:
11480 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11481 if (h->plt.offset == htab->plt_header_size)
11482 htab->srelplt2->size += RELOC_SIZE (htab);
11483
11484 /* There are two extra relocations for each subsequent
11485 PLT entry: an R_ARM_32 relocation for the GOT entry,
11486 and an R_ARM_32 relocation for the PLT entry. */
11487 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11488 }
5e681ec4
PB		 11489 }
11490 else
11491 {
11492 h->plt.offset = (bfd_vma) -1;
f5385ebf 11493 h->needs_plt = 0;
5e681ec4
PB		 11494 }
11495 }
11496 else
11497 {
11498 h->plt.offset = (bfd_vma) -1;
f5385ebf 11499 h->needs_plt = 0;
5e681ec4
PB		 11500 }
11501
11502 if (h->got.refcount > 0)
11503 {
11504 asection *s;
11505 bfd_boolean dyn;
ba93b8ac
DJ		 11506 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11507 int indx;
5e681ec4
PB		 11508
11509 /* Make sure this symbol is output as a dynamic symbol.
11510 Undefined weak syms won't yet be marked as dynamic. */
11511 if (h->dynindx == -1
f5385ebf 11512 && !h->forced_local)
5e681ec4 11513 {
c152c796 11514 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11515 return FALSE;
11516 }
11517
e5a52504
MM		 11518 if (!htab->symbian_p)
11519 {
11520 s = htab->sgot;
11521 h->got.offset = s->size;
ba93b8ac
DJ		 11522
11523 if (tls_type == GOT_UNKNOWN)
11524 abort ();
11525
11526 if (tls_type == GOT_NORMAL)
11527 /* Non-TLS symbols need one GOT slot. */
11528 s->size += 4;
11529 else
11530 {
11531 if (tls_type & GOT_TLS_GD)
11532 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11533 s->size += 8;
11534 if (tls_type & GOT_TLS_IE)
11535 /* R_ARM_TLS_IE32 needs one GOT slot. */
11536 s->size += 4;
11537 }
11538
e5a52504 11539 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11540
11541 indx = 0;
11542 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11543 && (!info->shared
11544 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11545 indx = h->dynindx;
11546
11547 if (tls_type != GOT_NORMAL
11548 && (info->shared || indx != 0)
11549 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11550 || h->root.type != bfd_link_hash_undefweak))
11551 {
11552 if (tls_type & GOT_TLS_IE)
00a97672 11553 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11554
11555 if (tls_type & GOT_TLS_GD)
00a97672 11556 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11557
11558 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11559 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11560 }
11561 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11562 || h->root.type != bfd_link_hash_undefweak)
11563 && (info->shared
11564 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11565 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11566 }
5e681ec4
PB		 11567 }
11568 else
11569 h->got.offset = (bfd_vma) -1;
11570
a4fd1a8e
PB		 11571 /* Allocate stubs for exported Thumb functions on v4t. */
11572 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11573 && h->def_regular
a4fd1a8e
PB		 11574 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11575 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11576 {
11577 struct elf_link_hash_entry * th;
11578 struct bfd_link_hash_entry * bh;
11579 struct elf_link_hash_entry * myh;
11580 char name[1024];
11581 asection *s;
11582 bh = NULL;
11583 /* Create a new symbol to regist the real location of the function. */
11584 s = h->root.u.def.section;
906e58ca 11585 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11586 _bfd_generic_link_add_one_symbol (info, s->owner,
11587 name, BSF_GLOBAL, s,
11588 h->root.u.def.value,
11589 NULL, TRUE, FALSE, &bh);
11590
11591 myh = (struct elf_link_hash_entry *) bh;
11592 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11593 myh->forced_local = 1;
11594 eh->export_glue = myh;
11595 th = record_arm_to_thumb_glue (info, h);
11596 /* Point the symbol at the stub. */
11597 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11598 h->root.u.def.section = th->root.u.def.section;
11599 h->root.u.def.value = th->root.u.def.value & ~1;
11600 }
11601
5e681ec4
PB		 11602 if (eh->relocs_copied == NULL)
11603 return TRUE;
11604
11605 /* In the shared -Bsymbolic case, discard space allocated for
11606 dynamic pc-relative relocs against symbols which turn out to be
11607 defined in regular objects. For the normal shared case, discard
11608 space for pc-relative relocs that have become local due to symbol
11609 visibility changes. */
11610
67687978 11611 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11612 {
7bdca076 11613 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11614 R_ARM_REL32_NOI, which will appear on something like
11615 ".long foo - .". We want calls to protected symbols to resolve
11616 directly to the function rather than going via the plt. If people
11617 want function pointer comparisons to work as expected then they
11618 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11619 if (SYMBOL_CALLS_LOCAL (info, h))
11620 {
11621 struct elf32_arm_relocs_copied **pp;
11622
11623 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11624 {
11625 p->count -= p->pc_count;
11626 p->pc_count = 0;
11627 if (p->count == 0)
11628 *pp = p->next;
11629 else
11630 pp = &p->next;
11631 }
11632 }
11633
3348747a
NS		 11634 if (elf32_arm_hash_table (info)->vxworks_p)
11635 {
11636 struct elf32_arm_relocs_copied **pp;
11637
11638 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11639 {
11640 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11641 *pp = p->next;
11642 else
11643 pp = &p->next;
11644 }
11645 }
11646
ba93b8ac 11647 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11648 visibility. */
22d606e9 11649 if (eh->relocs_copied != NULL
5e681ec4 11650 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11651 {
11652 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11653 eh->relocs_copied = NULL;
11654
11655 /* Make sure undefined weak symbols are output as a dynamic
11656 symbol in PIEs. */
11657 else if (h->dynindx == -1
11658 && !h->forced_local)
11659 {
11660 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11661 return FALSE;
11662 }
11663 }
11664
67687978
PB		 11665 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11666 && h->root.type == bfd_link_hash_new)
11667 {
11668 /* Output absolute symbols so that we can create relocations
11669 against them. For normal symbols we output a relocation
11670 against the section that contains them. */
11671 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11672 return FALSE;
11673 }
11674
5e681ec4
PB		 11675 }
11676 else
11677 {
11678 /* For the non-shared case, discard space for relocs against
11679 symbols which turn out to need copy relocs or are not
11680 dynamic. */
11681
f5385ebf
AM		 11682 if (!h->non_got_ref
11683 && ((h->def_dynamic
11684 && !h->def_regular)
5e681ec4
PB		 11685 || (htab->root.dynamic_sections_created
11686 && (h->root.type == bfd_link_hash_undefweak
11687 || h->root.type == bfd_link_hash_undefined))))
11688 {
11689 /* Make sure this symbol is output as a dynamic symbol.
11690 Undefined weak syms won't yet be marked as dynamic. */
11691 if (h->dynindx == -1
f5385ebf 11692 && !h->forced_local)
5e681ec4 11693 {
c152c796 11694 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11695 return FALSE;
11696 }
11697
11698 /* If that succeeded, we know we'll be keeping all the
11699 relocs. */
11700 if (h->dynindx != -1)
11701 goto keep;
11702 }
11703
11704 eh->relocs_copied = NULL;
11705
11706 keep: ;
11707 }
11708
11709 /* Finally, allocate space. */
11710 for (p = eh->relocs_copied; p != NULL; p = p->next)
11711 {
11712 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11713 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11714 }
11715
11716 return TRUE;
11717}
11718
08d1f311
DJ		 11719/* Find any dynamic relocs that apply to read-only sections. */
11720
11721static bfd_boolean
8029a119 11722elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11723{
8029a119
NC		 11724 struct elf32_arm_link_hash_entry * eh;
11725 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11726
11727 if (h->root.type == bfd_link_hash_warning)
11728 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11729
11730 eh = (struct elf32_arm_link_hash_entry *) h;
11731 for (p = eh->relocs_copied; p != NULL; p = p->next)
11732 {
11733 asection *s = p->section;
11734
11735 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11736 {
11737 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11738
11739 info->flags |= DF_TEXTREL;
11740
11741 /* Not an error, just cut short the traversal. */
11742 return FALSE;
11743 }
11744 }
11745 return TRUE;
11746}
11747
d504ffc8
DJ		 11748void
11749bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11750 int byteswap_code)
11751{
11752 struct elf32_arm_link_hash_table *globals;
11753
11754 globals = elf32_arm_hash_table (info);
11755 globals->byteswap_code = byteswap_code;
11756}
11757
252b5132
RH		 11758/* Set the sizes of the dynamic sections. */
11759
b34976b6 11760static bfd_boolean
57e8b36a
NC		 11761elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11762 struct bfd_link_info * info)
252b5132
RH		 11763{
11764 bfd * dynobj;
11765 asection * s;
b34976b6
AM		 11766 bfd_boolean plt;
11767 bfd_boolean relocs;
5e681ec4
PB		 11768 bfd *ibfd;
11769 struct elf32_arm_link_hash_table *htab;
252b5132 11770
5e681ec4 11771 htab = elf32_arm_hash_table (info);
252b5132
RH		 11772 dynobj = elf_hash_table (info)->dynobj;
11773 BFD_ASSERT (dynobj != NULL);
39b41c9c 11774 check_use_blx (htab);
252b5132
RH		 11775
11776 if (elf_hash_table (info)->dynamic_sections_created)
11777 {
11778 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11779 if (info->executable)
252b5132
RH		 11780 {
11781 s = bfd_get_section_by_name (dynobj, ".interp");
11782 BFD_ASSERT (s != NULL);
eea6121a 11783 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11784 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11785 }
11786 }
5e681ec4
PB		 11787
11788 /* Set up .got offsets for local syms, and space for local dynamic
11789 relocs. */
11790 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11791 {
5e681ec4
PB		 11792 bfd_signed_vma *local_got;
11793 bfd_signed_vma *end_local_got;
11794 char *local_tls_type;
11795 bfd_size_type locsymcount;
11796 Elf_Internal_Shdr *symtab_hdr;
11797 asection *srel;
3348747a 11798 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11799
0ffa91dd 11800 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11801 continue;
11802
11803 for (s = ibfd->sections; s != NULL; s = s->next)
11804 {
11805 struct elf32_arm_relocs_copied *p;
11806
6edfbbad 11807 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11808 {
11809 if (!bfd_is_abs_section (p->section)
11810 && bfd_is_abs_section (p->section->output_section))
11811 {
11812 /* Input section has been discarded, either because
11813 it is a copy of a linkonce section or due to
11814 linker script /DISCARD/, so we'll be discarding
11815 the relocs too. */
11816 }
3348747a
NS		 11817 else if (is_vxworks
11818 && strcmp (p->section->output_section->name,
11819 ".tls_vars") == 0)
11820 {
11821 /* Relocations in vxworks .tls_vars sections are
11822 handled specially by the loader. */
11823 }
5e681ec4
PB		 11824 else if (p->count != 0)
11825 {
11826 srel = elf_section_data (p->section)->sreloc;
00a97672 11827 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11828 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11829 info->flags |= DF_TEXTREL;
11830 }
11831 }
11832 }
11833
11834 local_got = elf_local_got_refcounts (ibfd);
11835 if (!local_got)
11836 continue;
11837
0ffa91dd 11838 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11839 locsymcount = symtab_hdr->sh_info;
11840 end_local_got = local_got + locsymcount;
ba93b8ac 11841 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11842 s = htab->sgot;
11843 srel = htab->srelgot;
11844 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11845 {
11846 if (*local_got > 0)
11847 {
eea6121a 11848 *local_got = s->size;
ba93b8ac
DJ		 11849 if (*local_tls_type & GOT_TLS_GD)
11850 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11851 s->size += 8;
11852 if (*local_tls_type & GOT_TLS_IE)
11853 s->size += 4;
11854 if (*local_tls_type == GOT_NORMAL)
11855 s->size += 4;
11856
11857 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11858 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11859 }
11860 else
11861 *local_got = (bfd_vma) -1;
11862 }
252b5132
RH		 11863 }
11864
ba93b8ac
DJ		 11865 if (htab->tls_ldm_got.refcount > 0)
11866 {
11867 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11868 for R_ARM_TLS_LDM32 relocations. */
11869 htab->tls_ldm_got.offset = htab->sgot->size;
11870 htab->sgot->size += 8;
11871 if (info->shared)
00a97672 11872 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11873 }
11874 else
11875 htab->tls_ldm_got.offset = -1;
11876
5e681ec4
PB		 11877 /* Allocate global sym .plt and .got entries, and space for global
11878 sym dynamic relocs. */
57e8b36a 11879 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11880
d504ffc8
DJ		 11881 /* Here we rummage through the found bfds to collect glue information. */
11882 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11883 {
0ffa91dd 11884 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11885 continue;
11886
c7b8f16e
JB		 11887 /* Initialise mapping tables for code/data. */
11888 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11889
c7b8f16e
JB		 11890 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11891 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11892 /* xgettext:c-format */
11893 _bfd_error_handler (_("Errors encountered processing file %s"),
11894 ibfd->filename);
11895 }
d504ffc8 11896
3e6b1042
DJ		 11897 /* Allocate space for the glue sections now that we've sized them. */
11898 bfd_elf32_arm_allocate_interworking_sections (info);
11899
252b5132
RH		 11900 /* The check_relocs and adjust_dynamic_symbol entry points have
11901 determined the sizes of the various dynamic sections. Allocate
11902 memory for them. */
b34976b6
AM		 11903 plt = FALSE;
11904 relocs = FALSE;
252b5132
RH		 11905 for (s = dynobj->sections; s != NULL; s = s->next)
11906 {
11907 const char * name;
252b5132
RH		 11908
11909 if ((s->flags & SEC_LINKER_CREATED) == 0)
11910 continue;
11911
11912 /* It's OK to base decisions on the section name, because none
11913 of the dynobj section names depend upon the input files. */
11914 name = bfd_get_section_name (dynobj, s);
11915
24a1ba0f 11916 if (strcmp (name, ".plt") == 0)
252b5132 11917 {
c456f082
AM		 11918 /* Remember whether there is a PLT. */
11919 plt = s->size != 0;
252b5132 11920 }
0112cd26 11921 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11922 {
c456f082 11923 if (s->size != 0)
252b5132 11924 {
252b5132 11925 /* Remember whether there are any reloc sections other
00a97672
RS		 11926 than .rel(a).plt and .rela.plt.unloaded. */
11927 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11928 relocs = TRUE;
252b5132
RH		 11929
11930 /* We use the reloc_count field as a counter if we need
11931 to copy relocs into the output file. */
11932 s->reloc_count = 0;
11933 }
11934 }
0112cd26 11935 else if (! CONST_STRNEQ (name, ".got")
c456f082 11936 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11937 {
11938 /* It's not one of our sections, so don't allocate space. */
11939 continue;
11940 }
11941
c456f082 11942 if (s->size == 0)
252b5132 11943 {
c456f082 11944 /* If we don't need this section, strip it from the
00a97672
RS		 11945 output file. This is mostly to handle .rel(a).bss and
11946 .rel(a).plt. We must create both sections in
c456f082
AM		 11947 create_dynamic_sections, because they must be created
11948 before the linker maps input sections to output
11949 sections. The linker does that before
11950 adjust_dynamic_symbol is called, and it is that
11951 function which decides whether anything needs to go
11952 into these sections. */
8423293d 11953 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11954 continue;
11955 }
11956
c456f082
AM		 11957 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11958 continue;
11959
252b5132 11960 /* Allocate memory for the section contents. */
906e58ca 11961 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11962 if (s->contents == NULL)
b34976b6 11963 return FALSE;
252b5132
RH		 11964 }
11965
11966 if (elf_hash_table (info)->dynamic_sections_created)
11967 {
11968 /* Add some entries to the .dynamic section. We fill in the
11969 values later, in elf32_arm_finish_dynamic_sections, but we
11970 must add the entries now so that we get the correct size for
11971 the .dynamic section. The DT_DEBUG entry is filled in by the
11972 dynamic linker and used by the debugger. */
dc810e39 11973#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11974 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11975
8532796c 11976 if (info->executable)
252b5132 11977 {
dc810e39 11978 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11979 return FALSE;
252b5132
RH		 11980 }
11981
11982 if (plt)
11983 {
dc810e39
AM		 11984 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11985 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11986 || !add_dynamic_entry (DT_PLTREL,
11987 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11988 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11989 return FALSE;
252b5132
RH		 11990 }
11991
11992 if (relocs)
11993 {
00a97672
RS		 11994 if (htab->use_rel)
11995 {
11996 if (!add_dynamic_entry (DT_REL, 0)
11997 || !add_dynamic_entry (DT_RELSZ, 0)
11998 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11999 return FALSE;
12000 }
12001 else
12002 {
12003 if (!add_dynamic_entry (DT_RELA, 0)
12004 || !add_dynamic_entry (DT_RELASZ, 0)
12005 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12006 return FALSE;
12007 }
252b5132
RH		 12008 }
12009
08d1f311
DJ		 12010 /* If any dynamic relocs apply to a read-only section,
12011 then we need a DT_TEXTREL entry. */
12012 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12013 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12014 info);
08d1f311 12015
99e4ae17 12016 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12017 {
dc810e39 12018 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12019 return FALSE;
252b5132 12020 }
7a2b07ff
NS		 12021 if (htab->vxworks_p
12022 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12023 return FALSE;
252b5132 12024 }
8532796c 12025#undef add_dynamic_entry
252b5132 12026
b34976b6 12027 return TRUE;
252b5132
RH		 12028}
12029
252b5132
RH		 12030/* Finish up dynamic symbol handling. We set the contents of various
12031 dynamic sections here. */
12032
b34976b6 12033static bfd_boolean
906e58ca
NC		 12034elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12035 struct bfd_link_info * info,
12036 struct elf_link_hash_entry * h,
12037 Elf_Internal_Sym * sym)
252b5132
RH		 12038{
12039 bfd * dynobj;
e5a52504 12040 struct elf32_arm_link_hash_table *htab;
b7693d02 12041 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12042
12043 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12044 htab = elf32_arm_hash_table (info);
b7693d02 12045 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12046
12047 if (h->plt.offset != (bfd_vma) -1)
12048 {
12049 asection * splt;
252b5132 12050 asection * srel;
e5a52504 12051 bfd_byte *loc;
24a1ba0f 12052 bfd_vma plt_index;
947216bf 12053 Elf_Internal_Rela rel;
252b5132
RH		 12054
12055 /* This symbol has an entry in the procedure linkage table. Set
12056 it up. */
12057
12058 BFD_ASSERT (h->dynindx != -1);
12059
12060 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12061 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12062 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12063
e5a52504
MM		 12064 /* Fill in the entry in the procedure linkage table. */
12065 if (htab->symbian_p)
12066 {
906e58ca 12067 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12068 elf32_arm_symbian_plt_entry[0],
12069 splt->contents + h->plt.offset);
906e58ca 12070 bfd_put_32 (output_bfd,
52ab56c2
PB		 12071 elf32_arm_symbian_plt_entry[1],
12072 splt->contents + h->plt.offset + 4);
906e58ca 12073
e5a52504 12074 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12075 rel.r_offset = (splt->output_section->vma
12076 + splt->output_offset
52ab56c2 12077 + h->plt.offset + 4);
e5a52504 12078 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12079
12080 /* Get the index in the procedure linkage table which
12081 corresponds to this symbol. This is the index of this symbol
12082 in all the symbols for which we are making plt entries. The
12083 first entry in the procedure linkage table is reserved. */
906e58ca 12084 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12085 / htab->plt_entry_size);
e5a52504
MM		 12086 }
12087 else
12088 {
00a97672 12089 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12090 bfd_vma got_displacement;
12091 asection * sgot;
52ab56c2 12092 bfd_byte * ptr;
906e58ca 12093
e5a52504
MM		 12094 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12095 BFD_ASSERT (sgot != NULL);
12096
b7693d02
DJ		 12097 /* Get the offset into the .got.plt table of the entry that
12098 corresponds to this function. */
12099 got_offset = eh->plt_got_offset;
12100
12101 /* Get the index in the procedure linkage table which
12102 corresponds to this symbol. This is the index of this symbol
12103 in all the symbols for which we are making plt entries. The
12104 first three entries in .got.plt are reserved; after that
12105 symbols appear in the same order as in .plt. */
12106 plt_index = (got_offset - 12) / 4;
e5a52504 12107
00a97672
RS		 12108 /* Calculate the address of the GOT entry. */
12109 got_address = (sgot->output_section->vma
12110 + sgot->output_offset
12111 + got_offset);
5e681ec4 12112
00a97672
RS		 12113 /* ...and the address of the PLT entry. */
12114 plt_address = (splt->output_section->vma
12115 + splt->output_offset
12116 + h->plt.offset);
5e681ec4 12117
52ab56c2 12118 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12119 if (htab->vxworks_p && info->shared)
12120 {
12121 unsigned int i;
12122 bfd_vma val;
12123
52ab56c2 12124 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12125 {
12126 val = elf32_arm_vxworks_shared_plt_entry[i];
12127 if (i == 2)
12128 val |= got_address - sgot->output_section->vma;
12129 if (i == 5)
12130 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12131 if (i == 2 || i == 5)
12132 bfd_put_32 (output_bfd, val, ptr);
12133 else
12134 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12135 }
12136 }
12137 else if (htab->vxworks_p)
b7693d02 12138 {
00a97672
RS		 12139 unsigned int i;
12140 bfd_vma val;
12141
d3753b85 12142 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12143 {
12144 val = elf32_arm_vxworks_exec_plt_entry[i];
12145 if (i == 2)
12146 val |= got_address;
12147 if (i == 4)
12148 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12149 if (i == 5)
12150 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12151 if (i == 2 || i == 5)
12152 bfd_put_32 (output_bfd, val, ptr);
12153 else
12154 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12155 }
12156
12157 loc = (htab->srelplt2->contents
12158 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12159
12160 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12161 referencing the GOT for this PLT entry. */
12162 rel.r_offset = plt_address + 8;
12163 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12164 rel.r_addend = got_offset;
12165 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12166 loc += RELOC_SIZE (htab);
12167
12168 /* Create the R_ARM_ABS32 relocation referencing the
12169 beginning of the PLT for this GOT entry. */
12170 rel.r_offset = got_address;
12171 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12172 rel.r_addend = 0;
12173 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12174 }
00a97672
RS		 12175 else
12176 {
bd97cb95 12177 bfd_signed_vma thumb_refs;
00a97672
RS		 12178 /* Calculate the displacement between the PLT slot and the
12179 entry in the GOT. The eight-byte offset accounts for the
12180 value produced by adding to pc in the first instruction
12181 of the PLT stub. */
12182 got_displacement = got_address - (plt_address + 8);
b7693d02 12183
00a97672
RS		 12184 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12185
bd97cb95
DJ		 12186 thumb_refs = eh->plt_thumb_refcount;
12187 if (!htab->use_blx)
12188 thumb_refs += eh->plt_maybe_thumb_refcount;
12189
12190 if (thumb_refs > 0)
00a97672 12191 {
52ab56c2
PB		 12192 put_thumb_insn (htab, output_bfd,
12193 elf32_arm_plt_thumb_stub[0], ptr - 4);
12194 put_thumb_insn (htab, output_bfd,
12195 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12196 }
12197
52ab56c2
PB		 12198 put_arm_insn (htab, output_bfd,
12199 elf32_arm_plt_entry[0]
12200 | ((got_displacement & 0x0ff00000) >> 20),
12201 ptr + 0);
12202 put_arm_insn (htab, output_bfd,
12203 elf32_arm_plt_entry[1]
12204 | ((got_displacement & 0x000ff000) >> 12),
12205 ptr+ 4);
12206 put_arm_insn (htab, output_bfd,
12207 elf32_arm_plt_entry[2]
12208 | (got_displacement & 0x00000fff),
12209 ptr + 8);
5e681ec4 12210#ifdef FOUR_WORD_PLT
52ab56c2 12211 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12212#endif
00a97672 12213 }
252b5132 12214
e5a52504
MM		 12215 /* Fill in the entry in the global offset table. */
12216 bfd_put_32 (output_bfd,
12217 (splt->output_section->vma
12218 + splt->output_offset),
12219 sgot->contents + got_offset);
906e58ca 12220
00a97672
RS		 12221 /* Fill in the entry in the .rel(a).plt section. */
12222 rel.r_addend = 0;
12223 rel.r_offset = got_address;
e5a52504
MM		 12224 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12225 }
57e8b36a 12226
00a97672
RS		 12227 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12228 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12229
f5385ebf 12230 if (!h->def_regular)
252b5132
RH		 12231 {
12232 /* Mark the symbol as undefined, rather than as defined in
12233 the .plt section. Leave the value alone. */
12234 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12235 /* If the symbol is weak, we do need to clear the value.
12236 Otherwise, the PLT entry would provide a definition for
12237 the symbol even if the symbol wasn't defined anywhere,
12238 and so the symbol would never be NULL. */
f5385ebf 12239 if (!h->ref_regular_nonweak)
d982ba73 12240 sym->st_value = 0;
252b5132
RH		 12241 }
12242 }
12243
ba93b8ac
DJ		 12244 if (h->got.offset != (bfd_vma) -1
12245 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12246 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12247 {
12248 asection * sgot;
12249 asection * srel;
947216bf
AM		 12250 Elf_Internal_Rela rel;
12251 bfd_byte *loc;
00a97672 12252 bfd_vma offset;
252b5132
RH		 12253
12254 /* This symbol has an entry in the global offset table. Set it
12255 up. */
252b5132 12256 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12257 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12258 BFD_ASSERT (sgot != NULL && srel != NULL);
12259
00a97672
RS		 12260 offset = (h->got.offset & ~(bfd_vma) 1);
12261 rel.r_addend = 0;
252b5132
RH		 12262 rel.r_offset = (sgot->output_section->vma
12263 + sgot->output_offset
00a97672 12264 + offset);
252b5132 12265
5e681ec4
PB		 12266 /* If this is a static link, or it is a -Bsymbolic link and the
12267 symbol is defined locally or was forced to be local because
12268 of a version file, we just want to emit a RELATIVE reloc.
12269 The entry in the global offset table will already have been
12270 initialized in the relocate_section function. */
252b5132 12271 if (info->shared
5e681ec4
PB		 12272 && SYMBOL_REFERENCES_LOCAL (info, h))
12273 {
906e58ca 12274 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12275 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12276 if (!htab->use_rel)
12277 {
12278 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12279 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12280 }
5e681ec4 12281 }
252b5132
RH		 12282 else
12283 {
906e58ca 12284 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12285 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12286 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12287 }
12288
00a97672
RS		 12289 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12290 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12291 }
12292
f5385ebf 12293 if (h->needs_copy)
252b5132
RH		 12294 {
12295 asection * s;
947216bf
AM		 12296 Elf_Internal_Rela rel;
12297 bfd_byte *loc;
252b5132
RH		 12298
12299 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12300 BFD_ASSERT (h->dynindx != -1
12301 && (h->root.type == bfd_link_hash_defined
12302 || h->root.type == bfd_link_hash_defweak));
12303
12304 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12305 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12306 BFD_ASSERT (s != NULL);
12307
00a97672 12308 rel.r_addend = 0;
252b5132
RH		 12309 rel.r_offset = (h->root.u.def.value
12310 + h->root.u.def.section->output_section->vma
12311 + h->root.u.def.section->output_offset);
12312 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12313 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12314 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12315 }
12316
00a97672
RS		 12317 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12318 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12319 to the ".got" section. */
252b5132 12320 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12321 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12322 sym->st_shndx = SHN_ABS;
12323
b34976b6 12324 return TRUE;
252b5132
RH		 12325}
12326
12327/* Finish up the dynamic sections. */
12328
b34976b6 12329static bfd_boolean
57e8b36a 12330elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12331{
12332 bfd * dynobj;
12333 asection * sgot;
12334 asection * sdyn;
12335
12336 dynobj = elf_hash_table (info)->dynobj;
12337
12338 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12339 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12340 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12341
12342 if (elf_hash_table (info)->dynamic_sections_created)
12343 {
12344 asection *splt;
12345 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12346 struct elf32_arm_link_hash_table *htab;
252b5132 12347
229fcec5 12348 htab = elf32_arm_hash_table (info);
252b5132 12349 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12350 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12351
12352 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12353 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12354
252b5132
RH		 12355 for (; dyncon < dynconend; dyncon++)
12356 {
12357 Elf_Internal_Dyn dyn;
12358 const char * name;
12359 asection * s;
12360
12361 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12362
12363 switch (dyn.d_tag)
12364 {
229fcec5
MM		 12365 unsigned int type;
12366
252b5132 12367 default:
7a2b07ff
NS		 12368 if (htab->vxworks_p
12369 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12370 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12371 break;
12372
229fcec5
MM		 12373 case DT_HASH:
12374 name = ".hash";
12375 goto get_vma_if_bpabi;
12376 case DT_STRTAB:
12377 name = ".dynstr";
12378 goto get_vma_if_bpabi;
12379 case DT_SYMTAB:
12380 name = ".dynsym";
12381 goto get_vma_if_bpabi;
c0042f5d
MM		 12382 case DT_VERSYM:
12383 name = ".gnu.version";
12384 goto get_vma_if_bpabi;
12385 case DT_VERDEF:
12386 name = ".gnu.version_d";
12387 goto get_vma_if_bpabi;
12388 case DT_VERNEED:
12389 name = ".gnu.version_r";
12390 goto get_vma_if_bpabi;
12391
252b5132
RH		 12392 case DT_PLTGOT:
12393 name = ".got";
12394 goto get_vma;
12395 case DT_JMPREL:
00a97672 12396 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12397 get_vma:
12398 s = bfd_get_section_by_name (output_bfd, name);
12399 BFD_ASSERT (s != NULL);
229fcec5
MM		 12400 if (!htab->symbian_p)
12401 dyn.d_un.d_ptr = s->vma;
12402 else
12403 /* In the BPABI, tags in the PT_DYNAMIC section point
12404 at the file offset, not the memory address, for the
12405 convenience of the post linker. */
12406 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12407 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12408 break;
12409
229fcec5
MM		 12410 get_vma_if_bpabi:
12411 if (htab->symbian_p)
12412 goto get_vma;
12413 break;
12414
252b5132 12415 case DT_PLTRELSZ:
00a97672
RS		 12416 s = bfd_get_section_by_name (output_bfd,
12417 RELOC_SECTION (htab, ".plt"));
252b5132 12418 BFD_ASSERT (s != NULL);
eea6121a 12419 dyn.d_un.d_val = s->size;
252b5132
RH		 12420 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12421 break;
906e58ca 12422
252b5132 12423 case DT_RELSZ:
00a97672 12424 case DT_RELASZ:
229fcec5
MM		 12425 if (!htab->symbian_p)
12426 {
12427 /* My reading of the SVR4 ABI indicates that the
12428 procedure linkage table relocs (DT_JMPREL) should be
12429 included in the overall relocs (DT_REL). This is
12430 what Solaris does. However, UnixWare can not handle
12431 that case. Therefore, we override the DT_RELSZ entry
12432 here to make it not include the JMPREL relocs. Since
00a97672 12433 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12434 other relocation sections, we don't have to worry
12435 about changing the DT_REL entry. */
00a97672
RS		 12436 s = bfd_get_section_by_name (output_bfd,
12437 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12438 if (s != NULL)
12439 dyn.d_un.d_val -= s->size;
12440 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12441 break;
12442 }
8029a119 12443 /* Fall through. */
229fcec5
MM		 12444
12445 case DT_REL:
12446 case DT_RELA:
229fcec5
MM		 12447 /* In the BPABI, the DT_REL tag must point at the file
12448 offset, not the VMA, of the first relocation
12449 section. So, we use code similar to that in
12450 elflink.c, but do not check for SHF_ALLOC on the
12451 relcoation section, since relocations sections are
12452 never allocated under the BPABI. The comments above
12453 about Unixware notwithstanding, we include all of the
12454 relocations here. */
12455 if (htab->symbian_p)
12456 {
12457 unsigned int i;
12458 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12459 ? SHT_REL : SHT_RELA);
12460 dyn.d_un.d_val = 0;
12461 for (i = 1; i < elf_numsections (output_bfd); i++)
12462 {
906e58ca 12463 Elf_Internal_Shdr *hdr
229fcec5
MM		 12464 = elf_elfsections (output_bfd)[i];
12465 if (hdr->sh_type == type)
12466 {
906e58ca 12467 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12468 || dyn.d_tag == DT_RELASZ)
12469 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12470 else if ((ufile_ptr) hdr->sh_offset
12471 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12472 dyn.d_un.d_val = hdr->sh_offset;
12473 }
12474 }
12475 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12476 }
252b5132 12477 break;
88f7bcd5
NC		 12478
12479 /* Set the bottom bit of DT_INIT/FINI if the
12480 corresponding function is Thumb. */
12481 case DT_INIT:
12482 name = info->init_function;
12483 goto get_sym;
12484 case DT_FINI:
12485 name = info->fini_function;
12486 get_sym:
12487 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12488 then there is nothing to adjust. */
88f7bcd5
NC		 12489 if (dyn.d_un.d_val != 0)
12490 {
12491 struct elf_link_hash_entry * eh;
12492
12493 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12494 FALSE, FALSE, TRUE);
906e58ca 12495 if (eh != NULL
88f7bcd5
NC		 12496 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12497 {
12498 dyn.d_un.d_val |= 1;
b34976b6 12499 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12500 }
12501 }
12502 break;
252b5132
RH		 12503 }
12504 }
12505
24a1ba0f 12506 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12507 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12508 {
00a97672
RS		 12509 const bfd_vma *plt0_entry;
12510 bfd_vma got_address, plt_address, got_displacement;
12511
12512 /* Calculate the addresses of the GOT and PLT. */
12513 got_address = sgot->output_section->vma + sgot->output_offset;
12514 plt_address = splt->output_section->vma + splt->output_offset;
12515
12516 if (htab->vxworks_p)
12517 {
12518 /* The VxWorks GOT is relocated by the dynamic linker.
12519 Therefore, we must emit relocations rather than simply
12520 computing the values now. */
12521 Elf_Internal_Rela rel;
12522
12523 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12524 put_arm_insn (htab, output_bfd, plt0_entry[0],
12525 splt->contents + 0);
12526 put_arm_insn (htab, output_bfd, plt0_entry[1],
12527 splt->contents + 4);
12528 put_arm_insn (htab, output_bfd, plt0_entry[2],
12529 splt->contents + 8);
00a97672
RS		 12530 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12531
8029a119 12532 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12533 rel.r_offset = plt_address + 12;
12534 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12535 rel.r_addend = 0;
12536 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12537 htab->srelplt2->contents);
12538 }
12539 else
12540 {
12541 got_displacement = got_address - (plt_address + 16);
12542
12543 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12544 put_arm_insn (htab, output_bfd, plt0_entry[0],
12545 splt->contents + 0);
12546 put_arm_insn (htab, output_bfd, plt0_entry[1],
12547 splt->contents + 4);
12548 put_arm_insn (htab, output_bfd, plt0_entry[2],
12549 splt->contents + 8);
12550 put_arm_insn (htab, output_bfd, plt0_entry[3],
12551 splt->contents + 12);
5e681ec4 12552
5e681ec4 12553#ifdef FOUR_WORD_PLT
00a97672
RS		 12554 /* The displacement value goes in the otherwise-unused
12555 last word of the second entry. */
12556 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12557#else
00a97672 12558 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12559#endif
00a97672 12560 }
f7a74f8c 12561 }
252b5132
RH		 12562
12563 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12564 really seem like the right value. */
74541ad4
AM		 12565 if (splt->output_section->owner == output_bfd)
12566 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12567
12568 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12569 {
12570 /* Correct the .rel(a).plt.unloaded relocations. They will have
12571 incorrect symbol indexes. */
12572 int num_plts;
eed62c48 12573 unsigned char *p;
00a97672
RS		 12574
12575 num_plts = ((htab->splt->size - htab->plt_header_size)
12576 / htab->plt_entry_size);
12577 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12578
12579 for (; num_plts; num_plts--)
12580 {
12581 Elf_Internal_Rela rel;
12582
12583 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12584 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12585 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12586 p += RELOC_SIZE (htab);
12587
12588 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12589 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12590 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12591 p += RELOC_SIZE (htab);
12592 }
12593 }
252b5132
RH		 12594 }
12595
12596 /* Fill in the first three entries in the global offset table. */
229fcec5 12597 if (sgot)
252b5132 12598 {
229fcec5
MM		 12599 if (sgot->size > 0)
12600 {
12601 if (sdyn == NULL)
12602 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12603 else
12604 bfd_put_32 (output_bfd,
12605 sdyn->output_section->vma + sdyn->output_offset,
12606 sgot->contents);
12607 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12608 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12609 }
252b5132 12610
229fcec5
MM		 12611 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12612 }
252b5132 12613
b34976b6 12614 return TRUE;
252b5132
RH		 12615}
12616
ba96a88f 12617static void
57e8b36a 12618elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12619{
9b485d32 12620 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12621 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12622
12623 i_ehdrp = elf_elfheader (abfd);
12624
94a3258f
PB		 12625 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12626 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12627 else
12628 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12629 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12630
93204d3a
PB		 12631 if (link_info)
12632 {
12633 globals = elf32_arm_hash_table (link_info);
12634 if (globals->byteswap_code)
12635 i_ehdrp->e_flags |= EF_ARM_BE8;
12636 }
ba96a88f
NC		 12637}
12638
99e4ae17 12639static enum elf_reloc_type_class
57e8b36a 12640elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12641{
f51e552e 12642 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12643 {
12644 case R_ARM_RELATIVE:
12645 return reloc_class_relative;
12646 case R_ARM_JUMP_SLOT:
12647 return reloc_class_plt;
12648 case R_ARM_COPY:
12649 return reloc_class_copy;
12650 default:
12651 return reloc_class_normal;
12652 }
12653}
12654
e16bb312
NC		 12655/* Set the right machine number for an Arm ELF file. */
12656
12657static bfd_boolean
57e8b36a 12658elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12659{
12660 if (hdr->sh_type == SHT_NOTE)
12661 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12662
12663 return TRUE;
12664}
12665
e489d0ae 12666static void
57e8b36a 12667elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12668{
5a6c6817 12669 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12670}
12671
40a18ebd
NC		 12672/* Return TRUE if this is an unwinding table entry. */
12673
12674static bfd_boolean
12675is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12676{
0112cd26
NC		 12677 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12678 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12679}
12680
12681
12682/* Set the type and flags for an ARM section. We do this by
12683 the section name, which is a hack, but ought to work. */
12684
12685static bfd_boolean
12686elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12687{
12688 const char * name;
12689
12690 name = bfd_get_section_name (abfd, sec);
12691
12692 if (is_arm_elf_unwind_section_name (abfd, name))
12693 {
12694 hdr->sh_type = SHT_ARM_EXIDX;
12695 hdr->sh_flags |= SHF_LINK_ORDER;
12696 }
12697 return TRUE;
12698}
12699
6dc132d9
L		 12700/* Handle an ARM specific section when reading an object file. This is
12701 called when bfd_section_from_shdr finds a section with an unknown
12702 type. */
40a18ebd
NC		 12703
12704static bfd_boolean
12705elf32_arm_section_from_shdr (bfd *abfd,
12706 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12707 const char *name,
12708 int shindex)
40a18ebd
NC		 12709{
12710 /* There ought to be a place to keep ELF backend specific flags, but
12711 at the moment there isn't one. We just keep track of the
12712 sections by their name, instead. Fortunately, the ABI gives
12713 names for all the ARM specific sections, so we will probably get
12714 away with this. */
12715 switch (hdr->sh_type)
12716 {
12717 case SHT_ARM_EXIDX:
0951f019
RE		 12718 case SHT_ARM_PREEMPTMAP:
12719 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12720 break;
12721
12722 default:
12723 return FALSE;
12724 }
12725
6dc132d9 12726 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12727 return FALSE;
12728
12729 return TRUE;
12730}
e489d0ae 12731
8e3de13a
NC		 12732/* A structure used to record a list of sections, independently
12733 of the next and prev fields in the asection structure. */
12734typedef struct section_list
12735{
12736 asection * sec;
12737 struct section_list * next;
12738 struct section_list * prev;
12739}
12740section_list;
12741
12742/* Unfortunately we need to keep a list of sections for which
12743 an _arm_elf_section_data structure has been allocated. This
12744 is because it is possible for functions like elf32_arm_write_section
12745 to be called on a section which has had an elf_data_structure
12746 allocated for it (and so the used_by_bfd field is valid) but
12747 for which the ARM extended version of this structure - the
12748 _arm_elf_section_data structure - has not been allocated. */
12749static section_list * sections_with_arm_elf_section_data = NULL;
12750
12751static void
957c6e41 12752record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12753{
12754 struct section_list * entry;
12755
957c6e41 12756 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12757 if (entry == NULL)
12758 return;
12759 entry->sec = sec;
12760 entry->next = sections_with_arm_elf_section_data;
12761 entry->prev = NULL;
12762 if (entry->next != NULL)
12763 entry->next->prev = entry;
12764 sections_with_arm_elf_section_data = entry;
12765}
12766
44444f50
NC		 12767static struct section_list *
12768find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12769{
12770 struct section_list * entry;
bd4aae00 12771 static struct section_list * last_entry = NULL;
8e3de13a 12772
bd4aae00
NC		 12773 /* This is a short cut for the typical case where the sections are added
12774 to the sections_with_arm_elf_section_data list in forward order and
12775 then looked up here in backwards order. This makes a real difference
12776 to the ld-srec/sec64k.exp linker test. */
44444f50 12777 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12778 if (last_entry != NULL)
12779 {
12780 if (last_entry->sec == sec)
44444f50
NC		 12781 entry = last_entry;
12782 else if (last_entry->next != NULL
12783 && last_entry->next->sec == sec)
12784 entry = last_entry->next;
bd4aae00 12785 }
44444f50
NC		 12786
12787 for (; entry; entry = entry->next)
8e3de13a 12788 if (entry->sec == sec)
44444f50 12789 break;
bd4aae00 12790
44444f50
NC		 12791 if (entry)
12792 /* Record the entry prior to this one - it is the entry we are most
12793 likely to want to locate next time. Also this way if we have been
12794 called from unrecord_section_with_arm_elf_section_data() we will not
12795 be caching a pointer that is about to be freed. */
12796 last_entry = entry->prev;
12797
12798 return entry;
12799}
12800
12801static _arm_elf_section_data *
12802get_arm_elf_section_data (asection * sec)
12803{
12804 struct section_list * entry;
12805
12806 entry = find_arm_elf_section_entry (sec);
12807
12808 if (entry)
12809 return elf32_arm_section_data (entry->sec);
12810 else
12811 return NULL;
8e3de13a
NC		 12812}
12813
12814static void
12815unrecord_section_with_arm_elf_section_data (asection * sec)
12816{
12817 struct section_list * entry;
12818
44444f50
NC		 12819 entry = find_arm_elf_section_entry (sec);
12820
12821 if (entry)
12822 {
12823 if (entry->prev != NULL)
12824 entry->prev->next = entry->next;
12825 if (entry->next != NULL)
12826 entry->next->prev = entry->prev;
12827 if (entry == sections_with_arm_elf_section_data)
12828 sections_with_arm_elf_section_data = entry->next;
12829 free (entry);
12830 }
8e3de13a
NC		 12831}
12832
e489d0ae 12833
4e617b1e
PB		 12834typedef struct
12835{
12836 void *finfo;
12837 struct bfd_link_info *info;
91a5743d
PB		 12838 asection *sec;
12839 int sec_shndx;
6e0b88f1
AM		 12840 int (*func) (void *, const char *, Elf_Internal_Sym *,
12841 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12842} output_arch_syminfo;
12843
12844enum map_symbol_type
12845{
12846 ARM_MAP_ARM,
12847 ARM_MAP_THUMB,
12848 ARM_MAP_DATA
12849};
12850
12851
7413f23f 12852/* Output a single mapping symbol. */
4e617b1e
PB		 12853
12854static bfd_boolean
7413f23f
DJ		 12855elf32_arm_output_map_sym (output_arch_syminfo *osi,
12856 enum map_symbol_type type,
12857 bfd_vma offset)
4e617b1e
PB		 12858{
12859 static const char *names[3] = {"$a", "$t", "$d"};
12860 struct elf32_arm_link_hash_table *htab;
12861 Elf_Internal_Sym sym;
12862
12863 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12864 sym.st_value = osi->sec->output_section->vma
12865 + osi->sec->output_offset
12866 + offset;
4e617b1e
PB		 12867 sym.st_size = 0;
12868 sym.st_other = 0;
12869 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12870 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12871 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12872}
12873
12874
12875/* Output mapping symbols for PLT entries associated with H. */
12876
12877static bfd_boolean
12878elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12879{
12880 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12881 struct elf32_arm_link_hash_table *htab;
12882 struct elf32_arm_link_hash_entry *eh;
12883 bfd_vma addr;
12884
12885 htab = elf32_arm_hash_table (osi->info);
12886
12887 if (h->root.type == bfd_link_hash_indirect)
12888 return TRUE;
12889
12890 if (h->root.type == bfd_link_hash_warning)
12891 /* When warning symbols are created, they **replace** the "real"
12892 entry in the hash table, thus we never get to see the real
12893 symbol in a hash traversal. So look at it now. */
12894 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12895
12896 if (h->plt.offset == (bfd_vma) -1)
12897 return TRUE;
12898
12899 eh = (struct elf32_arm_link_hash_entry *) h;
12900 addr = h->plt.offset;
12901 if (htab->symbian_p)
12902 {
7413f23f 12903 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12904 return FALSE;
7413f23f 12905 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12906 return FALSE;
12907 }
12908 else if (htab->vxworks_p)
12909 {
7413f23f 12910 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12911 return FALSE;
7413f23f 12912 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12913 return FALSE;
7413f23f 12914 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12915 return FALSE;
7413f23f 12916 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12917 return FALSE;
12918 }
12919 else
12920 {
bd97cb95
DJ		 12921 bfd_signed_vma thumb_refs;
12922
12923 thumb_refs = eh->plt_thumb_refcount;
12924 if (!htab->use_blx)
12925 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12926
bd97cb95 12927 if (thumb_refs > 0)
4e617b1e 12928 {
7413f23f 12929 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12930 return FALSE;
12931 }
12932#ifdef FOUR_WORD_PLT
7413f23f 12933 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12934 return FALSE;
7413f23f 12935 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12936 return FALSE;
12937#else
906e58ca 12938 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12939 so only need to output a mapping symbol for the first PLT entry and
12940 entries with thumb thunks. */
bd97cb95 12941 if (thumb_refs > 0 || addr == 20)
4e617b1e 12942 {
7413f23f 12943 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12944 return FALSE;
12945 }
12946#endif
12947 }
12948
12949 return TRUE;
12950}
12951
7413f23f
DJ		 12952/* Output a single local symbol for a generated stub. */
12953
12954static bfd_boolean
12955elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12956 bfd_vma offset, bfd_vma size)
12957{
12958 struct elf32_arm_link_hash_table *htab;
12959 Elf_Internal_Sym sym;
12960
12961 htab = elf32_arm_hash_table (osi->info);
12962 sym.st_value = osi->sec->output_section->vma
12963 + osi->sec->output_offset
12964 + offset;
12965 sym.st_size = size;
12966 sym.st_other = 0;
12967 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12968 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12969 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12970}
4e617b1e 12971
da5938a2 12972static bfd_boolean
8029a119
NC		 12973arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12974 void * in_arg)
da5938a2
NC		 12975{
12976 struct elf32_arm_stub_hash_entry *stub_entry;
12977 struct bfd_link_info *info;
12978 struct elf32_arm_link_hash_table *htab;
12979 asection *stub_sec;
12980 bfd_vma addr;
7413f23f 12981 char *stub_name;
9a008db3 12982 output_arch_syminfo *osi;
d3ce72d0 12983 const insn_sequence *template_sequence;
461a49ca
DJ		 12984 enum stub_insn_type prev_type;
12985 int size;
12986 int i;
12987 enum map_symbol_type sym_type;
da5938a2
NC		 12988
12989 /* Massage our args to the form they really have. */
12990 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12991 osi = (output_arch_syminfo *) in_arg;
da5938a2 12992
da5938a2
NC		 12993 info = osi->info;
12994
12995 htab = elf32_arm_hash_table (info);
12996 stub_sec = stub_entry->stub_sec;
12997
12998 /* Ensure this stub is attached to the current section being
7413f23f 12999 processed. */
da5938a2
NC		 13000 if (stub_sec != osi->sec)
13001 return TRUE;
13002
7413f23f
DJ		 13003 addr = (bfd_vma) stub_entry->stub_offset;
13004 stub_name = stub_entry->output_name;
da5938a2 13005
d3ce72d0
NC		 13006 template_sequence = stub_entry->stub_template;
13007 switch (template_sequence[0].type)
7413f23f 13008 {
461a49ca
DJ		 13009 case ARM_TYPE:
13010 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13011 return FALSE;
13012 break;
461a49ca 13013 case THUMB16_TYPE:
48229727 13014 case THUMB32_TYPE:
461a49ca
DJ		 13015 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13016 stub_entry->stub_size))
da5938a2
NC		 13017 return FALSE;
13018 break;
13019 default:
13020 BFD_FAIL ();
48229727 13021 return 0;
7413f23f 13022 }
da5938a2 13023
461a49ca
DJ		 13024 prev_type = DATA_TYPE;
13025 size = 0;
13026 for (i = 0; i < stub_entry->stub_template_size; i++)
13027 {
d3ce72d0 13028 switch (template_sequence[i].type)
461a49ca
DJ		 13029 {
13030 case ARM_TYPE:
13031 sym_type = ARM_MAP_ARM;
13032 break;
13033
13034 case THUMB16_TYPE:
48229727 13035 case THUMB32_TYPE:
461a49ca
DJ		 13036 sym_type = ARM_MAP_THUMB;
13037 break;
13038
13039 case DATA_TYPE:
13040 sym_type = ARM_MAP_DATA;
13041 break;
13042
13043 default:
13044 BFD_FAIL ();
4e31c731 13045 return FALSE;
461a49ca
DJ		 13046 }
13047
d3ce72d0 13048 if (template_sequence[i].type != prev_type)
461a49ca 13049 {
d3ce72d0 13050 prev_type = template_sequence[i].type;
461a49ca
DJ		 13051 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13052 return FALSE;
13053 }
13054
d3ce72d0 13055 switch (template_sequence[i].type)
461a49ca
DJ		 13056 {
13057 case ARM_TYPE:
48229727 13058 case THUMB32_TYPE:
461a49ca
DJ		 13059 size += 4;
13060 break;
13061
13062 case THUMB16_TYPE:
13063 size += 2;
13064 break;
13065
13066 case DATA_TYPE:
13067 size += 4;
13068 break;
13069
13070 default:
13071 BFD_FAIL ();
4e31c731 13072 return FALSE;
461a49ca
DJ		 13073 }
13074 }
13075
da5938a2
NC		 13076 return TRUE;
13077}
13078
91a5743d 13079/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 13080
13081static bfd_boolean
13082elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13083 struct bfd_link_info *info,
13084 void *finfo,
6e0b88f1
AM		 13085 int (*func) (void *, const char *,
13086 Elf_Internal_Sym *,
13087 asection *,
13088 struct elf_link_hash_entry *))
4e617b1e
PB		 13089{
13090 output_arch_syminfo osi;
13091 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13092 bfd_vma offset;
13093 bfd_size_type size;
4e617b1e
PB		 13094
13095 htab = elf32_arm_hash_table (info);
906e58ca 13096 check_use_blx (htab);
91a5743d 13097
4e617b1e
PB		 13098 osi.finfo = finfo;
13099 osi.info = info;
13100 osi.func = func;
906e58ca 13101
91a5743d
PB		 13102 /* ARM->Thumb glue. */
13103 if (htab->arm_glue_size > 0)
13104 {
13105 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13106 ARM2THUMB_GLUE_SECTION_NAME);
13107
13108 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13109 (output_bfd, osi.sec->output_section);
13110 if (info->shared || htab->root.is_relocatable_executable
13111 || htab->pic_veneer)
13112 size = ARM2THUMB_PIC_GLUE_SIZE;
13113 else if (htab->use_blx)
13114 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13115 else
13116 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13117
91a5743d
PB		 13118 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13119 {
7413f23f
DJ		 13120 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13121 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13122 }
13123 }
13124
13125 /* Thumb->ARM glue. */
13126 if (htab->thumb_glue_size > 0)
13127 {
13128 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13129 THUMB2ARM_GLUE_SECTION_NAME);
13130
13131 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13132 (output_bfd, osi.sec->output_section);
13133 size = THUMB2ARM_GLUE_SIZE;
13134
13135 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13136 {
7413f23f
DJ		 13137 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13138 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13139 }
13140 }
13141
845b51d6
PB		 13142 /* ARMv4 BX veneers. */
13143 if (htab->bx_glue_size > 0)
13144 {
13145 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13146 ARM_BX_GLUE_SECTION_NAME);
13147
13148 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13149 (output_bfd, osi.sec->output_section);
13150
7413f23f 13151 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13152 }
13153
8029a119
NC		 13154 /* Long calls stubs. */
13155 if (htab->stub_bfd && htab->stub_bfd->sections)
13156 {
da5938a2 13157 asection* stub_sec;
8029a119 13158
da5938a2
NC		 13159 for (stub_sec = htab->stub_bfd->sections;
13160 stub_sec != NULL;
8029a119
NC		 13161 stub_sec = stub_sec->next)
13162 {
13163 /* Ignore non-stub sections. */
13164 if (!strstr (stub_sec->name, STUB_SUFFIX))
13165 continue;
da5938a2 13166
8029a119 13167 osi.sec = stub_sec;
da5938a2 13168
8029a119
NC		 13169 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13170 (output_bfd, osi.sec->output_section);
da5938a2 13171
8029a119
NC		 13172 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13173 }
13174 }
da5938a2 13175
91a5743d
PB		 13176 /* Finally, output mapping symbols for the PLT. */
13177 if (!htab->splt || htab->splt->size == 0)
13178 return TRUE;
13179
13180 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13181 htab->splt->output_section);
91a5743d 13182 osi.sec = htab->splt;
4e617b1e
PB		 13183 /* Output mapping symbols for the plt header. SymbianOS does not have a
13184 plt header. */
13185 if (htab->vxworks_p)
13186 {
13187 /* VxWorks shared libraries have no PLT header. */
13188 if (!info->shared)
13189 {
7413f23f 13190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13191 return FALSE;
7413f23f 13192 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13193 return FALSE;
13194 }
13195 }
13196 else if (!htab->symbian_p)
13197 {
7413f23f 13198 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13199 return FALSE;
13200#ifndef FOUR_WORD_PLT
7413f23f 13201 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13202 return FALSE;
13203#endif
13204 }
13205
13206 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13207 return TRUE;
13208}
13209
e489d0ae
PB		 13210/* Allocate target specific section data. */
13211
13212static bfd_boolean
13213elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13214{
f592407e
AM		 13215 if (!sec->used_by_bfd)
13216 {
13217 _arm_elf_section_data *sdata;
13218 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13219
f592407e
AM		 13220 sdata = bfd_zalloc (abfd, amt);
13221 if (sdata == NULL)
13222 return FALSE;
13223 sec->used_by_bfd = sdata;
13224 }
e489d0ae 13225
957c6e41 13226 record_section_with_arm_elf_section_data (sec);
8e3de13a 13227
e489d0ae
PB		 13228 return _bfd_elf_new_section_hook (abfd, sec);
13229}
13230
13231
13232/* Used to order a list of mapping symbols by address. */
13233
13234static int
13235elf32_arm_compare_mapping (const void * a, const void * b)
13236{
7f6a71ff
JM		 13237 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13238 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13239
13240 if (amap->vma > bmap->vma)
13241 return 1;
13242 else if (amap->vma < bmap->vma)
13243 return -1;
13244 else if (amap->type > bmap->type)
13245 /* Ensure results do not depend on the host qsort for objects with
13246 multiple mapping symbols at the same address by sorting on type
13247 after vma. */
13248 return 1;
13249 else if (amap->type < bmap->type)
13250 return -1;
13251 else
13252 return 0;
e489d0ae
PB		 13253}
13254
2468f9c9
PB		 13255/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13256
13257static unsigned long
13258offset_prel31 (unsigned long addr, bfd_vma offset)
13259{
13260 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13261}
13262
13263/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13264 relocations. */
13265
13266static void
13267copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13268{
13269 unsigned long first_word = bfd_get_32 (output_bfd, from);
13270 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13271
13272 /* High bit of first word is supposed to be zero. */
13273 if ((first_word & 0x80000000ul) == 0)
13274 first_word = offset_prel31 (first_word, offset);
13275
13276 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13277 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13278 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13279 second_word = offset_prel31 (second_word, offset);
13280
13281 bfd_put_32 (output_bfd, first_word, to);
13282 bfd_put_32 (output_bfd, second_word, to + 4);
13283}
e489d0ae 13284
48229727
JB		 13285/* Data for make_branch_to_a8_stub(). */
13286
13287struct a8_branch_to_stub_data {
13288 asection *writing_section;
13289 bfd_byte *contents;
13290};
13291
13292
13293/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13294 places for a particular section. */
13295
13296static bfd_boolean
13297make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13298 void *in_arg)
13299{
13300 struct elf32_arm_stub_hash_entry *stub_entry;
13301 struct a8_branch_to_stub_data *data;
13302 bfd_byte *contents;
13303 unsigned long branch_insn;
13304 bfd_vma veneered_insn_loc, veneer_entry_loc;
13305 bfd_signed_vma branch_offset;
13306 bfd *abfd;
13307 unsigned int index;
13308
13309 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13310 data = (struct a8_branch_to_stub_data *) in_arg;
13311
13312 if (stub_entry->target_section != data->writing_section
13313 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13314 return TRUE;
13315
13316 contents = data->contents;
13317
13318 veneered_insn_loc = stub_entry->target_section->output_section->vma
13319 + stub_entry->target_section->output_offset
13320 + stub_entry->target_value;
13321
13322 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13323 + stub_entry->stub_sec->output_offset
13324 + stub_entry->stub_offset;
13325
13326 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13327 veneered_insn_loc &= ~3u;
13328
13329 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13330
13331 abfd = stub_entry->target_section->owner;
13332 index = stub_entry->target_value;
13333
13334 /* We attempt to avoid this condition by setting stubs_always_after_branch
13335 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13336 This check is just to be on the safe side... */
13337 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13338 {
13339 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13340 "allocated in unsafe location"), abfd);
13341 return FALSE;
13342 }
13343
13344 switch (stub_entry->stub_type)
13345 {
13346 case arm_stub_a8_veneer_b:
13347 case arm_stub_a8_veneer_b_cond:
13348 branch_insn = 0xf0009000;
13349 goto jump24;
13350
13351 case arm_stub_a8_veneer_blx:
13352 branch_insn = 0xf000e800;
13353 goto jump24;
13354
13355 case arm_stub_a8_veneer_bl:
13356 {
13357 unsigned int i1, j1, i2, j2, s;
13358
13359 branch_insn = 0xf000d000;
13360
13361 jump24:
13362 if (branch_offset < -16777216 || branch_offset > 16777214)
13363 {
13364 /* There's not much we can do apart from complain if this
13365 happens. */
13366 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13367 "of range (input file too large)"), abfd);
13368 return FALSE;
13369 }
13370
13371 /* i1 = not(j1 eor s), so:
13372 not i1 = j1 eor s
13373 j1 = (not i1) eor s. */
13374
13375 branch_insn |= (branch_offset >> 1) & 0x7ff;
13376 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13377 i2 = (branch_offset >> 22) & 1;
13378 i1 = (branch_offset >> 23) & 1;
13379 s = (branch_offset >> 24) & 1;
13380 j1 = (!i1) ^ s;
13381 j2 = (!i2) ^ s;
13382 branch_insn |= j2 << 11;
13383 branch_insn |= j1 << 13;
13384 branch_insn |= s << 26;
13385 }
13386 break;
13387
13388 default:
13389 BFD_FAIL ();
13390 return FALSE;
13391 }
13392
13393 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13394 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13395
13396 return TRUE;
13397}
13398
e489d0ae
PB		 13399/* Do code byteswapping. Return FALSE afterwards so that the section is
13400 written out as normal. */
13401
13402static bfd_boolean
c7b8f16e 13403elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13404 struct bfd_link_info *link_info,
13405 asection *sec,
e489d0ae
PB		 13406 bfd_byte *contents)
13407{
48229727 13408 unsigned int mapcount, errcount;
8e3de13a 13409 _arm_elf_section_data *arm_data;
c7b8f16e 13410 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13411 elf32_arm_section_map *map;
c7b8f16e 13412 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13413 bfd_vma ptr;
13414 bfd_vma end;
c7b8f16e 13415 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13416 bfd_byte tmp;
48229727 13417 unsigned int i;
57e8b36a 13418
8e3de13a
NC		 13419 /* If this section has not been allocated an _arm_elf_section_data
13420 structure then we cannot record anything. */
13421 arm_data = get_arm_elf_section_data (sec);
13422 if (arm_data == NULL)
13423 return FALSE;
13424
13425 mapcount = arm_data->mapcount;
13426 map = arm_data->map;
c7b8f16e
JB		 13427 errcount = arm_data->erratumcount;
13428
13429 if (errcount != 0)
13430 {
13431 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13432
13433 for (errnode = arm_data->erratumlist; errnode != 0;
13434 errnode = errnode->next)
13435 {
13436 bfd_vma index = errnode->vma - offset;
13437
13438 switch (errnode->type)
13439 {
13440 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13441 {
13442 bfd_vma branch_to_veneer;
13443 /* Original condition code of instruction, plus bit mask for
13444 ARM B instruction. */
13445 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13446 | 0x0a000000;
13447
13448 /* The instruction is before the label. */
13449 index -= 4;
13450
13451 /* Above offset included in -4 below. */
13452 branch_to_veneer = errnode->u.b.veneer->vma
13453 - errnode->vma - 4;
13454
13455 if ((signed) branch_to_veneer < -(1 << 25)
13456 || (signed) branch_to_veneer >= (1 << 25))
13457 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13458 "range"), output_bfd);
13459
13460 insn |= (branch_to_veneer >> 2) & 0xffffff;
13461 contents[endianflip ^ index] = insn & 0xff;
13462 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13463 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13464 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13465 }
13466 break;
13467
13468 case VFP11_ERRATUM_ARM_VENEER:
13469 {
13470 bfd_vma branch_from_veneer;
13471 unsigned int insn;
13472
13473 /* Take size of veneer into account. */
13474 branch_from_veneer = errnode->u.v.branch->vma
13475 - errnode->vma - 12;
13476
13477 if ((signed) branch_from_veneer < -(1 << 25)
13478 || (signed) branch_from_veneer >= (1 << 25))
13479 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13480 "range"), output_bfd);
13481
13482 /* Original instruction. */
13483 insn = errnode->u.v.branch->u.b.vfp_insn;
13484 contents[endianflip ^ index] = insn & 0xff;
13485 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13486 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13487 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13488
13489 /* Branch back to insn after original insn. */
13490 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13491 contents[endianflip ^ (index + 4)] = insn & 0xff;
13492 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13493 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13494 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13495 }
13496 break;
13497
13498 default:
13499 abort ();
13500 }
13501 }
13502 }
e489d0ae 13503
2468f9c9
PB		 13504 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13505 {
13506 arm_unwind_table_edit *edit_node
13507 = arm_data->u.exidx.unwind_edit_list;
13508 /* Now, sec->size is the size of the section we will write. The original
13509 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13510 markers) was sec->rawsize. (This isn't the case if we perform no
13511 edits, then rawsize will be zero and we should use size). */
13512 bfd_byte *edited_contents = bfd_malloc (sec->size);
13513 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13514 unsigned int in_index, out_index;
13515 bfd_vma add_to_offsets = 0;
13516
13517 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13518 {
13519 if (edit_node)
13520 {
13521 unsigned int edit_index = edit_node->index;
13522
13523 if (in_index < edit_index && in_index * 8 < input_size)
13524 {
13525 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13526 contents + in_index * 8, add_to_offsets);
13527 out_index++;
13528 in_index++;
13529 }
13530 else if (in_index == edit_index
13531 || (in_index * 8 >= input_size
13532 && edit_index == UINT_MAX))
13533 {
13534 switch (edit_node->type)
13535 {
13536 case DELETE_EXIDX_ENTRY:
13537 in_index++;
13538 add_to_offsets += 8;
13539 break;
13540
13541 case INSERT_EXIDX_CANTUNWIND_AT_END:
13542 {
13543 asection *text_sec = edit_node->linked_section;
13544 bfd_vma text_offset = text_sec->output_section->vma
13545 + text_sec->output_offset
13546 + text_sec->size;
13547 bfd_vma exidx_offset = offset + out_index * 8;
13548 unsigned long prel31_offset;
13549
13550 /* Note: this is meant to be equivalent to an
13551 R_ARM_PREL31 relocation. These synthetic
13552 EXIDX_CANTUNWIND markers are not relocated by the
13553 usual BFD method. */
13554 prel31_offset = (text_offset - exidx_offset)
13555 & 0x7ffffffful;
13556
13557 /* First address we can't unwind. */
13558 bfd_put_32 (output_bfd, prel31_offset,
13559 &edited_contents[out_index * 8]);
13560
13561 /* Code for EXIDX_CANTUNWIND. */
13562 bfd_put_32 (output_bfd, 0x1,
13563 &edited_contents[out_index * 8 + 4]);
13564
13565 out_index++;
13566 add_to_offsets -= 8;
13567 }
13568 break;
13569 }
13570
13571 edit_node = edit_node->next;
13572 }
13573 }
13574 else
13575 {
13576 /* No more edits, copy remaining entries verbatim. */
13577 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13578 contents + in_index * 8, add_to_offsets);
13579 out_index++;
13580 in_index++;
13581 }
13582 }
13583
13584 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13585 bfd_set_section_contents (output_bfd, sec->output_section,
13586 edited_contents,
13587 (file_ptr) sec->output_offset, sec->size);
13588
13589 return TRUE;
13590 }
13591
48229727
JB		 13592 /* Fix code to point to Cortex-A8 erratum stubs. */
13593 if (globals->fix_cortex_a8)
13594 {
13595 struct a8_branch_to_stub_data data;
13596
13597 data.writing_section = sec;
13598 data.contents = contents;
13599
13600 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13601 &data);
13602 }
13603
e489d0ae
PB		 13604 if (mapcount == 0)
13605 return FALSE;
13606
c7b8f16e 13607 if (globals->byteswap_code)
e489d0ae 13608 {
c7b8f16e 13609 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13610
c7b8f16e
JB		 13611 ptr = map[0].vma;
13612 for (i = 0; i < mapcount; i++)
13613 {
13614 if (i == mapcount - 1)
13615 end = sec->size;
13616 else
13617 end = map[i + 1].vma;
e489d0ae 13618
c7b8f16e 13619 switch (map[i].type)
e489d0ae 13620 {
c7b8f16e
JB		 13621 case 'a':
13622 /* Byte swap code words. */
13623 while (ptr + 3 < end)
13624 {
13625 tmp = contents[ptr];
13626 contents[ptr] = contents[ptr + 3];
13627 contents[ptr + 3] = tmp;
13628 tmp = contents[ptr + 1];
13629 contents[ptr + 1] = contents[ptr + 2];
13630 contents[ptr + 2] = tmp;
13631 ptr += 4;
13632 }
13633 break;
e489d0ae 13634
c7b8f16e
JB		 13635 case 't':
13636 /* Byte swap code halfwords. */
13637 while (ptr + 1 < end)
13638 {
13639 tmp = contents[ptr];
13640 contents[ptr] = contents[ptr + 1];
13641 contents[ptr + 1] = tmp;
13642 ptr += 2;
13643 }
13644 break;
13645
13646 case 'd':
13647 /* Leave data alone. */
13648 break;
13649 }
13650 ptr = end;
13651 }
e489d0ae 13652 }
8e3de13a 13653
93204d3a 13654 free (map);
8e3de13a 13655 arm_data->mapcount = 0;
c7b8f16e 13656 arm_data->mapsize = 0;
8e3de13a
NC		 13657 arm_data->map = NULL;
13658 unrecord_section_with_arm_elf_section_data (sec);
13659
e489d0ae
PB		 13660 return FALSE;
13661}
13662
957c6e41
NC		 13663static void
13664unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13665 asection * sec,
13666 void * ignore ATTRIBUTE_UNUSED)
13667{
13668 unrecord_section_with_arm_elf_section_data (sec);
13669}
13670
13671static bfd_boolean
13672elf32_arm_close_and_cleanup (bfd * abfd)
13673{
b25e3d87
L		 13674 if (abfd->sections)
13675 bfd_map_over_sections (abfd,
13676 unrecord_section_via_map_over_sections,
13677 NULL);
957c6e41
NC		 13678
13679 return _bfd_elf_close_and_cleanup (abfd);
13680}
13681
b25e3d87
L		 13682static bfd_boolean
13683elf32_arm_bfd_free_cached_info (bfd * abfd)
13684{
13685 if (abfd->sections)
13686 bfd_map_over_sections (abfd,
13687 unrecord_section_via_map_over_sections,
13688 NULL);
13689
13690 return _bfd_free_cached_info (abfd);
13691}
13692
b7693d02
DJ		 13693/* Display STT_ARM_TFUNC symbols as functions. */
13694
13695static void
13696elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13697 asymbol *asym)
13698{
13699 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13700
13701 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13702 elfsym->symbol.flags |= BSF_FUNCTION;
13703}
13704
0beaef2b
PB		 13705
13706/* Mangle thumb function symbols as we read them in. */
13707
8384fb8f 13708static bfd_boolean
0beaef2b
PB		 13709elf32_arm_swap_symbol_in (bfd * abfd,
13710 const void *psrc,
13711 const void *pshn,
13712 Elf_Internal_Sym *dst)
13713{
8384fb8f
AM		 13714 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13715 return FALSE;
0beaef2b
PB		 13716
13717 /* New EABI objects mark thumb function symbols by setting the low bit of
13718 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13719 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13720 && (dst->st_value & 1))
13721 {
13722 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13723 dst->st_value &= ~(bfd_vma) 1;
13724 }
8384fb8f 13725 return TRUE;
0beaef2b
PB		 13726}
13727
13728
13729/* Mangle thumb function symbols as we write them out. */
13730
13731static void
13732elf32_arm_swap_symbol_out (bfd *abfd,
13733 const Elf_Internal_Sym *src,
13734 void *cdst,
13735 void *shndx)
13736{
13737 Elf_Internal_Sym newsym;
13738
13739 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13740 of the address set, as per the new EABI. We do this unconditionally
13741 because objcopy does not set the elf header flags until after
13742 it writes out the symbol table. */
13743 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13744 {
13745 newsym = *src;
13746 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13747 if (newsym.st_shndx != SHN_UNDEF)
13748 {
13749 /* Do this only for defined symbols. At link type, the static
13750 linker will simulate the work of dynamic linker of resolving
13751 symbols and will carry over the thumbness of found symbols to
13752 the output symbol table. It's not clear how it happens, but
b0fead2b 13753 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13754 runtime, and writing '1' for them will be confusing for users
13755 and possibly for dynamic linker itself.
13756 */
13757 newsym.st_value |= 1;
13758 }
906e58ca 13759
0beaef2b
PB		 13760 src = &newsym;
13761 }
13762 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13763}
13764
b294bdf8
MM		 13765/* Add the PT_ARM_EXIDX program header. */
13766
13767static bfd_boolean
906e58ca 13768elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13769 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13770{
13771 struct elf_segment_map *m;
13772 asection *sec;
13773
13774 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13775 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13776 {
13777 /* If there is already a PT_ARM_EXIDX header, then we do not
13778 want to add another one. This situation arises when running
13779 "strip"; the input binary already has the header. */
13780 m = elf_tdata (abfd)->segment_map;
13781 while (m && m->p_type != PT_ARM_EXIDX)
13782 m = m->next;
13783 if (!m)
13784 {
13785 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13786 if (m == NULL)
13787 return FALSE;
13788 m->p_type = PT_ARM_EXIDX;
13789 m->count = 1;
13790 m->sections[0] = sec;
13791
13792 m->next = elf_tdata (abfd)->segment_map;
13793 elf_tdata (abfd)->segment_map = m;
13794 }
13795 }
13796
13797 return TRUE;
13798}
13799
13800/* We may add a PT_ARM_EXIDX program header. */
13801
13802static int
a6b96beb
AM		 13803elf32_arm_additional_program_headers (bfd *abfd,
13804 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13805{
13806 asection *sec;
13807
13808 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13809 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13810 return 1;
13811 else
13812 return 0;
13813}
13814
fcb93ecf 13815/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13816
fcb93ecf
PB		 13817static bfd_boolean
13818elf32_arm_is_function_type (unsigned int type)
13819{
0f88be7a 13820 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13821}
13822
0beaef2b 13823/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13824const struct elf_size_info elf32_arm_size_info =
13825{
0beaef2b
PB		 13826 sizeof (Elf32_External_Ehdr),
13827 sizeof (Elf32_External_Phdr),
13828 sizeof (Elf32_External_Shdr),
13829 sizeof (Elf32_External_Rel),
13830 sizeof (Elf32_External_Rela),
13831 sizeof (Elf32_External_Sym),
13832 sizeof (Elf32_External_Dyn),
13833 sizeof (Elf_External_Note),
13834 4,
13835 1,
13836 32, 2,
13837 ELFCLASS32, EV_CURRENT,
13838 bfd_elf32_write_out_phdrs,
13839 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13840 bfd_elf32_checksum_contents,
0beaef2b
PB		 13841 bfd_elf32_write_relocs,
13842 elf32_arm_swap_symbol_in,
13843 elf32_arm_swap_symbol_out,
13844 bfd_elf32_slurp_reloc_table,
13845 bfd_elf32_slurp_symbol_table,
13846 bfd_elf32_swap_dyn_in,
13847 bfd_elf32_swap_dyn_out,
13848 bfd_elf32_swap_reloc_in,
13849 bfd_elf32_swap_reloc_out,
13850 bfd_elf32_swap_reloca_in,
13851 bfd_elf32_swap_reloca_out
13852};
13853
252b5132
RH		 13854#define ELF_ARCH bfd_arch_arm
13855#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13856#ifdef __QNXTARGET__
13857#define ELF_MAXPAGESIZE 0x1000
13858#else
f21f3fe0 13859#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13860#endif
b1342370 13861#define ELF_MINPAGESIZE 0x1000
24718e3b 13862#define ELF_COMMONPAGESIZE 0x1000
252b5132 13863
ba93b8ac
DJ		 13864#define bfd_elf32_mkobject elf32_arm_mkobject
13865
99e4ae17
AJ		 13866#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13867#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13868#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13869#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13870#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13871#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13872#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13873#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13874#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13875#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13876#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13877#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13878#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13879#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13880#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13881
13882#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13883#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13884#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13885#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13886#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13887#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13888#define elf_backend_write_section elf32_arm_write_section
252b5132 13889#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13890#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13891#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13892#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13893#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13894#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13895#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13896#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13897#define elf_backend_object_p elf32_arm_object_p
e16bb312 13898#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13899#define elf_backend_fake_sections elf32_arm_fake_sections
13900#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13901#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13902#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13903#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13904#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13905#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13906#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13907#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13908#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13909#define elf_backend_is_function_type elf32_arm_is_function_type
13910
13911#define elf_backend_can_refcount 1
13912#define elf_backend_can_gc_sections 1
13913#define elf_backend_plt_readonly 1
13914#define elf_backend_want_got_plt 1
13915#define elf_backend_want_plt_sym 0
13916#define elf_backend_may_use_rel_p 1
13917#define elf_backend_may_use_rela_p 0
4e7fd91e 13918#define elf_backend_default_use_rela_p 0
252b5132 13919
04f7c78d 13920#define elf_backend_got_header_size 12
04f7c78d 13921
906e58ca
NC		 13922#undef elf_backend_obj_attrs_vendor
13923#define elf_backend_obj_attrs_vendor "aeabi"
13924#undef elf_backend_obj_attrs_section
13925#define elf_backend_obj_attrs_section ".ARM.attributes"
13926#undef elf_backend_obj_attrs_arg_type
13927#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13928#undef elf_backend_obj_attrs_section_type
104d59d1 13929#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13930#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13931
252b5132 13932#include "elf32-target.h"
7f266840 13933
906e58ca 13934/* VxWorks Targets. */
4e7fd91e 13935
906e58ca 13936#undef TARGET_LITTLE_SYM
4e7fd91e 13937#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13938#undef TARGET_LITTLE_NAME
4e7fd91e 13939#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13940#undef TARGET_BIG_SYM
4e7fd91e 13941#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13942#undef TARGET_BIG_NAME
4e7fd91e
PB		 13943#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13944
13945/* Like elf32_arm_link_hash_table_create -- but overrides
13946 appropriately for VxWorks. */
906e58ca 13947
4e7fd91e
PB		 13948static struct bfd_link_hash_table *
13949elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13950{
13951 struct bfd_link_hash_table *ret;
13952
13953 ret = elf32_arm_link_hash_table_create (abfd);
13954 if (ret)
13955 {
13956 struct elf32_arm_link_hash_table *htab
00a97672 13957 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13958 htab->use_rel = 0;
00a97672 13959 htab->vxworks_p = 1;
4e7fd91e
PB		 13960 }
13961 return ret;
906e58ca 13962}
4e7fd91e 13963
00a97672
RS		 13964static void
13965elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13966{
13967 elf32_arm_final_write_processing (abfd, linker);
13968 elf_vxworks_final_write_processing (abfd, linker);
13969}
13970
906e58ca 13971#undef elf32_bed
4e7fd91e
PB		 13972#define elf32_bed elf32_arm_vxworks_bed
13973
906e58ca
NC		 13974#undef bfd_elf32_bfd_link_hash_table_create
13975#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13976#undef elf_backend_add_symbol_hook
13977#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13978#undef elf_backend_final_write_processing
13979#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13980#undef elf_backend_emit_relocs
13981#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13982
906e58ca 13983#undef elf_backend_may_use_rel_p
00a97672 13984#define elf_backend_may_use_rel_p 0
906e58ca 13985#undef elf_backend_may_use_rela_p
00a97672 13986#define elf_backend_may_use_rela_p 1
906e58ca 13987#undef elf_backend_default_use_rela_p
00a97672 13988#define elf_backend_default_use_rela_p 1
906e58ca 13989#undef elf_backend_want_plt_sym
00a97672 13990#define elf_backend_want_plt_sym 1
906e58ca 13991#undef ELF_MAXPAGESIZE
00a97672 13992#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13993
13994#include "elf32-target.h"
13995
13996
906e58ca 13997/* Symbian OS Targets. */
7f266840 13998
906e58ca 13999#undef TARGET_LITTLE_SYM
7f266840 14000#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14001#undef TARGET_LITTLE_NAME
7f266840 14002#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14003#undef TARGET_BIG_SYM
7f266840 14004#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14005#undef TARGET_BIG_NAME
7f266840
DJ		 14006#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14007
14008/* Like elf32_arm_link_hash_table_create -- but overrides
14009 appropriately for Symbian OS. */
906e58ca 14010
7f266840
DJ		 14011static struct bfd_link_hash_table *
14012elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14013{
14014 struct bfd_link_hash_table *ret;
14015
14016 ret = elf32_arm_link_hash_table_create (abfd);
14017 if (ret)
14018 {
14019 struct elf32_arm_link_hash_table *htab
14020 = (struct elf32_arm_link_hash_table *)ret;
14021 /* There is no PLT header for Symbian OS. */
14022 htab->plt_header_size = 0;
95720a86
DJ		 14023 /* The PLT entries are each one instruction and one word. */
14024 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14025 htab->symbian_p = 1;
33bfe774
JB		 14026 /* Symbian uses armv5t or above, so use_blx is always true. */
14027 htab->use_blx = 1;
67687978 14028 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14029 }
14030 return ret;
906e58ca 14031}
7f266840 14032
b35d266b 14033static const struct bfd_elf_special_section
551b43fd 14034elf32_arm_symbian_special_sections[] =
7f266840 14035{
5cd3778d
MM		 14036 /* In a BPABI executable, the dynamic linking sections do not go in
14037 the loadable read-only segment. The post-linker may wish to
14038 refer to these sections, but they are not part of the final
14039 program image. */
0112cd26
NC		 14040 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14041 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14042 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14043 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14044 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14045 /* These sections do not need to be writable as the SymbianOS
14046 postlinker will arrange things so that no dynamic relocation is
14047 required. */
0112cd26
NC		 14048 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14049 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14050 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14051 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14052};
14053
c3c76620 14054static void
906e58ca 14055elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14056 struct bfd_link_info *link_info)
c3c76620
MM		 14057{
14058 /* BPABI objects are never loaded directly by an OS kernel; they are
14059 processed by a postlinker first, into an OS-specific format. If
14060 the D_PAGED bit is set on the file, BFD will align segments on
14061 page boundaries, so that an OS can directly map the file. With
14062 BPABI objects, that just results in wasted space. In addition,
14063 because we clear the D_PAGED bit, map_sections_to_segments will
14064 recognize that the program headers should not be mapped into any
14065 loadable segment. */
14066 abfd->flags &= ~D_PAGED;
906e58ca 14067 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14068}
7f266840
DJ		 14069
14070static bfd_boolean
906e58ca 14071elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14072 struct bfd_link_info *info)
7f266840
DJ		 14073{
14074 struct elf_segment_map *m;
14075 asection *dynsec;
14076
7f266840
DJ		 14077 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14078 segment. However, because the .dynamic section is not marked
14079 with SEC_LOAD, the generic ELF code will not create such a
14080 segment. */
14081 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14082 if (dynsec)
14083 {
8ded5a0f
AM		 14084 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14085 if (m->p_type == PT_DYNAMIC)
14086 break;
14087
14088 if (m == NULL)
14089 {
14090 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14091 m->next = elf_tdata (abfd)->segment_map;
14092 elf_tdata (abfd)->segment_map = m;
14093 }
7f266840
DJ		 14094 }
14095
b294bdf8
MM		 14096 /* Also call the generic arm routine. */
14097 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14098}
14099
95720a86
DJ		 14100/* Return address for Ith PLT stub in section PLT, for relocation REL
14101 or (bfd_vma) -1 if it should not be included. */
14102
14103static bfd_vma
14104elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14105 const arelent *rel ATTRIBUTE_UNUSED)
14106{
14107 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14108}
14109
14110
8029a119 14111#undef elf32_bed
7f266840
DJ		 14112#define elf32_bed elf32_arm_symbian_bed
14113
14114/* The dynamic sections are not allocated on SymbianOS; the postlinker
14115 will process them and then discard them. */
906e58ca 14116#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14117#define ELF_DYNAMIC_SEC_FLAGS \
14118 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14119
00a97672 14120#undef elf_backend_add_symbol_hook
00a97672 14121#undef elf_backend_emit_relocs
c3c76620 14122
906e58ca
NC		 14123#undef bfd_elf32_bfd_link_hash_table_create
14124#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14125#undef elf_backend_special_sections
14126#define elf_backend_special_sections elf32_arm_symbian_special_sections
14127#undef elf_backend_begin_write_processing
14128#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14129#undef elf_backend_final_write_processing
14130#define elf_backend_final_write_processing elf32_arm_final_write_processing
14131
14132#undef elf_backend_modify_segment_map
7f266840
DJ		 14133#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14134
14135/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14136#undef elf_backend_got_header_size
7f266840
DJ		 14137#define elf_backend_got_header_size 0
14138
14139/* Similarly, there is no .got.plt section. */
906e58ca 14140#undef elf_backend_want_got_plt
7f266840
DJ		 14141#define elf_backend_want_got_plt 0
14142
906e58ca 14143#undef elf_backend_plt_sym_val
95720a86
DJ		 14144#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14145
906e58ca 14146#undef elf_backend_may_use_rel_p
00a97672 14147#define elf_backend_may_use_rel_p 1
906e58ca 14148#undef elf_backend_may_use_rela_p
00a97672 14149#define elf_backend_may_use_rela_p 0
906e58ca 14150#undef elf_backend_default_use_rela_p
00a97672 14151#define elf_backend_default_use_rela_p 0
906e58ca 14152#undef elf_backend_want_plt_sym
00a97672 14153#define elf_backend_want_plt_sym 0
906e58ca 14154#undef ELF_MAXPAGESIZE
00a97672 14155#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14156
7f266840 14157#include "elf32-target.h"
GDB Binutils - Deliverables
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