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GDB hangs when attaching to process on mips-irix.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 225 25, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1724 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1725 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1726 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1727 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1728 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1729 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1730 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1731 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1732 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1733 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1734 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1735 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1736 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1737 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1738 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1739 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1740 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1741 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1742 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1743 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1744 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1745 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1746 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1747 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1748 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1750 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1751 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1752 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1754 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1755 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1756 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1757 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1758 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1759 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1760 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1761 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1762 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1763 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1764 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1765 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1766 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1768 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1769 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1770 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1771 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1772 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1773 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1774 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1775 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1776 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1777 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1778 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1779 };
1780
1781static reloc_howto_type *
f1c71a59
ZW		 1782elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1783 bfd_reloc_code_real_type code)
7f266840
DJ		 1784{
1785 unsigned int i;
8029a119 1786
906e58ca 1787 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1788 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1789 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1790
c19d1205 1791 return NULL;
7f266840
DJ		 1792}
1793
157090f7
AM		 1794static reloc_howto_type *
1795elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1796 const char *r_name)
1797{
1798 unsigned int i;
1799
906e58ca 1800 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1801 if (elf32_arm_howto_table_1[i].name != NULL
1802 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1803 return &elf32_arm_howto_table_1[i];
1804
906e58ca 1805 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1806 if (elf32_arm_howto_table_2[i].name != NULL
1807 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1808 return &elf32_arm_howto_table_2[i];
1809
1810 return NULL;
1811}
1812
906e58ca
NC		 1813/* Support for core dump NOTE sections. */
1814
7f266840 1815static bfd_boolean
f1c71a59 1816elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1817{
1818 int offset;
1819 size_t size;
1820
1821 switch (note->descsz)
1822 {
1823 default:
1824 return FALSE;
1825
8029a119 1826 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1827 /* pr_cursig */
1828 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1829
1830 /* pr_pid */
1831 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1832
1833 /* pr_reg */
1834 offset = 72;
1835 size = 72;
1836
1837 break;
1838 }
1839
1840 /* Make a ".reg/999" section. */
1841 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1842 size, note->descpos + offset);
1843}
1844
1845static bfd_boolean
f1c71a59 1846elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1847{
1848 switch (note->descsz)
1849 {
1850 default:
1851 return FALSE;
1852
8029a119 1853 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1854 elf_tdata (abfd)->core_program
1855 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1856 elf_tdata (abfd)->core_command
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1858 }
1859
1860 /* Note that for some reason, a spurious space is tacked
1861 onto the end of the args in some (at least one anyway)
1862 implementations, so strip it off if it exists. */
7f266840
DJ		 1863 {
1864 char *command = elf_tdata (abfd)->core_command;
1865 int n = strlen (command);
1866
1867 if (0 < n && command[n - 1] == ' ')
1868 command[n - 1] = '\0';
1869 }
1870
1871 return TRUE;
1872}
1873
1874#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1875#define TARGET_LITTLE_NAME "elf32-littlearm"
1876#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1877#define TARGET_BIG_NAME "elf32-bigarm"
1878
1879#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1880#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1881
252b5132
RH		 1882typedef unsigned long int insn32;
1883typedef unsigned short int insn16;
1884
3a4a14e9
PB		 1885/* In lieu of proper flags, assume all EABIv4 or later objects are
1886 interworkable. */
57e8b36a 1887#define INTERWORK_FLAG(abfd) \
3a4a14e9 1888 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1889 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1890 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1891
252b5132
RH		 1892/* The linker script knows the section names for placement.
1893 The entry_names are used to do simple name mangling on the stubs.
1894 Given a function name, and its type, the stub can be found. The
9b485d32 1895 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1896#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1897#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1898
1899#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1900#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1901
c7b8f16e
JB		 1902#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1903#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1904
845b51d6
PB		 1905#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1906#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1907
7413f23f
DJ		 1908#define STUB_ENTRY_NAME "__%s_veneer"
1909
252b5132
RH		 1910/* The name of the dynamic interpreter. This is put in the .interp
1911 section. */
1912#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1913
5e681ec4
PB		 1914#ifdef FOUR_WORD_PLT
1915
252b5132
RH		 1916/* The first entry in a procedure linkage table looks like
1917 this. It is set up so that any shared library function that is
59f2c4e7 1918 called before the relocation has been set up calls the dynamic
9b485d32 1919 linker first. */
e5a52504 1920static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1921 {
1922 0xe52de004, /* str lr, [sp, #-4]! */
1923 0xe59fe010, /* ldr lr, [pc, #16] */
1924 0xe08fe00e, /* add lr, pc, lr */
1925 0xe5bef008, /* ldr pc, [lr, #8]! */
1926 };
1927
1928/* Subsequent entries in a procedure linkage table look like
1929 this. */
e5a52504 1930static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1931 {
1932 0xe28fc600, /* add ip, pc, #NN */
1933 0xe28cca00, /* add ip, ip, #NN */
1934 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1935 0x00000000, /* unused */
1936 };
1937
1938#else
1939
5e681ec4
PB		 1940/* The first entry in a procedure linkage table looks like
1941 this. It is set up so that any shared library function that is
1942 called before the relocation has been set up calls the dynamic
1943 linker first. */
e5a52504 1944static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1945 {
5e681ec4
PB		 1946 0xe52de004, /* str lr, [sp, #-4]! */
1947 0xe59fe004, /* ldr lr, [pc, #4] */
1948 0xe08fe00e, /* add lr, pc, lr */
1949 0xe5bef008, /* ldr pc, [lr, #8]! */
1950 0x00000000, /* &GOT[0] - . */
917583ad 1951 };
252b5132
RH		 1952
1953/* Subsequent entries in a procedure linkage table look like
1954 this. */
e5a52504 1955static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1956 {
1957 0xe28fc600, /* add ip, pc, #0xNN00000 */
1958 0xe28cca00, /* add ip, ip, #0xNN000 */
1959 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1960 };
1961
1962#endif
252b5132 1963
00a97672
RS		 1964/* The format of the first entry in the procedure linkage table
1965 for a VxWorks executable. */
1966static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1967 {
1968 0xe52dc008, /* str ip,[sp,#-8]! */
1969 0xe59fc000, /* ldr ip,[pc] */
1970 0xe59cf008, /* ldr pc,[ip,#8] */
1971 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1972 };
1973
1974/* The format of subsequent entries in a VxWorks executable. */
1975static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1976 {
1977 0xe59fc000, /* ldr ip,[pc] */
1978 0xe59cf000, /* ldr pc,[ip] */
1979 0x00000000, /* .long @got */
1980 0xe59fc000, /* ldr ip,[pc] */
1981 0xea000000, /* b _PLT */
1982 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1983 };
1984
1985/* The format of entries in a VxWorks shared library. */
1986static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1987 {
1988 0xe59fc000, /* ldr ip,[pc] */
1989 0xe79cf009, /* ldr pc,[ip,r9] */
1990 0x00000000, /* .long @got */
1991 0xe59fc000, /* ldr ip,[pc] */
1992 0xe599f008, /* ldr pc,[r9,#8] */
1993 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1994 };
1995
b7693d02
DJ		 1996/* An initial stub used if the PLT entry is referenced from Thumb code. */
1997#define PLT_THUMB_STUB_SIZE 4
1998static const bfd_vma elf32_arm_plt_thumb_stub [] =
1999 {
2000 0x4778, /* bx pc */
2001 0x46c0 /* nop */
2002 };
2003
e5a52504
MM		 2004/* The entries in a PLT when using a DLL-based target with multiple
2005 address spaces. */
906e58ca 2006static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2007 {
83a358aa 2008 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2009 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2010 };
2011
906e58ca
NC		 2012#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2013#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2014#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2015#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2016#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2017#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2018
461a49ca
DJ		 2019enum stub_insn_type
2020 {
2021 THUMB16_TYPE = 1,
2022 THUMB32_TYPE,
2023 ARM_TYPE,
2024 DATA_TYPE
2025 };
2026
48229727
JB		 2027#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2028/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2029 is inserted in arm_build_one_stub(). */
2030#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2031#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2032#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2033#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2034#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2035#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2036
2037typedef struct
2038{
2039 bfd_vma data;
2040 enum stub_insn_type type;
ebe24dd4 2041 unsigned int r_type;
461a49ca
DJ		 2042 int reloc_addend;
2043} insn_sequence;
2044
fea2b4d6
CL		 2045/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2046 to reach the stub if necessary. */
461a49ca 2047static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2048 {
461a49ca
DJ		 2049 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2050 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2051 };
2052
fea2b4d6
CL		 2053/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2054 available. */
461a49ca 2055static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2056 {
461a49ca
DJ		 2057 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2058 ARM_INSN(0xe12fff1c), /* bx ip */
2059 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2060 };
2061
d3626fb0 2062/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2063static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2064 {
461a49ca
DJ		 2065 THUMB16_INSN(0xb401), /* push {r0} */
2066 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2067 THUMB16_INSN(0x4684), /* mov ip, r0 */
2068 THUMB16_INSN(0xbc01), /* pop {r0} */
2069 THUMB16_INSN(0x4760), /* bx ip */
2070 THUMB16_INSN(0xbf00), /* nop */
2071 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2072 };
2073
d3626fb0
CL		 2074/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2075 allowed. */
2076static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2077 {
2078 THUMB16_INSN(0x4778), /* bx pc */
2079 THUMB16_INSN(0x46c0), /* nop */
2080 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2081 ARM_INSN(0xe12fff1c), /* bx ip */
2082 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2083 };
2084
fea2b4d6
CL		 2085/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2086 available. */
461a49ca 2087static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2088 {
461a49ca
DJ		 2089 THUMB16_INSN(0x4778), /* bx pc */
2090 THUMB16_INSN(0x46c0), /* nop */
2091 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2092 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2093 };
2094
fea2b4d6
CL		 2095/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2096 one, when the destination is close enough. */
461a49ca 2097static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2098 {
461a49ca
DJ		 2099 THUMB16_INSN(0x4778), /* bx pc */
2100 THUMB16_INSN(0x46c0), /* nop */
2101 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2102 };
2103
cf3eccff 2104/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2105 blx to reach the stub if necessary. */
cf3eccff 2106static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2107 {
461a49ca
DJ		 2108 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2109 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2110 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2111 };
2112
cf3eccff
DJ		 2113/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2114 blx to reach the stub if necessary. We can not add into pc;
2115 it is not guaranteed to mode switch (different in ARMv6 and
2116 ARMv7). */
2117static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2118 {
2119 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2120 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2121 ARM_INSN(0xe12fff1c), /* bx ip */
2122 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2123 };
2124
ebe24dd4
CL		 2125/* V4T ARM -> ARM long branch stub, PIC. */
2126static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2127 {
2128 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2129 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2130 ARM_INSN(0xe12fff1c), /* bx ip */
2131 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2132 };
2133
2134/* V4T Thumb -> ARM long branch stub, PIC. */
2135static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2136 {
2137 THUMB16_INSN(0x4778), /* bx pc */
2138 THUMB16_INSN(0x46c0), /* nop */
2139 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2140 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2141 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2142 };
2143
d3626fb0
CL		 2144/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2145 architectures. */
ebe24dd4
CL		 2146static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2147 {
2148 THUMB16_INSN(0xb401), /* push {r0} */
2149 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2150 THUMB16_INSN(0x46fc), /* mov ip, pc */
2151 THUMB16_INSN(0x4484), /* add ip, r0 */
2152 THUMB16_INSN(0xbc01), /* pop {r0} */
2153 THUMB16_INSN(0x4760), /* bx ip */
2154 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2155 };
2156
d3626fb0
CL		 2157/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2158 allowed. */
2159static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2160 {
2161 THUMB16_INSN(0x4778), /* bx pc */
2162 THUMB16_INSN(0x46c0), /* nop */
2163 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2164 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2165 ARM_INSN(0xe12fff1c), /* bx ip */
2166 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2167 };
2168
48229727
JB		 2169/* Cortex-A8 erratum-workaround stubs. */
2170
2171/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2172 can't use a conditional branch to reach this stub). */
2173
2174static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2175 {
2176 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2177 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2178 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2179 };
2180
2181/* Stub used for b.w and bl.w instructions. */
2182
2183static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2184 {
2185 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2186 };
2187
2188static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2189 {
2190 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2191 };
2192
2193/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2194 instruction (which switches to ARM mode) to point to this stub. Jump to the
2195 real destination using an ARM-mode branch. */
2196
2197static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2198 {
2199 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2200 };
2201
906e58ca
NC		 2202/* Section name for stubs is the associated section name plus this
2203 string. */
2204#define STUB_SUFFIX ".stub"
2205
738a79f6
CL		 2206/* One entry per long/short branch stub defined above. */
2207#define DEF_STUBS \
2208 DEF_STUB(long_branch_any_any) \
2209 DEF_STUB(long_branch_v4t_arm_thumb) \
2210 DEF_STUB(long_branch_thumb_only) \
2211 DEF_STUB(long_branch_v4t_thumb_thumb) \
2212 DEF_STUB(long_branch_v4t_thumb_arm) \
2213 DEF_STUB(short_branch_v4t_thumb_arm) \
2214 DEF_STUB(long_branch_any_arm_pic) \
2215 DEF_STUB(long_branch_any_thumb_pic) \
2216 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2219 DEF_STUB(long_branch_thumb_only_pic) \
2220 DEF_STUB(a8_veneer_b_cond) \
2221 DEF_STUB(a8_veneer_b) \
2222 DEF_STUB(a8_veneer_bl) \
2223 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2224
2225#define DEF_STUB(x) arm_stub_##x,
2226enum elf32_arm_stub_type {
906e58ca 2227 arm_stub_none,
738a79f6 2228 DEF_STUBS
eb7c4339
NS		 2229 /* Note the first a8_veneer type */
2230 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2231};
2232#undef DEF_STUB
2233
2234typedef struct
2235{
d3ce72d0 2236 const insn_sequence* template_sequence;
738a79f6
CL		 2237 int template_size;
2238} stub_def;
2239
2240#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2241static const stub_def stub_definitions[] = {
2242 {NULL, 0},
2243 DEF_STUBS
906e58ca
NC		 2244};
2245
2246struct elf32_arm_stub_hash_entry
2247{
2248 /* Base hash table entry structure. */
2249 struct bfd_hash_entry root;
2250
2251 /* The stub section. */
2252 asection *stub_sec;
2253
2254 /* Offset within stub_sec of the beginning of this stub. */
2255 bfd_vma stub_offset;
2256
2257 /* Given the symbol's value and its section we can determine its final
2258 value when building the stubs (so the stub knows where to jump). */
2259 bfd_vma target_value;
2260 asection *target_section;
2261
48229727
JB		 2262 /* Offset to apply to relocation referencing target_value. */
2263 bfd_vma target_addend;
2264
2265 /* The instruction which caused this stub to be generated (only valid for
2266 Cortex-A8 erratum workaround stubs at present). */
2267 unsigned long orig_insn;
2268
461a49ca 2269 /* The stub type. */
906e58ca 2270 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2271 /* Its encoding size in bytes. */
2272 int stub_size;
2273 /* Its template. */
2274 const insn_sequence *stub_template;
2275 /* The size of the template (number of entries). */
2276 int stub_template_size;
906e58ca
NC		 2277
2278 /* The symbol table entry, if any, that this was derived from. */
2279 struct elf32_arm_link_hash_entry *h;
2280
2281 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2282 unsigned char st_type;
2283
2284 /* Where this stub is being called from, or, in the case of combined
2285 stub sections, the first input section in the group. */
2286 asection *id_sec;
7413f23f
DJ		 2287
2288 /* The name for the local symbol at the start of this stub. The
2289 stub name in the hash table has to be unique; this does not, so
2290 it can be friendlier. */
2291 char *output_name;
906e58ca
NC		 2292};
2293
e489d0ae
PB		 2294/* Used to build a map of a section. This is required for mixed-endian
2295 code/data. */
2296
2297typedef struct elf32_elf_section_map
2298{
2299 bfd_vma vma;
2300 char type;
2301}
2302elf32_arm_section_map;
2303
c7b8f16e
JB		 2304/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2305
2306typedef enum
2307{
2308 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2309 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2310 VFP11_ERRATUM_ARM_VENEER,
2311 VFP11_ERRATUM_THUMB_VENEER
2312}
2313elf32_vfp11_erratum_type;
2314
2315typedef struct elf32_vfp11_erratum_list
2316{
2317 struct elf32_vfp11_erratum_list *next;
2318 bfd_vma vma;
2319 union
2320 {
2321 struct
2322 {
2323 struct elf32_vfp11_erratum_list *veneer;
2324 unsigned int vfp_insn;
2325 } b;
2326 struct
2327 {
2328 struct elf32_vfp11_erratum_list *branch;
2329 unsigned int id;
2330 } v;
2331 } u;
2332 elf32_vfp11_erratum_type type;
2333}
2334elf32_vfp11_erratum_list;
2335
2468f9c9
PB		 2336typedef enum
2337{
2338 DELETE_EXIDX_ENTRY,
2339 INSERT_EXIDX_CANTUNWIND_AT_END
2340}
2341arm_unwind_edit_type;
2342
2343/* A (sorted) list of edits to apply to an unwind table. */
2344typedef struct arm_unwind_table_edit
2345{
2346 arm_unwind_edit_type type;
2347 /* Note: we sometimes want to insert an unwind entry corresponding to a
2348 section different from the one we're currently writing out, so record the
2349 (text) section this edit relates to here. */
2350 asection *linked_section;
2351 unsigned int index;
2352 struct arm_unwind_table_edit *next;
2353}
2354arm_unwind_table_edit;
2355
8e3de13a 2356typedef struct _arm_elf_section_data
e489d0ae 2357{
2468f9c9 2358 /* Information about mapping symbols. */
e489d0ae 2359 struct bfd_elf_section_data elf;
8e3de13a 2360 unsigned int mapcount;
c7b8f16e 2361 unsigned int mapsize;
e489d0ae 2362 elf32_arm_section_map *map;
2468f9c9 2363 /* Information about CPU errata. */
c7b8f16e
JB		 2364 unsigned int erratumcount;
2365 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2366 /* Information about unwind tables. */
2367 union
2368 {
2369 /* Unwind info attached to a text section. */
2370 struct
2371 {
2372 asection *arm_exidx_sec;
2373 } text;
2374
2375 /* Unwind info attached to an .ARM.exidx section. */
2376 struct
2377 {
2378 arm_unwind_table_edit *unwind_edit_list;
2379 arm_unwind_table_edit *unwind_edit_tail;
2380 } exidx;
2381 } u;
8e3de13a
NC		 2382}
2383_arm_elf_section_data;
e489d0ae
PB		 2384
2385#define elf32_arm_section_data(sec) \
8e3de13a 2386 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2387
48229727
JB		 2388/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2389 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2390 so may be created multiple times: we use an array of these entries whilst
2391 relaxing which we can refresh easily, then create stubs for each potentially
2392 erratum-triggering instruction once we've settled on a solution. */
2393
2394struct a8_erratum_fix {
2395 bfd *input_bfd;
2396 asection *section;
2397 bfd_vma offset;
2398 bfd_vma addend;
2399 unsigned long orig_insn;
2400 char *stub_name;
2401 enum elf32_arm_stub_type stub_type;
2402};
2403
2404/* A table of relocs applied to branches which might trigger Cortex-A8
2405 erratum. */
2406
2407struct a8_erratum_reloc {
2408 bfd_vma from;
2409 bfd_vma destination;
2410 unsigned int r_type;
2411 unsigned char st_type;
2412 const char *sym_name;
2413 bfd_boolean non_a8_stub;
2414};
2415
ba93b8ac
DJ		 2416/* The size of the thread control block. */
2417#define TCB_SIZE 8
2418
0ffa91dd 2419struct elf_arm_obj_tdata
ba93b8ac
DJ		 2420{
2421 struct elf_obj_tdata root;
2422
2423 /* tls_type for each local got entry. */
2424 char *local_got_tls_type;
ee065d83 2425
bf21ed78
MS		 2426 /* Zero to warn when linking objects with incompatible enum sizes. */
2427 int no_enum_size_warning;
a9dc9481
JM		 2428
2429 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2430 int no_wchar_size_warning;
ba93b8ac
DJ		 2431};
2432
0ffa91dd
NC		 2433#define elf_arm_tdata(bfd) \
2434 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2435
0ffa91dd
NC		 2436#define elf32_arm_local_got_tls_type(bfd) \
2437 (elf_arm_tdata (bfd)->local_got_tls_type)
2438
2439#define is_arm_elf(bfd) \
2440 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2441 && elf_tdata (bfd) != NULL \
2442 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2443
2444static bfd_boolean
2445elf32_arm_mkobject (bfd *abfd)
2446{
0ffa91dd
NC		 2447 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2448 ARM_ELF_TDATA);
ba93b8ac
DJ		 2449}
2450
252b5132
RH		 2451/* The ARM linker needs to keep track of the number of relocs that it
2452 decides to copy in check_relocs for each symbol. This is so that
2453 it can discard PC relative relocs if it doesn't need them when
2454 linking with -Bsymbolic. We store the information in a field
2455 extending the regular ELF linker hash table. */
2456
ba93b8ac
DJ		 2457/* This structure keeps track of the number of relocs we have copied
2458 for a given symbol. */
5e681ec4 2459struct elf32_arm_relocs_copied
917583ad
NC		 2460 {
2461 /* Next section. */
5e681ec4 2462 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2463 /* A section in dynobj. */
2464 asection * section;
2465 /* Number of relocs copied in this section. */
2466 bfd_size_type count;
ba93b8ac
DJ		 2467 /* Number of PC-relative relocs copied in this section. */
2468 bfd_size_type pc_count;
917583ad 2469 };
252b5132 2470
ba93b8ac
DJ		 2471#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2472
ba96a88f 2473/* Arm ELF linker hash entry. */
252b5132 2474struct elf32_arm_link_hash_entry
917583ad
NC		 2475 {
2476 struct elf_link_hash_entry root;
252b5132 2477
917583ad 2478 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2479 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2480
2481 /* We reference count Thumb references to a PLT entry separately,
2482 so that we can emit the Thumb trampoline only if needed. */
2483 bfd_signed_vma plt_thumb_refcount;
2484
bd97cb95
DJ		 2485 /* Some references from Thumb code may be eliminated by BL->BLX
2486 conversion, so record them separately. */
2487 bfd_signed_vma plt_maybe_thumb_refcount;
2488
b7693d02
DJ		 2489 /* Since PLT entries have variable size if the Thumb prologue is
2490 used, we need to record the index into .got.plt instead of
2491 recomputing it from the PLT offset. */
2492 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2493
2494#define GOT_UNKNOWN 0
2495#define GOT_NORMAL 1
2496#define GOT_TLS_GD 2
2497#define GOT_TLS_IE 4
2498 unsigned char tls_type;
a4fd1a8e
PB		 2499
2500 /* The symbol marking the real symbol location for exported thumb
2501 symbols with Arm stubs. */
2502 struct elf_link_hash_entry *export_glue;
906e58ca 2503
da5938a2 2504 /* A pointer to the most recently used stub hash entry against this
8029a119 2505 symbol. */
da5938a2 2506 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2507 };
252b5132 2508
252b5132 2509/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2510#define elf32_arm_link_hash_traverse(table, func, info) \
2511 (elf_link_hash_traverse \
2512 (&(table)->root, \
b7693d02 2513 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2514 (info)))
2515
2516/* Get the ARM elf linker hash table from a link_info structure. */
2517#define elf32_arm_hash_table(info) \
2518 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2519
906e58ca
NC		 2520#define arm_stub_hash_lookup(table, string, create, copy) \
2521 ((struct elf32_arm_stub_hash_entry *) \
2522 bfd_hash_lookup ((table), (string), (create), (copy)))
2523
21d799b5
NC		 2524/* Array to keep track of which stub sections have been created, and
2525 information on stub grouping. */
2526struct map_stub
2527{
2528 /* This is the section to which stubs in the group will be
2529 attached. */
2530 asection *link_sec;
2531 /* The stub section. */
2532 asection *stub_sec;
2533};
2534
9b485d32 2535/* ARM ELF linker hash table. */
252b5132 2536struct elf32_arm_link_hash_table
906e58ca
NC		 2537{
2538 /* The main hash table. */
2539 struct elf_link_hash_table root;
252b5132 2540
906e58ca
NC		 2541 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2542 bfd_size_type thumb_glue_size;
252b5132 2543
906e58ca
NC		 2544 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2545 bfd_size_type arm_glue_size;
252b5132 2546
906e58ca
NC		 2547 /* The size in bytes of section containing the ARMv4 BX veneers. */
2548 bfd_size_type bx_glue_size;
845b51d6 2549
906e58ca
NC		 2550 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2551 veneer has been populated. */
2552 bfd_vma bx_glue_offset[15];
845b51d6 2553
906e58ca
NC		 2554 /* The size in bytes of the section containing glue for VFP11 erratum
2555 veneers. */
2556 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2557
48229727
JB		 2558 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2559 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2560 elf32_arm_write_section(). */
2561 struct a8_erratum_fix *a8_erratum_fixes;
2562 unsigned int num_a8_erratum_fixes;
2563
906e58ca
NC		 2564 /* An arbitrary input BFD chosen to hold the glue sections. */
2565 bfd * bfd_of_glue_owner;
ba96a88f 2566
906e58ca
NC		 2567 /* Nonzero to output a BE8 image. */
2568 int byteswap_code;
e489d0ae 2569
906e58ca
NC		 2570 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2571 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2572 int target1_is_rel;
9c504268 2573
906e58ca
NC		 2574 /* The relocation to use for R_ARM_TARGET2 relocations. */
2575 int target2_reloc;
eb043451 2576
906e58ca
NC		 2577 /* 0 = Ignore R_ARM_V4BX.
2578 1 = Convert BX to MOV PC.
2579 2 = Generate v4 interworing stubs. */
2580 int fix_v4bx;
319850b4 2581
48229727
JB		 2582 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2583 int fix_cortex_a8;
2584
906e58ca
NC		 2585 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2586 int use_blx;
33bfe774 2587
906e58ca
NC		 2588 /* What sort of code sequences we should look for which may trigger the
2589 VFP11 denorm erratum. */
2590 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2591
906e58ca
NC		 2592 /* Global counter for the number of fixes we have emitted. */
2593 int num_vfp11_fixes;
c7b8f16e 2594
906e58ca
NC		 2595 /* Nonzero to force PIC branch veneers. */
2596 int pic_veneer;
27e55c4d 2597
906e58ca
NC		 2598 /* The number of bytes in the initial entry in the PLT. */
2599 bfd_size_type plt_header_size;
e5a52504 2600
906e58ca
NC		 2601 /* The number of bytes in the subsequent PLT etries. */
2602 bfd_size_type plt_entry_size;
e5a52504 2603
906e58ca
NC		 2604 /* True if the target system is VxWorks. */
2605 int vxworks_p;
00a97672 2606
906e58ca
NC		 2607 /* True if the target system is Symbian OS. */
2608 int symbian_p;
e5a52504 2609
906e58ca
NC		 2610 /* True if the target uses REL relocations. */
2611 int use_rel;
4e7fd91e 2612
906e58ca
NC		 2613 /* Short-cuts to get to dynamic linker sections. */
2614 asection *sgot;
2615 asection *sgotplt;
2616 asection *srelgot;
2617 asection *splt;
2618 asection *srelplt;
2619 asection *sdynbss;
2620 asection *srelbss;
5e681ec4 2621
906e58ca
NC		 2622 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2623 asection *srelplt2;
00a97672 2624
906e58ca
NC		 2625 /* Data for R_ARM_TLS_LDM32 relocations. */
2626 union
2627 {
2628 bfd_signed_vma refcount;
2629 bfd_vma offset;
2630 } tls_ldm_got;
b7693d02 2631
87d72d41
AM		 2632 /* Small local sym cache. */
2633 struct sym_cache sym_cache;
906e58ca
NC		 2634
2635 /* For convenience in allocate_dynrelocs. */
2636 bfd * obfd;
2637
2638 /* The stub hash table. */
2639 struct bfd_hash_table stub_hash_table;
2640
2641 /* Linker stub bfd. */
2642 bfd *stub_bfd;
2643
2644 /* Linker call-backs. */
2645 asection * (*add_stub_section) (const char *, asection *);
2646 void (*layout_sections_again) (void);
2647
2648 /* Array to keep track of which stub sections have been created, and
2649 information on stub grouping. */
21d799b5 2650 struct map_stub *stub_group;
906e58ca
NC		 2651
2652 /* Assorted information used by elf32_arm_size_stubs. */
2653 unsigned int bfd_count;
2654 int top_index;
2655 asection **input_list;
2656};
252b5132 2657
780a67af
NC		 2658/* Create an entry in an ARM ELF linker hash table. */
2659
2660static struct bfd_hash_entry *
57e8b36a
NC		 2661elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2662 struct bfd_hash_table * table,
2663 const char * string)
780a67af
NC		 2664{
2665 struct elf32_arm_link_hash_entry * ret =
2666 (struct elf32_arm_link_hash_entry *) entry;
2667
2668 /* Allocate the structure if it has not already been allocated by a
2669 subclass. */
906e58ca 2670 if (ret == NULL)
21d799b5
NC		 2671 ret = (struct elf32_arm_link_hash_entry *)
2672 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2673 if (ret == NULL)
780a67af
NC		 2674 return (struct bfd_hash_entry *) ret;
2675
2676 /* Call the allocation method of the superclass. */
2677 ret = ((struct elf32_arm_link_hash_entry *)
2678 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2679 table, string));
57e8b36a 2680 if (ret != NULL)
b7693d02
DJ		 2681 {
2682 ret->relocs_copied = NULL;
ba93b8ac 2683 ret->tls_type = GOT_UNKNOWN;
b7693d02 2684 ret->plt_thumb_refcount = 0;
bd97cb95 2685 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2686 ret->plt_got_offset = -1;
a4fd1a8e 2687 ret->export_glue = NULL;
906e58ca
NC		 2688
2689 ret->stub_cache = NULL;
b7693d02 2690 }
780a67af
NC		 2691
2692 return (struct bfd_hash_entry *) ret;
2693}
2694
906e58ca
NC		 2695/* Initialize an entry in the stub hash table. */
2696
2697static struct bfd_hash_entry *
2698stub_hash_newfunc (struct bfd_hash_entry *entry,
2699 struct bfd_hash_table *table,
2700 const char *string)
2701{
2702 /* Allocate the structure if it has not already been allocated by a
2703 subclass. */
2704 if (entry == NULL)
2705 {
21d799b5
NC		 2706 entry = (struct bfd_hash_entry *)
2707 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2708 if (entry == NULL)
2709 return entry;
2710 }
2711
2712 /* Call the allocation method of the superclass. */
2713 entry = bfd_hash_newfunc (entry, table, string);
2714 if (entry != NULL)
2715 {
2716 struct elf32_arm_stub_hash_entry *eh;
2717
2718 /* Initialize the local fields. */
2719 eh = (struct elf32_arm_stub_hash_entry *) entry;
2720 eh->stub_sec = NULL;
2721 eh->stub_offset = 0;
2722 eh->target_value = 0;
2723 eh->target_section = NULL;
cedfb179
DK		 2724 eh->target_addend = 0;
2725 eh->orig_insn = 0;
906e58ca 2726 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2727 eh->stub_size = 0;
2728 eh->stub_template = NULL;
2729 eh->stub_template_size = 0;
906e58ca
NC		 2730 eh->h = NULL;
2731 eh->id_sec = NULL;
d8d2f433 2732 eh->output_name = NULL;
906e58ca
NC		 2733 }
2734
2735 return entry;
2736}
2737
00a97672 2738/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2739 shortcuts to them in our hash table. */
2740
2741static bfd_boolean
57e8b36a 2742create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2743{
2744 struct elf32_arm_link_hash_table *htab;
2745
e5a52504
MM		 2746 htab = elf32_arm_hash_table (info);
2747 /* BPABI objects never have a GOT, or associated sections. */
2748 if (htab->symbian_p)
2749 return TRUE;
2750
5e681ec4
PB		 2751 if (! _bfd_elf_create_got_section (dynobj, info))
2752 return FALSE;
2753
5e681ec4
PB		 2754 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2755 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2756 if (!htab->sgot || !htab->sgotplt)
2757 abort ();
2758
64e77c6d
L		 2759 htab->srelgot = bfd_get_section_by_name (dynobj,
2760 RELOC_SECTION (htab, ".got"));
2761 if (htab->srelgot == NULL)
5e681ec4
PB		 2762 return FALSE;
2763 return TRUE;
2764}
2765
00a97672
RS		 2766/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2767 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2768 hash table. */
2769
2770static bfd_boolean
57e8b36a 2771elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2772{
2773 struct elf32_arm_link_hash_table *htab;
2774
2775 htab = elf32_arm_hash_table (info);
2776 if (!htab->sgot && !create_got_section (dynobj, info))
2777 return FALSE;
2778
2779 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2780 return FALSE;
2781
2782 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2783 htab->srelplt = bfd_get_section_by_name (dynobj,
2784 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2785 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2786 if (!info->shared)
00a97672
RS		 2787 htab->srelbss = bfd_get_section_by_name (dynobj,
2788 RELOC_SECTION (htab, ".bss"));
2789
2790 if (htab->vxworks_p)
2791 {
2792 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2793 return FALSE;
2794
2795 if (info->shared)
2796 {
2797 htab->plt_header_size = 0;
2798 htab->plt_entry_size
2799 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2800 }
2801 else
2802 {
2803 htab->plt_header_size
2804 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2805 htab->plt_entry_size
2806 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2807 }
2808 }
5e681ec4 2809
906e58ca 2810 if (!htab->splt
e5a52504
MM		 2811 || !htab->srelplt
2812 || !htab->sdynbss
5e681ec4
PB		 2813 || (!info->shared && !htab->srelbss))
2814 abort ();
2815
2816 return TRUE;
2817}
2818
906e58ca
NC		 2819/* Copy the extra info we tack onto an elf_link_hash_entry. */
2820
2821static void
2822elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2823 struct elf_link_hash_entry *dir,
2824 struct elf_link_hash_entry *ind)
2825{
2826 struct elf32_arm_link_hash_entry *edir, *eind;
2827
2828 edir = (struct elf32_arm_link_hash_entry *) dir;
2829 eind = (struct elf32_arm_link_hash_entry *) ind;
2830
2831 if (eind->relocs_copied != NULL)
2832 {
2833 if (edir->relocs_copied != NULL)
2834 {
2835 struct elf32_arm_relocs_copied **pp;
2836 struct elf32_arm_relocs_copied *p;
2837
2838 /* Add reloc counts against the indirect sym to the direct sym
2839 list. Merge any entries against the same section. */
2840 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2841 {
2842 struct elf32_arm_relocs_copied *q;
2843
2844 for (q = edir->relocs_copied; q != NULL; q = q->next)
2845 if (q->section == p->section)
2846 {
2847 q->pc_count += p->pc_count;
2848 q->count += p->count;
2849 *pp = p->next;
2850 break;
2851 }
2852 if (q == NULL)
2853 pp = &p->next;
2854 }
2855 *pp = edir->relocs_copied;
2856 }
2857
2858 edir->relocs_copied = eind->relocs_copied;
2859 eind->relocs_copied = NULL;
2860 }
2861
2862 if (ind->root.type == bfd_link_hash_indirect)
2863 {
2864 /* Copy over PLT info. */
2865 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2866 eind->plt_thumb_refcount = 0;
2867 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2868 eind->plt_maybe_thumb_refcount = 0;
2869
2870 if (dir->got.refcount <= 0)
2871 {
2872 edir->tls_type = eind->tls_type;
2873 eind->tls_type = GOT_UNKNOWN;
2874 }
2875 }
2876
2877 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2878}
2879
2880/* Create an ARM elf linker hash table. */
2881
2882static struct bfd_link_hash_table *
2883elf32_arm_link_hash_table_create (bfd *abfd)
2884{
2885 struct elf32_arm_link_hash_table *ret;
2886 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2887
21d799b5 2888 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2889 if (ret == NULL)
2890 return NULL;
2891
2892 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2893 elf32_arm_link_hash_newfunc,
2894 sizeof (struct elf32_arm_link_hash_entry)))
2895 {
2896 free (ret);
2897 return NULL;
2898 }
2899
2900 ret->sgot = NULL;
2901 ret->sgotplt = NULL;
2902 ret->srelgot = NULL;
2903 ret->splt = NULL;
2904 ret->srelplt = NULL;
2905 ret->sdynbss = NULL;
2906 ret->srelbss = NULL;
2907 ret->srelplt2 = NULL;
2908 ret->thumb_glue_size = 0;
2909 ret->arm_glue_size = 0;
2910 ret->bx_glue_size = 0;
2911 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2912 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2913 ret->vfp11_erratum_glue_size = 0;
2914 ret->num_vfp11_fixes = 0;
48229727 2915 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2916 ret->bfd_of_glue_owner = NULL;
2917 ret->byteswap_code = 0;
2918 ret->target1_is_rel = 0;
2919 ret->target2_reloc = R_ARM_NONE;
2920#ifdef FOUR_WORD_PLT
2921 ret->plt_header_size = 16;
2922 ret->plt_entry_size = 16;
2923#else
2924 ret->plt_header_size = 20;
2925 ret->plt_entry_size = 12;
2926#endif
2927 ret->fix_v4bx = 0;
2928 ret->use_blx = 0;
2929 ret->vxworks_p = 0;
2930 ret->symbian_p = 0;
2931 ret->use_rel = 1;
87d72d41 2932 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2933 ret->obfd = abfd;
2934 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2935 ret->stub_bfd = NULL;
2936 ret->add_stub_section = NULL;
2937 ret->layout_sections_again = NULL;
2938 ret->stub_group = NULL;
2939 ret->bfd_count = 0;
2940 ret->top_index = 0;
2941 ret->input_list = NULL;
906e58ca
NC		 2942
2943 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2944 sizeof (struct elf32_arm_stub_hash_entry)))
2945 {
2946 free (ret);
2947 return NULL;
2948 }
2949
2950 return &ret->root.root;
2951}
2952
2953/* Free the derived linker hash table. */
2954
2955static void
2956elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2957{
2958 struct elf32_arm_link_hash_table *ret
2959 = (struct elf32_arm_link_hash_table *) hash;
2960
2961 bfd_hash_table_free (&ret->stub_hash_table);
2962 _bfd_generic_link_hash_table_free (hash);
2963}
2964
2965/* Determine if we're dealing with a Thumb only architecture. */
2966
2967static bfd_boolean
2968using_thumb_only (struct elf32_arm_link_hash_table *globals)
2969{
2970 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2971 Tag_CPU_arch);
2972 int profile;
2973
9e3c6df6 2974 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2975 return FALSE;
2976
2977 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2978 Tag_CPU_arch_profile);
2979
2980 return profile == 'M';
2981}
2982
2983/* Determine if we're dealing with a Thumb-2 object. */
2984
2985static bfd_boolean
2986using_thumb2 (struct elf32_arm_link_hash_table *globals)
2987{
2988 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2989 Tag_CPU_arch);
2990 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2991}
2992
cd1dac3d
DG		 2993/* Determine what kind of NOPs are available. */
2994
2995static bfd_boolean
2996arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
2997{
2998 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2999 Tag_CPU_arch);
3000 return arch == TAG_CPU_ARCH_V6T2
3001 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3002 || arch == TAG_CPU_ARCH_V7
3003 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3004}
3005
3006static bfd_boolean
3007arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3008{
3009 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3010 Tag_CPU_arch);
9e3c6df6
PB		 3011 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3012 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3013}
3014
f4ac8484
DJ		 3015static bfd_boolean
3016arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3017{
3018 switch (stub_type)
3019 {
fea2b4d6
CL		 3020 case arm_stub_long_branch_thumb_only:
3021 case arm_stub_long_branch_v4t_thumb_arm:
3022 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3023 case arm_stub_long_branch_v4t_thumb_arm_pic:
3024 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3025 return TRUE;
3026 case arm_stub_none:
3027 BFD_FAIL ();
3028 return FALSE;
3029 break;
3030 default:
3031 return FALSE;
3032 }
3033}
3034
906e58ca
NC		 3035/* Determine the type of stub needed, if any, for a call. */
3036
3037static enum elf32_arm_stub_type
3038arm_type_of_stub (struct bfd_link_info *info,
3039 asection *input_sec,
3040 const Elf_Internal_Rela *rel,
3041 unsigned char st_type,
3042 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3043 bfd_vma destination,
3044 asection *sym_sec,
3045 bfd *input_bfd,
3046 const char *name)
906e58ca
NC		 3047{
3048 bfd_vma location;
3049 bfd_signed_vma branch_offset;
3050 unsigned int r_type;
3051 struct elf32_arm_link_hash_table * globals;
3052 int thumb2;
3053 int thumb_only;
3054 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3055 int use_plt = 0;
906e58ca 3056
da5938a2 3057 /* We don't know the actual type of destination in case it is of
8029a119 3058 type STT_SECTION: give up. */
da5938a2
NC		 3059 if (st_type == STT_SECTION)
3060 return stub_type;
3061
906e58ca
NC		 3062 globals = elf32_arm_hash_table (info);
3063
3064 thumb_only = using_thumb_only (globals);
3065
3066 thumb2 = using_thumb2 (globals);
3067
3068 /* Determine where the call point is. */
3069 location = (input_sec->output_offset
3070 + input_sec->output_section->vma
3071 + rel->r_offset);
3072
3073 branch_offset = (bfd_signed_vma)(destination - location);
3074
3075 r_type = ELF32_R_TYPE (rel->r_info);
3076
5fa9e92f 3077 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3078 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3079 {
3080 use_plt = 1;
3081 /* Note when dealing with PLT entries: the main PLT stub is in
3082 ARM mode, so if the branch is in Thumb mode, another
3083 Thumb->ARM stub will be inserted later just before the ARM
3084 PLT stub. We don't take this extra distance into account
3085 here, because if a long branch stub is needed, we'll add a
3086 Thumb->Arm one and branch directly to the ARM PLT entry
3087 because it avoids spreading offset corrections in several
3088 places. */
3089 }
906e58ca 3090
155d87d7 3091 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3092 {
5fa9e92f
CL		 3093 /* Handle cases where:
3094 - this call goes too far (different Thumb/Thumb2 max
3095 distance)
155d87d7
CL		 3096 - it's a Thumb->Arm call and blx is not available, or it's a
3097 Thumb->Arm branch (not bl). A stub is needed in this case,
3098 but only if this call is not through a PLT entry. Indeed,
3099 PLT stubs handle mode switching already.
5fa9e92f 3100 */
906e58ca
NC		 3101 if ((!thumb2
3102 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3103 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3104 || (thumb2
3105 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3106 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3107 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3108 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3109 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3110 && !use_plt))
906e58ca
NC		 3111 {
3112 if (st_type == STT_ARM_TFUNC)
3113 {
3114 /* Thumb to thumb. */
3115 if (!thumb_only)
3116 {
3117 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3118 /* PIC stubs. */
155d87d7
CL		 3119 ? ((globals->use_blx
3120 && (r_type ==R_ARM_THM_CALL))
3121 /* V5T and above. Stub starts with ARM code, so
3122 we must be able to switch mode before
3123 reaching it, which is only possible for 'bl'
3124 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3125 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3126 /* On V4T, use Thumb code only. */
d3626fb0 3127 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3128
3129 /* non-PIC stubs. */
155d87d7
CL		 3130 : ((globals->use_blx
3131 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3132 /* V5T and above. */
3133 ? arm_stub_long_branch_any_any
3134 /* V4T. */
d3626fb0 3135 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3136 }
3137 else
3138 {
3139 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3140 /* PIC stub. */
3141 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3142 /* non-PIC stub. */
3143 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3144 }
3145 }
3146 else
3147 {
3148 /* Thumb to arm. */
c820be07
NC		 3149 if (sym_sec != NULL
3150 && sym_sec->owner != NULL
3151 && !INTERWORK_FLAG (sym_sec->owner))
3152 {
3153 (*_bfd_error_handler)
3154 (_("%B(%s): warning: interworking not enabled.\n"
3155 " first occurrence: %B: Thumb call to ARM"),
3156 sym_sec->owner, input_bfd, name);
3157 }
3158
906e58ca 3159 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3160 /* PIC stubs. */
155d87d7
CL		 3161 ? ((globals->use_blx
3162 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3163 /* V5T and above. */
cf3eccff 3164 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3165 /* V4T PIC stub. */
3166 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3167
3168 /* non-PIC stubs. */
155d87d7
CL		 3169 : ((globals->use_blx
3170 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3171 /* V5T and above. */
3172 ? arm_stub_long_branch_any_any
3173 /* V4T. */
3174 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3175
3176 /* Handle v4t short branches. */
fea2b4d6 3177 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3178 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3179 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3180 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3181 }
3182 }
3183 }
155d87d7 3184 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3185 {
3186 if (st_type == STT_ARM_TFUNC)
3187 {
3188 /* Arm to thumb. */
c820be07
NC		 3189
3190 if (sym_sec != NULL
3191 && sym_sec->owner != NULL
3192 && !INTERWORK_FLAG (sym_sec->owner))
3193 {
3194 (*_bfd_error_handler)
3195 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3196 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3197 sym_sec->owner, input_bfd, name);
3198 }
3199
3200 /* We have an extra 2-bytes reach because of
3201 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3202 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3203 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3204 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3205 || (r_type == R_ARM_JUMP24)
3206 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3207 {
3208 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3209 /* PIC stubs. */
ebe24dd4
CL		 3210 ? ((globals->use_blx)
3211 /* V5T and above. */
3212 ? arm_stub_long_branch_any_thumb_pic
3213 /* V4T stub. */
3214 : arm_stub_long_branch_v4t_arm_thumb_pic)
3215
c2b4a39d
CL		 3216 /* non-PIC stubs. */
3217 : ((globals->use_blx)
3218 /* V5T and above. */
3219 ? arm_stub_long_branch_any_any
3220 /* V4T. */
3221 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3222 }
3223 }
3224 else
3225 {
3226 /* Arm to arm. */
3227 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3228 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3229 {
3230 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3231 /* PIC stubs. */
cf3eccff 3232 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3233 /* non-PIC stubs. */
fea2b4d6 3234 : arm_stub_long_branch_any_any;
906e58ca
NC		 3235 }
3236 }
3237 }
3238
3239 return stub_type;
3240}
3241
3242/* Build a name for an entry in the stub hash table. */
3243
3244static char *
3245elf32_arm_stub_name (const asection *input_section,
3246 const asection *sym_sec,
3247 const struct elf32_arm_link_hash_entry *hash,
3248 const Elf_Internal_Rela *rel)
3249{
3250 char *stub_name;
3251 bfd_size_type len;
3252
3253 if (hash)
3254 {
3255 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
21d799b5 3256 stub_name = (char *) bfd_malloc (len);
906e58ca
NC		 3257 if (stub_name != NULL)
3258 sprintf (stub_name, "%08x_%s+%x",
3259 input_section->id & 0xffffffff,
3260 hash->root.root.root.string,
3261 (int) rel->r_addend & 0xffffffff);
3262 }
3263 else
3264 {
3265 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
21d799b5 3266 stub_name = (char *) bfd_malloc (len);
906e58ca
NC		 3267 if (stub_name != NULL)
3268 sprintf (stub_name, "%08x_%x:%x+%x",
3269 input_section->id & 0xffffffff,
3270 sym_sec->id & 0xffffffff,
3271 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3272 (int) rel->r_addend & 0xffffffff);
3273 }
3274
3275 return stub_name;
3276}
3277
3278/* Look up an entry in the stub hash. Stub entries are cached because
3279 creating the stub name takes a bit of time. */
3280
3281static struct elf32_arm_stub_hash_entry *
3282elf32_arm_get_stub_entry (const asection *input_section,
3283 const asection *sym_sec,
3284 struct elf_link_hash_entry *hash,
3285 const Elf_Internal_Rela *rel,
3286 struct elf32_arm_link_hash_table *htab)
3287{
3288 struct elf32_arm_stub_hash_entry *stub_entry;
3289 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3290 const asection *id_sec;
3291
3292 if ((input_section->flags & SEC_CODE) == 0)
3293 return NULL;
3294
3295 /* If this input section is part of a group of sections sharing one
3296 stub section, then use the id of the first section in the group.
3297 Stub names need to include a section id, as there may well be
3298 more than one stub used to reach say, printf, and we need to
3299 distinguish between them. */
3300 id_sec = htab->stub_group[input_section->id].link_sec;
3301
3302 if (h != NULL && h->stub_cache != NULL
3303 && h->stub_cache->h == h
3304 && h->stub_cache->id_sec == id_sec)
3305 {
3306 stub_entry = h->stub_cache;
3307 }
3308 else
3309 {
3310 char *stub_name;
3311
3312 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3313 if (stub_name == NULL)
3314 return NULL;
3315
3316 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3317 stub_name, FALSE, FALSE);
3318 if (h != NULL)
3319 h->stub_cache = stub_entry;
3320
3321 free (stub_name);
3322 }
3323
3324 return stub_entry;
3325}
3326
48229727
JB		 3327/* Find or create a stub section. Returns a pointer to the stub section, and
3328 the section to which the stub section will be attached (in *LINK_SEC_P).
3329 LINK_SEC_P may be NULL. */
906e58ca 3330
48229727
JB		 3331static asection *
3332elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3333 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3334{
3335 asection *link_sec;
3336 asection *stub_sec;
906e58ca
NC		 3337
3338 link_sec = htab->stub_group[section->id].link_sec;
3339 stub_sec = htab->stub_group[section->id].stub_sec;
3340 if (stub_sec == NULL)
3341 {
3342 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3343 if (stub_sec == NULL)
3344 {
3345 size_t namelen;
3346 bfd_size_type len;
3347 char *s_name;
3348
3349 namelen = strlen (link_sec->name);
3350 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3351 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3352 if (s_name == NULL)
3353 return NULL;
3354
3355 memcpy (s_name, link_sec->name, namelen);
3356 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3357 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3358 if (stub_sec == NULL)
3359 return NULL;
3360 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3361 }
3362 htab->stub_group[section->id].stub_sec = stub_sec;
3363 }
48229727
JB		 3364
3365 if (link_sec_p)
3366 *link_sec_p = link_sec;
3367
3368 return stub_sec;
3369}
3370
3371/* Add a new stub entry to the stub hash. Not all fields of the new
3372 stub entry are initialised. */
3373
3374static struct elf32_arm_stub_hash_entry *
3375elf32_arm_add_stub (const char *stub_name,
3376 asection *section,
3377 struct elf32_arm_link_hash_table *htab)
3378{
3379 asection *link_sec;
3380 asection *stub_sec;
3381 struct elf32_arm_stub_hash_entry *stub_entry;
3382
3383 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3384 if (stub_sec == NULL)
3385 return NULL;
906e58ca
NC		 3386
3387 /* Enter this entry into the linker stub hash table. */
3388 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3389 TRUE, FALSE);
3390 if (stub_entry == NULL)
3391 {
3392 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3393 section->owner,
3394 stub_name);
3395 return NULL;
3396 }
3397
3398 stub_entry->stub_sec = stub_sec;
3399 stub_entry->stub_offset = 0;
3400 stub_entry->id_sec = link_sec;
3401
906e58ca
NC		 3402 return stub_entry;
3403}
3404
3405/* Store an Arm insn into an output section not processed by
3406 elf32_arm_write_section. */
3407
3408static void
8029a119
NC		 3409put_arm_insn (struct elf32_arm_link_hash_table * htab,
3410 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3411{
3412 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3413 bfd_putl32 (val, ptr);
3414 else
3415 bfd_putb32 (val, ptr);
3416}
3417
3418/* Store a 16-bit Thumb insn into an output section not processed by
3419 elf32_arm_write_section. */
3420
3421static void
8029a119
NC		 3422put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3423 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3424{
3425 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3426 bfd_putl16 (val, ptr);
3427 else
3428 bfd_putb16 (val, ptr);
3429}
3430
48229727
JB		 3431static bfd_reloc_status_type elf32_arm_final_link_relocate
3432 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3433 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3434 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3435
906e58ca
NC		 3436static bfd_boolean
3437arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3438 void * in_arg)
3439{
48229727 3440#define MAXRELOCS 2
906e58ca
NC		 3441 struct elf32_arm_stub_hash_entry *stub_entry;
3442 struct bfd_link_info *info;
3443 struct elf32_arm_link_hash_table *htab;
3444 asection *stub_sec;
3445 bfd *stub_bfd;
3446 bfd_vma stub_addr;
3447 bfd_byte *loc;
3448 bfd_vma sym_value;
3449 int template_size;
3450 int size;
d3ce72d0 3451 const insn_sequence *template_sequence;
906e58ca
NC		 3452 int i;
3453 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3454 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3455 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3456 int nrelocs = 0;
906e58ca
NC		 3457
3458 /* Massage our args to the form they really have. */
3459 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3460 info = (struct bfd_link_info *) in_arg;
3461
3462 globals = elf32_arm_hash_table (info);
3463
3464 htab = elf32_arm_hash_table (info);
3465 stub_sec = stub_entry->stub_sec;
3466
eb7c4339
NS		 3467 if ((htab->fix_cortex_a8 < 0)
3468 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3469 /* We have to do the a8 fixes last, as they are less aligned than
3470 the other veneers. */
3471 return TRUE;
3472
906e58ca
NC		 3473 /* Make a note of the offset within the stubs for this entry. */
3474 stub_entry->stub_offset = stub_sec->size;
3475 loc = stub_sec->contents + stub_entry->stub_offset;
3476
3477 stub_bfd = stub_sec->owner;
3478
3479 /* This is the address of the start of the stub. */
3480 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3481 + stub_entry->stub_offset;
3482
3483 /* This is the address of the stub destination. */
3484 sym_value = (stub_entry->target_value
3485 + stub_entry->target_section->output_offset
3486 + stub_entry->target_section->output_section->vma);
3487
d3ce72d0 3488 template_sequence = stub_entry->stub_template;
461a49ca 3489 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3490
3491 size = 0;
461a49ca 3492 for (i = 0; i < template_size; i++)
906e58ca 3493 {
d3ce72d0 3494 switch (template_sequence[i].type)
461a49ca
DJ		 3495 {
3496 case THUMB16_TYPE:
48229727 3497 {
d3ce72d0
NC		 3498 bfd_vma data = (bfd_vma) template_sequence[i].data;
3499 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3500 {
3501 /* We've borrowed the reloc_addend field to mean we should
3502 insert a condition code into this (Thumb-1 branch)
3503 instruction. See THUMB16_BCOND_INSN. */
3504 BFD_ASSERT ((data & 0xff00) == 0xd000);
3505 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3506 }
3507 put_thumb_insn (globals, stub_bfd, data, loc + size);
3508 size += 2;
3509 }
461a49ca 3510 break;
906e58ca 3511
48229727 3512 case THUMB32_TYPE:
d3ce72d0
NC		 3513 put_thumb_insn (globals, stub_bfd,
3514 (template_sequence[i].data >> 16) & 0xffff,
48229727 3515 loc + size);
d3ce72d0 3516 put_thumb_insn (globals, stub_bfd, template_sequence[i].data & 0xffff,
48229727 3517 loc + size + 2);
d3ce72d0 3518 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3519 {
3520 stub_reloc_idx[nrelocs] = i;
3521 stub_reloc_offset[nrelocs++] = size;
3522 }
3523 size += 4;
3524 break;
3525
461a49ca 3526 case ARM_TYPE:
d3ce72d0
NC		 3527 put_arm_insn (globals, stub_bfd, template_sequence[i].data,
3528 loc + size);
461a49ca
DJ		 3529 /* Handle cases where the target is encoded within the
3530 instruction. */
d3ce72d0 3531 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3532 {
48229727
JB		 3533 stub_reloc_idx[nrelocs] = i;
3534 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3535 }
3536 size += 4;
3537 break;
3538
3539 case DATA_TYPE:
d3ce72d0 3540 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3541 stub_reloc_idx[nrelocs] = i;
3542 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3543 size += 4;
3544 break;
3545
3546 default:
3547 BFD_FAIL ();
3548 return FALSE;
3549 }
906e58ca 3550 }
461a49ca 3551
906e58ca
NC		 3552 stub_sec->size += size;
3553
461a49ca
DJ		 3554 /* Stub size has already been computed in arm_size_one_stub. Check
3555 consistency. */
3556 BFD_ASSERT (size == stub_entry->stub_size);
3557
906e58ca
NC		 3558 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3559 if (stub_entry->st_type == STT_ARM_TFUNC)
3560 sym_value |= 1;
3561
48229727
JB		 3562 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3563 in each stub. */
3564 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3565
48229727 3566 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3567 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3568 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3569 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3570 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3571 {
3572 Elf_Internal_Rela rel;
3573 bfd_boolean unresolved_reloc;
3574 char *error_message;
3575 int sym_flags
d3ce72d0 3576 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3577 ? STT_ARM_TFUNC : 0;
3578 bfd_vma points_to = sym_value + stub_entry->target_addend;
3579
3580 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3581 rel.r_info = ELF32_R_INFO (0,
3582 template_sequence[stub_reloc_idx[i]].r_type);
3583 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3584
3585 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3586 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3587 template should refer back to the instruction after the original
3588 branch. */
3589 points_to = sym_value;
3590
33c6a8fc
JB		 3591 /* There may be unintended consequences if this is not true. */
3592 BFD_ASSERT (stub_entry->h == NULL);
3593
48229727
JB		 3594 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3595 properly. We should probably use this function unconditionally,
3596 rather than only for certain relocations listed in the enclosing
3597 conditional, for the sake of consistency. */
3598 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3599 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3600 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3601 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3602 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3603 &error_message);
3604 }
3605 else
3606 {
3607 _bfd_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3608 (template_sequence[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
48229727
JB		 3609 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3610 sym_value + stub_entry->target_addend,
d3ce72d0 3611 template_sequence[stub_reloc_idx[i]].reloc_addend);
48229727 3612 }
906e58ca
NC		 3613
3614 return TRUE;
48229727 3615#undef MAXRELOCS
906e58ca
NC		 3616}
3617
48229727
JB		 3618/* Calculate the template, template size and instruction size for a stub.
3619 Return value is the instruction size. */
906e58ca 3620
48229727
JB		 3621static unsigned int
3622find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3623 const insn_sequence **stub_template,
3624 int *stub_template_size)
906e58ca 3625{
d3ce72d0 3626 const insn_sequence *template_sequence = NULL;
48229727
JB		 3627 int template_size = 0, i;
3628 unsigned int size;
906e58ca 3629
d3ce72d0 3630 template_sequence = stub_definitions[stub_type].template_sequence;
48229727 3631 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3632
3633 size = 0;
461a49ca
DJ		 3634 for (i = 0; i < template_size; i++)
3635 {
d3ce72d0 3636 switch (template_sequence[i].type)
461a49ca
DJ		 3637 {
3638 case THUMB16_TYPE:
3639 size += 2;
3640 break;
3641
3642 case ARM_TYPE:
48229727 3643 case THUMB32_TYPE:
461a49ca
DJ		 3644 case DATA_TYPE:
3645 size += 4;
3646 break;
3647
3648 default:
3649 BFD_FAIL ();
3650 return FALSE;
3651 }
3652 }
3653
48229727 3654 if (stub_template)
d3ce72d0 3655 *stub_template = template_sequence;
48229727
JB		 3656
3657 if (stub_template_size)
3658 *stub_template_size = template_size;
3659
3660 return size;
3661}
3662
3663/* As above, but don't actually build the stub. Just bump offset so
3664 we know stub section sizes. */
3665
3666static bfd_boolean
3667arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3668 void * in_arg)
3669{
3670 struct elf32_arm_stub_hash_entry *stub_entry;
3671 struct elf32_arm_link_hash_table *htab;
d3ce72d0 3672 const insn_sequence *template_sequence;
48229727
JB		 3673 int template_size, size;
3674
3675 /* Massage our args to the form they really have. */
3676 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3677 htab = (struct elf32_arm_link_hash_table *) in_arg;
3678
3679 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3680 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3681
d3ce72d0 3682 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3683 &template_size);
3684
461a49ca 3685 stub_entry->stub_size = size;
d3ce72d0 3686 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3687 stub_entry->stub_template_size = template_size;
3688
906e58ca
NC		 3689 size = (size + 7) & ~7;
3690 stub_entry->stub_sec->size += size;
461a49ca 3691
906e58ca
NC		 3692 return TRUE;
3693}
3694
3695/* External entry points for sizing and building linker stubs. */
3696
3697/* Set up various things so that we can make a list of input sections
3698 for each output section included in the link. Returns -1 on error,
3699 0 when no stubs will be needed, and 1 on success. */
3700
3701int
3702elf32_arm_setup_section_lists (bfd *output_bfd,
3703 struct bfd_link_info *info)
3704{
3705 bfd *input_bfd;
3706 unsigned int bfd_count;
3707 int top_id, top_index;
3708 asection *section;
3709 asection **input_list, **list;
3710 bfd_size_type amt;
3711 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3712
3713 if (! is_elf_hash_table (htab))
3714 return 0;
3715
3716 /* Count the number of input BFDs and find the top input section id. */
3717 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3718 input_bfd != NULL;
3719 input_bfd = input_bfd->link_next)
3720 {
3721 bfd_count += 1;
3722 for (section = input_bfd->sections;
3723 section != NULL;
3724 section = section->next)
3725 {
3726 if (top_id < section->id)
3727 top_id = section->id;
3728 }
3729 }
3730 htab->bfd_count = bfd_count;
3731
3732 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3733 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3734 if (htab->stub_group == NULL)
3735 return -1;
3736
3737 /* We can't use output_bfd->section_count here to find the top output
3738 section index as some sections may have been removed, and
3739 _bfd_strip_section_from_output doesn't renumber the indices. */
3740 for (section = output_bfd->sections, top_index = 0;
3741 section != NULL;
3742 section = section->next)
3743 {
3744 if (top_index < section->index)
3745 top_index = section->index;
3746 }
3747
3748 htab->top_index = top_index;
3749 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3750 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3751 htab->input_list = input_list;
3752 if (input_list == NULL)
3753 return -1;
3754
3755 /* For sections we aren't interested in, mark their entries with a
3756 value we can check later. */
3757 list = input_list + top_index;
3758 do
3759 *list = bfd_abs_section_ptr;
3760 while (list-- != input_list);
3761
3762 for (section = output_bfd->sections;
3763 section != NULL;
3764 section = section->next)
3765 {
3766 if ((section->flags & SEC_CODE) != 0)
3767 input_list[section->index] = NULL;
3768 }
3769
3770 return 1;
3771}
3772
3773/* The linker repeatedly calls this function for each input section,
3774 in the order that input sections are linked into output sections.
3775 Build lists of input sections to determine groupings between which
3776 we may insert linker stubs. */
3777
3778void
3779elf32_arm_next_input_section (struct bfd_link_info *info,
3780 asection *isec)
3781{
3782 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3783
3784 if (isec->output_section->index <= htab->top_index)
3785 {
3786 asection **list = htab->input_list + isec->output_section->index;
3787
a7470592 3788 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3789 {
3790 /* Steal the link_sec pointer for our list. */
3791#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3792 /* This happens to make the list in reverse order,
07d72278 3793 which we reverse later. */
906e58ca
NC		 3794 PREV_SEC (isec) = *list;
3795 *list = isec;
3796 }
3797 }
3798}
3799
3800/* See whether we can group stub sections together. Grouping stub
3801 sections may result in fewer stubs. More importantly, we need to
07d72278 3802 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3803 .fini output sections respectively, because glibc splits the
3804 _init and _fini functions into multiple parts. Putting a stub in
3805 the middle of a function is not a good idea. */
3806
3807static void
3808group_sections (struct elf32_arm_link_hash_table *htab,
3809 bfd_size_type stub_group_size,
07d72278 3810 bfd_boolean stubs_always_after_branch)
906e58ca 3811{
07d72278 3812 asection **list = htab->input_list;
906e58ca
NC		 3813
3814 do
3815 {
3816 asection *tail = *list;
07d72278 3817 asection *head;
906e58ca
NC		 3818
3819 if (tail == bfd_abs_section_ptr)
3820 continue;
3821
07d72278
DJ		 3822 /* Reverse the list: we must avoid placing stubs at the
3823 beginning of the section because the beginning of the text
3824 section may be required for an interrupt vector in bare metal
3825 code. */
3826#define NEXT_SEC PREV_SEC
e780aef2
CL		 3827 head = NULL;
3828 while (tail != NULL)
3829 {
3830 /* Pop from tail. */
3831 asection *item = tail;
3832 tail = PREV_SEC (item);
3833
3834 /* Push on head. */
3835 NEXT_SEC (item) = head;
3836 head = item;
3837 }
07d72278
DJ		 3838
3839 while (head != NULL)
906e58ca
NC		 3840 {
3841 asection *curr;
07d72278 3842 asection *next;
e780aef2
CL		 3843 bfd_vma stub_group_start = head->output_offset;
3844 bfd_vma end_of_next;
906e58ca 3845
07d72278 3846 curr = head;
e780aef2 3847 while (NEXT_SEC (curr) != NULL)
8cd931b7 3848 {
e780aef2
CL		 3849 next = NEXT_SEC (curr);
3850 end_of_next = next->output_offset + next->size;
3851 if (end_of_next - stub_group_start >= stub_group_size)
3852 /* End of NEXT is too far from start, so stop. */
8cd931b7 3853 break;
e780aef2
CL		 3854 /* Add NEXT to the group. */
3855 curr = next;
8cd931b7 3856 }
906e58ca 3857
07d72278 3858 /* OK, the size from the start to the start of CURR is less
906e58ca 3859 than stub_group_size and thus can be handled by one stub
07d72278 3860 section. (Or the head section is itself larger than
906e58ca
NC		 3861 stub_group_size, in which case we may be toast.)
3862 We should really be keeping track of the total size of
3863 stubs added here, as stubs contribute to the final output
7fb9f789 3864 section size. */
906e58ca
NC		 3865 do
3866 {
07d72278 3867 next = NEXT_SEC (head);
906e58ca 3868 /* Set up this stub group. */
07d72278 3869 htab->stub_group[head->id].link_sec = curr;
906e58ca 3870 }
07d72278 3871 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3872
3873 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3874 bytes after the stub section can be handled by it too. */
3875 if (!stubs_always_after_branch)
906e58ca 3876 {
e780aef2
CL		 3877 stub_group_start = curr->output_offset + curr->size;
3878
8cd931b7 3879 while (next != NULL)
906e58ca 3880 {
e780aef2
CL		 3881 end_of_next = next->output_offset + next->size;
3882 if (end_of_next - stub_group_start >= stub_group_size)
3883 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3884 break;
e780aef2 3885 /* Add NEXT to the stub group. */
07d72278
DJ		 3886 head = next;
3887 next = NEXT_SEC (head);
3888 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3889 }
3890 }
07d72278 3891 head = next;
906e58ca
NC		 3892 }
3893 }
07d72278 3894 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3895
3896 free (htab->input_list);
3897#undef PREV_SEC
07d72278 3898#undef NEXT_SEC
906e58ca
NC		 3899}
3900
48229727
JB		 3901/* Comparison function for sorting/searching relocations relating to Cortex-A8
3902 erratum fix. */
3903
3904static int
3905a8_reloc_compare (const void *a, const void *b)
3906{
21d799b5
NC		 3907 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3908 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3909
3910 if (ra->from < rb->from)
3911 return -1;
3912 else if (ra->from > rb->from)
3913 return 1;
3914 else
3915 return 0;
3916}
3917
3918static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3919 const char *, char **);
3920
3921/* Helper function to scan code for sequences which might trigger the Cortex-A8
3922 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3923 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3924 otherwise. */
3925
81694485
NC		 3926static bfd_boolean
3927cortex_a8_erratum_scan (bfd *input_bfd,
3928 struct bfd_link_info *info,
48229727
JB		 3929 struct a8_erratum_fix **a8_fixes_p,
3930 unsigned int *num_a8_fixes_p,
3931 unsigned int *a8_fix_table_size_p,
3932 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3933 unsigned int num_a8_relocs,
3934 unsigned prev_num_a8_fixes,
3935 bfd_boolean *stub_changed_p)
48229727
JB		 3936{
3937 asection *section;
3938 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3939 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3940 unsigned int num_a8_fixes = *num_a8_fixes_p;
3941 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3942
3943 for (section = input_bfd->sections;
3944 section != NULL;
3945 section = section->next)
3946 {
3947 bfd_byte *contents = NULL;
3948 struct _arm_elf_section_data *sec_data;
3949 unsigned int span;
3950 bfd_vma base_vma;
3951
3952 if (elf_section_type (section) != SHT_PROGBITS
3953 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3954 || (section->flags & SEC_EXCLUDE) != 0
3955 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3956 || (section->output_section == bfd_abs_section_ptr))
3957 continue;
3958
3959 base_vma = section->output_section->vma + section->output_offset;
3960
3961 if (elf_section_data (section)->this_hdr.contents != NULL)
3962 contents = elf_section_data (section)->this_hdr.contents;
3963 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3964 return TRUE;
48229727
JB		 3965
3966 sec_data = elf32_arm_section_data (section);
3967
3968 for (span = 0; span < sec_data->mapcount; span++)
3969 {
3970 unsigned int span_start = sec_data->map[span].vma;
3971 unsigned int span_end = (span == sec_data->mapcount - 1)
3972 ? section->size : sec_data->map[span + 1].vma;
3973 unsigned int i;
3974 char span_type = sec_data->map[span].type;
3975 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3976
3977 if (span_type != 't')
3978 continue;
3979
3980 /* Span is entirely within a single 4KB region: skip scanning. */
3981 if (((base_vma + span_start) & ~0xfff)
3982 == ((base_vma + span_end) & ~0xfff))
3983 continue;
3984
3985 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3986
3987 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3988 * The branch target is in the same 4KB region as the
3989 first half of the branch.
3990 * The instruction before the branch is a 32-bit
81694485 3991 length non-branch instruction. */
48229727
JB		 3992 for (i = span_start; i < span_end;)
3993 {
3994 unsigned int insn = bfd_getl16 (&contents[i]);
3995 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3996 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3997
3998 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3999 insn_32bit = TRUE;
4000
4001 if (insn_32bit)
4002 {
4003 /* Load the rest of the insn (in manual-friendly order). */
4004 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4005
4006 /* Encoding T4: B<c>.W. */
4007 is_b = (insn & 0xf800d000) == 0xf0009000;
4008 /* Encoding T1: BL<c>.W. */
4009 is_bl = (insn & 0xf800d000) == 0xf000d000;
4010 /* Encoding T2: BLX<c>.W. */
4011 is_blx = (insn & 0xf800d000) == 0xf000c000;
4012 /* Encoding T3: B<c>.W (not permitted in IT block). */
4013 is_bcc = (insn & 0xf800d000) == 0xf0008000
4014 && (insn & 0x07f00000) != 0x03800000;
4015 }
4016
4017 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4018
81694485
NC		 4019 if (((base_vma + i) & 0xfff) == 0xffe
4020 && insn_32bit
4021 && is_32bit_branch
4022 && last_was_32bit
4023 && ! last_was_branch)
48229727 4024 {
81694485 4025 bfd_signed_vma offset;
48229727
JB		 4026 bfd_boolean force_target_arm = FALSE;
4027 bfd_boolean force_target_thumb = FALSE;
4028 bfd_vma target;
4029 enum elf32_arm_stub_type stub_type = arm_stub_none;
4030 struct a8_erratum_reloc key, *found;
4031
4032 key.from = base_vma + i;
21d799b5
NC		 4033 found = (struct a8_erratum_reloc *)
4034 bsearch (&key, a8_relocs, num_a8_relocs,
4035 sizeof (struct a8_erratum_reloc),
4036 &a8_reloc_compare);
48229727
JB		 4037
4038 if (found)
4039 {
4040 char *error_message = NULL;
4041 struct elf_link_hash_entry *entry;
4042
4043 /* We don't care about the error returned from this
4044 function, only if there is glue or not. */
4045 entry = find_thumb_glue (info, found->sym_name,
4046 &error_message);
4047
4048 if (entry)
4049 found->non_a8_stub = TRUE;
4050
4051 if (found->r_type == R_ARM_THM_CALL
4052 && found->st_type != STT_ARM_TFUNC)
4053 force_target_arm = TRUE;
4054 else if (found->r_type == R_ARM_THM_CALL
4055 && found->st_type == STT_ARM_TFUNC)
4056 force_target_thumb = TRUE;
4057 }
4058
4059 /* Check if we have an offending branch instruction. */
4060
4061 if (found && found->non_a8_stub)
4062 /* We've already made a stub for this instruction, e.g.
4063 it's a long branch or a Thumb->ARM stub. Assume that
4064 stub will suffice to work around the A8 erratum (see
4065 setting of always_after_branch above). */
4066 ;
4067 else if (is_bcc)
4068 {
4069 offset = (insn & 0x7ff) << 1;
4070 offset |= (insn & 0x3f0000) >> 4;
4071 offset |= (insn & 0x2000) ? 0x40000 : 0;
4072 offset |= (insn & 0x800) ? 0x80000 : 0;
4073 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4074 if (offset & 0x100000)
81694485 4075 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4076 stub_type = arm_stub_a8_veneer_b_cond;
4077 }
4078 else if (is_b || is_bl || is_blx)
4079 {
4080 int s = (insn & 0x4000000) != 0;
4081 int j1 = (insn & 0x2000) != 0;
4082 int j2 = (insn & 0x800) != 0;
4083 int i1 = !(j1 ^ s);
4084 int i2 = !(j2 ^ s);
4085
4086 offset = (insn & 0x7ff) << 1;
4087 offset |= (insn & 0x3ff0000) >> 4;
4088 offset |= i2 << 22;
4089 offset |= i1 << 23;
4090 offset |= s << 24;
4091 if (offset & 0x1000000)
81694485 4092 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4093
4094 if (is_blx)
81694485 4095 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4096
4097 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4098 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4099 }
4100
4101 if (stub_type != arm_stub_none)
4102 {
4103 bfd_vma pc_for_insn = base_vma + i + 4;
4104
4105 /* The original instruction is a BL, but the target is
4106 an ARM instruction. If we were not making a stub,
4107 the BL would have been converted to a BLX. Use the
4108 BLX stub instead in that case. */
4109 if (htab->use_blx && force_target_arm
4110 && stub_type == arm_stub_a8_veneer_bl)
4111 {
4112 stub_type = arm_stub_a8_veneer_blx;
4113 is_blx = TRUE;
4114 is_bl = FALSE;
4115 }
4116 /* Conversely, if the original instruction was
4117 BLX but the target is Thumb mode, use the BL
4118 stub. */
4119 else if (force_target_thumb
4120 && stub_type == arm_stub_a8_veneer_blx)
4121 {
4122 stub_type = arm_stub_a8_veneer_bl;
4123 is_blx = FALSE;
4124 is_bl = TRUE;
4125 }
4126
4127 if (is_blx)
81694485 4128 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4129
4130 /* If we found a relocation, use the proper destination,
4131 not the offset in the (unrelocated) instruction.
4132 Note this is always done if we switched the stub type
4133 above. */
4134 if (found)
81694485
NC		 4135 offset =
4136 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4137
4138 target = pc_for_insn + offset;
4139
4140 /* The BLX stub is ARM-mode code. Adjust the offset to
4141 take the different PC value (+8 instead of +4) into
4142 account. */
4143 if (stub_type == arm_stub_a8_veneer_blx)
4144 offset += 4;
4145
4146 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4147 {
eb7c4339 4148 char *stub_name = NULL;
48229727
JB		 4149
4150 if (num_a8_fixes == a8_fix_table_size)
4151 {
4152 a8_fix_table_size *= 2;
21d799b5
NC		 4153 a8_fixes = (struct a8_erratum_fix *)
4154 bfd_realloc (a8_fixes,
4155 sizeof (struct a8_erratum_fix)
4156 * a8_fix_table_size);
48229727
JB		 4157 }
4158
eb7c4339
NS		 4159 if (num_a8_fixes < prev_num_a8_fixes)
4160 {
4161 /* If we're doing a subsequent scan,
4162 check if we've found the same fix as
4163 before, and try and reuse the stub
4164 name. */
4165 stub_name = a8_fixes[num_a8_fixes].stub_name;
4166 if ((a8_fixes[num_a8_fixes].section != section)
4167 || (a8_fixes[num_a8_fixes].offset != i))
4168 {
4169 free (stub_name);
4170 stub_name = NULL;
4171 *stub_changed_p = TRUE;
4172 }
4173 }
4174
4175 if (!stub_name)
4176 {
21d799b5 4177 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4178 if (stub_name != NULL)
4179 sprintf (stub_name, "%x:%x", section->id, i);
4180 }
48229727
JB		 4181
4182 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4183 a8_fixes[num_a8_fixes].section = section;
4184 a8_fixes[num_a8_fixes].offset = i;
4185 a8_fixes[num_a8_fixes].addend = offset;
4186 a8_fixes[num_a8_fixes].orig_insn = insn;
4187 a8_fixes[num_a8_fixes].stub_name = stub_name;
4188 a8_fixes[num_a8_fixes].stub_type = stub_type;
4189
4190 num_a8_fixes++;
4191 }
4192 }
4193 }
4194
4195 i += insn_32bit ? 4 : 2;
4196 last_was_32bit = insn_32bit;
4197 last_was_branch = is_32bit_branch;
4198 }
4199 }
4200
4201 if (elf_section_data (section)->this_hdr.contents == NULL)
4202 free (contents);
4203 }
4204
4205 *a8_fixes_p = a8_fixes;
4206 *num_a8_fixes_p = num_a8_fixes;
4207 *a8_fix_table_size_p = a8_fix_table_size;
4208
81694485 4209 return FALSE;
48229727
JB		 4210}
4211
906e58ca
NC		 4212/* Determine and set the size of the stub section for a final link.
4213
4214 The basic idea here is to examine all the relocations looking for
4215 PC-relative calls to a target that is unreachable with a "bl"
4216 instruction. */
4217
4218bfd_boolean
4219elf32_arm_size_stubs (bfd *output_bfd,
4220 bfd *stub_bfd,
4221 struct bfd_link_info *info,
4222 bfd_signed_vma group_size,
4223 asection * (*add_stub_section) (const char *, asection *),
4224 void (*layout_sections_again) (void))
4225{
4226 bfd_size_type stub_group_size;
07d72278 4227 bfd_boolean stubs_always_after_branch;
906e58ca 4228 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4229 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4230 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4231 struct a8_erratum_reloc *a8_relocs = NULL;
4232 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4233
4234 if (htab->fix_cortex_a8)
4235 {
21d799b5
NC		 4236 a8_fixes = (struct a8_erratum_fix *)
4237 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4238 a8_relocs = (struct a8_erratum_reloc *)
4239 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4240 }
906e58ca
NC		 4241
4242 /* Propagate mach to stub bfd, because it may not have been
4243 finalized when we created stub_bfd. */
4244 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4245 bfd_get_mach (output_bfd));
4246
4247 /* Stash our params away. */
4248 htab->stub_bfd = stub_bfd;
4249 htab->add_stub_section = add_stub_section;
4250 htab->layout_sections_again = layout_sections_again;
07d72278 4251 stubs_always_after_branch = group_size < 0;
48229727
JB		 4252
4253 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4254 as the first half of a 32-bit branch straddling two 4K pages. This is a
4255 crude way of enforcing that. */
4256 if (htab->fix_cortex_a8)
4257 stubs_always_after_branch = 1;
4258
906e58ca
NC		 4259 if (group_size < 0)
4260 stub_group_size = -group_size;
4261 else
4262 stub_group_size = group_size;
4263
4264 if (stub_group_size == 1)
4265 {
4266 /* Default values. */
4267 /* Thumb branch range is +-4MB has to be used as the default
4268 maximum size (a given section can contain both ARM and Thumb
4269 code, so the worst case has to be taken into account).
4270
4271 This value is 24K less than that, which allows for 2025
4272 12-byte stubs. If we exceed that, then we will fail to link.
4273 The user will have to relink with an explicit group size
4274 option. */
4275 stub_group_size = 4170000;
4276 }
4277
07d72278 4278 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4279
3ae046cc
NS		 4280 /* If we're applying the cortex A8 fix, we need to determine the
4281 program header size now, because we cannot change it later --
4282 that could alter section placements. Notice the A8 erratum fix
4283 ends up requiring the section addresses to remain unchanged
4284 modulo the page size. That's something we cannot represent
4285 inside BFD, and we don't want to force the section alignment to
4286 be the page size. */
4287 if (htab->fix_cortex_a8)
4288 (*htab->layout_sections_again) ();
4289
906e58ca
NC		 4290 while (1)
4291 {
4292 bfd *input_bfd;
4293 unsigned int bfd_indx;
4294 asection *stub_sec;
eb7c4339
NS		 4295 bfd_boolean stub_changed = FALSE;
4296 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4297
48229727 4298 num_a8_fixes = 0;
906e58ca
NC		 4299 for (input_bfd = info->input_bfds, bfd_indx = 0;
4300 input_bfd != NULL;
4301 input_bfd = input_bfd->link_next, bfd_indx++)
4302 {
4303 Elf_Internal_Shdr *symtab_hdr;
4304 asection *section;
4305 Elf_Internal_Sym *local_syms = NULL;
4306
48229727
JB		 4307 num_a8_relocs = 0;
4308
906e58ca
NC		 4309 /* We'll need the symbol table in a second. */
4310 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4311 if (symtab_hdr->sh_info == 0)
4312 continue;
4313
4314 /* Walk over each section attached to the input bfd. */
4315 for (section = input_bfd->sections;
4316 section != NULL;
4317 section = section->next)
4318 {
4319 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4320
4321 /* If there aren't any relocs, then there's nothing more
4322 to do. */
4323 if ((section->flags & SEC_RELOC) == 0
4324 || section->reloc_count == 0
4325 || (section->flags & SEC_CODE) == 0)
4326 continue;
4327
4328 /* If this section is a link-once section that will be
4329 discarded, then don't create any stubs. */
4330 if (section->output_section == NULL
4331 || section->output_section->owner != output_bfd)
4332 continue;
4333
4334 /* Get the relocs. */
4335 internal_relocs
4336 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4337 NULL, info->keep_memory);
4338 if (internal_relocs == NULL)
4339 goto error_ret_free_local;
4340
4341 /* Now examine each relocation. */
4342 irela = internal_relocs;
4343 irelaend = irela + section->reloc_count;
4344 for (; irela < irelaend; irela++)
4345 {
4346 unsigned int r_type, r_indx;
4347 enum elf32_arm_stub_type stub_type;
4348 struct elf32_arm_stub_hash_entry *stub_entry;
4349 asection *sym_sec;
4350 bfd_vma sym_value;
4351 bfd_vma destination;
4352 struct elf32_arm_link_hash_entry *hash;
7413f23f 4353 const char *sym_name;
906e58ca
NC		 4354 char *stub_name;
4355 const asection *id_sec;
4356 unsigned char st_type;
48229727 4357 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4358
4359 r_type = ELF32_R_TYPE (irela->r_info);
4360 r_indx = ELF32_R_SYM (irela->r_info);
4361
4362 if (r_type >= (unsigned int) R_ARM_max)
4363 {
4364 bfd_set_error (bfd_error_bad_value);
4365 error_ret_free_internal:
4366 if (elf_section_data (section)->relocs == NULL)
4367 free (internal_relocs);
4368 goto error_ret_free_local;
4369 }
4370
155d87d7 4371 /* Only look for stubs on branch instructions. */
906e58ca 4372 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4373 && (r_type != (unsigned int) R_ARM_THM_CALL)
4374 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4375 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4376 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4377 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4378 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4379 continue;
4380
4381 /* Now determine the call target, its name, value,
4382 section. */
4383 sym_sec = NULL;
4384 sym_value = 0;
4385 destination = 0;
4386 hash = NULL;
7413f23f 4387 sym_name = NULL;
906e58ca
NC		 4388 if (r_indx < symtab_hdr->sh_info)
4389 {
4390 /* It's a local symbol. */
4391 Elf_Internal_Sym *sym;
4392 Elf_Internal_Shdr *hdr;
4393
4394 if (local_syms == NULL)
4395 {
4396 local_syms
4397 = (Elf_Internal_Sym *) symtab_hdr->contents;
4398 if (local_syms == NULL)
4399 local_syms
4400 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4401 symtab_hdr->sh_info, 0,
4402 NULL, NULL, NULL);
4403 if (local_syms == NULL)
4404 goto error_ret_free_internal;
4405 }
4406
4407 sym = local_syms + r_indx;
4408 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4409 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4410 if (!sym_sec)
4411 /* This is an undefined symbol. It can never
4412 be resolved. */
4413 continue;
4414
906e58ca
NC		 4415 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4416 sym_value = sym->st_value;
4417 destination = (sym_value + irela->r_addend
4418 + sym_sec->output_offset
4419 + sym_sec->output_section->vma);
4420 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4421 sym_name
4422 = bfd_elf_string_from_elf_section (input_bfd,
4423 symtab_hdr->sh_link,
4424 sym->st_name);
906e58ca
NC		 4425 }
4426 else
4427 {
4428 /* It's an external symbol. */
4429 int e_indx;
4430
4431 e_indx = r_indx - symtab_hdr->sh_info;
4432 hash = ((struct elf32_arm_link_hash_entry *)
4433 elf_sym_hashes (input_bfd)[e_indx]);
4434
4435 while (hash->root.root.type == bfd_link_hash_indirect
4436 || hash->root.root.type == bfd_link_hash_warning)
4437 hash = ((struct elf32_arm_link_hash_entry *)
4438 hash->root.root.u.i.link);
4439
4440 if (hash->root.root.type == bfd_link_hash_defined
4441 || hash->root.root.type == bfd_link_hash_defweak)
4442 {
4443 sym_sec = hash->root.root.u.def.section;
4444 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4445
4446 struct elf32_arm_link_hash_table *globals =
4447 elf32_arm_hash_table (info);
4448
4449 /* For a destination in a shared library,
4450 use the PLT stub as target address to
4451 decide whether a branch stub is
4452 needed. */
4453 if (globals->splt != NULL && hash != NULL
4454 && hash->root.plt.offset != (bfd_vma) -1)
4455 {
4456 sym_sec = globals->splt;
4457 sym_value = hash->root.plt.offset;
4458 if (sym_sec->output_section != NULL)
4459 destination = (sym_value
4460 + sym_sec->output_offset
4461 + sym_sec->output_section->vma);
4462 }
4463 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4464 destination = (sym_value + irela->r_addend
4465 + sym_sec->output_offset
4466 + sym_sec->output_section->vma);
4467 }
69c5861e
CL		 4468 else if ((hash->root.root.type == bfd_link_hash_undefined)
4469 || (hash->root.root.type == bfd_link_hash_undefweak))
4470 {
4471 /* For a shared library, use the PLT stub as
4472 target address to decide whether a long
4473 branch stub is needed.
4474 For absolute code, they cannot be handled. */
4475 struct elf32_arm_link_hash_table *globals =
4476 elf32_arm_hash_table (info);
4477
4478 if (globals->splt != NULL && hash != NULL
4479 && hash->root.plt.offset != (bfd_vma) -1)
4480 {
4481 sym_sec = globals->splt;
4482 sym_value = hash->root.plt.offset;
4483 if (sym_sec->output_section != NULL)
4484 destination = (sym_value
4485 + sym_sec->output_offset
4486 + sym_sec->output_section->vma);
4487 }
4488 else
4489 continue;
4490 }
906e58ca
NC		 4491 else
4492 {
4493 bfd_set_error (bfd_error_bad_value);
4494 goto error_ret_free_internal;
4495 }
4496 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4497 sym_name = hash->root.root.root.string;
906e58ca
NC		 4498 }
4499
48229727 4500 do
7413f23f 4501 {
48229727
JB		 4502 /* Determine what (if any) linker stub is needed. */
4503 stub_type = arm_type_of_stub (info, section, irela,
4504 st_type, hash,
4505 destination, sym_sec,
4506 input_bfd, sym_name);
4507 if (stub_type == arm_stub_none)
4508 break;
4509
4510 /* Support for grouping stub sections. */
4511 id_sec = htab->stub_group[section->id].link_sec;
4512
4513 /* Get the name of this stub. */
4514 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4515 irela);
4516 if (!stub_name)
4517 goto error_ret_free_internal;
4518
4519 /* We've either created a stub for this reloc already,
4520 or we are about to. */
4521 created_stub = TRUE;
4522
4523 stub_entry = arm_stub_hash_lookup
4524 (&htab->stub_hash_table, stub_name,
4525 FALSE, FALSE);
4526 if (stub_entry != NULL)
4527 {
4528 /* The proper stub has already been created. */
4529 free (stub_name);
eb7c4339 4530 stub_entry->target_value = sym_value;
48229727
JB		 4531 break;
4532 }
7413f23f 4533
48229727
JB		 4534 stub_entry = elf32_arm_add_stub (stub_name, section,
4535 htab);
4536 if (stub_entry == NULL)
4537 {
4538 free (stub_name);
4539 goto error_ret_free_internal;
4540 }
7413f23f 4541
48229727
JB		 4542 stub_entry->target_value = sym_value;
4543 stub_entry->target_section = sym_sec;
4544 stub_entry->stub_type = stub_type;
4545 stub_entry->h = hash;
4546 stub_entry->st_type = st_type;
4547
4548 if (sym_name == NULL)
4549 sym_name = "unnamed";
21d799b5
NC		 4550 stub_entry->output_name = (char *)
4551 bfd_alloc (htab->stub_bfd,
48229727
JB		 4552 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4553 + strlen (sym_name));
4554 if (stub_entry->output_name == NULL)
4555 {
4556 free (stub_name);
4557 goto error_ret_free_internal;
4558 }
4559
4560 /* For historical reasons, use the existing names for
4561 ARM-to-Thumb and Thumb-to-ARM stubs. */
4562 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4563 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4564 && st_type != STT_ARM_TFUNC)
4565 sprintf (stub_entry->output_name,
4566 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4567 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4568 || (r_type == (unsigned int) R_ARM_JUMP24))
4569 && st_type == STT_ARM_TFUNC)
4570 sprintf (stub_entry->output_name,
4571 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4572 else
4573 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4574 sym_name);
4575
4576 stub_changed = TRUE;
4577 }
4578 while (0);
4579
4580 /* Look for relocations which might trigger Cortex-A8
4581 erratum. */
4582 if (htab->fix_cortex_a8
4583 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4584 || r_type == (unsigned int) R_ARM_THM_JUMP19
4585 || r_type == (unsigned int) R_ARM_THM_CALL
4586 || r_type == (unsigned int) R_ARM_THM_XPC22))
4587 {
4588 bfd_vma from = section->output_section->vma
4589 + section->output_offset
4590 + irela->r_offset;
4591
4592 if ((from & 0xfff) == 0xffe)
4593 {
4594 /* Found a candidate. Note we haven't checked the
4595 destination is within 4K here: if we do so (and
4596 don't create an entry in a8_relocs) we can't tell
4597 that a branch should have been relocated when
4598 scanning later. */
4599 if (num_a8_relocs == a8_reloc_table_size)
4600 {
4601 a8_reloc_table_size *= 2;
21d799b5
NC		 4602 a8_relocs = (struct a8_erratum_reloc *)
4603 bfd_realloc (a8_relocs,
4604 sizeof (struct a8_erratum_reloc)
4605 * a8_reloc_table_size);
48229727
JB		 4606 }
4607
4608 a8_relocs[num_a8_relocs].from = from;
4609 a8_relocs[num_a8_relocs].destination = destination;
4610 a8_relocs[num_a8_relocs].r_type = r_type;
4611 a8_relocs[num_a8_relocs].st_type = st_type;
4612 a8_relocs[num_a8_relocs].sym_name = sym_name;
4613 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4614
4615 num_a8_relocs++;
4616 }
4617 }
906e58ca
NC		 4618 }
4619
48229727
JB		 4620 /* We're done with the internal relocs, free them. */
4621 if (elf_section_data (section)->relocs == NULL)
4622 free (internal_relocs);
4623 }
4624
4625 if (htab->fix_cortex_a8)
4626 {
4627 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4628 qsort (a8_relocs, num_a8_relocs,
4629 sizeof (struct a8_erratum_reloc),
48229727
JB		 4630 &a8_reloc_compare);
4631
4632 /* Scan for branches which might trigger Cortex-A8 erratum. */
4633 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4634 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4635 a8_relocs, num_a8_relocs,
4636 prev_num_a8_fixes, &stub_changed)
4637 != 0)
48229727 4638 goto error_ret_free_local;
5e681ec4 4639 }
5e681ec4
PB		 4640 }
4641
eb7c4339 4642 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4643 stub_changed = TRUE;
4644
906e58ca
NC		 4645 if (!stub_changed)
4646 break;
5e681ec4 4647
906e58ca
NC		 4648 /* OK, we've added some stubs. Find out the new size of the
4649 stub sections. */
4650 for (stub_sec = htab->stub_bfd->sections;
4651 stub_sec != NULL;
4652 stub_sec = stub_sec->next)
3e6b1042
DJ		 4653 {
4654 /* Ignore non-stub sections. */
4655 if (!strstr (stub_sec->name, STUB_SUFFIX))
4656 continue;
4657
4658 stub_sec->size = 0;
4659 }
b34b2d70 4660
906e58ca
NC		 4661 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4662
48229727
JB		 4663 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4664 if (htab->fix_cortex_a8)
4665 for (i = 0; i < num_a8_fixes; i++)
4666 {
4667 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4668 a8_fixes[i].section, htab);
4669
4670 if (stub_sec == NULL)
4671 goto error_ret_free_local;
4672
4673 stub_sec->size
4674 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4675 NULL);
4676 }
4677
4678
906e58ca
NC		 4679 /* Ask the linker to do its stuff. */
4680 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4681 }
4682
48229727
JB		 4683 /* Add stubs for Cortex-A8 erratum fixes now. */
4684 if (htab->fix_cortex_a8)
4685 {
4686 for (i = 0; i < num_a8_fixes; i++)
4687 {
4688 struct elf32_arm_stub_hash_entry *stub_entry;
4689 char *stub_name = a8_fixes[i].stub_name;
4690 asection *section = a8_fixes[i].section;
4691 unsigned int section_id = a8_fixes[i].section->id;
4692 asection *link_sec = htab->stub_group[section_id].link_sec;
4693 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4694 const insn_sequence *template_sequence;
48229727
JB		 4695 int template_size, size = 0;
4696
4697 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4698 TRUE, FALSE);
4699 if (stub_entry == NULL)
4700 {
4701 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4702 section->owner,
4703 stub_name);
4704 return FALSE;
4705 }
4706
4707 stub_entry->stub_sec = stub_sec;
4708 stub_entry->stub_offset = 0;
4709 stub_entry->id_sec = link_sec;
4710 stub_entry->stub_type = a8_fixes[i].stub_type;
4711 stub_entry->target_section = a8_fixes[i].section;
4712 stub_entry->target_value = a8_fixes[i].offset;
4713 stub_entry->target_addend = a8_fixes[i].addend;
4714 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4715 stub_entry->st_type = STT_ARM_TFUNC;
4716
d3ce72d0
NC		 4717 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4718 &template_sequence,
48229727
JB		 4719 &template_size);
4720
4721 stub_entry->stub_size = size;
d3ce72d0 4722 stub_entry->stub_template = template_sequence;
48229727
JB		 4723 stub_entry->stub_template_size = template_size;
4724 }
4725
4726 /* Stash the Cortex-A8 erratum fix array for use later in
4727 elf32_arm_write_section(). */
4728 htab->a8_erratum_fixes = a8_fixes;
4729 htab->num_a8_erratum_fixes = num_a8_fixes;
4730 }
4731 else
4732 {
4733 htab->a8_erratum_fixes = NULL;
4734 htab->num_a8_erratum_fixes = 0;
4735 }
906e58ca
NC		 4736 return TRUE;
4737
4738 error_ret_free_local:
4739 return FALSE;
5e681ec4
PB		 4740}
4741
906e58ca
NC		 4742/* Build all the stubs associated with the current output file. The
4743 stubs are kept in a hash table attached to the main linker hash
4744 table. We also set up the .plt entries for statically linked PIC
4745 functions here. This function is called via arm_elf_finish in the
4746 linker. */
252b5132 4747
906e58ca
NC		 4748bfd_boolean
4749elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4750{
906e58ca
NC		 4751 asection *stub_sec;
4752 struct bfd_hash_table *table;
4753 struct elf32_arm_link_hash_table *htab;
252b5132 4754
906e58ca 4755 htab = elf32_arm_hash_table (info);
252b5132 4756
906e58ca
NC		 4757 for (stub_sec = htab->stub_bfd->sections;
4758 stub_sec != NULL;
4759 stub_sec = stub_sec->next)
252b5132 4760 {
906e58ca
NC		 4761 bfd_size_type size;
4762
8029a119 4763 /* Ignore non-stub sections. */
906e58ca
NC		 4764 if (!strstr (stub_sec->name, STUB_SUFFIX))
4765 continue;
4766
4767 /* Allocate memory to hold the linker stubs. */
4768 size = stub_sec->size;
21d799b5 4769 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4770 if (stub_sec->contents == NULL && size != 0)
4771 return FALSE;
4772 stub_sec->size = 0;
252b5132
RH		 4773 }
4774
906e58ca
NC		 4775 /* Build the stubs as directed by the stub hash table. */
4776 table = &htab->stub_hash_table;
4777 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4778 if (htab->fix_cortex_a8)
4779 {
4780 /* Place the cortex a8 stubs last. */
4781 htab->fix_cortex_a8 = -1;
4782 bfd_hash_traverse (table, arm_build_one_stub, info);
4783 }
252b5132 4784
906e58ca 4785 return TRUE;
252b5132
RH		 4786}
4787
9b485d32
NC		 4788/* Locate the Thumb encoded calling stub for NAME. */
4789
252b5132 4790static struct elf_link_hash_entry *
57e8b36a
NC		 4791find_thumb_glue (struct bfd_link_info *link_info,
4792 const char *name,
f2a9dd69 4793 char **error_message)
252b5132
RH		 4794{
4795 char *tmp_name;
4796 struct elf_link_hash_entry *hash;
4797 struct elf32_arm_link_hash_table *hash_table;
4798
4799 /* We need a pointer to the armelf specific hash table. */
4800 hash_table = elf32_arm_hash_table (link_info);
4801
21d799b5
NC		 4802 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4803 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4804
4805 BFD_ASSERT (tmp_name);
4806
4807 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4808
4809 hash = elf_link_hash_lookup
b34976b6 4810 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4811
b1657152
AM		 4812 if (hash == NULL
4813 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4814 tmp_name, name) == -1)
4815 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4816
4817 free (tmp_name);
4818
4819 return hash;
4820}
4821
9b485d32
NC		 4822/* Locate the ARM encoded calling stub for NAME. */
4823
252b5132 4824static struct elf_link_hash_entry *
57e8b36a
NC		 4825find_arm_glue (struct bfd_link_info *link_info,
4826 const char *name,
f2a9dd69 4827 char **error_message)
252b5132
RH		 4828{
4829 char *tmp_name;
4830 struct elf_link_hash_entry *myh;
4831 struct elf32_arm_link_hash_table *hash_table;
4832
4833 /* We need a pointer to the elfarm specific hash table. */
4834 hash_table = elf32_arm_hash_table (link_info);
4835
21d799b5
NC		 4836 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4837 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4838
4839 BFD_ASSERT (tmp_name);
4840
4841 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4842
4843 myh = elf_link_hash_lookup
b34976b6 4844 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4845
b1657152
AM		 4846 if (myh == NULL
4847 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4848 tmp_name, name) == -1)
4849 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4850
4851 free (tmp_name);
4852
4853 return myh;
4854}
4855
8f6277f5 4856/* ARM->Thumb glue (static images):
252b5132
RH		 4857
4858 .arm
4859 __func_from_arm:
4860 ldr r12, __func_addr
4861 bx r12
4862 __func_addr:
906e58ca 4863 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4864
26079076
PB		 4865 (v5t static images)
4866 .arm
4867 __func_from_arm:
4868 ldr pc, __func_addr
4869 __func_addr:
906e58ca 4870 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4871
8f6277f5
PB		 4872 (relocatable images)
4873 .arm
4874 __func_from_arm:
4875 ldr r12, __func_offset
4876 add r12, r12, pc
4877 bx r12
4878 __func_offset:
8029a119 4879 .word func - . */
8f6277f5
PB		 4880
4881#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4882static const insn32 a2t1_ldr_insn = 0xe59fc000;
4883static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4884static const insn32 a2t3_func_addr_insn = 0x00000001;
4885
26079076
PB		 4886#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4887static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4888static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4889
8f6277f5
PB		 4890#define ARM2THUMB_PIC_GLUE_SIZE 16
4891static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4892static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4893static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4894
9b485d32 4895/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4896
8029a119
NC		 4897 .thumb .thumb
4898 .align 2 .align 2
4899 __func_from_thumb: __func_from_thumb:
4900 bx pc push {r6, lr}
4901 nop ldr r6, __func_addr
4902 .arm mov lr, pc
4903 b func bx r6
fcef9eb7
NC		 4904 .arm
4905 ;; back_to_thumb
4906 ldmia r13! {r6, lr}
4907 bx lr
8029a119
NC		 4908 __func_addr:
4909 .word func */
252b5132
RH		 4910
4911#define THUMB2ARM_GLUE_SIZE 8
4912static const insn16 t2a1_bx_pc_insn = 0x4778;
4913static const insn16 t2a2_noop_insn = 0x46c0;
4914static const insn32 t2a3_b_insn = 0xea000000;
4915
c7b8f16e
JB		 4916#define VFP11_ERRATUM_VENEER_SIZE 8
4917
845b51d6
PB		 4918#define ARM_BX_VENEER_SIZE 12
4919static const insn32 armbx1_tst_insn = 0xe3100001;
4920static const insn32 armbx2_moveq_insn = 0x01a0f000;
4921static const insn32 armbx3_bx_insn = 0xe12fff10;
4922
7e392df6 4923#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4924static void
4925arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4926{
4927 asection * s;
8029a119 4928 bfd_byte * contents;
252b5132 4929
8029a119 4930 if (size == 0)
3e6b1042
DJ		 4931 {
4932 /* Do not include empty glue sections in the output. */
4933 if (abfd != NULL)
4934 {
4935 s = bfd_get_section_by_name (abfd, name);
4936 if (s != NULL)
4937 s->flags |= SEC_EXCLUDE;
4938 }
4939 return;
4940 }
252b5132 4941
8029a119 4942 BFD_ASSERT (abfd != NULL);
252b5132 4943
8029a119
NC		 4944 s = bfd_get_section_by_name (abfd, name);
4945 BFD_ASSERT (s != NULL);
252b5132 4946
21d799b5 4947 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 4948
8029a119
NC		 4949 BFD_ASSERT (s->size == size);
4950 s->contents = contents;
4951}
906e58ca 4952
8029a119
NC		 4953bfd_boolean
4954bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4955{
4956 struct elf32_arm_link_hash_table * globals;
906e58ca 4957
8029a119
NC		 4958 globals = elf32_arm_hash_table (info);
4959 BFD_ASSERT (globals != NULL);
906e58ca 4960
8029a119
NC		 4961 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4962 globals->arm_glue_size,
4963 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4964
8029a119
NC		 4965 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4966 globals->thumb_glue_size,
4967 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4968
8029a119
NC		 4969 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4970 globals->vfp11_erratum_glue_size,
4971 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4972
8029a119
NC		 4973 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4974 globals->bx_glue_size,
845b51d6
PB		 4975 ARM_BX_GLUE_SECTION_NAME);
4976
b34976b6 4977 return TRUE;
252b5132
RH		 4978}
4979
a4fd1a8e 4980/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4981 returns the symbol identifying the stub. */
4982
a4fd1a8e 4983static struct elf_link_hash_entry *
57e8b36a
NC		 4984record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4985 struct elf_link_hash_entry * h)
252b5132
RH		 4986{
4987 const char * name = h->root.root.string;
63b0f745 4988 asection * s;
252b5132
RH		 4989 char * tmp_name;
4990 struct elf_link_hash_entry * myh;
14a793b2 4991 struct bfd_link_hash_entry * bh;
252b5132 4992 struct elf32_arm_link_hash_table * globals;
dc810e39 4993 bfd_vma val;
2f475487 4994 bfd_size_type size;
252b5132
RH		 4995
4996 globals = elf32_arm_hash_table (link_info);
4997
4998 BFD_ASSERT (globals != NULL);
4999 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5000
5001 s = bfd_get_section_by_name
5002 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5003
252b5132
RH		 5004 BFD_ASSERT (s != NULL);
5005
21d799b5
NC		 5006 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5007 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5008
5009 BFD_ASSERT (tmp_name);
5010
5011 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5012
5013 myh = elf_link_hash_lookup
b34976b6 5014 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5015
5016 if (myh != NULL)
5017 {
9b485d32 5018 /* We've already seen this guy. */
252b5132 5019 free (tmp_name);
a4fd1a8e 5020 return myh;
252b5132
RH		 5021 }
5022
57e8b36a
NC		 5023 /* The only trick here is using hash_table->arm_glue_size as the value.
5024 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5025 putting it. The +1 on the value marks that the stub has not been
5026 output yet - not that it is a Thumb function. */
14a793b2 5027 bh = NULL;
dc810e39
AM		 5028 val = globals->arm_glue_size + 1;
5029 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5030 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5031 NULL, TRUE, FALSE, &bh);
252b5132 5032
b7693d02
DJ		 5033 myh = (struct elf_link_hash_entry *) bh;
5034 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5035 myh->forced_local = 1;
5036
252b5132
RH		 5037 free (tmp_name);
5038
27e55c4d
PB		 5039 if (link_info->shared || globals->root.is_relocatable_executable
5040 || globals->pic_veneer)
2f475487 5041 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5042 else if (globals->use_blx)
5043 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5044 else
2f475487
AM		 5045 size = ARM2THUMB_STATIC_GLUE_SIZE;
5046
5047 s->size += size;
5048 globals->arm_glue_size += size;
252b5132 5049
a4fd1a8e 5050 return myh;
252b5132
RH		 5051}
5052
845b51d6
PB		 5053/* Allocate space for ARMv4 BX veneers. */
5054
5055static void
5056record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5057{
5058 asection * s;
5059 struct elf32_arm_link_hash_table *globals;
5060 char *tmp_name;
5061 struct elf_link_hash_entry *myh;
5062 struct bfd_link_hash_entry *bh;
5063 bfd_vma val;
5064
5065 /* BX PC does not need a veneer. */
5066 if (reg == 15)
5067 return;
5068
5069 globals = elf32_arm_hash_table (link_info);
5070
5071 BFD_ASSERT (globals != NULL);
5072 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5073
5074 /* Check if this veneer has already been allocated. */
5075 if (globals->bx_glue_offset[reg])
5076 return;
5077
5078 s = bfd_get_section_by_name
5079 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5080
5081 BFD_ASSERT (s != NULL);
5082
5083 /* Add symbol for veneer. */
21d799b5
NC		 5084 tmp_name = (char *)
5085 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5086
845b51d6 5087 BFD_ASSERT (tmp_name);
906e58ca 5088
845b51d6 5089 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5090
845b51d6
PB		 5091 myh = elf_link_hash_lookup
5092 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5093
845b51d6 5094 BFD_ASSERT (myh == NULL);
906e58ca 5095
845b51d6
PB		 5096 bh = NULL;
5097 val = globals->bx_glue_size;
5098 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5099 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5100 NULL, TRUE, FALSE, &bh);
5101
5102 myh = (struct elf_link_hash_entry *) bh;
5103 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5104 myh->forced_local = 1;
5105
5106 s->size += ARM_BX_VENEER_SIZE;
5107 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5108 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5109}
5110
5111
c7b8f16e
JB		 5112/* Add an entry to the code/data map for section SEC. */
5113
5114static void
5115elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5116{
5117 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5118 unsigned int newidx;
906e58ca 5119
c7b8f16e
JB		 5120 if (sec_data->map == NULL)
5121 {
21d799b5
NC		 5122 sec_data->map = (elf32_arm_section_map *)
5123 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5124 sec_data->mapcount = 0;
5125 sec_data->mapsize = 1;
5126 }
906e58ca 5127
c7b8f16e 5128 newidx = sec_data->mapcount++;
906e58ca 5129
c7b8f16e
JB		 5130 if (sec_data->mapcount > sec_data->mapsize)
5131 {
5132 sec_data->mapsize *= 2;
21d799b5
NC		 5133 sec_data->map = (elf32_arm_section_map *)
5134 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5135 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5136 }
5137
5138 if (sec_data->map)
5139 {
5140 sec_data->map[newidx].vma = vma;
5141 sec_data->map[newidx].type = type;
c7b8f16e 5142 }
c7b8f16e
JB		 5143}
5144
5145
5146/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5147 veneers are handled for now. */
5148
5149static bfd_vma
5150record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5151 elf32_vfp11_erratum_list *branch,
5152 bfd *branch_bfd,
5153 asection *branch_sec,
5154 unsigned int offset)
5155{
5156 asection *s;
5157 struct elf32_arm_link_hash_table *hash_table;
5158 char *tmp_name;
5159 struct elf_link_hash_entry *myh;
5160 struct bfd_link_hash_entry *bh;
5161 bfd_vma val;
5162 struct _arm_elf_section_data *sec_data;
5163 int errcount;
5164 elf32_vfp11_erratum_list *newerr;
906e58ca 5165
c7b8f16e 5166 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5167
c7b8f16e
JB		 5168 BFD_ASSERT (hash_table != NULL);
5169 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5170
c7b8f16e
JB		 5171 s = bfd_get_section_by_name
5172 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5173
c7b8f16e 5174 sec_data = elf32_arm_section_data (s);
906e58ca 5175
c7b8f16e 5176 BFD_ASSERT (s != NULL);
906e58ca 5177
21d799b5
NC		 5178 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5179 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5180
c7b8f16e 5181 BFD_ASSERT (tmp_name);
906e58ca 5182
c7b8f16e
JB		 5183 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5184 hash_table->num_vfp11_fixes);
906e58ca 5185
c7b8f16e
JB		 5186 myh = elf_link_hash_lookup
5187 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5188
c7b8f16e 5189 BFD_ASSERT (myh == NULL);
906e58ca 5190
c7b8f16e
JB		 5191 bh = NULL;
5192 val = hash_table->vfp11_erratum_glue_size;
5193 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5194 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5195 NULL, TRUE, FALSE, &bh);
5196
5197 myh = (struct elf_link_hash_entry *) bh;
5198 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5199 myh->forced_local = 1;
5200
5201 /* Link veneer back to calling location. */
5202 errcount = ++(sec_data->erratumcount);
21d799b5
NC		 5203 newerr = (elf32_vfp11_erratum_list *)
5204 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5205
c7b8f16e
JB		 5206 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5207 newerr->vma = -1;
5208 newerr->u.v.branch = branch;
5209 newerr->u.v.id = hash_table->num_vfp11_fixes;
5210 branch->u.b.veneer = newerr;
5211
5212 newerr->next = sec_data->erratumlist;
5213 sec_data->erratumlist = newerr;
5214
5215 /* A symbol for the return from the veneer. */
5216 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5217 hash_table->num_vfp11_fixes);
5218
5219 myh = elf_link_hash_lookup
5220 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5221
c7b8f16e
JB		 5222 if (myh != NULL)
5223 abort ();
5224
5225 bh = NULL;
5226 val = offset + 4;
5227 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5228 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5229
c7b8f16e
JB		 5230 myh = (struct elf_link_hash_entry *) bh;
5231 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5232 myh->forced_local = 1;
5233
5234 free (tmp_name);
906e58ca 5235
c7b8f16e
JB		 5236 /* Generate a mapping symbol for the veneer section, and explicitly add an
5237 entry for that symbol to the code/data map for the section. */
5238 if (hash_table->vfp11_erratum_glue_size == 0)
5239 {
5240 bh = NULL;
5241 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5242 ever requires this erratum fix. */
5243 _bfd_generic_link_add_one_symbol (link_info,
5244 hash_table->bfd_of_glue_owner, "$a",
5245 BSF_LOCAL, s, 0, NULL,
5246 TRUE, FALSE, &bh);
5247
5248 myh = (struct elf_link_hash_entry *) bh;
5249 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5250 myh->forced_local = 1;
906e58ca 5251
c7b8f16e
JB		 5252 /* The elf32_arm_init_maps function only cares about symbols from input
5253 BFDs. We must make a note of this generated mapping symbol
5254 ourselves so that code byteswapping works properly in
5255 elf32_arm_write_section. */
5256 elf32_arm_section_map_add (s, 'a', 0);
5257 }
906e58ca 5258
c7b8f16e
JB		 5259 s->size += VFP11_ERRATUM_VENEER_SIZE;
5260 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5261 hash_table->num_vfp11_fixes++;
906e58ca 5262
c7b8f16e
JB		 5263 /* The offset of the veneer. */
5264 return val;
5265}
5266
8029a119 5267#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5268 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5269 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5270
5271/* Create a fake section for use by the ARM backend of the linker. */
5272
5273static bfd_boolean
5274arm_make_glue_section (bfd * abfd, const char * name)
5275{
5276 asection * sec;
5277
5278 sec = bfd_get_section_by_name (abfd, name);
5279 if (sec != NULL)
5280 /* Already made. */
5281 return TRUE;
5282
5283 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5284
5285 if (sec == NULL
5286 || !bfd_set_section_alignment (abfd, sec, 2))
5287 return FALSE;
5288
5289 /* Set the gc mark to prevent the section from being removed by garbage
5290 collection, despite the fact that no relocs refer to this section. */
5291 sec->gc_mark = 1;
5292
5293 return TRUE;
5294}
5295
8afb0e02
NC		 5296/* Add the glue sections to ABFD. This function is called from the
5297 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5298
b34976b6 5299bfd_boolean
57e8b36a
NC		 5300bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5301 struct bfd_link_info *info)
252b5132 5302{
8afb0e02
NC		 5303 /* If we are only performing a partial
5304 link do not bother adding the glue. */
1049f94e 5305 if (info->relocatable)
b34976b6 5306 return TRUE;
252b5132 5307
8029a119
NC		 5308 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5309 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5310 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5311 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5312}
5313
5314/* Select a BFD to be used to hold the sections used by the glue code.
5315 This function is called from the linker scripts in ld/emultempl/
8029a119 5316 {armelf/pe}.em. */
8afb0e02 5317
b34976b6 5318bfd_boolean
57e8b36a 5319bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5320{
5321 struct elf32_arm_link_hash_table *globals;
5322
5323 /* If we are only performing a partial link
5324 do not bother getting a bfd to hold the glue. */
1049f94e 5325 if (info->relocatable)
b34976b6 5326 return TRUE;
8afb0e02 5327
b7693d02
DJ		 5328 /* Make sure we don't attach the glue sections to a dynamic object. */
5329 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5330
8afb0e02
NC		 5331 globals = elf32_arm_hash_table (info);
5332
5333 BFD_ASSERT (globals != NULL);
5334
5335 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5336 return TRUE;
8afb0e02 5337
252b5132
RH		 5338 /* Save the bfd for later use. */
5339 globals->bfd_of_glue_owner = abfd;
cedb70c5 5340
b34976b6 5341 return TRUE;
252b5132
RH		 5342}
5343
906e58ca
NC		 5344static void
5345check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5346{
104d59d1
JM		 5347 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5348 Tag_CPU_arch) > 2)
39b41c9c
PB		 5349 globals->use_blx = 1;
5350}
5351
b34976b6 5352bfd_boolean
57e8b36a 5353bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5354 struct bfd_link_info *link_info)
252b5132
RH		 5355{
5356 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5357 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5358 Elf_Internal_Rela *irel, *irelend;
5359 bfd_byte *contents = NULL;
252b5132
RH		 5360
5361 asection *sec;
5362 struct elf32_arm_link_hash_table *globals;
5363
5364 /* If we are only performing a partial link do not bother
5365 to construct any glue. */
1049f94e 5366 if (link_info->relocatable)
b34976b6 5367 return TRUE;
252b5132 5368
39ce1a6a
NC		 5369 /* Here we have a bfd that is to be included on the link. We have a
5370 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5371 globals = elf32_arm_hash_table (link_info);
5372
5373 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5374
5375 check_use_blx (globals);
252b5132 5376
d504ffc8 5377 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5378 {
d003868e
AM		 5379 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5380 abfd);
e489d0ae
PB		 5381 return FALSE;
5382 }
f21f3fe0 5383
39ce1a6a
NC		 5384 /* PR 5398: If we have not decided to include any loadable sections in
5385 the output then we will not have a glue owner bfd. This is OK, it
5386 just means that there is nothing else for us to do here. */
5387 if (globals->bfd_of_glue_owner == NULL)
5388 return TRUE;
5389
252b5132
RH		 5390 /* Rummage around all the relocs and map the glue vectors. */
5391 sec = abfd->sections;
5392
5393 if (sec == NULL)
b34976b6 5394 return TRUE;
252b5132
RH		 5395
5396 for (; sec != NULL; sec = sec->next)
5397 {
5398 if (sec->reloc_count == 0)
5399 continue;
5400
2f475487
AM		 5401 if ((sec->flags & SEC_EXCLUDE) != 0)
5402 continue;
5403
0ffa91dd 5404 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5405
9b485d32 5406 /* Load the relocs. */
6cdc0ccc 5407 internal_relocs
906e58ca 5408 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5409
6cdc0ccc
AM		 5410 if (internal_relocs == NULL)
5411 goto error_return;
252b5132 5412
6cdc0ccc
AM		 5413 irelend = internal_relocs + sec->reloc_count;
5414 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5415 {
5416 long r_type;
5417 unsigned long r_index;
252b5132
RH		 5418
5419 struct elf_link_hash_entry *h;
5420
5421 r_type = ELF32_R_TYPE (irel->r_info);
5422 r_index = ELF32_R_SYM (irel->r_info);
5423
9b485d32 5424 /* These are the only relocation types we care about. */
ba96a88f 5425 if ( r_type != R_ARM_PC24
845b51d6 5426 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5427 continue;
5428
5429 /* Get the section contents if we haven't done so already. */
5430 if (contents == NULL)
5431 {
5432 /* Get cached copy if it exists. */
5433 if (elf_section_data (sec)->this_hdr.contents != NULL)
5434 contents = elf_section_data (sec)->this_hdr.contents;
5435 else
5436 {
5437 /* Go get them off disk. */
57e8b36a 5438 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5439 goto error_return;
5440 }
5441 }
5442
845b51d6
PB		 5443 if (r_type == R_ARM_V4BX)
5444 {
5445 int reg;
5446
5447 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5448 record_arm_bx_glue (link_info, reg);
5449 continue;
5450 }
5451
a7c10850 5452 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5453 h = NULL;
5454
9b485d32 5455 /* We don't care about local symbols. */
252b5132
RH		 5456 if (r_index < symtab_hdr->sh_info)
5457 continue;
5458
9b485d32 5459 /* This is an external symbol. */
252b5132
RH		 5460 r_index -= symtab_hdr->sh_info;
5461 h = (struct elf_link_hash_entry *)
5462 elf_sym_hashes (abfd)[r_index];
5463
5464 /* If the relocation is against a static symbol it must be within
5465 the current section and so cannot be a cross ARM/Thumb relocation. */
5466 if (h == NULL)
5467 continue;
5468
d504ffc8
DJ		 5469 /* If the call will go through a PLT entry then we do not need
5470 glue. */
5471 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5472 continue;
5473
252b5132
RH		 5474 switch (r_type)
5475 {
5476 case R_ARM_PC24:
5477 /* This one is a call from arm code. We need to look up
2f0ca46a 5478 the target of the call. If it is a thumb target, we
252b5132 5479 insert glue. */
ebe24dd4 5480 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5481 record_arm_to_thumb_glue (link_info, h);
5482 break;
5483
252b5132 5484 default:
c6596c5e 5485 abort ();
252b5132
RH		 5486 }
5487 }
6cdc0ccc
AM		 5488
5489 if (contents != NULL
5490 && elf_section_data (sec)->this_hdr.contents != contents)
5491 free (contents);
5492 contents = NULL;
5493
5494 if (internal_relocs != NULL
5495 && elf_section_data (sec)->relocs != internal_relocs)
5496 free (internal_relocs);
5497 internal_relocs = NULL;
252b5132
RH		 5498 }
5499
b34976b6 5500 return TRUE;
9a5aca8c 5501
252b5132 5502error_return:
6cdc0ccc
AM		 5503 if (contents != NULL
5504 && elf_section_data (sec)->this_hdr.contents != contents)
5505 free (contents);
5506 if (internal_relocs != NULL
5507 && elf_section_data (sec)->relocs != internal_relocs)
5508 free (internal_relocs);
9a5aca8c 5509
b34976b6 5510 return FALSE;
252b5132 5511}
7e392df6 5512#endif
252b5132 5513
eb043451 5514
c7b8f16e
JB		 5515/* Initialise maps of ARM/Thumb/data for input BFDs. */
5516
5517void
5518bfd_elf32_arm_init_maps (bfd *abfd)
5519{
5520 Elf_Internal_Sym *isymbuf;
5521 Elf_Internal_Shdr *hdr;
5522 unsigned int i, localsyms;
5523
af1f4419
NC		 5524 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5525 if (! is_arm_elf (abfd))
5526 return;
5527
c7b8f16e
JB		 5528 if ((abfd->flags & DYNAMIC) != 0)
5529 return;
5530
0ffa91dd 5531 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5532 localsyms = hdr->sh_info;
5533
5534 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5535 should contain the number of local symbols, which should come before any
5536 global symbols. Mapping symbols are always local. */
5537 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5538 NULL);
5539
5540 /* No internal symbols read? Skip this BFD. */
5541 if (isymbuf == NULL)
5542 return;
5543
5544 for (i = 0; i < localsyms; i++)
5545 {
5546 Elf_Internal_Sym *isym = &isymbuf[i];
5547 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5548 const char *name;
906e58ca 5549
c7b8f16e
JB		 5550 if (sec != NULL
5551 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5552 {
5553 name = bfd_elf_string_from_elf_section (abfd,
5554 hdr->sh_link, isym->st_name);
906e58ca 5555
c7b8f16e
JB		 5556 if (bfd_is_arm_special_symbol_name (name,
5557 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5558 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5559 }
5560 }
5561}
5562
5563
48229727
JB		 5564/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5565 say what they wanted. */
5566
5567void
5568bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5569{
5570 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5571 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5572
5573 if (globals->fix_cortex_a8 == -1)
5574 {
5575 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5576 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5577 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5578 || out_attr[Tag_CPU_arch_profile].i == 0))
5579 globals->fix_cortex_a8 = 1;
5580 else
5581 globals->fix_cortex_a8 = 0;
5582 }
5583}
5584
5585
c7b8f16e
JB		 5586void
5587bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5588{
5589 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5590 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5591
c7b8f16e
JB		 5592 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5593 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5594 {
5595 switch (globals->vfp11_fix)
5596 {
5597 case BFD_ARM_VFP11_FIX_DEFAULT:
5598 case BFD_ARM_VFP11_FIX_NONE:
5599 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5600 break;
906e58ca 5601
c7b8f16e
JB		 5602 default:
5603 /* Give a warning, but do as the user requests anyway. */
5604 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5605 "workaround is not necessary for target architecture"), obfd);
5606 }
5607 }
5608 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5609 /* For earlier architectures, we might need the workaround, but do not
5610 enable it by default. If users is running with broken hardware, they
5611 must enable the erratum fix explicitly. */
5612 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5613}
5614
5615
906e58ca
NC		 5616enum bfd_arm_vfp11_pipe
5617{
c7b8f16e
JB		 5618 VFP11_FMAC,
5619 VFP11_LS,
5620 VFP11_DS,
5621 VFP11_BAD
5622};
5623
5624/* Return a VFP register number. This is encoded as RX:X for single-precision
5625 registers, or X:RX for double-precision registers, where RX is the group of
5626 four bits in the instruction encoding and X is the single extension bit.
5627 RX and X fields are specified using their lowest (starting) bit. The return
5628 value is:
5629
5630 0...31: single-precision registers s0...s31
5631 32...63: double-precision registers d0...d31.
906e58ca 5632
c7b8f16e
JB		 5633 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5634 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5635
c7b8f16e
JB		 5636static unsigned int
5637bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5638 unsigned int x)
5639{
5640 if (is_double)
5641 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5642 else
5643 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5644}
5645
5646/* Set bits in *WMASK according to a register number REG as encoded by
5647 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5648
5649static void
5650bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5651{
5652 if (reg < 32)
5653 *wmask |= 1 << reg;
5654 else if (reg < 48)
5655 *wmask |= 3 << ((reg - 32) * 2);
5656}
5657
5658/* Return TRUE if WMASK overwrites anything in REGS. */
5659
5660static bfd_boolean
5661bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5662{
5663 int i;
906e58ca 5664
c7b8f16e
JB		 5665 for (i = 0; i < numregs; i++)
5666 {
5667 unsigned int reg = regs[i];
5668
5669 if (reg < 32 && (wmask & (1 << reg)) != 0)
5670 return TRUE;
906e58ca 5671
c7b8f16e
JB		 5672 reg -= 32;
5673
5674 if (reg >= 16)
5675 continue;
906e58ca 5676
c7b8f16e
JB		 5677 if ((wmask & (3 << (reg * 2))) != 0)
5678 return TRUE;
5679 }
906e58ca 5680
c7b8f16e
JB		 5681 return FALSE;
5682}
5683
5684/* In this function, we're interested in two things: finding input registers
5685 for VFP data-processing instructions, and finding the set of registers which
5686 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5687 hold the written set, so FLDM etc. are easy to deal with (we're only
5688 interested in 32 SP registers or 16 dp registers, due to the VFP version
5689 implemented by the chip in question). DP registers are marked by setting
5690 both SP registers in the write mask). */
5691
5692static enum bfd_arm_vfp11_pipe
5693bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5694 int *numregs)
5695{
91d6fa6a 5696 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5697 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5698
5699 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5700 {
5701 unsigned int pqrs;
5702 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5703 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5704
5705 pqrs = ((insn & 0x00800000) >> 20)
5706 | ((insn & 0x00300000) >> 19)
5707 | ((insn & 0x00000040) >> 6);
5708
5709 switch (pqrs)
5710 {
5711 case 0: /* fmac[sd]. */
5712 case 1: /* fnmac[sd]. */
5713 case 2: /* fmsc[sd]. */
5714 case 3: /* fnmsc[sd]. */
91d6fa6a 5715 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5716 bfd_arm_vfp11_write_mask (destmask, fd);
5717 regs[0] = fd;
5718 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5719 regs[2] = fm;
5720 *numregs = 3;
5721 break;
5722
5723 case 4: /* fmul[sd]. */
5724 case 5: /* fnmul[sd]. */
5725 case 6: /* fadd[sd]. */
5726 case 7: /* fsub[sd]. */
91d6fa6a 5727 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5728 goto vfp_binop;
5729
5730 case 8: /* fdiv[sd]. */
91d6fa6a 5731 vpipe = VFP11_DS;
c7b8f16e
JB		 5732 vfp_binop:
5733 bfd_arm_vfp11_write_mask (destmask, fd);
5734 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5735 regs[1] = fm;
5736 *numregs = 2;
5737 break;
5738
5739 case 15: /* extended opcode. */
5740 {
5741 unsigned int extn = ((insn >> 15) & 0x1e)
5742 | ((insn >> 7) & 1);
5743
5744 switch (extn)
5745 {
5746 case 0: /* fcpy[sd]. */
5747 case 1: /* fabs[sd]. */
5748 case 2: /* fneg[sd]. */
5749 case 8: /* fcmp[sd]. */
5750 case 9: /* fcmpe[sd]. */
5751 case 10: /* fcmpz[sd]. */
5752 case 11: /* fcmpez[sd]. */
5753 case 16: /* fuito[sd]. */
5754 case 17: /* fsito[sd]. */
5755 case 24: /* ftoui[sd]. */
5756 case 25: /* ftouiz[sd]. */
5757 case 26: /* ftosi[sd]. */
5758 case 27: /* ftosiz[sd]. */
5759 /* These instructions will not bounce due to underflow. */
5760 *numregs = 0;
91d6fa6a 5761 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5762 break;
5763
5764 case 3: /* fsqrt[sd]. */
5765 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5766 registers to cause the erratum in previous instructions. */
5767 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5768 vpipe = VFP11_DS;
c7b8f16e
JB		 5769 break;
5770
5771 case 15: /* fcvt{ds,sd}. */
5772 {
5773 int rnum = 0;
5774
5775 bfd_arm_vfp11_write_mask (destmask, fd);
5776
5777 /* Only FCVTSD can underflow. */
5778 if ((insn & 0x100) != 0)
5779 regs[rnum++] = fm;
5780
5781 *numregs = rnum;
5782
91d6fa6a 5783 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5784 }
5785 break;
5786
5787 default:
5788 return VFP11_BAD;
5789 }
5790 }
5791 break;
5792
5793 default:
5794 return VFP11_BAD;
5795 }
5796 }
5797 /* Two-register transfer. */
5798 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5799 {
5800 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5801
c7b8f16e
JB		 5802 if ((insn & 0x100000) == 0)
5803 {
5804 if (is_double)
5805 bfd_arm_vfp11_write_mask (destmask, fm);
5806 else
5807 {
5808 bfd_arm_vfp11_write_mask (destmask, fm);
5809 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5810 }
5811 }
5812
91d6fa6a 5813 vpipe = VFP11_LS;
c7b8f16e
JB		 5814 }
5815 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5816 {
5817 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5818 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5819
c7b8f16e
JB		 5820 switch (puw)
5821 {
5822 case 0: /* Two-reg transfer. We should catch these above. */
5823 abort ();
906e58ca 5824
c7b8f16e
JB		 5825 case 2: /* fldm[sdx]. */
5826 case 3:
5827 case 5:
5828 {
5829 unsigned int i, offset = insn & 0xff;
5830
5831 if (is_double)
5832 offset >>= 1;
5833
5834 for (i = fd; i < fd + offset; i++)
5835 bfd_arm_vfp11_write_mask (destmask, i);
5836 }
5837 break;
906e58ca 5838
c7b8f16e
JB		 5839 case 4: /* fld[sd]. */
5840 case 6:
5841 bfd_arm_vfp11_write_mask (destmask, fd);
5842 break;
906e58ca 5843
c7b8f16e
JB		 5844 default:
5845 return VFP11_BAD;
5846 }
5847
91d6fa6a 5848 vpipe = VFP11_LS;
c7b8f16e
JB		 5849 }
5850 /* Single-register transfer. Note L==0. */
5851 else if ((insn & 0x0f100e10) == 0x0e000a10)
5852 {
5853 unsigned int opcode = (insn >> 21) & 7;
5854 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5855
5856 switch (opcode)
5857 {
5858 case 0: /* fmsr/fmdlr. */
5859 case 1: /* fmdhr. */
5860 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5861 destination register. I don't know if this is exactly right,
5862 but it is the conservative choice. */
5863 bfd_arm_vfp11_write_mask (destmask, fn);
5864 break;
5865
5866 case 7: /* fmxr. */
5867 break;
5868 }
5869
91d6fa6a 5870 vpipe = VFP11_LS;
c7b8f16e
JB		 5871 }
5872
91d6fa6a 5873 return vpipe;
c7b8f16e
JB		 5874}
5875
5876
5877static int elf32_arm_compare_mapping (const void * a, const void * b);
5878
5879
5880/* Look for potentially-troublesome code sequences which might trigger the
5881 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5882 (available from ARM) for details of the erratum. A short version is
5883 described in ld.texinfo. */
5884
5885bfd_boolean
5886bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5887{
5888 asection *sec;
5889 bfd_byte *contents = NULL;
5890 int state = 0;
5891 int regs[3], numregs = 0;
5892 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5893 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5894
c7b8f16e
JB		 5895 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5896 The states transition as follows:
906e58ca 5897
c7b8f16e
JB		 5898 0 -> 1 (vector) or 0 -> 2 (scalar)
5899 A VFP FMAC-pipeline instruction has been seen. Fill
5900 regs[0]..regs[numregs-1] with its input operands. Remember this
5901 instruction in 'first_fmac'.
5902
5903 1 -> 2
5904 Any instruction, except for a VFP instruction which overwrites
5905 regs[*].
906e58ca 5906
c7b8f16e
JB		 5907 1 -> 3 [ -> 0 ] or
5908 2 -> 3 [ -> 0 ]
5909 A VFP instruction has been seen which overwrites any of regs[*].
5910 We must make a veneer! Reset state to 0 before examining next
5911 instruction.
906e58ca 5912
c7b8f16e
JB		 5913 2 -> 0
5914 If we fail to match anything in state 2, reset to state 0 and reset
5915 the instruction pointer to the instruction after 'first_fmac'.
5916
5917 If the VFP11 vector mode is in use, there must be at least two unrelated
5918 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5919 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5920
5921 /* If we are only performing a partial link do not bother
5922 to construct any glue. */
5923 if (link_info->relocatable)
5924 return TRUE;
5925
0ffa91dd
NC		 5926 /* Skip if this bfd does not correspond to an ELF image. */
5927 if (! is_arm_elf (abfd))
5928 return TRUE;
906e58ca 5929
c7b8f16e
JB		 5930 /* We should have chosen a fix type by the time we get here. */
5931 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5932
5933 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5934 return TRUE;
2e6030b9 5935
33a7ffc2
JM		 5936 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5937 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5938 return TRUE;
5939
c7b8f16e
JB		 5940 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5941 {
5942 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5943 struct _arm_elf_section_data *sec_data;
5944
5945 /* If we don't have executable progbits, we're not interested in this
5946 section. Also skip if section is to be excluded. */
5947 if (elf_section_type (sec) != SHT_PROGBITS
5948 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5949 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5950 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5951 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5952 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5953 continue;
5954
5955 sec_data = elf32_arm_section_data (sec);
906e58ca 5956
c7b8f16e
JB		 5957 if (sec_data->mapcount == 0)
5958 continue;
906e58ca 5959
c7b8f16e
JB		 5960 if (elf_section_data (sec)->this_hdr.contents != NULL)
5961 contents = elf_section_data (sec)->this_hdr.contents;
5962 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5963 goto error_return;
5964
5965 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5966 elf32_arm_compare_mapping);
5967
5968 for (span = 0; span < sec_data->mapcount; span++)
5969 {
5970 unsigned int span_start = sec_data->map[span].vma;
5971 unsigned int span_end = (span == sec_data->mapcount - 1)
5972 ? sec->size : sec_data->map[span + 1].vma;
5973 char span_type = sec_data->map[span].type;
906e58ca 5974
c7b8f16e
JB		 5975 /* FIXME: Only ARM mode is supported at present. We may need to
5976 support Thumb-2 mode also at some point. */
5977 if (span_type != 'a')
5978 continue;
5979
5980 for (i = span_start; i < span_end;)
5981 {
5982 unsigned int next_i = i + 4;
5983 unsigned int insn = bfd_big_endian (abfd)
5984 ? (contents[i] << 24)
5985 | (contents[i + 1] << 16)
5986 | (contents[i + 2] << 8)
5987 | contents[i + 3]
5988 : (contents[i + 3] << 24)
5989 | (contents[i + 2] << 16)
5990 | (contents[i + 1] << 8)
5991 | contents[i];
5992 unsigned int writemask = 0;
91d6fa6a 5993 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 5994
5995 switch (state)
5996 {
5997 case 0:
91d6fa6a 5998 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 5999 &numregs);
6000 /* I'm assuming the VFP11 erratum can trigger with denorm
6001 operands on either the FMAC or the DS pipeline. This might
6002 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6003 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6004 {
6005 state = use_vector ? 1 : 2;
6006 first_fmac = i;
6007 veneer_of_insn = insn;
6008 }
6009 break;
6010
6011 case 1:
6012 {
6013 int other_regs[3], other_numregs;
91d6fa6a 6014 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6015 other_regs,
6016 &other_numregs);
91d6fa6a 6017 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6018 && bfd_arm_vfp11_antidependency (writemask, regs,
6019 numregs))
6020 state = 3;
6021 else
6022 state = 2;
6023 }
6024 break;
6025
6026 case 2:
6027 {
6028 int other_regs[3], other_numregs;
91d6fa6a 6029 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6030 other_regs,
6031 &other_numregs);
91d6fa6a 6032 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6033 && bfd_arm_vfp11_antidependency (writemask, regs,
6034 numregs))
6035 state = 3;
6036 else
6037 {
6038 state = 0;
6039 next_i = first_fmac + 4;
6040 }
6041 }
6042 break;
6043
6044 case 3:
6045 abort (); /* Should be unreachable. */
6046 }
6047
6048 if (state == 3)
6049 {
21d799b5
NC		 6050 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6051 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e
JB		 6052 int errcount;
6053
6054 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6055
6056 newerr->u.b.vfp_insn = veneer_of_insn;
6057
6058 switch (span_type)
6059 {
6060 case 'a':
6061 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6062 break;
906e58ca 6063
c7b8f16e
JB		 6064 default:
6065 abort ();
6066 }
6067
6068 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6069 first_fmac);
6070
6071 newerr->vma = -1;
6072
6073 newerr->next = sec_data->erratumlist;
6074 sec_data->erratumlist = newerr;
6075
6076 state = 0;
6077 }
6078
6079 i = next_i;
6080 }
6081 }
906e58ca 6082
c7b8f16e
JB		 6083 if (contents != NULL
6084 && elf_section_data (sec)->this_hdr.contents != contents)
6085 free (contents);
6086 contents = NULL;
6087 }
6088
6089 return TRUE;
6090
6091error_return:
6092 if (contents != NULL
6093 && elf_section_data (sec)->this_hdr.contents != contents)
6094 free (contents);
906e58ca 6095
c7b8f16e
JB		 6096 return FALSE;
6097}
6098
6099/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6100 after sections have been laid out, using specially-named symbols. */
6101
6102void
6103bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6104 struct bfd_link_info *link_info)
6105{
6106 asection *sec;
6107 struct elf32_arm_link_hash_table *globals;
6108 char *tmp_name;
906e58ca 6109
c7b8f16e
JB		 6110 if (link_info->relocatable)
6111 return;
2e6030b9
MS		 6112
6113 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6114 if (! is_arm_elf (abfd))
2e6030b9
MS		 6115 return;
6116
c7b8f16e 6117 globals = elf32_arm_hash_table (link_info);
906e58ca 6118
21d799b5
NC		 6119 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6120 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6121
6122 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6123 {
6124 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6125 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6126
c7b8f16e
JB		 6127 for (; errnode != NULL; errnode = errnode->next)
6128 {
6129 struct elf_link_hash_entry *myh;
6130 bfd_vma vma;
6131
6132 switch (errnode->type)
6133 {
6134 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6135 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6136 /* Find veneer symbol. */
6137 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6138 errnode->u.b.veneer->u.v.id);
6139
6140 myh = elf_link_hash_lookup
6141 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6142
6143 if (myh == NULL)
6144 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6145 "`%s'"), abfd, tmp_name);
6146
6147 vma = myh->root.u.def.section->output_section->vma
6148 + myh->root.u.def.section->output_offset
6149 + myh->root.u.def.value;
6150
6151 errnode->u.b.veneer->vma = vma;
6152 break;
6153
6154 case VFP11_ERRATUM_ARM_VENEER:
6155 case VFP11_ERRATUM_THUMB_VENEER:
6156 /* Find return location. */
6157 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6158 errnode->u.v.id);
6159
6160 myh = elf_link_hash_lookup
6161 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6162
6163 if (myh == NULL)
6164 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6165 "`%s'"), abfd, tmp_name);
6166
6167 vma = myh->root.u.def.section->output_section->vma
6168 + myh->root.u.def.section->output_offset
6169 + myh->root.u.def.value;
6170
6171 errnode->u.v.branch->vma = vma;
6172 break;
906e58ca 6173
c7b8f16e
JB		 6174 default:
6175 abort ();
6176 }
6177 }
6178 }
906e58ca 6179
c7b8f16e
JB		 6180 free (tmp_name);
6181}
6182
6183
eb043451
PB		 6184/* Set target relocation values needed during linking. */
6185
6186void
bf21ed78
MS		 6187bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6188 struct bfd_link_info *link_info,
eb043451 6189 int target1_is_rel,
319850b4 6190 char * target2_type,
33bfe774 6191 int fix_v4bx,
c7b8f16e 6192 int use_blx,
bf21ed78 6193 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6194 int no_enum_warn, int no_wchar_warn,
48229727 6195 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6196{
6197 struct elf32_arm_link_hash_table *globals;
6198
6199 globals = elf32_arm_hash_table (link_info);
6200
6201 globals->target1_is_rel = target1_is_rel;
6202 if (strcmp (target2_type, "rel") == 0)
6203 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6204 else if (strcmp (target2_type, "abs") == 0)
6205 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6206 else if (strcmp (target2_type, "got-rel") == 0)
6207 globals->target2_reloc = R_ARM_GOT_PREL;
6208 else
6209 {
6210 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6211 target2_type);
6212 }
319850b4 6213 globals->fix_v4bx = fix_v4bx;
33bfe774 6214 globals->use_blx |= use_blx;
c7b8f16e 6215 globals->vfp11_fix = vfp11_fix;
27e55c4d 6216 globals->pic_veneer = pic_veneer;
48229727 6217 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6218
0ffa91dd
NC		 6219 BFD_ASSERT (is_arm_elf (output_bfd));
6220 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6221 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6222}
eb043451 6223
12a0a0fd 6224/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6225
12a0a0fd
PB		 6226static void
6227insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6228{
6229 bfd_vma upper;
6230 bfd_vma lower;
6231 int reloc_sign;
6232
6233 BFD_ASSERT ((offset & 1) == 0);
6234
6235 upper = bfd_get_16 (abfd, insn);
6236 lower = bfd_get_16 (abfd, insn + 2);
6237 reloc_sign = (offset < 0) ? 1 : 0;
6238 upper = (upper & ~(bfd_vma) 0x7ff)
6239 | ((offset >> 12) & 0x3ff)
6240 | (reloc_sign << 10);
906e58ca 6241 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6242 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6243 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6244 | ((offset >> 1) & 0x7ff);
6245 bfd_put_16 (abfd, upper, insn);
6246 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6247}
6248
9b485d32
NC		 6249/* Thumb code calling an ARM function. */
6250
252b5132 6251static int
57e8b36a
NC		 6252elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6253 const char * name,
6254 bfd * input_bfd,
6255 bfd * output_bfd,
6256 asection * input_section,
6257 bfd_byte * hit_data,
6258 asection * sym_sec,
6259 bfd_vma offset,
6260 bfd_signed_vma addend,
f2a9dd69
DJ		 6261 bfd_vma val,
6262 char **error_message)
252b5132 6263{
bcbdc74c 6264 asection * s = 0;
dc810e39 6265 bfd_vma my_offset;
252b5132 6266 long int ret_offset;
bcbdc74c
NC		 6267 struct elf_link_hash_entry * myh;
6268 struct elf32_arm_link_hash_table * globals;
252b5132 6269
f2a9dd69 6270 myh = find_thumb_glue (info, name, error_message);
252b5132 6271 if (myh == NULL)
b34976b6 6272 return FALSE;
252b5132
RH		 6273
6274 globals = elf32_arm_hash_table (info);
6275
6276 BFD_ASSERT (globals != NULL);
6277 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6278
6279 my_offset = myh->root.u.def.value;
6280
6281 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6282 THUMB2ARM_GLUE_SECTION_NAME);
6283
6284 BFD_ASSERT (s != NULL);
6285 BFD_ASSERT (s->contents != NULL);
6286 BFD_ASSERT (s->output_section != NULL);
6287
6288 if ((my_offset & 0x01) == 0x01)
6289 {
6290 if (sym_sec != NULL
6291 && sym_sec->owner != NULL
6292 && !INTERWORK_FLAG (sym_sec->owner))
6293 {
8f615d07 6294 (*_bfd_error_handler)
d003868e
AM		 6295 (_("%B(%s): warning: interworking not enabled.\n"
6296 " first occurrence: %B: thumb call to arm"),
6297 sym_sec->owner, input_bfd, name);
252b5132 6298
b34976b6 6299 return FALSE;
252b5132
RH		 6300 }
6301
6302 --my_offset;
6303 myh->root.u.def.value = my_offset;
6304
52ab56c2
PB		 6305 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6306 s->contents + my_offset);
252b5132 6307
52ab56c2
PB		 6308 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6309 s->contents + my_offset + 2);
252b5132
RH		 6310
6311 ret_offset =
9b485d32
NC		 6312 /* Address of destination of the stub. */
6313 ((bfd_signed_vma) val)
252b5132 6314 - ((bfd_signed_vma)
57e8b36a
NC		 6315 /* Offset from the start of the current section
6316 to the start of the stubs. */
9b485d32
NC		 6317 (s->output_offset
6318 /* Offset of the start of this stub from the start of the stubs. */
6319 + my_offset
6320 /* Address of the start of the current section. */
6321 + s->output_section->vma)
6322 /* The branch instruction is 4 bytes into the stub. */
6323 + 4
6324 /* ARM branches work from the pc of the instruction + 8. */
6325 + 8);
252b5132 6326
52ab56c2
PB		 6327 put_arm_insn (globals, output_bfd,
6328 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6329 s->contents + my_offset + 4);
252b5132
RH		 6330 }
6331
6332 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6333
427bfd90
NC		 6334 /* Now go back and fix up the original BL insn to point to here. */
6335 ret_offset =
6336 /* Address of where the stub is located. */
6337 (s->output_section->vma + s->output_offset + my_offset)
6338 /* Address of where the BL is located. */
57e8b36a
NC		 6339 - (input_section->output_section->vma + input_section->output_offset
6340 + offset)
427bfd90
NC		 6341 /* Addend in the relocation. */
6342 - addend
6343 /* Biassing for PC-relative addressing. */
6344 - 8;
252b5132 6345
12a0a0fd 6346 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6347
b34976b6 6348 return TRUE;
252b5132
RH		 6349}
6350
a4fd1a8e 6351/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6352
a4fd1a8e
PB		 6353static struct elf_link_hash_entry *
6354elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6355 const char * name,
6356 bfd * input_bfd,
6357 bfd * output_bfd,
6358 asection * sym_sec,
6359 bfd_vma val,
8029a119
NC		 6360 asection * s,
6361 char ** error_message)
252b5132 6362{
dc810e39 6363 bfd_vma my_offset;
252b5132 6364 long int ret_offset;
bcbdc74c
NC		 6365 struct elf_link_hash_entry * myh;
6366 struct elf32_arm_link_hash_table * globals;
252b5132 6367
f2a9dd69 6368 myh = find_arm_glue (info, name, error_message);
252b5132 6369 if (myh == NULL)
a4fd1a8e 6370 return NULL;
252b5132
RH		 6371
6372 globals = elf32_arm_hash_table (info);
6373
6374 BFD_ASSERT (globals != NULL);
6375 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6376
6377 my_offset = myh->root.u.def.value;
252b5132
RH		 6378
6379 if ((my_offset & 0x01) == 0x01)
6380 {
6381 if (sym_sec != NULL
6382 && sym_sec->owner != NULL
6383 && !INTERWORK_FLAG (sym_sec->owner))
6384 {
8f615d07 6385 (*_bfd_error_handler)
d003868e
AM		 6386 (_("%B(%s): warning: interworking not enabled.\n"
6387 " first occurrence: %B: arm call to thumb"),
6388 sym_sec->owner, input_bfd, name);
252b5132 6389 }
9b485d32 6390
252b5132
RH		 6391 --my_offset;
6392 myh->root.u.def.value = my_offset;
6393
27e55c4d
PB		 6394 if (info->shared || globals->root.is_relocatable_executable
6395 || globals->pic_veneer)
8f6277f5
PB		 6396 {
6397 /* For relocatable objects we can't use absolute addresses,
6398 so construct the address from a relative offset. */
6399 /* TODO: If the offset is small it's probably worth
6400 constructing the address with adds. */
52ab56c2
PB		 6401 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6402 s->contents + my_offset);
6403 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6404 s->contents + my_offset + 4);
6405 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6406 s->contents + my_offset + 8);
8f6277f5
PB		 6407 /* Adjust the offset by 4 for the position of the add,
6408 and 8 for the pipeline offset. */
6409 ret_offset = (val - (s->output_offset
6410 + s->output_section->vma
6411 + my_offset + 12))
6412 | 1;
6413 bfd_put_32 (output_bfd, ret_offset,
6414 s->contents + my_offset + 12);
6415 }
26079076
PB		 6416 else if (globals->use_blx)
6417 {
6418 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6419 s->contents + my_offset);
6420
6421 /* It's a thumb address. Add the low order bit. */
6422 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6423 s->contents + my_offset + 4);
6424 }
8f6277f5
PB		 6425 else
6426 {
52ab56c2
PB		 6427 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6428 s->contents + my_offset);
252b5132 6429
52ab56c2
PB		 6430 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6431 s->contents + my_offset + 4);
252b5132 6432
8f6277f5
PB		 6433 /* It's a thumb address. Add the low order bit. */
6434 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6435 s->contents + my_offset + 8);
8029a119
NC		 6436
6437 my_offset += 12;
8f6277f5 6438 }
252b5132
RH		 6439 }
6440
6441 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6442
a4fd1a8e
PB		 6443 return myh;
6444}
6445
6446/* Arm code calling a Thumb function. */
6447
6448static int
6449elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6450 const char * name,
6451 bfd * input_bfd,
6452 bfd * output_bfd,
6453 asection * input_section,
6454 bfd_byte * hit_data,
6455 asection * sym_sec,
6456 bfd_vma offset,
6457 bfd_signed_vma addend,
f2a9dd69
DJ		 6458 bfd_vma val,
6459 char **error_message)
a4fd1a8e
PB		 6460{
6461 unsigned long int tmp;
6462 bfd_vma my_offset;
6463 asection * s;
6464 long int ret_offset;
6465 struct elf_link_hash_entry * myh;
6466 struct elf32_arm_link_hash_table * globals;
6467
6468 globals = elf32_arm_hash_table (info);
6469
6470 BFD_ASSERT (globals != NULL);
6471 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6472
6473 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6474 ARM2THUMB_GLUE_SECTION_NAME);
6475 BFD_ASSERT (s != NULL);
6476 BFD_ASSERT (s->contents != NULL);
6477 BFD_ASSERT (s->output_section != NULL);
6478
6479 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6480 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6481 if (!myh)
6482 return FALSE;
6483
6484 my_offset = myh->root.u.def.value;
252b5132
RH		 6485 tmp = bfd_get_32 (input_bfd, hit_data);
6486 tmp = tmp & 0xFF000000;
6487
9b485d32 6488 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6489 ret_offset = (s->output_offset
6490 + my_offset
6491 + s->output_section->vma
6492 - (input_section->output_offset
6493 + input_section->output_section->vma
6494 + offset + addend)
6495 - 8);
9a5aca8c 6496
252b5132
RH		 6497 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6498
dc810e39 6499 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6500
b34976b6 6501 return TRUE;
252b5132
RH		 6502}
6503
a4fd1a8e
PB		 6504/* Populate Arm stub for an exported Thumb function. */
6505
6506static bfd_boolean
6507elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6508{
6509 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6510 asection * s;
6511 struct elf_link_hash_entry * myh;
6512 struct elf32_arm_link_hash_entry *eh;
6513 struct elf32_arm_link_hash_table * globals;
6514 asection *sec;
6515 bfd_vma val;
f2a9dd69 6516 char *error_message;
a4fd1a8e 6517
906e58ca 6518 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6519 /* Allocate stubs for exported Thumb functions on v4t. */
6520 if (eh->export_glue == NULL)
6521 return TRUE;
6522
6523 globals = elf32_arm_hash_table (info);
6524
6525 BFD_ASSERT (globals != NULL);
6526 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6527
6528 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6529 ARM2THUMB_GLUE_SECTION_NAME);
6530 BFD_ASSERT (s != NULL);
6531 BFD_ASSERT (s->contents != NULL);
6532 BFD_ASSERT (s->output_section != NULL);
6533
6534 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6535
6536 BFD_ASSERT (sec->output_section != NULL);
6537
a4fd1a8e
PB		 6538 val = eh->export_glue->root.u.def.value + sec->output_offset
6539 + sec->output_section->vma;
8029a119 6540
a4fd1a8e
PB		 6541 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6542 h->root.u.def.section->owner,
f2a9dd69
DJ		 6543 globals->obfd, sec, val, s,
6544 &error_message);
a4fd1a8e
PB		 6545 BFD_ASSERT (myh);
6546 return TRUE;
6547}
6548
845b51d6
PB		 6549/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6550
6551static bfd_vma
6552elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6553{
6554 bfd_byte *p;
6555 bfd_vma glue_addr;
6556 asection *s;
6557 struct elf32_arm_link_hash_table *globals;
6558
6559 globals = elf32_arm_hash_table (info);
6560
6561 BFD_ASSERT (globals != NULL);
6562 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6563
6564 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6565 ARM_BX_GLUE_SECTION_NAME);
6566 BFD_ASSERT (s != NULL);
6567 BFD_ASSERT (s->contents != NULL);
6568 BFD_ASSERT (s->output_section != NULL);
6569
6570 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6571
6572 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6573
6574 if ((globals->bx_glue_offset[reg] & 1) == 0)
6575 {
6576 p = s->contents + glue_addr;
6577 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6578 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6579 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6580 globals->bx_glue_offset[reg] |= 1;
6581 }
6582
6583 return glue_addr + s->output_section->vma + s->output_offset;
6584}
6585
a4fd1a8e
PB		 6586/* Generate Arm stubs for exported Thumb symbols. */
6587static void
906e58ca 6588elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6589 struct bfd_link_info *link_info)
6590{
6591 struct elf32_arm_link_hash_table * globals;
6592
8029a119
NC		 6593 if (link_info == NULL)
6594 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6595 return;
6596
6597 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6598 /* If blx is available then exported Thumb symbols are OK and there is
6599 nothing to do. */
a4fd1a8e
PB		 6600 if (globals->use_blx)
6601 return;
6602
6603 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6604 link_info);
6605}
6606
eb043451
PB		 6607/* Some relocations map to different relocations depending on the
6608 target. Return the real relocation. */
8029a119 6609
eb043451
PB		 6610static int
6611arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6612 int r_type)
6613{
6614 switch (r_type)
6615 {
6616 case R_ARM_TARGET1:
6617 if (globals->target1_is_rel)
6618 return R_ARM_REL32;
6619 else
6620 return R_ARM_ABS32;
6621
6622 case R_ARM_TARGET2:
6623 return globals->target2_reloc;
6624
6625 default:
6626 return r_type;
6627 }
6628}
eb043451 6629
ba93b8ac
DJ		 6630/* Return the base VMA address which should be subtracted from real addresses
6631 when resolving @dtpoff relocation.
6632 This is PT_TLS segment p_vaddr. */
6633
6634static bfd_vma
6635dtpoff_base (struct bfd_link_info *info)
6636{
6637 /* If tls_sec is NULL, we should have signalled an error already. */
6638 if (elf_hash_table (info)->tls_sec == NULL)
6639 return 0;
6640 return elf_hash_table (info)->tls_sec->vma;
6641}
6642
6643/* Return the relocation value for @tpoff relocation
6644 if STT_TLS virtual address is ADDRESS. */
6645
6646static bfd_vma
6647tpoff (struct bfd_link_info *info, bfd_vma address)
6648{
6649 struct elf_link_hash_table *htab = elf_hash_table (info);
6650 bfd_vma base;
6651
6652 /* If tls_sec is NULL, we should have signalled an error already. */
6653 if (htab->tls_sec == NULL)
6654 return 0;
6655 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6656 return address - htab->tls_sec->vma + base;
6657}
6658
00a97672
RS		 6659/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6660 VALUE is the relocation value. */
6661
6662static bfd_reloc_status_type
6663elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6664{
6665 if (value > 0xfff)
6666 return bfd_reloc_overflow;
6667
6668 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6669 bfd_put_32 (abfd, value, data);
6670 return bfd_reloc_ok;
6671}
6672
4962c51a
MS		 6673/* For a given value of n, calculate the value of G_n as required to
6674 deal with group relocations. We return it in the form of an
6675 encoded constant-and-rotation, together with the final residual. If n is
6676 specified as less than zero, then final_residual is filled with the
6677 input value and no further action is performed. */
6678
6679static bfd_vma
6680calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6681{
6682 int current_n;
6683 bfd_vma g_n;
6684 bfd_vma encoded_g_n = 0;
6685 bfd_vma residual = value; /* Also known as Y_n. */
6686
6687 for (current_n = 0; current_n <= n; current_n++)
6688 {
6689 int shift;
6690
6691 /* Calculate which part of the value to mask. */
6692 if (residual == 0)
6693 shift = 0;
6694 else
6695 {
6696 int msb;
6697
6698 /* Determine the most significant bit in the residual and
6699 align the resulting value to a 2-bit boundary. */
6700 for (msb = 30; msb >= 0; msb -= 2)
6701 if (residual & (3 << msb))
6702 break;
6703
6704 /* The desired shift is now (msb - 6), or zero, whichever
6705 is the greater. */
6706 shift = msb - 6;
6707 if (shift < 0)
6708 shift = 0;
6709 }
6710
6711 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6712 g_n = residual & (0xff << shift);
6713 encoded_g_n = (g_n >> shift)
6714 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6715
6716 /* Calculate the residual for the next time around. */
6717 residual &= ~g_n;
6718 }
6719
6720 *final_residual = residual;
6721
6722 return encoded_g_n;
6723}
6724
6725/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6726 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6727
4962c51a 6728static int
906e58ca 6729identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6730{
6731 int opcode = insn & 0x1e00000;
6732
6733 if (opcode == 1 << 23) /* ADD */
6734 return 1;
6735
6736 if (opcode == 1 << 22) /* SUB */
6737 return -1;
6738
6739 return 0;
6740}
6741
252b5132 6742/* Perform a relocation as part of a final link. */
9b485d32 6743
252b5132 6744static bfd_reloc_status_type
57e8b36a
NC		 6745elf32_arm_final_link_relocate (reloc_howto_type * howto,
6746 bfd * input_bfd,
6747 bfd * output_bfd,
6748 asection * input_section,
6749 bfd_byte * contents,
6750 Elf_Internal_Rela * rel,
6751 bfd_vma value,
6752 struct bfd_link_info * info,
6753 asection * sym_sec,
6754 const char * sym_name,
6755 int sym_flags,
0945cdfd 6756 struct elf_link_hash_entry * h,
f2a9dd69 6757 bfd_boolean * unresolved_reloc_p,
8029a119 6758 char ** error_message)
252b5132
RH		 6759{
6760 unsigned long r_type = howto->type;
6761 unsigned long r_symndx;
6762 bfd_byte * hit_data = contents + rel->r_offset;
6763 bfd * dynobj = NULL;
6764 Elf_Internal_Shdr * symtab_hdr;
6765 struct elf_link_hash_entry ** sym_hashes;
6766 bfd_vma * local_got_offsets;
6767 asection * sgot = NULL;
6768 asection * splt = NULL;
6769 asection * sreloc = NULL;
252b5132 6770 bfd_vma addend;
ba96a88f
NC		 6771 bfd_signed_vma signed_addend;
6772 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6773
9c504268
PB		 6774 globals = elf32_arm_hash_table (info);
6775
0ffa91dd
NC		 6776 BFD_ASSERT (is_arm_elf (input_bfd));
6777
6778 /* Some relocation types map to different relocations depending on the
9c504268 6779 target. We pick the right one here. */
eb043451
PB		 6780 r_type = arm_real_reloc_type (globals, r_type);
6781 if (r_type != howto->type)
6782 howto = elf32_arm_howto_from_type (r_type);
9c504268 6783
cac15327
NC		 6784 /* If the start address has been set, then set the EF_ARM_HASENTRY
6785 flag. Setting this more than once is redundant, but the cost is
6786 not too high, and it keeps the code simple.
99e4ae17 6787
cac15327
NC		 6788 The test is done here, rather than somewhere else, because the
6789 start address is only set just before the final link commences.
6790
6791 Note - if the user deliberately sets a start address of 0, the
6792 flag will not be set. */
6793 if (bfd_get_start_address (output_bfd) != 0)
6794 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6795
252b5132
RH		 6796 dynobj = elf_hash_table (info)->dynobj;
6797 if (dynobj)
6798 {
6799 sgot = bfd_get_section_by_name (dynobj, ".got");
6800 splt = bfd_get_section_by_name (dynobj, ".plt");
6801 }
0ffa91dd 6802 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6803 sym_hashes = elf_sym_hashes (input_bfd);
6804 local_got_offsets = elf_local_got_offsets (input_bfd);
6805 r_symndx = ELF32_R_SYM (rel->r_info);
6806
4e7fd91e 6807 if (globals->use_rel)
ba96a88f 6808 {
4e7fd91e
PB		 6809 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6810
6811 if (addend & ((howto->src_mask + 1) >> 1))
6812 {
6813 signed_addend = -1;
6814 signed_addend &= ~ howto->src_mask;
6815 signed_addend |= addend;
6816 }
6817 else
6818 signed_addend = addend;
ba96a88f
NC		 6819 }
6820 else
4e7fd91e 6821 addend = signed_addend = rel->r_addend;
f21f3fe0 6822
252b5132
RH		 6823 switch (r_type)
6824 {
6825 case R_ARM_NONE:
28a094c2
DJ		 6826 /* We don't need to find a value for this symbol. It's just a
6827 marker. */
6828 *unresolved_reloc_p = FALSE;
252b5132
RH		 6829 return bfd_reloc_ok;
6830
00a97672
RS		 6831 case R_ARM_ABS12:
6832 if (!globals->vxworks_p)
6833 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6834
252b5132
RH		 6835 case R_ARM_PC24:
6836 case R_ARM_ABS32:
bb224fc3 6837 case R_ARM_ABS32_NOI:
252b5132 6838 case R_ARM_REL32:
bb224fc3 6839 case R_ARM_REL32_NOI:
5b5bb741
PB		 6840 case R_ARM_CALL:
6841 case R_ARM_JUMP24:
dfc5f959 6842 case R_ARM_XPC25:
eb043451 6843 case R_ARM_PREL31:
7359ea65 6844 case R_ARM_PLT32:
7359ea65
DJ		 6845 /* Handle relocations which should use the PLT entry. ABS32/REL32
6846 will use the symbol's value, which may point to a PLT entry, but we
6847 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6848 branches in this object should go to it, except if the PLT is too
6849 far away, in which case a long branch stub should be inserted. */
bb224fc3 6850 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6851 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6852 && r_type != R_ARM_CALL
6853 && r_type != R_ARM_JUMP24
6854 && r_type != R_ARM_PLT32)
7359ea65 6855 && h != NULL
c84cd8ee 6856 && splt != NULL
7359ea65
DJ		 6857 && h->plt.offset != (bfd_vma) -1)
6858 {
c84cd8ee
DJ		 6859 /* If we've created a .plt section, and assigned a PLT entry to
6860 this function, it should not be known to bind locally. If
6861 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6862 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6863
6864 value = (splt->output_section->vma
6865 + splt->output_offset
6866 + h->plt.offset);
0945cdfd 6867 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6868 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6869 contents, rel->r_offset, value,
00a97672 6870 rel->r_addend);
7359ea65
DJ		 6871 }
6872
67687978
PB		 6873 /* When generating a shared object or relocatable executable, these
6874 relocations are copied into the output file to be resolved at
6875 run time. */
6876 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6877 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6878 && !(elf32_arm_hash_table (info)->vxworks_p
6879 && strcmp (input_section->output_section->name,
6880 ".tls_vars") == 0)
bb224fc3 6881 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6882 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6883 && (h == NULL
6884 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6885 || h->root.type != bfd_link_hash_undefweak)
6886 && r_type != R_ARM_PC24
5b5bb741
PB		 6887 && r_type != R_ARM_CALL
6888 && r_type != R_ARM_JUMP24
ee06dc07 6889 && r_type != R_ARM_PREL31
7359ea65 6890 && r_type != R_ARM_PLT32)
252b5132 6891 {
947216bf
AM		 6892 Elf_Internal_Rela outrel;
6893 bfd_byte *loc;
b34976b6 6894 bfd_boolean skip, relocate;
f21f3fe0 6895
0945cdfd
DJ		 6896 *unresolved_reloc_p = FALSE;
6897
252b5132
RH		 6898 if (sreloc == NULL)
6899 {
83bac4b0
NC		 6900 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6901 ! globals->use_rel);
f21f3fe0 6902
83bac4b0 6903 if (sreloc == NULL)
252b5132 6904 return bfd_reloc_notsupported;
252b5132 6905 }
f21f3fe0 6906
b34976b6
AM		 6907 skip = FALSE;
6908 relocate = FALSE;
f21f3fe0 6909
00a97672 6910 outrel.r_addend = addend;
c629eae0
JJ		 6911 outrel.r_offset =
6912 _bfd_elf_section_offset (output_bfd, info, input_section,
6913 rel->r_offset);
6914 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6915 skip = TRUE;
0bb2d96a 6916 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6917 skip = TRUE, relocate = TRUE;
252b5132
RH		 6918 outrel.r_offset += (input_section->output_section->vma
6919 + input_section->output_offset);
f21f3fe0 6920
252b5132 6921 if (skip)
0bb2d96a 6922 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6923 else if (h != NULL
6924 && h->dynindx != -1
7359ea65 6925 && (!info->shared
5e681ec4 6926 || !info->symbolic
f5385ebf 6927 || !h->def_regular))
5e681ec4 6928 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6929 else
6930 {
a16385dc
MM		 6931 int symbol;
6932
5e681ec4 6933 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6934 if (sym_flags == STT_ARM_TFUNC)
6935 value |= 1;
a16385dc 6936 if (globals->symbian_p)
6366ff1e 6937 {
74541ad4
AM		 6938 asection *osec;
6939
6366ff1e
MM		 6940 /* On Symbian OS, the data segment and text segement
6941 can be relocated independently. Therefore, we
6942 must indicate the segment to which this
6943 relocation is relative. The BPABI allows us to
6944 use any symbol in the right segment; we just use
6945 the section symbol as it is convenient. (We
6946 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6947 will not appear in the dynamic symbol table.)
6948
6949 Note that the dynamic linker ignores the section
6950 symbol value, so we don't subtract osec->vma
6951 from the emitted reloc addend. */
10dbd1f3 6952 if (sym_sec)
74541ad4 6953 osec = sym_sec->output_section;
10dbd1f3 6954 else
74541ad4
AM		 6955 osec = input_section->output_section;
6956 symbol = elf_section_data (osec)->dynindx;
6957 if (symbol == 0)
6958 {
6959 struct elf_link_hash_table *htab = elf_hash_table (info);
6960
6961 if ((osec->flags & SEC_READONLY) == 0
6962 && htab->data_index_section != NULL)
6963 osec = htab->data_index_section;
6964 else
6965 osec = htab->text_index_section;
6966 symbol = elf_section_data (osec)->dynindx;
6967 }
6366ff1e
MM		 6968 BFD_ASSERT (symbol != 0);
6969 }
a16385dc
MM		 6970 else
6971 /* On SVR4-ish systems, the dynamic loader cannot
6972 relocate the text and data segments independently,
6973 so the symbol does not matter. */
6974 symbol = 0;
6975 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6976 if (globals->use_rel)
6977 relocate = TRUE;
6978 else
6979 outrel.r_addend += value;
252b5132 6980 }
f21f3fe0 6981
947216bf 6982 loc = sreloc->contents;
00a97672
RS		 6983 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6984 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6985
f21f3fe0 6986 /* If this reloc is against an external symbol, we do not want to
252b5132 6987 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6988 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6989 if (! relocate)
6990 return bfd_reloc_ok;
9a5aca8c 6991
f21f3fe0 6992 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6993 contents, rel->r_offset, value,
6994 (bfd_vma) 0);
6995 }
6996 else switch (r_type)
6997 {
00a97672
RS		 6998 case R_ARM_ABS12:
6999 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7000
dfc5f959 7001 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7002 case R_ARM_CALL:
7003 case R_ARM_JUMP24:
8029a119 7004 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7005 case R_ARM_PLT32:
906e58ca 7006 {
906e58ca
NC		 7007 bfd_signed_vma branch_offset;
7008 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7009
dfc5f959 7010 if (r_type == R_ARM_XPC25)
252b5132 7011 {
dfc5f959
NC		 7012 /* Check for Arm calling Arm function. */
7013 /* FIXME: Should we translate the instruction into a BL
7014 instruction instead ? */
7015 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7016 (*_bfd_error_handler)
7017 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7018 input_bfd,
7019 h ? h->root.root.string : "(local)");
dfc5f959 7020 }
155d87d7 7021 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7022 {
7023 /* Check for Arm calling Thumb function. */
7024 if (sym_flags == STT_ARM_TFUNC)
7025 {
f2a9dd69
DJ		 7026 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7027 output_bfd, input_section,
7028 hit_data, sym_sec, rel->r_offset,
7029 signed_addend, value,
7030 error_message))
7031 return bfd_reloc_ok;
7032 else
7033 return bfd_reloc_dangerous;
dfc5f959 7034 }
252b5132 7035 }
ba96a88f 7036
906e58ca 7037 /* Check if a stub has to be inserted because the
8029a119 7038 destination is too far or we are changing mode. */
155d87d7
CL		 7039 if ( r_type == R_ARM_CALL
7040 || r_type == R_ARM_JUMP24
7041 || r_type == R_ARM_PLT32)
906e58ca 7042 {
ffcb4889
NS		 7043 bfd_vma from;
7044
5fa9e92f
CL		 7045 /* If the call goes through a PLT entry, make sure to
7046 check distance to the right destination address. */
7047 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7048 {
7049 value = (splt->output_section->vma
7050 + splt->output_offset
7051 + h->plt.offset);
7052 *unresolved_reloc_p = FALSE;
67d74e43
DJ		 7053 /* The PLT entry is in ARM mode, regardless of the
7054 target function. */
7055 sym_flags = STT_FUNC;
5fa9e92f
CL		 7056 }
7057
7058 from = (input_section->output_section->vma
7059 + input_section->output_offset
7060 + rel->r_offset);
7061 branch_offset = (bfd_signed_vma)(value - from);
7062
906e58ca
NC		 7063 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
7064 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 7065 || ((sym_flags == STT_ARM_TFUNC)
7066 && (((r_type == R_ARM_CALL) && !globals->use_blx)
7067 || (r_type == R_ARM_JUMP24)
7068 || (r_type == R_ARM_PLT32) ))
7069 )
906e58ca
NC		 7070 {
7071 /* The target is out of reach, so redirect the
7072 branch to the local stub for this function. */
7073
7074 stub_entry = elf32_arm_get_stub_entry (input_section,
7075 sym_sec, h,
7076 rel, globals);
7077 if (stub_entry != NULL)
7078 value = (stub_entry->stub_offset
7079 + stub_entry->stub_sec->output_offset
7080 + stub_entry->stub_sec->output_section->vma);
7081 }
7082 }
7083
dea514f5
PB		 7084 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7085 where:
7086 S is the address of the symbol in the relocation.
7087 P is address of the instruction being relocated.
7088 A is the addend (extracted from the instruction) in bytes.
7089
7090 S is held in 'value'.
7091 P is the base address of the section containing the
7092 instruction plus the offset of the reloc into that
7093 section, ie:
7094 (input_section->output_section->vma +
7095 input_section->output_offset +
7096 rel->r_offset).
7097 A is the addend, converted into bytes, ie:
7098 (signed_addend * 4)
7099
7100 Note: None of these operations have knowledge of the pipeline
7101 size of the processor, thus it is up to the assembler to
7102 encode this information into the addend. */
7103 value -= (input_section->output_section->vma
7104 + input_section->output_offset);
7105 value -= rel->r_offset;
4e7fd91e
PB		 7106 if (globals->use_rel)
7107 value += (signed_addend << howto->size);
7108 else
7109 /* RELA addends do not have to be adjusted by howto->size. */
7110 value += signed_addend;
23080146 7111
dcb5e6e6
NC		 7112 signed_addend = value;
7113 signed_addend >>= howto->rightshift;
9a5aca8c 7114
5ab79981 7115 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7116 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7117 Do the same for local undefined symbols.
7118 The jump to the next instruction is optimized as a NOP depending
7119 on the architecture. */
ffcb4889
NS		 7120 if (h ? (h->root.type == bfd_link_hash_undefweak
7121 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7122 : bfd_is_und_section (sym_sec))
5ab79981 7123 {
cd1dac3d
DG		 7124 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7125
7126 if (arch_has_arm_nop (globals))
7127 value |= 0x0320f000;
7128 else
7129 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7130 }
7131 else
59f2c4e7 7132 {
9b485d32 7133 /* Perform a signed range check. */
dcb5e6e6 7134 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7135 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7136 return bfd_reloc_overflow;
9a5aca8c 7137
5ab79981 7138 addend = (value & 2);
39b41c9c 7139
5ab79981
PB		 7140 value = (signed_addend & howto->dst_mask)
7141 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7142
5ab79981
PB		 7143 if (r_type == R_ARM_CALL)
7144 {
155d87d7
CL		 7145 /* Set the H bit in the BLX instruction. */
7146 if (sym_flags == STT_ARM_TFUNC)
7147 {
7148 if (addend)
7149 value |= (1 << 24);
7150 else
7151 value &= ~(bfd_vma)(1 << 24);
7152 }
7153
5ab79981 7154 /* Select the correct instruction (BL or BLX). */
906e58ca 7155 /* Only if we are not handling a BL to a stub. In this
8029a119 7156 case, mode switching is performed by the stub. */
906e58ca 7157 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7158 value |= (1 << 28);
7159 else
7160 {
7161 value &= ~(bfd_vma)(1 << 28);
7162 value |= (1 << 24);
7163 }
39b41c9c
PB		 7164 }
7165 }
906e58ca 7166 }
252b5132 7167 break;
f21f3fe0 7168
252b5132
RH		 7169 case R_ARM_ABS32:
7170 value += addend;
7171 if (sym_flags == STT_ARM_TFUNC)
7172 value |= 1;
7173 break;
f21f3fe0 7174
bb224fc3
MS		 7175 case R_ARM_ABS32_NOI:
7176 value += addend;
7177 break;
7178
252b5132 7179 case R_ARM_REL32:
a8bc6c78
PB		 7180 value += addend;
7181 if (sym_flags == STT_ARM_TFUNC)
7182 value |= 1;
252b5132 7183 value -= (input_section->output_section->vma
62efb346 7184 + input_section->output_offset + rel->r_offset);
252b5132 7185 break;
eb043451 7186
bb224fc3
MS		 7187 case R_ARM_REL32_NOI:
7188 value += addend;
7189 value -= (input_section->output_section->vma
7190 + input_section->output_offset + rel->r_offset);
7191 break;
7192
eb043451
PB		 7193 case R_ARM_PREL31:
7194 value -= (input_section->output_section->vma
7195 + input_section->output_offset + rel->r_offset);
7196 value += signed_addend;
7197 if (! h || h->root.type != bfd_link_hash_undefweak)
7198 {
8029a119 7199 /* Check for overflow. */
eb043451
PB		 7200 if ((value ^ (value >> 1)) & (1 << 30))
7201 return bfd_reloc_overflow;
7202 }
7203 value &= 0x7fffffff;
7204 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7205 if (sym_flags == STT_ARM_TFUNC)
7206 value |= 1;
7207 break;
252b5132 7208 }
f21f3fe0 7209
252b5132
RH		 7210 bfd_put_32 (input_bfd, value, hit_data);
7211 return bfd_reloc_ok;
7212
7213 case R_ARM_ABS8:
7214 value += addend;
4e67d4ca
DG		 7215
7216 /* There is no way to tell whether the user intended to use a signed or
7217 unsigned addend. When checking for overflow we accept either,
7218 as specified by the AAELF. */
7219 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7220 return bfd_reloc_overflow;
7221
7222 bfd_put_8 (input_bfd, value, hit_data);
7223 return bfd_reloc_ok;
7224
7225 case R_ARM_ABS16:
7226 value += addend;
7227
4e67d4ca
DG		 7228 /* See comment for R_ARM_ABS8. */
7229 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7230 return bfd_reloc_overflow;
7231
7232 bfd_put_16 (input_bfd, value, hit_data);
7233 return bfd_reloc_ok;
7234
252b5132 7235 case R_ARM_THM_ABS5:
9b485d32 7236 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7237 if (globals->use_rel)
7238 {
7239 /* Need to refetch addend. */
7240 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7241 /* ??? Need to determine shift amount from operand size. */
7242 addend >>= howto->rightshift;
7243 }
252b5132
RH		 7244 value += addend;
7245
7246 /* ??? Isn't value unsigned? */
7247 if ((long) value > 0x1f || (long) value < -0x10)
7248 return bfd_reloc_overflow;
7249
7250 /* ??? Value needs to be properly shifted into place first. */
7251 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7252 bfd_put_16 (input_bfd, value, hit_data);
7253 return bfd_reloc_ok;
7254
2cab6cc3
MS		 7255 case R_ARM_THM_ALU_PREL_11_0:
7256 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7257 {
7258 bfd_vma insn;
7259 bfd_signed_vma relocation;
7260
7261 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7262 | bfd_get_16 (input_bfd, hit_data + 2);
7263
7264 if (globals->use_rel)
7265 {
7266 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7267 | ((insn & (1 << 26)) >> 15);
7268 if (insn & 0xf00000)
7269 signed_addend = -signed_addend;
7270 }
7271
7272 relocation = value + signed_addend;
7273 relocation -= (input_section->output_section->vma
7274 + input_section->output_offset
7275 + rel->r_offset);
7276
7277 value = abs (relocation);
7278
7279 if (value >= 0x1000)
7280 return bfd_reloc_overflow;
7281
7282 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7283 | ((value & 0x700) << 4)
7284 | ((value & 0x800) << 15);
7285 if (relocation < 0)
7286 insn |= 0xa00000;
7287
7288 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7289 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7290
7291 return bfd_reloc_ok;
7292 }
7293
e1ec24c6
NC		 7294 case R_ARM_THM_PC8:
7295 /* PR 10073: This reloc is not generated by the GNU toolchain,
7296 but it is supported for compatibility with third party libraries
7297 generated by other compilers, specifically the ARM/IAR. */
7298 {
7299 bfd_vma insn;
7300 bfd_signed_vma relocation;
7301
7302 insn = bfd_get_16 (input_bfd, hit_data);
7303
7304 if (globals->use_rel)
7305 addend = (insn & 0x00ff) << 2;
7306
7307 relocation = value + addend;
7308 relocation -= (input_section->output_section->vma
7309 + input_section->output_offset
7310 + rel->r_offset);
7311
7312 value = abs (relocation);
7313
7314 /* We do not check for overflow of this reloc. Although strictly
7315 speaking this is incorrect, it appears to be necessary in order
7316 to work with IAR generated relocs. Since GCC and GAS do not
7317 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7318 a problem for them. */
7319 value &= 0x3fc;
7320
7321 insn = (insn & 0xff00) | (value >> 2);
7322
7323 bfd_put_16 (input_bfd, insn, hit_data);
7324
7325 return bfd_reloc_ok;
7326 }
7327
2cab6cc3
MS		 7328 case R_ARM_THM_PC12:
7329 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7330 {
7331 bfd_vma insn;
7332 bfd_signed_vma relocation;
7333
7334 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7335 | bfd_get_16 (input_bfd, hit_data + 2);
7336
7337 if (globals->use_rel)
7338 {
7339 signed_addend = insn & 0xfff;
7340 if (!(insn & (1 << 23)))
7341 signed_addend = -signed_addend;
7342 }
7343
7344 relocation = value + signed_addend;
7345 relocation -= (input_section->output_section->vma
7346 + input_section->output_offset
7347 + rel->r_offset);
7348
7349 value = abs (relocation);
7350
7351 if (value >= 0x1000)
7352 return bfd_reloc_overflow;
7353
7354 insn = (insn & 0xff7ff000) | value;
7355 if (relocation >= 0)
7356 insn |= (1 << 23);
7357
7358 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7359 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7360
7361 return bfd_reloc_ok;
7362 }
7363
dfc5f959 7364 case R_ARM_THM_XPC22:
c19d1205 7365 case R_ARM_THM_CALL:
bd97cb95 7366 case R_ARM_THM_JUMP24:
dfc5f959 7367 /* Thumb BL (branch long instruction). */
252b5132 7368 {
b34976b6 7369 bfd_vma relocation;
e95de063 7370 bfd_vma reloc_sign;
b34976b6
AM		 7371 bfd_boolean overflow = FALSE;
7372 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7373 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7374 bfd_signed_vma reloc_signed_max;
7375 bfd_signed_vma reloc_signed_min;
b34976b6 7376 bfd_vma check;
252b5132 7377 bfd_signed_vma signed_check;
e95de063 7378 int bitsize;
cd1dac3d 7379 const int thumb2 = using_thumb2 (globals);
252b5132 7380
5ab79981 7381 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7382 the next instruction unless a PLT entry will be created.
7383 The jump to the next instruction is optimized as a NOP.W for
7384 Thumb-2 enabled architectures. */
19540007
JM		 7385 if (h && h->root.type == bfd_link_hash_undefweak
7386 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7387 {
cd1dac3d
DG		 7388 if (arch_has_thumb2_nop (globals))
7389 {
7390 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7391 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7392 }
7393 else
7394 {
7395 bfd_put_16 (input_bfd, 0xe000, hit_data);
7396 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7397 }
5ab79981
PB		 7398 return bfd_reloc_ok;
7399 }
7400
e95de063
MS		 7401 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7402 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7403 if (globals->use_rel)
7404 {
e95de063
MS		 7405 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7406 bfd_vma upper = upper_insn & 0x3ff;
7407 bfd_vma lower = lower_insn & 0x7ff;
7408 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7409 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7410 bfd_vma i1 = j1 ^ s ? 0 : 1;
7411 bfd_vma i2 = j2 ^ s ? 0 : 1;
7412
7413 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7414 /* Sign extend. */
7415 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7416
4e7fd91e
PB		 7417 signed_addend = addend;
7418 }
cb1afa5c 7419
dfc5f959
NC		 7420 if (r_type == R_ARM_THM_XPC22)
7421 {
7422 /* Check for Thumb to Thumb call. */
7423 /* FIXME: Should we translate the instruction into a BL
7424 instruction instead ? */
7425 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7426 (*_bfd_error_handler)
7427 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7428 input_bfd,
7429 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7430 }
7431 else
252b5132 7432 {
dfc5f959
NC		 7433 /* If it is not a call to Thumb, assume call to Arm.
7434 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7435 function call at all, but rather a long jump. Calls through
7436 the PLT do not require stubs. */
7437 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7438 && (h == NULL || splt == NULL
7439 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7440 {
bd97cb95 7441 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7442 {
7443 /* Convert BL to BLX. */
7444 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7445 }
155d87d7
CL		 7446 else if (( r_type != R_ARM_THM_CALL)
7447 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7448 {
7449 if (elf32_thumb_to_arm_stub
7450 (info, sym_name, input_bfd, output_bfd, input_section,
7451 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7452 error_message))
7453 return bfd_reloc_ok;
7454 else
7455 return bfd_reloc_dangerous;
7456 }
da5938a2 7457 }
bd97cb95
DJ		 7458 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7459 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7460 {
7461 /* Make sure this is a BL. */
7462 lower_insn |= 0x1800;
7463 }
252b5132 7464 }
f21f3fe0 7465
b7693d02
DJ		 7466 /* Handle calls via the PLT. */
7467 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7468 {
7469 value = (splt->output_section->vma
7470 + splt->output_offset
7471 + h->plt.offset);
bd97cb95 7472 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7473 {
7474 /* If the Thumb BLX instruction is available, convert the
7475 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7476 lower_insn = (lower_insn & ~0x1000) | 0x0800;
67d74e43 7477 sym_flags = STT_FUNC;
33bfe774
JB		 7478 }
7479 else
67d74e43
DJ		 7480 {
7481 /* Target the Thumb stub before the ARM PLT entry. */
7482 value -= PLT_THUMB_STUB_SIZE;
7483 sym_flags = STT_ARM_TFUNC;
7484 }
0945cdfd 7485 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7486 }
7487
155d87d7 7488 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7489 {
7490 /* Check if a stub has to be inserted because the destination
8029a119 7491 is too far. */
906e58ca
NC		 7492 bfd_vma from;
7493 bfd_signed_vma branch_offset;
7494 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7495
7496 from = (input_section->output_section->vma
7497 + input_section->output_offset
7498 + rel->r_offset);
7499 branch_offset = (bfd_signed_vma)(value - from);
7500
7501 if ((!thumb2
7502 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7503 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7504 ||
7505 (thumb2
7506 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7507 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7508 || ((sym_flags != STT_ARM_TFUNC)
7509 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7510 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7511 {
7512 /* The target is out of reach or we are changing modes, so
7513 redirect the branch to the local stub for this
7514 function. */
7515 stub_entry = elf32_arm_get_stub_entry (input_section,
7516 sym_sec, h,
7517 rel, globals);
7518 if (stub_entry != NULL)
7519 value = (stub_entry->stub_offset
7520 + stub_entry->stub_sec->output_offset
7521 + stub_entry->stub_sec->output_section->vma);
7522
f4ac8484 7523 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7524 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7525 {
7526 if ((stub_entry
7527 && !arm_stub_is_thumb (stub_entry->stub_type))
7528 || (sym_flags != STT_ARM_TFUNC))
7529 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7530 }
906e58ca
NC		 7531 }
7532 }
7533
ba96a88f 7534 relocation = value + signed_addend;
f21f3fe0 7535
252b5132 7536 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7537 + input_section->output_offset
7538 + rel->r_offset);
9a5aca8c 7539
252b5132
RH		 7540 check = relocation >> howto->rightshift;
7541
7542 /* If this is a signed value, the rightshift just dropped
7543 leading 1 bits (assuming twos complement). */
7544 if ((bfd_signed_vma) relocation >= 0)
7545 signed_check = check;
7546 else
7547 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7548
e95de063
MS		 7549 /* Calculate the permissable maximum and minimum values for
7550 this relocation according to whether we're relocating for
7551 Thumb-2 or not. */
7552 bitsize = howto->bitsize;
7553 if (!thumb2)
7554 bitsize -= 2;
7555 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7556 reloc_signed_min = ~reloc_signed_max;
7557
252b5132 7558 /* Assumes two's complement. */
ba96a88f 7559 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7560 overflow = TRUE;
252b5132 7561
bd97cb95 7562 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7563 /* For a BLX instruction, make sure that the relocation is rounded up
7564 to a word boundary. This follows the semantics of the instruction
7565 which specifies that bit 1 of the target address will come from bit
7566 1 of the base address. */
7567 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7568
e95de063
MS		 7569 /* Put RELOCATION back into the insn. Assumes two's complement.
7570 We use the Thumb-2 encoding, which is safe even if dealing with
7571 a Thumb-1 instruction by virtue of our overflow check above. */
7572 reloc_sign = (signed_check < 0) ? 1 : 0;
7573 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7574 | ((relocation >> 12) & 0x3ff)
7575 | (reloc_sign << 10);
906e58ca 7576 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7577 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7578 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7579 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7580
252b5132
RH		 7581 /* Put the relocated value back in the object file: */
7582 bfd_put_16 (input_bfd, upper_insn, hit_data);
7583 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7584
7585 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7586 }
7587 break;
7588
c19d1205
ZW		 7589 case R_ARM_THM_JUMP19:
7590 /* Thumb32 conditional branch instruction. */
7591 {
7592 bfd_vma relocation;
7593 bfd_boolean overflow = FALSE;
7594 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7595 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7596 bfd_signed_vma reloc_signed_max = 0xffffe;
7597 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7598 bfd_signed_vma signed_check;
7599
7600 /* Need to refetch the addend, reconstruct the top three bits,
7601 and squish the two 11 bit pieces together. */
7602 if (globals->use_rel)
7603 {
7604 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7605 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7606 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7607 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7608 bfd_vma lower = (lower_insn & 0x07ff);
7609
a00a1f35
MS		 7610 upper |= J1 << 6;
7611 upper |= J2 << 7;
7612 upper |= (!S) << 8;
c19d1205
ZW		 7613 upper -= 0x0100; /* Sign extend. */
7614
7615 addend = (upper << 12) | (lower << 1);
7616 signed_addend = addend;
7617 }
7618
bd97cb95
DJ		 7619 /* Handle calls via the PLT. */
7620 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7621 {
7622 value = (splt->output_section->vma
7623 + splt->output_offset
7624 + h->plt.offset);
7625 /* Target the Thumb stub before the ARM PLT entry. */
7626 value -= PLT_THUMB_STUB_SIZE;
7627 *unresolved_reloc_p = FALSE;
7628 }
7629
c19d1205
ZW		 7630 /* ??? Should handle interworking? GCC might someday try to
7631 use this for tail calls. */
7632
7633 relocation = value + signed_addend;
7634 relocation -= (input_section->output_section->vma
7635 + input_section->output_offset
7636 + rel->r_offset);
a00a1f35 7637 signed_check = (bfd_signed_vma) relocation;
c19d1205 7638
c19d1205
ZW		 7639 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7640 overflow = TRUE;
7641
7642 /* Put RELOCATION back into the insn. */
7643 {
7644 bfd_vma S = (relocation & 0x00100000) >> 20;
7645 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7646 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7647 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7648 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7649
a00a1f35 7650 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7651 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7652 }
7653
7654 /* Put the relocated value back in the object file: */
7655 bfd_put_16 (input_bfd, upper_insn, hit_data);
7656 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7657
7658 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7659 }
7660
7661 case R_ARM_THM_JUMP11:
7662 case R_ARM_THM_JUMP8:
7663 case R_ARM_THM_JUMP6:
51c5503b
NC		 7664 /* Thumb B (branch) instruction). */
7665 {
6cf9e9fe 7666 bfd_signed_vma relocation;
51c5503b
NC		 7667 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7668 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7669 bfd_signed_vma signed_check;
7670
c19d1205
ZW		 7671 /* CZB cannot jump backward. */
7672 if (r_type == R_ARM_THM_JUMP6)
7673 reloc_signed_min = 0;
7674
4e7fd91e 7675 if (globals->use_rel)
6cf9e9fe 7676 {
4e7fd91e
PB		 7677 /* Need to refetch addend. */
7678 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7679 if (addend & ((howto->src_mask + 1) >> 1))
7680 {
7681 signed_addend = -1;
7682 signed_addend &= ~ howto->src_mask;
7683 signed_addend |= addend;
7684 }
7685 else
7686 signed_addend = addend;
7687 /* The value in the insn has been right shifted. We need to
7688 undo this, so that we can perform the address calculation
7689 in terms of bytes. */
7690 signed_addend <<= howto->rightshift;
6cf9e9fe 7691 }
6cf9e9fe 7692 relocation = value + signed_addend;
51c5503b
NC		 7693
7694 relocation -= (input_section->output_section->vma
7695 + input_section->output_offset
7696 + rel->r_offset);
7697
6cf9e9fe
NC		 7698 relocation >>= howto->rightshift;
7699 signed_check = relocation;
c19d1205
ZW		 7700
7701 if (r_type == R_ARM_THM_JUMP6)
7702 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7703 else
7704 relocation &= howto->dst_mask;
51c5503b 7705 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7706
51c5503b
NC		 7707 bfd_put_16 (input_bfd, relocation, hit_data);
7708
7709 /* Assumes two's complement. */
7710 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7711 return bfd_reloc_overflow;
7712
7713 return bfd_reloc_ok;
7714 }
cedb70c5 7715
8375c36b
PB		 7716 case R_ARM_ALU_PCREL7_0:
7717 case R_ARM_ALU_PCREL15_8:
7718 case R_ARM_ALU_PCREL23_15:
7719 {
7720 bfd_vma insn;
7721 bfd_vma relocation;
7722
7723 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7724 if (globals->use_rel)
7725 {
7726 /* Extract the addend. */
7727 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7728 signed_addend = addend;
7729 }
8375c36b
PB		 7730 relocation = value + signed_addend;
7731
7732 relocation -= (input_section->output_section->vma
7733 + input_section->output_offset
7734 + rel->r_offset);
7735 insn = (insn & ~0xfff)
7736 | ((howto->bitpos << 7) & 0xf00)
7737 | ((relocation >> howto->bitpos) & 0xff);
7738 bfd_put_32 (input_bfd, value, hit_data);
7739 }
7740 return bfd_reloc_ok;
7741
252b5132
RH		 7742 case R_ARM_GNU_VTINHERIT:
7743 case R_ARM_GNU_VTENTRY:
7744 return bfd_reloc_ok;
7745
c19d1205 7746 case R_ARM_GOTOFF32:
252b5132
RH		 7747 /* Relocation is relative to the start of the
7748 global offset table. */
7749
7750 BFD_ASSERT (sgot != NULL);
7751 if (sgot == NULL)
7752 return bfd_reloc_notsupported;
9a5aca8c 7753
cedb70c5 7754 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7755 address by one, so that attempts to call the function pointer will
7756 correctly interpret it as Thumb code. */
7757 if (sym_flags == STT_ARM_TFUNC)
7758 value += 1;
7759
252b5132
RH		 7760 /* Note that sgot->output_offset is not involved in this
7761 calculation. We always want the start of .got. If we
7762 define _GLOBAL_OFFSET_TABLE in a different way, as is
7763 permitted by the ABI, we might have to change this
9b485d32 7764 calculation. */
252b5132 7765 value -= sgot->output_section->vma;
f21f3fe0 7766 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7767 contents, rel->r_offset, value,
00a97672 7768 rel->r_addend);
252b5132
RH		 7769
7770 case R_ARM_GOTPC:
a7c10850 7771 /* Use global offset table as symbol value. */
252b5132 7772 BFD_ASSERT (sgot != NULL);
f21f3fe0 7773
252b5132
RH		 7774 if (sgot == NULL)
7775 return bfd_reloc_notsupported;
7776
0945cdfd 7777 *unresolved_reloc_p = FALSE;
252b5132 7778 value = sgot->output_section->vma;
f21f3fe0 7779 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7780 contents, rel->r_offset, value,
00a97672 7781 rel->r_addend);
f21f3fe0 7782
252b5132 7783 case R_ARM_GOT32:
eb043451 7784 case R_ARM_GOT_PREL:
252b5132 7785 /* Relocation is to the entry for this symbol in the
9b485d32 7786 global offset table. */
252b5132
RH		 7787 if (sgot == NULL)
7788 return bfd_reloc_notsupported;
f21f3fe0 7789
252b5132
RH		 7790 if (h != NULL)
7791 {
7792 bfd_vma off;
5e681ec4 7793 bfd_boolean dyn;
f21f3fe0 7794
252b5132
RH		 7795 off = h->got.offset;
7796 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7797 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7798
5e681ec4 7799 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7800 || (info->shared
5e681ec4
PB		 7801 && SYMBOL_REFERENCES_LOCAL (info, h))
7802 || (ELF_ST_VISIBILITY (h->other)
7803 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7804 {
7805 /* This is actually a static link, or it is a -Bsymbolic link
7806 and the symbol is defined locally. We must initialize this
7807 entry in the global offset table. Since the offset must
7808 always be a multiple of 4, we use the least significant bit
7809 to record whether we have initialized it already.
f21f3fe0 7810
00a97672 7811 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7812 entry to initialize the value. This is done in the
9b485d32 7813 finish_dynamic_symbol routine. */
252b5132
RH		 7814 if ((off & 1) != 0)
7815 off &= ~1;
7816 else
7817 {
ee29b9fb
RE		 7818 /* If we are addressing a Thumb function, we need to
7819 adjust the address by one, so that attempts to
7820 call the function pointer will correctly
7821 interpret it as Thumb code. */
7822 if (sym_flags == STT_ARM_TFUNC)
7823 value |= 1;
7824
252b5132
RH		 7825 bfd_put_32 (output_bfd, value, sgot->contents + off);
7826 h->got.offset |= 1;
7827 }
7828 }
0945cdfd
DJ		 7829 else
7830 *unresolved_reloc_p = FALSE;
f21f3fe0 7831
252b5132
RH		 7832 value = sgot->output_offset + off;
7833 }
7834 else
7835 {
7836 bfd_vma off;
f21f3fe0 7837
252b5132
RH		 7838 BFD_ASSERT (local_got_offsets != NULL &&
7839 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7840
252b5132 7841 off = local_got_offsets[r_symndx];
f21f3fe0 7842
252b5132
RH		 7843 /* The offset must always be a multiple of 4. We use the
7844 least significant bit to record whether we have already
9b485d32 7845 generated the necessary reloc. */
252b5132
RH		 7846 if ((off & 1) != 0)
7847 off &= ~1;
7848 else
7849 {
b7693d02
DJ		 7850 /* If we are addressing a Thumb function, we need to
7851 adjust the address by one, so that attempts to
7852 call the function pointer will correctly
7853 interpret it as Thumb code. */
7854 if (sym_flags == STT_ARM_TFUNC)
7855 value |= 1;
7856
00a97672
RS		 7857 if (globals->use_rel)
7858 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7859
252b5132
RH		 7860 if (info->shared)
7861 {
7862 asection * srelgot;
947216bf
AM		 7863 Elf_Internal_Rela outrel;
7864 bfd_byte *loc;
f21f3fe0 7865
00a97672
RS		 7866 srelgot = (bfd_get_section_by_name
7867 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7868 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7869
00a97672 7870 outrel.r_addend = addend + value;
252b5132 7871 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7872 + sgot->output_offset
252b5132
RH		 7873 + off);
7874 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7875 loc = srelgot->contents;
00a97672
RS		 7876 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7877 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7878 }
f21f3fe0 7879
252b5132
RH		 7880 local_got_offsets[r_symndx] |= 1;
7881 }
f21f3fe0 7882
252b5132
RH		 7883 value = sgot->output_offset + off;
7884 }
eb043451
PB		 7885 if (r_type != R_ARM_GOT32)
7886 value += sgot->output_section->vma;
9a5aca8c 7887
f21f3fe0 7888 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7889 contents, rel->r_offset, value,
00a97672 7890 rel->r_addend);
f21f3fe0 7891
ba93b8ac
DJ		 7892 case R_ARM_TLS_LDO32:
7893 value = value - dtpoff_base (info);
7894
7895 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7896 contents, rel->r_offset, value,
7897 rel->r_addend);
ba93b8ac
DJ		 7898
7899 case R_ARM_TLS_LDM32:
7900 {
7901 bfd_vma off;
7902
7903 if (globals->sgot == NULL)
7904 abort ();
7905
7906 off = globals->tls_ldm_got.offset;
7907
7908 if ((off & 1) != 0)
7909 off &= ~1;
7910 else
7911 {
7912 /* If we don't know the module number, create a relocation
7913 for it. */
7914 if (info->shared)
7915 {
7916 Elf_Internal_Rela outrel;
7917 bfd_byte *loc;
7918
7919 if (globals->srelgot == NULL)
7920 abort ();
7921
00a97672 7922 outrel.r_addend = 0;
ba93b8ac
DJ		 7923 outrel.r_offset = (globals->sgot->output_section->vma
7924 + globals->sgot->output_offset + off);
7925 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7926
00a97672
RS		 7927 if (globals->use_rel)
7928 bfd_put_32 (output_bfd, outrel.r_addend,
7929 globals->sgot->contents + off);
ba93b8ac
DJ		 7930
7931 loc = globals->srelgot->contents;
00a97672
RS		 7932 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7933 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7934 }
7935 else
7936 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7937
7938 globals->tls_ldm_got.offset |= 1;
7939 }
7940
906e58ca 7941 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7942 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7943
7944 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7945 contents, rel->r_offset, value,
00a97672 7946 rel->r_addend);
ba93b8ac
DJ		 7947 }
7948
7949 case R_ARM_TLS_GD32:
7950 case R_ARM_TLS_IE32:
7951 {
7952 bfd_vma off;
7953 int indx;
7954 char tls_type;
7955
7956 if (globals->sgot == NULL)
7957 abort ();
7958
7959 indx = 0;
7960 if (h != NULL)
7961 {
7962 bfd_boolean dyn;
7963 dyn = globals->root.dynamic_sections_created;
7964 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7965 && (!info->shared
7966 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7967 {
7968 *unresolved_reloc_p = FALSE;
7969 indx = h->dynindx;
7970 }
7971 off = h->got.offset;
7972 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7973 }
7974 else
7975 {
7976 if (local_got_offsets == NULL)
7977 abort ();
7978 off = local_got_offsets[r_symndx];
7979 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7980 }
7981
7982 if (tls_type == GOT_UNKNOWN)
7983 abort ();
7984
7985 if ((off & 1) != 0)
7986 off &= ~1;
7987 else
7988 {
7989 bfd_boolean need_relocs = FALSE;
7990 Elf_Internal_Rela outrel;
7991 bfd_byte *loc = NULL;
7992 int cur_off = off;
7993
7994 /* The GOT entries have not been initialized yet. Do it
7995 now, and emit any relocations. If both an IE GOT and a
7996 GD GOT are necessary, we emit the GD first. */
7997
7998 if ((info->shared || indx != 0)
7999 && (h == NULL
8000 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8001 || h->root.type != bfd_link_hash_undefweak))
8002 {
8003 need_relocs = TRUE;
8004 if (globals->srelgot == NULL)
8005 abort ();
8006 loc = globals->srelgot->contents;
00a97672 8007 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8008 }
8009
8010 if (tls_type & GOT_TLS_GD)
8011 {
8012 if (need_relocs)
8013 {
00a97672 8014 outrel.r_addend = 0;
ba93b8ac 8015 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 8016 + globals->sgot->output_offset
8017 + cur_off);
ba93b8ac 8018 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8019
00a97672
RS		 8020 if (globals->use_rel)
8021 bfd_put_32 (output_bfd, outrel.r_addend,
8022 globals->sgot->contents + cur_off);
8023
8024 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8025 globals->srelgot->reloc_count++;
00a97672 8026 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8027
8028 if (indx == 0)
8029 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8030 globals->sgot->contents + cur_off + 4);
8031 else
8032 {
00a97672 8033 outrel.r_addend = 0;
ba93b8ac
DJ		 8034 outrel.r_info = ELF32_R_INFO (indx,
8035 R_ARM_TLS_DTPOFF32);
8036 outrel.r_offset += 4;
00a97672
RS		 8037
8038 if (globals->use_rel)
8039 bfd_put_32 (output_bfd, outrel.r_addend,
8040 globals->sgot->contents + cur_off + 4);
8041
8042
8043 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8044 globals->srelgot->reloc_count++;
00a97672 8045 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8046 }
8047 }
8048 else
8049 {
8050 /* If we are not emitting relocations for a
8051 general dynamic reference, then we must be in a
8052 static link or an executable link with the
8053 symbol binding locally. Mark it as belonging
8054 to module 1, the executable. */
8055 bfd_put_32 (output_bfd, 1,
8056 globals->sgot->contents + cur_off);
8057 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8058 globals->sgot->contents + cur_off + 4);
8059 }
8060
8061 cur_off += 8;
8062 }
8063
8064 if (tls_type & GOT_TLS_IE)
8065 {
8066 if (need_relocs)
8067 {
00a97672
RS		 8068 if (indx == 0)
8069 outrel.r_addend = value - dtpoff_base (info);
8070 else
8071 outrel.r_addend = 0;
ba93b8ac
DJ		 8072 outrel.r_offset = (globals->sgot->output_section->vma
8073 + globals->sgot->output_offset
8074 + cur_off);
8075 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8076
00a97672
RS		 8077 if (globals->use_rel)
8078 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8079 globals->sgot->contents + cur_off);
8080
00a97672 8081 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8082 globals->srelgot->reloc_count++;
00a97672 8083 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8084 }
8085 else
8086 bfd_put_32 (output_bfd, tpoff (info, value),
8087 globals->sgot->contents + cur_off);
8088 cur_off += 4;
8089 }
8090
8091 if (h != NULL)
8092 h->got.offset |= 1;
8093 else
8094 local_got_offsets[r_symndx] |= 1;
8095 }
8096
8097 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8098 off += 8;
906e58ca 8099 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8100 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8101
8102 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8103 contents, rel->r_offset, value,
00a97672 8104 rel->r_addend);
ba93b8ac
DJ		 8105 }
8106
8107 case R_ARM_TLS_LE32:
8108 if (info->shared)
8109 {
8110 (*_bfd_error_handler)
8111 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8112 input_bfd, input_section,
8113 (long) rel->r_offset, howto->name);
21d799b5 8114 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8115 }
8116 else
8117 value = tpoff (info, value);
906e58ca 8118
ba93b8ac 8119 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8120 contents, rel->r_offset, value,
8121 rel->r_addend);
ba93b8ac 8122
319850b4
JB		 8123 case R_ARM_V4BX:
8124 if (globals->fix_v4bx)
845b51d6
PB		 8125 {
8126 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8127
845b51d6
PB		 8128 /* Ensure that we have a BX instruction. */
8129 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8130
845b51d6
PB		 8131 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8132 {
8133 /* Branch to veneer. */
8134 bfd_vma glue_addr;
8135 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8136 glue_addr -= input_section->output_section->vma
8137 + input_section->output_offset
8138 + rel->r_offset + 8;
8139 insn = (insn & 0xf0000000) | 0x0a000000
8140 | ((glue_addr >> 2) & 0x00ffffff);
8141 }
8142 else
8143 {
8144 /* Preserve Rm (lowest four bits) and the condition code
8145 (highest four bits). Other bits encode MOV PC,Rm. */
8146 insn = (insn & 0xf000000f) | 0x01a0f000;
8147 }
319850b4 8148
845b51d6
PB		 8149 bfd_put_32 (input_bfd, insn, hit_data);
8150 }
319850b4
JB		 8151 return bfd_reloc_ok;
8152
b6895b4f
PB		 8153 case R_ARM_MOVW_ABS_NC:
8154 case R_ARM_MOVT_ABS:
8155 case R_ARM_MOVW_PREL_NC:
8156 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8157 /* Until we properly support segment-base-relative addressing then
8158 we assume the segment base to be zero, as for the group relocations.
8159 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8160 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8161 case R_ARM_MOVW_BREL_NC:
8162 case R_ARM_MOVW_BREL:
8163 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8164 {
8165 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8166
8167 if (globals->use_rel)
8168 {
8169 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8170 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8171 }
92f5d02b 8172
b6895b4f 8173 value += signed_addend;
b6895b4f
PB		 8174
8175 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8176 value -= (input_section->output_section->vma
8177 + input_section->output_offset + rel->r_offset);
8178
92f5d02b
MS		 8179 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8180 return bfd_reloc_overflow;
8181
8182 if (sym_flags == STT_ARM_TFUNC)
8183 value |= 1;
8184
8185 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8186 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8187 value >>= 16;
8188
8189 insn &= 0xfff0f000;
8190 insn |= value & 0xfff;
8191 insn |= (value & 0xf000) << 4;
8192 bfd_put_32 (input_bfd, insn, hit_data);
8193 }
8194 return bfd_reloc_ok;
8195
8196 case R_ARM_THM_MOVW_ABS_NC:
8197 case R_ARM_THM_MOVT_ABS:
8198 case R_ARM_THM_MOVW_PREL_NC:
8199 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8200 /* Until we properly support segment-base-relative addressing then
8201 we assume the segment base to be zero, as for the above relocations.
8202 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8203 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8204 as R_ARM_THM_MOVT_ABS. */
8205 case R_ARM_THM_MOVW_BREL_NC:
8206 case R_ARM_THM_MOVW_BREL:
8207 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8208 {
8209 bfd_vma insn;
906e58ca 8210
b6895b4f
PB		 8211 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8212 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8213
8214 if (globals->use_rel)
8215 {
8216 addend = ((insn >> 4) & 0xf000)
8217 | ((insn >> 15) & 0x0800)
8218 | ((insn >> 4) & 0x0700)
8219 | (insn & 0x00ff);
39623e12 8220 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8221 }
92f5d02b 8222
b6895b4f 8223 value += signed_addend;
b6895b4f
PB		 8224
8225 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8226 value -= (input_section->output_section->vma
8227 + input_section->output_offset + rel->r_offset);
8228
92f5d02b
MS		 8229 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8230 return bfd_reloc_overflow;
8231
8232 if (sym_flags == STT_ARM_TFUNC)
8233 value |= 1;
8234
8235 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8236 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8237 value >>= 16;
8238
8239 insn &= 0xfbf08f00;
8240 insn |= (value & 0xf000) << 4;
8241 insn |= (value & 0x0800) << 15;
8242 insn |= (value & 0x0700) << 4;
8243 insn |= (value & 0x00ff);
8244
8245 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8246 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8247 }
8248 return bfd_reloc_ok;
8249
4962c51a
MS		 8250 case R_ARM_ALU_PC_G0_NC:
8251 case R_ARM_ALU_PC_G1_NC:
8252 case R_ARM_ALU_PC_G0:
8253 case R_ARM_ALU_PC_G1:
8254 case R_ARM_ALU_PC_G2:
8255 case R_ARM_ALU_SB_G0_NC:
8256 case R_ARM_ALU_SB_G1_NC:
8257 case R_ARM_ALU_SB_G0:
8258 case R_ARM_ALU_SB_G1:
8259 case R_ARM_ALU_SB_G2:
8260 {
8261 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8262 bfd_vma pc = input_section->output_section->vma
8263 + input_section->output_offset + rel->r_offset;
8264 /* sb should be the origin of the *segment* containing the symbol.
8265 It is not clear how to obtain this OS-dependent value, so we
8266 make an arbitrary choice of zero. */
8267 bfd_vma sb = 0;
8268 bfd_vma residual;
8269 bfd_vma g_n;
8270 bfd_signed_vma signed_value;
8271 int group = 0;
8272
8273 /* Determine which group of bits to select. */
8274 switch (r_type)
8275 {
8276 case R_ARM_ALU_PC_G0_NC:
8277 case R_ARM_ALU_PC_G0:
8278 case R_ARM_ALU_SB_G0_NC:
8279 case R_ARM_ALU_SB_G0:
8280 group = 0;
8281 break;
8282
8283 case R_ARM_ALU_PC_G1_NC:
8284 case R_ARM_ALU_PC_G1:
8285 case R_ARM_ALU_SB_G1_NC:
8286 case R_ARM_ALU_SB_G1:
8287 group = 1;
8288 break;
8289
8290 case R_ARM_ALU_PC_G2:
8291 case R_ARM_ALU_SB_G2:
8292 group = 2;
8293 break;
8294
8295 default:
906e58ca 8296 abort ();
4962c51a
MS		 8297 }
8298
8299 /* If REL, extract the addend from the insn. If RELA, it will
8300 have already been fetched for us. */
8301 if (globals->use_rel)
8302 {
8303 int negative;
8304 bfd_vma constant = insn & 0xff;
8305 bfd_vma rotation = (insn & 0xf00) >> 8;
8306
8307 if (rotation == 0)
8308 signed_addend = constant;
8309 else
8310 {
8311 /* Compensate for the fact that in the instruction, the
8312 rotation is stored in multiples of 2 bits. */
8313 rotation *= 2;
8314
8315 /* Rotate "constant" right by "rotation" bits. */
8316 signed_addend = (constant >> rotation) |
8317 (constant << (8 * sizeof (bfd_vma) - rotation));
8318 }
8319
8320 /* Determine if the instruction is an ADD or a SUB.
8321 (For REL, this determines the sign of the addend.) */
8322 negative = identify_add_or_sub (insn);
8323 if (negative == 0)
8324 {
8325 (*_bfd_error_handler)
8326 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8327 input_bfd, input_section,
8328 (long) rel->r_offset, howto->name);
906e58ca 8329 return bfd_reloc_overflow;
4962c51a
MS		 8330 }
8331
8332 signed_addend *= negative;
8333 }
8334
8335 /* Compute the value (X) to go in the place. */
8336 if (r_type == R_ARM_ALU_PC_G0_NC
8337 || r_type == R_ARM_ALU_PC_G1_NC
8338 || r_type == R_ARM_ALU_PC_G0
8339 || r_type == R_ARM_ALU_PC_G1
8340 || r_type == R_ARM_ALU_PC_G2)
8341 /* PC relative. */
8342 signed_value = value - pc + signed_addend;
8343 else
8344 /* Section base relative. */
8345 signed_value = value - sb + signed_addend;
8346
8347 /* If the target symbol is a Thumb function, then set the
8348 Thumb bit in the address. */
8349 if (sym_flags == STT_ARM_TFUNC)
8350 signed_value |= 1;
8351
8352 /* Calculate the value of the relevant G_n, in encoded
8353 constant-with-rotation format. */
8354 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8355 &residual);
8356
8357 /* Check for overflow if required. */
8358 if ((r_type == R_ARM_ALU_PC_G0
8359 || r_type == R_ARM_ALU_PC_G1
8360 || r_type == R_ARM_ALU_PC_G2
8361 || r_type == R_ARM_ALU_SB_G0
8362 || r_type == R_ARM_ALU_SB_G1
8363 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8364 {
8365 (*_bfd_error_handler)
8366 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8367 input_bfd, input_section,
8368 (long) rel->r_offset, abs (signed_value), howto->name);
8369 return bfd_reloc_overflow;
8370 }
8371
8372 /* Mask out the value and the ADD/SUB part of the opcode; take care
8373 not to destroy the S bit. */
8374 insn &= 0xff1ff000;
8375
8376 /* Set the opcode according to whether the value to go in the
8377 place is negative. */
8378 if (signed_value < 0)
8379 insn |= 1 << 22;
8380 else
8381 insn |= 1 << 23;
8382
8383 /* Encode the offset. */
8384 insn |= g_n;
8385
8386 bfd_put_32 (input_bfd, insn, hit_data);
8387 }
8388 return bfd_reloc_ok;
8389
8390 case R_ARM_LDR_PC_G0:
8391 case R_ARM_LDR_PC_G1:
8392 case R_ARM_LDR_PC_G2:
8393 case R_ARM_LDR_SB_G0:
8394 case R_ARM_LDR_SB_G1:
8395 case R_ARM_LDR_SB_G2:
8396 {
8397 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8398 bfd_vma pc = input_section->output_section->vma
8399 + input_section->output_offset + rel->r_offset;
8400 bfd_vma sb = 0; /* See note above. */
8401 bfd_vma residual;
8402 bfd_signed_vma signed_value;
8403 int group = 0;
8404
8405 /* Determine which groups of bits to calculate. */
8406 switch (r_type)
8407 {
8408 case R_ARM_LDR_PC_G0:
8409 case R_ARM_LDR_SB_G0:
8410 group = 0;
8411 break;
8412
8413 case R_ARM_LDR_PC_G1:
8414 case R_ARM_LDR_SB_G1:
8415 group = 1;
8416 break;
8417
8418 case R_ARM_LDR_PC_G2:
8419 case R_ARM_LDR_SB_G2:
8420 group = 2;
8421 break;
8422
8423 default:
906e58ca 8424 abort ();
4962c51a
MS		 8425 }
8426
8427 /* If REL, extract the addend from the insn. If RELA, it will
8428 have already been fetched for us. */
8429 if (globals->use_rel)
8430 {
8431 int negative = (insn & (1 << 23)) ? 1 : -1;
8432 signed_addend = negative * (insn & 0xfff);
8433 }
8434
8435 /* Compute the value (X) to go in the place. */
8436 if (r_type == R_ARM_LDR_PC_G0
8437 || r_type == R_ARM_LDR_PC_G1
8438 || r_type == R_ARM_LDR_PC_G2)
8439 /* PC relative. */
8440 signed_value = value - pc + signed_addend;
8441 else
8442 /* Section base relative. */
8443 signed_value = value - sb + signed_addend;
8444
8445 /* Calculate the value of the relevant G_{n-1} to obtain
8446 the residual at that stage. */
8447 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8448
8449 /* Check for overflow. */
8450 if (residual >= 0x1000)
8451 {
8452 (*_bfd_error_handler)
8453 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8454 input_bfd, input_section,
8455 (long) rel->r_offset, abs (signed_value), howto->name);
8456 return bfd_reloc_overflow;
8457 }
8458
8459 /* Mask out the value and U bit. */
8460 insn &= 0xff7ff000;
8461
8462 /* Set the U bit if the value to go in the place is non-negative. */
8463 if (signed_value >= 0)
8464 insn |= 1 << 23;
8465
8466 /* Encode the offset. */
8467 insn |= residual;
8468
8469 bfd_put_32 (input_bfd, insn, hit_data);
8470 }
8471 return bfd_reloc_ok;
8472
8473 case R_ARM_LDRS_PC_G0:
8474 case R_ARM_LDRS_PC_G1:
8475 case R_ARM_LDRS_PC_G2:
8476 case R_ARM_LDRS_SB_G0:
8477 case R_ARM_LDRS_SB_G1:
8478 case R_ARM_LDRS_SB_G2:
8479 {
8480 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8481 bfd_vma pc = input_section->output_section->vma
8482 + input_section->output_offset + rel->r_offset;
8483 bfd_vma sb = 0; /* See note above. */
8484 bfd_vma residual;
8485 bfd_signed_vma signed_value;
8486 int group = 0;
8487
8488 /* Determine which groups of bits to calculate. */
8489 switch (r_type)
8490 {
8491 case R_ARM_LDRS_PC_G0:
8492 case R_ARM_LDRS_SB_G0:
8493 group = 0;
8494 break;
8495
8496 case R_ARM_LDRS_PC_G1:
8497 case R_ARM_LDRS_SB_G1:
8498 group = 1;
8499 break;
8500
8501 case R_ARM_LDRS_PC_G2:
8502 case R_ARM_LDRS_SB_G2:
8503 group = 2;
8504 break;
8505
8506 default:
906e58ca 8507 abort ();
4962c51a
MS		 8508 }
8509
8510 /* If REL, extract the addend from the insn. If RELA, it will
8511 have already been fetched for us. */
8512 if (globals->use_rel)
8513 {
8514 int negative = (insn & (1 << 23)) ? 1 : -1;
8515 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8516 }
8517
8518 /* Compute the value (X) to go in the place. */
8519 if (r_type == R_ARM_LDRS_PC_G0
8520 || r_type == R_ARM_LDRS_PC_G1
8521 || r_type == R_ARM_LDRS_PC_G2)
8522 /* PC relative. */
8523 signed_value = value - pc + signed_addend;
8524 else
8525 /* Section base relative. */
8526 signed_value = value - sb + signed_addend;
8527
8528 /* Calculate the value of the relevant G_{n-1} to obtain
8529 the residual at that stage. */
8530 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8531
8532 /* Check for overflow. */
8533 if (residual >= 0x100)
8534 {
8535 (*_bfd_error_handler)
8536 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8537 input_bfd, input_section,
8538 (long) rel->r_offset, abs (signed_value), howto->name);
8539 return bfd_reloc_overflow;
8540 }
8541
8542 /* Mask out the value and U bit. */
8543 insn &= 0xff7ff0f0;
8544
8545 /* Set the U bit if the value to go in the place is non-negative. */
8546 if (signed_value >= 0)
8547 insn |= 1 << 23;
8548
8549 /* Encode the offset. */
8550 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8551
8552 bfd_put_32 (input_bfd, insn, hit_data);
8553 }
8554 return bfd_reloc_ok;
8555
8556 case R_ARM_LDC_PC_G0:
8557 case R_ARM_LDC_PC_G1:
8558 case R_ARM_LDC_PC_G2:
8559 case R_ARM_LDC_SB_G0:
8560 case R_ARM_LDC_SB_G1:
8561 case R_ARM_LDC_SB_G2:
8562 {
8563 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8564 bfd_vma pc = input_section->output_section->vma
8565 + input_section->output_offset + rel->r_offset;
8566 bfd_vma sb = 0; /* See note above. */
8567 bfd_vma residual;
8568 bfd_signed_vma signed_value;
8569 int group = 0;
8570
8571 /* Determine which groups of bits to calculate. */
8572 switch (r_type)
8573 {
8574 case R_ARM_LDC_PC_G0:
8575 case R_ARM_LDC_SB_G0:
8576 group = 0;
8577 break;
8578
8579 case R_ARM_LDC_PC_G1:
8580 case R_ARM_LDC_SB_G1:
8581 group = 1;
8582 break;
8583
8584 case R_ARM_LDC_PC_G2:
8585 case R_ARM_LDC_SB_G2:
8586 group = 2;
8587 break;
8588
8589 default:
906e58ca 8590 abort ();
4962c51a
MS		 8591 }
8592
8593 /* If REL, extract the addend from the insn. If RELA, it will
8594 have already been fetched for us. */
8595 if (globals->use_rel)
8596 {
8597 int negative = (insn & (1 << 23)) ? 1 : -1;
8598 signed_addend = negative * ((insn & 0xff) << 2);
8599 }
8600
8601 /* Compute the value (X) to go in the place. */
8602 if (r_type == R_ARM_LDC_PC_G0
8603 || r_type == R_ARM_LDC_PC_G1
8604 || r_type == R_ARM_LDC_PC_G2)
8605 /* PC relative. */
8606 signed_value = value - pc + signed_addend;
8607 else
8608 /* Section base relative. */
8609 signed_value = value - sb + signed_addend;
8610
8611 /* Calculate the value of the relevant G_{n-1} to obtain
8612 the residual at that stage. */
8613 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8614
8615 /* Check for overflow. (The absolute value to go in the place must be
8616 divisible by four and, after having been divided by four, must
8617 fit in eight bits.) */
8618 if ((residual & 0x3) != 0 || residual >= 0x400)
8619 {
8620 (*_bfd_error_handler)
8621 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8622 input_bfd, input_section,
8623 (long) rel->r_offset, abs (signed_value), howto->name);
8624 return bfd_reloc_overflow;
8625 }
8626
8627 /* Mask out the value and U bit. */
8628 insn &= 0xff7fff00;
8629
8630 /* Set the U bit if the value to go in the place is non-negative. */
8631 if (signed_value >= 0)
8632 insn |= 1 << 23;
8633
8634 /* Encode the offset. */
8635 insn |= residual >> 2;
8636
8637 bfd_put_32 (input_bfd, insn, hit_data);
8638 }
8639 return bfd_reloc_ok;
8640
252b5132
RH		 8641 default:
8642 return bfd_reloc_notsupported;
8643 }
8644}
8645
98c1d4aa
NC		 8646/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8647static void
57e8b36a
NC		 8648arm_add_to_rel (bfd * abfd,
8649 bfd_byte * address,
8650 reloc_howto_type * howto,
8651 bfd_signed_vma increment)
98c1d4aa 8652{
98c1d4aa
NC		 8653 bfd_signed_vma addend;
8654
bd97cb95
DJ		 8655 if (howto->type == R_ARM_THM_CALL
8656 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8657 {
9a5aca8c
AM		 8658 int upper_insn, lower_insn;
8659 int upper, lower;
98c1d4aa 8660
9a5aca8c
AM		 8661 upper_insn = bfd_get_16 (abfd, address);
8662 lower_insn = bfd_get_16 (abfd, address + 2);
8663 upper = upper_insn & 0x7ff;
8664 lower = lower_insn & 0x7ff;
8665
8666 addend = (upper << 12) | (lower << 1);
ddda4409 8667 addend += increment;
9a5aca8c 8668 addend >>= 1;
98c1d4aa 8669
9a5aca8c
AM		 8670 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8671 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8672
dc810e39
AM		 8673 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8674 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8675 }
8676 else
8677 {
8678 bfd_vma contents;
8679
8680 contents = bfd_get_32 (abfd, address);
8681
8682 /* Get the (signed) value from the instruction. */
8683 addend = contents & howto->src_mask;
8684 if (addend & ((howto->src_mask + 1) >> 1))
8685 {
8686 bfd_signed_vma mask;
8687
8688 mask = -1;
8689 mask &= ~ howto->src_mask;
8690 addend |= mask;
8691 }
8692
8693 /* Add in the increment, (which is a byte value). */
8694 switch (howto->type)
8695 {
8696 default:
8697 addend += increment;
8698 break;
8699
8700 case R_ARM_PC24:
c6596c5e 8701 case R_ARM_PLT32:
5b5bb741
PB		 8702 case R_ARM_CALL:
8703 case R_ARM_JUMP24:
9a5aca8c 8704 addend <<= howto->size;
dc810e39 8705 addend += increment;
9a5aca8c
AM		 8706
8707 /* Should we check for overflow here ? */
8708
8709 /* Drop any undesired bits. */
8710 addend >>= howto->rightshift;
8711 break;
8712 }
8713
8714 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8715
8716 bfd_put_32 (abfd, contents, address);
ddda4409 8717 }
98c1d4aa 8718}
252b5132 8719
ba93b8ac
DJ		 8720#define IS_ARM_TLS_RELOC(R_TYPE) \
8721 ((R_TYPE) == R_ARM_TLS_GD32 \
8722 || (R_TYPE) == R_ARM_TLS_LDO32 \
8723 || (R_TYPE) == R_ARM_TLS_LDM32 \
8724 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8725 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8726 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8727 || (R_TYPE) == R_ARM_TLS_LE32 \
8728 || (R_TYPE) == R_ARM_TLS_IE32)
8729
252b5132 8730/* Relocate an ARM ELF section. */
906e58ca 8731
b34976b6 8732static bfd_boolean
57e8b36a
NC		 8733elf32_arm_relocate_section (bfd * output_bfd,
8734 struct bfd_link_info * info,
8735 bfd * input_bfd,
8736 asection * input_section,
8737 bfd_byte * contents,
8738 Elf_Internal_Rela * relocs,
8739 Elf_Internal_Sym * local_syms,
8740 asection ** local_sections)
252b5132 8741{
b34976b6
AM		 8742 Elf_Internal_Shdr *symtab_hdr;
8743 struct elf_link_hash_entry **sym_hashes;
8744 Elf_Internal_Rela *rel;
8745 Elf_Internal_Rela *relend;
8746 const char *name;
b32d3aa2 8747 struct elf32_arm_link_hash_table * globals;
252b5132 8748
4e7fd91e 8749 globals = elf32_arm_hash_table (info);
b491616a 8750
0ffa91dd 8751 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8752 sym_hashes = elf_sym_hashes (input_bfd);
8753
8754 rel = relocs;
8755 relend = relocs + input_section->reloc_count;
8756 for (; rel < relend; rel++)
8757 {
ba96a88f
NC		 8758 int r_type;
8759 reloc_howto_type * howto;
8760 unsigned long r_symndx;
8761 Elf_Internal_Sym * sym;
8762 asection * sec;
252b5132 8763 struct elf_link_hash_entry * h;
ba96a88f
NC		 8764 bfd_vma relocation;
8765 bfd_reloc_status_type r;
8766 arelent bfd_reloc;
ba93b8ac 8767 char sym_type;
0945cdfd 8768 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8769 char *error_message = NULL;
f21f3fe0 8770
252b5132 8771 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8772 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8773 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8774
ba96a88f
NC		 8775 if ( r_type == R_ARM_GNU_VTENTRY
8776 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8777 continue;
8778
b32d3aa2 8779 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8780 howto = bfd_reloc.howto;
252b5132 8781
252b5132
RH		 8782 h = NULL;
8783 sym = NULL;
8784 sec = NULL;
9b485d32 8785
252b5132
RH		 8786 if (r_symndx < symtab_hdr->sh_info)
8787 {
8788 sym = local_syms + r_symndx;
ba93b8ac 8789 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8790 sec = local_sections[r_symndx];
ffcb4889
NS		 8791
8792 /* An object file might have a reference to a local
8793 undefined symbol. This is a daft object file, but we
8794 should at least do something about it. V4BX & NONE
8795 relocations do not use the symbol and are explicitly
8796 allowed to use the undefined symbol, so allow those. */
8797 if (r_type != R_ARM_V4BX
8798 && r_type != R_ARM_NONE
8799 && bfd_is_und_section (sec)
8800 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8801 {
8802 if (!info->callbacks->undefined_symbol
8803 (info, bfd_elf_string_from_elf_section
8804 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8805 input_bfd, input_section,
8806 rel->r_offset, TRUE))
8807 return FALSE;
8808 }
8809
4e7fd91e 8810 if (globals->use_rel)
f8df10f4 8811 {
4e7fd91e
PB		 8812 relocation = (sec->output_section->vma
8813 + sec->output_offset
8814 + sym->st_value);
ab96bf03
AM		 8815 if (!info->relocatable
8816 && (sec->flags & SEC_MERGE)
8817 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8818 {
4e7fd91e
PB		 8819 asection *msec;
8820 bfd_vma addend, value;
8821
39623e12 8822 switch (r_type)
4e7fd91e 8823 {
39623e12
PB		 8824 case R_ARM_MOVW_ABS_NC:
8825 case R_ARM_MOVT_ABS:
8826 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8827 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8828 addend = (addend ^ 0x8000) - 0x8000;
8829 break;
f8df10f4 8830
39623e12
PB		 8831 case R_ARM_THM_MOVW_ABS_NC:
8832 case R_ARM_THM_MOVT_ABS:
8833 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8834 << 16;
8835 value |= bfd_get_16 (input_bfd,
8836 contents + rel->r_offset + 2);
8837 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8838 | ((value & 0x04000000) >> 15);
8839 addend = (addend ^ 0x8000) - 0x8000;
8840 break;
f8df10f4 8841
39623e12
PB		 8842 default:
8843 if (howto->rightshift
8844 || (howto->src_mask & (howto->src_mask + 1)))
8845 {
8846 (*_bfd_error_handler)
8847 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8848 input_bfd, input_section,
8849 (long) rel->r_offset, howto->name);
8850 return FALSE;
8851 }
8852
8853 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8854
8855 /* Get the (signed) value from the instruction. */
8856 addend = value & howto->src_mask;
8857 if (addend & ((howto->src_mask + 1) >> 1))
8858 {
8859 bfd_signed_vma mask;
8860
8861 mask = -1;
8862 mask &= ~ howto->src_mask;
8863 addend |= mask;
8864 }
8865 break;
4e7fd91e 8866 }
39623e12 8867
4e7fd91e
PB		 8868 msec = sec;
8869 addend =
8870 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8871 - relocation;
8872 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8873
8874 /* Cases here must match those in the preceeding
8875 switch statement. */
8876 switch (r_type)
8877 {
8878 case R_ARM_MOVW_ABS_NC:
8879 case R_ARM_MOVT_ABS:
8880 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8881 | (addend & 0xfff);
8882 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8883 break;
8884
8885 case R_ARM_THM_MOVW_ABS_NC:
8886 case R_ARM_THM_MOVT_ABS:
8887 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8888 | (addend & 0xff) | ((addend & 0x0800) << 15);
8889 bfd_put_16 (input_bfd, value >> 16,
8890 contents + rel->r_offset);
8891 bfd_put_16 (input_bfd, value,
8892 contents + rel->r_offset + 2);
8893 break;
8894
8895 default:
8896 value = (value & ~ howto->dst_mask)
8897 | (addend & howto->dst_mask);
8898 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8899 break;
8900 }
f8df10f4 8901 }
f8df10f4 8902 }
4e7fd91e
PB		 8903 else
8904 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8905 }
8906 else
8907 {
560e09e9 8908 bfd_boolean warned;
560e09e9 8909
b2a8e766
AM		 8910 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8911 r_symndx, symtab_hdr, sym_hashes,
8912 h, sec, relocation,
8913 unresolved_reloc, warned);
ba93b8ac
DJ		 8914
8915 sym_type = h->type;
252b5132
RH		 8916 }
8917
ab96bf03
AM		 8918 if (sec != NULL && elf_discarded_section (sec))
8919 {
8920 /* For relocs against symbols from removed linkonce sections,
8921 or sections discarded by a linker script, we just want the
8922 section contents zeroed. Avoid any special processing. */
8923 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8924 rel->r_info = 0;
8925 rel->r_addend = 0;
8926 continue;
8927 }
8928
8929 if (info->relocatable)
8930 {
8931 /* This is a relocatable link. We don't have to change
8932 anything, unless the reloc is against a section symbol,
8933 in which case we have to adjust according to where the
8934 section symbol winds up in the output section. */
8935 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8936 {
8937 if (globals->use_rel)
8938 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8939 howto, (bfd_signed_vma) sec->output_offset);
8940 else
8941 rel->r_addend += sec->output_offset;
8942 }
8943 continue;
8944 }
8945
252b5132
RH		 8946 if (h != NULL)
8947 name = h->root.root.string;
8948 else
8949 {
8950 name = (bfd_elf_string_from_elf_section
8951 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8952 if (name == NULL || *name == '\0')
8953 name = bfd_section_name (input_bfd, sec);
8954 }
f21f3fe0 8955
ba93b8ac
DJ		 8956 if (r_symndx != 0
8957 && r_type != R_ARM_NONE
8958 && (h == NULL
8959 || h->root.type == bfd_link_hash_defined
8960 || h->root.type == bfd_link_hash_defweak)
8961 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8962 {
8963 (*_bfd_error_handler)
8964 ((sym_type == STT_TLS
8965 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8966 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8967 input_bfd,
8968 input_section,
8969 (long) rel->r_offset,
8970 howto->name,
8971 name);
8972 }
8973
252b5132
RH		 8974 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8975 input_section, contents, rel,
8976 relocation, info, sec, name,
8977 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8978 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8979 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8980
8981 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8982 because such sections are not SEC_ALLOC and thus ld.so will
8983 not process them. */
8984 if (unresolved_reloc
8985 && !((input_section->flags & SEC_DEBUGGING) != 0
8986 && h->def_dynamic))
8987 {
8988 (*_bfd_error_handler)
843fe662
L		 8989 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8990 input_bfd,
8991 input_section,
8992 (long) rel->r_offset,
8993 howto->name,
8994 h->root.root.string);
0945cdfd
DJ		 8995 return FALSE;
8996 }
252b5132
RH		 8997
8998 if (r != bfd_reloc_ok)
8999 {
252b5132
RH		 9000 switch (r)
9001 {
9002 case bfd_reloc_overflow:
cf919dfd
PB		 9003 /* If the overflowing reloc was to an undefined symbol,
9004 we have already printed one error message and there
9005 is no point complaining again. */
9006 if ((! h ||
9007 h->root.type != bfd_link_hash_undefined)
9008 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9009 (info, (h ? &h->root : NULL), name, howto->name,
9010 (bfd_vma) 0, input_bfd, input_section,
9011 rel->r_offset))))
b34976b6 9012 return FALSE;
252b5132
RH		 9013 break;
9014
9015 case bfd_reloc_undefined:
9016 if (!((*info->callbacks->undefined_symbol)
9017 (info, name, input_bfd, input_section,
b34976b6
AM		 9018 rel->r_offset, TRUE)))
9019 return FALSE;
252b5132
RH		 9020 break;
9021
9022 case bfd_reloc_outofrange:
f2a9dd69 9023 error_message = _("out of range");
252b5132
RH		 9024 goto common_error;
9025
9026 case bfd_reloc_notsupported:
f2a9dd69 9027 error_message = _("unsupported relocation");
252b5132
RH		 9028 goto common_error;
9029
9030 case bfd_reloc_dangerous:
f2a9dd69 9031 /* error_message should already be set. */
252b5132
RH		 9032 goto common_error;
9033
9034 default:
f2a9dd69 9035 error_message = _("unknown error");
8029a119 9036 /* Fall through. */
252b5132
RH		 9037
9038 common_error:
f2a9dd69
DJ		 9039 BFD_ASSERT (error_message != NULL);
9040 if (!((*info->callbacks->reloc_dangerous)
9041 (info, error_message, input_bfd, input_section,
252b5132 9042 rel->r_offset)))
b34976b6 9043 return FALSE;
252b5132
RH		 9044 break;
9045 }
9046 }
9047 }
9048
b34976b6 9049 return TRUE;
252b5132
RH		 9050}
9051
91d6fa6a 9052/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9053 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9054 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9055 maintaining that condition). */
9056
9057static void
9058add_unwind_table_edit (arm_unwind_table_edit **head,
9059 arm_unwind_table_edit **tail,
9060 arm_unwind_edit_type type,
9061 asection *linked_section,
91d6fa6a 9062 unsigned int tindex)
2468f9c9 9063{
21d799b5
NC		 9064 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9065 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9066
9067 new_edit->type = type;
9068 new_edit->linked_section = linked_section;
91d6fa6a 9069 new_edit->index = tindex;
2468f9c9 9070
91d6fa6a 9071 if (tindex > 0)
2468f9c9
PB		 9072 {
9073 new_edit->next = NULL;
9074
9075 if (*tail)
9076 (*tail)->next = new_edit;
9077
9078 (*tail) = new_edit;
9079
9080 if (!*head)
9081 (*head) = new_edit;
9082 }
9083 else
9084 {
9085 new_edit->next = *head;
9086
9087 if (!*tail)
9088 *tail = new_edit;
9089
9090 *head = new_edit;
9091 }
9092}
9093
9094static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9095
9096/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9097static void
9098adjust_exidx_size(asection *exidx_sec, int adjust)
9099{
9100 asection *out_sec;
9101
9102 if (!exidx_sec->rawsize)
9103 exidx_sec->rawsize = exidx_sec->size;
9104
9105 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9106 out_sec = exidx_sec->output_section;
9107 /* Adjust size of output section. */
9108 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9109}
9110
9111/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9112static void
9113insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9114{
9115 struct _arm_elf_section_data *exidx_arm_data;
9116
9117 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9118 add_unwind_table_edit (
9119 &exidx_arm_data->u.exidx.unwind_edit_list,
9120 &exidx_arm_data->u.exidx.unwind_edit_tail,
9121 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9122
9123 adjust_exidx_size(exidx_sec, 8);
9124}
9125
9126/* Scan .ARM.exidx tables, and create a list describing edits which should be
9127 made to those tables, such that:
9128
9129 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9130 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9131 codes which have been inlined into the index).
9132
9133 The edits are applied when the tables are written
9134 (in elf32_arm_write_section).
9135*/
9136
9137bfd_boolean
9138elf32_arm_fix_exidx_coverage (asection **text_section_order,
9139 unsigned int num_text_sections,
9140 struct bfd_link_info *info)
9141{
9142 bfd *inp;
9143 unsigned int last_second_word = 0, i;
9144 asection *last_exidx_sec = NULL;
9145 asection *last_text_sec = NULL;
9146 int last_unwind_type = -1;
9147
9148 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9149 text sections. */
9150 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9151 {
9152 asection *sec;
9153
9154 for (sec = inp->sections; sec != NULL; sec = sec->next)
9155 {
9156 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9157 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9158
dec9d5df 9159 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9160 continue;
9161
9162 if (elf_sec->linked_to)
9163 {
9164 Elf_Internal_Shdr *linked_hdr
9165 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9166 struct _arm_elf_section_data *linked_sec_arm_data
9167 = get_arm_elf_section_data (linked_hdr->bfd_section);
9168
9169 if (linked_sec_arm_data == NULL)
9170 continue;
9171
9172 /* Link this .ARM.exidx section back from the text section it
9173 describes. */
9174 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9175 }
9176 }
9177 }
9178
9179 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9180 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9181 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9182
9183 for (i = 0; i < num_text_sections; i++)
9184 {
9185 asection *sec = text_section_order[i];
9186 asection *exidx_sec;
9187 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9188 struct _arm_elf_section_data *exidx_arm_data;
9189 bfd_byte *contents = NULL;
9190 int deleted_exidx_bytes = 0;
9191 bfd_vma j;
9192 arm_unwind_table_edit *unwind_edit_head = NULL;
9193 arm_unwind_table_edit *unwind_edit_tail = NULL;
9194 Elf_Internal_Shdr *hdr;
9195 bfd *ibfd;
9196
9197 if (arm_data == NULL)
9198 continue;
9199
9200 exidx_sec = arm_data->u.text.arm_exidx_sec;
9201 if (exidx_sec == NULL)
9202 {
9203 /* Section has no unwind data. */
9204 if (last_unwind_type == 0 || !last_exidx_sec)
9205 continue;
9206
9207 /* Ignore zero sized sections. */
9208 if (sec->size == 0)
9209 continue;
9210
9211 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9212 last_unwind_type = 0;
9213 continue;
9214 }
9215
22a8f80e
PB		 9216 /* Skip /DISCARD/ sections. */
9217 if (bfd_is_abs_section (exidx_sec->output_section))
9218 continue;
9219
2468f9c9
PB		 9220 hdr = &elf_section_data (exidx_sec)->this_hdr;
9221 if (hdr->sh_type != SHT_ARM_EXIDX)
9222 continue;
9223
9224 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9225 if (exidx_arm_data == NULL)
9226 continue;
9227
9228 ibfd = exidx_sec->owner;
9229
9230 if (hdr->contents != NULL)
9231 contents = hdr->contents;
9232 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9233 /* An error? */
9234 continue;
9235
9236 for (j = 0; j < hdr->sh_size; j += 8)
9237 {
9238 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9239 int unwind_type;
9240 int elide = 0;
9241
9242 /* An EXIDX_CANTUNWIND entry. */
9243 if (second_word == 1)
9244 {
9245 if (last_unwind_type == 0)
9246 elide = 1;
9247 unwind_type = 0;
9248 }
9249 /* Inlined unwinding data. Merge if equal to previous. */
9250 else if ((second_word & 0x80000000) != 0)
9251 {
9252 if (last_second_word == second_word && last_unwind_type == 1)
9253 elide = 1;
9254 unwind_type = 1;
9255 last_second_word = second_word;
9256 }
9257 /* Normal table entry. In theory we could merge these too,
9258 but duplicate entries are likely to be much less common. */
9259 else
9260 unwind_type = 2;
9261
9262 if (elide)
9263 {
9264 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9265 DELETE_EXIDX_ENTRY, NULL, j / 8);
9266
9267 deleted_exidx_bytes += 8;
9268 }
9269
9270 last_unwind_type = unwind_type;
9271 }
9272
9273 /* Free contents if we allocated it ourselves. */
9274 if (contents != hdr->contents)
9275 free (contents);
9276
9277 /* Record edits to be applied later (in elf32_arm_write_section). */
9278 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9279 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9280
9281 if (deleted_exidx_bytes > 0)
9282 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9283
9284 last_exidx_sec = exidx_sec;
9285 last_text_sec = sec;
9286 }
9287
9288 /* Add terminating CANTUNWIND entry. */
9289 if (last_exidx_sec && last_unwind_type != 0)
9290 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9291
9292 return TRUE;
9293}
9294
3e6b1042
DJ		 9295static bfd_boolean
9296elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9297 bfd *ibfd, const char *name)
9298{
9299 asection *sec, *osec;
9300
9301 sec = bfd_get_section_by_name (ibfd, name);
9302 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9303 return TRUE;
9304
9305 osec = sec->output_section;
9306 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9307 return TRUE;
9308
9309 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9310 sec->output_offset, sec->size))
9311 return FALSE;
9312
9313 return TRUE;
9314}
9315
9316static bfd_boolean
9317elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9318{
9319 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9320
9321 /* Invoke the regular ELF backend linker to do all the work. */
9322 if (!bfd_elf_final_link (abfd, info))
9323 return FALSE;
9324
9325 /* Write out any glue sections now that we have created all the
9326 stubs. */
9327 if (globals->bfd_of_glue_owner != NULL)
9328 {
9329 if (! elf32_arm_output_glue_section (info, abfd,
9330 globals->bfd_of_glue_owner,
9331 ARM2THUMB_GLUE_SECTION_NAME))
9332 return FALSE;
9333
9334 if (! elf32_arm_output_glue_section (info, abfd,
9335 globals->bfd_of_glue_owner,
9336 THUMB2ARM_GLUE_SECTION_NAME))
9337 return FALSE;
9338
9339 if (! elf32_arm_output_glue_section (info, abfd,
9340 globals->bfd_of_glue_owner,
9341 VFP11_ERRATUM_VENEER_SECTION_NAME))
9342 return FALSE;
9343
9344 if (! elf32_arm_output_glue_section (info, abfd,
9345 globals->bfd_of_glue_owner,
9346 ARM_BX_GLUE_SECTION_NAME))
9347 return FALSE;
9348 }
9349
9350 return TRUE;
9351}
9352
c178919b
NC		 9353/* Set the right machine number. */
9354
9355static bfd_boolean
57e8b36a 9356elf32_arm_object_p (bfd *abfd)
c178919b 9357{
5a6c6817 9358 unsigned int mach;
57e8b36a 9359
5a6c6817 9360 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9361
5a6c6817
NC		 9362 if (mach != bfd_mach_arm_unknown)
9363 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9364
9365 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9366 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9367
e16bb312 9368 else
5a6c6817 9369 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9370
9371 return TRUE;
9372}
9373
fc830a83 9374/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9375
b34976b6 9376static bfd_boolean
57e8b36a 9377elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9378{
9379 if (elf_flags_init (abfd)
9380 && elf_elfheader (abfd)->e_flags != flags)
9381 {
fc830a83
NC		 9382 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9383 {
fd2ec330 9384 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9385 (*_bfd_error_handler)
9386 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9387 abfd);
fc830a83 9388 else
d003868e
AM		 9389 _bfd_error_handler
9390 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9391 abfd);
fc830a83 9392 }
252b5132
RH		 9393 }
9394 else
9395 {
9396 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9397 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9398 }
9399
b34976b6 9400 return TRUE;
252b5132
RH		 9401}
9402
fc830a83 9403/* Copy backend specific data from one object module to another. */
9b485d32 9404
b34976b6 9405static bfd_boolean
57e8b36a 9406elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9407{
9408 flagword in_flags;
9409 flagword out_flags;
9410
0ffa91dd 9411 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9412 return TRUE;
252b5132 9413
fc830a83 9414 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9415 out_flags = elf_elfheader (obfd)->e_flags;
9416
fc830a83
NC		 9417 if (elf_flags_init (obfd)
9418 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9419 && in_flags != out_flags)
252b5132 9420 {
252b5132 9421 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9422 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9423 return FALSE;
252b5132
RH		 9424
9425 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9426 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9427 return FALSE;
252b5132
RH		 9428
9429 /* If the src and dest have different interworking flags
9430 then turn off the interworking bit. */
fd2ec330 9431 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9432 {
fd2ec330 9433 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9434 _bfd_error_handler
9435 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9436 obfd, ibfd);
252b5132 9437
fd2ec330 9438 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9439 }
1006ba19
PB		 9440
9441 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9442 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9443 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9444 }
9445
9446 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9447 elf_flags_init (obfd) = TRUE;
252b5132 9448
94a3258f
PB		 9449 /* Also copy the EI_OSABI field. */
9450 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9451 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9452
104d59d1
JM		 9453 /* Copy object attributes. */
9454 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9455
9456 return TRUE;
9457}
9458
9459/* Values for Tag_ABI_PCS_R9_use. */
9460enum
9461{
9462 AEABI_R9_V6,
9463 AEABI_R9_SB,
9464 AEABI_R9_TLS,
9465 AEABI_R9_unused
9466};
9467
9468/* Values for Tag_ABI_PCS_RW_data. */
9469enum
9470{
9471 AEABI_PCS_RW_data_absolute,
9472 AEABI_PCS_RW_data_PCrel,
9473 AEABI_PCS_RW_data_SBrel,
9474 AEABI_PCS_RW_data_unused
9475};
9476
9477/* Values for Tag_ABI_enum_size. */
9478enum
9479{
9480 AEABI_enum_unused,
9481 AEABI_enum_short,
9482 AEABI_enum_wide,
9483 AEABI_enum_forced_wide
9484};
9485
104d59d1
JM		 9486/* Determine whether an object attribute tag takes an integer, a
9487 string or both. */
906e58ca 9488
104d59d1
JM		 9489static int
9490elf32_arm_obj_attrs_arg_type (int tag)
9491{
9492 if (tag == Tag_compatibility)
3483fe2e 9493 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9494 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9495 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9496 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9497 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9498 else if (tag < 32)
3483fe2e 9499 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9500 else
3483fe2e 9501 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9502}
9503
5aa6ff7c
AS		 9504/* The ABI defines that Tag_conformance should be emitted first, and that
9505 Tag_nodefaults should be second (if either is defined). This sets those
9506 two positions, and bumps up the position of all the remaining tags to
9507 compensate. */
9508static int
9509elf32_arm_obj_attrs_order (int num)
9510{
9511 if (num == 4)
9512 return Tag_conformance;
9513 if (num == 5)
9514 return Tag_nodefaults;
9515 if ((num - 2) < Tag_nodefaults)
9516 return num - 2;
9517 if ((num - 1) < Tag_conformance)
9518 return num - 1;
9519 return num;
9520}
9521
91e22acd
AS		 9522/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9523 Returns -1 if no architecture could be read. */
9524
9525static int
9526get_secondary_compatible_arch (bfd *abfd)
9527{
9528 obj_attribute *attr =
9529 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9530
9531 /* Note: the tag and its argument below are uleb128 values, though
9532 currently-defined values fit in one byte for each. */
9533 if (attr->s
9534 && attr->s[0] == Tag_CPU_arch
9535 && (attr->s[1] & 128) != 128
9536 && attr->s[2] == 0)
9537 return attr->s[1];
9538
9539 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9540 return -1;
9541}
9542
9543/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9544 The tag is removed if ARCH is -1. */
9545
8e79c3df 9546static void
91e22acd 9547set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9548{
91e22acd
AS		 9549 obj_attribute *attr =
9550 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9551
91e22acd
AS		 9552 if (arch == -1)
9553 {
9554 attr->s = NULL;
9555 return;
8e79c3df 9556 }
91e22acd
AS		 9557
9558 /* Note: the tag and its argument below are uleb128 values, though
9559 currently-defined values fit in one byte for each. */
9560 if (!attr->s)
21d799b5 9561 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9562 attr->s[0] = Tag_CPU_arch;
9563 attr->s[1] = arch;
9564 attr->s[2] = '\0';
8e79c3df
CM		 9565}
9566
91e22acd
AS		 9567/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9568 into account. */
9569
9570static int
9571tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9572 int newtag, int secondary_compat)
8e79c3df 9573{
91e22acd
AS		 9574#define T(X) TAG_CPU_ARCH_##X
9575 int tagl, tagh, result;
9576 const int v6t2[] =
9577 {
9578 T(V6T2), /* PRE_V4. */
9579 T(V6T2), /* V4. */
9580 T(V6T2), /* V4T. */
9581 T(V6T2), /* V5T. */
9582 T(V6T2), /* V5TE. */
9583 T(V6T2), /* V5TEJ. */
9584 T(V6T2), /* V6. */
9585 T(V7), /* V6KZ. */
9586 T(V6T2) /* V6T2. */
9587 };
9588 const int v6k[] =
9589 {
9590 T(V6K), /* PRE_V4. */
9591 T(V6K), /* V4. */
9592 T(V6K), /* V4T. */
9593 T(V6K), /* V5T. */
9594 T(V6K), /* V5TE. */
9595 T(V6K), /* V5TEJ. */
9596 T(V6K), /* V6. */
9597 T(V6KZ), /* V6KZ. */
9598 T(V7), /* V6T2. */
9599 T(V6K) /* V6K. */
9600 };
9601 const int v7[] =
9602 {
9603 T(V7), /* PRE_V4. */
9604 T(V7), /* V4. */
9605 T(V7), /* V4T. */
9606 T(V7), /* V5T. */
9607 T(V7), /* V5TE. */
9608 T(V7), /* V5TEJ. */
9609 T(V7), /* V6. */
9610 T(V7), /* V6KZ. */
9611 T(V7), /* V6T2. */
9612 T(V7), /* V6K. */
9613 T(V7) /* V7. */
9614 };
9615 const int v6_m[] =
9616 {
9617 -1, /* PRE_V4. */
9618 -1, /* V4. */
9619 T(V6K), /* V4T. */
9620 T(V6K), /* V5T. */
9621 T(V6K), /* V5TE. */
9622 T(V6K), /* V5TEJ. */
9623 T(V6K), /* V6. */
9624 T(V6KZ), /* V6KZ. */
9625 T(V7), /* V6T2. */
9626 T(V6K), /* V6K. */
9627 T(V7), /* V7. */
9628 T(V6_M) /* V6_M. */
9629 };
9630 const int v6s_m[] =
9631 {
9632 -1, /* PRE_V4. */
9633 -1, /* V4. */
9634 T(V6K), /* V4T. */
9635 T(V6K), /* V5T. */
9636 T(V6K), /* V5TE. */
9637 T(V6K), /* V5TEJ. */
9638 T(V6K), /* V6. */
9639 T(V6KZ), /* V6KZ. */
9640 T(V7), /* V6T2. */
9641 T(V6K), /* V6K. */
9642 T(V7), /* V7. */
9643 T(V6S_M), /* V6_M. */
9644 T(V6S_M) /* V6S_M. */
9645 };
9e3c6df6
PB		 9646 const int v7e_m[] =
9647 {
9648 -1, /* PRE_V4. */
9649 -1, /* V4. */
9650 T(V7E_M), /* V4T. */
9651 T(V7E_M), /* V5T. */
9652 T(V7E_M), /* V5TE. */
9653 T(V7E_M), /* V5TEJ. */
9654 T(V7E_M), /* V6. */
9655 T(V7E_M), /* V6KZ. */
9656 T(V7E_M), /* V6T2. */
9657 T(V7E_M), /* V6K. */
9658 T(V7E_M), /* V7. */
9659 T(V7E_M), /* V6_M. */
9660 T(V7E_M), /* V6S_M. */
9661 T(V7E_M) /* V7E_M. */
9662 };
91e22acd
AS		 9663 const int v4t_plus_v6_m[] =
9664 {
9665 -1, /* PRE_V4. */
9666 -1, /* V4. */
9667 T(V4T), /* V4T. */
9668 T(V5T), /* V5T. */
9669 T(V5TE), /* V5TE. */
9670 T(V5TEJ), /* V5TEJ. */
9671 T(V6), /* V6. */
9672 T(V6KZ), /* V6KZ. */
9673 T(V6T2), /* V6T2. */
9674 T(V6K), /* V6K. */
9675 T(V7), /* V7. */
9676 T(V6_M), /* V6_M. */
9677 T(V6S_M), /* V6S_M. */
9e3c6df6 9678 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9679 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9680 };
9681 const int *comb[] =
9682 {
9683 v6t2,
9684 v6k,
9685 v7,
9686 v6_m,
9687 v6s_m,
9e3c6df6 9688 v7e_m,
91e22acd
AS		 9689 /* Pseudo-architecture. */
9690 v4t_plus_v6_m
9691 };
9692
9693 /* Check we've not got a higher architecture than we know about. */
9694
9e3c6df6 9695 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9696 {
3895f852 9697 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9698 return -1;
9699 }
9700
9701 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9702
9703 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9704 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9705 oldtag = T(V4T_PLUS_V6_M);
9706
9707 /* And override the new tag if we have a Tag_also_compatible_with on the
9708 input. */
9709
9710 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9711 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9712 newtag = T(V4T_PLUS_V6_M);
9713
9714 tagl = (oldtag < newtag) ? oldtag : newtag;
9715 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9716
9717 /* Architectures before V6KZ add features monotonically. */
9718 if (tagh <= TAG_CPU_ARCH_V6KZ)
9719 return result;
9720
9721 result = comb[tagh - T(V6T2)][tagl];
9722
9723 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9724 as the canonical version. */
9725 if (result == T(V4T_PLUS_V6_M))
9726 {
9727 result = T(V4T);
9728 *secondary_compat_out = T(V6_M);
9729 }
9730 else
9731 *secondary_compat_out = -1;
9732
9733 if (result == -1)
9734 {
3895f852 9735 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9736 ibfd, oldtag, newtag);
9737 return -1;
9738 }
9739
9740 return result;
9741#undef T
8e79c3df
CM		 9742}
9743
ee065d83
PB		 9744/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9745 are conflicting attributes. */
906e58ca 9746
ee065d83
PB		 9747static bfd_boolean
9748elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9749{
104d59d1
JM		 9750 obj_attribute *in_attr;
9751 obj_attribute *out_attr;
9752 obj_attribute_list *in_list;
8e79c3df 9753 obj_attribute_list *out_list;
91e22acd 9754 obj_attribute_list **out_listp;
ee065d83
PB		 9755 /* Some tags have 0 = don't care, 1 = strong requirement,
9756 2 = weak requirement. */
91e22acd 9757 static const int order_021[3] = {0, 2, 1};
ee065d83 9758 int i;
91e22acd 9759 bfd_boolean result = TRUE;
ee065d83 9760
3e6b1042
DJ		 9761 /* Skip the linker stubs file. This preserves previous behavior
9762 of accepting unknown attributes in the first input file - but
9763 is that a bug? */
9764 if (ibfd->flags & BFD_LINKER_CREATED)
9765 return TRUE;
9766
104d59d1 9767 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9768 {
9769 /* This is the first object. Copy the attributes. */
104d59d1 9770 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9771
9772 /* Use the Tag_null value to indicate the attributes have been
9773 initialized. */
104d59d1 9774 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9775
ee065d83
PB		 9776 return TRUE;
9777 }
9778
104d59d1
JM		 9779 in_attr = elf_known_obj_attributes_proc (ibfd);
9780 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9781 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9782 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9783 {
8e79c3df 9784 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9785 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9786 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9787 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9788 {
9789 _bfd_error_handler
3895f852 9790 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9791 ibfd, obfd);
91e22acd 9792 result = FALSE;
ee065d83
PB		 9793 }
9794 }
9795
104d59d1 9796 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9797 {
9798 /* Merge this attribute with existing attributes. */
9799 switch (i)
9800 {
9801 case Tag_CPU_raw_name:
9802 case Tag_CPU_name:
91e22acd 9803 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9804 break;
9805
9806 case Tag_ABI_optimization_goals:
9807 case Tag_ABI_FP_optimization_goals:
9808 /* Use the first value seen. */
9809 break;
9810
9811 case Tag_CPU_arch:
91e22acd
AS		 9812 {
9813 int secondary_compat = -1, secondary_compat_out = -1;
9814 unsigned int saved_out_attr = out_attr[i].i;
9815 static const char *name_table[] = {
9816 /* These aren't real CPU names, but we can't guess
9817 that from the architecture version alone. */
9818 "Pre v4",
9819 "ARM v4",
9820 "ARM v4T",
9821 "ARM v5T",
9822 "ARM v5TE",
9823 "ARM v5TEJ",
9824 "ARM v6",
9825 "ARM v6KZ",
9826 "ARM v6T2",
9827 "ARM v6K",
9828 "ARM v7",
9829 "ARM v6-M",
9830 "ARM v6S-M"
9831 };
9832
9833 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9834 secondary_compat = get_secondary_compatible_arch (ibfd);
9835 secondary_compat_out = get_secondary_compatible_arch (obfd);
9836 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9837 &secondary_compat_out,
9838 in_attr[i].i,
9839 secondary_compat);
9840 set_secondary_compatible_arch (obfd, secondary_compat_out);
9841
9842 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9843 if (out_attr[i].i == saved_out_attr)
9844 ; /* Leave the names alone. */
9845 else if (out_attr[i].i == in_attr[i].i)
9846 {
9847 /* The output architecture has been changed to match the
9848 input architecture. Use the input names. */
9849 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9850 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9851 : NULL;
9852 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9853 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9854 : NULL;
9855 }
9856 else
9857 {
9858 out_attr[Tag_CPU_name].s = NULL;
9859 out_attr[Tag_CPU_raw_name].s = NULL;
9860 }
9861
9862 /* If we still don't have a value for Tag_CPU_name,
9863 make one up now. Tag_CPU_raw_name remains blank. */
9864 if (out_attr[Tag_CPU_name].s == NULL
9865 && out_attr[i].i < ARRAY_SIZE (name_table))
9866 out_attr[Tag_CPU_name].s =
9867 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9868 }
9869 break;
9870
ee065d83
PB		 9871 case Tag_ARM_ISA_use:
9872 case Tag_THUMB_ISA_use:
ee065d83 9873 case Tag_WMMX_arch:
91e22acd
AS		 9874 case Tag_Advanced_SIMD_arch:
9875 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9876 case Tag_ABI_FP_rounding:
ee065d83
PB		 9877 case Tag_ABI_FP_exceptions:
9878 case Tag_ABI_FP_user_exceptions:
9879 case Tag_ABI_FP_number_model:
91e22acd
AS		 9880 case Tag_VFP_HP_extension:
9881 case Tag_CPU_unaligned_access:
9882 case Tag_T2EE_use:
9883 case Tag_Virtualization_use:
9884 case Tag_MPextension_use:
ee065d83
PB		 9885 /* Use the largest value specified. */
9886 if (in_attr[i].i > out_attr[i].i)
9887 out_attr[i].i = in_attr[i].i;
9888 break;
9889
91e22acd
AS		 9890 case Tag_ABI_align8_preserved:
9891 case Tag_ABI_PCS_RO_data:
9892 /* Use the smallest value specified. */
9893 if (in_attr[i].i < out_attr[i].i)
9894 out_attr[i].i = in_attr[i].i;
9895 break;
9896
9897 case Tag_ABI_align8_needed:
9898 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9899 && (in_attr[Tag_ABI_align8_preserved].i == 0
9900 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9901 {
91e22acd
AS		 9902 /* This error message should be enabled once all non-conformant
9903 binaries in the toolchain have had the attributes set
9904 properly.
ee065d83 9905 _bfd_error_handler
3895f852 9906 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9907 obfd, ibfd);
9908 result = FALSE; */
ee065d83 9909 }
91e22acd
AS		 9910 /* Fall through. */
9911 case Tag_ABI_FP_denormal:
9912 case Tag_ABI_PCS_GOT_use:
9913 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9914 value if greater than 2 (for future-proofing). */
9915 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9916 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9917 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9918 out_attr[i].i = in_attr[i].i;
9919 break;
91e22acd
AS		 9920
9921
9922 case Tag_CPU_arch_profile:
9923 if (out_attr[i].i != in_attr[i].i)
9924 {
9925 /* 0 will merge with anything.
9926 'A' and 'S' merge to 'A'.
9927 'R' and 'S' merge to 'R'.
9928 'M' and 'A|R|S' is an error. */
9929 if (out_attr[i].i == 0
9930 || (out_attr[i].i == 'S'
9931 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9932 out_attr[i].i = in_attr[i].i;
9933 else if (in_attr[i].i == 0
9934 || (in_attr[i].i == 'S'
9935 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9936 ; /* Do nothing. */
9937 else
9938 {
9939 _bfd_error_handler
3895f852 9940 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9941 ibfd,
9942 in_attr[i].i ? in_attr[i].i : '0',
9943 out_attr[i].i ? out_attr[i].i : '0');
9944 result = FALSE;
9945 }
9946 }
9947 break;
b1cc4aeb 9948 case Tag_VFP_arch:
62f3b8c8
PB		 9949 {
9950 static const struct
9951 {
9952 int ver;
9953 int regs;
9954 } vfp_versions[7] =
9955 {
9956 {0, 0},
9957 {1, 16},
9958 {2, 16},
9959 {3, 32},
9960 {3, 16},
9961 {4, 32},
9962 {4, 16}
9963 };
9964 int ver;
9965 int regs;
9966 int newval;
9967
9968 /* Values greater than 6 aren't defined, so just pick the
9969 biggest */
9970 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
9971 {
9972 out_attr[i] = in_attr[i];
9973 break;
9974 }
9975 /* The output uses the superset of input features
9976 (ISA version) and registers. */
9977 ver = vfp_versions[in_attr[i].i].ver;
9978 if (ver < vfp_versions[out_attr[i].i].ver)
9979 ver = vfp_versions[out_attr[i].i].ver;
9980 regs = vfp_versions[in_attr[i].i].regs;
9981 if (regs < vfp_versions[out_attr[i].i].regs)
9982 regs = vfp_versions[out_attr[i].i].regs;
9983 /* This assumes all possible supersets are also a valid
9984 options. */
9985 for (newval = 6; newval > 0; newval--)
9986 {
9987 if (regs == vfp_versions[newval].regs
9988 && ver == vfp_versions[newval].ver)
9989 break;
9990 }
9991 out_attr[i].i = newval;
9992 }
b1cc4aeb 9993 break;
ee065d83
PB		 9994 case Tag_PCS_config:
9995 if (out_attr[i].i == 0)
9996 out_attr[i].i = in_attr[i].i;
9997 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9998 {
9999 /* It's sometimes ok to mix different configs, so this is only
10000 a warning. */
10001 _bfd_error_handler
10002 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10003 }
10004 break;
10005 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10006 if (in_attr[i].i != out_attr[i].i
10007 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10008 && in_attr[i].i != AEABI_R9_unused)
10009 {
10010 _bfd_error_handler
3895f852 10011 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10012 result = FALSE;
ee065d83
PB		 10013 }
10014 if (out_attr[i].i == AEABI_R9_unused)
10015 out_attr[i].i = in_attr[i].i;
10016 break;
10017 case Tag_ABI_PCS_RW_data:
10018 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10019 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10020 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10021 {
10022 _bfd_error_handler
3895f852 10023 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10024 ibfd);
91e22acd 10025 result = FALSE;
ee065d83
PB		 10026 }
10027 /* Use the smallest value specified. */
10028 if (in_attr[i].i < out_attr[i].i)
10029 out_attr[i].i = in_attr[i].i;
10030 break;
ee065d83 10031 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10032 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10033 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10034 {
10035 _bfd_error_handler
a9dc9481
JM		 10036 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10037 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10038 }
a9dc9481 10039 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10040 out_attr[i].i = in_attr[i].i;
10041 break;
ee065d83
PB		 10042 case Tag_ABI_enum_size:
10043 if (in_attr[i].i != AEABI_enum_unused)
10044 {
10045 if (out_attr[i].i == AEABI_enum_unused
10046 || out_attr[i].i == AEABI_enum_forced_wide)
10047 {
10048 /* The existing object is compatible with anything.
10049 Use whatever requirements the new object has. */
10050 out_attr[i].i = in_attr[i].i;
10051 }
10052 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10053 && out_attr[i].i != in_attr[i].i
0ffa91dd 10054 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10055 {
91e22acd 10056 static const char *aeabi_enum_names[] =
bf21ed78 10057 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10058 const char *in_name =
10059 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10060 ? aeabi_enum_names[in_attr[i].i]
10061 : "<unknown>";
10062 const char *out_name =
10063 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10064 ? aeabi_enum_names[out_attr[i].i]
10065 : "<unknown>";
ee065d83 10066 _bfd_error_handler
bf21ed78 10067 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10068 ibfd, in_name, out_name);
ee065d83
PB		 10069 }
10070 }
10071 break;
10072 case Tag_ABI_VFP_args:
10073 /* Aready done. */
10074 break;
10075 case Tag_ABI_WMMX_args:
10076 if (in_attr[i].i != out_attr[i].i)
10077 {
10078 _bfd_error_handler
3895f852 10079 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10080 ibfd, obfd);
91e22acd 10081 result = FALSE;
ee065d83
PB		 10082 }
10083 break;
7b86a9fa
AS		 10084 case Tag_compatibility:
10085 /* Merged in target-independent code. */
10086 break;
91e22acd
AS		 10087 case Tag_ABI_HardFP_use:
10088 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
10089 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
10090 || (in_attr[i].i == 2 && out_attr[i].i == 1))
10091 out_attr[i].i = 3;
10092 else if (in_attr[i].i > out_attr[i].i)
10093 out_attr[i].i = in_attr[i].i;
10094 break;
10095 case Tag_ABI_FP_16bit_format:
10096 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10097 {
10098 if (in_attr[i].i != out_attr[i].i)
10099 {
10100 _bfd_error_handler
3895f852 10101 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10102 ibfd, obfd);
10103 result = FALSE;
10104 }
10105 }
10106 if (in_attr[i].i != 0)
10107 out_attr[i].i = in_attr[i].i;
10108 break;
7b86a9fa 10109
91e22acd 10110 case Tag_nodefaults:
2d0bb761
AS		 10111 /* This tag is set if it exists, but the value is unused (and is
10112 typically zero). We don't actually need to do anything here -
10113 the merge happens automatically when the type flags are merged
10114 below. */
91e22acd
AS		 10115 break;
10116 case Tag_also_compatible_with:
10117 /* Already done in Tag_CPU_arch. */
10118 break;
10119 case Tag_conformance:
10120 /* Keep the attribute if it matches. Throw it away otherwise.
10121 No attribute means no claim to conform. */
10122 if (!in_attr[i].s || !out_attr[i].s
10123 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10124 out_attr[i].s = NULL;
10125 break;
3cfad14c 10126
91e22acd 10127 default:
3cfad14c 10128 {
91e22acd
AS		 10129 bfd *err_bfd = NULL;
10130
10131 /* The "known_obj_attributes" table does contain some undefined
10132 attributes. Ensure that there are unused. */
10133 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10134 err_bfd = obfd;
10135 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10136 err_bfd = ibfd;
10137
10138 if (err_bfd != NULL)
10139 {
10140 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10141 if ((i & 127) < 64)
10142 {
10143 _bfd_error_handler
10144 (_("%B: Unknown mandatory EABI object attribute %d"),
10145 err_bfd, i);
10146 bfd_set_error (bfd_error_bad_value);
10147 result = FALSE;
10148 }
10149 else
10150 {
10151 _bfd_error_handler
10152 (_("Warning: %B: Unknown EABI object attribute %d"),
10153 err_bfd, i);
10154 }
10155 }
10156
10157 /* Only pass on attributes that match in both inputs. */
10158 if (in_attr[i].i != out_attr[i].i
10159 || in_attr[i].s != out_attr[i].s
10160 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10161 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10162 {
10163 out_attr[i].i = 0;
10164 out_attr[i].s = NULL;
10165 }
3cfad14c 10166 }
91e22acd
AS		 10167 }
10168
10169 /* If out_attr was copied from in_attr then it won't have a type yet. */
10170 if (in_attr[i].type && !out_attr[i].type)
10171 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10172 }
10173
104d59d1
JM		 10174 /* Merge Tag_compatibility attributes and any common GNU ones. */
10175 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 10176
104d59d1
JM		 10177 /* Check for any attributes not known on ARM. */
10178 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10179 out_listp = &elf_other_obj_attributes_proc (obfd);
10180 out_list = *out_listp;
8e79c3df 10181
91e22acd 10182 for (; in_list || out_list; )
ee065d83 10183 {
91e22acd
AS		 10184 bfd *err_bfd = NULL;
10185 int err_tag = 0;
8e79c3df
CM		 10186
10187 /* The tags for each list are in numerical order. */
10188 /* If the tags are equal, then merge. */
91e22acd 10189 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10190 {
91e22acd
AS		 10191 /* This attribute only exists in obfd. We can't merge, and we don't
10192 know what the tag means, so delete it. */
10193 err_bfd = obfd;
10194 err_tag = out_list->tag;
10195 *out_listp = out_list->next;
10196 out_list = *out_listp;
8e79c3df 10197 }
91e22acd 10198 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10199 {
91e22acd
AS		 10200 /* This attribute only exists in ibfd. We can't merge, and we don't
10201 know what the tag means, so ignore it. */
10202 err_bfd = ibfd;
10203 err_tag = in_list->tag;
8e79c3df 10204 in_list = in_list->next;
eb111b1f 10205 }
91e22acd
AS		 10206 else /* The tags are equal. */
10207 {
10208 /* As present, all attributes in the list are unknown, and
10209 therefore can't be merged meaningfully. */
10210 err_bfd = obfd;
10211 err_tag = out_list->tag;
10212
10213 /* Only pass on attributes that match in both inputs. */
10214 if (in_list->attr.i != out_list->attr.i
10215 || in_list->attr.s != out_list->attr.s
10216 || (in_list->attr.s && out_list->attr.s
10217 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10218 {
10219 /* No match. Delete the attribute. */
10220 *out_listp = out_list->next;
10221 out_list = *out_listp;
10222 }
10223 else
10224 {
10225 /* Matched. Keep the attribute and move to the next. */
10226 out_list = out_list->next;
10227 in_list = in_list->next;
10228 }
10229 }
10230
10231 if (err_bfd)
10232 {
10233 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10234 if ((err_tag & 127) < 64)
10235 {
10236 _bfd_error_handler
10237 (_("%B: Unknown mandatory EABI object attribute %d"),
10238 err_bfd, err_tag);
10239 bfd_set_error (bfd_error_bad_value);
10240 result = FALSE;
10241 }
10242 else
10243 {
10244 _bfd_error_handler
10245 (_("Warning: %B: Unknown EABI object attribute %d"),
10246 err_bfd, err_tag);
10247 }
10248 }
ee065d83 10249 }
91e22acd 10250 return result;
252b5132
RH		 10251}
10252
3a4a14e9
PB		 10253
10254/* Return TRUE if the two EABI versions are incompatible. */
10255
10256static bfd_boolean
10257elf32_arm_versions_compatible (unsigned iver, unsigned over)
10258{
10259 /* v4 and v5 are the same spec before and after it was released,
10260 so allow mixing them. */
10261 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10262 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10263 return TRUE;
10264
10265 return (iver == over);
10266}
10267
252b5132
RH		 10268/* Merge backend specific data from an object file to the output
10269 object file when linking. */
9b485d32 10270
b34976b6 10271static bfd_boolean
21d799b5 10272elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10273
9b485d32
NC		 10274/* Display the flags field. */
10275
b34976b6 10276static bfd_boolean
57e8b36a 10277elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10278{
fc830a83
NC		 10279 FILE * file = (FILE *) ptr;
10280 unsigned long flags;
252b5132
RH		 10281
10282 BFD_ASSERT (abfd != NULL && ptr != NULL);
10283
10284 /* Print normal ELF private data. */
10285 _bfd_elf_print_private_bfd_data (abfd, ptr);
10286
fc830a83 10287 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10288 /* Ignore init flag - it may not be set, despite the flags field
10289 containing valid data. */
252b5132
RH		 10290
10291 /* xgettext:c-format */
9b485d32 10292 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10293
fc830a83
NC		 10294 switch (EF_ARM_EABI_VERSION (flags))
10295 {
10296 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10297 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10298 official ARM ELF extended ABI. Hence they are only decoded if
10299 the EABI version is not set. */
fd2ec330 10300 if (flags & EF_ARM_INTERWORK)
9b485d32 10301 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10302
fd2ec330 10303 if (flags & EF_ARM_APCS_26)
6c571f00 10304 fprintf (file, " [APCS-26]");
fc830a83 10305 else
6c571f00 10306 fprintf (file, " [APCS-32]");
9a5aca8c 10307
96a846ea
RE		 10308 if (flags & EF_ARM_VFP_FLOAT)
10309 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10310 else if (flags & EF_ARM_MAVERICK_FLOAT)
10311 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10312 else
10313 fprintf (file, _(" [FPA float format]"));
10314
fd2ec330 10315 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10316 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10317
fd2ec330 10318 if (flags & EF_ARM_PIC)
9b485d32 10319 fprintf (file, _(" [position independent]"));
fc830a83 10320
fd2ec330 10321 if (flags & EF_ARM_NEW_ABI)
9b485d32 10322 fprintf (file, _(" [new ABI]"));
9a5aca8c 10323
fd2ec330 10324 if (flags & EF_ARM_OLD_ABI)
9b485d32 10325 fprintf (file, _(" [old ABI]"));
9a5aca8c 10326
fd2ec330 10327 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10328 fprintf (file, _(" [software FP]"));
9a5aca8c 10329
96a846ea
RE		 10330 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10331 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10332 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10333 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10334 break;
9a5aca8c 10335
fc830a83 10336 case EF_ARM_EABI_VER1:
9b485d32 10337 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10338
fc830a83 10339 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10340 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10341 else
9b485d32 10342 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10343
fc830a83
NC		 10344 flags &= ~ EF_ARM_SYMSARESORTED;
10345 break;
9a5aca8c 10346
fd2ec330
PB		 10347 case EF_ARM_EABI_VER2:
10348 fprintf (file, _(" [Version2 EABI]"));
10349
10350 if (flags & EF_ARM_SYMSARESORTED)
10351 fprintf (file, _(" [sorted symbol table]"));
10352 else
10353 fprintf (file, _(" [unsorted symbol table]"));
10354
10355 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10356 fprintf (file, _(" [dynamic symbols use segment index]"));
10357
10358 if (flags & EF_ARM_MAPSYMSFIRST)
10359 fprintf (file, _(" [mapping symbols precede others]"));
10360
99e4ae17 10361 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10362 | EF_ARM_MAPSYMSFIRST);
10363 break;
10364
d507cf36
PB		 10365 case EF_ARM_EABI_VER3:
10366 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10367 break;
10368
10369 case EF_ARM_EABI_VER4:
10370 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10371 goto eabi;
d507cf36 10372
3a4a14e9
PB		 10373 case EF_ARM_EABI_VER5:
10374 fprintf (file, _(" [Version5 EABI]"));
10375 eabi:
d507cf36
PB		 10376 if (flags & EF_ARM_BE8)
10377 fprintf (file, _(" [BE8]"));
10378
10379 if (flags & EF_ARM_LE8)
10380 fprintf (file, _(" [LE8]"));
10381
10382 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10383 break;
10384
fc830a83 10385 default:
9b485d32 10386 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10387 break;
10388 }
252b5132 10389
fc830a83 10390 flags &= ~ EF_ARM_EABIMASK;
252b5132 10391
fc830a83 10392 if (flags & EF_ARM_RELEXEC)
9b485d32 10393 fprintf (file, _(" [relocatable executable]"));
252b5132 10394
fc830a83 10395 if (flags & EF_ARM_HASENTRY)
9b485d32 10396 fprintf (file, _(" [has entry point]"));
252b5132 10397
fc830a83
NC		 10398 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10399
10400 if (flags)
9b485d32 10401 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10402
252b5132
RH		 10403 fputc ('\n', file);
10404
b34976b6 10405 return TRUE;
252b5132
RH		 10406}
10407
10408static int
57e8b36a 10409elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10410{
2f0ca46a
NC		 10411 switch (ELF_ST_TYPE (elf_sym->st_info))
10412 {
10413 case STT_ARM_TFUNC:
10414 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10415
2f0ca46a
NC		 10416 case STT_ARM_16BIT:
10417 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10418 This allows us to distinguish between data used by Thumb instructions
10419 and non-data (which is probably code) inside Thumb regions of an
10420 executable. */
1a0eb693 10421 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10422 return ELF_ST_TYPE (elf_sym->st_info);
10423 break;
9a5aca8c 10424
ce855c42
NC		 10425 default:
10426 break;
2f0ca46a
NC		 10427 }
10428
10429 return type;
252b5132 10430}
f21f3fe0 10431
252b5132 10432static asection *
07adf181
AM		 10433elf32_arm_gc_mark_hook (asection *sec,
10434 struct bfd_link_info *info,
10435 Elf_Internal_Rela *rel,
10436 struct elf_link_hash_entry *h,
10437 Elf_Internal_Sym *sym)
252b5132
RH		 10438{
10439 if (h != NULL)
07adf181 10440 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10441 {
10442 case R_ARM_GNU_VTINHERIT:
10443 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10444 return NULL;
10445 }
9ad5cbcf 10446
07adf181 10447 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10448}
10449
780a67af
NC		 10450/* Update the got entry reference counts for the section being removed. */
10451
b34976b6 10452static bfd_boolean
ba93b8ac
DJ		 10453elf32_arm_gc_sweep_hook (bfd * abfd,
10454 struct bfd_link_info * info,
10455 asection * sec,
10456 const Elf_Internal_Rela * relocs)
252b5132 10457{
5e681ec4
PB		 10458 Elf_Internal_Shdr *symtab_hdr;
10459 struct elf_link_hash_entry **sym_hashes;
10460 bfd_signed_vma *local_got_refcounts;
10461 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10462 struct elf32_arm_link_hash_table * globals;
10463
7dda2462
TG		 10464 if (info->relocatable)
10465 return TRUE;
10466
eb043451 10467 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10468
10469 elf_section_data (sec)->local_dynrel = NULL;
10470
0ffa91dd 10471 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10472 sym_hashes = elf_sym_hashes (abfd);
10473 local_got_refcounts = elf_local_got_refcounts (abfd);
10474
906e58ca 10475 check_use_blx (globals);
bd97cb95 10476
5e681ec4
PB		 10477 relend = relocs + sec->reloc_count;
10478 for (rel = relocs; rel < relend; rel++)
eb043451 10479 {
3eb128b2
AM		 10480 unsigned long r_symndx;
10481 struct elf_link_hash_entry *h = NULL;
eb043451 10482 int r_type;
5e681ec4 10483
3eb128b2
AM		 10484 r_symndx = ELF32_R_SYM (rel->r_info);
10485 if (r_symndx >= symtab_hdr->sh_info)
10486 {
10487 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10488 while (h->root.type == bfd_link_hash_indirect
10489 || h->root.type == bfd_link_hash_warning)
10490 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10491 }
10492
eb043451 10493 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10494 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10495 switch (r_type)
10496 {
10497 case R_ARM_GOT32:
eb043451 10498 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10499 case R_ARM_TLS_GD32:
10500 case R_ARM_TLS_IE32:
3eb128b2 10501 if (h != NULL)
eb043451 10502 {
eb043451
PB		 10503 if (h->got.refcount > 0)
10504 h->got.refcount -= 1;
10505 }
10506 else if (local_got_refcounts != NULL)
10507 {
10508 if (local_got_refcounts[r_symndx] > 0)
10509 local_got_refcounts[r_symndx] -= 1;
10510 }
10511 break;
10512
ba93b8ac
DJ		 10513 case R_ARM_TLS_LDM32:
10514 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10515 break;
10516
eb043451 10517 case R_ARM_ABS32:
bb224fc3 10518 case R_ARM_ABS32_NOI:
eb043451 10519 case R_ARM_REL32:
bb224fc3 10520 case R_ARM_REL32_NOI:
eb043451
PB		 10521 case R_ARM_PC24:
10522 case R_ARM_PLT32:
5b5bb741
PB		 10523 case R_ARM_CALL:
10524 case R_ARM_JUMP24:
eb043451 10525 case R_ARM_PREL31:
c19d1205 10526 case R_ARM_THM_CALL:
bd97cb95
DJ		 10527 case R_ARM_THM_JUMP24:
10528 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10529 case R_ARM_MOVW_ABS_NC:
10530 case R_ARM_MOVT_ABS:
10531 case R_ARM_MOVW_PREL_NC:
10532 case R_ARM_MOVT_PREL:
10533 case R_ARM_THM_MOVW_ABS_NC:
10534 case R_ARM_THM_MOVT_ABS:
10535 case R_ARM_THM_MOVW_PREL_NC:
10536 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10537 /* Should the interworking branches be here also? */
10538
3eb128b2 10539 if (h != NULL)
eb043451
PB		 10540 {
10541 struct elf32_arm_link_hash_entry *eh;
10542 struct elf32_arm_relocs_copied **pp;
10543 struct elf32_arm_relocs_copied *p;
5e681ec4 10544
b7693d02 10545 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10546
eb043451 10547 if (h->plt.refcount > 0)
b7693d02
DJ		 10548 {
10549 h->plt.refcount -= 1;
bd97cb95
DJ		 10550 if (r_type == R_ARM_THM_CALL)
10551 eh->plt_maybe_thumb_refcount--;
10552
10553 if (r_type == R_ARM_THM_JUMP24
10554 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10555 eh->plt_thumb_refcount--;
10556 }
5e681ec4 10557
eb043451 10558 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10559 || r_type == R_ARM_REL32
10560 || r_type == R_ARM_ABS32_NOI
10561 || r_type == R_ARM_REL32_NOI)
eb043451 10562 {
eb043451
PB		 10563 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10564 pp = &p->next)
10565 if (p->section == sec)
10566 {
10567 p->count -= 1;
bb224fc3
MS		 10568 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10569 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10570 p->pc_count -= 1;
eb043451
PB		 10571 if (p->count == 0)
10572 *pp = p->next;
10573 break;
10574 }
10575 }
10576 }
10577 break;
5e681ec4 10578
eb043451
PB		 10579 default:
10580 break;
10581 }
10582 }
5e681ec4 10583
b34976b6 10584 return TRUE;
252b5132
RH		 10585}
10586
780a67af
NC		 10587/* Look through the relocs for a section during the first phase. */
10588
b34976b6 10589static bfd_boolean
57e8b36a
NC		 10590elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10591 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10592{
b34976b6
AM		 10593 Elf_Internal_Shdr *symtab_hdr;
10594 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10595 const Elf_Internal_Rela *rel;
10596 const Elf_Internal_Rela *rel_end;
10597 bfd *dynobj;
5e681ec4 10598 asection *sreloc;
b34976b6 10599 bfd_vma *local_got_offsets;
5e681ec4 10600 struct elf32_arm_link_hash_table *htab;
39623e12 10601 bfd_boolean needs_plt;
ce98a316 10602 unsigned long nsyms;
9a5aca8c 10603
1049f94e 10604 if (info->relocatable)
b34976b6 10605 return TRUE;
9a5aca8c 10606
0ffa91dd
NC		 10607 BFD_ASSERT (is_arm_elf (abfd));
10608
5e681ec4
PB		 10609 htab = elf32_arm_hash_table (info);
10610 sreloc = NULL;
9a5aca8c 10611
67687978
PB		 10612 /* Create dynamic sections for relocatable executables so that we can
10613 copy relocations. */
10614 if (htab->root.is_relocatable_executable
10615 && ! htab->root.dynamic_sections_created)
10616 {
10617 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10618 return FALSE;
10619 }
10620
252b5132
RH		 10621 dynobj = elf_hash_table (info)->dynobj;
10622 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10623
0ffa91dd 10624 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10625 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10626 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10627
252b5132
RH		 10628 rel_end = relocs + sec->reloc_count;
10629 for (rel = relocs; rel < rel_end; rel++)
10630 {
10631 struct elf_link_hash_entry *h;
b7693d02 10632 struct elf32_arm_link_hash_entry *eh;
252b5132 10633 unsigned long r_symndx;
eb043451 10634 int r_type;
9a5aca8c 10635
252b5132 10636 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10637 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10638 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10639
ce98a316
NC		 10640 if (r_symndx >= nsyms
10641 /* PR 9934: It is possible to have relocations that do not
10642 refer to symbols, thus it is also possible to have an
10643 object file containing relocations but no symbol table. */
10644 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10645 {
10646 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10647 r_symndx);
ba93b8ac
DJ		 10648 return FALSE;
10649 }
10650
ce98a316 10651 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10652 h = NULL;
10653 else
973a3492
L		 10654 {
10655 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10656 while (h->root.type == bfd_link_hash_indirect
10657 || h->root.type == bfd_link_hash_warning)
10658 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10659 }
9a5aca8c 10660
b7693d02
DJ		 10661 eh = (struct elf32_arm_link_hash_entry *) h;
10662
eb043451 10663 switch (r_type)
252b5132 10664 {
5e681ec4 10665 case R_ARM_GOT32:
eb043451 10666 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10667 case R_ARM_TLS_GD32:
10668 case R_ARM_TLS_IE32:
5e681ec4 10669 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10670 {
10671 int tls_type, old_tls_type;
5e681ec4 10672
ba93b8ac
DJ		 10673 switch (r_type)
10674 {
10675 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10676 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10677 default: tls_type = GOT_NORMAL; break;
10678 }
252b5132 10679
ba93b8ac
DJ		 10680 if (h != NULL)
10681 {
10682 h->got.refcount++;
10683 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10684 }
10685 else
10686 {
10687 bfd_signed_vma *local_got_refcounts;
10688
10689 /* This is a global offset table entry for a local symbol. */
10690 local_got_refcounts = elf_local_got_refcounts (abfd);
10691 if (local_got_refcounts == NULL)
10692 {
10693 bfd_size_type size;
906e58ca 10694
ba93b8ac 10695 size = symtab_hdr->sh_info;
906e58ca 10696 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10697 local_got_refcounts = (bfd_signed_vma *)
10698 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10699 if (local_got_refcounts == NULL)
10700 return FALSE;
10701 elf_local_got_refcounts (abfd) = local_got_refcounts;
10702 elf32_arm_local_got_tls_type (abfd)
10703 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10704 }
10705 local_got_refcounts[r_symndx] += 1;
10706 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10707 }
10708
10709 /* We will already have issued an error message if there is a
10710 TLS / non-TLS mismatch, based on the symbol type. We don't
10711 support any linker relaxations. So just combine any TLS
10712 types needed. */
10713 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10714 && tls_type != GOT_NORMAL)
10715 tls_type |= old_tls_type;
10716
10717 if (old_tls_type != tls_type)
10718 {
10719 if (h != NULL)
10720 elf32_arm_hash_entry (h)->tls_type = tls_type;
10721 else
10722 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10723 }
10724 }
8029a119 10725 /* Fall through. */
ba93b8ac
DJ		 10726
10727 case R_ARM_TLS_LDM32:
10728 if (r_type == R_ARM_TLS_LDM32)
10729 htab->tls_ldm_got.refcount++;
8029a119 10730 /* Fall through. */
252b5132 10731
c19d1205 10732 case R_ARM_GOTOFF32:
5e681ec4
PB		 10733 case R_ARM_GOTPC:
10734 if (htab->sgot == NULL)
10735 {
10736 if (htab->root.dynobj == NULL)
10737 htab->root.dynobj = abfd;
10738 if (!create_got_section (htab->root.dynobj, info))
10739 return FALSE;
10740 }
252b5132
RH		 10741 break;
10742
00a97672
RS		 10743 case R_ARM_ABS12:
10744 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10745 ldr __GOTT_INDEX__ offsets. */
10746 if (!htab->vxworks_p)
10747 break;
8029a119 10748 /* Fall through. */
00a97672 10749
252b5132 10750 case R_ARM_PC24:
7359ea65 10751 case R_ARM_PLT32:
5b5bb741
PB		 10752 case R_ARM_CALL:
10753 case R_ARM_JUMP24:
eb043451 10754 case R_ARM_PREL31:
c19d1205 10755 case R_ARM_THM_CALL:
bd97cb95
DJ		 10756 case R_ARM_THM_JUMP24:
10757 case R_ARM_THM_JUMP19:
39623e12
PB		 10758 needs_plt = 1;
10759 goto normal_reloc;
10760
96c23d59
JM		 10761 case R_ARM_MOVW_ABS_NC:
10762 case R_ARM_MOVT_ABS:
10763 case R_ARM_THM_MOVW_ABS_NC:
10764 case R_ARM_THM_MOVT_ABS:
10765 if (info->shared)
10766 {
10767 (*_bfd_error_handler)
10768 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10769 abfd, elf32_arm_howto_table_1[r_type].name,
10770 (h) ? h->root.root.string : "a local symbol");
10771 bfd_set_error (bfd_error_bad_value);
10772 return FALSE;
10773 }
10774
10775 /* Fall through. */
39623e12
PB		 10776 case R_ARM_ABS32:
10777 case R_ARM_ABS32_NOI:
10778 case R_ARM_REL32:
10779 case R_ARM_REL32_NOI:
b6895b4f
PB		 10780 case R_ARM_MOVW_PREL_NC:
10781 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10782 case R_ARM_THM_MOVW_PREL_NC:
10783 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10784 needs_plt = 0;
10785 normal_reloc:
10786
b7693d02 10787 /* Should the interworking branches be listed here? */
7359ea65 10788 if (h != NULL)
5e681ec4
PB		 10789 {
10790 /* If this reloc is in a read-only section, we might
10791 need a copy reloc. We can't check reliably at this
10792 stage whether the section is read-only, as input
10793 sections have not yet been mapped to output sections.
10794 Tentatively set the flag for now, and correct in
10795 adjust_dynamic_symbol. */
7359ea65 10796 if (!info->shared)
f5385ebf 10797 h->non_got_ref = 1;
7359ea65 10798
5e681ec4 10799 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10800 refers to is in a different object. We can't tell for
10801 sure yet, because something later might force the
10802 symbol local. */
39623e12 10803 if (needs_plt)
f5385ebf 10804 h->needs_plt = 1;
4f199be3
DJ		 10805
10806 /* If we create a PLT entry, this relocation will reference
10807 it, even if it's an ABS32 relocation. */
10808 h->plt.refcount += 1;
b7693d02 10809
bd97cb95
DJ		 10810 /* It's too early to use htab->use_blx here, so we have to
10811 record possible blx references separately from
10812 relocs that definitely need a thumb stub. */
10813
c19d1205 10814 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10815 eh->plt_maybe_thumb_refcount += 1;
10816
10817 if (r_type == R_ARM_THM_JUMP24
10818 || r_type == R_ARM_THM_JUMP19)
b7693d02 10819 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10820 }
10821
67687978
PB		 10822 /* If we are creating a shared library or relocatable executable,
10823 and this is a reloc against a global symbol, or a non PC
10824 relative reloc against a local symbol, then we need to copy
10825 the reloc into the shared library. However, if we are linking
10826 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10827 global symbol which is defined in an object we are
10828 including in the link (i.e., DEF_REGULAR is set). At
10829 this point we have not seen all the input files, so it is
10830 possible that DEF_REGULAR is not set now but will be set
10831 later (it is never cleared). We account for that
10832 possibility below by storing information in the
5e681ec4 10833 relocs_copied field of the hash table entry. */
67687978 10834 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10835 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10836 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10837 || (h != NULL && ! h->needs_plt
10838 && (! info->symbolic || ! h->def_regular))))
252b5132 10839 {
5e681ec4
PB		 10840 struct elf32_arm_relocs_copied *p, **head;
10841
252b5132
RH		 10842 /* When creating a shared object, we must copy these
10843 reloc types into the output file. We create a reloc
10844 section in dynobj and make room for this reloc. */
83bac4b0 10845 if (sreloc == NULL)
252b5132 10846 {
83bac4b0
NC		 10847 sreloc = _bfd_elf_make_dynamic_reloc_section
10848 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10849
83bac4b0 10850 if (sreloc == NULL)
b34976b6 10851 return FALSE;
252b5132 10852
83bac4b0 10853 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10854 if (htab->symbian_p)
252b5132 10855 {
83bac4b0 10856 flagword flags;
5e681ec4 10857
83bac4b0 10858 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10859 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10860 bfd_set_section_flags (dynobj, sreloc, flags);
10861 }
252b5132
RH		 10862 }
10863
5e681ec4
PB		 10864 /* If this is a global symbol, we count the number of
10865 relocations we need for this symbol. */
10866 if (h != NULL)
252b5132 10867 {
5e681ec4
PB		 10868 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10869 }
10870 else
10871 {
10872 /* Track dynamic relocs needed for local syms too.
10873 We really need local syms available to do this
10874 easily. Oh well. */
5e681ec4 10875 asection *s;
6edfbbad 10876 void *vpp;
87d72d41 10877 Elf_Internal_Sym *isym;
6edfbbad 10878
87d72d41
AM		 10879 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
10880 abfd, r_symndx);
10881 if (isym == NULL)
5e681ec4 10882 return FALSE;
57e8b36a 10883
87d72d41
AM		 10884 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10885 if (s == NULL)
10886 s = sec;
10887
6edfbbad
DJ		 10888 vpp = &elf_section_data (s)->local_dynrel;
10889 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10890 }
57e8b36a 10891
5e681ec4
PB		 10892 p = *head;
10893 if (p == NULL || p->section != sec)
10894 {
10895 bfd_size_type amt = sizeof *p;
57e8b36a 10896
21d799b5
NC		 10897 p = (struct elf32_arm_relocs_copied *)
10898 bfd_alloc (htab->root.dynobj, amt);
252b5132 10899 if (p == NULL)
5e681ec4
PB		 10900 return FALSE;
10901 p->next = *head;
10902 *head = p;
10903 p->section = sec;
10904 p->count = 0;
ba93b8ac 10905 p->pc_count = 0;
252b5132 10906 }
57e8b36a 10907
bb224fc3 10908 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10909 p->pc_count += 1;
71a976dd 10910 p->count += 1;
252b5132
RH		 10911 }
10912 break;
10913
10914 /* This relocation describes the C++ object vtable hierarchy.
10915 Reconstruct it for later use during GC. */
10916 case R_ARM_GNU_VTINHERIT:
c152c796 10917 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10918 return FALSE;
252b5132 10919 break;
9a5aca8c 10920
252b5132
RH		 10921 /* This relocation describes which C++ vtable entries are actually
10922 used. Record for later use during GC. */
10923 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10924 BFD_ASSERT (h != NULL);
10925 if (h != NULL
10926 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10927 return FALSE;
252b5132
RH		 10928 break;
10929 }
10930 }
f21f3fe0 10931
b34976b6 10932 return TRUE;
252b5132
RH		 10933}
10934
6a5bb875
PB		 10935/* Unwinding tables are not referenced directly. This pass marks them as
10936 required if the corresponding code section is marked. */
10937
10938static bfd_boolean
906e58ca
NC		 10939elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
10940 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 10941{
10942 bfd *sub;
10943 Elf_Internal_Shdr **elf_shdrp;
10944 bfd_boolean again;
10945
10946 /* Marking EH data may cause additional code sections to be marked,
10947 requiring multiple passes. */
10948 again = TRUE;
10949 while (again)
10950 {
10951 again = FALSE;
10952 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
10953 {
10954 asection *o;
10955
0ffa91dd 10956 if (! is_arm_elf (sub))
6a5bb875
PB		 10957 continue;
10958
10959 elf_shdrp = elf_elfsections (sub);
10960 for (o = sub->sections; o != NULL; o = o->next)
10961 {
10962 Elf_Internal_Shdr *hdr;
0ffa91dd 10963
6a5bb875 10964 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 10965 if (hdr->sh_type == SHT_ARM_EXIDX
10966 && hdr->sh_link
10967 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10968 && !o->gc_mark
10969 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10970 {
10971 again = TRUE;
10972 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10973 return FALSE;
10974 }
10975 }
10976 }
10977 }
10978
10979 return TRUE;
10980}
10981
3c9458e9
NC		 10982/* Treat mapping symbols as special target symbols. */
10983
10984static bfd_boolean
10985elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
10986{
b0796911
PB		 10987 return bfd_is_arm_special_symbol_name (sym->name,
10988 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 10989}
10990
0367ecfb
NC		 10991/* This is a copy of elf_find_function() from elf.c except that
10992 ARM mapping symbols are ignored when looking for function names
10993 and STT_ARM_TFUNC is considered to a function type. */
252b5132 10994
0367ecfb
NC		 10995static bfd_boolean
10996arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
10997 asection * section,
10998 asymbol ** symbols,
10999 bfd_vma offset,
11000 const char ** filename_ptr,
11001 const char ** functionname_ptr)
11002{
11003 const char * filename = NULL;
11004 asymbol * func = NULL;
11005 bfd_vma low_func = 0;
11006 asymbol ** p;
252b5132
RH		 11007
11008 for (p = symbols; *p != NULL; p++)
11009 {
11010 elf_symbol_type *q;
11011
11012 q = (elf_symbol_type *) *p;
11013
252b5132
RH		 11014 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11015 {
11016 default:
11017 break;
11018 case STT_FILE:
11019 filename = bfd_asymbol_name (&q->symbol);
11020 break;
252b5132
RH		 11021 case STT_FUNC:
11022 case STT_ARM_TFUNC:
9d2da7ca 11023 case STT_NOTYPE:
b0796911 11024 /* Skip mapping symbols. */
0367ecfb 11025 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11026 && bfd_is_arm_special_symbol_name (q->symbol.name,
11027 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11028 continue;
11029 /* Fall through. */
6b40fcba 11030 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11031 && q->symbol.value >= low_func
11032 && q->symbol.value <= offset)
11033 {
11034 func = (asymbol *) q;
11035 low_func = q->symbol.value;
11036 }
11037 break;
11038 }
11039 }
11040
11041 if (func == NULL)
b34976b6 11042 return FALSE;
252b5132 11043
0367ecfb
NC		 11044 if (filename_ptr)
11045 *filename_ptr = filename;
11046 if (functionname_ptr)
11047 *functionname_ptr = bfd_asymbol_name (func);
11048
11049 return TRUE;
906e58ca 11050}
0367ecfb
NC		 11051
11052
11053/* Find the nearest line to a particular section and offset, for error
11054 reporting. This code is a duplicate of the code in elf.c, except
11055 that it uses arm_elf_find_function. */
11056
11057static bfd_boolean
11058elf32_arm_find_nearest_line (bfd * abfd,
11059 asection * section,
11060 asymbol ** symbols,
11061 bfd_vma offset,
11062 const char ** filename_ptr,
11063 const char ** functionname_ptr,
11064 unsigned int * line_ptr)
11065{
11066 bfd_boolean found = FALSE;
11067
11068 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11069
11070 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11071 filename_ptr, functionname_ptr,
11072 line_ptr, 0,
11073 & elf_tdata (abfd)->dwarf2_find_line_info))
11074 {
11075 if (!*functionname_ptr)
11076 arm_elf_find_function (abfd, section, symbols, offset,
11077 *filename_ptr ? NULL : filename_ptr,
11078 functionname_ptr);
f21f3fe0 11079
0367ecfb
NC		 11080 return TRUE;
11081 }
11082
11083 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11084 & found, filename_ptr,
11085 functionname_ptr, line_ptr,
11086 & elf_tdata (abfd)->line_info))
11087 return FALSE;
11088
11089 if (found && (*functionname_ptr || *line_ptr))
11090 return TRUE;
11091
11092 if (symbols == NULL)
11093 return FALSE;
11094
11095 if (! arm_elf_find_function (abfd, section, symbols, offset,
11096 filename_ptr, functionname_ptr))
11097 return FALSE;
11098
11099 *line_ptr = 0;
b34976b6 11100 return TRUE;
252b5132
RH		 11101}
11102
4ab527b0
FF		 11103static bfd_boolean
11104elf32_arm_find_inliner_info (bfd * abfd,
11105 const char ** filename_ptr,
11106 const char ** functionname_ptr,
11107 unsigned int * line_ptr)
11108{
11109 bfd_boolean found;
11110 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11111 functionname_ptr, line_ptr,
11112 & elf_tdata (abfd)->dwarf2_find_line_info);
11113 return found;
11114}
11115
252b5132
RH		 11116/* Adjust a symbol defined by a dynamic object and referenced by a
11117 regular object. The current definition is in some section of the
11118 dynamic object, but we're not including those sections. We have to
11119 change the definition to something the rest of the link can
11120 understand. */
11121
b34976b6 11122static bfd_boolean
57e8b36a
NC		 11123elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11124 struct elf_link_hash_entry * h)
252b5132
RH		 11125{
11126 bfd * dynobj;
11127 asection * s;
b7693d02 11128 struct elf32_arm_link_hash_entry * eh;
67687978 11129 struct elf32_arm_link_hash_table *globals;
252b5132 11130
67687978 11131 globals = elf32_arm_hash_table (info);
252b5132
RH		 11132 dynobj = elf_hash_table (info)->dynobj;
11133
11134 /* Make sure we know what is going on here. */
11135 BFD_ASSERT (dynobj != NULL
f5385ebf 11136 && (h->needs_plt
f6e332e6 11137 || h->u.weakdef != NULL
f5385ebf
AM		 11138 || (h->def_dynamic
11139 && h->ref_regular
11140 && !h->def_regular)));
252b5132 11141
b7693d02
DJ		 11142 eh = (struct elf32_arm_link_hash_entry *) h;
11143
252b5132
RH		 11144 /* If this is a function, put it in the procedure linkage table. We
11145 will fill in the contents of the procedure linkage table later,
11146 when we know the address of the .got section. */
0f88be7a 11147 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11148 || h->needs_plt)
252b5132 11149 {
5e681ec4
PB		 11150 if (h->plt.refcount <= 0
11151 || SYMBOL_CALLS_LOCAL (info, h)
11152 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11153 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11154 {
11155 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11156 file, but the symbol was never referred to by a dynamic
11157 object, or if all references were garbage collected. In
11158 such a case, we don't actually need to build a procedure
11159 linkage table, and we can just do a PC24 reloc instead. */
11160 h->plt.offset = (bfd_vma) -1;
b7693d02 11161 eh->plt_thumb_refcount = 0;
bd97cb95 11162 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11163 h->needs_plt = 0;
252b5132
RH		 11164 }
11165
b34976b6 11166 return TRUE;
252b5132 11167 }
5e681ec4 11168 else
b7693d02
DJ		 11169 {
11170 /* It's possible that we incorrectly decided a .plt reloc was
11171 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11172 in check_relocs. We can't decide accurately between function
11173 and non-function syms in check-relocs; Objects loaded later in
11174 the link may change h->type. So fix it now. */
11175 h->plt.offset = (bfd_vma) -1;
11176 eh->plt_thumb_refcount = 0;
bd97cb95 11177 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11178 }
252b5132
RH		 11179
11180 /* If this is a weak symbol, and there is a real definition, the
11181 processor independent code will have arranged for us to see the
11182 real definition first, and we can just use the same value. */
f6e332e6 11183 if (h->u.weakdef != NULL)
252b5132 11184 {
f6e332e6
AM		 11185 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11186 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11187 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11188 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11189 return TRUE;
252b5132
RH		 11190 }
11191
ba93b8ac
DJ		 11192 /* If there are no non-GOT references, we do not need a copy
11193 relocation. */
11194 if (!h->non_got_ref)
11195 return TRUE;
11196
252b5132
RH		 11197 /* This is a reference to a symbol defined by a dynamic object which
11198 is not a function. */
11199
11200 /* If we are creating a shared library, we must presume that the
11201 only references to the symbol are via the global offset table.
11202 For such cases we need not do anything here; the relocations will
67687978
PB		 11203 be handled correctly by relocate_section. Relocatable executables
11204 can reference data in shared objects directly, so we don't need to
11205 do anything here. */
11206 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11207 return TRUE;
252b5132 11208
909272ee
AM		 11209 if (h->size == 0)
11210 {
11211 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11212 h->root.root.string);
11213 return TRUE;
11214 }
11215
252b5132
RH		 11216 /* We must allocate the symbol in our .dynbss section, which will
11217 become part of the .bss section of the executable. There will be
11218 an entry for this symbol in the .dynsym section. The dynamic
11219 object will contain position independent code, so all references
11220 from the dynamic object to this symbol will go through the global
11221 offset table. The dynamic linker will use the .dynsym entry to
11222 determine the address it must put in the global offset table, so
11223 both the dynamic object and the regular object will refer to the
11224 same memory location for the variable. */
252b5132
RH		 11225 s = bfd_get_section_by_name (dynobj, ".dynbss");
11226 BFD_ASSERT (s != NULL);
11227
11228 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11229 copy the initial value out of the dynamic object and into the
11230 runtime process image. We need to remember the offset into the
00a97672 11231 .rel(a).bss section we are going to use. */
252b5132
RH		 11232 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11233 {
11234 asection *srel;
11235
00a97672 11236 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11237 BFD_ASSERT (srel != NULL);
00a97672 11238 srel->size += RELOC_SIZE (globals);
f5385ebf 11239 h->needs_copy = 1;
252b5132
RH		 11240 }
11241
027297b7 11242 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11243}
11244
5e681ec4
PB		 11245/* Allocate space in .plt, .got and associated reloc sections for
11246 dynamic relocs. */
11247
11248static bfd_boolean
57e8b36a 11249allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11250{
11251 struct bfd_link_info *info;
11252 struct elf32_arm_link_hash_table *htab;
11253 struct elf32_arm_link_hash_entry *eh;
11254 struct elf32_arm_relocs_copied *p;
bd97cb95 11255 bfd_signed_vma thumb_refs;
5e681ec4 11256
b7693d02
DJ		 11257 eh = (struct elf32_arm_link_hash_entry *) h;
11258
5e681ec4
PB		 11259 if (h->root.type == bfd_link_hash_indirect)
11260 return TRUE;
11261
11262 if (h->root.type == bfd_link_hash_warning)
11263 /* When warning symbols are created, they **replace** the "real"
11264 entry in the hash table, thus we never get to see the real
11265 symbol in a hash traversal. So look at it now. */
11266 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11267
11268 info = (struct bfd_link_info *) inf;
11269 htab = elf32_arm_hash_table (info);
11270
11271 if (htab->root.dynamic_sections_created
11272 && h->plt.refcount > 0)
11273 {
11274 /* Make sure this symbol is output as a dynamic symbol.
11275 Undefined weak syms won't yet be marked as dynamic. */
11276 if (h->dynindx == -1
f5385ebf 11277 && !h->forced_local)
5e681ec4 11278 {
c152c796 11279 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11280 return FALSE;
11281 }
11282
11283 if (info->shared
7359ea65 11284 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11285 {
11286 asection *s = htab->splt;
11287
11288 /* If this is the first .plt entry, make room for the special
11289 first entry. */
eea6121a 11290 if (s->size == 0)
e5a52504 11291 s->size += htab->plt_header_size;
5e681ec4 11292
eea6121a 11293 h->plt.offset = s->size;
5e681ec4 11294
b7693d02
DJ		 11295 /* If we will insert a Thumb trampoline before this PLT, leave room
11296 for it. */
bd97cb95
DJ		 11297 thumb_refs = eh->plt_thumb_refcount;
11298 if (!htab->use_blx)
11299 thumb_refs += eh->plt_maybe_thumb_refcount;
11300
11301 if (thumb_refs > 0)
b7693d02
DJ		 11302 {
11303 h->plt.offset += PLT_THUMB_STUB_SIZE;
11304 s->size += PLT_THUMB_STUB_SIZE;
11305 }
11306
5e681ec4
PB		 11307 /* If this symbol is not defined in a regular file, and we are
11308 not generating a shared library, then set the symbol to this
11309 location in the .plt. This is required to make function
11310 pointers compare as equal between the normal executable and
11311 the shared library. */
11312 if (! info->shared
f5385ebf 11313 && !h->def_regular)
5e681ec4
PB		 11314 {
11315 h->root.u.def.section = s;
11316 h->root.u.def.value = h->plt.offset;
5e681ec4 11317
67d74e43
DJ		 11318 /* Make sure the function is not marked as Thumb, in case
11319 it is the target of an ABS32 relocation, which will
11320 point to the PLT entry. */
11321 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11322 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11323 }
022f8312 11324
5e681ec4 11325 /* Make room for this entry. */
e5a52504 11326 s->size += htab->plt_entry_size;
5e681ec4 11327
e5a52504 11328 if (!htab->symbian_p)
b7693d02
DJ		 11329 {
11330 /* We also need to make an entry in the .got.plt section, which
11331 will be placed in the .got section by the linker script. */
11332 eh->plt_got_offset = htab->sgotplt->size;
11333 htab->sgotplt->size += 4;
11334 }
5e681ec4 11335
00a97672
RS		 11336 /* We also need to make an entry in the .rel(a).plt section. */
11337 htab->srelplt->size += RELOC_SIZE (htab);
11338
11339 /* VxWorks executables have a second set of relocations for
11340 each PLT entry. They go in a separate relocation section,
11341 which is processed by the kernel loader. */
11342 if (htab->vxworks_p && !info->shared)
11343 {
11344 /* There is a relocation for the initial PLT entry:
11345 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11346 if (h->plt.offset == htab->plt_header_size)
11347 htab->srelplt2->size += RELOC_SIZE (htab);
11348
11349 /* There are two extra relocations for each subsequent
11350 PLT entry: an R_ARM_32 relocation for the GOT entry,
11351 and an R_ARM_32 relocation for the PLT entry. */
11352 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11353 }
5e681ec4
PB		 11354 }
11355 else
11356 {
11357 h->plt.offset = (bfd_vma) -1;
f5385ebf 11358 h->needs_plt = 0;
5e681ec4
PB		 11359 }
11360 }
11361 else
11362 {
11363 h->plt.offset = (bfd_vma) -1;
f5385ebf 11364 h->needs_plt = 0;
5e681ec4
PB		 11365 }
11366
11367 if (h->got.refcount > 0)
11368 {
11369 asection *s;
11370 bfd_boolean dyn;
ba93b8ac
DJ		 11371 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11372 int indx;
5e681ec4
PB		 11373
11374 /* Make sure this symbol is output as a dynamic symbol.
11375 Undefined weak syms won't yet be marked as dynamic. */
11376 if (h->dynindx == -1
f5385ebf 11377 && !h->forced_local)
5e681ec4 11378 {
c152c796 11379 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11380 return FALSE;
11381 }
11382
e5a52504
MM		 11383 if (!htab->symbian_p)
11384 {
11385 s = htab->sgot;
11386 h->got.offset = s->size;
ba93b8ac
DJ		 11387
11388 if (tls_type == GOT_UNKNOWN)
11389 abort ();
11390
11391 if (tls_type == GOT_NORMAL)
11392 /* Non-TLS symbols need one GOT slot. */
11393 s->size += 4;
11394 else
11395 {
11396 if (tls_type & GOT_TLS_GD)
11397 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11398 s->size += 8;
11399 if (tls_type & GOT_TLS_IE)
11400 /* R_ARM_TLS_IE32 needs one GOT slot. */
11401 s->size += 4;
11402 }
11403
e5a52504 11404 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11405
11406 indx = 0;
11407 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11408 && (!info->shared
11409 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11410 indx = h->dynindx;
11411
11412 if (tls_type != GOT_NORMAL
11413 && (info->shared || indx != 0)
11414 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11415 || h->root.type != bfd_link_hash_undefweak))
11416 {
11417 if (tls_type & GOT_TLS_IE)
00a97672 11418 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11419
11420 if (tls_type & GOT_TLS_GD)
00a97672 11421 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11422
11423 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11424 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11425 }
11426 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11427 || h->root.type != bfd_link_hash_undefweak)
11428 && (info->shared
11429 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11430 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11431 }
5e681ec4
PB		 11432 }
11433 else
11434 h->got.offset = (bfd_vma) -1;
11435
a4fd1a8e
PB		 11436 /* Allocate stubs for exported Thumb functions on v4t. */
11437 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11438 && h->def_regular
a4fd1a8e
PB		 11439 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11440 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11441 {
11442 struct elf_link_hash_entry * th;
11443 struct bfd_link_hash_entry * bh;
11444 struct elf_link_hash_entry * myh;
11445 char name[1024];
11446 asection *s;
11447 bh = NULL;
11448 /* Create a new symbol to regist the real location of the function. */
11449 s = h->root.u.def.section;
906e58ca 11450 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11451 _bfd_generic_link_add_one_symbol (info, s->owner,
11452 name, BSF_GLOBAL, s,
11453 h->root.u.def.value,
11454 NULL, TRUE, FALSE, &bh);
11455
11456 myh = (struct elf_link_hash_entry *) bh;
11457 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11458 myh->forced_local = 1;
11459 eh->export_glue = myh;
11460 th = record_arm_to_thumb_glue (info, h);
11461 /* Point the symbol at the stub. */
11462 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11463 h->root.u.def.section = th->root.u.def.section;
11464 h->root.u.def.value = th->root.u.def.value & ~1;
11465 }
11466
5e681ec4
PB		 11467 if (eh->relocs_copied == NULL)
11468 return TRUE;
11469
11470 /* In the shared -Bsymbolic case, discard space allocated for
11471 dynamic pc-relative relocs against symbols which turn out to be
11472 defined in regular objects. For the normal shared case, discard
11473 space for pc-relative relocs that have become local due to symbol
11474 visibility changes. */
11475
67687978 11476 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11477 {
7bdca076 11478 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11479 R_ARM_REL32_NOI, which will appear on something like
11480 ".long foo - .". We want calls to protected symbols to resolve
11481 directly to the function rather than going via the plt. If people
11482 want function pointer comparisons to work as expected then they
11483 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11484 if (SYMBOL_CALLS_LOCAL (info, h))
11485 {
11486 struct elf32_arm_relocs_copied **pp;
11487
11488 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11489 {
11490 p->count -= p->pc_count;
11491 p->pc_count = 0;
11492 if (p->count == 0)
11493 *pp = p->next;
11494 else
11495 pp = &p->next;
11496 }
11497 }
11498
3348747a
NS		 11499 if (elf32_arm_hash_table (info)->vxworks_p)
11500 {
11501 struct elf32_arm_relocs_copied **pp;
11502
11503 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11504 {
11505 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11506 *pp = p->next;
11507 else
11508 pp = &p->next;
11509 }
11510 }
11511
ba93b8ac 11512 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11513 visibility. */
22d606e9 11514 if (eh->relocs_copied != NULL
5e681ec4 11515 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11516 {
11517 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11518 eh->relocs_copied = NULL;
11519
11520 /* Make sure undefined weak symbols are output as a dynamic
11521 symbol in PIEs. */
11522 else if (h->dynindx == -1
11523 && !h->forced_local)
11524 {
11525 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11526 return FALSE;
11527 }
11528 }
11529
67687978
PB		 11530 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11531 && h->root.type == bfd_link_hash_new)
11532 {
11533 /* Output absolute symbols so that we can create relocations
11534 against them. For normal symbols we output a relocation
11535 against the section that contains them. */
11536 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11537 return FALSE;
11538 }
11539
5e681ec4
PB		 11540 }
11541 else
11542 {
11543 /* For the non-shared case, discard space for relocs against
11544 symbols which turn out to need copy relocs or are not
11545 dynamic. */
11546
f5385ebf
AM		 11547 if (!h->non_got_ref
11548 && ((h->def_dynamic
11549 && !h->def_regular)
5e681ec4
PB		 11550 || (htab->root.dynamic_sections_created
11551 && (h->root.type == bfd_link_hash_undefweak
11552 || h->root.type == bfd_link_hash_undefined))))
11553 {
11554 /* Make sure this symbol is output as a dynamic symbol.
11555 Undefined weak syms won't yet be marked as dynamic. */
11556 if (h->dynindx == -1
f5385ebf 11557 && !h->forced_local)
5e681ec4 11558 {
c152c796 11559 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11560 return FALSE;
11561 }
11562
11563 /* If that succeeded, we know we'll be keeping all the
11564 relocs. */
11565 if (h->dynindx != -1)
11566 goto keep;
11567 }
11568
11569 eh->relocs_copied = NULL;
11570
11571 keep: ;
11572 }
11573
11574 /* Finally, allocate space. */
11575 for (p = eh->relocs_copied; p != NULL; p = p->next)
11576 {
11577 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11578 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11579 }
11580
11581 return TRUE;
11582}
11583
08d1f311
DJ		 11584/* Find any dynamic relocs that apply to read-only sections. */
11585
11586static bfd_boolean
8029a119 11587elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11588{
8029a119
NC		 11589 struct elf32_arm_link_hash_entry * eh;
11590 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11591
11592 if (h->root.type == bfd_link_hash_warning)
11593 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11594
11595 eh = (struct elf32_arm_link_hash_entry *) h;
11596 for (p = eh->relocs_copied; p != NULL; p = p->next)
11597 {
11598 asection *s = p->section;
11599
11600 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11601 {
11602 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11603
11604 info->flags |= DF_TEXTREL;
11605
11606 /* Not an error, just cut short the traversal. */
11607 return FALSE;
11608 }
11609 }
11610 return TRUE;
11611}
11612
d504ffc8
DJ		 11613void
11614bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11615 int byteswap_code)
11616{
11617 struct elf32_arm_link_hash_table *globals;
11618
11619 globals = elf32_arm_hash_table (info);
11620 globals->byteswap_code = byteswap_code;
11621}
11622
252b5132
RH		 11623/* Set the sizes of the dynamic sections. */
11624
b34976b6 11625static bfd_boolean
57e8b36a
NC		 11626elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11627 struct bfd_link_info * info)
252b5132
RH		 11628{
11629 bfd * dynobj;
11630 asection * s;
b34976b6
AM		 11631 bfd_boolean plt;
11632 bfd_boolean relocs;
5e681ec4
PB		 11633 bfd *ibfd;
11634 struct elf32_arm_link_hash_table *htab;
252b5132 11635
5e681ec4 11636 htab = elf32_arm_hash_table (info);
252b5132
RH		 11637 dynobj = elf_hash_table (info)->dynobj;
11638 BFD_ASSERT (dynobj != NULL);
39b41c9c 11639 check_use_blx (htab);
252b5132
RH		 11640
11641 if (elf_hash_table (info)->dynamic_sections_created)
11642 {
11643 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11644 if (info->executable)
252b5132
RH		 11645 {
11646 s = bfd_get_section_by_name (dynobj, ".interp");
11647 BFD_ASSERT (s != NULL);
eea6121a 11648 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11649 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11650 }
11651 }
5e681ec4
PB		 11652
11653 /* Set up .got offsets for local syms, and space for local dynamic
11654 relocs. */
11655 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11656 {
5e681ec4
PB		 11657 bfd_signed_vma *local_got;
11658 bfd_signed_vma *end_local_got;
11659 char *local_tls_type;
11660 bfd_size_type locsymcount;
11661 Elf_Internal_Shdr *symtab_hdr;
11662 asection *srel;
3348747a 11663 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11664
0ffa91dd 11665 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11666 continue;
11667
11668 for (s = ibfd->sections; s != NULL; s = s->next)
11669 {
11670 struct elf32_arm_relocs_copied *p;
11671
21d799b5
NC		 11672 for (p = (struct elf32_arm_relocs_copied *)
11673 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11674 {
11675 if (!bfd_is_abs_section (p->section)
11676 && bfd_is_abs_section (p->section->output_section))
11677 {
11678 /* Input section has been discarded, either because
11679 it is a copy of a linkonce section or due to
11680 linker script /DISCARD/, so we'll be discarding
11681 the relocs too. */
11682 }
3348747a
NS		 11683 else if (is_vxworks
11684 && strcmp (p->section->output_section->name,
11685 ".tls_vars") == 0)
11686 {
11687 /* Relocations in vxworks .tls_vars sections are
11688 handled specially by the loader. */
11689 }
5e681ec4
PB		 11690 else if (p->count != 0)
11691 {
11692 srel = elf_section_data (p->section)->sreloc;
00a97672 11693 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11694 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11695 info->flags |= DF_TEXTREL;
11696 }
11697 }
11698 }
11699
11700 local_got = elf_local_got_refcounts (ibfd);
11701 if (!local_got)
11702 continue;
11703
0ffa91dd 11704 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11705 locsymcount = symtab_hdr->sh_info;
11706 end_local_got = local_got + locsymcount;
ba93b8ac 11707 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11708 s = htab->sgot;
11709 srel = htab->srelgot;
11710 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11711 {
11712 if (*local_got > 0)
11713 {
eea6121a 11714 *local_got = s->size;
ba93b8ac
DJ		 11715 if (*local_tls_type & GOT_TLS_GD)
11716 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11717 s->size += 8;
11718 if (*local_tls_type & GOT_TLS_IE)
11719 s->size += 4;
11720 if (*local_tls_type == GOT_NORMAL)
11721 s->size += 4;
11722
11723 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11724 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11725 }
11726 else
11727 *local_got = (bfd_vma) -1;
11728 }
252b5132
RH		 11729 }
11730
ba93b8ac
DJ		 11731 if (htab->tls_ldm_got.refcount > 0)
11732 {
11733 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11734 for R_ARM_TLS_LDM32 relocations. */
11735 htab->tls_ldm_got.offset = htab->sgot->size;
11736 htab->sgot->size += 8;
11737 if (info->shared)
00a97672 11738 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11739 }
11740 else
11741 htab->tls_ldm_got.offset = -1;
11742
5e681ec4
PB		 11743 /* Allocate global sym .plt and .got entries, and space for global
11744 sym dynamic relocs. */
57e8b36a 11745 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11746
d504ffc8
DJ		 11747 /* Here we rummage through the found bfds to collect glue information. */
11748 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11749 {
0ffa91dd 11750 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11751 continue;
11752
c7b8f16e
JB		 11753 /* Initialise mapping tables for code/data. */
11754 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11755
c7b8f16e
JB		 11756 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11757 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11758 /* xgettext:c-format */
11759 _bfd_error_handler (_("Errors encountered processing file %s"),
11760 ibfd->filename);
11761 }
d504ffc8 11762
3e6b1042
DJ		 11763 /* Allocate space for the glue sections now that we've sized them. */
11764 bfd_elf32_arm_allocate_interworking_sections (info);
11765
252b5132
RH		 11766 /* The check_relocs and adjust_dynamic_symbol entry points have
11767 determined the sizes of the various dynamic sections. Allocate
11768 memory for them. */
b34976b6
AM		 11769 plt = FALSE;
11770 relocs = FALSE;
252b5132
RH		 11771 for (s = dynobj->sections; s != NULL; s = s->next)
11772 {
11773 const char * name;
252b5132
RH		 11774
11775 if ((s->flags & SEC_LINKER_CREATED) == 0)
11776 continue;
11777
11778 /* It's OK to base decisions on the section name, because none
11779 of the dynobj section names depend upon the input files. */
11780 name = bfd_get_section_name (dynobj, s);
11781
24a1ba0f 11782 if (strcmp (name, ".plt") == 0)
252b5132 11783 {
c456f082
AM		 11784 /* Remember whether there is a PLT. */
11785 plt = s->size != 0;
252b5132 11786 }
0112cd26 11787 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11788 {
c456f082 11789 if (s->size != 0)
252b5132 11790 {
252b5132 11791 /* Remember whether there are any reloc sections other
00a97672
RS		 11792 than .rel(a).plt and .rela.plt.unloaded. */
11793 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11794 relocs = TRUE;
252b5132
RH		 11795
11796 /* We use the reloc_count field as a counter if we need
11797 to copy relocs into the output file. */
11798 s->reloc_count = 0;
11799 }
11800 }
0112cd26 11801 else if (! CONST_STRNEQ (name, ".got")
c456f082 11802 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11803 {
11804 /* It's not one of our sections, so don't allocate space. */
11805 continue;
11806 }
11807
c456f082 11808 if (s->size == 0)
252b5132 11809 {
c456f082 11810 /* If we don't need this section, strip it from the
00a97672
RS		 11811 output file. This is mostly to handle .rel(a).bss and
11812 .rel(a).plt. We must create both sections in
c456f082
AM		 11813 create_dynamic_sections, because they must be created
11814 before the linker maps input sections to output
11815 sections. The linker does that before
11816 adjust_dynamic_symbol is called, and it is that
11817 function which decides whether anything needs to go
11818 into these sections. */
8423293d 11819 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11820 continue;
11821 }
11822
c456f082
AM		 11823 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11824 continue;
11825
252b5132 11826 /* Allocate memory for the section contents. */
21d799b5 11827 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 11828 if (s->contents == NULL)
b34976b6 11829 return FALSE;
252b5132
RH		 11830 }
11831
11832 if (elf_hash_table (info)->dynamic_sections_created)
11833 {
11834 /* Add some entries to the .dynamic section. We fill in the
11835 values later, in elf32_arm_finish_dynamic_sections, but we
11836 must add the entries now so that we get the correct size for
11837 the .dynamic section. The DT_DEBUG entry is filled in by the
11838 dynamic linker and used by the debugger. */
dc810e39 11839#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11840 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11841
8532796c 11842 if (info->executable)
252b5132 11843 {
dc810e39 11844 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11845 return FALSE;
252b5132
RH		 11846 }
11847
11848 if (plt)
11849 {
dc810e39
AM		 11850 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11851 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11852 || !add_dynamic_entry (DT_PLTREL,
11853 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11854 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11855 return FALSE;
252b5132
RH		 11856 }
11857
11858 if (relocs)
11859 {
00a97672
RS		 11860 if (htab->use_rel)
11861 {
11862 if (!add_dynamic_entry (DT_REL, 0)
11863 || !add_dynamic_entry (DT_RELSZ, 0)
11864 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11865 return FALSE;
11866 }
11867 else
11868 {
11869 if (!add_dynamic_entry (DT_RELA, 0)
11870 || !add_dynamic_entry (DT_RELASZ, 0)
11871 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11872 return FALSE;
11873 }
252b5132
RH		 11874 }
11875
08d1f311
DJ		 11876 /* If any dynamic relocs apply to a read-only section,
11877 then we need a DT_TEXTREL entry. */
11878 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11879 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11880 info);
08d1f311 11881
99e4ae17 11882 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11883 {
dc810e39 11884 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11885 return FALSE;
252b5132 11886 }
7a2b07ff
NS		 11887 if (htab->vxworks_p
11888 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11889 return FALSE;
252b5132 11890 }
8532796c 11891#undef add_dynamic_entry
252b5132 11892
b34976b6 11893 return TRUE;
252b5132
RH		 11894}
11895
252b5132
RH		 11896/* Finish up dynamic symbol handling. We set the contents of various
11897 dynamic sections here. */
11898
b34976b6 11899static bfd_boolean
906e58ca
NC		 11900elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11901 struct bfd_link_info * info,
11902 struct elf_link_hash_entry * h,
11903 Elf_Internal_Sym * sym)
252b5132
RH		 11904{
11905 bfd * dynobj;
e5a52504 11906 struct elf32_arm_link_hash_table *htab;
b7693d02 11907 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11908
11909 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11910 htab = elf32_arm_hash_table (info);
b7693d02 11911 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11912
11913 if (h->plt.offset != (bfd_vma) -1)
11914 {
11915 asection * splt;
252b5132 11916 asection * srel;
e5a52504 11917 bfd_byte *loc;
24a1ba0f 11918 bfd_vma plt_index;
947216bf 11919 Elf_Internal_Rela rel;
252b5132
RH		 11920
11921 /* This symbol has an entry in the procedure linkage table. Set
11922 it up. */
11923
11924 BFD_ASSERT (h->dynindx != -1);
11925
11926 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11927 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11928 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11929
e5a52504
MM		 11930 /* Fill in the entry in the procedure linkage table. */
11931 if (htab->symbian_p)
11932 {
906e58ca 11933 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 11934 elf32_arm_symbian_plt_entry[0],
11935 splt->contents + h->plt.offset);
906e58ca 11936 bfd_put_32 (output_bfd,
52ab56c2
PB		 11937 elf32_arm_symbian_plt_entry[1],
11938 splt->contents + h->plt.offset + 4);
906e58ca 11939
e5a52504 11940 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 11941 rel.r_offset = (splt->output_section->vma
11942 + splt->output_offset
52ab56c2 11943 + h->plt.offset + 4);
e5a52504 11944 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 11945
11946 /* Get the index in the procedure linkage table which
11947 corresponds to this symbol. This is the index of this symbol
11948 in all the symbols for which we are making plt entries. The
11949 first entry in the procedure linkage table is reserved. */
906e58ca 11950 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 11951 / htab->plt_entry_size);
e5a52504
MM		 11952 }
11953 else
11954 {
00a97672 11955 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 11956 bfd_vma got_displacement;
11957 asection * sgot;
52ab56c2 11958 bfd_byte * ptr;
906e58ca 11959
e5a52504
MM		 11960 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
11961 BFD_ASSERT (sgot != NULL);
11962
b7693d02
DJ		 11963 /* Get the offset into the .got.plt table of the entry that
11964 corresponds to this function. */
11965 got_offset = eh->plt_got_offset;
11966
11967 /* Get the index in the procedure linkage table which
11968 corresponds to this symbol. This is the index of this symbol
11969 in all the symbols for which we are making plt entries. The
11970 first three entries in .got.plt are reserved; after that
11971 symbols appear in the same order as in .plt. */
11972 plt_index = (got_offset - 12) / 4;
e5a52504 11973
00a97672
RS		 11974 /* Calculate the address of the GOT entry. */
11975 got_address = (sgot->output_section->vma
11976 + sgot->output_offset
11977 + got_offset);
5e681ec4 11978
00a97672
RS		 11979 /* ...and the address of the PLT entry. */
11980 plt_address = (splt->output_section->vma
11981 + splt->output_offset
11982 + h->plt.offset);
5e681ec4 11983
52ab56c2 11984 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 11985 if (htab->vxworks_p && info->shared)
11986 {
11987 unsigned int i;
11988 bfd_vma val;
11989
52ab56c2 11990 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11991 {
11992 val = elf32_arm_vxworks_shared_plt_entry[i];
11993 if (i == 2)
11994 val |= got_address - sgot->output_section->vma;
11995 if (i == 5)
11996 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11997 if (i == 2 || i == 5)
11998 bfd_put_32 (output_bfd, val, ptr);
11999 else
12000 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12001 }
12002 }
12003 else if (htab->vxworks_p)
b7693d02 12004 {
00a97672
RS		 12005 unsigned int i;
12006 bfd_vma val;
12007
d3753b85 12008 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12009 {
12010 val = elf32_arm_vxworks_exec_plt_entry[i];
12011 if (i == 2)
12012 val |= got_address;
12013 if (i == 4)
12014 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12015 if (i == 5)
12016 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12017 if (i == 2 || i == 5)
12018 bfd_put_32 (output_bfd, val, ptr);
12019 else
12020 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12021 }
12022
12023 loc = (htab->srelplt2->contents
12024 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12025
12026 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12027 referencing the GOT for this PLT entry. */
12028 rel.r_offset = plt_address + 8;
12029 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12030 rel.r_addend = got_offset;
12031 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12032 loc += RELOC_SIZE (htab);
12033
12034 /* Create the R_ARM_ABS32 relocation referencing the
12035 beginning of the PLT for this GOT entry. */
12036 rel.r_offset = got_address;
12037 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12038 rel.r_addend = 0;
12039 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12040 }
00a97672
RS		 12041 else
12042 {
bd97cb95 12043 bfd_signed_vma thumb_refs;
00a97672
RS		 12044 /* Calculate the displacement between the PLT slot and the
12045 entry in the GOT. The eight-byte offset accounts for the
12046 value produced by adding to pc in the first instruction
12047 of the PLT stub. */
12048 got_displacement = got_address - (plt_address + 8);
b7693d02 12049
00a97672
RS		 12050 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12051
bd97cb95
DJ		 12052 thumb_refs = eh->plt_thumb_refcount;
12053 if (!htab->use_blx)
12054 thumb_refs += eh->plt_maybe_thumb_refcount;
12055
12056 if (thumb_refs > 0)
00a97672 12057 {
52ab56c2
PB		 12058 put_thumb_insn (htab, output_bfd,
12059 elf32_arm_plt_thumb_stub[0], ptr - 4);
12060 put_thumb_insn (htab, output_bfd,
12061 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12062 }
12063
52ab56c2
PB		 12064 put_arm_insn (htab, output_bfd,
12065 elf32_arm_plt_entry[0]
12066 | ((got_displacement & 0x0ff00000) >> 20),
12067 ptr + 0);
12068 put_arm_insn (htab, output_bfd,
12069 elf32_arm_plt_entry[1]
12070 | ((got_displacement & 0x000ff000) >> 12),
12071 ptr+ 4);
12072 put_arm_insn (htab, output_bfd,
12073 elf32_arm_plt_entry[2]
12074 | (got_displacement & 0x00000fff),
12075 ptr + 8);
5e681ec4 12076#ifdef FOUR_WORD_PLT
52ab56c2 12077 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12078#endif
00a97672 12079 }
252b5132 12080
e5a52504
MM		 12081 /* Fill in the entry in the global offset table. */
12082 bfd_put_32 (output_bfd,
12083 (splt->output_section->vma
12084 + splt->output_offset),
12085 sgot->contents + got_offset);
906e58ca 12086
00a97672
RS		 12087 /* Fill in the entry in the .rel(a).plt section. */
12088 rel.r_addend = 0;
12089 rel.r_offset = got_address;
e5a52504
MM		 12090 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12091 }
57e8b36a 12092
00a97672
RS		 12093 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12094 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12095
f5385ebf 12096 if (!h->def_regular)
252b5132
RH		 12097 {
12098 /* Mark the symbol as undefined, rather than as defined in
12099 the .plt section. Leave the value alone. */
12100 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12101 /* If the symbol is weak, we do need to clear the value.
12102 Otherwise, the PLT entry would provide a definition for
12103 the symbol even if the symbol wasn't defined anywhere,
12104 and so the symbol would never be NULL. */
f5385ebf 12105 if (!h->ref_regular_nonweak)
d982ba73 12106 sym->st_value = 0;
252b5132
RH		 12107 }
12108 }
12109
ba93b8ac
DJ		 12110 if (h->got.offset != (bfd_vma) -1
12111 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12112 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12113 {
12114 asection * sgot;
12115 asection * srel;
947216bf
AM		 12116 Elf_Internal_Rela rel;
12117 bfd_byte *loc;
00a97672 12118 bfd_vma offset;
252b5132
RH		 12119
12120 /* This symbol has an entry in the global offset table. Set it
12121 up. */
252b5132 12122 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12123 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12124 BFD_ASSERT (sgot != NULL && srel != NULL);
12125
00a97672
RS		 12126 offset = (h->got.offset & ~(bfd_vma) 1);
12127 rel.r_addend = 0;
252b5132
RH		 12128 rel.r_offset = (sgot->output_section->vma
12129 + sgot->output_offset
00a97672 12130 + offset);
252b5132 12131
5e681ec4
PB		 12132 /* If this is a static link, or it is a -Bsymbolic link and the
12133 symbol is defined locally or was forced to be local because
12134 of a version file, we just want to emit a RELATIVE reloc.
12135 The entry in the global offset table will already have been
12136 initialized in the relocate_section function. */
252b5132 12137 if (info->shared
5e681ec4
PB		 12138 && SYMBOL_REFERENCES_LOCAL (info, h))
12139 {
906e58ca 12140 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12141 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12142 if (!htab->use_rel)
12143 {
12144 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12145 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12146 }
5e681ec4 12147 }
252b5132
RH		 12148 else
12149 {
906e58ca 12150 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12151 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12152 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12153 }
12154
00a97672
RS		 12155 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12156 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12157 }
12158
f5385ebf 12159 if (h->needs_copy)
252b5132
RH		 12160 {
12161 asection * s;
947216bf
AM		 12162 Elf_Internal_Rela rel;
12163 bfd_byte *loc;
252b5132
RH		 12164
12165 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12166 BFD_ASSERT (h->dynindx != -1
12167 && (h->root.type == bfd_link_hash_defined
12168 || h->root.type == bfd_link_hash_defweak));
12169
12170 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12171 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12172 BFD_ASSERT (s != NULL);
12173
00a97672 12174 rel.r_addend = 0;
252b5132
RH		 12175 rel.r_offset = (h->root.u.def.value
12176 + h->root.u.def.section->output_section->vma
12177 + h->root.u.def.section->output_offset);
12178 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12179 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12180 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12181 }
12182
00a97672
RS		 12183 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12184 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12185 to the ".got" section. */
252b5132 12186 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12187 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12188 sym->st_shndx = SHN_ABS;
12189
b34976b6 12190 return TRUE;
252b5132
RH		 12191}
12192
12193/* Finish up the dynamic sections. */
12194
b34976b6 12195static bfd_boolean
57e8b36a 12196elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12197{
12198 bfd * dynobj;
12199 asection * sgot;
12200 asection * sdyn;
12201
12202 dynobj = elf_hash_table (info)->dynobj;
12203
12204 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12205 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12206 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12207
12208 if (elf_hash_table (info)->dynamic_sections_created)
12209 {
12210 asection *splt;
12211 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12212 struct elf32_arm_link_hash_table *htab;
252b5132 12213
229fcec5 12214 htab = elf32_arm_hash_table (info);
252b5132 12215 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12216 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12217
12218 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12219 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12220
252b5132
RH		 12221 for (; dyncon < dynconend; dyncon++)
12222 {
12223 Elf_Internal_Dyn dyn;
12224 const char * name;
12225 asection * s;
12226
12227 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12228
12229 switch (dyn.d_tag)
12230 {
229fcec5
MM		 12231 unsigned int type;
12232
252b5132 12233 default:
7a2b07ff
NS		 12234 if (htab->vxworks_p
12235 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12236 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12237 break;
12238
229fcec5
MM		 12239 case DT_HASH:
12240 name = ".hash";
12241 goto get_vma_if_bpabi;
12242 case DT_STRTAB:
12243 name = ".dynstr";
12244 goto get_vma_if_bpabi;
12245 case DT_SYMTAB:
12246 name = ".dynsym";
12247 goto get_vma_if_bpabi;
c0042f5d
MM		 12248 case DT_VERSYM:
12249 name = ".gnu.version";
12250 goto get_vma_if_bpabi;
12251 case DT_VERDEF:
12252 name = ".gnu.version_d";
12253 goto get_vma_if_bpabi;
12254 case DT_VERNEED:
12255 name = ".gnu.version_r";
12256 goto get_vma_if_bpabi;
12257
252b5132
RH		 12258 case DT_PLTGOT:
12259 name = ".got";
12260 goto get_vma;
12261 case DT_JMPREL:
00a97672 12262 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12263 get_vma:
12264 s = bfd_get_section_by_name (output_bfd, name);
12265 BFD_ASSERT (s != NULL);
229fcec5
MM		 12266 if (!htab->symbian_p)
12267 dyn.d_un.d_ptr = s->vma;
12268 else
12269 /* In the BPABI, tags in the PT_DYNAMIC section point
12270 at the file offset, not the memory address, for the
12271 convenience of the post linker. */
12272 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12273 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12274 break;
12275
229fcec5
MM		 12276 get_vma_if_bpabi:
12277 if (htab->symbian_p)
12278 goto get_vma;
12279 break;
12280
252b5132 12281 case DT_PLTRELSZ:
00a97672
RS		 12282 s = bfd_get_section_by_name (output_bfd,
12283 RELOC_SECTION (htab, ".plt"));
252b5132 12284 BFD_ASSERT (s != NULL);
eea6121a 12285 dyn.d_un.d_val = s->size;
252b5132
RH		 12286 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12287 break;
906e58ca 12288
252b5132 12289 case DT_RELSZ:
00a97672 12290 case DT_RELASZ:
229fcec5
MM		 12291 if (!htab->symbian_p)
12292 {
12293 /* My reading of the SVR4 ABI indicates that the
12294 procedure linkage table relocs (DT_JMPREL) should be
12295 included in the overall relocs (DT_REL). This is
12296 what Solaris does. However, UnixWare can not handle
12297 that case. Therefore, we override the DT_RELSZ entry
12298 here to make it not include the JMPREL relocs. Since
00a97672 12299 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12300 other relocation sections, we don't have to worry
12301 about changing the DT_REL entry. */
00a97672
RS		 12302 s = bfd_get_section_by_name (output_bfd,
12303 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12304 if (s != NULL)
12305 dyn.d_un.d_val -= s->size;
12306 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12307 break;
12308 }
8029a119 12309 /* Fall through. */
229fcec5
MM		 12310
12311 case DT_REL:
12312 case DT_RELA:
229fcec5
MM		 12313 /* In the BPABI, the DT_REL tag must point at the file
12314 offset, not the VMA, of the first relocation
12315 section. So, we use code similar to that in
12316 elflink.c, but do not check for SHF_ALLOC on the
12317 relcoation section, since relocations sections are
12318 never allocated under the BPABI. The comments above
12319 about Unixware notwithstanding, we include all of the
12320 relocations here. */
12321 if (htab->symbian_p)
12322 {
12323 unsigned int i;
12324 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12325 ? SHT_REL : SHT_RELA);
12326 dyn.d_un.d_val = 0;
12327 for (i = 1; i < elf_numsections (output_bfd); i++)
12328 {
906e58ca 12329 Elf_Internal_Shdr *hdr
229fcec5
MM		 12330 = elf_elfsections (output_bfd)[i];
12331 if (hdr->sh_type == type)
12332 {
906e58ca 12333 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12334 || dyn.d_tag == DT_RELASZ)
12335 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12336 else if ((ufile_ptr) hdr->sh_offset
12337 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12338 dyn.d_un.d_val = hdr->sh_offset;
12339 }
12340 }
12341 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12342 }
252b5132 12343 break;
88f7bcd5
NC		 12344
12345 /* Set the bottom bit of DT_INIT/FINI if the
12346 corresponding function is Thumb. */
12347 case DT_INIT:
12348 name = info->init_function;
12349 goto get_sym;
12350 case DT_FINI:
12351 name = info->fini_function;
12352 get_sym:
12353 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12354 then there is nothing to adjust. */
88f7bcd5
NC		 12355 if (dyn.d_un.d_val != 0)
12356 {
12357 struct elf_link_hash_entry * eh;
12358
12359 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12360 FALSE, FALSE, TRUE);
906e58ca 12361 if (eh != NULL
88f7bcd5
NC		 12362 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12363 {
12364 dyn.d_un.d_val |= 1;
b34976b6 12365 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12366 }
12367 }
12368 break;
252b5132
RH		 12369 }
12370 }
12371
24a1ba0f 12372 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12373 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12374 {
00a97672
RS		 12375 const bfd_vma *plt0_entry;
12376 bfd_vma got_address, plt_address, got_displacement;
12377
12378 /* Calculate the addresses of the GOT and PLT. */
12379 got_address = sgot->output_section->vma + sgot->output_offset;
12380 plt_address = splt->output_section->vma + splt->output_offset;
12381
12382 if (htab->vxworks_p)
12383 {
12384 /* The VxWorks GOT is relocated by the dynamic linker.
12385 Therefore, we must emit relocations rather than simply
12386 computing the values now. */
12387 Elf_Internal_Rela rel;
12388
12389 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12390 put_arm_insn (htab, output_bfd, plt0_entry[0],
12391 splt->contents + 0);
12392 put_arm_insn (htab, output_bfd, plt0_entry[1],
12393 splt->contents + 4);
12394 put_arm_insn (htab, output_bfd, plt0_entry[2],
12395 splt->contents + 8);
00a97672
RS		 12396 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12397
8029a119 12398 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12399 rel.r_offset = plt_address + 12;
12400 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12401 rel.r_addend = 0;
12402 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12403 htab->srelplt2->contents);
12404 }
12405 else
12406 {
12407 got_displacement = got_address - (plt_address + 16);
12408
12409 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12410 put_arm_insn (htab, output_bfd, plt0_entry[0],
12411 splt->contents + 0);
12412 put_arm_insn (htab, output_bfd, plt0_entry[1],
12413 splt->contents + 4);
12414 put_arm_insn (htab, output_bfd, plt0_entry[2],
12415 splt->contents + 8);
12416 put_arm_insn (htab, output_bfd, plt0_entry[3],
12417 splt->contents + 12);
5e681ec4 12418
5e681ec4 12419#ifdef FOUR_WORD_PLT
00a97672
RS		 12420 /* The displacement value goes in the otherwise-unused
12421 last word of the second entry. */
12422 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12423#else
00a97672 12424 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12425#endif
00a97672 12426 }
f7a74f8c 12427 }
252b5132
RH		 12428
12429 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12430 really seem like the right value. */
74541ad4
AM		 12431 if (splt->output_section->owner == output_bfd)
12432 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12433
12434 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12435 {
12436 /* Correct the .rel(a).plt.unloaded relocations. They will have
12437 incorrect symbol indexes. */
12438 int num_plts;
eed62c48 12439 unsigned char *p;
00a97672
RS		 12440
12441 num_plts = ((htab->splt->size - htab->plt_header_size)
12442 / htab->plt_entry_size);
12443 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12444
12445 for (; num_plts; num_plts--)
12446 {
12447 Elf_Internal_Rela rel;
12448
12449 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12450 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12451 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12452 p += RELOC_SIZE (htab);
12453
12454 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12455 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12456 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12457 p += RELOC_SIZE (htab);
12458 }
12459 }
252b5132
RH		 12460 }
12461
12462 /* Fill in the first three entries in the global offset table. */
229fcec5 12463 if (sgot)
252b5132 12464 {
229fcec5
MM		 12465 if (sgot->size > 0)
12466 {
12467 if (sdyn == NULL)
12468 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12469 else
12470 bfd_put_32 (output_bfd,
12471 sdyn->output_section->vma + sdyn->output_offset,
12472 sgot->contents);
12473 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12474 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12475 }
252b5132 12476
229fcec5
MM		 12477 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12478 }
252b5132 12479
b34976b6 12480 return TRUE;
252b5132
RH		 12481}
12482
ba96a88f 12483static void
57e8b36a 12484elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12485{
9b485d32 12486 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12487 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12488
12489 i_ehdrp = elf_elfheader (abfd);
12490
94a3258f
PB		 12491 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12492 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12493 else
12494 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12495 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12496
93204d3a
PB		 12497 if (link_info)
12498 {
12499 globals = elf32_arm_hash_table (link_info);
12500 if (globals->byteswap_code)
12501 i_ehdrp->e_flags |= EF_ARM_BE8;
12502 }
ba96a88f
NC		 12503}
12504
99e4ae17 12505static enum elf_reloc_type_class
57e8b36a 12506elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12507{
f51e552e 12508 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12509 {
12510 case R_ARM_RELATIVE:
12511 return reloc_class_relative;
12512 case R_ARM_JUMP_SLOT:
12513 return reloc_class_plt;
12514 case R_ARM_COPY:
12515 return reloc_class_copy;
12516 default:
12517 return reloc_class_normal;
12518 }
12519}
12520
e16bb312
NC		 12521/* Set the right machine number for an Arm ELF file. */
12522
12523static bfd_boolean
57e8b36a 12524elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12525{
12526 if (hdr->sh_type == SHT_NOTE)
12527 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12528
12529 return TRUE;
12530}
12531
e489d0ae 12532static void
57e8b36a 12533elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12534{
5a6c6817 12535 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12536}
12537
40a18ebd
NC		 12538/* Return TRUE if this is an unwinding table entry. */
12539
12540static bfd_boolean
12541is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12542{
0112cd26
NC		 12543 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12544 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12545}
12546
12547
12548/* Set the type and flags for an ARM section. We do this by
12549 the section name, which is a hack, but ought to work. */
12550
12551static bfd_boolean
12552elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12553{
12554 const char * name;
12555
12556 name = bfd_get_section_name (abfd, sec);
12557
12558 if (is_arm_elf_unwind_section_name (abfd, name))
12559 {
12560 hdr->sh_type = SHT_ARM_EXIDX;
12561 hdr->sh_flags |= SHF_LINK_ORDER;
12562 }
12563 return TRUE;
12564}
12565
6dc132d9
L		 12566/* Handle an ARM specific section when reading an object file. This is
12567 called when bfd_section_from_shdr finds a section with an unknown
12568 type. */
40a18ebd
NC		 12569
12570static bfd_boolean
12571elf32_arm_section_from_shdr (bfd *abfd,
12572 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12573 const char *name,
12574 int shindex)
40a18ebd
NC		 12575{
12576 /* There ought to be a place to keep ELF backend specific flags, but
12577 at the moment there isn't one. We just keep track of the
12578 sections by their name, instead. Fortunately, the ABI gives
12579 names for all the ARM specific sections, so we will probably get
12580 away with this. */
12581 switch (hdr->sh_type)
12582 {
12583 case SHT_ARM_EXIDX:
0951f019
RE		 12584 case SHT_ARM_PREEMPTMAP:
12585 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12586 break;
12587
12588 default:
12589 return FALSE;
12590 }
12591
6dc132d9 12592 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12593 return FALSE;
12594
12595 return TRUE;
12596}
e489d0ae 12597
8e3de13a
NC		 12598/* A structure used to record a list of sections, independently
12599 of the next and prev fields in the asection structure. */
12600typedef struct section_list
12601{
12602 asection * sec;
12603 struct section_list * next;
12604 struct section_list * prev;
12605}
12606section_list;
12607
12608/* Unfortunately we need to keep a list of sections for which
12609 an _arm_elf_section_data structure has been allocated. This
12610 is because it is possible for functions like elf32_arm_write_section
12611 to be called on a section which has had an elf_data_structure
12612 allocated for it (and so the used_by_bfd field is valid) but
12613 for which the ARM extended version of this structure - the
12614 _arm_elf_section_data structure - has not been allocated. */
12615static section_list * sections_with_arm_elf_section_data = NULL;
12616
12617static void
957c6e41 12618record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12619{
12620 struct section_list * entry;
12621
21d799b5 12622 entry = (struct section_list *) bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12623 if (entry == NULL)
12624 return;
12625 entry->sec = sec;
12626 entry->next = sections_with_arm_elf_section_data;
12627 entry->prev = NULL;
12628 if (entry->next != NULL)
12629 entry->next->prev = entry;
12630 sections_with_arm_elf_section_data = entry;
12631}
12632
44444f50
NC		 12633static struct section_list *
12634find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12635{
12636 struct section_list * entry;
bd4aae00 12637 static struct section_list * last_entry = NULL;
8e3de13a 12638
bd4aae00
NC		 12639 /* This is a short cut for the typical case where the sections are added
12640 to the sections_with_arm_elf_section_data list in forward order and
12641 then looked up here in backwards order. This makes a real difference
12642 to the ld-srec/sec64k.exp linker test. */
44444f50 12643 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12644 if (last_entry != NULL)
12645 {
12646 if (last_entry->sec == sec)
44444f50
NC		 12647 entry = last_entry;
12648 else if (last_entry->next != NULL
12649 && last_entry->next->sec == sec)
12650 entry = last_entry->next;
bd4aae00 12651 }
44444f50
NC		 12652
12653 for (; entry; entry = entry->next)
8e3de13a 12654 if (entry->sec == sec)
44444f50 12655 break;
bd4aae00 12656
44444f50
NC		 12657 if (entry)
12658 /* Record the entry prior to this one - it is the entry we are most
12659 likely to want to locate next time. Also this way if we have been
12660 called from unrecord_section_with_arm_elf_section_data() we will not
12661 be caching a pointer that is about to be freed. */
12662 last_entry = entry->prev;
12663
12664 return entry;
12665}
12666
12667static _arm_elf_section_data *
12668get_arm_elf_section_data (asection * sec)
12669{
12670 struct section_list * entry;
12671
12672 entry = find_arm_elf_section_entry (sec);
12673
12674 if (entry)
12675 return elf32_arm_section_data (entry->sec);
12676 else
12677 return NULL;
8e3de13a
NC		 12678}
12679
12680static void
12681unrecord_section_with_arm_elf_section_data (asection * sec)
12682{
12683 struct section_list * entry;
12684
44444f50
NC		 12685 entry = find_arm_elf_section_entry (sec);
12686
12687 if (entry)
12688 {
12689 if (entry->prev != NULL)
12690 entry->prev->next = entry->next;
12691 if (entry->next != NULL)
12692 entry->next->prev = entry->prev;
12693 if (entry == sections_with_arm_elf_section_data)
12694 sections_with_arm_elf_section_data = entry->next;
12695 free (entry);
12696 }
8e3de13a
NC		 12697}
12698
e489d0ae 12699
4e617b1e
PB		 12700typedef struct
12701{
12702 void *finfo;
12703 struct bfd_link_info *info;
91a5743d
PB		 12704 asection *sec;
12705 int sec_shndx;
6e0b88f1
AM		 12706 int (*func) (void *, const char *, Elf_Internal_Sym *,
12707 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12708} output_arch_syminfo;
12709
12710enum map_symbol_type
12711{
12712 ARM_MAP_ARM,
12713 ARM_MAP_THUMB,
12714 ARM_MAP_DATA
12715};
12716
12717
7413f23f 12718/* Output a single mapping symbol. */
4e617b1e
PB		 12719
12720static bfd_boolean
7413f23f
DJ		 12721elf32_arm_output_map_sym (output_arch_syminfo *osi,
12722 enum map_symbol_type type,
12723 bfd_vma offset)
4e617b1e
PB		 12724{
12725 static const char *names[3] = {"$a", "$t", "$d"};
12726 struct elf32_arm_link_hash_table *htab;
12727 Elf_Internal_Sym sym;
12728
12729 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12730 sym.st_value = osi->sec->output_section->vma
12731 + osi->sec->output_offset
12732 + offset;
4e617b1e
PB		 12733 sym.st_size = 0;
12734 sym.st_other = 0;
12735 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12736 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12737 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12738}
12739
12740
12741/* Output mapping symbols for PLT entries associated with H. */
12742
12743static bfd_boolean
12744elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12745{
12746 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12747 struct elf32_arm_link_hash_table *htab;
12748 struct elf32_arm_link_hash_entry *eh;
12749 bfd_vma addr;
12750
12751 htab = elf32_arm_hash_table (osi->info);
12752
12753 if (h->root.type == bfd_link_hash_indirect)
12754 return TRUE;
12755
12756 if (h->root.type == bfd_link_hash_warning)
12757 /* When warning symbols are created, they **replace** the "real"
12758 entry in the hash table, thus we never get to see the real
12759 symbol in a hash traversal. So look at it now. */
12760 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12761
12762 if (h->plt.offset == (bfd_vma) -1)
12763 return TRUE;
12764
12765 eh = (struct elf32_arm_link_hash_entry *) h;
12766 addr = h->plt.offset;
12767 if (htab->symbian_p)
12768 {
7413f23f 12769 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12770 return FALSE;
7413f23f 12771 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12772 return FALSE;
12773 }
12774 else if (htab->vxworks_p)
12775 {
7413f23f 12776 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12777 return FALSE;
7413f23f 12778 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12779 return FALSE;
7413f23f 12780 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12781 return FALSE;
7413f23f 12782 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12783 return FALSE;
12784 }
12785 else
12786 {
bd97cb95
DJ		 12787 bfd_signed_vma thumb_refs;
12788
12789 thumb_refs = eh->plt_thumb_refcount;
12790 if (!htab->use_blx)
12791 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12792
bd97cb95 12793 if (thumb_refs > 0)
4e617b1e 12794 {
7413f23f 12795 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12796 return FALSE;
12797 }
12798#ifdef FOUR_WORD_PLT
7413f23f 12799 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12800 return FALSE;
7413f23f 12801 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12802 return FALSE;
12803#else
906e58ca 12804 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12805 so only need to output a mapping symbol for the first PLT entry and
12806 entries with thumb thunks. */
bd97cb95 12807 if (thumb_refs > 0 || addr == 20)
4e617b1e 12808 {
7413f23f 12809 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12810 return FALSE;
12811 }
12812#endif
12813 }
12814
12815 return TRUE;
12816}
12817
7413f23f
DJ		 12818/* Output a single local symbol for a generated stub. */
12819
12820static bfd_boolean
12821elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12822 bfd_vma offset, bfd_vma size)
12823{
12824 struct elf32_arm_link_hash_table *htab;
12825 Elf_Internal_Sym sym;
12826
12827 htab = elf32_arm_hash_table (osi->info);
12828 sym.st_value = osi->sec->output_section->vma
12829 + osi->sec->output_offset
12830 + offset;
12831 sym.st_size = size;
12832 sym.st_other = 0;
12833 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12834 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12835 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12836}
4e617b1e 12837
da5938a2 12838static bfd_boolean
8029a119
NC		 12839arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12840 void * in_arg)
da5938a2
NC		 12841{
12842 struct elf32_arm_stub_hash_entry *stub_entry;
12843 struct bfd_link_info *info;
12844 struct elf32_arm_link_hash_table *htab;
12845 asection *stub_sec;
12846 bfd_vma addr;
7413f23f 12847 char *stub_name;
9a008db3 12848 output_arch_syminfo *osi;
d3ce72d0 12849 const insn_sequence *template_sequence;
461a49ca
DJ		 12850 enum stub_insn_type prev_type;
12851 int size;
12852 int i;
12853 enum map_symbol_type sym_type;
da5938a2
NC		 12854
12855 /* Massage our args to the form they really have. */
12856 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12857 osi = (output_arch_syminfo *) in_arg;
da5938a2 12858
da5938a2
NC		 12859 info = osi->info;
12860
12861 htab = elf32_arm_hash_table (info);
12862 stub_sec = stub_entry->stub_sec;
12863
12864 /* Ensure this stub is attached to the current section being
7413f23f 12865 processed. */
da5938a2
NC		 12866 if (stub_sec != osi->sec)
12867 return TRUE;
12868
7413f23f
DJ		 12869 addr = (bfd_vma) stub_entry->stub_offset;
12870 stub_name = stub_entry->output_name;
da5938a2 12871
d3ce72d0
NC		 12872 template_sequence = stub_entry->stub_template;
12873 switch (template_sequence[0].type)
7413f23f 12874 {
461a49ca
DJ		 12875 case ARM_TYPE:
12876 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12877 return FALSE;
12878 break;
461a49ca 12879 case THUMB16_TYPE:
48229727 12880 case THUMB32_TYPE:
461a49ca
DJ		 12881 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12882 stub_entry->stub_size))
da5938a2
NC		 12883 return FALSE;
12884 break;
12885 default:
12886 BFD_FAIL ();
48229727 12887 return 0;
7413f23f 12888 }
da5938a2 12889
461a49ca
DJ		 12890 prev_type = DATA_TYPE;
12891 size = 0;
12892 for (i = 0; i < stub_entry->stub_template_size; i++)
12893 {
d3ce72d0 12894 switch (template_sequence[i].type)
461a49ca
DJ		 12895 {
12896 case ARM_TYPE:
12897 sym_type = ARM_MAP_ARM;
12898 break;
12899
12900 case THUMB16_TYPE:
48229727 12901 case THUMB32_TYPE:
461a49ca
DJ		 12902 sym_type = ARM_MAP_THUMB;
12903 break;
12904
12905 case DATA_TYPE:
12906 sym_type = ARM_MAP_DATA;
12907 break;
12908
12909 default:
12910 BFD_FAIL ();
4e31c731 12911 return FALSE;
461a49ca
DJ		 12912 }
12913
d3ce72d0 12914 if (template_sequence[i].type != prev_type)
461a49ca 12915 {
d3ce72d0 12916 prev_type = template_sequence[i].type;
461a49ca
DJ		 12917 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12918 return FALSE;
12919 }
12920
d3ce72d0 12921 switch (template_sequence[i].type)
461a49ca
DJ		 12922 {
12923 case ARM_TYPE:
48229727 12924 case THUMB32_TYPE:
461a49ca
DJ		 12925 size += 4;
12926 break;
12927
12928 case THUMB16_TYPE:
12929 size += 2;
12930 break;
12931
12932 case DATA_TYPE:
12933 size += 4;
12934 break;
12935
12936 default:
12937 BFD_FAIL ();
4e31c731 12938 return FALSE;
461a49ca
DJ		 12939 }
12940 }
12941
da5938a2
NC		 12942 return TRUE;
12943}
12944
91a5743d 12945/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 12946
12947static bfd_boolean
12948elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12949 struct bfd_link_info *info,
12950 void *finfo,
6e0b88f1
AM		 12951 int (*func) (void *, const char *,
12952 Elf_Internal_Sym *,
12953 asection *,
12954 struct elf_link_hash_entry *))
4e617b1e
PB		 12955{
12956 output_arch_syminfo osi;
12957 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12958 bfd_vma offset;
12959 bfd_size_type size;
4e617b1e
PB		 12960
12961 htab = elf32_arm_hash_table (info);
906e58ca 12962 check_use_blx (htab);
91a5743d 12963
4e617b1e
PB		 12964 osi.finfo = finfo;
12965 osi.info = info;
12966 osi.func = func;
906e58ca 12967
91a5743d
PB		 12968 /* ARM->Thumb glue. */
12969 if (htab->arm_glue_size > 0)
12970 {
12971 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12972 ARM2THUMB_GLUE_SECTION_NAME);
12973
12974 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12975 (output_bfd, osi.sec->output_section);
12976 if (info->shared || htab->root.is_relocatable_executable
12977 || htab->pic_veneer)
12978 size = ARM2THUMB_PIC_GLUE_SIZE;
12979 else if (htab->use_blx)
12980 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
12981 else
12982 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 12983
91a5743d
PB		 12984 for (offset = 0; offset < htab->arm_glue_size; offset += size)
12985 {
7413f23f
DJ		 12986 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
12987 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 12988 }
12989 }
12990
12991 /* Thumb->ARM glue. */
12992 if (htab->thumb_glue_size > 0)
12993 {
12994 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12995 THUMB2ARM_GLUE_SECTION_NAME);
12996
12997 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12998 (output_bfd, osi.sec->output_section);
12999 size = THUMB2ARM_GLUE_SIZE;
13000
13001 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13002 {
7413f23f
DJ		 13003 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13004 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13005 }
13006 }
13007
845b51d6
PB		 13008 /* ARMv4 BX veneers. */
13009 if (htab->bx_glue_size > 0)
13010 {
13011 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13012 ARM_BX_GLUE_SECTION_NAME);
13013
13014 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13015 (output_bfd, osi.sec->output_section);
13016
7413f23f 13017 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13018 }
13019
8029a119
NC		 13020 /* Long calls stubs. */
13021 if (htab->stub_bfd && htab->stub_bfd->sections)
13022 {
da5938a2 13023 asection* stub_sec;
8029a119 13024
da5938a2
NC		 13025 for (stub_sec = htab->stub_bfd->sections;
13026 stub_sec != NULL;
8029a119
NC		 13027 stub_sec = stub_sec->next)
13028 {
13029 /* Ignore non-stub sections. */
13030 if (!strstr (stub_sec->name, STUB_SUFFIX))
13031 continue;
da5938a2 13032
8029a119 13033 osi.sec = stub_sec;
da5938a2 13034
8029a119
NC		 13035 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13036 (output_bfd, osi.sec->output_section);
da5938a2 13037
8029a119
NC		 13038 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13039 }
13040 }
da5938a2 13041
91a5743d
PB		 13042 /* Finally, output mapping symbols for the PLT. */
13043 if (!htab->splt || htab->splt->size == 0)
13044 return TRUE;
13045
13046 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13047 htab->splt->output_section);
91a5743d 13048 osi.sec = htab->splt;
4e617b1e
PB		 13049 /* Output mapping symbols for the plt header. SymbianOS does not have a
13050 plt header. */
13051 if (htab->vxworks_p)
13052 {
13053 /* VxWorks shared libraries have no PLT header. */
13054 if (!info->shared)
13055 {
7413f23f 13056 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13057 return FALSE;
7413f23f 13058 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13059 return FALSE;
13060 }
13061 }
13062 else if (!htab->symbian_p)
13063 {
7413f23f 13064 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13065 return FALSE;
13066#ifndef FOUR_WORD_PLT
7413f23f 13067 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13068 return FALSE;
13069#endif
13070 }
13071
13072 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13073 return TRUE;
13074}
13075
e489d0ae
PB		 13076/* Allocate target specific section data. */
13077
13078static bfd_boolean
13079elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13080{
f592407e
AM		 13081 if (!sec->used_by_bfd)
13082 {
13083 _arm_elf_section_data *sdata;
13084 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13085
21d799b5 13086 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13087 if (sdata == NULL)
13088 return FALSE;
13089 sec->used_by_bfd = sdata;
13090 }
e489d0ae 13091
957c6e41 13092 record_section_with_arm_elf_section_data (sec);
8e3de13a 13093
e489d0ae
PB		 13094 return _bfd_elf_new_section_hook (abfd, sec);
13095}
13096
13097
13098/* Used to order a list of mapping symbols by address. */
13099
13100static int
13101elf32_arm_compare_mapping (const void * a, const void * b)
13102{
7f6a71ff
JM		 13103 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13104 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13105
13106 if (amap->vma > bmap->vma)
13107 return 1;
13108 else if (amap->vma < bmap->vma)
13109 return -1;
13110 else if (amap->type > bmap->type)
13111 /* Ensure results do not depend on the host qsort for objects with
13112 multiple mapping symbols at the same address by sorting on type
13113 after vma. */
13114 return 1;
13115 else if (amap->type < bmap->type)
13116 return -1;
13117 else
13118 return 0;
e489d0ae
PB		 13119}
13120
2468f9c9
PB		 13121/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13122
13123static unsigned long
13124offset_prel31 (unsigned long addr, bfd_vma offset)
13125{
13126 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13127}
13128
13129/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13130 relocations. */
13131
13132static void
13133copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13134{
13135 unsigned long first_word = bfd_get_32 (output_bfd, from);
13136 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13137
13138 /* High bit of first word is supposed to be zero. */
13139 if ((first_word & 0x80000000ul) == 0)
13140 first_word = offset_prel31 (first_word, offset);
13141
13142 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13143 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13144 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13145 second_word = offset_prel31 (second_word, offset);
13146
13147 bfd_put_32 (output_bfd, first_word, to);
13148 bfd_put_32 (output_bfd, second_word, to + 4);
13149}
e489d0ae 13150
48229727
JB		 13151/* Data for make_branch_to_a8_stub(). */
13152
13153struct a8_branch_to_stub_data {
13154 asection *writing_section;
13155 bfd_byte *contents;
13156};
13157
13158
13159/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13160 places for a particular section. */
13161
13162static bfd_boolean
13163make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13164 void *in_arg)
13165{
13166 struct elf32_arm_stub_hash_entry *stub_entry;
13167 struct a8_branch_to_stub_data *data;
13168 bfd_byte *contents;
13169 unsigned long branch_insn;
13170 bfd_vma veneered_insn_loc, veneer_entry_loc;
13171 bfd_signed_vma branch_offset;
13172 bfd *abfd;
91d6fa6a 13173 unsigned int target;
48229727
JB		 13174
13175 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13176 data = (struct a8_branch_to_stub_data *) in_arg;
13177
13178 if (stub_entry->target_section != data->writing_section
13179 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13180 return TRUE;
13181
13182 contents = data->contents;
13183
13184 veneered_insn_loc = stub_entry->target_section->output_section->vma
13185 + stub_entry->target_section->output_offset
13186 + stub_entry->target_value;
13187
13188 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13189 + stub_entry->stub_sec->output_offset
13190 + stub_entry->stub_offset;
13191
13192 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13193 veneered_insn_loc &= ~3u;
13194
13195 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13196
13197 abfd = stub_entry->target_section->owner;
91d6fa6a 13198 target = stub_entry->target_value;
48229727
JB		 13199
13200 /* We attempt to avoid this condition by setting stubs_always_after_branch
13201 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13202 This check is just to be on the safe side... */
13203 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13204 {
13205 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13206 "allocated in unsafe location"), abfd);
13207 return FALSE;
13208 }
13209
13210 switch (stub_entry->stub_type)
13211 {
13212 case arm_stub_a8_veneer_b:
13213 case arm_stub_a8_veneer_b_cond:
13214 branch_insn = 0xf0009000;
13215 goto jump24;
13216
13217 case arm_stub_a8_veneer_blx:
13218 branch_insn = 0xf000e800;
13219 goto jump24;
13220
13221 case arm_stub_a8_veneer_bl:
13222 {
13223 unsigned int i1, j1, i2, j2, s;
13224
13225 branch_insn = 0xf000d000;
13226
13227 jump24:
13228 if (branch_offset < -16777216 || branch_offset > 16777214)
13229 {
13230 /* There's not much we can do apart from complain if this
13231 happens. */
13232 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13233 "of range (input file too large)"), abfd);
13234 return FALSE;
13235 }
13236
13237 /* i1 = not(j1 eor s), so:
13238 not i1 = j1 eor s
13239 j1 = (not i1) eor s. */
13240
13241 branch_insn |= (branch_offset >> 1) & 0x7ff;
13242 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13243 i2 = (branch_offset >> 22) & 1;
13244 i1 = (branch_offset >> 23) & 1;
13245 s = (branch_offset >> 24) & 1;
13246 j1 = (!i1) ^ s;
13247 j2 = (!i2) ^ s;
13248 branch_insn |= j2 << 11;
13249 branch_insn |= j1 << 13;
13250 branch_insn |= s << 26;
13251 }
13252 break;
13253
13254 default:
13255 BFD_FAIL ();
13256 return FALSE;
13257 }
13258
91d6fa6a
NC		 13259 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13260 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13261
13262 return TRUE;
13263}
13264
e489d0ae
PB		 13265/* Do code byteswapping. Return FALSE afterwards so that the section is
13266 written out as normal. */
13267
13268static bfd_boolean
c7b8f16e 13269elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13270 struct bfd_link_info *link_info,
13271 asection *sec,
e489d0ae
PB		 13272 bfd_byte *contents)
13273{
48229727 13274 unsigned int mapcount, errcount;
8e3de13a 13275 _arm_elf_section_data *arm_data;
c7b8f16e 13276 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13277 elf32_arm_section_map *map;
c7b8f16e 13278 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13279 bfd_vma ptr;
13280 bfd_vma end;
c7b8f16e 13281 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13282 bfd_byte tmp;
48229727 13283 unsigned int i;
57e8b36a 13284
8e3de13a
NC		 13285 /* If this section has not been allocated an _arm_elf_section_data
13286 structure then we cannot record anything. */
13287 arm_data = get_arm_elf_section_data (sec);
13288 if (arm_data == NULL)
13289 return FALSE;
13290
13291 mapcount = arm_data->mapcount;
13292 map = arm_data->map;
c7b8f16e
JB		 13293 errcount = arm_data->erratumcount;
13294
13295 if (errcount != 0)
13296 {
13297 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13298
13299 for (errnode = arm_data->erratumlist; errnode != 0;
13300 errnode = errnode->next)
13301 {
91d6fa6a 13302 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13303
13304 switch (errnode->type)
13305 {
13306 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13307 {
13308 bfd_vma branch_to_veneer;
13309 /* Original condition code of instruction, plus bit mask for
13310 ARM B instruction. */
13311 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13312 | 0x0a000000;
13313
13314 /* The instruction is before the label. */
91d6fa6a 13315 target -= 4;
c7b8f16e
JB		 13316
13317 /* Above offset included in -4 below. */
13318 branch_to_veneer = errnode->u.b.veneer->vma
13319 - errnode->vma - 4;
13320
13321 if ((signed) branch_to_veneer < -(1 << 25)
13322 || (signed) branch_to_veneer >= (1 << 25))
13323 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13324 "range"), output_bfd);
13325
13326 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13327 contents[endianflip ^ target] = insn & 0xff;
13328 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13329 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13330 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13331 }
13332 break;
13333
13334 case VFP11_ERRATUM_ARM_VENEER:
13335 {
13336 bfd_vma branch_from_veneer;
13337 unsigned int insn;
13338
13339 /* Take size of veneer into account. */
13340 branch_from_veneer = errnode->u.v.branch->vma
13341 - errnode->vma - 12;
13342
13343 if ((signed) branch_from_veneer < -(1 << 25)
13344 || (signed) branch_from_veneer >= (1 << 25))
13345 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13346 "range"), output_bfd);
13347
13348 /* Original instruction. */
13349 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13350 contents[endianflip ^ target] = insn & 0xff;
13351 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13352 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13353 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13354
13355 /* Branch back to insn after original insn. */
13356 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13357 contents[endianflip ^ (target + 4)] = insn & 0xff;
13358 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13359 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13360 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13361 }
13362 break;
13363
13364 default:
13365 abort ();
13366 }
13367 }
13368 }
e489d0ae 13369
2468f9c9
PB		 13370 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13371 {
13372 arm_unwind_table_edit *edit_node
13373 = arm_data->u.exidx.unwind_edit_list;
13374 /* Now, sec->size is the size of the section we will write. The original
13375 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13376 markers) was sec->rawsize. (This isn't the case if we perform no
13377 edits, then rawsize will be zero and we should use size). */
21d799b5 13378 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13379 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13380 unsigned int in_index, out_index;
13381 bfd_vma add_to_offsets = 0;
13382
13383 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13384 {
13385 if (edit_node)
13386 {
13387 unsigned int edit_index = edit_node->index;
13388
13389 if (in_index < edit_index && in_index * 8 < input_size)
13390 {
13391 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13392 contents + in_index * 8, add_to_offsets);
13393 out_index++;
13394 in_index++;
13395 }
13396 else if (in_index == edit_index
13397 || (in_index * 8 >= input_size
13398 && edit_index == UINT_MAX))
13399 {
13400 switch (edit_node->type)
13401 {
13402 case DELETE_EXIDX_ENTRY:
13403 in_index++;
13404 add_to_offsets += 8;
13405 break;
13406
13407 case INSERT_EXIDX_CANTUNWIND_AT_END:
13408 {
13409 asection *text_sec = edit_node->linked_section;
13410 bfd_vma text_offset = text_sec->output_section->vma
13411 + text_sec->output_offset
13412 + text_sec->size;
13413 bfd_vma exidx_offset = offset + out_index * 8;
13414 unsigned long prel31_offset;
13415
13416 /* Note: this is meant to be equivalent to an
13417 R_ARM_PREL31 relocation. These synthetic
13418 EXIDX_CANTUNWIND markers are not relocated by the
13419 usual BFD method. */
13420 prel31_offset = (text_offset - exidx_offset)
13421 & 0x7ffffffful;
13422
13423 /* First address we can't unwind. */
13424 bfd_put_32 (output_bfd, prel31_offset,
13425 &edited_contents[out_index * 8]);
13426
13427 /* Code for EXIDX_CANTUNWIND. */
13428 bfd_put_32 (output_bfd, 0x1,
13429 &edited_contents[out_index * 8 + 4]);
13430
13431 out_index++;
13432 add_to_offsets -= 8;
13433 }
13434 break;
13435 }
13436
13437 edit_node = edit_node->next;
13438 }
13439 }
13440 else
13441 {
13442 /* No more edits, copy remaining entries verbatim. */
13443 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13444 contents + in_index * 8, add_to_offsets);
13445 out_index++;
13446 in_index++;
13447 }
13448 }
13449
13450 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13451 bfd_set_section_contents (output_bfd, sec->output_section,
13452 edited_contents,
13453 (file_ptr) sec->output_offset, sec->size);
13454
13455 return TRUE;
13456 }
13457
48229727
JB		 13458 /* Fix code to point to Cortex-A8 erratum stubs. */
13459 if (globals->fix_cortex_a8)
13460 {
13461 struct a8_branch_to_stub_data data;
13462
13463 data.writing_section = sec;
13464 data.contents = contents;
13465
13466 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13467 &data);
13468 }
13469
e489d0ae
PB		 13470 if (mapcount == 0)
13471 return FALSE;
13472
c7b8f16e 13473 if (globals->byteswap_code)
e489d0ae 13474 {
c7b8f16e 13475 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13476
c7b8f16e
JB		 13477 ptr = map[0].vma;
13478 for (i = 0; i < mapcount; i++)
13479 {
13480 if (i == mapcount - 1)
13481 end = sec->size;
13482 else
13483 end = map[i + 1].vma;
e489d0ae 13484
c7b8f16e 13485 switch (map[i].type)
e489d0ae 13486 {
c7b8f16e
JB		 13487 case 'a':
13488 /* Byte swap code words. */
13489 while (ptr + 3 < end)
13490 {
13491 tmp = contents[ptr];
13492 contents[ptr] = contents[ptr + 3];
13493 contents[ptr + 3] = tmp;
13494 tmp = contents[ptr + 1];
13495 contents[ptr + 1] = contents[ptr + 2];
13496 contents[ptr + 2] = tmp;
13497 ptr += 4;
13498 }
13499 break;
e489d0ae 13500
c7b8f16e
JB		 13501 case 't':
13502 /* Byte swap code halfwords. */
13503 while (ptr + 1 < end)
13504 {
13505 tmp = contents[ptr];
13506 contents[ptr] = contents[ptr + 1];
13507 contents[ptr + 1] = tmp;
13508 ptr += 2;
13509 }
13510 break;
13511
13512 case 'd':
13513 /* Leave data alone. */
13514 break;
13515 }
13516 ptr = end;
13517 }
e489d0ae 13518 }
8e3de13a 13519
93204d3a 13520 free (map);
8e3de13a 13521 arm_data->mapcount = 0;
c7b8f16e 13522 arm_data->mapsize = 0;
8e3de13a
NC		 13523 arm_data->map = NULL;
13524 unrecord_section_with_arm_elf_section_data (sec);
13525
e489d0ae
PB		 13526 return FALSE;
13527}
13528
957c6e41
NC		 13529static void
13530unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13531 asection * sec,
13532 void * ignore ATTRIBUTE_UNUSED)
13533{
13534 unrecord_section_with_arm_elf_section_data (sec);
13535}
13536
13537static bfd_boolean
13538elf32_arm_close_and_cleanup (bfd * abfd)
13539{
b25e3d87
L		 13540 if (abfd->sections)
13541 bfd_map_over_sections (abfd,
13542 unrecord_section_via_map_over_sections,
13543 NULL);
957c6e41
NC		 13544
13545 return _bfd_elf_close_and_cleanup (abfd);
13546}
13547
b25e3d87
L		 13548static bfd_boolean
13549elf32_arm_bfd_free_cached_info (bfd * abfd)
13550{
13551 if (abfd->sections)
13552 bfd_map_over_sections (abfd,
13553 unrecord_section_via_map_over_sections,
13554 NULL);
13555
13556 return _bfd_free_cached_info (abfd);
13557}
13558
b7693d02
DJ		 13559/* Display STT_ARM_TFUNC symbols as functions. */
13560
13561static void
13562elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13563 asymbol *asym)
13564{
13565 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13566
13567 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13568 elfsym->symbol.flags |= BSF_FUNCTION;
13569}
13570
0beaef2b
PB		 13571
13572/* Mangle thumb function symbols as we read them in. */
13573
8384fb8f 13574static bfd_boolean
0beaef2b
PB		 13575elf32_arm_swap_symbol_in (bfd * abfd,
13576 const void *psrc,
13577 const void *pshn,
13578 Elf_Internal_Sym *dst)
13579{
8384fb8f
AM		 13580 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13581 return FALSE;
0beaef2b
PB		 13582
13583 /* New EABI objects mark thumb function symbols by setting the low bit of
13584 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13585 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13586 && (dst->st_value & 1))
13587 {
13588 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13589 dst->st_value &= ~(bfd_vma) 1;
13590 }
8384fb8f 13591 return TRUE;
0beaef2b
PB		 13592}
13593
13594
13595/* Mangle thumb function symbols as we write them out. */
13596
13597static void
13598elf32_arm_swap_symbol_out (bfd *abfd,
13599 const Elf_Internal_Sym *src,
13600 void *cdst,
13601 void *shndx)
13602{
13603 Elf_Internal_Sym newsym;
13604
13605 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13606 of the address set, as per the new EABI. We do this unconditionally
13607 because objcopy does not set the elf header flags until after
13608 it writes out the symbol table. */
13609 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13610 {
13611 newsym = *src;
13612 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13613 if (newsym.st_shndx != SHN_UNDEF)
13614 {
13615 /* Do this only for defined symbols. At link type, the static
13616 linker will simulate the work of dynamic linker of resolving
13617 symbols and will carry over the thumbness of found symbols to
13618 the output symbol table. It's not clear how it happens, but
b0fead2b 13619 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13620 runtime, and writing '1' for them will be confusing for users
13621 and possibly for dynamic linker itself.
13622 */
13623 newsym.st_value |= 1;
13624 }
906e58ca 13625
0beaef2b
PB		 13626 src = &newsym;
13627 }
13628 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13629}
13630
b294bdf8
MM		 13631/* Add the PT_ARM_EXIDX program header. */
13632
13633static bfd_boolean
906e58ca 13634elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13635 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13636{
13637 struct elf_segment_map *m;
13638 asection *sec;
13639
13640 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13641 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13642 {
13643 /* If there is already a PT_ARM_EXIDX header, then we do not
13644 want to add another one. This situation arises when running
13645 "strip"; the input binary already has the header. */
13646 m = elf_tdata (abfd)->segment_map;
13647 while (m && m->p_type != PT_ARM_EXIDX)
13648 m = m->next;
13649 if (!m)
13650 {
21d799b5
NC		 13651 m = (struct elf_segment_map *)
13652 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13653 if (m == NULL)
13654 return FALSE;
13655 m->p_type = PT_ARM_EXIDX;
13656 m->count = 1;
13657 m->sections[0] = sec;
13658
13659 m->next = elf_tdata (abfd)->segment_map;
13660 elf_tdata (abfd)->segment_map = m;
13661 }
13662 }
13663
13664 return TRUE;
13665}
13666
13667/* We may add a PT_ARM_EXIDX program header. */
13668
13669static int
a6b96beb
AM		 13670elf32_arm_additional_program_headers (bfd *abfd,
13671 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13672{
13673 asection *sec;
13674
13675 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13676 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13677 return 1;
13678 else
13679 return 0;
13680}
13681
fcb93ecf 13682/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13683
fcb93ecf
PB		 13684static bfd_boolean
13685elf32_arm_is_function_type (unsigned int type)
13686{
0f88be7a 13687 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13688}
13689
0beaef2b 13690/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13691const struct elf_size_info elf32_arm_size_info =
13692{
0beaef2b
PB		 13693 sizeof (Elf32_External_Ehdr),
13694 sizeof (Elf32_External_Phdr),
13695 sizeof (Elf32_External_Shdr),
13696 sizeof (Elf32_External_Rel),
13697 sizeof (Elf32_External_Rela),
13698 sizeof (Elf32_External_Sym),
13699 sizeof (Elf32_External_Dyn),
13700 sizeof (Elf_External_Note),
13701 4,
13702 1,
13703 32, 2,
13704 ELFCLASS32, EV_CURRENT,
13705 bfd_elf32_write_out_phdrs,
13706 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13707 bfd_elf32_checksum_contents,
0beaef2b
PB		 13708 bfd_elf32_write_relocs,
13709 elf32_arm_swap_symbol_in,
13710 elf32_arm_swap_symbol_out,
13711 bfd_elf32_slurp_reloc_table,
13712 bfd_elf32_slurp_symbol_table,
13713 bfd_elf32_swap_dyn_in,
13714 bfd_elf32_swap_dyn_out,
13715 bfd_elf32_swap_reloc_in,
13716 bfd_elf32_swap_reloc_out,
13717 bfd_elf32_swap_reloca_in,
13718 bfd_elf32_swap_reloca_out
13719};
13720
252b5132
RH		 13721#define ELF_ARCH bfd_arch_arm
13722#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13723#ifdef __QNXTARGET__
13724#define ELF_MAXPAGESIZE 0x1000
13725#else
f21f3fe0 13726#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13727#endif
b1342370 13728#define ELF_MINPAGESIZE 0x1000
24718e3b 13729#define ELF_COMMONPAGESIZE 0x1000
252b5132 13730
ba93b8ac
DJ		 13731#define bfd_elf32_mkobject elf32_arm_mkobject
13732
99e4ae17
AJ		 13733#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13734#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13735#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13736#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13737#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13738#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13739#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13740#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13741#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13742#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13743#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13744#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13745#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13746#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13747#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13748
13749#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13750#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13751#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13752#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13753#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13754#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13755#define elf_backend_write_section elf32_arm_write_section
252b5132 13756#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13757#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13758#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13759#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13760#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13761#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13762#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13763#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13764#define elf_backend_object_p elf32_arm_object_p
e16bb312 13765#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13766#define elf_backend_fake_sections elf32_arm_fake_sections
13767#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13768#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13769#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13770#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13771#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13772#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13773#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13774#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13775#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13776#define elf_backend_is_function_type elf32_arm_is_function_type
13777
13778#define elf_backend_can_refcount 1
13779#define elf_backend_can_gc_sections 1
13780#define elf_backend_plt_readonly 1
13781#define elf_backend_want_got_plt 1
13782#define elf_backend_want_plt_sym 0
13783#define elf_backend_may_use_rel_p 1
13784#define elf_backend_may_use_rela_p 0
4e7fd91e 13785#define elf_backend_default_use_rela_p 0
252b5132 13786
04f7c78d 13787#define elf_backend_got_header_size 12
04f7c78d 13788
906e58ca
NC		 13789#undef elf_backend_obj_attrs_vendor
13790#define elf_backend_obj_attrs_vendor "aeabi"
13791#undef elf_backend_obj_attrs_section
13792#define elf_backend_obj_attrs_section ".ARM.attributes"
13793#undef elf_backend_obj_attrs_arg_type
13794#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13795#undef elf_backend_obj_attrs_section_type
104d59d1 13796#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13797#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13798
252b5132 13799#include "elf32-target.h"
7f266840 13800
906e58ca 13801/* VxWorks Targets. */
4e7fd91e 13802
906e58ca 13803#undef TARGET_LITTLE_SYM
4e7fd91e 13804#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13805#undef TARGET_LITTLE_NAME
4e7fd91e 13806#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13807#undef TARGET_BIG_SYM
4e7fd91e 13808#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13809#undef TARGET_BIG_NAME
4e7fd91e
PB		 13810#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13811
13812/* Like elf32_arm_link_hash_table_create -- but overrides
13813 appropriately for VxWorks. */
906e58ca 13814
4e7fd91e
PB		 13815static struct bfd_link_hash_table *
13816elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13817{
13818 struct bfd_link_hash_table *ret;
13819
13820 ret = elf32_arm_link_hash_table_create (abfd);
13821 if (ret)
13822 {
13823 struct elf32_arm_link_hash_table *htab
00a97672 13824 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13825 htab->use_rel = 0;
00a97672 13826 htab->vxworks_p = 1;
4e7fd91e
PB		 13827 }
13828 return ret;
906e58ca 13829}
4e7fd91e 13830
00a97672
RS		 13831static void
13832elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13833{
13834 elf32_arm_final_write_processing (abfd, linker);
13835 elf_vxworks_final_write_processing (abfd, linker);
13836}
13837
906e58ca 13838#undef elf32_bed
4e7fd91e
PB		 13839#define elf32_bed elf32_arm_vxworks_bed
13840
906e58ca
NC		 13841#undef bfd_elf32_bfd_link_hash_table_create
13842#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13843#undef elf_backend_add_symbol_hook
13844#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13845#undef elf_backend_final_write_processing
13846#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13847#undef elf_backend_emit_relocs
13848#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13849
906e58ca 13850#undef elf_backend_may_use_rel_p
00a97672 13851#define elf_backend_may_use_rel_p 0
906e58ca 13852#undef elf_backend_may_use_rela_p
00a97672 13853#define elf_backend_may_use_rela_p 1
906e58ca 13854#undef elf_backend_default_use_rela_p
00a97672 13855#define elf_backend_default_use_rela_p 1
906e58ca 13856#undef elf_backend_want_plt_sym
00a97672 13857#define elf_backend_want_plt_sym 1
906e58ca 13858#undef ELF_MAXPAGESIZE
00a97672 13859#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13860
13861#include "elf32-target.h"
13862
13863
21d799b5
NC		 13864/* Merge backend specific data from an object file to the output
13865 object file when linking. */
13866
13867static bfd_boolean
13868elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
13869{
13870 flagword out_flags;
13871 flagword in_flags;
13872 bfd_boolean flags_compatible = TRUE;
13873 asection *sec;
13874
13875 /* Check if we have the same endianess. */
13876 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
13877 return FALSE;
13878
13879 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13880 return TRUE;
13881
13882 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
13883 return FALSE;
13884
13885 /* The input BFD must have had its flags initialised. */
13886 /* The following seems bogus to me -- The flags are initialized in
13887 the assembler but I don't think an elf_flags_init field is
13888 written into the object. */
13889 /* BFD_ASSERT (elf_flags_init (ibfd)); */
13890
13891 in_flags = elf_elfheader (ibfd)->e_flags;
13892 out_flags = elf_elfheader (obfd)->e_flags;
13893
13894 /* In theory there is no reason why we couldn't handle this. However
13895 in practice it isn't even close to working and there is no real
13896 reason to want it. */
13897 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
13898 && !(ibfd->flags & DYNAMIC)
13899 && (in_flags & EF_ARM_BE8))
13900 {
13901 _bfd_error_handler (_("error: %B is already in final BE8 format"),
13902 ibfd);
13903 return FALSE;
13904 }
13905
13906 if (!elf_flags_init (obfd))
13907 {
13908 /* If the input is the default architecture and had the default
13909 flags then do not bother setting the flags for the output
13910 architecture, instead allow future merges to do this. If no
13911 future merges ever set these flags then they will retain their
13912 uninitialised values, which surprise surprise, correspond
13913 to the default values. */
13914 if (bfd_get_arch_info (ibfd)->the_default
13915 && elf_elfheader (ibfd)->e_flags == 0)
13916 return TRUE;
13917
13918 elf_flags_init (obfd) = TRUE;
13919 elf_elfheader (obfd)->e_flags = in_flags;
13920
13921 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
13922 && bfd_get_arch_info (obfd)->the_default)
13923 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
13924
13925 return TRUE;
13926 }
13927
13928 /* Determine what should happen if the input ARM architecture
13929 does not match the output ARM architecture. */
13930 if (! bfd_arm_merge_machines (ibfd, obfd))
13931 return FALSE;
13932
13933 /* Identical flags must be compatible. */
13934 if (in_flags == out_flags)
13935 return TRUE;
13936
13937 /* Check to see if the input BFD actually contains any sections. If
13938 not, its flags may not have been initialised either, but it
13939 cannot actually cause any incompatiblity. Do not short-circuit
13940 dynamic objects; their section list may be emptied by
13941 elf_link_add_object_symbols.
13942
13943 Also check to see if there are no code sections in the input.
13944 In this case there is no need to check for code specific flags.
13945 XXX - do we need to worry about floating-point format compatability
13946 in data sections ? */
13947 if (!(ibfd->flags & DYNAMIC))
13948 {
13949 bfd_boolean null_input_bfd = TRUE;
13950 bfd_boolean only_data_sections = TRUE;
13951
13952 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
13953 {
13954 /* Ignore synthetic glue sections. */
13955 if (strcmp (sec->name, ".glue_7")
13956 && strcmp (sec->name, ".glue_7t"))
13957 {
13958 if ((bfd_get_section_flags (ibfd, sec)
13959 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
13960 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
13961 only_data_sections = FALSE;
13962
13963 null_input_bfd = FALSE;
13964 break;
13965 }
13966 }
13967
13968 if (null_input_bfd || only_data_sections)
13969 return TRUE;
13970 }
13971
13972 /* Complain about various flag mismatches. */
13973 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
13974 EF_ARM_EABI_VERSION (out_flags)))
13975 {
13976 _bfd_error_handler
13977 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
13978 ibfd, obfd,
13979 (in_flags & EF_ARM_EABIMASK) >> 24,
13980 (out_flags & EF_ARM_EABIMASK) >> 24);
13981 return FALSE;
13982 }
13983
13984 /* Not sure what needs to be checked for EABI versions >= 1. */
13985 /* VxWorks libraries do not use these flags. */
13986 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
13987 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
13988 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
13989 {
13990 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13991 {
13992 _bfd_error_handler
13993 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
13994 ibfd, obfd,
13995 in_flags & EF_ARM_APCS_26 ? 26 : 32,
13996 out_flags & EF_ARM_APCS_26 ? 26 : 32);
13997 flags_compatible = FALSE;
13998 }
13999
14000 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14001 {
14002 if (in_flags & EF_ARM_APCS_FLOAT)
14003 _bfd_error_handler
14004 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14005 ibfd, obfd);
14006 else
14007 _bfd_error_handler
14008 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14009 ibfd, obfd);
14010
14011 flags_compatible = FALSE;
14012 }
14013
14014 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14015 {
14016 if (in_flags & EF_ARM_VFP_FLOAT)
14017 _bfd_error_handler
14018 (_("error: %B uses VFP instructions, whereas %B does not"),
14019 ibfd, obfd);
14020 else
14021 _bfd_error_handler
14022 (_("error: %B uses FPA instructions, whereas %B does not"),
14023 ibfd, obfd);
14024
14025 flags_compatible = FALSE;
14026 }
14027
14028 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14029 {
14030 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14031 _bfd_error_handler
14032 (_("error: %B uses Maverick instructions, whereas %B does not"),
14033 ibfd, obfd);
14034 else
14035 _bfd_error_handler
14036 (_("error: %B does not use Maverick instructions, whereas %B does"),
14037 ibfd, obfd);
14038
14039 flags_compatible = FALSE;
14040 }
14041
14042#ifdef EF_ARM_SOFT_FLOAT
14043 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14044 {
14045 /* We can allow interworking between code that is VFP format
14046 layout, and uses either soft float or integer regs for
14047 passing floating point arguments and results. We already
14048 know that the APCS_FLOAT flags match; similarly for VFP
14049 flags. */
14050 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14051 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14052 {
14053 if (in_flags & EF_ARM_SOFT_FLOAT)
14054 _bfd_error_handler
14055 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14056 ibfd, obfd);
14057 else
14058 _bfd_error_handler
14059 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14060 ibfd, obfd);
14061
14062 flags_compatible = FALSE;
14063 }
14064 }
14065#endif
14066
14067 /* Interworking mismatch is only a warning. */
14068 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14069 {
14070 if (in_flags & EF_ARM_INTERWORK)
14071 {
14072 _bfd_error_handler
14073 (_("Warning: %B supports interworking, whereas %B does not"),
14074 ibfd, obfd);
14075 }
14076 else
14077 {
14078 _bfd_error_handler
14079 (_("Warning: %B does not support interworking, whereas %B does"),
14080 ibfd, obfd);
14081 }
14082 }
14083 }
14084
14085 return flags_compatible;
14086}
14087
14088
906e58ca 14089/* Symbian OS Targets. */
7f266840 14090
906e58ca 14091#undef TARGET_LITTLE_SYM
7f266840 14092#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14093#undef TARGET_LITTLE_NAME
7f266840 14094#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14095#undef TARGET_BIG_SYM
7f266840 14096#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14097#undef TARGET_BIG_NAME
7f266840
DJ		 14098#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14099
14100/* Like elf32_arm_link_hash_table_create -- but overrides
14101 appropriately for Symbian OS. */
906e58ca 14102
7f266840
DJ		 14103static struct bfd_link_hash_table *
14104elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14105{
14106 struct bfd_link_hash_table *ret;
14107
14108 ret = elf32_arm_link_hash_table_create (abfd);
14109 if (ret)
14110 {
14111 struct elf32_arm_link_hash_table *htab
14112 = (struct elf32_arm_link_hash_table *)ret;
14113 /* There is no PLT header for Symbian OS. */
14114 htab->plt_header_size = 0;
95720a86
DJ		 14115 /* The PLT entries are each one instruction and one word. */
14116 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14117 htab->symbian_p = 1;
33bfe774
JB		 14118 /* Symbian uses armv5t or above, so use_blx is always true. */
14119 htab->use_blx = 1;
67687978 14120 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14121 }
14122 return ret;
906e58ca 14123}
7f266840 14124
b35d266b 14125static const struct bfd_elf_special_section
551b43fd 14126elf32_arm_symbian_special_sections[] =
7f266840 14127{
5cd3778d
MM		 14128 /* In a BPABI executable, the dynamic linking sections do not go in
14129 the loadable read-only segment. The post-linker may wish to
14130 refer to these sections, but they are not part of the final
14131 program image. */
0112cd26
NC		 14132 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14133 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14134 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14135 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14136 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14137 /* These sections do not need to be writable as the SymbianOS
14138 postlinker will arrange things so that no dynamic relocation is
14139 required. */
0112cd26
NC		 14140 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14141 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14142 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14143 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14144};
14145
c3c76620 14146static void
906e58ca 14147elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14148 struct bfd_link_info *link_info)
c3c76620
MM		 14149{
14150 /* BPABI objects are never loaded directly by an OS kernel; they are
14151 processed by a postlinker first, into an OS-specific format. If
14152 the D_PAGED bit is set on the file, BFD will align segments on
14153 page boundaries, so that an OS can directly map the file. With
14154 BPABI objects, that just results in wasted space. In addition,
14155 because we clear the D_PAGED bit, map_sections_to_segments will
14156 recognize that the program headers should not be mapped into any
14157 loadable segment. */
14158 abfd->flags &= ~D_PAGED;
906e58ca 14159 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14160}
7f266840
DJ		 14161
14162static bfd_boolean
906e58ca 14163elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14164 struct bfd_link_info *info)
7f266840
DJ		 14165{
14166 struct elf_segment_map *m;
14167 asection *dynsec;
14168
7f266840
DJ		 14169 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14170 segment. However, because the .dynamic section is not marked
14171 with SEC_LOAD, the generic ELF code will not create such a
14172 segment. */
14173 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14174 if (dynsec)
14175 {
8ded5a0f
AM		 14176 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14177 if (m->p_type == PT_DYNAMIC)
14178 break;
14179
14180 if (m == NULL)
14181 {
14182 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14183 m->next = elf_tdata (abfd)->segment_map;
14184 elf_tdata (abfd)->segment_map = m;
14185 }
7f266840
DJ		 14186 }
14187
b294bdf8
MM		 14188 /* Also call the generic arm routine. */
14189 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14190}
14191
95720a86
DJ		 14192/* Return address for Ith PLT stub in section PLT, for relocation REL
14193 or (bfd_vma) -1 if it should not be included. */
14194
14195static bfd_vma
14196elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14197 const arelent *rel ATTRIBUTE_UNUSED)
14198{
14199 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14200}
14201
14202
8029a119 14203#undef elf32_bed
7f266840
DJ		 14204#define elf32_bed elf32_arm_symbian_bed
14205
14206/* The dynamic sections are not allocated on SymbianOS; the postlinker
14207 will process them and then discard them. */
906e58ca 14208#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14209#define ELF_DYNAMIC_SEC_FLAGS \
14210 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14211
00a97672 14212#undef elf_backend_add_symbol_hook
00a97672 14213#undef elf_backend_emit_relocs
c3c76620 14214
906e58ca
NC		 14215#undef bfd_elf32_bfd_link_hash_table_create
14216#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14217#undef elf_backend_special_sections
14218#define elf_backend_special_sections elf32_arm_symbian_special_sections
14219#undef elf_backend_begin_write_processing
14220#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14221#undef elf_backend_final_write_processing
14222#define elf_backend_final_write_processing elf32_arm_final_write_processing
14223
14224#undef elf_backend_modify_segment_map
7f266840
DJ		 14225#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14226
14227/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14228#undef elf_backend_got_header_size
7f266840
DJ		 14229#define elf_backend_got_header_size 0
14230
14231/* Similarly, there is no .got.plt section. */
906e58ca 14232#undef elf_backend_want_got_plt
7f266840
DJ		 14233#define elf_backend_want_got_plt 0
14234
906e58ca 14235#undef elf_backend_plt_sym_val
95720a86
DJ		 14236#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14237
906e58ca 14238#undef elf_backend_may_use_rel_p
00a97672 14239#define elf_backend_may_use_rel_p 1
906e58ca 14240#undef elf_backend_may_use_rela_p
00a97672 14241#define elf_backend_may_use_rela_p 0
906e58ca 14242#undef elf_backend_default_use_rela_p
00a97672 14243#define elf_backend_default_use_rela_p 0
906e58ca 14244#undef elf_backend_want_plt_sym
00a97672 14245#define elf_backend_want_plt_sym 0
906e58ca 14246#undef ELF_MAXPAGESIZE
00a97672 14247#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14248
7f266840 14249#include "elf32-target.h"
GDB Binutils - Deliverables
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