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252b5132 | 1 | /* 32-bit ELF support for ARM |
219d1afa | 2 | Copyright (C) 1998-2018 Free Software Foundation, Inc. |
252b5132 RH |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 8 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
6e6718a3 | 21 | #include "sysdep.h" |
2468f9c9 PB |
22 | #include <limits.h> |
23 | ||
3db64b00 | 24 | #include "bfd.h" |
6034aab8 | 25 | #include "bfd_stdint.h" |
00a97672 | 26 | #include "libiberty.h" |
7f266840 DJ |
27 | #include "libbfd.h" |
28 | #include "elf-bfd.h" | |
b38cadfb | 29 | #include "elf-nacl.h" |
00a97672 | 30 | #include "elf-vxworks.h" |
ee065d83 | 31 | #include "elf/arm.h" |
7f266840 | 32 | |
00a97672 RS |
33 | /* Return the relocation section associated with NAME. HTAB is the |
34 | bfd's elf32_arm_link_hash_entry. */ | |
35 | #define RELOC_SECTION(HTAB, NAME) \ | |
36 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
37 | ||
38 | /* Return size of a relocation entry. HTAB is the bfd's | |
39 | elf32_arm_link_hash_entry. */ | |
40 | #define RELOC_SIZE(HTAB) \ | |
41 | ((HTAB)->use_rel \ | |
42 | ? sizeof (Elf32_External_Rel) \ | |
43 | : sizeof (Elf32_External_Rela)) | |
44 | ||
45 | /* Return function to swap relocations in. HTAB is the bfd's | |
46 | elf32_arm_link_hash_entry. */ | |
47 | #define SWAP_RELOC_IN(HTAB) \ | |
48 | ((HTAB)->use_rel \ | |
49 | ? bfd_elf32_swap_reloc_in \ | |
50 | : bfd_elf32_swap_reloca_in) | |
51 | ||
52 | /* Return function to swap relocations out. HTAB is the bfd's | |
53 | elf32_arm_link_hash_entry. */ | |
54 | #define SWAP_RELOC_OUT(HTAB) \ | |
55 | ((HTAB)->use_rel \ | |
56 | ? bfd_elf32_swap_reloc_out \ | |
57 | : bfd_elf32_swap_reloca_out) | |
58 | ||
f3185997 | 59 | #define elf_info_to_howto NULL |
07d6d2b8 | 60 | #define elf_info_to_howto_rel elf32_arm_info_to_howto |
7f266840 DJ |
61 | |
62 | #define ARM_ELF_ABI_VERSION 0 | |
63 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
64 | ||
79f08007 YZ |
65 | /* The Adjusted Place, as defined by AAELF. */ |
66 | #define Pa(X) ((X) & 0xfffffffc) | |
67 | ||
3e6b1042 DJ |
68 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
69 | struct bfd_link_info *link_info, | |
70 | asection *sec, | |
71 | bfd_byte *contents); | |
72 | ||
7f266840 DJ |
73 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
74 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
75 | in that slot. */ | |
76 | ||
c19d1205 | 77 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 78 | { |
8029a119 | 79 | /* No relocation. */ |
7f266840 DJ |
80 | HOWTO (R_ARM_NONE, /* type */ |
81 | 0, /* rightshift */ | |
6346d5ca | 82 | 3, /* size (0 = byte, 1 = short, 2 = long) */ |
7f266840 DJ |
83 | 0, /* bitsize */ |
84 | FALSE, /* pc_relative */ | |
85 | 0, /* bitpos */ | |
86 | complain_overflow_dont,/* complain_on_overflow */ | |
87 | bfd_elf_generic_reloc, /* special_function */ | |
88 | "R_ARM_NONE", /* name */ | |
89 | FALSE, /* partial_inplace */ | |
90 | 0, /* src_mask */ | |
91 | 0, /* dst_mask */ | |
92 | FALSE), /* pcrel_offset */ | |
93 | ||
94 | HOWTO (R_ARM_PC24, /* type */ | |
95 | 2, /* rightshift */ | |
96 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
97 | 24, /* bitsize */ | |
98 | TRUE, /* pc_relative */ | |
99 | 0, /* bitpos */ | |
100 | complain_overflow_signed,/* complain_on_overflow */ | |
101 | bfd_elf_generic_reloc, /* special_function */ | |
102 | "R_ARM_PC24", /* name */ | |
103 | FALSE, /* partial_inplace */ | |
104 | 0x00ffffff, /* src_mask */ | |
105 | 0x00ffffff, /* dst_mask */ | |
106 | TRUE), /* pcrel_offset */ | |
107 | ||
108 | /* 32 bit absolute */ | |
109 | HOWTO (R_ARM_ABS32, /* type */ | |
110 | 0, /* rightshift */ | |
111 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
112 | 32, /* bitsize */ | |
113 | FALSE, /* pc_relative */ | |
114 | 0, /* bitpos */ | |
115 | complain_overflow_bitfield,/* complain_on_overflow */ | |
116 | bfd_elf_generic_reloc, /* special_function */ | |
117 | "R_ARM_ABS32", /* name */ | |
118 | FALSE, /* partial_inplace */ | |
119 | 0xffffffff, /* src_mask */ | |
120 | 0xffffffff, /* dst_mask */ | |
121 | FALSE), /* pcrel_offset */ | |
122 | ||
123 | /* standard 32bit pc-relative reloc */ | |
124 | HOWTO (R_ARM_REL32, /* type */ | |
125 | 0, /* rightshift */ | |
126 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
127 | 32, /* bitsize */ | |
128 | TRUE, /* pc_relative */ | |
129 | 0, /* bitpos */ | |
130 | complain_overflow_bitfield,/* complain_on_overflow */ | |
131 | bfd_elf_generic_reloc, /* special_function */ | |
132 | "R_ARM_REL32", /* name */ | |
133 | FALSE, /* partial_inplace */ | |
134 | 0xffffffff, /* src_mask */ | |
135 | 0xffffffff, /* dst_mask */ | |
136 | TRUE), /* pcrel_offset */ | |
137 | ||
c19d1205 | 138 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 139 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 DJ |
140 | 0, /* rightshift */ |
141 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
4962c51a MS |
142 | 32, /* bitsize */ |
143 | TRUE, /* pc_relative */ | |
7f266840 | 144 | 0, /* bitpos */ |
4962c51a | 145 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 146 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 147 | "R_ARM_LDR_PC_G0", /* name */ |
7f266840 | 148 | FALSE, /* partial_inplace */ |
4962c51a MS |
149 | 0xffffffff, /* src_mask */ |
150 | 0xffffffff, /* dst_mask */ | |
151 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
152 | |
153 | /* 16 bit absolute */ | |
154 | HOWTO (R_ARM_ABS16, /* type */ | |
155 | 0, /* rightshift */ | |
156 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
157 | 16, /* bitsize */ | |
158 | FALSE, /* pc_relative */ | |
159 | 0, /* bitpos */ | |
160 | complain_overflow_bitfield,/* complain_on_overflow */ | |
161 | bfd_elf_generic_reloc, /* special_function */ | |
162 | "R_ARM_ABS16", /* name */ | |
163 | FALSE, /* partial_inplace */ | |
164 | 0x0000ffff, /* src_mask */ | |
165 | 0x0000ffff, /* dst_mask */ | |
166 | FALSE), /* pcrel_offset */ | |
167 | ||
168 | /* 12 bit absolute */ | |
169 | HOWTO (R_ARM_ABS12, /* type */ | |
170 | 0, /* rightshift */ | |
171 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
172 | 12, /* bitsize */ | |
173 | FALSE, /* pc_relative */ | |
174 | 0, /* bitpos */ | |
175 | complain_overflow_bitfield,/* complain_on_overflow */ | |
176 | bfd_elf_generic_reloc, /* special_function */ | |
177 | "R_ARM_ABS12", /* name */ | |
178 | FALSE, /* partial_inplace */ | |
00a97672 RS |
179 | 0x00000fff, /* src_mask */ |
180 | 0x00000fff, /* dst_mask */ | |
7f266840 DJ |
181 | FALSE), /* pcrel_offset */ |
182 | ||
183 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
184 | 6, /* rightshift */ | |
185 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
186 | 5, /* bitsize */ | |
187 | FALSE, /* pc_relative */ | |
188 | 0, /* bitpos */ | |
189 | complain_overflow_bitfield,/* complain_on_overflow */ | |
190 | bfd_elf_generic_reloc, /* special_function */ | |
191 | "R_ARM_THM_ABS5", /* name */ | |
192 | FALSE, /* partial_inplace */ | |
193 | 0x000007e0, /* src_mask */ | |
194 | 0x000007e0, /* dst_mask */ | |
195 | FALSE), /* pcrel_offset */ | |
196 | ||
197 | /* 8 bit absolute */ | |
198 | HOWTO (R_ARM_ABS8, /* type */ | |
199 | 0, /* rightshift */ | |
200 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
201 | 8, /* bitsize */ | |
202 | FALSE, /* pc_relative */ | |
203 | 0, /* bitpos */ | |
204 | complain_overflow_bitfield,/* complain_on_overflow */ | |
205 | bfd_elf_generic_reloc, /* special_function */ | |
206 | "R_ARM_ABS8", /* name */ | |
207 | FALSE, /* partial_inplace */ | |
208 | 0x000000ff, /* src_mask */ | |
209 | 0x000000ff, /* dst_mask */ | |
210 | FALSE), /* pcrel_offset */ | |
211 | ||
212 | HOWTO (R_ARM_SBREL32, /* type */ | |
213 | 0, /* rightshift */ | |
214 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
215 | 32, /* bitsize */ | |
216 | FALSE, /* pc_relative */ | |
217 | 0, /* bitpos */ | |
218 | complain_overflow_dont,/* complain_on_overflow */ | |
219 | bfd_elf_generic_reloc, /* special_function */ | |
220 | "R_ARM_SBREL32", /* name */ | |
221 | FALSE, /* partial_inplace */ | |
222 | 0xffffffff, /* src_mask */ | |
223 | 0xffffffff, /* dst_mask */ | |
224 | FALSE), /* pcrel_offset */ | |
225 | ||
c19d1205 | 226 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 DJ |
227 | 1, /* rightshift */ |
228 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
f6ebfac0 | 229 | 24, /* bitsize */ |
7f266840 DJ |
230 | TRUE, /* pc_relative */ |
231 | 0, /* bitpos */ | |
232 | complain_overflow_signed,/* complain_on_overflow */ | |
233 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 234 | "R_ARM_THM_CALL", /* name */ |
7f266840 | 235 | FALSE, /* partial_inplace */ |
7f6ab9f8 AM |
236 | 0x07ff2fff, /* src_mask */ |
237 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
238 | TRUE), /* pcrel_offset */ |
239 | ||
07d6d2b8 | 240 | HOWTO (R_ARM_THM_PC8, /* type */ |
7f266840 DJ |
241 | 1, /* rightshift */ |
242 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
243 | 8, /* bitsize */ | |
244 | TRUE, /* pc_relative */ | |
245 | 0, /* bitpos */ | |
246 | complain_overflow_signed,/* complain_on_overflow */ | |
247 | bfd_elf_generic_reloc, /* special_function */ | |
248 | "R_ARM_THM_PC8", /* name */ | |
249 | FALSE, /* partial_inplace */ | |
250 | 0x000000ff, /* src_mask */ | |
251 | 0x000000ff, /* dst_mask */ | |
252 | TRUE), /* pcrel_offset */ | |
253 | ||
c19d1205 | 254 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 DJ |
255 | 1, /* rightshift */ |
256 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
257 | 32, /* bitsize */ |
258 | FALSE, /* pc_relative */ | |
7f266840 DJ |
259 | 0, /* bitpos */ |
260 | complain_overflow_signed,/* complain_on_overflow */ | |
261 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 262 | "R_ARM_BREL_ADJ", /* name */ |
7f266840 | 263 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
264 | 0xffffffff, /* src_mask */ |
265 | 0xffffffff, /* dst_mask */ | |
266 | FALSE), /* pcrel_offset */ | |
7f266840 | 267 | |
0855e32b | 268 | HOWTO (R_ARM_TLS_DESC, /* type */ |
7f266840 | 269 | 0, /* rightshift */ |
0855e32b NS |
270 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
271 | 32, /* bitsize */ | |
7f266840 DJ |
272 | FALSE, /* pc_relative */ |
273 | 0, /* bitpos */ | |
0855e32b | 274 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 275 | bfd_elf_generic_reloc, /* special_function */ |
0855e32b | 276 | "R_ARM_TLS_DESC", /* name */ |
7f266840 | 277 | FALSE, /* partial_inplace */ |
0855e32b NS |
278 | 0xffffffff, /* src_mask */ |
279 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
280 | FALSE), /* pcrel_offset */ |
281 | ||
282 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
283 | 0, /* rightshift */ | |
284 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
285 | 0, /* bitsize */ | |
286 | FALSE, /* pc_relative */ | |
287 | 0, /* bitpos */ | |
288 | complain_overflow_signed,/* complain_on_overflow */ | |
289 | bfd_elf_generic_reloc, /* special_function */ | |
290 | "R_ARM_SWI8", /* name */ | |
291 | FALSE, /* partial_inplace */ | |
292 | 0x00000000, /* src_mask */ | |
293 | 0x00000000, /* dst_mask */ | |
294 | FALSE), /* pcrel_offset */ | |
295 | ||
296 | /* BLX instruction for the ARM. */ | |
297 | HOWTO (R_ARM_XPC25, /* type */ | |
298 | 2, /* rightshift */ | |
299 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 300 | 24, /* bitsize */ |
7f266840 DJ |
301 | TRUE, /* pc_relative */ |
302 | 0, /* bitpos */ | |
303 | complain_overflow_signed,/* complain_on_overflow */ | |
304 | bfd_elf_generic_reloc, /* special_function */ | |
305 | "R_ARM_XPC25", /* name */ | |
306 | FALSE, /* partial_inplace */ | |
307 | 0x00ffffff, /* src_mask */ | |
308 | 0x00ffffff, /* dst_mask */ | |
309 | TRUE), /* pcrel_offset */ | |
310 | ||
311 | /* BLX instruction for the Thumb. */ | |
312 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
313 | 2, /* rightshift */ | |
314 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 315 | 24, /* bitsize */ |
7f266840 DJ |
316 | TRUE, /* pc_relative */ |
317 | 0, /* bitpos */ | |
318 | complain_overflow_signed,/* complain_on_overflow */ | |
319 | bfd_elf_generic_reloc, /* special_function */ | |
320 | "R_ARM_THM_XPC22", /* name */ | |
321 | FALSE, /* partial_inplace */ | |
7f6ab9f8 AM |
322 | 0x07ff2fff, /* src_mask */ |
323 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
324 | TRUE), /* pcrel_offset */ |
325 | ||
ba93b8ac | 326 | /* Dynamic TLS relocations. */ |
7f266840 | 327 | |
ba93b8ac | 328 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
07d6d2b8 AM |
329 | 0, /* rightshift */ |
330 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
331 | 32, /* bitsize */ | |
332 | FALSE, /* pc_relative */ | |
333 | 0, /* bitpos */ | |
99059e56 RM |
334 | complain_overflow_bitfield,/* complain_on_overflow */ |
335 | bfd_elf_generic_reloc, /* special_function */ | |
336 | "R_ARM_TLS_DTPMOD32", /* name */ | |
337 | TRUE, /* partial_inplace */ | |
338 | 0xffffffff, /* src_mask */ | |
339 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 340 | FALSE), /* pcrel_offset */ |
7f266840 | 341 | |
ba93b8ac | 342 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
07d6d2b8 AM |
343 | 0, /* rightshift */ |
344 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
345 | 32, /* bitsize */ | |
346 | FALSE, /* pc_relative */ | |
347 | 0, /* bitpos */ | |
99059e56 RM |
348 | complain_overflow_bitfield,/* complain_on_overflow */ |
349 | bfd_elf_generic_reloc, /* special_function */ | |
350 | "R_ARM_TLS_DTPOFF32", /* name */ | |
351 | TRUE, /* partial_inplace */ | |
352 | 0xffffffff, /* src_mask */ | |
353 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 354 | FALSE), /* pcrel_offset */ |
7f266840 | 355 | |
ba93b8ac | 356 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
07d6d2b8 AM |
357 | 0, /* rightshift */ |
358 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
359 | 32, /* bitsize */ | |
360 | FALSE, /* pc_relative */ | |
361 | 0, /* bitpos */ | |
99059e56 RM |
362 | complain_overflow_bitfield,/* complain_on_overflow */ |
363 | bfd_elf_generic_reloc, /* special_function */ | |
364 | "R_ARM_TLS_TPOFF32", /* name */ | |
365 | TRUE, /* partial_inplace */ | |
366 | 0xffffffff, /* src_mask */ | |
367 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 368 | FALSE), /* pcrel_offset */ |
7f266840 DJ |
369 | |
370 | /* Relocs used in ARM Linux */ | |
371 | ||
372 | HOWTO (R_ARM_COPY, /* type */ | |
07d6d2b8 AM |
373 | 0, /* rightshift */ |
374 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
375 | 32, /* bitsize */ | |
376 | FALSE, /* pc_relative */ | |
377 | 0, /* bitpos */ | |
99059e56 RM |
378 | complain_overflow_bitfield,/* complain_on_overflow */ |
379 | bfd_elf_generic_reloc, /* special_function */ | |
380 | "R_ARM_COPY", /* name */ | |
381 | TRUE, /* partial_inplace */ | |
382 | 0xffffffff, /* src_mask */ | |
383 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 384 | FALSE), /* pcrel_offset */ |
7f266840 DJ |
385 | |
386 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
07d6d2b8 AM |
387 | 0, /* rightshift */ |
388 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
389 | 32, /* bitsize */ | |
390 | FALSE, /* pc_relative */ | |
391 | 0, /* bitpos */ | |
99059e56 RM |
392 | complain_overflow_bitfield,/* complain_on_overflow */ |
393 | bfd_elf_generic_reloc, /* special_function */ | |
394 | "R_ARM_GLOB_DAT", /* name */ | |
395 | TRUE, /* partial_inplace */ | |
396 | 0xffffffff, /* src_mask */ | |
397 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 398 | FALSE), /* pcrel_offset */ |
7f266840 DJ |
399 | |
400 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
07d6d2b8 AM |
401 | 0, /* rightshift */ |
402 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
403 | 32, /* bitsize */ | |
404 | FALSE, /* pc_relative */ | |
405 | 0, /* bitpos */ | |
99059e56 RM |
406 | complain_overflow_bitfield,/* complain_on_overflow */ |
407 | bfd_elf_generic_reloc, /* special_function */ | |
408 | "R_ARM_JUMP_SLOT", /* name */ | |
409 | TRUE, /* partial_inplace */ | |
410 | 0xffffffff, /* src_mask */ | |
411 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 412 | FALSE), /* pcrel_offset */ |
7f266840 DJ |
413 | |
414 | HOWTO (R_ARM_RELATIVE, /* type */ | |
07d6d2b8 AM |
415 | 0, /* rightshift */ |
416 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
417 | 32, /* bitsize */ | |
418 | FALSE, /* pc_relative */ | |
419 | 0, /* bitpos */ | |
99059e56 RM |
420 | complain_overflow_bitfield,/* complain_on_overflow */ |
421 | bfd_elf_generic_reloc, /* special_function */ | |
422 | "R_ARM_RELATIVE", /* name */ | |
423 | TRUE, /* partial_inplace */ | |
424 | 0xffffffff, /* src_mask */ | |
425 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 426 | FALSE), /* pcrel_offset */ |
7f266840 | 427 | |
c19d1205 | 428 | HOWTO (R_ARM_GOTOFF32, /* type */ |
07d6d2b8 AM |
429 | 0, /* rightshift */ |
430 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
431 | 32, /* bitsize */ | |
432 | FALSE, /* pc_relative */ | |
433 | 0, /* bitpos */ | |
99059e56 RM |
434 | complain_overflow_bitfield,/* complain_on_overflow */ |
435 | bfd_elf_generic_reloc, /* special_function */ | |
436 | "R_ARM_GOTOFF32", /* name */ | |
437 | TRUE, /* partial_inplace */ | |
438 | 0xffffffff, /* src_mask */ | |
439 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 440 | FALSE), /* pcrel_offset */ |
7f266840 DJ |
441 | |
442 | HOWTO (R_ARM_GOTPC, /* type */ | |
07d6d2b8 AM |
443 | 0, /* rightshift */ |
444 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
445 | 32, /* bitsize */ | |
99059e56 | 446 | TRUE, /* pc_relative */ |
07d6d2b8 | 447 | 0, /* bitpos */ |
99059e56 RM |
448 | complain_overflow_bitfield,/* complain_on_overflow */ |
449 | bfd_elf_generic_reloc, /* special_function */ | |
450 | "R_ARM_GOTPC", /* name */ | |
451 | TRUE, /* partial_inplace */ | |
452 | 0xffffffff, /* src_mask */ | |
453 | 0xffffffff, /* dst_mask */ | |
454 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
455 | |
456 | HOWTO (R_ARM_GOT32, /* type */ | |
07d6d2b8 AM |
457 | 0, /* rightshift */ |
458 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
459 | 32, /* bitsize */ | |
99059e56 | 460 | FALSE, /* pc_relative */ |
07d6d2b8 | 461 | 0, /* bitpos */ |
99059e56 RM |
462 | complain_overflow_bitfield,/* complain_on_overflow */ |
463 | bfd_elf_generic_reloc, /* special_function */ | |
464 | "R_ARM_GOT32", /* name */ | |
465 | TRUE, /* partial_inplace */ | |
466 | 0xffffffff, /* src_mask */ | |
467 | 0xffffffff, /* dst_mask */ | |
468 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
469 | |
470 | HOWTO (R_ARM_PLT32, /* type */ | |
07d6d2b8 AM |
471 | 2, /* rightshift */ |
472 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
473 | 24, /* bitsize */ | |
99059e56 | 474 | TRUE, /* pc_relative */ |
07d6d2b8 | 475 | 0, /* bitpos */ |
99059e56 RM |
476 | complain_overflow_bitfield,/* complain_on_overflow */ |
477 | bfd_elf_generic_reloc, /* special_function */ | |
478 | "R_ARM_PLT32", /* name */ | |
479 | FALSE, /* partial_inplace */ | |
480 | 0x00ffffff, /* src_mask */ | |
481 | 0x00ffffff, /* dst_mask */ | |
482 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
483 | |
484 | HOWTO (R_ARM_CALL, /* type */ | |
485 | 2, /* rightshift */ | |
486 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
487 | 24, /* bitsize */ | |
488 | TRUE, /* pc_relative */ | |
489 | 0, /* bitpos */ | |
490 | complain_overflow_signed,/* complain_on_overflow */ | |
491 | bfd_elf_generic_reloc, /* special_function */ | |
492 | "R_ARM_CALL", /* name */ | |
493 | FALSE, /* partial_inplace */ | |
494 | 0x00ffffff, /* src_mask */ | |
495 | 0x00ffffff, /* dst_mask */ | |
496 | TRUE), /* pcrel_offset */ | |
497 | ||
498 | HOWTO (R_ARM_JUMP24, /* type */ | |
499 | 2, /* rightshift */ | |
500 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
501 | 24, /* bitsize */ | |
502 | TRUE, /* pc_relative */ | |
503 | 0, /* bitpos */ | |
504 | complain_overflow_signed,/* complain_on_overflow */ | |
505 | bfd_elf_generic_reloc, /* special_function */ | |
506 | "R_ARM_JUMP24", /* name */ | |
507 | FALSE, /* partial_inplace */ | |
508 | 0x00ffffff, /* src_mask */ | |
509 | 0x00ffffff, /* dst_mask */ | |
510 | TRUE), /* pcrel_offset */ | |
511 | ||
c19d1205 ZW |
512 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
513 | 1, /* rightshift */ | |
514 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
515 | 24, /* bitsize */ | |
516 | TRUE, /* pc_relative */ | |
7f266840 | 517 | 0, /* bitpos */ |
c19d1205 | 518 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 519 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 520 | "R_ARM_THM_JUMP24", /* name */ |
7f266840 | 521 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
522 | 0x07ff2fff, /* src_mask */ |
523 | 0x07ff2fff, /* dst_mask */ | |
524 | TRUE), /* pcrel_offset */ | |
7f266840 | 525 | |
c19d1205 | 526 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 527 | 0, /* rightshift */ |
c19d1205 ZW |
528 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
529 | 32, /* bitsize */ | |
7f266840 DJ |
530 | FALSE, /* pc_relative */ |
531 | 0, /* bitpos */ | |
532 | complain_overflow_dont,/* complain_on_overflow */ | |
533 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 534 | "R_ARM_BASE_ABS", /* name */ |
7f266840 | 535 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
536 | 0xffffffff, /* src_mask */ |
537 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
538 | FALSE), /* pcrel_offset */ |
539 | ||
540 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
541 | 0, /* rightshift */ | |
542 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
543 | 12, /* bitsize */ | |
544 | TRUE, /* pc_relative */ | |
545 | 0, /* bitpos */ | |
546 | complain_overflow_dont,/* complain_on_overflow */ | |
547 | bfd_elf_generic_reloc, /* special_function */ | |
548 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
549 | FALSE, /* partial_inplace */ | |
550 | 0x00000fff, /* src_mask */ | |
551 | 0x00000fff, /* dst_mask */ | |
552 | TRUE), /* pcrel_offset */ | |
553 | ||
554 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
555 | 0, /* rightshift */ | |
556 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
557 | 12, /* bitsize */ | |
558 | TRUE, /* pc_relative */ | |
559 | 8, /* bitpos */ | |
560 | complain_overflow_dont,/* complain_on_overflow */ | |
561 | bfd_elf_generic_reloc, /* special_function */ | |
562 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
563 | FALSE, /* partial_inplace */ | |
564 | 0x00000fff, /* src_mask */ | |
565 | 0x00000fff, /* dst_mask */ | |
566 | TRUE), /* pcrel_offset */ | |
567 | ||
568 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
569 | 0, /* rightshift */ | |
570 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
571 | 12, /* bitsize */ | |
572 | TRUE, /* pc_relative */ | |
573 | 16, /* bitpos */ | |
574 | complain_overflow_dont,/* complain_on_overflow */ | |
575 | bfd_elf_generic_reloc, /* special_function */ | |
576 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
577 | FALSE, /* partial_inplace */ | |
578 | 0x00000fff, /* src_mask */ | |
579 | 0x00000fff, /* dst_mask */ | |
580 | TRUE), /* pcrel_offset */ | |
581 | ||
582 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
583 | 0, /* rightshift */ | |
584 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
585 | 12, /* bitsize */ | |
586 | FALSE, /* pc_relative */ | |
587 | 0, /* bitpos */ | |
588 | complain_overflow_dont,/* complain_on_overflow */ | |
589 | bfd_elf_generic_reloc, /* special_function */ | |
590 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
591 | FALSE, /* partial_inplace */ | |
592 | 0x00000fff, /* src_mask */ | |
593 | 0x00000fff, /* dst_mask */ | |
594 | FALSE), /* pcrel_offset */ | |
595 | ||
596 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
597 | 0, /* rightshift */ | |
598 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
599 | 8, /* bitsize */ | |
600 | FALSE, /* pc_relative */ | |
601 | 12, /* bitpos */ | |
602 | complain_overflow_dont,/* complain_on_overflow */ | |
603 | bfd_elf_generic_reloc, /* special_function */ | |
604 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
605 | FALSE, /* partial_inplace */ | |
606 | 0x000ff000, /* src_mask */ | |
607 | 0x000ff000, /* dst_mask */ | |
608 | FALSE), /* pcrel_offset */ | |
609 | ||
610 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
611 | 0, /* rightshift */ | |
612 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
613 | 8, /* bitsize */ | |
614 | FALSE, /* pc_relative */ | |
615 | 20, /* bitpos */ | |
616 | complain_overflow_dont,/* complain_on_overflow */ | |
617 | bfd_elf_generic_reloc, /* special_function */ | |
618 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
619 | FALSE, /* partial_inplace */ | |
620 | 0x0ff00000, /* src_mask */ | |
621 | 0x0ff00000, /* dst_mask */ | |
622 | FALSE), /* pcrel_offset */ | |
623 | ||
624 | HOWTO (R_ARM_TARGET1, /* type */ | |
625 | 0, /* rightshift */ | |
626 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
627 | 32, /* bitsize */ | |
628 | FALSE, /* pc_relative */ | |
629 | 0, /* bitpos */ | |
630 | complain_overflow_dont,/* complain_on_overflow */ | |
631 | bfd_elf_generic_reloc, /* special_function */ | |
632 | "R_ARM_TARGET1", /* name */ | |
633 | FALSE, /* partial_inplace */ | |
634 | 0xffffffff, /* src_mask */ | |
635 | 0xffffffff, /* dst_mask */ | |
636 | FALSE), /* pcrel_offset */ | |
637 | ||
638 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
639 | 0, /* rightshift */ | |
640 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
641 | 32, /* bitsize */ | |
642 | FALSE, /* pc_relative */ | |
643 | 0, /* bitpos */ | |
644 | complain_overflow_dont,/* complain_on_overflow */ | |
645 | bfd_elf_generic_reloc, /* special_function */ | |
646 | "R_ARM_ROSEGREL32", /* name */ | |
647 | FALSE, /* partial_inplace */ | |
648 | 0xffffffff, /* src_mask */ | |
649 | 0xffffffff, /* dst_mask */ | |
650 | FALSE), /* pcrel_offset */ | |
651 | ||
652 | HOWTO (R_ARM_V4BX, /* type */ | |
653 | 0, /* rightshift */ | |
654 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
655 | 32, /* bitsize */ | |
656 | FALSE, /* pc_relative */ | |
657 | 0, /* bitpos */ | |
658 | complain_overflow_dont,/* complain_on_overflow */ | |
659 | bfd_elf_generic_reloc, /* special_function */ | |
660 | "R_ARM_V4BX", /* name */ | |
661 | FALSE, /* partial_inplace */ | |
662 | 0xffffffff, /* src_mask */ | |
663 | 0xffffffff, /* dst_mask */ | |
664 | FALSE), /* pcrel_offset */ | |
665 | ||
666 | HOWTO (R_ARM_TARGET2, /* type */ | |
667 | 0, /* rightshift */ | |
668 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
669 | 32, /* bitsize */ | |
670 | FALSE, /* pc_relative */ | |
671 | 0, /* bitpos */ | |
672 | complain_overflow_signed,/* complain_on_overflow */ | |
673 | bfd_elf_generic_reloc, /* special_function */ | |
674 | "R_ARM_TARGET2", /* name */ | |
675 | FALSE, /* partial_inplace */ | |
676 | 0xffffffff, /* src_mask */ | |
677 | 0xffffffff, /* dst_mask */ | |
678 | TRUE), /* pcrel_offset */ | |
679 | ||
680 | HOWTO (R_ARM_PREL31, /* type */ | |
681 | 0, /* rightshift */ | |
682 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
683 | 31, /* bitsize */ | |
684 | TRUE, /* pc_relative */ | |
685 | 0, /* bitpos */ | |
686 | complain_overflow_signed,/* complain_on_overflow */ | |
687 | bfd_elf_generic_reloc, /* special_function */ | |
688 | "R_ARM_PREL31", /* name */ | |
689 | FALSE, /* partial_inplace */ | |
690 | 0x7fffffff, /* src_mask */ | |
691 | 0x7fffffff, /* dst_mask */ | |
692 | TRUE), /* pcrel_offset */ | |
c19d1205 ZW |
693 | |
694 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
695 | 0, /* rightshift */ | |
696 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
697 | 16, /* bitsize */ | |
698 | FALSE, /* pc_relative */ | |
699 | 0, /* bitpos */ | |
700 | complain_overflow_dont,/* complain_on_overflow */ | |
701 | bfd_elf_generic_reloc, /* special_function */ | |
702 | "R_ARM_MOVW_ABS_NC", /* name */ | |
703 | FALSE, /* partial_inplace */ | |
39623e12 PB |
704 | 0x000f0fff, /* src_mask */ |
705 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
706 | FALSE), /* pcrel_offset */ |
707 | ||
708 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
709 | 0, /* rightshift */ | |
710 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
711 | 16, /* bitsize */ | |
712 | FALSE, /* pc_relative */ | |
713 | 0, /* bitpos */ | |
714 | complain_overflow_bitfield,/* complain_on_overflow */ | |
715 | bfd_elf_generic_reloc, /* special_function */ | |
716 | "R_ARM_MOVT_ABS", /* name */ | |
717 | FALSE, /* partial_inplace */ | |
39623e12 PB |
718 | 0x000f0fff, /* src_mask */ |
719 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
720 | FALSE), /* pcrel_offset */ |
721 | ||
722 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
723 | 0, /* rightshift */ | |
724 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
725 | 16, /* bitsize */ | |
726 | TRUE, /* pc_relative */ | |
727 | 0, /* bitpos */ | |
728 | complain_overflow_dont,/* complain_on_overflow */ | |
729 | bfd_elf_generic_reloc, /* special_function */ | |
730 | "R_ARM_MOVW_PREL_NC", /* name */ | |
731 | FALSE, /* partial_inplace */ | |
39623e12 PB |
732 | 0x000f0fff, /* src_mask */ |
733 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
734 | TRUE), /* pcrel_offset */ |
735 | ||
736 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
737 | 0, /* rightshift */ | |
738 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
739 | 16, /* bitsize */ | |
740 | TRUE, /* pc_relative */ | |
741 | 0, /* bitpos */ | |
742 | complain_overflow_bitfield,/* complain_on_overflow */ | |
743 | bfd_elf_generic_reloc, /* special_function */ | |
744 | "R_ARM_MOVT_PREL", /* name */ | |
745 | FALSE, /* partial_inplace */ | |
39623e12 PB |
746 | 0x000f0fff, /* src_mask */ |
747 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
748 | TRUE), /* pcrel_offset */ |
749 | ||
750 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
751 | 0, /* rightshift */ | |
752 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
753 | 16, /* bitsize */ | |
754 | FALSE, /* pc_relative */ | |
755 | 0, /* bitpos */ | |
756 | complain_overflow_dont,/* complain_on_overflow */ | |
757 | bfd_elf_generic_reloc, /* special_function */ | |
758 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
759 | FALSE, /* partial_inplace */ | |
760 | 0x040f70ff, /* src_mask */ | |
761 | 0x040f70ff, /* dst_mask */ | |
762 | FALSE), /* pcrel_offset */ | |
763 | ||
764 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
765 | 0, /* rightshift */ | |
766 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
767 | 16, /* bitsize */ | |
768 | FALSE, /* pc_relative */ | |
769 | 0, /* bitpos */ | |
770 | complain_overflow_bitfield,/* complain_on_overflow */ | |
771 | bfd_elf_generic_reloc, /* special_function */ | |
772 | "R_ARM_THM_MOVT_ABS", /* name */ | |
773 | FALSE, /* partial_inplace */ | |
774 | 0x040f70ff, /* src_mask */ | |
775 | 0x040f70ff, /* dst_mask */ | |
776 | FALSE), /* pcrel_offset */ | |
777 | ||
778 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
779 | 0, /* rightshift */ | |
780 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
781 | 16, /* bitsize */ | |
782 | TRUE, /* pc_relative */ | |
783 | 0, /* bitpos */ | |
784 | complain_overflow_dont,/* complain_on_overflow */ | |
785 | bfd_elf_generic_reloc, /* special_function */ | |
786 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
787 | FALSE, /* partial_inplace */ | |
788 | 0x040f70ff, /* src_mask */ | |
789 | 0x040f70ff, /* dst_mask */ | |
790 | TRUE), /* pcrel_offset */ | |
791 | ||
792 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
793 | 0, /* rightshift */ | |
794 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
795 | 16, /* bitsize */ | |
796 | TRUE, /* pc_relative */ | |
797 | 0, /* bitpos */ | |
798 | complain_overflow_bitfield,/* complain_on_overflow */ | |
799 | bfd_elf_generic_reloc, /* special_function */ | |
800 | "R_ARM_THM_MOVT_PREL", /* name */ | |
801 | FALSE, /* partial_inplace */ | |
802 | 0x040f70ff, /* src_mask */ | |
803 | 0x040f70ff, /* dst_mask */ | |
804 | TRUE), /* pcrel_offset */ | |
805 | ||
806 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
807 | 1, /* rightshift */ | |
808 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
809 | 19, /* bitsize */ | |
810 | TRUE, /* pc_relative */ | |
811 | 0, /* bitpos */ | |
812 | complain_overflow_signed,/* complain_on_overflow */ | |
813 | bfd_elf_generic_reloc, /* special_function */ | |
814 | "R_ARM_THM_JUMP19", /* name */ | |
815 | FALSE, /* partial_inplace */ | |
816 | 0x043f2fff, /* src_mask */ | |
817 | 0x043f2fff, /* dst_mask */ | |
818 | TRUE), /* pcrel_offset */ | |
819 | ||
820 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
821 | 1, /* rightshift */ | |
822 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
823 | 6, /* bitsize */ | |
824 | TRUE, /* pc_relative */ | |
825 | 0, /* bitpos */ | |
826 | complain_overflow_unsigned,/* complain_on_overflow */ | |
827 | bfd_elf_generic_reloc, /* special_function */ | |
828 | "R_ARM_THM_JUMP6", /* name */ | |
829 | FALSE, /* partial_inplace */ | |
830 | 0x02f8, /* src_mask */ | |
831 | 0x02f8, /* dst_mask */ | |
832 | TRUE), /* pcrel_offset */ | |
833 | ||
834 | /* These are declared as 13-bit signed relocations because we can | |
835 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
836 | versa. */ | |
837 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
838 | 0, /* rightshift */ | |
839 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
840 | 13, /* bitsize */ | |
841 | TRUE, /* pc_relative */ | |
842 | 0, /* bitpos */ | |
2cab6cc3 | 843 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
844 | bfd_elf_generic_reloc, /* special_function */ |
845 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
846 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
847 | 0xffffffff, /* src_mask */ |
848 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
849 | TRUE), /* pcrel_offset */ |
850 | ||
851 | HOWTO (R_ARM_THM_PC12, /* type */ | |
852 | 0, /* rightshift */ | |
853 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
854 | 13, /* bitsize */ | |
855 | TRUE, /* pc_relative */ | |
856 | 0, /* bitpos */ | |
2cab6cc3 | 857 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
858 | bfd_elf_generic_reloc, /* special_function */ |
859 | "R_ARM_THM_PC12", /* name */ | |
860 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
861 | 0xffffffff, /* src_mask */ |
862 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
863 | TRUE), /* pcrel_offset */ |
864 | ||
865 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
866 | 0, /* rightshift */ | |
867 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
868 | 32, /* bitsize */ | |
869 | FALSE, /* pc_relative */ | |
870 | 0, /* bitpos */ | |
871 | complain_overflow_dont,/* complain_on_overflow */ | |
872 | bfd_elf_generic_reloc, /* special_function */ | |
873 | "R_ARM_ABS32_NOI", /* name */ | |
874 | FALSE, /* partial_inplace */ | |
875 | 0xffffffff, /* src_mask */ | |
876 | 0xffffffff, /* dst_mask */ | |
877 | FALSE), /* pcrel_offset */ | |
878 | ||
879 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
880 | 0, /* rightshift */ | |
881 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
882 | 32, /* bitsize */ | |
883 | TRUE, /* pc_relative */ | |
884 | 0, /* bitpos */ | |
885 | complain_overflow_dont,/* complain_on_overflow */ | |
886 | bfd_elf_generic_reloc, /* special_function */ | |
887 | "R_ARM_REL32_NOI", /* name */ | |
888 | FALSE, /* partial_inplace */ | |
889 | 0xffffffff, /* src_mask */ | |
890 | 0xffffffff, /* dst_mask */ | |
891 | FALSE), /* pcrel_offset */ | |
7f266840 | 892 | |
4962c51a MS |
893 | /* Group relocations. */ |
894 | ||
895 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
896 | 0, /* rightshift */ | |
897 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
898 | 32, /* bitsize */ | |
899 | TRUE, /* pc_relative */ | |
900 | 0, /* bitpos */ | |
901 | complain_overflow_dont,/* complain_on_overflow */ | |
902 | bfd_elf_generic_reloc, /* special_function */ | |
903 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
904 | FALSE, /* partial_inplace */ | |
905 | 0xffffffff, /* src_mask */ | |
906 | 0xffffffff, /* dst_mask */ | |
907 | TRUE), /* pcrel_offset */ | |
908 | ||
07d6d2b8 | 909 | HOWTO (R_ARM_ALU_PC_G0, /* type */ |
4962c51a MS |
910 | 0, /* rightshift */ |
911 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
912 | 32, /* bitsize */ | |
913 | TRUE, /* pc_relative */ | |
914 | 0, /* bitpos */ | |
915 | complain_overflow_dont,/* complain_on_overflow */ | |
916 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 917 | "R_ARM_ALU_PC_G0", /* name */ |
4962c51a MS |
918 | FALSE, /* partial_inplace */ |
919 | 0xffffffff, /* src_mask */ | |
920 | 0xffffffff, /* dst_mask */ | |
921 | TRUE), /* pcrel_offset */ | |
922 | ||
923 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
924 | 0, /* rightshift */ | |
925 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
926 | 32, /* bitsize */ | |
927 | TRUE, /* pc_relative */ | |
928 | 0, /* bitpos */ | |
929 | complain_overflow_dont,/* complain_on_overflow */ | |
930 | bfd_elf_generic_reloc, /* special_function */ | |
931 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
932 | FALSE, /* partial_inplace */ | |
933 | 0xffffffff, /* src_mask */ | |
934 | 0xffffffff, /* dst_mask */ | |
935 | TRUE), /* pcrel_offset */ | |
936 | ||
07d6d2b8 | 937 | HOWTO (R_ARM_ALU_PC_G1, /* type */ |
4962c51a MS |
938 | 0, /* rightshift */ |
939 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
940 | 32, /* bitsize */ | |
941 | TRUE, /* pc_relative */ | |
942 | 0, /* bitpos */ | |
943 | complain_overflow_dont,/* complain_on_overflow */ | |
944 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 945 | "R_ARM_ALU_PC_G1", /* name */ |
4962c51a MS |
946 | FALSE, /* partial_inplace */ |
947 | 0xffffffff, /* src_mask */ | |
948 | 0xffffffff, /* dst_mask */ | |
949 | TRUE), /* pcrel_offset */ | |
950 | ||
07d6d2b8 | 951 | HOWTO (R_ARM_ALU_PC_G2, /* type */ |
4962c51a MS |
952 | 0, /* rightshift */ |
953 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
954 | 32, /* bitsize */ | |
955 | TRUE, /* pc_relative */ | |
956 | 0, /* bitpos */ | |
957 | complain_overflow_dont,/* complain_on_overflow */ | |
958 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 959 | "R_ARM_ALU_PC_G2", /* name */ |
4962c51a MS |
960 | FALSE, /* partial_inplace */ |
961 | 0xffffffff, /* src_mask */ | |
962 | 0xffffffff, /* dst_mask */ | |
963 | TRUE), /* pcrel_offset */ | |
964 | ||
07d6d2b8 | 965 | HOWTO (R_ARM_LDR_PC_G1, /* type */ |
4962c51a MS |
966 | 0, /* rightshift */ |
967 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
968 | 32, /* bitsize */ | |
969 | TRUE, /* pc_relative */ | |
970 | 0, /* bitpos */ | |
971 | complain_overflow_dont,/* complain_on_overflow */ | |
972 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 973 | "R_ARM_LDR_PC_G1", /* name */ |
4962c51a MS |
974 | FALSE, /* partial_inplace */ |
975 | 0xffffffff, /* src_mask */ | |
976 | 0xffffffff, /* dst_mask */ | |
977 | TRUE), /* pcrel_offset */ | |
978 | ||
07d6d2b8 | 979 | HOWTO (R_ARM_LDR_PC_G2, /* type */ |
4962c51a MS |
980 | 0, /* rightshift */ |
981 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
982 | 32, /* bitsize */ | |
983 | TRUE, /* pc_relative */ | |
984 | 0, /* bitpos */ | |
985 | complain_overflow_dont,/* complain_on_overflow */ | |
986 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 987 | "R_ARM_LDR_PC_G2", /* name */ |
4962c51a MS |
988 | FALSE, /* partial_inplace */ |
989 | 0xffffffff, /* src_mask */ | |
990 | 0xffffffff, /* dst_mask */ | |
991 | TRUE), /* pcrel_offset */ | |
992 | ||
07d6d2b8 | 993 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ |
4962c51a MS |
994 | 0, /* rightshift */ |
995 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
996 | 32, /* bitsize */ | |
997 | TRUE, /* pc_relative */ | |
998 | 0, /* bitpos */ | |
999 | complain_overflow_dont,/* complain_on_overflow */ | |
1000 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1001 | "R_ARM_LDRS_PC_G0", /* name */ |
4962c51a MS |
1002 | FALSE, /* partial_inplace */ |
1003 | 0xffffffff, /* src_mask */ | |
1004 | 0xffffffff, /* dst_mask */ | |
1005 | TRUE), /* pcrel_offset */ | |
1006 | ||
07d6d2b8 | 1007 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ |
4962c51a MS |
1008 | 0, /* rightshift */ |
1009 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1010 | 32, /* bitsize */ | |
1011 | TRUE, /* pc_relative */ | |
1012 | 0, /* bitpos */ | |
1013 | complain_overflow_dont,/* complain_on_overflow */ | |
1014 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1015 | "R_ARM_LDRS_PC_G1", /* name */ |
4962c51a MS |
1016 | FALSE, /* partial_inplace */ |
1017 | 0xffffffff, /* src_mask */ | |
1018 | 0xffffffff, /* dst_mask */ | |
1019 | TRUE), /* pcrel_offset */ | |
1020 | ||
07d6d2b8 | 1021 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ |
4962c51a MS |
1022 | 0, /* rightshift */ |
1023 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1024 | 32, /* bitsize */ | |
1025 | TRUE, /* pc_relative */ | |
1026 | 0, /* bitpos */ | |
1027 | complain_overflow_dont,/* complain_on_overflow */ | |
1028 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1029 | "R_ARM_LDRS_PC_G2", /* name */ |
4962c51a MS |
1030 | FALSE, /* partial_inplace */ |
1031 | 0xffffffff, /* src_mask */ | |
1032 | 0xffffffff, /* dst_mask */ | |
1033 | TRUE), /* pcrel_offset */ | |
1034 | ||
07d6d2b8 | 1035 | HOWTO (R_ARM_LDC_PC_G0, /* type */ |
4962c51a MS |
1036 | 0, /* rightshift */ |
1037 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1038 | 32, /* bitsize */ | |
1039 | TRUE, /* pc_relative */ | |
1040 | 0, /* bitpos */ | |
1041 | complain_overflow_dont,/* complain_on_overflow */ | |
1042 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1043 | "R_ARM_LDC_PC_G0", /* name */ |
4962c51a MS |
1044 | FALSE, /* partial_inplace */ |
1045 | 0xffffffff, /* src_mask */ | |
1046 | 0xffffffff, /* dst_mask */ | |
1047 | TRUE), /* pcrel_offset */ | |
1048 | ||
07d6d2b8 | 1049 | HOWTO (R_ARM_LDC_PC_G1, /* type */ |
4962c51a MS |
1050 | 0, /* rightshift */ |
1051 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1052 | 32, /* bitsize */ | |
1053 | TRUE, /* pc_relative */ | |
1054 | 0, /* bitpos */ | |
1055 | complain_overflow_dont,/* complain_on_overflow */ | |
1056 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1057 | "R_ARM_LDC_PC_G1", /* name */ |
4962c51a MS |
1058 | FALSE, /* partial_inplace */ |
1059 | 0xffffffff, /* src_mask */ | |
1060 | 0xffffffff, /* dst_mask */ | |
1061 | TRUE), /* pcrel_offset */ | |
1062 | ||
07d6d2b8 | 1063 | HOWTO (R_ARM_LDC_PC_G2, /* type */ |
4962c51a MS |
1064 | 0, /* rightshift */ |
1065 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1066 | 32, /* bitsize */ | |
1067 | TRUE, /* pc_relative */ | |
1068 | 0, /* bitpos */ | |
1069 | complain_overflow_dont,/* complain_on_overflow */ | |
1070 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1071 | "R_ARM_LDC_PC_G2", /* name */ |
4962c51a MS |
1072 | FALSE, /* partial_inplace */ |
1073 | 0xffffffff, /* src_mask */ | |
1074 | 0xffffffff, /* dst_mask */ | |
1075 | TRUE), /* pcrel_offset */ | |
1076 | ||
07d6d2b8 | 1077 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ |
4962c51a MS |
1078 | 0, /* rightshift */ |
1079 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1080 | 32, /* bitsize */ | |
1081 | TRUE, /* pc_relative */ | |
1082 | 0, /* bitpos */ | |
1083 | complain_overflow_dont,/* complain_on_overflow */ | |
1084 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1085 | "R_ARM_ALU_SB_G0_NC", /* name */ |
4962c51a MS |
1086 | FALSE, /* partial_inplace */ |
1087 | 0xffffffff, /* src_mask */ | |
1088 | 0xffffffff, /* dst_mask */ | |
1089 | TRUE), /* pcrel_offset */ | |
1090 | ||
07d6d2b8 | 1091 | HOWTO (R_ARM_ALU_SB_G0, /* type */ |
4962c51a MS |
1092 | 0, /* rightshift */ |
1093 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1094 | 32, /* bitsize */ | |
1095 | TRUE, /* pc_relative */ | |
1096 | 0, /* bitpos */ | |
1097 | complain_overflow_dont,/* complain_on_overflow */ | |
1098 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1099 | "R_ARM_ALU_SB_G0", /* name */ |
4962c51a MS |
1100 | FALSE, /* partial_inplace */ |
1101 | 0xffffffff, /* src_mask */ | |
1102 | 0xffffffff, /* dst_mask */ | |
1103 | TRUE), /* pcrel_offset */ | |
1104 | ||
07d6d2b8 | 1105 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ |
4962c51a MS |
1106 | 0, /* rightshift */ |
1107 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1108 | 32, /* bitsize */ | |
1109 | TRUE, /* pc_relative */ | |
1110 | 0, /* bitpos */ | |
1111 | complain_overflow_dont,/* complain_on_overflow */ | |
1112 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1113 | "R_ARM_ALU_SB_G1_NC", /* name */ |
4962c51a MS |
1114 | FALSE, /* partial_inplace */ |
1115 | 0xffffffff, /* src_mask */ | |
1116 | 0xffffffff, /* dst_mask */ | |
1117 | TRUE), /* pcrel_offset */ | |
1118 | ||
07d6d2b8 | 1119 | HOWTO (R_ARM_ALU_SB_G1, /* type */ |
4962c51a MS |
1120 | 0, /* rightshift */ |
1121 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1122 | 32, /* bitsize */ | |
1123 | TRUE, /* pc_relative */ | |
1124 | 0, /* bitpos */ | |
1125 | complain_overflow_dont,/* complain_on_overflow */ | |
1126 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1127 | "R_ARM_ALU_SB_G1", /* name */ |
4962c51a MS |
1128 | FALSE, /* partial_inplace */ |
1129 | 0xffffffff, /* src_mask */ | |
1130 | 0xffffffff, /* dst_mask */ | |
1131 | TRUE), /* pcrel_offset */ | |
1132 | ||
07d6d2b8 | 1133 | HOWTO (R_ARM_ALU_SB_G2, /* type */ |
4962c51a MS |
1134 | 0, /* rightshift */ |
1135 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1136 | 32, /* bitsize */ | |
1137 | TRUE, /* pc_relative */ | |
1138 | 0, /* bitpos */ | |
1139 | complain_overflow_dont,/* complain_on_overflow */ | |
1140 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1141 | "R_ARM_ALU_SB_G2", /* name */ |
4962c51a MS |
1142 | FALSE, /* partial_inplace */ |
1143 | 0xffffffff, /* src_mask */ | |
1144 | 0xffffffff, /* dst_mask */ | |
1145 | TRUE), /* pcrel_offset */ | |
1146 | ||
07d6d2b8 | 1147 | HOWTO (R_ARM_LDR_SB_G0, /* type */ |
4962c51a MS |
1148 | 0, /* rightshift */ |
1149 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1150 | 32, /* bitsize */ | |
1151 | TRUE, /* pc_relative */ | |
1152 | 0, /* bitpos */ | |
1153 | complain_overflow_dont,/* complain_on_overflow */ | |
1154 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1155 | "R_ARM_LDR_SB_G0", /* name */ |
4962c51a MS |
1156 | FALSE, /* partial_inplace */ |
1157 | 0xffffffff, /* src_mask */ | |
1158 | 0xffffffff, /* dst_mask */ | |
1159 | TRUE), /* pcrel_offset */ | |
1160 | ||
07d6d2b8 | 1161 | HOWTO (R_ARM_LDR_SB_G1, /* type */ |
4962c51a MS |
1162 | 0, /* rightshift */ |
1163 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1164 | 32, /* bitsize */ | |
1165 | TRUE, /* pc_relative */ | |
1166 | 0, /* bitpos */ | |
1167 | complain_overflow_dont,/* complain_on_overflow */ | |
1168 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1169 | "R_ARM_LDR_SB_G1", /* name */ |
4962c51a MS |
1170 | FALSE, /* partial_inplace */ |
1171 | 0xffffffff, /* src_mask */ | |
1172 | 0xffffffff, /* dst_mask */ | |
1173 | TRUE), /* pcrel_offset */ | |
1174 | ||
07d6d2b8 | 1175 | HOWTO (R_ARM_LDR_SB_G2, /* type */ |
4962c51a MS |
1176 | 0, /* rightshift */ |
1177 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1178 | 32, /* bitsize */ | |
1179 | TRUE, /* pc_relative */ | |
1180 | 0, /* bitpos */ | |
1181 | complain_overflow_dont,/* complain_on_overflow */ | |
1182 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1183 | "R_ARM_LDR_SB_G2", /* name */ |
4962c51a MS |
1184 | FALSE, /* partial_inplace */ |
1185 | 0xffffffff, /* src_mask */ | |
1186 | 0xffffffff, /* dst_mask */ | |
1187 | TRUE), /* pcrel_offset */ | |
1188 | ||
07d6d2b8 | 1189 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ |
4962c51a MS |
1190 | 0, /* rightshift */ |
1191 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1192 | 32, /* bitsize */ | |
1193 | TRUE, /* pc_relative */ | |
1194 | 0, /* bitpos */ | |
1195 | complain_overflow_dont,/* complain_on_overflow */ | |
1196 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1197 | "R_ARM_LDRS_SB_G0", /* name */ |
4962c51a MS |
1198 | FALSE, /* partial_inplace */ |
1199 | 0xffffffff, /* src_mask */ | |
1200 | 0xffffffff, /* dst_mask */ | |
1201 | TRUE), /* pcrel_offset */ | |
1202 | ||
07d6d2b8 | 1203 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ |
4962c51a MS |
1204 | 0, /* rightshift */ |
1205 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1206 | 32, /* bitsize */ | |
1207 | TRUE, /* pc_relative */ | |
1208 | 0, /* bitpos */ | |
1209 | complain_overflow_dont,/* complain_on_overflow */ | |
1210 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1211 | "R_ARM_LDRS_SB_G1", /* name */ |
4962c51a MS |
1212 | FALSE, /* partial_inplace */ |
1213 | 0xffffffff, /* src_mask */ | |
1214 | 0xffffffff, /* dst_mask */ | |
1215 | TRUE), /* pcrel_offset */ | |
1216 | ||
07d6d2b8 | 1217 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ |
4962c51a MS |
1218 | 0, /* rightshift */ |
1219 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1220 | 32, /* bitsize */ | |
1221 | TRUE, /* pc_relative */ | |
1222 | 0, /* bitpos */ | |
1223 | complain_overflow_dont,/* complain_on_overflow */ | |
1224 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1225 | "R_ARM_LDRS_SB_G2", /* name */ |
4962c51a MS |
1226 | FALSE, /* partial_inplace */ |
1227 | 0xffffffff, /* src_mask */ | |
1228 | 0xffffffff, /* dst_mask */ | |
1229 | TRUE), /* pcrel_offset */ | |
1230 | ||
07d6d2b8 | 1231 | HOWTO (R_ARM_LDC_SB_G0, /* type */ |
4962c51a MS |
1232 | 0, /* rightshift */ |
1233 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1234 | 32, /* bitsize */ | |
1235 | TRUE, /* pc_relative */ | |
1236 | 0, /* bitpos */ | |
1237 | complain_overflow_dont,/* complain_on_overflow */ | |
1238 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1239 | "R_ARM_LDC_SB_G0", /* name */ |
4962c51a MS |
1240 | FALSE, /* partial_inplace */ |
1241 | 0xffffffff, /* src_mask */ | |
1242 | 0xffffffff, /* dst_mask */ | |
1243 | TRUE), /* pcrel_offset */ | |
1244 | ||
07d6d2b8 | 1245 | HOWTO (R_ARM_LDC_SB_G1, /* type */ |
4962c51a MS |
1246 | 0, /* rightshift */ |
1247 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1248 | 32, /* bitsize */ | |
1249 | TRUE, /* pc_relative */ | |
1250 | 0, /* bitpos */ | |
1251 | complain_overflow_dont,/* complain_on_overflow */ | |
1252 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1253 | "R_ARM_LDC_SB_G1", /* name */ |
4962c51a MS |
1254 | FALSE, /* partial_inplace */ |
1255 | 0xffffffff, /* src_mask */ | |
1256 | 0xffffffff, /* dst_mask */ | |
1257 | TRUE), /* pcrel_offset */ | |
1258 | ||
07d6d2b8 | 1259 | HOWTO (R_ARM_LDC_SB_G2, /* type */ |
4962c51a MS |
1260 | 0, /* rightshift */ |
1261 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1262 | 32, /* bitsize */ | |
1263 | TRUE, /* pc_relative */ | |
1264 | 0, /* bitpos */ | |
1265 | complain_overflow_dont,/* complain_on_overflow */ | |
1266 | bfd_elf_generic_reloc, /* special_function */ | |
07d6d2b8 | 1267 | "R_ARM_LDC_SB_G2", /* name */ |
4962c51a MS |
1268 | FALSE, /* partial_inplace */ |
1269 | 0xffffffff, /* src_mask */ | |
1270 | 0xffffffff, /* dst_mask */ | |
1271 | TRUE), /* pcrel_offset */ | |
1272 | ||
1273 | /* End of group relocations. */ | |
c19d1205 | 1274 | |
c19d1205 ZW |
1275 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1276 | 0, /* rightshift */ | |
1277 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1278 | 16, /* bitsize */ | |
1279 | FALSE, /* pc_relative */ | |
1280 | 0, /* bitpos */ | |
1281 | complain_overflow_dont,/* complain_on_overflow */ | |
1282 | bfd_elf_generic_reloc, /* special_function */ | |
1283 | "R_ARM_MOVW_BREL_NC", /* name */ | |
1284 | FALSE, /* partial_inplace */ | |
1285 | 0x0000ffff, /* src_mask */ | |
1286 | 0x0000ffff, /* dst_mask */ | |
1287 | FALSE), /* pcrel_offset */ | |
1288 | ||
1289 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1290 | 0, /* rightshift */ | |
1291 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1292 | 16, /* bitsize */ | |
1293 | FALSE, /* pc_relative */ | |
1294 | 0, /* bitpos */ | |
1295 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1296 | bfd_elf_generic_reloc, /* special_function */ | |
1297 | "R_ARM_MOVT_BREL", /* name */ | |
1298 | FALSE, /* partial_inplace */ | |
1299 | 0x0000ffff, /* src_mask */ | |
1300 | 0x0000ffff, /* dst_mask */ | |
1301 | FALSE), /* pcrel_offset */ | |
1302 | ||
1303 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1304 | 0, /* rightshift */ | |
1305 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1306 | 16, /* bitsize */ | |
1307 | FALSE, /* pc_relative */ | |
1308 | 0, /* bitpos */ | |
1309 | complain_overflow_dont,/* complain_on_overflow */ | |
1310 | bfd_elf_generic_reloc, /* special_function */ | |
1311 | "R_ARM_MOVW_BREL", /* name */ | |
1312 | FALSE, /* partial_inplace */ | |
1313 | 0x0000ffff, /* src_mask */ | |
1314 | 0x0000ffff, /* dst_mask */ | |
1315 | FALSE), /* pcrel_offset */ | |
1316 | ||
1317 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1318 | 0, /* rightshift */ | |
1319 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1320 | 16, /* bitsize */ | |
1321 | FALSE, /* pc_relative */ | |
1322 | 0, /* bitpos */ | |
1323 | complain_overflow_dont,/* complain_on_overflow */ | |
1324 | bfd_elf_generic_reloc, /* special_function */ | |
1325 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
1326 | FALSE, /* partial_inplace */ | |
1327 | 0x040f70ff, /* src_mask */ | |
1328 | 0x040f70ff, /* dst_mask */ | |
1329 | FALSE), /* pcrel_offset */ | |
1330 | ||
1331 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1332 | 0, /* rightshift */ | |
1333 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1334 | 16, /* bitsize */ | |
1335 | FALSE, /* pc_relative */ | |
1336 | 0, /* bitpos */ | |
1337 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1338 | bfd_elf_generic_reloc, /* special_function */ | |
1339 | "R_ARM_THM_MOVT_BREL", /* name */ | |
1340 | FALSE, /* partial_inplace */ | |
1341 | 0x040f70ff, /* src_mask */ | |
1342 | 0x040f70ff, /* dst_mask */ | |
1343 | FALSE), /* pcrel_offset */ | |
1344 | ||
1345 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1346 | 0, /* rightshift */ | |
1347 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1348 | 16, /* bitsize */ | |
1349 | FALSE, /* pc_relative */ | |
1350 | 0, /* bitpos */ | |
1351 | complain_overflow_dont,/* complain_on_overflow */ | |
1352 | bfd_elf_generic_reloc, /* special_function */ | |
1353 | "R_ARM_THM_MOVW_BREL", /* name */ | |
1354 | FALSE, /* partial_inplace */ | |
1355 | 0x040f70ff, /* src_mask */ | |
1356 | 0x040f70ff, /* dst_mask */ | |
1357 | FALSE), /* pcrel_offset */ | |
1358 | ||
0855e32b NS |
1359 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
1360 | 0, /* rightshift */ | |
1361 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1362 | 32, /* bitsize */ | |
1363 | FALSE, /* pc_relative */ | |
1364 | 0, /* bitpos */ | |
1365 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1366 | NULL, /* special_function */ | |
1367 | "R_ARM_TLS_GOTDESC", /* name */ | |
1368 | TRUE, /* partial_inplace */ | |
1369 | 0xffffffff, /* src_mask */ | |
1370 | 0xffffffff, /* dst_mask */ | |
1371 | FALSE), /* pcrel_offset */ | |
1372 | ||
1373 | HOWTO (R_ARM_TLS_CALL, /* type */ | |
1374 | 0, /* rightshift */ | |
1375 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1376 | 24, /* bitsize */ | |
1377 | FALSE, /* pc_relative */ | |
1378 | 0, /* bitpos */ | |
1379 | complain_overflow_dont,/* complain_on_overflow */ | |
1380 | bfd_elf_generic_reloc, /* special_function */ | |
1381 | "R_ARM_TLS_CALL", /* name */ | |
1382 | FALSE, /* partial_inplace */ | |
1383 | 0x00ffffff, /* src_mask */ | |
1384 | 0x00ffffff, /* dst_mask */ | |
1385 | FALSE), /* pcrel_offset */ | |
1386 | ||
1387 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ | |
1388 | 0, /* rightshift */ | |
1389 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1390 | 0, /* bitsize */ | |
1391 | FALSE, /* pc_relative */ | |
1392 | 0, /* bitpos */ | |
1393 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1394 | bfd_elf_generic_reloc, /* special_function */ | |
1395 | "R_ARM_TLS_DESCSEQ", /* name */ | |
1396 | FALSE, /* partial_inplace */ | |
1397 | 0x00000000, /* src_mask */ | |
1398 | 0x00000000, /* dst_mask */ | |
1399 | FALSE), /* pcrel_offset */ | |
1400 | ||
1401 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ | |
1402 | 0, /* rightshift */ | |
1403 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1404 | 24, /* bitsize */ | |
1405 | FALSE, /* pc_relative */ | |
1406 | 0, /* bitpos */ | |
1407 | complain_overflow_dont,/* complain_on_overflow */ | |
1408 | bfd_elf_generic_reloc, /* special_function */ | |
1409 | "R_ARM_THM_TLS_CALL", /* name */ | |
1410 | FALSE, /* partial_inplace */ | |
1411 | 0x07ff07ff, /* src_mask */ | |
1412 | 0x07ff07ff, /* dst_mask */ | |
1413 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1414 | |
1415 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1416 | 0, /* rightshift */ | |
1417 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1418 | 32, /* bitsize */ | |
1419 | FALSE, /* pc_relative */ | |
1420 | 0, /* bitpos */ | |
1421 | complain_overflow_dont,/* complain_on_overflow */ | |
1422 | bfd_elf_generic_reloc, /* special_function */ | |
1423 | "R_ARM_PLT32_ABS", /* name */ | |
1424 | FALSE, /* partial_inplace */ | |
1425 | 0xffffffff, /* src_mask */ | |
1426 | 0xffffffff, /* dst_mask */ | |
1427 | FALSE), /* pcrel_offset */ | |
1428 | ||
1429 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1430 | 0, /* rightshift */ | |
1431 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1432 | 32, /* bitsize */ | |
1433 | FALSE, /* pc_relative */ | |
1434 | 0, /* bitpos */ | |
1435 | complain_overflow_dont,/* complain_on_overflow */ | |
1436 | bfd_elf_generic_reloc, /* special_function */ | |
1437 | "R_ARM_GOT_ABS", /* name */ | |
1438 | FALSE, /* partial_inplace */ | |
1439 | 0xffffffff, /* src_mask */ | |
1440 | 0xffffffff, /* dst_mask */ | |
1441 | FALSE), /* pcrel_offset */ | |
1442 | ||
1443 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1444 | 0, /* rightshift */ | |
1445 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1446 | 32, /* bitsize */ | |
1447 | TRUE, /* pc_relative */ | |
1448 | 0, /* bitpos */ | |
1449 | complain_overflow_dont, /* complain_on_overflow */ | |
1450 | bfd_elf_generic_reloc, /* special_function */ | |
1451 | "R_ARM_GOT_PREL", /* name */ | |
1452 | FALSE, /* partial_inplace */ | |
1453 | 0xffffffff, /* src_mask */ | |
1454 | 0xffffffff, /* dst_mask */ | |
1455 | TRUE), /* pcrel_offset */ | |
1456 | ||
1457 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1458 | 0, /* rightshift */ | |
1459 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1460 | 12, /* bitsize */ | |
1461 | FALSE, /* pc_relative */ | |
1462 | 0, /* bitpos */ | |
1463 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1464 | bfd_elf_generic_reloc, /* special_function */ | |
1465 | "R_ARM_GOT_BREL12", /* name */ | |
1466 | FALSE, /* partial_inplace */ | |
1467 | 0x00000fff, /* src_mask */ | |
1468 | 0x00000fff, /* dst_mask */ | |
1469 | FALSE), /* pcrel_offset */ | |
1470 | ||
1471 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1472 | 0, /* rightshift */ | |
1473 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1474 | 12, /* bitsize */ | |
1475 | FALSE, /* pc_relative */ | |
1476 | 0, /* bitpos */ | |
1477 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1478 | bfd_elf_generic_reloc, /* special_function */ | |
1479 | "R_ARM_GOTOFF12", /* name */ | |
1480 | FALSE, /* partial_inplace */ | |
1481 | 0x00000fff, /* src_mask */ | |
1482 | 0x00000fff, /* dst_mask */ | |
1483 | FALSE), /* pcrel_offset */ | |
1484 | ||
07d6d2b8 | 1485 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ |
c19d1205 ZW |
1486 | |
1487 | /* GNU extension to record C++ vtable member usage */ | |
07d6d2b8 AM |
1488 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ |
1489 | 0, /* rightshift */ | |
1490 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1491 | 0, /* bitsize */ | |
1492 | FALSE, /* pc_relative */ | |
1493 | 0, /* bitpos */ | |
99059e56 | 1494 | complain_overflow_dont, /* complain_on_overflow */ |
07d6d2b8 AM |
1495 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ |
1496 | "R_ARM_GNU_VTENTRY", /* name */ | |
1497 | FALSE, /* partial_inplace */ | |
1498 | 0, /* src_mask */ | |
1499 | 0, /* dst_mask */ | |
1500 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1501 | |
1502 | /* GNU extension to record C++ vtable hierarchy */ | |
1503 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
07d6d2b8 AM |
1504 | 0, /* rightshift */ |
1505 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1506 | 0, /* bitsize */ | |
1507 | FALSE, /* pc_relative */ | |
1508 | 0, /* bitpos */ | |
99059e56 | 1509 | complain_overflow_dont, /* complain_on_overflow */ |
07d6d2b8 | 1510 | NULL, /* special_function */ |
99059e56 | 1511 | "R_ARM_GNU_VTINHERIT", /* name */ |
07d6d2b8 AM |
1512 | FALSE, /* partial_inplace */ |
1513 | 0, /* src_mask */ | |
1514 | 0, /* dst_mask */ | |
1515 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1516 | |
1517 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1518 | 1, /* rightshift */ | |
1519 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1520 | 11, /* bitsize */ | |
1521 | TRUE, /* pc_relative */ | |
1522 | 0, /* bitpos */ | |
1523 | complain_overflow_signed, /* complain_on_overflow */ | |
1524 | bfd_elf_generic_reloc, /* special_function */ | |
1525 | "R_ARM_THM_JUMP11", /* name */ | |
1526 | FALSE, /* partial_inplace */ | |
1527 | 0x000007ff, /* src_mask */ | |
1528 | 0x000007ff, /* dst_mask */ | |
1529 | TRUE), /* pcrel_offset */ | |
1530 | ||
1531 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1532 | 1, /* rightshift */ | |
1533 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1534 | 8, /* bitsize */ | |
1535 | TRUE, /* pc_relative */ | |
1536 | 0, /* bitpos */ | |
1537 | complain_overflow_signed, /* complain_on_overflow */ | |
1538 | bfd_elf_generic_reloc, /* special_function */ | |
1539 | "R_ARM_THM_JUMP8", /* name */ | |
1540 | FALSE, /* partial_inplace */ | |
1541 | 0x000000ff, /* src_mask */ | |
1542 | 0x000000ff, /* dst_mask */ | |
1543 | TRUE), /* pcrel_offset */ | |
ba93b8ac | 1544 | |
c19d1205 ZW |
1545 | /* TLS relocations */ |
1546 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
07d6d2b8 AM |
1547 | 0, /* rightshift */ |
1548 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1549 | 32, /* bitsize */ | |
1550 | FALSE, /* pc_relative */ | |
1551 | 0, /* bitpos */ | |
99059e56 RM |
1552 | complain_overflow_bitfield,/* complain_on_overflow */ |
1553 | NULL, /* special_function */ | |
1554 | "R_ARM_TLS_GD32", /* name */ | |
1555 | TRUE, /* partial_inplace */ | |
1556 | 0xffffffff, /* src_mask */ | |
1557 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 1558 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1559 | |
ba93b8ac | 1560 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
07d6d2b8 AM |
1561 | 0, /* rightshift */ |
1562 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1563 | 32, /* bitsize */ | |
1564 | FALSE, /* pc_relative */ | |
1565 | 0, /* bitpos */ | |
99059e56 RM |
1566 | complain_overflow_bitfield,/* complain_on_overflow */ |
1567 | bfd_elf_generic_reloc, /* special_function */ | |
1568 | "R_ARM_TLS_LDM32", /* name */ | |
1569 | TRUE, /* partial_inplace */ | |
1570 | 0xffffffff, /* src_mask */ | |
1571 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 1572 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1573 | |
c19d1205 | 1574 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
07d6d2b8 AM |
1575 | 0, /* rightshift */ |
1576 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1577 | 32, /* bitsize */ | |
1578 | FALSE, /* pc_relative */ | |
1579 | 0, /* bitpos */ | |
99059e56 RM |
1580 | complain_overflow_bitfield,/* complain_on_overflow */ |
1581 | bfd_elf_generic_reloc, /* special_function */ | |
1582 | "R_ARM_TLS_LDO32", /* name */ | |
1583 | TRUE, /* partial_inplace */ | |
1584 | 0xffffffff, /* src_mask */ | |
1585 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 1586 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1587 | |
ba93b8ac | 1588 | HOWTO (R_ARM_TLS_IE32, /* type */ |
07d6d2b8 AM |
1589 | 0, /* rightshift */ |
1590 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1591 | 32, /* bitsize */ | |
1592 | FALSE, /* pc_relative */ | |
1593 | 0, /* bitpos */ | |
99059e56 RM |
1594 | complain_overflow_bitfield,/* complain_on_overflow */ |
1595 | NULL, /* special_function */ | |
1596 | "R_ARM_TLS_IE32", /* name */ | |
1597 | TRUE, /* partial_inplace */ | |
1598 | 0xffffffff, /* src_mask */ | |
1599 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 1600 | FALSE), /* pcrel_offset */ |
7f266840 | 1601 | |
c19d1205 | 1602 | HOWTO (R_ARM_TLS_LE32, /* type */ |
07d6d2b8 AM |
1603 | 0, /* rightshift */ |
1604 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1605 | 32, /* bitsize */ | |
1606 | FALSE, /* pc_relative */ | |
1607 | 0, /* bitpos */ | |
99059e56 | 1608 | complain_overflow_bitfield,/* complain_on_overflow */ |
07d6d2b8 | 1609 | NULL, /* special_function */ |
99059e56 RM |
1610 | "R_ARM_TLS_LE32", /* name */ |
1611 | TRUE, /* partial_inplace */ | |
1612 | 0xffffffff, /* src_mask */ | |
1613 | 0xffffffff, /* dst_mask */ | |
07d6d2b8 | 1614 | FALSE), /* pcrel_offset */ |
7f266840 | 1615 | |
c19d1205 ZW |
1616 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1617 | 0, /* rightshift */ | |
1618 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1619 | 12, /* bitsize */ | |
1620 | FALSE, /* pc_relative */ | |
7f266840 | 1621 | 0, /* bitpos */ |
c19d1205 | 1622 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1623 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1624 | "R_ARM_TLS_LDO12", /* name */ |
7f266840 | 1625 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1626 | 0x00000fff, /* src_mask */ |
1627 | 0x00000fff, /* dst_mask */ | |
1628 | FALSE), /* pcrel_offset */ | |
7f266840 | 1629 | |
c19d1205 ZW |
1630 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1631 | 0, /* rightshift */ | |
1632 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1633 | 12, /* bitsize */ | |
1634 | FALSE, /* pc_relative */ | |
7f266840 | 1635 | 0, /* bitpos */ |
c19d1205 | 1636 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1637 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1638 | "R_ARM_TLS_LE12", /* name */ |
7f266840 | 1639 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1640 | 0x00000fff, /* src_mask */ |
1641 | 0x00000fff, /* dst_mask */ | |
1642 | FALSE), /* pcrel_offset */ | |
7f266840 | 1643 | |
c19d1205 | 1644 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 DJ |
1645 | 0, /* rightshift */ |
1646 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
1647 | 12, /* bitsize */ |
1648 | FALSE, /* pc_relative */ | |
7f266840 | 1649 | 0, /* bitpos */ |
c19d1205 | 1650 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1651 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1652 | "R_ARM_TLS_IE12GP", /* name */ |
7f266840 | 1653 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1654 | 0x00000fff, /* src_mask */ |
1655 | 0x00000fff, /* dst_mask */ | |
1656 | FALSE), /* pcrel_offset */ | |
0855e32b | 1657 | |
34e77a92 | 1658 | /* 112-127 private relocations. */ |
0855e32b NS |
1659 | EMPTY_HOWTO (112), |
1660 | EMPTY_HOWTO (113), | |
1661 | EMPTY_HOWTO (114), | |
1662 | EMPTY_HOWTO (115), | |
1663 | EMPTY_HOWTO (116), | |
1664 | EMPTY_HOWTO (117), | |
1665 | EMPTY_HOWTO (118), | |
1666 | EMPTY_HOWTO (119), | |
1667 | EMPTY_HOWTO (120), | |
1668 | EMPTY_HOWTO (121), | |
1669 | EMPTY_HOWTO (122), | |
1670 | EMPTY_HOWTO (123), | |
1671 | EMPTY_HOWTO (124), | |
1672 | EMPTY_HOWTO (125), | |
1673 | EMPTY_HOWTO (126), | |
1674 | EMPTY_HOWTO (127), | |
34e77a92 RS |
1675 | |
1676 | /* R_ARM_ME_TOO, obsolete. */ | |
0855e32b NS |
1677 | EMPTY_HOWTO (128), |
1678 | ||
1679 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ | |
1680 | 0, /* rightshift */ | |
1681 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1682 | 0, /* bitsize */ | |
1683 | FALSE, /* pc_relative */ | |
1684 | 0, /* bitpos */ | |
1685 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1686 | bfd_elf_generic_reloc, /* special_function */ | |
1687 | "R_ARM_THM_TLS_DESCSEQ",/* name */ | |
1688 | FALSE, /* partial_inplace */ | |
1689 | 0x00000000, /* src_mask */ | |
1690 | 0x00000000, /* dst_mask */ | |
1691 | FALSE), /* pcrel_offset */ | |
72d98d16 MG |
1692 | EMPTY_HOWTO (130), |
1693 | EMPTY_HOWTO (131), | |
1694 | HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */ | |
1695 | 0, /* rightshift. */ | |
1696 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1697 | 16, /* bitsize. */ | |
1698 | FALSE, /* pc_relative. */ | |
1699 | 0, /* bitpos. */ | |
1700 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1701 | bfd_elf_generic_reloc, /* special_function. */ | |
1702 | "R_ARM_THM_ALU_ABS_G0_NC",/* name. */ | |
1703 | FALSE, /* partial_inplace. */ | |
1704 | 0x00000000, /* src_mask. */ | |
1705 | 0x00000000, /* dst_mask. */ | |
1706 | FALSE), /* pcrel_offset. */ | |
1707 | HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */ | |
1708 | 0, /* rightshift. */ | |
1709 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1710 | 16, /* bitsize. */ | |
1711 | FALSE, /* pc_relative. */ | |
1712 | 0, /* bitpos. */ | |
1713 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1714 | bfd_elf_generic_reloc, /* special_function. */ | |
1715 | "R_ARM_THM_ALU_ABS_G1_NC",/* name. */ | |
1716 | FALSE, /* partial_inplace. */ | |
1717 | 0x00000000, /* src_mask. */ | |
1718 | 0x00000000, /* dst_mask. */ | |
1719 | FALSE), /* pcrel_offset. */ | |
1720 | HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */ | |
1721 | 0, /* rightshift. */ | |
1722 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1723 | 16, /* bitsize. */ | |
1724 | FALSE, /* pc_relative. */ | |
1725 | 0, /* bitpos. */ | |
1726 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1727 | bfd_elf_generic_reloc, /* special_function. */ | |
1728 | "R_ARM_THM_ALU_ABS_G2_NC",/* name. */ | |
1729 | FALSE, /* partial_inplace. */ | |
1730 | 0x00000000, /* src_mask. */ | |
1731 | 0x00000000, /* dst_mask. */ | |
1732 | FALSE), /* pcrel_offset. */ | |
1733 | HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */ | |
1734 | 0, /* rightshift. */ | |
1735 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1736 | 16, /* bitsize. */ | |
1737 | FALSE, /* pc_relative. */ | |
1738 | 0, /* bitpos. */ | |
1739 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1740 | bfd_elf_generic_reloc, /* special_function. */ | |
1741 | "R_ARM_THM_ALU_ABS_G3_NC",/* name. */ | |
1742 | FALSE, /* partial_inplace. */ | |
1743 | 0x00000000, /* src_mask. */ | |
1744 | 0x00000000, /* dst_mask. */ | |
1745 | FALSE), /* pcrel_offset. */ | |
c19d1205 ZW |
1746 | }; |
1747 | ||
34e77a92 | 1748 | /* 160 onwards: */ |
5c5a4843 | 1749 | static reloc_howto_type elf32_arm_howto_table_2[8] = |
34e77a92 RS |
1750 | { |
1751 | HOWTO (R_ARM_IRELATIVE, /* type */ | |
07d6d2b8 AM |
1752 | 0, /* rightshift */ |
1753 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1754 | 32, /* bitsize */ | |
1755 | FALSE, /* pc_relative */ | |
1756 | 0, /* bitpos */ | |
99059e56 RM |
1757 | complain_overflow_bitfield,/* complain_on_overflow */ |
1758 | bfd_elf_generic_reloc, /* special_function */ | |
1759 | "R_ARM_IRELATIVE", /* name */ | |
1760 | TRUE, /* partial_inplace */ | |
1761 | 0xffffffff, /* src_mask */ | |
1762 | 0xffffffff, /* dst_mask */ | |
188fd7ae CL |
1763 | FALSE), /* pcrel_offset */ |
1764 | HOWTO (R_ARM_GOTFUNCDESC, /* type */ | |
1765 | 0, /* rightshift */ | |
1766 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1767 | 32, /* bitsize */ | |
1768 | FALSE, /* pc_relative */ | |
1769 | 0, /* bitpos */ | |
1770 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1771 | bfd_elf_generic_reloc, /* special_function */ | |
1772 | "R_ARM_GOTFUNCDESC", /* name */ | |
1773 | FALSE, /* partial_inplace */ | |
1774 | 0, /* src_mask */ | |
1775 | 0xffffffff, /* dst_mask */ | |
1776 | FALSE), /* pcrel_offset */ | |
1777 | HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */ | |
1778 | 0, /* rightshift */ | |
1779 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1780 | 32, /* bitsize */ | |
1781 | FALSE, /* pc_relative */ | |
1782 | 0, /* bitpos */ | |
1783 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1784 | bfd_elf_generic_reloc, /* special_function */ | |
1785 | "R_ARM_GOTOFFFUNCDESC",/* name */ | |
1786 | FALSE, /* partial_inplace */ | |
1787 | 0, /* src_mask */ | |
1788 | 0xffffffff, /* dst_mask */ | |
1789 | FALSE), /* pcrel_offset */ | |
1790 | HOWTO (R_ARM_FUNCDESC, /* type */ | |
1791 | 0, /* rightshift */ | |
1792 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1793 | 32, /* bitsize */ | |
1794 | FALSE, /* pc_relative */ | |
1795 | 0, /* bitpos */ | |
1796 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1797 | bfd_elf_generic_reloc, /* special_function */ | |
1798 | "R_ARM_FUNCDESC", /* name */ | |
1799 | FALSE, /* partial_inplace */ | |
1800 | 0, /* src_mask */ | |
1801 | 0xffffffff, /* dst_mask */ | |
1802 | FALSE), /* pcrel_offset */ | |
1803 | HOWTO (R_ARM_FUNCDESC_VALUE, /* type */ | |
1804 | 0, /* rightshift */ | |
1805 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1806 | 64, /* bitsize */ | |
1807 | FALSE, /* pc_relative */ | |
1808 | 0, /* bitpos */ | |
1809 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1810 | bfd_elf_generic_reloc, /* special_function */ | |
1811 | "R_ARM_FUNCDESC_VALUE",/* name */ | |
1812 | FALSE, /* partial_inplace */ | |
1813 | 0, /* src_mask */ | |
1814 | 0xffffffff, /* dst_mask */ | |
1815 | FALSE), /* pcrel_offset */ | |
5c5a4843 CL |
1816 | HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */ |
1817 | 0, /* rightshift */ | |
1818 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1819 | 32, /* bitsize */ | |
1820 | FALSE, /* pc_relative */ | |
1821 | 0, /* bitpos */ | |
1822 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1823 | bfd_elf_generic_reloc, /* special_function */ | |
1824 | "R_ARM_TLS_GD32_FDPIC",/* name */ | |
1825 | FALSE, /* partial_inplace */ | |
1826 | 0, /* src_mask */ | |
1827 | 0xffffffff, /* dst_mask */ | |
1828 | FALSE), /* pcrel_offset */ | |
1829 | HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */ | |
1830 | 0, /* rightshift */ | |
1831 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1832 | 32, /* bitsize */ | |
1833 | FALSE, /* pc_relative */ | |
1834 | 0, /* bitpos */ | |
1835 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1836 | bfd_elf_generic_reloc, /* special_function */ | |
1837 | "R_ARM_TLS_LDM32_FDPIC",/* name */ | |
1838 | FALSE, /* partial_inplace */ | |
1839 | 0, /* src_mask */ | |
1840 | 0xffffffff, /* dst_mask */ | |
1841 | FALSE), /* pcrel_offset */ | |
1842 | HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */ | |
1843 | 0, /* rightshift */ | |
1844 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1845 | 32, /* bitsize */ | |
1846 | FALSE, /* pc_relative */ | |
1847 | 0, /* bitpos */ | |
1848 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1849 | bfd_elf_generic_reloc, /* special_function */ | |
1850 | "R_ARM_TLS_IE32_FDPIC",/* name */ | |
1851 | FALSE, /* partial_inplace */ | |
1852 | 0, /* src_mask */ | |
1853 | 0xffffffff, /* dst_mask */ | |
1854 | FALSE), /* pcrel_offset */ | |
34e77a92 | 1855 | }; |
c19d1205 | 1856 | |
34e77a92 RS |
1857 | /* 249-255 extended, currently unused, relocations: */ |
1858 | static reloc_howto_type elf32_arm_howto_table_3[4] = | |
7f266840 DJ |
1859 | { |
1860 | HOWTO (R_ARM_RREL32, /* type */ | |
1861 | 0, /* rightshift */ | |
1862 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1863 | 0, /* bitsize */ | |
1864 | FALSE, /* pc_relative */ | |
1865 | 0, /* bitpos */ | |
1866 | complain_overflow_dont,/* complain_on_overflow */ | |
1867 | bfd_elf_generic_reloc, /* special_function */ | |
1868 | "R_ARM_RREL32", /* name */ | |
1869 | FALSE, /* partial_inplace */ | |
1870 | 0, /* src_mask */ | |
1871 | 0, /* dst_mask */ | |
1872 | FALSE), /* pcrel_offset */ | |
1873 | ||
1874 | HOWTO (R_ARM_RABS32, /* type */ | |
1875 | 0, /* rightshift */ | |
1876 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1877 | 0, /* bitsize */ | |
1878 | FALSE, /* pc_relative */ | |
1879 | 0, /* bitpos */ | |
1880 | complain_overflow_dont,/* complain_on_overflow */ | |
1881 | bfd_elf_generic_reloc, /* special_function */ | |
1882 | "R_ARM_RABS32", /* name */ | |
1883 | FALSE, /* partial_inplace */ | |
1884 | 0, /* src_mask */ | |
1885 | 0, /* dst_mask */ | |
1886 | FALSE), /* pcrel_offset */ | |
1887 | ||
1888 | HOWTO (R_ARM_RPC24, /* type */ | |
1889 | 0, /* rightshift */ | |
1890 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1891 | 0, /* bitsize */ | |
1892 | FALSE, /* pc_relative */ | |
1893 | 0, /* bitpos */ | |
1894 | complain_overflow_dont,/* complain_on_overflow */ | |
1895 | bfd_elf_generic_reloc, /* special_function */ | |
1896 | "R_ARM_RPC24", /* name */ | |
1897 | FALSE, /* partial_inplace */ | |
1898 | 0, /* src_mask */ | |
1899 | 0, /* dst_mask */ | |
1900 | FALSE), /* pcrel_offset */ | |
1901 | ||
1902 | HOWTO (R_ARM_RBASE, /* type */ | |
1903 | 0, /* rightshift */ | |
1904 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1905 | 0, /* bitsize */ | |
1906 | FALSE, /* pc_relative */ | |
1907 | 0, /* bitpos */ | |
1908 | complain_overflow_dont,/* complain_on_overflow */ | |
1909 | bfd_elf_generic_reloc, /* special_function */ | |
1910 | "R_ARM_RBASE", /* name */ | |
1911 | FALSE, /* partial_inplace */ | |
1912 | 0, /* src_mask */ | |
1913 | 0, /* dst_mask */ | |
1914 | FALSE) /* pcrel_offset */ | |
1915 | }; | |
1916 | ||
1917 | static reloc_howto_type * | |
1918 | elf32_arm_howto_from_type (unsigned int r_type) | |
1919 | { | |
906e58ca | 1920 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1921 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1922 | |
188fd7ae CL |
1923 | if (r_type >= R_ARM_IRELATIVE |
1924 | && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2)) | |
34e77a92 RS |
1925 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; |
1926 | ||
c19d1205 | 1927 | if (r_type >= R_ARM_RREL32 |
34e77a92 RS |
1928 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
1929 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; | |
7f266840 | 1930 | |
c19d1205 | 1931 | return NULL; |
7f266840 DJ |
1932 | } |
1933 | ||
f3185997 NC |
1934 | static bfd_boolean |
1935 | elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc, | |
7f266840 DJ |
1936 | Elf_Internal_Rela * elf_reloc) |
1937 | { | |
1938 | unsigned int r_type; | |
1939 | ||
1940 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
f3185997 NC |
1941 | if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL) |
1942 | { | |
1943 | /* xgettext:c-format */ | |
1944 | _bfd_error_handler (_("%pB: unsupported relocation type %#x"), | |
1945 | abfd, r_type); | |
1946 | bfd_set_error (bfd_error_bad_value); | |
1947 | return FALSE; | |
1948 | } | |
1949 | return TRUE; | |
7f266840 DJ |
1950 | } |
1951 | ||
1952 | struct elf32_arm_reloc_map | |
1953 | { | |
1954 | bfd_reloc_code_real_type bfd_reloc_val; | |
07d6d2b8 | 1955 | unsigned char elf_reloc_val; |
7f266840 DJ |
1956 | }; |
1957 | ||
1958 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
1959 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
1960 | { | |
07d6d2b8 | 1961 | {BFD_RELOC_NONE, R_ARM_NONE}, |
7f266840 | 1962 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, |
39b41c9c PB |
1963 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
1964 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
07d6d2b8 AM |
1965 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
1966 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
1967 | {BFD_RELOC_32, R_ARM_ABS32}, | |
1968 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
1969 | {BFD_RELOC_8, R_ARM_ABS8}, | |
1970 | {BFD_RELOC_16, R_ARM_ABS16}, | |
1971 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
7f266840 | 1972 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, |
c19d1205 ZW |
1973 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
1974 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
1975 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
1976 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
1977 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
1978 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
07d6d2b8 AM |
1979 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
1980 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
1981 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
1982 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, | |
1983 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, | |
1984 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, | |
1985 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, | |
1986 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
7f266840 DJ |
1987 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, |
1988 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
1989 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
1990 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac | 1991 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
07d6d2b8 AM |
1992 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, |
1993 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, | |
1994 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, | |
0855e32b | 1995 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, |
07d6d2b8 | 1996 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, |
0855e32b | 1997 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, |
07d6d2b8 | 1998 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, |
ba93b8ac DJ |
1999 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
2000 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
2001 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
2002 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
2003 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
07d6d2b8 AM |
2004 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, |
2005 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
2006 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
2007 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, | |
188fd7ae CL |
2008 | {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC}, |
2009 | {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC}, | |
2010 | {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC}, | |
2011 | {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE}, | |
5c5a4843 CL |
2012 | {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC}, |
2013 | {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC}, | |
2014 | {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC}, | |
c19d1205 ZW |
2015 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
2016 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
2017 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
2018 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
2019 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
2020 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
2021 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
2022 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
2023 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
2024 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
2025 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
2026 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
2027 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
2028 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
2029 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
2030 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
2031 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
2032 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
2033 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
2034 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
2035 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
2036 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
2037 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
2038 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
2039 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
2040 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
2041 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
2042 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
2043 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
2044 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
2045 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
2046 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
2047 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
2048 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
2049 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
2050 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
2051 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 | 2052 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
72d98d16 MG |
2053 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}, |
2054 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC}, | |
2055 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC}, | |
2056 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC}, | |
2057 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC} | |
7f266840 DJ |
2058 | }; |
2059 | ||
2060 | static reloc_howto_type * | |
f1c71a59 ZW |
2061 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
2062 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
2063 | { |
2064 | unsigned int i; | |
8029a119 | 2065 | |
906e58ca | 2066 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
2067 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
2068 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 2069 | |
c19d1205 | 2070 | return NULL; |
7f266840 DJ |
2071 | } |
2072 | ||
157090f7 AM |
2073 | static reloc_howto_type * |
2074 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
2075 | const char *r_name) | |
2076 | { | |
2077 | unsigned int i; | |
2078 | ||
906e58ca | 2079 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
2080 | if (elf32_arm_howto_table_1[i].name != NULL |
2081 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
2082 | return &elf32_arm_howto_table_1[i]; | |
2083 | ||
906e58ca | 2084 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
2085 | if (elf32_arm_howto_table_2[i].name != NULL |
2086 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
2087 | return &elf32_arm_howto_table_2[i]; | |
2088 | ||
34e77a92 RS |
2089 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
2090 | if (elf32_arm_howto_table_3[i].name != NULL | |
2091 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) | |
2092 | return &elf32_arm_howto_table_3[i]; | |
2093 | ||
157090f7 AM |
2094 | return NULL; |
2095 | } | |
2096 | ||
906e58ca NC |
2097 | /* Support for core dump NOTE sections. */ |
2098 | ||
7f266840 | 2099 | static bfd_boolean |
f1c71a59 | 2100 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
2101 | { |
2102 | int offset; | |
2103 | size_t size; | |
2104 | ||
2105 | switch (note->descsz) | |
2106 | { | |
2107 | default: | |
2108 | return FALSE; | |
2109 | ||
8029a119 | 2110 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 | 2111 | /* pr_cursig */ |
228e534f | 2112 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
7f266840 DJ |
2113 | |
2114 | /* pr_pid */ | |
228e534f | 2115 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
7f266840 DJ |
2116 | |
2117 | /* pr_reg */ | |
2118 | offset = 72; | |
2119 | size = 72; | |
2120 | ||
2121 | break; | |
2122 | } | |
2123 | ||
2124 | /* Make a ".reg/999" section. */ | |
2125 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
2126 | size, note->descpos + offset); | |
2127 | } | |
2128 | ||
2129 | static bfd_boolean | |
f1c71a59 | 2130 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
2131 | { |
2132 | switch (note->descsz) | |
2133 | { | |
2134 | default: | |
2135 | return FALSE; | |
2136 | ||
8029a119 | 2137 | case 124: /* Linux/ARM elf_prpsinfo. */ |
228e534f | 2138 | elf_tdata (abfd)->core->pid |
4395ee08 | 2139 | = bfd_get_32 (abfd, note->descdata + 12); |
228e534f | 2140 | elf_tdata (abfd)->core->program |
7f266840 | 2141 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); |
228e534f | 2142 | elf_tdata (abfd)->core->command |
7f266840 DJ |
2143 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); |
2144 | } | |
2145 | ||
2146 | /* Note that for some reason, a spurious space is tacked | |
2147 | onto the end of the args in some (at least one anyway) | |
2148 | implementations, so strip it off if it exists. */ | |
7f266840 | 2149 | { |
228e534f | 2150 | char *command = elf_tdata (abfd)->core->command; |
7f266840 DJ |
2151 | int n = strlen (command); |
2152 | ||
2153 | if (0 < n && command[n - 1] == ' ') | |
2154 | command[n - 1] = '\0'; | |
2155 | } | |
2156 | ||
2157 | return TRUE; | |
2158 | } | |
2159 | ||
1f20dca5 UW |
2160 | static char * |
2161 | elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz, | |
2162 | int note_type, ...) | |
2163 | { | |
2164 | switch (note_type) | |
2165 | { | |
2166 | default: | |
2167 | return NULL; | |
2168 | ||
2169 | case NT_PRPSINFO: | |
2170 | { | |
602f1657 | 2171 | char data[124] ATTRIBUTE_NONSTRING; |
1f20dca5 UW |
2172 | va_list ap; |
2173 | ||
2174 | va_start (ap, note_type); | |
2175 | memset (data, 0, sizeof (data)); | |
2176 | strncpy (data + 28, va_arg (ap, const char *), 16); | |
2177 | strncpy (data + 44, va_arg (ap, const char *), 80); | |
2178 | va_end (ap); | |
2179 | ||
2180 | return elfcore_write_note (abfd, buf, bufsiz, | |
2181 | "CORE", note_type, data, sizeof (data)); | |
2182 | } | |
2183 | ||
2184 | case NT_PRSTATUS: | |
2185 | { | |
2186 | char data[148]; | |
2187 | va_list ap; | |
2188 | long pid; | |
2189 | int cursig; | |
2190 | const void *greg; | |
2191 | ||
2192 | va_start (ap, note_type); | |
2193 | memset (data, 0, sizeof (data)); | |
2194 | pid = va_arg (ap, long); | |
2195 | bfd_put_32 (abfd, pid, data + 24); | |
2196 | cursig = va_arg (ap, int); | |
2197 | bfd_put_16 (abfd, cursig, data + 12); | |
2198 | greg = va_arg (ap, const void *); | |
2199 | memcpy (data + 72, greg, 72); | |
2200 | va_end (ap); | |
2201 | ||
2202 | return elfcore_write_note (abfd, buf, bufsiz, | |
2203 | "CORE", note_type, data, sizeof (data)); | |
2204 | } | |
2205 | } | |
2206 | } | |
2207 | ||
07d6d2b8 AM |
2208 | #define TARGET_LITTLE_SYM arm_elf32_le_vec |
2209 | #define TARGET_LITTLE_NAME "elf32-littlearm" | |
2210 | #define TARGET_BIG_SYM arm_elf32_be_vec | |
2211 | #define TARGET_BIG_NAME "elf32-bigarm" | |
7f266840 DJ |
2212 | |
2213 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
2214 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1f20dca5 | 2215 | #define elf_backend_write_core_note elf32_arm_nabi_write_core_note |
7f266840 | 2216 | |
252b5132 RH |
2217 | typedef unsigned long int insn32; |
2218 | typedef unsigned short int insn16; | |
2219 | ||
3a4a14e9 PB |
2220 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
2221 | interworkable. */ | |
57e8b36a | 2222 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 2223 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
2224 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
2225 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 2226 | |
252b5132 RH |
2227 | /* The linker script knows the section names for placement. |
2228 | The entry_names are used to do simple name mangling on the stubs. | |
2229 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 2230 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
2231 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
2232 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
2233 | ||
2234 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
2235 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
2236 | ||
c7b8f16e JB |
2237 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
2238 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
2239 | ||
a504d23a LA |
2240 | #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer" |
2241 | #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x" | |
2242 | ||
845b51d6 PB |
2243 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
2244 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
2245 | ||
7413f23f DJ |
2246 | #define STUB_ENTRY_NAME "__%s_veneer" |
2247 | ||
4ba2ef8f TP |
2248 | #define CMSE_PREFIX "__acle_se_" |
2249 | ||
252b5132 RH |
2250 | /* The name of the dynamic interpreter. This is put in the .interp |
2251 | section. */ | |
2252 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
2253 | ||
cb10292c CL |
2254 | /* FDPIC default stack size. */ |
2255 | #define DEFAULT_STACK_SIZE 0x8000 | |
2256 | ||
0855e32b | 2257 | static const unsigned long tls_trampoline [] = |
b38cadfb NC |
2258 | { |
2259 | 0xe08e0000, /* add r0, lr, r0 */ | |
2260 | 0xe5901004, /* ldr r1, [r0,#4] */ | |
2261 | 0xe12fff11, /* bx r1 */ | |
2262 | }; | |
0855e32b NS |
2263 | |
2264 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = | |
b38cadfb NC |
2265 | { |
2266 | 0xe52d2004, /* push {r2} */ | |
2267 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ | |
2268 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ | |
2269 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ | |
2270 | 0xe081100f, /* 2: add r1, pc */ | |
2271 | 0xe12fff12, /* bx r2 */ | |
2272 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 | |
99059e56 | 2273 | + dl_tlsdesc_lazy_resolver(GOT) */ |
b38cadfb NC |
2274 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ |
2275 | }; | |
0855e32b | 2276 | |
7801f98f CL |
2277 | /* ARM FDPIC PLT entry. */ |
2278 | /* The last 5 words contain PLT lazy fragment code and data. */ | |
2279 | static const bfd_vma elf32_arm_fdpic_plt_entry [] = | |
2280 | { | |
2281 | 0xe59fc008, /* ldr r12, .L1 */ | |
2282 | 0xe08cc009, /* add r12, r12, r9 */ | |
2283 | 0xe59c9004, /* ldr r9, [r12, #4] */ | |
2284 | 0xe59cf000, /* ldr pc, [r12] */ | |
2285 | 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */ | |
2286 | 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */ | |
2287 | 0xe51fc00c, /* ldr r12, [pc, #-12] */ | |
2288 | 0xe92d1000, /* push {r12} */ | |
2289 | 0xe599c004, /* ldr r12, [r9, #4] */ | |
2290 | 0xe599f000, /* ldr pc, [r9] */ | |
2291 | }; | |
2292 | ||
59029f57 CL |
2293 | /* Thumb FDPIC PLT entry. */ |
2294 | /* The last 5 words contain PLT lazy fragment code and data. */ | |
2295 | static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] = | |
2296 | { | |
2297 | 0xc00cf8df, /* ldr.w r12, .L1 */ | |
2298 | 0x0c09eb0c, /* add.w r12, r12, r9 */ | |
2299 | 0x9004f8dc, /* ldr.w r9, [r12, #4] */ | |
2300 | 0xf000f8dc, /* ldr.w pc, [r12] */ | |
2301 | 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */ | |
2302 | 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */ | |
2303 | 0xc008f85f, /* ldr.w r12, .L2 */ | |
2304 | 0xcd04f84d, /* push {r12} */ | |
2305 | 0xc004f8d9, /* ldr.w r12, [r9, #4] */ | |
2306 | 0xf000f8d9, /* ldr.w pc, [r9] */ | |
2307 | }; | |
2308 | ||
5e681ec4 PB |
2309 | #ifdef FOUR_WORD_PLT |
2310 | ||
252b5132 RH |
2311 | /* The first entry in a procedure linkage table looks like |
2312 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 2313 | called before the relocation has been set up calls the dynamic |
9b485d32 | 2314 | linker first. */ |
e5a52504 | 2315 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2316 | { |
2317 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2318 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
2319 | 0xe08fe00e, /* add lr, pc, lr */ | |
2320 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2321 | }; | |
5e681ec4 PB |
2322 | |
2323 | /* Subsequent entries in a procedure linkage table look like | |
2324 | this. */ | |
e5a52504 | 2325 | static const bfd_vma elf32_arm_plt_entry [] = |
b38cadfb NC |
2326 | { |
2327 | 0xe28fc600, /* add ip, pc, #NN */ | |
2328 | 0xe28cca00, /* add ip, ip, #NN */ | |
2329 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
2330 | 0x00000000, /* unused */ | |
2331 | }; | |
5e681ec4 | 2332 | |
eed94f8f | 2333 | #else /* not FOUR_WORD_PLT */ |
5e681ec4 | 2334 | |
5e681ec4 PB |
2335 | /* The first entry in a procedure linkage table looks like |
2336 | this. It is set up so that any shared library function that is | |
2337 | called before the relocation has been set up calls the dynamic | |
2338 | linker first. */ | |
e5a52504 | 2339 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb | 2340 | { |
07d6d2b8 AM |
2341 | 0xe52de004, /* str lr, [sp, #-4]! */ |
2342 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
2343 | 0xe08fe00e, /* add lr, pc, lr */ | |
2344 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2345 | 0x00000000, /* &GOT[0] - . */ | |
b38cadfb | 2346 | }; |
252b5132 | 2347 | |
1db37fe6 YG |
2348 | /* By default subsequent entries in a procedure linkage table look like |
2349 | this. Offsets that don't fit into 28 bits will cause link error. */ | |
2350 | static const bfd_vma elf32_arm_plt_entry_short [] = | |
b38cadfb NC |
2351 | { |
2352 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
2353 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2354 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2355 | }; | |
5e681ec4 | 2356 | |
1db37fe6 YG |
2357 | /* When explicitly asked, we'll use this "long" entry format |
2358 | which can cope with arbitrary displacements. */ | |
2359 | static const bfd_vma elf32_arm_plt_entry_long [] = | |
2360 | { | |
07d6d2b8 AM |
2361 | 0xe28fc200, /* add ip, pc, #0xN0000000 */ |
2362 | 0xe28cc600, /* add ip, ip, #0xNN00000 */ | |
1db37fe6 YG |
2363 | 0xe28cca00, /* add ip, ip, #0xNN000 */ |
2364 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2365 | }; | |
2366 | ||
2367 | static bfd_boolean elf32_arm_use_long_plt_entry = FALSE; | |
2368 | ||
eed94f8f NC |
2369 | #endif /* not FOUR_WORD_PLT */ |
2370 | ||
2371 | /* The first entry in a procedure linkage table looks like this. | |
2372 | It is set up so that any shared library function that is called before the | |
2373 | relocation has been set up calls the dynamic linker first. */ | |
2374 | static const bfd_vma elf32_thumb2_plt0_entry [] = | |
2375 | { | |
2376 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2377 | an instruction maybe encoded to one or two array elements. */ | |
07d6d2b8 AM |
2378 | 0xf8dfb500, /* push {lr} */ |
2379 | 0x44fee008, /* ldr.w lr, [pc, #8] */ | |
2380 | /* add lr, pc */ | |
eed94f8f | 2381 | 0xff08f85e, /* ldr.w pc, [lr, #8]! */ |
07d6d2b8 | 2382 | 0x00000000, /* &GOT[0] - . */ |
eed94f8f NC |
2383 | }; |
2384 | ||
2385 | /* Subsequent entries in a procedure linkage table for thumb only target | |
2386 | look like this. */ | |
2387 | static const bfd_vma elf32_thumb2_plt_entry [] = | |
2388 | { | |
2389 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2390 | an instruction maybe encoded to one or two array elements. */ | |
07d6d2b8 AM |
2391 | 0x0c00f240, /* movw ip, #0xNNNN */ |
2392 | 0x0c00f2c0, /* movt ip, #0xNNNN */ | |
2393 | 0xf8dc44fc, /* add ip, pc */ | |
2394 | 0xbf00f000 /* ldr.w pc, [ip] */ | |
2395 | /* nop */ | |
eed94f8f | 2396 | }; |
252b5132 | 2397 | |
00a97672 RS |
2398 | /* The format of the first entry in the procedure linkage table |
2399 | for a VxWorks executable. */ | |
2400 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
b38cadfb | 2401 | { |
07d6d2b8 AM |
2402 | 0xe52dc008, /* str ip,[sp,#-8]! */ |
2403 | 0xe59fc000, /* ldr ip,[pc] */ | |
2404 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
2405 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
b38cadfb | 2406 | }; |
00a97672 RS |
2407 | |
2408 | /* The format of subsequent entries in a VxWorks executable. */ | |
2409 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
b38cadfb | 2410 | { |
07d6d2b8 AM |
2411 | 0xe59fc000, /* ldr ip,[pc] */ |
2412 | 0xe59cf000, /* ldr pc,[ip] */ | |
2413 | 0x00000000, /* .long @got */ | |
2414 | 0xe59fc000, /* ldr ip,[pc] */ | |
2415 | 0xea000000, /* b _PLT */ | |
2416 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
b38cadfb | 2417 | }; |
00a97672 RS |
2418 | |
2419 | /* The format of entries in a VxWorks shared library. */ | |
2420 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
b38cadfb | 2421 | { |
07d6d2b8 AM |
2422 | 0xe59fc000, /* ldr ip,[pc] */ |
2423 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
2424 | 0x00000000, /* .long @got */ | |
2425 | 0xe59fc000, /* ldr ip,[pc] */ | |
2426 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
2427 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
b38cadfb | 2428 | }; |
00a97672 | 2429 | |
b7693d02 DJ |
2430 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
2431 | #define PLT_THUMB_STUB_SIZE 4 | |
2432 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
b38cadfb NC |
2433 | { |
2434 | 0x4778, /* bx pc */ | |
2435 | 0x46c0 /* nop */ | |
2436 | }; | |
b7693d02 | 2437 | |
e5a52504 MM |
2438 | /* The entries in a PLT when using a DLL-based target with multiple |
2439 | address spaces. */ | |
906e58ca | 2440 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
b38cadfb | 2441 | { |
07d6d2b8 AM |
2442 | 0xe51ff004, /* ldr pc, [pc, #-4] */ |
2443 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ | |
b38cadfb NC |
2444 | }; |
2445 | ||
2446 | /* The first entry in a procedure linkage table looks like | |
2447 | this. It is set up so that any shared library function that is | |
2448 | called before the relocation has been set up calls the dynamic | |
2449 | linker first. */ | |
2450 | static const bfd_vma elf32_arm_nacl_plt0_entry [] = | |
2451 | { | |
2452 | /* First bundle: */ | |
2453 | 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */ | |
2454 | 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */ | |
2455 | 0xe08cc00f, /* add ip, ip, pc */ | |
2456 | 0xe52dc008, /* str ip, [sp, #-8]! */ | |
2457 | /* Second bundle: */ | |
edccdf7c RM |
2458 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2459 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2460 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2461 | 0xe12fff1c, /* bx ip */ |
b38cadfb | 2462 | /* Third bundle: */ |
edccdf7c RM |
2463 | 0xe320f000, /* nop */ |
2464 | 0xe320f000, /* nop */ | |
2465 | 0xe320f000, /* nop */ | |
b38cadfb NC |
2466 | /* .Lplt_tail: */ |
2467 | 0xe50dc004, /* str ip, [sp, #-4] */ | |
2468 | /* Fourth bundle: */ | |
edccdf7c RM |
2469 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2470 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2471 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2472 | 0xe12fff1c, /* bx ip */ |
b38cadfb NC |
2473 | }; |
2474 | #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4) | |
2475 | ||
2476 | /* Subsequent entries in a procedure linkage table look like this. */ | |
2477 | static const bfd_vma elf32_arm_nacl_plt_entry [] = | |
2478 | { | |
2479 | 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */ | |
2480 | 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */ | |
2481 | 0xe08cc00f, /* add ip, ip, pc */ | |
2482 | 0xea000000, /* b .Lplt_tail */ | |
2483 | }; | |
e5a52504 | 2484 | |
906e58ca NC |
2485 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
2486 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) | |
2487 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) | |
2488 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) | |
2489 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) | |
2490 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) | |
c5423981 TG |
2491 | #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4) |
2492 | #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4) | |
906e58ca | 2493 | |
461a49ca | 2494 | enum stub_insn_type |
b38cadfb NC |
2495 | { |
2496 | THUMB16_TYPE = 1, | |
2497 | THUMB32_TYPE, | |
2498 | ARM_TYPE, | |
2499 | DATA_TYPE | |
2500 | }; | |
461a49ca | 2501 | |
48229727 JB |
2502 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2503 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2504 | is inserted in arm_build_one_stub(). */ | |
2505 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2506 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
d5a67c02 AV |
2507 | #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0} |
2508 | #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0} | |
48229727 JB |
2509 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} |
2510 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2511 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2512 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2513 | |
2514 | typedef struct | |
2515 | { | |
07d6d2b8 | 2516 | bfd_vma data; |
b38cadfb | 2517 | enum stub_insn_type type; |
07d6d2b8 AM |
2518 | unsigned int r_type; |
2519 | int reloc_addend; | |
461a49ca DJ |
2520 | } insn_sequence; |
2521 | ||
fea2b4d6 CL |
2522 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2523 | to reach the stub if necessary. */ | |
461a49ca | 2524 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
b38cadfb | 2525 | { |
07d6d2b8 | 2526 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ |
b38cadfb NC |
2527 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2528 | }; | |
906e58ca | 2529 | |
fea2b4d6 CL |
2530 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2531 | available. */ | |
461a49ca | 2532 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
b38cadfb | 2533 | { |
07d6d2b8 AM |
2534 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ |
2535 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2536 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2537 | }; | |
906e58ca | 2538 | |
d3626fb0 | 2539 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2540 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
b38cadfb | 2541 | { |
07d6d2b8 AM |
2542 | THUMB16_INSN (0xb401), /* push {r0} */ |
2543 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2544 | THUMB16_INSN (0x4684), /* mov ip, r0 */ | |
2545 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2546 | THUMB16_INSN (0x4760), /* bx ip */ | |
2547 | THUMB16_INSN (0xbf00), /* nop */ | |
b38cadfb NC |
2548 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2549 | }; | |
906e58ca | 2550 | |
80c135e5 TP |
2551 | /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */ |
2552 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] = | |
2553 | { | |
07d6d2b8 | 2554 | THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */ |
80c135e5 TP |
2555 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */ |
2556 | }; | |
2557 | ||
d5a67c02 AV |
2558 | /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2 |
2559 | M-profile architectures. */ | |
2560 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] = | |
2561 | { | |
2562 | THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */ | |
2563 | THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */ | |
07d6d2b8 | 2564 | THUMB16_INSN (0x4760), /* bx ip */ |
d5a67c02 AV |
2565 | }; |
2566 | ||
d3626fb0 CL |
2567 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2568 | allowed. */ | |
2569 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
b38cadfb | 2570 | { |
07d6d2b8 AM |
2571 | THUMB16_INSN (0x4778), /* bx pc */ |
2572 | THUMB16_INSN (0x46c0), /* nop */ | |
2573 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2574 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2575 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2576 | }; | |
d3626fb0 | 2577 | |
fea2b4d6 CL |
2578 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2579 | available. */ | |
461a49ca | 2580 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
b38cadfb | 2581 | { |
07d6d2b8 AM |
2582 | THUMB16_INSN (0x4778), /* bx pc */ |
2583 | THUMB16_INSN (0x46c0), /* nop */ | |
2584 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
b38cadfb NC |
2585 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ |
2586 | }; | |
906e58ca | 2587 | |
fea2b4d6 CL |
2588 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2589 | one, when the destination is close enough. */ | |
461a49ca | 2590 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
b38cadfb | 2591 | { |
07d6d2b8 AM |
2592 | THUMB16_INSN (0x4778), /* bx pc */ |
2593 | THUMB16_INSN (0x46c0), /* nop */ | |
b38cadfb NC |
2594 | ARM_REL_INSN (0xea000000, -8), /* b (X-8) */ |
2595 | }; | |
c820be07 | 2596 | |
cf3eccff | 2597 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2598 | blx to reach the stub if necessary. */ |
cf3eccff | 2599 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
b38cadfb | 2600 | { |
07d6d2b8 AM |
2601 | ARM_INSN (0xe59fc000), /* ldr ip, [pc] */ |
2602 | ARM_INSN (0xe08ff00c), /* add pc, pc, ip */ | |
b38cadfb NC |
2603 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ |
2604 | }; | |
906e58ca | 2605 | |
cf3eccff DJ |
2606 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2607 | blx to reach the stub if necessary. We can not add into pc; | |
2608 | it is not guaranteed to mode switch (different in ARMv6 and | |
2609 | ARMv7). */ | |
2610 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
b38cadfb | 2611 | { |
07d6d2b8 AM |
2612 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
2613 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2614 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2615 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
2616 | }; | |
cf3eccff | 2617 | |
ebe24dd4 CL |
2618 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2619 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
b38cadfb | 2620 | { |
07d6d2b8 AM |
2621 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ |
2622 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2623 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2624 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
2625 | }; | |
ebe24dd4 CL |
2626 | |
2627 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2628 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
b38cadfb | 2629 | { |
07d6d2b8 AM |
2630 | THUMB16_INSN (0x4778), /* bx pc */ |
2631 | THUMB16_INSN (0x46c0), /* nop */ | |
2632 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2633 | ARM_INSN (0xe08cf00f), /* add pc, ip, pc */ | |
b38cadfb NC |
2634 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ |
2635 | }; | |
ebe24dd4 | 2636 | |
d3626fb0 CL |
2637 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2638 | architectures. */ | |
ebe24dd4 | 2639 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
b38cadfb | 2640 | { |
07d6d2b8 AM |
2641 | THUMB16_INSN (0xb401), /* push {r0} */ |
2642 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2643 | THUMB16_INSN (0x46fc), /* mov ip, pc */ | |
2644 | THUMB16_INSN (0x4484), /* add ip, r0 */ | |
2645 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2646 | THUMB16_INSN (0x4760), /* bx ip */ | |
b38cadfb NC |
2647 | DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ |
2648 | }; | |
ebe24dd4 | 2649 | |
d3626fb0 CL |
2650 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2651 | allowed. */ | |
2652 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
b38cadfb | 2653 | { |
07d6d2b8 AM |
2654 | THUMB16_INSN (0x4778), /* bx pc */ |
2655 | THUMB16_INSN (0x46c0), /* nop */ | |
2656 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2657 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2658 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
b38cadfb NC |
2659 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ |
2660 | }; | |
d3626fb0 | 2661 | |
0855e32b NS |
2662 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
2663 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2664 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = | |
2665 | { | |
07d6d2b8 AM |
2666 | ARM_INSN (0xe59f1000), /* ldr r1, [pc] */ |
2667 | ARM_INSN (0xe08ff001), /* add pc, pc, r1 */ | |
b38cadfb | 2668 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ |
0855e32b NS |
2669 | }; |
2670 | ||
2671 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a | |
2672 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2673 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = | |
2674 | { | |
07d6d2b8 AM |
2675 | THUMB16_INSN (0x4778), /* bx pc */ |
2676 | THUMB16_INSN (0x46c0), /* nop */ | |
2677 | ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */ | |
2678 | ARM_INSN (0xe081f00f), /* add pc, r1, pc */ | |
b38cadfb | 2679 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ |
0855e32b NS |
2680 | }; |
2681 | ||
7a89b94e NC |
2682 | /* NaCl ARM -> ARM long branch stub. */ |
2683 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] = | |
2684 | { | |
2685 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
2686 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ | |
07d6d2b8 AM |
2687 | ARM_INSN (0xe12fff1c), /* bx ip */ |
2688 | ARM_INSN (0xe320f000), /* nop */ | |
2689 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2690 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2691 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2692 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
7a89b94e NC |
2693 | }; |
2694 | ||
2695 | /* NaCl ARM -> ARM long branch stub, PIC. */ | |
2696 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] = | |
2697 | { | |
2698 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
07d6d2b8 | 2699 | ARM_INSN (0xe08cc00f), /* add ip, ip, pc */ |
7a89b94e | 2700 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ |
07d6d2b8 AM |
2701 | ARM_INSN (0xe12fff1c), /* bx ip */ |
2702 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2703 | DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */ | |
2704 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2705 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
7a89b94e NC |
2706 | }; |
2707 | ||
4ba2ef8f TP |
2708 | /* Stub used for transition to secure state (aka SG veneer). */ |
2709 | static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] = | |
2710 | { | |
2711 | THUMB32_INSN (0xe97fe97f), /* sg. */ | |
2712 | THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */ | |
2713 | }; | |
2714 | ||
7a89b94e | 2715 | |
48229727 JB |
2716 | /* Cortex-A8 erratum-workaround stubs. */ |
2717 | ||
2718 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2719 | can't use a conditional branch to reach this stub). */ | |
2720 | ||
2721 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
b38cadfb | 2722 | { |
07d6d2b8 | 2723 | THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */ |
b38cadfb NC |
2724 | THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */ |
2725 | THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2726 | }; | |
48229727 JB |
2727 | |
2728 | /* Stub used for b.w and bl.w instructions. */ | |
2729 | ||
2730 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
b38cadfb NC |
2731 | { |
2732 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2733 | }; | |
48229727 JB |
2734 | |
2735 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
b38cadfb NC |
2736 | { |
2737 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2738 | }; | |
48229727 JB |
2739 | |
2740 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2741 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2742 | real destination using an ARM-mode branch. */ | |
2743 | ||
2744 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
b38cadfb NC |
2745 | { |
2746 | ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */ | |
2747 | }; | |
48229727 | 2748 | |
9553db3c NC |
2749 | /* For each section group there can be a specially created linker section |
2750 | to hold the stubs for that group. The name of the stub section is based | |
2751 | upon the name of another section within that group with the suffix below | |
2752 | applied. | |
2753 | ||
2754 | PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to | |
2755 | create what appeared to be a linker stub section when it actually | |
2756 | contained user code/data. For example, consider this fragment: | |
b38cadfb | 2757 | |
9553db3c NC |
2758 | const char * stubborn_problems[] = { "np" }; |
2759 | ||
2760 | If this is compiled with "-fPIC -fdata-sections" then gcc produces a | |
2761 | section called: | |
2762 | ||
2763 | .data.rel.local.stubborn_problems | |
2764 | ||
2765 | This then causes problems in arm32_arm_build_stubs() as it triggers: | |
2766 | ||
2767 | // Ignore non-stub sections. | |
2768 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
2769 | continue; | |
2770 | ||
2771 | And so the section would be ignored instead of being processed. Hence | |
2772 | the change in definition of STUB_SUFFIX to a name that cannot be a valid | |
2773 | C identifier. */ | |
2774 | #define STUB_SUFFIX ".__stub" | |
906e58ca | 2775 | |
738a79f6 CL |
2776 | /* One entry per long/short branch stub defined above. */ |
2777 | #define DEF_STUBS \ | |
2778 | DEF_STUB(long_branch_any_any) \ | |
2779 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
2780 | DEF_STUB(long_branch_thumb_only) \ | |
2781 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
2782 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
2783 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
2784 | DEF_STUB(long_branch_any_arm_pic) \ | |
2785 | DEF_STUB(long_branch_any_thumb_pic) \ | |
2786 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
2787 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
2788 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
48229727 | 2789 | DEF_STUB(long_branch_thumb_only_pic) \ |
0855e32b NS |
2790 | DEF_STUB(long_branch_any_tls_pic) \ |
2791 | DEF_STUB(long_branch_v4t_thumb_tls_pic) \ | |
7a89b94e NC |
2792 | DEF_STUB(long_branch_arm_nacl) \ |
2793 | DEF_STUB(long_branch_arm_nacl_pic) \ | |
4ba2ef8f | 2794 | DEF_STUB(cmse_branch_thumb_only) \ |
48229727 JB |
2795 | DEF_STUB(a8_veneer_b_cond) \ |
2796 | DEF_STUB(a8_veneer_b) \ | |
2797 | DEF_STUB(a8_veneer_bl) \ | |
80c135e5 TP |
2798 | DEF_STUB(a8_veneer_blx) \ |
2799 | DEF_STUB(long_branch_thumb2_only) \ | |
d5a67c02 | 2800 | DEF_STUB(long_branch_thumb2_only_pure) |
738a79f6 CL |
2801 | |
2802 | #define DEF_STUB(x) arm_stub_##x, | |
b38cadfb NC |
2803 | enum elf32_arm_stub_type |
2804 | { | |
906e58ca | 2805 | arm_stub_none, |
738a79f6 | 2806 | DEF_STUBS |
4f4faa4d | 2807 | max_stub_type |
738a79f6 CL |
2808 | }; |
2809 | #undef DEF_STUB | |
2810 | ||
8d9d9490 TP |
2811 | /* Note the first a8_veneer type. */ |
2812 | const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond; | |
2813 | ||
738a79f6 CL |
2814 | typedef struct |
2815 | { | |
d3ce72d0 | 2816 | const insn_sequence* template_sequence; |
738a79f6 CL |
2817 | int template_size; |
2818 | } stub_def; | |
2819 | ||
2820 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
b38cadfb NC |
2821 | static const stub_def stub_definitions[] = |
2822 | { | |
738a79f6 CL |
2823 | {NULL, 0}, |
2824 | DEF_STUBS | |
906e58ca NC |
2825 | }; |
2826 | ||
2827 | struct elf32_arm_stub_hash_entry | |
2828 | { | |
2829 | /* Base hash table entry structure. */ | |
2830 | struct bfd_hash_entry root; | |
2831 | ||
2832 | /* The stub section. */ | |
2833 | asection *stub_sec; | |
2834 | ||
2835 | /* Offset within stub_sec of the beginning of this stub. */ | |
2836 | bfd_vma stub_offset; | |
2837 | ||
2838 | /* Given the symbol's value and its section we can determine its final | |
2839 | value when building the stubs (so the stub knows where to jump). */ | |
2840 | bfd_vma target_value; | |
2841 | asection *target_section; | |
2842 | ||
8d9d9490 TP |
2843 | /* Same as above but for the source of the branch to the stub. Used for |
2844 | Cortex-A8 erratum workaround to patch it to branch to the stub. As | |
2845 | such, source section does not need to be recorded since Cortex-A8 erratum | |
2846 | workaround stubs are only generated when both source and target are in the | |
2847 | same section. */ | |
2848 | bfd_vma source_value; | |
48229727 JB |
2849 | |
2850 | /* The instruction which caused this stub to be generated (only valid for | |
2851 | Cortex-A8 erratum workaround stubs at present). */ | |
2852 | unsigned long orig_insn; | |
2853 | ||
461a49ca | 2854 | /* The stub type. */ |
906e58ca | 2855 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2856 | /* Its encoding size in bytes. */ |
2857 | int stub_size; | |
2858 | /* Its template. */ | |
2859 | const insn_sequence *stub_template; | |
2860 | /* The size of the template (number of entries). */ | |
2861 | int stub_template_size; | |
906e58ca NC |
2862 | |
2863 | /* The symbol table entry, if any, that this was derived from. */ | |
2864 | struct elf32_arm_link_hash_entry *h; | |
2865 | ||
35fc36a8 RS |
2866 | /* Type of branch. */ |
2867 | enum arm_st_branch_type branch_type; | |
906e58ca NC |
2868 | |
2869 | /* Where this stub is being called from, or, in the case of combined | |
2870 | stub sections, the first input section in the group. */ | |
2871 | asection *id_sec; | |
7413f23f DJ |
2872 | |
2873 | /* The name for the local symbol at the start of this stub. The | |
2874 | stub name in the hash table has to be unique; this does not, so | |
2875 | it can be friendlier. */ | |
2876 | char *output_name; | |
906e58ca NC |
2877 | }; |
2878 | ||
e489d0ae PB |
2879 | /* Used to build a map of a section. This is required for mixed-endian |
2880 | code/data. */ | |
2881 | ||
2882 | typedef struct elf32_elf_section_map | |
2883 | { | |
2884 | bfd_vma vma; | |
2885 | char type; | |
2886 | } | |
2887 | elf32_arm_section_map; | |
2888 | ||
c7b8f16e JB |
2889 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2890 | ||
2891 | typedef enum | |
2892 | { | |
2893 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2894 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2895 | VFP11_ERRATUM_ARM_VENEER, | |
2896 | VFP11_ERRATUM_THUMB_VENEER | |
2897 | } | |
2898 | elf32_vfp11_erratum_type; | |
2899 | ||
2900 | typedef struct elf32_vfp11_erratum_list | |
2901 | { | |
2902 | struct elf32_vfp11_erratum_list *next; | |
2903 | bfd_vma vma; | |
2904 | union | |
2905 | { | |
2906 | struct | |
2907 | { | |
2908 | struct elf32_vfp11_erratum_list *veneer; | |
2909 | unsigned int vfp_insn; | |
2910 | } b; | |
2911 | struct | |
2912 | { | |
2913 | struct elf32_vfp11_erratum_list *branch; | |
2914 | unsigned int id; | |
2915 | } v; | |
2916 | } u; | |
2917 | elf32_vfp11_erratum_type type; | |
2918 | } | |
2919 | elf32_vfp11_erratum_list; | |
2920 | ||
a504d23a LA |
2921 | /* Information about a STM32L4XX erratum veneer, or a branch to such a |
2922 | veneer. */ | |
2923 | typedef enum | |
2924 | { | |
2925 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER, | |
2926 | STM32L4XX_ERRATUM_VENEER | |
2927 | } | |
2928 | elf32_stm32l4xx_erratum_type; | |
2929 | ||
2930 | typedef struct elf32_stm32l4xx_erratum_list | |
2931 | { | |
2932 | struct elf32_stm32l4xx_erratum_list *next; | |
2933 | bfd_vma vma; | |
2934 | union | |
2935 | { | |
2936 | struct | |
2937 | { | |
2938 | struct elf32_stm32l4xx_erratum_list *veneer; | |
2939 | unsigned int insn; | |
2940 | } b; | |
2941 | struct | |
2942 | { | |
2943 | struct elf32_stm32l4xx_erratum_list *branch; | |
2944 | unsigned int id; | |
2945 | } v; | |
2946 | } u; | |
2947 | elf32_stm32l4xx_erratum_type type; | |
2948 | } | |
2949 | elf32_stm32l4xx_erratum_list; | |
2950 | ||
2468f9c9 PB |
2951 | typedef enum |
2952 | { | |
2953 | DELETE_EXIDX_ENTRY, | |
2954 | INSERT_EXIDX_CANTUNWIND_AT_END | |
2955 | } | |
2956 | arm_unwind_edit_type; | |
2957 | ||
2958 | /* A (sorted) list of edits to apply to an unwind table. */ | |
2959 | typedef struct arm_unwind_table_edit | |
2960 | { | |
2961 | arm_unwind_edit_type type; | |
2962 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
2963 | section different from the one we're currently writing out, so record the | |
2964 | (text) section this edit relates to here. */ | |
2965 | asection *linked_section; | |
2966 | unsigned int index; | |
2967 | struct arm_unwind_table_edit *next; | |
2968 | } | |
2969 | arm_unwind_table_edit; | |
2970 | ||
8e3de13a | 2971 | typedef struct _arm_elf_section_data |
e489d0ae | 2972 | { |
2468f9c9 | 2973 | /* Information about mapping symbols. */ |
e489d0ae | 2974 | struct bfd_elf_section_data elf; |
8e3de13a | 2975 | unsigned int mapcount; |
c7b8f16e | 2976 | unsigned int mapsize; |
e489d0ae | 2977 | elf32_arm_section_map *map; |
2468f9c9 | 2978 | /* Information about CPU errata. */ |
c7b8f16e JB |
2979 | unsigned int erratumcount; |
2980 | elf32_vfp11_erratum_list *erratumlist; | |
a504d23a LA |
2981 | unsigned int stm32l4xx_erratumcount; |
2982 | elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist; | |
491d01d3 | 2983 | unsigned int additional_reloc_count; |
2468f9c9 PB |
2984 | /* Information about unwind tables. */ |
2985 | union | |
2986 | { | |
2987 | /* Unwind info attached to a text section. */ | |
2988 | struct | |
2989 | { | |
2990 | asection *arm_exidx_sec; | |
2991 | } text; | |
2992 | ||
2993 | /* Unwind info attached to an .ARM.exidx section. */ | |
2994 | struct | |
2995 | { | |
2996 | arm_unwind_table_edit *unwind_edit_list; | |
2997 | arm_unwind_table_edit *unwind_edit_tail; | |
2998 | } exidx; | |
2999 | } u; | |
8e3de13a NC |
3000 | } |
3001 | _arm_elf_section_data; | |
e489d0ae PB |
3002 | |
3003 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 3004 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 3005 | |
48229727 JB |
3006 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
3007 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
3008 | so may be created multiple times: we use an array of these entries whilst | |
3009 | relaxing which we can refresh easily, then create stubs for each potentially | |
3010 | erratum-triggering instruction once we've settled on a solution. */ | |
3011 | ||
b38cadfb NC |
3012 | struct a8_erratum_fix |
3013 | { | |
48229727 JB |
3014 | bfd *input_bfd; |
3015 | asection *section; | |
3016 | bfd_vma offset; | |
8d9d9490 | 3017 | bfd_vma target_offset; |
48229727 JB |
3018 | unsigned long orig_insn; |
3019 | char *stub_name; | |
3020 | enum elf32_arm_stub_type stub_type; | |
35fc36a8 | 3021 | enum arm_st_branch_type branch_type; |
48229727 JB |
3022 | }; |
3023 | ||
3024 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
3025 | erratum. */ | |
3026 | ||
b38cadfb NC |
3027 | struct a8_erratum_reloc |
3028 | { | |
48229727 JB |
3029 | bfd_vma from; |
3030 | bfd_vma destination; | |
92750f34 DJ |
3031 | struct elf32_arm_link_hash_entry *hash; |
3032 | const char *sym_name; | |
48229727 | 3033 | unsigned int r_type; |
35fc36a8 | 3034 | enum arm_st_branch_type branch_type; |
48229727 JB |
3035 | bfd_boolean non_a8_stub; |
3036 | }; | |
3037 | ||
ba93b8ac DJ |
3038 | /* The size of the thread control block. */ |
3039 | #define TCB_SIZE 8 | |
3040 | ||
34e77a92 RS |
3041 | /* ARM-specific information about a PLT entry, over and above the usual |
3042 | gotplt_union. */ | |
b38cadfb NC |
3043 | struct arm_plt_info |
3044 | { | |
34e77a92 RS |
3045 | /* We reference count Thumb references to a PLT entry separately, |
3046 | so that we can emit the Thumb trampoline only if needed. */ | |
3047 | bfd_signed_vma thumb_refcount; | |
3048 | ||
3049 | /* Some references from Thumb code may be eliminated by BL->BLX | |
3050 | conversion, so record them separately. */ | |
3051 | bfd_signed_vma maybe_thumb_refcount; | |
3052 | ||
3053 | /* How many of the recorded PLT accesses were from non-call relocations. | |
3054 | This information is useful when deciding whether anything takes the | |
3055 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all | |
3056 | non-call references to the function should resolve directly to the | |
3057 | real runtime target. */ | |
3058 | unsigned int noncall_refcount; | |
3059 | ||
3060 | /* Since PLT entries have variable size if the Thumb prologue is | |
3061 | used, we need to record the index into .got.plt instead of | |
3062 | recomputing it from the PLT offset. */ | |
3063 | bfd_signed_vma got_offset; | |
3064 | }; | |
3065 | ||
3066 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ | |
b38cadfb NC |
3067 | struct arm_local_iplt_info |
3068 | { | |
34e77a92 RS |
3069 | /* The information that is usually found in the generic ELF part of |
3070 | the hash table entry. */ | |
3071 | union gotplt_union root; | |
3072 | ||
3073 | /* The information that is usually found in the ARM-specific part of | |
3074 | the hash table entry. */ | |
3075 | struct arm_plt_info arm; | |
3076 | ||
3077 | /* A list of all potential dynamic relocations against this symbol. */ | |
3078 | struct elf_dyn_relocs *dyn_relocs; | |
3079 | }; | |
3080 | ||
e8b09b87 CL |
3081 | /* Structure to handle FDPIC support for local functions. */ |
3082 | struct fdpic_local { | |
3083 | unsigned int funcdesc_cnt; | |
3084 | unsigned int gotofffuncdesc_cnt; | |
3085 | int funcdesc_offset; | |
3086 | }; | |
3087 | ||
0ffa91dd | 3088 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
3089 | { |
3090 | struct elf_obj_tdata root; | |
3091 | ||
3092 | /* tls_type for each local got entry. */ | |
3093 | char *local_got_tls_type; | |
ee065d83 | 3094 | |
0855e32b NS |
3095 | /* GOTPLT entries for TLS descriptors. */ |
3096 | bfd_vma *local_tlsdesc_gotent; | |
3097 | ||
34e77a92 RS |
3098 | /* Information for local symbols that need entries in .iplt. */ |
3099 | struct arm_local_iplt_info **local_iplt; | |
3100 | ||
bf21ed78 MS |
3101 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
3102 | int no_enum_size_warning; | |
a9dc9481 JM |
3103 | |
3104 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
3105 | int no_wchar_size_warning; | |
e8b09b87 CL |
3106 | |
3107 | /* Maintains FDPIC counters and funcdesc info. */ | |
3108 | struct fdpic_local *local_fdpic_cnts; | |
ba93b8ac DJ |
3109 | }; |
3110 | ||
0ffa91dd NC |
3111 | #define elf_arm_tdata(bfd) \ |
3112 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 3113 | |
0ffa91dd NC |
3114 | #define elf32_arm_local_got_tls_type(bfd) \ |
3115 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
3116 | ||
0855e32b NS |
3117 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
3118 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) | |
3119 | ||
34e77a92 RS |
3120 | #define elf32_arm_local_iplt(bfd) \ |
3121 | (elf_arm_tdata (bfd)->local_iplt) | |
3122 | ||
e8b09b87 CL |
3123 | #define elf32_arm_local_fdpic_cnts(bfd) \ |
3124 | (elf_arm_tdata (bfd)->local_fdpic_cnts) | |
3125 | ||
0ffa91dd NC |
3126 | #define is_arm_elf(bfd) \ |
3127 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
3128 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 3129 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac DJ |
3130 | |
3131 | static bfd_boolean | |
3132 | elf32_arm_mkobject (bfd *abfd) | |
3133 | { | |
0ffa91dd | 3134 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 3135 | ARM_ELF_DATA); |
ba93b8ac DJ |
3136 | } |
3137 | ||
ba93b8ac DJ |
3138 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
3139 | ||
e8b09b87 CL |
3140 | /* Structure to handle FDPIC support for extern functions. */ |
3141 | struct fdpic_global { | |
3142 | unsigned int gotofffuncdesc_cnt; | |
3143 | unsigned int gotfuncdesc_cnt; | |
3144 | unsigned int funcdesc_cnt; | |
3145 | int funcdesc_offset; | |
3146 | int gotfuncdesc_offset; | |
3147 | }; | |
3148 | ||
ba96a88f | 3149 | /* Arm ELF linker hash entry. */ |
252b5132 | 3150 | struct elf32_arm_link_hash_entry |
b38cadfb NC |
3151 | { |
3152 | struct elf_link_hash_entry root; | |
252b5132 | 3153 | |
b38cadfb NC |
3154 | /* Track dynamic relocs copied for this symbol. */ |
3155 | struct elf_dyn_relocs *dyn_relocs; | |
b7693d02 | 3156 | |
b38cadfb NC |
3157 | /* ARM-specific PLT information. */ |
3158 | struct arm_plt_info plt; | |
ba93b8ac DJ |
3159 | |
3160 | #define GOT_UNKNOWN 0 | |
3161 | #define GOT_NORMAL 1 | |
3162 | #define GOT_TLS_GD 2 | |
3163 | #define GOT_TLS_IE 4 | |
0855e32b NS |
3164 | #define GOT_TLS_GDESC 8 |
3165 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) | |
b38cadfb | 3166 | unsigned int tls_type : 8; |
34e77a92 | 3167 | |
b38cadfb NC |
3168 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ |
3169 | unsigned int is_iplt : 1; | |
34e77a92 | 3170 | |
b38cadfb | 3171 | unsigned int unused : 23; |
a4fd1a8e | 3172 | |
b38cadfb NC |
3173 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
3174 | starting at the end of the jump table. */ | |
3175 | bfd_vma tlsdesc_got; | |
0855e32b | 3176 | |
b38cadfb NC |
3177 | /* The symbol marking the real symbol location for exported thumb |
3178 | symbols with Arm stubs. */ | |
3179 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 3180 | |
b38cadfb | 3181 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 3182 | symbol. */ |
b38cadfb | 3183 | struct elf32_arm_stub_hash_entry *stub_cache; |
e8b09b87 CL |
3184 | |
3185 | /* Counter for FDPIC relocations against this symbol. */ | |
3186 | struct fdpic_global fdpic_cnts; | |
b38cadfb | 3187 | }; |
252b5132 | 3188 | |
252b5132 | 3189 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
3190 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
3191 | (elf_link_hash_traverse \ | |
3192 | (&(table)->root, \ | |
b7693d02 | 3193 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
3194 | (info))) |
3195 | ||
3196 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
3197 | #define elf32_arm_hash_table(info) \ | |
4dfe6ac6 NC |
3198 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
3199 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) | |
252b5132 | 3200 | |
906e58ca NC |
3201 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
3202 | ((struct elf32_arm_stub_hash_entry *) \ | |
3203 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
3204 | ||
21d799b5 NC |
3205 | /* Array to keep track of which stub sections have been created, and |
3206 | information on stub grouping. */ | |
3207 | struct map_stub | |
3208 | { | |
3209 | /* This is the section to which stubs in the group will be | |
3210 | attached. */ | |
3211 | asection *link_sec; | |
3212 | /* The stub section. */ | |
3213 | asection *stub_sec; | |
3214 | }; | |
3215 | ||
0855e32b NS |
3216 | #define elf32_arm_compute_jump_table_size(htab) \ |
3217 | ((htab)->next_tls_desc_index * 4) | |
3218 | ||
9b485d32 | 3219 | /* ARM ELF linker hash table. */ |
252b5132 | 3220 | struct elf32_arm_link_hash_table |
906e58ca NC |
3221 | { |
3222 | /* The main hash table. */ | |
3223 | struct elf_link_hash_table root; | |
252b5132 | 3224 | |
906e58ca NC |
3225 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
3226 | bfd_size_type thumb_glue_size; | |
252b5132 | 3227 | |
906e58ca NC |
3228 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
3229 | bfd_size_type arm_glue_size; | |
252b5132 | 3230 | |
906e58ca NC |
3231 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
3232 | bfd_size_type bx_glue_size; | |
845b51d6 | 3233 | |
906e58ca NC |
3234 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
3235 | veneer has been populated. */ | |
3236 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 3237 | |
906e58ca NC |
3238 | /* The size in bytes of the section containing glue for VFP11 erratum |
3239 | veneers. */ | |
3240 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 3241 | |
a504d23a LA |
3242 | /* The size in bytes of the section containing glue for STM32L4XX erratum |
3243 | veneers. */ | |
3244 | bfd_size_type stm32l4xx_erratum_glue_size; | |
3245 | ||
48229727 JB |
3246 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
3247 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
3248 | elf32_arm_write_section(). */ | |
3249 | struct a8_erratum_fix *a8_erratum_fixes; | |
3250 | unsigned int num_a8_erratum_fixes; | |
3251 | ||
906e58ca NC |
3252 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
3253 | bfd * bfd_of_glue_owner; | |
ba96a88f | 3254 | |
906e58ca NC |
3255 | /* Nonzero to output a BE8 image. */ |
3256 | int byteswap_code; | |
e489d0ae | 3257 | |
906e58ca NC |
3258 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
3259 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
3260 | int target1_is_rel; | |
9c504268 | 3261 | |
906e58ca NC |
3262 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
3263 | int target2_reloc; | |
eb043451 | 3264 | |
906e58ca NC |
3265 | /* 0 = Ignore R_ARM_V4BX. |
3266 | 1 = Convert BX to MOV PC. | |
3267 | 2 = Generate v4 interworing stubs. */ | |
3268 | int fix_v4bx; | |
319850b4 | 3269 | |
48229727 JB |
3270 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
3271 | int fix_cortex_a8; | |
3272 | ||
2de70689 MGD |
3273 | /* Whether we should fix the ARM1176 BLX immediate issue. */ |
3274 | int fix_arm1176; | |
3275 | ||
906e58ca NC |
3276 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
3277 | int use_blx; | |
33bfe774 | 3278 | |
906e58ca NC |
3279 | /* What sort of code sequences we should look for which may trigger the |
3280 | VFP11 denorm erratum. */ | |
3281 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 3282 | |
906e58ca NC |
3283 | /* Global counter for the number of fixes we have emitted. */ |
3284 | int num_vfp11_fixes; | |
c7b8f16e | 3285 | |
a504d23a LA |
3286 | /* What sort of code sequences we should look for which may trigger the |
3287 | STM32L4XX erratum. */ | |
3288 | bfd_arm_stm32l4xx_fix stm32l4xx_fix; | |
3289 | ||
3290 | /* Global counter for the number of fixes we have emitted. */ | |
3291 | int num_stm32l4xx_fixes; | |
3292 | ||
906e58ca NC |
3293 | /* Nonzero to force PIC branch veneers. */ |
3294 | int pic_veneer; | |
27e55c4d | 3295 | |
906e58ca NC |
3296 | /* The number of bytes in the initial entry in the PLT. */ |
3297 | bfd_size_type plt_header_size; | |
e5a52504 | 3298 | |
906e58ca NC |
3299 | /* The number of bytes in the subsequent PLT etries. */ |
3300 | bfd_size_type plt_entry_size; | |
e5a52504 | 3301 | |
906e58ca NC |
3302 | /* True if the target system is VxWorks. */ |
3303 | int vxworks_p; | |
00a97672 | 3304 | |
906e58ca NC |
3305 | /* True if the target system is Symbian OS. */ |
3306 | int symbian_p; | |
e5a52504 | 3307 | |
b38cadfb NC |
3308 | /* True if the target system is Native Client. */ |
3309 | int nacl_p; | |
3310 | ||
906e58ca | 3311 | /* True if the target uses REL relocations. */ |
f3185997 | 3312 | bfd_boolean use_rel; |
4e7fd91e | 3313 | |
54ddd295 TP |
3314 | /* Nonzero if import library must be a secure gateway import library |
3315 | as per ARMv8-M Security Extensions. */ | |
3316 | int cmse_implib; | |
3317 | ||
0955507f TP |
3318 | /* The import library whose symbols' address must remain stable in |
3319 | the import library generated. */ | |
3320 | bfd *in_implib_bfd; | |
3321 | ||
0855e32b NS |
3322 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
3323 | bfd_vma next_tls_desc_index; | |
3324 | ||
3325 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ | |
3326 | bfd_vma num_tls_desc; | |
3327 | ||
906e58ca NC |
3328 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
3329 | asection *srelplt2; | |
00a97672 | 3330 | |
0855e32b NS |
3331 | /* The offset into splt of the PLT entry for the TLS descriptor |
3332 | resolver. Special values are 0, if not necessary (or not found | |
3333 | to be necessary yet), and -1 if needed but not determined | |
3334 | yet. */ | |
3335 | bfd_vma dt_tlsdesc_plt; | |
3336 | ||
3337 | /* The offset into sgot of the GOT entry used by the PLT entry | |
3338 | above. */ | |
b38cadfb | 3339 | bfd_vma dt_tlsdesc_got; |
0855e32b NS |
3340 | |
3341 | /* Offset in .plt section of tls_arm_trampoline. */ | |
3342 | bfd_vma tls_trampoline; | |
3343 | ||
5c5a4843 | 3344 | /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */ |
906e58ca NC |
3345 | union |
3346 | { | |
3347 | bfd_signed_vma refcount; | |
3348 | bfd_vma offset; | |
3349 | } tls_ldm_got; | |
b7693d02 | 3350 | |
87d72d41 AM |
3351 | /* Small local sym cache. */ |
3352 | struct sym_cache sym_cache; | |
906e58ca NC |
3353 | |
3354 | /* For convenience in allocate_dynrelocs. */ | |
3355 | bfd * obfd; | |
3356 | ||
0855e32b NS |
3357 | /* The amount of space used by the reserved portion of the sgotplt |
3358 | section, plus whatever space is used by the jump slots. */ | |
3359 | bfd_vma sgotplt_jump_table_size; | |
3360 | ||
906e58ca NC |
3361 | /* The stub hash table. */ |
3362 | struct bfd_hash_table stub_hash_table; | |
3363 | ||
3364 | /* Linker stub bfd. */ | |
3365 | bfd *stub_bfd; | |
3366 | ||
3367 | /* Linker call-backs. */ | |
6bde4c52 TP |
3368 | asection * (*add_stub_section) (const char *, asection *, asection *, |
3369 | unsigned int); | |
906e58ca NC |
3370 | void (*layout_sections_again) (void); |
3371 | ||
3372 | /* Array to keep track of which stub sections have been created, and | |
3373 | information on stub grouping. */ | |
21d799b5 | 3374 | struct map_stub *stub_group; |
906e58ca | 3375 | |
4ba2ef8f TP |
3376 | /* Input stub section holding secure gateway veneers. */ |
3377 | asection *cmse_stub_sec; | |
3378 | ||
0955507f TP |
3379 | /* Offset in cmse_stub_sec where new SG veneers (not in input import library) |
3380 | start to be allocated. */ | |
3381 | bfd_vma new_cmse_stub_offset; | |
3382 | ||
fe33d2fa | 3383 | /* Number of elements in stub_group. */ |
7292b3ac | 3384 | unsigned int top_id; |
fe33d2fa | 3385 | |
906e58ca NC |
3386 | /* Assorted information used by elf32_arm_size_stubs. */ |
3387 | unsigned int bfd_count; | |
7292b3ac | 3388 | unsigned int top_index; |
906e58ca | 3389 | asection **input_list; |
617a5ada CL |
3390 | |
3391 | /* True if the target system uses FDPIC. */ | |
3392 | int fdpic_p; | |
e8b09b87 CL |
3393 | |
3394 | /* Fixup section. Used for FDPIC. */ | |
3395 | asection *srofixup; | |
906e58ca | 3396 | }; |
252b5132 | 3397 | |
e8b09b87 CL |
3398 | /* Add an FDPIC read-only fixup. */ |
3399 | static void | |
3400 | arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset) | |
3401 | { | |
3402 | bfd_vma fixup_offset; | |
3403 | ||
3404 | fixup_offset = srofixup->reloc_count++ * 4; | |
3405 | BFD_ASSERT (fixup_offset < srofixup->size); | |
3406 | bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset); | |
3407 | } | |
3408 | ||
a504d23a LA |
3409 | static inline int |
3410 | ctz (unsigned int mask) | |
3411 | { | |
3412 | #if GCC_VERSION >= 3004 | |
3413 | return __builtin_ctz (mask); | |
3414 | #else | |
3415 | unsigned int i; | |
3416 | ||
3417 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3418 | { | |
3419 | if (mask & 0x1) | |
3420 | break; | |
3421 | mask = (mask >> 1); | |
3422 | } | |
3423 | return i; | |
3424 | #endif | |
3425 | } | |
3426 | ||
3427 | static inline int | |
b25e998d | 3428 | elf32_arm_popcount (unsigned int mask) |
a504d23a LA |
3429 | { |
3430 | #if GCC_VERSION >= 3004 | |
3431 | return __builtin_popcount (mask); | |
3432 | #else | |
b25e998d CG |
3433 | unsigned int i; |
3434 | int sum = 0; | |
a504d23a LA |
3435 | |
3436 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3437 | { | |
3438 | if (mask & 0x1) | |
3439 | sum++; | |
3440 | mask = (mask >> 1); | |
3441 | } | |
3442 | return sum; | |
3443 | #endif | |
3444 | } | |
3445 | ||
e8b09b87 CL |
3446 | static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, |
3447 | asection *sreloc, Elf_Internal_Rela *rel); | |
3448 | ||
3449 | static void | |
3450 | arm_elf_fill_funcdesc(bfd *output_bfd, | |
3451 | struct bfd_link_info *info, | |
3452 | int *funcdesc_offset, | |
3453 | int dynindx, | |
3454 | int offset, | |
3455 | bfd_vma addr, | |
3456 | bfd_vma dynreloc_value, | |
3457 | bfd_vma seg) | |
3458 | { | |
3459 | if ((*funcdesc_offset & 1) == 0) | |
3460 | { | |
3461 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
3462 | asection *sgot = globals->root.sgot; | |
3463 | ||
3464 | if (bfd_link_pic(info)) | |
3465 | { | |
3466 | asection *srelgot = globals->root.srelgot; | |
3467 | Elf_Internal_Rela outrel; | |
3468 | ||
3469 | outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE); | |
3470 | outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset; | |
3471 | outrel.r_addend = 0; | |
3472 | ||
3473 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
3474 | bfd_put_32 (output_bfd, addr, sgot->contents + offset); | |
3475 | bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4); | |
3476 | } | |
3477 | else | |
3478 | { | |
3479 | struct elf_link_hash_entry *hgot = globals->root.hgot; | |
3480 | bfd_vma got_value = hgot->root.u.def.value | |
3481 | + hgot->root.u.def.section->output_section->vma | |
3482 | + hgot->root.u.def.section->output_offset; | |
3483 | ||
3484 | arm_elf_add_rofixup(output_bfd, globals->srofixup, | |
3485 | sgot->output_section->vma + sgot->output_offset | |
3486 | + offset); | |
3487 | arm_elf_add_rofixup(output_bfd, globals->srofixup, | |
3488 | sgot->output_section->vma + sgot->output_offset | |
3489 | + offset + 4); | |
3490 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset); | |
3491 | bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4); | |
3492 | } | |
3493 | *funcdesc_offset |= 1; | |
3494 | } | |
3495 | } | |
3496 | ||
780a67af NC |
3497 | /* Create an entry in an ARM ELF linker hash table. */ |
3498 | ||
3499 | static struct bfd_hash_entry * | |
57e8b36a | 3500 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
99059e56 RM |
3501 | struct bfd_hash_table * table, |
3502 | const char * string) | |
780a67af NC |
3503 | { |
3504 | struct elf32_arm_link_hash_entry * ret = | |
3505 | (struct elf32_arm_link_hash_entry *) entry; | |
3506 | ||
3507 | /* Allocate the structure if it has not already been allocated by a | |
3508 | subclass. */ | |
906e58ca | 3509 | if (ret == NULL) |
21d799b5 | 3510 | ret = (struct elf32_arm_link_hash_entry *) |
99059e56 | 3511 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); |
57e8b36a | 3512 | if (ret == NULL) |
780a67af NC |
3513 | return (struct bfd_hash_entry *) ret; |
3514 | ||
3515 | /* Call the allocation method of the superclass. */ | |
3516 | ret = ((struct elf32_arm_link_hash_entry *) | |
3517 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
3518 | table, string)); | |
57e8b36a | 3519 | if (ret != NULL) |
b7693d02 | 3520 | { |
0bdcacaf | 3521 | ret->dyn_relocs = NULL; |
ba93b8ac | 3522 | ret->tls_type = GOT_UNKNOWN; |
0855e32b | 3523 | ret->tlsdesc_got = (bfd_vma) -1; |
34e77a92 RS |
3524 | ret->plt.thumb_refcount = 0; |
3525 | ret->plt.maybe_thumb_refcount = 0; | |
3526 | ret->plt.noncall_refcount = 0; | |
3527 | ret->plt.got_offset = -1; | |
3528 | ret->is_iplt = FALSE; | |
a4fd1a8e | 3529 | ret->export_glue = NULL; |
906e58ca NC |
3530 | |
3531 | ret->stub_cache = NULL; | |
e8b09b87 CL |
3532 | |
3533 | ret->fdpic_cnts.gotofffuncdesc_cnt = 0; | |
3534 | ret->fdpic_cnts.gotfuncdesc_cnt = 0; | |
3535 | ret->fdpic_cnts.funcdesc_cnt = 0; | |
3536 | ret->fdpic_cnts.funcdesc_offset = -1; | |
3537 | ret->fdpic_cnts.gotfuncdesc_offset = -1; | |
b7693d02 | 3538 | } |
780a67af NC |
3539 | |
3540 | return (struct bfd_hash_entry *) ret; | |
3541 | } | |
3542 | ||
34e77a92 RS |
3543 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
3544 | symbols. */ | |
3545 | ||
3546 | static bfd_boolean | |
3547 | elf32_arm_allocate_local_sym_info (bfd *abfd) | |
3548 | { | |
3549 | if (elf_local_got_refcounts (abfd) == NULL) | |
3550 | { | |
3551 | bfd_size_type num_syms; | |
3552 | bfd_size_type size; | |
3553 | char *data; | |
3554 | ||
3555 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; | |
3556 | size = num_syms * (sizeof (bfd_signed_vma) | |
3557 | + sizeof (struct arm_local_iplt_info *) | |
3558 | + sizeof (bfd_vma) | |
e8b09b87 CL |
3559 | + sizeof (char) |
3560 | + sizeof (struct fdpic_local)); | |
34e77a92 RS |
3561 | data = bfd_zalloc (abfd, size); |
3562 | if (data == NULL) | |
3563 | return FALSE; | |
3564 | ||
e8b09b87 CL |
3565 | elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data; |
3566 | data += num_syms * sizeof (struct fdpic_local); | |
3567 | ||
34e77a92 RS |
3568 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data; |
3569 | data += num_syms * sizeof (bfd_signed_vma); | |
3570 | ||
3571 | elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data; | |
3572 | data += num_syms * sizeof (struct arm_local_iplt_info *); | |
3573 | ||
3574 | elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data; | |
3575 | data += num_syms * sizeof (bfd_vma); | |
3576 | ||
3577 | elf32_arm_local_got_tls_type (abfd) = data; | |
3578 | } | |
3579 | return TRUE; | |
3580 | } | |
3581 | ||
3582 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs | |
3583 | to input bfd ABFD. Create the information if it doesn't already exist. | |
3584 | Return null if an allocation fails. */ | |
3585 | ||
3586 | static struct arm_local_iplt_info * | |
3587 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) | |
3588 | { | |
3589 | struct arm_local_iplt_info **ptr; | |
3590 | ||
3591 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
3592 | return NULL; | |
3593 | ||
3594 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); | |
3595 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; | |
3596 | if (*ptr == NULL) | |
3597 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); | |
3598 | return *ptr; | |
3599 | } | |
3600 | ||
3601 | /* Try to obtain PLT information for the symbol with index R_SYMNDX | |
3602 | in ABFD's symbol table. If the symbol is global, H points to its | |
3603 | hash table entry, otherwise H is null. | |
3604 | ||
3605 | Return true if the symbol does have PLT information. When returning | |
3606 | true, point *ROOT_PLT at the target-independent reference count/offset | |
3607 | union and *ARM_PLT at the ARM-specific information. */ | |
3608 | ||
3609 | static bfd_boolean | |
4ba2ef8f TP |
3610 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals, |
3611 | struct elf32_arm_link_hash_entry *h, | |
34e77a92 RS |
3612 | unsigned long r_symndx, union gotplt_union **root_plt, |
3613 | struct arm_plt_info **arm_plt) | |
3614 | { | |
3615 | struct arm_local_iplt_info *local_iplt; | |
3616 | ||
4ba2ef8f TP |
3617 | if (globals->root.splt == NULL && globals->root.iplt == NULL) |
3618 | return FALSE; | |
3619 | ||
34e77a92 RS |
3620 | if (h != NULL) |
3621 | { | |
3622 | *root_plt = &h->root.plt; | |
3623 | *arm_plt = &h->plt; | |
3624 | return TRUE; | |
3625 | } | |
3626 | ||
3627 | if (elf32_arm_local_iplt (abfd) == NULL) | |
3628 | return FALSE; | |
3629 | ||
3630 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; | |
3631 | if (local_iplt == NULL) | |
3632 | return FALSE; | |
3633 | ||
3634 | *root_plt = &local_iplt->root; | |
3635 | *arm_plt = &local_iplt->arm; | |
3636 | return TRUE; | |
3637 | } | |
3638 | ||
59029f57 CL |
3639 | static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals); |
3640 | ||
34e77a92 RS |
3641 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub |
3642 | before it. */ | |
3643 | ||
3644 | static bfd_boolean | |
3645 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, | |
3646 | struct arm_plt_info *arm_plt) | |
3647 | { | |
3648 | struct elf32_arm_link_hash_table *htab; | |
3649 | ||
3650 | htab = elf32_arm_hash_table (info); | |
59029f57 CL |
3651 | |
3652 | return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0 | |
3653 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0))); | |
34e77a92 RS |
3654 | } |
3655 | ||
3656 | /* Return a pointer to the head of the dynamic reloc list that should | |
3657 | be used for local symbol ISYM, which is symbol number R_SYMNDX in | |
3658 | ABFD's symbol table. Return null if an error occurs. */ | |
3659 | ||
3660 | static struct elf_dyn_relocs ** | |
3661 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, | |
3662 | Elf_Internal_Sym *isym) | |
3663 | { | |
3664 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) | |
3665 | { | |
3666 | struct arm_local_iplt_info *local_iplt; | |
3667 | ||
3668 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
3669 | if (local_iplt == NULL) | |
3670 | return NULL; | |
3671 | return &local_iplt->dyn_relocs; | |
3672 | } | |
3673 | else | |
3674 | { | |
3675 | /* Track dynamic relocs needed for local syms too. | |
3676 | We really need local syms available to do this | |
3677 | easily. Oh well. */ | |
3678 | asection *s; | |
3679 | void *vpp; | |
3680 | ||
3681 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
3682 | if (s == NULL) | |
3683 | abort (); | |
3684 | ||
3685 | vpp = &elf_section_data (s)->local_dynrel; | |
3686 | return (struct elf_dyn_relocs **) vpp; | |
3687 | } | |
3688 | } | |
3689 | ||
906e58ca NC |
3690 | /* Initialize an entry in the stub hash table. */ |
3691 | ||
3692 | static struct bfd_hash_entry * | |
3693 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
3694 | struct bfd_hash_table *table, | |
3695 | const char *string) | |
3696 | { | |
3697 | /* Allocate the structure if it has not already been allocated by a | |
3698 | subclass. */ | |
3699 | if (entry == NULL) | |
3700 | { | |
21d799b5 | 3701 | entry = (struct bfd_hash_entry *) |
99059e56 | 3702 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); |
906e58ca NC |
3703 | if (entry == NULL) |
3704 | return entry; | |
3705 | } | |
3706 | ||
3707 | /* Call the allocation method of the superclass. */ | |
3708 | entry = bfd_hash_newfunc (entry, table, string); | |
3709 | if (entry != NULL) | |
3710 | { | |
3711 | struct elf32_arm_stub_hash_entry *eh; | |
3712 | ||
3713 | /* Initialize the local fields. */ | |
3714 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
3715 | eh->stub_sec = NULL; | |
0955507f | 3716 | eh->stub_offset = (bfd_vma) -1; |
8d9d9490 | 3717 | eh->source_value = 0; |
906e58ca NC |
3718 | eh->target_value = 0; |
3719 | eh->target_section = NULL; | |
cedfb179 | 3720 | eh->orig_insn = 0; |
906e58ca | 3721 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
3722 | eh->stub_size = 0; |
3723 | eh->stub_template = NULL; | |
0955507f | 3724 | eh->stub_template_size = -1; |
906e58ca NC |
3725 | eh->h = NULL; |
3726 | eh->id_sec = NULL; | |
d8d2f433 | 3727 | eh->output_name = NULL; |
906e58ca NC |
3728 | } |
3729 | ||
3730 | return entry; | |
3731 | } | |
3732 | ||
00a97672 | 3733 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
3734 | shortcuts to them in our hash table. */ |
3735 | ||
3736 | static bfd_boolean | |
57e8b36a | 3737 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3738 | { |
3739 | struct elf32_arm_link_hash_table *htab; | |
3740 | ||
e5a52504 | 3741 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3742 | if (htab == NULL) |
3743 | return FALSE; | |
3744 | ||
e5a52504 MM |
3745 | /* BPABI objects never have a GOT, or associated sections. */ |
3746 | if (htab->symbian_p) | |
3747 | return TRUE; | |
3748 | ||
5e681ec4 PB |
3749 | if (! _bfd_elf_create_got_section (dynobj, info)) |
3750 | return FALSE; | |
3751 | ||
e8b09b87 CL |
3752 | /* Also create .rofixup. */ |
3753 | if (htab->fdpic_p) | |
3754 | { | |
3755 | htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup", | |
3756 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | |
3757 | | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY)); | |
3758 | if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2)) | |
3759 | return FALSE; | |
3760 | } | |
3761 | ||
5e681ec4 PB |
3762 | return TRUE; |
3763 | } | |
3764 | ||
34e77a92 RS |
3765 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
3766 | ||
3767 | static bfd_boolean | |
3768 | create_ifunc_sections (struct bfd_link_info *info) | |
3769 | { | |
3770 | struct elf32_arm_link_hash_table *htab; | |
3771 | const struct elf_backend_data *bed; | |
3772 | bfd *dynobj; | |
3773 | asection *s; | |
3774 | flagword flags; | |
b38cadfb | 3775 | |
34e77a92 RS |
3776 | htab = elf32_arm_hash_table (info); |
3777 | dynobj = htab->root.dynobj; | |
3778 | bed = get_elf_backend_data (dynobj); | |
3779 | flags = bed->dynamic_sec_flags; | |
3780 | ||
3781 | if (htab->root.iplt == NULL) | |
3782 | { | |
3d4d4302 AM |
3783 | s = bfd_make_section_anyway_with_flags (dynobj, ".iplt", |
3784 | flags | SEC_READONLY | SEC_CODE); | |
34e77a92 | 3785 | if (s == NULL |
a0f49396 | 3786 | || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment)) |
34e77a92 RS |
3787 | return FALSE; |
3788 | htab->root.iplt = s; | |
3789 | } | |
3790 | ||
3791 | if (htab->root.irelplt == NULL) | |
3792 | { | |
3d4d4302 AM |
3793 | s = bfd_make_section_anyway_with_flags (dynobj, |
3794 | RELOC_SECTION (htab, ".iplt"), | |
3795 | flags | SEC_READONLY); | |
34e77a92 | 3796 | if (s == NULL |
a0f49396 | 3797 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) |
34e77a92 RS |
3798 | return FALSE; |
3799 | htab->root.irelplt = s; | |
3800 | } | |
3801 | ||
3802 | if (htab->root.igotplt == NULL) | |
3803 | { | |
3d4d4302 | 3804 | s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags); |
34e77a92 RS |
3805 | if (s == NULL |
3806 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) | |
3807 | return FALSE; | |
3808 | htab->root.igotplt = s; | |
3809 | } | |
3810 | return TRUE; | |
3811 | } | |
3812 | ||
eed94f8f NC |
3813 | /* Determine if we're dealing with a Thumb only architecture. */ |
3814 | ||
3815 | static bfd_boolean | |
3816 | using_thumb_only (struct elf32_arm_link_hash_table *globals) | |
3817 | { | |
2fd158eb TP |
3818 | int arch; |
3819 | int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3820 | Tag_CPU_arch_profile); | |
eed94f8f | 3821 | |
2fd158eb TP |
3822 | if (profile) |
3823 | return profile == 'M'; | |
eed94f8f | 3824 | |
2fd158eb | 3825 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
eed94f8f | 3826 | |
60a019a0 | 3827 | /* Force return logic to be reviewed for each new architecture. */ |
bff0500d | 3828 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); |
60a019a0 | 3829 | |
2fd158eb TP |
3830 | if (arch == TAG_CPU_ARCH_V6_M |
3831 | || arch == TAG_CPU_ARCH_V6S_M | |
3832 | || arch == TAG_CPU_ARCH_V7E_M | |
3833 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3834 | || arch == TAG_CPU_ARCH_V8M_MAIN) | |
3835 | return TRUE; | |
eed94f8f | 3836 | |
2fd158eb | 3837 | return FALSE; |
eed94f8f NC |
3838 | } |
3839 | ||
3840 | /* Determine if we're dealing with a Thumb-2 object. */ | |
3841 | ||
3842 | static bfd_boolean | |
3843 | using_thumb2 (struct elf32_arm_link_hash_table *globals) | |
3844 | { | |
60a019a0 TP |
3845 | int arch; |
3846 | int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3847 | Tag_THUMB_ISA_use); | |
3848 | ||
3849 | if (thumb_isa) | |
3850 | return thumb_isa == 2; | |
3851 | ||
3852 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
3853 | ||
3854 | /* Force return logic to be reviewed for each new architecture. */ | |
bff0500d | 3855 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); |
60a019a0 TP |
3856 | |
3857 | return (arch == TAG_CPU_ARCH_V6T2 | |
3858 | || arch == TAG_CPU_ARCH_V7 | |
3859 | || arch == TAG_CPU_ARCH_V7E_M | |
3860 | || arch == TAG_CPU_ARCH_V8 | |
bff0500d | 3861 | || arch == TAG_CPU_ARCH_V8R |
60a019a0 | 3862 | || arch == TAG_CPU_ARCH_V8M_MAIN); |
eed94f8f NC |
3863 | } |
3864 | ||
5e866f5a TP |
3865 | /* Determine whether Thumb-2 BL instruction is available. */ |
3866 | ||
3867 | static bfd_boolean | |
3868 | using_thumb2_bl (struct elf32_arm_link_hash_table *globals) | |
3869 | { | |
3870 | int arch = | |
3871 | bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
3872 | ||
3873 | /* Force return logic to be reviewed for each new architecture. */ | |
bff0500d | 3874 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); |
5e866f5a TP |
3875 | |
3876 | /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */ | |
3877 | return (arch == TAG_CPU_ARCH_V6T2 | |
3878 | || arch >= TAG_CPU_ARCH_V7); | |
3879 | } | |
3880 | ||
00a97672 RS |
3881 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
3882 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
3883 | hash table. */ |
3884 | ||
3885 | static bfd_boolean | |
57e8b36a | 3886 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3887 | { |
3888 | struct elf32_arm_link_hash_table *htab; | |
3889 | ||
3890 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3891 | if (htab == NULL) |
3892 | return FALSE; | |
3893 | ||
362d30a1 | 3894 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
5e681ec4 PB |
3895 | return FALSE; |
3896 | ||
3897 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
3898 | return FALSE; | |
3899 | ||
00a97672 RS |
3900 | if (htab->vxworks_p) |
3901 | { | |
3902 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
3903 | return FALSE; | |
3904 | ||
0e1862bb | 3905 | if (bfd_link_pic (info)) |
00a97672 RS |
3906 | { |
3907 | htab->plt_header_size = 0; | |
3908 | htab->plt_entry_size | |
3909 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
3910 | } | |
3911 | else | |
3912 | { | |
3913 | htab->plt_header_size | |
3914 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
3915 | htab->plt_entry_size | |
3916 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
3917 | } | |
aebf9be7 NC |
3918 | |
3919 | if (elf_elfheader (dynobj)) | |
3920 | elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32; | |
00a97672 | 3921 | } |
eed94f8f NC |
3922 | else |
3923 | { | |
3924 | /* PR ld/16017 | |
3925 | Test for thumb only architectures. Note - we cannot just call | |
3926 | using_thumb_only() as the attributes in the output bfd have not been | |
3927 | initialised at this point, so instead we use the input bfd. */ | |
3928 | bfd * saved_obfd = htab->obfd; | |
3929 | ||
3930 | htab->obfd = dynobj; | |
3931 | if (using_thumb_only (htab)) | |
3932 | { | |
3933 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
3934 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); | |
3935 | } | |
3936 | htab->obfd = saved_obfd; | |
3937 | } | |
5e681ec4 | 3938 | |
7801f98f CL |
3939 | if (htab->fdpic_p) { |
3940 | htab->plt_header_size = 0; | |
3941 | if (info->flags & DF_BIND_NOW) | |
3942 | htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5); | |
3943 | else | |
3944 | htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry); | |
3945 | } | |
3946 | ||
362d30a1 RS |
3947 | if (!htab->root.splt |
3948 | || !htab->root.srelplt | |
9d19e4fd AM |
3949 | || !htab->root.sdynbss |
3950 | || (!bfd_link_pic (info) && !htab->root.srelbss)) | |
5e681ec4 PB |
3951 | abort (); |
3952 | ||
3953 | return TRUE; | |
3954 | } | |
3955 | ||
906e58ca NC |
3956 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
3957 | ||
3958 | static void | |
3959 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
3960 | struct elf_link_hash_entry *dir, | |
3961 | struct elf_link_hash_entry *ind) | |
3962 | { | |
3963 | struct elf32_arm_link_hash_entry *edir, *eind; | |
3964 | ||
3965 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
3966 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
3967 | ||
0bdcacaf | 3968 | if (eind->dyn_relocs != NULL) |
906e58ca | 3969 | { |
0bdcacaf | 3970 | if (edir->dyn_relocs != NULL) |
906e58ca | 3971 | { |
0bdcacaf RS |
3972 | struct elf_dyn_relocs **pp; |
3973 | struct elf_dyn_relocs *p; | |
906e58ca NC |
3974 | |
3975 | /* Add reloc counts against the indirect sym to the direct sym | |
3976 | list. Merge any entries against the same section. */ | |
0bdcacaf | 3977 | for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) |
906e58ca | 3978 | { |
0bdcacaf | 3979 | struct elf_dyn_relocs *q; |
906e58ca | 3980 | |
0bdcacaf RS |
3981 | for (q = edir->dyn_relocs; q != NULL; q = q->next) |
3982 | if (q->sec == p->sec) | |
906e58ca NC |
3983 | { |
3984 | q->pc_count += p->pc_count; | |
3985 | q->count += p->count; | |
3986 | *pp = p->next; | |
3987 | break; | |
3988 | } | |
3989 | if (q == NULL) | |
3990 | pp = &p->next; | |
3991 | } | |
0bdcacaf | 3992 | *pp = edir->dyn_relocs; |
906e58ca NC |
3993 | } |
3994 | ||
0bdcacaf RS |
3995 | edir->dyn_relocs = eind->dyn_relocs; |
3996 | eind->dyn_relocs = NULL; | |
906e58ca NC |
3997 | } |
3998 | ||
3999 | if (ind->root.type == bfd_link_hash_indirect) | |
4000 | { | |
4001 | /* Copy over PLT info. */ | |
34e77a92 RS |
4002 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
4003 | eind->plt.thumb_refcount = 0; | |
4004 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; | |
4005 | eind->plt.maybe_thumb_refcount = 0; | |
4006 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; | |
4007 | eind->plt.noncall_refcount = 0; | |
4008 | ||
e8b09b87 CL |
4009 | /* Copy FDPIC counters. */ |
4010 | edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt; | |
4011 | edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt; | |
4012 | edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt; | |
4013 | ||
34e77a92 RS |
4014 | /* We should only allocate a function to .iplt once the final |
4015 | symbol information is known. */ | |
4016 | BFD_ASSERT (!eind->is_iplt); | |
906e58ca NC |
4017 | |
4018 | if (dir->got.refcount <= 0) | |
4019 | { | |
4020 | edir->tls_type = eind->tls_type; | |
4021 | eind->tls_type = GOT_UNKNOWN; | |
4022 | } | |
4023 | } | |
4024 | ||
4025 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
4026 | } | |
4027 | ||
68faa637 AM |
4028 | /* Destroy an ARM elf linker hash table. */ |
4029 | ||
4030 | static void | |
d495ab0d | 4031 | elf32_arm_link_hash_table_free (bfd *obfd) |
68faa637 AM |
4032 | { |
4033 | struct elf32_arm_link_hash_table *ret | |
d495ab0d | 4034 | = (struct elf32_arm_link_hash_table *) obfd->link.hash; |
68faa637 AM |
4035 | |
4036 | bfd_hash_table_free (&ret->stub_hash_table); | |
d495ab0d | 4037 | _bfd_elf_link_hash_table_free (obfd); |
68faa637 AM |
4038 | } |
4039 | ||
906e58ca NC |
4040 | /* Create an ARM elf linker hash table. */ |
4041 | ||
4042 | static struct bfd_link_hash_table * | |
4043 | elf32_arm_link_hash_table_create (bfd *abfd) | |
4044 | { | |
4045 | struct elf32_arm_link_hash_table *ret; | |
4046 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); | |
4047 | ||
7bf52ea2 | 4048 | ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt); |
906e58ca NC |
4049 | if (ret == NULL) |
4050 | return NULL; | |
4051 | ||
4052 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
4053 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
4054 | sizeof (struct elf32_arm_link_hash_entry), |
4055 | ARM_ELF_DATA)) | |
906e58ca NC |
4056 | { |
4057 | free (ret); | |
4058 | return NULL; | |
4059 | } | |
4060 | ||
906e58ca | 4061 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
a504d23a | 4062 | ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE; |
906e58ca NC |
4063 | #ifdef FOUR_WORD_PLT |
4064 | ret->plt_header_size = 16; | |
4065 | ret->plt_entry_size = 16; | |
4066 | #else | |
4067 | ret->plt_header_size = 20; | |
1db37fe6 | 4068 | ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12; |
906e58ca | 4069 | #endif |
f3185997 | 4070 | ret->use_rel = TRUE; |
906e58ca | 4071 | ret->obfd = abfd; |
617a5ada | 4072 | ret->fdpic_p = 0; |
906e58ca NC |
4073 | |
4074 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
4075 | sizeof (struct elf32_arm_stub_hash_entry))) | |
4076 | { | |
d495ab0d | 4077 | _bfd_elf_link_hash_table_free (abfd); |
906e58ca NC |
4078 | return NULL; |
4079 | } | |
d495ab0d | 4080 | ret->root.root.hash_table_free = elf32_arm_link_hash_table_free; |
906e58ca NC |
4081 | |
4082 | return &ret->root.root; | |
4083 | } | |
4084 | ||
cd1dac3d DG |
4085 | /* Determine what kind of NOPs are available. */ |
4086 | ||
4087 | static bfd_boolean | |
4088 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) | |
4089 | { | |
4090 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
4091 | Tag_CPU_arch); | |
cd1dac3d | 4092 | |
60a019a0 | 4093 | /* Force return logic to be reviewed for each new architecture. */ |
bff0500d | 4094 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN); |
60a019a0 TP |
4095 | |
4096 | return (arch == TAG_CPU_ARCH_V6T2 | |
4097 | || arch == TAG_CPU_ARCH_V6K | |
4098 | || arch == TAG_CPU_ARCH_V7 | |
bff0500d TP |
4099 | || arch == TAG_CPU_ARCH_V8 |
4100 | || arch == TAG_CPU_ARCH_V8R); | |
cd1dac3d DG |
4101 | } |
4102 | ||
f4ac8484 DJ |
4103 | static bfd_boolean |
4104 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) | |
4105 | { | |
4106 | switch (stub_type) | |
4107 | { | |
fea2b4d6 | 4108 | case arm_stub_long_branch_thumb_only: |
80c135e5 | 4109 | case arm_stub_long_branch_thumb2_only: |
d5a67c02 | 4110 | case arm_stub_long_branch_thumb2_only_pure: |
fea2b4d6 CL |
4111 | case arm_stub_long_branch_v4t_thumb_arm: |
4112 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 | 4113 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
12352d3f | 4114 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
ebe24dd4 | 4115 | case arm_stub_long_branch_thumb_only_pic: |
4ba2ef8f | 4116 | case arm_stub_cmse_branch_thumb_only: |
f4ac8484 DJ |
4117 | return TRUE; |
4118 | case arm_stub_none: | |
4119 | BFD_FAIL (); | |
4120 | return FALSE; | |
4121 | break; | |
4122 | default: | |
4123 | return FALSE; | |
4124 | } | |
4125 | } | |
4126 | ||
906e58ca NC |
4127 | /* Determine the type of stub needed, if any, for a call. */ |
4128 | ||
4129 | static enum elf32_arm_stub_type | |
4130 | arm_type_of_stub (struct bfd_link_info *info, | |
4131 | asection *input_sec, | |
4132 | const Elf_Internal_Rela *rel, | |
34e77a92 | 4133 | unsigned char st_type, |
35fc36a8 | 4134 | enum arm_st_branch_type *actual_branch_type, |
906e58ca | 4135 | struct elf32_arm_link_hash_entry *hash, |
c820be07 NC |
4136 | bfd_vma destination, |
4137 | asection *sym_sec, | |
4138 | bfd *input_bfd, | |
4139 | const char *name) | |
906e58ca NC |
4140 | { |
4141 | bfd_vma location; | |
4142 | bfd_signed_vma branch_offset; | |
4143 | unsigned int r_type; | |
4144 | struct elf32_arm_link_hash_table * globals; | |
5e866f5a | 4145 | bfd_boolean thumb2, thumb2_bl, thumb_only; |
906e58ca | 4146 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
5fa9e92f | 4147 | int use_plt = 0; |
35fc36a8 | 4148 | enum arm_st_branch_type branch_type = *actual_branch_type; |
34e77a92 RS |
4149 | union gotplt_union *root_plt; |
4150 | struct arm_plt_info *arm_plt; | |
d5a67c02 AV |
4151 | int arch; |
4152 | int thumb2_movw; | |
906e58ca | 4153 | |
35fc36a8 | 4154 | if (branch_type == ST_BRANCH_LONG) |
da5938a2 NC |
4155 | return stub_type; |
4156 | ||
906e58ca | 4157 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
4158 | if (globals == NULL) |
4159 | return stub_type; | |
906e58ca NC |
4160 | |
4161 | thumb_only = using_thumb_only (globals); | |
906e58ca | 4162 | thumb2 = using_thumb2 (globals); |
5e866f5a | 4163 | thumb2_bl = using_thumb2_bl (globals); |
906e58ca | 4164 | |
d5a67c02 AV |
4165 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
4166 | ||
4167 | /* True for architectures that implement the thumb2 movw instruction. */ | |
4168 | thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE); | |
4169 | ||
906e58ca NC |
4170 | /* Determine where the call point is. */ |
4171 | location = (input_sec->output_offset | |
4172 | + input_sec->output_section->vma | |
4173 | + rel->r_offset); | |
4174 | ||
906e58ca NC |
4175 | r_type = ELF32_R_TYPE (rel->r_info); |
4176 | ||
39f21624 NC |
4177 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
4178 | are considering a function call relocation. */ | |
c5423981 | 4179 | if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
07d6d2b8 | 4180 | || r_type == R_ARM_THM_JUMP19) |
39f21624 NC |
4181 | && branch_type == ST_BRANCH_TO_ARM) |
4182 | branch_type = ST_BRANCH_TO_THUMB; | |
4183 | ||
34e77a92 RS |
4184 | /* For TLS call relocs, it is the caller's responsibility to provide |
4185 | the address of the appropriate trampoline. */ | |
4186 | if (r_type != R_ARM_TLS_CALL | |
4187 | && r_type != R_ARM_THM_TLS_CALL | |
4ba2ef8f TP |
4188 | && elf32_arm_get_plt_info (input_bfd, globals, hash, |
4189 | ELF32_R_SYM (rel->r_info), &root_plt, | |
4190 | &arm_plt) | |
34e77a92 | 4191 | && root_plt->offset != (bfd_vma) -1) |
5fa9e92f | 4192 | { |
34e77a92 | 4193 | asection *splt; |
fe33d2fa | 4194 | |
34e77a92 RS |
4195 | if (hash == NULL || hash->is_iplt) |
4196 | splt = globals->root.iplt; | |
4197 | else | |
4198 | splt = globals->root.splt; | |
4199 | if (splt != NULL) | |
b38cadfb | 4200 | { |
34e77a92 RS |
4201 | use_plt = 1; |
4202 | ||
4203 | /* Note when dealing with PLT entries: the main PLT stub is in | |
4204 | ARM mode, so if the branch is in Thumb mode, another | |
4205 | Thumb->ARM stub will be inserted later just before the ARM | |
2df2751d CL |
4206 | PLT stub. If a long branch stub is needed, we'll add a |
4207 | Thumb->Arm one and branch directly to the ARM PLT entry. | |
4208 | Here, we have to check if a pre-PLT Thumb->ARM stub | |
4209 | is needed and if it will be close enough. */ | |
34e77a92 RS |
4210 | |
4211 | destination = (splt->output_section->vma | |
4212 | + splt->output_offset | |
4213 | + root_plt->offset); | |
4214 | st_type = STT_FUNC; | |
2df2751d CL |
4215 | |
4216 | /* Thumb branch/call to PLT: it can become a branch to ARM | |
4217 | or to Thumb. We must perform the same checks and | |
4218 | corrections as in elf32_arm_final_link_relocate. */ | |
4219 | if ((r_type == R_ARM_THM_CALL) | |
4220 | || (r_type == R_ARM_THM_JUMP24)) | |
4221 | { | |
4222 | if (globals->use_blx | |
4223 | && r_type == R_ARM_THM_CALL | |
4224 | && !thumb_only) | |
4225 | { | |
4226 | /* If the Thumb BLX instruction is available, convert | |
4227 | the BL to a BLX instruction to call the ARM-mode | |
4228 | PLT entry. */ | |
4229 | branch_type = ST_BRANCH_TO_ARM; | |
4230 | } | |
4231 | else | |
4232 | { | |
4233 | if (!thumb_only) | |
4234 | /* Target the Thumb stub before the ARM PLT entry. */ | |
4235 | destination -= PLT_THUMB_STUB_SIZE; | |
4236 | branch_type = ST_BRANCH_TO_THUMB; | |
4237 | } | |
4238 | } | |
4239 | else | |
4240 | { | |
4241 | branch_type = ST_BRANCH_TO_ARM; | |
4242 | } | |
34e77a92 | 4243 | } |
5fa9e92f | 4244 | } |
34e77a92 RS |
4245 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
4246 | BFD_ASSERT (st_type != STT_GNU_IFUNC); | |
906e58ca | 4247 | |
fe33d2fa CL |
4248 | branch_offset = (bfd_signed_vma)(destination - location); |
4249 | ||
0855e32b | 4250 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
c5423981 | 4251 | || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19) |
906e58ca | 4252 | { |
5fa9e92f CL |
4253 | /* Handle cases where: |
4254 | - this call goes too far (different Thumb/Thumb2 max | |
99059e56 | 4255 | distance) |
155d87d7 | 4256 | - it's a Thumb->Arm call and blx is not available, or it's a |
99059e56 RM |
4257 | Thumb->Arm branch (not bl). A stub is needed in this case, |
4258 | but only if this call is not through a PLT entry. Indeed, | |
695344c0 | 4259 | PLT stubs handle mode switching already. */ |
5e866f5a | 4260 | if ((!thumb2_bl |
906e58ca NC |
4261 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET |
4262 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
5e866f5a | 4263 | || (thumb2_bl |
906e58ca NC |
4264 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET |
4265 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
c5423981 TG |
4266 | || (thumb2 |
4267 | && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET | |
4268 | || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET)) | |
4269 | && (r_type == R_ARM_THM_JUMP19)) | |
35fc36a8 | 4270 | || (branch_type == ST_BRANCH_TO_ARM |
0855e32b NS |
4271 | && (((r_type == R_ARM_THM_CALL |
4272 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) | |
c5423981 | 4273 | || (r_type == R_ARM_THM_JUMP24) |
07d6d2b8 | 4274 | || (r_type == R_ARM_THM_JUMP19)) |
5fa9e92f | 4275 | && !use_plt)) |
906e58ca | 4276 | { |
2df2751d CL |
4277 | /* If we need to insert a Thumb-Thumb long branch stub to a |
4278 | PLT, use one that branches directly to the ARM PLT | |
4279 | stub. If we pretended we'd use the pre-PLT Thumb->ARM | |
4280 | stub, undo this now. */ | |
695344c0 NC |
4281 | if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) |
4282 | { | |
4283 | branch_type = ST_BRANCH_TO_ARM; | |
4284 | branch_offset += PLT_THUMB_STUB_SIZE; | |
4285 | } | |
2df2751d | 4286 | |
35fc36a8 | 4287 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4288 | { |
4289 | /* Thumb to thumb. */ | |
4290 | if (!thumb_only) | |
4291 | { | |
d5a67c02 | 4292 | if (input_sec->flags & SEC_ELF_PURECODE) |
10463f39 | 4293 | _bfd_error_handler |
871b3ab2 | 4294 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4295 | " section with SHF_ARM_PURECODE section" |
4296 | " attribute is only supported for M-profile" | |
90b6238f | 4297 | " targets that implement the movw instruction"), |
10463f39 | 4298 | input_bfd, input_sec); |
d5a67c02 | 4299 | |
0e1862bb | 4300 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4301 | /* PIC stubs. */ |
155d87d7 | 4302 | ? ((globals->use_blx |
9553db3c | 4303 | && (r_type == R_ARM_THM_CALL)) |
155d87d7 CL |
4304 | /* V5T and above. Stub starts with ARM code, so |
4305 | we must be able to switch mode before | |
4306 | reaching it, which is only possible for 'bl' | |
4307 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 4308 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 4309 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 4310 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
4311 | |
4312 | /* non-PIC stubs. */ | |
155d87d7 | 4313 | : ((globals->use_blx |
9553db3c | 4314 | && (r_type == R_ARM_THM_CALL)) |
c2b4a39d CL |
4315 | /* V5T and above. */ |
4316 | ? arm_stub_long_branch_any_any | |
4317 | /* V4T. */ | |
d3626fb0 | 4318 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
4319 | } |
4320 | else | |
4321 | { | |
d5a67c02 AV |
4322 | if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE)) |
4323 | stub_type = arm_stub_long_branch_thumb2_only_pure; | |
4324 | else | |
4325 | { | |
4326 | if (input_sec->flags & SEC_ELF_PURECODE) | |
10463f39 | 4327 | _bfd_error_handler |
871b3ab2 | 4328 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4329 | " section with SHF_ARM_PURECODE section" |
4330 | " attribute is only supported for M-profile" | |
90b6238f | 4331 | " targets that implement the movw instruction"), |
10463f39 | 4332 | input_bfd, input_sec); |
d5a67c02 AV |
4333 | |
4334 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) | |
4335 | /* PIC stub. */ | |
4336 | ? arm_stub_long_branch_thumb_only_pic | |
4337 | /* non-PIC stub. */ | |
4338 | : (thumb2 ? arm_stub_long_branch_thumb2_only | |
4339 | : arm_stub_long_branch_thumb_only); | |
4340 | } | |
906e58ca NC |
4341 | } |
4342 | } | |
4343 | else | |
4344 | { | |
d5a67c02 | 4345 | if (input_sec->flags & SEC_ELF_PURECODE) |
10463f39 | 4346 | _bfd_error_handler |
871b3ab2 | 4347 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4348 | " section with SHF_ARM_PURECODE section" |
4349 | " attribute is only supported" " for M-profile" | |
90b6238f | 4350 | " targets that implement the movw instruction"), |
10463f39 | 4351 | input_bfd, input_sec); |
d5a67c02 | 4352 | |
906e58ca | 4353 | /* Thumb to arm. */ |
c820be07 NC |
4354 | if (sym_sec != NULL |
4355 | && sym_sec->owner != NULL | |
4356 | && !INTERWORK_FLAG (sym_sec->owner)) | |
4357 | { | |
4eca0228 | 4358 | _bfd_error_handler |
90b6238f AM |
4359 | (_("%pB(%s): warning: interworking not enabled;" |
4360 | " first occurrence: %pB: %s call to %s"), | |
4361 | sym_sec->owner, name, input_bfd, "Thumb", "ARM"); | |
c820be07 NC |
4362 | } |
4363 | ||
0855e32b | 4364 | stub_type = |
0e1862bb | 4365 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4366 | /* PIC stubs. */ |
0855e32b | 4367 | ? (r_type == R_ARM_THM_TLS_CALL |
6a631e86 | 4368 | /* TLS PIC stubs. */ |
0855e32b NS |
4369 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic |
4370 | : arm_stub_long_branch_v4t_thumb_tls_pic) | |
4371 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) | |
4372 | /* V5T PIC and above. */ | |
4373 | ? arm_stub_long_branch_any_arm_pic | |
4374 | /* V4T PIC stub. */ | |
4375 | : arm_stub_long_branch_v4t_thumb_arm_pic)) | |
c2b4a39d CL |
4376 | |
4377 | /* non-PIC stubs. */ | |
0855e32b | 4378 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
c2b4a39d CL |
4379 | /* V5T and above. */ |
4380 | ? arm_stub_long_branch_any_any | |
4381 | /* V4T. */ | |
4382 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
4383 | |
4384 | /* Handle v4t short branches. */ | |
fea2b4d6 | 4385 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
4386 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
4387 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 4388 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
4389 | } |
4390 | } | |
4391 | } | |
fe33d2fa CL |
4392 | else if (r_type == R_ARM_CALL |
4393 | || r_type == R_ARM_JUMP24 | |
0855e32b NS |
4394 | || r_type == R_ARM_PLT32 |
4395 | || r_type == R_ARM_TLS_CALL) | |
906e58ca | 4396 | { |
d5a67c02 | 4397 | if (input_sec->flags & SEC_ELF_PURECODE) |
10463f39 | 4398 | _bfd_error_handler |
871b3ab2 | 4399 | (_("%pB(%pA): warning: long branch veneers used in" |
10463f39 AM |
4400 | " section with SHF_ARM_PURECODE section" |
4401 | " attribute is only supported for M-profile" | |
90b6238f | 4402 | " targets that implement the movw instruction"), |
10463f39 | 4403 | input_bfd, input_sec); |
35fc36a8 | 4404 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4405 | { |
4406 | /* Arm to thumb. */ | |
c820be07 NC |
4407 | |
4408 | if (sym_sec != NULL | |
4409 | && sym_sec->owner != NULL | |
4410 | && !INTERWORK_FLAG (sym_sec->owner)) | |
4411 | { | |
4eca0228 | 4412 | _bfd_error_handler |
90b6238f AM |
4413 | (_("%pB(%s): warning: interworking not enabled;" |
4414 | " first occurrence: %pB: %s call to %s"), | |
4415 | sym_sec->owner, name, input_bfd, "ARM", "Thumb"); | |
c820be07 NC |
4416 | } |
4417 | ||
4418 | /* We have an extra 2-bytes reach because of | |
4419 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
4420 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
4421 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
0855e32b | 4422 | || (r_type == R_ARM_CALL && !globals->use_blx) |
4116d8d7 PB |
4423 | || (r_type == R_ARM_JUMP24) |
4424 | || (r_type == R_ARM_PLT32)) | |
906e58ca | 4425 | { |
0e1862bb | 4426 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4427 | /* PIC stubs. */ |
ebe24dd4 CL |
4428 | ? ((globals->use_blx) |
4429 | /* V5T and above. */ | |
4430 | ? arm_stub_long_branch_any_thumb_pic | |
4431 | /* V4T stub. */ | |
4432 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
4433 | ||
c2b4a39d CL |
4434 | /* non-PIC stubs. */ |
4435 | : ((globals->use_blx) | |
4436 | /* V5T and above. */ | |
4437 | ? arm_stub_long_branch_any_any | |
4438 | /* V4T. */ | |
4439 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
4440 | } |
4441 | } | |
4442 | else | |
4443 | { | |
4444 | /* Arm to arm. */ | |
4445 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
4446 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
4447 | { | |
0855e32b | 4448 | stub_type = |
0e1862bb | 4449 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4450 | /* PIC stubs. */ |
0855e32b | 4451 | ? (r_type == R_ARM_TLS_CALL |
6a631e86 | 4452 | /* TLS PIC Stub. */ |
0855e32b | 4453 | ? arm_stub_long_branch_any_tls_pic |
7a89b94e NC |
4454 | : (globals->nacl_p |
4455 | ? arm_stub_long_branch_arm_nacl_pic | |
4456 | : arm_stub_long_branch_any_arm_pic)) | |
c2b4a39d | 4457 | /* non-PIC stubs. */ |
7a89b94e NC |
4458 | : (globals->nacl_p |
4459 | ? arm_stub_long_branch_arm_nacl | |
4460 | : arm_stub_long_branch_any_any); | |
906e58ca NC |
4461 | } |
4462 | } | |
4463 | } | |
4464 | ||
fe33d2fa CL |
4465 | /* If a stub is needed, record the actual destination type. */ |
4466 | if (stub_type != arm_stub_none) | |
35fc36a8 | 4467 | *actual_branch_type = branch_type; |
fe33d2fa | 4468 | |
906e58ca NC |
4469 | return stub_type; |
4470 | } | |
4471 | ||
4472 | /* Build a name for an entry in the stub hash table. */ | |
4473 | ||
4474 | static char * | |
4475 | elf32_arm_stub_name (const asection *input_section, | |
4476 | const asection *sym_sec, | |
4477 | const struct elf32_arm_link_hash_entry *hash, | |
fe33d2fa CL |
4478 | const Elf_Internal_Rela *rel, |
4479 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4480 | { |
4481 | char *stub_name; | |
4482 | bfd_size_type len; | |
4483 | ||
4484 | if (hash) | |
4485 | { | |
fe33d2fa | 4486 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4487 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4488 | if (stub_name != NULL) |
fe33d2fa | 4489 | sprintf (stub_name, "%08x_%s+%x_%d", |
906e58ca NC |
4490 | input_section->id & 0xffffffff, |
4491 | hash->root.root.root.string, | |
fe33d2fa CL |
4492 | (int) rel->r_addend & 0xffffffff, |
4493 | (int) stub_type); | |
906e58ca NC |
4494 | } |
4495 | else | |
4496 | { | |
fe33d2fa | 4497 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4498 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4499 | if (stub_name != NULL) |
fe33d2fa | 4500 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
906e58ca NC |
4501 | input_section->id & 0xffffffff, |
4502 | sym_sec->id & 0xffffffff, | |
0855e32b NS |
4503 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
4504 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL | |
4505 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
fe33d2fa CL |
4506 | (int) rel->r_addend & 0xffffffff, |
4507 | (int) stub_type); | |
906e58ca NC |
4508 | } |
4509 | ||
4510 | return stub_name; | |
4511 | } | |
4512 | ||
4513 | /* Look up an entry in the stub hash. Stub entries are cached because | |
4514 | creating the stub name takes a bit of time. */ | |
4515 | ||
4516 | static struct elf32_arm_stub_hash_entry * | |
4517 | elf32_arm_get_stub_entry (const asection *input_section, | |
4518 | const asection *sym_sec, | |
4519 | struct elf_link_hash_entry *hash, | |
4520 | const Elf_Internal_Rela *rel, | |
fe33d2fa CL |
4521 | struct elf32_arm_link_hash_table *htab, |
4522 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4523 | { |
4524 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4525 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
4526 | const asection *id_sec; | |
4527 | ||
4528 | if ((input_section->flags & SEC_CODE) == 0) | |
4529 | return NULL; | |
4530 | ||
4531 | /* If this input section is part of a group of sections sharing one | |
4532 | stub section, then use the id of the first section in the group. | |
4533 | Stub names need to include a section id, as there may well be | |
4534 | more than one stub used to reach say, printf, and we need to | |
4535 | distinguish between them. */ | |
c2abbbeb | 4536 | BFD_ASSERT (input_section->id <= htab->top_id); |
906e58ca NC |
4537 | id_sec = htab->stub_group[input_section->id].link_sec; |
4538 | ||
4539 | if (h != NULL && h->stub_cache != NULL | |
4540 | && h->stub_cache->h == h | |
fe33d2fa CL |
4541 | && h->stub_cache->id_sec == id_sec |
4542 | && h->stub_cache->stub_type == stub_type) | |
906e58ca NC |
4543 | { |
4544 | stub_entry = h->stub_cache; | |
4545 | } | |
4546 | else | |
4547 | { | |
4548 | char *stub_name; | |
4549 | ||
fe33d2fa | 4550 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
906e58ca NC |
4551 | if (stub_name == NULL) |
4552 | return NULL; | |
4553 | ||
4554 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
4555 | stub_name, FALSE, FALSE); | |
4556 | if (h != NULL) | |
4557 | h->stub_cache = stub_entry; | |
4558 | ||
4559 | free (stub_name); | |
4560 | } | |
4561 | ||
4562 | return stub_entry; | |
4563 | } | |
4564 | ||
daa4adae TP |
4565 | /* Whether veneers of type STUB_TYPE require to be in a dedicated output |
4566 | section. */ | |
4567 | ||
4568 | static bfd_boolean | |
4569 | arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type) | |
4570 | { | |
4571 | if (stub_type >= max_stub_type) | |
4572 | abort (); /* Should be unreachable. */ | |
4573 | ||
4ba2ef8f TP |
4574 | switch (stub_type) |
4575 | { | |
4576 | case arm_stub_cmse_branch_thumb_only: | |
4577 | return TRUE; | |
4578 | ||
4579 | default: | |
4580 | return FALSE; | |
4581 | } | |
4582 | ||
4583 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4584 | } |
4585 | ||
4586 | /* Required alignment (as a power of 2) for the dedicated section holding | |
4587 | veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed | |
4588 | with input sections. */ | |
4589 | ||
4590 | static int | |
4591 | arm_dedicated_stub_output_section_required_alignment | |
4592 | (enum elf32_arm_stub_type stub_type) | |
4593 | { | |
4594 | if (stub_type >= max_stub_type) | |
4595 | abort (); /* Should be unreachable. */ | |
4596 | ||
4ba2ef8f TP |
4597 | switch (stub_type) |
4598 | { | |
4599 | /* Vectors of Secure Gateway veneers must be aligned on 32byte | |
4600 | boundary. */ | |
4601 | case arm_stub_cmse_branch_thumb_only: | |
4602 | return 5; | |
4603 | ||
4604 | default: | |
4605 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4606 | return 0; | |
4607 | } | |
4608 | ||
4609 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4610 | } |
4611 | ||
4612 | /* Name of the dedicated output section to put veneers of type STUB_TYPE, or | |
4613 | NULL if veneers of this type are interspersed with input sections. */ | |
4614 | ||
4615 | static const char * | |
4616 | arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type) | |
4617 | { | |
4618 | if (stub_type >= max_stub_type) | |
4619 | abort (); /* Should be unreachable. */ | |
4620 | ||
4ba2ef8f TP |
4621 | switch (stub_type) |
4622 | { | |
4623 | case arm_stub_cmse_branch_thumb_only: | |
4624 | return ".gnu.sgstubs"; | |
4625 | ||
4626 | default: | |
4627 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4628 | return NULL; | |
4629 | } | |
4630 | ||
4631 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4632 | } |
4633 | ||
4634 | /* If veneers of type STUB_TYPE should go in a dedicated output section, | |
4635 | returns the address of the hash table field in HTAB holding a pointer to the | |
4636 | corresponding input section. Otherwise, returns NULL. */ | |
4637 | ||
4638 | static asection ** | |
4ba2ef8f TP |
4639 | arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab, |
4640 | enum elf32_arm_stub_type stub_type) | |
daa4adae TP |
4641 | { |
4642 | if (stub_type >= max_stub_type) | |
4643 | abort (); /* Should be unreachable. */ | |
4644 | ||
4ba2ef8f TP |
4645 | switch (stub_type) |
4646 | { | |
4647 | case arm_stub_cmse_branch_thumb_only: | |
4648 | return &htab->cmse_stub_sec; | |
4649 | ||
4650 | default: | |
4651 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4652 | return NULL; | |
4653 | } | |
4654 | ||
4655 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4656 | } |
4657 | ||
4658 | /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION | |
4659 | is the section that branch into veneer and can be NULL if stub should go in | |
4660 | a dedicated output section. Returns a pointer to the stub section, and the | |
4661 | section to which the stub section will be attached (in *LINK_SEC_P). | |
48229727 | 4662 | LINK_SEC_P may be NULL. */ |
906e58ca | 4663 | |
48229727 JB |
4664 | static asection * |
4665 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
daa4adae TP |
4666 | struct elf32_arm_link_hash_table *htab, |
4667 | enum elf32_arm_stub_type stub_type) | |
906e58ca | 4668 | { |
daa4adae TP |
4669 | asection *link_sec, *out_sec, **stub_sec_p; |
4670 | const char *stub_sec_prefix; | |
4671 | bfd_boolean dedicated_output_section = | |
4672 | arm_dedicated_stub_output_section_required (stub_type); | |
4673 | int align; | |
906e58ca | 4674 | |
daa4adae | 4675 | if (dedicated_output_section) |
906e58ca | 4676 | { |
daa4adae TP |
4677 | bfd *output_bfd = htab->obfd; |
4678 | const char *out_sec_name = | |
4679 | arm_dedicated_stub_output_section_name (stub_type); | |
4680 | link_sec = NULL; | |
4681 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
4682 | stub_sec_prefix = out_sec_name; | |
4683 | align = arm_dedicated_stub_output_section_required_alignment (stub_type); | |
4684 | out_sec = bfd_get_section_by_name (output_bfd, out_sec_name); | |
4685 | if (out_sec == NULL) | |
906e58ca | 4686 | { |
90b6238f | 4687 | _bfd_error_handler (_("no address assigned to the veneers output " |
4eca0228 | 4688 | "section %s"), out_sec_name); |
daa4adae | 4689 | return NULL; |
906e58ca | 4690 | } |
daa4adae TP |
4691 | } |
4692 | else | |
4693 | { | |
c2abbbeb | 4694 | BFD_ASSERT (section->id <= htab->top_id); |
daa4adae TP |
4695 | link_sec = htab->stub_group[section->id].link_sec; |
4696 | BFD_ASSERT (link_sec != NULL); | |
4697 | stub_sec_p = &htab->stub_group[section->id].stub_sec; | |
4698 | if (*stub_sec_p == NULL) | |
4699 | stub_sec_p = &htab->stub_group[link_sec->id].stub_sec; | |
4700 | stub_sec_prefix = link_sec->name; | |
4701 | out_sec = link_sec->output_section; | |
4702 | align = htab->nacl_p ? 4 : 3; | |
906e58ca | 4703 | } |
b38cadfb | 4704 | |
daa4adae TP |
4705 | if (*stub_sec_p == NULL) |
4706 | { | |
4707 | size_t namelen; | |
4708 | bfd_size_type len; | |
4709 | char *s_name; | |
4710 | ||
4711 | namelen = strlen (stub_sec_prefix); | |
4712 | len = namelen + sizeof (STUB_SUFFIX); | |
4713 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); | |
4714 | if (s_name == NULL) | |
4715 | return NULL; | |
4716 | ||
4717 | memcpy (s_name, stub_sec_prefix, namelen); | |
4718 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
4719 | *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec, | |
4720 | align); | |
4721 | if (*stub_sec_p == NULL) | |
4722 | return NULL; | |
4723 | ||
4724 | out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE | |
4725 | | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | |
4726 | | SEC_KEEP; | |
4727 | } | |
4728 | ||
4729 | if (!dedicated_output_section) | |
4730 | htab->stub_group[section->id].stub_sec = *stub_sec_p; | |
4731 | ||
48229727 JB |
4732 | if (link_sec_p) |
4733 | *link_sec_p = link_sec; | |
b38cadfb | 4734 | |
daa4adae | 4735 | return *stub_sec_p; |
48229727 JB |
4736 | } |
4737 | ||
4738 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
4739 | stub entry are initialised. */ | |
4740 | ||
4741 | static struct elf32_arm_stub_hash_entry * | |
daa4adae TP |
4742 | elf32_arm_add_stub (const char *stub_name, asection *section, |
4743 | struct elf32_arm_link_hash_table *htab, | |
4744 | enum elf32_arm_stub_type stub_type) | |
48229727 JB |
4745 | { |
4746 | asection *link_sec; | |
4747 | asection *stub_sec; | |
4748 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4749 | ||
daa4adae TP |
4750 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab, |
4751 | stub_type); | |
48229727 JB |
4752 | if (stub_sec == NULL) |
4753 | return NULL; | |
906e58ca NC |
4754 | |
4755 | /* Enter this entry into the linker stub hash table. */ | |
4756 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
4757 | TRUE, FALSE); | |
4758 | if (stub_entry == NULL) | |
4759 | { | |
6bde4c52 TP |
4760 | if (section == NULL) |
4761 | section = stub_sec; | |
871b3ab2 | 4762 | _bfd_error_handler (_("%pB: cannot create stub entry %s"), |
4eca0228 | 4763 | section->owner, stub_name); |
906e58ca NC |
4764 | return NULL; |
4765 | } | |
4766 | ||
4767 | stub_entry->stub_sec = stub_sec; | |
0955507f | 4768 | stub_entry->stub_offset = (bfd_vma) -1; |
906e58ca NC |
4769 | stub_entry->id_sec = link_sec; |
4770 | ||
906e58ca NC |
4771 | return stub_entry; |
4772 | } | |
4773 | ||
4774 | /* Store an Arm insn into an output section not processed by | |
4775 | elf32_arm_write_section. */ | |
4776 | ||
4777 | static void | |
8029a119 NC |
4778 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
4779 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4780 | { |
4781 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4782 | bfd_putl32 (val, ptr); | |
4783 | else | |
4784 | bfd_putb32 (val, ptr); | |
4785 | } | |
4786 | ||
4787 | /* Store a 16-bit Thumb insn into an output section not processed by | |
4788 | elf32_arm_write_section. */ | |
4789 | ||
4790 | static void | |
8029a119 NC |
4791 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
4792 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4793 | { |
4794 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4795 | bfd_putl16 (val, ptr); | |
4796 | else | |
4797 | bfd_putb16 (val, ptr); | |
4798 | } | |
4799 | ||
a504d23a LA |
4800 | /* Store a Thumb2 insn into an output section not processed by |
4801 | elf32_arm_write_section. */ | |
4802 | ||
4803 | static void | |
4804 | put_thumb2_insn (struct elf32_arm_link_hash_table * htab, | |
b98e6871 | 4805 | bfd * output_bfd, bfd_vma val, bfd_byte * ptr) |
a504d23a LA |
4806 | { |
4807 | /* T2 instructions are 16-bit streamed. */ | |
4808 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4809 | { | |
4810 | bfd_putl16 ((val >> 16) & 0xffff, ptr); | |
4811 | bfd_putl16 ((val & 0xffff), ptr + 2); | |
4812 | } | |
4813 | else | |
4814 | { | |
4815 | bfd_putb16 ((val >> 16) & 0xffff, ptr); | |
4816 | bfd_putb16 ((val & 0xffff), ptr + 2); | |
4817 | } | |
4818 | } | |
4819 | ||
0855e32b NS |
4820 | /* If it's possible to change R_TYPE to a more efficient access |
4821 | model, return the new reloc type. */ | |
4822 | ||
4823 | static unsigned | |
b38cadfb | 4824 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, |
0855e32b NS |
4825 | struct elf_link_hash_entry *h) |
4826 | { | |
4827 | int is_local = (h == NULL); | |
4828 | ||
0e1862bb L |
4829 | if (bfd_link_pic (info) |
4830 | || (h && h->root.type == bfd_link_hash_undefweak)) | |
0855e32b NS |
4831 | return r_type; |
4832 | ||
b38cadfb | 4833 | /* We do not support relaxations for Old TLS models. */ |
0855e32b NS |
4834 | switch (r_type) |
4835 | { | |
4836 | case R_ARM_TLS_GOTDESC: | |
4837 | case R_ARM_TLS_CALL: | |
4838 | case R_ARM_THM_TLS_CALL: | |
4839 | case R_ARM_TLS_DESCSEQ: | |
4840 | case R_ARM_THM_TLS_DESCSEQ: | |
4841 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; | |
4842 | } | |
4843 | ||
4844 | return r_type; | |
4845 | } | |
4846 | ||
48229727 JB |
4847 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
4848 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
4849 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
34e77a92 RS |
4850 | const char *, unsigned char, enum arm_st_branch_type, |
4851 | struct elf_link_hash_entry *, bfd_boolean *, char **); | |
48229727 | 4852 | |
4563a860 JB |
4853 | static unsigned int |
4854 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) | |
4855 | { | |
4856 | switch (stub_type) | |
4857 | { | |
4858 | case arm_stub_a8_veneer_b_cond: | |
4859 | case arm_stub_a8_veneer_b: | |
4860 | case arm_stub_a8_veneer_bl: | |
4861 | return 2; | |
4862 | ||
4863 | case arm_stub_long_branch_any_any: | |
4864 | case arm_stub_long_branch_v4t_arm_thumb: | |
4865 | case arm_stub_long_branch_thumb_only: | |
80c135e5 | 4866 | case arm_stub_long_branch_thumb2_only: |
d5a67c02 | 4867 | case arm_stub_long_branch_thumb2_only_pure: |
4563a860 JB |
4868 | case arm_stub_long_branch_v4t_thumb_thumb: |
4869 | case arm_stub_long_branch_v4t_thumb_arm: | |
4870 | case arm_stub_short_branch_v4t_thumb_arm: | |
4871 | case arm_stub_long_branch_any_arm_pic: | |
4872 | case arm_stub_long_branch_any_thumb_pic: | |
4873 | case arm_stub_long_branch_v4t_thumb_thumb_pic: | |
4874 | case arm_stub_long_branch_v4t_arm_thumb_pic: | |
4875 | case arm_stub_long_branch_v4t_thumb_arm_pic: | |
4876 | case arm_stub_long_branch_thumb_only_pic: | |
0855e32b NS |
4877 | case arm_stub_long_branch_any_tls_pic: |
4878 | case arm_stub_long_branch_v4t_thumb_tls_pic: | |
4ba2ef8f | 4879 | case arm_stub_cmse_branch_thumb_only: |
4563a860 JB |
4880 | case arm_stub_a8_veneer_blx: |
4881 | return 4; | |
b38cadfb | 4882 | |
7a89b94e NC |
4883 | case arm_stub_long_branch_arm_nacl: |
4884 | case arm_stub_long_branch_arm_nacl_pic: | |
4885 | return 16; | |
4886 | ||
4563a860 JB |
4887 | default: |
4888 | abort (); /* Should be unreachable. */ | |
4889 | } | |
4890 | } | |
4891 | ||
4f4faa4d TP |
4892 | /* Returns whether stubs of type STUB_TYPE take over the symbol they are |
4893 | veneering (TRUE) or have their own symbol (FALSE). */ | |
4894 | ||
4895 | static bfd_boolean | |
4896 | arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type) | |
4897 | { | |
4898 | if (stub_type >= max_stub_type) | |
4899 | abort (); /* Should be unreachable. */ | |
4900 | ||
4ba2ef8f TP |
4901 | switch (stub_type) |
4902 | { | |
4903 | case arm_stub_cmse_branch_thumb_only: | |
4904 | return TRUE; | |
4905 | ||
4906 | default: | |
4907 | return FALSE; | |
4908 | } | |
4909 | ||
4910 | abort (); /* Should be unreachable. */ | |
4f4faa4d TP |
4911 | } |
4912 | ||
d7c5bd02 TP |
4913 | /* Returns the padding needed for the dedicated section used stubs of type |
4914 | STUB_TYPE. */ | |
4915 | ||
4916 | static int | |
4917 | arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type) | |
4918 | { | |
4919 | if (stub_type >= max_stub_type) | |
4920 | abort (); /* Should be unreachable. */ | |
4921 | ||
4ba2ef8f TP |
4922 | switch (stub_type) |
4923 | { | |
4924 | case arm_stub_cmse_branch_thumb_only: | |
4925 | return 32; | |
4926 | ||
4927 | default: | |
4928 | return 0; | |
4929 | } | |
4930 | ||
4931 | abort (); /* Should be unreachable. */ | |
d7c5bd02 TP |
4932 | } |
4933 | ||
0955507f TP |
4934 | /* If veneers of type STUB_TYPE should go in a dedicated output section, |
4935 | returns the address of the hash table field in HTAB holding the offset at | |
4936 | which new veneers should be layed out in the stub section. */ | |
4937 | ||
4938 | static bfd_vma* | |
4939 | arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab, | |
4940 | enum elf32_arm_stub_type stub_type) | |
4941 | { | |
4942 | switch (stub_type) | |
4943 | { | |
4944 | case arm_stub_cmse_branch_thumb_only: | |
4945 | return &htab->new_cmse_stub_offset; | |
4946 | ||
4947 | default: | |
4948 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4949 | return NULL; | |
4950 | } | |
4951 | } | |
4952 | ||
906e58ca NC |
4953 | static bfd_boolean |
4954 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, | |
4955 | void * in_arg) | |
4956 | { | |
7a89b94e | 4957 | #define MAXRELOCS 3 |
0955507f | 4958 | bfd_boolean removed_sg_veneer; |
906e58ca | 4959 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 4960 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 4961 | struct bfd_link_info *info; |
906e58ca NC |
4962 | asection *stub_sec; |
4963 | bfd *stub_bfd; | |
906e58ca NC |
4964 | bfd_byte *loc; |
4965 | bfd_vma sym_value; | |
4966 | int template_size; | |
4967 | int size; | |
d3ce72d0 | 4968 | const insn_sequence *template_sequence; |
906e58ca | 4969 | int i; |
48229727 JB |
4970 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
4971 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
4972 | int nrelocs = 0; | |
0955507f | 4973 | int just_allocated = 0; |
906e58ca NC |
4974 | |
4975 | /* Massage our args to the form they really have. */ | |
4976 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
4977 | info = (struct bfd_link_info *) in_arg; | |
4978 | ||
4979 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
4980 | if (globals == NULL) |
4981 | return FALSE; | |
906e58ca | 4982 | |
906e58ca NC |
4983 | stub_sec = stub_entry->stub_sec; |
4984 | ||
4dfe6ac6 | 4985 | if ((globals->fix_cortex_a8 < 0) |
4563a860 JB |
4986 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
4987 | /* We have to do less-strictly-aligned fixes last. */ | |
eb7c4339 | 4988 | return TRUE; |
fe33d2fa | 4989 | |
0955507f TP |
4990 | /* Assign a slot at the end of section if none assigned yet. */ |
4991 | if (stub_entry->stub_offset == (bfd_vma) -1) | |
4992 | { | |
4993 | stub_entry->stub_offset = stub_sec->size; | |
4994 | just_allocated = 1; | |
4995 | } | |
906e58ca NC |
4996 | loc = stub_sec->contents + stub_entry->stub_offset; |
4997 | ||
4998 | stub_bfd = stub_sec->owner; | |
4999 | ||
906e58ca NC |
5000 | /* This is the address of the stub destination. */ |
5001 | sym_value = (stub_entry->target_value | |
5002 | + stub_entry->target_section->output_offset | |
5003 | + stub_entry->target_section->output_section->vma); | |
5004 | ||
d3ce72d0 | 5005 | template_sequence = stub_entry->stub_template; |
461a49ca | 5006 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
5007 | |
5008 | size = 0; | |
461a49ca | 5009 | for (i = 0; i < template_size; i++) |
906e58ca | 5010 | { |
d3ce72d0 | 5011 | switch (template_sequence[i].type) |
461a49ca DJ |
5012 | { |
5013 | case THUMB16_TYPE: | |
48229727 | 5014 | { |
d3ce72d0 NC |
5015 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
5016 | if (template_sequence[i].reloc_addend != 0) | |
48229727 | 5017 | { |
99059e56 RM |
5018 | /* We've borrowed the reloc_addend field to mean we should |
5019 | insert a condition code into this (Thumb-1 branch) | |
5020 | instruction. See THUMB16_BCOND_INSN. */ | |
5021 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
5022 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
48229727 | 5023 | } |
fe33d2fa | 5024 | bfd_put_16 (stub_bfd, data, loc + size); |
48229727 JB |
5025 | size += 2; |
5026 | } | |
461a49ca | 5027 | break; |
906e58ca | 5028 | |
48229727 | 5029 | case THUMB32_TYPE: |
fe33d2fa CL |
5030 | bfd_put_16 (stub_bfd, |
5031 | (template_sequence[i].data >> 16) & 0xffff, | |
5032 | loc + size); | |
5033 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, | |
5034 | loc + size + 2); | |
99059e56 RM |
5035 | if (template_sequence[i].r_type != R_ARM_NONE) |
5036 | { | |
5037 | stub_reloc_idx[nrelocs] = i; | |
5038 | stub_reloc_offset[nrelocs++] = size; | |
5039 | } | |
5040 | size += 4; | |
5041 | break; | |
48229727 | 5042 | |
461a49ca | 5043 | case ARM_TYPE: |
fe33d2fa CL |
5044 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
5045 | loc + size); | |
461a49ca DJ |
5046 | /* Handle cases where the target is encoded within the |
5047 | instruction. */ | |
d3ce72d0 | 5048 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 5049 | { |
48229727 JB |
5050 | stub_reloc_idx[nrelocs] = i; |
5051 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
5052 | } |
5053 | size += 4; | |
5054 | break; | |
5055 | ||
5056 | case DATA_TYPE: | |
d3ce72d0 | 5057 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
5058 | stub_reloc_idx[nrelocs] = i; |
5059 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
5060 | size += 4; |
5061 | break; | |
5062 | ||
5063 | default: | |
5064 | BFD_FAIL (); | |
5065 | return FALSE; | |
5066 | } | |
906e58ca | 5067 | } |
461a49ca | 5068 | |
0955507f TP |
5069 | if (just_allocated) |
5070 | stub_sec->size += size; | |
906e58ca | 5071 | |
461a49ca DJ |
5072 | /* Stub size has already been computed in arm_size_one_stub. Check |
5073 | consistency. */ | |
5074 | BFD_ASSERT (size == stub_entry->stub_size); | |
5075 | ||
906e58ca | 5076 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
35fc36a8 | 5077 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
5078 | sym_value |= 1; |
5079 | ||
0955507f TP |
5080 | /* Assume non empty slots have at least one and at most MAXRELOCS entries |
5081 | to relocate in each stub. */ | |
5082 | removed_sg_veneer = | |
5083 | (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only); | |
5084 | BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS)); | |
c820be07 | 5085 | |
48229727 | 5086 | for (i = 0; i < nrelocs; i++) |
8d9d9490 TP |
5087 | { |
5088 | Elf_Internal_Rela rel; | |
5089 | bfd_boolean unresolved_reloc; | |
5090 | char *error_message; | |
5091 | bfd_vma points_to = | |
5092 | sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend; | |
5093 | ||
5094 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
5095 | rel.r_info = ELF32_R_INFO (0, | |
5096 | template_sequence[stub_reloc_idx[i]].r_type); | |
5097 | rel.r_addend = 0; | |
5098 | ||
5099 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
5100 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
5101 | template should refer back to the instruction after the original | |
5102 | branch. We use target_section as Cortex-A8 erratum workaround stubs | |
5103 | are only generated when both source and target are in the same | |
5104 | section. */ | |
5105 | points_to = stub_entry->target_section->output_section->vma | |
5106 | + stub_entry->target_section->output_offset | |
5107 | + stub_entry->source_value; | |
5108 | ||
5109 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
5110 | (template_sequence[stub_reloc_idx[i]].r_type), | |
5111 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, | |
5112 | points_to, info, stub_entry->target_section, "", STT_FUNC, | |
5113 | stub_entry->branch_type, | |
5114 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, | |
5115 | &error_message); | |
5116 | } | |
906e58ca NC |
5117 | |
5118 | return TRUE; | |
48229727 | 5119 | #undef MAXRELOCS |
906e58ca NC |
5120 | } |
5121 | ||
48229727 JB |
5122 | /* Calculate the template, template size and instruction size for a stub. |
5123 | Return value is the instruction size. */ | |
906e58ca | 5124 | |
48229727 JB |
5125 | static unsigned int |
5126 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
5127 | const insn_sequence **stub_template, | |
5128 | int *stub_template_size) | |
906e58ca | 5129 | { |
d3ce72d0 | 5130 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
5131 | int template_size = 0, i; |
5132 | unsigned int size; | |
906e58ca | 5133 | |
d3ce72d0 | 5134 | template_sequence = stub_definitions[stub_type].template_sequence; |
2a229407 AM |
5135 | if (stub_template) |
5136 | *stub_template = template_sequence; | |
5137 | ||
48229727 | 5138 | template_size = stub_definitions[stub_type].template_size; |
2a229407 AM |
5139 | if (stub_template_size) |
5140 | *stub_template_size = template_size; | |
906e58ca NC |
5141 | |
5142 | size = 0; | |
461a49ca DJ |
5143 | for (i = 0; i < template_size; i++) |
5144 | { | |
d3ce72d0 | 5145 | switch (template_sequence[i].type) |
461a49ca DJ |
5146 | { |
5147 | case THUMB16_TYPE: | |
5148 | size += 2; | |
5149 | break; | |
5150 | ||
5151 | case ARM_TYPE: | |
48229727 | 5152 | case THUMB32_TYPE: |
461a49ca DJ |
5153 | case DATA_TYPE: |
5154 | size += 4; | |
5155 | break; | |
5156 | ||
5157 | default: | |
5158 | BFD_FAIL (); | |
2a229407 | 5159 | return 0; |
461a49ca DJ |
5160 | } |
5161 | } | |
5162 | ||
48229727 JB |
5163 | return size; |
5164 | } | |
5165 | ||
5166 | /* As above, but don't actually build the stub. Just bump offset so | |
5167 | we know stub section sizes. */ | |
5168 | ||
5169 | static bfd_boolean | |
5170 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, | |
c7e2358a | 5171 | void *in_arg ATTRIBUTE_UNUSED) |
48229727 JB |
5172 | { |
5173 | struct elf32_arm_stub_hash_entry *stub_entry; | |
d3ce72d0 | 5174 | const insn_sequence *template_sequence; |
48229727 JB |
5175 | int template_size, size; |
5176 | ||
5177 | /* Massage our args to the form they really have. */ | |
5178 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
48229727 JB |
5179 | |
5180 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) | |
5181 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); | |
5182 | ||
d3ce72d0 | 5183 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
5184 | &template_size); |
5185 | ||
0955507f TP |
5186 | /* Initialized to -1. Null size indicates an empty slot full of zeros. */ |
5187 | if (stub_entry->stub_template_size) | |
5188 | { | |
5189 | stub_entry->stub_size = size; | |
5190 | stub_entry->stub_template = template_sequence; | |
5191 | stub_entry->stub_template_size = template_size; | |
5192 | } | |
5193 | ||
5194 | /* Already accounted for. */ | |
5195 | if (stub_entry->stub_offset != (bfd_vma) -1) | |
5196 | return TRUE; | |
461a49ca | 5197 | |
906e58ca NC |
5198 | size = (size + 7) & ~7; |
5199 | stub_entry->stub_sec->size += size; | |
461a49ca | 5200 | |
906e58ca NC |
5201 | return TRUE; |
5202 | } | |
5203 | ||
5204 | /* External entry points for sizing and building linker stubs. */ | |
5205 | ||
5206 | /* Set up various things so that we can make a list of input sections | |
5207 | for each output section included in the link. Returns -1 on error, | |
5208 | 0 when no stubs will be needed, and 1 on success. */ | |
5209 | ||
5210 | int | |
5211 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
5212 | struct bfd_link_info *info) | |
5213 | { | |
5214 | bfd *input_bfd; | |
5215 | unsigned int bfd_count; | |
7292b3ac | 5216 | unsigned int top_id, top_index; |
906e58ca NC |
5217 | asection *section; |
5218 | asection **input_list, **list; | |
5219 | bfd_size_type amt; | |
5220 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
5221 | ||
4dfe6ac6 NC |
5222 | if (htab == NULL) |
5223 | return 0; | |
906e58ca NC |
5224 | if (! is_elf_hash_table (htab)) |
5225 | return 0; | |
5226 | ||
5227 | /* Count the number of input BFDs and find the top input section id. */ | |
5228 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
5229 | input_bfd != NULL; | |
c72f2fb2 | 5230 | input_bfd = input_bfd->link.next) |
906e58ca NC |
5231 | { |
5232 | bfd_count += 1; | |
5233 | for (section = input_bfd->sections; | |
5234 | section != NULL; | |
5235 | section = section->next) | |
5236 | { | |
5237 | if (top_id < section->id) | |
5238 | top_id = section->id; | |
5239 | } | |
5240 | } | |
5241 | htab->bfd_count = bfd_count; | |
5242 | ||
5243 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 5244 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
5245 | if (htab->stub_group == NULL) |
5246 | return -1; | |
fe33d2fa | 5247 | htab->top_id = top_id; |
906e58ca NC |
5248 | |
5249 | /* We can't use output_bfd->section_count here to find the top output | |
5250 | section index as some sections may have been removed, and | |
5251 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
5252 | for (section = output_bfd->sections, top_index = 0; | |
5253 | section != NULL; | |
5254 | section = section->next) | |
5255 | { | |
5256 | if (top_index < section->index) | |
5257 | top_index = section->index; | |
5258 | } | |
5259 | ||
5260 | htab->top_index = top_index; | |
5261 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 5262 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
5263 | htab->input_list = input_list; |
5264 | if (input_list == NULL) | |
5265 | return -1; | |
5266 | ||
5267 | /* For sections we aren't interested in, mark their entries with a | |
5268 | value we can check later. */ | |
5269 | list = input_list + top_index; | |
5270 | do | |
5271 | *list = bfd_abs_section_ptr; | |
5272 | while (list-- != input_list); | |
5273 | ||
5274 | for (section = output_bfd->sections; | |
5275 | section != NULL; | |
5276 | section = section->next) | |
5277 | { | |
5278 | if ((section->flags & SEC_CODE) != 0) | |
5279 | input_list[section->index] = NULL; | |
5280 | } | |
5281 | ||
5282 | return 1; | |
5283 | } | |
5284 | ||
5285 | /* The linker repeatedly calls this function for each input section, | |
5286 | in the order that input sections are linked into output sections. | |
5287 | Build lists of input sections to determine groupings between which | |
5288 | we may insert linker stubs. */ | |
5289 | ||
5290 | void | |
5291 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
5292 | asection *isec) | |
5293 | { | |
5294 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
5295 | ||
4dfe6ac6 NC |
5296 | if (htab == NULL) |
5297 | return; | |
5298 | ||
906e58ca NC |
5299 | if (isec->output_section->index <= htab->top_index) |
5300 | { | |
5301 | asection **list = htab->input_list + isec->output_section->index; | |
5302 | ||
a7470592 | 5303 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
5304 | { |
5305 | /* Steal the link_sec pointer for our list. */ | |
5306 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
5307 | /* This happens to make the list in reverse order, | |
07d72278 | 5308 | which we reverse later. */ |
906e58ca NC |
5309 | PREV_SEC (isec) = *list; |
5310 | *list = isec; | |
5311 | } | |
5312 | } | |
5313 | } | |
5314 | ||
5315 | /* See whether we can group stub sections together. Grouping stub | |
5316 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 5317 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
5318 | .fini output sections respectively, because glibc splits the |
5319 | _init and _fini functions into multiple parts. Putting a stub in | |
5320 | the middle of a function is not a good idea. */ | |
5321 | ||
5322 | static void | |
5323 | group_sections (struct elf32_arm_link_hash_table *htab, | |
5324 | bfd_size_type stub_group_size, | |
07d72278 | 5325 | bfd_boolean stubs_always_after_branch) |
906e58ca | 5326 | { |
07d72278 | 5327 | asection **list = htab->input_list; |
906e58ca NC |
5328 | |
5329 | do | |
5330 | { | |
5331 | asection *tail = *list; | |
07d72278 | 5332 | asection *head; |
906e58ca NC |
5333 | |
5334 | if (tail == bfd_abs_section_ptr) | |
5335 | continue; | |
5336 | ||
07d72278 DJ |
5337 | /* Reverse the list: we must avoid placing stubs at the |
5338 | beginning of the section because the beginning of the text | |
5339 | section may be required for an interrupt vector in bare metal | |
5340 | code. */ | |
5341 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
5342 | head = NULL; |
5343 | while (tail != NULL) | |
99059e56 RM |
5344 | { |
5345 | /* Pop from tail. */ | |
5346 | asection *item = tail; | |
5347 | tail = PREV_SEC (item); | |
e780aef2 | 5348 | |
99059e56 RM |
5349 | /* Push on head. */ |
5350 | NEXT_SEC (item) = head; | |
5351 | head = item; | |
5352 | } | |
07d72278 DJ |
5353 | |
5354 | while (head != NULL) | |
906e58ca NC |
5355 | { |
5356 | asection *curr; | |
07d72278 | 5357 | asection *next; |
e780aef2 CL |
5358 | bfd_vma stub_group_start = head->output_offset; |
5359 | bfd_vma end_of_next; | |
906e58ca | 5360 | |
07d72278 | 5361 | curr = head; |
e780aef2 | 5362 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 5363 | { |
e780aef2 CL |
5364 | next = NEXT_SEC (curr); |
5365 | end_of_next = next->output_offset + next->size; | |
5366 | if (end_of_next - stub_group_start >= stub_group_size) | |
5367 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 5368 | break; |
e780aef2 CL |
5369 | /* Add NEXT to the group. */ |
5370 | curr = next; | |
8cd931b7 | 5371 | } |
906e58ca | 5372 | |
07d72278 | 5373 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 5374 | than stub_group_size and thus can be handled by one stub |
07d72278 | 5375 | section. (Or the head section is itself larger than |
906e58ca NC |
5376 | stub_group_size, in which case we may be toast.) |
5377 | We should really be keeping track of the total size of | |
5378 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 5379 | section size. */ |
906e58ca NC |
5380 | do |
5381 | { | |
07d72278 | 5382 | next = NEXT_SEC (head); |
906e58ca | 5383 | /* Set up this stub group. */ |
07d72278 | 5384 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 5385 | } |
07d72278 | 5386 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
5387 | |
5388 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
5389 | bytes after the stub section can be handled by it too. */ |
5390 | if (!stubs_always_after_branch) | |
906e58ca | 5391 | { |
e780aef2 CL |
5392 | stub_group_start = curr->output_offset + curr->size; |
5393 | ||
8cd931b7 | 5394 | while (next != NULL) |
906e58ca | 5395 | { |
e780aef2 CL |
5396 | end_of_next = next->output_offset + next->size; |
5397 | if (end_of_next - stub_group_start >= stub_group_size) | |
5398 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 5399 | break; |
e780aef2 | 5400 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
5401 | head = next; |
5402 | next = NEXT_SEC (head); | |
5403 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
5404 | } |
5405 | } | |
07d72278 | 5406 | head = next; |
906e58ca NC |
5407 | } |
5408 | } | |
07d72278 | 5409 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
5410 | |
5411 | free (htab->input_list); | |
5412 | #undef PREV_SEC | |
07d72278 | 5413 | #undef NEXT_SEC |
906e58ca NC |
5414 | } |
5415 | ||
48229727 JB |
5416 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
5417 | erratum fix. */ | |
5418 | ||
5419 | static int | |
5420 | a8_reloc_compare (const void *a, const void *b) | |
5421 | { | |
21d799b5 NC |
5422 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
5423 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
5424 | |
5425 | if (ra->from < rb->from) | |
5426 | return -1; | |
5427 | else if (ra->from > rb->from) | |
5428 | return 1; | |
5429 | else | |
5430 | return 0; | |
5431 | } | |
5432 | ||
5433 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
5434 | const char *, char **); | |
5435 | ||
5436 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
5437 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 5438 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
5439 | otherwise. */ |
5440 | ||
81694485 NC |
5441 | static bfd_boolean |
5442 | cortex_a8_erratum_scan (bfd *input_bfd, | |
5443 | struct bfd_link_info *info, | |
48229727 JB |
5444 | struct a8_erratum_fix **a8_fixes_p, |
5445 | unsigned int *num_a8_fixes_p, | |
5446 | unsigned int *a8_fix_table_size_p, | |
5447 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
5448 | unsigned int num_a8_relocs, |
5449 | unsigned prev_num_a8_fixes, | |
5450 | bfd_boolean *stub_changed_p) | |
48229727 JB |
5451 | { |
5452 | asection *section; | |
5453 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
5454 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
5455 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
5456 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
5457 | ||
4dfe6ac6 NC |
5458 | if (htab == NULL) |
5459 | return FALSE; | |
5460 | ||
48229727 JB |
5461 | for (section = input_bfd->sections; |
5462 | section != NULL; | |
5463 | section = section->next) | |
5464 | { | |
5465 | bfd_byte *contents = NULL; | |
5466 | struct _arm_elf_section_data *sec_data; | |
5467 | unsigned int span; | |
5468 | bfd_vma base_vma; | |
5469 | ||
5470 | if (elf_section_type (section) != SHT_PROGBITS | |
99059e56 RM |
5471 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 |
5472 | || (section->flags & SEC_EXCLUDE) != 0 | |
5473 | || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS) | |
5474 | || (section->output_section == bfd_abs_section_ptr)) | |
5475 | continue; | |
48229727 JB |
5476 | |
5477 | base_vma = section->output_section->vma + section->output_offset; | |
5478 | ||
5479 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
99059e56 | 5480 | contents = elf_section_data (section)->this_hdr.contents; |
48229727 | 5481 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) |
99059e56 | 5482 | return TRUE; |
48229727 JB |
5483 | |
5484 | sec_data = elf32_arm_section_data (section); | |
5485 | ||
5486 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
5487 | { |
5488 | unsigned int span_start = sec_data->map[span].vma; | |
5489 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
5490 | ? section->size : sec_data->map[span + 1].vma; | |
5491 | unsigned int i; | |
5492 | char span_type = sec_data->map[span].type; | |
5493 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; | |
5494 | ||
5495 | if (span_type != 't') | |
5496 | continue; | |
5497 | ||
5498 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
5499 | if (((base_vma + span_start) & ~0xfff) | |
48229727 | 5500 | == ((base_vma + span_end) & ~0xfff)) |
99059e56 RM |
5501 | continue; |
5502 | ||
5503 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
5504 | ||
5505 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
5506 | * The branch target is in the same 4KB region as the | |
5507 | first half of the branch. | |
5508 | * The instruction before the branch is a 32-bit | |
5509 | length non-branch instruction. */ | |
5510 | for (i = span_start; i < span_end;) | |
5511 | { | |
5512 | unsigned int insn = bfd_getl16 (&contents[i]); | |
5513 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; | |
48229727 JB |
5514 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; |
5515 | ||
99059e56 RM |
5516 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) |
5517 | insn_32bit = TRUE; | |
48229727 JB |
5518 | |
5519 | if (insn_32bit) | |
99059e56 RM |
5520 | { |
5521 | /* Load the rest of the insn (in manual-friendly order). */ | |
5522 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
5523 | ||
5524 | /* Encoding T4: B<c>.W. */ | |
5525 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
5526 | /* Encoding T1: BL<c>.W. */ | |
5527 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
5528 | /* Encoding T2: BLX<c>.W. */ | |
5529 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
48229727 JB |
5530 | /* Encoding T3: B<c>.W (not permitted in IT block). */ |
5531 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
5532 | && (insn & 0x07f00000) != 0x03800000; | |
5533 | } | |
5534 | ||
5535 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
fe33d2fa | 5536 | |
99059e56 | 5537 | if (((base_vma + i) & 0xfff) == 0xffe |
81694485 NC |
5538 | && insn_32bit |
5539 | && is_32bit_branch | |
5540 | && last_was_32bit | |
5541 | && ! last_was_branch) | |
99059e56 RM |
5542 | { |
5543 | bfd_signed_vma offset = 0; | |
5544 | bfd_boolean force_target_arm = FALSE; | |
48229727 | 5545 | bfd_boolean force_target_thumb = FALSE; |
99059e56 RM |
5546 | bfd_vma target; |
5547 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5548 | struct a8_erratum_reloc key, *found; | |
5549 | bfd_boolean use_plt = FALSE; | |
48229727 | 5550 | |
99059e56 RM |
5551 | key.from = base_vma + i; |
5552 | found = (struct a8_erratum_reloc *) | |
5553 | bsearch (&key, a8_relocs, num_a8_relocs, | |
5554 | sizeof (struct a8_erratum_reloc), | |
5555 | &a8_reloc_compare); | |
48229727 JB |
5556 | |
5557 | if (found) | |
5558 | { | |
5559 | char *error_message = NULL; | |
5560 | struct elf_link_hash_entry *entry; | |
5561 | ||
5562 | /* We don't care about the error returned from this | |
99059e56 | 5563 | function, only if there is glue or not. */ |
48229727 JB |
5564 | entry = find_thumb_glue (info, found->sym_name, |
5565 | &error_message); | |
5566 | ||
5567 | if (entry) | |
5568 | found->non_a8_stub = TRUE; | |
5569 | ||
92750f34 | 5570 | /* Keep a simpler condition, for the sake of clarity. */ |
362d30a1 | 5571 | if (htab->root.splt != NULL && found->hash != NULL |
92750f34 DJ |
5572 | && found->hash->root.plt.offset != (bfd_vma) -1) |
5573 | use_plt = TRUE; | |
5574 | ||
5575 | if (found->r_type == R_ARM_THM_CALL) | |
5576 | { | |
35fc36a8 RS |
5577 | if (found->branch_type == ST_BRANCH_TO_ARM |
5578 | || use_plt) | |
92750f34 DJ |
5579 | force_target_arm = TRUE; |
5580 | else | |
5581 | force_target_thumb = TRUE; | |
5582 | } | |
48229727 JB |
5583 | } |
5584 | ||
99059e56 | 5585 | /* Check if we have an offending branch instruction. */ |
48229727 JB |
5586 | |
5587 | if (found && found->non_a8_stub) | |
5588 | /* We've already made a stub for this instruction, e.g. | |
5589 | it's a long branch or a Thumb->ARM stub. Assume that | |
5590 | stub will suffice to work around the A8 erratum (see | |
5591 | setting of always_after_branch above). */ | |
5592 | ; | |
99059e56 RM |
5593 | else if (is_bcc) |
5594 | { | |
5595 | offset = (insn & 0x7ff) << 1; | |
5596 | offset |= (insn & 0x3f0000) >> 4; | |
5597 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
5598 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
5599 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
5600 | if (offset & 0x100000) | |
5601 | offset |= ~ ((bfd_signed_vma) 0xfffff); | |
5602 | stub_type = arm_stub_a8_veneer_b_cond; | |
5603 | } | |
5604 | else if (is_b || is_bl || is_blx) | |
5605 | { | |
5606 | int s = (insn & 0x4000000) != 0; | |
5607 | int j1 = (insn & 0x2000) != 0; | |
5608 | int j2 = (insn & 0x800) != 0; | |
5609 | int i1 = !(j1 ^ s); | |
5610 | int i2 = !(j2 ^ s); | |
5611 | ||
5612 | offset = (insn & 0x7ff) << 1; | |
5613 | offset |= (insn & 0x3ff0000) >> 4; | |
5614 | offset |= i2 << 22; | |
5615 | offset |= i1 << 23; | |
5616 | offset |= s << 24; | |
5617 | if (offset & 0x1000000) | |
5618 | offset |= ~ ((bfd_signed_vma) 0xffffff); | |
5619 | ||
5620 | if (is_blx) | |
5621 | offset &= ~ ((bfd_signed_vma) 3); | |
5622 | ||
5623 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
5624 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
5625 | } | |
5626 | ||
5627 | if (stub_type != arm_stub_none) | |
5628 | { | |
5629 | bfd_vma pc_for_insn = base_vma + i + 4; | |
48229727 JB |
5630 | |
5631 | /* The original instruction is a BL, but the target is | |
99059e56 | 5632 | an ARM instruction. If we were not making a stub, |
48229727 JB |
5633 | the BL would have been converted to a BLX. Use the |
5634 | BLX stub instead in that case. */ | |
5635 | if (htab->use_blx && force_target_arm | |
5636 | && stub_type == arm_stub_a8_veneer_bl) | |
5637 | { | |
5638 | stub_type = arm_stub_a8_veneer_blx; | |
5639 | is_blx = TRUE; | |
5640 | is_bl = FALSE; | |
5641 | } | |
5642 | /* Conversely, if the original instruction was | |
5643 | BLX but the target is Thumb mode, use the BL | |
5644 | stub. */ | |
5645 | else if (force_target_thumb | |
5646 | && stub_type == arm_stub_a8_veneer_blx) | |
5647 | { | |
5648 | stub_type = arm_stub_a8_veneer_bl; | |
5649 | is_blx = FALSE; | |
5650 | is_bl = TRUE; | |
5651 | } | |
5652 | ||
99059e56 RM |
5653 | if (is_blx) |
5654 | pc_for_insn &= ~ ((bfd_vma) 3); | |
48229727 | 5655 | |
99059e56 RM |
5656 | /* If we found a relocation, use the proper destination, |
5657 | not the offset in the (unrelocated) instruction. | |
48229727 JB |
5658 | Note this is always done if we switched the stub type |
5659 | above. */ | |
99059e56 RM |
5660 | if (found) |
5661 | offset = | |
81694485 | 5662 | (bfd_signed_vma) (found->destination - pc_for_insn); |
48229727 | 5663 | |
99059e56 RM |
5664 | /* If the stub will use a Thumb-mode branch to a |
5665 | PLT target, redirect it to the preceding Thumb | |
5666 | entry point. */ | |
5667 | if (stub_type != arm_stub_a8_veneer_blx && use_plt) | |
5668 | offset -= PLT_THUMB_STUB_SIZE; | |
7d24e6a6 | 5669 | |
99059e56 | 5670 | target = pc_for_insn + offset; |
48229727 | 5671 | |
99059e56 RM |
5672 | /* The BLX stub is ARM-mode code. Adjust the offset to |
5673 | take the different PC value (+8 instead of +4) into | |
48229727 | 5674 | account. */ |
99059e56 RM |
5675 | if (stub_type == arm_stub_a8_veneer_blx) |
5676 | offset += 4; | |
5677 | ||
5678 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
5679 | { | |
5680 | char *stub_name = NULL; | |
5681 | ||
5682 | if (num_a8_fixes == a8_fix_table_size) | |
5683 | { | |
5684 | a8_fix_table_size *= 2; | |
5685 | a8_fixes = (struct a8_erratum_fix *) | |
5686 | bfd_realloc (a8_fixes, | |
5687 | sizeof (struct a8_erratum_fix) | |
5688 | * a8_fix_table_size); | |
5689 | } | |
48229727 | 5690 | |
eb7c4339 NS |
5691 | if (num_a8_fixes < prev_num_a8_fixes) |
5692 | { | |
5693 | /* If we're doing a subsequent scan, | |
5694 | check if we've found the same fix as | |
5695 | before, and try and reuse the stub | |
5696 | name. */ | |
5697 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
5698 | if ((a8_fixes[num_a8_fixes].section != section) | |
5699 | || (a8_fixes[num_a8_fixes].offset != i)) | |
5700 | { | |
5701 | free (stub_name); | |
5702 | stub_name = NULL; | |
5703 | *stub_changed_p = TRUE; | |
5704 | } | |
5705 | } | |
5706 | ||
5707 | if (!stub_name) | |
5708 | { | |
21d799b5 | 5709 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
5710 | if (stub_name != NULL) |
5711 | sprintf (stub_name, "%x:%x", section->id, i); | |
5712 | } | |
48229727 | 5713 | |
99059e56 RM |
5714 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; |
5715 | a8_fixes[num_a8_fixes].section = section; | |
5716 | a8_fixes[num_a8_fixes].offset = i; | |
8d9d9490 TP |
5717 | a8_fixes[num_a8_fixes].target_offset = |
5718 | target - base_vma; | |
99059e56 RM |
5719 | a8_fixes[num_a8_fixes].orig_insn = insn; |
5720 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
5721 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
5722 | a8_fixes[num_a8_fixes].branch_type = | |
35fc36a8 | 5723 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; |
48229727 | 5724 | |
99059e56 RM |
5725 | num_a8_fixes++; |
5726 | } | |
5727 | } | |
5728 | } | |
48229727 | 5729 | |
99059e56 RM |
5730 | i += insn_32bit ? 4 : 2; |
5731 | last_was_32bit = insn_32bit; | |
48229727 | 5732 | last_was_branch = is_32bit_branch; |
99059e56 RM |
5733 | } |
5734 | } | |
48229727 JB |
5735 | |
5736 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
99059e56 | 5737 | free (contents); |
48229727 | 5738 | } |
fe33d2fa | 5739 | |
48229727 JB |
5740 | *a8_fixes_p = a8_fixes; |
5741 | *num_a8_fixes_p = num_a8_fixes; | |
5742 | *a8_fix_table_size_p = a8_fix_table_size; | |
fe33d2fa | 5743 | |
81694485 | 5744 | return FALSE; |
48229727 JB |
5745 | } |
5746 | ||
b715f643 TP |
5747 | /* Create or update a stub entry depending on whether the stub can already be |
5748 | found in HTAB. The stub is identified by: | |
5749 | - its type STUB_TYPE | |
5750 | - its source branch (note that several can share the same stub) whose | |
5751 | section and relocation (if any) are given by SECTION and IRELA | |
5752 | respectively | |
5753 | - its target symbol whose input section, hash, name, value and branch type | |
5754 | are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE | |
5755 | respectively | |
5756 | ||
5757 | If found, the value of the stub's target symbol is updated from SYM_VALUE | |
5758 | and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to | |
5759 | TRUE and the stub entry is initialized. | |
5760 | ||
0955507f TP |
5761 | Returns the stub that was created or updated, or NULL if an error |
5762 | occurred. */ | |
b715f643 | 5763 | |
0955507f | 5764 | static struct elf32_arm_stub_hash_entry * |
b715f643 TP |
5765 | elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab, |
5766 | enum elf32_arm_stub_type stub_type, asection *section, | |
5767 | Elf_Internal_Rela *irela, asection *sym_sec, | |
5768 | struct elf32_arm_link_hash_entry *hash, char *sym_name, | |
5769 | bfd_vma sym_value, enum arm_st_branch_type branch_type, | |
5770 | bfd_boolean *new_stub) | |
5771 | { | |
5772 | const asection *id_sec; | |
5773 | char *stub_name; | |
5774 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5775 | unsigned int r_type; | |
4f4faa4d | 5776 | bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type); |
b715f643 TP |
5777 | |
5778 | BFD_ASSERT (stub_type != arm_stub_none); | |
5779 | *new_stub = FALSE; | |
5780 | ||
4f4faa4d TP |
5781 | if (sym_claimed) |
5782 | stub_name = sym_name; | |
5783 | else | |
5784 | { | |
5785 | BFD_ASSERT (irela); | |
5786 | BFD_ASSERT (section); | |
c2abbbeb | 5787 | BFD_ASSERT (section->id <= htab->top_id); |
b715f643 | 5788 | |
4f4faa4d TP |
5789 | /* Support for grouping stub sections. */ |
5790 | id_sec = htab->stub_group[section->id].link_sec; | |
b715f643 | 5791 | |
4f4faa4d TP |
5792 | /* Get the name of this stub. */ |
5793 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, | |
5794 | stub_type); | |
5795 | if (!stub_name) | |
0955507f | 5796 | return NULL; |
4f4faa4d | 5797 | } |
b715f643 TP |
5798 | |
5799 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE, | |
5800 | FALSE); | |
5801 | /* The proper stub has already been created, just update its value. */ | |
5802 | if (stub_entry != NULL) | |
5803 | { | |
4f4faa4d TP |
5804 | if (!sym_claimed) |
5805 | free (stub_name); | |
b715f643 | 5806 | stub_entry->target_value = sym_value; |
0955507f | 5807 | return stub_entry; |
b715f643 TP |
5808 | } |
5809 | ||
daa4adae | 5810 | stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type); |
b715f643 TP |
5811 | if (stub_entry == NULL) |
5812 | { | |
4f4faa4d TP |
5813 | if (!sym_claimed) |
5814 | free (stub_name); | |
0955507f | 5815 | return NULL; |
b715f643 TP |
5816 | } |
5817 | ||
5818 | stub_entry->target_value = sym_value; | |
5819 | stub_entry->target_section = sym_sec; | |
5820 | stub_entry->stub_type = stub_type; | |
5821 | stub_entry->h = hash; | |
5822 | stub_entry->branch_type = branch_type; | |
5823 | ||
4f4faa4d TP |
5824 | if (sym_claimed) |
5825 | stub_entry->output_name = sym_name; | |
5826 | else | |
b715f643 | 5827 | { |
4f4faa4d TP |
5828 | if (sym_name == NULL) |
5829 | sym_name = "unnamed"; | |
5830 | stub_entry->output_name = (char *) | |
5831 | bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME) | |
5832 | + strlen (sym_name)); | |
5833 | if (stub_entry->output_name == NULL) | |
5834 | { | |
5835 | free (stub_name); | |
0955507f | 5836 | return NULL; |
4f4faa4d | 5837 | } |
b715f643 | 5838 | |
4f4faa4d TP |
5839 | /* For historical reasons, use the existing names for ARM-to-Thumb and |
5840 | Thumb-to-ARM stubs. */ | |
5841 | r_type = ELF32_R_TYPE (irela->r_info); | |
5842 | if ((r_type == (unsigned int) R_ARM_THM_CALL | |
5843 | || r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5844 | || r_type == (unsigned int) R_ARM_THM_JUMP19) | |
5845 | && branch_type == ST_BRANCH_TO_ARM) | |
5846 | sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
5847 | else if ((r_type == (unsigned int) R_ARM_CALL | |
5848 | || r_type == (unsigned int) R_ARM_JUMP24) | |
5849 | && branch_type == ST_BRANCH_TO_THUMB) | |
5850 | sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
5851 | else | |
5852 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name); | |
5853 | } | |
b715f643 TP |
5854 | |
5855 | *new_stub = TRUE; | |
0955507f | 5856 | return stub_entry; |
b715f643 TP |
5857 | } |
5858 | ||
4ba2ef8f TP |
5859 | /* Scan symbols in INPUT_BFD to identify secure entry functions needing a |
5860 | gateway veneer to transition from non secure to secure state and create them | |
5861 | accordingly. | |
5862 | ||
5863 | "ARMv8-M Security Extensions: Requirements on Development Tools" document | |
5864 | defines the conditions that govern Secure Gateway veneer creation for a | |
5865 | given symbol <SYM> as follows: | |
5866 | - it has function type | |
5867 | - it has non local binding | |
5868 | - a symbol named __acle_se_<SYM> (called special symbol) exists with the | |
5869 | same type, binding and value as <SYM> (called normal symbol). | |
5870 | An entry function can handle secure state transition itself in which case | |
5871 | its special symbol would have a different value from the normal symbol. | |
5872 | ||
5873 | OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash | |
5874 | entry mapping while HTAB gives the name to hash entry mapping. | |
0955507f TP |
5875 | *CMSE_STUB_CREATED is increased by the number of secure gateway veneer |
5876 | created. | |
4ba2ef8f | 5877 | |
0955507f | 5878 | The return value gives whether a stub failed to be allocated. */ |
4ba2ef8f TP |
5879 | |
5880 | static bfd_boolean | |
5881 | cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab, | |
5882 | obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes, | |
0955507f | 5883 | int *cmse_stub_created) |
4ba2ef8f TP |
5884 | { |
5885 | const struct elf_backend_data *bed; | |
5886 | Elf_Internal_Shdr *symtab_hdr; | |
5887 | unsigned i, j, sym_count, ext_start; | |
5888 | Elf_Internal_Sym *cmse_sym, *local_syms; | |
5889 | struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL; | |
5890 | enum arm_st_branch_type branch_type; | |
5891 | char *sym_name, *lsym_name; | |
5892 | bfd_vma sym_value; | |
5893 | asection *section; | |
0955507f TP |
5894 | struct elf32_arm_stub_hash_entry *stub_entry; |
5895 | bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE; | |
4ba2ef8f TP |
5896 | |
5897 | bed = get_elf_backend_data (input_bfd); | |
5898 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
5899 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; | |
5900 | ext_start = symtab_hdr->sh_info; | |
5901 | is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE | |
5902 | && out_attr[Tag_CPU_arch_profile].i == 'M'); | |
5903 | ||
5904 | local_syms = (Elf_Internal_Sym *) symtab_hdr->contents; | |
5905 | if (local_syms == NULL) | |
5906 | local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
5907 | symtab_hdr->sh_info, 0, NULL, NULL, | |
5908 | NULL); | |
5909 | if (symtab_hdr->sh_info && local_syms == NULL) | |
5910 | return FALSE; | |
5911 | ||
5912 | /* Scan symbols. */ | |
5913 | for (i = 0; i < sym_count; i++) | |
5914 | { | |
5915 | cmse_invalid = FALSE; | |
5916 | ||
5917 | if (i < ext_start) | |
5918 | { | |
5919 | cmse_sym = &local_syms[i]; | |
5920 | /* Not a special symbol. */ | |
5921 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal)) | |
5922 | continue; | |
5923 | sym_name = bfd_elf_string_from_elf_section (input_bfd, | |
5924 | symtab_hdr->sh_link, | |
5925 | cmse_sym->st_name); | |
5926 | /* Special symbol with local binding. */ | |
5927 | cmse_invalid = TRUE; | |
5928 | } | |
5929 | else | |
5930 | { | |
5931 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); | |
5932 | sym_name = (char *) cmse_hash->root.root.root.string; | |
5933 | ||
5934 | /* Not a special symbol. */ | |
5935 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) | |
5936 | continue; | |
5937 | ||
5938 | /* Special symbol has incorrect binding or type. */ | |
5939 | if ((cmse_hash->root.root.type != bfd_link_hash_defined | |
5940 | && cmse_hash->root.root.type != bfd_link_hash_defweak) | |
5941 | || cmse_hash->root.type != STT_FUNC) | |
5942 | cmse_invalid = TRUE; | |
5943 | } | |
5944 | ||
5945 | if (!is_v8m) | |
5946 | { | |
90b6238f AM |
5947 | _bfd_error_handler (_("%pB: special symbol `%s' only allowed for " |
5948 | "ARMv8-M architecture or later"), | |
4eca0228 | 5949 | input_bfd, sym_name); |
4ba2ef8f TP |
5950 | is_v8m = TRUE; /* Avoid multiple warning. */ |
5951 | ret = FALSE; | |
5952 | } | |
5953 | ||
5954 | if (cmse_invalid) | |
5955 | { | |
90b6238f AM |
5956 | _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be" |
5957 | " a global or weak function symbol"), | |
4eca0228 | 5958 | input_bfd, sym_name); |
4ba2ef8f TP |
5959 | ret = FALSE; |
5960 | if (i < ext_start) | |
5961 | continue; | |
5962 | } | |
5963 | ||
5964 | sym_name += strlen (CMSE_PREFIX); | |
5965 | hash = (struct elf32_arm_link_hash_entry *) | |
5966 | elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE); | |
5967 | ||
5968 | /* No associated normal symbol or it is neither global nor weak. */ | |
5969 | if (!hash | |
5970 | || (hash->root.root.type != bfd_link_hash_defined | |
5971 | && hash->root.root.type != bfd_link_hash_defweak) | |
5972 | || hash->root.type != STT_FUNC) | |
5973 | { | |
5974 | /* Initialize here to avoid warning about use of possibly | |
5975 | uninitialized variable. */ | |
5976 | j = 0; | |
5977 | ||
5978 | if (!hash) | |
5979 | { | |
5980 | /* Searching for a normal symbol with local binding. */ | |
5981 | for (; j < ext_start; j++) | |
5982 | { | |
5983 | lsym_name = | |
5984 | bfd_elf_string_from_elf_section (input_bfd, | |
5985 | symtab_hdr->sh_link, | |
5986 | local_syms[j].st_name); | |
5987 | if (!strcmp (sym_name, lsym_name)) | |
5988 | break; | |
5989 | } | |
5990 | } | |
5991 | ||
5992 | if (hash || j < ext_start) | |
5993 | { | |
4eca0228 | 5994 | _bfd_error_handler |
90b6238f AM |
5995 | (_("%pB: invalid standard symbol `%s'; it must be " |
5996 | "a global or weak function symbol"), | |
5997 | input_bfd, sym_name); | |
4ba2ef8f TP |
5998 | } |
5999 | else | |
4eca0228 | 6000 | _bfd_error_handler |
90b6238f | 6001 | (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name); |
4ba2ef8f TP |
6002 | ret = FALSE; |
6003 | if (!hash) | |
6004 | continue; | |
6005 | } | |
6006 | ||
6007 | sym_value = hash->root.root.u.def.value; | |
6008 | section = hash->root.root.u.def.section; | |
6009 | ||
6010 | if (cmse_hash->root.root.u.def.section != section) | |
6011 | { | |
4eca0228 | 6012 | _bfd_error_handler |
90b6238f | 6013 | (_("%pB: `%s' and its special symbol are in different sections"), |
4ba2ef8f TP |
6014 | input_bfd, sym_name); |
6015 | ret = FALSE; | |
6016 | } | |
6017 | if (cmse_hash->root.root.u.def.value != sym_value) | |
6018 | continue; /* Ignore: could be an entry function starting with SG. */ | |
6019 | ||
6020 | /* If this section is a link-once section that will be discarded, then | |
6021 | don't create any stubs. */ | |
6022 | if (section->output_section == NULL) | |
6023 | { | |
4eca0228 | 6024 | _bfd_error_handler |
90b6238f | 6025 | (_("%pB: entry function `%s' not output"), input_bfd, sym_name); |
4ba2ef8f TP |
6026 | continue; |
6027 | } | |
6028 | ||
6029 | if (hash->root.size == 0) | |
6030 | { | |
4eca0228 | 6031 | _bfd_error_handler |
90b6238f | 6032 | (_("%pB: entry function `%s' is empty"), input_bfd, sym_name); |
4ba2ef8f TP |
6033 | ret = FALSE; |
6034 | } | |
6035 | ||
6036 | if (!ret) | |
6037 | continue; | |
6038 | branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
0955507f | 6039 | stub_entry |
4ba2ef8f TP |
6040 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, |
6041 | NULL, NULL, section, hash, sym_name, | |
6042 | sym_value, branch_type, &new_stub); | |
6043 | ||
0955507f | 6044 | if (stub_entry == NULL) |
4ba2ef8f TP |
6045 | ret = FALSE; |
6046 | else | |
6047 | { | |
6048 | BFD_ASSERT (new_stub); | |
0955507f | 6049 | (*cmse_stub_created)++; |
4ba2ef8f TP |
6050 | } |
6051 | } | |
6052 | ||
6053 | if (!symtab_hdr->contents) | |
6054 | free (local_syms); | |
6055 | return ret; | |
6056 | } | |
6057 | ||
0955507f TP |
6058 | /* Return TRUE iff a symbol identified by its linker HASH entry is a secure |
6059 | code entry function, ie can be called from non secure code without using a | |
6060 | veneer. */ | |
6061 | ||
6062 | static bfd_boolean | |
6063 | cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash) | |
6064 | { | |
42484486 | 6065 | bfd_byte contents[4]; |
0955507f TP |
6066 | uint32_t first_insn; |
6067 | asection *section; | |
6068 | file_ptr offset; | |
6069 | bfd *abfd; | |
6070 | ||
6071 | /* Defined symbol of function type. */ | |
6072 | if (hash->root.root.type != bfd_link_hash_defined | |
6073 | && hash->root.root.type != bfd_link_hash_defweak) | |
6074 | return FALSE; | |
6075 | if (hash->root.type != STT_FUNC) | |
6076 | return FALSE; | |
6077 | ||
6078 | /* Read first instruction. */ | |
6079 | section = hash->root.root.u.def.section; | |
6080 | abfd = section->owner; | |
6081 | offset = hash->root.root.u.def.value - section->vma; | |
42484486 TP |
6082 | if (!bfd_get_section_contents (abfd, section, contents, offset, |
6083 | sizeof (contents))) | |
0955507f TP |
6084 | return FALSE; |
6085 | ||
42484486 TP |
6086 | first_insn = bfd_get_32 (abfd, contents); |
6087 | ||
6088 | /* Starts by SG instruction. */ | |
0955507f TP |
6089 | return first_insn == 0xe97fe97f; |
6090 | } | |
6091 | ||
6092 | /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new | |
6093 | secure gateway veneers (ie. the veneers was not in the input import library) | |
6094 | and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */ | |
6095 | ||
6096 | static bfd_boolean | |
6097 | arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info) | |
6098 | { | |
6099 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6100 | struct bfd_link_info *info; | |
6101 | ||
6102 | /* Massage our args to the form they really have. */ | |
6103 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
6104 | info = (struct bfd_link_info *) gen_info; | |
6105 | ||
6106 | if (info->out_implib_bfd) | |
6107 | return TRUE; | |
6108 | ||
6109 | if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only) | |
6110 | return TRUE; | |
6111 | ||
6112 | if (stub_entry->stub_offset == (bfd_vma) -1) | |
4eca0228 | 6113 | _bfd_error_handler (" %s", stub_entry->output_name); |
0955507f TP |
6114 | |
6115 | return TRUE; | |
6116 | } | |
6117 | ||
6118 | /* Set offset of each secure gateway veneers so that its address remain | |
6119 | identical to the one in the input import library referred by | |
6120 | HTAB->in_implib_bfd. A warning is issued for veneers that disappeared | |
6121 | (present in input import library but absent from the executable being | |
6122 | linked) or if new veneers appeared and there is no output import library | |
6123 | (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the | |
6124 | number of secure gateway veneers found in the input import library. | |
6125 | ||
6126 | The function returns whether an error occurred. If no error occurred, | |
6127 | *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan | |
6128 | and this function and HTAB->new_cmse_stub_offset is set to the biggest | |
6129 | veneer observed set for new veneers to be layed out after. */ | |
6130 | ||
6131 | static bfd_boolean | |
6132 | set_cmse_veneer_addr_from_implib (struct bfd_link_info *info, | |
6133 | struct elf32_arm_link_hash_table *htab, | |
6134 | int *cmse_stub_created) | |
6135 | { | |
6136 | long symsize; | |
6137 | char *sym_name; | |
6138 | flagword flags; | |
6139 | long i, symcount; | |
6140 | bfd *in_implib_bfd; | |
6141 | asection *stub_out_sec; | |
6142 | bfd_boolean ret = TRUE; | |
6143 | Elf_Internal_Sym *intsym; | |
6144 | const char *out_sec_name; | |
6145 | bfd_size_type cmse_stub_size; | |
6146 | asymbol **sympp = NULL, *sym; | |
6147 | struct elf32_arm_link_hash_entry *hash; | |
6148 | const insn_sequence *cmse_stub_template; | |
6149 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6150 | int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created; | |
6151 | bfd_vma veneer_value, stub_offset, next_cmse_stub_offset; | |
6152 | bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0; | |
6153 | ||
6154 | /* No input secure gateway import library. */ | |
6155 | if (!htab->in_implib_bfd) | |
6156 | return TRUE; | |
6157 | ||
6158 | in_implib_bfd = htab->in_implib_bfd; | |
6159 | if (!htab->cmse_implib) | |
6160 | { | |
871b3ab2 | 6161 | _bfd_error_handler (_("%pB: --in-implib only supported for Secure " |
90b6238f | 6162 | "Gateway import libraries"), in_implib_bfd); |
0955507f TP |
6163 | return FALSE; |
6164 | } | |
6165 | ||
6166 | /* Get symbol table size. */ | |
6167 | symsize = bfd_get_symtab_upper_bound (in_implib_bfd); | |
6168 | if (symsize < 0) | |
6169 | return FALSE; | |
6170 | ||
6171 | /* Read in the input secure gateway import library's symbol table. */ | |
6172 | sympp = (asymbol **) xmalloc (symsize); | |
6173 | symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp); | |
6174 | if (symcount < 0) | |
6175 | { | |
6176 | ret = FALSE; | |
6177 | goto free_sym_buf; | |
6178 | } | |
6179 | ||
6180 | htab->new_cmse_stub_offset = 0; | |
6181 | cmse_stub_size = | |
6182 | find_stub_size_and_template (arm_stub_cmse_branch_thumb_only, | |
6183 | &cmse_stub_template, | |
6184 | &cmse_stub_template_size); | |
6185 | out_sec_name = | |
6186 | arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only); | |
6187 | stub_out_sec = | |
6188 | bfd_get_section_by_name (htab->obfd, out_sec_name); | |
6189 | if (stub_out_sec != NULL) | |
6190 | cmse_stub_sec_vma = stub_out_sec->vma; | |
6191 | ||
6192 | /* Set addresses of veneers mentionned in input secure gateway import | |
6193 | library's symbol table. */ | |
6194 | for (i = 0; i < symcount; i++) | |
6195 | { | |
6196 | sym = sympp[i]; | |
6197 | flags = sym->flags; | |
6198 | sym_name = (char *) bfd_asymbol_name (sym); | |
6199 | intsym = &((elf_symbol_type *) sym)->internal_elf_sym; | |
6200 | ||
6201 | if (sym->section != bfd_abs_section_ptr | |
6202 | || !(flags & (BSF_GLOBAL | BSF_WEAK)) | |
6203 | || (flags & BSF_FUNCTION) != BSF_FUNCTION | |
6204 | || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal) | |
6205 | != ST_BRANCH_TO_THUMB)) | |
6206 | { | |
90b6238f AM |
6207 | _bfd_error_handler (_("%pB: invalid import library entry: `%s'; " |
6208 | "symbol should be absolute, global and " | |
6209 | "refer to Thumb functions"), | |
4eca0228 | 6210 | in_implib_bfd, sym_name); |
0955507f TP |
6211 | ret = FALSE; |
6212 | continue; | |
6213 | } | |
6214 | ||
6215 | veneer_value = bfd_asymbol_value (sym); | |
6216 | stub_offset = veneer_value - cmse_stub_sec_vma; | |
6217 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name, | |
6218 | FALSE, FALSE); | |
6219 | hash = (struct elf32_arm_link_hash_entry *) | |
6220 | elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE); | |
6221 | ||
6222 | /* Stub entry should have been created by cmse_scan or the symbol be of | |
6223 | a secure function callable from non secure code. */ | |
6224 | if (!stub_entry && !hash) | |
6225 | { | |
6226 | bfd_boolean new_stub; | |
6227 | ||
4eca0228 | 6228 | _bfd_error_handler |
90b6238f | 6229 | (_("entry function `%s' disappeared from secure code"), sym_name); |
0955507f TP |
6230 | hash = (struct elf32_arm_link_hash_entry *) |
6231 | elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE); | |
6232 | stub_entry | |
6233 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, | |
6234 | NULL, NULL, bfd_abs_section_ptr, hash, | |
6235 | sym_name, veneer_value, | |
6236 | ST_BRANCH_TO_THUMB, &new_stub); | |
6237 | if (stub_entry == NULL) | |
6238 | ret = FALSE; | |
6239 | else | |
6240 | { | |
6241 | BFD_ASSERT (new_stub); | |
6242 | new_cmse_stubs_created++; | |
6243 | (*cmse_stub_created)++; | |
6244 | } | |
6245 | stub_entry->stub_template_size = stub_entry->stub_size = 0; | |
6246 | stub_entry->stub_offset = stub_offset; | |
6247 | } | |
6248 | /* Symbol found is not callable from non secure code. */ | |
6249 | else if (!stub_entry) | |
6250 | { | |
6251 | if (!cmse_entry_fct_p (hash)) | |
6252 | { | |
90b6238f | 6253 | _bfd_error_handler (_("`%s' refers to a non entry function"), |
4eca0228 | 6254 | sym_name); |
0955507f TP |
6255 | ret = FALSE; |
6256 | } | |
6257 | continue; | |
6258 | } | |
6259 | else | |
6260 | { | |
6261 | /* Only stubs for SG veneers should have been created. */ | |
6262 | BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only); | |
6263 | ||
6264 | /* Check visibility hasn't changed. */ | |
6265 | if (!!(flags & BSF_GLOBAL) | |
6266 | != (hash->root.root.type == bfd_link_hash_defined)) | |
4eca0228 | 6267 | _bfd_error_handler |
90b6238f | 6268 | (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd, |
0955507f TP |
6269 | sym_name); |
6270 | ||
6271 | stub_entry->stub_offset = stub_offset; | |
6272 | } | |
6273 | ||
6274 | /* Size should match that of a SG veneer. */ | |
6275 | if (intsym->st_size != cmse_stub_size) | |
6276 | { | |
90b6238f | 6277 | _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"), |
4eca0228 | 6278 | in_implib_bfd, sym_name); |
0955507f TP |
6279 | ret = FALSE; |
6280 | } | |
6281 | ||
6282 | /* Previous veneer address is before current SG veneer section. */ | |
6283 | if (veneer_value < cmse_stub_sec_vma) | |
6284 | { | |
6285 | /* Avoid offset underflow. */ | |
6286 | if (stub_entry) | |
6287 | stub_entry->stub_offset = 0; | |
6288 | stub_offset = 0; | |
6289 | ret = FALSE; | |
6290 | } | |
6291 | ||
6292 | /* Complain if stub offset not a multiple of stub size. */ | |
6293 | if (stub_offset % cmse_stub_size) | |
6294 | { | |
4eca0228 | 6295 | _bfd_error_handler |
90b6238f AM |
6296 | (_("offset of veneer for entry function `%s' not a multiple of " |
6297 | "its size"), sym_name); | |
0955507f TP |
6298 | ret = FALSE; |
6299 | } | |
6300 | ||
6301 | if (!ret) | |
6302 | continue; | |
6303 | ||
6304 | new_cmse_stubs_created--; | |
6305 | if (veneer_value < cmse_stub_array_start) | |
6306 | cmse_stub_array_start = veneer_value; | |
6307 | next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7); | |
6308 | if (next_cmse_stub_offset > htab->new_cmse_stub_offset) | |
6309 | htab->new_cmse_stub_offset = next_cmse_stub_offset; | |
6310 | } | |
6311 | ||
6312 | if (!info->out_implib_bfd && new_cmse_stubs_created != 0) | |
6313 | { | |
6314 | BFD_ASSERT (new_cmse_stubs_created > 0); | |
4eca0228 | 6315 | _bfd_error_handler |
0955507f TP |
6316 | (_("new entry function(s) introduced but no output import library " |
6317 | "specified:")); | |
6318 | bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info); | |
6319 | } | |
6320 | ||
6321 | if (cmse_stub_array_start != cmse_stub_sec_vma) | |
6322 | { | |
4eca0228 | 6323 | _bfd_error_handler |
90b6238f | 6324 | (_("start address of `%s' is different from previous link"), |
0955507f TP |
6325 | out_sec_name); |
6326 | ret = FALSE; | |
6327 | } | |
6328 | ||
6329 | free_sym_buf: | |
6330 | free (sympp); | |
6331 | return ret; | |
6332 | } | |
6333 | ||
906e58ca NC |
6334 | /* Determine and set the size of the stub section for a final link. |
6335 | ||
6336 | The basic idea here is to examine all the relocations looking for | |
6337 | PC-relative calls to a target that is unreachable with a "bl" | |
6338 | instruction. */ | |
6339 | ||
6340 | bfd_boolean | |
6341 | elf32_arm_size_stubs (bfd *output_bfd, | |
6342 | bfd *stub_bfd, | |
6343 | struct bfd_link_info *info, | |
6344 | bfd_signed_vma group_size, | |
7a89b94e | 6345 | asection * (*add_stub_section) (const char *, asection *, |
6bde4c52 | 6346 | asection *, |
7a89b94e | 6347 | unsigned int), |
906e58ca NC |
6348 | void (*layout_sections_again) (void)) |
6349 | { | |
0955507f | 6350 | bfd_boolean ret = TRUE; |
4ba2ef8f | 6351 | obj_attribute *out_attr; |
0955507f | 6352 | int cmse_stub_created = 0; |
906e58ca | 6353 | bfd_size_type stub_group_size; |
4ba2ef8f | 6354 | bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE; |
906e58ca | 6355 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 6356 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 6357 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
6358 | struct a8_erratum_reloc *a8_relocs = NULL; |
6359 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
6360 | ||
4dfe6ac6 NC |
6361 | if (htab == NULL) |
6362 | return FALSE; | |
6363 | ||
48229727 JB |
6364 | if (htab->fix_cortex_a8) |
6365 | { | |
21d799b5 | 6366 | a8_fixes = (struct a8_erratum_fix *) |
99059e56 | 6367 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); |
21d799b5 | 6368 | a8_relocs = (struct a8_erratum_reloc *) |
99059e56 | 6369 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); |
48229727 | 6370 | } |
906e58ca NC |
6371 | |
6372 | /* Propagate mach to stub bfd, because it may not have been | |
6373 | finalized when we created stub_bfd. */ | |
6374 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
6375 | bfd_get_mach (output_bfd)); | |
6376 | ||
6377 | /* Stash our params away. */ | |
6378 | htab->stub_bfd = stub_bfd; | |
6379 | htab->add_stub_section = add_stub_section; | |
6380 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 6381 | stubs_always_after_branch = group_size < 0; |
48229727 | 6382 | |
4ba2ef8f TP |
6383 | out_attr = elf_known_obj_attributes_proc (output_bfd); |
6384 | m_profile = out_attr[Tag_CPU_arch_profile].i == 'M'; | |
0955507f | 6385 | |
48229727 JB |
6386 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page |
6387 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
6388 | crude way of enforcing that. */ | |
6389 | if (htab->fix_cortex_a8) | |
6390 | stubs_always_after_branch = 1; | |
6391 | ||
906e58ca NC |
6392 | if (group_size < 0) |
6393 | stub_group_size = -group_size; | |
6394 | else | |
6395 | stub_group_size = group_size; | |
6396 | ||
6397 | if (stub_group_size == 1) | |
6398 | { | |
6399 | /* Default values. */ | |
6400 | /* Thumb branch range is +-4MB has to be used as the default | |
6401 | maximum size (a given section can contain both ARM and Thumb | |
6402 | code, so the worst case has to be taken into account). | |
6403 | ||
6404 | This value is 24K less than that, which allows for 2025 | |
6405 | 12-byte stubs. If we exceed that, then we will fail to link. | |
6406 | The user will have to relink with an explicit group size | |
6407 | option. */ | |
6408 | stub_group_size = 4170000; | |
6409 | } | |
6410 | ||
07d72278 | 6411 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 6412 | |
3ae046cc NS |
6413 | /* If we're applying the cortex A8 fix, we need to determine the |
6414 | program header size now, because we cannot change it later -- | |
6415 | that could alter section placements. Notice the A8 erratum fix | |
6416 | ends up requiring the section addresses to remain unchanged | |
6417 | modulo the page size. That's something we cannot represent | |
6418 | inside BFD, and we don't want to force the section alignment to | |
6419 | be the page size. */ | |
6420 | if (htab->fix_cortex_a8) | |
6421 | (*htab->layout_sections_again) (); | |
6422 | ||
906e58ca NC |
6423 | while (1) |
6424 | { | |
6425 | bfd *input_bfd; | |
6426 | unsigned int bfd_indx; | |
6427 | asection *stub_sec; | |
d7c5bd02 | 6428 | enum elf32_arm_stub_type stub_type; |
eb7c4339 NS |
6429 | bfd_boolean stub_changed = FALSE; |
6430 | unsigned prev_num_a8_fixes = num_a8_fixes; | |
906e58ca | 6431 | |
48229727 | 6432 | num_a8_fixes = 0; |
906e58ca NC |
6433 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
6434 | input_bfd != NULL; | |
c72f2fb2 | 6435 | input_bfd = input_bfd->link.next, bfd_indx++) |
906e58ca NC |
6436 | { |
6437 | Elf_Internal_Shdr *symtab_hdr; | |
6438 | asection *section; | |
6439 | Elf_Internal_Sym *local_syms = NULL; | |
6440 | ||
99059e56 RM |
6441 | if (!is_arm_elf (input_bfd)) |
6442 | continue; | |
adbcc655 | 6443 | |
48229727 JB |
6444 | num_a8_relocs = 0; |
6445 | ||
906e58ca NC |
6446 | /* We'll need the symbol table in a second. */ |
6447 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
6448 | if (symtab_hdr->sh_info == 0) | |
6449 | continue; | |
6450 | ||
4ba2ef8f TP |
6451 | /* Limit scan of symbols to object file whose profile is |
6452 | Microcontroller to not hinder performance in the general case. */ | |
6453 | if (m_profile && first_veneer_scan) | |
6454 | { | |
6455 | struct elf_link_hash_entry **sym_hashes; | |
6456 | ||
6457 | sym_hashes = elf_sym_hashes (input_bfd); | |
6458 | if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes, | |
0955507f | 6459 | &cmse_stub_created)) |
4ba2ef8f | 6460 | goto error_ret_free_local; |
0955507f TP |
6461 | |
6462 | if (cmse_stub_created != 0) | |
6463 | stub_changed = TRUE; | |
4ba2ef8f TP |
6464 | } |
6465 | ||
906e58ca NC |
6466 | /* Walk over each section attached to the input bfd. */ |
6467 | for (section = input_bfd->sections; | |
6468 | section != NULL; | |
6469 | section = section->next) | |
6470 | { | |
6471 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
6472 | ||
6473 | /* If there aren't any relocs, then there's nothing more | |
6474 | to do. */ | |
6475 | if ((section->flags & SEC_RELOC) == 0 | |
6476 | || section->reloc_count == 0 | |
6477 | || (section->flags & SEC_CODE) == 0) | |
6478 | continue; | |
6479 | ||
6480 | /* If this section is a link-once section that will be | |
6481 | discarded, then don't create any stubs. */ | |
6482 | if (section->output_section == NULL | |
6483 | || section->output_section->owner != output_bfd) | |
6484 | continue; | |
6485 | ||
6486 | /* Get the relocs. */ | |
6487 | internal_relocs | |
6488 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
6489 | NULL, info->keep_memory); | |
6490 | if (internal_relocs == NULL) | |
6491 | goto error_ret_free_local; | |
6492 | ||
6493 | /* Now examine each relocation. */ | |
6494 | irela = internal_relocs; | |
6495 | irelaend = irela + section->reloc_count; | |
6496 | for (; irela < irelaend; irela++) | |
6497 | { | |
6498 | unsigned int r_type, r_indx; | |
906e58ca NC |
6499 | asection *sym_sec; |
6500 | bfd_vma sym_value; | |
6501 | bfd_vma destination; | |
6502 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 6503 | const char *sym_name; |
34e77a92 | 6504 | unsigned char st_type; |
35fc36a8 | 6505 | enum arm_st_branch_type branch_type; |
48229727 | 6506 | bfd_boolean created_stub = FALSE; |
906e58ca NC |
6507 | |
6508 | r_type = ELF32_R_TYPE (irela->r_info); | |
6509 | r_indx = ELF32_R_SYM (irela->r_info); | |
6510 | ||
6511 | if (r_type >= (unsigned int) R_ARM_max) | |
6512 | { | |
6513 | bfd_set_error (bfd_error_bad_value); | |
6514 | error_ret_free_internal: | |
6515 | if (elf_section_data (section)->relocs == NULL) | |
6516 | free (internal_relocs); | |
15dd01b1 TP |
6517 | /* Fall through. */ |
6518 | error_ret_free_local: | |
6519 | if (local_syms != NULL | |
6520 | && (symtab_hdr->contents | |
6521 | != (unsigned char *) local_syms)) | |
6522 | free (local_syms); | |
6523 | return FALSE; | |
906e58ca | 6524 | } |
b38cadfb | 6525 | |
0855e32b NS |
6526 | hash = NULL; |
6527 | if (r_indx >= symtab_hdr->sh_info) | |
6528 | hash = elf32_arm_hash_entry | |
6529 | (elf_sym_hashes (input_bfd) | |
6530 | [r_indx - symtab_hdr->sh_info]); | |
b38cadfb | 6531 | |
0855e32b NS |
6532 | /* Only look for stubs on branch instructions, or |
6533 | non-relaxed TLSCALL */ | |
906e58ca | 6534 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
6535 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
6536 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
6537 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
6538 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 | 6539 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
0855e32b NS |
6540 | && (r_type != (unsigned int) R_ARM_PLT32) |
6541 | && !((r_type == (unsigned int) R_ARM_TLS_CALL | |
6542 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
6543 | && r_type == elf32_arm_tls_transition | |
6544 | (info, r_type, &hash->root) | |
6545 | && ((hash ? hash->tls_type | |
6546 | : (elf32_arm_local_got_tls_type | |
6547 | (input_bfd)[r_indx])) | |
6548 | & GOT_TLS_GDESC) != 0)) | |
906e58ca NC |
6549 | continue; |
6550 | ||
6551 | /* Now determine the call target, its name, value, | |
6552 | section. */ | |
6553 | sym_sec = NULL; | |
6554 | sym_value = 0; | |
6555 | destination = 0; | |
7413f23f | 6556 | sym_name = NULL; |
b38cadfb | 6557 | |
0855e32b NS |
6558 | if (r_type == (unsigned int) R_ARM_TLS_CALL |
6559 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
6560 | { | |
6561 | /* A non-relaxed TLS call. The target is the | |
6562 | plt-resident trampoline and nothing to do | |
6563 | with the symbol. */ | |
6564 | BFD_ASSERT (htab->tls_trampoline > 0); | |
6565 | sym_sec = htab->root.splt; | |
6566 | sym_value = htab->tls_trampoline; | |
6567 | hash = 0; | |
34e77a92 | 6568 | st_type = STT_FUNC; |
35fc36a8 | 6569 | branch_type = ST_BRANCH_TO_ARM; |
0855e32b NS |
6570 | } |
6571 | else if (!hash) | |
906e58ca NC |
6572 | { |
6573 | /* It's a local symbol. */ | |
6574 | Elf_Internal_Sym *sym; | |
906e58ca NC |
6575 | |
6576 | if (local_syms == NULL) | |
6577 | { | |
6578 | local_syms | |
6579 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
6580 | if (local_syms == NULL) | |
6581 | local_syms | |
6582 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
6583 | symtab_hdr->sh_info, 0, | |
6584 | NULL, NULL, NULL); | |
6585 | if (local_syms == NULL) | |
6586 | goto error_ret_free_internal; | |
6587 | } | |
6588 | ||
6589 | sym = local_syms + r_indx; | |
f6d250ce TS |
6590 | if (sym->st_shndx == SHN_UNDEF) |
6591 | sym_sec = bfd_und_section_ptr; | |
6592 | else if (sym->st_shndx == SHN_ABS) | |
6593 | sym_sec = bfd_abs_section_ptr; | |
6594 | else if (sym->st_shndx == SHN_COMMON) | |
6595 | sym_sec = bfd_com_section_ptr; | |
6596 | else | |
6597 | sym_sec = | |
6598 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); | |
6599 | ||
ffcb4889 NS |
6600 | if (!sym_sec) |
6601 | /* This is an undefined symbol. It can never | |
6a631e86 | 6602 | be resolved. */ |
ffcb4889 | 6603 | continue; |
fe33d2fa | 6604 | |
906e58ca NC |
6605 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
6606 | sym_value = sym->st_value; | |
6607 | destination = (sym_value + irela->r_addend | |
6608 | + sym_sec->output_offset | |
6609 | + sym_sec->output_section->vma); | |
34e77a92 | 6610 | st_type = ELF_ST_TYPE (sym->st_info); |
39d911fc TP |
6611 | branch_type = |
6612 | ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
7413f23f DJ |
6613 | sym_name |
6614 | = bfd_elf_string_from_elf_section (input_bfd, | |
6615 | symtab_hdr->sh_link, | |
6616 | sym->st_name); | |
906e58ca NC |
6617 | } |
6618 | else | |
6619 | { | |
6620 | /* It's an external symbol. */ | |
906e58ca NC |
6621 | while (hash->root.root.type == bfd_link_hash_indirect |
6622 | || hash->root.root.type == bfd_link_hash_warning) | |
6623 | hash = ((struct elf32_arm_link_hash_entry *) | |
6624 | hash->root.root.u.i.link); | |
6625 | ||
6626 | if (hash->root.root.type == bfd_link_hash_defined | |
6627 | || hash->root.root.type == bfd_link_hash_defweak) | |
6628 | { | |
6629 | sym_sec = hash->root.root.u.def.section; | |
6630 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
6631 | |
6632 | struct elf32_arm_link_hash_table *globals = | |
6633 | elf32_arm_hash_table (info); | |
6634 | ||
6635 | /* For a destination in a shared library, | |
6636 | use the PLT stub as target address to | |
6637 | decide whether a branch stub is | |
6638 | needed. */ | |
4dfe6ac6 | 6639 | if (globals != NULL |
362d30a1 | 6640 | && globals->root.splt != NULL |
4dfe6ac6 | 6641 | && hash != NULL |
022f8312 CL |
6642 | && hash->root.plt.offset != (bfd_vma) -1) |
6643 | { | |
362d30a1 | 6644 | sym_sec = globals->root.splt; |
022f8312 CL |
6645 | sym_value = hash->root.plt.offset; |
6646 | if (sym_sec->output_section != NULL) | |
6647 | destination = (sym_value | |
6648 | + sym_sec->output_offset | |
6649 | + sym_sec->output_section->vma); | |
6650 | } | |
6651 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
6652 | destination = (sym_value + irela->r_addend |
6653 | + sym_sec->output_offset | |
6654 | + sym_sec->output_section->vma); | |
6655 | } | |
69c5861e CL |
6656 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
6657 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
6658 | { | |
6659 | /* For a shared library, use the PLT stub as | |
6660 | target address to decide whether a long | |
6661 | branch stub is needed. | |
6662 | For absolute code, they cannot be handled. */ | |
6663 | struct elf32_arm_link_hash_table *globals = | |
6664 | elf32_arm_hash_table (info); | |
6665 | ||
4dfe6ac6 | 6666 | if (globals != NULL |
362d30a1 | 6667 | && globals->root.splt != NULL |
4dfe6ac6 | 6668 | && hash != NULL |
69c5861e CL |
6669 | && hash->root.plt.offset != (bfd_vma) -1) |
6670 | { | |
362d30a1 | 6671 | sym_sec = globals->root.splt; |
69c5861e CL |
6672 | sym_value = hash->root.plt.offset; |
6673 | if (sym_sec->output_section != NULL) | |
6674 | destination = (sym_value | |
6675 | + sym_sec->output_offset | |
6676 | + sym_sec->output_section->vma); | |
6677 | } | |
6678 | else | |
6679 | continue; | |
6680 | } | |
906e58ca NC |
6681 | else |
6682 | { | |
6683 | bfd_set_error (bfd_error_bad_value); | |
6684 | goto error_ret_free_internal; | |
6685 | } | |
34e77a92 | 6686 | st_type = hash->root.type; |
39d911fc TP |
6687 | branch_type = |
6688 | ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
7413f23f | 6689 | sym_name = hash->root.root.root.string; |
906e58ca NC |
6690 | } |
6691 | ||
48229727 | 6692 | do |
7413f23f | 6693 | { |
b715f643 | 6694 | bfd_boolean new_stub; |
0955507f | 6695 | struct elf32_arm_stub_hash_entry *stub_entry; |
b715f643 | 6696 | |
48229727 JB |
6697 | /* Determine what (if any) linker stub is needed. */ |
6698 | stub_type = arm_type_of_stub (info, section, irela, | |
34e77a92 RS |
6699 | st_type, &branch_type, |
6700 | hash, destination, sym_sec, | |
48229727 JB |
6701 | input_bfd, sym_name); |
6702 | if (stub_type == arm_stub_none) | |
6703 | break; | |
6704 | ||
48229727 JB |
6705 | /* We've either created a stub for this reloc already, |
6706 | or we are about to. */ | |
0955507f | 6707 | stub_entry = |
b715f643 TP |
6708 | elf32_arm_create_stub (htab, stub_type, section, irela, |
6709 | sym_sec, hash, | |
6710 | (char *) sym_name, sym_value, | |
6711 | branch_type, &new_stub); | |
7413f23f | 6712 | |
0955507f | 6713 | created_stub = stub_entry != NULL; |
b715f643 TP |
6714 | if (!created_stub) |
6715 | goto error_ret_free_internal; | |
6716 | else if (!new_stub) | |
6717 | break; | |
99059e56 | 6718 | else |
b715f643 | 6719 | stub_changed = TRUE; |
99059e56 RM |
6720 | } |
6721 | while (0); | |
6722 | ||
6723 | /* Look for relocations which might trigger Cortex-A8 | |
6724 | erratum. */ | |
6725 | if (htab->fix_cortex_a8 | |
6726 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
6727 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
6728 | || r_type == (unsigned int) R_ARM_THM_CALL | |
6729 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
6730 | { | |
6731 | bfd_vma from = section->output_section->vma | |
6732 | + section->output_offset | |
6733 | + irela->r_offset; | |
6734 | ||
6735 | if ((from & 0xfff) == 0xffe) | |
6736 | { | |
6737 | /* Found a candidate. Note we haven't checked the | |
6738 | destination is within 4K here: if we do so (and | |
6739 | don't create an entry in a8_relocs) we can't tell | |
6740 | that a branch should have been relocated when | |
6741 | scanning later. */ | |
6742 | if (num_a8_relocs == a8_reloc_table_size) | |
6743 | { | |
6744 | a8_reloc_table_size *= 2; | |
6745 | a8_relocs = (struct a8_erratum_reloc *) | |
6746 | bfd_realloc (a8_relocs, | |
6747 | sizeof (struct a8_erratum_reloc) | |
6748 | * a8_reloc_table_size); | |
6749 | } | |
6750 | ||
6751 | a8_relocs[num_a8_relocs].from = from; | |
6752 | a8_relocs[num_a8_relocs].destination = destination; | |
6753 | a8_relocs[num_a8_relocs].r_type = r_type; | |
6754 | a8_relocs[num_a8_relocs].branch_type = branch_type; | |
6755 | a8_relocs[num_a8_relocs].sym_name = sym_name; | |
6756 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
6757 | a8_relocs[num_a8_relocs].hash = hash; | |
6758 | ||
6759 | num_a8_relocs++; | |
6760 | } | |
6761 | } | |
906e58ca NC |
6762 | } |
6763 | ||
99059e56 RM |
6764 | /* We're done with the internal relocs, free them. */ |
6765 | if (elf_section_data (section)->relocs == NULL) | |
6766 | free (internal_relocs); | |
6767 | } | |
48229727 | 6768 | |
99059e56 | 6769 | if (htab->fix_cortex_a8) |
48229727 | 6770 | { |
99059e56 RM |
6771 | /* Sort relocs which might apply to Cortex-A8 erratum. */ |
6772 | qsort (a8_relocs, num_a8_relocs, | |
eb7c4339 | 6773 | sizeof (struct a8_erratum_reloc), |
99059e56 | 6774 | &a8_reloc_compare); |
48229727 | 6775 | |
99059e56 RM |
6776 | /* Scan for branches which might trigger Cortex-A8 erratum. */ |
6777 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
48229727 | 6778 | &num_a8_fixes, &a8_fix_table_size, |
eb7c4339 NS |
6779 | a8_relocs, num_a8_relocs, |
6780 | prev_num_a8_fixes, &stub_changed) | |
6781 | != 0) | |
48229727 | 6782 | goto error_ret_free_local; |
5e681ec4 | 6783 | } |
7f991970 AM |
6784 | |
6785 | if (local_syms != NULL | |
6786 | && symtab_hdr->contents != (unsigned char *) local_syms) | |
6787 | { | |
6788 | if (!info->keep_memory) | |
6789 | free (local_syms); | |
6790 | else | |
6791 | symtab_hdr->contents = (unsigned char *) local_syms; | |
6792 | } | |
5e681ec4 PB |
6793 | } |
6794 | ||
0955507f TP |
6795 | if (first_veneer_scan |
6796 | && !set_cmse_veneer_addr_from_implib (info, htab, | |
6797 | &cmse_stub_created)) | |
6798 | ret = FALSE; | |
6799 | ||
eb7c4339 | 6800 | if (prev_num_a8_fixes != num_a8_fixes) |
99059e56 | 6801 | stub_changed = TRUE; |
48229727 | 6802 | |
906e58ca NC |
6803 | if (!stub_changed) |
6804 | break; | |
5e681ec4 | 6805 | |
906e58ca NC |
6806 | /* OK, we've added some stubs. Find out the new size of the |
6807 | stub sections. */ | |
6808 | for (stub_sec = htab->stub_bfd->sections; | |
6809 | stub_sec != NULL; | |
6810 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
6811 | { |
6812 | /* Ignore non-stub sections. */ | |
6813 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
6814 | continue; | |
6815 | ||
6816 | stub_sec->size = 0; | |
6817 | } | |
b34b2d70 | 6818 | |
0955507f TP |
6819 | /* Add new SG veneers after those already in the input import |
6820 | library. */ | |
6821 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; | |
6822 | stub_type++) | |
6823 | { | |
6824 | bfd_vma *start_offset_p; | |
6825 | asection **stub_sec_p; | |
6826 | ||
6827 | start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type); | |
6828 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
6829 | if (start_offset_p == NULL) | |
6830 | continue; | |
6831 | ||
6832 | BFD_ASSERT (stub_sec_p != NULL); | |
6833 | if (*stub_sec_p != NULL) | |
6834 | (*stub_sec_p)->size = *start_offset_p; | |
6835 | } | |
6836 | ||
d7c5bd02 | 6837 | /* Compute stub section size, considering padding. */ |
906e58ca | 6838 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
d7c5bd02 TP |
6839 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; |
6840 | stub_type++) | |
6841 | { | |
6842 | int size, padding; | |
6843 | asection **stub_sec_p; | |
6844 | ||
6845 | padding = arm_dedicated_stub_section_padding (stub_type); | |
6846 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
6847 | /* Skip if no stub input section or no stub section padding | |
6848 | required. */ | |
6849 | if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0) | |
6850 | continue; | |
6851 | /* Stub section padding required but no dedicated section. */ | |
6852 | BFD_ASSERT (stub_sec_p); | |
6853 | ||
6854 | size = (*stub_sec_p)->size; | |
6855 | size = (size + padding - 1) & ~(padding - 1); | |
6856 | (*stub_sec_p)->size = size; | |
6857 | } | |
906e58ca | 6858 | |
48229727 JB |
6859 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
6860 | if (htab->fix_cortex_a8) | |
99059e56 RM |
6861 | for (i = 0; i < num_a8_fixes; i++) |
6862 | { | |
48229727 | 6863 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, |
daa4adae | 6864 | a8_fixes[i].section, htab, a8_fixes[i].stub_type); |
48229727 JB |
6865 | |
6866 | if (stub_sec == NULL) | |
7f991970 | 6867 | return FALSE; |
48229727 | 6868 | |
99059e56 RM |
6869 | stub_sec->size |
6870 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
6871 | NULL); | |
6872 | } | |
48229727 JB |
6873 | |
6874 | ||
906e58ca NC |
6875 | /* Ask the linker to do its stuff. */ |
6876 | (*htab->layout_sections_again) (); | |
4ba2ef8f | 6877 | first_veneer_scan = FALSE; |
ba93b8ac DJ |
6878 | } |
6879 | ||
48229727 JB |
6880 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
6881 | if (htab->fix_cortex_a8) | |
6882 | { | |
6883 | for (i = 0; i < num_a8_fixes; i++) | |
99059e56 RM |
6884 | { |
6885 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6886 | char *stub_name = a8_fixes[i].stub_name; | |
6887 | asection *section = a8_fixes[i].section; | |
6888 | unsigned int section_id = a8_fixes[i].section->id; | |
6889 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
6890 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
6891 | const insn_sequence *template_sequence; | |
6892 | int template_size, size = 0; | |
6893 | ||
6894 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
6895 | TRUE, FALSE); | |
6896 | if (stub_entry == NULL) | |
6897 | { | |
871b3ab2 | 6898 | _bfd_error_handler (_("%pB: cannot create stub entry %s"), |
4eca0228 | 6899 | section->owner, stub_name); |
99059e56 RM |
6900 | return FALSE; |
6901 | } | |
6902 | ||
6903 | stub_entry->stub_sec = stub_sec; | |
0955507f | 6904 | stub_entry->stub_offset = (bfd_vma) -1; |
99059e56 RM |
6905 | stub_entry->id_sec = link_sec; |
6906 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
8d9d9490 | 6907 | stub_entry->source_value = a8_fixes[i].offset; |
99059e56 | 6908 | stub_entry->target_section = a8_fixes[i].section; |
8d9d9490 | 6909 | stub_entry->target_value = a8_fixes[i].target_offset; |
99059e56 | 6910 | stub_entry->orig_insn = a8_fixes[i].orig_insn; |
35fc36a8 | 6911 | stub_entry->branch_type = a8_fixes[i].branch_type; |
48229727 | 6912 | |
99059e56 RM |
6913 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
6914 | &template_sequence, | |
6915 | &template_size); | |
48229727 | 6916 | |
99059e56 RM |
6917 | stub_entry->stub_size = size; |
6918 | stub_entry->stub_template = template_sequence; | |
6919 | stub_entry->stub_template_size = template_size; | |
6920 | } | |
48229727 JB |
6921 | |
6922 | /* Stash the Cortex-A8 erratum fix array for use later in | |
99059e56 | 6923 | elf32_arm_write_section(). */ |
48229727 JB |
6924 | htab->a8_erratum_fixes = a8_fixes; |
6925 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
6926 | } | |
6927 | else | |
6928 | { | |
6929 | htab->a8_erratum_fixes = NULL; | |
6930 | htab->num_a8_erratum_fixes = 0; | |
6931 | } | |
0955507f | 6932 | return ret; |
5e681ec4 PB |
6933 | } |
6934 | ||
906e58ca NC |
6935 | /* Build all the stubs associated with the current output file. The |
6936 | stubs are kept in a hash table attached to the main linker hash | |
6937 | table. We also set up the .plt entries for statically linked PIC | |
6938 | functions here. This function is called via arm_elf_finish in the | |
6939 | linker. */ | |
252b5132 | 6940 | |
906e58ca NC |
6941 | bfd_boolean |
6942 | elf32_arm_build_stubs (struct bfd_link_info *info) | |
252b5132 | 6943 | { |
906e58ca NC |
6944 | asection *stub_sec; |
6945 | struct bfd_hash_table *table; | |
0955507f | 6946 | enum elf32_arm_stub_type stub_type; |
906e58ca | 6947 | struct elf32_arm_link_hash_table *htab; |
252b5132 | 6948 | |
906e58ca | 6949 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
6950 | if (htab == NULL) |
6951 | return FALSE; | |
252b5132 | 6952 | |
906e58ca NC |
6953 | for (stub_sec = htab->stub_bfd->sections; |
6954 | stub_sec != NULL; | |
6955 | stub_sec = stub_sec->next) | |
252b5132 | 6956 | { |
906e58ca NC |
6957 | bfd_size_type size; |
6958 | ||
8029a119 | 6959 | /* Ignore non-stub sections. */ |
906e58ca NC |
6960 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
6961 | continue; | |
6962 | ||
d7c5bd02 | 6963 | /* Allocate memory to hold the linker stubs. Zeroing the stub sections |
0955507f TP |
6964 | must at least be done for stub section requiring padding and for SG |
6965 | veneers to ensure that a non secure code branching to a removed SG | |
6966 | veneer causes an error. */ | |
906e58ca | 6967 | size = stub_sec->size; |
21d799b5 | 6968 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca NC |
6969 | if (stub_sec->contents == NULL && size != 0) |
6970 | return FALSE; | |
0955507f | 6971 | |
906e58ca | 6972 | stub_sec->size = 0; |
252b5132 RH |
6973 | } |
6974 | ||
0955507f TP |
6975 | /* Add new SG veneers after those already in the input import library. */ |
6976 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) | |
6977 | { | |
6978 | bfd_vma *start_offset_p; | |
6979 | asection **stub_sec_p; | |
6980 | ||
6981 | start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type); | |
6982 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
6983 | if (start_offset_p == NULL) | |
6984 | continue; | |
6985 | ||
6986 | BFD_ASSERT (stub_sec_p != NULL); | |
6987 | if (*stub_sec_p != NULL) | |
6988 | (*stub_sec_p)->size = *start_offset_p; | |
6989 | } | |
6990 | ||
906e58ca NC |
6991 | /* Build the stubs as directed by the stub hash table. */ |
6992 | table = &htab->stub_hash_table; | |
6993 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
6994 | if (htab->fix_cortex_a8) |
6995 | { | |
6996 | /* Place the cortex a8 stubs last. */ | |
6997 | htab->fix_cortex_a8 = -1; | |
6998 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
6999 | } | |
252b5132 | 7000 | |
906e58ca | 7001 | return TRUE; |
252b5132 RH |
7002 | } |
7003 | ||
9b485d32 NC |
7004 | /* Locate the Thumb encoded calling stub for NAME. */ |
7005 | ||
252b5132 | 7006 | static struct elf_link_hash_entry * |
57e8b36a NC |
7007 | find_thumb_glue (struct bfd_link_info *link_info, |
7008 | const char *name, | |
f2a9dd69 | 7009 | char **error_message) |
252b5132 RH |
7010 | { |
7011 | char *tmp_name; | |
7012 | struct elf_link_hash_entry *hash; | |
7013 | struct elf32_arm_link_hash_table *hash_table; | |
7014 | ||
7015 | /* We need a pointer to the armelf specific hash table. */ | |
7016 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7017 | if (hash_table == NULL) |
7018 | return NULL; | |
252b5132 | 7019 | |
21d799b5 | 7020 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 7021 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
7022 | |
7023 | BFD_ASSERT (tmp_name); | |
7024 | ||
7025 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
7026 | ||
7027 | hash = elf_link_hash_lookup | |
b34976b6 | 7028 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 7029 | |
b1657152 | 7030 | if (hash == NULL |
90b6238f AM |
7031 | && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"), |
7032 | "Thumb", tmp_name, name) == -1) | |
b1657152 | 7033 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); |
252b5132 RH |
7034 | |
7035 | free (tmp_name); | |
7036 | ||
7037 | return hash; | |
7038 | } | |
7039 | ||
9b485d32 NC |
7040 | /* Locate the ARM encoded calling stub for NAME. */ |
7041 | ||
252b5132 | 7042 | static struct elf_link_hash_entry * |
57e8b36a NC |
7043 | find_arm_glue (struct bfd_link_info *link_info, |
7044 | const char *name, | |
f2a9dd69 | 7045 | char **error_message) |
252b5132 RH |
7046 | { |
7047 | char *tmp_name; | |
7048 | struct elf_link_hash_entry *myh; | |
7049 | struct elf32_arm_link_hash_table *hash_table; | |
7050 | ||
7051 | /* We need a pointer to the elfarm specific hash table. */ | |
7052 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7053 | if (hash_table == NULL) |
7054 | return NULL; | |
252b5132 | 7055 | |
21d799b5 | 7056 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 7057 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
7058 | |
7059 | BFD_ASSERT (tmp_name); | |
7060 | ||
7061 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
7062 | ||
7063 | myh = elf_link_hash_lookup | |
b34976b6 | 7064 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 7065 | |
b1657152 | 7066 | if (myh == NULL |
90b6238f AM |
7067 | && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"), |
7068 | "ARM", tmp_name, name) == -1) | |
b1657152 | 7069 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); |
252b5132 RH |
7070 | |
7071 | free (tmp_name); | |
7072 | ||
7073 | return myh; | |
7074 | } | |
7075 | ||
8f6277f5 | 7076 | /* ARM->Thumb glue (static images): |
252b5132 RH |
7077 | |
7078 | .arm | |
7079 | __func_from_arm: | |
7080 | ldr r12, __func_addr | |
7081 | bx r12 | |
7082 | __func_addr: | |
906e58ca | 7083 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 7084 | |
26079076 PB |
7085 | (v5t static images) |
7086 | .arm | |
7087 | __func_from_arm: | |
7088 | ldr pc, __func_addr | |
7089 | __func_addr: | |
906e58ca | 7090 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 7091 | |
8f6277f5 PB |
7092 | (relocatable images) |
7093 | .arm | |
7094 | __func_from_arm: | |
7095 | ldr r12, __func_offset | |
7096 | add r12, r12, pc | |
7097 | bx r12 | |
7098 | __func_offset: | |
8029a119 | 7099 | .word func - . */ |
8f6277f5 PB |
7100 | |
7101 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
7102 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
7103 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
7104 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
7105 | ||
26079076 PB |
7106 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
7107 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
7108 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
7109 | ||
8f6277f5 PB |
7110 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
7111 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
7112 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
7113 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
7114 | ||
07d6d2b8 | 7115 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 7116 | |
07d6d2b8 AM |
7117 | .thumb .thumb |
7118 | .align 2 .align 2 | |
7119 | __func_from_thumb: __func_from_thumb: | |
7120 | bx pc push {r6, lr} | |
7121 | nop ldr r6, __func_addr | |
7122 | .arm mov lr, pc | |
7123 | b func bx r6 | |
99059e56 RM |
7124 | .arm |
7125 | ;; back_to_thumb | |
7126 | ldmia r13! {r6, lr} | |
7127 | bx lr | |
7128 | __func_addr: | |
07d6d2b8 | 7129 | .word func */ |
252b5132 RH |
7130 | |
7131 | #define THUMB2ARM_GLUE_SIZE 8 | |
7132 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
7133 | static const insn16 t2a2_noop_insn = 0x46c0; | |
7134 | static const insn32 t2a3_b_insn = 0xea000000; | |
7135 | ||
c7b8f16e | 7136 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
a504d23a LA |
7137 | #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16 |
7138 | #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24 | |
c7b8f16e | 7139 | |
845b51d6 PB |
7140 | #define ARM_BX_VENEER_SIZE 12 |
7141 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
7142 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
7143 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
7144 | ||
7e392df6 | 7145 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
7146 | static void |
7147 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
7148 | { |
7149 | asection * s; | |
8029a119 | 7150 | bfd_byte * contents; |
252b5132 | 7151 | |
8029a119 | 7152 | if (size == 0) |
3e6b1042 DJ |
7153 | { |
7154 | /* Do not include empty glue sections in the output. */ | |
7155 | if (abfd != NULL) | |
7156 | { | |
3d4d4302 | 7157 | s = bfd_get_linker_section (abfd, name); |
3e6b1042 DJ |
7158 | if (s != NULL) |
7159 | s->flags |= SEC_EXCLUDE; | |
7160 | } | |
7161 | return; | |
7162 | } | |
252b5132 | 7163 | |
8029a119 | 7164 | BFD_ASSERT (abfd != NULL); |
252b5132 | 7165 | |
3d4d4302 | 7166 | s = bfd_get_linker_section (abfd, name); |
8029a119 | 7167 | BFD_ASSERT (s != NULL); |
252b5132 | 7168 | |
21d799b5 | 7169 | contents = (bfd_byte *) bfd_alloc (abfd, size); |
252b5132 | 7170 | |
8029a119 NC |
7171 | BFD_ASSERT (s->size == size); |
7172 | s->contents = contents; | |
7173 | } | |
906e58ca | 7174 | |
8029a119 NC |
7175 | bfd_boolean |
7176 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) | |
7177 | { | |
7178 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 7179 | |
8029a119 NC |
7180 | globals = elf32_arm_hash_table (info); |
7181 | BFD_ASSERT (globals != NULL); | |
906e58ca | 7182 | |
8029a119 NC |
7183 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7184 | globals->arm_glue_size, | |
7185 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 7186 | |
8029a119 NC |
7187 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7188 | globals->thumb_glue_size, | |
7189 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 7190 | |
8029a119 NC |
7191 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7192 | globals->vfp11_erratum_glue_size, | |
7193 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 7194 | |
a504d23a LA |
7195 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7196 | globals->stm32l4xx_erratum_glue_size, | |
7197 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
7198 | ||
8029a119 NC |
7199 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
7200 | globals->bx_glue_size, | |
845b51d6 PB |
7201 | ARM_BX_GLUE_SECTION_NAME); |
7202 | ||
b34976b6 | 7203 | return TRUE; |
252b5132 RH |
7204 | } |
7205 | ||
a4fd1a8e | 7206 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
7207 | returns the symbol identifying the stub. */ |
7208 | ||
a4fd1a8e | 7209 | static struct elf_link_hash_entry * |
57e8b36a NC |
7210 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
7211 | struct elf_link_hash_entry * h) | |
252b5132 RH |
7212 | { |
7213 | const char * name = h->root.root.string; | |
63b0f745 | 7214 | asection * s; |
252b5132 RH |
7215 | char * tmp_name; |
7216 | struct elf_link_hash_entry * myh; | |
14a793b2 | 7217 | struct bfd_link_hash_entry * bh; |
252b5132 | 7218 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 7219 | bfd_vma val; |
2f475487 | 7220 | bfd_size_type size; |
252b5132 RH |
7221 | |
7222 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
7223 | BFD_ASSERT (globals != NULL); |
7224 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7225 | ||
3d4d4302 | 7226 | s = bfd_get_linker_section |
252b5132 RH |
7227 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); |
7228 | ||
252b5132 RH |
7229 | BFD_ASSERT (s != NULL); |
7230 | ||
21d799b5 | 7231 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 7232 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
7233 | |
7234 | BFD_ASSERT (tmp_name); | |
7235 | ||
7236 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
7237 | ||
7238 | myh = elf_link_hash_lookup | |
b34976b6 | 7239 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
7240 | |
7241 | if (myh != NULL) | |
7242 | { | |
9b485d32 | 7243 | /* We've already seen this guy. */ |
252b5132 | 7244 | free (tmp_name); |
a4fd1a8e | 7245 | return myh; |
252b5132 RH |
7246 | } |
7247 | ||
57e8b36a NC |
7248 | /* The only trick here is using hash_table->arm_glue_size as the value. |
7249 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
7250 | putting it. The +1 on the value marks that the stub has not been |
7251 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 7252 | bh = NULL; |
dc810e39 AM |
7253 | val = globals->arm_glue_size + 1; |
7254 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
7255 | tmp_name, BSF_GLOBAL, s, val, | |
b34976b6 | 7256 | NULL, TRUE, FALSE, &bh); |
252b5132 | 7257 | |
b7693d02 DJ |
7258 | myh = (struct elf_link_hash_entry *) bh; |
7259 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7260 | myh->forced_local = 1; | |
7261 | ||
252b5132 RH |
7262 | free (tmp_name); |
7263 | ||
0e1862bb L |
7264 | if (bfd_link_pic (link_info) |
7265 | || globals->root.is_relocatable_executable | |
27e55c4d | 7266 | || globals->pic_veneer) |
2f475487 | 7267 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
7268 | else if (globals->use_blx) |
7269 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 7270 | else |
2f475487 AM |
7271 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
7272 | ||
7273 | s->size += size; | |
7274 | globals->arm_glue_size += size; | |
252b5132 | 7275 | |
a4fd1a8e | 7276 | return myh; |
252b5132 RH |
7277 | } |
7278 | ||
845b51d6 PB |
7279 | /* Allocate space for ARMv4 BX veneers. */ |
7280 | ||
7281 | static void | |
7282 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
7283 | { | |
7284 | asection * s; | |
7285 | struct elf32_arm_link_hash_table *globals; | |
7286 | char *tmp_name; | |
7287 | struct elf_link_hash_entry *myh; | |
7288 | struct bfd_link_hash_entry *bh; | |
7289 | bfd_vma val; | |
7290 | ||
7291 | /* BX PC does not need a veneer. */ | |
7292 | if (reg == 15) | |
7293 | return; | |
7294 | ||
7295 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
7296 | BFD_ASSERT (globals != NULL); |
7297 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7298 | ||
7299 | /* Check if this veneer has already been allocated. */ | |
7300 | if (globals->bx_glue_offset[reg]) | |
7301 | return; | |
7302 | ||
3d4d4302 | 7303 | s = bfd_get_linker_section |
845b51d6 PB |
7304 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); |
7305 | ||
7306 | BFD_ASSERT (s != NULL); | |
7307 | ||
7308 | /* Add symbol for veneer. */ | |
21d799b5 NC |
7309 | tmp_name = (char *) |
7310 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
906e58ca | 7311 | |
845b51d6 | 7312 | BFD_ASSERT (tmp_name); |
906e58ca | 7313 | |
845b51d6 | 7314 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 7315 | |
845b51d6 PB |
7316 | myh = elf_link_hash_lookup |
7317 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 7318 | |
845b51d6 | 7319 | BFD_ASSERT (myh == NULL); |
906e58ca | 7320 | |
845b51d6 PB |
7321 | bh = NULL; |
7322 | val = globals->bx_glue_size; | |
7323 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
99059e56 RM |
7324 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
7325 | NULL, TRUE, FALSE, &bh); | |
845b51d6 PB |
7326 | |
7327 | myh = (struct elf_link_hash_entry *) bh; | |
7328 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7329 | myh->forced_local = 1; | |
7330 | ||
7331 | s->size += ARM_BX_VENEER_SIZE; | |
7332 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
7333 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
7334 | } | |
7335 | ||
7336 | ||
c7b8f16e JB |
7337 | /* Add an entry to the code/data map for section SEC. */ |
7338 | ||
7339 | static void | |
7340 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
7341 | { | |
7342 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
7343 | unsigned int newidx; | |
906e58ca | 7344 | |
c7b8f16e JB |
7345 | if (sec_data->map == NULL) |
7346 | { | |
21d799b5 | 7347 | sec_data->map = (elf32_arm_section_map *) |
99059e56 | 7348 | bfd_malloc (sizeof (elf32_arm_section_map)); |
c7b8f16e JB |
7349 | sec_data->mapcount = 0; |
7350 | sec_data->mapsize = 1; | |
7351 | } | |
906e58ca | 7352 | |
c7b8f16e | 7353 | newidx = sec_data->mapcount++; |
906e58ca | 7354 | |
c7b8f16e JB |
7355 | if (sec_data->mapcount > sec_data->mapsize) |
7356 | { | |
7357 | sec_data->mapsize *= 2; | |
21d799b5 | 7358 | sec_data->map = (elf32_arm_section_map *) |
99059e56 RM |
7359 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize |
7360 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
7361 | } |
7362 | ||
7363 | if (sec_data->map) | |
7364 | { | |
7365 | sec_data->map[newidx].vma = vma; | |
7366 | sec_data->map[newidx].type = type; | |
c7b8f16e | 7367 | } |
c7b8f16e JB |
7368 | } |
7369 | ||
7370 | ||
7371 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
7372 | veneers are handled for now. */ | |
7373 | ||
7374 | static bfd_vma | |
7375 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
99059e56 RM |
7376 | elf32_vfp11_erratum_list *branch, |
7377 | bfd *branch_bfd, | |
7378 | asection *branch_sec, | |
7379 | unsigned int offset) | |
c7b8f16e JB |
7380 | { |
7381 | asection *s; | |
7382 | struct elf32_arm_link_hash_table *hash_table; | |
7383 | char *tmp_name; | |
7384 | struct elf_link_hash_entry *myh; | |
7385 | struct bfd_link_hash_entry *bh; | |
7386 | bfd_vma val; | |
7387 | struct _arm_elf_section_data *sec_data; | |
c7b8f16e | 7388 | elf32_vfp11_erratum_list *newerr; |
906e58ca | 7389 | |
c7b8f16e | 7390 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
7391 | BFD_ASSERT (hash_table != NULL); |
7392 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 7393 | |
3d4d4302 | 7394 | s = bfd_get_linker_section |
c7b8f16e | 7395 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); |
906e58ca | 7396 | |
c7b8f16e | 7397 | sec_data = elf32_arm_section_data (s); |
906e58ca | 7398 | |
c7b8f16e | 7399 | BFD_ASSERT (s != NULL); |
906e58ca | 7400 | |
21d799b5 | 7401 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 7402 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
906e58ca | 7403 | |
c7b8f16e | 7404 | BFD_ASSERT (tmp_name); |
906e58ca | 7405 | |
c7b8f16e JB |
7406 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
7407 | hash_table->num_vfp11_fixes); | |
906e58ca | 7408 | |
c7b8f16e JB |
7409 | myh = elf_link_hash_lookup |
7410 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 7411 | |
c7b8f16e | 7412 | BFD_ASSERT (myh == NULL); |
906e58ca | 7413 | |
c7b8f16e JB |
7414 | bh = NULL; |
7415 | val = hash_table->vfp11_erratum_glue_size; | |
7416 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
99059e56 RM |
7417 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
7418 | NULL, TRUE, FALSE, &bh); | |
c7b8f16e JB |
7419 | |
7420 | myh = (struct elf_link_hash_entry *) bh; | |
7421 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7422 | myh->forced_local = 1; | |
7423 | ||
7424 | /* Link veneer back to calling location. */ | |
c7e2358a | 7425 | sec_data->erratumcount += 1; |
21d799b5 NC |
7426 | newerr = (elf32_vfp11_erratum_list *) |
7427 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 7428 | |
c7b8f16e JB |
7429 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
7430 | newerr->vma = -1; | |
7431 | newerr->u.v.branch = branch; | |
7432 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
7433 | branch->u.b.veneer = newerr; | |
7434 | ||
7435 | newerr->next = sec_data->erratumlist; | |
7436 | sec_data->erratumlist = newerr; | |
7437 | ||
7438 | /* A symbol for the return from the veneer. */ | |
7439 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7440 | hash_table->num_vfp11_fixes); | |
7441 | ||
7442 | myh = elf_link_hash_lookup | |
7443 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 7444 | |
c7b8f16e JB |
7445 | if (myh != NULL) |
7446 | abort (); | |
7447 | ||
7448 | bh = NULL; | |
7449 | val = offset + 4; | |
7450 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
7451 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
906e58ca | 7452 | |
c7b8f16e JB |
7453 | myh = (struct elf_link_hash_entry *) bh; |
7454 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7455 | myh->forced_local = 1; | |
7456 | ||
7457 | free (tmp_name); | |
906e58ca | 7458 | |
c7b8f16e JB |
7459 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
7460 | entry for that symbol to the code/data map for the section. */ | |
7461 | if (hash_table->vfp11_erratum_glue_size == 0) | |
7462 | { | |
7463 | bh = NULL; | |
7464 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
99059e56 | 7465 | ever requires this erratum fix. */ |
c7b8f16e JB |
7466 | _bfd_generic_link_add_one_symbol (link_info, |
7467 | hash_table->bfd_of_glue_owner, "$a", | |
7468 | BSF_LOCAL, s, 0, NULL, | |
99059e56 | 7469 | TRUE, FALSE, &bh); |
c7b8f16e JB |
7470 | |
7471 | myh = (struct elf_link_hash_entry *) bh; | |
7472 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
7473 | myh->forced_local = 1; | |
906e58ca | 7474 | |
c7b8f16e | 7475 | /* The elf32_arm_init_maps function only cares about symbols from input |
99059e56 RM |
7476 | BFDs. We must make a note of this generated mapping symbol |
7477 | ourselves so that code byteswapping works properly in | |
7478 | elf32_arm_write_section. */ | |
c7b8f16e JB |
7479 | elf32_arm_section_map_add (s, 'a', 0); |
7480 | } | |
906e58ca | 7481 | |
c7b8f16e JB |
7482 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
7483 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
7484 | hash_table->num_vfp11_fixes++; | |
906e58ca | 7485 | |
c7b8f16e JB |
7486 | /* The offset of the veneer. */ |
7487 | return val; | |
7488 | } | |
7489 | ||
a504d23a LA |
7490 | /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode |
7491 | veneers need to be handled because used only in Cortex-M. */ | |
7492 | ||
7493 | static bfd_vma | |
7494 | record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info, | |
7495 | elf32_stm32l4xx_erratum_list *branch, | |
7496 | bfd *branch_bfd, | |
7497 | asection *branch_sec, | |
7498 | unsigned int offset, | |
7499 | bfd_size_type veneer_size) | |
7500 | { | |
7501 | asection *s; | |
7502 | struct elf32_arm_link_hash_table *hash_table; | |
7503 | char *tmp_name; | |
7504 | struct elf_link_hash_entry *myh; | |
7505 | struct bfd_link_hash_entry *bh; | |
7506 | bfd_vma val; | |
7507 | struct _arm_elf_section_data *sec_data; | |
7508 | elf32_stm32l4xx_erratum_list *newerr; | |
7509 | ||
7510 | hash_table = elf32_arm_hash_table (link_info); | |
7511 | BFD_ASSERT (hash_table != NULL); | |
7512 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
7513 | ||
7514 | s = bfd_get_linker_section | |
7515 | (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
7516 | ||
7517 | BFD_ASSERT (s != NULL); | |
7518 | ||
7519 | sec_data = elf32_arm_section_data (s); | |
7520 | ||
7521 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
7522 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
7523 | ||
7524 | BFD_ASSERT (tmp_name); | |
7525 | ||
7526 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
7527 | hash_table->num_stm32l4xx_fixes); | |
7528 | ||
7529 | myh = elf_link_hash_lookup | |
7530 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
7531 | ||
7532 | BFD_ASSERT (myh == NULL); | |
7533 | ||
7534 | bh = NULL; | |
7535 | val = hash_table->stm32l4xx_erratum_glue_size; | |
7536 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
7537 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
7538 | NULL, TRUE, FALSE, &bh); | |
7539 | ||
7540 | myh = (struct elf_link_hash_entry *) bh; | |
7541 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7542 | myh->forced_local = 1; | |
7543 | ||
7544 | /* Link veneer back to calling location. */ | |
7545 | sec_data->stm32l4xx_erratumcount += 1; | |
7546 | newerr = (elf32_stm32l4xx_erratum_list *) | |
7547 | bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list)); | |
7548 | ||
7549 | newerr->type = STM32L4XX_ERRATUM_VENEER; | |
7550 | newerr->vma = -1; | |
7551 | newerr->u.v.branch = branch; | |
7552 | newerr->u.v.id = hash_table->num_stm32l4xx_fixes; | |
7553 | branch->u.b.veneer = newerr; | |
7554 | ||
7555 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
7556 | sec_data->stm32l4xx_erratumlist = newerr; | |
7557 | ||
7558 | /* A symbol for the return from the veneer. */ | |
7559 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7560 | hash_table->num_stm32l4xx_fixes); | |
7561 | ||
7562 | myh = elf_link_hash_lookup | |
7563 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
7564 | ||
7565 | if (myh != NULL) | |
7566 | abort (); | |
7567 | ||
7568 | bh = NULL; | |
7569 | val = offset + 4; | |
7570 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
7571 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
7572 | ||
7573 | myh = (struct elf_link_hash_entry *) bh; | |
7574 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
7575 | myh->forced_local = 1; | |
7576 | ||
7577 | free (tmp_name); | |
7578 | ||
7579 | /* Generate a mapping symbol for the veneer section, and explicitly add an | |
7580 | entry for that symbol to the code/data map for the section. */ | |
7581 | if (hash_table->stm32l4xx_erratum_glue_size == 0) | |
7582 | { | |
7583 | bh = NULL; | |
7584 | /* Creates a THUMB symbol since there is no other choice. */ | |
7585 | _bfd_generic_link_add_one_symbol (link_info, | |
7586 | hash_table->bfd_of_glue_owner, "$t", | |
7587 | BSF_LOCAL, s, 0, NULL, | |
7588 | TRUE, FALSE, &bh); | |
7589 | ||
7590 | myh = (struct elf_link_hash_entry *) bh; | |
7591 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
7592 | myh->forced_local = 1; | |
7593 | ||
7594 | /* The elf32_arm_init_maps function only cares about symbols from input | |
7595 | BFDs. We must make a note of this generated mapping symbol | |
7596 | ourselves so that code byteswapping works properly in | |
7597 | elf32_arm_write_section. */ | |
7598 | elf32_arm_section_map_add (s, 't', 0); | |
7599 | } | |
7600 | ||
7601 | s->size += veneer_size; | |
7602 | hash_table->stm32l4xx_erratum_glue_size += veneer_size; | |
7603 | hash_table->num_stm32l4xx_fixes++; | |
7604 | ||
7605 | /* The offset of the veneer. */ | |
7606 | return val; | |
7607 | } | |
7608 | ||
8029a119 | 7609 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
7610 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
7611 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
7612 | |
7613 | /* Create a fake section for use by the ARM backend of the linker. */ | |
7614 | ||
7615 | static bfd_boolean | |
7616 | arm_make_glue_section (bfd * abfd, const char * name) | |
7617 | { | |
7618 | asection * sec; | |
7619 | ||
3d4d4302 | 7620 | sec = bfd_get_linker_section (abfd, name); |
8029a119 NC |
7621 | if (sec != NULL) |
7622 | /* Already made. */ | |
7623 | return TRUE; | |
7624 | ||
3d4d4302 | 7625 | sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); |
8029a119 NC |
7626 | |
7627 | if (sec == NULL | |
7628 | || !bfd_set_section_alignment (abfd, sec, 2)) | |
7629 | return FALSE; | |
7630 | ||
7631 | /* Set the gc mark to prevent the section from being removed by garbage | |
7632 | collection, despite the fact that no relocs refer to this section. */ | |
7633 | sec->gc_mark = 1; | |
7634 | ||
7635 | return TRUE; | |
7636 | } | |
7637 | ||
1db37fe6 YG |
7638 | /* Set size of .plt entries. This function is called from the |
7639 | linker scripts in ld/emultempl/{armelf}.em. */ | |
7640 | ||
7641 | void | |
7642 | bfd_elf32_arm_use_long_plt (void) | |
7643 | { | |
7644 | elf32_arm_use_long_plt_entry = TRUE; | |
7645 | } | |
7646 | ||
8afb0e02 NC |
7647 | /* Add the glue sections to ABFD. This function is called from the |
7648 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 7649 | |
b34976b6 | 7650 | bfd_boolean |
57e8b36a NC |
7651 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
7652 | struct bfd_link_info *info) | |
252b5132 | 7653 | { |
a504d23a LA |
7654 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
7655 | bfd_boolean dostm32l4xx = globals | |
7656 | && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE; | |
7657 | bfd_boolean addglue; | |
7658 | ||
8afb0e02 NC |
7659 | /* If we are only performing a partial |
7660 | link do not bother adding the glue. */ | |
0e1862bb | 7661 | if (bfd_link_relocatable (info)) |
b34976b6 | 7662 | return TRUE; |
252b5132 | 7663 | |
a504d23a | 7664 | addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
8029a119 NC |
7665 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) |
7666 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
7667 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
a504d23a LA |
7668 | |
7669 | if (!dostm32l4xx) | |
7670 | return addglue; | |
7671 | ||
7672 | return addglue | |
7673 | && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
8afb0e02 NC |
7674 | } |
7675 | ||
daa4adae TP |
7676 | /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This |
7677 | ensures they are not marked for deletion by | |
7678 | strip_excluded_output_sections () when veneers are going to be created | |
7679 | later. Not doing so would trigger assert on empty section size in | |
7680 | lang_size_sections_1 (). */ | |
7681 | ||
7682 | void | |
7683 | bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info) | |
7684 | { | |
7685 | enum elf32_arm_stub_type stub_type; | |
7686 | ||
7687 | /* If we are only performing a partial | |
7688 | link do not bother adding the glue. */ | |
7689 | if (bfd_link_relocatable (info)) | |
7690 | return; | |
7691 | ||
7692 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) | |
7693 | { | |
7694 | asection *out_sec; | |
7695 | const char *out_sec_name; | |
7696 | ||
7697 | if (!arm_dedicated_stub_output_section_required (stub_type)) | |
7698 | continue; | |
7699 | ||
7700 | out_sec_name = arm_dedicated_stub_output_section_name (stub_type); | |
7701 | out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name); | |
7702 | if (out_sec != NULL) | |
7703 | out_sec->flags |= SEC_KEEP; | |
7704 | } | |
7705 | } | |
7706 | ||
8afb0e02 NC |
7707 | /* Select a BFD to be used to hold the sections used by the glue code. |
7708 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 7709 | {armelf/pe}.em. */ |
8afb0e02 | 7710 | |
b34976b6 | 7711 | bfd_boolean |
57e8b36a | 7712 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
7713 | { |
7714 | struct elf32_arm_link_hash_table *globals; | |
7715 | ||
7716 | /* If we are only performing a partial link | |
7717 | do not bother getting a bfd to hold the glue. */ | |
0e1862bb | 7718 | if (bfd_link_relocatable (info)) |
b34976b6 | 7719 | return TRUE; |
8afb0e02 | 7720 | |
b7693d02 DJ |
7721 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
7722 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
7723 | ||
8afb0e02 | 7724 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
7725 | BFD_ASSERT (globals != NULL); |
7726 | ||
7727 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 7728 | return TRUE; |
8afb0e02 | 7729 | |
252b5132 RH |
7730 | /* Save the bfd for later use. */ |
7731 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 7732 | |
b34976b6 | 7733 | return TRUE; |
252b5132 RH |
7734 | } |
7735 | ||
906e58ca NC |
7736 | static void |
7737 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 7738 | { |
2de70689 MGD |
7739 | int cpu_arch; |
7740 | ||
b38cadfb | 7741 | cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
2de70689 MGD |
7742 | Tag_CPU_arch); |
7743 | ||
7744 | if (globals->fix_arm1176) | |
7745 | { | |
7746 | if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) | |
7747 | globals->use_blx = 1; | |
7748 | } | |
7749 | else | |
7750 | { | |
7751 | if (cpu_arch > TAG_CPU_ARCH_V4T) | |
7752 | globals->use_blx = 1; | |
7753 | } | |
39b41c9c PB |
7754 | } |
7755 | ||
b34976b6 | 7756 | bfd_boolean |
57e8b36a | 7757 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 7758 | struct bfd_link_info *link_info) |
252b5132 RH |
7759 | { |
7760 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 7761 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
7762 | Elf_Internal_Rela *irel, *irelend; |
7763 | bfd_byte *contents = NULL; | |
252b5132 RH |
7764 | |
7765 | asection *sec; | |
7766 | struct elf32_arm_link_hash_table *globals; | |
7767 | ||
7768 | /* If we are only performing a partial link do not bother | |
7769 | to construct any glue. */ | |
0e1862bb | 7770 | if (bfd_link_relocatable (link_info)) |
b34976b6 | 7771 | return TRUE; |
252b5132 | 7772 | |
39ce1a6a NC |
7773 | /* Here we have a bfd that is to be included on the link. We have a |
7774 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 7775 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 7776 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
7777 | |
7778 | check_use_blx (globals); | |
252b5132 | 7779 | |
d504ffc8 | 7780 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 7781 | { |
90b6238f | 7782 | _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"), |
d003868e | 7783 | abfd); |
e489d0ae PB |
7784 | return FALSE; |
7785 | } | |
f21f3fe0 | 7786 | |
39ce1a6a NC |
7787 | /* PR 5398: If we have not decided to include any loadable sections in |
7788 | the output then we will not have a glue owner bfd. This is OK, it | |
7789 | just means that there is nothing else for us to do here. */ | |
7790 | if (globals->bfd_of_glue_owner == NULL) | |
7791 | return TRUE; | |
7792 | ||
252b5132 RH |
7793 | /* Rummage around all the relocs and map the glue vectors. */ |
7794 | sec = abfd->sections; | |
7795 | ||
7796 | if (sec == NULL) | |
b34976b6 | 7797 | return TRUE; |
252b5132 RH |
7798 | |
7799 | for (; sec != NULL; sec = sec->next) | |
7800 | { | |
7801 | if (sec->reloc_count == 0) | |
7802 | continue; | |
7803 | ||
2f475487 AM |
7804 | if ((sec->flags & SEC_EXCLUDE) != 0) |
7805 | continue; | |
7806 | ||
0ffa91dd | 7807 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 7808 | |
9b485d32 | 7809 | /* Load the relocs. */ |
6cdc0ccc | 7810 | internal_relocs |
906e58ca | 7811 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
252b5132 | 7812 | |
6cdc0ccc AM |
7813 | if (internal_relocs == NULL) |
7814 | goto error_return; | |
252b5132 | 7815 | |
6cdc0ccc AM |
7816 | irelend = internal_relocs + sec->reloc_count; |
7817 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
7818 | { |
7819 | long r_type; | |
7820 | unsigned long r_index; | |
252b5132 RH |
7821 | |
7822 | struct elf_link_hash_entry *h; | |
7823 | ||
7824 | r_type = ELF32_R_TYPE (irel->r_info); | |
7825 | r_index = ELF32_R_SYM (irel->r_info); | |
7826 | ||
9b485d32 | 7827 | /* These are the only relocation types we care about. */ |
ba96a88f | 7828 | if ( r_type != R_ARM_PC24 |
845b51d6 | 7829 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
7830 | continue; |
7831 | ||
7832 | /* Get the section contents if we haven't done so already. */ | |
7833 | if (contents == NULL) | |
7834 | { | |
7835 | /* Get cached copy if it exists. */ | |
7836 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
7837 | contents = elf_section_data (sec)->this_hdr.contents; | |
7838 | else | |
7839 | { | |
7840 | /* Go get them off disk. */ | |
57e8b36a | 7841 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
7842 | goto error_return; |
7843 | } | |
7844 | } | |
7845 | ||
845b51d6 PB |
7846 | if (r_type == R_ARM_V4BX) |
7847 | { | |
7848 | int reg; | |
7849 | ||
7850 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
7851 | record_arm_bx_glue (link_info, reg); | |
7852 | continue; | |
7853 | } | |
7854 | ||
a7c10850 | 7855 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
7856 | h = NULL; |
7857 | ||
9b485d32 | 7858 | /* We don't care about local symbols. */ |
252b5132 RH |
7859 | if (r_index < symtab_hdr->sh_info) |
7860 | continue; | |
7861 | ||
9b485d32 | 7862 | /* This is an external symbol. */ |
252b5132 RH |
7863 | r_index -= symtab_hdr->sh_info; |
7864 | h = (struct elf_link_hash_entry *) | |
7865 | elf_sym_hashes (abfd)[r_index]; | |
7866 | ||
7867 | /* If the relocation is against a static symbol it must be within | |
7868 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
7869 | if (h == NULL) | |
7870 | continue; | |
7871 | ||
d504ffc8 DJ |
7872 | /* If the call will go through a PLT entry then we do not need |
7873 | glue. */ | |
362d30a1 | 7874 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
b7693d02 DJ |
7875 | continue; |
7876 | ||
252b5132 RH |
7877 | switch (r_type) |
7878 | { | |
7879 | case R_ARM_PC24: | |
7880 | /* This one is a call from arm code. We need to look up | |
99059e56 RM |
7881 | the target of the call. If it is a thumb target, we |
7882 | insert glue. */ | |
39d911fc TP |
7883 | if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal) |
7884 | == ST_BRANCH_TO_THUMB) | |
252b5132 RH |
7885 | record_arm_to_thumb_glue (link_info, h); |
7886 | break; | |
7887 | ||
252b5132 | 7888 | default: |
c6596c5e | 7889 | abort (); |
252b5132 RH |
7890 | } |
7891 | } | |
6cdc0ccc AM |
7892 | |
7893 | if (contents != NULL | |
7894 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7895 | free (contents); | |
7896 | contents = NULL; | |
7897 | ||
7898 | if (internal_relocs != NULL | |
7899 | && elf_section_data (sec)->relocs != internal_relocs) | |
7900 | free (internal_relocs); | |
7901 | internal_relocs = NULL; | |
252b5132 RH |
7902 | } |
7903 | ||
b34976b6 | 7904 | return TRUE; |
9a5aca8c | 7905 | |
252b5132 | 7906 | error_return: |
6cdc0ccc AM |
7907 | if (contents != NULL |
7908 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7909 | free (contents); | |
7910 | if (internal_relocs != NULL | |
7911 | && elf_section_data (sec)->relocs != internal_relocs) | |
7912 | free (internal_relocs); | |
9a5aca8c | 7913 | |
b34976b6 | 7914 | return FALSE; |
252b5132 | 7915 | } |
7e392df6 | 7916 | #endif |
252b5132 | 7917 | |
eb043451 | 7918 | |
c7b8f16e JB |
7919 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
7920 | ||
7921 | void | |
7922 | bfd_elf32_arm_init_maps (bfd *abfd) | |
7923 | { | |
7924 | Elf_Internal_Sym *isymbuf; | |
7925 | Elf_Internal_Shdr *hdr; | |
7926 | unsigned int i, localsyms; | |
7927 | ||
af1f4419 NC |
7928 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
7929 | if (! is_arm_elf (abfd)) | |
7930 | return; | |
7931 | ||
c7b8f16e JB |
7932 | if ((abfd->flags & DYNAMIC) != 0) |
7933 | return; | |
7934 | ||
0ffa91dd | 7935 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
7936 | localsyms = hdr->sh_info; |
7937 | ||
7938 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
7939 | should contain the number of local symbols, which should come before any | |
7940 | global symbols. Mapping symbols are always local. */ | |
7941 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
7942 | NULL); | |
7943 | ||
7944 | /* No internal symbols read? Skip this BFD. */ | |
7945 | if (isymbuf == NULL) | |
7946 | return; | |
7947 | ||
7948 | for (i = 0; i < localsyms; i++) | |
7949 | { | |
7950 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
7951 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
7952 | const char *name; | |
906e58ca | 7953 | |
c7b8f16e | 7954 | if (sec != NULL |
99059e56 RM |
7955 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) |
7956 | { | |
7957 | name = bfd_elf_string_from_elf_section (abfd, | |
7958 | hdr->sh_link, isym->st_name); | |
906e58ca | 7959 | |
99059e56 | 7960 | if (bfd_is_arm_special_symbol_name (name, |
c7b8f16e | 7961 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) |
99059e56 RM |
7962 | elf32_arm_section_map_add (sec, name[1], isym->st_value); |
7963 | } | |
c7b8f16e JB |
7964 | } |
7965 | } | |
7966 | ||
7967 | ||
48229727 JB |
7968 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
7969 | say what they wanted. */ | |
7970 | ||
7971 | void | |
7972 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
7973 | { | |
7974 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
7975 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
7976 | ||
4dfe6ac6 NC |
7977 | if (globals == NULL) |
7978 | return; | |
7979 | ||
48229727 JB |
7980 | if (globals->fix_cortex_a8 == -1) |
7981 | { | |
7982 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
7983 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
7984 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
7985 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
7986 | globals->fix_cortex_a8 = 1; | |
7987 | else | |
7988 | globals->fix_cortex_a8 = 0; | |
7989 | } | |
7990 | } | |
7991 | ||
7992 | ||
c7b8f16e JB |
7993 | void |
7994 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
7995 | { | |
7996 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 7997 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 7998 | |
4dfe6ac6 NC |
7999 | if (globals == NULL) |
8000 | return; | |
c7b8f16e JB |
8001 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
8002 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
8003 | { | |
8004 | switch (globals->vfp11_fix) | |
99059e56 RM |
8005 | { |
8006 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
8007 | case BFD_ARM_VFP11_FIX_NONE: | |
8008 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
8009 | break; | |
8010 | ||
8011 | default: | |
8012 | /* Give a warning, but do as the user requests anyway. */ | |
871b3ab2 | 8013 | _bfd_error_handler (_("%pB: warning: selected VFP11 erratum " |
99059e56 RM |
8014 | "workaround is not necessary for target architecture"), obfd); |
8015 | } | |
c7b8f16e JB |
8016 | } |
8017 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
8018 | /* For earlier architectures, we might need the workaround, but do not | |
8019 | enable it by default. If users is running with broken hardware, they | |
8020 | must enable the erratum fix explicitly. */ | |
8021 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
8022 | } | |
8023 | ||
a504d23a LA |
8024 | void |
8025 | bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info) | |
8026 | { | |
8027 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8028 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
8029 | ||
8030 | if (globals == NULL) | |
8031 | return; | |
8032 | ||
8033 | /* We assume only Cortex-M4 may require the fix. */ | |
8034 | if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M | |
8035 | || out_attr[Tag_CPU_arch_profile].i != 'M') | |
8036 | { | |
8037 | if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE) | |
8038 | /* Give a warning, but do as the user requests anyway. */ | |
4eca0228 | 8039 | _bfd_error_handler |
871b3ab2 | 8040 | (_("%pB: warning: selected STM32L4XX erratum " |
a504d23a LA |
8041 | "workaround is not necessary for target architecture"), obfd); |
8042 | } | |
8043 | } | |
c7b8f16e | 8044 | |
906e58ca NC |
8045 | enum bfd_arm_vfp11_pipe |
8046 | { | |
c7b8f16e JB |
8047 | VFP11_FMAC, |
8048 | VFP11_LS, | |
8049 | VFP11_DS, | |
8050 | VFP11_BAD | |
8051 | }; | |
8052 | ||
8053 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
8054 | registers, or X:RX for double-precision registers, where RX is the group of | |
8055 | four bits in the instruction encoding and X is the single extension bit. | |
8056 | RX and X fields are specified using their lowest (starting) bit. The return | |
8057 | value is: | |
8058 | ||
8059 | 0...31: single-precision registers s0...s31 | |
8060 | 32...63: double-precision registers d0...d31. | |
906e58ca | 8061 | |
c7b8f16e JB |
8062 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
8063 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 8064 | |
c7b8f16e JB |
8065 | static unsigned int |
8066 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, | |
99059e56 | 8067 | unsigned int x) |
c7b8f16e JB |
8068 | { |
8069 | if (is_double) | |
8070 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
8071 | else | |
8072 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
8073 | } | |
8074 | ||
8075 | /* Set bits in *WMASK according to a register number REG as encoded by | |
8076 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
8077 | ||
8078 | static void | |
8079 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
8080 | { | |
8081 | if (reg < 32) | |
8082 | *wmask |= 1 << reg; | |
8083 | else if (reg < 48) | |
8084 | *wmask |= 3 << ((reg - 32) * 2); | |
8085 | } | |
8086 | ||
8087 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
8088 | ||
8089 | static bfd_boolean | |
8090 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) | |
8091 | { | |
8092 | int i; | |
906e58ca | 8093 | |
c7b8f16e JB |
8094 | for (i = 0; i < numregs; i++) |
8095 | { | |
8096 | unsigned int reg = regs[i]; | |
8097 | ||
8098 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
99059e56 | 8099 | return TRUE; |
906e58ca | 8100 | |
c7b8f16e JB |
8101 | reg -= 32; |
8102 | ||
8103 | if (reg >= 16) | |
99059e56 | 8104 | continue; |
906e58ca | 8105 | |
c7b8f16e | 8106 | if ((wmask & (3 << (reg * 2))) != 0) |
99059e56 | 8107 | return TRUE; |
c7b8f16e | 8108 | } |
906e58ca | 8109 | |
c7b8f16e JB |
8110 | return FALSE; |
8111 | } | |
8112 | ||
8113 | /* In this function, we're interested in two things: finding input registers | |
8114 | for VFP data-processing instructions, and finding the set of registers which | |
8115 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
8116 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
8117 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
8118 | implemented by the chip in question). DP registers are marked by setting | |
8119 | both SP registers in the write mask). */ | |
8120 | ||
8121 | static enum bfd_arm_vfp11_pipe | |
8122 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
99059e56 | 8123 | int *numregs) |
c7b8f16e | 8124 | { |
91d6fa6a | 8125 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
c7b8f16e JB |
8126 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
8127 | ||
8128 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
8129 | { | |
8130 | unsigned int pqrs; | |
8131 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
8132 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
8133 | ||
8134 | pqrs = ((insn & 0x00800000) >> 20) | |
99059e56 RM |
8135 | | ((insn & 0x00300000) >> 19) |
8136 | | ((insn & 0x00000040) >> 6); | |
c7b8f16e JB |
8137 | |
8138 | switch (pqrs) | |
99059e56 RM |
8139 | { |
8140 | case 0: /* fmac[sd]. */ | |
8141 | case 1: /* fnmac[sd]. */ | |
8142 | case 2: /* fmsc[sd]. */ | |
8143 | case 3: /* fnmsc[sd]. */ | |
8144 | vpipe = VFP11_FMAC; | |
8145 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8146 | regs[0] = fd; | |
8147 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
8148 | regs[2] = fm; | |
8149 | *numregs = 3; | |
8150 | break; | |
8151 | ||
8152 | case 4: /* fmul[sd]. */ | |
8153 | case 5: /* fnmul[sd]. */ | |
8154 | case 6: /* fadd[sd]. */ | |
8155 | case 7: /* fsub[sd]. */ | |
8156 | vpipe = VFP11_FMAC; | |
8157 | goto vfp_binop; | |
8158 | ||
8159 | case 8: /* fdiv[sd]. */ | |
8160 | vpipe = VFP11_DS; | |
8161 | vfp_binop: | |
8162 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8163 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
8164 | regs[1] = fm; | |
8165 | *numregs = 2; | |
8166 | break; | |
8167 | ||
8168 | case 15: /* extended opcode. */ | |
8169 | { | |
8170 | unsigned int extn = ((insn >> 15) & 0x1e) | |
8171 | | ((insn >> 7) & 1); | |
8172 | ||
8173 | switch (extn) | |
8174 | { | |
8175 | case 0: /* fcpy[sd]. */ | |
8176 | case 1: /* fabs[sd]. */ | |
8177 | case 2: /* fneg[sd]. */ | |
8178 | case 8: /* fcmp[sd]. */ | |
8179 | case 9: /* fcmpe[sd]. */ | |
8180 | case 10: /* fcmpz[sd]. */ | |
8181 | case 11: /* fcmpez[sd]. */ | |
8182 | case 16: /* fuito[sd]. */ | |
8183 | case 17: /* fsito[sd]. */ | |
8184 | case 24: /* ftoui[sd]. */ | |
8185 | case 25: /* ftouiz[sd]. */ | |
8186 | case 26: /* ftosi[sd]. */ | |
8187 | case 27: /* ftosiz[sd]. */ | |
8188 | /* These instructions will not bounce due to underflow. */ | |
8189 | *numregs = 0; | |
8190 | vpipe = VFP11_FMAC; | |
8191 | break; | |
8192 | ||
8193 | case 3: /* fsqrt[sd]. */ | |
8194 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
8195 | registers to cause the erratum in previous instructions. */ | |
8196 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8197 | vpipe = VFP11_DS; | |
8198 | break; | |
8199 | ||
8200 | case 15: /* fcvt{ds,sd}. */ | |
8201 | { | |
8202 | int rnum = 0; | |
8203 | ||
8204 | bfd_arm_vfp11_write_mask (destmask, fd); | |
c7b8f16e JB |
8205 | |
8206 | /* Only FCVTSD can underflow. */ | |
99059e56 RM |
8207 | if ((insn & 0x100) != 0) |
8208 | regs[rnum++] = fm; | |
c7b8f16e | 8209 | |
99059e56 | 8210 | *numregs = rnum; |
c7b8f16e | 8211 | |
99059e56 RM |
8212 | vpipe = VFP11_FMAC; |
8213 | } | |
8214 | break; | |
c7b8f16e | 8215 | |
99059e56 RM |
8216 | default: |
8217 | return VFP11_BAD; | |
8218 | } | |
8219 | } | |
8220 | break; | |
c7b8f16e | 8221 | |
99059e56 RM |
8222 | default: |
8223 | return VFP11_BAD; | |
8224 | } | |
c7b8f16e JB |
8225 | } |
8226 | /* Two-register transfer. */ | |
8227 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
8228 | { | |
8229 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 8230 | |
c7b8f16e JB |
8231 | if ((insn & 0x100000) == 0) |
8232 | { | |
99059e56 RM |
8233 | if (is_double) |
8234 | bfd_arm_vfp11_write_mask (destmask, fm); | |
8235 | else | |
8236 | { | |
8237 | bfd_arm_vfp11_write_mask (destmask, fm); | |
8238 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
8239 | } | |
c7b8f16e JB |
8240 | } |
8241 | ||
91d6fa6a | 8242 | vpipe = VFP11_LS; |
c7b8f16e JB |
8243 | } |
8244 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
8245 | { | |
8246 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
8247 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 8248 | |
c7b8f16e | 8249 | switch (puw) |
99059e56 RM |
8250 | { |
8251 | case 0: /* Two-reg transfer. We should catch these above. */ | |
8252 | abort (); | |
906e58ca | 8253 | |
99059e56 RM |
8254 | case 2: /* fldm[sdx]. */ |
8255 | case 3: | |
8256 | case 5: | |
8257 | { | |
8258 | unsigned int i, offset = insn & 0xff; | |
c7b8f16e | 8259 | |
99059e56 RM |
8260 | if (is_double) |
8261 | offset >>= 1; | |
c7b8f16e | 8262 | |
99059e56 RM |
8263 | for (i = fd; i < fd + offset; i++) |
8264 | bfd_arm_vfp11_write_mask (destmask, i); | |
8265 | } | |
8266 | break; | |
906e58ca | 8267 | |
99059e56 RM |
8268 | case 4: /* fld[sd]. */ |
8269 | case 6: | |
8270 | bfd_arm_vfp11_write_mask (destmask, fd); | |
8271 | break; | |
906e58ca | 8272 | |
99059e56 RM |
8273 | default: |
8274 | return VFP11_BAD; | |
8275 | } | |
c7b8f16e | 8276 | |
91d6fa6a | 8277 | vpipe = VFP11_LS; |
c7b8f16e JB |
8278 | } |
8279 | /* Single-register transfer. Note L==0. */ | |
8280 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
8281 | { | |
8282 | unsigned int opcode = (insn >> 21) & 7; | |
8283 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
8284 | ||
8285 | switch (opcode) | |
99059e56 RM |
8286 | { |
8287 | case 0: /* fmsr/fmdlr. */ | |
8288 | case 1: /* fmdhr. */ | |
8289 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
8290 | destination register. I don't know if this is exactly right, | |
8291 | but it is the conservative choice. */ | |
8292 | bfd_arm_vfp11_write_mask (destmask, fn); | |
8293 | break; | |
8294 | ||
8295 | case 7: /* fmxr. */ | |
8296 | break; | |
8297 | } | |
c7b8f16e | 8298 | |
91d6fa6a | 8299 | vpipe = VFP11_LS; |
c7b8f16e JB |
8300 | } |
8301 | ||
91d6fa6a | 8302 | return vpipe; |
c7b8f16e JB |
8303 | } |
8304 | ||
8305 | ||
8306 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
8307 | ||
8308 | ||
8309 | /* Look for potentially-troublesome code sequences which might trigger the | |
8310 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
8311 | (available from ARM) for details of the erratum. A short version is | |
8312 | described in ld.texinfo. */ | |
8313 | ||
8314 | bfd_boolean | |
8315 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) | |
8316 | { | |
8317 | asection *sec; | |
8318 | bfd_byte *contents = NULL; | |
8319 | int state = 0; | |
8320 | int regs[3], numregs = 0; | |
8321 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8322 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 8323 | |
4dfe6ac6 NC |
8324 | if (globals == NULL) |
8325 | return FALSE; | |
8326 | ||
c7b8f16e JB |
8327 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
8328 | The states transition as follows: | |
906e58ca | 8329 | |
c7b8f16e | 8330 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
99059e56 RM |
8331 | A VFP FMAC-pipeline instruction has been seen. Fill |
8332 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
8333 | instruction in 'first_fmac'. | |
c7b8f16e JB |
8334 | |
8335 | 1 -> 2 | |
99059e56 RM |
8336 | Any instruction, except for a VFP instruction which overwrites |
8337 | regs[*]. | |
906e58ca | 8338 | |
c7b8f16e JB |
8339 | 1 -> 3 [ -> 0 ] or |
8340 | 2 -> 3 [ -> 0 ] | |
99059e56 RM |
8341 | A VFP instruction has been seen which overwrites any of regs[*]. |
8342 | We must make a veneer! Reset state to 0 before examining next | |
8343 | instruction. | |
906e58ca | 8344 | |
c7b8f16e | 8345 | 2 -> 0 |
99059e56 RM |
8346 | If we fail to match anything in state 2, reset to state 0 and reset |
8347 | the instruction pointer to the instruction after 'first_fmac'. | |
c7b8f16e JB |
8348 | |
8349 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
8350 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 8351 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
8352 | |
8353 | /* If we are only performing a partial link do not bother | |
8354 | to construct any glue. */ | |
0e1862bb | 8355 | if (bfd_link_relocatable (link_info)) |
c7b8f16e JB |
8356 | return TRUE; |
8357 | ||
0ffa91dd NC |
8358 | /* Skip if this bfd does not correspond to an ELF image. */ |
8359 | if (! is_arm_elf (abfd)) | |
8360 | return TRUE; | |
906e58ca | 8361 | |
c7b8f16e JB |
8362 | /* We should have chosen a fix type by the time we get here. */ |
8363 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
8364 | ||
8365 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
8366 | return TRUE; | |
2e6030b9 | 8367 | |
33a7ffc2 JM |
8368 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
8369 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
8370 | return TRUE; | |
8371 | ||
c7b8f16e JB |
8372 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
8373 | { | |
8374 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
8375 | struct _arm_elf_section_data *sec_data; | |
8376 | ||
8377 | /* If we don't have executable progbits, we're not interested in this | |
99059e56 | 8378 | section. Also skip if section is to be excluded. */ |
c7b8f16e | 8379 | if (elf_section_type (sec) != SHT_PROGBITS |
99059e56 RM |
8380 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 |
8381 | || (sec->flags & SEC_EXCLUDE) != 0 | |
dbaa2011 | 8382 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
33a7ffc2 | 8383 | || sec->output_section == bfd_abs_section_ptr |
99059e56 RM |
8384 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
8385 | continue; | |
c7b8f16e JB |
8386 | |
8387 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 8388 | |
c7b8f16e | 8389 | if (sec_data->mapcount == 0) |
99059e56 | 8390 | continue; |
906e58ca | 8391 | |
c7b8f16e JB |
8392 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
8393 | contents = elf_section_data (sec)->this_hdr.contents; | |
8394 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
8395 | goto error_return; | |
8396 | ||
8397 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
8398 | elf32_arm_compare_mapping); | |
8399 | ||
8400 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
8401 | { |
8402 | unsigned int span_start = sec_data->map[span].vma; | |
8403 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
c7b8f16e | 8404 | ? sec->size : sec_data->map[span + 1].vma; |
99059e56 RM |
8405 | char span_type = sec_data->map[span].type; |
8406 | ||
8407 | /* FIXME: Only ARM mode is supported at present. We may need to | |
8408 | support Thumb-2 mode also at some point. */ | |
8409 | if (span_type != 'a') | |
8410 | continue; | |
8411 | ||
8412 | for (i = span_start; i < span_end;) | |
8413 | { | |
8414 | unsigned int next_i = i + 4; | |
8415 | unsigned int insn = bfd_big_endian (abfd) | |
8416 | ? (contents[i] << 24) | |
8417 | | (contents[i + 1] << 16) | |
8418 | | (contents[i + 2] << 8) | |
8419 | | contents[i + 3] | |
8420 | : (contents[i + 3] << 24) | |
8421 | | (contents[i + 2] << 16) | |
8422 | | (contents[i + 1] << 8) | |
8423 | | contents[i]; | |
8424 | unsigned int writemask = 0; | |
8425 | enum bfd_arm_vfp11_pipe vpipe; | |
8426 | ||
8427 | switch (state) | |
8428 | { | |
8429 | case 0: | |
8430 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, | |
8431 | &numregs); | |
8432 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
8433 | operands on either the FMAC or the DS pipeline. This might | |
8434 | lead to slightly overenthusiastic veneer insertion. */ | |
8435 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) | |
8436 | { | |
8437 | state = use_vector ? 1 : 2; | |
8438 | first_fmac = i; | |
8439 | veneer_of_insn = insn; | |
8440 | } | |
8441 | break; | |
8442 | ||
8443 | case 1: | |
8444 | { | |
8445 | int other_regs[3], other_numregs; | |
8446 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 8447 | other_regs, |
99059e56 RM |
8448 | &other_numregs); |
8449 | if (vpipe != VFP11_BAD | |
8450 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 8451 | numregs)) |
99059e56 RM |
8452 | state = 3; |
8453 | else | |
8454 | state = 2; | |
8455 | } | |
8456 | break; | |
8457 | ||
8458 | case 2: | |
8459 | { | |
8460 | int other_regs[3], other_numregs; | |
8461 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 8462 | other_regs, |
99059e56 RM |
8463 | &other_numregs); |
8464 | if (vpipe != VFP11_BAD | |
8465 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 8466 | numregs)) |
99059e56 RM |
8467 | state = 3; |
8468 | else | |
8469 | { | |
8470 | state = 0; | |
8471 | next_i = first_fmac + 4; | |
8472 | } | |
8473 | } | |
8474 | break; | |
8475 | ||
8476 | case 3: | |
8477 | abort (); /* Should be unreachable. */ | |
8478 | } | |
8479 | ||
8480 | if (state == 3) | |
8481 | { | |
8482 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) | |
8483 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
8484 | ||
8485 | elf32_arm_section_data (sec)->erratumcount += 1; | |
8486 | ||
8487 | newerr->u.b.vfp_insn = veneer_of_insn; | |
8488 | ||
8489 | switch (span_type) | |
8490 | { | |
8491 | case 'a': | |
8492 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
8493 | break; | |
8494 | ||
8495 | default: | |
8496 | abort (); | |
8497 | } | |
8498 | ||
8499 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
c7b8f16e JB |
8500 | first_fmac); |
8501 | ||
99059e56 | 8502 | newerr->vma = -1; |
c7b8f16e | 8503 | |
99059e56 RM |
8504 | newerr->next = sec_data->erratumlist; |
8505 | sec_data->erratumlist = newerr; | |
c7b8f16e | 8506 | |
99059e56 RM |
8507 | state = 0; |
8508 | } | |
c7b8f16e | 8509 | |
99059e56 RM |
8510 | i = next_i; |
8511 | } | |
8512 | } | |
906e58ca | 8513 | |
c7b8f16e | 8514 | if (contents != NULL |
99059e56 RM |
8515 | && elf_section_data (sec)->this_hdr.contents != contents) |
8516 | free (contents); | |
c7b8f16e JB |
8517 | contents = NULL; |
8518 | } | |
8519 | ||
8520 | return TRUE; | |
8521 | ||
8522 | error_return: | |
8523 | if (contents != NULL | |
8524 | && elf_section_data (sec)->this_hdr.contents != contents) | |
8525 | free (contents); | |
906e58ca | 8526 | |
c7b8f16e JB |
8527 | return FALSE; |
8528 | } | |
8529 | ||
8530 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
8531 | after sections have been laid out, using specially-named symbols. */ | |
8532 | ||
8533 | void | |
8534 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
8535 | struct bfd_link_info *link_info) | |
8536 | { | |
8537 | asection *sec; | |
8538 | struct elf32_arm_link_hash_table *globals; | |
8539 | char *tmp_name; | |
906e58ca | 8540 | |
0e1862bb | 8541 | if (bfd_link_relocatable (link_info)) |
c7b8f16e | 8542 | return; |
2e6030b9 MS |
8543 | |
8544 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 8545 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
8546 | return; |
8547 | ||
c7b8f16e | 8548 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
8549 | if (globals == NULL) |
8550 | return; | |
906e58ca | 8551 | |
21d799b5 | 8552 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 8553 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
c7b8f16e JB |
8554 | |
8555 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8556 | { | |
8557 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
8558 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 8559 | |
c7b8f16e | 8560 | for (; errnode != NULL; errnode = errnode->next) |
99059e56 RM |
8561 | { |
8562 | struct elf_link_hash_entry *myh; | |
8563 | bfd_vma vma; | |
8564 | ||
8565 | switch (errnode->type) | |
8566 | { | |
8567 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
8568 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
8569 | /* Find veneer symbol. */ | |
8570 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
c7b8f16e JB |
8571 | errnode->u.b.veneer->u.v.id); |
8572 | ||
99059e56 RM |
8573 | myh = elf_link_hash_lookup |
8574 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
c7b8f16e | 8575 | |
a504d23a | 8576 | if (myh == NULL) |
90b6238f AM |
8577 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8578 | abfd, "VFP11", tmp_name); | |
a504d23a LA |
8579 | |
8580 | vma = myh->root.u.def.section->output_section->vma | |
8581 | + myh->root.u.def.section->output_offset | |
8582 | + myh->root.u.def.value; | |
8583 | ||
8584 | errnode->u.b.veneer->vma = vma; | |
8585 | break; | |
8586 | ||
8587 | case VFP11_ERRATUM_ARM_VENEER: | |
8588 | case VFP11_ERRATUM_THUMB_VENEER: | |
8589 | /* Find return location. */ | |
8590 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
8591 | errnode->u.v.id); | |
8592 | ||
8593 | myh = elf_link_hash_lookup | |
8594 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
8595 | ||
8596 | if (myh == NULL) | |
90b6238f AM |
8597 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8598 | abfd, "VFP11", tmp_name); | |
a504d23a LA |
8599 | |
8600 | vma = myh->root.u.def.section->output_section->vma | |
8601 | + myh->root.u.def.section->output_offset | |
8602 | + myh->root.u.def.value; | |
8603 | ||
8604 | errnode->u.v.branch->vma = vma; | |
8605 | break; | |
8606 | ||
8607 | default: | |
8608 | abort (); | |
8609 | } | |
8610 | } | |
8611 | } | |
8612 | ||
8613 | free (tmp_name); | |
8614 | } | |
8615 | ||
8616 | /* Find virtual-memory addresses for STM32L4XX erratum veneers and | |
8617 | return locations after sections have been laid out, using | |
8618 | specially-named symbols. */ | |
8619 | ||
8620 | void | |
8621 | bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd, | |
8622 | struct bfd_link_info *link_info) | |
8623 | { | |
8624 | asection *sec; | |
8625 | struct elf32_arm_link_hash_table *globals; | |
8626 | char *tmp_name; | |
8627 | ||
8628 | if (bfd_link_relocatable (link_info)) | |
8629 | return; | |
8630 | ||
8631 | /* Skip if this bfd does not correspond to an ELF image. */ | |
8632 | if (! is_arm_elf (abfd)) | |
8633 | return; | |
8634 | ||
8635 | globals = elf32_arm_hash_table (link_info); | |
8636 | if (globals == NULL) | |
8637 | return; | |
8638 | ||
8639 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
8640 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
8641 | ||
8642 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8643 | { | |
8644 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
8645 | elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist; | |
8646 | ||
8647 | for (; errnode != NULL; errnode = errnode->next) | |
8648 | { | |
8649 | struct elf_link_hash_entry *myh; | |
8650 | bfd_vma vma; | |
8651 | ||
8652 | switch (errnode->type) | |
8653 | { | |
8654 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
8655 | /* Find veneer symbol. */ | |
8656 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
8657 | errnode->u.b.veneer->u.v.id); | |
8658 | ||
8659 | myh = elf_link_hash_lookup | |
8660 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
8661 | ||
8662 | if (myh == NULL) | |
90b6238f AM |
8663 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8664 | abfd, "STM32L4XX", tmp_name); | |
a504d23a LA |
8665 | |
8666 | vma = myh->root.u.def.section->output_section->vma | |
8667 | + myh->root.u.def.section->output_offset | |
8668 | + myh->root.u.def.value; | |
8669 | ||
8670 | errnode->u.b.veneer->vma = vma; | |
8671 | break; | |
8672 | ||
8673 | case STM32L4XX_ERRATUM_VENEER: | |
8674 | /* Find return location. */ | |
8675 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
8676 | errnode->u.v.id); | |
8677 | ||
8678 | myh = elf_link_hash_lookup | |
8679 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
8680 | ||
8681 | if (myh == NULL) | |
90b6238f AM |
8682 | _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"), |
8683 | abfd, "STM32L4XX", tmp_name); | |
a504d23a LA |
8684 | |
8685 | vma = myh->root.u.def.section->output_section->vma | |
8686 | + myh->root.u.def.section->output_offset | |
8687 | + myh->root.u.def.value; | |
8688 | ||
8689 | errnode->u.v.branch->vma = vma; | |
8690 | break; | |
8691 | ||
8692 | default: | |
8693 | abort (); | |
8694 | } | |
8695 | } | |
8696 | } | |
8697 | ||
8698 | free (tmp_name); | |
8699 | } | |
8700 | ||
8701 | static inline bfd_boolean | |
8702 | is_thumb2_ldmia (const insn32 insn) | |
8703 | { | |
8704 | /* Encoding T2: LDM<c>.W <Rn>{!},<registers> | |
8705 | 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
8706 | return (insn & 0xffd02000) == 0xe8900000; | |
8707 | } | |
8708 | ||
8709 | static inline bfd_boolean | |
8710 | is_thumb2_ldmdb (const insn32 insn) | |
8711 | { | |
8712 | /* Encoding T1: LDMDB<c> <Rn>{!},<registers> | |
8713 | 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
8714 | return (insn & 0xffd02000) == 0xe9100000; | |
8715 | } | |
8716 | ||
8717 | static inline bfd_boolean | |
8718 | is_thumb2_vldm (const insn32 insn) | |
8719 | { | |
8720 | /* A6.5 Extension register load or store instruction | |
8721 | A7.7.229 | |
9239bbd3 CM |
8722 | We look for SP 32-bit and DP 64-bit registers. |
8723 | Encoding T1 VLDM{mode}<c> <Rn>{!}, <list> | |
8724 | <list> is consecutive 64-bit registers | |
8725 | 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii | |
a504d23a LA |
8726 | Encoding T2 VLDM{mode}<c> <Rn>{!}, <list> |
8727 | <list> is consecutive 32-bit registers | |
8728 | 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii | |
8729 | if P==0 && U==1 && W==1 && Rn=1101 VPOP | |
8730 | if PUW=010 || PUW=011 || PUW=101 VLDM. */ | |
8731 | return | |
9239bbd3 CM |
8732 | (((insn & 0xfe100f00) == 0xec100b00) || |
8733 | ((insn & 0xfe100f00) == 0xec100a00)) | |
a504d23a LA |
8734 | && /* (IA without !). */ |
8735 | (((((insn << 7) >> 28) & 0xd) == 0x4) | |
9239bbd3 | 8736 | /* (IA with !), includes VPOP (when reg number is SP). */ |
a504d23a LA |
8737 | || ((((insn << 7) >> 28) & 0xd) == 0x5) |
8738 | /* (DB with !). */ | |
8739 | || ((((insn << 7) >> 28) & 0xd) == 0x9)); | |
8740 | } | |
8741 | ||
8742 | /* STM STM32L4XX erratum : This function assumes that it receives an LDM or | |
8743 | VLDM opcode and: | |
8744 | - computes the number and the mode of memory accesses | |
8745 | - decides if the replacement should be done: | |
8746 | . replaces only if > 8-word accesses | |
8747 | . or (testing purposes only) replaces all accesses. */ | |
8748 | ||
8749 | static bfd_boolean | |
8750 | stm32l4xx_need_create_replacing_stub (const insn32 insn, | |
8751 | bfd_arm_stm32l4xx_fix stm32l4xx_fix) | |
8752 | { | |
9239bbd3 | 8753 | int nb_words = 0; |
a504d23a LA |
8754 | |
8755 | /* The field encoding the register list is the same for both LDMIA | |
8756 | and LDMDB encodings. */ | |
8757 | if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn)) | |
b25e998d | 8758 | nb_words = elf32_arm_popcount (insn & 0x0000ffff); |
a504d23a | 8759 | else if (is_thumb2_vldm (insn)) |
9239bbd3 | 8760 | nb_words = (insn & 0xff); |
a504d23a LA |
8761 | |
8762 | /* DEFAULT mode accounts for the real bug condition situation, | |
8763 | ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ | |
8764 | return | |
9239bbd3 | 8765 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 : |
a504d23a LA |
8766 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE; |
8767 | } | |
8768 | ||
8769 | /* Look for potentially-troublesome code sequences which might trigger | |
8770 | the STM STM32L4XX erratum. */ | |
8771 | ||
8772 | bfd_boolean | |
8773 | bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd, | |
8774 | struct bfd_link_info *link_info) | |
8775 | { | |
8776 | asection *sec; | |
8777 | bfd_byte *contents = NULL; | |
8778 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8779 | ||
8780 | if (globals == NULL) | |
8781 | return FALSE; | |
8782 | ||
8783 | /* If we are only performing a partial link do not bother | |
8784 | to construct any glue. */ | |
8785 | if (bfd_link_relocatable (link_info)) | |
8786 | return TRUE; | |
8787 | ||
8788 | /* Skip if this bfd does not correspond to an ELF image. */ | |
8789 | if (! is_arm_elf (abfd)) | |
8790 | return TRUE; | |
8791 | ||
8792 | if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE) | |
8793 | return TRUE; | |
8794 | ||
8795 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ | |
8796 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
8797 | return TRUE; | |
8798 | ||
8799 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8800 | { | |
8801 | unsigned int i, span; | |
8802 | struct _arm_elf_section_data *sec_data; | |
8803 | ||
8804 | /* If we don't have executable progbits, we're not interested in this | |
8805 | section. Also skip if section is to be excluded. */ | |
8806 | if (elf_section_type (sec) != SHT_PROGBITS | |
8807 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
8808 | || (sec->flags & SEC_EXCLUDE) != 0 | |
8809 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS | |
8810 | || sec->output_section == bfd_abs_section_ptr | |
8811 | || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0) | |
8812 | continue; | |
8813 | ||
8814 | sec_data = elf32_arm_section_data (sec); | |
c7b8f16e | 8815 | |
a504d23a LA |
8816 | if (sec_data->mapcount == 0) |
8817 | continue; | |
c7b8f16e | 8818 | |
a504d23a LA |
8819 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
8820 | contents = elf_section_data (sec)->this_hdr.contents; | |
8821 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
8822 | goto error_return; | |
c7b8f16e | 8823 | |
a504d23a LA |
8824 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), |
8825 | elf32_arm_compare_mapping); | |
c7b8f16e | 8826 | |
a504d23a LA |
8827 | for (span = 0; span < sec_data->mapcount; span++) |
8828 | { | |
8829 | unsigned int span_start = sec_data->map[span].vma; | |
8830 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
8831 | ? sec->size : sec_data->map[span + 1].vma; | |
8832 | char span_type = sec_data->map[span].type; | |
8833 | int itblock_current_pos = 0; | |
c7b8f16e | 8834 | |
a504d23a LA |
8835 | /* Only Thumb2 mode need be supported with this CM4 specific |
8836 | code, we should not encounter any arm mode eg span_type | |
8837 | != 'a'. */ | |
8838 | if (span_type != 't') | |
8839 | continue; | |
c7b8f16e | 8840 | |
a504d23a LA |
8841 | for (i = span_start; i < span_end;) |
8842 | { | |
8843 | unsigned int insn = bfd_get_16 (abfd, &contents[i]); | |
8844 | bfd_boolean insn_32bit = FALSE; | |
8845 | bfd_boolean is_ldm = FALSE; | |
8846 | bfd_boolean is_vldm = FALSE; | |
8847 | bfd_boolean is_not_last_in_it_block = FALSE; | |
8848 | ||
8849 | /* The first 16-bits of all 32-bit thumb2 instructions start | |
8850 | with opcode[15..13]=0b111 and the encoded op1 can be anything | |
8851 | except opcode[12..11]!=0b00. | |
8852 | See 32-bit Thumb instruction encoding. */ | |
8853 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
8854 | insn_32bit = TRUE; | |
c7b8f16e | 8855 | |
a504d23a LA |
8856 | /* Compute the predicate that tells if the instruction |
8857 | is concerned by the IT block | |
8858 | - Creates an error if there is a ldm that is not | |
8859 | last in the IT block thus cannot be replaced | |
8860 | - Otherwise we can create a branch at the end of the | |
8861 | IT block, it will be controlled naturally by IT | |
8862 | with the proper pseudo-predicate | |
8863 | - So the only interesting predicate is the one that | |
8864 | tells that we are not on the last item of an IT | |
8865 | block. */ | |
8866 | if (itblock_current_pos != 0) | |
8867 | is_not_last_in_it_block = !!--itblock_current_pos; | |
906e58ca | 8868 | |
a504d23a LA |
8869 | if (insn_32bit) |
8870 | { | |
8871 | /* Load the rest of the insn (in manual-friendly order). */ | |
8872 | insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]); | |
8873 | is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn); | |
8874 | is_vldm = is_thumb2_vldm (insn); | |
8875 | ||
8876 | /* Veneers are created for (v)ldm depending on | |
8877 | option flags and memory accesses conditions; but | |
8878 | if the instruction is not the last instruction of | |
8879 | an IT block, we cannot create a jump there, so we | |
8880 | bail out. */ | |
5025eb7c AO |
8881 | if ((is_ldm || is_vldm) |
8882 | && stm32l4xx_need_create_replacing_stub | |
a504d23a LA |
8883 | (insn, globals->stm32l4xx_fix)) |
8884 | { | |
8885 | if (is_not_last_in_it_block) | |
8886 | { | |
4eca0228 | 8887 | _bfd_error_handler |
695344c0 | 8888 | /* xgettext:c-format */ |
871b3ab2 | 8889 | (_("%pB(%pA+%#x): error: multiple load detected" |
90b6238f AM |
8890 | " in non-last IT block instruction:" |
8891 | " STM32L4XX veneer cannot be generated; " | |
8892 | "use gcc option -mrestrict-it to generate" | |
8893 | " only one instruction per IT block"), | |
d42c267e | 8894 | abfd, sec, i); |
a504d23a LA |
8895 | } |
8896 | else | |
8897 | { | |
8898 | elf32_stm32l4xx_erratum_list *newerr = | |
8899 | (elf32_stm32l4xx_erratum_list *) | |
8900 | bfd_zmalloc | |
8901 | (sizeof (elf32_stm32l4xx_erratum_list)); | |
8902 | ||
8903 | elf32_arm_section_data (sec) | |
8904 | ->stm32l4xx_erratumcount += 1; | |
8905 | newerr->u.b.insn = insn; | |
8906 | /* We create only thumb branches. */ | |
8907 | newerr->type = | |
8908 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER; | |
8909 | record_stm32l4xx_erratum_veneer | |
8910 | (link_info, newerr, abfd, sec, | |
8911 | i, | |
8912 | is_ldm ? | |
8913 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE: | |
8914 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
8915 | newerr->vma = -1; | |
8916 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
8917 | sec_data->stm32l4xx_erratumlist = newerr; | |
8918 | } | |
8919 | } | |
8920 | } | |
8921 | else | |
8922 | { | |
8923 | /* A7.7.37 IT p208 | |
8924 | IT blocks are only encoded in T1 | |
8925 | Encoding T1: IT{x{y{z}}} <firstcond> | |
8926 | 1 0 1 1 - 1 1 1 1 - firstcond - mask | |
8927 | if mask = '0000' then see 'related encodings' | |
8928 | We don't deal with UNPREDICTABLE, just ignore these. | |
8929 | There can be no nested IT blocks so an IT block | |
8930 | is naturally a new one for which it is worth | |
8931 | computing its size. */ | |
5025eb7c AO |
8932 | bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) |
8933 | && ((insn & 0x000f) != 0x0000); | |
a504d23a LA |
8934 | /* If we have a new IT block we compute its size. */ |
8935 | if (is_newitblock) | |
8936 | { | |
8937 | /* Compute the number of instructions controlled | |
8938 | by the IT block, it will be used to decide | |
8939 | whether we are inside an IT block or not. */ | |
8940 | unsigned int mask = insn & 0x000f; | |
8941 | itblock_current_pos = 4 - ctz (mask); | |
8942 | } | |
8943 | } | |
8944 | ||
8945 | i += insn_32bit ? 4 : 2; | |
99059e56 RM |
8946 | } |
8947 | } | |
a504d23a LA |
8948 | |
8949 | if (contents != NULL | |
8950 | && elf_section_data (sec)->this_hdr.contents != contents) | |
8951 | free (contents); | |
8952 | contents = NULL; | |
c7b8f16e | 8953 | } |
906e58ca | 8954 | |
a504d23a LA |
8955 | return TRUE; |
8956 | ||
8957 | error_return: | |
8958 | if (contents != NULL | |
8959 | && elf_section_data (sec)->this_hdr.contents != contents) | |
8960 | free (contents); | |
c7b8f16e | 8961 | |
a504d23a LA |
8962 | return FALSE; |
8963 | } | |
c7b8f16e | 8964 | |
eb043451 PB |
8965 | /* Set target relocation values needed during linking. */ |
8966 | ||
8967 | void | |
68c39892 | 8968 | bfd_elf32_arm_set_target_params (struct bfd *output_bfd, |
bf21ed78 | 8969 | struct bfd_link_info *link_info, |
68c39892 | 8970 | struct elf32_arm_params *params) |
eb043451 PB |
8971 | { |
8972 | struct elf32_arm_link_hash_table *globals; | |
8973 | ||
8974 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
8975 | if (globals == NULL) |
8976 | return; | |
eb043451 | 8977 | |
68c39892 | 8978 | globals->target1_is_rel = params->target1_is_rel; |
29e9b073 CL |
8979 | if (globals->fdpic_p) |
8980 | globals->target2_reloc = R_ARM_GOT32; | |
8981 | else if (strcmp (params->target2_type, "rel") == 0) | |
eb043451 | 8982 | globals->target2_reloc = R_ARM_REL32; |
68c39892 | 8983 | else if (strcmp (params->target2_type, "abs") == 0) |
eeac373a | 8984 | globals->target2_reloc = R_ARM_ABS32; |
68c39892 | 8985 | else if (strcmp (params->target2_type, "got-rel") == 0) |
eb043451 PB |
8986 | globals->target2_reloc = R_ARM_GOT_PREL; |
8987 | else | |
8988 | { | |
90b6238f | 8989 | _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"), |
68c39892 | 8990 | params->target2_type); |
eb043451 | 8991 | } |
68c39892 TP |
8992 | globals->fix_v4bx = params->fix_v4bx; |
8993 | globals->use_blx |= params->use_blx; | |
8994 | globals->vfp11_fix = params->vfp11_denorm_fix; | |
8995 | globals->stm32l4xx_fix = params->stm32l4xx_fix; | |
e8b09b87 CL |
8996 | if (globals->fdpic_p) |
8997 | globals->pic_veneer = 1; | |
8998 | else | |
8999 | globals->pic_veneer = params->pic_veneer; | |
68c39892 TP |
9000 | globals->fix_cortex_a8 = params->fix_cortex_a8; |
9001 | globals->fix_arm1176 = params->fix_arm1176; | |
9002 | globals->cmse_implib = params->cmse_implib; | |
9003 | globals->in_implib_bfd = params->in_implib_bfd; | |
bf21ed78 | 9004 | |
0ffa91dd | 9005 | BFD_ASSERT (is_arm_elf (output_bfd)); |
68c39892 TP |
9006 | elf_arm_tdata (output_bfd)->no_enum_size_warning |
9007 | = params->no_enum_size_warning; | |
9008 | elf_arm_tdata (output_bfd)->no_wchar_size_warning | |
9009 | = params->no_wchar_size_warning; | |
eb043451 | 9010 | } |
eb043451 | 9011 | |
12a0a0fd | 9012 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 9013 | |
12a0a0fd PB |
9014 | static void |
9015 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
9016 | { | |
9017 | bfd_vma upper; | |
9018 | bfd_vma lower; | |
9019 | int reloc_sign; | |
9020 | ||
9021 | BFD_ASSERT ((offset & 1) == 0); | |
9022 | ||
9023 | upper = bfd_get_16 (abfd, insn); | |
9024 | lower = bfd_get_16 (abfd, insn + 2); | |
9025 | reloc_sign = (offset < 0) ? 1 : 0; | |
9026 | upper = (upper & ~(bfd_vma) 0x7ff) | |
9027 | | ((offset >> 12) & 0x3ff) | |
9028 | | (reloc_sign << 10); | |
906e58ca | 9029 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
9030 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
9031 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
9032 | | ((offset >> 1) & 0x7ff); | |
9033 | bfd_put_16 (abfd, upper, insn); | |
9034 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
9035 | } |
9036 | ||
9b485d32 NC |
9037 | /* Thumb code calling an ARM function. */ |
9038 | ||
252b5132 | 9039 | static int |
57e8b36a | 9040 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
07d6d2b8 AM |
9041 | const char * name, |
9042 | bfd * input_bfd, | |
9043 | bfd * output_bfd, | |
9044 | asection * input_section, | |
9045 | bfd_byte * hit_data, | |
9046 | asection * sym_sec, | |
9047 | bfd_vma offset, | |
9048 | bfd_signed_vma addend, | |
9049 | bfd_vma val, | |
f2a9dd69 | 9050 | char **error_message) |
252b5132 | 9051 | { |
bcbdc74c | 9052 | asection * s = 0; |
dc810e39 | 9053 | bfd_vma my_offset; |
252b5132 | 9054 | long int ret_offset; |
bcbdc74c NC |
9055 | struct elf_link_hash_entry * myh; |
9056 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 9057 | |
f2a9dd69 | 9058 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 9059 | if (myh == NULL) |
b34976b6 | 9060 | return FALSE; |
252b5132 RH |
9061 | |
9062 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
9063 | BFD_ASSERT (globals != NULL); |
9064 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9065 | ||
9066 | my_offset = myh->root.u.def.value; | |
9067 | ||
3d4d4302 AM |
9068 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9069 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 RH |
9070 | |
9071 | BFD_ASSERT (s != NULL); | |
9072 | BFD_ASSERT (s->contents != NULL); | |
9073 | BFD_ASSERT (s->output_section != NULL); | |
9074 | ||
9075 | if ((my_offset & 0x01) == 0x01) | |
9076 | { | |
9077 | if (sym_sec != NULL | |
9078 | && sym_sec->owner != NULL | |
9079 | && !INTERWORK_FLAG (sym_sec->owner)) | |
9080 | { | |
4eca0228 | 9081 | _bfd_error_handler |
90b6238f AM |
9082 | (_("%pB(%s): warning: interworking not enabled;" |
9083 | " first occurrence: %pB: %s call to %s"), | |
9084 | sym_sec->owner, name, input_bfd, "Thumb", "ARM"); | |
252b5132 | 9085 | |
b34976b6 | 9086 | return FALSE; |
252b5132 RH |
9087 | } |
9088 | ||
9089 | --my_offset; | |
9090 | myh->root.u.def.value = my_offset; | |
9091 | ||
52ab56c2 PB |
9092 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
9093 | s->contents + my_offset); | |
252b5132 | 9094 | |
52ab56c2 PB |
9095 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
9096 | s->contents + my_offset + 2); | |
252b5132 RH |
9097 | |
9098 | ret_offset = | |
9b485d32 NC |
9099 | /* Address of destination of the stub. */ |
9100 | ((bfd_signed_vma) val) | |
252b5132 | 9101 | - ((bfd_signed_vma) |
57e8b36a NC |
9102 | /* Offset from the start of the current section |
9103 | to the start of the stubs. */ | |
9b485d32 NC |
9104 | (s->output_offset |
9105 | /* Offset of the start of this stub from the start of the stubs. */ | |
9106 | + my_offset | |
9107 | /* Address of the start of the current section. */ | |
9108 | + s->output_section->vma) | |
9109 | /* The branch instruction is 4 bytes into the stub. */ | |
9110 | + 4 | |
9111 | /* ARM branches work from the pc of the instruction + 8. */ | |
9112 | + 8); | |
252b5132 | 9113 | |
52ab56c2 PB |
9114 | put_arm_insn (globals, output_bfd, |
9115 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
9116 | s->contents + my_offset + 4); | |
252b5132 RH |
9117 | } |
9118 | ||
9119 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
9120 | ||
427bfd90 NC |
9121 | /* Now go back and fix up the original BL insn to point to here. */ |
9122 | ret_offset = | |
9123 | /* Address of where the stub is located. */ | |
9124 | (s->output_section->vma + s->output_offset + my_offset) | |
9125 | /* Address of where the BL is located. */ | |
57e8b36a NC |
9126 | - (input_section->output_section->vma + input_section->output_offset |
9127 | + offset) | |
427bfd90 NC |
9128 | /* Addend in the relocation. */ |
9129 | - addend | |
9130 | /* Biassing for PC-relative addressing. */ | |
9131 | - 8; | |
252b5132 | 9132 | |
12a0a0fd | 9133 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 9134 | |
b34976b6 | 9135 | return TRUE; |
252b5132 RH |
9136 | } |
9137 | ||
a4fd1a8e | 9138 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 9139 | |
a4fd1a8e PB |
9140 | static struct elf_link_hash_entry * |
9141 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
07d6d2b8 AM |
9142 | const char * name, |
9143 | bfd * input_bfd, | |
9144 | bfd * output_bfd, | |
9145 | asection * sym_sec, | |
9146 | bfd_vma val, | |
9147 | asection * s, | |
9148 | char ** error_message) | |
252b5132 | 9149 | { |
dc810e39 | 9150 | bfd_vma my_offset; |
252b5132 | 9151 | long int ret_offset; |
bcbdc74c NC |
9152 | struct elf_link_hash_entry * myh; |
9153 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 9154 | |
f2a9dd69 | 9155 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 9156 | if (myh == NULL) |
a4fd1a8e | 9157 | return NULL; |
252b5132 RH |
9158 | |
9159 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
9160 | BFD_ASSERT (globals != NULL); |
9161 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9162 | ||
9163 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
9164 | |
9165 | if ((my_offset & 0x01) == 0x01) | |
9166 | { | |
9167 | if (sym_sec != NULL | |
9168 | && sym_sec->owner != NULL | |
9169 | && !INTERWORK_FLAG (sym_sec->owner)) | |
9170 | { | |
4eca0228 | 9171 | _bfd_error_handler |
90b6238f AM |
9172 | (_("%pB(%s): warning: interworking not enabled;" |
9173 | " first occurrence: %pB: %s call to %s"), | |
9174 | sym_sec->owner, name, input_bfd, "ARM", "Thumb"); | |
252b5132 | 9175 | } |
9b485d32 | 9176 | |
252b5132 RH |
9177 | --my_offset; |
9178 | myh->root.u.def.value = my_offset; | |
9179 | ||
0e1862bb L |
9180 | if (bfd_link_pic (info) |
9181 | || globals->root.is_relocatable_executable | |
27e55c4d | 9182 | || globals->pic_veneer) |
8f6277f5 PB |
9183 | { |
9184 | /* For relocatable objects we can't use absolute addresses, | |
9185 | so construct the address from a relative offset. */ | |
9186 | /* TODO: If the offset is small it's probably worth | |
9187 | constructing the address with adds. */ | |
52ab56c2 PB |
9188 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
9189 | s->contents + my_offset); | |
9190 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
9191 | s->contents + my_offset + 4); | |
9192 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
9193 | s->contents + my_offset + 8); | |
8f6277f5 PB |
9194 | /* Adjust the offset by 4 for the position of the add, |
9195 | and 8 for the pipeline offset. */ | |
9196 | ret_offset = (val - (s->output_offset | |
9197 | + s->output_section->vma | |
9198 | + my_offset + 12)) | |
9199 | | 1; | |
9200 | bfd_put_32 (output_bfd, ret_offset, | |
9201 | s->contents + my_offset + 12); | |
9202 | } | |
26079076 PB |
9203 | else if (globals->use_blx) |
9204 | { | |
9205 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
9206 | s->contents + my_offset); | |
9207 | ||
9208 | /* It's a thumb address. Add the low order bit. */ | |
9209 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
9210 | s->contents + my_offset + 4); | |
9211 | } | |
8f6277f5 PB |
9212 | else |
9213 | { | |
52ab56c2 PB |
9214 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
9215 | s->contents + my_offset); | |
252b5132 | 9216 | |
52ab56c2 PB |
9217 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
9218 | s->contents + my_offset + 4); | |
252b5132 | 9219 | |
8f6277f5 PB |
9220 | /* It's a thumb address. Add the low order bit. */ |
9221 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
9222 | s->contents + my_offset + 8); | |
8029a119 NC |
9223 | |
9224 | my_offset += 12; | |
8f6277f5 | 9225 | } |
252b5132 RH |
9226 | } |
9227 | ||
9228 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
9229 | ||
a4fd1a8e PB |
9230 | return myh; |
9231 | } | |
9232 | ||
9233 | /* Arm code calling a Thumb function. */ | |
9234 | ||
9235 | static int | |
9236 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
07d6d2b8 AM |
9237 | const char * name, |
9238 | bfd * input_bfd, | |
9239 | bfd * output_bfd, | |
9240 | asection * input_section, | |
9241 | bfd_byte * hit_data, | |
9242 | asection * sym_sec, | |
9243 | bfd_vma offset, | |
9244 | bfd_signed_vma addend, | |
9245 | bfd_vma val, | |
f2a9dd69 | 9246 | char **error_message) |
a4fd1a8e PB |
9247 | { |
9248 | unsigned long int tmp; | |
9249 | bfd_vma my_offset; | |
9250 | asection * s; | |
9251 | long int ret_offset; | |
9252 | struct elf_link_hash_entry * myh; | |
9253 | struct elf32_arm_link_hash_table * globals; | |
9254 | ||
9255 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
9256 | BFD_ASSERT (globals != NULL); |
9257 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9258 | ||
3d4d4302 AM |
9259 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9260 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
9261 | BFD_ASSERT (s != NULL); |
9262 | BFD_ASSERT (s->contents != NULL); | |
9263 | BFD_ASSERT (s->output_section != NULL); | |
9264 | ||
9265 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 9266 | sym_sec, val, s, error_message); |
a4fd1a8e PB |
9267 | if (!myh) |
9268 | return FALSE; | |
9269 | ||
9270 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
9271 | tmp = bfd_get_32 (input_bfd, hit_data); |
9272 | tmp = tmp & 0xFF000000; | |
9273 | ||
9b485d32 | 9274 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
9275 | ret_offset = (s->output_offset |
9276 | + my_offset | |
9277 | + s->output_section->vma | |
9278 | - (input_section->output_offset | |
9279 | + input_section->output_section->vma | |
9280 | + offset + addend) | |
9281 | - 8); | |
9a5aca8c | 9282 | |
252b5132 RH |
9283 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
9284 | ||
dc810e39 | 9285 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 9286 | |
b34976b6 | 9287 | return TRUE; |
252b5132 RH |
9288 | } |
9289 | ||
a4fd1a8e PB |
9290 | /* Populate Arm stub for an exported Thumb function. */ |
9291 | ||
9292 | static bfd_boolean | |
9293 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) | |
9294 | { | |
9295 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
9296 | asection * s; | |
9297 | struct elf_link_hash_entry * myh; | |
9298 | struct elf32_arm_link_hash_entry *eh; | |
9299 | struct elf32_arm_link_hash_table * globals; | |
9300 | asection *sec; | |
9301 | bfd_vma val; | |
f2a9dd69 | 9302 | char *error_message; |
a4fd1a8e | 9303 | |
906e58ca | 9304 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
9305 | /* Allocate stubs for exported Thumb functions on v4t. */ |
9306 | if (eh->export_glue == NULL) | |
9307 | return TRUE; | |
9308 | ||
9309 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
9310 | BFD_ASSERT (globals != NULL); |
9311 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9312 | ||
3d4d4302 AM |
9313 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9314 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
9315 | BFD_ASSERT (s != NULL); |
9316 | BFD_ASSERT (s->contents != NULL); | |
9317 | BFD_ASSERT (s->output_section != NULL); | |
9318 | ||
9319 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
9320 | |
9321 | BFD_ASSERT (sec->output_section != NULL); | |
9322 | ||
a4fd1a8e PB |
9323 | val = eh->export_glue->root.u.def.value + sec->output_offset |
9324 | + sec->output_section->vma; | |
8029a119 | 9325 | |
a4fd1a8e PB |
9326 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
9327 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
9328 | globals->obfd, sec, val, s, |
9329 | &error_message); | |
a4fd1a8e PB |
9330 | BFD_ASSERT (myh); |
9331 | return TRUE; | |
9332 | } | |
9333 | ||
845b51d6 PB |
9334 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
9335 | ||
9336 | static bfd_vma | |
9337 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
9338 | { | |
9339 | bfd_byte *p; | |
9340 | bfd_vma glue_addr; | |
9341 | asection *s; | |
9342 | struct elf32_arm_link_hash_table *globals; | |
9343 | ||
9344 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
9345 | BFD_ASSERT (globals != NULL); |
9346 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
9347 | ||
3d4d4302 AM |
9348 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
9349 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
9350 | BFD_ASSERT (s != NULL); |
9351 | BFD_ASSERT (s->contents != NULL); | |
9352 | BFD_ASSERT (s->output_section != NULL); | |
9353 | ||
9354 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
9355 | ||
9356 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
9357 | ||
9358 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
9359 | { | |
9360 | p = s->contents + glue_addr; | |
9361 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
9362 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
9363 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
9364 | globals->bx_glue_offset[reg] |= 1; | |
9365 | } | |
9366 | ||
9367 | return glue_addr + s->output_section->vma + s->output_offset; | |
9368 | } | |
9369 | ||
a4fd1a8e PB |
9370 | /* Generate Arm stubs for exported Thumb symbols. */ |
9371 | static void | |
906e58ca | 9372 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
9373 | struct bfd_link_info *link_info) |
9374 | { | |
9375 | struct elf32_arm_link_hash_table * globals; | |
9376 | ||
8029a119 NC |
9377 | if (link_info == NULL) |
9378 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
9379 | return; |
9380 | ||
9381 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
9382 | if (globals == NULL) |
9383 | return; | |
9384 | ||
84c08195 PB |
9385 | /* If blx is available then exported Thumb symbols are OK and there is |
9386 | nothing to do. */ | |
a4fd1a8e PB |
9387 | if (globals->use_blx) |
9388 | return; | |
9389 | ||
9390 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
9391 | link_info); | |
9392 | } | |
9393 | ||
47beaa6a RS |
9394 | /* Reserve space for COUNT dynamic relocations in relocation selection |
9395 | SRELOC. */ | |
9396 | ||
9397 | static void | |
9398 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, | |
9399 | bfd_size_type count) | |
9400 | { | |
9401 | struct elf32_arm_link_hash_table *htab; | |
9402 | ||
9403 | htab = elf32_arm_hash_table (info); | |
9404 | BFD_ASSERT (htab->root.dynamic_sections_created); | |
9405 | if (sreloc == NULL) | |
9406 | abort (); | |
9407 | sreloc->size += RELOC_SIZE (htab) * count; | |
9408 | } | |
9409 | ||
34e77a92 RS |
9410 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
9411 | dynamic, the relocations should go in SRELOC, otherwise they should | |
9412 | go in the special .rel.iplt section. */ | |
9413 | ||
9414 | static void | |
9415 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, | |
9416 | bfd_size_type count) | |
9417 | { | |
9418 | struct elf32_arm_link_hash_table *htab; | |
9419 | ||
9420 | htab = elf32_arm_hash_table (info); | |
9421 | if (!htab->root.dynamic_sections_created) | |
9422 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; | |
9423 | else | |
9424 | { | |
9425 | BFD_ASSERT (sreloc != NULL); | |
9426 | sreloc->size += RELOC_SIZE (htab) * count; | |
9427 | } | |
9428 | } | |
9429 | ||
47beaa6a RS |
9430 | /* Add relocation REL to the end of relocation section SRELOC. */ |
9431 | ||
9432 | static void | |
9433 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, | |
9434 | asection *sreloc, Elf_Internal_Rela *rel) | |
9435 | { | |
9436 | bfd_byte *loc; | |
9437 | struct elf32_arm_link_hash_table *htab; | |
9438 | ||
9439 | htab = elf32_arm_hash_table (info); | |
34e77a92 RS |
9440 | if (!htab->root.dynamic_sections_created |
9441 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) | |
9442 | sreloc = htab->root.irelplt; | |
47beaa6a RS |
9443 | if (sreloc == NULL) |
9444 | abort (); | |
9445 | loc = sreloc->contents; | |
9446 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); | |
9447 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) | |
9448 | abort (); | |
9449 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); | |
9450 | } | |
9451 | ||
34e77a92 RS |
9452 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
9453 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than | |
9454 | to .plt. */ | |
9455 | ||
9456 | static void | |
9457 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, | |
9458 | bfd_boolean is_iplt_entry, | |
9459 | union gotplt_union *root_plt, | |
9460 | struct arm_plt_info *arm_plt) | |
9461 | { | |
9462 | struct elf32_arm_link_hash_table *htab; | |
9463 | asection *splt; | |
9464 | asection *sgotplt; | |
9465 | ||
9466 | htab = elf32_arm_hash_table (info); | |
9467 | ||
9468 | if (is_iplt_entry) | |
9469 | { | |
9470 | splt = htab->root.iplt; | |
9471 | sgotplt = htab->root.igotplt; | |
9472 | ||
99059e56 RM |
9473 | /* NaCl uses a special first entry in .iplt too. */ |
9474 | if (htab->nacl_p && splt->size == 0) | |
9475 | splt->size += htab->plt_header_size; | |
9476 | ||
34e77a92 RS |
9477 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ |
9478 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); | |
9479 | } | |
9480 | else | |
9481 | { | |
9482 | splt = htab->root.splt; | |
9483 | sgotplt = htab->root.sgotplt; | |
9484 | ||
7801f98f CL |
9485 | if (htab->fdpic_p) |
9486 | { | |
9487 | /* Allocate room for R_ARM_FUNCDESC_VALUE. */ | |
9488 | /* For lazy binding, relocations will be put into .rel.plt, in | |
9489 | .rel.got otherwise. */ | |
9490 | /* FIXME: today we don't support lazy binding so put it in .rel.got */ | |
9491 | if (info->flags & DF_BIND_NOW) | |
9492 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
9493 | else | |
9494 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
9495 | } | |
9496 | else | |
9497 | { | |
9498 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ | |
9499 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
9500 | } | |
34e77a92 RS |
9501 | |
9502 | /* If this is the first .plt entry, make room for the special | |
9503 | first entry. */ | |
9504 | if (splt->size == 0) | |
9505 | splt->size += htab->plt_header_size; | |
9f19ab6d WN |
9506 | |
9507 | htab->next_tls_desc_index++; | |
34e77a92 RS |
9508 | } |
9509 | ||
9510 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ | |
9511 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
9512 | splt->size += PLT_THUMB_STUB_SIZE; | |
9513 | root_plt->offset = splt->size; | |
9514 | splt->size += htab->plt_entry_size; | |
9515 | ||
9516 | if (!htab->symbian_p) | |
9517 | { | |
9518 | /* We also need to make an entry in the .got.plt section, which | |
9519 | will be placed in the .got section by the linker script. */ | |
9f19ab6d WN |
9520 | if (is_iplt_entry) |
9521 | arm_plt->got_offset = sgotplt->size; | |
9522 | else | |
9523 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; | |
7801f98f CL |
9524 | if (htab->fdpic_p) |
9525 | /* Function descriptor takes 64 bits in GOT. */ | |
9526 | sgotplt->size += 8; | |
9527 | else | |
9528 | sgotplt->size += 4; | |
34e77a92 RS |
9529 | } |
9530 | } | |
9531 | ||
b38cadfb NC |
9532 | static bfd_vma |
9533 | arm_movw_immediate (bfd_vma value) | |
9534 | { | |
9535 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); | |
9536 | } | |
9537 | ||
9538 | static bfd_vma | |
9539 | arm_movt_immediate (bfd_vma value) | |
9540 | { | |
9541 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); | |
9542 | } | |
9543 | ||
34e77a92 RS |
9544 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, |
9545 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). | |
9546 | Otherwise, DYNINDX is the index of the symbol in the dynamic | |
9547 | symbol table and SYM_VALUE is undefined. | |
9548 | ||
9549 | ROOT_PLT points to the offset of the PLT entry from the start of its | |
9550 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific | |
57460bcf | 9551 | bookkeeping information. |
34e77a92 | 9552 | |
57460bcf NC |
9553 | Returns FALSE if there was a problem. */ |
9554 | ||
9555 | static bfd_boolean | |
34e77a92 RS |
9556 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, |
9557 | union gotplt_union *root_plt, | |
9558 | struct arm_plt_info *arm_plt, | |
9559 | int dynindx, bfd_vma sym_value) | |
9560 | { | |
9561 | struct elf32_arm_link_hash_table *htab; | |
9562 | asection *sgot; | |
9563 | asection *splt; | |
9564 | asection *srel; | |
9565 | bfd_byte *loc; | |
9566 | bfd_vma plt_index; | |
9567 | Elf_Internal_Rela rel; | |
9568 | bfd_vma plt_header_size; | |
9569 | bfd_vma got_header_size; | |
9570 | ||
9571 | htab = elf32_arm_hash_table (info); | |
9572 | ||
9573 | /* Pick the appropriate sections and sizes. */ | |
9574 | if (dynindx == -1) | |
9575 | { | |
9576 | splt = htab->root.iplt; | |
9577 | sgot = htab->root.igotplt; | |
9578 | srel = htab->root.irelplt; | |
9579 | ||
9580 | /* There are no reserved entries in .igot.plt, and no special | |
9581 | first entry in .iplt. */ | |
9582 | got_header_size = 0; | |
9583 | plt_header_size = 0; | |
9584 | } | |
9585 | else | |
9586 | { | |
9587 | splt = htab->root.splt; | |
9588 | sgot = htab->root.sgotplt; | |
9589 | srel = htab->root.srelplt; | |
9590 | ||
9591 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; | |
9592 | plt_header_size = htab->plt_header_size; | |
9593 | } | |
9594 | BFD_ASSERT (splt != NULL && srel != NULL); | |
9595 | ||
9596 | /* Fill in the entry in the procedure linkage table. */ | |
9597 | if (htab->symbian_p) | |
9598 | { | |
9599 | BFD_ASSERT (dynindx >= 0); | |
9600 | put_arm_insn (htab, output_bfd, | |
9601 | elf32_arm_symbian_plt_entry[0], | |
9602 | splt->contents + root_plt->offset); | |
9603 | bfd_put_32 (output_bfd, | |
9604 | elf32_arm_symbian_plt_entry[1], | |
9605 | splt->contents + root_plt->offset + 4); | |
9606 | ||
9607 | /* Fill in the entry in the .rel.plt section. */ | |
9608 | rel.r_offset = (splt->output_section->vma | |
9609 | + splt->output_offset | |
9610 | + root_plt->offset + 4); | |
9611 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT); | |
9612 | ||
9613 | /* Get the index in the procedure linkage table which | |
9614 | corresponds to this symbol. This is the index of this symbol | |
9615 | in all the symbols for which we are making plt entries. The | |
9616 | first entry in the procedure linkage table is reserved. */ | |
9617 | plt_index = ((root_plt->offset - plt_header_size) | |
9618 | / htab->plt_entry_size); | |
9619 | } | |
9620 | else | |
9621 | { | |
9622 | bfd_vma got_offset, got_address, plt_address; | |
9623 | bfd_vma got_displacement, initial_got_entry; | |
9624 | bfd_byte * ptr; | |
9625 | ||
9626 | BFD_ASSERT (sgot != NULL); | |
9627 | ||
9628 | /* Get the offset into the .(i)got.plt table of the entry that | |
9629 | corresponds to this function. */ | |
9630 | got_offset = (arm_plt->got_offset & -2); | |
9631 | ||
9632 | /* Get the index in the procedure linkage table which | |
9633 | corresponds to this symbol. This is the index of this symbol | |
9634 | in all the symbols for which we are making plt entries. | |
9635 | After the reserved .got.plt entries, all symbols appear in | |
9636 | the same order as in .plt. */ | |
7801f98f CL |
9637 | if (htab->fdpic_p) |
9638 | /* Function descriptor takes 8 bytes. */ | |
9639 | plt_index = (got_offset - got_header_size) / 8; | |
9640 | else | |
9641 | plt_index = (got_offset - got_header_size) / 4; | |
34e77a92 RS |
9642 | |
9643 | /* Calculate the address of the GOT entry. */ | |
9644 | got_address = (sgot->output_section->vma | |
9645 | + sgot->output_offset | |
9646 | + got_offset); | |
9647 | ||
9648 | /* ...and the address of the PLT entry. */ | |
9649 | plt_address = (splt->output_section->vma | |
9650 | + splt->output_offset | |
9651 | + root_plt->offset); | |
9652 | ||
9653 | ptr = splt->contents + root_plt->offset; | |
0e1862bb | 9654 | if (htab->vxworks_p && bfd_link_pic (info)) |
34e77a92 RS |
9655 | { |
9656 | unsigned int i; | |
9657 | bfd_vma val; | |
9658 | ||
9659 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
9660 | { | |
9661 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
9662 | if (i == 2) | |
9663 | val |= got_address - sgot->output_section->vma; | |
9664 | if (i == 5) | |
9665 | val |= plt_index * RELOC_SIZE (htab); | |
9666 | if (i == 2 || i == 5) | |
9667 | bfd_put_32 (output_bfd, val, ptr); | |
9668 | else | |
9669 | put_arm_insn (htab, output_bfd, val, ptr); | |
9670 | } | |
9671 | } | |
9672 | else if (htab->vxworks_p) | |
9673 | { | |
9674 | unsigned int i; | |
9675 | bfd_vma val; | |
9676 | ||
9677 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
9678 | { | |
9679 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
9680 | if (i == 2) | |
9681 | val |= got_address; | |
9682 | if (i == 4) | |
9683 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); | |
9684 | if (i == 5) | |
9685 | val |= plt_index * RELOC_SIZE (htab); | |
9686 | if (i == 2 || i == 5) | |
9687 | bfd_put_32 (output_bfd, val, ptr); | |
9688 | else | |
9689 | put_arm_insn (htab, output_bfd, val, ptr); | |
9690 | } | |
9691 | ||
9692 | loc = (htab->srelplt2->contents | |
9693 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
9694 | ||
9695 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation | |
9696 | referencing the GOT for this PLT entry. */ | |
9697 | rel.r_offset = plt_address + 8; | |
9698 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
9699 | rel.r_addend = got_offset; | |
9700 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9701 | loc += RELOC_SIZE (htab); | |
9702 | ||
9703 | /* Create the R_ARM_ABS32 relocation referencing the | |
9704 | beginning of the PLT for this GOT entry. */ | |
9705 | rel.r_offset = got_address; | |
9706 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
9707 | rel.r_addend = 0; | |
9708 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9709 | } | |
b38cadfb NC |
9710 | else if (htab->nacl_p) |
9711 | { | |
9712 | /* Calculate the displacement between the PLT slot and the | |
9713 | common tail that's part of the special initial PLT slot. */ | |
6034aab8 | 9714 | int32_t tail_displacement |
b38cadfb NC |
9715 | = ((splt->output_section->vma + splt->output_offset |
9716 | + ARM_NACL_PLT_TAIL_OFFSET) | |
9717 | - (plt_address + htab->plt_entry_size + 4)); | |
9718 | BFD_ASSERT ((tail_displacement & 3) == 0); | |
9719 | tail_displacement >>= 2; | |
9720 | ||
9721 | BFD_ASSERT ((tail_displacement & 0xff000000) == 0 | |
9722 | || (-tail_displacement & 0xff000000) == 0); | |
9723 | ||
9724 | /* Calculate the displacement between the PLT slot and the entry | |
9725 | in the GOT. The offset accounts for the value produced by | |
9726 | adding to pc in the penultimate instruction of the PLT stub. */ | |
6034aab8 | 9727 | got_displacement = (got_address |
99059e56 | 9728 | - (plt_address + htab->plt_entry_size)); |
b38cadfb NC |
9729 | |
9730 | /* NaCl does not support interworking at all. */ | |
9731 | BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)); | |
9732 | ||
9733 | put_arm_insn (htab, output_bfd, | |
9734 | elf32_arm_nacl_plt_entry[0] | |
9735 | | arm_movw_immediate (got_displacement), | |
9736 | ptr + 0); | |
9737 | put_arm_insn (htab, output_bfd, | |
9738 | elf32_arm_nacl_plt_entry[1] | |
9739 | | arm_movt_immediate (got_displacement), | |
9740 | ptr + 4); | |
9741 | put_arm_insn (htab, output_bfd, | |
9742 | elf32_arm_nacl_plt_entry[2], | |
9743 | ptr + 8); | |
9744 | put_arm_insn (htab, output_bfd, | |
9745 | elf32_arm_nacl_plt_entry[3] | |
9746 | | (tail_displacement & 0x00ffffff), | |
9747 | ptr + 12); | |
9748 | } | |
7801f98f CL |
9749 | else if (htab->fdpic_p) |
9750 | { | |
59029f57 CL |
9751 | const bfd_vma *plt_entry = using_thumb_only(htab) |
9752 | ? elf32_arm_fdpic_thumb_plt_entry | |
9753 | : elf32_arm_fdpic_plt_entry; | |
9754 | ||
7801f98f CL |
9755 | /* Fill-up Thumb stub if needed. */ |
9756 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
9757 | { | |
9758 | put_thumb_insn (htab, output_bfd, | |
9759 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
9760 | put_thumb_insn (htab, output_bfd, | |
9761 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
9762 | } | |
59029f57 CL |
9763 | /* As we are using 32 bit instructions even for the Thumb |
9764 | version, we have to use 'put_arm_insn' instead of | |
9765 | 'put_thumb_insn'. */ | |
9766 | put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0); | |
9767 | put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4); | |
9768 | put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8); | |
9769 | put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12); | |
7801f98f CL |
9770 | bfd_put_32 (output_bfd, got_offset, ptr + 16); |
9771 | ||
9772 | if (!(info->flags & DF_BIND_NOW)) | |
9773 | { | |
9774 | /* funcdesc_value_reloc_offset. */ | |
9775 | bfd_put_32 (output_bfd, | |
9776 | htab->root.srelplt->reloc_count * RELOC_SIZE (htab), | |
9777 | ptr + 20); | |
59029f57 CL |
9778 | put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24); |
9779 | put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28); | |
9780 | put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32); | |
9781 | put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36); | |
7801f98f CL |
9782 | } |
9783 | } | |
57460bcf NC |
9784 | else if (using_thumb_only (htab)) |
9785 | { | |
eed94f8f | 9786 | /* PR ld/16017: Generate thumb only PLT entries. */ |
469a3493 | 9787 | if (!using_thumb2 (htab)) |
eed94f8f NC |
9788 | { |
9789 | /* FIXME: We ought to be able to generate thumb-1 PLT | |
9790 | instructions... */ | |
90b6238f | 9791 | _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"), |
eed94f8f NC |
9792 | output_bfd); |
9793 | return FALSE; | |
9794 | } | |
57460bcf | 9795 | |
eed94f8f NC |
9796 | /* Calculate the displacement between the PLT slot and the entry in |
9797 | the GOT. The 12-byte offset accounts for the value produced by | |
9798 | adding to pc in the 3rd instruction of the PLT stub. */ | |
9799 | got_displacement = got_address - (plt_address + 12); | |
9800 | ||
9801 | /* As we are using 32 bit instructions we have to use 'put_arm_insn' | |
9802 | instead of 'put_thumb_insn'. */ | |
9803 | put_arm_insn (htab, output_bfd, | |
9804 | elf32_thumb2_plt_entry[0] | |
9805 | | ((got_displacement & 0x000000ff) << 16) | |
9806 | | ((got_displacement & 0x00000700) << 20) | |
9807 | | ((got_displacement & 0x00000800) >> 1) | |
9808 | | ((got_displacement & 0x0000f000) >> 12), | |
9809 | ptr + 0); | |
9810 | put_arm_insn (htab, output_bfd, | |
9811 | elf32_thumb2_plt_entry[1] | |
9812 | | ((got_displacement & 0x00ff0000) ) | |
9813 | | ((got_displacement & 0x07000000) << 4) | |
9814 | | ((got_displacement & 0x08000000) >> 17) | |
9815 | | ((got_displacement & 0xf0000000) >> 28), | |
9816 | ptr + 4); | |
9817 | put_arm_insn (htab, output_bfd, | |
9818 | elf32_thumb2_plt_entry[2], | |
9819 | ptr + 8); | |
9820 | put_arm_insn (htab, output_bfd, | |
9821 | elf32_thumb2_plt_entry[3], | |
9822 | ptr + 12); | |
57460bcf | 9823 | } |
34e77a92 RS |
9824 | else |
9825 | { | |
9826 | /* Calculate the displacement between the PLT slot and the | |
9827 | entry in the GOT. The eight-byte offset accounts for the | |
9828 | value produced by adding to pc in the first instruction | |
9829 | of the PLT stub. */ | |
9830 | got_displacement = got_address - (plt_address + 8); | |
9831 | ||
34e77a92 RS |
9832 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
9833 | { | |
9834 | put_thumb_insn (htab, output_bfd, | |
9835 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
9836 | put_thumb_insn (htab, output_bfd, | |
9837 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
9838 | } | |
9839 | ||
1db37fe6 YG |
9840 | if (!elf32_arm_use_long_plt_entry) |
9841 | { | |
9842 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); | |
9843 | ||
9844 | put_arm_insn (htab, output_bfd, | |
9845 | elf32_arm_plt_entry_short[0] | |
9846 | | ((got_displacement & 0x0ff00000) >> 20), | |
9847 | ptr + 0); | |
9848 | put_arm_insn (htab, output_bfd, | |
9849 | elf32_arm_plt_entry_short[1] | |
9850 | | ((got_displacement & 0x000ff000) >> 12), | |
9851 | ptr+ 4); | |
9852 | put_arm_insn (htab, output_bfd, | |
9853 | elf32_arm_plt_entry_short[2] | |
9854 | | (got_displacement & 0x00000fff), | |
9855 | ptr + 8); | |
34e77a92 | 9856 | #ifdef FOUR_WORD_PLT |
1db37fe6 | 9857 | bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12); |
34e77a92 | 9858 | #endif |
1db37fe6 YG |
9859 | } |
9860 | else | |
9861 | { | |
9862 | put_arm_insn (htab, output_bfd, | |
9863 | elf32_arm_plt_entry_long[0] | |
9864 | | ((got_displacement & 0xf0000000) >> 28), | |
9865 | ptr + 0); | |
9866 | put_arm_insn (htab, output_bfd, | |
9867 | elf32_arm_plt_entry_long[1] | |
9868 | | ((got_displacement & 0x0ff00000) >> 20), | |
9869 | ptr + 4); | |
9870 | put_arm_insn (htab, output_bfd, | |
9871 | elf32_arm_plt_entry_long[2] | |
9872 | | ((got_displacement & 0x000ff000) >> 12), | |
9873 | ptr+ 8); | |
9874 | put_arm_insn (htab, output_bfd, | |
9875 | elf32_arm_plt_entry_long[3] | |
9876 | | (got_displacement & 0x00000fff), | |
9877 | ptr + 12); | |
9878 | } | |
34e77a92 RS |
9879 | } |
9880 | ||
9881 | /* Fill in the entry in the .rel(a).(i)plt section. */ | |
9882 | rel.r_offset = got_address; | |
9883 | rel.r_addend = 0; | |
9884 | if (dynindx == -1) | |
9885 | { | |
9886 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. | |
9887 | The dynamic linker or static executable then calls SYM_VALUE | |
9888 | to determine the correct run-time value of the .igot.plt entry. */ | |
9889 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
9890 | initial_got_entry = sym_value; | |
9891 | } | |
9892 | else | |
9893 | { | |
7801f98f CL |
9894 | /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE |
9895 | used by PLT entry. */ | |
9896 | if (htab->fdpic_p) | |
9897 | { | |
9898 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE); | |
9899 | initial_got_entry = 0; | |
9900 | } | |
9901 | else | |
9902 | { | |
9903 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); | |
9904 | initial_got_entry = (splt->output_section->vma | |
9905 | + splt->output_offset); | |
9906 | } | |
34e77a92 RS |
9907 | } |
9908 | ||
9909 | /* Fill in the entry in the global offset table. */ | |
9910 | bfd_put_32 (output_bfd, initial_got_entry, | |
9911 | sgot->contents + got_offset); | |
7801f98f CL |
9912 | |
9913 | if (htab->fdpic_p && !(info->flags & DF_BIND_NOW)) | |
9914 | { | |
9915 | /* Setup initial funcdesc value. */ | |
9916 | /* FIXME: we don't support lazy binding because there is a | |
9917 | race condition between both words getting written and | |
9918 | some other thread attempting to read them. The ARM | |
9919 | architecture does not have an atomic 64 bit load/store | |
9920 | instruction that could be used to prevent it; it is | |
9921 | recommended that threaded FDPIC applications run with the | |
9922 | LD_BIND_NOW environment variable set. */ | |
9923 | bfd_put_32(output_bfd, plt_address + 0x18, | |
9924 | sgot->contents + got_offset); | |
9925 | bfd_put_32(output_bfd, -1 /*TODO*/, | |
9926 | sgot->contents + got_offset + 4); | |
9927 | } | |
34e77a92 RS |
9928 | } |
9929 | ||
aba8c3de WN |
9930 | if (dynindx == -1) |
9931 | elf32_arm_add_dynreloc (output_bfd, info, srel, &rel); | |
9932 | else | |
9933 | { | |
7801f98f CL |
9934 | if (htab->fdpic_p) |
9935 | { | |
9936 | /* For FDPIC we put PLT relocationss into .rel.got when not | |
9937 | lazy binding otherwise we put them in .rel.plt. For now, | |
9938 | we don't support lazy binding so put it in .rel.got. */ | |
9939 | if (info->flags & DF_BIND_NOW) | |
9940 | elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel); | |
9941 | else | |
9942 | elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel); | |
9943 | } | |
9944 | else | |
9945 | { | |
9946 | loc = srel->contents + plt_index * RELOC_SIZE (htab); | |
9947 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9948 | } | |
aba8c3de | 9949 | } |
57460bcf NC |
9950 | |
9951 | return TRUE; | |
34e77a92 RS |
9952 | } |
9953 | ||
eb043451 PB |
9954 | /* Some relocations map to different relocations depending on the |
9955 | target. Return the real relocation. */ | |
8029a119 | 9956 | |
eb043451 PB |
9957 | static int |
9958 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
9959 | int r_type) | |
9960 | { | |
9961 | switch (r_type) | |
9962 | { | |
9963 | case R_ARM_TARGET1: | |
9964 | if (globals->target1_is_rel) | |
9965 | return R_ARM_REL32; | |
9966 | else | |
9967 | return R_ARM_ABS32; | |
9968 | ||
9969 | case R_ARM_TARGET2: | |
9970 | return globals->target2_reloc; | |
9971 | ||
9972 | default: | |
9973 | return r_type; | |
9974 | } | |
9975 | } | |
eb043451 | 9976 | |
ba93b8ac DJ |
9977 | /* Return the base VMA address which should be subtracted from real addresses |
9978 | when resolving @dtpoff relocation. | |
9979 | This is PT_TLS segment p_vaddr. */ | |
9980 | ||
9981 | static bfd_vma | |
9982 | dtpoff_base (struct bfd_link_info *info) | |
9983 | { | |
9984 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
9985 | if (elf_hash_table (info)->tls_sec == NULL) | |
9986 | return 0; | |
9987 | return elf_hash_table (info)->tls_sec->vma; | |
9988 | } | |
9989 | ||
9990 | /* Return the relocation value for @tpoff relocation | |
9991 | if STT_TLS virtual address is ADDRESS. */ | |
9992 | ||
9993 | static bfd_vma | |
9994 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
9995 | { | |
9996 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
9997 | bfd_vma base; | |
9998 | ||
9999 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
10000 | if (htab->tls_sec == NULL) | |
10001 | return 0; | |
10002 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
10003 | return address - htab->tls_sec->vma + base; | |
10004 | } | |
10005 | ||
00a97672 RS |
10006 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
10007 | VALUE is the relocation value. */ | |
10008 | ||
10009 | static bfd_reloc_status_type | |
10010 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
10011 | { | |
10012 | if (value > 0xfff) | |
10013 | return bfd_reloc_overflow; | |
10014 | ||
10015 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
10016 | bfd_put_32 (abfd, value, data); | |
10017 | return bfd_reloc_ok; | |
10018 | } | |
10019 | ||
0855e32b NS |
10020 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
10021 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or | |
10022 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. | |
10023 | ||
10024 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller | |
10025 | is to then call final_link_relocate. Return other values in the | |
62672b10 NS |
10026 | case of error. |
10027 | ||
10028 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing | |
10029 | the pre-relaxed code. It would be nice if the relocs were updated | |
10030 | to match the optimization. */ | |
0855e32b | 10031 | |
b38cadfb | 10032 | static bfd_reloc_status_type |
0855e32b | 10033 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, |
b38cadfb | 10034 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, |
0855e32b NS |
10035 | Elf_Internal_Rela *rel, unsigned long is_local) |
10036 | { | |
10037 | unsigned long insn; | |
b38cadfb | 10038 | |
0855e32b NS |
10039 | switch (ELF32_R_TYPE (rel->r_info)) |
10040 | { | |
10041 | default: | |
10042 | return bfd_reloc_notsupported; | |
b38cadfb | 10043 | |
0855e32b NS |
10044 | case R_ARM_TLS_GOTDESC: |
10045 | if (is_local) | |
10046 | insn = 0; | |
10047 | else | |
10048 | { | |
10049 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10050 | if (insn & 1) | |
10051 | insn -= 5; /* THUMB */ | |
10052 | else | |
10053 | insn -= 8; /* ARM */ | |
10054 | } | |
10055 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
10056 | return bfd_reloc_continue; | |
10057 | ||
10058 | case R_ARM_THM_TLS_DESCSEQ: | |
10059 | /* Thumb insn. */ | |
10060 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); | |
10061 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ | |
10062 | { | |
10063 | if (is_local) | |
10064 | /* nop */ | |
10065 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
10066 | } | |
10067 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ | |
10068 | { | |
10069 | if (is_local) | |
10070 | /* nop */ | |
10071 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
10072 | else | |
10073 | /* ldr rx,[ry] */ | |
10074 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); | |
10075 | } | |
10076 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ | |
10077 | { | |
10078 | if (is_local) | |
10079 | /* nop */ | |
10080 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
10081 | else | |
10082 | /* mov r0, rx */ | |
10083 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), | |
10084 | contents + rel->r_offset); | |
10085 | } | |
10086 | else | |
10087 | { | |
10088 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
10089 | /* It's a 32 bit instruction, fetch the rest of it for | |
10090 | error generation. */ | |
10091 | insn = (insn << 16) | |
10092 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); | |
4eca0228 | 10093 | _bfd_error_handler |
695344c0 | 10094 | /* xgettext:c-format */ |
2dcf00ce | 10095 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f AM |
10096 | "unexpected %s instruction '%#lx' in TLS trampoline"), |
10097 | input_bfd, input_sec, (uint64_t) rel->r_offset, | |
10098 | "Thumb", insn); | |
0855e32b NS |
10099 | return bfd_reloc_notsupported; |
10100 | } | |
10101 | break; | |
b38cadfb | 10102 | |
0855e32b NS |
10103 | case R_ARM_TLS_DESCSEQ: |
10104 | /* arm insn. */ | |
10105 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10106 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ | |
10107 | { | |
10108 | if (is_local) | |
10109 | /* mov rx, ry */ | |
10110 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), | |
10111 | contents + rel->r_offset); | |
10112 | } | |
10113 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ | |
10114 | { | |
10115 | if (is_local) | |
10116 | /* nop */ | |
10117 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
10118 | else | |
10119 | /* ldr rx,[ry] */ | |
10120 | bfd_put_32 (input_bfd, insn & 0xfffff000, | |
10121 | contents + rel->r_offset); | |
10122 | } | |
10123 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ | |
10124 | { | |
10125 | if (is_local) | |
10126 | /* nop */ | |
10127 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
10128 | else | |
10129 | /* mov r0, rx */ | |
10130 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), | |
10131 | contents + rel->r_offset); | |
10132 | } | |
10133 | else | |
10134 | { | |
4eca0228 | 10135 | _bfd_error_handler |
695344c0 | 10136 | /* xgettext:c-format */ |
2dcf00ce | 10137 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f AM |
10138 | "unexpected %s instruction '%#lx' in TLS trampoline"), |
10139 | input_bfd, input_sec, (uint64_t) rel->r_offset, | |
10140 | "ARM", insn); | |
0855e32b NS |
10141 | return bfd_reloc_notsupported; |
10142 | } | |
10143 | break; | |
10144 | ||
10145 | case R_ARM_TLS_CALL: | |
10146 | /* GD->IE relaxation, turn the instruction into 'nop' or | |
10147 | 'ldr r0, [pc,r0]' */ | |
10148 | insn = is_local ? 0xe1a00000 : 0xe79f0000; | |
10149 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
10150 | break; | |
b38cadfb | 10151 | |
0855e32b | 10152 | case R_ARM_THM_TLS_CALL: |
6a631e86 | 10153 | /* GD->IE relaxation. */ |
0855e32b NS |
10154 | if (!is_local) |
10155 | /* add r0,pc; ldr r0, [r0] */ | |
10156 | insn = 0x44786800; | |
60a019a0 | 10157 | else if (using_thumb2 (globals)) |
0855e32b NS |
10158 | /* nop.w */ |
10159 | insn = 0xf3af8000; | |
10160 | else | |
10161 | /* nop; nop */ | |
10162 | insn = 0xbf00bf00; | |
b38cadfb | 10163 | |
0855e32b NS |
10164 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); |
10165 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); | |
10166 | break; | |
10167 | } | |
10168 | return bfd_reloc_ok; | |
10169 | } | |
10170 | ||
4962c51a MS |
10171 | /* For a given value of n, calculate the value of G_n as required to |
10172 | deal with group relocations. We return it in the form of an | |
10173 | encoded constant-and-rotation, together with the final residual. If n is | |
10174 | specified as less than zero, then final_residual is filled with the | |
10175 | input value and no further action is performed. */ | |
10176 | ||
10177 | static bfd_vma | |
10178 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
10179 | { | |
10180 | int current_n; | |
10181 | bfd_vma g_n; | |
10182 | bfd_vma encoded_g_n = 0; | |
10183 | bfd_vma residual = value; /* Also known as Y_n. */ | |
10184 | ||
10185 | for (current_n = 0; current_n <= n; current_n++) | |
10186 | { | |
10187 | int shift; | |
10188 | ||
10189 | /* Calculate which part of the value to mask. */ | |
10190 | if (residual == 0) | |
99059e56 | 10191 | shift = 0; |
4962c51a | 10192 | else |
99059e56 RM |
10193 | { |
10194 | int msb; | |
10195 | ||
10196 | /* Determine the most significant bit in the residual and | |
10197 | align the resulting value to a 2-bit boundary. */ | |
10198 | for (msb = 30; msb >= 0; msb -= 2) | |
10199 | if (residual & (3 << msb)) | |
10200 | break; | |
10201 | ||
10202 | /* The desired shift is now (msb - 6), or zero, whichever | |
10203 | is the greater. */ | |
10204 | shift = msb - 6; | |
10205 | if (shift < 0) | |
10206 | shift = 0; | |
10207 | } | |
4962c51a MS |
10208 | |
10209 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
10210 | g_n = residual & (0xff << shift); | |
10211 | encoded_g_n = (g_n >> shift) | |
99059e56 | 10212 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); |
4962c51a MS |
10213 | |
10214 | /* Calculate the residual for the next time around. */ | |
10215 | residual &= ~g_n; | |
10216 | } | |
10217 | ||
10218 | *final_residual = residual; | |
10219 | ||
10220 | return encoded_g_n; | |
10221 | } | |
10222 | ||
10223 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
10224 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 10225 | |
4962c51a | 10226 | static int |
906e58ca | 10227 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
10228 | { |
10229 | int opcode = insn & 0x1e00000; | |
10230 | ||
10231 | if (opcode == 1 << 23) /* ADD */ | |
10232 | return 1; | |
10233 | ||
10234 | if (opcode == 1 << 22) /* SUB */ | |
10235 | return -1; | |
10236 | ||
10237 | return 0; | |
10238 | } | |
10239 | ||
252b5132 | 10240 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 10241 | |
252b5132 | 10242 | static bfd_reloc_status_type |
07d6d2b8 AM |
10243 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
10244 | bfd * input_bfd, | |
10245 | bfd * output_bfd, | |
10246 | asection * input_section, | |
10247 | bfd_byte * contents, | |
10248 | Elf_Internal_Rela * rel, | |
10249 | bfd_vma value, | |
10250 | struct bfd_link_info * info, | |
10251 | asection * sym_sec, | |
10252 | const char * sym_name, | |
10253 | unsigned char st_type, | |
10254 | enum arm_st_branch_type branch_type, | |
0945cdfd | 10255 | struct elf_link_hash_entry * h, |
07d6d2b8 AM |
10256 | bfd_boolean * unresolved_reloc_p, |
10257 | char ** error_message) | |
10258 | { | |
10259 | unsigned long r_type = howto->type; | |
10260 | unsigned long r_symndx; | |
10261 | bfd_byte * hit_data = contents + rel->r_offset; | |
10262 | bfd_vma * local_got_offsets; | |
10263 | bfd_vma * local_tlsdesc_gotents; | |
10264 | asection * sgot; | |
10265 | asection * splt; | |
10266 | asection * sreloc = NULL; | |
10267 | asection * srelgot; | |
10268 | bfd_vma addend; | |
10269 | bfd_signed_vma signed_addend; | |
10270 | unsigned char dynreloc_st_type; | |
10271 | bfd_vma dynreloc_value; | |
ba96a88f | 10272 | struct elf32_arm_link_hash_table * globals; |
34e77a92 | 10273 | struct elf32_arm_link_hash_entry *eh; |
07d6d2b8 AM |
10274 | union gotplt_union *root_plt; |
10275 | struct arm_plt_info *arm_plt; | |
10276 | bfd_vma plt_offset; | |
10277 | bfd_vma gotplt_offset; | |
10278 | bfd_boolean has_iplt_entry; | |
10279 | bfd_boolean resolved_to_zero; | |
f21f3fe0 | 10280 | |
9c504268 | 10281 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
10282 | if (globals == NULL) |
10283 | return bfd_reloc_notsupported; | |
9c504268 | 10284 | |
0ffa91dd | 10285 | BFD_ASSERT (is_arm_elf (input_bfd)); |
47aeb64c | 10286 | BFD_ASSERT (howto != NULL); |
0ffa91dd NC |
10287 | |
10288 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 10289 | target. We pick the right one here. */ |
eb043451 | 10290 | r_type = arm_real_reloc_type (globals, r_type); |
0855e32b NS |
10291 | |
10292 | /* It is possible to have linker relaxations on some TLS access | |
10293 | models. Update our information here. */ | |
10294 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
10295 | ||
eb043451 PB |
10296 | if (r_type != howto->type) |
10297 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 10298 | |
34e77a92 | 10299 | eh = (struct elf32_arm_link_hash_entry *) h; |
362d30a1 | 10300 | sgot = globals->root.sgot; |
252b5132 | 10301 | local_got_offsets = elf_local_got_offsets (input_bfd); |
0855e32b NS |
10302 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
10303 | ||
34e77a92 RS |
10304 | if (globals->root.dynamic_sections_created) |
10305 | srelgot = globals->root.srelgot; | |
10306 | else | |
10307 | srelgot = NULL; | |
10308 | ||
252b5132 RH |
10309 | r_symndx = ELF32_R_SYM (rel->r_info); |
10310 | ||
4e7fd91e | 10311 | if (globals->use_rel) |
ba96a88f | 10312 | { |
4e7fd91e PB |
10313 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
10314 | ||
10315 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10316 | { | |
10317 | signed_addend = -1; | |
10318 | signed_addend &= ~ howto->src_mask; | |
10319 | signed_addend |= addend; | |
10320 | } | |
10321 | else | |
10322 | signed_addend = addend; | |
ba96a88f NC |
10323 | } |
10324 | else | |
4e7fd91e | 10325 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 10326 | |
39f21624 NC |
10327 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
10328 | are resolving a function call relocation. */ | |
10329 | if (using_thumb_only (globals) | |
10330 | && (r_type == R_ARM_THM_CALL | |
10331 | || r_type == R_ARM_THM_JUMP24) | |
10332 | && branch_type == ST_BRANCH_TO_ARM) | |
10333 | branch_type = ST_BRANCH_TO_THUMB; | |
10334 | ||
34e77a92 RS |
10335 | /* Record the symbol information that should be used in dynamic |
10336 | relocations. */ | |
10337 | dynreloc_st_type = st_type; | |
10338 | dynreloc_value = value; | |
10339 | if (branch_type == ST_BRANCH_TO_THUMB) | |
10340 | dynreloc_value |= 1; | |
10341 | ||
10342 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and | |
10343 | VALUE appropriately for relocations that we resolve at link time. */ | |
10344 | has_iplt_entry = FALSE; | |
4ba2ef8f TP |
10345 | if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt, |
10346 | &arm_plt) | |
34e77a92 RS |
10347 | && root_plt->offset != (bfd_vma) -1) |
10348 | { | |
10349 | plt_offset = root_plt->offset; | |
10350 | gotplt_offset = arm_plt->got_offset; | |
10351 | ||
10352 | if (h == NULL || eh->is_iplt) | |
10353 | { | |
10354 | has_iplt_entry = TRUE; | |
10355 | splt = globals->root.iplt; | |
10356 | ||
10357 | /* Populate .iplt entries here, because not all of them will | |
10358 | be seen by finish_dynamic_symbol. The lower bit is set if | |
10359 | we have already populated the entry. */ | |
10360 | if (plt_offset & 1) | |
10361 | plt_offset--; | |
10362 | else | |
10363 | { | |
57460bcf NC |
10364 | if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, |
10365 | -1, dynreloc_value)) | |
10366 | root_plt->offset |= 1; | |
10367 | else | |
10368 | return bfd_reloc_notsupported; | |
34e77a92 RS |
10369 | } |
10370 | ||
10371 | /* Static relocations always resolve to the .iplt entry. */ | |
10372 | st_type = STT_FUNC; | |
10373 | value = (splt->output_section->vma | |
10374 | + splt->output_offset | |
10375 | + plt_offset); | |
10376 | branch_type = ST_BRANCH_TO_ARM; | |
10377 | ||
10378 | /* If there are non-call relocations that resolve to the .iplt | |
10379 | entry, then all dynamic ones must too. */ | |
10380 | if (arm_plt->noncall_refcount != 0) | |
10381 | { | |
10382 | dynreloc_st_type = st_type; | |
10383 | dynreloc_value = value; | |
10384 | } | |
10385 | } | |
10386 | else | |
10387 | /* We populate the .plt entry in finish_dynamic_symbol. */ | |
10388 | splt = globals->root.splt; | |
10389 | } | |
10390 | else | |
10391 | { | |
10392 | splt = NULL; | |
10393 | plt_offset = (bfd_vma) -1; | |
10394 | gotplt_offset = (bfd_vma) -1; | |
10395 | } | |
10396 | ||
95b03e4a L |
10397 | resolved_to_zero = (h != NULL |
10398 | && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)); | |
10399 | ||
252b5132 RH |
10400 | switch (r_type) |
10401 | { | |
10402 | case R_ARM_NONE: | |
28a094c2 DJ |
10403 | /* We don't need to find a value for this symbol. It's just a |
10404 | marker. */ | |
10405 | *unresolved_reloc_p = FALSE; | |
252b5132 RH |
10406 | return bfd_reloc_ok; |
10407 | ||
00a97672 RS |
10408 | case R_ARM_ABS12: |
10409 | if (!globals->vxworks_p) | |
10410 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
1a0670f3 | 10411 | /* Fall through. */ |
00a97672 | 10412 | |
252b5132 RH |
10413 | case R_ARM_PC24: |
10414 | case R_ARM_ABS32: | |
bb224fc3 | 10415 | case R_ARM_ABS32_NOI: |
252b5132 | 10416 | case R_ARM_REL32: |
bb224fc3 | 10417 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
10418 | case R_ARM_CALL: |
10419 | case R_ARM_JUMP24: | |
dfc5f959 | 10420 | case R_ARM_XPC25: |
eb043451 | 10421 | case R_ARM_PREL31: |
7359ea65 | 10422 | case R_ARM_PLT32: |
7359ea65 DJ |
10423 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
10424 | will use the symbol's value, which may point to a PLT entry, but we | |
10425 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
10426 | branches in this object should go to it, except if the PLT is too |
10427 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 10428 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
99059e56 | 10429 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
10430 | && r_type != R_ARM_CALL |
10431 | && r_type != R_ARM_JUMP24 | |
10432 | && r_type != R_ARM_PLT32) | |
34e77a92 | 10433 | && plt_offset != (bfd_vma) -1) |
7359ea65 | 10434 | { |
34e77a92 RS |
10435 | /* If we've created a .plt section, and assigned a PLT entry |
10436 | to this function, it must either be a STT_GNU_IFUNC reference | |
10437 | or not be known to bind locally. In other cases, we should | |
10438 | have cleared the PLT entry by now. */ | |
10439 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); | |
7359ea65 DJ |
10440 | |
10441 | value = (splt->output_section->vma | |
10442 | + splt->output_offset | |
34e77a92 | 10443 | + plt_offset); |
0945cdfd | 10444 | *unresolved_reloc_p = FALSE; |
7359ea65 DJ |
10445 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
10446 | contents, rel->r_offset, value, | |
00a97672 | 10447 | rel->r_addend); |
7359ea65 DJ |
10448 | } |
10449 | ||
67687978 PB |
10450 | /* When generating a shared object or relocatable executable, these |
10451 | relocations are copied into the output file to be resolved at | |
10452 | run time. */ | |
0e1862bb | 10453 | if ((bfd_link_pic (info) |
e8b09b87 CL |
10454 | || globals->root.is_relocatable_executable |
10455 | || globals->fdpic_p) | |
7359ea65 | 10456 | && (input_section->flags & SEC_ALLOC) |
4dfe6ac6 | 10457 | && !(globals->vxworks_p |
3348747a NS |
10458 | && strcmp (input_section->output_section->name, |
10459 | ".tls_vars") == 0) | |
bb224fc3 | 10460 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 10461 | || !SYMBOL_CALLS_LOCAL (info, h)) |
ca6b5f82 AM |
10462 | && !(input_bfd == globals->stub_bfd |
10463 | && strstr (input_section->name, STUB_SUFFIX)) | |
7359ea65 | 10464 | && (h == NULL |
95b03e4a L |
10465 | || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
10466 | && !resolved_to_zero) | |
7359ea65 DJ |
10467 | || h->root.type != bfd_link_hash_undefweak) |
10468 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
10469 | && r_type != R_ARM_CALL |
10470 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 10471 | && r_type != R_ARM_PREL31 |
7359ea65 | 10472 | && r_type != R_ARM_PLT32) |
252b5132 | 10473 | { |
947216bf | 10474 | Elf_Internal_Rela outrel; |
b34976b6 | 10475 | bfd_boolean skip, relocate; |
e8b09b87 | 10476 | int isrofixup = 0; |
f21f3fe0 | 10477 | |
52db4ec2 JW |
10478 | if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) |
10479 | && !h->def_regular) | |
10480 | { | |
10481 | char *v = _("shared object"); | |
10482 | ||
0e1862bb | 10483 | if (bfd_link_executable (info)) |
52db4ec2 JW |
10484 | v = _("PIE executable"); |
10485 | ||
4eca0228 | 10486 | _bfd_error_handler |
871b3ab2 | 10487 | (_("%pB: relocation %s against external or undefined symbol `%s'" |
52db4ec2 JW |
10488 | " can not be used when making a %s; recompile with -fPIC"), input_bfd, |
10489 | elf32_arm_howto_table_1[r_type].name, h->root.root.string, v); | |
10490 | return bfd_reloc_notsupported; | |
10491 | } | |
10492 | ||
0945cdfd DJ |
10493 | *unresolved_reloc_p = FALSE; |
10494 | ||
34e77a92 | 10495 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
252b5132 | 10496 | { |
83bac4b0 NC |
10497 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
10498 | ! globals->use_rel); | |
f21f3fe0 | 10499 | |
83bac4b0 | 10500 | if (sreloc == NULL) |
252b5132 | 10501 | return bfd_reloc_notsupported; |
252b5132 | 10502 | } |
f21f3fe0 | 10503 | |
b34976b6 AM |
10504 | skip = FALSE; |
10505 | relocate = FALSE; | |
f21f3fe0 | 10506 | |
00a97672 | 10507 | outrel.r_addend = addend; |
c629eae0 JJ |
10508 | outrel.r_offset = |
10509 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
10510 | rel->r_offset); | |
10511 | if (outrel.r_offset == (bfd_vma) -1) | |
b34976b6 | 10512 | skip = TRUE; |
0bb2d96a | 10513 | else if (outrel.r_offset == (bfd_vma) -2) |
b34976b6 | 10514 | skip = TRUE, relocate = TRUE; |
252b5132 RH |
10515 | outrel.r_offset += (input_section->output_section->vma |
10516 | + input_section->output_offset); | |
f21f3fe0 | 10517 | |
252b5132 | 10518 | if (skip) |
0bb2d96a | 10519 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
10520 | else if (h != NULL |
10521 | && h->dynindx != -1 | |
0e1862bb | 10522 | && (!bfd_link_pic (info) |
1dcb9720 JW |
10523 | || !(bfd_link_pie (info) |
10524 | || SYMBOLIC_BIND (info, h)) | |
f5385ebf | 10525 | || !h->def_regular)) |
5e681ec4 | 10526 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
10527 | else |
10528 | { | |
a16385dc MM |
10529 | int symbol; |
10530 | ||
5e681ec4 | 10531 | /* This symbol is local, or marked to become local. */ |
e8b09b87 CL |
10532 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI |
10533 | || (globals->fdpic_p && !bfd_link_pic(info))); | |
a16385dc | 10534 | if (globals->symbian_p) |
6366ff1e | 10535 | { |
74541ad4 AM |
10536 | asection *osec; |
10537 | ||
6366ff1e MM |
10538 | /* On Symbian OS, the data segment and text segement |
10539 | can be relocated independently. Therefore, we | |
10540 | must indicate the segment to which this | |
10541 | relocation is relative. The BPABI allows us to | |
10542 | use any symbol in the right segment; we just use | |
10543 | the section symbol as it is convenient. (We | |
10544 | cannot use the symbol given by "h" directly as it | |
74541ad4 AM |
10545 | will not appear in the dynamic symbol table.) |
10546 | ||
10547 | Note that the dynamic linker ignores the section | |
10548 | symbol value, so we don't subtract osec->vma | |
10549 | from the emitted reloc addend. */ | |
10dbd1f3 | 10550 | if (sym_sec) |
74541ad4 | 10551 | osec = sym_sec->output_section; |
10dbd1f3 | 10552 | else |
74541ad4 AM |
10553 | osec = input_section->output_section; |
10554 | symbol = elf_section_data (osec)->dynindx; | |
10555 | if (symbol == 0) | |
10556 | { | |
10557 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
10558 | ||
10559 | if ((osec->flags & SEC_READONLY) == 0 | |
10560 | && htab->data_index_section != NULL) | |
10561 | osec = htab->data_index_section; | |
10562 | else | |
10563 | osec = htab->text_index_section; | |
10564 | symbol = elf_section_data (osec)->dynindx; | |
10565 | } | |
6366ff1e MM |
10566 | BFD_ASSERT (symbol != 0); |
10567 | } | |
a16385dc MM |
10568 | else |
10569 | /* On SVR4-ish systems, the dynamic loader cannot | |
10570 | relocate the text and data segments independently, | |
10571 | so the symbol does not matter. */ | |
10572 | symbol = 0; | |
34e77a92 RS |
10573 | if (dynreloc_st_type == STT_GNU_IFUNC) |
10574 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve | |
10575 | to the .iplt entry. Instead, every non-call reference | |
10576 | must use an R_ARM_IRELATIVE relocation to obtain the | |
10577 | correct run-time address. */ | |
10578 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); | |
e8b09b87 CL |
10579 | else if (globals->fdpic_p && !bfd_link_pic(info)) |
10580 | isrofixup = 1; | |
34e77a92 RS |
10581 | else |
10582 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 RS |
10583 | if (globals->use_rel) |
10584 | relocate = TRUE; | |
10585 | else | |
34e77a92 | 10586 | outrel.r_addend += dynreloc_value; |
252b5132 | 10587 | } |
f21f3fe0 | 10588 | |
e8b09b87 CL |
10589 | if (isrofixup) |
10590 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); | |
10591 | else | |
10592 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); | |
9a5aca8c | 10593 | |
f21f3fe0 | 10594 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 10595 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 10596 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
10597 | if (! relocate) |
10598 | return bfd_reloc_ok; | |
9a5aca8c | 10599 | |
f21f3fe0 | 10600 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
34e77a92 RS |
10601 | contents, rel->r_offset, |
10602 | dynreloc_value, (bfd_vma) 0); | |
252b5132 RH |
10603 | } |
10604 | else switch (r_type) | |
10605 | { | |
00a97672 RS |
10606 | case R_ARM_ABS12: |
10607 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
10608 | ||
dfc5f959 | 10609 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
10610 | case R_ARM_CALL: |
10611 | case R_ARM_JUMP24: | |
8029a119 | 10612 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 10613 | case R_ARM_PLT32: |
906e58ca | 10614 | { |
906e58ca NC |
10615 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
10616 | ||
dfc5f959 | 10617 | if (r_type == R_ARM_XPC25) |
252b5132 | 10618 | { |
dfc5f959 NC |
10619 | /* Check for Arm calling Arm function. */ |
10620 | /* FIXME: Should we translate the instruction into a BL | |
10621 | instruction instead ? */ | |
35fc36a8 | 10622 | if (branch_type != ST_BRANCH_TO_THUMB) |
4eca0228 | 10623 | _bfd_error_handler |
90b6238f AM |
10624 | (_("\%pB: warning: %s BLX instruction targets" |
10625 | " %s function '%s'"), | |
10626 | input_bfd, "ARM", | |
10627 | "ARM", h ? h->root.root.string : "(local)"); | |
dfc5f959 | 10628 | } |
155d87d7 | 10629 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
10630 | { |
10631 | /* Check for Arm calling Thumb function. */ | |
35fc36a8 | 10632 | if (branch_type == ST_BRANCH_TO_THUMB) |
dfc5f959 | 10633 | { |
f2a9dd69 DJ |
10634 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
10635 | output_bfd, input_section, | |
10636 | hit_data, sym_sec, rel->r_offset, | |
10637 | signed_addend, value, | |
10638 | error_message)) | |
10639 | return bfd_reloc_ok; | |
10640 | else | |
10641 | return bfd_reloc_dangerous; | |
dfc5f959 | 10642 | } |
252b5132 | 10643 | } |
ba96a88f | 10644 | |
906e58ca | 10645 | /* Check if a stub has to be inserted because the |
8029a119 | 10646 | destination is too far or we are changing mode. */ |
155d87d7 CL |
10647 | if ( r_type == R_ARM_CALL |
10648 | || r_type == R_ARM_JUMP24 | |
10649 | || r_type == R_ARM_PLT32) | |
906e58ca | 10650 | { |
fe33d2fa CL |
10651 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
10652 | struct elf32_arm_link_hash_entry *hash; | |
10653 | ||
10654 | hash = (struct elf32_arm_link_hash_entry *) h; | |
10655 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
10656 | st_type, &branch_type, |
10657 | hash, value, sym_sec, | |
fe33d2fa | 10658 | input_bfd, sym_name); |
5fa9e92f | 10659 | |
fe33d2fa | 10660 | if (stub_type != arm_stub_none) |
906e58ca NC |
10661 | { |
10662 | /* The target is out of reach, so redirect the | |
10663 | branch to the local stub for this function. */ | |
906e58ca NC |
10664 | stub_entry = elf32_arm_get_stub_entry (input_section, |
10665 | sym_sec, h, | |
fe33d2fa CL |
10666 | rel, globals, |
10667 | stub_type); | |
9cd3e4e5 NC |
10668 | { |
10669 | if (stub_entry != NULL) | |
10670 | value = (stub_entry->stub_offset | |
10671 | + stub_entry->stub_sec->output_offset | |
10672 | + stub_entry->stub_sec->output_section->vma); | |
10673 | ||
10674 | if (plt_offset != (bfd_vma) -1) | |
10675 | *unresolved_reloc_p = FALSE; | |
10676 | } | |
906e58ca | 10677 | } |
fe33d2fa CL |
10678 | else |
10679 | { | |
10680 | /* If the call goes through a PLT entry, make sure to | |
10681 | check distance to the right destination address. */ | |
34e77a92 | 10682 | if (plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
10683 | { |
10684 | value = (splt->output_section->vma | |
10685 | + splt->output_offset | |
34e77a92 | 10686 | + plt_offset); |
fe33d2fa CL |
10687 | *unresolved_reloc_p = FALSE; |
10688 | /* The PLT entry is in ARM mode, regardless of the | |
10689 | target function. */ | |
35fc36a8 | 10690 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
10691 | } |
10692 | } | |
906e58ca NC |
10693 | } |
10694 | ||
dea514f5 PB |
10695 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
10696 | where: | |
10697 | S is the address of the symbol in the relocation. | |
10698 | P is address of the instruction being relocated. | |
10699 | A is the addend (extracted from the instruction) in bytes. | |
10700 | ||
10701 | S is held in 'value'. | |
10702 | P is the base address of the section containing the | |
10703 | instruction plus the offset of the reloc into that | |
10704 | section, ie: | |
10705 | (input_section->output_section->vma + | |
10706 | input_section->output_offset + | |
10707 | rel->r_offset). | |
10708 | A is the addend, converted into bytes, ie: | |
10709 | (signed_addend * 4) | |
10710 | ||
10711 | Note: None of these operations have knowledge of the pipeline | |
10712 | size of the processor, thus it is up to the assembler to | |
10713 | encode this information into the addend. */ | |
10714 | value -= (input_section->output_section->vma | |
10715 | + input_section->output_offset); | |
10716 | value -= rel->r_offset; | |
4e7fd91e PB |
10717 | if (globals->use_rel) |
10718 | value += (signed_addend << howto->size); | |
10719 | else | |
10720 | /* RELA addends do not have to be adjusted by howto->size. */ | |
10721 | value += signed_addend; | |
23080146 | 10722 | |
dcb5e6e6 NC |
10723 | signed_addend = value; |
10724 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 10725 | |
5ab79981 | 10726 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 10727 | the next instruction unless a PLT entry will be created. |
77b4f08f | 10728 | Do the same for local undefined symbols (but not for STN_UNDEF). |
cd1dac3d DG |
10729 | The jump to the next instruction is optimized as a NOP depending |
10730 | on the architecture. */ | |
ffcb4889 | 10731 | if (h ? (h->root.type == bfd_link_hash_undefweak |
34e77a92 | 10732 | && plt_offset == (bfd_vma) -1) |
77b4f08f | 10733 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
5ab79981 | 10734 | { |
cd1dac3d DG |
10735 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
10736 | ||
10737 | if (arch_has_arm_nop (globals)) | |
10738 | value |= 0x0320f000; | |
10739 | else | |
10740 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
10741 | } |
10742 | else | |
59f2c4e7 | 10743 | { |
9b485d32 | 10744 | /* Perform a signed range check. */ |
dcb5e6e6 | 10745 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
10746 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
10747 | return bfd_reloc_overflow; | |
9a5aca8c | 10748 | |
5ab79981 | 10749 | addend = (value & 2); |
39b41c9c | 10750 | |
5ab79981 PB |
10751 | value = (signed_addend & howto->dst_mask) |
10752 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 10753 | |
5ab79981 PB |
10754 | if (r_type == R_ARM_CALL) |
10755 | { | |
155d87d7 | 10756 | /* Set the H bit in the BLX instruction. */ |
35fc36a8 | 10757 | if (branch_type == ST_BRANCH_TO_THUMB) |
155d87d7 CL |
10758 | { |
10759 | if (addend) | |
10760 | value |= (1 << 24); | |
10761 | else | |
10762 | value &= ~(bfd_vma)(1 << 24); | |
10763 | } | |
10764 | ||
5ab79981 | 10765 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 10766 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 10767 | case, mode switching is performed by the stub. */ |
35fc36a8 | 10768 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
5ab79981 | 10769 | value |= (1 << 28); |
63e1a0fc | 10770 | else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) |
5ab79981 PB |
10771 | { |
10772 | value &= ~(bfd_vma)(1 << 28); | |
10773 | value |= (1 << 24); | |
10774 | } | |
39b41c9c PB |
10775 | } |
10776 | } | |
906e58ca | 10777 | } |
252b5132 | 10778 | break; |
f21f3fe0 | 10779 | |
252b5132 RH |
10780 | case R_ARM_ABS32: |
10781 | value += addend; | |
35fc36a8 | 10782 | if (branch_type == ST_BRANCH_TO_THUMB) |
252b5132 RH |
10783 | value |= 1; |
10784 | break; | |
f21f3fe0 | 10785 | |
bb224fc3 MS |
10786 | case R_ARM_ABS32_NOI: |
10787 | value += addend; | |
10788 | break; | |
10789 | ||
252b5132 | 10790 | case R_ARM_REL32: |
a8bc6c78 | 10791 | value += addend; |
35fc36a8 | 10792 | if (branch_type == ST_BRANCH_TO_THUMB) |
a8bc6c78 | 10793 | value |= 1; |
252b5132 | 10794 | value -= (input_section->output_section->vma |
62efb346 | 10795 | + input_section->output_offset + rel->r_offset); |
252b5132 | 10796 | break; |
eb043451 | 10797 | |
bb224fc3 MS |
10798 | case R_ARM_REL32_NOI: |
10799 | value += addend; | |
10800 | value -= (input_section->output_section->vma | |
10801 | + input_section->output_offset + rel->r_offset); | |
10802 | break; | |
10803 | ||
eb043451 PB |
10804 | case R_ARM_PREL31: |
10805 | value -= (input_section->output_section->vma | |
10806 | + input_section->output_offset + rel->r_offset); | |
10807 | value += signed_addend; | |
10808 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
10809 | { | |
8029a119 | 10810 | /* Check for overflow. */ |
eb043451 PB |
10811 | if ((value ^ (value >> 1)) & (1 << 30)) |
10812 | return bfd_reloc_overflow; | |
10813 | } | |
10814 | value &= 0x7fffffff; | |
10815 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
35fc36a8 | 10816 | if (branch_type == ST_BRANCH_TO_THUMB) |
eb043451 PB |
10817 | value |= 1; |
10818 | break; | |
252b5132 | 10819 | } |
f21f3fe0 | 10820 | |
252b5132 RH |
10821 | bfd_put_32 (input_bfd, value, hit_data); |
10822 | return bfd_reloc_ok; | |
10823 | ||
10824 | case R_ARM_ABS8: | |
fd0fd00c MJ |
10825 | /* PR 16202: Refectch the addend using the correct size. */ |
10826 | if (globals->use_rel) | |
10827 | addend = bfd_get_8 (input_bfd, hit_data); | |
252b5132 | 10828 | value += addend; |
4e67d4ca DG |
10829 | |
10830 | /* There is no way to tell whether the user intended to use a signed or | |
10831 | unsigned addend. When checking for overflow we accept either, | |
10832 | as specified by the AAELF. */ | |
10833 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
10834 | return bfd_reloc_overflow; |
10835 | ||
10836 | bfd_put_8 (input_bfd, value, hit_data); | |
10837 | return bfd_reloc_ok; | |
10838 | ||
10839 | case R_ARM_ABS16: | |
fd0fd00c MJ |
10840 | /* PR 16202: Refectch the addend using the correct size. */ |
10841 | if (globals->use_rel) | |
10842 | addend = bfd_get_16 (input_bfd, hit_data); | |
252b5132 RH |
10843 | value += addend; |
10844 | ||
4e67d4ca DG |
10845 | /* See comment for R_ARM_ABS8. */ |
10846 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
10847 | return bfd_reloc_overflow; |
10848 | ||
10849 | bfd_put_16 (input_bfd, value, hit_data); | |
10850 | return bfd_reloc_ok; | |
10851 | ||
252b5132 | 10852 | case R_ARM_THM_ABS5: |
9b485d32 | 10853 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
10854 | if (globals->use_rel) |
10855 | { | |
10856 | /* Need to refetch addend. */ | |
10857 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
10858 | /* ??? Need to determine shift amount from operand size. */ | |
10859 | addend >>= howto->rightshift; | |
10860 | } | |
252b5132 RH |
10861 | value += addend; |
10862 | ||
10863 | /* ??? Isn't value unsigned? */ | |
10864 | if ((long) value > 0x1f || (long) value < -0x10) | |
10865 | return bfd_reloc_overflow; | |
10866 | ||
10867 | /* ??? Value needs to be properly shifted into place first. */ | |
10868 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
10869 | bfd_put_16 (input_bfd, value, hit_data); | |
10870 | return bfd_reloc_ok; | |
10871 | ||
2cab6cc3 MS |
10872 | case R_ARM_THM_ALU_PREL_11_0: |
10873 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
10874 | { | |
10875 | bfd_vma insn; | |
10876 | bfd_signed_vma relocation; | |
10877 | ||
10878 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 10879 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 10880 | |
99059e56 RM |
10881 | if (globals->use_rel) |
10882 | { | |
10883 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
10884 | | ((insn & (1 << 26)) >> 15); | |
10885 | if (insn & 0xf00000) | |
10886 | signed_addend = -signed_addend; | |
10887 | } | |
2cab6cc3 MS |
10888 | |
10889 | relocation = value + signed_addend; | |
79f08007 | 10890 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10891 | + input_section->output_offset |
10892 | + rel->r_offset); | |
2cab6cc3 | 10893 | |
8c65b54f CS |
10894 | /* PR 21523: Use an absolute value. The user of this reloc will |
10895 | have already selected an ADD or SUB insn appropriately. */ | |
e652757b | 10896 | value = labs (relocation); |
2cab6cc3 | 10897 | |
99059e56 RM |
10898 | if (value >= 0x1000) |
10899 | return bfd_reloc_overflow; | |
2cab6cc3 | 10900 | |
e645cf40 AG |
10901 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
10902 | if (branch_type == ST_BRANCH_TO_THUMB) | |
10903 | value |= 1; | |
10904 | ||
2cab6cc3 | 10905 | insn = (insn & 0xfb0f8f00) | (value & 0xff) |
99059e56 RM |
10906 | | ((value & 0x700) << 4) |
10907 | | ((value & 0x800) << 15); | |
10908 | if (relocation < 0) | |
10909 | insn |= 0xa00000; | |
2cab6cc3 MS |
10910 | |
10911 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10912 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10913 | ||
99059e56 | 10914 | return bfd_reloc_ok; |
2cab6cc3 MS |
10915 | } |
10916 | ||
e1ec24c6 NC |
10917 | case R_ARM_THM_PC8: |
10918 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
10919 | but it is supported for compatibility with third party libraries | |
10920 | generated by other compilers, specifically the ARM/IAR. */ | |
10921 | { | |
10922 | bfd_vma insn; | |
10923 | bfd_signed_vma relocation; | |
10924 | ||
10925 | insn = bfd_get_16 (input_bfd, hit_data); | |
10926 | ||
99059e56 | 10927 | if (globals->use_rel) |
79f08007 | 10928 | addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4; |
e1ec24c6 NC |
10929 | |
10930 | relocation = value + addend; | |
79f08007 | 10931 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10932 | + input_section->output_offset |
10933 | + rel->r_offset); | |
e1ec24c6 | 10934 | |
b6518b38 | 10935 | value = relocation; |
e1ec24c6 NC |
10936 | |
10937 | /* We do not check for overflow of this reloc. Although strictly | |
10938 | speaking this is incorrect, it appears to be necessary in order | |
10939 | to work with IAR generated relocs. Since GCC and GAS do not | |
10940 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
10941 | a problem for them. */ | |
10942 | value &= 0x3fc; | |
10943 | ||
10944 | insn = (insn & 0xff00) | (value >> 2); | |
10945 | ||
10946 | bfd_put_16 (input_bfd, insn, hit_data); | |
10947 | ||
99059e56 | 10948 | return bfd_reloc_ok; |
e1ec24c6 NC |
10949 | } |
10950 | ||
2cab6cc3 MS |
10951 | case R_ARM_THM_PC12: |
10952 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
10953 | { | |
10954 | bfd_vma insn; | |
10955 | bfd_signed_vma relocation; | |
10956 | ||
10957 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 10958 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 10959 | |
99059e56 RM |
10960 | if (globals->use_rel) |
10961 | { | |
10962 | signed_addend = insn & 0xfff; | |
10963 | if (!(insn & (1 << 23))) | |
10964 | signed_addend = -signed_addend; | |
10965 | } | |
2cab6cc3 MS |
10966 | |
10967 | relocation = value + signed_addend; | |
79f08007 | 10968 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10969 | + input_section->output_offset |
10970 | + rel->r_offset); | |
2cab6cc3 | 10971 | |
b6518b38 | 10972 | value = relocation; |
2cab6cc3 | 10973 | |
99059e56 RM |
10974 | if (value >= 0x1000) |
10975 | return bfd_reloc_overflow; | |
2cab6cc3 MS |
10976 | |
10977 | insn = (insn & 0xff7ff000) | value; | |
99059e56 RM |
10978 | if (relocation >= 0) |
10979 | insn |= (1 << 23); | |
2cab6cc3 MS |
10980 | |
10981 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10982 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10983 | ||
99059e56 | 10984 | return bfd_reloc_ok; |
2cab6cc3 MS |
10985 | } |
10986 | ||
dfc5f959 | 10987 | case R_ARM_THM_XPC22: |
c19d1205 | 10988 | case R_ARM_THM_CALL: |
bd97cb95 | 10989 | case R_ARM_THM_JUMP24: |
dfc5f959 | 10990 | /* Thumb BL (branch long instruction). */ |
252b5132 | 10991 | { |
b34976b6 | 10992 | bfd_vma relocation; |
99059e56 | 10993 | bfd_vma reloc_sign; |
b34976b6 AM |
10994 | bfd_boolean overflow = FALSE; |
10995 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
10996 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
10997 | bfd_signed_vma reloc_signed_max; |
10998 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 10999 | bfd_vma check; |
252b5132 | 11000 | bfd_signed_vma signed_check; |
e95de063 | 11001 | int bitsize; |
cd1dac3d | 11002 | const int thumb2 = using_thumb2 (globals); |
5e866f5a | 11003 | const int thumb2_bl = using_thumb2_bl (globals); |
252b5132 | 11004 | |
5ab79981 | 11005 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
11006 | the next instruction unless a PLT entry will be created. |
11007 | The jump to the next instruction is optimized as a NOP.W for | |
11008 | Thumb-2 enabled architectures. */ | |
19540007 | 11009 | if (h && h->root.type == bfd_link_hash_undefweak |
34e77a92 | 11010 | && plt_offset == (bfd_vma) -1) |
5ab79981 | 11011 | { |
60a019a0 | 11012 | if (thumb2) |
cd1dac3d DG |
11013 | { |
11014 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
11015 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
11016 | } | |
11017 | else | |
11018 | { | |
11019 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
11020 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
11021 | } | |
5ab79981 PB |
11022 | return bfd_reloc_ok; |
11023 | } | |
11024 | ||
e95de063 | 11025 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
99059e56 | 11026 | with Thumb-1) involving the J1 and J2 bits. */ |
4e7fd91e PB |
11027 | if (globals->use_rel) |
11028 | { | |
99059e56 RM |
11029 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
11030 | bfd_vma upper = upper_insn & 0x3ff; | |
11031 | bfd_vma lower = lower_insn & 0x7ff; | |
e95de063 MS |
11032 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; |
11033 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
99059e56 RM |
11034 | bfd_vma i1 = j1 ^ s ? 0 : 1; |
11035 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
e95de063 | 11036 | |
99059e56 RM |
11037 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); |
11038 | /* Sign extend. */ | |
11039 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
e95de063 | 11040 | |
4e7fd91e PB |
11041 | signed_addend = addend; |
11042 | } | |
cb1afa5c | 11043 | |
dfc5f959 NC |
11044 | if (r_type == R_ARM_THM_XPC22) |
11045 | { | |
11046 | /* Check for Thumb to Thumb call. */ | |
11047 | /* FIXME: Should we translate the instruction into a BL | |
11048 | instruction instead ? */ | |
35fc36a8 | 11049 | if (branch_type == ST_BRANCH_TO_THUMB) |
4eca0228 | 11050 | _bfd_error_handler |
90b6238f AM |
11051 | (_("%pB: warning: %s BLX instruction targets" |
11052 | " %s function '%s'"), | |
11053 | input_bfd, "Thumb", | |
11054 | "Thumb", h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
11055 | } |
11056 | else | |
252b5132 | 11057 | { |
dfc5f959 NC |
11058 | /* If it is not a call to Thumb, assume call to Arm. |
11059 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
11060 | function call at all, but rather a long jump. Calls through |
11061 | the PLT do not require stubs. */ | |
34e77a92 | 11062 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
dfc5f959 | 11063 | { |
bd97cb95 | 11064 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
11065 | { |
11066 | /* Convert BL to BLX. */ | |
11067 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
11068 | } | |
155d87d7 CL |
11069 | else if (( r_type != R_ARM_THM_CALL) |
11070 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
11071 | { |
11072 | if (elf32_thumb_to_arm_stub | |
11073 | (info, sym_name, input_bfd, output_bfd, input_section, | |
11074 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
11075 | error_message)) | |
11076 | return bfd_reloc_ok; | |
11077 | else | |
11078 | return bfd_reloc_dangerous; | |
11079 | } | |
da5938a2 | 11080 | } |
35fc36a8 RS |
11081 | else if (branch_type == ST_BRANCH_TO_THUMB |
11082 | && globals->use_blx | |
bd97cb95 | 11083 | && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
11084 | { |
11085 | /* Make sure this is a BL. */ | |
11086 | lower_insn |= 0x1800; | |
11087 | } | |
252b5132 | 11088 | } |
f21f3fe0 | 11089 | |
fe33d2fa | 11090 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
155d87d7 | 11091 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
11092 | { |
11093 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 11094 | is too far. */ |
fe33d2fa CL |
11095 | struct elf32_arm_stub_hash_entry *stub_entry; |
11096 | struct elf32_arm_link_hash_entry *hash; | |
11097 | ||
11098 | hash = (struct elf32_arm_link_hash_entry *) h; | |
11099 | ||
11100 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
11101 | st_type, &branch_type, |
11102 | hash, value, sym_sec, | |
fe33d2fa CL |
11103 | input_bfd, sym_name); |
11104 | ||
11105 | if (stub_type != arm_stub_none) | |
906e58ca NC |
11106 | { |
11107 | /* The target is out of reach or we are changing modes, so | |
11108 | redirect the branch to the local stub for this | |
11109 | function. */ | |
11110 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
11111 | sym_sec, h, | |
fe33d2fa CL |
11112 | rel, globals, |
11113 | stub_type); | |
906e58ca | 11114 | if (stub_entry != NULL) |
9cd3e4e5 NC |
11115 | { |
11116 | value = (stub_entry->stub_offset | |
11117 | + stub_entry->stub_sec->output_offset | |
11118 | + stub_entry->stub_sec->output_section->vma); | |
11119 | ||
11120 | if (plt_offset != (bfd_vma) -1) | |
11121 | *unresolved_reloc_p = FALSE; | |
11122 | } | |
906e58ca | 11123 | |
f4ac8484 | 11124 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 11125 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
11126 | { |
11127 | if ((stub_entry | |
11128 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
35fc36a8 | 11129 | || branch_type != ST_BRANCH_TO_THUMB) |
f4ac8484 DJ |
11130 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
11131 | } | |
906e58ca NC |
11132 | } |
11133 | } | |
11134 | ||
fe33d2fa | 11135 | /* Handle calls via the PLT. */ |
34e77a92 | 11136 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
11137 | { |
11138 | value = (splt->output_section->vma | |
11139 | + splt->output_offset | |
34e77a92 | 11140 | + plt_offset); |
fe33d2fa | 11141 | |
eed94f8f NC |
11142 | if (globals->use_blx |
11143 | && r_type == R_ARM_THM_CALL | |
11144 | && ! using_thumb_only (globals)) | |
fe33d2fa CL |
11145 | { |
11146 | /* If the Thumb BLX instruction is available, convert | |
11147 | the BL to a BLX instruction to call the ARM-mode | |
11148 | PLT entry. */ | |
11149 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
35fc36a8 | 11150 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
11151 | } |
11152 | else | |
11153 | { | |
eed94f8f NC |
11154 | if (! using_thumb_only (globals)) |
11155 | /* Target the Thumb stub before the ARM PLT entry. */ | |
11156 | value -= PLT_THUMB_STUB_SIZE; | |
35fc36a8 | 11157 | branch_type = ST_BRANCH_TO_THUMB; |
fe33d2fa CL |
11158 | } |
11159 | *unresolved_reloc_p = FALSE; | |
11160 | } | |
11161 | ||
ba96a88f | 11162 | relocation = value + signed_addend; |
f21f3fe0 | 11163 | |
252b5132 | 11164 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
11165 | + input_section->output_offset |
11166 | + rel->r_offset); | |
9a5aca8c | 11167 | |
252b5132 RH |
11168 | check = relocation >> howto->rightshift; |
11169 | ||
11170 | /* If this is a signed value, the rightshift just dropped | |
11171 | leading 1 bits (assuming twos complement). */ | |
11172 | if ((bfd_signed_vma) relocation >= 0) | |
11173 | signed_check = check; | |
11174 | else | |
11175 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
11176 | ||
e95de063 MS |
11177 | /* Calculate the permissable maximum and minimum values for |
11178 | this relocation according to whether we're relocating for | |
11179 | Thumb-2 or not. */ | |
11180 | bitsize = howto->bitsize; | |
5e866f5a | 11181 | if (!thumb2_bl) |
e95de063 | 11182 | bitsize -= 2; |
f6ebfac0 | 11183 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
11184 | reloc_signed_min = ~reloc_signed_max; |
11185 | ||
252b5132 | 11186 | /* Assumes two's complement. */ |
ba96a88f | 11187 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
b34976b6 | 11188 | overflow = TRUE; |
252b5132 | 11189 | |
bd97cb95 | 11190 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
11191 | /* For a BLX instruction, make sure that the relocation is rounded up |
11192 | to a word boundary. This follows the semantics of the instruction | |
11193 | which specifies that bit 1 of the target address will come from bit | |
11194 | 1 of the base address. */ | |
11195 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 11196 | |
e95de063 MS |
11197 | /* Put RELOCATION back into the insn. Assumes two's complement. |
11198 | We use the Thumb-2 encoding, which is safe even if dealing with | |
11199 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
99059e56 | 11200 | reloc_sign = (signed_check < 0) ? 1 : 0; |
e95de063 | 11201 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) |
99059e56 RM |
11202 | | ((relocation >> 12) & 0x3ff) |
11203 | | (reloc_sign << 10); | |
906e58ca | 11204 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
99059e56 RM |
11205 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
11206 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
11207 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 11208 | |
252b5132 RH |
11209 | /* Put the relocated value back in the object file: */ |
11210 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
11211 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11212 | ||
11213 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
11214 | } | |
11215 | break; | |
11216 | ||
c19d1205 ZW |
11217 | case R_ARM_THM_JUMP19: |
11218 | /* Thumb32 conditional branch instruction. */ | |
11219 | { | |
11220 | bfd_vma relocation; | |
11221 | bfd_boolean overflow = FALSE; | |
11222 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
11223 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
11224 | bfd_signed_vma reloc_signed_max = 0xffffe; |
11225 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 | 11226 | bfd_signed_vma signed_check; |
07d6d2b8 | 11227 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
c5423981 TG |
11228 | struct elf32_arm_stub_hash_entry *stub_entry; |
11229 | struct elf32_arm_link_hash_entry *hash; | |
c19d1205 ZW |
11230 | |
11231 | /* Need to refetch the addend, reconstruct the top three bits, | |
11232 | and squish the two 11 bit pieces together. */ | |
11233 | if (globals->use_rel) | |
11234 | { | |
11235 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 11236 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
11237 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
11238 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
11239 | bfd_vma lower = (lower_insn & 0x07ff); | |
11240 | ||
a00a1f35 MS |
11241 | upper |= J1 << 6; |
11242 | upper |= J2 << 7; | |
11243 | upper |= (!S) << 8; | |
c19d1205 ZW |
11244 | upper -= 0x0100; /* Sign extend. */ |
11245 | ||
11246 | addend = (upper << 12) | (lower << 1); | |
11247 | signed_addend = addend; | |
11248 | } | |
11249 | ||
bd97cb95 | 11250 | /* Handle calls via the PLT. */ |
34e77a92 | 11251 | if (plt_offset != (bfd_vma) -1) |
bd97cb95 DJ |
11252 | { |
11253 | value = (splt->output_section->vma | |
11254 | + splt->output_offset | |
34e77a92 | 11255 | + plt_offset); |
bd97cb95 DJ |
11256 | /* Target the Thumb stub before the ARM PLT entry. */ |
11257 | value -= PLT_THUMB_STUB_SIZE; | |
11258 | *unresolved_reloc_p = FALSE; | |
11259 | } | |
11260 | ||
c5423981 TG |
11261 | hash = (struct elf32_arm_link_hash_entry *)h; |
11262 | ||
11263 | stub_type = arm_type_of_stub (info, input_section, rel, | |
07d6d2b8 AM |
11264 | st_type, &branch_type, |
11265 | hash, value, sym_sec, | |
11266 | input_bfd, sym_name); | |
c5423981 TG |
11267 | if (stub_type != arm_stub_none) |
11268 | { | |
11269 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
07d6d2b8 AM |
11270 | sym_sec, h, |
11271 | rel, globals, | |
11272 | stub_type); | |
c5423981 TG |
11273 | if (stub_entry != NULL) |
11274 | { | |
07d6d2b8 AM |
11275 | value = (stub_entry->stub_offset |
11276 | + stub_entry->stub_sec->output_offset | |
11277 | + stub_entry->stub_sec->output_section->vma); | |
c5423981 TG |
11278 | } |
11279 | } | |
c19d1205 | 11280 | |
99059e56 | 11281 | relocation = value + signed_addend; |
c19d1205 ZW |
11282 | relocation -= (input_section->output_section->vma |
11283 | + input_section->output_offset | |
11284 | + rel->r_offset); | |
a00a1f35 | 11285 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 11286 | |
c19d1205 ZW |
11287 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
11288 | overflow = TRUE; | |
11289 | ||
11290 | /* Put RELOCATION back into the insn. */ | |
11291 | { | |
11292 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
11293 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
11294 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
11295 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
11296 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
11297 | ||
a00a1f35 | 11298 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
11299 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
11300 | } | |
11301 | ||
11302 | /* Put the relocated value back in the object file: */ | |
11303 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
11304 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11305 | ||
11306 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
11307 | } | |
11308 | ||
11309 | case R_ARM_THM_JUMP11: | |
11310 | case R_ARM_THM_JUMP8: | |
11311 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
11312 | /* Thumb B (branch) instruction). */ |
11313 | { | |
6cf9e9fe | 11314 | bfd_signed_vma relocation; |
51c5503b NC |
11315 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
11316 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
11317 | bfd_signed_vma signed_check; |
11318 | ||
c19d1205 ZW |
11319 | /* CZB cannot jump backward. */ |
11320 | if (r_type == R_ARM_THM_JUMP6) | |
11321 | reloc_signed_min = 0; | |
11322 | ||
4e7fd91e | 11323 | if (globals->use_rel) |
6cf9e9fe | 11324 | { |
4e7fd91e PB |
11325 | /* Need to refetch addend. */ |
11326 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
11327 | if (addend & ((howto->src_mask + 1) >> 1)) | |
11328 | { | |
11329 | signed_addend = -1; | |
11330 | signed_addend &= ~ howto->src_mask; | |
11331 | signed_addend |= addend; | |
11332 | } | |
11333 | else | |
11334 | signed_addend = addend; | |
11335 | /* The value in the insn has been right shifted. We need to | |
11336 | undo this, so that we can perform the address calculation | |
11337 | in terms of bytes. */ | |
11338 | signed_addend <<= howto->rightshift; | |
6cf9e9fe | 11339 | } |
6cf9e9fe | 11340 | relocation = value + signed_addend; |
51c5503b NC |
11341 | |
11342 | relocation -= (input_section->output_section->vma | |
11343 | + input_section->output_offset | |
11344 | + rel->r_offset); | |
11345 | ||
6cf9e9fe NC |
11346 | relocation >>= howto->rightshift; |
11347 | signed_check = relocation; | |
c19d1205 ZW |
11348 | |
11349 | if (r_type == R_ARM_THM_JUMP6) | |
11350 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
11351 | else | |
11352 | relocation &= howto->dst_mask; | |
51c5503b | 11353 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 11354 | |
51c5503b NC |
11355 | bfd_put_16 (input_bfd, relocation, hit_data); |
11356 | ||
11357 | /* Assumes two's complement. */ | |
11358 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
11359 | return bfd_reloc_overflow; | |
11360 | ||
11361 | return bfd_reloc_ok; | |
11362 | } | |
cedb70c5 | 11363 | |
8375c36b PB |
11364 | case R_ARM_ALU_PCREL7_0: |
11365 | case R_ARM_ALU_PCREL15_8: | |
11366 | case R_ARM_ALU_PCREL23_15: | |
11367 | { | |
11368 | bfd_vma insn; | |
11369 | bfd_vma relocation; | |
11370 | ||
11371 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
11372 | if (globals->use_rel) |
11373 | { | |
11374 | /* Extract the addend. */ | |
11375 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
11376 | signed_addend = addend; | |
11377 | } | |
8375c36b PB |
11378 | relocation = value + signed_addend; |
11379 | ||
11380 | relocation -= (input_section->output_section->vma | |
11381 | + input_section->output_offset | |
11382 | + rel->r_offset); | |
11383 | insn = (insn & ~0xfff) | |
11384 | | ((howto->bitpos << 7) & 0xf00) | |
11385 | | ((relocation >> howto->bitpos) & 0xff); | |
11386 | bfd_put_32 (input_bfd, value, hit_data); | |
11387 | } | |
11388 | return bfd_reloc_ok; | |
11389 | ||
252b5132 RH |
11390 | case R_ARM_GNU_VTINHERIT: |
11391 | case R_ARM_GNU_VTENTRY: | |
11392 | return bfd_reloc_ok; | |
11393 | ||
c19d1205 | 11394 | case R_ARM_GOTOFF32: |
252b5132 | 11395 | /* Relocation is relative to the start of the |
99059e56 | 11396 | global offset table. */ |
252b5132 RH |
11397 | |
11398 | BFD_ASSERT (sgot != NULL); | |
11399 | if (sgot == NULL) | |
99059e56 | 11400 | return bfd_reloc_notsupported; |
9a5aca8c | 11401 | |
cedb70c5 | 11402 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
11403 | address by one, so that attempts to call the function pointer will |
11404 | correctly interpret it as Thumb code. */ | |
35fc36a8 | 11405 | if (branch_type == ST_BRANCH_TO_THUMB) |
ee29b9fb RE |
11406 | value += 1; |
11407 | ||
252b5132 | 11408 | /* Note that sgot->output_offset is not involved in this |
99059e56 RM |
11409 | calculation. We always want the start of .got. If we |
11410 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
11411 | permitted by the ABI, we might have to change this | |
11412 | calculation. */ | |
252b5132 | 11413 | value -= sgot->output_section->vma; |
f21f3fe0 | 11414 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 11415 | contents, rel->r_offset, value, |
00a97672 | 11416 | rel->r_addend); |
252b5132 RH |
11417 | |
11418 | case R_ARM_GOTPC: | |
a7c10850 | 11419 | /* Use global offset table as symbol value. */ |
252b5132 | 11420 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 11421 | |
252b5132 | 11422 | if (sgot == NULL) |
99059e56 | 11423 | return bfd_reloc_notsupported; |
252b5132 | 11424 | |
0945cdfd | 11425 | *unresolved_reloc_p = FALSE; |
252b5132 | 11426 | value = sgot->output_section->vma; |
f21f3fe0 | 11427 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 11428 | contents, rel->r_offset, value, |
00a97672 | 11429 | rel->r_addend); |
f21f3fe0 | 11430 | |
252b5132 | 11431 | case R_ARM_GOT32: |
eb043451 | 11432 | case R_ARM_GOT_PREL: |
252b5132 | 11433 | /* Relocation is to the entry for this symbol in the |
99059e56 | 11434 | global offset table. */ |
252b5132 RH |
11435 | if (sgot == NULL) |
11436 | return bfd_reloc_notsupported; | |
f21f3fe0 | 11437 | |
34e77a92 RS |
11438 | if (dynreloc_st_type == STT_GNU_IFUNC |
11439 | && plt_offset != (bfd_vma) -1 | |
11440 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) | |
11441 | { | |
11442 | /* We have a relocation against a locally-binding STT_GNU_IFUNC | |
11443 | symbol, and the relocation resolves directly to the runtime | |
11444 | target rather than to the .iplt entry. This means that any | |
11445 | .got entry would be the same value as the .igot.plt entry, | |
11446 | so there's no point creating both. */ | |
11447 | sgot = globals->root.igotplt; | |
11448 | value = sgot->output_offset + gotplt_offset; | |
11449 | } | |
11450 | else if (h != NULL) | |
252b5132 RH |
11451 | { |
11452 | bfd_vma off; | |
f21f3fe0 | 11453 | |
252b5132 RH |
11454 | off = h->got.offset; |
11455 | BFD_ASSERT (off != (bfd_vma) -1); | |
b436d854 | 11456 | if ((off & 1) != 0) |
252b5132 | 11457 | { |
b436d854 RS |
11458 | /* We have already processsed one GOT relocation against |
11459 | this symbol. */ | |
11460 | off &= ~1; | |
11461 | if (globals->root.dynamic_sections_created | |
11462 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
11463 | *unresolved_reloc_p = FALSE; | |
11464 | } | |
11465 | else | |
11466 | { | |
11467 | Elf_Internal_Rela outrel; | |
e8b09b87 | 11468 | int isrofixup = 0; |
b436d854 | 11469 | |
e8b09b87 CL |
11470 | if (((h->dynindx != -1) || globals->fdpic_p) |
11471 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
b436d854 RS |
11472 | { |
11473 | /* If the symbol doesn't resolve locally in a static | |
11474 | object, we have an undefined reference. If the | |
11475 | symbol doesn't resolve locally in a dynamic object, | |
11476 | it should be resolved by the dynamic linker. */ | |
11477 | if (globals->root.dynamic_sections_created) | |
11478 | { | |
11479 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); | |
11480 | *unresolved_reloc_p = FALSE; | |
11481 | } | |
11482 | else | |
11483 | outrel.r_info = 0; | |
11484 | outrel.r_addend = 0; | |
11485 | } | |
252b5132 RH |
11486 | else |
11487 | { | |
34e77a92 | 11488 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 11489 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
5025eb7c AO |
11490 | else if (bfd_link_pic (info) |
11491 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
11492 | || h->root.type != bfd_link_hash_undefweak)) | |
99059e56 | 11493 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
e8b09b87 CL |
11494 | else if (globals->fdpic_p) |
11495 | isrofixup = 1; | |
99059e56 RM |
11496 | else |
11497 | outrel.r_info = 0; | |
34e77a92 | 11498 | outrel.r_addend = dynreloc_value; |
b436d854 | 11499 | } |
ee29b9fb | 11500 | |
b436d854 RS |
11501 | /* The GOT entry is initialized to zero by default. |
11502 | See if we should install a different value. */ | |
11503 | if (outrel.r_addend != 0 | |
e8b09b87 | 11504 | && (outrel.r_info == 0 || globals->use_rel || isrofixup)) |
b436d854 RS |
11505 | { |
11506 | bfd_put_32 (output_bfd, outrel.r_addend, | |
11507 | sgot->contents + off); | |
11508 | outrel.r_addend = 0; | |
252b5132 | 11509 | } |
f21f3fe0 | 11510 | |
e8b09b87 | 11511 | if (outrel.r_info != 0 && !isrofixup) |
b436d854 RS |
11512 | { |
11513 | outrel.r_offset = (sgot->output_section->vma | |
11514 | + sgot->output_offset | |
11515 | + off); | |
11516 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
11517 | } | |
e8b09b87 CL |
11518 | else if (isrofixup) |
11519 | { | |
11520 | arm_elf_add_rofixup(output_bfd, | |
11521 | elf32_arm_hash_table(info)->srofixup, | |
11522 | sgot->output_section->vma | |
11523 | + sgot->output_offset + off); | |
11524 | } | |
b436d854 RS |
11525 | h->got.offset |= 1; |
11526 | } | |
252b5132 RH |
11527 | value = sgot->output_offset + off; |
11528 | } | |
11529 | else | |
11530 | { | |
11531 | bfd_vma off; | |
f21f3fe0 | 11532 | |
5025eb7c AO |
11533 | BFD_ASSERT (local_got_offsets != NULL |
11534 | && local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 11535 | |
252b5132 | 11536 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 11537 | |
252b5132 RH |
11538 | /* The offset must always be a multiple of 4. We use the |
11539 | least significant bit to record whether we have already | |
9b485d32 | 11540 | generated the necessary reloc. */ |
252b5132 RH |
11541 | if ((off & 1) != 0) |
11542 | off &= ~1; | |
11543 | else | |
11544 | { | |
00a97672 | 11545 | if (globals->use_rel) |
34e77a92 | 11546 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); |
f21f3fe0 | 11547 | |
0e1862bb | 11548 | if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC) |
252b5132 | 11549 | { |
947216bf | 11550 | Elf_Internal_Rela outrel; |
f21f3fe0 | 11551 | |
34e77a92 | 11552 | outrel.r_addend = addend + dynreloc_value; |
252b5132 | 11553 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 11554 | + sgot->output_offset |
252b5132 | 11555 | + off); |
34e77a92 | 11556 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 11557 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
34e77a92 RS |
11558 | else |
11559 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
47beaa6a | 11560 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
252b5132 | 11561 | } |
e8b09b87 CL |
11562 | else if (globals->fdpic_p) |
11563 | { | |
11564 | /* For FDPIC executables, we use rofixup to fix | |
11565 | address at runtime. */ | |
11566 | arm_elf_add_rofixup(output_bfd, globals->srofixup, | |
11567 | sgot->output_section->vma + sgot->output_offset | |
11568 | + off); | |
11569 | } | |
f21f3fe0 | 11570 | |
252b5132 RH |
11571 | local_got_offsets[r_symndx] |= 1; |
11572 | } | |
f21f3fe0 | 11573 | |
252b5132 RH |
11574 | value = sgot->output_offset + off; |
11575 | } | |
eb043451 PB |
11576 | if (r_type != R_ARM_GOT32) |
11577 | value += sgot->output_section->vma; | |
9a5aca8c | 11578 | |
f21f3fe0 | 11579 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 11580 | contents, rel->r_offset, value, |
00a97672 | 11581 | rel->r_addend); |
f21f3fe0 | 11582 | |
ba93b8ac DJ |
11583 | case R_ARM_TLS_LDO32: |
11584 | value = value - dtpoff_base (info); | |
11585 | ||
11586 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
11587 | contents, rel->r_offset, value, |
11588 | rel->r_addend); | |
ba93b8ac DJ |
11589 | |
11590 | case R_ARM_TLS_LDM32: | |
5c5a4843 | 11591 | case R_ARM_TLS_LDM32_FDPIC: |
ba93b8ac DJ |
11592 | { |
11593 | bfd_vma off; | |
11594 | ||
362d30a1 | 11595 | if (sgot == NULL) |
ba93b8ac DJ |
11596 | abort (); |
11597 | ||
11598 | off = globals->tls_ldm_got.offset; | |
11599 | ||
11600 | if ((off & 1) != 0) | |
11601 | off &= ~1; | |
11602 | else | |
11603 | { | |
11604 | /* If we don't know the module number, create a relocation | |
11605 | for it. */ | |
0e1862bb | 11606 | if (bfd_link_pic (info)) |
ba93b8ac DJ |
11607 | { |
11608 | Elf_Internal_Rela outrel; | |
ba93b8ac | 11609 | |
362d30a1 | 11610 | if (srelgot == NULL) |
ba93b8ac DJ |
11611 | abort (); |
11612 | ||
00a97672 | 11613 | outrel.r_addend = 0; |
362d30a1 RS |
11614 | outrel.r_offset = (sgot->output_section->vma |
11615 | + sgot->output_offset + off); | |
ba93b8ac DJ |
11616 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
11617 | ||
00a97672 RS |
11618 | if (globals->use_rel) |
11619 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11620 | sgot->contents + off); |
ba93b8ac | 11621 | |
47beaa6a | 11622 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11623 | } |
11624 | else | |
362d30a1 | 11625 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
ba93b8ac DJ |
11626 | |
11627 | globals->tls_ldm_got.offset |= 1; | |
11628 | } | |
11629 | ||
5c5a4843 | 11630 | if (r_type == R_ARM_TLS_LDM32_FDPIC) |
e8b09b87 CL |
11631 | { |
11632 | bfd_put_32(output_bfd, | |
11633 | globals->root.sgot->output_offset + off, | |
11634 | contents + rel->r_offset); | |
11635 | ||
11636 | return bfd_reloc_ok; | |
11637 | } | |
11638 | else | |
11639 | { | |
11640 | value = sgot->output_section->vma + sgot->output_offset + off | |
11641 | - (input_section->output_section->vma | |
11642 | + input_section->output_offset + rel->r_offset); | |
ba93b8ac | 11643 | |
e8b09b87 CL |
11644 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
11645 | contents, rel->r_offset, value, | |
11646 | rel->r_addend); | |
11647 | } | |
ba93b8ac DJ |
11648 | } |
11649 | ||
0855e32b NS |
11650 | case R_ARM_TLS_CALL: |
11651 | case R_ARM_THM_TLS_CALL: | |
ba93b8ac | 11652 | case R_ARM_TLS_GD32: |
5c5a4843 | 11653 | case R_ARM_TLS_GD32_FDPIC: |
ba93b8ac | 11654 | case R_ARM_TLS_IE32: |
5c5a4843 | 11655 | case R_ARM_TLS_IE32_FDPIC: |
0855e32b NS |
11656 | case R_ARM_TLS_GOTDESC: |
11657 | case R_ARM_TLS_DESCSEQ: | |
11658 | case R_ARM_THM_TLS_DESCSEQ: | |
ba93b8ac | 11659 | { |
0855e32b NS |
11660 | bfd_vma off, offplt; |
11661 | int indx = 0; | |
ba93b8ac DJ |
11662 | char tls_type; |
11663 | ||
0855e32b | 11664 | BFD_ASSERT (sgot != NULL); |
ba93b8ac | 11665 | |
ba93b8ac DJ |
11666 | if (h != NULL) |
11667 | { | |
11668 | bfd_boolean dyn; | |
11669 | dyn = globals->root.dynamic_sections_created; | |
0e1862bb L |
11670 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
11671 | bfd_link_pic (info), | |
11672 | h) | |
11673 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
11674 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
11675 | { | |
11676 | *unresolved_reloc_p = FALSE; | |
11677 | indx = h->dynindx; | |
11678 | } | |
11679 | off = h->got.offset; | |
0855e32b | 11680 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
ba93b8ac DJ |
11681 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
11682 | } | |
11683 | else | |
11684 | { | |
0855e32b | 11685 | BFD_ASSERT (local_got_offsets != NULL); |
ba93b8ac | 11686 | off = local_got_offsets[r_symndx]; |
0855e32b | 11687 | offplt = local_tlsdesc_gotents[r_symndx]; |
ba93b8ac DJ |
11688 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
11689 | } | |
11690 | ||
0855e32b | 11691 | /* Linker relaxations happens from one of the |
b38cadfb | 11692 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ |
0855e32b | 11693 | if (ELF32_R_TYPE(rel->r_info) != r_type) |
b38cadfb | 11694 | tls_type = GOT_TLS_IE; |
0855e32b NS |
11695 | |
11696 | BFD_ASSERT (tls_type != GOT_UNKNOWN); | |
ba93b8ac DJ |
11697 | |
11698 | if ((off & 1) != 0) | |
11699 | off &= ~1; | |
11700 | else | |
11701 | { | |
11702 | bfd_boolean need_relocs = FALSE; | |
11703 | Elf_Internal_Rela outrel; | |
ba93b8ac DJ |
11704 | int cur_off = off; |
11705 | ||
11706 | /* The GOT entries have not been initialized yet. Do it | |
11707 | now, and emit any relocations. If both an IE GOT and a | |
11708 | GD GOT are necessary, we emit the GD first. */ | |
11709 | ||
0e1862bb | 11710 | if ((bfd_link_pic (info) || indx != 0) |
ba93b8ac | 11711 | && (h == NULL |
95b03e4a L |
11712 | || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
11713 | && !resolved_to_zero) | |
ba93b8ac DJ |
11714 | || h->root.type != bfd_link_hash_undefweak)) |
11715 | { | |
11716 | need_relocs = TRUE; | |
0855e32b | 11717 | BFD_ASSERT (srelgot != NULL); |
ba93b8ac DJ |
11718 | } |
11719 | ||
0855e32b NS |
11720 | if (tls_type & GOT_TLS_GDESC) |
11721 | { | |
47beaa6a RS |
11722 | bfd_byte *loc; |
11723 | ||
0855e32b NS |
11724 | /* We should have relaxed, unless this is an undefined |
11725 | weak symbol. */ | |
11726 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) | |
0e1862bb | 11727 | || bfd_link_pic (info)); |
0855e32b | 11728 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 |
99059e56 | 11729 | <= globals->root.sgotplt->size); |
0855e32b NS |
11730 | |
11731 | outrel.r_addend = 0; | |
11732 | outrel.r_offset = (globals->root.sgotplt->output_section->vma | |
11733 | + globals->root.sgotplt->output_offset | |
11734 | + offplt | |
11735 | + globals->sgotplt_jump_table_size); | |
b38cadfb | 11736 | |
0855e32b NS |
11737 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); |
11738 | sreloc = globals->root.srelplt; | |
11739 | loc = sreloc->contents; | |
11740 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); | |
11741 | BFD_ASSERT (loc + RELOC_SIZE (globals) | |
99059e56 | 11742 | <= sreloc->contents + sreloc->size); |
0855e32b NS |
11743 | |
11744 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
11745 | ||
11746 | /* For globals, the first word in the relocation gets | |
11747 | the relocation index and the top bit set, or zero, | |
11748 | if we're binding now. For locals, it gets the | |
11749 | symbol's offset in the tls section. */ | |
99059e56 | 11750 | bfd_put_32 (output_bfd, |
0855e32b NS |
11751 | !h ? value - elf_hash_table (info)->tls_sec->vma |
11752 | : info->flags & DF_BIND_NOW ? 0 | |
11753 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), | |
b38cadfb NC |
11754 | globals->root.sgotplt->contents + offplt |
11755 | + globals->sgotplt_jump_table_size); | |
11756 | ||
0855e32b | 11757 | /* Second word in the relocation is always zero. */ |
99059e56 | 11758 | bfd_put_32 (output_bfd, 0, |
b38cadfb NC |
11759 | globals->root.sgotplt->contents + offplt |
11760 | + globals->sgotplt_jump_table_size + 4); | |
0855e32b | 11761 | } |
ba93b8ac DJ |
11762 | if (tls_type & GOT_TLS_GD) |
11763 | { | |
11764 | if (need_relocs) | |
11765 | { | |
00a97672 | 11766 | outrel.r_addend = 0; |
362d30a1 RS |
11767 | outrel.r_offset = (sgot->output_section->vma |
11768 | + sgot->output_offset | |
00a97672 | 11769 | + cur_off); |
ba93b8ac | 11770 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 11771 | |
00a97672 RS |
11772 | if (globals->use_rel) |
11773 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11774 | sgot->contents + cur_off); |
00a97672 | 11775 | |
47beaa6a | 11776 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11777 | |
11778 | if (indx == 0) | |
11779 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
362d30a1 | 11780 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
11781 | else |
11782 | { | |
00a97672 | 11783 | outrel.r_addend = 0; |
ba93b8ac DJ |
11784 | outrel.r_info = ELF32_R_INFO (indx, |
11785 | R_ARM_TLS_DTPOFF32); | |
11786 | outrel.r_offset += 4; | |
00a97672 RS |
11787 | |
11788 | if (globals->use_rel) | |
11789 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11790 | sgot->contents + cur_off + 4); |
00a97672 | 11791 | |
47beaa6a RS |
11792 | elf32_arm_add_dynreloc (output_bfd, info, |
11793 | srelgot, &outrel); | |
ba93b8ac DJ |
11794 | } |
11795 | } | |
11796 | else | |
11797 | { | |
11798 | /* If we are not emitting relocations for a | |
11799 | general dynamic reference, then we must be in a | |
11800 | static link or an executable link with the | |
11801 | symbol binding locally. Mark it as belonging | |
11802 | to module 1, the executable. */ | |
11803 | bfd_put_32 (output_bfd, 1, | |
362d30a1 | 11804 | sgot->contents + cur_off); |
ba93b8ac | 11805 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
362d30a1 | 11806 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
11807 | } |
11808 | ||
11809 | cur_off += 8; | |
11810 | } | |
11811 | ||
11812 | if (tls_type & GOT_TLS_IE) | |
11813 | { | |
11814 | if (need_relocs) | |
11815 | { | |
00a97672 RS |
11816 | if (indx == 0) |
11817 | outrel.r_addend = value - dtpoff_base (info); | |
11818 | else | |
11819 | outrel.r_addend = 0; | |
362d30a1 RS |
11820 | outrel.r_offset = (sgot->output_section->vma |
11821 | + sgot->output_offset | |
ba93b8ac DJ |
11822 | + cur_off); |
11823 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
11824 | ||
00a97672 RS |
11825 | if (globals->use_rel) |
11826 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11827 | sgot->contents + cur_off); |
ba93b8ac | 11828 | |
47beaa6a | 11829 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11830 | } |
11831 | else | |
11832 | bfd_put_32 (output_bfd, tpoff (info, value), | |
362d30a1 | 11833 | sgot->contents + cur_off); |
ba93b8ac DJ |
11834 | cur_off += 4; |
11835 | } | |
11836 | ||
11837 | if (h != NULL) | |
11838 | h->got.offset |= 1; | |
11839 | else | |
11840 | local_got_offsets[r_symndx] |= 1; | |
11841 | } | |
11842 | ||
5c5a4843 | 11843 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC) |
ba93b8ac | 11844 | off += 8; |
0855e32b NS |
11845 | else if (tls_type & GOT_TLS_GDESC) |
11846 | off = offplt; | |
11847 | ||
11848 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL | |
11849 | || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) | |
11850 | { | |
11851 | bfd_signed_vma offset; | |
12352d3f PB |
11852 | /* TLS stubs are arm mode. The original symbol is a |
11853 | data object, so branch_type is bogus. */ | |
11854 | branch_type = ST_BRANCH_TO_ARM; | |
0855e32b | 11855 | enum elf32_arm_stub_type stub_type |
34e77a92 RS |
11856 | = arm_type_of_stub (info, input_section, rel, |
11857 | st_type, &branch_type, | |
0855e32b NS |
11858 | (struct elf32_arm_link_hash_entry *)h, |
11859 | globals->tls_trampoline, globals->root.splt, | |
11860 | input_bfd, sym_name); | |
11861 | ||
11862 | if (stub_type != arm_stub_none) | |
11863 | { | |
11864 | struct elf32_arm_stub_hash_entry *stub_entry | |
11865 | = elf32_arm_get_stub_entry | |
11866 | (input_section, globals->root.splt, 0, rel, | |
11867 | globals, stub_type); | |
11868 | offset = (stub_entry->stub_offset | |
11869 | + stub_entry->stub_sec->output_offset | |
11870 | + stub_entry->stub_sec->output_section->vma); | |
11871 | } | |
11872 | else | |
11873 | offset = (globals->root.splt->output_section->vma | |
11874 | + globals->root.splt->output_offset | |
11875 | + globals->tls_trampoline); | |
11876 | ||
11877 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL) | |
11878 | { | |
11879 | unsigned long inst; | |
b38cadfb NC |
11880 | |
11881 | offset -= (input_section->output_section->vma | |
11882 | + input_section->output_offset | |
11883 | + rel->r_offset + 8); | |
0855e32b NS |
11884 | |
11885 | inst = offset >> 2; | |
11886 | inst &= 0x00ffffff; | |
11887 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); | |
11888 | } | |
11889 | else | |
11890 | { | |
11891 | /* Thumb blx encodes the offset in a complicated | |
11892 | fashion. */ | |
11893 | unsigned upper_insn, lower_insn; | |
11894 | unsigned neg; | |
11895 | ||
b38cadfb NC |
11896 | offset -= (input_section->output_section->vma |
11897 | + input_section->output_offset | |
0855e32b | 11898 | + rel->r_offset + 4); |
b38cadfb | 11899 | |
12352d3f PB |
11900 | if (stub_type != arm_stub_none |
11901 | && arm_stub_is_thumb (stub_type)) | |
11902 | { | |
11903 | lower_insn = 0xd000; | |
11904 | } | |
11905 | else | |
11906 | { | |
11907 | lower_insn = 0xc000; | |
6a631e86 | 11908 | /* Round up the offset to a word boundary. */ |
12352d3f PB |
11909 | offset = (offset + 2) & ~2; |
11910 | } | |
11911 | ||
0855e32b NS |
11912 | neg = offset < 0; |
11913 | upper_insn = (0xf000 | |
11914 | | ((offset >> 12) & 0x3ff) | |
11915 | | (neg << 10)); | |
12352d3f | 11916 | lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) |
0855e32b | 11917 | | (((!((offset >> 22) & 1)) ^ neg) << 11) |
12352d3f | 11918 | | ((offset >> 1) & 0x7ff); |
0855e32b NS |
11919 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
11920 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11921 | return bfd_reloc_ok; | |
11922 | } | |
11923 | } | |
11924 | /* These relocations needs special care, as besides the fact | |
11925 | they point somewhere in .gotplt, the addend must be | |
11926 | adjusted accordingly depending on the type of instruction | |
6a631e86 | 11927 | we refer to. */ |
0855e32b NS |
11928 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) |
11929 | { | |
11930 | unsigned long data, insn; | |
11931 | unsigned thumb; | |
b38cadfb | 11932 | |
0855e32b NS |
11933 | data = bfd_get_32 (input_bfd, hit_data); |
11934 | thumb = data & 1; | |
11935 | data &= ~1u; | |
b38cadfb | 11936 | |
0855e32b NS |
11937 | if (thumb) |
11938 | { | |
11939 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); | |
11940 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
11941 | insn = (insn << 16) | |
11942 | | bfd_get_16 (input_bfd, | |
11943 | contents + rel->r_offset - data + 2); | |
11944 | if ((insn & 0xf800c000) == 0xf000c000) | |
11945 | /* bl/blx */ | |
11946 | value = -6; | |
11947 | else if ((insn & 0xffffff00) == 0x4400) | |
11948 | /* add */ | |
11949 | value = -5; | |
11950 | else | |
11951 | { | |
4eca0228 | 11952 | _bfd_error_handler |
695344c0 | 11953 | /* xgettext:c-format */ |
2dcf00ce | 11954 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f | 11955 | "unexpected %s instruction '%#lx' " |
2dcf00ce AM |
11956 | "referenced by TLS_GOTDESC"), |
11957 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
90b6238f | 11958 | "Thumb", insn); |
0855e32b NS |
11959 | return bfd_reloc_notsupported; |
11960 | } | |
11961 | } | |
11962 | else | |
11963 | { | |
11964 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); | |
11965 | ||
11966 | switch (insn >> 24) | |
11967 | { | |
11968 | case 0xeb: /* bl */ | |
11969 | case 0xfa: /* blx */ | |
11970 | value = -4; | |
11971 | break; | |
11972 | ||
11973 | case 0xe0: /* add */ | |
11974 | value = -8; | |
11975 | break; | |
b38cadfb | 11976 | |
0855e32b | 11977 | default: |
4eca0228 | 11978 | _bfd_error_handler |
695344c0 | 11979 | /* xgettext:c-format */ |
2dcf00ce | 11980 | (_("%pB(%pA+%#" PRIx64 "): " |
90b6238f | 11981 | "unexpected %s instruction '%#lx' " |
2dcf00ce AM |
11982 | "referenced by TLS_GOTDESC"), |
11983 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
90b6238f | 11984 | "ARM", insn); |
0855e32b NS |
11985 | return bfd_reloc_notsupported; |
11986 | } | |
11987 | } | |
b38cadfb | 11988 | |
0855e32b NS |
11989 | value += ((globals->root.sgotplt->output_section->vma |
11990 | + globals->root.sgotplt->output_offset + off) | |
11991 | - (input_section->output_section->vma | |
11992 | + input_section->output_offset | |
11993 | + rel->r_offset) | |
11994 | + globals->sgotplt_jump_table_size); | |
11995 | } | |
11996 | else | |
11997 | value = ((globals->root.sgot->output_section->vma | |
11998 | + globals->root.sgot->output_offset + off) | |
11999 | - (input_section->output_section->vma | |
12000 | + input_section->output_offset + rel->r_offset)); | |
ba93b8ac | 12001 | |
5c5a4843 CL |
12002 | if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC || |
12003 | r_type == R_ARM_TLS_IE32_FDPIC)) | |
e8b09b87 CL |
12004 | { |
12005 | /* For FDPIC relocations, resolve to the offset of the GOT | |
12006 | entry from the start of GOT. */ | |
12007 | bfd_put_32(output_bfd, | |
12008 | globals->root.sgot->output_offset + off, | |
12009 | contents + rel->r_offset); | |
12010 | ||
12011 | return bfd_reloc_ok; | |
12012 | } | |
12013 | else | |
12014 | { | |
12015 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
12016 | contents, rel->r_offset, value, | |
12017 | rel->r_addend); | |
12018 | } | |
ba93b8ac DJ |
12019 | } |
12020 | ||
12021 | case R_ARM_TLS_LE32: | |
3cbc1e5e | 12022 | if (bfd_link_dll (info)) |
ba93b8ac | 12023 | { |
4eca0228 | 12024 | _bfd_error_handler |
695344c0 | 12025 | /* xgettext:c-format */ |
2dcf00ce AM |
12026 | (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted " |
12027 | "in shared object"), | |
12028 | input_bfd, input_section, (uint64_t) rel->r_offset, howto->name); | |
46691134 | 12029 | return bfd_reloc_notsupported; |
ba93b8ac DJ |
12030 | } |
12031 | else | |
12032 | value = tpoff (info, value); | |
906e58ca | 12033 | |
ba93b8ac | 12034 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
12035 | contents, rel->r_offset, value, |
12036 | rel->r_addend); | |
ba93b8ac | 12037 | |
319850b4 JB |
12038 | case R_ARM_V4BX: |
12039 | if (globals->fix_v4bx) | |
845b51d6 PB |
12040 | { |
12041 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 12042 | |
845b51d6 PB |
12043 | /* Ensure that we have a BX instruction. */ |
12044 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 12045 | |
845b51d6 PB |
12046 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
12047 | { | |
12048 | /* Branch to veneer. */ | |
12049 | bfd_vma glue_addr; | |
12050 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
12051 | glue_addr -= input_section->output_section->vma | |
12052 | + input_section->output_offset | |
12053 | + rel->r_offset + 8; | |
12054 | insn = (insn & 0xf0000000) | 0x0a000000 | |
12055 | | ((glue_addr >> 2) & 0x00ffffff); | |
12056 | } | |
12057 | else | |
12058 | { | |
12059 | /* Preserve Rm (lowest four bits) and the condition code | |
12060 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
12061 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
12062 | } | |
319850b4 | 12063 | |
845b51d6 PB |
12064 | bfd_put_32 (input_bfd, insn, hit_data); |
12065 | } | |
319850b4 JB |
12066 | return bfd_reloc_ok; |
12067 | ||
b6895b4f PB |
12068 | case R_ARM_MOVW_ABS_NC: |
12069 | case R_ARM_MOVT_ABS: | |
12070 | case R_ARM_MOVW_PREL_NC: | |
12071 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
12072 | /* Until we properly support segment-base-relative addressing then |
12073 | we assume the segment base to be zero, as for the group relocations. | |
12074 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
12075 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
12076 | case R_ARM_MOVW_BREL_NC: | |
12077 | case R_ARM_MOVW_BREL: | |
12078 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
12079 | { |
12080 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
12081 | ||
12082 | if (globals->use_rel) | |
12083 | { | |
12084 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 12085 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 12086 | } |
92f5d02b | 12087 | |
b6895b4f | 12088 | value += signed_addend; |
b6895b4f PB |
12089 | |
12090 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
12091 | value -= (input_section->output_section->vma | |
12092 | + input_section->output_offset + rel->r_offset); | |
12093 | ||
92f5d02b | 12094 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
99059e56 | 12095 | return bfd_reloc_overflow; |
92f5d02b | 12096 | |
35fc36a8 | 12097 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
12098 | value |= 1; |
12099 | ||
12100 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
99059e56 | 12101 | || r_type == R_ARM_MOVT_BREL) |
b6895b4f PB |
12102 | value >>= 16; |
12103 | ||
12104 | insn &= 0xfff0f000; | |
12105 | insn |= value & 0xfff; | |
12106 | insn |= (value & 0xf000) << 4; | |
12107 | bfd_put_32 (input_bfd, insn, hit_data); | |
12108 | } | |
12109 | return bfd_reloc_ok; | |
12110 | ||
12111 | case R_ARM_THM_MOVW_ABS_NC: | |
12112 | case R_ARM_THM_MOVT_ABS: | |
12113 | case R_ARM_THM_MOVW_PREL_NC: | |
12114 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
12115 | /* Until we properly support segment-base-relative addressing then |
12116 | we assume the segment base to be zero, as for the above relocations. | |
12117 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
12118 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
12119 | as R_ARM_THM_MOVT_ABS. */ | |
12120 | case R_ARM_THM_MOVW_BREL_NC: | |
12121 | case R_ARM_THM_MOVW_BREL: | |
12122 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
12123 | { |
12124 | bfd_vma insn; | |
906e58ca | 12125 | |
b6895b4f PB |
12126 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
12127 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
12128 | ||
12129 | if (globals->use_rel) | |
12130 | { | |
12131 | addend = ((insn >> 4) & 0xf000) | |
12132 | | ((insn >> 15) & 0x0800) | |
12133 | | ((insn >> 4) & 0x0700) | |
07d6d2b8 | 12134 | | (insn & 0x00ff); |
39623e12 | 12135 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 12136 | } |
92f5d02b | 12137 | |
b6895b4f | 12138 | value += signed_addend; |
b6895b4f PB |
12139 | |
12140 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
12141 | value -= (input_section->output_section->vma | |
12142 | + input_section->output_offset + rel->r_offset); | |
12143 | ||
92f5d02b | 12144 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
99059e56 | 12145 | return bfd_reloc_overflow; |
92f5d02b | 12146 | |
35fc36a8 | 12147 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
12148 | value |= 1; |
12149 | ||
12150 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
99059e56 | 12151 | || r_type == R_ARM_THM_MOVT_BREL) |
b6895b4f PB |
12152 | value >>= 16; |
12153 | ||
12154 | insn &= 0xfbf08f00; | |
12155 | insn |= (value & 0xf000) << 4; | |
12156 | insn |= (value & 0x0800) << 15; | |
12157 | insn |= (value & 0x0700) << 4; | |
12158 | insn |= (value & 0x00ff); | |
12159 | ||
12160 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
12161 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
12162 | } | |
12163 | return bfd_reloc_ok; | |
12164 | ||
4962c51a MS |
12165 | case R_ARM_ALU_PC_G0_NC: |
12166 | case R_ARM_ALU_PC_G1_NC: | |
12167 | case R_ARM_ALU_PC_G0: | |
12168 | case R_ARM_ALU_PC_G1: | |
12169 | case R_ARM_ALU_PC_G2: | |
12170 | case R_ARM_ALU_SB_G0_NC: | |
12171 | case R_ARM_ALU_SB_G1_NC: | |
12172 | case R_ARM_ALU_SB_G0: | |
12173 | case R_ARM_ALU_SB_G1: | |
12174 | case R_ARM_ALU_SB_G2: | |
12175 | { | |
12176 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12177 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12178 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12179 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12180 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 RM |
12181 | bfd_vma residual; |
12182 | bfd_vma g_n; | |
4962c51a | 12183 | bfd_signed_vma signed_value; |
99059e56 RM |
12184 | int group = 0; |
12185 | ||
12186 | /* Determine which group of bits to select. */ | |
12187 | switch (r_type) | |
12188 | { | |
12189 | case R_ARM_ALU_PC_G0_NC: | |
12190 | case R_ARM_ALU_PC_G0: | |
12191 | case R_ARM_ALU_SB_G0_NC: | |
12192 | case R_ARM_ALU_SB_G0: | |
12193 | group = 0; | |
12194 | break; | |
12195 | ||
12196 | case R_ARM_ALU_PC_G1_NC: | |
12197 | case R_ARM_ALU_PC_G1: | |
12198 | case R_ARM_ALU_SB_G1_NC: | |
12199 | case R_ARM_ALU_SB_G1: | |
12200 | group = 1; | |
12201 | break; | |
12202 | ||
12203 | case R_ARM_ALU_PC_G2: | |
12204 | case R_ARM_ALU_SB_G2: | |
12205 | group = 2; | |
12206 | break; | |
12207 | ||
12208 | default: | |
12209 | abort (); | |
12210 | } | |
12211 | ||
12212 | /* If REL, extract the addend from the insn. If RELA, it will | |
12213 | have already been fetched for us. */ | |
4962c51a | 12214 | if (globals->use_rel) |
99059e56 RM |
12215 | { |
12216 | int negative; | |
12217 | bfd_vma constant = insn & 0xff; | |
12218 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
12219 | ||
12220 | if (rotation == 0) | |
12221 | signed_addend = constant; | |
12222 | else | |
12223 | { | |
12224 | /* Compensate for the fact that in the instruction, the | |
12225 | rotation is stored in multiples of 2 bits. */ | |
12226 | rotation *= 2; | |
12227 | ||
12228 | /* Rotate "constant" right by "rotation" bits. */ | |
12229 | signed_addend = (constant >> rotation) | | |
12230 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
12231 | } | |
12232 | ||
12233 | /* Determine if the instruction is an ADD or a SUB. | |
12234 | (For REL, this determines the sign of the addend.) */ | |
12235 | negative = identify_add_or_sub (insn); | |
12236 | if (negative == 0) | |
12237 | { | |
4eca0228 | 12238 | _bfd_error_handler |
695344c0 | 12239 | /* xgettext:c-format */ |
90b6238f | 12240 | (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions " |
2dcf00ce AM |
12241 | "are allowed for ALU group relocations"), |
12242 | input_bfd, input_section, (uint64_t) rel->r_offset); | |
99059e56 RM |
12243 | return bfd_reloc_overflow; |
12244 | } | |
12245 | ||
12246 | signed_addend *= negative; | |
12247 | } | |
4962c51a MS |
12248 | |
12249 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12250 | if (r_type == R_ARM_ALU_PC_G0_NC |
12251 | || r_type == R_ARM_ALU_PC_G1_NC | |
12252 | || r_type == R_ARM_ALU_PC_G0 | |
12253 | || r_type == R_ARM_ALU_PC_G1 | |
12254 | || r_type == R_ARM_ALU_PC_G2) | |
12255 | /* PC relative. */ | |
12256 | signed_value = value - pc + signed_addend; | |
12257 | else | |
12258 | /* Section base relative. */ | |
12259 | signed_value = value - sb + signed_addend; | |
12260 | ||
12261 | /* If the target symbol is a Thumb function, then set the | |
12262 | Thumb bit in the address. */ | |
35fc36a8 | 12263 | if (branch_type == ST_BRANCH_TO_THUMB) |
4962c51a MS |
12264 | signed_value |= 1; |
12265 | ||
99059e56 RM |
12266 | /* Calculate the value of the relevant G_n, in encoded |
12267 | constant-with-rotation format. */ | |
b6518b38 NC |
12268 | g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12269 | group, &residual); | |
99059e56 RM |
12270 | |
12271 | /* Check for overflow if required. */ | |
12272 | if ((r_type == R_ARM_ALU_PC_G0 | |
12273 | || r_type == R_ARM_ALU_PC_G1 | |
12274 | || r_type == R_ARM_ALU_PC_G2 | |
12275 | || r_type == R_ARM_ALU_SB_G0 | |
12276 | || r_type == R_ARM_ALU_SB_G1 | |
12277 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
12278 | { | |
4eca0228 | 12279 | _bfd_error_handler |
695344c0 | 12280 | /* xgettext:c-format */ |
90b6238f | 12281 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12282 | "splitting %#" PRIx64 " for group relocation %s"), |
12283 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12284 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12285 | howto->name); | |
99059e56 RM |
12286 | return bfd_reloc_overflow; |
12287 | } | |
12288 | ||
12289 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
12290 | not to destroy the S bit. */ | |
12291 | insn &= 0xff1ff000; | |
12292 | ||
12293 | /* Set the opcode according to whether the value to go in the | |
12294 | place is negative. */ | |
12295 | if (signed_value < 0) | |
12296 | insn |= 1 << 22; | |
12297 | else | |
12298 | insn |= 1 << 23; | |
12299 | ||
12300 | /* Encode the offset. */ | |
12301 | insn |= g_n; | |
4962c51a MS |
12302 | |
12303 | bfd_put_32 (input_bfd, insn, hit_data); | |
12304 | } | |
12305 | return bfd_reloc_ok; | |
12306 | ||
12307 | case R_ARM_LDR_PC_G0: | |
12308 | case R_ARM_LDR_PC_G1: | |
12309 | case R_ARM_LDR_PC_G2: | |
12310 | case R_ARM_LDR_SB_G0: | |
12311 | case R_ARM_LDR_SB_G1: | |
12312 | case R_ARM_LDR_SB_G2: | |
12313 | { | |
12314 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12315 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12316 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12317 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12318 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 12319 | bfd_vma residual; |
4962c51a | 12320 | bfd_signed_vma signed_value; |
99059e56 RM |
12321 | int group = 0; |
12322 | ||
12323 | /* Determine which groups of bits to calculate. */ | |
12324 | switch (r_type) | |
12325 | { | |
12326 | case R_ARM_LDR_PC_G0: | |
12327 | case R_ARM_LDR_SB_G0: | |
12328 | group = 0; | |
12329 | break; | |
12330 | ||
12331 | case R_ARM_LDR_PC_G1: | |
12332 | case R_ARM_LDR_SB_G1: | |
12333 | group = 1; | |
12334 | break; | |
12335 | ||
12336 | case R_ARM_LDR_PC_G2: | |
12337 | case R_ARM_LDR_SB_G2: | |
12338 | group = 2; | |
12339 | break; | |
12340 | ||
12341 | default: | |
12342 | abort (); | |
12343 | } | |
12344 | ||
12345 | /* If REL, extract the addend from the insn. If RELA, it will | |
12346 | have already been fetched for us. */ | |
4962c51a | 12347 | if (globals->use_rel) |
99059e56 RM |
12348 | { |
12349 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
12350 | signed_addend = negative * (insn & 0xfff); | |
12351 | } | |
4962c51a MS |
12352 | |
12353 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12354 | if (r_type == R_ARM_LDR_PC_G0 |
12355 | || r_type == R_ARM_LDR_PC_G1 | |
12356 | || r_type == R_ARM_LDR_PC_G2) | |
12357 | /* PC relative. */ | |
12358 | signed_value = value - pc + signed_addend; | |
12359 | else | |
12360 | /* Section base relative. */ | |
12361 | signed_value = value - sb + signed_addend; | |
12362 | ||
12363 | /* Calculate the value of the relevant G_{n-1} to obtain | |
12364 | the residual at that stage. */ | |
b6518b38 NC |
12365 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12366 | group - 1, &residual); | |
99059e56 RM |
12367 | |
12368 | /* Check for overflow. */ | |
12369 | if (residual >= 0x1000) | |
12370 | { | |
4eca0228 | 12371 | _bfd_error_handler |
695344c0 | 12372 | /* xgettext:c-format */ |
90b6238f | 12373 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12374 | "splitting %#" PRIx64 " for group relocation %s"), |
12375 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12376 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12377 | howto->name); | |
99059e56 RM |
12378 | return bfd_reloc_overflow; |
12379 | } | |
12380 | ||
12381 | /* Mask out the value and U bit. */ | |
12382 | insn &= 0xff7ff000; | |
12383 | ||
12384 | /* Set the U bit if the value to go in the place is non-negative. */ | |
12385 | if (signed_value >= 0) | |
12386 | insn |= 1 << 23; | |
12387 | ||
12388 | /* Encode the offset. */ | |
12389 | insn |= residual; | |
4962c51a MS |
12390 | |
12391 | bfd_put_32 (input_bfd, insn, hit_data); | |
12392 | } | |
12393 | return bfd_reloc_ok; | |
12394 | ||
12395 | case R_ARM_LDRS_PC_G0: | |
12396 | case R_ARM_LDRS_PC_G1: | |
12397 | case R_ARM_LDRS_PC_G2: | |
12398 | case R_ARM_LDRS_SB_G0: | |
12399 | case R_ARM_LDRS_SB_G1: | |
12400 | case R_ARM_LDRS_SB_G2: | |
12401 | { | |
12402 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12403 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12404 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12405 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12406 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 12407 | bfd_vma residual; |
4962c51a | 12408 | bfd_signed_vma signed_value; |
99059e56 RM |
12409 | int group = 0; |
12410 | ||
12411 | /* Determine which groups of bits to calculate. */ | |
12412 | switch (r_type) | |
12413 | { | |
12414 | case R_ARM_LDRS_PC_G0: | |
12415 | case R_ARM_LDRS_SB_G0: | |
12416 | group = 0; | |
12417 | break; | |
12418 | ||
12419 | case R_ARM_LDRS_PC_G1: | |
12420 | case R_ARM_LDRS_SB_G1: | |
12421 | group = 1; | |
12422 | break; | |
12423 | ||
12424 | case R_ARM_LDRS_PC_G2: | |
12425 | case R_ARM_LDRS_SB_G2: | |
12426 | group = 2; | |
12427 | break; | |
12428 | ||
12429 | default: | |
12430 | abort (); | |
12431 | } | |
12432 | ||
12433 | /* If REL, extract the addend from the insn. If RELA, it will | |
12434 | have already been fetched for us. */ | |
4962c51a | 12435 | if (globals->use_rel) |
99059e56 RM |
12436 | { |
12437 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
12438 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
12439 | } | |
4962c51a MS |
12440 | |
12441 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12442 | if (r_type == R_ARM_LDRS_PC_G0 |
12443 | || r_type == R_ARM_LDRS_PC_G1 | |
12444 | || r_type == R_ARM_LDRS_PC_G2) | |
12445 | /* PC relative. */ | |
12446 | signed_value = value - pc + signed_addend; | |
12447 | else | |
12448 | /* Section base relative. */ | |
12449 | signed_value = value - sb + signed_addend; | |
12450 | ||
12451 | /* Calculate the value of the relevant G_{n-1} to obtain | |
12452 | the residual at that stage. */ | |
b6518b38 NC |
12453 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12454 | group - 1, &residual); | |
99059e56 RM |
12455 | |
12456 | /* Check for overflow. */ | |
12457 | if (residual >= 0x100) | |
12458 | { | |
4eca0228 | 12459 | _bfd_error_handler |
695344c0 | 12460 | /* xgettext:c-format */ |
90b6238f | 12461 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12462 | "splitting %#" PRIx64 " for group relocation %s"), |
12463 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12464 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12465 | howto->name); | |
99059e56 RM |
12466 | return bfd_reloc_overflow; |
12467 | } | |
12468 | ||
12469 | /* Mask out the value and U bit. */ | |
12470 | insn &= 0xff7ff0f0; | |
12471 | ||
12472 | /* Set the U bit if the value to go in the place is non-negative. */ | |
12473 | if (signed_value >= 0) | |
12474 | insn |= 1 << 23; | |
12475 | ||
12476 | /* Encode the offset. */ | |
12477 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
4962c51a MS |
12478 | |
12479 | bfd_put_32 (input_bfd, insn, hit_data); | |
12480 | } | |
12481 | return bfd_reloc_ok; | |
12482 | ||
12483 | case R_ARM_LDC_PC_G0: | |
12484 | case R_ARM_LDC_PC_G1: | |
12485 | case R_ARM_LDC_PC_G2: | |
12486 | case R_ARM_LDC_SB_G0: | |
12487 | case R_ARM_LDC_SB_G1: | |
12488 | case R_ARM_LDC_SB_G2: | |
12489 | { | |
12490 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 12491 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 12492 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 12493 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 12494 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 12495 | bfd_vma residual; |
4962c51a | 12496 | bfd_signed_vma signed_value; |
99059e56 RM |
12497 | int group = 0; |
12498 | ||
12499 | /* Determine which groups of bits to calculate. */ | |
12500 | switch (r_type) | |
12501 | { | |
12502 | case R_ARM_LDC_PC_G0: | |
12503 | case R_ARM_LDC_SB_G0: | |
12504 | group = 0; | |
12505 | break; | |
12506 | ||
12507 | case R_ARM_LDC_PC_G1: | |
12508 | case R_ARM_LDC_SB_G1: | |
12509 | group = 1; | |
12510 | break; | |
12511 | ||
12512 | case R_ARM_LDC_PC_G2: | |
12513 | case R_ARM_LDC_SB_G2: | |
12514 | group = 2; | |
12515 | break; | |
12516 | ||
12517 | default: | |
12518 | abort (); | |
12519 | } | |
12520 | ||
12521 | /* If REL, extract the addend from the insn. If RELA, it will | |
12522 | have already been fetched for us. */ | |
4962c51a | 12523 | if (globals->use_rel) |
99059e56 RM |
12524 | { |
12525 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
12526 | signed_addend = negative * ((insn & 0xff) << 2); | |
12527 | } | |
4962c51a MS |
12528 | |
12529 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
12530 | if (r_type == R_ARM_LDC_PC_G0 |
12531 | || r_type == R_ARM_LDC_PC_G1 | |
12532 | || r_type == R_ARM_LDC_PC_G2) | |
12533 | /* PC relative. */ | |
12534 | signed_value = value - pc + signed_addend; | |
12535 | else | |
12536 | /* Section base relative. */ | |
12537 | signed_value = value - sb + signed_addend; | |
12538 | ||
12539 | /* Calculate the value of the relevant G_{n-1} to obtain | |
12540 | the residual at that stage. */ | |
b6518b38 NC |
12541 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
12542 | group - 1, &residual); | |
99059e56 RM |
12543 | |
12544 | /* Check for overflow. (The absolute value to go in the place must be | |
12545 | divisible by four and, after having been divided by four, must | |
12546 | fit in eight bits.) */ | |
12547 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
12548 | { | |
4eca0228 | 12549 | _bfd_error_handler |
695344c0 | 12550 | /* xgettext:c-format */ |
90b6238f | 12551 | (_("%pB(%pA+%#" PRIx64 "): overflow whilst " |
2dcf00ce AM |
12552 | "splitting %#" PRIx64 " for group relocation %s"), |
12553 | input_bfd, input_section, (uint64_t) rel->r_offset, | |
12554 | (uint64_t) (signed_value < 0 ? -signed_value : signed_value), | |
12555 | howto->name); | |
99059e56 RM |
12556 | return bfd_reloc_overflow; |
12557 | } | |
12558 | ||
12559 | /* Mask out the value and U bit. */ | |
12560 | insn &= 0xff7fff00; | |
12561 | ||
12562 | /* Set the U bit if the value to go in the place is non-negative. */ | |
12563 | if (signed_value >= 0) | |
12564 | insn |= 1 << 23; | |
12565 | ||
12566 | /* Encode the offset. */ | |
12567 | insn |= residual >> 2; | |
4962c51a MS |
12568 | |
12569 | bfd_put_32 (input_bfd, insn, hit_data); | |
12570 | } | |
12571 | return bfd_reloc_ok; | |
12572 | ||
72d98d16 MG |
12573 | case R_ARM_THM_ALU_ABS_G0_NC: |
12574 | case R_ARM_THM_ALU_ABS_G1_NC: | |
12575 | case R_ARM_THM_ALU_ABS_G2_NC: | |
12576 | case R_ARM_THM_ALU_ABS_G3_NC: | |
12577 | { | |
12578 | const int shift_array[4] = {0, 8, 16, 24}; | |
12579 | bfd_vma insn = bfd_get_16 (input_bfd, hit_data); | |
12580 | bfd_vma addr = value; | |
12581 | int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC]; | |
12582 | ||
12583 | /* Compute address. */ | |
12584 | if (globals->use_rel) | |
12585 | signed_addend = insn & 0xff; | |
12586 | addr += signed_addend; | |
12587 | if (branch_type == ST_BRANCH_TO_THUMB) | |
12588 | addr |= 1; | |
12589 | /* Clean imm8 insn. */ | |
12590 | insn &= 0xff00; | |
12591 | /* And update with correct part of address. */ | |
12592 | insn |= (addr >> shift) & 0xff; | |
12593 | /* Update insn. */ | |
12594 | bfd_put_16 (input_bfd, insn, hit_data); | |
12595 | } | |
12596 | ||
12597 | *unresolved_reloc_p = FALSE; | |
12598 | return bfd_reloc_ok; | |
12599 | ||
e8b09b87 CL |
12600 | case R_ARM_GOTOFFFUNCDESC: |
12601 | { | |
12602 | if (h == NULL) | |
12603 | { | |
12604 | struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd); | |
12605 | int dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12606 | int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1; | |
12607 | bfd_vma addr = dynreloc_value - sym_sec->output_section->vma; | |
12608 | bfd_vma seg = -1; | |
12609 | ||
12610 | if (bfd_link_pic(info) && dynindx == 0) | |
12611 | abort(); | |
12612 | ||
12613 | /* Resolve relocation. */ | |
12614 | bfd_put_32(output_bfd, (offset + sgot->output_offset) | |
12615 | , contents + rel->r_offset); | |
12616 | /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if | |
12617 | not done yet. */ | |
12618 | arm_elf_fill_funcdesc(output_bfd, info, | |
12619 | &local_fdpic_cnts[r_symndx].funcdesc_offset, | |
12620 | dynindx, offset, addr, dynreloc_value, seg); | |
12621 | } | |
12622 | else | |
12623 | { | |
12624 | int dynindx; | |
12625 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; | |
12626 | bfd_vma addr; | |
12627 | bfd_vma seg = -1; | |
12628 | ||
12629 | /* For static binaries, sym_sec can be null. */ | |
12630 | if (sym_sec) | |
12631 | { | |
12632 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12633 | addr = dynreloc_value - sym_sec->output_section->vma; | |
12634 | } | |
12635 | else | |
12636 | { | |
12637 | dynindx = 0; | |
12638 | addr = 0; | |
12639 | } | |
12640 | ||
12641 | if (bfd_link_pic(info) && dynindx == 0) | |
12642 | abort(); | |
12643 | ||
12644 | /* This case cannot occur since funcdesc is allocated by | |
12645 | the dynamic loader so we cannot resolve the relocation. */ | |
12646 | if (h->dynindx != -1) | |
12647 | abort(); | |
12648 | ||
12649 | /* Resolve relocation. */ | |
12650 | bfd_put_32(output_bfd, (offset + sgot->output_offset), | |
12651 | contents + rel->r_offset); | |
12652 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
12653 | arm_elf_fill_funcdesc(output_bfd, info, | |
12654 | &eh->fdpic_cnts.funcdesc_offset, | |
12655 | dynindx, offset, addr, dynreloc_value, seg); | |
12656 | } | |
12657 | } | |
12658 | *unresolved_reloc_p = FALSE; | |
12659 | return bfd_reloc_ok; | |
12660 | ||
12661 | case R_ARM_GOTFUNCDESC: | |
12662 | { | |
12663 | if (h != NULL) | |
12664 | { | |
12665 | Elf_Internal_Rela outrel; | |
12666 | ||
12667 | /* Resolve relocation. */ | |
12668 | bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1) | |
12669 | + sgot->output_offset), | |
12670 | contents + rel->r_offset); | |
12671 | /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */ | |
12672 | if(h->dynindx == -1) | |
12673 | { | |
12674 | int dynindx; | |
12675 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; | |
12676 | bfd_vma addr; | |
12677 | bfd_vma seg = -1; | |
12678 | ||
12679 | /* For static binaries sym_sec can be null. */ | |
12680 | if (sym_sec) | |
12681 | { | |
12682 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12683 | addr = dynreloc_value - sym_sec->output_section->vma; | |
12684 | } | |
12685 | else | |
12686 | { | |
12687 | dynindx = 0; | |
12688 | addr = 0; | |
12689 | } | |
12690 | ||
12691 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
12692 | arm_elf_fill_funcdesc(output_bfd, info, | |
12693 | &eh->fdpic_cnts.funcdesc_offset, | |
12694 | dynindx, offset, addr, dynreloc_value, seg); | |
12695 | } | |
12696 | ||
12697 | /* Add a dynamic relocation on GOT entry if not already done. */ | |
12698 | if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0) | |
12699 | { | |
12700 | if (h->dynindx == -1) | |
12701 | { | |
12702 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
12703 | if (h->root.type == bfd_link_hash_undefweak) | |
12704 | bfd_put_32(output_bfd, 0, sgot->contents | |
12705 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1)); | |
12706 | else | |
12707 | bfd_put_32(output_bfd, sgot->output_section->vma | |
12708 | + sgot->output_offset | |
12709 | + (eh->fdpic_cnts.funcdesc_offset & ~1), | |
12710 | sgot->contents | |
12711 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1)); | |
12712 | } | |
12713 | else | |
12714 | { | |
12715 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC); | |
12716 | } | |
12717 | outrel.r_offset = sgot->output_section->vma | |
12718 | + sgot->output_offset | |
12719 | + (eh->fdpic_cnts.gotfuncdesc_offset & ~1); | |
12720 | outrel.r_addend = 0; | |
12721 | if (h->dynindx == -1 && !bfd_link_pic(info)) | |
12722 | if (h->root.type == bfd_link_hash_undefweak) | |
12723 | arm_elf_add_rofixup(output_bfd, globals->srofixup, -1); | |
12724 | else | |
12725 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); | |
12726 | else | |
12727 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
12728 | eh->fdpic_cnts.gotfuncdesc_offset |= 1; | |
12729 | } | |
12730 | } | |
12731 | else | |
12732 | { | |
12733 | /* Such relocation on static function should not have been | |
12734 | emitted by the compiler. */ | |
12735 | abort(); | |
12736 | } | |
12737 | } | |
12738 | *unresolved_reloc_p = FALSE; | |
12739 | return bfd_reloc_ok; | |
12740 | ||
12741 | case R_ARM_FUNCDESC: | |
12742 | { | |
12743 | if (h == NULL) | |
12744 | { | |
12745 | struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd); | |
12746 | Elf_Internal_Rela outrel; | |
12747 | int dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12748 | int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1; | |
12749 | bfd_vma addr = dynreloc_value - sym_sec->output_section->vma; | |
12750 | bfd_vma seg = -1; | |
12751 | ||
12752 | if (bfd_link_pic(info) && dynindx == 0) | |
12753 | abort(); | |
12754 | ||
12755 | /* Replace static FUNCDESC relocation with a | |
12756 | R_ARM_RELATIVE dynamic relocation or with a rofixup for | |
12757 | executable. */ | |
12758 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
12759 | outrel.r_offset = input_section->output_section->vma | |
12760 | + input_section->output_offset + rel->r_offset; | |
12761 | outrel.r_addend = 0; | |
12762 | if (bfd_link_pic(info)) | |
12763 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
12764 | else | |
12765 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); | |
12766 | ||
12767 | bfd_put_32 (input_bfd, sgot->output_section->vma | |
12768 | + sgot->output_offset + offset, hit_data); | |
12769 | ||
12770 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
12771 | arm_elf_fill_funcdesc(output_bfd, info, | |
12772 | &local_fdpic_cnts[r_symndx].funcdesc_offset, | |
12773 | dynindx, offset, addr, dynreloc_value, seg); | |
12774 | } | |
12775 | else | |
12776 | { | |
12777 | if (h->dynindx == -1) | |
12778 | { | |
12779 | int dynindx; | |
12780 | int offset = eh->fdpic_cnts.funcdesc_offset & ~1; | |
12781 | bfd_vma addr; | |
12782 | bfd_vma seg = -1; | |
12783 | Elf_Internal_Rela outrel; | |
12784 | ||
12785 | /* For static binaries sym_sec can be null. */ | |
12786 | if (sym_sec) | |
12787 | { | |
12788 | dynindx = elf_section_data (sym_sec->output_section)->dynindx; | |
12789 | addr = dynreloc_value - sym_sec->output_section->vma; | |
12790 | } | |
12791 | else | |
12792 | { | |
12793 | dynindx = 0; | |
12794 | addr = 0; | |
12795 | } | |
12796 | ||
12797 | if (bfd_link_pic(info) && dynindx == 0) | |
12798 | abort(); | |
12799 | ||
12800 | /* Replace static FUNCDESC relocation with a | |
12801 | R_ARM_RELATIVE dynamic relocation. */ | |
12802 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
12803 | outrel.r_offset = input_section->output_section->vma | |
12804 | + input_section->output_offset + rel->r_offset; | |
12805 | outrel.r_addend = 0; | |
12806 | if (bfd_link_pic(info)) | |
12807 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
12808 | else | |
12809 | arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset); | |
12810 | ||
12811 | bfd_put_32 (input_bfd, sgot->output_section->vma | |
12812 | + sgot->output_offset + offset, hit_data); | |
12813 | ||
12814 | /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */ | |
12815 | arm_elf_fill_funcdesc(output_bfd, info, | |
12816 | &eh->fdpic_cnts.funcdesc_offset, | |
12817 | dynindx, offset, addr, dynreloc_value, seg); | |
12818 | } | |
12819 | else | |
12820 | { | |
12821 | Elf_Internal_Rela outrel; | |
12822 | ||
12823 | /* Add a dynamic relocation. */ | |
12824 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC); | |
12825 | outrel.r_offset = input_section->output_section->vma | |
12826 | + input_section->output_offset + rel->r_offset; | |
12827 | outrel.r_addend = 0; | |
12828 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
12829 | } | |
12830 | } | |
12831 | } | |
12832 | *unresolved_reloc_p = FALSE; | |
12833 | return bfd_reloc_ok; | |
12834 | ||
252b5132 RH |
12835 | default: |
12836 | return bfd_reloc_notsupported; | |
12837 | } | |
12838 | } | |
12839 | ||
98c1d4aa NC |
12840 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
12841 | static void | |
07d6d2b8 AM |
12842 | arm_add_to_rel (bfd * abfd, |
12843 | bfd_byte * address, | |
57e8b36a | 12844 | reloc_howto_type * howto, |
07d6d2b8 | 12845 | bfd_signed_vma increment) |
98c1d4aa | 12846 | { |
98c1d4aa NC |
12847 | bfd_signed_vma addend; |
12848 | ||
bd97cb95 DJ |
12849 | if (howto->type == R_ARM_THM_CALL |
12850 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 12851 | { |
9a5aca8c AM |
12852 | int upper_insn, lower_insn; |
12853 | int upper, lower; | |
98c1d4aa | 12854 | |
9a5aca8c AM |
12855 | upper_insn = bfd_get_16 (abfd, address); |
12856 | lower_insn = bfd_get_16 (abfd, address + 2); | |
12857 | upper = upper_insn & 0x7ff; | |
12858 | lower = lower_insn & 0x7ff; | |
12859 | ||
12860 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 12861 | addend += increment; |
9a5aca8c | 12862 | addend >>= 1; |
98c1d4aa | 12863 | |
9a5aca8c AM |
12864 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
12865 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
12866 | ||
dc810e39 AM |
12867 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
12868 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
12869 | } |
12870 | else | |
12871 | { | |
07d6d2b8 | 12872 | bfd_vma contents; |
9a5aca8c AM |
12873 | |
12874 | contents = bfd_get_32 (abfd, address); | |
12875 | ||
12876 | /* Get the (signed) value from the instruction. */ | |
12877 | addend = contents & howto->src_mask; | |
12878 | if (addend & ((howto->src_mask + 1) >> 1)) | |
12879 | { | |
12880 | bfd_signed_vma mask; | |
12881 | ||
12882 | mask = -1; | |
12883 | mask &= ~ howto->src_mask; | |
12884 | addend |= mask; | |
12885 | } | |
12886 | ||
12887 | /* Add in the increment, (which is a byte value). */ | |
12888 | switch (howto->type) | |
12889 | { | |
12890 | default: | |
12891 | addend += increment; | |
12892 | break; | |
12893 | ||
12894 | case R_ARM_PC24: | |
c6596c5e | 12895 | case R_ARM_PLT32: |
5b5bb741 PB |
12896 | case R_ARM_CALL: |
12897 | case R_ARM_JUMP24: | |
9a5aca8c | 12898 | addend <<= howto->size; |
dc810e39 | 12899 | addend += increment; |
9a5aca8c AM |
12900 | |
12901 | /* Should we check for overflow here ? */ | |
12902 | ||
12903 | /* Drop any undesired bits. */ | |
12904 | addend >>= howto->rightshift; | |
12905 | break; | |
12906 | } | |
12907 | ||
12908 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
12909 | ||
12910 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 12911 | } |
98c1d4aa | 12912 | } |
252b5132 | 12913 | |
ba93b8ac DJ |
12914 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
12915 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
5c5a4843 | 12916 | || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \ |
ba93b8ac DJ |
12917 | || (R_TYPE) == R_ARM_TLS_LDO32 \ |
12918 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
5c5a4843 | 12919 | || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \ |
ba93b8ac DJ |
12920 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ |
12921 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
12922 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
12923 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
0855e32b | 12924 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
5c5a4843 | 12925 | || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \ |
0855e32b NS |
12926 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) |
12927 | ||
12928 | /* Specific set of relocations for the gnu tls dialect. */ | |
12929 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ | |
12930 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ | |
12931 | || (R_TYPE) == R_ARM_TLS_CALL \ | |
12932 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ | |
12933 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ | |
12934 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) | |
ba93b8ac | 12935 | |
252b5132 | 12936 | /* Relocate an ARM ELF section. */ |
906e58ca | 12937 | |
b34976b6 | 12938 | static bfd_boolean |
07d6d2b8 | 12939 | elf32_arm_relocate_section (bfd * output_bfd, |
57e8b36a | 12940 | struct bfd_link_info * info, |
07d6d2b8 AM |
12941 | bfd * input_bfd, |
12942 | asection * input_section, | |
12943 | bfd_byte * contents, | |
12944 | Elf_Internal_Rela * relocs, | |
12945 | Elf_Internal_Sym * local_syms, | |
12946 | asection ** local_sections) | |
252b5132 | 12947 | { |
b34976b6 AM |
12948 | Elf_Internal_Shdr *symtab_hdr; |
12949 | struct elf_link_hash_entry **sym_hashes; | |
12950 | Elf_Internal_Rela *rel; | |
12951 | Elf_Internal_Rela *relend; | |
12952 | const char *name; | |
b32d3aa2 | 12953 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 12954 | |
4e7fd91e | 12955 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
12956 | if (globals == NULL) |
12957 | return FALSE; | |
b491616a | 12958 | |
0ffa91dd | 12959 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
12960 | sym_hashes = elf_sym_hashes (input_bfd); |
12961 | ||
12962 | rel = relocs; | |
12963 | relend = relocs + input_section->reloc_count; | |
12964 | for (; rel < relend; rel++) | |
12965 | { | |
07d6d2b8 AM |
12966 | int r_type; |
12967 | reloc_howto_type * howto; | |
12968 | unsigned long r_symndx; | |
12969 | Elf_Internal_Sym * sym; | |
12970 | asection * sec; | |
252b5132 | 12971 | struct elf_link_hash_entry * h; |
07d6d2b8 AM |
12972 | bfd_vma relocation; |
12973 | bfd_reloc_status_type r; | |
12974 | arelent bfd_reloc; | |
12975 | char sym_type; | |
12976 | bfd_boolean unresolved_reloc = FALSE; | |
f2a9dd69 | 12977 | char *error_message = NULL; |
f21f3fe0 | 12978 | |
252b5132 | 12979 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 12980 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 12981 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 12982 | |
ba96a88f | 12983 | if ( r_type == R_ARM_GNU_VTENTRY |
99059e56 RM |
12984 | || r_type == R_ARM_GNU_VTINHERIT) |
12985 | continue; | |
252b5132 | 12986 | |
47aeb64c NC |
12987 | howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
12988 | ||
12989 | if (howto == NULL) | |
12990 | return _bfd_unrecognized_reloc (input_bfd, input_section, r_type); | |
252b5132 | 12991 | |
252b5132 RH |
12992 | h = NULL; |
12993 | sym = NULL; | |
12994 | sec = NULL; | |
9b485d32 | 12995 | |
252b5132 RH |
12996 | if (r_symndx < symtab_hdr->sh_info) |
12997 | { | |
12998 | sym = local_syms + r_symndx; | |
ba93b8ac | 12999 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 13000 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
13001 | |
13002 | /* An object file might have a reference to a local | |
13003 | undefined symbol. This is a daft object file, but we | |
13004 | should at least do something about it. V4BX & NONE | |
13005 | relocations do not use the symbol and are explicitly | |
77b4f08f TS |
13006 | allowed to use the undefined symbol, so allow those. |
13007 | Likewise for relocations against STN_UNDEF. */ | |
ffcb4889 NS |
13008 | if (r_type != R_ARM_V4BX |
13009 | && r_type != R_ARM_NONE | |
77b4f08f | 13010 | && r_symndx != STN_UNDEF |
ffcb4889 NS |
13011 | && bfd_is_und_section (sec) |
13012 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
1a72702b AM |
13013 | (*info->callbacks->undefined_symbol) |
13014 | (info, bfd_elf_string_from_elf_section | |
13015 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
13016 | input_bfd, input_section, | |
13017 | rel->r_offset, TRUE); | |
b38cadfb | 13018 | |
4e7fd91e | 13019 | if (globals->use_rel) |
f8df10f4 | 13020 | { |
4e7fd91e PB |
13021 | relocation = (sec->output_section->vma |
13022 | + sec->output_offset | |
13023 | + sym->st_value); | |
0e1862bb | 13024 | if (!bfd_link_relocatable (info) |
ab96bf03 AM |
13025 | && (sec->flags & SEC_MERGE) |
13026 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 13027 | { |
4e7fd91e PB |
13028 | asection *msec; |
13029 | bfd_vma addend, value; | |
13030 | ||
39623e12 | 13031 | switch (r_type) |
4e7fd91e | 13032 | { |
39623e12 PB |
13033 | case R_ARM_MOVW_ABS_NC: |
13034 | case R_ARM_MOVT_ABS: | |
13035 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
13036 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
13037 | addend = (addend ^ 0x8000) - 0x8000; | |
13038 | break; | |
f8df10f4 | 13039 | |
39623e12 PB |
13040 | case R_ARM_THM_MOVW_ABS_NC: |
13041 | case R_ARM_THM_MOVT_ABS: | |
13042 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
13043 | << 16; | |
13044 | value |= bfd_get_16 (input_bfd, | |
13045 | contents + rel->r_offset + 2); | |
13046 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
13047 | | ((value & 0x04000000) >> 15); | |
13048 | addend = (addend ^ 0x8000) - 0x8000; | |
13049 | break; | |
f8df10f4 | 13050 | |
39623e12 PB |
13051 | default: |
13052 | if (howto->rightshift | |
13053 | || (howto->src_mask & (howto->src_mask + 1))) | |
13054 | { | |
4eca0228 | 13055 | _bfd_error_handler |
695344c0 | 13056 | /* xgettext:c-format */ |
2dcf00ce AM |
13057 | (_("%pB(%pA+%#" PRIx64 "): " |
13058 | "%s relocation against SEC_MERGE section"), | |
39623e12 | 13059 | input_bfd, input_section, |
2dcf00ce | 13060 | (uint64_t) rel->r_offset, howto->name); |
39623e12 PB |
13061 | return FALSE; |
13062 | } | |
13063 | ||
13064 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
13065 | ||
13066 | /* Get the (signed) value from the instruction. */ | |
13067 | addend = value & howto->src_mask; | |
13068 | if (addend & ((howto->src_mask + 1) >> 1)) | |
13069 | { | |
13070 | bfd_signed_vma mask; | |
13071 | ||
13072 | mask = -1; | |
13073 | mask &= ~ howto->src_mask; | |
13074 | addend |= mask; | |
13075 | } | |
13076 | break; | |
4e7fd91e | 13077 | } |
39623e12 | 13078 | |
4e7fd91e PB |
13079 | msec = sec; |
13080 | addend = | |
13081 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
13082 | - relocation; | |
13083 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 | 13084 | |
cc643b88 | 13085 | /* Cases here must match those in the preceding |
39623e12 PB |
13086 | switch statement. */ |
13087 | switch (r_type) | |
13088 | { | |
13089 | case R_ARM_MOVW_ABS_NC: | |
13090 | case R_ARM_MOVT_ABS: | |
13091 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
13092 | | (addend & 0xfff); | |
13093 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
13094 | break; | |
13095 | ||
13096 | case R_ARM_THM_MOVW_ABS_NC: | |
13097 | case R_ARM_THM_MOVT_ABS: | |
13098 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
13099 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
13100 | bfd_put_16 (input_bfd, value >> 16, | |
13101 | contents + rel->r_offset); | |
13102 | bfd_put_16 (input_bfd, value, | |
13103 | contents + rel->r_offset + 2); | |
13104 | break; | |
13105 | ||
13106 | default: | |
13107 | value = (value & ~ howto->dst_mask) | |
13108 | | (addend & howto->dst_mask); | |
13109 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
13110 | break; | |
13111 | } | |
f8df10f4 | 13112 | } |
f8df10f4 | 13113 | } |
4e7fd91e PB |
13114 | else |
13115 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
13116 | } |
13117 | else | |
13118 | { | |
62d887d4 | 13119 | bfd_boolean warned, ignored; |
560e09e9 | 13120 | |
b2a8e766 AM |
13121 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
13122 | r_symndx, symtab_hdr, sym_hashes, | |
13123 | h, sec, relocation, | |
62d887d4 | 13124 | unresolved_reloc, warned, ignored); |
ba93b8ac DJ |
13125 | |
13126 | sym_type = h->type; | |
252b5132 RH |
13127 | } |
13128 | ||
dbaa2011 | 13129 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 13130 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 13131 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 13132 | |
0e1862bb | 13133 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
13134 | { |
13135 | /* This is a relocatable link. We don't have to change | |
13136 | anything, unless the reloc is against a section symbol, | |
13137 | in which case we have to adjust according to where the | |
13138 | section symbol winds up in the output section. */ | |
13139 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
13140 | { | |
13141 | if (globals->use_rel) | |
13142 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
13143 | howto, (bfd_signed_vma) sec->output_offset); | |
13144 | else | |
13145 | rel->r_addend += sec->output_offset; | |
13146 | } | |
13147 | continue; | |
13148 | } | |
13149 | ||
252b5132 RH |
13150 | if (h != NULL) |
13151 | name = h->root.root.string; | |
13152 | else | |
13153 | { | |
13154 | name = (bfd_elf_string_from_elf_section | |
13155 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
13156 | if (name == NULL || *name == '\0') | |
13157 | name = bfd_section_name (input_bfd, sec); | |
13158 | } | |
f21f3fe0 | 13159 | |
cf35638d | 13160 | if (r_symndx != STN_UNDEF |
ba93b8ac DJ |
13161 | && r_type != R_ARM_NONE |
13162 | && (h == NULL | |
13163 | || h->root.type == bfd_link_hash_defined | |
13164 | || h->root.type == bfd_link_hash_defweak) | |
13165 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
13166 | { | |
4eca0228 | 13167 | _bfd_error_handler |
ba93b8ac | 13168 | ((sym_type == STT_TLS |
695344c0 | 13169 | /* xgettext:c-format */ |
2dcf00ce | 13170 | ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s") |
695344c0 | 13171 | /* xgettext:c-format */ |
2dcf00ce | 13172 | : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")), |
ba93b8ac DJ |
13173 | input_bfd, |
13174 | input_section, | |
2dcf00ce | 13175 | (uint64_t) rel->r_offset, |
ba93b8ac DJ |
13176 | howto->name, |
13177 | name); | |
13178 | } | |
13179 | ||
0855e32b | 13180 | /* We call elf32_arm_final_link_relocate unless we're completely |
99059e56 RM |
13181 | done, i.e., the relaxation produced the final output we want, |
13182 | and we won't let anybody mess with it. Also, we have to do | |
13183 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation | |
6a631e86 | 13184 | both in relaxed and non-relaxed cases. */ |
39d911fc TP |
13185 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) |
13186 | || (IS_ARM_TLS_GNU_RELOC (r_type) | |
13187 | && !((h ? elf32_arm_hash_entry (h)->tls_type : | |
13188 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) | |
13189 | & GOT_TLS_GDESC))) | |
13190 | { | |
13191 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, | |
13192 | contents, rel, h == NULL); | |
13193 | /* This may have been marked unresolved because it came from | |
13194 | a shared library. But we've just dealt with that. */ | |
13195 | unresolved_reloc = 0; | |
13196 | } | |
13197 | else | |
13198 | r = bfd_reloc_continue; | |
b38cadfb | 13199 | |
39d911fc TP |
13200 | if (r == bfd_reloc_continue) |
13201 | { | |
13202 | unsigned char branch_type = | |
13203 | h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal) | |
13204 | : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
13205 | ||
13206 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, | |
13207 | input_section, contents, rel, | |
13208 | relocation, info, sec, name, | |
13209 | sym_type, branch_type, h, | |
13210 | &unresolved_reloc, | |
13211 | &error_message); | |
13212 | } | |
0945cdfd DJ |
13213 | |
13214 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
13215 | because such sections are not SEC_ALLOC and thus ld.so will | |
13216 | not process them. */ | |
13217 | if (unresolved_reloc | |
99059e56 RM |
13218 | && !((input_section->flags & SEC_DEBUGGING) != 0 |
13219 | && h->def_dynamic) | |
1d5316ab AM |
13220 | && _bfd_elf_section_offset (output_bfd, info, input_section, |
13221 | rel->r_offset) != (bfd_vma) -1) | |
0945cdfd | 13222 | { |
4eca0228 | 13223 | _bfd_error_handler |
695344c0 | 13224 | /* xgettext:c-format */ |
2dcf00ce AM |
13225 | (_("%pB(%pA+%#" PRIx64 "): " |
13226 | "unresolvable %s relocation against symbol `%s'"), | |
843fe662 L |
13227 | input_bfd, |
13228 | input_section, | |
2dcf00ce | 13229 | (uint64_t) rel->r_offset, |
843fe662 L |
13230 | howto->name, |
13231 | h->root.root.string); | |
0945cdfd DJ |
13232 | return FALSE; |
13233 | } | |
252b5132 RH |
13234 | |
13235 | if (r != bfd_reloc_ok) | |
13236 | { | |
252b5132 RH |
13237 | switch (r) |
13238 | { | |
13239 | case bfd_reloc_overflow: | |
cf919dfd PB |
13240 | /* If the overflowing reloc was to an undefined symbol, |
13241 | we have already printed one error message and there | |
13242 | is no point complaining again. */ | |
1a72702b AM |
13243 | if (!h || h->root.type != bfd_link_hash_undefined) |
13244 | (*info->callbacks->reloc_overflow) | |
13245 | (info, (h ? &h->root : NULL), name, howto->name, | |
13246 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
13247 | break; |
13248 | ||
13249 | case bfd_reloc_undefined: | |
1a72702b AM |
13250 | (*info->callbacks->undefined_symbol) |
13251 | (info, name, input_bfd, input_section, rel->r_offset, TRUE); | |
252b5132 RH |
13252 | break; |
13253 | ||
13254 | case bfd_reloc_outofrange: | |
f2a9dd69 | 13255 | error_message = _("out of range"); |
252b5132 RH |
13256 | goto common_error; |
13257 | ||
13258 | case bfd_reloc_notsupported: | |
f2a9dd69 | 13259 | error_message = _("unsupported relocation"); |
252b5132 RH |
13260 | goto common_error; |
13261 | ||
13262 | case bfd_reloc_dangerous: | |
f2a9dd69 | 13263 | /* error_message should already be set. */ |
252b5132 RH |
13264 | goto common_error; |
13265 | ||
13266 | default: | |
f2a9dd69 | 13267 | error_message = _("unknown error"); |
8029a119 | 13268 | /* Fall through. */ |
252b5132 RH |
13269 | |
13270 | common_error: | |
f2a9dd69 | 13271 | BFD_ASSERT (error_message != NULL); |
1a72702b AM |
13272 | (*info->callbacks->reloc_dangerous) |
13273 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
13274 | break; |
13275 | } | |
13276 | } | |
13277 | } | |
13278 | ||
b34976b6 | 13279 | return TRUE; |
252b5132 RH |
13280 | } |
13281 | ||
91d6fa6a | 13282 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 13283 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 13284 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
13285 | maintaining that condition). */ |
13286 | ||
13287 | static void | |
13288 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
13289 | arm_unwind_table_edit **tail, | |
13290 | arm_unwind_edit_type type, | |
13291 | asection *linked_section, | |
91d6fa6a | 13292 | unsigned int tindex) |
2468f9c9 | 13293 | { |
21d799b5 NC |
13294 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
13295 | xmalloc (sizeof (arm_unwind_table_edit)); | |
b38cadfb | 13296 | |
2468f9c9 PB |
13297 | new_edit->type = type; |
13298 | new_edit->linked_section = linked_section; | |
91d6fa6a | 13299 | new_edit->index = tindex; |
b38cadfb | 13300 | |
91d6fa6a | 13301 | if (tindex > 0) |
2468f9c9 PB |
13302 | { |
13303 | new_edit->next = NULL; | |
13304 | ||
13305 | if (*tail) | |
13306 | (*tail)->next = new_edit; | |
13307 | ||
13308 | (*tail) = new_edit; | |
13309 | ||
13310 | if (!*head) | |
13311 | (*head) = new_edit; | |
13312 | } | |
13313 | else | |
13314 | { | |
13315 | new_edit->next = *head; | |
13316 | ||
13317 | if (!*tail) | |
13318 | *tail = new_edit; | |
13319 | ||
13320 | *head = new_edit; | |
13321 | } | |
13322 | } | |
13323 | ||
13324 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
13325 | ||
13326 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
13327 | static void | |
13328 | adjust_exidx_size(asection *exidx_sec, int adjust) | |
13329 | { | |
13330 | asection *out_sec; | |
13331 | ||
13332 | if (!exidx_sec->rawsize) | |
13333 | exidx_sec->rawsize = exidx_sec->size; | |
13334 | ||
13335 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); | |
13336 | out_sec = exidx_sec->output_section; | |
13337 | /* Adjust size of output section. */ | |
13338 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); | |
13339 | } | |
13340 | ||
13341 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
13342 | static void | |
13343 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) | |
13344 | { | |
13345 | struct _arm_elf_section_data *exidx_arm_data; | |
13346 | ||
13347 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
13348 | add_unwind_table_edit ( | |
13349 | &exidx_arm_data->u.exidx.unwind_edit_list, | |
13350 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
13351 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
13352 | ||
491d01d3 YU |
13353 | exidx_arm_data->additional_reloc_count++; |
13354 | ||
2468f9c9 PB |
13355 | adjust_exidx_size(exidx_sec, 8); |
13356 | } | |
13357 | ||
13358 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
13359 | made to those tables, such that: | |
b38cadfb | 13360 | |
2468f9c9 PB |
13361 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. |
13362 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
99059e56 | 13363 | codes which have been inlined into the index). |
2468f9c9 | 13364 | |
85fdf906 AH |
13365 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
13366 | ||
2468f9c9 | 13367 | The edits are applied when the tables are written |
b38cadfb | 13368 | (in elf32_arm_write_section). */ |
2468f9c9 PB |
13369 | |
13370 | bfd_boolean | |
13371 | elf32_arm_fix_exidx_coverage (asection **text_section_order, | |
13372 | unsigned int num_text_sections, | |
85fdf906 AH |
13373 | struct bfd_link_info *info, |
13374 | bfd_boolean merge_exidx_entries) | |
2468f9c9 PB |
13375 | { |
13376 | bfd *inp; | |
13377 | unsigned int last_second_word = 0, i; | |
13378 | asection *last_exidx_sec = NULL; | |
13379 | asection *last_text_sec = NULL; | |
13380 | int last_unwind_type = -1; | |
13381 | ||
13382 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
13383 | text sections. */ | |
c72f2fb2 | 13384 | for (inp = info->input_bfds; inp != NULL; inp = inp->link.next) |
2468f9c9 PB |
13385 | { |
13386 | asection *sec; | |
b38cadfb | 13387 | |
2468f9c9 | 13388 | for (sec = inp->sections; sec != NULL; sec = sec->next) |
99059e56 | 13389 | { |
2468f9c9 PB |
13390 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); |
13391 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
b38cadfb | 13392 | |
dec9d5df | 13393 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 | 13394 | continue; |
b38cadfb | 13395 | |
2468f9c9 PB |
13396 | if (elf_sec->linked_to) |
13397 | { | |
13398 | Elf_Internal_Shdr *linked_hdr | |
99059e56 | 13399 | = &elf_section_data (elf_sec->linked_to)->this_hdr; |
2468f9c9 | 13400 | struct _arm_elf_section_data *linked_sec_arm_data |
99059e56 | 13401 | = get_arm_elf_section_data (linked_hdr->bfd_section); |
2468f9c9 PB |
13402 | |
13403 | if (linked_sec_arm_data == NULL) | |
99059e56 | 13404 | continue; |
2468f9c9 PB |
13405 | |
13406 | /* Link this .ARM.exidx section back from the text section it | |
99059e56 | 13407 | describes. */ |
2468f9c9 PB |
13408 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; |
13409 | } | |
13410 | } | |
13411 | } | |
13412 | ||
13413 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
13414 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 13415 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
13416 | |
13417 | for (i = 0; i < num_text_sections; i++) | |
13418 | { | |
13419 | asection *sec = text_section_order[i]; | |
13420 | asection *exidx_sec; | |
13421 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
13422 | struct _arm_elf_section_data *exidx_arm_data; | |
13423 | bfd_byte *contents = NULL; | |
13424 | int deleted_exidx_bytes = 0; | |
13425 | bfd_vma j; | |
13426 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
13427 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
13428 | Elf_Internal_Shdr *hdr; | |
13429 | bfd *ibfd; | |
13430 | ||
13431 | if (arm_data == NULL) | |
99059e56 | 13432 | continue; |
2468f9c9 PB |
13433 | |
13434 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
13435 | if (exidx_sec == NULL) | |
13436 | { | |
13437 | /* Section has no unwind data. */ | |
13438 | if (last_unwind_type == 0 || !last_exidx_sec) | |
13439 | continue; | |
13440 | ||
13441 | /* Ignore zero sized sections. */ | |
13442 | if (sec->size == 0) | |
13443 | continue; | |
13444 | ||
13445 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
13446 | last_unwind_type = 0; | |
13447 | continue; | |
13448 | } | |
13449 | ||
22a8f80e PB |
13450 | /* Skip /DISCARD/ sections. */ |
13451 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
13452 | continue; | |
13453 | ||
2468f9c9 PB |
13454 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
13455 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
99059e56 | 13456 | continue; |
b38cadfb | 13457 | |
2468f9c9 PB |
13458 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
13459 | if (exidx_arm_data == NULL) | |
99059e56 | 13460 | continue; |
b38cadfb | 13461 | |
2468f9c9 | 13462 | ibfd = exidx_sec->owner; |
b38cadfb | 13463 | |
2468f9c9 PB |
13464 | if (hdr->contents != NULL) |
13465 | contents = hdr->contents; | |
13466 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
13467 | /* An error? */ | |
13468 | continue; | |
13469 | ||
ac06903d YU |
13470 | if (last_unwind_type > 0) |
13471 | { | |
13472 | unsigned int first_word = bfd_get_32 (ibfd, contents); | |
13473 | /* Add cantunwind if first unwind item does not match section | |
13474 | start. */ | |
13475 | if (first_word != sec->vma) | |
13476 | { | |
13477 | insert_cantunwind_after (last_text_sec, last_exidx_sec); | |
13478 | last_unwind_type = 0; | |
13479 | } | |
13480 | } | |
13481 | ||
2468f9c9 PB |
13482 | for (j = 0; j < hdr->sh_size; j += 8) |
13483 | { | |
13484 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
13485 | int unwind_type; | |
13486 | int elide = 0; | |
13487 | ||
13488 | /* An EXIDX_CANTUNWIND entry. */ | |
13489 | if (second_word == 1) | |
13490 | { | |
13491 | if (last_unwind_type == 0) | |
13492 | elide = 1; | |
13493 | unwind_type = 0; | |
13494 | } | |
13495 | /* Inlined unwinding data. Merge if equal to previous. */ | |
13496 | else if ((second_word & 0x80000000) != 0) | |
13497 | { | |
85fdf906 AH |
13498 | if (merge_exidx_entries |
13499 | && last_second_word == second_word && last_unwind_type == 1) | |
2468f9c9 PB |
13500 | elide = 1; |
13501 | unwind_type = 1; | |
13502 | last_second_word = second_word; | |
13503 | } | |
13504 | /* Normal table entry. In theory we could merge these too, | |
13505 | but duplicate entries are likely to be much less common. */ | |
13506 | else | |
13507 | unwind_type = 2; | |
13508 | ||
491d01d3 | 13509 | if (elide && !bfd_link_relocatable (info)) |
2468f9c9 PB |
13510 | { |
13511 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
13512 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
13513 | ||
13514 | deleted_exidx_bytes += 8; | |
13515 | } | |
13516 | ||
13517 | last_unwind_type = unwind_type; | |
13518 | } | |
13519 | ||
13520 | /* Free contents if we allocated it ourselves. */ | |
13521 | if (contents != hdr->contents) | |
99059e56 | 13522 | free (contents); |
2468f9c9 PB |
13523 | |
13524 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
13525 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
13526 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
b38cadfb | 13527 | |
2468f9c9 PB |
13528 | if (deleted_exidx_bytes > 0) |
13529 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); | |
13530 | ||
13531 | last_exidx_sec = exidx_sec; | |
13532 | last_text_sec = sec; | |
13533 | } | |
13534 | ||
13535 | /* Add terminating CANTUNWIND entry. */ | |
491d01d3 YU |
13536 | if (!bfd_link_relocatable (info) && last_exidx_sec |
13537 | && last_unwind_type != 0) | |
2468f9c9 PB |
13538 | insert_cantunwind_after(last_text_sec, last_exidx_sec); |
13539 | ||
13540 | return TRUE; | |
13541 | } | |
13542 | ||
3e6b1042 DJ |
13543 | static bfd_boolean |
13544 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, | |
13545 | bfd *ibfd, const char *name) | |
13546 | { | |
13547 | asection *sec, *osec; | |
13548 | ||
3d4d4302 | 13549 | sec = bfd_get_linker_section (ibfd, name); |
3e6b1042 DJ |
13550 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) |
13551 | return TRUE; | |
13552 | ||
13553 | osec = sec->output_section; | |
13554 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
13555 | return TRUE; | |
13556 | ||
13557 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
13558 | sec->output_offset, sec->size)) | |
13559 | return FALSE; | |
13560 | ||
13561 | return TRUE; | |
13562 | } | |
13563 | ||
13564 | static bfd_boolean | |
13565 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) | |
13566 | { | |
13567 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
fe33d2fa | 13568 | asection *sec, *osec; |
3e6b1042 | 13569 | |
4dfe6ac6 NC |
13570 | if (globals == NULL) |
13571 | return FALSE; | |
13572 | ||
3e6b1042 DJ |
13573 | /* Invoke the regular ELF backend linker to do all the work. */ |
13574 | if (!bfd_elf_final_link (abfd, info)) | |
13575 | return FALSE; | |
13576 | ||
fe33d2fa CL |
13577 | /* Process stub sections (eg BE8 encoding, ...). */ |
13578 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
7292b3ac | 13579 | unsigned int i; |
cdb21a0a NS |
13580 | for (i=0; i<htab->top_id; i++) |
13581 | { | |
13582 | sec = htab->stub_group[i].stub_sec; | |
13583 | /* Only process it once, in its link_sec slot. */ | |
13584 | if (sec && i == htab->stub_group[i].link_sec->id) | |
13585 | { | |
13586 | osec = sec->output_section; | |
13587 | elf32_arm_write_section (abfd, info, sec, sec->contents); | |
13588 | if (! bfd_set_section_contents (abfd, osec, sec->contents, | |
13589 | sec->output_offset, sec->size)) | |
13590 | return FALSE; | |
13591 | } | |
fe33d2fa | 13592 | } |
fe33d2fa | 13593 | |
3e6b1042 DJ |
13594 | /* Write out any glue sections now that we have created all the |
13595 | stubs. */ | |
13596 | if (globals->bfd_of_glue_owner != NULL) | |
13597 | { | |
13598 | if (! elf32_arm_output_glue_section (info, abfd, | |
13599 | globals->bfd_of_glue_owner, | |
13600 | ARM2THUMB_GLUE_SECTION_NAME)) | |
13601 | return FALSE; | |
13602 | ||
13603 | if (! elf32_arm_output_glue_section (info, abfd, | |
13604 | globals->bfd_of_glue_owner, | |
13605 | THUMB2ARM_GLUE_SECTION_NAME)) | |
13606 | return FALSE; | |
13607 | ||
13608 | if (! elf32_arm_output_glue_section (info, abfd, | |
13609 | globals->bfd_of_glue_owner, | |
13610 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
13611 | return FALSE; | |
13612 | ||
a504d23a LA |
13613 | if (! elf32_arm_output_glue_section (info, abfd, |
13614 | globals->bfd_of_glue_owner, | |
13615 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME)) | |
13616 | return FALSE; | |
13617 | ||
3e6b1042 DJ |
13618 | if (! elf32_arm_output_glue_section (info, abfd, |
13619 | globals->bfd_of_glue_owner, | |
13620 | ARM_BX_GLUE_SECTION_NAME)) | |
13621 | return FALSE; | |
13622 | } | |
13623 | ||
13624 | return TRUE; | |
13625 | } | |
13626 | ||
5968a7b8 NC |
13627 | /* Return a best guess for the machine number based on the attributes. */ |
13628 | ||
13629 | static unsigned int | |
13630 | bfd_arm_get_mach_from_attributes (bfd * abfd) | |
13631 | { | |
13632 | int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
13633 | ||
13634 | switch (arch) | |
13635 | { | |
13636 | case TAG_CPU_ARCH_V4: return bfd_mach_arm_4; | |
13637 | case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T; | |
13638 | case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T; | |
13639 | ||
13640 | case TAG_CPU_ARCH_V5TE: | |
13641 | { | |
13642 | char * name; | |
13643 | ||
13644 | BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES); | |
13645 | name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s; | |
13646 | ||
13647 | if (name) | |
13648 | { | |
13649 | if (strcmp (name, "IWMMXT2") == 0) | |
13650 | return bfd_mach_arm_iWMMXt2; | |
13651 | ||
13652 | if (strcmp (name, "IWMMXT") == 0) | |
6034aab8 | 13653 | return bfd_mach_arm_iWMMXt; |
088ca6c1 NC |
13654 | |
13655 | if (strcmp (name, "XSCALE") == 0) | |
13656 | { | |
13657 | int wmmx; | |
13658 | ||
13659 | BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES); | |
13660 | wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i; | |
13661 | switch (wmmx) | |
13662 | { | |
13663 | case 1: return bfd_mach_arm_iWMMXt; | |
13664 | case 2: return bfd_mach_arm_iWMMXt2; | |
13665 | default: return bfd_mach_arm_XScale; | |
13666 | } | |
13667 | } | |
5968a7b8 NC |
13668 | } |
13669 | ||
13670 | return bfd_mach_arm_5TE; | |
13671 | } | |
13672 | ||
13673 | default: | |
13674 | return bfd_mach_arm_unknown; | |
13675 | } | |
13676 | } | |
13677 | ||
c178919b NC |
13678 | /* Set the right machine number. */ |
13679 | ||
13680 | static bfd_boolean | |
57e8b36a | 13681 | elf32_arm_object_p (bfd *abfd) |
c178919b | 13682 | { |
5a6c6817 | 13683 | unsigned int mach; |
57e8b36a | 13684 | |
5a6c6817 | 13685 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 13686 | |
5968a7b8 NC |
13687 | if (mach == bfd_mach_arm_unknown) |
13688 | { | |
13689 | if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
13690 | mach = bfd_mach_arm_ep9312; | |
13691 | else | |
13692 | mach = bfd_arm_get_mach_from_attributes (abfd); | |
13693 | } | |
c178919b | 13694 | |
5968a7b8 | 13695 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
c178919b NC |
13696 | return TRUE; |
13697 | } | |
13698 | ||
fc830a83 | 13699 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 13700 | |
b34976b6 | 13701 | static bfd_boolean |
57e8b36a | 13702 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
13703 | { |
13704 | if (elf_flags_init (abfd) | |
13705 | && elf_elfheader (abfd)->e_flags != flags) | |
13706 | { | |
fc830a83 NC |
13707 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
13708 | { | |
fd2ec330 | 13709 | if (flags & EF_ARM_INTERWORK) |
4eca0228 | 13710 | _bfd_error_handler |
90b6238f | 13711 | (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"), |
d003868e | 13712 | abfd); |
fc830a83 | 13713 | else |
d003868e | 13714 | _bfd_error_handler |
90b6238f | 13715 | (_("warning: clearing the interworking flag of %pB due to outside request"), |
d003868e | 13716 | abfd); |
fc830a83 | 13717 | } |
252b5132 RH |
13718 | } |
13719 | else | |
13720 | { | |
13721 | elf_elfheader (abfd)->e_flags = flags; | |
b34976b6 | 13722 | elf_flags_init (abfd) = TRUE; |
252b5132 RH |
13723 | } |
13724 | ||
b34976b6 | 13725 | return TRUE; |
252b5132 RH |
13726 | } |
13727 | ||
fc830a83 | 13728 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 13729 | |
b34976b6 | 13730 | static bfd_boolean |
57e8b36a | 13731 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
13732 | { |
13733 | flagword in_flags; | |
13734 | flagword out_flags; | |
13735 | ||
0ffa91dd | 13736 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
b34976b6 | 13737 | return TRUE; |
252b5132 | 13738 | |
fc830a83 | 13739 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
13740 | out_flags = elf_elfheader (obfd)->e_flags; |
13741 | ||
fc830a83 NC |
13742 | if (elf_flags_init (obfd) |
13743 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
13744 | && in_flags != out_flags) | |
252b5132 | 13745 | { |
252b5132 | 13746 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 13747 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
b34976b6 | 13748 | return FALSE; |
252b5132 RH |
13749 | |
13750 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 13751 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
b34976b6 | 13752 | return FALSE; |
252b5132 RH |
13753 | |
13754 | /* If the src and dest have different interworking flags | |
99059e56 | 13755 | then turn off the interworking bit. */ |
fd2ec330 | 13756 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 13757 | { |
fd2ec330 | 13758 | if (out_flags & EF_ARM_INTERWORK) |
d003868e | 13759 | _bfd_error_handler |
90b6238f | 13760 | (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"), |
d003868e | 13761 | obfd, ibfd); |
252b5132 | 13762 | |
fd2ec330 | 13763 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 13764 | } |
1006ba19 PB |
13765 | |
13766 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
13767 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
13768 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
13769 | } |
13770 | ||
13771 | elf_elfheader (obfd)->e_flags = in_flags; | |
b34976b6 | 13772 | elf_flags_init (obfd) = TRUE; |
252b5132 | 13773 | |
e2349352 | 13774 | return _bfd_elf_copy_private_bfd_data (ibfd, obfd); |
ee065d83 PB |
13775 | } |
13776 | ||
13777 | /* Values for Tag_ABI_PCS_R9_use. */ | |
13778 | enum | |
13779 | { | |
13780 | AEABI_R9_V6, | |
13781 | AEABI_R9_SB, | |
13782 | AEABI_R9_TLS, | |
13783 | AEABI_R9_unused | |
13784 | }; | |
13785 | ||
13786 | /* Values for Tag_ABI_PCS_RW_data. */ | |
13787 | enum | |
13788 | { | |
13789 | AEABI_PCS_RW_data_absolute, | |
13790 | AEABI_PCS_RW_data_PCrel, | |
13791 | AEABI_PCS_RW_data_SBrel, | |
13792 | AEABI_PCS_RW_data_unused | |
13793 | }; | |
13794 | ||
13795 | /* Values for Tag_ABI_enum_size. */ | |
13796 | enum | |
13797 | { | |
13798 | AEABI_enum_unused, | |
13799 | AEABI_enum_short, | |
13800 | AEABI_enum_wide, | |
13801 | AEABI_enum_forced_wide | |
13802 | }; | |
13803 | ||
104d59d1 JM |
13804 | /* Determine whether an object attribute tag takes an integer, a |
13805 | string or both. */ | |
906e58ca | 13806 | |
104d59d1 JM |
13807 | static int |
13808 | elf32_arm_obj_attrs_arg_type (int tag) | |
13809 | { | |
13810 | if (tag == Tag_compatibility) | |
3483fe2e | 13811 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 13812 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
13813 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
13814 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
13815 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 13816 | else if (tag < 32) |
3483fe2e | 13817 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 13818 | else |
3483fe2e | 13819 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
13820 | } |
13821 | ||
5aa6ff7c AS |
13822 | /* The ABI defines that Tag_conformance should be emitted first, and that |
13823 | Tag_nodefaults should be second (if either is defined). This sets those | |
13824 | two positions, and bumps up the position of all the remaining tags to | |
13825 | compensate. */ | |
13826 | static int | |
13827 | elf32_arm_obj_attrs_order (int num) | |
13828 | { | |
3de4a297 | 13829 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
5aa6ff7c | 13830 | return Tag_conformance; |
3de4a297 | 13831 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
5aa6ff7c AS |
13832 | return Tag_nodefaults; |
13833 | if ((num - 2) < Tag_nodefaults) | |
13834 | return num - 2; | |
13835 | if ((num - 1) < Tag_conformance) | |
13836 | return num - 1; | |
13837 | return num; | |
13838 | } | |
13839 | ||
e8b36cd1 JM |
13840 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
13841 | static bfd_boolean | |
13842 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) | |
13843 | { | |
13844 | if ((tag & 127) < 64) | |
13845 | { | |
13846 | _bfd_error_handler | |
90b6238f | 13847 | (_("%pB: unknown mandatory EABI object attribute %d"), |
e8b36cd1 JM |
13848 | abfd, tag); |
13849 | bfd_set_error (bfd_error_bad_value); | |
13850 | return FALSE; | |
13851 | } | |
13852 | else | |
13853 | { | |
13854 | _bfd_error_handler | |
90b6238f | 13855 | (_("warning: %pB: unknown EABI object attribute %d"), |
e8b36cd1 JM |
13856 | abfd, tag); |
13857 | return TRUE; | |
13858 | } | |
13859 | } | |
13860 | ||
91e22acd AS |
13861 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
13862 | Returns -1 if no architecture could be read. */ | |
13863 | ||
13864 | static int | |
13865 | get_secondary_compatible_arch (bfd *abfd) | |
13866 | { | |
13867 | obj_attribute *attr = | |
13868 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
13869 | ||
13870 | /* Note: the tag and its argument below are uleb128 values, though | |
13871 | currently-defined values fit in one byte for each. */ | |
13872 | if (attr->s | |
13873 | && attr->s[0] == Tag_CPU_arch | |
13874 | && (attr->s[1] & 128) != 128 | |
13875 | && attr->s[2] == 0) | |
13876 | return attr->s[1]; | |
13877 | ||
13878 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
13879 | return -1; | |
13880 | } | |
13881 | ||
13882 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
13883 | The tag is removed if ARCH is -1. */ | |
13884 | ||
8e79c3df | 13885 | static void |
91e22acd | 13886 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 13887 | { |
91e22acd AS |
13888 | obj_attribute *attr = |
13889 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 13890 | |
91e22acd AS |
13891 | if (arch == -1) |
13892 | { | |
13893 | attr->s = NULL; | |
13894 | return; | |
8e79c3df | 13895 | } |
91e22acd AS |
13896 | |
13897 | /* Note: the tag and its argument below are uleb128 values, though | |
13898 | currently-defined values fit in one byte for each. */ | |
13899 | if (!attr->s) | |
21d799b5 | 13900 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
13901 | attr->s[0] = Tag_CPU_arch; |
13902 | attr->s[1] = arch; | |
13903 | attr->s[2] = '\0'; | |
8e79c3df CM |
13904 | } |
13905 | ||
91e22acd AS |
13906 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
13907 | into account. */ | |
13908 | ||
13909 | static int | |
13910 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
13911 | int newtag, int secondary_compat) | |
8e79c3df | 13912 | { |
91e22acd AS |
13913 | #define T(X) TAG_CPU_ARCH_##X |
13914 | int tagl, tagh, result; | |
13915 | const int v6t2[] = | |
13916 | { | |
13917 | T(V6T2), /* PRE_V4. */ | |
13918 | T(V6T2), /* V4. */ | |
13919 | T(V6T2), /* V4T. */ | |
13920 | T(V6T2), /* V5T. */ | |
13921 | T(V6T2), /* V5TE. */ | |
13922 | T(V6T2), /* V5TEJ. */ | |
13923 | T(V6T2), /* V6. */ | |
13924 | T(V7), /* V6KZ. */ | |
13925 | T(V6T2) /* V6T2. */ | |
13926 | }; | |
13927 | const int v6k[] = | |
13928 | { | |
13929 | T(V6K), /* PRE_V4. */ | |
13930 | T(V6K), /* V4. */ | |
13931 | T(V6K), /* V4T. */ | |
13932 | T(V6K), /* V5T. */ | |
13933 | T(V6K), /* V5TE. */ | |
13934 | T(V6K), /* V5TEJ. */ | |
13935 | T(V6K), /* V6. */ | |
13936 | T(V6KZ), /* V6KZ. */ | |
13937 | T(V7), /* V6T2. */ | |
13938 | T(V6K) /* V6K. */ | |
13939 | }; | |
13940 | const int v7[] = | |
13941 | { | |
13942 | T(V7), /* PRE_V4. */ | |
13943 | T(V7), /* V4. */ | |
13944 | T(V7), /* V4T. */ | |
13945 | T(V7), /* V5T. */ | |
13946 | T(V7), /* V5TE. */ | |
13947 | T(V7), /* V5TEJ. */ | |
13948 | T(V7), /* V6. */ | |
13949 | T(V7), /* V6KZ. */ | |
13950 | T(V7), /* V6T2. */ | |
13951 | T(V7), /* V6K. */ | |
13952 | T(V7) /* V7. */ | |
13953 | }; | |
13954 | const int v6_m[] = | |
13955 | { | |
07d6d2b8 AM |
13956 | -1, /* PRE_V4. */ |
13957 | -1, /* V4. */ | |
91e22acd AS |
13958 | T(V6K), /* V4T. */ |
13959 | T(V6K), /* V5T. */ | |
13960 | T(V6K), /* V5TE. */ | |
13961 | T(V6K), /* V5TEJ. */ | |
13962 | T(V6K), /* V6. */ | |
13963 | T(V6KZ), /* V6KZ. */ | |
13964 | T(V7), /* V6T2. */ | |
13965 | T(V6K), /* V6K. */ | |
13966 | T(V7), /* V7. */ | |
13967 | T(V6_M) /* V6_M. */ | |
13968 | }; | |
13969 | const int v6s_m[] = | |
13970 | { | |
07d6d2b8 AM |
13971 | -1, /* PRE_V4. */ |
13972 | -1, /* V4. */ | |
91e22acd AS |
13973 | T(V6K), /* V4T. */ |
13974 | T(V6K), /* V5T. */ | |
13975 | T(V6K), /* V5TE. */ | |
13976 | T(V6K), /* V5TEJ. */ | |
13977 | T(V6K), /* V6. */ | |
13978 | T(V6KZ), /* V6KZ. */ | |
13979 | T(V7), /* V6T2. */ | |
13980 | T(V6K), /* V6K. */ | |
13981 | T(V7), /* V7. */ | |
13982 | T(V6S_M), /* V6_M. */ | |
13983 | T(V6S_M) /* V6S_M. */ | |
13984 | }; | |
9e3c6df6 PB |
13985 | const int v7e_m[] = |
13986 | { | |
07d6d2b8 AM |
13987 | -1, /* PRE_V4. */ |
13988 | -1, /* V4. */ | |
9e3c6df6 PB |
13989 | T(V7E_M), /* V4T. */ |
13990 | T(V7E_M), /* V5T. */ | |
13991 | T(V7E_M), /* V5TE. */ | |
13992 | T(V7E_M), /* V5TEJ. */ | |
13993 | T(V7E_M), /* V6. */ | |
13994 | T(V7E_M), /* V6KZ. */ | |
13995 | T(V7E_M), /* V6T2. */ | |
13996 | T(V7E_M), /* V6K. */ | |
13997 | T(V7E_M), /* V7. */ | |
13998 | T(V7E_M), /* V6_M. */ | |
13999 | T(V7E_M), /* V6S_M. */ | |
14000 | T(V7E_M) /* V7E_M. */ | |
14001 | }; | |
bca38921 MGD |
14002 | const int v8[] = |
14003 | { | |
14004 | T(V8), /* PRE_V4. */ | |
14005 | T(V8), /* V4. */ | |
14006 | T(V8), /* V4T. */ | |
14007 | T(V8), /* V5T. */ | |
14008 | T(V8), /* V5TE. */ | |
14009 | T(V8), /* V5TEJ. */ | |
14010 | T(V8), /* V6. */ | |
14011 | T(V8), /* V6KZ. */ | |
14012 | T(V8), /* V6T2. */ | |
14013 | T(V8), /* V6K. */ | |
14014 | T(V8), /* V7. */ | |
14015 | T(V8), /* V6_M. */ | |
14016 | T(V8), /* V6S_M. */ | |
14017 | T(V8), /* V7E_M. */ | |
14018 | T(V8) /* V8. */ | |
14019 | }; | |
bff0500d TP |
14020 | const int v8r[] = |
14021 | { | |
14022 | T(V8R), /* PRE_V4. */ | |
14023 | T(V8R), /* V4. */ | |
14024 | T(V8R), /* V4T. */ | |
14025 | T(V8R), /* V5T. */ | |
14026 | T(V8R), /* V5TE. */ | |
14027 | T(V8R), /* V5TEJ. */ | |
14028 | T(V8R), /* V6. */ | |
14029 | T(V8R), /* V6KZ. */ | |
14030 | T(V8R), /* V6T2. */ | |
14031 | T(V8R), /* V6K. */ | |
14032 | T(V8R), /* V7. */ | |
14033 | T(V8R), /* V6_M. */ | |
14034 | T(V8R), /* V6S_M. */ | |
14035 | T(V8R), /* V7E_M. */ | |
14036 | T(V8), /* V8. */ | |
14037 | T(V8R), /* V8R. */ | |
14038 | }; | |
2fd158eb TP |
14039 | const int v8m_baseline[] = |
14040 | { | |
14041 | -1, /* PRE_V4. */ | |
14042 | -1, /* V4. */ | |
14043 | -1, /* V4T. */ | |
14044 | -1, /* V5T. */ | |
14045 | -1, /* V5TE. */ | |
14046 | -1, /* V5TEJ. */ | |
14047 | -1, /* V6. */ | |
14048 | -1, /* V6KZ. */ | |
14049 | -1, /* V6T2. */ | |
14050 | -1, /* V6K. */ | |
14051 | -1, /* V7. */ | |
14052 | T(V8M_BASE), /* V6_M. */ | |
14053 | T(V8M_BASE), /* V6S_M. */ | |
14054 | -1, /* V7E_M. */ | |
14055 | -1, /* V8. */ | |
bff0500d | 14056 | -1, /* V8R. */ |
2fd158eb TP |
14057 | T(V8M_BASE) /* V8-M BASELINE. */ |
14058 | }; | |
14059 | const int v8m_mainline[] = | |
14060 | { | |
14061 | -1, /* PRE_V4. */ | |
14062 | -1, /* V4. */ | |
14063 | -1, /* V4T. */ | |
14064 | -1, /* V5T. */ | |
14065 | -1, /* V5TE. */ | |
14066 | -1, /* V5TEJ. */ | |
14067 | -1, /* V6. */ | |
14068 | -1, /* V6KZ. */ | |
14069 | -1, /* V6T2. */ | |
14070 | -1, /* V6K. */ | |
14071 | T(V8M_MAIN), /* V7. */ | |
14072 | T(V8M_MAIN), /* V6_M. */ | |
14073 | T(V8M_MAIN), /* V6S_M. */ | |
14074 | T(V8M_MAIN), /* V7E_M. */ | |
14075 | -1, /* V8. */ | |
bff0500d | 14076 | -1, /* V8R. */ |
2fd158eb TP |
14077 | T(V8M_MAIN), /* V8-M BASELINE. */ |
14078 | T(V8M_MAIN) /* V8-M MAINLINE. */ | |
14079 | }; | |
91e22acd AS |
14080 | const int v4t_plus_v6_m[] = |
14081 | { | |
14082 | -1, /* PRE_V4. */ | |
14083 | -1, /* V4. */ | |
14084 | T(V4T), /* V4T. */ | |
14085 | T(V5T), /* V5T. */ | |
14086 | T(V5TE), /* V5TE. */ | |
14087 | T(V5TEJ), /* V5TEJ. */ | |
14088 | T(V6), /* V6. */ | |
14089 | T(V6KZ), /* V6KZ. */ | |
14090 | T(V6T2), /* V6T2. */ | |
14091 | T(V6K), /* V6K. */ | |
14092 | T(V7), /* V7. */ | |
14093 | T(V6_M), /* V6_M. */ | |
14094 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 14095 | T(V7E_M), /* V7E_M. */ |
bca38921 | 14096 | T(V8), /* V8. */ |
bff0500d | 14097 | -1, /* V8R. */ |
2fd158eb TP |
14098 | T(V8M_BASE), /* V8-M BASELINE. */ |
14099 | T(V8M_MAIN), /* V8-M MAINLINE. */ | |
91e22acd AS |
14100 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
14101 | }; | |
14102 | const int *comb[] = | |
14103 | { | |
14104 | v6t2, | |
14105 | v6k, | |
14106 | v7, | |
14107 | v6_m, | |
14108 | v6s_m, | |
9e3c6df6 | 14109 | v7e_m, |
bca38921 | 14110 | v8, |
bff0500d | 14111 | v8r, |
2fd158eb TP |
14112 | v8m_baseline, |
14113 | v8m_mainline, | |
91e22acd AS |
14114 | /* Pseudo-architecture. */ |
14115 | v4t_plus_v6_m | |
14116 | }; | |
14117 | ||
14118 | /* Check we've not got a higher architecture than we know about. */ | |
14119 | ||
9e3c6df6 | 14120 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 14121 | { |
90b6238f | 14122 | _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd); |
91e22acd AS |
14123 | return -1; |
14124 | } | |
14125 | ||
14126 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
14127 | ||
14128 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
14129 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
14130 | oldtag = T(V4T_PLUS_V6_M); | |
14131 | ||
14132 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
14133 | input. */ | |
14134 | ||
14135 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
14136 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
14137 | newtag = T(V4T_PLUS_V6_M); | |
14138 | ||
14139 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
14140 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
14141 | ||
14142 | /* Architectures before V6KZ add features monotonically. */ | |
14143 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
14144 | return result; | |
14145 | ||
4ed7ed8d | 14146 | result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1; |
91e22acd AS |
14147 | |
14148 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
14149 | as the canonical version. */ | |
14150 | if (result == T(V4T_PLUS_V6_M)) | |
14151 | { | |
14152 | result = T(V4T); | |
14153 | *secondary_compat_out = T(V6_M); | |
14154 | } | |
14155 | else | |
14156 | *secondary_compat_out = -1; | |
14157 | ||
14158 | if (result == -1) | |
14159 | { | |
90b6238f | 14160 | _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"), |
91e22acd AS |
14161 | ibfd, oldtag, newtag); |
14162 | return -1; | |
14163 | } | |
14164 | ||
14165 | return result; | |
14166 | #undef T | |
8e79c3df CM |
14167 | } |
14168 | ||
ac56ee8f MGD |
14169 | /* Query attributes object to see if integer divide instructions may be |
14170 | present in an object. */ | |
14171 | static bfd_boolean | |
14172 | elf32_arm_attributes_accept_div (const obj_attribute *attr) | |
14173 | { | |
14174 | int arch = attr[Tag_CPU_arch].i; | |
14175 | int profile = attr[Tag_CPU_arch_profile].i; | |
14176 | ||
14177 | switch (attr[Tag_DIV_use].i) | |
14178 | { | |
14179 | case 0: | |
14180 | /* Integer divide allowed if instruction contained in archetecture. */ | |
14181 | if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) | |
14182 | return TRUE; | |
14183 | else if (arch >= TAG_CPU_ARCH_V7E_M) | |
14184 | return TRUE; | |
14185 | else | |
14186 | return FALSE; | |
14187 | ||
14188 | case 1: | |
14189 | /* Integer divide explicitly prohibited. */ | |
14190 | return FALSE; | |
14191 | ||
14192 | default: | |
14193 | /* Unrecognised case - treat as allowing divide everywhere. */ | |
14194 | case 2: | |
14195 | /* Integer divide allowed in ARM state. */ | |
14196 | return TRUE; | |
14197 | } | |
14198 | } | |
14199 | ||
14200 | /* Query attributes object to see if integer divide instructions are | |
14201 | forbidden to be in the object. This is not the inverse of | |
14202 | elf32_arm_attributes_accept_div. */ | |
14203 | static bfd_boolean | |
14204 | elf32_arm_attributes_forbid_div (const obj_attribute *attr) | |
14205 | { | |
14206 | return attr[Tag_DIV_use].i == 1; | |
14207 | } | |
14208 | ||
ee065d83 PB |
14209 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
14210 | are conflicting attributes. */ | |
906e58ca | 14211 | |
ee065d83 | 14212 | static bfd_boolean |
50e03d47 | 14213 | elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info) |
ee065d83 | 14214 | { |
50e03d47 | 14215 | bfd *obfd = info->output_bfd; |
104d59d1 JM |
14216 | obj_attribute *in_attr; |
14217 | obj_attribute *out_attr; | |
ee065d83 PB |
14218 | /* Some tags have 0 = don't care, 1 = strong requirement, |
14219 | 2 = weak requirement. */ | |
91e22acd | 14220 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 14221 | int i; |
91e22acd | 14222 | bfd_boolean result = TRUE; |
9274e9de | 14223 | const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section; |
ee065d83 | 14224 | |
3e6b1042 DJ |
14225 | /* Skip the linker stubs file. This preserves previous behavior |
14226 | of accepting unknown attributes in the first input file - but | |
14227 | is that a bug? */ | |
14228 | if (ibfd->flags & BFD_LINKER_CREATED) | |
14229 | return TRUE; | |
14230 | ||
9274e9de TG |
14231 | /* Skip any input that hasn't attribute section. |
14232 | This enables to link object files without attribute section with | |
14233 | any others. */ | |
14234 | if (bfd_get_section_by_name (ibfd, sec_name) == NULL) | |
14235 | return TRUE; | |
14236 | ||
104d59d1 | 14237 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
14238 | { |
14239 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 14240 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 | 14241 | |
cd21e546 MGD |
14242 | out_attr = elf_known_obj_attributes_proc (obfd); |
14243 | ||
004ae526 PB |
14244 | /* Use the Tag_null value to indicate the attributes have been |
14245 | initialized. */ | |
cd21e546 | 14246 | out_attr[0].i = 1; |
004ae526 | 14247 | |
cd21e546 MGD |
14248 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
14249 | the attribute's value to Tag_MPextension_use. */ | |
14250 | if (out_attr[Tag_MPextension_use_legacy].i != 0) | |
14251 | { | |
14252 | if (out_attr[Tag_MPextension_use].i != 0 | |
14253 | && out_attr[Tag_MPextension_use_legacy].i | |
99059e56 | 14254 | != out_attr[Tag_MPextension_use].i) |
cd21e546 MGD |
14255 | { |
14256 | _bfd_error_handler | |
871b3ab2 | 14257 | (_("Error: %pB has both the current and legacy " |
cd21e546 MGD |
14258 | "Tag_MPextension_use attributes"), ibfd); |
14259 | result = FALSE; | |
14260 | } | |
14261 | ||
14262 | out_attr[Tag_MPextension_use] = | |
14263 | out_attr[Tag_MPextension_use_legacy]; | |
14264 | out_attr[Tag_MPextension_use_legacy].type = 0; | |
14265 | out_attr[Tag_MPextension_use_legacy].i = 0; | |
14266 | } | |
14267 | ||
14268 | return result; | |
ee065d83 PB |
14269 | } |
14270 | ||
104d59d1 JM |
14271 | in_attr = elf_known_obj_attributes_proc (ibfd); |
14272 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
14273 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
14274 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
14275 | { | |
5c294fee TG |
14276 | /* Ignore mismatches if the object doesn't use floating point or is |
14277 | floating point ABI independent. */ | |
14278 | if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none | |
14279 | || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none | |
14280 | && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible)) | |
ee065d83 | 14281 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; |
5c294fee TG |
14282 | else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none |
14283 | && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible) | |
ee065d83 PB |
14284 | { |
14285 | _bfd_error_handler | |
871b3ab2 | 14286 | (_("error: %pB uses VFP register arguments, %pB does not"), |
deddc40b NS |
14287 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
14288 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
91e22acd | 14289 | result = FALSE; |
ee065d83 PB |
14290 | } |
14291 | } | |
14292 | ||
3de4a297 | 14293 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
14294 | { |
14295 | /* Merge this attribute with existing attributes. */ | |
14296 | switch (i) | |
14297 | { | |
14298 | case Tag_CPU_raw_name: | |
14299 | case Tag_CPU_name: | |
6a631e86 | 14300 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
14301 | break; |
14302 | ||
14303 | case Tag_ABI_optimization_goals: | |
14304 | case Tag_ABI_FP_optimization_goals: | |
14305 | /* Use the first value seen. */ | |
14306 | break; | |
14307 | ||
14308 | case Tag_CPU_arch: | |
91e22acd AS |
14309 | { |
14310 | int secondary_compat = -1, secondary_compat_out = -1; | |
14311 | unsigned int saved_out_attr = out_attr[i].i; | |
70e99720 TG |
14312 | int arch_attr; |
14313 | static const char *name_table[] = | |
14314 | { | |
91e22acd AS |
14315 | /* These aren't real CPU names, but we can't guess |
14316 | that from the architecture version alone. */ | |
14317 | "Pre v4", | |
14318 | "ARM v4", | |
14319 | "ARM v4T", | |
14320 | "ARM v5T", | |
14321 | "ARM v5TE", | |
14322 | "ARM v5TEJ", | |
14323 | "ARM v6", | |
14324 | "ARM v6KZ", | |
14325 | "ARM v6T2", | |
14326 | "ARM v6K", | |
14327 | "ARM v7", | |
14328 | "ARM v6-M", | |
bca38921 | 14329 | "ARM v6S-M", |
2fd158eb TP |
14330 | "ARM v8", |
14331 | "", | |
14332 | "ARM v8-M.baseline", | |
14333 | "ARM v8-M.mainline", | |
91e22acd AS |
14334 | }; |
14335 | ||
14336 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
14337 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
14338 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
70e99720 TG |
14339 | arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i, |
14340 | &secondary_compat_out, | |
14341 | in_attr[i].i, | |
14342 | secondary_compat); | |
14343 | ||
14344 | /* Return with error if failed to merge. */ | |
14345 | if (arch_attr == -1) | |
14346 | return FALSE; | |
14347 | ||
14348 | out_attr[i].i = arch_attr; | |
14349 | ||
91e22acd AS |
14350 | set_secondary_compatible_arch (obfd, secondary_compat_out); |
14351 | ||
14352 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
14353 | if (out_attr[i].i == saved_out_attr) | |
14354 | ; /* Leave the names alone. */ | |
14355 | else if (out_attr[i].i == in_attr[i].i) | |
14356 | { | |
14357 | /* The output architecture has been changed to match the | |
14358 | input architecture. Use the input names. */ | |
14359 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
14360 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
14361 | : NULL; | |
14362 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
14363 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
14364 | : NULL; | |
14365 | } | |
14366 | else | |
14367 | { | |
14368 | out_attr[Tag_CPU_name].s = NULL; | |
14369 | out_attr[Tag_CPU_raw_name].s = NULL; | |
14370 | } | |
14371 | ||
14372 | /* If we still don't have a value for Tag_CPU_name, | |
14373 | make one up now. Tag_CPU_raw_name remains blank. */ | |
14374 | if (out_attr[Tag_CPU_name].s == NULL | |
14375 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
14376 | out_attr[Tag_CPU_name].s = | |
14377 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
14378 | } | |
14379 | break; | |
14380 | ||
ee065d83 PB |
14381 | case Tag_ARM_ISA_use: |
14382 | case Tag_THUMB_ISA_use: | |
ee065d83 | 14383 | case Tag_WMMX_arch: |
91e22acd AS |
14384 | case Tag_Advanced_SIMD_arch: |
14385 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 14386 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
14387 | case Tag_ABI_FP_exceptions: |
14388 | case Tag_ABI_FP_user_exceptions: | |
14389 | case Tag_ABI_FP_number_model: | |
75375b3e | 14390 | case Tag_FP_HP_extension: |
91e22acd AS |
14391 | case Tag_CPU_unaligned_access: |
14392 | case Tag_T2EE_use: | |
91e22acd | 14393 | case Tag_MPextension_use: |
ee065d83 PB |
14394 | /* Use the largest value specified. */ |
14395 | if (in_attr[i].i > out_attr[i].i) | |
14396 | out_attr[i].i = in_attr[i].i; | |
14397 | break; | |
14398 | ||
75375b3e | 14399 | case Tag_ABI_align_preserved: |
91e22acd AS |
14400 | case Tag_ABI_PCS_RO_data: |
14401 | /* Use the smallest value specified. */ | |
14402 | if (in_attr[i].i < out_attr[i].i) | |
14403 | out_attr[i].i = in_attr[i].i; | |
14404 | break; | |
14405 | ||
75375b3e | 14406 | case Tag_ABI_align_needed: |
91e22acd | 14407 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
75375b3e MGD |
14408 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
14409 | || out_attr[Tag_ABI_align_preserved].i == 0)) | |
ee065d83 | 14410 | { |
91e22acd AS |
14411 | /* This error message should be enabled once all non-conformant |
14412 | binaries in the toolchain have had the attributes set | |
14413 | properly. | |
ee065d83 | 14414 | _bfd_error_handler |
871b3ab2 | 14415 | (_("error: %pB: 8-byte data alignment conflicts with %pB"), |
91e22acd AS |
14416 | obfd, ibfd); |
14417 | result = FALSE; */ | |
ee065d83 | 14418 | } |
91e22acd AS |
14419 | /* Fall through. */ |
14420 | case Tag_ABI_FP_denormal: | |
14421 | case Tag_ABI_PCS_GOT_use: | |
14422 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
14423 | value if greater than 2 (for future-proofing). */ | |
14424 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
14425 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
14426 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
14427 | out_attr[i].i = in_attr[i].i; |
14428 | break; | |
91e22acd | 14429 | |
75375b3e MGD |
14430 | case Tag_Virtualization_use: |
14431 | /* The virtualization tag effectively stores two bits of | |
14432 | information: the intended use of TrustZone (in bit 0), and the | |
14433 | intended use of Virtualization (in bit 1). */ | |
14434 | if (out_attr[i].i == 0) | |
14435 | out_attr[i].i = in_attr[i].i; | |
14436 | else if (in_attr[i].i != 0 | |
14437 | && in_attr[i].i != out_attr[i].i) | |
14438 | { | |
14439 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) | |
14440 | out_attr[i].i = 3; | |
14441 | else | |
14442 | { | |
14443 | _bfd_error_handler | |
871b3ab2 AM |
14444 | (_("error: %pB: unable to merge virtualization attributes " |
14445 | "with %pB"), | |
75375b3e MGD |
14446 | obfd, ibfd); |
14447 | result = FALSE; | |
14448 | } | |
14449 | } | |
14450 | break; | |
91e22acd AS |
14451 | |
14452 | case Tag_CPU_arch_profile: | |
14453 | if (out_attr[i].i != in_attr[i].i) | |
14454 | { | |
14455 | /* 0 will merge with anything. | |
14456 | 'A' and 'S' merge to 'A'. | |
14457 | 'R' and 'S' merge to 'R'. | |
99059e56 | 14458 | 'M' and 'A|R|S' is an error. */ |
91e22acd AS |
14459 | if (out_attr[i].i == 0 |
14460 | || (out_attr[i].i == 'S' | |
14461 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
14462 | out_attr[i].i = in_attr[i].i; | |
14463 | else if (in_attr[i].i == 0 | |
14464 | || (in_attr[i].i == 'S' | |
14465 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
6a631e86 | 14466 | ; /* Do nothing. */ |
91e22acd AS |
14467 | else |
14468 | { | |
14469 | _bfd_error_handler | |
90b6238f | 14470 | (_("error: %pB: conflicting architecture profiles %c/%c"), |
91e22acd AS |
14471 | ibfd, |
14472 | in_attr[i].i ? in_attr[i].i : '0', | |
14473 | out_attr[i].i ? out_attr[i].i : '0'); | |
14474 | result = FALSE; | |
14475 | } | |
14476 | } | |
14477 | break; | |
15afaa63 TP |
14478 | |
14479 | case Tag_DSP_extension: | |
14480 | /* No need to change output value if any of: | |
14481 | - pre (<=) ARMv5T input architecture (do not have DSP) | |
14482 | - M input profile not ARMv7E-M and do not have DSP. */ | |
14483 | if (in_attr[Tag_CPU_arch].i <= 3 | |
14484 | || (in_attr[Tag_CPU_arch_profile].i == 'M' | |
14485 | && in_attr[Tag_CPU_arch].i != 13 | |
14486 | && in_attr[i].i == 0)) | |
14487 | ; /* Do nothing. */ | |
14488 | /* Output value should be 0 if DSP part of architecture, ie. | |
14489 | - post (>=) ARMv5te architecture output | |
14490 | - A, R or S profile output or ARMv7E-M output architecture. */ | |
14491 | else if (out_attr[Tag_CPU_arch].i >= 4 | |
14492 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
14493 | || out_attr[Tag_CPU_arch_profile].i == 'R' | |
14494 | || out_attr[Tag_CPU_arch_profile].i == 'S' | |
14495 | || out_attr[Tag_CPU_arch].i == 13)) | |
14496 | out_attr[i].i = 0; | |
14497 | /* Otherwise, DSP instructions are added and not part of output | |
14498 | architecture. */ | |
14499 | else | |
14500 | out_attr[i].i = 1; | |
14501 | break; | |
14502 | ||
75375b3e | 14503 | case Tag_FP_arch: |
62f3b8c8 | 14504 | { |
4547cb56 NC |
14505 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
14506 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch | |
14507 | when it's 0. It might mean absence of FP hardware if | |
99654aaf | 14508 | Tag_FP_arch is zero. */ |
4547cb56 | 14509 | |
a715796b | 14510 | #define VFP_VERSION_COUNT 9 |
62f3b8c8 PB |
14511 | static const struct |
14512 | { | |
14513 | int ver; | |
14514 | int regs; | |
bca38921 | 14515 | } vfp_versions[VFP_VERSION_COUNT] = |
62f3b8c8 PB |
14516 | { |
14517 | {0, 0}, | |
14518 | {1, 16}, | |
14519 | {2, 16}, | |
14520 | {3, 32}, | |
14521 | {3, 16}, | |
14522 | {4, 32}, | |
bca38921 | 14523 | {4, 16}, |
a715796b TG |
14524 | {8, 32}, |
14525 | {8, 16} | |
62f3b8c8 PB |
14526 | }; |
14527 | int ver; | |
14528 | int regs; | |
14529 | int newval; | |
14530 | ||
4547cb56 NC |
14531 | /* If the output has no requirement about FP hardware, |
14532 | follow the requirement of the input. */ | |
14533 | if (out_attr[i].i == 0) | |
14534 | { | |
4ec192e6 RE |
14535 | /* This assert is still reasonable, we shouldn't |
14536 | produce the suspicious build attribute | |
14537 | combination (See below for in_attr). */ | |
4547cb56 NC |
14538 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); |
14539 | out_attr[i].i = in_attr[i].i; | |
14540 | out_attr[Tag_ABI_HardFP_use].i | |
14541 | = in_attr[Tag_ABI_HardFP_use].i; | |
14542 | break; | |
14543 | } | |
14544 | /* If the input has no requirement about FP hardware, do | |
14545 | nothing. */ | |
14546 | else if (in_attr[i].i == 0) | |
14547 | { | |
4ec192e6 RE |
14548 | /* We used to assert that Tag_ABI_HardFP_use was |
14549 | zero here, but we should never assert when | |
14550 | consuming an object file that has suspicious | |
14551 | build attributes. The single precision variant | |
14552 | of 'no FP architecture' is still 'no FP | |
14553 | architecture', so we just ignore the tag in this | |
14554 | case. */ | |
4547cb56 NC |
14555 | break; |
14556 | } | |
14557 | ||
14558 | /* Both the input and the output have nonzero Tag_FP_arch. | |
99654aaf | 14559 | So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */ |
4547cb56 NC |
14560 | |
14561 | /* If both the input and the output have zero Tag_ABI_HardFP_use, | |
14562 | do nothing. */ | |
14563 | if (in_attr[Tag_ABI_HardFP_use].i == 0 | |
14564 | && out_attr[Tag_ABI_HardFP_use].i == 0) | |
14565 | ; | |
14566 | /* If the input and the output have different Tag_ABI_HardFP_use, | |
99654aaf | 14567 | the combination of them is 0 (implied by Tag_FP_arch). */ |
4547cb56 NC |
14568 | else if (in_attr[Tag_ABI_HardFP_use].i |
14569 | != out_attr[Tag_ABI_HardFP_use].i) | |
99654aaf | 14570 | out_attr[Tag_ABI_HardFP_use].i = 0; |
4547cb56 NC |
14571 | |
14572 | /* Now we can handle Tag_FP_arch. */ | |
14573 | ||
bca38921 MGD |
14574 | /* Values of VFP_VERSION_COUNT or more aren't defined, so just |
14575 | pick the biggest. */ | |
14576 | if (in_attr[i].i >= VFP_VERSION_COUNT | |
14577 | && in_attr[i].i > out_attr[i].i) | |
62f3b8c8 PB |
14578 | { |
14579 | out_attr[i] = in_attr[i]; | |
14580 | break; | |
14581 | } | |
14582 | /* The output uses the superset of input features | |
14583 | (ISA version) and registers. */ | |
14584 | ver = vfp_versions[in_attr[i].i].ver; | |
14585 | if (ver < vfp_versions[out_attr[i].i].ver) | |
14586 | ver = vfp_versions[out_attr[i].i].ver; | |
14587 | regs = vfp_versions[in_attr[i].i].regs; | |
14588 | if (regs < vfp_versions[out_attr[i].i].regs) | |
14589 | regs = vfp_versions[out_attr[i].i].regs; | |
14590 | /* This assumes all possible supersets are also a valid | |
99059e56 | 14591 | options. */ |
bca38921 | 14592 | for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--) |
62f3b8c8 PB |
14593 | { |
14594 | if (regs == vfp_versions[newval].regs | |
14595 | && ver == vfp_versions[newval].ver) | |
14596 | break; | |
14597 | } | |
14598 | out_attr[i].i = newval; | |
14599 | } | |
b1cc4aeb | 14600 | break; |
ee065d83 PB |
14601 | case Tag_PCS_config: |
14602 | if (out_attr[i].i == 0) | |
14603 | out_attr[i].i = in_attr[i].i; | |
b6009aca | 14604 | else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i) |
ee065d83 PB |
14605 | { |
14606 | /* It's sometimes ok to mix different configs, so this is only | |
99059e56 | 14607 | a warning. */ |
ee065d83 | 14608 | _bfd_error_handler |
90b6238f | 14609 | (_("warning: %pB: conflicting platform configuration"), ibfd); |
ee065d83 PB |
14610 | } |
14611 | break; | |
14612 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
14613 | if (in_attr[i].i != out_attr[i].i |
14614 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
14615 | && in_attr[i].i != AEABI_R9_unused) |
14616 | { | |
14617 | _bfd_error_handler | |
90b6238f | 14618 | (_("error: %pB: conflicting use of R9"), ibfd); |
91e22acd | 14619 | result = FALSE; |
ee065d83 PB |
14620 | } |
14621 | if (out_attr[i].i == AEABI_R9_unused) | |
14622 | out_attr[i].i = in_attr[i].i; | |
14623 | break; | |
14624 | case Tag_ABI_PCS_RW_data: | |
14625 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
14626 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
14627 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
14628 | { | |
14629 | _bfd_error_handler | |
871b3ab2 | 14630 | (_("error: %pB: SB relative addressing conflicts with use of R9"), |
ee065d83 | 14631 | ibfd); |
91e22acd | 14632 | result = FALSE; |
ee065d83 PB |
14633 | } |
14634 | /* Use the smallest value specified. */ | |
14635 | if (in_attr[i].i < out_attr[i].i) | |
14636 | out_attr[i].i = in_attr[i].i; | |
14637 | break; | |
ee065d83 | 14638 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
14639 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
14640 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
14641 | { |
14642 | _bfd_error_handler | |
871b3ab2 | 14643 | (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
a9dc9481 | 14644 | ibfd, in_attr[i].i, out_attr[i].i); |
ee065d83 | 14645 | } |
a9dc9481 | 14646 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
14647 | out_attr[i].i = in_attr[i].i; |
14648 | break; | |
ee065d83 PB |
14649 | case Tag_ABI_enum_size: |
14650 | if (in_attr[i].i != AEABI_enum_unused) | |
14651 | { | |
14652 | if (out_attr[i].i == AEABI_enum_unused | |
14653 | || out_attr[i].i == AEABI_enum_forced_wide) | |
14654 | { | |
14655 | /* The existing object is compatible with anything. | |
14656 | Use whatever requirements the new object has. */ | |
14657 | out_attr[i].i = in_attr[i].i; | |
14658 | } | |
14659 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 14660 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 14661 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 14662 | { |
91e22acd | 14663 | static const char *aeabi_enum_names[] = |
bf21ed78 | 14664 | { "", "variable-size", "32-bit", "" }; |
91e22acd AS |
14665 | const char *in_name = |
14666 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
14667 | ? aeabi_enum_names[in_attr[i].i] | |
14668 | : "<unknown>"; | |
14669 | const char *out_name = | |
14670 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
14671 | ? aeabi_enum_names[out_attr[i].i] | |
14672 | : "<unknown>"; | |
ee065d83 | 14673 | _bfd_error_handler |
871b3ab2 | 14674 | (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 14675 | ibfd, in_name, out_name); |
ee065d83 PB |
14676 | } |
14677 | } | |
14678 | break; | |
14679 | case Tag_ABI_VFP_args: | |
14680 | /* Aready done. */ | |
14681 | break; | |
14682 | case Tag_ABI_WMMX_args: | |
14683 | if (in_attr[i].i != out_attr[i].i) | |
14684 | { | |
14685 | _bfd_error_handler | |
871b3ab2 | 14686 | (_("error: %pB uses iWMMXt register arguments, %pB does not"), |
ee065d83 | 14687 | ibfd, obfd); |
91e22acd | 14688 | result = FALSE; |
ee065d83 PB |
14689 | } |
14690 | break; | |
7b86a9fa AS |
14691 | case Tag_compatibility: |
14692 | /* Merged in target-independent code. */ | |
14693 | break; | |
91e22acd | 14694 | case Tag_ABI_HardFP_use: |
4547cb56 | 14695 | /* This is handled along with Tag_FP_arch. */ |
91e22acd AS |
14696 | break; |
14697 | case Tag_ABI_FP_16bit_format: | |
14698 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
14699 | { | |
14700 | if (in_attr[i].i != out_attr[i].i) | |
14701 | { | |
14702 | _bfd_error_handler | |
871b3ab2 | 14703 | (_("error: fp16 format mismatch between %pB and %pB"), |
91e22acd AS |
14704 | ibfd, obfd); |
14705 | result = FALSE; | |
14706 | } | |
14707 | } | |
14708 | if (in_attr[i].i != 0) | |
14709 | out_attr[i].i = in_attr[i].i; | |
14710 | break; | |
7b86a9fa | 14711 | |
cd21e546 | 14712 | case Tag_DIV_use: |
ac56ee8f MGD |
14713 | /* A value of zero on input means that the divide instruction may |
14714 | be used if available in the base architecture as specified via | |
14715 | Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that | |
14716 | the user did not want divide instructions. A value of 2 | |
14717 | explicitly means that divide instructions were allowed in ARM | |
14718 | and Thumb state. */ | |
14719 | if (in_attr[i].i == out_attr[i].i) | |
14720 | /* Do nothing. */ ; | |
14721 | else if (elf32_arm_attributes_forbid_div (in_attr) | |
14722 | && !elf32_arm_attributes_accept_div (out_attr)) | |
14723 | out_attr[i].i = 1; | |
14724 | else if (elf32_arm_attributes_forbid_div (out_attr) | |
14725 | && elf32_arm_attributes_accept_div (in_attr)) | |
14726 | out_attr[i].i = in_attr[i].i; | |
14727 | else if (in_attr[i].i == 2) | |
14728 | out_attr[i].i = in_attr[i].i; | |
cd21e546 MGD |
14729 | break; |
14730 | ||
14731 | case Tag_MPextension_use_legacy: | |
14732 | /* We don't output objects with Tag_MPextension_use_legacy - we | |
14733 | move the value to Tag_MPextension_use. */ | |
14734 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) | |
14735 | { | |
14736 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) | |
14737 | { | |
14738 | _bfd_error_handler | |
871b3ab2 | 14739 | (_("%pB has both the current and legacy " |
b38cadfb | 14740 | "Tag_MPextension_use attributes"), |
cd21e546 MGD |
14741 | ibfd); |
14742 | result = FALSE; | |
14743 | } | |
14744 | } | |
14745 | ||
14746 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) | |
14747 | out_attr[Tag_MPextension_use] = in_attr[i]; | |
14748 | ||
14749 | break; | |
14750 | ||
91e22acd | 14751 | case Tag_nodefaults: |
2d0bb761 AS |
14752 | /* This tag is set if it exists, but the value is unused (and is |
14753 | typically zero). We don't actually need to do anything here - | |
14754 | the merge happens automatically when the type flags are merged | |
14755 | below. */ | |
91e22acd AS |
14756 | break; |
14757 | case Tag_also_compatible_with: | |
14758 | /* Already done in Tag_CPU_arch. */ | |
14759 | break; | |
14760 | case Tag_conformance: | |
14761 | /* Keep the attribute if it matches. Throw it away otherwise. | |
14762 | No attribute means no claim to conform. */ | |
14763 | if (!in_attr[i].s || !out_attr[i].s | |
14764 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
14765 | out_attr[i].s = NULL; | |
14766 | break; | |
3cfad14c | 14767 | |
91e22acd | 14768 | default: |
e8b36cd1 JM |
14769 | result |
14770 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); | |
91e22acd AS |
14771 | } |
14772 | ||
14773 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
14774 | if (in_attr[i].type && !out_attr[i].type) | |
14775 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
14776 | } |
14777 | ||
104d59d1 | 14778 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
50e03d47 | 14779 | if (!_bfd_elf_merge_object_attributes (ibfd, info)) |
5488d830 | 14780 | return FALSE; |
ee065d83 | 14781 | |
104d59d1 | 14782 | /* Check for any attributes not known on ARM. */ |
e8b36cd1 | 14783 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
91e22acd | 14784 | |
91e22acd | 14785 | return result; |
252b5132 RH |
14786 | } |
14787 | ||
3a4a14e9 PB |
14788 | |
14789 | /* Return TRUE if the two EABI versions are incompatible. */ | |
14790 | ||
14791 | static bfd_boolean | |
14792 | elf32_arm_versions_compatible (unsigned iver, unsigned over) | |
14793 | { | |
14794 | /* v4 and v5 are the same spec before and after it was released, | |
14795 | so allow mixing them. */ | |
14796 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
14797 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
14798 | return TRUE; | |
14799 | ||
14800 | return (iver == over); | |
14801 | } | |
14802 | ||
252b5132 RH |
14803 | /* Merge backend specific data from an object file to the output |
14804 | object file when linking. */ | |
9b485d32 | 14805 | |
b34976b6 | 14806 | static bfd_boolean |
50e03d47 | 14807 | elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *); |
252b5132 | 14808 | |
9b485d32 NC |
14809 | /* Display the flags field. */ |
14810 | ||
b34976b6 | 14811 | static bfd_boolean |
57e8b36a | 14812 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 14813 | { |
fc830a83 NC |
14814 | FILE * file = (FILE *) ptr; |
14815 | unsigned long flags; | |
252b5132 RH |
14816 | |
14817 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
14818 | ||
14819 | /* Print normal ELF private data. */ | |
14820 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
14821 | ||
fc830a83 | 14822 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
14823 | /* Ignore init flag - it may not be set, despite the flags field |
14824 | containing valid data. */ | |
252b5132 | 14825 | |
9b485d32 | 14826 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 14827 | |
fc830a83 NC |
14828 | switch (EF_ARM_EABI_VERSION (flags)) |
14829 | { | |
14830 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 14831 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
14832 | official ARM ELF extended ABI. Hence they are only decoded if |
14833 | the EABI version is not set. */ | |
fd2ec330 | 14834 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 14835 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 14836 | |
fd2ec330 | 14837 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 14838 | fprintf (file, " [APCS-26]"); |
fc830a83 | 14839 | else |
6c571f00 | 14840 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 14841 | |
96a846ea RE |
14842 | if (flags & EF_ARM_VFP_FLOAT) |
14843 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
14844 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
14845 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
14846 | else |
14847 | fprintf (file, _(" [FPA float format]")); | |
14848 | ||
fd2ec330 | 14849 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 14850 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 14851 | |
fd2ec330 | 14852 | if (flags & EF_ARM_PIC) |
9b485d32 | 14853 | fprintf (file, _(" [position independent]")); |
fc830a83 | 14854 | |
fd2ec330 | 14855 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 14856 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 14857 | |
fd2ec330 | 14858 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 14859 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 14860 | |
fd2ec330 | 14861 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 14862 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 14863 | |
96a846ea RE |
14864 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
14865 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
14866 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
14867 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 14868 | break; |
9a5aca8c | 14869 | |
fc830a83 | 14870 | case EF_ARM_EABI_VER1: |
9b485d32 | 14871 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 14872 | |
fc830a83 | 14873 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 14874 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 14875 | else |
9b485d32 | 14876 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 14877 | |
fc830a83 NC |
14878 | flags &= ~ EF_ARM_SYMSARESORTED; |
14879 | break; | |
9a5aca8c | 14880 | |
fd2ec330 PB |
14881 | case EF_ARM_EABI_VER2: |
14882 | fprintf (file, _(" [Version2 EABI]")); | |
14883 | ||
14884 | if (flags & EF_ARM_SYMSARESORTED) | |
14885 | fprintf (file, _(" [sorted symbol table]")); | |
14886 | else | |
14887 | fprintf (file, _(" [unsorted symbol table]")); | |
14888 | ||
14889 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
14890 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
14891 | ||
14892 | if (flags & EF_ARM_MAPSYMSFIRST) | |
14893 | fprintf (file, _(" [mapping symbols precede others]")); | |
14894 | ||
99e4ae17 | 14895 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
14896 | | EF_ARM_MAPSYMSFIRST); |
14897 | break; | |
14898 | ||
d507cf36 PB |
14899 | case EF_ARM_EABI_VER3: |
14900 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
14901 | break; |
14902 | ||
14903 | case EF_ARM_EABI_VER4: | |
14904 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 14905 | goto eabi; |
d507cf36 | 14906 | |
3a4a14e9 PB |
14907 | case EF_ARM_EABI_VER5: |
14908 | fprintf (file, _(" [Version5 EABI]")); | |
3bfcb652 NC |
14909 | |
14910 | if (flags & EF_ARM_ABI_FLOAT_SOFT) | |
14911 | fprintf (file, _(" [soft-float ABI]")); | |
14912 | ||
14913 | if (flags & EF_ARM_ABI_FLOAT_HARD) | |
14914 | fprintf (file, _(" [hard-float ABI]")); | |
14915 | ||
14916 | flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD); | |
14917 | ||
3a4a14e9 | 14918 | eabi: |
d507cf36 PB |
14919 | if (flags & EF_ARM_BE8) |
14920 | fprintf (file, _(" [BE8]")); | |
14921 | ||
14922 | if (flags & EF_ARM_LE8) | |
14923 | fprintf (file, _(" [LE8]")); | |
14924 | ||
14925 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
14926 | break; | |
14927 | ||
fc830a83 | 14928 | default: |
9b485d32 | 14929 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
14930 | break; |
14931 | } | |
252b5132 | 14932 | |
fc830a83 | 14933 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 14934 | |
fc830a83 | 14935 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 14936 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 14937 | |
18a20338 CL |
14938 | if (flags & EF_ARM_PIC) |
14939 | fprintf (file, _(" [position independent]")); | |
14940 | ||
14941 | if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC) | |
14942 | fprintf (file, _(" [FDPIC ABI supplement]")); | |
14943 | ||
14944 | flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC); | |
fc830a83 NC |
14945 | |
14946 | if (flags) | |
9b485d32 | 14947 | fprintf (file, _("<Unrecognised flag bits set>")); |
9a5aca8c | 14948 | |
252b5132 RH |
14949 | fputc ('\n', file); |
14950 | ||
b34976b6 | 14951 | return TRUE; |
252b5132 RH |
14952 | } |
14953 | ||
14954 | static int | |
57e8b36a | 14955 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 14956 | { |
2f0ca46a NC |
14957 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
14958 | { | |
14959 | case STT_ARM_TFUNC: | |
14960 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 14961 | |
2f0ca46a NC |
14962 | case STT_ARM_16BIT: |
14963 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
14964 | This allows us to distinguish between data used by Thumb instructions | |
14965 | and non-data (which is probably code) inside Thumb regions of an | |
14966 | executable. */ | |
1a0eb693 | 14967 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
14968 | return ELF_ST_TYPE (elf_sym->st_info); |
14969 | break; | |
9a5aca8c | 14970 | |
ce855c42 NC |
14971 | default: |
14972 | break; | |
2f0ca46a NC |
14973 | } |
14974 | ||
14975 | return type; | |
252b5132 | 14976 | } |
f21f3fe0 | 14977 | |
252b5132 | 14978 | static asection * |
07adf181 AM |
14979 | elf32_arm_gc_mark_hook (asection *sec, |
14980 | struct bfd_link_info *info, | |
14981 | Elf_Internal_Rela *rel, | |
14982 | struct elf_link_hash_entry *h, | |
14983 | Elf_Internal_Sym *sym) | |
252b5132 RH |
14984 | { |
14985 | if (h != NULL) | |
07adf181 | 14986 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
14987 | { |
14988 | case R_ARM_GNU_VTINHERIT: | |
14989 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
14990 | return NULL; |
14991 | } | |
9ad5cbcf | 14992 | |
07adf181 | 14993 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
14994 | } |
14995 | ||
780a67af NC |
14996 | /* Look through the relocs for a section during the first phase. */ |
14997 | ||
b34976b6 | 14998 | static bfd_boolean |
57e8b36a NC |
14999 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
15000 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 15001 | { |
b34976b6 AM |
15002 | Elf_Internal_Shdr *symtab_hdr; |
15003 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
15004 | const Elf_Internal_Rela *rel; |
15005 | const Elf_Internal_Rela *rel_end; | |
15006 | bfd *dynobj; | |
5e681ec4 | 15007 | asection *sreloc; |
5e681ec4 | 15008 | struct elf32_arm_link_hash_table *htab; |
f6e32f6d RS |
15009 | bfd_boolean call_reloc_p; |
15010 | bfd_boolean may_become_dynamic_p; | |
15011 | bfd_boolean may_need_local_target_p; | |
ce98a316 | 15012 | unsigned long nsyms; |
9a5aca8c | 15013 | |
0e1862bb | 15014 | if (bfd_link_relocatable (info)) |
b34976b6 | 15015 | return TRUE; |
9a5aca8c | 15016 | |
0ffa91dd NC |
15017 | BFD_ASSERT (is_arm_elf (abfd)); |
15018 | ||
5e681ec4 | 15019 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
15020 | if (htab == NULL) |
15021 | return FALSE; | |
15022 | ||
5e681ec4 | 15023 | sreloc = NULL; |
9a5aca8c | 15024 | |
67687978 PB |
15025 | /* Create dynamic sections for relocatable executables so that we can |
15026 | copy relocations. */ | |
15027 | if (htab->root.is_relocatable_executable | |
15028 | && ! htab->root.dynamic_sections_created) | |
15029 | { | |
15030 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
15031 | return FALSE; | |
15032 | } | |
15033 | ||
cbc704f3 RS |
15034 | if (htab->root.dynobj == NULL) |
15035 | htab->root.dynobj = abfd; | |
34e77a92 RS |
15036 | if (!create_ifunc_sections (info)) |
15037 | return FALSE; | |
cbc704f3 RS |
15038 | |
15039 | dynobj = htab->root.dynobj; | |
15040 | ||
0ffa91dd | 15041 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 15042 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 | 15043 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
b38cadfb | 15044 | |
252b5132 RH |
15045 | rel_end = relocs + sec->reloc_count; |
15046 | for (rel = relocs; rel < rel_end; rel++) | |
15047 | { | |
34e77a92 | 15048 | Elf_Internal_Sym *isym; |
252b5132 | 15049 | struct elf_link_hash_entry *h; |
b7693d02 | 15050 | struct elf32_arm_link_hash_entry *eh; |
d42c267e | 15051 | unsigned int r_symndx; |
eb043451 | 15052 | int r_type; |
9a5aca8c | 15053 | |
252b5132 | 15054 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 15055 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 15056 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 15057 | |
ce98a316 NC |
15058 | if (r_symndx >= nsyms |
15059 | /* PR 9934: It is possible to have relocations that do not | |
15060 | refer to symbols, thus it is also possible to have an | |
15061 | object file containing relocations but no symbol table. */ | |
cf35638d | 15062 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
ba93b8ac | 15063 | { |
871b3ab2 | 15064 | _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, |
4eca0228 | 15065 | r_symndx); |
ba93b8ac DJ |
15066 | return FALSE; |
15067 | } | |
15068 | ||
34e77a92 RS |
15069 | h = NULL; |
15070 | isym = NULL; | |
15071 | if (nsyms > 0) | |
973a3492 | 15072 | { |
34e77a92 RS |
15073 | if (r_symndx < symtab_hdr->sh_info) |
15074 | { | |
15075 | /* A local symbol. */ | |
15076 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, | |
15077 | abfd, r_symndx); | |
15078 | if (isym == NULL) | |
15079 | return FALSE; | |
15080 | } | |
15081 | else | |
15082 | { | |
15083 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
15084 | while (h->root.type == bfd_link_hash_indirect | |
15085 | || h->root.type == bfd_link_hash_warning) | |
15086 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
15087 | } | |
973a3492 | 15088 | } |
9a5aca8c | 15089 | |
b7693d02 DJ |
15090 | eh = (struct elf32_arm_link_hash_entry *) h; |
15091 | ||
f6e32f6d RS |
15092 | call_reloc_p = FALSE; |
15093 | may_become_dynamic_p = FALSE; | |
15094 | may_need_local_target_p = FALSE; | |
15095 | ||
0855e32b NS |
15096 | /* Could be done earlier, if h were already available. */ |
15097 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
eb043451 | 15098 | switch (r_type) |
99059e56 | 15099 | { |
e8b09b87 CL |
15100 | case R_ARM_GOTOFFFUNCDESC: |
15101 | { | |
15102 | if (h == NULL) | |
15103 | { | |
15104 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
15105 | return FALSE; | |
15106 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1; | |
15107 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1; | |
15108 | } | |
15109 | else | |
15110 | { | |
15111 | eh->fdpic_cnts.gotofffuncdesc_cnt++; | |
15112 | } | |
15113 | } | |
15114 | break; | |
15115 | ||
15116 | case R_ARM_GOTFUNCDESC: | |
15117 | { | |
15118 | if (h == NULL) | |
15119 | { | |
15120 | /* Such a relocation is not supposed to be generated | |
15121 | by gcc on a static function. */ | |
15122 | /* Anyway if needed it could be handled. */ | |
15123 | abort(); | |
15124 | } | |
15125 | else | |
15126 | { | |
15127 | eh->fdpic_cnts.gotfuncdesc_cnt++; | |
15128 | } | |
15129 | } | |
15130 | break; | |
15131 | ||
15132 | case R_ARM_FUNCDESC: | |
15133 | { | |
15134 | if (h == NULL) | |
15135 | { | |
15136 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
15137 | return FALSE; | |
15138 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1; | |
15139 | elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1; | |
15140 | } | |
15141 | else | |
15142 | { | |
15143 | eh->fdpic_cnts.funcdesc_cnt++; | |
15144 | } | |
15145 | } | |
15146 | break; | |
15147 | ||
5e681ec4 | 15148 | case R_ARM_GOT32: |
eb043451 | 15149 | case R_ARM_GOT_PREL: |
ba93b8ac | 15150 | case R_ARM_TLS_GD32: |
5c5a4843 | 15151 | case R_ARM_TLS_GD32_FDPIC: |
ba93b8ac | 15152 | case R_ARM_TLS_IE32: |
5c5a4843 | 15153 | case R_ARM_TLS_IE32_FDPIC: |
0855e32b NS |
15154 | case R_ARM_TLS_GOTDESC: |
15155 | case R_ARM_TLS_DESCSEQ: | |
15156 | case R_ARM_THM_TLS_DESCSEQ: | |
15157 | case R_ARM_TLS_CALL: | |
15158 | case R_ARM_THM_TLS_CALL: | |
5e681ec4 | 15159 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
15160 | { |
15161 | int tls_type, old_tls_type; | |
5e681ec4 | 15162 | |
ba93b8ac DJ |
15163 | switch (r_type) |
15164 | { | |
15165 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
5c5a4843 | 15166 | case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break; |
b38cadfb | 15167 | |
ba93b8ac | 15168 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
5c5a4843 | 15169 | case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break; |
b38cadfb | 15170 | |
0855e32b NS |
15171 | case R_ARM_TLS_GOTDESC: |
15172 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: | |
15173 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: | |
15174 | tls_type = GOT_TLS_GDESC; break; | |
b38cadfb | 15175 | |
ba93b8ac DJ |
15176 | default: tls_type = GOT_NORMAL; break; |
15177 | } | |
252b5132 | 15178 | |
0e1862bb | 15179 | if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE)) |
eea6dad2 KM |
15180 | info->flags |= DF_STATIC_TLS; |
15181 | ||
ba93b8ac DJ |
15182 | if (h != NULL) |
15183 | { | |
15184 | h->got.refcount++; | |
15185 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
15186 | } | |
15187 | else | |
15188 | { | |
ba93b8ac | 15189 | /* This is a global offset table entry for a local symbol. */ |
34e77a92 RS |
15190 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
15191 | return FALSE; | |
15192 | elf_local_got_refcounts (abfd)[r_symndx] += 1; | |
ba93b8ac DJ |
15193 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
15194 | } | |
15195 | ||
0855e32b | 15196 | /* If a variable is accessed with both tls methods, two |
99059e56 | 15197 | slots may be created. */ |
0855e32b NS |
15198 | if (GOT_TLS_GD_ANY_P (old_tls_type) |
15199 | && GOT_TLS_GD_ANY_P (tls_type)) | |
15200 | tls_type |= old_tls_type; | |
15201 | ||
15202 | /* We will already have issued an error message if there | |
15203 | is a TLS/non-TLS mismatch, based on the symbol | |
15204 | type. So just combine any TLS types needed. */ | |
ba93b8ac DJ |
15205 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
15206 | && tls_type != GOT_NORMAL) | |
15207 | tls_type |= old_tls_type; | |
15208 | ||
0855e32b | 15209 | /* If the symbol is accessed in both IE and GDESC |
99059e56 RM |
15210 | method, we're able to relax. Turn off the GDESC flag, |
15211 | without messing up with any other kind of tls types | |
6a631e86 | 15212 | that may be involved. */ |
0855e32b NS |
15213 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) |
15214 | tls_type &= ~GOT_TLS_GDESC; | |
15215 | ||
ba93b8ac DJ |
15216 | if (old_tls_type != tls_type) |
15217 | { | |
15218 | if (h != NULL) | |
15219 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
15220 | else | |
15221 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
15222 | } | |
15223 | } | |
8029a119 | 15224 | /* Fall through. */ |
ba93b8ac DJ |
15225 | |
15226 | case R_ARM_TLS_LDM32: | |
5c5a4843 CL |
15227 | case R_ARM_TLS_LDM32_FDPIC: |
15228 | if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC) | |
ba93b8ac | 15229 | htab->tls_ldm_got.refcount++; |
8029a119 | 15230 | /* Fall through. */ |
252b5132 | 15231 | |
c19d1205 | 15232 | case R_ARM_GOTOFF32: |
5e681ec4 | 15233 | case R_ARM_GOTPC: |
cbc704f3 RS |
15234 | if (htab->root.sgot == NULL |
15235 | && !create_got_section (htab->root.dynobj, info)) | |
15236 | return FALSE; | |
252b5132 RH |
15237 | break; |
15238 | ||
252b5132 | 15239 | case R_ARM_PC24: |
7359ea65 | 15240 | case R_ARM_PLT32: |
5b5bb741 PB |
15241 | case R_ARM_CALL: |
15242 | case R_ARM_JUMP24: | |
eb043451 | 15243 | case R_ARM_PREL31: |
c19d1205 | 15244 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
15245 | case R_ARM_THM_JUMP24: |
15246 | case R_ARM_THM_JUMP19: | |
f6e32f6d RS |
15247 | call_reloc_p = TRUE; |
15248 | may_need_local_target_p = TRUE; | |
15249 | break; | |
15250 | ||
15251 | case R_ARM_ABS12: | |
15252 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
15253 | ldr __GOTT_INDEX__ offsets. */ | |
15254 | if (!htab->vxworks_p) | |
15255 | { | |
15256 | may_need_local_target_p = TRUE; | |
15257 | break; | |
15258 | } | |
aebf9be7 | 15259 | else goto jump_over; |
9eaff861 | 15260 | |
f6e32f6d | 15261 | /* Fall through. */ |
39623e12 | 15262 | |
96c23d59 JM |
15263 | case R_ARM_MOVW_ABS_NC: |
15264 | case R_ARM_MOVT_ABS: | |
15265 | case R_ARM_THM_MOVW_ABS_NC: | |
15266 | case R_ARM_THM_MOVT_ABS: | |
0e1862bb | 15267 | if (bfd_link_pic (info)) |
96c23d59 | 15268 | { |
4eca0228 | 15269 | _bfd_error_handler |
871b3ab2 | 15270 | (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), |
96c23d59 JM |
15271 | abfd, elf32_arm_howto_table_1[r_type].name, |
15272 | (h) ? h->root.root.string : "a local symbol"); | |
15273 | bfd_set_error (bfd_error_bad_value); | |
15274 | return FALSE; | |
15275 | } | |
15276 | ||
15277 | /* Fall through. */ | |
39623e12 PB |
15278 | case R_ARM_ABS32: |
15279 | case R_ARM_ABS32_NOI: | |
aebf9be7 | 15280 | jump_over: |
0e1862bb | 15281 | if (h != NULL && bfd_link_executable (info)) |
97323ad1 WN |
15282 | { |
15283 | h->pointer_equality_needed = 1; | |
15284 | } | |
15285 | /* Fall through. */ | |
39623e12 PB |
15286 | case R_ARM_REL32: |
15287 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
15288 | case R_ARM_MOVW_PREL_NC: |
15289 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
15290 | case R_ARM_THM_MOVW_PREL_NC: |
15291 | case R_ARM_THM_MOVT_PREL: | |
39623e12 | 15292 | |
b7693d02 | 15293 | /* Should the interworking branches be listed here? */ |
e8b09b87 CL |
15294 | if ((bfd_link_pic (info) || htab->root.is_relocatable_executable |
15295 | || htab->fdpic_p) | |
34e77a92 RS |
15296 | && (sec->flags & SEC_ALLOC) != 0) |
15297 | { | |
15298 | if (h == NULL | |
469a3493 | 15299 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
34e77a92 RS |
15300 | { |
15301 | /* In shared libraries and relocatable executables, | |
15302 | we treat local relative references as calls; | |
15303 | see the related SYMBOL_CALLS_LOCAL code in | |
15304 | allocate_dynrelocs. */ | |
15305 | call_reloc_p = TRUE; | |
15306 | may_need_local_target_p = TRUE; | |
15307 | } | |
15308 | else | |
15309 | /* We are creating a shared library or relocatable | |
15310 | executable, and this is a reloc against a global symbol, | |
15311 | or a non-PC-relative reloc against a local symbol. | |
15312 | We may need to copy the reloc into the output. */ | |
15313 | may_become_dynamic_p = TRUE; | |
15314 | } | |
f6e32f6d RS |
15315 | else |
15316 | may_need_local_target_p = TRUE; | |
252b5132 RH |
15317 | break; |
15318 | ||
99059e56 RM |
15319 | /* This relocation describes the C++ object vtable hierarchy. |
15320 | Reconstruct it for later use during GC. */ | |
15321 | case R_ARM_GNU_VTINHERIT: | |
15322 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
15323 | return FALSE; | |
15324 | break; | |
15325 | ||
15326 | /* This relocation describes which C++ vtable entries are actually | |
15327 | used. Record for later use during GC. */ | |
15328 | case R_ARM_GNU_VTENTRY: | |
15329 | BFD_ASSERT (h != NULL); | |
15330 | if (h != NULL | |
15331 | && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
15332 | return FALSE; | |
15333 | break; | |
15334 | } | |
f6e32f6d RS |
15335 | |
15336 | if (h != NULL) | |
15337 | { | |
15338 | if (call_reloc_p) | |
15339 | /* We may need a .plt entry if the function this reloc | |
15340 | refers to is in a different object, regardless of the | |
15341 | symbol's type. We can't tell for sure yet, because | |
15342 | something later might force the symbol local. */ | |
15343 | h->needs_plt = 1; | |
15344 | else if (may_need_local_target_p) | |
15345 | /* If this reloc is in a read-only section, we might | |
15346 | need a copy reloc. We can't check reliably at this | |
15347 | stage whether the section is read-only, as input | |
15348 | sections have not yet been mapped to output sections. | |
15349 | Tentatively set the flag for now, and correct in | |
15350 | adjust_dynamic_symbol. */ | |
15351 | h->non_got_ref = 1; | |
15352 | } | |
15353 | ||
34e77a92 RS |
15354 | if (may_need_local_target_p |
15355 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) | |
f6e32f6d | 15356 | { |
34e77a92 RS |
15357 | union gotplt_union *root_plt; |
15358 | struct arm_plt_info *arm_plt; | |
15359 | struct arm_local_iplt_info *local_iplt; | |
15360 | ||
15361 | if (h != NULL) | |
15362 | { | |
15363 | root_plt = &h->plt; | |
15364 | arm_plt = &eh->plt; | |
15365 | } | |
15366 | else | |
15367 | { | |
15368 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
15369 | if (local_iplt == NULL) | |
15370 | return FALSE; | |
15371 | root_plt = &local_iplt->root; | |
15372 | arm_plt = &local_iplt->arm; | |
15373 | } | |
15374 | ||
f6e32f6d RS |
15375 | /* If the symbol is a function that doesn't bind locally, |
15376 | this relocation will need a PLT entry. */ | |
a8c887dd NC |
15377 | if (root_plt->refcount != -1) |
15378 | root_plt->refcount += 1; | |
34e77a92 RS |
15379 | |
15380 | if (!call_reloc_p) | |
15381 | arm_plt->noncall_refcount++; | |
f6e32f6d RS |
15382 | |
15383 | /* It's too early to use htab->use_blx here, so we have to | |
15384 | record possible blx references separately from | |
15385 | relocs that definitely need a thumb stub. */ | |
15386 | ||
15387 | if (r_type == R_ARM_THM_CALL) | |
34e77a92 | 15388 | arm_plt->maybe_thumb_refcount += 1; |
f6e32f6d RS |
15389 | |
15390 | if (r_type == R_ARM_THM_JUMP24 | |
15391 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 15392 | arm_plt->thumb_refcount += 1; |
f6e32f6d RS |
15393 | } |
15394 | ||
15395 | if (may_become_dynamic_p) | |
15396 | { | |
15397 | struct elf_dyn_relocs *p, **head; | |
15398 | ||
15399 | /* Create a reloc section in dynobj. */ | |
15400 | if (sreloc == NULL) | |
15401 | { | |
15402 | sreloc = _bfd_elf_make_dynamic_reloc_section | |
15403 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
15404 | ||
15405 | if (sreloc == NULL) | |
15406 | return FALSE; | |
15407 | ||
15408 | /* BPABI objects never have dynamic relocations mapped. */ | |
15409 | if (htab->symbian_p) | |
15410 | { | |
15411 | flagword flags; | |
15412 | ||
15413 | flags = bfd_get_section_flags (dynobj, sreloc); | |
15414 | flags &= ~(SEC_LOAD | SEC_ALLOC); | |
15415 | bfd_set_section_flags (dynobj, sreloc, flags); | |
15416 | } | |
15417 | } | |
15418 | ||
15419 | /* If this is a global symbol, count the number of | |
15420 | relocations we need for this symbol. */ | |
15421 | if (h != NULL) | |
15422 | head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; | |
15423 | else | |
15424 | { | |
34e77a92 RS |
15425 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
15426 | if (head == NULL) | |
f6e32f6d | 15427 | return FALSE; |
f6e32f6d RS |
15428 | } |
15429 | ||
15430 | p = *head; | |
15431 | if (p == NULL || p->sec != sec) | |
15432 | { | |
15433 | bfd_size_type amt = sizeof *p; | |
15434 | ||
15435 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); | |
15436 | if (p == NULL) | |
15437 | return FALSE; | |
15438 | p->next = *head; | |
15439 | *head = p; | |
15440 | p->sec = sec; | |
15441 | p->count = 0; | |
15442 | p->pc_count = 0; | |
15443 | } | |
15444 | ||
469a3493 | 15445 | if (elf32_arm_howto_from_type (r_type)->pc_relative) |
f6e32f6d RS |
15446 | p->pc_count += 1; |
15447 | p->count += 1; | |
e8b09b87 CL |
15448 | if (h == NULL && htab->fdpic_p && !bfd_link_pic(info) |
15449 | && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) { | |
15450 | /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI | |
15451 | that will become rofixup. */ | |
15452 | /* This is due to the fact that we suppose all will become rofixup. */ | |
15453 | fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type); | |
15454 | _bfd_error_handler | |
15455 | (_("FDPIC does not yet support %s relocation" | |
15456 | " to become dynamic for executable"), | |
15457 | elf32_arm_howto_table_1[r_type].name); | |
15458 | abort(); | |
15459 | } | |
f6e32f6d | 15460 | } |
252b5132 | 15461 | } |
f21f3fe0 | 15462 | |
b34976b6 | 15463 | return TRUE; |
252b5132 RH |
15464 | } |
15465 | ||
9eaff861 AO |
15466 | static void |
15467 | elf32_arm_update_relocs (asection *o, | |
15468 | struct bfd_elf_section_reloc_data *reldata) | |
15469 | { | |
15470 | void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *); | |
15471 | void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *); | |
15472 | const struct elf_backend_data *bed; | |
15473 | _arm_elf_section_data *eado; | |
15474 | struct bfd_link_order *p; | |
15475 | bfd_byte *erela_head, *erela; | |
15476 | Elf_Internal_Rela *irela_head, *irela; | |
15477 | Elf_Internal_Shdr *rel_hdr; | |
15478 | bfd *abfd; | |
15479 | unsigned int count; | |
15480 | ||
15481 | eado = get_arm_elf_section_data (o); | |
15482 | ||
15483 | if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX) | |
15484 | return; | |
15485 | ||
15486 | abfd = o->owner; | |
15487 | bed = get_elf_backend_data (abfd); | |
15488 | rel_hdr = reldata->hdr; | |
15489 | ||
15490 | if (rel_hdr->sh_entsize == bed->s->sizeof_rel) | |
15491 | { | |
15492 | swap_in = bed->s->swap_reloc_in; | |
15493 | swap_out = bed->s->swap_reloc_out; | |
15494 | } | |
15495 | else if (rel_hdr->sh_entsize == bed->s->sizeof_rela) | |
15496 | { | |
15497 | swap_in = bed->s->swap_reloca_in; | |
15498 | swap_out = bed->s->swap_reloca_out; | |
15499 | } | |
15500 | else | |
15501 | abort (); | |
15502 | ||
15503 | erela_head = rel_hdr->contents; | |
15504 | irela_head = (Elf_Internal_Rela *) bfd_zmalloc | |
15505 | ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head)); | |
15506 | ||
15507 | erela = erela_head; | |
15508 | irela = irela_head; | |
15509 | count = 0; | |
15510 | ||
15511 | for (p = o->map_head.link_order; p; p = p->next) | |
15512 | { | |
15513 | if (p->type == bfd_section_reloc_link_order | |
15514 | || p->type == bfd_symbol_reloc_link_order) | |
15515 | { | |
15516 | (*swap_in) (abfd, erela, irela); | |
15517 | erela += rel_hdr->sh_entsize; | |
15518 | irela++; | |
15519 | count++; | |
15520 | } | |
15521 | else if (p->type == bfd_indirect_link_order) | |
15522 | { | |
15523 | struct bfd_elf_section_reloc_data *input_reldata; | |
15524 | arm_unwind_table_edit *edit_list, *edit_tail; | |
15525 | _arm_elf_section_data *eadi; | |
15526 | bfd_size_type j; | |
15527 | bfd_vma offset; | |
15528 | asection *i; | |
15529 | ||
15530 | i = p->u.indirect.section; | |
15531 | ||
15532 | eadi = get_arm_elf_section_data (i); | |
15533 | edit_list = eadi->u.exidx.unwind_edit_list; | |
15534 | edit_tail = eadi->u.exidx.unwind_edit_tail; | |
15535 | offset = o->vma + i->output_offset; | |
15536 | ||
15537 | if (eadi->elf.rel.hdr && | |
15538 | eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize) | |
15539 | input_reldata = &eadi->elf.rel; | |
15540 | else if (eadi->elf.rela.hdr && | |
15541 | eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize) | |
15542 | input_reldata = &eadi->elf.rela; | |
15543 | else | |
15544 | abort (); | |
15545 | ||
15546 | if (edit_list) | |
15547 | { | |
15548 | for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++) | |
15549 | { | |
15550 | arm_unwind_table_edit *edit_node, *edit_next; | |
15551 | bfd_vma bias; | |
c48182bf | 15552 | bfd_vma reloc_index; |
9eaff861 AO |
15553 | |
15554 | (*swap_in) (abfd, erela, irela); | |
c48182bf | 15555 | reloc_index = (irela->r_offset - offset) / 8; |
9eaff861 AO |
15556 | |
15557 | bias = 0; | |
15558 | edit_node = edit_list; | |
15559 | for (edit_next = edit_list; | |
c48182bf | 15560 | edit_next && edit_next->index <= reloc_index; |
9eaff861 AO |
15561 | edit_next = edit_node->next) |
15562 | { | |
15563 | bias++; | |
15564 | edit_node = edit_next; | |
15565 | } | |
15566 | ||
15567 | if (edit_node->type != DELETE_EXIDX_ENTRY | |
c48182bf | 15568 | || edit_node->index != reloc_index) |
9eaff861 AO |
15569 | { |
15570 | irela->r_offset -= bias * 8; | |
15571 | irela++; | |
15572 | count++; | |
15573 | } | |
15574 | ||
15575 | erela += rel_hdr->sh_entsize; | |
15576 | } | |
15577 | ||
15578 | if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END) | |
15579 | { | |
15580 | /* New relocation entity. */ | |
15581 | asection *text_sec = edit_tail->linked_section; | |
15582 | asection *text_out = text_sec->output_section; | |
15583 | bfd_vma exidx_offset = offset + i->size - 8; | |
15584 | ||
15585 | irela->r_addend = 0; | |
15586 | irela->r_offset = exidx_offset; | |
15587 | irela->r_info = ELF32_R_INFO | |
15588 | (text_out->target_index, R_ARM_PREL31); | |
15589 | irela++; | |
15590 | count++; | |
15591 | } | |
15592 | } | |
15593 | else | |
15594 | { | |
15595 | for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++) | |
15596 | { | |
15597 | (*swap_in) (abfd, erela, irela); | |
15598 | erela += rel_hdr->sh_entsize; | |
15599 | irela++; | |
15600 | } | |
15601 | ||
15602 | count += NUM_SHDR_ENTRIES (input_reldata->hdr); | |
15603 | } | |
15604 | } | |
15605 | } | |
15606 | ||
15607 | reldata->count = count; | |
15608 | rel_hdr->sh_size = count * rel_hdr->sh_entsize; | |
15609 | ||
15610 | erela = erela_head; | |
15611 | irela = irela_head; | |
15612 | while (count > 0) | |
15613 | { | |
15614 | (*swap_out) (abfd, irela, erela); | |
15615 | erela += rel_hdr->sh_entsize; | |
15616 | irela++; | |
15617 | count--; | |
15618 | } | |
15619 | ||
15620 | free (irela_head); | |
15621 | ||
15622 | /* Hashes are no longer valid. */ | |
15623 | free (reldata->hashes); | |
15624 | reldata->hashes = NULL; | |
15625 | } | |
15626 | ||
6a5bb875 | 15627 | /* Unwinding tables are not referenced directly. This pass marks them as |
4ba2ef8f TP |
15628 | required if the corresponding code section is marked. Similarly, ARMv8-M |
15629 | secure entry functions can only be referenced by SG veneers which are | |
15630 | created after the GC process. They need to be marked in case they reside in | |
15631 | their own section (as would be the case if code was compiled with | |
15632 | -ffunction-sections). */ | |
6a5bb875 PB |
15633 | |
15634 | static bfd_boolean | |
906e58ca NC |
15635 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
15636 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
15637 | { |
15638 | bfd *sub; | |
15639 | Elf_Internal_Shdr **elf_shdrp; | |
4ba2ef8f TP |
15640 | asection *cmse_sec; |
15641 | obj_attribute *out_attr; | |
15642 | Elf_Internal_Shdr *symtab_hdr; | |
15643 | unsigned i, sym_count, ext_start; | |
15644 | const struct elf_backend_data *bed; | |
15645 | struct elf_link_hash_entry **sym_hashes; | |
15646 | struct elf32_arm_link_hash_entry *cmse_hash; | |
15647 | bfd_boolean again, is_v8m, first_bfd_browse = TRUE; | |
6a5bb875 | 15648 | |
7f6ab9f8 AM |
15649 | _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); |
15650 | ||
4ba2ef8f TP |
15651 | out_attr = elf_known_obj_attributes_proc (info->output_bfd); |
15652 | is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE | |
15653 | && out_attr[Tag_CPU_arch_profile].i == 'M'; | |
15654 | ||
6a5bb875 PB |
15655 | /* Marking EH data may cause additional code sections to be marked, |
15656 | requiring multiple passes. */ | |
15657 | again = TRUE; | |
15658 | while (again) | |
15659 | { | |
15660 | again = FALSE; | |
c72f2fb2 | 15661 | for (sub = info->input_bfds; sub != NULL; sub = sub->link.next) |
6a5bb875 PB |
15662 | { |
15663 | asection *o; | |
15664 | ||
0ffa91dd | 15665 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
15666 | continue; |
15667 | ||
15668 | elf_shdrp = elf_elfsections (sub); | |
15669 | for (o = sub->sections; o != NULL; o = o->next) | |
15670 | { | |
15671 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 15672 | |
6a5bb875 | 15673 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
15674 | if (hdr->sh_type == SHT_ARM_EXIDX |
15675 | && hdr->sh_link | |
15676 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
15677 | && !o->gc_mark |
15678 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
15679 | { | |
15680 | again = TRUE; | |
15681 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) | |
15682 | return FALSE; | |
15683 | } | |
15684 | } | |
4ba2ef8f TP |
15685 | |
15686 | /* Mark section holding ARMv8-M secure entry functions. We mark all | |
15687 | of them so no need for a second browsing. */ | |
15688 | if (is_v8m && first_bfd_browse) | |
15689 | { | |
15690 | sym_hashes = elf_sym_hashes (sub); | |
15691 | bed = get_elf_backend_data (sub); | |
15692 | symtab_hdr = &elf_tdata (sub)->symtab_hdr; | |
15693 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; | |
15694 | ext_start = symtab_hdr->sh_info; | |
15695 | ||
15696 | /* Scan symbols. */ | |
15697 | for (i = ext_start; i < sym_count; i++) | |
15698 | { | |
15699 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); | |
15700 | ||
15701 | /* Assume it is a special symbol. If not, cmse_scan will | |
15702 | warn about it and user can do something about it. */ | |
15703 | if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) | |
15704 | { | |
15705 | cmse_sec = cmse_hash->root.root.u.def.section; | |
5025eb7c AO |
15706 | if (!cmse_sec->gc_mark |
15707 | && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook)) | |
4ba2ef8f TP |
15708 | return FALSE; |
15709 | } | |
15710 | } | |
15711 | } | |
6a5bb875 | 15712 | } |
4ba2ef8f | 15713 | first_bfd_browse = FALSE; |
6a5bb875 PB |
15714 | } |
15715 | ||
15716 | return TRUE; | |
15717 | } | |
15718 | ||
3c9458e9 NC |
15719 | /* Treat mapping symbols as special target symbols. */ |
15720 | ||
15721 | static bfd_boolean | |
15722 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) | |
15723 | { | |
b0796911 PB |
15724 | return bfd_is_arm_special_symbol_name (sym->name, |
15725 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
15726 | } |
15727 | ||
0367ecfb NC |
15728 | /* This is a copy of elf_find_function() from elf.c except that |
15729 | ARM mapping symbols are ignored when looking for function names | |
15730 | and STT_ARM_TFUNC is considered to a function type. */ | |
252b5132 | 15731 | |
0367ecfb | 15732 | static bfd_boolean |
07d6d2b8 | 15733 | arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, |
0367ecfb | 15734 | asymbol ** symbols, |
fb167eb2 | 15735 | asection * section, |
07d6d2b8 | 15736 | bfd_vma offset, |
0367ecfb NC |
15737 | const char ** filename_ptr, |
15738 | const char ** functionname_ptr) | |
15739 | { | |
15740 | const char * filename = NULL; | |
15741 | asymbol * func = NULL; | |
15742 | bfd_vma low_func = 0; | |
15743 | asymbol ** p; | |
252b5132 RH |
15744 | |
15745 | for (p = symbols; *p != NULL; p++) | |
15746 | { | |
15747 | elf_symbol_type *q; | |
15748 | ||
15749 | q = (elf_symbol_type *) *p; | |
15750 | ||
252b5132 RH |
15751 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
15752 | { | |
15753 | default: | |
15754 | break; | |
15755 | case STT_FILE: | |
15756 | filename = bfd_asymbol_name (&q->symbol); | |
15757 | break; | |
252b5132 RH |
15758 | case STT_FUNC: |
15759 | case STT_ARM_TFUNC: | |
9d2da7ca | 15760 | case STT_NOTYPE: |
b0796911 | 15761 | /* Skip mapping symbols. */ |
0367ecfb | 15762 | if ((q->symbol.flags & BSF_LOCAL) |
b0796911 PB |
15763 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
15764 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
0367ecfb NC |
15765 | continue; |
15766 | /* Fall through. */ | |
6b40fcba | 15767 | if (bfd_get_section (&q->symbol) == section |
252b5132 RH |
15768 | && q->symbol.value >= low_func |
15769 | && q->symbol.value <= offset) | |
15770 | { | |
15771 | func = (asymbol *) q; | |
15772 | low_func = q->symbol.value; | |
15773 | } | |
15774 | break; | |
15775 | } | |
15776 | } | |
15777 | ||
15778 | if (func == NULL) | |
b34976b6 | 15779 | return FALSE; |
252b5132 | 15780 | |
0367ecfb NC |
15781 | if (filename_ptr) |
15782 | *filename_ptr = filename; | |
15783 | if (functionname_ptr) | |
15784 | *functionname_ptr = bfd_asymbol_name (func); | |
15785 | ||
15786 | return TRUE; | |
906e58ca | 15787 | } |
0367ecfb NC |
15788 | |
15789 | ||
15790 | /* Find the nearest line to a particular section and offset, for error | |
15791 | reporting. This code is a duplicate of the code in elf.c, except | |
15792 | that it uses arm_elf_find_function. */ | |
15793 | ||
15794 | static bfd_boolean | |
07d6d2b8 AM |
15795 | elf32_arm_find_nearest_line (bfd * abfd, |
15796 | asymbol ** symbols, | |
15797 | asection * section, | |
15798 | bfd_vma offset, | |
0367ecfb NC |
15799 | const char ** filename_ptr, |
15800 | const char ** functionname_ptr, | |
fb167eb2 AM |
15801 | unsigned int * line_ptr, |
15802 | unsigned int * discriminator_ptr) | |
0367ecfb NC |
15803 | { |
15804 | bfd_boolean found = FALSE; | |
15805 | ||
fb167eb2 | 15806 | if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset, |
0367ecfb | 15807 | filename_ptr, functionname_ptr, |
fb167eb2 AM |
15808 | line_ptr, discriminator_ptr, |
15809 | dwarf_debug_sections, 0, | |
0367ecfb NC |
15810 | & elf_tdata (abfd)->dwarf2_find_line_info)) |
15811 | { | |
15812 | if (!*functionname_ptr) | |
fb167eb2 | 15813 | arm_elf_find_function (abfd, symbols, section, offset, |
0367ecfb NC |
15814 | *filename_ptr ? NULL : filename_ptr, |
15815 | functionname_ptr); | |
f21f3fe0 | 15816 | |
0367ecfb NC |
15817 | return TRUE; |
15818 | } | |
15819 | ||
fb167eb2 AM |
15820 | /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain |
15821 | uses DWARF1. */ | |
15822 | ||
0367ecfb NC |
15823 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, |
15824 | & found, filename_ptr, | |
15825 | functionname_ptr, line_ptr, | |
15826 | & elf_tdata (abfd)->line_info)) | |
15827 | return FALSE; | |
15828 | ||
15829 | if (found && (*functionname_ptr || *line_ptr)) | |
15830 | return TRUE; | |
15831 | ||
15832 | if (symbols == NULL) | |
15833 | return FALSE; | |
15834 | ||
fb167eb2 | 15835 | if (! arm_elf_find_function (abfd, symbols, section, offset, |
0367ecfb NC |
15836 | filename_ptr, functionname_ptr)) |
15837 | return FALSE; | |
15838 | ||
15839 | *line_ptr = 0; | |
b34976b6 | 15840 | return TRUE; |
252b5132 RH |
15841 | } |
15842 | ||
4ab527b0 | 15843 | static bfd_boolean |
07d6d2b8 | 15844 | elf32_arm_find_inliner_info (bfd * abfd, |
4ab527b0 FF |
15845 | const char ** filename_ptr, |
15846 | const char ** functionname_ptr, | |
15847 | unsigned int * line_ptr) | |
15848 | { | |
15849 | bfd_boolean found; | |
15850 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, | |
15851 | functionname_ptr, line_ptr, | |
15852 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
15853 | return found; | |
15854 | } | |
15855 | ||
63c1f59d AM |
15856 | /* Find dynamic relocs for H that apply to read-only sections. */ |
15857 | ||
15858 | static asection * | |
15859 | readonly_dynrelocs (struct elf_link_hash_entry *h) | |
15860 | { | |
15861 | struct elf_dyn_relocs *p; | |
15862 | ||
15863 | for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next) | |
15864 | { | |
15865 | asection *s = p->sec->output_section; | |
15866 | ||
15867 | if (s != NULL && (s->flags & SEC_READONLY) != 0) | |
15868 | return p->sec; | |
15869 | } | |
15870 | return NULL; | |
15871 | } | |
15872 | ||
252b5132 RH |
15873 | /* Adjust a symbol defined by a dynamic object and referenced by a |
15874 | regular object. The current definition is in some section of the | |
15875 | dynamic object, but we're not including those sections. We have to | |
15876 | change the definition to something the rest of the link can | |
15877 | understand. */ | |
15878 | ||
b34976b6 | 15879 | static bfd_boolean |
57e8b36a NC |
15880 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
15881 | struct elf_link_hash_entry * h) | |
252b5132 RH |
15882 | { |
15883 | bfd * dynobj; | |
5474d94f | 15884 | asection *s, *srel; |
b7693d02 | 15885 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 15886 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 15887 | |
67687978 | 15888 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
15889 | if (globals == NULL) |
15890 | return FALSE; | |
15891 | ||
252b5132 RH |
15892 | dynobj = elf_hash_table (info)->dynobj; |
15893 | ||
15894 | /* Make sure we know what is going on here. */ | |
15895 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 15896 | && (h->needs_plt |
34e77a92 | 15897 | || h->type == STT_GNU_IFUNC |
60d67dc8 | 15898 | || h->is_weakalias |
f5385ebf AM |
15899 | || (h->def_dynamic |
15900 | && h->ref_regular | |
15901 | && !h->def_regular))); | |
252b5132 | 15902 | |
b7693d02 DJ |
15903 | eh = (struct elf32_arm_link_hash_entry *) h; |
15904 | ||
252b5132 RH |
15905 | /* If this is a function, put it in the procedure linkage table. We |
15906 | will fill in the contents of the procedure linkage table later, | |
15907 | when we know the address of the .got section. */ | |
34e77a92 | 15908 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
252b5132 | 15909 | { |
34e77a92 RS |
15910 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
15911 | symbol binds locally. */ | |
5e681ec4 | 15912 | if (h->plt.refcount <= 0 |
34e77a92 RS |
15913 | || (h->type != STT_GNU_IFUNC |
15914 | && (SYMBOL_CALLS_LOCAL (info, h) | |
15915 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
15916 | && h->root.type == bfd_link_hash_undefweak)))) | |
252b5132 RH |
15917 | { |
15918 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
15919 | file, but the symbol was never referred to by a dynamic |
15920 | object, or if all references were garbage collected. In | |
15921 | such a case, we don't actually need to build a procedure | |
15922 | linkage table, and we can just do a PC24 reloc instead. */ | |
15923 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
15924 | eh->plt.thumb_refcount = 0; |
15925 | eh->plt.maybe_thumb_refcount = 0; | |
15926 | eh->plt.noncall_refcount = 0; | |
f5385ebf | 15927 | h->needs_plt = 0; |
252b5132 RH |
15928 | } |
15929 | ||
b34976b6 | 15930 | return TRUE; |
252b5132 | 15931 | } |
5e681ec4 | 15932 | else |
b7693d02 DJ |
15933 | { |
15934 | /* It's possible that we incorrectly decided a .plt reloc was | |
15935 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
15936 | in check_relocs. We can't decide accurately between function | |
15937 | and non-function syms in check-relocs; Objects loaded later in | |
15938 | the link may change h->type. So fix it now. */ | |
15939 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
15940 | eh->plt.thumb_refcount = 0; |
15941 | eh->plt.maybe_thumb_refcount = 0; | |
15942 | eh->plt.noncall_refcount = 0; | |
b7693d02 | 15943 | } |
252b5132 RH |
15944 | |
15945 | /* If this is a weak symbol, and there is a real definition, the | |
15946 | processor independent code will have arranged for us to see the | |
15947 | real definition first, and we can just use the same value. */ | |
60d67dc8 | 15948 | if (h->is_weakalias) |
252b5132 | 15949 | { |
60d67dc8 AM |
15950 | struct elf_link_hash_entry *def = weakdef (h); |
15951 | BFD_ASSERT (def->root.type == bfd_link_hash_defined); | |
15952 | h->root.u.def.section = def->root.u.def.section; | |
15953 | h->root.u.def.value = def->root.u.def.value; | |
b34976b6 | 15954 | return TRUE; |
252b5132 RH |
15955 | } |
15956 | ||
ba93b8ac DJ |
15957 | /* If there are no non-GOT references, we do not need a copy |
15958 | relocation. */ | |
15959 | if (!h->non_got_ref) | |
15960 | return TRUE; | |
15961 | ||
252b5132 RH |
15962 | /* This is a reference to a symbol defined by a dynamic object which |
15963 | is not a function. */ | |
15964 | ||
15965 | /* If we are creating a shared library, we must presume that the | |
15966 | only references to the symbol are via the global offset table. | |
15967 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
15968 | be handled correctly by relocate_section. Relocatable executables |
15969 | can reference data in shared objects directly, so we don't need to | |
15970 | do anything here. */ | |
0e1862bb | 15971 | if (bfd_link_pic (info) || globals->root.is_relocatable_executable) |
b34976b6 | 15972 | return TRUE; |
252b5132 RH |
15973 | |
15974 | /* We must allocate the symbol in our .dynbss section, which will | |
15975 | become part of the .bss section of the executable. There will be | |
15976 | an entry for this symbol in the .dynsym section. The dynamic | |
15977 | object will contain position independent code, so all references | |
15978 | from the dynamic object to this symbol will go through the global | |
15979 | offset table. The dynamic linker will use the .dynsym entry to | |
15980 | determine the address it must put in the global offset table, so | |
15981 | both the dynamic object and the regular object will refer to the | |
15982 | same memory location for the variable. */ | |
5522f910 NC |
15983 | /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic |
15984 | linker to copy the initial value out of the dynamic object and into | |
15985 | the runtime process image. We need to remember the offset into the | |
00a97672 | 15986 | .rel(a).bss section we are going to use. */ |
5474d94f AM |
15987 | if ((h->root.u.def.section->flags & SEC_READONLY) != 0) |
15988 | { | |
15989 | s = globals->root.sdynrelro; | |
15990 | srel = globals->root.sreldynrelro; | |
15991 | } | |
15992 | else | |
15993 | { | |
15994 | s = globals->root.sdynbss; | |
15995 | srel = globals->root.srelbss; | |
15996 | } | |
5522f910 NC |
15997 | if (info->nocopyreloc == 0 |
15998 | && (h->root.u.def.section->flags & SEC_ALLOC) != 0 | |
5522f910 | 15999 | && h->size != 0) |
252b5132 | 16000 | { |
47beaa6a | 16001 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
f5385ebf | 16002 | h->needs_copy = 1; |
252b5132 RH |
16003 | } |
16004 | ||
6cabe1ea | 16005 | return _bfd_elf_adjust_dynamic_copy (info, h, s); |
252b5132 RH |
16006 | } |
16007 | ||
5e681ec4 PB |
16008 | /* Allocate space in .plt, .got and associated reloc sections for |
16009 | dynamic relocs. */ | |
16010 | ||
16011 | static bfd_boolean | |
47beaa6a | 16012 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
16013 | { |
16014 | struct bfd_link_info *info; | |
16015 | struct elf32_arm_link_hash_table *htab; | |
16016 | struct elf32_arm_link_hash_entry *eh; | |
0bdcacaf | 16017 | struct elf_dyn_relocs *p; |
5e681ec4 PB |
16018 | |
16019 | if (h->root.type == bfd_link_hash_indirect) | |
16020 | return TRUE; | |
16021 | ||
e6a6bb22 AM |
16022 | eh = (struct elf32_arm_link_hash_entry *) h; |
16023 | ||
5e681ec4 PB |
16024 | info = (struct bfd_link_info *) inf; |
16025 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
16026 | if (htab == NULL) |
16027 | return FALSE; | |
5e681ec4 | 16028 | |
34e77a92 | 16029 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
5e681ec4 PB |
16030 | && h->plt.refcount > 0) |
16031 | { | |
16032 | /* Make sure this symbol is output as a dynamic symbol. | |
16033 | Undefined weak syms won't yet be marked as dynamic. */ | |
6c699715 RL |
16034 | if (h->dynindx == -1 && !h->forced_local |
16035 | && h->root.type == bfd_link_hash_undefweak) | |
5e681ec4 | 16036 | { |
c152c796 | 16037 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
16038 | return FALSE; |
16039 | } | |
16040 | ||
34e77a92 RS |
16041 | /* If the call in the PLT entry binds locally, the associated |
16042 | GOT entry should use an R_ARM_IRELATIVE relocation instead of | |
16043 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather | |
16044 | than the .plt section. */ | |
16045 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) | |
16046 | { | |
16047 | eh->is_iplt = 1; | |
16048 | if (eh->plt.noncall_refcount == 0 | |
16049 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
16050 | /* All non-call references can be resolved directly. | |
16051 | This means that they can (and in some cases, must) | |
16052 | resolve directly to the run-time target, rather than | |
16053 | to the PLT. That in turns means that any .got entry | |
16054 | would be equal to the .igot.plt entry, so there's | |
16055 | no point having both. */ | |
16056 | h->got.refcount = 0; | |
16057 | } | |
16058 | ||
0e1862bb | 16059 | if (bfd_link_pic (info) |
34e77a92 | 16060 | || eh->is_iplt |
7359ea65 | 16061 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 | 16062 | { |
34e77a92 | 16063 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
b7693d02 | 16064 | |
5e681ec4 PB |
16065 | /* If this symbol is not defined in a regular file, and we are |
16066 | not generating a shared library, then set the symbol to this | |
16067 | location in the .plt. This is required to make function | |
16068 | pointers compare as equal between the normal executable and | |
16069 | the shared library. */ | |
0e1862bb | 16070 | if (! bfd_link_pic (info) |
f5385ebf | 16071 | && !h->def_regular) |
5e681ec4 | 16072 | { |
34e77a92 | 16073 | h->root.u.def.section = htab->root.splt; |
5e681ec4 | 16074 | h->root.u.def.value = h->plt.offset; |
5e681ec4 | 16075 | |
67d74e43 DJ |
16076 | /* Make sure the function is not marked as Thumb, in case |
16077 | it is the target of an ABS32 relocation, which will | |
16078 | point to the PLT entry. */ | |
39d911fc | 16079 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
67d74e43 | 16080 | } |
022f8312 | 16081 | |
00a97672 RS |
16082 | /* VxWorks executables have a second set of relocations for |
16083 | each PLT entry. They go in a separate relocation section, | |
16084 | which is processed by the kernel loader. */ | |
0e1862bb | 16085 | if (htab->vxworks_p && !bfd_link_pic (info)) |
00a97672 RS |
16086 | { |
16087 | /* There is a relocation for the initial PLT entry: | |
16088 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
16089 | if (h->plt.offset == htab->plt_header_size) | |
47beaa6a | 16090 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
00a97672 RS |
16091 | |
16092 | /* There are two extra relocations for each subsequent | |
16093 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
16094 | and an R_ARM_32 relocation for the PLT entry. */ | |
47beaa6a | 16095 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
00a97672 | 16096 | } |
5e681ec4 PB |
16097 | } |
16098 | else | |
16099 | { | |
16100 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 16101 | h->needs_plt = 0; |
5e681ec4 PB |
16102 | } |
16103 | } | |
16104 | else | |
16105 | { | |
16106 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 16107 | h->needs_plt = 0; |
5e681ec4 PB |
16108 | } |
16109 | ||
0855e32b NS |
16110 | eh = (struct elf32_arm_link_hash_entry *) h; |
16111 | eh->tlsdesc_got = (bfd_vma) -1; | |
16112 | ||
5e681ec4 PB |
16113 | if (h->got.refcount > 0) |
16114 | { | |
16115 | asection *s; | |
16116 | bfd_boolean dyn; | |
ba93b8ac DJ |
16117 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
16118 | int indx; | |
5e681ec4 PB |
16119 | |
16120 | /* Make sure this symbol is output as a dynamic symbol. | |
16121 | Undefined weak syms won't yet be marked as dynamic. */ | |
e8b09b87 | 16122 | if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local |
6c699715 | 16123 | && h->root.type == bfd_link_hash_undefweak) |
5e681ec4 | 16124 | { |
c152c796 | 16125 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
16126 | return FALSE; |
16127 | } | |
16128 | ||
e5a52504 MM |
16129 | if (!htab->symbian_p) |
16130 | { | |
362d30a1 | 16131 | s = htab->root.sgot; |
e5a52504 | 16132 | h->got.offset = s->size; |
ba93b8ac DJ |
16133 | |
16134 | if (tls_type == GOT_UNKNOWN) | |
16135 | abort (); | |
16136 | ||
16137 | if (tls_type == GOT_NORMAL) | |
16138 | /* Non-TLS symbols need one GOT slot. */ | |
16139 | s->size += 4; | |
16140 | else | |
16141 | { | |
99059e56 RM |
16142 | if (tls_type & GOT_TLS_GDESC) |
16143 | { | |
0855e32b | 16144 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ |
99059e56 | 16145 | eh->tlsdesc_got |
0855e32b NS |
16146 | = (htab->root.sgotplt->size |
16147 | - elf32_arm_compute_jump_table_size (htab)); | |
99059e56 RM |
16148 | htab->root.sgotplt->size += 8; |
16149 | h->got.offset = (bfd_vma) -2; | |
34e77a92 | 16150 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 16151 | reloc in the middle of .got.plt. */ |
99059e56 RM |
16152 | htab->num_tls_desc++; |
16153 | } | |
0855e32b | 16154 | |
ba93b8ac | 16155 | if (tls_type & GOT_TLS_GD) |
0855e32b | 16156 | { |
5c5a4843 CL |
16157 | /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two |
16158 | consecutive GOT slots. If the symbol is both GD | |
16159 | and GDESC, got.offset may have been | |
16160 | overwritten. */ | |
0855e32b NS |
16161 | h->got.offset = s->size; |
16162 | s->size += 8; | |
16163 | } | |
16164 | ||
ba93b8ac | 16165 | if (tls_type & GOT_TLS_IE) |
5c5a4843 CL |
16166 | /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT |
16167 | slot. */ | |
ba93b8ac DJ |
16168 | s->size += 4; |
16169 | } | |
16170 | ||
e5a52504 | 16171 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac DJ |
16172 | |
16173 | indx = 0; | |
0e1862bb L |
16174 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
16175 | bfd_link_pic (info), | |
16176 | h) | |
16177 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
16178 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
16179 | indx = h->dynindx; | |
16180 | ||
16181 | if (tls_type != GOT_NORMAL | |
0e1862bb | 16182 | && (bfd_link_pic (info) || indx != 0) |
ba93b8ac DJ |
16183 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
16184 | || h->root.type != bfd_link_hash_undefweak)) | |
16185 | { | |
16186 | if (tls_type & GOT_TLS_IE) | |
47beaa6a | 16187 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
16188 | |
16189 | if (tls_type & GOT_TLS_GD) | |
47beaa6a | 16190 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 16191 | |
b38cadfb | 16192 | if (tls_type & GOT_TLS_GDESC) |
0855e32b | 16193 | { |
47beaa6a | 16194 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
0855e32b NS |
16195 | /* GDESC needs a trampoline to jump to. */ |
16196 | htab->tls_trampoline = -1; | |
16197 | } | |
16198 | ||
16199 | /* Only GD needs it. GDESC just emits one relocation per | |
16200 | 2 entries. */ | |
b38cadfb | 16201 | if ((tls_type & GOT_TLS_GD) && indx != 0) |
47beaa6a | 16202 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 16203 | } |
e8b09b87 CL |
16204 | else if (((indx != -1) || htab->fdpic_p) |
16205 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
b436d854 RS |
16206 | { |
16207 | if (htab->root.dynamic_sections_created) | |
16208 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ | |
16209 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16210 | } | |
34e77a92 RS |
16211 | else if (h->type == STT_GNU_IFUNC |
16212 | && eh->plt.noncall_refcount == 0) | |
16213 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; | |
16214 | they all resolve dynamically instead. Reserve room for the | |
16215 | GOT entry's R_ARM_IRELATIVE relocation. */ | |
16216 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); | |
0e1862bb L |
16217 | else if (bfd_link_pic (info) |
16218 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
16219 | || h->root.type != bfd_link_hash_undefweak)) | |
b436d854 | 16220 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ |
47beaa6a | 16221 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e8b09b87 CL |
16222 | else if (htab->fdpic_p && tls_type == GOT_NORMAL) |
16223 | /* Reserve room for rofixup for FDPIC executable. */ | |
16224 | /* TLS relocs do not need space since they are completely | |
16225 | resolved. */ | |
16226 | htab->srofixup->size += 4; | |
e5a52504 | 16227 | } |
5e681ec4 PB |
16228 | } |
16229 | else | |
16230 | h->got.offset = (bfd_vma) -1; | |
16231 | ||
e8b09b87 CL |
16232 | /* FDPIC support. */ |
16233 | if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0) | |
16234 | { | |
16235 | /* Symbol musn't be exported. */ | |
16236 | if (h->dynindx != -1) | |
16237 | abort(); | |
16238 | ||
16239 | /* We only allocate one function descriptor with its associated relocation. */ | |
16240 | if (eh->fdpic_cnts.funcdesc_offset == -1) | |
16241 | { | |
16242 | asection *s = htab->root.sgot; | |
16243 | ||
16244 | eh->fdpic_cnts.funcdesc_offset = s->size; | |
16245 | s->size += 8; | |
16246 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
16247 | if (bfd_link_pic(info)) | |
16248 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16249 | else | |
16250 | htab->srofixup->size += 8; | |
16251 | } | |
16252 | } | |
16253 | ||
16254 | if (eh->fdpic_cnts.gotfuncdesc_cnt > 0) | |
16255 | { | |
16256 | asection *s = htab->root.sgot; | |
16257 | ||
16258 | if (htab->root.dynamic_sections_created && h->dynindx == -1 | |
16259 | && !h->forced_local) | |
16260 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
16261 | return FALSE; | |
16262 | ||
16263 | if (h->dynindx == -1) | |
16264 | { | |
16265 | /* We only allocate one function descriptor with its associated relocation. q */ | |
16266 | if (eh->fdpic_cnts.funcdesc_offset == -1) | |
16267 | { | |
16268 | ||
16269 | eh->fdpic_cnts.funcdesc_offset = s->size; | |
16270 | s->size += 8; | |
16271 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
16272 | if (bfd_link_pic(info)) | |
16273 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16274 | else | |
16275 | htab->srofixup->size += 8; | |
16276 | } | |
16277 | } | |
16278 | ||
16279 | /* Add one entry into the GOT and a R_ARM_FUNCDESC or | |
16280 | R_ARM_RELATIVE/rofixup relocation on it. */ | |
16281 | eh->fdpic_cnts.gotfuncdesc_offset = s->size; | |
16282 | s->size += 4; | |
16283 | if (h->dynindx == -1 && !bfd_link_pic(info)) | |
16284 | htab->srofixup->size += 4; | |
16285 | else | |
16286 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16287 | } | |
16288 | ||
16289 | if (eh->fdpic_cnts.funcdesc_cnt > 0) | |
16290 | { | |
16291 | if (htab->root.dynamic_sections_created && h->dynindx == -1 | |
16292 | && !h->forced_local) | |
16293 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
16294 | return FALSE; | |
16295 | ||
16296 | if (h->dynindx == -1) | |
16297 | { | |
16298 | /* We only allocate one function descriptor with its associated relocation. */ | |
16299 | if (eh->fdpic_cnts.funcdesc_offset == -1) | |
16300 | { | |
16301 | asection *s = htab->root.sgot; | |
16302 | ||
16303 | eh->fdpic_cnts.funcdesc_offset = s->size; | |
16304 | s->size += 8; | |
16305 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
16306 | if (bfd_link_pic(info)) | |
16307 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
16308 | else | |
16309 | htab->srofixup->size += 8; | |
16310 | } | |
16311 | } | |
16312 | if (h->dynindx == -1 && !bfd_link_pic(info)) | |
16313 | { | |
16314 | /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */ | |
16315 | htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt; | |
16316 | } | |
16317 | else | |
16318 | { | |
16319 | /* Will need one dynamic reloc per reference. will be either | |
16320 | R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */ | |
16321 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, | |
16322 | eh->fdpic_cnts.funcdesc_cnt); | |
16323 | } | |
16324 | } | |
16325 | ||
a4fd1a8e PB |
16326 | /* Allocate stubs for exported Thumb functions on v4t. */ |
16327 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 16328 | && h->def_regular |
39d911fc | 16329 | && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB |
a4fd1a8e PB |
16330 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
16331 | { | |
16332 | struct elf_link_hash_entry * th; | |
16333 | struct bfd_link_hash_entry * bh; | |
16334 | struct elf_link_hash_entry * myh; | |
16335 | char name[1024]; | |
16336 | asection *s; | |
16337 | bh = NULL; | |
16338 | /* Create a new symbol to regist the real location of the function. */ | |
16339 | s = h->root.u.def.section; | |
906e58ca | 16340 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
16341 | _bfd_generic_link_add_one_symbol (info, s->owner, |
16342 | name, BSF_GLOBAL, s, | |
16343 | h->root.u.def.value, | |
16344 | NULL, TRUE, FALSE, &bh); | |
16345 | ||
16346 | myh = (struct elf_link_hash_entry *) bh; | |
35fc36a8 | 16347 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
a4fd1a8e | 16348 | myh->forced_local = 1; |
39d911fc | 16349 | ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB); |
a4fd1a8e PB |
16350 | eh->export_glue = myh; |
16351 | th = record_arm_to_thumb_glue (info, h); | |
16352 | /* Point the symbol at the stub. */ | |
16353 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
39d911fc | 16354 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
a4fd1a8e PB |
16355 | h->root.u.def.section = th->root.u.def.section; |
16356 | h->root.u.def.value = th->root.u.def.value & ~1; | |
16357 | } | |
16358 | ||
0bdcacaf | 16359 | if (eh->dyn_relocs == NULL) |
5e681ec4 PB |
16360 | return TRUE; |
16361 | ||
16362 | /* In the shared -Bsymbolic case, discard space allocated for | |
16363 | dynamic pc-relative relocs against symbols which turn out to be | |
16364 | defined in regular objects. For the normal shared case, discard | |
16365 | space for pc-relative relocs that have become local due to symbol | |
16366 | visibility changes. */ | |
16367 | ||
e8b09b87 | 16368 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p) |
5e681ec4 | 16369 | { |
469a3493 RM |
16370 | /* Relocs that use pc_count are PC-relative forms, which will appear |
16371 | on something like ".long foo - ." or "movw REG, foo - .". We want | |
16372 | calls to protected symbols to resolve directly to the function | |
16373 | rather than going via the plt. If people want function pointer | |
16374 | comparisons to work as expected then they should avoid writing | |
16375 | assembly like ".long foo - .". */ | |
ba93b8ac DJ |
16376 | if (SYMBOL_CALLS_LOCAL (info, h)) |
16377 | { | |
0bdcacaf | 16378 | struct elf_dyn_relocs **pp; |
ba93b8ac | 16379 | |
0bdcacaf | 16380 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
ba93b8ac DJ |
16381 | { |
16382 | p->count -= p->pc_count; | |
16383 | p->pc_count = 0; | |
16384 | if (p->count == 0) | |
16385 | *pp = p->next; | |
16386 | else | |
16387 | pp = &p->next; | |
16388 | } | |
16389 | } | |
16390 | ||
4dfe6ac6 | 16391 | if (htab->vxworks_p) |
3348747a | 16392 | { |
0bdcacaf | 16393 | struct elf_dyn_relocs **pp; |
3348747a | 16394 | |
0bdcacaf | 16395 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
3348747a | 16396 | { |
0bdcacaf | 16397 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
3348747a NS |
16398 | *pp = p->next; |
16399 | else | |
16400 | pp = &p->next; | |
16401 | } | |
16402 | } | |
16403 | ||
ba93b8ac | 16404 | /* Also discard relocs on undefined weak syms with non-default |
99059e56 | 16405 | visibility. */ |
0bdcacaf | 16406 | if (eh->dyn_relocs != NULL |
5e681ec4 | 16407 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 | 16408 | { |
95b03e4a L |
16409 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT |
16410 | || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) | |
0bdcacaf | 16411 | eh->dyn_relocs = NULL; |
22d606e9 AM |
16412 | |
16413 | /* Make sure undefined weak symbols are output as a dynamic | |
16414 | symbol in PIEs. */ | |
e8b09b87 | 16415 | else if (htab->root.dynamic_sections_created && h->dynindx == -1 |
22d606e9 AM |
16416 | && !h->forced_local) |
16417 | { | |
16418 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
16419 | return FALSE; | |
16420 | } | |
16421 | } | |
16422 | ||
67687978 PB |
16423 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
16424 | && h->root.type == bfd_link_hash_new) | |
16425 | { | |
16426 | /* Output absolute symbols so that we can create relocations | |
16427 | against them. For normal symbols we output a relocation | |
16428 | against the section that contains them. */ | |
16429 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
16430 | return FALSE; | |
16431 | } | |
16432 | ||
5e681ec4 PB |
16433 | } |
16434 | else | |
16435 | { | |
16436 | /* For the non-shared case, discard space for relocs against | |
16437 | symbols which turn out to need copy relocs or are not | |
16438 | dynamic. */ | |
16439 | ||
f5385ebf AM |
16440 | if (!h->non_got_ref |
16441 | && ((h->def_dynamic | |
16442 | && !h->def_regular) | |
5e681ec4 PB |
16443 | || (htab->root.dynamic_sections_created |
16444 | && (h->root.type == bfd_link_hash_undefweak | |
16445 | || h->root.type == bfd_link_hash_undefined)))) | |
16446 | { | |
16447 | /* Make sure this symbol is output as a dynamic symbol. | |
16448 | Undefined weak syms won't yet be marked as dynamic. */ | |
6c699715 RL |
16449 | if (h->dynindx == -1 && !h->forced_local |
16450 | && h->root.type == bfd_link_hash_undefweak) | |
5e681ec4 | 16451 | { |
c152c796 | 16452 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
16453 | return FALSE; |
16454 | } | |
16455 | ||
16456 | /* If that succeeded, we know we'll be keeping all the | |
16457 | relocs. */ | |
16458 | if (h->dynindx != -1) | |
16459 | goto keep; | |
16460 | } | |
16461 | ||
0bdcacaf | 16462 | eh->dyn_relocs = NULL; |
5e681ec4 PB |
16463 | |
16464 | keep: ; | |
16465 | } | |
16466 | ||
16467 | /* Finally, allocate space. */ | |
0bdcacaf | 16468 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
5e681ec4 | 16469 | { |
0bdcacaf | 16470 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
e8b09b87 | 16471 | |
34e77a92 RS |
16472 | if (h->type == STT_GNU_IFUNC |
16473 | && eh->plt.noncall_refcount == 0 | |
16474 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
16475 | elf32_arm_allocate_irelocs (info, sreloc, p->count); | |
e8b09b87 CL |
16476 | else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular)) |
16477 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
16478 | else if (htab->fdpic_p && !bfd_link_pic(info)) | |
16479 | htab->srofixup->size += 4 * p->count; | |
34e77a92 RS |
16480 | else |
16481 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
5e681ec4 PB |
16482 | } |
16483 | ||
16484 | return TRUE; | |
16485 | } | |
16486 | ||
63c1f59d AM |
16487 | /* Set DF_TEXTREL if we find any dynamic relocs that apply to |
16488 | read-only sections. */ | |
08d1f311 DJ |
16489 | |
16490 | static bfd_boolean | |
63c1f59d | 16491 | maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p) |
08d1f311 | 16492 | { |
63c1f59d | 16493 | asection *sec; |
08d1f311 | 16494 | |
63c1f59d AM |
16495 | if (h->root.type == bfd_link_hash_indirect) |
16496 | return TRUE; | |
08d1f311 | 16497 | |
63c1f59d AM |
16498 | sec = readonly_dynrelocs (h); |
16499 | if (sec != NULL) | |
16500 | { | |
16501 | struct bfd_link_info *info = (struct bfd_link_info *) info_p; | |
08d1f311 | 16502 | |
63c1f59d AM |
16503 | info->flags |= DF_TEXTREL; |
16504 | info->callbacks->minfo | |
c1c8c1ef | 16505 | (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"), |
63c1f59d | 16506 | sec->owner, h->root.root.string, sec); |
08d1f311 | 16507 | |
63c1f59d AM |
16508 | /* Not an error, just cut short the traversal. */ |
16509 | return FALSE; | |
08d1f311 | 16510 | } |
cb10292c | 16511 | |
08d1f311 DJ |
16512 | return TRUE; |
16513 | } | |
16514 | ||
d504ffc8 DJ |
16515 | void |
16516 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
16517 | int byteswap_code) | |
16518 | { | |
16519 | struct elf32_arm_link_hash_table *globals; | |
16520 | ||
16521 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
16522 | if (globals == NULL) |
16523 | return; | |
16524 | ||
d504ffc8 DJ |
16525 | globals->byteswap_code = byteswap_code; |
16526 | } | |
16527 | ||
252b5132 RH |
16528 | /* Set the sizes of the dynamic sections. */ |
16529 | ||
b34976b6 | 16530 | static bfd_boolean |
57e8b36a NC |
16531 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
16532 | struct bfd_link_info * info) | |
252b5132 RH |
16533 | { |
16534 | bfd * dynobj; | |
16535 | asection * s; | |
b34976b6 AM |
16536 | bfd_boolean plt; |
16537 | bfd_boolean relocs; | |
5e681ec4 PB |
16538 | bfd *ibfd; |
16539 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 16540 | |
5e681ec4 | 16541 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
16542 | if (htab == NULL) |
16543 | return FALSE; | |
16544 | ||
252b5132 RH |
16545 | dynobj = elf_hash_table (info)->dynobj; |
16546 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 16547 | check_use_blx (htab); |
252b5132 RH |
16548 | |
16549 | if (elf_hash_table (info)->dynamic_sections_created) | |
16550 | { | |
16551 | /* Set the contents of the .interp section to the interpreter. */ | |
9b8b325a | 16552 | if (bfd_link_executable (info) && !info->nointerp) |
252b5132 | 16553 | { |
3d4d4302 | 16554 | s = bfd_get_linker_section (dynobj, ".interp"); |
252b5132 | 16555 | BFD_ASSERT (s != NULL); |
eea6121a | 16556 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
16557 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
16558 | } | |
16559 | } | |
5e681ec4 PB |
16560 | |
16561 | /* Set up .got offsets for local syms, and space for local dynamic | |
16562 | relocs. */ | |
c72f2fb2 | 16563 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
252b5132 | 16564 | { |
5e681ec4 PB |
16565 | bfd_signed_vma *local_got; |
16566 | bfd_signed_vma *end_local_got; | |
34e77a92 | 16567 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
5e681ec4 | 16568 | char *local_tls_type; |
0855e32b | 16569 | bfd_vma *local_tlsdesc_gotent; |
5e681ec4 PB |
16570 | bfd_size_type locsymcount; |
16571 | Elf_Internal_Shdr *symtab_hdr; | |
16572 | asection *srel; | |
4dfe6ac6 | 16573 | bfd_boolean is_vxworks = htab->vxworks_p; |
34e77a92 | 16574 | unsigned int symndx; |
e8b09b87 | 16575 | struct fdpic_local *local_fdpic_cnts; |
5e681ec4 | 16576 | |
0ffa91dd | 16577 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
16578 | continue; |
16579 | ||
16580 | for (s = ibfd->sections; s != NULL; s = s->next) | |
16581 | { | |
0bdcacaf | 16582 | struct elf_dyn_relocs *p; |
5e681ec4 | 16583 | |
0bdcacaf | 16584 | for (p = (struct elf_dyn_relocs *) |
99059e56 | 16585 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
5e681ec4 | 16586 | { |
0bdcacaf RS |
16587 | if (!bfd_is_abs_section (p->sec) |
16588 | && bfd_is_abs_section (p->sec->output_section)) | |
5e681ec4 PB |
16589 | { |
16590 | /* Input section has been discarded, either because | |
16591 | it is a copy of a linkonce section or due to | |
16592 | linker script /DISCARD/, so we'll be discarding | |
16593 | the relocs too. */ | |
16594 | } | |
3348747a | 16595 | else if (is_vxworks |
0bdcacaf | 16596 | && strcmp (p->sec->output_section->name, |
3348747a NS |
16597 | ".tls_vars") == 0) |
16598 | { | |
16599 | /* Relocations in vxworks .tls_vars sections are | |
16600 | handled specially by the loader. */ | |
16601 | } | |
5e681ec4 PB |
16602 | else if (p->count != 0) |
16603 | { | |
0bdcacaf | 16604 | srel = elf_section_data (p->sec)->sreloc; |
e8b09b87 CL |
16605 | if (htab->fdpic_p && !bfd_link_pic(info)) |
16606 | htab->srofixup->size += 4 * p->count; | |
16607 | else | |
16608 | elf32_arm_allocate_dynrelocs (info, srel, p->count); | |
0bdcacaf | 16609 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
5e681ec4 PB |
16610 | info->flags |= DF_TEXTREL; |
16611 | } | |
16612 | } | |
16613 | } | |
16614 | ||
16615 | local_got = elf_local_got_refcounts (ibfd); | |
16616 | if (!local_got) | |
16617 | continue; | |
16618 | ||
0ffa91dd | 16619 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
16620 | locsymcount = symtab_hdr->sh_info; |
16621 | end_local_got = local_got + locsymcount; | |
34e77a92 | 16622 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
ba93b8ac | 16623 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
0855e32b | 16624 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
e8b09b87 | 16625 | local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd); |
34e77a92 | 16626 | symndx = 0; |
362d30a1 RS |
16627 | s = htab->root.sgot; |
16628 | srel = htab->root.srelgot; | |
0855e32b | 16629 | for (; local_got < end_local_got; |
34e77a92 | 16630 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
e8b09b87 | 16631 | ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts) |
5e681ec4 | 16632 | { |
0855e32b | 16633 | *local_tlsdesc_gotent = (bfd_vma) -1; |
34e77a92 | 16634 | local_iplt = *local_iplt_ptr; |
e8b09b87 CL |
16635 | |
16636 | /* FDPIC support. */ | |
16637 | if (local_fdpic_cnts->gotofffuncdesc_cnt > 0) | |
16638 | { | |
16639 | if (local_fdpic_cnts->funcdesc_offset == -1) | |
16640 | { | |
16641 | local_fdpic_cnts->funcdesc_offset = s->size; | |
16642 | s->size += 8; | |
16643 | ||
16644 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
16645 | if (bfd_link_pic(info)) | |
16646 | elf32_arm_allocate_dynrelocs (info, srel, 1); | |
16647 | else | |
16648 | htab->srofixup->size += 8; | |
16649 | } | |
16650 | } | |
16651 | ||
16652 | if (local_fdpic_cnts->funcdesc_cnt > 0) | |
16653 | { | |
16654 | if (local_fdpic_cnts->funcdesc_offset == -1) | |
16655 | { | |
16656 | local_fdpic_cnts->funcdesc_offset = s->size; | |
16657 | s->size += 8; | |
16658 | ||
16659 | /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */ | |
16660 | if (bfd_link_pic(info)) | |
16661 | elf32_arm_allocate_dynrelocs (info, srel, 1); | |
16662 | else | |
16663 | htab->srofixup->size += 8; | |
16664 | } | |
16665 | ||
16666 | /* We will add n R_ARM_RELATIVE relocations or n rofixups. */ | |
16667 | if (bfd_link_pic(info)) | |
16668 | elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt); | |
16669 | else | |
16670 | htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt; | |
16671 | } | |
16672 | ||
34e77a92 RS |
16673 | if (local_iplt != NULL) |
16674 | { | |
16675 | struct elf_dyn_relocs *p; | |
16676 | ||
16677 | if (local_iplt->root.refcount > 0) | |
16678 | { | |
16679 | elf32_arm_allocate_plt_entry (info, TRUE, | |
16680 | &local_iplt->root, | |
16681 | &local_iplt->arm); | |
16682 | if (local_iplt->arm.noncall_refcount == 0) | |
16683 | /* All references to the PLT are calls, so all | |
16684 | non-call references can resolve directly to the | |
16685 | run-time target. This means that the .got entry | |
16686 | would be the same as the .igot.plt entry, so there's | |
16687 | no point creating both. */ | |
16688 | *local_got = 0; | |
16689 | } | |
16690 | else | |
16691 | { | |
16692 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); | |
16693 | local_iplt->root.offset = (bfd_vma) -1; | |
16694 | } | |
16695 | ||
16696 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) | |
16697 | { | |
16698 | asection *psrel; | |
16699 | ||
16700 | psrel = elf_section_data (p->sec)->sreloc; | |
16701 | if (local_iplt->arm.noncall_refcount == 0) | |
16702 | elf32_arm_allocate_irelocs (info, psrel, p->count); | |
16703 | else | |
16704 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); | |
16705 | } | |
16706 | } | |
5e681ec4 PB |
16707 | if (*local_got > 0) |
16708 | { | |
34e77a92 RS |
16709 | Elf_Internal_Sym *isym; |
16710 | ||
eea6121a | 16711 | *local_got = s->size; |
ba93b8ac DJ |
16712 | if (*local_tls_type & GOT_TLS_GD) |
16713 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
16714 | s->size += 8; | |
0855e32b NS |
16715 | if (*local_tls_type & GOT_TLS_GDESC) |
16716 | { | |
16717 | *local_tlsdesc_gotent = htab->root.sgotplt->size | |
16718 | - elf32_arm_compute_jump_table_size (htab); | |
16719 | htab->root.sgotplt->size += 8; | |
16720 | *local_got = (bfd_vma) -2; | |
34e77a92 | 16721 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 16722 | reloc in the middle of .got.plt. */ |
99059e56 | 16723 | htab->num_tls_desc++; |
0855e32b | 16724 | } |
ba93b8ac DJ |
16725 | if (*local_tls_type & GOT_TLS_IE) |
16726 | s->size += 4; | |
ba93b8ac | 16727 | |
0855e32b NS |
16728 | if (*local_tls_type & GOT_NORMAL) |
16729 | { | |
16730 | /* If the symbol is both GD and GDESC, *local_got | |
16731 | may have been overwritten. */ | |
16732 | *local_got = s->size; | |
16733 | s->size += 4; | |
16734 | } | |
16735 | ||
34e77a92 RS |
16736 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); |
16737 | if (isym == NULL) | |
16738 | return FALSE; | |
16739 | ||
16740 | /* If all references to an STT_GNU_IFUNC PLT are calls, | |
16741 | then all non-call references, including this GOT entry, | |
16742 | resolve directly to the run-time target. */ | |
16743 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC | |
16744 | && (local_iplt == NULL | |
16745 | || local_iplt->arm.noncall_refcount == 0)) | |
16746 | elf32_arm_allocate_irelocs (info, srel, 1); | |
e8b09b87 | 16747 | else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p) |
0855e32b | 16748 | { |
e8b09b87 | 16749 | if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))) |
3064e1ff | 16750 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
e8b09b87 CL |
16751 | else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL) |
16752 | htab->srofixup->size += 4; | |
99059e56 | 16753 | |
e8b09b87 CL |
16754 | if ((bfd_link_pic (info) || htab->fdpic_p) |
16755 | && *local_tls_type & GOT_TLS_GDESC) | |
3064e1ff JB |
16756 | { |
16757 | elf32_arm_allocate_dynrelocs (info, | |
16758 | htab->root.srelplt, 1); | |
16759 | htab->tls_trampoline = -1; | |
16760 | } | |
0855e32b | 16761 | } |
5e681ec4 PB |
16762 | } |
16763 | else | |
16764 | *local_got = (bfd_vma) -1; | |
16765 | } | |
252b5132 RH |
16766 | } |
16767 | ||
ba93b8ac DJ |
16768 | if (htab->tls_ldm_got.refcount > 0) |
16769 | { | |
16770 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
5c5a4843 | 16771 | for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */ |
362d30a1 RS |
16772 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
16773 | htab->root.sgot->size += 8; | |
0e1862bb | 16774 | if (bfd_link_pic (info)) |
47beaa6a | 16775 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
16776 | } |
16777 | else | |
16778 | htab->tls_ldm_got.offset = -1; | |
16779 | ||
e8b09b87 CL |
16780 | /* At the very end of the .rofixup section is a pointer to the GOT, |
16781 | reserve space for it. */ | |
16782 | if (htab->fdpic_p && htab->srofixup != NULL) | |
16783 | htab->srofixup->size += 4; | |
16784 | ||
5e681ec4 PB |
16785 | /* Allocate global sym .plt and .got entries, and space for global |
16786 | sym dynamic relocs. */ | |
47beaa6a | 16787 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
252b5132 | 16788 | |
d504ffc8 | 16789 | /* Here we rummage through the found bfds to collect glue information. */ |
c72f2fb2 | 16790 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
c7b8f16e | 16791 | { |
0ffa91dd | 16792 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
16793 | continue; |
16794 | ||
c7b8f16e JB |
16795 | /* Initialise mapping tables for code/data. */ |
16796 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 16797 | |
c7b8f16e | 16798 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
a504d23a LA |
16799 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info) |
16800 | || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info)) | |
90b6238f | 16801 | _bfd_error_handler (_("errors encountered processing file %pB"), ibfd); |
c7b8f16e | 16802 | } |
d504ffc8 | 16803 | |
3e6b1042 DJ |
16804 | /* Allocate space for the glue sections now that we've sized them. */ |
16805 | bfd_elf32_arm_allocate_interworking_sections (info); | |
16806 | ||
0855e32b NS |
16807 | /* For every jump slot reserved in the sgotplt, reloc_count is |
16808 | incremented. However, when we reserve space for TLS descriptors, | |
16809 | it's not incremented, so in order to compute the space reserved | |
16810 | for them, it suffices to multiply the reloc count by the jump | |
16811 | slot size. */ | |
16812 | if (htab->root.srelplt) | |
16813 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab); | |
16814 | ||
16815 | if (htab->tls_trampoline) | |
16816 | { | |
16817 | if (htab->root.splt->size == 0) | |
16818 | htab->root.splt->size += htab->plt_header_size; | |
b38cadfb | 16819 | |
0855e32b NS |
16820 | htab->tls_trampoline = htab->root.splt->size; |
16821 | htab->root.splt->size += htab->plt_entry_size; | |
b38cadfb | 16822 | |
0855e32b | 16823 | /* If we're not using lazy TLS relocations, don't generate the |
99059e56 | 16824 | PLT and GOT entries they require. */ |
0855e32b NS |
16825 | if (!(info->flags & DF_BIND_NOW)) |
16826 | { | |
16827 | htab->dt_tlsdesc_got = htab->root.sgot->size; | |
16828 | htab->root.sgot->size += 4; | |
16829 | ||
16830 | htab->dt_tlsdesc_plt = htab->root.splt->size; | |
16831 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); | |
16832 | } | |
16833 | } | |
16834 | ||
252b5132 RH |
16835 | /* The check_relocs and adjust_dynamic_symbol entry points have |
16836 | determined the sizes of the various dynamic sections. Allocate | |
16837 | memory for them. */ | |
b34976b6 AM |
16838 | plt = FALSE; |
16839 | relocs = FALSE; | |
252b5132 RH |
16840 | for (s = dynobj->sections; s != NULL; s = s->next) |
16841 | { | |
16842 | const char * name; | |
252b5132 RH |
16843 | |
16844 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
16845 | continue; | |
16846 | ||
16847 | /* It's OK to base decisions on the section name, because none | |
16848 | of the dynobj section names depend upon the input files. */ | |
16849 | name = bfd_get_section_name (dynobj, s); | |
16850 | ||
34e77a92 | 16851 | if (s == htab->root.splt) |
252b5132 | 16852 | { |
c456f082 AM |
16853 | /* Remember whether there is a PLT. */ |
16854 | plt = s->size != 0; | |
252b5132 | 16855 | } |
0112cd26 | 16856 | else if (CONST_STRNEQ (name, ".rel")) |
252b5132 | 16857 | { |
c456f082 | 16858 | if (s->size != 0) |
252b5132 | 16859 | { |
252b5132 | 16860 | /* Remember whether there are any reloc sections other |
00a97672 | 16861 | than .rel(a).plt and .rela.plt.unloaded. */ |
362d30a1 | 16862 | if (s != htab->root.srelplt && s != htab->srelplt2) |
b34976b6 | 16863 | relocs = TRUE; |
252b5132 RH |
16864 | |
16865 | /* We use the reloc_count field as a counter if we need | |
16866 | to copy relocs into the output file. */ | |
16867 | s->reloc_count = 0; | |
16868 | } | |
16869 | } | |
34e77a92 RS |
16870 | else if (s != htab->root.sgot |
16871 | && s != htab->root.sgotplt | |
16872 | && s != htab->root.iplt | |
16873 | && s != htab->root.igotplt | |
5474d94f | 16874 | && s != htab->root.sdynbss |
e8b09b87 CL |
16875 | && s != htab->root.sdynrelro |
16876 | && s != htab->srofixup) | |
252b5132 RH |
16877 | { |
16878 | /* It's not one of our sections, so don't allocate space. */ | |
16879 | continue; | |
16880 | } | |
16881 | ||
c456f082 | 16882 | if (s->size == 0) |
252b5132 | 16883 | { |
c456f082 | 16884 | /* If we don't need this section, strip it from the |
00a97672 RS |
16885 | output file. This is mostly to handle .rel(a).bss and |
16886 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
16887 | create_dynamic_sections, because they must be created |
16888 | before the linker maps input sections to output | |
16889 | sections. The linker does that before | |
16890 | adjust_dynamic_symbol is called, and it is that | |
16891 | function which decides whether anything needs to go | |
16892 | into these sections. */ | |
8423293d | 16893 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
16894 | continue; |
16895 | } | |
16896 | ||
c456f082 AM |
16897 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
16898 | continue; | |
16899 | ||
252b5132 | 16900 | /* Allocate memory for the section contents. */ |
21d799b5 | 16901 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 16902 | if (s->contents == NULL) |
b34976b6 | 16903 | return FALSE; |
252b5132 RH |
16904 | } |
16905 | ||
16906 | if (elf_hash_table (info)->dynamic_sections_created) | |
16907 | { | |
16908 | /* Add some entries to the .dynamic section. We fill in the | |
16909 | values later, in elf32_arm_finish_dynamic_sections, but we | |
16910 | must add the entries now so that we get the correct size for | |
16911 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
16912 | dynamic linker and used by the debugger. */ | |
dc810e39 | 16913 | #define add_dynamic_entry(TAG, VAL) \ |
5a580b3a | 16914 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
dc810e39 | 16915 | |
0e1862bb | 16916 | if (bfd_link_executable (info)) |
252b5132 | 16917 | { |
dc810e39 | 16918 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
b34976b6 | 16919 | return FALSE; |
252b5132 RH |
16920 | } |
16921 | ||
16922 | if (plt) | |
16923 | { | |
dc810e39 AM |
16924 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
16925 | || !add_dynamic_entry (DT_PLTRELSZ, 0) | |
00a97672 RS |
16926 | || !add_dynamic_entry (DT_PLTREL, |
16927 | htab->use_rel ? DT_REL : DT_RELA) | |
dc810e39 | 16928 | || !add_dynamic_entry (DT_JMPREL, 0)) |
b34976b6 | 16929 | return FALSE; |
0855e32b | 16930 | |
5025eb7c AO |
16931 | if (htab->dt_tlsdesc_plt |
16932 | && (!add_dynamic_entry (DT_TLSDESC_PLT,0) | |
16933 | || !add_dynamic_entry (DT_TLSDESC_GOT,0))) | |
b38cadfb | 16934 | return FALSE; |
252b5132 RH |
16935 | } |
16936 | ||
16937 | if (relocs) | |
16938 | { | |
00a97672 RS |
16939 | if (htab->use_rel) |
16940 | { | |
16941 | if (!add_dynamic_entry (DT_REL, 0) | |
16942 | || !add_dynamic_entry (DT_RELSZ, 0) | |
16943 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) | |
16944 | return FALSE; | |
16945 | } | |
16946 | else | |
16947 | { | |
16948 | if (!add_dynamic_entry (DT_RELA, 0) | |
16949 | || !add_dynamic_entry (DT_RELASZ, 0) | |
16950 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) | |
16951 | return FALSE; | |
16952 | } | |
252b5132 RH |
16953 | } |
16954 | ||
08d1f311 DJ |
16955 | /* If any dynamic relocs apply to a read-only section, |
16956 | then we need a DT_TEXTREL entry. */ | |
16957 | if ((info->flags & DF_TEXTREL) == 0) | |
63c1f59d | 16958 | elf_link_hash_traverse (&htab->root, maybe_set_textrel, info); |
08d1f311 | 16959 | |
99e4ae17 | 16960 | if ((info->flags & DF_TEXTREL) != 0) |
252b5132 | 16961 | { |
dc810e39 | 16962 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
b34976b6 | 16963 | return FALSE; |
252b5132 | 16964 | } |
7a2b07ff NS |
16965 | if (htab->vxworks_p |
16966 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) | |
16967 | return FALSE; | |
252b5132 | 16968 | } |
8532796c | 16969 | #undef add_dynamic_entry |
252b5132 | 16970 | |
b34976b6 | 16971 | return TRUE; |
252b5132 RH |
16972 | } |
16973 | ||
0855e32b NS |
16974 | /* Size sections even though they're not dynamic. We use it to setup |
16975 | _TLS_MODULE_BASE_, if needed. */ | |
16976 | ||
16977 | static bfd_boolean | |
16978 | elf32_arm_always_size_sections (bfd *output_bfd, | |
99059e56 | 16979 | struct bfd_link_info *info) |
0855e32b NS |
16980 | { |
16981 | asection *tls_sec; | |
cb10292c CL |
16982 | struct elf32_arm_link_hash_table *htab; |
16983 | ||
16984 | htab = elf32_arm_hash_table (info); | |
0855e32b | 16985 | |
0e1862bb | 16986 | if (bfd_link_relocatable (info)) |
0855e32b NS |
16987 | return TRUE; |
16988 | ||
16989 | tls_sec = elf_hash_table (info)->tls_sec; | |
16990 | ||
16991 | if (tls_sec) | |
16992 | { | |
16993 | struct elf_link_hash_entry *tlsbase; | |
16994 | ||
16995 | tlsbase = elf_link_hash_lookup | |
16996 | (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE); | |
16997 | ||
16998 | if (tlsbase) | |
99059e56 RM |
16999 | { |
17000 | struct bfd_link_hash_entry *bh = NULL; | |
0855e32b | 17001 | const struct elf_backend_data *bed |
99059e56 | 17002 | = get_elf_backend_data (output_bfd); |
0855e32b | 17003 | |
99059e56 | 17004 | if (!(_bfd_generic_link_add_one_symbol |
0855e32b NS |
17005 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, |
17006 | tls_sec, 0, NULL, FALSE, | |
17007 | bed->collect, &bh))) | |
17008 | return FALSE; | |
b38cadfb | 17009 | |
99059e56 RM |
17010 | tlsbase->type = STT_TLS; |
17011 | tlsbase = (struct elf_link_hash_entry *)bh; | |
17012 | tlsbase->def_regular = 1; | |
17013 | tlsbase->other = STV_HIDDEN; | |
17014 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); | |
0855e32b NS |
17015 | } |
17016 | } | |
cb10292c CL |
17017 | |
17018 | if (htab->fdpic_p && !bfd_link_relocatable (info) | |
17019 | && !bfd_elf_stack_segment_size (output_bfd, info, | |
17020 | "__stacksize", DEFAULT_STACK_SIZE)) | |
17021 | return FALSE; | |
17022 | ||
0855e32b NS |
17023 | return TRUE; |
17024 | } | |
17025 | ||
252b5132 RH |
17026 | /* Finish up dynamic symbol handling. We set the contents of various |
17027 | dynamic sections here. */ | |
17028 | ||
b34976b6 | 17029 | static bfd_boolean |
906e58ca NC |
17030 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
17031 | struct bfd_link_info * info, | |
17032 | struct elf_link_hash_entry * h, | |
17033 | Elf_Internal_Sym * sym) | |
252b5132 | 17034 | { |
e5a52504 | 17035 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 17036 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 17037 | |
e5a52504 | 17038 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
17039 | if (htab == NULL) |
17040 | return FALSE; | |
17041 | ||
b7693d02 | 17042 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
17043 | |
17044 | if (h->plt.offset != (bfd_vma) -1) | |
17045 | { | |
34e77a92 | 17046 | if (!eh->is_iplt) |
e5a52504 | 17047 | { |
34e77a92 | 17048 | BFD_ASSERT (h->dynindx != -1); |
57460bcf NC |
17049 | if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, |
17050 | h->dynindx, 0)) | |
17051 | return FALSE; | |
e5a52504 | 17052 | } |
57e8b36a | 17053 | |
f5385ebf | 17054 | if (!h->def_regular) |
252b5132 RH |
17055 | { |
17056 | /* Mark the symbol as undefined, rather than as defined in | |
3a635617 | 17057 | the .plt section. */ |
252b5132 | 17058 | sym->st_shndx = SHN_UNDEF; |
3a635617 | 17059 | /* If the symbol is weak we need to clear the value. |
d982ba73 PB |
17060 | Otherwise, the PLT entry would provide a definition for |
17061 | the symbol even if the symbol wasn't defined anywhere, | |
3a635617 WN |
17062 | and so the symbol would never be NULL. Leave the value if |
17063 | there were any relocations where pointer equality matters | |
17064 | (this is a clue for the dynamic linker, to make function | |
17065 | pointer comparisons work between an application and shared | |
17066 | library). */ | |
97323ad1 | 17067 | if (!h->ref_regular_nonweak || !h->pointer_equality_needed) |
d982ba73 | 17068 | sym->st_value = 0; |
252b5132 | 17069 | } |
34e77a92 RS |
17070 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
17071 | { | |
17072 | /* At least one non-call relocation references this .iplt entry, | |
17073 | so the .iplt entry is the function's canonical address. */ | |
17074 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); | |
39d911fc | 17075 | ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM); |
34e77a92 RS |
17076 | sym->st_shndx = (_bfd_elf_section_from_bfd_section |
17077 | (output_bfd, htab->root.iplt->output_section)); | |
17078 | sym->st_value = (h->plt.offset | |
17079 | + htab->root.iplt->output_section->vma | |
17080 | + htab->root.iplt->output_offset); | |
17081 | } | |
252b5132 RH |
17082 | } |
17083 | ||
f5385ebf | 17084 | if (h->needs_copy) |
252b5132 RH |
17085 | { |
17086 | asection * s; | |
947216bf | 17087 | Elf_Internal_Rela rel; |
252b5132 RH |
17088 | |
17089 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
17090 | BFD_ASSERT (h->dynindx != -1 |
17091 | && (h->root.type == bfd_link_hash_defined | |
17092 | || h->root.type == bfd_link_hash_defweak)); | |
17093 | ||
00a97672 | 17094 | rel.r_addend = 0; |
252b5132 RH |
17095 | rel.r_offset = (h->root.u.def.value |
17096 | + h->root.u.def.section->output_section->vma | |
17097 | + h->root.u.def.section->output_offset); | |
17098 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
afbf7e8e | 17099 | if (h->root.u.def.section == htab->root.sdynrelro) |
5474d94f AM |
17100 | s = htab->root.sreldynrelro; |
17101 | else | |
17102 | s = htab->root.srelbss; | |
47beaa6a | 17103 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
252b5132 RH |
17104 | } |
17105 | ||
00a97672 | 17106 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
fac7bd64 CL |
17107 | and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: |
17108 | it is relative to the ".got" section. */ | |
9637f6ef | 17109 | if (h == htab->root.hdynamic |
fac7bd64 | 17110 | || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot)) |
252b5132 RH |
17111 | sym->st_shndx = SHN_ABS; |
17112 | ||
b34976b6 | 17113 | return TRUE; |
252b5132 RH |
17114 | } |
17115 | ||
0855e32b NS |
17116 | static void |
17117 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
17118 | void *contents, | |
17119 | const unsigned long *template, unsigned count) | |
17120 | { | |
17121 | unsigned ix; | |
b38cadfb | 17122 | |
0855e32b NS |
17123 | for (ix = 0; ix != count; ix++) |
17124 | { | |
17125 | unsigned long insn = template[ix]; | |
17126 | ||
17127 | /* Emit mov pc,rx if bx is not permitted. */ | |
17128 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) | |
17129 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
17130 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); | |
17131 | } | |
17132 | } | |
17133 | ||
99059e56 RM |
17134 | /* Install the special first PLT entry for elf32-arm-nacl. Unlike |
17135 | other variants, NaCl needs this entry in a static executable's | |
17136 | .iplt too. When we're handling that case, GOT_DISPLACEMENT is | |
17137 | zero. For .iplt really only the last bundle is useful, and .iplt | |
17138 | could have a shorter first entry, with each individual PLT entry's | |
17139 | relative branch calculated differently so it targets the last | |
17140 | bundle instead of the instruction before it (labelled .Lplt_tail | |
17141 | above). But it's simpler to keep the size and layout of PLT0 | |
17142 | consistent with the dynamic case, at the cost of some dead code at | |
17143 | the start of .iplt and the one dead store to the stack at the start | |
17144 | of .Lplt_tail. */ | |
17145 | static void | |
17146 | arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
17147 | asection *plt, bfd_vma got_displacement) | |
17148 | { | |
17149 | unsigned int i; | |
17150 | ||
17151 | put_arm_insn (htab, output_bfd, | |
17152 | elf32_arm_nacl_plt0_entry[0] | |
17153 | | arm_movw_immediate (got_displacement), | |
17154 | plt->contents + 0); | |
17155 | put_arm_insn (htab, output_bfd, | |
17156 | elf32_arm_nacl_plt0_entry[1] | |
17157 | | arm_movt_immediate (got_displacement), | |
17158 | plt->contents + 4); | |
17159 | ||
17160 | for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i) | |
17161 | put_arm_insn (htab, output_bfd, | |
17162 | elf32_arm_nacl_plt0_entry[i], | |
17163 | plt->contents + (i * 4)); | |
17164 | } | |
17165 | ||
252b5132 RH |
17166 | /* Finish up the dynamic sections. */ |
17167 | ||
b34976b6 | 17168 | static bfd_boolean |
57e8b36a | 17169 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
17170 | { |
17171 | bfd * dynobj; | |
17172 | asection * sgot; | |
17173 | asection * sdyn; | |
4dfe6ac6 NC |
17174 | struct elf32_arm_link_hash_table *htab; |
17175 | ||
17176 | htab = elf32_arm_hash_table (info); | |
17177 | if (htab == NULL) | |
17178 | return FALSE; | |
252b5132 RH |
17179 | |
17180 | dynobj = elf_hash_table (info)->dynobj; | |
17181 | ||
362d30a1 | 17182 | sgot = htab->root.sgotplt; |
894891db NC |
17183 | /* A broken linker script might have discarded the dynamic sections. |
17184 | Catch this here so that we do not seg-fault later on. */ | |
17185 | if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) | |
17186 | return FALSE; | |
3d4d4302 | 17187 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
252b5132 RH |
17188 | |
17189 | if (elf_hash_table (info)->dynamic_sections_created) | |
17190 | { | |
17191 | asection *splt; | |
17192 | Elf32_External_Dyn *dyncon, *dynconend; | |
17193 | ||
362d30a1 | 17194 | splt = htab->root.splt; |
24a1ba0f | 17195 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
cbc704f3 | 17196 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
252b5132 RH |
17197 | |
17198 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 17199 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 17200 | |
252b5132 RH |
17201 | for (; dyncon < dynconend; dyncon++) |
17202 | { | |
17203 | Elf_Internal_Dyn dyn; | |
17204 | const char * name; | |
17205 | asection * s; | |
17206 | ||
17207 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
17208 | ||
17209 | switch (dyn.d_tag) | |
17210 | { | |
229fcec5 MM |
17211 | unsigned int type; |
17212 | ||
252b5132 | 17213 | default: |
7a2b07ff NS |
17214 | if (htab->vxworks_p |
17215 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) | |
17216 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
17217 | break; |
17218 | ||
229fcec5 MM |
17219 | case DT_HASH: |
17220 | name = ".hash"; | |
17221 | goto get_vma_if_bpabi; | |
17222 | case DT_STRTAB: | |
17223 | name = ".dynstr"; | |
17224 | goto get_vma_if_bpabi; | |
17225 | case DT_SYMTAB: | |
17226 | name = ".dynsym"; | |
17227 | goto get_vma_if_bpabi; | |
c0042f5d MM |
17228 | case DT_VERSYM: |
17229 | name = ".gnu.version"; | |
17230 | goto get_vma_if_bpabi; | |
17231 | case DT_VERDEF: | |
17232 | name = ".gnu.version_d"; | |
17233 | goto get_vma_if_bpabi; | |
17234 | case DT_VERNEED: | |
17235 | name = ".gnu.version_r"; | |
17236 | goto get_vma_if_bpabi; | |
17237 | ||
252b5132 | 17238 | case DT_PLTGOT: |
4ade44b7 | 17239 | name = htab->symbian_p ? ".got" : ".got.plt"; |
252b5132 RH |
17240 | goto get_vma; |
17241 | case DT_JMPREL: | |
00a97672 | 17242 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 | 17243 | get_vma: |
4ade44b7 | 17244 | s = bfd_get_linker_section (dynobj, name); |
05456594 NC |
17245 | if (s == NULL) |
17246 | { | |
4eca0228 | 17247 | _bfd_error_handler |
4ade44b7 | 17248 | (_("could not find section %s"), name); |
05456594 NC |
17249 | bfd_set_error (bfd_error_invalid_operation); |
17250 | return FALSE; | |
17251 | } | |
229fcec5 | 17252 | if (!htab->symbian_p) |
4ade44b7 | 17253 | dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; |
229fcec5 MM |
17254 | else |
17255 | /* In the BPABI, tags in the PT_DYNAMIC section point | |
17256 | at the file offset, not the memory address, for the | |
17257 | convenience of the post linker. */ | |
4ade44b7 | 17258 | dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset; |
252b5132 RH |
17259 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17260 | break; | |
17261 | ||
229fcec5 MM |
17262 | get_vma_if_bpabi: |
17263 | if (htab->symbian_p) | |
17264 | goto get_vma; | |
17265 | break; | |
17266 | ||
252b5132 | 17267 | case DT_PLTRELSZ: |
362d30a1 | 17268 | s = htab->root.srelplt; |
252b5132 | 17269 | BFD_ASSERT (s != NULL); |
eea6121a | 17270 | dyn.d_un.d_val = s->size; |
252b5132 RH |
17271 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17272 | break; | |
906e58ca | 17273 | |
252b5132 | 17274 | case DT_RELSZ: |
00a97672 | 17275 | case DT_RELASZ: |
229fcec5 MM |
17276 | case DT_REL: |
17277 | case DT_RELA: | |
229fcec5 MM |
17278 | /* In the BPABI, the DT_REL tag must point at the file |
17279 | offset, not the VMA, of the first relocation | |
17280 | section. So, we use code similar to that in | |
17281 | elflink.c, but do not check for SHF_ALLOC on the | |
64f52338 AM |
17282 | relocation section, since relocation sections are |
17283 | never allocated under the BPABI. PLT relocs are also | |
17284 | included. */ | |
229fcec5 MM |
17285 | if (htab->symbian_p) |
17286 | { | |
17287 | unsigned int i; | |
17288 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) | |
17289 | ? SHT_REL : SHT_RELA); | |
17290 | dyn.d_un.d_val = 0; | |
17291 | for (i = 1; i < elf_numsections (output_bfd); i++) | |
17292 | { | |
906e58ca | 17293 | Elf_Internal_Shdr *hdr |
229fcec5 MM |
17294 | = elf_elfsections (output_bfd)[i]; |
17295 | if (hdr->sh_type == type) | |
17296 | { | |
906e58ca | 17297 | if (dyn.d_tag == DT_RELSZ |
229fcec5 MM |
17298 | || dyn.d_tag == DT_RELASZ) |
17299 | dyn.d_un.d_val += hdr->sh_size; | |
de52dba4 AM |
17300 | else if ((ufile_ptr) hdr->sh_offset |
17301 | <= dyn.d_un.d_val - 1) | |
229fcec5 MM |
17302 | dyn.d_un.d_val = hdr->sh_offset; |
17303 | } | |
17304 | } | |
17305 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
17306 | } | |
252b5132 | 17307 | break; |
88f7bcd5 | 17308 | |
0855e32b | 17309 | case DT_TLSDESC_PLT: |
99059e56 | 17310 | s = htab->root.splt; |
0855e32b NS |
17311 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
17312 | + htab->dt_tlsdesc_plt); | |
17313 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
17314 | break; | |
17315 | ||
17316 | case DT_TLSDESC_GOT: | |
99059e56 | 17317 | s = htab->root.sgot; |
0855e32b | 17318 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
99059e56 | 17319 | + htab->dt_tlsdesc_got); |
0855e32b NS |
17320 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
17321 | break; | |
17322 | ||
88f7bcd5 NC |
17323 | /* Set the bottom bit of DT_INIT/FINI if the |
17324 | corresponding function is Thumb. */ | |
17325 | case DT_INIT: | |
17326 | name = info->init_function; | |
17327 | goto get_sym; | |
17328 | case DT_FINI: | |
17329 | name = info->fini_function; | |
17330 | get_sym: | |
17331 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 17332 | then there is nothing to adjust. */ |
88f7bcd5 NC |
17333 | if (dyn.d_un.d_val != 0) |
17334 | { | |
17335 | struct elf_link_hash_entry * eh; | |
17336 | ||
17337 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
b34976b6 | 17338 | FALSE, FALSE, TRUE); |
39d911fc TP |
17339 | if (eh != NULL |
17340 | && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal) | |
17341 | == ST_BRANCH_TO_THUMB) | |
88f7bcd5 NC |
17342 | { |
17343 | dyn.d_un.d_val |= 1; | |
b34976b6 | 17344 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
17345 | } |
17346 | } | |
17347 | break; | |
252b5132 RH |
17348 | } |
17349 | } | |
17350 | ||
24a1ba0f | 17351 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 17352 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 17353 | { |
00a97672 RS |
17354 | const bfd_vma *plt0_entry; |
17355 | bfd_vma got_address, plt_address, got_displacement; | |
17356 | ||
17357 | /* Calculate the addresses of the GOT and PLT. */ | |
17358 | got_address = sgot->output_section->vma + sgot->output_offset; | |
17359 | plt_address = splt->output_section->vma + splt->output_offset; | |
17360 | ||
17361 | if (htab->vxworks_p) | |
17362 | { | |
17363 | /* The VxWorks GOT is relocated by the dynamic linker. | |
17364 | Therefore, we must emit relocations rather than simply | |
17365 | computing the values now. */ | |
17366 | Elf_Internal_Rela rel; | |
17367 | ||
17368 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
17369 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
17370 | splt->contents + 0); | |
17371 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
17372 | splt->contents + 4); | |
17373 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
17374 | splt->contents + 8); | |
00a97672 RS |
17375 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
17376 | ||
8029a119 | 17377 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
17378 | rel.r_offset = plt_address + 12; |
17379 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
17380 | rel.r_addend = 0; | |
17381 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
17382 | htab->srelplt2->contents); | |
17383 | } | |
b38cadfb | 17384 | else if (htab->nacl_p) |
99059e56 RM |
17385 | arm_nacl_put_plt0 (htab, output_bfd, splt, |
17386 | got_address + 8 - (plt_address + 16)); | |
eed94f8f NC |
17387 | else if (using_thumb_only (htab)) |
17388 | { | |
17389 | got_displacement = got_address - (plt_address + 12); | |
17390 | ||
17391 | plt0_entry = elf32_thumb2_plt0_entry; | |
17392 | put_arm_insn (htab, output_bfd, plt0_entry[0], | |
17393 | splt->contents + 0); | |
17394 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
17395 | splt->contents + 4); | |
17396 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
17397 | splt->contents + 8); | |
17398 | ||
17399 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 12); | |
17400 | } | |
00a97672 RS |
17401 | else |
17402 | { | |
17403 | got_displacement = got_address - (plt_address + 16); | |
17404 | ||
17405 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
17406 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
17407 | splt->contents + 0); | |
17408 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
17409 | splt->contents + 4); | |
17410 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
17411 | splt->contents + 8); | |
17412 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
17413 | splt->contents + 12); | |
5e681ec4 | 17414 | |
5e681ec4 | 17415 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
17416 | /* The displacement value goes in the otherwise-unused |
17417 | last word of the second entry. */ | |
17418 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 17419 | #else |
00a97672 | 17420 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 17421 | #endif |
00a97672 | 17422 | } |
f7a74f8c | 17423 | } |
252b5132 RH |
17424 | |
17425 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
17426 | really seem like the right value. */ | |
74541ad4 AM |
17427 | if (splt->output_section->owner == output_bfd) |
17428 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 | 17429 | |
0855e32b NS |
17430 | if (htab->dt_tlsdesc_plt) |
17431 | { | |
17432 | bfd_vma got_address | |
17433 | = sgot->output_section->vma + sgot->output_offset; | |
17434 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma | |
17435 | + htab->root.sgot->output_offset); | |
17436 | bfd_vma plt_address | |
17437 | = splt->output_section->vma + splt->output_offset; | |
17438 | ||
b38cadfb | 17439 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
17440 | splt->contents + htab->dt_tlsdesc_plt, |
17441 | dl_tlsdesc_lazy_trampoline, 6); | |
17442 | ||
17443 | bfd_put_32 (output_bfd, | |
17444 | gotplt_address + htab->dt_tlsdesc_got | |
17445 | - (plt_address + htab->dt_tlsdesc_plt) | |
17446 | - dl_tlsdesc_lazy_trampoline[6], | |
17447 | splt->contents + htab->dt_tlsdesc_plt + 24); | |
17448 | bfd_put_32 (output_bfd, | |
17449 | got_address - (plt_address + htab->dt_tlsdesc_plt) | |
17450 | - dl_tlsdesc_lazy_trampoline[7], | |
17451 | splt->contents + htab->dt_tlsdesc_plt + 24 + 4); | |
17452 | } | |
17453 | ||
17454 | if (htab->tls_trampoline) | |
17455 | { | |
b38cadfb | 17456 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
17457 | splt->contents + htab->tls_trampoline, |
17458 | tls_trampoline, 3); | |
17459 | #ifdef FOUR_WORD_PLT | |
17460 | bfd_put_32 (output_bfd, 0x00000000, | |
17461 | splt->contents + htab->tls_trampoline + 12); | |
b38cadfb | 17462 | #endif |
0855e32b NS |
17463 | } |
17464 | ||
0e1862bb L |
17465 | if (htab->vxworks_p |
17466 | && !bfd_link_pic (info) | |
17467 | && htab->root.splt->size > 0) | |
00a97672 RS |
17468 | { |
17469 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
17470 | incorrect symbol indexes. */ | |
17471 | int num_plts; | |
eed62c48 | 17472 | unsigned char *p; |
00a97672 | 17473 | |
362d30a1 | 17474 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
00a97672 RS |
17475 | / htab->plt_entry_size); |
17476 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
17477 | ||
17478 | for (; num_plts; num_plts--) | |
17479 | { | |
17480 | Elf_Internal_Rela rel; | |
17481 | ||
17482 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
17483 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
17484 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
17485 | p += RELOC_SIZE (htab); | |
17486 | ||
17487 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
17488 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
17489 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
17490 | p += RELOC_SIZE (htab); | |
17491 | } | |
17492 | } | |
252b5132 RH |
17493 | } |
17494 | ||
99059e56 RM |
17495 | if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0) |
17496 | /* NaCl uses a special first entry in .iplt too. */ | |
17497 | arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0); | |
17498 | ||
252b5132 | 17499 | /* Fill in the first three entries in the global offset table. */ |
229fcec5 | 17500 | if (sgot) |
252b5132 | 17501 | { |
229fcec5 MM |
17502 | if (sgot->size > 0) |
17503 | { | |
17504 | if (sdyn == NULL) | |
17505 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
17506 | else | |
17507 | bfd_put_32 (output_bfd, | |
17508 | sdyn->output_section->vma + sdyn->output_offset, | |
17509 | sgot->contents); | |
17510 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
17511 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
17512 | } | |
252b5132 | 17513 | |
229fcec5 MM |
17514 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
17515 | } | |
252b5132 | 17516 | |
e8b09b87 CL |
17517 | /* At the very end of the .rofixup section is a pointer to the GOT. */ |
17518 | if (htab->fdpic_p && htab->srofixup != NULL) | |
17519 | { | |
17520 | struct elf_link_hash_entry *hgot = htab->root.hgot; | |
17521 | ||
17522 | bfd_vma got_value = hgot->root.u.def.value | |
17523 | + hgot->root.u.def.section->output_section->vma | |
17524 | + hgot->root.u.def.section->output_offset; | |
17525 | ||
17526 | arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value); | |
17527 | ||
17528 | /* Make sure we allocated and generated the same number of fixups. */ | |
17529 | BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size); | |
17530 | } | |
17531 | ||
b34976b6 | 17532 | return TRUE; |
252b5132 RH |
17533 | } |
17534 | ||
ba96a88f | 17535 | static void |
57e8b36a | 17536 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
ba96a88f | 17537 | { |
9b485d32 | 17538 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 17539 | struct elf32_arm_link_hash_table *globals; |
ac4c9b04 | 17540 | struct elf_segment_map *m; |
ba96a88f NC |
17541 | |
17542 | i_ehdrp = elf_elfheader (abfd); | |
17543 | ||
94a3258f PB |
17544 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
17545 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
17546 | else | |
7394f108 | 17547 | _bfd_elf_post_process_headers (abfd, link_info); |
ba96a88f | 17548 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 17549 | |
93204d3a PB |
17550 | if (link_info) |
17551 | { | |
17552 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 17553 | if (globals != NULL && globals->byteswap_code) |
93204d3a | 17554 | i_ehdrp->e_flags |= EF_ARM_BE8; |
18a20338 CL |
17555 | |
17556 | if (globals->fdpic_p) | |
17557 | i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC; | |
93204d3a | 17558 | } |
3bfcb652 NC |
17559 | |
17560 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5 | |
17561 | && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) | |
17562 | { | |
17563 | int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); | |
5c294fee | 17564 | if (abi == AEABI_VFP_args_vfp) |
3bfcb652 NC |
17565 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; |
17566 | else | |
17567 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; | |
17568 | } | |
ac4c9b04 MG |
17569 | |
17570 | /* Scan segment to set p_flags attribute if it contains only sections with | |
f0728ee3 | 17571 | SHF_ARM_PURECODE flag. */ |
ac4c9b04 MG |
17572 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
17573 | { | |
17574 | unsigned int j; | |
17575 | ||
17576 | if (m->count == 0) | |
17577 | continue; | |
17578 | for (j = 0; j < m->count; j++) | |
17579 | { | |
f0728ee3 | 17580 | if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE)) |
ac4c9b04 MG |
17581 | break; |
17582 | } | |
17583 | if (j == m->count) | |
17584 | { | |
17585 | m->p_flags = PF_X; | |
17586 | m->p_flags_valid = 1; | |
17587 | } | |
17588 | } | |
ba96a88f NC |
17589 | } |
17590 | ||
99e4ae17 | 17591 | static enum elf_reloc_type_class |
7e612e98 AM |
17592 | elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
17593 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
17594 | const Elf_Internal_Rela *rela) | |
99e4ae17 | 17595 | { |
f51e552e | 17596 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
17597 | { |
17598 | case R_ARM_RELATIVE: | |
17599 | return reloc_class_relative; | |
17600 | case R_ARM_JUMP_SLOT: | |
17601 | return reloc_class_plt; | |
17602 | case R_ARM_COPY: | |
17603 | return reloc_class_copy; | |
109575d7 JW |
17604 | case R_ARM_IRELATIVE: |
17605 | return reloc_class_ifunc; | |
99e4ae17 AJ |
17606 | default: |
17607 | return reloc_class_normal; | |
17608 | } | |
17609 | } | |
17610 | ||
e489d0ae | 17611 | static void |
57e8b36a | 17612 | elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) |
e16bb312 | 17613 | { |
5a6c6817 | 17614 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
17615 | } |
17616 | ||
40a18ebd NC |
17617 | /* Return TRUE if this is an unwinding table entry. */ |
17618 | ||
17619 | static bfd_boolean | |
17620 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) | |
17621 | { | |
0112cd26 NC |
17622 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
17623 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
17624 | } |
17625 | ||
17626 | ||
17627 | /* Set the type and flags for an ARM section. We do this by | |
17628 | the section name, which is a hack, but ought to work. */ | |
17629 | ||
17630 | static bfd_boolean | |
17631 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) | |
17632 | { | |
17633 | const char * name; | |
17634 | ||
17635 | name = bfd_get_section_name (abfd, sec); | |
17636 | ||
17637 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
17638 | { | |
17639 | hdr->sh_type = SHT_ARM_EXIDX; | |
17640 | hdr->sh_flags |= SHF_LINK_ORDER; | |
17641 | } | |
ac4c9b04 | 17642 | |
f0728ee3 AV |
17643 | if (sec->flags & SEC_ELF_PURECODE) |
17644 | hdr->sh_flags |= SHF_ARM_PURECODE; | |
ac4c9b04 | 17645 | |
40a18ebd NC |
17646 | return TRUE; |
17647 | } | |
17648 | ||
6dc132d9 L |
17649 | /* Handle an ARM specific section when reading an object file. This is |
17650 | called when bfd_section_from_shdr finds a section with an unknown | |
17651 | type. */ | |
40a18ebd NC |
17652 | |
17653 | static bfd_boolean | |
17654 | elf32_arm_section_from_shdr (bfd *abfd, | |
17655 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
17656 | const char *name, |
17657 | int shindex) | |
40a18ebd NC |
17658 | { |
17659 | /* There ought to be a place to keep ELF backend specific flags, but | |
17660 | at the moment there isn't one. We just keep track of the | |
17661 | sections by their name, instead. Fortunately, the ABI gives | |
17662 | names for all the ARM specific sections, so we will probably get | |
17663 | away with this. */ | |
17664 | switch (hdr->sh_type) | |
17665 | { | |
17666 | case SHT_ARM_EXIDX: | |
0951f019 RE |
17667 | case SHT_ARM_PREEMPTMAP: |
17668 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
17669 | break; |
17670 | ||
17671 | default: | |
17672 | return FALSE; | |
17673 | } | |
17674 | ||
6dc132d9 | 17675 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
40a18ebd NC |
17676 | return FALSE; |
17677 | ||
17678 | return TRUE; | |
17679 | } | |
e489d0ae | 17680 | |
44444f50 NC |
17681 | static _arm_elf_section_data * |
17682 | get_arm_elf_section_data (asection * sec) | |
17683 | { | |
47b2e99c JZ |
17684 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
17685 | return elf32_arm_section_data (sec); | |
44444f50 NC |
17686 | else |
17687 | return NULL; | |
8e3de13a NC |
17688 | } |
17689 | ||
4e617b1e PB |
17690 | typedef struct |
17691 | { | |
57402f1e | 17692 | void *flaginfo; |
4e617b1e | 17693 | struct bfd_link_info *info; |
91a5743d PB |
17694 | asection *sec; |
17695 | int sec_shndx; | |
6e0b88f1 AM |
17696 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
17697 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
17698 | } output_arch_syminfo; |
17699 | ||
17700 | enum map_symbol_type | |
17701 | { | |
17702 | ARM_MAP_ARM, | |
17703 | ARM_MAP_THUMB, | |
17704 | ARM_MAP_DATA | |
17705 | }; | |
17706 | ||
17707 | ||
7413f23f | 17708 | /* Output a single mapping symbol. */ |
4e617b1e PB |
17709 | |
17710 | static bfd_boolean | |
7413f23f DJ |
17711 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
17712 | enum map_symbol_type type, | |
17713 | bfd_vma offset) | |
4e617b1e PB |
17714 | { |
17715 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
17716 | Elf_Internal_Sym sym; |
17717 | ||
91a5743d PB |
17718 | sym.st_value = osi->sec->output_section->vma |
17719 | + osi->sec->output_offset | |
17720 | + offset; | |
4e617b1e PB |
17721 | sym.st_size = 0; |
17722 | sym.st_other = 0; | |
17723 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 17724 | sym.st_shndx = osi->sec_shndx; |
35fc36a8 | 17725 | sym.st_target_internal = 0; |
fe33d2fa | 17726 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
57402f1e | 17727 | return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
17728 | } |
17729 | ||
34e77a92 RS |
17730 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
17731 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ | |
4e617b1e PB |
17732 | |
17733 | static bfd_boolean | |
34e77a92 RS |
17734 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
17735 | bfd_boolean is_iplt_entry_p, | |
17736 | union gotplt_union *root_plt, | |
17737 | struct arm_plt_info *arm_plt) | |
4e617b1e | 17738 | { |
4e617b1e | 17739 | struct elf32_arm_link_hash_table *htab; |
34e77a92 | 17740 | bfd_vma addr, plt_header_size; |
4e617b1e | 17741 | |
34e77a92 | 17742 | if (root_plt->offset == (bfd_vma) -1) |
4e617b1e PB |
17743 | return TRUE; |
17744 | ||
4dfe6ac6 NC |
17745 | htab = elf32_arm_hash_table (osi->info); |
17746 | if (htab == NULL) | |
17747 | return FALSE; | |
17748 | ||
34e77a92 RS |
17749 | if (is_iplt_entry_p) |
17750 | { | |
17751 | osi->sec = htab->root.iplt; | |
17752 | plt_header_size = 0; | |
17753 | } | |
17754 | else | |
17755 | { | |
17756 | osi->sec = htab->root.splt; | |
17757 | plt_header_size = htab->plt_header_size; | |
17758 | } | |
17759 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section | |
17760 | (osi->info->output_bfd, osi->sec->output_section)); | |
17761 | ||
17762 | addr = root_plt->offset & -2; | |
4e617b1e PB |
17763 | if (htab->symbian_p) |
17764 | { | |
7413f23f | 17765 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 17766 | return FALSE; |
7413f23f | 17767 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
4e617b1e PB |
17768 | return FALSE; |
17769 | } | |
17770 | else if (htab->vxworks_p) | |
17771 | { | |
7413f23f | 17772 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 17773 | return FALSE; |
7413f23f | 17774 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
4e617b1e | 17775 | return FALSE; |
7413f23f | 17776 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
4e617b1e | 17777 | return FALSE; |
7413f23f | 17778 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
4e617b1e PB |
17779 | return FALSE; |
17780 | } | |
b38cadfb NC |
17781 | else if (htab->nacl_p) |
17782 | { | |
17783 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) | |
17784 | return FALSE; | |
17785 | } | |
7801f98f CL |
17786 | else if (htab->fdpic_p) |
17787 | { | |
59029f57 CL |
17788 | enum map_symbol_type type = using_thumb_only(htab) |
17789 | ? ARM_MAP_THUMB | |
17790 | : ARM_MAP_ARM; | |
17791 | ||
7801f98f CL |
17792 | if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt)) |
17793 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) | |
17794 | return FALSE; | |
59029f57 | 17795 | if (!elf32_arm_output_map_sym (osi, type, addr)) |
7801f98f CL |
17796 | return FALSE; |
17797 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16)) | |
17798 | return FALSE; | |
17799 | if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry)) | |
59029f57 | 17800 | if (!elf32_arm_output_map_sym (osi, type, addr + 24)) |
7801f98f CL |
17801 | return FALSE; |
17802 | } | |
eed94f8f NC |
17803 | else if (using_thumb_only (htab)) |
17804 | { | |
17805 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr)) | |
17806 | return FALSE; | |
6a631e86 | 17807 | } |
4e617b1e PB |
17808 | else |
17809 | { | |
34e77a92 | 17810 | bfd_boolean thumb_stub_p; |
bd97cb95 | 17811 | |
34e77a92 RS |
17812 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
17813 | if (thumb_stub_p) | |
4e617b1e | 17814 | { |
7413f23f | 17815 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
4e617b1e PB |
17816 | return FALSE; |
17817 | } | |
17818 | #ifdef FOUR_WORD_PLT | |
7413f23f | 17819 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 17820 | return FALSE; |
7413f23f | 17821 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
4e617b1e PB |
17822 | return FALSE; |
17823 | #else | |
906e58ca | 17824 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
17825 | so only need to output a mapping symbol for the first PLT entry and |
17826 | entries with thumb thunks. */ | |
34e77a92 | 17827 | if (thumb_stub_p || addr == plt_header_size) |
4e617b1e | 17828 | { |
7413f23f | 17829 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e PB |
17830 | return FALSE; |
17831 | } | |
17832 | #endif | |
17833 | } | |
17834 | ||
17835 | return TRUE; | |
17836 | } | |
17837 | ||
34e77a92 RS |
17838 | /* Output mapping symbols for PLT entries associated with H. */ |
17839 | ||
17840 | static bfd_boolean | |
17841 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) | |
17842 | { | |
17843 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
17844 | struct elf32_arm_link_hash_entry *eh; | |
17845 | ||
17846 | if (h->root.type == bfd_link_hash_indirect) | |
17847 | return TRUE; | |
17848 | ||
17849 | if (h->root.type == bfd_link_hash_warning) | |
17850 | /* When warning symbols are created, they **replace** the "real" | |
17851 | entry in the hash table, thus we never get to see the real | |
17852 | symbol in a hash traversal. So look at it now. */ | |
17853 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
17854 | ||
17855 | eh = (struct elf32_arm_link_hash_entry *) h; | |
17856 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), | |
17857 | &h->plt, &eh->plt); | |
17858 | } | |
17859 | ||
4f4faa4d TP |
17860 | /* Bind a veneered symbol to its veneer identified by its hash entry |
17861 | STUB_ENTRY. The veneered location thus loose its symbol. */ | |
17862 | ||
17863 | static void | |
17864 | arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry) | |
17865 | { | |
17866 | struct elf32_arm_link_hash_entry *hash = stub_entry->h; | |
17867 | ||
17868 | BFD_ASSERT (hash); | |
17869 | hash->root.root.u.def.section = stub_entry->stub_sec; | |
17870 | hash->root.root.u.def.value = stub_entry->stub_offset; | |
17871 | hash->root.size = stub_entry->stub_size; | |
17872 | } | |
17873 | ||
7413f23f DJ |
17874 | /* Output a single local symbol for a generated stub. */ |
17875 | ||
17876 | static bfd_boolean | |
17877 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, | |
17878 | bfd_vma offset, bfd_vma size) | |
17879 | { | |
7413f23f DJ |
17880 | Elf_Internal_Sym sym; |
17881 | ||
7413f23f DJ |
17882 | sym.st_value = osi->sec->output_section->vma |
17883 | + osi->sec->output_offset | |
17884 | + offset; | |
17885 | sym.st_size = size; | |
17886 | sym.st_other = 0; | |
17887 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
17888 | sym.st_shndx = osi->sec_shndx; | |
35fc36a8 | 17889 | sym.st_target_internal = 0; |
57402f1e | 17890 | return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 17891 | } |
4e617b1e | 17892 | |
da5938a2 | 17893 | static bfd_boolean |
8029a119 NC |
17894 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
17895 | void * in_arg) | |
da5938a2 NC |
17896 | { |
17897 | struct elf32_arm_stub_hash_entry *stub_entry; | |
da5938a2 NC |
17898 | asection *stub_sec; |
17899 | bfd_vma addr; | |
7413f23f | 17900 | char *stub_name; |
9a008db3 | 17901 | output_arch_syminfo *osi; |
d3ce72d0 | 17902 | const insn_sequence *template_sequence; |
461a49ca DJ |
17903 | enum stub_insn_type prev_type; |
17904 | int size; | |
17905 | int i; | |
17906 | enum map_symbol_type sym_type; | |
da5938a2 NC |
17907 | |
17908 | /* Massage our args to the form they really have. */ | |
17909 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 17910 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 17911 | |
da5938a2 NC |
17912 | stub_sec = stub_entry->stub_sec; |
17913 | ||
17914 | /* Ensure this stub is attached to the current section being | |
7413f23f | 17915 | processed. */ |
da5938a2 NC |
17916 | if (stub_sec != osi->sec) |
17917 | return TRUE; | |
17918 | ||
7413f23f | 17919 | addr = (bfd_vma) stub_entry->stub_offset; |
d3ce72d0 | 17920 | template_sequence = stub_entry->stub_template; |
4f4faa4d TP |
17921 | |
17922 | if (arm_stub_sym_claimed (stub_entry->stub_type)) | |
17923 | arm_stub_claim_sym (stub_entry); | |
17924 | else | |
7413f23f | 17925 | { |
4f4faa4d TP |
17926 | stub_name = stub_entry->output_name; |
17927 | switch (template_sequence[0].type) | |
17928 | { | |
17929 | case ARM_TYPE: | |
17930 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, | |
17931 | stub_entry->stub_size)) | |
17932 | return FALSE; | |
17933 | break; | |
17934 | case THUMB16_TYPE: | |
17935 | case THUMB32_TYPE: | |
17936 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, | |
17937 | stub_entry->stub_size)) | |
17938 | return FALSE; | |
17939 | break; | |
17940 | default: | |
17941 | BFD_FAIL (); | |
17942 | return 0; | |
17943 | } | |
7413f23f | 17944 | } |
da5938a2 | 17945 | |
461a49ca DJ |
17946 | prev_type = DATA_TYPE; |
17947 | size = 0; | |
17948 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
17949 | { | |
d3ce72d0 | 17950 | switch (template_sequence[i].type) |
461a49ca DJ |
17951 | { |
17952 | case ARM_TYPE: | |
17953 | sym_type = ARM_MAP_ARM; | |
17954 | break; | |
17955 | ||
17956 | case THUMB16_TYPE: | |
48229727 | 17957 | case THUMB32_TYPE: |
461a49ca DJ |
17958 | sym_type = ARM_MAP_THUMB; |
17959 | break; | |
17960 | ||
17961 | case DATA_TYPE: | |
17962 | sym_type = ARM_MAP_DATA; | |
17963 | break; | |
17964 | ||
17965 | default: | |
17966 | BFD_FAIL (); | |
4e31c731 | 17967 | return FALSE; |
461a49ca DJ |
17968 | } |
17969 | ||
d3ce72d0 | 17970 | if (template_sequence[i].type != prev_type) |
461a49ca | 17971 | { |
d3ce72d0 | 17972 | prev_type = template_sequence[i].type; |
461a49ca DJ |
17973 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
17974 | return FALSE; | |
17975 | } | |
17976 | ||
d3ce72d0 | 17977 | switch (template_sequence[i].type) |
461a49ca DJ |
17978 | { |
17979 | case ARM_TYPE: | |
48229727 | 17980 | case THUMB32_TYPE: |
461a49ca DJ |
17981 | size += 4; |
17982 | break; | |
17983 | ||
17984 | case THUMB16_TYPE: | |
17985 | size += 2; | |
17986 | break; | |
17987 | ||
17988 | case DATA_TYPE: | |
17989 | size += 4; | |
17990 | break; | |
17991 | ||
17992 | default: | |
17993 | BFD_FAIL (); | |
4e31c731 | 17994 | return FALSE; |
461a49ca DJ |
17995 | } |
17996 | } | |
17997 | ||
da5938a2 NC |
17998 | return TRUE; |
17999 | } | |
18000 | ||
33811162 DG |
18001 | /* Output mapping symbols for linker generated sections, |
18002 | and for those data-only sections that do not have a | |
18003 | $d. */ | |
4e617b1e PB |
18004 | |
18005 | static bfd_boolean | |
18006 | elf32_arm_output_arch_local_syms (bfd *output_bfd, | |
906e58ca | 18007 | struct bfd_link_info *info, |
57402f1e | 18008 | void *flaginfo, |
6e0b88f1 AM |
18009 | int (*func) (void *, const char *, |
18010 | Elf_Internal_Sym *, | |
18011 | asection *, | |
18012 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
18013 | { |
18014 | output_arch_syminfo osi; | |
18015 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
18016 | bfd_vma offset; |
18017 | bfd_size_type size; | |
33811162 | 18018 | bfd *input_bfd; |
4e617b1e PB |
18019 | |
18020 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
18021 | if (htab == NULL) |
18022 | return FALSE; | |
18023 | ||
906e58ca | 18024 | check_use_blx (htab); |
91a5743d | 18025 | |
57402f1e | 18026 | osi.flaginfo = flaginfo; |
4e617b1e PB |
18027 | osi.info = info; |
18028 | osi.func = func; | |
906e58ca | 18029 | |
33811162 DG |
18030 | /* Add a $d mapping symbol to data-only sections that |
18031 | don't have any mapping symbol. This may result in (harmless) redundant | |
18032 | mapping symbols. */ | |
18033 | for (input_bfd = info->input_bfds; | |
18034 | input_bfd != NULL; | |
c72f2fb2 | 18035 | input_bfd = input_bfd->link.next) |
33811162 DG |
18036 | { |
18037 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
18038 | for (osi.sec = input_bfd->sections; | |
18039 | osi.sec != NULL; | |
18040 | osi.sec = osi.sec->next) | |
18041 | { | |
18042 | if (osi.sec->output_section != NULL | |
f7dd8c79 DJ |
18043 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
18044 | != 0) | |
33811162 DG |
18045 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
18046 | == SEC_HAS_CONTENTS | |
18047 | && get_arm_elf_section_data (osi.sec) != NULL | |
501abfe0 | 18048 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
7d500b83 CL |
18049 | && osi.sec->size > 0 |
18050 | && (osi.sec->flags & SEC_EXCLUDE) == 0) | |
33811162 DG |
18051 | { |
18052 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18053 | (output_bfd, osi.sec->output_section); | |
18054 | if (osi.sec_shndx != (int)SHN_BAD) | |
18055 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
18056 | } | |
18057 | } | |
18058 | } | |
18059 | ||
91a5743d PB |
18060 | /* ARM->Thumb glue. */ |
18061 | if (htab->arm_glue_size > 0) | |
18062 | { | |
3d4d4302 AM |
18063 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
18064 | ARM2THUMB_GLUE_SECTION_NAME); | |
91a5743d PB |
18065 | |
18066 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18067 | (output_bfd, osi.sec->output_section); | |
0e1862bb | 18068 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable |
91a5743d PB |
18069 | || htab->pic_veneer) |
18070 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
18071 | else if (htab->use_blx) | |
18072 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
18073 | else | |
18074 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 18075 | |
91a5743d PB |
18076 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
18077 | { | |
7413f23f DJ |
18078 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
18079 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
18080 | } |
18081 | } | |
18082 | ||
18083 | /* Thumb->ARM glue. */ | |
18084 | if (htab->thumb_glue_size > 0) | |
18085 | { | |
3d4d4302 AM |
18086 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
18087 | THUMB2ARM_GLUE_SECTION_NAME); | |
91a5743d PB |
18088 | |
18089 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18090 | (output_bfd, osi.sec->output_section); | |
18091 | size = THUMB2ARM_GLUE_SIZE; | |
18092 | ||
18093 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
18094 | { | |
7413f23f DJ |
18095 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
18096 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
18097 | } |
18098 | } | |
18099 | ||
845b51d6 PB |
18100 | /* ARMv4 BX veneers. */ |
18101 | if (htab->bx_glue_size > 0) | |
18102 | { | |
3d4d4302 AM |
18103 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
18104 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
18105 | |
18106 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
18107 | (output_bfd, osi.sec->output_section); | |
18108 | ||
7413f23f | 18109 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
18110 | } |
18111 | ||
8029a119 NC |
18112 | /* Long calls stubs. */ |
18113 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
18114 | { | |
da5938a2 | 18115 | asection* stub_sec; |
8029a119 | 18116 | |
da5938a2 NC |
18117 | for (stub_sec = htab->stub_bfd->sections; |
18118 | stub_sec != NULL; | |
8029a119 NC |
18119 | stub_sec = stub_sec->next) |
18120 | { | |
18121 | /* Ignore non-stub sections. */ | |
18122 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
18123 | continue; | |
da5938a2 | 18124 | |
8029a119 | 18125 | osi.sec = stub_sec; |
da5938a2 | 18126 | |
8029a119 NC |
18127 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
18128 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 18129 | |
8029a119 NC |
18130 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
18131 | } | |
18132 | } | |
da5938a2 | 18133 | |
91a5743d | 18134 | /* Finally, output mapping symbols for the PLT. */ |
34e77a92 | 18135 | if (htab->root.splt && htab->root.splt->size > 0) |
4e617b1e | 18136 | { |
34e77a92 RS |
18137 | osi.sec = htab->root.splt; |
18138 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
18139 | (output_bfd, osi.sec->output_section)); | |
18140 | ||
18141 | /* Output mapping symbols for the plt header. SymbianOS does not have a | |
18142 | plt header. */ | |
18143 | if (htab->vxworks_p) | |
18144 | { | |
18145 | /* VxWorks shared libraries have no PLT header. */ | |
0e1862bb | 18146 | if (!bfd_link_pic (info)) |
34e77a92 RS |
18147 | { |
18148 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
18149 | return FALSE; | |
18150 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
18151 | return FALSE; | |
18152 | } | |
18153 | } | |
b38cadfb NC |
18154 | else if (htab->nacl_p) |
18155 | { | |
18156 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
18157 | return FALSE; | |
18158 | } | |
59029f57 | 18159 | else if (using_thumb_only (htab) && !htab->fdpic_p) |
eed94f8f NC |
18160 | { |
18161 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0)) | |
18162 | return FALSE; | |
18163 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
18164 | return FALSE; | |
18165 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16)) | |
18166 | return FALSE; | |
18167 | } | |
e8b09b87 | 18168 | else if (!htab->symbian_p && !htab->fdpic_p) |
4e617b1e | 18169 | { |
7413f23f | 18170 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e | 18171 | return FALSE; |
34e77a92 RS |
18172 | #ifndef FOUR_WORD_PLT |
18173 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) | |
4e617b1e | 18174 | return FALSE; |
34e77a92 | 18175 | #endif |
4e617b1e PB |
18176 | } |
18177 | } | |
99059e56 RM |
18178 | if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0) |
18179 | { | |
18180 | /* NaCl uses a special first entry in .iplt too. */ | |
18181 | osi.sec = htab->root.iplt; | |
18182 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
18183 | (output_bfd, osi.sec->output_section)); | |
18184 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
18185 | return FALSE; | |
18186 | } | |
34e77a92 RS |
18187 | if ((htab->root.splt && htab->root.splt->size > 0) |
18188 | || (htab->root.iplt && htab->root.iplt->size > 0)) | |
4e617b1e | 18189 | { |
34e77a92 RS |
18190 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
18191 | for (input_bfd = info->input_bfds; | |
18192 | input_bfd != NULL; | |
c72f2fb2 | 18193 | input_bfd = input_bfd->link.next) |
34e77a92 RS |
18194 | { |
18195 | struct arm_local_iplt_info **local_iplt; | |
18196 | unsigned int i, num_syms; | |
4e617b1e | 18197 | |
34e77a92 RS |
18198 | local_iplt = elf32_arm_local_iplt (input_bfd); |
18199 | if (local_iplt != NULL) | |
18200 | { | |
18201 | num_syms = elf_symtab_hdr (input_bfd).sh_info; | |
18202 | for (i = 0; i < num_syms; i++) | |
18203 | if (local_iplt[i] != NULL | |
18204 | && !elf32_arm_output_plt_map_1 (&osi, TRUE, | |
18205 | &local_iplt[i]->root, | |
18206 | &local_iplt[i]->arm)) | |
18207 | return FALSE; | |
18208 | } | |
18209 | } | |
18210 | } | |
0855e32b NS |
18211 | if (htab->dt_tlsdesc_plt != 0) |
18212 | { | |
18213 | /* Mapping symbols for the lazy tls trampoline. */ | |
18214 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt)) | |
18215 | return FALSE; | |
b38cadfb | 18216 | |
0855e32b NS |
18217 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
18218 | htab->dt_tlsdesc_plt + 24)) | |
18219 | return FALSE; | |
18220 | } | |
18221 | if (htab->tls_trampoline != 0) | |
18222 | { | |
18223 | /* Mapping symbols for the tls trampoline. */ | |
18224 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) | |
18225 | return FALSE; | |
18226 | #ifdef FOUR_WORD_PLT | |
18227 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
18228 | htab->tls_trampoline + 12)) | |
18229 | return FALSE; | |
b38cadfb | 18230 | #endif |
0855e32b | 18231 | } |
b38cadfb | 18232 | |
4e617b1e PB |
18233 | return TRUE; |
18234 | } | |
18235 | ||
54ddd295 TP |
18236 | /* Filter normal symbols of CMSE entry functions of ABFD to include in |
18237 | the import library. All SYMCOUNT symbols of ABFD can be examined | |
18238 | from their pointers in SYMS. Pointers of symbols to keep should be | |
18239 | stored continuously at the beginning of that array. | |
18240 | ||
18241 | Returns the number of symbols to keep. */ | |
18242 | ||
18243 | static unsigned int | |
18244 | elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED, | |
18245 | struct bfd_link_info *info, | |
18246 | asymbol **syms, long symcount) | |
18247 | { | |
18248 | size_t maxnamelen; | |
18249 | char *cmse_name; | |
18250 | long src_count, dst_count = 0; | |
18251 | struct elf32_arm_link_hash_table *htab; | |
18252 | ||
18253 | htab = elf32_arm_hash_table (info); | |
18254 | if (!htab->stub_bfd || !htab->stub_bfd->sections) | |
18255 | symcount = 0; | |
18256 | ||
18257 | maxnamelen = 128; | |
18258 | cmse_name = (char *) bfd_malloc (maxnamelen); | |
18259 | for (src_count = 0; src_count < symcount; src_count++) | |
18260 | { | |
18261 | struct elf32_arm_link_hash_entry *cmse_hash; | |
18262 | asymbol *sym; | |
18263 | flagword flags; | |
18264 | char *name; | |
18265 | size_t namelen; | |
18266 | ||
18267 | sym = syms[src_count]; | |
18268 | flags = sym->flags; | |
18269 | name = (char *) bfd_asymbol_name (sym); | |
18270 | ||
18271 | if ((flags & BSF_FUNCTION) != BSF_FUNCTION) | |
18272 | continue; | |
18273 | if (!(flags & (BSF_GLOBAL | BSF_WEAK))) | |
18274 | continue; | |
18275 | ||
18276 | namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1; | |
18277 | if (namelen > maxnamelen) | |
18278 | { | |
18279 | cmse_name = (char *) | |
18280 | bfd_realloc (cmse_name, namelen); | |
18281 | maxnamelen = namelen; | |
18282 | } | |
18283 | snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name); | |
18284 | cmse_hash = (struct elf32_arm_link_hash_entry *) | |
18285 | elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE); | |
18286 | ||
18287 | if (!cmse_hash | |
18288 | || (cmse_hash->root.root.type != bfd_link_hash_defined | |
18289 | && cmse_hash->root.root.type != bfd_link_hash_defweak) | |
18290 | || cmse_hash->root.type != STT_FUNC) | |
18291 | continue; | |
18292 | ||
18293 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) | |
18294 | continue; | |
18295 | ||
18296 | syms[dst_count++] = sym; | |
18297 | } | |
18298 | free (cmse_name); | |
18299 | ||
18300 | syms[dst_count] = NULL; | |
18301 | ||
18302 | return dst_count; | |
18303 | } | |
18304 | ||
18305 | /* Filter symbols of ABFD to include in the import library. All | |
18306 | SYMCOUNT symbols of ABFD can be examined from their pointers in | |
18307 | SYMS. Pointers of symbols to keep should be stored continuously at | |
18308 | the beginning of that array. | |
18309 | ||
18310 | Returns the number of symbols to keep. */ | |
18311 | ||
18312 | static unsigned int | |
18313 | elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED, | |
18314 | struct bfd_link_info *info, | |
18315 | asymbol **syms, long symcount) | |
18316 | { | |
18317 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
18318 | ||
046734ff TP |
18319 | /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on |
18320 | Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import | |
18321 | library to be a relocatable object file. */ | |
18322 | BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P)); | |
54ddd295 TP |
18323 | if (globals->cmse_implib) |
18324 | return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount); | |
18325 | else | |
18326 | return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount); | |
18327 | } | |
18328 | ||
e489d0ae PB |
18329 | /* Allocate target specific section data. */ |
18330 | ||
18331 | static bfd_boolean | |
18332 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) | |
18333 | { | |
f592407e AM |
18334 | if (!sec->used_by_bfd) |
18335 | { | |
18336 | _arm_elf_section_data *sdata; | |
18337 | bfd_size_type amt = sizeof (*sdata); | |
e489d0ae | 18338 | |
21d799b5 | 18339 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e AM |
18340 | if (sdata == NULL) |
18341 | return FALSE; | |
18342 | sec->used_by_bfd = sdata; | |
18343 | } | |
e489d0ae PB |
18344 | |
18345 | return _bfd_elf_new_section_hook (abfd, sec); | |
18346 | } | |
18347 | ||
18348 | ||
18349 | /* Used to order a list of mapping symbols by address. */ | |
18350 | ||
18351 | static int | |
18352 | elf32_arm_compare_mapping (const void * a, const void * b) | |
18353 | { | |
7f6a71ff JM |
18354 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
18355 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
18356 | ||
18357 | if (amap->vma > bmap->vma) | |
18358 | return 1; | |
18359 | else if (amap->vma < bmap->vma) | |
18360 | return -1; | |
18361 | else if (amap->type > bmap->type) | |
18362 | /* Ensure results do not depend on the host qsort for objects with | |
18363 | multiple mapping symbols at the same address by sorting on type | |
18364 | after vma. */ | |
18365 | return 1; | |
18366 | else if (amap->type < bmap->type) | |
18367 | return -1; | |
18368 | else | |
18369 | return 0; | |
e489d0ae PB |
18370 | } |
18371 | ||
2468f9c9 PB |
18372 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
18373 | ||
18374 | static unsigned long | |
18375 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
18376 | { | |
18377 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
18378 | } | |
18379 | ||
18380 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
18381 | relocations. */ | |
18382 | ||
18383 | static void | |
18384 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
18385 | { | |
18386 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
18387 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
b38cadfb | 18388 | |
2468f9c9 PB |
18389 | /* High bit of first word is supposed to be zero. */ |
18390 | if ((first_word & 0x80000000ul) == 0) | |
18391 | first_word = offset_prel31 (first_word, offset); | |
b38cadfb | 18392 | |
2468f9c9 PB |
18393 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 |
18394 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
18395 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
18396 | second_word = offset_prel31 (second_word, offset); | |
b38cadfb | 18397 | |
2468f9c9 PB |
18398 | bfd_put_32 (output_bfd, first_word, to); |
18399 | bfd_put_32 (output_bfd, second_word, to + 4); | |
18400 | } | |
e489d0ae | 18401 | |
48229727 JB |
18402 | /* Data for make_branch_to_a8_stub(). */ |
18403 | ||
b38cadfb NC |
18404 | struct a8_branch_to_stub_data |
18405 | { | |
48229727 JB |
18406 | asection *writing_section; |
18407 | bfd_byte *contents; | |
18408 | }; | |
18409 | ||
18410 | ||
18411 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
18412 | places for a particular section. */ | |
18413 | ||
18414 | static bfd_boolean | |
18415 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, | |
99059e56 | 18416 | void *in_arg) |
48229727 JB |
18417 | { |
18418 | struct elf32_arm_stub_hash_entry *stub_entry; | |
18419 | struct a8_branch_to_stub_data *data; | |
18420 | bfd_byte *contents; | |
18421 | unsigned long branch_insn; | |
18422 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
18423 | bfd_signed_vma branch_offset; | |
18424 | bfd *abfd; | |
8d9d9490 | 18425 | unsigned int loc; |
48229727 JB |
18426 | |
18427 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
18428 | data = (struct a8_branch_to_stub_data *) in_arg; | |
18429 | ||
18430 | if (stub_entry->target_section != data->writing_section | |
4563a860 | 18431 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
48229727 JB |
18432 | return TRUE; |
18433 | ||
18434 | contents = data->contents; | |
18435 | ||
8d9d9490 TP |
18436 | /* We use target_section as Cortex-A8 erratum workaround stubs are only |
18437 | generated when both source and target are in the same section. */ | |
48229727 JB |
18438 | veneered_insn_loc = stub_entry->target_section->output_section->vma |
18439 | + stub_entry->target_section->output_offset | |
8d9d9490 | 18440 | + stub_entry->source_value; |
48229727 JB |
18441 | |
18442 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
18443 | + stub_entry->stub_sec->output_offset | |
18444 | + stub_entry->stub_offset; | |
18445 | ||
18446 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
18447 | veneered_insn_loc &= ~3u; | |
18448 | ||
18449 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
18450 | ||
18451 | abfd = stub_entry->target_section->owner; | |
8d9d9490 | 18452 | loc = stub_entry->source_value; |
48229727 JB |
18453 | |
18454 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
18455 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
18456 | This check is just to be on the safe side... */ | |
18457 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
18458 | { | |
871b3ab2 | 18459 | _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is " |
4eca0228 | 18460 | "allocated in unsafe location"), abfd); |
48229727 JB |
18461 | return FALSE; |
18462 | } | |
18463 | ||
18464 | switch (stub_entry->stub_type) | |
18465 | { | |
18466 | case arm_stub_a8_veneer_b: | |
18467 | case arm_stub_a8_veneer_b_cond: | |
18468 | branch_insn = 0xf0009000; | |
18469 | goto jump24; | |
18470 | ||
18471 | case arm_stub_a8_veneer_blx: | |
18472 | branch_insn = 0xf000e800; | |
18473 | goto jump24; | |
18474 | ||
18475 | case arm_stub_a8_veneer_bl: | |
18476 | { | |
18477 | unsigned int i1, j1, i2, j2, s; | |
18478 | ||
18479 | branch_insn = 0xf000d000; | |
18480 | ||
18481 | jump24: | |
18482 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
18483 | { | |
18484 | /* There's not much we can do apart from complain if this | |
18485 | happens. */ | |
871b3ab2 | 18486 | _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out " |
4eca0228 | 18487 | "of range (input file too large)"), abfd); |
48229727 JB |
18488 | return FALSE; |
18489 | } | |
18490 | ||
18491 | /* i1 = not(j1 eor s), so: | |
18492 | not i1 = j1 eor s | |
18493 | j1 = (not i1) eor s. */ | |
18494 | ||
18495 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
18496 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
18497 | i2 = (branch_offset >> 22) & 1; | |
18498 | i1 = (branch_offset >> 23) & 1; | |
18499 | s = (branch_offset >> 24) & 1; | |
18500 | j1 = (!i1) ^ s; | |
18501 | j2 = (!i2) ^ s; | |
18502 | branch_insn |= j2 << 11; | |
18503 | branch_insn |= j1 << 13; | |
18504 | branch_insn |= s << 26; | |
18505 | } | |
18506 | break; | |
18507 | ||
18508 | default: | |
18509 | BFD_FAIL (); | |
18510 | return FALSE; | |
18511 | } | |
18512 | ||
8d9d9490 TP |
18513 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]); |
18514 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]); | |
48229727 JB |
18515 | |
18516 | return TRUE; | |
18517 | } | |
18518 | ||
a504d23a LA |
18519 | /* Beginning of stm32l4xx work-around. */ |
18520 | ||
18521 | /* Functions encoding instructions necessary for the emission of the | |
18522 | fix-stm32l4xx-629360. | |
18523 | Encoding is extracted from the | |
18524 | ARM (C) Architecture Reference Manual | |
18525 | ARMv7-A and ARMv7-R edition | |
18526 | ARM DDI 0406C.b (ID072512). */ | |
18527 | ||
18528 | static inline bfd_vma | |
82188b29 | 18529 | create_instruction_branch_absolute (int branch_offset) |
a504d23a LA |
18530 | { |
18531 | /* A8.8.18 B (A8-334) | |
18532 | B target_address (Encoding T4). */ | |
18533 | /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */ | |
18534 | /* jump offset is: S:I1:I2:imm10:imm11:0. */ | |
18535 | /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */ | |
18536 | ||
a504d23a LA |
18537 | int s = ((branch_offset & 0x1000000) >> 24); |
18538 | int j1 = s ^ !((branch_offset & 0x800000) >> 23); | |
18539 | int j2 = s ^ !((branch_offset & 0x400000) >> 22); | |
18540 | ||
18541 | if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24)) | |
18542 | BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch."); | |
18543 | ||
18544 | bfd_vma patched_inst = 0xf0009000 | |
18545 | | s << 26 /* S. */ | |
18546 | | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */ | |
18547 | | j1 << 13 /* J1. */ | |
18548 | | j2 << 11 /* J2. */ | |
18549 | | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */ | |
18550 | ||
18551 | return patched_inst; | |
18552 | } | |
18553 | ||
18554 | static inline bfd_vma | |
18555 | create_instruction_ldmia (int base_reg, int wback, int reg_mask) | |
18556 | { | |
18557 | /* A8.8.57 LDM/LDMIA/LDMFD (A8-396) | |
18558 | LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */ | |
18559 | bfd_vma patched_inst = 0xe8900000 | |
18560 | | (/*W=*/wback << 21) | |
18561 | | (base_reg << 16) | |
18562 | | (reg_mask & 0x0000ffff); | |
18563 | ||
18564 | return patched_inst; | |
18565 | } | |
18566 | ||
18567 | static inline bfd_vma | |
18568 | create_instruction_ldmdb (int base_reg, int wback, int reg_mask) | |
18569 | { | |
18570 | /* A8.8.60 LDMDB/LDMEA (A8-402) | |
18571 | LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */ | |
18572 | bfd_vma patched_inst = 0xe9100000 | |
18573 | | (/*W=*/wback << 21) | |
18574 | | (base_reg << 16) | |
18575 | | (reg_mask & 0x0000ffff); | |
18576 | ||
18577 | return patched_inst; | |
18578 | } | |
18579 | ||
18580 | static inline bfd_vma | |
18581 | create_instruction_mov (int target_reg, int source_reg) | |
18582 | { | |
18583 | /* A8.8.103 MOV (register) (A8-486) | |
18584 | MOV Rd, Rm (Encoding T1). */ | |
18585 | bfd_vma patched_inst = 0x4600 | |
18586 | | (target_reg & 0x7) | |
18587 | | ((target_reg & 0x8) >> 3) << 7 | |
18588 | | (source_reg << 3); | |
18589 | ||
18590 | return patched_inst; | |
18591 | } | |
18592 | ||
18593 | static inline bfd_vma | |
18594 | create_instruction_sub (int target_reg, int source_reg, int value) | |
18595 | { | |
18596 | /* A8.8.221 SUB (immediate) (A8-708) | |
18597 | SUB Rd, Rn, #value (Encoding T3). */ | |
18598 | bfd_vma patched_inst = 0xf1a00000 | |
18599 | | (target_reg << 8) | |
18600 | | (source_reg << 16) | |
18601 | | (/*S=*/0 << 20) | |
18602 | | ((value & 0x800) >> 11) << 26 | |
18603 | | ((value & 0x700) >> 8) << 12 | |
18604 | | (value & 0x0ff); | |
18605 | ||
18606 | return patched_inst; | |
18607 | } | |
18608 | ||
18609 | static inline bfd_vma | |
9239bbd3 | 18610 | create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words, |
a504d23a LA |
18611 | int first_reg) |
18612 | { | |
18613 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
18614 | VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */ |
18615 | bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00) | |
a504d23a LA |
18616 | | (/*W=*/wback << 21) |
18617 | | (base_reg << 16) | |
9239bbd3 CM |
18618 | | (num_words & 0x000000ff) |
18619 | | (((unsigned)first_reg >> 1) & 0x0000000f) << 12 | |
a504d23a LA |
18620 | | (first_reg & 0x00000001) << 22; |
18621 | ||
18622 | return patched_inst; | |
18623 | } | |
18624 | ||
18625 | static inline bfd_vma | |
9239bbd3 CM |
18626 | create_instruction_vldmdb (int base_reg, int is_dp, int num_words, |
18627 | int first_reg) | |
a504d23a LA |
18628 | { |
18629 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
18630 | VLMD{MODE} Rn!, {} (Encoding T1 or T2). */ |
18631 | bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00) | |
a504d23a | 18632 | | (base_reg << 16) |
9239bbd3 CM |
18633 | | (num_words & 0x000000ff) |
18634 | | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12 | |
a504d23a LA |
18635 | | (first_reg & 0x00000001) << 22; |
18636 | ||
18637 | return patched_inst; | |
18638 | } | |
18639 | ||
18640 | static inline bfd_vma | |
18641 | create_instruction_udf_w (int value) | |
18642 | { | |
18643 | /* A8.8.247 UDF (A8-758) | |
18644 | Undefined (Encoding T2). */ | |
18645 | bfd_vma patched_inst = 0xf7f0a000 | |
18646 | | (value & 0x00000fff) | |
18647 | | (value & 0x000f0000) << 16; | |
18648 | ||
18649 | return patched_inst; | |
18650 | } | |
18651 | ||
18652 | static inline bfd_vma | |
18653 | create_instruction_udf (int value) | |
18654 | { | |
18655 | /* A8.8.247 UDF (A8-758) | |
18656 | Undefined (Encoding T1). */ | |
18657 | bfd_vma patched_inst = 0xde00 | |
18658 | | (value & 0xff); | |
18659 | ||
18660 | return patched_inst; | |
18661 | } | |
18662 | ||
18663 | /* Functions writing an instruction in memory, returning the next | |
18664 | memory position to write to. */ | |
18665 | ||
18666 | static inline bfd_byte * | |
18667 | push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab, | |
18668 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
18669 | { | |
18670 | put_thumb2_insn (htab, output_bfd, insn, pt); | |
18671 | return pt + 4; | |
18672 | } | |
18673 | ||
18674 | static inline bfd_byte * | |
18675 | push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab, | |
18676 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
18677 | { | |
18678 | put_thumb_insn (htab, output_bfd, insn, pt); | |
18679 | return pt + 2; | |
18680 | } | |
18681 | ||
18682 | /* Function filling up a region in memory with T1 and T2 UDFs taking | |
18683 | care of alignment. */ | |
18684 | ||
18685 | static bfd_byte * | |
18686 | stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab, | |
07d6d2b8 AM |
18687 | bfd * output_bfd, |
18688 | const bfd_byte * const base_stub_contents, | |
18689 | bfd_byte * const from_stub_contents, | |
18690 | const bfd_byte * const end_stub_contents) | |
a504d23a LA |
18691 | { |
18692 | bfd_byte *current_stub_contents = from_stub_contents; | |
18693 | ||
18694 | /* Fill the remaining of the stub with deterministic contents : UDF | |
18695 | instructions. | |
18696 | Check if realignment is needed on modulo 4 frontier using T1, to | |
18697 | further use T2. */ | |
18698 | if ((current_stub_contents < end_stub_contents) | |
18699 | && !((current_stub_contents - base_stub_contents) % 2) | |
18700 | && ((current_stub_contents - base_stub_contents) % 4)) | |
18701 | current_stub_contents = | |
18702 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
18703 | create_instruction_udf (0)); | |
18704 | ||
18705 | for (; current_stub_contents < end_stub_contents;) | |
18706 | current_stub_contents = | |
18707 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18708 | create_instruction_udf_w (0)); | |
18709 | ||
18710 | return current_stub_contents; | |
18711 | } | |
18712 | ||
18713 | /* Functions writing the stream of instructions equivalent to the | |
18714 | derived sequence for ldmia, ldmdb, vldm respectively. */ | |
18715 | ||
18716 | static void | |
18717 | stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab, | |
18718 | bfd * output_bfd, | |
18719 | const insn32 initial_insn, | |
18720 | const bfd_byte *const initial_insn_addr, | |
18721 | bfd_byte *const base_stub_contents) | |
18722 | { | |
18723 | int wback = (initial_insn & 0x00200000) >> 21; | |
18724 | int ri, rn = (initial_insn & 0x000F0000) >> 16; | |
18725 | int insn_all_registers = initial_insn & 0x0000ffff; | |
18726 | int insn_low_registers, insn_high_registers; | |
18727 | int usable_register_mask; | |
b25e998d | 18728 | int nb_registers = elf32_arm_popcount (insn_all_registers); |
a504d23a LA |
18729 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; |
18730 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
18731 | bfd_byte *current_stub_contents = base_stub_contents; | |
18732 | ||
18733 | BFD_ASSERT (is_thumb2_ldmia (initial_insn)); | |
18734 | ||
18735 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
18736 | smaller than 8 registers load sequences that do not cause the | |
18737 | hardware issue. */ | |
18738 | if (nb_registers <= 8) | |
18739 | { | |
18740 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
18741 | current_stub_contents = | |
18742 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18743 | initial_insn); | |
18744 | ||
18745 | /* B initial_insn_addr+4. */ | |
18746 | if (!restore_pc) | |
18747 | current_stub_contents = | |
18748 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18749 | create_instruction_branch_absolute | |
82188b29 | 18750 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18751 | |
18752 | /* Fill the remaining of the stub with deterministic contents. */ | |
18753 | current_stub_contents = | |
18754 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
18755 | base_stub_contents, current_stub_contents, | |
18756 | base_stub_contents + | |
18757 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
18758 | ||
18759 | return; | |
18760 | } | |
18761 | ||
18762 | /* - reg_list[13] == 0. */ | |
18763 | BFD_ASSERT ((insn_all_registers & (1 << 13))==0); | |
18764 | ||
18765 | /* - reg_list[14] & reg_list[15] != 1. */ | |
18766 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
18767 | ||
18768 | /* - if (wback==1) reg_list[rn] == 0. */ | |
18769 | BFD_ASSERT (!wback || !restore_rn); | |
18770 | ||
18771 | /* - nb_registers > 8. */ | |
b25e998d | 18772 | BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8); |
a504d23a LA |
18773 | |
18774 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
18775 | ||
18776 | /* In the following algorithm, we split this wide LDM using 2 LDM insns: | |
18777 | - One with the 7 lowest registers (register mask 0x007F) | |
18778 | This LDM will finally contain between 2 and 7 registers | |
18779 | - One with the 7 highest registers (register mask 0xDF80) | |
18780 | This ldm will finally contain between 2 and 7 registers. */ | |
18781 | insn_low_registers = insn_all_registers & 0x007F; | |
18782 | insn_high_registers = insn_all_registers & 0xDF80; | |
18783 | ||
18784 | /* A spare register may be needed during this veneer to temporarily | |
18785 | handle the base register. This register will be restored with the | |
18786 | last LDM operation. | |
18787 | The usable register may be any general purpose register (that | |
18788 | excludes PC, SP, LR : register mask is 0x1FFF). */ | |
18789 | usable_register_mask = 0x1FFF; | |
18790 | ||
18791 | /* Generate the stub function. */ | |
18792 | if (wback) | |
18793 | { | |
18794 | /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */ | |
18795 | current_stub_contents = | |
18796 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18797 | create_instruction_ldmia | |
18798 | (rn, /*wback=*/1, insn_low_registers)); | |
18799 | ||
18800 | /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */ | |
18801 | current_stub_contents = | |
18802 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18803 | create_instruction_ldmia | |
18804 | (rn, /*wback=*/1, insn_high_registers)); | |
18805 | if (!restore_pc) | |
18806 | { | |
18807 | /* B initial_insn_addr+4. */ | |
18808 | current_stub_contents = | |
18809 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18810 | create_instruction_branch_absolute | |
82188b29 | 18811 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18812 | } |
18813 | } | |
18814 | else /* if (!wback). */ | |
18815 | { | |
18816 | ri = rn; | |
18817 | ||
18818 | /* If Rn is not part of the high-register-list, move it there. */ | |
18819 | if (!(insn_high_registers & (1 << rn))) | |
18820 | { | |
18821 | /* Choose a Ri in the high-register-list that will be restored. */ | |
18822 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
18823 | ||
18824 | /* MOV Ri, Rn. */ | |
18825 | current_stub_contents = | |
18826 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
18827 | create_instruction_mov (ri, rn)); | |
18828 | } | |
18829 | ||
18830 | /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */ | |
18831 | current_stub_contents = | |
18832 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18833 | create_instruction_ldmia | |
18834 | (ri, /*wback=*/1, insn_low_registers)); | |
18835 | ||
18836 | /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */ | |
18837 | current_stub_contents = | |
18838 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18839 | create_instruction_ldmia | |
18840 | (ri, /*wback=*/0, insn_high_registers)); | |
18841 | ||
18842 | if (!restore_pc) | |
18843 | { | |
18844 | /* B initial_insn_addr+4. */ | |
18845 | current_stub_contents = | |
18846 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18847 | create_instruction_branch_absolute | |
82188b29 | 18848 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18849 | } |
18850 | } | |
18851 | ||
18852 | /* Fill the remaining of the stub with deterministic contents. */ | |
18853 | current_stub_contents = | |
18854 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
18855 | base_stub_contents, current_stub_contents, | |
18856 | base_stub_contents + | |
18857 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
18858 | } | |
18859 | ||
18860 | static void | |
18861 | stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab, | |
18862 | bfd * output_bfd, | |
18863 | const insn32 initial_insn, | |
18864 | const bfd_byte *const initial_insn_addr, | |
18865 | bfd_byte *const base_stub_contents) | |
18866 | { | |
18867 | int wback = (initial_insn & 0x00200000) >> 21; | |
18868 | int ri, rn = (initial_insn & 0x000f0000) >> 16; | |
18869 | int insn_all_registers = initial_insn & 0x0000ffff; | |
18870 | int insn_low_registers, insn_high_registers; | |
18871 | int usable_register_mask; | |
18872 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; | |
18873 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
b25e998d | 18874 | int nb_registers = elf32_arm_popcount (insn_all_registers); |
a504d23a LA |
18875 | bfd_byte *current_stub_contents = base_stub_contents; |
18876 | ||
18877 | BFD_ASSERT (is_thumb2_ldmdb (initial_insn)); | |
18878 | ||
18879 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
18880 | smaller than 8 registers load sequences that do not cause the | |
18881 | hardware issue. */ | |
18882 | if (nb_registers <= 8) | |
18883 | { | |
18884 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
18885 | current_stub_contents = | |
18886 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18887 | initial_insn); | |
18888 | ||
18889 | /* B initial_insn_addr+4. */ | |
18890 | current_stub_contents = | |
18891 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18892 | create_instruction_branch_absolute | |
82188b29 | 18893 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18894 | |
18895 | /* Fill the remaining of the stub with deterministic contents. */ | |
18896 | current_stub_contents = | |
18897 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
18898 | base_stub_contents, current_stub_contents, | |
18899 | base_stub_contents + | |
18900 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
18901 | ||
18902 | return; | |
18903 | } | |
18904 | ||
18905 | /* - reg_list[13] == 0. */ | |
18906 | BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0); | |
18907 | ||
18908 | /* - reg_list[14] & reg_list[15] != 1. */ | |
18909 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
18910 | ||
18911 | /* - if (wback==1) reg_list[rn] == 0. */ | |
18912 | BFD_ASSERT (!wback || !restore_rn); | |
18913 | ||
18914 | /* - nb_registers > 8. */ | |
b25e998d | 18915 | BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8); |
a504d23a LA |
18916 | |
18917 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
18918 | ||
18919 | /* In the following algorithm, we split this wide LDM using 2 LDM insn: | |
18920 | - One with the 7 lowest registers (register mask 0x007F) | |
18921 | This LDM will finally contain between 2 and 7 registers | |
18922 | - One with the 7 highest registers (register mask 0xDF80) | |
18923 | This ldm will finally contain between 2 and 7 registers. */ | |
18924 | insn_low_registers = insn_all_registers & 0x007F; | |
18925 | insn_high_registers = insn_all_registers & 0xDF80; | |
18926 | ||
18927 | /* A spare register may be needed during this veneer to temporarily | |
18928 | handle the base register. This register will be restored with | |
18929 | the last LDM operation. | |
18930 | The usable register may be any general purpose register (that excludes | |
18931 | PC, SP, LR : register mask is 0x1FFF). */ | |
18932 | usable_register_mask = 0x1FFF; | |
18933 | ||
18934 | /* Generate the stub function. */ | |
18935 | if (!wback && !restore_pc && !restore_rn) | |
18936 | { | |
18937 | /* Choose a Ri in the low-register-list that will be restored. */ | |
18938 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
18939 | ||
18940 | /* MOV Ri, Rn. */ | |
18941 | current_stub_contents = | |
18942 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
18943 | create_instruction_mov (ri, rn)); | |
18944 | ||
18945 | /* LDMDB Ri!, {R-high-register-list}. */ | |
18946 | current_stub_contents = | |
18947 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18948 | create_instruction_ldmdb | |
18949 | (ri, /*wback=*/1, insn_high_registers)); | |
18950 | ||
18951 | /* LDMDB Ri, {R-low-register-list}. */ | |
18952 | current_stub_contents = | |
18953 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18954 | create_instruction_ldmdb | |
18955 | (ri, /*wback=*/0, insn_low_registers)); | |
18956 | ||
18957 | /* B initial_insn_addr+4. */ | |
18958 | current_stub_contents = | |
18959 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18960 | create_instruction_branch_absolute | |
82188b29 | 18961 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18962 | } |
18963 | else if (wback && !restore_pc && !restore_rn) | |
18964 | { | |
18965 | /* LDMDB Rn!, {R-high-register-list}. */ | |
18966 | current_stub_contents = | |
18967 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18968 | create_instruction_ldmdb | |
18969 | (rn, /*wback=*/1, insn_high_registers)); | |
18970 | ||
18971 | /* LDMDB Rn!, {R-low-register-list}. */ | |
18972 | current_stub_contents = | |
18973 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18974 | create_instruction_ldmdb | |
18975 | (rn, /*wback=*/1, insn_low_registers)); | |
18976 | ||
18977 | /* B initial_insn_addr+4. */ | |
18978 | current_stub_contents = | |
18979 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18980 | create_instruction_branch_absolute | |
82188b29 | 18981 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
18982 | } |
18983 | else if (!wback && restore_pc && !restore_rn) | |
18984 | { | |
18985 | /* Choose a Ri in the high-register-list that will be restored. */ | |
18986 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
18987 | ||
18988 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
18989 | current_stub_contents = | |
18990 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18991 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
18992 | ||
18993 | /* LDMIA Ri!, {R-low-register-list}. */ | |
18994 | current_stub_contents = | |
18995 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
18996 | create_instruction_ldmia | |
18997 | (ri, /*wback=*/1, insn_low_registers)); | |
18998 | ||
18999 | /* LDMIA Ri, {R-high-register-list}. */ | |
19000 | current_stub_contents = | |
19001 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19002 | create_instruction_ldmia | |
19003 | (ri, /*wback=*/0, insn_high_registers)); | |
19004 | } | |
19005 | else if (wback && restore_pc && !restore_rn) | |
19006 | { | |
19007 | /* Choose a Ri in the high-register-list that will be restored. */ | |
19008 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
19009 | ||
19010 | /* SUB Rn, Rn, #(4*nb_registers) */ | |
19011 | current_stub_contents = | |
19012 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19013 | create_instruction_sub (rn, rn, (4 * nb_registers))); | |
19014 | ||
19015 | /* MOV Ri, Rn. */ | |
19016 | current_stub_contents = | |
19017 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
19018 | create_instruction_mov (ri, rn)); | |
19019 | ||
19020 | /* LDMIA Ri!, {R-low-register-list}. */ | |
19021 | current_stub_contents = | |
19022 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19023 | create_instruction_ldmia | |
19024 | (ri, /*wback=*/1, insn_low_registers)); | |
19025 | ||
19026 | /* LDMIA Ri, {R-high-register-list}. */ | |
19027 | current_stub_contents = | |
19028 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19029 | create_instruction_ldmia | |
19030 | (ri, /*wback=*/0, insn_high_registers)); | |
19031 | } | |
19032 | else if (!wback && !restore_pc && restore_rn) | |
19033 | { | |
19034 | ri = rn; | |
19035 | if (!(insn_low_registers & (1 << rn))) | |
19036 | { | |
19037 | /* Choose a Ri in the low-register-list that will be restored. */ | |
19038 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
19039 | ||
19040 | /* MOV Ri, Rn. */ | |
19041 | current_stub_contents = | |
19042 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
19043 | create_instruction_mov (ri, rn)); | |
19044 | } | |
19045 | ||
19046 | /* LDMDB Ri!, {R-high-register-list}. */ | |
19047 | current_stub_contents = | |
19048 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19049 | create_instruction_ldmdb | |
19050 | (ri, /*wback=*/1, insn_high_registers)); | |
19051 | ||
19052 | /* LDMDB Ri, {R-low-register-list}. */ | |
19053 | current_stub_contents = | |
19054 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19055 | create_instruction_ldmdb | |
19056 | (ri, /*wback=*/0, insn_low_registers)); | |
19057 | ||
19058 | /* B initial_insn_addr+4. */ | |
19059 | current_stub_contents = | |
19060 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19061 | create_instruction_branch_absolute | |
82188b29 | 19062 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19063 | } |
19064 | else if (!wback && restore_pc && restore_rn) | |
19065 | { | |
19066 | ri = rn; | |
19067 | if (!(insn_high_registers & (1 << rn))) | |
19068 | { | |
19069 | /* Choose a Ri in the high-register-list that will be restored. */ | |
19070 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
19071 | } | |
19072 | ||
19073 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
19074 | current_stub_contents = | |
19075 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19076 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
19077 | ||
19078 | /* LDMIA Ri!, {R-low-register-list}. */ | |
19079 | current_stub_contents = | |
19080 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19081 | create_instruction_ldmia | |
19082 | (ri, /*wback=*/1, insn_low_registers)); | |
19083 | ||
19084 | /* LDMIA Ri, {R-high-register-list}. */ | |
19085 | current_stub_contents = | |
19086 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19087 | create_instruction_ldmia | |
19088 | (ri, /*wback=*/0, insn_high_registers)); | |
19089 | } | |
19090 | else if (wback && restore_rn) | |
19091 | { | |
19092 | /* The assembler should not have accepted to encode this. */ | |
19093 | BFD_ASSERT (0 && "Cannot patch an instruction that has an " | |
19094 | "undefined behavior.\n"); | |
19095 | } | |
19096 | ||
19097 | /* Fill the remaining of the stub with deterministic contents. */ | |
19098 | current_stub_contents = | |
19099 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
19100 | base_stub_contents, current_stub_contents, | |
19101 | base_stub_contents + | |
19102 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
19103 | ||
19104 | } | |
19105 | ||
19106 | static void | |
19107 | stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab, | |
19108 | bfd * output_bfd, | |
19109 | const insn32 initial_insn, | |
19110 | const bfd_byte *const initial_insn_addr, | |
19111 | bfd_byte *const base_stub_contents) | |
19112 | { | |
9239bbd3 | 19113 | int num_words = ((unsigned int) initial_insn << 24) >> 24; |
a504d23a LA |
19114 | bfd_byte *current_stub_contents = base_stub_contents; |
19115 | ||
19116 | BFD_ASSERT (is_thumb2_vldm (initial_insn)); | |
19117 | ||
19118 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
9239bbd3 | 19119 | smaller than 8 words load sequences that do not cause the |
a504d23a | 19120 | hardware issue. */ |
9239bbd3 | 19121 | if (num_words <= 8) |
a504d23a LA |
19122 | { |
19123 | /* Untouched instruction. */ | |
19124 | current_stub_contents = | |
19125 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19126 | initial_insn); | |
19127 | ||
19128 | /* B initial_insn_addr+4. */ | |
19129 | current_stub_contents = | |
19130 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19131 | create_instruction_branch_absolute | |
82188b29 | 19132 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19133 | } |
19134 | else | |
19135 | { | |
9eaff861 | 19136 | bfd_boolean is_dp = /* DP encoding. */ |
9239bbd3 | 19137 | (initial_insn & 0xfe100f00) == 0xec100b00; |
a504d23a LA |
19138 | bfd_boolean is_ia_nobang = /* (IA without !). */ |
19139 | (((initial_insn << 7) >> 28) & 0xd) == 0x4; | |
19140 | bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */ | |
19141 | (((initial_insn << 7) >> 28) & 0xd) == 0x5; | |
19142 | bfd_boolean is_db_bang = /* (DB with !). */ | |
19143 | (((initial_insn << 7) >> 28) & 0xd) == 0x9; | |
9239bbd3 | 19144 | int base_reg = ((unsigned int) initial_insn << 12) >> 28; |
a504d23a | 19145 | /* d = UInt (Vd:D);. */ |
9239bbd3 | 19146 | int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1) |
a504d23a LA |
19147 | | (((unsigned int)initial_insn << 9) >> 31); |
19148 | ||
9239bbd3 CM |
19149 | /* Compute the number of 8-words chunks needed to split. */ |
19150 | int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8); | |
a504d23a LA |
19151 | int chunk; |
19152 | ||
19153 | /* The test coverage has been done assuming the following | |
19154 | hypothesis that exactly one of the previous is_ predicates is | |
19155 | true. */ | |
9239bbd3 CM |
19156 | BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang) |
19157 | && !(is_ia_nobang & is_ia_bang & is_db_bang)); | |
a504d23a | 19158 | |
9239bbd3 | 19159 | /* We treat the cutting of the words in one pass for all |
a504d23a LA |
19160 | cases, then we emit the adjustments: |
19161 | ||
19162 | vldm rx, {...} | |
19163 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
19164 | -> sub rx, rx, #size (list) | |
19165 | ||
19166 | vldm rx!, {...} | |
19167 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
19168 | This also handles vpop instruction (when rx is sp) | |
19169 | ||
19170 | vldmd rx!, {...} | |
19171 | -> vldmb rx!, {8_words_or_less} for each needed 8_word. */ | |
9239bbd3 | 19172 | for (chunk = 0; chunk < chunks; ++chunk) |
a504d23a | 19173 | { |
9239bbd3 CM |
19174 | bfd_vma new_insn = 0; |
19175 | ||
a504d23a LA |
19176 | if (is_ia_nobang || is_ia_bang) |
19177 | { | |
9239bbd3 CM |
19178 | new_insn = create_instruction_vldmia |
19179 | (base_reg, | |
19180 | is_dp, | |
19181 | /*wback= . */1, | |
19182 | chunks - (chunk + 1) ? | |
19183 | 8 : num_words - chunk * 8, | |
19184 | first_reg + chunk * 8); | |
a504d23a LA |
19185 | } |
19186 | else if (is_db_bang) | |
19187 | { | |
9239bbd3 CM |
19188 | new_insn = create_instruction_vldmdb |
19189 | (base_reg, | |
19190 | is_dp, | |
19191 | chunks - (chunk + 1) ? | |
19192 | 8 : num_words - chunk * 8, | |
19193 | first_reg + chunk * 8); | |
a504d23a | 19194 | } |
9239bbd3 CM |
19195 | |
19196 | if (new_insn) | |
19197 | current_stub_contents = | |
19198 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19199 | new_insn); | |
a504d23a LA |
19200 | } |
19201 | ||
19202 | /* Only this case requires the base register compensation | |
19203 | subtract. */ | |
19204 | if (is_ia_nobang) | |
19205 | { | |
19206 | current_stub_contents = | |
19207 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19208 | create_instruction_sub | |
9239bbd3 | 19209 | (base_reg, base_reg, 4*num_words)); |
a504d23a LA |
19210 | } |
19211 | ||
19212 | /* B initial_insn_addr+4. */ | |
19213 | current_stub_contents = | |
19214 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
19215 | create_instruction_branch_absolute | |
82188b29 | 19216 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
19217 | } |
19218 | ||
19219 | /* Fill the remaining of the stub with deterministic contents. */ | |
19220 | current_stub_contents = | |
19221 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
19222 | base_stub_contents, current_stub_contents, | |
19223 | base_stub_contents + | |
19224 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
19225 | } | |
19226 | ||
19227 | static void | |
19228 | stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab, | |
19229 | bfd * output_bfd, | |
19230 | const insn32 wrong_insn, | |
19231 | const bfd_byte *const wrong_insn_addr, | |
19232 | bfd_byte *const stub_contents) | |
19233 | { | |
19234 | if (is_thumb2_ldmia (wrong_insn)) | |
19235 | stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd, | |
19236 | wrong_insn, wrong_insn_addr, | |
19237 | stub_contents); | |
19238 | else if (is_thumb2_ldmdb (wrong_insn)) | |
19239 | stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd, | |
19240 | wrong_insn, wrong_insn_addr, | |
19241 | stub_contents); | |
19242 | else if (is_thumb2_vldm (wrong_insn)) | |
19243 | stm32l4xx_create_replacing_stub_vldm (htab, output_bfd, | |
19244 | wrong_insn, wrong_insn_addr, | |
19245 | stub_contents); | |
19246 | } | |
19247 | ||
19248 | /* End of stm32l4xx work-around. */ | |
19249 | ||
19250 | ||
e489d0ae PB |
19251 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
19252 | written out as normal. */ | |
19253 | ||
19254 | static bfd_boolean | |
c7b8f16e | 19255 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
19256 | struct bfd_link_info *link_info, |
19257 | asection *sec, | |
e489d0ae PB |
19258 | bfd_byte *contents) |
19259 | { | |
48229727 | 19260 | unsigned int mapcount, errcount; |
8e3de13a | 19261 | _arm_elf_section_data *arm_data; |
c7b8f16e | 19262 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 19263 | elf32_arm_section_map *map; |
c7b8f16e | 19264 | elf32_vfp11_erratum_list *errnode; |
a504d23a | 19265 | elf32_stm32l4xx_erratum_list *stm32l4xx_errnode; |
e489d0ae PB |
19266 | bfd_vma ptr; |
19267 | bfd_vma end; | |
c7b8f16e | 19268 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 19269 | bfd_byte tmp; |
48229727 | 19270 | unsigned int i; |
57e8b36a | 19271 | |
4dfe6ac6 NC |
19272 | if (globals == NULL) |
19273 | return FALSE; | |
19274 | ||
8e3de13a NC |
19275 | /* If this section has not been allocated an _arm_elf_section_data |
19276 | structure then we cannot record anything. */ | |
19277 | arm_data = get_arm_elf_section_data (sec); | |
19278 | if (arm_data == NULL) | |
19279 | return FALSE; | |
19280 | ||
19281 | mapcount = arm_data->mapcount; | |
19282 | map = arm_data->map; | |
c7b8f16e JB |
19283 | errcount = arm_data->erratumcount; |
19284 | ||
19285 | if (errcount != 0) | |
19286 | { | |
19287 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
19288 | ||
19289 | for (errnode = arm_data->erratumlist; errnode != 0; | |
99059e56 RM |
19290 | errnode = errnode->next) |
19291 | { | |
19292 | bfd_vma target = errnode->vma - offset; | |
19293 | ||
19294 | switch (errnode->type) | |
19295 | { | |
19296 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
19297 | { | |
19298 | bfd_vma branch_to_veneer; | |
19299 | /* Original condition code of instruction, plus bit mask for | |
19300 | ARM B instruction. */ | |
19301 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
19302 | | 0x0a000000; | |
c7b8f16e JB |
19303 | |
19304 | /* The instruction is before the label. */ | |
91d6fa6a | 19305 | target -= 4; |
c7b8f16e JB |
19306 | |
19307 | /* Above offset included in -4 below. */ | |
19308 | branch_to_veneer = errnode->u.b.veneer->vma | |
99059e56 | 19309 | - errnode->vma - 4; |
c7b8f16e JB |
19310 | |
19311 | if ((signed) branch_to_veneer < -(1 << 25) | |
19312 | || (signed) branch_to_veneer >= (1 << 25)) | |
871b3ab2 | 19313 | _bfd_error_handler (_("%pB: error: VFP11 veneer out of " |
4eca0228 | 19314 | "range"), output_bfd); |
c7b8f16e | 19315 | |
99059e56 RM |
19316 | insn |= (branch_to_veneer >> 2) & 0xffffff; |
19317 | contents[endianflip ^ target] = insn & 0xff; | |
19318 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
19319 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
19320 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
19321 | } | |
19322 | break; | |
c7b8f16e JB |
19323 | |
19324 | case VFP11_ERRATUM_ARM_VENEER: | |
99059e56 RM |
19325 | { |
19326 | bfd_vma branch_from_veneer; | |
19327 | unsigned int insn; | |
c7b8f16e | 19328 | |
99059e56 RM |
19329 | /* Take size of veneer into account. */ |
19330 | branch_from_veneer = errnode->u.v.branch->vma | |
19331 | - errnode->vma - 12; | |
c7b8f16e JB |
19332 | |
19333 | if ((signed) branch_from_veneer < -(1 << 25) | |
19334 | || (signed) branch_from_veneer >= (1 << 25)) | |
871b3ab2 | 19335 | _bfd_error_handler (_("%pB: error: VFP11 veneer out of " |
4eca0228 | 19336 | "range"), output_bfd); |
c7b8f16e | 19337 | |
99059e56 RM |
19338 | /* Original instruction. */ |
19339 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
19340 | contents[endianflip ^ target] = insn & 0xff; | |
19341 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
19342 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
19343 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
19344 | ||
19345 | /* Branch back to insn after original insn. */ | |
19346 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
19347 | contents[endianflip ^ (target + 4)] = insn & 0xff; | |
19348 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
19349 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
19350 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
19351 | } | |
19352 | break; | |
c7b8f16e | 19353 | |
99059e56 RM |
19354 | default: |
19355 | abort (); | |
19356 | } | |
19357 | } | |
c7b8f16e | 19358 | } |
e489d0ae | 19359 | |
a504d23a LA |
19360 | if (arm_data->stm32l4xx_erratumcount != 0) |
19361 | { | |
19362 | for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist; | |
19363 | stm32l4xx_errnode != 0; | |
19364 | stm32l4xx_errnode = stm32l4xx_errnode->next) | |
19365 | { | |
19366 | bfd_vma target = stm32l4xx_errnode->vma - offset; | |
19367 | ||
19368 | switch (stm32l4xx_errnode->type) | |
19369 | { | |
19370 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
19371 | { | |
19372 | unsigned int insn; | |
19373 | bfd_vma branch_to_veneer = | |
19374 | stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma; | |
19375 | ||
19376 | if ((signed) branch_to_veneer < -(1 << 24) | |
19377 | || (signed) branch_to_veneer >= (1 << 24)) | |
19378 | { | |
19379 | bfd_vma out_of_range = | |
19380 | ((signed) branch_to_veneer < -(1 << 24)) ? | |
19381 | - branch_to_veneer - (1 << 24) : | |
19382 | ((signed) branch_to_veneer >= (1 << 24)) ? | |
19383 | branch_to_veneer - (1 << 24) : 0; | |
19384 | ||
4eca0228 | 19385 | _bfd_error_handler |
2dcf00ce | 19386 | (_("%pB(%#" PRIx64 "): error: " |
90b6238f AM |
19387 | "cannot create STM32L4XX veneer; " |
19388 | "jump out of range by %" PRId64 " bytes; " | |
19389 | "cannot encode branch instruction"), | |
a504d23a | 19390 | output_bfd, |
2dcf00ce AM |
19391 | (uint64_t) (stm32l4xx_errnode->vma - 4), |
19392 | (int64_t) out_of_range); | |
a504d23a LA |
19393 | continue; |
19394 | } | |
19395 | ||
19396 | insn = create_instruction_branch_absolute | |
82188b29 | 19397 | (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma); |
a504d23a LA |
19398 | |
19399 | /* The instruction is before the label. */ | |
19400 | target -= 4; | |
19401 | ||
19402 | put_thumb2_insn (globals, output_bfd, | |
19403 | (bfd_vma) insn, contents + target); | |
19404 | } | |
19405 | break; | |
19406 | ||
19407 | case STM32L4XX_ERRATUM_VENEER: | |
19408 | { | |
82188b29 NC |
19409 | bfd_byte * veneer; |
19410 | bfd_byte * veneer_r; | |
a504d23a LA |
19411 | unsigned int insn; |
19412 | ||
82188b29 NC |
19413 | veneer = contents + target; |
19414 | veneer_r = veneer | |
19415 | + stm32l4xx_errnode->u.b.veneer->vma | |
19416 | - stm32l4xx_errnode->vma - 4; | |
a504d23a LA |
19417 | |
19418 | if ((signed) (veneer_r - veneer - | |
19419 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE > | |
19420 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE ? | |
19421 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE : | |
19422 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24) | |
19423 | || (signed) (veneer_r - veneer) >= (1 << 24)) | |
19424 | { | |
90b6238f AM |
19425 | _bfd_error_handler (_("%pB: error: cannot create STM32L4XX " |
19426 | "veneer"), output_bfd); | |
a504d23a LA |
19427 | continue; |
19428 | } | |
19429 | ||
19430 | /* Original instruction. */ | |
19431 | insn = stm32l4xx_errnode->u.v.branch->u.b.insn; | |
19432 | ||
19433 | stm32l4xx_create_replacing_stub | |
19434 | (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer); | |
19435 | } | |
19436 | break; | |
19437 | ||
19438 | default: | |
19439 | abort (); | |
19440 | } | |
19441 | } | |
19442 | } | |
19443 | ||
2468f9c9 PB |
19444 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
19445 | { | |
19446 | arm_unwind_table_edit *edit_node | |
99059e56 | 19447 | = arm_data->u.exidx.unwind_edit_list; |
2468f9c9 | 19448 | /* Now, sec->size is the size of the section we will write. The original |
99059e56 | 19449 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND |
2468f9c9 PB |
19450 | markers) was sec->rawsize. (This isn't the case if we perform no |
19451 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 19452 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
19453 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
19454 | unsigned int in_index, out_index; | |
19455 | bfd_vma add_to_offsets = 0; | |
19456 | ||
19457 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) | |
99059e56 | 19458 | { |
2468f9c9 PB |
19459 | if (edit_node) |
19460 | { | |
19461 | unsigned int edit_index = edit_node->index; | |
b38cadfb | 19462 | |
2468f9c9 | 19463 | if (in_index < edit_index && in_index * 8 < input_size) |
99059e56 | 19464 | { |
2468f9c9 PB |
19465 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, |
19466 | contents + in_index * 8, add_to_offsets); | |
19467 | out_index++; | |
19468 | in_index++; | |
19469 | } | |
19470 | else if (in_index == edit_index | |
19471 | || (in_index * 8 >= input_size | |
19472 | && edit_index == UINT_MAX)) | |
99059e56 | 19473 | { |
2468f9c9 PB |
19474 | switch (edit_node->type) |
19475 | { | |
19476 | case DELETE_EXIDX_ENTRY: | |
19477 | in_index++; | |
19478 | add_to_offsets += 8; | |
19479 | break; | |
b38cadfb | 19480 | |
2468f9c9 PB |
19481 | case INSERT_EXIDX_CANTUNWIND_AT_END: |
19482 | { | |
99059e56 | 19483 | asection *text_sec = edit_node->linked_section; |
2468f9c9 PB |
19484 | bfd_vma text_offset = text_sec->output_section->vma |
19485 | + text_sec->output_offset | |
19486 | + text_sec->size; | |
19487 | bfd_vma exidx_offset = offset + out_index * 8; | |
99059e56 | 19488 | unsigned long prel31_offset; |
2468f9c9 PB |
19489 | |
19490 | /* Note: this is meant to be equivalent to an | |
19491 | R_ARM_PREL31 relocation. These synthetic | |
19492 | EXIDX_CANTUNWIND markers are not relocated by the | |
19493 | usual BFD method. */ | |
19494 | prel31_offset = (text_offset - exidx_offset) | |
19495 | & 0x7ffffffful; | |
491d01d3 YU |
19496 | if (bfd_link_relocatable (link_info)) |
19497 | { | |
19498 | /* Here relocation for new EXIDX_CANTUNWIND is | |
19499 | created, so there is no need to | |
19500 | adjust offset by hand. */ | |
19501 | prel31_offset = text_sec->output_offset | |
19502 | + text_sec->size; | |
491d01d3 | 19503 | } |
2468f9c9 PB |
19504 | |
19505 | /* First address we can't unwind. */ | |
19506 | bfd_put_32 (output_bfd, prel31_offset, | |
19507 | &edited_contents[out_index * 8]); | |
19508 | ||
19509 | /* Code for EXIDX_CANTUNWIND. */ | |
19510 | bfd_put_32 (output_bfd, 0x1, | |
19511 | &edited_contents[out_index * 8 + 4]); | |
19512 | ||
19513 | out_index++; | |
19514 | add_to_offsets -= 8; | |
19515 | } | |
19516 | break; | |
19517 | } | |
b38cadfb | 19518 | |
2468f9c9 PB |
19519 | edit_node = edit_node->next; |
19520 | } | |
19521 | } | |
19522 | else | |
19523 | { | |
19524 | /* No more edits, copy remaining entries verbatim. */ | |
19525 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
19526 | contents + in_index * 8, add_to_offsets); | |
19527 | out_index++; | |
19528 | in_index++; | |
19529 | } | |
19530 | } | |
19531 | ||
19532 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
19533 | bfd_set_section_contents (output_bfd, sec->output_section, | |
19534 | edited_contents, | |
19535 | (file_ptr) sec->output_offset, sec->size); | |
19536 | ||
19537 | return TRUE; | |
19538 | } | |
19539 | ||
48229727 JB |
19540 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
19541 | if (globals->fix_cortex_a8) | |
19542 | { | |
19543 | struct a8_branch_to_stub_data data; | |
19544 | ||
19545 | data.writing_section = sec; | |
19546 | data.contents = contents; | |
19547 | ||
a504d23a LA |
19548 | bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub, |
19549 | & data); | |
48229727 JB |
19550 | } |
19551 | ||
e489d0ae PB |
19552 | if (mapcount == 0) |
19553 | return FALSE; | |
19554 | ||
c7b8f16e | 19555 | if (globals->byteswap_code) |
e489d0ae | 19556 | { |
c7b8f16e | 19557 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 19558 | |
c7b8f16e JB |
19559 | ptr = map[0].vma; |
19560 | for (i = 0; i < mapcount; i++) | |
99059e56 RM |
19561 | { |
19562 | if (i == mapcount - 1) | |
c7b8f16e | 19563 | end = sec->size; |
99059e56 RM |
19564 | else |
19565 | end = map[i + 1].vma; | |
e489d0ae | 19566 | |
99059e56 | 19567 | switch (map[i].type) |
e489d0ae | 19568 | { |
c7b8f16e JB |
19569 | case 'a': |
19570 | /* Byte swap code words. */ | |
19571 | while (ptr + 3 < end) | |
99059e56 RM |
19572 | { |
19573 | tmp = contents[ptr]; | |
19574 | contents[ptr] = contents[ptr + 3]; | |
19575 | contents[ptr + 3] = tmp; | |
19576 | tmp = contents[ptr + 1]; | |
19577 | contents[ptr + 1] = contents[ptr + 2]; | |
19578 | contents[ptr + 2] = tmp; | |
19579 | ptr += 4; | |
19580 | } | |
c7b8f16e | 19581 | break; |
e489d0ae | 19582 | |
c7b8f16e JB |
19583 | case 't': |
19584 | /* Byte swap code halfwords. */ | |
19585 | while (ptr + 1 < end) | |
99059e56 RM |
19586 | { |
19587 | tmp = contents[ptr]; | |
19588 | contents[ptr] = contents[ptr + 1]; | |
19589 | contents[ptr + 1] = tmp; | |
19590 | ptr += 2; | |
19591 | } | |
c7b8f16e JB |
19592 | break; |
19593 | ||
19594 | case 'd': | |
19595 | /* Leave data alone. */ | |
19596 | break; | |
19597 | } | |
99059e56 RM |
19598 | ptr = end; |
19599 | } | |
e489d0ae | 19600 | } |
8e3de13a | 19601 | |
93204d3a | 19602 | free (map); |
47b2e99c | 19603 | arm_data->mapcount = -1; |
c7b8f16e | 19604 | arm_data->mapsize = 0; |
8e3de13a | 19605 | arm_data->map = NULL; |
8e3de13a | 19606 | |
e489d0ae PB |
19607 | return FALSE; |
19608 | } | |
19609 | ||
0beaef2b PB |
19610 | /* Mangle thumb function symbols as we read them in. */ |
19611 | ||
8384fb8f | 19612 | static bfd_boolean |
0beaef2b PB |
19613 | elf32_arm_swap_symbol_in (bfd * abfd, |
19614 | const void *psrc, | |
19615 | const void *pshn, | |
19616 | Elf_Internal_Sym *dst) | |
19617 | { | |
4ba2ef8f TP |
19618 | Elf_Internal_Shdr *symtab_hdr; |
19619 | const char *name = NULL; | |
19620 | ||
8384fb8f AM |
19621 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
19622 | return FALSE; | |
39d911fc | 19623 | dst->st_target_internal = 0; |
0beaef2b PB |
19624 | |
19625 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
35fc36a8 | 19626 | the address. */ |
63e1a0fc PB |
19627 | if (ELF_ST_TYPE (dst->st_info) == STT_FUNC |
19628 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) | |
0beaef2b | 19629 | { |
63e1a0fc PB |
19630 | if (dst->st_value & 1) |
19631 | { | |
19632 | dst->st_value &= ~(bfd_vma) 1; | |
39d911fc TP |
19633 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, |
19634 | ST_BRANCH_TO_THUMB); | |
63e1a0fc PB |
19635 | } |
19636 | else | |
39d911fc | 19637 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM); |
35fc36a8 RS |
19638 | } |
19639 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) | |
19640 | { | |
19641 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); | |
39d911fc | 19642 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB); |
0beaef2b | 19643 | } |
35fc36a8 | 19644 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
39d911fc | 19645 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG); |
35fc36a8 | 19646 | else |
39d911fc | 19647 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN); |
35fc36a8 | 19648 | |
4ba2ef8f TP |
19649 | /* Mark CMSE special symbols. */ |
19650 | symtab_hdr = & elf_symtab_hdr (abfd); | |
19651 | if (symtab_hdr->sh_size) | |
19652 | name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL); | |
19653 | if (name && CONST_STRNEQ (name, CMSE_PREFIX)) | |
19654 | ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal); | |
19655 | ||
8384fb8f | 19656 | return TRUE; |
0beaef2b PB |
19657 | } |
19658 | ||
19659 | ||
19660 | /* Mangle thumb function symbols as we write them out. */ | |
19661 | ||
19662 | static void | |
19663 | elf32_arm_swap_symbol_out (bfd *abfd, | |
19664 | const Elf_Internal_Sym *src, | |
19665 | void *cdst, | |
19666 | void *shndx) | |
19667 | { | |
19668 | Elf_Internal_Sym newsym; | |
19669 | ||
19670 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
19671 | of the address set, as per the new EABI. We do this unconditionally | |
19672 | because objcopy does not set the elf header flags until after | |
19673 | it writes out the symbol table. */ | |
39d911fc | 19674 | if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB) |
0beaef2b PB |
19675 | { |
19676 | newsym = *src; | |
34e77a92 RS |
19677 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
19678 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad | 19679 | if (newsym.st_shndx != SHN_UNDEF) |
99059e56 RM |
19680 | { |
19681 | /* Do this only for defined symbols. At link type, the static | |
19682 | linker will simulate the work of dynamic linker of resolving | |
19683 | symbols and will carry over the thumbness of found symbols to | |
19684 | the output symbol table. It's not clear how it happens, but | |
19685 | the thumbness of undefined symbols can well be different at | |
19686 | runtime, and writing '1' for them will be confusing for users | |
19687 | and possibly for dynamic linker itself. | |
19688 | */ | |
19689 | newsym.st_value |= 1; | |
19690 | } | |
906e58ca | 19691 | |
0beaef2b PB |
19692 | src = &newsym; |
19693 | } | |
19694 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
19695 | } | |
19696 | ||
b294bdf8 MM |
19697 | /* Add the PT_ARM_EXIDX program header. */ |
19698 | ||
19699 | static bfd_boolean | |
906e58ca | 19700 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
19701 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
19702 | { | |
19703 | struct elf_segment_map *m; | |
19704 | asection *sec; | |
19705 | ||
19706 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
19707 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
19708 | { | |
19709 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
19710 | want to add another one. This situation arises when running | |
19711 | "strip"; the input binary already has the header. */ | |
12bd6957 | 19712 | m = elf_seg_map (abfd); |
b294bdf8 MM |
19713 | while (m && m->p_type != PT_ARM_EXIDX) |
19714 | m = m->next; | |
19715 | if (!m) | |
19716 | { | |
21d799b5 | 19717 | m = (struct elf_segment_map *) |
99059e56 | 19718 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); |
b294bdf8 MM |
19719 | if (m == NULL) |
19720 | return FALSE; | |
19721 | m->p_type = PT_ARM_EXIDX; | |
19722 | m->count = 1; | |
19723 | m->sections[0] = sec; | |
19724 | ||
12bd6957 AM |
19725 | m->next = elf_seg_map (abfd); |
19726 | elf_seg_map (abfd) = m; | |
b294bdf8 MM |
19727 | } |
19728 | } | |
19729 | ||
19730 | return TRUE; | |
19731 | } | |
19732 | ||
19733 | /* We may add a PT_ARM_EXIDX program header. */ | |
19734 | ||
19735 | static int | |
a6b96beb AM |
19736 | elf32_arm_additional_program_headers (bfd *abfd, |
19737 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
19738 | { |
19739 | asection *sec; | |
19740 | ||
19741 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
19742 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
19743 | return 1; | |
19744 | else | |
19745 | return 0; | |
19746 | } | |
19747 | ||
34e77a92 RS |
19748 | /* Hook called by the linker routine which adds symbols from an object |
19749 | file. */ | |
19750 | ||
19751 | static bfd_boolean | |
19752 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, | |
19753 | Elf_Internal_Sym *sym, const char **namep, | |
19754 | flagword *flagsp, asection **secp, bfd_vma *valp) | |
19755 | { | |
a43942db | 19756 | if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC |
f1885d1e AM |
19757 | && (abfd->flags & DYNAMIC) == 0 |
19758 | && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour) | |
a43942db | 19759 | elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc; |
34e77a92 | 19760 | |
c792917c NC |
19761 | if (elf32_arm_hash_table (info) == NULL) |
19762 | return FALSE; | |
19763 | ||
34e77a92 RS |
19764 | if (elf32_arm_hash_table (info)->vxworks_p |
19765 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, | |
19766 | flagsp, secp, valp)) | |
19767 | return FALSE; | |
19768 | ||
19769 | return TRUE; | |
19770 | } | |
19771 | ||
0beaef2b | 19772 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
19773 | const struct elf_size_info elf32_arm_size_info = |
19774 | { | |
0beaef2b PB |
19775 | sizeof (Elf32_External_Ehdr), |
19776 | sizeof (Elf32_External_Phdr), | |
19777 | sizeof (Elf32_External_Shdr), | |
19778 | sizeof (Elf32_External_Rel), | |
19779 | sizeof (Elf32_External_Rela), | |
19780 | sizeof (Elf32_External_Sym), | |
19781 | sizeof (Elf32_External_Dyn), | |
19782 | sizeof (Elf_External_Note), | |
19783 | 4, | |
19784 | 1, | |
19785 | 32, 2, | |
19786 | ELFCLASS32, EV_CURRENT, | |
19787 | bfd_elf32_write_out_phdrs, | |
19788 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 19789 | bfd_elf32_checksum_contents, |
0beaef2b PB |
19790 | bfd_elf32_write_relocs, |
19791 | elf32_arm_swap_symbol_in, | |
19792 | elf32_arm_swap_symbol_out, | |
19793 | bfd_elf32_slurp_reloc_table, | |
19794 | bfd_elf32_slurp_symbol_table, | |
19795 | bfd_elf32_swap_dyn_in, | |
19796 | bfd_elf32_swap_dyn_out, | |
19797 | bfd_elf32_swap_reloc_in, | |
19798 | bfd_elf32_swap_reloc_out, | |
19799 | bfd_elf32_swap_reloca_in, | |
19800 | bfd_elf32_swap_reloca_out | |
19801 | }; | |
19802 | ||
685e70ae VK |
19803 | static bfd_vma |
19804 | read_code32 (const bfd *abfd, const bfd_byte *addr) | |
19805 | { | |
19806 | /* V7 BE8 code is always little endian. */ | |
19807 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
19808 | return bfd_getl32 (addr); | |
19809 | ||
19810 | return bfd_get_32 (abfd, addr); | |
19811 | } | |
19812 | ||
19813 | static bfd_vma | |
19814 | read_code16 (const bfd *abfd, const bfd_byte *addr) | |
19815 | { | |
19816 | /* V7 BE8 code is always little endian. */ | |
19817 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
19818 | return bfd_getl16 (addr); | |
19819 | ||
19820 | return bfd_get_16 (abfd, addr); | |
19821 | } | |
19822 | ||
6a631e86 YG |
19823 | /* Return size of plt0 entry starting at ADDR |
19824 | or (bfd_vma) -1 if size can not be determined. */ | |
19825 | ||
19826 | static bfd_vma | |
19827 | elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr) | |
19828 | { | |
19829 | bfd_vma first_word; | |
19830 | bfd_vma plt0_size; | |
19831 | ||
685e70ae | 19832 | first_word = read_code32 (abfd, addr); |
6a631e86 YG |
19833 | |
19834 | if (first_word == elf32_arm_plt0_entry[0]) | |
19835 | plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry); | |
19836 | else if (first_word == elf32_thumb2_plt0_entry[0]) | |
19837 | plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
19838 | else | |
19839 | /* We don't yet handle this PLT format. */ | |
19840 | return (bfd_vma) -1; | |
19841 | ||
19842 | return plt0_size; | |
19843 | } | |
19844 | ||
19845 | /* Return size of plt entry starting at offset OFFSET | |
19846 | of plt section located at address START | |
19847 | or (bfd_vma) -1 if size can not be determined. */ | |
19848 | ||
19849 | static bfd_vma | |
19850 | elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset) | |
19851 | { | |
19852 | bfd_vma first_insn; | |
19853 | bfd_vma plt_size = 0; | |
19854 | const bfd_byte *addr = start + offset; | |
19855 | ||
19856 | /* PLT entry size if fixed on Thumb-only platforms. */ | |
685e70ae | 19857 | if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0]) |
6a631e86 YG |
19858 | return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); |
19859 | ||
19860 | /* Respect Thumb stub if necessary. */ | |
685e70ae | 19861 | if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0]) |
6a631e86 YG |
19862 | { |
19863 | plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub); | |
19864 | } | |
19865 | ||
19866 | /* Strip immediate from first add. */ | |
685e70ae | 19867 | first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00; |
6a631e86 YG |
19868 | |
19869 | #ifdef FOUR_WORD_PLT | |
19870 | if (first_insn == elf32_arm_plt_entry[0]) | |
19871 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry); | |
19872 | #else | |
19873 | if (first_insn == elf32_arm_plt_entry_long[0]) | |
19874 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long); | |
19875 | else if (first_insn == elf32_arm_plt_entry_short[0]) | |
19876 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short); | |
19877 | #endif | |
19878 | else | |
19879 | /* We don't yet handle this PLT format. */ | |
19880 | return (bfd_vma) -1; | |
19881 | ||
19882 | return plt_size; | |
19883 | } | |
19884 | ||
19885 | /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */ | |
19886 | ||
19887 | static long | |
19888 | elf32_arm_get_synthetic_symtab (bfd *abfd, | |
19889 | long symcount ATTRIBUTE_UNUSED, | |
19890 | asymbol **syms ATTRIBUTE_UNUSED, | |
19891 | long dynsymcount, | |
19892 | asymbol **dynsyms, | |
19893 | asymbol **ret) | |
19894 | { | |
19895 | asection *relplt; | |
19896 | asymbol *s; | |
19897 | arelent *p; | |
19898 | long count, i, n; | |
19899 | size_t size; | |
19900 | Elf_Internal_Shdr *hdr; | |
19901 | char *names; | |
19902 | asection *plt; | |
19903 | bfd_vma offset; | |
19904 | bfd_byte *data; | |
19905 | ||
19906 | *ret = NULL; | |
19907 | ||
19908 | if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0) | |
19909 | return 0; | |
19910 | ||
19911 | if (dynsymcount <= 0) | |
19912 | return 0; | |
19913 | ||
19914 | relplt = bfd_get_section_by_name (abfd, ".rel.plt"); | |
19915 | if (relplt == NULL) | |
19916 | return 0; | |
19917 | ||
19918 | hdr = &elf_section_data (relplt)->this_hdr; | |
19919 | if (hdr->sh_link != elf_dynsymtab (abfd) | |
19920 | || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA)) | |
19921 | return 0; | |
19922 | ||
19923 | plt = bfd_get_section_by_name (abfd, ".plt"); | |
19924 | if (plt == NULL) | |
19925 | return 0; | |
19926 | ||
19927 | if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE)) | |
19928 | return -1; | |
19929 | ||
19930 | data = plt->contents; | |
19931 | if (data == NULL) | |
19932 | { | |
19933 | if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL) | |
19934 | return -1; | |
19935 | bfd_cache_section_contents((asection *) plt, data); | |
19936 | } | |
19937 | ||
19938 | count = relplt->size / hdr->sh_entsize; | |
19939 | size = count * sizeof (asymbol); | |
19940 | p = relplt->relocation; | |
19941 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
19942 | { | |
19943 | size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt"); | |
19944 | if (p->addend != 0) | |
19945 | size += sizeof ("+0x") - 1 + 8; | |
19946 | } | |
19947 | ||
19948 | s = *ret = (asymbol *) bfd_malloc (size); | |
19949 | if (s == NULL) | |
19950 | return -1; | |
19951 | ||
19952 | offset = elf32_arm_plt0_size (abfd, data); | |
19953 | if (offset == (bfd_vma) -1) | |
19954 | return -1; | |
19955 | ||
19956 | names = (char *) (s + count); | |
19957 | p = relplt->relocation; | |
19958 | n = 0; | |
19959 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
19960 | { | |
19961 | size_t len; | |
19962 | ||
19963 | bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset); | |
19964 | if (plt_size == (bfd_vma) -1) | |
19965 | break; | |
19966 | ||
19967 | *s = **p->sym_ptr_ptr; | |
19968 | /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since | |
19969 | we are defining a symbol, ensure one of them is set. */ | |
19970 | if ((s->flags & BSF_LOCAL) == 0) | |
19971 | s->flags |= BSF_GLOBAL; | |
19972 | s->flags |= BSF_SYNTHETIC; | |
19973 | s->section = plt; | |
19974 | s->value = offset; | |
19975 | s->name = names; | |
19976 | s->udata.p = NULL; | |
19977 | len = strlen ((*p->sym_ptr_ptr)->name); | |
19978 | memcpy (names, (*p->sym_ptr_ptr)->name, len); | |
19979 | names += len; | |
19980 | if (p->addend != 0) | |
19981 | { | |
19982 | char buf[30], *a; | |
19983 | ||
19984 | memcpy (names, "+0x", sizeof ("+0x") - 1); | |
19985 | names += sizeof ("+0x") - 1; | |
19986 | bfd_sprintf_vma (abfd, buf, p->addend); | |
19987 | for (a = buf; *a == '0'; ++a) | |
19988 | ; | |
19989 | len = strlen (a); | |
19990 | memcpy (names, a, len); | |
19991 | names += len; | |
19992 | } | |
19993 | memcpy (names, "@plt", sizeof ("@plt")); | |
19994 | names += sizeof ("@plt"); | |
19995 | ++s, ++n; | |
19996 | offset += plt_size; | |
19997 | } | |
19998 | ||
19999 | return n; | |
20000 | } | |
20001 | ||
ac4c9b04 MG |
20002 | static bfd_boolean |
20003 | elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr) | |
20004 | { | |
f0728ee3 AV |
20005 | if (hdr->sh_flags & SHF_ARM_PURECODE) |
20006 | *flags |= SEC_ELF_PURECODE; | |
ac4c9b04 MG |
20007 | return TRUE; |
20008 | } | |
20009 | ||
20010 | static flagword | |
20011 | elf32_arm_lookup_section_flags (char *flag_name) | |
20012 | { | |
f0728ee3 AV |
20013 | if (!strcmp (flag_name, "SHF_ARM_PURECODE")) |
20014 | return SHF_ARM_PURECODE; | |
ac4c9b04 MG |
20015 | |
20016 | return SEC_NO_FLAGS; | |
20017 | } | |
20018 | ||
491d01d3 YU |
20019 | static unsigned int |
20020 | elf32_arm_count_additional_relocs (asection *sec) | |
20021 | { | |
20022 | struct _arm_elf_section_data *arm_data; | |
20023 | arm_data = get_arm_elf_section_data (sec); | |
5025eb7c | 20024 | |
6342be70 | 20025 | return arm_data == NULL ? 0 : arm_data->additional_reloc_count; |
491d01d3 YU |
20026 | } |
20027 | ||
5522f910 | 20028 | /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which |
9eaff861 | 20029 | has a type >= SHT_LOOS. Returns TRUE if these fields were initialised |
5522f910 NC |
20030 | FALSE otherwise. ISECTION is the best guess matching section from the |
20031 | input bfd IBFD, but it might be NULL. */ | |
20032 | ||
20033 | static bfd_boolean | |
20034 | elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED, | |
20035 | bfd *obfd ATTRIBUTE_UNUSED, | |
20036 | const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED, | |
20037 | Elf_Internal_Shdr *osection) | |
20038 | { | |
20039 | switch (osection->sh_type) | |
20040 | { | |
20041 | case SHT_ARM_EXIDX: | |
20042 | { | |
20043 | Elf_Internal_Shdr **oheaders = elf_elfsections (obfd); | |
20044 | Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd); | |
20045 | unsigned i = 0; | |
20046 | ||
20047 | osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER; | |
20048 | osection->sh_info = 0; | |
20049 | ||
20050 | /* The sh_link field must be set to the text section associated with | |
20051 | this index section. Unfortunately the ARM EHABI does not specify | |
20052 | exactly how to determine this association. Our caller does try | |
20053 | to match up OSECTION with its corresponding input section however | |
20054 | so that is a good first guess. */ | |
20055 | if (isection != NULL | |
20056 | && osection->bfd_section != NULL | |
20057 | && isection->bfd_section != NULL | |
20058 | && isection->bfd_section->output_section != NULL | |
20059 | && isection->bfd_section->output_section == osection->bfd_section | |
20060 | && iheaders != NULL | |
20061 | && isection->sh_link > 0 | |
20062 | && isection->sh_link < elf_numsections (ibfd) | |
20063 | && iheaders[isection->sh_link]->bfd_section != NULL | |
20064 | && iheaders[isection->sh_link]->bfd_section->output_section != NULL | |
20065 | ) | |
20066 | { | |
20067 | for (i = elf_numsections (obfd); i-- > 0;) | |
20068 | if (oheaders[i]->bfd_section | |
20069 | == iheaders[isection->sh_link]->bfd_section->output_section) | |
20070 | break; | |
20071 | } | |
9eaff861 | 20072 | |
5522f910 NC |
20073 | if (i == 0) |
20074 | { | |
20075 | /* Failing that we have to find a matching section ourselves. If | |
20076 | we had the output section name available we could compare that | |
20077 | with input section names. Unfortunately we don't. So instead | |
20078 | we use a simple heuristic and look for the nearest executable | |
20079 | section before this one. */ | |
20080 | for (i = elf_numsections (obfd); i-- > 0;) | |
20081 | if (oheaders[i] == osection) | |
20082 | break; | |
20083 | if (i == 0) | |
20084 | break; | |
20085 | ||
20086 | while (i-- > 0) | |
20087 | if (oheaders[i]->sh_type == SHT_PROGBITS | |
20088 | && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR)) | |
20089 | == (SHF_ALLOC | SHF_EXECINSTR)) | |
20090 | break; | |
20091 | } | |
20092 | ||
20093 | if (i) | |
20094 | { | |
20095 | osection->sh_link = i; | |
20096 | /* If the text section was part of a group | |
20097 | then the index section should be too. */ | |
20098 | if (oheaders[i]->sh_flags & SHF_GROUP) | |
20099 | osection->sh_flags |= SHF_GROUP; | |
20100 | return TRUE; | |
20101 | } | |
20102 | } | |
20103 | break; | |
20104 | ||
20105 | case SHT_ARM_PREEMPTMAP: | |
20106 | osection->sh_flags = SHF_ALLOC; | |
20107 | break; | |
20108 | ||
20109 | case SHT_ARM_ATTRIBUTES: | |
20110 | case SHT_ARM_DEBUGOVERLAY: | |
20111 | case SHT_ARM_OVERLAYSECTION: | |
20112 | default: | |
20113 | break; | |
20114 | } | |
20115 | ||
20116 | return FALSE; | |
20117 | } | |
20118 | ||
d691934d NC |
20119 | /* Returns TRUE if NAME is an ARM mapping symbol. |
20120 | Traditionally the symbols $a, $d and $t have been used. | |
20121 | The ARM ELF standard also defines $x (for A64 code). It also allows a | |
20122 | period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+". | |
20123 | Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do | |
20124 | not support them here. $t.x indicates the start of ThumbEE instructions. */ | |
20125 | ||
20126 | static bfd_boolean | |
20127 | is_arm_mapping_symbol (const char * name) | |
20128 | { | |
20129 | return name != NULL /* Paranoia. */ | |
20130 | && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then | |
20131 | the mapping symbols could have acquired a prefix. | |
20132 | We do not support this here, since such symbols no | |
20133 | longer conform to the ARM ELF ABI. */ | |
20134 | && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x') | |
20135 | && (name[2] == 0 || name[2] == '.'); | |
20136 | /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if | |
20137 | any characters that follow the period are legal characters for the body | |
20138 | of a symbol's name. For now we just assume that this is the case. */ | |
20139 | } | |
20140 | ||
fca2a38f NC |
20141 | /* Make sure that mapping symbols in object files are not removed via the |
20142 | "strip --strip-unneeded" tool. These symbols are needed in order to | |
20143 | correctly generate interworking veneers, and for byte swapping code | |
20144 | regions. Once an object file has been linked, it is safe to remove the | |
20145 | symbols as they will no longer be needed. */ | |
20146 | ||
20147 | static void | |
20148 | elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym) | |
20149 | { | |
20150 | if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0) | |
fca2a38f | 20151 | && sym->section != bfd_abs_section_ptr |
d691934d | 20152 | && is_arm_mapping_symbol (sym->name)) |
fca2a38f NC |
20153 | sym->flags |= BSF_KEEP; |
20154 | } | |
20155 | ||
5522f910 NC |
20156 | #undef elf_backend_copy_special_section_fields |
20157 | #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields | |
20158 | ||
252b5132 | 20159 | #define ELF_ARCH bfd_arch_arm |
ae95ffa6 | 20160 | #define ELF_TARGET_ID ARM_ELF_DATA |
252b5132 | 20161 | #define ELF_MACHINE_CODE EM_ARM |
d0facd1b NC |
20162 | #ifdef __QNXTARGET__ |
20163 | #define ELF_MAXPAGESIZE 0x1000 | |
20164 | #else | |
7572ca89 | 20165 | #define ELF_MAXPAGESIZE 0x10000 |
d0facd1b | 20166 | #endif |
b1342370 | 20167 | #define ELF_MINPAGESIZE 0x1000 |
24718e3b | 20168 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 20169 | |
07d6d2b8 | 20170 | #define bfd_elf32_mkobject elf32_arm_mkobject |
ba93b8ac | 20171 | |
99e4ae17 AJ |
20172 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
20173 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
20174 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
20175 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
07d6d2b8 | 20176 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create |
dc810e39 | 20177 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
b38cadfb | 20178 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
07d6d2b8 AM |
20179 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
20180 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info | |
e489d0ae | 20181 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 20182 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
3e6b1042 | 20183 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
07d6d2b8 | 20184 | #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab |
252b5132 | 20185 | |
07d6d2b8 AM |
20186 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type |
20187 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook | |
6a5bb875 | 20188 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
07d6d2b8 | 20189 | #define elf_backend_check_relocs elf32_arm_check_relocs |
9eaff861 | 20190 | #define elf_backend_update_relocs elf32_arm_update_relocs |
dc810e39 | 20191 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 20192 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 20193 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
07d6d2b8 | 20194 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
20195 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
20196 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
20197 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
0855e32b | 20198 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
74541ad4 | 20199 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ba96a88f | 20200 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
99e4ae17 | 20201 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 20202 | #define elf_backend_object_p elf32_arm_object_p |
07d6d2b8 AM |
20203 | #define elf_backend_fake_sections elf32_arm_fake_sections |
20204 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
20205 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
20206 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol | |
0beaef2b | 20207 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 20208 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
07d6d2b8 AM |
20209 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
20210 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
54ddd295 | 20211 | #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols |
07d6d2b8 | 20212 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing |
34e77a92 | 20213 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
491d01d3 | 20214 | #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs |
fca2a38f | 20215 | #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing |
906e58ca NC |
20216 | |
20217 | #define elf_backend_can_refcount 1 | |
20218 | #define elf_backend_can_gc_sections 1 | |
20219 | #define elf_backend_plt_readonly 1 | |
20220 | #define elf_backend_want_got_plt 1 | |
20221 | #define elf_backend_want_plt_sym 0 | |
5474d94f | 20222 | #define elf_backend_want_dynrelro 1 |
906e58ca NC |
20223 | #define elf_backend_may_use_rel_p 1 |
20224 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 20225 | #define elf_backend_default_use_rela_p 0 |
64f52338 | 20226 | #define elf_backend_dtrel_excludes_plt 1 |
252b5132 | 20227 | |
04f7c78d | 20228 | #define elf_backend_got_header_size 12 |
b68a20d6 | 20229 | #define elf_backend_extern_protected_data 1 |
04f7c78d | 20230 | |
07d6d2b8 | 20231 | #undef elf_backend_obj_attrs_vendor |
906e58ca | 20232 | #define elf_backend_obj_attrs_vendor "aeabi" |
07d6d2b8 | 20233 | #undef elf_backend_obj_attrs_section |
906e58ca | 20234 | #define elf_backend_obj_attrs_section ".ARM.attributes" |
07d6d2b8 | 20235 | #undef elf_backend_obj_attrs_arg_type |
906e58ca | 20236 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type |
07d6d2b8 | 20237 | #undef elf_backend_obj_attrs_section_type |
104d59d1 | 20238 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
b38cadfb | 20239 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
07d6d2b8 | 20240 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown |
104d59d1 | 20241 | |
07d6d2b8 | 20242 | #undef elf_backend_section_flags |
ac4c9b04 | 20243 | #define elf_backend_section_flags elf32_arm_section_flags |
07d6d2b8 AM |
20244 | #undef elf_backend_lookup_section_flags_hook |
20245 | #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags | |
ac4c9b04 | 20246 | |
a2f63b2e MR |
20247 | #define elf_backend_linux_prpsinfo32_ugid16 TRUE |
20248 | ||
252b5132 | 20249 | #include "elf32-target.h" |
7f266840 | 20250 | |
b38cadfb NC |
20251 | /* Native Client targets. */ |
20252 | ||
20253 | #undef TARGET_LITTLE_SYM | |
6d00b590 | 20254 | #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec |
b38cadfb NC |
20255 | #undef TARGET_LITTLE_NAME |
20256 | #define TARGET_LITTLE_NAME "elf32-littlearm-nacl" | |
20257 | #undef TARGET_BIG_SYM | |
6d00b590 | 20258 | #define TARGET_BIG_SYM arm_elf32_nacl_be_vec |
b38cadfb NC |
20259 | #undef TARGET_BIG_NAME |
20260 | #define TARGET_BIG_NAME "elf32-bigarm-nacl" | |
20261 | ||
20262 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20263 | appropriately for NaCl. */ | |
20264 | ||
20265 | static struct bfd_link_hash_table * | |
20266 | elf32_arm_nacl_link_hash_table_create (bfd *abfd) | |
20267 | { | |
20268 | struct bfd_link_hash_table *ret; | |
20269 | ||
20270 | ret = elf32_arm_link_hash_table_create (abfd); | |
20271 | if (ret) | |
20272 | { | |
20273 | struct elf32_arm_link_hash_table *htab | |
20274 | = (struct elf32_arm_link_hash_table *) ret; | |
20275 | ||
20276 | htab->nacl_p = 1; | |
20277 | ||
20278 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry); | |
20279 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry); | |
20280 | } | |
20281 | return ret; | |
20282 | } | |
20283 | ||
20284 | /* Since NaCl doesn't use the ARM-specific unwind format, we don't | |
20285 | really need to use elf32_arm_modify_segment_map. But we do it | |
20286 | anyway just to reduce gratuitous differences with the stock ARM backend. */ | |
20287 | ||
20288 | static bfd_boolean | |
20289 | elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info) | |
20290 | { | |
20291 | return (elf32_arm_modify_segment_map (abfd, info) | |
20292 | && nacl_modify_segment_map (abfd, info)); | |
20293 | } | |
20294 | ||
887badb3 RM |
20295 | static void |
20296 | elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker) | |
20297 | { | |
20298 | elf32_arm_final_write_processing (abfd, linker); | |
20299 | nacl_final_write_processing (abfd, linker); | |
20300 | } | |
20301 | ||
6a631e86 YG |
20302 | static bfd_vma |
20303 | elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt, | |
20304 | const arelent *rel ATTRIBUTE_UNUSED) | |
20305 | { | |
20306 | return plt->vma | |
20307 | + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) + | |
20308 | i * ARRAY_SIZE (elf32_arm_nacl_plt_entry)); | |
20309 | } | |
887badb3 | 20310 | |
b38cadfb | 20311 | #undef elf32_bed |
6a631e86 | 20312 | #define elf32_bed elf32_arm_nacl_bed |
b38cadfb NC |
20313 | #undef bfd_elf32_bfd_link_hash_table_create |
20314 | #define bfd_elf32_bfd_link_hash_table_create \ | |
20315 | elf32_arm_nacl_link_hash_table_create | |
20316 | #undef elf_backend_plt_alignment | |
6a631e86 | 20317 | #define elf_backend_plt_alignment 4 |
b38cadfb NC |
20318 | #undef elf_backend_modify_segment_map |
20319 | #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map | |
20320 | #undef elf_backend_modify_program_headers | |
20321 | #define elf_backend_modify_program_headers nacl_modify_program_headers | |
887badb3 RM |
20322 | #undef elf_backend_final_write_processing |
20323 | #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing | |
6a631e86 YG |
20324 | #undef bfd_elf32_get_synthetic_symtab |
20325 | #undef elf_backend_plt_sym_val | |
20326 | #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val | |
5522f910 | 20327 | #undef elf_backend_copy_special_section_fields |
b38cadfb | 20328 | |
887badb3 RM |
20329 | #undef ELF_MINPAGESIZE |
20330 | #undef ELF_COMMONPAGESIZE | |
20331 | ||
b38cadfb NC |
20332 | |
20333 | #include "elf32-target.h" | |
20334 | ||
20335 | /* Reset to defaults. */ | |
20336 | #undef elf_backend_plt_alignment | |
20337 | #undef elf_backend_modify_segment_map | |
20338 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map | |
20339 | #undef elf_backend_modify_program_headers | |
887badb3 RM |
20340 | #undef elf_backend_final_write_processing |
20341 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
20342 | #undef ELF_MINPAGESIZE | |
20343 | #define ELF_MINPAGESIZE 0x1000 | |
20344 | #undef ELF_COMMONPAGESIZE | |
20345 | #define ELF_COMMONPAGESIZE 0x1000 | |
20346 | ||
b38cadfb | 20347 | |
617a5ada CL |
20348 | /* FDPIC Targets. */ |
20349 | ||
20350 | #undef TARGET_LITTLE_SYM | |
20351 | #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec | |
20352 | #undef TARGET_LITTLE_NAME | |
20353 | #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic" | |
20354 | #undef TARGET_BIG_SYM | |
20355 | #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec | |
20356 | #undef TARGET_BIG_NAME | |
20357 | #define TARGET_BIG_NAME "elf32-bigarm-fdpic" | |
20358 | #undef elf_match_priority | |
20359 | #define elf_match_priority 128 | |
18a20338 CL |
20360 | #undef ELF_OSABI |
20361 | #define ELF_OSABI ELFOSABI_ARM_FDPIC | |
617a5ada CL |
20362 | |
20363 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20364 | appropriately for FDPIC. */ | |
20365 | ||
20366 | static struct bfd_link_hash_table * | |
20367 | elf32_arm_fdpic_link_hash_table_create (bfd *abfd) | |
20368 | { | |
20369 | struct bfd_link_hash_table *ret; | |
20370 | ||
20371 | ret = elf32_arm_link_hash_table_create (abfd); | |
20372 | if (ret) | |
20373 | { | |
20374 | struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret; | |
20375 | ||
20376 | htab->fdpic_p = 1; | |
20377 | } | |
20378 | return ret; | |
20379 | } | |
20380 | ||
e8b09b87 CL |
20381 | /* We need dynamic symbols for every section, since segments can |
20382 | relocate independently. */ | |
20383 | static bfd_boolean | |
20384 | elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED, | |
20385 | struct bfd_link_info *info | |
20386 | ATTRIBUTE_UNUSED, | |
20387 | asection *p ATTRIBUTE_UNUSED) | |
20388 | { | |
20389 | switch (elf_section_data (p)->this_hdr.sh_type) | |
20390 | { | |
20391 | case SHT_PROGBITS: | |
20392 | case SHT_NOBITS: | |
20393 | /* If sh_type is yet undecided, assume it could be | |
20394 | SHT_PROGBITS/SHT_NOBITS. */ | |
20395 | case SHT_NULL: | |
20396 | return FALSE; | |
20397 | ||
20398 | /* There shouldn't be section relative relocations | |
20399 | against any other section. */ | |
20400 | default: | |
20401 | return TRUE; | |
20402 | } | |
20403 | } | |
20404 | ||
617a5ada CL |
20405 | #undef elf32_bed |
20406 | #define elf32_bed elf32_arm_fdpic_bed | |
20407 | ||
20408 | #undef bfd_elf32_bfd_link_hash_table_create | |
20409 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create | |
20410 | ||
e8b09b87 CL |
20411 | #undef elf_backend_omit_section_dynsym |
20412 | #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym | |
20413 | ||
617a5ada | 20414 | #include "elf32-target.h" |
e8b09b87 | 20415 | |
617a5ada | 20416 | #undef elf_match_priority |
18a20338 | 20417 | #undef ELF_OSABI |
e8b09b87 | 20418 | #undef elf_backend_omit_section_dynsym |
617a5ada | 20419 | |
906e58ca | 20420 | /* VxWorks Targets. */ |
4e7fd91e | 20421 | |
07d6d2b8 AM |
20422 | #undef TARGET_LITTLE_SYM |
20423 | #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec | |
20424 | #undef TARGET_LITTLE_NAME | |
20425 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" | |
20426 | #undef TARGET_BIG_SYM | |
20427 | #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec | |
20428 | #undef TARGET_BIG_NAME | |
20429 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" | |
4e7fd91e PB |
20430 | |
20431 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20432 | appropriately for VxWorks. */ | |
906e58ca | 20433 | |
4e7fd91e PB |
20434 | static struct bfd_link_hash_table * |
20435 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
20436 | { | |
20437 | struct bfd_link_hash_table *ret; | |
20438 | ||
20439 | ret = elf32_arm_link_hash_table_create (abfd); | |
20440 | if (ret) | |
20441 | { | |
20442 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 20443 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e | 20444 | htab->use_rel = 0; |
00a97672 | 20445 | htab->vxworks_p = 1; |
4e7fd91e PB |
20446 | } |
20447 | return ret; | |
906e58ca | 20448 | } |
4e7fd91e | 20449 | |
00a97672 RS |
20450 | static void |
20451 | elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) | |
20452 | { | |
20453 | elf32_arm_final_write_processing (abfd, linker); | |
20454 | elf_vxworks_final_write_processing (abfd, linker); | |
20455 | } | |
20456 | ||
906e58ca | 20457 | #undef elf32_bed |
4e7fd91e PB |
20458 | #define elf32_bed elf32_arm_vxworks_bed |
20459 | ||
906e58ca NC |
20460 | #undef bfd_elf32_bfd_link_hash_table_create |
20461 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
906e58ca NC |
20462 | #undef elf_backend_final_write_processing |
20463 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
20464 | #undef elf_backend_emit_relocs | |
9eaff861 | 20465 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs |
4e7fd91e | 20466 | |
906e58ca | 20467 | #undef elf_backend_may_use_rel_p |
00a97672 | 20468 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 20469 | #undef elf_backend_may_use_rela_p |
00a97672 | 20470 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 20471 | #undef elf_backend_default_use_rela_p |
00a97672 | 20472 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 20473 | #undef elf_backend_want_plt_sym |
00a97672 | 20474 | #define elf_backend_want_plt_sym 1 |
906e58ca | 20475 | #undef ELF_MAXPAGESIZE |
00a97672 | 20476 | #define ELF_MAXPAGESIZE 0x1000 |
4e7fd91e PB |
20477 | |
20478 | #include "elf32-target.h" | |
20479 | ||
20480 | ||
21d799b5 NC |
20481 | /* Merge backend specific data from an object file to the output |
20482 | object file when linking. */ | |
20483 | ||
20484 | static bfd_boolean | |
50e03d47 | 20485 | elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) |
21d799b5 | 20486 | { |
50e03d47 | 20487 | bfd *obfd = info->output_bfd; |
21d799b5 NC |
20488 | flagword out_flags; |
20489 | flagword in_flags; | |
20490 | bfd_boolean flags_compatible = TRUE; | |
20491 | asection *sec; | |
20492 | ||
cc643b88 | 20493 | /* Check if we have the same endianness. */ |
50e03d47 | 20494 | if (! _bfd_generic_verify_endian_match (ibfd, info)) |
21d799b5 NC |
20495 | return FALSE; |
20496 | ||
20497 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
20498 | return TRUE; | |
20499 | ||
50e03d47 | 20500 | if (!elf32_arm_merge_eabi_attributes (ibfd, info)) |
21d799b5 NC |
20501 | return FALSE; |
20502 | ||
20503 | /* The input BFD must have had its flags initialised. */ | |
20504 | /* The following seems bogus to me -- The flags are initialized in | |
20505 | the assembler but I don't think an elf_flags_init field is | |
20506 | written into the object. */ | |
20507 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
20508 | ||
20509 | in_flags = elf_elfheader (ibfd)->e_flags; | |
20510 | out_flags = elf_elfheader (obfd)->e_flags; | |
20511 | ||
20512 | /* In theory there is no reason why we couldn't handle this. However | |
20513 | in practice it isn't even close to working and there is no real | |
20514 | reason to want it. */ | |
20515 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
20516 | && !(ibfd->flags & DYNAMIC) | |
20517 | && (in_flags & EF_ARM_BE8)) | |
20518 | { | |
871b3ab2 | 20519 | _bfd_error_handler (_("error: %pB is already in final BE8 format"), |
21d799b5 NC |
20520 | ibfd); |
20521 | return FALSE; | |
20522 | } | |
20523 | ||
20524 | if (!elf_flags_init (obfd)) | |
20525 | { | |
20526 | /* If the input is the default architecture and had the default | |
20527 | flags then do not bother setting the flags for the output | |
20528 | architecture, instead allow future merges to do this. If no | |
20529 | future merges ever set these flags then they will retain their | |
99059e56 RM |
20530 | uninitialised values, which surprise surprise, correspond |
20531 | to the default values. */ | |
21d799b5 NC |
20532 | if (bfd_get_arch_info (ibfd)->the_default |
20533 | && elf_elfheader (ibfd)->e_flags == 0) | |
20534 | return TRUE; | |
20535 | ||
20536 | elf_flags_init (obfd) = TRUE; | |
20537 | elf_elfheader (obfd)->e_flags = in_flags; | |
20538 | ||
20539 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
20540 | && bfd_get_arch_info (obfd)->the_default) | |
20541 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
20542 | ||
20543 | return TRUE; | |
20544 | } | |
20545 | ||
20546 | /* Determine what should happen if the input ARM architecture | |
20547 | does not match the output ARM architecture. */ | |
20548 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
20549 | return FALSE; | |
20550 | ||
20551 | /* Identical flags must be compatible. */ | |
20552 | if (in_flags == out_flags) | |
20553 | return TRUE; | |
20554 | ||
20555 | /* Check to see if the input BFD actually contains any sections. If | |
20556 | not, its flags may not have been initialised either, but it | |
20557 | cannot actually cause any incompatiblity. Do not short-circuit | |
20558 | dynamic objects; their section list may be emptied by | |
20559 | elf_link_add_object_symbols. | |
20560 | ||
20561 | Also check to see if there are no code sections in the input. | |
20562 | In this case there is no need to check for code specific flags. | |
20563 | XXX - do we need to worry about floating-point format compatability | |
20564 | in data sections ? */ | |
20565 | if (!(ibfd->flags & DYNAMIC)) | |
20566 | { | |
20567 | bfd_boolean null_input_bfd = TRUE; | |
20568 | bfd_boolean only_data_sections = TRUE; | |
20569 | ||
20570 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
20571 | { | |
20572 | /* Ignore synthetic glue sections. */ | |
20573 | if (strcmp (sec->name, ".glue_7") | |
20574 | && strcmp (sec->name, ".glue_7t")) | |
20575 | { | |
20576 | if ((bfd_get_section_flags (ibfd, sec) | |
20577 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
20578 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
99059e56 | 20579 | only_data_sections = FALSE; |
21d799b5 NC |
20580 | |
20581 | null_input_bfd = FALSE; | |
20582 | break; | |
20583 | } | |
20584 | } | |
20585 | ||
20586 | if (null_input_bfd || only_data_sections) | |
20587 | return TRUE; | |
20588 | } | |
20589 | ||
20590 | /* Complain about various flag mismatches. */ | |
20591 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
20592 | EF_ARM_EABI_VERSION (out_flags))) | |
20593 | { | |
20594 | _bfd_error_handler | |
90b6238f | 20595 | (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"), |
c08bb8dd AM |
20596 | ibfd, (in_flags & EF_ARM_EABIMASK) >> 24, |
20597 | obfd, (out_flags & EF_ARM_EABIMASK) >> 24); | |
21d799b5 NC |
20598 | return FALSE; |
20599 | } | |
20600 | ||
20601 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
20602 | /* VxWorks libraries do not use these flags. */ | |
20603 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
20604 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
20605 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
20606 | { | |
20607 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
20608 | { | |
20609 | _bfd_error_handler | |
871b3ab2 | 20610 | (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"), |
c08bb8dd AM |
20611 | ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32, |
20612 | obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
21d799b5 NC |
20613 | flags_compatible = FALSE; |
20614 | } | |
20615 | ||
20616 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
20617 | { | |
20618 | if (in_flags & EF_ARM_APCS_FLOAT) | |
20619 | _bfd_error_handler | |
871b3ab2 | 20620 | (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"), |
21d799b5 NC |
20621 | ibfd, obfd); |
20622 | else | |
20623 | _bfd_error_handler | |
871b3ab2 | 20624 | (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"), |
21d799b5 NC |
20625 | ibfd, obfd); |
20626 | ||
20627 | flags_compatible = FALSE; | |
20628 | } | |
20629 | ||
20630 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
20631 | { | |
20632 | if (in_flags & EF_ARM_VFP_FLOAT) | |
20633 | _bfd_error_handler | |
90b6238f AM |
20634 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
20635 | ibfd, "VFP", obfd); | |
21d799b5 NC |
20636 | else |
20637 | _bfd_error_handler | |
90b6238f AM |
20638 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
20639 | ibfd, "FPA", obfd); | |
21d799b5 NC |
20640 | |
20641 | flags_compatible = FALSE; | |
20642 | } | |
20643 | ||
20644 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
20645 | { | |
20646 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
20647 | _bfd_error_handler | |
90b6238f AM |
20648 | (_("error: %pB uses %s instructions, whereas %pB does not"), |
20649 | ibfd, "Maverick", obfd); | |
21d799b5 NC |
20650 | else |
20651 | _bfd_error_handler | |
90b6238f AM |
20652 | (_("error: %pB does not use %s instructions, whereas %pB does"), |
20653 | ibfd, "Maverick", obfd); | |
21d799b5 NC |
20654 | |
20655 | flags_compatible = FALSE; | |
20656 | } | |
20657 | ||
20658 | #ifdef EF_ARM_SOFT_FLOAT | |
20659 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
20660 | { | |
20661 | /* We can allow interworking between code that is VFP format | |
20662 | layout, and uses either soft float or integer regs for | |
20663 | passing floating point arguments and results. We already | |
20664 | know that the APCS_FLOAT flags match; similarly for VFP | |
20665 | flags. */ | |
20666 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
20667 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
20668 | { | |
20669 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
20670 | _bfd_error_handler | |
871b3ab2 | 20671 | (_("error: %pB uses software FP, whereas %pB uses hardware FP"), |
21d799b5 NC |
20672 | ibfd, obfd); |
20673 | else | |
20674 | _bfd_error_handler | |
871b3ab2 | 20675 | (_("error: %pB uses hardware FP, whereas %pB uses software FP"), |
21d799b5 NC |
20676 | ibfd, obfd); |
20677 | ||
20678 | flags_compatible = FALSE; | |
20679 | } | |
20680 | } | |
20681 | #endif | |
20682 | ||
20683 | /* Interworking mismatch is only a warning. */ | |
20684 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
20685 | { | |
20686 | if (in_flags & EF_ARM_INTERWORK) | |
20687 | { | |
20688 | _bfd_error_handler | |
90b6238f | 20689 | (_("warning: %pB supports interworking, whereas %pB does not"), |
21d799b5 NC |
20690 | ibfd, obfd); |
20691 | } | |
20692 | else | |
20693 | { | |
20694 | _bfd_error_handler | |
90b6238f | 20695 | (_("warning: %pB does not support interworking, whereas %pB does"), |
21d799b5 NC |
20696 | ibfd, obfd); |
20697 | } | |
20698 | } | |
20699 | } | |
20700 | ||
20701 | return flags_compatible; | |
20702 | } | |
20703 | ||
20704 | ||
906e58ca | 20705 | /* Symbian OS Targets. */ |
7f266840 | 20706 | |
07d6d2b8 AM |
20707 | #undef TARGET_LITTLE_SYM |
20708 | #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec | |
20709 | #undef TARGET_LITTLE_NAME | |
20710 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" | |
20711 | #undef TARGET_BIG_SYM | |
20712 | #define TARGET_BIG_SYM arm_elf32_symbian_be_vec | |
20713 | #undef TARGET_BIG_NAME | |
20714 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" | |
7f266840 DJ |
20715 | |
20716 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
20717 | appropriately for Symbian OS. */ | |
906e58ca | 20718 | |
7f266840 DJ |
20719 | static struct bfd_link_hash_table * |
20720 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) | |
20721 | { | |
20722 | struct bfd_link_hash_table *ret; | |
20723 | ||
20724 | ret = elf32_arm_link_hash_table_create (abfd); | |
20725 | if (ret) | |
20726 | { | |
20727 | struct elf32_arm_link_hash_table *htab | |
20728 | = (struct elf32_arm_link_hash_table *)ret; | |
20729 | /* There is no PLT header for Symbian OS. */ | |
20730 | htab->plt_header_size = 0; | |
95720a86 DJ |
20731 | /* The PLT entries are each one instruction and one word. */ |
20732 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); | |
7f266840 | 20733 | htab->symbian_p = 1; |
33bfe774 JB |
20734 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
20735 | htab->use_blx = 1; | |
67687978 | 20736 | htab->root.is_relocatable_executable = 1; |
7f266840 DJ |
20737 | } |
20738 | return ret; | |
906e58ca | 20739 | } |
7f266840 | 20740 | |
b35d266b | 20741 | static const struct bfd_elf_special_section |
551b43fd | 20742 | elf32_arm_symbian_special_sections[] = |
7f266840 | 20743 | { |
5cd3778d MM |
20744 | /* In a BPABI executable, the dynamic linking sections do not go in |
20745 | the loadable read-only segment. The post-linker may wish to | |
20746 | refer to these sections, but they are not part of the final | |
20747 | program image. */ | |
07d6d2b8 AM |
20748 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
20749 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, | |
20750 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, | |
20751 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, | |
20752 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, | |
5cd3778d MM |
20753 | /* These sections do not need to be writable as the SymbianOS |
20754 | postlinker will arrange things so that no dynamic relocation is | |
20755 | required. */ | |
07d6d2b8 AM |
20756 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
20757 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, | |
0112cd26 | 20758 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, |
07d6d2b8 | 20759 | { NULL, 0, 0, 0, 0 } |
7f266840 DJ |
20760 | }; |
20761 | ||
c3c76620 | 20762 | static void |
906e58ca | 20763 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
a4fd1a8e | 20764 | struct bfd_link_info *link_info) |
c3c76620 MM |
20765 | { |
20766 | /* BPABI objects are never loaded directly by an OS kernel; they are | |
20767 | processed by a postlinker first, into an OS-specific format. If | |
20768 | the D_PAGED bit is set on the file, BFD will align segments on | |
20769 | page boundaries, so that an OS can directly map the file. With | |
20770 | BPABI objects, that just results in wasted space. In addition, | |
20771 | because we clear the D_PAGED bit, map_sections_to_segments will | |
20772 | recognize that the program headers should not be mapped into any | |
20773 | loadable segment. */ | |
20774 | abfd->flags &= ~D_PAGED; | |
906e58ca | 20775 | elf32_arm_begin_write_processing (abfd, link_info); |
c3c76620 | 20776 | } |
7f266840 DJ |
20777 | |
20778 | static bfd_boolean | |
906e58ca | 20779 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
b294bdf8 | 20780 | struct bfd_link_info *info) |
7f266840 DJ |
20781 | { |
20782 | struct elf_segment_map *m; | |
20783 | asection *dynsec; | |
20784 | ||
7f266840 DJ |
20785 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
20786 | segment. However, because the .dynamic section is not marked | |
20787 | with SEC_LOAD, the generic ELF code will not create such a | |
20788 | segment. */ | |
20789 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); | |
20790 | if (dynsec) | |
20791 | { | |
12bd6957 | 20792 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
8ded5a0f AM |
20793 | if (m->p_type == PT_DYNAMIC) |
20794 | break; | |
20795 | ||
20796 | if (m == NULL) | |
20797 | { | |
20798 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); | |
12bd6957 AM |
20799 | m->next = elf_seg_map (abfd); |
20800 | elf_seg_map (abfd) = m; | |
8ded5a0f | 20801 | } |
7f266840 DJ |
20802 | } |
20803 | ||
b294bdf8 MM |
20804 | /* Also call the generic arm routine. */ |
20805 | return elf32_arm_modify_segment_map (abfd, info); | |
7f266840 DJ |
20806 | } |
20807 | ||
95720a86 DJ |
20808 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
20809 | or (bfd_vma) -1 if it should not be included. */ | |
20810 | ||
20811 | static bfd_vma | |
20812 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, | |
20813 | const arelent *rel ATTRIBUTE_UNUSED) | |
20814 | { | |
20815 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; | |
20816 | } | |
20817 | ||
8029a119 | 20818 | #undef elf32_bed |
7f266840 DJ |
20819 | #define elf32_bed elf32_arm_symbian_bed |
20820 | ||
20821 | /* The dynamic sections are not allocated on SymbianOS; the postlinker | |
20822 | will process them and then discard them. */ | |
906e58ca | 20823 | #undef ELF_DYNAMIC_SEC_FLAGS |
7f266840 DJ |
20824 | #define ELF_DYNAMIC_SEC_FLAGS \ |
20825 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) | |
20826 | ||
9eaff861 | 20827 | #undef elf_backend_emit_relocs |
c3c76620 | 20828 | |
906e58ca NC |
20829 | #undef bfd_elf32_bfd_link_hash_table_create |
20830 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create | |
20831 | #undef elf_backend_special_sections | |
07d6d2b8 | 20832 | #define elf_backend_special_sections elf32_arm_symbian_special_sections |
906e58ca NC |
20833 | #undef elf_backend_begin_write_processing |
20834 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing | |
20835 | #undef elf_backend_final_write_processing | |
20836 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
20837 | ||
20838 | #undef elf_backend_modify_segment_map | |
7f266840 DJ |
20839 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
20840 | ||
20841 | /* There is no .got section for BPABI objects, and hence no header. */ | |
906e58ca | 20842 | #undef elf_backend_got_header_size |
7f266840 DJ |
20843 | #define elf_backend_got_header_size 0 |
20844 | ||
20845 | /* Similarly, there is no .got.plt section. */ | |
906e58ca | 20846 | #undef elf_backend_want_got_plt |
7f266840 DJ |
20847 | #define elf_backend_want_got_plt 0 |
20848 | ||
906e58ca | 20849 | #undef elf_backend_plt_sym_val |
95720a86 DJ |
20850 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
20851 | ||
906e58ca | 20852 | #undef elf_backend_may_use_rel_p |
00a97672 | 20853 | #define elf_backend_may_use_rel_p 1 |
906e58ca | 20854 | #undef elf_backend_may_use_rela_p |
00a97672 | 20855 | #define elf_backend_may_use_rela_p 0 |
906e58ca | 20856 | #undef elf_backend_default_use_rela_p |
00a97672 | 20857 | #define elf_backend_default_use_rela_p 0 |
906e58ca | 20858 | #undef elf_backend_want_plt_sym |
00a97672 | 20859 | #define elf_backend_want_plt_sym 0 |
64f52338 AM |
20860 | #undef elf_backend_dtrel_excludes_plt |
20861 | #define elf_backend_dtrel_excludes_plt 0 | |
906e58ca | 20862 | #undef ELF_MAXPAGESIZE |
00a97672 | 20863 | #define ELF_MAXPAGESIZE 0x8000 |
4e7fd91e | 20864 | |
7f266840 | 20865 | #include "elf32-target.h" |