Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* 32-bit ELF support for ARM |
e44a2c9c | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
e6a6bb22 | 3 | 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 9 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
252b5132 | 21 | |
6e6718a3 | 22 | #include "sysdep.h" |
2468f9c9 PB |
23 | #include <limits.h> |
24 | ||
3db64b00 | 25 | #include "bfd.h" |
00a97672 | 26 | #include "libiberty.h" |
7f266840 DJ |
27 | #include "libbfd.h" |
28 | #include "elf-bfd.h" | |
00a97672 | 29 | #include "elf-vxworks.h" |
ee065d83 | 30 | #include "elf/arm.h" |
7f266840 | 31 | |
00a97672 RS |
32 | /* Return the relocation section associated with NAME. HTAB is the |
33 | bfd's elf32_arm_link_hash_entry. */ | |
34 | #define RELOC_SECTION(HTAB, NAME) \ | |
35 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
36 | ||
37 | /* Return size of a relocation entry. HTAB is the bfd's | |
38 | elf32_arm_link_hash_entry. */ | |
39 | #define RELOC_SIZE(HTAB) \ | |
40 | ((HTAB)->use_rel \ | |
41 | ? sizeof (Elf32_External_Rel) \ | |
42 | : sizeof (Elf32_External_Rela)) | |
43 | ||
44 | /* Return function to swap relocations in. HTAB is the bfd's | |
45 | elf32_arm_link_hash_entry. */ | |
46 | #define SWAP_RELOC_IN(HTAB) \ | |
47 | ((HTAB)->use_rel \ | |
48 | ? bfd_elf32_swap_reloc_in \ | |
49 | : bfd_elf32_swap_reloca_in) | |
50 | ||
51 | /* Return function to swap relocations out. HTAB is the bfd's | |
52 | elf32_arm_link_hash_entry. */ | |
53 | #define SWAP_RELOC_OUT(HTAB) \ | |
54 | ((HTAB)->use_rel \ | |
55 | ? bfd_elf32_swap_reloc_out \ | |
56 | : bfd_elf32_swap_reloca_out) | |
57 | ||
7f266840 DJ |
58 | #define elf_info_to_howto 0 |
59 | #define elf_info_to_howto_rel elf32_arm_info_to_howto | |
60 | ||
61 | #define ARM_ELF_ABI_VERSION 0 | |
62 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
63 | ||
3e6b1042 DJ |
64 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
65 | struct bfd_link_info *link_info, | |
66 | asection *sec, | |
67 | bfd_byte *contents); | |
68 | ||
7f266840 DJ |
69 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
70 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
71 | in that slot. */ | |
72 | ||
c19d1205 | 73 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 74 | { |
8029a119 | 75 | /* No relocation. */ |
7f266840 DJ |
76 | HOWTO (R_ARM_NONE, /* type */ |
77 | 0, /* rightshift */ | |
78 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
79 | 0, /* bitsize */ | |
80 | FALSE, /* pc_relative */ | |
81 | 0, /* bitpos */ | |
82 | complain_overflow_dont,/* complain_on_overflow */ | |
83 | bfd_elf_generic_reloc, /* special_function */ | |
84 | "R_ARM_NONE", /* name */ | |
85 | FALSE, /* partial_inplace */ | |
86 | 0, /* src_mask */ | |
87 | 0, /* dst_mask */ | |
88 | FALSE), /* pcrel_offset */ | |
89 | ||
90 | HOWTO (R_ARM_PC24, /* type */ | |
91 | 2, /* rightshift */ | |
92 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
93 | 24, /* bitsize */ | |
94 | TRUE, /* pc_relative */ | |
95 | 0, /* bitpos */ | |
96 | complain_overflow_signed,/* complain_on_overflow */ | |
97 | bfd_elf_generic_reloc, /* special_function */ | |
98 | "R_ARM_PC24", /* name */ | |
99 | FALSE, /* partial_inplace */ | |
100 | 0x00ffffff, /* src_mask */ | |
101 | 0x00ffffff, /* dst_mask */ | |
102 | TRUE), /* pcrel_offset */ | |
103 | ||
104 | /* 32 bit absolute */ | |
105 | HOWTO (R_ARM_ABS32, /* type */ | |
106 | 0, /* rightshift */ | |
107 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
108 | 32, /* bitsize */ | |
109 | FALSE, /* pc_relative */ | |
110 | 0, /* bitpos */ | |
111 | complain_overflow_bitfield,/* complain_on_overflow */ | |
112 | bfd_elf_generic_reloc, /* special_function */ | |
113 | "R_ARM_ABS32", /* name */ | |
114 | FALSE, /* partial_inplace */ | |
115 | 0xffffffff, /* src_mask */ | |
116 | 0xffffffff, /* dst_mask */ | |
117 | FALSE), /* pcrel_offset */ | |
118 | ||
119 | /* standard 32bit pc-relative reloc */ | |
120 | HOWTO (R_ARM_REL32, /* type */ | |
121 | 0, /* rightshift */ | |
122 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
123 | 32, /* bitsize */ | |
124 | TRUE, /* pc_relative */ | |
125 | 0, /* bitpos */ | |
126 | complain_overflow_bitfield,/* complain_on_overflow */ | |
127 | bfd_elf_generic_reloc, /* special_function */ | |
128 | "R_ARM_REL32", /* name */ | |
129 | FALSE, /* partial_inplace */ | |
130 | 0xffffffff, /* src_mask */ | |
131 | 0xffffffff, /* dst_mask */ | |
132 | TRUE), /* pcrel_offset */ | |
133 | ||
c19d1205 | 134 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 135 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 DJ |
136 | 0, /* rightshift */ |
137 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
4962c51a MS |
138 | 32, /* bitsize */ |
139 | TRUE, /* pc_relative */ | |
7f266840 | 140 | 0, /* bitpos */ |
4962c51a | 141 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 142 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 143 | "R_ARM_LDR_PC_G0", /* name */ |
7f266840 | 144 | FALSE, /* partial_inplace */ |
4962c51a MS |
145 | 0xffffffff, /* src_mask */ |
146 | 0xffffffff, /* dst_mask */ | |
147 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
148 | |
149 | /* 16 bit absolute */ | |
150 | HOWTO (R_ARM_ABS16, /* type */ | |
151 | 0, /* rightshift */ | |
152 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
153 | 16, /* bitsize */ | |
154 | FALSE, /* pc_relative */ | |
155 | 0, /* bitpos */ | |
156 | complain_overflow_bitfield,/* complain_on_overflow */ | |
157 | bfd_elf_generic_reloc, /* special_function */ | |
158 | "R_ARM_ABS16", /* name */ | |
159 | FALSE, /* partial_inplace */ | |
160 | 0x0000ffff, /* src_mask */ | |
161 | 0x0000ffff, /* dst_mask */ | |
162 | FALSE), /* pcrel_offset */ | |
163 | ||
164 | /* 12 bit absolute */ | |
165 | HOWTO (R_ARM_ABS12, /* type */ | |
166 | 0, /* rightshift */ | |
167 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
168 | 12, /* bitsize */ | |
169 | FALSE, /* pc_relative */ | |
170 | 0, /* bitpos */ | |
171 | complain_overflow_bitfield,/* complain_on_overflow */ | |
172 | bfd_elf_generic_reloc, /* special_function */ | |
173 | "R_ARM_ABS12", /* name */ | |
174 | FALSE, /* partial_inplace */ | |
00a97672 RS |
175 | 0x00000fff, /* src_mask */ |
176 | 0x00000fff, /* dst_mask */ | |
7f266840 DJ |
177 | FALSE), /* pcrel_offset */ |
178 | ||
179 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
180 | 6, /* rightshift */ | |
181 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
182 | 5, /* bitsize */ | |
183 | FALSE, /* pc_relative */ | |
184 | 0, /* bitpos */ | |
185 | complain_overflow_bitfield,/* complain_on_overflow */ | |
186 | bfd_elf_generic_reloc, /* special_function */ | |
187 | "R_ARM_THM_ABS5", /* name */ | |
188 | FALSE, /* partial_inplace */ | |
189 | 0x000007e0, /* src_mask */ | |
190 | 0x000007e0, /* dst_mask */ | |
191 | FALSE), /* pcrel_offset */ | |
192 | ||
193 | /* 8 bit absolute */ | |
194 | HOWTO (R_ARM_ABS8, /* type */ | |
195 | 0, /* rightshift */ | |
196 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
197 | 8, /* bitsize */ | |
198 | FALSE, /* pc_relative */ | |
199 | 0, /* bitpos */ | |
200 | complain_overflow_bitfield,/* complain_on_overflow */ | |
201 | bfd_elf_generic_reloc, /* special_function */ | |
202 | "R_ARM_ABS8", /* name */ | |
203 | FALSE, /* partial_inplace */ | |
204 | 0x000000ff, /* src_mask */ | |
205 | 0x000000ff, /* dst_mask */ | |
206 | FALSE), /* pcrel_offset */ | |
207 | ||
208 | HOWTO (R_ARM_SBREL32, /* type */ | |
209 | 0, /* rightshift */ | |
210 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
211 | 32, /* bitsize */ | |
212 | FALSE, /* pc_relative */ | |
213 | 0, /* bitpos */ | |
214 | complain_overflow_dont,/* complain_on_overflow */ | |
215 | bfd_elf_generic_reloc, /* special_function */ | |
216 | "R_ARM_SBREL32", /* name */ | |
217 | FALSE, /* partial_inplace */ | |
218 | 0xffffffff, /* src_mask */ | |
219 | 0xffffffff, /* dst_mask */ | |
220 | FALSE), /* pcrel_offset */ | |
221 | ||
c19d1205 | 222 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 DJ |
223 | 1, /* rightshift */ |
224 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
f6ebfac0 | 225 | 24, /* bitsize */ |
7f266840 DJ |
226 | TRUE, /* pc_relative */ |
227 | 0, /* bitpos */ | |
228 | complain_overflow_signed,/* complain_on_overflow */ | |
229 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 230 | "R_ARM_THM_CALL", /* name */ |
7f266840 DJ |
231 | FALSE, /* partial_inplace */ |
232 | 0x07ff07ff, /* src_mask */ | |
233 | 0x07ff07ff, /* dst_mask */ | |
234 | TRUE), /* pcrel_offset */ | |
235 | ||
236 | HOWTO (R_ARM_THM_PC8, /* type */ | |
237 | 1, /* rightshift */ | |
238 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
239 | 8, /* bitsize */ | |
240 | TRUE, /* pc_relative */ | |
241 | 0, /* bitpos */ | |
242 | complain_overflow_signed,/* complain_on_overflow */ | |
243 | bfd_elf_generic_reloc, /* special_function */ | |
244 | "R_ARM_THM_PC8", /* name */ | |
245 | FALSE, /* partial_inplace */ | |
246 | 0x000000ff, /* src_mask */ | |
247 | 0x000000ff, /* dst_mask */ | |
248 | TRUE), /* pcrel_offset */ | |
249 | ||
c19d1205 | 250 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 DJ |
251 | 1, /* rightshift */ |
252 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
253 | 32, /* bitsize */ |
254 | FALSE, /* pc_relative */ | |
7f266840 DJ |
255 | 0, /* bitpos */ |
256 | complain_overflow_signed,/* complain_on_overflow */ | |
257 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 258 | "R_ARM_BREL_ADJ", /* name */ |
7f266840 | 259 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
260 | 0xffffffff, /* src_mask */ |
261 | 0xffffffff, /* dst_mask */ | |
262 | FALSE), /* pcrel_offset */ | |
7f266840 | 263 | |
0855e32b | 264 | HOWTO (R_ARM_TLS_DESC, /* type */ |
7f266840 | 265 | 0, /* rightshift */ |
0855e32b NS |
266 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
267 | 32, /* bitsize */ | |
7f266840 DJ |
268 | FALSE, /* pc_relative */ |
269 | 0, /* bitpos */ | |
0855e32b | 270 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 271 | bfd_elf_generic_reloc, /* special_function */ |
0855e32b | 272 | "R_ARM_TLS_DESC", /* name */ |
7f266840 | 273 | FALSE, /* partial_inplace */ |
0855e32b NS |
274 | 0xffffffff, /* src_mask */ |
275 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
276 | FALSE), /* pcrel_offset */ |
277 | ||
278 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
279 | 0, /* rightshift */ | |
280 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
281 | 0, /* bitsize */ | |
282 | FALSE, /* pc_relative */ | |
283 | 0, /* bitpos */ | |
284 | complain_overflow_signed,/* complain_on_overflow */ | |
285 | bfd_elf_generic_reloc, /* special_function */ | |
286 | "R_ARM_SWI8", /* name */ | |
287 | FALSE, /* partial_inplace */ | |
288 | 0x00000000, /* src_mask */ | |
289 | 0x00000000, /* dst_mask */ | |
290 | FALSE), /* pcrel_offset */ | |
291 | ||
292 | /* BLX instruction for the ARM. */ | |
293 | HOWTO (R_ARM_XPC25, /* type */ | |
294 | 2, /* rightshift */ | |
295 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
296 | 25, /* bitsize */ | |
297 | TRUE, /* pc_relative */ | |
298 | 0, /* bitpos */ | |
299 | complain_overflow_signed,/* complain_on_overflow */ | |
300 | bfd_elf_generic_reloc, /* special_function */ | |
301 | "R_ARM_XPC25", /* name */ | |
302 | FALSE, /* partial_inplace */ | |
303 | 0x00ffffff, /* src_mask */ | |
304 | 0x00ffffff, /* dst_mask */ | |
305 | TRUE), /* pcrel_offset */ | |
306 | ||
307 | /* BLX instruction for the Thumb. */ | |
308 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
309 | 2, /* rightshift */ | |
310 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
311 | 22, /* bitsize */ | |
312 | TRUE, /* pc_relative */ | |
313 | 0, /* bitpos */ | |
314 | complain_overflow_signed,/* complain_on_overflow */ | |
315 | bfd_elf_generic_reloc, /* special_function */ | |
316 | "R_ARM_THM_XPC22", /* name */ | |
317 | FALSE, /* partial_inplace */ | |
318 | 0x07ff07ff, /* src_mask */ | |
319 | 0x07ff07ff, /* dst_mask */ | |
320 | TRUE), /* pcrel_offset */ | |
321 | ||
ba93b8ac | 322 | /* Dynamic TLS relocations. */ |
7f266840 | 323 | |
ba93b8ac DJ |
324 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
325 | 0, /* rightshift */ | |
326 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
327 | 32, /* bitsize */ | |
328 | FALSE, /* pc_relative */ | |
329 | 0, /* bitpos */ | |
330 | complain_overflow_bitfield,/* complain_on_overflow */ | |
331 | bfd_elf_generic_reloc, /* special_function */ | |
332 | "R_ARM_TLS_DTPMOD32", /* name */ | |
333 | TRUE, /* partial_inplace */ | |
334 | 0xffffffff, /* src_mask */ | |
335 | 0xffffffff, /* dst_mask */ | |
336 | FALSE), /* pcrel_offset */ | |
7f266840 | 337 | |
ba93b8ac DJ |
338 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
339 | 0, /* rightshift */ | |
340 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
341 | 32, /* bitsize */ | |
342 | FALSE, /* pc_relative */ | |
343 | 0, /* bitpos */ | |
344 | complain_overflow_bitfield,/* complain_on_overflow */ | |
345 | bfd_elf_generic_reloc, /* special_function */ | |
346 | "R_ARM_TLS_DTPOFF32", /* name */ | |
347 | TRUE, /* partial_inplace */ | |
348 | 0xffffffff, /* src_mask */ | |
349 | 0xffffffff, /* dst_mask */ | |
350 | FALSE), /* pcrel_offset */ | |
7f266840 | 351 | |
ba93b8ac DJ |
352 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
353 | 0, /* rightshift */ | |
354 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
355 | 32, /* bitsize */ | |
356 | FALSE, /* pc_relative */ | |
357 | 0, /* bitpos */ | |
358 | complain_overflow_bitfield,/* complain_on_overflow */ | |
359 | bfd_elf_generic_reloc, /* special_function */ | |
360 | "R_ARM_TLS_TPOFF32", /* name */ | |
361 | TRUE, /* partial_inplace */ | |
362 | 0xffffffff, /* src_mask */ | |
363 | 0xffffffff, /* dst_mask */ | |
364 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
365 | |
366 | /* Relocs used in ARM Linux */ | |
367 | ||
368 | HOWTO (R_ARM_COPY, /* type */ | |
369 | 0, /* rightshift */ | |
370 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
371 | 32, /* bitsize */ | |
372 | FALSE, /* pc_relative */ | |
373 | 0, /* bitpos */ | |
374 | complain_overflow_bitfield,/* complain_on_overflow */ | |
375 | bfd_elf_generic_reloc, /* special_function */ | |
376 | "R_ARM_COPY", /* name */ | |
377 | TRUE, /* partial_inplace */ | |
378 | 0xffffffff, /* src_mask */ | |
379 | 0xffffffff, /* dst_mask */ | |
380 | FALSE), /* pcrel_offset */ | |
381 | ||
382 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
383 | 0, /* rightshift */ | |
384 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
385 | 32, /* bitsize */ | |
386 | FALSE, /* pc_relative */ | |
387 | 0, /* bitpos */ | |
388 | complain_overflow_bitfield,/* complain_on_overflow */ | |
389 | bfd_elf_generic_reloc, /* special_function */ | |
390 | "R_ARM_GLOB_DAT", /* name */ | |
391 | TRUE, /* partial_inplace */ | |
392 | 0xffffffff, /* src_mask */ | |
393 | 0xffffffff, /* dst_mask */ | |
394 | FALSE), /* pcrel_offset */ | |
395 | ||
396 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
397 | 0, /* rightshift */ | |
398 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
399 | 32, /* bitsize */ | |
400 | FALSE, /* pc_relative */ | |
401 | 0, /* bitpos */ | |
402 | complain_overflow_bitfield,/* complain_on_overflow */ | |
403 | bfd_elf_generic_reloc, /* special_function */ | |
404 | "R_ARM_JUMP_SLOT", /* name */ | |
405 | TRUE, /* partial_inplace */ | |
406 | 0xffffffff, /* src_mask */ | |
407 | 0xffffffff, /* dst_mask */ | |
408 | FALSE), /* pcrel_offset */ | |
409 | ||
410 | HOWTO (R_ARM_RELATIVE, /* type */ | |
411 | 0, /* rightshift */ | |
412 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
413 | 32, /* bitsize */ | |
414 | FALSE, /* pc_relative */ | |
415 | 0, /* bitpos */ | |
416 | complain_overflow_bitfield,/* complain_on_overflow */ | |
417 | bfd_elf_generic_reloc, /* special_function */ | |
418 | "R_ARM_RELATIVE", /* name */ | |
419 | TRUE, /* partial_inplace */ | |
420 | 0xffffffff, /* src_mask */ | |
421 | 0xffffffff, /* dst_mask */ | |
422 | FALSE), /* pcrel_offset */ | |
423 | ||
c19d1205 | 424 | HOWTO (R_ARM_GOTOFF32, /* type */ |
7f266840 DJ |
425 | 0, /* rightshift */ |
426 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
427 | 32, /* bitsize */ | |
428 | FALSE, /* pc_relative */ | |
429 | 0, /* bitpos */ | |
430 | complain_overflow_bitfield,/* complain_on_overflow */ | |
431 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 432 | "R_ARM_GOTOFF32", /* name */ |
7f266840 DJ |
433 | TRUE, /* partial_inplace */ |
434 | 0xffffffff, /* src_mask */ | |
435 | 0xffffffff, /* dst_mask */ | |
436 | FALSE), /* pcrel_offset */ | |
437 | ||
438 | HOWTO (R_ARM_GOTPC, /* type */ | |
439 | 0, /* rightshift */ | |
440 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
441 | 32, /* bitsize */ | |
442 | TRUE, /* pc_relative */ | |
443 | 0, /* bitpos */ | |
444 | complain_overflow_bitfield,/* complain_on_overflow */ | |
445 | bfd_elf_generic_reloc, /* special_function */ | |
446 | "R_ARM_GOTPC", /* name */ | |
447 | TRUE, /* partial_inplace */ | |
448 | 0xffffffff, /* src_mask */ | |
449 | 0xffffffff, /* dst_mask */ | |
450 | TRUE), /* pcrel_offset */ | |
451 | ||
452 | HOWTO (R_ARM_GOT32, /* type */ | |
453 | 0, /* rightshift */ | |
454 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
455 | 32, /* bitsize */ | |
456 | FALSE, /* pc_relative */ | |
457 | 0, /* bitpos */ | |
458 | complain_overflow_bitfield,/* complain_on_overflow */ | |
459 | bfd_elf_generic_reloc, /* special_function */ | |
460 | "R_ARM_GOT32", /* name */ | |
461 | TRUE, /* partial_inplace */ | |
462 | 0xffffffff, /* src_mask */ | |
463 | 0xffffffff, /* dst_mask */ | |
464 | FALSE), /* pcrel_offset */ | |
465 | ||
466 | HOWTO (R_ARM_PLT32, /* type */ | |
467 | 2, /* rightshift */ | |
468 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
ce490eda | 469 | 24, /* bitsize */ |
7f266840 DJ |
470 | TRUE, /* pc_relative */ |
471 | 0, /* bitpos */ | |
472 | complain_overflow_bitfield,/* complain_on_overflow */ | |
473 | bfd_elf_generic_reloc, /* special_function */ | |
474 | "R_ARM_PLT32", /* name */ | |
ce490eda | 475 | FALSE, /* partial_inplace */ |
7f266840 DJ |
476 | 0x00ffffff, /* src_mask */ |
477 | 0x00ffffff, /* dst_mask */ | |
478 | TRUE), /* pcrel_offset */ | |
479 | ||
480 | HOWTO (R_ARM_CALL, /* type */ | |
481 | 2, /* rightshift */ | |
482 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
483 | 24, /* bitsize */ | |
484 | TRUE, /* pc_relative */ | |
485 | 0, /* bitpos */ | |
486 | complain_overflow_signed,/* complain_on_overflow */ | |
487 | bfd_elf_generic_reloc, /* special_function */ | |
488 | "R_ARM_CALL", /* name */ | |
489 | FALSE, /* partial_inplace */ | |
490 | 0x00ffffff, /* src_mask */ | |
491 | 0x00ffffff, /* dst_mask */ | |
492 | TRUE), /* pcrel_offset */ | |
493 | ||
494 | HOWTO (R_ARM_JUMP24, /* type */ | |
495 | 2, /* rightshift */ | |
496 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
497 | 24, /* bitsize */ | |
498 | TRUE, /* pc_relative */ | |
499 | 0, /* bitpos */ | |
500 | complain_overflow_signed,/* complain_on_overflow */ | |
501 | bfd_elf_generic_reloc, /* special_function */ | |
502 | "R_ARM_JUMP24", /* name */ | |
503 | FALSE, /* partial_inplace */ | |
504 | 0x00ffffff, /* src_mask */ | |
505 | 0x00ffffff, /* dst_mask */ | |
506 | TRUE), /* pcrel_offset */ | |
507 | ||
c19d1205 ZW |
508 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
509 | 1, /* rightshift */ | |
510 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
511 | 24, /* bitsize */ | |
512 | TRUE, /* pc_relative */ | |
7f266840 | 513 | 0, /* bitpos */ |
c19d1205 | 514 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 515 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 516 | "R_ARM_THM_JUMP24", /* name */ |
7f266840 | 517 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
518 | 0x07ff2fff, /* src_mask */ |
519 | 0x07ff2fff, /* dst_mask */ | |
520 | TRUE), /* pcrel_offset */ | |
7f266840 | 521 | |
c19d1205 | 522 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 523 | 0, /* rightshift */ |
c19d1205 ZW |
524 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
525 | 32, /* bitsize */ | |
7f266840 DJ |
526 | FALSE, /* pc_relative */ |
527 | 0, /* bitpos */ | |
528 | complain_overflow_dont,/* complain_on_overflow */ | |
529 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 530 | "R_ARM_BASE_ABS", /* name */ |
7f266840 | 531 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
532 | 0xffffffff, /* src_mask */ |
533 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
534 | FALSE), /* pcrel_offset */ |
535 | ||
536 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
537 | 0, /* rightshift */ | |
538 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
539 | 12, /* bitsize */ | |
540 | TRUE, /* pc_relative */ | |
541 | 0, /* bitpos */ | |
542 | complain_overflow_dont,/* complain_on_overflow */ | |
543 | bfd_elf_generic_reloc, /* special_function */ | |
544 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
545 | FALSE, /* partial_inplace */ | |
546 | 0x00000fff, /* src_mask */ | |
547 | 0x00000fff, /* dst_mask */ | |
548 | TRUE), /* pcrel_offset */ | |
549 | ||
550 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
551 | 0, /* rightshift */ | |
552 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
553 | 12, /* bitsize */ | |
554 | TRUE, /* pc_relative */ | |
555 | 8, /* bitpos */ | |
556 | complain_overflow_dont,/* complain_on_overflow */ | |
557 | bfd_elf_generic_reloc, /* special_function */ | |
558 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
559 | FALSE, /* partial_inplace */ | |
560 | 0x00000fff, /* src_mask */ | |
561 | 0x00000fff, /* dst_mask */ | |
562 | TRUE), /* pcrel_offset */ | |
563 | ||
564 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
565 | 0, /* rightshift */ | |
566 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
567 | 12, /* bitsize */ | |
568 | TRUE, /* pc_relative */ | |
569 | 16, /* bitpos */ | |
570 | complain_overflow_dont,/* complain_on_overflow */ | |
571 | bfd_elf_generic_reloc, /* special_function */ | |
572 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
573 | FALSE, /* partial_inplace */ | |
574 | 0x00000fff, /* src_mask */ | |
575 | 0x00000fff, /* dst_mask */ | |
576 | TRUE), /* pcrel_offset */ | |
577 | ||
578 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
579 | 0, /* rightshift */ | |
580 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
581 | 12, /* bitsize */ | |
582 | FALSE, /* pc_relative */ | |
583 | 0, /* bitpos */ | |
584 | complain_overflow_dont,/* complain_on_overflow */ | |
585 | bfd_elf_generic_reloc, /* special_function */ | |
586 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
587 | FALSE, /* partial_inplace */ | |
588 | 0x00000fff, /* src_mask */ | |
589 | 0x00000fff, /* dst_mask */ | |
590 | FALSE), /* pcrel_offset */ | |
591 | ||
592 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
593 | 0, /* rightshift */ | |
594 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
595 | 8, /* bitsize */ | |
596 | FALSE, /* pc_relative */ | |
597 | 12, /* bitpos */ | |
598 | complain_overflow_dont,/* complain_on_overflow */ | |
599 | bfd_elf_generic_reloc, /* special_function */ | |
600 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
601 | FALSE, /* partial_inplace */ | |
602 | 0x000ff000, /* src_mask */ | |
603 | 0x000ff000, /* dst_mask */ | |
604 | FALSE), /* pcrel_offset */ | |
605 | ||
606 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
607 | 0, /* rightshift */ | |
608 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
609 | 8, /* bitsize */ | |
610 | FALSE, /* pc_relative */ | |
611 | 20, /* bitpos */ | |
612 | complain_overflow_dont,/* complain_on_overflow */ | |
613 | bfd_elf_generic_reloc, /* special_function */ | |
614 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
615 | FALSE, /* partial_inplace */ | |
616 | 0x0ff00000, /* src_mask */ | |
617 | 0x0ff00000, /* dst_mask */ | |
618 | FALSE), /* pcrel_offset */ | |
619 | ||
620 | HOWTO (R_ARM_TARGET1, /* type */ | |
621 | 0, /* rightshift */ | |
622 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
623 | 32, /* bitsize */ | |
624 | FALSE, /* pc_relative */ | |
625 | 0, /* bitpos */ | |
626 | complain_overflow_dont,/* complain_on_overflow */ | |
627 | bfd_elf_generic_reloc, /* special_function */ | |
628 | "R_ARM_TARGET1", /* name */ | |
629 | FALSE, /* partial_inplace */ | |
630 | 0xffffffff, /* src_mask */ | |
631 | 0xffffffff, /* dst_mask */ | |
632 | FALSE), /* pcrel_offset */ | |
633 | ||
634 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
635 | 0, /* rightshift */ | |
636 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
637 | 32, /* bitsize */ | |
638 | FALSE, /* pc_relative */ | |
639 | 0, /* bitpos */ | |
640 | complain_overflow_dont,/* complain_on_overflow */ | |
641 | bfd_elf_generic_reloc, /* special_function */ | |
642 | "R_ARM_ROSEGREL32", /* name */ | |
643 | FALSE, /* partial_inplace */ | |
644 | 0xffffffff, /* src_mask */ | |
645 | 0xffffffff, /* dst_mask */ | |
646 | FALSE), /* pcrel_offset */ | |
647 | ||
648 | HOWTO (R_ARM_V4BX, /* type */ | |
649 | 0, /* rightshift */ | |
650 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
651 | 32, /* bitsize */ | |
652 | FALSE, /* pc_relative */ | |
653 | 0, /* bitpos */ | |
654 | complain_overflow_dont,/* complain_on_overflow */ | |
655 | bfd_elf_generic_reloc, /* special_function */ | |
656 | "R_ARM_V4BX", /* name */ | |
657 | FALSE, /* partial_inplace */ | |
658 | 0xffffffff, /* src_mask */ | |
659 | 0xffffffff, /* dst_mask */ | |
660 | FALSE), /* pcrel_offset */ | |
661 | ||
662 | HOWTO (R_ARM_TARGET2, /* type */ | |
663 | 0, /* rightshift */ | |
664 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
665 | 32, /* bitsize */ | |
666 | FALSE, /* pc_relative */ | |
667 | 0, /* bitpos */ | |
668 | complain_overflow_signed,/* complain_on_overflow */ | |
669 | bfd_elf_generic_reloc, /* special_function */ | |
670 | "R_ARM_TARGET2", /* name */ | |
671 | FALSE, /* partial_inplace */ | |
672 | 0xffffffff, /* src_mask */ | |
673 | 0xffffffff, /* dst_mask */ | |
674 | TRUE), /* pcrel_offset */ | |
675 | ||
676 | HOWTO (R_ARM_PREL31, /* type */ | |
677 | 0, /* rightshift */ | |
678 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
679 | 31, /* bitsize */ | |
680 | TRUE, /* pc_relative */ | |
681 | 0, /* bitpos */ | |
682 | complain_overflow_signed,/* complain_on_overflow */ | |
683 | bfd_elf_generic_reloc, /* special_function */ | |
684 | "R_ARM_PREL31", /* name */ | |
685 | FALSE, /* partial_inplace */ | |
686 | 0x7fffffff, /* src_mask */ | |
687 | 0x7fffffff, /* dst_mask */ | |
688 | TRUE), /* pcrel_offset */ | |
c19d1205 ZW |
689 | |
690 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
691 | 0, /* rightshift */ | |
692 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
693 | 16, /* bitsize */ | |
694 | FALSE, /* pc_relative */ | |
695 | 0, /* bitpos */ | |
696 | complain_overflow_dont,/* complain_on_overflow */ | |
697 | bfd_elf_generic_reloc, /* special_function */ | |
698 | "R_ARM_MOVW_ABS_NC", /* name */ | |
699 | FALSE, /* partial_inplace */ | |
39623e12 PB |
700 | 0x000f0fff, /* src_mask */ |
701 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
702 | FALSE), /* pcrel_offset */ |
703 | ||
704 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
705 | 0, /* rightshift */ | |
706 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
707 | 16, /* bitsize */ | |
708 | FALSE, /* pc_relative */ | |
709 | 0, /* bitpos */ | |
710 | complain_overflow_bitfield,/* complain_on_overflow */ | |
711 | bfd_elf_generic_reloc, /* special_function */ | |
712 | "R_ARM_MOVT_ABS", /* name */ | |
713 | FALSE, /* partial_inplace */ | |
39623e12 PB |
714 | 0x000f0fff, /* src_mask */ |
715 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
716 | FALSE), /* pcrel_offset */ |
717 | ||
718 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
719 | 0, /* rightshift */ | |
720 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
721 | 16, /* bitsize */ | |
722 | TRUE, /* pc_relative */ | |
723 | 0, /* bitpos */ | |
724 | complain_overflow_dont,/* complain_on_overflow */ | |
725 | bfd_elf_generic_reloc, /* special_function */ | |
726 | "R_ARM_MOVW_PREL_NC", /* name */ | |
727 | FALSE, /* partial_inplace */ | |
39623e12 PB |
728 | 0x000f0fff, /* src_mask */ |
729 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
730 | TRUE), /* pcrel_offset */ |
731 | ||
732 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
733 | 0, /* rightshift */ | |
734 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
735 | 16, /* bitsize */ | |
736 | TRUE, /* pc_relative */ | |
737 | 0, /* bitpos */ | |
738 | complain_overflow_bitfield,/* complain_on_overflow */ | |
739 | bfd_elf_generic_reloc, /* special_function */ | |
740 | "R_ARM_MOVT_PREL", /* name */ | |
741 | FALSE, /* partial_inplace */ | |
39623e12 PB |
742 | 0x000f0fff, /* src_mask */ |
743 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
744 | TRUE), /* pcrel_offset */ |
745 | ||
746 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
747 | 0, /* rightshift */ | |
748 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
749 | 16, /* bitsize */ | |
750 | FALSE, /* pc_relative */ | |
751 | 0, /* bitpos */ | |
752 | complain_overflow_dont,/* complain_on_overflow */ | |
753 | bfd_elf_generic_reloc, /* special_function */ | |
754 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
755 | FALSE, /* partial_inplace */ | |
756 | 0x040f70ff, /* src_mask */ | |
757 | 0x040f70ff, /* dst_mask */ | |
758 | FALSE), /* pcrel_offset */ | |
759 | ||
760 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
761 | 0, /* rightshift */ | |
762 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
763 | 16, /* bitsize */ | |
764 | FALSE, /* pc_relative */ | |
765 | 0, /* bitpos */ | |
766 | complain_overflow_bitfield,/* complain_on_overflow */ | |
767 | bfd_elf_generic_reloc, /* special_function */ | |
768 | "R_ARM_THM_MOVT_ABS", /* name */ | |
769 | FALSE, /* partial_inplace */ | |
770 | 0x040f70ff, /* src_mask */ | |
771 | 0x040f70ff, /* dst_mask */ | |
772 | FALSE), /* pcrel_offset */ | |
773 | ||
774 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
775 | 0, /* rightshift */ | |
776 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
777 | 16, /* bitsize */ | |
778 | TRUE, /* pc_relative */ | |
779 | 0, /* bitpos */ | |
780 | complain_overflow_dont,/* complain_on_overflow */ | |
781 | bfd_elf_generic_reloc, /* special_function */ | |
782 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
783 | FALSE, /* partial_inplace */ | |
784 | 0x040f70ff, /* src_mask */ | |
785 | 0x040f70ff, /* dst_mask */ | |
786 | TRUE), /* pcrel_offset */ | |
787 | ||
788 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
789 | 0, /* rightshift */ | |
790 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
791 | 16, /* bitsize */ | |
792 | TRUE, /* pc_relative */ | |
793 | 0, /* bitpos */ | |
794 | complain_overflow_bitfield,/* complain_on_overflow */ | |
795 | bfd_elf_generic_reloc, /* special_function */ | |
796 | "R_ARM_THM_MOVT_PREL", /* name */ | |
797 | FALSE, /* partial_inplace */ | |
798 | 0x040f70ff, /* src_mask */ | |
799 | 0x040f70ff, /* dst_mask */ | |
800 | TRUE), /* pcrel_offset */ | |
801 | ||
802 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
803 | 1, /* rightshift */ | |
804 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
805 | 19, /* bitsize */ | |
806 | TRUE, /* pc_relative */ | |
807 | 0, /* bitpos */ | |
808 | complain_overflow_signed,/* complain_on_overflow */ | |
809 | bfd_elf_generic_reloc, /* special_function */ | |
810 | "R_ARM_THM_JUMP19", /* name */ | |
811 | FALSE, /* partial_inplace */ | |
812 | 0x043f2fff, /* src_mask */ | |
813 | 0x043f2fff, /* dst_mask */ | |
814 | TRUE), /* pcrel_offset */ | |
815 | ||
816 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
817 | 1, /* rightshift */ | |
818 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
819 | 6, /* bitsize */ | |
820 | TRUE, /* pc_relative */ | |
821 | 0, /* bitpos */ | |
822 | complain_overflow_unsigned,/* complain_on_overflow */ | |
823 | bfd_elf_generic_reloc, /* special_function */ | |
824 | "R_ARM_THM_JUMP6", /* name */ | |
825 | FALSE, /* partial_inplace */ | |
826 | 0x02f8, /* src_mask */ | |
827 | 0x02f8, /* dst_mask */ | |
828 | TRUE), /* pcrel_offset */ | |
829 | ||
830 | /* These are declared as 13-bit signed relocations because we can | |
831 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
832 | versa. */ | |
833 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
834 | 0, /* rightshift */ | |
835 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
836 | 13, /* bitsize */ | |
837 | TRUE, /* pc_relative */ | |
838 | 0, /* bitpos */ | |
2cab6cc3 | 839 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
840 | bfd_elf_generic_reloc, /* special_function */ |
841 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
842 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
843 | 0xffffffff, /* src_mask */ |
844 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
845 | TRUE), /* pcrel_offset */ |
846 | ||
847 | HOWTO (R_ARM_THM_PC12, /* type */ | |
848 | 0, /* rightshift */ | |
849 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
850 | 13, /* bitsize */ | |
851 | TRUE, /* pc_relative */ | |
852 | 0, /* bitpos */ | |
2cab6cc3 | 853 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
854 | bfd_elf_generic_reloc, /* special_function */ |
855 | "R_ARM_THM_PC12", /* name */ | |
856 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
857 | 0xffffffff, /* src_mask */ |
858 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
859 | TRUE), /* pcrel_offset */ |
860 | ||
861 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
862 | 0, /* rightshift */ | |
863 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
864 | 32, /* bitsize */ | |
865 | FALSE, /* pc_relative */ | |
866 | 0, /* bitpos */ | |
867 | complain_overflow_dont,/* complain_on_overflow */ | |
868 | bfd_elf_generic_reloc, /* special_function */ | |
869 | "R_ARM_ABS32_NOI", /* name */ | |
870 | FALSE, /* partial_inplace */ | |
871 | 0xffffffff, /* src_mask */ | |
872 | 0xffffffff, /* dst_mask */ | |
873 | FALSE), /* pcrel_offset */ | |
874 | ||
875 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
876 | 0, /* rightshift */ | |
877 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
878 | 32, /* bitsize */ | |
879 | TRUE, /* pc_relative */ | |
880 | 0, /* bitpos */ | |
881 | complain_overflow_dont,/* complain_on_overflow */ | |
882 | bfd_elf_generic_reloc, /* special_function */ | |
883 | "R_ARM_REL32_NOI", /* name */ | |
884 | FALSE, /* partial_inplace */ | |
885 | 0xffffffff, /* src_mask */ | |
886 | 0xffffffff, /* dst_mask */ | |
887 | FALSE), /* pcrel_offset */ | |
7f266840 | 888 | |
4962c51a MS |
889 | /* Group relocations. */ |
890 | ||
891 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
892 | 0, /* rightshift */ | |
893 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
894 | 32, /* bitsize */ | |
895 | TRUE, /* pc_relative */ | |
896 | 0, /* bitpos */ | |
897 | complain_overflow_dont,/* complain_on_overflow */ | |
898 | bfd_elf_generic_reloc, /* special_function */ | |
899 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
900 | FALSE, /* partial_inplace */ | |
901 | 0xffffffff, /* src_mask */ | |
902 | 0xffffffff, /* dst_mask */ | |
903 | TRUE), /* pcrel_offset */ | |
904 | ||
905 | HOWTO (R_ARM_ALU_PC_G0, /* type */ | |
906 | 0, /* rightshift */ | |
907 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
908 | 32, /* bitsize */ | |
909 | TRUE, /* pc_relative */ | |
910 | 0, /* bitpos */ | |
911 | complain_overflow_dont,/* complain_on_overflow */ | |
912 | bfd_elf_generic_reloc, /* special_function */ | |
913 | "R_ARM_ALU_PC_G0", /* name */ | |
914 | FALSE, /* partial_inplace */ | |
915 | 0xffffffff, /* src_mask */ | |
916 | 0xffffffff, /* dst_mask */ | |
917 | TRUE), /* pcrel_offset */ | |
918 | ||
919 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
920 | 0, /* rightshift */ | |
921 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
922 | 32, /* bitsize */ | |
923 | TRUE, /* pc_relative */ | |
924 | 0, /* bitpos */ | |
925 | complain_overflow_dont,/* complain_on_overflow */ | |
926 | bfd_elf_generic_reloc, /* special_function */ | |
927 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
928 | FALSE, /* partial_inplace */ | |
929 | 0xffffffff, /* src_mask */ | |
930 | 0xffffffff, /* dst_mask */ | |
931 | TRUE), /* pcrel_offset */ | |
932 | ||
933 | HOWTO (R_ARM_ALU_PC_G1, /* type */ | |
934 | 0, /* rightshift */ | |
935 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
936 | 32, /* bitsize */ | |
937 | TRUE, /* pc_relative */ | |
938 | 0, /* bitpos */ | |
939 | complain_overflow_dont,/* complain_on_overflow */ | |
940 | bfd_elf_generic_reloc, /* special_function */ | |
941 | "R_ARM_ALU_PC_G1", /* name */ | |
942 | FALSE, /* partial_inplace */ | |
943 | 0xffffffff, /* src_mask */ | |
944 | 0xffffffff, /* dst_mask */ | |
945 | TRUE), /* pcrel_offset */ | |
946 | ||
947 | HOWTO (R_ARM_ALU_PC_G2, /* type */ | |
948 | 0, /* rightshift */ | |
949 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
950 | 32, /* bitsize */ | |
951 | TRUE, /* pc_relative */ | |
952 | 0, /* bitpos */ | |
953 | complain_overflow_dont,/* complain_on_overflow */ | |
954 | bfd_elf_generic_reloc, /* special_function */ | |
955 | "R_ARM_ALU_PC_G2", /* name */ | |
956 | FALSE, /* partial_inplace */ | |
957 | 0xffffffff, /* src_mask */ | |
958 | 0xffffffff, /* dst_mask */ | |
959 | TRUE), /* pcrel_offset */ | |
960 | ||
961 | HOWTO (R_ARM_LDR_PC_G1, /* type */ | |
962 | 0, /* rightshift */ | |
963 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
964 | 32, /* bitsize */ | |
965 | TRUE, /* pc_relative */ | |
966 | 0, /* bitpos */ | |
967 | complain_overflow_dont,/* complain_on_overflow */ | |
968 | bfd_elf_generic_reloc, /* special_function */ | |
969 | "R_ARM_LDR_PC_G1", /* name */ | |
970 | FALSE, /* partial_inplace */ | |
971 | 0xffffffff, /* src_mask */ | |
972 | 0xffffffff, /* dst_mask */ | |
973 | TRUE), /* pcrel_offset */ | |
974 | ||
975 | HOWTO (R_ARM_LDR_PC_G2, /* type */ | |
976 | 0, /* rightshift */ | |
977 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
978 | 32, /* bitsize */ | |
979 | TRUE, /* pc_relative */ | |
980 | 0, /* bitpos */ | |
981 | complain_overflow_dont,/* complain_on_overflow */ | |
982 | bfd_elf_generic_reloc, /* special_function */ | |
983 | "R_ARM_LDR_PC_G2", /* name */ | |
984 | FALSE, /* partial_inplace */ | |
985 | 0xffffffff, /* src_mask */ | |
986 | 0xffffffff, /* dst_mask */ | |
987 | TRUE), /* pcrel_offset */ | |
988 | ||
989 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ | |
990 | 0, /* rightshift */ | |
991 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
992 | 32, /* bitsize */ | |
993 | TRUE, /* pc_relative */ | |
994 | 0, /* bitpos */ | |
995 | complain_overflow_dont,/* complain_on_overflow */ | |
996 | bfd_elf_generic_reloc, /* special_function */ | |
997 | "R_ARM_LDRS_PC_G0", /* name */ | |
998 | FALSE, /* partial_inplace */ | |
999 | 0xffffffff, /* src_mask */ | |
1000 | 0xffffffff, /* dst_mask */ | |
1001 | TRUE), /* pcrel_offset */ | |
1002 | ||
1003 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ | |
1004 | 0, /* rightshift */ | |
1005 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1006 | 32, /* bitsize */ | |
1007 | TRUE, /* pc_relative */ | |
1008 | 0, /* bitpos */ | |
1009 | complain_overflow_dont,/* complain_on_overflow */ | |
1010 | bfd_elf_generic_reloc, /* special_function */ | |
1011 | "R_ARM_LDRS_PC_G1", /* name */ | |
1012 | FALSE, /* partial_inplace */ | |
1013 | 0xffffffff, /* src_mask */ | |
1014 | 0xffffffff, /* dst_mask */ | |
1015 | TRUE), /* pcrel_offset */ | |
1016 | ||
1017 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ | |
1018 | 0, /* rightshift */ | |
1019 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1020 | 32, /* bitsize */ | |
1021 | TRUE, /* pc_relative */ | |
1022 | 0, /* bitpos */ | |
1023 | complain_overflow_dont,/* complain_on_overflow */ | |
1024 | bfd_elf_generic_reloc, /* special_function */ | |
1025 | "R_ARM_LDRS_PC_G2", /* name */ | |
1026 | FALSE, /* partial_inplace */ | |
1027 | 0xffffffff, /* src_mask */ | |
1028 | 0xffffffff, /* dst_mask */ | |
1029 | TRUE), /* pcrel_offset */ | |
1030 | ||
1031 | HOWTO (R_ARM_LDC_PC_G0, /* type */ | |
1032 | 0, /* rightshift */ | |
1033 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1034 | 32, /* bitsize */ | |
1035 | TRUE, /* pc_relative */ | |
1036 | 0, /* bitpos */ | |
1037 | complain_overflow_dont,/* complain_on_overflow */ | |
1038 | bfd_elf_generic_reloc, /* special_function */ | |
1039 | "R_ARM_LDC_PC_G0", /* name */ | |
1040 | FALSE, /* partial_inplace */ | |
1041 | 0xffffffff, /* src_mask */ | |
1042 | 0xffffffff, /* dst_mask */ | |
1043 | TRUE), /* pcrel_offset */ | |
1044 | ||
1045 | HOWTO (R_ARM_LDC_PC_G1, /* type */ | |
1046 | 0, /* rightshift */ | |
1047 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1048 | 32, /* bitsize */ | |
1049 | TRUE, /* pc_relative */ | |
1050 | 0, /* bitpos */ | |
1051 | complain_overflow_dont,/* complain_on_overflow */ | |
1052 | bfd_elf_generic_reloc, /* special_function */ | |
1053 | "R_ARM_LDC_PC_G1", /* name */ | |
1054 | FALSE, /* partial_inplace */ | |
1055 | 0xffffffff, /* src_mask */ | |
1056 | 0xffffffff, /* dst_mask */ | |
1057 | TRUE), /* pcrel_offset */ | |
1058 | ||
1059 | HOWTO (R_ARM_LDC_PC_G2, /* type */ | |
1060 | 0, /* rightshift */ | |
1061 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1062 | 32, /* bitsize */ | |
1063 | TRUE, /* pc_relative */ | |
1064 | 0, /* bitpos */ | |
1065 | complain_overflow_dont,/* complain_on_overflow */ | |
1066 | bfd_elf_generic_reloc, /* special_function */ | |
1067 | "R_ARM_LDC_PC_G2", /* name */ | |
1068 | FALSE, /* partial_inplace */ | |
1069 | 0xffffffff, /* src_mask */ | |
1070 | 0xffffffff, /* dst_mask */ | |
1071 | TRUE), /* pcrel_offset */ | |
1072 | ||
1073 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ | |
1074 | 0, /* rightshift */ | |
1075 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1076 | 32, /* bitsize */ | |
1077 | TRUE, /* pc_relative */ | |
1078 | 0, /* bitpos */ | |
1079 | complain_overflow_dont,/* complain_on_overflow */ | |
1080 | bfd_elf_generic_reloc, /* special_function */ | |
1081 | "R_ARM_ALU_SB_G0_NC", /* name */ | |
1082 | FALSE, /* partial_inplace */ | |
1083 | 0xffffffff, /* src_mask */ | |
1084 | 0xffffffff, /* dst_mask */ | |
1085 | TRUE), /* pcrel_offset */ | |
1086 | ||
1087 | HOWTO (R_ARM_ALU_SB_G0, /* type */ | |
1088 | 0, /* rightshift */ | |
1089 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1090 | 32, /* bitsize */ | |
1091 | TRUE, /* pc_relative */ | |
1092 | 0, /* bitpos */ | |
1093 | complain_overflow_dont,/* complain_on_overflow */ | |
1094 | bfd_elf_generic_reloc, /* special_function */ | |
1095 | "R_ARM_ALU_SB_G0", /* name */ | |
1096 | FALSE, /* partial_inplace */ | |
1097 | 0xffffffff, /* src_mask */ | |
1098 | 0xffffffff, /* dst_mask */ | |
1099 | TRUE), /* pcrel_offset */ | |
1100 | ||
1101 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ | |
1102 | 0, /* rightshift */ | |
1103 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1104 | 32, /* bitsize */ | |
1105 | TRUE, /* pc_relative */ | |
1106 | 0, /* bitpos */ | |
1107 | complain_overflow_dont,/* complain_on_overflow */ | |
1108 | bfd_elf_generic_reloc, /* special_function */ | |
1109 | "R_ARM_ALU_SB_G1_NC", /* name */ | |
1110 | FALSE, /* partial_inplace */ | |
1111 | 0xffffffff, /* src_mask */ | |
1112 | 0xffffffff, /* dst_mask */ | |
1113 | TRUE), /* pcrel_offset */ | |
1114 | ||
1115 | HOWTO (R_ARM_ALU_SB_G1, /* type */ | |
1116 | 0, /* rightshift */ | |
1117 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1118 | 32, /* bitsize */ | |
1119 | TRUE, /* pc_relative */ | |
1120 | 0, /* bitpos */ | |
1121 | complain_overflow_dont,/* complain_on_overflow */ | |
1122 | bfd_elf_generic_reloc, /* special_function */ | |
1123 | "R_ARM_ALU_SB_G1", /* name */ | |
1124 | FALSE, /* partial_inplace */ | |
1125 | 0xffffffff, /* src_mask */ | |
1126 | 0xffffffff, /* dst_mask */ | |
1127 | TRUE), /* pcrel_offset */ | |
1128 | ||
1129 | HOWTO (R_ARM_ALU_SB_G2, /* type */ | |
1130 | 0, /* rightshift */ | |
1131 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1132 | 32, /* bitsize */ | |
1133 | TRUE, /* pc_relative */ | |
1134 | 0, /* bitpos */ | |
1135 | complain_overflow_dont,/* complain_on_overflow */ | |
1136 | bfd_elf_generic_reloc, /* special_function */ | |
1137 | "R_ARM_ALU_SB_G2", /* name */ | |
1138 | FALSE, /* partial_inplace */ | |
1139 | 0xffffffff, /* src_mask */ | |
1140 | 0xffffffff, /* dst_mask */ | |
1141 | TRUE), /* pcrel_offset */ | |
1142 | ||
1143 | HOWTO (R_ARM_LDR_SB_G0, /* type */ | |
1144 | 0, /* rightshift */ | |
1145 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1146 | 32, /* bitsize */ | |
1147 | TRUE, /* pc_relative */ | |
1148 | 0, /* bitpos */ | |
1149 | complain_overflow_dont,/* complain_on_overflow */ | |
1150 | bfd_elf_generic_reloc, /* special_function */ | |
1151 | "R_ARM_LDR_SB_G0", /* name */ | |
1152 | FALSE, /* partial_inplace */ | |
1153 | 0xffffffff, /* src_mask */ | |
1154 | 0xffffffff, /* dst_mask */ | |
1155 | TRUE), /* pcrel_offset */ | |
1156 | ||
1157 | HOWTO (R_ARM_LDR_SB_G1, /* type */ | |
1158 | 0, /* rightshift */ | |
1159 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1160 | 32, /* bitsize */ | |
1161 | TRUE, /* pc_relative */ | |
1162 | 0, /* bitpos */ | |
1163 | complain_overflow_dont,/* complain_on_overflow */ | |
1164 | bfd_elf_generic_reloc, /* special_function */ | |
1165 | "R_ARM_LDR_SB_G1", /* name */ | |
1166 | FALSE, /* partial_inplace */ | |
1167 | 0xffffffff, /* src_mask */ | |
1168 | 0xffffffff, /* dst_mask */ | |
1169 | TRUE), /* pcrel_offset */ | |
1170 | ||
1171 | HOWTO (R_ARM_LDR_SB_G2, /* type */ | |
1172 | 0, /* rightshift */ | |
1173 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1174 | 32, /* bitsize */ | |
1175 | TRUE, /* pc_relative */ | |
1176 | 0, /* bitpos */ | |
1177 | complain_overflow_dont,/* complain_on_overflow */ | |
1178 | bfd_elf_generic_reloc, /* special_function */ | |
1179 | "R_ARM_LDR_SB_G2", /* name */ | |
1180 | FALSE, /* partial_inplace */ | |
1181 | 0xffffffff, /* src_mask */ | |
1182 | 0xffffffff, /* dst_mask */ | |
1183 | TRUE), /* pcrel_offset */ | |
1184 | ||
1185 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ | |
1186 | 0, /* rightshift */ | |
1187 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1188 | 32, /* bitsize */ | |
1189 | TRUE, /* pc_relative */ | |
1190 | 0, /* bitpos */ | |
1191 | complain_overflow_dont,/* complain_on_overflow */ | |
1192 | bfd_elf_generic_reloc, /* special_function */ | |
1193 | "R_ARM_LDRS_SB_G0", /* name */ | |
1194 | FALSE, /* partial_inplace */ | |
1195 | 0xffffffff, /* src_mask */ | |
1196 | 0xffffffff, /* dst_mask */ | |
1197 | TRUE), /* pcrel_offset */ | |
1198 | ||
1199 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ | |
1200 | 0, /* rightshift */ | |
1201 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1202 | 32, /* bitsize */ | |
1203 | TRUE, /* pc_relative */ | |
1204 | 0, /* bitpos */ | |
1205 | complain_overflow_dont,/* complain_on_overflow */ | |
1206 | bfd_elf_generic_reloc, /* special_function */ | |
1207 | "R_ARM_LDRS_SB_G1", /* name */ | |
1208 | FALSE, /* partial_inplace */ | |
1209 | 0xffffffff, /* src_mask */ | |
1210 | 0xffffffff, /* dst_mask */ | |
1211 | TRUE), /* pcrel_offset */ | |
1212 | ||
1213 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ | |
1214 | 0, /* rightshift */ | |
1215 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1216 | 32, /* bitsize */ | |
1217 | TRUE, /* pc_relative */ | |
1218 | 0, /* bitpos */ | |
1219 | complain_overflow_dont,/* complain_on_overflow */ | |
1220 | bfd_elf_generic_reloc, /* special_function */ | |
1221 | "R_ARM_LDRS_SB_G2", /* name */ | |
1222 | FALSE, /* partial_inplace */ | |
1223 | 0xffffffff, /* src_mask */ | |
1224 | 0xffffffff, /* dst_mask */ | |
1225 | TRUE), /* pcrel_offset */ | |
1226 | ||
1227 | HOWTO (R_ARM_LDC_SB_G0, /* type */ | |
1228 | 0, /* rightshift */ | |
1229 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1230 | 32, /* bitsize */ | |
1231 | TRUE, /* pc_relative */ | |
1232 | 0, /* bitpos */ | |
1233 | complain_overflow_dont,/* complain_on_overflow */ | |
1234 | bfd_elf_generic_reloc, /* special_function */ | |
1235 | "R_ARM_LDC_SB_G0", /* name */ | |
1236 | FALSE, /* partial_inplace */ | |
1237 | 0xffffffff, /* src_mask */ | |
1238 | 0xffffffff, /* dst_mask */ | |
1239 | TRUE), /* pcrel_offset */ | |
1240 | ||
1241 | HOWTO (R_ARM_LDC_SB_G1, /* type */ | |
1242 | 0, /* rightshift */ | |
1243 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1244 | 32, /* bitsize */ | |
1245 | TRUE, /* pc_relative */ | |
1246 | 0, /* bitpos */ | |
1247 | complain_overflow_dont,/* complain_on_overflow */ | |
1248 | bfd_elf_generic_reloc, /* special_function */ | |
1249 | "R_ARM_LDC_SB_G1", /* name */ | |
1250 | FALSE, /* partial_inplace */ | |
1251 | 0xffffffff, /* src_mask */ | |
1252 | 0xffffffff, /* dst_mask */ | |
1253 | TRUE), /* pcrel_offset */ | |
1254 | ||
1255 | HOWTO (R_ARM_LDC_SB_G2, /* type */ | |
1256 | 0, /* rightshift */ | |
1257 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1258 | 32, /* bitsize */ | |
1259 | TRUE, /* pc_relative */ | |
1260 | 0, /* bitpos */ | |
1261 | complain_overflow_dont,/* complain_on_overflow */ | |
1262 | bfd_elf_generic_reloc, /* special_function */ | |
1263 | "R_ARM_LDC_SB_G2", /* name */ | |
1264 | FALSE, /* partial_inplace */ | |
1265 | 0xffffffff, /* src_mask */ | |
1266 | 0xffffffff, /* dst_mask */ | |
1267 | TRUE), /* pcrel_offset */ | |
1268 | ||
1269 | /* End of group relocations. */ | |
c19d1205 | 1270 | |
c19d1205 ZW |
1271 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1272 | 0, /* rightshift */ | |
1273 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1274 | 16, /* bitsize */ | |
1275 | FALSE, /* pc_relative */ | |
1276 | 0, /* bitpos */ | |
1277 | complain_overflow_dont,/* complain_on_overflow */ | |
1278 | bfd_elf_generic_reloc, /* special_function */ | |
1279 | "R_ARM_MOVW_BREL_NC", /* name */ | |
1280 | FALSE, /* partial_inplace */ | |
1281 | 0x0000ffff, /* src_mask */ | |
1282 | 0x0000ffff, /* dst_mask */ | |
1283 | FALSE), /* pcrel_offset */ | |
1284 | ||
1285 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1286 | 0, /* rightshift */ | |
1287 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1288 | 16, /* bitsize */ | |
1289 | FALSE, /* pc_relative */ | |
1290 | 0, /* bitpos */ | |
1291 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1292 | bfd_elf_generic_reloc, /* special_function */ | |
1293 | "R_ARM_MOVT_BREL", /* name */ | |
1294 | FALSE, /* partial_inplace */ | |
1295 | 0x0000ffff, /* src_mask */ | |
1296 | 0x0000ffff, /* dst_mask */ | |
1297 | FALSE), /* pcrel_offset */ | |
1298 | ||
1299 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1300 | 0, /* rightshift */ | |
1301 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1302 | 16, /* bitsize */ | |
1303 | FALSE, /* pc_relative */ | |
1304 | 0, /* bitpos */ | |
1305 | complain_overflow_dont,/* complain_on_overflow */ | |
1306 | bfd_elf_generic_reloc, /* special_function */ | |
1307 | "R_ARM_MOVW_BREL", /* name */ | |
1308 | FALSE, /* partial_inplace */ | |
1309 | 0x0000ffff, /* src_mask */ | |
1310 | 0x0000ffff, /* dst_mask */ | |
1311 | FALSE), /* pcrel_offset */ | |
1312 | ||
1313 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1314 | 0, /* rightshift */ | |
1315 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1316 | 16, /* bitsize */ | |
1317 | FALSE, /* pc_relative */ | |
1318 | 0, /* bitpos */ | |
1319 | complain_overflow_dont,/* complain_on_overflow */ | |
1320 | bfd_elf_generic_reloc, /* special_function */ | |
1321 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
1322 | FALSE, /* partial_inplace */ | |
1323 | 0x040f70ff, /* src_mask */ | |
1324 | 0x040f70ff, /* dst_mask */ | |
1325 | FALSE), /* pcrel_offset */ | |
1326 | ||
1327 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1328 | 0, /* rightshift */ | |
1329 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1330 | 16, /* bitsize */ | |
1331 | FALSE, /* pc_relative */ | |
1332 | 0, /* bitpos */ | |
1333 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1334 | bfd_elf_generic_reloc, /* special_function */ | |
1335 | "R_ARM_THM_MOVT_BREL", /* name */ | |
1336 | FALSE, /* partial_inplace */ | |
1337 | 0x040f70ff, /* src_mask */ | |
1338 | 0x040f70ff, /* dst_mask */ | |
1339 | FALSE), /* pcrel_offset */ | |
1340 | ||
1341 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1342 | 0, /* rightshift */ | |
1343 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1344 | 16, /* bitsize */ | |
1345 | FALSE, /* pc_relative */ | |
1346 | 0, /* bitpos */ | |
1347 | complain_overflow_dont,/* complain_on_overflow */ | |
1348 | bfd_elf_generic_reloc, /* special_function */ | |
1349 | "R_ARM_THM_MOVW_BREL", /* name */ | |
1350 | FALSE, /* partial_inplace */ | |
1351 | 0x040f70ff, /* src_mask */ | |
1352 | 0x040f70ff, /* dst_mask */ | |
1353 | FALSE), /* pcrel_offset */ | |
1354 | ||
0855e32b NS |
1355 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
1356 | 0, /* rightshift */ | |
1357 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1358 | 32, /* bitsize */ | |
1359 | FALSE, /* pc_relative */ | |
1360 | 0, /* bitpos */ | |
1361 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1362 | NULL, /* special_function */ | |
1363 | "R_ARM_TLS_GOTDESC", /* name */ | |
1364 | TRUE, /* partial_inplace */ | |
1365 | 0xffffffff, /* src_mask */ | |
1366 | 0xffffffff, /* dst_mask */ | |
1367 | FALSE), /* pcrel_offset */ | |
1368 | ||
1369 | HOWTO (R_ARM_TLS_CALL, /* type */ | |
1370 | 0, /* rightshift */ | |
1371 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1372 | 24, /* bitsize */ | |
1373 | FALSE, /* pc_relative */ | |
1374 | 0, /* bitpos */ | |
1375 | complain_overflow_dont,/* complain_on_overflow */ | |
1376 | bfd_elf_generic_reloc, /* special_function */ | |
1377 | "R_ARM_TLS_CALL", /* name */ | |
1378 | FALSE, /* partial_inplace */ | |
1379 | 0x00ffffff, /* src_mask */ | |
1380 | 0x00ffffff, /* dst_mask */ | |
1381 | FALSE), /* pcrel_offset */ | |
1382 | ||
1383 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ | |
1384 | 0, /* rightshift */ | |
1385 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1386 | 0, /* bitsize */ | |
1387 | FALSE, /* pc_relative */ | |
1388 | 0, /* bitpos */ | |
1389 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1390 | bfd_elf_generic_reloc, /* special_function */ | |
1391 | "R_ARM_TLS_DESCSEQ", /* name */ | |
1392 | FALSE, /* partial_inplace */ | |
1393 | 0x00000000, /* src_mask */ | |
1394 | 0x00000000, /* dst_mask */ | |
1395 | FALSE), /* pcrel_offset */ | |
1396 | ||
1397 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ | |
1398 | 0, /* rightshift */ | |
1399 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1400 | 24, /* bitsize */ | |
1401 | FALSE, /* pc_relative */ | |
1402 | 0, /* bitpos */ | |
1403 | complain_overflow_dont,/* complain_on_overflow */ | |
1404 | bfd_elf_generic_reloc, /* special_function */ | |
1405 | "R_ARM_THM_TLS_CALL", /* name */ | |
1406 | FALSE, /* partial_inplace */ | |
1407 | 0x07ff07ff, /* src_mask */ | |
1408 | 0x07ff07ff, /* dst_mask */ | |
1409 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1410 | |
1411 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1412 | 0, /* rightshift */ | |
1413 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1414 | 32, /* bitsize */ | |
1415 | FALSE, /* pc_relative */ | |
1416 | 0, /* bitpos */ | |
1417 | complain_overflow_dont,/* complain_on_overflow */ | |
1418 | bfd_elf_generic_reloc, /* special_function */ | |
1419 | "R_ARM_PLT32_ABS", /* name */ | |
1420 | FALSE, /* partial_inplace */ | |
1421 | 0xffffffff, /* src_mask */ | |
1422 | 0xffffffff, /* dst_mask */ | |
1423 | FALSE), /* pcrel_offset */ | |
1424 | ||
1425 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1426 | 0, /* rightshift */ | |
1427 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1428 | 32, /* bitsize */ | |
1429 | FALSE, /* pc_relative */ | |
1430 | 0, /* bitpos */ | |
1431 | complain_overflow_dont,/* complain_on_overflow */ | |
1432 | bfd_elf_generic_reloc, /* special_function */ | |
1433 | "R_ARM_GOT_ABS", /* name */ | |
1434 | FALSE, /* partial_inplace */ | |
1435 | 0xffffffff, /* src_mask */ | |
1436 | 0xffffffff, /* dst_mask */ | |
1437 | FALSE), /* pcrel_offset */ | |
1438 | ||
1439 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1440 | 0, /* rightshift */ | |
1441 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1442 | 32, /* bitsize */ | |
1443 | TRUE, /* pc_relative */ | |
1444 | 0, /* bitpos */ | |
1445 | complain_overflow_dont, /* complain_on_overflow */ | |
1446 | bfd_elf_generic_reloc, /* special_function */ | |
1447 | "R_ARM_GOT_PREL", /* name */ | |
1448 | FALSE, /* partial_inplace */ | |
1449 | 0xffffffff, /* src_mask */ | |
1450 | 0xffffffff, /* dst_mask */ | |
1451 | TRUE), /* pcrel_offset */ | |
1452 | ||
1453 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1454 | 0, /* rightshift */ | |
1455 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1456 | 12, /* bitsize */ | |
1457 | FALSE, /* pc_relative */ | |
1458 | 0, /* bitpos */ | |
1459 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1460 | bfd_elf_generic_reloc, /* special_function */ | |
1461 | "R_ARM_GOT_BREL12", /* name */ | |
1462 | FALSE, /* partial_inplace */ | |
1463 | 0x00000fff, /* src_mask */ | |
1464 | 0x00000fff, /* dst_mask */ | |
1465 | FALSE), /* pcrel_offset */ | |
1466 | ||
1467 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1468 | 0, /* rightshift */ | |
1469 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1470 | 12, /* bitsize */ | |
1471 | FALSE, /* pc_relative */ | |
1472 | 0, /* bitpos */ | |
1473 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1474 | bfd_elf_generic_reloc, /* special_function */ | |
1475 | "R_ARM_GOTOFF12", /* name */ | |
1476 | FALSE, /* partial_inplace */ | |
1477 | 0x00000fff, /* src_mask */ | |
1478 | 0x00000fff, /* dst_mask */ | |
1479 | FALSE), /* pcrel_offset */ | |
1480 | ||
1481 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ | |
1482 | ||
1483 | /* GNU extension to record C++ vtable member usage */ | |
1484 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ | |
ba93b8ac DJ |
1485 | 0, /* rightshift */ |
1486 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 | 1487 | 0, /* bitsize */ |
ba93b8ac DJ |
1488 | FALSE, /* pc_relative */ |
1489 | 0, /* bitpos */ | |
c19d1205 ZW |
1490 | complain_overflow_dont, /* complain_on_overflow */ |
1491 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
1492 | "R_ARM_GNU_VTENTRY", /* name */ | |
1493 | FALSE, /* partial_inplace */ | |
1494 | 0, /* src_mask */ | |
1495 | 0, /* dst_mask */ | |
1496 | FALSE), /* pcrel_offset */ | |
1497 | ||
1498 | /* GNU extension to record C++ vtable hierarchy */ | |
1499 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
1500 | 0, /* rightshift */ | |
1501 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1502 | 0, /* bitsize */ | |
1503 | FALSE, /* pc_relative */ | |
1504 | 0, /* bitpos */ | |
1505 | complain_overflow_dont, /* complain_on_overflow */ | |
1506 | NULL, /* special_function */ | |
1507 | "R_ARM_GNU_VTINHERIT", /* name */ | |
1508 | FALSE, /* partial_inplace */ | |
1509 | 0, /* src_mask */ | |
1510 | 0, /* dst_mask */ | |
1511 | FALSE), /* pcrel_offset */ | |
1512 | ||
1513 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1514 | 1, /* rightshift */ | |
1515 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1516 | 11, /* bitsize */ | |
1517 | TRUE, /* pc_relative */ | |
1518 | 0, /* bitpos */ | |
1519 | complain_overflow_signed, /* complain_on_overflow */ | |
1520 | bfd_elf_generic_reloc, /* special_function */ | |
1521 | "R_ARM_THM_JUMP11", /* name */ | |
1522 | FALSE, /* partial_inplace */ | |
1523 | 0x000007ff, /* src_mask */ | |
1524 | 0x000007ff, /* dst_mask */ | |
1525 | TRUE), /* pcrel_offset */ | |
1526 | ||
1527 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1528 | 1, /* rightshift */ | |
1529 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1530 | 8, /* bitsize */ | |
1531 | TRUE, /* pc_relative */ | |
1532 | 0, /* bitpos */ | |
1533 | complain_overflow_signed, /* complain_on_overflow */ | |
1534 | bfd_elf_generic_reloc, /* special_function */ | |
1535 | "R_ARM_THM_JUMP8", /* name */ | |
1536 | FALSE, /* partial_inplace */ | |
1537 | 0x000000ff, /* src_mask */ | |
1538 | 0x000000ff, /* dst_mask */ | |
1539 | TRUE), /* pcrel_offset */ | |
ba93b8ac | 1540 | |
c19d1205 ZW |
1541 | /* TLS relocations */ |
1542 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
ba93b8ac DJ |
1543 | 0, /* rightshift */ |
1544 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1545 | 32, /* bitsize */ | |
1546 | FALSE, /* pc_relative */ | |
1547 | 0, /* bitpos */ | |
1548 | complain_overflow_bitfield,/* complain_on_overflow */ | |
c19d1205 ZW |
1549 | NULL, /* special_function */ |
1550 | "R_ARM_TLS_GD32", /* name */ | |
ba93b8ac DJ |
1551 | TRUE, /* partial_inplace */ |
1552 | 0xffffffff, /* src_mask */ | |
1553 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1554 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1555 | |
ba93b8ac DJ |
1556 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
1557 | 0, /* rightshift */ | |
1558 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1559 | 32, /* bitsize */ | |
1560 | FALSE, /* pc_relative */ | |
1561 | 0, /* bitpos */ | |
1562 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1563 | bfd_elf_generic_reloc, /* special_function */ | |
1564 | "R_ARM_TLS_LDM32", /* name */ | |
1565 | TRUE, /* partial_inplace */ | |
1566 | 0xffffffff, /* src_mask */ | |
1567 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1568 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1569 | |
c19d1205 | 1570 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
ba93b8ac DJ |
1571 | 0, /* rightshift */ |
1572 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1573 | 32, /* bitsize */ | |
1574 | FALSE, /* pc_relative */ | |
1575 | 0, /* bitpos */ | |
1576 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1577 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 1578 | "R_ARM_TLS_LDO32", /* name */ |
ba93b8ac DJ |
1579 | TRUE, /* partial_inplace */ |
1580 | 0xffffffff, /* src_mask */ | |
1581 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1582 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1583 | |
ba93b8ac DJ |
1584 | HOWTO (R_ARM_TLS_IE32, /* type */ |
1585 | 0, /* rightshift */ | |
1586 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1587 | 32, /* bitsize */ | |
1588 | FALSE, /* pc_relative */ | |
1589 | 0, /* bitpos */ | |
1590 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1591 | NULL, /* special_function */ | |
1592 | "R_ARM_TLS_IE32", /* name */ | |
1593 | TRUE, /* partial_inplace */ | |
1594 | 0xffffffff, /* src_mask */ | |
1595 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1596 | FALSE), /* pcrel_offset */ |
7f266840 | 1597 | |
c19d1205 | 1598 | HOWTO (R_ARM_TLS_LE32, /* type */ |
7f266840 DJ |
1599 | 0, /* rightshift */ |
1600 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 | 1601 | 32, /* bitsize */ |
7f266840 DJ |
1602 | FALSE, /* pc_relative */ |
1603 | 0, /* bitpos */ | |
c19d1205 ZW |
1604 | complain_overflow_bitfield,/* complain_on_overflow */ |
1605 | bfd_elf_generic_reloc, /* special_function */ | |
1606 | "R_ARM_TLS_LE32", /* name */ | |
1607 | TRUE, /* partial_inplace */ | |
1608 | 0xffffffff, /* src_mask */ | |
1609 | 0xffffffff, /* dst_mask */ | |
1610 | FALSE), /* pcrel_offset */ | |
7f266840 | 1611 | |
c19d1205 ZW |
1612 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1613 | 0, /* rightshift */ | |
1614 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1615 | 12, /* bitsize */ | |
1616 | FALSE, /* pc_relative */ | |
7f266840 | 1617 | 0, /* bitpos */ |
c19d1205 | 1618 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1619 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1620 | "R_ARM_TLS_LDO12", /* name */ |
7f266840 | 1621 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1622 | 0x00000fff, /* src_mask */ |
1623 | 0x00000fff, /* dst_mask */ | |
1624 | FALSE), /* pcrel_offset */ | |
7f266840 | 1625 | |
c19d1205 ZW |
1626 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1627 | 0, /* rightshift */ | |
1628 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1629 | 12, /* bitsize */ | |
1630 | FALSE, /* pc_relative */ | |
7f266840 | 1631 | 0, /* bitpos */ |
c19d1205 | 1632 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1633 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1634 | "R_ARM_TLS_LE12", /* name */ |
7f266840 | 1635 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1636 | 0x00000fff, /* src_mask */ |
1637 | 0x00000fff, /* dst_mask */ | |
1638 | FALSE), /* pcrel_offset */ | |
7f266840 | 1639 | |
c19d1205 | 1640 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 DJ |
1641 | 0, /* rightshift */ |
1642 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
1643 | 12, /* bitsize */ |
1644 | FALSE, /* pc_relative */ | |
7f266840 | 1645 | 0, /* bitpos */ |
c19d1205 | 1646 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1647 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1648 | "R_ARM_TLS_IE12GP", /* name */ |
7f266840 | 1649 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1650 | 0x00000fff, /* src_mask */ |
1651 | 0x00000fff, /* dst_mask */ | |
1652 | FALSE), /* pcrel_offset */ | |
0855e32b | 1653 | |
34e77a92 | 1654 | /* 112-127 private relocations. */ |
0855e32b NS |
1655 | EMPTY_HOWTO (112), |
1656 | EMPTY_HOWTO (113), | |
1657 | EMPTY_HOWTO (114), | |
1658 | EMPTY_HOWTO (115), | |
1659 | EMPTY_HOWTO (116), | |
1660 | EMPTY_HOWTO (117), | |
1661 | EMPTY_HOWTO (118), | |
1662 | EMPTY_HOWTO (119), | |
1663 | EMPTY_HOWTO (120), | |
1664 | EMPTY_HOWTO (121), | |
1665 | EMPTY_HOWTO (122), | |
1666 | EMPTY_HOWTO (123), | |
1667 | EMPTY_HOWTO (124), | |
1668 | EMPTY_HOWTO (125), | |
1669 | EMPTY_HOWTO (126), | |
1670 | EMPTY_HOWTO (127), | |
34e77a92 RS |
1671 | |
1672 | /* R_ARM_ME_TOO, obsolete. */ | |
0855e32b NS |
1673 | EMPTY_HOWTO (128), |
1674 | ||
1675 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ | |
1676 | 0, /* rightshift */ | |
1677 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1678 | 0, /* bitsize */ | |
1679 | FALSE, /* pc_relative */ | |
1680 | 0, /* bitpos */ | |
1681 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1682 | bfd_elf_generic_reloc, /* special_function */ | |
1683 | "R_ARM_THM_TLS_DESCSEQ",/* name */ | |
1684 | FALSE, /* partial_inplace */ | |
1685 | 0x00000000, /* src_mask */ | |
1686 | 0x00000000, /* dst_mask */ | |
1687 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1688 | }; |
1689 | ||
34e77a92 RS |
1690 | /* 160 onwards: */ |
1691 | static reloc_howto_type elf32_arm_howto_table_2[1] = | |
1692 | { | |
1693 | HOWTO (R_ARM_IRELATIVE, /* type */ | |
1694 | 0, /* rightshift */ | |
1695 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1696 | 32, /* bitsize */ | |
1697 | FALSE, /* pc_relative */ | |
1698 | 0, /* bitpos */ | |
1699 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1700 | bfd_elf_generic_reloc, /* special_function */ | |
1701 | "R_ARM_IRELATIVE", /* name */ | |
1702 | TRUE, /* partial_inplace */ | |
1703 | 0xffffffff, /* src_mask */ | |
1704 | 0xffffffff, /* dst_mask */ | |
1705 | FALSE) /* pcrel_offset */ | |
1706 | }; | |
c19d1205 | 1707 | |
34e77a92 RS |
1708 | /* 249-255 extended, currently unused, relocations: */ |
1709 | static reloc_howto_type elf32_arm_howto_table_3[4] = | |
7f266840 DJ |
1710 | { |
1711 | HOWTO (R_ARM_RREL32, /* type */ | |
1712 | 0, /* rightshift */ | |
1713 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1714 | 0, /* bitsize */ | |
1715 | FALSE, /* pc_relative */ | |
1716 | 0, /* bitpos */ | |
1717 | complain_overflow_dont,/* complain_on_overflow */ | |
1718 | bfd_elf_generic_reloc, /* special_function */ | |
1719 | "R_ARM_RREL32", /* name */ | |
1720 | FALSE, /* partial_inplace */ | |
1721 | 0, /* src_mask */ | |
1722 | 0, /* dst_mask */ | |
1723 | FALSE), /* pcrel_offset */ | |
1724 | ||
1725 | HOWTO (R_ARM_RABS32, /* type */ | |
1726 | 0, /* rightshift */ | |
1727 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1728 | 0, /* bitsize */ | |
1729 | FALSE, /* pc_relative */ | |
1730 | 0, /* bitpos */ | |
1731 | complain_overflow_dont,/* complain_on_overflow */ | |
1732 | bfd_elf_generic_reloc, /* special_function */ | |
1733 | "R_ARM_RABS32", /* name */ | |
1734 | FALSE, /* partial_inplace */ | |
1735 | 0, /* src_mask */ | |
1736 | 0, /* dst_mask */ | |
1737 | FALSE), /* pcrel_offset */ | |
1738 | ||
1739 | HOWTO (R_ARM_RPC24, /* type */ | |
1740 | 0, /* rightshift */ | |
1741 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1742 | 0, /* bitsize */ | |
1743 | FALSE, /* pc_relative */ | |
1744 | 0, /* bitpos */ | |
1745 | complain_overflow_dont,/* complain_on_overflow */ | |
1746 | bfd_elf_generic_reloc, /* special_function */ | |
1747 | "R_ARM_RPC24", /* name */ | |
1748 | FALSE, /* partial_inplace */ | |
1749 | 0, /* src_mask */ | |
1750 | 0, /* dst_mask */ | |
1751 | FALSE), /* pcrel_offset */ | |
1752 | ||
1753 | HOWTO (R_ARM_RBASE, /* type */ | |
1754 | 0, /* rightshift */ | |
1755 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1756 | 0, /* bitsize */ | |
1757 | FALSE, /* pc_relative */ | |
1758 | 0, /* bitpos */ | |
1759 | complain_overflow_dont,/* complain_on_overflow */ | |
1760 | bfd_elf_generic_reloc, /* special_function */ | |
1761 | "R_ARM_RBASE", /* name */ | |
1762 | FALSE, /* partial_inplace */ | |
1763 | 0, /* src_mask */ | |
1764 | 0, /* dst_mask */ | |
1765 | FALSE) /* pcrel_offset */ | |
1766 | }; | |
1767 | ||
1768 | static reloc_howto_type * | |
1769 | elf32_arm_howto_from_type (unsigned int r_type) | |
1770 | { | |
906e58ca | 1771 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1772 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1773 | |
34e77a92 RS |
1774 | if (r_type == R_ARM_IRELATIVE) |
1775 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; | |
1776 | ||
c19d1205 | 1777 | if (r_type >= R_ARM_RREL32 |
34e77a92 RS |
1778 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
1779 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; | |
7f266840 | 1780 | |
c19d1205 | 1781 | return NULL; |
7f266840 DJ |
1782 | } |
1783 | ||
1784 | static void | |
1785 | elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc, | |
1786 | Elf_Internal_Rela * elf_reloc) | |
1787 | { | |
1788 | unsigned int r_type; | |
1789 | ||
1790 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
1791 | bfd_reloc->howto = elf32_arm_howto_from_type (r_type); | |
1792 | } | |
1793 | ||
1794 | struct elf32_arm_reloc_map | |
1795 | { | |
1796 | bfd_reloc_code_real_type bfd_reloc_val; | |
1797 | unsigned char elf_reloc_val; | |
1798 | }; | |
1799 | ||
1800 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
1801 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
1802 | { | |
1803 | {BFD_RELOC_NONE, R_ARM_NONE}, | |
1804 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, | |
39b41c9c PB |
1805 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
1806 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
7f266840 DJ |
1807 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
1808 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
1809 | {BFD_RELOC_32, R_ARM_ABS32}, | |
1810 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
1811 | {BFD_RELOC_8, R_ARM_ABS8}, | |
1812 | {BFD_RELOC_16, R_ARM_ABS16}, | |
1813 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
1814 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, | |
c19d1205 ZW |
1815 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
1816 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
1817 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
1818 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
1819 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
1820 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
7f266840 DJ |
1821 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
1822 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
1823 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
c19d1205 | 1824 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, |
7f266840 | 1825 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, |
b43420e6 | 1826 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, |
7f266840 DJ |
1827 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, |
1828 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
1829 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, | |
1830 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
1831 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
1832 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac DJ |
1833 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
1834 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
0855e32b NS |
1835 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, |
1836 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, | |
1837 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, | |
1838 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, | |
1839 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, | |
1840 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, | |
ba93b8ac DJ |
1841 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
1842 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
1843 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
1844 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
1845 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
1846 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, | |
1847 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
1848 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
34e77a92 | 1849 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, |
c19d1205 ZW |
1850 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
1851 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
1852 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
1853 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
1854 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
1855 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
1856 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
1857 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
1858 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
1859 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
1860 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
1861 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
1862 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
1863 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
1864 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
1865 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
1866 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
1867 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
1868 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
1869 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
1870 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
1871 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
1872 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
1873 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
1874 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
1875 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
1876 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
1877 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
1878 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
1879 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
1880 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
1881 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
1882 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
1883 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
1884 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
1885 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
1886 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 PB |
1887 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
1888 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX} | |
7f266840 DJ |
1889 | }; |
1890 | ||
1891 | static reloc_howto_type * | |
f1c71a59 ZW |
1892 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
1893 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
1894 | { |
1895 | unsigned int i; | |
8029a119 | 1896 | |
906e58ca | 1897 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
1898 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
1899 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 1900 | |
c19d1205 | 1901 | return NULL; |
7f266840 DJ |
1902 | } |
1903 | ||
157090f7 AM |
1904 | static reloc_howto_type * |
1905 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1906 | const char *r_name) | |
1907 | { | |
1908 | unsigned int i; | |
1909 | ||
906e58ca | 1910 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
1911 | if (elf32_arm_howto_table_1[i].name != NULL |
1912 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
1913 | return &elf32_arm_howto_table_1[i]; | |
1914 | ||
906e58ca | 1915 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
1916 | if (elf32_arm_howto_table_2[i].name != NULL |
1917 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
1918 | return &elf32_arm_howto_table_2[i]; | |
1919 | ||
34e77a92 RS |
1920 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
1921 | if (elf32_arm_howto_table_3[i].name != NULL | |
1922 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) | |
1923 | return &elf32_arm_howto_table_3[i]; | |
1924 | ||
157090f7 AM |
1925 | return NULL; |
1926 | } | |
1927 | ||
906e58ca NC |
1928 | /* Support for core dump NOTE sections. */ |
1929 | ||
7f266840 | 1930 | static bfd_boolean |
f1c71a59 | 1931 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1932 | { |
1933 | int offset; | |
1934 | size_t size; | |
1935 | ||
1936 | switch (note->descsz) | |
1937 | { | |
1938 | default: | |
1939 | return FALSE; | |
1940 | ||
8029a119 | 1941 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 DJ |
1942 | /* pr_cursig */ |
1943 | elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12); | |
1944 | ||
1945 | /* pr_pid */ | |
261b8d08 | 1946 | elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24); |
7f266840 DJ |
1947 | |
1948 | /* pr_reg */ | |
1949 | offset = 72; | |
1950 | size = 72; | |
1951 | ||
1952 | break; | |
1953 | } | |
1954 | ||
1955 | /* Make a ".reg/999" section. */ | |
1956 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
1957 | size, note->descpos + offset); | |
1958 | } | |
1959 | ||
1960 | static bfd_boolean | |
f1c71a59 | 1961 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1962 | { |
1963 | switch (note->descsz) | |
1964 | { | |
1965 | default: | |
1966 | return FALSE; | |
1967 | ||
8029a119 | 1968 | case 124: /* Linux/ARM elf_prpsinfo. */ |
7f266840 DJ |
1969 | elf_tdata (abfd)->core_program |
1970 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); | |
1971 | elf_tdata (abfd)->core_command | |
1972 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); | |
1973 | } | |
1974 | ||
1975 | /* Note that for some reason, a spurious space is tacked | |
1976 | onto the end of the args in some (at least one anyway) | |
1977 | implementations, so strip it off if it exists. */ | |
7f266840 DJ |
1978 | { |
1979 | char *command = elf_tdata (abfd)->core_command; | |
1980 | int n = strlen (command); | |
1981 | ||
1982 | if (0 < n && command[n - 1] == ' ') | |
1983 | command[n - 1] = '\0'; | |
1984 | } | |
1985 | ||
1986 | return TRUE; | |
1987 | } | |
1988 | ||
1989 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec | |
1990 | #define TARGET_LITTLE_NAME "elf32-littlearm" | |
1991 | #define TARGET_BIG_SYM bfd_elf32_bigarm_vec | |
1992 | #define TARGET_BIG_NAME "elf32-bigarm" | |
1993 | ||
1994 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
1995 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1996 | ||
252b5132 RH |
1997 | typedef unsigned long int insn32; |
1998 | typedef unsigned short int insn16; | |
1999 | ||
3a4a14e9 PB |
2000 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
2001 | interworkable. */ | |
57e8b36a | 2002 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 2003 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
2004 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
2005 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 2006 | |
252b5132 RH |
2007 | /* The linker script knows the section names for placement. |
2008 | The entry_names are used to do simple name mangling on the stubs. | |
2009 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 2010 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
2011 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
2012 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
2013 | ||
2014 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
2015 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
2016 | ||
c7b8f16e JB |
2017 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
2018 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
2019 | ||
845b51d6 PB |
2020 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
2021 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
2022 | ||
7413f23f DJ |
2023 | #define STUB_ENTRY_NAME "__%s_veneer" |
2024 | ||
252b5132 RH |
2025 | /* The name of the dynamic interpreter. This is put in the .interp |
2026 | section. */ | |
2027 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
2028 | ||
0855e32b NS |
2029 | static const unsigned long tls_trampoline [] = |
2030 | { | |
2031 | 0xe08e0000, /* add r0, lr, r0 */ | |
2032 | 0xe5901004, /* ldr r1, [r0,#4] */ | |
2033 | 0xe12fff11, /* bx r1 */ | |
2034 | }; | |
2035 | ||
2036 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = | |
2037 | { | |
2038 | 0xe52d2004, /* push {r2} */ | |
2039 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ | |
2040 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ | |
2041 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ | |
2042 | 0xe081100f, /* 2: add r1, pc */ | |
2043 | 0xe12fff12, /* bx r2 */ | |
2044 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 | |
2045 | + dl_tlsdesc_lazy_resolver(GOT) */ | |
2046 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ | |
2047 | }; | |
2048 | ||
5e681ec4 PB |
2049 | #ifdef FOUR_WORD_PLT |
2050 | ||
252b5132 RH |
2051 | /* The first entry in a procedure linkage table looks like |
2052 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 2053 | called before the relocation has been set up calls the dynamic |
9b485d32 | 2054 | linker first. */ |
e5a52504 | 2055 | static const bfd_vma elf32_arm_plt0_entry [] = |
5e681ec4 PB |
2056 | { |
2057 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2058 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
2059 | 0xe08fe00e, /* add lr, pc, lr */ | |
2060 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2061 | }; | |
2062 | ||
2063 | /* Subsequent entries in a procedure linkage table look like | |
2064 | this. */ | |
e5a52504 | 2065 | static const bfd_vma elf32_arm_plt_entry [] = |
5e681ec4 PB |
2066 | { |
2067 | 0xe28fc600, /* add ip, pc, #NN */ | |
2068 | 0xe28cca00, /* add ip, ip, #NN */ | |
2069 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
2070 | 0x00000000, /* unused */ | |
2071 | }; | |
2072 | ||
2073 | #else | |
2074 | ||
5e681ec4 PB |
2075 | /* The first entry in a procedure linkage table looks like |
2076 | this. It is set up so that any shared library function that is | |
2077 | called before the relocation has been set up calls the dynamic | |
2078 | linker first. */ | |
e5a52504 | 2079 | static const bfd_vma elf32_arm_plt0_entry [] = |
917583ad | 2080 | { |
5e681ec4 PB |
2081 | 0xe52de004, /* str lr, [sp, #-4]! */ |
2082 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
2083 | 0xe08fe00e, /* add lr, pc, lr */ | |
2084 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2085 | 0x00000000, /* &GOT[0] - . */ | |
917583ad | 2086 | }; |
252b5132 RH |
2087 | |
2088 | /* Subsequent entries in a procedure linkage table look like | |
2089 | this. */ | |
e5a52504 | 2090 | static const bfd_vma elf32_arm_plt_entry [] = |
5e681ec4 PB |
2091 | { |
2092 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
2093 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2094 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2095 | }; | |
2096 | ||
2097 | #endif | |
252b5132 | 2098 | |
00a97672 RS |
2099 | /* The format of the first entry in the procedure linkage table |
2100 | for a VxWorks executable. */ | |
2101 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
2102 | { | |
2103 | 0xe52dc008, /* str ip,[sp,#-8]! */ | |
2104 | 0xe59fc000, /* ldr ip,[pc] */ | |
2105 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
2106 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
2107 | }; | |
2108 | ||
2109 | /* The format of subsequent entries in a VxWorks executable. */ | |
2110 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
2111 | { | |
2112 | 0xe59fc000, /* ldr ip,[pc] */ | |
2113 | 0xe59cf000, /* ldr pc,[ip] */ | |
2114 | 0x00000000, /* .long @got */ | |
2115 | 0xe59fc000, /* ldr ip,[pc] */ | |
2116 | 0xea000000, /* b _PLT */ | |
2117 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2118 | }; | |
2119 | ||
2120 | /* The format of entries in a VxWorks shared library. */ | |
2121 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
2122 | { | |
2123 | 0xe59fc000, /* ldr ip,[pc] */ | |
2124 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
2125 | 0x00000000, /* .long @got */ | |
2126 | 0xe59fc000, /* ldr ip,[pc] */ | |
2127 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
2128 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2129 | }; | |
2130 | ||
b7693d02 DJ |
2131 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
2132 | #define PLT_THUMB_STUB_SIZE 4 | |
2133 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
2134 | { | |
2135 | 0x4778, /* bx pc */ | |
2136 | 0x46c0 /* nop */ | |
2137 | }; | |
2138 | ||
e5a52504 MM |
2139 | /* The entries in a PLT when using a DLL-based target with multiple |
2140 | address spaces. */ | |
906e58ca | 2141 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
e5a52504 | 2142 | { |
83a358aa | 2143 | 0xe51ff004, /* ldr pc, [pc, #-4] */ |
e5a52504 MM |
2144 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ |
2145 | }; | |
2146 | ||
906e58ca NC |
2147 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
2148 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) | |
2149 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) | |
2150 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) | |
2151 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) | |
2152 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) | |
2153 | ||
461a49ca DJ |
2154 | enum stub_insn_type |
2155 | { | |
2156 | THUMB16_TYPE = 1, | |
2157 | THUMB32_TYPE, | |
2158 | ARM_TYPE, | |
2159 | DATA_TYPE | |
2160 | }; | |
2161 | ||
48229727 JB |
2162 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2163 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2164 | is inserted in arm_build_one_stub(). */ | |
2165 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2166 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
2167 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} | |
2168 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2169 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2170 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2171 | |
2172 | typedef struct | |
2173 | { | |
2174 | bfd_vma data; | |
2175 | enum stub_insn_type type; | |
ebe24dd4 | 2176 | unsigned int r_type; |
461a49ca DJ |
2177 | int reloc_addend; |
2178 | } insn_sequence; | |
2179 | ||
fea2b4d6 CL |
2180 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2181 | to reach the stub if necessary. */ | |
461a49ca | 2182 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
906e58ca | 2183 | { |
461a49ca DJ |
2184 | ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */ |
2185 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2186 | }; |
2187 | ||
fea2b4d6 CL |
2188 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2189 | available. */ | |
461a49ca | 2190 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
906e58ca | 2191 | { |
461a49ca DJ |
2192 | ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ |
2193 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2194 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2195 | }; |
2196 | ||
d3626fb0 | 2197 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2198 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
906e58ca | 2199 | { |
461a49ca DJ |
2200 | THUMB16_INSN(0xb401), /* push {r0} */ |
2201 | THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */ | |
2202 | THUMB16_INSN(0x4684), /* mov ip, r0 */ | |
2203 | THUMB16_INSN(0xbc01), /* pop {r0} */ | |
2204 | THUMB16_INSN(0x4760), /* bx ip */ | |
2205 | THUMB16_INSN(0xbf00), /* nop */ | |
2206 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2207 | }; |
2208 | ||
d3626fb0 CL |
2209 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2210 | allowed. */ | |
2211 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
2212 | { | |
2213 | THUMB16_INSN(0x4778), /* bx pc */ | |
2214 | THUMB16_INSN(0x46c0), /* nop */ | |
2215 | ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ | |
2216 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2217 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2218 | }; | |
2219 | ||
fea2b4d6 CL |
2220 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2221 | available. */ | |
461a49ca | 2222 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
906e58ca | 2223 | { |
461a49ca DJ |
2224 | THUMB16_INSN(0x4778), /* bx pc */ |
2225 | THUMB16_INSN(0x46c0), /* nop */ | |
2226 | ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2227 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2228 | }; |
2229 | ||
fea2b4d6 CL |
2230 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2231 | one, when the destination is close enough. */ | |
461a49ca | 2232 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
c820be07 | 2233 | { |
461a49ca DJ |
2234 | THUMB16_INSN(0x4778), /* bx pc */ |
2235 | THUMB16_INSN(0x46c0), /* nop */ | |
2236 | ARM_REL_INSN(0xea000000, -8), /* b (X-8) */ | |
c820be07 NC |
2237 | }; |
2238 | ||
cf3eccff | 2239 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2240 | blx to reach the stub if necessary. */ |
cf3eccff | 2241 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
906e58ca | 2242 | { |
9ae92b05 | 2243 | ARM_INSN(0xe59fc000), /* ldr ip, [pc] */ |
461a49ca DJ |
2244 | ARM_INSN(0xe08ff00c), /* add pc, pc, ip */ |
2245 | DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
906e58ca NC |
2246 | }; |
2247 | ||
cf3eccff DJ |
2248 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2249 | blx to reach the stub if necessary. We can not add into pc; | |
2250 | it is not guaranteed to mode switch (different in ARMv6 and | |
2251 | ARMv7). */ | |
2252 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
2253 | { | |
9ae92b05 | 2254 | ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ |
cf3eccff DJ |
2255 | ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ |
2256 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2257 | DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2258 | }; | |
2259 | ||
ebe24dd4 CL |
2260 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2261 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
2262 | { | |
2263 | ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ | |
2264 | ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ | |
2265 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2266 | DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2267 | }; | |
2268 | ||
2269 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2270 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
2271 | { | |
2272 | THUMB16_INSN(0x4778), /* bx pc */ | |
2273 | THUMB16_INSN(0x46c0), /* nop */ | |
2274 | ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ | |
2275 | ARM_INSN(0xe08cf00f), /* add pc, ip, pc */ | |
2276 | DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
2277 | }; | |
2278 | ||
d3626fb0 CL |
2279 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2280 | architectures. */ | |
ebe24dd4 CL |
2281 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
2282 | { | |
2283 | THUMB16_INSN(0xb401), /* push {r0} */ | |
2284 | THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */ | |
2285 | THUMB16_INSN(0x46fc), /* mov ip, pc */ | |
2286 | THUMB16_INSN(0x4484), /* add ip, r0 */ | |
2287 | THUMB16_INSN(0xbc01), /* pop {r0} */ | |
2288 | THUMB16_INSN(0x4760), /* bx ip */ | |
2289 | DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ | |
2290 | }; | |
2291 | ||
d3626fb0 CL |
2292 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2293 | allowed. */ | |
2294 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
2295 | { | |
2296 | THUMB16_INSN(0x4778), /* bx pc */ | |
2297 | THUMB16_INSN(0x46c0), /* nop */ | |
2298 | ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ | |
2299 | ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ | |
2300 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2301 | DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2302 | }; | |
2303 | ||
0855e32b NS |
2304 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
2305 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2306 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = | |
2307 | { | |
2308 | ARM_INSN(0xe59f1000), /* ldr r1, [pc] */ | |
2309 | ARM_INSN(0xe08ff001), /* add pc, pc, r1 */ | |
2310 | DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
2311 | }; | |
2312 | ||
2313 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a | |
2314 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2315 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = | |
2316 | { | |
2317 | THUMB16_INSN(0x4778), /* bx pc */ | |
2318 | THUMB16_INSN(0x46c0), /* nop */ | |
2319 | ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */ | |
2320 | ARM_INSN(0xe081f00f), /* add pc, r1, pc */ | |
2321 | DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
2322 | }; | |
2323 | ||
48229727 JB |
2324 | /* Cortex-A8 erratum-workaround stubs. */ |
2325 | ||
2326 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2327 | can't use a conditional branch to reach this stub). */ | |
2328 | ||
2329 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
2330 | { | |
2331 | THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */ | |
2332 | THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */ | |
2333 | THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2334 | }; | |
2335 | ||
2336 | /* Stub used for b.w and bl.w instructions. */ | |
2337 | ||
2338 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
2339 | { | |
2340 | THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */ | |
2341 | }; | |
2342 | ||
2343 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
2344 | { | |
2345 | THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */ | |
2346 | }; | |
2347 | ||
2348 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2349 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2350 | real destination using an ARM-mode branch. */ | |
2351 | ||
2352 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
2353 | { | |
2354 | ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */ | |
2355 | }; | |
2356 | ||
906e58ca NC |
2357 | /* Section name for stubs is the associated section name plus this |
2358 | string. */ | |
2359 | #define STUB_SUFFIX ".stub" | |
2360 | ||
738a79f6 CL |
2361 | /* One entry per long/short branch stub defined above. */ |
2362 | #define DEF_STUBS \ | |
2363 | DEF_STUB(long_branch_any_any) \ | |
2364 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
2365 | DEF_STUB(long_branch_thumb_only) \ | |
2366 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
2367 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
2368 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
2369 | DEF_STUB(long_branch_any_arm_pic) \ | |
2370 | DEF_STUB(long_branch_any_thumb_pic) \ | |
2371 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
2372 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
2373 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
48229727 | 2374 | DEF_STUB(long_branch_thumb_only_pic) \ |
0855e32b NS |
2375 | DEF_STUB(long_branch_any_tls_pic) \ |
2376 | DEF_STUB(long_branch_v4t_thumb_tls_pic) \ | |
48229727 JB |
2377 | DEF_STUB(a8_veneer_b_cond) \ |
2378 | DEF_STUB(a8_veneer_b) \ | |
2379 | DEF_STUB(a8_veneer_bl) \ | |
2380 | DEF_STUB(a8_veneer_blx) | |
738a79f6 CL |
2381 | |
2382 | #define DEF_STUB(x) arm_stub_##x, | |
2383 | enum elf32_arm_stub_type { | |
906e58ca | 2384 | arm_stub_none, |
738a79f6 | 2385 | DEF_STUBS |
eb7c4339 NS |
2386 | /* Note the first a8_veneer type */ |
2387 | arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond | |
738a79f6 CL |
2388 | }; |
2389 | #undef DEF_STUB | |
2390 | ||
2391 | typedef struct | |
2392 | { | |
d3ce72d0 | 2393 | const insn_sequence* template_sequence; |
738a79f6 CL |
2394 | int template_size; |
2395 | } stub_def; | |
2396 | ||
2397 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
2398 | static const stub_def stub_definitions[] = { | |
2399 | {NULL, 0}, | |
2400 | DEF_STUBS | |
906e58ca NC |
2401 | }; |
2402 | ||
2403 | struct elf32_arm_stub_hash_entry | |
2404 | { | |
2405 | /* Base hash table entry structure. */ | |
2406 | struct bfd_hash_entry root; | |
2407 | ||
2408 | /* The stub section. */ | |
2409 | asection *stub_sec; | |
2410 | ||
2411 | /* Offset within stub_sec of the beginning of this stub. */ | |
2412 | bfd_vma stub_offset; | |
2413 | ||
2414 | /* Given the symbol's value and its section we can determine its final | |
2415 | value when building the stubs (so the stub knows where to jump). */ | |
2416 | bfd_vma target_value; | |
2417 | asection *target_section; | |
2418 | ||
48229727 JB |
2419 | /* Offset to apply to relocation referencing target_value. */ |
2420 | bfd_vma target_addend; | |
2421 | ||
2422 | /* The instruction which caused this stub to be generated (only valid for | |
2423 | Cortex-A8 erratum workaround stubs at present). */ | |
2424 | unsigned long orig_insn; | |
2425 | ||
461a49ca | 2426 | /* The stub type. */ |
906e58ca | 2427 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2428 | /* Its encoding size in bytes. */ |
2429 | int stub_size; | |
2430 | /* Its template. */ | |
2431 | const insn_sequence *stub_template; | |
2432 | /* The size of the template (number of entries). */ | |
2433 | int stub_template_size; | |
906e58ca NC |
2434 | |
2435 | /* The symbol table entry, if any, that this was derived from. */ | |
2436 | struct elf32_arm_link_hash_entry *h; | |
2437 | ||
35fc36a8 RS |
2438 | /* Type of branch. */ |
2439 | enum arm_st_branch_type branch_type; | |
906e58ca NC |
2440 | |
2441 | /* Where this stub is being called from, or, in the case of combined | |
2442 | stub sections, the first input section in the group. */ | |
2443 | asection *id_sec; | |
7413f23f DJ |
2444 | |
2445 | /* The name for the local symbol at the start of this stub. The | |
2446 | stub name in the hash table has to be unique; this does not, so | |
2447 | it can be friendlier. */ | |
2448 | char *output_name; | |
906e58ca NC |
2449 | }; |
2450 | ||
e489d0ae PB |
2451 | /* Used to build a map of a section. This is required for mixed-endian |
2452 | code/data. */ | |
2453 | ||
2454 | typedef struct elf32_elf_section_map | |
2455 | { | |
2456 | bfd_vma vma; | |
2457 | char type; | |
2458 | } | |
2459 | elf32_arm_section_map; | |
2460 | ||
c7b8f16e JB |
2461 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2462 | ||
2463 | typedef enum | |
2464 | { | |
2465 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2466 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2467 | VFP11_ERRATUM_ARM_VENEER, | |
2468 | VFP11_ERRATUM_THUMB_VENEER | |
2469 | } | |
2470 | elf32_vfp11_erratum_type; | |
2471 | ||
2472 | typedef struct elf32_vfp11_erratum_list | |
2473 | { | |
2474 | struct elf32_vfp11_erratum_list *next; | |
2475 | bfd_vma vma; | |
2476 | union | |
2477 | { | |
2478 | struct | |
2479 | { | |
2480 | struct elf32_vfp11_erratum_list *veneer; | |
2481 | unsigned int vfp_insn; | |
2482 | } b; | |
2483 | struct | |
2484 | { | |
2485 | struct elf32_vfp11_erratum_list *branch; | |
2486 | unsigned int id; | |
2487 | } v; | |
2488 | } u; | |
2489 | elf32_vfp11_erratum_type type; | |
2490 | } | |
2491 | elf32_vfp11_erratum_list; | |
2492 | ||
2468f9c9 PB |
2493 | typedef enum |
2494 | { | |
2495 | DELETE_EXIDX_ENTRY, | |
2496 | INSERT_EXIDX_CANTUNWIND_AT_END | |
2497 | } | |
2498 | arm_unwind_edit_type; | |
2499 | ||
2500 | /* A (sorted) list of edits to apply to an unwind table. */ | |
2501 | typedef struct arm_unwind_table_edit | |
2502 | { | |
2503 | arm_unwind_edit_type type; | |
2504 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
2505 | section different from the one we're currently writing out, so record the | |
2506 | (text) section this edit relates to here. */ | |
2507 | asection *linked_section; | |
2508 | unsigned int index; | |
2509 | struct arm_unwind_table_edit *next; | |
2510 | } | |
2511 | arm_unwind_table_edit; | |
2512 | ||
8e3de13a | 2513 | typedef struct _arm_elf_section_data |
e489d0ae | 2514 | { |
2468f9c9 | 2515 | /* Information about mapping symbols. */ |
e489d0ae | 2516 | struct bfd_elf_section_data elf; |
8e3de13a | 2517 | unsigned int mapcount; |
c7b8f16e | 2518 | unsigned int mapsize; |
e489d0ae | 2519 | elf32_arm_section_map *map; |
2468f9c9 | 2520 | /* Information about CPU errata. */ |
c7b8f16e JB |
2521 | unsigned int erratumcount; |
2522 | elf32_vfp11_erratum_list *erratumlist; | |
2468f9c9 PB |
2523 | /* Information about unwind tables. */ |
2524 | union | |
2525 | { | |
2526 | /* Unwind info attached to a text section. */ | |
2527 | struct | |
2528 | { | |
2529 | asection *arm_exidx_sec; | |
2530 | } text; | |
2531 | ||
2532 | /* Unwind info attached to an .ARM.exidx section. */ | |
2533 | struct | |
2534 | { | |
2535 | arm_unwind_table_edit *unwind_edit_list; | |
2536 | arm_unwind_table_edit *unwind_edit_tail; | |
2537 | } exidx; | |
2538 | } u; | |
8e3de13a NC |
2539 | } |
2540 | _arm_elf_section_data; | |
e489d0ae PB |
2541 | |
2542 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 2543 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 2544 | |
48229727 JB |
2545 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
2546 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
2547 | so may be created multiple times: we use an array of these entries whilst | |
2548 | relaxing which we can refresh easily, then create stubs for each potentially | |
2549 | erratum-triggering instruction once we've settled on a solution. */ | |
2550 | ||
2551 | struct a8_erratum_fix { | |
2552 | bfd *input_bfd; | |
2553 | asection *section; | |
2554 | bfd_vma offset; | |
2555 | bfd_vma addend; | |
2556 | unsigned long orig_insn; | |
2557 | char *stub_name; | |
2558 | enum elf32_arm_stub_type stub_type; | |
35fc36a8 | 2559 | enum arm_st_branch_type branch_type; |
48229727 JB |
2560 | }; |
2561 | ||
2562 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
2563 | erratum. */ | |
2564 | ||
2565 | struct a8_erratum_reloc { | |
2566 | bfd_vma from; | |
2567 | bfd_vma destination; | |
92750f34 DJ |
2568 | struct elf32_arm_link_hash_entry *hash; |
2569 | const char *sym_name; | |
48229727 | 2570 | unsigned int r_type; |
35fc36a8 | 2571 | enum arm_st_branch_type branch_type; |
48229727 JB |
2572 | bfd_boolean non_a8_stub; |
2573 | }; | |
2574 | ||
ba93b8ac DJ |
2575 | /* The size of the thread control block. */ |
2576 | #define TCB_SIZE 8 | |
2577 | ||
34e77a92 RS |
2578 | /* ARM-specific information about a PLT entry, over and above the usual |
2579 | gotplt_union. */ | |
2580 | struct arm_plt_info { | |
2581 | /* We reference count Thumb references to a PLT entry separately, | |
2582 | so that we can emit the Thumb trampoline only if needed. */ | |
2583 | bfd_signed_vma thumb_refcount; | |
2584 | ||
2585 | /* Some references from Thumb code may be eliminated by BL->BLX | |
2586 | conversion, so record them separately. */ | |
2587 | bfd_signed_vma maybe_thumb_refcount; | |
2588 | ||
2589 | /* How many of the recorded PLT accesses were from non-call relocations. | |
2590 | This information is useful when deciding whether anything takes the | |
2591 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all | |
2592 | non-call references to the function should resolve directly to the | |
2593 | real runtime target. */ | |
2594 | unsigned int noncall_refcount; | |
2595 | ||
2596 | /* Since PLT entries have variable size if the Thumb prologue is | |
2597 | used, we need to record the index into .got.plt instead of | |
2598 | recomputing it from the PLT offset. */ | |
2599 | bfd_signed_vma got_offset; | |
2600 | }; | |
2601 | ||
2602 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ | |
2603 | struct arm_local_iplt_info { | |
2604 | /* The information that is usually found in the generic ELF part of | |
2605 | the hash table entry. */ | |
2606 | union gotplt_union root; | |
2607 | ||
2608 | /* The information that is usually found in the ARM-specific part of | |
2609 | the hash table entry. */ | |
2610 | struct arm_plt_info arm; | |
2611 | ||
2612 | /* A list of all potential dynamic relocations against this symbol. */ | |
2613 | struct elf_dyn_relocs *dyn_relocs; | |
2614 | }; | |
2615 | ||
0ffa91dd | 2616 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
2617 | { |
2618 | struct elf_obj_tdata root; | |
2619 | ||
2620 | /* tls_type for each local got entry. */ | |
2621 | char *local_got_tls_type; | |
ee065d83 | 2622 | |
0855e32b NS |
2623 | /* GOTPLT entries for TLS descriptors. */ |
2624 | bfd_vma *local_tlsdesc_gotent; | |
2625 | ||
34e77a92 RS |
2626 | /* Information for local symbols that need entries in .iplt. */ |
2627 | struct arm_local_iplt_info **local_iplt; | |
2628 | ||
bf21ed78 MS |
2629 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
2630 | int no_enum_size_warning; | |
a9dc9481 JM |
2631 | |
2632 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
2633 | int no_wchar_size_warning; | |
ba93b8ac DJ |
2634 | }; |
2635 | ||
0ffa91dd NC |
2636 | #define elf_arm_tdata(bfd) \ |
2637 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 2638 | |
0ffa91dd NC |
2639 | #define elf32_arm_local_got_tls_type(bfd) \ |
2640 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
2641 | ||
0855e32b NS |
2642 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
2643 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) | |
2644 | ||
34e77a92 RS |
2645 | #define elf32_arm_local_iplt(bfd) \ |
2646 | (elf_arm_tdata (bfd)->local_iplt) | |
2647 | ||
0ffa91dd NC |
2648 | #define is_arm_elf(bfd) \ |
2649 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
2650 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 2651 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac DJ |
2652 | |
2653 | static bfd_boolean | |
2654 | elf32_arm_mkobject (bfd *abfd) | |
2655 | { | |
0ffa91dd | 2656 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 2657 | ARM_ELF_DATA); |
ba93b8ac DJ |
2658 | } |
2659 | ||
ba93b8ac DJ |
2660 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
2661 | ||
ba96a88f | 2662 | /* Arm ELF linker hash entry. */ |
252b5132 | 2663 | struct elf32_arm_link_hash_entry |
917583ad NC |
2664 | { |
2665 | struct elf_link_hash_entry root; | |
252b5132 | 2666 | |
0bdcacaf RS |
2667 | /* Track dynamic relocs copied for this symbol. */ |
2668 | struct elf_dyn_relocs *dyn_relocs; | |
b7693d02 | 2669 | |
34e77a92 RS |
2670 | /* ARM-specific PLT information. */ |
2671 | struct arm_plt_info plt; | |
ba93b8ac DJ |
2672 | |
2673 | #define GOT_UNKNOWN 0 | |
2674 | #define GOT_NORMAL 1 | |
2675 | #define GOT_TLS_GD 2 | |
2676 | #define GOT_TLS_IE 4 | |
0855e32b NS |
2677 | #define GOT_TLS_GDESC 8 |
2678 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) | |
34e77a92 RS |
2679 | unsigned int tls_type : 8; |
2680 | ||
2681 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ | |
2682 | unsigned int is_iplt : 1; | |
2683 | ||
2684 | unsigned int unused : 23; | |
a4fd1a8e | 2685 | |
0855e32b NS |
2686 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
2687 | starting at the end of the jump table. */ | |
2688 | bfd_vma tlsdesc_got; | |
2689 | ||
a4fd1a8e PB |
2690 | /* The symbol marking the real symbol location for exported thumb |
2691 | symbols with Arm stubs. */ | |
2692 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 2693 | |
da5938a2 | 2694 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 2695 | symbol. */ |
da5938a2 | 2696 | struct elf32_arm_stub_hash_entry *stub_cache; |
917583ad | 2697 | }; |
252b5132 | 2698 | |
252b5132 | 2699 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
2700 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
2701 | (elf_link_hash_traverse \ | |
2702 | (&(table)->root, \ | |
b7693d02 | 2703 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
2704 | (info))) |
2705 | ||
2706 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
2707 | #define elf32_arm_hash_table(info) \ | |
4dfe6ac6 NC |
2708 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
2709 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) | |
252b5132 | 2710 | |
906e58ca NC |
2711 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
2712 | ((struct elf32_arm_stub_hash_entry *) \ | |
2713 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
2714 | ||
21d799b5 NC |
2715 | /* Array to keep track of which stub sections have been created, and |
2716 | information on stub grouping. */ | |
2717 | struct map_stub | |
2718 | { | |
2719 | /* This is the section to which stubs in the group will be | |
2720 | attached. */ | |
2721 | asection *link_sec; | |
2722 | /* The stub section. */ | |
2723 | asection *stub_sec; | |
2724 | }; | |
2725 | ||
0855e32b NS |
2726 | #define elf32_arm_compute_jump_table_size(htab) \ |
2727 | ((htab)->next_tls_desc_index * 4) | |
2728 | ||
9b485d32 | 2729 | /* ARM ELF linker hash table. */ |
252b5132 | 2730 | struct elf32_arm_link_hash_table |
906e58ca NC |
2731 | { |
2732 | /* The main hash table. */ | |
2733 | struct elf_link_hash_table root; | |
252b5132 | 2734 | |
906e58ca NC |
2735 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
2736 | bfd_size_type thumb_glue_size; | |
252b5132 | 2737 | |
906e58ca NC |
2738 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
2739 | bfd_size_type arm_glue_size; | |
252b5132 | 2740 | |
906e58ca NC |
2741 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
2742 | bfd_size_type bx_glue_size; | |
845b51d6 | 2743 | |
906e58ca NC |
2744 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
2745 | veneer has been populated. */ | |
2746 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 2747 | |
906e58ca NC |
2748 | /* The size in bytes of the section containing glue for VFP11 erratum |
2749 | veneers. */ | |
2750 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 2751 | |
48229727 JB |
2752 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
2753 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
2754 | elf32_arm_write_section(). */ | |
2755 | struct a8_erratum_fix *a8_erratum_fixes; | |
2756 | unsigned int num_a8_erratum_fixes; | |
2757 | ||
906e58ca NC |
2758 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
2759 | bfd * bfd_of_glue_owner; | |
ba96a88f | 2760 | |
906e58ca NC |
2761 | /* Nonzero to output a BE8 image. */ |
2762 | int byteswap_code; | |
e489d0ae | 2763 | |
906e58ca NC |
2764 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
2765 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
2766 | int target1_is_rel; | |
9c504268 | 2767 | |
906e58ca NC |
2768 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
2769 | int target2_reloc; | |
eb043451 | 2770 | |
906e58ca NC |
2771 | /* 0 = Ignore R_ARM_V4BX. |
2772 | 1 = Convert BX to MOV PC. | |
2773 | 2 = Generate v4 interworing stubs. */ | |
2774 | int fix_v4bx; | |
319850b4 | 2775 | |
48229727 JB |
2776 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
2777 | int fix_cortex_a8; | |
2778 | ||
906e58ca NC |
2779 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
2780 | int use_blx; | |
33bfe774 | 2781 | |
906e58ca NC |
2782 | /* What sort of code sequences we should look for which may trigger the |
2783 | VFP11 denorm erratum. */ | |
2784 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 2785 | |
906e58ca NC |
2786 | /* Global counter for the number of fixes we have emitted. */ |
2787 | int num_vfp11_fixes; | |
c7b8f16e | 2788 | |
906e58ca NC |
2789 | /* Nonzero to force PIC branch veneers. */ |
2790 | int pic_veneer; | |
27e55c4d | 2791 | |
906e58ca NC |
2792 | /* The number of bytes in the initial entry in the PLT. */ |
2793 | bfd_size_type plt_header_size; | |
e5a52504 | 2794 | |
906e58ca NC |
2795 | /* The number of bytes in the subsequent PLT etries. */ |
2796 | bfd_size_type plt_entry_size; | |
e5a52504 | 2797 | |
906e58ca NC |
2798 | /* True if the target system is VxWorks. */ |
2799 | int vxworks_p; | |
00a97672 | 2800 | |
906e58ca NC |
2801 | /* True if the target system is Symbian OS. */ |
2802 | int symbian_p; | |
e5a52504 | 2803 | |
906e58ca NC |
2804 | /* True if the target uses REL relocations. */ |
2805 | int use_rel; | |
4e7fd91e | 2806 | |
0855e32b NS |
2807 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
2808 | bfd_vma next_tls_desc_index; | |
2809 | ||
2810 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ | |
2811 | bfd_vma num_tls_desc; | |
2812 | ||
906e58ca | 2813 | /* Short-cuts to get to dynamic linker sections. */ |
906e58ca NC |
2814 | asection *sdynbss; |
2815 | asection *srelbss; | |
5e681ec4 | 2816 | |
906e58ca NC |
2817 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
2818 | asection *srelplt2; | |
00a97672 | 2819 | |
0855e32b NS |
2820 | /* The offset into splt of the PLT entry for the TLS descriptor |
2821 | resolver. Special values are 0, if not necessary (or not found | |
2822 | to be necessary yet), and -1 if needed but not determined | |
2823 | yet. */ | |
2824 | bfd_vma dt_tlsdesc_plt; | |
2825 | ||
2826 | /* The offset into sgot of the GOT entry used by the PLT entry | |
2827 | above. */ | |
2828 | bfd_vma dt_tlsdesc_got; | |
2829 | ||
2830 | /* Offset in .plt section of tls_arm_trampoline. */ | |
2831 | bfd_vma tls_trampoline; | |
2832 | ||
906e58ca NC |
2833 | /* Data for R_ARM_TLS_LDM32 relocations. */ |
2834 | union | |
2835 | { | |
2836 | bfd_signed_vma refcount; | |
2837 | bfd_vma offset; | |
2838 | } tls_ldm_got; | |
b7693d02 | 2839 | |
87d72d41 AM |
2840 | /* Small local sym cache. */ |
2841 | struct sym_cache sym_cache; | |
906e58ca NC |
2842 | |
2843 | /* For convenience in allocate_dynrelocs. */ | |
2844 | bfd * obfd; | |
2845 | ||
0855e32b NS |
2846 | /* The amount of space used by the reserved portion of the sgotplt |
2847 | section, plus whatever space is used by the jump slots. */ | |
2848 | bfd_vma sgotplt_jump_table_size; | |
2849 | ||
906e58ca NC |
2850 | /* The stub hash table. */ |
2851 | struct bfd_hash_table stub_hash_table; | |
2852 | ||
2853 | /* Linker stub bfd. */ | |
2854 | bfd *stub_bfd; | |
2855 | ||
2856 | /* Linker call-backs. */ | |
2857 | asection * (*add_stub_section) (const char *, asection *); | |
2858 | void (*layout_sections_again) (void); | |
2859 | ||
2860 | /* Array to keep track of which stub sections have been created, and | |
2861 | information on stub grouping. */ | |
21d799b5 | 2862 | struct map_stub *stub_group; |
906e58ca | 2863 | |
fe33d2fa CL |
2864 | /* Number of elements in stub_group. */ |
2865 | int top_id; | |
2866 | ||
906e58ca NC |
2867 | /* Assorted information used by elf32_arm_size_stubs. */ |
2868 | unsigned int bfd_count; | |
2869 | int top_index; | |
2870 | asection **input_list; | |
2871 | }; | |
252b5132 | 2872 | |
780a67af NC |
2873 | /* Create an entry in an ARM ELF linker hash table. */ |
2874 | ||
2875 | static struct bfd_hash_entry * | |
57e8b36a NC |
2876 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
2877 | struct bfd_hash_table * table, | |
2878 | const char * string) | |
780a67af NC |
2879 | { |
2880 | struct elf32_arm_link_hash_entry * ret = | |
2881 | (struct elf32_arm_link_hash_entry *) entry; | |
2882 | ||
2883 | /* Allocate the structure if it has not already been allocated by a | |
2884 | subclass. */ | |
906e58ca | 2885 | if (ret == NULL) |
21d799b5 NC |
2886 | ret = (struct elf32_arm_link_hash_entry *) |
2887 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); | |
57e8b36a | 2888 | if (ret == NULL) |
780a67af NC |
2889 | return (struct bfd_hash_entry *) ret; |
2890 | ||
2891 | /* Call the allocation method of the superclass. */ | |
2892 | ret = ((struct elf32_arm_link_hash_entry *) | |
2893 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
2894 | table, string)); | |
57e8b36a | 2895 | if (ret != NULL) |
b7693d02 | 2896 | { |
0bdcacaf | 2897 | ret->dyn_relocs = NULL; |
ba93b8ac | 2898 | ret->tls_type = GOT_UNKNOWN; |
0855e32b | 2899 | ret->tlsdesc_got = (bfd_vma) -1; |
34e77a92 RS |
2900 | ret->plt.thumb_refcount = 0; |
2901 | ret->plt.maybe_thumb_refcount = 0; | |
2902 | ret->plt.noncall_refcount = 0; | |
2903 | ret->plt.got_offset = -1; | |
2904 | ret->is_iplt = FALSE; | |
a4fd1a8e | 2905 | ret->export_glue = NULL; |
906e58ca NC |
2906 | |
2907 | ret->stub_cache = NULL; | |
b7693d02 | 2908 | } |
780a67af NC |
2909 | |
2910 | return (struct bfd_hash_entry *) ret; | |
2911 | } | |
2912 | ||
34e77a92 RS |
2913 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
2914 | symbols. */ | |
2915 | ||
2916 | static bfd_boolean | |
2917 | elf32_arm_allocate_local_sym_info (bfd *abfd) | |
2918 | { | |
2919 | if (elf_local_got_refcounts (abfd) == NULL) | |
2920 | { | |
2921 | bfd_size_type num_syms; | |
2922 | bfd_size_type size; | |
2923 | char *data; | |
2924 | ||
2925 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; | |
2926 | size = num_syms * (sizeof (bfd_signed_vma) | |
2927 | + sizeof (struct arm_local_iplt_info *) | |
2928 | + sizeof (bfd_vma) | |
2929 | + sizeof (char)); | |
2930 | data = bfd_zalloc (abfd, size); | |
2931 | if (data == NULL) | |
2932 | return FALSE; | |
2933 | ||
2934 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data; | |
2935 | data += num_syms * sizeof (bfd_signed_vma); | |
2936 | ||
2937 | elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data; | |
2938 | data += num_syms * sizeof (struct arm_local_iplt_info *); | |
2939 | ||
2940 | elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data; | |
2941 | data += num_syms * sizeof (bfd_vma); | |
2942 | ||
2943 | elf32_arm_local_got_tls_type (abfd) = data; | |
2944 | } | |
2945 | return TRUE; | |
2946 | } | |
2947 | ||
2948 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs | |
2949 | to input bfd ABFD. Create the information if it doesn't already exist. | |
2950 | Return null if an allocation fails. */ | |
2951 | ||
2952 | static struct arm_local_iplt_info * | |
2953 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) | |
2954 | { | |
2955 | struct arm_local_iplt_info **ptr; | |
2956 | ||
2957 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
2958 | return NULL; | |
2959 | ||
2960 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); | |
2961 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; | |
2962 | if (*ptr == NULL) | |
2963 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); | |
2964 | return *ptr; | |
2965 | } | |
2966 | ||
2967 | /* Try to obtain PLT information for the symbol with index R_SYMNDX | |
2968 | in ABFD's symbol table. If the symbol is global, H points to its | |
2969 | hash table entry, otherwise H is null. | |
2970 | ||
2971 | Return true if the symbol does have PLT information. When returning | |
2972 | true, point *ROOT_PLT at the target-independent reference count/offset | |
2973 | union and *ARM_PLT at the ARM-specific information. */ | |
2974 | ||
2975 | static bfd_boolean | |
2976 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h, | |
2977 | unsigned long r_symndx, union gotplt_union **root_plt, | |
2978 | struct arm_plt_info **arm_plt) | |
2979 | { | |
2980 | struct arm_local_iplt_info *local_iplt; | |
2981 | ||
2982 | if (h != NULL) | |
2983 | { | |
2984 | *root_plt = &h->root.plt; | |
2985 | *arm_plt = &h->plt; | |
2986 | return TRUE; | |
2987 | } | |
2988 | ||
2989 | if (elf32_arm_local_iplt (abfd) == NULL) | |
2990 | return FALSE; | |
2991 | ||
2992 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; | |
2993 | if (local_iplt == NULL) | |
2994 | return FALSE; | |
2995 | ||
2996 | *root_plt = &local_iplt->root; | |
2997 | *arm_plt = &local_iplt->arm; | |
2998 | return TRUE; | |
2999 | } | |
3000 | ||
3001 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub | |
3002 | before it. */ | |
3003 | ||
3004 | static bfd_boolean | |
3005 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, | |
3006 | struct arm_plt_info *arm_plt) | |
3007 | { | |
3008 | struct elf32_arm_link_hash_table *htab; | |
3009 | ||
3010 | htab = elf32_arm_hash_table (info); | |
3011 | return (arm_plt->thumb_refcount != 0 | |
3012 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)); | |
3013 | } | |
3014 | ||
3015 | /* Return a pointer to the head of the dynamic reloc list that should | |
3016 | be used for local symbol ISYM, which is symbol number R_SYMNDX in | |
3017 | ABFD's symbol table. Return null if an error occurs. */ | |
3018 | ||
3019 | static struct elf_dyn_relocs ** | |
3020 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, | |
3021 | Elf_Internal_Sym *isym) | |
3022 | { | |
3023 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) | |
3024 | { | |
3025 | struct arm_local_iplt_info *local_iplt; | |
3026 | ||
3027 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
3028 | if (local_iplt == NULL) | |
3029 | return NULL; | |
3030 | return &local_iplt->dyn_relocs; | |
3031 | } | |
3032 | else | |
3033 | { | |
3034 | /* Track dynamic relocs needed for local syms too. | |
3035 | We really need local syms available to do this | |
3036 | easily. Oh well. */ | |
3037 | asection *s; | |
3038 | void *vpp; | |
3039 | ||
3040 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
3041 | if (s == NULL) | |
3042 | abort (); | |
3043 | ||
3044 | vpp = &elf_section_data (s)->local_dynrel; | |
3045 | return (struct elf_dyn_relocs **) vpp; | |
3046 | } | |
3047 | } | |
3048 | ||
906e58ca NC |
3049 | /* Initialize an entry in the stub hash table. */ |
3050 | ||
3051 | static struct bfd_hash_entry * | |
3052 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
3053 | struct bfd_hash_table *table, | |
3054 | const char *string) | |
3055 | { | |
3056 | /* Allocate the structure if it has not already been allocated by a | |
3057 | subclass. */ | |
3058 | if (entry == NULL) | |
3059 | { | |
21d799b5 NC |
3060 | entry = (struct bfd_hash_entry *) |
3061 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); | |
906e58ca NC |
3062 | if (entry == NULL) |
3063 | return entry; | |
3064 | } | |
3065 | ||
3066 | /* Call the allocation method of the superclass. */ | |
3067 | entry = bfd_hash_newfunc (entry, table, string); | |
3068 | if (entry != NULL) | |
3069 | { | |
3070 | struct elf32_arm_stub_hash_entry *eh; | |
3071 | ||
3072 | /* Initialize the local fields. */ | |
3073 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
3074 | eh->stub_sec = NULL; | |
3075 | eh->stub_offset = 0; | |
3076 | eh->target_value = 0; | |
3077 | eh->target_section = NULL; | |
cedfb179 DK |
3078 | eh->target_addend = 0; |
3079 | eh->orig_insn = 0; | |
906e58ca | 3080 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
3081 | eh->stub_size = 0; |
3082 | eh->stub_template = NULL; | |
3083 | eh->stub_template_size = 0; | |
906e58ca NC |
3084 | eh->h = NULL; |
3085 | eh->id_sec = NULL; | |
d8d2f433 | 3086 | eh->output_name = NULL; |
906e58ca NC |
3087 | } |
3088 | ||
3089 | return entry; | |
3090 | } | |
3091 | ||
00a97672 | 3092 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
3093 | shortcuts to them in our hash table. */ |
3094 | ||
3095 | static bfd_boolean | |
57e8b36a | 3096 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3097 | { |
3098 | struct elf32_arm_link_hash_table *htab; | |
3099 | ||
e5a52504 | 3100 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3101 | if (htab == NULL) |
3102 | return FALSE; | |
3103 | ||
e5a52504 MM |
3104 | /* BPABI objects never have a GOT, or associated sections. */ |
3105 | if (htab->symbian_p) | |
3106 | return TRUE; | |
3107 | ||
5e681ec4 PB |
3108 | if (! _bfd_elf_create_got_section (dynobj, info)) |
3109 | return FALSE; | |
3110 | ||
5e681ec4 PB |
3111 | return TRUE; |
3112 | } | |
3113 | ||
34e77a92 RS |
3114 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
3115 | ||
3116 | static bfd_boolean | |
3117 | create_ifunc_sections (struct bfd_link_info *info) | |
3118 | { | |
3119 | struct elf32_arm_link_hash_table *htab; | |
3120 | const struct elf_backend_data *bed; | |
3121 | bfd *dynobj; | |
3122 | asection *s; | |
3123 | flagword flags; | |
3124 | ||
3125 | htab = elf32_arm_hash_table (info); | |
3126 | dynobj = htab->root.dynobj; | |
3127 | bed = get_elf_backend_data (dynobj); | |
3128 | flags = bed->dynamic_sec_flags; | |
3129 | ||
3130 | if (htab->root.iplt == NULL) | |
3131 | { | |
3132 | s = bfd_make_section_with_flags (dynobj, ".iplt", | |
3133 | flags | SEC_READONLY | SEC_CODE); | |
3134 | if (s == NULL | |
3135 | || !bfd_set_section_alignment (abfd, s, bed->plt_alignment)) | |
3136 | return FALSE; | |
3137 | htab->root.iplt = s; | |
3138 | } | |
3139 | ||
3140 | if (htab->root.irelplt == NULL) | |
3141 | { | |
3142 | s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"), | |
3143 | flags | SEC_READONLY); | |
3144 | if (s == NULL | |
3145 | || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align)) | |
3146 | return FALSE; | |
3147 | htab->root.irelplt = s; | |
3148 | } | |
3149 | ||
3150 | if (htab->root.igotplt == NULL) | |
3151 | { | |
3152 | s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags); | |
3153 | if (s == NULL | |
3154 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) | |
3155 | return FALSE; | |
3156 | htab->root.igotplt = s; | |
3157 | } | |
3158 | return TRUE; | |
3159 | } | |
3160 | ||
00a97672 RS |
3161 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
3162 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
3163 | hash table. */ |
3164 | ||
3165 | static bfd_boolean | |
57e8b36a | 3166 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3167 | { |
3168 | struct elf32_arm_link_hash_table *htab; | |
3169 | ||
3170 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3171 | if (htab == NULL) |
3172 | return FALSE; | |
3173 | ||
362d30a1 | 3174 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
5e681ec4 PB |
3175 | return FALSE; |
3176 | ||
3177 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
3178 | return FALSE; | |
3179 | ||
5e681ec4 PB |
3180 | htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss"); |
3181 | if (!info->shared) | |
00a97672 RS |
3182 | htab->srelbss = bfd_get_section_by_name (dynobj, |
3183 | RELOC_SECTION (htab, ".bss")); | |
3184 | ||
3185 | if (htab->vxworks_p) | |
3186 | { | |
3187 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
3188 | return FALSE; | |
3189 | ||
3190 | if (info->shared) | |
3191 | { | |
3192 | htab->plt_header_size = 0; | |
3193 | htab->plt_entry_size | |
3194 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
3195 | } | |
3196 | else | |
3197 | { | |
3198 | htab->plt_header_size | |
3199 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
3200 | htab->plt_entry_size | |
3201 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
3202 | } | |
3203 | } | |
5e681ec4 | 3204 | |
362d30a1 RS |
3205 | if (!htab->root.splt |
3206 | || !htab->root.srelplt | |
e5a52504 | 3207 | || !htab->sdynbss |
5e681ec4 PB |
3208 | || (!info->shared && !htab->srelbss)) |
3209 | abort (); | |
3210 | ||
3211 | return TRUE; | |
3212 | } | |
3213 | ||
906e58ca NC |
3214 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
3215 | ||
3216 | static void | |
3217 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
3218 | struct elf_link_hash_entry *dir, | |
3219 | struct elf_link_hash_entry *ind) | |
3220 | { | |
3221 | struct elf32_arm_link_hash_entry *edir, *eind; | |
3222 | ||
3223 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
3224 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
3225 | ||
0bdcacaf | 3226 | if (eind->dyn_relocs != NULL) |
906e58ca | 3227 | { |
0bdcacaf | 3228 | if (edir->dyn_relocs != NULL) |
906e58ca | 3229 | { |
0bdcacaf RS |
3230 | struct elf_dyn_relocs **pp; |
3231 | struct elf_dyn_relocs *p; | |
906e58ca NC |
3232 | |
3233 | /* Add reloc counts against the indirect sym to the direct sym | |
3234 | list. Merge any entries against the same section. */ | |
0bdcacaf | 3235 | for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) |
906e58ca | 3236 | { |
0bdcacaf | 3237 | struct elf_dyn_relocs *q; |
906e58ca | 3238 | |
0bdcacaf RS |
3239 | for (q = edir->dyn_relocs; q != NULL; q = q->next) |
3240 | if (q->sec == p->sec) | |
906e58ca NC |
3241 | { |
3242 | q->pc_count += p->pc_count; | |
3243 | q->count += p->count; | |
3244 | *pp = p->next; | |
3245 | break; | |
3246 | } | |
3247 | if (q == NULL) | |
3248 | pp = &p->next; | |
3249 | } | |
0bdcacaf | 3250 | *pp = edir->dyn_relocs; |
906e58ca NC |
3251 | } |
3252 | ||
0bdcacaf RS |
3253 | edir->dyn_relocs = eind->dyn_relocs; |
3254 | eind->dyn_relocs = NULL; | |
906e58ca NC |
3255 | } |
3256 | ||
3257 | if (ind->root.type == bfd_link_hash_indirect) | |
3258 | { | |
3259 | /* Copy over PLT info. */ | |
34e77a92 RS |
3260 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
3261 | eind->plt.thumb_refcount = 0; | |
3262 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; | |
3263 | eind->plt.maybe_thumb_refcount = 0; | |
3264 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; | |
3265 | eind->plt.noncall_refcount = 0; | |
3266 | ||
3267 | /* We should only allocate a function to .iplt once the final | |
3268 | symbol information is known. */ | |
3269 | BFD_ASSERT (!eind->is_iplt); | |
906e58ca NC |
3270 | |
3271 | if (dir->got.refcount <= 0) | |
3272 | { | |
3273 | edir->tls_type = eind->tls_type; | |
3274 | eind->tls_type = GOT_UNKNOWN; | |
3275 | } | |
3276 | } | |
3277 | ||
3278 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
3279 | } | |
3280 | ||
3281 | /* Create an ARM elf linker hash table. */ | |
3282 | ||
3283 | static struct bfd_link_hash_table * | |
3284 | elf32_arm_link_hash_table_create (bfd *abfd) | |
3285 | { | |
3286 | struct elf32_arm_link_hash_table *ret; | |
3287 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); | |
3288 | ||
21d799b5 | 3289 | ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt); |
906e58ca NC |
3290 | if (ret == NULL) |
3291 | return NULL; | |
3292 | ||
3293 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
3294 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
3295 | sizeof (struct elf32_arm_link_hash_entry), |
3296 | ARM_ELF_DATA)) | |
906e58ca NC |
3297 | { |
3298 | free (ret); | |
3299 | return NULL; | |
3300 | } | |
3301 | ||
906e58ca NC |
3302 | ret->sdynbss = NULL; |
3303 | ret->srelbss = NULL; | |
3304 | ret->srelplt2 = NULL; | |
0855e32b NS |
3305 | ret->dt_tlsdesc_plt = 0; |
3306 | ret->dt_tlsdesc_got = 0; | |
3307 | ret->tls_trampoline = 0; | |
3308 | ret->next_tls_desc_index = 0; | |
3309 | ret->num_tls_desc = 0; | |
906e58ca NC |
3310 | ret->thumb_glue_size = 0; |
3311 | ret->arm_glue_size = 0; | |
3312 | ret->bx_glue_size = 0; | |
3313 | memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset)); | |
3314 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
3315 | ret->vfp11_erratum_glue_size = 0; | |
3316 | ret->num_vfp11_fixes = 0; | |
48229727 | 3317 | ret->fix_cortex_a8 = 0; |
906e58ca NC |
3318 | ret->bfd_of_glue_owner = NULL; |
3319 | ret->byteswap_code = 0; | |
3320 | ret->target1_is_rel = 0; | |
3321 | ret->target2_reloc = R_ARM_NONE; | |
3322 | #ifdef FOUR_WORD_PLT | |
3323 | ret->plt_header_size = 16; | |
3324 | ret->plt_entry_size = 16; | |
3325 | #else | |
3326 | ret->plt_header_size = 20; | |
3327 | ret->plt_entry_size = 12; | |
3328 | #endif | |
3329 | ret->fix_v4bx = 0; | |
3330 | ret->use_blx = 0; | |
3331 | ret->vxworks_p = 0; | |
3332 | ret->symbian_p = 0; | |
3333 | ret->use_rel = 1; | |
87d72d41 | 3334 | ret->sym_cache.abfd = NULL; |
906e58ca NC |
3335 | ret->obfd = abfd; |
3336 | ret->tls_ldm_got.refcount = 0; | |
6cee0a6f L |
3337 | ret->stub_bfd = NULL; |
3338 | ret->add_stub_section = NULL; | |
3339 | ret->layout_sections_again = NULL; | |
3340 | ret->stub_group = NULL; | |
fe33d2fa | 3341 | ret->top_id = 0; |
6cee0a6f L |
3342 | ret->bfd_count = 0; |
3343 | ret->top_index = 0; | |
3344 | ret->input_list = NULL; | |
906e58ca NC |
3345 | |
3346 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
3347 | sizeof (struct elf32_arm_stub_hash_entry))) | |
3348 | { | |
3349 | free (ret); | |
3350 | return NULL; | |
3351 | } | |
3352 | ||
3353 | return &ret->root.root; | |
3354 | } | |
3355 | ||
3356 | /* Free the derived linker hash table. */ | |
3357 | ||
3358 | static void | |
3359 | elf32_arm_hash_table_free (struct bfd_link_hash_table *hash) | |
3360 | { | |
3361 | struct elf32_arm_link_hash_table *ret | |
3362 | = (struct elf32_arm_link_hash_table *) hash; | |
3363 | ||
3364 | bfd_hash_table_free (&ret->stub_hash_table); | |
3365 | _bfd_generic_link_hash_table_free (hash); | |
3366 | } | |
3367 | ||
3368 | /* Determine if we're dealing with a Thumb only architecture. */ | |
3369 | ||
3370 | static bfd_boolean | |
3371 | using_thumb_only (struct elf32_arm_link_hash_table *globals) | |
3372 | { | |
3373 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3374 | Tag_CPU_arch); | |
3375 | int profile; | |
3376 | ||
41ed1ee7 DJ |
3377 | if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M) |
3378 | return TRUE; | |
3379 | ||
9e3c6df6 | 3380 | if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M) |
906e58ca NC |
3381 | return FALSE; |
3382 | ||
3383 | profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3384 | Tag_CPU_arch_profile); | |
3385 | ||
3386 | return profile == 'M'; | |
3387 | } | |
3388 | ||
3389 | /* Determine if we're dealing with a Thumb-2 object. */ | |
3390 | ||
3391 | static bfd_boolean | |
3392 | using_thumb2 (struct elf32_arm_link_hash_table *globals) | |
3393 | { | |
3394 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3395 | Tag_CPU_arch); | |
3396 | return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7; | |
3397 | } | |
3398 | ||
cd1dac3d DG |
3399 | /* Determine what kind of NOPs are available. */ |
3400 | ||
3401 | static bfd_boolean | |
3402 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) | |
3403 | { | |
3404 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3405 | Tag_CPU_arch); | |
3406 | return arch == TAG_CPU_ARCH_V6T2 | |
3407 | || arch == TAG_CPU_ARCH_V6K | |
9e3c6df6 PB |
3408 | || arch == TAG_CPU_ARCH_V7 |
3409 | || arch == TAG_CPU_ARCH_V7E_M; | |
cd1dac3d DG |
3410 | } |
3411 | ||
3412 | static bfd_boolean | |
3413 | arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals) | |
3414 | { | |
3415 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3416 | Tag_CPU_arch); | |
9e3c6df6 PB |
3417 | return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7 |
3418 | || arch == TAG_CPU_ARCH_V7E_M); | |
cd1dac3d DG |
3419 | } |
3420 | ||
f4ac8484 DJ |
3421 | static bfd_boolean |
3422 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) | |
3423 | { | |
3424 | switch (stub_type) | |
3425 | { | |
fea2b4d6 CL |
3426 | case arm_stub_long_branch_thumb_only: |
3427 | case arm_stub_long_branch_v4t_thumb_arm: | |
3428 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 CL |
3429 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
3430 | case arm_stub_long_branch_thumb_only_pic: | |
f4ac8484 DJ |
3431 | return TRUE; |
3432 | case arm_stub_none: | |
3433 | BFD_FAIL (); | |
3434 | return FALSE; | |
3435 | break; | |
3436 | default: | |
3437 | return FALSE; | |
3438 | } | |
3439 | } | |
3440 | ||
906e58ca NC |
3441 | /* Determine the type of stub needed, if any, for a call. */ |
3442 | ||
3443 | static enum elf32_arm_stub_type | |
3444 | arm_type_of_stub (struct bfd_link_info *info, | |
3445 | asection *input_sec, | |
3446 | const Elf_Internal_Rela *rel, | |
34e77a92 | 3447 | unsigned char st_type, |
35fc36a8 | 3448 | enum arm_st_branch_type *actual_branch_type, |
906e58ca | 3449 | struct elf32_arm_link_hash_entry *hash, |
c820be07 NC |
3450 | bfd_vma destination, |
3451 | asection *sym_sec, | |
3452 | bfd *input_bfd, | |
3453 | const char *name) | |
906e58ca NC |
3454 | { |
3455 | bfd_vma location; | |
3456 | bfd_signed_vma branch_offset; | |
3457 | unsigned int r_type; | |
3458 | struct elf32_arm_link_hash_table * globals; | |
3459 | int thumb2; | |
3460 | int thumb_only; | |
3461 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5fa9e92f | 3462 | int use_plt = 0; |
35fc36a8 | 3463 | enum arm_st_branch_type branch_type = *actual_branch_type; |
34e77a92 RS |
3464 | union gotplt_union *root_plt; |
3465 | struct arm_plt_info *arm_plt; | |
906e58ca | 3466 | |
35fc36a8 | 3467 | if (branch_type == ST_BRANCH_LONG) |
da5938a2 NC |
3468 | return stub_type; |
3469 | ||
906e58ca | 3470 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3471 | if (globals == NULL) |
3472 | return stub_type; | |
906e58ca NC |
3473 | |
3474 | thumb_only = using_thumb_only (globals); | |
3475 | ||
3476 | thumb2 = using_thumb2 (globals); | |
3477 | ||
3478 | /* Determine where the call point is. */ | |
3479 | location = (input_sec->output_offset | |
3480 | + input_sec->output_section->vma | |
3481 | + rel->r_offset); | |
3482 | ||
906e58ca NC |
3483 | r_type = ELF32_R_TYPE (rel->r_info); |
3484 | ||
34e77a92 RS |
3485 | /* For TLS call relocs, it is the caller's responsibility to provide |
3486 | the address of the appropriate trampoline. */ | |
3487 | if (r_type != R_ARM_TLS_CALL | |
3488 | && r_type != R_ARM_THM_TLS_CALL | |
3489 | && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info), | |
3490 | &root_plt, &arm_plt) | |
3491 | && root_plt->offset != (bfd_vma) -1) | |
5fa9e92f | 3492 | { |
34e77a92 | 3493 | asection *splt; |
fe33d2fa | 3494 | |
34e77a92 RS |
3495 | if (hash == NULL || hash->is_iplt) |
3496 | splt = globals->root.iplt; | |
3497 | else | |
3498 | splt = globals->root.splt; | |
3499 | if (splt != NULL) | |
3500 | { | |
3501 | use_plt = 1; | |
3502 | ||
3503 | /* Note when dealing with PLT entries: the main PLT stub is in | |
3504 | ARM mode, so if the branch is in Thumb mode, another | |
3505 | Thumb->ARM stub will be inserted later just before the ARM | |
3506 | PLT stub. We don't take this extra distance into account | |
3507 | here, because if a long branch stub is needed, we'll add a | |
3508 | Thumb->Arm one and branch directly to the ARM PLT entry | |
3509 | because it avoids spreading offset corrections in several | |
3510 | places. */ | |
3511 | ||
3512 | destination = (splt->output_section->vma | |
3513 | + splt->output_offset | |
3514 | + root_plt->offset); | |
3515 | st_type = STT_FUNC; | |
3516 | branch_type = ST_BRANCH_TO_ARM; | |
3517 | } | |
5fa9e92f | 3518 | } |
34e77a92 RS |
3519 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
3520 | BFD_ASSERT (st_type != STT_GNU_IFUNC); | |
906e58ca | 3521 | |
fe33d2fa CL |
3522 | branch_offset = (bfd_signed_vma)(destination - location); |
3523 | ||
0855e32b NS |
3524 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
3525 | || r_type == R_ARM_THM_TLS_CALL) | |
906e58ca | 3526 | { |
5fa9e92f CL |
3527 | /* Handle cases where: |
3528 | - this call goes too far (different Thumb/Thumb2 max | |
3529 | distance) | |
155d87d7 CL |
3530 | - it's a Thumb->Arm call and blx is not available, or it's a |
3531 | Thumb->Arm branch (not bl). A stub is needed in this case, | |
3532 | but only if this call is not through a PLT entry. Indeed, | |
3533 | PLT stubs handle mode switching already. | |
5fa9e92f | 3534 | */ |
906e58ca NC |
3535 | if ((!thumb2 |
3536 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
3537 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
3538 | || (thumb2 | |
3539 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
3540 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
35fc36a8 | 3541 | || (branch_type == ST_BRANCH_TO_ARM |
0855e32b NS |
3542 | && (((r_type == R_ARM_THM_CALL |
3543 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) | |
155d87d7 | 3544 | || (r_type == R_ARM_THM_JUMP24)) |
5fa9e92f | 3545 | && !use_plt)) |
906e58ca | 3546 | { |
35fc36a8 | 3547 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3548 | { |
3549 | /* Thumb to thumb. */ | |
3550 | if (!thumb_only) | |
3551 | { | |
3552 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3553 | /* PIC stubs. */ |
155d87d7 CL |
3554 | ? ((globals->use_blx |
3555 | && (r_type ==R_ARM_THM_CALL)) | |
3556 | /* V5T and above. Stub starts with ARM code, so | |
3557 | we must be able to switch mode before | |
3558 | reaching it, which is only possible for 'bl' | |
3559 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 3560 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 3561 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 3562 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
3563 | |
3564 | /* non-PIC stubs. */ | |
155d87d7 CL |
3565 | : ((globals->use_blx |
3566 | && (r_type ==R_ARM_THM_CALL)) | |
c2b4a39d CL |
3567 | /* V5T and above. */ |
3568 | ? arm_stub_long_branch_any_any | |
3569 | /* V4T. */ | |
d3626fb0 | 3570 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
3571 | } |
3572 | else | |
3573 | { | |
3574 | stub_type = (info->shared | globals->pic_veneer) | |
ebe24dd4 CL |
3575 | /* PIC stub. */ |
3576 | ? arm_stub_long_branch_thumb_only_pic | |
c2b4a39d CL |
3577 | /* non-PIC stub. */ |
3578 | : arm_stub_long_branch_thumb_only; | |
906e58ca NC |
3579 | } |
3580 | } | |
3581 | else | |
3582 | { | |
3583 | /* Thumb to arm. */ | |
c820be07 NC |
3584 | if (sym_sec != NULL |
3585 | && sym_sec->owner != NULL | |
3586 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3587 | { | |
3588 | (*_bfd_error_handler) | |
3589 | (_("%B(%s): warning: interworking not enabled.\n" | |
3590 | " first occurrence: %B: Thumb call to ARM"), | |
3591 | sym_sec->owner, input_bfd, name); | |
3592 | } | |
3593 | ||
0855e32b NS |
3594 | stub_type = |
3595 | (info->shared | globals->pic_veneer) | |
c2b4a39d | 3596 | /* PIC stubs. */ |
0855e32b NS |
3597 | ? (r_type == R_ARM_THM_TLS_CALL |
3598 | /* TLS PIC stubs */ | |
3599 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic | |
3600 | : arm_stub_long_branch_v4t_thumb_tls_pic) | |
3601 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) | |
3602 | /* V5T PIC and above. */ | |
3603 | ? arm_stub_long_branch_any_arm_pic | |
3604 | /* V4T PIC stub. */ | |
3605 | : arm_stub_long_branch_v4t_thumb_arm_pic)) | |
c2b4a39d CL |
3606 | |
3607 | /* non-PIC stubs. */ | |
0855e32b | 3608 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
c2b4a39d CL |
3609 | /* V5T and above. */ |
3610 | ? arm_stub_long_branch_any_any | |
3611 | /* V4T. */ | |
3612 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
3613 | |
3614 | /* Handle v4t short branches. */ | |
fea2b4d6 | 3615 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
3616 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
3617 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 3618 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
3619 | } |
3620 | } | |
3621 | } | |
fe33d2fa CL |
3622 | else if (r_type == R_ARM_CALL |
3623 | || r_type == R_ARM_JUMP24 | |
0855e32b NS |
3624 | || r_type == R_ARM_PLT32 |
3625 | || r_type == R_ARM_TLS_CALL) | |
906e58ca | 3626 | { |
35fc36a8 | 3627 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3628 | { |
3629 | /* Arm to thumb. */ | |
c820be07 NC |
3630 | |
3631 | if (sym_sec != NULL | |
3632 | && sym_sec->owner != NULL | |
3633 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3634 | { | |
3635 | (*_bfd_error_handler) | |
3636 | (_("%B(%s): warning: interworking not enabled.\n" | |
c2b4a39d | 3637 | " first occurrence: %B: ARM call to Thumb"), |
c820be07 NC |
3638 | sym_sec->owner, input_bfd, name); |
3639 | } | |
3640 | ||
3641 | /* We have an extra 2-bytes reach because of | |
3642 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
3643 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
3644 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
0855e32b | 3645 | || (r_type == R_ARM_CALL && !globals->use_blx) |
4116d8d7 PB |
3646 | || (r_type == R_ARM_JUMP24) |
3647 | || (r_type == R_ARM_PLT32)) | |
906e58ca NC |
3648 | { |
3649 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3650 | /* PIC stubs. */ |
ebe24dd4 CL |
3651 | ? ((globals->use_blx) |
3652 | /* V5T and above. */ | |
3653 | ? arm_stub_long_branch_any_thumb_pic | |
3654 | /* V4T stub. */ | |
3655 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
3656 | ||
c2b4a39d CL |
3657 | /* non-PIC stubs. */ |
3658 | : ((globals->use_blx) | |
3659 | /* V5T and above. */ | |
3660 | ? arm_stub_long_branch_any_any | |
3661 | /* V4T. */ | |
3662 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
3663 | } |
3664 | } | |
3665 | else | |
3666 | { | |
3667 | /* Arm to arm. */ | |
3668 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
3669 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
3670 | { | |
0855e32b NS |
3671 | stub_type = |
3672 | (info->shared | globals->pic_veneer) | |
c2b4a39d | 3673 | /* PIC stubs. */ |
0855e32b NS |
3674 | ? (r_type == R_ARM_TLS_CALL |
3675 | /* TLS PIC Stub */ | |
3676 | ? arm_stub_long_branch_any_tls_pic | |
3677 | : arm_stub_long_branch_any_arm_pic) | |
c2b4a39d | 3678 | /* non-PIC stubs. */ |
fea2b4d6 | 3679 | : arm_stub_long_branch_any_any; |
906e58ca NC |
3680 | } |
3681 | } | |
3682 | } | |
3683 | ||
fe33d2fa CL |
3684 | /* If a stub is needed, record the actual destination type. */ |
3685 | if (stub_type != arm_stub_none) | |
35fc36a8 | 3686 | *actual_branch_type = branch_type; |
fe33d2fa | 3687 | |
906e58ca NC |
3688 | return stub_type; |
3689 | } | |
3690 | ||
3691 | /* Build a name for an entry in the stub hash table. */ | |
3692 | ||
3693 | static char * | |
3694 | elf32_arm_stub_name (const asection *input_section, | |
3695 | const asection *sym_sec, | |
3696 | const struct elf32_arm_link_hash_entry *hash, | |
fe33d2fa CL |
3697 | const Elf_Internal_Rela *rel, |
3698 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
3699 | { |
3700 | char *stub_name; | |
3701 | bfd_size_type len; | |
3702 | ||
3703 | if (hash) | |
3704 | { | |
fe33d2fa | 3705 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 3706 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 3707 | if (stub_name != NULL) |
fe33d2fa | 3708 | sprintf (stub_name, "%08x_%s+%x_%d", |
906e58ca NC |
3709 | input_section->id & 0xffffffff, |
3710 | hash->root.root.root.string, | |
fe33d2fa CL |
3711 | (int) rel->r_addend & 0xffffffff, |
3712 | (int) stub_type); | |
906e58ca NC |
3713 | } |
3714 | else | |
3715 | { | |
fe33d2fa | 3716 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 3717 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 3718 | if (stub_name != NULL) |
fe33d2fa | 3719 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
906e58ca NC |
3720 | input_section->id & 0xffffffff, |
3721 | sym_sec->id & 0xffffffff, | |
0855e32b NS |
3722 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
3723 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL | |
3724 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
fe33d2fa CL |
3725 | (int) rel->r_addend & 0xffffffff, |
3726 | (int) stub_type); | |
906e58ca NC |
3727 | } |
3728 | ||
3729 | return stub_name; | |
3730 | } | |
3731 | ||
3732 | /* Look up an entry in the stub hash. Stub entries are cached because | |
3733 | creating the stub name takes a bit of time. */ | |
3734 | ||
3735 | static struct elf32_arm_stub_hash_entry * | |
3736 | elf32_arm_get_stub_entry (const asection *input_section, | |
3737 | const asection *sym_sec, | |
3738 | struct elf_link_hash_entry *hash, | |
3739 | const Elf_Internal_Rela *rel, | |
fe33d2fa CL |
3740 | struct elf32_arm_link_hash_table *htab, |
3741 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
3742 | { |
3743 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3744 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
3745 | const asection *id_sec; | |
3746 | ||
3747 | if ((input_section->flags & SEC_CODE) == 0) | |
3748 | return NULL; | |
3749 | ||
3750 | /* If this input section is part of a group of sections sharing one | |
3751 | stub section, then use the id of the first section in the group. | |
3752 | Stub names need to include a section id, as there may well be | |
3753 | more than one stub used to reach say, printf, and we need to | |
3754 | distinguish between them. */ | |
3755 | id_sec = htab->stub_group[input_section->id].link_sec; | |
3756 | ||
3757 | if (h != NULL && h->stub_cache != NULL | |
3758 | && h->stub_cache->h == h | |
fe33d2fa CL |
3759 | && h->stub_cache->id_sec == id_sec |
3760 | && h->stub_cache->stub_type == stub_type) | |
906e58ca NC |
3761 | { |
3762 | stub_entry = h->stub_cache; | |
3763 | } | |
3764 | else | |
3765 | { | |
3766 | char *stub_name; | |
3767 | ||
fe33d2fa | 3768 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
906e58ca NC |
3769 | if (stub_name == NULL) |
3770 | return NULL; | |
3771 | ||
3772 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
3773 | stub_name, FALSE, FALSE); | |
3774 | if (h != NULL) | |
3775 | h->stub_cache = stub_entry; | |
3776 | ||
3777 | free (stub_name); | |
3778 | } | |
3779 | ||
3780 | return stub_entry; | |
3781 | } | |
3782 | ||
48229727 JB |
3783 | /* Find or create a stub section. Returns a pointer to the stub section, and |
3784 | the section to which the stub section will be attached (in *LINK_SEC_P). | |
3785 | LINK_SEC_P may be NULL. */ | |
906e58ca | 3786 | |
48229727 JB |
3787 | static asection * |
3788 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
3789 | struct elf32_arm_link_hash_table *htab) | |
906e58ca NC |
3790 | { |
3791 | asection *link_sec; | |
3792 | asection *stub_sec; | |
906e58ca NC |
3793 | |
3794 | link_sec = htab->stub_group[section->id].link_sec; | |
3795 | stub_sec = htab->stub_group[section->id].stub_sec; | |
3796 | if (stub_sec == NULL) | |
3797 | { | |
3798 | stub_sec = htab->stub_group[link_sec->id].stub_sec; | |
3799 | if (stub_sec == NULL) | |
3800 | { | |
3801 | size_t namelen; | |
3802 | bfd_size_type len; | |
3803 | char *s_name; | |
3804 | ||
3805 | namelen = strlen (link_sec->name); | |
3806 | len = namelen + sizeof (STUB_SUFFIX); | |
21d799b5 | 3807 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); |
906e58ca NC |
3808 | if (s_name == NULL) |
3809 | return NULL; | |
3810 | ||
3811 | memcpy (s_name, link_sec->name, namelen); | |
3812 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
3813 | stub_sec = (*htab->add_stub_section) (s_name, link_sec); | |
3814 | if (stub_sec == NULL) | |
3815 | return NULL; | |
3816 | htab->stub_group[link_sec->id].stub_sec = stub_sec; | |
3817 | } | |
3818 | htab->stub_group[section->id].stub_sec = stub_sec; | |
3819 | } | |
48229727 JB |
3820 | |
3821 | if (link_sec_p) | |
3822 | *link_sec_p = link_sec; | |
3823 | ||
3824 | return stub_sec; | |
3825 | } | |
3826 | ||
3827 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
3828 | stub entry are initialised. */ | |
3829 | ||
3830 | static struct elf32_arm_stub_hash_entry * | |
3831 | elf32_arm_add_stub (const char *stub_name, | |
3832 | asection *section, | |
3833 | struct elf32_arm_link_hash_table *htab) | |
3834 | { | |
3835 | asection *link_sec; | |
3836 | asection *stub_sec; | |
3837 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3838 | ||
3839 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab); | |
3840 | if (stub_sec == NULL) | |
3841 | return NULL; | |
906e58ca NC |
3842 | |
3843 | /* Enter this entry into the linker stub hash table. */ | |
3844 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
3845 | TRUE, FALSE); | |
3846 | if (stub_entry == NULL) | |
3847 | { | |
3848 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
3849 | section->owner, | |
3850 | stub_name); | |
3851 | return NULL; | |
3852 | } | |
3853 | ||
3854 | stub_entry->stub_sec = stub_sec; | |
3855 | stub_entry->stub_offset = 0; | |
3856 | stub_entry->id_sec = link_sec; | |
3857 | ||
906e58ca NC |
3858 | return stub_entry; |
3859 | } | |
3860 | ||
3861 | /* Store an Arm insn into an output section not processed by | |
3862 | elf32_arm_write_section. */ | |
3863 | ||
3864 | static void | |
8029a119 NC |
3865 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
3866 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
3867 | { |
3868 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
3869 | bfd_putl32 (val, ptr); | |
3870 | else | |
3871 | bfd_putb32 (val, ptr); | |
3872 | } | |
3873 | ||
3874 | /* Store a 16-bit Thumb insn into an output section not processed by | |
3875 | elf32_arm_write_section. */ | |
3876 | ||
3877 | static void | |
8029a119 NC |
3878 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
3879 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
3880 | { |
3881 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
3882 | bfd_putl16 (val, ptr); | |
3883 | else | |
3884 | bfd_putb16 (val, ptr); | |
3885 | } | |
3886 | ||
0855e32b NS |
3887 | /* If it's possible to change R_TYPE to a more efficient access |
3888 | model, return the new reloc type. */ | |
3889 | ||
3890 | static unsigned | |
3891 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, | |
3892 | struct elf_link_hash_entry *h) | |
3893 | { | |
3894 | int is_local = (h == NULL); | |
3895 | ||
3896 | if (info->shared || (h && h->root.type == bfd_link_hash_undefweak)) | |
3897 | return r_type; | |
3898 | ||
3899 | /* We do not support relaxations for Old TLS models. */ | |
3900 | switch (r_type) | |
3901 | { | |
3902 | case R_ARM_TLS_GOTDESC: | |
3903 | case R_ARM_TLS_CALL: | |
3904 | case R_ARM_THM_TLS_CALL: | |
3905 | case R_ARM_TLS_DESCSEQ: | |
3906 | case R_ARM_THM_TLS_DESCSEQ: | |
3907 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; | |
3908 | } | |
3909 | ||
3910 | return r_type; | |
3911 | } | |
3912 | ||
48229727 JB |
3913 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
3914 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
3915 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
34e77a92 RS |
3916 | const char *, unsigned char, enum arm_st_branch_type, |
3917 | struct elf_link_hash_entry *, bfd_boolean *, char **); | |
48229727 | 3918 | |
4563a860 JB |
3919 | static unsigned int |
3920 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) | |
3921 | { | |
3922 | switch (stub_type) | |
3923 | { | |
3924 | case arm_stub_a8_veneer_b_cond: | |
3925 | case arm_stub_a8_veneer_b: | |
3926 | case arm_stub_a8_veneer_bl: | |
3927 | return 2; | |
3928 | ||
3929 | case arm_stub_long_branch_any_any: | |
3930 | case arm_stub_long_branch_v4t_arm_thumb: | |
3931 | case arm_stub_long_branch_thumb_only: | |
3932 | case arm_stub_long_branch_v4t_thumb_thumb: | |
3933 | case arm_stub_long_branch_v4t_thumb_arm: | |
3934 | case arm_stub_short_branch_v4t_thumb_arm: | |
3935 | case arm_stub_long_branch_any_arm_pic: | |
3936 | case arm_stub_long_branch_any_thumb_pic: | |
3937 | case arm_stub_long_branch_v4t_thumb_thumb_pic: | |
3938 | case arm_stub_long_branch_v4t_arm_thumb_pic: | |
3939 | case arm_stub_long_branch_v4t_thumb_arm_pic: | |
3940 | case arm_stub_long_branch_thumb_only_pic: | |
0855e32b NS |
3941 | case arm_stub_long_branch_any_tls_pic: |
3942 | case arm_stub_long_branch_v4t_thumb_tls_pic: | |
4563a860 JB |
3943 | case arm_stub_a8_veneer_blx: |
3944 | return 4; | |
3945 | ||
3946 | default: | |
3947 | abort (); /* Should be unreachable. */ | |
3948 | } | |
3949 | } | |
3950 | ||
906e58ca NC |
3951 | static bfd_boolean |
3952 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, | |
3953 | void * in_arg) | |
3954 | { | |
48229727 | 3955 | #define MAXRELOCS 2 |
906e58ca | 3956 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 3957 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 3958 | struct bfd_link_info *info; |
906e58ca NC |
3959 | asection *stub_sec; |
3960 | bfd *stub_bfd; | |
906e58ca NC |
3961 | bfd_byte *loc; |
3962 | bfd_vma sym_value; | |
3963 | int template_size; | |
3964 | int size; | |
d3ce72d0 | 3965 | const insn_sequence *template_sequence; |
906e58ca | 3966 | int i; |
48229727 JB |
3967 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
3968 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
3969 | int nrelocs = 0; | |
906e58ca NC |
3970 | |
3971 | /* Massage our args to the form they really have. */ | |
3972 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
3973 | info = (struct bfd_link_info *) in_arg; | |
3974 | ||
3975 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3976 | if (globals == NULL) |
3977 | return FALSE; | |
906e58ca | 3978 | |
906e58ca NC |
3979 | stub_sec = stub_entry->stub_sec; |
3980 | ||
4dfe6ac6 | 3981 | if ((globals->fix_cortex_a8 < 0) |
4563a860 JB |
3982 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
3983 | /* We have to do less-strictly-aligned fixes last. */ | |
eb7c4339 | 3984 | return TRUE; |
fe33d2fa | 3985 | |
906e58ca NC |
3986 | /* Make a note of the offset within the stubs for this entry. */ |
3987 | stub_entry->stub_offset = stub_sec->size; | |
3988 | loc = stub_sec->contents + stub_entry->stub_offset; | |
3989 | ||
3990 | stub_bfd = stub_sec->owner; | |
3991 | ||
906e58ca NC |
3992 | /* This is the address of the stub destination. */ |
3993 | sym_value = (stub_entry->target_value | |
3994 | + stub_entry->target_section->output_offset | |
3995 | + stub_entry->target_section->output_section->vma); | |
3996 | ||
d3ce72d0 | 3997 | template_sequence = stub_entry->stub_template; |
461a49ca | 3998 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
3999 | |
4000 | size = 0; | |
461a49ca | 4001 | for (i = 0; i < template_size; i++) |
906e58ca | 4002 | { |
d3ce72d0 | 4003 | switch (template_sequence[i].type) |
461a49ca DJ |
4004 | { |
4005 | case THUMB16_TYPE: | |
48229727 | 4006 | { |
d3ce72d0 NC |
4007 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
4008 | if (template_sequence[i].reloc_addend != 0) | |
48229727 JB |
4009 | { |
4010 | /* We've borrowed the reloc_addend field to mean we should | |
4011 | insert a condition code into this (Thumb-1 branch) | |
4012 | instruction. See THUMB16_BCOND_INSN. */ | |
4013 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
4014 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
4015 | } | |
fe33d2fa | 4016 | bfd_put_16 (stub_bfd, data, loc + size); |
48229727 JB |
4017 | size += 2; |
4018 | } | |
461a49ca | 4019 | break; |
906e58ca | 4020 | |
48229727 | 4021 | case THUMB32_TYPE: |
fe33d2fa CL |
4022 | bfd_put_16 (stub_bfd, |
4023 | (template_sequence[i].data >> 16) & 0xffff, | |
4024 | loc + size); | |
4025 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, | |
4026 | loc + size + 2); | |
d3ce72d0 | 4027 | if (template_sequence[i].r_type != R_ARM_NONE) |
48229727 JB |
4028 | { |
4029 | stub_reloc_idx[nrelocs] = i; | |
4030 | stub_reloc_offset[nrelocs++] = size; | |
4031 | } | |
4032 | size += 4; | |
4033 | break; | |
4034 | ||
461a49ca | 4035 | case ARM_TYPE: |
fe33d2fa CL |
4036 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
4037 | loc + size); | |
461a49ca DJ |
4038 | /* Handle cases where the target is encoded within the |
4039 | instruction. */ | |
d3ce72d0 | 4040 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 4041 | { |
48229727 JB |
4042 | stub_reloc_idx[nrelocs] = i; |
4043 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4044 | } |
4045 | size += 4; | |
4046 | break; | |
4047 | ||
4048 | case DATA_TYPE: | |
d3ce72d0 | 4049 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
4050 | stub_reloc_idx[nrelocs] = i; |
4051 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4052 | size += 4; |
4053 | break; | |
4054 | ||
4055 | default: | |
4056 | BFD_FAIL (); | |
4057 | return FALSE; | |
4058 | } | |
906e58ca | 4059 | } |
461a49ca | 4060 | |
906e58ca NC |
4061 | stub_sec->size += size; |
4062 | ||
461a49ca DJ |
4063 | /* Stub size has already been computed in arm_size_one_stub. Check |
4064 | consistency. */ | |
4065 | BFD_ASSERT (size == stub_entry->stub_size); | |
4066 | ||
906e58ca | 4067 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
35fc36a8 | 4068 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4069 | sym_value |= 1; |
4070 | ||
48229727 JB |
4071 | /* Assume there is at least one and at most MAXRELOCS entries to relocate |
4072 | in each stub. */ | |
4073 | BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS); | |
c820be07 | 4074 | |
48229727 | 4075 | for (i = 0; i < nrelocs; i++) |
d3ce72d0 NC |
4076 | if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24 |
4077 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19 | |
4078 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL | |
4079 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22) | |
48229727 JB |
4080 | { |
4081 | Elf_Internal_Rela rel; | |
4082 | bfd_boolean unresolved_reloc; | |
4083 | char *error_message; | |
35fc36a8 RS |
4084 | enum arm_st_branch_type branch_type |
4085 | = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22 | |
4086 | ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM); | |
48229727 JB |
4087 | bfd_vma points_to = sym_value + stub_entry->target_addend; |
4088 | ||
4089 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
d3ce72d0 NC |
4090 | rel.r_info = ELF32_R_INFO (0, |
4091 | template_sequence[stub_reloc_idx[i]].r_type); | |
4092 | rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend; | |
48229727 JB |
4093 | |
4094 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
4095 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
4096 | template should refer back to the instruction after the original | |
4097 | branch. */ | |
4098 | points_to = sym_value; | |
4099 | ||
33c6a8fc JB |
4100 | /* There may be unintended consequences if this is not true. */ |
4101 | BFD_ASSERT (stub_entry->h == NULL); | |
4102 | ||
48229727 JB |
4103 | /* Note: _bfd_final_link_relocate doesn't handle these relocations |
4104 | properly. We should probably use this function unconditionally, | |
4105 | rather than only for certain relocations listed in the enclosing | |
4106 | conditional, for the sake of consistency. */ | |
4107 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
d3ce72d0 | 4108 | (template_sequence[stub_reloc_idx[i]].r_type), |
48229727 | 4109 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, |
34e77a92 RS |
4110 | points_to, info, stub_entry->target_section, "", STT_FUNC, |
4111 | branch_type, (struct elf_link_hash_entry *) stub_entry->h, | |
4112 | &unresolved_reloc, &error_message); | |
48229727 JB |
4113 | } |
4114 | else | |
4115 | { | |
fe33d2fa CL |
4116 | Elf_Internal_Rela rel; |
4117 | bfd_boolean unresolved_reloc; | |
4118 | char *error_message; | |
4119 | bfd_vma points_to = sym_value + stub_entry->target_addend | |
4120 | + template_sequence[stub_reloc_idx[i]].reloc_addend; | |
4121 | ||
4122 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
4123 | rel.r_info = ELF32_R_INFO (0, | |
4124 | template_sequence[stub_reloc_idx[i]].r_type); | |
4125 | rel.r_addend = 0; | |
4126 | ||
4127 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
4128 | (template_sequence[stub_reloc_idx[i]].r_type), | |
4129 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, | |
34e77a92 | 4130 | points_to, info, stub_entry->target_section, "", STT_FUNC, |
35fc36a8 | 4131 | stub_entry->branch_type, |
fe33d2fa CL |
4132 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, |
4133 | &error_message); | |
48229727 | 4134 | } |
906e58ca NC |
4135 | |
4136 | return TRUE; | |
48229727 | 4137 | #undef MAXRELOCS |
906e58ca NC |
4138 | } |
4139 | ||
48229727 JB |
4140 | /* Calculate the template, template size and instruction size for a stub. |
4141 | Return value is the instruction size. */ | |
906e58ca | 4142 | |
48229727 JB |
4143 | static unsigned int |
4144 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
4145 | const insn_sequence **stub_template, | |
4146 | int *stub_template_size) | |
906e58ca | 4147 | { |
d3ce72d0 | 4148 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
4149 | int template_size = 0, i; |
4150 | unsigned int size; | |
906e58ca | 4151 | |
d3ce72d0 | 4152 | template_sequence = stub_definitions[stub_type].template_sequence; |
2a229407 AM |
4153 | if (stub_template) |
4154 | *stub_template = template_sequence; | |
4155 | ||
48229727 | 4156 | template_size = stub_definitions[stub_type].template_size; |
2a229407 AM |
4157 | if (stub_template_size) |
4158 | *stub_template_size = template_size; | |
906e58ca NC |
4159 | |
4160 | size = 0; | |
461a49ca DJ |
4161 | for (i = 0; i < template_size; i++) |
4162 | { | |
d3ce72d0 | 4163 | switch (template_sequence[i].type) |
461a49ca DJ |
4164 | { |
4165 | case THUMB16_TYPE: | |
4166 | size += 2; | |
4167 | break; | |
4168 | ||
4169 | case ARM_TYPE: | |
48229727 | 4170 | case THUMB32_TYPE: |
461a49ca DJ |
4171 | case DATA_TYPE: |
4172 | size += 4; | |
4173 | break; | |
4174 | ||
4175 | default: | |
4176 | BFD_FAIL (); | |
2a229407 | 4177 | return 0; |
461a49ca DJ |
4178 | } |
4179 | } | |
4180 | ||
48229727 JB |
4181 | return size; |
4182 | } | |
4183 | ||
4184 | /* As above, but don't actually build the stub. Just bump offset so | |
4185 | we know stub section sizes. */ | |
4186 | ||
4187 | static bfd_boolean | |
4188 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, | |
c7e2358a | 4189 | void *in_arg ATTRIBUTE_UNUSED) |
48229727 JB |
4190 | { |
4191 | struct elf32_arm_stub_hash_entry *stub_entry; | |
d3ce72d0 | 4192 | const insn_sequence *template_sequence; |
48229727 JB |
4193 | int template_size, size; |
4194 | ||
4195 | /* Massage our args to the form they really have. */ | |
4196 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
48229727 JB |
4197 | |
4198 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) | |
4199 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); | |
4200 | ||
d3ce72d0 | 4201 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
4202 | &template_size); |
4203 | ||
461a49ca | 4204 | stub_entry->stub_size = size; |
d3ce72d0 | 4205 | stub_entry->stub_template = template_sequence; |
461a49ca DJ |
4206 | stub_entry->stub_template_size = template_size; |
4207 | ||
906e58ca NC |
4208 | size = (size + 7) & ~7; |
4209 | stub_entry->stub_sec->size += size; | |
461a49ca | 4210 | |
906e58ca NC |
4211 | return TRUE; |
4212 | } | |
4213 | ||
4214 | /* External entry points for sizing and building linker stubs. */ | |
4215 | ||
4216 | /* Set up various things so that we can make a list of input sections | |
4217 | for each output section included in the link. Returns -1 on error, | |
4218 | 0 when no stubs will be needed, and 1 on success. */ | |
4219 | ||
4220 | int | |
4221 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
4222 | struct bfd_link_info *info) | |
4223 | { | |
4224 | bfd *input_bfd; | |
4225 | unsigned int bfd_count; | |
4226 | int top_id, top_index; | |
4227 | asection *section; | |
4228 | asection **input_list, **list; | |
4229 | bfd_size_type amt; | |
4230 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4231 | ||
4dfe6ac6 NC |
4232 | if (htab == NULL) |
4233 | return 0; | |
906e58ca NC |
4234 | if (! is_elf_hash_table (htab)) |
4235 | return 0; | |
4236 | ||
4237 | /* Count the number of input BFDs and find the top input section id. */ | |
4238 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
4239 | input_bfd != NULL; | |
4240 | input_bfd = input_bfd->link_next) | |
4241 | { | |
4242 | bfd_count += 1; | |
4243 | for (section = input_bfd->sections; | |
4244 | section != NULL; | |
4245 | section = section->next) | |
4246 | { | |
4247 | if (top_id < section->id) | |
4248 | top_id = section->id; | |
4249 | } | |
4250 | } | |
4251 | htab->bfd_count = bfd_count; | |
4252 | ||
4253 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 4254 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
4255 | if (htab->stub_group == NULL) |
4256 | return -1; | |
fe33d2fa | 4257 | htab->top_id = top_id; |
906e58ca NC |
4258 | |
4259 | /* We can't use output_bfd->section_count here to find the top output | |
4260 | section index as some sections may have been removed, and | |
4261 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
4262 | for (section = output_bfd->sections, top_index = 0; | |
4263 | section != NULL; | |
4264 | section = section->next) | |
4265 | { | |
4266 | if (top_index < section->index) | |
4267 | top_index = section->index; | |
4268 | } | |
4269 | ||
4270 | htab->top_index = top_index; | |
4271 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 4272 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
4273 | htab->input_list = input_list; |
4274 | if (input_list == NULL) | |
4275 | return -1; | |
4276 | ||
4277 | /* For sections we aren't interested in, mark their entries with a | |
4278 | value we can check later. */ | |
4279 | list = input_list + top_index; | |
4280 | do | |
4281 | *list = bfd_abs_section_ptr; | |
4282 | while (list-- != input_list); | |
4283 | ||
4284 | for (section = output_bfd->sections; | |
4285 | section != NULL; | |
4286 | section = section->next) | |
4287 | { | |
4288 | if ((section->flags & SEC_CODE) != 0) | |
4289 | input_list[section->index] = NULL; | |
4290 | } | |
4291 | ||
4292 | return 1; | |
4293 | } | |
4294 | ||
4295 | /* The linker repeatedly calls this function for each input section, | |
4296 | in the order that input sections are linked into output sections. | |
4297 | Build lists of input sections to determine groupings between which | |
4298 | we may insert linker stubs. */ | |
4299 | ||
4300 | void | |
4301 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
4302 | asection *isec) | |
4303 | { | |
4304 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4305 | ||
4dfe6ac6 NC |
4306 | if (htab == NULL) |
4307 | return; | |
4308 | ||
906e58ca NC |
4309 | if (isec->output_section->index <= htab->top_index) |
4310 | { | |
4311 | asection **list = htab->input_list + isec->output_section->index; | |
4312 | ||
a7470592 | 4313 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
4314 | { |
4315 | /* Steal the link_sec pointer for our list. */ | |
4316 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
4317 | /* This happens to make the list in reverse order, | |
07d72278 | 4318 | which we reverse later. */ |
906e58ca NC |
4319 | PREV_SEC (isec) = *list; |
4320 | *list = isec; | |
4321 | } | |
4322 | } | |
4323 | } | |
4324 | ||
4325 | /* See whether we can group stub sections together. Grouping stub | |
4326 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 4327 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
4328 | .fini output sections respectively, because glibc splits the |
4329 | _init and _fini functions into multiple parts. Putting a stub in | |
4330 | the middle of a function is not a good idea. */ | |
4331 | ||
4332 | static void | |
4333 | group_sections (struct elf32_arm_link_hash_table *htab, | |
4334 | bfd_size_type stub_group_size, | |
07d72278 | 4335 | bfd_boolean stubs_always_after_branch) |
906e58ca | 4336 | { |
07d72278 | 4337 | asection **list = htab->input_list; |
906e58ca NC |
4338 | |
4339 | do | |
4340 | { | |
4341 | asection *tail = *list; | |
07d72278 | 4342 | asection *head; |
906e58ca NC |
4343 | |
4344 | if (tail == bfd_abs_section_ptr) | |
4345 | continue; | |
4346 | ||
07d72278 DJ |
4347 | /* Reverse the list: we must avoid placing stubs at the |
4348 | beginning of the section because the beginning of the text | |
4349 | section may be required for an interrupt vector in bare metal | |
4350 | code. */ | |
4351 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
4352 | head = NULL; |
4353 | while (tail != NULL) | |
4354 | { | |
4355 | /* Pop from tail. */ | |
4356 | asection *item = tail; | |
4357 | tail = PREV_SEC (item); | |
4358 | ||
4359 | /* Push on head. */ | |
4360 | NEXT_SEC (item) = head; | |
4361 | head = item; | |
4362 | } | |
07d72278 DJ |
4363 | |
4364 | while (head != NULL) | |
906e58ca NC |
4365 | { |
4366 | asection *curr; | |
07d72278 | 4367 | asection *next; |
e780aef2 CL |
4368 | bfd_vma stub_group_start = head->output_offset; |
4369 | bfd_vma end_of_next; | |
906e58ca | 4370 | |
07d72278 | 4371 | curr = head; |
e780aef2 | 4372 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 4373 | { |
e780aef2 CL |
4374 | next = NEXT_SEC (curr); |
4375 | end_of_next = next->output_offset + next->size; | |
4376 | if (end_of_next - stub_group_start >= stub_group_size) | |
4377 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 4378 | break; |
e780aef2 CL |
4379 | /* Add NEXT to the group. */ |
4380 | curr = next; | |
8cd931b7 | 4381 | } |
906e58ca | 4382 | |
07d72278 | 4383 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 4384 | than stub_group_size and thus can be handled by one stub |
07d72278 | 4385 | section. (Or the head section is itself larger than |
906e58ca NC |
4386 | stub_group_size, in which case we may be toast.) |
4387 | We should really be keeping track of the total size of | |
4388 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 4389 | section size. */ |
906e58ca NC |
4390 | do |
4391 | { | |
07d72278 | 4392 | next = NEXT_SEC (head); |
906e58ca | 4393 | /* Set up this stub group. */ |
07d72278 | 4394 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 4395 | } |
07d72278 | 4396 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
4397 | |
4398 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
4399 | bytes after the stub section can be handled by it too. */ |
4400 | if (!stubs_always_after_branch) | |
906e58ca | 4401 | { |
e780aef2 CL |
4402 | stub_group_start = curr->output_offset + curr->size; |
4403 | ||
8cd931b7 | 4404 | while (next != NULL) |
906e58ca | 4405 | { |
e780aef2 CL |
4406 | end_of_next = next->output_offset + next->size; |
4407 | if (end_of_next - stub_group_start >= stub_group_size) | |
4408 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 4409 | break; |
e780aef2 | 4410 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
4411 | head = next; |
4412 | next = NEXT_SEC (head); | |
4413 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
4414 | } |
4415 | } | |
07d72278 | 4416 | head = next; |
906e58ca NC |
4417 | } |
4418 | } | |
07d72278 | 4419 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
4420 | |
4421 | free (htab->input_list); | |
4422 | #undef PREV_SEC | |
07d72278 | 4423 | #undef NEXT_SEC |
906e58ca NC |
4424 | } |
4425 | ||
48229727 JB |
4426 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
4427 | erratum fix. */ | |
4428 | ||
4429 | static int | |
4430 | a8_reloc_compare (const void *a, const void *b) | |
4431 | { | |
21d799b5 NC |
4432 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
4433 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
4434 | |
4435 | if (ra->from < rb->from) | |
4436 | return -1; | |
4437 | else if (ra->from > rb->from) | |
4438 | return 1; | |
4439 | else | |
4440 | return 0; | |
4441 | } | |
4442 | ||
4443 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
4444 | const char *, char **); | |
4445 | ||
4446 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
4447 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 4448 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
4449 | otherwise. */ |
4450 | ||
81694485 NC |
4451 | static bfd_boolean |
4452 | cortex_a8_erratum_scan (bfd *input_bfd, | |
4453 | struct bfd_link_info *info, | |
48229727 JB |
4454 | struct a8_erratum_fix **a8_fixes_p, |
4455 | unsigned int *num_a8_fixes_p, | |
4456 | unsigned int *a8_fix_table_size_p, | |
4457 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
4458 | unsigned int num_a8_relocs, |
4459 | unsigned prev_num_a8_fixes, | |
4460 | bfd_boolean *stub_changed_p) | |
48229727 JB |
4461 | { |
4462 | asection *section; | |
4463 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4464 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
4465 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
4466 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
4467 | ||
4dfe6ac6 NC |
4468 | if (htab == NULL) |
4469 | return FALSE; | |
4470 | ||
48229727 JB |
4471 | for (section = input_bfd->sections; |
4472 | section != NULL; | |
4473 | section = section->next) | |
4474 | { | |
4475 | bfd_byte *contents = NULL; | |
4476 | struct _arm_elf_section_data *sec_data; | |
4477 | unsigned int span; | |
4478 | bfd_vma base_vma; | |
4479 | ||
4480 | if (elf_section_type (section) != SHT_PROGBITS | |
4481 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 | |
4482 | || (section->flags & SEC_EXCLUDE) != 0 | |
4483 | || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS) | |
4484 | || (section->output_section == bfd_abs_section_ptr)) | |
4485 | continue; | |
4486 | ||
4487 | base_vma = section->output_section->vma + section->output_offset; | |
4488 | ||
4489 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
4490 | contents = elf_section_data (section)->this_hdr.contents; | |
4491 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) | |
81694485 | 4492 | return TRUE; |
48229727 JB |
4493 | |
4494 | sec_data = elf32_arm_section_data (section); | |
4495 | ||
4496 | for (span = 0; span < sec_data->mapcount; span++) | |
4497 | { | |
4498 | unsigned int span_start = sec_data->map[span].vma; | |
4499 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
4500 | ? section->size : sec_data->map[span + 1].vma; | |
4501 | unsigned int i; | |
4502 | char span_type = sec_data->map[span].type; | |
4503 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; | |
4504 | ||
4505 | if (span_type != 't') | |
4506 | continue; | |
4507 | ||
4508 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
4509 | if (((base_vma + span_start) & ~0xfff) | |
4510 | == ((base_vma + span_end) & ~0xfff)) | |
4511 | continue; | |
4512 | ||
4513 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
4514 | ||
4515 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
4516 | * The branch target is in the same 4KB region as the | |
4517 | first half of the branch. | |
4518 | * The instruction before the branch is a 32-bit | |
81694485 | 4519 | length non-branch instruction. */ |
48229727 JB |
4520 | for (i = span_start; i < span_end;) |
4521 | { | |
4522 | unsigned int insn = bfd_getl16 (&contents[i]); | |
4523 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; | |
4524 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; | |
4525 | ||
4526 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
4527 | insn_32bit = TRUE; | |
4528 | ||
4529 | if (insn_32bit) | |
4530 | { | |
4531 | /* Load the rest of the insn (in manual-friendly order). */ | |
4532 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
4533 | ||
4534 | /* Encoding T4: B<c>.W. */ | |
4535 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
4536 | /* Encoding T1: BL<c>.W. */ | |
4537 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
4538 | /* Encoding T2: BLX<c>.W. */ | |
4539 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
4540 | /* Encoding T3: B<c>.W (not permitted in IT block). */ | |
4541 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
4542 | && (insn & 0x07f00000) != 0x03800000; | |
4543 | } | |
4544 | ||
4545 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
fe33d2fa | 4546 | |
81694485 NC |
4547 | if (((base_vma + i) & 0xfff) == 0xffe |
4548 | && insn_32bit | |
4549 | && is_32bit_branch | |
4550 | && last_was_32bit | |
4551 | && ! last_was_branch) | |
48229727 | 4552 | { |
8f73510c | 4553 | bfd_signed_vma offset = 0; |
48229727 JB |
4554 | bfd_boolean force_target_arm = FALSE; |
4555 | bfd_boolean force_target_thumb = FALSE; | |
4556 | bfd_vma target; | |
4557 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
4558 | struct a8_erratum_reloc key, *found; | |
4559 | ||
4560 | key.from = base_vma + i; | |
21d799b5 NC |
4561 | found = (struct a8_erratum_reloc *) |
4562 | bsearch (&key, a8_relocs, num_a8_relocs, | |
4563 | sizeof (struct a8_erratum_reloc), | |
4564 | &a8_reloc_compare); | |
48229727 JB |
4565 | |
4566 | if (found) | |
4567 | { | |
4568 | char *error_message = NULL; | |
4569 | struct elf_link_hash_entry *entry; | |
92750f34 | 4570 | bfd_boolean use_plt = FALSE; |
48229727 JB |
4571 | |
4572 | /* We don't care about the error returned from this | |
4573 | function, only if there is glue or not. */ | |
4574 | entry = find_thumb_glue (info, found->sym_name, | |
4575 | &error_message); | |
4576 | ||
4577 | if (entry) | |
4578 | found->non_a8_stub = TRUE; | |
4579 | ||
92750f34 | 4580 | /* Keep a simpler condition, for the sake of clarity. */ |
362d30a1 | 4581 | if (htab->root.splt != NULL && found->hash != NULL |
92750f34 DJ |
4582 | && found->hash->root.plt.offset != (bfd_vma) -1) |
4583 | use_plt = TRUE; | |
4584 | ||
4585 | if (found->r_type == R_ARM_THM_CALL) | |
4586 | { | |
35fc36a8 RS |
4587 | if (found->branch_type == ST_BRANCH_TO_ARM |
4588 | || use_plt) | |
92750f34 DJ |
4589 | force_target_arm = TRUE; |
4590 | else | |
4591 | force_target_thumb = TRUE; | |
4592 | } | |
48229727 JB |
4593 | } |
4594 | ||
4595 | /* Check if we have an offending branch instruction. */ | |
4596 | ||
4597 | if (found && found->non_a8_stub) | |
4598 | /* We've already made a stub for this instruction, e.g. | |
4599 | it's a long branch or a Thumb->ARM stub. Assume that | |
4600 | stub will suffice to work around the A8 erratum (see | |
4601 | setting of always_after_branch above). */ | |
4602 | ; | |
4603 | else if (is_bcc) | |
4604 | { | |
4605 | offset = (insn & 0x7ff) << 1; | |
4606 | offset |= (insn & 0x3f0000) >> 4; | |
4607 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
4608 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
4609 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
4610 | if (offset & 0x100000) | |
81694485 | 4611 | offset |= ~ ((bfd_signed_vma) 0xfffff); |
48229727 JB |
4612 | stub_type = arm_stub_a8_veneer_b_cond; |
4613 | } | |
4614 | else if (is_b || is_bl || is_blx) | |
4615 | { | |
4616 | int s = (insn & 0x4000000) != 0; | |
4617 | int j1 = (insn & 0x2000) != 0; | |
4618 | int j2 = (insn & 0x800) != 0; | |
4619 | int i1 = !(j1 ^ s); | |
4620 | int i2 = !(j2 ^ s); | |
4621 | ||
4622 | offset = (insn & 0x7ff) << 1; | |
4623 | offset |= (insn & 0x3ff0000) >> 4; | |
4624 | offset |= i2 << 22; | |
4625 | offset |= i1 << 23; | |
4626 | offset |= s << 24; | |
4627 | if (offset & 0x1000000) | |
81694485 | 4628 | offset |= ~ ((bfd_signed_vma) 0xffffff); |
48229727 JB |
4629 | |
4630 | if (is_blx) | |
81694485 | 4631 | offset &= ~ ((bfd_signed_vma) 3); |
48229727 JB |
4632 | |
4633 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
4634 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
4635 | } | |
4636 | ||
4637 | if (stub_type != arm_stub_none) | |
4638 | { | |
4639 | bfd_vma pc_for_insn = base_vma + i + 4; | |
4640 | ||
4641 | /* The original instruction is a BL, but the target is | |
4642 | an ARM instruction. If we were not making a stub, | |
4643 | the BL would have been converted to a BLX. Use the | |
4644 | BLX stub instead in that case. */ | |
4645 | if (htab->use_blx && force_target_arm | |
4646 | && stub_type == arm_stub_a8_veneer_bl) | |
4647 | { | |
4648 | stub_type = arm_stub_a8_veneer_blx; | |
4649 | is_blx = TRUE; | |
4650 | is_bl = FALSE; | |
4651 | } | |
4652 | /* Conversely, if the original instruction was | |
4653 | BLX but the target is Thumb mode, use the BL | |
4654 | stub. */ | |
4655 | else if (force_target_thumb | |
4656 | && stub_type == arm_stub_a8_veneer_blx) | |
4657 | { | |
4658 | stub_type = arm_stub_a8_veneer_bl; | |
4659 | is_blx = FALSE; | |
4660 | is_bl = TRUE; | |
4661 | } | |
4662 | ||
4663 | if (is_blx) | |
81694485 | 4664 | pc_for_insn &= ~ ((bfd_vma) 3); |
48229727 JB |
4665 | |
4666 | /* If we found a relocation, use the proper destination, | |
4667 | not the offset in the (unrelocated) instruction. | |
4668 | Note this is always done if we switched the stub type | |
4669 | above. */ | |
4670 | if (found) | |
81694485 NC |
4671 | offset = |
4672 | (bfd_signed_vma) (found->destination - pc_for_insn); | |
48229727 JB |
4673 | |
4674 | target = pc_for_insn + offset; | |
4675 | ||
4676 | /* The BLX stub is ARM-mode code. Adjust the offset to | |
4677 | take the different PC value (+8 instead of +4) into | |
4678 | account. */ | |
4679 | if (stub_type == arm_stub_a8_veneer_blx) | |
4680 | offset += 4; | |
4681 | ||
4682 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
4683 | { | |
eb7c4339 | 4684 | char *stub_name = NULL; |
48229727 JB |
4685 | |
4686 | if (num_a8_fixes == a8_fix_table_size) | |
4687 | { | |
4688 | a8_fix_table_size *= 2; | |
21d799b5 NC |
4689 | a8_fixes = (struct a8_erratum_fix *) |
4690 | bfd_realloc (a8_fixes, | |
4691 | sizeof (struct a8_erratum_fix) | |
4692 | * a8_fix_table_size); | |
48229727 JB |
4693 | } |
4694 | ||
eb7c4339 NS |
4695 | if (num_a8_fixes < prev_num_a8_fixes) |
4696 | { | |
4697 | /* If we're doing a subsequent scan, | |
4698 | check if we've found the same fix as | |
4699 | before, and try and reuse the stub | |
4700 | name. */ | |
4701 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
4702 | if ((a8_fixes[num_a8_fixes].section != section) | |
4703 | || (a8_fixes[num_a8_fixes].offset != i)) | |
4704 | { | |
4705 | free (stub_name); | |
4706 | stub_name = NULL; | |
4707 | *stub_changed_p = TRUE; | |
4708 | } | |
4709 | } | |
4710 | ||
4711 | if (!stub_name) | |
4712 | { | |
21d799b5 | 4713 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
4714 | if (stub_name != NULL) |
4715 | sprintf (stub_name, "%x:%x", section->id, i); | |
4716 | } | |
48229727 JB |
4717 | |
4718 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; | |
4719 | a8_fixes[num_a8_fixes].section = section; | |
4720 | a8_fixes[num_a8_fixes].offset = i; | |
4721 | a8_fixes[num_a8_fixes].addend = offset; | |
4722 | a8_fixes[num_a8_fixes].orig_insn = insn; | |
4723 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
4724 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
35fc36a8 RS |
4725 | a8_fixes[num_a8_fixes].branch_type = |
4726 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; | |
48229727 JB |
4727 | |
4728 | num_a8_fixes++; | |
4729 | } | |
4730 | } | |
4731 | } | |
4732 | ||
4733 | i += insn_32bit ? 4 : 2; | |
4734 | last_was_32bit = insn_32bit; | |
4735 | last_was_branch = is_32bit_branch; | |
4736 | } | |
4737 | } | |
4738 | ||
4739 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
4740 | free (contents); | |
4741 | } | |
fe33d2fa | 4742 | |
48229727 JB |
4743 | *a8_fixes_p = a8_fixes; |
4744 | *num_a8_fixes_p = num_a8_fixes; | |
4745 | *a8_fix_table_size_p = a8_fix_table_size; | |
fe33d2fa | 4746 | |
81694485 | 4747 | return FALSE; |
48229727 JB |
4748 | } |
4749 | ||
906e58ca NC |
4750 | /* Determine and set the size of the stub section for a final link. |
4751 | ||
4752 | The basic idea here is to examine all the relocations looking for | |
4753 | PC-relative calls to a target that is unreachable with a "bl" | |
4754 | instruction. */ | |
4755 | ||
4756 | bfd_boolean | |
4757 | elf32_arm_size_stubs (bfd *output_bfd, | |
4758 | bfd *stub_bfd, | |
4759 | struct bfd_link_info *info, | |
4760 | bfd_signed_vma group_size, | |
4761 | asection * (*add_stub_section) (const char *, asection *), | |
4762 | void (*layout_sections_again) (void)) | |
4763 | { | |
4764 | bfd_size_type stub_group_size; | |
07d72278 | 4765 | bfd_boolean stubs_always_after_branch; |
906e58ca | 4766 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 4767 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 4768 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
4769 | struct a8_erratum_reloc *a8_relocs = NULL; |
4770 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
4771 | ||
4dfe6ac6 NC |
4772 | if (htab == NULL) |
4773 | return FALSE; | |
4774 | ||
48229727 JB |
4775 | if (htab->fix_cortex_a8) |
4776 | { | |
21d799b5 NC |
4777 | a8_fixes = (struct a8_erratum_fix *) |
4778 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); | |
4779 | a8_relocs = (struct a8_erratum_reloc *) | |
4780 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); | |
48229727 | 4781 | } |
906e58ca NC |
4782 | |
4783 | /* Propagate mach to stub bfd, because it may not have been | |
4784 | finalized when we created stub_bfd. */ | |
4785 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
4786 | bfd_get_mach (output_bfd)); | |
4787 | ||
4788 | /* Stash our params away. */ | |
4789 | htab->stub_bfd = stub_bfd; | |
4790 | htab->add_stub_section = add_stub_section; | |
4791 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 4792 | stubs_always_after_branch = group_size < 0; |
48229727 JB |
4793 | |
4794 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page | |
4795 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
4796 | crude way of enforcing that. */ | |
4797 | if (htab->fix_cortex_a8) | |
4798 | stubs_always_after_branch = 1; | |
4799 | ||
906e58ca NC |
4800 | if (group_size < 0) |
4801 | stub_group_size = -group_size; | |
4802 | else | |
4803 | stub_group_size = group_size; | |
4804 | ||
4805 | if (stub_group_size == 1) | |
4806 | { | |
4807 | /* Default values. */ | |
4808 | /* Thumb branch range is +-4MB has to be used as the default | |
4809 | maximum size (a given section can contain both ARM and Thumb | |
4810 | code, so the worst case has to be taken into account). | |
4811 | ||
4812 | This value is 24K less than that, which allows for 2025 | |
4813 | 12-byte stubs. If we exceed that, then we will fail to link. | |
4814 | The user will have to relink with an explicit group size | |
4815 | option. */ | |
4816 | stub_group_size = 4170000; | |
4817 | } | |
4818 | ||
07d72278 | 4819 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 4820 | |
3ae046cc NS |
4821 | /* If we're applying the cortex A8 fix, we need to determine the |
4822 | program header size now, because we cannot change it later -- | |
4823 | that could alter section placements. Notice the A8 erratum fix | |
4824 | ends up requiring the section addresses to remain unchanged | |
4825 | modulo the page size. That's something we cannot represent | |
4826 | inside BFD, and we don't want to force the section alignment to | |
4827 | be the page size. */ | |
4828 | if (htab->fix_cortex_a8) | |
4829 | (*htab->layout_sections_again) (); | |
4830 | ||
906e58ca NC |
4831 | while (1) |
4832 | { | |
4833 | bfd *input_bfd; | |
4834 | unsigned int bfd_indx; | |
4835 | asection *stub_sec; | |
eb7c4339 NS |
4836 | bfd_boolean stub_changed = FALSE; |
4837 | unsigned prev_num_a8_fixes = num_a8_fixes; | |
906e58ca | 4838 | |
48229727 | 4839 | num_a8_fixes = 0; |
906e58ca NC |
4840 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
4841 | input_bfd != NULL; | |
4842 | input_bfd = input_bfd->link_next, bfd_indx++) | |
4843 | { | |
4844 | Elf_Internal_Shdr *symtab_hdr; | |
4845 | asection *section; | |
4846 | Elf_Internal_Sym *local_syms = NULL; | |
4847 | ||
48229727 JB |
4848 | num_a8_relocs = 0; |
4849 | ||
906e58ca NC |
4850 | /* We'll need the symbol table in a second. */ |
4851 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
4852 | if (symtab_hdr->sh_info == 0) | |
4853 | continue; | |
4854 | ||
4855 | /* Walk over each section attached to the input bfd. */ | |
4856 | for (section = input_bfd->sections; | |
4857 | section != NULL; | |
4858 | section = section->next) | |
4859 | { | |
4860 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
4861 | ||
4862 | /* If there aren't any relocs, then there's nothing more | |
4863 | to do. */ | |
4864 | if ((section->flags & SEC_RELOC) == 0 | |
4865 | || section->reloc_count == 0 | |
4866 | || (section->flags & SEC_CODE) == 0) | |
4867 | continue; | |
4868 | ||
4869 | /* If this section is a link-once section that will be | |
4870 | discarded, then don't create any stubs. */ | |
4871 | if (section->output_section == NULL | |
4872 | || section->output_section->owner != output_bfd) | |
4873 | continue; | |
4874 | ||
4875 | /* Get the relocs. */ | |
4876 | internal_relocs | |
4877 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
4878 | NULL, info->keep_memory); | |
4879 | if (internal_relocs == NULL) | |
4880 | goto error_ret_free_local; | |
4881 | ||
4882 | /* Now examine each relocation. */ | |
4883 | irela = internal_relocs; | |
4884 | irelaend = irela + section->reloc_count; | |
4885 | for (; irela < irelaend; irela++) | |
4886 | { | |
4887 | unsigned int r_type, r_indx; | |
4888 | enum elf32_arm_stub_type stub_type; | |
4889 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4890 | asection *sym_sec; | |
4891 | bfd_vma sym_value; | |
4892 | bfd_vma destination; | |
4893 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 4894 | const char *sym_name; |
906e58ca NC |
4895 | char *stub_name; |
4896 | const asection *id_sec; | |
34e77a92 | 4897 | unsigned char st_type; |
35fc36a8 | 4898 | enum arm_st_branch_type branch_type; |
48229727 | 4899 | bfd_boolean created_stub = FALSE; |
906e58ca NC |
4900 | |
4901 | r_type = ELF32_R_TYPE (irela->r_info); | |
4902 | r_indx = ELF32_R_SYM (irela->r_info); | |
4903 | ||
4904 | if (r_type >= (unsigned int) R_ARM_max) | |
4905 | { | |
4906 | bfd_set_error (bfd_error_bad_value); | |
4907 | error_ret_free_internal: | |
4908 | if (elf_section_data (section)->relocs == NULL) | |
4909 | free (internal_relocs); | |
4910 | goto error_ret_free_local; | |
4911 | } | |
0855e32b NS |
4912 | |
4913 | hash = NULL; | |
4914 | if (r_indx >= symtab_hdr->sh_info) | |
4915 | hash = elf32_arm_hash_entry | |
4916 | (elf_sym_hashes (input_bfd) | |
4917 | [r_indx - symtab_hdr->sh_info]); | |
4918 | ||
4919 | /* Only look for stubs on branch instructions, or | |
4920 | non-relaxed TLSCALL */ | |
906e58ca | 4921 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
4922 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
4923 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
4924 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
4925 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 | 4926 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
0855e32b NS |
4927 | && (r_type != (unsigned int) R_ARM_PLT32) |
4928 | && !((r_type == (unsigned int) R_ARM_TLS_CALL | |
4929 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
4930 | && r_type == elf32_arm_tls_transition | |
4931 | (info, r_type, &hash->root) | |
4932 | && ((hash ? hash->tls_type | |
4933 | : (elf32_arm_local_got_tls_type | |
4934 | (input_bfd)[r_indx])) | |
4935 | & GOT_TLS_GDESC) != 0)) | |
906e58ca NC |
4936 | continue; |
4937 | ||
4938 | /* Now determine the call target, its name, value, | |
4939 | section. */ | |
4940 | sym_sec = NULL; | |
4941 | sym_value = 0; | |
4942 | destination = 0; | |
7413f23f | 4943 | sym_name = NULL; |
0855e32b NS |
4944 | |
4945 | if (r_type == (unsigned int) R_ARM_TLS_CALL | |
4946 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
4947 | { | |
4948 | /* A non-relaxed TLS call. The target is the | |
4949 | plt-resident trampoline and nothing to do | |
4950 | with the symbol. */ | |
4951 | BFD_ASSERT (htab->tls_trampoline > 0); | |
4952 | sym_sec = htab->root.splt; | |
4953 | sym_value = htab->tls_trampoline; | |
4954 | hash = 0; | |
34e77a92 | 4955 | st_type = STT_FUNC; |
35fc36a8 | 4956 | branch_type = ST_BRANCH_TO_ARM; |
0855e32b NS |
4957 | } |
4958 | else if (!hash) | |
906e58ca NC |
4959 | { |
4960 | /* It's a local symbol. */ | |
4961 | Elf_Internal_Sym *sym; | |
906e58ca NC |
4962 | |
4963 | if (local_syms == NULL) | |
4964 | { | |
4965 | local_syms | |
4966 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
4967 | if (local_syms == NULL) | |
4968 | local_syms | |
4969 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
4970 | symtab_hdr->sh_info, 0, | |
4971 | NULL, NULL, NULL); | |
4972 | if (local_syms == NULL) | |
4973 | goto error_ret_free_internal; | |
4974 | } | |
4975 | ||
4976 | sym = local_syms + r_indx; | |
f6d250ce TS |
4977 | if (sym->st_shndx == SHN_UNDEF) |
4978 | sym_sec = bfd_und_section_ptr; | |
4979 | else if (sym->st_shndx == SHN_ABS) | |
4980 | sym_sec = bfd_abs_section_ptr; | |
4981 | else if (sym->st_shndx == SHN_COMMON) | |
4982 | sym_sec = bfd_com_section_ptr; | |
4983 | else | |
4984 | sym_sec = | |
4985 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); | |
4986 | ||
ffcb4889 NS |
4987 | if (!sym_sec) |
4988 | /* This is an undefined symbol. It can never | |
4989 | be resolved. */ | |
4990 | continue; | |
fe33d2fa | 4991 | |
906e58ca NC |
4992 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
4993 | sym_value = sym->st_value; | |
4994 | destination = (sym_value + irela->r_addend | |
4995 | + sym_sec->output_offset | |
4996 | + sym_sec->output_section->vma); | |
34e77a92 | 4997 | st_type = ELF_ST_TYPE (sym->st_info); |
35fc36a8 | 4998 | branch_type = ARM_SYM_BRANCH_TYPE (sym); |
7413f23f DJ |
4999 | sym_name |
5000 | = bfd_elf_string_from_elf_section (input_bfd, | |
5001 | symtab_hdr->sh_link, | |
5002 | sym->st_name); | |
906e58ca NC |
5003 | } |
5004 | else | |
5005 | { | |
5006 | /* It's an external symbol. */ | |
906e58ca NC |
5007 | while (hash->root.root.type == bfd_link_hash_indirect |
5008 | || hash->root.root.type == bfd_link_hash_warning) | |
5009 | hash = ((struct elf32_arm_link_hash_entry *) | |
5010 | hash->root.root.u.i.link); | |
5011 | ||
5012 | if (hash->root.root.type == bfd_link_hash_defined | |
5013 | || hash->root.root.type == bfd_link_hash_defweak) | |
5014 | { | |
5015 | sym_sec = hash->root.root.u.def.section; | |
5016 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
5017 | |
5018 | struct elf32_arm_link_hash_table *globals = | |
5019 | elf32_arm_hash_table (info); | |
5020 | ||
5021 | /* For a destination in a shared library, | |
5022 | use the PLT stub as target address to | |
5023 | decide whether a branch stub is | |
5024 | needed. */ | |
4dfe6ac6 | 5025 | if (globals != NULL |
362d30a1 | 5026 | && globals->root.splt != NULL |
4dfe6ac6 | 5027 | && hash != NULL |
022f8312 CL |
5028 | && hash->root.plt.offset != (bfd_vma) -1) |
5029 | { | |
362d30a1 | 5030 | sym_sec = globals->root.splt; |
022f8312 CL |
5031 | sym_value = hash->root.plt.offset; |
5032 | if (sym_sec->output_section != NULL) | |
5033 | destination = (sym_value | |
5034 | + sym_sec->output_offset | |
5035 | + sym_sec->output_section->vma); | |
5036 | } | |
5037 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
5038 | destination = (sym_value + irela->r_addend |
5039 | + sym_sec->output_offset | |
5040 | + sym_sec->output_section->vma); | |
5041 | } | |
69c5861e CL |
5042 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
5043 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
5044 | { | |
5045 | /* For a shared library, use the PLT stub as | |
5046 | target address to decide whether a long | |
5047 | branch stub is needed. | |
5048 | For absolute code, they cannot be handled. */ | |
5049 | struct elf32_arm_link_hash_table *globals = | |
5050 | elf32_arm_hash_table (info); | |
5051 | ||
4dfe6ac6 | 5052 | if (globals != NULL |
362d30a1 | 5053 | && globals->root.splt != NULL |
4dfe6ac6 | 5054 | && hash != NULL |
69c5861e CL |
5055 | && hash->root.plt.offset != (bfd_vma) -1) |
5056 | { | |
362d30a1 | 5057 | sym_sec = globals->root.splt; |
69c5861e CL |
5058 | sym_value = hash->root.plt.offset; |
5059 | if (sym_sec->output_section != NULL) | |
5060 | destination = (sym_value | |
5061 | + sym_sec->output_offset | |
5062 | + sym_sec->output_section->vma); | |
5063 | } | |
5064 | else | |
5065 | continue; | |
5066 | } | |
906e58ca NC |
5067 | else |
5068 | { | |
5069 | bfd_set_error (bfd_error_bad_value); | |
5070 | goto error_ret_free_internal; | |
5071 | } | |
34e77a92 | 5072 | st_type = hash->root.type; |
35fc36a8 | 5073 | branch_type = hash->root.target_internal; |
7413f23f | 5074 | sym_name = hash->root.root.root.string; |
906e58ca NC |
5075 | } |
5076 | ||
48229727 | 5077 | do |
7413f23f | 5078 | { |
48229727 JB |
5079 | /* Determine what (if any) linker stub is needed. */ |
5080 | stub_type = arm_type_of_stub (info, section, irela, | |
34e77a92 RS |
5081 | st_type, &branch_type, |
5082 | hash, destination, sym_sec, | |
48229727 JB |
5083 | input_bfd, sym_name); |
5084 | if (stub_type == arm_stub_none) | |
5085 | break; | |
5086 | ||
5087 | /* Support for grouping stub sections. */ | |
5088 | id_sec = htab->stub_group[section->id].link_sec; | |
5089 | ||
5090 | /* Get the name of this stub. */ | |
5091 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, | |
fe33d2fa | 5092 | irela, stub_type); |
48229727 JB |
5093 | if (!stub_name) |
5094 | goto error_ret_free_internal; | |
5095 | ||
5096 | /* We've either created a stub for this reloc already, | |
5097 | or we are about to. */ | |
5098 | created_stub = TRUE; | |
5099 | ||
5100 | stub_entry = arm_stub_hash_lookup | |
5101 | (&htab->stub_hash_table, stub_name, | |
5102 | FALSE, FALSE); | |
5103 | if (stub_entry != NULL) | |
5104 | { | |
5105 | /* The proper stub has already been created. */ | |
5106 | free (stub_name); | |
eb7c4339 | 5107 | stub_entry->target_value = sym_value; |
48229727 JB |
5108 | break; |
5109 | } | |
7413f23f | 5110 | |
48229727 JB |
5111 | stub_entry = elf32_arm_add_stub (stub_name, section, |
5112 | htab); | |
5113 | if (stub_entry == NULL) | |
5114 | { | |
5115 | free (stub_name); | |
5116 | goto error_ret_free_internal; | |
5117 | } | |
7413f23f | 5118 | |
48229727 JB |
5119 | stub_entry->target_value = sym_value; |
5120 | stub_entry->target_section = sym_sec; | |
5121 | stub_entry->stub_type = stub_type; | |
5122 | stub_entry->h = hash; | |
35fc36a8 | 5123 | stub_entry->branch_type = branch_type; |
48229727 JB |
5124 | |
5125 | if (sym_name == NULL) | |
5126 | sym_name = "unnamed"; | |
21d799b5 NC |
5127 | stub_entry->output_name = (char *) |
5128 | bfd_alloc (htab->stub_bfd, | |
48229727 JB |
5129 | sizeof (THUMB2ARM_GLUE_ENTRY_NAME) |
5130 | + strlen (sym_name)); | |
5131 | if (stub_entry->output_name == NULL) | |
5132 | { | |
5133 | free (stub_name); | |
5134 | goto error_ret_free_internal; | |
5135 | } | |
5136 | ||
5137 | /* For historical reasons, use the existing names for | |
5138 | ARM-to-Thumb and Thumb-to-ARM stubs. */ | |
35fc36a8 RS |
5139 | if ((r_type == (unsigned int) R_ARM_THM_CALL |
5140 | || r_type == (unsigned int) R_ARM_THM_JUMP24) | |
5141 | && branch_type == ST_BRANCH_TO_ARM) | |
48229727 JB |
5142 | sprintf (stub_entry->output_name, |
5143 | THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
35fc36a8 RS |
5144 | else if ((r_type == (unsigned int) R_ARM_CALL |
5145 | || r_type == (unsigned int) R_ARM_JUMP24) | |
5146 | && branch_type == ST_BRANCH_TO_THUMB) | |
48229727 JB |
5147 | sprintf (stub_entry->output_name, |
5148 | ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
5149 | else | |
5150 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, | |
5151 | sym_name); | |
5152 | ||
5153 | stub_changed = TRUE; | |
5154 | } | |
5155 | while (0); | |
5156 | ||
5157 | /* Look for relocations which might trigger Cortex-A8 | |
5158 | erratum. */ | |
5159 | if (htab->fix_cortex_a8 | |
5160 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5161 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
5162 | || r_type == (unsigned int) R_ARM_THM_CALL | |
5163 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
5164 | { | |
5165 | bfd_vma from = section->output_section->vma | |
5166 | + section->output_offset | |
5167 | + irela->r_offset; | |
5168 | ||
5169 | if ((from & 0xfff) == 0xffe) | |
5170 | { | |
5171 | /* Found a candidate. Note we haven't checked the | |
5172 | destination is within 4K here: if we do so (and | |
5173 | don't create an entry in a8_relocs) we can't tell | |
5174 | that a branch should have been relocated when | |
5175 | scanning later. */ | |
5176 | if (num_a8_relocs == a8_reloc_table_size) | |
5177 | { | |
5178 | a8_reloc_table_size *= 2; | |
21d799b5 NC |
5179 | a8_relocs = (struct a8_erratum_reloc *) |
5180 | bfd_realloc (a8_relocs, | |
5181 | sizeof (struct a8_erratum_reloc) | |
5182 | * a8_reloc_table_size); | |
48229727 JB |
5183 | } |
5184 | ||
5185 | a8_relocs[num_a8_relocs].from = from; | |
5186 | a8_relocs[num_a8_relocs].destination = destination; | |
5187 | a8_relocs[num_a8_relocs].r_type = r_type; | |
35fc36a8 | 5188 | a8_relocs[num_a8_relocs].branch_type = branch_type; |
48229727 JB |
5189 | a8_relocs[num_a8_relocs].sym_name = sym_name; |
5190 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
92750f34 | 5191 | a8_relocs[num_a8_relocs].hash = hash; |
48229727 JB |
5192 | |
5193 | num_a8_relocs++; | |
5194 | } | |
5195 | } | |
906e58ca NC |
5196 | } |
5197 | ||
48229727 JB |
5198 | /* We're done with the internal relocs, free them. */ |
5199 | if (elf_section_data (section)->relocs == NULL) | |
5200 | free (internal_relocs); | |
5201 | } | |
5202 | ||
5203 | if (htab->fix_cortex_a8) | |
5204 | { | |
5205 | /* Sort relocs which might apply to Cortex-A8 erratum. */ | |
eb7c4339 NS |
5206 | qsort (a8_relocs, num_a8_relocs, |
5207 | sizeof (struct a8_erratum_reloc), | |
48229727 JB |
5208 | &a8_reloc_compare); |
5209 | ||
5210 | /* Scan for branches which might trigger Cortex-A8 erratum. */ | |
5211 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
5212 | &num_a8_fixes, &a8_fix_table_size, | |
eb7c4339 NS |
5213 | a8_relocs, num_a8_relocs, |
5214 | prev_num_a8_fixes, &stub_changed) | |
5215 | != 0) | |
48229727 | 5216 | goto error_ret_free_local; |
5e681ec4 | 5217 | } |
5e681ec4 PB |
5218 | } |
5219 | ||
eb7c4339 | 5220 | if (prev_num_a8_fixes != num_a8_fixes) |
48229727 JB |
5221 | stub_changed = TRUE; |
5222 | ||
906e58ca NC |
5223 | if (!stub_changed) |
5224 | break; | |
5e681ec4 | 5225 | |
906e58ca NC |
5226 | /* OK, we've added some stubs. Find out the new size of the |
5227 | stub sections. */ | |
5228 | for (stub_sec = htab->stub_bfd->sections; | |
5229 | stub_sec != NULL; | |
5230 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
5231 | { |
5232 | /* Ignore non-stub sections. */ | |
5233 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
5234 | continue; | |
5235 | ||
5236 | stub_sec->size = 0; | |
5237 | } | |
b34b2d70 | 5238 | |
906e58ca NC |
5239 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
5240 | ||
48229727 JB |
5241 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
5242 | if (htab->fix_cortex_a8) | |
5243 | for (i = 0; i < num_a8_fixes; i++) | |
5244 | { | |
5245 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, | |
5246 | a8_fixes[i].section, htab); | |
5247 | ||
5248 | if (stub_sec == NULL) | |
5249 | goto error_ret_free_local; | |
5250 | ||
5251 | stub_sec->size | |
5252 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
5253 | NULL); | |
5254 | } | |
5255 | ||
5256 | ||
906e58ca NC |
5257 | /* Ask the linker to do its stuff. */ |
5258 | (*htab->layout_sections_again) (); | |
ba93b8ac DJ |
5259 | } |
5260 | ||
48229727 JB |
5261 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
5262 | if (htab->fix_cortex_a8) | |
5263 | { | |
5264 | for (i = 0; i < num_a8_fixes; i++) | |
5265 | { | |
5266 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5267 | char *stub_name = a8_fixes[i].stub_name; | |
5268 | asection *section = a8_fixes[i].section; | |
5269 | unsigned int section_id = a8_fixes[i].section->id; | |
5270 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
5271 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
d3ce72d0 | 5272 | const insn_sequence *template_sequence; |
48229727 JB |
5273 | int template_size, size = 0; |
5274 | ||
5275 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
5276 | TRUE, FALSE); | |
5277 | if (stub_entry == NULL) | |
5278 | { | |
5279 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
5280 | section->owner, | |
5281 | stub_name); | |
5282 | return FALSE; | |
5283 | } | |
5284 | ||
5285 | stub_entry->stub_sec = stub_sec; | |
5286 | stub_entry->stub_offset = 0; | |
5287 | stub_entry->id_sec = link_sec; | |
5288 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
5289 | stub_entry->target_section = a8_fixes[i].section; | |
5290 | stub_entry->target_value = a8_fixes[i].offset; | |
5291 | stub_entry->target_addend = a8_fixes[i].addend; | |
5292 | stub_entry->orig_insn = a8_fixes[i].orig_insn; | |
35fc36a8 | 5293 | stub_entry->branch_type = a8_fixes[i].branch_type; |
48229727 | 5294 | |
d3ce72d0 NC |
5295 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
5296 | &template_sequence, | |
48229727 JB |
5297 | &template_size); |
5298 | ||
5299 | stub_entry->stub_size = size; | |
d3ce72d0 | 5300 | stub_entry->stub_template = template_sequence; |
48229727 JB |
5301 | stub_entry->stub_template_size = template_size; |
5302 | } | |
5303 | ||
5304 | /* Stash the Cortex-A8 erratum fix array for use later in | |
5305 | elf32_arm_write_section(). */ | |
5306 | htab->a8_erratum_fixes = a8_fixes; | |
5307 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
5308 | } | |
5309 | else | |
5310 | { | |
5311 | htab->a8_erratum_fixes = NULL; | |
5312 | htab->num_a8_erratum_fixes = 0; | |
5313 | } | |
906e58ca NC |
5314 | return TRUE; |
5315 | ||
5316 | error_ret_free_local: | |
5317 | return FALSE; | |
5e681ec4 PB |
5318 | } |
5319 | ||
906e58ca NC |
5320 | /* Build all the stubs associated with the current output file. The |
5321 | stubs are kept in a hash table attached to the main linker hash | |
5322 | table. We also set up the .plt entries for statically linked PIC | |
5323 | functions here. This function is called via arm_elf_finish in the | |
5324 | linker. */ | |
252b5132 | 5325 | |
906e58ca NC |
5326 | bfd_boolean |
5327 | elf32_arm_build_stubs (struct bfd_link_info *info) | |
252b5132 | 5328 | { |
906e58ca NC |
5329 | asection *stub_sec; |
5330 | struct bfd_hash_table *table; | |
5331 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 5332 | |
906e58ca | 5333 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
5334 | if (htab == NULL) |
5335 | return FALSE; | |
252b5132 | 5336 | |
906e58ca NC |
5337 | for (stub_sec = htab->stub_bfd->sections; |
5338 | stub_sec != NULL; | |
5339 | stub_sec = stub_sec->next) | |
252b5132 | 5340 | { |
906e58ca NC |
5341 | bfd_size_type size; |
5342 | ||
8029a119 | 5343 | /* Ignore non-stub sections. */ |
906e58ca NC |
5344 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
5345 | continue; | |
5346 | ||
5347 | /* Allocate memory to hold the linker stubs. */ | |
5348 | size = stub_sec->size; | |
21d799b5 | 5349 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca NC |
5350 | if (stub_sec->contents == NULL && size != 0) |
5351 | return FALSE; | |
5352 | stub_sec->size = 0; | |
252b5132 RH |
5353 | } |
5354 | ||
906e58ca NC |
5355 | /* Build the stubs as directed by the stub hash table. */ |
5356 | table = &htab->stub_hash_table; | |
5357 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
5358 | if (htab->fix_cortex_a8) |
5359 | { | |
5360 | /* Place the cortex a8 stubs last. */ | |
5361 | htab->fix_cortex_a8 = -1; | |
5362 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
5363 | } | |
252b5132 | 5364 | |
906e58ca | 5365 | return TRUE; |
252b5132 RH |
5366 | } |
5367 | ||
9b485d32 NC |
5368 | /* Locate the Thumb encoded calling stub for NAME. */ |
5369 | ||
252b5132 | 5370 | static struct elf_link_hash_entry * |
57e8b36a NC |
5371 | find_thumb_glue (struct bfd_link_info *link_info, |
5372 | const char *name, | |
f2a9dd69 | 5373 | char **error_message) |
252b5132 RH |
5374 | { |
5375 | char *tmp_name; | |
5376 | struct elf_link_hash_entry *hash; | |
5377 | struct elf32_arm_link_hash_table *hash_table; | |
5378 | ||
5379 | /* We need a pointer to the armelf specific hash table. */ | |
5380 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
5381 | if (hash_table == NULL) |
5382 | return NULL; | |
252b5132 | 5383 | |
21d799b5 NC |
5384 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5385 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5386 | |
5387 | BFD_ASSERT (tmp_name); | |
5388 | ||
5389 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
5390 | ||
5391 | hash = elf_link_hash_lookup | |
b34976b6 | 5392 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 5393 | |
b1657152 AM |
5394 | if (hash == NULL |
5395 | && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"), | |
5396 | tmp_name, name) == -1) | |
5397 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
5398 | |
5399 | free (tmp_name); | |
5400 | ||
5401 | return hash; | |
5402 | } | |
5403 | ||
9b485d32 NC |
5404 | /* Locate the ARM encoded calling stub for NAME. */ |
5405 | ||
252b5132 | 5406 | static struct elf_link_hash_entry * |
57e8b36a NC |
5407 | find_arm_glue (struct bfd_link_info *link_info, |
5408 | const char *name, | |
f2a9dd69 | 5409 | char **error_message) |
252b5132 RH |
5410 | { |
5411 | char *tmp_name; | |
5412 | struct elf_link_hash_entry *myh; | |
5413 | struct elf32_arm_link_hash_table *hash_table; | |
5414 | ||
5415 | /* We need a pointer to the elfarm specific hash table. */ | |
5416 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
5417 | if (hash_table == NULL) |
5418 | return NULL; | |
252b5132 | 5419 | |
21d799b5 NC |
5420 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5421 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5422 | |
5423 | BFD_ASSERT (tmp_name); | |
5424 | ||
5425 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
5426 | ||
5427 | myh = elf_link_hash_lookup | |
b34976b6 | 5428 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 5429 | |
b1657152 AM |
5430 | if (myh == NULL |
5431 | && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"), | |
5432 | tmp_name, name) == -1) | |
5433 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
5434 | |
5435 | free (tmp_name); | |
5436 | ||
5437 | return myh; | |
5438 | } | |
5439 | ||
8f6277f5 | 5440 | /* ARM->Thumb glue (static images): |
252b5132 RH |
5441 | |
5442 | .arm | |
5443 | __func_from_arm: | |
5444 | ldr r12, __func_addr | |
5445 | bx r12 | |
5446 | __func_addr: | |
906e58ca | 5447 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 5448 | |
26079076 PB |
5449 | (v5t static images) |
5450 | .arm | |
5451 | __func_from_arm: | |
5452 | ldr pc, __func_addr | |
5453 | __func_addr: | |
906e58ca | 5454 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 5455 | |
8f6277f5 PB |
5456 | (relocatable images) |
5457 | .arm | |
5458 | __func_from_arm: | |
5459 | ldr r12, __func_offset | |
5460 | add r12, r12, pc | |
5461 | bx r12 | |
5462 | __func_offset: | |
8029a119 | 5463 | .word func - . */ |
8f6277f5 PB |
5464 | |
5465 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
5466 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
5467 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
5468 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
5469 | ||
26079076 PB |
5470 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
5471 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
5472 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
5473 | ||
8f6277f5 PB |
5474 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
5475 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
5476 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
5477 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
5478 | ||
9b485d32 | 5479 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 5480 | |
8029a119 NC |
5481 | .thumb .thumb |
5482 | .align 2 .align 2 | |
5483 | __func_from_thumb: __func_from_thumb: | |
5484 | bx pc push {r6, lr} | |
5485 | nop ldr r6, __func_addr | |
5486 | .arm mov lr, pc | |
5487 | b func bx r6 | |
fcef9eb7 NC |
5488 | .arm |
5489 | ;; back_to_thumb | |
5490 | ldmia r13! {r6, lr} | |
5491 | bx lr | |
8029a119 NC |
5492 | __func_addr: |
5493 | .word func */ | |
252b5132 RH |
5494 | |
5495 | #define THUMB2ARM_GLUE_SIZE 8 | |
5496 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
5497 | static const insn16 t2a2_noop_insn = 0x46c0; | |
5498 | static const insn32 t2a3_b_insn = 0xea000000; | |
5499 | ||
c7b8f16e JB |
5500 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
5501 | ||
845b51d6 PB |
5502 | #define ARM_BX_VENEER_SIZE 12 |
5503 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
5504 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
5505 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
5506 | ||
7e392df6 | 5507 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
5508 | static void |
5509 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
5510 | { |
5511 | asection * s; | |
8029a119 | 5512 | bfd_byte * contents; |
252b5132 | 5513 | |
8029a119 | 5514 | if (size == 0) |
3e6b1042 DJ |
5515 | { |
5516 | /* Do not include empty glue sections in the output. */ | |
5517 | if (abfd != NULL) | |
5518 | { | |
5519 | s = bfd_get_section_by_name (abfd, name); | |
5520 | if (s != NULL) | |
5521 | s->flags |= SEC_EXCLUDE; | |
5522 | } | |
5523 | return; | |
5524 | } | |
252b5132 | 5525 | |
8029a119 | 5526 | BFD_ASSERT (abfd != NULL); |
252b5132 | 5527 | |
8029a119 NC |
5528 | s = bfd_get_section_by_name (abfd, name); |
5529 | BFD_ASSERT (s != NULL); | |
252b5132 | 5530 | |
21d799b5 | 5531 | contents = (bfd_byte *) bfd_alloc (abfd, size); |
252b5132 | 5532 | |
8029a119 NC |
5533 | BFD_ASSERT (s->size == size); |
5534 | s->contents = contents; | |
5535 | } | |
906e58ca | 5536 | |
8029a119 NC |
5537 | bfd_boolean |
5538 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) | |
5539 | { | |
5540 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 5541 | |
8029a119 NC |
5542 | globals = elf32_arm_hash_table (info); |
5543 | BFD_ASSERT (globals != NULL); | |
906e58ca | 5544 | |
8029a119 NC |
5545 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5546 | globals->arm_glue_size, | |
5547 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 5548 | |
8029a119 NC |
5549 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5550 | globals->thumb_glue_size, | |
5551 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 5552 | |
8029a119 NC |
5553 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5554 | globals->vfp11_erratum_glue_size, | |
5555 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 5556 | |
8029a119 NC |
5557 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5558 | globals->bx_glue_size, | |
845b51d6 PB |
5559 | ARM_BX_GLUE_SECTION_NAME); |
5560 | ||
b34976b6 | 5561 | return TRUE; |
252b5132 RH |
5562 | } |
5563 | ||
a4fd1a8e | 5564 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
5565 | returns the symbol identifying the stub. */ |
5566 | ||
a4fd1a8e | 5567 | static struct elf_link_hash_entry * |
57e8b36a NC |
5568 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
5569 | struct elf_link_hash_entry * h) | |
252b5132 RH |
5570 | { |
5571 | const char * name = h->root.root.string; | |
63b0f745 | 5572 | asection * s; |
252b5132 RH |
5573 | char * tmp_name; |
5574 | struct elf_link_hash_entry * myh; | |
14a793b2 | 5575 | struct bfd_link_hash_entry * bh; |
252b5132 | 5576 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 5577 | bfd_vma val; |
2f475487 | 5578 | bfd_size_type size; |
252b5132 RH |
5579 | |
5580 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
5581 | BFD_ASSERT (globals != NULL); |
5582 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
5583 | ||
5584 | s = bfd_get_section_by_name | |
5585 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
5586 | ||
252b5132 RH |
5587 | BFD_ASSERT (s != NULL); |
5588 | ||
21d799b5 NC |
5589 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5590 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5591 | |
5592 | BFD_ASSERT (tmp_name); | |
5593 | ||
5594 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
5595 | ||
5596 | myh = elf_link_hash_lookup | |
b34976b6 | 5597 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
5598 | |
5599 | if (myh != NULL) | |
5600 | { | |
9b485d32 | 5601 | /* We've already seen this guy. */ |
252b5132 | 5602 | free (tmp_name); |
a4fd1a8e | 5603 | return myh; |
252b5132 RH |
5604 | } |
5605 | ||
57e8b36a NC |
5606 | /* The only trick here is using hash_table->arm_glue_size as the value. |
5607 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
5608 | putting it. The +1 on the value marks that the stub has not been |
5609 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 5610 | bh = NULL; |
dc810e39 AM |
5611 | val = globals->arm_glue_size + 1; |
5612 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
5613 | tmp_name, BSF_GLOBAL, s, val, | |
b34976b6 | 5614 | NULL, TRUE, FALSE, &bh); |
252b5132 | 5615 | |
b7693d02 DJ |
5616 | myh = (struct elf_link_hash_entry *) bh; |
5617 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5618 | myh->forced_local = 1; | |
5619 | ||
252b5132 RH |
5620 | free (tmp_name); |
5621 | ||
27e55c4d PB |
5622 | if (link_info->shared || globals->root.is_relocatable_executable |
5623 | || globals->pic_veneer) | |
2f475487 | 5624 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
5625 | else if (globals->use_blx) |
5626 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 5627 | else |
2f475487 AM |
5628 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
5629 | ||
5630 | s->size += size; | |
5631 | globals->arm_glue_size += size; | |
252b5132 | 5632 | |
a4fd1a8e | 5633 | return myh; |
252b5132 RH |
5634 | } |
5635 | ||
845b51d6 PB |
5636 | /* Allocate space for ARMv4 BX veneers. */ |
5637 | ||
5638 | static void | |
5639 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
5640 | { | |
5641 | asection * s; | |
5642 | struct elf32_arm_link_hash_table *globals; | |
5643 | char *tmp_name; | |
5644 | struct elf_link_hash_entry *myh; | |
5645 | struct bfd_link_hash_entry *bh; | |
5646 | bfd_vma val; | |
5647 | ||
5648 | /* BX PC does not need a veneer. */ | |
5649 | if (reg == 15) | |
5650 | return; | |
5651 | ||
5652 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
5653 | BFD_ASSERT (globals != NULL); |
5654 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
5655 | ||
5656 | /* Check if this veneer has already been allocated. */ | |
5657 | if (globals->bx_glue_offset[reg]) | |
5658 | return; | |
5659 | ||
5660 | s = bfd_get_section_by_name | |
5661 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); | |
5662 | ||
5663 | BFD_ASSERT (s != NULL); | |
5664 | ||
5665 | /* Add symbol for veneer. */ | |
21d799b5 NC |
5666 | tmp_name = (char *) |
5667 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
906e58ca | 5668 | |
845b51d6 | 5669 | BFD_ASSERT (tmp_name); |
906e58ca | 5670 | |
845b51d6 | 5671 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 5672 | |
845b51d6 PB |
5673 | myh = elf_link_hash_lookup |
5674 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5675 | |
845b51d6 | 5676 | BFD_ASSERT (myh == NULL); |
906e58ca | 5677 | |
845b51d6 PB |
5678 | bh = NULL; |
5679 | val = globals->bx_glue_size; | |
5680 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
5681 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
5682 | NULL, TRUE, FALSE, &bh); | |
5683 | ||
5684 | myh = (struct elf_link_hash_entry *) bh; | |
5685 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5686 | myh->forced_local = 1; | |
5687 | ||
5688 | s->size += ARM_BX_VENEER_SIZE; | |
5689 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
5690 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
5691 | } | |
5692 | ||
5693 | ||
c7b8f16e JB |
5694 | /* Add an entry to the code/data map for section SEC. */ |
5695 | ||
5696 | static void | |
5697 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
5698 | { | |
5699 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
5700 | unsigned int newidx; | |
906e58ca | 5701 | |
c7b8f16e JB |
5702 | if (sec_data->map == NULL) |
5703 | { | |
21d799b5 NC |
5704 | sec_data->map = (elf32_arm_section_map *) |
5705 | bfd_malloc (sizeof (elf32_arm_section_map)); | |
c7b8f16e JB |
5706 | sec_data->mapcount = 0; |
5707 | sec_data->mapsize = 1; | |
5708 | } | |
906e58ca | 5709 | |
c7b8f16e | 5710 | newidx = sec_data->mapcount++; |
906e58ca | 5711 | |
c7b8f16e JB |
5712 | if (sec_data->mapcount > sec_data->mapsize) |
5713 | { | |
5714 | sec_data->mapsize *= 2; | |
21d799b5 NC |
5715 | sec_data->map = (elf32_arm_section_map *) |
5716 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize | |
5717 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
5718 | } |
5719 | ||
5720 | if (sec_data->map) | |
5721 | { | |
5722 | sec_data->map[newidx].vma = vma; | |
5723 | sec_data->map[newidx].type = type; | |
c7b8f16e | 5724 | } |
c7b8f16e JB |
5725 | } |
5726 | ||
5727 | ||
5728 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
5729 | veneers are handled for now. */ | |
5730 | ||
5731 | static bfd_vma | |
5732 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
5733 | elf32_vfp11_erratum_list *branch, | |
5734 | bfd *branch_bfd, | |
5735 | asection *branch_sec, | |
5736 | unsigned int offset) | |
5737 | { | |
5738 | asection *s; | |
5739 | struct elf32_arm_link_hash_table *hash_table; | |
5740 | char *tmp_name; | |
5741 | struct elf_link_hash_entry *myh; | |
5742 | struct bfd_link_hash_entry *bh; | |
5743 | bfd_vma val; | |
5744 | struct _arm_elf_section_data *sec_data; | |
c7b8f16e | 5745 | elf32_vfp11_erratum_list *newerr; |
906e58ca | 5746 | |
c7b8f16e | 5747 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
5748 | BFD_ASSERT (hash_table != NULL); |
5749 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 5750 | |
c7b8f16e JB |
5751 | s = bfd_get_section_by_name |
5752 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); | |
906e58ca | 5753 | |
c7b8f16e | 5754 | sec_data = elf32_arm_section_data (s); |
906e58ca | 5755 | |
c7b8f16e | 5756 | BFD_ASSERT (s != NULL); |
906e58ca | 5757 | |
21d799b5 NC |
5758 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
5759 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
906e58ca | 5760 | |
c7b8f16e | 5761 | BFD_ASSERT (tmp_name); |
906e58ca | 5762 | |
c7b8f16e JB |
5763 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
5764 | hash_table->num_vfp11_fixes); | |
906e58ca | 5765 | |
c7b8f16e JB |
5766 | myh = elf_link_hash_lookup |
5767 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5768 | |
c7b8f16e | 5769 | BFD_ASSERT (myh == NULL); |
906e58ca | 5770 | |
c7b8f16e JB |
5771 | bh = NULL; |
5772 | val = hash_table->vfp11_erratum_glue_size; | |
5773 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
5774 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
5775 | NULL, TRUE, FALSE, &bh); | |
5776 | ||
5777 | myh = (struct elf_link_hash_entry *) bh; | |
5778 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5779 | myh->forced_local = 1; | |
5780 | ||
5781 | /* Link veneer back to calling location. */ | |
c7e2358a | 5782 | sec_data->erratumcount += 1; |
21d799b5 NC |
5783 | newerr = (elf32_vfp11_erratum_list *) |
5784 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 5785 | |
c7b8f16e JB |
5786 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
5787 | newerr->vma = -1; | |
5788 | newerr->u.v.branch = branch; | |
5789 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
5790 | branch->u.b.veneer = newerr; | |
5791 | ||
5792 | newerr->next = sec_data->erratumlist; | |
5793 | sec_data->erratumlist = newerr; | |
5794 | ||
5795 | /* A symbol for the return from the veneer. */ | |
5796 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
5797 | hash_table->num_vfp11_fixes); | |
5798 | ||
5799 | myh = elf_link_hash_lookup | |
5800 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5801 | |
c7b8f16e JB |
5802 | if (myh != NULL) |
5803 | abort (); | |
5804 | ||
5805 | bh = NULL; | |
5806 | val = offset + 4; | |
5807 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
5808 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
906e58ca | 5809 | |
c7b8f16e JB |
5810 | myh = (struct elf_link_hash_entry *) bh; |
5811 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5812 | myh->forced_local = 1; | |
5813 | ||
5814 | free (tmp_name); | |
906e58ca | 5815 | |
c7b8f16e JB |
5816 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
5817 | entry for that symbol to the code/data map for the section. */ | |
5818 | if (hash_table->vfp11_erratum_glue_size == 0) | |
5819 | { | |
5820 | bh = NULL; | |
5821 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
5822 | ever requires this erratum fix. */ | |
5823 | _bfd_generic_link_add_one_symbol (link_info, | |
5824 | hash_table->bfd_of_glue_owner, "$a", | |
5825 | BSF_LOCAL, s, 0, NULL, | |
5826 | TRUE, FALSE, &bh); | |
5827 | ||
5828 | myh = (struct elf_link_hash_entry *) bh; | |
5829 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
5830 | myh->forced_local = 1; | |
906e58ca | 5831 | |
c7b8f16e JB |
5832 | /* The elf32_arm_init_maps function only cares about symbols from input |
5833 | BFDs. We must make a note of this generated mapping symbol | |
5834 | ourselves so that code byteswapping works properly in | |
5835 | elf32_arm_write_section. */ | |
5836 | elf32_arm_section_map_add (s, 'a', 0); | |
5837 | } | |
906e58ca | 5838 | |
c7b8f16e JB |
5839 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
5840 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
5841 | hash_table->num_vfp11_fixes++; | |
906e58ca | 5842 | |
c7b8f16e JB |
5843 | /* The offset of the veneer. */ |
5844 | return val; | |
5845 | } | |
5846 | ||
8029a119 | 5847 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
5848 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
5849 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
5850 | |
5851 | /* Create a fake section for use by the ARM backend of the linker. */ | |
5852 | ||
5853 | static bfd_boolean | |
5854 | arm_make_glue_section (bfd * abfd, const char * name) | |
5855 | { | |
5856 | asection * sec; | |
5857 | ||
5858 | sec = bfd_get_section_by_name (abfd, name); | |
5859 | if (sec != NULL) | |
5860 | /* Already made. */ | |
5861 | return TRUE; | |
5862 | ||
5863 | sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); | |
5864 | ||
5865 | if (sec == NULL | |
5866 | || !bfd_set_section_alignment (abfd, sec, 2)) | |
5867 | return FALSE; | |
5868 | ||
5869 | /* Set the gc mark to prevent the section from being removed by garbage | |
5870 | collection, despite the fact that no relocs refer to this section. */ | |
5871 | sec->gc_mark = 1; | |
5872 | ||
5873 | return TRUE; | |
5874 | } | |
5875 | ||
8afb0e02 NC |
5876 | /* Add the glue sections to ABFD. This function is called from the |
5877 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 5878 | |
b34976b6 | 5879 | bfd_boolean |
57e8b36a NC |
5880 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
5881 | struct bfd_link_info *info) | |
252b5132 | 5882 | { |
8afb0e02 NC |
5883 | /* If we are only performing a partial |
5884 | link do not bother adding the glue. */ | |
1049f94e | 5885 | if (info->relocatable) |
b34976b6 | 5886 | return TRUE; |
252b5132 | 5887 | |
8029a119 NC |
5888 | return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
5889 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) | |
5890 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
5891 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
8afb0e02 NC |
5892 | } |
5893 | ||
5894 | /* Select a BFD to be used to hold the sections used by the glue code. | |
5895 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 5896 | {armelf/pe}.em. */ |
8afb0e02 | 5897 | |
b34976b6 | 5898 | bfd_boolean |
57e8b36a | 5899 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
5900 | { |
5901 | struct elf32_arm_link_hash_table *globals; | |
5902 | ||
5903 | /* If we are only performing a partial link | |
5904 | do not bother getting a bfd to hold the glue. */ | |
1049f94e | 5905 | if (info->relocatable) |
b34976b6 | 5906 | return TRUE; |
8afb0e02 | 5907 | |
b7693d02 DJ |
5908 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
5909 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
5910 | ||
8afb0e02 | 5911 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
5912 | BFD_ASSERT (globals != NULL); |
5913 | ||
5914 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 5915 | return TRUE; |
8afb0e02 | 5916 | |
252b5132 RH |
5917 | /* Save the bfd for later use. */ |
5918 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 5919 | |
b34976b6 | 5920 | return TRUE; |
252b5132 RH |
5921 | } |
5922 | ||
906e58ca NC |
5923 | static void |
5924 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 5925 | { |
104d59d1 JM |
5926 | if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
5927 | Tag_CPU_arch) > 2) | |
39b41c9c PB |
5928 | globals->use_blx = 1; |
5929 | } | |
5930 | ||
b34976b6 | 5931 | bfd_boolean |
57e8b36a | 5932 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 5933 | struct bfd_link_info *link_info) |
252b5132 RH |
5934 | { |
5935 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 5936 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
5937 | Elf_Internal_Rela *irel, *irelend; |
5938 | bfd_byte *contents = NULL; | |
252b5132 RH |
5939 | |
5940 | asection *sec; | |
5941 | struct elf32_arm_link_hash_table *globals; | |
5942 | ||
5943 | /* If we are only performing a partial link do not bother | |
5944 | to construct any glue. */ | |
1049f94e | 5945 | if (link_info->relocatable) |
b34976b6 | 5946 | return TRUE; |
252b5132 | 5947 | |
39ce1a6a NC |
5948 | /* Here we have a bfd that is to be included on the link. We have a |
5949 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 5950 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 5951 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
5952 | |
5953 | check_use_blx (globals); | |
252b5132 | 5954 | |
d504ffc8 | 5955 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 5956 | { |
d003868e AM |
5957 | _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."), |
5958 | abfd); | |
e489d0ae PB |
5959 | return FALSE; |
5960 | } | |
f21f3fe0 | 5961 | |
39ce1a6a NC |
5962 | /* PR 5398: If we have not decided to include any loadable sections in |
5963 | the output then we will not have a glue owner bfd. This is OK, it | |
5964 | just means that there is nothing else for us to do here. */ | |
5965 | if (globals->bfd_of_glue_owner == NULL) | |
5966 | return TRUE; | |
5967 | ||
252b5132 RH |
5968 | /* Rummage around all the relocs and map the glue vectors. */ |
5969 | sec = abfd->sections; | |
5970 | ||
5971 | if (sec == NULL) | |
b34976b6 | 5972 | return TRUE; |
252b5132 RH |
5973 | |
5974 | for (; sec != NULL; sec = sec->next) | |
5975 | { | |
5976 | if (sec->reloc_count == 0) | |
5977 | continue; | |
5978 | ||
2f475487 AM |
5979 | if ((sec->flags & SEC_EXCLUDE) != 0) |
5980 | continue; | |
5981 | ||
0ffa91dd | 5982 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 5983 | |
9b485d32 | 5984 | /* Load the relocs. */ |
6cdc0ccc | 5985 | internal_relocs |
906e58ca | 5986 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
252b5132 | 5987 | |
6cdc0ccc AM |
5988 | if (internal_relocs == NULL) |
5989 | goto error_return; | |
252b5132 | 5990 | |
6cdc0ccc AM |
5991 | irelend = internal_relocs + sec->reloc_count; |
5992 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
5993 | { |
5994 | long r_type; | |
5995 | unsigned long r_index; | |
252b5132 RH |
5996 | |
5997 | struct elf_link_hash_entry *h; | |
5998 | ||
5999 | r_type = ELF32_R_TYPE (irel->r_info); | |
6000 | r_index = ELF32_R_SYM (irel->r_info); | |
6001 | ||
9b485d32 | 6002 | /* These are the only relocation types we care about. */ |
ba96a88f | 6003 | if ( r_type != R_ARM_PC24 |
845b51d6 | 6004 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
6005 | continue; |
6006 | ||
6007 | /* Get the section contents if we haven't done so already. */ | |
6008 | if (contents == NULL) | |
6009 | { | |
6010 | /* Get cached copy if it exists. */ | |
6011 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
6012 | contents = elf_section_data (sec)->this_hdr.contents; | |
6013 | else | |
6014 | { | |
6015 | /* Go get them off disk. */ | |
57e8b36a | 6016 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
6017 | goto error_return; |
6018 | } | |
6019 | } | |
6020 | ||
845b51d6 PB |
6021 | if (r_type == R_ARM_V4BX) |
6022 | { | |
6023 | int reg; | |
6024 | ||
6025 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
6026 | record_arm_bx_glue (link_info, reg); | |
6027 | continue; | |
6028 | } | |
6029 | ||
a7c10850 | 6030 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
6031 | h = NULL; |
6032 | ||
9b485d32 | 6033 | /* We don't care about local symbols. */ |
252b5132 RH |
6034 | if (r_index < symtab_hdr->sh_info) |
6035 | continue; | |
6036 | ||
9b485d32 | 6037 | /* This is an external symbol. */ |
252b5132 RH |
6038 | r_index -= symtab_hdr->sh_info; |
6039 | h = (struct elf_link_hash_entry *) | |
6040 | elf_sym_hashes (abfd)[r_index]; | |
6041 | ||
6042 | /* If the relocation is against a static symbol it must be within | |
6043 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
6044 | if (h == NULL) | |
6045 | continue; | |
6046 | ||
d504ffc8 DJ |
6047 | /* If the call will go through a PLT entry then we do not need |
6048 | glue. */ | |
362d30a1 | 6049 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
b7693d02 DJ |
6050 | continue; |
6051 | ||
252b5132 RH |
6052 | switch (r_type) |
6053 | { | |
6054 | case R_ARM_PC24: | |
6055 | /* This one is a call from arm code. We need to look up | |
2f0ca46a | 6056 | the target of the call. If it is a thumb target, we |
252b5132 | 6057 | insert glue. */ |
35fc36a8 | 6058 | if (h->target_internal == ST_BRANCH_TO_THUMB) |
252b5132 RH |
6059 | record_arm_to_thumb_glue (link_info, h); |
6060 | break; | |
6061 | ||
252b5132 | 6062 | default: |
c6596c5e | 6063 | abort (); |
252b5132 RH |
6064 | } |
6065 | } | |
6cdc0ccc AM |
6066 | |
6067 | if (contents != NULL | |
6068 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6069 | free (contents); | |
6070 | contents = NULL; | |
6071 | ||
6072 | if (internal_relocs != NULL | |
6073 | && elf_section_data (sec)->relocs != internal_relocs) | |
6074 | free (internal_relocs); | |
6075 | internal_relocs = NULL; | |
252b5132 RH |
6076 | } |
6077 | ||
b34976b6 | 6078 | return TRUE; |
9a5aca8c | 6079 | |
252b5132 | 6080 | error_return: |
6cdc0ccc AM |
6081 | if (contents != NULL |
6082 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6083 | free (contents); | |
6084 | if (internal_relocs != NULL | |
6085 | && elf_section_data (sec)->relocs != internal_relocs) | |
6086 | free (internal_relocs); | |
9a5aca8c | 6087 | |
b34976b6 | 6088 | return FALSE; |
252b5132 | 6089 | } |
7e392df6 | 6090 | #endif |
252b5132 | 6091 | |
eb043451 | 6092 | |
c7b8f16e JB |
6093 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
6094 | ||
6095 | void | |
6096 | bfd_elf32_arm_init_maps (bfd *abfd) | |
6097 | { | |
6098 | Elf_Internal_Sym *isymbuf; | |
6099 | Elf_Internal_Shdr *hdr; | |
6100 | unsigned int i, localsyms; | |
6101 | ||
af1f4419 NC |
6102 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
6103 | if (! is_arm_elf (abfd)) | |
6104 | return; | |
6105 | ||
c7b8f16e JB |
6106 | if ((abfd->flags & DYNAMIC) != 0) |
6107 | return; | |
6108 | ||
0ffa91dd | 6109 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
6110 | localsyms = hdr->sh_info; |
6111 | ||
6112 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
6113 | should contain the number of local symbols, which should come before any | |
6114 | global symbols. Mapping symbols are always local. */ | |
6115 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
6116 | NULL); | |
6117 | ||
6118 | /* No internal symbols read? Skip this BFD. */ | |
6119 | if (isymbuf == NULL) | |
6120 | return; | |
6121 | ||
6122 | for (i = 0; i < localsyms; i++) | |
6123 | { | |
6124 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
6125 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
6126 | const char *name; | |
906e58ca | 6127 | |
c7b8f16e JB |
6128 | if (sec != NULL |
6129 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) | |
6130 | { | |
6131 | name = bfd_elf_string_from_elf_section (abfd, | |
6132 | hdr->sh_link, isym->st_name); | |
906e58ca | 6133 | |
c7b8f16e JB |
6134 | if (bfd_is_arm_special_symbol_name (name, |
6135 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) | |
6136 | elf32_arm_section_map_add (sec, name[1], isym->st_value); | |
6137 | } | |
6138 | } | |
6139 | } | |
6140 | ||
6141 | ||
48229727 JB |
6142 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
6143 | say what they wanted. */ | |
6144 | ||
6145 | void | |
6146 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6147 | { | |
6148 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
6149 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
6150 | ||
4dfe6ac6 NC |
6151 | if (globals == NULL) |
6152 | return; | |
6153 | ||
48229727 JB |
6154 | if (globals->fix_cortex_a8 == -1) |
6155 | { | |
6156 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
6157 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
6158 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
6159 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
6160 | globals->fix_cortex_a8 = 1; | |
6161 | else | |
6162 | globals->fix_cortex_a8 = 0; | |
6163 | } | |
6164 | } | |
6165 | ||
6166 | ||
c7b8f16e JB |
6167 | void |
6168 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6169 | { | |
6170 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 6171 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 6172 | |
4dfe6ac6 NC |
6173 | if (globals == NULL) |
6174 | return; | |
c7b8f16e JB |
6175 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
6176 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
6177 | { | |
6178 | switch (globals->vfp11_fix) | |
6179 | { | |
6180 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
6181 | case BFD_ARM_VFP11_FIX_NONE: | |
6182 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
6183 | break; | |
906e58ca | 6184 | |
c7b8f16e JB |
6185 | default: |
6186 | /* Give a warning, but do as the user requests anyway. */ | |
6187 | (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum " | |
6188 | "workaround is not necessary for target architecture"), obfd); | |
6189 | } | |
6190 | } | |
6191 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
6192 | /* For earlier architectures, we might need the workaround, but do not | |
6193 | enable it by default. If users is running with broken hardware, they | |
6194 | must enable the erratum fix explicitly. */ | |
6195 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
6196 | } | |
6197 | ||
6198 | ||
906e58ca NC |
6199 | enum bfd_arm_vfp11_pipe |
6200 | { | |
c7b8f16e JB |
6201 | VFP11_FMAC, |
6202 | VFP11_LS, | |
6203 | VFP11_DS, | |
6204 | VFP11_BAD | |
6205 | }; | |
6206 | ||
6207 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
6208 | registers, or X:RX for double-precision registers, where RX is the group of | |
6209 | four bits in the instruction encoding and X is the single extension bit. | |
6210 | RX and X fields are specified using their lowest (starting) bit. The return | |
6211 | value is: | |
6212 | ||
6213 | 0...31: single-precision registers s0...s31 | |
6214 | 32...63: double-precision registers d0...d31. | |
906e58ca | 6215 | |
c7b8f16e JB |
6216 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
6217 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 6218 | |
c7b8f16e JB |
6219 | static unsigned int |
6220 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, | |
6221 | unsigned int x) | |
6222 | { | |
6223 | if (is_double) | |
6224 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
6225 | else | |
6226 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
6227 | } | |
6228 | ||
6229 | /* Set bits in *WMASK according to a register number REG as encoded by | |
6230 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
6231 | ||
6232 | static void | |
6233 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
6234 | { | |
6235 | if (reg < 32) | |
6236 | *wmask |= 1 << reg; | |
6237 | else if (reg < 48) | |
6238 | *wmask |= 3 << ((reg - 32) * 2); | |
6239 | } | |
6240 | ||
6241 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
6242 | ||
6243 | static bfd_boolean | |
6244 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) | |
6245 | { | |
6246 | int i; | |
906e58ca | 6247 | |
c7b8f16e JB |
6248 | for (i = 0; i < numregs; i++) |
6249 | { | |
6250 | unsigned int reg = regs[i]; | |
6251 | ||
6252 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
6253 | return TRUE; | |
906e58ca | 6254 | |
c7b8f16e JB |
6255 | reg -= 32; |
6256 | ||
6257 | if (reg >= 16) | |
6258 | continue; | |
906e58ca | 6259 | |
c7b8f16e JB |
6260 | if ((wmask & (3 << (reg * 2))) != 0) |
6261 | return TRUE; | |
6262 | } | |
906e58ca | 6263 | |
c7b8f16e JB |
6264 | return FALSE; |
6265 | } | |
6266 | ||
6267 | /* In this function, we're interested in two things: finding input registers | |
6268 | for VFP data-processing instructions, and finding the set of registers which | |
6269 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
6270 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
6271 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
6272 | implemented by the chip in question). DP registers are marked by setting | |
6273 | both SP registers in the write mask). */ | |
6274 | ||
6275 | static enum bfd_arm_vfp11_pipe | |
6276 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
6277 | int *numregs) | |
6278 | { | |
91d6fa6a | 6279 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
c7b8f16e JB |
6280 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
6281 | ||
6282 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
6283 | { | |
6284 | unsigned int pqrs; | |
6285 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
6286 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
6287 | ||
6288 | pqrs = ((insn & 0x00800000) >> 20) | |
6289 | | ((insn & 0x00300000) >> 19) | |
6290 | | ((insn & 0x00000040) >> 6); | |
6291 | ||
6292 | switch (pqrs) | |
6293 | { | |
6294 | case 0: /* fmac[sd]. */ | |
6295 | case 1: /* fnmac[sd]. */ | |
6296 | case 2: /* fmsc[sd]. */ | |
6297 | case 3: /* fnmsc[sd]. */ | |
91d6fa6a | 6298 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6299 | bfd_arm_vfp11_write_mask (destmask, fd); |
6300 | regs[0] = fd; | |
6301 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
6302 | regs[2] = fm; | |
6303 | *numregs = 3; | |
6304 | break; | |
6305 | ||
6306 | case 4: /* fmul[sd]. */ | |
6307 | case 5: /* fnmul[sd]. */ | |
6308 | case 6: /* fadd[sd]. */ | |
6309 | case 7: /* fsub[sd]. */ | |
91d6fa6a | 6310 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6311 | goto vfp_binop; |
6312 | ||
6313 | case 8: /* fdiv[sd]. */ | |
91d6fa6a | 6314 | vpipe = VFP11_DS; |
c7b8f16e JB |
6315 | vfp_binop: |
6316 | bfd_arm_vfp11_write_mask (destmask, fd); | |
6317 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
6318 | regs[1] = fm; | |
6319 | *numregs = 2; | |
6320 | break; | |
6321 | ||
6322 | case 15: /* extended opcode. */ | |
6323 | { | |
6324 | unsigned int extn = ((insn >> 15) & 0x1e) | |
6325 | | ((insn >> 7) & 1); | |
6326 | ||
6327 | switch (extn) | |
6328 | { | |
6329 | case 0: /* fcpy[sd]. */ | |
6330 | case 1: /* fabs[sd]. */ | |
6331 | case 2: /* fneg[sd]. */ | |
6332 | case 8: /* fcmp[sd]. */ | |
6333 | case 9: /* fcmpe[sd]. */ | |
6334 | case 10: /* fcmpz[sd]. */ | |
6335 | case 11: /* fcmpez[sd]. */ | |
6336 | case 16: /* fuito[sd]. */ | |
6337 | case 17: /* fsito[sd]. */ | |
6338 | case 24: /* ftoui[sd]. */ | |
6339 | case 25: /* ftouiz[sd]. */ | |
6340 | case 26: /* ftosi[sd]. */ | |
6341 | case 27: /* ftosiz[sd]. */ | |
6342 | /* These instructions will not bounce due to underflow. */ | |
6343 | *numregs = 0; | |
91d6fa6a | 6344 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6345 | break; |
6346 | ||
6347 | case 3: /* fsqrt[sd]. */ | |
6348 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
6349 | registers to cause the erratum in previous instructions. */ | |
6350 | bfd_arm_vfp11_write_mask (destmask, fd); | |
91d6fa6a | 6351 | vpipe = VFP11_DS; |
c7b8f16e JB |
6352 | break; |
6353 | ||
6354 | case 15: /* fcvt{ds,sd}. */ | |
6355 | { | |
6356 | int rnum = 0; | |
6357 | ||
6358 | bfd_arm_vfp11_write_mask (destmask, fd); | |
6359 | ||
6360 | /* Only FCVTSD can underflow. */ | |
6361 | if ((insn & 0x100) != 0) | |
6362 | regs[rnum++] = fm; | |
6363 | ||
6364 | *numregs = rnum; | |
6365 | ||
91d6fa6a | 6366 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6367 | } |
6368 | break; | |
6369 | ||
6370 | default: | |
6371 | return VFP11_BAD; | |
6372 | } | |
6373 | } | |
6374 | break; | |
6375 | ||
6376 | default: | |
6377 | return VFP11_BAD; | |
6378 | } | |
6379 | } | |
6380 | /* Two-register transfer. */ | |
6381 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
6382 | { | |
6383 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 6384 | |
c7b8f16e JB |
6385 | if ((insn & 0x100000) == 0) |
6386 | { | |
6387 | if (is_double) | |
6388 | bfd_arm_vfp11_write_mask (destmask, fm); | |
6389 | else | |
6390 | { | |
6391 | bfd_arm_vfp11_write_mask (destmask, fm); | |
6392 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
6393 | } | |
6394 | } | |
6395 | ||
91d6fa6a | 6396 | vpipe = VFP11_LS; |
c7b8f16e JB |
6397 | } |
6398 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
6399 | { | |
6400 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
6401 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 6402 | |
c7b8f16e JB |
6403 | switch (puw) |
6404 | { | |
6405 | case 0: /* Two-reg transfer. We should catch these above. */ | |
6406 | abort (); | |
906e58ca | 6407 | |
c7b8f16e JB |
6408 | case 2: /* fldm[sdx]. */ |
6409 | case 3: | |
6410 | case 5: | |
6411 | { | |
6412 | unsigned int i, offset = insn & 0xff; | |
6413 | ||
6414 | if (is_double) | |
6415 | offset >>= 1; | |
6416 | ||
6417 | for (i = fd; i < fd + offset; i++) | |
6418 | bfd_arm_vfp11_write_mask (destmask, i); | |
6419 | } | |
6420 | break; | |
906e58ca | 6421 | |
c7b8f16e JB |
6422 | case 4: /* fld[sd]. */ |
6423 | case 6: | |
6424 | bfd_arm_vfp11_write_mask (destmask, fd); | |
6425 | break; | |
906e58ca | 6426 | |
c7b8f16e JB |
6427 | default: |
6428 | return VFP11_BAD; | |
6429 | } | |
6430 | ||
91d6fa6a | 6431 | vpipe = VFP11_LS; |
c7b8f16e JB |
6432 | } |
6433 | /* Single-register transfer. Note L==0. */ | |
6434 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
6435 | { | |
6436 | unsigned int opcode = (insn >> 21) & 7; | |
6437 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
6438 | ||
6439 | switch (opcode) | |
6440 | { | |
6441 | case 0: /* fmsr/fmdlr. */ | |
6442 | case 1: /* fmdhr. */ | |
6443 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
6444 | destination register. I don't know if this is exactly right, | |
6445 | but it is the conservative choice. */ | |
6446 | bfd_arm_vfp11_write_mask (destmask, fn); | |
6447 | break; | |
6448 | ||
6449 | case 7: /* fmxr. */ | |
6450 | break; | |
6451 | } | |
6452 | ||
91d6fa6a | 6453 | vpipe = VFP11_LS; |
c7b8f16e JB |
6454 | } |
6455 | ||
91d6fa6a | 6456 | return vpipe; |
c7b8f16e JB |
6457 | } |
6458 | ||
6459 | ||
6460 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
6461 | ||
6462 | ||
6463 | /* Look for potentially-troublesome code sequences which might trigger the | |
6464 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
6465 | (available from ARM) for details of the erratum. A short version is | |
6466 | described in ld.texinfo. */ | |
6467 | ||
6468 | bfd_boolean | |
6469 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) | |
6470 | { | |
6471 | asection *sec; | |
6472 | bfd_byte *contents = NULL; | |
6473 | int state = 0; | |
6474 | int regs[3], numregs = 0; | |
6475 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
6476 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 6477 | |
4dfe6ac6 NC |
6478 | if (globals == NULL) |
6479 | return FALSE; | |
6480 | ||
c7b8f16e JB |
6481 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
6482 | The states transition as follows: | |
906e58ca | 6483 | |
c7b8f16e JB |
6484 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
6485 | A VFP FMAC-pipeline instruction has been seen. Fill | |
6486 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
6487 | instruction in 'first_fmac'. | |
6488 | ||
6489 | 1 -> 2 | |
6490 | Any instruction, except for a VFP instruction which overwrites | |
6491 | regs[*]. | |
906e58ca | 6492 | |
c7b8f16e JB |
6493 | 1 -> 3 [ -> 0 ] or |
6494 | 2 -> 3 [ -> 0 ] | |
6495 | A VFP instruction has been seen which overwrites any of regs[*]. | |
6496 | We must make a veneer! Reset state to 0 before examining next | |
6497 | instruction. | |
906e58ca | 6498 | |
c7b8f16e JB |
6499 | 2 -> 0 |
6500 | If we fail to match anything in state 2, reset to state 0 and reset | |
6501 | the instruction pointer to the instruction after 'first_fmac'. | |
6502 | ||
6503 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
6504 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 6505 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
6506 | |
6507 | /* If we are only performing a partial link do not bother | |
6508 | to construct any glue. */ | |
6509 | if (link_info->relocatable) | |
6510 | return TRUE; | |
6511 | ||
0ffa91dd NC |
6512 | /* Skip if this bfd does not correspond to an ELF image. */ |
6513 | if (! is_arm_elf (abfd)) | |
6514 | return TRUE; | |
906e58ca | 6515 | |
c7b8f16e JB |
6516 | /* We should have chosen a fix type by the time we get here. */ |
6517 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
6518 | ||
6519 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
6520 | return TRUE; | |
2e6030b9 | 6521 | |
33a7ffc2 JM |
6522 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
6523 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
6524 | return TRUE; | |
6525 | ||
c7b8f16e JB |
6526 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
6527 | { | |
6528 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
6529 | struct _arm_elf_section_data *sec_data; | |
6530 | ||
6531 | /* If we don't have executable progbits, we're not interested in this | |
6532 | section. Also skip if section is to be excluded. */ | |
6533 | if (elf_section_type (sec) != SHT_PROGBITS | |
6534 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
6535 | || (sec->flags & SEC_EXCLUDE) != 0 | |
33a7ffc2 JM |
6536 | || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS |
6537 | || sec->output_section == bfd_abs_section_ptr | |
c7b8f16e JB |
6538 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
6539 | continue; | |
6540 | ||
6541 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 6542 | |
c7b8f16e JB |
6543 | if (sec_data->mapcount == 0) |
6544 | continue; | |
906e58ca | 6545 | |
c7b8f16e JB |
6546 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
6547 | contents = elf_section_data (sec)->this_hdr.contents; | |
6548 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
6549 | goto error_return; | |
6550 | ||
6551 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
6552 | elf32_arm_compare_mapping); | |
6553 | ||
6554 | for (span = 0; span < sec_data->mapcount; span++) | |
6555 | { | |
6556 | unsigned int span_start = sec_data->map[span].vma; | |
6557 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
6558 | ? sec->size : sec_data->map[span + 1].vma; | |
6559 | char span_type = sec_data->map[span].type; | |
906e58ca | 6560 | |
c7b8f16e JB |
6561 | /* FIXME: Only ARM mode is supported at present. We may need to |
6562 | support Thumb-2 mode also at some point. */ | |
6563 | if (span_type != 'a') | |
6564 | continue; | |
6565 | ||
6566 | for (i = span_start; i < span_end;) | |
6567 | { | |
6568 | unsigned int next_i = i + 4; | |
6569 | unsigned int insn = bfd_big_endian (abfd) | |
6570 | ? (contents[i] << 24) | |
6571 | | (contents[i + 1] << 16) | |
6572 | | (contents[i + 2] << 8) | |
6573 | | contents[i + 3] | |
6574 | : (contents[i + 3] << 24) | |
6575 | | (contents[i + 2] << 16) | |
6576 | | (contents[i + 1] << 8) | |
6577 | | contents[i]; | |
6578 | unsigned int writemask = 0; | |
91d6fa6a | 6579 | enum bfd_arm_vfp11_pipe vpipe; |
c7b8f16e JB |
6580 | |
6581 | switch (state) | |
6582 | { | |
6583 | case 0: | |
91d6fa6a | 6584 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, |
c7b8f16e JB |
6585 | &numregs); |
6586 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
6587 | operands on either the FMAC or the DS pipeline. This might | |
6588 | lead to slightly overenthusiastic veneer insertion. */ | |
91d6fa6a | 6589 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) |
c7b8f16e JB |
6590 | { |
6591 | state = use_vector ? 1 : 2; | |
6592 | first_fmac = i; | |
6593 | veneer_of_insn = insn; | |
6594 | } | |
6595 | break; | |
6596 | ||
6597 | case 1: | |
6598 | { | |
6599 | int other_regs[3], other_numregs; | |
91d6fa6a | 6600 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
c7b8f16e JB |
6601 | other_regs, |
6602 | &other_numregs); | |
91d6fa6a | 6603 | if (vpipe != VFP11_BAD |
c7b8f16e JB |
6604 | && bfd_arm_vfp11_antidependency (writemask, regs, |
6605 | numregs)) | |
6606 | state = 3; | |
6607 | else | |
6608 | state = 2; | |
6609 | } | |
6610 | break; | |
6611 | ||
6612 | case 2: | |
6613 | { | |
6614 | int other_regs[3], other_numregs; | |
91d6fa6a | 6615 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
c7b8f16e JB |
6616 | other_regs, |
6617 | &other_numregs); | |
91d6fa6a | 6618 | if (vpipe != VFP11_BAD |
c7b8f16e JB |
6619 | && bfd_arm_vfp11_antidependency (writemask, regs, |
6620 | numregs)) | |
6621 | state = 3; | |
6622 | else | |
6623 | { | |
6624 | state = 0; | |
6625 | next_i = first_fmac + 4; | |
6626 | } | |
6627 | } | |
6628 | break; | |
6629 | ||
6630 | case 3: | |
6631 | abort (); /* Should be unreachable. */ | |
6632 | } | |
6633 | ||
6634 | if (state == 3) | |
6635 | { | |
21d799b5 NC |
6636 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) |
6637 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
c7b8f16e | 6638 | |
c7e2358a | 6639 | elf32_arm_section_data (sec)->erratumcount += 1; |
c7b8f16e JB |
6640 | |
6641 | newerr->u.b.vfp_insn = veneer_of_insn; | |
6642 | ||
6643 | switch (span_type) | |
6644 | { | |
6645 | case 'a': | |
6646 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
6647 | break; | |
906e58ca | 6648 | |
c7b8f16e JB |
6649 | default: |
6650 | abort (); | |
6651 | } | |
6652 | ||
6653 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
6654 | first_fmac); | |
6655 | ||
6656 | newerr->vma = -1; | |
6657 | ||
6658 | newerr->next = sec_data->erratumlist; | |
6659 | sec_data->erratumlist = newerr; | |
6660 | ||
6661 | state = 0; | |
6662 | } | |
6663 | ||
6664 | i = next_i; | |
6665 | } | |
6666 | } | |
906e58ca | 6667 | |
c7b8f16e JB |
6668 | if (contents != NULL |
6669 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6670 | free (contents); | |
6671 | contents = NULL; | |
6672 | } | |
6673 | ||
6674 | return TRUE; | |
6675 | ||
6676 | error_return: | |
6677 | if (contents != NULL | |
6678 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6679 | free (contents); | |
906e58ca | 6680 | |
c7b8f16e JB |
6681 | return FALSE; |
6682 | } | |
6683 | ||
6684 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
6685 | after sections have been laid out, using specially-named symbols. */ | |
6686 | ||
6687 | void | |
6688 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
6689 | struct bfd_link_info *link_info) | |
6690 | { | |
6691 | asection *sec; | |
6692 | struct elf32_arm_link_hash_table *globals; | |
6693 | char *tmp_name; | |
906e58ca | 6694 | |
c7b8f16e JB |
6695 | if (link_info->relocatable) |
6696 | return; | |
2e6030b9 MS |
6697 | |
6698 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 6699 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
6700 | return; |
6701 | ||
c7b8f16e | 6702 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
6703 | if (globals == NULL) |
6704 | return; | |
906e58ca | 6705 | |
21d799b5 NC |
6706 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
6707 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
c7b8f16e JB |
6708 | |
6709 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
6710 | { | |
6711 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
6712 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 6713 | |
c7b8f16e JB |
6714 | for (; errnode != NULL; errnode = errnode->next) |
6715 | { | |
6716 | struct elf_link_hash_entry *myh; | |
6717 | bfd_vma vma; | |
6718 | ||
6719 | switch (errnode->type) | |
6720 | { | |
6721 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
6722 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
6723 | /* Find veneer symbol. */ | |
6724 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
6725 | errnode->u.b.veneer->u.v.id); | |
6726 | ||
6727 | myh = elf_link_hash_lookup | |
6728 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
6729 | ||
6730 | if (myh == NULL) | |
6731 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
6732 | "`%s'"), abfd, tmp_name); | |
6733 | ||
6734 | vma = myh->root.u.def.section->output_section->vma | |
6735 | + myh->root.u.def.section->output_offset | |
6736 | + myh->root.u.def.value; | |
6737 | ||
6738 | errnode->u.b.veneer->vma = vma; | |
6739 | break; | |
6740 | ||
6741 | case VFP11_ERRATUM_ARM_VENEER: | |
6742 | case VFP11_ERRATUM_THUMB_VENEER: | |
6743 | /* Find return location. */ | |
6744 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6745 | errnode->u.v.id); | |
6746 | ||
6747 | myh = elf_link_hash_lookup | |
6748 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
6749 | ||
6750 | if (myh == NULL) | |
6751 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
6752 | "`%s'"), abfd, tmp_name); | |
6753 | ||
6754 | vma = myh->root.u.def.section->output_section->vma | |
6755 | + myh->root.u.def.section->output_offset | |
6756 | + myh->root.u.def.value; | |
6757 | ||
6758 | errnode->u.v.branch->vma = vma; | |
6759 | break; | |
906e58ca | 6760 | |
c7b8f16e JB |
6761 | default: |
6762 | abort (); | |
6763 | } | |
6764 | } | |
6765 | } | |
906e58ca | 6766 | |
c7b8f16e JB |
6767 | free (tmp_name); |
6768 | } | |
6769 | ||
6770 | ||
eb043451 PB |
6771 | /* Set target relocation values needed during linking. */ |
6772 | ||
6773 | void | |
bf21ed78 MS |
6774 | bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, |
6775 | struct bfd_link_info *link_info, | |
eb043451 | 6776 | int target1_is_rel, |
319850b4 | 6777 | char * target2_type, |
33bfe774 | 6778 | int fix_v4bx, |
c7b8f16e | 6779 | int use_blx, |
bf21ed78 | 6780 | bfd_arm_vfp11_fix vfp11_fix, |
a9dc9481 | 6781 | int no_enum_warn, int no_wchar_warn, |
48229727 | 6782 | int pic_veneer, int fix_cortex_a8) |
eb043451 PB |
6783 | { |
6784 | struct elf32_arm_link_hash_table *globals; | |
6785 | ||
6786 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
6787 | if (globals == NULL) |
6788 | return; | |
eb043451 PB |
6789 | |
6790 | globals->target1_is_rel = target1_is_rel; | |
6791 | if (strcmp (target2_type, "rel") == 0) | |
6792 | globals->target2_reloc = R_ARM_REL32; | |
eeac373a PB |
6793 | else if (strcmp (target2_type, "abs") == 0) |
6794 | globals->target2_reloc = R_ARM_ABS32; | |
eb043451 PB |
6795 | else if (strcmp (target2_type, "got-rel") == 0) |
6796 | globals->target2_reloc = R_ARM_GOT_PREL; | |
6797 | else | |
6798 | { | |
6799 | _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."), | |
6800 | target2_type); | |
6801 | } | |
319850b4 | 6802 | globals->fix_v4bx = fix_v4bx; |
33bfe774 | 6803 | globals->use_blx |= use_blx; |
c7b8f16e | 6804 | globals->vfp11_fix = vfp11_fix; |
27e55c4d | 6805 | globals->pic_veneer = pic_veneer; |
48229727 | 6806 | globals->fix_cortex_a8 = fix_cortex_a8; |
bf21ed78 | 6807 | |
0ffa91dd NC |
6808 | BFD_ASSERT (is_arm_elf (output_bfd)); |
6809 | elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; | |
a9dc9481 | 6810 | elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn; |
eb043451 | 6811 | } |
eb043451 | 6812 | |
12a0a0fd | 6813 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 6814 | |
12a0a0fd PB |
6815 | static void |
6816 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
6817 | { | |
6818 | bfd_vma upper; | |
6819 | bfd_vma lower; | |
6820 | int reloc_sign; | |
6821 | ||
6822 | BFD_ASSERT ((offset & 1) == 0); | |
6823 | ||
6824 | upper = bfd_get_16 (abfd, insn); | |
6825 | lower = bfd_get_16 (abfd, insn + 2); | |
6826 | reloc_sign = (offset < 0) ? 1 : 0; | |
6827 | upper = (upper & ~(bfd_vma) 0x7ff) | |
6828 | | ((offset >> 12) & 0x3ff) | |
6829 | | (reloc_sign << 10); | |
906e58ca | 6830 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
6831 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
6832 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
6833 | | ((offset >> 1) & 0x7ff); | |
6834 | bfd_put_16 (abfd, upper, insn); | |
6835 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
6836 | } |
6837 | ||
9b485d32 NC |
6838 | /* Thumb code calling an ARM function. */ |
6839 | ||
252b5132 | 6840 | static int |
57e8b36a NC |
6841 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
6842 | const char * name, | |
6843 | bfd * input_bfd, | |
6844 | bfd * output_bfd, | |
6845 | asection * input_section, | |
6846 | bfd_byte * hit_data, | |
6847 | asection * sym_sec, | |
6848 | bfd_vma offset, | |
6849 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
6850 | bfd_vma val, |
6851 | char **error_message) | |
252b5132 | 6852 | { |
bcbdc74c | 6853 | asection * s = 0; |
dc810e39 | 6854 | bfd_vma my_offset; |
252b5132 | 6855 | long int ret_offset; |
bcbdc74c NC |
6856 | struct elf_link_hash_entry * myh; |
6857 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 6858 | |
f2a9dd69 | 6859 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 6860 | if (myh == NULL) |
b34976b6 | 6861 | return FALSE; |
252b5132 RH |
6862 | |
6863 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
6864 | BFD_ASSERT (globals != NULL); |
6865 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6866 | ||
6867 | my_offset = myh->root.u.def.value; | |
6868 | ||
6869 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
6870 | THUMB2ARM_GLUE_SECTION_NAME); | |
6871 | ||
6872 | BFD_ASSERT (s != NULL); | |
6873 | BFD_ASSERT (s->contents != NULL); | |
6874 | BFD_ASSERT (s->output_section != NULL); | |
6875 | ||
6876 | if ((my_offset & 0x01) == 0x01) | |
6877 | { | |
6878 | if (sym_sec != NULL | |
6879 | && sym_sec->owner != NULL | |
6880 | && !INTERWORK_FLAG (sym_sec->owner)) | |
6881 | { | |
8f615d07 | 6882 | (*_bfd_error_handler) |
d003868e AM |
6883 | (_("%B(%s): warning: interworking not enabled.\n" |
6884 | " first occurrence: %B: thumb call to arm"), | |
6885 | sym_sec->owner, input_bfd, name); | |
252b5132 | 6886 | |
b34976b6 | 6887 | return FALSE; |
252b5132 RH |
6888 | } |
6889 | ||
6890 | --my_offset; | |
6891 | myh->root.u.def.value = my_offset; | |
6892 | ||
52ab56c2 PB |
6893 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
6894 | s->contents + my_offset); | |
252b5132 | 6895 | |
52ab56c2 PB |
6896 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
6897 | s->contents + my_offset + 2); | |
252b5132 RH |
6898 | |
6899 | ret_offset = | |
9b485d32 NC |
6900 | /* Address of destination of the stub. */ |
6901 | ((bfd_signed_vma) val) | |
252b5132 | 6902 | - ((bfd_signed_vma) |
57e8b36a NC |
6903 | /* Offset from the start of the current section |
6904 | to the start of the stubs. */ | |
9b485d32 NC |
6905 | (s->output_offset |
6906 | /* Offset of the start of this stub from the start of the stubs. */ | |
6907 | + my_offset | |
6908 | /* Address of the start of the current section. */ | |
6909 | + s->output_section->vma) | |
6910 | /* The branch instruction is 4 bytes into the stub. */ | |
6911 | + 4 | |
6912 | /* ARM branches work from the pc of the instruction + 8. */ | |
6913 | + 8); | |
252b5132 | 6914 | |
52ab56c2 PB |
6915 | put_arm_insn (globals, output_bfd, |
6916 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
6917 | s->contents + my_offset + 4); | |
252b5132 RH |
6918 | } |
6919 | ||
6920 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
6921 | ||
427bfd90 NC |
6922 | /* Now go back and fix up the original BL insn to point to here. */ |
6923 | ret_offset = | |
6924 | /* Address of where the stub is located. */ | |
6925 | (s->output_section->vma + s->output_offset + my_offset) | |
6926 | /* Address of where the BL is located. */ | |
57e8b36a NC |
6927 | - (input_section->output_section->vma + input_section->output_offset |
6928 | + offset) | |
427bfd90 NC |
6929 | /* Addend in the relocation. */ |
6930 | - addend | |
6931 | /* Biassing for PC-relative addressing. */ | |
6932 | - 8; | |
252b5132 | 6933 | |
12a0a0fd | 6934 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 6935 | |
b34976b6 | 6936 | return TRUE; |
252b5132 RH |
6937 | } |
6938 | ||
a4fd1a8e | 6939 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 6940 | |
a4fd1a8e PB |
6941 | static struct elf_link_hash_entry * |
6942 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
6943 | const char * name, | |
6944 | bfd * input_bfd, | |
6945 | bfd * output_bfd, | |
6946 | asection * sym_sec, | |
6947 | bfd_vma val, | |
8029a119 NC |
6948 | asection * s, |
6949 | char ** error_message) | |
252b5132 | 6950 | { |
dc810e39 | 6951 | bfd_vma my_offset; |
252b5132 | 6952 | long int ret_offset; |
bcbdc74c NC |
6953 | struct elf_link_hash_entry * myh; |
6954 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 6955 | |
f2a9dd69 | 6956 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 6957 | if (myh == NULL) |
a4fd1a8e | 6958 | return NULL; |
252b5132 RH |
6959 | |
6960 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
6961 | BFD_ASSERT (globals != NULL); |
6962 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6963 | ||
6964 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
6965 | |
6966 | if ((my_offset & 0x01) == 0x01) | |
6967 | { | |
6968 | if (sym_sec != NULL | |
6969 | && sym_sec->owner != NULL | |
6970 | && !INTERWORK_FLAG (sym_sec->owner)) | |
6971 | { | |
8f615d07 | 6972 | (*_bfd_error_handler) |
d003868e AM |
6973 | (_("%B(%s): warning: interworking not enabled.\n" |
6974 | " first occurrence: %B: arm call to thumb"), | |
6975 | sym_sec->owner, input_bfd, name); | |
252b5132 | 6976 | } |
9b485d32 | 6977 | |
252b5132 RH |
6978 | --my_offset; |
6979 | myh->root.u.def.value = my_offset; | |
6980 | ||
27e55c4d PB |
6981 | if (info->shared || globals->root.is_relocatable_executable |
6982 | || globals->pic_veneer) | |
8f6277f5 PB |
6983 | { |
6984 | /* For relocatable objects we can't use absolute addresses, | |
6985 | so construct the address from a relative offset. */ | |
6986 | /* TODO: If the offset is small it's probably worth | |
6987 | constructing the address with adds. */ | |
52ab56c2 PB |
6988 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
6989 | s->contents + my_offset); | |
6990 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
6991 | s->contents + my_offset + 4); | |
6992 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
6993 | s->contents + my_offset + 8); | |
8f6277f5 PB |
6994 | /* Adjust the offset by 4 for the position of the add, |
6995 | and 8 for the pipeline offset. */ | |
6996 | ret_offset = (val - (s->output_offset | |
6997 | + s->output_section->vma | |
6998 | + my_offset + 12)) | |
6999 | | 1; | |
7000 | bfd_put_32 (output_bfd, ret_offset, | |
7001 | s->contents + my_offset + 12); | |
7002 | } | |
26079076 PB |
7003 | else if (globals->use_blx) |
7004 | { | |
7005 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
7006 | s->contents + my_offset); | |
7007 | ||
7008 | /* It's a thumb address. Add the low order bit. */ | |
7009 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
7010 | s->contents + my_offset + 4); | |
7011 | } | |
8f6277f5 PB |
7012 | else |
7013 | { | |
52ab56c2 PB |
7014 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
7015 | s->contents + my_offset); | |
252b5132 | 7016 | |
52ab56c2 PB |
7017 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
7018 | s->contents + my_offset + 4); | |
252b5132 | 7019 | |
8f6277f5 PB |
7020 | /* It's a thumb address. Add the low order bit. */ |
7021 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
7022 | s->contents + my_offset + 8); | |
8029a119 NC |
7023 | |
7024 | my_offset += 12; | |
8f6277f5 | 7025 | } |
252b5132 RH |
7026 | } |
7027 | ||
7028 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
7029 | ||
a4fd1a8e PB |
7030 | return myh; |
7031 | } | |
7032 | ||
7033 | /* Arm code calling a Thumb function. */ | |
7034 | ||
7035 | static int | |
7036 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
7037 | const char * name, | |
7038 | bfd * input_bfd, | |
7039 | bfd * output_bfd, | |
7040 | asection * input_section, | |
7041 | bfd_byte * hit_data, | |
7042 | asection * sym_sec, | |
7043 | bfd_vma offset, | |
7044 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
7045 | bfd_vma val, |
7046 | char **error_message) | |
a4fd1a8e PB |
7047 | { |
7048 | unsigned long int tmp; | |
7049 | bfd_vma my_offset; | |
7050 | asection * s; | |
7051 | long int ret_offset; | |
7052 | struct elf_link_hash_entry * myh; | |
7053 | struct elf32_arm_link_hash_table * globals; | |
7054 | ||
7055 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
7056 | BFD_ASSERT (globals != NULL); |
7057 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7058 | ||
7059 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
7060 | ARM2THUMB_GLUE_SECTION_NAME); | |
7061 | BFD_ASSERT (s != NULL); | |
7062 | BFD_ASSERT (s->contents != NULL); | |
7063 | BFD_ASSERT (s->output_section != NULL); | |
7064 | ||
7065 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 7066 | sym_sec, val, s, error_message); |
a4fd1a8e PB |
7067 | if (!myh) |
7068 | return FALSE; | |
7069 | ||
7070 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
7071 | tmp = bfd_get_32 (input_bfd, hit_data); |
7072 | tmp = tmp & 0xFF000000; | |
7073 | ||
9b485d32 | 7074 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
7075 | ret_offset = (s->output_offset |
7076 | + my_offset | |
7077 | + s->output_section->vma | |
7078 | - (input_section->output_offset | |
7079 | + input_section->output_section->vma | |
7080 | + offset + addend) | |
7081 | - 8); | |
9a5aca8c | 7082 | |
252b5132 RH |
7083 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
7084 | ||
dc810e39 | 7085 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 7086 | |
b34976b6 | 7087 | return TRUE; |
252b5132 RH |
7088 | } |
7089 | ||
a4fd1a8e PB |
7090 | /* Populate Arm stub for an exported Thumb function. */ |
7091 | ||
7092 | static bfd_boolean | |
7093 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) | |
7094 | { | |
7095 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
7096 | asection * s; | |
7097 | struct elf_link_hash_entry * myh; | |
7098 | struct elf32_arm_link_hash_entry *eh; | |
7099 | struct elf32_arm_link_hash_table * globals; | |
7100 | asection *sec; | |
7101 | bfd_vma val; | |
f2a9dd69 | 7102 | char *error_message; |
a4fd1a8e | 7103 | |
906e58ca | 7104 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
7105 | /* Allocate stubs for exported Thumb functions on v4t. */ |
7106 | if (eh->export_glue == NULL) | |
7107 | return TRUE; | |
7108 | ||
7109 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
7110 | BFD_ASSERT (globals != NULL); |
7111 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7112 | ||
7113 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
7114 | ARM2THUMB_GLUE_SECTION_NAME); | |
7115 | BFD_ASSERT (s != NULL); | |
7116 | BFD_ASSERT (s->contents != NULL); | |
7117 | BFD_ASSERT (s->output_section != NULL); | |
7118 | ||
7119 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
7120 | |
7121 | BFD_ASSERT (sec->output_section != NULL); | |
7122 | ||
a4fd1a8e PB |
7123 | val = eh->export_glue->root.u.def.value + sec->output_offset |
7124 | + sec->output_section->vma; | |
8029a119 | 7125 | |
a4fd1a8e PB |
7126 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
7127 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
7128 | globals->obfd, sec, val, s, |
7129 | &error_message); | |
a4fd1a8e PB |
7130 | BFD_ASSERT (myh); |
7131 | return TRUE; | |
7132 | } | |
7133 | ||
845b51d6 PB |
7134 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
7135 | ||
7136 | static bfd_vma | |
7137 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
7138 | { | |
7139 | bfd_byte *p; | |
7140 | bfd_vma glue_addr; | |
7141 | asection *s; | |
7142 | struct elf32_arm_link_hash_table *globals; | |
7143 | ||
7144 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
7145 | BFD_ASSERT (globals != NULL); |
7146 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7147 | ||
7148 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
7149 | ARM_BX_GLUE_SECTION_NAME); | |
7150 | BFD_ASSERT (s != NULL); | |
7151 | BFD_ASSERT (s->contents != NULL); | |
7152 | BFD_ASSERT (s->output_section != NULL); | |
7153 | ||
7154 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
7155 | ||
7156 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
7157 | ||
7158 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
7159 | { | |
7160 | p = s->contents + glue_addr; | |
7161 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
7162 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
7163 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
7164 | globals->bx_glue_offset[reg] |= 1; | |
7165 | } | |
7166 | ||
7167 | return glue_addr + s->output_section->vma + s->output_offset; | |
7168 | } | |
7169 | ||
a4fd1a8e PB |
7170 | /* Generate Arm stubs for exported Thumb symbols. */ |
7171 | static void | |
906e58ca | 7172 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
7173 | struct bfd_link_info *link_info) |
7174 | { | |
7175 | struct elf32_arm_link_hash_table * globals; | |
7176 | ||
8029a119 NC |
7177 | if (link_info == NULL) |
7178 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
7179 | return; |
7180 | ||
7181 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7182 | if (globals == NULL) |
7183 | return; | |
7184 | ||
84c08195 PB |
7185 | /* If blx is available then exported Thumb symbols are OK and there is |
7186 | nothing to do. */ | |
a4fd1a8e PB |
7187 | if (globals->use_blx) |
7188 | return; | |
7189 | ||
7190 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
7191 | link_info); | |
7192 | } | |
7193 | ||
47beaa6a RS |
7194 | /* Reserve space for COUNT dynamic relocations in relocation selection |
7195 | SRELOC. */ | |
7196 | ||
7197 | static void | |
7198 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, | |
7199 | bfd_size_type count) | |
7200 | { | |
7201 | struct elf32_arm_link_hash_table *htab; | |
7202 | ||
7203 | htab = elf32_arm_hash_table (info); | |
7204 | BFD_ASSERT (htab->root.dynamic_sections_created); | |
7205 | if (sreloc == NULL) | |
7206 | abort (); | |
7207 | sreloc->size += RELOC_SIZE (htab) * count; | |
7208 | } | |
7209 | ||
34e77a92 RS |
7210 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
7211 | dynamic, the relocations should go in SRELOC, otherwise they should | |
7212 | go in the special .rel.iplt section. */ | |
7213 | ||
7214 | static void | |
7215 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, | |
7216 | bfd_size_type count) | |
7217 | { | |
7218 | struct elf32_arm_link_hash_table *htab; | |
7219 | ||
7220 | htab = elf32_arm_hash_table (info); | |
7221 | if (!htab->root.dynamic_sections_created) | |
7222 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; | |
7223 | else | |
7224 | { | |
7225 | BFD_ASSERT (sreloc != NULL); | |
7226 | sreloc->size += RELOC_SIZE (htab) * count; | |
7227 | } | |
7228 | } | |
7229 | ||
47beaa6a RS |
7230 | /* Add relocation REL to the end of relocation section SRELOC. */ |
7231 | ||
7232 | static void | |
7233 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, | |
7234 | asection *sreloc, Elf_Internal_Rela *rel) | |
7235 | { | |
7236 | bfd_byte *loc; | |
7237 | struct elf32_arm_link_hash_table *htab; | |
7238 | ||
7239 | htab = elf32_arm_hash_table (info); | |
34e77a92 RS |
7240 | if (!htab->root.dynamic_sections_created |
7241 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) | |
7242 | sreloc = htab->root.irelplt; | |
47beaa6a RS |
7243 | if (sreloc == NULL) |
7244 | abort (); | |
7245 | loc = sreloc->contents; | |
7246 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); | |
7247 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) | |
7248 | abort (); | |
7249 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); | |
7250 | } | |
7251 | ||
34e77a92 RS |
7252 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
7253 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than | |
7254 | to .plt. */ | |
7255 | ||
7256 | static void | |
7257 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, | |
7258 | bfd_boolean is_iplt_entry, | |
7259 | union gotplt_union *root_plt, | |
7260 | struct arm_plt_info *arm_plt) | |
7261 | { | |
7262 | struct elf32_arm_link_hash_table *htab; | |
7263 | asection *splt; | |
7264 | asection *sgotplt; | |
7265 | ||
7266 | htab = elf32_arm_hash_table (info); | |
7267 | ||
7268 | if (is_iplt_entry) | |
7269 | { | |
7270 | splt = htab->root.iplt; | |
7271 | sgotplt = htab->root.igotplt; | |
7272 | ||
7273 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ | |
7274 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); | |
7275 | } | |
7276 | else | |
7277 | { | |
7278 | splt = htab->root.splt; | |
7279 | sgotplt = htab->root.sgotplt; | |
7280 | ||
7281 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ | |
7282 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
7283 | ||
7284 | /* If this is the first .plt entry, make room for the special | |
7285 | first entry. */ | |
7286 | if (splt->size == 0) | |
7287 | splt->size += htab->plt_header_size; | |
7288 | } | |
7289 | ||
7290 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ | |
7291 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
7292 | splt->size += PLT_THUMB_STUB_SIZE; | |
7293 | root_plt->offset = splt->size; | |
7294 | splt->size += htab->plt_entry_size; | |
7295 | ||
7296 | if (!htab->symbian_p) | |
7297 | { | |
7298 | /* We also need to make an entry in the .got.plt section, which | |
7299 | will be placed in the .got section by the linker script. */ | |
7300 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; | |
7301 | sgotplt->size += 4; | |
7302 | } | |
7303 | } | |
7304 | ||
7305 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, | |
7306 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). | |
7307 | Otherwise, DYNINDX is the index of the symbol in the dynamic | |
7308 | symbol table and SYM_VALUE is undefined. | |
7309 | ||
7310 | ROOT_PLT points to the offset of the PLT entry from the start of its | |
7311 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific | |
7312 | bookkeeping information. */ | |
7313 | ||
7314 | static void | |
7315 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, | |
7316 | union gotplt_union *root_plt, | |
7317 | struct arm_plt_info *arm_plt, | |
7318 | int dynindx, bfd_vma sym_value) | |
7319 | { | |
7320 | struct elf32_arm_link_hash_table *htab; | |
7321 | asection *sgot; | |
7322 | asection *splt; | |
7323 | asection *srel; | |
7324 | bfd_byte *loc; | |
7325 | bfd_vma plt_index; | |
7326 | Elf_Internal_Rela rel; | |
7327 | bfd_vma plt_header_size; | |
7328 | bfd_vma got_header_size; | |
7329 | ||
7330 | htab = elf32_arm_hash_table (info); | |
7331 | ||
7332 | /* Pick the appropriate sections and sizes. */ | |
7333 | if (dynindx == -1) | |
7334 | { | |
7335 | splt = htab->root.iplt; | |
7336 | sgot = htab->root.igotplt; | |
7337 | srel = htab->root.irelplt; | |
7338 | ||
7339 | /* There are no reserved entries in .igot.plt, and no special | |
7340 | first entry in .iplt. */ | |
7341 | got_header_size = 0; | |
7342 | plt_header_size = 0; | |
7343 | } | |
7344 | else | |
7345 | { | |
7346 | splt = htab->root.splt; | |
7347 | sgot = htab->root.sgotplt; | |
7348 | srel = htab->root.srelplt; | |
7349 | ||
7350 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; | |
7351 | plt_header_size = htab->plt_header_size; | |
7352 | } | |
7353 | BFD_ASSERT (splt != NULL && srel != NULL); | |
7354 | ||
7355 | /* Fill in the entry in the procedure linkage table. */ | |
7356 | if (htab->symbian_p) | |
7357 | { | |
7358 | BFD_ASSERT (dynindx >= 0); | |
7359 | put_arm_insn (htab, output_bfd, | |
7360 | elf32_arm_symbian_plt_entry[0], | |
7361 | splt->contents + root_plt->offset); | |
7362 | bfd_put_32 (output_bfd, | |
7363 | elf32_arm_symbian_plt_entry[1], | |
7364 | splt->contents + root_plt->offset + 4); | |
7365 | ||
7366 | /* Fill in the entry in the .rel.plt section. */ | |
7367 | rel.r_offset = (splt->output_section->vma | |
7368 | + splt->output_offset | |
7369 | + root_plt->offset + 4); | |
7370 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT); | |
7371 | ||
7372 | /* Get the index in the procedure linkage table which | |
7373 | corresponds to this symbol. This is the index of this symbol | |
7374 | in all the symbols for which we are making plt entries. The | |
7375 | first entry in the procedure linkage table is reserved. */ | |
7376 | plt_index = ((root_plt->offset - plt_header_size) | |
7377 | / htab->plt_entry_size); | |
7378 | } | |
7379 | else | |
7380 | { | |
7381 | bfd_vma got_offset, got_address, plt_address; | |
7382 | bfd_vma got_displacement, initial_got_entry; | |
7383 | bfd_byte * ptr; | |
7384 | ||
7385 | BFD_ASSERT (sgot != NULL); | |
7386 | ||
7387 | /* Get the offset into the .(i)got.plt table of the entry that | |
7388 | corresponds to this function. */ | |
7389 | got_offset = (arm_plt->got_offset & -2); | |
7390 | ||
7391 | /* Get the index in the procedure linkage table which | |
7392 | corresponds to this symbol. This is the index of this symbol | |
7393 | in all the symbols for which we are making plt entries. | |
7394 | After the reserved .got.plt entries, all symbols appear in | |
7395 | the same order as in .plt. */ | |
7396 | plt_index = (got_offset - got_header_size) / 4; | |
7397 | ||
7398 | /* Calculate the address of the GOT entry. */ | |
7399 | got_address = (sgot->output_section->vma | |
7400 | + sgot->output_offset | |
7401 | + got_offset); | |
7402 | ||
7403 | /* ...and the address of the PLT entry. */ | |
7404 | plt_address = (splt->output_section->vma | |
7405 | + splt->output_offset | |
7406 | + root_plt->offset); | |
7407 | ||
7408 | ptr = splt->contents + root_plt->offset; | |
7409 | if (htab->vxworks_p && info->shared) | |
7410 | { | |
7411 | unsigned int i; | |
7412 | bfd_vma val; | |
7413 | ||
7414 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
7415 | { | |
7416 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
7417 | if (i == 2) | |
7418 | val |= got_address - sgot->output_section->vma; | |
7419 | if (i == 5) | |
7420 | val |= plt_index * RELOC_SIZE (htab); | |
7421 | if (i == 2 || i == 5) | |
7422 | bfd_put_32 (output_bfd, val, ptr); | |
7423 | else | |
7424 | put_arm_insn (htab, output_bfd, val, ptr); | |
7425 | } | |
7426 | } | |
7427 | else if (htab->vxworks_p) | |
7428 | { | |
7429 | unsigned int i; | |
7430 | bfd_vma val; | |
7431 | ||
7432 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
7433 | { | |
7434 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
7435 | if (i == 2) | |
7436 | val |= got_address; | |
7437 | if (i == 4) | |
7438 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); | |
7439 | if (i == 5) | |
7440 | val |= plt_index * RELOC_SIZE (htab); | |
7441 | if (i == 2 || i == 5) | |
7442 | bfd_put_32 (output_bfd, val, ptr); | |
7443 | else | |
7444 | put_arm_insn (htab, output_bfd, val, ptr); | |
7445 | } | |
7446 | ||
7447 | loc = (htab->srelplt2->contents | |
7448 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
7449 | ||
7450 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation | |
7451 | referencing the GOT for this PLT entry. */ | |
7452 | rel.r_offset = plt_address + 8; | |
7453 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
7454 | rel.r_addend = got_offset; | |
7455 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
7456 | loc += RELOC_SIZE (htab); | |
7457 | ||
7458 | /* Create the R_ARM_ABS32 relocation referencing the | |
7459 | beginning of the PLT for this GOT entry. */ | |
7460 | rel.r_offset = got_address; | |
7461 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
7462 | rel.r_addend = 0; | |
7463 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
7464 | } | |
7465 | else | |
7466 | { | |
7467 | /* Calculate the displacement between the PLT slot and the | |
7468 | entry in the GOT. The eight-byte offset accounts for the | |
7469 | value produced by adding to pc in the first instruction | |
7470 | of the PLT stub. */ | |
7471 | got_displacement = got_address - (plt_address + 8); | |
7472 | ||
7473 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); | |
7474 | ||
7475 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
7476 | { | |
7477 | put_thumb_insn (htab, output_bfd, | |
7478 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
7479 | put_thumb_insn (htab, output_bfd, | |
7480 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
7481 | } | |
7482 | ||
7483 | put_arm_insn (htab, output_bfd, | |
7484 | elf32_arm_plt_entry[0] | |
7485 | | ((got_displacement & 0x0ff00000) >> 20), | |
7486 | ptr + 0); | |
7487 | put_arm_insn (htab, output_bfd, | |
7488 | elf32_arm_plt_entry[1] | |
7489 | | ((got_displacement & 0x000ff000) >> 12), | |
7490 | ptr+ 4); | |
7491 | put_arm_insn (htab, output_bfd, | |
7492 | elf32_arm_plt_entry[2] | |
7493 | | (got_displacement & 0x00000fff), | |
7494 | ptr + 8); | |
7495 | #ifdef FOUR_WORD_PLT | |
7496 | bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12); | |
7497 | #endif | |
7498 | } | |
7499 | ||
7500 | /* Fill in the entry in the .rel(a).(i)plt section. */ | |
7501 | rel.r_offset = got_address; | |
7502 | rel.r_addend = 0; | |
7503 | if (dynindx == -1) | |
7504 | { | |
7505 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. | |
7506 | The dynamic linker or static executable then calls SYM_VALUE | |
7507 | to determine the correct run-time value of the .igot.plt entry. */ | |
7508 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
7509 | initial_got_entry = sym_value; | |
7510 | } | |
7511 | else | |
7512 | { | |
7513 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); | |
7514 | initial_got_entry = (splt->output_section->vma | |
7515 | + splt->output_offset); | |
7516 | } | |
7517 | ||
7518 | /* Fill in the entry in the global offset table. */ | |
7519 | bfd_put_32 (output_bfd, initial_got_entry, | |
7520 | sgot->contents + got_offset); | |
7521 | } | |
7522 | ||
7523 | loc = srel->contents + plt_index * RELOC_SIZE (htab); | |
7524 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
7525 | } | |
7526 | ||
eb043451 PB |
7527 | /* Some relocations map to different relocations depending on the |
7528 | target. Return the real relocation. */ | |
8029a119 | 7529 | |
eb043451 PB |
7530 | static int |
7531 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
7532 | int r_type) | |
7533 | { | |
7534 | switch (r_type) | |
7535 | { | |
7536 | case R_ARM_TARGET1: | |
7537 | if (globals->target1_is_rel) | |
7538 | return R_ARM_REL32; | |
7539 | else | |
7540 | return R_ARM_ABS32; | |
7541 | ||
7542 | case R_ARM_TARGET2: | |
7543 | return globals->target2_reloc; | |
7544 | ||
7545 | default: | |
7546 | return r_type; | |
7547 | } | |
7548 | } | |
eb043451 | 7549 | |
ba93b8ac DJ |
7550 | /* Return the base VMA address which should be subtracted from real addresses |
7551 | when resolving @dtpoff relocation. | |
7552 | This is PT_TLS segment p_vaddr. */ | |
7553 | ||
7554 | static bfd_vma | |
7555 | dtpoff_base (struct bfd_link_info *info) | |
7556 | { | |
7557 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
7558 | if (elf_hash_table (info)->tls_sec == NULL) | |
7559 | return 0; | |
7560 | return elf_hash_table (info)->tls_sec->vma; | |
7561 | } | |
7562 | ||
7563 | /* Return the relocation value for @tpoff relocation | |
7564 | if STT_TLS virtual address is ADDRESS. */ | |
7565 | ||
7566 | static bfd_vma | |
7567 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
7568 | { | |
7569 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
7570 | bfd_vma base; | |
7571 | ||
7572 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
7573 | if (htab->tls_sec == NULL) | |
7574 | return 0; | |
7575 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
7576 | return address - htab->tls_sec->vma + base; | |
7577 | } | |
7578 | ||
00a97672 RS |
7579 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
7580 | VALUE is the relocation value. */ | |
7581 | ||
7582 | static bfd_reloc_status_type | |
7583 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
7584 | { | |
7585 | if (value > 0xfff) | |
7586 | return bfd_reloc_overflow; | |
7587 | ||
7588 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
7589 | bfd_put_32 (abfd, value, data); | |
7590 | return bfd_reloc_ok; | |
7591 | } | |
7592 | ||
0855e32b NS |
7593 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
7594 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or | |
7595 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. | |
7596 | ||
7597 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller | |
7598 | is to then call final_link_relocate. Return other values in the | |
62672b10 NS |
7599 | case of error. |
7600 | ||
7601 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing | |
7602 | the pre-relaxed code. It would be nice if the relocs were updated | |
7603 | to match the optimization. */ | |
0855e32b NS |
7604 | |
7605 | static bfd_reloc_status_type | |
7606 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, | |
7607 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, | |
7608 | Elf_Internal_Rela *rel, unsigned long is_local) | |
7609 | { | |
7610 | unsigned long insn; | |
7611 | ||
7612 | switch (ELF32_R_TYPE (rel->r_info)) | |
7613 | { | |
7614 | default: | |
7615 | return bfd_reloc_notsupported; | |
7616 | ||
7617 | case R_ARM_TLS_GOTDESC: | |
7618 | if (is_local) | |
7619 | insn = 0; | |
7620 | else | |
7621 | { | |
7622 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
7623 | if (insn & 1) | |
7624 | insn -= 5; /* THUMB */ | |
7625 | else | |
7626 | insn -= 8; /* ARM */ | |
7627 | } | |
7628 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
7629 | return bfd_reloc_continue; | |
7630 | ||
7631 | case R_ARM_THM_TLS_DESCSEQ: | |
7632 | /* Thumb insn. */ | |
7633 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); | |
7634 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ | |
7635 | { | |
7636 | if (is_local) | |
7637 | /* nop */ | |
7638 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
7639 | } | |
7640 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ | |
7641 | { | |
7642 | if (is_local) | |
7643 | /* nop */ | |
7644 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
7645 | else | |
7646 | /* ldr rx,[ry] */ | |
7647 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); | |
7648 | } | |
7649 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ | |
7650 | { | |
7651 | if (is_local) | |
7652 | /* nop */ | |
7653 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
7654 | else | |
7655 | /* mov r0, rx */ | |
7656 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), | |
7657 | contents + rel->r_offset); | |
7658 | } | |
7659 | else | |
7660 | { | |
7661 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
7662 | /* It's a 32 bit instruction, fetch the rest of it for | |
7663 | error generation. */ | |
7664 | insn = (insn << 16) | |
7665 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); | |
7666 | (*_bfd_error_handler) | |
7667 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"), | |
7668 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
7669 | return bfd_reloc_notsupported; | |
7670 | } | |
7671 | break; | |
7672 | ||
7673 | case R_ARM_TLS_DESCSEQ: | |
7674 | /* arm insn. */ | |
7675 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
7676 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ | |
7677 | { | |
7678 | if (is_local) | |
7679 | /* mov rx, ry */ | |
7680 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), | |
7681 | contents + rel->r_offset); | |
7682 | } | |
7683 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ | |
7684 | { | |
7685 | if (is_local) | |
7686 | /* nop */ | |
7687 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
7688 | else | |
7689 | /* ldr rx,[ry] */ | |
7690 | bfd_put_32 (input_bfd, insn & 0xfffff000, | |
7691 | contents + rel->r_offset); | |
7692 | } | |
7693 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ | |
7694 | { | |
7695 | if (is_local) | |
7696 | /* nop */ | |
7697 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
7698 | else | |
7699 | /* mov r0, rx */ | |
7700 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), | |
7701 | contents + rel->r_offset); | |
7702 | } | |
7703 | else | |
7704 | { | |
7705 | (*_bfd_error_handler) | |
7706 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"), | |
7707 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
7708 | return bfd_reloc_notsupported; | |
7709 | } | |
7710 | break; | |
7711 | ||
7712 | case R_ARM_TLS_CALL: | |
7713 | /* GD->IE relaxation, turn the instruction into 'nop' or | |
7714 | 'ldr r0, [pc,r0]' */ | |
7715 | insn = is_local ? 0xe1a00000 : 0xe79f0000; | |
7716 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
7717 | break; | |
7718 | ||
7719 | case R_ARM_THM_TLS_CALL: | |
7720 | /* GD->IE relaxation */ | |
7721 | if (!is_local) | |
7722 | /* add r0,pc; ldr r0, [r0] */ | |
7723 | insn = 0x44786800; | |
7724 | else if (arch_has_thumb2_nop (globals)) | |
7725 | /* nop.w */ | |
7726 | insn = 0xf3af8000; | |
7727 | else | |
7728 | /* nop; nop */ | |
7729 | insn = 0xbf00bf00; | |
7730 | ||
7731 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); | |
7732 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); | |
7733 | break; | |
7734 | } | |
7735 | return bfd_reloc_ok; | |
7736 | } | |
7737 | ||
4962c51a MS |
7738 | /* For a given value of n, calculate the value of G_n as required to |
7739 | deal with group relocations. We return it in the form of an | |
7740 | encoded constant-and-rotation, together with the final residual. If n is | |
7741 | specified as less than zero, then final_residual is filled with the | |
7742 | input value and no further action is performed. */ | |
7743 | ||
7744 | static bfd_vma | |
7745 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
7746 | { | |
7747 | int current_n; | |
7748 | bfd_vma g_n; | |
7749 | bfd_vma encoded_g_n = 0; | |
7750 | bfd_vma residual = value; /* Also known as Y_n. */ | |
7751 | ||
7752 | for (current_n = 0; current_n <= n; current_n++) | |
7753 | { | |
7754 | int shift; | |
7755 | ||
7756 | /* Calculate which part of the value to mask. */ | |
7757 | if (residual == 0) | |
7758 | shift = 0; | |
7759 | else | |
7760 | { | |
7761 | int msb; | |
7762 | ||
7763 | /* Determine the most significant bit in the residual and | |
7764 | align the resulting value to a 2-bit boundary. */ | |
7765 | for (msb = 30; msb >= 0; msb -= 2) | |
7766 | if (residual & (3 << msb)) | |
7767 | break; | |
7768 | ||
7769 | /* The desired shift is now (msb - 6), or zero, whichever | |
7770 | is the greater. */ | |
7771 | shift = msb - 6; | |
7772 | if (shift < 0) | |
7773 | shift = 0; | |
7774 | } | |
7775 | ||
7776 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
7777 | g_n = residual & (0xff << shift); | |
7778 | encoded_g_n = (g_n >> shift) | |
7779 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); | |
7780 | ||
7781 | /* Calculate the residual for the next time around. */ | |
7782 | residual &= ~g_n; | |
7783 | } | |
7784 | ||
7785 | *final_residual = residual; | |
7786 | ||
7787 | return encoded_g_n; | |
7788 | } | |
7789 | ||
7790 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
7791 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 7792 | |
4962c51a | 7793 | static int |
906e58ca | 7794 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
7795 | { |
7796 | int opcode = insn & 0x1e00000; | |
7797 | ||
7798 | if (opcode == 1 << 23) /* ADD */ | |
7799 | return 1; | |
7800 | ||
7801 | if (opcode == 1 << 22) /* SUB */ | |
7802 | return -1; | |
7803 | ||
7804 | return 0; | |
7805 | } | |
7806 | ||
252b5132 | 7807 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 7808 | |
252b5132 | 7809 | static bfd_reloc_status_type |
57e8b36a NC |
7810 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
7811 | bfd * input_bfd, | |
7812 | bfd * output_bfd, | |
7813 | asection * input_section, | |
7814 | bfd_byte * contents, | |
7815 | Elf_Internal_Rela * rel, | |
7816 | bfd_vma value, | |
7817 | struct bfd_link_info * info, | |
7818 | asection * sym_sec, | |
7819 | const char * sym_name, | |
34e77a92 RS |
7820 | unsigned char st_type, |
7821 | enum arm_st_branch_type branch_type, | |
0945cdfd | 7822 | struct elf_link_hash_entry * h, |
f2a9dd69 | 7823 | bfd_boolean * unresolved_reloc_p, |
8029a119 | 7824 | char ** error_message) |
252b5132 RH |
7825 | { |
7826 | unsigned long r_type = howto->type; | |
7827 | unsigned long r_symndx; | |
7828 | bfd_byte * hit_data = contents + rel->r_offset; | |
252b5132 | 7829 | bfd_vma * local_got_offsets; |
0855e32b | 7830 | bfd_vma * local_tlsdesc_gotents; |
34e77a92 RS |
7831 | asection * sgot; |
7832 | asection * splt; | |
252b5132 | 7833 | asection * sreloc = NULL; |
362d30a1 | 7834 | asection * srelgot; |
252b5132 | 7835 | bfd_vma addend; |
ba96a88f | 7836 | bfd_signed_vma signed_addend; |
34e77a92 RS |
7837 | unsigned char dynreloc_st_type; |
7838 | bfd_vma dynreloc_value; | |
ba96a88f | 7839 | struct elf32_arm_link_hash_table * globals; |
34e77a92 RS |
7840 | struct elf32_arm_link_hash_entry *eh; |
7841 | union gotplt_union *root_plt; | |
7842 | struct arm_plt_info *arm_plt; | |
7843 | bfd_vma plt_offset; | |
7844 | bfd_vma gotplt_offset; | |
7845 | bfd_boolean has_iplt_entry; | |
f21f3fe0 | 7846 | |
9c504268 | 7847 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
7848 | if (globals == NULL) |
7849 | return bfd_reloc_notsupported; | |
9c504268 | 7850 | |
0ffa91dd NC |
7851 | BFD_ASSERT (is_arm_elf (input_bfd)); |
7852 | ||
7853 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 7854 | target. We pick the right one here. */ |
eb043451 | 7855 | r_type = arm_real_reloc_type (globals, r_type); |
0855e32b NS |
7856 | |
7857 | /* It is possible to have linker relaxations on some TLS access | |
7858 | models. Update our information here. */ | |
7859 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
7860 | ||
eb043451 PB |
7861 | if (r_type != howto->type) |
7862 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 7863 | |
cac15327 NC |
7864 | /* If the start address has been set, then set the EF_ARM_HASENTRY |
7865 | flag. Setting this more than once is redundant, but the cost is | |
7866 | not too high, and it keeps the code simple. | |
99e4ae17 | 7867 | |
cac15327 NC |
7868 | The test is done here, rather than somewhere else, because the |
7869 | start address is only set just before the final link commences. | |
7870 | ||
7871 | Note - if the user deliberately sets a start address of 0, the | |
7872 | flag will not be set. */ | |
7873 | if (bfd_get_start_address (output_bfd) != 0) | |
7874 | elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY; | |
99e4ae17 | 7875 | |
34e77a92 | 7876 | eh = (struct elf32_arm_link_hash_entry *) h; |
362d30a1 | 7877 | sgot = globals->root.sgot; |
252b5132 | 7878 | local_got_offsets = elf_local_got_offsets (input_bfd); |
0855e32b NS |
7879 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
7880 | ||
34e77a92 RS |
7881 | if (globals->root.dynamic_sections_created) |
7882 | srelgot = globals->root.srelgot; | |
7883 | else | |
7884 | srelgot = NULL; | |
7885 | ||
252b5132 RH |
7886 | r_symndx = ELF32_R_SYM (rel->r_info); |
7887 | ||
4e7fd91e | 7888 | if (globals->use_rel) |
ba96a88f | 7889 | { |
4e7fd91e PB |
7890 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
7891 | ||
7892 | if (addend & ((howto->src_mask + 1) >> 1)) | |
7893 | { | |
7894 | signed_addend = -1; | |
7895 | signed_addend &= ~ howto->src_mask; | |
7896 | signed_addend |= addend; | |
7897 | } | |
7898 | else | |
7899 | signed_addend = addend; | |
ba96a88f NC |
7900 | } |
7901 | else | |
4e7fd91e | 7902 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 7903 | |
34e77a92 RS |
7904 | /* Record the symbol information that should be used in dynamic |
7905 | relocations. */ | |
7906 | dynreloc_st_type = st_type; | |
7907 | dynreloc_value = value; | |
7908 | if (branch_type == ST_BRANCH_TO_THUMB) | |
7909 | dynreloc_value |= 1; | |
7910 | ||
7911 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and | |
7912 | VALUE appropriately for relocations that we resolve at link time. */ | |
7913 | has_iplt_entry = FALSE; | |
7914 | if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt) | |
7915 | && root_plt->offset != (bfd_vma) -1) | |
7916 | { | |
7917 | plt_offset = root_plt->offset; | |
7918 | gotplt_offset = arm_plt->got_offset; | |
7919 | ||
7920 | if (h == NULL || eh->is_iplt) | |
7921 | { | |
7922 | has_iplt_entry = TRUE; | |
7923 | splt = globals->root.iplt; | |
7924 | ||
7925 | /* Populate .iplt entries here, because not all of them will | |
7926 | be seen by finish_dynamic_symbol. The lower bit is set if | |
7927 | we have already populated the entry. */ | |
7928 | if (plt_offset & 1) | |
7929 | plt_offset--; | |
7930 | else | |
7931 | { | |
7932 | elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, | |
7933 | -1, dynreloc_value); | |
7934 | root_plt->offset |= 1; | |
7935 | } | |
7936 | ||
7937 | /* Static relocations always resolve to the .iplt entry. */ | |
7938 | st_type = STT_FUNC; | |
7939 | value = (splt->output_section->vma | |
7940 | + splt->output_offset | |
7941 | + plt_offset); | |
7942 | branch_type = ST_BRANCH_TO_ARM; | |
7943 | ||
7944 | /* If there are non-call relocations that resolve to the .iplt | |
7945 | entry, then all dynamic ones must too. */ | |
7946 | if (arm_plt->noncall_refcount != 0) | |
7947 | { | |
7948 | dynreloc_st_type = st_type; | |
7949 | dynreloc_value = value; | |
7950 | } | |
7951 | } | |
7952 | else | |
7953 | /* We populate the .plt entry in finish_dynamic_symbol. */ | |
7954 | splt = globals->root.splt; | |
7955 | } | |
7956 | else | |
7957 | { | |
7958 | splt = NULL; | |
7959 | plt_offset = (bfd_vma) -1; | |
7960 | gotplt_offset = (bfd_vma) -1; | |
7961 | } | |
7962 | ||
252b5132 RH |
7963 | switch (r_type) |
7964 | { | |
7965 | case R_ARM_NONE: | |
28a094c2 DJ |
7966 | /* We don't need to find a value for this symbol. It's just a |
7967 | marker. */ | |
7968 | *unresolved_reloc_p = FALSE; | |
252b5132 RH |
7969 | return bfd_reloc_ok; |
7970 | ||
00a97672 RS |
7971 | case R_ARM_ABS12: |
7972 | if (!globals->vxworks_p) | |
7973 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
7974 | ||
252b5132 RH |
7975 | case R_ARM_PC24: |
7976 | case R_ARM_ABS32: | |
bb224fc3 | 7977 | case R_ARM_ABS32_NOI: |
252b5132 | 7978 | case R_ARM_REL32: |
bb224fc3 | 7979 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
7980 | case R_ARM_CALL: |
7981 | case R_ARM_JUMP24: | |
dfc5f959 | 7982 | case R_ARM_XPC25: |
eb043451 | 7983 | case R_ARM_PREL31: |
7359ea65 | 7984 | case R_ARM_PLT32: |
7359ea65 DJ |
7985 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
7986 | will use the symbol's value, which may point to a PLT entry, but we | |
7987 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
7988 | branches in this object should go to it, except if the PLT is too |
7989 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 7990 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
5fa9e92f | 7991 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
7992 | && r_type != R_ARM_CALL |
7993 | && r_type != R_ARM_JUMP24 | |
7994 | && r_type != R_ARM_PLT32) | |
34e77a92 | 7995 | && plt_offset != (bfd_vma) -1) |
7359ea65 | 7996 | { |
34e77a92 RS |
7997 | /* If we've created a .plt section, and assigned a PLT entry |
7998 | to this function, it must either be a STT_GNU_IFUNC reference | |
7999 | or not be known to bind locally. In other cases, we should | |
8000 | have cleared the PLT entry by now. */ | |
8001 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); | |
7359ea65 DJ |
8002 | |
8003 | value = (splt->output_section->vma | |
8004 | + splt->output_offset | |
34e77a92 | 8005 | + plt_offset); |
0945cdfd | 8006 | *unresolved_reloc_p = FALSE; |
7359ea65 DJ |
8007 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
8008 | contents, rel->r_offset, value, | |
00a97672 | 8009 | rel->r_addend); |
7359ea65 DJ |
8010 | } |
8011 | ||
67687978 PB |
8012 | /* When generating a shared object or relocatable executable, these |
8013 | relocations are copied into the output file to be resolved at | |
8014 | run time. */ | |
8015 | if ((info->shared || globals->root.is_relocatable_executable) | |
7359ea65 | 8016 | && (input_section->flags & SEC_ALLOC) |
4dfe6ac6 | 8017 | && !(globals->vxworks_p |
3348747a NS |
8018 | && strcmp (input_section->output_section->name, |
8019 | ".tls_vars") == 0) | |
bb224fc3 | 8020 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 8021 | || !SYMBOL_CALLS_LOCAL (info, h)) |
fe33d2fa | 8022 | && (!strstr (input_section->name, STUB_SUFFIX)) |
7359ea65 DJ |
8023 | && (h == NULL |
8024 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
8025 | || h->root.type != bfd_link_hash_undefweak) | |
8026 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
8027 | && r_type != R_ARM_CALL |
8028 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 8029 | && r_type != R_ARM_PREL31 |
7359ea65 | 8030 | && r_type != R_ARM_PLT32) |
252b5132 | 8031 | { |
947216bf | 8032 | Elf_Internal_Rela outrel; |
b34976b6 | 8033 | bfd_boolean skip, relocate; |
f21f3fe0 | 8034 | |
0945cdfd DJ |
8035 | *unresolved_reloc_p = FALSE; |
8036 | ||
34e77a92 | 8037 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
252b5132 | 8038 | { |
83bac4b0 NC |
8039 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
8040 | ! globals->use_rel); | |
f21f3fe0 | 8041 | |
83bac4b0 | 8042 | if (sreloc == NULL) |
252b5132 | 8043 | return bfd_reloc_notsupported; |
252b5132 | 8044 | } |
f21f3fe0 | 8045 | |
b34976b6 AM |
8046 | skip = FALSE; |
8047 | relocate = FALSE; | |
f21f3fe0 | 8048 | |
00a97672 | 8049 | outrel.r_addend = addend; |
c629eae0 JJ |
8050 | outrel.r_offset = |
8051 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
8052 | rel->r_offset); | |
8053 | if (outrel.r_offset == (bfd_vma) -1) | |
b34976b6 | 8054 | skip = TRUE; |
0bb2d96a | 8055 | else if (outrel.r_offset == (bfd_vma) -2) |
b34976b6 | 8056 | skip = TRUE, relocate = TRUE; |
252b5132 RH |
8057 | outrel.r_offset += (input_section->output_section->vma |
8058 | + input_section->output_offset); | |
f21f3fe0 | 8059 | |
252b5132 | 8060 | if (skip) |
0bb2d96a | 8061 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
8062 | else if (h != NULL |
8063 | && h->dynindx != -1 | |
7359ea65 | 8064 | && (!info->shared |
5e681ec4 | 8065 | || !info->symbolic |
f5385ebf | 8066 | || !h->def_regular)) |
5e681ec4 | 8067 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
8068 | else |
8069 | { | |
a16385dc MM |
8070 | int symbol; |
8071 | ||
5e681ec4 | 8072 | /* This symbol is local, or marked to become local. */ |
34e77a92 | 8073 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI); |
a16385dc | 8074 | if (globals->symbian_p) |
6366ff1e | 8075 | { |
74541ad4 AM |
8076 | asection *osec; |
8077 | ||
6366ff1e MM |
8078 | /* On Symbian OS, the data segment and text segement |
8079 | can be relocated independently. Therefore, we | |
8080 | must indicate the segment to which this | |
8081 | relocation is relative. The BPABI allows us to | |
8082 | use any symbol in the right segment; we just use | |
8083 | the section symbol as it is convenient. (We | |
8084 | cannot use the symbol given by "h" directly as it | |
74541ad4 AM |
8085 | will not appear in the dynamic symbol table.) |
8086 | ||
8087 | Note that the dynamic linker ignores the section | |
8088 | symbol value, so we don't subtract osec->vma | |
8089 | from the emitted reloc addend. */ | |
10dbd1f3 | 8090 | if (sym_sec) |
74541ad4 | 8091 | osec = sym_sec->output_section; |
10dbd1f3 | 8092 | else |
74541ad4 AM |
8093 | osec = input_section->output_section; |
8094 | symbol = elf_section_data (osec)->dynindx; | |
8095 | if (symbol == 0) | |
8096 | { | |
8097 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
8098 | ||
8099 | if ((osec->flags & SEC_READONLY) == 0 | |
8100 | && htab->data_index_section != NULL) | |
8101 | osec = htab->data_index_section; | |
8102 | else | |
8103 | osec = htab->text_index_section; | |
8104 | symbol = elf_section_data (osec)->dynindx; | |
8105 | } | |
6366ff1e MM |
8106 | BFD_ASSERT (symbol != 0); |
8107 | } | |
a16385dc MM |
8108 | else |
8109 | /* On SVR4-ish systems, the dynamic loader cannot | |
8110 | relocate the text and data segments independently, | |
8111 | so the symbol does not matter. */ | |
8112 | symbol = 0; | |
34e77a92 RS |
8113 | if (dynreloc_st_type == STT_GNU_IFUNC) |
8114 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve | |
8115 | to the .iplt entry. Instead, every non-call reference | |
8116 | must use an R_ARM_IRELATIVE relocation to obtain the | |
8117 | correct run-time address. */ | |
8118 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); | |
8119 | else | |
8120 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 RS |
8121 | if (globals->use_rel) |
8122 | relocate = TRUE; | |
8123 | else | |
34e77a92 | 8124 | outrel.r_addend += dynreloc_value; |
252b5132 | 8125 | } |
f21f3fe0 | 8126 | |
47beaa6a | 8127 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); |
9a5aca8c | 8128 | |
f21f3fe0 | 8129 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 8130 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 8131 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
8132 | if (! relocate) |
8133 | return bfd_reloc_ok; | |
9a5aca8c | 8134 | |
f21f3fe0 | 8135 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
34e77a92 RS |
8136 | contents, rel->r_offset, |
8137 | dynreloc_value, (bfd_vma) 0); | |
252b5132 RH |
8138 | } |
8139 | else switch (r_type) | |
8140 | { | |
00a97672 RS |
8141 | case R_ARM_ABS12: |
8142 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
8143 | ||
dfc5f959 | 8144 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
8145 | case R_ARM_CALL: |
8146 | case R_ARM_JUMP24: | |
8029a119 | 8147 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 8148 | case R_ARM_PLT32: |
906e58ca | 8149 | { |
906e58ca NC |
8150 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
8151 | ||
dfc5f959 | 8152 | if (r_type == R_ARM_XPC25) |
252b5132 | 8153 | { |
dfc5f959 NC |
8154 | /* Check for Arm calling Arm function. */ |
8155 | /* FIXME: Should we translate the instruction into a BL | |
8156 | instruction instead ? */ | |
35fc36a8 | 8157 | if (branch_type != ST_BRANCH_TO_THUMB) |
d003868e AM |
8158 | (*_bfd_error_handler) |
8159 | (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."), | |
8160 | input_bfd, | |
8161 | h ? h->root.root.string : "(local)"); | |
dfc5f959 | 8162 | } |
155d87d7 | 8163 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
8164 | { |
8165 | /* Check for Arm calling Thumb function. */ | |
35fc36a8 | 8166 | if (branch_type == ST_BRANCH_TO_THUMB) |
dfc5f959 | 8167 | { |
f2a9dd69 DJ |
8168 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
8169 | output_bfd, input_section, | |
8170 | hit_data, sym_sec, rel->r_offset, | |
8171 | signed_addend, value, | |
8172 | error_message)) | |
8173 | return bfd_reloc_ok; | |
8174 | else | |
8175 | return bfd_reloc_dangerous; | |
dfc5f959 | 8176 | } |
252b5132 | 8177 | } |
ba96a88f | 8178 | |
906e58ca | 8179 | /* Check if a stub has to be inserted because the |
8029a119 | 8180 | destination is too far or we are changing mode. */ |
155d87d7 CL |
8181 | if ( r_type == R_ARM_CALL |
8182 | || r_type == R_ARM_JUMP24 | |
8183 | || r_type == R_ARM_PLT32) | |
906e58ca | 8184 | { |
fe33d2fa CL |
8185 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
8186 | struct elf32_arm_link_hash_entry *hash; | |
8187 | ||
8188 | hash = (struct elf32_arm_link_hash_entry *) h; | |
8189 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
8190 | st_type, &branch_type, |
8191 | hash, value, sym_sec, | |
fe33d2fa | 8192 | input_bfd, sym_name); |
5fa9e92f | 8193 | |
fe33d2fa | 8194 | if (stub_type != arm_stub_none) |
906e58ca NC |
8195 | { |
8196 | /* The target is out of reach, so redirect the | |
8197 | branch to the local stub for this function. */ | |
8198 | ||
8199 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
8200 | sym_sec, h, | |
fe33d2fa CL |
8201 | rel, globals, |
8202 | stub_type); | |
906e58ca NC |
8203 | if (stub_entry != NULL) |
8204 | value = (stub_entry->stub_offset | |
8205 | + stub_entry->stub_sec->output_offset | |
8206 | + stub_entry->stub_sec->output_section->vma); | |
8207 | } | |
fe33d2fa CL |
8208 | else |
8209 | { | |
8210 | /* If the call goes through a PLT entry, make sure to | |
8211 | check distance to the right destination address. */ | |
34e77a92 | 8212 | if (plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
8213 | { |
8214 | value = (splt->output_section->vma | |
8215 | + splt->output_offset | |
34e77a92 | 8216 | + plt_offset); |
fe33d2fa CL |
8217 | *unresolved_reloc_p = FALSE; |
8218 | /* The PLT entry is in ARM mode, regardless of the | |
8219 | target function. */ | |
35fc36a8 | 8220 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
8221 | } |
8222 | } | |
906e58ca NC |
8223 | } |
8224 | ||
dea514f5 PB |
8225 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
8226 | where: | |
8227 | S is the address of the symbol in the relocation. | |
8228 | P is address of the instruction being relocated. | |
8229 | A is the addend (extracted from the instruction) in bytes. | |
8230 | ||
8231 | S is held in 'value'. | |
8232 | P is the base address of the section containing the | |
8233 | instruction plus the offset of the reloc into that | |
8234 | section, ie: | |
8235 | (input_section->output_section->vma + | |
8236 | input_section->output_offset + | |
8237 | rel->r_offset). | |
8238 | A is the addend, converted into bytes, ie: | |
8239 | (signed_addend * 4) | |
8240 | ||
8241 | Note: None of these operations have knowledge of the pipeline | |
8242 | size of the processor, thus it is up to the assembler to | |
8243 | encode this information into the addend. */ | |
8244 | value -= (input_section->output_section->vma | |
8245 | + input_section->output_offset); | |
8246 | value -= rel->r_offset; | |
4e7fd91e PB |
8247 | if (globals->use_rel) |
8248 | value += (signed_addend << howto->size); | |
8249 | else | |
8250 | /* RELA addends do not have to be adjusted by howto->size. */ | |
8251 | value += signed_addend; | |
23080146 | 8252 | |
dcb5e6e6 NC |
8253 | signed_addend = value; |
8254 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 8255 | |
5ab79981 | 8256 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 8257 | the next instruction unless a PLT entry will be created. |
77b4f08f | 8258 | Do the same for local undefined symbols (but not for STN_UNDEF). |
cd1dac3d DG |
8259 | The jump to the next instruction is optimized as a NOP depending |
8260 | on the architecture. */ | |
ffcb4889 | 8261 | if (h ? (h->root.type == bfd_link_hash_undefweak |
34e77a92 | 8262 | && plt_offset == (bfd_vma) -1) |
77b4f08f | 8263 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
5ab79981 | 8264 | { |
cd1dac3d DG |
8265 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
8266 | ||
8267 | if (arch_has_arm_nop (globals)) | |
8268 | value |= 0x0320f000; | |
8269 | else | |
8270 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
8271 | } |
8272 | else | |
59f2c4e7 | 8273 | { |
9b485d32 | 8274 | /* Perform a signed range check. */ |
dcb5e6e6 | 8275 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
8276 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
8277 | return bfd_reloc_overflow; | |
9a5aca8c | 8278 | |
5ab79981 | 8279 | addend = (value & 2); |
39b41c9c | 8280 | |
5ab79981 PB |
8281 | value = (signed_addend & howto->dst_mask) |
8282 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 8283 | |
5ab79981 PB |
8284 | if (r_type == R_ARM_CALL) |
8285 | { | |
155d87d7 | 8286 | /* Set the H bit in the BLX instruction. */ |
35fc36a8 | 8287 | if (branch_type == ST_BRANCH_TO_THUMB) |
155d87d7 CL |
8288 | { |
8289 | if (addend) | |
8290 | value |= (1 << 24); | |
8291 | else | |
8292 | value &= ~(bfd_vma)(1 << 24); | |
8293 | } | |
8294 | ||
5ab79981 | 8295 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 8296 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 8297 | case, mode switching is performed by the stub. */ |
35fc36a8 | 8298 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
5ab79981 PB |
8299 | value |= (1 << 28); |
8300 | else | |
8301 | { | |
8302 | value &= ~(bfd_vma)(1 << 28); | |
8303 | value |= (1 << 24); | |
8304 | } | |
39b41c9c PB |
8305 | } |
8306 | } | |
906e58ca | 8307 | } |
252b5132 | 8308 | break; |
f21f3fe0 | 8309 | |
252b5132 RH |
8310 | case R_ARM_ABS32: |
8311 | value += addend; | |
35fc36a8 | 8312 | if (branch_type == ST_BRANCH_TO_THUMB) |
252b5132 RH |
8313 | value |= 1; |
8314 | break; | |
f21f3fe0 | 8315 | |
bb224fc3 MS |
8316 | case R_ARM_ABS32_NOI: |
8317 | value += addend; | |
8318 | break; | |
8319 | ||
252b5132 | 8320 | case R_ARM_REL32: |
a8bc6c78 | 8321 | value += addend; |
35fc36a8 | 8322 | if (branch_type == ST_BRANCH_TO_THUMB) |
a8bc6c78 | 8323 | value |= 1; |
252b5132 | 8324 | value -= (input_section->output_section->vma |
62efb346 | 8325 | + input_section->output_offset + rel->r_offset); |
252b5132 | 8326 | break; |
eb043451 | 8327 | |
bb224fc3 MS |
8328 | case R_ARM_REL32_NOI: |
8329 | value += addend; | |
8330 | value -= (input_section->output_section->vma | |
8331 | + input_section->output_offset + rel->r_offset); | |
8332 | break; | |
8333 | ||
eb043451 PB |
8334 | case R_ARM_PREL31: |
8335 | value -= (input_section->output_section->vma | |
8336 | + input_section->output_offset + rel->r_offset); | |
8337 | value += signed_addend; | |
8338 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
8339 | { | |
8029a119 | 8340 | /* Check for overflow. */ |
eb043451 PB |
8341 | if ((value ^ (value >> 1)) & (1 << 30)) |
8342 | return bfd_reloc_overflow; | |
8343 | } | |
8344 | value &= 0x7fffffff; | |
8345 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
35fc36a8 | 8346 | if (branch_type == ST_BRANCH_TO_THUMB) |
eb043451 PB |
8347 | value |= 1; |
8348 | break; | |
252b5132 | 8349 | } |
f21f3fe0 | 8350 | |
252b5132 RH |
8351 | bfd_put_32 (input_bfd, value, hit_data); |
8352 | return bfd_reloc_ok; | |
8353 | ||
8354 | case R_ARM_ABS8: | |
8355 | value += addend; | |
4e67d4ca DG |
8356 | |
8357 | /* There is no way to tell whether the user intended to use a signed or | |
8358 | unsigned addend. When checking for overflow we accept either, | |
8359 | as specified by the AAELF. */ | |
8360 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
8361 | return bfd_reloc_overflow; |
8362 | ||
8363 | bfd_put_8 (input_bfd, value, hit_data); | |
8364 | return bfd_reloc_ok; | |
8365 | ||
8366 | case R_ARM_ABS16: | |
8367 | value += addend; | |
8368 | ||
4e67d4ca DG |
8369 | /* See comment for R_ARM_ABS8. */ |
8370 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
8371 | return bfd_reloc_overflow; |
8372 | ||
8373 | bfd_put_16 (input_bfd, value, hit_data); | |
8374 | return bfd_reloc_ok; | |
8375 | ||
252b5132 | 8376 | case R_ARM_THM_ABS5: |
9b485d32 | 8377 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
8378 | if (globals->use_rel) |
8379 | { | |
8380 | /* Need to refetch addend. */ | |
8381 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
8382 | /* ??? Need to determine shift amount from operand size. */ | |
8383 | addend >>= howto->rightshift; | |
8384 | } | |
252b5132 RH |
8385 | value += addend; |
8386 | ||
8387 | /* ??? Isn't value unsigned? */ | |
8388 | if ((long) value > 0x1f || (long) value < -0x10) | |
8389 | return bfd_reloc_overflow; | |
8390 | ||
8391 | /* ??? Value needs to be properly shifted into place first. */ | |
8392 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
8393 | bfd_put_16 (input_bfd, value, hit_data); | |
8394 | return bfd_reloc_ok; | |
8395 | ||
2cab6cc3 MS |
8396 | case R_ARM_THM_ALU_PREL_11_0: |
8397 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
8398 | { | |
8399 | bfd_vma insn; | |
8400 | bfd_signed_vma relocation; | |
8401 | ||
8402 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
8403 | | bfd_get_16 (input_bfd, hit_data + 2); | |
8404 | ||
8405 | if (globals->use_rel) | |
8406 | { | |
8407 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
8408 | | ((insn & (1 << 26)) >> 15); | |
8409 | if (insn & 0xf00000) | |
8410 | signed_addend = -signed_addend; | |
8411 | } | |
8412 | ||
8413 | relocation = value + signed_addend; | |
8414 | relocation -= (input_section->output_section->vma | |
8415 | + input_section->output_offset | |
8416 | + rel->r_offset); | |
8417 | ||
8418 | value = abs (relocation); | |
8419 | ||
8420 | if (value >= 0x1000) | |
8421 | return bfd_reloc_overflow; | |
8422 | ||
8423 | insn = (insn & 0xfb0f8f00) | (value & 0xff) | |
8424 | | ((value & 0x700) << 4) | |
8425 | | ((value & 0x800) << 15); | |
8426 | if (relocation < 0) | |
8427 | insn |= 0xa00000; | |
8428 | ||
8429 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
8430 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
8431 | ||
8432 | return bfd_reloc_ok; | |
8433 | } | |
8434 | ||
e1ec24c6 NC |
8435 | case R_ARM_THM_PC8: |
8436 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
8437 | but it is supported for compatibility with third party libraries | |
8438 | generated by other compilers, specifically the ARM/IAR. */ | |
8439 | { | |
8440 | bfd_vma insn; | |
8441 | bfd_signed_vma relocation; | |
8442 | ||
8443 | insn = bfd_get_16 (input_bfd, hit_data); | |
8444 | ||
8445 | if (globals->use_rel) | |
8446 | addend = (insn & 0x00ff) << 2; | |
8447 | ||
8448 | relocation = value + addend; | |
8449 | relocation -= (input_section->output_section->vma | |
8450 | + input_section->output_offset | |
8451 | + rel->r_offset); | |
8452 | ||
8453 | value = abs (relocation); | |
8454 | ||
8455 | /* We do not check for overflow of this reloc. Although strictly | |
8456 | speaking this is incorrect, it appears to be necessary in order | |
8457 | to work with IAR generated relocs. Since GCC and GAS do not | |
8458 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
8459 | a problem for them. */ | |
8460 | value &= 0x3fc; | |
8461 | ||
8462 | insn = (insn & 0xff00) | (value >> 2); | |
8463 | ||
8464 | bfd_put_16 (input_bfd, insn, hit_data); | |
8465 | ||
8466 | return bfd_reloc_ok; | |
8467 | } | |
8468 | ||
2cab6cc3 MS |
8469 | case R_ARM_THM_PC12: |
8470 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
8471 | { | |
8472 | bfd_vma insn; | |
8473 | bfd_signed_vma relocation; | |
8474 | ||
8475 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
8476 | | bfd_get_16 (input_bfd, hit_data + 2); | |
8477 | ||
8478 | if (globals->use_rel) | |
8479 | { | |
8480 | signed_addend = insn & 0xfff; | |
8481 | if (!(insn & (1 << 23))) | |
8482 | signed_addend = -signed_addend; | |
8483 | } | |
8484 | ||
8485 | relocation = value + signed_addend; | |
8486 | relocation -= (input_section->output_section->vma | |
8487 | + input_section->output_offset | |
8488 | + rel->r_offset); | |
8489 | ||
8490 | value = abs (relocation); | |
8491 | ||
8492 | if (value >= 0x1000) | |
8493 | return bfd_reloc_overflow; | |
8494 | ||
8495 | insn = (insn & 0xff7ff000) | value; | |
8496 | if (relocation >= 0) | |
8497 | insn |= (1 << 23); | |
8498 | ||
8499 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
8500 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
8501 | ||
8502 | return bfd_reloc_ok; | |
8503 | } | |
8504 | ||
dfc5f959 | 8505 | case R_ARM_THM_XPC22: |
c19d1205 | 8506 | case R_ARM_THM_CALL: |
bd97cb95 | 8507 | case R_ARM_THM_JUMP24: |
dfc5f959 | 8508 | /* Thumb BL (branch long instruction). */ |
252b5132 | 8509 | { |
b34976b6 | 8510 | bfd_vma relocation; |
e95de063 | 8511 | bfd_vma reloc_sign; |
b34976b6 AM |
8512 | bfd_boolean overflow = FALSE; |
8513 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
8514 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
8515 | bfd_signed_vma reloc_signed_max; |
8516 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 8517 | bfd_vma check; |
252b5132 | 8518 | bfd_signed_vma signed_check; |
e95de063 | 8519 | int bitsize; |
cd1dac3d | 8520 | const int thumb2 = using_thumb2 (globals); |
252b5132 | 8521 | |
5ab79981 | 8522 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
8523 | the next instruction unless a PLT entry will be created. |
8524 | The jump to the next instruction is optimized as a NOP.W for | |
8525 | Thumb-2 enabled architectures. */ | |
19540007 | 8526 | if (h && h->root.type == bfd_link_hash_undefweak |
34e77a92 | 8527 | && plt_offset == (bfd_vma) -1) |
5ab79981 | 8528 | { |
cd1dac3d DG |
8529 | if (arch_has_thumb2_nop (globals)) |
8530 | { | |
8531 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
8532 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
8533 | } | |
8534 | else | |
8535 | { | |
8536 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
8537 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
8538 | } | |
5ab79981 PB |
8539 | return bfd_reloc_ok; |
8540 | } | |
8541 | ||
e95de063 MS |
8542 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
8543 | with Thumb-1) involving the J1 and J2 bits. */ | |
4e7fd91e PB |
8544 | if (globals->use_rel) |
8545 | { | |
e95de063 MS |
8546 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
8547 | bfd_vma upper = upper_insn & 0x3ff; | |
8548 | bfd_vma lower = lower_insn & 0x7ff; | |
8549 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; | |
8550 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
8551 | bfd_vma i1 = j1 ^ s ? 0 : 1; | |
8552 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
8553 | ||
8554 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); | |
8555 | /* Sign extend. */ | |
8556 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
8557 | ||
4e7fd91e PB |
8558 | signed_addend = addend; |
8559 | } | |
cb1afa5c | 8560 | |
dfc5f959 NC |
8561 | if (r_type == R_ARM_THM_XPC22) |
8562 | { | |
8563 | /* Check for Thumb to Thumb call. */ | |
8564 | /* FIXME: Should we translate the instruction into a BL | |
8565 | instruction instead ? */ | |
35fc36a8 | 8566 | if (branch_type == ST_BRANCH_TO_THUMB) |
d003868e AM |
8567 | (*_bfd_error_handler) |
8568 | (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."), | |
8569 | input_bfd, | |
8570 | h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
8571 | } |
8572 | else | |
252b5132 | 8573 | { |
dfc5f959 NC |
8574 | /* If it is not a call to Thumb, assume call to Arm. |
8575 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
8576 | function call at all, but rather a long jump. Calls through |
8577 | the PLT do not require stubs. */ | |
34e77a92 | 8578 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
dfc5f959 | 8579 | { |
bd97cb95 | 8580 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
8581 | { |
8582 | /* Convert BL to BLX. */ | |
8583 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
8584 | } | |
155d87d7 CL |
8585 | else if (( r_type != R_ARM_THM_CALL) |
8586 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
8587 | { |
8588 | if (elf32_thumb_to_arm_stub | |
8589 | (info, sym_name, input_bfd, output_bfd, input_section, | |
8590 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
8591 | error_message)) | |
8592 | return bfd_reloc_ok; | |
8593 | else | |
8594 | return bfd_reloc_dangerous; | |
8595 | } | |
da5938a2 | 8596 | } |
35fc36a8 RS |
8597 | else if (branch_type == ST_BRANCH_TO_THUMB |
8598 | && globals->use_blx | |
bd97cb95 | 8599 | && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
8600 | { |
8601 | /* Make sure this is a BL. */ | |
8602 | lower_insn |= 0x1800; | |
8603 | } | |
252b5132 | 8604 | } |
f21f3fe0 | 8605 | |
fe33d2fa | 8606 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
155d87d7 | 8607 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
8608 | { |
8609 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 8610 | is too far. */ |
fe33d2fa CL |
8611 | struct elf32_arm_stub_hash_entry *stub_entry; |
8612 | struct elf32_arm_link_hash_entry *hash; | |
8613 | ||
8614 | hash = (struct elf32_arm_link_hash_entry *) h; | |
8615 | ||
8616 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
8617 | st_type, &branch_type, |
8618 | hash, value, sym_sec, | |
fe33d2fa CL |
8619 | input_bfd, sym_name); |
8620 | ||
8621 | if (stub_type != arm_stub_none) | |
906e58ca NC |
8622 | { |
8623 | /* The target is out of reach or we are changing modes, so | |
8624 | redirect the branch to the local stub for this | |
8625 | function. */ | |
8626 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
8627 | sym_sec, h, | |
fe33d2fa CL |
8628 | rel, globals, |
8629 | stub_type); | |
906e58ca NC |
8630 | if (stub_entry != NULL) |
8631 | value = (stub_entry->stub_offset | |
8632 | + stub_entry->stub_sec->output_offset | |
8633 | + stub_entry->stub_sec->output_section->vma); | |
8634 | ||
f4ac8484 | 8635 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 8636 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
8637 | { |
8638 | if ((stub_entry | |
8639 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
35fc36a8 | 8640 | || branch_type != ST_BRANCH_TO_THUMB) |
f4ac8484 DJ |
8641 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
8642 | } | |
906e58ca NC |
8643 | } |
8644 | } | |
8645 | ||
fe33d2fa | 8646 | /* Handle calls via the PLT. */ |
34e77a92 | 8647 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
8648 | { |
8649 | value = (splt->output_section->vma | |
8650 | + splt->output_offset | |
34e77a92 | 8651 | + plt_offset); |
fe33d2fa CL |
8652 | |
8653 | if (globals->use_blx && r_type == R_ARM_THM_CALL) | |
8654 | { | |
8655 | /* If the Thumb BLX instruction is available, convert | |
8656 | the BL to a BLX instruction to call the ARM-mode | |
8657 | PLT entry. */ | |
8658 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
35fc36a8 | 8659 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
8660 | } |
8661 | else | |
8662 | { | |
8663 | /* Target the Thumb stub before the ARM PLT entry. */ | |
8664 | value -= PLT_THUMB_STUB_SIZE; | |
35fc36a8 | 8665 | branch_type = ST_BRANCH_TO_THUMB; |
fe33d2fa CL |
8666 | } |
8667 | *unresolved_reloc_p = FALSE; | |
8668 | } | |
8669 | ||
ba96a88f | 8670 | relocation = value + signed_addend; |
f21f3fe0 | 8671 | |
252b5132 | 8672 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
8673 | + input_section->output_offset |
8674 | + rel->r_offset); | |
9a5aca8c | 8675 | |
252b5132 RH |
8676 | check = relocation >> howto->rightshift; |
8677 | ||
8678 | /* If this is a signed value, the rightshift just dropped | |
8679 | leading 1 bits (assuming twos complement). */ | |
8680 | if ((bfd_signed_vma) relocation >= 0) | |
8681 | signed_check = check; | |
8682 | else | |
8683 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
8684 | ||
e95de063 MS |
8685 | /* Calculate the permissable maximum and minimum values for |
8686 | this relocation according to whether we're relocating for | |
8687 | Thumb-2 or not. */ | |
8688 | bitsize = howto->bitsize; | |
8689 | if (!thumb2) | |
8690 | bitsize -= 2; | |
f6ebfac0 | 8691 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
8692 | reloc_signed_min = ~reloc_signed_max; |
8693 | ||
252b5132 | 8694 | /* Assumes two's complement. */ |
ba96a88f | 8695 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
b34976b6 | 8696 | overflow = TRUE; |
252b5132 | 8697 | |
bd97cb95 | 8698 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
8699 | /* For a BLX instruction, make sure that the relocation is rounded up |
8700 | to a word boundary. This follows the semantics of the instruction | |
8701 | which specifies that bit 1 of the target address will come from bit | |
8702 | 1 of the base address. */ | |
8703 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 8704 | |
e95de063 MS |
8705 | /* Put RELOCATION back into the insn. Assumes two's complement. |
8706 | We use the Thumb-2 encoding, which is safe even if dealing with | |
8707 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
8708 | reloc_sign = (signed_check < 0) ? 1 : 0; | |
8709 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) | |
8710 | | ((relocation >> 12) & 0x3ff) | |
8711 | | (reloc_sign << 10); | |
906e58ca | 8712 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
e95de063 MS |
8713 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
8714 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
8715 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 8716 | |
252b5132 RH |
8717 | /* Put the relocated value back in the object file: */ |
8718 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
8719 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
8720 | ||
8721 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
8722 | } | |
8723 | break; | |
8724 | ||
c19d1205 ZW |
8725 | case R_ARM_THM_JUMP19: |
8726 | /* Thumb32 conditional branch instruction. */ | |
8727 | { | |
8728 | bfd_vma relocation; | |
8729 | bfd_boolean overflow = FALSE; | |
8730 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
8731 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
8732 | bfd_signed_vma reloc_signed_max = 0xffffe; |
8733 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 ZW |
8734 | bfd_signed_vma signed_check; |
8735 | ||
8736 | /* Need to refetch the addend, reconstruct the top three bits, | |
8737 | and squish the two 11 bit pieces together. */ | |
8738 | if (globals->use_rel) | |
8739 | { | |
8740 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 8741 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
8742 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
8743 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
8744 | bfd_vma lower = (lower_insn & 0x07ff); | |
8745 | ||
a00a1f35 MS |
8746 | upper |= J1 << 6; |
8747 | upper |= J2 << 7; | |
8748 | upper |= (!S) << 8; | |
c19d1205 ZW |
8749 | upper -= 0x0100; /* Sign extend. */ |
8750 | ||
8751 | addend = (upper << 12) | (lower << 1); | |
8752 | signed_addend = addend; | |
8753 | } | |
8754 | ||
bd97cb95 | 8755 | /* Handle calls via the PLT. */ |
34e77a92 | 8756 | if (plt_offset != (bfd_vma) -1) |
bd97cb95 DJ |
8757 | { |
8758 | value = (splt->output_section->vma | |
8759 | + splt->output_offset | |
34e77a92 | 8760 | + plt_offset); |
bd97cb95 DJ |
8761 | /* Target the Thumb stub before the ARM PLT entry. */ |
8762 | value -= PLT_THUMB_STUB_SIZE; | |
8763 | *unresolved_reloc_p = FALSE; | |
8764 | } | |
8765 | ||
c19d1205 ZW |
8766 | /* ??? Should handle interworking? GCC might someday try to |
8767 | use this for tail calls. */ | |
8768 | ||
8769 | relocation = value + signed_addend; | |
8770 | relocation -= (input_section->output_section->vma | |
8771 | + input_section->output_offset | |
8772 | + rel->r_offset); | |
a00a1f35 | 8773 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 8774 | |
c19d1205 ZW |
8775 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
8776 | overflow = TRUE; | |
8777 | ||
8778 | /* Put RELOCATION back into the insn. */ | |
8779 | { | |
8780 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
8781 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
8782 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
8783 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
8784 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
8785 | ||
a00a1f35 | 8786 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
8787 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
8788 | } | |
8789 | ||
8790 | /* Put the relocated value back in the object file: */ | |
8791 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
8792 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
8793 | ||
8794 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
8795 | } | |
8796 | ||
8797 | case R_ARM_THM_JUMP11: | |
8798 | case R_ARM_THM_JUMP8: | |
8799 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
8800 | /* Thumb B (branch) instruction). */ |
8801 | { | |
6cf9e9fe | 8802 | bfd_signed_vma relocation; |
51c5503b NC |
8803 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
8804 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
8805 | bfd_signed_vma signed_check; |
8806 | ||
c19d1205 ZW |
8807 | /* CZB cannot jump backward. */ |
8808 | if (r_type == R_ARM_THM_JUMP6) | |
8809 | reloc_signed_min = 0; | |
8810 | ||
4e7fd91e | 8811 | if (globals->use_rel) |
6cf9e9fe | 8812 | { |
4e7fd91e PB |
8813 | /* Need to refetch addend. */ |
8814 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
8815 | if (addend & ((howto->src_mask + 1) >> 1)) | |
8816 | { | |
8817 | signed_addend = -1; | |
8818 | signed_addend &= ~ howto->src_mask; | |
8819 | signed_addend |= addend; | |
8820 | } | |
8821 | else | |
8822 | signed_addend = addend; | |
8823 | /* The value in the insn has been right shifted. We need to | |
8824 | undo this, so that we can perform the address calculation | |
8825 | in terms of bytes. */ | |
8826 | signed_addend <<= howto->rightshift; | |
6cf9e9fe | 8827 | } |
6cf9e9fe | 8828 | relocation = value + signed_addend; |
51c5503b NC |
8829 | |
8830 | relocation -= (input_section->output_section->vma | |
8831 | + input_section->output_offset | |
8832 | + rel->r_offset); | |
8833 | ||
6cf9e9fe NC |
8834 | relocation >>= howto->rightshift; |
8835 | signed_check = relocation; | |
c19d1205 ZW |
8836 | |
8837 | if (r_type == R_ARM_THM_JUMP6) | |
8838 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
8839 | else | |
8840 | relocation &= howto->dst_mask; | |
51c5503b | 8841 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 8842 | |
51c5503b NC |
8843 | bfd_put_16 (input_bfd, relocation, hit_data); |
8844 | ||
8845 | /* Assumes two's complement. */ | |
8846 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
8847 | return bfd_reloc_overflow; | |
8848 | ||
8849 | return bfd_reloc_ok; | |
8850 | } | |
cedb70c5 | 8851 | |
8375c36b PB |
8852 | case R_ARM_ALU_PCREL7_0: |
8853 | case R_ARM_ALU_PCREL15_8: | |
8854 | case R_ARM_ALU_PCREL23_15: | |
8855 | { | |
8856 | bfd_vma insn; | |
8857 | bfd_vma relocation; | |
8858 | ||
8859 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
8860 | if (globals->use_rel) |
8861 | { | |
8862 | /* Extract the addend. */ | |
8863 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
8864 | signed_addend = addend; | |
8865 | } | |
8375c36b PB |
8866 | relocation = value + signed_addend; |
8867 | ||
8868 | relocation -= (input_section->output_section->vma | |
8869 | + input_section->output_offset | |
8870 | + rel->r_offset); | |
8871 | insn = (insn & ~0xfff) | |
8872 | | ((howto->bitpos << 7) & 0xf00) | |
8873 | | ((relocation >> howto->bitpos) & 0xff); | |
8874 | bfd_put_32 (input_bfd, value, hit_data); | |
8875 | } | |
8876 | return bfd_reloc_ok; | |
8877 | ||
252b5132 RH |
8878 | case R_ARM_GNU_VTINHERIT: |
8879 | case R_ARM_GNU_VTENTRY: | |
8880 | return bfd_reloc_ok; | |
8881 | ||
c19d1205 | 8882 | case R_ARM_GOTOFF32: |
252b5132 RH |
8883 | /* Relocation is relative to the start of the |
8884 | global offset table. */ | |
8885 | ||
8886 | BFD_ASSERT (sgot != NULL); | |
8887 | if (sgot == NULL) | |
8888 | return bfd_reloc_notsupported; | |
9a5aca8c | 8889 | |
cedb70c5 | 8890 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
8891 | address by one, so that attempts to call the function pointer will |
8892 | correctly interpret it as Thumb code. */ | |
35fc36a8 | 8893 | if (branch_type == ST_BRANCH_TO_THUMB) |
ee29b9fb RE |
8894 | value += 1; |
8895 | ||
252b5132 RH |
8896 | /* Note that sgot->output_offset is not involved in this |
8897 | calculation. We always want the start of .got. If we | |
8898 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
8899 | permitted by the ABI, we might have to change this | |
9b485d32 | 8900 | calculation. */ |
252b5132 | 8901 | value -= sgot->output_section->vma; |
f21f3fe0 | 8902 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 8903 | contents, rel->r_offset, value, |
00a97672 | 8904 | rel->r_addend); |
252b5132 RH |
8905 | |
8906 | case R_ARM_GOTPC: | |
a7c10850 | 8907 | /* Use global offset table as symbol value. */ |
252b5132 | 8908 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 8909 | |
252b5132 RH |
8910 | if (sgot == NULL) |
8911 | return bfd_reloc_notsupported; | |
8912 | ||
0945cdfd | 8913 | *unresolved_reloc_p = FALSE; |
252b5132 | 8914 | value = sgot->output_section->vma; |
f21f3fe0 | 8915 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 8916 | contents, rel->r_offset, value, |
00a97672 | 8917 | rel->r_addend); |
f21f3fe0 | 8918 | |
252b5132 | 8919 | case R_ARM_GOT32: |
eb043451 | 8920 | case R_ARM_GOT_PREL: |
252b5132 | 8921 | /* Relocation is to the entry for this symbol in the |
9b485d32 | 8922 | global offset table. */ |
252b5132 RH |
8923 | if (sgot == NULL) |
8924 | return bfd_reloc_notsupported; | |
f21f3fe0 | 8925 | |
34e77a92 RS |
8926 | if (dynreloc_st_type == STT_GNU_IFUNC |
8927 | && plt_offset != (bfd_vma) -1 | |
8928 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) | |
8929 | { | |
8930 | /* We have a relocation against a locally-binding STT_GNU_IFUNC | |
8931 | symbol, and the relocation resolves directly to the runtime | |
8932 | target rather than to the .iplt entry. This means that any | |
8933 | .got entry would be the same value as the .igot.plt entry, | |
8934 | so there's no point creating both. */ | |
8935 | sgot = globals->root.igotplt; | |
8936 | value = sgot->output_offset + gotplt_offset; | |
8937 | } | |
8938 | else if (h != NULL) | |
252b5132 RH |
8939 | { |
8940 | bfd_vma off; | |
f21f3fe0 | 8941 | |
252b5132 RH |
8942 | off = h->got.offset; |
8943 | BFD_ASSERT (off != (bfd_vma) -1); | |
b436d854 | 8944 | if ((off & 1) != 0) |
252b5132 | 8945 | { |
b436d854 RS |
8946 | /* We have already processsed one GOT relocation against |
8947 | this symbol. */ | |
8948 | off &= ~1; | |
8949 | if (globals->root.dynamic_sections_created | |
8950 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
8951 | *unresolved_reloc_p = FALSE; | |
8952 | } | |
8953 | else | |
8954 | { | |
8955 | Elf_Internal_Rela outrel; | |
8956 | ||
8957 | if (!SYMBOL_REFERENCES_LOCAL (info, h)) | |
8958 | { | |
8959 | /* If the symbol doesn't resolve locally in a static | |
8960 | object, we have an undefined reference. If the | |
8961 | symbol doesn't resolve locally in a dynamic object, | |
8962 | it should be resolved by the dynamic linker. */ | |
8963 | if (globals->root.dynamic_sections_created) | |
8964 | { | |
8965 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); | |
8966 | *unresolved_reloc_p = FALSE; | |
8967 | } | |
8968 | else | |
8969 | outrel.r_info = 0; | |
8970 | outrel.r_addend = 0; | |
8971 | } | |
252b5132 RH |
8972 | else |
8973 | { | |
34e77a92 RS |
8974 | if (dynreloc_st_type == STT_GNU_IFUNC) |
8975 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
8976 | else if (info->shared) | |
8977 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
8978 | else | |
8979 | outrel.r_info = 0; | |
8980 | outrel.r_addend = dynreloc_value; | |
b436d854 | 8981 | } |
ee29b9fb | 8982 | |
b436d854 RS |
8983 | /* The GOT entry is initialized to zero by default. |
8984 | See if we should install a different value. */ | |
8985 | if (outrel.r_addend != 0 | |
8986 | && (outrel.r_info == 0 || globals->use_rel)) | |
8987 | { | |
8988 | bfd_put_32 (output_bfd, outrel.r_addend, | |
8989 | sgot->contents + off); | |
8990 | outrel.r_addend = 0; | |
252b5132 | 8991 | } |
f21f3fe0 | 8992 | |
b436d854 RS |
8993 | if (outrel.r_info != 0) |
8994 | { | |
8995 | outrel.r_offset = (sgot->output_section->vma | |
8996 | + sgot->output_offset | |
8997 | + off); | |
8998 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
8999 | } | |
9000 | h->got.offset |= 1; | |
9001 | } | |
252b5132 RH |
9002 | value = sgot->output_offset + off; |
9003 | } | |
9004 | else | |
9005 | { | |
9006 | bfd_vma off; | |
f21f3fe0 | 9007 | |
252b5132 RH |
9008 | BFD_ASSERT (local_got_offsets != NULL && |
9009 | local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 9010 | |
252b5132 | 9011 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 9012 | |
252b5132 RH |
9013 | /* The offset must always be a multiple of 4. We use the |
9014 | least significant bit to record whether we have already | |
9b485d32 | 9015 | generated the necessary reloc. */ |
252b5132 RH |
9016 | if ((off & 1) != 0) |
9017 | off &= ~1; | |
9018 | else | |
9019 | { | |
00a97672 | 9020 | if (globals->use_rel) |
34e77a92 | 9021 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); |
f21f3fe0 | 9022 | |
34e77a92 | 9023 | if (info->shared || dynreloc_st_type == STT_GNU_IFUNC) |
252b5132 | 9024 | { |
947216bf | 9025 | Elf_Internal_Rela outrel; |
f21f3fe0 | 9026 | |
34e77a92 | 9027 | outrel.r_addend = addend + dynreloc_value; |
252b5132 | 9028 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 9029 | + sgot->output_offset |
252b5132 | 9030 | + off); |
34e77a92 RS |
9031 | if (dynreloc_st_type == STT_GNU_IFUNC) |
9032 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
9033 | else | |
9034 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
47beaa6a | 9035 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
252b5132 | 9036 | } |
f21f3fe0 | 9037 | |
252b5132 RH |
9038 | local_got_offsets[r_symndx] |= 1; |
9039 | } | |
f21f3fe0 | 9040 | |
252b5132 RH |
9041 | value = sgot->output_offset + off; |
9042 | } | |
eb043451 PB |
9043 | if (r_type != R_ARM_GOT32) |
9044 | value += sgot->output_section->vma; | |
9a5aca8c | 9045 | |
f21f3fe0 | 9046 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 9047 | contents, rel->r_offset, value, |
00a97672 | 9048 | rel->r_addend); |
f21f3fe0 | 9049 | |
ba93b8ac DJ |
9050 | case R_ARM_TLS_LDO32: |
9051 | value = value - dtpoff_base (info); | |
9052 | ||
9053 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
9054 | contents, rel->r_offset, value, |
9055 | rel->r_addend); | |
ba93b8ac DJ |
9056 | |
9057 | case R_ARM_TLS_LDM32: | |
9058 | { | |
9059 | bfd_vma off; | |
9060 | ||
362d30a1 | 9061 | if (sgot == NULL) |
ba93b8ac DJ |
9062 | abort (); |
9063 | ||
9064 | off = globals->tls_ldm_got.offset; | |
9065 | ||
9066 | if ((off & 1) != 0) | |
9067 | off &= ~1; | |
9068 | else | |
9069 | { | |
9070 | /* If we don't know the module number, create a relocation | |
9071 | for it. */ | |
9072 | if (info->shared) | |
9073 | { | |
9074 | Elf_Internal_Rela outrel; | |
ba93b8ac | 9075 | |
362d30a1 | 9076 | if (srelgot == NULL) |
ba93b8ac DJ |
9077 | abort (); |
9078 | ||
00a97672 | 9079 | outrel.r_addend = 0; |
362d30a1 RS |
9080 | outrel.r_offset = (sgot->output_section->vma |
9081 | + sgot->output_offset + off); | |
ba93b8ac DJ |
9082 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
9083 | ||
00a97672 RS |
9084 | if (globals->use_rel) |
9085 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9086 | sgot->contents + off); |
ba93b8ac | 9087 | |
47beaa6a | 9088 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
9089 | } |
9090 | else | |
362d30a1 | 9091 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
ba93b8ac DJ |
9092 | |
9093 | globals->tls_ldm_got.offset |= 1; | |
9094 | } | |
9095 | ||
362d30a1 | 9096 | value = sgot->output_section->vma + sgot->output_offset + off |
ba93b8ac DJ |
9097 | - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); |
9098 | ||
9099 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
9100 | contents, rel->r_offset, value, | |
00a97672 | 9101 | rel->r_addend); |
ba93b8ac DJ |
9102 | } |
9103 | ||
0855e32b NS |
9104 | case R_ARM_TLS_CALL: |
9105 | case R_ARM_THM_TLS_CALL: | |
ba93b8ac DJ |
9106 | case R_ARM_TLS_GD32: |
9107 | case R_ARM_TLS_IE32: | |
0855e32b NS |
9108 | case R_ARM_TLS_GOTDESC: |
9109 | case R_ARM_TLS_DESCSEQ: | |
9110 | case R_ARM_THM_TLS_DESCSEQ: | |
ba93b8ac | 9111 | { |
0855e32b NS |
9112 | bfd_vma off, offplt; |
9113 | int indx = 0; | |
ba93b8ac DJ |
9114 | char tls_type; |
9115 | ||
0855e32b | 9116 | BFD_ASSERT (sgot != NULL); |
ba93b8ac | 9117 | |
ba93b8ac DJ |
9118 | if (h != NULL) |
9119 | { | |
9120 | bfd_boolean dyn; | |
9121 | dyn = globals->root.dynamic_sections_created; | |
9122 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) | |
9123 | && (!info->shared | |
9124 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
9125 | { | |
9126 | *unresolved_reloc_p = FALSE; | |
9127 | indx = h->dynindx; | |
9128 | } | |
9129 | off = h->got.offset; | |
0855e32b | 9130 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
ba93b8ac DJ |
9131 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
9132 | } | |
9133 | else | |
9134 | { | |
0855e32b | 9135 | BFD_ASSERT (local_got_offsets != NULL); |
ba93b8ac | 9136 | off = local_got_offsets[r_symndx]; |
0855e32b | 9137 | offplt = local_tlsdesc_gotents[r_symndx]; |
ba93b8ac DJ |
9138 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
9139 | } | |
9140 | ||
0855e32b NS |
9141 | /* Linker relaxations happens from one of the |
9142 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ | |
9143 | if (ELF32_R_TYPE(rel->r_info) != r_type) | |
9144 | tls_type = GOT_TLS_IE; | |
9145 | ||
9146 | BFD_ASSERT (tls_type != GOT_UNKNOWN); | |
ba93b8ac DJ |
9147 | |
9148 | if ((off & 1) != 0) | |
9149 | off &= ~1; | |
9150 | else | |
9151 | { | |
9152 | bfd_boolean need_relocs = FALSE; | |
9153 | Elf_Internal_Rela outrel; | |
ba93b8ac DJ |
9154 | int cur_off = off; |
9155 | ||
9156 | /* The GOT entries have not been initialized yet. Do it | |
9157 | now, and emit any relocations. If both an IE GOT and a | |
9158 | GD GOT are necessary, we emit the GD first. */ | |
9159 | ||
9160 | if ((info->shared || indx != 0) | |
9161 | && (h == NULL | |
9162 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
9163 | || h->root.type != bfd_link_hash_undefweak)) | |
9164 | { | |
9165 | need_relocs = TRUE; | |
0855e32b | 9166 | BFD_ASSERT (srelgot != NULL); |
ba93b8ac DJ |
9167 | } |
9168 | ||
0855e32b NS |
9169 | if (tls_type & GOT_TLS_GDESC) |
9170 | { | |
47beaa6a RS |
9171 | bfd_byte *loc; |
9172 | ||
0855e32b NS |
9173 | /* We should have relaxed, unless this is an undefined |
9174 | weak symbol. */ | |
9175 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) | |
9176 | || info->shared); | |
9177 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 | |
9178 | <= globals->root.sgotplt->size); | |
9179 | ||
9180 | outrel.r_addend = 0; | |
9181 | outrel.r_offset = (globals->root.sgotplt->output_section->vma | |
9182 | + globals->root.sgotplt->output_offset | |
9183 | + offplt | |
9184 | + globals->sgotplt_jump_table_size); | |
9185 | ||
9186 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); | |
9187 | sreloc = globals->root.srelplt; | |
9188 | loc = sreloc->contents; | |
9189 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); | |
9190 | BFD_ASSERT (loc + RELOC_SIZE (globals) | |
9191 | <= sreloc->contents + sreloc->size); | |
9192 | ||
9193 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
9194 | ||
9195 | /* For globals, the first word in the relocation gets | |
9196 | the relocation index and the top bit set, or zero, | |
9197 | if we're binding now. For locals, it gets the | |
9198 | symbol's offset in the tls section. */ | |
9199 | bfd_put_32 (output_bfd, | |
9200 | !h ? value - elf_hash_table (info)->tls_sec->vma | |
9201 | : info->flags & DF_BIND_NOW ? 0 | |
9202 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), | |
9203 | globals->root.sgotplt->contents + offplt + | |
9204 | globals->sgotplt_jump_table_size); | |
9205 | ||
9206 | /* Second word in the relocation is always zero. */ | |
9207 | bfd_put_32 (output_bfd, 0, | |
9208 | globals->root.sgotplt->contents + offplt + | |
9209 | globals->sgotplt_jump_table_size + 4); | |
9210 | } | |
ba93b8ac DJ |
9211 | if (tls_type & GOT_TLS_GD) |
9212 | { | |
9213 | if (need_relocs) | |
9214 | { | |
00a97672 | 9215 | outrel.r_addend = 0; |
362d30a1 RS |
9216 | outrel.r_offset = (sgot->output_section->vma |
9217 | + sgot->output_offset | |
00a97672 | 9218 | + cur_off); |
ba93b8ac | 9219 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 9220 | |
00a97672 RS |
9221 | if (globals->use_rel) |
9222 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9223 | sgot->contents + cur_off); |
00a97672 | 9224 | |
47beaa6a | 9225 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
9226 | |
9227 | if (indx == 0) | |
9228 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
362d30a1 | 9229 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
9230 | else |
9231 | { | |
00a97672 | 9232 | outrel.r_addend = 0; |
ba93b8ac DJ |
9233 | outrel.r_info = ELF32_R_INFO (indx, |
9234 | R_ARM_TLS_DTPOFF32); | |
9235 | outrel.r_offset += 4; | |
00a97672 RS |
9236 | |
9237 | if (globals->use_rel) | |
9238 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9239 | sgot->contents + cur_off + 4); |
00a97672 | 9240 | |
47beaa6a RS |
9241 | elf32_arm_add_dynreloc (output_bfd, info, |
9242 | srelgot, &outrel); | |
ba93b8ac DJ |
9243 | } |
9244 | } | |
9245 | else | |
9246 | { | |
9247 | /* If we are not emitting relocations for a | |
9248 | general dynamic reference, then we must be in a | |
9249 | static link or an executable link with the | |
9250 | symbol binding locally. Mark it as belonging | |
9251 | to module 1, the executable. */ | |
9252 | bfd_put_32 (output_bfd, 1, | |
362d30a1 | 9253 | sgot->contents + cur_off); |
ba93b8ac | 9254 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
362d30a1 | 9255 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
9256 | } |
9257 | ||
9258 | cur_off += 8; | |
9259 | } | |
9260 | ||
9261 | if (tls_type & GOT_TLS_IE) | |
9262 | { | |
9263 | if (need_relocs) | |
9264 | { | |
00a97672 RS |
9265 | if (indx == 0) |
9266 | outrel.r_addend = value - dtpoff_base (info); | |
9267 | else | |
9268 | outrel.r_addend = 0; | |
362d30a1 RS |
9269 | outrel.r_offset = (sgot->output_section->vma |
9270 | + sgot->output_offset | |
ba93b8ac DJ |
9271 | + cur_off); |
9272 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
9273 | ||
00a97672 RS |
9274 | if (globals->use_rel) |
9275 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9276 | sgot->contents + cur_off); |
ba93b8ac | 9277 | |
47beaa6a | 9278 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
9279 | } |
9280 | else | |
9281 | bfd_put_32 (output_bfd, tpoff (info, value), | |
362d30a1 | 9282 | sgot->contents + cur_off); |
ba93b8ac DJ |
9283 | cur_off += 4; |
9284 | } | |
9285 | ||
9286 | if (h != NULL) | |
9287 | h->got.offset |= 1; | |
9288 | else | |
9289 | local_got_offsets[r_symndx] |= 1; | |
9290 | } | |
9291 | ||
9292 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32) | |
9293 | off += 8; | |
0855e32b NS |
9294 | else if (tls_type & GOT_TLS_GDESC) |
9295 | off = offplt; | |
9296 | ||
9297 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL | |
9298 | || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) | |
9299 | { | |
9300 | bfd_signed_vma offset; | |
9301 | enum elf32_arm_stub_type stub_type | |
34e77a92 RS |
9302 | = arm_type_of_stub (info, input_section, rel, |
9303 | st_type, &branch_type, | |
0855e32b NS |
9304 | (struct elf32_arm_link_hash_entry *)h, |
9305 | globals->tls_trampoline, globals->root.splt, | |
9306 | input_bfd, sym_name); | |
9307 | ||
9308 | if (stub_type != arm_stub_none) | |
9309 | { | |
9310 | struct elf32_arm_stub_hash_entry *stub_entry | |
9311 | = elf32_arm_get_stub_entry | |
9312 | (input_section, globals->root.splt, 0, rel, | |
9313 | globals, stub_type); | |
9314 | offset = (stub_entry->stub_offset | |
9315 | + stub_entry->stub_sec->output_offset | |
9316 | + stub_entry->stub_sec->output_section->vma); | |
9317 | } | |
9318 | else | |
9319 | offset = (globals->root.splt->output_section->vma | |
9320 | + globals->root.splt->output_offset | |
9321 | + globals->tls_trampoline); | |
9322 | ||
9323 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL) | |
9324 | { | |
9325 | unsigned long inst; | |
9326 | ||
9327 | offset -= (input_section->output_section->vma + | |
9328 | input_section->output_offset + rel->r_offset + 8); | |
9329 | ||
9330 | inst = offset >> 2; | |
9331 | inst &= 0x00ffffff; | |
9332 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); | |
9333 | } | |
9334 | else | |
9335 | { | |
9336 | /* Thumb blx encodes the offset in a complicated | |
9337 | fashion. */ | |
9338 | unsigned upper_insn, lower_insn; | |
9339 | unsigned neg; | |
9340 | ||
9341 | offset -= (input_section->output_section->vma + | |
9342 | input_section->output_offset | |
9343 | + rel->r_offset + 4); | |
9344 | ||
9345 | /* Round up the offset to a word boundary */ | |
9346 | offset = (offset + 2) & ~2; | |
9347 | neg = offset < 0; | |
9348 | upper_insn = (0xf000 | |
9349 | | ((offset >> 12) & 0x3ff) | |
9350 | | (neg << 10)); | |
9351 | lower_insn = (0xc000 | |
9352 | | (((!((offset >> 23) & 1)) ^ neg) << 13) | |
9353 | | (((!((offset >> 22) & 1)) ^ neg) << 11) | |
9354 | | ((offset >> 1) & 0x7ff)); | |
9355 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
9356 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
9357 | return bfd_reloc_ok; | |
9358 | } | |
9359 | } | |
9360 | /* These relocations needs special care, as besides the fact | |
9361 | they point somewhere in .gotplt, the addend must be | |
9362 | adjusted accordingly depending on the type of instruction | |
9363 | we refer to */ | |
9364 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) | |
9365 | { | |
9366 | unsigned long data, insn; | |
9367 | unsigned thumb; | |
9368 | ||
9369 | data = bfd_get_32 (input_bfd, hit_data); | |
9370 | thumb = data & 1; | |
9371 | data &= ~1u; | |
9372 | ||
9373 | if (thumb) | |
9374 | { | |
9375 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); | |
9376 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
9377 | insn = (insn << 16) | |
9378 | | bfd_get_16 (input_bfd, | |
9379 | contents + rel->r_offset - data + 2); | |
9380 | if ((insn & 0xf800c000) == 0xf000c000) | |
9381 | /* bl/blx */ | |
9382 | value = -6; | |
9383 | else if ((insn & 0xffffff00) == 0x4400) | |
9384 | /* add */ | |
9385 | value = -5; | |
9386 | else | |
9387 | { | |
9388 | (*_bfd_error_handler) | |
9389 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"), | |
9390 | input_bfd, input_section, | |
9391 | (unsigned long)rel->r_offset, insn); | |
9392 | return bfd_reloc_notsupported; | |
9393 | } | |
9394 | } | |
9395 | else | |
9396 | { | |
9397 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); | |
9398 | ||
9399 | switch (insn >> 24) | |
9400 | { | |
9401 | case 0xeb: /* bl */ | |
9402 | case 0xfa: /* blx */ | |
9403 | value = -4; | |
9404 | break; | |
9405 | ||
9406 | case 0xe0: /* add */ | |
9407 | value = -8; | |
9408 | break; | |
9409 | ||
9410 | default: | |
9411 | (*_bfd_error_handler) | |
9412 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"), | |
9413 | input_bfd, input_section, | |
9414 | (unsigned long)rel->r_offset, insn); | |
9415 | return bfd_reloc_notsupported; | |
9416 | } | |
9417 | } | |
9418 | ||
9419 | value += ((globals->root.sgotplt->output_section->vma | |
9420 | + globals->root.sgotplt->output_offset + off) | |
9421 | - (input_section->output_section->vma | |
9422 | + input_section->output_offset | |
9423 | + rel->r_offset) | |
9424 | + globals->sgotplt_jump_table_size); | |
9425 | } | |
9426 | else | |
9427 | value = ((globals->root.sgot->output_section->vma | |
9428 | + globals->root.sgot->output_offset + off) | |
9429 | - (input_section->output_section->vma | |
9430 | + input_section->output_offset + rel->r_offset)); | |
ba93b8ac DJ |
9431 | |
9432 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
9433 | contents, rel->r_offset, value, | |
00a97672 | 9434 | rel->r_addend); |
ba93b8ac DJ |
9435 | } |
9436 | ||
9437 | case R_ARM_TLS_LE32: | |
9438 | if (info->shared) | |
9439 | { | |
9440 | (*_bfd_error_handler) | |
9441 | (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), | |
9442 | input_bfd, input_section, | |
9443 | (long) rel->r_offset, howto->name); | |
21d799b5 | 9444 | return (bfd_reloc_status_type) FALSE; |
ba93b8ac DJ |
9445 | } |
9446 | else | |
9447 | value = tpoff (info, value); | |
906e58ca | 9448 | |
ba93b8ac | 9449 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
9450 | contents, rel->r_offset, value, |
9451 | rel->r_addend); | |
ba93b8ac | 9452 | |
319850b4 JB |
9453 | case R_ARM_V4BX: |
9454 | if (globals->fix_v4bx) | |
845b51d6 PB |
9455 | { |
9456 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 9457 | |
845b51d6 PB |
9458 | /* Ensure that we have a BX instruction. */ |
9459 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 9460 | |
845b51d6 PB |
9461 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
9462 | { | |
9463 | /* Branch to veneer. */ | |
9464 | bfd_vma glue_addr; | |
9465 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
9466 | glue_addr -= input_section->output_section->vma | |
9467 | + input_section->output_offset | |
9468 | + rel->r_offset + 8; | |
9469 | insn = (insn & 0xf0000000) | 0x0a000000 | |
9470 | | ((glue_addr >> 2) & 0x00ffffff); | |
9471 | } | |
9472 | else | |
9473 | { | |
9474 | /* Preserve Rm (lowest four bits) and the condition code | |
9475 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
9476 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
9477 | } | |
319850b4 | 9478 | |
845b51d6 PB |
9479 | bfd_put_32 (input_bfd, insn, hit_data); |
9480 | } | |
319850b4 JB |
9481 | return bfd_reloc_ok; |
9482 | ||
b6895b4f PB |
9483 | case R_ARM_MOVW_ABS_NC: |
9484 | case R_ARM_MOVT_ABS: | |
9485 | case R_ARM_MOVW_PREL_NC: | |
9486 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
9487 | /* Until we properly support segment-base-relative addressing then |
9488 | we assume the segment base to be zero, as for the group relocations. | |
9489 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
9490 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
9491 | case R_ARM_MOVW_BREL_NC: | |
9492 | case R_ARM_MOVW_BREL: | |
9493 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
9494 | { |
9495 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9496 | ||
9497 | if (globals->use_rel) | |
9498 | { | |
9499 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 9500 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 9501 | } |
92f5d02b | 9502 | |
b6895b4f | 9503 | value += signed_addend; |
b6895b4f PB |
9504 | |
9505 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
9506 | value -= (input_section->output_section->vma | |
9507 | + input_section->output_offset + rel->r_offset); | |
9508 | ||
92f5d02b MS |
9509 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
9510 | return bfd_reloc_overflow; | |
9511 | ||
35fc36a8 | 9512 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
9513 | value |= 1; |
9514 | ||
9515 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
9516 | || r_type == R_ARM_MOVT_BREL) | |
b6895b4f PB |
9517 | value >>= 16; |
9518 | ||
9519 | insn &= 0xfff0f000; | |
9520 | insn |= value & 0xfff; | |
9521 | insn |= (value & 0xf000) << 4; | |
9522 | bfd_put_32 (input_bfd, insn, hit_data); | |
9523 | } | |
9524 | return bfd_reloc_ok; | |
9525 | ||
9526 | case R_ARM_THM_MOVW_ABS_NC: | |
9527 | case R_ARM_THM_MOVT_ABS: | |
9528 | case R_ARM_THM_MOVW_PREL_NC: | |
9529 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
9530 | /* Until we properly support segment-base-relative addressing then |
9531 | we assume the segment base to be zero, as for the above relocations. | |
9532 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
9533 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
9534 | as R_ARM_THM_MOVT_ABS. */ | |
9535 | case R_ARM_THM_MOVW_BREL_NC: | |
9536 | case R_ARM_THM_MOVW_BREL: | |
9537 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
9538 | { |
9539 | bfd_vma insn; | |
906e58ca | 9540 | |
b6895b4f PB |
9541 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
9542 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
9543 | ||
9544 | if (globals->use_rel) | |
9545 | { | |
9546 | addend = ((insn >> 4) & 0xf000) | |
9547 | | ((insn >> 15) & 0x0800) | |
9548 | | ((insn >> 4) & 0x0700) | |
9549 | | (insn & 0x00ff); | |
39623e12 | 9550 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 9551 | } |
92f5d02b | 9552 | |
b6895b4f | 9553 | value += signed_addend; |
b6895b4f PB |
9554 | |
9555 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
9556 | value -= (input_section->output_section->vma | |
9557 | + input_section->output_offset + rel->r_offset); | |
9558 | ||
92f5d02b MS |
9559 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
9560 | return bfd_reloc_overflow; | |
9561 | ||
35fc36a8 | 9562 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
9563 | value |= 1; |
9564 | ||
9565 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
9566 | || r_type == R_ARM_THM_MOVT_BREL) | |
b6895b4f PB |
9567 | value >>= 16; |
9568 | ||
9569 | insn &= 0xfbf08f00; | |
9570 | insn |= (value & 0xf000) << 4; | |
9571 | insn |= (value & 0x0800) << 15; | |
9572 | insn |= (value & 0x0700) << 4; | |
9573 | insn |= (value & 0x00ff); | |
9574 | ||
9575 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
9576 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
9577 | } | |
9578 | return bfd_reloc_ok; | |
9579 | ||
4962c51a MS |
9580 | case R_ARM_ALU_PC_G0_NC: |
9581 | case R_ARM_ALU_PC_G1_NC: | |
9582 | case R_ARM_ALU_PC_G0: | |
9583 | case R_ARM_ALU_PC_G1: | |
9584 | case R_ARM_ALU_PC_G2: | |
9585 | case R_ARM_ALU_SB_G0_NC: | |
9586 | case R_ARM_ALU_SB_G1_NC: | |
9587 | case R_ARM_ALU_SB_G0: | |
9588 | case R_ARM_ALU_SB_G1: | |
9589 | case R_ARM_ALU_SB_G2: | |
9590 | { | |
9591 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9592 | bfd_vma pc = input_section->output_section->vma | |
9593 | + input_section->output_offset + rel->r_offset; | |
9594 | /* sb should be the origin of the *segment* containing the symbol. | |
9595 | It is not clear how to obtain this OS-dependent value, so we | |
9596 | make an arbitrary choice of zero. */ | |
9597 | bfd_vma sb = 0; | |
9598 | bfd_vma residual; | |
9599 | bfd_vma g_n; | |
9600 | bfd_signed_vma signed_value; | |
9601 | int group = 0; | |
9602 | ||
9603 | /* Determine which group of bits to select. */ | |
9604 | switch (r_type) | |
9605 | { | |
9606 | case R_ARM_ALU_PC_G0_NC: | |
9607 | case R_ARM_ALU_PC_G0: | |
9608 | case R_ARM_ALU_SB_G0_NC: | |
9609 | case R_ARM_ALU_SB_G0: | |
9610 | group = 0; | |
9611 | break; | |
9612 | ||
9613 | case R_ARM_ALU_PC_G1_NC: | |
9614 | case R_ARM_ALU_PC_G1: | |
9615 | case R_ARM_ALU_SB_G1_NC: | |
9616 | case R_ARM_ALU_SB_G1: | |
9617 | group = 1; | |
9618 | break; | |
9619 | ||
9620 | case R_ARM_ALU_PC_G2: | |
9621 | case R_ARM_ALU_SB_G2: | |
9622 | group = 2; | |
9623 | break; | |
9624 | ||
9625 | default: | |
906e58ca | 9626 | abort (); |
4962c51a MS |
9627 | } |
9628 | ||
9629 | /* If REL, extract the addend from the insn. If RELA, it will | |
9630 | have already been fetched for us. */ | |
9631 | if (globals->use_rel) | |
9632 | { | |
9633 | int negative; | |
9634 | bfd_vma constant = insn & 0xff; | |
9635 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
9636 | ||
9637 | if (rotation == 0) | |
9638 | signed_addend = constant; | |
9639 | else | |
9640 | { | |
9641 | /* Compensate for the fact that in the instruction, the | |
9642 | rotation is stored in multiples of 2 bits. */ | |
9643 | rotation *= 2; | |
9644 | ||
9645 | /* Rotate "constant" right by "rotation" bits. */ | |
9646 | signed_addend = (constant >> rotation) | | |
9647 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
9648 | } | |
9649 | ||
9650 | /* Determine if the instruction is an ADD or a SUB. | |
9651 | (For REL, this determines the sign of the addend.) */ | |
9652 | negative = identify_add_or_sub (insn); | |
9653 | if (negative == 0) | |
9654 | { | |
9655 | (*_bfd_error_handler) | |
9656 | (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"), | |
9657 | input_bfd, input_section, | |
9658 | (long) rel->r_offset, howto->name); | |
906e58ca | 9659 | return bfd_reloc_overflow; |
4962c51a MS |
9660 | } |
9661 | ||
9662 | signed_addend *= negative; | |
9663 | } | |
9664 | ||
9665 | /* Compute the value (X) to go in the place. */ | |
9666 | if (r_type == R_ARM_ALU_PC_G0_NC | |
9667 | || r_type == R_ARM_ALU_PC_G1_NC | |
9668 | || r_type == R_ARM_ALU_PC_G0 | |
9669 | || r_type == R_ARM_ALU_PC_G1 | |
9670 | || r_type == R_ARM_ALU_PC_G2) | |
9671 | /* PC relative. */ | |
9672 | signed_value = value - pc + signed_addend; | |
9673 | else | |
9674 | /* Section base relative. */ | |
9675 | signed_value = value - sb + signed_addend; | |
9676 | ||
9677 | /* If the target symbol is a Thumb function, then set the | |
9678 | Thumb bit in the address. */ | |
35fc36a8 | 9679 | if (branch_type == ST_BRANCH_TO_THUMB) |
4962c51a MS |
9680 | signed_value |= 1; |
9681 | ||
9682 | /* Calculate the value of the relevant G_n, in encoded | |
9683 | constant-with-rotation format. */ | |
9684 | g_n = calculate_group_reloc_mask (abs (signed_value), group, | |
9685 | &residual); | |
9686 | ||
9687 | /* Check for overflow if required. */ | |
9688 | if ((r_type == R_ARM_ALU_PC_G0 | |
9689 | || r_type == R_ARM_ALU_PC_G1 | |
9690 | || r_type == R_ARM_ALU_PC_G2 | |
9691 | || r_type == R_ARM_ALU_SB_G0 | |
9692 | || r_type == R_ARM_ALU_SB_G1 | |
9693 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
9694 | { | |
9695 | (*_bfd_error_handler) | |
9696 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
9697 | input_bfd, input_section, | |
9698 | (long) rel->r_offset, abs (signed_value), howto->name); | |
9699 | return bfd_reloc_overflow; | |
9700 | } | |
9701 | ||
9702 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
9703 | not to destroy the S bit. */ | |
9704 | insn &= 0xff1ff000; | |
9705 | ||
9706 | /* Set the opcode according to whether the value to go in the | |
9707 | place is negative. */ | |
9708 | if (signed_value < 0) | |
9709 | insn |= 1 << 22; | |
9710 | else | |
9711 | insn |= 1 << 23; | |
9712 | ||
9713 | /* Encode the offset. */ | |
9714 | insn |= g_n; | |
9715 | ||
9716 | bfd_put_32 (input_bfd, insn, hit_data); | |
9717 | } | |
9718 | return bfd_reloc_ok; | |
9719 | ||
9720 | case R_ARM_LDR_PC_G0: | |
9721 | case R_ARM_LDR_PC_G1: | |
9722 | case R_ARM_LDR_PC_G2: | |
9723 | case R_ARM_LDR_SB_G0: | |
9724 | case R_ARM_LDR_SB_G1: | |
9725 | case R_ARM_LDR_SB_G2: | |
9726 | { | |
9727 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9728 | bfd_vma pc = input_section->output_section->vma | |
9729 | + input_section->output_offset + rel->r_offset; | |
9730 | bfd_vma sb = 0; /* See note above. */ | |
9731 | bfd_vma residual; | |
9732 | bfd_signed_vma signed_value; | |
9733 | int group = 0; | |
9734 | ||
9735 | /* Determine which groups of bits to calculate. */ | |
9736 | switch (r_type) | |
9737 | { | |
9738 | case R_ARM_LDR_PC_G0: | |
9739 | case R_ARM_LDR_SB_G0: | |
9740 | group = 0; | |
9741 | break; | |
9742 | ||
9743 | case R_ARM_LDR_PC_G1: | |
9744 | case R_ARM_LDR_SB_G1: | |
9745 | group = 1; | |
9746 | break; | |
9747 | ||
9748 | case R_ARM_LDR_PC_G2: | |
9749 | case R_ARM_LDR_SB_G2: | |
9750 | group = 2; | |
9751 | break; | |
9752 | ||
9753 | default: | |
906e58ca | 9754 | abort (); |
4962c51a MS |
9755 | } |
9756 | ||
9757 | /* If REL, extract the addend from the insn. If RELA, it will | |
9758 | have already been fetched for us. */ | |
9759 | if (globals->use_rel) | |
9760 | { | |
9761 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
9762 | signed_addend = negative * (insn & 0xfff); | |
9763 | } | |
9764 | ||
9765 | /* Compute the value (X) to go in the place. */ | |
9766 | if (r_type == R_ARM_LDR_PC_G0 | |
9767 | || r_type == R_ARM_LDR_PC_G1 | |
9768 | || r_type == R_ARM_LDR_PC_G2) | |
9769 | /* PC relative. */ | |
9770 | signed_value = value - pc + signed_addend; | |
9771 | else | |
9772 | /* Section base relative. */ | |
9773 | signed_value = value - sb + signed_addend; | |
9774 | ||
9775 | /* Calculate the value of the relevant G_{n-1} to obtain | |
9776 | the residual at that stage. */ | |
9777 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
9778 | ||
9779 | /* Check for overflow. */ | |
9780 | if (residual >= 0x1000) | |
9781 | { | |
9782 | (*_bfd_error_handler) | |
9783 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
9784 | input_bfd, input_section, | |
9785 | (long) rel->r_offset, abs (signed_value), howto->name); | |
9786 | return bfd_reloc_overflow; | |
9787 | } | |
9788 | ||
9789 | /* Mask out the value and U bit. */ | |
9790 | insn &= 0xff7ff000; | |
9791 | ||
9792 | /* Set the U bit if the value to go in the place is non-negative. */ | |
9793 | if (signed_value >= 0) | |
9794 | insn |= 1 << 23; | |
9795 | ||
9796 | /* Encode the offset. */ | |
9797 | insn |= residual; | |
9798 | ||
9799 | bfd_put_32 (input_bfd, insn, hit_data); | |
9800 | } | |
9801 | return bfd_reloc_ok; | |
9802 | ||
9803 | case R_ARM_LDRS_PC_G0: | |
9804 | case R_ARM_LDRS_PC_G1: | |
9805 | case R_ARM_LDRS_PC_G2: | |
9806 | case R_ARM_LDRS_SB_G0: | |
9807 | case R_ARM_LDRS_SB_G1: | |
9808 | case R_ARM_LDRS_SB_G2: | |
9809 | { | |
9810 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9811 | bfd_vma pc = input_section->output_section->vma | |
9812 | + input_section->output_offset + rel->r_offset; | |
9813 | bfd_vma sb = 0; /* See note above. */ | |
9814 | bfd_vma residual; | |
9815 | bfd_signed_vma signed_value; | |
9816 | int group = 0; | |
9817 | ||
9818 | /* Determine which groups of bits to calculate. */ | |
9819 | switch (r_type) | |
9820 | { | |
9821 | case R_ARM_LDRS_PC_G0: | |
9822 | case R_ARM_LDRS_SB_G0: | |
9823 | group = 0; | |
9824 | break; | |
9825 | ||
9826 | case R_ARM_LDRS_PC_G1: | |
9827 | case R_ARM_LDRS_SB_G1: | |
9828 | group = 1; | |
9829 | break; | |
9830 | ||
9831 | case R_ARM_LDRS_PC_G2: | |
9832 | case R_ARM_LDRS_SB_G2: | |
9833 | group = 2; | |
9834 | break; | |
9835 | ||
9836 | default: | |
906e58ca | 9837 | abort (); |
4962c51a MS |
9838 | } |
9839 | ||
9840 | /* If REL, extract the addend from the insn. If RELA, it will | |
9841 | have already been fetched for us. */ | |
9842 | if (globals->use_rel) | |
9843 | { | |
9844 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
9845 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
9846 | } | |
9847 | ||
9848 | /* Compute the value (X) to go in the place. */ | |
9849 | if (r_type == R_ARM_LDRS_PC_G0 | |
9850 | || r_type == R_ARM_LDRS_PC_G1 | |
9851 | || r_type == R_ARM_LDRS_PC_G2) | |
9852 | /* PC relative. */ | |
9853 | signed_value = value - pc + signed_addend; | |
9854 | else | |
9855 | /* Section base relative. */ | |
9856 | signed_value = value - sb + signed_addend; | |
9857 | ||
9858 | /* Calculate the value of the relevant G_{n-1} to obtain | |
9859 | the residual at that stage. */ | |
9860 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
9861 | ||
9862 | /* Check for overflow. */ | |
9863 | if (residual >= 0x100) | |
9864 | { | |
9865 | (*_bfd_error_handler) | |
9866 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
9867 | input_bfd, input_section, | |
9868 | (long) rel->r_offset, abs (signed_value), howto->name); | |
9869 | return bfd_reloc_overflow; | |
9870 | } | |
9871 | ||
9872 | /* Mask out the value and U bit. */ | |
9873 | insn &= 0xff7ff0f0; | |
9874 | ||
9875 | /* Set the U bit if the value to go in the place is non-negative. */ | |
9876 | if (signed_value >= 0) | |
9877 | insn |= 1 << 23; | |
9878 | ||
9879 | /* Encode the offset. */ | |
9880 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
9881 | ||
9882 | bfd_put_32 (input_bfd, insn, hit_data); | |
9883 | } | |
9884 | return bfd_reloc_ok; | |
9885 | ||
9886 | case R_ARM_LDC_PC_G0: | |
9887 | case R_ARM_LDC_PC_G1: | |
9888 | case R_ARM_LDC_PC_G2: | |
9889 | case R_ARM_LDC_SB_G0: | |
9890 | case R_ARM_LDC_SB_G1: | |
9891 | case R_ARM_LDC_SB_G2: | |
9892 | { | |
9893 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9894 | bfd_vma pc = input_section->output_section->vma | |
9895 | + input_section->output_offset + rel->r_offset; | |
9896 | bfd_vma sb = 0; /* See note above. */ | |
9897 | bfd_vma residual; | |
9898 | bfd_signed_vma signed_value; | |
9899 | int group = 0; | |
9900 | ||
9901 | /* Determine which groups of bits to calculate. */ | |
9902 | switch (r_type) | |
9903 | { | |
9904 | case R_ARM_LDC_PC_G0: | |
9905 | case R_ARM_LDC_SB_G0: | |
9906 | group = 0; | |
9907 | break; | |
9908 | ||
9909 | case R_ARM_LDC_PC_G1: | |
9910 | case R_ARM_LDC_SB_G1: | |
9911 | group = 1; | |
9912 | break; | |
9913 | ||
9914 | case R_ARM_LDC_PC_G2: | |
9915 | case R_ARM_LDC_SB_G2: | |
9916 | group = 2; | |
9917 | break; | |
9918 | ||
9919 | default: | |
906e58ca | 9920 | abort (); |
4962c51a MS |
9921 | } |
9922 | ||
9923 | /* If REL, extract the addend from the insn. If RELA, it will | |
9924 | have already been fetched for us. */ | |
9925 | if (globals->use_rel) | |
9926 | { | |
9927 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
9928 | signed_addend = negative * ((insn & 0xff) << 2); | |
9929 | } | |
9930 | ||
9931 | /* Compute the value (X) to go in the place. */ | |
9932 | if (r_type == R_ARM_LDC_PC_G0 | |
9933 | || r_type == R_ARM_LDC_PC_G1 | |
9934 | || r_type == R_ARM_LDC_PC_G2) | |
9935 | /* PC relative. */ | |
9936 | signed_value = value - pc + signed_addend; | |
9937 | else | |
9938 | /* Section base relative. */ | |
9939 | signed_value = value - sb + signed_addend; | |
9940 | ||
9941 | /* Calculate the value of the relevant G_{n-1} to obtain | |
9942 | the residual at that stage. */ | |
9943 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
9944 | ||
9945 | /* Check for overflow. (The absolute value to go in the place must be | |
9946 | divisible by four and, after having been divided by four, must | |
9947 | fit in eight bits.) */ | |
9948 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
9949 | { | |
9950 | (*_bfd_error_handler) | |
9951 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
9952 | input_bfd, input_section, | |
9953 | (long) rel->r_offset, abs (signed_value), howto->name); | |
9954 | return bfd_reloc_overflow; | |
9955 | } | |
9956 | ||
9957 | /* Mask out the value and U bit. */ | |
9958 | insn &= 0xff7fff00; | |
9959 | ||
9960 | /* Set the U bit if the value to go in the place is non-negative. */ | |
9961 | if (signed_value >= 0) | |
9962 | insn |= 1 << 23; | |
9963 | ||
9964 | /* Encode the offset. */ | |
9965 | insn |= residual >> 2; | |
9966 | ||
9967 | bfd_put_32 (input_bfd, insn, hit_data); | |
9968 | } | |
9969 | return bfd_reloc_ok; | |
9970 | ||
252b5132 RH |
9971 | default: |
9972 | return bfd_reloc_notsupported; | |
9973 | } | |
9974 | } | |
9975 | ||
98c1d4aa NC |
9976 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
9977 | static void | |
57e8b36a NC |
9978 | arm_add_to_rel (bfd * abfd, |
9979 | bfd_byte * address, | |
9980 | reloc_howto_type * howto, | |
9981 | bfd_signed_vma increment) | |
98c1d4aa | 9982 | { |
98c1d4aa NC |
9983 | bfd_signed_vma addend; |
9984 | ||
bd97cb95 DJ |
9985 | if (howto->type == R_ARM_THM_CALL |
9986 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 9987 | { |
9a5aca8c AM |
9988 | int upper_insn, lower_insn; |
9989 | int upper, lower; | |
98c1d4aa | 9990 | |
9a5aca8c AM |
9991 | upper_insn = bfd_get_16 (abfd, address); |
9992 | lower_insn = bfd_get_16 (abfd, address + 2); | |
9993 | upper = upper_insn & 0x7ff; | |
9994 | lower = lower_insn & 0x7ff; | |
9995 | ||
9996 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 9997 | addend += increment; |
9a5aca8c | 9998 | addend >>= 1; |
98c1d4aa | 9999 | |
9a5aca8c AM |
10000 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
10001 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
10002 | ||
dc810e39 AM |
10003 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
10004 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
10005 | } |
10006 | else | |
10007 | { | |
10008 | bfd_vma contents; | |
10009 | ||
10010 | contents = bfd_get_32 (abfd, address); | |
10011 | ||
10012 | /* Get the (signed) value from the instruction. */ | |
10013 | addend = contents & howto->src_mask; | |
10014 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10015 | { | |
10016 | bfd_signed_vma mask; | |
10017 | ||
10018 | mask = -1; | |
10019 | mask &= ~ howto->src_mask; | |
10020 | addend |= mask; | |
10021 | } | |
10022 | ||
10023 | /* Add in the increment, (which is a byte value). */ | |
10024 | switch (howto->type) | |
10025 | { | |
10026 | default: | |
10027 | addend += increment; | |
10028 | break; | |
10029 | ||
10030 | case R_ARM_PC24: | |
c6596c5e | 10031 | case R_ARM_PLT32: |
5b5bb741 PB |
10032 | case R_ARM_CALL: |
10033 | case R_ARM_JUMP24: | |
9a5aca8c | 10034 | addend <<= howto->size; |
dc810e39 | 10035 | addend += increment; |
9a5aca8c AM |
10036 | |
10037 | /* Should we check for overflow here ? */ | |
10038 | ||
10039 | /* Drop any undesired bits. */ | |
10040 | addend >>= howto->rightshift; | |
10041 | break; | |
10042 | } | |
10043 | ||
10044 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
10045 | ||
10046 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 10047 | } |
98c1d4aa | 10048 | } |
252b5132 | 10049 | |
ba93b8ac DJ |
10050 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
10051 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
10052 | || (R_TYPE) == R_ARM_TLS_LDO32 \ | |
10053 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
10054 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ | |
10055 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
10056 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
10057 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
0855e32b NS |
10058 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
10059 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) | |
10060 | ||
10061 | /* Specific set of relocations for the gnu tls dialect. */ | |
10062 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ | |
10063 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ | |
10064 | || (R_TYPE) == R_ARM_TLS_CALL \ | |
10065 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ | |
10066 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ | |
10067 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) | |
ba93b8ac | 10068 | |
252b5132 | 10069 | /* Relocate an ARM ELF section. */ |
906e58ca | 10070 | |
b34976b6 | 10071 | static bfd_boolean |
57e8b36a NC |
10072 | elf32_arm_relocate_section (bfd * output_bfd, |
10073 | struct bfd_link_info * info, | |
10074 | bfd * input_bfd, | |
10075 | asection * input_section, | |
10076 | bfd_byte * contents, | |
10077 | Elf_Internal_Rela * relocs, | |
10078 | Elf_Internal_Sym * local_syms, | |
10079 | asection ** local_sections) | |
252b5132 | 10080 | { |
b34976b6 AM |
10081 | Elf_Internal_Shdr *symtab_hdr; |
10082 | struct elf_link_hash_entry **sym_hashes; | |
10083 | Elf_Internal_Rela *rel; | |
10084 | Elf_Internal_Rela *relend; | |
10085 | const char *name; | |
b32d3aa2 | 10086 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 10087 | |
4e7fd91e | 10088 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
10089 | if (globals == NULL) |
10090 | return FALSE; | |
b491616a | 10091 | |
0ffa91dd | 10092 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
10093 | sym_hashes = elf_sym_hashes (input_bfd); |
10094 | ||
10095 | rel = relocs; | |
10096 | relend = relocs + input_section->reloc_count; | |
10097 | for (; rel < relend; rel++) | |
10098 | { | |
ba96a88f NC |
10099 | int r_type; |
10100 | reloc_howto_type * howto; | |
10101 | unsigned long r_symndx; | |
10102 | Elf_Internal_Sym * sym; | |
10103 | asection * sec; | |
252b5132 | 10104 | struct elf_link_hash_entry * h; |
ba96a88f NC |
10105 | bfd_vma relocation; |
10106 | bfd_reloc_status_type r; | |
10107 | arelent bfd_reloc; | |
ba93b8ac | 10108 | char sym_type; |
0945cdfd | 10109 | bfd_boolean unresolved_reloc = FALSE; |
f2a9dd69 | 10110 | char *error_message = NULL; |
f21f3fe0 | 10111 | |
252b5132 | 10112 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 10113 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 10114 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 10115 | |
ba96a88f NC |
10116 | if ( r_type == R_ARM_GNU_VTENTRY |
10117 | || r_type == R_ARM_GNU_VTINHERIT) | |
252b5132 RH |
10118 | continue; |
10119 | ||
b32d3aa2 | 10120 | bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
ba96a88f | 10121 | howto = bfd_reloc.howto; |
252b5132 | 10122 | |
252b5132 RH |
10123 | h = NULL; |
10124 | sym = NULL; | |
10125 | sec = NULL; | |
9b485d32 | 10126 | |
252b5132 RH |
10127 | if (r_symndx < symtab_hdr->sh_info) |
10128 | { | |
10129 | sym = local_syms + r_symndx; | |
ba93b8ac | 10130 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 10131 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
10132 | |
10133 | /* An object file might have a reference to a local | |
10134 | undefined symbol. This is a daft object file, but we | |
10135 | should at least do something about it. V4BX & NONE | |
10136 | relocations do not use the symbol and are explicitly | |
77b4f08f TS |
10137 | allowed to use the undefined symbol, so allow those. |
10138 | Likewise for relocations against STN_UNDEF. */ | |
ffcb4889 NS |
10139 | if (r_type != R_ARM_V4BX |
10140 | && r_type != R_ARM_NONE | |
77b4f08f | 10141 | && r_symndx != STN_UNDEF |
ffcb4889 NS |
10142 | && bfd_is_und_section (sec) |
10143 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
10144 | { | |
10145 | if (!info->callbacks->undefined_symbol | |
10146 | (info, bfd_elf_string_from_elf_section | |
10147 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
10148 | input_bfd, input_section, | |
10149 | rel->r_offset, TRUE)) | |
10150 | return FALSE; | |
10151 | } | |
10152 | ||
4e7fd91e | 10153 | if (globals->use_rel) |
f8df10f4 | 10154 | { |
4e7fd91e PB |
10155 | relocation = (sec->output_section->vma |
10156 | + sec->output_offset | |
10157 | + sym->st_value); | |
ab96bf03 AM |
10158 | if (!info->relocatable |
10159 | && (sec->flags & SEC_MERGE) | |
10160 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 10161 | { |
4e7fd91e PB |
10162 | asection *msec; |
10163 | bfd_vma addend, value; | |
10164 | ||
39623e12 | 10165 | switch (r_type) |
4e7fd91e | 10166 | { |
39623e12 PB |
10167 | case R_ARM_MOVW_ABS_NC: |
10168 | case R_ARM_MOVT_ABS: | |
10169 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10170 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
10171 | addend = (addend ^ 0x8000) - 0x8000; | |
10172 | break; | |
f8df10f4 | 10173 | |
39623e12 PB |
10174 | case R_ARM_THM_MOVW_ABS_NC: |
10175 | case R_ARM_THM_MOVT_ABS: | |
10176 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
10177 | << 16; | |
10178 | value |= bfd_get_16 (input_bfd, | |
10179 | contents + rel->r_offset + 2); | |
10180 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
10181 | | ((value & 0x04000000) >> 15); | |
10182 | addend = (addend ^ 0x8000) - 0x8000; | |
10183 | break; | |
f8df10f4 | 10184 | |
39623e12 PB |
10185 | default: |
10186 | if (howto->rightshift | |
10187 | || (howto->src_mask & (howto->src_mask + 1))) | |
10188 | { | |
10189 | (*_bfd_error_handler) | |
10190 | (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"), | |
10191 | input_bfd, input_section, | |
10192 | (long) rel->r_offset, howto->name); | |
10193 | return FALSE; | |
10194 | } | |
10195 | ||
10196 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10197 | ||
10198 | /* Get the (signed) value from the instruction. */ | |
10199 | addend = value & howto->src_mask; | |
10200 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10201 | { | |
10202 | bfd_signed_vma mask; | |
10203 | ||
10204 | mask = -1; | |
10205 | mask &= ~ howto->src_mask; | |
10206 | addend |= mask; | |
10207 | } | |
10208 | break; | |
4e7fd91e | 10209 | } |
39623e12 | 10210 | |
4e7fd91e PB |
10211 | msec = sec; |
10212 | addend = | |
10213 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
10214 | - relocation; | |
10215 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 PB |
10216 | |
10217 | /* Cases here must match those in the preceeding | |
10218 | switch statement. */ | |
10219 | switch (r_type) | |
10220 | { | |
10221 | case R_ARM_MOVW_ABS_NC: | |
10222 | case R_ARM_MOVT_ABS: | |
10223 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
10224 | | (addend & 0xfff); | |
10225 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
10226 | break; | |
10227 | ||
10228 | case R_ARM_THM_MOVW_ABS_NC: | |
10229 | case R_ARM_THM_MOVT_ABS: | |
10230 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
10231 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
10232 | bfd_put_16 (input_bfd, value >> 16, | |
10233 | contents + rel->r_offset); | |
10234 | bfd_put_16 (input_bfd, value, | |
10235 | contents + rel->r_offset + 2); | |
10236 | break; | |
10237 | ||
10238 | default: | |
10239 | value = (value & ~ howto->dst_mask) | |
10240 | | (addend & howto->dst_mask); | |
10241 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
10242 | break; | |
10243 | } | |
f8df10f4 | 10244 | } |
f8df10f4 | 10245 | } |
4e7fd91e PB |
10246 | else |
10247 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
10248 | } |
10249 | else | |
10250 | { | |
560e09e9 | 10251 | bfd_boolean warned; |
560e09e9 | 10252 | |
b2a8e766 AM |
10253 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
10254 | r_symndx, symtab_hdr, sym_hashes, | |
10255 | h, sec, relocation, | |
10256 | unresolved_reloc, warned); | |
ba93b8ac DJ |
10257 | |
10258 | sym_type = h->type; | |
252b5132 RH |
10259 | } |
10260 | ||
ab96bf03 | 10261 | if (sec != NULL && elf_discarded_section (sec)) |
e4067dbb DJ |
10262 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
10263 | rel, relend, howto, contents); | |
ab96bf03 AM |
10264 | |
10265 | if (info->relocatable) | |
10266 | { | |
10267 | /* This is a relocatable link. We don't have to change | |
10268 | anything, unless the reloc is against a section symbol, | |
10269 | in which case we have to adjust according to where the | |
10270 | section symbol winds up in the output section. */ | |
10271 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
10272 | { | |
10273 | if (globals->use_rel) | |
10274 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
10275 | howto, (bfd_signed_vma) sec->output_offset); | |
10276 | else | |
10277 | rel->r_addend += sec->output_offset; | |
10278 | } | |
10279 | continue; | |
10280 | } | |
10281 | ||
252b5132 RH |
10282 | if (h != NULL) |
10283 | name = h->root.root.string; | |
10284 | else | |
10285 | { | |
10286 | name = (bfd_elf_string_from_elf_section | |
10287 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
10288 | if (name == NULL || *name == '\0') | |
10289 | name = bfd_section_name (input_bfd, sec); | |
10290 | } | |
f21f3fe0 | 10291 | |
cf35638d | 10292 | if (r_symndx != STN_UNDEF |
ba93b8ac DJ |
10293 | && r_type != R_ARM_NONE |
10294 | && (h == NULL | |
10295 | || h->root.type == bfd_link_hash_defined | |
10296 | || h->root.type == bfd_link_hash_defweak) | |
10297 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
10298 | { | |
10299 | (*_bfd_error_handler) | |
10300 | ((sym_type == STT_TLS | |
10301 | ? _("%B(%A+0x%lx): %s used with TLS symbol %s") | |
10302 | : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")), | |
10303 | input_bfd, | |
10304 | input_section, | |
10305 | (long) rel->r_offset, | |
10306 | howto->name, | |
10307 | name); | |
10308 | } | |
10309 | ||
0855e32b NS |
10310 | /* We call elf32_arm_final_link_relocate unless we're completely |
10311 | done, i.e., the relaxation produced the final output we want, | |
10312 | and we won't let anybody mess with it. Also, we have to do | |
10313 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation | |
10314 | both in relaxed and non-relaxed cases */ | |
10315 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) | |
10316 | || (IS_ARM_TLS_GNU_RELOC (r_type) | |
10317 | && !((h ? elf32_arm_hash_entry (h)->tls_type : | |
10318 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) | |
10319 | & GOT_TLS_GDESC))) | |
10320 | { | |
10321 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, | |
10322 | contents, rel, h == NULL); | |
10323 | /* This may have been marked unresolved because it came from | |
10324 | a shared library. But we've just dealt with that. */ | |
10325 | unresolved_reloc = 0; | |
10326 | } | |
10327 | else | |
10328 | r = bfd_reloc_continue; | |
10329 | ||
10330 | if (r == bfd_reloc_continue) | |
10331 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, | |
10332 | input_section, contents, rel, | |
34e77a92 | 10333 | relocation, info, sec, name, sym_type, |
35fc36a8 RS |
10334 | (h ? h->target_internal |
10335 | : ARM_SYM_BRANCH_TYPE (sym)), h, | |
0855e32b | 10336 | &unresolved_reloc, &error_message); |
0945cdfd DJ |
10337 | |
10338 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
10339 | because such sections are not SEC_ALLOC and thus ld.so will | |
10340 | not process them. */ | |
10341 | if (unresolved_reloc | |
10342 | && !((input_section->flags & SEC_DEBUGGING) != 0 | |
10343 | && h->def_dynamic)) | |
10344 | { | |
10345 | (*_bfd_error_handler) | |
843fe662 L |
10346 | (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), |
10347 | input_bfd, | |
10348 | input_section, | |
10349 | (long) rel->r_offset, | |
10350 | howto->name, | |
10351 | h->root.root.string); | |
0945cdfd DJ |
10352 | return FALSE; |
10353 | } | |
252b5132 RH |
10354 | |
10355 | if (r != bfd_reloc_ok) | |
10356 | { | |
252b5132 RH |
10357 | switch (r) |
10358 | { | |
10359 | case bfd_reloc_overflow: | |
cf919dfd PB |
10360 | /* If the overflowing reloc was to an undefined symbol, |
10361 | we have already printed one error message and there | |
10362 | is no point complaining again. */ | |
10363 | if ((! h || | |
10364 | h->root.type != bfd_link_hash_undefined) | |
10365 | && (!((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
10366 | (info, (h ? &h->root : NULL), name, howto->name, |
10367 | (bfd_vma) 0, input_bfd, input_section, | |
10368 | rel->r_offset)))) | |
b34976b6 | 10369 | return FALSE; |
252b5132 RH |
10370 | break; |
10371 | ||
10372 | case bfd_reloc_undefined: | |
10373 | if (!((*info->callbacks->undefined_symbol) | |
10374 | (info, name, input_bfd, input_section, | |
b34976b6 AM |
10375 | rel->r_offset, TRUE))) |
10376 | return FALSE; | |
252b5132 RH |
10377 | break; |
10378 | ||
10379 | case bfd_reloc_outofrange: | |
f2a9dd69 | 10380 | error_message = _("out of range"); |
252b5132 RH |
10381 | goto common_error; |
10382 | ||
10383 | case bfd_reloc_notsupported: | |
f2a9dd69 | 10384 | error_message = _("unsupported relocation"); |
252b5132 RH |
10385 | goto common_error; |
10386 | ||
10387 | case bfd_reloc_dangerous: | |
f2a9dd69 | 10388 | /* error_message should already be set. */ |
252b5132 RH |
10389 | goto common_error; |
10390 | ||
10391 | default: | |
f2a9dd69 | 10392 | error_message = _("unknown error"); |
8029a119 | 10393 | /* Fall through. */ |
252b5132 RH |
10394 | |
10395 | common_error: | |
f2a9dd69 DJ |
10396 | BFD_ASSERT (error_message != NULL); |
10397 | if (!((*info->callbacks->reloc_dangerous) | |
10398 | (info, error_message, input_bfd, input_section, | |
252b5132 | 10399 | rel->r_offset))) |
b34976b6 | 10400 | return FALSE; |
252b5132 RH |
10401 | break; |
10402 | } | |
10403 | } | |
10404 | } | |
10405 | ||
b34976b6 | 10406 | return TRUE; |
252b5132 RH |
10407 | } |
10408 | ||
91d6fa6a | 10409 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 10410 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 10411 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
10412 | maintaining that condition). */ |
10413 | ||
10414 | static void | |
10415 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
10416 | arm_unwind_table_edit **tail, | |
10417 | arm_unwind_edit_type type, | |
10418 | asection *linked_section, | |
91d6fa6a | 10419 | unsigned int tindex) |
2468f9c9 | 10420 | { |
21d799b5 NC |
10421 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
10422 | xmalloc (sizeof (arm_unwind_table_edit)); | |
2468f9c9 PB |
10423 | |
10424 | new_edit->type = type; | |
10425 | new_edit->linked_section = linked_section; | |
91d6fa6a | 10426 | new_edit->index = tindex; |
2468f9c9 | 10427 | |
91d6fa6a | 10428 | if (tindex > 0) |
2468f9c9 PB |
10429 | { |
10430 | new_edit->next = NULL; | |
10431 | ||
10432 | if (*tail) | |
10433 | (*tail)->next = new_edit; | |
10434 | ||
10435 | (*tail) = new_edit; | |
10436 | ||
10437 | if (!*head) | |
10438 | (*head) = new_edit; | |
10439 | } | |
10440 | else | |
10441 | { | |
10442 | new_edit->next = *head; | |
10443 | ||
10444 | if (!*tail) | |
10445 | *tail = new_edit; | |
10446 | ||
10447 | *head = new_edit; | |
10448 | } | |
10449 | } | |
10450 | ||
10451 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
10452 | ||
10453 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
10454 | static void | |
10455 | adjust_exidx_size(asection *exidx_sec, int adjust) | |
10456 | { | |
10457 | asection *out_sec; | |
10458 | ||
10459 | if (!exidx_sec->rawsize) | |
10460 | exidx_sec->rawsize = exidx_sec->size; | |
10461 | ||
10462 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); | |
10463 | out_sec = exidx_sec->output_section; | |
10464 | /* Adjust size of output section. */ | |
10465 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); | |
10466 | } | |
10467 | ||
10468 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
10469 | static void | |
10470 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) | |
10471 | { | |
10472 | struct _arm_elf_section_data *exidx_arm_data; | |
10473 | ||
10474 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
10475 | add_unwind_table_edit ( | |
10476 | &exidx_arm_data->u.exidx.unwind_edit_list, | |
10477 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
10478 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
10479 | ||
10480 | adjust_exidx_size(exidx_sec, 8); | |
10481 | } | |
10482 | ||
10483 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
10484 | made to those tables, such that: | |
10485 | ||
10486 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. | |
10487 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
10488 | codes which have been inlined into the index). | |
10489 | ||
85fdf906 AH |
10490 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
10491 | ||
2468f9c9 PB |
10492 | The edits are applied when the tables are written |
10493 | (in elf32_arm_write_section). | |
10494 | */ | |
10495 | ||
10496 | bfd_boolean | |
10497 | elf32_arm_fix_exidx_coverage (asection **text_section_order, | |
10498 | unsigned int num_text_sections, | |
85fdf906 AH |
10499 | struct bfd_link_info *info, |
10500 | bfd_boolean merge_exidx_entries) | |
2468f9c9 PB |
10501 | { |
10502 | bfd *inp; | |
10503 | unsigned int last_second_word = 0, i; | |
10504 | asection *last_exidx_sec = NULL; | |
10505 | asection *last_text_sec = NULL; | |
10506 | int last_unwind_type = -1; | |
10507 | ||
10508 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
10509 | text sections. */ | |
10510 | for (inp = info->input_bfds; inp != NULL; inp = inp->link_next) | |
10511 | { | |
10512 | asection *sec; | |
10513 | ||
10514 | for (sec = inp->sections; sec != NULL; sec = sec->next) | |
10515 | { | |
10516 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); | |
10517 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
10518 | ||
dec9d5df | 10519 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 PB |
10520 | continue; |
10521 | ||
10522 | if (elf_sec->linked_to) | |
10523 | { | |
10524 | Elf_Internal_Shdr *linked_hdr | |
10525 | = &elf_section_data (elf_sec->linked_to)->this_hdr; | |
10526 | struct _arm_elf_section_data *linked_sec_arm_data | |
10527 | = get_arm_elf_section_data (linked_hdr->bfd_section); | |
10528 | ||
10529 | if (linked_sec_arm_data == NULL) | |
10530 | continue; | |
10531 | ||
10532 | /* Link this .ARM.exidx section back from the text section it | |
10533 | describes. */ | |
10534 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; | |
10535 | } | |
10536 | } | |
10537 | } | |
10538 | ||
10539 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
10540 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 10541 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
10542 | |
10543 | for (i = 0; i < num_text_sections; i++) | |
10544 | { | |
10545 | asection *sec = text_section_order[i]; | |
10546 | asection *exidx_sec; | |
10547 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
10548 | struct _arm_elf_section_data *exidx_arm_data; | |
10549 | bfd_byte *contents = NULL; | |
10550 | int deleted_exidx_bytes = 0; | |
10551 | bfd_vma j; | |
10552 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
10553 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
10554 | Elf_Internal_Shdr *hdr; | |
10555 | bfd *ibfd; | |
10556 | ||
10557 | if (arm_data == NULL) | |
10558 | continue; | |
10559 | ||
10560 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
10561 | if (exidx_sec == NULL) | |
10562 | { | |
10563 | /* Section has no unwind data. */ | |
10564 | if (last_unwind_type == 0 || !last_exidx_sec) | |
10565 | continue; | |
10566 | ||
10567 | /* Ignore zero sized sections. */ | |
10568 | if (sec->size == 0) | |
10569 | continue; | |
10570 | ||
10571 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
10572 | last_unwind_type = 0; | |
10573 | continue; | |
10574 | } | |
10575 | ||
22a8f80e PB |
10576 | /* Skip /DISCARD/ sections. */ |
10577 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
10578 | continue; | |
10579 | ||
2468f9c9 PB |
10580 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
10581 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
10582 | continue; | |
10583 | ||
10584 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
10585 | if (exidx_arm_data == NULL) | |
10586 | continue; | |
10587 | ||
10588 | ibfd = exidx_sec->owner; | |
10589 | ||
10590 | if (hdr->contents != NULL) | |
10591 | contents = hdr->contents; | |
10592 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
10593 | /* An error? */ | |
10594 | continue; | |
10595 | ||
10596 | for (j = 0; j < hdr->sh_size; j += 8) | |
10597 | { | |
10598 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
10599 | int unwind_type; | |
10600 | int elide = 0; | |
10601 | ||
10602 | /* An EXIDX_CANTUNWIND entry. */ | |
10603 | if (second_word == 1) | |
10604 | { | |
10605 | if (last_unwind_type == 0) | |
10606 | elide = 1; | |
10607 | unwind_type = 0; | |
10608 | } | |
10609 | /* Inlined unwinding data. Merge if equal to previous. */ | |
10610 | else if ((second_word & 0x80000000) != 0) | |
10611 | { | |
85fdf906 AH |
10612 | if (merge_exidx_entries |
10613 | && last_second_word == second_word && last_unwind_type == 1) | |
2468f9c9 PB |
10614 | elide = 1; |
10615 | unwind_type = 1; | |
10616 | last_second_word = second_word; | |
10617 | } | |
10618 | /* Normal table entry. In theory we could merge these too, | |
10619 | but duplicate entries are likely to be much less common. */ | |
10620 | else | |
10621 | unwind_type = 2; | |
10622 | ||
10623 | if (elide) | |
10624 | { | |
10625 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
10626 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
10627 | ||
10628 | deleted_exidx_bytes += 8; | |
10629 | } | |
10630 | ||
10631 | last_unwind_type = unwind_type; | |
10632 | } | |
10633 | ||
10634 | /* Free contents if we allocated it ourselves. */ | |
10635 | if (contents != hdr->contents) | |
10636 | free (contents); | |
10637 | ||
10638 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
10639 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
10640 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
10641 | ||
10642 | if (deleted_exidx_bytes > 0) | |
10643 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); | |
10644 | ||
10645 | last_exidx_sec = exidx_sec; | |
10646 | last_text_sec = sec; | |
10647 | } | |
10648 | ||
10649 | /* Add terminating CANTUNWIND entry. */ | |
10650 | if (last_exidx_sec && last_unwind_type != 0) | |
10651 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
10652 | ||
10653 | return TRUE; | |
10654 | } | |
10655 | ||
3e6b1042 DJ |
10656 | static bfd_boolean |
10657 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, | |
10658 | bfd *ibfd, const char *name) | |
10659 | { | |
10660 | asection *sec, *osec; | |
10661 | ||
10662 | sec = bfd_get_section_by_name (ibfd, name); | |
10663 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) | |
10664 | return TRUE; | |
10665 | ||
10666 | osec = sec->output_section; | |
10667 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
10668 | return TRUE; | |
10669 | ||
10670 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
10671 | sec->output_offset, sec->size)) | |
10672 | return FALSE; | |
10673 | ||
10674 | return TRUE; | |
10675 | } | |
10676 | ||
10677 | static bfd_boolean | |
10678 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) | |
10679 | { | |
10680 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
fe33d2fa | 10681 | asection *sec, *osec; |
3e6b1042 | 10682 | |
4dfe6ac6 NC |
10683 | if (globals == NULL) |
10684 | return FALSE; | |
10685 | ||
3e6b1042 DJ |
10686 | /* Invoke the regular ELF backend linker to do all the work. */ |
10687 | if (!bfd_elf_final_link (abfd, info)) | |
10688 | return FALSE; | |
10689 | ||
fe33d2fa CL |
10690 | /* Process stub sections (eg BE8 encoding, ...). */ |
10691 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
10692 | int i; | |
cdb21a0a NS |
10693 | for (i=0; i<htab->top_id; i++) |
10694 | { | |
10695 | sec = htab->stub_group[i].stub_sec; | |
10696 | /* Only process it once, in its link_sec slot. */ | |
10697 | if (sec && i == htab->stub_group[i].link_sec->id) | |
10698 | { | |
10699 | osec = sec->output_section; | |
10700 | elf32_arm_write_section (abfd, info, sec, sec->contents); | |
10701 | if (! bfd_set_section_contents (abfd, osec, sec->contents, | |
10702 | sec->output_offset, sec->size)) | |
10703 | return FALSE; | |
10704 | } | |
fe33d2fa | 10705 | } |
fe33d2fa | 10706 | |
3e6b1042 DJ |
10707 | /* Write out any glue sections now that we have created all the |
10708 | stubs. */ | |
10709 | if (globals->bfd_of_glue_owner != NULL) | |
10710 | { | |
10711 | if (! elf32_arm_output_glue_section (info, abfd, | |
10712 | globals->bfd_of_glue_owner, | |
10713 | ARM2THUMB_GLUE_SECTION_NAME)) | |
10714 | return FALSE; | |
10715 | ||
10716 | if (! elf32_arm_output_glue_section (info, abfd, | |
10717 | globals->bfd_of_glue_owner, | |
10718 | THUMB2ARM_GLUE_SECTION_NAME)) | |
10719 | return FALSE; | |
10720 | ||
10721 | if (! elf32_arm_output_glue_section (info, abfd, | |
10722 | globals->bfd_of_glue_owner, | |
10723 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
10724 | return FALSE; | |
10725 | ||
10726 | if (! elf32_arm_output_glue_section (info, abfd, | |
10727 | globals->bfd_of_glue_owner, | |
10728 | ARM_BX_GLUE_SECTION_NAME)) | |
10729 | return FALSE; | |
10730 | } | |
10731 | ||
10732 | return TRUE; | |
10733 | } | |
10734 | ||
c178919b NC |
10735 | /* Set the right machine number. */ |
10736 | ||
10737 | static bfd_boolean | |
57e8b36a | 10738 | elf32_arm_object_p (bfd *abfd) |
c178919b | 10739 | { |
5a6c6817 | 10740 | unsigned int mach; |
57e8b36a | 10741 | |
5a6c6817 | 10742 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 10743 | |
5a6c6817 NC |
10744 | if (mach != bfd_mach_arm_unknown) |
10745 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); | |
10746 | ||
10747 | else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
10748 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312); | |
e16bb312 | 10749 | |
e16bb312 | 10750 | else |
5a6c6817 | 10751 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
c178919b NC |
10752 | |
10753 | return TRUE; | |
10754 | } | |
10755 | ||
fc830a83 | 10756 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 10757 | |
b34976b6 | 10758 | static bfd_boolean |
57e8b36a | 10759 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
10760 | { |
10761 | if (elf_flags_init (abfd) | |
10762 | && elf_elfheader (abfd)->e_flags != flags) | |
10763 | { | |
fc830a83 NC |
10764 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
10765 | { | |
fd2ec330 | 10766 | if (flags & EF_ARM_INTERWORK) |
d003868e AM |
10767 | (*_bfd_error_handler) |
10768 | (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), | |
10769 | abfd); | |
fc830a83 | 10770 | else |
d003868e AM |
10771 | _bfd_error_handler |
10772 | (_("Warning: Clearing the interworking flag of %B due to outside request"), | |
10773 | abfd); | |
fc830a83 | 10774 | } |
252b5132 RH |
10775 | } |
10776 | else | |
10777 | { | |
10778 | elf_elfheader (abfd)->e_flags = flags; | |
b34976b6 | 10779 | elf_flags_init (abfd) = TRUE; |
252b5132 RH |
10780 | } |
10781 | ||
b34976b6 | 10782 | return TRUE; |
252b5132 RH |
10783 | } |
10784 | ||
fc830a83 | 10785 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 10786 | |
b34976b6 | 10787 | static bfd_boolean |
57e8b36a | 10788 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
10789 | { |
10790 | flagword in_flags; | |
10791 | flagword out_flags; | |
10792 | ||
0ffa91dd | 10793 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
b34976b6 | 10794 | return TRUE; |
252b5132 | 10795 | |
fc830a83 | 10796 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
10797 | out_flags = elf_elfheader (obfd)->e_flags; |
10798 | ||
fc830a83 NC |
10799 | if (elf_flags_init (obfd) |
10800 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
10801 | && in_flags != out_flags) | |
252b5132 | 10802 | { |
252b5132 | 10803 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 10804 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
b34976b6 | 10805 | return FALSE; |
252b5132 RH |
10806 | |
10807 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 10808 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
b34976b6 | 10809 | return FALSE; |
252b5132 RH |
10810 | |
10811 | /* If the src and dest have different interworking flags | |
10812 | then turn off the interworking bit. */ | |
fd2ec330 | 10813 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 10814 | { |
fd2ec330 | 10815 | if (out_flags & EF_ARM_INTERWORK) |
d003868e AM |
10816 | _bfd_error_handler |
10817 | (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), | |
10818 | obfd, ibfd); | |
252b5132 | 10819 | |
fd2ec330 | 10820 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 10821 | } |
1006ba19 PB |
10822 | |
10823 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
10824 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
10825 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
10826 | } |
10827 | ||
10828 | elf_elfheader (obfd)->e_flags = in_flags; | |
b34976b6 | 10829 | elf_flags_init (obfd) = TRUE; |
252b5132 | 10830 | |
94a3258f PB |
10831 | /* Also copy the EI_OSABI field. */ |
10832 | elf_elfheader (obfd)->e_ident[EI_OSABI] = | |
10833 | elf_elfheader (ibfd)->e_ident[EI_OSABI]; | |
10834 | ||
104d59d1 JM |
10835 | /* Copy object attributes. */ |
10836 | _bfd_elf_copy_obj_attributes (ibfd, obfd); | |
ee065d83 PB |
10837 | |
10838 | return TRUE; | |
10839 | } | |
10840 | ||
10841 | /* Values for Tag_ABI_PCS_R9_use. */ | |
10842 | enum | |
10843 | { | |
10844 | AEABI_R9_V6, | |
10845 | AEABI_R9_SB, | |
10846 | AEABI_R9_TLS, | |
10847 | AEABI_R9_unused | |
10848 | }; | |
10849 | ||
10850 | /* Values for Tag_ABI_PCS_RW_data. */ | |
10851 | enum | |
10852 | { | |
10853 | AEABI_PCS_RW_data_absolute, | |
10854 | AEABI_PCS_RW_data_PCrel, | |
10855 | AEABI_PCS_RW_data_SBrel, | |
10856 | AEABI_PCS_RW_data_unused | |
10857 | }; | |
10858 | ||
10859 | /* Values for Tag_ABI_enum_size. */ | |
10860 | enum | |
10861 | { | |
10862 | AEABI_enum_unused, | |
10863 | AEABI_enum_short, | |
10864 | AEABI_enum_wide, | |
10865 | AEABI_enum_forced_wide | |
10866 | }; | |
10867 | ||
104d59d1 JM |
10868 | /* Determine whether an object attribute tag takes an integer, a |
10869 | string or both. */ | |
906e58ca | 10870 | |
104d59d1 JM |
10871 | static int |
10872 | elf32_arm_obj_attrs_arg_type (int tag) | |
10873 | { | |
10874 | if (tag == Tag_compatibility) | |
3483fe2e | 10875 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 10876 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
10877 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
10878 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
10879 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 10880 | else if (tag < 32) |
3483fe2e | 10881 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 10882 | else |
3483fe2e | 10883 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
10884 | } |
10885 | ||
5aa6ff7c AS |
10886 | /* The ABI defines that Tag_conformance should be emitted first, and that |
10887 | Tag_nodefaults should be second (if either is defined). This sets those | |
10888 | two positions, and bumps up the position of all the remaining tags to | |
10889 | compensate. */ | |
10890 | static int | |
10891 | elf32_arm_obj_attrs_order (int num) | |
10892 | { | |
3de4a297 | 10893 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
5aa6ff7c | 10894 | return Tag_conformance; |
3de4a297 | 10895 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
5aa6ff7c AS |
10896 | return Tag_nodefaults; |
10897 | if ((num - 2) < Tag_nodefaults) | |
10898 | return num - 2; | |
10899 | if ((num - 1) < Tag_conformance) | |
10900 | return num - 1; | |
10901 | return num; | |
10902 | } | |
10903 | ||
e8b36cd1 JM |
10904 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
10905 | static bfd_boolean | |
10906 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) | |
10907 | { | |
10908 | if ((tag & 127) < 64) | |
10909 | { | |
10910 | _bfd_error_handler | |
10911 | (_("%B: Unknown mandatory EABI object attribute %d"), | |
10912 | abfd, tag); | |
10913 | bfd_set_error (bfd_error_bad_value); | |
10914 | return FALSE; | |
10915 | } | |
10916 | else | |
10917 | { | |
10918 | _bfd_error_handler | |
10919 | (_("Warning: %B: Unknown EABI object attribute %d"), | |
10920 | abfd, tag); | |
10921 | return TRUE; | |
10922 | } | |
10923 | } | |
10924 | ||
91e22acd AS |
10925 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
10926 | Returns -1 if no architecture could be read. */ | |
10927 | ||
10928 | static int | |
10929 | get_secondary_compatible_arch (bfd *abfd) | |
10930 | { | |
10931 | obj_attribute *attr = | |
10932 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
10933 | ||
10934 | /* Note: the tag and its argument below are uleb128 values, though | |
10935 | currently-defined values fit in one byte for each. */ | |
10936 | if (attr->s | |
10937 | && attr->s[0] == Tag_CPU_arch | |
10938 | && (attr->s[1] & 128) != 128 | |
10939 | && attr->s[2] == 0) | |
10940 | return attr->s[1]; | |
10941 | ||
10942 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
10943 | return -1; | |
10944 | } | |
10945 | ||
10946 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
10947 | The tag is removed if ARCH is -1. */ | |
10948 | ||
8e79c3df | 10949 | static void |
91e22acd | 10950 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 10951 | { |
91e22acd AS |
10952 | obj_attribute *attr = |
10953 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 10954 | |
91e22acd AS |
10955 | if (arch == -1) |
10956 | { | |
10957 | attr->s = NULL; | |
10958 | return; | |
8e79c3df | 10959 | } |
91e22acd AS |
10960 | |
10961 | /* Note: the tag and its argument below are uleb128 values, though | |
10962 | currently-defined values fit in one byte for each. */ | |
10963 | if (!attr->s) | |
21d799b5 | 10964 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
10965 | attr->s[0] = Tag_CPU_arch; |
10966 | attr->s[1] = arch; | |
10967 | attr->s[2] = '\0'; | |
8e79c3df CM |
10968 | } |
10969 | ||
91e22acd AS |
10970 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
10971 | into account. */ | |
10972 | ||
10973 | static int | |
10974 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
10975 | int newtag, int secondary_compat) | |
8e79c3df | 10976 | { |
91e22acd AS |
10977 | #define T(X) TAG_CPU_ARCH_##X |
10978 | int tagl, tagh, result; | |
10979 | const int v6t2[] = | |
10980 | { | |
10981 | T(V6T2), /* PRE_V4. */ | |
10982 | T(V6T2), /* V4. */ | |
10983 | T(V6T2), /* V4T. */ | |
10984 | T(V6T2), /* V5T. */ | |
10985 | T(V6T2), /* V5TE. */ | |
10986 | T(V6T2), /* V5TEJ. */ | |
10987 | T(V6T2), /* V6. */ | |
10988 | T(V7), /* V6KZ. */ | |
10989 | T(V6T2) /* V6T2. */ | |
10990 | }; | |
10991 | const int v6k[] = | |
10992 | { | |
10993 | T(V6K), /* PRE_V4. */ | |
10994 | T(V6K), /* V4. */ | |
10995 | T(V6K), /* V4T. */ | |
10996 | T(V6K), /* V5T. */ | |
10997 | T(V6K), /* V5TE. */ | |
10998 | T(V6K), /* V5TEJ. */ | |
10999 | T(V6K), /* V6. */ | |
11000 | T(V6KZ), /* V6KZ. */ | |
11001 | T(V7), /* V6T2. */ | |
11002 | T(V6K) /* V6K. */ | |
11003 | }; | |
11004 | const int v7[] = | |
11005 | { | |
11006 | T(V7), /* PRE_V4. */ | |
11007 | T(V7), /* V4. */ | |
11008 | T(V7), /* V4T. */ | |
11009 | T(V7), /* V5T. */ | |
11010 | T(V7), /* V5TE. */ | |
11011 | T(V7), /* V5TEJ. */ | |
11012 | T(V7), /* V6. */ | |
11013 | T(V7), /* V6KZ. */ | |
11014 | T(V7), /* V6T2. */ | |
11015 | T(V7), /* V6K. */ | |
11016 | T(V7) /* V7. */ | |
11017 | }; | |
11018 | const int v6_m[] = | |
11019 | { | |
11020 | -1, /* PRE_V4. */ | |
11021 | -1, /* V4. */ | |
11022 | T(V6K), /* V4T. */ | |
11023 | T(V6K), /* V5T. */ | |
11024 | T(V6K), /* V5TE. */ | |
11025 | T(V6K), /* V5TEJ. */ | |
11026 | T(V6K), /* V6. */ | |
11027 | T(V6KZ), /* V6KZ. */ | |
11028 | T(V7), /* V6T2. */ | |
11029 | T(V6K), /* V6K. */ | |
11030 | T(V7), /* V7. */ | |
11031 | T(V6_M) /* V6_M. */ | |
11032 | }; | |
11033 | const int v6s_m[] = | |
11034 | { | |
11035 | -1, /* PRE_V4. */ | |
11036 | -1, /* V4. */ | |
11037 | T(V6K), /* V4T. */ | |
11038 | T(V6K), /* V5T. */ | |
11039 | T(V6K), /* V5TE. */ | |
11040 | T(V6K), /* V5TEJ. */ | |
11041 | T(V6K), /* V6. */ | |
11042 | T(V6KZ), /* V6KZ. */ | |
11043 | T(V7), /* V6T2. */ | |
11044 | T(V6K), /* V6K. */ | |
11045 | T(V7), /* V7. */ | |
11046 | T(V6S_M), /* V6_M. */ | |
11047 | T(V6S_M) /* V6S_M. */ | |
11048 | }; | |
9e3c6df6 PB |
11049 | const int v7e_m[] = |
11050 | { | |
11051 | -1, /* PRE_V4. */ | |
11052 | -1, /* V4. */ | |
11053 | T(V7E_M), /* V4T. */ | |
11054 | T(V7E_M), /* V5T. */ | |
11055 | T(V7E_M), /* V5TE. */ | |
11056 | T(V7E_M), /* V5TEJ. */ | |
11057 | T(V7E_M), /* V6. */ | |
11058 | T(V7E_M), /* V6KZ. */ | |
11059 | T(V7E_M), /* V6T2. */ | |
11060 | T(V7E_M), /* V6K. */ | |
11061 | T(V7E_M), /* V7. */ | |
11062 | T(V7E_M), /* V6_M. */ | |
11063 | T(V7E_M), /* V6S_M. */ | |
11064 | T(V7E_M) /* V7E_M. */ | |
11065 | }; | |
91e22acd AS |
11066 | const int v4t_plus_v6_m[] = |
11067 | { | |
11068 | -1, /* PRE_V4. */ | |
11069 | -1, /* V4. */ | |
11070 | T(V4T), /* V4T. */ | |
11071 | T(V5T), /* V5T. */ | |
11072 | T(V5TE), /* V5TE. */ | |
11073 | T(V5TEJ), /* V5TEJ. */ | |
11074 | T(V6), /* V6. */ | |
11075 | T(V6KZ), /* V6KZ. */ | |
11076 | T(V6T2), /* V6T2. */ | |
11077 | T(V6K), /* V6K. */ | |
11078 | T(V7), /* V7. */ | |
11079 | T(V6_M), /* V6_M. */ | |
11080 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 11081 | T(V7E_M), /* V7E_M. */ |
91e22acd AS |
11082 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
11083 | }; | |
11084 | const int *comb[] = | |
11085 | { | |
11086 | v6t2, | |
11087 | v6k, | |
11088 | v7, | |
11089 | v6_m, | |
11090 | v6s_m, | |
9e3c6df6 | 11091 | v7e_m, |
91e22acd AS |
11092 | /* Pseudo-architecture. */ |
11093 | v4t_plus_v6_m | |
11094 | }; | |
11095 | ||
11096 | /* Check we've not got a higher architecture than we know about. */ | |
11097 | ||
9e3c6df6 | 11098 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 11099 | { |
3895f852 | 11100 | _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd); |
91e22acd AS |
11101 | return -1; |
11102 | } | |
11103 | ||
11104 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
11105 | ||
11106 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
11107 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
11108 | oldtag = T(V4T_PLUS_V6_M); | |
11109 | ||
11110 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
11111 | input. */ | |
11112 | ||
11113 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
11114 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
11115 | newtag = T(V4T_PLUS_V6_M); | |
11116 | ||
11117 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
11118 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
11119 | ||
11120 | /* Architectures before V6KZ add features monotonically. */ | |
11121 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
11122 | return result; | |
11123 | ||
11124 | result = comb[tagh - T(V6T2)][tagl]; | |
11125 | ||
11126 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
11127 | as the canonical version. */ | |
11128 | if (result == T(V4T_PLUS_V6_M)) | |
11129 | { | |
11130 | result = T(V4T); | |
11131 | *secondary_compat_out = T(V6_M); | |
11132 | } | |
11133 | else | |
11134 | *secondary_compat_out = -1; | |
11135 | ||
11136 | if (result == -1) | |
11137 | { | |
3895f852 | 11138 | _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"), |
91e22acd AS |
11139 | ibfd, oldtag, newtag); |
11140 | return -1; | |
11141 | } | |
11142 | ||
11143 | return result; | |
11144 | #undef T | |
8e79c3df CM |
11145 | } |
11146 | ||
ee065d83 PB |
11147 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
11148 | are conflicting attributes. */ | |
906e58ca | 11149 | |
ee065d83 PB |
11150 | static bfd_boolean |
11151 | elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) | |
11152 | { | |
104d59d1 JM |
11153 | obj_attribute *in_attr; |
11154 | obj_attribute *out_attr; | |
ee065d83 PB |
11155 | /* Some tags have 0 = don't care, 1 = strong requirement, |
11156 | 2 = weak requirement. */ | |
91e22acd | 11157 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 11158 | int i; |
91e22acd | 11159 | bfd_boolean result = TRUE; |
ee065d83 | 11160 | |
3e6b1042 DJ |
11161 | /* Skip the linker stubs file. This preserves previous behavior |
11162 | of accepting unknown attributes in the first input file - but | |
11163 | is that a bug? */ | |
11164 | if (ibfd->flags & BFD_LINKER_CREATED) | |
11165 | return TRUE; | |
11166 | ||
104d59d1 | 11167 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
11168 | { |
11169 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 11170 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 | 11171 | |
cd21e546 MGD |
11172 | out_attr = elf_known_obj_attributes_proc (obfd); |
11173 | ||
004ae526 PB |
11174 | /* Use the Tag_null value to indicate the attributes have been |
11175 | initialized. */ | |
cd21e546 | 11176 | out_attr[0].i = 1; |
004ae526 | 11177 | |
cd21e546 MGD |
11178 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
11179 | the attribute's value to Tag_MPextension_use. */ | |
11180 | if (out_attr[Tag_MPextension_use_legacy].i != 0) | |
11181 | { | |
11182 | if (out_attr[Tag_MPextension_use].i != 0 | |
11183 | && out_attr[Tag_MPextension_use_legacy].i | |
11184 | != out_attr[Tag_MPextension_use].i) | |
11185 | { | |
11186 | _bfd_error_handler | |
11187 | (_("Error: %B has both the current and legacy " | |
11188 | "Tag_MPextension_use attributes"), ibfd); | |
11189 | result = FALSE; | |
11190 | } | |
11191 | ||
11192 | out_attr[Tag_MPextension_use] = | |
11193 | out_attr[Tag_MPextension_use_legacy]; | |
11194 | out_attr[Tag_MPextension_use_legacy].type = 0; | |
11195 | out_attr[Tag_MPextension_use_legacy].i = 0; | |
11196 | } | |
11197 | ||
11198 | return result; | |
ee065d83 PB |
11199 | } |
11200 | ||
104d59d1 JM |
11201 | in_attr = elf_known_obj_attributes_proc (ibfd); |
11202 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
11203 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
11204 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
11205 | { | |
8e79c3df | 11206 | /* Ignore mismatches if the object doesn't use floating point. */ |
ee065d83 PB |
11207 | if (out_attr[Tag_ABI_FP_number_model].i == 0) |
11208 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; | |
11209 | else if (in_attr[Tag_ABI_FP_number_model].i != 0) | |
11210 | { | |
11211 | _bfd_error_handler | |
3895f852 | 11212 | (_("error: %B uses VFP register arguments, %B does not"), |
deddc40b NS |
11213 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
11214 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
91e22acd | 11215 | result = FALSE; |
ee065d83 PB |
11216 | } |
11217 | } | |
11218 | ||
3de4a297 | 11219 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
11220 | { |
11221 | /* Merge this attribute with existing attributes. */ | |
11222 | switch (i) | |
11223 | { | |
11224 | case Tag_CPU_raw_name: | |
11225 | case Tag_CPU_name: | |
91e22acd | 11226 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
11227 | break; |
11228 | ||
11229 | case Tag_ABI_optimization_goals: | |
11230 | case Tag_ABI_FP_optimization_goals: | |
11231 | /* Use the first value seen. */ | |
11232 | break; | |
11233 | ||
11234 | case Tag_CPU_arch: | |
91e22acd AS |
11235 | { |
11236 | int secondary_compat = -1, secondary_compat_out = -1; | |
11237 | unsigned int saved_out_attr = out_attr[i].i; | |
11238 | static const char *name_table[] = { | |
11239 | /* These aren't real CPU names, but we can't guess | |
11240 | that from the architecture version alone. */ | |
11241 | "Pre v4", | |
11242 | "ARM v4", | |
11243 | "ARM v4T", | |
11244 | "ARM v5T", | |
11245 | "ARM v5TE", | |
11246 | "ARM v5TEJ", | |
11247 | "ARM v6", | |
11248 | "ARM v6KZ", | |
11249 | "ARM v6T2", | |
11250 | "ARM v6K", | |
11251 | "ARM v7", | |
11252 | "ARM v6-M", | |
11253 | "ARM v6S-M" | |
11254 | }; | |
11255 | ||
11256 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
11257 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
11258 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
11259 | out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i, | |
11260 | &secondary_compat_out, | |
11261 | in_attr[i].i, | |
11262 | secondary_compat); | |
11263 | set_secondary_compatible_arch (obfd, secondary_compat_out); | |
11264 | ||
11265 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
11266 | if (out_attr[i].i == saved_out_attr) | |
11267 | ; /* Leave the names alone. */ | |
11268 | else if (out_attr[i].i == in_attr[i].i) | |
11269 | { | |
11270 | /* The output architecture has been changed to match the | |
11271 | input architecture. Use the input names. */ | |
11272 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
11273 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
11274 | : NULL; | |
11275 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
11276 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
11277 | : NULL; | |
11278 | } | |
11279 | else | |
11280 | { | |
11281 | out_attr[Tag_CPU_name].s = NULL; | |
11282 | out_attr[Tag_CPU_raw_name].s = NULL; | |
11283 | } | |
11284 | ||
11285 | /* If we still don't have a value for Tag_CPU_name, | |
11286 | make one up now. Tag_CPU_raw_name remains blank. */ | |
11287 | if (out_attr[Tag_CPU_name].s == NULL | |
11288 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
11289 | out_attr[Tag_CPU_name].s = | |
11290 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
11291 | } | |
11292 | break; | |
11293 | ||
ee065d83 PB |
11294 | case Tag_ARM_ISA_use: |
11295 | case Tag_THUMB_ISA_use: | |
ee065d83 | 11296 | case Tag_WMMX_arch: |
91e22acd AS |
11297 | case Tag_Advanced_SIMD_arch: |
11298 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 11299 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
11300 | case Tag_ABI_FP_exceptions: |
11301 | case Tag_ABI_FP_user_exceptions: | |
11302 | case Tag_ABI_FP_number_model: | |
75375b3e | 11303 | case Tag_FP_HP_extension: |
91e22acd AS |
11304 | case Tag_CPU_unaligned_access: |
11305 | case Tag_T2EE_use: | |
91e22acd | 11306 | case Tag_MPextension_use: |
ee065d83 PB |
11307 | /* Use the largest value specified. */ |
11308 | if (in_attr[i].i > out_attr[i].i) | |
11309 | out_attr[i].i = in_attr[i].i; | |
11310 | break; | |
11311 | ||
75375b3e | 11312 | case Tag_ABI_align_preserved: |
91e22acd AS |
11313 | case Tag_ABI_PCS_RO_data: |
11314 | /* Use the smallest value specified. */ | |
11315 | if (in_attr[i].i < out_attr[i].i) | |
11316 | out_attr[i].i = in_attr[i].i; | |
11317 | break; | |
11318 | ||
75375b3e | 11319 | case Tag_ABI_align_needed: |
91e22acd | 11320 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
75375b3e MGD |
11321 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
11322 | || out_attr[Tag_ABI_align_preserved].i == 0)) | |
ee065d83 | 11323 | { |
91e22acd AS |
11324 | /* This error message should be enabled once all non-conformant |
11325 | binaries in the toolchain have had the attributes set | |
11326 | properly. | |
ee065d83 | 11327 | _bfd_error_handler |
3895f852 | 11328 | (_("error: %B: 8-byte data alignment conflicts with %B"), |
91e22acd AS |
11329 | obfd, ibfd); |
11330 | result = FALSE; */ | |
ee065d83 | 11331 | } |
91e22acd AS |
11332 | /* Fall through. */ |
11333 | case Tag_ABI_FP_denormal: | |
11334 | case Tag_ABI_PCS_GOT_use: | |
11335 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
11336 | value if greater than 2 (for future-proofing). */ | |
11337 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
11338 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
11339 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
11340 | out_attr[i].i = in_attr[i].i; |
11341 | break; | |
91e22acd | 11342 | |
75375b3e MGD |
11343 | case Tag_Virtualization_use: |
11344 | /* The virtualization tag effectively stores two bits of | |
11345 | information: the intended use of TrustZone (in bit 0), and the | |
11346 | intended use of Virtualization (in bit 1). */ | |
11347 | if (out_attr[i].i == 0) | |
11348 | out_attr[i].i = in_attr[i].i; | |
11349 | else if (in_attr[i].i != 0 | |
11350 | && in_attr[i].i != out_attr[i].i) | |
11351 | { | |
11352 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) | |
11353 | out_attr[i].i = 3; | |
11354 | else | |
11355 | { | |
11356 | _bfd_error_handler | |
11357 | (_("error: %B: unable to merge virtualization attributes " | |
11358 | "with %B"), | |
11359 | obfd, ibfd); | |
11360 | result = FALSE; | |
11361 | } | |
11362 | } | |
11363 | break; | |
91e22acd AS |
11364 | |
11365 | case Tag_CPU_arch_profile: | |
11366 | if (out_attr[i].i != in_attr[i].i) | |
11367 | { | |
11368 | /* 0 will merge with anything. | |
11369 | 'A' and 'S' merge to 'A'. | |
11370 | 'R' and 'S' merge to 'R'. | |
11371 | 'M' and 'A|R|S' is an error. */ | |
11372 | if (out_attr[i].i == 0 | |
11373 | || (out_attr[i].i == 'S' | |
11374 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
11375 | out_attr[i].i = in_attr[i].i; | |
11376 | else if (in_attr[i].i == 0 | |
11377 | || (in_attr[i].i == 'S' | |
11378 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
11379 | ; /* Do nothing. */ | |
11380 | else | |
11381 | { | |
11382 | _bfd_error_handler | |
3895f852 | 11383 | (_("error: %B: Conflicting architecture profiles %c/%c"), |
91e22acd AS |
11384 | ibfd, |
11385 | in_attr[i].i ? in_attr[i].i : '0', | |
11386 | out_attr[i].i ? out_attr[i].i : '0'); | |
11387 | result = FALSE; | |
11388 | } | |
11389 | } | |
11390 | break; | |
75375b3e | 11391 | case Tag_FP_arch: |
62f3b8c8 | 11392 | { |
4547cb56 NC |
11393 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
11394 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch | |
11395 | when it's 0. It might mean absence of FP hardware if | |
11396 | Tag_FP_arch is zero, otherwise it is effectively SP + DP. */ | |
11397 | ||
62f3b8c8 PB |
11398 | static const struct |
11399 | { | |
11400 | int ver; | |
11401 | int regs; | |
11402 | } vfp_versions[7] = | |
11403 | { | |
11404 | {0, 0}, | |
11405 | {1, 16}, | |
11406 | {2, 16}, | |
11407 | {3, 32}, | |
11408 | {3, 16}, | |
11409 | {4, 32}, | |
11410 | {4, 16} | |
11411 | }; | |
11412 | int ver; | |
11413 | int regs; | |
11414 | int newval; | |
11415 | ||
4547cb56 NC |
11416 | /* If the output has no requirement about FP hardware, |
11417 | follow the requirement of the input. */ | |
11418 | if (out_attr[i].i == 0) | |
11419 | { | |
11420 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); | |
11421 | out_attr[i].i = in_attr[i].i; | |
11422 | out_attr[Tag_ABI_HardFP_use].i | |
11423 | = in_attr[Tag_ABI_HardFP_use].i; | |
11424 | break; | |
11425 | } | |
11426 | /* If the input has no requirement about FP hardware, do | |
11427 | nothing. */ | |
11428 | else if (in_attr[i].i == 0) | |
11429 | { | |
11430 | BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0); | |
11431 | break; | |
11432 | } | |
11433 | ||
11434 | /* Both the input and the output have nonzero Tag_FP_arch. | |
11435 | So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */ | |
11436 | ||
11437 | /* If both the input and the output have zero Tag_ABI_HardFP_use, | |
11438 | do nothing. */ | |
11439 | if (in_attr[Tag_ABI_HardFP_use].i == 0 | |
11440 | && out_attr[Tag_ABI_HardFP_use].i == 0) | |
11441 | ; | |
11442 | /* If the input and the output have different Tag_ABI_HardFP_use, | |
11443 | the combination of them is 3 (SP & DP). */ | |
11444 | else if (in_attr[Tag_ABI_HardFP_use].i | |
11445 | != out_attr[Tag_ABI_HardFP_use].i) | |
11446 | out_attr[Tag_ABI_HardFP_use].i = 3; | |
11447 | ||
11448 | /* Now we can handle Tag_FP_arch. */ | |
11449 | ||
62f3b8c8 PB |
11450 | /* Values greater than 6 aren't defined, so just pick the |
11451 | biggest */ | |
11452 | if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i) | |
11453 | { | |
11454 | out_attr[i] = in_attr[i]; | |
11455 | break; | |
11456 | } | |
11457 | /* The output uses the superset of input features | |
11458 | (ISA version) and registers. */ | |
11459 | ver = vfp_versions[in_attr[i].i].ver; | |
11460 | if (ver < vfp_versions[out_attr[i].i].ver) | |
11461 | ver = vfp_versions[out_attr[i].i].ver; | |
11462 | regs = vfp_versions[in_attr[i].i].regs; | |
11463 | if (regs < vfp_versions[out_attr[i].i].regs) | |
11464 | regs = vfp_versions[out_attr[i].i].regs; | |
11465 | /* This assumes all possible supersets are also a valid | |
11466 | options. */ | |
11467 | for (newval = 6; newval > 0; newval--) | |
11468 | { | |
11469 | if (regs == vfp_versions[newval].regs | |
11470 | && ver == vfp_versions[newval].ver) | |
11471 | break; | |
11472 | } | |
11473 | out_attr[i].i = newval; | |
11474 | } | |
b1cc4aeb | 11475 | break; |
ee065d83 PB |
11476 | case Tag_PCS_config: |
11477 | if (out_attr[i].i == 0) | |
11478 | out_attr[i].i = in_attr[i].i; | |
11479 | else if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
11480 | { | |
11481 | /* It's sometimes ok to mix different configs, so this is only | |
11482 | a warning. */ | |
11483 | _bfd_error_handler | |
11484 | (_("Warning: %B: Conflicting platform configuration"), ibfd); | |
11485 | } | |
11486 | break; | |
11487 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
11488 | if (in_attr[i].i != out_attr[i].i |
11489 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
11490 | && in_attr[i].i != AEABI_R9_unused) |
11491 | { | |
11492 | _bfd_error_handler | |
3895f852 | 11493 | (_("error: %B: Conflicting use of R9"), ibfd); |
91e22acd | 11494 | result = FALSE; |
ee065d83 PB |
11495 | } |
11496 | if (out_attr[i].i == AEABI_R9_unused) | |
11497 | out_attr[i].i = in_attr[i].i; | |
11498 | break; | |
11499 | case Tag_ABI_PCS_RW_data: | |
11500 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
11501 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
11502 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
11503 | { | |
11504 | _bfd_error_handler | |
3895f852 | 11505 | (_("error: %B: SB relative addressing conflicts with use of R9"), |
ee065d83 | 11506 | ibfd); |
91e22acd | 11507 | result = FALSE; |
ee065d83 PB |
11508 | } |
11509 | /* Use the smallest value specified. */ | |
11510 | if (in_attr[i].i < out_attr[i].i) | |
11511 | out_attr[i].i = in_attr[i].i; | |
11512 | break; | |
ee065d83 | 11513 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
11514 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
11515 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
11516 | { |
11517 | _bfd_error_handler | |
a9dc9481 JM |
11518 | (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
11519 | ibfd, in_attr[i].i, out_attr[i].i); | |
ee065d83 | 11520 | } |
a9dc9481 | 11521 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
11522 | out_attr[i].i = in_attr[i].i; |
11523 | break; | |
ee065d83 PB |
11524 | case Tag_ABI_enum_size: |
11525 | if (in_attr[i].i != AEABI_enum_unused) | |
11526 | { | |
11527 | if (out_attr[i].i == AEABI_enum_unused | |
11528 | || out_attr[i].i == AEABI_enum_forced_wide) | |
11529 | { | |
11530 | /* The existing object is compatible with anything. | |
11531 | Use whatever requirements the new object has. */ | |
11532 | out_attr[i].i = in_attr[i].i; | |
11533 | } | |
11534 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 11535 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 11536 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 11537 | { |
91e22acd | 11538 | static const char *aeabi_enum_names[] = |
bf21ed78 | 11539 | { "", "variable-size", "32-bit", "" }; |
91e22acd AS |
11540 | const char *in_name = |
11541 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
11542 | ? aeabi_enum_names[in_attr[i].i] | |
11543 | : "<unknown>"; | |
11544 | const char *out_name = | |
11545 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
11546 | ? aeabi_enum_names[out_attr[i].i] | |
11547 | : "<unknown>"; | |
ee065d83 | 11548 | _bfd_error_handler |
bf21ed78 | 11549 | (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 11550 | ibfd, in_name, out_name); |
ee065d83 PB |
11551 | } |
11552 | } | |
11553 | break; | |
11554 | case Tag_ABI_VFP_args: | |
11555 | /* Aready done. */ | |
11556 | break; | |
11557 | case Tag_ABI_WMMX_args: | |
11558 | if (in_attr[i].i != out_attr[i].i) | |
11559 | { | |
11560 | _bfd_error_handler | |
3895f852 | 11561 | (_("error: %B uses iWMMXt register arguments, %B does not"), |
ee065d83 | 11562 | ibfd, obfd); |
91e22acd | 11563 | result = FALSE; |
ee065d83 PB |
11564 | } |
11565 | break; | |
7b86a9fa AS |
11566 | case Tag_compatibility: |
11567 | /* Merged in target-independent code. */ | |
11568 | break; | |
91e22acd | 11569 | case Tag_ABI_HardFP_use: |
4547cb56 | 11570 | /* This is handled along with Tag_FP_arch. */ |
91e22acd AS |
11571 | break; |
11572 | case Tag_ABI_FP_16bit_format: | |
11573 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
11574 | { | |
11575 | if (in_attr[i].i != out_attr[i].i) | |
11576 | { | |
11577 | _bfd_error_handler | |
3895f852 | 11578 | (_("error: fp16 format mismatch between %B and %B"), |
91e22acd AS |
11579 | ibfd, obfd); |
11580 | result = FALSE; | |
11581 | } | |
11582 | } | |
11583 | if (in_attr[i].i != 0) | |
11584 | out_attr[i].i = in_attr[i].i; | |
11585 | break; | |
7b86a9fa | 11586 | |
cd21e546 MGD |
11587 | case Tag_DIV_use: |
11588 | /* This tag is set to zero if we can use UDIV and SDIV in Thumb | |
11589 | mode on a v7-M or v7-R CPU; to one if we can not use UDIV or | |
11590 | SDIV at all; and to two if we can use UDIV or SDIV on a v7-A | |
11591 | CPU. We will merge as follows: If the input attribute's value | |
11592 | is one then the output attribute's value remains unchanged. If | |
11593 | the input attribute's value is zero or two then if the output | |
11594 | attribute's value is one the output value is set to the input | |
11595 | value, otherwise the output value must be the same as the | |
11596 | inputs. */ | |
11597 | if (in_attr[i].i != 1 && out_attr[i].i != 1) | |
11598 | { | |
11599 | if (in_attr[i].i != out_attr[i].i) | |
11600 | { | |
11601 | _bfd_error_handler | |
11602 | (_("DIV usage mismatch between %B and %B"), | |
11603 | ibfd, obfd); | |
11604 | result = FALSE; | |
11605 | } | |
11606 | } | |
11607 | ||
11608 | if (in_attr[i].i != 1) | |
11609 | out_attr[i].i = in_attr[i].i; | |
11610 | ||
11611 | break; | |
11612 | ||
11613 | case Tag_MPextension_use_legacy: | |
11614 | /* We don't output objects with Tag_MPextension_use_legacy - we | |
11615 | move the value to Tag_MPextension_use. */ | |
11616 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) | |
11617 | { | |
11618 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) | |
11619 | { | |
11620 | _bfd_error_handler | |
11621 | (_("%B has has both the current and legacy " | |
11622 | "Tag_MPextension_use attributes"), | |
11623 | ibfd); | |
11624 | result = FALSE; | |
11625 | } | |
11626 | } | |
11627 | ||
11628 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) | |
11629 | out_attr[Tag_MPextension_use] = in_attr[i]; | |
11630 | ||
11631 | break; | |
11632 | ||
91e22acd | 11633 | case Tag_nodefaults: |
2d0bb761 AS |
11634 | /* This tag is set if it exists, but the value is unused (and is |
11635 | typically zero). We don't actually need to do anything here - | |
11636 | the merge happens automatically when the type flags are merged | |
11637 | below. */ | |
91e22acd AS |
11638 | break; |
11639 | case Tag_also_compatible_with: | |
11640 | /* Already done in Tag_CPU_arch. */ | |
11641 | break; | |
11642 | case Tag_conformance: | |
11643 | /* Keep the attribute if it matches. Throw it away otherwise. | |
11644 | No attribute means no claim to conform. */ | |
11645 | if (!in_attr[i].s || !out_attr[i].s | |
11646 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
11647 | out_attr[i].s = NULL; | |
11648 | break; | |
3cfad14c | 11649 | |
91e22acd | 11650 | default: |
e8b36cd1 JM |
11651 | result |
11652 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); | |
91e22acd AS |
11653 | } |
11654 | ||
11655 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
11656 | if (in_attr[i].type && !out_attr[i].type) | |
11657 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
11658 | } |
11659 | ||
104d59d1 | 11660 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
5488d830 MGD |
11661 | if (!_bfd_elf_merge_object_attributes (ibfd, obfd)) |
11662 | return FALSE; | |
ee065d83 | 11663 | |
104d59d1 | 11664 | /* Check for any attributes not known on ARM. */ |
e8b36cd1 | 11665 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
91e22acd | 11666 | |
91e22acd | 11667 | return result; |
252b5132 RH |
11668 | } |
11669 | ||
3a4a14e9 PB |
11670 | |
11671 | /* Return TRUE if the two EABI versions are incompatible. */ | |
11672 | ||
11673 | static bfd_boolean | |
11674 | elf32_arm_versions_compatible (unsigned iver, unsigned over) | |
11675 | { | |
11676 | /* v4 and v5 are the same spec before and after it was released, | |
11677 | so allow mixing them. */ | |
11678 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
11679 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
11680 | return TRUE; | |
11681 | ||
11682 | return (iver == over); | |
11683 | } | |
11684 | ||
252b5132 RH |
11685 | /* Merge backend specific data from an object file to the output |
11686 | object file when linking. */ | |
9b485d32 | 11687 | |
b34976b6 | 11688 | static bfd_boolean |
21d799b5 | 11689 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd); |
252b5132 | 11690 | |
9b485d32 NC |
11691 | /* Display the flags field. */ |
11692 | ||
b34976b6 | 11693 | static bfd_boolean |
57e8b36a | 11694 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 11695 | { |
fc830a83 NC |
11696 | FILE * file = (FILE *) ptr; |
11697 | unsigned long flags; | |
252b5132 RH |
11698 | |
11699 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
11700 | ||
11701 | /* Print normal ELF private data. */ | |
11702 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
11703 | ||
fc830a83 | 11704 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
11705 | /* Ignore init flag - it may not be set, despite the flags field |
11706 | containing valid data. */ | |
252b5132 RH |
11707 | |
11708 | /* xgettext:c-format */ | |
9b485d32 | 11709 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 11710 | |
fc830a83 NC |
11711 | switch (EF_ARM_EABI_VERSION (flags)) |
11712 | { | |
11713 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 11714 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
11715 | official ARM ELF extended ABI. Hence they are only decoded if |
11716 | the EABI version is not set. */ | |
fd2ec330 | 11717 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 11718 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 11719 | |
fd2ec330 | 11720 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 11721 | fprintf (file, " [APCS-26]"); |
fc830a83 | 11722 | else |
6c571f00 | 11723 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 11724 | |
96a846ea RE |
11725 | if (flags & EF_ARM_VFP_FLOAT) |
11726 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
11727 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
11728 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
11729 | else |
11730 | fprintf (file, _(" [FPA float format]")); | |
11731 | ||
fd2ec330 | 11732 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 11733 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 11734 | |
fd2ec330 | 11735 | if (flags & EF_ARM_PIC) |
9b485d32 | 11736 | fprintf (file, _(" [position independent]")); |
fc830a83 | 11737 | |
fd2ec330 | 11738 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 11739 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 11740 | |
fd2ec330 | 11741 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 11742 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 11743 | |
fd2ec330 | 11744 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 11745 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 11746 | |
96a846ea RE |
11747 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
11748 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
11749 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
11750 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 11751 | break; |
9a5aca8c | 11752 | |
fc830a83 | 11753 | case EF_ARM_EABI_VER1: |
9b485d32 | 11754 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 11755 | |
fc830a83 | 11756 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 11757 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 11758 | else |
9b485d32 | 11759 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 11760 | |
fc830a83 NC |
11761 | flags &= ~ EF_ARM_SYMSARESORTED; |
11762 | break; | |
9a5aca8c | 11763 | |
fd2ec330 PB |
11764 | case EF_ARM_EABI_VER2: |
11765 | fprintf (file, _(" [Version2 EABI]")); | |
11766 | ||
11767 | if (flags & EF_ARM_SYMSARESORTED) | |
11768 | fprintf (file, _(" [sorted symbol table]")); | |
11769 | else | |
11770 | fprintf (file, _(" [unsorted symbol table]")); | |
11771 | ||
11772 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
11773 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
11774 | ||
11775 | if (flags & EF_ARM_MAPSYMSFIRST) | |
11776 | fprintf (file, _(" [mapping symbols precede others]")); | |
11777 | ||
99e4ae17 | 11778 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
11779 | | EF_ARM_MAPSYMSFIRST); |
11780 | break; | |
11781 | ||
d507cf36 PB |
11782 | case EF_ARM_EABI_VER3: |
11783 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
11784 | break; |
11785 | ||
11786 | case EF_ARM_EABI_VER4: | |
11787 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 11788 | goto eabi; |
d507cf36 | 11789 | |
3a4a14e9 PB |
11790 | case EF_ARM_EABI_VER5: |
11791 | fprintf (file, _(" [Version5 EABI]")); | |
11792 | eabi: | |
d507cf36 PB |
11793 | if (flags & EF_ARM_BE8) |
11794 | fprintf (file, _(" [BE8]")); | |
11795 | ||
11796 | if (flags & EF_ARM_LE8) | |
11797 | fprintf (file, _(" [LE8]")); | |
11798 | ||
11799 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
11800 | break; | |
11801 | ||
fc830a83 | 11802 | default: |
9b485d32 | 11803 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
11804 | break; |
11805 | } | |
252b5132 | 11806 | |
fc830a83 | 11807 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 11808 | |
fc830a83 | 11809 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 11810 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 11811 | |
fc830a83 | 11812 | if (flags & EF_ARM_HASENTRY) |
9b485d32 | 11813 | fprintf (file, _(" [has entry point]")); |
252b5132 | 11814 | |
fc830a83 NC |
11815 | flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY); |
11816 | ||
11817 | if (flags) | |
9b485d32 | 11818 | fprintf (file, _("<Unrecognised flag bits set>")); |
9a5aca8c | 11819 | |
252b5132 RH |
11820 | fputc ('\n', file); |
11821 | ||
b34976b6 | 11822 | return TRUE; |
252b5132 RH |
11823 | } |
11824 | ||
11825 | static int | |
57e8b36a | 11826 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 11827 | { |
2f0ca46a NC |
11828 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
11829 | { | |
11830 | case STT_ARM_TFUNC: | |
11831 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 11832 | |
2f0ca46a NC |
11833 | case STT_ARM_16BIT: |
11834 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
11835 | This allows us to distinguish between data used by Thumb instructions | |
11836 | and non-data (which is probably code) inside Thumb regions of an | |
11837 | executable. */ | |
1a0eb693 | 11838 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
11839 | return ELF_ST_TYPE (elf_sym->st_info); |
11840 | break; | |
9a5aca8c | 11841 | |
ce855c42 NC |
11842 | default: |
11843 | break; | |
2f0ca46a NC |
11844 | } |
11845 | ||
11846 | return type; | |
252b5132 | 11847 | } |
f21f3fe0 | 11848 | |
252b5132 | 11849 | static asection * |
07adf181 AM |
11850 | elf32_arm_gc_mark_hook (asection *sec, |
11851 | struct bfd_link_info *info, | |
11852 | Elf_Internal_Rela *rel, | |
11853 | struct elf_link_hash_entry *h, | |
11854 | Elf_Internal_Sym *sym) | |
252b5132 RH |
11855 | { |
11856 | if (h != NULL) | |
07adf181 | 11857 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
11858 | { |
11859 | case R_ARM_GNU_VTINHERIT: | |
11860 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
11861 | return NULL; |
11862 | } | |
9ad5cbcf | 11863 | |
07adf181 | 11864 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
11865 | } |
11866 | ||
780a67af NC |
11867 | /* Update the got entry reference counts for the section being removed. */ |
11868 | ||
b34976b6 | 11869 | static bfd_boolean |
ba93b8ac DJ |
11870 | elf32_arm_gc_sweep_hook (bfd * abfd, |
11871 | struct bfd_link_info * info, | |
11872 | asection * sec, | |
11873 | const Elf_Internal_Rela * relocs) | |
252b5132 | 11874 | { |
5e681ec4 PB |
11875 | Elf_Internal_Shdr *symtab_hdr; |
11876 | struct elf_link_hash_entry **sym_hashes; | |
11877 | bfd_signed_vma *local_got_refcounts; | |
11878 | const Elf_Internal_Rela *rel, *relend; | |
eb043451 PB |
11879 | struct elf32_arm_link_hash_table * globals; |
11880 | ||
7dda2462 TG |
11881 | if (info->relocatable) |
11882 | return TRUE; | |
11883 | ||
eb043451 | 11884 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
11885 | if (globals == NULL) |
11886 | return FALSE; | |
5e681ec4 PB |
11887 | |
11888 | elf_section_data (sec)->local_dynrel = NULL; | |
11889 | ||
0ffa91dd | 11890 | symtab_hdr = & elf_symtab_hdr (abfd); |
5e681ec4 PB |
11891 | sym_hashes = elf_sym_hashes (abfd); |
11892 | local_got_refcounts = elf_local_got_refcounts (abfd); | |
11893 | ||
906e58ca | 11894 | check_use_blx (globals); |
bd97cb95 | 11895 | |
5e681ec4 PB |
11896 | relend = relocs + sec->reloc_count; |
11897 | for (rel = relocs; rel < relend; rel++) | |
eb043451 | 11898 | { |
3eb128b2 AM |
11899 | unsigned long r_symndx; |
11900 | struct elf_link_hash_entry *h = NULL; | |
f6e32f6d | 11901 | struct elf32_arm_link_hash_entry *eh; |
eb043451 | 11902 | int r_type; |
34e77a92 | 11903 | bfd_boolean call_reloc_p; |
f6e32f6d RS |
11904 | bfd_boolean may_become_dynamic_p; |
11905 | bfd_boolean may_need_local_target_p; | |
34e77a92 RS |
11906 | union gotplt_union *root_plt; |
11907 | struct arm_plt_info *arm_plt; | |
5e681ec4 | 11908 | |
3eb128b2 AM |
11909 | r_symndx = ELF32_R_SYM (rel->r_info); |
11910 | if (r_symndx >= symtab_hdr->sh_info) | |
11911 | { | |
11912 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
11913 | while (h->root.type == bfd_link_hash_indirect | |
11914 | || h->root.type == bfd_link_hash_warning) | |
11915 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
11916 | } | |
f6e32f6d RS |
11917 | eh = (struct elf32_arm_link_hash_entry *) h; |
11918 | ||
34e77a92 | 11919 | call_reloc_p = FALSE; |
f6e32f6d RS |
11920 | may_become_dynamic_p = FALSE; |
11921 | may_need_local_target_p = FALSE; | |
3eb128b2 | 11922 | |
eb043451 | 11923 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 11924 | r_type = arm_real_reloc_type (globals, r_type); |
eb043451 PB |
11925 | switch (r_type) |
11926 | { | |
11927 | case R_ARM_GOT32: | |
eb043451 | 11928 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
11929 | case R_ARM_TLS_GD32: |
11930 | case R_ARM_TLS_IE32: | |
3eb128b2 | 11931 | if (h != NULL) |
eb043451 | 11932 | { |
eb043451 PB |
11933 | if (h->got.refcount > 0) |
11934 | h->got.refcount -= 1; | |
11935 | } | |
11936 | else if (local_got_refcounts != NULL) | |
11937 | { | |
11938 | if (local_got_refcounts[r_symndx] > 0) | |
11939 | local_got_refcounts[r_symndx] -= 1; | |
11940 | } | |
11941 | break; | |
11942 | ||
ba93b8ac | 11943 | case R_ARM_TLS_LDM32: |
4dfe6ac6 | 11944 | globals->tls_ldm_got.refcount -= 1; |
ba93b8ac DJ |
11945 | break; |
11946 | ||
eb043451 PB |
11947 | case R_ARM_PC24: |
11948 | case R_ARM_PLT32: | |
5b5bb741 PB |
11949 | case R_ARM_CALL: |
11950 | case R_ARM_JUMP24: | |
eb043451 | 11951 | case R_ARM_PREL31: |
c19d1205 | 11952 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
11953 | case R_ARM_THM_JUMP24: |
11954 | case R_ARM_THM_JUMP19: | |
34e77a92 | 11955 | call_reloc_p = TRUE; |
f6e32f6d RS |
11956 | may_need_local_target_p = TRUE; |
11957 | break; | |
11958 | ||
11959 | case R_ARM_ABS12: | |
11960 | if (!globals->vxworks_p) | |
11961 | { | |
11962 | may_need_local_target_p = TRUE; | |
11963 | break; | |
11964 | } | |
11965 | /* Fall through. */ | |
11966 | case R_ARM_ABS32: | |
11967 | case R_ARM_ABS32_NOI: | |
11968 | case R_ARM_REL32: | |
11969 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
11970 | case R_ARM_MOVW_ABS_NC: |
11971 | case R_ARM_MOVT_ABS: | |
11972 | case R_ARM_MOVW_PREL_NC: | |
11973 | case R_ARM_MOVT_PREL: | |
11974 | case R_ARM_THM_MOVW_ABS_NC: | |
11975 | case R_ARM_THM_MOVT_ABS: | |
11976 | case R_ARM_THM_MOVW_PREL_NC: | |
11977 | case R_ARM_THM_MOVT_PREL: | |
b7693d02 | 11978 | /* Should the interworking branches be here also? */ |
f6e32f6d | 11979 | if ((info->shared || globals->root.is_relocatable_executable) |
34e77a92 RS |
11980 | && (sec->flags & SEC_ALLOC) != 0) |
11981 | { | |
11982 | if (h == NULL | |
11983 | && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)) | |
11984 | { | |
11985 | call_reloc_p = TRUE; | |
11986 | may_need_local_target_p = TRUE; | |
11987 | } | |
11988 | else | |
11989 | may_become_dynamic_p = TRUE; | |
11990 | } | |
f6e32f6d RS |
11991 | else |
11992 | may_need_local_target_p = TRUE; | |
11993 | break; | |
b7693d02 | 11994 | |
f6e32f6d RS |
11995 | default: |
11996 | break; | |
11997 | } | |
5e681ec4 | 11998 | |
34e77a92 RS |
11999 | if (may_need_local_target_p |
12000 | && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt)) | |
f6e32f6d | 12001 | { |
34e77a92 RS |
12002 | BFD_ASSERT (root_plt->refcount > 0); |
12003 | root_plt->refcount -= 1; | |
12004 | ||
12005 | if (!call_reloc_p) | |
12006 | arm_plt->noncall_refcount--; | |
5e681ec4 | 12007 | |
f6e32f6d | 12008 | if (r_type == R_ARM_THM_CALL) |
34e77a92 | 12009 | arm_plt->maybe_thumb_refcount--; |
bd97cb95 | 12010 | |
f6e32f6d RS |
12011 | if (r_type == R_ARM_THM_JUMP24 |
12012 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 12013 | arm_plt->thumb_refcount--; |
f6e32f6d | 12014 | } |
5e681ec4 | 12015 | |
34e77a92 | 12016 | if (may_become_dynamic_p) |
f6e32f6d RS |
12017 | { |
12018 | struct elf_dyn_relocs **pp; | |
12019 | struct elf_dyn_relocs *p; | |
5e681ec4 | 12020 | |
34e77a92 RS |
12021 | if (h != NULL) |
12022 | pp = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; | |
12023 | else | |
12024 | { | |
12025 | Elf_Internal_Sym *isym; | |
12026 | ||
12027 | isym = bfd_sym_from_r_symndx (&globals->sym_cache, | |
12028 | abfd, r_symndx); | |
12029 | if (isym == NULL) | |
12030 | return FALSE; | |
12031 | pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); | |
12032 | if (pp == NULL) | |
12033 | return FALSE; | |
12034 | } | |
f6e32f6d RS |
12035 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next) |
12036 | if (p->sec == sec) | |
12037 | { | |
12038 | /* Everything must go for SEC. */ | |
12039 | *pp = p->next; | |
12040 | break; | |
12041 | } | |
eb043451 PB |
12042 | } |
12043 | } | |
5e681ec4 | 12044 | |
b34976b6 | 12045 | return TRUE; |
252b5132 RH |
12046 | } |
12047 | ||
780a67af NC |
12048 | /* Look through the relocs for a section during the first phase. */ |
12049 | ||
b34976b6 | 12050 | static bfd_boolean |
57e8b36a NC |
12051 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
12052 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 12053 | { |
b34976b6 AM |
12054 | Elf_Internal_Shdr *symtab_hdr; |
12055 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
12056 | const Elf_Internal_Rela *rel; |
12057 | const Elf_Internal_Rela *rel_end; | |
12058 | bfd *dynobj; | |
5e681ec4 | 12059 | asection *sreloc; |
5e681ec4 | 12060 | struct elf32_arm_link_hash_table *htab; |
f6e32f6d RS |
12061 | bfd_boolean call_reloc_p; |
12062 | bfd_boolean may_become_dynamic_p; | |
12063 | bfd_boolean may_need_local_target_p; | |
ce98a316 | 12064 | unsigned long nsyms; |
9a5aca8c | 12065 | |
1049f94e | 12066 | if (info->relocatable) |
b34976b6 | 12067 | return TRUE; |
9a5aca8c | 12068 | |
0ffa91dd NC |
12069 | BFD_ASSERT (is_arm_elf (abfd)); |
12070 | ||
5e681ec4 | 12071 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
12072 | if (htab == NULL) |
12073 | return FALSE; | |
12074 | ||
5e681ec4 | 12075 | sreloc = NULL; |
9a5aca8c | 12076 | |
67687978 PB |
12077 | /* Create dynamic sections for relocatable executables so that we can |
12078 | copy relocations. */ | |
12079 | if (htab->root.is_relocatable_executable | |
12080 | && ! htab->root.dynamic_sections_created) | |
12081 | { | |
12082 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
12083 | return FALSE; | |
12084 | } | |
12085 | ||
cbc704f3 RS |
12086 | if (htab->root.dynobj == NULL) |
12087 | htab->root.dynobj = abfd; | |
34e77a92 RS |
12088 | if (!create_ifunc_sections (info)) |
12089 | return FALSE; | |
cbc704f3 RS |
12090 | |
12091 | dynobj = htab->root.dynobj; | |
12092 | ||
0ffa91dd | 12093 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 12094 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 NC |
12095 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
12096 | ||
252b5132 RH |
12097 | rel_end = relocs + sec->reloc_count; |
12098 | for (rel = relocs; rel < rel_end; rel++) | |
12099 | { | |
34e77a92 | 12100 | Elf_Internal_Sym *isym; |
252b5132 | 12101 | struct elf_link_hash_entry *h; |
b7693d02 | 12102 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 12103 | unsigned long r_symndx; |
eb043451 | 12104 | int r_type; |
9a5aca8c | 12105 | |
252b5132 | 12106 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 12107 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 12108 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 12109 | |
ce98a316 NC |
12110 | if (r_symndx >= nsyms |
12111 | /* PR 9934: It is possible to have relocations that do not | |
12112 | refer to symbols, thus it is also possible to have an | |
12113 | object file containing relocations but no symbol table. */ | |
cf35638d | 12114 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
ba93b8ac DJ |
12115 | { |
12116 | (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd, | |
ce98a316 | 12117 | r_symndx); |
ba93b8ac DJ |
12118 | return FALSE; |
12119 | } | |
12120 | ||
34e77a92 RS |
12121 | h = NULL; |
12122 | isym = NULL; | |
12123 | if (nsyms > 0) | |
973a3492 | 12124 | { |
34e77a92 RS |
12125 | if (r_symndx < symtab_hdr->sh_info) |
12126 | { | |
12127 | /* A local symbol. */ | |
12128 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, | |
12129 | abfd, r_symndx); | |
12130 | if (isym == NULL) | |
12131 | return FALSE; | |
12132 | } | |
12133 | else | |
12134 | { | |
12135 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
12136 | while (h->root.type == bfd_link_hash_indirect | |
12137 | || h->root.type == bfd_link_hash_warning) | |
12138 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
12139 | } | |
973a3492 | 12140 | } |
9a5aca8c | 12141 | |
b7693d02 DJ |
12142 | eh = (struct elf32_arm_link_hash_entry *) h; |
12143 | ||
f6e32f6d RS |
12144 | call_reloc_p = FALSE; |
12145 | may_become_dynamic_p = FALSE; | |
12146 | may_need_local_target_p = FALSE; | |
12147 | ||
0855e32b NS |
12148 | /* Could be done earlier, if h were already available. */ |
12149 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
eb043451 | 12150 | switch (r_type) |
252b5132 | 12151 | { |
5e681ec4 | 12152 | case R_ARM_GOT32: |
eb043451 | 12153 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
12154 | case R_ARM_TLS_GD32: |
12155 | case R_ARM_TLS_IE32: | |
0855e32b NS |
12156 | case R_ARM_TLS_GOTDESC: |
12157 | case R_ARM_TLS_DESCSEQ: | |
12158 | case R_ARM_THM_TLS_DESCSEQ: | |
12159 | case R_ARM_TLS_CALL: | |
12160 | case R_ARM_THM_TLS_CALL: | |
5e681ec4 | 12161 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
12162 | { |
12163 | int tls_type, old_tls_type; | |
5e681ec4 | 12164 | |
ba93b8ac DJ |
12165 | switch (r_type) |
12166 | { | |
12167 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
0855e32b | 12168 | |
ba93b8ac | 12169 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
0855e32b NS |
12170 | |
12171 | case R_ARM_TLS_GOTDESC: | |
12172 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: | |
12173 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: | |
12174 | tls_type = GOT_TLS_GDESC; break; | |
12175 | ||
ba93b8ac DJ |
12176 | default: tls_type = GOT_NORMAL; break; |
12177 | } | |
252b5132 | 12178 | |
ba93b8ac DJ |
12179 | if (h != NULL) |
12180 | { | |
12181 | h->got.refcount++; | |
12182 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
12183 | } | |
12184 | else | |
12185 | { | |
ba93b8ac | 12186 | /* This is a global offset table entry for a local symbol. */ |
34e77a92 RS |
12187 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
12188 | return FALSE; | |
12189 | elf_local_got_refcounts (abfd)[r_symndx] += 1; | |
ba93b8ac DJ |
12190 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
12191 | } | |
12192 | ||
0855e32b NS |
12193 | /* If a variable is accessed with both tls methods, two |
12194 | slots may be created. */ | |
12195 | if (GOT_TLS_GD_ANY_P (old_tls_type) | |
12196 | && GOT_TLS_GD_ANY_P (tls_type)) | |
12197 | tls_type |= old_tls_type; | |
12198 | ||
12199 | /* We will already have issued an error message if there | |
12200 | is a TLS/non-TLS mismatch, based on the symbol | |
12201 | type. So just combine any TLS types needed. */ | |
ba93b8ac DJ |
12202 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
12203 | && tls_type != GOT_NORMAL) | |
12204 | tls_type |= old_tls_type; | |
12205 | ||
0855e32b NS |
12206 | /* If the symbol is accessed in both IE and GDESC |
12207 | method, we're able to relax. Turn off the GDESC flag, | |
12208 | without messing up with any other kind of tls types | |
12209 | that may be involved */ | |
12210 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) | |
12211 | tls_type &= ~GOT_TLS_GDESC; | |
12212 | ||
ba93b8ac DJ |
12213 | if (old_tls_type != tls_type) |
12214 | { | |
12215 | if (h != NULL) | |
12216 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
12217 | else | |
12218 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
12219 | } | |
12220 | } | |
8029a119 | 12221 | /* Fall through. */ |
ba93b8ac DJ |
12222 | |
12223 | case R_ARM_TLS_LDM32: | |
12224 | if (r_type == R_ARM_TLS_LDM32) | |
12225 | htab->tls_ldm_got.refcount++; | |
8029a119 | 12226 | /* Fall through. */ |
252b5132 | 12227 | |
c19d1205 | 12228 | case R_ARM_GOTOFF32: |
5e681ec4 | 12229 | case R_ARM_GOTPC: |
cbc704f3 RS |
12230 | if (htab->root.sgot == NULL |
12231 | && !create_got_section (htab->root.dynobj, info)) | |
12232 | return FALSE; | |
252b5132 RH |
12233 | break; |
12234 | ||
252b5132 | 12235 | case R_ARM_PC24: |
7359ea65 | 12236 | case R_ARM_PLT32: |
5b5bb741 PB |
12237 | case R_ARM_CALL: |
12238 | case R_ARM_JUMP24: | |
eb043451 | 12239 | case R_ARM_PREL31: |
c19d1205 | 12240 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
12241 | case R_ARM_THM_JUMP24: |
12242 | case R_ARM_THM_JUMP19: | |
f6e32f6d RS |
12243 | call_reloc_p = TRUE; |
12244 | may_need_local_target_p = TRUE; | |
12245 | break; | |
12246 | ||
12247 | case R_ARM_ABS12: | |
12248 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
12249 | ldr __GOTT_INDEX__ offsets. */ | |
12250 | if (!htab->vxworks_p) | |
12251 | { | |
12252 | may_need_local_target_p = TRUE; | |
12253 | break; | |
12254 | } | |
12255 | /* Fall through. */ | |
39623e12 | 12256 | |
96c23d59 JM |
12257 | case R_ARM_MOVW_ABS_NC: |
12258 | case R_ARM_MOVT_ABS: | |
12259 | case R_ARM_THM_MOVW_ABS_NC: | |
12260 | case R_ARM_THM_MOVT_ABS: | |
12261 | if (info->shared) | |
12262 | { | |
12263 | (*_bfd_error_handler) | |
12264 | (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), | |
12265 | abfd, elf32_arm_howto_table_1[r_type].name, | |
12266 | (h) ? h->root.root.string : "a local symbol"); | |
12267 | bfd_set_error (bfd_error_bad_value); | |
12268 | return FALSE; | |
12269 | } | |
12270 | ||
12271 | /* Fall through. */ | |
39623e12 PB |
12272 | case R_ARM_ABS32: |
12273 | case R_ARM_ABS32_NOI: | |
12274 | case R_ARM_REL32: | |
12275 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
12276 | case R_ARM_MOVW_PREL_NC: |
12277 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
12278 | case R_ARM_THM_MOVW_PREL_NC: |
12279 | case R_ARM_THM_MOVT_PREL: | |
39623e12 | 12280 | |
b7693d02 | 12281 | /* Should the interworking branches be listed here? */ |
67687978 | 12282 | if ((info->shared || htab->root.is_relocatable_executable) |
34e77a92 RS |
12283 | && (sec->flags & SEC_ALLOC) != 0) |
12284 | { | |
12285 | if (h == NULL | |
12286 | && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)) | |
12287 | { | |
12288 | /* In shared libraries and relocatable executables, | |
12289 | we treat local relative references as calls; | |
12290 | see the related SYMBOL_CALLS_LOCAL code in | |
12291 | allocate_dynrelocs. */ | |
12292 | call_reloc_p = TRUE; | |
12293 | may_need_local_target_p = TRUE; | |
12294 | } | |
12295 | else | |
12296 | /* We are creating a shared library or relocatable | |
12297 | executable, and this is a reloc against a global symbol, | |
12298 | or a non-PC-relative reloc against a local symbol. | |
12299 | We may need to copy the reloc into the output. */ | |
12300 | may_become_dynamic_p = TRUE; | |
12301 | } | |
f6e32f6d RS |
12302 | else |
12303 | may_need_local_target_p = TRUE; | |
252b5132 RH |
12304 | break; |
12305 | ||
12306 | /* This relocation describes the C++ object vtable hierarchy. | |
12307 | Reconstruct it for later use during GC. */ | |
12308 | case R_ARM_GNU_VTINHERIT: | |
c152c796 | 12309 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) |
b34976b6 | 12310 | return FALSE; |
252b5132 | 12311 | break; |
9a5aca8c | 12312 | |
252b5132 RH |
12313 | /* This relocation describes which C++ vtable entries are actually |
12314 | used. Record for later use during GC. */ | |
12315 | case R_ARM_GNU_VTENTRY: | |
d17e0c6e JB |
12316 | BFD_ASSERT (h != NULL); |
12317 | if (h != NULL | |
12318 | && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
b34976b6 | 12319 | return FALSE; |
252b5132 RH |
12320 | break; |
12321 | } | |
f6e32f6d RS |
12322 | |
12323 | if (h != NULL) | |
12324 | { | |
12325 | if (call_reloc_p) | |
12326 | /* We may need a .plt entry if the function this reloc | |
12327 | refers to is in a different object, regardless of the | |
12328 | symbol's type. We can't tell for sure yet, because | |
12329 | something later might force the symbol local. */ | |
12330 | h->needs_plt = 1; | |
12331 | else if (may_need_local_target_p) | |
12332 | /* If this reloc is in a read-only section, we might | |
12333 | need a copy reloc. We can't check reliably at this | |
12334 | stage whether the section is read-only, as input | |
12335 | sections have not yet been mapped to output sections. | |
12336 | Tentatively set the flag for now, and correct in | |
12337 | adjust_dynamic_symbol. */ | |
12338 | h->non_got_ref = 1; | |
12339 | } | |
12340 | ||
34e77a92 RS |
12341 | if (may_need_local_target_p |
12342 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) | |
f6e32f6d | 12343 | { |
34e77a92 RS |
12344 | union gotplt_union *root_plt; |
12345 | struct arm_plt_info *arm_plt; | |
12346 | struct arm_local_iplt_info *local_iplt; | |
12347 | ||
12348 | if (h != NULL) | |
12349 | { | |
12350 | root_plt = &h->plt; | |
12351 | arm_plt = &eh->plt; | |
12352 | } | |
12353 | else | |
12354 | { | |
12355 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
12356 | if (local_iplt == NULL) | |
12357 | return FALSE; | |
12358 | root_plt = &local_iplt->root; | |
12359 | arm_plt = &local_iplt->arm; | |
12360 | } | |
12361 | ||
f6e32f6d RS |
12362 | /* If the symbol is a function that doesn't bind locally, |
12363 | this relocation will need a PLT entry. */ | |
34e77a92 RS |
12364 | root_plt->refcount += 1; |
12365 | ||
12366 | if (!call_reloc_p) | |
12367 | arm_plt->noncall_refcount++; | |
f6e32f6d RS |
12368 | |
12369 | /* It's too early to use htab->use_blx here, so we have to | |
12370 | record possible blx references separately from | |
12371 | relocs that definitely need a thumb stub. */ | |
12372 | ||
12373 | if (r_type == R_ARM_THM_CALL) | |
34e77a92 | 12374 | arm_plt->maybe_thumb_refcount += 1; |
f6e32f6d RS |
12375 | |
12376 | if (r_type == R_ARM_THM_JUMP24 | |
12377 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 12378 | arm_plt->thumb_refcount += 1; |
f6e32f6d RS |
12379 | } |
12380 | ||
12381 | if (may_become_dynamic_p) | |
12382 | { | |
12383 | struct elf_dyn_relocs *p, **head; | |
12384 | ||
12385 | /* Create a reloc section in dynobj. */ | |
12386 | if (sreloc == NULL) | |
12387 | { | |
12388 | sreloc = _bfd_elf_make_dynamic_reloc_section | |
12389 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
12390 | ||
12391 | if (sreloc == NULL) | |
12392 | return FALSE; | |
12393 | ||
12394 | /* BPABI objects never have dynamic relocations mapped. */ | |
12395 | if (htab->symbian_p) | |
12396 | { | |
12397 | flagword flags; | |
12398 | ||
12399 | flags = bfd_get_section_flags (dynobj, sreloc); | |
12400 | flags &= ~(SEC_LOAD | SEC_ALLOC); | |
12401 | bfd_set_section_flags (dynobj, sreloc, flags); | |
12402 | } | |
12403 | } | |
12404 | ||
12405 | /* If this is a global symbol, count the number of | |
12406 | relocations we need for this symbol. */ | |
12407 | if (h != NULL) | |
12408 | head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; | |
12409 | else | |
12410 | { | |
34e77a92 RS |
12411 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
12412 | if (head == NULL) | |
f6e32f6d | 12413 | return FALSE; |
f6e32f6d RS |
12414 | } |
12415 | ||
12416 | p = *head; | |
12417 | if (p == NULL || p->sec != sec) | |
12418 | { | |
12419 | bfd_size_type amt = sizeof *p; | |
12420 | ||
12421 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); | |
12422 | if (p == NULL) | |
12423 | return FALSE; | |
12424 | p->next = *head; | |
12425 | *head = p; | |
12426 | p->sec = sec; | |
12427 | p->count = 0; | |
12428 | p->pc_count = 0; | |
12429 | } | |
12430 | ||
12431 | if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) | |
12432 | p->pc_count += 1; | |
12433 | p->count += 1; | |
12434 | } | |
252b5132 | 12435 | } |
f21f3fe0 | 12436 | |
b34976b6 | 12437 | return TRUE; |
252b5132 RH |
12438 | } |
12439 | ||
6a5bb875 PB |
12440 | /* Unwinding tables are not referenced directly. This pass marks them as |
12441 | required if the corresponding code section is marked. */ | |
12442 | ||
12443 | static bfd_boolean | |
906e58ca NC |
12444 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
12445 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
12446 | { |
12447 | bfd *sub; | |
12448 | Elf_Internal_Shdr **elf_shdrp; | |
12449 | bfd_boolean again; | |
12450 | ||
12451 | /* Marking EH data may cause additional code sections to be marked, | |
12452 | requiring multiple passes. */ | |
12453 | again = TRUE; | |
12454 | while (again) | |
12455 | { | |
12456 | again = FALSE; | |
12457 | for (sub = info->input_bfds; sub != NULL; sub = sub->link_next) | |
12458 | { | |
12459 | asection *o; | |
12460 | ||
0ffa91dd | 12461 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
12462 | continue; |
12463 | ||
12464 | elf_shdrp = elf_elfsections (sub); | |
12465 | for (o = sub->sections; o != NULL; o = o->next) | |
12466 | { | |
12467 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 12468 | |
6a5bb875 | 12469 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
12470 | if (hdr->sh_type == SHT_ARM_EXIDX |
12471 | && hdr->sh_link | |
12472 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
12473 | && !o->gc_mark |
12474 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
12475 | { | |
12476 | again = TRUE; | |
12477 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) | |
12478 | return FALSE; | |
12479 | } | |
12480 | } | |
12481 | } | |
12482 | } | |
12483 | ||
12484 | return TRUE; | |
12485 | } | |
12486 | ||
3c9458e9 NC |
12487 | /* Treat mapping symbols as special target symbols. */ |
12488 | ||
12489 | static bfd_boolean | |
12490 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) | |
12491 | { | |
b0796911 PB |
12492 | return bfd_is_arm_special_symbol_name (sym->name, |
12493 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
12494 | } |
12495 | ||
0367ecfb NC |
12496 | /* This is a copy of elf_find_function() from elf.c except that |
12497 | ARM mapping symbols are ignored when looking for function names | |
12498 | and STT_ARM_TFUNC is considered to a function type. */ | |
252b5132 | 12499 | |
0367ecfb NC |
12500 | static bfd_boolean |
12501 | arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, | |
12502 | asection * section, | |
12503 | asymbol ** symbols, | |
12504 | bfd_vma offset, | |
12505 | const char ** filename_ptr, | |
12506 | const char ** functionname_ptr) | |
12507 | { | |
12508 | const char * filename = NULL; | |
12509 | asymbol * func = NULL; | |
12510 | bfd_vma low_func = 0; | |
12511 | asymbol ** p; | |
252b5132 RH |
12512 | |
12513 | for (p = symbols; *p != NULL; p++) | |
12514 | { | |
12515 | elf_symbol_type *q; | |
12516 | ||
12517 | q = (elf_symbol_type *) *p; | |
12518 | ||
252b5132 RH |
12519 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
12520 | { | |
12521 | default: | |
12522 | break; | |
12523 | case STT_FILE: | |
12524 | filename = bfd_asymbol_name (&q->symbol); | |
12525 | break; | |
252b5132 RH |
12526 | case STT_FUNC: |
12527 | case STT_ARM_TFUNC: | |
9d2da7ca | 12528 | case STT_NOTYPE: |
b0796911 | 12529 | /* Skip mapping symbols. */ |
0367ecfb | 12530 | if ((q->symbol.flags & BSF_LOCAL) |
b0796911 PB |
12531 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
12532 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
0367ecfb NC |
12533 | continue; |
12534 | /* Fall through. */ | |
6b40fcba | 12535 | if (bfd_get_section (&q->symbol) == section |
252b5132 RH |
12536 | && q->symbol.value >= low_func |
12537 | && q->symbol.value <= offset) | |
12538 | { | |
12539 | func = (asymbol *) q; | |
12540 | low_func = q->symbol.value; | |
12541 | } | |
12542 | break; | |
12543 | } | |
12544 | } | |
12545 | ||
12546 | if (func == NULL) | |
b34976b6 | 12547 | return FALSE; |
252b5132 | 12548 | |
0367ecfb NC |
12549 | if (filename_ptr) |
12550 | *filename_ptr = filename; | |
12551 | if (functionname_ptr) | |
12552 | *functionname_ptr = bfd_asymbol_name (func); | |
12553 | ||
12554 | return TRUE; | |
906e58ca | 12555 | } |
0367ecfb NC |
12556 | |
12557 | ||
12558 | /* Find the nearest line to a particular section and offset, for error | |
12559 | reporting. This code is a duplicate of the code in elf.c, except | |
12560 | that it uses arm_elf_find_function. */ | |
12561 | ||
12562 | static bfd_boolean | |
12563 | elf32_arm_find_nearest_line (bfd * abfd, | |
12564 | asection * section, | |
12565 | asymbol ** symbols, | |
12566 | bfd_vma offset, | |
12567 | const char ** filename_ptr, | |
12568 | const char ** functionname_ptr, | |
12569 | unsigned int * line_ptr) | |
12570 | { | |
12571 | bfd_boolean found = FALSE; | |
12572 | ||
12573 | /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */ | |
12574 | ||
12575 | if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset, | |
12576 | filename_ptr, functionname_ptr, | |
12577 | line_ptr, 0, | |
12578 | & elf_tdata (abfd)->dwarf2_find_line_info)) | |
12579 | { | |
12580 | if (!*functionname_ptr) | |
12581 | arm_elf_find_function (abfd, section, symbols, offset, | |
12582 | *filename_ptr ? NULL : filename_ptr, | |
12583 | functionname_ptr); | |
f21f3fe0 | 12584 | |
0367ecfb NC |
12585 | return TRUE; |
12586 | } | |
12587 | ||
12588 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, | |
12589 | & found, filename_ptr, | |
12590 | functionname_ptr, line_ptr, | |
12591 | & elf_tdata (abfd)->line_info)) | |
12592 | return FALSE; | |
12593 | ||
12594 | if (found && (*functionname_ptr || *line_ptr)) | |
12595 | return TRUE; | |
12596 | ||
12597 | if (symbols == NULL) | |
12598 | return FALSE; | |
12599 | ||
12600 | if (! arm_elf_find_function (abfd, section, symbols, offset, | |
12601 | filename_ptr, functionname_ptr)) | |
12602 | return FALSE; | |
12603 | ||
12604 | *line_ptr = 0; | |
b34976b6 | 12605 | return TRUE; |
252b5132 RH |
12606 | } |
12607 | ||
4ab527b0 FF |
12608 | static bfd_boolean |
12609 | elf32_arm_find_inliner_info (bfd * abfd, | |
12610 | const char ** filename_ptr, | |
12611 | const char ** functionname_ptr, | |
12612 | unsigned int * line_ptr) | |
12613 | { | |
12614 | bfd_boolean found; | |
12615 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, | |
12616 | functionname_ptr, line_ptr, | |
12617 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
12618 | return found; | |
12619 | } | |
12620 | ||
252b5132 RH |
12621 | /* Adjust a symbol defined by a dynamic object and referenced by a |
12622 | regular object. The current definition is in some section of the | |
12623 | dynamic object, but we're not including those sections. We have to | |
12624 | change the definition to something the rest of the link can | |
12625 | understand. */ | |
12626 | ||
b34976b6 | 12627 | static bfd_boolean |
57e8b36a NC |
12628 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
12629 | struct elf_link_hash_entry * h) | |
252b5132 RH |
12630 | { |
12631 | bfd * dynobj; | |
12632 | asection * s; | |
b7693d02 | 12633 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 12634 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 12635 | |
67687978 | 12636 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
12637 | if (globals == NULL) |
12638 | return FALSE; | |
12639 | ||
252b5132 RH |
12640 | dynobj = elf_hash_table (info)->dynobj; |
12641 | ||
12642 | /* Make sure we know what is going on here. */ | |
12643 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 12644 | && (h->needs_plt |
34e77a92 | 12645 | || h->type == STT_GNU_IFUNC |
f6e332e6 | 12646 | || h->u.weakdef != NULL |
f5385ebf AM |
12647 | || (h->def_dynamic |
12648 | && h->ref_regular | |
12649 | && !h->def_regular))); | |
252b5132 | 12650 | |
b7693d02 DJ |
12651 | eh = (struct elf32_arm_link_hash_entry *) h; |
12652 | ||
252b5132 RH |
12653 | /* If this is a function, put it in the procedure linkage table. We |
12654 | will fill in the contents of the procedure linkage table later, | |
12655 | when we know the address of the .got section. */ | |
34e77a92 | 12656 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
252b5132 | 12657 | { |
34e77a92 RS |
12658 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
12659 | symbol binds locally. */ | |
5e681ec4 | 12660 | if (h->plt.refcount <= 0 |
34e77a92 RS |
12661 | || (h->type != STT_GNU_IFUNC |
12662 | && (SYMBOL_CALLS_LOCAL (info, h) | |
12663 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
12664 | && h->root.type == bfd_link_hash_undefweak)))) | |
252b5132 RH |
12665 | { |
12666 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
12667 | file, but the symbol was never referred to by a dynamic |
12668 | object, or if all references were garbage collected. In | |
12669 | such a case, we don't actually need to build a procedure | |
12670 | linkage table, and we can just do a PC24 reloc instead. */ | |
12671 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
12672 | eh->plt.thumb_refcount = 0; |
12673 | eh->plt.maybe_thumb_refcount = 0; | |
12674 | eh->plt.noncall_refcount = 0; | |
f5385ebf | 12675 | h->needs_plt = 0; |
252b5132 RH |
12676 | } |
12677 | ||
b34976b6 | 12678 | return TRUE; |
252b5132 | 12679 | } |
5e681ec4 | 12680 | else |
b7693d02 DJ |
12681 | { |
12682 | /* It's possible that we incorrectly decided a .plt reloc was | |
12683 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
12684 | in check_relocs. We can't decide accurately between function | |
12685 | and non-function syms in check-relocs; Objects loaded later in | |
12686 | the link may change h->type. So fix it now. */ | |
12687 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
12688 | eh->plt.thumb_refcount = 0; |
12689 | eh->plt.maybe_thumb_refcount = 0; | |
12690 | eh->plt.noncall_refcount = 0; | |
b7693d02 | 12691 | } |
252b5132 RH |
12692 | |
12693 | /* If this is a weak symbol, and there is a real definition, the | |
12694 | processor independent code will have arranged for us to see the | |
12695 | real definition first, and we can just use the same value. */ | |
f6e332e6 | 12696 | if (h->u.weakdef != NULL) |
252b5132 | 12697 | { |
f6e332e6 AM |
12698 | BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined |
12699 | || h->u.weakdef->root.type == bfd_link_hash_defweak); | |
12700 | h->root.u.def.section = h->u.weakdef->root.u.def.section; | |
12701 | h->root.u.def.value = h->u.weakdef->root.u.def.value; | |
b34976b6 | 12702 | return TRUE; |
252b5132 RH |
12703 | } |
12704 | ||
ba93b8ac DJ |
12705 | /* If there are no non-GOT references, we do not need a copy |
12706 | relocation. */ | |
12707 | if (!h->non_got_ref) | |
12708 | return TRUE; | |
12709 | ||
252b5132 RH |
12710 | /* This is a reference to a symbol defined by a dynamic object which |
12711 | is not a function. */ | |
12712 | ||
12713 | /* If we are creating a shared library, we must presume that the | |
12714 | only references to the symbol are via the global offset table. | |
12715 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
12716 | be handled correctly by relocate_section. Relocatable executables |
12717 | can reference data in shared objects directly, so we don't need to | |
12718 | do anything here. */ | |
12719 | if (info->shared || globals->root.is_relocatable_executable) | |
b34976b6 | 12720 | return TRUE; |
252b5132 | 12721 | |
909272ee AM |
12722 | if (h->size == 0) |
12723 | { | |
12724 | (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), | |
12725 | h->root.root.string); | |
12726 | return TRUE; | |
12727 | } | |
12728 | ||
252b5132 RH |
12729 | /* We must allocate the symbol in our .dynbss section, which will |
12730 | become part of the .bss section of the executable. There will be | |
12731 | an entry for this symbol in the .dynsym section. The dynamic | |
12732 | object will contain position independent code, so all references | |
12733 | from the dynamic object to this symbol will go through the global | |
12734 | offset table. The dynamic linker will use the .dynsym entry to | |
12735 | determine the address it must put in the global offset table, so | |
12736 | both the dynamic object and the regular object will refer to the | |
12737 | same memory location for the variable. */ | |
252b5132 RH |
12738 | s = bfd_get_section_by_name (dynobj, ".dynbss"); |
12739 | BFD_ASSERT (s != NULL); | |
12740 | ||
12741 | /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to | |
12742 | copy the initial value out of the dynamic object and into the | |
12743 | runtime process image. We need to remember the offset into the | |
00a97672 | 12744 | .rel(a).bss section we are going to use. */ |
252b5132 RH |
12745 | if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) |
12746 | { | |
12747 | asection *srel; | |
12748 | ||
00a97672 | 12749 | srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss")); |
47beaa6a | 12750 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
f5385ebf | 12751 | h->needs_copy = 1; |
252b5132 RH |
12752 | } |
12753 | ||
027297b7 | 12754 | return _bfd_elf_adjust_dynamic_copy (h, s); |
252b5132 RH |
12755 | } |
12756 | ||
5e681ec4 PB |
12757 | /* Allocate space in .plt, .got and associated reloc sections for |
12758 | dynamic relocs. */ | |
12759 | ||
12760 | static bfd_boolean | |
47beaa6a | 12761 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
12762 | { |
12763 | struct bfd_link_info *info; | |
12764 | struct elf32_arm_link_hash_table *htab; | |
12765 | struct elf32_arm_link_hash_entry *eh; | |
0bdcacaf | 12766 | struct elf_dyn_relocs *p; |
5e681ec4 PB |
12767 | |
12768 | if (h->root.type == bfd_link_hash_indirect) | |
12769 | return TRUE; | |
12770 | ||
12771 | if (h->root.type == bfd_link_hash_warning) | |
12772 | /* When warning symbols are created, they **replace** the "real" | |
12773 | entry in the hash table, thus we never get to see the real | |
12774 | symbol in a hash traversal. So look at it now. */ | |
12775 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
12776 | ||
e6a6bb22 AM |
12777 | eh = (struct elf32_arm_link_hash_entry *) h; |
12778 | ||
5e681ec4 PB |
12779 | info = (struct bfd_link_info *) inf; |
12780 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
12781 | if (htab == NULL) |
12782 | return FALSE; | |
5e681ec4 | 12783 | |
34e77a92 | 12784 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
5e681ec4 PB |
12785 | && h->plt.refcount > 0) |
12786 | { | |
12787 | /* Make sure this symbol is output as a dynamic symbol. | |
12788 | Undefined weak syms won't yet be marked as dynamic. */ | |
12789 | if (h->dynindx == -1 | |
f5385ebf | 12790 | && !h->forced_local) |
5e681ec4 | 12791 | { |
c152c796 | 12792 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
12793 | return FALSE; |
12794 | } | |
12795 | ||
34e77a92 RS |
12796 | /* If the call in the PLT entry binds locally, the associated |
12797 | GOT entry should use an R_ARM_IRELATIVE relocation instead of | |
12798 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather | |
12799 | than the .plt section. */ | |
12800 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) | |
12801 | { | |
12802 | eh->is_iplt = 1; | |
12803 | if (eh->plt.noncall_refcount == 0 | |
12804 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
12805 | /* All non-call references can be resolved directly. | |
12806 | This means that they can (and in some cases, must) | |
12807 | resolve directly to the run-time target, rather than | |
12808 | to the PLT. That in turns means that any .got entry | |
12809 | would be equal to the .igot.plt entry, so there's | |
12810 | no point having both. */ | |
12811 | h->got.refcount = 0; | |
12812 | } | |
12813 | ||
5e681ec4 | 12814 | if (info->shared |
34e77a92 | 12815 | || eh->is_iplt |
7359ea65 | 12816 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 | 12817 | { |
34e77a92 | 12818 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
b7693d02 | 12819 | |
5e681ec4 PB |
12820 | /* If this symbol is not defined in a regular file, and we are |
12821 | not generating a shared library, then set the symbol to this | |
12822 | location in the .plt. This is required to make function | |
12823 | pointers compare as equal between the normal executable and | |
12824 | the shared library. */ | |
12825 | if (! info->shared | |
f5385ebf | 12826 | && !h->def_regular) |
5e681ec4 | 12827 | { |
34e77a92 | 12828 | h->root.u.def.section = htab->root.splt; |
5e681ec4 | 12829 | h->root.u.def.value = h->plt.offset; |
5e681ec4 | 12830 | |
67d74e43 DJ |
12831 | /* Make sure the function is not marked as Thumb, in case |
12832 | it is the target of an ABS32 relocation, which will | |
12833 | point to the PLT entry. */ | |
35fc36a8 | 12834 | h->target_internal = ST_BRANCH_TO_ARM; |
67d74e43 | 12835 | } |
022f8312 | 12836 | |
0855e32b | 12837 | htab->next_tls_desc_index++; |
00a97672 RS |
12838 | |
12839 | /* VxWorks executables have a second set of relocations for | |
12840 | each PLT entry. They go in a separate relocation section, | |
12841 | which is processed by the kernel loader. */ | |
12842 | if (htab->vxworks_p && !info->shared) | |
12843 | { | |
12844 | /* There is a relocation for the initial PLT entry: | |
12845 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
12846 | if (h->plt.offset == htab->plt_header_size) | |
47beaa6a | 12847 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
00a97672 RS |
12848 | |
12849 | /* There are two extra relocations for each subsequent | |
12850 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
12851 | and an R_ARM_32 relocation for the PLT entry. */ | |
47beaa6a | 12852 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
00a97672 | 12853 | } |
5e681ec4 PB |
12854 | } |
12855 | else | |
12856 | { | |
12857 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 12858 | h->needs_plt = 0; |
5e681ec4 PB |
12859 | } |
12860 | } | |
12861 | else | |
12862 | { | |
12863 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 12864 | h->needs_plt = 0; |
5e681ec4 PB |
12865 | } |
12866 | ||
0855e32b NS |
12867 | eh = (struct elf32_arm_link_hash_entry *) h; |
12868 | eh->tlsdesc_got = (bfd_vma) -1; | |
12869 | ||
5e681ec4 PB |
12870 | if (h->got.refcount > 0) |
12871 | { | |
12872 | asection *s; | |
12873 | bfd_boolean dyn; | |
ba93b8ac DJ |
12874 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
12875 | int indx; | |
5e681ec4 PB |
12876 | |
12877 | /* Make sure this symbol is output as a dynamic symbol. | |
12878 | Undefined weak syms won't yet be marked as dynamic. */ | |
12879 | if (h->dynindx == -1 | |
f5385ebf | 12880 | && !h->forced_local) |
5e681ec4 | 12881 | { |
c152c796 | 12882 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
12883 | return FALSE; |
12884 | } | |
12885 | ||
e5a52504 MM |
12886 | if (!htab->symbian_p) |
12887 | { | |
362d30a1 | 12888 | s = htab->root.sgot; |
e5a52504 | 12889 | h->got.offset = s->size; |
ba93b8ac DJ |
12890 | |
12891 | if (tls_type == GOT_UNKNOWN) | |
12892 | abort (); | |
12893 | ||
12894 | if (tls_type == GOT_NORMAL) | |
12895 | /* Non-TLS symbols need one GOT slot. */ | |
12896 | s->size += 4; | |
12897 | else | |
12898 | { | |
0855e32b NS |
12899 | if (tls_type & GOT_TLS_GDESC) |
12900 | { | |
12901 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ | |
12902 | eh->tlsdesc_got | |
12903 | = (htab->root.sgotplt->size | |
12904 | - elf32_arm_compute_jump_table_size (htab)); | |
12905 | htab->root.sgotplt->size += 8; | |
12906 | h->got.offset = (bfd_vma) -2; | |
34e77a92 | 12907 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b NS |
12908 | reloc in the middle of .got.plt. */ |
12909 | htab->num_tls_desc++; | |
12910 | } | |
12911 | ||
ba93b8ac | 12912 | if (tls_type & GOT_TLS_GD) |
0855e32b NS |
12913 | { |
12914 | /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If | |
12915 | the symbol is both GD and GDESC, got.offset may | |
12916 | have been overwritten. */ | |
12917 | h->got.offset = s->size; | |
12918 | s->size += 8; | |
12919 | } | |
12920 | ||
ba93b8ac DJ |
12921 | if (tls_type & GOT_TLS_IE) |
12922 | /* R_ARM_TLS_IE32 needs one GOT slot. */ | |
12923 | s->size += 4; | |
12924 | } | |
12925 | ||
e5a52504 | 12926 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac DJ |
12927 | |
12928 | indx = 0; | |
12929 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) | |
12930 | && (!info->shared | |
12931 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
12932 | indx = h->dynindx; | |
12933 | ||
12934 | if (tls_type != GOT_NORMAL | |
12935 | && (info->shared || indx != 0) | |
12936 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
12937 | || h->root.type != bfd_link_hash_undefweak)) | |
12938 | { | |
12939 | if (tls_type & GOT_TLS_IE) | |
47beaa6a | 12940 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
12941 | |
12942 | if (tls_type & GOT_TLS_GD) | |
47beaa6a | 12943 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 12944 | |
0855e32b NS |
12945 | if (tls_type & GOT_TLS_GDESC) |
12946 | { | |
47beaa6a | 12947 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
0855e32b NS |
12948 | /* GDESC needs a trampoline to jump to. */ |
12949 | htab->tls_trampoline = -1; | |
12950 | } | |
12951 | ||
12952 | /* Only GD needs it. GDESC just emits one relocation per | |
12953 | 2 entries. */ | |
12954 | if ((tls_type & GOT_TLS_GD) && indx != 0) | |
47beaa6a | 12955 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 12956 | } |
b436d854 RS |
12957 | else if (!SYMBOL_REFERENCES_LOCAL (info, h)) |
12958 | { | |
12959 | if (htab->root.dynamic_sections_created) | |
12960 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ | |
12961 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
12962 | } | |
34e77a92 RS |
12963 | else if (h->type == STT_GNU_IFUNC |
12964 | && eh->plt.noncall_refcount == 0) | |
12965 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; | |
12966 | they all resolve dynamically instead. Reserve room for the | |
12967 | GOT entry's R_ARM_IRELATIVE relocation. */ | |
12968 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); | |
b436d854 RS |
12969 | else if (info->shared) |
12970 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ | |
47beaa6a | 12971 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e5a52504 | 12972 | } |
5e681ec4 PB |
12973 | } |
12974 | else | |
12975 | h->got.offset = (bfd_vma) -1; | |
12976 | ||
a4fd1a8e PB |
12977 | /* Allocate stubs for exported Thumb functions on v4t. */ |
12978 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 12979 | && h->def_regular |
35fc36a8 | 12980 | && h->target_internal == ST_BRANCH_TO_THUMB |
a4fd1a8e PB |
12981 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
12982 | { | |
12983 | struct elf_link_hash_entry * th; | |
12984 | struct bfd_link_hash_entry * bh; | |
12985 | struct elf_link_hash_entry * myh; | |
12986 | char name[1024]; | |
12987 | asection *s; | |
12988 | bh = NULL; | |
12989 | /* Create a new symbol to regist the real location of the function. */ | |
12990 | s = h->root.u.def.section; | |
906e58ca | 12991 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
12992 | _bfd_generic_link_add_one_symbol (info, s->owner, |
12993 | name, BSF_GLOBAL, s, | |
12994 | h->root.u.def.value, | |
12995 | NULL, TRUE, FALSE, &bh); | |
12996 | ||
12997 | myh = (struct elf_link_hash_entry *) bh; | |
35fc36a8 | 12998 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
a4fd1a8e | 12999 | myh->forced_local = 1; |
35fc36a8 | 13000 | myh->target_internal = ST_BRANCH_TO_THUMB; |
a4fd1a8e PB |
13001 | eh->export_glue = myh; |
13002 | th = record_arm_to_thumb_glue (info, h); | |
13003 | /* Point the symbol at the stub. */ | |
13004 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
35fc36a8 | 13005 | h->target_internal = ST_BRANCH_TO_ARM; |
a4fd1a8e PB |
13006 | h->root.u.def.section = th->root.u.def.section; |
13007 | h->root.u.def.value = th->root.u.def.value & ~1; | |
13008 | } | |
13009 | ||
0bdcacaf | 13010 | if (eh->dyn_relocs == NULL) |
5e681ec4 PB |
13011 | return TRUE; |
13012 | ||
13013 | /* In the shared -Bsymbolic case, discard space allocated for | |
13014 | dynamic pc-relative relocs against symbols which turn out to be | |
13015 | defined in regular objects. For the normal shared case, discard | |
13016 | space for pc-relative relocs that have become local due to symbol | |
13017 | visibility changes. */ | |
13018 | ||
67687978 | 13019 | if (info->shared || htab->root.is_relocatable_executable) |
5e681ec4 | 13020 | { |
7bdca076 | 13021 | /* The only relocs that use pc_count are R_ARM_REL32 and |
bb224fc3 MS |
13022 | R_ARM_REL32_NOI, which will appear on something like |
13023 | ".long foo - .". We want calls to protected symbols to resolve | |
13024 | directly to the function rather than going via the plt. If people | |
13025 | want function pointer comparisons to work as expected then they | |
13026 | should avoid writing assembly like ".long foo - .". */ | |
ba93b8ac DJ |
13027 | if (SYMBOL_CALLS_LOCAL (info, h)) |
13028 | { | |
0bdcacaf | 13029 | struct elf_dyn_relocs **pp; |
ba93b8ac | 13030 | |
0bdcacaf | 13031 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
ba93b8ac DJ |
13032 | { |
13033 | p->count -= p->pc_count; | |
13034 | p->pc_count = 0; | |
13035 | if (p->count == 0) | |
13036 | *pp = p->next; | |
13037 | else | |
13038 | pp = &p->next; | |
13039 | } | |
13040 | } | |
13041 | ||
4dfe6ac6 | 13042 | if (htab->vxworks_p) |
3348747a | 13043 | { |
0bdcacaf | 13044 | struct elf_dyn_relocs **pp; |
3348747a | 13045 | |
0bdcacaf | 13046 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
3348747a | 13047 | { |
0bdcacaf | 13048 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
3348747a NS |
13049 | *pp = p->next; |
13050 | else | |
13051 | pp = &p->next; | |
13052 | } | |
13053 | } | |
13054 | ||
ba93b8ac | 13055 | /* Also discard relocs on undefined weak syms with non-default |
7359ea65 | 13056 | visibility. */ |
0bdcacaf | 13057 | if (eh->dyn_relocs != NULL |
5e681ec4 | 13058 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 AM |
13059 | { |
13060 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) | |
0bdcacaf | 13061 | eh->dyn_relocs = NULL; |
22d606e9 AM |
13062 | |
13063 | /* Make sure undefined weak symbols are output as a dynamic | |
13064 | symbol in PIEs. */ | |
13065 | else if (h->dynindx == -1 | |
13066 | && !h->forced_local) | |
13067 | { | |
13068 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
13069 | return FALSE; | |
13070 | } | |
13071 | } | |
13072 | ||
67687978 PB |
13073 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
13074 | && h->root.type == bfd_link_hash_new) | |
13075 | { | |
13076 | /* Output absolute symbols so that we can create relocations | |
13077 | against them. For normal symbols we output a relocation | |
13078 | against the section that contains them. */ | |
13079 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
13080 | return FALSE; | |
13081 | } | |
13082 | ||
5e681ec4 PB |
13083 | } |
13084 | else | |
13085 | { | |
13086 | /* For the non-shared case, discard space for relocs against | |
13087 | symbols which turn out to need copy relocs or are not | |
13088 | dynamic. */ | |
13089 | ||
f5385ebf AM |
13090 | if (!h->non_got_ref |
13091 | && ((h->def_dynamic | |
13092 | && !h->def_regular) | |
5e681ec4 PB |
13093 | || (htab->root.dynamic_sections_created |
13094 | && (h->root.type == bfd_link_hash_undefweak | |
13095 | || h->root.type == bfd_link_hash_undefined)))) | |
13096 | { | |
13097 | /* Make sure this symbol is output as a dynamic symbol. | |
13098 | Undefined weak syms won't yet be marked as dynamic. */ | |
13099 | if (h->dynindx == -1 | |
f5385ebf | 13100 | && !h->forced_local) |
5e681ec4 | 13101 | { |
c152c796 | 13102 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
13103 | return FALSE; |
13104 | } | |
13105 | ||
13106 | /* If that succeeded, we know we'll be keeping all the | |
13107 | relocs. */ | |
13108 | if (h->dynindx != -1) | |
13109 | goto keep; | |
13110 | } | |
13111 | ||
0bdcacaf | 13112 | eh->dyn_relocs = NULL; |
5e681ec4 PB |
13113 | |
13114 | keep: ; | |
13115 | } | |
13116 | ||
13117 | /* Finally, allocate space. */ | |
0bdcacaf | 13118 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
5e681ec4 | 13119 | { |
0bdcacaf | 13120 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
34e77a92 RS |
13121 | if (h->type == STT_GNU_IFUNC |
13122 | && eh->plt.noncall_refcount == 0 | |
13123 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
13124 | elf32_arm_allocate_irelocs (info, sreloc, p->count); | |
13125 | else | |
13126 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
5e681ec4 PB |
13127 | } |
13128 | ||
13129 | return TRUE; | |
13130 | } | |
13131 | ||
08d1f311 DJ |
13132 | /* Find any dynamic relocs that apply to read-only sections. */ |
13133 | ||
13134 | static bfd_boolean | |
8029a119 | 13135 | elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) |
08d1f311 | 13136 | { |
8029a119 | 13137 | struct elf32_arm_link_hash_entry * eh; |
0bdcacaf | 13138 | struct elf_dyn_relocs * p; |
08d1f311 DJ |
13139 | |
13140 | if (h->root.type == bfd_link_hash_warning) | |
13141 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
13142 | ||
13143 | eh = (struct elf32_arm_link_hash_entry *) h; | |
0bdcacaf | 13144 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
08d1f311 | 13145 | { |
0bdcacaf | 13146 | asection *s = p->sec; |
08d1f311 DJ |
13147 | |
13148 | if (s != NULL && (s->flags & SEC_READONLY) != 0) | |
13149 | { | |
13150 | struct bfd_link_info *info = (struct bfd_link_info *) inf; | |
13151 | ||
13152 | info->flags |= DF_TEXTREL; | |
13153 | ||
13154 | /* Not an error, just cut short the traversal. */ | |
13155 | return FALSE; | |
13156 | } | |
13157 | } | |
13158 | return TRUE; | |
13159 | } | |
13160 | ||
d504ffc8 DJ |
13161 | void |
13162 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
13163 | int byteswap_code) | |
13164 | { | |
13165 | struct elf32_arm_link_hash_table *globals; | |
13166 | ||
13167 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
13168 | if (globals == NULL) |
13169 | return; | |
13170 | ||
d504ffc8 DJ |
13171 | globals->byteswap_code = byteswap_code; |
13172 | } | |
13173 | ||
252b5132 RH |
13174 | /* Set the sizes of the dynamic sections. */ |
13175 | ||
b34976b6 | 13176 | static bfd_boolean |
57e8b36a NC |
13177 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
13178 | struct bfd_link_info * info) | |
252b5132 RH |
13179 | { |
13180 | bfd * dynobj; | |
13181 | asection * s; | |
b34976b6 AM |
13182 | bfd_boolean plt; |
13183 | bfd_boolean relocs; | |
5e681ec4 PB |
13184 | bfd *ibfd; |
13185 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 13186 | |
5e681ec4 | 13187 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13188 | if (htab == NULL) |
13189 | return FALSE; | |
13190 | ||
252b5132 RH |
13191 | dynobj = elf_hash_table (info)->dynobj; |
13192 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 13193 | check_use_blx (htab); |
252b5132 RH |
13194 | |
13195 | if (elf_hash_table (info)->dynamic_sections_created) | |
13196 | { | |
13197 | /* Set the contents of the .interp section to the interpreter. */ | |
893c4fe2 | 13198 | if (info->executable) |
252b5132 RH |
13199 | { |
13200 | s = bfd_get_section_by_name (dynobj, ".interp"); | |
13201 | BFD_ASSERT (s != NULL); | |
eea6121a | 13202 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
13203 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
13204 | } | |
13205 | } | |
5e681ec4 PB |
13206 | |
13207 | /* Set up .got offsets for local syms, and space for local dynamic | |
13208 | relocs. */ | |
13209 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) | |
252b5132 | 13210 | { |
5e681ec4 PB |
13211 | bfd_signed_vma *local_got; |
13212 | bfd_signed_vma *end_local_got; | |
34e77a92 | 13213 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
5e681ec4 | 13214 | char *local_tls_type; |
0855e32b | 13215 | bfd_vma *local_tlsdesc_gotent; |
5e681ec4 PB |
13216 | bfd_size_type locsymcount; |
13217 | Elf_Internal_Shdr *symtab_hdr; | |
13218 | asection *srel; | |
4dfe6ac6 | 13219 | bfd_boolean is_vxworks = htab->vxworks_p; |
34e77a92 | 13220 | unsigned int symndx; |
5e681ec4 | 13221 | |
0ffa91dd | 13222 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
13223 | continue; |
13224 | ||
13225 | for (s = ibfd->sections; s != NULL; s = s->next) | |
13226 | { | |
0bdcacaf | 13227 | struct elf_dyn_relocs *p; |
5e681ec4 | 13228 | |
0bdcacaf | 13229 | for (p = (struct elf_dyn_relocs *) |
21d799b5 | 13230 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
5e681ec4 | 13231 | { |
0bdcacaf RS |
13232 | if (!bfd_is_abs_section (p->sec) |
13233 | && bfd_is_abs_section (p->sec->output_section)) | |
5e681ec4 PB |
13234 | { |
13235 | /* Input section has been discarded, either because | |
13236 | it is a copy of a linkonce section or due to | |
13237 | linker script /DISCARD/, so we'll be discarding | |
13238 | the relocs too. */ | |
13239 | } | |
3348747a | 13240 | else if (is_vxworks |
0bdcacaf | 13241 | && strcmp (p->sec->output_section->name, |
3348747a NS |
13242 | ".tls_vars") == 0) |
13243 | { | |
13244 | /* Relocations in vxworks .tls_vars sections are | |
13245 | handled specially by the loader. */ | |
13246 | } | |
5e681ec4 PB |
13247 | else if (p->count != 0) |
13248 | { | |
0bdcacaf | 13249 | srel = elf_section_data (p->sec)->sreloc; |
47beaa6a | 13250 | elf32_arm_allocate_dynrelocs (info, srel, p->count); |
0bdcacaf | 13251 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
5e681ec4 PB |
13252 | info->flags |= DF_TEXTREL; |
13253 | } | |
13254 | } | |
13255 | } | |
13256 | ||
13257 | local_got = elf_local_got_refcounts (ibfd); | |
13258 | if (!local_got) | |
13259 | continue; | |
13260 | ||
0ffa91dd | 13261 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
13262 | locsymcount = symtab_hdr->sh_info; |
13263 | end_local_got = local_got + locsymcount; | |
34e77a92 | 13264 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
ba93b8ac | 13265 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
0855e32b | 13266 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
34e77a92 | 13267 | symndx = 0; |
362d30a1 RS |
13268 | s = htab->root.sgot; |
13269 | srel = htab->root.srelgot; | |
0855e32b | 13270 | for (; local_got < end_local_got; |
34e77a92 RS |
13271 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
13272 | ++local_tlsdesc_gotent, ++symndx) | |
5e681ec4 | 13273 | { |
0855e32b | 13274 | *local_tlsdesc_gotent = (bfd_vma) -1; |
34e77a92 RS |
13275 | local_iplt = *local_iplt_ptr; |
13276 | if (local_iplt != NULL) | |
13277 | { | |
13278 | struct elf_dyn_relocs *p; | |
13279 | ||
13280 | if (local_iplt->root.refcount > 0) | |
13281 | { | |
13282 | elf32_arm_allocate_plt_entry (info, TRUE, | |
13283 | &local_iplt->root, | |
13284 | &local_iplt->arm); | |
13285 | if (local_iplt->arm.noncall_refcount == 0) | |
13286 | /* All references to the PLT are calls, so all | |
13287 | non-call references can resolve directly to the | |
13288 | run-time target. This means that the .got entry | |
13289 | would be the same as the .igot.plt entry, so there's | |
13290 | no point creating both. */ | |
13291 | *local_got = 0; | |
13292 | } | |
13293 | else | |
13294 | { | |
13295 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); | |
13296 | local_iplt->root.offset = (bfd_vma) -1; | |
13297 | } | |
13298 | ||
13299 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) | |
13300 | { | |
13301 | asection *psrel; | |
13302 | ||
13303 | psrel = elf_section_data (p->sec)->sreloc; | |
13304 | if (local_iplt->arm.noncall_refcount == 0) | |
13305 | elf32_arm_allocate_irelocs (info, psrel, p->count); | |
13306 | else | |
13307 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); | |
13308 | } | |
13309 | } | |
5e681ec4 PB |
13310 | if (*local_got > 0) |
13311 | { | |
34e77a92 RS |
13312 | Elf_Internal_Sym *isym; |
13313 | ||
eea6121a | 13314 | *local_got = s->size; |
ba93b8ac DJ |
13315 | if (*local_tls_type & GOT_TLS_GD) |
13316 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
13317 | s->size += 8; | |
0855e32b NS |
13318 | if (*local_tls_type & GOT_TLS_GDESC) |
13319 | { | |
13320 | *local_tlsdesc_gotent = htab->root.sgotplt->size | |
13321 | - elf32_arm_compute_jump_table_size (htab); | |
13322 | htab->root.sgotplt->size += 8; | |
13323 | *local_got = (bfd_vma) -2; | |
34e77a92 | 13324 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b NS |
13325 | reloc in the middle of .got.plt. */ |
13326 | htab->num_tls_desc++; | |
13327 | } | |
ba93b8ac DJ |
13328 | if (*local_tls_type & GOT_TLS_IE) |
13329 | s->size += 4; | |
ba93b8ac | 13330 | |
0855e32b NS |
13331 | if (*local_tls_type & GOT_NORMAL) |
13332 | { | |
13333 | /* If the symbol is both GD and GDESC, *local_got | |
13334 | may have been overwritten. */ | |
13335 | *local_got = s->size; | |
13336 | s->size += 4; | |
13337 | } | |
13338 | ||
34e77a92 RS |
13339 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); |
13340 | if (isym == NULL) | |
13341 | return FALSE; | |
13342 | ||
13343 | /* If all references to an STT_GNU_IFUNC PLT are calls, | |
13344 | then all non-call references, including this GOT entry, | |
13345 | resolve directly to the run-time target. */ | |
13346 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC | |
13347 | && (local_iplt == NULL | |
13348 | || local_iplt->arm.noncall_refcount == 0)) | |
13349 | elf32_arm_allocate_irelocs (info, srel, 1); | |
13350 | else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC)) | |
13351 | || *local_tls_type & GOT_TLS_GD) | |
47beaa6a | 13352 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
0855e32b NS |
13353 | |
13354 | if (info->shared && *local_tls_type & GOT_TLS_GDESC) | |
13355 | { | |
47beaa6a | 13356 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
0855e32b NS |
13357 | htab->tls_trampoline = -1; |
13358 | } | |
5e681ec4 PB |
13359 | } |
13360 | else | |
13361 | *local_got = (bfd_vma) -1; | |
13362 | } | |
252b5132 RH |
13363 | } |
13364 | ||
ba93b8ac DJ |
13365 | if (htab->tls_ldm_got.refcount > 0) |
13366 | { | |
13367 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
13368 | for R_ARM_TLS_LDM32 relocations. */ | |
362d30a1 RS |
13369 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
13370 | htab->root.sgot->size += 8; | |
ba93b8ac | 13371 | if (info->shared) |
47beaa6a | 13372 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
13373 | } |
13374 | else | |
13375 | htab->tls_ldm_got.offset = -1; | |
13376 | ||
5e681ec4 PB |
13377 | /* Allocate global sym .plt and .got entries, and space for global |
13378 | sym dynamic relocs. */ | |
47beaa6a | 13379 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
252b5132 | 13380 | |
d504ffc8 DJ |
13381 | /* Here we rummage through the found bfds to collect glue information. */ |
13382 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) | |
c7b8f16e | 13383 | { |
0ffa91dd | 13384 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
13385 | continue; |
13386 | ||
c7b8f16e JB |
13387 | /* Initialise mapping tables for code/data. */ |
13388 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 13389 | |
c7b8f16e JB |
13390 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
13391 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)) | |
13392 | /* xgettext:c-format */ | |
13393 | _bfd_error_handler (_("Errors encountered processing file %s"), | |
13394 | ibfd->filename); | |
13395 | } | |
d504ffc8 | 13396 | |
3e6b1042 DJ |
13397 | /* Allocate space for the glue sections now that we've sized them. */ |
13398 | bfd_elf32_arm_allocate_interworking_sections (info); | |
13399 | ||
0855e32b NS |
13400 | /* For every jump slot reserved in the sgotplt, reloc_count is |
13401 | incremented. However, when we reserve space for TLS descriptors, | |
13402 | it's not incremented, so in order to compute the space reserved | |
13403 | for them, it suffices to multiply the reloc count by the jump | |
13404 | slot size. */ | |
13405 | if (htab->root.srelplt) | |
13406 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab); | |
13407 | ||
13408 | if (htab->tls_trampoline) | |
13409 | { | |
13410 | if (htab->root.splt->size == 0) | |
13411 | htab->root.splt->size += htab->plt_header_size; | |
13412 | ||
13413 | htab->tls_trampoline = htab->root.splt->size; | |
13414 | htab->root.splt->size += htab->plt_entry_size; | |
13415 | ||
13416 | /* If we're not using lazy TLS relocations, don't generate the | |
13417 | PLT and GOT entries they require. */ | |
13418 | if (!(info->flags & DF_BIND_NOW)) | |
13419 | { | |
13420 | htab->dt_tlsdesc_got = htab->root.sgot->size; | |
13421 | htab->root.sgot->size += 4; | |
13422 | ||
13423 | htab->dt_tlsdesc_plt = htab->root.splt->size; | |
13424 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); | |
13425 | } | |
13426 | } | |
13427 | ||
252b5132 RH |
13428 | /* The check_relocs and adjust_dynamic_symbol entry points have |
13429 | determined the sizes of the various dynamic sections. Allocate | |
13430 | memory for them. */ | |
b34976b6 AM |
13431 | plt = FALSE; |
13432 | relocs = FALSE; | |
252b5132 RH |
13433 | for (s = dynobj->sections; s != NULL; s = s->next) |
13434 | { | |
13435 | const char * name; | |
252b5132 RH |
13436 | |
13437 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
13438 | continue; | |
13439 | ||
13440 | /* It's OK to base decisions on the section name, because none | |
13441 | of the dynobj section names depend upon the input files. */ | |
13442 | name = bfd_get_section_name (dynobj, s); | |
13443 | ||
34e77a92 | 13444 | if (s == htab->root.splt) |
252b5132 | 13445 | { |
c456f082 AM |
13446 | /* Remember whether there is a PLT. */ |
13447 | plt = s->size != 0; | |
252b5132 | 13448 | } |
0112cd26 | 13449 | else if (CONST_STRNEQ (name, ".rel")) |
252b5132 | 13450 | { |
c456f082 | 13451 | if (s->size != 0) |
252b5132 | 13452 | { |
252b5132 | 13453 | /* Remember whether there are any reloc sections other |
00a97672 | 13454 | than .rel(a).plt and .rela.plt.unloaded. */ |
362d30a1 | 13455 | if (s != htab->root.srelplt && s != htab->srelplt2) |
b34976b6 | 13456 | relocs = TRUE; |
252b5132 RH |
13457 | |
13458 | /* We use the reloc_count field as a counter if we need | |
13459 | to copy relocs into the output file. */ | |
13460 | s->reloc_count = 0; | |
13461 | } | |
13462 | } | |
34e77a92 RS |
13463 | else if (s != htab->root.sgot |
13464 | && s != htab->root.sgotplt | |
13465 | && s != htab->root.iplt | |
13466 | && s != htab->root.igotplt | |
13467 | && s != htab->sdynbss) | |
252b5132 RH |
13468 | { |
13469 | /* It's not one of our sections, so don't allocate space. */ | |
13470 | continue; | |
13471 | } | |
13472 | ||
c456f082 | 13473 | if (s->size == 0) |
252b5132 | 13474 | { |
c456f082 | 13475 | /* If we don't need this section, strip it from the |
00a97672 RS |
13476 | output file. This is mostly to handle .rel(a).bss and |
13477 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
13478 | create_dynamic_sections, because they must be created |
13479 | before the linker maps input sections to output | |
13480 | sections. The linker does that before | |
13481 | adjust_dynamic_symbol is called, and it is that | |
13482 | function which decides whether anything needs to go | |
13483 | into these sections. */ | |
8423293d | 13484 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
13485 | continue; |
13486 | } | |
13487 | ||
c456f082 AM |
13488 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
13489 | continue; | |
13490 | ||
252b5132 | 13491 | /* Allocate memory for the section contents. */ |
21d799b5 | 13492 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 13493 | if (s->contents == NULL) |
b34976b6 | 13494 | return FALSE; |
252b5132 RH |
13495 | } |
13496 | ||
13497 | if (elf_hash_table (info)->dynamic_sections_created) | |
13498 | { | |
13499 | /* Add some entries to the .dynamic section. We fill in the | |
13500 | values later, in elf32_arm_finish_dynamic_sections, but we | |
13501 | must add the entries now so that we get the correct size for | |
13502 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
13503 | dynamic linker and used by the debugger. */ | |
dc810e39 | 13504 | #define add_dynamic_entry(TAG, VAL) \ |
5a580b3a | 13505 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
dc810e39 | 13506 | |
8532796c | 13507 | if (info->executable) |
252b5132 | 13508 | { |
dc810e39 | 13509 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
b34976b6 | 13510 | return FALSE; |
252b5132 RH |
13511 | } |
13512 | ||
13513 | if (plt) | |
13514 | { | |
dc810e39 AM |
13515 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
13516 | || !add_dynamic_entry (DT_PLTRELSZ, 0) | |
00a97672 RS |
13517 | || !add_dynamic_entry (DT_PLTREL, |
13518 | htab->use_rel ? DT_REL : DT_RELA) | |
dc810e39 | 13519 | || !add_dynamic_entry (DT_JMPREL, 0)) |
b34976b6 | 13520 | return FALSE; |
0855e32b NS |
13521 | |
13522 | if (htab->dt_tlsdesc_plt && | |
13523 | (!add_dynamic_entry (DT_TLSDESC_PLT,0) | |
13524 | || !add_dynamic_entry (DT_TLSDESC_GOT,0))) | |
13525 | return FALSE; | |
252b5132 RH |
13526 | } |
13527 | ||
13528 | if (relocs) | |
13529 | { | |
00a97672 RS |
13530 | if (htab->use_rel) |
13531 | { | |
13532 | if (!add_dynamic_entry (DT_REL, 0) | |
13533 | || !add_dynamic_entry (DT_RELSZ, 0) | |
13534 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) | |
13535 | return FALSE; | |
13536 | } | |
13537 | else | |
13538 | { | |
13539 | if (!add_dynamic_entry (DT_RELA, 0) | |
13540 | || !add_dynamic_entry (DT_RELASZ, 0) | |
13541 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) | |
13542 | return FALSE; | |
13543 | } | |
252b5132 RH |
13544 | } |
13545 | ||
08d1f311 DJ |
13546 | /* If any dynamic relocs apply to a read-only section, |
13547 | then we need a DT_TEXTREL entry. */ | |
13548 | if ((info->flags & DF_TEXTREL) == 0) | |
8029a119 NC |
13549 | elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs, |
13550 | info); | |
08d1f311 | 13551 | |
99e4ae17 | 13552 | if ((info->flags & DF_TEXTREL) != 0) |
252b5132 | 13553 | { |
dc810e39 | 13554 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
b34976b6 | 13555 | return FALSE; |
252b5132 | 13556 | } |
7a2b07ff NS |
13557 | if (htab->vxworks_p |
13558 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) | |
13559 | return FALSE; | |
252b5132 | 13560 | } |
8532796c | 13561 | #undef add_dynamic_entry |
252b5132 | 13562 | |
b34976b6 | 13563 | return TRUE; |
252b5132 RH |
13564 | } |
13565 | ||
0855e32b NS |
13566 | /* Size sections even though they're not dynamic. We use it to setup |
13567 | _TLS_MODULE_BASE_, if needed. */ | |
13568 | ||
13569 | static bfd_boolean | |
13570 | elf32_arm_always_size_sections (bfd *output_bfd, | |
13571 | struct bfd_link_info *info) | |
13572 | { | |
13573 | asection *tls_sec; | |
13574 | ||
13575 | if (info->relocatable) | |
13576 | return TRUE; | |
13577 | ||
13578 | tls_sec = elf_hash_table (info)->tls_sec; | |
13579 | ||
13580 | if (tls_sec) | |
13581 | { | |
13582 | struct elf_link_hash_entry *tlsbase; | |
13583 | ||
13584 | tlsbase = elf_link_hash_lookup | |
13585 | (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE); | |
13586 | ||
13587 | if (tlsbase) | |
13588 | { | |
13589 | struct bfd_link_hash_entry *bh = NULL; | |
13590 | const struct elf_backend_data *bed | |
13591 | = get_elf_backend_data (output_bfd); | |
13592 | ||
13593 | if (!(_bfd_generic_link_add_one_symbol | |
13594 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, | |
13595 | tls_sec, 0, NULL, FALSE, | |
13596 | bed->collect, &bh))) | |
13597 | return FALSE; | |
13598 | ||
13599 | tlsbase->type = STT_TLS; | |
13600 | tlsbase = (struct elf_link_hash_entry *)bh; | |
13601 | tlsbase->def_regular = 1; | |
13602 | tlsbase->other = STV_HIDDEN; | |
13603 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); | |
13604 | } | |
13605 | } | |
13606 | return TRUE; | |
13607 | } | |
13608 | ||
252b5132 RH |
13609 | /* Finish up dynamic symbol handling. We set the contents of various |
13610 | dynamic sections here. */ | |
13611 | ||
b34976b6 | 13612 | static bfd_boolean |
906e58ca NC |
13613 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
13614 | struct bfd_link_info * info, | |
13615 | struct elf_link_hash_entry * h, | |
13616 | Elf_Internal_Sym * sym) | |
252b5132 | 13617 | { |
e5a52504 | 13618 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 13619 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 13620 | |
e5a52504 | 13621 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13622 | if (htab == NULL) |
13623 | return FALSE; | |
13624 | ||
b7693d02 | 13625 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
13626 | |
13627 | if (h->plt.offset != (bfd_vma) -1) | |
13628 | { | |
34e77a92 | 13629 | if (!eh->is_iplt) |
e5a52504 | 13630 | { |
34e77a92 RS |
13631 | BFD_ASSERT (h->dynindx != -1); |
13632 | elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, | |
13633 | h->dynindx, 0); | |
e5a52504 | 13634 | } |
57e8b36a | 13635 | |
f5385ebf | 13636 | if (!h->def_regular) |
252b5132 RH |
13637 | { |
13638 | /* Mark the symbol as undefined, rather than as defined in | |
13639 | the .plt section. Leave the value alone. */ | |
13640 | sym->st_shndx = SHN_UNDEF; | |
d982ba73 PB |
13641 | /* If the symbol is weak, we do need to clear the value. |
13642 | Otherwise, the PLT entry would provide a definition for | |
13643 | the symbol even if the symbol wasn't defined anywhere, | |
13644 | and so the symbol would never be NULL. */ | |
f5385ebf | 13645 | if (!h->ref_regular_nonweak) |
d982ba73 | 13646 | sym->st_value = 0; |
252b5132 | 13647 | } |
34e77a92 RS |
13648 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
13649 | { | |
13650 | /* At least one non-call relocation references this .iplt entry, | |
13651 | so the .iplt entry is the function's canonical address. */ | |
13652 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); | |
13653 | sym->st_target_internal = ST_BRANCH_TO_ARM; | |
13654 | sym->st_shndx = (_bfd_elf_section_from_bfd_section | |
13655 | (output_bfd, htab->root.iplt->output_section)); | |
13656 | sym->st_value = (h->plt.offset | |
13657 | + htab->root.iplt->output_section->vma | |
13658 | + htab->root.iplt->output_offset); | |
13659 | } | |
252b5132 RH |
13660 | } |
13661 | ||
f5385ebf | 13662 | if (h->needs_copy) |
252b5132 RH |
13663 | { |
13664 | asection * s; | |
947216bf | 13665 | Elf_Internal_Rela rel; |
252b5132 RH |
13666 | |
13667 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
13668 | BFD_ASSERT (h->dynindx != -1 |
13669 | && (h->root.type == bfd_link_hash_defined | |
13670 | || h->root.type == bfd_link_hash_defweak)); | |
13671 | ||
362d30a1 | 13672 | s = htab->srelbss; |
252b5132 RH |
13673 | BFD_ASSERT (s != NULL); |
13674 | ||
00a97672 | 13675 | rel.r_addend = 0; |
252b5132 RH |
13676 | rel.r_offset = (h->root.u.def.value |
13677 | + h->root.u.def.section->output_section->vma | |
13678 | + h->root.u.def.section->output_offset); | |
13679 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
47beaa6a | 13680 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
252b5132 RH |
13681 | } |
13682 | ||
00a97672 RS |
13683 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
13684 | the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative | |
13685 | to the ".got" section. */ | |
252b5132 | 13686 | if (strcmp (h->root.root.string, "_DYNAMIC") == 0 |
00a97672 | 13687 | || (!htab->vxworks_p && h == htab->root.hgot)) |
252b5132 RH |
13688 | sym->st_shndx = SHN_ABS; |
13689 | ||
b34976b6 | 13690 | return TRUE; |
252b5132 RH |
13691 | } |
13692 | ||
0855e32b NS |
13693 | static void |
13694 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
13695 | void *contents, | |
13696 | const unsigned long *template, unsigned count) | |
13697 | { | |
13698 | unsigned ix; | |
13699 | ||
13700 | for (ix = 0; ix != count; ix++) | |
13701 | { | |
13702 | unsigned long insn = template[ix]; | |
13703 | ||
13704 | /* Emit mov pc,rx if bx is not permitted. */ | |
13705 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) | |
13706 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
13707 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); | |
13708 | } | |
13709 | } | |
13710 | ||
252b5132 RH |
13711 | /* Finish up the dynamic sections. */ |
13712 | ||
b34976b6 | 13713 | static bfd_boolean |
57e8b36a | 13714 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
13715 | { |
13716 | bfd * dynobj; | |
13717 | asection * sgot; | |
13718 | asection * sdyn; | |
4dfe6ac6 NC |
13719 | struct elf32_arm_link_hash_table *htab; |
13720 | ||
13721 | htab = elf32_arm_hash_table (info); | |
13722 | if (htab == NULL) | |
13723 | return FALSE; | |
252b5132 RH |
13724 | |
13725 | dynobj = elf_hash_table (info)->dynobj; | |
13726 | ||
362d30a1 | 13727 | sgot = htab->root.sgotplt; |
252b5132 RH |
13728 | sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); |
13729 | ||
13730 | if (elf_hash_table (info)->dynamic_sections_created) | |
13731 | { | |
13732 | asection *splt; | |
13733 | Elf32_External_Dyn *dyncon, *dynconend; | |
13734 | ||
362d30a1 | 13735 | splt = htab->root.splt; |
24a1ba0f | 13736 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
cbc704f3 | 13737 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
252b5132 RH |
13738 | |
13739 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 13740 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 13741 | |
252b5132 RH |
13742 | for (; dyncon < dynconend; dyncon++) |
13743 | { | |
13744 | Elf_Internal_Dyn dyn; | |
13745 | const char * name; | |
13746 | asection * s; | |
13747 | ||
13748 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
13749 | ||
13750 | switch (dyn.d_tag) | |
13751 | { | |
229fcec5 MM |
13752 | unsigned int type; |
13753 | ||
252b5132 | 13754 | default: |
7a2b07ff NS |
13755 | if (htab->vxworks_p |
13756 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) | |
13757 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
13758 | break; |
13759 | ||
229fcec5 MM |
13760 | case DT_HASH: |
13761 | name = ".hash"; | |
13762 | goto get_vma_if_bpabi; | |
13763 | case DT_STRTAB: | |
13764 | name = ".dynstr"; | |
13765 | goto get_vma_if_bpabi; | |
13766 | case DT_SYMTAB: | |
13767 | name = ".dynsym"; | |
13768 | goto get_vma_if_bpabi; | |
c0042f5d MM |
13769 | case DT_VERSYM: |
13770 | name = ".gnu.version"; | |
13771 | goto get_vma_if_bpabi; | |
13772 | case DT_VERDEF: | |
13773 | name = ".gnu.version_d"; | |
13774 | goto get_vma_if_bpabi; | |
13775 | case DT_VERNEED: | |
13776 | name = ".gnu.version_r"; | |
13777 | goto get_vma_if_bpabi; | |
13778 | ||
252b5132 RH |
13779 | case DT_PLTGOT: |
13780 | name = ".got"; | |
13781 | goto get_vma; | |
13782 | case DT_JMPREL: | |
00a97672 | 13783 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 RH |
13784 | get_vma: |
13785 | s = bfd_get_section_by_name (output_bfd, name); | |
13786 | BFD_ASSERT (s != NULL); | |
229fcec5 MM |
13787 | if (!htab->symbian_p) |
13788 | dyn.d_un.d_ptr = s->vma; | |
13789 | else | |
13790 | /* In the BPABI, tags in the PT_DYNAMIC section point | |
13791 | at the file offset, not the memory address, for the | |
13792 | convenience of the post linker. */ | |
13793 | dyn.d_un.d_ptr = s->filepos; | |
252b5132 RH |
13794 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
13795 | break; | |
13796 | ||
229fcec5 MM |
13797 | get_vma_if_bpabi: |
13798 | if (htab->symbian_p) | |
13799 | goto get_vma; | |
13800 | break; | |
13801 | ||
252b5132 | 13802 | case DT_PLTRELSZ: |
362d30a1 | 13803 | s = htab->root.srelplt; |
252b5132 | 13804 | BFD_ASSERT (s != NULL); |
eea6121a | 13805 | dyn.d_un.d_val = s->size; |
252b5132 RH |
13806 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
13807 | break; | |
906e58ca | 13808 | |
252b5132 | 13809 | case DT_RELSZ: |
00a97672 | 13810 | case DT_RELASZ: |
229fcec5 MM |
13811 | if (!htab->symbian_p) |
13812 | { | |
13813 | /* My reading of the SVR4 ABI indicates that the | |
13814 | procedure linkage table relocs (DT_JMPREL) should be | |
13815 | included in the overall relocs (DT_REL). This is | |
13816 | what Solaris does. However, UnixWare can not handle | |
13817 | that case. Therefore, we override the DT_RELSZ entry | |
13818 | here to make it not include the JMPREL relocs. Since | |
00a97672 | 13819 | the linker script arranges for .rel(a).plt to follow all |
229fcec5 MM |
13820 | other relocation sections, we don't have to worry |
13821 | about changing the DT_REL entry. */ | |
362d30a1 | 13822 | s = htab->root.srelplt; |
229fcec5 MM |
13823 | if (s != NULL) |
13824 | dyn.d_un.d_val -= s->size; | |
13825 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
13826 | break; | |
13827 | } | |
8029a119 | 13828 | /* Fall through. */ |
229fcec5 MM |
13829 | |
13830 | case DT_REL: | |
13831 | case DT_RELA: | |
229fcec5 MM |
13832 | /* In the BPABI, the DT_REL tag must point at the file |
13833 | offset, not the VMA, of the first relocation | |
13834 | section. So, we use code similar to that in | |
13835 | elflink.c, but do not check for SHF_ALLOC on the | |
13836 | relcoation section, since relocations sections are | |
13837 | never allocated under the BPABI. The comments above | |
13838 | about Unixware notwithstanding, we include all of the | |
13839 | relocations here. */ | |
13840 | if (htab->symbian_p) | |
13841 | { | |
13842 | unsigned int i; | |
13843 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) | |
13844 | ? SHT_REL : SHT_RELA); | |
13845 | dyn.d_un.d_val = 0; | |
13846 | for (i = 1; i < elf_numsections (output_bfd); i++) | |
13847 | { | |
906e58ca | 13848 | Elf_Internal_Shdr *hdr |
229fcec5 MM |
13849 | = elf_elfsections (output_bfd)[i]; |
13850 | if (hdr->sh_type == type) | |
13851 | { | |
906e58ca | 13852 | if (dyn.d_tag == DT_RELSZ |
229fcec5 MM |
13853 | || dyn.d_tag == DT_RELASZ) |
13854 | dyn.d_un.d_val += hdr->sh_size; | |
de52dba4 AM |
13855 | else if ((ufile_ptr) hdr->sh_offset |
13856 | <= dyn.d_un.d_val - 1) | |
229fcec5 MM |
13857 | dyn.d_un.d_val = hdr->sh_offset; |
13858 | } | |
13859 | } | |
13860 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
13861 | } | |
252b5132 | 13862 | break; |
88f7bcd5 | 13863 | |
0855e32b NS |
13864 | case DT_TLSDESC_PLT: |
13865 | s = htab->root.splt; | |
13866 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset | |
13867 | + htab->dt_tlsdesc_plt); | |
13868 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
13869 | break; | |
13870 | ||
13871 | case DT_TLSDESC_GOT: | |
13872 | s = htab->root.sgot; | |
13873 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset | |
13874 | + htab->dt_tlsdesc_got); | |
13875 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
13876 | break; | |
13877 | ||
88f7bcd5 NC |
13878 | /* Set the bottom bit of DT_INIT/FINI if the |
13879 | corresponding function is Thumb. */ | |
13880 | case DT_INIT: | |
13881 | name = info->init_function; | |
13882 | goto get_sym; | |
13883 | case DT_FINI: | |
13884 | name = info->fini_function; | |
13885 | get_sym: | |
13886 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 13887 | then there is nothing to adjust. */ |
88f7bcd5 NC |
13888 | if (dyn.d_un.d_val != 0) |
13889 | { | |
13890 | struct elf_link_hash_entry * eh; | |
13891 | ||
13892 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
b34976b6 | 13893 | FALSE, FALSE, TRUE); |
35fc36a8 | 13894 | if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB) |
88f7bcd5 NC |
13895 | { |
13896 | dyn.d_un.d_val |= 1; | |
b34976b6 | 13897 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
13898 | } |
13899 | } | |
13900 | break; | |
252b5132 RH |
13901 | } |
13902 | } | |
13903 | ||
24a1ba0f | 13904 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 13905 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 13906 | { |
00a97672 RS |
13907 | const bfd_vma *plt0_entry; |
13908 | bfd_vma got_address, plt_address, got_displacement; | |
13909 | ||
13910 | /* Calculate the addresses of the GOT and PLT. */ | |
13911 | got_address = sgot->output_section->vma + sgot->output_offset; | |
13912 | plt_address = splt->output_section->vma + splt->output_offset; | |
13913 | ||
13914 | if (htab->vxworks_p) | |
13915 | { | |
13916 | /* The VxWorks GOT is relocated by the dynamic linker. | |
13917 | Therefore, we must emit relocations rather than simply | |
13918 | computing the values now. */ | |
13919 | Elf_Internal_Rela rel; | |
13920 | ||
13921 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
13922 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
13923 | splt->contents + 0); | |
13924 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
13925 | splt->contents + 4); | |
13926 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
13927 | splt->contents + 8); | |
00a97672 RS |
13928 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
13929 | ||
8029a119 | 13930 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
13931 | rel.r_offset = plt_address + 12; |
13932 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
13933 | rel.r_addend = 0; | |
13934 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
13935 | htab->srelplt2->contents); | |
13936 | } | |
13937 | else | |
13938 | { | |
13939 | got_displacement = got_address - (plt_address + 16); | |
13940 | ||
13941 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
13942 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
13943 | splt->contents + 0); | |
13944 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
13945 | splt->contents + 4); | |
13946 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
13947 | splt->contents + 8); | |
13948 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
13949 | splt->contents + 12); | |
5e681ec4 | 13950 | |
5e681ec4 | 13951 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
13952 | /* The displacement value goes in the otherwise-unused |
13953 | last word of the second entry. */ | |
13954 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 13955 | #else |
00a97672 | 13956 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 13957 | #endif |
00a97672 | 13958 | } |
f7a74f8c | 13959 | } |
252b5132 RH |
13960 | |
13961 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
13962 | really seem like the right value. */ | |
74541ad4 AM |
13963 | if (splt->output_section->owner == output_bfd) |
13964 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 | 13965 | |
0855e32b NS |
13966 | if (htab->dt_tlsdesc_plt) |
13967 | { | |
13968 | bfd_vma got_address | |
13969 | = sgot->output_section->vma + sgot->output_offset; | |
13970 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma | |
13971 | + htab->root.sgot->output_offset); | |
13972 | bfd_vma plt_address | |
13973 | = splt->output_section->vma + splt->output_offset; | |
13974 | ||
13975 | arm_put_trampoline (htab, output_bfd, | |
13976 | splt->contents + htab->dt_tlsdesc_plt, | |
13977 | dl_tlsdesc_lazy_trampoline, 6); | |
13978 | ||
13979 | bfd_put_32 (output_bfd, | |
13980 | gotplt_address + htab->dt_tlsdesc_got | |
13981 | - (plt_address + htab->dt_tlsdesc_plt) | |
13982 | - dl_tlsdesc_lazy_trampoline[6], | |
13983 | splt->contents + htab->dt_tlsdesc_plt + 24); | |
13984 | bfd_put_32 (output_bfd, | |
13985 | got_address - (plt_address + htab->dt_tlsdesc_plt) | |
13986 | - dl_tlsdesc_lazy_trampoline[7], | |
13987 | splt->contents + htab->dt_tlsdesc_plt + 24 + 4); | |
13988 | } | |
13989 | ||
13990 | if (htab->tls_trampoline) | |
13991 | { | |
13992 | arm_put_trampoline (htab, output_bfd, | |
13993 | splt->contents + htab->tls_trampoline, | |
13994 | tls_trampoline, 3); | |
13995 | #ifdef FOUR_WORD_PLT | |
13996 | bfd_put_32 (output_bfd, 0x00000000, | |
13997 | splt->contents + htab->tls_trampoline + 12); | |
13998 | #endif | |
13999 | } | |
14000 | ||
362d30a1 | 14001 | if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0) |
00a97672 RS |
14002 | { |
14003 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
14004 | incorrect symbol indexes. */ | |
14005 | int num_plts; | |
eed62c48 | 14006 | unsigned char *p; |
00a97672 | 14007 | |
362d30a1 | 14008 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
00a97672 RS |
14009 | / htab->plt_entry_size); |
14010 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
14011 | ||
14012 | for (; num_plts; num_plts--) | |
14013 | { | |
14014 | Elf_Internal_Rela rel; | |
14015 | ||
14016 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
14017 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
14018 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
14019 | p += RELOC_SIZE (htab); | |
14020 | ||
14021 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
14022 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
14023 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
14024 | p += RELOC_SIZE (htab); | |
14025 | } | |
14026 | } | |
252b5132 RH |
14027 | } |
14028 | ||
14029 | /* Fill in the first three entries in the global offset table. */ | |
229fcec5 | 14030 | if (sgot) |
252b5132 | 14031 | { |
229fcec5 MM |
14032 | if (sgot->size > 0) |
14033 | { | |
14034 | if (sdyn == NULL) | |
14035 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
14036 | else | |
14037 | bfd_put_32 (output_bfd, | |
14038 | sdyn->output_section->vma + sdyn->output_offset, | |
14039 | sgot->contents); | |
14040 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
14041 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
14042 | } | |
252b5132 | 14043 | |
229fcec5 MM |
14044 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
14045 | } | |
252b5132 | 14046 | |
b34976b6 | 14047 | return TRUE; |
252b5132 RH |
14048 | } |
14049 | ||
ba96a88f | 14050 | static void |
57e8b36a | 14051 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
ba96a88f | 14052 | { |
9b485d32 | 14053 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 14054 | struct elf32_arm_link_hash_table *globals; |
ba96a88f NC |
14055 | |
14056 | i_ehdrp = elf_elfheader (abfd); | |
14057 | ||
94a3258f PB |
14058 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
14059 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
14060 | else | |
14061 | i_ehdrp->e_ident[EI_OSABI] = 0; | |
ba96a88f | 14062 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 14063 | |
93204d3a PB |
14064 | if (link_info) |
14065 | { | |
14066 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 14067 | if (globals != NULL && globals->byteswap_code) |
93204d3a PB |
14068 | i_ehdrp->e_flags |= EF_ARM_BE8; |
14069 | } | |
ba96a88f NC |
14070 | } |
14071 | ||
99e4ae17 | 14072 | static enum elf_reloc_type_class |
57e8b36a | 14073 | elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela) |
99e4ae17 | 14074 | { |
f51e552e | 14075 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
14076 | { |
14077 | case R_ARM_RELATIVE: | |
14078 | return reloc_class_relative; | |
14079 | case R_ARM_JUMP_SLOT: | |
14080 | return reloc_class_plt; | |
14081 | case R_ARM_COPY: | |
14082 | return reloc_class_copy; | |
14083 | default: | |
14084 | return reloc_class_normal; | |
14085 | } | |
14086 | } | |
14087 | ||
e16bb312 NC |
14088 | /* Set the right machine number for an Arm ELF file. */ |
14089 | ||
14090 | static bfd_boolean | |
57e8b36a | 14091 | elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr) |
e16bb312 NC |
14092 | { |
14093 | if (hdr->sh_type == SHT_NOTE) | |
14094 | *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS; | |
14095 | ||
14096 | return TRUE; | |
14097 | } | |
14098 | ||
e489d0ae | 14099 | static void |
57e8b36a | 14100 | elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) |
e16bb312 | 14101 | { |
5a6c6817 | 14102 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
14103 | } |
14104 | ||
40a18ebd NC |
14105 | /* Return TRUE if this is an unwinding table entry. */ |
14106 | ||
14107 | static bfd_boolean | |
14108 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) | |
14109 | { | |
0112cd26 NC |
14110 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
14111 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
14112 | } |
14113 | ||
14114 | ||
14115 | /* Set the type and flags for an ARM section. We do this by | |
14116 | the section name, which is a hack, but ought to work. */ | |
14117 | ||
14118 | static bfd_boolean | |
14119 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) | |
14120 | { | |
14121 | const char * name; | |
14122 | ||
14123 | name = bfd_get_section_name (abfd, sec); | |
14124 | ||
14125 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
14126 | { | |
14127 | hdr->sh_type = SHT_ARM_EXIDX; | |
14128 | hdr->sh_flags |= SHF_LINK_ORDER; | |
14129 | } | |
14130 | return TRUE; | |
14131 | } | |
14132 | ||
6dc132d9 L |
14133 | /* Handle an ARM specific section when reading an object file. This is |
14134 | called when bfd_section_from_shdr finds a section with an unknown | |
14135 | type. */ | |
40a18ebd NC |
14136 | |
14137 | static bfd_boolean | |
14138 | elf32_arm_section_from_shdr (bfd *abfd, | |
14139 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
14140 | const char *name, |
14141 | int shindex) | |
40a18ebd NC |
14142 | { |
14143 | /* There ought to be a place to keep ELF backend specific flags, but | |
14144 | at the moment there isn't one. We just keep track of the | |
14145 | sections by their name, instead. Fortunately, the ABI gives | |
14146 | names for all the ARM specific sections, so we will probably get | |
14147 | away with this. */ | |
14148 | switch (hdr->sh_type) | |
14149 | { | |
14150 | case SHT_ARM_EXIDX: | |
0951f019 RE |
14151 | case SHT_ARM_PREEMPTMAP: |
14152 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
14153 | break; |
14154 | ||
14155 | default: | |
14156 | return FALSE; | |
14157 | } | |
14158 | ||
6dc132d9 | 14159 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
40a18ebd NC |
14160 | return FALSE; |
14161 | ||
14162 | return TRUE; | |
14163 | } | |
e489d0ae | 14164 | |
44444f50 NC |
14165 | static _arm_elf_section_data * |
14166 | get_arm_elf_section_data (asection * sec) | |
14167 | { | |
47b2e99c JZ |
14168 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
14169 | return elf32_arm_section_data (sec); | |
44444f50 NC |
14170 | else |
14171 | return NULL; | |
8e3de13a NC |
14172 | } |
14173 | ||
4e617b1e PB |
14174 | typedef struct |
14175 | { | |
14176 | void *finfo; | |
14177 | struct bfd_link_info *info; | |
91a5743d PB |
14178 | asection *sec; |
14179 | int sec_shndx; | |
6e0b88f1 AM |
14180 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
14181 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
14182 | } output_arch_syminfo; |
14183 | ||
14184 | enum map_symbol_type | |
14185 | { | |
14186 | ARM_MAP_ARM, | |
14187 | ARM_MAP_THUMB, | |
14188 | ARM_MAP_DATA | |
14189 | }; | |
14190 | ||
14191 | ||
7413f23f | 14192 | /* Output a single mapping symbol. */ |
4e617b1e PB |
14193 | |
14194 | static bfd_boolean | |
7413f23f DJ |
14195 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
14196 | enum map_symbol_type type, | |
14197 | bfd_vma offset) | |
4e617b1e PB |
14198 | { |
14199 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
14200 | Elf_Internal_Sym sym; |
14201 | ||
91a5743d PB |
14202 | sym.st_value = osi->sec->output_section->vma |
14203 | + osi->sec->output_offset | |
14204 | + offset; | |
4e617b1e PB |
14205 | sym.st_size = 0; |
14206 | sym.st_other = 0; | |
14207 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 14208 | sym.st_shndx = osi->sec_shndx; |
35fc36a8 | 14209 | sym.st_target_internal = 0; |
fe33d2fa | 14210 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
6e0b88f1 | 14211 | return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
14212 | } |
14213 | ||
34e77a92 RS |
14214 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
14215 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ | |
4e617b1e PB |
14216 | |
14217 | static bfd_boolean | |
34e77a92 RS |
14218 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
14219 | bfd_boolean is_iplt_entry_p, | |
14220 | union gotplt_union *root_plt, | |
14221 | struct arm_plt_info *arm_plt) | |
4e617b1e | 14222 | { |
4e617b1e | 14223 | struct elf32_arm_link_hash_table *htab; |
34e77a92 | 14224 | bfd_vma addr, plt_header_size; |
4e617b1e | 14225 | |
34e77a92 | 14226 | if (root_plt->offset == (bfd_vma) -1) |
4e617b1e PB |
14227 | return TRUE; |
14228 | ||
4dfe6ac6 NC |
14229 | htab = elf32_arm_hash_table (osi->info); |
14230 | if (htab == NULL) | |
14231 | return FALSE; | |
14232 | ||
34e77a92 RS |
14233 | if (is_iplt_entry_p) |
14234 | { | |
14235 | osi->sec = htab->root.iplt; | |
14236 | plt_header_size = 0; | |
14237 | } | |
14238 | else | |
14239 | { | |
14240 | osi->sec = htab->root.splt; | |
14241 | plt_header_size = htab->plt_header_size; | |
14242 | } | |
14243 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section | |
14244 | (osi->info->output_bfd, osi->sec->output_section)); | |
14245 | ||
14246 | addr = root_plt->offset & -2; | |
4e617b1e PB |
14247 | if (htab->symbian_p) |
14248 | { | |
7413f23f | 14249 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 14250 | return FALSE; |
7413f23f | 14251 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
4e617b1e PB |
14252 | return FALSE; |
14253 | } | |
14254 | else if (htab->vxworks_p) | |
14255 | { | |
7413f23f | 14256 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 14257 | return FALSE; |
7413f23f | 14258 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
4e617b1e | 14259 | return FALSE; |
7413f23f | 14260 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
4e617b1e | 14261 | return FALSE; |
7413f23f | 14262 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
4e617b1e PB |
14263 | return FALSE; |
14264 | } | |
14265 | else | |
14266 | { | |
34e77a92 | 14267 | bfd_boolean thumb_stub_p; |
bd97cb95 | 14268 | |
34e77a92 RS |
14269 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
14270 | if (thumb_stub_p) | |
4e617b1e | 14271 | { |
7413f23f | 14272 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
4e617b1e PB |
14273 | return FALSE; |
14274 | } | |
14275 | #ifdef FOUR_WORD_PLT | |
7413f23f | 14276 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 14277 | return FALSE; |
7413f23f | 14278 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
4e617b1e PB |
14279 | return FALSE; |
14280 | #else | |
906e58ca | 14281 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
14282 | so only need to output a mapping symbol for the first PLT entry and |
14283 | entries with thumb thunks. */ | |
34e77a92 | 14284 | if (thumb_stub_p || addr == plt_header_size) |
4e617b1e | 14285 | { |
7413f23f | 14286 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e PB |
14287 | return FALSE; |
14288 | } | |
14289 | #endif | |
14290 | } | |
14291 | ||
14292 | return TRUE; | |
14293 | } | |
14294 | ||
34e77a92 RS |
14295 | /* Output mapping symbols for PLT entries associated with H. */ |
14296 | ||
14297 | static bfd_boolean | |
14298 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) | |
14299 | { | |
14300 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
14301 | struct elf32_arm_link_hash_entry *eh; | |
14302 | ||
14303 | if (h->root.type == bfd_link_hash_indirect) | |
14304 | return TRUE; | |
14305 | ||
14306 | if (h->root.type == bfd_link_hash_warning) | |
14307 | /* When warning symbols are created, they **replace** the "real" | |
14308 | entry in the hash table, thus we never get to see the real | |
14309 | symbol in a hash traversal. So look at it now. */ | |
14310 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
14311 | ||
14312 | eh = (struct elf32_arm_link_hash_entry *) h; | |
14313 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), | |
14314 | &h->plt, &eh->plt); | |
14315 | } | |
14316 | ||
7413f23f DJ |
14317 | /* Output a single local symbol for a generated stub. */ |
14318 | ||
14319 | static bfd_boolean | |
14320 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, | |
14321 | bfd_vma offset, bfd_vma size) | |
14322 | { | |
7413f23f DJ |
14323 | Elf_Internal_Sym sym; |
14324 | ||
7413f23f DJ |
14325 | sym.st_value = osi->sec->output_section->vma |
14326 | + osi->sec->output_offset | |
14327 | + offset; | |
14328 | sym.st_size = size; | |
14329 | sym.st_other = 0; | |
14330 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
14331 | sym.st_shndx = osi->sec_shndx; | |
35fc36a8 | 14332 | sym.st_target_internal = 0; |
6e0b88f1 | 14333 | return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 14334 | } |
4e617b1e | 14335 | |
da5938a2 | 14336 | static bfd_boolean |
8029a119 NC |
14337 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
14338 | void * in_arg) | |
da5938a2 NC |
14339 | { |
14340 | struct elf32_arm_stub_hash_entry *stub_entry; | |
da5938a2 NC |
14341 | asection *stub_sec; |
14342 | bfd_vma addr; | |
7413f23f | 14343 | char *stub_name; |
9a008db3 | 14344 | output_arch_syminfo *osi; |
d3ce72d0 | 14345 | const insn_sequence *template_sequence; |
461a49ca DJ |
14346 | enum stub_insn_type prev_type; |
14347 | int size; | |
14348 | int i; | |
14349 | enum map_symbol_type sym_type; | |
da5938a2 NC |
14350 | |
14351 | /* Massage our args to the form they really have. */ | |
14352 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 14353 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 14354 | |
da5938a2 NC |
14355 | stub_sec = stub_entry->stub_sec; |
14356 | ||
14357 | /* Ensure this stub is attached to the current section being | |
7413f23f | 14358 | processed. */ |
da5938a2 NC |
14359 | if (stub_sec != osi->sec) |
14360 | return TRUE; | |
14361 | ||
7413f23f DJ |
14362 | addr = (bfd_vma) stub_entry->stub_offset; |
14363 | stub_name = stub_entry->output_name; | |
da5938a2 | 14364 | |
d3ce72d0 NC |
14365 | template_sequence = stub_entry->stub_template; |
14366 | switch (template_sequence[0].type) | |
7413f23f | 14367 | { |
461a49ca DJ |
14368 | case ARM_TYPE: |
14369 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size)) | |
da5938a2 NC |
14370 | return FALSE; |
14371 | break; | |
461a49ca | 14372 | case THUMB16_TYPE: |
48229727 | 14373 | case THUMB32_TYPE: |
461a49ca DJ |
14374 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, |
14375 | stub_entry->stub_size)) | |
da5938a2 NC |
14376 | return FALSE; |
14377 | break; | |
14378 | default: | |
14379 | BFD_FAIL (); | |
48229727 | 14380 | return 0; |
7413f23f | 14381 | } |
da5938a2 | 14382 | |
461a49ca DJ |
14383 | prev_type = DATA_TYPE; |
14384 | size = 0; | |
14385 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
14386 | { | |
d3ce72d0 | 14387 | switch (template_sequence[i].type) |
461a49ca DJ |
14388 | { |
14389 | case ARM_TYPE: | |
14390 | sym_type = ARM_MAP_ARM; | |
14391 | break; | |
14392 | ||
14393 | case THUMB16_TYPE: | |
48229727 | 14394 | case THUMB32_TYPE: |
461a49ca DJ |
14395 | sym_type = ARM_MAP_THUMB; |
14396 | break; | |
14397 | ||
14398 | case DATA_TYPE: | |
14399 | sym_type = ARM_MAP_DATA; | |
14400 | break; | |
14401 | ||
14402 | default: | |
14403 | BFD_FAIL (); | |
4e31c731 | 14404 | return FALSE; |
461a49ca DJ |
14405 | } |
14406 | ||
d3ce72d0 | 14407 | if (template_sequence[i].type != prev_type) |
461a49ca | 14408 | { |
d3ce72d0 | 14409 | prev_type = template_sequence[i].type; |
461a49ca DJ |
14410 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
14411 | return FALSE; | |
14412 | } | |
14413 | ||
d3ce72d0 | 14414 | switch (template_sequence[i].type) |
461a49ca DJ |
14415 | { |
14416 | case ARM_TYPE: | |
48229727 | 14417 | case THUMB32_TYPE: |
461a49ca DJ |
14418 | size += 4; |
14419 | break; | |
14420 | ||
14421 | case THUMB16_TYPE: | |
14422 | size += 2; | |
14423 | break; | |
14424 | ||
14425 | case DATA_TYPE: | |
14426 | size += 4; | |
14427 | break; | |
14428 | ||
14429 | default: | |
14430 | BFD_FAIL (); | |
4e31c731 | 14431 | return FALSE; |
461a49ca DJ |
14432 | } |
14433 | } | |
14434 | ||
da5938a2 NC |
14435 | return TRUE; |
14436 | } | |
14437 | ||
33811162 DG |
14438 | /* Output mapping symbols for linker generated sections, |
14439 | and for those data-only sections that do not have a | |
14440 | $d. */ | |
4e617b1e PB |
14441 | |
14442 | static bfd_boolean | |
14443 | elf32_arm_output_arch_local_syms (bfd *output_bfd, | |
906e58ca NC |
14444 | struct bfd_link_info *info, |
14445 | void *finfo, | |
6e0b88f1 AM |
14446 | int (*func) (void *, const char *, |
14447 | Elf_Internal_Sym *, | |
14448 | asection *, | |
14449 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
14450 | { |
14451 | output_arch_syminfo osi; | |
14452 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
14453 | bfd_vma offset; |
14454 | bfd_size_type size; | |
33811162 | 14455 | bfd *input_bfd; |
4e617b1e PB |
14456 | |
14457 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
14458 | if (htab == NULL) |
14459 | return FALSE; | |
14460 | ||
906e58ca | 14461 | check_use_blx (htab); |
91a5743d | 14462 | |
4e617b1e PB |
14463 | osi.finfo = finfo; |
14464 | osi.info = info; | |
14465 | osi.func = func; | |
906e58ca | 14466 | |
33811162 DG |
14467 | /* Add a $d mapping symbol to data-only sections that |
14468 | don't have any mapping symbol. This may result in (harmless) redundant | |
14469 | mapping symbols. */ | |
14470 | for (input_bfd = info->input_bfds; | |
14471 | input_bfd != NULL; | |
14472 | input_bfd = input_bfd->link_next) | |
14473 | { | |
14474 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
14475 | for (osi.sec = input_bfd->sections; | |
14476 | osi.sec != NULL; | |
14477 | osi.sec = osi.sec->next) | |
14478 | { | |
14479 | if (osi.sec->output_section != NULL | |
f7dd8c79 DJ |
14480 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
14481 | != 0) | |
33811162 DG |
14482 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
14483 | == SEC_HAS_CONTENTS | |
14484 | && get_arm_elf_section_data (osi.sec) != NULL | |
501abfe0 DJ |
14485 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
14486 | && osi.sec->size > 0) | |
33811162 DG |
14487 | { |
14488 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14489 | (output_bfd, osi.sec->output_section); | |
14490 | if (osi.sec_shndx != (int)SHN_BAD) | |
14491 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
14492 | } | |
14493 | } | |
14494 | } | |
14495 | ||
91a5743d PB |
14496 | /* ARM->Thumb glue. */ |
14497 | if (htab->arm_glue_size > 0) | |
14498 | { | |
14499 | osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, | |
14500 | ARM2THUMB_GLUE_SECTION_NAME); | |
14501 | ||
14502 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14503 | (output_bfd, osi.sec->output_section); | |
14504 | if (info->shared || htab->root.is_relocatable_executable | |
14505 | || htab->pic_veneer) | |
14506 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
14507 | else if (htab->use_blx) | |
14508 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
14509 | else | |
14510 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 14511 | |
91a5743d PB |
14512 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
14513 | { | |
7413f23f DJ |
14514 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
14515 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
14516 | } |
14517 | } | |
14518 | ||
14519 | /* Thumb->ARM glue. */ | |
14520 | if (htab->thumb_glue_size > 0) | |
14521 | { | |
14522 | osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, | |
14523 | THUMB2ARM_GLUE_SECTION_NAME); | |
14524 | ||
14525 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14526 | (output_bfd, osi.sec->output_section); | |
14527 | size = THUMB2ARM_GLUE_SIZE; | |
14528 | ||
14529 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
14530 | { | |
7413f23f DJ |
14531 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
14532 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
14533 | } |
14534 | } | |
14535 | ||
845b51d6 PB |
14536 | /* ARMv4 BX veneers. */ |
14537 | if (htab->bx_glue_size > 0) | |
14538 | { | |
14539 | osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, | |
14540 | ARM_BX_GLUE_SECTION_NAME); | |
14541 | ||
14542 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14543 | (output_bfd, osi.sec->output_section); | |
14544 | ||
7413f23f | 14545 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
14546 | } |
14547 | ||
8029a119 NC |
14548 | /* Long calls stubs. */ |
14549 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
14550 | { | |
da5938a2 | 14551 | asection* stub_sec; |
8029a119 | 14552 | |
da5938a2 NC |
14553 | for (stub_sec = htab->stub_bfd->sections; |
14554 | stub_sec != NULL; | |
8029a119 NC |
14555 | stub_sec = stub_sec->next) |
14556 | { | |
14557 | /* Ignore non-stub sections. */ | |
14558 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
14559 | continue; | |
da5938a2 | 14560 | |
8029a119 | 14561 | osi.sec = stub_sec; |
da5938a2 | 14562 | |
8029a119 NC |
14563 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
14564 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 14565 | |
8029a119 NC |
14566 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
14567 | } | |
14568 | } | |
da5938a2 | 14569 | |
91a5743d | 14570 | /* Finally, output mapping symbols for the PLT. */ |
34e77a92 | 14571 | if (htab->root.splt && htab->root.splt->size > 0) |
4e617b1e | 14572 | { |
34e77a92 RS |
14573 | osi.sec = htab->root.splt; |
14574 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
14575 | (output_bfd, osi.sec->output_section)); | |
14576 | ||
14577 | /* Output mapping symbols for the plt header. SymbianOS does not have a | |
14578 | plt header. */ | |
14579 | if (htab->vxworks_p) | |
14580 | { | |
14581 | /* VxWorks shared libraries have no PLT header. */ | |
14582 | if (!info->shared) | |
14583 | { | |
14584 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
14585 | return FALSE; | |
14586 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
14587 | return FALSE; | |
14588 | } | |
14589 | } | |
14590 | else if (!htab->symbian_p) | |
4e617b1e | 14591 | { |
7413f23f | 14592 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e | 14593 | return FALSE; |
34e77a92 RS |
14594 | #ifndef FOUR_WORD_PLT |
14595 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) | |
4e617b1e | 14596 | return FALSE; |
34e77a92 | 14597 | #endif |
4e617b1e PB |
14598 | } |
14599 | } | |
34e77a92 RS |
14600 | if ((htab->root.splt && htab->root.splt->size > 0) |
14601 | || (htab->root.iplt && htab->root.iplt->size > 0)) | |
4e617b1e | 14602 | { |
34e77a92 RS |
14603 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
14604 | for (input_bfd = info->input_bfds; | |
14605 | input_bfd != NULL; | |
14606 | input_bfd = input_bfd->link_next) | |
14607 | { | |
14608 | struct arm_local_iplt_info **local_iplt; | |
14609 | unsigned int i, num_syms; | |
4e617b1e | 14610 | |
34e77a92 RS |
14611 | local_iplt = elf32_arm_local_iplt (input_bfd); |
14612 | if (local_iplt != NULL) | |
14613 | { | |
14614 | num_syms = elf_symtab_hdr (input_bfd).sh_info; | |
14615 | for (i = 0; i < num_syms; i++) | |
14616 | if (local_iplt[i] != NULL | |
14617 | && !elf32_arm_output_plt_map_1 (&osi, TRUE, | |
14618 | &local_iplt[i]->root, | |
14619 | &local_iplt[i]->arm)) | |
14620 | return FALSE; | |
14621 | } | |
14622 | } | |
14623 | } | |
0855e32b NS |
14624 | if (htab->dt_tlsdesc_plt != 0) |
14625 | { | |
14626 | /* Mapping symbols for the lazy tls trampoline. */ | |
14627 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt)) | |
14628 | return FALSE; | |
14629 | ||
14630 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
14631 | htab->dt_tlsdesc_plt + 24)) | |
14632 | return FALSE; | |
14633 | } | |
14634 | if (htab->tls_trampoline != 0) | |
14635 | { | |
14636 | /* Mapping symbols for the tls trampoline. */ | |
14637 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) | |
14638 | return FALSE; | |
14639 | #ifdef FOUR_WORD_PLT | |
14640 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
14641 | htab->tls_trampoline + 12)) | |
14642 | return FALSE; | |
14643 | #endif | |
14644 | } | |
14645 | ||
4e617b1e PB |
14646 | return TRUE; |
14647 | } | |
14648 | ||
e489d0ae PB |
14649 | /* Allocate target specific section data. */ |
14650 | ||
14651 | static bfd_boolean | |
14652 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) | |
14653 | { | |
f592407e AM |
14654 | if (!sec->used_by_bfd) |
14655 | { | |
14656 | _arm_elf_section_data *sdata; | |
14657 | bfd_size_type amt = sizeof (*sdata); | |
e489d0ae | 14658 | |
21d799b5 | 14659 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e AM |
14660 | if (sdata == NULL) |
14661 | return FALSE; | |
14662 | sec->used_by_bfd = sdata; | |
14663 | } | |
e489d0ae PB |
14664 | |
14665 | return _bfd_elf_new_section_hook (abfd, sec); | |
14666 | } | |
14667 | ||
14668 | ||
14669 | /* Used to order a list of mapping symbols by address. */ | |
14670 | ||
14671 | static int | |
14672 | elf32_arm_compare_mapping (const void * a, const void * b) | |
14673 | { | |
7f6a71ff JM |
14674 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
14675 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
14676 | ||
14677 | if (amap->vma > bmap->vma) | |
14678 | return 1; | |
14679 | else if (amap->vma < bmap->vma) | |
14680 | return -1; | |
14681 | else if (amap->type > bmap->type) | |
14682 | /* Ensure results do not depend on the host qsort for objects with | |
14683 | multiple mapping symbols at the same address by sorting on type | |
14684 | after vma. */ | |
14685 | return 1; | |
14686 | else if (amap->type < bmap->type) | |
14687 | return -1; | |
14688 | else | |
14689 | return 0; | |
e489d0ae PB |
14690 | } |
14691 | ||
2468f9c9 PB |
14692 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
14693 | ||
14694 | static unsigned long | |
14695 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
14696 | { | |
14697 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
14698 | } | |
14699 | ||
14700 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
14701 | relocations. */ | |
14702 | ||
14703 | static void | |
14704 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
14705 | { | |
14706 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
14707 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
14708 | ||
14709 | /* High bit of first word is supposed to be zero. */ | |
14710 | if ((first_word & 0x80000000ul) == 0) | |
14711 | first_word = offset_prel31 (first_word, offset); | |
14712 | ||
14713 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 | |
14714 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
14715 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
14716 | second_word = offset_prel31 (second_word, offset); | |
14717 | ||
14718 | bfd_put_32 (output_bfd, first_word, to); | |
14719 | bfd_put_32 (output_bfd, second_word, to + 4); | |
14720 | } | |
e489d0ae | 14721 | |
48229727 JB |
14722 | /* Data for make_branch_to_a8_stub(). */ |
14723 | ||
14724 | struct a8_branch_to_stub_data { | |
14725 | asection *writing_section; | |
14726 | bfd_byte *contents; | |
14727 | }; | |
14728 | ||
14729 | ||
14730 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
14731 | places for a particular section. */ | |
14732 | ||
14733 | static bfd_boolean | |
14734 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, | |
14735 | void *in_arg) | |
14736 | { | |
14737 | struct elf32_arm_stub_hash_entry *stub_entry; | |
14738 | struct a8_branch_to_stub_data *data; | |
14739 | bfd_byte *contents; | |
14740 | unsigned long branch_insn; | |
14741 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
14742 | bfd_signed_vma branch_offset; | |
14743 | bfd *abfd; | |
91d6fa6a | 14744 | unsigned int target; |
48229727 JB |
14745 | |
14746 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
14747 | data = (struct a8_branch_to_stub_data *) in_arg; | |
14748 | ||
14749 | if (stub_entry->target_section != data->writing_section | |
4563a860 | 14750 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
48229727 JB |
14751 | return TRUE; |
14752 | ||
14753 | contents = data->contents; | |
14754 | ||
14755 | veneered_insn_loc = stub_entry->target_section->output_section->vma | |
14756 | + stub_entry->target_section->output_offset | |
14757 | + stub_entry->target_value; | |
14758 | ||
14759 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
14760 | + stub_entry->stub_sec->output_offset | |
14761 | + stub_entry->stub_offset; | |
14762 | ||
14763 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
14764 | veneered_insn_loc &= ~3u; | |
14765 | ||
14766 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
14767 | ||
14768 | abfd = stub_entry->target_section->owner; | |
91d6fa6a | 14769 | target = stub_entry->target_value; |
48229727 JB |
14770 | |
14771 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
14772 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
14773 | This check is just to be on the safe side... */ | |
14774 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
14775 | { | |
14776 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is " | |
14777 | "allocated in unsafe location"), abfd); | |
14778 | return FALSE; | |
14779 | } | |
14780 | ||
14781 | switch (stub_entry->stub_type) | |
14782 | { | |
14783 | case arm_stub_a8_veneer_b: | |
14784 | case arm_stub_a8_veneer_b_cond: | |
14785 | branch_insn = 0xf0009000; | |
14786 | goto jump24; | |
14787 | ||
14788 | case arm_stub_a8_veneer_blx: | |
14789 | branch_insn = 0xf000e800; | |
14790 | goto jump24; | |
14791 | ||
14792 | case arm_stub_a8_veneer_bl: | |
14793 | { | |
14794 | unsigned int i1, j1, i2, j2, s; | |
14795 | ||
14796 | branch_insn = 0xf000d000; | |
14797 | ||
14798 | jump24: | |
14799 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
14800 | { | |
14801 | /* There's not much we can do apart from complain if this | |
14802 | happens. */ | |
14803 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out " | |
14804 | "of range (input file too large)"), abfd); | |
14805 | return FALSE; | |
14806 | } | |
14807 | ||
14808 | /* i1 = not(j1 eor s), so: | |
14809 | not i1 = j1 eor s | |
14810 | j1 = (not i1) eor s. */ | |
14811 | ||
14812 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
14813 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
14814 | i2 = (branch_offset >> 22) & 1; | |
14815 | i1 = (branch_offset >> 23) & 1; | |
14816 | s = (branch_offset >> 24) & 1; | |
14817 | j1 = (!i1) ^ s; | |
14818 | j2 = (!i2) ^ s; | |
14819 | branch_insn |= j2 << 11; | |
14820 | branch_insn |= j1 << 13; | |
14821 | branch_insn |= s << 26; | |
14822 | } | |
14823 | break; | |
14824 | ||
14825 | default: | |
14826 | BFD_FAIL (); | |
14827 | return FALSE; | |
14828 | } | |
14829 | ||
91d6fa6a NC |
14830 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]); |
14831 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]); | |
48229727 JB |
14832 | |
14833 | return TRUE; | |
14834 | } | |
14835 | ||
e489d0ae PB |
14836 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
14837 | written out as normal. */ | |
14838 | ||
14839 | static bfd_boolean | |
c7b8f16e | 14840 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
14841 | struct bfd_link_info *link_info, |
14842 | asection *sec, | |
e489d0ae PB |
14843 | bfd_byte *contents) |
14844 | { | |
48229727 | 14845 | unsigned int mapcount, errcount; |
8e3de13a | 14846 | _arm_elf_section_data *arm_data; |
c7b8f16e | 14847 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 14848 | elf32_arm_section_map *map; |
c7b8f16e | 14849 | elf32_vfp11_erratum_list *errnode; |
e489d0ae PB |
14850 | bfd_vma ptr; |
14851 | bfd_vma end; | |
c7b8f16e | 14852 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 14853 | bfd_byte tmp; |
48229727 | 14854 | unsigned int i; |
57e8b36a | 14855 | |
4dfe6ac6 NC |
14856 | if (globals == NULL) |
14857 | return FALSE; | |
14858 | ||
8e3de13a NC |
14859 | /* If this section has not been allocated an _arm_elf_section_data |
14860 | structure then we cannot record anything. */ | |
14861 | arm_data = get_arm_elf_section_data (sec); | |
14862 | if (arm_data == NULL) | |
14863 | return FALSE; | |
14864 | ||
14865 | mapcount = arm_data->mapcount; | |
14866 | map = arm_data->map; | |
c7b8f16e JB |
14867 | errcount = arm_data->erratumcount; |
14868 | ||
14869 | if (errcount != 0) | |
14870 | { | |
14871 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
14872 | ||
14873 | for (errnode = arm_data->erratumlist; errnode != 0; | |
14874 | errnode = errnode->next) | |
14875 | { | |
91d6fa6a | 14876 | bfd_vma target = errnode->vma - offset; |
c7b8f16e JB |
14877 | |
14878 | switch (errnode->type) | |
14879 | { | |
14880 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
14881 | { | |
14882 | bfd_vma branch_to_veneer; | |
14883 | /* Original condition code of instruction, plus bit mask for | |
14884 | ARM B instruction. */ | |
14885 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
14886 | | 0x0a000000; | |
14887 | ||
14888 | /* The instruction is before the label. */ | |
91d6fa6a | 14889 | target -= 4; |
c7b8f16e JB |
14890 | |
14891 | /* Above offset included in -4 below. */ | |
14892 | branch_to_veneer = errnode->u.b.veneer->vma | |
14893 | - errnode->vma - 4; | |
14894 | ||
14895 | if ((signed) branch_to_veneer < -(1 << 25) | |
14896 | || (signed) branch_to_veneer >= (1 << 25)) | |
14897 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
14898 | "range"), output_bfd); | |
14899 | ||
14900 | insn |= (branch_to_veneer >> 2) & 0xffffff; | |
91d6fa6a NC |
14901 | contents[endianflip ^ target] = insn & 0xff; |
14902 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
14903 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
14904 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
14905 | } |
14906 | break; | |
14907 | ||
14908 | case VFP11_ERRATUM_ARM_VENEER: | |
14909 | { | |
14910 | bfd_vma branch_from_veneer; | |
14911 | unsigned int insn; | |
14912 | ||
14913 | /* Take size of veneer into account. */ | |
14914 | branch_from_veneer = errnode->u.v.branch->vma | |
14915 | - errnode->vma - 12; | |
14916 | ||
14917 | if ((signed) branch_from_veneer < -(1 << 25) | |
14918 | || (signed) branch_from_veneer >= (1 << 25)) | |
14919 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
14920 | "range"), output_bfd); | |
14921 | ||
14922 | /* Original instruction. */ | |
14923 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
91d6fa6a NC |
14924 | contents[endianflip ^ target] = insn & 0xff; |
14925 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
14926 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
14927 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
14928 | |
14929 | /* Branch back to insn after original insn. */ | |
14930 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
91d6fa6a NC |
14931 | contents[endianflip ^ (target + 4)] = insn & 0xff; |
14932 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
14933 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
14934 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
14935 | } |
14936 | break; | |
14937 | ||
14938 | default: | |
14939 | abort (); | |
14940 | } | |
14941 | } | |
14942 | } | |
e489d0ae | 14943 | |
2468f9c9 PB |
14944 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
14945 | { | |
14946 | arm_unwind_table_edit *edit_node | |
14947 | = arm_data->u.exidx.unwind_edit_list; | |
14948 | /* Now, sec->size is the size of the section we will write. The original | |
14949 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND | |
14950 | markers) was sec->rawsize. (This isn't the case if we perform no | |
14951 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 14952 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
14953 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
14954 | unsigned int in_index, out_index; | |
14955 | bfd_vma add_to_offsets = 0; | |
14956 | ||
14957 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) | |
14958 | { | |
14959 | if (edit_node) | |
14960 | { | |
14961 | unsigned int edit_index = edit_node->index; | |
14962 | ||
14963 | if (in_index < edit_index && in_index * 8 < input_size) | |
14964 | { | |
14965 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
14966 | contents + in_index * 8, add_to_offsets); | |
14967 | out_index++; | |
14968 | in_index++; | |
14969 | } | |
14970 | else if (in_index == edit_index | |
14971 | || (in_index * 8 >= input_size | |
14972 | && edit_index == UINT_MAX)) | |
14973 | { | |
14974 | switch (edit_node->type) | |
14975 | { | |
14976 | case DELETE_EXIDX_ENTRY: | |
14977 | in_index++; | |
14978 | add_to_offsets += 8; | |
14979 | break; | |
14980 | ||
14981 | case INSERT_EXIDX_CANTUNWIND_AT_END: | |
14982 | { | |
14983 | asection *text_sec = edit_node->linked_section; | |
14984 | bfd_vma text_offset = text_sec->output_section->vma | |
14985 | + text_sec->output_offset | |
14986 | + text_sec->size; | |
14987 | bfd_vma exidx_offset = offset + out_index * 8; | |
14988 | unsigned long prel31_offset; | |
14989 | ||
14990 | /* Note: this is meant to be equivalent to an | |
14991 | R_ARM_PREL31 relocation. These synthetic | |
14992 | EXIDX_CANTUNWIND markers are not relocated by the | |
14993 | usual BFD method. */ | |
14994 | prel31_offset = (text_offset - exidx_offset) | |
14995 | & 0x7ffffffful; | |
14996 | ||
14997 | /* First address we can't unwind. */ | |
14998 | bfd_put_32 (output_bfd, prel31_offset, | |
14999 | &edited_contents[out_index * 8]); | |
15000 | ||
15001 | /* Code for EXIDX_CANTUNWIND. */ | |
15002 | bfd_put_32 (output_bfd, 0x1, | |
15003 | &edited_contents[out_index * 8 + 4]); | |
15004 | ||
15005 | out_index++; | |
15006 | add_to_offsets -= 8; | |
15007 | } | |
15008 | break; | |
15009 | } | |
15010 | ||
15011 | edit_node = edit_node->next; | |
15012 | } | |
15013 | } | |
15014 | else | |
15015 | { | |
15016 | /* No more edits, copy remaining entries verbatim. */ | |
15017 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
15018 | contents + in_index * 8, add_to_offsets); | |
15019 | out_index++; | |
15020 | in_index++; | |
15021 | } | |
15022 | } | |
15023 | ||
15024 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
15025 | bfd_set_section_contents (output_bfd, sec->output_section, | |
15026 | edited_contents, | |
15027 | (file_ptr) sec->output_offset, sec->size); | |
15028 | ||
15029 | return TRUE; | |
15030 | } | |
15031 | ||
48229727 JB |
15032 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
15033 | if (globals->fix_cortex_a8) | |
15034 | { | |
15035 | struct a8_branch_to_stub_data data; | |
15036 | ||
15037 | data.writing_section = sec; | |
15038 | data.contents = contents; | |
15039 | ||
15040 | bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub, | |
15041 | &data); | |
15042 | } | |
15043 | ||
e489d0ae PB |
15044 | if (mapcount == 0) |
15045 | return FALSE; | |
15046 | ||
c7b8f16e | 15047 | if (globals->byteswap_code) |
e489d0ae | 15048 | { |
c7b8f16e | 15049 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 15050 | |
c7b8f16e JB |
15051 | ptr = map[0].vma; |
15052 | for (i = 0; i < mapcount; i++) | |
15053 | { | |
15054 | if (i == mapcount - 1) | |
15055 | end = sec->size; | |
15056 | else | |
15057 | end = map[i + 1].vma; | |
e489d0ae | 15058 | |
c7b8f16e | 15059 | switch (map[i].type) |
e489d0ae | 15060 | { |
c7b8f16e JB |
15061 | case 'a': |
15062 | /* Byte swap code words. */ | |
15063 | while (ptr + 3 < end) | |
15064 | { | |
15065 | tmp = contents[ptr]; | |
15066 | contents[ptr] = contents[ptr + 3]; | |
15067 | contents[ptr + 3] = tmp; | |
15068 | tmp = contents[ptr + 1]; | |
15069 | contents[ptr + 1] = contents[ptr + 2]; | |
15070 | contents[ptr + 2] = tmp; | |
15071 | ptr += 4; | |
15072 | } | |
15073 | break; | |
e489d0ae | 15074 | |
c7b8f16e JB |
15075 | case 't': |
15076 | /* Byte swap code halfwords. */ | |
15077 | while (ptr + 1 < end) | |
15078 | { | |
15079 | tmp = contents[ptr]; | |
15080 | contents[ptr] = contents[ptr + 1]; | |
15081 | contents[ptr + 1] = tmp; | |
15082 | ptr += 2; | |
15083 | } | |
15084 | break; | |
15085 | ||
15086 | case 'd': | |
15087 | /* Leave data alone. */ | |
15088 | break; | |
15089 | } | |
15090 | ptr = end; | |
15091 | } | |
e489d0ae | 15092 | } |
8e3de13a | 15093 | |
93204d3a | 15094 | free (map); |
47b2e99c | 15095 | arm_data->mapcount = -1; |
c7b8f16e | 15096 | arm_data->mapsize = 0; |
8e3de13a | 15097 | arm_data->map = NULL; |
8e3de13a | 15098 | |
e489d0ae PB |
15099 | return FALSE; |
15100 | } | |
15101 | ||
0beaef2b PB |
15102 | /* Mangle thumb function symbols as we read them in. */ |
15103 | ||
8384fb8f | 15104 | static bfd_boolean |
0beaef2b PB |
15105 | elf32_arm_swap_symbol_in (bfd * abfd, |
15106 | const void *psrc, | |
15107 | const void *pshn, | |
15108 | Elf_Internal_Sym *dst) | |
15109 | { | |
8384fb8f AM |
15110 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
15111 | return FALSE; | |
0beaef2b PB |
15112 | |
15113 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
35fc36a8 | 15114 | the address. */ |
34e77a92 RS |
15115 | if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC |
15116 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) | |
0beaef2b PB |
15117 | && (dst->st_value & 1)) |
15118 | { | |
0beaef2b | 15119 | dst->st_value &= ~(bfd_vma) 1; |
35fc36a8 RS |
15120 | dst->st_target_internal = ST_BRANCH_TO_THUMB; |
15121 | } | |
15122 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) | |
15123 | { | |
15124 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); | |
15125 | dst->st_target_internal = ST_BRANCH_TO_THUMB; | |
0beaef2b | 15126 | } |
35fc36a8 RS |
15127 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
15128 | dst->st_target_internal = ST_BRANCH_LONG; | |
15129 | else | |
15130 | dst->st_target_internal = ST_BRANCH_TO_ARM; | |
15131 | ||
8384fb8f | 15132 | return TRUE; |
0beaef2b PB |
15133 | } |
15134 | ||
15135 | ||
15136 | /* Mangle thumb function symbols as we write them out. */ | |
15137 | ||
15138 | static void | |
15139 | elf32_arm_swap_symbol_out (bfd *abfd, | |
15140 | const Elf_Internal_Sym *src, | |
15141 | void *cdst, | |
15142 | void *shndx) | |
15143 | { | |
15144 | Elf_Internal_Sym newsym; | |
15145 | ||
15146 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
15147 | of the address set, as per the new EABI. We do this unconditionally | |
15148 | because objcopy does not set the elf header flags until after | |
15149 | it writes out the symbol table. */ | |
35fc36a8 | 15150 | if (src->st_target_internal == ST_BRANCH_TO_THUMB) |
0beaef2b PB |
15151 | { |
15152 | newsym = *src; | |
34e77a92 RS |
15153 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
15154 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad PB |
15155 | if (newsym.st_shndx != SHN_UNDEF) |
15156 | { | |
15157 | /* Do this only for defined symbols. At link type, the static | |
15158 | linker will simulate the work of dynamic linker of resolving | |
15159 | symbols and will carry over the thumbness of found symbols to | |
15160 | the output symbol table. It's not clear how it happens, but | |
b0fead2b | 15161 | the thumbness of undefined symbols can well be different at |
0fa3dcad PB |
15162 | runtime, and writing '1' for them will be confusing for users |
15163 | and possibly for dynamic linker itself. | |
15164 | */ | |
15165 | newsym.st_value |= 1; | |
15166 | } | |
906e58ca | 15167 | |
0beaef2b PB |
15168 | src = &newsym; |
15169 | } | |
15170 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
15171 | } | |
15172 | ||
b294bdf8 MM |
15173 | /* Add the PT_ARM_EXIDX program header. */ |
15174 | ||
15175 | static bfd_boolean | |
906e58ca | 15176 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
15177 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
15178 | { | |
15179 | struct elf_segment_map *m; | |
15180 | asection *sec; | |
15181 | ||
15182 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
15183 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
15184 | { | |
15185 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
15186 | want to add another one. This situation arises when running | |
15187 | "strip"; the input binary already has the header. */ | |
15188 | m = elf_tdata (abfd)->segment_map; | |
15189 | while (m && m->p_type != PT_ARM_EXIDX) | |
15190 | m = m->next; | |
15191 | if (!m) | |
15192 | { | |
21d799b5 NC |
15193 | m = (struct elf_segment_map *) |
15194 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); | |
b294bdf8 MM |
15195 | if (m == NULL) |
15196 | return FALSE; | |
15197 | m->p_type = PT_ARM_EXIDX; | |
15198 | m->count = 1; | |
15199 | m->sections[0] = sec; | |
15200 | ||
15201 | m->next = elf_tdata (abfd)->segment_map; | |
15202 | elf_tdata (abfd)->segment_map = m; | |
15203 | } | |
15204 | } | |
15205 | ||
15206 | return TRUE; | |
15207 | } | |
15208 | ||
15209 | /* We may add a PT_ARM_EXIDX program header. */ | |
15210 | ||
15211 | static int | |
a6b96beb AM |
15212 | elf32_arm_additional_program_headers (bfd *abfd, |
15213 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
15214 | { |
15215 | asection *sec; | |
15216 | ||
15217 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
15218 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
15219 | return 1; | |
15220 | else | |
15221 | return 0; | |
15222 | } | |
15223 | ||
34e77a92 RS |
15224 | /* Hook called by the linker routine which adds symbols from an object |
15225 | file. */ | |
15226 | ||
15227 | static bfd_boolean | |
15228 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, | |
15229 | Elf_Internal_Sym *sym, const char **namep, | |
15230 | flagword *flagsp, asection **secp, bfd_vma *valp) | |
15231 | { | |
15232 | if ((abfd->flags & DYNAMIC) == 0 | |
15233 | && ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC) | |
15234 | elf_tdata (info->output_bfd)->has_ifunc_symbols = TRUE; | |
15235 | ||
15236 | if (elf32_arm_hash_table (info)->vxworks_p | |
15237 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, | |
15238 | flagsp, secp, valp)) | |
15239 | return FALSE; | |
15240 | ||
15241 | return TRUE; | |
15242 | } | |
15243 | ||
0beaef2b | 15244 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
15245 | const struct elf_size_info elf32_arm_size_info = |
15246 | { | |
0beaef2b PB |
15247 | sizeof (Elf32_External_Ehdr), |
15248 | sizeof (Elf32_External_Phdr), | |
15249 | sizeof (Elf32_External_Shdr), | |
15250 | sizeof (Elf32_External_Rel), | |
15251 | sizeof (Elf32_External_Rela), | |
15252 | sizeof (Elf32_External_Sym), | |
15253 | sizeof (Elf32_External_Dyn), | |
15254 | sizeof (Elf_External_Note), | |
15255 | 4, | |
15256 | 1, | |
15257 | 32, 2, | |
15258 | ELFCLASS32, EV_CURRENT, | |
15259 | bfd_elf32_write_out_phdrs, | |
15260 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 15261 | bfd_elf32_checksum_contents, |
0beaef2b PB |
15262 | bfd_elf32_write_relocs, |
15263 | elf32_arm_swap_symbol_in, | |
15264 | elf32_arm_swap_symbol_out, | |
15265 | bfd_elf32_slurp_reloc_table, | |
15266 | bfd_elf32_slurp_symbol_table, | |
15267 | bfd_elf32_swap_dyn_in, | |
15268 | bfd_elf32_swap_dyn_out, | |
15269 | bfd_elf32_swap_reloc_in, | |
15270 | bfd_elf32_swap_reloc_out, | |
15271 | bfd_elf32_swap_reloca_in, | |
15272 | bfd_elf32_swap_reloca_out | |
15273 | }; | |
15274 | ||
252b5132 | 15275 | #define ELF_ARCH bfd_arch_arm |
ae95ffa6 | 15276 | #define ELF_TARGET_ID ARM_ELF_DATA |
252b5132 | 15277 | #define ELF_MACHINE_CODE EM_ARM |
d0facd1b NC |
15278 | #ifdef __QNXTARGET__ |
15279 | #define ELF_MAXPAGESIZE 0x1000 | |
15280 | #else | |
f21f3fe0 | 15281 | #define ELF_MAXPAGESIZE 0x8000 |
d0facd1b | 15282 | #endif |
b1342370 | 15283 | #define ELF_MINPAGESIZE 0x1000 |
24718e3b | 15284 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 15285 | |
ba93b8ac DJ |
15286 | #define bfd_elf32_mkobject elf32_arm_mkobject |
15287 | ||
99e4ae17 AJ |
15288 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
15289 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
15290 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
15291 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
15292 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create | |
906e58ca | 15293 | #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free |
dc810e39 | 15294 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
157090f7 | 15295 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
252b5132 | 15296 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
4ab527b0 | 15297 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
e489d0ae | 15298 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 15299 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
3e6b1042 | 15300 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
252b5132 RH |
15301 | |
15302 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type | |
15303 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook | |
6a5bb875 | 15304 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
252b5132 RH |
15305 | #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook |
15306 | #define elf_backend_check_relocs elf32_arm_check_relocs | |
dc810e39 | 15307 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 15308 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 15309 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
5e681ec4 | 15310 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
15311 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
15312 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
15313 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
0855e32b | 15314 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
74541ad4 | 15315 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ba96a88f | 15316 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
99e4ae17 | 15317 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 15318 | #define elf_backend_object_p elf32_arm_object_p |
e16bb312 | 15319 | #define elf_backend_section_flags elf32_arm_section_flags |
40a18ebd NC |
15320 | #define elf_backend_fake_sections elf32_arm_fake_sections |
15321 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
e16bb312 | 15322 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
5e681ec4 | 15323 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol |
0beaef2b | 15324 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 15325 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
906e58ca NC |
15326 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
15327 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
15328 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing | |
34e77a92 | 15329 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
906e58ca NC |
15330 | |
15331 | #define elf_backend_can_refcount 1 | |
15332 | #define elf_backend_can_gc_sections 1 | |
15333 | #define elf_backend_plt_readonly 1 | |
15334 | #define elf_backend_want_got_plt 1 | |
15335 | #define elf_backend_want_plt_sym 0 | |
15336 | #define elf_backend_may_use_rel_p 1 | |
15337 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 15338 | #define elf_backend_default_use_rela_p 0 |
252b5132 | 15339 | |
04f7c78d | 15340 | #define elf_backend_got_header_size 12 |
04f7c78d | 15341 | |
906e58ca NC |
15342 | #undef elf_backend_obj_attrs_vendor |
15343 | #define elf_backend_obj_attrs_vendor "aeabi" | |
15344 | #undef elf_backend_obj_attrs_section | |
15345 | #define elf_backend_obj_attrs_section ".ARM.attributes" | |
15346 | #undef elf_backend_obj_attrs_arg_type | |
15347 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type | |
15348 | #undef elf_backend_obj_attrs_section_type | |
104d59d1 | 15349 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
5aa6ff7c | 15350 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
e8b36cd1 | 15351 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown |
104d59d1 | 15352 | |
252b5132 | 15353 | #include "elf32-target.h" |
7f266840 | 15354 | |
906e58ca | 15355 | /* VxWorks Targets. */ |
4e7fd91e | 15356 | |
906e58ca | 15357 | #undef TARGET_LITTLE_SYM |
4e7fd91e | 15358 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec |
906e58ca | 15359 | #undef TARGET_LITTLE_NAME |
4e7fd91e | 15360 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" |
906e58ca | 15361 | #undef TARGET_BIG_SYM |
4e7fd91e | 15362 | #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec |
906e58ca | 15363 | #undef TARGET_BIG_NAME |
4e7fd91e PB |
15364 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" |
15365 | ||
15366 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
15367 | appropriately for VxWorks. */ | |
906e58ca | 15368 | |
4e7fd91e PB |
15369 | static struct bfd_link_hash_table * |
15370 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
15371 | { | |
15372 | struct bfd_link_hash_table *ret; | |
15373 | ||
15374 | ret = elf32_arm_link_hash_table_create (abfd); | |
15375 | if (ret) | |
15376 | { | |
15377 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 15378 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e | 15379 | htab->use_rel = 0; |
00a97672 | 15380 | htab->vxworks_p = 1; |
4e7fd91e PB |
15381 | } |
15382 | return ret; | |
906e58ca | 15383 | } |
4e7fd91e | 15384 | |
00a97672 RS |
15385 | static void |
15386 | elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) | |
15387 | { | |
15388 | elf32_arm_final_write_processing (abfd, linker); | |
15389 | elf_vxworks_final_write_processing (abfd, linker); | |
15390 | } | |
15391 | ||
906e58ca | 15392 | #undef elf32_bed |
4e7fd91e PB |
15393 | #define elf32_bed elf32_arm_vxworks_bed |
15394 | ||
906e58ca NC |
15395 | #undef bfd_elf32_bfd_link_hash_table_create |
15396 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
906e58ca NC |
15397 | #undef elf_backend_final_write_processing |
15398 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
15399 | #undef elf_backend_emit_relocs | |
15400 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs | |
4e7fd91e | 15401 | |
906e58ca | 15402 | #undef elf_backend_may_use_rel_p |
00a97672 | 15403 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 15404 | #undef elf_backend_may_use_rela_p |
00a97672 | 15405 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 15406 | #undef elf_backend_default_use_rela_p |
00a97672 | 15407 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 15408 | #undef elf_backend_want_plt_sym |
00a97672 | 15409 | #define elf_backend_want_plt_sym 1 |
906e58ca | 15410 | #undef ELF_MAXPAGESIZE |
00a97672 | 15411 | #define ELF_MAXPAGESIZE 0x1000 |
4e7fd91e PB |
15412 | |
15413 | #include "elf32-target.h" | |
15414 | ||
15415 | ||
21d799b5 NC |
15416 | /* Merge backend specific data from an object file to the output |
15417 | object file when linking. */ | |
15418 | ||
15419 | static bfd_boolean | |
15420 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
15421 | { | |
15422 | flagword out_flags; | |
15423 | flagword in_flags; | |
15424 | bfd_boolean flags_compatible = TRUE; | |
15425 | asection *sec; | |
15426 | ||
15427 | /* Check if we have the same endianess. */ | |
15428 | if (! _bfd_generic_verify_endian_match (ibfd, obfd)) | |
15429 | return FALSE; | |
15430 | ||
15431 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
15432 | return TRUE; | |
15433 | ||
15434 | if (!elf32_arm_merge_eabi_attributes (ibfd, obfd)) | |
15435 | return FALSE; | |
15436 | ||
15437 | /* The input BFD must have had its flags initialised. */ | |
15438 | /* The following seems bogus to me -- The flags are initialized in | |
15439 | the assembler but I don't think an elf_flags_init field is | |
15440 | written into the object. */ | |
15441 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
15442 | ||
15443 | in_flags = elf_elfheader (ibfd)->e_flags; | |
15444 | out_flags = elf_elfheader (obfd)->e_flags; | |
15445 | ||
15446 | /* In theory there is no reason why we couldn't handle this. However | |
15447 | in practice it isn't even close to working and there is no real | |
15448 | reason to want it. */ | |
15449 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
15450 | && !(ibfd->flags & DYNAMIC) | |
15451 | && (in_flags & EF_ARM_BE8)) | |
15452 | { | |
15453 | _bfd_error_handler (_("error: %B is already in final BE8 format"), | |
15454 | ibfd); | |
15455 | return FALSE; | |
15456 | } | |
15457 | ||
15458 | if (!elf_flags_init (obfd)) | |
15459 | { | |
15460 | /* If the input is the default architecture and had the default | |
15461 | flags then do not bother setting the flags for the output | |
15462 | architecture, instead allow future merges to do this. If no | |
15463 | future merges ever set these flags then they will retain their | |
15464 | uninitialised values, which surprise surprise, correspond | |
15465 | to the default values. */ | |
15466 | if (bfd_get_arch_info (ibfd)->the_default | |
15467 | && elf_elfheader (ibfd)->e_flags == 0) | |
15468 | return TRUE; | |
15469 | ||
15470 | elf_flags_init (obfd) = TRUE; | |
15471 | elf_elfheader (obfd)->e_flags = in_flags; | |
15472 | ||
15473 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
15474 | && bfd_get_arch_info (obfd)->the_default) | |
15475 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
15476 | ||
15477 | return TRUE; | |
15478 | } | |
15479 | ||
15480 | /* Determine what should happen if the input ARM architecture | |
15481 | does not match the output ARM architecture. */ | |
15482 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
15483 | return FALSE; | |
15484 | ||
15485 | /* Identical flags must be compatible. */ | |
15486 | if (in_flags == out_flags) | |
15487 | return TRUE; | |
15488 | ||
15489 | /* Check to see if the input BFD actually contains any sections. If | |
15490 | not, its flags may not have been initialised either, but it | |
15491 | cannot actually cause any incompatiblity. Do not short-circuit | |
15492 | dynamic objects; their section list may be emptied by | |
15493 | elf_link_add_object_symbols. | |
15494 | ||
15495 | Also check to see if there are no code sections in the input. | |
15496 | In this case there is no need to check for code specific flags. | |
15497 | XXX - do we need to worry about floating-point format compatability | |
15498 | in data sections ? */ | |
15499 | if (!(ibfd->flags & DYNAMIC)) | |
15500 | { | |
15501 | bfd_boolean null_input_bfd = TRUE; | |
15502 | bfd_boolean only_data_sections = TRUE; | |
15503 | ||
15504 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
15505 | { | |
15506 | /* Ignore synthetic glue sections. */ | |
15507 | if (strcmp (sec->name, ".glue_7") | |
15508 | && strcmp (sec->name, ".glue_7t")) | |
15509 | { | |
15510 | if ((bfd_get_section_flags (ibfd, sec) | |
15511 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
15512 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
15513 | only_data_sections = FALSE; | |
15514 | ||
15515 | null_input_bfd = FALSE; | |
15516 | break; | |
15517 | } | |
15518 | } | |
15519 | ||
15520 | if (null_input_bfd || only_data_sections) | |
15521 | return TRUE; | |
15522 | } | |
15523 | ||
15524 | /* Complain about various flag mismatches. */ | |
15525 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
15526 | EF_ARM_EABI_VERSION (out_flags))) | |
15527 | { | |
15528 | _bfd_error_handler | |
15529 | (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"), | |
15530 | ibfd, obfd, | |
15531 | (in_flags & EF_ARM_EABIMASK) >> 24, | |
15532 | (out_flags & EF_ARM_EABIMASK) >> 24); | |
15533 | return FALSE; | |
15534 | } | |
15535 | ||
15536 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
15537 | /* VxWorks libraries do not use these flags. */ | |
15538 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
15539 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
15540 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
15541 | { | |
15542 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
15543 | { | |
15544 | _bfd_error_handler | |
15545 | (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"), | |
15546 | ibfd, obfd, | |
15547 | in_flags & EF_ARM_APCS_26 ? 26 : 32, | |
15548 | out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
15549 | flags_compatible = FALSE; | |
15550 | } | |
15551 | ||
15552 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
15553 | { | |
15554 | if (in_flags & EF_ARM_APCS_FLOAT) | |
15555 | _bfd_error_handler | |
15556 | (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"), | |
15557 | ibfd, obfd); | |
15558 | else | |
15559 | _bfd_error_handler | |
15560 | (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"), | |
15561 | ibfd, obfd); | |
15562 | ||
15563 | flags_compatible = FALSE; | |
15564 | } | |
15565 | ||
15566 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
15567 | { | |
15568 | if (in_flags & EF_ARM_VFP_FLOAT) | |
15569 | _bfd_error_handler | |
15570 | (_("error: %B uses VFP instructions, whereas %B does not"), | |
15571 | ibfd, obfd); | |
15572 | else | |
15573 | _bfd_error_handler | |
15574 | (_("error: %B uses FPA instructions, whereas %B does not"), | |
15575 | ibfd, obfd); | |
15576 | ||
15577 | flags_compatible = FALSE; | |
15578 | } | |
15579 | ||
15580 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
15581 | { | |
15582 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
15583 | _bfd_error_handler | |
15584 | (_("error: %B uses Maverick instructions, whereas %B does not"), | |
15585 | ibfd, obfd); | |
15586 | else | |
15587 | _bfd_error_handler | |
15588 | (_("error: %B does not use Maverick instructions, whereas %B does"), | |
15589 | ibfd, obfd); | |
15590 | ||
15591 | flags_compatible = FALSE; | |
15592 | } | |
15593 | ||
15594 | #ifdef EF_ARM_SOFT_FLOAT | |
15595 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
15596 | { | |
15597 | /* We can allow interworking between code that is VFP format | |
15598 | layout, and uses either soft float or integer regs for | |
15599 | passing floating point arguments and results. We already | |
15600 | know that the APCS_FLOAT flags match; similarly for VFP | |
15601 | flags. */ | |
15602 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
15603 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
15604 | { | |
15605 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
15606 | _bfd_error_handler | |
15607 | (_("error: %B uses software FP, whereas %B uses hardware FP"), | |
15608 | ibfd, obfd); | |
15609 | else | |
15610 | _bfd_error_handler | |
15611 | (_("error: %B uses hardware FP, whereas %B uses software FP"), | |
15612 | ibfd, obfd); | |
15613 | ||
15614 | flags_compatible = FALSE; | |
15615 | } | |
15616 | } | |
15617 | #endif | |
15618 | ||
15619 | /* Interworking mismatch is only a warning. */ | |
15620 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
15621 | { | |
15622 | if (in_flags & EF_ARM_INTERWORK) | |
15623 | { | |
15624 | _bfd_error_handler | |
15625 | (_("Warning: %B supports interworking, whereas %B does not"), | |
15626 | ibfd, obfd); | |
15627 | } | |
15628 | else | |
15629 | { | |
15630 | _bfd_error_handler | |
15631 | (_("Warning: %B does not support interworking, whereas %B does"), | |
15632 | ibfd, obfd); | |
15633 | } | |
15634 | } | |
15635 | } | |
15636 | ||
15637 | return flags_compatible; | |
15638 | } | |
15639 | ||
15640 | ||
906e58ca | 15641 | /* Symbian OS Targets. */ |
7f266840 | 15642 | |
906e58ca | 15643 | #undef TARGET_LITTLE_SYM |
7f266840 | 15644 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec |
906e58ca | 15645 | #undef TARGET_LITTLE_NAME |
7f266840 | 15646 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" |
906e58ca | 15647 | #undef TARGET_BIG_SYM |
7f266840 | 15648 | #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec |
906e58ca | 15649 | #undef TARGET_BIG_NAME |
7f266840 DJ |
15650 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" |
15651 | ||
15652 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
15653 | appropriately for Symbian OS. */ | |
906e58ca | 15654 | |
7f266840 DJ |
15655 | static struct bfd_link_hash_table * |
15656 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) | |
15657 | { | |
15658 | struct bfd_link_hash_table *ret; | |
15659 | ||
15660 | ret = elf32_arm_link_hash_table_create (abfd); | |
15661 | if (ret) | |
15662 | { | |
15663 | struct elf32_arm_link_hash_table *htab | |
15664 | = (struct elf32_arm_link_hash_table *)ret; | |
15665 | /* There is no PLT header for Symbian OS. */ | |
15666 | htab->plt_header_size = 0; | |
95720a86 DJ |
15667 | /* The PLT entries are each one instruction and one word. */ |
15668 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); | |
7f266840 | 15669 | htab->symbian_p = 1; |
33bfe774 JB |
15670 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
15671 | htab->use_blx = 1; | |
67687978 | 15672 | htab->root.is_relocatable_executable = 1; |
7f266840 DJ |
15673 | } |
15674 | return ret; | |
906e58ca | 15675 | } |
7f266840 | 15676 | |
b35d266b | 15677 | static const struct bfd_elf_special_section |
551b43fd | 15678 | elf32_arm_symbian_special_sections[] = |
7f266840 | 15679 | { |
5cd3778d MM |
15680 | /* In a BPABI executable, the dynamic linking sections do not go in |
15681 | the loadable read-only segment. The post-linker may wish to | |
15682 | refer to these sections, but they are not part of the final | |
15683 | program image. */ | |
0112cd26 NC |
15684 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
15685 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, | |
15686 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, | |
15687 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, | |
15688 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, | |
5cd3778d MM |
15689 | /* These sections do not need to be writable as the SymbianOS |
15690 | postlinker will arrange things so that no dynamic relocation is | |
15691 | required. */ | |
0112cd26 NC |
15692 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
15693 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, | |
15694 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, | |
15695 | { NULL, 0, 0, 0, 0 } | |
7f266840 DJ |
15696 | }; |
15697 | ||
c3c76620 | 15698 | static void |
906e58ca | 15699 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
a4fd1a8e | 15700 | struct bfd_link_info *link_info) |
c3c76620 MM |
15701 | { |
15702 | /* BPABI objects are never loaded directly by an OS kernel; they are | |
15703 | processed by a postlinker first, into an OS-specific format. If | |
15704 | the D_PAGED bit is set on the file, BFD will align segments on | |
15705 | page boundaries, so that an OS can directly map the file. With | |
15706 | BPABI objects, that just results in wasted space. In addition, | |
15707 | because we clear the D_PAGED bit, map_sections_to_segments will | |
15708 | recognize that the program headers should not be mapped into any | |
15709 | loadable segment. */ | |
15710 | abfd->flags &= ~D_PAGED; | |
906e58ca | 15711 | elf32_arm_begin_write_processing (abfd, link_info); |
c3c76620 | 15712 | } |
7f266840 DJ |
15713 | |
15714 | static bfd_boolean | |
906e58ca | 15715 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
b294bdf8 | 15716 | struct bfd_link_info *info) |
7f266840 DJ |
15717 | { |
15718 | struct elf_segment_map *m; | |
15719 | asection *dynsec; | |
15720 | ||
7f266840 DJ |
15721 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
15722 | segment. However, because the .dynamic section is not marked | |
15723 | with SEC_LOAD, the generic ELF code will not create such a | |
15724 | segment. */ | |
15725 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); | |
15726 | if (dynsec) | |
15727 | { | |
8ded5a0f AM |
15728 | for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) |
15729 | if (m->p_type == PT_DYNAMIC) | |
15730 | break; | |
15731 | ||
15732 | if (m == NULL) | |
15733 | { | |
15734 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); | |
15735 | m->next = elf_tdata (abfd)->segment_map; | |
15736 | elf_tdata (abfd)->segment_map = m; | |
15737 | } | |
7f266840 DJ |
15738 | } |
15739 | ||
b294bdf8 MM |
15740 | /* Also call the generic arm routine. */ |
15741 | return elf32_arm_modify_segment_map (abfd, info); | |
7f266840 DJ |
15742 | } |
15743 | ||
95720a86 DJ |
15744 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
15745 | or (bfd_vma) -1 if it should not be included. */ | |
15746 | ||
15747 | static bfd_vma | |
15748 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, | |
15749 | const arelent *rel ATTRIBUTE_UNUSED) | |
15750 | { | |
15751 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; | |
15752 | } | |
15753 | ||
15754 | ||
8029a119 | 15755 | #undef elf32_bed |
7f266840 DJ |
15756 | #define elf32_bed elf32_arm_symbian_bed |
15757 | ||
15758 | /* The dynamic sections are not allocated on SymbianOS; the postlinker | |
15759 | will process them and then discard them. */ | |
906e58ca | 15760 | #undef ELF_DYNAMIC_SEC_FLAGS |
7f266840 DJ |
15761 | #define ELF_DYNAMIC_SEC_FLAGS \ |
15762 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) | |
15763 | ||
00a97672 | 15764 | #undef elf_backend_emit_relocs |
c3c76620 | 15765 | |
906e58ca NC |
15766 | #undef bfd_elf32_bfd_link_hash_table_create |
15767 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create | |
15768 | #undef elf_backend_special_sections | |
15769 | #define elf_backend_special_sections elf32_arm_symbian_special_sections | |
15770 | #undef elf_backend_begin_write_processing | |
15771 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing | |
15772 | #undef elf_backend_final_write_processing | |
15773 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
15774 | ||
15775 | #undef elf_backend_modify_segment_map | |
7f266840 DJ |
15776 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
15777 | ||
15778 | /* There is no .got section for BPABI objects, and hence no header. */ | |
906e58ca | 15779 | #undef elf_backend_got_header_size |
7f266840 DJ |
15780 | #define elf_backend_got_header_size 0 |
15781 | ||
15782 | /* Similarly, there is no .got.plt section. */ | |
906e58ca | 15783 | #undef elf_backend_want_got_plt |
7f266840 DJ |
15784 | #define elf_backend_want_got_plt 0 |
15785 | ||
906e58ca | 15786 | #undef elf_backend_plt_sym_val |
95720a86 DJ |
15787 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
15788 | ||
906e58ca | 15789 | #undef elf_backend_may_use_rel_p |
00a97672 | 15790 | #define elf_backend_may_use_rel_p 1 |
906e58ca | 15791 | #undef elf_backend_may_use_rela_p |
00a97672 | 15792 | #define elf_backend_may_use_rela_p 0 |
906e58ca | 15793 | #undef elf_backend_default_use_rela_p |
00a97672 | 15794 | #define elf_backend_default_use_rela_p 0 |
906e58ca | 15795 | #undef elf_backend_want_plt_sym |
00a97672 | 15796 | #define elf_backend_want_plt_sym 0 |
906e58ca | 15797 | #undef ELF_MAXPAGESIZE |
00a97672 | 15798 | #define ELF_MAXPAGESIZE 0x8000 |
4e7fd91e | 15799 | |
7f266840 | 15800 | #include "elf32-target.h" |