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bfd/elfnn-aarch64.c: Fix miscalculation of GOTPLT offset for ifunc syms.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
2f47f5fc 2 Copyright 1998-2013 Free Software Foundation, Inc.
252b5132
RH		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
6e6718a3 21#include "sysdep.h"
2468f9c9
PB		 22#include <limits.h>
23
3db64b00 24#include "bfd.h"
6034aab8 25#include "bfd_stdint.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
79f08007
YZ		 65/* The Adjusted Place, as defined by AAELF. */
66#define Pa(X) ((X) & 0xfffffffc)
67
3e6b1042
DJ		 68static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
7f266840
DJ		 73/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
c19d1205 77static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 78{
8029a119 79 /* No relocation. */
7f266840
DJ		 80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
c19d1205 138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 139 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 142 32, /* bitsize */
143 TRUE, /* pc_relative */
7f266840 144 0, /* bitpos */
4962c51a 145 complain_overflow_dont,/* complain_on_overflow */
7f266840 146 bfd_elf_generic_reloc, /* special_function */
4962c51a 147 "R_ARM_LDR_PC_G0", /* name */
7f266840 148 FALSE, /* partial_inplace */
4962c51a
MS		 149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
7f266840
DJ		 152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
00a97672
RS		 179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
7f266840
DJ		 181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
c19d1205 226 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 229 24, /* bitsize */
7f266840
DJ		 230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
c19d1205 234 "R_ARM_THM_CALL", /* name */
7f266840 235 FALSE, /* partial_inplace */
7f6ab9f8
AM		 236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
7f266840
DJ		 238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
c19d1205 254 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 257 32, /* bitsize */
258 FALSE, /* pc_relative */
7f266840
DJ		 259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
c19d1205 262 "R_ARM_BREL_ADJ", /* name */
7f266840 263 FALSE, /* partial_inplace */
c19d1205
ZW		 264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
7f266840 267
0855e32b 268 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 269 0, /* rightshift */
0855e32b
NS		 270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
7f266840
DJ		 272 FALSE, /* pc_relative */
273 0, /* bitpos */
0855e32b 274 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 275 bfd_elf_generic_reloc, /* special_function */
0855e32b 276 "R_ARM_TLS_DESC", /* name */
7f266840 277 FALSE, /* partial_inplace */
0855e32b
NS		 278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
7f266840
DJ		 280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 300 24, /* bitsize */
7f266840
DJ		 301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 315 24, /* bitsize */
7f266840
DJ		 316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
7f6ab9f8
AM		 322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
7f266840
DJ		 324 TRUE), /* pcrel_offset */
325
ba93b8ac 326 /* Dynamic TLS relocations. */
7f266840 327
ba93b8ac 328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
99059e56
RM		 329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
7f266840 341
ba93b8ac 342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
99059e56
RM		 343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
7f266840 355
ba93b8ac 356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
99059e56
RM		 357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
7f266840
DJ		 369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
99059e56
RM		 373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
7f266840
DJ		 385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
99059e56
RM		 387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
7f266840
DJ		 399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
99059e56
RM		 401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
7f266840
DJ		 413
414 HOWTO (R_ARM_RELATIVE, /* type */
99059e56
RM		 415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
7f266840 427
c19d1205 428 HOWTO (R_ARM_GOTOFF32, /* type */
99059e56
RM		 429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
7f266840
DJ		 441
442 HOWTO (R_ARM_GOTPC, /* type */
99059e56
RM		 443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
7f266840
DJ		 455
456 HOWTO (R_ARM_GOT32, /* type */
99059e56
RM		 457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
7f266840
DJ		 469
470 HOWTO (R_ARM_PLT32, /* type */
99059e56
RM		 471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
7f266840
DJ		 483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
c19d1205
ZW		 512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
7f266840 517 0, /* bitpos */
c19d1205 518 complain_overflow_signed,/* complain_on_overflow */
7f266840 519 bfd_elf_generic_reloc, /* special_function */
c19d1205 520 "R_ARM_THM_JUMP24", /* name */
7f266840 521 FALSE, /* partial_inplace */
c19d1205
ZW		 522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
7f266840 525
c19d1205 526 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 527 0, /* rightshift */
c19d1205
ZW		 528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
7f266840
DJ		 530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
c19d1205 534 "R_ARM_BASE_ABS", /* name */
7f266840 535 FALSE, /* partial_inplace */
c19d1205
ZW		 536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
7f266840
DJ		 538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
c19d1205
ZW		 693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
39623e12
PB		 704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
c19d1205
ZW		 706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
39623e12
PB		 718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
c19d1205
ZW		 720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
39623e12
PB		 732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
c19d1205
ZW		 734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
39623e12
PB		 746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
c19d1205
ZW		 748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
2cab6cc3 843 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
2cab6cc3
MS		 847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
c19d1205
ZW		 849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
2cab6cc3 857 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
2cab6cc3
MS		 861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
c19d1205
ZW		 863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
7f266840 892
4962c51a
MS		 893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
c19d1205 1274
c19d1205
ZW		 1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
0855e32b
NS		 1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
c19d1205
ZW		 1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
99059e56
RM		 1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
c19d1205
ZW		 1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
99059e56
RM		 1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
c19d1205
ZW		 1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
ba93b8ac 1544
c19d1205
ZW		 1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
99059e56
RM		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
ba93b8ac 1559
ba93b8ac 1560 HOWTO (R_ARM_TLS_LDM32, /* type */
99059e56
RM		 1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
ba93b8ac 1573
c19d1205 1574 HOWTO (R_ARM_TLS_LDO32, /* type */
99059e56
RM		 1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
ba93b8ac 1587
ba93b8ac 1588 HOWTO (R_ARM_TLS_IE32, /* type */
99059e56
RM		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
7f266840 1601
c19d1205 1602 HOWTO (R_ARM_TLS_LE32, /* type */
99059e56
RM		 1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
7f266840 1615
c19d1205
ZW		 1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
7f266840 1621 0, /* bitpos */
c19d1205 1622 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1623 bfd_elf_generic_reloc, /* special_function */
c19d1205 1624 "R_ARM_TLS_LDO12", /* name */
7f266840 1625 FALSE, /* partial_inplace */
c19d1205
ZW		 1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
7f266840 1629
c19d1205
ZW		 1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
7f266840 1635 0, /* bitpos */
c19d1205 1636 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1637 bfd_elf_generic_reloc, /* special_function */
c19d1205 1638 "R_ARM_TLS_LE12", /* name */
7f266840 1639 FALSE, /* partial_inplace */
c19d1205
ZW		 1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
7f266840 1643
c19d1205 1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
7f266840 1649 0, /* bitpos */
c19d1205 1650 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1651 bfd_elf_generic_reloc, /* special_function */
c19d1205 1652 "R_ARM_TLS_IE12GP", /* name */
7f266840 1653 FALSE, /* partial_inplace */
c19d1205
ZW		 1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
0855e32b 1657
34e77a92 1658 /* 112-127 private relocations. */
0855e32b
NS		 1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
34e77a92
RS		 1675
1676 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
c19d1205
ZW		 1692};
1693
34e77a92
RS		 1694/* 160 onwards: */
1695static reloc_howto_type elf32_arm_howto_table_2[1] =
1696{
1697 HOWTO (R_ARM_IRELATIVE, /* type */
99059e56
RM		 1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
34e77a92 1710};
c19d1205 1711
34e77a92
RS		 1712/* 249-255 extended, currently unused, relocations: */
1713static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1714{
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770};
1771
1772static reloc_howto_type *
1773elf32_arm_howto_from_type (unsigned int r_type)
1774{
906e58ca 1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1776 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1777
34e77a92
RS		 1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
c19d1205 1781 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1784
c19d1205 1785 return NULL;
7f266840
DJ		 1786}
1787
1788static void
1789elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791{
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796}
1797
1798struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804/* All entries in this list must also be present in elf32_arm_howto_table. */
1805static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1893 };
1894
1895static reloc_howto_type *
f1c71a59
ZW		 1896elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
7f266840
DJ		 1898{
1899 unsigned int i;
8029a119 1900
906e58ca 1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1904
c19d1205 1905 return NULL;
7f266840
DJ		 1906}
1907
157090f7
AM		 1908static reloc_howto_type *
1909elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911{
1912 unsigned int i;
1913
906e58ca 1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
906e58ca 1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
34e77a92
RS		 1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
157090f7
AM		 1929 return NULL;
1930}
1931
906e58ca
NC		 1932/* Support for core dump NOTE sections. */
1933
7f266840 1934static bfd_boolean
f1c71a59 1935elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1936{
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
8029a119 1945 case 148: /* Linux/ARM 32-bit. */
7f266840 1946 /* pr_cursig */
228e534f 1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1948
1949 /* pr_pid */
228e534f 1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962}
1963
1964static bfd_boolean
f1c71a59 1965elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1966{
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
8029a119 1972 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1973 elf_tdata (abfd)->core->pid
4395ee08 1974 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1975 elf_tdata (abfd)->core->program
7f266840 1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1977 elf_tdata (abfd)->core->command
7f266840
DJ		 1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
7f266840 1984 {
228e534f 1985 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993}
1994
1f20dca5
UW		 1995static char *
1996elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998{
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041}
2042
7f266840
DJ		 2043#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044#define TARGET_LITTLE_NAME "elf32-littlearm"
2045#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046#define TARGET_BIG_NAME "elf32-bigarm"
2047
2048#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2050#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2051
252b5132
RH		 2052typedef unsigned long int insn32;
2053typedef unsigned short int insn16;
2054
3a4a14e9
PB		 2055/* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
57e8b36a 2057#define INTERWORK_FLAG(abfd) \
3a4a14e9 2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2061
252b5132
RH		 2062/* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
9b485d32 2065 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2066#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
c7b8f16e
JB		 2072#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
845b51d6
PB		 2075#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
7413f23f
DJ		 2078#define STUB_ENTRY_NAME "__%s_veneer"
2079
252b5132
RH		 2080/* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
0855e32b 2084static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2085{
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089};
0855e32b
NS		 2090
2091static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2092{
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
99059e56 2100 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102};
0855e32b 2103
5e681ec4
PB		 2104#ifdef FOUR_WORD_PLT
2105
252b5132
RH		 2106/* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
59f2c4e7 2108 called before the relocation has been set up calls the dynamic
9b485d32 2109 linker first. */
e5a52504 2110static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2111{
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116};
5e681ec4
PB		 2117
2118/* Subsequent entries in a procedure linkage table look like
2119 this. */
e5a52504 2120static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2121{
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126};
5e681ec4
PB		 2127
2128#else
2129
5e681ec4
PB		 2130/* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
e5a52504 2134static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2135{
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141};
252b5132
RH		 2142
2143/* Subsequent entries in a procedure linkage table look like
2144 this. */
e5a52504 2145static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2146{
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150};
5e681ec4
PB		 2151
2152#endif
252b5132 2153
00a97672
RS		 2154/* The format of the first entry in the procedure linkage table
2155 for a VxWorks executable. */
2156static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2157{
2158 0xe52dc008, /* str ip,[sp,#-8]! */
2159 0xe59fc000, /* ldr ip,[pc] */
2160 0xe59cf008, /* ldr pc,[ip,#8] */
2161 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2162};
00a97672
RS		 2163
2164/* The format of subsequent entries in a VxWorks executable. */
2165static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2166{
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xe59cf000, /* ldr pc,[ip] */
2169 0x00000000, /* .long @got */
2170 0xe59fc000, /* ldr ip,[pc] */
2171 0xea000000, /* b _PLT */
2172 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2173};
00a97672
RS		 2174
2175/* The format of entries in a VxWorks shared library. */
2176static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2177{
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe79cf009, /* ldr pc,[ip,r9] */
2180 0x00000000, /* .long @got */
2181 0xe59fc000, /* ldr ip,[pc] */
2182 0xe599f008, /* ldr pc,[r9,#8] */
2183 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2184};
00a97672 2185
b7693d02
DJ		 2186/* An initial stub used if the PLT entry is referenced from Thumb code. */
2187#define PLT_THUMB_STUB_SIZE 4
2188static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2189{
2190 0x4778, /* bx pc */
2191 0x46c0 /* nop */
2192};
b7693d02 2193
e5a52504
MM		 2194/* The entries in a PLT when using a DLL-based target with multiple
2195 address spaces. */
906e58ca 2196static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2197{
2198 0xe51ff004, /* ldr pc, [pc, #-4] */
2199 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2200};
2201
2202/* The first entry in a procedure linkage table looks like
2203 this. It is set up so that any shared library function that is
2204 called before the relocation has been set up calls the dynamic
2205 linker first. */
2206static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2207{
2208 /* First bundle: */
2209 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2210 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2211 0xe08cc00f, /* add ip, ip, pc */
2212 0xe52dc008, /* str ip, [sp, #-8]! */
2213 /* Second bundle: */
edccdf7c
RM		 2214 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2215 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2216 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2217 0xe12fff1c, /* bx ip */
b38cadfb 2218 /* Third bundle: */
edccdf7c
RM		 2219 0xe320f000, /* nop */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
b38cadfb
NC		 2222 /* .Lplt_tail: */
2223 0xe50dc004, /* str ip, [sp, #-4] */
2224 /* Fourth bundle: */
edccdf7c
RM		 2225 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2226 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2227 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2228 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2229};
2230#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2231
2232/* Subsequent entries in a procedure linkage table look like this. */
2233static const bfd_vma elf32_arm_nacl_plt_entry [] =
2234{
2235 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2236 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2237 0xe08cc00f, /* add ip, ip, pc */
2238 0xea000000, /* b .Lplt_tail */
2239};
e5a52504 2240
906e58ca
NC		 2241#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2242#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2243#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2244#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2245#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2246#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2247
461a49ca 2248enum stub_insn_type
b38cadfb
NC		 2249{
2250 THUMB16_TYPE = 1,
2251 THUMB32_TYPE,
2252 ARM_TYPE,
2253 DATA_TYPE
2254};
461a49ca 2255
48229727
JB		 2256#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2257/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2258 is inserted in arm_build_one_stub(). */
2259#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2260#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2261#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2262#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2263#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2264#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2265
2266typedef struct
2267{
b38cadfb
NC		 2268 bfd_vma data;
2269 enum stub_insn_type type;
2270 unsigned int r_type;
2271 int reloc_addend;
461a49ca
DJ		 2272} insn_sequence;
2273
fea2b4d6
CL		 2274/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2275 to reach the stub if necessary. */
461a49ca 2276static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2277{
2278 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2279 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2280};
906e58ca 2281
fea2b4d6
CL		 2282/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2283 available. */
461a49ca 2284static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2285{
2286 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2287 ARM_INSN (0xe12fff1c), /* bx ip */
2288 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2289};
906e58ca 2290
d3626fb0 2291/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2292static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2293{
2294 THUMB16_INSN (0xb401), /* push {r0} */
2295 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2296 THUMB16_INSN (0x4684), /* mov ip, r0 */
2297 THUMB16_INSN (0xbc01), /* pop {r0} */
2298 THUMB16_INSN (0x4760), /* bx ip */
2299 THUMB16_INSN (0xbf00), /* nop */
2300 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2301};
906e58ca 2302
d3626fb0
CL		 2303/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2304 allowed. */
2305static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2306{
2307 THUMB16_INSN (0x4778), /* bx pc */
2308 THUMB16_INSN (0x46c0), /* nop */
2309 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2310 ARM_INSN (0xe12fff1c), /* bx ip */
2311 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2312};
d3626fb0 2313
fea2b4d6
CL		 2314/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2315 available. */
461a49ca 2316static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2317{
2318 THUMB16_INSN (0x4778), /* bx pc */
2319 THUMB16_INSN (0x46c0), /* nop */
2320 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2321 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2322};
906e58ca 2323
fea2b4d6
CL		 2324/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2325 one, when the destination is close enough. */
461a49ca 2326static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2327{
2328 THUMB16_INSN (0x4778), /* bx pc */
2329 THUMB16_INSN (0x46c0), /* nop */
2330 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2331};
c820be07 2332
cf3eccff 2333/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2334 blx to reach the stub if necessary. */
cf3eccff 2335static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2336{
2337 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2338 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2339 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2340};
906e58ca 2341
cf3eccff
DJ		 2342/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2343 blx to reach the stub if necessary. We can not add into pc;
2344 it is not guaranteed to mode switch (different in ARMv6 and
2345 ARMv7). */
2346static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2347{
2348 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2349 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2350 ARM_INSN (0xe12fff1c), /* bx ip */
2351 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2352};
cf3eccff 2353
ebe24dd4
CL		 2354/* V4T ARM -> ARM long branch stub, PIC. */
2355static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2356{
2357 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2358 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2359 ARM_INSN (0xe12fff1c), /* bx ip */
2360 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2361};
ebe24dd4
CL		 2362
2363/* V4T Thumb -> ARM long branch stub, PIC. */
2364static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2365{
2366 THUMB16_INSN (0x4778), /* bx pc */
2367 THUMB16_INSN (0x46c0), /* nop */
2368 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2369 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2370 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2371};
ebe24dd4 2372
d3626fb0
CL		 2373/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2374 architectures. */
ebe24dd4 2375static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2376{
2377 THUMB16_INSN (0xb401), /* push {r0} */
2378 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2379 THUMB16_INSN (0x46fc), /* mov ip, pc */
2380 THUMB16_INSN (0x4484), /* add ip, r0 */
2381 THUMB16_INSN (0xbc01), /* pop {r0} */
2382 THUMB16_INSN (0x4760), /* bx ip */
2383 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2384};
ebe24dd4 2385
d3626fb0
CL		 2386/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2387 allowed. */
2388static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2389{
2390 THUMB16_INSN (0x4778), /* bx pc */
2391 THUMB16_INSN (0x46c0), /* nop */
2392 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2393 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2394 ARM_INSN (0xe12fff1c), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2396};
d3626fb0 2397
0855e32b
NS		 2398/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2399 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2400static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2401{
b38cadfb
NC		 2402 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2403 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2404 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2405};
2406
2407/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2408 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2409static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2410{
b38cadfb
NC		 2411 THUMB16_INSN (0x4778), /* bx pc */
2412 THUMB16_INSN (0x46c0), /* nop */
2413 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2414 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2415 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2416};
2417
7a89b94e
NC		 2418/* NaCl ARM -> ARM long branch stub. */
2419static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2420{
2421 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2422 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2423 ARM_INSN (0xe12fff1c), /* bx ip */
2424 ARM_INSN (0xe320f000), /* nop */
2425 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2426 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2427 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2428 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2429};
2430
2431/* NaCl ARM -> ARM long branch stub, PIC. */
2432static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2433{
2434 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2435 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2436 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2437 ARM_INSN (0xe12fff1c), /* bx ip */
2438 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2439 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2440 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2441 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2442};
2443
2444
48229727
JB		 2445/* Cortex-A8 erratum-workaround stubs. */
2446
2447/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2448 can't use a conditional branch to reach this stub). */
2449
2450static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2451{
2452 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2453 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2454 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2455};
48229727
JB		 2456
2457/* Stub used for b.w and bl.w instructions. */
2458
2459static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2460{
2461 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2462};
48229727
JB		 2463
2464static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2465{
2466 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2467};
48229727
JB		 2468
2469/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2470 instruction (which switches to ARM mode) to point to this stub. Jump to the
2471 real destination using an ARM-mode branch. */
2472
2473static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2474{
2475 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2476};
48229727 2477
9553db3c
NC		 2478/* For each section group there can be a specially created linker section
2479 to hold the stubs for that group. The name of the stub section is based
2480 upon the name of another section within that group with the suffix below
2481 applied.
2482
2483 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2484 create what appeared to be a linker stub section when it actually
2485 contained user code/data. For example, consider this fragment:
b38cadfb 2486
9553db3c
NC		 2487 const char * stubborn_problems[] = { "np" };
2488
2489 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2490 section called:
2491
2492 .data.rel.local.stubborn_problems
2493
2494 This then causes problems in arm32_arm_build_stubs() as it triggers:
2495
2496 // Ignore non-stub sections.
2497 if (!strstr (stub_sec->name, STUB_SUFFIX))
2498 continue;
2499
2500 And so the section would be ignored instead of being processed. Hence
2501 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2502 C identifier. */
2503#define STUB_SUFFIX ".__stub"
906e58ca 2504
738a79f6
CL		 2505/* One entry per long/short branch stub defined above. */
2506#define DEF_STUBS \
2507 DEF_STUB(long_branch_any_any) \
2508 DEF_STUB(long_branch_v4t_arm_thumb) \
2509 DEF_STUB(long_branch_thumb_only) \
2510 DEF_STUB(long_branch_v4t_thumb_thumb) \
2511 DEF_STUB(long_branch_v4t_thumb_arm) \
2512 DEF_STUB(short_branch_v4t_thumb_arm) \
2513 DEF_STUB(long_branch_any_arm_pic) \
2514 DEF_STUB(long_branch_any_thumb_pic) \
2515 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2516 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2517 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2518 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2519 DEF_STUB(long_branch_any_tls_pic) \
2520 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
7a89b94e
NC		 2521 DEF_STUB(long_branch_arm_nacl) \
2522 DEF_STUB(long_branch_arm_nacl_pic) \
48229727
JB		 2523 DEF_STUB(a8_veneer_b_cond) \
2524 DEF_STUB(a8_veneer_b) \
2525 DEF_STUB(a8_veneer_bl) \
2526 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2527
2528#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2529enum elf32_arm_stub_type
2530{
906e58ca 2531 arm_stub_none,
738a79f6 2532 DEF_STUBS
eb7c4339
NS		 2533 /* Note the first a8_veneer type */
2534 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2535};
2536#undef DEF_STUB
2537
2538typedef struct
2539{
d3ce72d0 2540 const insn_sequence* template_sequence;
738a79f6
CL		 2541 int template_size;
2542} stub_def;
2543
2544#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2545static const stub_def stub_definitions[] =
2546{
738a79f6
CL		 2547 {NULL, 0},
2548 DEF_STUBS
906e58ca
NC		 2549};
2550
2551struct elf32_arm_stub_hash_entry
2552{
2553 /* Base hash table entry structure. */
2554 struct bfd_hash_entry root;
2555
2556 /* The stub section. */
2557 asection *stub_sec;
2558
2559 /* Offset within stub_sec of the beginning of this stub. */
2560 bfd_vma stub_offset;
2561
2562 /* Given the symbol's value and its section we can determine its final
2563 value when building the stubs (so the stub knows where to jump). */
2564 bfd_vma target_value;
2565 asection *target_section;
2566
48229727
JB		 2567 /* Offset to apply to relocation referencing target_value. */
2568 bfd_vma target_addend;
2569
2570 /* The instruction which caused this stub to be generated (only valid for
2571 Cortex-A8 erratum workaround stubs at present). */
2572 unsigned long orig_insn;
2573
461a49ca 2574 /* The stub type. */
906e58ca 2575 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2576 /* Its encoding size in bytes. */
2577 int stub_size;
2578 /* Its template. */
2579 const insn_sequence *stub_template;
2580 /* The size of the template (number of entries). */
2581 int stub_template_size;
906e58ca
NC		 2582
2583 /* The symbol table entry, if any, that this was derived from. */
2584 struct elf32_arm_link_hash_entry *h;
2585
35fc36a8
RS		 2586 /* Type of branch. */
2587 enum arm_st_branch_type branch_type;
906e58ca
NC		 2588
2589 /* Where this stub is being called from, or, in the case of combined
2590 stub sections, the first input section in the group. */
2591 asection *id_sec;
7413f23f
DJ		 2592
2593 /* The name for the local symbol at the start of this stub. The
2594 stub name in the hash table has to be unique; this does not, so
2595 it can be friendlier. */
2596 char *output_name;
906e58ca
NC		 2597};
2598
e489d0ae
PB		 2599/* Used to build a map of a section. This is required for mixed-endian
2600 code/data. */
2601
2602typedef struct elf32_elf_section_map
2603{
2604 bfd_vma vma;
2605 char type;
2606}
2607elf32_arm_section_map;
2608
c7b8f16e
JB		 2609/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2610
2611typedef enum
2612{
2613 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2614 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2615 VFP11_ERRATUM_ARM_VENEER,
2616 VFP11_ERRATUM_THUMB_VENEER
2617}
2618elf32_vfp11_erratum_type;
2619
2620typedef struct elf32_vfp11_erratum_list
2621{
2622 struct elf32_vfp11_erratum_list *next;
2623 bfd_vma vma;
2624 union
2625 {
2626 struct
2627 {
2628 struct elf32_vfp11_erratum_list *veneer;
2629 unsigned int vfp_insn;
2630 } b;
2631 struct
2632 {
2633 struct elf32_vfp11_erratum_list *branch;
2634 unsigned int id;
2635 } v;
2636 } u;
2637 elf32_vfp11_erratum_type type;
2638}
2639elf32_vfp11_erratum_list;
2640
2468f9c9
PB		 2641typedef enum
2642{
2643 DELETE_EXIDX_ENTRY,
2644 INSERT_EXIDX_CANTUNWIND_AT_END
2645}
2646arm_unwind_edit_type;
2647
2648/* A (sorted) list of edits to apply to an unwind table. */
2649typedef struct arm_unwind_table_edit
2650{
2651 arm_unwind_edit_type type;
2652 /* Note: we sometimes want to insert an unwind entry corresponding to a
2653 section different from the one we're currently writing out, so record the
2654 (text) section this edit relates to here. */
2655 asection *linked_section;
2656 unsigned int index;
2657 struct arm_unwind_table_edit *next;
2658}
2659arm_unwind_table_edit;
2660
8e3de13a 2661typedef struct _arm_elf_section_data
e489d0ae 2662{
2468f9c9 2663 /* Information about mapping symbols. */
e489d0ae 2664 struct bfd_elf_section_data elf;
8e3de13a 2665 unsigned int mapcount;
c7b8f16e 2666 unsigned int mapsize;
e489d0ae 2667 elf32_arm_section_map *map;
2468f9c9 2668 /* Information about CPU errata. */
c7b8f16e
JB		 2669 unsigned int erratumcount;
2670 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2671 /* Information about unwind tables. */
2672 union
2673 {
2674 /* Unwind info attached to a text section. */
2675 struct
2676 {
2677 asection *arm_exidx_sec;
2678 } text;
2679
2680 /* Unwind info attached to an .ARM.exidx section. */
2681 struct
2682 {
2683 arm_unwind_table_edit *unwind_edit_list;
2684 arm_unwind_table_edit *unwind_edit_tail;
2685 } exidx;
2686 } u;
8e3de13a
NC		 2687}
2688_arm_elf_section_data;
e489d0ae
PB		 2689
2690#define elf32_arm_section_data(sec) \
8e3de13a 2691 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2692
48229727
JB		 2693/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2694 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2695 so may be created multiple times: we use an array of these entries whilst
2696 relaxing which we can refresh easily, then create stubs for each potentially
2697 erratum-triggering instruction once we've settled on a solution. */
2698
b38cadfb
NC		 2699struct a8_erratum_fix
2700{
48229727
JB		 2701 bfd *input_bfd;
2702 asection *section;
2703 bfd_vma offset;
2704 bfd_vma addend;
2705 unsigned long orig_insn;
2706 char *stub_name;
2707 enum elf32_arm_stub_type stub_type;
35fc36a8 2708 enum arm_st_branch_type branch_type;
48229727
JB		 2709};
2710
2711/* A table of relocs applied to branches which might trigger Cortex-A8
2712 erratum. */
2713
b38cadfb
NC		 2714struct a8_erratum_reloc
2715{
48229727
JB		 2716 bfd_vma from;
2717 bfd_vma destination;
92750f34
DJ		 2718 struct elf32_arm_link_hash_entry *hash;
2719 const char *sym_name;
48229727 2720 unsigned int r_type;
35fc36a8 2721 enum arm_st_branch_type branch_type;
48229727
JB		 2722 bfd_boolean non_a8_stub;
2723};
2724
ba93b8ac
DJ		 2725/* The size of the thread control block. */
2726#define TCB_SIZE 8
2727
34e77a92
RS		 2728/* ARM-specific information about a PLT entry, over and above the usual
2729 gotplt_union. */
b38cadfb
NC		 2730struct arm_plt_info
2731{
34e77a92
RS		 2732 /* We reference count Thumb references to a PLT entry separately,
2733 so that we can emit the Thumb trampoline only if needed. */
2734 bfd_signed_vma thumb_refcount;
2735
2736 /* Some references from Thumb code may be eliminated by BL->BLX
2737 conversion, so record them separately. */
2738 bfd_signed_vma maybe_thumb_refcount;
2739
2740 /* How many of the recorded PLT accesses were from non-call relocations.
2741 This information is useful when deciding whether anything takes the
2742 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2743 non-call references to the function should resolve directly to the
2744 real runtime target. */
2745 unsigned int noncall_refcount;
2746
2747 /* Since PLT entries have variable size if the Thumb prologue is
2748 used, we need to record the index into .got.plt instead of
2749 recomputing it from the PLT offset. */
2750 bfd_signed_vma got_offset;
2751};
2752
2753/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2754struct arm_local_iplt_info
2755{
34e77a92
RS		 2756 /* The information that is usually found in the generic ELF part of
2757 the hash table entry. */
2758 union gotplt_union root;
2759
2760 /* The information that is usually found in the ARM-specific part of
2761 the hash table entry. */
2762 struct arm_plt_info arm;
2763
2764 /* A list of all potential dynamic relocations against this symbol. */
2765 struct elf_dyn_relocs *dyn_relocs;
2766};
2767
0ffa91dd 2768struct elf_arm_obj_tdata
ba93b8ac
DJ		 2769{
2770 struct elf_obj_tdata root;
2771
2772 /* tls_type for each local got entry. */
2773 char *local_got_tls_type;
ee065d83 2774
0855e32b
NS		 2775 /* GOTPLT entries for TLS descriptors. */
2776 bfd_vma *local_tlsdesc_gotent;
2777
34e77a92
RS		 2778 /* Information for local symbols that need entries in .iplt. */
2779 struct arm_local_iplt_info **local_iplt;
2780
bf21ed78
MS		 2781 /* Zero to warn when linking objects with incompatible enum sizes. */
2782 int no_enum_size_warning;
a9dc9481
JM		 2783
2784 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2785 int no_wchar_size_warning;
ba93b8ac
DJ		 2786};
2787
0ffa91dd
NC		 2788#define elf_arm_tdata(bfd) \
2789 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2790
0ffa91dd
NC		 2791#define elf32_arm_local_got_tls_type(bfd) \
2792 (elf_arm_tdata (bfd)->local_got_tls_type)
2793
0855e32b
NS		 2794#define elf32_arm_local_tlsdesc_gotent(bfd) \
2795 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2796
34e77a92
RS		 2797#define elf32_arm_local_iplt(bfd) \
2798 (elf_arm_tdata (bfd)->local_iplt)
2799
0ffa91dd
NC		 2800#define is_arm_elf(bfd) \
2801 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2802 && elf_tdata (bfd) != NULL \
4dfe6ac6 2803 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2804
2805static bfd_boolean
2806elf32_arm_mkobject (bfd *abfd)
2807{
0ffa91dd 2808 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2809 ARM_ELF_DATA);
ba93b8ac
DJ		 2810}
2811
ba93b8ac
DJ		 2812#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2813
ba96a88f 2814/* Arm ELF linker hash entry. */
252b5132 2815struct elf32_arm_link_hash_entry
b38cadfb
NC		 2816{
2817 struct elf_link_hash_entry root;
252b5132 2818
b38cadfb
NC		 2819 /* Track dynamic relocs copied for this symbol. */
2820 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2821
b38cadfb
NC		 2822 /* ARM-specific PLT information. */
2823 struct arm_plt_info plt;
ba93b8ac
DJ		 2824
2825#define GOT_UNKNOWN 0
2826#define GOT_NORMAL 1
2827#define GOT_TLS_GD 2
2828#define GOT_TLS_IE 4
0855e32b
NS		 2829#define GOT_TLS_GDESC 8
2830#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2831 unsigned int tls_type : 8;
34e77a92 2832
b38cadfb
NC		 2833 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2834 unsigned int is_iplt : 1;
34e77a92 2835
b38cadfb 2836 unsigned int unused : 23;
a4fd1a8e 2837
b38cadfb
NC		 2838 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2839 starting at the end of the jump table. */
2840 bfd_vma tlsdesc_got;
0855e32b 2841
b38cadfb
NC		 2842 /* The symbol marking the real symbol location for exported thumb
2843 symbols with Arm stubs. */
2844 struct elf_link_hash_entry *export_glue;
906e58ca 2845
b38cadfb 2846 /* A pointer to the most recently used stub hash entry against this
8029a119 2847 symbol. */
b38cadfb
NC		 2848 struct elf32_arm_stub_hash_entry *stub_cache;
2849};
252b5132 2850
252b5132 2851/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2852#define elf32_arm_link_hash_traverse(table, func, info) \
2853 (elf_link_hash_traverse \
2854 (&(table)->root, \
b7693d02 2855 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2856 (info)))
2857
2858/* Get the ARM elf linker hash table from a link_info structure. */
2859#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2860 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2861 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2862
906e58ca
NC		 2863#define arm_stub_hash_lookup(table, string, create, copy) \
2864 ((struct elf32_arm_stub_hash_entry *) \
2865 bfd_hash_lookup ((table), (string), (create), (copy)))
2866
21d799b5
NC		 2867/* Array to keep track of which stub sections have been created, and
2868 information on stub grouping. */
2869struct map_stub
2870{
2871 /* This is the section to which stubs in the group will be
2872 attached. */
2873 asection *link_sec;
2874 /* The stub section. */
2875 asection *stub_sec;
2876};
2877
0855e32b
NS		 2878#define elf32_arm_compute_jump_table_size(htab) \
2879 ((htab)->next_tls_desc_index * 4)
2880
9b485d32 2881/* ARM ELF linker hash table. */
252b5132 2882struct elf32_arm_link_hash_table
906e58ca
NC		 2883{
2884 /* The main hash table. */
2885 struct elf_link_hash_table root;
252b5132 2886
906e58ca
NC		 2887 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2888 bfd_size_type thumb_glue_size;
252b5132 2889
906e58ca
NC		 2890 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2891 bfd_size_type arm_glue_size;
252b5132 2892
906e58ca
NC		 2893 /* The size in bytes of section containing the ARMv4 BX veneers. */
2894 bfd_size_type bx_glue_size;
845b51d6 2895
906e58ca
NC		 2896 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2897 veneer has been populated. */
2898 bfd_vma bx_glue_offset[15];
845b51d6 2899
906e58ca
NC		 2900 /* The size in bytes of the section containing glue for VFP11 erratum
2901 veneers. */
2902 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2903
48229727
JB		 2904 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2905 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2906 elf32_arm_write_section(). */
2907 struct a8_erratum_fix *a8_erratum_fixes;
2908 unsigned int num_a8_erratum_fixes;
2909
906e58ca
NC		 2910 /* An arbitrary input BFD chosen to hold the glue sections. */
2911 bfd * bfd_of_glue_owner;
ba96a88f 2912
906e58ca
NC		 2913 /* Nonzero to output a BE8 image. */
2914 int byteswap_code;
e489d0ae 2915
906e58ca
NC		 2916 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2917 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2918 int target1_is_rel;
9c504268 2919
906e58ca
NC		 2920 /* The relocation to use for R_ARM_TARGET2 relocations. */
2921 int target2_reloc;
eb043451 2922
906e58ca
NC		 2923 /* 0 = Ignore R_ARM_V4BX.
2924 1 = Convert BX to MOV PC.
2925 2 = Generate v4 interworing stubs. */
2926 int fix_v4bx;
319850b4 2927
48229727
JB		 2928 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2929 int fix_cortex_a8;
2930
2de70689
MGD		 2931 /* Whether we should fix the ARM1176 BLX immediate issue. */
2932 int fix_arm1176;
2933
906e58ca
NC		 2934 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2935 int use_blx;
33bfe774 2936
906e58ca
NC		 2937 /* What sort of code sequences we should look for which may trigger the
2938 VFP11 denorm erratum. */
2939 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2940
906e58ca
NC		 2941 /* Global counter for the number of fixes we have emitted. */
2942 int num_vfp11_fixes;
c7b8f16e 2943
906e58ca
NC		 2944 /* Nonzero to force PIC branch veneers. */
2945 int pic_veneer;
27e55c4d 2946
906e58ca
NC		 2947 /* The number of bytes in the initial entry in the PLT. */
2948 bfd_size_type plt_header_size;
e5a52504 2949
906e58ca
NC		 2950 /* The number of bytes in the subsequent PLT etries. */
2951 bfd_size_type plt_entry_size;
e5a52504 2952
906e58ca
NC		 2953 /* True if the target system is VxWorks. */
2954 int vxworks_p;
00a97672 2955
906e58ca
NC		 2956 /* True if the target system is Symbian OS. */
2957 int symbian_p;
e5a52504 2958
b38cadfb
NC		 2959 /* True if the target system is Native Client. */
2960 int nacl_p;
2961
906e58ca
NC		 2962 /* True if the target uses REL relocations. */
2963 int use_rel;
4e7fd91e 2964
0855e32b
NS		 2965 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2966 bfd_vma next_tls_desc_index;
2967
2968 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2969 bfd_vma num_tls_desc;
2970
906e58ca 2971 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2972 asection *sdynbss;
2973 asection *srelbss;
5e681ec4 2974
906e58ca
NC		 2975 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2976 asection *srelplt2;
00a97672 2977
0855e32b
NS		 2978 /* The offset into splt of the PLT entry for the TLS descriptor
2979 resolver. Special values are 0, if not necessary (or not found
2980 to be necessary yet), and -1 if needed but not determined
2981 yet. */
2982 bfd_vma dt_tlsdesc_plt;
2983
2984 /* The offset into sgot of the GOT entry used by the PLT entry
2985 above. */
b38cadfb 2986 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2987
2988 /* Offset in .plt section of tls_arm_trampoline. */
2989 bfd_vma tls_trampoline;
2990
906e58ca
NC		 2991 /* Data for R_ARM_TLS_LDM32 relocations. */
2992 union
2993 {
2994 bfd_signed_vma refcount;
2995 bfd_vma offset;
2996 } tls_ldm_got;
b7693d02 2997
87d72d41
AM		 2998 /* Small local sym cache. */
2999 struct sym_cache sym_cache;
906e58ca
NC		 3000
3001 /* For convenience in allocate_dynrelocs. */
3002 bfd * obfd;
3003
0855e32b
NS		 3004 /* The amount of space used by the reserved portion of the sgotplt
3005 section, plus whatever space is used by the jump slots. */
3006 bfd_vma sgotplt_jump_table_size;
3007
906e58ca
NC		 3008 /* The stub hash table. */
3009 struct bfd_hash_table stub_hash_table;
3010
3011 /* Linker stub bfd. */
3012 bfd *stub_bfd;
3013
3014 /* Linker call-backs. */
7a89b94e 3015 asection * (*add_stub_section) (const char *, asection *, unsigned int);
906e58ca
NC		 3016 void (*layout_sections_again) (void);
3017
3018 /* Array to keep track of which stub sections have been created, and
3019 information on stub grouping. */
21d799b5 3020 struct map_stub *stub_group;
906e58ca 3021
fe33d2fa
CL		 3022 /* Number of elements in stub_group. */
3023 int top_id;
3024
906e58ca
NC		 3025 /* Assorted information used by elf32_arm_size_stubs. */
3026 unsigned int bfd_count;
3027 int top_index;
3028 asection **input_list;
3029};
252b5132 3030
780a67af
NC		 3031/* Create an entry in an ARM ELF linker hash table. */
3032
3033static struct bfd_hash_entry *
57e8b36a 3034elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
99059e56
RM		 3035 struct bfd_hash_table * table,
3036 const char * string)
780a67af
NC		 3037{
3038 struct elf32_arm_link_hash_entry * ret =
3039 (struct elf32_arm_link_hash_entry *) entry;
3040
3041 /* Allocate the structure if it has not already been allocated by a
3042 subclass. */
906e58ca 3043 if (ret == NULL)
21d799b5 3044 ret = (struct elf32_arm_link_hash_entry *)
99059e56 3045 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3046 if (ret == NULL)
780a67af
NC		 3047 return (struct bfd_hash_entry *) ret;
3048
3049 /* Call the allocation method of the superclass. */
3050 ret = ((struct elf32_arm_link_hash_entry *)
3051 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3052 table, string));
57e8b36a 3053 if (ret != NULL)
b7693d02 3054 {
0bdcacaf 3055 ret->dyn_relocs = NULL;
ba93b8ac 3056 ret->tls_type = GOT_UNKNOWN;
0855e32b 3057 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3058 ret->plt.thumb_refcount = 0;
3059 ret->plt.maybe_thumb_refcount = 0;
3060 ret->plt.noncall_refcount = 0;
3061 ret->plt.got_offset = -1;
3062 ret->is_iplt = FALSE;
a4fd1a8e 3063 ret->export_glue = NULL;
906e58ca
NC		 3064
3065 ret->stub_cache = NULL;
b7693d02 3066 }
780a67af
NC		 3067
3068 return (struct bfd_hash_entry *) ret;
3069}
3070
34e77a92
RS		 3071/* Ensure that we have allocated bookkeeping structures for ABFD's local
3072 symbols. */
3073
3074static bfd_boolean
3075elf32_arm_allocate_local_sym_info (bfd *abfd)
3076{
3077 if (elf_local_got_refcounts (abfd) == NULL)
3078 {
3079 bfd_size_type num_syms;
3080 bfd_size_type size;
3081 char *data;
3082
3083 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3084 size = num_syms * (sizeof (bfd_signed_vma)
3085 + sizeof (struct arm_local_iplt_info *)
3086 + sizeof (bfd_vma)
3087 + sizeof (char));
3088 data = bfd_zalloc (abfd, size);
3089 if (data == NULL)
3090 return FALSE;
3091
3092 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3093 data += num_syms * sizeof (bfd_signed_vma);
3094
3095 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3096 data += num_syms * sizeof (struct arm_local_iplt_info *);
3097
3098 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3099 data += num_syms * sizeof (bfd_vma);
3100
3101 elf32_arm_local_got_tls_type (abfd) = data;
3102 }
3103 return TRUE;
3104}
3105
3106/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3107 to input bfd ABFD. Create the information if it doesn't already exist.
3108 Return null if an allocation fails. */
3109
3110static struct arm_local_iplt_info *
3111elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3112{
3113 struct arm_local_iplt_info **ptr;
3114
3115 if (!elf32_arm_allocate_local_sym_info (abfd))
3116 return NULL;
3117
3118 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3119 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (*ptr == NULL)
3121 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3122 return *ptr;
3123}
3124
3125/* Try to obtain PLT information for the symbol with index R_SYMNDX
3126 in ABFD's symbol table. If the symbol is global, H points to its
3127 hash table entry, otherwise H is null.
3128
3129 Return true if the symbol does have PLT information. When returning
3130 true, point *ROOT_PLT at the target-independent reference count/offset
3131 union and *ARM_PLT at the ARM-specific information. */
3132
3133static bfd_boolean
3134elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3135 unsigned long r_symndx, union gotplt_union **root_plt,
3136 struct arm_plt_info **arm_plt)
3137{
3138 struct arm_local_iplt_info *local_iplt;
3139
3140 if (h != NULL)
3141 {
3142 *root_plt = &h->root.plt;
3143 *arm_plt = &h->plt;
3144 return TRUE;
3145 }
3146
3147 if (elf32_arm_local_iplt (abfd) == NULL)
3148 return FALSE;
3149
3150 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3151 if (local_iplt == NULL)
3152 return FALSE;
3153
3154 *root_plt = &local_iplt->root;
3155 *arm_plt = &local_iplt->arm;
3156 return TRUE;
3157}
3158
3159/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3160 before it. */
3161
3162static bfd_boolean
3163elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3164 struct arm_plt_info *arm_plt)
3165{
3166 struct elf32_arm_link_hash_table *htab;
3167
3168 htab = elf32_arm_hash_table (info);
3169 return (arm_plt->thumb_refcount != 0
3170 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3171}
3172
3173/* Return a pointer to the head of the dynamic reloc list that should
3174 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3175 ABFD's symbol table. Return null if an error occurs. */
3176
3177static struct elf_dyn_relocs **
3178elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3179 Elf_Internal_Sym *isym)
3180{
3181 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3182 {
3183 struct arm_local_iplt_info *local_iplt;
3184
3185 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3186 if (local_iplt == NULL)
3187 return NULL;
3188 return &local_iplt->dyn_relocs;
3189 }
3190 else
3191 {
3192 /* Track dynamic relocs needed for local syms too.
3193 We really need local syms available to do this
3194 easily. Oh well. */
3195 asection *s;
3196 void *vpp;
3197
3198 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3199 if (s == NULL)
3200 abort ();
3201
3202 vpp = &elf_section_data (s)->local_dynrel;
3203 return (struct elf_dyn_relocs **) vpp;
3204 }
3205}
3206
906e58ca
NC		 3207/* Initialize an entry in the stub hash table. */
3208
3209static struct bfd_hash_entry *
3210stub_hash_newfunc (struct bfd_hash_entry *entry,
3211 struct bfd_hash_table *table,
3212 const char *string)
3213{
3214 /* Allocate the structure if it has not already been allocated by a
3215 subclass. */
3216 if (entry == NULL)
3217 {
21d799b5 3218 entry = (struct bfd_hash_entry *)
99059e56 3219 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3220 if (entry == NULL)
3221 return entry;
3222 }
3223
3224 /* Call the allocation method of the superclass. */
3225 entry = bfd_hash_newfunc (entry, table, string);
3226 if (entry != NULL)
3227 {
3228 struct elf32_arm_stub_hash_entry *eh;
3229
3230 /* Initialize the local fields. */
3231 eh = (struct elf32_arm_stub_hash_entry *) entry;
3232 eh->stub_sec = NULL;
3233 eh->stub_offset = 0;
3234 eh->target_value = 0;
3235 eh->target_section = NULL;
cedfb179
DK		 3236 eh->target_addend = 0;
3237 eh->orig_insn = 0;
906e58ca 3238 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3239 eh->stub_size = 0;
3240 eh->stub_template = NULL;
3241 eh->stub_template_size = 0;
906e58ca
NC		 3242 eh->h = NULL;
3243 eh->id_sec = NULL;
d8d2f433 3244 eh->output_name = NULL;
906e58ca
NC		 3245 }
3246
3247 return entry;
3248}
3249
00a97672 3250/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3251 shortcuts to them in our hash table. */
3252
3253static bfd_boolean
57e8b36a 3254create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3255{
3256 struct elf32_arm_link_hash_table *htab;
3257
e5a52504 3258 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3259 if (htab == NULL)
3260 return FALSE;
3261
e5a52504
MM		 3262 /* BPABI objects never have a GOT, or associated sections. */
3263 if (htab->symbian_p)
3264 return TRUE;
3265
5e681ec4
PB		 3266 if (! _bfd_elf_create_got_section (dynobj, info))
3267 return FALSE;
3268
5e681ec4
PB		 3269 return TRUE;
3270}
3271
34e77a92
RS		 3272/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3273
3274static bfd_boolean
3275create_ifunc_sections (struct bfd_link_info *info)
3276{
3277 struct elf32_arm_link_hash_table *htab;
3278 const struct elf_backend_data *bed;
3279 bfd *dynobj;
3280 asection *s;
3281 flagword flags;
b38cadfb 3282
34e77a92
RS		 3283 htab = elf32_arm_hash_table (info);
3284 dynobj = htab->root.dynobj;
3285 bed = get_elf_backend_data (dynobj);
3286 flags = bed->dynamic_sec_flags;
3287
3288 if (htab->root.iplt == NULL)
3289 {
3d4d4302
AM		 3290 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3291 flags | SEC_READONLY | SEC_CODE);
34e77a92 3292 if (s == NULL
a0f49396 3293 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3294 return FALSE;
3295 htab->root.iplt = s;
3296 }
3297
3298 if (htab->root.irelplt == NULL)
3299 {
3d4d4302
AM		 3300 s = bfd_make_section_anyway_with_flags (dynobj,
3301 RELOC_SECTION (htab, ".iplt"),
3302 flags | SEC_READONLY);
34e77a92 3303 if (s == NULL
a0f49396 3304 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3305 return FALSE;
3306 htab->root.irelplt = s;
3307 }
3308
3309 if (htab->root.igotplt == NULL)
3310 {
3d4d4302 3311 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3312 if (s == NULL
3313 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3314 return FALSE;
3315 htab->root.igotplt = s;
3316 }
3317 return TRUE;
3318}
3319
00a97672
RS		 3320/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3321 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3322 hash table. */
3323
3324static bfd_boolean
57e8b36a 3325elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3326{
3327 struct elf32_arm_link_hash_table *htab;
3328
3329 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3330 if (htab == NULL)
3331 return FALSE;
3332
362d30a1 3333 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3334 return FALSE;
3335
3336 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3337 return FALSE;
3338
3d4d4302 3339 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3340 if (!info->shared)
3d4d4302
AM		 3341 htab->srelbss = bfd_get_linker_section (dynobj,
3342 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3343
3344 if (htab->vxworks_p)
3345 {
3346 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3347 return FALSE;
3348
3349 if (info->shared)
3350 {
3351 htab->plt_header_size = 0;
3352 htab->plt_entry_size
3353 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3354 }
3355 else
3356 {
3357 htab->plt_header_size
3358 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3359 htab->plt_entry_size
3360 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3361 }
3362 }
5e681ec4 3363
362d30a1
RS		 3364 if (!htab->root.splt
3365 || !htab->root.srelplt
e5a52504 3366 || !htab->sdynbss
5e681ec4
PB		 3367 || (!info->shared && !htab->srelbss))
3368 abort ();
3369
3370 return TRUE;
3371}
3372
906e58ca
NC		 3373/* Copy the extra info we tack onto an elf_link_hash_entry. */
3374
3375static void
3376elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3377 struct elf_link_hash_entry *dir,
3378 struct elf_link_hash_entry *ind)
3379{
3380 struct elf32_arm_link_hash_entry *edir, *eind;
3381
3382 edir = (struct elf32_arm_link_hash_entry *) dir;
3383 eind = (struct elf32_arm_link_hash_entry *) ind;
3384
0bdcacaf 3385 if (eind->dyn_relocs != NULL)
906e58ca 3386 {
0bdcacaf 3387 if (edir->dyn_relocs != NULL)
906e58ca 3388 {
0bdcacaf
RS		 3389 struct elf_dyn_relocs **pp;
3390 struct elf_dyn_relocs *p;
906e58ca
NC		 3391
3392 /* Add reloc counts against the indirect sym to the direct sym
3393 list. Merge any entries against the same section. */
0bdcacaf 3394 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3395 {
0bdcacaf 3396 struct elf_dyn_relocs *q;
906e58ca 3397
0bdcacaf
RS		 3398 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3399 if (q->sec == p->sec)
906e58ca
NC		 3400 {
3401 q->pc_count += p->pc_count;
3402 q->count += p->count;
3403 *pp = p->next;
3404 break;
3405 }
3406 if (q == NULL)
3407 pp = &p->next;
3408 }
0bdcacaf 3409 *pp = edir->dyn_relocs;
906e58ca
NC		 3410 }
3411
0bdcacaf
RS		 3412 edir->dyn_relocs = eind->dyn_relocs;
3413 eind->dyn_relocs = NULL;
906e58ca
NC		 3414 }
3415
3416 if (ind->root.type == bfd_link_hash_indirect)
3417 {
3418 /* Copy over PLT info. */
34e77a92
RS		 3419 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3420 eind->plt.thumb_refcount = 0;
3421 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3422 eind->plt.maybe_thumb_refcount = 0;
3423 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3424 eind->plt.noncall_refcount = 0;
3425
3426 /* We should only allocate a function to .iplt once the final
3427 symbol information is known. */
3428 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3429
3430 if (dir->got.refcount <= 0)
3431 {
3432 edir->tls_type = eind->tls_type;
3433 eind->tls_type = GOT_UNKNOWN;
3434 }
3435 }
3436
3437 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3438}
3439
3440/* Create an ARM elf linker hash table. */
3441
3442static struct bfd_link_hash_table *
3443elf32_arm_link_hash_table_create (bfd *abfd)
3444{
3445 struct elf32_arm_link_hash_table *ret;
3446 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3447
7bf52ea2 3448 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3449 if (ret == NULL)
3450 return NULL;
3451
3452 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3453 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3454 sizeof (struct elf32_arm_link_hash_entry),
3455 ARM_ELF_DATA))
906e58ca
NC		 3456 {
3457 free (ret);
3458 return NULL;
3459 }
3460
906e58ca 3461 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3462#ifdef FOUR_WORD_PLT
3463 ret->plt_header_size = 16;
3464 ret->plt_entry_size = 16;
3465#else
3466 ret->plt_header_size = 20;
3467 ret->plt_entry_size = 12;
3468#endif
906e58ca 3469 ret->use_rel = 1;
906e58ca 3470 ret->obfd = abfd;
906e58ca
NC		 3471
3472 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3473 sizeof (struct elf32_arm_stub_hash_entry)))
3474 {
3475 free (ret);
3476 return NULL;
3477 }
3478
3479 return &ret->root.root;
3480}
3481
3482/* Free the derived linker hash table. */
3483
3484static void
3485elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3486{
3487 struct elf32_arm_link_hash_table *ret
3488 = (struct elf32_arm_link_hash_table *) hash;
3489
3490 bfd_hash_table_free (&ret->stub_hash_table);
9f7c3e5e 3491 _bfd_elf_link_hash_table_free (hash);
906e58ca
NC		 3492}
3493
3494/* Determine if we're dealing with a Thumb only architecture. */
3495
3496static bfd_boolean
3497using_thumb_only (struct elf32_arm_link_hash_table *globals)
3498{
3499 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3500 Tag_CPU_arch);
3501 int profile;
3502
41ed1ee7
DJ		 3503 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3504 return TRUE;
3505
9e3c6df6 3506 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3507 return FALSE;
3508
3509 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3510 Tag_CPU_arch_profile);
3511
3512 return profile == 'M';
3513}
3514
3515/* Determine if we're dealing with a Thumb-2 object. */
3516
3517static bfd_boolean
3518using_thumb2 (struct elf32_arm_link_hash_table *globals)
3519{
3520 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3521 Tag_CPU_arch);
3522 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3523}
3524
cd1dac3d
DG		 3525/* Determine what kind of NOPs are available. */
3526
3527static bfd_boolean
3528arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3529{
3530 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3531 Tag_CPU_arch);
3532 return arch == TAG_CPU_ARCH_V6T2
3533 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3534 || arch == TAG_CPU_ARCH_V7
3535 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3536}
3537
3538static bfd_boolean
3539arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3540{
3541 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3542 Tag_CPU_arch);
9e3c6df6
PB		 3543 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3544 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3545}
3546
f4ac8484
DJ		 3547static bfd_boolean
3548arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3549{
3550 switch (stub_type)
3551 {
fea2b4d6
CL		 3552 case arm_stub_long_branch_thumb_only:
3553 case arm_stub_long_branch_v4t_thumb_arm:
3554 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3555 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3556 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3557 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3558 return TRUE;
3559 case arm_stub_none:
3560 BFD_FAIL ();
3561 return FALSE;
3562 break;
3563 default:
3564 return FALSE;
3565 }
3566}
3567
906e58ca
NC		 3568/* Determine the type of stub needed, if any, for a call. */
3569
3570static enum elf32_arm_stub_type
3571arm_type_of_stub (struct bfd_link_info *info,
3572 asection *input_sec,
3573 const Elf_Internal_Rela *rel,
34e77a92 3574 unsigned char st_type,
35fc36a8 3575 enum arm_st_branch_type *actual_branch_type,
906e58ca 3576 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3577 bfd_vma destination,
3578 asection *sym_sec,
3579 bfd *input_bfd,
3580 const char *name)
906e58ca
NC		 3581{
3582 bfd_vma location;
3583 bfd_signed_vma branch_offset;
3584 unsigned int r_type;
3585 struct elf32_arm_link_hash_table * globals;
3586 int thumb2;
3587 int thumb_only;
3588 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3589 int use_plt = 0;
35fc36a8 3590 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3591 union gotplt_union *root_plt;
3592 struct arm_plt_info *arm_plt;
906e58ca 3593
35fc36a8 3594 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3595 return stub_type;
3596
906e58ca 3597 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3598 if (globals == NULL)
3599 return stub_type;
906e58ca
NC		 3600
3601 thumb_only = using_thumb_only (globals);
3602
3603 thumb2 = using_thumb2 (globals);
3604
3605 /* Determine where the call point is. */
3606 location = (input_sec->output_offset
3607 + input_sec->output_section->vma
3608 + rel->r_offset);
3609
906e58ca
NC		 3610 r_type = ELF32_R_TYPE (rel->r_info);
3611
39f21624
NC		 3612 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3613 are considering a function call relocation. */
3614 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3615 && branch_type == ST_BRANCH_TO_ARM)
3616 branch_type = ST_BRANCH_TO_THUMB;
3617
34e77a92
RS		 3618 /* For TLS call relocs, it is the caller's responsibility to provide
3619 the address of the appropriate trampoline. */
3620 if (r_type != R_ARM_TLS_CALL
3621 && r_type != R_ARM_THM_TLS_CALL
3622 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3623 &root_plt, &arm_plt)
3624 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3625 {
34e77a92 3626 asection *splt;
fe33d2fa 3627
34e77a92
RS		 3628 if (hash == NULL || hash->is_iplt)
3629 splt = globals->root.iplt;
3630 else
3631 splt = globals->root.splt;
3632 if (splt != NULL)
b38cadfb 3633 {
34e77a92
RS		 3634 use_plt = 1;
3635
3636 /* Note when dealing with PLT entries: the main PLT stub is in
3637 ARM mode, so if the branch is in Thumb mode, another
3638 Thumb->ARM stub will be inserted later just before the ARM
3639 PLT stub. We don't take this extra distance into account
3640 here, because if a long branch stub is needed, we'll add a
3641 Thumb->Arm one and branch directly to the ARM PLT entry
3642 because it avoids spreading offset corrections in several
3643 places. */
3644
3645 destination = (splt->output_section->vma
3646 + splt->output_offset
3647 + root_plt->offset);
3648 st_type = STT_FUNC;
3649 branch_type = ST_BRANCH_TO_ARM;
3650 }
5fa9e92f 3651 }
34e77a92
RS		 3652 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3653 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3654
fe33d2fa
CL		 3655 branch_offset = (bfd_signed_vma)(destination - location);
3656
0855e32b
NS		 3657 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3658 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3659 {
5fa9e92f
CL		 3660 /* Handle cases where:
3661 - this call goes too far (different Thumb/Thumb2 max
99059e56 3662 distance)
155d87d7 3663 - it's a Thumb->Arm call and blx is not available, or it's a
99059e56
RM		 3664 Thumb->Arm branch (not bl). A stub is needed in this case,
3665 but only if this call is not through a PLT entry. Indeed,
3666 PLT stubs handle mode switching already.
5fa9e92f 3667 */
906e58ca
NC		 3668 if ((!thumb2
3669 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3670 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3671 || (thumb2
3672 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3673 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3674 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3675 && (((r_type == R_ARM_THM_CALL
3676 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3677 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3678 && !use_plt))
906e58ca 3679 {
35fc36a8 3680 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3681 {
3682 /* Thumb to thumb. */
3683 if (!thumb_only)
3684 {
3685 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3686 /* PIC stubs. */
155d87d7 3687 ? ((globals->use_blx
9553db3c 3688 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3689 /* V5T and above. Stub starts with ARM code, so
3690 we must be able to switch mode before
3691 reaching it, which is only possible for 'bl'
3692 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3693 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3694 /* On V4T, use Thumb code only. */
d3626fb0 3695 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3696
3697 /* non-PIC stubs. */
155d87d7 3698 : ((globals->use_blx
9553db3c 3699 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3700 /* V5T and above. */
3701 ? arm_stub_long_branch_any_any
3702 /* V4T. */
d3626fb0 3703 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3704 }
3705 else
3706 {
3707 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3708 /* PIC stub. */
3709 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3710 /* non-PIC stub. */
3711 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3712 }
3713 }
3714 else
3715 {
3716 /* Thumb to arm. */
c820be07
NC		 3717 if (sym_sec != NULL
3718 && sym_sec->owner != NULL
3719 && !INTERWORK_FLAG (sym_sec->owner))
3720 {
3721 (*_bfd_error_handler)
3722 (_("%B(%s): warning: interworking not enabled.\n"
3723 " first occurrence: %B: Thumb call to ARM"),
3724 sym_sec->owner, input_bfd, name);
3725 }
3726
0855e32b
NS		 3727 stub_type =
3728 (info->shared | globals->pic_veneer)
c2b4a39d 3729 /* PIC stubs. */
0855e32b
NS		 3730 ? (r_type == R_ARM_THM_TLS_CALL
3731 /* TLS PIC stubs */
3732 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3733 : arm_stub_long_branch_v4t_thumb_tls_pic)
3734 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3735 /* V5T PIC and above. */
3736 ? arm_stub_long_branch_any_arm_pic
3737 /* V4T PIC stub. */
3738 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3739
3740 /* non-PIC stubs. */
0855e32b 3741 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3742 /* V5T and above. */
3743 ? arm_stub_long_branch_any_any
3744 /* V4T. */
3745 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3746
3747 /* Handle v4t short branches. */
fea2b4d6 3748 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3749 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3750 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3751 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3752 }
3753 }
3754 }
fe33d2fa
CL		 3755 else if (r_type == R_ARM_CALL
3756 || r_type == R_ARM_JUMP24
0855e32b
NS		 3757 || r_type == R_ARM_PLT32
3758 || r_type == R_ARM_TLS_CALL)
906e58ca 3759 {
35fc36a8 3760 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3761 {
3762 /* Arm to thumb. */
c820be07
NC		 3763
3764 if (sym_sec != NULL
3765 && sym_sec->owner != NULL
3766 && !INTERWORK_FLAG (sym_sec->owner))
3767 {
3768 (*_bfd_error_handler)
3769 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3770 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3771 sym_sec->owner, input_bfd, name);
3772 }
3773
3774 /* We have an extra 2-bytes reach because of
3775 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3776 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3777 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3778 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3779 || (r_type == R_ARM_JUMP24)
3780 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3781 {
3782 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3783 /* PIC stubs. */
ebe24dd4
CL		 3784 ? ((globals->use_blx)
3785 /* V5T and above. */
3786 ? arm_stub_long_branch_any_thumb_pic
3787 /* V4T stub. */
3788 : arm_stub_long_branch_v4t_arm_thumb_pic)
3789
c2b4a39d
CL		 3790 /* non-PIC stubs. */
3791 : ((globals->use_blx)
3792 /* V5T and above. */
3793 ? arm_stub_long_branch_any_any
3794 /* V4T. */
3795 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3796 }
3797 }
3798 else
3799 {
3800 /* Arm to arm. */
3801 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3802 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3803 {
0855e32b
NS		 3804 stub_type =
3805 (info->shared | globals->pic_veneer)
c2b4a39d 3806 /* PIC stubs. */
0855e32b
NS		 3807 ? (r_type == R_ARM_TLS_CALL
3808 /* TLS PIC Stub */
3809 ? arm_stub_long_branch_any_tls_pic
7a89b94e
NC		 3810 : (globals->nacl_p
3811 ? arm_stub_long_branch_arm_nacl_pic
3812 : arm_stub_long_branch_any_arm_pic))
c2b4a39d 3813 /* non-PIC stubs. */
7a89b94e
NC		 3814 : (globals->nacl_p
3815 ? arm_stub_long_branch_arm_nacl
3816 : arm_stub_long_branch_any_any);
906e58ca
NC		 3817 }
3818 }
3819 }
3820
fe33d2fa
CL		 3821 /* If a stub is needed, record the actual destination type. */
3822 if (stub_type != arm_stub_none)
35fc36a8 3823 *actual_branch_type = branch_type;
fe33d2fa 3824
906e58ca
NC		 3825 return stub_type;
3826}
3827
3828/* Build a name for an entry in the stub hash table. */
3829
3830static char *
3831elf32_arm_stub_name (const asection *input_section,
3832 const asection *sym_sec,
3833 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3834 const Elf_Internal_Rela *rel,
3835 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3836{
3837 char *stub_name;
3838 bfd_size_type len;
3839
3840 if (hash)
3841 {
fe33d2fa 3842 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3843 stub_name = (char *) bfd_malloc (len);
906e58ca 3844 if (stub_name != NULL)
fe33d2fa 3845 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3846 input_section->id & 0xffffffff,
3847 hash->root.root.root.string,
fe33d2fa
CL		 3848 (int) rel->r_addend & 0xffffffff,
3849 (int) stub_type);
906e58ca
NC		 3850 }
3851 else
3852 {
fe33d2fa 3853 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3854 stub_name = (char *) bfd_malloc (len);
906e58ca 3855 if (stub_name != NULL)
fe33d2fa 3856 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3857 input_section->id & 0xffffffff,
3858 sym_sec->id & 0xffffffff,
0855e32b
NS		 3859 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3860 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3861 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3862 (int) rel->r_addend & 0xffffffff,
3863 (int) stub_type);
906e58ca
NC		 3864 }
3865
3866 return stub_name;
3867}
3868
3869/* Look up an entry in the stub hash. Stub entries are cached because
3870 creating the stub name takes a bit of time. */
3871
3872static struct elf32_arm_stub_hash_entry *
3873elf32_arm_get_stub_entry (const asection *input_section,
3874 const asection *sym_sec,
3875 struct elf_link_hash_entry *hash,
3876 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3877 struct elf32_arm_link_hash_table *htab,
3878 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3879{
3880 struct elf32_arm_stub_hash_entry *stub_entry;
3881 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3882 const asection *id_sec;
3883
3884 if ((input_section->flags & SEC_CODE) == 0)
3885 return NULL;
3886
3887 /* If this input section is part of a group of sections sharing one
3888 stub section, then use the id of the first section in the group.
3889 Stub names need to include a section id, as there may well be
3890 more than one stub used to reach say, printf, and we need to
3891 distinguish between them. */
3892 id_sec = htab->stub_group[input_section->id].link_sec;
3893
3894 if (h != NULL && h->stub_cache != NULL
3895 && h->stub_cache->h == h
fe33d2fa
CL		 3896 && h->stub_cache->id_sec == id_sec
3897 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3898 {
3899 stub_entry = h->stub_cache;
3900 }
3901 else
3902 {
3903 char *stub_name;
3904
fe33d2fa 3905 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3906 if (stub_name == NULL)
3907 return NULL;
3908
3909 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3910 stub_name, FALSE, FALSE);
3911 if (h != NULL)
3912 h->stub_cache = stub_entry;
3913
3914 free (stub_name);
3915 }
3916
3917 return stub_entry;
3918}
3919
48229727 3920/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3921 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3922 LINK_SEC_P may be NULL. */
906e58ca 3923
48229727
JB		 3924static asection *
3925elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3926 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3927{
3928 asection *link_sec;
3929 asection *stub_sec;
906e58ca
NC		 3930
3931 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3932 BFD_ASSERT (link_sec != NULL);
906e58ca 3933 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3934
906e58ca
NC		 3935 if (stub_sec == NULL)
3936 {
3937 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3938 if (stub_sec == NULL)
3939 {
3940 size_t namelen;
3941 bfd_size_type len;
3942 char *s_name;
3943
3944 namelen = strlen (link_sec->name);
3945 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3946 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3947 if (s_name == NULL)
3948 return NULL;
3949
3950 memcpy (s_name, link_sec->name, namelen);
3951 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
7a89b94e
NC		 3952 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
3953 htab->nacl_p ? 4 : 3);
906e58ca
NC		 3954 if (stub_sec == NULL)
3955 return NULL;
3956 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3957 }
3958 htab->stub_group[section->id].stub_sec = stub_sec;
3959 }
b38cadfb 3960
48229727
JB		 3961 if (link_sec_p)
3962 *link_sec_p = link_sec;
b38cadfb 3963
48229727
JB		 3964 return stub_sec;
3965}
3966
3967/* Add a new stub entry to the stub hash. Not all fields of the new
3968 stub entry are initialised. */
3969
3970static struct elf32_arm_stub_hash_entry *
3971elf32_arm_add_stub (const char *stub_name,
3972 asection *section,
3973 struct elf32_arm_link_hash_table *htab)
3974{
3975 asection *link_sec;
3976 asection *stub_sec;
3977 struct elf32_arm_stub_hash_entry *stub_entry;
3978
3979 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3980 if (stub_sec == NULL)
3981 return NULL;
906e58ca
NC		 3982
3983 /* Enter this entry into the linker stub hash table. */
3984 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3985 TRUE, FALSE);
3986 if (stub_entry == NULL)
3987 {
3988 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3989 section->owner,
3990 stub_name);
3991 return NULL;
3992 }
3993
3994 stub_entry->stub_sec = stub_sec;
3995 stub_entry->stub_offset = 0;
3996 stub_entry->id_sec = link_sec;
3997
906e58ca
NC		 3998 return stub_entry;
3999}
4000
4001/* Store an Arm insn into an output section not processed by
4002 elf32_arm_write_section. */
4003
4004static void
8029a119
NC		 4005put_arm_insn (struct elf32_arm_link_hash_table * htab,
4006 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4007{
4008 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4009 bfd_putl32 (val, ptr);
4010 else
4011 bfd_putb32 (val, ptr);
4012}
4013
4014/* Store a 16-bit Thumb insn into an output section not processed by
4015 elf32_arm_write_section. */
4016
4017static void
8029a119
NC		 4018put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4019 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4020{
4021 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4022 bfd_putl16 (val, ptr);
4023 else
4024 bfd_putb16 (val, ptr);
4025}
4026
0855e32b
NS		 4027/* If it's possible to change R_TYPE to a more efficient access
4028 model, return the new reloc type. */
4029
4030static unsigned
b38cadfb 4031elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4032 struct elf_link_hash_entry *h)
4033{
4034 int is_local = (h == NULL);
4035
4036 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4037 return r_type;
4038
b38cadfb 4039 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4040 switch (r_type)
4041 {
4042 case R_ARM_TLS_GOTDESC:
4043 case R_ARM_TLS_CALL:
4044 case R_ARM_THM_TLS_CALL:
4045 case R_ARM_TLS_DESCSEQ:
4046 case R_ARM_THM_TLS_DESCSEQ:
4047 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4048 }
4049
4050 return r_type;
4051}
4052
48229727
JB		 4053static bfd_reloc_status_type elf32_arm_final_link_relocate
4054 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4055 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4056 const char *, unsigned char, enum arm_st_branch_type,
4057 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4058
4563a860
JB		 4059static unsigned int
4060arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4061{
4062 switch (stub_type)
4063 {
4064 case arm_stub_a8_veneer_b_cond:
4065 case arm_stub_a8_veneer_b:
4066 case arm_stub_a8_veneer_bl:
4067 return 2;
4068
4069 case arm_stub_long_branch_any_any:
4070 case arm_stub_long_branch_v4t_arm_thumb:
4071 case arm_stub_long_branch_thumb_only:
4072 case arm_stub_long_branch_v4t_thumb_thumb:
4073 case arm_stub_long_branch_v4t_thumb_arm:
4074 case arm_stub_short_branch_v4t_thumb_arm:
4075 case arm_stub_long_branch_any_arm_pic:
4076 case arm_stub_long_branch_any_thumb_pic:
4077 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4078 case arm_stub_long_branch_v4t_arm_thumb_pic:
4079 case arm_stub_long_branch_v4t_thumb_arm_pic:
4080 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4081 case arm_stub_long_branch_any_tls_pic:
4082 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4083 case arm_stub_a8_veneer_blx:
4084 return 4;
b38cadfb 4085
7a89b94e
NC		 4086 case arm_stub_long_branch_arm_nacl:
4087 case arm_stub_long_branch_arm_nacl_pic:
4088 return 16;
4089
4563a860
JB		 4090 default:
4091 abort (); /* Should be unreachable. */
4092 }
4093}
4094
906e58ca
NC		 4095static bfd_boolean
4096arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4097 void * in_arg)
4098{
7a89b94e 4099#define MAXRELOCS 3
906e58ca 4100 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4101 struct elf32_arm_link_hash_table *globals;
906e58ca 4102 struct bfd_link_info *info;
906e58ca
NC		 4103 asection *stub_sec;
4104 bfd *stub_bfd;
906e58ca
NC		 4105 bfd_byte *loc;
4106 bfd_vma sym_value;
4107 int template_size;
4108 int size;
d3ce72d0 4109 const insn_sequence *template_sequence;
906e58ca 4110 int i;
48229727
JB		 4111 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4112 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4113 int nrelocs = 0;
906e58ca
NC		 4114
4115 /* Massage our args to the form they really have. */
4116 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4117 info = (struct bfd_link_info *) in_arg;
4118
4119 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4120 if (globals == NULL)
4121 return FALSE;
906e58ca 4122
906e58ca
NC		 4123 stub_sec = stub_entry->stub_sec;
4124
4dfe6ac6 4125 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4126 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4127 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4128 return TRUE;
fe33d2fa 4129
906e58ca
NC		 4130 /* Make a note of the offset within the stubs for this entry. */
4131 stub_entry->stub_offset = stub_sec->size;
4132 loc = stub_sec->contents + stub_entry->stub_offset;
4133
4134 stub_bfd = stub_sec->owner;
4135
906e58ca
NC		 4136 /* This is the address of the stub destination. */
4137 sym_value = (stub_entry->target_value
4138 + stub_entry->target_section->output_offset
4139 + stub_entry->target_section->output_section->vma);
4140
d3ce72d0 4141 template_sequence = stub_entry->stub_template;
461a49ca 4142 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4143
4144 size = 0;
461a49ca 4145 for (i = 0; i < template_size; i++)
906e58ca 4146 {
d3ce72d0 4147 switch (template_sequence[i].type)
461a49ca
DJ		 4148 {
4149 case THUMB16_TYPE:
48229727 4150 {
d3ce72d0
NC		 4151 bfd_vma data = (bfd_vma) template_sequence[i].data;
4152 if (template_sequence[i].reloc_addend != 0)
48229727 4153 {
99059e56
RM		 4154 /* We've borrowed the reloc_addend field to mean we should
4155 insert a condition code into this (Thumb-1 branch)
4156 instruction. See THUMB16_BCOND_INSN. */
4157 BFD_ASSERT ((data & 0xff00) == 0xd000);
4158 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
48229727 4159 }
fe33d2fa 4160 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4161 size += 2;
4162 }
461a49ca 4163 break;
906e58ca 4164
48229727 4165 case THUMB32_TYPE:
fe33d2fa
CL		 4166 bfd_put_16 (stub_bfd,
4167 (template_sequence[i].data >> 16) & 0xffff,
4168 loc + size);
4169 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4170 loc + size + 2);
99059e56
RM		 4171 if (template_sequence[i].r_type != R_ARM_NONE)
4172 {
4173 stub_reloc_idx[nrelocs] = i;
4174 stub_reloc_offset[nrelocs++] = size;
4175 }
4176 size += 4;
4177 break;
48229727 4178
461a49ca 4179 case ARM_TYPE:
fe33d2fa
CL		 4180 bfd_put_32 (stub_bfd, template_sequence[i].data,
4181 loc + size);
461a49ca
DJ		 4182 /* Handle cases where the target is encoded within the
4183 instruction. */
d3ce72d0 4184 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4185 {
48229727
JB		 4186 stub_reloc_idx[nrelocs] = i;
4187 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4188 }
4189 size += 4;
4190 break;
4191
4192 case DATA_TYPE:
d3ce72d0 4193 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4194 stub_reloc_idx[nrelocs] = i;
4195 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4196 size += 4;
4197 break;
4198
4199 default:
4200 BFD_FAIL ();
4201 return FALSE;
4202 }
906e58ca 4203 }
461a49ca 4204
906e58ca
NC		 4205 stub_sec->size += size;
4206
461a49ca
DJ		 4207 /* Stub size has already been computed in arm_size_one_stub. Check
4208 consistency. */
4209 BFD_ASSERT (size == stub_entry->stub_size);
4210
906e58ca 4211 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4212 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4213 sym_value |= 1;
4214
48229727
JB		 4215 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4216 in each stub. */
4217 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4218
48229727 4219 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4220 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4221 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4222 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4223 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4224 {
4225 Elf_Internal_Rela rel;
4226 bfd_boolean unresolved_reloc;
4227 char *error_message;
35fc36a8
RS		 4228 enum arm_st_branch_type branch_type
4229 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4230 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4231 bfd_vma points_to = sym_value + stub_entry->target_addend;
4232
4233 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0 4234 rel.r_info = ELF32_R_INFO (0,
99059e56 4235 template_sequence[stub_reloc_idx[i]].r_type);
d3ce72d0 4236 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4237
4238 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4239 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4240 template should refer back to the instruction after the original
4241 branch. */
4242 points_to = sym_value;
4243
33c6a8fc
JB		 4244 /* There may be unintended consequences if this is not true. */
4245 BFD_ASSERT (stub_entry->h == NULL);
4246
48229727
JB		 4247 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4248 properly. We should probably use this function unconditionally,
4249 rather than only for certain relocations listed in the enclosing
4250 conditional, for the sake of consistency. */
4251 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4252 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4253 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4254 points_to, info, stub_entry->target_section, "", STT_FUNC,
4255 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4256 &unresolved_reloc, &error_message);
48229727
JB		 4257 }
4258 else
4259 {
fe33d2fa
CL		 4260 Elf_Internal_Rela rel;
4261 bfd_boolean unresolved_reloc;
4262 char *error_message;
4263 bfd_vma points_to = sym_value + stub_entry->target_addend
4264 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4265
4266 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4267 rel.r_info = ELF32_R_INFO (0,
99059e56 4268 template_sequence[stub_reloc_idx[i]].r_type);
fe33d2fa
CL		 4269 rel.r_addend = 0;
4270
4271 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4272 (template_sequence[stub_reloc_idx[i]].r_type),
4273 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4274 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4275 stub_entry->branch_type,
fe33d2fa
CL		 4276 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4277 &error_message);
48229727 4278 }
906e58ca
NC		 4279
4280 return TRUE;
48229727 4281#undef MAXRELOCS
906e58ca
NC		 4282}
4283
48229727
JB		 4284/* Calculate the template, template size and instruction size for a stub.
4285 Return value is the instruction size. */
906e58ca 4286
48229727
JB		 4287static unsigned int
4288find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4289 const insn_sequence **stub_template,
4290 int *stub_template_size)
906e58ca 4291{
d3ce72d0 4292 const insn_sequence *template_sequence = NULL;
48229727
JB		 4293 int template_size = 0, i;
4294 unsigned int size;
906e58ca 4295
d3ce72d0 4296 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4297 if (stub_template)
4298 *stub_template = template_sequence;
4299
48229727 4300 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4301 if (stub_template_size)
4302 *stub_template_size = template_size;
906e58ca
NC		 4303
4304 size = 0;
461a49ca
DJ		 4305 for (i = 0; i < template_size; i++)
4306 {
d3ce72d0 4307 switch (template_sequence[i].type)
461a49ca
DJ		 4308 {
4309 case THUMB16_TYPE:
4310 size += 2;
4311 break;
4312
4313 case ARM_TYPE:
48229727 4314 case THUMB32_TYPE:
461a49ca
DJ		 4315 case DATA_TYPE:
4316 size += 4;
4317 break;
4318
4319 default:
4320 BFD_FAIL ();
2a229407 4321 return 0;
461a49ca
DJ		 4322 }
4323 }
4324
48229727
JB		 4325 return size;
4326}
4327
4328/* As above, but don't actually build the stub. Just bump offset so
4329 we know stub section sizes. */
4330
4331static bfd_boolean
4332arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4333 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4334{
4335 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4336 const insn_sequence *template_sequence;
48229727
JB		 4337 int template_size, size;
4338
4339 /* Massage our args to the form they really have. */
4340 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4341
4342 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4343 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4344
d3ce72d0 4345 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4346 &template_size);
4347
461a49ca 4348 stub_entry->stub_size = size;
d3ce72d0 4349 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4350 stub_entry->stub_template_size = template_size;
4351
906e58ca
NC		 4352 size = (size + 7) & ~7;
4353 stub_entry->stub_sec->size += size;
461a49ca 4354
906e58ca
NC		 4355 return TRUE;
4356}
4357
4358/* External entry points for sizing and building linker stubs. */
4359
4360/* Set up various things so that we can make a list of input sections
4361 for each output section included in the link. Returns -1 on error,
4362 0 when no stubs will be needed, and 1 on success. */
4363
4364int
4365elf32_arm_setup_section_lists (bfd *output_bfd,
4366 struct bfd_link_info *info)
4367{
4368 bfd *input_bfd;
4369 unsigned int bfd_count;
4370 int top_id, top_index;
4371 asection *section;
4372 asection **input_list, **list;
4373 bfd_size_type amt;
4374 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4375
4dfe6ac6
NC		 4376 if (htab == NULL)
4377 return 0;
906e58ca
NC		 4378 if (! is_elf_hash_table (htab))
4379 return 0;
4380
4381 /* Count the number of input BFDs and find the top input section id. */
4382 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4383 input_bfd != NULL;
4384 input_bfd = input_bfd->link_next)
4385 {
4386 bfd_count += 1;
4387 for (section = input_bfd->sections;
4388 section != NULL;
4389 section = section->next)
4390 {
4391 if (top_id < section->id)
4392 top_id = section->id;
4393 }
4394 }
4395 htab->bfd_count = bfd_count;
4396
4397 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4398 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4399 if (htab->stub_group == NULL)
4400 return -1;
fe33d2fa 4401 htab->top_id = top_id;
906e58ca
NC		 4402
4403 /* We can't use output_bfd->section_count here to find the top output
4404 section index as some sections may have been removed, and
4405 _bfd_strip_section_from_output doesn't renumber the indices. */
4406 for (section = output_bfd->sections, top_index = 0;
4407 section != NULL;
4408 section = section->next)
4409 {
4410 if (top_index < section->index)
4411 top_index = section->index;
4412 }
4413
4414 htab->top_index = top_index;
4415 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4416 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4417 htab->input_list = input_list;
4418 if (input_list == NULL)
4419 return -1;
4420
4421 /* For sections we aren't interested in, mark their entries with a
4422 value we can check later. */
4423 list = input_list + top_index;
4424 do
4425 *list = bfd_abs_section_ptr;
4426 while (list-- != input_list);
4427
4428 for (section = output_bfd->sections;
4429 section != NULL;
4430 section = section->next)
4431 {
4432 if ((section->flags & SEC_CODE) != 0)
4433 input_list[section->index] = NULL;
4434 }
4435
4436 return 1;
4437}
4438
4439/* The linker repeatedly calls this function for each input section,
4440 in the order that input sections are linked into output sections.
4441 Build lists of input sections to determine groupings between which
4442 we may insert linker stubs. */
4443
4444void
4445elf32_arm_next_input_section (struct bfd_link_info *info,
4446 asection *isec)
4447{
4448 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4449
4dfe6ac6
NC		 4450 if (htab == NULL)
4451 return;
4452
906e58ca
NC		 4453 if (isec->output_section->index <= htab->top_index)
4454 {
4455 asection **list = htab->input_list + isec->output_section->index;
4456
a7470592 4457 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4458 {
4459 /* Steal the link_sec pointer for our list. */
4460#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4461 /* This happens to make the list in reverse order,
07d72278 4462 which we reverse later. */
906e58ca
NC		 4463 PREV_SEC (isec) = *list;
4464 *list = isec;
4465 }
4466 }
4467}
4468
4469/* See whether we can group stub sections together. Grouping stub
4470 sections may result in fewer stubs. More importantly, we need to
07d72278 4471 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4472 .fini output sections respectively, because glibc splits the
4473 _init and _fini functions into multiple parts. Putting a stub in
4474 the middle of a function is not a good idea. */
4475
4476static void
4477group_sections (struct elf32_arm_link_hash_table *htab,
4478 bfd_size_type stub_group_size,
07d72278 4479 bfd_boolean stubs_always_after_branch)
906e58ca 4480{
07d72278 4481 asection **list = htab->input_list;
906e58ca
NC		 4482
4483 do
4484 {
4485 asection *tail = *list;
07d72278 4486 asection *head;
906e58ca
NC		 4487
4488 if (tail == bfd_abs_section_ptr)
4489 continue;
4490
07d72278
DJ		 4491 /* Reverse the list: we must avoid placing stubs at the
4492 beginning of the section because the beginning of the text
4493 section may be required for an interrupt vector in bare metal
4494 code. */
4495#define NEXT_SEC PREV_SEC
e780aef2
CL		 4496 head = NULL;
4497 while (tail != NULL)
99059e56
RM		 4498 {
4499 /* Pop from tail. */
4500 asection *item = tail;
4501 tail = PREV_SEC (item);
e780aef2 4502
99059e56
RM		 4503 /* Push on head. */
4504 NEXT_SEC (item) = head;
4505 head = item;
4506 }
07d72278
DJ		 4507
4508 while (head != NULL)
906e58ca
NC		 4509 {
4510 asection *curr;
07d72278 4511 asection *next;
e780aef2
CL		 4512 bfd_vma stub_group_start = head->output_offset;
4513 bfd_vma end_of_next;
906e58ca 4514
07d72278 4515 curr = head;
e780aef2 4516 while (NEXT_SEC (curr) != NULL)
8cd931b7 4517 {
e780aef2
CL		 4518 next = NEXT_SEC (curr);
4519 end_of_next = next->output_offset + next->size;
4520 if (end_of_next - stub_group_start >= stub_group_size)
4521 /* End of NEXT is too far from start, so stop. */
8cd931b7 4522 break;
e780aef2
CL		 4523 /* Add NEXT to the group. */
4524 curr = next;
8cd931b7 4525 }
906e58ca 4526
07d72278 4527 /* OK, the size from the start to the start of CURR is less
906e58ca 4528 than stub_group_size and thus can be handled by one stub
07d72278 4529 section. (Or the head section is itself larger than
906e58ca
NC		 4530 stub_group_size, in which case we may be toast.)
4531 We should really be keeping track of the total size of
4532 stubs added here, as stubs contribute to the final output
7fb9f789 4533 section size. */
906e58ca
NC		 4534 do
4535 {
07d72278 4536 next = NEXT_SEC (head);
906e58ca 4537 /* Set up this stub group. */
07d72278 4538 htab->stub_group[head->id].link_sec = curr;
906e58ca 4539 }
07d72278 4540 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4541
4542 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4543 bytes after the stub section can be handled by it too. */
4544 if (!stubs_always_after_branch)
906e58ca 4545 {
e780aef2
CL		 4546 stub_group_start = curr->output_offset + curr->size;
4547
8cd931b7 4548 while (next != NULL)
906e58ca 4549 {
e780aef2
CL		 4550 end_of_next = next->output_offset + next->size;
4551 if (end_of_next - stub_group_start >= stub_group_size)
4552 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4553 break;
e780aef2 4554 /* Add NEXT to the stub group. */
07d72278
DJ		 4555 head = next;
4556 next = NEXT_SEC (head);
4557 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4558 }
4559 }
07d72278 4560 head = next;
906e58ca
NC		 4561 }
4562 }
07d72278 4563 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4564
4565 free (htab->input_list);
4566#undef PREV_SEC
07d72278 4567#undef NEXT_SEC
906e58ca
NC		 4568}
4569
48229727
JB		 4570/* Comparison function for sorting/searching relocations relating to Cortex-A8
4571 erratum fix. */
4572
4573static int
4574a8_reloc_compare (const void *a, const void *b)
4575{
21d799b5
NC		 4576 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4577 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4578
4579 if (ra->from < rb->from)
4580 return -1;
4581 else if (ra->from > rb->from)
4582 return 1;
4583 else
4584 return 0;
4585}
4586
4587static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4588 const char *, char **);
4589
4590/* Helper function to scan code for sequences which might trigger the Cortex-A8
4591 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4592 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4593 otherwise. */
4594
81694485
NC		 4595static bfd_boolean
4596cortex_a8_erratum_scan (bfd *input_bfd,
4597 struct bfd_link_info *info,
48229727
JB		 4598 struct a8_erratum_fix **a8_fixes_p,
4599 unsigned int *num_a8_fixes_p,
4600 unsigned int *a8_fix_table_size_p,
4601 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4602 unsigned int num_a8_relocs,
4603 unsigned prev_num_a8_fixes,
4604 bfd_boolean *stub_changed_p)
48229727
JB		 4605{
4606 asection *section;
4607 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4608 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4609 unsigned int num_a8_fixes = *num_a8_fixes_p;
4610 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4611
4dfe6ac6
NC		 4612 if (htab == NULL)
4613 return FALSE;
4614
48229727
JB		 4615 for (section = input_bfd->sections;
4616 section != NULL;
4617 section = section->next)
4618 {
4619 bfd_byte *contents = NULL;
4620 struct _arm_elf_section_data *sec_data;
4621 unsigned int span;
4622 bfd_vma base_vma;
4623
4624 if (elf_section_type (section) != SHT_PROGBITS
99059e56
RM		 4625 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4626 || (section->flags & SEC_EXCLUDE) != 0
4627 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4628 || (section->output_section == bfd_abs_section_ptr))
4629 continue;
48229727
JB		 4630
4631 base_vma = section->output_section->vma + section->output_offset;
4632
4633 if (elf_section_data (section)->this_hdr.contents != NULL)
99059e56 4634 contents = elf_section_data (section)->this_hdr.contents;
48229727 4635 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
99059e56 4636 return TRUE;
48229727
JB		 4637
4638 sec_data = elf32_arm_section_data (section);
4639
4640 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 4641 {
4642 unsigned int span_start = sec_data->map[span].vma;
4643 unsigned int span_end = (span == sec_data->mapcount - 1)
4644 ? section->size : sec_data->map[span + 1].vma;
4645 unsigned int i;
4646 char span_type = sec_data->map[span].type;
4647 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4648
4649 if (span_type != 't')
4650 continue;
4651
4652 /* Span is entirely within a single 4KB region: skip scanning. */
4653 if (((base_vma + span_start) & ~0xfff)
48229727 4654 == ((base_vma + span_end) & ~0xfff))
99059e56
RM		 4655 continue;
4656
4657 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4658
4659 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4660 * The branch target is in the same 4KB region as the
4661 first half of the branch.
4662 * The instruction before the branch is a 32-bit
4663 length non-branch instruction. */
4664 for (i = span_start; i < span_end;)
4665 {
4666 unsigned int insn = bfd_getl16 (&contents[i]);
4667 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
48229727
JB		 4668 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4669
99059e56
RM		 4670 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4671 insn_32bit = TRUE;
48229727
JB		 4672
4673 if (insn_32bit)
99059e56
RM		 4674 {
4675 /* Load the rest of the insn (in manual-friendly order). */
4676 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4677
4678 /* Encoding T4: B<c>.W. */
4679 is_b = (insn & 0xf800d000) == 0xf0009000;
4680 /* Encoding T1: BL<c>.W. */
4681 is_bl = (insn & 0xf800d000) == 0xf000d000;
4682 /* Encoding T2: BLX<c>.W. */
4683 is_blx = (insn & 0xf800d000) == 0xf000c000;
48229727
JB		 4684 /* Encoding T3: B<c>.W (not permitted in IT block). */
4685 is_bcc = (insn & 0xf800d000) == 0xf0008000
4686 && (insn & 0x07f00000) != 0x03800000;
4687 }
4688
4689 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4690
99059e56 4691 if (((base_vma + i) & 0xfff) == 0xffe
81694485
NC		 4692 && insn_32bit
4693 && is_32bit_branch
4694 && last_was_32bit
4695 && ! last_was_branch)
99059e56
RM		 4696 {
4697 bfd_signed_vma offset = 0;
4698 bfd_boolean force_target_arm = FALSE;
48229727 4699 bfd_boolean force_target_thumb = FALSE;
99059e56
RM		 4700 bfd_vma target;
4701 enum elf32_arm_stub_type stub_type = arm_stub_none;
4702 struct a8_erratum_reloc key, *found;
4703 bfd_boolean use_plt = FALSE;
48229727 4704
99059e56
RM		 4705 key.from = base_vma + i;
4706 found = (struct a8_erratum_reloc *)
4707 bsearch (&key, a8_relocs, num_a8_relocs,
4708 sizeof (struct a8_erratum_reloc),
4709 &a8_reloc_compare);
48229727
JB		 4710
4711 if (found)
4712 {
4713 char *error_message = NULL;
4714 struct elf_link_hash_entry *entry;
4715
4716 /* We don't care about the error returned from this
99059e56 4717 function, only if there is glue or not. */
48229727
JB		 4718 entry = find_thumb_glue (info, found->sym_name,
4719 &error_message);
4720
4721 if (entry)
4722 found->non_a8_stub = TRUE;
4723
92750f34 4724 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4725 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4726 && found->hash->root.plt.offset != (bfd_vma) -1)
4727 use_plt = TRUE;
4728
4729 if (found->r_type == R_ARM_THM_CALL)
4730 {
35fc36a8
RS		 4731 if (found->branch_type == ST_BRANCH_TO_ARM
4732 || use_plt)
92750f34
DJ		 4733 force_target_arm = TRUE;
4734 else
4735 force_target_thumb = TRUE;
4736 }
48229727
JB		 4737 }
4738
99059e56 4739 /* Check if we have an offending branch instruction. */
48229727
JB		 4740
4741 if (found && found->non_a8_stub)
4742 /* We've already made a stub for this instruction, e.g.
4743 it's a long branch or a Thumb->ARM stub. Assume that
4744 stub will suffice to work around the A8 erratum (see
4745 setting of always_after_branch above). */
4746 ;
99059e56
RM		 4747 else if (is_bcc)
4748 {
4749 offset = (insn & 0x7ff) << 1;
4750 offset |= (insn & 0x3f0000) >> 4;
4751 offset |= (insn & 0x2000) ? 0x40000 : 0;
4752 offset |= (insn & 0x800) ? 0x80000 : 0;
4753 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4754 if (offset & 0x100000)
4755 offset |= ~ ((bfd_signed_vma) 0xfffff);
4756 stub_type = arm_stub_a8_veneer_b_cond;
4757 }
4758 else if (is_b || is_bl || is_blx)
4759 {
4760 int s = (insn & 0x4000000) != 0;
4761 int j1 = (insn & 0x2000) != 0;
4762 int j2 = (insn & 0x800) != 0;
4763 int i1 = !(j1 ^ s);
4764 int i2 = !(j2 ^ s);
4765
4766 offset = (insn & 0x7ff) << 1;
4767 offset |= (insn & 0x3ff0000) >> 4;
4768 offset |= i2 << 22;
4769 offset |= i1 << 23;
4770 offset |= s << 24;
4771 if (offset & 0x1000000)
4772 offset |= ~ ((bfd_signed_vma) 0xffffff);
4773
4774 if (is_blx)
4775 offset &= ~ ((bfd_signed_vma) 3);
4776
4777 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4778 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4779 }
4780
4781 if (stub_type != arm_stub_none)
4782 {
4783 bfd_vma pc_for_insn = base_vma + i + 4;
48229727
JB		 4784
4785 /* The original instruction is a BL, but the target is
99059e56 4786 an ARM instruction. If we were not making a stub,
48229727
JB		 4787 the BL would have been converted to a BLX. Use the
4788 BLX stub instead in that case. */
4789 if (htab->use_blx && force_target_arm
4790 && stub_type == arm_stub_a8_veneer_bl)
4791 {
4792 stub_type = arm_stub_a8_veneer_blx;
4793 is_blx = TRUE;
4794 is_bl = FALSE;
4795 }
4796 /* Conversely, if the original instruction was
4797 BLX but the target is Thumb mode, use the BL
4798 stub. */
4799 else if (force_target_thumb
4800 && stub_type == arm_stub_a8_veneer_blx)
4801 {
4802 stub_type = arm_stub_a8_veneer_bl;
4803 is_blx = FALSE;
4804 is_bl = TRUE;
4805 }
4806
99059e56
RM		 4807 if (is_blx)
4808 pc_for_insn &= ~ ((bfd_vma) 3);
48229727 4809
99059e56
RM		 4810 /* If we found a relocation, use the proper destination,
4811 not the offset in the (unrelocated) instruction.
48229727
JB		 4812 Note this is always done if we switched the stub type
4813 above. */
99059e56
RM		 4814 if (found)
4815 offset =
81694485 4816 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4817
99059e56
RM		 4818 /* If the stub will use a Thumb-mode branch to a
4819 PLT target, redirect it to the preceding Thumb
4820 entry point. */
4821 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4822 offset -= PLT_THUMB_STUB_SIZE;
7d24e6a6 4823
99059e56 4824 target = pc_for_insn + offset;
48229727 4825
99059e56
RM		 4826 /* The BLX stub is ARM-mode code. Adjust the offset to
4827 take the different PC value (+8 instead of +4) into
48229727 4828 account. */
99059e56
RM		 4829 if (stub_type == arm_stub_a8_veneer_blx)
4830 offset += 4;
4831
4832 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4833 {
4834 char *stub_name = NULL;
4835
4836 if (num_a8_fixes == a8_fix_table_size)
4837 {
4838 a8_fix_table_size *= 2;
4839 a8_fixes = (struct a8_erratum_fix *)
4840 bfd_realloc (a8_fixes,
4841 sizeof (struct a8_erratum_fix)
4842 * a8_fix_table_size);
4843 }
48229727 4844
eb7c4339
NS		 4845 if (num_a8_fixes < prev_num_a8_fixes)
4846 {
4847 /* If we're doing a subsequent scan,
4848 check if we've found the same fix as
4849 before, and try and reuse the stub
4850 name. */
4851 stub_name = a8_fixes[num_a8_fixes].stub_name;
4852 if ((a8_fixes[num_a8_fixes].section != section)
4853 || (a8_fixes[num_a8_fixes].offset != i))
4854 {
4855 free (stub_name);
4856 stub_name = NULL;
4857 *stub_changed_p = TRUE;
4858 }
4859 }
4860
4861 if (!stub_name)
4862 {
21d799b5 4863 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4864 if (stub_name != NULL)
4865 sprintf (stub_name, "%x:%x", section->id, i);
4866 }
48229727 4867
99059e56
RM		 4868 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4869 a8_fixes[num_a8_fixes].section = section;
4870 a8_fixes[num_a8_fixes].offset = i;
4871 a8_fixes[num_a8_fixes].addend = offset;
4872 a8_fixes[num_a8_fixes].orig_insn = insn;
4873 a8_fixes[num_a8_fixes].stub_name = stub_name;
4874 a8_fixes[num_a8_fixes].stub_type = stub_type;
4875 a8_fixes[num_a8_fixes].branch_type =
35fc36a8 4876 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727 4877
99059e56
RM		 4878 num_a8_fixes++;
4879 }
4880 }
4881 }
48229727 4882
99059e56
RM		 4883 i += insn_32bit ? 4 : 2;
4884 last_was_32bit = insn_32bit;
48229727 4885 last_was_branch = is_32bit_branch;
99059e56
RM		 4886 }
4887 }
48229727
JB		 4888
4889 if (elf_section_data (section)->this_hdr.contents == NULL)
99059e56 4890 free (contents);
48229727 4891 }
fe33d2fa 4892
48229727
JB		 4893 *a8_fixes_p = a8_fixes;
4894 *num_a8_fixes_p = num_a8_fixes;
4895 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4896
81694485 4897 return FALSE;
48229727
JB		 4898}
4899
906e58ca
NC		 4900/* Determine and set the size of the stub section for a final link.
4901
4902 The basic idea here is to examine all the relocations looking for
4903 PC-relative calls to a target that is unreachable with a "bl"
4904 instruction. */
4905
4906bfd_boolean
4907elf32_arm_size_stubs (bfd *output_bfd,
4908 bfd *stub_bfd,
4909 struct bfd_link_info *info,
4910 bfd_signed_vma group_size,
7a89b94e
NC		 4911 asection * (*add_stub_section) (const char *, asection *,
4912 unsigned int),
906e58ca
NC		 4913 void (*layout_sections_again) (void))
4914{
4915 bfd_size_type stub_group_size;
07d72278 4916 bfd_boolean stubs_always_after_branch;
906e58ca 4917 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4918 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4919 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4920 struct a8_erratum_reloc *a8_relocs = NULL;
4921 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4922
4dfe6ac6
NC		 4923 if (htab == NULL)
4924 return FALSE;
4925
48229727
JB		 4926 if (htab->fix_cortex_a8)
4927 {
21d799b5 4928 a8_fixes = (struct a8_erratum_fix *)
99059e56 4929 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
21d799b5 4930 a8_relocs = (struct a8_erratum_reloc *)
99059e56 4931 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4932 }
906e58ca
NC		 4933
4934 /* Propagate mach to stub bfd, because it may not have been
4935 finalized when we created stub_bfd. */
4936 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4937 bfd_get_mach (output_bfd));
4938
4939 /* Stash our params away. */
4940 htab->stub_bfd = stub_bfd;
4941 htab->add_stub_section = add_stub_section;
4942 htab->layout_sections_again = layout_sections_again;
07d72278 4943 stubs_always_after_branch = group_size < 0;
48229727
JB		 4944
4945 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4946 as the first half of a 32-bit branch straddling two 4K pages. This is a
4947 crude way of enforcing that. */
4948 if (htab->fix_cortex_a8)
4949 stubs_always_after_branch = 1;
4950
906e58ca
NC		 4951 if (group_size < 0)
4952 stub_group_size = -group_size;
4953 else
4954 stub_group_size = group_size;
4955
4956 if (stub_group_size == 1)
4957 {
4958 /* Default values. */
4959 /* Thumb branch range is +-4MB has to be used as the default
4960 maximum size (a given section can contain both ARM and Thumb
4961 code, so the worst case has to be taken into account).
4962
4963 This value is 24K less than that, which allows for 2025
4964 12-byte stubs. If we exceed that, then we will fail to link.
4965 The user will have to relink with an explicit group size
4966 option. */
4967 stub_group_size = 4170000;
4968 }
4969
07d72278 4970 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4971
3ae046cc
NS		 4972 /* If we're applying the cortex A8 fix, we need to determine the
4973 program header size now, because we cannot change it later --
4974 that could alter section placements. Notice the A8 erratum fix
4975 ends up requiring the section addresses to remain unchanged
4976 modulo the page size. That's something we cannot represent
4977 inside BFD, and we don't want to force the section alignment to
4978 be the page size. */
4979 if (htab->fix_cortex_a8)
4980 (*htab->layout_sections_again) ();
4981
906e58ca
NC		 4982 while (1)
4983 {
4984 bfd *input_bfd;
4985 unsigned int bfd_indx;
4986 asection *stub_sec;
eb7c4339
NS		 4987 bfd_boolean stub_changed = FALSE;
4988 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4989
48229727 4990 num_a8_fixes = 0;
906e58ca
NC		 4991 for (input_bfd = info->input_bfds, bfd_indx = 0;
4992 input_bfd != NULL;
4993 input_bfd = input_bfd->link_next, bfd_indx++)
4994 {
4995 Elf_Internal_Shdr *symtab_hdr;
4996 asection *section;
4997 Elf_Internal_Sym *local_syms = NULL;
4998
99059e56
RM		 4999 if (!is_arm_elf (input_bfd))
5000 continue;
adbcc655 5001
48229727
JB		 5002 num_a8_relocs = 0;
5003
906e58ca
NC		 5004 /* We'll need the symbol table in a second. */
5005 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5006 if (symtab_hdr->sh_info == 0)
5007 continue;
5008
5009 /* Walk over each section attached to the input bfd. */
5010 for (section = input_bfd->sections;
5011 section != NULL;
5012 section = section->next)
5013 {
5014 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5015
5016 /* If there aren't any relocs, then there's nothing more
5017 to do. */
5018 if ((section->flags & SEC_RELOC) == 0
5019 || section->reloc_count == 0
5020 || (section->flags & SEC_CODE) == 0)
5021 continue;
5022
5023 /* If this section is a link-once section that will be
5024 discarded, then don't create any stubs. */
5025 if (section->output_section == NULL
5026 || section->output_section->owner != output_bfd)
5027 continue;
5028
5029 /* Get the relocs. */
5030 internal_relocs
5031 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5032 NULL, info->keep_memory);
5033 if (internal_relocs == NULL)
5034 goto error_ret_free_local;
5035
5036 /* Now examine each relocation. */
5037 irela = internal_relocs;
5038 irelaend = irela + section->reloc_count;
5039 for (; irela < irelaend; irela++)
5040 {
5041 unsigned int r_type, r_indx;
5042 enum elf32_arm_stub_type stub_type;
5043 struct elf32_arm_stub_hash_entry *stub_entry;
5044 asection *sym_sec;
5045 bfd_vma sym_value;
5046 bfd_vma destination;
5047 struct elf32_arm_link_hash_entry *hash;
7413f23f 5048 const char *sym_name;
906e58ca
NC		 5049 char *stub_name;
5050 const asection *id_sec;
34e77a92 5051 unsigned char st_type;
35fc36a8 5052 enum arm_st_branch_type branch_type;
48229727 5053 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5054
5055 r_type = ELF32_R_TYPE (irela->r_info);
5056 r_indx = ELF32_R_SYM (irela->r_info);
5057
5058 if (r_type >= (unsigned int) R_ARM_max)
5059 {
5060 bfd_set_error (bfd_error_bad_value);
5061 error_ret_free_internal:
5062 if (elf_section_data (section)->relocs == NULL)
5063 free (internal_relocs);
5064 goto error_ret_free_local;
5065 }
b38cadfb 5066
0855e32b
NS		 5067 hash = NULL;
5068 if (r_indx >= symtab_hdr->sh_info)
5069 hash = elf32_arm_hash_entry
5070 (elf_sym_hashes (input_bfd)
5071 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5072
0855e32b
NS		 5073 /* Only look for stubs on branch instructions, or
5074 non-relaxed TLSCALL */
906e58ca 5075 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5076 && (r_type != (unsigned int) R_ARM_THM_CALL)
5077 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5078 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5079 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5080 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5081 && (r_type != (unsigned int) R_ARM_PLT32)
5082 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5083 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5084 && r_type == elf32_arm_tls_transition
5085 (info, r_type, &hash->root)
5086 && ((hash ? hash->tls_type
5087 : (elf32_arm_local_got_tls_type
5088 (input_bfd)[r_indx]))
5089 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5090 continue;
5091
5092 /* Now determine the call target, its name, value,
5093 section. */
5094 sym_sec = NULL;
5095 sym_value = 0;
5096 destination = 0;
7413f23f 5097 sym_name = NULL;
b38cadfb 5098
0855e32b
NS		 5099 if (r_type == (unsigned int) R_ARM_TLS_CALL
5100 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5101 {
5102 /* A non-relaxed TLS call. The target is the
5103 plt-resident trampoline and nothing to do
5104 with the symbol. */
5105 BFD_ASSERT (htab->tls_trampoline > 0);
5106 sym_sec = htab->root.splt;
5107 sym_value = htab->tls_trampoline;
5108 hash = 0;
34e77a92 5109 st_type = STT_FUNC;
35fc36a8 5110 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5111 }
5112 else if (!hash)
906e58ca
NC		 5113 {
5114 /* It's a local symbol. */
5115 Elf_Internal_Sym *sym;
906e58ca
NC		 5116
5117 if (local_syms == NULL)
5118 {
5119 local_syms
5120 = (Elf_Internal_Sym *) symtab_hdr->contents;
5121 if (local_syms == NULL)
5122 local_syms
5123 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5124 symtab_hdr->sh_info, 0,
5125 NULL, NULL, NULL);
5126 if (local_syms == NULL)
5127 goto error_ret_free_internal;
5128 }
5129
5130 sym = local_syms + r_indx;
f6d250ce
TS		 5131 if (sym->st_shndx == SHN_UNDEF)
5132 sym_sec = bfd_und_section_ptr;
5133 else if (sym->st_shndx == SHN_ABS)
5134 sym_sec = bfd_abs_section_ptr;
5135 else if (sym->st_shndx == SHN_COMMON)
5136 sym_sec = bfd_com_section_ptr;
5137 else
5138 sym_sec =
5139 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5140
ffcb4889
NS		 5141 if (!sym_sec)
5142 /* This is an undefined symbol. It can never
5143 be resolved. */
5144 continue;
fe33d2fa 5145
906e58ca
NC		 5146 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5147 sym_value = sym->st_value;
5148 destination = (sym_value + irela->r_addend
5149 + sym_sec->output_offset
5150 + sym_sec->output_section->vma);
34e77a92 5151 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5152 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5153 sym_name
5154 = bfd_elf_string_from_elf_section (input_bfd,
5155 symtab_hdr->sh_link,
5156 sym->st_name);
906e58ca
NC		 5157 }
5158 else
5159 {
5160 /* It's an external symbol. */
906e58ca
NC		 5161 while (hash->root.root.type == bfd_link_hash_indirect
5162 || hash->root.root.type == bfd_link_hash_warning)
5163 hash = ((struct elf32_arm_link_hash_entry *)
5164 hash->root.root.u.i.link);
5165
5166 if (hash->root.root.type == bfd_link_hash_defined
5167 || hash->root.root.type == bfd_link_hash_defweak)
5168 {
5169 sym_sec = hash->root.root.u.def.section;
5170 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5171
5172 struct elf32_arm_link_hash_table *globals =
5173 elf32_arm_hash_table (info);
5174
5175 /* For a destination in a shared library,
5176 use the PLT stub as target address to
5177 decide whether a branch stub is
5178 needed. */
4dfe6ac6 5179 if (globals != NULL
362d30a1 5180 && globals->root.splt != NULL
4dfe6ac6 5181 && hash != NULL
022f8312
CL		 5182 && hash->root.plt.offset != (bfd_vma) -1)
5183 {
362d30a1 5184 sym_sec = globals->root.splt;
022f8312
CL		 5185 sym_value = hash->root.plt.offset;
5186 if (sym_sec->output_section != NULL)
5187 destination = (sym_value
5188 + sym_sec->output_offset
5189 + sym_sec->output_section->vma);
5190 }
5191 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5192 destination = (sym_value + irela->r_addend
5193 + sym_sec->output_offset
5194 + sym_sec->output_section->vma);
5195 }
69c5861e
CL		 5196 else if ((hash->root.root.type == bfd_link_hash_undefined)
5197 || (hash->root.root.type == bfd_link_hash_undefweak))
5198 {
5199 /* For a shared library, use the PLT stub as
5200 target address to decide whether a long
5201 branch stub is needed.
5202 For absolute code, they cannot be handled. */
5203 struct elf32_arm_link_hash_table *globals =
5204 elf32_arm_hash_table (info);
5205
4dfe6ac6 5206 if (globals != NULL
362d30a1 5207 && globals->root.splt != NULL
4dfe6ac6 5208 && hash != NULL
69c5861e
CL		 5209 && hash->root.plt.offset != (bfd_vma) -1)
5210 {
362d30a1 5211 sym_sec = globals->root.splt;
69c5861e
CL		 5212 sym_value = hash->root.plt.offset;
5213 if (sym_sec->output_section != NULL)
5214 destination = (sym_value
5215 + sym_sec->output_offset
5216 + sym_sec->output_section->vma);
5217 }
5218 else
5219 continue;
5220 }
906e58ca
NC		 5221 else
5222 {
5223 bfd_set_error (bfd_error_bad_value);
5224 goto error_ret_free_internal;
5225 }
34e77a92 5226 st_type = hash->root.type;
35fc36a8 5227 branch_type = hash->root.target_internal;
7413f23f 5228 sym_name = hash->root.root.root.string;
906e58ca
NC		 5229 }
5230
48229727 5231 do
7413f23f 5232 {
48229727
JB		 5233 /* Determine what (if any) linker stub is needed. */
5234 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5235 st_type, &branch_type,
5236 hash, destination, sym_sec,
48229727
JB		 5237 input_bfd, sym_name);
5238 if (stub_type == arm_stub_none)
5239 break;
5240
5241 /* Support for grouping stub sections. */
5242 id_sec = htab->stub_group[section->id].link_sec;
5243
5244 /* Get the name of this stub. */
5245 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5246 irela, stub_type);
48229727
JB		 5247 if (!stub_name)
5248 goto error_ret_free_internal;
5249
5250 /* We've either created a stub for this reloc already,
5251 or we are about to. */
5252 created_stub = TRUE;
5253
5254 stub_entry = arm_stub_hash_lookup
5255 (&htab->stub_hash_table, stub_name,
5256 FALSE, FALSE);
5257 if (stub_entry != NULL)
5258 {
5259 /* The proper stub has already been created. */
5260 free (stub_name);
eb7c4339 5261 stub_entry->target_value = sym_value;
48229727
JB		 5262 break;
5263 }
7413f23f 5264
48229727
JB		 5265 stub_entry = elf32_arm_add_stub (stub_name, section,
5266 htab);
5267 if (stub_entry == NULL)
5268 {
5269 free (stub_name);
5270 goto error_ret_free_internal;
5271 }
7413f23f 5272
99059e56
RM		 5273 stub_entry->target_value = sym_value;
5274 stub_entry->target_section = sym_sec;
5275 stub_entry->stub_type = stub_type;
5276 stub_entry->h = hash;
5277 stub_entry->branch_type = branch_type;
5278
5279 if (sym_name == NULL)
5280 sym_name = "unnamed";
5281 stub_entry->output_name = (char *)
5282 bfd_alloc (htab->stub_bfd,
5283 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5284 + strlen (sym_name));
5285 if (stub_entry->output_name == NULL)
5286 {
5287 free (stub_name);
5288 goto error_ret_free_internal;
5289 }
5290
5291 /* For historical reasons, use the existing names for
5292 ARM-to-Thumb and Thumb-to-ARM stubs. */
5293 if ((r_type == (unsigned int) R_ARM_THM_CALL
35fc36a8
RS		 5294 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5295 && branch_type == ST_BRANCH_TO_ARM)
99059e56
RM		 5296 sprintf (stub_entry->output_name,
5297 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5298 else if ((r_type == (unsigned int) R_ARM_CALL
35fc36a8
RS		 5299 || r_type == (unsigned int) R_ARM_JUMP24)
5300 && branch_type == ST_BRANCH_TO_THUMB)
99059e56
RM		 5301 sprintf (stub_entry->output_name,
5302 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5303 else
5304 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5305 sym_name);
5306
5307 stub_changed = TRUE;
5308 }
5309 while (0);
5310
5311 /* Look for relocations which might trigger Cortex-A8
5312 erratum. */
5313 if (htab->fix_cortex_a8
5314 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5315 || r_type == (unsigned int) R_ARM_THM_JUMP19
5316 || r_type == (unsigned int) R_ARM_THM_CALL
5317 || r_type == (unsigned int) R_ARM_THM_XPC22))
5318 {
5319 bfd_vma from = section->output_section->vma
5320 + section->output_offset
5321 + irela->r_offset;
5322
5323 if ((from & 0xfff) == 0xffe)
5324 {
5325 /* Found a candidate. Note we haven't checked the
5326 destination is within 4K here: if we do so (and
5327 don't create an entry in a8_relocs) we can't tell
5328 that a branch should have been relocated when
5329 scanning later. */
5330 if (num_a8_relocs == a8_reloc_table_size)
5331 {
5332 a8_reloc_table_size *= 2;
5333 a8_relocs = (struct a8_erratum_reloc *)
5334 bfd_realloc (a8_relocs,
5335 sizeof (struct a8_erratum_reloc)
5336 * a8_reloc_table_size);
5337 }
5338
5339 a8_relocs[num_a8_relocs].from = from;
5340 a8_relocs[num_a8_relocs].destination = destination;
5341 a8_relocs[num_a8_relocs].r_type = r_type;
5342 a8_relocs[num_a8_relocs].branch_type = branch_type;
5343 a8_relocs[num_a8_relocs].sym_name = sym_name;
5344 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5345 a8_relocs[num_a8_relocs].hash = hash;
5346
5347 num_a8_relocs++;
5348 }
5349 }
906e58ca
NC		 5350 }
5351
99059e56
RM		 5352 /* We're done with the internal relocs, free them. */
5353 if (elf_section_data (section)->relocs == NULL)
5354 free (internal_relocs);
5355 }
48229727 5356
99059e56 5357 if (htab->fix_cortex_a8)
48229727 5358 {
99059e56
RM		 5359 /* Sort relocs which might apply to Cortex-A8 erratum. */
5360 qsort (a8_relocs, num_a8_relocs,
eb7c4339 5361 sizeof (struct a8_erratum_reloc),
99059e56 5362 &a8_reloc_compare);
48229727 5363
99059e56
RM		 5364 /* Scan for branches which might trigger Cortex-A8 erratum. */
5365 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
48229727 5366 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5367 a8_relocs, num_a8_relocs,
5368 prev_num_a8_fixes, &stub_changed)
5369 != 0)
48229727 5370 goto error_ret_free_local;
5e681ec4 5371 }
5e681ec4
PB		 5372 }
5373
eb7c4339 5374 if (prev_num_a8_fixes != num_a8_fixes)
99059e56 5375 stub_changed = TRUE;
48229727 5376
906e58ca
NC		 5377 if (!stub_changed)
5378 break;
5e681ec4 5379
906e58ca
NC		 5380 /* OK, we've added some stubs. Find out the new size of the
5381 stub sections. */
5382 for (stub_sec = htab->stub_bfd->sections;
5383 stub_sec != NULL;
5384 stub_sec = stub_sec->next)
3e6b1042
DJ		 5385 {
5386 /* Ignore non-stub sections. */
5387 if (!strstr (stub_sec->name, STUB_SUFFIX))
5388 continue;
5389
5390 stub_sec->size = 0;
5391 }
b34b2d70 5392
906e58ca
NC		 5393 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5394
48229727
JB		 5395 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5396 if (htab->fix_cortex_a8)
99059e56
RM		 5397 for (i = 0; i < num_a8_fixes; i++)
5398 {
48229727
JB		 5399 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5400 a8_fixes[i].section, htab);
5401
5402 if (stub_sec == NULL)
5403 goto error_ret_free_local;
5404
99059e56
RM		 5405 stub_sec->size
5406 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5407 NULL);
5408 }
48229727
JB		 5409
5410
906e58ca
NC		 5411 /* Ask the linker to do its stuff. */
5412 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5413 }
5414
48229727
JB		 5415 /* Add stubs for Cortex-A8 erratum fixes now. */
5416 if (htab->fix_cortex_a8)
5417 {
5418 for (i = 0; i < num_a8_fixes; i++)
99059e56
RM		 5419 {
5420 struct elf32_arm_stub_hash_entry *stub_entry;
5421 char *stub_name = a8_fixes[i].stub_name;
5422 asection *section = a8_fixes[i].section;
5423 unsigned int section_id = a8_fixes[i].section->id;
5424 asection *link_sec = htab->stub_group[section_id].link_sec;
5425 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5426 const insn_sequence *template_sequence;
5427 int template_size, size = 0;
5428
5429 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5430 TRUE, FALSE);
5431 if (stub_entry == NULL)
5432 {
5433 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5434 section->owner,
5435 stub_name);
5436 return FALSE;
5437 }
5438
5439 stub_entry->stub_sec = stub_sec;
5440 stub_entry->stub_offset = 0;
5441 stub_entry->id_sec = link_sec;
5442 stub_entry->stub_type = a8_fixes[i].stub_type;
5443 stub_entry->target_section = a8_fixes[i].section;
5444 stub_entry->target_value = a8_fixes[i].offset;
5445 stub_entry->target_addend = a8_fixes[i].addend;
5446 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5447 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5448
99059e56
RM		 5449 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5450 &template_sequence,
5451 &template_size);
48229727 5452
99059e56
RM		 5453 stub_entry->stub_size = size;
5454 stub_entry->stub_template = template_sequence;
5455 stub_entry->stub_template_size = template_size;
5456 }
48229727
JB		 5457
5458 /* Stash the Cortex-A8 erratum fix array for use later in
99059e56 5459 elf32_arm_write_section(). */
48229727
JB		 5460 htab->a8_erratum_fixes = a8_fixes;
5461 htab->num_a8_erratum_fixes = num_a8_fixes;
5462 }
5463 else
5464 {
5465 htab->a8_erratum_fixes = NULL;
5466 htab->num_a8_erratum_fixes = 0;
5467 }
906e58ca
NC		 5468 return TRUE;
5469
5470 error_ret_free_local:
5471 return FALSE;
5e681ec4
PB		 5472}
5473
906e58ca
NC		 5474/* Build all the stubs associated with the current output file. The
5475 stubs are kept in a hash table attached to the main linker hash
5476 table. We also set up the .plt entries for statically linked PIC
5477 functions here. This function is called via arm_elf_finish in the
5478 linker. */
252b5132 5479
906e58ca
NC		 5480bfd_boolean
5481elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5482{
906e58ca
NC		 5483 asection *stub_sec;
5484 struct bfd_hash_table *table;
5485 struct elf32_arm_link_hash_table *htab;
252b5132 5486
906e58ca 5487 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5488 if (htab == NULL)
5489 return FALSE;
252b5132 5490
906e58ca
NC		 5491 for (stub_sec = htab->stub_bfd->sections;
5492 stub_sec != NULL;
5493 stub_sec = stub_sec->next)
252b5132 5494 {
906e58ca
NC		 5495 bfd_size_type size;
5496
8029a119 5497 /* Ignore non-stub sections. */
906e58ca
NC		 5498 if (!strstr (stub_sec->name, STUB_SUFFIX))
5499 continue;
5500
5501 /* Allocate memory to hold the linker stubs. */
5502 size = stub_sec->size;
21d799b5 5503 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5504 if (stub_sec->contents == NULL && size != 0)
5505 return FALSE;
5506 stub_sec->size = 0;
252b5132
RH		 5507 }
5508
906e58ca
NC		 5509 /* Build the stubs as directed by the stub hash table. */
5510 table = &htab->stub_hash_table;
5511 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5512 if (htab->fix_cortex_a8)
5513 {
5514 /* Place the cortex a8 stubs last. */
5515 htab->fix_cortex_a8 = -1;
5516 bfd_hash_traverse (table, arm_build_one_stub, info);
5517 }
252b5132 5518
906e58ca 5519 return TRUE;
252b5132
RH		 5520}
5521
9b485d32
NC		 5522/* Locate the Thumb encoded calling stub for NAME. */
5523
252b5132 5524static struct elf_link_hash_entry *
57e8b36a
NC		 5525find_thumb_glue (struct bfd_link_info *link_info,
5526 const char *name,
f2a9dd69 5527 char **error_message)
252b5132
RH		 5528{
5529 char *tmp_name;
5530 struct elf_link_hash_entry *hash;
5531 struct elf32_arm_link_hash_table *hash_table;
5532
5533 /* We need a pointer to the armelf specific hash table. */
5534 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5535 if (hash_table == NULL)
5536 return NULL;
252b5132 5537
21d799b5 5538 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5539 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5540
5541 BFD_ASSERT (tmp_name);
5542
5543 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5544
5545 hash = elf_link_hash_lookup
b34976b6 5546 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5547
b1657152
AM		 5548 if (hash == NULL
5549 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5550 tmp_name, name) == -1)
5551 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5552
5553 free (tmp_name);
5554
5555 return hash;
5556}
5557
9b485d32
NC		 5558/* Locate the ARM encoded calling stub for NAME. */
5559
252b5132 5560static struct elf_link_hash_entry *
57e8b36a
NC		 5561find_arm_glue (struct bfd_link_info *link_info,
5562 const char *name,
f2a9dd69 5563 char **error_message)
252b5132
RH		 5564{
5565 char *tmp_name;
5566 struct elf_link_hash_entry *myh;
5567 struct elf32_arm_link_hash_table *hash_table;
5568
5569 /* We need a pointer to the elfarm specific hash table. */
5570 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5571 if (hash_table == NULL)
5572 return NULL;
252b5132 5573
21d799b5 5574 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5575 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5576
5577 BFD_ASSERT (tmp_name);
5578
5579 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5580
5581 myh = elf_link_hash_lookup
b34976b6 5582 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5583
b1657152
AM		 5584 if (myh == NULL
5585 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5586 tmp_name, name) == -1)
5587 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5588
5589 free (tmp_name);
5590
5591 return myh;
5592}
5593
8f6277f5 5594/* ARM->Thumb glue (static images):
252b5132
RH		 5595
5596 .arm
5597 __func_from_arm:
5598 ldr r12, __func_addr
5599 bx r12
5600 __func_addr:
906e58ca 5601 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5602
26079076
PB		 5603 (v5t static images)
5604 .arm
5605 __func_from_arm:
5606 ldr pc, __func_addr
5607 __func_addr:
906e58ca 5608 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5609
8f6277f5
PB		 5610 (relocatable images)
5611 .arm
5612 __func_from_arm:
5613 ldr r12, __func_offset
5614 add r12, r12, pc
5615 bx r12
5616 __func_offset:
8029a119 5617 .word func - . */
8f6277f5
PB		 5618
5619#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5620static const insn32 a2t1_ldr_insn = 0xe59fc000;
5621static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5622static const insn32 a2t3_func_addr_insn = 0x00000001;
5623
26079076
PB		 5624#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5625static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5626static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5627
8f6277f5
PB		 5628#define ARM2THUMB_PIC_GLUE_SIZE 16
5629static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5630static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5631static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5632
9b485d32 5633/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5634
8029a119
NC		 5635 .thumb .thumb
5636 .align 2 .align 2
5637 __func_from_thumb: __func_from_thumb:
5638 bx pc push {r6, lr}
5639 nop ldr r6, __func_addr
5640 .arm mov lr, pc
5641 b func bx r6
99059e56
RM		 5642 .arm
5643 ;; back_to_thumb
5644 ldmia r13! {r6, lr}
5645 bx lr
5646 __func_addr:
5647 .word func */
252b5132
RH		 5648
5649#define THUMB2ARM_GLUE_SIZE 8
5650static const insn16 t2a1_bx_pc_insn = 0x4778;
5651static const insn16 t2a2_noop_insn = 0x46c0;
5652static const insn32 t2a3_b_insn = 0xea000000;
5653
c7b8f16e
JB		 5654#define VFP11_ERRATUM_VENEER_SIZE 8
5655
845b51d6
PB		 5656#define ARM_BX_VENEER_SIZE 12
5657static const insn32 armbx1_tst_insn = 0xe3100001;
5658static const insn32 armbx2_moveq_insn = 0x01a0f000;
5659static const insn32 armbx3_bx_insn = 0xe12fff10;
5660
7e392df6 5661#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5662static void
5663arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5664{
5665 asection * s;
8029a119 5666 bfd_byte * contents;
252b5132 5667
8029a119 5668 if (size == 0)
3e6b1042
DJ		 5669 {
5670 /* Do not include empty glue sections in the output. */
5671 if (abfd != NULL)
5672 {
3d4d4302 5673 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5674 if (s != NULL)
5675 s->flags |= SEC_EXCLUDE;
5676 }
5677 return;
5678 }
252b5132 5679
8029a119 5680 BFD_ASSERT (abfd != NULL);
252b5132 5681
3d4d4302 5682 s = bfd_get_linker_section (abfd, name);
8029a119 5683 BFD_ASSERT (s != NULL);
252b5132 5684
21d799b5 5685 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5686
8029a119
NC		 5687 BFD_ASSERT (s->size == size);
5688 s->contents = contents;
5689}
906e58ca 5690
8029a119
NC		 5691bfd_boolean
5692bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5693{
5694 struct elf32_arm_link_hash_table * globals;
906e58ca 5695
8029a119
NC		 5696 globals = elf32_arm_hash_table (info);
5697 BFD_ASSERT (globals != NULL);
906e58ca 5698
8029a119
NC		 5699 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5700 globals->arm_glue_size,
5701 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5702
8029a119
NC		 5703 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5704 globals->thumb_glue_size,
5705 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5706
8029a119
NC		 5707 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5708 globals->vfp11_erratum_glue_size,
5709 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5710
8029a119
NC		 5711 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5712 globals->bx_glue_size,
845b51d6
PB		 5713 ARM_BX_GLUE_SECTION_NAME);
5714
b34976b6 5715 return TRUE;
252b5132
RH		 5716}
5717
a4fd1a8e 5718/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5719 returns the symbol identifying the stub. */
5720
a4fd1a8e 5721static struct elf_link_hash_entry *
57e8b36a
NC		 5722record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5723 struct elf_link_hash_entry * h)
252b5132
RH		 5724{
5725 const char * name = h->root.root.string;
63b0f745 5726 asection * s;
252b5132
RH		 5727 char * tmp_name;
5728 struct elf_link_hash_entry * myh;
14a793b2 5729 struct bfd_link_hash_entry * bh;
252b5132 5730 struct elf32_arm_link_hash_table * globals;
dc810e39 5731 bfd_vma val;
2f475487 5732 bfd_size_type size;
252b5132
RH		 5733
5734 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5735 BFD_ASSERT (globals != NULL);
5736 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5737
3d4d4302 5738 s = bfd_get_linker_section
252b5132
RH		 5739 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5740
252b5132
RH		 5741 BFD_ASSERT (s != NULL);
5742
21d799b5 5743 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5744 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5745
5746 BFD_ASSERT (tmp_name);
5747
5748 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5749
5750 myh = elf_link_hash_lookup
b34976b6 5751 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5752
5753 if (myh != NULL)
5754 {
9b485d32 5755 /* We've already seen this guy. */
252b5132 5756 free (tmp_name);
a4fd1a8e 5757 return myh;
252b5132
RH		 5758 }
5759
57e8b36a
NC		 5760 /* The only trick here is using hash_table->arm_glue_size as the value.
5761 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5762 putting it. The +1 on the value marks that the stub has not been
5763 output yet - not that it is a Thumb function. */
14a793b2 5764 bh = NULL;
dc810e39
AM		 5765 val = globals->arm_glue_size + 1;
5766 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5767 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5768 NULL, TRUE, FALSE, &bh);
252b5132 5769
b7693d02
DJ		 5770 myh = (struct elf_link_hash_entry *) bh;
5771 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5772 myh->forced_local = 1;
5773
252b5132
RH		 5774 free (tmp_name);
5775
27e55c4d
PB		 5776 if (link_info->shared || globals->root.is_relocatable_executable
5777 || globals->pic_veneer)
2f475487 5778 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5779 else if (globals->use_blx)
5780 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5781 else
2f475487
AM		 5782 size = ARM2THUMB_STATIC_GLUE_SIZE;
5783
5784 s->size += size;
5785 globals->arm_glue_size += size;
252b5132 5786
a4fd1a8e 5787 return myh;
252b5132
RH		 5788}
5789
845b51d6
PB		 5790/* Allocate space for ARMv4 BX veneers. */
5791
5792static void
5793record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5794{
5795 asection * s;
5796 struct elf32_arm_link_hash_table *globals;
5797 char *tmp_name;
5798 struct elf_link_hash_entry *myh;
5799 struct bfd_link_hash_entry *bh;
5800 bfd_vma val;
5801
5802 /* BX PC does not need a veneer. */
5803 if (reg == 15)
5804 return;
5805
5806 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5807 BFD_ASSERT (globals != NULL);
5808 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5809
5810 /* Check if this veneer has already been allocated. */
5811 if (globals->bx_glue_offset[reg])
5812 return;
5813
3d4d4302 5814 s = bfd_get_linker_section
845b51d6
PB		 5815 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5816
5817 BFD_ASSERT (s != NULL);
5818
5819 /* Add symbol for veneer. */
21d799b5
NC		 5820 tmp_name = (char *)
5821 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5822
845b51d6 5823 BFD_ASSERT (tmp_name);
906e58ca 5824
845b51d6 5825 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5826
845b51d6
PB		 5827 myh = elf_link_hash_lookup
5828 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5829
845b51d6 5830 BFD_ASSERT (myh == NULL);
906e58ca 5831
845b51d6
PB		 5832 bh = NULL;
5833 val = globals->bx_glue_size;
5834 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
99059e56
RM		 5835 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5836 NULL, TRUE, FALSE, &bh);
845b51d6
PB		 5837
5838 myh = (struct elf_link_hash_entry *) bh;
5839 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5840 myh->forced_local = 1;
5841
5842 s->size += ARM_BX_VENEER_SIZE;
5843 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5844 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5845}
5846
5847
c7b8f16e
JB		 5848/* Add an entry to the code/data map for section SEC. */
5849
5850static void
5851elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5852{
5853 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5854 unsigned int newidx;
906e58ca 5855
c7b8f16e
JB		 5856 if (sec_data->map == NULL)
5857 {
21d799b5 5858 sec_data->map = (elf32_arm_section_map *)
99059e56 5859 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5860 sec_data->mapcount = 0;
5861 sec_data->mapsize = 1;
5862 }
906e58ca 5863
c7b8f16e 5864 newidx = sec_data->mapcount++;
906e58ca 5865
c7b8f16e
JB		 5866 if (sec_data->mapcount > sec_data->mapsize)
5867 {
5868 sec_data->mapsize *= 2;
21d799b5 5869 sec_data->map = (elf32_arm_section_map *)
99059e56
RM		 5870 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5871 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5872 }
5873
5874 if (sec_data->map)
5875 {
5876 sec_data->map[newidx].vma = vma;
5877 sec_data->map[newidx].type = type;
c7b8f16e 5878 }
c7b8f16e
JB		 5879}
5880
5881
5882/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5883 veneers are handled for now. */
5884
5885static bfd_vma
5886record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
99059e56
RM		 5887 elf32_vfp11_erratum_list *branch,
5888 bfd *branch_bfd,
5889 asection *branch_sec,
5890 unsigned int offset)
c7b8f16e
JB		 5891{
5892 asection *s;
5893 struct elf32_arm_link_hash_table *hash_table;
5894 char *tmp_name;
5895 struct elf_link_hash_entry *myh;
5896 struct bfd_link_hash_entry *bh;
5897 bfd_vma val;
5898 struct _arm_elf_section_data *sec_data;
c7b8f16e 5899 elf32_vfp11_erratum_list *newerr;
906e58ca 5900
c7b8f16e 5901 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5902 BFD_ASSERT (hash_table != NULL);
5903 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5904
3d4d4302 5905 s = bfd_get_linker_section
c7b8f16e 5906 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5907
c7b8f16e 5908 sec_data = elf32_arm_section_data (s);
906e58ca 5909
c7b8f16e 5910 BFD_ASSERT (s != NULL);
906e58ca 5911
21d799b5 5912 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 5913 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5914
c7b8f16e 5915 BFD_ASSERT (tmp_name);
906e58ca 5916
c7b8f16e
JB		 5917 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5918 hash_table->num_vfp11_fixes);
906e58ca 5919
c7b8f16e
JB		 5920 myh = elf_link_hash_lookup
5921 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5922
c7b8f16e 5923 BFD_ASSERT (myh == NULL);
906e58ca 5924
c7b8f16e
JB		 5925 bh = NULL;
5926 val = hash_table->vfp11_erratum_glue_size;
5927 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
99059e56
RM		 5928 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5929 NULL, TRUE, FALSE, &bh);
c7b8f16e
JB		 5930
5931 myh = (struct elf_link_hash_entry *) bh;
5932 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5933 myh->forced_local = 1;
5934
5935 /* Link veneer back to calling location. */
c7e2358a 5936 sec_data->erratumcount += 1;
21d799b5
NC		 5937 newerr = (elf32_vfp11_erratum_list *)
5938 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5939
c7b8f16e
JB		 5940 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5941 newerr->vma = -1;
5942 newerr->u.v.branch = branch;
5943 newerr->u.v.id = hash_table->num_vfp11_fixes;
5944 branch->u.b.veneer = newerr;
5945
5946 newerr->next = sec_data->erratumlist;
5947 sec_data->erratumlist = newerr;
5948
5949 /* A symbol for the return from the veneer. */
5950 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5951 hash_table->num_vfp11_fixes);
5952
5953 myh = elf_link_hash_lookup
5954 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5955
c7b8f16e
JB		 5956 if (myh != NULL)
5957 abort ();
5958
5959 bh = NULL;
5960 val = offset + 4;
5961 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5962 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5963
c7b8f16e
JB		 5964 myh = (struct elf_link_hash_entry *) bh;
5965 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5966 myh->forced_local = 1;
5967
5968 free (tmp_name);
906e58ca 5969
c7b8f16e
JB		 5970 /* Generate a mapping symbol for the veneer section, and explicitly add an
5971 entry for that symbol to the code/data map for the section. */
5972 if (hash_table->vfp11_erratum_glue_size == 0)
5973 {
5974 bh = NULL;
5975 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
99059e56 5976 ever requires this erratum fix. */
c7b8f16e
JB		 5977 _bfd_generic_link_add_one_symbol (link_info,
5978 hash_table->bfd_of_glue_owner, "$a",
5979 BSF_LOCAL, s, 0, NULL,
99059e56 5980 TRUE, FALSE, &bh);
c7b8f16e
JB		 5981
5982 myh = (struct elf_link_hash_entry *) bh;
5983 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5984 myh->forced_local = 1;
906e58ca 5985
c7b8f16e 5986 /* The elf32_arm_init_maps function only cares about symbols from input
99059e56
RM		 5987 BFDs. We must make a note of this generated mapping symbol
5988 ourselves so that code byteswapping works properly in
5989 elf32_arm_write_section. */
c7b8f16e
JB		 5990 elf32_arm_section_map_add (s, 'a', 0);
5991 }
906e58ca 5992
c7b8f16e
JB		 5993 s->size += VFP11_ERRATUM_VENEER_SIZE;
5994 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5995 hash_table->num_vfp11_fixes++;
906e58ca 5996
c7b8f16e
JB		 5997 /* The offset of the veneer. */
5998 return val;
5999}
6000
8029a119 6001#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 6002 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6003 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 6004
6005/* Create a fake section for use by the ARM backend of the linker. */
6006
6007static bfd_boolean
6008arm_make_glue_section (bfd * abfd, const char * name)
6009{
6010 asection * sec;
6011
3d4d4302 6012 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6013 if (sec != NULL)
6014 /* Already made. */
6015 return TRUE;
6016
3d4d4302 6017 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6018
6019 if (sec == NULL
6020 || !bfd_set_section_alignment (abfd, sec, 2))
6021 return FALSE;
6022
6023 /* Set the gc mark to prevent the section from being removed by garbage
6024 collection, despite the fact that no relocs refer to this section. */
6025 sec->gc_mark = 1;
6026
6027 return TRUE;
6028}
6029
8afb0e02
NC		 6030/* Add the glue sections to ABFD. This function is called from the
6031 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6032
b34976b6 6033bfd_boolean
57e8b36a
NC		 6034bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6035 struct bfd_link_info *info)
252b5132 6036{
8afb0e02
NC		 6037 /* If we are only performing a partial
6038 link do not bother adding the glue. */
1049f94e 6039 if (info->relocatable)
b34976b6 6040 return TRUE;
252b5132 6041
8029a119
NC		 6042 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6043 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6044 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6045 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6046}
6047
6048/* Select a BFD to be used to hold the sections used by the glue code.
6049 This function is called from the linker scripts in ld/emultempl/
8029a119 6050 {armelf/pe}.em. */
8afb0e02 6051
b34976b6 6052bfd_boolean
57e8b36a 6053bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6054{
6055 struct elf32_arm_link_hash_table *globals;
6056
6057 /* If we are only performing a partial link
6058 do not bother getting a bfd to hold the glue. */
1049f94e 6059 if (info->relocatable)
b34976b6 6060 return TRUE;
8afb0e02 6061
b7693d02
DJ		 6062 /* Make sure we don't attach the glue sections to a dynamic object. */
6063 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6064
8afb0e02 6065 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6066 BFD_ASSERT (globals != NULL);
6067
6068 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6069 return TRUE;
8afb0e02 6070
252b5132
RH		 6071 /* Save the bfd for later use. */
6072 globals->bfd_of_glue_owner = abfd;
cedb70c5 6073
b34976b6 6074 return TRUE;
252b5132
RH		 6075}
6076
906e58ca
NC		 6077static void
6078check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6079{
2de70689
MGD		 6080 int cpu_arch;
6081
b38cadfb 6082 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6083 Tag_CPU_arch);
6084
6085 if (globals->fix_arm1176)
6086 {
6087 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6088 globals->use_blx = 1;
6089 }
6090 else
6091 {
6092 if (cpu_arch > TAG_CPU_ARCH_V4T)
6093 globals->use_blx = 1;
6094 }
39b41c9c
PB		 6095}
6096
b34976b6 6097bfd_boolean
57e8b36a 6098bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6099 struct bfd_link_info *link_info)
252b5132
RH		 6100{
6101 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6102 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6103 Elf_Internal_Rela *irel, *irelend;
6104 bfd_byte *contents = NULL;
252b5132
RH		 6105
6106 asection *sec;
6107 struct elf32_arm_link_hash_table *globals;
6108
6109 /* If we are only performing a partial link do not bother
6110 to construct any glue. */
1049f94e 6111 if (link_info->relocatable)
b34976b6 6112 return TRUE;
252b5132 6113
39ce1a6a
NC		 6114 /* Here we have a bfd that is to be included on the link. We have a
6115 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6116 globals = elf32_arm_hash_table (link_info);
252b5132 6117 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6118
6119 check_use_blx (globals);
252b5132 6120
d504ffc8 6121 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6122 {
d003868e
AM		 6123 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6124 abfd);
e489d0ae
PB		 6125 return FALSE;
6126 }
f21f3fe0 6127
39ce1a6a
NC		 6128 /* PR 5398: If we have not decided to include any loadable sections in
6129 the output then we will not have a glue owner bfd. This is OK, it
6130 just means that there is nothing else for us to do here. */
6131 if (globals->bfd_of_glue_owner == NULL)
6132 return TRUE;
6133
252b5132
RH		 6134 /* Rummage around all the relocs and map the glue vectors. */
6135 sec = abfd->sections;
6136
6137 if (sec == NULL)
b34976b6 6138 return TRUE;
252b5132
RH		 6139
6140 for (; sec != NULL; sec = sec->next)
6141 {
6142 if (sec->reloc_count == 0)
6143 continue;
6144
2f475487
AM		 6145 if ((sec->flags & SEC_EXCLUDE) != 0)
6146 continue;
6147
0ffa91dd 6148 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6149
9b485d32 6150 /* Load the relocs. */
6cdc0ccc 6151 internal_relocs
906e58ca 6152 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6153
6cdc0ccc
AM		 6154 if (internal_relocs == NULL)
6155 goto error_return;
252b5132 6156
6cdc0ccc
AM		 6157 irelend = internal_relocs + sec->reloc_count;
6158 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6159 {
6160 long r_type;
6161 unsigned long r_index;
252b5132
RH		 6162
6163 struct elf_link_hash_entry *h;
6164
6165 r_type = ELF32_R_TYPE (irel->r_info);
6166 r_index = ELF32_R_SYM (irel->r_info);
6167
9b485d32 6168 /* These are the only relocation types we care about. */
ba96a88f 6169 if ( r_type != R_ARM_PC24
845b51d6 6170 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6171 continue;
6172
6173 /* Get the section contents if we haven't done so already. */
6174 if (contents == NULL)
6175 {
6176 /* Get cached copy if it exists. */
6177 if (elf_section_data (sec)->this_hdr.contents != NULL)
6178 contents = elf_section_data (sec)->this_hdr.contents;
6179 else
6180 {
6181 /* Go get them off disk. */
57e8b36a 6182 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6183 goto error_return;
6184 }
6185 }
6186
845b51d6
PB		 6187 if (r_type == R_ARM_V4BX)
6188 {
6189 int reg;
6190
6191 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6192 record_arm_bx_glue (link_info, reg);
6193 continue;
6194 }
6195
a7c10850 6196 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6197 h = NULL;
6198
9b485d32 6199 /* We don't care about local symbols. */
252b5132
RH		 6200 if (r_index < symtab_hdr->sh_info)
6201 continue;
6202
9b485d32 6203 /* This is an external symbol. */
252b5132
RH		 6204 r_index -= symtab_hdr->sh_info;
6205 h = (struct elf_link_hash_entry *)
6206 elf_sym_hashes (abfd)[r_index];
6207
6208 /* If the relocation is against a static symbol it must be within
6209 the current section and so cannot be a cross ARM/Thumb relocation. */
6210 if (h == NULL)
6211 continue;
6212
d504ffc8
DJ		 6213 /* If the call will go through a PLT entry then we do not need
6214 glue. */
362d30a1 6215 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6216 continue;
6217
252b5132
RH		 6218 switch (r_type)
6219 {
6220 case R_ARM_PC24:
6221 /* This one is a call from arm code. We need to look up
99059e56
RM		 6222 the target of the call. If it is a thumb target, we
6223 insert glue. */
35fc36a8 6224 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6225 record_arm_to_thumb_glue (link_info, h);
6226 break;
6227
252b5132 6228 default:
c6596c5e 6229 abort ();
252b5132
RH		 6230 }
6231 }
6cdc0ccc
AM		 6232
6233 if (contents != NULL
6234 && elf_section_data (sec)->this_hdr.contents != contents)
6235 free (contents);
6236 contents = NULL;
6237
6238 if (internal_relocs != NULL
6239 && elf_section_data (sec)->relocs != internal_relocs)
6240 free (internal_relocs);
6241 internal_relocs = NULL;
252b5132
RH		 6242 }
6243
b34976b6 6244 return TRUE;
9a5aca8c 6245
252b5132 6246error_return:
6cdc0ccc
AM		 6247 if (contents != NULL
6248 && elf_section_data (sec)->this_hdr.contents != contents)
6249 free (contents);
6250 if (internal_relocs != NULL
6251 && elf_section_data (sec)->relocs != internal_relocs)
6252 free (internal_relocs);
9a5aca8c 6253
b34976b6 6254 return FALSE;
252b5132 6255}
7e392df6 6256#endif
252b5132 6257
eb043451 6258
c7b8f16e
JB		 6259/* Initialise maps of ARM/Thumb/data for input BFDs. */
6260
6261void
6262bfd_elf32_arm_init_maps (bfd *abfd)
6263{
6264 Elf_Internal_Sym *isymbuf;
6265 Elf_Internal_Shdr *hdr;
6266 unsigned int i, localsyms;
6267
af1f4419
NC		 6268 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6269 if (! is_arm_elf (abfd))
6270 return;
6271
c7b8f16e
JB		 6272 if ((abfd->flags & DYNAMIC) != 0)
6273 return;
6274
0ffa91dd 6275 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6276 localsyms = hdr->sh_info;
6277
6278 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6279 should contain the number of local symbols, which should come before any
6280 global symbols. Mapping symbols are always local. */
6281 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6282 NULL);
6283
6284 /* No internal symbols read? Skip this BFD. */
6285 if (isymbuf == NULL)
6286 return;
6287
6288 for (i = 0; i < localsyms; i++)
6289 {
6290 Elf_Internal_Sym *isym = &isymbuf[i];
6291 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6292 const char *name;
906e58ca 6293
c7b8f16e 6294 if (sec != NULL
99059e56
RM		 6295 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6296 {
6297 name = bfd_elf_string_from_elf_section (abfd,
6298 hdr->sh_link, isym->st_name);
906e58ca 6299
99059e56 6300 if (bfd_is_arm_special_symbol_name (name,
c7b8f16e 6301 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
99059e56
RM		 6302 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6303 }
c7b8f16e
JB		 6304 }
6305}
6306
6307
48229727
JB		 6308/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6309 say what they wanted. */
6310
6311void
6312bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6313{
6314 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6315 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6316
4dfe6ac6
NC		 6317 if (globals == NULL)
6318 return;
6319
48229727
JB		 6320 if (globals->fix_cortex_a8 == -1)
6321 {
6322 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6323 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6324 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6325 || out_attr[Tag_CPU_arch_profile].i == 0))
6326 globals->fix_cortex_a8 = 1;
6327 else
6328 globals->fix_cortex_a8 = 0;
6329 }
6330}
6331
6332
c7b8f16e
JB		 6333void
6334bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6335{
6336 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6337 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6338
4dfe6ac6
NC		 6339 if (globals == NULL)
6340 return;
c7b8f16e
JB		 6341 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6342 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6343 {
6344 switch (globals->vfp11_fix)
99059e56
RM		 6345 {
6346 case BFD_ARM_VFP11_FIX_DEFAULT:
6347 case BFD_ARM_VFP11_FIX_NONE:
6348 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6349 break;
6350
6351 default:
6352 /* Give a warning, but do as the user requests anyway. */
6353 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6354 "workaround is not necessary for target architecture"), obfd);
6355 }
c7b8f16e
JB		 6356 }
6357 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6358 /* For earlier architectures, we might need the workaround, but do not
6359 enable it by default. If users is running with broken hardware, they
6360 must enable the erratum fix explicitly. */
6361 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6362}
6363
6364
906e58ca
NC		 6365enum bfd_arm_vfp11_pipe
6366{
c7b8f16e
JB		 6367 VFP11_FMAC,
6368 VFP11_LS,
6369 VFP11_DS,
6370 VFP11_BAD
6371};
6372
6373/* Return a VFP register number. This is encoded as RX:X for single-precision
6374 registers, or X:RX for double-precision registers, where RX is the group of
6375 four bits in the instruction encoding and X is the single extension bit.
6376 RX and X fields are specified using their lowest (starting) bit. The return
6377 value is:
6378
6379 0...31: single-precision registers s0...s31
6380 32...63: double-precision registers d0...d31.
906e58ca 6381
c7b8f16e
JB		 6382 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6383 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6384
c7b8f16e
JB		 6385static unsigned int
6386bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
99059e56 6387 unsigned int x)
c7b8f16e
JB		 6388{
6389 if (is_double)
6390 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6391 else
6392 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6393}
6394
6395/* Set bits in *WMASK according to a register number REG as encoded by
6396 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6397
6398static void
6399bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6400{
6401 if (reg < 32)
6402 *wmask |= 1 << reg;
6403 else if (reg < 48)
6404 *wmask |= 3 << ((reg - 32) * 2);
6405}
6406
6407/* Return TRUE if WMASK overwrites anything in REGS. */
6408
6409static bfd_boolean
6410bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6411{
6412 int i;
906e58ca 6413
c7b8f16e
JB		 6414 for (i = 0; i < numregs; i++)
6415 {
6416 unsigned int reg = regs[i];
6417
6418 if (reg < 32 && (wmask & (1 << reg)) != 0)
99059e56 6419 return TRUE;
906e58ca 6420
c7b8f16e
JB		 6421 reg -= 32;
6422
6423 if (reg >= 16)
99059e56 6424 continue;
906e58ca 6425
c7b8f16e 6426 if ((wmask & (3 << (reg * 2))) != 0)
99059e56 6427 return TRUE;
c7b8f16e 6428 }
906e58ca 6429
c7b8f16e
JB		 6430 return FALSE;
6431}
6432
6433/* In this function, we're interested in two things: finding input registers
6434 for VFP data-processing instructions, and finding the set of registers which
6435 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6436 hold the written set, so FLDM etc. are easy to deal with (we're only
6437 interested in 32 SP registers or 16 dp registers, due to the VFP version
6438 implemented by the chip in question). DP registers are marked by setting
6439 both SP registers in the write mask). */
6440
6441static enum bfd_arm_vfp11_pipe
6442bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
99059e56 6443 int *numregs)
c7b8f16e 6444{
91d6fa6a 6445 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6446 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6447
6448 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6449 {
6450 unsigned int pqrs;
6451 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6452 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6453
6454 pqrs = ((insn & 0x00800000) >> 20)
99059e56
RM		 6455 | ((insn & 0x00300000) >> 19)
6456 | ((insn & 0x00000040) >> 6);
c7b8f16e
JB		 6457
6458 switch (pqrs)
99059e56
RM		 6459 {
6460 case 0: /* fmac[sd]. */
6461 case 1: /* fnmac[sd]. */
6462 case 2: /* fmsc[sd]. */
6463 case 3: /* fnmsc[sd]. */
6464 vpipe = VFP11_FMAC;
6465 bfd_arm_vfp11_write_mask (destmask, fd);
6466 regs[0] = fd;
6467 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6468 regs[2] = fm;
6469 *numregs = 3;
6470 break;
6471
6472 case 4: /* fmul[sd]. */
6473 case 5: /* fnmul[sd]. */
6474 case 6: /* fadd[sd]. */
6475 case 7: /* fsub[sd]. */
6476 vpipe = VFP11_FMAC;
6477 goto vfp_binop;
6478
6479 case 8: /* fdiv[sd]. */
6480 vpipe = VFP11_DS;
6481 vfp_binop:
6482 bfd_arm_vfp11_write_mask (destmask, fd);
6483 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6484 regs[1] = fm;
6485 *numregs = 2;
6486 break;
6487
6488 case 15: /* extended opcode. */
6489 {
6490 unsigned int extn = ((insn >> 15) & 0x1e)
6491 | ((insn >> 7) & 1);
6492
6493 switch (extn)
6494 {
6495 case 0: /* fcpy[sd]. */
6496 case 1: /* fabs[sd]. */
6497 case 2: /* fneg[sd]. */
6498 case 8: /* fcmp[sd]. */
6499 case 9: /* fcmpe[sd]. */
6500 case 10: /* fcmpz[sd]. */
6501 case 11: /* fcmpez[sd]. */
6502 case 16: /* fuito[sd]. */
6503 case 17: /* fsito[sd]. */
6504 case 24: /* ftoui[sd]. */
6505 case 25: /* ftouiz[sd]. */
6506 case 26: /* ftosi[sd]. */
6507 case 27: /* ftosiz[sd]. */
6508 /* These instructions will not bounce due to underflow. */
6509 *numregs = 0;
6510 vpipe = VFP11_FMAC;
6511 break;
6512
6513 case 3: /* fsqrt[sd]. */
6514 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6515 registers to cause the erratum in previous instructions. */
6516 bfd_arm_vfp11_write_mask (destmask, fd);
6517 vpipe = VFP11_DS;
6518 break;
6519
6520 case 15: /* fcvt{ds,sd}. */
6521 {
6522 int rnum = 0;
6523
6524 bfd_arm_vfp11_write_mask (destmask, fd);
c7b8f16e
JB		 6525
6526 /* Only FCVTSD can underflow. */
99059e56
RM		 6527 if ((insn & 0x100) != 0)
6528 regs[rnum++] = fm;
c7b8f16e 6529
99059e56 6530 *numregs = rnum;
c7b8f16e 6531
99059e56
RM		 6532 vpipe = VFP11_FMAC;
6533 }
6534 break;
c7b8f16e 6535
99059e56
RM		 6536 default:
6537 return VFP11_BAD;
6538 }
6539 }
6540 break;
c7b8f16e 6541
99059e56
RM		 6542 default:
6543 return VFP11_BAD;
6544 }
c7b8f16e
JB		 6545 }
6546 /* Two-register transfer. */
6547 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6548 {
6549 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6550
c7b8f16e
JB		 6551 if ((insn & 0x100000) == 0)
6552 {
99059e56
RM		 6553 if (is_double)
6554 bfd_arm_vfp11_write_mask (destmask, fm);
6555 else
6556 {
6557 bfd_arm_vfp11_write_mask (destmask, fm);
6558 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6559 }
c7b8f16e
JB		 6560 }
6561
91d6fa6a 6562 vpipe = VFP11_LS;
c7b8f16e
JB		 6563 }
6564 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6565 {
6566 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6567 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6568
c7b8f16e 6569 switch (puw)
99059e56
RM		 6570 {
6571 case 0: /* Two-reg transfer. We should catch these above. */
6572 abort ();
906e58ca 6573
99059e56
RM		 6574 case 2: /* fldm[sdx]. */
6575 case 3:
6576 case 5:
6577 {
6578 unsigned int i, offset = insn & 0xff;
c7b8f16e 6579
99059e56
RM		 6580 if (is_double)
6581 offset >>= 1;
c7b8f16e 6582
99059e56
RM		 6583 for (i = fd; i < fd + offset; i++)
6584 bfd_arm_vfp11_write_mask (destmask, i);
6585 }
6586 break;
906e58ca 6587
99059e56
RM		 6588 case 4: /* fld[sd]. */
6589 case 6:
6590 bfd_arm_vfp11_write_mask (destmask, fd);
6591 break;
906e58ca 6592
99059e56
RM		 6593 default:
6594 return VFP11_BAD;
6595 }
c7b8f16e 6596
91d6fa6a 6597 vpipe = VFP11_LS;
c7b8f16e
JB		 6598 }
6599 /* Single-register transfer. Note L==0. */
6600 else if ((insn & 0x0f100e10) == 0x0e000a10)
6601 {
6602 unsigned int opcode = (insn >> 21) & 7;
6603 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6604
6605 switch (opcode)
99059e56
RM		 6606 {
6607 case 0: /* fmsr/fmdlr. */
6608 case 1: /* fmdhr. */
6609 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6610 destination register. I don't know if this is exactly right,
6611 but it is the conservative choice. */
6612 bfd_arm_vfp11_write_mask (destmask, fn);
6613 break;
6614
6615 case 7: /* fmxr. */
6616 break;
6617 }
c7b8f16e 6618
91d6fa6a 6619 vpipe = VFP11_LS;
c7b8f16e
JB		 6620 }
6621
91d6fa6a 6622 return vpipe;
c7b8f16e
JB		 6623}
6624
6625
6626static int elf32_arm_compare_mapping (const void * a, const void * b);
6627
6628
6629/* Look for potentially-troublesome code sequences which might trigger the
6630 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6631 (available from ARM) for details of the erratum. A short version is
6632 described in ld.texinfo. */
6633
6634bfd_boolean
6635bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6636{
6637 asection *sec;
6638 bfd_byte *contents = NULL;
6639 int state = 0;
6640 int regs[3], numregs = 0;
6641 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6642 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6643
4dfe6ac6
NC		 6644 if (globals == NULL)
6645 return FALSE;
6646
c7b8f16e
JB		 6647 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6648 The states transition as follows:
906e58ca 6649
c7b8f16e 6650 0 -> 1 (vector) or 0 -> 2 (scalar)
99059e56
RM		 6651 A VFP FMAC-pipeline instruction has been seen. Fill
6652 regs[0]..regs[numregs-1] with its input operands. Remember this
6653 instruction in 'first_fmac'.
c7b8f16e
JB		 6654
6655 1 -> 2
99059e56
RM		 6656 Any instruction, except for a VFP instruction which overwrites
6657 regs[*].
906e58ca 6658
c7b8f16e
JB		 6659 1 -> 3 [ -> 0 ] or
6660 2 -> 3 [ -> 0 ]
99059e56
RM		 6661 A VFP instruction has been seen which overwrites any of regs[*].
6662 We must make a veneer! Reset state to 0 before examining next
6663 instruction.
906e58ca 6664
c7b8f16e 6665 2 -> 0
99059e56
RM		 6666 If we fail to match anything in state 2, reset to state 0 and reset
6667 the instruction pointer to the instruction after 'first_fmac'.
c7b8f16e
JB		 6668
6669 If the VFP11 vector mode is in use, there must be at least two unrelated
6670 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6671 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6672
6673 /* If we are only performing a partial link do not bother
6674 to construct any glue. */
6675 if (link_info->relocatable)
6676 return TRUE;
6677
0ffa91dd
NC		 6678 /* Skip if this bfd does not correspond to an ELF image. */
6679 if (! is_arm_elf (abfd))
6680 return TRUE;
906e58ca 6681
c7b8f16e
JB		 6682 /* We should have chosen a fix type by the time we get here. */
6683 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6684
6685 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6686 return TRUE;
2e6030b9 6687
33a7ffc2
JM		 6688 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6689 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6690 return TRUE;
6691
c7b8f16e
JB		 6692 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6693 {
6694 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6695 struct _arm_elf_section_data *sec_data;
6696
6697 /* If we don't have executable progbits, we're not interested in this
99059e56 6698 section. Also skip if section is to be excluded. */
c7b8f16e 6699 if (elf_section_type (sec) != SHT_PROGBITS
99059e56
RM		 6700 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6701 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6702 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6703 || sec->output_section == bfd_abs_section_ptr
99059e56
RM		 6704 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6705 continue;
c7b8f16e
JB		 6706
6707 sec_data = elf32_arm_section_data (sec);
906e58ca 6708
c7b8f16e 6709 if (sec_data->mapcount == 0)
99059e56 6710 continue;
906e58ca 6711
c7b8f16e
JB		 6712 if (elf_section_data (sec)->this_hdr.contents != NULL)
6713 contents = elf_section_data (sec)->this_hdr.contents;
6714 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6715 goto error_return;
6716
6717 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6718 elf32_arm_compare_mapping);
6719
6720 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 6721 {
6722 unsigned int span_start = sec_data->map[span].vma;
6723 unsigned int span_end = (span == sec_data->mapcount - 1)
c7b8f16e 6724 ? sec->size : sec_data->map[span + 1].vma;
99059e56
RM		 6725 char span_type = sec_data->map[span].type;
6726
6727 /* FIXME: Only ARM mode is supported at present. We may need to
6728 support Thumb-2 mode also at some point. */
6729 if (span_type != 'a')
6730 continue;
6731
6732 for (i = span_start; i < span_end;)
6733 {
6734 unsigned int next_i = i + 4;
6735 unsigned int insn = bfd_big_endian (abfd)
6736 ? (contents[i] << 24)
6737 | (contents[i + 1] << 16)
6738 | (contents[i + 2] << 8)
6739 | contents[i + 3]
6740 : (contents[i + 3] << 24)
6741 | (contents[i + 2] << 16)
6742 | (contents[i + 1] << 8)
6743 | contents[i];
6744 unsigned int writemask = 0;
6745 enum bfd_arm_vfp11_pipe vpipe;
6746
6747 switch (state)
6748 {
6749 case 0:
6750 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6751 &numregs);
6752 /* I'm assuming the VFP11 erratum can trigger with denorm
6753 operands on either the FMAC or the DS pipeline. This might
6754 lead to slightly overenthusiastic veneer insertion. */
6755 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6756 {
6757 state = use_vector ? 1 : 2;
6758 first_fmac = i;
6759 veneer_of_insn = insn;
6760 }
6761 break;
6762
6763 case 1:
6764 {
6765 int other_regs[3], other_numregs;
6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6767 other_regs,
99059e56
RM		 6768 &other_numregs);
6769 if (vpipe != VFP11_BAD
6770 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6771 numregs))
99059e56
RM		 6772 state = 3;
6773 else
6774 state = 2;
6775 }
6776 break;
6777
6778 case 2:
6779 {
6780 int other_regs[3], other_numregs;
6781 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6782 other_regs,
99059e56
RM		 6783 &other_numregs);
6784 if (vpipe != VFP11_BAD
6785 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6786 numregs))
99059e56
RM		 6787 state = 3;
6788 else
6789 {
6790 state = 0;
6791 next_i = first_fmac + 4;
6792 }
6793 }
6794 break;
6795
6796 case 3:
6797 abort (); /* Should be unreachable. */
6798 }
6799
6800 if (state == 3)
6801 {
6802 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6803 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6804
6805 elf32_arm_section_data (sec)->erratumcount += 1;
6806
6807 newerr->u.b.vfp_insn = veneer_of_insn;
6808
6809 switch (span_type)
6810 {
6811 case 'a':
6812 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6813 break;
6814
6815 default:
6816 abort ();
6817 }
6818
6819 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
c7b8f16e
JB		 6820 first_fmac);
6821
99059e56 6822 newerr->vma = -1;
c7b8f16e 6823
99059e56
RM		 6824 newerr->next = sec_data->erratumlist;
6825 sec_data->erratumlist = newerr;
c7b8f16e 6826
99059e56
RM		 6827 state = 0;
6828 }
c7b8f16e 6829
99059e56
RM		 6830 i = next_i;
6831 }
6832 }
906e58ca 6833
c7b8f16e 6834 if (contents != NULL
99059e56
RM		 6835 && elf_section_data (sec)->this_hdr.contents != contents)
6836 free (contents);
c7b8f16e
JB		 6837 contents = NULL;
6838 }
6839
6840 return TRUE;
6841
6842error_return:
6843 if (contents != NULL
6844 && elf_section_data (sec)->this_hdr.contents != contents)
6845 free (contents);
906e58ca 6846
c7b8f16e
JB		 6847 return FALSE;
6848}
6849
6850/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6851 after sections have been laid out, using specially-named symbols. */
6852
6853void
6854bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6855 struct bfd_link_info *link_info)
6856{
6857 asection *sec;
6858 struct elf32_arm_link_hash_table *globals;
6859 char *tmp_name;
906e58ca 6860
c7b8f16e
JB		 6861 if (link_info->relocatable)
6862 return;
2e6030b9
MS		 6863
6864 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6865 if (! is_arm_elf (abfd))
2e6030b9
MS		 6866 return;
6867
c7b8f16e 6868 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6869 if (globals == NULL)
6870 return;
906e58ca 6871
21d799b5 6872 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 6873 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6874
6875 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6876 {
6877 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6878 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6879
c7b8f16e 6880 for (; errnode != NULL; errnode = errnode->next)
99059e56
RM		 6881 {
6882 struct elf_link_hash_entry *myh;
6883 bfd_vma vma;
6884
6885 switch (errnode->type)
6886 {
6887 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6888 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6889 /* Find veneer symbol. */
6890 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
c7b8f16e
JB		 6891 errnode->u.b.veneer->u.v.id);
6892
99059e56
RM		 6893 myh = elf_link_hash_lookup
6894 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6895
99059e56
RM		 6896 if (myh == NULL)
6897 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6898 "`%s'"), abfd, tmp_name);
c7b8f16e 6899
99059e56
RM		 6900 vma = myh->root.u.def.section->output_section->vma
6901 + myh->root.u.def.section->output_offset
6902 + myh->root.u.def.value;
c7b8f16e 6903
99059e56
RM		 6904 errnode->u.b.veneer->vma = vma;
6905 break;
c7b8f16e
JB		 6906
6907 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 6908 case VFP11_ERRATUM_THUMB_VENEER:
6909 /* Find return location. */
6910 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6911 errnode->u.v.id);
c7b8f16e 6912
99059e56
RM		 6913 myh = elf_link_hash_lookup
6914 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6915
99059e56
RM		 6916 if (myh == NULL)
6917 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
c7b8f16e
JB		 6918 "`%s'"), abfd, tmp_name);
6919
99059e56
RM		 6920 vma = myh->root.u.def.section->output_section->vma
6921 + myh->root.u.def.section->output_offset
6922 + myh->root.u.def.value;
c7b8f16e 6923
99059e56
RM		 6924 errnode->u.v.branch->vma = vma;
6925 break;
906e58ca 6926
99059e56
RM		 6927 default:
6928 abort ();
6929 }
6930 }
c7b8f16e 6931 }
906e58ca 6932
c7b8f16e
JB		 6933 free (tmp_name);
6934}
6935
6936
eb043451
PB		 6937/* Set target relocation values needed during linking. */
6938
6939void
bf21ed78
MS		 6940bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6941 struct bfd_link_info *link_info,
eb043451 6942 int target1_is_rel,
319850b4 6943 char * target2_type,
99059e56 6944 int fix_v4bx,
c7b8f16e 6945 int use_blx,
99059e56 6946 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6947 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6948 int pic_veneer, int fix_cortex_a8,
6949 int fix_arm1176)
eb043451
PB		 6950{
6951 struct elf32_arm_link_hash_table *globals;
6952
6953 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6954 if (globals == NULL)
6955 return;
eb043451
PB		 6956
6957 globals->target1_is_rel = target1_is_rel;
6958 if (strcmp (target2_type, "rel") == 0)
6959 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6960 else if (strcmp (target2_type, "abs") == 0)
6961 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6962 else if (strcmp (target2_type, "got-rel") == 0)
6963 globals->target2_reloc = R_ARM_GOT_PREL;
6964 else
6965 {
6966 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6967 target2_type);
6968 }
319850b4 6969 globals->fix_v4bx = fix_v4bx;
33bfe774 6970 globals->use_blx |= use_blx;
c7b8f16e 6971 globals->vfp11_fix = vfp11_fix;
27e55c4d 6972 globals->pic_veneer = pic_veneer;
48229727 6973 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6974 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6975
0ffa91dd
NC		 6976 BFD_ASSERT (is_arm_elf (output_bfd));
6977 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6978 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6979}
eb043451 6980
12a0a0fd 6981/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6982
12a0a0fd
PB		 6983static void
6984insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6985{
6986 bfd_vma upper;
6987 bfd_vma lower;
6988 int reloc_sign;
6989
6990 BFD_ASSERT ((offset & 1) == 0);
6991
6992 upper = bfd_get_16 (abfd, insn);
6993 lower = bfd_get_16 (abfd, insn + 2);
6994 reloc_sign = (offset < 0) ? 1 : 0;
6995 upper = (upper & ~(bfd_vma) 0x7ff)
6996 | ((offset >> 12) & 0x3ff)
6997 | (reloc_sign << 10);
906e58ca 6998 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6999 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7000 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7001 | ((offset >> 1) & 0x7ff);
7002 bfd_put_16 (abfd, upper, insn);
7003 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 7004}
7005
9b485d32
NC		 7006/* Thumb code calling an ARM function. */
7007
252b5132 7008static int
57e8b36a
NC		 7009elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7010 const char * name,
7011 bfd * input_bfd,
7012 bfd * output_bfd,
7013 asection * input_section,
7014 bfd_byte * hit_data,
7015 asection * sym_sec,
7016 bfd_vma offset,
7017 bfd_signed_vma addend,
f2a9dd69
DJ		 7018 bfd_vma val,
7019 char **error_message)
252b5132 7020{
bcbdc74c 7021 asection * s = 0;
dc810e39 7022 bfd_vma my_offset;
252b5132 7023 long int ret_offset;
bcbdc74c
NC		 7024 struct elf_link_hash_entry * myh;
7025 struct elf32_arm_link_hash_table * globals;
252b5132 7026
f2a9dd69 7027 myh = find_thumb_glue (info, name, error_message);
252b5132 7028 if (myh == NULL)
b34976b6 7029 return FALSE;
252b5132
RH		 7030
7031 globals = elf32_arm_hash_table (info);
252b5132
RH		 7032 BFD_ASSERT (globals != NULL);
7033 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7034
7035 my_offset = myh->root.u.def.value;
7036
3d4d4302
AM		 7037 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7038 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7039
7040 BFD_ASSERT (s != NULL);
7041 BFD_ASSERT (s->contents != NULL);
7042 BFD_ASSERT (s->output_section != NULL);
7043
7044 if ((my_offset & 0x01) == 0x01)
7045 {
7046 if (sym_sec != NULL
7047 && sym_sec->owner != NULL
7048 && !INTERWORK_FLAG (sym_sec->owner))
7049 {
8f615d07 7050 (*_bfd_error_handler)
d003868e 7051 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7052 " first occurrence: %B: Thumb call to ARM"),
d003868e 7053 sym_sec->owner, input_bfd, name);
252b5132 7054
b34976b6 7055 return FALSE;
252b5132
RH		 7056 }
7057
7058 --my_offset;
7059 myh->root.u.def.value = my_offset;
7060
52ab56c2
PB		 7061 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7062 s->contents + my_offset);
252b5132 7063
52ab56c2
PB		 7064 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7065 s->contents + my_offset + 2);
252b5132
RH		 7066
7067 ret_offset =
9b485d32
NC		 7068 /* Address of destination of the stub. */
7069 ((bfd_signed_vma) val)
252b5132 7070 - ((bfd_signed_vma)
57e8b36a
NC		 7071 /* Offset from the start of the current section
7072 to the start of the stubs. */
9b485d32
NC		 7073 (s->output_offset
7074 /* Offset of the start of this stub from the start of the stubs. */
7075 + my_offset
7076 /* Address of the start of the current section. */
7077 + s->output_section->vma)
7078 /* The branch instruction is 4 bytes into the stub. */
7079 + 4
7080 /* ARM branches work from the pc of the instruction + 8. */
7081 + 8);
252b5132 7082
52ab56c2
PB		 7083 put_arm_insn (globals, output_bfd,
7084 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7085 s->contents + my_offset + 4);
252b5132
RH		 7086 }
7087
7088 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7089
427bfd90
NC		 7090 /* Now go back and fix up the original BL insn to point to here. */
7091 ret_offset =
7092 /* Address of where the stub is located. */
7093 (s->output_section->vma + s->output_offset + my_offset)
7094 /* Address of where the BL is located. */
57e8b36a
NC		 7095 - (input_section->output_section->vma + input_section->output_offset
7096 + offset)
427bfd90
NC		 7097 /* Addend in the relocation. */
7098 - addend
7099 /* Biassing for PC-relative addressing. */
7100 - 8;
252b5132 7101
12a0a0fd 7102 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7103
b34976b6 7104 return TRUE;
252b5132
RH		 7105}
7106
a4fd1a8e 7107/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7108
a4fd1a8e
PB		 7109static struct elf_link_hash_entry *
7110elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7111 const char * name,
7112 bfd * input_bfd,
7113 bfd * output_bfd,
7114 asection * sym_sec,
7115 bfd_vma val,
8029a119
NC		 7116 asection * s,
7117 char ** error_message)
252b5132 7118{
dc810e39 7119 bfd_vma my_offset;
252b5132 7120 long int ret_offset;
bcbdc74c
NC		 7121 struct elf_link_hash_entry * myh;
7122 struct elf32_arm_link_hash_table * globals;
252b5132 7123
f2a9dd69 7124 myh = find_arm_glue (info, name, error_message);
252b5132 7125 if (myh == NULL)
a4fd1a8e 7126 return NULL;
252b5132
RH		 7127
7128 globals = elf32_arm_hash_table (info);
252b5132
RH		 7129 BFD_ASSERT (globals != NULL);
7130 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7131
7132 my_offset = myh->root.u.def.value;
252b5132
RH		 7133
7134 if ((my_offset & 0x01) == 0x01)
7135 {
7136 if (sym_sec != NULL
7137 && sym_sec->owner != NULL
7138 && !INTERWORK_FLAG (sym_sec->owner))
7139 {
8f615d07 7140 (*_bfd_error_handler)
d003868e
AM		 7141 (_("%B(%s): warning: interworking not enabled.\n"
7142 " first occurrence: %B: arm call to thumb"),
7143 sym_sec->owner, input_bfd, name);
252b5132 7144 }
9b485d32 7145
252b5132
RH		 7146 --my_offset;
7147 myh->root.u.def.value = my_offset;
7148
27e55c4d
PB		 7149 if (info->shared || globals->root.is_relocatable_executable
7150 || globals->pic_veneer)
8f6277f5
PB		 7151 {
7152 /* For relocatable objects we can't use absolute addresses,
7153 so construct the address from a relative offset. */
7154 /* TODO: If the offset is small it's probably worth
7155 constructing the address with adds. */
52ab56c2
PB		 7156 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7157 s->contents + my_offset);
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7159 s->contents + my_offset + 4);
7160 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7161 s->contents + my_offset + 8);
8f6277f5
PB		 7162 /* Adjust the offset by 4 for the position of the add,
7163 and 8 for the pipeline offset. */
7164 ret_offset = (val - (s->output_offset
7165 + s->output_section->vma
7166 + my_offset + 12))
7167 | 1;
7168 bfd_put_32 (output_bfd, ret_offset,
7169 s->contents + my_offset + 12);
7170 }
26079076
PB		 7171 else if (globals->use_blx)
7172 {
7173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7174 s->contents + my_offset);
7175
7176 /* It's a thumb address. Add the low order bit. */
7177 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7178 s->contents + my_offset + 4);
7179 }
8f6277f5
PB		 7180 else
7181 {
52ab56c2
PB		 7182 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7183 s->contents + my_offset);
252b5132 7184
52ab56c2
PB		 7185 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7186 s->contents + my_offset + 4);
252b5132 7187
8f6277f5
PB		 7188 /* It's a thumb address. Add the low order bit. */
7189 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7190 s->contents + my_offset + 8);
8029a119
NC		 7191
7192 my_offset += 12;
8f6277f5 7193 }
252b5132
RH		 7194 }
7195
7196 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7197
a4fd1a8e
PB		 7198 return myh;
7199}
7200
7201/* Arm code calling a Thumb function. */
7202
7203static int
7204elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7205 const char * name,
7206 bfd * input_bfd,
7207 bfd * output_bfd,
7208 asection * input_section,
7209 bfd_byte * hit_data,
7210 asection * sym_sec,
7211 bfd_vma offset,
7212 bfd_signed_vma addend,
f2a9dd69
DJ		 7213 bfd_vma val,
7214 char **error_message)
a4fd1a8e
PB		 7215{
7216 unsigned long int tmp;
7217 bfd_vma my_offset;
7218 asection * s;
7219 long int ret_offset;
7220 struct elf_link_hash_entry * myh;
7221 struct elf32_arm_link_hash_table * globals;
7222
7223 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7224 BFD_ASSERT (globals != NULL);
7225 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7226
3d4d4302
AM		 7227 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7228 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7229 BFD_ASSERT (s != NULL);
7230 BFD_ASSERT (s->contents != NULL);
7231 BFD_ASSERT (s->output_section != NULL);
7232
7233 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7234 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7235 if (!myh)
7236 return FALSE;
7237
7238 my_offset = myh->root.u.def.value;
252b5132
RH		 7239 tmp = bfd_get_32 (input_bfd, hit_data);
7240 tmp = tmp & 0xFF000000;
7241
9b485d32 7242 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7243 ret_offset = (s->output_offset
7244 + my_offset
7245 + s->output_section->vma
7246 - (input_section->output_offset
7247 + input_section->output_section->vma
7248 + offset + addend)
7249 - 8);
9a5aca8c 7250
252b5132
RH		 7251 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7252
dc810e39 7253 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7254
b34976b6 7255 return TRUE;
252b5132
RH		 7256}
7257
a4fd1a8e
PB		 7258/* Populate Arm stub for an exported Thumb function. */
7259
7260static bfd_boolean
7261elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7262{
7263 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7264 asection * s;
7265 struct elf_link_hash_entry * myh;
7266 struct elf32_arm_link_hash_entry *eh;
7267 struct elf32_arm_link_hash_table * globals;
7268 asection *sec;
7269 bfd_vma val;
f2a9dd69 7270 char *error_message;
a4fd1a8e 7271
906e58ca 7272 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7273 /* Allocate stubs for exported Thumb functions on v4t. */
7274 if (eh->export_glue == NULL)
7275 return TRUE;
7276
7277 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7278 BFD_ASSERT (globals != NULL);
7279 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7280
3d4d4302
AM		 7281 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7282 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7283 BFD_ASSERT (s != NULL);
7284 BFD_ASSERT (s->contents != NULL);
7285 BFD_ASSERT (s->output_section != NULL);
7286
7287 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7288
7289 BFD_ASSERT (sec->output_section != NULL);
7290
a4fd1a8e
PB		 7291 val = eh->export_glue->root.u.def.value + sec->output_offset
7292 + sec->output_section->vma;
8029a119 7293
a4fd1a8e
PB		 7294 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7295 h->root.u.def.section->owner,
f2a9dd69
DJ		 7296 globals->obfd, sec, val, s,
7297 &error_message);
a4fd1a8e
PB		 7298 BFD_ASSERT (myh);
7299 return TRUE;
7300}
7301
845b51d6
PB		 7302/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7303
7304static bfd_vma
7305elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7306{
7307 bfd_byte *p;
7308 bfd_vma glue_addr;
7309 asection *s;
7310 struct elf32_arm_link_hash_table *globals;
7311
7312 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7313 BFD_ASSERT (globals != NULL);
7314 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7315
3d4d4302
AM		 7316 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7317 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7318 BFD_ASSERT (s != NULL);
7319 BFD_ASSERT (s->contents != NULL);
7320 BFD_ASSERT (s->output_section != NULL);
7321
7322 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7323
7324 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7325
7326 if ((globals->bx_glue_offset[reg] & 1) == 0)
7327 {
7328 p = s->contents + glue_addr;
7329 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7330 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7331 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7332 globals->bx_glue_offset[reg] |= 1;
7333 }
7334
7335 return glue_addr + s->output_section->vma + s->output_offset;
7336}
7337
a4fd1a8e
PB		 7338/* Generate Arm stubs for exported Thumb symbols. */
7339static void
906e58ca 7340elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7341 struct bfd_link_info *link_info)
7342{
7343 struct elf32_arm_link_hash_table * globals;
7344
8029a119
NC		 7345 if (link_info == NULL)
7346 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7347 return;
7348
7349 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7350 if (globals == NULL)
7351 return;
7352
84c08195
PB		 7353 /* If blx is available then exported Thumb symbols are OK and there is
7354 nothing to do. */
a4fd1a8e
PB		 7355 if (globals->use_blx)
7356 return;
7357
7358 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7359 link_info);
7360}
7361
47beaa6a
RS		 7362/* Reserve space for COUNT dynamic relocations in relocation selection
7363 SRELOC. */
7364
7365static void
7366elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7367 bfd_size_type count)
7368{
7369 struct elf32_arm_link_hash_table *htab;
7370
7371 htab = elf32_arm_hash_table (info);
7372 BFD_ASSERT (htab->root.dynamic_sections_created);
7373 if (sreloc == NULL)
7374 abort ();
7375 sreloc->size += RELOC_SIZE (htab) * count;
7376}
7377
34e77a92
RS		 7378/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7379 dynamic, the relocations should go in SRELOC, otherwise they should
7380 go in the special .rel.iplt section. */
7381
7382static void
7383elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7384 bfd_size_type count)
7385{
7386 struct elf32_arm_link_hash_table *htab;
7387
7388 htab = elf32_arm_hash_table (info);
7389 if (!htab->root.dynamic_sections_created)
7390 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7391 else
7392 {
7393 BFD_ASSERT (sreloc != NULL);
7394 sreloc->size += RELOC_SIZE (htab) * count;
7395 }
7396}
7397
47beaa6a
RS		 7398/* Add relocation REL to the end of relocation section SRELOC. */
7399
7400static void
7401elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7402 asection *sreloc, Elf_Internal_Rela *rel)
7403{
7404 bfd_byte *loc;
7405 struct elf32_arm_link_hash_table *htab;
7406
7407 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7408 if (!htab->root.dynamic_sections_created
7409 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7410 sreloc = htab->root.irelplt;
47beaa6a
RS		 7411 if (sreloc == NULL)
7412 abort ();
7413 loc = sreloc->contents;
7414 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7415 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7416 abort ();
7417 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7418}
7419
34e77a92
RS		 7420/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7421 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7422 to .plt. */
7423
7424static void
7425elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7426 bfd_boolean is_iplt_entry,
7427 union gotplt_union *root_plt,
7428 struct arm_plt_info *arm_plt)
7429{
7430 struct elf32_arm_link_hash_table *htab;
7431 asection *splt;
7432 asection *sgotplt;
7433
7434 htab = elf32_arm_hash_table (info);
7435
7436 if (is_iplt_entry)
7437 {
7438 splt = htab->root.iplt;
7439 sgotplt = htab->root.igotplt;
7440
99059e56
RM		 7441 /* NaCl uses a special first entry in .iplt too. */
7442 if (htab->nacl_p && splt->size == 0)
7443 splt->size += htab->plt_header_size;
7444
34e77a92
RS		 7445 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7446 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7447 }
7448 else
7449 {
7450 splt = htab->root.splt;
7451 sgotplt = htab->root.sgotplt;
7452
7453 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7454 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7455
7456 /* If this is the first .plt entry, make room for the special
7457 first entry. */
7458 if (splt->size == 0)
7459 splt->size += htab->plt_header_size;
7460 }
7461
7462 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7463 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7464 splt->size += PLT_THUMB_STUB_SIZE;
7465 root_plt->offset = splt->size;
7466 splt->size += htab->plt_entry_size;
7467
7468 if (!htab->symbian_p)
7469 {
7470 /* We also need to make an entry in the .got.plt section, which
7471 will be placed in the .got section by the linker script. */
7472 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7473 sgotplt->size += 4;
7474 }
7475}
7476
b38cadfb
NC		 7477static bfd_vma
7478arm_movw_immediate (bfd_vma value)
7479{
7480 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7481}
7482
7483static bfd_vma
7484arm_movt_immediate (bfd_vma value)
7485{
7486 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7487}
7488
34e77a92
RS		 7489/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7490 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7491 Otherwise, DYNINDX is the index of the symbol in the dynamic
7492 symbol table and SYM_VALUE is undefined.
7493
7494 ROOT_PLT points to the offset of the PLT entry from the start of its
7495 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
57460bcf 7496 bookkeeping information.
34e77a92 7497
57460bcf
NC		 7498 Returns FALSE if there was a problem. */
7499
7500static bfd_boolean
34e77a92
RS		 7501elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7502 union gotplt_union *root_plt,
7503 struct arm_plt_info *arm_plt,
7504 int dynindx, bfd_vma sym_value)
7505{
7506 struct elf32_arm_link_hash_table *htab;
7507 asection *sgot;
7508 asection *splt;
7509 asection *srel;
7510 bfd_byte *loc;
7511 bfd_vma plt_index;
7512 Elf_Internal_Rela rel;
7513 bfd_vma plt_header_size;
7514 bfd_vma got_header_size;
7515
7516 htab = elf32_arm_hash_table (info);
7517
7518 /* Pick the appropriate sections and sizes. */
7519 if (dynindx == -1)
7520 {
7521 splt = htab->root.iplt;
7522 sgot = htab->root.igotplt;
7523 srel = htab->root.irelplt;
7524
7525 /* There are no reserved entries in .igot.plt, and no special
7526 first entry in .iplt. */
7527 got_header_size = 0;
7528 plt_header_size = 0;
7529 }
7530 else
7531 {
7532 splt = htab->root.splt;
7533 sgot = htab->root.sgotplt;
7534 srel = htab->root.srelplt;
7535
7536 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7537 plt_header_size = htab->plt_header_size;
7538 }
7539 BFD_ASSERT (splt != NULL && srel != NULL);
7540
7541 /* Fill in the entry in the procedure linkage table. */
7542 if (htab->symbian_p)
7543 {
7544 BFD_ASSERT (dynindx >= 0);
7545 put_arm_insn (htab, output_bfd,
7546 elf32_arm_symbian_plt_entry[0],
7547 splt->contents + root_plt->offset);
7548 bfd_put_32 (output_bfd,
7549 elf32_arm_symbian_plt_entry[1],
7550 splt->contents + root_plt->offset + 4);
7551
7552 /* Fill in the entry in the .rel.plt section. */
7553 rel.r_offset = (splt->output_section->vma
7554 + splt->output_offset
7555 + root_plt->offset + 4);
7556 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7557
7558 /* Get the index in the procedure linkage table which
7559 corresponds to this symbol. This is the index of this symbol
7560 in all the symbols for which we are making plt entries. The
7561 first entry in the procedure linkage table is reserved. */
7562 plt_index = ((root_plt->offset - plt_header_size)
7563 / htab->plt_entry_size);
7564 }
7565 else
7566 {
7567 bfd_vma got_offset, got_address, plt_address;
7568 bfd_vma got_displacement, initial_got_entry;
7569 bfd_byte * ptr;
7570
7571 BFD_ASSERT (sgot != NULL);
7572
7573 /* Get the offset into the .(i)got.plt table of the entry that
7574 corresponds to this function. */
7575 got_offset = (arm_plt->got_offset & -2);
7576
7577 /* Get the index in the procedure linkage table which
7578 corresponds to this symbol. This is the index of this symbol
7579 in all the symbols for which we are making plt entries.
7580 After the reserved .got.plt entries, all symbols appear in
7581 the same order as in .plt. */
7582 plt_index = (got_offset - got_header_size) / 4;
7583
7584 /* Calculate the address of the GOT entry. */
7585 got_address = (sgot->output_section->vma
7586 + sgot->output_offset
7587 + got_offset);
7588
7589 /* ...and the address of the PLT entry. */
7590 plt_address = (splt->output_section->vma
7591 + splt->output_offset
7592 + root_plt->offset);
7593
7594 ptr = splt->contents + root_plt->offset;
7595 if (htab->vxworks_p && info->shared)
7596 {
7597 unsigned int i;
7598 bfd_vma val;
7599
7600 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7601 {
7602 val = elf32_arm_vxworks_shared_plt_entry[i];
7603 if (i == 2)
7604 val |= got_address - sgot->output_section->vma;
7605 if (i == 5)
7606 val |= plt_index * RELOC_SIZE (htab);
7607 if (i == 2 || i == 5)
7608 bfd_put_32 (output_bfd, val, ptr);
7609 else
7610 put_arm_insn (htab, output_bfd, val, ptr);
7611 }
7612 }
7613 else if (htab->vxworks_p)
7614 {
7615 unsigned int i;
7616 bfd_vma val;
7617
7618 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7619 {
7620 val = elf32_arm_vxworks_exec_plt_entry[i];
7621 if (i == 2)
7622 val |= got_address;
7623 if (i == 4)
7624 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7625 if (i == 5)
7626 val |= plt_index * RELOC_SIZE (htab);
7627 if (i == 2 || i == 5)
7628 bfd_put_32 (output_bfd, val, ptr);
7629 else
7630 put_arm_insn (htab, output_bfd, val, ptr);
7631 }
7632
7633 loc = (htab->srelplt2->contents
7634 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7635
7636 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7637 referencing the GOT for this PLT entry. */
7638 rel.r_offset = plt_address + 8;
7639 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7640 rel.r_addend = got_offset;
7641 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7642 loc += RELOC_SIZE (htab);
7643
7644 /* Create the R_ARM_ABS32 relocation referencing the
7645 beginning of the PLT for this GOT entry. */
7646 rel.r_offset = got_address;
7647 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7648 rel.r_addend = 0;
7649 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7650 }
b38cadfb
NC		 7651 else if (htab->nacl_p)
7652 {
7653 /* Calculate the displacement between the PLT slot and the
7654 common tail that's part of the special initial PLT slot. */
6034aab8 7655 int32_t tail_displacement
b38cadfb
NC		 7656 = ((splt->output_section->vma + splt->output_offset
7657 + ARM_NACL_PLT_TAIL_OFFSET)
7658 - (plt_address + htab->plt_entry_size + 4));
7659 BFD_ASSERT ((tail_displacement & 3) == 0);
7660 tail_displacement >>= 2;
7661
7662 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7663 || (-tail_displacement & 0xff000000) == 0);
7664
7665 /* Calculate the displacement between the PLT slot and the entry
7666 in the GOT. The offset accounts for the value produced by
7667 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8 7668 got_displacement = (got_address
99059e56 7669 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7670
7671 /* NaCl does not support interworking at all. */
7672 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7673
7674 put_arm_insn (htab, output_bfd,
7675 elf32_arm_nacl_plt_entry[0]
7676 | arm_movw_immediate (got_displacement),
7677 ptr + 0);
7678 put_arm_insn (htab, output_bfd,
7679 elf32_arm_nacl_plt_entry[1]
7680 | arm_movt_immediate (got_displacement),
7681 ptr + 4);
7682 put_arm_insn (htab, output_bfd,
7683 elf32_arm_nacl_plt_entry[2],
7684 ptr + 8);
7685 put_arm_insn (htab, output_bfd,
7686 elf32_arm_nacl_plt_entry[3]
7687 | (tail_displacement & 0x00ffffff),
7688 ptr + 12);
7689 }
57460bcf
NC		 7690 else if (using_thumb_only (htab))
7691 {
7692 /* PR ld/16017: Do not generate ARM instructions for
7693 the PLT if compiling for a thumb-only target.
7694
7695 FIXME: We ought to be able to generate thumb PLT instructions... */
7696 _bfd_error_handler (_("%B: Warning: thumb mode PLT generation not currently supported"),
7697 output_bfd);
7698 return FALSE;
7699 }
34e77a92
RS		 7700 else
7701 {
7702 /* Calculate the displacement between the PLT slot and the
7703 entry in the GOT. The eight-byte offset accounts for the
7704 value produced by adding to pc in the first instruction
7705 of the PLT stub. */
7706 got_displacement = got_address - (plt_address + 8);
7707
7708 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7709
7710 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7711 {
7712 put_thumb_insn (htab, output_bfd,
7713 elf32_arm_plt_thumb_stub[0], ptr - 4);
7714 put_thumb_insn (htab, output_bfd,
7715 elf32_arm_plt_thumb_stub[1], ptr - 2);
7716 }
7717
7718 put_arm_insn (htab, output_bfd,
7719 elf32_arm_plt_entry[0]
7720 | ((got_displacement & 0x0ff00000) >> 20),
7721 ptr + 0);
7722 put_arm_insn (htab, output_bfd,
7723 elf32_arm_plt_entry[1]
7724 | ((got_displacement & 0x000ff000) >> 12),
7725 ptr+ 4);
7726 put_arm_insn (htab, output_bfd,
7727 elf32_arm_plt_entry[2]
7728 | (got_displacement & 0x00000fff),
7729 ptr + 8);
7730#ifdef FOUR_WORD_PLT
7731 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7732#endif
7733 }
7734
7735 /* Fill in the entry in the .rel(a).(i)plt section. */
7736 rel.r_offset = got_address;
7737 rel.r_addend = 0;
7738 if (dynindx == -1)
7739 {
7740 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7741 The dynamic linker or static executable then calls SYM_VALUE
7742 to determine the correct run-time value of the .igot.plt entry. */
7743 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7744 initial_got_entry = sym_value;
7745 }
7746 else
7747 {
7748 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7749 initial_got_entry = (splt->output_section->vma
7750 + splt->output_offset);
7751 }
7752
7753 /* Fill in the entry in the global offset table. */
7754 bfd_put_32 (output_bfd, initial_got_entry,
7755 sgot->contents + got_offset);
7756 }
7757
aba8c3de
WN		 7758 if (dynindx == -1)
7759 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7760 else
7761 {
7762 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7763 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7764 }
57460bcf
NC		 7765
7766 return TRUE;
34e77a92
RS		 7767}
7768
eb043451
PB		 7769/* Some relocations map to different relocations depending on the
7770 target. Return the real relocation. */
8029a119 7771
eb043451
PB		 7772static int
7773arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7774 int r_type)
7775{
7776 switch (r_type)
7777 {
7778 case R_ARM_TARGET1:
7779 if (globals->target1_is_rel)
7780 return R_ARM_REL32;
7781 else
7782 return R_ARM_ABS32;
7783
7784 case R_ARM_TARGET2:
7785 return globals->target2_reloc;
7786
7787 default:
7788 return r_type;
7789 }
7790}
eb043451 7791
ba93b8ac
DJ		 7792/* Return the base VMA address which should be subtracted from real addresses
7793 when resolving @dtpoff relocation.
7794 This is PT_TLS segment p_vaddr. */
7795
7796static bfd_vma
7797dtpoff_base (struct bfd_link_info *info)
7798{
7799 /* If tls_sec is NULL, we should have signalled an error already. */
7800 if (elf_hash_table (info)->tls_sec == NULL)
7801 return 0;
7802 return elf_hash_table (info)->tls_sec->vma;
7803}
7804
7805/* Return the relocation value for @tpoff relocation
7806 if STT_TLS virtual address is ADDRESS. */
7807
7808static bfd_vma
7809tpoff (struct bfd_link_info *info, bfd_vma address)
7810{
7811 struct elf_link_hash_table *htab = elf_hash_table (info);
7812 bfd_vma base;
7813
7814 /* If tls_sec is NULL, we should have signalled an error already. */
7815 if (htab->tls_sec == NULL)
7816 return 0;
7817 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7818 return address - htab->tls_sec->vma + base;
7819}
7820
00a97672
RS		 7821/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7822 VALUE is the relocation value. */
7823
7824static bfd_reloc_status_type
7825elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7826{
7827 if (value > 0xfff)
7828 return bfd_reloc_overflow;
7829
7830 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7831 bfd_put_32 (abfd, value, data);
7832 return bfd_reloc_ok;
7833}
7834
0855e32b
NS		 7835/* Handle TLS relaxations. Relaxing is possible for symbols that use
7836 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7837 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7838
7839 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7840 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7841 case of error.
7842
7843 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7844 the pre-relaxed code. It would be nice if the relocs were updated
7845 to match the optimization. */
0855e32b 7846
b38cadfb 7847static bfd_reloc_status_type
0855e32b 7848elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7849 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7850 Elf_Internal_Rela *rel, unsigned long is_local)
7851{
7852 unsigned long insn;
b38cadfb 7853
0855e32b
NS		 7854 switch (ELF32_R_TYPE (rel->r_info))
7855 {
7856 default:
7857 return bfd_reloc_notsupported;
b38cadfb 7858
0855e32b
NS		 7859 case R_ARM_TLS_GOTDESC:
7860 if (is_local)
7861 insn = 0;
7862 else
7863 {
7864 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7865 if (insn & 1)
7866 insn -= 5; /* THUMB */
7867 else
7868 insn -= 8; /* ARM */
7869 }
7870 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7871 return bfd_reloc_continue;
7872
7873 case R_ARM_THM_TLS_DESCSEQ:
7874 /* Thumb insn. */
7875 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7876 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7877 {
7878 if (is_local)
7879 /* nop */
7880 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7881 }
7882 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7883 {
7884 if (is_local)
7885 /* nop */
7886 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7887 else
7888 /* ldr rx,[ry] */
7889 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7890 }
7891 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7892 {
7893 if (is_local)
7894 /* nop */
7895 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7896 else
7897 /* mov r0, rx */
7898 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7899 contents + rel->r_offset);
7900 }
7901 else
7902 {
7903 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7904 /* It's a 32 bit instruction, fetch the rest of it for
7905 error generation. */
7906 insn = (insn << 16)
7907 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7908 (*_bfd_error_handler)
7909 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7910 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7911 return bfd_reloc_notsupported;
7912 }
7913 break;
b38cadfb 7914
0855e32b
NS		 7915 case R_ARM_TLS_DESCSEQ:
7916 /* arm insn. */
7917 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7918 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7919 {
7920 if (is_local)
7921 /* mov rx, ry */
7922 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7923 contents + rel->r_offset);
7924 }
7925 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7926 {
7927 if (is_local)
7928 /* nop */
7929 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7930 else
7931 /* ldr rx,[ry] */
7932 bfd_put_32 (input_bfd, insn & 0xfffff000,
7933 contents + rel->r_offset);
7934 }
7935 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7936 {
7937 if (is_local)
7938 /* nop */
7939 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7940 else
7941 /* mov r0, rx */
7942 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7943 contents + rel->r_offset);
7944 }
7945 else
7946 {
7947 (*_bfd_error_handler)
7948 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7949 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7950 return bfd_reloc_notsupported;
7951 }
7952 break;
7953
7954 case R_ARM_TLS_CALL:
7955 /* GD->IE relaxation, turn the instruction into 'nop' or
7956 'ldr r0, [pc,r0]' */
7957 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7958 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7959 break;
b38cadfb 7960
0855e32b
NS		 7961 case R_ARM_THM_TLS_CALL:
7962 /* GD->IE relaxation */
7963 if (!is_local)
7964 /* add r0,pc; ldr r0, [r0] */
7965 insn = 0x44786800;
7966 else if (arch_has_thumb2_nop (globals))
7967 /* nop.w */
7968 insn = 0xf3af8000;
7969 else
7970 /* nop; nop */
7971 insn = 0xbf00bf00;
b38cadfb 7972
0855e32b
NS		 7973 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7974 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7975 break;
7976 }
7977 return bfd_reloc_ok;
7978}
7979
4962c51a
MS		 7980/* For a given value of n, calculate the value of G_n as required to
7981 deal with group relocations. We return it in the form of an
7982 encoded constant-and-rotation, together with the final residual. If n is
7983 specified as less than zero, then final_residual is filled with the
7984 input value and no further action is performed. */
7985
7986static bfd_vma
7987calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7988{
7989 int current_n;
7990 bfd_vma g_n;
7991 bfd_vma encoded_g_n = 0;
7992 bfd_vma residual = value; /* Also known as Y_n. */
7993
7994 for (current_n = 0; current_n <= n; current_n++)
7995 {
7996 int shift;
7997
7998 /* Calculate which part of the value to mask. */
7999 if (residual == 0)
99059e56 8000 shift = 0;
4962c51a 8001 else
99059e56
RM		 8002 {
8003 int msb;
8004
8005 /* Determine the most significant bit in the residual and
8006 align the resulting value to a 2-bit boundary. */
8007 for (msb = 30; msb >= 0; msb -= 2)
8008 if (residual & (3 << msb))
8009 break;
8010
8011 /* The desired shift is now (msb - 6), or zero, whichever
8012 is the greater. */
8013 shift = msb - 6;
8014 if (shift < 0)
8015 shift = 0;
8016 }
4962c51a
MS		 8017
8018 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8019 g_n = residual & (0xff << shift);
8020 encoded_g_n = (g_n >> shift)
99059e56 8021 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4962c51a
MS		 8022
8023 /* Calculate the residual for the next time around. */
8024 residual &= ~g_n;
8025 }
8026
8027 *final_residual = residual;
8028
8029 return encoded_g_n;
8030}
8031
8032/* Given an ARM instruction, determine whether it is an ADD or a SUB.
8033 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 8034
4962c51a 8035static int
906e58ca 8036identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8037{
8038 int opcode = insn & 0x1e00000;
8039
8040 if (opcode == 1 << 23) /* ADD */
8041 return 1;
8042
8043 if (opcode == 1 << 22) /* SUB */
8044 return -1;
8045
8046 return 0;
8047}
8048
252b5132 8049/* Perform a relocation as part of a final link. */
9b485d32 8050
252b5132 8051static bfd_reloc_status_type
57e8b36a
NC		 8052elf32_arm_final_link_relocate (reloc_howto_type * howto,
8053 bfd * input_bfd,
8054 bfd * output_bfd,
8055 asection * input_section,
8056 bfd_byte * contents,
8057 Elf_Internal_Rela * rel,
8058 bfd_vma value,
8059 struct bfd_link_info * info,
8060 asection * sym_sec,
8061 const char * sym_name,
34e77a92
RS		 8062 unsigned char st_type,
8063 enum arm_st_branch_type branch_type,
0945cdfd 8064 struct elf_link_hash_entry * h,
f2a9dd69 8065 bfd_boolean * unresolved_reloc_p,
8029a119 8066 char ** error_message)
252b5132
RH		 8067{
8068 unsigned long r_type = howto->type;
8069 unsigned long r_symndx;
8070 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8071 bfd_vma * local_got_offsets;
0855e32b 8072 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8073 asection * sgot;
8074 asection * splt;
252b5132 8075 asection * sreloc = NULL;
362d30a1 8076 asection * srelgot;
252b5132 8077 bfd_vma addend;
ba96a88f 8078 bfd_signed_vma signed_addend;
34e77a92
RS		 8079 unsigned char dynreloc_st_type;
8080 bfd_vma dynreloc_value;
ba96a88f 8081 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8082 struct elf32_arm_link_hash_entry *eh;
8083 union gotplt_union *root_plt;
8084 struct arm_plt_info *arm_plt;
8085 bfd_vma plt_offset;
8086 bfd_vma gotplt_offset;
8087 bfd_boolean has_iplt_entry;
f21f3fe0 8088
9c504268 8089 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8090 if (globals == NULL)
8091 return bfd_reloc_notsupported;
9c504268 8092
0ffa91dd
NC		 8093 BFD_ASSERT (is_arm_elf (input_bfd));
8094
8095 /* Some relocation types map to different relocations depending on the
9c504268 8096 target. We pick the right one here. */
eb043451 8097 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8098
8099 /* It is possible to have linker relaxations on some TLS access
8100 models. Update our information here. */
8101 r_type = elf32_arm_tls_transition (info, r_type, h);
8102
eb043451
PB		 8103 if (r_type != howto->type)
8104 howto = elf32_arm_howto_from_type (r_type);
9c504268 8105
cac15327
NC		 8106 /* If the start address has been set, then set the EF_ARM_HASENTRY
8107 flag. Setting this more than once is redundant, but the cost is
8108 not too high, and it keeps the code simple.
99e4ae17 8109
cac15327
NC		 8110 The test is done here, rather than somewhere else, because the
8111 start address is only set just before the final link commences.
8112
8113 Note - if the user deliberately sets a start address of 0, the
8114 flag will not be set. */
8115 if (bfd_get_start_address (output_bfd) != 0)
8116 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8117
34e77a92 8118 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8119 sgot = globals->root.sgot;
252b5132 8120 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8121 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8122
34e77a92
RS		 8123 if (globals->root.dynamic_sections_created)
8124 srelgot = globals->root.srelgot;
8125 else
8126 srelgot = NULL;
8127
252b5132
RH		 8128 r_symndx = ELF32_R_SYM (rel->r_info);
8129
4e7fd91e 8130 if (globals->use_rel)
ba96a88f 8131 {
4e7fd91e
PB		 8132 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8133
8134 if (addend & ((howto->src_mask + 1) >> 1))
8135 {
8136 signed_addend = -1;
8137 signed_addend &= ~ howto->src_mask;
8138 signed_addend |= addend;
8139 }
8140 else
8141 signed_addend = addend;
ba96a88f
NC		 8142 }
8143 else
4e7fd91e 8144 addend = signed_addend = rel->r_addend;
f21f3fe0 8145
39f21624
NC		 8146 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8147 are resolving a function call relocation. */
8148 if (using_thumb_only (globals)
8149 && (r_type == R_ARM_THM_CALL
8150 || r_type == R_ARM_THM_JUMP24)
8151 && branch_type == ST_BRANCH_TO_ARM)
8152 branch_type = ST_BRANCH_TO_THUMB;
8153
34e77a92
RS		 8154 /* Record the symbol information that should be used in dynamic
8155 relocations. */
8156 dynreloc_st_type = st_type;
8157 dynreloc_value = value;
8158 if (branch_type == ST_BRANCH_TO_THUMB)
8159 dynreloc_value |= 1;
8160
8161 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8162 VALUE appropriately for relocations that we resolve at link time. */
8163 has_iplt_entry = FALSE;
8164 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8165 && root_plt->offset != (bfd_vma) -1)
8166 {
8167 plt_offset = root_plt->offset;
8168 gotplt_offset = arm_plt->got_offset;
8169
8170 if (h == NULL || eh->is_iplt)
8171 {
8172 has_iplt_entry = TRUE;
8173 splt = globals->root.iplt;
8174
8175 /* Populate .iplt entries here, because not all of them will
8176 be seen by finish_dynamic_symbol. The lower bit is set if
8177 we have already populated the entry. */
8178 if (plt_offset & 1)
8179 plt_offset--;
8180 else
8181 {
57460bcf
NC		 8182 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8183 -1, dynreloc_value))
8184 root_plt->offset |= 1;
8185 else
8186 return bfd_reloc_notsupported;
34e77a92
RS		 8187 }
8188
8189 /* Static relocations always resolve to the .iplt entry. */
8190 st_type = STT_FUNC;
8191 value = (splt->output_section->vma
8192 + splt->output_offset
8193 + plt_offset);
8194 branch_type = ST_BRANCH_TO_ARM;
8195
8196 /* If there are non-call relocations that resolve to the .iplt
8197 entry, then all dynamic ones must too. */
8198 if (arm_plt->noncall_refcount != 0)
8199 {
8200 dynreloc_st_type = st_type;
8201 dynreloc_value = value;
8202 }
8203 }
8204 else
8205 /* We populate the .plt entry in finish_dynamic_symbol. */
8206 splt = globals->root.splt;
8207 }
8208 else
8209 {
8210 splt = NULL;
8211 plt_offset = (bfd_vma) -1;
8212 gotplt_offset = (bfd_vma) -1;
8213 }
8214
252b5132
RH		 8215 switch (r_type)
8216 {
8217 case R_ARM_NONE:
28a094c2
DJ		 8218 /* We don't need to find a value for this symbol. It's just a
8219 marker. */
8220 *unresolved_reloc_p = FALSE;
252b5132
RH		 8221 return bfd_reloc_ok;
8222
00a97672
RS		 8223 case R_ARM_ABS12:
8224 if (!globals->vxworks_p)
8225 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8226
252b5132
RH		 8227 case R_ARM_PC24:
8228 case R_ARM_ABS32:
bb224fc3 8229 case R_ARM_ABS32_NOI:
252b5132 8230 case R_ARM_REL32:
bb224fc3 8231 case R_ARM_REL32_NOI:
5b5bb741
PB		 8232 case R_ARM_CALL:
8233 case R_ARM_JUMP24:
dfc5f959 8234 case R_ARM_XPC25:
eb043451 8235 case R_ARM_PREL31:
7359ea65 8236 case R_ARM_PLT32:
7359ea65
DJ		 8237 /* Handle relocations which should use the PLT entry. ABS32/REL32
8238 will use the symbol's value, which may point to a PLT entry, but we
8239 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8240 branches in this object should go to it, except if the PLT is too
8241 far away, in which case a long branch stub should be inserted. */
bb224fc3 8242 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
99059e56 8243 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8244 && r_type != R_ARM_CALL
8245 && r_type != R_ARM_JUMP24
8246 && r_type != R_ARM_PLT32)
34e77a92 8247 && plt_offset != (bfd_vma) -1)
7359ea65 8248 {
34e77a92
RS		 8249 /* If we've created a .plt section, and assigned a PLT entry
8250 to this function, it must either be a STT_GNU_IFUNC reference
8251 or not be known to bind locally. In other cases, we should
8252 have cleared the PLT entry by now. */
8253 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8254
8255 value = (splt->output_section->vma
8256 + splt->output_offset
34e77a92 8257 + plt_offset);
0945cdfd 8258 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8259 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8260 contents, rel->r_offset, value,
00a97672 8261 rel->r_addend);
7359ea65
DJ		 8262 }
8263
67687978
PB		 8264 /* When generating a shared object or relocatable executable, these
8265 relocations are copied into the output file to be resolved at
8266 run time. */
8267 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8268 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8269 && !(globals->vxworks_p
3348747a
NS		 8270 && strcmp (input_section->output_section->name,
8271 ".tls_vars") == 0)
bb224fc3 8272 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8273 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8274 && !(input_bfd == globals->stub_bfd
8275 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8276 && (h == NULL
8277 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8278 || h->root.type != bfd_link_hash_undefweak)
8279 && r_type != R_ARM_PC24
5b5bb741
PB		 8280 && r_type != R_ARM_CALL
8281 && r_type != R_ARM_JUMP24
ee06dc07 8282 && r_type != R_ARM_PREL31
7359ea65 8283 && r_type != R_ARM_PLT32)
252b5132 8284 {
947216bf 8285 Elf_Internal_Rela outrel;
b34976b6 8286 bfd_boolean skip, relocate;
f21f3fe0 8287
0945cdfd
DJ		 8288 *unresolved_reloc_p = FALSE;
8289
34e77a92 8290 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8291 {
83bac4b0
NC		 8292 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8293 ! globals->use_rel);
f21f3fe0 8294
83bac4b0 8295 if (sreloc == NULL)
252b5132 8296 return bfd_reloc_notsupported;
252b5132 8297 }
f21f3fe0 8298
b34976b6
AM		 8299 skip = FALSE;
8300 relocate = FALSE;
f21f3fe0 8301
00a97672 8302 outrel.r_addend = addend;
c629eae0
JJ		 8303 outrel.r_offset =
8304 _bfd_elf_section_offset (output_bfd, info, input_section,
8305 rel->r_offset);
8306 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8307 skip = TRUE;
0bb2d96a 8308 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8309 skip = TRUE, relocate = TRUE;
252b5132
RH		 8310 outrel.r_offset += (input_section->output_section->vma
8311 + input_section->output_offset);
f21f3fe0 8312
252b5132 8313 if (skip)
0bb2d96a 8314 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8315 else if (h != NULL
8316 && h->dynindx != -1
7359ea65 8317 && (!info->shared
5e681ec4 8318 || !info->symbolic
f5385ebf 8319 || !h->def_regular))
5e681ec4 8320 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8321 else
8322 {
a16385dc
MM		 8323 int symbol;
8324
5e681ec4 8325 /* This symbol is local, or marked to become local. */
34e77a92 8326 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8327 if (globals->symbian_p)
6366ff1e 8328 {
74541ad4
AM		 8329 asection *osec;
8330
6366ff1e
MM		 8331 /* On Symbian OS, the data segment and text segement
8332 can be relocated independently. Therefore, we
8333 must indicate the segment to which this
8334 relocation is relative. The BPABI allows us to
8335 use any symbol in the right segment; we just use
8336 the section symbol as it is convenient. (We
8337 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8338 will not appear in the dynamic symbol table.)
8339
8340 Note that the dynamic linker ignores the section
8341 symbol value, so we don't subtract osec->vma
8342 from the emitted reloc addend. */
10dbd1f3 8343 if (sym_sec)
74541ad4 8344 osec = sym_sec->output_section;
10dbd1f3 8345 else
74541ad4
AM		 8346 osec = input_section->output_section;
8347 symbol = elf_section_data (osec)->dynindx;
8348 if (symbol == 0)
8349 {
8350 struct elf_link_hash_table *htab = elf_hash_table (info);
8351
8352 if ((osec->flags & SEC_READONLY) == 0
8353 && htab->data_index_section != NULL)
8354 osec = htab->data_index_section;
8355 else
8356 osec = htab->text_index_section;
8357 symbol = elf_section_data (osec)->dynindx;
8358 }
6366ff1e
MM		 8359 BFD_ASSERT (symbol != 0);
8360 }
a16385dc
MM		 8361 else
8362 /* On SVR4-ish systems, the dynamic loader cannot
8363 relocate the text and data segments independently,
8364 so the symbol does not matter. */
8365 symbol = 0;
34e77a92
RS		 8366 if (dynreloc_st_type == STT_GNU_IFUNC)
8367 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8368 to the .iplt entry. Instead, every non-call reference
8369 must use an R_ARM_IRELATIVE relocation to obtain the
8370 correct run-time address. */
8371 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8372 else
8373 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8374 if (globals->use_rel)
8375 relocate = TRUE;
8376 else
34e77a92 8377 outrel.r_addend += dynreloc_value;
252b5132 8378 }
f21f3fe0 8379
47beaa6a 8380 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8381
f21f3fe0 8382 /* If this reloc is against an external symbol, we do not want to
252b5132 8383 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8384 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8385 if (! relocate)
8386 return bfd_reloc_ok;
9a5aca8c 8387
f21f3fe0 8388 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8389 contents, rel->r_offset,
8390 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8391 }
8392 else switch (r_type)
8393 {
00a97672
RS		 8394 case R_ARM_ABS12:
8395 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8396
dfc5f959 8397 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8398 case R_ARM_CALL:
8399 case R_ARM_JUMP24:
8029a119 8400 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8401 case R_ARM_PLT32:
906e58ca 8402 {
906e58ca
NC		 8403 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8404
dfc5f959 8405 if (r_type == R_ARM_XPC25)
252b5132 8406 {
dfc5f959
NC		 8407 /* Check for Arm calling Arm function. */
8408 /* FIXME: Should we translate the instruction into a BL
8409 instruction instead ? */
35fc36a8 8410 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8411 (*_bfd_error_handler)
8412 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8413 input_bfd,
8414 h ? h->root.root.string : "(local)");
dfc5f959 8415 }
155d87d7 8416 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8417 {
8418 /* Check for Arm calling Thumb function. */
35fc36a8 8419 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8420 {
f2a9dd69
DJ		 8421 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8422 output_bfd, input_section,
8423 hit_data, sym_sec, rel->r_offset,
8424 signed_addend, value,
8425 error_message))
8426 return bfd_reloc_ok;
8427 else
8428 return bfd_reloc_dangerous;
dfc5f959 8429 }
252b5132 8430 }
ba96a88f 8431
906e58ca 8432 /* Check if a stub has to be inserted because the
8029a119 8433 destination is too far or we are changing mode. */
155d87d7
CL		 8434 if ( r_type == R_ARM_CALL
8435 || r_type == R_ARM_JUMP24
8436 || r_type == R_ARM_PLT32)
906e58ca 8437 {
fe33d2fa
CL		 8438 enum elf32_arm_stub_type stub_type = arm_stub_none;
8439 struct elf32_arm_link_hash_entry *hash;
8440
8441 hash = (struct elf32_arm_link_hash_entry *) h;
8442 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8443 st_type, &branch_type,
8444 hash, value, sym_sec,
fe33d2fa 8445 input_bfd, sym_name);
5fa9e92f 8446
fe33d2fa 8447 if (stub_type != arm_stub_none)
906e58ca
NC		 8448 {
8449 /* The target is out of reach, so redirect the
8450 branch to the local stub for this function. */
906e58ca
NC		 8451 stub_entry = elf32_arm_get_stub_entry (input_section,
8452 sym_sec, h,
fe33d2fa
CL		 8453 rel, globals,
8454 stub_type);
9cd3e4e5
NC		 8455 {
8456 if (stub_entry != NULL)
8457 value = (stub_entry->stub_offset
8458 + stub_entry->stub_sec->output_offset
8459 + stub_entry->stub_sec->output_section->vma);
8460
8461 if (plt_offset != (bfd_vma) -1)
8462 *unresolved_reloc_p = FALSE;
8463 }
906e58ca 8464 }
fe33d2fa
CL		 8465 else
8466 {
8467 /* If the call goes through a PLT entry, make sure to
8468 check distance to the right destination address. */
34e77a92 8469 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8470 {
8471 value = (splt->output_section->vma
8472 + splt->output_offset
34e77a92 8473 + plt_offset);
fe33d2fa
CL		 8474 *unresolved_reloc_p = FALSE;
8475 /* The PLT entry is in ARM mode, regardless of the
8476 target function. */
35fc36a8 8477 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8478 }
8479 }
906e58ca
NC		 8480 }
8481
dea514f5
PB		 8482 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8483 where:
8484 S is the address of the symbol in the relocation.
8485 P is address of the instruction being relocated.
8486 A is the addend (extracted from the instruction) in bytes.
8487
8488 S is held in 'value'.
8489 P is the base address of the section containing the
8490 instruction plus the offset of the reloc into that
8491 section, ie:
8492 (input_section->output_section->vma +
8493 input_section->output_offset +
8494 rel->r_offset).
8495 A is the addend, converted into bytes, ie:
8496 (signed_addend * 4)
8497
8498 Note: None of these operations have knowledge of the pipeline
8499 size of the processor, thus it is up to the assembler to
8500 encode this information into the addend. */
8501 value -= (input_section->output_section->vma
8502 + input_section->output_offset);
8503 value -= rel->r_offset;
4e7fd91e
PB		 8504 if (globals->use_rel)
8505 value += (signed_addend << howto->size);
8506 else
8507 /* RELA addends do not have to be adjusted by howto->size. */
8508 value += signed_addend;
23080146 8509
dcb5e6e6
NC		 8510 signed_addend = value;
8511 signed_addend >>= howto->rightshift;
9a5aca8c 8512
5ab79981 8513 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8514 the next instruction unless a PLT entry will be created.
77b4f08f 8515 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8516 The jump to the next instruction is optimized as a NOP depending
8517 on the architecture. */
ffcb4889 8518 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8519 && plt_offset == (bfd_vma) -1)
77b4f08f 8520 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8521 {
cd1dac3d
DG		 8522 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8523
8524 if (arch_has_arm_nop (globals))
8525 value |= 0x0320f000;
8526 else
8527 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8528 }
8529 else
59f2c4e7 8530 {
9b485d32 8531 /* Perform a signed range check. */
dcb5e6e6 8532 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8533 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8534 return bfd_reloc_overflow;
9a5aca8c 8535
5ab79981 8536 addend = (value & 2);
39b41c9c 8537
5ab79981
PB		 8538 value = (signed_addend & howto->dst_mask)
8539 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8540
5ab79981
PB		 8541 if (r_type == R_ARM_CALL)
8542 {
155d87d7 8543 /* Set the H bit in the BLX instruction. */
35fc36a8 8544 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8545 {
8546 if (addend)
8547 value |= (1 << 24);
8548 else
8549 value &= ~(bfd_vma)(1 << 24);
8550 }
8551
5ab79981 8552 /* Select the correct instruction (BL or BLX). */
906e58ca 8553 /* Only if we are not handling a BL to a stub. In this
8029a119 8554 case, mode switching is performed by the stub. */
35fc36a8 8555 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8556 value |= (1 << 28);
63e1a0fc 8557 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8558 {
8559 value &= ~(bfd_vma)(1 << 28);
8560 value |= (1 << 24);
8561 }
39b41c9c
PB		 8562 }
8563 }
906e58ca 8564 }
252b5132 8565 break;
f21f3fe0 8566
252b5132
RH		 8567 case R_ARM_ABS32:
8568 value += addend;
35fc36a8 8569 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8570 value |= 1;
8571 break;
f21f3fe0 8572
bb224fc3
MS		 8573 case R_ARM_ABS32_NOI:
8574 value += addend;
8575 break;
8576
252b5132 8577 case R_ARM_REL32:
a8bc6c78 8578 value += addend;
35fc36a8 8579 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8580 value |= 1;
252b5132 8581 value -= (input_section->output_section->vma
62efb346 8582 + input_section->output_offset + rel->r_offset);
252b5132 8583 break;
eb043451 8584
bb224fc3
MS		 8585 case R_ARM_REL32_NOI:
8586 value += addend;
8587 value -= (input_section->output_section->vma
8588 + input_section->output_offset + rel->r_offset);
8589 break;
8590
eb043451
PB		 8591 case R_ARM_PREL31:
8592 value -= (input_section->output_section->vma
8593 + input_section->output_offset + rel->r_offset);
8594 value += signed_addend;
8595 if (! h || h->root.type != bfd_link_hash_undefweak)
8596 {
8029a119 8597 /* Check for overflow. */
eb043451
PB		 8598 if ((value ^ (value >> 1)) & (1 << 30))
8599 return bfd_reloc_overflow;
8600 }
8601 value &= 0x7fffffff;
8602 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8603 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8604 value |= 1;
8605 break;
252b5132 8606 }
f21f3fe0 8607
252b5132
RH		 8608 bfd_put_32 (input_bfd, value, hit_data);
8609 return bfd_reloc_ok;
8610
8611 case R_ARM_ABS8:
8612 value += addend;
4e67d4ca
DG		 8613
8614 /* There is no way to tell whether the user intended to use a signed or
8615 unsigned addend. When checking for overflow we accept either,
8616 as specified by the AAELF. */
8617 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8618 return bfd_reloc_overflow;
8619
8620 bfd_put_8 (input_bfd, value, hit_data);
8621 return bfd_reloc_ok;
8622
8623 case R_ARM_ABS16:
8624 value += addend;
8625
4e67d4ca
DG		 8626 /* See comment for R_ARM_ABS8. */
8627 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8628 return bfd_reloc_overflow;
8629
8630 bfd_put_16 (input_bfd, value, hit_data);
8631 return bfd_reloc_ok;
8632
252b5132 8633 case R_ARM_THM_ABS5:
9b485d32 8634 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8635 if (globals->use_rel)
8636 {
8637 /* Need to refetch addend. */
8638 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8639 /* ??? Need to determine shift amount from operand size. */
8640 addend >>= howto->rightshift;
8641 }
252b5132
RH		 8642 value += addend;
8643
8644 /* ??? Isn't value unsigned? */
8645 if ((long) value > 0x1f || (long) value < -0x10)
8646 return bfd_reloc_overflow;
8647
8648 /* ??? Value needs to be properly shifted into place first. */
8649 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8650 bfd_put_16 (input_bfd, value, hit_data);
8651 return bfd_reloc_ok;
8652
2cab6cc3
MS		 8653 case R_ARM_THM_ALU_PREL_11_0:
8654 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8655 {
8656 bfd_vma insn;
8657 bfd_signed_vma relocation;
8658
8659 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8660 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8661
99059e56
RM		 8662 if (globals->use_rel)
8663 {
8664 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8665 | ((insn & (1 << 26)) >> 15);
8666 if (insn & 0xf00000)
8667 signed_addend = -signed_addend;
8668 }
2cab6cc3
MS		 8669
8670 relocation = value + signed_addend;
79f08007 8671 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8672 + input_section->output_offset
8673 + rel->r_offset);
2cab6cc3 8674
99059e56 8675 value = abs (relocation);
2cab6cc3 8676
99059e56
RM		 8677 if (value >= 0x1000)
8678 return bfd_reloc_overflow;
2cab6cc3
MS		 8679
8680 insn = (insn & 0xfb0f8f00) | (value & 0xff)
99059e56
RM		 8681 | ((value & 0x700) << 4)
8682 | ((value & 0x800) << 15);
8683 if (relocation < 0)
8684 insn |= 0xa00000;
2cab6cc3
MS		 8685
8686 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8687 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8688
99059e56 8689 return bfd_reloc_ok;
2cab6cc3
MS		 8690 }
8691
e1ec24c6
NC		 8692 case R_ARM_THM_PC8:
8693 /* PR 10073: This reloc is not generated by the GNU toolchain,
8694 but it is supported for compatibility with third party libraries
8695 generated by other compilers, specifically the ARM/IAR. */
8696 {
8697 bfd_vma insn;
8698 bfd_signed_vma relocation;
8699
8700 insn = bfd_get_16 (input_bfd, hit_data);
8701
99059e56 8702 if (globals->use_rel)
79f08007 8703 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8704
8705 relocation = value + addend;
79f08007 8706 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8707 + input_section->output_offset
8708 + rel->r_offset);
e1ec24c6 8709
99059e56 8710 value = abs (relocation);
e1ec24c6
NC		 8711
8712 /* We do not check for overflow of this reloc. Although strictly
8713 speaking this is incorrect, it appears to be necessary in order
8714 to work with IAR generated relocs. Since GCC and GAS do not
8715 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8716 a problem for them. */
8717 value &= 0x3fc;
8718
8719 insn = (insn & 0xff00) | (value >> 2);
8720
8721 bfd_put_16 (input_bfd, insn, hit_data);
8722
99059e56 8723 return bfd_reloc_ok;
e1ec24c6
NC		 8724 }
8725
2cab6cc3
MS		 8726 case R_ARM_THM_PC12:
8727 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8728 {
8729 bfd_vma insn;
8730 bfd_signed_vma relocation;
8731
8732 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8733 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8734
99059e56
RM		 8735 if (globals->use_rel)
8736 {
8737 signed_addend = insn & 0xfff;
8738 if (!(insn & (1 << 23)))
8739 signed_addend = -signed_addend;
8740 }
2cab6cc3
MS		 8741
8742 relocation = value + signed_addend;
79f08007 8743 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8744 + input_section->output_offset
8745 + rel->r_offset);
2cab6cc3 8746
99059e56 8747 value = abs (relocation);
2cab6cc3 8748
99059e56
RM		 8749 if (value >= 0x1000)
8750 return bfd_reloc_overflow;
2cab6cc3
MS		 8751
8752 insn = (insn & 0xff7ff000) | value;
99059e56
RM		 8753 if (relocation >= 0)
8754 insn |= (1 << 23);
2cab6cc3
MS		 8755
8756 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8757 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8758
99059e56 8759 return bfd_reloc_ok;
2cab6cc3
MS		 8760 }
8761
dfc5f959 8762 case R_ARM_THM_XPC22:
c19d1205 8763 case R_ARM_THM_CALL:
bd97cb95 8764 case R_ARM_THM_JUMP24:
dfc5f959 8765 /* Thumb BL (branch long instruction). */
252b5132 8766 {
b34976b6 8767 bfd_vma relocation;
99059e56 8768 bfd_vma reloc_sign;
b34976b6
AM		 8769 bfd_boolean overflow = FALSE;
8770 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8771 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8772 bfd_signed_vma reloc_signed_max;
8773 bfd_signed_vma reloc_signed_min;
b34976b6 8774 bfd_vma check;
252b5132 8775 bfd_signed_vma signed_check;
e95de063 8776 int bitsize;
cd1dac3d 8777 const int thumb2 = using_thumb2 (globals);
252b5132 8778
5ab79981 8779 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8780 the next instruction unless a PLT entry will be created.
8781 The jump to the next instruction is optimized as a NOP.W for
8782 Thumb-2 enabled architectures. */
19540007 8783 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8784 && plt_offset == (bfd_vma) -1)
5ab79981 8785 {
cd1dac3d
DG		 8786 if (arch_has_thumb2_nop (globals))
8787 {
8788 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8789 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8790 }
8791 else
8792 {
8793 bfd_put_16 (input_bfd, 0xe000, hit_data);
8794 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8795 }
5ab79981
PB		 8796 return bfd_reloc_ok;
8797 }
8798
e95de063 8799 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
99059e56 8800 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8801 if (globals->use_rel)
8802 {
99059e56
RM		 8803 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8804 bfd_vma upper = upper_insn & 0x3ff;
8805 bfd_vma lower = lower_insn & 0x7ff;
e95de063
MS		 8806 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8807 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
99059e56
RM		 8808 bfd_vma i1 = j1 ^ s ? 0 : 1;
8809 bfd_vma i2 = j2 ^ s ? 0 : 1;
e95de063 8810
99059e56
RM		 8811 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8812 /* Sign extend. */
8813 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
e95de063 8814
4e7fd91e
PB		 8815 signed_addend = addend;
8816 }
cb1afa5c 8817
dfc5f959
NC		 8818 if (r_type == R_ARM_THM_XPC22)
8819 {
8820 /* Check for Thumb to Thumb call. */
8821 /* FIXME: Should we translate the instruction into a BL
8822 instruction instead ? */
35fc36a8 8823 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8824 (*_bfd_error_handler)
8825 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8826 input_bfd,
8827 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8828 }
8829 else
252b5132 8830 {
dfc5f959
NC		 8831 /* If it is not a call to Thumb, assume call to Arm.
8832 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8833 function call at all, but rather a long jump. Calls through
8834 the PLT do not require stubs. */
34e77a92 8835 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8836 {
bd97cb95 8837 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8838 {
8839 /* Convert BL to BLX. */
8840 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8841 }
155d87d7
CL		 8842 else if (( r_type != R_ARM_THM_CALL)
8843 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8844 {
8845 if (elf32_thumb_to_arm_stub
8846 (info, sym_name, input_bfd, output_bfd, input_section,
8847 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8848 error_message))
8849 return bfd_reloc_ok;
8850 else
8851 return bfd_reloc_dangerous;
8852 }
da5938a2 8853 }
35fc36a8
RS		 8854 else if (branch_type == ST_BRANCH_TO_THUMB
8855 && globals->use_blx
bd97cb95 8856 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8857 {
8858 /* Make sure this is a BL. */
8859 lower_insn |= 0x1800;
8860 }
252b5132 8861 }
f21f3fe0 8862
fe33d2fa 8863 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8864 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8865 {
8866 /* Check if a stub has to be inserted because the destination
8029a119 8867 is too far. */
fe33d2fa
CL		 8868 struct elf32_arm_stub_hash_entry *stub_entry;
8869 struct elf32_arm_link_hash_entry *hash;
8870
8871 hash = (struct elf32_arm_link_hash_entry *) h;
8872
8873 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8874 st_type, &branch_type,
8875 hash, value, sym_sec,
fe33d2fa
CL		 8876 input_bfd, sym_name);
8877
8878 if (stub_type != arm_stub_none)
906e58ca
NC		 8879 {
8880 /* The target is out of reach or we are changing modes, so
8881 redirect the branch to the local stub for this
8882 function. */
8883 stub_entry = elf32_arm_get_stub_entry (input_section,
8884 sym_sec, h,
fe33d2fa
CL		 8885 rel, globals,
8886 stub_type);
906e58ca 8887 if (stub_entry != NULL)
9cd3e4e5
NC		 8888 {
8889 value = (stub_entry->stub_offset
8890 + stub_entry->stub_sec->output_offset
8891 + stub_entry->stub_sec->output_section->vma);
8892
8893 if (plt_offset != (bfd_vma) -1)
8894 *unresolved_reloc_p = FALSE;
8895 }
906e58ca 8896
f4ac8484 8897 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8898 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8899 {
8900 if ((stub_entry
8901 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8902 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8903 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8904 }
906e58ca
NC		 8905 }
8906 }
8907
fe33d2fa 8908 /* Handle calls via the PLT. */
34e77a92 8909 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8910 {
8911 value = (splt->output_section->vma
8912 + splt->output_offset
34e77a92 8913 + plt_offset);
fe33d2fa
CL		 8914
8915 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8916 {
8917 /* If the Thumb BLX instruction is available, convert
8918 the BL to a BLX instruction to call the ARM-mode
8919 PLT entry. */
8920 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8921 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8922 }
8923 else
8924 {
8925 /* Target the Thumb stub before the ARM PLT entry. */
8926 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8927 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8928 }
8929 *unresolved_reloc_p = FALSE;
8930 }
8931
ba96a88f 8932 relocation = value + signed_addend;
f21f3fe0 8933
252b5132 8934 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8935 + input_section->output_offset
8936 + rel->r_offset);
9a5aca8c 8937
252b5132
RH		 8938 check = relocation >> howto->rightshift;
8939
8940 /* If this is a signed value, the rightshift just dropped
8941 leading 1 bits (assuming twos complement). */
8942 if ((bfd_signed_vma) relocation >= 0)
8943 signed_check = check;
8944 else
8945 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8946
e95de063
MS		 8947 /* Calculate the permissable maximum and minimum values for
8948 this relocation according to whether we're relocating for
8949 Thumb-2 or not. */
8950 bitsize = howto->bitsize;
8951 if (!thumb2)
8952 bitsize -= 2;
f6ebfac0 8953 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8954 reloc_signed_min = ~reloc_signed_max;
8955
252b5132 8956 /* Assumes two's complement. */
ba96a88f 8957 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8958 overflow = TRUE;
252b5132 8959
bd97cb95 8960 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8961 /* For a BLX instruction, make sure that the relocation is rounded up
8962 to a word boundary. This follows the semantics of the instruction
8963 which specifies that bit 1 of the target address will come from bit
8964 1 of the base address. */
8965 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8966
e95de063
MS		 8967 /* Put RELOCATION back into the insn. Assumes two's complement.
8968 We use the Thumb-2 encoding, which is safe even if dealing with
8969 a Thumb-1 instruction by virtue of our overflow check above. */
99059e56 8970 reloc_sign = (signed_check < 0) ? 1 : 0;
e95de063 8971 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
99059e56
RM		 8972 | ((relocation >> 12) & 0x3ff)
8973 | (reloc_sign << 10);
906e58ca 8974 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
99059e56
RM		 8975 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8976 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8977 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8978
252b5132
RH		 8979 /* Put the relocated value back in the object file: */
8980 bfd_put_16 (input_bfd, upper_insn, hit_data);
8981 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8982
8983 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8984 }
8985 break;
8986
c19d1205
ZW		 8987 case R_ARM_THM_JUMP19:
8988 /* Thumb32 conditional branch instruction. */
8989 {
8990 bfd_vma relocation;
8991 bfd_boolean overflow = FALSE;
8992 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8993 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8994 bfd_signed_vma reloc_signed_max = 0xffffe;
8995 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8996 bfd_signed_vma signed_check;
8997
8998 /* Need to refetch the addend, reconstruct the top three bits,
8999 and squish the two 11 bit pieces together. */
9000 if (globals->use_rel)
9001 {
9002 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 9003 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 9004 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9005 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9006 bfd_vma lower = (lower_insn & 0x07ff);
9007
a00a1f35
MS		 9008 upper |= J1 << 6;
9009 upper |= J2 << 7;
9010 upper |= (!S) << 8;
c19d1205
ZW		 9011 upper -= 0x0100; /* Sign extend. */
9012
9013 addend = (upper << 12) | (lower << 1);
9014 signed_addend = addend;
9015 }
9016
bd97cb95 9017 /* Handle calls via the PLT. */
34e77a92 9018 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 9019 {
9020 value = (splt->output_section->vma
9021 + splt->output_offset
34e77a92 9022 + plt_offset);
bd97cb95
DJ		 9023 /* Target the Thumb stub before the ARM PLT entry. */
9024 value -= PLT_THUMB_STUB_SIZE;
9025 *unresolved_reloc_p = FALSE;
9026 }
9027
c19d1205
ZW		 9028 /* ??? Should handle interworking? GCC might someday try to
9029 use this for tail calls. */
9030
99059e56 9031 relocation = value + signed_addend;
c19d1205
ZW		 9032 relocation -= (input_section->output_section->vma
9033 + input_section->output_offset
9034 + rel->r_offset);
a00a1f35 9035 signed_check = (bfd_signed_vma) relocation;
c19d1205 9036
c19d1205
ZW		 9037 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9038 overflow = TRUE;
9039
9040 /* Put RELOCATION back into the insn. */
9041 {
9042 bfd_vma S = (relocation & 0x00100000) >> 20;
9043 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9044 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9045 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9046 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9047
a00a1f35 9048 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9049 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9050 }
9051
9052 /* Put the relocated value back in the object file: */
9053 bfd_put_16 (input_bfd, upper_insn, hit_data);
9054 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9055
9056 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9057 }
9058
9059 case R_ARM_THM_JUMP11:
9060 case R_ARM_THM_JUMP8:
9061 case R_ARM_THM_JUMP6:
51c5503b
NC		 9062 /* Thumb B (branch) instruction). */
9063 {
6cf9e9fe 9064 bfd_signed_vma relocation;
51c5503b
NC		 9065 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9066 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9067 bfd_signed_vma signed_check;
9068
c19d1205
ZW		 9069 /* CZB cannot jump backward. */
9070 if (r_type == R_ARM_THM_JUMP6)
9071 reloc_signed_min = 0;
9072
4e7fd91e 9073 if (globals->use_rel)
6cf9e9fe 9074 {
4e7fd91e
PB		 9075 /* Need to refetch addend. */
9076 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9077 if (addend & ((howto->src_mask + 1) >> 1))
9078 {
9079 signed_addend = -1;
9080 signed_addend &= ~ howto->src_mask;
9081 signed_addend |= addend;
9082 }
9083 else
9084 signed_addend = addend;
9085 /* The value in the insn has been right shifted. We need to
9086 undo this, so that we can perform the address calculation
9087 in terms of bytes. */
9088 signed_addend <<= howto->rightshift;
6cf9e9fe 9089 }
6cf9e9fe 9090 relocation = value + signed_addend;
51c5503b
NC		 9091
9092 relocation -= (input_section->output_section->vma
9093 + input_section->output_offset
9094 + rel->r_offset);
9095
6cf9e9fe
NC		 9096 relocation >>= howto->rightshift;
9097 signed_check = relocation;
c19d1205
ZW		 9098
9099 if (r_type == R_ARM_THM_JUMP6)
9100 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9101 else
9102 relocation &= howto->dst_mask;
51c5503b 9103 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9104
51c5503b
NC		 9105 bfd_put_16 (input_bfd, relocation, hit_data);
9106
9107 /* Assumes two's complement. */
9108 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9109 return bfd_reloc_overflow;
9110
9111 return bfd_reloc_ok;
9112 }
cedb70c5 9113
8375c36b
PB		 9114 case R_ARM_ALU_PCREL7_0:
9115 case R_ARM_ALU_PCREL15_8:
9116 case R_ARM_ALU_PCREL23_15:
9117 {
9118 bfd_vma insn;
9119 bfd_vma relocation;
9120
9121 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9122 if (globals->use_rel)
9123 {
9124 /* Extract the addend. */
9125 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9126 signed_addend = addend;
9127 }
8375c36b
PB		 9128 relocation = value + signed_addend;
9129
9130 relocation -= (input_section->output_section->vma
9131 + input_section->output_offset
9132 + rel->r_offset);
9133 insn = (insn & ~0xfff)
9134 | ((howto->bitpos << 7) & 0xf00)
9135 | ((relocation >> howto->bitpos) & 0xff);
9136 bfd_put_32 (input_bfd, value, hit_data);
9137 }
9138 return bfd_reloc_ok;
9139
252b5132
RH		 9140 case R_ARM_GNU_VTINHERIT:
9141 case R_ARM_GNU_VTENTRY:
9142 return bfd_reloc_ok;
9143
c19d1205 9144 case R_ARM_GOTOFF32:
252b5132 9145 /* Relocation is relative to the start of the
99059e56 9146 global offset table. */
252b5132
RH		 9147
9148 BFD_ASSERT (sgot != NULL);
9149 if (sgot == NULL)
99059e56 9150 return bfd_reloc_notsupported;
9a5aca8c 9151
cedb70c5 9152 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9153 address by one, so that attempts to call the function pointer will
9154 correctly interpret it as Thumb code. */
35fc36a8 9155 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9156 value += 1;
9157
252b5132 9158 /* Note that sgot->output_offset is not involved in this
99059e56
RM		 9159 calculation. We always want the start of .got. If we
9160 define _GLOBAL_OFFSET_TABLE in a different way, as is
9161 permitted by the ABI, we might have to change this
9162 calculation. */
252b5132 9163 value -= sgot->output_section->vma;
f21f3fe0 9164 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9165 contents, rel->r_offset, value,
00a97672 9166 rel->r_addend);
252b5132
RH		 9167
9168 case R_ARM_GOTPC:
a7c10850 9169 /* Use global offset table as symbol value. */
252b5132 9170 BFD_ASSERT (sgot != NULL);
f21f3fe0 9171
252b5132 9172 if (sgot == NULL)
99059e56 9173 return bfd_reloc_notsupported;
252b5132 9174
0945cdfd 9175 *unresolved_reloc_p = FALSE;
252b5132 9176 value = sgot->output_section->vma;
f21f3fe0 9177 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9178 contents, rel->r_offset, value,
00a97672 9179 rel->r_addend);
f21f3fe0 9180
252b5132 9181 case R_ARM_GOT32:
eb043451 9182 case R_ARM_GOT_PREL:
252b5132 9183 /* Relocation is to the entry for this symbol in the
99059e56 9184 global offset table. */
252b5132
RH		 9185 if (sgot == NULL)
9186 return bfd_reloc_notsupported;
f21f3fe0 9187
34e77a92
RS		 9188 if (dynreloc_st_type == STT_GNU_IFUNC
9189 && plt_offset != (bfd_vma) -1
9190 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9191 {
9192 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9193 symbol, and the relocation resolves directly to the runtime
9194 target rather than to the .iplt entry. This means that any
9195 .got entry would be the same value as the .igot.plt entry,
9196 so there's no point creating both. */
9197 sgot = globals->root.igotplt;
9198 value = sgot->output_offset + gotplt_offset;
9199 }
9200 else if (h != NULL)
252b5132
RH		 9201 {
9202 bfd_vma off;
f21f3fe0 9203
252b5132
RH		 9204 off = h->got.offset;
9205 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9206 if ((off & 1) != 0)
252b5132 9207 {
b436d854
RS		 9208 /* We have already processsed one GOT relocation against
9209 this symbol. */
9210 off &= ~1;
9211 if (globals->root.dynamic_sections_created
9212 && !SYMBOL_REFERENCES_LOCAL (info, h))
9213 *unresolved_reloc_p = FALSE;
9214 }
9215 else
9216 {
9217 Elf_Internal_Rela outrel;
9218
6f820c85 9219 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 9220 {
9221 /* If the symbol doesn't resolve locally in a static
9222 object, we have an undefined reference. If the
9223 symbol doesn't resolve locally in a dynamic object,
9224 it should be resolved by the dynamic linker. */
9225 if (globals->root.dynamic_sections_created)
9226 {
9227 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9228 *unresolved_reloc_p = FALSE;
9229 }
9230 else
9231 outrel.r_info = 0;
9232 outrel.r_addend = 0;
9233 }
252b5132
RH		 9234 else
9235 {
34e77a92 9236 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9237 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
31943882
WN		 9238 else if (info->shared &&
9239 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9240 || h->root.type != bfd_link_hash_undefweak))
99059e56
RM		 9241 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9242 else
9243 outrel.r_info = 0;
34e77a92 9244 outrel.r_addend = dynreloc_value;
b436d854 9245 }
ee29b9fb 9246
b436d854
RS		 9247 /* The GOT entry is initialized to zero by default.
9248 See if we should install a different value. */
9249 if (outrel.r_addend != 0
9250 && (outrel.r_info == 0 || globals->use_rel))
9251 {
9252 bfd_put_32 (output_bfd, outrel.r_addend,
9253 sgot->contents + off);
9254 outrel.r_addend = 0;
252b5132 9255 }
f21f3fe0 9256
b436d854
RS		 9257 if (outrel.r_info != 0)
9258 {
9259 outrel.r_offset = (sgot->output_section->vma
9260 + sgot->output_offset
9261 + off);
9262 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9263 }
9264 h->got.offset |= 1;
9265 }
252b5132
RH		 9266 value = sgot->output_offset + off;
9267 }
9268 else
9269 {
9270 bfd_vma off;
f21f3fe0 9271
252b5132
RH		 9272 BFD_ASSERT (local_got_offsets != NULL &&
9273 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9274
252b5132 9275 off = local_got_offsets[r_symndx];
f21f3fe0 9276
252b5132
RH		 9277 /* The offset must always be a multiple of 4. We use the
9278 least significant bit to record whether we have already
9b485d32 9279 generated the necessary reloc. */
252b5132
RH		 9280 if ((off & 1) != 0)
9281 off &= ~1;
9282 else
9283 {
00a97672 9284 if (globals->use_rel)
34e77a92 9285 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9286
34e77a92 9287 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9288 {
947216bf 9289 Elf_Internal_Rela outrel;
f21f3fe0 9290
34e77a92 9291 outrel.r_addend = addend + dynreloc_value;
252b5132 9292 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9293 + sgot->output_offset
252b5132 9294 + off);
34e77a92 9295 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9296 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
34e77a92
RS		 9297 else
9298 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9299 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9300 }
f21f3fe0 9301
252b5132
RH		 9302 local_got_offsets[r_symndx] |= 1;
9303 }
f21f3fe0 9304
252b5132
RH		 9305 value = sgot->output_offset + off;
9306 }
eb043451
PB		 9307 if (r_type != R_ARM_GOT32)
9308 value += sgot->output_section->vma;
9a5aca8c 9309
f21f3fe0 9310 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9311 contents, rel->r_offset, value,
00a97672 9312 rel->r_addend);
f21f3fe0 9313
ba93b8ac
DJ		 9314 case R_ARM_TLS_LDO32:
9315 value = value - dtpoff_base (info);
9316
9317 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9318 contents, rel->r_offset, value,
9319 rel->r_addend);
ba93b8ac
DJ		 9320
9321 case R_ARM_TLS_LDM32:
9322 {
9323 bfd_vma off;
9324
362d30a1 9325 if (sgot == NULL)
ba93b8ac
DJ		 9326 abort ();
9327
9328 off = globals->tls_ldm_got.offset;
9329
9330 if ((off & 1) != 0)
9331 off &= ~1;
9332 else
9333 {
9334 /* If we don't know the module number, create a relocation
9335 for it. */
9336 if (info->shared)
9337 {
9338 Elf_Internal_Rela outrel;
ba93b8ac 9339
362d30a1 9340 if (srelgot == NULL)
ba93b8ac
DJ		 9341 abort ();
9342
00a97672 9343 outrel.r_addend = 0;
362d30a1
RS		 9344 outrel.r_offset = (sgot->output_section->vma
9345 + sgot->output_offset + off);
ba93b8ac
DJ		 9346 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9347
00a97672
RS		 9348 if (globals->use_rel)
9349 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9350 sgot->contents + off);
ba93b8ac 9351
47beaa6a 9352 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9353 }
9354 else
362d30a1 9355 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9356
9357 globals->tls_ldm_got.offset |= 1;
9358 }
9359
362d30a1 9360 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9361 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9362
9363 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9364 contents, rel->r_offset, value,
00a97672 9365 rel->r_addend);
ba93b8ac
DJ		 9366 }
9367
0855e32b
NS		 9368 case R_ARM_TLS_CALL:
9369 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9370 case R_ARM_TLS_GD32:
9371 case R_ARM_TLS_IE32:
0855e32b
NS		 9372 case R_ARM_TLS_GOTDESC:
9373 case R_ARM_TLS_DESCSEQ:
9374 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9375 {
0855e32b
NS		 9376 bfd_vma off, offplt;
9377 int indx = 0;
ba93b8ac
DJ		 9378 char tls_type;
9379
0855e32b 9380 BFD_ASSERT (sgot != NULL);
ba93b8ac 9381
ba93b8ac
DJ		 9382 if (h != NULL)
9383 {
9384 bfd_boolean dyn;
9385 dyn = globals->root.dynamic_sections_created;
9386 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9387 && (!info->shared
9388 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9389 {
9390 *unresolved_reloc_p = FALSE;
9391 indx = h->dynindx;
9392 }
9393 off = h->got.offset;
0855e32b 9394 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9395 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9396 }
9397 else
9398 {
0855e32b 9399 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9400 off = local_got_offsets[r_symndx];
0855e32b 9401 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9402 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9403 }
9404
0855e32b 9405 /* Linker relaxations happens from one of the
b38cadfb 9406 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9407 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9408 tls_type = GOT_TLS_IE;
0855e32b
NS		 9409
9410 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9411
9412 if ((off & 1) != 0)
9413 off &= ~1;
9414 else
9415 {
9416 bfd_boolean need_relocs = FALSE;
9417 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9418 int cur_off = off;
9419
9420 /* The GOT entries have not been initialized yet. Do it
9421 now, and emit any relocations. If both an IE GOT and a
9422 GD GOT are necessary, we emit the GD first. */
9423
9424 if ((info->shared || indx != 0)
9425 && (h == NULL
9426 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9427 || h->root.type != bfd_link_hash_undefweak))
9428 {
9429 need_relocs = TRUE;
0855e32b 9430 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9431 }
9432
0855e32b
NS		 9433 if (tls_type & GOT_TLS_GDESC)
9434 {
47beaa6a
RS		 9435 bfd_byte *loc;
9436
0855e32b
NS		 9437 /* We should have relaxed, unless this is an undefined
9438 weak symbol. */
9439 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9440 || info->shared);
9441 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
99059e56 9442 <= globals->root.sgotplt->size);
0855e32b
NS		 9443
9444 outrel.r_addend = 0;
9445 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9446 + globals->root.sgotplt->output_offset
9447 + offplt
9448 + globals->sgotplt_jump_table_size);
b38cadfb 9449
0855e32b
NS		 9450 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9451 sreloc = globals->root.srelplt;
9452 loc = sreloc->contents;
9453 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9454 BFD_ASSERT (loc + RELOC_SIZE (globals)
99059e56 9455 <= sreloc->contents + sreloc->size);
0855e32b
NS		 9456
9457 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9458
9459 /* For globals, the first word in the relocation gets
9460 the relocation index and the top bit set, or zero,
9461 if we're binding now. For locals, it gets the
9462 symbol's offset in the tls section. */
99059e56 9463 bfd_put_32 (output_bfd,
0855e32b
NS		 9464 !h ? value - elf_hash_table (info)->tls_sec->vma
9465 : info->flags & DF_BIND_NOW ? 0
9466 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9467 globals->root.sgotplt->contents + offplt
9468 + globals->sgotplt_jump_table_size);
9469
0855e32b 9470 /* Second word in the relocation is always zero. */
99059e56 9471 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9472 globals->root.sgotplt->contents + offplt
9473 + globals->sgotplt_jump_table_size + 4);
0855e32b 9474 }
ba93b8ac
DJ		 9475 if (tls_type & GOT_TLS_GD)
9476 {
9477 if (need_relocs)
9478 {
00a97672 9479 outrel.r_addend = 0;
362d30a1
RS		 9480 outrel.r_offset = (sgot->output_section->vma
9481 + sgot->output_offset
00a97672 9482 + cur_off);
ba93b8ac 9483 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9484
00a97672
RS		 9485 if (globals->use_rel)
9486 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9487 sgot->contents + cur_off);
00a97672 9488
47beaa6a 9489 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9490
9491 if (indx == 0)
9492 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9493 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9494 else
9495 {
00a97672 9496 outrel.r_addend = 0;
ba93b8ac
DJ		 9497 outrel.r_info = ELF32_R_INFO (indx,
9498 R_ARM_TLS_DTPOFF32);
9499 outrel.r_offset += 4;
00a97672
RS		 9500
9501 if (globals->use_rel)
9502 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9503 sgot->contents + cur_off + 4);
00a97672 9504
47beaa6a
RS		 9505 elf32_arm_add_dynreloc (output_bfd, info,
9506 srelgot, &outrel);
ba93b8ac
DJ		 9507 }
9508 }
9509 else
9510 {
9511 /* If we are not emitting relocations for a
9512 general dynamic reference, then we must be in a
9513 static link or an executable link with the
9514 symbol binding locally. Mark it as belonging
9515 to module 1, the executable. */
9516 bfd_put_32 (output_bfd, 1,
362d30a1 9517 sgot->contents + cur_off);
ba93b8ac 9518 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9519 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9520 }
9521
9522 cur_off += 8;
9523 }
9524
9525 if (tls_type & GOT_TLS_IE)
9526 {
9527 if (need_relocs)
9528 {
00a97672
RS		 9529 if (indx == 0)
9530 outrel.r_addend = value - dtpoff_base (info);
9531 else
9532 outrel.r_addend = 0;
362d30a1
RS		 9533 outrel.r_offset = (sgot->output_section->vma
9534 + sgot->output_offset
ba93b8ac
DJ		 9535 + cur_off);
9536 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9537
00a97672
RS		 9538 if (globals->use_rel)
9539 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9540 sgot->contents + cur_off);
ba93b8ac 9541
47beaa6a 9542 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9543 }
9544 else
9545 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9546 sgot->contents + cur_off);
ba93b8ac
DJ		 9547 cur_off += 4;
9548 }
9549
9550 if (h != NULL)
9551 h->got.offset |= 1;
9552 else
9553 local_got_offsets[r_symndx] |= 1;
9554 }
9555
9556 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9557 off += 8;
0855e32b
NS		 9558 else if (tls_type & GOT_TLS_GDESC)
9559 off = offplt;
9560
9561 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9562 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9563 {
9564 bfd_signed_vma offset;
12352d3f
PB		 9565 /* TLS stubs are arm mode. The original symbol is a
9566 data object, so branch_type is bogus. */
9567 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9568 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9569 = arm_type_of_stub (info, input_section, rel,
9570 st_type, &branch_type,
0855e32b
NS		 9571 (struct elf32_arm_link_hash_entry *)h,
9572 globals->tls_trampoline, globals->root.splt,
9573 input_bfd, sym_name);
9574
9575 if (stub_type != arm_stub_none)
9576 {
9577 struct elf32_arm_stub_hash_entry *stub_entry
9578 = elf32_arm_get_stub_entry
9579 (input_section, globals->root.splt, 0, rel,
9580 globals, stub_type);
9581 offset = (stub_entry->stub_offset
9582 + stub_entry->stub_sec->output_offset
9583 + stub_entry->stub_sec->output_section->vma);
9584 }
9585 else
9586 offset = (globals->root.splt->output_section->vma
9587 + globals->root.splt->output_offset
9588 + globals->tls_trampoline);
9589
9590 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9591 {
9592 unsigned long inst;
b38cadfb
NC		 9593
9594 offset -= (input_section->output_section->vma
9595 + input_section->output_offset
9596 + rel->r_offset + 8);
0855e32b
NS		 9597
9598 inst = offset >> 2;
9599 inst &= 0x00ffffff;
9600 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9601 }
9602 else
9603 {
9604 /* Thumb blx encodes the offset in a complicated
9605 fashion. */
9606 unsigned upper_insn, lower_insn;
9607 unsigned neg;
9608
b38cadfb
NC		 9609 offset -= (input_section->output_section->vma
9610 + input_section->output_offset
0855e32b 9611 + rel->r_offset + 4);
b38cadfb 9612
12352d3f
PB		 9613 if (stub_type != arm_stub_none
9614 && arm_stub_is_thumb (stub_type))
9615 {
9616 lower_insn = 0xd000;
9617 }
9618 else
9619 {
9620 lower_insn = 0xc000;
9621 /* Round up the offset to a word boundary */
9622 offset = (offset + 2) & ~2;
9623 }
9624
0855e32b
NS		 9625 neg = offset < 0;
9626 upper_insn = (0xf000
9627 | ((offset >> 12) & 0x3ff)
9628 | (neg << 10));
12352d3f 9629 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9630 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9631 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9632 bfd_put_16 (input_bfd, upper_insn, hit_data);
9633 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9634 return bfd_reloc_ok;
9635 }
9636 }
9637 /* These relocations needs special care, as besides the fact
9638 they point somewhere in .gotplt, the addend must be
9639 adjusted accordingly depending on the type of instruction
9640 we refer to */
9641 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9642 {
9643 unsigned long data, insn;
9644 unsigned thumb;
b38cadfb 9645
0855e32b
NS		 9646 data = bfd_get_32 (input_bfd, hit_data);
9647 thumb = data & 1;
9648 data &= ~1u;
b38cadfb 9649
0855e32b
NS		 9650 if (thumb)
9651 {
9652 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9653 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9654 insn = (insn << 16)
9655 | bfd_get_16 (input_bfd,
9656 contents + rel->r_offset - data + 2);
9657 if ((insn & 0xf800c000) == 0xf000c000)
9658 /* bl/blx */
9659 value = -6;
9660 else if ((insn & 0xffffff00) == 0x4400)
9661 /* add */
9662 value = -5;
9663 else
9664 {
9665 (*_bfd_error_handler)
9666 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9667 input_bfd, input_section,
9668 (unsigned long)rel->r_offset, insn);
9669 return bfd_reloc_notsupported;
9670 }
9671 }
9672 else
9673 {
9674 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9675
9676 switch (insn >> 24)
9677 {
9678 case 0xeb: /* bl */
9679 case 0xfa: /* blx */
9680 value = -4;
9681 break;
9682
9683 case 0xe0: /* add */
9684 value = -8;
9685 break;
b38cadfb 9686
0855e32b
NS		 9687 default:
9688 (*_bfd_error_handler)
9689 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9690 input_bfd, input_section,
9691 (unsigned long)rel->r_offset, insn);
9692 return bfd_reloc_notsupported;
9693 }
9694 }
b38cadfb 9695
0855e32b
NS		 9696 value += ((globals->root.sgotplt->output_section->vma
9697 + globals->root.sgotplt->output_offset + off)
9698 - (input_section->output_section->vma
9699 + input_section->output_offset
9700 + rel->r_offset)
9701 + globals->sgotplt_jump_table_size);
9702 }
9703 else
9704 value = ((globals->root.sgot->output_section->vma
9705 + globals->root.sgot->output_offset + off)
9706 - (input_section->output_section->vma
9707 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9708
9709 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9710 contents, rel->r_offset, value,
00a97672 9711 rel->r_addend);
ba93b8ac
DJ		 9712 }
9713
9714 case R_ARM_TLS_LE32:
9ec0c936 9715 if (info->shared && !info->pie)
ba93b8ac
DJ		 9716 {
9717 (*_bfd_error_handler)
9718 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9719 input_bfd, input_section,
9720 (long) rel->r_offset, howto->name);
46691134 9721 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9722 }
9723 else
9724 value = tpoff (info, value);
906e58ca 9725
ba93b8ac 9726 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9727 contents, rel->r_offset, value,
9728 rel->r_addend);
ba93b8ac 9729
319850b4
JB		 9730 case R_ARM_V4BX:
9731 if (globals->fix_v4bx)
845b51d6
PB		 9732 {
9733 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9734
845b51d6
PB		 9735 /* Ensure that we have a BX instruction. */
9736 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9737
845b51d6
PB		 9738 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9739 {
9740 /* Branch to veneer. */
9741 bfd_vma glue_addr;
9742 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9743 glue_addr -= input_section->output_section->vma
9744 + input_section->output_offset
9745 + rel->r_offset + 8;
9746 insn = (insn & 0xf0000000) | 0x0a000000
9747 | ((glue_addr >> 2) & 0x00ffffff);
9748 }
9749 else
9750 {
9751 /* Preserve Rm (lowest four bits) and the condition code
9752 (highest four bits). Other bits encode MOV PC,Rm. */
9753 insn = (insn & 0xf000000f) | 0x01a0f000;
9754 }
319850b4 9755
845b51d6
PB		 9756 bfd_put_32 (input_bfd, insn, hit_data);
9757 }
319850b4
JB		 9758 return bfd_reloc_ok;
9759
b6895b4f
PB		 9760 case R_ARM_MOVW_ABS_NC:
9761 case R_ARM_MOVT_ABS:
9762 case R_ARM_MOVW_PREL_NC:
9763 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9764 /* Until we properly support segment-base-relative addressing then
9765 we assume the segment base to be zero, as for the group relocations.
9766 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9767 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9768 case R_ARM_MOVW_BREL_NC:
9769 case R_ARM_MOVW_BREL:
9770 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9771 {
9772 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9773
9774 if (globals->use_rel)
9775 {
9776 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9777 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9778 }
92f5d02b 9779
b6895b4f 9780 value += signed_addend;
b6895b4f
PB		 9781
9782 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9783 value -= (input_section->output_section->vma
9784 + input_section->output_offset + rel->r_offset);
9785
92f5d02b 9786 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
99059e56 9787 return bfd_reloc_overflow;
92f5d02b 9788
35fc36a8 9789 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9790 value |= 1;
9791
9792 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
99059e56 9793 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9794 value >>= 16;
9795
9796 insn &= 0xfff0f000;
9797 insn |= value & 0xfff;
9798 insn |= (value & 0xf000) << 4;
9799 bfd_put_32 (input_bfd, insn, hit_data);
9800 }
9801 return bfd_reloc_ok;
9802
9803 case R_ARM_THM_MOVW_ABS_NC:
9804 case R_ARM_THM_MOVT_ABS:
9805 case R_ARM_THM_MOVW_PREL_NC:
9806 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9807 /* Until we properly support segment-base-relative addressing then
9808 we assume the segment base to be zero, as for the above relocations.
9809 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9810 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9811 as R_ARM_THM_MOVT_ABS. */
9812 case R_ARM_THM_MOVW_BREL_NC:
9813 case R_ARM_THM_MOVW_BREL:
9814 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9815 {
9816 bfd_vma insn;
906e58ca 9817
b6895b4f
PB		 9818 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9819 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9820
9821 if (globals->use_rel)
9822 {
9823 addend = ((insn >> 4) & 0xf000)
9824 | ((insn >> 15) & 0x0800)
9825 | ((insn >> 4) & 0x0700)
9826 | (insn & 0x00ff);
39623e12 9827 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9828 }
92f5d02b 9829
b6895b4f 9830 value += signed_addend;
b6895b4f
PB		 9831
9832 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9833 value -= (input_section->output_section->vma
9834 + input_section->output_offset + rel->r_offset);
9835
92f5d02b 9836 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
99059e56 9837 return bfd_reloc_overflow;
92f5d02b 9838
35fc36a8 9839 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9840 value |= 1;
9841
9842 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
99059e56 9843 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9844 value >>= 16;
9845
9846 insn &= 0xfbf08f00;
9847 insn |= (value & 0xf000) << 4;
9848 insn |= (value & 0x0800) << 15;
9849 insn |= (value & 0x0700) << 4;
9850 insn |= (value & 0x00ff);
9851
9852 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9853 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9854 }
9855 return bfd_reloc_ok;
9856
4962c51a
MS		 9857 case R_ARM_ALU_PC_G0_NC:
9858 case R_ARM_ALU_PC_G1_NC:
9859 case R_ARM_ALU_PC_G0:
9860 case R_ARM_ALU_PC_G1:
9861 case R_ARM_ALU_PC_G2:
9862 case R_ARM_ALU_SB_G0_NC:
9863 case R_ARM_ALU_SB_G1_NC:
9864 case R_ARM_ALU_SB_G0:
9865 case R_ARM_ALU_SB_G1:
9866 case R_ARM_ALU_SB_G2:
9867 {
9868 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 9869 bfd_vma pc = input_section->output_section->vma
4962c51a 9870 + input_section->output_offset + rel->r_offset;
31a91d61 9871 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 9872 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56
RM		 9873 bfd_vma residual;
9874 bfd_vma g_n;
4962c51a 9875 bfd_signed_vma signed_value;
99059e56
RM		 9876 int group = 0;
9877
9878 /* Determine which group of bits to select. */
9879 switch (r_type)
9880 {
9881 case R_ARM_ALU_PC_G0_NC:
9882 case R_ARM_ALU_PC_G0:
9883 case R_ARM_ALU_SB_G0_NC:
9884 case R_ARM_ALU_SB_G0:
9885 group = 0;
9886 break;
9887
9888 case R_ARM_ALU_PC_G1_NC:
9889 case R_ARM_ALU_PC_G1:
9890 case R_ARM_ALU_SB_G1_NC:
9891 case R_ARM_ALU_SB_G1:
9892 group = 1;
9893 break;
9894
9895 case R_ARM_ALU_PC_G2:
9896 case R_ARM_ALU_SB_G2:
9897 group = 2;
9898 break;
9899
9900 default:
9901 abort ();
9902 }
9903
9904 /* If REL, extract the addend from the insn. If RELA, it will
9905 have already been fetched for us. */
4962c51a 9906 if (globals->use_rel)
99059e56
RM		 9907 {
9908 int negative;
9909 bfd_vma constant = insn & 0xff;
9910 bfd_vma rotation = (insn & 0xf00) >> 8;
9911
9912 if (rotation == 0)
9913 signed_addend = constant;
9914 else
9915 {
9916 /* Compensate for the fact that in the instruction, the
9917 rotation is stored in multiples of 2 bits. */
9918 rotation *= 2;
9919
9920 /* Rotate "constant" right by "rotation" bits. */
9921 signed_addend = (constant >> rotation) |
9922 (constant << (8 * sizeof (bfd_vma) - rotation));
9923 }
9924
9925 /* Determine if the instruction is an ADD or a SUB.
9926 (For REL, this determines the sign of the addend.) */
9927 negative = identify_add_or_sub (insn);
9928 if (negative == 0)
9929 {
9930 (*_bfd_error_handler)
9931 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9932 input_bfd, input_section,
9933 (long) rel->r_offset, howto->name);
9934 return bfd_reloc_overflow;
9935 }
9936
9937 signed_addend *= negative;
9938 }
4962c51a
MS		 9939
9940 /* Compute the value (X) to go in the place. */
99059e56
RM		 9941 if (r_type == R_ARM_ALU_PC_G0_NC
9942 || r_type == R_ARM_ALU_PC_G1_NC
9943 || r_type == R_ARM_ALU_PC_G0
9944 || r_type == R_ARM_ALU_PC_G1
9945 || r_type == R_ARM_ALU_PC_G2)
9946 /* PC relative. */
9947 signed_value = value - pc + signed_addend;
9948 else
9949 /* Section base relative. */
9950 signed_value = value - sb + signed_addend;
9951
9952 /* If the target symbol is a Thumb function, then set the
9953 Thumb bit in the address. */
35fc36a8 9954 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9955 signed_value |= 1;
9956
99059e56
RM		 9957 /* Calculate the value of the relevant G_n, in encoded
9958 constant-with-rotation format. */
9959 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9960 &residual);
9961
9962 /* Check for overflow if required. */
9963 if ((r_type == R_ARM_ALU_PC_G0
9964 || r_type == R_ARM_ALU_PC_G1
9965 || r_type == R_ARM_ALU_PC_G2
9966 || r_type == R_ARM_ALU_SB_G0
9967 || r_type == R_ARM_ALU_SB_G1
9968 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9969 {
9970 (*_bfd_error_handler)
9971 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9972 input_bfd, input_section,
9973 (long) rel->r_offset, abs (signed_value), howto->name);
9974 return bfd_reloc_overflow;
9975 }
9976
9977 /* Mask out the value and the ADD/SUB part of the opcode; take care
9978 not to destroy the S bit. */
9979 insn &= 0xff1ff000;
9980
9981 /* Set the opcode according to whether the value to go in the
9982 place is negative. */
9983 if (signed_value < 0)
9984 insn |= 1 << 22;
9985 else
9986 insn |= 1 << 23;
9987
9988 /* Encode the offset. */
9989 insn |= g_n;
4962c51a
MS		 9990
9991 bfd_put_32 (input_bfd, insn, hit_data);
9992 }
9993 return bfd_reloc_ok;
9994
9995 case R_ARM_LDR_PC_G0:
9996 case R_ARM_LDR_PC_G1:
9997 case R_ARM_LDR_PC_G2:
9998 case R_ARM_LDR_SB_G0:
9999 case R_ARM_LDR_SB_G1:
10000 case R_ARM_LDR_SB_G2:
10001 {
10002 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10003 bfd_vma pc = input_section->output_section->vma
4962c51a 10004 + input_section->output_offset + rel->r_offset;
31a91d61 10005 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10006 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10007 bfd_vma residual;
4962c51a 10008 bfd_signed_vma signed_value;
99059e56
RM		 10009 int group = 0;
10010
10011 /* Determine which groups of bits to calculate. */
10012 switch (r_type)
10013 {
10014 case R_ARM_LDR_PC_G0:
10015 case R_ARM_LDR_SB_G0:
10016 group = 0;
10017 break;
10018
10019 case R_ARM_LDR_PC_G1:
10020 case R_ARM_LDR_SB_G1:
10021 group = 1;
10022 break;
10023
10024 case R_ARM_LDR_PC_G2:
10025 case R_ARM_LDR_SB_G2:
10026 group = 2;
10027 break;
10028
10029 default:
10030 abort ();
10031 }
10032
10033 /* If REL, extract the addend from the insn. If RELA, it will
10034 have already been fetched for us. */
4962c51a 10035 if (globals->use_rel)
99059e56
RM		 10036 {
10037 int negative = (insn & (1 << 23)) ? 1 : -1;
10038 signed_addend = negative * (insn & 0xfff);
10039 }
4962c51a
MS		 10040
10041 /* Compute the value (X) to go in the place. */
99059e56
RM		 10042 if (r_type == R_ARM_LDR_PC_G0
10043 || r_type == R_ARM_LDR_PC_G1
10044 || r_type == R_ARM_LDR_PC_G2)
10045 /* PC relative. */
10046 signed_value = value - pc + signed_addend;
10047 else
10048 /* Section base relative. */
10049 signed_value = value - sb + signed_addend;
10050
10051 /* Calculate the value of the relevant G_{n-1} to obtain
10052 the residual at that stage. */
10053 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10054
10055 /* Check for overflow. */
10056 if (residual >= 0x1000)
10057 {
10058 (*_bfd_error_handler)
10059 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10060 input_bfd, input_section,
10061 (long) rel->r_offset, abs (signed_value), howto->name);
10062 return bfd_reloc_overflow;
10063 }
10064
10065 /* Mask out the value and U bit. */
10066 insn &= 0xff7ff000;
10067
10068 /* Set the U bit if the value to go in the place is non-negative. */
10069 if (signed_value >= 0)
10070 insn |= 1 << 23;
10071
10072 /* Encode the offset. */
10073 insn |= residual;
4962c51a
MS		 10074
10075 bfd_put_32 (input_bfd, insn, hit_data);
10076 }
10077 return bfd_reloc_ok;
10078
10079 case R_ARM_LDRS_PC_G0:
10080 case R_ARM_LDRS_PC_G1:
10081 case R_ARM_LDRS_PC_G2:
10082 case R_ARM_LDRS_SB_G0:
10083 case R_ARM_LDRS_SB_G1:
10084 case R_ARM_LDRS_SB_G2:
10085 {
10086 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10087 bfd_vma pc = input_section->output_section->vma
4962c51a 10088 + input_section->output_offset + rel->r_offset;
31a91d61 10089 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10090 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10091 bfd_vma residual;
4962c51a 10092 bfd_signed_vma signed_value;
99059e56
RM		 10093 int group = 0;
10094
10095 /* Determine which groups of bits to calculate. */
10096 switch (r_type)
10097 {
10098 case R_ARM_LDRS_PC_G0:
10099 case R_ARM_LDRS_SB_G0:
10100 group = 0;
10101 break;
10102
10103 case R_ARM_LDRS_PC_G1:
10104 case R_ARM_LDRS_SB_G1:
10105 group = 1;
10106 break;
10107
10108 case R_ARM_LDRS_PC_G2:
10109 case R_ARM_LDRS_SB_G2:
10110 group = 2;
10111 break;
10112
10113 default:
10114 abort ();
10115 }
10116
10117 /* If REL, extract the addend from the insn. If RELA, it will
10118 have already been fetched for us. */
4962c51a 10119 if (globals->use_rel)
99059e56
RM		 10120 {
10121 int negative = (insn & (1 << 23)) ? 1 : -1;
10122 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10123 }
4962c51a
MS		 10124
10125 /* Compute the value (X) to go in the place. */
99059e56
RM		 10126 if (r_type == R_ARM_LDRS_PC_G0
10127 || r_type == R_ARM_LDRS_PC_G1
10128 || r_type == R_ARM_LDRS_PC_G2)
10129 /* PC relative. */
10130 signed_value = value - pc + signed_addend;
10131 else
10132 /* Section base relative. */
10133 signed_value = value - sb + signed_addend;
10134
10135 /* Calculate the value of the relevant G_{n-1} to obtain
10136 the residual at that stage. */
10137 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10138
10139 /* Check for overflow. */
10140 if (residual >= 0x100)
10141 {
10142 (*_bfd_error_handler)
10143 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10144 input_bfd, input_section,
10145 (long) rel->r_offset, abs (signed_value), howto->name);
10146 return bfd_reloc_overflow;
10147 }
10148
10149 /* Mask out the value and U bit. */
10150 insn &= 0xff7ff0f0;
10151
10152 /* Set the U bit if the value to go in the place is non-negative. */
10153 if (signed_value >= 0)
10154 insn |= 1 << 23;
10155
10156 /* Encode the offset. */
10157 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
4962c51a
MS		 10158
10159 bfd_put_32 (input_bfd, insn, hit_data);
10160 }
10161 return bfd_reloc_ok;
10162
10163 case R_ARM_LDC_PC_G0:
10164 case R_ARM_LDC_PC_G1:
10165 case R_ARM_LDC_PC_G2:
10166 case R_ARM_LDC_SB_G0:
10167 case R_ARM_LDC_SB_G1:
10168 case R_ARM_LDC_SB_G2:
10169 {
10170 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10171 bfd_vma pc = input_section->output_section->vma
4962c51a 10172 + input_section->output_offset + rel->r_offset;
31a91d61 10173 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10174 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10175 bfd_vma residual;
4962c51a 10176 bfd_signed_vma signed_value;
99059e56
RM		 10177 int group = 0;
10178
10179 /* Determine which groups of bits to calculate. */
10180 switch (r_type)
10181 {
10182 case R_ARM_LDC_PC_G0:
10183 case R_ARM_LDC_SB_G0:
10184 group = 0;
10185 break;
10186
10187 case R_ARM_LDC_PC_G1:
10188 case R_ARM_LDC_SB_G1:
10189 group = 1;
10190 break;
10191
10192 case R_ARM_LDC_PC_G2:
10193 case R_ARM_LDC_SB_G2:
10194 group = 2;
10195 break;
10196
10197 default:
10198 abort ();
10199 }
10200
10201 /* If REL, extract the addend from the insn. If RELA, it will
10202 have already been fetched for us. */
4962c51a 10203 if (globals->use_rel)
99059e56
RM		 10204 {
10205 int negative = (insn & (1 << 23)) ? 1 : -1;
10206 signed_addend = negative * ((insn & 0xff) << 2);
10207 }
4962c51a
MS		 10208
10209 /* Compute the value (X) to go in the place. */
99059e56
RM		 10210 if (r_type == R_ARM_LDC_PC_G0
10211 || r_type == R_ARM_LDC_PC_G1
10212 || r_type == R_ARM_LDC_PC_G2)
10213 /* PC relative. */
10214 signed_value = value - pc + signed_addend;
10215 else
10216 /* Section base relative. */
10217 signed_value = value - sb + signed_addend;
10218
10219 /* Calculate the value of the relevant G_{n-1} to obtain
10220 the residual at that stage. */
10221 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10222
10223 /* Check for overflow. (The absolute value to go in the place must be
10224 divisible by four and, after having been divided by four, must
10225 fit in eight bits.) */
10226 if ((residual & 0x3) != 0 || residual >= 0x400)
10227 {
10228 (*_bfd_error_handler)
10229 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10230 input_bfd, input_section,
10231 (long) rel->r_offset, abs (signed_value), howto->name);
10232 return bfd_reloc_overflow;
10233 }
10234
10235 /* Mask out the value and U bit. */
10236 insn &= 0xff7fff00;
10237
10238 /* Set the U bit if the value to go in the place is non-negative. */
10239 if (signed_value >= 0)
10240 insn |= 1 << 23;
10241
10242 /* Encode the offset. */
10243 insn |= residual >> 2;
4962c51a
MS		 10244
10245 bfd_put_32 (input_bfd, insn, hit_data);
10246 }
10247 return bfd_reloc_ok;
10248
252b5132
RH		 10249 default:
10250 return bfd_reloc_notsupported;
10251 }
10252}
10253
98c1d4aa
NC		 10254/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10255static void
57e8b36a
NC		 10256arm_add_to_rel (bfd * abfd,
10257 bfd_byte * address,
10258 reloc_howto_type * howto,
10259 bfd_signed_vma increment)
98c1d4aa 10260{
98c1d4aa
NC		 10261 bfd_signed_vma addend;
10262
bd97cb95
DJ		 10263 if (howto->type == R_ARM_THM_CALL
10264 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10265 {
9a5aca8c
AM		 10266 int upper_insn, lower_insn;
10267 int upper, lower;
98c1d4aa 10268
9a5aca8c
AM		 10269 upper_insn = bfd_get_16 (abfd, address);
10270 lower_insn = bfd_get_16 (abfd, address + 2);
10271 upper = upper_insn & 0x7ff;
10272 lower = lower_insn & 0x7ff;
10273
10274 addend = (upper << 12) | (lower << 1);
ddda4409 10275 addend += increment;
9a5aca8c 10276 addend >>= 1;
98c1d4aa 10277
9a5aca8c
AM		 10278 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10279 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10280
dc810e39
AM		 10281 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10282 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10283 }
10284 else
10285 {
10286 bfd_vma contents;
10287
10288 contents = bfd_get_32 (abfd, address);
10289
10290 /* Get the (signed) value from the instruction. */
10291 addend = contents & howto->src_mask;
10292 if (addend & ((howto->src_mask + 1) >> 1))
10293 {
10294 bfd_signed_vma mask;
10295
10296 mask = -1;
10297 mask &= ~ howto->src_mask;
10298 addend |= mask;
10299 }
10300
10301 /* Add in the increment, (which is a byte value). */
10302 switch (howto->type)
10303 {
10304 default:
10305 addend += increment;
10306 break;
10307
10308 case R_ARM_PC24:
c6596c5e 10309 case R_ARM_PLT32:
5b5bb741
PB		 10310 case R_ARM_CALL:
10311 case R_ARM_JUMP24:
9a5aca8c 10312 addend <<= howto->size;
dc810e39 10313 addend += increment;
9a5aca8c
AM		 10314
10315 /* Should we check for overflow here ? */
10316
10317 /* Drop any undesired bits. */
10318 addend >>= howto->rightshift;
10319 break;
10320 }
10321
10322 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10323
10324 bfd_put_32 (abfd, contents, address);
ddda4409 10325 }
98c1d4aa 10326}
252b5132 10327
ba93b8ac
DJ		 10328#define IS_ARM_TLS_RELOC(R_TYPE) \
10329 ((R_TYPE) == R_ARM_TLS_GD32 \
10330 || (R_TYPE) == R_ARM_TLS_LDO32 \
10331 || (R_TYPE) == R_ARM_TLS_LDM32 \
10332 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10333 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10334 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10335 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10336 || (R_TYPE) == R_ARM_TLS_IE32 \
10337 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10338
10339/* Specific set of relocations for the gnu tls dialect. */
10340#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10341 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10342 || (R_TYPE) == R_ARM_TLS_CALL \
10343 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10344 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10345 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10346
252b5132 10347/* Relocate an ARM ELF section. */
906e58ca 10348
b34976b6 10349static bfd_boolean
57e8b36a
NC		 10350elf32_arm_relocate_section (bfd * output_bfd,
10351 struct bfd_link_info * info,
10352 bfd * input_bfd,
10353 asection * input_section,
10354 bfd_byte * contents,
10355 Elf_Internal_Rela * relocs,
10356 Elf_Internal_Sym * local_syms,
10357 asection ** local_sections)
252b5132 10358{
b34976b6
AM		 10359 Elf_Internal_Shdr *symtab_hdr;
10360 struct elf_link_hash_entry **sym_hashes;
10361 Elf_Internal_Rela *rel;
10362 Elf_Internal_Rela *relend;
10363 const char *name;
b32d3aa2 10364 struct elf32_arm_link_hash_table * globals;
252b5132 10365
4e7fd91e 10366 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10367 if (globals == NULL)
10368 return FALSE;
b491616a 10369
0ffa91dd 10370 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10371 sym_hashes = elf_sym_hashes (input_bfd);
10372
10373 rel = relocs;
10374 relend = relocs + input_section->reloc_count;
10375 for (; rel < relend; rel++)
10376 {
ba96a88f
NC		 10377 int r_type;
10378 reloc_howto_type * howto;
10379 unsigned long r_symndx;
10380 Elf_Internal_Sym * sym;
10381 asection * sec;
252b5132 10382 struct elf_link_hash_entry * h;
ba96a88f
NC		 10383 bfd_vma relocation;
10384 bfd_reloc_status_type r;
10385 arelent bfd_reloc;
ba93b8ac 10386 char sym_type;
0945cdfd 10387 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10388 char *error_message = NULL;
f21f3fe0 10389
252b5132 10390 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10391 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10392 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10393
ba96a88f 10394 if ( r_type == R_ARM_GNU_VTENTRY
99059e56
RM		 10395 || r_type == R_ARM_GNU_VTINHERIT)
10396 continue;
252b5132 10397
b32d3aa2 10398 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10399 howto = bfd_reloc.howto;
252b5132 10400
252b5132
RH		 10401 h = NULL;
10402 sym = NULL;
10403 sec = NULL;
9b485d32 10404
252b5132
RH		 10405 if (r_symndx < symtab_hdr->sh_info)
10406 {
10407 sym = local_syms + r_symndx;
ba93b8ac 10408 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10409 sec = local_sections[r_symndx];
ffcb4889
NS		 10410
10411 /* An object file might have a reference to a local
10412 undefined symbol. This is a daft object file, but we
10413 should at least do something about it. V4BX & NONE
10414 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10415 allowed to use the undefined symbol, so allow those.
10416 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10417 if (r_type != R_ARM_V4BX
10418 && r_type != R_ARM_NONE
77b4f08f 10419 && r_symndx != STN_UNDEF
ffcb4889
NS		 10420 && bfd_is_und_section (sec)
10421 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10422 {
10423 if (!info->callbacks->undefined_symbol
10424 (info, bfd_elf_string_from_elf_section
10425 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10426 input_bfd, input_section,
10427 rel->r_offset, TRUE))
10428 return FALSE;
10429 }
b38cadfb 10430
4e7fd91e 10431 if (globals->use_rel)
f8df10f4 10432 {
4e7fd91e
PB		 10433 relocation = (sec->output_section->vma
10434 + sec->output_offset
10435 + sym->st_value);
ab96bf03
AM		 10436 if (!info->relocatable
10437 && (sec->flags & SEC_MERGE)
10438 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10439 {
4e7fd91e
PB		 10440 asection *msec;
10441 bfd_vma addend, value;
10442
39623e12 10443 switch (r_type)
4e7fd91e 10444 {
39623e12
PB		 10445 case R_ARM_MOVW_ABS_NC:
10446 case R_ARM_MOVT_ABS:
10447 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10448 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10449 addend = (addend ^ 0x8000) - 0x8000;
10450 break;
f8df10f4 10451
39623e12
PB		 10452 case R_ARM_THM_MOVW_ABS_NC:
10453 case R_ARM_THM_MOVT_ABS:
10454 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10455 << 16;
10456 value |= bfd_get_16 (input_bfd,
10457 contents + rel->r_offset + 2);
10458 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10459 | ((value & 0x04000000) >> 15);
10460 addend = (addend ^ 0x8000) - 0x8000;
10461 break;
f8df10f4 10462
39623e12
PB		 10463 default:
10464 if (howto->rightshift
10465 || (howto->src_mask & (howto->src_mask + 1)))
10466 {
10467 (*_bfd_error_handler)
10468 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10469 input_bfd, input_section,
10470 (long) rel->r_offset, howto->name);
10471 return FALSE;
10472 }
10473
10474 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10475
10476 /* Get the (signed) value from the instruction. */
10477 addend = value & howto->src_mask;
10478 if (addend & ((howto->src_mask + 1) >> 1))
10479 {
10480 bfd_signed_vma mask;
10481
10482 mask = -1;
10483 mask &= ~ howto->src_mask;
10484 addend |= mask;
10485 }
10486 break;
4e7fd91e 10487 }
39623e12 10488
4e7fd91e
PB		 10489 msec = sec;
10490 addend =
10491 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10492 - relocation;
10493 addend += msec->output_section->vma + msec->output_offset;
39623e12 10494
cc643b88 10495 /* Cases here must match those in the preceding
39623e12
PB		 10496 switch statement. */
10497 switch (r_type)
10498 {
10499 case R_ARM_MOVW_ABS_NC:
10500 case R_ARM_MOVT_ABS:
10501 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10502 | (addend & 0xfff);
10503 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10504 break;
10505
10506 case R_ARM_THM_MOVW_ABS_NC:
10507 case R_ARM_THM_MOVT_ABS:
10508 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10509 | (addend & 0xff) | ((addend & 0x0800) << 15);
10510 bfd_put_16 (input_bfd, value >> 16,
10511 contents + rel->r_offset);
10512 bfd_put_16 (input_bfd, value,
10513 contents + rel->r_offset + 2);
10514 break;
10515
10516 default:
10517 value = (value & ~ howto->dst_mask)
10518 | (addend & howto->dst_mask);
10519 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10520 break;
10521 }
f8df10f4 10522 }
f8df10f4 10523 }
4e7fd91e
PB		 10524 else
10525 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10526 }
10527 else
10528 {
62d887d4 10529 bfd_boolean warned, ignored;
560e09e9 10530
b2a8e766
AM		 10531 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10532 r_symndx, symtab_hdr, sym_hashes,
10533 h, sec, relocation,
62d887d4 10534 unresolved_reloc, warned, ignored);
ba93b8ac
DJ		 10535
10536 sym_type = h->type;
252b5132
RH		 10537 }
10538
dbaa2011 10539 if (sec != NULL && discarded_section (sec))
e4067dbb 10540 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10541 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10542
10543 if (info->relocatable)
10544 {
10545 /* This is a relocatable link. We don't have to change
10546 anything, unless the reloc is against a section symbol,
10547 in which case we have to adjust according to where the
10548 section symbol winds up in the output section. */
10549 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10550 {
10551 if (globals->use_rel)
10552 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10553 howto, (bfd_signed_vma) sec->output_offset);
10554 else
10555 rel->r_addend += sec->output_offset;
10556 }
10557 continue;
10558 }
10559
252b5132
RH		 10560 if (h != NULL)
10561 name = h->root.root.string;
10562 else
10563 {
10564 name = (bfd_elf_string_from_elf_section
10565 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10566 if (name == NULL || *name == '\0')
10567 name = bfd_section_name (input_bfd, sec);
10568 }
f21f3fe0 10569
cf35638d 10570 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10571 && r_type != R_ARM_NONE
10572 && (h == NULL
10573 || h->root.type == bfd_link_hash_defined
10574 || h->root.type == bfd_link_hash_defweak)
10575 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10576 {
10577 (*_bfd_error_handler)
10578 ((sym_type == STT_TLS
10579 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10580 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10581 input_bfd,
10582 input_section,
10583 (long) rel->r_offset,
10584 howto->name,
10585 name);
10586 }
10587
0855e32b 10588 /* We call elf32_arm_final_link_relocate unless we're completely
99059e56
RM		 10589 done, i.e., the relaxation produced the final output we want,
10590 and we won't let anybody mess with it. Also, we have to do
10591 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10592 both in relaxed and non-relaxed cases */
0855e32b
NS		 10593 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10594 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10595 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10596 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10597 & GOT_TLS_GDESC)))
10598 {
10599 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10600 contents, rel, h == NULL);
10601 /* This may have been marked unresolved because it came from
10602 a shared library. But we've just dealt with that. */
10603 unresolved_reloc = 0;
10604 }
10605 else
10606 r = bfd_reloc_continue;
b38cadfb 10607
0855e32b
NS		 10608 if (r == bfd_reloc_continue)
10609 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10610 input_section, contents, rel,
34e77a92 10611 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10612 (h ? h->target_internal
10613 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10614 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10615
10616 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10617 because such sections are not SEC_ALLOC and thus ld.so will
10618 not process them. */
10619 if (unresolved_reloc
99059e56
RM		 10620 && !((input_section->flags & SEC_DEBUGGING) != 0
10621 && h->def_dynamic)
1d5316ab
AM		 10622 && _bfd_elf_section_offset (output_bfd, info, input_section,
10623 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10624 {
10625 (*_bfd_error_handler)
843fe662
L		 10626 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10627 input_bfd,
10628 input_section,
10629 (long) rel->r_offset,
10630 howto->name,
10631 h->root.root.string);
0945cdfd
DJ		 10632 return FALSE;
10633 }
252b5132
RH		 10634
10635 if (r != bfd_reloc_ok)
10636 {
252b5132
RH		 10637 switch (r)
10638 {
10639 case bfd_reloc_overflow:
cf919dfd
PB		 10640 /* If the overflowing reloc was to an undefined symbol,
10641 we have already printed one error message and there
10642 is no point complaining again. */
10643 if ((! h ||
10644 h->root.type != bfd_link_hash_undefined)
10645 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10646 (info, (h ? &h->root : NULL), name, howto->name,
10647 (bfd_vma) 0, input_bfd, input_section,
10648 rel->r_offset))))
b34976b6 10649 return FALSE;
252b5132
RH		 10650 break;
10651
10652 case bfd_reloc_undefined:
10653 if (!((*info->callbacks->undefined_symbol)
10654 (info, name, input_bfd, input_section,
b34976b6
AM		 10655 rel->r_offset, TRUE)))
10656 return FALSE;
252b5132
RH		 10657 break;
10658
10659 case bfd_reloc_outofrange:
f2a9dd69 10660 error_message = _("out of range");
252b5132
RH		 10661 goto common_error;
10662
10663 case bfd_reloc_notsupported:
f2a9dd69 10664 error_message = _("unsupported relocation");
252b5132
RH		 10665 goto common_error;
10666
10667 case bfd_reloc_dangerous:
f2a9dd69 10668 /* error_message should already be set. */
252b5132
RH		 10669 goto common_error;
10670
10671 default:
f2a9dd69 10672 error_message = _("unknown error");
8029a119 10673 /* Fall through. */
252b5132
RH		 10674
10675 common_error:
f2a9dd69
DJ		 10676 BFD_ASSERT (error_message != NULL);
10677 if (!((*info->callbacks->reloc_dangerous)
10678 (info, error_message, input_bfd, input_section,
252b5132 10679 rel->r_offset)))
b34976b6 10680 return FALSE;
252b5132
RH		 10681 break;
10682 }
10683 }
10684 }
10685
b34976b6 10686 return TRUE;
252b5132
RH		 10687}
10688
91d6fa6a 10689/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10690 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10691 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10692 maintaining that condition). */
10693
10694static void
10695add_unwind_table_edit (arm_unwind_table_edit **head,
10696 arm_unwind_table_edit **tail,
10697 arm_unwind_edit_type type,
10698 asection *linked_section,
91d6fa6a 10699 unsigned int tindex)
2468f9c9 10700{
21d799b5
NC		 10701 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10702 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10703
2468f9c9
PB		 10704 new_edit->type = type;
10705 new_edit->linked_section = linked_section;
91d6fa6a 10706 new_edit->index = tindex;
b38cadfb 10707
91d6fa6a 10708 if (tindex > 0)
2468f9c9
PB		 10709 {
10710 new_edit->next = NULL;
10711
10712 if (*tail)
10713 (*tail)->next = new_edit;
10714
10715 (*tail) = new_edit;
10716
10717 if (!*head)
10718 (*head) = new_edit;
10719 }
10720 else
10721 {
10722 new_edit->next = *head;
10723
10724 if (!*tail)
10725 *tail = new_edit;
10726
10727 *head = new_edit;
10728 }
10729}
10730
10731static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10732
10733/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10734static void
10735adjust_exidx_size(asection *exidx_sec, int adjust)
10736{
10737 asection *out_sec;
10738
10739 if (!exidx_sec->rawsize)
10740 exidx_sec->rawsize = exidx_sec->size;
10741
10742 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10743 out_sec = exidx_sec->output_section;
10744 /* Adjust size of output section. */
10745 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10746}
10747
10748/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10749static void
10750insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10751{
10752 struct _arm_elf_section_data *exidx_arm_data;
10753
10754 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10755 add_unwind_table_edit (
10756 &exidx_arm_data->u.exidx.unwind_edit_list,
10757 &exidx_arm_data->u.exidx.unwind_edit_tail,
10758 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10759
10760 adjust_exidx_size(exidx_sec, 8);
10761}
10762
10763/* Scan .ARM.exidx tables, and create a list describing edits which should be
10764 made to those tables, such that:
b38cadfb 10765
2468f9c9
PB		 10766 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10767 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
99059e56 10768 codes which have been inlined into the index).
2468f9c9 10769
85fdf906
AH		 10770 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10771
2468f9c9 10772 The edits are applied when the tables are written
b38cadfb 10773 (in elf32_arm_write_section). */
2468f9c9
PB		 10774
10775bfd_boolean
10776elf32_arm_fix_exidx_coverage (asection **text_section_order,
10777 unsigned int num_text_sections,
85fdf906
AH		 10778 struct bfd_link_info *info,
10779 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10780{
10781 bfd *inp;
10782 unsigned int last_second_word = 0, i;
10783 asection *last_exidx_sec = NULL;
10784 asection *last_text_sec = NULL;
10785 int last_unwind_type = -1;
10786
10787 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10788 text sections. */
10789 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10790 {
10791 asection *sec;
b38cadfb 10792
2468f9c9 10793 for (sec = inp->sections; sec != NULL; sec = sec->next)
99059e56 10794 {
2468f9c9
PB		 10795 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10796 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10797
dec9d5df 10798 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10799 continue;
b38cadfb 10800
2468f9c9
PB		 10801 if (elf_sec->linked_to)
10802 {
10803 Elf_Internal_Shdr *linked_hdr
99059e56 10804 = &elf_section_data (elf_sec->linked_to)->this_hdr;
2468f9c9 10805 struct _arm_elf_section_data *linked_sec_arm_data
99059e56 10806 = get_arm_elf_section_data (linked_hdr->bfd_section);
2468f9c9
PB		 10807
10808 if (linked_sec_arm_data == NULL)
99059e56 10809 continue;
2468f9c9
PB		 10810
10811 /* Link this .ARM.exidx section back from the text section it
99059e56 10812 describes. */
2468f9c9
PB		 10813 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10814 }
10815 }
10816 }
10817
10818 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10819 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10820 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10821
10822 for (i = 0; i < num_text_sections; i++)
10823 {
10824 asection *sec = text_section_order[i];
10825 asection *exidx_sec;
10826 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10827 struct _arm_elf_section_data *exidx_arm_data;
10828 bfd_byte *contents = NULL;
10829 int deleted_exidx_bytes = 0;
10830 bfd_vma j;
10831 arm_unwind_table_edit *unwind_edit_head = NULL;
10832 arm_unwind_table_edit *unwind_edit_tail = NULL;
10833 Elf_Internal_Shdr *hdr;
10834 bfd *ibfd;
10835
10836 if (arm_data == NULL)
99059e56 10837 continue;
2468f9c9
PB		 10838
10839 exidx_sec = arm_data->u.text.arm_exidx_sec;
10840 if (exidx_sec == NULL)
10841 {
10842 /* Section has no unwind data. */
10843 if (last_unwind_type == 0 || !last_exidx_sec)
10844 continue;
10845
10846 /* Ignore zero sized sections. */
10847 if (sec->size == 0)
10848 continue;
10849
10850 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10851 last_unwind_type = 0;
10852 continue;
10853 }
10854
22a8f80e
PB		 10855 /* Skip /DISCARD/ sections. */
10856 if (bfd_is_abs_section (exidx_sec->output_section))
10857 continue;
10858
2468f9c9
PB		 10859 hdr = &elf_section_data (exidx_sec)->this_hdr;
10860 if (hdr->sh_type != SHT_ARM_EXIDX)
99059e56 10861 continue;
b38cadfb 10862
2468f9c9
PB		 10863 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10864 if (exidx_arm_data == NULL)
99059e56 10865 continue;
b38cadfb 10866
2468f9c9 10867 ibfd = exidx_sec->owner;
b38cadfb 10868
2468f9c9
PB		 10869 if (hdr->contents != NULL)
10870 contents = hdr->contents;
10871 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10872 /* An error? */
10873 continue;
10874
10875 for (j = 0; j < hdr->sh_size; j += 8)
10876 {
10877 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10878 int unwind_type;
10879 int elide = 0;
10880
10881 /* An EXIDX_CANTUNWIND entry. */
10882 if (second_word == 1)
10883 {
10884 if (last_unwind_type == 0)
10885 elide = 1;
10886 unwind_type = 0;
10887 }
10888 /* Inlined unwinding data. Merge if equal to previous. */
10889 else if ((second_word & 0x80000000) != 0)
10890 {
85fdf906
AH		 10891 if (merge_exidx_entries
10892 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10893 elide = 1;
10894 unwind_type = 1;
10895 last_second_word = second_word;
10896 }
10897 /* Normal table entry. In theory we could merge these too,
10898 but duplicate entries are likely to be much less common. */
10899 else
10900 unwind_type = 2;
10901
10902 if (elide)
10903 {
10904 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10905 DELETE_EXIDX_ENTRY, NULL, j / 8);
10906
10907 deleted_exidx_bytes += 8;
10908 }
10909
10910 last_unwind_type = unwind_type;
10911 }
10912
10913 /* Free contents if we allocated it ourselves. */
10914 if (contents != hdr->contents)
99059e56 10915 free (contents);
2468f9c9
PB		 10916
10917 /* Record edits to be applied later (in elf32_arm_write_section). */
10918 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10919 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10920
2468f9c9
PB		 10921 if (deleted_exidx_bytes > 0)
10922 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10923
10924 last_exidx_sec = exidx_sec;
10925 last_text_sec = sec;
10926 }
10927
10928 /* Add terminating CANTUNWIND entry. */
10929 if (last_exidx_sec && last_unwind_type != 0)
10930 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10931
10932 return TRUE;
10933}
10934
3e6b1042
DJ		 10935static bfd_boolean
10936elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10937 bfd *ibfd, const char *name)
10938{
10939 asection *sec, *osec;
10940
3d4d4302 10941 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 10942 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10943 return TRUE;
10944
10945 osec = sec->output_section;
10946 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10947 return TRUE;
10948
10949 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10950 sec->output_offset, sec->size))
10951 return FALSE;
10952
10953 return TRUE;
10954}
10955
10956static bfd_boolean
10957elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10958{
10959 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10960 asection *sec, *osec;
3e6b1042 10961
4dfe6ac6
NC		 10962 if (globals == NULL)
10963 return FALSE;
10964
3e6b1042
DJ		 10965 /* Invoke the regular ELF backend linker to do all the work. */
10966 if (!bfd_elf_final_link (abfd, info))
10967 return FALSE;
10968
fe33d2fa
CL		 10969 /* Process stub sections (eg BE8 encoding, ...). */
10970 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10971 int i;
cdb21a0a
NS		 10972 for (i=0; i<htab->top_id; i++)
10973 {
10974 sec = htab->stub_group[i].stub_sec;
10975 /* Only process it once, in its link_sec slot. */
10976 if (sec && i == htab->stub_group[i].link_sec->id)
10977 {
10978 osec = sec->output_section;
10979 elf32_arm_write_section (abfd, info, sec, sec->contents);
10980 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10981 sec->output_offset, sec->size))
10982 return FALSE;
10983 }
fe33d2fa 10984 }
fe33d2fa 10985
3e6b1042
DJ		 10986 /* Write out any glue sections now that we have created all the
10987 stubs. */
10988 if (globals->bfd_of_glue_owner != NULL)
10989 {
10990 if (! elf32_arm_output_glue_section (info, abfd,
10991 globals->bfd_of_glue_owner,
10992 ARM2THUMB_GLUE_SECTION_NAME))
10993 return FALSE;
10994
10995 if (! elf32_arm_output_glue_section (info, abfd,
10996 globals->bfd_of_glue_owner,
10997 THUMB2ARM_GLUE_SECTION_NAME))
10998 return FALSE;
10999
11000 if (! elf32_arm_output_glue_section (info, abfd,
11001 globals->bfd_of_glue_owner,
11002 VFP11_ERRATUM_VENEER_SECTION_NAME))
11003 return FALSE;
11004
11005 if (! elf32_arm_output_glue_section (info, abfd,
11006 globals->bfd_of_glue_owner,
11007 ARM_BX_GLUE_SECTION_NAME))
11008 return FALSE;
11009 }
11010
11011 return TRUE;
11012}
11013
5968a7b8
NC		 11014/* Return a best guess for the machine number based on the attributes. */
11015
11016static unsigned int
11017bfd_arm_get_mach_from_attributes (bfd * abfd)
11018{
11019 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11020
11021 switch (arch)
11022 {
11023 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11024 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11025 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11026
11027 case TAG_CPU_ARCH_V5TE:
11028 {
11029 char * name;
11030
11031 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11032 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11033
11034 if (name)
11035 {
11036 if (strcmp (name, "IWMMXT2") == 0)
11037 return bfd_mach_arm_iWMMXt2;
11038
11039 if (strcmp (name, "IWMMXT") == 0)
6034aab8 11040 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 11041
11042 if (strcmp (name, "XSCALE") == 0)
11043 {
11044 int wmmx;
11045
11046 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11047 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11048 switch (wmmx)
11049 {
11050 case 1: return bfd_mach_arm_iWMMXt;
11051 case 2: return bfd_mach_arm_iWMMXt2;
11052 default: return bfd_mach_arm_XScale;
11053 }
11054 }
5968a7b8
NC		 11055 }
11056
11057 return bfd_mach_arm_5TE;
11058 }
11059
11060 default:
11061 return bfd_mach_arm_unknown;
11062 }
11063}
11064
c178919b
NC		 11065/* Set the right machine number. */
11066
11067static bfd_boolean
57e8b36a 11068elf32_arm_object_p (bfd *abfd)
c178919b 11069{
5a6c6817 11070 unsigned int mach;
57e8b36a 11071
5a6c6817 11072 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11073
5968a7b8
NC		 11074 if (mach == bfd_mach_arm_unknown)
11075 {
11076 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11077 mach = bfd_mach_arm_ep9312;
11078 else
11079 mach = bfd_arm_get_mach_from_attributes (abfd);
11080 }
c178919b 11081
5968a7b8 11082 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11083 return TRUE;
11084}
11085
fc830a83 11086/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11087
b34976b6 11088static bfd_boolean
57e8b36a 11089elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11090{
11091 if (elf_flags_init (abfd)
11092 && elf_elfheader (abfd)->e_flags != flags)
11093 {
fc830a83
NC		 11094 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11095 {
fd2ec330 11096 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11097 (*_bfd_error_handler)
11098 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11099 abfd);
fc830a83 11100 else
d003868e
AM		 11101 _bfd_error_handler
11102 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11103 abfd);
fc830a83 11104 }
252b5132
RH		 11105 }
11106 else
11107 {
11108 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11109 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11110 }
11111
b34976b6 11112 return TRUE;
252b5132
RH		 11113}
11114
fc830a83 11115/* Copy backend specific data from one object module to another. */
9b485d32 11116
b34976b6 11117static bfd_boolean
57e8b36a 11118elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11119{
11120 flagword in_flags;
11121 flagword out_flags;
11122
0ffa91dd 11123 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11124 return TRUE;
252b5132 11125
fc830a83 11126 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11127 out_flags = elf_elfheader (obfd)->e_flags;
11128
fc830a83
NC		 11129 if (elf_flags_init (obfd)
11130 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11131 && in_flags != out_flags)
252b5132 11132 {
252b5132 11133 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11134 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11135 return FALSE;
252b5132
RH		 11136
11137 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11138 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11139 return FALSE;
252b5132
RH		 11140
11141 /* If the src and dest have different interworking flags
99059e56 11142 then turn off the interworking bit. */
fd2ec330 11143 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11144 {
fd2ec330 11145 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11146 _bfd_error_handler
11147 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11148 obfd, ibfd);
252b5132 11149
fd2ec330 11150 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11151 }
1006ba19
PB		 11152
11153 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11154 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11155 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11156 }
11157
11158 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11159 elf_flags_init (obfd) = TRUE;
252b5132 11160
94a3258f
PB		 11161 /* Also copy the EI_OSABI field. */
11162 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11163 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11164
104d59d1
JM		 11165 /* Copy object attributes. */
11166 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 11167
11168 return TRUE;
11169}
11170
11171/* Values for Tag_ABI_PCS_R9_use. */
11172enum
11173{
11174 AEABI_R9_V6,
11175 AEABI_R9_SB,
11176 AEABI_R9_TLS,
11177 AEABI_R9_unused
11178};
11179
11180/* Values for Tag_ABI_PCS_RW_data. */
11181enum
11182{
11183 AEABI_PCS_RW_data_absolute,
11184 AEABI_PCS_RW_data_PCrel,
11185 AEABI_PCS_RW_data_SBrel,
11186 AEABI_PCS_RW_data_unused
11187};
11188
11189/* Values for Tag_ABI_enum_size. */
11190enum
11191{
11192 AEABI_enum_unused,
11193 AEABI_enum_short,
11194 AEABI_enum_wide,
11195 AEABI_enum_forced_wide
11196};
11197
104d59d1
JM		 11198/* Determine whether an object attribute tag takes an integer, a
11199 string or both. */
906e58ca 11200
104d59d1
JM		 11201static int
11202elf32_arm_obj_attrs_arg_type (int tag)
11203{
11204 if (tag == Tag_compatibility)
3483fe2e 11205 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11206 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11207 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11208 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11209 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11210 else if (tag < 32)
3483fe2e 11211 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11212 else
3483fe2e 11213 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11214}
11215
5aa6ff7c
AS		 11216/* The ABI defines that Tag_conformance should be emitted first, and that
11217 Tag_nodefaults should be second (if either is defined). This sets those
11218 two positions, and bumps up the position of all the remaining tags to
11219 compensate. */
11220static int
11221elf32_arm_obj_attrs_order (int num)
11222{
3de4a297 11223 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11224 return Tag_conformance;
3de4a297 11225 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11226 return Tag_nodefaults;
11227 if ((num - 2) < Tag_nodefaults)
11228 return num - 2;
11229 if ((num - 1) < Tag_conformance)
11230 return num - 1;
11231 return num;
11232}
11233
e8b36cd1
JM		 11234/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11235static bfd_boolean
11236elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11237{
11238 if ((tag & 127) < 64)
11239 {
11240 _bfd_error_handler
11241 (_("%B: Unknown mandatory EABI object attribute %d"),
11242 abfd, tag);
11243 bfd_set_error (bfd_error_bad_value);
11244 return FALSE;
11245 }
11246 else
11247 {
11248 _bfd_error_handler
11249 (_("Warning: %B: Unknown EABI object attribute %d"),
11250 abfd, tag);
11251 return TRUE;
11252 }
11253}
11254
91e22acd
AS		 11255/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11256 Returns -1 if no architecture could be read. */
11257
11258static int
11259get_secondary_compatible_arch (bfd *abfd)
11260{
11261 obj_attribute *attr =
11262 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11263
11264 /* Note: the tag and its argument below are uleb128 values, though
11265 currently-defined values fit in one byte for each. */
11266 if (attr->s
11267 && attr->s[0] == Tag_CPU_arch
11268 && (attr->s[1] & 128) != 128
11269 && attr->s[2] == 0)
11270 return attr->s[1];
11271
11272 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11273 return -1;
11274}
11275
11276/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11277 The tag is removed if ARCH is -1. */
11278
8e79c3df 11279static void
91e22acd 11280set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11281{
91e22acd
AS		 11282 obj_attribute *attr =
11283 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11284
91e22acd
AS		 11285 if (arch == -1)
11286 {
11287 attr->s = NULL;
11288 return;
8e79c3df 11289 }
91e22acd
AS		 11290
11291 /* Note: the tag and its argument below are uleb128 values, though
11292 currently-defined values fit in one byte for each. */
11293 if (!attr->s)
21d799b5 11294 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11295 attr->s[0] = Tag_CPU_arch;
11296 attr->s[1] = arch;
11297 attr->s[2] = '\0';
8e79c3df
CM		 11298}
11299
91e22acd
AS		 11300/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11301 into account. */
11302
11303static int
11304tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11305 int newtag, int secondary_compat)
8e79c3df 11306{
91e22acd
AS		 11307#define T(X) TAG_CPU_ARCH_##X
11308 int tagl, tagh, result;
11309 const int v6t2[] =
11310 {
11311 T(V6T2), /* PRE_V4. */
11312 T(V6T2), /* V4. */
11313 T(V6T2), /* V4T. */
11314 T(V6T2), /* V5T. */
11315 T(V6T2), /* V5TE. */
11316 T(V6T2), /* V5TEJ. */
11317 T(V6T2), /* V6. */
11318 T(V7), /* V6KZ. */
11319 T(V6T2) /* V6T2. */
11320 };
11321 const int v6k[] =
11322 {
11323 T(V6K), /* PRE_V4. */
11324 T(V6K), /* V4. */
11325 T(V6K), /* V4T. */
11326 T(V6K), /* V5T. */
11327 T(V6K), /* V5TE. */
11328 T(V6K), /* V5TEJ. */
11329 T(V6K), /* V6. */
11330 T(V6KZ), /* V6KZ. */
11331 T(V7), /* V6T2. */
11332 T(V6K) /* V6K. */
11333 };
11334 const int v7[] =
11335 {
11336 T(V7), /* PRE_V4. */
11337 T(V7), /* V4. */
11338 T(V7), /* V4T. */
11339 T(V7), /* V5T. */
11340 T(V7), /* V5TE. */
11341 T(V7), /* V5TEJ. */
11342 T(V7), /* V6. */
11343 T(V7), /* V6KZ. */
11344 T(V7), /* V6T2. */
11345 T(V7), /* V6K. */
11346 T(V7) /* V7. */
11347 };
11348 const int v6_m[] =
11349 {
11350 -1, /* PRE_V4. */
11351 -1, /* V4. */
11352 T(V6K), /* V4T. */
11353 T(V6K), /* V5T. */
11354 T(V6K), /* V5TE. */
11355 T(V6K), /* V5TEJ. */
11356 T(V6K), /* V6. */
11357 T(V6KZ), /* V6KZ. */
11358 T(V7), /* V6T2. */
11359 T(V6K), /* V6K. */
11360 T(V7), /* V7. */
11361 T(V6_M) /* V6_M. */
11362 };
11363 const int v6s_m[] =
11364 {
11365 -1, /* PRE_V4. */
11366 -1, /* V4. */
11367 T(V6K), /* V4T. */
11368 T(V6K), /* V5T. */
11369 T(V6K), /* V5TE. */
11370 T(V6K), /* V5TEJ. */
11371 T(V6K), /* V6. */
11372 T(V6KZ), /* V6KZ. */
11373 T(V7), /* V6T2. */
11374 T(V6K), /* V6K. */
11375 T(V7), /* V7. */
11376 T(V6S_M), /* V6_M. */
11377 T(V6S_M) /* V6S_M. */
11378 };
9e3c6df6
PB		 11379 const int v7e_m[] =
11380 {
11381 -1, /* PRE_V4. */
11382 -1, /* V4. */
11383 T(V7E_M), /* V4T. */
11384 T(V7E_M), /* V5T. */
11385 T(V7E_M), /* V5TE. */
11386 T(V7E_M), /* V5TEJ. */
11387 T(V7E_M), /* V6. */
11388 T(V7E_M), /* V6KZ. */
11389 T(V7E_M), /* V6T2. */
11390 T(V7E_M), /* V6K. */
11391 T(V7E_M), /* V7. */
11392 T(V7E_M), /* V6_M. */
11393 T(V7E_M), /* V6S_M. */
11394 T(V7E_M) /* V7E_M. */
11395 };
bca38921
MGD		 11396 const int v8[] =
11397 {
11398 T(V8), /* PRE_V4. */
11399 T(V8), /* V4. */
11400 T(V8), /* V4T. */
11401 T(V8), /* V5T. */
11402 T(V8), /* V5TE. */
11403 T(V8), /* V5TEJ. */
11404 T(V8), /* V6. */
11405 T(V8), /* V6KZ. */
11406 T(V8), /* V6T2. */
11407 T(V8), /* V6K. */
11408 T(V8), /* V7. */
11409 T(V8), /* V6_M. */
11410 T(V8), /* V6S_M. */
11411 T(V8), /* V7E_M. */
11412 T(V8) /* V8. */
11413 };
91e22acd
AS		 11414 const int v4t_plus_v6_m[] =
11415 {
11416 -1, /* PRE_V4. */
11417 -1, /* V4. */
11418 T(V4T), /* V4T. */
11419 T(V5T), /* V5T. */
11420 T(V5TE), /* V5TE. */
11421 T(V5TEJ), /* V5TEJ. */
11422 T(V6), /* V6. */
11423 T(V6KZ), /* V6KZ. */
11424 T(V6T2), /* V6T2. */
11425 T(V6K), /* V6K. */
11426 T(V7), /* V7. */
11427 T(V6_M), /* V6_M. */
11428 T(V6S_M), /* V6S_M. */
9e3c6df6 11429 T(V7E_M), /* V7E_M. */
bca38921 11430 T(V8), /* V8. */
91e22acd
AS		 11431 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11432 };
11433 const int *comb[] =
11434 {
11435 v6t2,
11436 v6k,
11437 v7,
11438 v6_m,
11439 v6s_m,
9e3c6df6 11440 v7e_m,
bca38921 11441 v8,
91e22acd
AS		 11442 /* Pseudo-architecture. */
11443 v4t_plus_v6_m
11444 };
11445
11446 /* Check we've not got a higher architecture than we know about. */
11447
9e3c6df6 11448 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11449 {
3895f852 11450 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11451 return -1;
11452 }
11453
11454 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11455
11456 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11457 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11458 oldtag = T(V4T_PLUS_V6_M);
11459
11460 /* And override the new tag if we have a Tag_also_compatible_with on the
11461 input. */
11462
11463 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11464 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11465 newtag = T(V4T_PLUS_V6_M);
11466
11467 tagl = (oldtag < newtag) ? oldtag : newtag;
11468 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11469
11470 /* Architectures before V6KZ add features monotonically. */
11471 if (tagh <= TAG_CPU_ARCH_V6KZ)
11472 return result;
11473
11474 result = comb[tagh - T(V6T2)][tagl];
11475
11476 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11477 as the canonical version. */
11478 if (result == T(V4T_PLUS_V6_M))
11479 {
11480 result = T(V4T);
11481 *secondary_compat_out = T(V6_M);
11482 }
11483 else
11484 *secondary_compat_out = -1;
11485
11486 if (result == -1)
11487 {
3895f852 11488 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11489 ibfd, oldtag, newtag);
11490 return -1;
11491 }
11492
11493 return result;
11494#undef T
8e79c3df
CM		 11495}
11496
ac56ee8f
MGD		 11497/* Query attributes object to see if integer divide instructions may be
11498 present in an object. */
11499static bfd_boolean
11500elf32_arm_attributes_accept_div (const obj_attribute *attr)
11501{
11502 int arch = attr[Tag_CPU_arch].i;
11503 int profile = attr[Tag_CPU_arch_profile].i;
11504
11505 switch (attr[Tag_DIV_use].i)
11506 {
11507 case 0:
11508 /* Integer divide allowed if instruction contained in archetecture. */
11509 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11510 return TRUE;
11511 else if (arch >= TAG_CPU_ARCH_V7E_M)
11512 return TRUE;
11513 else
11514 return FALSE;
11515
11516 case 1:
11517 /* Integer divide explicitly prohibited. */
11518 return FALSE;
11519
11520 default:
11521 /* Unrecognised case - treat as allowing divide everywhere. */
11522 case 2:
11523 /* Integer divide allowed in ARM state. */
11524 return TRUE;
11525 }
11526}
11527
11528/* Query attributes object to see if integer divide instructions are
11529 forbidden to be in the object. This is not the inverse of
11530 elf32_arm_attributes_accept_div. */
11531static bfd_boolean
11532elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11533{
11534 return attr[Tag_DIV_use].i == 1;
11535}
11536
ee065d83
PB		 11537/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11538 are conflicting attributes. */
906e58ca 11539
ee065d83
PB		 11540static bfd_boolean
11541elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11542{
104d59d1
JM		 11543 obj_attribute *in_attr;
11544 obj_attribute *out_attr;
ee065d83
PB		 11545 /* Some tags have 0 = don't care, 1 = strong requirement,
11546 2 = weak requirement. */
91e22acd 11547 static const int order_021[3] = {0, 2, 1};
ee065d83 11548 int i;
91e22acd 11549 bfd_boolean result = TRUE;
ee065d83 11550
3e6b1042
DJ		 11551 /* Skip the linker stubs file. This preserves previous behavior
11552 of accepting unknown attributes in the first input file - but
11553 is that a bug? */
11554 if (ibfd->flags & BFD_LINKER_CREATED)
11555 return TRUE;
11556
104d59d1 11557 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11558 {
11559 /* This is the first object. Copy the attributes. */
104d59d1 11560 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11561
cd21e546
MGD		 11562 out_attr = elf_known_obj_attributes_proc (obfd);
11563
004ae526
PB		 11564 /* Use the Tag_null value to indicate the attributes have been
11565 initialized. */
cd21e546 11566 out_attr[0].i = 1;
004ae526 11567
cd21e546
MGD		 11568 /* We do not output objects with Tag_MPextension_use_legacy - we move
11569 the attribute's value to Tag_MPextension_use. */
11570 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11571 {
11572 if (out_attr[Tag_MPextension_use].i != 0
11573 && out_attr[Tag_MPextension_use_legacy].i
99059e56 11574 != out_attr[Tag_MPextension_use].i)
cd21e546
MGD		 11575 {
11576 _bfd_error_handler
11577 (_("Error: %B has both the current and legacy "
11578 "Tag_MPextension_use attributes"), ibfd);
11579 result = FALSE;
11580 }
11581
11582 out_attr[Tag_MPextension_use] =
11583 out_attr[Tag_MPextension_use_legacy];
11584 out_attr[Tag_MPextension_use_legacy].type = 0;
11585 out_attr[Tag_MPextension_use_legacy].i = 0;
11586 }
11587
11588 return result;
ee065d83
PB		 11589 }
11590
104d59d1
JM		 11591 in_attr = elf_known_obj_attributes_proc (ibfd);
11592 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11593 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11594 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11595 {
8e79c3df 11596 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11597 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11598 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11599 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11600 {
11601 _bfd_error_handler
3895f852 11602 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11603 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11604 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11605 result = FALSE;
ee065d83
PB		 11606 }
11607 }
11608
3de4a297 11609 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11610 {
11611 /* Merge this attribute with existing attributes. */
11612 switch (i)
11613 {
11614 case Tag_CPU_raw_name:
11615 case Tag_CPU_name:
91e22acd 11616 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11617 break;
11618
11619 case Tag_ABI_optimization_goals:
11620 case Tag_ABI_FP_optimization_goals:
11621 /* Use the first value seen. */
11622 break;
11623
11624 case Tag_CPU_arch:
91e22acd
AS		 11625 {
11626 int secondary_compat = -1, secondary_compat_out = -1;
11627 unsigned int saved_out_attr = out_attr[i].i;
11628 static const char *name_table[] = {
11629 /* These aren't real CPU names, but we can't guess
11630 that from the architecture version alone. */
11631 "Pre v4",
11632 "ARM v4",
11633 "ARM v4T",
11634 "ARM v5T",
11635 "ARM v5TE",
11636 "ARM v5TEJ",
11637 "ARM v6",
11638 "ARM v6KZ",
11639 "ARM v6T2",
11640 "ARM v6K",
11641 "ARM v7",
11642 "ARM v6-M",
bca38921
MGD		 11643 "ARM v6S-M",
11644 "ARM v8"
91e22acd
AS		 11645 };
11646
11647 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11648 secondary_compat = get_secondary_compatible_arch (ibfd);
11649 secondary_compat_out = get_secondary_compatible_arch (obfd);
11650 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11651 &secondary_compat_out,
11652 in_attr[i].i,
11653 secondary_compat);
11654 set_secondary_compatible_arch (obfd, secondary_compat_out);
11655
11656 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11657 if (out_attr[i].i == saved_out_attr)
11658 ; /* Leave the names alone. */
11659 else if (out_attr[i].i == in_attr[i].i)
11660 {
11661 /* The output architecture has been changed to match the
11662 input architecture. Use the input names. */
11663 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11664 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11665 : NULL;
11666 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11667 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11668 : NULL;
11669 }
11670 else
11671 {
11672 out_attr[Tag_CPU_name].s = NULL;
11673 out_attr[Tag_CPU_raw_name].s = NULL;
11674 }
11675
11676 /* If we still don't have a value for Tag_CPU_name,
11677 make one up now. Tag_CPU_raw_name remains blank. */
11678 if (out_attr[Tag_CPU_name].s == NULL
11679 && out_attr[i].i < ARRAY_SIZE (name_table))
11680 out_attr[Tag_CPU_name].s =
11681 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11682 }
11683 break;
11684
ee065d83
PB		 11685 case Tag_ARM_ISA_use:
11686 case Tag_THUMB_ISA_use:
ee065d83 11687 case Tag_WMMX_arch:
91e22acd
AS		 11688 case Tag_Advanced_SIMD_arch:
11689 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11690 case Tag_ABI_FP_rounding:
ee065d83
PB		 11691 case Tag_ABI_FP_exceptions:
11692 case Tag_ABI_FP_user_exceptions:
11693 case Tag_ABI_FP_number_model:
75375b3e 11694 case Tag_FP_HP_extension:
91e22acd
AS		 11695 case Tag_CPU_unaligned_access:
11696 case Tag_T2EE_use:
91e22acd 11697 case Tag_MPextension_use:
ee065d83
PB		 11698 /* Use the largest value specified. */
11699 if (in_attr[i].i > out_attr[i].i)
11700 out_attr[i].i = in_attr[i].i;
11701 break;
11702
75375b3e 11703 case Tag_ABI_align_preserved:
91e22acd
AS		 11704 case Tag_ABI_PCS_RO_data:
11705 /* Use the smallest value specified. */
11706 if (in_attr[i].i < out_attr[i].i)
11707 out_attr[i].i = in_attr[i].i;
11708 break;
11709
75375b3e 11710 case Tag_ABI_align_needed:
91e22acd 11711 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11712 && (in_attr[Tag_ABI_align_preserved].i == 0
11713 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11714 {
91e22acd
AS		 11715 /* This error message should be enabled once all non-conformant
11716 binaries in the toolchain have had the attributes set
11717 properly.
ee065d83 11718 _bfd_error_handler
3895f852 11719 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11720 obfd, ibfd);
11721 result = FALSE; */
ee065d83 11722 }
91e22acd
AS		 11723 /* Fall through. */
11724 case Tag_ABI_FP_denormal:
11725 case Tag_ABI_PCS_GOT_use:
11726 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11727 value if greater than 2 (for future-proofing). */
11728 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11729 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11730 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11731 out_attr[i].i = in_attr[i].i;
11732 break;
91e22acd 11733
75375b3e
MGD		 11734 case Tag_Virtualization_use:
11735 /* The virtualization tag effectively stores two bits of
11736 information: the intended use of TrustZone (in bit 0), and the
11737 intended use of Virtualization (in bit 1). */
11738 if (out_attr[i].i == 0)
11739 out_attr[i].i = in_attr[i].i;
11740 else if (in_attr[i].i != 0
11741 && in_attr[i].i != out_attr[i].i)
11742 {
11743 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11744 out_attr[i].i = 3;
11745 else
11746 {
11747 _bfd_error_handler
11748 (_("error: %B: unable to merge virtualization attributes "
11749 "with %B"),
11750 obfd, ibfd);
11751 result = FALSE;
11752 }
11753 }
11754 break;
91e22acd
AS		 11755
11756 case Tag_CPU_arch_profile:
11757 if (out_attr[i].i != in_attr[i].i)
11758 {
11759 /* 0 will merge with anything.
11760 'A' and 'S' merge to 'A'.
11761 'R' and 'S' merge to 'R'.
99059e56 11762 'M' and 'A|R|S' is an error. */
91e22acd
AS		 11763 if (out_attr[i].i == 0
11764 || (out_attr[i].i == 'S'
11765 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11766 out_attr[i].i = in_attr[i].i;
11767 else if (in_attr[i].i == 0
11768 || (in_attr[i].i == 'S'
11769 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11770 ; /* Do nothing. */
11771 else
11772 {
11773 _bfd_error_handler
3895f852 11774 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11775 ibfd,
11776 in_attr[i].i ? in_attr[i].i : '0',
11777 out_attr[i].i ? out_attr[i].i : '0');
11778 result = FALSE;
11779 }
11780 }
11781 break;
75375b3e 11782 case Tag_FP_arch:
62f3b8c8 11783 {
4547cb56
NC		 11784 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11785 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11786 when it's 0. It might mean absence of FP hardware if
11787 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11788
bca38921 11789#define VFP_VERSION_COUNT 8
62f3b8c8
PB		 11790 static const struct
11791 {
11792 int ver;
11793 int regs;
bca38921 11794 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11795 {
11796 {0, 0},
11797 {1, 16},
11798 {2, 16},
11799 {3, 32},
11800 {3, 16},
11801 {4, 32},
bca38921
MGD		 11802 {4, 16},
11803 {8, 32}
62f3b8c8
PB		 11804 };
11805 int ver;
11806 int regs;
11807 int newval;
11808
4547cb56
NC		 11809 /* If the output has no requirement about FP hardware,
11810 follow the requirement of the input. */
11811 if (out_attr[i].i == 0)
11812 {
11813 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11814 out_attr[i].i = in_attr[i].i;
11815 out_attr[Tag_ABI_HardFP_use].i
11816 = in_attr[Tag_ABI_HardFP_use].i;
11817 break;
11818 }
11819 /* If the input has no requirement about FP hardware, do
11820 nothing. */
11821 else if (in_attr[i].i == 0)
11822 {
11823 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11824 break;
11825 }
11826
11827 /* Both the input and the output have nonzero Tag_FP_arch.
11828 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11829
11830 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11831 do nothing. */
11832 if (in_attr[Tag_ABI_HardFP_use].i == 0
11833 && out_attr[Tag_ABI_HardFP_use].i == 0)
11834 ;
11835 /* If the input and the output have different Tag_ABI_HardFP_use,
11836 the combination of them is 3 (SP & DP). */
11837 else if (in_attr[Tag_ABI_HardFP_use].i
11838 != out_attr[Tag_ABI_HardFP_use].i)
11839 out_attr[Tag_ABI_HardFP_use].i = 3;
11840
11841 /* Now we can handle Tag_FP_arch. */
11842
bca38921
MGD		 11843 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11844 pick the biggest. */
11845 if (in_attr[i].i >= VFP_VERSION_COUNT
11846 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 11847 {
11848 out_attr[i] = in_attr[i];
11849 break;
11850 }
11851 /* The output uses the superset of input features
11852 (ISA version) and registers. */
11853 ver = vfp_versions[in_attr[i].i].ver;
11854 if (ver < vfp_versions[out_attr[i].i].ver)
11855 ver = vfp_versions[out_attr[i].i].ver;
11856 regs = vfp_versions[in_attr[i].i].regs;
11857 if (regs < vfp_versions[out_attr[i].i].regs)
11858 regs = vfp_versions[out_attr[i].i].regs;
11859 /* This assumes all possible supersets are also a valid
99059e56 11860 options. */
bca38921 11861 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 11862 {
11863 if (regs == vfp_versions[newval].regs
11864 && ver == vfp_versions[newval].ver)
11865 break;
11866 }
11867 out_attr[i].i = newval;
11868 }
b1cc4aeb 11869 break;
ee065d83
PB		 11870 case Tag_PCS_config:
11871 if (out_attr[i].i == 0)
11872 out_attr[i].i = in_attr[i].i;
b6009aca 11873 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11874 {
11875 /* It's sometimes ok to mix different configs, so this is only
99059e56 11876 a warning. */
ee065d83
PB		 11877 _bfd_error_handler
11878 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11879 }
11880 break;
11881 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11882 if (in_attr[i].i != out_attr[i].i
11883 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11884 && in_attr[i].i != AEABI_R9_unused)
11885 {
11886 _bfd_error_handler
3895f852 11887 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11888 result = FALSE;
ee065d83
PB		 11889 }
11890 if (out_attr[i].i == AEABI_R9_unused)
11891 out_attr[i].i = in_attr[i].i;
11892 break;
11893 case Tag_ABI_PCS_RW_data:
11894 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11895 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11896 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11897 {
11898 _bfd_error_handler
3895f852 11899 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11900 ibfd);
91e22acd 11901 result = FALSE;
ee065d83
PB		 11902 }
11903 /* Use the smallest value specified. */
11904 if (in_attr[i].i < out_attr[i].i)
11905 out_attr[i].i = in_attr[i].i;
11906 break;
ee065d83 11907 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11908 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11909 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11910 {
11911 _bfd_error_handler
a9dc9481
JM		 11912 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11913 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11914 }
a9dc9481 11915 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11916 out_attr[i].i = in_attr[i].i;
11917 break;
ee065d83
PB		 11918 case Tag_ABI_enum_size:
11919 if (in_attr[i].i != AEABI_enum_unused)
11920 {
11921 if (out_attr[i].i == AEABI_enum_unused
11922 || out_attr[i].i == AEABI_enum_forced_wide)
11923 {
11924 /* The existing object is compatible with anything.
11925 Use whatever requirements the new object has. */
11926 out_attr[i].i = in_attr[i].i;
11927 }
11928 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11929 && out_attr[i].i != in_attr[i].i
0ffa91dd 11930 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11931 {
91e22acd 11932 static const char *aeabi_enum_names[] =
bf21ed78 11933 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11934 const char *in_name =
11935 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11936 ? aeabi_enum_names[in_attr[i].i]
11937 : "<unknown>";
11938 const char *out_name =
11939 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11940 ? aeabi_enum_names[out_attr[i].i]
11941 : "<unknown>";
ee065d83 11942 _bfd_error_handler
bf21ed78 11943 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11944 ibfd, in_name, out_name);
ee065d83
PB		 11945 }
11946 }
11947 break;
11948 case Tag_ABI_VFP_args:
11949 /* Aready done. */
11950 break;
11951 case Tag_ABI_WMMX_args:
11952 if (in_attr[i].i != out_attr[i].i)
11953 {
11954 _bfd_error_handler
3895f852 11955 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11956 ibfd, obfd);
91e22acd 11957 result = FALSE;
ee065d83
PB		 11958 }
11959 break;
7b86a9fa
AS		 11960 case Tag_compatibility:
11961 /* Merged in target-independent code. */
11962 break;
91e22acd 11963 case Tag_ABI_HardFP_use:
4547cb56 11964 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11965 break;
11966 case Tag_ABI_FP_16bit_format:
11967 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11968 {
11969 if (in_attr[i].i != out_attr[i].i)
11970 {
11971 _bfd_error_handler
3895f852 11972 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11973 ibfd, obfd);
11974 result = FALSE;
11975 }
11976 }
11977 if (in_attr[i].i != 0)
11978 out_attr[i].i = in_attr[i].i;
11979 break;
7b86a9fa 11980
cd21e546 11981 case Tag_DIV_use:
ac56ee8f
MGD		 11982 /* A value of zero on input means that the divide instruction may
11983 be used if available in the base architecture as specified via
11984 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11985 the user did not want divide instructions. A value of 2
11986 explicitly means that divide instructions were allowed in ARM
11987 and Thumb state. */
11988 if (in_attr[i].i == out_attr[i].i)
11989 /* Do nothing. */ ;
11990 else if (elf32_arm_attributes_forbid_div (in_attr)
11991 && !elf32_arm_attributes_accept_div (out_attr))
11992 out_attr[i].i = 1;
11993 else if (elf32_arm_attributes_forbid_div (out_attr)
11994 && elf32_arm_attributes_accept_div (in_attr))
11995 out_attr[i].i = in_attr[i].i;
11996 else if (in_attr[i].i == 2)
11997 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 11998 break;
11999
12000 case Tag_MPextension_use_legacy:
12001 /* We don't output objects with Tag_MPextension_use_legacy - we
12002 move the value to Tag_MPextension_use. */
12003 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12004 {
12005 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12006 {
12007 _bfd_error_handler
12008 (_("%B has has both the current and legacy "
b38cadfb 12009 "Tag_MPextension_use attributes"),
cd21e546
MGD		 12010 ibfd);
12011 result = FALSE;
12012 }
12013 }
12014
12015 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12016 out_attr[Tag_MPextension_use] = in_attr[i];
12017
12018 break;
12019
91e22acd 12020 case Tag_nodefaults:
2d0bb761
AS		 12021 /* This tag is set if it exists, but the value is unused (and is
12022 typically zero). We don't actually need to do anything here -
12023 the merge happens automatically when the type flags are merged
12024 below. */
91e22acd
AS		 12025 break;
12026 case Tag_also_compatible_with:
12027 /* Already done in Tag_CPU_arch. */
12028 break;
12029 case Tag_conformance:
12030 /* Keep the attribute if it matches. Throw it away otherwise.
12031 No attribute means no claim to conform. */
12032 if (!in_attr[i].s || !out_attr[i].s
12033 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12034 out_attr[i].s = NULL;
12035 break;
3cfad14c 12036
91e22acd 12037 default:
e8b36cd1
JM		 12038 result
12039 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 12040 }
12041
12042 /* If out_attr was copied from in_attr then it won't have a type yet. */
12043 if (in_attr[i].type && !out_attr[i].type)
12044 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 12045 }
12046
104d59d1 12047 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 12048 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12049 return FALSE;
ee065d83 12050
104d59d1 12051 /* Check for any attributes not known on ARM. */
e8b36cd1 12052 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 12053
91e22acd 12054 return result;
252b5132
RH		 12055}
12056
3a4a14e9
PB		 12057
12058/* Return TRUE if the two EABI versions are incompatible. */
12059
12060static bfd_boolean
12061elf32_arm_versions_compatible (unsigned iver, unsigned over)
12062{
12063 /* v4 and v5 are the same spec before and after it was released,
12064 so allow mixing them. */
12065 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12066 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12067 return TRUE;
12068
12069 return (iver == over);
12070}
12071
252b5132
RH		 12072/* Merge backend specific data from an object file to the output
12073 object file when linking. */
9b485d32 12074
b34976b6 12075static bfd_boolean
21d799b5 12076elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12077
9b485d32
NC		 12078/* Display the flags field. */
12079
b34976b6 12080static bfd_boolean
57e8b36a 12081elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12082{
fc830a83
NC		 12083 FILE * file = (FILE *) ptr;
12084 unsigned long flags;
252b5132
RH		 12085
12086 BFD_ASSERT (abfd != NULL && ptr != NULL);
12087
12088 /* Print normal ELF private data. */
12089 _bfd_elf_print_private_bfd_data (abfd, ptr);
12090
fc830a83 12091 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12092 /* Ignore init flag - it may not be set, despite the flags field
12093 containing valid data. */
252b5132
RH		 12094
12095 /* xgettext:c-format */
9b485d32 12096 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12097
fc830a83
NC		 12098 switch (EF_ARM_EABI_VERSION (flags))
12099 {
12100 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12101 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12102 official ARM ELF extended ABI. Hence they are only decoded if
12103 the EABI version is not set. */
fd2ec330 12104 if (flags & EF_ARM_INTERWORK)
9b485d32 12105 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12106
fd2ec330 12107 if (flags & EF_ARM_APCS_26)
6c571f00 12108 fprintf (file, " [APCS-26]");
fc830a83 12109 else
6c571f00 12110 fprintf (file, " [APCS-32]");
9a5aca8c 12111
96a846ea
RE		 12112 if (flags & EF_ARM_VFP_FLOAT)
12113 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12114 else if (flags & EF_ARM_MAVERICK_FLOAT)
12115 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12116 else
12117 fprintf (file, _(" [FPA float format]"));
12118
fd2ec330 12119 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12120 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12121
fd2ec330 12122 if (flags & EF_ARM_PIC)
9b485d32 12123 fprintf (file, _(" [position independent]"));
fc830a83 12124
fd2ec330 12125 if (flags & EF_ARM_NEW_ABI)
9b485d32 12126 fprintf (file, _(" [new ABI]"));
9a5aca8c 12127
fd2ec330 12128 if (flags & EF_ARM_OLD_ABI)
9b485d32 12129 fprintf (file, _(" [old ABI]"));
9a5aca8c 12130
fd2ec330 12131 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12132 fprintf (file, _(" [software FP]"));
9a5aca8c 12133
96a846ea
RE		 12134 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12135 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12136 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12137 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12138 break;
9a5aca8c 12139
fc830a83 12140 case EF_ARM_EABI_VER1:
9b485d32 12141 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12142
fc830a83 12143 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12144 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12145 else
9b485d32 12146 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12147
fc830a83
NC		 12148 flags &= ~ EF_ARM_SYMSARESORTED;
12149 break;
9a5aca8c 12150
fd2ec330
PB		 12151 case EF_ARM_EABI_VER2:
12152 fprintf (file, _(" [Version2 EABI]"));
12153
12154 if (flags & EF_ARM_SYMSARESORTED)
12155 fprintf (file, _(" [sorted symbol table]"));
12156 else
12157 fprintf (file, _(" [unsorted symbol table]"));
12158
12159 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12160 fprintf (file, _(" [dynamic symbols use segment index]"));
12161
12162 if (flags & EF_ARM_MAPSYMSFIRST)
12163 fprintf (file, _(" [mapping symbols precede others]"));
12164
99e4ae17 12165 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12166 | EF_ARM_MAPSYMSFIRST);
12167 break;
12168
d507cf36
PB		 12169 case EF_ARM_EABI_VER3:
12170 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12171 break;
12172
12173 case EF_ARM_EABI_VER4:
12174 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12175 goto eabi;
d507cf36 12176
3a4a14e9
PB		 12177 case EF_ARM_EABI_VER5:
12178 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12179
12180 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12181 fprintf (file, _(" [soft-float ABI]"));
12182
12183 if (flags & EF_ARM_ABI_FLOAT_HARD)
12184 fprintf (file, _(" [hard-float ABI]"));
12185
12186 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12187
3a4a14e9 12188 eabi:
d507cf36
PB		 12189 if (flags & EF_ARM_BE8)
12190 fprintf (file, _(" [BE8]"));
12191
12192 if (flags & EF_ARM_LE8)
12193 fprintf (file, _(" [LE8]"));
12194
12195 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12196 break;
12197
fc830a83 12198 default:
9b485d32 12199 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12200 break;
12201 }
252b5132 12202
fc830a83 12203 flags &= ~ EF_ARM_EABIMASK;
252b5132 12204
fc830a83 12205 if (flags & EF_ARM_RELEXEC)
9b485d32 12206 fprintf (file, _(" [relocatable executable]"));
252b5132 12207
fc830a83 12208 if (flags & EF_ARM_HASENTRY)
9b485d32 12209 fprintf (file, _(" [has entry point]"));
252b5132 12210
fc830a83
NC		 12211 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12212
12213 if (flags)
9b485d32 12214 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12215
252b5132
RH		 12216 fputc ('\n', file);
12217
b34976b6 12218 return TRUE;
252b5132
RH		 12219}
12220
12221static int
57e8b36a 12222elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12223{
2f0ca46a
NC		 12224 switch (ELF_ST_TYPE (elf_sym->st_info))
12225 {
12226 case STT_ARM_TFUNC:
12227 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12228
2f0ca46a
NC		 12229 case STT_ARM_16BIT:
12230 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12231 This allows us to distinguish between data used by Thumb instructions
12232 and non-data (which is probably code) inside Thumb regions of an
12233 executable. */
1a0eb693 12234 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12235 return ELF_ST_TYPE (elf_sym->st_info);
12236 break;
9a5aca8c 12237
ce855c42
NC		 12238 default:
12239 break;
2f0ca46a
NC		 12240 }
12241
12242 return type;
252b5132 12243}
f21f3fe0 12244
252b5132 12245static asection *
07adf181
AM		 12246elf32_arm_gc_mark_hook (asection *sec,
12247 struct bfd_link_info *info,
12248 Elf_Internal_Rela *rel,
12249 struct elf_link_hash_entry *h,
12250 Elf_Internal_Sym *sym)
252b5132
RH		 12251{
12252 if (h != NULL)
07adf181 12253 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12254 {
12255 case R_ARM_GNU_VTINHERIT:
12256 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12257 return NULL;
12258 }
9ad5cbcf 12259
07adf181 12260 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12261}
12262
780a67af
NC		 12263/* Update the got entry reference counts for the section being removed. */
12264
b34976b6 12265static bfd_boolean
ba93b8ac
DJ		 12266elf32_arm_gc_sweep_hook (bfd * abfd,
12267 struct bfd_link_info * info,
12268 asection * sec,
12269 const Elf_Internal_Rela * relocs)
252b5132 12270{
5e681ec4
PB		 12271 Elf_Internal_Shdr *symtab_hdr;
12272 struct elf_link_hash_entry **sym_hashes;
12273 bfd_signed_vma *local_got_refcounts;
12274 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12275 struct elf32_arm_link_hash_table * globals;
12276
7dda2462
TG		 12277 if (info->relocatable)
12278 return TRUE;
12279
eb043451 12280 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12281 if (globals == NULL)
12282 return FALSE;
5e681ec4
PB		 12283
12284 elf_section_data (sec)->local_dynrel = NULL;
12285
0ffa91dd 12286 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12287 sym_hashes = elf_sym_hashes (abfd);
12288 local_got_refcounts = elf_local_got_refcounts (abfd);
12289
906e58ca 12290 check_use_blx (globals);
bd97cb95 12291
5e681ec4
PB		 12292 relend = relocs + sec->reloc_count;
12293 for (rel = relocs; rel < relend; rel++)
eb043451 12294 {
3eb128b2
AM		 12295 unsigned long r_symndx;
12296 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12297 struct elf32_arm_link_hash_entry *eh;
eb043451 12298 int r_type;
34e77a92 12299 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12300 bfd_boolean may_become_dynamic_p;
12301 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12302 union gotplt_union *root_plt;
12303 struct arm_plt_info *arm_plt;
5e681ec4 12304
3eb128b2
AM		 12305 r_symndx = ELF32_R_SYM (rel->r_info);
12306 if (r_symndx >= symtab_hdr->sh_info)
12307 {
12308 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12309 while (h->root.type == bfd_link_hash_indirect
12310 || h->root.type == bfd_link_hash_warning)
12311 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12312 }
f6e32f6d
RS		 12313 eh = (struct elf32_arm_link_hash_entry *) h;
12314
34e77a92 12315 call_reloc_p = FALSE;
f6e32f6d
RS		 12316 may_become_dynamic_p = FALSE;
12317 may_need_local_target_p = FALSE;
3eb128b2 12318
eb043451 12319 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12320 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12321 switch (r_type)
12322 {
12323 case R_ARM_GOT32:
eb043451 12324 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12325 case R_ARM_TLS_GD32:
12326 case R_ARM_TLS_IE32:
3eb128b2 12327 if (h != NULL)
eb043451 12328 {
eb043451
PB		 12329 if (h->got.refcount > 0)
12330 h->got.refcount -= 1;
12331 }
12332 else if (local_got_refcounts != NULL)
12333 {
12334 if (local_got_refcounts[r_symndx] > 0)
12335 local_got_refcounts[r_symndx] -= 1;
12336 }
12337 break;
12338
ba93b8ac 12339 case R_ARM_TLS_LDM32:
4dfe6ac6 12340 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12341 break;
12342
eb043451
PB		 12343 case R_ARM_PC24:
12344 case R_ARM_PLT32:
5b5bb741
PB		 12345 case R_ARM_CALL:
12346 case R_ARM_JUMP24:
eb043451 12347 case R_ARM_PREL31:
c19d1205 12348 case R_ARM_THM_CALL:
bd97cb95
DJ		 12349 case R_ARM_THM_JUMP24:
12350 case R_ARM_THM_JUMP19:
34e77a92 12351 call_reloc_p = TRUE;
f6e32f6d
RS		 12352 may_need_local_target_p = TRUE;
12353 break;
12354
12355 case R_ARM_ABS12:
12356 if (!globals->vxworks_p)
12357 {
12358 may_need_local_target_p = TRUE;
12359 break;
12360 }
12361 /* Fall through. */
12362 case R_ARM_ABS32:
12363 case R_ARM_ABS32_NOI:
12364 case R_ARM_REL32:
12365 case R_ARM_REL32_NOI:
b6895b4f
PB		 12366 case R_ARM_MOVW_ABS_NC:
12367 case R_ARM_MOVT_ABS:
12368 case R_ARM_MOVW_PREL_NC:
12369 case R_ARM_MOVT_PREL:
12370 case R_ARM_THM_MOVW_ABS_NC:
12371 case R_ARM_THM_MOVT_ABS:
12372 case R_ARM_THM_MOVW_PREL_NC:
12373 case R_ARM_THM_MOVT_PREL:
b7693d02 12374 /* Should the interworking branches be here also? */
f6e32f6d 12375 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12376 && (sec->flags & SEC_ALLOC) != 0)
12377 {
12378 if (h == NULL
12379 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12380 {
12381 call_reloc_p = TRUE;
12382 may_need_local_target_p = TRUE;
12383 }
12384 else
12385 may_become_dynamic_p = TRUE;
12386 }
f6e32f6d
RS		 12387 else
12388 may_need_local_target_p = TRUE;
12389 break;
b7693d02 12390
f6e32f6d
RS		 12391 default:
12392 break;
12393 }
5e681ec4 12394
34e77a92
RS		 12395 if (may_need_local_target_p
12396 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12397 {
27586251
HPN		 12398 /* If PLT refcount book-keeping is wrong and too low, we'll
12399 see a zero value (going to -1) for the root PLT reference
12400 count. */
12401 if (root_plt->refcount >= 0)
12402 {
12403 BFD_ASSERT (root_plt->refcount != 0);
12404 root_plt->refcount -= 1;
12405 }
12406 else
12407 /* A value of -1 means the symbol has become local, forced
12408 or seeing a hidden definition. Any other negative value
12409 is an error. */
12410 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12411
12412 if (!call_reloc_p)
12413 arm_plt->noncall_refcount--;
5e681ec4 12414
f6e32f6d 12415 if (r_type == R_ARM_THM_CALL)
34e77a92 12416 arm_plt->maybe_thumb_refcount--;
bd97cb95 12417
f6e32f6d
RS		 12418 if (r_type == R_ARM_THM_JUMP24
12419 || r_type == R_ARM_THM_JUMP19)
34e77a92 12420 arm_plt->thumb_refcount--;
f6e32f6d 12421 }
5e681ec4 12422
34e77a92 12423 if (may_become_dynamic_p)
f6e32f6d
RS		 12424 {
12425 struct elf_dyn_relocs **pp;
12426 struct elf_dyn_relocs *p;
5e681ec4 12427
34e77a92 12428 if (h != NULL)
9c489990 12429 pp = &(eh->dyn_relocs);
34e77a92
RS		 12430 else
12431 {
12432 Elf_Internal_Sym *isym;
12433
12434 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12435 abfd, r_symndx);
12436 if (isym == NULL)
12437 return FALSE;
12438 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12439 if (pp == NULL)
12440 return FALSE;
12441 }
9c489990 12442 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12443 if (p->sec == sec)
12444 {
12445 /* Everything must go for SEC. */
12446 *pp = p->next;
12447 break;
12448 }
eb043451
PB		 12449 }
12450 }
5e681ec4 12451
b34976b6 12452 return TRUE;
252b5132
RH		 12453}
12454
780a67af
NC		 12455/* Look through the relocs for a section during the first phase. */
12456
b34976b6 12457static bfd_boolean
57e8b36a
NC		 12458elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12459 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12460{
b34976b6
AM		 12461 Elf_Internal_Shdr *symtab_hdr;
12462 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12463 const Elf_Internal_Rela *rel;
12464 const Elf_Internal_Rela *rel_end;
12465 bfd *dynobj;
5e681ec4 12466 asection *sreloc;
5e681ec4 12467 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12468 bfd_boolean call_reloc_p;
12469 bfd_boolean may_become_dynamic_p;
12470 bfd_boolean may_need_local_target_p;
ce98a316 12471 unsigned long nsyms;
9a5aca8c 12472
1049f94e 12473 if (info->relocatable)
b34976b6 12474 return TRUE;
9a5aca8c 12475
0ffa91dd
NC		 12476 BFD_ASSERT (is_arm_elf (abfd));
12477
5e681ec4 12478 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12479 if (htab == NULL)
12480 return FALSE;
12481
5e681ec4 12482 sreloc = NULL;
9a5aca8c 12483
67687978
PB		 12484 /* Create dynamic sections for relocatable executables so that we can
12485 copy relocations. */
12486 if (htab->root.is_relocatable_executable
12487 && ! htab->root.dynamic_sections_created)
12488 {
12489 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12490 return FALSE;
12491 }
12492
cbc704f3
RS		 12493 if (htab->root.dynobj == NULL)
12494 htab->root.dynobj = abfd;
34e77a92
RS		 12495 if (!create_ifunc_sections (info))
12496 return FALSE;
cbc704f3
RS		 12497
12498 dynobj = htab->root.dynobj;
12499
0ffa91dd 12500 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12501 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12502 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12503
252b5132
RH		 12504 rel_end = relocs + sec->reloc_count;
12505 for (rel = relocs; rel < rel_end; rel++)
12506 {
34e77a92 12507 Elf_Internal_Sym *isym;
252b5132 12508 struct elf_link_hash_entry *h;
b7693d02 12509 struct elf32_arm_link_hash_entry *eh;
252b5132 12510 unsigned long r_symndx;
eb043451 12511 int r_type;
9a5aca8c 12512
252b5132 12513 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12514 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12515 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12516
ce98a316
NC		 12517 if (r_symndx >= nsyms
12518 /* PR 9934: It is possible to have relocations that do not
12519 refer to symbols, thus it is also possible to have an
12520 object file containing relocations but no symbol table. */
cf35638d 12521 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12522 {
12523 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12524 r_symndx);
ba93b8ac
DJ		 12525 return FALSE;
12526 }
12527
34e77a92
RS		 12528 h = NULL;
12529 isym = NULL;
12530 if (nsyms > 0)
973a3492 12531 {
34e77a92
RS		 12532 if (r_symndx < symtab_hdr->sh_info)
12533 {
12534 /* A local symbol. */
12535 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12536 abfd, r_symndx);
12537 if (isym == NULL)
12538 return FALSE;
12539 }
12540 else
12541 {
12542 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12543 while (h->root.type == bfd_link_hash_indirect
12544 || h->root.type == bfd_link_hash_warning)
12545 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 12546
12547 /* PR15323, ref flags aren't set for references in the
12548 same object. */
12549 h->root.non_ir_ref = 1;
34e77a92 12550 }
973a3492 12551 }
9a5aca8c 12552
b7693d02
DJ		 12553 eh = (struct elf32_arm_link_hash_entry *) h;
12554
f6e32f6d
RS		 12555 call_reloc_p = FALSE;
12556 may_become_dynamic_p = FALSE;
12557 may_need_local_target_p = FALSE;
12558
0855e32b
NS		 12559 /* Could be done earlier, if h were already available. */
12560 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12561 switch (r_type)
99059e56 12562 {
5e681ec4 12563 case R_ARM_GOT32:
eb043451 12564 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12565 case R_ARM_TLS_GD32:
12566 case R_ARM_TLS_IE32:
0855e32b
NS		 12567 case R_ARM_TLS_GOTDESC:
12568 case R_ARM_TLS_DESCSEQ:
12569 case R_ARM_THM_TLS_DESCSEQ:
12570 case R_ARM_TLS_CALL:
12571 case R_ARM_THM_TLS_CALL:
5e681ec4 12572 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12573 {
12574 int tls_type, old_tls_type;
5e681ec4 12575
ba93b8ac
DJ		 12576 switch (r_type)
12577 {
12578 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12579
ba93b8ac 12580 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12581
0855e32b
NS		 12582 case R_ARM_TLS_GOTDESC:
12583 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12584 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12585 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12586
ba93b8ac
DJ		 12587 default: tls_type = GOT_NORMAL; break;
12588 }
252b5132 12589
ba93b8ac
DJ		 12590 if (h != NULL)
12591 {
12592 h->got.refcount++;
12593 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12594 }
12595 else
12596 {
ba93b8ac 12597 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12598 if (!elf32_arm_allocate_local_sym_info (abfd))
12599 return FALSE;
12600 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12601 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12602 }
12603
0855e32b 12604 /* If a variable is accessed with both tls methods, two
99059e56 12605 slots may be created. */
0855e32b
NS		 12606 if (GOT_TLS_GD_ANY_P (old_tls_type)
12607 && GOT_TLS_GD_ANY_P (tls_type))
12608 tls_type |= old_tls_type;
12609
12610 /* We will already have issued an error message if there
12611 is a TLS/non-TLS mismatch, based on the symbol
12612 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12613 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12614 && tls_type != GOT_NORMAL)
12615 tls_type |= old_tls_type;
12616
0855e32b 12617 /* If the symbol is accessed in both IE and GDESC
99059e56
RM		 12618 method, we're able to relax. Turn off the GDESC flag,
12619 without messing up with any other kind of tls types
12620 that may be involved */
0855e32b
NS		 12621 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12622 tls_type &= ~GOT_TLS_GDESC;
12623
ba93b8ac
DJ		 12624 if (old_tls_type != tls_type)
12625 {
12626 if (h != NULL)
12627 elf32_arm_hash_entry (h)->tls_type = tls_type;
12628 else
12629 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12630 }
12631 }
8029a119 12632 /* Fall through. */
ba93b8ac
DJ		 12633
12634 case R_ARM_TLS_LDM32:
12635 if (r_type == R_ARM_TLS_LDM32)
12636 htab->tls_ldm_got.refcount++;
8029a119 12637 /* Fall through. */
252b5132 12638
c19d1205 12639 case R_ARM_GOTOFF32:
5e681ec4 12640 case R_ARM_GOTPC:
cbc704f3
RS		 12641 if (htab->root.sgot == NULL
12642 && !create_got_section (htab->root.dynobj, info))
12643 return FALSE;
252b5132
RH		 12644 break;
12645
252b5132 12646 case R_ARM_PC24:
7359ea65 12647 case R_ARM_PLT32:
5b5bb741
PB		 12648 case R_ARM_CALL:
12649 case R_ARM_JUMP24:
eb043451 12650 case R_ARM_PREL31:
c19d1205 12651 case R_ARM_THM_CALL:
bd97cb95
DJ		 12652 case R_ARM_THM_JUMP24:
12653 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12654 call_reloc_p = TRUE;
12655 may_need_local_target_p = TRUE;
12656 break;
12657
12658 case R_ARM_ABS12:
12659 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12660 ldr __GOTT_INDEX__ offsets. */
12661 if (!htab->vxworks_p)
12662 {
12663 may_need_local_target_p = TRUE;
12664 break;
12665 }
12666 /* Fall through. */
39623e12 12667
96c23d59
JM		 12668 case R_ARM_MOVW_ABS_NC:
12669 case R_ARM_MOVT_ABS:
12670 case R_ARM_THM_MOVW_ABS_NC:
12671 case R_ARM_THM_MOVT_ABS:
12672 if (info->shared)
12673 {
12674 (*_bfd_error_handler)
12675 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12676 abfd, elf32_arm_howto_table_1[r_type].name,
12677 (h) ? h->root.root.string : "a local symbol");
12678 bfd_set_error (bfd_error_bad_value);
12679 return FALSE;
12680 }
12681
12682 /* Fall through. */
39623e12
PB		 12683 case R_ARM_ABS32:
12684 case R_ARM_ABS32_NOI:
12685 case R_ARM_REL32:
12686 case R_ARM_REL32_NOI:
b6895b4f
PB		 12687 case R_ARM_MOVW_PREL_NC:
12688 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12689 case R_ARM_THM_MOVW_PREL_NC:
12690 case R_ARM_THM_MOVT_PREL:
39623e12 12691
b7693d02 12692 /* Should the interworking branches be listed here? */
67687978 12693 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12694 && (sec->flags & SEC_ALLOC) != 0)
12695 {
12696 if (h == NULL
12697 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12698 {
12699 /* In shared libraries and relocatable executables,
12700 we treat local relative references as calls;
12701 see the related SYMBOL_CALLS_LOCAL code in
12702 allocate_dynrelocs. */
12703 call_reloc_p = TRUE;
12704 may_need_local_target_p = TRUE;
12705 }
12706 else
12707 /* We are creating a shared library or relocatable
12708 executable, and this is a reloc against a global symbol,
12709 or a non-PC-relative reloc against a local symbol.
12710 We may need to copy the reloc into the output. */
12711 may_become_dynamic_p = TRUE;
12712 }
f6e32f6d
RS		 12713 else
12714 may_need_local_target_p = TRUE;
252b5132
RH		 12715 break;
12716
99059e56
RM		 12717 /* This relocation describes the C++ object vtable hierarchy.
12718 Reconstruct it for later use during GC. */
12719 case R_ARM_GNU_VTINHERIT:
12720 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12721 return FALSE;
12722 break;
12723
12724 /* This relocation describes which C++ vtable entries are actually
12725 used. Record for later use during GC. */
12726 case R_ARM_GNU_VTENTRY:
12727 BFD_ASSERT (h != NULL);
12728 if (h != NULL
12729 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12730 return FALSE;
12731 break;
12732 }
f6e32f6d
RS		 12733
12734 if (h != NULL)
12735 {
12736 if (call_reloc_p)
12737 /* We may need a .plt entry if the function this reloc
12738 refers to is in a different object, regardless of the
12739 symbol's type. We can't tell for sure yet, because
12740 something later might force the symbol local. */
12741 h->needs_plt = 1;
12742 else if (may_need_local_target_p)
12743 /* If this reloc is in a read-only section, we might
12744 need a copy reloc. We can't check reliably at this
12745 stage whether the section is read-only, as input
12746 sections have not yet been mapped to output sections.
12747 Tentatively set the flag for now, and correct in
12748 adjust_dynamic_symbol. */
12749 h->non_got_ref = 1;
12750 }
12751
34e77a92
RS		 12752 if (may_need_local_target_p
12753 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12754 {
34e77a92
RS		 12755 union gotplt_union *root_plt;
12756 struct arm_plt_info *arm_plt;
12757 struct arm_local_iplt_info *local_iplt;
12758
12759 if (h != NULL)
12760 {
12761 root_plt = &h->plt;
12762 arm_plt = &eh->plt;
12763 }
12764 else
12765 {
12766 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12767 if (local_iplt == NULL)
12768 return FALSE;
12769 root_plt = &local_iplt->root;
12770 arm_plt = &local_iplt->arm;
12771 }
12772
f6e32f6d
RS		 12773 /* If the symbol is a function that doesn't bind locally,
12774 this relocation will need a PLT entry. */
a8c887dd
NC		 12775 if (root_plt->refcount != -1)
12776 root_plt->refcount += 1;
34e77a92
RS		 12777
12778 if (!call_reloc_p)
12779 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12780
12781 /* It's too early to use htab->use_blx here, so we have to
12782 record possible blx references separately from
12783 relocs that definitely need a thumb stub. */
12784
12785 if (r_type == R_ARM_THM_CALL)
34e77a92 12786 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12787
12788 if (r_type == R_ARM_THM_JUMP24
12789 || r_type == R_ARM_THM_JUMP19)
34e77a92 12790 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12791 }
12792
12793 if (may_become_dynamic_p)
12794 {
12795 struct elf_dyn_relocs *p, **head;
12796
12797 /* Create a reloc section in dynobj. */
12798 if (sreloc == NULL)
12799 {
12800 sreloc = _bfd_elf_make_dynamic_reloc_section
12801 (sec, dynobj, 2, abfd, ! htab->use_rel);
12802
12803 if (sreloc == NULL)
12804 return FALSE;
12805
12806 /* BPABI objects never have dynamic relocations mapped. */
12807 if (htab->symbian_p)
12808 {
12809 flagword flags;
12810
12811 flags = bfd_get_section_flags (dynobj, sreloc);
12812 flags &= ~(SEC_LOAD | SEC_ALLOC);
12813 bfd_set_section_flags (dynobj, sreloc, flags);
12814 }
12815 }
12816
12817 /* If this is a global symbol, count the number of
12818 relocations we need for this symbol. */
12819 if (h != NULL)
12820 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12821 else
12822 {
34e77a92
RS		 12823 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12824 if (head == NULL)
f6e32f6d 12825 return FALSE;
f6e32f6d
RS		 12826 }
12827
12828 p = *head;
12829 if (p == NULL || p->sec != sec)
12830 {
12831 bfd_size_type amt = sizeof *p;
12832
12833 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12834 if (p == NULL)
12835 return FALSE;
12836 p->next = *head;
12837 *head = p;
12838 p->sec = sec;
12839 p->count = 0;
12840 p->pc_count = 0;
12841 }
12842
12843 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12844 p->pc_count += 1;
12845 p->count += 1;
12846 }
252b5132 12847 }
f21f3fe0 12848
b34976b6 12849 return TRUE;
252b5132
RH		 12850}
12851
6a5bb875
PB		 12852/* Unwinding tables are not referenced directly. This pass marks them as
12853 required if the corresponding code section is marked. */
12854
12855static bfd_boolean
906e58ca
NC		 12856elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12857 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12858{
12859 bfd *sub;
12860 Elf_Internal_Shdr **elf_shdrp;
12861 bfd_boolean again;
12862
7f6ab9f8
AM		 12863 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12864
6a5bb875
PB		 12865 /* Marking EH data may cause additional code sections to be marked,
12866 requiring multiple passes. */
12867 again = TRUE;
12868 while (again)
12869 {
12870 again = FALSE;
12871 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12872 {
12873 asection *o;
12874
0ffa91dd 12875 if (! is_arm_elf (sub))
6a5bb875
PB		 12876 continue;
12877
12878 elf_shdrp = elf_elfsections (sub);
12879 for (o = sub->sections; o != NULL; o = o->next)
12880 {
12881 Elf_Internal_Shdr *hdr;
0ffa91dd 12882
6a5bb875 12883 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12884 if (hdr->sh_type == SHT_ARM_EXIDX
12885 && hdr->sh_link
12886 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12887 && !o->gc_mark
12888 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12889 {
12890 again = TRUE;
12891 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12892 return FALSE;
12893 }
12894 }
12895 }
12896 }
12897
12898 return TRUE;
12899}
12900
3c9458e9
NC		 12901/* Treat mapping symbols as special target symbols. */
12902
12903static bfd_boolean
12904elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12905{
b0796911
PB		 12906 return bfd_is_arm_special_symbol_name (sym->name,
12907 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12908}
12909
0367ecfb
NC		 12910/* This is a copy of elf_find_function() from elf.c except that
12911 ARM mapping symbols are ignored when looking for function names
12912 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12913
0367ecfb
NC		 12914static bfd_boolean
12915arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12916 asection * section,
12917 asymbol ** symbols,
12918 bfd_vma offset,
12919 const char ** filename_ptr,
12920 const char ** functionname_ptr)
12921{
12922 const char * filename = NULL;
12923 asymbol * func = NULL;
12924 bfd_vma low_func = 0;
12925 asymbol ** p;
252b5132
RH		 12926
12927 for (p = symbols; *p != NULL; p++)
12928 {
12929 elf_symbol_type *q;
12930
12931 q = (elf_symbol_type *) *p;
12932
252b5132
RH		 12933 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12934 {
12935 default:
12936 break;
12937 case STT_FILE:
12938 filename = bfd_asymbol_name (&q->symbol);
12939 break;
252b5132
RH		 12940 case STT_FUNC:
12941 case STT_ARM_TFUNC:
9d2da7ca 12942 case STT_NOTYPE:
b0796911 12943 /* Skip mapping symbols. */
0367ecfb 12944 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12945 && bfd_is_arm_special_symbol_name (q->symbol.name,
12946 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12947 continue;
12948 /* Fall through. */
6b40fcba 12949 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12950 && q->symbol.value >= low_func
12951 && q->symbol.value <= offset)
12952 {
12953 func = (asymbol *) q;
12954 low_func = q->symbol.value;
12955 }
12956 break;
12957 }
12958 }
12959
12960 if (func == NULL)
b34976b6 12961 return FALSE;
252b5132 12962
0367ecfb
NC		 12963 if (filename_ptr)
12964 *filename_ptr = filename;
12965 if (functionname_ptr)
12966 *functionname_ptr = bfd_asymbol_name (func);
12967
12968 return TRUE;
906e58ca 12969}
0367ecfb
NC		 12970
12971
12972/* Find the nearest line to a particular section and offset, for error
12973 reporting. This code is a duplicate of the code in elf.c, except
12974 that it uses arm_elf_find_function. */
12975
12976static bfd_boolean
12977elf32_arm_find_nearest_line (bfd * abfd,
12978 asection * section,
12979 asymbol ** symbols,
12980 bfd_vma offset,
12981 const char ** filename_ptr,
12982 const char ** functionname_ptr,
12983 unsigned int * line_ptr)
12984{
12985 bfd_boolean found = FALSE;
12986
12987 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12988
fc28f9aa 12989 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
99059e56 12990 section, symbols, offset,
0367ecfb 12991 filename_ptr, functionname_ptr,
9b8d1a36 12992 line_ptr, NULL, 0,
0367ecfb
NC		 12993 & elf_tdata (abfd)->dwarf2_find_line_info))
12994 {
12995 if (!*functionname_ptr)
12996 arm_elf_find_function (abfd, section, symbols, offset,
12997 *filename_ptr ? NULL : filename_ptr,
12998 functionname_ptr);
f21f3fe0 12999
0367ecfb
NC		 13000 return TRUE;
13001 }
13002
13003 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13004 & found, filename_ptr,
13005 functionname_ptr, line_ptr,
13006 & elf_tdata (abfd)->line_info))
13007 return FALSE;
13008
13009 if (found && (*functionname_ptr || *line_ptr))
13010 return TRUE;
13011
13012 if (symbols == NULL)
13013 return FALSE;
13014
13015 if (! arm_elf_find_function (abfd, section, symbols, offset,
13016 filename_ptr, functionname_ptr))
13017 return FALSE;
13018
13019 *line_ptr = 0;
b34976b6 13020 return TRUE;
252b5132
RH		 13021}
13022
4ab527b0
FF		 13023static bfd_boolean
13024elf32_arm_find_inliner_info (bfd * abfd,
13025 const char ** filename_ptr,
13026 const char ** functionname_ptr,
13027 unsigned int * line_ptr)
13028{
13029 bfd_boolean found;
13030 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13031 functionname_ptr, line_ptr,
13032 & elf_tdata (abfd)->dwarf2_find_line_info);
13033 return found;
13034}
13035
252b5132
RH		 13036/* Adjust a symbol defined by a dynamic object and referenced by a
13037 regular object. The current definition is in some section of the
13038 dynamic object, but we're not including those sections. We have to
13039 change the definition to something the rest of the link can
13040 understand. */
13041
b34976b6 13042static bfd_boolean
57e8b36a
NC		 13043elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13044 struct elf_link_hash_entry * h)
252b5132
RH		 13045{
13046 bfd * dynobj;
13047 asection * s;
b7693d02 13048 struct elf32_arm_link_hash_entry * eh;
67687978 13049 struct elf32_arm_link_hash_table *globals;
252b5132 13050
67687978 13051 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13052 if (globals == NULL)
13053 return FALSE;
13054
252b5132
RH		 13055 dynobj = elf_hash_table (info)->dynobj;
13056
13057 /* Make sure we know what is going on here. */
13058 BFD_ASSERT (dynobj != NULL
f5385ebf 13059 && (h->needs_plt
34e77a92 13060 || h->type == STT_GNU_IFUNC
f6e332e6 13061 || h->u.weakdef != NULL
f5385ebf
AM		 13062 || (h->def_dynamic
13063 && h->ref_regular
13064 && !h->def_regular)));
252b5132 13065
b7693d02
DJ		 13066 eh = (struct elf32_arm_link_hash_entry *) h;
13067
252b5132
RH		 13068 /* If this is a function, put it in the procedure linkage table. We
13069 will fill in the contents of the procedure linkage table later,
13070 when we know the address of the .got section. */
34e77a92 13071 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13072 {
34e77a92
RS		 13073 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13074 symbol binds locally. */
5e681ec4 13075 if (h->plt.refcount <= 0
34e77a92
RS		 13076 || (h->type != STT_GNU_IFUNC
13077 && (SYMBOL_CALLS_LOCAL (info, h)
13078 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13079 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13080 {
13081 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13082 file, but the symbol was never referred to by a dynamic
13083 object, or if all references were garbage collected. In
13084 such a case, we don't actually need to build a procedure
13085 linkage table, and we can just do a PC24 reloc instead. */
13086 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13087 eh->plt.thumb_refcount = 0;
13088 eh->plt.maybe_thumb_refcount = 0;
13089 eh->plt.noncall_refcount = 0;
f5385ebf 13090 h->needs_plt = 0;
252b5132
RH		 13091 }
13092
b34976b6 13093 return TRUE;
252b5132 13094 }
5e681ec4 13095 else
b7693d02
DJ		 13096 {
13097 /* It's possible that we incorrectly decided a .plt reloc was
13098 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13099 in check_relocs. We can't decide accurately between function
13100 and non-function syms in check-relocs; Objects loaded later in
13101 the link may change h->type. So fix it now. */
13102 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13103 eh->plt.thumb_refcount = 0;
13104 eh->plt.maybe_thumb_refcount = 0;
13105 eh->plt.noncall_refcount = 0;
b7693d02 13106 }
252b5132
RH		 13107
13108 /* If this is a weak symbol, and there is a real definition, the
13109 processor independent code will have arranged for us to see the
13110 real definition first, and we can just use the same value. */
f6e332e6 13111 if (h->u.weakdef != NULL)
252b5132 13112 {
f6e332e6
AM		 13113 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13114 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13115 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13116 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13117 return TRUE;
252b5132
RH		 13118 }
13119
ba93b8ac
DJ		 13120 /* If there are no non-GOT references, we do not need a copy
13121 relocation. */
13122 if (!h->non_got_ref)
13123 return TRUE;
13124
252b5132
RH		 13125 /* This is a reference to a symbol defined by a dynamic object which
13126 is not a function. */
13127
13128 /* If we are creating a shared library, we must presume that the
13129 only references to the symbol are via the global offset table.
13130 For such cases we need not do anything here; the relocations will
67687978
PB		 13131 be handled correctly by relocate_section. Relocatable executables
13132 can reference data in shared objects directly, so we don't need to
13133 do anything here. */
13134 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13135 return TRUE;
252b5132
RH		 13136
13137 /* We must allocate the symbol in our .dynbss section, which will
13138 become part of the .bss section of the executable. There will be
13139 an entry for this symbol in the .dynsym section. The dynamic
13140 object will contain position independent code, so all references
13141 from the dynamic object to this symbol will go through the global
13142 offset table. The dynamic linker will use the .dynsym entry to
13143 determine the address it must put in the global offset table, so
13144 both the dynamic object and the regular object will refer to the
13145 same memory location for the variable. */
3d4d4302 13146 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13147 BFD_ASSERT (s != NULL);
13148
13149 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13150 copy the initial value out of the dynamic object and into the
13151 runtime process image. We need to remember the offset into the
00a97672 13152 .rel(a).bss section we are going to use. */
1d7e9d18 13153 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13154 {
13155 asection *srel;
13156
3d4d4302 13157 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13158 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13159 h->needs_copy = 1;
252b5132
RH		 13160 }
13161
027297b7 13162 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13163}
13164
5e681ec4
PB		 13165/* Allocate space in .plt, .got and associated reloc sections for
13166 dynamic relocs. */
13167
13168static bfd_boolean
47beaa6a 13169allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13170{
13171 struct bfd_link_info *info;
13172 struct elf32_arm_link_hash_table *htab;
13173 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13174 struct elf_dyn_relocs *p;
5e681ec4
PB		 13175
13176 if (h->root.type == bfd_link_hash_indirect)
13177 return TRUE;
13178
e6a6bb22
AM		 13179 eh = (struct elf32_arm_link_hash_entry *) h;
13180
5e681ec4
PB		 13181 info = (struct bfd_link_info *) inf;
13182 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13183 if (htab == NULL)
13184 return FALSE;
5e681ec4 13185
34e77a92 13186 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13187 && h->plt.refcount > 0)
13188 {
13189 /* Make sure this symbol is output as a dynamic symbol.
13190 Undefined weak syms won't yet be marked as dynamic. */
13191 if (h->dynindx == -1
f5385ebf 13192 && !h->forced_local)
5e681ec4 13193 {
c152c796 13194 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13195 return FALSE;
13196 }
13197
34e77a92
RS		 13198 /* If the call in the PLT entry binds locally, the associated
13199 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13200 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13201 than the .plt section. */
13202 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13203 {
13204 eh->is_iplt = 1;
13205 if (eh->plt.noncall_refcount == 0
13206 && SYMBOL_REFERENCES_LOCAL (info, h))
13207 /* All non-call references can be resolved directly.
13208 This means that they can (and in some cases, must)
13209 resolve directly to the run-time target, rather than
13210 to the PLT. That in turns means that any .got entry
13211 would be equal to the .igot.plt entry, so there's
13212 no point having both. */
13213 h->got.refcount = 0;
13214 }
13215
5e681ec4 13216 if (info->shared
34e77a92 13217 || eh->is_iplt
7359ea65 13218 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13219 {
34e77a92 13220 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13221
5e681ec4
PB		 13222 /* If this symbol is not defined in a regular file, and we are
13223 not generating a shared library, then set the symbol to this
13224 location in the .plt. This is required to make function
13225 pointers compare as equal between the normal executable and
13226 the shared library. */
13227 if (! info->shared
f5385ebf 13228 && !h->def_regular)
5e681ec4 13229 {
34e77a92 13230 h->root.u.def.section = htab->root.splt;
5e681ec4 13231 h->root.u.def.value = h->plt.offset;
5e681ec4 13232
67d74e43
DJ		 13233 /* Make sure the function is not marked as Thumb, in case
13234 it is the target of an ABS32 relocation, which will
13235 point to the PLT entry. */
35fc36a8 13236 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13237 }
022f8312 13238
0855e32b 13239 htab->next_tls_desc_index++;
00a97672
RS		 13240
13241 /* VxWorks executables have a second set of relocations for
13242 each PLT entry. They go in a separate relocation section,
13243 which is processed by the kernel loader. */
13244 if (htab->vxworks_p && !info->shared)
13245 {
13246 /* There is a relocation for the initial PLT entry:
13247 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13248 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13249 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13250
13251 /* There are two extra relocations for each subsequent
13252 PLT entry: an R_ARM_32 relocation for the GOT entry,
13253 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13254 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13255 }
5e681ec4
PB		 13256 }
13257 else
13258 {
13259 h->plt.offset = (bfd_vma) -1;
f5385ebf 13260 h->needs_plt = 0;
5e681ec4
PB		 13261 }
13262 }
13263 else
13264 {
13265 h->plt.offset = (bfd_vma) -1;
f5385ebf 13266 h->needs_plt = 0;
5e681ec4
PB		 13267 }
13268
0855e32b
NS		 13269 eh = (struct elf32_arm_link_hash_entry *) h;
13270 eh->tlsdesc_got = (bfd_vma) -1;
13271
5e681ec4
PB		 13272 if (h->got.refcount > 0)
13273 {
13274 asection *s;
13275 bfd_boolean dyn;
ba93b8ac
DJ		 13276 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13277 int indx;
5e681ec4
PB		 13278
13279 /* Make sure this symbol is output as a dynamic symbol.
13280 Undefined weak syms won't yet be marked as dynamic. */
13281 if (h->dynindx == -1
f5385ebf 13282 && !h->forced_local)
5e681ec4 13283 {
c152c796 13284 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13285 return FALSE;
13286 }
13287
e5a52504
MM		 13288 if (!htab->symbian_p)
13289 {
362d30a1 13290 s = htab->root.sgot;
e5a52504 13291 h->got.offset = s->size;
ba93b8ac
DJ		 13292
13293 if (tls_type == GOT_UNKNOWN)
13294 abort ();
13295
13296 if (tls_type == GOT_NORMAL)
13297 /* Non-TLS symbols need one GOT slot. */
13298 s->size += 4;
13299 else
13300 {
99059e56
RM		 13301 if (tls_type & GOT_TLS_GDESC)
13302 {
0855e32b 13303 /* R_ARM_TLS_DESC needs 2 GOT slots. */
99059e56 13304 eh->tlsdesc_got
0855e32b
NS		 13305 = (htab->root.sgotplt->size
13306 - elf32_arm_compute_jump_table_size (htab));
99059e56
RM		 13307 htab->root.sgotplt->size += 8;
13308 h->got.offset = (bfd_vma) -2;
34e77a92 13309 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13310 reloc in the middle of .got.plt. */
99059e56
RM		 13311 htab->num_tls_desc++;
13312 }
0855e32b 13313
ba93b8ac 13314 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13315 {
13316 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13317 the symbol is both GD and GDESC, got.offset may
13318 have been overwritten. */
13319 h->got.offset = s->size;
13320 s->size += 8;
13321 }
13322
ba93b8ac
DJ		 13323 if (tls_type & GOT_TLS_IE)
13324 /* R_ARM_TLS_IE32 needs one GOT slot. */
13325 s->size += 4;
13326 }
13327
e5a52504 13328 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13329
13330 indx = 0;
13331 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13332 && (!info->shared
13333 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13334 indx = h->dynindx;
13335
13336 if (tls_type != GOT_NORMAL
13337 && (info->shared || indx != 0)
13338 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13339 || h->root.type != bfd_link_hash_undefweak))
13340 {
13341 if (tls_type & GOT_TLS_IE)
47beaa6a 13342 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13343
13344 if (tls_type & GOT_TLS_GD)
47beaa6a 13345 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13346
b38cadfb 13347 if (tls_type & GOT_TLS_GDESC)
0855e32b 13348 {
47beaa6a 13349 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13350 /* GDESC needs a trampoline to jump to. */
13351 htab->tls_trampoline = -1;
13352 }
13353
13354 /* Only GD needs it. GDESC just emits one relocation per
13355 2 entries. */
b38cadfb 13356 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13357 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13358 }
6f820c85 13359 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 13360 {
13361 if (htab->root.dynamic_sections_created)
13362 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13363 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13364 }
34e77a92
RS		 13365 else if (h->type == STT_GNU_IFUNC
13366 && eh->plt.noncall_refcount == 0)
13367 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13368 they all resolve dynamically instead. Reserve room for the
13369 GOT entry's R_ARM_IRELATIVE relocation. */
13370 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
31943882
WN		 13371 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13372 || h->root.type != bfd_link_hash_undefweak))
b436d854 13373 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13374 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13375 }
5e681ec4
PB		 13376 }
13377 else
13378 h->got.offset = (bfd_vma) -1;
13379
a4fd1a8e
PB		 13380 /* Allocate stubs for exported Thumb functions on v4t. */
13381 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13382 && h->def_regular
35fc36a8 13383 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13384 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13385 {
13386 struct elf_link_hash_entry * th;
13387 struct bfd_link_hash_entry * bh;
13388 struct elf_link_hash_entry * myh;
13389 char name[1024];
13390 asection *s;
13391 bh = NULL;
13392 /* Create a new symbol to regist the real location of the function. */
13393 s = h->root.u.def.section;
906e58ca 13394 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13395 _bfd_generic_link_add_one_symbol (info, s->owner,
13396 name, BSF_GLOBAL, s,
13397 h->root.u.def.value,
13398 NULL, TRUE, FALSE, &bh);
13399
13400 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13401 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13402 myh->forced_local = 1;
35fc36a8 13403 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13404 eh->export_glue = myh;
13405 th = record_arm_to_thumb_glue (info, h);
13406 /* Point the symbol at the stub. */
13407 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13408 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13409 h->root.u.def.section = th->root.u.def.section;
13410 h->root.u.def.value = th->root.u.def.value & ~1;
13411 }
13412
0bdcacaf 13413 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13414 return TRUE;
13415
13416 /* In the shared -Bsymbolic case, discard space allocated for
13417 dynamic pc-relative relocs against symbols which turn out to be
13418 defined in regular objects. For the normal shared case, discard
13419 space for pc-relative relocs that have become local due to symbol
13420 visibility changes. */
13421
67687978 13422 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13423 {
7bdca076 13424 /* The only relocs that use pc_count are R_ARM_REL32 and
99059e56
RM		 13425 R_ARM_REL32_NOI, which will appear on something like
13426 ".long foo - .". We want calls to protected symbols to resolve
13427 directly to the function rather than going via the plt. If people
13428 want function pointer comparisons to work as expected then they
13429 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13430 if (SYMBOL_CALLS_LOCAL (info, h))
13431 {
0bdcacaf 13432 struct elf_dyn_relocs **pp;
ba93b8ac 13433
0bdcacaf 13434 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13435 {
13436 p->count -= p->pc_count;
13437 p->pc_count = 0;
13438 if (p->count == 0)
13439 *pp = p->next;
13440 else
13441 pp = &p->next;
13442 }
13443 }
13444
4dfe6ac6 13445 if (htab->vxworks_p)
3348747a 13446 {
0bdcacaf 13447 struct elf_dyn_relocs **pp;
3348747a 13448
0bdcacaf 13449 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13450 {
0bdcacaf 13451 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13452 *pp = p->next;
13453 else
13454 pp = &p->next;
13455 }
13456 }
13457
ba93b8ac 13458 /* Also discard relocs on undefined weak syms with non-default
99059e56 13459 visibility. */
0bdcacaf 13460 if (eh->dyn_relocs != NULL
5e681ec4 13461 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13462 {
13463 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13464 eh->dyn_relocs = NULL;
22d606e9
AM		 13465
13466 /* Make sure undefined weak symbols are output as a dynamic
13467 symbol in PIEs. */
13468 else if (h->dynindx == -1
13469 && !h->forced_local)
13470 {
13471 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13472 return FALSE;
13473 }
13474 }
13475
67687978
PB		 13476 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13477 && h->root.type == bfd_link_hash_new)
13478 {
13479 /* Output absolute symbols so that we can create relocations
13480 against them. For normal symbols we output a relocation
13481 against the section that contains them. */
13482 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13483 return FALSE;
13484 }
13485
5e681ec4
PB		 13486 }
13487 else
13488 {
13489 /* For the non-shared case, discard space for relocs against
13490 symbols which turn out to need copy relocs or are not
13491 dynamic. */
13492
f5385ebf
AM		 13493 if (!h->non_got_ref
13494 && ((h->def_dynamic
13495 && !h->def_regular)
5e681ec4
PB		 13496 || (htab->root.dynamic_sections_created
13497 && (h->root.type == bfd_link_hash_undefweak
13498 || h->root.type == bfd_link_hash_undefined))))
13499 {
13500 /* Make sure this symbol is output as a dynamic symbol.
13501 Undefined weak syms won't yet be marked as dynamic. */
13502 if (h->dynindx == -1
f5385ebf 13503 && !h->forced_local)
5e681ec4 13504 {
c152c796 13505 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13506 return FALSE;
13507 }
13508
13509 /* If that succeeded, we know we'll be keeping all the
13510 relocs. */
13511 if (h->dynindx != -1)
13512 goto keep;
13513 }
13514
0bdcacaf 13515 eh->dyn_relocs = NULL;
5e681ec4
PB		 13516
13517 keep: ;
13518 }
13519
13520 /* Finally, allocate space. */
0bdcacaf 13521 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13522 {
0bdcacaf 13523 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13524 if (h->type == STT_GNU_IFUNC
13525 && eh->plt.noncall_refcount == 0
13526 && SYMBOL_REFERENCES_LOCAL (info, h))
13527 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13528 else
13529 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13530 }
13531
13532 return TRUE;
13533}
13534
08d1f311
DJ		 13535/* Find any dynamic relocs that apply to read-only sections. */
13536
13537static bfd_boolean
8029a119 13538elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13539{
8029a119 13540 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13541 struct elf_dyn_relocs * p;
08d1f311 13542
08d1f311 13543 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13544 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13545 {
0bdcacaf 13546 asection *s = p->sec;
08d1f311
DJ		 13547
13548 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13549 {
13550 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13551
13552 info->flags |= DF_TEXTREL;
13553
13554 /* Not an error, just cut short the traversal. */
13555 return FALSE;
13556 }
13557 }
13558 return TRUE;
13559}
13560
d504ffc8
DJ		 13561void
13562bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13563 int byteswap_code)
13564{
13565 struct elf32_arm_link_hash_table *globals;
13566
13567 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13568 if (globals == NULL)
13569 return;
13570
d504ffc8
DJ		 13571 globals->byteswap_code = byteswap_code;
13572}
13573
252b5132
RH		 13574/* Set the sizes of the dynamic sections. */
13575
b34976b6 13576static bfd_boolean
57e8b36a
NC		 13577elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13578 struct bfd_link_info * info)
252b5132
RH		 13579{
13580 bfd * dynobj;
13581 asection * s;
b34976b6
AM		 13582 bfd_boolean plt;
13583 bfd_boolean relocs;
5e681ec4
PB		 13584 bfd *ibfd;
13585 struct elf32_arm_link_hash_table *htab;
252b5132 13586
5e681ec4 13587 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13588 if (htab == NULL)
13589 return FALSE;
13590
252b5132
RH		 13591 dynobj = elf_hash_table (info)->dynobj;
13592 BFD_ASSERT (dynobj != NULL);
39b41c9c 13593 check_use_blx (htab);
252b5132
RH		 13594
13595 if (elf_hash_table (info)->dynamic_sections_created)
13596 {
13597 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13598 if (info->executable)
252b5132 13599 {
3d4d4302 13600 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13601 BFD_ASSERT (s != NULL);
eea6121a 13602 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13603 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13604 }
13605 }
5e681ec4
PB		 13606
13607 /* Set up .got offsets for local syms, and space for local dynamic
13608 relocs. */
13609 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13610 {
5e681ec4
PB		 13611 bfd_signed_vma *local_got;
13612 bfd_signed_vma *end_local_got;
34e77a92 13613 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13614 char *local_tls_type;
0855e32b 13615 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13616 bfd_size_type locsymcount;
13617 Elf_Internal_Shdr *symtab_hdr;
13618 asection *srel;
4dfe6ac6 13619 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13620 unsigned int symndx;
5e681ec4 13621
0ffa91dd 13622 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13623 continue;
13624
13625 for (s = ibfd->sections; s != NULL; s = s->next)
13626 {
0bdcacaf 13627 struct elf_dyn_relocs *p;
5e681ec4 13628
0bdcacaf 13629 for (p = (struct elf_dyn_relocs *)
99059e56 13630 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13631 {
0bdcacaf
RS		 13632 if (!bfd_is_abs_section (p->sec)
13633 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13634 {
13635 /* Input section has been discarded, either because
13636 it is a copy of a linkonce section or due to
13637 linker script /DISCARD/, so we'll be discarding
13638 the relocs too. */
13639 }
3348747a 13640 else if (is_vxworks
0bdcacaf 13641 && strcmp (p->sec->output_section->name,
3348747a
NS		 13642 ".tls_vars") == 0)
13643 {
13644 /* Relocations in vxworks .tls_vars sections are
13645 handled specially by the loader. */
13646 }
5e681ec4
PB		 13647 else if (p->count != 0)
13648 {
0bdcacaf 13649 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13650 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13651 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13652 info->flags |= DF_TEXTREL;
13653 }
13654 }
13655 }
13656
13657 local_got = elf_local_got_refcounts (ibfd);
13658 if (!local_got)
13659 continue;
13660
0ffa91dd 13661 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13662 locsymcount = symtab_hdr->sh_info;
13663 end_local_got = local_got + locsymcount;
34e77a92 13664 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13665 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13666 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13667 symndx = 0;
362d30a1
RS		 13668 s = htab->root.sgot;
13669 srel = htab->root.srelgot;
0855e32b 13670 for (; local_got < end_local_got;
34e77a92
RS		 13671 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13672 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13673 {
0855e32b 13674 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13675 local_iplt = *local_iplt_ptr;
13676 if (local_iplt != NULL)
13677 {
13678 struct elf_dyn_relocs *p;
13679
13680 if (local_iplt->root.refcount > 0)
13681 {
13682 elf32_arm_allocate_plt_entry (info, TRUE,
13683 &local_iplt->root,
13684 &local_iplt->arm);
13685 if (local_iplt->arm.noncall_refcount == 0)
13686 /* All references to the PLT are calls, so all
13687 non-call references can resolve directly to the
13688 run-time target. This means that the .got entry
13689 would be the same as the .igot.plt entry, so there's
13690 no point creating both. */
13691 *local_got = 0;
13692 }
13693 else
13694 {
13695 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13696 local_iplt->root.offset = (bfd_vma) -1;
13697 }
13698
13699 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13700 {
13701 asection *psrel;
13702
13703 psrel = elf_section_data (p->sec)->sreloc;
13704 if (local_iplt->arm.noncall_refcount == 0)
13705 elf32_arm_allocate_irelocs (info, psrel, p->count);
13706 else
13707 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13708 }
13709 }
5e681ec4
PB		 13710 if (*local_got > 0)
13711 {
34e77a92
RS		 13712 Elf_Internal_Sym *isym;
13713
eea6121a 13714 *local_got = s->size;
ba93b8ac
DJ		 13715 if (*local_tls_type & GOT_TLS_GD)
13716 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13717 s->size += 8;
0855e32b
NS		 13718 if (*local_tls_type & GOT_TLS_GDESC)
13719 {
13720 *local_tlsdesc_gotent = htab->root.sgotplt->size
13721 - elf32_arm_compute_jump_table_size (htab);
13722 htab->root.sgotplt->size += 8;
13723 *local_got = (bfd_vma) -2;
34e77a92 13724 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13725 reloc in the middle of .got.plt. */
99059e56 13726 htab->num_tls_desc++;
0855e32b 13727 }
ba93b8ac
DJ		 13728 if (*local_tls_type & GOT_TLS_IE)
13729 s->size += 4;
ba93b8ac 13730
0855e32b
NS		 13731 if (*local_tls_type & GOT_NORMAL)
13732 {
13733 /* If the symbol is both GD and GDESC, *local_got
13734 may have been overwritten. */
13735 *local_got = s->size;
13736 s->size += 4;
13737 }
13738
34e77a92
RS		 13739 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13740 if (isym == NULL)
13741 return FALSE;
13742
13743 /* If all references to an STT_GNU_IFUNC PLT are calls,
13744 then all non-call references, including this GOT entry,
13745 resolve directly to the run-time target. */
13746 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13747 && (local_iplt == NULL
13748 || local_iplt->arm.noncall_refcount == 0))
13749 elf32_arm_allocate_irelocs (info, srel, 1);
3064e1ff 13750 else if (info->shared || output_bfd->flags & DYNAMIC)
0855e32b 13751 {
3064e1ff
JB		 13752 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13753 || *local_tls_type & GOT_TLS_GD)
13754 elf32_arm_allocate_dynrelocs (info, srel, 1);
99059e56 13755
3064e1ff
JB		 13756 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13757 {
13758 elf32_arm_allocate_dynrelocs (info,
13759 htab->root.srelplt, 1);
13760 htab->tls_trampoline = -1;
13761 }
0855e32b 13762 }
5e681ec4
PB		 13763 }
13764 else
13765 *local_got = (bfd_vma) -1;
13766 }
252b5132
RH		 13767 }
13768
ba93b8ac
DJ		 13769 if (htab->tls_ldm_got.refcount > 0)
13770 {
13771 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13772 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13773 htab->tls_ldm_got.offset = htab->root.sgot->size;
13774 htab->root.sgot->size += 8;
ba93b8ac 13775 if (info->shared)
47beaa6a 13776 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13777 }
13778 else
13779 htab->tls_ldm_got.offset = -1;
13780
5e681ec4
PB		 13781 /* Allocate global sym .plt and .got entries, and space for global
13782 sym dynamic relocs. */
47beaa6a 13783 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13784
d504ffc8
DJ		 13785 /* Here we rummage through the found bfds to collect glue information. */
13786 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13787 {
0ffa91dd 13788 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13789 continue;
13790
c7b8f16e
JB		 13791 /* Initialise mapping tables for code/data. */
13792 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13793
c7b8f16e
JB		 13794 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13795 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
99059e56
RM		 13796 /* xgettext:c-format */
13797 _bfd_error_handler (_("Errors encountered processing file %s"),
c7b8f16e
JB		 13798 ibfd->filename);
13799 }
d504ffc8 13800
3e6b1042
DJ		 13801 /* Allocate space for the glue sections now that we've sized them. */
13802 bfd_elf32_arm_allocate_interworking_sections (info);
13803
0855e32b
NS		 13804 /* For every jump slot reserved in the sgotplt, reloc_count is
13805 incremented. However, when we reserve space for TLS descriptors,
13806 it's not incremented, so in order to compute the space reserved
13807 for them, it suffices to multiply the reloc count by the jump
13808 slot size. */
13809 if (htab->root.srelplt)
13810 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13811
13812 if (htab->tls_trampoline)
13813 {
13814 if (htab->root.splt->size == 0)
13815 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13816
0855e32b
NS		 13817 htab->tls_trampoline = htab->root.splt->size;
13818 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13819
0855e32b 13820 /* If we're not using lazy TLS relocations, don't generate the
99059e56 13821 PLT and GOT entries they require. */
0855e32b
NS		 13822 if (!(info->flags & DF_BIND_NOW))
13823 {
13824 htab->dt_tlsdesc_got = htab->root.sgot->size;
13825 htab->root.sgot->size += 4;
13826
13827 htab->dt_tlsdesc_plt = htab->root.splt->size;
13828 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13829 }
13830 }
13831
252b5132
RH		 13832 /* The check_relocs and adjust_dynamic_symbol entry points have
13833 determined the sizes of the various dynamic sections. Allocate
13834 memory for them. */
b34976b6
AM		 13835 plt = FALSE;
13836 relocs = FALSE;
252b5132
RH		 13837 for (s = dynobj->sections; s != NULL; s = s->next)
13838 {
13839 const char * name;
252b5132
RH		 13840
13841 if ((s->flags & SEC_LINKER_CREATED) == 0)
13842 continue;
13843
13844 /* It's OK to base decisions on the section name, because none
13845 of the dynobj section names depend upon the input files. */
13846 name = bfd_get_section_name (dynobj, s);
13847
34e77a92 13848 if (s == htab->root.splt)
252b5132 13849 {
c456f082
AM		 13850 /* Remember whether there is a PLT. */
13851 plt = s->size != 0;
252b5132 13852 }
0112cd26 13853 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13854 {
c456f082 13855 if (s->size != 0)
252b5132 13856 {
252b5132 13857 /* Remember whether there are any reloc sections other
00a97672 13858 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13859 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13860 relocs = TRUE;
252b5132
RH		 13861
13862 /* We use the reloc_count field as a counter if we need
13863 to copy relocs into the output file. */
13864 s->reloc_count = 0;
13865 }
13866 }
34e77a92
RS		 13867 else if (s != htab->root.sgot
13868 && s != htab->root.sgotplt
13869 && s != htab->root.iplt
13870 && s != htab->root.igotplt
13871 && s != htab->sdynbss)
252b5132
RH		 13872 {
13873 /* It's not one of our sections, so don't allocate space. */
13874 continue;
13875 }
13876
c456f082 13877 if (s->size == 0)
252b5132 13878 {
c456f082 13879 /* If we don't need this section, strip it from the
00a97672
RS		 13880 output file. This is mostly to handle .rel(a).bss and
13881 .rel(a).plt. We must create both sections in
c456f082
AM		 13882 create_dynamic_sections, because they must be created
13883 before the linker maps input sections to output
13884 sections. The linker does that before
13885 adjust_dynamic_symbol is called, and it is that
13886 function which decides whether anything needs to go
13887 into these sections. */
8423293d 13888 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13889 continue;
13890 }
13891
c456f082
AM		 13892 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13893 continue;
13894
252b5132 13895 /* Allocate memory for the section contents. */
21d799b5 13896 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13897 if (s->contents == NULL)
b34976b6 13898 return FALSE;
252b5132
RH		 13899 }
13900
13901 if (elf_hash_table (info)->dynamic_sections_created)
13902 {
13903 /* Add some entries to the .dynamic section. We fill in the
13904 values later, in elf32_arm_finish_dynamic_sections, but we
13905 must add the entries now so that we get the correct size for
13906 the .dynamic section. The DT_DEBUG entry is filled in by the
13907 dynamic linker and used by the debugger. */
dc810e39 13908#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13909 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13910
8532796c 13911 if (info->executable)
252b5132 13912 {
dc810e39 13913 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13914 return FALSE;
252b5132
RH		 13915 }
13916
13917 if (plt)
13918 {
dc810e39
AM		 13919 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13920 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13921 || !add_dynamic_entry (DT_PLTREL,
13922 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13923 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13924 return FALSE;
0855e32b
NS		 13925
13926 if (htab->dt_tlsdesc_plt &&
b38cadfb 13927 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13928 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13929 return FALSE;
252b5132
RH		 13930 }
13931
13932 if (relocs)
13933 {
00a97672
RS		 13934 if (htab->use_rel)
13935 {
13936 if (!add_dynamic_entry (DT_REL, 0)
13937 || !add_dynamic_entry (DT_RELSZ, 0)
13938 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13939 return FALSE;
13940 }
13941 else
13942 {
13943 if (!add_dynamic_entry (DT_RELA, 0)
13944 || !add_dynamic_entry (DT_RELASZ, 0)
13945 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13946 return FALSE;
13947 }
252b5132
RH		 13948 }
13949
08d1f311
DJ		 13950 /* If any dynamic relocs apply to a read-only section,
13951 then we need a DT_TEXTREL entry. */
13952 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13953 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13954 info);
08d1f311 13955
99e4ae17 13956 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13957 {
dc810e39 13958 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13959 return FALSE;
252b5132 13960 }
7a2b07ff
NS		 13961 if (htab->vxworks_p
13962 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13963 return FALSE;
252b5132 13964 }
8532796c 13965#undef add_dynamic_entry
252b5132 13966
b34976b6 13967 return TRUE;
252b5132
RH		 13968}
13969
0855e32b
NS		 13970/* Size sections even though they're not dynamic. We use it to setup
13971 _TLS_MODULE_BASE_, if needed. */
13972
13973static bfd_boolean
13974elf32_arm_always_size_sections (bfd *output_bfd,
99059e56 13975 struct bfd_link_info *info)
0855e32b
NS		 13976{
13977 asection *tls_sec;
13978
13979 if (info->relocatable)
13980 return TRUE;
13981
13982 tls_sec = elf_hash_table (info)->tls_sec;
13983
13984 if (tls_sec)
13985 {
13986 struct elf_link_hash_entry *tlsbase;
13987
13988 tlsbase = elf_link_hash_lookup
13989 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13990
13991 if (tlsbase)
99059e56
RM		 13992 {
13993 struct bfd_link_hash_entry *bh = NULL;
0855e32b 13994 const struct elf_backend_data *bed
99059e56 13995 = get_elf_backend_data (output_bfd);
0855e32b 13996
99059e56 13997 if (!(_bfd_generic_link_add_one_symbol
0855e32b
NS		 13998 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13999 tls_sec, 0, NULL, FALSE,
14000 bed->collect, &bh)))
14001 return FALSE;
b38cadfb 14002
99059e56
RM		 14003 tlsbase->type = STT_TLS;
14004 tlsbase = (struct elf_link_hash_entry *)bh;
14005 tlsbase->def_regular = 1;
14006 tlsbase->other = STV_HIDDEN;
14007 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
0855e32b
NS		 14008 }
14009 }
14010 return TRUE;
14011}
14012
252b5132
RH		 14013/* Finish up dynamic symbol handling. We set the contents of various
14014 dynamic sections here. */
14015
b34976b6 14016static bfd_boolean
906e58ca
NC		 14017elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14018 struct bfd_link_info * info,
14019 struct elf_link_hash_entry * h,
14020 Elf_Internal_Sym * sym)
252b5132 14021{
e5a52504 14022 struct elf32_arm_link_hash_table *htab;
b7693d02 14023 struct elf32_arm_link_hash_entry *eh;
252b5132 14024
e5a52504 14025 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14026 if (htab == NULL)
14027 return FALSE;
14028
b7693d02 14029 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 14030
14031 if (h->plt.offset != (bfd_vma) -1)
14032 {
34e77a92 14033 if (!eh->is_iplt)
e5a52504 14034 {
34e77a92 14035 BFD_ASSERT (h->dynindx != -1);
57460bcf
NC		 14036 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14037 h->dynindx, 0))
14038 return FALSE;
e5a52504 14039 }
57e8b36a 14040
f5385ebf 14041 if (!h->def_regular)
252b5132
RH		 14042 {
14043 /* Mark the symbol as undefined, rather than as defined in
14044 the .plt section. Leave the value alone. */
14045 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 14046 /* If the symbol is weak, we do need to clear the value.
14047 Otherwise, the PLT entry would provide a definition for
14048 the symbol even if the symbol wasn't defined anywhere,
14049 and so the symbol would never be NULL. */
f5385ebf 14050 if (!h->ref_regular_nonweak)
d982ba73 14051 sym->st_value = 0;
252b5132 14052 }
34e77a92
RS		 14053 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14054 {
14055 /* At least one non-call relocation references this .iplt entry,
14056 so the .iplt entry is the function's canonical address. */
14057 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14058 sym->st_target_internal = ST_BRANCH_TO_ARM;
14059 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14060 (output_bfd, htab->root.iplt->output_section));
14061 sym->st_value = (h->plt.offset
14062 + htab->root.iplt->output_section->vma
14063 + htab->root.iplt->output_offset);
14064 }
252b5132
RH		 14065 }
14066
f5385ebf 14067 if (h->needs_copy)
252b5132
RH		 14068 {
14069 asection * s;
947216bf 14070 Elf_Internal_Rela rel;
252b5132
RH		 14071
14072 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14073 BFD_ASSERT (h->dynindx != -1
14074 && (h->root.type == bfd_link_hash_defined
14075 || h->root.type == bfd_link_hash_defweak));
14076
362d30a1 14077 s = htab->srelbss;
252b5132
RH		 14078 BFD_ASSERT (s != NULL);
14079
00a97672 14080 rel.r_addend = 0;
252b5132
RH		 14081 rel.r_offset = (h->root.u.def.value
14082 + h->root.u.def.section->output_section->vma
14083 + h->root.u.def.section->output_offset);
14084 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14085 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14086 }
14087
00a97672
RS		 14088 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14089 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14090 to the ".got" section. */
9637f6ef 14091 if (h == htab->root.hdynamic
00a97672 14092 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14093 sym->st_shndx = SHN_ABS;
14094
b34976b6 14095 return TRUE;
252b5132
RH		 14096}
14097
0855e32b
NS		 14098static void
14099arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14100 void *contents,
14101 const unsigned long *template, unsigned count)
14102{
14103 unsigned ix;
b38cadfb 14104
0855e32b
NS		 14105 for (ix = 0; ix != count; ix++)
14106 {
14107 unsigned long insn = template[ix];
14108
14109 /* Emit mov pc,rx if bx is not permitted. */
14110 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14111 insn = (insn & 0xf000000f) | 0x01a0f000;
14112 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14113 }
14114}
14115
99059e56
RM		 14116/* Install the special first PLT entry for elf32-arm-nacl. Unlike
14117 other variants, NaCl needs this entry in a static executable's
14118 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14119 zero. For .iplt really only the last bundle is useful, and .iplt
14120 could have a shorter first entry, with each individual PLT entry's
14121 relative branch calculated differently so it targets the last
14122 bundle instead of the instruction before it (labelled .Lplt_tail
14123 above). But it's simpler to keep the size and layout of PLT0
14124 consistent with the dynamic case, at the cost of some dead code at
14125 the start of .iplt and the one dead store to the stack at the start
14126 of .Lplt_tail. */
14127static void
14128arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14129 asection *plt, bfd_vma got_displacement)
14130{
14131 unsigned int i;
14132
14133 put_arm_insn (htab, output_bfd,
14134 elf32_arm_nacl_plt0_entry[0]
14135 | arm_movw_immediate (got_displacement),
14136 plt->contents + 0);
14137 put_arm_insn (htab, output_bfd,
14138 elf32_arm_nacl_plt0_entry[1]
14139 | arm_movt_immediate (got_displacement),
14140 plt->contents + 4);
14141
14142 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14143 put_arm_insn (htab, output_bfd,
14144 elf32_arm_nacl_plt0_entry[i],
14145 plt->contents + (i * 4));
14146}
14147
252b5132
RH		 14148/* Finish up the dynamic sections. */
14149
b34976b6 14150static bfd_boolean
57e8b36a 14151elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14152{
14153 bfd * dynobj;
14154 asection * sgot;
14155 asection * sdyn;
4dfe6ac6
NC		 14156 struct elf32_arm_link_hash_table *htab;
14157
14158 htab = elf32_arm_hash_table (info);
14159 if (htab == NULL)
14160 return FALSE;
252b5132
RH		 14161
14162 dynobj = elf_hash_table (info)->dynobj;
14163
362d30a1 14164 sgot = htab->root.sgotplt;
894891db
NC		 14165 /* A broken linker script might have discarded the dynamic sections.
14166 Catch this here so that we do not seg-fault later on. */
14167 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14168 return FALSE;
3d4d4302 14169 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14170
14171 if (elf_hash_table (info)->dynamic_sections_created)
14172 {
14173 asection *splt;
14174 Elf32_External_Dyn *dyncon, *dynconend;
14175
362d30a1 14176 splt = htab->root.splt;
24a1ba0f 14177 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14178 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14179
14180 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14181 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14182
252b5132
RH		 14183 for (; dyncon < dynconend; dyncon++)
14184 {
14185 Elf_Internal_Dyn dyn;
14186 const char * name;
14187 asection * s;
14188
14189 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14190
14191 switch (dyn.d_tag)
14192 {
229fcec5
MM		 14193 unsigned int type;
14194
252b5132 14195 default:
7a2b07ff
NS		 14196 if (htab->vxworks_p
14197 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14198 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14199 break;
14200
229fcec5
MM		 14201 case DT_HASH:
14202 name = ".hash";
14203 goto get_vma_if_bpabi;
14204 case DT_STRTAB:
14205 name = ".dynstr";
14206 goto get_vma_if_bpabi;
14207 case DT_SYMTAB:
14208 name = ".dynsym";
14209 goto get_vma_if_bpabi;
c0042f5d
MM		 14210 case DT_VERSYM:
14211 name = ".gnu.version";
14212 goto get_vma_if_bpabi;
14213 case DT_VERDEF:
14214 name = ".gnu.version_d";
14215 goto get_vma_if_bpabi;
14216 case DT_VERNEED:
14217 name = ".gnu.version_r";
14218 goto get_vma_if_bpabi;
14219
252b5132
RH		 14220 case DT_PLTGOT:
14221 name = ".got";
14222 goto get_vma;
14223 case DT_JMPREL:
00a97672 14224 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14225 get_vma:
14226 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14227 if (s == NULL)
14228 {
14229 /* PR ld/14397: Issue an error message if a required section is missing. */
14230 (*_bfd_error_handler)
14231 (_("error: required section '%s' not found in the linker script"), name);
14232 bfd_set_error (bfd_error_invalid_operation);
14233 return FALSE;
14234 }
229fcec5
MM		 14235 if (!htab->symbian_p)
14236 dyn.d_un.d_ptr = s->vma;
14237 else
14238 /* In the BPABI, tags in the PT_DYNAMIC section point
14239 at the file offset, not the memory address, for the
14240 convenience of the post linker. */
14241 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14242 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14243 break;
14244
229fcec5
MM		 14245 get_vma_if_bpabi:
14246 if (htab->symbian_p)
14247 goto get_vma;
14248 break;
14249
252b5132 14250 case DT_PLTRELSZ:
362d30a1 14251 s = htab->root.srelplt;
252b5132 14252 BFD_ASSERT (s != NULL);
eea6121a 14253 dyn.d_un.d_val = s->size;
252b5132
RH		 14254 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14255 break;
906e58ca 14256
252b5132 14257 case DT_RELSZ:
00a97672 14258 case DT_RELASZ:
229fcec5
MM		 14259 if (!htab->symbian_p)
14260 {
14261 /* My reading of the SVR4 ABI indicates that the
14262 procedure linkage table relocs (DT_JMPREL) should be
14263 included in the overall relocs (DT_REL). This is
14264 what Solaris does. However, UnixWare can not handle
14265 that case. Therefore, we override the DT_RELSZ entry
14266 here to make it not include the JMPREL relocs. Since
00a97672 14267 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14268 other relocation sections, we don't have to worry
14269 about changing the DT_REL entry. */
362d30a1 14270 s = htab->root.srelplt;
229fcec5
MM		 14271 if (s != NULL)
14272 dyn.d_un.d_val -= s->size;
14273 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14274 break;
14275 }
8029a119 14276 /* Fall through. */
229fcec5
MM		 14277
14278 case DT_REL:
14279 case DT_RELA:
229fcec5
MM		 14280 /* In the BPABI, the DT_REL tag must point at the file
14281 offset, not the VMA, of the first relocation
14282 section. So, we use code similar to that in
14283 elflink.c, but do not check for SHF_ALLOC on the
14284 relcoation section, since relocations sections are
14285 never allocated under the BPABI. The comments above
14286 about Unixware notwithstanding, we include all of the
14287 relocations here. */
14288 if (htab->symbian_p)
14289 {
14290 unsigned int i;
14291 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14292 ? SHT_REL : SHT_RELA);
14293 dyn.d_un.d_val = 0;
14294 for (i = 1; i < elf_numsections (output_bfd); i++)
14295 {
906e58ca 14296 Elf_Internal_Shdr *hdr
229fcec5
MM		 14297 = elf_elfsections (output_bfd)[i];
14298 if (hdr->sh_type == type)
14299 {
906e58ca 14300 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14301 || dyn.d_tag == DT_RELASZ)
14302 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14303 else if ((ufile_ptr) hdr->sh_offset
14304 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14305 dyn.d_un.d_val = hdr->sh_offset;
14306 }
14307 }
14308 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14309 }
252b5132 14310 break;
88f7bcd5 14311
0855e32b 14312 case DT_TLSDESC_PLT:
99059e56 14313 s = htab->root.splt;
0855e32b
NS		 14314 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14315 + htab->dt_tlsdesc_plt);
14316 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14317 break;
14318
14319 case DT_TLSDESC_GOT:
99059e56 14320 s = htab->root.sgot;
0855e32b 14321 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
99059e56 14322 + htab->dt_tlsdesc_got);
0855e32b
NS		 14323 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14324 break;
14325
88f7bcd5
NC		 14326 /* Set the bottom bit of DT_INIT/FINI if the
14327 corresponding function is Thumb. */
14328 case DT_INIT:
14329 name = info->init_function;
14330 goto get_sym;
14331 case DT_FINI:
14332 name = info->fini_function;
14333 get_sym:
14334 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14335 then there is nothing to adjust. */
88f7bcd5
NC		 14336 if (dyn.d_un.d_val != 0)
14337 {
14338 struct elf_link_hash_entry * eh;
14339
14340 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14341 FALSE, FALSE, TRUE);
35fc36a8 14342 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14343 {
14344 dyn.d_un.d_val |= 1;
b34976b6 14345 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14346 }
14347 }
14348 break;
252b5132
RH		 14349 }
14350 }
14351
24a1ba0f 14352 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14353 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14354 {
00a97672
RS		 14355 const bfd_vma *plt0_entry;
14356 bfd_vma got_address, plt_address, got_displacement;
14357
14358 /* Calculate the addresses of the GOT and PLT. */
14359 got_address = sgot->output_section->vma + sgot->output_offset;
14360 plt_address = splt->output_section->vma + splt->output_offset;
14361
14362 if (htab->vxworks_p)
14363 {
14364 /* The VxWorks GOT is relocated by the dynamic linker.
14365 Therefore, we must emit relocations rather than simply
14366 computing the values now. */
14367 Elf_Internal_Rela rel;
14368
14369 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14370 put_arm_insn (htab, output_bfd, plt0_entry[0],
14371 splt->contents + 0);
14372 put_arm_insn (htab, output_bfd, plt0_entry[1],
14373 splt->contents + 4);
14374 put_arm_insn (htab, output_bfd, plt0_entry[2],
14375 splt->contents + 8);
00a97672
RS		 14376 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14377
8029a119 14378 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14379 rel.r_offset = plt_address + 12;
14380 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14381 rel.r_addend = 0;
14382 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14383 htab->srelplt2->contents);
14384 }
b38cadfb 14385 else if (htab->nacl_p)
99059e56
RM		 14386 arm_nacl_put_plt0 (htab, output_bfd, splt,
14387 got_address + 8 - (plt_address + 16));
00a97672
RS		 14388 else
14389 {
14390 got_displacement = got_address - (plt_address + 16);
14391
14392 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14393 put_arm_insn (htab, output_bfd, plt0_entry[0],
14394 splt->contents + 0);
14395 put_arm_insn (htab, output_bfd, plt0_entry[1],
14396 splt->contents + 4);
14397 put_arm_insn (htab, output_bfd, plt0_entry[2],
14398 splt->contents + 8);
14399 put_arm_insn (htab, output_bfd, plt0_entry[3],
14400 splt->contents + 12);
5e681ec4 14401
5e681ec4 14402#ifdef FOUR_WORD_PLT
00a97672
RS		 14403 /* The displacement value goes in the otherwise-unused
14404 last word of the second entry. */
14405 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14406#else
00a97672 14407 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14408#endif
00a97672 14409 }
f7a74f8c 14410 }
252b5132
RH		 14411
14412 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14413 really seem like the right value. */
74541ad4
AM		 14414 if (splt->output_section->owner == output_bfd)
14415 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14416
0855e32b
NS		 14417 if (htab->dt_tlsdesc_plt)
14418 {
14419 bfd_vma got_address
14420 = sgot->output_section->vma + sgot->output_offset;
14421 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14422 + htab->root.sgot->output_offset);
14423 bfd_vma plt_address
14424 = splt->output_section->vma + splt->output_offset;
14425
b38cadfb 14426 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14427 splt->contents + htab->dt_tlsdesc_plt,
14428 dl_tlsdesc_lazy_trampoline, 6);
14429
14430 bfd_put_32 (output_bfd,
14431 gotplt_address + htab->dt_tlsdesc_got
14432 - (plt_address + htab->dt_tlsdesc_plt)
14433 - dl_tlsdesc_lazy_trampoline[6],
14434 splt->contents + htab->dt_tlsdesc_plt + 24);
14435 bfd_put_32 (output_bfd,
14436 got_address - (plt_address + htab->dt_tlsdesc_plt)
14437 - dl_tlsdesc_lazy_trampoline[7],
14438 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14439 }
14440
14441 if (htab->tls_trampoline)
14442 {
b38cadfb 14443 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14444 splt->contents + htab->tls_trampoline,
14445 tls_trampoline, 3);
14446#ifdef FOUR_WORD_PLT
14447 bfd_put_32 (output_bfd, 0x00000000,
14448 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14449#endif
0855e32b
NS		 14450 }
14451
362d30a1 14452 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14453 {
14454 /* Correct the .rel(a).plt.unloaded relocations. They will have
14455 incorrect symbol indexes. */
14456 int num_plts;
eed62c48 14457 unsigned char *p;
00a97672 14458
362d30a1 14459 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14460 / htab->plt_entry_size);
14461 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14462
14463 for (; num_plts; num_plts--)
14464 {
14465 Elf_Internal_Rela rel;
14466
14467 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14468 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14469 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14470 p += RELOC_SIZE (htab);
14471
14472 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14473 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14474 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14475 p += RELOC_SIZE (htab);
14476 }
14477 }
252b5132
RH		 14478 }
14479
99059e56
RM		 14480 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14481 /* NaCl uses a special first entry in .iplt too. */
14482 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14483
252b5132 14484 /* Fill in the first three entries in the global offset table. */
229fcec5 14485 if (sgot)
252b5132 14486 {
229fcec5
MM		 14487 if (sgot->size > 0)
14488 {
14489 if (sdyn == NULL)
14490 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14491 else
14492 bfd_put_32 (output_bfd,
14493 sdyn->output_section->vma + sdyn->output_offset,
14494 sgot->contents);
14495 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14496 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14497 }
252b5132 14498
229fcec5
MM		 14499 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14500 }
252b5132 14501
b34976b6 14502 return TRUE;
252b5132
RH		 14503}
14504
ba96a88f 14505static void
57e8b36a 14506elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14507{
9b485d32 14508 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14509 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14510
14511 i_ehdrp = elf_elfheader (abfd);
14512
94a3258f
PB		 14513 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14514 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14515 else
14516 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14517 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14518
93204d3a
PB		 14519 if (link_info)
14520 {
14521 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14522 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14523 i_ehdrp->e_flags |= EF_ARM_BE8;
14524 }
3bfcb652
NC		 14525
14526 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14527 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14528 {
14529 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14530 if (abi)
14531 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14532 else
14533 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14534 }
ba96a88f
NC		 14535}
14536
99e4ae17 14537static enum elf_reloc_type_class
7e612e98
AM		 14538elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14539 const asection *rel_sec ATTRIBUTE_UNUSED,
14540 const Elf_Internal_Rela *rela)
99e4ae17 14541{
f51e552e 14542 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14543 {
14544 case R_ARM_RELATIVE:
14545 return reloc_class_relative;
14546 case R_ARM_JUMP_SLOT:
14547 return reloc_class_plt;
14548 case R_ARM_COPY:
14549 return reloc_class_copy;
14550 default:
14551 return reloc_class_normal;
14552 }
14553}
14554
e489d0ae 14555static void
57e8b36a 14556elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14557{
5a6c6817 14558 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14559}
14560
40a18ebd
NC		 14561/* Return TRUE if this is an unwinding table entry. */
14562
14563static bfd_boolean
14564is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14565{
0112cd26
NC		 14566 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14567 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14568}
14569
14570
14571/* Set the type and flags for an ARM section. We do this by
14572 the section name, which is a hack, but ought to work. */
14573
14574static bfd_boolean
14575elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14576{
14577 const char * name;
14578
14579 name = bfd_get_section_name (abfd, sec);
14580
14581 if (is_arm_elf_unwind_section_name (abfd, name))
14582 {
14583 hdr->sh_type = SHT_ARM_EXIDX;
14584 hdr->sh_flags |= SHF_LINK_ORDER;
14585 }
14586 return TRUE;
14587}
14588
6dc132d9
L		 14589/* Handle an ARM specific section when reading an object file. This is
14590 called when bfd_section_from_shdr finds a section with an unknown
14591 type. */
40a18ebd
NC		 14592
14593static bfd_boolean
14594elf32_arm_section_from_shdr (bfd *abfd,
14595 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14596 const char *name,
14597 int shindex)
40a18ebd
NC		 14598{
14599 /* There ought to be a place to keep ELF backend specific flags, but
14600 at the moment there isn't one. We just keep track of the
14601 sections by their name, instead. Fortunately, the ABI gives
14602 names for all the ARM specific sections, so we will probably get
14603 away with this. */
14604 switch (hdr->sh_type)
14605 {
14606 case SHT_ARM_EXIDX:
0951f019
RE		 14607 case SHT_ARM_PREEMPTMAP:
14608 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14609 break;
14610
14611 default:
14612 return FALSE;
14613 }
14614
6dc132d9 14615 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14616 return FALSE;
14617
14618 return TRUE;
14619}
e489d0ae 14620
44444f50
NC		 14621static _arm_elf_section_data *
14622get_arm_elf_section_data (asection * sec)
14623{
47b2e99c
JZ		 14624 if (sec && sec->owner && is_arm_elf (sec->owner))
14625 return elf32_arm_section_data (sec);
44444f50
NC		 14626 else
14627 return NULL;
8e3de13a
NC		 14628}
14629
4e617b1e
PB		 14630typedef struct
14631{
57402f1e 14632 void *flaginfo;
4e617b1e 14633 struct bfd_link_info *info;
91a5743d
PB		 14634 asection *sec;
14635 int sec_shndx;
6e0b88f1
AM		 14636 int (*func) (void *, const char *, Elf_Internal_Sym *,
14637 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14638} output_arch_syminfo;
14639
14640enum map_symbol_type
14641{
14642 ARM_MAP_ARM,
14643 ARM_MAP_THUMB,
14644 ARM_MAP_DATA
14645};
14646
14647
7413f23f 14648/* Output a single mapping symbol. */
4e617b1e
PB		 14649
14650static bfd_boolean
7413f23f
DJ		 14651elf32_arm_output_map_sym (output_arch_syminfo *osi,
14652 enum map_symbol_type type,
14653 bfd_vma offset)
4e617b1e
PB		 14654{
14655 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14656 Elf_Internal_Sym sym;
14657
91a5743d
PB		 14658 sym.st_value = osi->sec->output_section->vma
14659 + osi->sec->output_offset
14660 + offset;
4e617b1e
PB		 14661 sym.st_size = 0;
14662 sym.st_other = 0;
14663 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14664 sym.st_shndx = osi->sec_shndx;
35fc36a8 14665 sym.st_target_internal = 0;
fe33d2fa 14666 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14667 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14668}
14669
34e77a92
RS		 14670/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14671 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14672
14673static bfd_boolean
34e77a92
RS		 14674elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14675 bfd_boolean is_iplt_entry_p,
14676 union gotplt_union *root_plt,
14677 struct arm_plt_info *arm_plt)
4e617b1e 14678{
4e617b1e 14679 struct elf32_arm_link_hash_table *htab;
34e77a92 14680 bfd_vma addr, plt_header_size;
4e617b1e 14681
34e77a92 14682 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14683 return TRUE;
14684
4dfe6ac6
NC		 14685 htab = elf32_arm_hash_table (osi->info);
14686 if (htab == NULL)
14687 return FALSE;
14688
34e77a92
RS		 14689 if (is_iplt_entry_p)
14690 {
14691 osi->sec = htab->root.iplt;
14692 plt_header_size = 0;
14693 }
14694 else
14695 {
14696 osi->sec = htab->root.splt;
14697 plt_header_size = htab->plt_header_size;
14698 }
14699 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14700 (osi->info->output_bfd, osi->sec->output_section));
14701
14702 addr = root_plt->offset & -2;
4e617b1e
PB		 14703 if (htab->symbian_p)
14704 {
7413f23f 14705 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14706 return FALSE;
7413f23f 14707 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14708 return FALSE;
14709 }
14710 else if (htab->vxworks_p)
14711 {
7413f23f 14712 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14713 return FALSE;
7413f23f 14714 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14715 return FALSE;
7413f23f 14716 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14717 return FALSE;
7413f23f 14718 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14719 return FALSE;
14720 }
b38cadfb
NC		 14721 else if (htab->nacl_p)
14722 {
14723 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14724 return FALSE;
14725 }
4e617b1e
PB		 14726 else
14727 {
34e77a92 14728 bfd_boolean thumb_stub_p;
bd97cb95 14729
34e77a92
RS		 14730 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14731 if (thumb_stub_p)
4e617b1e 14732 {
7413f23f 14733 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14734 return FALSE;
14735 }
14736#ifdef FOUR_WORD_PLT
7413f23f 14737 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14738 return FALSE;
7413f23f 14739 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14740 return FALSE;
14741#else
906e58ca 14742 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14743 so only need to output a mapping symbol for the first PLT entry and
14744 entries with thumb thunks. */
34e77a92 14745 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14746 {
7413f23f 14747 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14748 return FALSE;
14749 }
14750#endif
14751 }
14752
14753 return TRUE;
14754}
14755
34e77a92
RS		 14756/* Output mapping symbols for PLT entries associated with H. */
14757
14758static bfd_boolean
14759elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14760{
14761 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14762 struct elf32_arm_link_hash_entry *eh;
14763
14764 if (h->root.type == bfd_link_hash_indirect)
14765 return TRUE;
14766
14767 if (h->root.type == bfd_link_hash_warning)
14768 /* When warning symbols are created, they **replace** the "real"
14769 entry in the hash table, thus we never get to see the real
14770 symbol in a hash traversal. So look at it now. */
14771 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14772
14773 eh = (struct elf32_arm_link_hash_entry *) h;
14774 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14775 &h->plt, &eh->plt);
14776}
14777
7413f23f
DJ		 14778/* Output a single local symbol for a generated stub. */
14779
14780static bfd_boolean
14781elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14782 bfd_vma offset, bfd_vma size)
14783{
7413f23f
DJ		 14784 Elf_Internal_Sym sym;
14785
7413f23f
DJ		 14786 sym.st_value = osi->sec->output_section->vma
14787 + osi->sec->output_offset
14788 + offset;
14789 sym.st_size = size;
14790 sym.st_other = 0;
14791 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14792 sym.st_shndx = osi->sec_shndx;
35fc36a8 14793 sym.st_target_internal = 0;
57402f1e 14794 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14795}
4e617b1e 14796
da5938a2 14797static bfd_boolean
8029a119
NC		 14798arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14799 void * in_arg)
da5938a2
NC		 14800{
14801 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14802 asection *stub_sec;
14803 bfd_vma addr;
7413f23f 14804 char *stub_name;
9a008db3 14805 output_arch_syminfo *osi;
d3ce72d0 14806 const insn_sequence *template_sequence;
461a49ca
DJ		 14807 enum stub_insn_type prev_type;
14808 int size;
14809 int i;
14810 enum map_symbol_type sym_type;
da5938a2
NC		 14811
14812 /* Massage our args to the form they really have. */
14813 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14814 osi = (output_arch_syminfo *) in_arg;
da5938a2 14815
da5938a2
NC		 14816 stub_sec = stub_entry->stub_sec;
14817
14818 /* Ensure this stub is attached to the current section being
7413f23f 14819 processed. */
da5938a2
NC		 14820 if (stub_sec != osi->sec)
14821 return TRUE;
14822
7413f23f
DJ		 14823 addr = (bfd_vma) stub_entry->stub_offset;
14824 stub_name = stub_entry->output_name;
da5938a2 14825
d3ce72d0
NC		 14826 template_sequence = stub_entry->stub_template;
14827 switch (template_sequence[0].type)
7413f23f 14828 {
461a49ca
DJ		 14829 case ARM_TYPE:
14830 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14831 return FALSE;
14832 break;
461a49ca 14833 case THUMB16_TYPE:
48229727 14834 case THUMB32_TYPE:
461a49ca
DJ		 14835 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14836 stub_entry->stub_size))
da5938a2
NC		 14837 return FALSE;
14838 break;
14839 default:
14840 BFD_FAIL ();
48229727 14841 return 0;
7413f23f 14842 }
da5938a2 14843
461a49ca
DJ		 14844 prev_type = DATA_TYPE;
14845 size = 0;
14846 for (i = 0; i < stub_entry->stub_template_size; i++)
14847 {
d3ce72d0 14848 switch (template_sequence[i].type)
461a49ca
DJ		 14849 {
14850 case ARM_TYPE:
14851 sym_type = ARM_MAP_ARM;
14852 break;
14853
14854 case THUMB16_TYPE:
48229727 14855 case THUMB32_TYPE:
461a49ca
DJ		 14856 sym_type = ARM_MAP_THUMB;
14857 break;
14858
14859 case DATA_TYPE:
14860 sym_type = ARM_MAP_DATA;
14861 break;
14862
14863 default:
14864 BFD_FAIL ();
4e31c731 14865 return FALSE;
461a49ca
DJ		 14866 }
14867
d3ce72d0 14868 if (template_sequence[i].type != prev_type)
461a49ca 14869 {
d3ce72d0 14870 prev_type = template_sequence[i].type;
461a49ca
DJ		 14871 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14872 return FALSE;
14873 }
14874
d3ce72d0 14875 switch (template_sequence[i].type)
461a49ca
DJ		 14876 {
14877 case ARM_TYPE:
48229727 14878 case THUMB32_TYPE:
461a49ca
DJ		 14879 size += 4;
14880 break;
14881
14882 case THUMB16_TYPE:
14883 size += 2;
14884 break;
14885
14886 case DATA_TYPE:
14887 size += 4;
14888 break;
14889
14890 default:
14891 BFD_FAIL ();
4e31c731 14892 return FALSE;
461a49ca
DJ		 14893 }
14894 }
14895
da5938a2
NC		 14896 return TRUE;
14897}
14898
33811162
DG		 14899/* Output mapping symbols for linker generated sections,
14900 and for those data-only sections that do not have a
14901 $d. */
4e617b1e
PB		 14902
14903static bfd_boolean
14904elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 14905 struct bfd_link_info *info,
57402f1e 14906 void *flaginfo,
6e0b88f1
AM		 14907 int (*func) (void *, const char *,
14908 Elf_Internal_Sym *,
14909 asection *,
14910 struct elf_link_hash_entry *))
4e617b1e
PB		 14911{
14912 output_arch_syminfo osi;
14913 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14914 bfd_vma offset;
14915 bfd_size_type size;
33811162 14916 bfd *input_bfd;
4e617b1e
PB		 14917
14918 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14919 if (htab == NULL)
14920 return FALSE;
14921
906e58ca 14922 check_use_blx (htab);
91a5743d 14923
57402f1e 14924 osi.flaginfo = flaginfo;
4e617b1e
PB		 14925 osi.info = info;
14926 osi.func = func;
906e58ca 14927
33811162
DG		 14928 /* Add a $d mapping symbol to data-only sections that
14929 don't have any mapping symbol. This may result in (harmless) redundant
14930 mapping symbols. */
14931 for (input_bfd = info->input_bfds;
14932 input_bfd != NULL;
14933 input_bfd = input_bfd->link_next)
14934 {
14935 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14936 for (osi.sec = input_bfd->sections;
14937 osi.sec != NULL;
14938 osi.sec = osi.sec->next)
14939 {
14940 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14941 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14942 != 0)
33811162
DG		 14943 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14944 == SEC_HAS_CONTENTS
14945 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14946 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14947 && osi.sec->size > 0
14948 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14949 {
14950 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14951 (output_bfd, osi.sec->output_section);
14952 if (osi.sec_shndx != (int)SHN_BAD)
14953 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14954 }
14955 }
14956 }
14957
91a5743d
PB		 14958 /* ARM->Thumb glue. */
14959 if (htab->arm_glue_size > 0)
14960 {
3d4d4302
AM		 14961 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14962 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 14963
14964 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14965 (output_bfd, osi.sec->output_section);
14966 if (info->shared || htab->root.is_relocatable_executable
14967 || htab->pic_veneer)
14968 size = ARM2THUMB_PIC_GLUE_SIZE;
14969 else if (htab->use_blx)
14970 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14971 else
14972 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14973
91a5743d
PB		 14974 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14975 {
7413f23f
DJ		 14976 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14977 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14978 }
14979 }
14980
14981 /* Thumb->ARM glue. */
14982 if (htab->thumb_glue_size > 0)
14983 {
3d4d4302
AM		 14984 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14985 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 14986
14987 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14988 (output_bfd, osi.sec->output_section);
14989 size = THUMB2ARM_GLUE_SIZE;
14990
14991 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14992 {
7413f23f
DJ		 14993 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14994 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14995 }
14996 }
14997
845b51d6
PB		 14998 /* ARMv4 BX veneers. */
14999 if (htab->bx_glue_size > 0)
15000 {
3d4d4302
AM		 15001 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15002 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 15003
15004 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15005 (output_bfd, osi.sec->output_section);
15006
7413f23f 15007 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 15008 }
15009
8029a119
NC		 15010 /* Long calls stubs. */
15011 if (htab->stub_bfd && htab->stub_bfd->sections)
15012 {
da5938a2 15013 asection* stub_sec;
8029a119 15014
da5938a2
NC		 15015 for (stub_sec = htab->stub_bfd->sections;
15016 stub_sec != NULL;
8029a119
NC		 15017 stub_sec = stub_sec->next)
15018 {
15019 /* Ignore non-stub sections. */
15020 if (!strstr (stub_sec->name, STUB_SUFFIX))
15021 continue;
da5938a2 15022
8029a119 15023 osi.sec = stub_sec;
da5938a2 15024
8029a119
NC		 15025 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15026 (output_bfd, osi.sec->output_section);
da5938a2 15027
8029a119
NC		 15028 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15029 }
15030 }
da5938a2 15031
91a5743d 15032 /* Finally, output mapping symbols for the PLT. */
34e77a92 15033 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 15034 {
34e77a92
RS		 15035 osi.sec = htab->root.splt;
15036 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15037 (output_bfd, osi.sec->output_section));
15038
15039 /* Output mapping symbols for the plt header. SymbianOS does not have a
15040 plt header. */
15041 if (htab->vxworks_p)
15042 {
15043 /* VxWorks shared libraries have no PLT header. */
15044 if (!info->shared)
15045 {
15046 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15047 return FALSE;
15048 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15049 return FALSE;
15050 }
15051 }
b38cadfb
NC		 15052 else if (htab->nacl_p)
15053 {
15054 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15055 return FALSE;
15056 }
34e77a92 15057 else if (!htab->symbian_p)
4e617b1e 15058 {
7413f23f 15059 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 15060 return FALSE;
34e77a92
RS		 15061#ifndef FOUR_WORD_PLT
15062 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 15063 return FALSE;
34e77a92 15064#endif
4e617b1e
PB		 15065 }
15066 }
99059e56
RM		 15067 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15068 {
15069 /* NaCl uses a special first entry in .iplt too. */
15070 osi.sec = htab->root.iplt;
15071 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15072 (output_bfd, osi.sec->output_section));
15073 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15074 return FALSE;
15075 }
34e77a92
RS		 15076 if ((htab->root.splt && htab->root.splt->size > 0)
15077 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 15078 {
34e77a92
RS		 15079 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15080 for (input_bfd = info->input_bfds;
15081 input_bfd != NULL;
15082 input_bfd = input_bfd->link_next)
15083 {
15084 struct arm_local_iplt_info **local_iplt;
15085 unsigned int i, num_syms;
4e617b1e 15086
34e77a92
RS		 15087 local_iplt = elf32_arm_local_iplt (input_bfd);
15088 if (local_iplt != NULL)
15089 {
15090 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15091 for (i = 0; i < num_syms; i++)
15092 if (local_iplt[i] != NULL
15093 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15094 &local_iplt[i]->root,
15095 &local_iplt[i]->arm))
15096 return FALSE;
15097 }
15098 }
15099 }
0855e32b
NS		 15100 if (htab->dt_tlsdesc_plt != 0)
15101 {
15102 /* Mapping symbols for the lazy tls trampoline. */
15103 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15104 return FALSE;
b38cadfb 15105
0855e32b
NS		 15106 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15107 htab->dt_tlsdesc_plt + 24))
15108 return FALSE;
15109 }
15110 if (htab->tls_trampoline != 0)
15111 {
15112 /* Mapping symbols for the tls trampoline. */
15113 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15114 return FALSE;
15115#ifdef FOUR_WORD_PLT
15116 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15117 htab->tls_trampoline + 12))
15118 return FALSE;
b38cadfb 15119#endif
0855e32b 15120 }
b38cadfb 15121
4e617b1e
PB		 15122 return TRUE;
15123}
15124
e489d0ae
PB		 15125/* Allocate target specific section data. */
15126
15127static bfd_boolean
15128elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15129{
f592407e
AM		 15130 if (!sec->used_by_bfd)
15131 {
15132 _arm_elf_section_data *sdata;
15133 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15134
21d799b5 15135 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15136 if (sdata == NULL)
15137 return FALSE;
15138 sec->used_by_bfd = sdata;
15139 }
e489d0ae
PB		 15140
15141 return _bfd_elf_new_section_hook (abfd, sec);
15142}
15143
15144
15145/* Used to order a list of mapping symbols by address. */
15146
15147static int
15148elf32_arm_compare_mapping (const void * a, const void * b)
15149{
7f6a71ff
JM		 15150 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15151 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15152
15153 if (amap->vma > bmap->vma)
15154 return 1;
15155 else if (amap->vma < bmap->vma)
15156 return -1;
15157 else if (amap->type > bmap->type)
15158 /* Ensure results do not depend on the host qsort for objects with
15159 multiple mapping symbols at the same address by sorting on type
15160 after vma. */
15161 return 1;
15162 else if (amap->type < bmap->type)
15163 return -1;
15164 else
15165 return 0;
e489d0ae
PB		 15166}
15167
2468f9c9
PB		 15168/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15169
15170static unsigned long
15171offset_prel31 (unsigned long addr, bfd_vma offset)
15172{
15173 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15174}
15175
15176/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15177 relocations. */
15178
15179static void
15180copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15181{
15182 unsigned long first_word = bfd_get_32 (output_bfd, from);
15183 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15184
2468f9c9
PB		 15185 /* High bit of first word is supposed to be zero. */
15186 if ((first_word & 0x80000000ul) == 0)
15187 first_word = offset_prel31 (first_word, offset);
b38cadfb 15188
2468f9c9
PB		 15189 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15190 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15191 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15192 second_word = offset_prel31 (second_word, offset);
b38cadfb 15193
2468f9c9
PB		 15194 bfd_put_32 (output_bfd, first_word, to);
15195 bfd_put_32 (output_bfd, second_word, to + 4);
15196}
e489d0ae 15197
48229727
JB		 15198/* Data for make_branch_to_a8_stub(). */
15199
b38cadfb
NC		 15200struct a8_branch_to_stub_data
15201{
48229727
JB		 15202 asection *writing_section;
15203 bfd_byte *contents;
15204};
15205
15206
15207/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15208 places for a particular section. */
15209
15210static bfd_boolean
15211make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
99059e56 15212 void *in_arg)
48229727
JB		 15213{
15214 struct elf32_arm_stub_hash_entry *stub_entry;
15215 struct a8_branch_to_stub_data *data;
15216 bfd_byte *contents;
15217 unsigned long branch_insn;
15218 bfd_vma veneered_insn_loc, veneer_entry_loc;
15219 bfd_signed_vma branch_offset;
15220 bfd *abfd;
91d6fa6a 15221 unsigned int target;
48229727
JB		 15222
15223 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15224 data = (struct a8_branch_to_stub_data *) in_arg;
15225
15226 if (stub_entry->target_section != data->writing_section
4563a860 15227 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15228 return TRUE;
15229
15230 contents = data->contents;
15231
15232 veneered_insn_loc = stub_entry->target_section->output_section->vma
15233 + stub_entry->target_section->output_offset
15234 + stub_entry->target_value;
15235
15236 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15237 + stub_entry->stub_sec->output_offset
15238 + stub_entry->stub_offset;
15239
15240 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15241 veneered_insn_loc &= ~3u;
15242
15243 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15244
15245 abfd = stub_entry->target_section->owner;
91d6fa6a 15246 target = stub_entry->target_value;
48229727
JB		 15247
15248 /* We attempt to avoid this condition by setting stubs_always_after_branch
15249 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15250 This check is just to be on the safe side... */
15251 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15252 {
15253 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15254 "allocated in unsafe location"), abfd);
15255 return FALSE;
15256 }
15257
15258 switch (stub_entry->stub_type)
15259 {
15260 case arm_stub_a8_veneer_b:
15261 case arm_stub_a8_veneer_b_cond:
15262 branch_insn = 0xf0009000;
15263 goto jump24;
15264
15265 case arm_stub_a8_veneer_blx:
15266 branch_insn = 0xf000e800;
15267 goto jump24;
15268
15269 case arm_stub_a8_veneer_bl:
15270 {
15271 unsigned int i1, j1, i2, j2, s;
15272
15273 branch_insn = 0xf000d000;
15274
15275 jump24:
15276 if (branch_offset < -16777216 || branch_offset > 16777214)
15277 {
15278 /* There's not much we can do apart from complain if this
15279 happens. */
15280 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15281 "of range (input file too large)"), abfd);
15282 return FALSE;
15283 }
15284
15285 /* i1 = not(j1 eor s), so:
15286 not i1 = j1 eor s
15287 j1 = (not i1) eor s. */
15288
15289 branch_insn |= (branch_offset >> 1) & 0x7ff;
15290 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15291 i2 = (branch_offset >> 22) & 1;
15292 i1 = (branch_offset >> 23) & 1;
15293 s = (branch_offset >> 24) & 1;
15294 j1 = (!i1) ^ s;
15295 j2 = (!i2) ^ s;
15296 branch_insn |= j2 << 11;
15297 branch_insn |= j1 << 13;
15298 branch_insn |= s << 26;
15299 }
15300 break;
15301
15302 default:
15303 BFD_FAIL ();
15304 return FALSE;
15305 }
15306
91d6fa6a
NC		 15307 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15308 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15309
15310 return TRUE;
15311}
15312
e489d0ae
PB		 15313/* Do code byteswapping. Return FALSE afterwards so that the section is
15314 written out as normal. */
15315
15316static bfd_boolean
c7b8f16e 15317elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15318 struct bfd_link_info *link_info,
15319 asection *sec,
e489d0ae
PB		 15320 bfd_byte *contents)
15321{
48229727 15322 unsigned int mapcount, errcount;
8e3de13a 15323 _arm_elf_section_data *arm_data;
c7b8f16e 15324 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15325 elf32_arm_section_map *map;
c7b8f16e 15326 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15327 bfd_vma ptr;
15328 bfd_vma end;
c7b8f16e 15329 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15330 bfd_byte tmp;
48229727 15331 unsigned int i;
57e8b36a 15332
4dfe6ac6
NC		 15333 if (globals == NULL)
15334 return FALSE;
15335
8e3de13a
NC		 15336 /* If this section has not been allocated an _arm_elf_section_data
15337 structure then we cannot record anything. */
15338 arm_data = get_arm_elf_section_data (sec);
15339 if (arm_data == NULL)
15340 return FALSE;
15341
15342 mapcount = arm_data->mapcount;
15343 map = arm_data->map;
c7b8f16e
JB		 15344 errcount = arm_data->erratumcount;
15345
15346 if (errcount != 0)
15347 {
15348 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15349
15350 for (errnode = arm_data->erratumlist; errnode != 0;
99059e56
RM		 15351 errnode = errnode->next)
15352 {
15353 bfd_vma target = errnode->vma - offset;
15354
15355 switch (errnode->type)
15356 {
15357 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15358 {
15359 bfd_vma branch_to_veneer;
15360 /* Original condition code of instruction, plus bit mask for
15361 ARM B instruction. */
15362 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15363 | 0x0a000000;
c7b8f16e
JB		 15364
15365 /* The instruction is before the label. */
91d6fa6a 15366 target -= 4;
c7b8f16e
JB		 15367
15368 /* Above offset included in -4 below. */
15369 branch_to_veneer = errnode->u.b.veneer->vma
99059e56 15370 - errnode->vma - 4;
c7b8f16e
JB		 15371
15372 if ((signed) branch_to_veneer < -(1 << 25)
15373 || (signed) branch_to_veneer >= (1 << 25))
15374 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15375 "range"), output_bfd);
15376
99059e56
RM		 15377 insn |= (branch_to_veneer >> 2) & 0xffffff;
15378 contents[endianflip ^ target] = insn & 0xff;
15379 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15380 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15381 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15382 }
15383 break;
c7b8f16e
JB		 15384
15385 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 15386 {
15387 bfd_vma branch_from_veneer;
15388 unsigned int insn;
c7b8f16e 15389
99059e56
RM		 15390 /* Take size of veneer into account. */
15391 branch_from_veneer = errnode->u.v.branch->vma
15392 - errnode->vma - 12;
c7b8f16e
JB		 15393
15394 if ((signed) branch_from_veneer < -(1 << 25)
15395 || (signed) branch_from_veneer >= (1 << 25))
15396 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15397 "range"), output_bfd);
15398
99059e56
RM		 15399 /* Original instruction. */
15400 insn = errnode->u.v.branch->u.b.vfp_insn;
15401 contents[endianflip ^ target] = insn & 0xff;
15402 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15403 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15404 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15405
15406 /* Branch back to insn after original insn. */
15407 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15408 contents[endianflip ^ (target + 4)] = insn & 0xff;
15409 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15410 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15411 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15412 }
15413 break;
c7b8f16e 15414
99059e56
RM		 15415 default:
15416 abort ();
15417 }
15418 }
c7b8f16e 15419 }
e489d0ae 15420
2468f9c9
PB		 15421 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15422 {
15423 arm_unwind_table_edit *edit_node
99059e56 15424 = arm_data->u.exidx.unwind_edit_list;
2468f9c9 15425 /* Now, sec->size is the size of the section we will write. The original
99059e56 15426 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
2468f9c9
PB		 15427 markers) was sec->rawsize. (This isn't the case if we perform no
15428 edits, then rawsize will be zero and we should use size). */
21d799b5 15429 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15430 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15431 unsigned int in_index, out_index;
15432 bfd_vma add_to_offsets = 0;
15433
15434 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
99059e56 15435 {
2468f9c9
PB		 15436 if (edit_node)
15437 {
15438 unsigned int edit_index = edit_node->index;
b38cadfb 15439
2468f9c9 15440 if (in_index < edit_index && in_index * 8 < input_size)
99059e56 15441 {
2468f9c9
PB		 15442 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15443 contents + in_index * 8, add_to_offsets);
15444 out_index++;
15445 in_index++;
15446 }
15447 else if (in_index == edit_index
15448 || (in_index * 8 >= input_size
15449 && edit_index == UINT_MAX))
99059e56 15450 {
2468f9c9
PB		 15451 switch (edit_node->type)
15452 {
15453 case DELETE_EXIDX_ENTRY:
15454 in_index++;
15455 add_to_offsets += 8;
15456 break;
b38cadfb 15457
2468f9c9
PB		 15458 case INSERT_EXIDX_CANTUNWIND_AT_END:
15459 {
99059e56 15460 asection *text_sec = edit_node->linked_section;
2468f9c9
PB		 15461 bfd_vma text_offset = text_sec->output_section->vma
15462 + text_sec->output_offset
15463 + text_sec->size;
15464 bfd_vma exidx_offset = offset + out_index * 8;
99059e56 15465 unsigned long prel31_offset;
2468f9c9
PB		 15466
15467 /* Note: this is meant to be equivalent to an
15468 R_ARM_PREL31 relocation. These synthetic
15469 EXIDX_CANTUNWIND markers are not relocated by the
15470 usual BFD method. */
15471 prel31_offset = (text_offset - exidx_offset)
15472 & 0x7ffffffful;
15473
15474 /* First address we can't unwind. */
15475 bfd_put_32 (output_bfd, prel31_offset,
15476 &edited_contents[out_index * 8]);
15477
15478 /* Code for EXIDX_CANTUNWIND. */
15479 bfd_put_32 (output_bfd, 0x1,
15480 &edited_contents[out_index * 8 + 4]);
15481
15482 out_index++;
15483 add_to_offsets -= 8;
15484 }
15485 break;
15486 }
b38cadfb 15487
2468f9c9
PB		 15488 edit_node = edit_node->next;
15489 }
15490 }
15491 else
15492 {
15493 /* No more edits, copy remaining entries verbatim. */
15494 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15495 contents + in_index * 8, add_to_offsets);
15496 out_index++;
15497 in_index++;
15498 }
15499 }
15500
15501 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15502 bfd_set_section_contents (output_bfd, sec->output_section,
15503 edited_contents,
15504 (file_ptr) sec->output_offset, sec->size);
15505
15506 return TRUE;
15507 }
15508
48229727
JB		 15509 /* Fix code to point to Cortex-A8 erratum stubs. */
15510 if (globals->fix_cortex_a8)
15511 {
15512 struct a8_branch_to_stub_data data;
15513
15514 data.writing_section = sec;
15515 data.contents = contents;
15516
15517 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15518 &data);
15519 }
15520
e489d0ae
PB		 15521 if (mapcount == 0)
15522 return FALSE;
15523
c7b8f16e 15524 if (globals->byteswap_code)
e489d0ae 15525 {
c7b8f16e 15526 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15527
c7b8f16e
JB		 15528 ptr = map[0].vma;
15529 for (i = 0; i < mapcount; i++)
99059e56
RM		 15530 {
15531 if (i == mapcount - 1)
c7b8f16e 15532 end = sec->size;
99059e56
RM		 15533 else
15534 end = map[i + 1].vma;
e489d0ae 15535
99059e56 15536 switch (map[i].type)
e489d0ae 15537 {
c7b8f16e
JB		 15538 case 'a':
15539 /* Byte swap code words. */
15540 while (ptr + 3 < end)
99059e56
RM		 15541 {
15542 tmp = contents[ptr];
15543 contents[ptr] = contents[ptr + 3];
15544 contents[ptr + 3] = tmp;
15545 tmp = contents[ptr + 1];
15546 contents[ptr + 1] = contents[ptr + 2];
15547 contents[ptr + 2] = tmp;
15548 ptr += 4;
15549 }
c7b8f16e 15550 break;
e489d0ae 15551
c7b8f16e
JB		 15552 case 't':
15553 /* Byte swap code halfwords. */
15554 while (ptr + 1 < end)
99059e56
RM		 15555 {
15556 tmp = contents[ptr];
15557 contents[ptr] = contents[ptr + 1];
15558 contents[ptr + 1] = tmp;
15559 ptr += 2;
15560 }
c7b8f16e
JB		 15561 break;
15562
15563 case 'd':
15564 /* Leave data alone. */
15565 break;
15566 }
99059e56
RM		 15567 ptr = end;
15568 }
e489d0ae 15569 }
8e3de13a 15570
93204d3a 15571 free (map);
47b2e99c 15572 arm_data->mapcount = -1;
c7b8f16e 15573 arm_data->mapsize = 0;
8e3de13a 15574 arm_data->map = NULL;
8e3de13a 15575
e489d0ae
PB		 15576 return FALSE;
15577}
15578
0beaef2b
PB		 15579/* Mangle thumb function symbols as we read them in. */
15580
8384fb8f 15581static bfd_boolean
0beaef2b
PB		 15582elf32_arm_swap_symbol_in (bfd * abfd,
15583 const void *psrc,
15584 const void *pshn,
15585 Elf_Internal_Sym *dst)
15586{
8384fb8f
AM		 15587 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15588 return FALSE;
0beaef2b
PB		 15589
15590 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15591 the address. */
63e1a0fc
PB		 15592 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15593 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15594 {
63e1a0fc
PB		 15595 if (dst->st_value & 1)
15596 {
15597 dst->st_value &= ~(bfd_vma) 1;
15598 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15599 }
15600 else
15601 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15602 }
15603 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15604 {
15605 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15606 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15607 }
35fc36a8
RS		 15608 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15609 dst->st_target_internal = ST_BRANCH_LONG;
15610 else
63e1a0fc 15611 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15612
8384fb8f 15613 return TRUE;
0beaef2b
PB		 15614}
15615
15616
15617/* Mangle thumb function symbols as we write them out. */
15618
15619static void
15620elf32_arm_swap_symbol_out (bfd *abfd,
15621 const Elf_Internal_Sym *src,
15622 void *cdst,
15623 void *shndx)
15624{
15625 Elf_Internal_Sym newsym;
15626
15627 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15628 of the address set, as per the new EABI. We do this unconditionally
15629 because objcopy does not set the elf header flags until after
15630 it writes out the symbol table. */
35fc36a8 15631 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15632 {
15633 newsym = *src;
34e77a92
RS		 15634 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15635 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad 15636 if (newsym.st_shndx != SHN_UNDEF)
99059e56
RM		 15637 {
15638 /* Do this only for defined symbols. At link type, the static
15639 linker will simulate the work of dynamic linker of resolving
15640 symbols and will carry over the thumbness of found symbols to
15641 the output symbol table. It's not clear how it happens, but
15642 the thumbness of undefined symbols can well be different at
15643 runtime, and writing '1' for them will be confusing for users
15644 and possibly for dynamic linker itself.
15645 */
15646 newsym.st_value |= 1;
15647 }
906e58ca 15648
0beaef2b
PB		 15649 src = &newsym;
15650 }
15651 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15652}
15653
b294bdf8
MM		 15654/* Add the PT_ARM_EXIDX program header. */
15655
15656static bfd_boolean
906e58ca 15657elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15658 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15659{
15660 struct elf_segment_map *m;
15661 asection *sec;
15662
15663 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15664 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15665 {
15666 /* If there is already a PT_ARM_EXIDX header, then we do not
15667 want to add another one. This situation arises when running
15668 "strip"; the input binary already has the header. */
12bd6957 15669 m = elf_seg_map (abfd);
b294bdf8
MM		 15670 while (m && m->p_type != PT_ARM_EXIDX)
15671 m = m->next;
15672 if (!m)
15673 {
21d799b5 15674 m = (struct elf_segment_map *)
99059e56 15675 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15676 if (m == NULL)
15677 return FALSE;
15678 m->p_type = PT_ARM_EXIDX;
15679 m->count = 1;
15680 m->sections[0] = sec;
15681
12bd6957
AM		 15682 m->next = elf_seg_map (abfd);
15683 elf_seg_map (abfd) = m;
b294bdf8
MM		 15684 }
15685 }
15686
15687 return TRUE;
15688}
15689
15690/* We may add a PT_ARM_EXIDX program header. */
15691
15692static int
a6b96beb
AM		 15693elf32_arm_additional_program_headers (bfd *abfd,
15694 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15695{
15696 asection *sec;
15697
15698 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15699 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15700 return 1;
15701 else
15702 return 0;
15703}
15704
34e77a92
RS		 15705/* Hook called by the linker routine which adds symbols from an object
15706 file. */
15707
15708static bfd_boolean
15709elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15710 Elf_Internal_Sym *sym, const char **namep,
15711 flagword *flagsp, asection **secp, bfd_vma *valp)
15712{
15713 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15714 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15715 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15716 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15717
15718 if (elf32_arm_hash_table (info)->vxworks_p
15719 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15720 flagsp, secp, valp))
15721 return FALSE;
15722
15723 return TRUE;
15724}
15725
0beaef2b 15726/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15727const struct elf_size_info elf32_arm_size_info =
15728{
0beaef2b
PB		 15729 sizeof (Elf32_External_Ehdr),
15730 sizeof (Elf32_External_Phdr),
15731 sizeof (Elf32_External_Shdr),
15732 sizeof (Elf32_External_Rel),
15733 sizeof (Elf32_External_Rela),
15734 sizeof (Elf32_External_Sym),
15735 sizeof (Elf32_External_Dyn),
15736 sizeof (Elf_External_Note),
15737 4,
15738 1,
15739 32, 2,
15740 ELFCLASS32, EV_CURRENT,
15741 bfd_elf32_write_out_phdrs,
15742 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15743 bfd_elf32_checksum_contents,
0beaef2b
PB		 15744 bfd_elf32_write_relocs,
15745 elf32_arm_swap_symbol_in,
15746 elf32_arm_swap_symbol_out,
15747 bfd_elf32_slurp_reloc_table,
15748 bfd_elf32_slurp_symbol_table,
15749 bfd_elf32_swap_dyn_in,
15750 bfd_elf32_swap_dyn_out,
15751 bfd_elf32_swap_reloc_in,
15752 bfd_elf32_swap_reloc_out,
15753 bfd_elf32_swap_reloca_in,
15754 bfd_elf32_swap_reloca_out
15755};
15756
252b5132 15757#define ELF_ARCH bfd_arch_arm
ae95ffa6 15758#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15759#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15760#ifdef __QNXTARGET__
15761#define ELF_MAXPAGESIZE 0x1000
15762#else
f21f3fe0 15763#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15764#endif
b1342370 15765#define ELF_MINPAGESIZE 0x1000
24718e3b 15766#define ELF_COMMONPAGESIZE 0x1000
252b5132 15767
ba93b8ac
DJ		 15768#define bfd_elf32_mkobject elf32_arm_mkobject
15769
99e4ae17
AJ		 15770#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15771#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15772#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15773#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15774#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15775#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15776#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15777#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15778#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15779#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15780#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15781#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15782#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15783
15784#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15785#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15786#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15787#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15788#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15789#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15790#define elf_backend_write_section elf32_arm_write_section
252b5132 15791#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15792#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15793#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15794#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15795#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15796#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15797#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15798#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15799#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15800#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15801#define elf_backend_fake_sections elf32_arm_fake_sections
15802#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15803#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15804#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15805#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15806#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15807#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15808#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15809#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15810#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15811
15812#define elf_backend_can_refcount 1
15813#define elf_backend_can_gc_sections 1
15814#define elf_backend_plt_readonly 1
15815#define elf_backend_want_got_plt 1
15816#define elf_backend_want_plt_sym 0
15817#define elf_backend_may_use_rel_p 1
15818#define elf_backend_may_use_rela_p 0
4e7fd91e 15819#define elf_backend_default_use_rela_p 0
252b5132 15820
04f7c78d 15821#define elf_backend_got_header_size 12
04f7c78d 15822
906e58ca
NC		 15823#undef elf_backend_obj_attrs_vendor
15824#define elf_backend_obj_attrs_vendor "aeabi"
15825#undef elf_backend_obj_attrs_section
15826#define elf_backend_obj_attrs_section ".ARM.attributes"
15827#undef elf_backend_obj_attrs_arg_type
15828#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15829#undef elf_backend_obj_attrs_section_type
104d59d1 15830#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15831#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15832#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15833
252b5132 15834#include "elf32-target.h"
7f266840 15835
b38cadfb
NC		 15836/* Native Client targets. */
15837
15838#undef TARGET_LITTLE_SYM
15839#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15840#undef TARGET_LITTLE_NAME
15841#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15842#undef TARGET_BIG_SYM
15843#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15844#undef TARGET_BIG_NAME
15845#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15846
15847/* Like elf32_arm_link_hash_table_create -- but overrides
15848 appropriately for NaCl. */
15849
15850static struct bfd_link_hash_table *
15851elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15852{
15853 struct bfd_link_hash_table *ret;
15854
15855 ret = elf32_arm_link_hash_table_create (abfd);
15856 if (ret)
15857 {
15858 struct elf32_arm_link_hash_table *htab
15859 = (struct elf32_arm_link_hash_table *) ret;
15860
15861 htab->nacl_p = 1;
15862
15863 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15864 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15865 }
15866 return ret;
15867}
15868
15869/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15870 really need to use elf32_arm_modify_segment_map. But we do it
15871 anyway just to reduce gratuitous differences with the stock ARM backend. */
15872
15873static bfd_boolean
15874elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15875{
15876 return (elf32_arm_modify_segment_map (abfd, info)
15877 && nacl_modify_segment_map (abfd, info));
15878}
15879
887badb3
RM		 15880static void
15881elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
15882{
15883 elf32_arm_final_write_processing (abfd, linker);
15884 nacl_final_write_processing (abfd, linker);
15885}
15886
15887
b38cadfb
NC		 15888#undef elf32_bed
15889#define elf32_bed elf32_arm_nacl_bed
15890#undef bfd_elf32_bfd_link_hash_table_create
15891#define bfd_elf32_bfd_link_hash_table_create \
15892 elf32_arm_nacl_link_hash_table_create
15893#undef elf_backend_plt_alignment
15894#define elf_backend_plt_alignment 4
15895#undef elf_backend_modify_segment_map
15896#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15897#undef elf_backend_modify_program_headers
15898#define elf_backend_modify_program_headers nacl_modify_program_headers
887badb3
RM		 15899#undef elf_backend_final_write_processing
15900#define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
b38cadfb
NC		 15901
15902#undef ELF_MAXPAGESIZE
15903#define ELF_MAXPAGESIZE 0x10000
887badb3
RM		 15904#undef ELF_MINPAGESIZE
15905#undef ELF_COMMONPAGESIZE
15906
b38cadfb
NC		 15907
15908#include "elf32-target.h"
15909
15910/* Reset to defaults. */
15911#undef elf_backend_plt_alignment
15912#undef elf_backend_modify_segment_map
15913#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15914#undef elf_backend_modify_program_headers
887badb3
RM		 15915#undef elf_backend_final_write_processing
15916#define elf_backend_final_write_processing elf32_arm_final_write_processing
15917#undef ELF_MINPAGESIZE
15918#define ELF_MINPAGESIZE 0x1000
15919#undef ELF_COMMONPAGESIZE
15920#define ELF_COMMONPAGESIZE 0x1000
15921
b38cadfb 15922
906e58ca 15923/* VxWorks Targets. */
4e7fd91e 15924
906e58ca 15925#undef TARGET_LITTLE_SYM
4e7fd91e 15926#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15927#undef TARGET_LITTLE_NAME
4e7fd91e 15928#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15929#undef TARGET_BIG_SYM
4e7fd91e 15930#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15931#undef TARGET_BIG_NAME
4e7fd91e
PB		 15932#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15933
15934/* Like elf32_arm_link_hash_table_create -- but overrides
15935 appropriately for VxWorks. */
906e58ca 15936
4e7fd91e
PB		 15937static struct bfd_link_hash_table *
15938elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15939{
15940 struct bfd_link_hash_table *ret;
15941
15942 ret = elf32_arm_link_hash_table_create (abfd);
15943 if (ret)
15944 {
15945 struct elf32_arm_link_hash_table *htab
00a97672 15946 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15947 htab->use_rel = 0;
00a97672 15948 htab->vxworks_p = 1;
4e7fd91e
PB		 15949 }
15950 return ret;
906e58ca 15951}
4e7fd91e 15952
00a97672
RS		 15953static void
15954elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15955{
15956 elf32_arm_final_write_processing (abfd, linker);
15957 elf_vxworks_final_write_processing (abfd, linker);
15958}
15959
906e58ca 15960#undef elf32_bed
4e7fd91e
PB		 15961#define elf32_bed elf32_arm_vxworks_bed
15962
906e58ca
NC		 15963#undef bfd_elf32_bfd_link_hash_table_create
15964#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15965#undef elf_backend_final_write_processing
15966#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15967#undef elf_backend_emit_relocs
15968#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15969
906e58ca 15970#undef elf_backend_may_use_rel_p
00a97672 15971#define elf_backend_may_use_rel_p 0
906e58ca 15972#undef elf_backend_may_use_rela_p
00a97672 15973#define elf_backend_may_use_rela_p 1
906e58ca 15974#undef elf_backend_default_use_rela_p
00a97672 15975#define elf_backend_default_use_rela_p 1
906e58ca 15976#undef elf_backend_want_plt_sym
00a97672 15977#define elf_backend_want_plt_sym 1
906e58ca 15978#undef ELF_MAXPAGESIZE
00a97672 15979#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15980
15981#include "elf32-target.h"
15982
15983
21d799b5
NC		 15984/* Merge backend specific data from an object file to the output
15985 object file when linking. */
15986
15987static bfd_boolean
15988elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15989{
15990 flagword out_flags;
15991 flagword in_flags;
15992 bfd_boolean flags_compatible = TRUE;
15993 asection *sec;
15994
cc643b88 15995 /* Check if we have the same endianness. */
21d799b5
NC		 15996 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15997 return FALSE;
15998
15999 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16000 return TRUE;
16001
16002 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16003 return FALSE;
16004
16005 /* The input BFD must have had its flags initialised. */
16006 /* The following seems bogus to me -- The flags are initialized in
16007 the assembler but I don't think an elf_flags_init field is
16008 written into the object. */
16009 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16010
16011 in_flags = elf_elfheader (ibfd)->e_flags;
16012 out_flags = elf_elfheader (obfd)->e_flags;
16013
16014 /* In theory there is no reason why we couldn't handle this. However
16015 in practice it isn't even close to working and there is no real
16016 reason to want it. */
16017 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16018 && !(ibfd->flags & DYNAMIC)
16019 && (in_flags & EF_ARM_BE8))
16020 {
16021 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16022 ibfd);
16023 return FALSE;
16024 }
16025
16026 if (!elf_flags_init (obfd))
16027 {
16028 /* If the input is the default architecture and had the default
16029 flags then do not bother setting the flags for the output
16030 architecture, instead allow future merges to do this. If no
16031 future merges ever set these flags then they will retain their
99059e56
RM		 16032 uninitialised values, which surprise surprise, correspond
16033 to the default values. */
21d799b5
NC		 16034 if (bfd_get_arch_info (ibfd)->the_default
16035 && elf_elfheader (ibfd)->e_flags == 0)
16036 return TRUE;
16037
16038 elf_flags_init (obfd) = TRUE;
16039 elf_elfheader (obfd)->e_flags = in_flags;
16040
16041 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16042 && bfd_get_arch_info (obfd)->the_default)
16043 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16044
16045 return TRUE;
16046 }
16047
16048 /* Determine what should happen if the input ARM architecture
16049 does not match the output ARM architecture. */
16050 if (! bfd_arm_merge_machines (ibfd, obfd))
16051 return FALSE;
16052
16053 /* Identical flags must be compatible. */
16054 if (in_flags == out_flags)
16055 return TRUE;
16056
16057 /* Check to see if the input BFD actually contains any sections. If
16058 not, its flags may not have been initialised either, but it
16059 cannot actually cause any incompatiblity. Do not short-circuit
16060 dynamic objects; their section list may be emptied by
16061 elf_link_add_object_symbols.
16062
16063 Also check to see if there are no code sections in the input.
16064 In this case there is no need to check for code specific flags.
16065 XXX - do we need to worry about floating-point format compatability
16066 in data sections ? */
16067 if (!(ibfd->flags & DYNAMIC))
16068 {
16069 bfd_boolean null_input_bfd = TRUE;
16070 bfd_boolean only_data_sections = TRUE;
16071
16072 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16073 {
16074 /* Ignore synthetic glue sections. */
16075 if (strcmp (sec->name, ".glue_7")
16076 && strcmp (sec->name, ".glue_7t"))
16077 {
16078 if ((bfd_get_section_flags (ibfd, sec)
16079 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16080 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
99059e56 16081 only_data_sections = FALSE;
21d799b5
NC		 16082
16083 null_input_bfd = FALSE;
16084 break;
16085 }
16086 }
16087
16088 if (null_input_bfd || only_data_sections)
16089 return TRUE;
16090 }
16091
16092 /* Complain about various flag mismatches. */
16093 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16094 EF_ARM_EABI_VERSION (out_flags)))
16095 {
16096 _bfd_error_handler
16097 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16098 ibfd, obfd,
16099 (in_flags & EF_ARM_EABIMASK) >> 24,
16100 (out_flags & EF_ARM_EABIMASK) >> 24);
16101 return FALSE;
16102 }
16103
16104 /* Not sure what needs to be checked for EABI versions >= 1. */
16105 /* VxWorks libraries do not use these flags. */
16106 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16107 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16108 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16109 {
16110 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16111 {
16112 _bfd_error_handler
16113 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16114 ibfd, obfd,
16115 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16116 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16117 flags_compatible = FALSE;
16118 }
16119
16120 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16121 {
16122 if (in_flags & EF_ARM_APCS_FLOAT)
16123 _bfd_error_handler
16124 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16125 ibfd, obfd);
16126 else
16127 _bfd_error_handler
16128 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16129 ibfd, obfd);
16130
16131 flags_compatible = FALSE;
16132 }
16133
16134 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16135 {
16136 if (in_flags & EF_ARM_VFP_FLOAT)
16137 _bfd_error_handler
16138 (_("error: %B uses VFP instructions, whereas %B does not"),
16139 ibfd, obfd);
16140 else
16141 _bfd_error_handler
16142 (_("error: %B uses FPA instructions, whereas %B does not"),
16143 ibfd, obfd);
16144
16145 flags_compatible = FALSE;
16146 }
16147
16148 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16149 {
16150 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16151 _bfd_error_handler
16152 (_("error: %B uses Maverick instructions, whereas %B does not"),
16153 ibfd, obfd);
16154 else
16155 _bfd_error_handler
16156 (_("error: %B does not use Maverick instructions, whereas %B does"),
16157 ibfd, obfd);
16158
16159 flags_compatible = FALSE;
16160 }
16161
16162#ifdef EF_ARM_SOFT_FLOAT
16163 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16164 {
16165 /* We can allow interworking between code that is VFP format
16166 layout, and uses either soft float or integer regs for
16167 passing floating point arguments and results. We already
16168 know that the APCS_FLOAT flags match; similarly for VFP
16169 flags. */
16170 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16171 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16172 {
16173 if (in_flags & EF_ARM_SOFT_FLOAT)
16174 _bfd_error_handler
16175 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16176 ibfd, obfd);
16177 else
16178 _bfd_error_handler
16179 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16180 ibfd, obfd);
16181
16182 flags_compatible = FALSE;
16183 }
16184 }
16185#endif
16186
16187 /* Interworking mismatch is only a warning. */
16188 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16189 {
16190 if (in_flags & EF_ARM_INTERWORK)
16191 {
16192 _bfd_error_handler
16193 (_("Warning: %B supports interworking, whereas %B does not"),
16194 ibfd, obfd);
16195 }
16196 else
16197 {
16198 _bfd_error_handler
16199 (_("Warning: %B does not support interworking, whereas %B does"),
16200 ibfd, obfd);
16201 }
16202 }
16203 }
16204
16205 return flags_compatible;
16206}
16207
16208
906e58ca 16209/* Symbian OS Targets. */
7f266840 16210
906e58ca 16211#undef TARGET_LITTLE_SYM
7f266840 16212#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 16213#undef TARGET_LITTLE_NAME
7f266840 16214#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16215#undef TARGET_BIG_SYM
7f266840 16216#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 16217#undef TARGET_BIG_NAME
7f266840
DJ		 16218#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16219
16220/* Like elf32_arm_link_hash_table_create -- but overrides
16221 appropriately for Symbian OS. */
906e58ca 16222
7f266840
DJ		 16223static struct bfd_link_hash_table *
16224elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16225{
16226 struct bfd_link_hash_table *ret;
16227
16228 ret = elf32_arm_link_hash_table_create (abfd);
16229 if (ret)
16230 {
16231 struct elf32_arm_link_hash_table *htab
16232 = (struct elf32_arm_link_hash_table *)ret;
16233 /* There is no PLT header for Symbian OS. */
16234 htab->plt_header_size = 0;
95720a86
DJ		 16235 /* The PLT entries are each one instruction and one word. */
16236 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16237 htab->symbian_p = 1;
33bfe774
JB		 16238 /* Symbian uses armv5t or above, so use_blx is always true. */
16239 htab->use_blx = 1;
67687978 16240 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16241 }
16242 return ret;
906e58ca 16243}
7f266840 16244
b35d266b 16245static const struct bfd_elf_special_section
551b43fd 16246elf32_arm_symbian_special_sections[] =
7f266840 16247{
5cd3778d
MM		 16248 /* In a BPABI executable, the dynamic linking sections do not go in
16249 the loadable read-only segment. The post-linker may wish to
16250 refer to these sections, but they are not part of the final
16251 program image. */
0112cd26
NC		 16252 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16253 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16254 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16255 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16256 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16257 /* These sections do not need to be writable as the SymbianOS
16258 postlinker will arrange things so that no dynamic relocation is
16259 required. */
0112cd26
NC		 16260 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16261 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16262 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16263 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16264};
16265
c3c76620 16266static void
906e58ca 16267elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16268 struct bfd_link_info *link_info)
c3c76620
MM		 16269{
16270 /* BPABI objects are never loaded directly by an OS kernel; they are
16271 processed by a postlinker first, into an OS-specific format. If
16272 the D_PAGED bit is set on the file, BFD will align segments on
16273 page boundaries, so that an OS can directly map the file. With
16274 BPABI objects, that just results in wasted space. In addition,
16275 because we clear the D_PAGED bit, map_sections_to_segments will
16276 recognize that the program headers should not be mapped into any
16277 loadable segment. */
16278 abfd->flags &= ~D_PAGED;
906e58ca 16279 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16280}
7f266840
DJ		 16281
16282static bfd_boolean
906e58ca 16283elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16284 struct bfd_link_info *info)
7f266840
DJ		 16285{
16286 struct elf_segment_map *m;
16287 asection *dynsec;
16288
7f266840
DJ		 16289 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16290 segment. However, because the .dynamic section is not marked
16291 with SEC_LOAD, the generic ELF code will not create such a
16292 segment. */
16293 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16294 if (dynsec)
16295 {
12bd6957 16296 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16297 if (m->p_type == PT_DYNAMIC)
16298 break;
16299
16300 if (m == NULL)
16301 {
16302 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16303 m->next = elf_seg_map (abfd);
16304 elf_seg_map (abfd) = m;
8ded5a0f 16305 }
7f266840
DJ		 16306 }
16307
b294bdf8
MM		 16308 /* Also call the generic arm routine. */
16309 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16310}
16311
95720a86
DJ		 16312/* Return address for Ith PLT stub in section PLT, for relocation REL
16313 or (bfd_vma) -1 if it should not be included. */
16314
16315static bfd_vma
16316elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16317 const arelent *rel ATTRIBUTE_UNUSED)
16318{
16319 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16320}
16321
16322
8029a119 16323#undef elf32_bed
7f266840
DJ		 16324#define elf32_bed elf32_arm_symbian_bed
16325
16326/* The dynamic sections are not allocated on SymbianOS; the postlinker
16327 will process them and then discard them. */
906e58ca 16328#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16329#define ELF_DYNAMIC_SEC_FLAGS \
16330 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16331
00a97672 16332#undef elf_backend_emit_relocs
c3c76620 16333
906e58ca
NC		 16334#undef bfd_elf32_bfd_link_hash_table_create
16335#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16336#undef elf_backend_special_sections
16337#define elf_backend_special_sections elf32_arm_symbian_special_sections
16338#undef elf_backend_begin_write_processing
16339#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16340#undef elf_backend_final_write_processing
16341#define elf_backend_final_write_processing elf32_arm_final_write_processing
16342
16343#undef elf_backend_modify_segment_map
7f266840
DJ		 16344#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16345
16346/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16347#undef elf_backend_got_header_size
7f266840
DJ		 16348#define elf_backend_got_header_size 0
16349
16350/* Similarly, there is no .got.plt section. */
906e58ca 16351#undef elf_backend_want_got_plt
7f266840
DJ		 16352#define elf_backend_want_got_plt 0
16353
906e58ca 16354#undef elf_backend_plt_sym_val
95720a86
DJ		 16355#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16356
906e58ca 16357#undef elf_backend_may_use_rel_p
00a97672 16358#define elf_backend_may_use_rel_p 1
906e58ca 16359#undef elf_backend_may_use_rela_p
00a97672 16360#define elf_backend_may_use_rela_p 0
906e58ca 16361#undef elf_backend_default_use_rela_p
00a97672 16362#define elf_backend_default_use_rela_p 0
906e58ca 16363#undef elf_backend_want_plt_sym
00a97672 16364#define elf_backend_want_plt_sym 0
906e58ca 16365#undef ELF_MAXPAGESIZE
00a97672 16366#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16367
7f266840 16368#include "elf32-target.h"
GDB Binutils - Deliverables
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