Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* 32-bit ELF support for ARM |
e44a2c9c | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
1d7e9d18 | 3 | 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 9 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
252b5132 | 21 | |
6e6718a3 | 22 | #include "sysdep.h" |
2468f9c9 PB |
23 | #include <limits.h> |
24 | ||
3db64b00 | 25 | #include "bfd.h" |
6034aab8 | 26 | #include "bfd_stdint.h" |
00a97672 | 27 | #include "libiberty.h" |
7f266840 DJ |
28 | #include "libbfd.h" |
29 | #include "elf-bfd.h" | |
b38cadfb | 30 | #include "elf-nacl.h" |
00a97672 | 31 | #include "elf-vxworks.h" |
ee065d83 | 32 | #include "elf/arm.h" |
7f266840 | 33 | |
00a97672 RS |
34 | /* Return the relocation section associated with NAME. HTAB is the |
35 | bfd's elf32_arm_link_hash_entry. */ | |
36 | #define RELOC_SECTION(HTAB, NAME) \ | |
37 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
38 | ||
39 | /* Return size of a relocation entry. HTAB is the bfd's | |
40 | elf32_arm_link_hash_entry. */ | |
41 | #define RELOC_SIZE(HTAB) \ | |
42 | ((HTAB)->use_rel \ | |
43 | ? sizeof (Elf32_External_Rel) \ | |
44 | : sizeof (Elf32_External_Rela)) | |
45 | ||
46 | /* Return function to swap relocations in. HTAB is the bfd's | |
47 | elf32_arm_link_hash_entry. */ | |
48 | #define SWAP_RELOC_IN(HTAB) \ | |
49 | ((HTAB)->use_rel \ | |
50 | ? bfd_elf32_swap_reloc_in \ | |
51 | : bfd_elf32_swap_reloca_in) | |
52 | ||
53 | /* Return function to swap relocations out. HTAB is the bfd's | |
54 | elf32_arm_link_hash_entry. */ | |
55 | #define SWAP_RELOC_OUT(HTAB) \ | |
56 | ((HTAB)->use_rel \ | |
57 | ? bfd_elf32_swap_reloc_out \ | |
58 | : bfd_elf32_swap_reloca_out) | |
59 | ||
7f266840 DJ |
60 | #define elf_info_to_howto 0 |
61 | #define elf_info_to_howto_rel elf32_arm_info_to_howto | |
62 | ||
63 | #define ARM_ELF_ABI_VERSION 0 | |
64 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
65 | ||
79f08007 YZ |
66 | /* The Adjusted Place, as defined by AAELF. */ |
67 | #define Pa(X) ((X) & 0xfffffffc) | |
68 | ||
3e6b1042 DJ |
69 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
70 | struct bfd_link_info *link_info, | |
71 | asection *sec, | |
72 | bfd_byte *contents); | |
73 | ||
7f266840 DJ |
74 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
75 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
76 | in that slot. */ | |
77 | ||
c19d1205 | 78 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 79 | { |
8029a119 | 80 | /* No relocation. */ |
7f266840 DJ |
81 | HOWTO (R_ARM_NONE, /* type */ |
82 | 0, /* rightshift */ | |
83 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
84 | 0, /* bitsize */ | |
85 | FALSE, /* pc_relative */ | |
86 | 0, /* bitpos */ | |
87 | complain_overflow_dont,/* complain_on_overflow */ | |
88 | bfd_elf_generic_reloc, /* special_function */ | |
89 | "R_ARM_NONE", /* name */ | |
90 | FALSE, /* partial_inplace */ | |
91 | 0, /* src_mask */ | |
92 | 0, /* dst_mask */ | |
93 | FALSE), /* pcrel_offset */ | |
94 | ||
95 | HOWTO (R_ARM_PC24, /* type */ | |
96 | 2, /* rightshift */ | |
97 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
98 | 24, /* bitsize */ | |
99 | TRUE, /* pc_relative */ | |
100 | 0, /* bitpos */ | |
101 | complain_overflow_signed,/* complain_on_overflow */ | |
102 | bfd_elf_generic_reloc, /* special_function */ | |
103 | "R_ARM_PC24", /* name */ | |
104 | FALSE, /* partial_inplace */ | |
105 | 0x00ffffff, /* src_mask */ | |
106 | 0x00ffffff, /* dst_mask */ | |
107 | TRUE), /* pcrel_offset */ | |
108 | ||
109 | /* 32 bit absolute */ | |
110 | HOWTO (R_ARM_ABS32, /* type */ | |
111 | 0, /* rightshift */ | |
112 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
113 | 32, /* bitsize */ | |
114 | FALSE, /* pc_relative */ | |
115 | 0, /* bitpos */ | |
116 | complain_overflow_bitfield,/* complain_on_overflow */ | |
117 | bfd_elf_generic_reloc, /* special_function */ | |
118 | "R_ARM_ABS32", /* name */ | |
119 | FALSE, /* partial_inplace */ | |
120 | 0xffffffff, /* src_mask */ | |
121 | 0xffffffff, /* dst_mask */ | |
122 | FALSE), /* pcrel_offset */ | |
123 | ||
124 | /* standard 32bit pc-relative reloc */ | |
125 | HOWTO (R_ARM_REL32, /* type */ | |
126 | 0, /* rightshift */ | |
127 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
128 | 32, /* bitsize */ | |
129 | TRUE, /* pc_relative */ | |
130 | 0, /* bitpos */ | |
131 | complain_overflow_bitfield,/* complain_on_overflow */ | |
132 | bfd_elf_generic_reloc, /* special_function */ | |
133 | "R_ARM_REL32", /* name */ | |
134 | FALSE, /* partial_inplace */ | |
135 | 0xffffffff, /* src_mask */ | |
136 | 0xffffffff, /* dst_mask */ | |
137 | TRUE), /* pcrel_offset */ | |
138 | ||
c19d1205 | 139 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 140 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 DJ |
141 | 0, /* rightshift */ |
142 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
4962c51a MS |
143 | 32, /* bitsize */ |
144 | TRUE, /* pc_relative */ | |
7f266840 | 145 | 0, /* bitpos */ |
4962c51a | 146 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 147 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 148 | "R_ARM_LDR_PC_G0", /* name */ |
7f266840 | 149 | FALSE, /* partial_inplace */ |
4962c51a MS |
150 | 0xffffffff, /* src_mask */ |
151 | 0xffffffff, /* dst_mask */ | |
152 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
153 | |
154 | /* 16 bit absolute */ | |
155 | HOWTO (R_ARM_ABS16, /* type */ | |
156 | 0, /* rightshift */ | |
157 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
158 | 16, /* bitsize */ | |
159 | FALSE, /* pc_relative */ | |
160 | 0, /* bitpos */ | |
161 | complain_overflow_bitfield,/* complain_on_overflow */ | |
162 | bfd_elf_generic_reloc, /* special_function */ | |
163 | "R_ARM_ABS16", /* name */ | |
164 | FALSE, /* partial_inplace */ | |
165 | 0x0000ffff, /* src_mask */ | |
166 | 0x0000ffff, /* dst_mask */ | |
167 | FALSE), /* pcrel_offset */ | |
168 | ||
169 | /* 12 bit absolute */ | |
170 | HOWTO (R_ARM_ABS12, /* type */ | |
171 | 0, /* rightshift */ | |
172 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
173 | 12, /* bitsize */ | |
174 | FALSE, /* pc_relative */ | |
175 | 0, /* bitpos */ | |
176 | complain_overflow_bitfield,/* complain_on_overflow */ | |
177 | bfd_elf_generic_reloc, /* special_function */ | |
178 | "R_ARM_ABS12", /* name */ | |
179 | FALSE, /* partial_inplace */ | |
00a97672 RS |
180 | 0x00000fff, /* src_mask */ |
181 | 0x00000fff, /* dst_mask */ | |
7f266840 DJ |
182 | FALSE), /* pcrel_offset */ |
183 | ||
184 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
185 | 6, /* rightshift */ | |
186 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
187 | 5, /* bitsize */ | |
188 | FALSE, /* pc_relative */ | |
189 | 0, /* bitpos */ | |
190 | complain_overflow_bitfield,/* complain_on_overflow */ | |
191 | bfd_elf_generic_reloc, /* special_function */ | |
192 | "R_ARM_THM_ABS5", /* name */ | |
193 | FALSE, /* partial_inplace */ | |
194 | 0x000007e0, /* src_mask */ | |
195 | 0x000007e0, /* dst_mask */ | |
196 | FALSE), /* pcrel_offset */ | |
197 | ||
198 | /* 8 bit absolute */ | |
199 | HOWTO (R_ARM_ABS8, /* type */ | |
200 | 0, /* rightshift */ | |
201 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
202 | 8, /* bitsize */ | |
203 | FALSE, /* pc_relative */ | |
204 | 0, /* bitpos */ | |
205 | complain_overflow_bitfield,/* complain_on_overflow */ | |
206 | bfd_elf_generic_reloc, /* special_function */ | |
207 | "R_ARM_ABS8", /* name */ | |
208 | FALSE, /* partial_inplace */ | |
209 | 0x000000ff, /* src_mask */ | |
210 | 0x000000ff, /* dst_mask */ | |
211 | FALSE), /* pcrel_offset */ | |
212 | ||
213 | HOWTO (R_ARM_SBREL32, /* type */ | |
214 | 0, /* rightshift */ | |
215 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
216 | 32, /* bitsize */ | |
217 | FALSE, /* pc_relative */ | |
218 | 0, /* bitpos */ | |
219 | complain_overflow_dont,/* complain_on_overflow */ | |
220 | bfd_elf_generic_reloc, /* special_function */ | |
221 | "R_ARM_SBREL32", /* name */ | |
222 | FALSE, /* partial_inplace */ | |
223 | 0xffffffff, /* src_mask */ | |
224 | 0xffffffff, /* dst_mask */ | |
225 | FALSE), /* pcrel_offset */ | |
226 | ||
c19d1205 | 227 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 DJ |
228 | 1, /* rightshift */ |
229 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
f6ebfac0 | 230 | 24, /* bitsize */ |
7f266840 DJ |
231 | TRUE, /* pc_relative */ |
232 | 0, /* bitpos */ | |
233 | complain_overflow_signed,/* complain_on_overflow */ | |
234 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 235 | "R_ARM_THM_CALL", /* name */ |
7f266840 | 236 | FALSE, /* partial_inplace */ |
7f6ab9f8 AM |
237 | 0x07ff2fff, /* src_mask */ |
238 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
239 | TRUE), /* pcrel_offset */ |
240 | ||
241 | HOWTO (R_ARM_THM_PC8, /* type */ | |
242 | 1, /* rightshift */ | |
243 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
244 | 8, /* bitsize */ | |
245 | TRUE, /* pc_relative */ | |
246 | 0, /* bitpos */ | |
247 | complain_overflow_signed,/* complain_on_overflow */ | |
248 | bfd_elf_generic_reloc, /* special_function */ | |
249 | "R_ARM_THM_PC8", /* name */ | |
250 | FALSE, /* partial_inplace */ | |
251 | 0x000000ff, /* src_mask */ | |
252 | 0x000000ff, /* dst_mask */ | |
253 | TRUE), /* pcrel_offset */ | |
254 | ||
c19d1205 | 255 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 DJ |
256 | 1, /* rightshift */ |
257 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
258 | 32, /* bitsize */ |
259 | FALSE, /* pc_relative */ | |
7f266840 DJ |
260 | 0, /* bitpos */ |
261 | complain_overflow_signed,/* complain_on_overflow */ | |
262 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 263 | "R_ARM_BREL_ADJ", /* name */ |
7f266840 | 264 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
265 | 0xffffffff, /* src_mask */ |
266 | 0xffffffff, /* dst_mask */ | |
267 | FALSE), /* pcrel_offset */ | |
7f266840 | 268 | |
0855e32b | 269 | HOWTO (R_ARM_TLS_DESC, /* type */ |
7f266840 | 270 | 0, /* rightshift */ |
0855e32b NS |
271 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
272 | 32, /* bitsize */ | |
7f266840 DJ |
273 | FALSE, /* pc_relative */ |
274 | 0, /* bitpos */ | |
0855e32b | 275 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 276 | bfd_elf_generic_reloc, /* special_function */ |
0855e32b | 277 | "R_ARM_TLS_DESC", /* name */ |
7f266840 | 278 | FALSE, /* partial_inplace */ |
0855e32b NS |
279 | 0xffffffff, /* src_mask */ |
280 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
281 | FALSE), /* pcrel_offset */ |
282 | ||
283 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
284 | 0, /* rightshift */ | |
285 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
286 | 0, /* bitsize */ | |
287 | FALSE, /* pc_relative */ | |
288 | 0, /* bitpos */ | |
289 | complain_overflow_signed,/* complain_on_overflow */ | |
290 | bfd_elf_generic_reloc, /* special_function */ | |
291 | "R_ARM_SWI8", /* name */ | |
292 | FALSE, /* partial_inplace */ | |
293 | 0x00000000, /* src_mask */ | |
294 | 0x00000000, /* dst_mask */ | |
295 | FALSE), /* pcrel_offset */ | |
296 | ||
297 | /* BLX instruction for the ARM. */ | |
298 | HOWTO (R_ARM_XPC25, /* type */ | |
299 | 2, /* rightshift */ | |
300 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 301 | 24, /* bitsize */ |
7f266840 DJ |
302 | TRUE, /* pc_relative */ |
303 | 0, /* bitpos */ | |
304 | complain_overflow_signed,/* complain_on_overflow */ | |
305 | bfd_elf_generic_reloc, /* special_function */ | |
306 | "R_ARM_XPC25", /* name */ | |
307 | FALSE, /* partial_inplace */ | |
308 | 0x00ffffff, /* src_mask */ | |
309 | 0x00ffffff, /* dst_mask */ | |
310 | TRUE), /* pcrel_offset */ | |
311 | ||
312 | /* BLX instruction for the Thumb. */ | |
313 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
314 | 2, /* rightshift */ | |
315 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 316 | 24, /* bitsize */ |
7f266840 DJ |
317 | TRUE, /* pc_relative */ |
318 | 0, /* bitpos */ | |
319 | complain_overflow_signed,/* complain_on_overflow */ | |
320 | bfd_elf_generic_reloc, /* special_function */ | |
321 | "R_ARM_THM_XPC22", /* name */ | |
322 | FALSE, /* partial_inplace */ | |
7f6ab9f8 AM |
323 | 0x07ff2fff, /* src_mask */ |
324 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
325 | TRUE), /* pcrel_offset */ |
326 | ||
ba93b8ac | 327 | /* Dynamic TLS relocations. */ |
7f266840 | 328 | |
ba93b8ac DJ |
329 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
330 | 0, /* rightshift */ | |
331 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
332 | 32, /* bitsize */ | |
333 | FALSE, /* pc_relative */ | |
334 | 0, /* bitpos */ | |
335 | complain_overflow_bitfield,/* complain_on_overflow */ | |
336 | bfd_elf_generic_reloc, /* special_function */ | |
337 | "R_ARM_TLS_DTPMOD32", /* name */ | |
338 | TRUE, /* partial_inplace */ | |
339 | 0xffffffff, /* src_mask */ | |
340 | 0xffffffff, /* dst_mask */ | |
341 | FALSE), /* pcrel_offset */ | |
7f266840 | 342 | |
ba93b8ac DJ |
343 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
344 | 0, /* rightshift */ | |
345 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
346 | 32, /* bitsize */ | |
347 | FALSE, /* pc_relative */ | |
348 | 0, /* bitpos */ | |
349 | complain_overflow_bitfield,/* complain_on_overflow */ | |
350 | bfd_elf_generic_reloc, /* special_function */ | |
351 | "R_ARM_TLS_DTPOFF32", /* name */ | |
352 | TRUE, /* partial_inplace */ | |
353 | 0xffffffff, /* src_mask */ | |
354 | 0xffffffff, /* dst_mask */ | |
355 | FALSE), /* pcrel_offset */ | |
7f266840 | 356 | |
ba93b8ac DJ |
357 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
358 | 0, /* rightshift */ | |
359 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
360 | 32, /* bitsize */ | |
361 | FALSE, /* pc_relative */ | |
362 | 0, /* bitpos */ | |
363 | complain_overflow_bitfield,/* complain_on_overflow */ | |
364 | bfd_elf_generic_reloc, /* special_function */ | |
365 | "R_ARM_TLS_TPOFF32", /* name */ | |
366 | TRUE, /* partial_inplace */ | |
367 | 0xffffffff, /* src_mask */ | |
368 | 0xffffffff, /* dst_mask */ | |
369 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
370 | |
371 | /* Relocs used in ARM Linux */ | |
372 | ||
373 | HOWTO (R_ARM_COPY, /* type */ | |
374 | 0, /* rightshift */ | |
375 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
376 | 32, /* bitsize */ | |
377 | FALSE, /* pc_relative */ | |
378 | 0, /* bitpos */ | |
379 | complain_overflow_bitfield,/* complain_on_overflow */ | |
380 | bfd_elf_generic_reloc, /* special_function */ | |
381 | "R_ARM_COPY", /* name */ | |
382 | TRUE, /* partial_inplace */ | |
383 | 0xffffffff, /* src_mask */ | |
384 | 0xffffffff, /* dst_mask */ | |
385 | FALSE), /* pcrel_offset */ | |
386 | ||
387 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
388 | 0, /* rightshift */ | |
389 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
390 | 32, /* bitsize */ | |
391 | FALSE, /* pc_relative */ | |
392 | 0, /* bitpos */ | |
393 | complain_overflow_bitfield,/* complain_on_overflow */ | |
394 | bfd_elf_generic_reloc, /* special_function */ | |
395 | "R_ARM_GLOB_DAT", /* name */ | |
396 | TRUE, /* partial_inplace */ | |
397 | 0xffffffff, /* src_mask */ | |
398 | 0xffffffff, /* dst_mask */ | |
399 | FALSE), /* pcrel_offset */ | |
400 | ||
401 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
402 | 0, /* rightshift */ | |
403 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
404 | 32, /* bitsize */ | |
405 | FALSE, /* pc_relative */ | |
406 | 0, /* bitpos */ | |
407 | complain_overflow_bitfield,/* complain_on_overflow */ | |
408 | bfd_elf_generic_reloc, /* special_function */ | |
409 | "R_ARM_JUMP_SLOT", /* name */ | |
410 | TRUE, /* partial_inplace */ | |
411 | 0xffffffff, /* src_mask */ | |
412 | 0xffffffff, /* dst_mask */ | |
413 | FALSE), /* pcrel_offset */ | |
414 | ||
415 | HOWTO (R_ARM_RELATIVE, /* type */ | |
416 | 0, /* rightshift */ | |
417 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
418 | 32, /* bitsize */ | |
419 | FALSE, /* pc_relative */ | |
420 | 0, /* bitpos */ | |
421 | complain_overflow_bitfield,/* complain_on_overflow */ | |
422 | bfd_elf_generic_reloc, /* special_function */ | |
423 | "R_ARM_RELATIVE", /* name */ | |
424 | TRUE, /* partial_inplace */ | |
425 | 0xffffffff, /* src_mask */ | |
426 | 0xffffffff, /* dst_mask */ | |
427 | FALSE), /* pcrel_offset */ | |
428 | ||
c19d1205 | 429 | HOWTO (R_ARM_GOTOFF32, /* type */ |
7f266840 DJ |
430 | 0, /* rightshift */ |
431 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
432 | 32, /* bitsize */ | |
433 | FALSE, /* pc_relative */ | |
434 | 0, /* bitpos */ | |
435 | complain_overflow_bitfield,/* complain_on_overflow */ | |
436 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 437 | "R_ARM_GOTOFF32", /* name */ |
7f266840 DJ |
438 | TRUE, /* partial_inplace */ |
439 | 0xffffffff, /* src_mask */ | |
440 | 0xffffffff, /* dst_mask */ | |
441 | FALSE), /* pcrel_offset */ | |
442 | ||
443 | HOWTO (R_ARM_GOTPC, /* type */ | |
444 | 0, /* rightshift */ | |
445 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
446 | 32, /* bitsize */ | |
447 | TRUE, /* pc_relative */ | |
448 | 0, /* bitpos */ | |
449 | complain_overflow_bitfield,/* complain_on_overflow */ | |
450 | bfd_elf_generic_reloc, /* special_function */ | |
451 | "R_ARM_GOTPC", /* name */ | |
452 | TRUE, /* partial_inplace */ | |
453 | 0xffffffff, /* src_mask */ | |
454 | 0xffffffff, /* dst_mask */ | |
455 | TRUE), /* pcrel_offset */ | |
456 | ||
457 | HOWTO (R_ARM_GOT32, /* type */ | |
458 | 0, /* rightshift */ | |
459 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
460 | 32, /* bitsize */ | |
461 | FALSE, /* pc_relative */ | |
462 | 0, /* bitpos */ | |
463 | complain_overflow_bitfield,/* complain_on_overflow */ | |
464 | bfd_elf_generic_reloc, /* special_function */ | |
465 | "R_ARM_GOT32", /* name */ | |
466 | TRUE, /* partial_inplace */ | |
467 | 0xffffffff, /* src_mask */ | |
468 | 0xffffffff, /* dst_mask */ | |
469 | FALSE), /* pcrel_offset */ | |
470 | ||
471 | HOWTO (R_ARM_PLT32, /* type */ | |
472 | 2, /* rightshift */ | |
473 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
ce490eda | 474 | 24, /* bitsize */ |
7f266840 DJ |
475 | TRUE, /* pc_relative */ |
476 | 0, /* bitpos */ | |
477 | complain_overflow_bitfield,/* complain_on_overflow */ | |
478 | bfd_elf_generic_reloc, /* special_function */ | |
479 | "R_ARM_PLT32", /* name */ | |
ce490eda | 480 | FALSE, /* partial_inplace */ |
7f266840 DJ |
481 | 0x00ffffff, /* src_mask */ |
482 | 0x00ffffff, /* dst_mask */ | |
483 | TRUE), /* pcrel_offset */ | |
484 | ||
485 | HOWTO (R_ARM_CALL, /* type */ | |
486 | 2, /* rightshift */ | |
487 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
488 | 24, /* bitsize */ | |
489 | TRUE, /* pc_relative */ | |
490 | 0, /* bitpos */ | |
491 | complain_overflow_signed,/* complain_on_overflow */ | |
492 | bfd_elf_generic_reloc, /* special_function */ | |
493 | "R_ARM_CALL", /* name */ | |
494 | FALSE, /* partial_inplace */ | |
495 | 0x00ffffff, /* src_mask */ | |
496 | 0x00ffffff, /* dst_mask */ | |
497 | TRUE), /* pcrel_offset */ | |
498 | ||
499 | HOWTO (R_ARM_JUMP24, /* type */ | |
500 | 2, /* rightshift */ | |
501 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
502 | 24, /* bitsize */ | |
503 | TRUE, /* pc_relative */ | |
504 | 0, /* bitpos */ | |
505 | complain_overflow_signed,/* complain_on_overflow */ | |
506 | bfd_elf_generic_reloc, /* special_function */ | |
507 | "R_ARM_JUMP24", /* name */ | |
508 | FALSE, /* partial_inplace */ | |
509 | 0x00ffffff, /* src_mask */ | |
510 | 0x00ffffff, /* dst_mask */ | |
511 | TRUE), /* pcrel_offset */ | |
512 | ||
c19d1205 ZW |
513 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
514 | 1, /* rightshift */ | |
515 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
516 | 24, /* bitsize */ | |
517 | TRUE, /* pc_relative */ | |
7f266840 | 518 | 0, /* bitpos */ |
c19d1205 | 519 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 520 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 521 | "R_ARM_THM_JUMP24", /* name */ |
7f266840 | 522 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
523 | 0x07ff2fff, /* src_mask */ |
524 | 0x07ff2fff, /* dst_mask */ | |
525 | TRUE), /* pcrel_offset */ | |
7f266840 | 526 | |
c19d1205 | 527 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 528 | 0, /* rightshift */ |
c19d1205 ZW |
529 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
530 | 32, /* bitsize */ | |
7f266840 DJ |
531 | FALSE, /* pc_relative */ |
532 | 0, /* bitpos */ | |
533 | complain_overflow_dont,/* complain_on_overflow */ | |
534 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 535 | "R_ARM_BASE_ABS", /* name */ |
7f266840 | 536 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
537 | 0xffffffff, /* src_mask */ |
538 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
539 | FALSE), /* pcrel_offset */ |
540 | ||
541 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
542 | 0, /* rightshift */ | |
543 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
544 | 12, /* bitsize */ | |
545 | TRUE, /* pc_relative */ | |
546 | 0, /* bitpos */ | |
547 | complain_overflow_dont,/* complain_on_overflow */ | |
548 | bfd_elf_generic_reloc, /* special_function */ | |
549 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
550 | FALSE, /* partial_inplace */ | |
551 | 0x00000fff, /* src_mask */ | |
552 | 0x00000fff, /* dst_mask */ | |
553 | TRUE), /* pcrel_offset */ | |
554 | ||
555 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
556 | 0, /* rightshift */ | |
557 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
558 | 12, /* bitsize */ | |
559 | TRUE, /* pc_relative */ | |
560 | 8, /* bitpos */ | |
561 | complain_overflow_dont,/* complain_on_overflow */ | |
562 | bfd_elf_generic_reloc, /* special_function */ | |
563 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
564 | FALSE, /* partial_inplace */ | |
565 | 0x00000fff, /* src_mask */ | |
566 | 0x00000fff, /* dst_mask */ | |
567 | TRUE), /* pcrel_offset */ | |
568 | ||
569 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
570 | 0, /* rightshift */ | |
571 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
572 | 12, /* bitsize */ | |
573 | TRUE, /* pc_relative */ | |
574 | 16, /* bitpos */ | |
575 | complain_overflow_dont,/* complain_on_overflow */ | |
576 | bfd_elf_generic_reloc, /* special_function */ | |
577 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
578 | FALSE, /* partial_inplace */ | |
579 | 0x00000fff, /* src_mask */ | |
580 | 0x00000fff, /* dst_mask */ | |
581 | TRUE), /* pcrel_offset */ | |
582 | ||
583 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
584 | 0, /* rightshift */ | |
585 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
586 | 12, /* bitsize */ | |
587 | FALSE, /* pc_relative */ | |
588 | 0, /* bitpos */ | |
589 | complain_overflow_dont,/* complain_on_overflow */ | |
590 | bfd_elf_generic_reloc, /* special_function */ | |
591 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
592 | FALSE, /* partial_inplace */ | |
593 | 0x00000fff, /* src_mask */ | |
594 | 0x00000fff, /* dst_mask */ | |
595 | FALSE), /* pcrel_offset */ | |
596 | ||
597 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
598 | 0, /* rightshift */ | |
599 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
600 | 8, /* bitsize */ | |
601 | FALSE, /* pc_relative */ | |
602 | 12, /* bitpos */ | |
603 | complain_overflow_dont,/* complain_on_overflow */ | |
604 | bfd_elf_generic_reloc, /* special_function */ | |
605 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
606 | FALSE, /* partial_inplace */ | |
607 | 0x000ff000, /* src_mask */ | |
608 | 0x000ff000, /* dst_mask */ | |
609 | FALSE), /* pcrel_offset */ | |
610 | ||
611 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
612 | 0, /* rightshift */ | |
613 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
614 | 8, /* bitsize */ | |
615 | FALSE, /* pc_relative */ | |
616 | 20, /* bitpos */ | |
617 | complain_overflow_dont,/* complain_on_overflow */ | |
618 | bfd_elf_generic_reloc, /* special_function */ | |
619 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
620 | FALSE, /* partial_inplace */ | |
621 | 0x0ff00000, /* src_mask */ | |
622 | 0x0ff00000, /* dst_mask */ | |
623 | FALSE), /* pcrel_offset */ | |
624 | ||
625 | HOWTO (R_ARM_TARGET1, /* type */ | |
626 | 0, /* rightshift */ | |
627 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
628 | 32, /* bitsize */ | |
629 | FALSE, /* pc_relative */ | |
630 | 0, /* bitpos */ | |
631 | complain_overflow_dont,/* complain_on_overflow */ | |
632 | bfd_elf_generic_reloc, /* special_function */ | |
633 | "R_ARM_TARGET1", /* name */ | |
634 | FALSE, /* partial_inplace */ | |
635 | 0xffffffff, /* src_mask */ | |
636 | 0xffffffff, /* dst_mask */ | |
637 | FALSE), /* pcrel_offset */ | |
638 | ||
639 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
640 | 0, /* rightshift */ | |
641 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
642 | 32, /* bitsize */ | |
643 | FALSE, /* pc_relative */ | |
644 | 0, /* bitpos */ | |
645 | complain_overflow_dont,/* complain_on_overflow */ | |
646 | bfd_elf_generic_reloc, /* special_function */ | |
647 | "R_ARM_ROSEGREL32", /* name */ | |
648 | FALSE, /* partial_inplace */ | |
649 | 0xffffffff, /* src_mask */ | |
650 | 0xffffffff, /* dst_mask */ | |
651 | FALSE), /* pcrel_offset */ | |
652 | ||
653 | HOWTO (R_ARM_V4BX, /* type */ | |
654 | 0, /* rightshift */ | |
655 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
656 | 32, /* bitsize */ | |
657 | FALSE, /* pc_relative */ | |
658 | 0, /* bitpos */ | |
659 | complain_overflow_dont,/* complain_on_overflow */ | |
660 | bfd_elf_generic_reloc, /* special_function */ | |
661 | "R_ARM_V4BX", /* name */ | |
662 | FALSE, /* partial_inplace */ | |
663 | 0xffffffff, /* src_mask */ | |
664 | 0xffffffff, /* dst_mask */ | |
665 | FALSE), /* pcrel_offset */ | |
666 | ||
667 | HOWTO (R_ARM_TARGET2, /* type */ | |
668 | 0, /* rightshift */ | |
669 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
670 | 32, /* bitsize */ | |
671 | FALSE, /* pc_relative */ | |
672 | 0, /* bitpos */ | |
673 | complain_overflow_signed,/* complain_on_overflow */ | |
674 | bfd_elf_generic_reloc, /* special_function */ | |
675 | "R_ARM_TARGET2", /* name */ | |
676 | FALSE, /* partial_inplace */ | |
677 | 0xffffffff, /* src_mask */ | |
678 | 0xffffffff, /* dst_mask */ | |
679 | TRUE), /* pcrel_offset */ | |
680 | ||
681 | HOWTO (R_ARM_PREL31, /* type */ | |
682 | 0, /* rightshift */ | |
683 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
684 | 31, /* bitsize */ | |
685 | TRUE, /* pc_relative */ | |
686 | 0, /* bitpos */ | |
687 | complain_overflow_signed,/* complain_on_overflow */ | |
688 | bfd_elf_generic_reloc, /* special_function */ | |
689 | "R_ARM_PREL31", /* name */ | |
690 | FALSE, /* partial_inplace */ | |
691 | 0x7fffffff, /* src_mask */ | |
692 | 0x7fffffff, /* dst_mask */ | |
693 | TRUE), /* pcrel_offset */ | |
c19d1205 ZW |
694 | |
695 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
696 | 0, /* rightshift */ | |
697 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
698 | 16, /* bitsize */ | |
699 | FALSE, /* pc_relative */ | |
700 | 0, /* bitpos */ | |
701 | complain_overflow_dont,/* complain_on_overflow */ | |
702 | bfd_elf_generic_reloc, /* special_function */ | |
703 | "R_ARM_MOVW_ABS_NC", /* name */ | |
704 | FALSE, /* partial_inplace */ | |
39623e12 PB |
705 | 0x000f0fff, /* src_mask */ |
706 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
707 | FALSE), /* pcrel_offset */ |
708 | ||
709 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
710 | 0, /* rightshift */ | |
711 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
712 | 16, /* bitsize */ | |
713 | FALSE, /* pc_relative */ | |
714 | 0, /* bitpos */ | |
715 | complain_overflow_bitfield,/* complain_on_overflow */ | |
716 | bfd_elf_generic_reloc, /* special_function */ | |
717 | "R_ARM_MOVT_ABS", /* name */ | |
718 | FALSE, /* partial_inplace */ | |
39623e12 PB |
719 | 0x000f0fff, /* src_mask */ |
720 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
721 | FALSE), /* pcrel_offset */ |
722 | ||
723 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
724 | 0, /* rightshift */ | |
725 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
726 | 16, /* bitsize */ | |
727 | TRUE, /* pc_relative */ | |
728 | 0, /* bitpos */ | |
729 | complain_overflow_dont,/* complain_on_overflow */ | |
730 | bfd_elf_generic_reloc, /* special_function */ | |
731 | "R_ARM_MOVW_PREL_NC", /* name */ | |
732 | FALSE, /* partial_inplace */ | |
39623e12 PB |
733 | 0x000f0fff, /* src_mask */ |
734 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
735 | TRUE), /* pcrel_offset */ |
736 | ||
737 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
738 | 0, /* rightshift */ | |
739 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
740 | 16, /* bitsize */ | |
741 | TRUE, /* pc_relative */ | |
742 | 0, /* bitpos */ | |
743 | complain_overflow_bitfield,/* complain_on_overflow */ | |
744 | bfd_elf_generic_reloc, /* special_function */ | |
745 | "R_ARM_MOVT_PREL", /* name */ | |
746 | FALSE, /* partial_inplace */ | |
39623e12 PB |
747 | 0x000f0fff, /* src_mask */ |
748 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
749 | TRUE), /* pcrel_offset */ |
750 | ||
751 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
752 | 0, /* rightshift */ | |
753 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
754 | 16, /* bitsize */ | |
755 | FALSE, /* pc_relative */ | |
756 | 0, /* bitpos */ | |
757 | complain_overflow_dont,/* complain_on_overflow */ | |
758 | bfd_elf_generic_reloc, /* special_function */ | |
759 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
760 | FALSE, /* partial_inplace */ | |
761 | 0x040f70ff, /* src_mask */ | |
762 | 0x040f70ff, /* dst_mask */ | |
763 | FALSE), /* pcrel_offset */ | |
764 | ||
765 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
766 | 0, /* rightshift */ | |
767 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
768 | 16, /* bitsize */ | |
769 | FALSE, /* pc_relative */ | |
770 | 0, /* bitpos */ | |
771 | complain_overflow_bitfield,/* complain_on_overflow */ | |
772 | bfd_elf_generic_reloc, /* special_function */ | |
773 | "R_ARM_THM_MOVT_ABS", /* name */ | |
774 | FALSE, /* partial_inplace */ | |
775 | 0x040f70ff, /* src_mask */ | |
776 | 0x040f70ff, /* dst_mask */ | |
777 | FALSE), /* pcrel_offset */ | |
778 | ||
779 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
780 | 0, /* rightshift */ | |
781 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
782 | 16, /* bitsize */ | |
783 | TRUE, /* pc_relative */ | |
784 | 0, /* bitpos */ | |
785 | complain_overflow_dont,/* complain_on_overflow */ | |
786 | bfd_elf_generic_reloc, /* special_function */ | |
787 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
788 | FALSE, /* partial_inplace */ | |
789 | 0x040f70ff, /* src_mask */ | |
790 | 0x040f70ff, /* dst_mask */ | |
791 | TRUE), /* pcrel_offset */ | |
792 | ||
793 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
794 | 0, /* rightshift */ | |
795 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
796 | 16, /* bitsize */ | |
797 | TRUE, /* pc_relative */ | |
798 | 0, /* bitpos */ | |
799 | complain_overflow_bitfield,/* complain_on_overflow */ | |
800 | bfd_elf_generic_reloc, /* special_function */ | |
801 | "R_ARM_THM_MOVT_PREL", /* name */ | |
802 | FALSE, /* partial_inplace */ | |
803 | 0x040f70ff, /* src_mask */ | |
804 | 0x040f70ff, /* dst_mask */ | |
805 | TRUE), /* pcrel_offset */ | |
806 | ||
807 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
808 | 1, /* rightshift */ | |
809 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
810 | 19, /* bitsize */ | |
811 | TRUE, /* pc_relative */ | |
812 | 0, /* bitpos */ | |
813 | complain_overflow_signed,/* complain_on_overflow */ | |
814 | bfd_elf_generic_reloc, /* special_function */ | |
815 | "R_ARM_THM_JUMP19", /* name */ | |
816 | FALSE, /* partial_inplace */ | |
817 | 0x043f2fff, /* src_mask */ | |
818 | 0x043f2fff, /* dst_mask */ | |
819 | TRUE), /* pcrel_offset */ | |
820 | ||
821 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
822 | 1, /* rightshift */ | |
823 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
824 | 6, /* bitsize */ | |
825 | TRUE, /* pc_relative */ | |
826 | 0, /* bitpos */ | |
827 | complain_overflow_unsigned,/* complain_on_overflow */ | |
828 | bfd_elf_generic_reloc, /* special_function */ | |
829 | "R_ARM_THM_JUMP6", /* name */ | |
830 | FALSE, /* partial_inplace */ | |
831 | 0x02f8, /* src_mask */ | |
832 | 0x02f8, /* dst_mask */ | |
833 | TRUE), /* pcrel_offset */ | |
834 | ||
835 | /* These are declared as 13-bit signed relocations because we can | |
836 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
837 | versa. */ | |
838 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
839 | 0, /* rightshift */ | |
840 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
841 | 13, /* bitsize */ | |
842 | TRUE, /* pc_relative */ | |
843 | 0, /* bitpos */ | |
2cab6cc3 | 844 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
845 | bfd_elf_generic_reloc, /* special_function */ |
846 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
847 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
848 | 0xffffffff, /* src_mask */ |
849 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
850 | TRUE), /* pcrel_offset */ |
851 | ||
852 | HOWTO (R_ARM_THM_PC12, /* type */ | |
853 | 0, /* rightshift */ | |
854 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
855 | 13, /* bitsize */ | |
856 | TRUE, /* pc_relative */ | |
857 | 0, /* bitpos */ | |
2cab6cc3 | 858 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
859 | bfd_elf_generic_reloc, /* special_function */ |
860 | "R_ARM_THM_PC12", /* name */ | |
861 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
862 | 0xffffffff, /* src_mask */ |
863 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
864 | TRUE), /* pcrel_offset */ |
865 | ||
866 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
867 | 0, /* rightshift */ | |
868 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
869 | 32, /* bitsize */ | |
870 | FALSE, /* pc_relative */ | |
871 | 0, /* bitpos */ | |
872 | complain_overflow_dont,/* complain_on_overflow */ | |
873 | bfd_elf_generic_reloc, /* special_function */ | |
874 | "R_ARM_ABS32_NOI", /* name */ | |
875 | FALSE, /* partial_inplace */ | |
876 | 0xffffffff, /* src_mask */ | |
877 | 0xffffffff, /* dst_mask */ | |
878 | FALSE), /* pcrel_offset */ | |
879 | ||
880 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
881 | 0, /* rightshift */ | |
882 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
883 | 32, /* bitsize */ | |
884 | TRUE, /* pc_relative */ | |
885 | 0, /* bitpos */ | |
886 | complain_overflow_dont,/* complain_on_overflow */ | |
887 | bfd_elf_generic_reloc, /* special_function */ | |
888 | "R_ARM_REL32_NOI", /* name */ | |
889 | FALSE, /* partial_inplace */ | |
890 | 0xffffffff, /* src_mask */ | |
891 | 0xffffffff, /* dst_mask */ | |
892 | FALSE), /* pcrel_offset */ | |
7f266840 | 893 | |
4962c51a MS |
894 | /* Group relocations. */ |
895 | ||
896 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
897 | 0, /* rightshift */ | |
898 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
899 | 32, /* bitsize */ | |
900 | TRUE, /* pc_relative */ | |
901 | 0, /* bitpos */ | |
902 | complain_overflow_dont,/* complain_on_overflow */ | |
903 | bfd_elf_generic_reloc, /* special_function */ | |
904 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
905 | FALSE, /* partial_inplace */ | |
906 | 0xffffffff, /* src_mask */ | |
907 | 0xffffffff, /* dst_mask */ | |
908 | TRUE), /* pcrel_offset */ | |
909 | ||
910 | HOWTO (R_ARM_ALU_PC_G0, /* type */ | |
911 | 0, /* rightshift */ | |
912 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
913 | 32, /* bitsize */ | |
914 | TRUE, /* pc_relative */ | |
915 | 0, /* bitpos */ | |
916 | complain_overflow_dont,/* complain_on_overflow */ | |
917 | bfd_elf_generic_reloc, /* special_function */ | |
918 | "R_ARM_ALU_PC_G0", /* name */ | |
919 | FALSE, /* partial_inplace */ | |
920 | 0xffffffff, /* src_mask */ | |
921 | 0xffffffff, /* dst_mask */ | |
922 | TRUE), /* pcrel_offset */ | |
923 | ||
924 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
925 | 0, /* rightshift */ | |
926 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
927 | 32, /* bitsize */ | |
928 | TRUE, /* pc_relative */ | |
929 | 0, /* bitpos */ | |
930 | complain_overflow_dont,/* complain_on_overflow */ | |
931 | bfd_elf_generic_reloc, /* special_function */ | |
932 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
933 | FALSE, /* partial_inplace */ | |
934 | 0xffffffff, /* src_mask */ | |
935 | 0xffffffff, /* dst_mask */ | |
936 | TRUE), /* pcrel_offset */ | |
937 | ||
938 | HOWTO (R_ARM_ALU_PC_G1, /* type */ | |
939 | 0, /* rightshift */ | |
940 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
941 | 32, /* bitsize */ | |
942 | TRUE, /* pc_relative */ | |
943 | 0, /* bitpos */ | |
944 | complain_overflow_dont,/* complain_on_overflow */ | |
945 | bfd_elf_generic_reloc, /* special_function */ | |
946 | "R_ARM_ALU_PC_G1", /* name */ | |
947 | FALSE, /* partial_inplace */ | |
948 | 0xffffffff, /* src_mask */ | |
949 | 0xffffffff, /* dst_mask */ | |
950 | TRUE), /* pcrel_offset */ | |
951 | ||
952 | HOWTO (R_ARM_ALU_PC_G2, /* type */ | |
953 | 0, /* rightshift */ | |
954 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
955 | 32, /* bitsize */ | |
956 | TRUE, /* pc_relative */ | |
957 | 0, /* bitpos */ | |
958 | complain_overflow_dont,/* complain_on_overflow */ | |
959 | bfd_elf_generic_reloc, /* special_function */ | |
960 | "R_ARM_ALU_PC_G2", /* name */ | |
961 | FALSE, /* partial_inplace */ | |
962 | 0xffffffff, /* src_mask */ | |
963 | 0xffffffff, /* dst_mask */ | |
964 | TRUE), /* pcrel_offset */ | |
965 | ||
966 | HOWTO (R_ARM_LDR_PC_G1, /* type */ | |
967 | 0, /* rightshift */ | |
968 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
969 | 32, /* bitsize */ | |
970 | TRUE, /* pc_relative */ | |
971 | 0, /* bitpos */ | |
972 | complain_overflow_dont,/* complain_on_overflow */ | |
973 | bfd_elf_generic_reloc, /* special_function */ | |
974 | "R_ARM_LDR_PC_G1", /* name */ | |
975 | FALSE, /* partial_inplace */ | |
976 | 0xffffffff, /* src_mask */ | |
977 | 0xffffffff, /* dst_mask */ | |
978 | TRUE), /* pcrel_offset */ | |
979 | ||
980 | HOWTO (R_ARM_LDR_PC_G2, /* type */ | |
981 | 0, /* rightshift */ | |
982 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
983 | 32, /* bitsize */ | |
984 | TRUE, /* pc_relative */ | |
985 | 0, /* bitpos */ | |
986 | complain_overflow_dont,/* complain_on_overflow */ | |
987 | bfd_elf_generic_reloc, /* special_function */ | |
988 | "R_ARM_LDR_PC_G2", /* name */ | |
989 | FALSE, /* partial_inplace */ | |
990 | 0xffffffff, /* src_mask */ | |
991 | 0xffffffff, /* dst_mask */ | |
992 | TRUE), /* pcrel_offset */ | |
993 | ||
994 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ | |
995 | 0, /* rightshift */ | |
996 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
997 | 32, /* bitsize */ | |
998 | TRUE, /* pc_relative */ | |
999 | 0, /* bitpos */ | |
1000 | complain_overflow_dont,/* complain_on_overflow */ | |
1001 | bfd_elf_generic_reloc, /* special_function */ | |
1002 | "R_ARM_LDRS_PC_G0", /* name */ | |
1003 | FALSE, /* partial_inplace */ | |
1004 | 0xffffffff, /* src_mask */ | |
1005 | 0xffffffff, /* dst_mask */ | |
1006 | TRUE), /* pcrel_offset */ | |
1007 | ||
1008 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ | |
1009 | 0, /* rightshift */ | |
1010 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1011 | 32, /* bitsize */ | |
1012 | TRUE, /* pc_relative */ | |
1013 | 0, /* bitpos */ | |
1014 | complain_overflow_dont,/* complain_on_overflow */ | |
1015 | bfd_elf_generic_reloc, /* special_function */ | |
1016 | "R_ARM_LDRS_PC_G1", /* name */ | |
1017 | FALSE, /* partial_inplace */ | |
1018 | 0xffffffff, /* src_mask */ | |
1019 | 0xffffffff, /* dst_mask */ | |
1020 | TRUE), /* pcrel_offset */ | |
1021 | ||
1022 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ | |
1023 | 0, /* rightshift */ | |
1024 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1025 | 32, /* bitsize */ | |
1026 | TRUE, /* pc_relative */ | |
1027 | 0, /* bitpos */ | |
1028 | complain_overflow_dont,/* complain_on_overflow */ | |
1029 | bfd_elf_generic_reloc, /* special_function */ | |
1030 | "R_ARM_LDRS_PC_G2", /* name */ | |
1031 | FALSE, /* partial_inplace */ | |
1032 | 0xffffffff, /* src_mask */ | |
1033 | 0xffffffff, /* dst_mask */ | |
1034 | TRUE), /* pcrel_offset */ | |
1035 | ||
1036 | HOWTO (R_ARM_LDC_PC_G0, /* type */ | |
1037 | 0, /* rightshift */ | |
1038 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1039 | 32, /* bitsize */ | |
1040 | TRUE, /* pc_relative */ | |
1041 | 0, /* bitpos */ | |
1042 | complain_overflow_dont,/* complain_on_overflow */ | |
1043 | bfd_elf_generic_reloc, /* special_function */ | |
1044 | "R_ARM_LDC_PC_G0", /* name */ | |
1045 | FALSE, /* partial_inplace */ | |
1046 | 0xffffffff, /* src_mask */ | |
1047 | 0xffffffff, /* dst_mask */ | |
1048 | TRUE), /* pcrel_offset */ | |
1049 | ||
1050 | HOWTO (R_ARM_LDC_PC_G1, /* type */ | |
1051 | 0, /* rightshift */ | |
1052 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1053 | 32, /* bitsize */ | |
1054 | TRUE, /* pc_relative */ | |
1055 | 0, /* bitpos */ | |
1056 | complain_overflow_dont,/* complain_on_overflow */ | |
1057 | bfd_elf_generic_reloc, /* special_function */ | |
1058 | "R_ARM_LDC_PC_G1", /* name */ | |
1059 | FALSE, /* partial_inplace */ | |
1060 | 0xffffffff, /* src_mask */ | |
1061 | 0xffffffff, /* dst_mask */ | |
1062 | TRUE), /* pcrel_offset */ | |
1063 | ||
1064 | HOWTO (R_ARM_LDC_PC_G2, /* type */ | |
1065 | 0, /* rightshift */ | |
1066 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1067 | 32, /* bitsize */ | |
1068 | TRUE, /* pc_relative */ | |
1069 | 0, /* bitpos */ | |
1070 | complain_overflow_dont,/* complain_on_overflow */ | |
1071 | bfd_elf_generic_reloc, /* special_function */ | |
1072 | "R_ARM_LDC_PC_G2", /* name */ | |
1073 | FALSE, /* partial_inplace */ | |
1074 | 0xffffffff, /* src_mask */ | |
1075 | 0xffffffff, /* dst_mask */ | |
1076 | TRUE), /* pcrel_offset */ | |
1077 | ||
1078 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ | |
1079 | 0, /* rightshift */ | |
1080 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1081 | 32, /* bitsize */ | |
1082 | TRUE, /* pc_relative */ | |
1083 | 0, /* bitpos */ | |
1084 | complain_overflow_dont,/* complain_on_overflow */ | |
1085 | bfd_elf_generic_reloc, /* special_function */ | |
1086 | "R_ARM_ALU_SB_G0_NC", /* name */ | |
1087 | FALSE, /* partial_inplace */ | |
1088 | 0xffffffff, /* src_mask */ | |
1089 | 0xffffffff, /* dst_mask */ | |
1090 | TRUE), /* pcrel_offset */ | |
1091 | ||
1092 | HOWTO (R_ARM_ALU_SB_G0, /* type */ | |
1093 | 0, /* rightshift */ | |
1094 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1095 | 32, /* bitsize */ | |
1096 | TRUE, /* pc_relative */ | |
1097 | 0, /* bitpos */ | |
1098 | complain_overflow_dont,/* complain_on_overflow */ | |
1099 | bfd_elf_generic_reloc, /* special_function */ | |
1100 | "R_ARM_ALU_SB_G0", /* name */ | |
1101 | FALSE, /* partial_inplace */ | |
1102 | 0xffffffff, /* src_mask */ | |
1103 | 0xffffffff, /* dst_mask */ | |
1104 | TRUE), /* pcrel_offset */ | |
1105 | ||
1106 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ | |
1107 | 0, /* rightshift */ | |
1108 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1109 | 32, /* bitsize */ | |
1110 | TRUE, /* pc_relative */ | |
1111 | 0, /* bitpos */ | |
1112 | complain_overflow_dont,/* complain_on_overflow */ | |
1113 | bfd_elf_generic_reloc, /* special_function */ | |
1114 | "R_ARM_ALU_SB_G1_NC", /* name */ | |
1115 | FALSE, /* partial_inplace */ | |
1116 | 0xffffffff, /* src_mask */ | |
1117 | 0xffffffff, /* dst_mask */ | |
1118 | TRUE), /* pcrel_offset */ | |
1119 | ||
1120 | HOWTO (R_ARM_ALU_SB_G1, /* type */ | |
1121 | 0, /* rightshift */ | |
1122 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1123 | 32, /* bitsize */ | |
1124 | TRUE, /* pc_relative */ | |
1125 | 0, /* bitpos */ | |
1126 | complain_overflow_dont,/* complain_on_overflow */ | |
1127 | bfd_elf_generic_reloc, /* special_function */ | |
1128 | "R_ARM_ALU_SB_G1", /* name */ | |
1129 | FALSE, /* partial_inplace */ | |
1130 | 0xffffffff, /* src_mask */ | |
1131 | 0xffffffff, /* dst_mask */ | |
1132 | TRUE), /* pcrel_offset */ | |
1133 | ||
1134 | HOWTO (R_ARM_ALU_SB_G2, /* type */ | |
1135 | 0, /* rightshift */ | |
1136 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1137 | 32, /* bitsize */ | |
1138 | TRUE, /* pc_relative */ | |
1139 | 0, /* bitpos */ | |
1140 | complain_overflow_dont,/* complain_on_overflow */ | |
1141 | bfd_elf_generic_reloc, /* special_function */ | |
1142 | "R_ARM_ALU_SB_G2", /* name */ | |
1143 | FALSE, /* partial_inplace */ | |
1144 | 0xffffffff, /* src_mask */ | |
1145 | 0xffffffff, /* dst_mask */ | |
1146 | TRUE), /* pcrel_offset */ | |
1147 | ||
1148 | HOWTO (R_ARM_LDR_SB_G0, /* type */ | |
1149 | 0, /* rightshift */ | |
1150 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1151 | 32, /* bitsize */ | |
1152 | TRUE, /* pc_relative */ | |
1153 | 0, /* bitpos */ | |
1154 | complain_overflow_dont,/* complain_on_overflow */ | |
1155 | bfd_elf_generic_reloc, /* special_function */ | |
1156 | "R_ARM_LDR_SB_G0", /* name */ | |
1157 | FALSE, /* partial_inplace */ | |
1158 | 0xffffffff, /* src_mask */ | |
1159 | 0xffffffff, /* dst_mask */ | |
1160 | TRUE), /* pcrel_offset */ | |
1161 | ||
1162 | HOWTO (R_ARM_LDR_SB_G1, /* type */ | |
1163 | 0, /* rightshift */ | |
1164 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1165 | 32, /* bitsize */ | |
1166 | TRUE, /* pc_relative */ | |
1167 | 0, /* bitpos */ | |
1168 | complain_overflow_dont,/* complain_on_overflow */ | |
1169 | bfd_elf_generic_reloc, /* special_function */ | |
1170 | "R_ARM_LDR_SB_G1", /* name */ | |
1171 | FALSE, /* partial_inplace */ | |
1172 | 0xffffffff, /* src_mask */ | |
1173 | 0xffffffff, /* dst_mask */ | |
1174 | TRUE), /* pcrel_offset */ | |
1175 | ||
1176 | HOWTO (R_ARM_LDR_SB_G2, /* type */ | |
1177 | 0, /* rightshift */ | |
1178 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1179 | 32, /* bitsize */ | |
1180 | TRUE, /* pc_relative */ | |
1181 | 0, /* bitpos */ | |
1182 | complain_overflow_dont,/* complain_on_overflow */ | |
1183 | bfd_elf_generic_reloc, /* special_function */ | |
1184 | "R_ARM_LDR_SB_G2", /* name */ | |
1185 | FALSE, /* partial_inplace */ | |
1186 | 0xffffffff, /* src_mask */ | |
1187 | 0xffffffff, /* dst_mask */ | |
1188 | TRUE), /* pcrel_offset */ | |
1189 | ||
1190 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ | |
1191 | 0, /* rightshift */ | |
1192 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1193 | 32, /* bitsize */ | |
1194 | TRUE, /* pc_relative */ | |
1195 | 0, /* bitpos */ | |
1196 | complain_overflow_dont,/* complain_on_overflow */ | |
1197 | bfd_elf_generic_reloc, /* special_function */ | |
1198 | "R_ARM_LDRS_SB_G0", /* name */ | |
1199 | FALSE, /* partial_inplace */ | |
1200 | 0xffffffff, /* src_mask */ | |
1201 | 0xffffffff, /* dst_mask */ | |
1202 | TRUE), /* pcrel_offset */ | |
1203 | ||
1204 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ | |
1205 | 0, /* rightshift */ | |
1206 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1207 | 32, /* bitsize */ | |
1208 | TRUE, /* pc_relative */ | |
1209 | 0, /* bitpos */ | |
1210 | complain_overflow_dont,/* complain_on_overflow */ | |
1211 | bfd_elf_generic_reloc, /* special_function */ | |
1212 | "R_ARM_LDRS_SB_G1", /* name */ | |
1213 | FALSE, /* partial_inplace */ | |
1214 | 0xffffffff, /* src_mask */ | |
1215 | 0xffffffff, /* dst_mask */ | |
1216 | TRUE), /* pcrel_offset */ | |
1217 | ||
1218 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ | |
1219 | 0, /* rightshift */ | |
1220 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1221 | 32, /* bitsize */ | |
1222 | TRUE, /* pc_relative */ | |
1223 | 0, /* bitpos */ | |
1224 | complain_overflow_dont,/* complain_on_overflow */ | |
1225 | bfd_elf_generic_reloc, /* special_function */ | |
1226 | "R_ARM_LDRS_SB_G2", /* name */ | |
1227 | FALSE, /* partial_inplace */ | |
1228 | 0xffffffff, /* src_mask */ | |
1229 | 0xffffffff, /* dst_mask */ | |
1230 | TRUE), /* pcrel_offset */ | |
1231 | ||
1232 | HOWTO (R_ARM_LDC_SB_G0, /* type */ | |
1233 | 0, /* rightshift */ | |
1234 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1235 | 32, /* bitsize */ | |
1236 | TRUE, /* pc_relative */ | |
1237 | 0, /* bitpos */ | |
1238 | complain_overflow_dont,/* complain_on_overflow */ | |
1239 | bfd_elf_generic_reloc, /* special_function */ | |
1240 | "R_ARM_LDC_SB_G0", /* name */ | |
1241 | FALSE, /* partial_inplace */ | |
1242 | 0xffffffff, /* src_mask */ | |
1243 | 0xffffffff, /* dst_mask */ | |
1244 | TRUE), /* pcrel_offset */ | |
1245 | ||
1246 | HOWTO (R_ARM_LDC_SB_G1, /* type */ | |
1247 | 0, /* rightshift */ | |
1248 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1249 | 32, /* bitsize */ | |
1250 | TRUE, /* pc_relative */ | |
1251 | 0, /* bitpos */ | |
1252 | complain_overflow_dont,/* complain_on_overflow */ | |
1253 | bfd_elf_generic_reloc, /* special_function */ | |
1254 | "R_ARM_LDC_SB_G1", /* name */ | |
1255 | FALSE, /* partial_inplace */ | |
1256 | 0xffffffff, /* src_mask */ | |
1257 | 0xffffffff, /* dst_mask */ | |
1258 | TRUE), /* pcrel_offset */ | |
1259 | ||
1260 | HOWTO (R_ARM_LDC_SB_G2, /* type */ | |
1261 | 0, /* rightshift */ | |
1262 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1263 | 32, /* bitsize */ | |
1264 | TRUE, /* pc_relative */ | |
1265 | 0, /* bitpos */ | |
1266 | complain_overflow_dont,/* complain_on_overflow */ | |
1267 | bfd_elf_generic_reloc, /* special_function */ | |
1268 | "R_ARM_LDC_SB_G2", /* name */ | |
1269 | FALSE, /* partial_inplace */ | |
1270 | 0xffffffff, /* src_mask */ | |
1271 | 0xffffffff, /* dst_mask */ | |
1272 | TRUE), /* pcrel_offset */ | |
1273 | ||
1274 | /* End of group relocations. */ | |
c19d1205 | 1275 | |
c19d1205 ZW |
1276 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1277 | 0, /* rightshift */ | |
1278 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1279 | 16, /* bitsize */ | |
1280 | FALSE, /* pc_relative */ | |
1281 | 0, /* bitpos */ | |
1282 | complain_overflow_dont,/* complain_on_overflow */ | |
1283 | bfd_elf_generic_reloc, /* special_function */ | |
1284 | "R_ARM_MOVW_BREL_NC", /* name */ | |
1285 | FALSE, /* partial_inplace */ | |
1286 | 0x0000ffff, /* src_mask */ | |
1287 | 0x0000ffff, /* dst_mask */ | |
1288 | FALSE), /* pcrel_offset */ | |
1289 | ||
1290 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1291 | 0, /* rightshift */ | |
1292 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1293 | 16, /* bitsize */ | |
1294 | FALSE, /* pc_relative */ | |
1295 | 0, /* bitpos */ | |
1296 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1297 | bfd_elf_generic_reloc, /* special_function */ | |
1298 | "R_ARM_MOVT_BREL", /* name */ | |
1299 | FALSE, /* partial_inplace */ | |
1300 | 0x0000ffff, /* src_mask */ | |
1301 | 0x0000ffff, /* dst_mask */ | |
1302 | FALSE), /* pcrel_offset */ | |
1303 | ||
1304 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1305 | 0, /* rightshift */ | |
1306 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1307 | 16, /* bitsize */ | |
1308 | FALSE, /* pc_relative */ | |
1309 | 0, /* bitpos */ | |
1310 | complain_overflow_dont,/* complain_on_overflow */ | |
1311 | bfd_elf_generic_reloc, /* special_function */ | |
1312 | "R_ARM_MOVW_BREL", /* name */ | |
1313 | FALSE, /* partial_inplace */ | |
1314 | 0x0000ffff, /* src_mask */ | |
1315 | 0x0000ffff, /* dst_mask */ | |
1316 | FALSE), /* pcrel_offset */ | |
1317 | ||
1318 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1319 | 0, /* rightshift */ | |
1320 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1321 | 16, /* bitsize */ | |
1322 | FALSE, /* pc_relative */ | |
1323 | 0, /* bitpos */ | |
1324 | complain_overflow_dont,/* complain_on_overflow */ | |
1325 | bfd_elf_generic_reloc, /* special_function */ | |
1326 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
1327 | FALSE, /* partial_inplace */ | |
1328 | 0x040f70ff, /* src_mask */ | |
1329 | 0x040f70ff, /* dst_mask */ | |
1330 | FALSE), /* pcrel_offset */ | |
1331 | ||
1332 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1333 | 0, /* rightshift */ | |
1334 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1335 | 16, /* bitsize */ | |
1336 | FALSE, /* pc_relative */ | |
1337 | 0, /* bitpos */ | |
1338 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1339 | bfd_elf_generic_reloc, /* special_function */ | |
1340 | "R_ARM_THM_MOVT_BREL", /* name */ | |
1341 | FALSE, /* partial_inplace */ | |
1342 | 0x040f70ff, /* src_mask */ | |
1343 | 0x040f70ff, /* dst_mask */ | |
1344 | FALSE), /* pcrel_offset */ | |
1345 | ||
1346 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1347 | 0, /* rightshift */ | |
1348 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1349 | 16, /* bitsize */ | |
1350 | FALSE, /* pc_relative */ | |
1351 | 0, /* bitpos */ | |
1352 | complain_overflow_dont,/* complain_on_overflow */ | |
1353 | bfd_elf_generic_reloc, /* special_function */ | |
1354 | "R_ARM_THM_MOVW_BREL", /* name */ | |
1355 | FALSE, /* partial_inplace */ | |
1356 | 0x040f70ff, /* src_mask */ | |
1357 | 0x040f70ff, /* dst_mask */ | |
1358 | FALSE), /* pcrel_offset */ | |
1359 | ||
0855e32b NS |
1360 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
1361 | 0, /* rightshift */ | |
1362 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1363 | 32, /* bitsize */ | |
1364 | FALSE, /* pc_relative */ | |
1365 | 0, /* bitpos */ | |
1366 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1367 | NULL, /* special_function */ | |
1368 | "R_ARM_TLS_GOTDESC", /* name */ | |
1369 | TRUE, /* partial_inplace */ | |
1370 | 0xffffffff, /* src_mask */ | |
1371 | 0xffffffff, /* dst_mask */ | |
1372 | FALSE), /* pcrel_offset */ | |
1373 | ||
1374 | HOWTO (R_ARM_TLS_CALL, /* type */ | |
1375 | 0, /* rightshift */ | |
1376 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1377 | 24, /* bitsize */ | |
1378 | FALSE, /* pc_relative */ | |
1379 | 0, /* bitpos */ | |
1380 | complain_overflow_dont,/* complain_on_overflow */ | |
1381 | bfd_elf_generic_reloc, /* special_function */ | |
1382 | "R_ARM_TLS_CALL", /* name */ | |
1383 | FALSE, /* partial_inplace */ | |
1384 | 0x00ffffff, /* src_mask */ | |
1385 | 0x00ffffff, /* dst_mask */ | |
1386 | FALSE), /* pcrel_offset */ | |
1387 | ||
1388 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ | |
1389 | 0, /* rightshift */ | |
1390 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1391 | 0, /* bitsize */ | |
1392 | FALSE, /* pc_relative */ | |
1393 | 0, /* bitpos */ | |
1394 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1395 | bfd_elf_generic_reloc, /* special_function */ | |
1396 | "R_ARM_TLS_DESCSEQ", /* name */ | |
1397 | FALSE, /* partial_inplace */ | |
1398 | 0x00000000, /* src_mask */ | |
1399 | 0x00000000, /* dst_mask */ | |
1400 | FALSE), /* pcrel_offset */ | |
1401 | ||
1402 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ | |
1403 | 0, /* rightshift */ | |
1404 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1405 | 24, /* bitsize */ | |
1406 | FALSE, /* pc_relative */ | |
1407 | 0, /* bitpos */ | |
1408 | complain_overflow_dont,/* complain_on_overflow */ | |
1409 | bfd_elf_generic_reloc, /* special_function */ | |
1410 | "R_ARM_THM_TLS_CALL", /* name */ | |
1411 | FALSE, /* partial_inplace */ | |
1412 | 0x07ff07ff, /* src_mask */ | |
1413 | 0x07ff07ff, /* dst_mask */ | |
1414 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1415 | |
1416 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1417 | 0, /* rightshift */ | |
1418 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1419 | 32, /* bitsize */ | |
1420 | FALSE, /* pc_relative */ | |
1421 | 0, /* bitpos */ | |
1422 | complain_overflow_dont,/* complain_on_overflow */ | |
1423 | bfd_elf_generic_reloc, /* special_function */ | |
1424 | "R_ARM_PLT32_ABS", /* name */ | |
1425 | FALSE, /* partial_inplace */ | |
1426 | 0xffffffff, /* src_mask */ | |
1427 | 0xffffffff, /* dst_mask */ | |
1428 | FALSE), /* pcrel_offset */ | |
1429 | ||
1430 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1431 | 0, /* rightshift */ | |
1432 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1433 | 32, /* bitsize */ | |
1434 | FALSE, /* pc_relative */ | |
1435 | 0, /* bitpos */ | |
1436 | complain_overflow_dont,/* complain_on_overflow */ | |
1437 | bfd_elf_generic_reloc, /* special_function */ | |
1438 | "R_ARM_GOT_ABS", /* name */ | |
1439 | FALSE, /* partial_inplace */ | |
1440 | 0xffffffff, /* src_mask */ | |
1441 | 0xffffffff, /* dst_mask */ | |
1442 | FALSE), /* pcrel_offset */ | |
1443 | ||
1444 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1445 | 0, /* rightshift */ | |
1446 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1447 | 32, /* bitsize */ | |
1448 | TRUE, /* pc_relative */ | |
1449 | 0, /* bitpos */ | |
1450 | complain_overflow_dont, /* complain_on_overflow */ | |
1451 | bfd_elf_generic_reloc, /* special_function */ | |
1452 | "R_ARM_GOT_PREL", /* name */ | |
1453 | FALSE, /* partial_inplace */ | |
1454 | 0xffffffff, /* src_mask */ | |
1455 | 0xffffffff, /* dst_mask */ | |
1456 | TRUE), /* pcrel_offset */ | |
1457 | ||
1458 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1459 | 0, /* rightshift */ | |
1460 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1461 | 12, /* bitsize */ | |
1462 | FALSE, /* pc_relative */ | |
1463 | 0, /* bitpos */ | |
1464 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1465 | bfd_elf_generic_reloc, /* special_function */ | |
1466 | "R_ARM_GOT_BREL12", /* name */ | |
1467 | FALSE, /* partial_inplace */ | |
1468 | 0x00000fff, /* src_mask */ | |
1469 | 0x00000fff, /* dst_mask */ | |
1470 | FALSE), /* pcrel_offset */ | |
1471 | ||
1472 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1473 | 0, /* rightshift */ | |
1474 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1475 | 12, /* bitsize */ | |
1476 | FALSE, /* pc_relative */ | |
1477 | 0, /* bitpos */ | |
1478 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1479 | bfd_elf_generic_reloc, /* special_function */ | |
1480 | "R_ARM_GOTOFF12", /* name */ | |
1481 | FALSE, /* partial_inplace */ | |
1482 | 0x00000fff, /* src_mask */ | |
1483 | 0x00000fff, /* dst_mask */ | |
1484 | FALSE), /* pcrel_offset */ | |
1485 | ||
1486 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ | |
1487 | ||
1488 | /* GNU extension to record C++ vtable member usage */ | |
1489 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ | |
ba93b8ac DJ |
1490 | 0, /* rightshift */ |
1491 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 | 1492 | 0, /* bitsize */ |
ba93b8ac DJ |
1493 | FALSE, /* pc_relative */ |
1494 | 0, /* bitpos */ | |
c19d1205 ZW |
1495 | complain_overflow_dont, /* complain_on_overflow */ |
1496 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
1497 | "R_ARM_GNU_VTENTRY", /* name */ | |
1498 | FALSE, /* partial_inplace */ | |
1499 | 0, /* src_mask */ | |
1500 | 0, /* dst_mask */ | |
1501 | FALSE), /* pcrel_offset */ | |
1502 | ||
1503 | /* GNU extension to record C++ vtable hierarchy */ | |
1504 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
1505 | 0, /* rightshift */ | |
1506 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1507 | 0, /* bitsize */ | |
1508 | FALSE, /* pc_relative */ | |
1509 | 0, /* bitpos */ | |
1510 | complain_overflow_dont, /* complain_on_overflow */ | |
1511 | NULL, /* special_function */ | |
1512 | "R_ARM_GNU_VTINHERIT", /* name */ | |
1513 | FALSE, /* partial_inplace */ | |
1514 | 0, /* src_mask */ | |
1515 | 0, /* dst_mask */ | |
1516 | FALSE), /* pcrel_offset */ | |
1517 | ||
1518 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1519 | 1, /* rightshift */ | |
1520 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1521 | 11, /* bitsize */ | |
1522 | TRUE, /* pc_relative */ | |
1523 | 0, /* bitpos */ | |
1524 | complain_overflow_signed, /* complain_on_overflow */ | |
1525 | bfd_elf_generic_reloc, /* special_function */ | |
1526 | "R_ARM_THM_JUMP11", /* name */ | |
1527 | FALSE, /* partial_inplace */ | |
1528 | 0x000007ff, /* src_mask */ | |
1529 | 0x000007ff, /* dst_mask */ | |
1530 | TRUE), /* pcrel_offset */ | |
1531 | ||
1532 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1533 | 1, /* rightshift */ | |
1534 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1535 | 8, /* bitsize */ | |
1536 | TRUE, /* pc_relative */ | |
1537 | 0, /* bitpos */ | |
1538 | complain_overflow_signed, /* complain_on_overflow */ | |
1539 | bfd_elf_generic_reloc, /* special_function */ | |
1540 | "R_ARM_THM_JUMP8", /* name */ | |
1541 | FALSE, /* partial_inplace */ | |
1542 | 0x000000ff, /* src_mask */ | |
1543 | 0x000000ff, /* dst_mask */ | |
1544 | TRUE), /* pcrel_offset */ | |
ba93b8ac | 1545 | |
c19d1205 ZW |
1546 | /* TLS relocations */ |
1547 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
ba93b8ac DJ |
1548 | 0, /* rightshift */ |
1549 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1550 | 32, /* bitsize */ | |
1551 | FALSE, /* pc_relative */ | |
1552 | 0, /* bitpos */ | |
1553 | complain_overflow_bitfield,/* complain_on_overflow */ | |
c19d1205 ZW |
1554 | NULL, /* special_function */ |
1555 | "R_ARM_TLS_GD32", /* name */ | |
ba93b8ac DJ |
1556 | TRUE, /* partial_inplace */ |
1557 | 0xffffffff, /* src_mask */ | |
1558 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1559 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1560 | |
ba93b8ac DJ |
1561 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
1562 | 0, /* rightshift */ | |
1563 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1564 | 32, /* bitsize */ | |
1565 | FALSE, /* pc_relative */ | |
1566 | 0, /* bitpos */ | |
1567 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1568 | bfd_elf_generic_reloc, /* special_function */ | |
1569 | "R_ARM_TLS_LDM32", /* name */ | |
1570 | TRUE, /* partial_inplace */ | |
1571 | 0xffffffff, /* src_mask */ | |
1572 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1573 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1574 | |
c19d1205 | 1575 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
ba93b8ac DJ |
1576 | 0, /* rightshift */ |
1577 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1578 | 32, /* bitsize */ | |
1579 | FALSE, /* pc_relative */ | |
1580 | 0, /* bitpos */ | |
1581 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1582 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 1583 | "R_ARM_TLS_LDO32", /* name */ |
ba93b8ac DJ |
1584 | TRUE, /* partial_inplace */ |
1585 | 0xffffffff, /* src_mask */ | |
1586 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1587 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1588 | |
ba93b8ac DJ |
1589 | HOWTO (R_ARM_TLS_IE32, /* type */ |
1590 | 0, /* rightshift */ | |
1591 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1592 | 32, /* bitsize */ | |
1593 | FALSE, /* pc_relative */ | |
1594 | 0, /* bitpos */ | |
1595 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1596 | NULL, /* special_function */ | |
1597 | "R_ARM_TLS_IE32", /* name */ | |
1598 | TRUE, /* partial_inplace */ | |
1599 | 0xffffffff, /* src_mask */ | |
1600 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1601 | FALSE), /* pcrel_offset */ |
7f266840 | 1602 | |
c19d1205 | 1603 | HOWTO (R_ARM_TLS_LE32, /* type */ |
7f266840 DJ |
1604 | 0, /* rightshift */ |
1605 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 | 1606 | 32, /* bitsize */ |
7f266840 DJ |
1607 | FALSE, /* pc_relative */ |
1608 | 0, /* bitpos */ | |
c19d1205 ZW |
1609 | complain_overflow_bitfield,/* complain_on_overflow */ |
1610 | bfd_elf_generic_reloc, /* special_function */ | |
1611 | "R_ARM_TLS_LE32", /* name */ | |
1612 | TRUE, /* partial_inplace */ | |
1613 | 0xffffffff, /* src_mask */ | |
1614 | 0xffffffff, /* dst_mask */ | |
1615 | FALSE), /* pcrel_offset */ | |
7f266840 | 1616 | |
c19d1205 ZW |
1617 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1618 | 0, /* rightshift */ | |
1619 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1620 | 12, /* bitsize */ | |
1621 | FALSE, /* pc_relative */ | |
7f266840 | 1622 | 0, /* bitpos */ |
c19d1205 | 1623 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1624 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1625 | "R_ARM_TLS_LDO12", /* name */ |
7f266840 | 1626 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1627 | 0x00000fff, /* src_mask */ |
1628 | 0x00000fff, /* dst_mask */ | |
1629 | FALSE), /* pcrel_offset */ | |
7f266840 | 1630 | |
c19d1205 ZW |
1631 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1632 | 0, /* rightshift */ | |
1633 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1634 | 12, /* bitsize */ | |
1635 | FALSE, /* pc_relative */ | |
7f266840 | 1636 | 0, /* bitpos */ |
c19d1205 | 1637 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1638 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1639 | "R_ARM_TLS_LE12", /* name */ |
7f266840 | 1640 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1641 | 0x00000fff, /* src_mask */ |
1642 | 0x00000fff, /* dst_mask */ | |
1643 | FALSE), /* pcrel_offset */ | |
7f266840 | 1644 | |
c19d1205 | 1645 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 DJ |
1646 | 0, /* rightshift */ |
1647 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
1648 | 12, /* bitsize */ |
1649 | FALSE, /* pc_relative */ | |
7f266840 | 1650 | 0, /* bitpos */ |
c19d1205 | 1651 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1652 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1653 | "R_ARM_TLS_IE12GP", /* name */ |
7f266840 | 1654 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1655 | 0x00000fff, /* src_mask */ |
1656 | 0x00000fff, /* dst_mask */ | |
1657 | FALSE), /* pcrel_offset */ | |
0855e32b | 1658 | |
34e77a92 | 1659 | /* 112-127 private relocations. */ |
0855e32b NS |
1660 | EMPTY_HOWTO (112), |
1661 | EMPTY_HOWTO (113), | |
1662 | EMPTY_HOWTO (114), | |
1663 | EMPTY_HOWTO (115), | |
1664 | EMPTY_HOWTO (116), | |
1665 | EMPTY_HOWTO (117), | |
1666 | EMPTY_HOWTO (118), | |
1667 | EMPTY_HOWTO (119), | |
1668 | EMPTY_HOWTO (120), | |
1669 | EMPTY_HOWTO (121), | |
1670 | EMPTY_HOWTO (122), | |
1671 | EMPTY_HOWTO (123), | |
1672 | EMPTY_HOWTO (124), | |
1673 | EMPTY_HOWTO (125), | |
1674 | EMPTY_HOWTO (126), | |
1675 | EMPTY_HOWTO (127), | |
34e77a92 RS |
1676 | |
1677 | /* R_ARM_ME_TOO, obsolete. */ | |
0855e32b NS |
1678 | EMPTY_HOWTO (128), |
1679 | ||
1680 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ | |
1681 | 0, /* rightshift */ | |
1682 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1683 | 0, /* bitsize */ | |
1684 | FALSE, /* pc_relative */ | |
1685 | 0, /* bitpos */ | |
1686 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1687 | bfd_elf_generic_reloc, /* special_function */ | |
1688 | "R_ARM_THM_TLS_DESCSEQ",/* name */ | |
1689 | FALSE, /* partial_inplace */ | |
1690 | 0x00000000, /* src_mask */ | |
1691 | 0x00000000, /* dst_mask */ | |
1692 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1693 | }; |
1694 | ||
34e77a92 RS |
1695 | /* 160 onwards: */ |
1696 | static reloc_howto_type elf32_arm_howto_table_2[1] = | |
1697 | { | |
1698 | HOWTO (R_ARM_IRELATIVE, /* type */ | |
1699 | 0, /* rightshift */ | |
1700 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1701 | 32, /* bitsize */ | |
1702 | FALSE, /* pc_relative */ | |
1703 | 0, /* bitpos */ | |
1704 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1705 | bfd_elf_generic_reloc, /* special_function */ | |
1706 | "R_ARM_IRELATIVE", /* name */ | |
1707 | TRUE, /* partial_inplace */ | |
1708 | 0xffffffff, /* src_mask */ | |
1709 | 0xffffffff, /* dst_mask */ | |
1710 | FALSE) /* pcrel_offset */ | |
1711 | }; | |
c19d1205 | 1712 | |
34e77a92 RS |
1713 | /* 249-255 extended, currently unused, relocations: */ |
1714 | static reloc_howto_type elf32_arm_howto_table_3[4] = | |
7f266840 DJ |
1715 | { |
1716 | HOWTO (R_ARM_RREL32, /* type */ | |
1717 | 0, /* rightshift */ | |
1718 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1719 | 0, /* bitsize */ | |
1720 | FALSE, /* pc_relative */ | |
1721 | 0, /* bitpos */ | |
1722 | complain_overflow_dont,/* complain_on_overflow */ | |
1723 | bfd_elf_generic_reloc, /* special_function */ | |
1724 | "R_ARM_RREL32", /* name */ | |
1725 | FALSE, /* partial_inplace */ | |
1726 | 0, /* src_mask */ | |
1727 | 0, /* dst_mask */ | |
1728 | FALSE), /* pcrel_offset */ | |
1729 | ||
1730 | HOWTO (R_ARM_RABS32, /* type */ | |
1731 | 0, /* rightshift */ | |
1732 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1733 | 0, /* bitsize */ | |
1734 | FALSE, /* pc_relative */ | |
1735 | 0, /* bitpos */ | |
1736 | complain_overflow_dont,/* complain_on_overflow */ | |
1737 | bfd_elf_generic_reloc, /* special_function */ | |
1738 | "R_ARM_RABS32", /* name */ | |
1739 | FALSE, /* partial_inplace */ | |
1740 | 0, /* src_mask */ | |
1741 | 0, /* dst_mask */ | |
1742 | FALSE), /* pcrel_offset */ | |
1743 | ||
1744 | HOWTO (R_ARM_RPC24, /* type */ | |
1745 | 0, /* rightshift */ | |
1746 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1747 | 0, /* bitsize */ | |
1748 | FALSE, /* pc_relative */ | |
1749 | 0, /* bitpos */ | |
1750 | complain_overflow_dont,/* complain_on_overflow */ | |
1751 | bfd_elf_generic_reloc, /* special_function */ | |
1752 | "R_ARM_RPC24", /* name */ | |
1753 | FALSE, /* partial_inplace */ | |
1754 | 0, /* src_mask */ | |
1755 | 0, /* dst_mask */ | |
1756 | FALSE), /* pcrel_offset */ | |
1757 | ||
1758 | HOWTO (R_ARM_RBASE, /* type */ | |
1759 | 0, /* rightshift */ | |
1760 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1761 | 0, /* bitsize */ | |
1762 | FALSE, /* pc_relative */ | |
1763 | 0, /* bitpos */ | |
1764 | complain_overflow_dont,/* complain_on_overflow */ | |
1765 | bfd_elf_generic_reloc, /* special_function */ | |
1766 | "R_ARM_RBASE", /* name */ | |
1767 | FALSE, /* partial_inplace */ | |
1768 | 0, /* src_mask */ | |
1769 | 0, /* dst_mask */ | |
1770 | FALSE) /* pcrel_offset */ | |
1771 | }; | |
1772 | ||
1773 | static reloc_howto_type * | |
1774 | elf32_arm_howto_from_type (unsigned int r_type) | |
1775 | { | |
906e58ca | 1776 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1777 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1778 | |
34e77a92 RS |
1779 | if (r_type == R_ARM_IRELATIVE) |
1780 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; | |
1781 | ||
c19d1205 | 1782 | if (r_type >= R_ARM_RREL32 |
34e77a92 RS |
1783 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
1784 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; | |
7f266840 | 1785 | |
c19d1205 | 1786 | return NULL; |
7f266840 DJ |
1787 | } |
1788 | ||
1789 | static void | |
1790 | elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc, | |
1791 | Elf_Internal_Rela * elf_reloc) | |
1792 | { | |
1793 | unsigned int r_type; | |
1794 | ||
1795 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
1796 | bfd_reloc->howto = elf32_arm_howto_from_type (r_type); | |
1797 | } | |
1798 | ||
1799 | struct elf32_arm_reloc_map | |
1800 | { | |
1801 | bfd_reloc_code_real_type bfd_reloc_val; | |
1802 | unsigned char elf_reloc_val; | |
1803 | }; | |
1804 | ||
1805 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
1806 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
1807 | { | |
1808 | {BFD_RELOC_NONE, R_ARM_NONE}, | |
1809 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, | |
39b41c9c PB |
1810 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
1811 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
7f266840 DJ |
1812 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
1813 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
1814 | {BFD_RELOC_32, R_ARM_ABS32}, | |
1815 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
1816 | {BFD_RELOC_8, R_ARM_ABS8}, | |
1817 | {BFD_RELOC_16, R_ARM_ABS16}, | |
1818 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
1819 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, | |
c19d1205 ZW |
1820 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
1821 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
1822 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
1823 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
1824 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
1825 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
7f266840 DJ |
1826 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
1827 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
1828 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
c19d1205 | 1829 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, |
7f266840 | 1830 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, |
b43420e6 | 1831 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, |
7f266840 DJ |
1832 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, |
1833 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
1834 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, | |
1835 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
1836 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
1837 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac DJ |
1838 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
1839 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
0855e32b NS |
1840 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, |
1841 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, | |
1842 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, | |
1843 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, | |
1844 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, | |
1845 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, | |
ba93b8ac DJ |
1846 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
1847 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
1848 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
1849 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
1850 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
1851 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, | |
1852 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
1853 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
34e77a92 | 1854 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, |
c19d1205 ZW |
1855 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
1856 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
1857 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
1858 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
1859 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
1860 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
1861 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
1862 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
1863 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
1864 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
1865 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
1866 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
1867 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
1868 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
1869 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
1870 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
1871 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
1872 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
1873 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
1874 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
1875 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
1876 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
1877 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
1878 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
1879 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
1880 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
1881 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
1882 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
1883 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
1884 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
1885 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
1886 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
1887 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
1888 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
1889 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
1890 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
1891 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 PB |
1892 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
1893 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX} | |
7f266840 DJ |
1894 | }; |
1895 | ||
1896 | static reloc_howto_type * | |
f1c71a59 ZW |
1897 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
1898 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
1899 | { |
1900 | unsigned int i; | |
8029a119 | 1901 | |
906e58ca | 1902 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
1903 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
1904 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 1905 | |
c19d1205 | 1906 | return NULL; |
7f266840 DJ |
1907 | } |
1908 | ||
157090f7 AM |
1909 | static reloc_howto_type * |
1910 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1911 | const char *r_name) | |
1912 | { | |
1913 | unsigned int i; | |
1914 | ||
906e58ca | 1915 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
1916 | if (elf32_arm_howto_table_1[i].name != NULL |
1917 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
1918 | return &elf32_arm_howto_table_1[i]; | |
1919 | ||
906e58ca | 1920 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
1921 | if (elf32_arm_howto_table_2[i].name != NULL |
1922 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
1923 | return &elf32_arm_howto_table_2[i]; | |
1924 | ||
34e77a92 RS |
1925 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
1926 | if (elf32_arm_howto_table_3[i].name != NULL | |
1927 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) | |
1928 | return &elf32_arm_howto_table_3[i]; | |
1929 | ||
157090f7 AM |
1930 | return NULL; |
1931 | } | |
1932 | ||
906e58ca NC |
1933 | /* Support for core dump NOTE sections. */ |
1934 | ||
7f266840 | 1935 | static bfd_boolean |
f1c71a59 | 1936 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1937 | { |
1938 | int offset; | |
1939 | size_t size; | |
1940 | ||
1941 | switch (note->descsz) | |
1942 | { | |
1943 | default: | |
1944 | return FALSE; | |
1945 | ||
8029a119 | 1946 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 | 1947 | /* pr_cursig */ |
228e534f | 1948 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
7f266840 DJ |
1949 | |
1950 | /* pr_pid */ | |
228e534f | 1951 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
7f266840 DJ |
1952 | |
1953 | /* pr_reg */ | |
1954 | offset = 72; | |
1955 | size = 72; | |
1956 | ||
1957 | break; | |
1958 | } | |
1959 | ||
1960 | /* Make a ".reg/999" section. */ | |
1961 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
1962 | size, note->descpos + offset); | |
1963 | } | |
1964 | ||
1965 | static bfd_boolean | |
f1c71a59 | 1966 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1967 | { |
1968 | switch (note->descsz) | |
1969 | { | |
1970 | default: | |
1971 | return FALSE; | |
1972 | ||
8029a119 | 1973 | case 124: /* Linux/ARM elf_prpsinfo. */ |
228e534f | 1974 | elf_tdata (abfd)->core->pid |
4395ee08 | 1975 | = bfd_get_32 (abfd, note->descdata + 12); |
228e534f | 1976 | elf_tdata (abfd)->core->program |
7f266840 | 1977 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); |
228e534f | 1978 | elf_tdata (abfd)->core->command |
7f266840 DJ |
1979 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); |
1980 | } | |
1981 | ||
1982 | /* Note that for some reason, a spurious space is tacked | |
1983 | onto the end of the args in some (at least one anyway) | |
1984 | implementations, so strip it off if it exists. */ | |
7f266840 | 1985 | { |
228e534f | 1986 | char *command = elf_tdata (abfd)->core->command; |
7f266840 DJ |
1987 | int n = strlen (command); |
1988 | ||
1989 | if (0 < n && command[n - 1] == ' ') | |
1990 | command[n - 1] = '\0'; | |
1991 | } | |
1992 | ||
1993 | return TRUE; | |
1994 | } | |
1995 | ||
1f20dca5 UW |
1996 | static char * |
1997 | elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz, | |
1998 | int note_type, ...) | |
1999 | { | |
2000 | switch (note_type) | |
2001 | { | |
2002 | default: | |
2003 | return NULL; | |
2004 | ||
2005 | case NT_PRPSINFO: | |
2006 | { | |
2007 | char data[124]; | |
2008 | va_list ap; | |
2009 | ||
2010 | va_start (ap, note_type); | |
2011 | memset (data, 0, sizeof (data)); | |
2012 | strncpy (data + 28, va_arg (ap, const char *), 16); | |
2013 | strncpy (data + 44, va_arg (ap, const char *), 80); | |
2014 | va_end (ap); | |
2015 | ||
2016 | return elfcore_write_note (abfd, buf, bufsiz, | |
2017 | "CORE", note_type, data, sizeof (data)); | |
2018 | } | |
2019 | ||
2020 | case NT_PRSTATUS: | |
2021 | { | |
2022 | char data[148]; | |
2023 | va_list ap; | |
2024 | long pid; | |
2025 | int cursig; | |
2026 | const void *greg; | |
2027 | ||
2028 | va_start (ap, note_type); | |
2029 | memset (data, 0, sizeof (data)); | |
2030 | pid = va_arg (ap, long); | |
2031 | bfd_put_32 (abfd, pid, data + 24); | |
2032 | cursig = va_arg (ap, int); | |
2033 | bfd_put_16 (abfd, cursig, data + 12); | |
2034 | greg = va_arg (ap, const void *); | |
2035 | memcpy (data + 72, greg, 72); | |
2036 | va_end (ap); | |
2037 | ||
2038 | return elfcore_write_note (abfd, buf, bufsiz, | |
2039 | "CORE", note_type, data, sizeof (data)); | |
2040 | } | |
2041 | } | |
2042 | } | |
2043 | ||
7f266840 DJ |
2044 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec |
2045 | #define TARGET_LITTLE_NAME "elf32-littlearm" | |
2046 | #define TARGET_BIG_SYM bfd_elf32_bigarm_vec | |
2047 | #define TARGET_BIG_NAME "elf32-bigarm" | |
2048 | ||
2049 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
2050 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1f20dca5 | 2051 | #define elf_backend_write_core_note elf32_arm_nabi_write_core_note |
7f266840 | 2052 | |
252b5132 RH |
2053 | typedef unsigned long int insn32; |
2054 | typedef unsigned short int insn16; | |
2055 | ||
3a4a14e9 PB |
2056 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
2057 | interworkable. */ | |
57e8b36a | 2058 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 2059 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
2060 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
2061 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 2062 | |
252b5132 RH |
2063 | /* The linker script knows the section names for placement. |
2064 | The entry_names are used to do simple name mangling on the stubs. | |
2065 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 2066 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
2067 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
2068 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
2069 | ||
2070 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
2071 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
2072 | ||
c7b8f16e JB |
2073 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
2074 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
2075 | ||
845b51d6 PB |
2076 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
2077 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
2078 | ||
7413f23f DJ |
2079 | #define STUB_ENTRY_NAME "__%s_veneer" |
2080 | ||
252b5132 RH |
2081 | /* The name of the dynamic interpreter. This is put in the .interp |
2082 | section. */ | |
2083 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
2084 | ||
0855e32b | 2085 | static const unsigned long tls_trampoline [] = |
b38cadfb NC |
2086 | { |
2087 | 0xe08e0000, /* add r0, lr, r0 */ | |
2088 | 0xe5901004, /* ldr r1, [r0,#4] */ | |
2089 | 0xe12fff11, /* bx r1 */ | |
2090 | }; | |
0855e32b NS |
2091 | |
2092 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = | |
b38cadfb NC |
2093 | { |
2094 | 0xe52d2004, /* push {r2} */ | |
2095 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ | |
2096 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ | |
2097 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ | |
2098 | 0xe081100f, /* 2: add r1, pc */ | |
2099 | 0xe12fff12, /* bx r2 */ | |
2100 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 | |
0855e32b | 2101 | + dl_tlsdesc_lazy_resolver(GOT) */ |
b38cadfb NC |
2102 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ |
2103 | }; | |
0855e32b | 2104 | |
5e681ec4 PB |
2105 | #ifdef FOUR_WORD_PLT |
2106 | ||
252b5132 RH |
2107 | /* The first entry in a procedure linkage table looks like |
2108 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 2109 | called before the relocation has been set up calls the dynamic |
9b485d32 | 2110 | linker first. */ |
e5a52504 | 2111 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2112 | { |
2113 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2114 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
2115 | 0xe08fe00e, /* add lr, pc, lr */ | |
2116 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2117 | }; | |
5e681ec4 PB |
2118 | |
2119 | /* Subsequent entries in a procedure linkage table look like | |
2120 | this. */ | |
e5a52504 | 2121 | static const bfd_vma elf32_arm_plt_entry [] = |
b38cadfb NC |
2122 | { |
2123 | 0xe28fc600, /* add ip, pc, #NN */ | |
2124 | 0xe28cca00, /* add ip, ip, #NN */ | |
2125 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
2126 | 0x00000000, /* unused */ | |
2127 | }; | |
5e681ec4 PB |
2128 | |
2129 | #else | |
2130 | ||
5e681ec4 PB |
2131 | /* The first entry in a procedure linkage table looks like |
2132 | this. It is set up so that any shared library function that is | |
2133 | called before the relocation has been set up calls the dynamic | |
2134 | linker first. */ | |
e5a52504 | 2135 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2136 | { |
2137 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2138 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
2139 | 0xe08fe00e, /* add lr, pc, lr */ | |
2140 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2141 | 0x00000000, /* &GOT[0] - . */ | |
2142 | }; | |
252b5132 RH |
2143 | |
2144 | /* Subsequent entries in a procedure linkage table look like | |
2145 | this. */ | |
e5a52504 | 2146 | static const bfd_vma elf32_arm_plt_entry [] = |
b38cadfb NC |
2147 | { |
2148 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
2149 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2150 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2151 | }; | |
5e681ec4 PB |
2152 | |
2153 | #endif | |
252b5132 | 2154 | |
00a97672 RS |
2155 | /* The format of the first entry in the procedure linkage table |
2156 | for a VxWorks executable. */ | |
2157 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
b38cadfb NC |
2158 | { |
2159 | 0xe52dc008, /* str ip,[sp,#-8]! */ | |
2160 | 0xe59fc000, /* ldr ip,[pc] */ | |
2161 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
2162 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
2163 | }; | |
00a97672 RS |
2164 | |
2165 | /* The format of subsequent entries in a VxWorks executable. */ | |
2166 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
b38cadfb NC |
2167 | { |
2168 | 0xe59fc000, /* ldr ip,[pc] */ | |
2169 | 0xe59cf000, /* ldr pc,[ip] */ | |
2170 | 0x00000000, /* .long @got */ | |
2171 | 0xe59fc000, /* ldr ip,[pc] */ | |
2172 | 0xea000000, /* b _PLT */ | |
2173 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2174 | }; | |
00a97672 RS |
2175 | |
2176 | /* The format of entries in a VxWorks shared library. */ | |
2177 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
b38cadfb NC |
2178 | { |
2179 | 0xe59fc000, /* ldr ip,[pc] */ | |
2180 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
2181 | 0x00000000, /* .long @got */ | |
2182 | 0xe59fc000, /* ldr ip,[pc] */ | |
2183 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
2184 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2185 | }; | |
00a97672 | 2186 | |
b7693d02 DJ |
2187 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
2188 | #define PLT_THUMB_STUB_SIZE 4 | |
2189 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
b38cadfb NC |
2190 | { |
2191 | 0x4778, /* bx pc */ | |
2192 | 0x46c0 /* nop */ | |
2193 | }; | |
b7693d02 | 2194 | |
e5a52504 MM |
2195 | /* The entries in a PLT when using a DLL-based target with multiple |
2196 | address spaces. */ | |
906e58ca | 2197 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
b38cadfb NC |
2198 | { |
2199 | 0xe51ff004, /* ldr pc, [pc, #-4] */ | |
2200 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ | |
2201 | }; | |
2202 | ||
2203 | /* The first entry in a procedure linkage table looks like | |
2204 | this. It is set up so that any shared library function that is | |
2205 | called before the relocation has been set up calls the dynamic | |
2206 | linker first. */ | |
2207 | static const bfd_vma elf32_arm_nacl_plt0_entry [] = | |
2208 | { | |
2209 | /* First bundle: */ | |
2210 | 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */ | |
2211 | 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */ | |
2212 | 0xe08cc00f, /* add ip, ip, pc */ | |
2213 | 0xe52dc008, /* str ip, [sp, #-8]! */ | |
2214 | /* Second bundle: */ | |
edccdf7c RM |
2215 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2216 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2217 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2218 | 0xe12fff1c, /* bx ip */ |
b38cadfb | 2219 | /* Third bundle: */ |
edccdf7c RM |
2220 | 0xe320f000, /* nop */ |
2221 | 0xe320f000, /* nop */ | |
2222 | 0xe320f000, /* nop */ | |
b38cadfb NC |
2223 | /* .Lplt_tail: */ |
2224 | 0xe50dc004, /* str ip, [sp, #-4] */ | |
2225 | /* Fourth bundle: */ | |
edccdf7c RM |
2226 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2227 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2228 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2229 | 0xe12fff1c, /* bx ip */ |
b38cadfb NC |
2230 | }; |
2231 | #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4) | |
2232 | ||
2233 | /* Subsequent entries in a procedure linkage table look like this. */ | |
2234 | static const bfd_vma elf32_arm_nacl_plt_entry [] = | |
2235 | { | |
2236 | 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */ | |
2237 | 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */ | |
2238 | 0xe08cc00f, /* add ip, ip, pc */ | |
2239 | 0xea000000, /* b .Lplt_tail */ | |
2240 | }; | |
e5a52504 | 2241 | |
906e58ca NC |
2242 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
2243 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) | |
2244 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) | |
2245 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) | |
2246 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) | |
2247 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) | |
2248 | ||
461a49ca | 2249 | enum stub_insn_type |
b38cadfb NC |
2250 | { |
2251 | THUMB16_TYPE = 1, | |
2252 | THUMB32_TYPE, | |
2253 | ARM_TYPE, | |
2254 | DATA_TYPE | |
2255 | }; | |
461a49ca | 2256 | |
48229727 JB |
2257 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2258 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2259 | is inserted in arm_build_one_stub(). */ | |
2260 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2261 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
2262 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} | |
2263 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2264 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2265 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2266 | |
2267 | typedef struct | |
2268 | { | |
b38cadfb NC |
2269 | bfd_vma data; |
2270 | enum stub_insn_type type; | |
2271 | unsigned int r_type; | |
2272 | int reloc_addend; | |
461a49ca DJ |
2273 | } insn_sequence; |
2274 | ||
fea2b4d6 CL |
2275 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2276 | to reach the stub if necessary. */ | |
461a49ca | 2277 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
b38cadfb NC |
2278 | { |
2279 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2280 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2281 | }; | |
906e58ca | 2282 | |
fea2b4d6 CL |
2283 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2284 | available. */ | |
461a49ca | 2285 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
b38cadfb NC |
2286 | { |
2287 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2288 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2289 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2290 | }; | |
906e58ca | 2291 | |
d3626fb0 | 2292 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2293 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
b38cadfb NC |
2294 | { |
2295 | THUMB16_INSN (0xb401), /* push {r0} */ | |
2296 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2297 | THUMB16_INSN (0x4684), /* mov ip, r0 */ | |
2298 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2299 | THUMB16_INSN (0x4760), /* bx ip */ | |
2300 | THUMB16_INSN (0xbf00), /* nop */ | |
2301 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2302 | }; | |
906e58ca | 2303 | |
d3626fb0 CL |
2304 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2305 | allowed. */ | |
2306 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
b38cadfb NC |
2307 | { |
2308 | THUMB16_INSN (0x4778), /* bx pc */ | |
2309 | THUMB16_INSN (0x46c0), /* nop */ | |
2310 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2311 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2312 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2313 | }; | |
d3626fb0 | 2314 | |
fea2b4d6 CL |
2315 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2316 | available. */ | |
461a49ca | 2317 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
b38cadfb NC |
2318 | { |
2319 | THUMB16_INSN (0x4778), /* bx pc */ | |
2320 | THUMB16_INSN (0x46c0), /* nop */ | |
2321 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2322 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2323 | }; | |
906e58ca | 2324 | |
fea2b4d6 CL |
2325 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2326 | one, when the destination is close enough. */ | |
461a49ca | 2327 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
b38cadfb NC |
2328 | { |
2329 | THUMB16_INSN (0x4778), /* bx pc */ | |
2330 | THUMB16_INSN (0x46c0), /* nop */ | |
2331 | ARM_REL_INSN (0xea000000, -8), /* b (X-8) */ | |
2332 | }; | |
c820be07 | 2333 | |
cf3eccff | 2334 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2335 | blx to reach the stub if necessary. */ |
cf3eccff | 2336 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
b38cadfb NC |
2337 | { |
2338 | ARM_INSN (0xe59fc000), /* ldr ip, [pc] */ | |
2339 | ARM_INSN (0xe08ff00c), /* add pc, pc, ip */ | |
2340 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
2341 | }; | |
906e58ca | 2342 | |
cf3eccff DJ |
2343 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2344 | blx to reach the stub if necessary. We can not add into pc; | |
2345 | it is not guaranteed to mode switch (different in ARMv6 and | |
2346 | ARMv7). */ | |
2347 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
b38cadfb NC |
2348 | { |
2349 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2350 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2351 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2352 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2353 | }; | |
cf3eccff | 2354 | |
ebe24dd4 CL |
2355 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2356 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
b38cadfb NC |
2357 | { |
2358 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2359 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2360 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2361 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2362 | }; | |
ebe24dd4 CL |
2363 | |
2364 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2365 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
b38cadfb NC |
2366 | { |
2367 | THUMB16_INSN (0x4778), /* bx pc */ | |
2368 | THUMB16_INSN (0x46c0), /* nop */ | |
2369 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2370 | ARM_INSN (0xe08cf00f), /* add pc, ip, pc */ | |
2371 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
2372 | }; | |
ebe24dd4 | 2373 | |
d3626fb0 CL |
2374 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2375 | architectures. */ | |
ebe24dd4 | 2376 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
b38cadfb NC |
2377 | { |
2378 | THUMB16_INSN (0xb401), /* push {r0} */ | |
2379 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2380 | THUMB16_INSN (0x46fc), /* mov ip, pc */ | |
2381 | THUMB16_INSN (0x4484), /* add ip, r0 */ | |
2382 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2383 | THUMB16_INSN (0x4760), /* bx ip */ | |
2384 | DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ | |
2385 | }; | |
ebe24dd4 | 2386 | |
d3626fb0 CL |
2387 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2388 | allowed. */ | |
2389 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
b38cadfb NC |
2390 | { |
2391 | THUMB16_INSN (0x4778), /* bx pc */ | |
2392 | THUMB16_INSN (0x46c0), /* nop */ | |
2393 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2394 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2395 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2396 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2397 | }; | |
d3626fb0 | 2398 | |
0855e32b NS |
2399 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
2400 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2401 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = | |
2402 | { | |
b38cadfb NC |
2403 | ARM_INSN (0xe59f1000), /* ldr r1, [pc] */ |
2404 | ARM_INSN (0xe08ff001), /* add pc, pc, r1 */ | |
2405 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
0855e32b NS |
2406 | }; |
2407 | ||
2408 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a | |
2409 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2410 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = | |
2411 | { | |
b38cadfb NC |
2412 | THUMB16_INSN (0x4778), /* bx pc */ |
2413 | THUMB16_INSN (0x46c0), /* nop */ | |
2414 | ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */ | |
2415 | ARM_INSN (0xe081f00f), /* add pc, r1, pc */ | |
2416 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
0855e32b NS |
2417 | }; |
2418 | ||
48229727 JB |
2419 | /* Cortex-A8 erratum-workaround stubs. */ |
2420 | ||
2421 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2422 | can't use a conditional branch to reach this stub). */ | |
2423 | ||
2424 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
b38cadfb NC |
2425 | { |
2426 | THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */ | |
2427 | THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */ | |
2428 | THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2429 | }; | |
48229727 JB |
2430 | |
2431 | /* Stub used for b.w and bl.w instructions. */ | |
2432 | ||
2433 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
b38cadfb NC |
2434 | { |
2435 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2436 | }; | |
48229727 JB |
2437 | |
2438 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
b38cadfb NC |
2439 | { |
2440 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2441 | }; | |
48229727 JB |
2442 | |
2443 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2444 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2445 | real destination using an ARM-mode branch. */ | |
2446 | ||
2447 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
b38cadfb NC |
2448 | { |
2449 | ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */ | |
2450 | }; | |
48229727 | 2451 | |
9553db3c NC |
2452 | /* For each section group there can be a specially created linker section |
2453 | to hold the stubs for that group. The name of the stub section is based | |
2454 | upon the name of another section within that group with the suffix below | |
2455 | applied. | |
2456 | ||
2457 | PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to | |
2458 | create what appeared to be a linker stub section when it actually | |
2459 | contained user code/data. For example, consider this fragment: | |
b38cadfb | 2460 | |
9553db3c NC |
2461 | const char * stubborn_problems[] = { "np" }; |
2462 | ||
2463 | If this is compiled with "-fPIC -fdata-sections" then gcc produces a | |
2464 | section called: | |
2465 | ||
2466 | .data.rel.local.stubborn_problems | |
2467 | ||
2468 | This then causes problems in arm32_arm_build_stubs() as it triggers: | |
2469 | ||
2470 | // Ignore non-stub sections. | |
2471 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
2472 | continue; | |
2473 | ||
2474 | And so the section would be ignored instead of being processed. Hence | |
2475 | the change in definition of STUB_SUFFIX to a name that cannot be a valid | |
2476 | C identifier. */ | |
2477 | #define STUB_SUFFIX ".__stub" | |
906e58ca | 2478 | |
738a79f6 CL |
2479 | /* One entry per long/short branch stub defined above. */ |
2480 | #define DEF_STUBS \ | |
2481 | DEF_STUB(long_branch_any_any) \ | |
2482 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
2483 | DEF_STUB(long_branch_thumb_only) \ | |
2484 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
2485 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
2486 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
2487 | DEF_STUB(long_branch_any_arm_pic) \ | |
2488 | DEF_STUB(long_branch_any_thumb_pic) \ | |
2489 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
2490 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
2491 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
48229727 | 2492 | DEF_STUB(long_branch_thumb_only_pic) \ |
0855e32b NS |
2493 | DEF_STUB(long_branch_any_tls_pic) \ |
2494 | DEF_STUB(long_branch_v4t_thumb_tls_pic) \ | |
48229727 JB |
2495 | DEF_STUB(a8_veneer_b_cond) \ |
2496 | DEF_STUB(a8_veneer_b) \ | |
2497 | DEF_STUB(a8_veneer_bl) \ | |
2498 | DEF_STUB(a8_veneer_blx) | |
738a79f6 CL |
2499 | |
2500 | #define DEF_STUB(x) arm_stub_##x, | |
b38cadfb NC |
2501 | enum elf32_arm_stub_type |
2502 | { | |
906e58ca | 2503 | arm_stub_none, |
738a79f6 | 2504 | DEF_STUBS |
eb7c4339 NS |
2505 | /* Note the first a8_veneer type */ |
2506 | arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond | |
738a79f6 CL |
2507 | }; |
2508 | #undef DEF_STUB | |
2509 | ||
2510 | typedef struct | |
2511 | { | |
d3ce72d0 | 2512 | const insn_sequence* template_sequence; |
738a79f6 CL |
2513 | int template_size; |
2514 | } stub_def; | |
2515 | ||
2516 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
b38cadfb NC |
2517 | static const stub_def stub_definitions[] = |
2518 | { | |
738a79f6 CL |
2519 | {NULL, 0}, |
2520 | DEF_STUBS | |
906e58ca NC |
2521 | }; |
2522 | ||
2523 | struct elf32_arm_stub_hash_entry | |
2524 | { | |
2525 | /* Base hash table entry structure. */ | |
2526 | struct bfd_hash_entry root; | |
2527 | ||
2528 | /* The stub section. */ | |
2529 | asection *stub_sec; | |
2530 | ||
2531 | /* Offset within stub_sec of the beginning of this stub. */ | |
2532 | bfd_vma stub_offset; | |
2533 | ||
2534 | /* Given the symbol's value and its section we can determine its final | |
2535 | value when building the stubs (so the stub knows where to jump). */ | |
2536 | bfd_vma target_value; | |
2537 | asection *target_section; | |
2538 | ||
48229727 JB |
2539 | /* Offset to apply to relocation referencing target_value. */ |
2540 | bfd_vma target_addend; | |
2541 | ||
2542 | /* The instruction which caused this stub to be generated (only valid for | |
2543 | Cortex-A8 erratum workaround stubs at present). */ | |
2544 | unsigned long orig_insn; | |
2545 | ||
461a49ca | 2546 | /* The stub type. */ |
906e58ca | 2547 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2548 | /* Its encoding size in bytes. */ |
2549 | int stub_size; | |
2550 | /* Its template. */ | |
2551 | const insn_sequence *stub_template; | |
2552 | /* The size of the template (number of entries). */ | |
2553 | int stub_template_size; | |
906e58ca NC |
2554 | |
2555 | /* The symbol table entry, if any, that this was derived from. */ | |
2556 | struct elf32_arm_link_hash_entry *h; | |
2557 | ||
35fc36a8 RS |
2558 | /* Type of branch. */ |
2559 | enum arm_st_branch_type branch_type; | |
906e58ca NC |
2560 | |
2561 | /* Where this stub is being called from, or, in the case of combined | |
2562 | stub sections, the first input section in the group. */ | |
2563 | asection *id_sec; | |
7413f23f DJ |
2564 | |
2565 | /* The name for the local symbol at the start of this stub. The | |
2566 | stub name in the hash table has to be unique; this does not, so | |
2567 | it can be friendlier. */ | |
2568 | char *output_name; | |
906e58ca NC |
2569 | }; |
2570 | ||
e489d0ae PB |
2571 | /* Used to build a map of a section. This is required for mixed-endian |
2572 | code/data. */ | |
2573 | ||
2574 | typedef struct elf32_elf_section_map | |
2575 | { | |
2576 | bfd_vma vma; | |
2577 | char type; | |
2578 | } | |
2579 | elf32_arm_section_map; | |
2580 | ||
c7b8f16e JB |
2581 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2582 | ||
2583 | typedef enum | |
2584 | { | |
2585 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2586 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2587 | VFP11_ERRATUM_ARM_VENEER, | |
2588 | VFP11_ERRATUM_THUMB_VENEER | |
2589 | } | |
2590 | elf32_vfp11_erratum_type; | |
2591 | ||
2592 | typedef struct elf32_vfp11_erratum_list | |
2593 | { | |
2594 | struct elf32_vfp11_erratum_list *next; | |
2595 | bfd_vma vma; | |
2596 | union | |
2597 | { | |
2598 | struct | |
2599 | { | |
2600 | struct elf32_vfp11_erratum_list *veneer; | |
2601 | unsigned int vfp_insn; | |
2602 | } b; | |
2603 | struct | |
2604 | { | |
2605 | struct elf32_vfp11_erratum_list *branch; | |
2606 | unsigned int id; | |
2607 | } v; | |
2608 | } u; | |
2609 | elf32_vfp11_erratum_type type; | |
2610 | } | |
2611 | elf32_vfp11_erratum_list; | |
2612 | ||
2468f9c9 PB |
2613 | typedef enum |
2614 | { | |
2615 | DELETE_EXIDX_ENTRY, | |
2616 | INSERT_EXIDX_CANTUNWIND_AT_END | |
2617 | } | |
2618 | arm_unwind_edit_type; | |
2619 | ||
2620 | /* A (sorted) list of edits to apply to an unwind table. */ | |
2621 | typedef struct arm_unwind_table_edit | |
2622 | { | |
2623 | arm_unwind_edit_type type; | |
2624 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
2625 | section different from the one we're currently writing out, so record the | |
2626 | (text) section this edit relates to here. */ | |
2627 | asection *linked_section; | |
2628 | unsigned int index; | |
2629 | struct arm_unwind_table_edit *next; | |
2630 | } | |
2631 | arm_unwind_table_edit; | |
2632 | ||
8e3de13a | 2633 | typedef struct _arm_elf_section_data |
e489d0ae | 2634 | { |
2468f9c9 | 2635 | /* Information about mapping symbols. */ |
e489d0ae | 2636 | struct bfd_elf_section_data elf; |
8e3de13a | 2637 | unsigned int mapcount; |
c7b8f16e | 2638 | unsigned int mapsize; |
e489d0ae | 2639 | elf32_arm_section_map *map; |
2468f9c9 | 2640 | /* Information about CPU errata. */ |
c7b8f16e JB |
2641 | unsigned int erratumcount; |
2642 | elf32_vfp11_erratum_list *erratumlist; | |
2468f9c9 PB |
2643 | /* Information about unwind tables. */ |
2644 | union | |
2645 | { | |
2646 | /* Unwind info attached to a text section. */ | |
2647 | struct | |
2648 | { | |
2649 | asection *arm_exidx_sec; | |
2650 | } text; | |
2651 | ||
2652 | /* Unwind info attached to an .ARM.exidx section. */ | |
2653 | struct | |
2654 | { | |
2655 | arm_unwind_table_edit *unwind_edit_list; | |
2656 | arm_unwind_table_edit *unwind_edit_tail; | |
2657 | } exidx; | |
2658 | } u; | |
8e3de13a NC |
2659 | } |
2660 | _arm_elf_section_data; | |
e489d0ae PB |
2661 | |
2662 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 2663 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 2664 | |
48229727 JB |
2665 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
2666 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
2667 | so may be created multiple times: we use an array of these entries whilst | |
2668 | relaxing which we can refresh easily, then create stubs for each potentially | |
2669 | erratum-triggering instruction once we've settled on a solution. */ | |
2670 | ||
b38cadfb NC |
2671 | struct a8_erratum_fix |
2672 | { | |
48229727 JB |
2673 | bfd *input_bfd; |
2674 | asection *section; | |
2675 | bfd_vma offset; | |
2676 | bfd_vma addend; | |
2677 | unsigned long orig_insn; | |
2678 | char *stub_name; | |
2679 | enum elf32_arm_stub_type stub_type; | |
35fc36a8 | 2680 | enum arm_st_branch_type branch_type; |
48229727 JB |
2681 | }; |
2682 | ||
2683 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
2684 | erratum. */ | |
2685 | ||
b38cadfb NC |
2686 | struct a8_erratum_reloc |
2687 | { | |
48229727 JB |
2688 | bfd_vma from; |
2689 | bfd_vma destination; | |
92750f34 DJ |
2690 | struct elf32_arm_link_hash_entry *hash; |
2691 | const char *sym_name; | |
48229727 | 2692 | unsigned int r_type; |
35fc36a8 | 2693 | enum arm_st_branch_type branch_type; |
48229727 JB |
2694 | bfd_boolean non_a8_stub; |
2695 | }; | |
2696 | ||
ba93b8ac DJ |
2697 | /* The size of the thread control block. */ |
2698 | #define TCB_SIZE 8 | |
2699 | ||
34e77a92 RS |
2700 | /* ARM-specific information about a PLT entry, over and above the usual |
2701 | gotplt_union. */ | |
b38cadfb NC |
2702 | struct arm_plt_info |
2703 | { | |
34e77a92 RS |
2704 | /* We reference count Thumb references to a PLT entry separately, |
2705 | so that we can emit the Thumb trampoline only if needed. */ | |
2706 | bfd_signed_vma thumb_refcount; | |
2707 | ||
2708 | /* Some references from Thumb code may be eliminated by BL->BLX | |
2709 | conversion, so record them separately. */ | |
2710 | bfd_signed_vma maybe_thumb_refcount; | |
2711 | ||
2712 | /* How many of the recorded PLT accesses were from non-call relocations. | |
2713 | This information is useful when deciding whether anything takes the | |
2714 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all | |
2715 | non-call references to the function should resolve directly to the | |
2716 | real runtime target. */ | |
2717 | unsigned int noncall_refcount; | |
2718 | ||
2719 | /* Since PLT entries have variable size if the Thumb prologue is | |
2720 | used, we need to record the index into .got.plt instead of | |
2721 | recomputing it from the PLT offset. */ | |
2722 | bfd_signed_vma got_offset; | |
2723 | }; | |
2724 | ||
2725 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ | |
b38cadfb NC |
2726 | struct arm_local_iplt_info |
2727 | { | |
34e77a92 RS |
2728 | /* The information that is usually found in the generic ELF part of |
2729 | the hash table entry. */ | |
2730 | union gotplt_union root; | |
2731 | ||
2732 | /* The information that is usually found in the ARM-specific part of | |
2733 | the hash table entry. */ | |
2734 | struct arm_plt_info arm; | |
2735 | ||
2736 | /* A list of all potential dynamic relocations against this symbol. */ | |
2737 | struct elf_dyn_relocs *dyn_relocs; | |
2738 | }; | |
2739 | ||
0ffa91dd | 2740 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
2741 | { |
2742 | struct elf_obj_tdata root; | |
2743 | ||
2744 | /* tls_type for each local got entry. */ | |
2745 | char *local_got_tls_type; | |
ee065d83 | 2746 | |
0855e32b NS |
2747 | /* GOTPLT entries for TLS descriptors. */ |
2748 | bfd_vma *local_tlsdesc_gotent; | |
2749 | ||
34e77a92 RS |
2750 | /* Information for local symbols that need entries in .iplt. */ |
2751 | struct arm_local_iplt_info **local_iplt; | |
2752 | ||
bf21ed78 MS |
2753 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
2754 | int no_enum_size_warning; | |
a9dc9481 JM |
2755 | |
2756 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
2757 | int no_wchar_size_warning; | |
ba93b8ac DJ |
2758 | }; |
2759 | ||
0ffa91dd NC |
2760 | #define elf_arm_tdata(bfd) \ |
2761 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 2762 | |
0ffa91dd NC |
2763 | #define elf32_arm_local_got_tls_type(bfd) \ |
2764 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
2765 | ||
0855e32b NS |
2766 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
2767 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) | |
2768 | ||
34e77a92 RS |
2769 | #define elf32_arm_local_iplt(bfd) \ |
2770 | (elf_arm_tdata (bfd)->local_iplt) | |
2771 | ||
0ffa91dd NC |
2772 | #define is_arm_elf(bfd) \ |
2773 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
2774 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 2775 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac DJ |
2776 | |
2777 | static bfd_boolean | |
2778 | elf32_arm_mkobject (bfd *abfd) | |
2779 | { | |
0ffa91dd | 2780 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 2781 | ARM_ELF_DATA); |
ba93b8ac DJ |
2782 | } |
2783 | ||
ba93b8ac DJ |
2784 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
2785 | ||
ba96a88f | 2786 | /* Arm ELF linker hash entry. */ |
252b5132 | 2787 | struct elf32_arm_link_hash_entry |
b38cadfb NC |
2788 | { |
2789 | struct elf_link_hash_entry root; | |
252b5132 | 2790 | |
b38cadfb NC |
2791 | /* Track dynamic relocs copied for this symbol. */ |
2792 | struct elf_dyn_relocs *dyn_relocs; | |
b7693d02 | 2793 | |
b38cadfb NC |
2794 | /* ARM-specific PLT information. */ |
2795 | struct arm_plt_info plt; | |
ba93b8ac DJ |
2796 | |
2797 | #define GOT_UNKNOWN 0 | |
2798 | #define GOT_NORMAL 1 | |
2799 | #define GOT_TLS_GD 2 | |
2800 | #define GOT_TLS_IE 4 | |
0855e32b NS |
2801 | #define GOT_TLS_GDESC 8 |
2802 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) | |
b38cadfb | 2803 | unsigned int tls_type : 8; |
34e77a92 | 2804 | |
b38cadfb NC |
2805 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ |
2806 | unsigned int is_iplt : 1; | |
34e77a92 | 2807 | |
b38cadfb | 2808 | unsigned int unused : 23; |
a4fd1a8e | 2809 | |
b38cadfb NC |
2810 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
2811 | starting at the end of the jump table. */ | |
2812 | bfd_vma tlsdesc_got; | |
0855e32b | 2813 | |
b38cadfb NC |
2814 | /* The symbol marking the real symbol location for exported thumb |
2815 | symbols with Arm stubs. */ | |
2816 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 2817 | |
b38cadfb | 2818 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 2819 | symbol. */ |
b38cadfb NC |
2820 | struct elf32_arm_stub_hash_entry *stub_cache; |
2821 | }; | |
252b5132 | 2822 | |
252b5132 | 2823 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
2824 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
2825 | (elf_link_hash_traverse \ | |
2826 | (&(table)->root, \ | |
b7693d02 | 2827 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
2828 | (info))) |
2829 | ||
2830 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
2831 | #define elf32_arm_hash_table(info) \ | |
4dfe6ac6 NC |
2832 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
2833 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) | |
252b5132 | 2834 | |
906e58ca NC |
2835 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
2836 | ((struct elf32_arm_stub_hash_entry *) \ | |
2837 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
2838 | ||
21d799b5 NC |
2839 | /* Array to keep track of which stub sections have been created, and |
2840 | information on stub grouping. */ | |
2841 | struct map_stub | |
2842 | { | |
2843 | /* This is the section to which stubs in the group will be | |
2844 | attached. */ | |
2845 | asection *link_sec; | |
2846 | /* The stub section. */ | |
2847 | asection *stub_sec; | |
2848 | }; | |
2849 | ||
0855e32b NS |
2850 | #define elf32_arm_compute_jump_table_size(htab) \ |
2851 | ((htab)->next_tls_desc_index * 4) | |
2852 | ||
9b485d32 | 2853 | /* ARM ELF linker hash table. */ |
252b5132 | 2854 | struct elf32_arm_link_hash_table |
906e58ca NC |
2855 | { |
2856 | /* The main hash table. */ | |
2857 | struct elf_link_hash_table root; | |
252b5132 | 2858 | |
906e58ca NC |
2859 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
2860 | bfd_size_type thumb_glue_size; | |
252b5132 | 2861 | |
906e58ca NC |
2862 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
2863 | bfd_size_type arm_glue_size; | |
252b5132 | 2864 | |
906e58ca NC |
2865 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
2866 | bfd_size_type bx_glue_size; | |
845b51d6 | 2867 | |
906e58ca NC |
2868 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
2869 | veneer has been populated. */ | |
2870 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 2871 | |
906e58ca NC |
2872 | /* The size in bytes of the section containing glue for VFP11 erratum |
2873 | veneers. */ | |
2874 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 2875 | |
48229727 JB |
2876 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
2877 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
2878 | elf32_arm_write_section(). */ | |
2879 | struct a8_erratum_fix *a8_erratum_fixes; | |
2880 | unsigned int num_a8_erratum_fixes; | |
2881 | ||
906e58ca NC |
2882 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
2883 | bfd * bfd_of_glue_owner; | |
ba96a88f | 2884 | |
906e58ca NC |
2885 | /* Nonzero to output a BE8 image. */ |
2886 | int byteswap_code; | |
e489d0ae | 2887 | |
906e58ca NC |
2888 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
2889 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
2890 | int target1_is_rel; | |
9c504268 | 2891 | |
906e58ca NC |
2892 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
2893 | int target2_reloc; | |
eb043451 | 2894 | |
906e58ca NC |
2895 | /* 0 = Ignore R_ARM_V4BX. |
2896 | 1 = Convert BX to MOV PC. | |
2897 | 2 = Generate v4 interworing stubs. */ | |
2898 | int fix_v4bx; | |
319850b4 | 2899 | |
48229727 JB |
2900 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
2901 | int fix_cortex_a8; | |
2902 | ||
2de70689 MGD |
2903 | /* Whether we should fix the ARM1176 BLX immediate issue. */ |
2904 | int fix_arm1176; | |
2905 | ||
906e58ca NC |
2906 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
2907 | int use_blx; | |
33bfe774 | 2908 | |
906e58ca NC |
2909 | /* What sort of code sequences we should look for which may trigger the |
2910 | VFP11 denorm erratum. */ | |
2911 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 2912 | |
906e58ca NC |
2913 | /* Global counter for the number of fixes we have emitted. */ |
2914 | int num_vfp11_fixes; | |
c7b8f16e | 2915 | |
906e58ca NC |
2916 | /* Nonzero to force PIC branch veneers. */ |
2917 | int pic_veneer; | |
27e55c4d | 2918 | |
906e58ca NC |
2919 | /* The number of bytes in the initial entry in the PLT. */ |
2920 | bfd_size_type plt_header_size; | |
e5a52504 | 2921 | |
906e58ca NC |
2922 | /* The number of bytes in the subsequent PLT etries. */ |
2923 | bfd_size_type plt_entry_size; | |
e5a52504 | 2924 | |
906e58ca NC |
2925 | /* True if the target system is VxWorks. */ |
2926 | int vxworks_p; | |
00a97672 | 2927 | |
906e58ca NC |
2928 | /* True if the target system is Symbian OS. */ |
2929 | int symbian_p; | |
e5a52504 | 2930 | |
b38cadfb NC |
2931 | /* True if the target system is Native Client. */ |
2932 | int nacl_p; | |
2933 | ||
906e58ca NC |
2934 | /* True if the target uses REL relocations. */ |
2935 | int use_rel; | |
4e7fd91e | 2936 | |
0855e32b NS |
2937 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
2938 | bfd_vma next_tls_desc_index; | |
2939 | ||
2940 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ | |
2941 | bfd_vma num_tls_desc; | |
2942 | ||
906e58ca | 2943 | /* Short-cuts to get to dynamic linker sections. */ |
906e58ca NC |
2944 | asection *sdynbss; |
2945 | asection *srelbss; | |
5e681ec4 | 2946 | |
906e58ca NC |
2947 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
2948 | asection *srelplt2; | |
00a97672 | 2949 | |
0855e32b NS |
2950 | /* The offset into splt of the PLT entry for the TLS descriptor |
2951 | resolver. Special values are 0, if not necessary (or not found | |
2952 | to be necessary yet), and -1 if needed but not determined | |
2953 | yet. */ | |
2954 | bfd_vma dt_tlsdesc_plt; | |
2955 | ||
2956 | /* The offset into sgot of the GOT entry used by the PLT entry | |
2957 | above. */ | |
b38cadfb | 2958 | bfd_vma dt_tlsdesc_got; |
0855e32b NS |
2959 | |
2960 | /* Offset in .plt section of tls_arm_trampoline. */ | |
2961 | bfd_vma tls_trampoline; | |
2962 | ||
906e58ca NC |
2963 | /* Data for R_ARM_TLS_LDM32 relocations. */ |
2964 | union | |
2965 | { | |
2966 | bfd_signed_vma refcount; | |
2967 | bfd_vma offset; | |
2968 | } tls_ldm_got; | |
b7693d02 | 2969 | |
87d72d41 AM |
2970 | /* Small local sym cache. */ |
2971 | struct sym_cache sym_cache; | |
906e58ca NC |
2972 | |
2973 | /* For convenience in allocate_dynrelocs. */ | |
2974 | bfd * obfd; | |
2975 | ||
0855e32b NS |
2976 | /* The amount of space used by the reserved portion of the sgotplt |
2977 | section, plus whatever space is used by the jump slots. */ | |
2978 | bfd_vma sgotplt_jump_table_size; | |
2979 | ||
906e58ca NC |
2980 | /* The stub hash table. */ |
2981 | struct bfd_hash_table stub_hash_table; | |
2982 | ||
2983 | /* Linker stub bfd. */ | |
2984 | bfd *stub_bfd; | |
2985 | ||
2986 | /* Linker call-backs. */ | |
2987 | asection * (*add_stub_section) (const char *, asection *); | |
2988 | void (*layout_sections_again) (void); | |
2989 | ||
2990 | /* Array to keep track of which stub sections have been created, and | |
2991 | information on stub grouping. */ | |
21d799b5 | 2992 | struct map_stub *stub_group; |
906e58ca | 2993 | |
fe33d2fa CL |
2994 | /* Number of elements in stub_group. */ |
2995 | int top_id; | |
2996 | ||
906e58ca NC |
2997 | /* Assorted information used by elf32_arm_size_stubs. */ |
2998 | unsigned int bfd_count; | |
2999 | int top_index; | |
3000 | asection **input_list; | |
3001 | }; | |
252b5132 | 3002 | |
780a67af NC |
3003 | /* Create an entry in an ARM ELF linker hash table. */ |
3004 | ||
3005 | static struct bfd_hash_entry * | |
57e8b36a NC |
3006 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
3007 | struct bfd_hash_table * table, | |
3008 | const char * string) | |
780a67af NC |
3009 | { |
3010 | struct elf32_arm_link_hash_entry * ret = | |
3011 | (struct elf32_arm_link_hash_entry *) entry; | |
3012 | ||
3013 | /* Allocate the structure if it has not already been allocated by a | |
3014 | subclass. */ | |
906e58ca | 3015 | if (ret == NULL) |
21d799b5 NC |
3016 | ret = (struct elf32_arm_link_hash_entry *) |
3017 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); | |
57e8b36a | 3018 | if (ret == NULL) |
780a67af NC |
3019 | return (struct bfd_hash_entry *) ret; |
3020 | ||
3021 | /* Call the allocation method of the superclass. */ | |
3022 | ret = ((struct elf32_arm_link_hash_entry *) | |
3023 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
3024 | table, string)); | |
57e8b36a | 3025 | if (ret != NULL) |
b7693d02 | 3026 | { |
0bdcacaf | 3027 | ret->dyn_relocs = NULL; |
ba93b8ac | 3028 | ret->tls_type = GOT_UNKNOWN; |
0855e32b | 3029 | ret->tlsdesc_got = (bfd_vma) -1; |
34e77a92 RS |
3030 | ret->plt.thumb_refcount = 0; |
3031 | ret->plt.maybe_thumb_refcount = 0; | |
3032 | ret->plt.noncall_refcount = 0; | |
3033 | ret->plt.got_offset = -1; | |
3034 | ret->is_iplt = FALSE; | |
a4fd1a8e | 3035 | ret->export_glue = NULL; |
906e58ca NC |
3036 | |
3037 | ret->stub_cache = NULL; | |
b7693d02 | 3038 | } |
780a67af NC |
3039 | |
3040 | return (struct bfd_hash_entry *) ret; | |
3041 | } | |
3042 | ||
34e77a92 RS |
3043 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
3044 | symbols. */ | |
3045 | ||
3046 | static bfd_boolean | |
3047 | elf32_arm_allocate_local_sym_info (bfd *abfd) | |
3048 | { | |
3049 | if (elf_local_got_refcounts (abfd) == NULL) | |
3050 | { | |
3051 | bfd_size_type num_syms; | |
3052 | bfd_size_type size; | |
3053 | char *data; | |
3054 | ||
3055 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; | |
3056 | size = num_syms * (sizeof (bfd_signed_vma) | |
3057 | + sizeof (struct arm_local_iplt_info *) | |
3058 | + sizeof (bfd_vma) | |
3059 | + sizeof (char)); | |
3060 | data = bfd_zalloc (abfd, size); | |
3061 | if (data == NULL) | |
3062 | return FALSE; | |
3063 | ||
3064 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data; | |
3065 | data += num_syms * sizeof (bfd_signed_vma); | |
3066 | ||
3067 | elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data; | |
3068 | data += num_syms * sizeof (struct arm_local_iplt_info *); | |
3069 | ||
3070 | elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data; | |
3071 | data += num_syms * sizeof (bfd_vma); | |
3072 | ||
3073 | elf32_arm_local_got_tls_type (abfd) = data; | |
3074 | } | |
3075 | return TRUE; | |
3076 | } | |
3077 | ||
3078 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs | |
3079 | to input bfd ABFD. Create the information if it doesn't already exist. | |
3080 | Return null if an allocation fails. */ | |
3081 | ||
3082 | static struct arm_local_iplt_info * | |
3083 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) | |
3084 | { | |
3085 | struct arm_local_iplt_info **ptr; | |
3086 | ||
3087 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
3088 | return NULL; | |
3089 | ||
3090 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); | |
3091 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; | |
3092 | if (*ptr == NULL) | |
3093 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); | |
3094 | return *ptr; | |
3095 | } | |
3096 | ||
3097 | /* Try to obtain PLT information for the symbol with index R_SYMNDX | |
3098 | in ABFD's symbol table. If the symbol is global, H points to its | |
3099 | hash table entry, otherwise H is null. | |
3100 | ||
3101 | Return true if the symbol does have PLT information. When returning | |
3102 | true, point *ROOT_PLT at the target-independent reference count/offset | |
3103 | union and *ARM_PLT at the ARM-specific information. */ | |
3104 | ||
3105 | static bfd_boolean | |
3106 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h, | |
3107 | unsigned long r_symndx, union gotplt_union **root_plt, | |
3108 | struct arm_plt_info **arm_plt) | |
3109 | { | |
3110 | struct arm_local_iplt_info *local_iplt; | |
3111 | ||
3112 | if (h != NULL) | |
3113 | { | |
3114 | *root_plt = &h->root.plt; | |
3115 | *arm_plt = &h->plt; | |
3116 | return TRUE; | |
3117 | } | |
3118 | ||
3119 | if (elf32_arm_local_iplt (abfd) == NULL) | |
3120 | return FALSE; | |
3121 | ||
3122 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; | |
3123 | if (local_iplt == NULL) | |
3124 | return FALSE; | |
3125 | ||
3126 | *root_plt = &local_iplt->root; | |
3127 | *arm_plt = &local_iplt->arm; | |
3128 | return TRUE; | |
3129 | } | |
3130 | ||
3131 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub | |
3132 | before it. */ | |
3133 | ||
3134 | static bfd_boolean | |
3135 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, | |
3136 | struct arm_plt_info *arm_plt) | |
3137 | { | |
3138 | struct elf32_arm_link_hash_table *htab; | |
3139 | ||
3140 | htab = elf32_arm_hash_table (info); | |
3141 | return (arm_plt->thumb_refcount != 0 | |
3142 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)); | |
3143 | } | |
3144 | ||
3145 | /* Return a pointer to the head of the dynamic reloc list that should | |
3146 | be used for local symbol ISYM, which is symbol number R_SYMNDX in | |
3147 | ABFD's symbol table. Return null if an error occurs. */ | |
3148 | ||
3149 | static struct elf_dyn_relocs ** | |
3150 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, | |
3151 | Elf_Internal_Sym *isym) | |
3152 | { | |
3153 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) | |
3154 | { | |
3155 | struct arm_local_iplt_info *local_iplt; | |
3156 | ||
3157 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
3158 | if (local_iplt == NULL) | |
3159 | return NULL; | |
3160 | return &local_iplt->dyn_relocs; | |
3161 | } | |
3162 | else | |
3163 | { | |
3164 | /* Track dynamic relocs needed for local syms too. | |
3165 | We really need local syms available to do this | |
3166 | easily. Oh well. */ | |
3167 | asection *s; | |
3168 | void *vpp; | |
3169 | ||
3170 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
3171 | if (s == NULL) | |
3172 | abort (); | |
3173 | ||
3174 | vpp = &elf_section_data (s)->local_dynrel; | |
3175 | return (struct elf_dyn_relocs **) vpp; | |
3176 | } | |
3177 | } | |
3178 | ||
906e58ca NC |
3179 | /* Initialize an entry in the stub hash table. */ |
3180 | ||
3181 | static struct bfd_hash_entry * | |
3182 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
3183 | struct bfd_hash_table *table, | |
3184 | const char *string) | |
3185 | { | |
3186 | /* Allocate the structure if it has not already been allocated by a | |
3187 | subclass. */ | |
3188 | if (entry == NULL) | |
3189 | { | |
21d799b5 NC |
3190 | entry = (struct bfd_hash_entry *) |
3191 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); | |
906e58ca NC |
3192 | if (entry == NULL) |
3193 | return entry; | |
3194 | } | |
3195 | ||
3196 | /* Call the allocation method of the superclass. */ | |
3197 | entry = bfd_hash_newfunc (entry, table, string); | |
3198 | if (entry != NULL) | |
3199 | { | |
3200 | struct elf32_arm_stub_hash_entry *eh; | |
3201 | ||
3202 | /* Initialize the local fields. */ | |
3203 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
3204 | eh->stub_sec = NULL; | |
3205 | eh->stub_offset = 0; | |
3206 | eh->target_value = 0; | |
3207 | eh->target_section = NULL; | |
cedfb179 DK |
3208 | eh->target_addend = 0; |
3209 | eh->orig_insn = 0; | |
906e58ca | 3210 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
3211 | eh->stub_size = 0; |
3212 | eh->stub_template = NULL; | |
3213 | eh->stub_template_size = 0; | |
906e58ca NC |
3214 | eh->h = NULL; |
3215 | eh->id_sec = NULL; | |
d8d2f433 | 3216 | eh->output_name = NULL; |
906e58ca NC |
3217 | } |
3218 | ||
3219 | return entry; | |
3220 | } | |
3221 | ||
00a97672 | 3222 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
3223 | shortcuts to them in our hash table. */ |
3224 | ||
3225 | static bfd_boolean | |
57e8b36a | 3226 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3227 | { |
3228 | struct elf32_arm_link_hash_table *htab; | |
3229 | ||
e5a52504 | 3230 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3231 | if (htab == NULL) |
3232 | return FALSE; | |
3233 | ||
e5a52504 MM |
3234 | /* BPABI objects never have a GOT, or associated sections. */ |
3235 | if (htab->symbian_p) | |
3236 | return TRUE; | |
3237 | ||
5e681ec4 PB |
3238 | if (! _bfd_elf_create_got_section (dynobj, info)) |
3239 | return FALSE; | |
3240 | ||
5e681ec4 PB |
3241 | return TRUE; |
3242 | } | |
3243 | ||
34e77a92 RS |
3244 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
3245 | ||
3246 | static bfd_boolean | |
3247 | create_ifunc_sections (struct bfd_link_info *info) | |
3248 | { | |
3249 | struct elf32_arm_link_hash_table *htab; | |
3250 | const struct elf_backend_data *bed; | |
3251 | bfd *dynobj; | |
3252 | asection *s; | |
3253 | flagword flags; | |
b38cadfb | 3254 | |
34e77a92 RS |
3255 | htab = elf32_arm_hash_table (info); |
3256 | dynobj = htab->root.dynobj; | |
3257 | bed = get_elf_backend_data (dynobj); | |
3258 | flags = bed->dynamic_sec_flags; | |
3259 | ||
3260 | if (htab->root.iplt == NULL) | |
3261 | { | |
3d4d4302 AM |
3262 | s = bfd_make_section_anyway_with_flags (dynobj, ".iplt", |
3263 | flags | SEC_READONLY | SEC_CODE); | |
34e77a92 | 3264 | if (s == NULL |
a0f49396 | 3265 | || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment)) |
34e77a92 RS |
3266 | return FALSE; |
3267 | htab->root.iplt = s; | |
3268 | } | |
3269 | ||
3270 | if (htab->root.irelplt == NULL) | |
3271 | { | |
3d4d4302 AM |
3272 | s = bfd_make_section_anyway_with_flags (dynobj, |
3273 | RELOC_SECTION (htab, ".iplt"), | |
3274 | flags | SEC_READONLY); | |
34e77a92 | 3275 | if (s == NULL |
a0f49396 | 3276 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) |
34e77a92 RS |
3277 | return FALSE; |
3278 | htab->root.irelplt = s; | |
3279 | } | |
3280 | ||
3281 | if (htab->root.igotplt == NULL) | |
3282 | { | |
3d4d4302 | 3283 | s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags); |
34e77a92 RS |
3284 | if (s == NULL |
3285 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) | |
3286 | return FALSE; | |
3287 | htab->root.igotplt = s; | |
3288 | } | |
3289 | return TRUE; | |
3290 | } | |
3291 | ||
00a97672 RS |
3292 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
3293 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
3294 | hash table. */ |
3295 | ||
3296 | static bfd_boolean | |
57e8b36a | 3297 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3298 | { |
3299 | struct elf32_arm_link_hash_table *htab; | |
3300 | ||
3301 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3302 | if (htab == NULL) |
3303 | return FALSE; | |
3304 | ||
362d30a1 | 3305 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
5e681ec4 PB |
3306 | return FALSE; |
3307 | ||
3308 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
3309 | return FALSE; | |
3310 | ||
3d4d4302 | 3311 | htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss"); |
5e681ec4 | 3312 | if (!info->shared) |
3d4d4302 AM |
3313 | htab->srelbss = bfd_get_linker_section (dynobj, |
3314 | RELOC_SECTION (htab, ".bss")); | |
00a97672 RS |
3315 | |
3316 | if (htab->vxworks_p) | |
3317 | { | |
3318 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
3319 | return FALSE; | |
3320 | ||
3321 | if (info->shared) | |
3322 | { | |
3323 | htab->plt_header_size = 0; | |
3324 | htab->plt_entry_size | |
3325 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
3326 | } | |
3327 | else | |
3328 | { | |
3329 | htab->plt_header_size | |
3330 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
3331 | htab->plt_entry_size | |
3332 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
3333 | } | |
3334 | } | |
5e681ec4 | 3335 | |
362d30a1 RS |
3336 | if (!htab->root.splt |
3337 | || !htab->root.srelplt | |
e5a52504 | 3338 | || !htab->sdynbss |
5e681ec4 PB |
3339 | || (!info->shared && !htab->srelbss)) |
3340 | abort (); | |
3341 | ||
3342 | return TRUE; | |
3343 | } | |
3344 | ||
906e58ca NC |
3345 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
3346 | ||
3347 | static void | |
3348 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
3349 | struct elf_link_hash_entry *dir, | |
3350 | struct elf_link_hash_entry *ind) | |
3351 | { | |
3352 | struct elf32_arm_link_hash_entry *edir, *eind; | |
3353 | ||
3354 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
3355 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
3356 | ||
0bdcacaf | 3357 | if (eind->dyn_relocs != NULL) |
906e58ca | 3358 | { |
0bdcacaf | 3359 | if (edir->dyn_relocs != NULL) |
906e58ca | 3360 | { |
0bdcacaf RS |
3361 | struct elf_dyn_relocs **pp; |
3362 | struct elf_dyn_relocs *p; | |
906e58ca NC |
3363 | |
3364 | /* Add reloc counts against the indirect sym to the direct sym | |
3365 | list. Merge any entries against the same section. */ | |
0bdcacaf | 3366 | for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) |
906e58ca | 3367 | { |
0bdcacaf | 3368 | struct elf_dyn_relocs *q; |
906e58ca | 3369 | |
0bdcacaf RS |
3370 | for (q = edir->dyn_relocs; q != NULL; q = q->next) |
3371 | if (q->sec == p->sec) | |
906e58ca NC |
3372 | { |
3373 | q->pc_count += p->pc_count; | |
3374 | q->count += p->count; | |
3375 | *pp = p->next; | |
3376 | break; | |
3377 | } | |
3378 | if (q == NULL) | |
3379 | pp = &p->next; | |
3380 | } | |
0bdcacaf | 3381 | *pp = edir->dyn_relocs; |
906e58ca NC |
3382 | } |
3383 | ||
0bdcacaf RS |
3384 | edir->dyn_relocs = eind->dyn_relocs; |
3385 | eind->dyn_relocs = NULL; | |
906e58ca NC |
3386 | } |
3387 | ||
3388 | if (ind->root.type == bfd_link_hash_indirect) | |
3389 | { | |
3390 | /* Copy over PLT info. */ | |
34e77a92 RS |
3391 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
3392 | eind->plt.thumb_refcount = 0; | |
3393 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; | |
3394 | eind->plt.maybe_thumb_refcount = 0; | |
3395 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; | |
3396 | eind->plt.noncall_refcount = 0; | |
3397 | ||
3398 | /* We should only allocate a function to .iplt once the final | |
3399 | symbol information is known. */ | |
3400 | BFD_ASSERT (!eind->is_iplt); | |
906e58ca NC |
3401 | |
3402 | if (dir->got.refcount <= 0) | |
3403 | { | |
3404 | edir->tls_type = eind->tls_type; | |
3405 | eind->tls_type = GOT_UNKNOWN; | |
3406 | } | |
3407 | } | |
3408 | ||
3409 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
3410 | } | |
3411 | ||
3412 | /* Create an ARM elf linker hash table. */ | |
3413 | ||
3414 | static struct bfd_link_hash_table * | |
3415 | elf32_arm_link_hash_table_create (bfd *abfd) | |
3416 | { | |
3417 | struct elf32_arm_link_hash_table *ret; | |
3418 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); | |
3419 | ||
7bf52ea2 | 3420 | ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt); |
906e58ca NC |
3421 | if (ret == NULL) |
3422 | return NULL; | |
3423 | ||
3424 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
3425 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
3426 | sizeof (struct elf32_arm_link_hash_entry), |
3427 | ARM_ELF_DATA)) | |
906e58ca NC |
3428 | { |
3429 | free (ret); | |
3430 | return NULL; | |
3431 | } | |
3432 | ||
906e58ca | 3433 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
906e58ca NC |
3434 | #ifdef FOUR_WORD_PLT |
3435 | ret->plt_header_size = 16; | |
3436 | ret->plt_entry_size = 16; | |
3437 | #else | |
3438 | ret->plt_header_size = 20; | |
3439 | ret->plt_entry_size = 12; | |
3440 | #endif | |
906e58ca | 3441 | ret->use_rel = 1; |
906e58ca | 3442 | ret->obfd = abfd; |
906e58ca NC |
3443 | |
3444 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
3445 | sizeof (struct elf32_arm_stub_hash_entry))) | |
3446 | { | |
3447 | free (ret); | |
3448 | return NULL; | |
3449 | } | |
3450 | ||
3451 | return &ret->root.root; | |
3452 | } | |
3453 | ||
3454 | /* Free the derived linker hash table. */ | |
3455 | ||
3456 | static void | |
3457 | elf32_arm_hash_table_free (struct bfd_link_hash_table *hash) | |
3458 | { | |
3459 | struct elf32_arm_link_hash_table *ret | |
3460 | = (struct elf32_arm_link_hash_table *) hash; | |
3461 | ||
3462 | bfd_hash_table_free (&ret->stub_hash_table); | |
9f7c3e5e | 3463 | _bfd_elf_link_hash_table_free (hash); |
906e58ca NC |
3464 | } |
3465 | ||
3466 | /* Determine if we're dealing with a Thumb only architecture. */ | |
3467 | ||
3468 | static bfd_boolean | |
3469 | using_thumb_only (struct elf32_arm_link_hash_table *globals) | |
3470 | { | |
3471 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3472 | Tag_CPU_arch); | |
3473 | int profile; | |
3474 | ||
41ed1ee7 DJ |
3475 | if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M) |
3476 | return TRUE; | |
3477 | ||
9e3c6df6 | 3478 | if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M) |
906e58ca NC |
3479 | return FALSE; |
3480 | ||
3481 | profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3482 | Tag_CPU_arch_profile); | |
3483 | ||
3484 | return profile == 'M'; | |
3485 | } | |
3486 | ||
3487 | /* Determine if we're dealing with a Thumb-2 object. */ | |
3488 | ||
3489 | static bfd_boolean | |
3490 | using_thumb2 (struct elf32_arm_link_hash_table *globals) | |
3491 | { | |
3492 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3493 | Tag_CPU_arch); | |
3494 | return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7; | |
3495 | } | |
3496 | ||
cd1dac3d DG |
3497 | /* Determine what kind of NOPs are available. */ |
3498 | ||
3499 | static bfd_boolean | |
3500 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) | |
3501 | { | |
3502 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3503 | Tag_CPU_arch); | |
3504 | return arch == TAG_CPU_ARCH_V6T2 | |
3505 | || arch == TAG_CPU_ARCH_V6K | |
9e3c6df6 PB |
3506 | || arch == TAG_CPU_ARCH_V7 |
3507 | || arch == TAG_CPU_ARCH_V7E_M; | |
cd1dac3d DG |
3508 | } |
3509 | ||
3510 | static bfd_boolean | |
3511 | arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals) | |
3512 | { | |
3513 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3514 | Tag_CPU_arch); | |
9e3c6df6 PB |
3515 | return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7 |
3516 | || arch == TAG_CPU_ARCH_V7E_M); | |
cd1dac3d DG |
3517 | } |
3518 | ||
f4ac8484 DJ |
3519 | static bfd_boolean |
3520 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) | |
3521 | { | |
3522 | switch (stub_type) | |
3523 | { | |
fea2b4d6 CL |
3524 | case arm_stub_long_branch_thumb_only: |
3525 | case arm_stub_long_branch_v4t_thumb_arm: | |
3526 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 | 3527 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
12352d3f | 3528 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
ebe24dd4 | 3529 | case arm_stub_long_branch_thumb_only_pic: |
f4ac8484 DJ |
3530 | return TRUE; |
3531 | case arm_stub_none: | |
3532 | BFD_FAIL (); | |
3533 | return FALSE; | |
3534 | break; | |
3535 | default: | |
3536 | return FALSE; | |
3537 | } | |
3538 | } | |
3539 | ||
906e58ca NC |
3540 | /* Determine the type of stub needed, if any, for a call. */ |
3541 | ||
3542 | static enum elf32_arm_stub_type | |
3543 | arm_type_of_stub (struct bfd_link_info *info, | |
3544 | asection *input_sec, | |
3545 | const Elf_Internal_Rela *rel, | |
34e77a92 | 3546 | unsigned char st_type, |
35fc36a8 | 3547 | enum arm_st_branch_type *actual_branch_type, |
906e58ca | 3548 | struct elf32_arm_link_hash_entry *hash, |
c820be07 NC |
3549 | bfd_vma destination, |
3550 | asection *sym_sec, | |
3551 | bfd *input_bfd, | |
3552 | const char *name) | |
906e58ca NC |
3553 | { |
3554 | bfd_vma location; | |
3555 | bfd_signed_vma branch_offset; | |
3556 | unsigned int r_type; | |
3557 | struct elf32_arm_link_hash_table * globals; | |
3558 | int thumb2; | |
3559 | int thumb_only; | |
3560 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5fa9e92f | 3561 | int use_plt = 0; |
35fc36a8 | 3562 | enum arm_st_branch_type branch_type = *actual_branch_type; |
34e77a92 RS |
3563 | union gotplt_union *root_plt; |
3564 | struct arm_plt_info *arm_plt; | |
906e58ca | 3565 | |
35fc36a8 | 3566 | if (branch_type == ST_BRANCH_LONG) |
da5938a2 NC |
3567 | return stub_type; |
3568 | ||
906e58ca | 3569 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3570 | if (globals == NULL) |
3571 | return stub_type; | |
906e58ca NC |
3572 | |
3573 | thumb_only = using_thumb_only (globals); | |
3574 | ||
3575 | thumb2 = using_thumb2 (globals); | |
3576 | ||
3577 | /* Determine where the call point is. */ | |
3578 | location = (input_sec->output_offset | |
3579 | + input_sec->output_section->vma | |
3580 | + rel->r_offset); | |
3581 | ||
906e58ca NC |
3582 | r_type = ELF32_R_TYPE (rel->r_info); |
3583 | ||
34e77a92 RS |
3584 | /* For TLS call relocs, it is the caller's responsibility to provide |
3585 | the address of the appropriate trampoline. */ | |
3586 | if (r_type != R_ARM_TLS_CALL | |
3587 | && r_type != R_ARM_THM_TLS_CALL | |
3588 | && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info), | |
3589 | &root_plt, &arm_plt) | |
3590 | && root_plt->offset != (bfd_vma) -1) | |
5fa9e92f | 3591 | { |
34e77a92 | 3592 | asection *splt; |
fe33d2fa | 3593 | |
34e77a92 RS |
3594 | if (hash == NULL || hash->is_iplt) |
3595 | splt = globals->root.iplt; | |
3596 | else | |
3597 | splt = globals->root.splt; | |
3598 | if (splt != NULL) | |
b38cadfb | 3599 | { |
34e77a92 RS |
3600 | use_plt = 1; |
3601 | ||
3602 | /* Note when dealing with PLT entries: the main PLT stub is in | |
3603 | ARM mode, so if the branch is in Thumb mode, another | |
3604 | Thumb->ARM stub will be inserted later just before the ARM | |
3605 | PLT stub. We don't take this extra distance into account | |
3606 | here, because if a long branch stub is needed, we'll add a | |
3607 | Thumb->Arm one and branch directly to the ARM PLT entry | |
3608 | because it avoids spreading offset corrections in several | |
3609 | places. */ | |
3610 | ||
3611 | destination = (splt->output_section->vma | |
3612 | + splt->output_offset | |
3613 | + root_plt->offset); | |
3614 | st_type = STT_FUNC; | |
3615 | branch_type = ST_BRANCH_TO_ARM; | |
3616 | } | |
5fa9e92f | 3617 | } |
34e77a92 RS |
3618 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
3619 | BFD_ASSERT (st_type != STT_GNU_IFUNC); | |
906e58ca | 3620 | |
fe33d2fa CL |
3621 | branch_offset = (bfd_signed_vma)(destination - location); |
3622 | ||
0855e32b NS |
3623 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
3624 | || r_type == R_ARM_THM_TLS_CALL) | |
906e58ca | 3625 | { |
5fa9e92f CL |
3626 | /* Handle cases where: |
3627 | - this call goes too far (different Thumb/Thumb2 max | |
3628 | distance) | |
155d87d7 CL |
3629 | - it's a Thumb->Arm call and blx is not available, or it's a |
3630 | Thumb->Arm branch (not bl). A stub is needed in this case, | |
3631 | but only if this call is not through a PLT entry. Indeed, | |
3632 | PLT stubs handle mode switching already. | |
5fa9e92f | 3633 | */ |
906e58ca NC |
3634 | if ((!thumb2 |
3635 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
3636 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
3637 | || (thumb2 | |
3638 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
3639 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
35fc36a8 | 3640 | || (branch_type == ST_BRANCH_TO_ARM |
0855e32b NS |
3641 | && (((r_type == R_ARM_THM_CALL |
3642 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) | |
155d87d7 | 3643 | || (r_type == R_ARM_THM_JUMP24)) |
5fa9e92f | 3644 | && !use_plt)) |
906e58ca | 3645 | { |
35fc36a8 | 3646 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3647 | { |
3648 | /* Thumb to thumb. */ | |
3649 | if (!thumb_only) | |
3650 | { | |
3651 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3652 | /* PIC stubs. */ |
155d87d7 | 3653 | ? ((globals->use_blx |
9553db3c | 3654 | && (r_type == R_ARM_THM_CALL)) |
155d87d7 CL |
3655 | /* V5T and above. Stub starts with ARM code, so |
3656 | we must be able to switch mode before | |
3657 | reaching it, which is only possible for 'bl' | |
3658 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 3659 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 3660 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 3661 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
3662 | |
3663 | /* non-PIC stubs. */ | |
155d87d7 | 3664 | : ((globals->use_blx |
9553db3c | 3665 | && (r_type == R_ARM_THM_CALL)) |
c2b4a39d CL |
3666 | /* V5T and above. */ |
3667 | ? arm_stub_long_branch_any_any | |
3668 | /* V4T. */ | |
d3626fb0 | 3669 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
3670 | } |
3671 | else | |
3672 | { | |
3673 | stub_type = (info->shared | globals->pic_veneer) | |
ebe24dd4 CL |
3674 | /* PIC stub. */ |
3675 | ? arm_stub_long_branch_thumb_only_pic | |
c2b4a39d CL |
3676 | /* non-PIC stub. */ |
3677 | : arm_stub_long_branch_thumb_only; | |
906e58ca NC |
3678 | } |
3679 | } | |
3680 | else | |
3681 | { | |
3682 | /* Thumb to arm. */ | |
c820be07 NC |
3683 | if (sym_sec != NULL |
3684 | && sym_sec->owner != NULL | |
3685 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3686 | { | |
3687 | (*_bfd_error_handler) | |
3688 | (_("%B(%s): warning: interworking not enabled.\n" | |
3689 | " first occurrence: %B: Thumb call to ARM"), | |
3690 | sym_sec->owner, input_bfd, name); | |
3691 | } | |
3692 | ||
0855e32b NS |
3693 | stub_type = |
3694 | (info->shared | globals->pic_veneer) | |
c2b4a39d | 3695 | /* PIC stubs. */ |
0855e32b NS |
3696 | ? (r_type == R_ARM_THM_TLS_CALL |
3697 | /* TLS PIC stubs */ | |
3698 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic | |
3699 | : arm_stub_long_branch_v4t_thumb_tls_pic) | |
3700 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) | |
3701 | /* V5T PIC and above. */ | |
3702 | ? arm_stub_long_branch_any_arm_pic | |
3703 | /* V4T PIC stub. */ | |
3704 | : arm_stub_long_branch_v4t_thumb_arm_pic)) | |
c2b4a39d CL |
3705 | |
3706 | /* non-PIC stubs. */ | |
0855e32b | 3707 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
c2b4a39d CL |
3708 | /* V5T and above. */ |
3709 | ? arm_stub_long_branch_any_any | |
3710 | /* V4T. */ | |
3711 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
3712 | |
3713 | /* Handle v4t short branches. */ | |
fea2b4d6 | 3714 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
3715 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
3716 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 3717 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
3718 | } |
3719 | } | |
3720 | } | |
fe33d2fa CL |
3721 | else if (r_type == R_ARM_CALL |
3722 | || r_type == R_ARM_JUMP24 | |
0855e32b NS |
3723 | || r_type == R_ARM_PLT32 |
3724 | || r_type == R_ARM_TLS_CALL) | |
906e58ca | 3725 | { |
35fc36a8 | 3726 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3727 | { |
3728 | /* Arm to thumb. */ | |
c820be07 NC |
3729 | |
3730 | if (sym_sec != NULL | |
3731 | && sym_sec->owner != NULL | |
3732 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3733 | { | |
3734 | (*_bfd_error_handler) | |
3735 | (_("%B(%s): warning: interworking not enabled.\n" | |
c2b4a39d | 3736 | " first occurrence: %B: ARM call to Thumb"), |
c820be07 NC |
3737 | sym_sec->owner, input_bfd, name); |
3738 | } | |
3739 | ||
3740 | /* We have an extra 2-bytes reach because of | |
3741 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
3742 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
3743 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
0855e32b | 3744 | || (r_type == R_ARM_CALL && !globals->use_blx) |
4116d8d7 PB |
3745 | || (r_type == R_ARM_JUMP24) |
3746 | || (r_type == R_ARM_PLT32)) | |
906e58ca NC |
3747 | { |
3748 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3749 | /* PIC stubs. */ |
ebe24dd4 CL |
3750 | ? ((globals->use_blx) |
3751 | /* V5T and above. */ | |
3752 | ? arm_stub_long_branch_any_thumb_pic | |
3753 | /* V4T stub. */ | |
3754 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
3755 | ||
c2b4a39d CL |
3756 | /* non-PIC stubs. */ |
3757 | : ((globals->use_blx) | |
3758 | /* V5T and above. */ | |
3759 | ? arm_stub_long_branch_any_any | |
3760 | /* V4T. */ | |
3761 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
3762 | } |
3763 | } | |
3764 | else | |
3765 | { | |
3766 | /* Arm to arm. */ | |
3767 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
3768 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
3769 | { | |
0855e32b NS |
3770 | stub_type = |
3771 | (info->shared | globals->pic_veneer) | |
c2b4a39d | 3772 | /* PIC stubs. */ |
0855e32b NS |
3773 | ? (r_type == R_ARM_TLS_CALL |
3774 | /* TLS PIC Stub */ | |
3775 | ? arm_stub_long_branch_any_tls_pic | |
3776 | : arm_stub_long_branch_any_arm_pic) | |
c2b4a39d | 3777 | /* non-PIC stubs. */ |
fea2b4d6 | 3778 | : arm_stub_long_branch_any_any; |
906e58ca NC |
3779 | } |
3780 | } | |
3781 | } | |
3782 | ||
fe33d2fa CL |
3783 | /* If a stub is needed, record the actual destination type. */ |
3784 | if (stub_type != arm_stub_none) | |
35fc36a8 | 3785 | *actual_branch_type = branch_type; |
fe33d2fa | 3786 | |
906e58ca NC |
3787 | return stub_type; |
3788 | } | |
3789 | ||
3790 | /* Build a name for an entry in the stub hash table. */ | |
3791 | ||
3792 | static char * | |
3793 | elf32_arm_stub_name (const asection *input_section, | |
3794 | const asection *sym_sec, | |
3795 | const struct elf32_arm_link_hash_entry *hash, | |
fe33d2fa CL |
3796 | const Elf_Internal_Rela *rel, |
3797 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
3798 | { |
3799 | char *stub_name; | |
3800 | bfd_size_type len; | |
3801 | ||
3802 | if (hash) | |
3803 | { | |
fe33d2fa | 3804 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 3805 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 3806 | if (stub_name != NULL) |
fe33d2fa | 3807 | sprintf (stub_name, "%08x_%s+%x_%d", |
906e58ca NC |
3808 | input_section->id & 0xffffffff, |
3809 | hash->root.root.root.string, | |
fe33d2fa CL |
3810 | (int) rel->r_addend & 0xffffffff, |
3811 | (int) stub_type); | |
906e58ca NC |
3812 | } |
3813 | else | |
3814 | { | |
fe33d2fa | 3815 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 3816 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 3817 | if (stub_name != NULL) |
fe33d2fa | 3818 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
906e58ca NC |
3819 | input_section->id & 0xffffffff, |
3820 | sym_sec->id & 0xffffffff, | |
0855e32b NS |
3821 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
3822 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL | |
3823 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
fe33d2fa CL |
3824 | (int) rel->r_addend & 0xffffffff, |
3825 | (int) stub_type); | |
906e58ca NC |
3826 | } |
3827 | ||
3828 | return stub_name; | |
3829 | } | |
3830 | ||
3831 | /* Look up an entry in the stub hash. Stub entries are cached because | |
3832 | creating the stub name takes a bit of time. */ | |
3833 | ||
3834 | static struct elf32_arm_stub_hash_entry * | |
3835 | elf32_arm_get_stub_entry (const asection *input_section, | |
3836 | const asection *sym_sec, | |
3837 | struct elf_link_hash_entry *hash, | |
3838 | const Elf_Internal_Rela *rel, | |
fe33d2fa CL |
3839 | struct elf32_arm_link_hash_table *htab, |
3840 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
3841 | { |
3842 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3843 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
3844 | const asection *id_sec; | |
3845 | ||
3846 | if ((input_section->flags & SEC_CODE) == 0) | |
3847 | return NULL; | |
3848 | ||
3849 | /* If this input section is part of a group of sections sharing one | |
3850 | stub section, then use the id of the first section in the group. | |
3851 | Stub names need to include a section id, as there may well be | |
3852 | more than one stub used to reach say, printf, and we need to | |
3853 | distinguish between them. */ | |
3854 | id_sec = htab->stub_group[input_section->id].link_sec; | |
3855 | ||
3856 | if (h != NULL && h->stub_cache != NULL | |
3857 | && h->stub_cache->h == h | |
fe33d2fa CL |
3858 | && h->stub_cache->id_sec == id_sec |
3859 | && h->stub_cache->stub_type == stub_type) | |
906e58ca NC |
3860 | { |
3861 | stub_entry = h->stub_cache; | |
3862 | } | |
3863 | else | |
3864 | { | |
3865 | char *stub_name; | |
3866 | ||
fe33d2fa | 3867 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
906e58ca NC |
3868 | if (stub_name == NULL) |
3869 | return NULL; | |
3870 | ||
3871 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
3872 | stub_name, FALSE, FALSE); | |
3873 | if (h != NULL) | |
3874 | h->stub_cache = stub_entry; | |
3875 | ||
3876 | free (stub_name); | |
3877 | } | |
3878 | ||
3879 | return stub_entry; | |
3880 | } | |
3881 | ||
48229727 | 3882 | /* Find or create a stub section. Returns a pointer to the stub section, and |
b38cadfb | 3883 | the section to which the stub section will be attached (in *LINK_SEC_P). |
48229727 | 3884 | LINK_SEC_P may be NULL. */ |
906e58ca | 3885 | |
48229727 JB |
3886 | static asection * |
3887 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
3888 | struct elf32_arm_link_hash_table *htab) | |
906e58ca NC |
3889 | { |
3890 | asection *link_sec; | |
3891 | asection *stub_sec; | |
906e58ca NC |
3892 | |
3893 | link_sec = htab->stub_group[section->id].link_sec; | |
9553db3c | 3894 | BFD_ASSERT (link_sec != NULL); |
906e58ca | 3895 | stub_sec = htab->stub_group[section->id].stub_sec; |
9553db3c | 3896 | |
906e58ca NC |
3897 | if (stub_sec == NULL) |
3898 | { | |
3899 | stub_sec = htab->stub_group[link_sec->id].stub_sec; | |
3900 | if (stub_sec == NULL) | |
3901 | { | |
3902 | size_t namelen; | |
3903 | bfd_size_type len; | |
3904 | char *s_name; | |
3905 | ||
3906 | namelen = strlen (link_sec->name); | |
3907 | len = namelen + sizeof (STUB_SUFFIX); | |
21d799b5 | 3908 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); |
906e58ca NC |
3909 | if (s_name == NULL) |
3910 | return NULL; | |
3911 | ||
3912 | memcpy (s_name, link_sec->name, namelen); | |
3913 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
3914 | stub_sec = (*htab->add_stub_section) (s_name, link_sec); | |
3915 | if (stub_sec == NULL) | |
3916 | return NULL; | |
3917 | htab->stub_group[link_sec->id].stub_sec = stub_sec; | |
3918 | } | |
3919 | htab->stub_group[section->id].stub_sec = stub_sec; | |
3920 | } | |
b38cadfb | 3921 | |
48229727 JB |
3922 | if (link_sec_p) |
3923 | *link_sec_p = link_sec; | |
b38cadfb | 3924 | |
48229727 JB |
3925 | return stub_sec; |
3926 | } | |
3927 | ||
3928 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
3929 | stub entry are initialised. */ | |
3930 | ||
3931 | static struct elf32_arm_stub_hash_entry * | |
3932 | elf32_arm_add_stub (const char *stub_name, | |
3933 | asection *section, | |
3934 | struct elf32_arm_link_hash_table *htab) | |
3935 | { | |
3936 | asection *link_sec; | |
3937 | asection *stub_sec; | |
3938 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3939 | ||
3940 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab); | |
3941 | if (stub_sec == NULL) | |
3942 | return NULL; | |
906e58ca NC |
3943 | |
3944 | /* Enter this entry into the linker stub hash table. */ | |
3945 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
3946 | TRUE, FALSE); | |
3947 | if (stub_entry == NULL) | |
3948 | { | |
3949 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
3950 | section->owner, | |
3951 | stub_name); | |
3952 | return NULL; | |
3953 | } | |
3954 | ||
3955 | stub_entry->stub_sec = stub_sec; | |
3956 | stub_entry->stub_offset = 0; | |
3957 | stub_entry->id_sec = link_sec; | |
3958 | ||
906e58ca NC |
3959 | return stub_entry; |
3960 | } | |
3961 | ||
3962 | /* Store an Arm insn into an output section not processed by | |
3963 | elf32_arm_write_section. */ | |
3964 | ||
3965 | static void | |
8029a119 NC |
3966 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
3967 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
3968 | { |
3969 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
3970 | bfd_putl32 (val, ptr); | |
3971 | else | |
3972 | bfd_putb32 (val, ptr); | |
3973 | } | |
3974 | ||
3975 | /* Store a 16-bit Thumb insn into an output section not processed by | |
3976 | elf32_arm_write_section. */ | |
3977 | ||
3978 | static void | |
8029a119 NC |
3979 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
3980 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
3981 | { |
3982 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
3983 | bfd_putl16 (val, ptr); | |
3984 | else | |
3985 | bfd_putb16 (val, ptr); | |
3986 | } | |
3987 | ||
0855e32b NS |
3988 | /* If it's possible to change R_TYPE to a more efficient access |
3989 | model, return the new reloc type. */ | |
3990 | ||
3991 | static unsigned | |
b38cadfb | 3992 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, |
0855e32b NS |
3993 | struct elf_link_hash_entry *h) |
3994 | { | |
3995 | int is_local = (h == NULL); | |
3996 | ||
3997 | if (info->shared || (h && h->root.type == bfd_link_hash_undefweak)) | |
3998 | return r_type; | |
3999 | ||
b38cadfb | 4000 | /* We do not support relaxations for Old TLS models. */ |
0855e32b NS |
4001 | switch (r_type) |
4002 | { | |
4003 | case R_ARM_TLS_GOTDESC: | |
4004 | case R_ARM_TLS_CALL: | |
4005 | case R_ARM_THM_TLS_CALL: | |
4006 | case R_ARM_TLS_DESCSEQ: | |
4007 | case R_ARM_THM_TLS_DESCSEQ: | |
4008 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; | |
4009 | } | |
4010 | ||
4011 | return r_type; | |
4012 | } | |
4013 | ||
48229727 JB |
4014 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
4015 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
4016 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
34e77a92 RS |
4017 | const char *, unsigned char, enum arm_st_branch_type, |
4018 | struct elf_link_hash_entry *, bfd_boolean *, char **); | |
48229727 | 4019 | |
4563a860 JB |
4020 | static unsigned int |
4021 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) | |
4022 | { | |
4023 | switch (stub_type) | |
4024 | { | |
4025 | case arm_stub_a8_veneer_b_cond: | |
4026 | case arm_stub_a8_veneer_b: | |
4027 | case arm_stub_a8_veneer_bl: | |
4028 | return 2; | |
4029 | ||
4030 | case arm_stub_long_branch_any_any: | |
4031 | case arm_stub_long_branch_v4t_arm_thumb: | |
4032 | case arm_stub_long_branch_thumb_only: | |
4033 | case arm_stub_long_branch_v4t_thumb_thumb: | |
4034 | case arm_stub_long_branch_v4t_thumb_arm: | |
4035 | case arm_stub_short_branch_v4t_thumb_arm: | |
4036 | case arm_stub_long_branch_any_arm_pic: | |
4037 | case arm_stub_long_branch_any_thumb_pic: | |
4038 | case arm_stub_long_branch_v4t_thumb_thumb_pic: | |
4039 | case arm_stub_long_branch_v4t_arm_thumb_pic: | |
4040 | case arm_stub_long_branch_v4t_thumb_arm_pic: | |
4041 | case arm_stub_long_branch_thumb_only_pic: | |
0855e32b NS |
4042 | case arm_stub_long_branch_any_tls_pic: |
4043 | case arm_stub_long_branch_v4t_thumb_tls_pic: | |
4563a860 JB |
4044 | case arm_stub_a8_veneer_blx: |
4045 | return 4; | |
b38cadfb | 4046 | |
4563a860 JB |
4047 | default: |
4048 | abort (); /* Should be unreachable. */ | |
4049 | } | |
4050 | } | |
4051 | ||
906e58ca NC |
4052 | static bfd_boolean |
4053 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, | |
4054 | void * in_arg) | |
4055 | { | |
48229727 | 4056 | #define MAXRELOCS 2 |
906e58ca | 4057 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 4058 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 4059 | struct bfd_link_info *info; |
906e58ca NC |
4060 | asection *stub_sec; |
4061 | bfd *stub_bfd; | |
906e58ca NC |
4062 | bfd_byte *loc; |
4063 | bfd_vma sym_value; | |
4064 | int template_size; | |
4065 | int size; | |
d3ce72d0 | 4066 | const insn_sequence *template_sequence; |
906e58ca | 4067 | int i; |
48229727 JB |
4068 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
4069 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
4070 | int nrelocs = 0; | |
906e58ca NC |
4071 | |
4072 | /* Massage our args to the form they really have. */ | |
4073 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
4074 | info = (struct bfd_link_info *) in_arg; | |
4075 | ||
4076 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
4077 | if (globals == NULL) |
4078 | return FALSE; | |
906e58ca | 4079 | |
906e58ca NC |
4080 | stub_sec = stub_entry->stub_sec; |
4081 | ||
4dfe6ac6 | 4082 | if ((globals->fix_cortex_a8 < 0) |
4563a860 JB |
4083 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
4084 | /* We have to do less-strictly-aligned fixes last. */ | |
eb7c4339 | 4085 | return TRUE; |
fe33d2fa | 4086 | |
906e58ca NC |
4087 | /* Make a note of the offset within the stubs for this entry. */ |
4088 | stub_entry->stub_offset = stub_sec->size; | |
4089 | loc = stub_sec->contents + stub_entry->stub_offset; | |
4090 | ||
4091 | stub_bfd = stub_sec->owner; | |
4092 | ||
906e58ca NC |
4093 | /* This is the address of the stub destination. */ |
4094 | sym_value = (stub_entry->target_value | |
4095 | + stub_entry->target_section->output_offset | |
4096 | + stub_entry->target_section->output_section->vma); | |
4097 | ||
d3ce72d0 | 4098 | template_sequence = stub_entry->stub_template; |
461a49ca | 4099 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
4100 | |
4101 | size = 0; | |
461a49ca | 4102 | for (i = 0; i < template_size; i++) |
906e58ca | 4103 | { |
d3ce72d0 | 4104 | switch (template_sequence[i].type) |
461a49ca DJ |
4105 | { |
4106 | case THUMB16_TYPE: | |
48229727 | 4107 | { |
d3ce72d0 NC |
4108 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
4109 | if (template_sequence[i].reloc_addend != 0) | |
48229727 JB |
4110 | { |
4111 | /* We've borrowed the reloc_addend field to mean we should | |
4112 | insert a condition code into this (Thumb-1 branch) | |
4113 | instruction. See THUMB16_BCOND_INSN. */ | |
4114 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
4115 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
4116 | } | |
fe33d2fa | 4117 | bfd_put_16 (stub_bfd, data, loc + size); |
48229727 JB |
4118 | size += 2; |
4119 | } | |
461a49ca | 4120 | break; |
906e58ca | 4121 | |
48229727 | 4122 | case THUMB32_TYPE: |
fe33d2fa CL |
4123 | bfd_put_16 (stub_bfd, |
4124 | (template_sequence[i].data >> 16) & 0xffff, | |
4125 | loc + size); | |
4126 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, | |
4127 | loc + size + 2); | |
d3ce72d0 | 4128 | if (template_sequence[i].r_type != R_ARM_NONE) |
48229727 JB |
4129 | { |
4130 | stub_reloc_idx[nrelocs] = i; | |
4131 | stub_reloc_offset[nrelocs++] = size; | |
4132 | } | |
4133 | size += 4; | |
4134 | break; | |
4135 | ||
461a49ca | 4136 | case ARM_TYPE: |
fe33d2fa CL |
4137 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
4138 | loc + size); | |
461a49ca DJ |
4139 | /* Handle cases where the target is encoded within the |
4140 | instruction. */ | |
d3ce72d0 | 4141 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 4142 | { |
48229727 JB |
4143 | stub_reloc_idx[nrelocs] = i; |
4144 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4145 | } |
4146 | size += 4; | |
4147 | break; | |
4148 | ||
4149 | case DATA_TYPE: | |
d3ce72d0 | 4150 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
4151 | stub_reloc_idx[nrelocs] = i; |
4152 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4153 | size += 4; |
4154 | break; | |
4155 | ||
4156 | default: | |
4157 | BFD_FAIL (); | |
4158 | return FALSE; | |
4159 | } | |
906e58ca | 4160 | } |
461a49ca | 4161 | |
906e58ca NC |
4162 | stub_sec->size += size; |
4163 | ||
461a49ca DJ |
4164 | /* Stub size has already been computed in arm_size_one_stub. Check |
4165 | consistency. */ | |
4166 | BFD_ASSERT (size == stub_entry->stub_size); | |
4167 | ||
906e58ca | 4168 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
35fc36a8 | 4169 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4170 | sym_value |= 1; |
4171 | ||
48229727 JB |
4172 | /* Assume there is at least one and at most MAXRELOCS entries to relocate |
4173 | in each stub. */ | |
4174 | BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS); | |
c820be07 | 4175 | |
48229727 | 4176 | for (i = 0; i < nrelocs; i++) |
d3ce72d0 NC |
4177 | if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24 |
4178 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19 | |
4179 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL | |
4180 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22) | |
48229727 JB |
4181 | { |
4182 | Elf_Internal_Rela rel; | |
4183 | bfd_boolean unresolved_reloc; | |
4184 | char *error_message; | |
35fc36a8 RS |
4185 | enum arm_st_branch_type branch_type |
4186 | = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22 | |
4187 | ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM); | |
48229727 JB |
4188 | bfd_vma points_to = sym_value + stub_entry->target_addend; |
4189 | ||
4190 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
d3ce72d0 NC |
4191 | rel.r_info = ELF32_R_INFO (0, |
4192 | template_sequence[stub_reloc_idx[i]].r_type); | |
4193 | rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend; | |
48229727 JB |
4194 | |
4195 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
4196 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
4197 | template should refer back to the instruction after the original | |
4198 | branch. */ | |
4199 | points_to = sym_value; | |
4200 | ||
33c6a8fc JB |
4201 | /* There may be unintended consequences if this is not true. */ |
4202 | BFD_ASSERT (stub_entry->h == NULL); | |
4203 | ||
48229727 JB |
4204 | /* Note: _bfd_final_link_relocate doesn't handle these relocations |
4205 | properly. We should probably use this function unconditionally, | |
4206 | rather than only for certain relocations listed in the enclosing | |
4207 | conditional, for the sake of consistency. */ | |
4208 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
d3ce72d0 | 4209 | (template_sequence[stub_reloc_idx[i]].r_type), |
48229727 | 4210 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, |
34e77a92 RS |
4211 | points_to, info, stub_entry->target_section, "", STT_FUNC, |
4212 | branch_type, (struct elf_link_hash_entry *) stub_entry->h, | |
4213 | &unresolved_reloc, &error_message); | |
48229727 JB |
4214 | } |
4215 | else | |
4216 | { | |
fe33d2fa CL |
4217 | Elf_Internal_Rela rel; |
4218 | bfd_boolean unresolved_reloc; | |
4219 | char *error_message; | |
4220 | bfd_vma points_to = sym_value + stub_entry->target_addend | |
4221 | + template_sequence[stub_reloc_idx[i]].reloc_addend; | |
4222 | ||
4223 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
4224 | rel.r_info = ELF32_R_INFO (0, | |
4225 | template_sequence[stub_reloc_idx[i]].r_type); | |
4226 | rel.r_addend = 0; | |
4227 | ||
4228 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
4229 | (template_sequence[stub_reloc_idx[i]].r_type), | |
4230 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, | |
34e77a92 | 4231 | points_to, info, stub_entry->target_section, "", STT_FUNC, |
35fc36a8 | 4232 | stub_entry->branch_type, |
fe33d2fa CL |
4233 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, |
4234 | &error_message); | |
48229727 | 4235 | } |
906e58ca NC |
4236 | |
4237 | return TRUE; | |
48229727 | 4238 | #undef MAXRELOCS |
906e58ca NC |
4239 | } |
4240 | ||
48229727 JB |
4241 | /* Calculate the template, template size and instruction size for a stub. |
4242 | Return value is the instruction size. */ | |
906e58ca | 4243 | |
48229727 JB |
4244 | static unsigned int |
4245 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
4246 | const insn_sequence **stub_template, | |
4247 | int *stub_template_size) | |
906e58ca | 4248 | { |
d3ce72d0 | 4249 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
4250 | int template_size = 0, i; |
4251 | unsigned int size; | |
906e58ca | 4252 | |
d3ce72d0 | 4253 | template_sequence = stub_definitions[stub_type].template_sequence; |
2a229407 AM |
4254 | if (stub_template) |
4255 | *stub_template = template_sequence; | |
4256 | ||
48229727 | 4257 | template_size = stub_definitions[stub_type].template_size; |
2a229407 AM |
4258 | if (stub_template_size) |
4259 | *stub_template_size = template_size; | |
906e58ca NC |
4260 | |
4261 | size = 0; | |
461a49ca DJ |
4262 | for (i = 0; i < template_size; i++) |
4263 | { | |
d3ce72d0 | 4264 | switch (template_sequence[i].type) |
461a49ca DJ |
4265 | { |
4266 | case THUMB16_TYPE: | |
4267 | size += 2; | |
4268 | break; | |
4269 | ||
4270 | case ARM_TYPE: | |
48229727 | 4271 | case THUMB32_TYPE: |
461a49ca DJ |
4272 | case DATA_TYPE: |
4273 | size += 4; | |
4274 | break; | |
4275 | ||
4276 | default: | |
4277 | BFD_FAIL (); | |
2a229407 | 4278 | return 0; |
461a49ca DJ |
4279 | } |
4280 | } | |
4281 | ||
48229727 JB |
4282 | return size; |
4283 | } | |
4284 | ||
4285 | /* As above, but don't actually build the stub. Just bump offset so | |
4286 | we know stub section sizes. */ | |
4287 | ||
4288 | static bfd_boolean | |
4289 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, | |
c7e2358a | 4290 | void *in_arg ATTRIBUTE_UNUSED) |
48229727 JB |
4291 | { |
4292 | struct elf32_arm_stub_hash_entry *stub_entry; | |
d3ce72d0 | 4293 | const insn_sequence *template_sequence; |
48229727 JB |
4294 | int template_size, size; |
4295 | ||
4296 | /* Massage our args to the form they really have. */ | |
4297 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
48229727 JB |
4298 | |
4299 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) | |
4300 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); | |
4301 | ||
d3ce72d0 | 4302 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
4303 | &template_size); |
4304 | ||
461a49ca | 4305 | stub_entry->stub_size = size; |
d3ce72d0 | 4306 | stub_entry->stub_template = template_sequence; |
461a49ca DJ |
4307 | stub_entry->stub_template_size = template_size; |
4308 | ||
906e58ca NC |
4309 | size = (size + 7) & ~7; |
4310 | stub_entry->stub_sec->size += size; | |
461a49ca | 4311 | |
906e58ca NC |
4312 | return TRUE; |
4313 | } | |
4314 | ||
4315 | /* External entry points for sizing and building linker stubs. */ | |
4316 | ||
4317 | /* Set up various things so that we can make a list of input sections | |
4318 | for each output section included in the link. Returns -1 on error, | |
4319 | 0 when no stubs will be needed, and 1 on success. */ | |
4320 | ||
4321 | int | |
4322 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
4323 | struct bfd_link_info *info) | |
4324 | { | |
4325 | bfd *input_bfd; | |
4326 | unsigned int bfd_count; | |
4327 | int top_id, top_index; | |
4328 | asection *section; | |
4329 | asection **input_list, **list; | |
4330 | bfd_size_type amt; | |
4331 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4332 | ||
4dfe6ac6 NC |
4333 | if (htab == NULL) |
4334 | return 0; | |
906e58ca NC |
4335 | if (! is_elf_hash_table (htab)) |
4336 | return 0; | |
4337 | ||
4338 | /* Count the number of input BFDs and find the top input section id. */ | |
4339 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
4340 | input_bfd != NULL; | |
4341 | input_bfd = input_bfd->link_next) | |
4342 | { | |
4343 | bfd_count += 1; | |
4344 | for (section = input_bfd->sections; | |
4345 | section != NULL; | |
4346 | section = section->next) | |
4347 | { | |
4348 | if (top_id < section->id) | |
4349 | top_id = section->id; | |
4350 | } | |
4351 | } | |
4352 | htab->bfd_count = bfd_count; | |
4353 | ||
4354 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 4355 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
4356 | if (htab->stub_group == NULL) |
4357 | return -1; | |
fe33d2fa | 4358 | htab->top_id = top_id; |
906e58ca NC |
4359 | |
4360 | /* We can't use output_bfd->section_count here to find the top output | |
4361 | section index as some sections may have been removed, and | |
4362 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
4363 | for (section = output_bfd->sections, top_index = 0; | |
4364 | section != NULL; | |
4365 | section = section->next) | |
4366 | { | |
4367 | if (top_index < section->index) | |
4368 | top_index = section->index; | |
4369 | } | |
4370 | ||
4371 | htab->top_index = top_index; | |
4372 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 4373 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
4374 | htab->input_list = input_list; |
4375 | if (input_list == NULL) | |
4376 | return -1; | |
4377 | ||
4378 | /* For sections we aren't interested in, mark their entries with a | |
4379 | value we can check later. */ | |
4380 | list = input_list + top_index; | |
4381 | do | |
4382 | *list = bfd_abs_section_ptr; | |
4383 | while (list-- != input_list); | |
4384 | ||
4385 | for (section = output_bfd->sections; | |
4386 | section != NULL; | |
4387 | section = section->next) | |
4388 | { | |
4389 | if ((section->flags & SEC_CODE) != 0) | |
4390 | input_list[section->index] = NULL; | |
4391 | } | |
4392 | ||
4393 | return 1; | |
4394 | } | |
4395 | ||
4396 | /* The linker repeatedly calls this function for each input section, | |
4397 | in the order that input sections are linked into output sections. | |
4398 | Build lists of input sections to determine groupings between which | |
4399 | we may insert linker stubs. */ | |
4400 | ||
4401 | void | |
4402 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
4403 | asection *isec) | |
4404 | { | |
4405 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4406 | ||
4dfe6ac6 NC |
4407 | if (htab == NULL) |
4408 | return; | |
4409 | ||
906e58ca NC |
4410 | if (isec->output_section->index <= htab->top_index) |
4411 | { | |
4412 | asection **list = htab->input_list + isec->output_section->index; | |
4413 | ||
a7470592 | 4414 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
4415 | { |
4416 | /* Steal the link_sec pointer for our list. */ | |
4417 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
4418 | /* This happens to make the list in reverse order, | |
07d72278 | 4419 | which we reverse later. */ |
906e58ca NC |
4420 | PREV_SEC (isec) = *list; |
4421 | *list = isec; | |
4422 | } | |
4423 | } | |
4424 | } | |
4425 | ||
4426 | /* See whether we can group stub sections together. Grouping stub | |
4427 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 4428 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
4429 | .fini output sections respectively, because glibc splits the |
4430 | _init and _fini functions into multiple parts. Putting a stub in | |
4431 | the middle of a function is not a good idea. */ | |
4432 | ||
4433 | static void | |
4434 | group_sections (struct elf32_arm_link_hash_table *htab, | |
4435 | bfd_size_type stub_group_size, | |
07d72278 | 4436 | bfd_boolean stubs_always_after_branch) |
906e58ca | 4437 | { |
07d72278 | 4438 | asection **list = htab->input_list; |
906e58ca NC |
4439 | |
4440 | do | |
4441 | { | |
4442 | asection *tail = *list; | |
07d72278 | 4443 | asection *head; |
906e58ca NC |
4444 | |
4445 | if (tail == bfd_abs_section_ptr) | |
4446 | continue; | |
4447 | ||
07d72278 DJ |
4448 | /* Reverse the list: we must avoid placing stubs at the |
4449 | beginning of the section because the beginning of the text | |
4450 | section may be required for an interrupt vector in bare metal | |
4451 | code. */ | |
4452 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
4453 | head = NULL; |
4454 | while (tail != NULL) | |
4455 | { | |
4456 | /* Pop from tail. */ | |
4457 | asection *item = tail; | |
4458 | tail = PREV_SEC (item); | |
4459 | ||
4460 | /* Push on head. */ | |
4461 | NEXT_SEC (item) = head; | |
4462 | head = item; | |
4463 | } | |
07d72278 DJ |
4464 | |
4465 | while (head != NULL) | |
906e58ca NC |
4466 | { |
4467 | asection *curr; | |
07d72278 | 4468 | asection *next; |
e780aef2 CL |
4469 | bfd_vma stub_group_start = head->output_offset; |
4470 | bfd_vma end_of_next; | |
906e58ca | 4471 | |
07d72278 | 4472 | curr = head; |
e780aef2 | 4473 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 4474 | { |
e780aef2 CL |
4475 | next = NEXT_SEC (curr); |
4476 | end_of_next = next->output_offset + next->size; | |
4477 | if (end_of_next - stub_group_start >= stub_group_size) | |
4478 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 4479 | break; |
e780aef2 CL |
4480 | /* Add NEXT to the group. */ |
4481 | curr = next; | |
8cd931b7 | 4482 | } |
906e58ca | 4483 | |
07d72278 | 4484 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 4485 | than stub_group_size and thus can be handled by one stub |
07d72278 | 4486 | section. (Or the head section is itself larger than |
906e58ca NC |
4487 | stub_group_size, in which case we may be toast.) |
4488 | We should really be keeping track of the total size of | |
4489 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 4490 | section size. */ |
906e58ca NC |
4491 | do |
4492 | { | |
07d72278 | 4493 | next = NEXT_SEC (head); |
906e58ca | 4494 | /* Set up this stub group. */ |
07d72278 | 4495 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 4496 | } |
07d72278 | 4497 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
4498 | |
4499 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
4500 | bytes after the stub section can be handled by it too. */ |
4501 | if (!stubs_always_after_branch) | |
906e58ca | 4502 | { |
e780aef2 CL |
4503 | stub_group_start = curr->output_offset + curr->size; |
4504 | ||
8cd931b7 | 4505 | while (next != NULL) |
906e58ca | 4506 | { |
e780aef2 CL |
4507 | end_of_next = next->output_offset + next->size; |
4508 | if (end_of_next - stub_group_start >= stub_group_size) | |
4509 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 4510 | break; |
e780aef2 | 4511 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
4512 | head = next; |
4513 | next = NEXT_SEC (head); | |
4514 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
4515 | } |
4516 | } | |
07d72278 | 4517 | head = next; |
906e58ca NC |
4518 | } |
4519 | } | |
07d72278 | 4520 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
4521 | |
4522 | free (htab->input_list); | |
4523 | #undef PREV_SEC | |
07d72278 | 4524 | #undef NEXT_SEC |
906e58ca NC |
4525 | } |
4526 | ||
48229727 JB |
4527 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
4528 | erratum fix. */ | |
4529 | ||
4530 | static int | |
4531 | a8_reloc_compare (const void *a, const void *b) | |
4532 | { | |
21d799b5 NC |
4533 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
4534 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
4535 | |
4536 | if (ra->from < rb->from) | |
4537 | return -1; | |
4538 | else if (ra->from > rb->from) | |
4539 | return 1; | |
4540 | else | |
4541 | return 0; | |
4542 | } | |
4543 | ||
4544 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
4545 | const char *, char **); | |
4546 | ||
4547 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
4548 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 4549 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
4550 | otherwise. */ |
4551 | ||
81694485 NC |
4552 | static bfd_boolean |
4553 | cortex_a8_erratum_scan (bfd *input_bfd, | |
4554 | struct bfd_link_info *info, | |
48229727 JB |
4555 | struct a8_erratum_fix **a8_fixes_p, |
4556 | unsigned int *num_a8_fixes_p, | |
4557 | unsigned int *a8_fix_table_size_p, | |
4558 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
4559 | unsigned int num_a8_relocs, |
4560 | unsigned prev_num_a8_fixes, | |
4561 | bfd_boolean *stub_changed_p) | |
48229727 JB |
4562 | { |
4563 | asection *section; | |
4564 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4565 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
4566 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
4567 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
4568 | ||
4dfe6ac6 NC |
4569 | if (htab == NULL) |
4570 | return FALSE; | |
4571 | ||
48229727 JB |
4572 | for (section = input_bfd->sections; |
4573 | section != NULL; | |
4574 | section = section->next) | |
4575 | { | |
4576 | bfd_byte *contents = NULL; | |
4577 | struct _arm_elf_section_data *sec_data; | |
4578 | unsigned int span; | |
4579 | bfd_vma base_vma; | |
4580 | ||
4581 | if (elf_section_type (section) != SHT_PROGBITS | |
4582 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 | |
4583 | || (section->flags & SEC_EXCLUDE) != 0 | |
dbaa2011 | 4584 | || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS) |
48229727 JB |
4585 | || (section->output_section == bfd_abs_section_ptr)) |
4586 | continue; | |
4587 | ||
4588 | base_vma = section->output_section->vma + section->output_offset; | |
4589 | ||
4590 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
4591 | contents = elf_section_data (section)->this_hdr.contents; | |
4592 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) | |
81694485 | 4593 | return TRUE; |
48229727 JB |
4594 | |
4595 | sec_data = elf32_arm_section_data (section); | |
4596 | ||
4597 | for (span = 0; span < sec_data->mapcount; span++) | |
4598 | { | |
4599 | unsigned int span_start = sec_data->map[span].vma; | |
4600 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
4601 | ? section->size : sec_data->map[span + 1].vma; | |
4602 | unsigned int i; | |
4603 | char span_type = sec_data->map[span].type; | |
4604 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; | |
4605 | ||
4606 | if (span_type != 't') | |
4607 | continue; | |
4608 | ||
4609 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
4610 | if (((base_vma + span_start) & ~0xfff) | |
4611 | == ((base_vma + span_end) & ~0xfff)) | |
4612 | continue; | |
4613 | ||
4614 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
4615 | ||
4616 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
4617 | * The branch target is in the same 4KB region as the | |
4618 | first half of the branch. | |
4619 | * The instruction before the branch is a 32-bit | |
81694485 | 4620 | length non-branch instruction. */ |
48229727 JB |
4621 | for (i = span_start; i < span_end;) |
4622 | { | |
4623 | unsigned int insn = bfd_getl16 (&contents[i]); | |
4624 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; | |
4625 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; | |
4626 | ||
4627 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
4628 | insn_32bit = TRUE; | |
4629 | ||
4630 | if (insn_32bit) | |
4631 | { | |
4632 | /* Load the rest of the insn (in manual-friendly order). */ | |
4633 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
4634 | ||
4635 | /* Encoding T4: B<c>.W. */ | |
4636 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
4637 | /* Encoding T1: BL<c>.W. */ | |
4638 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
4639 | /* Encoding T2: BLX<c>.W. */ | |
4640 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
4641 | /* Encoding T3: B<c>.W (not permitted in IT block). */ | |
4642 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
4643 | && (insn & 0x07f00000) != 0x03800000; | |
4644 | } | |
4645 | ||
4646 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
fe33d2fa | 4647 | |
81694485 NC |
4648 | if (((base_vma + i) & 0xfff) == 0xffe |
4649 | && insn_32bit | |
4650 | && is_32bit_branch | |
4651 | && last_was_32bit | |
4652 | && ! last_was_branch) | |
48229727 | 4653 | { |
8f73510c | 4654 | bfd_signed_vma offset = 0; |
48229727 JB |
4655 | bfd_boolean force_target_arm = FALSE; |
4656 | bfd_boolean force_target_thumb = FALSE; | |
4657 | bfd_vma target; | |
4658 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
4659 | struct a8_erratum_reloc key, *found; | |
7d24e6a6 | 4660 | bfd_boolean use_plt = FALSE; |
48229727 JB |
4661 | |
4662 | key.from = base_vma + i; | |
21d799b5 NC |
4663 | found = (struct a8_erratum_reloc *) |
4664 | bsearch (&key, a8_relocs, num_a8_relocs, | |
4665 | sizeof (struct a8_erratum_reloc), | |
4666 | &a8_reloc_compare); | |
48229727 JB |
4667 | |
4668 | if (found) | |
4669 | { | |
4670 | char *error_message = NULL; | |
4671 | struct elf_link_hash_entry *entry; | |
4672 | ||
4673 | /* We don't care about the error returned from this | |
4674 | function, only if there is glue or not. */ | |
4675 | entry = find_thumb_glue (info, found->sym_name, | |
4676 | &error_message); | |
4677 | ||
4678 | if (entry) | |
4679 | found->non_a8_stub = TRUE; | |
4680 | ||
92750f34 | 4681 | /* Keep a simpler condition, for the sake of clarity. */ |
362d30a1 | 4682 | if (htab->root.splt != NULL && found->hash != NULL |
92750f34 DJ |
4683 | && found->hash->root.plt.offset != (bfd_vma) -1) |
4684 | use_plt = TRUE; | |
4685 | ||
4686 | if (found->r_type == R_ARM_THM_CALL) | |
4687 | { | |
35fc36a8 RS |
4688 | if (found->branch_type == ST_BRANCH_TO_ARM |
4689 | || use_plt) | |
92750f34 DJ |
4690 | force_target_arm = TRUE; |
4691 | else | |
4692 | force_target_thumb = TRUE; | |
4693 | } | |
48229727 JB |
4694 | } |
4695 | ||
4696 | /* Check if we have an offending branch instruction. */ | |
4697 | ||
4698 | if (found && found->non_a8_stub) | |
4699 | /* We've already made a stub for this instruction, e.g. | |
4700 | it's a long branch or a Thumb->ARM stub. Assume that | |
4701 | stub will suffice to work around the A8 erratum (see | |
4702 | setting of always_after_branch above). */ | |
4703 | ; | |
4704 | else if (is_bcc) | |
4705 | { | |
4706 | offset = (insn & 0x7ff) << 1; | |
4707 | offset |= (insn & 0x3f0000) >> 4; | |
4708 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
4709 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
4710 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
4711 | if (offset & 0x100000) | |
81694485 | 4712 | offset |= ~ ((bfd_signed_vma) 0xfffff); |
48229727 JB |
4713 | stub_type = arm_stub_a8_veneer_b_cond; |
4714 | } | |
4715 | else if (is_b || is_bl || is_blx) | |
4716 | { | |
4717 | int s = (insn & 0x4000000) != 0; | |
4718 | int j1 = (insn & 0x2000) != 0; | |
4719 | int j2 = (insn & 0x800) != 0; | |
4720 | int i1 = !(j1 ^ s); | |
4721 | int i2 = !(j2 ^ s); | |
4722 | ||
4723 | offset = (insn & 0x7ff) << 1; | |
4724 | offset |= (insn & 0x3ff0000) >> 4; | |
4725 | offset |= i2 << 22; | |
4726 | offset |= i1 << 23; | |
4727 | offset |= s << 24; | |
4728 | if (offset & 0x1000000) | |
81694485 | 4729 | offset |= ~ ((bfd_signed_vma) 0xffffff); |
48229727 JB |
4730 | |
4731 | if (is_blx) | |
81694485 | 4732 | offset &= ~ ((bfd_signed_vma) 3); |
48229727 JB |
4733 | |
4734 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
4735 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
4736 | } | |
4737 | ||
4738 | if (stub_type != arm_stub_none) | |
4739 | { | |
4740 | bfd_vma pc_for_insn = base_vma + i + 4; | |
4741 | ||
4742 | /* The original instruction is a BL, but the target is | |
4743 | an ARM instruction. If we were not making a stub, | |
4744 | the BL would have been converted to a BLX. Use the | |
4745 | BLX stub instead in that case. */ | |
4746 | if (htab->use_blx && force_target_arm | |
4747 | && stub_type == arm_stub_a8_veneer_bl) | |
4748 | { | |
4749 | stub_type = arm_stub_a8_veneer_blx; | |
4750 | is_blx = TRUE; | |
4751 | is_bl = FALSE; | |
4752 | } | |
4753 | /* Conversely, if the original instruction was | |
4754 | BLX but the target is Thumb mode, use the BL | |
4755 | stub. */ | |
4756 | else if (force_target_thumb | |
4757 | && stub_type == arm_stub_a8_veneer_blx) | |
4758 | { | |
4759 | stub_type = arm_stub_a8_veneer_bl; | |
4760 | is_blx = FALSE; | |
4761 | is_bl = TRUE; | |
4762 | } | |
4763 | ||
4764 | if (is_blx) | |
81694485 | 4765 | pc_for_insn &= ~ ((bfd_vma) 3); |
48229727 JB |
4766 | |
4767 | /* If we found a relocation, use the proper destination, | |
4768 | not the offset in the (unrelocated) instruction. | |
4769 | Note this is always done if we switched the stub type | |
4770 | above. */ | |
4771 | if (found) | |
81694485 NC |
4772 | offset = |
4773 | (bfd_signed_vma) (found->destination - pc_for_insn); | |
48229727 | 4774 | |
7d24e6a6 RS |
4775 | /* If the stub will use a Thumb-mode branch to a |
4776 | PLT target, redirect it to the preceding Thumb | |
4777 | entry point. */ | |
4778 | if (stub_type != arm_stub_a8_veneer_blx && use_plt) | |
4779 | offset -= PLT_THUMB_STUB_SIZE; | |
4780 | ||
48229727 JB |
4781 | target = pc_for_insn + offset; |
4782 | ||
4783 | /* The BLX stub is ARM-mode code. Adjust the offset to | |
4784 | take the different PC value (+8 instead of +4) into | |
4785 | account. */ | |
4786 | if (stub_type == arm_stub_a8_veneer_blx) | |
4787 | offset += 4; | |
4788 | ||
4789 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
4790 | { | |
eb7c4339 | 4791 | char *stub_name = NULL; |
48229727 JB |
4792 | |
4793 | if (num_a8_fixes == a8_fix_table_size) | |
4794 | { | |
4795 | a8_fix_table_size *= 2; | |
21d799b5 NC |
4796 | a8_fixes = (struct a8_erratum_fix *) |
4797 | bfd_realloc (a8_fixes, | |
4798 | sizeof (struct a8_erratum_fix) | |
4799 | * a8_fix_table_size); | |
48229727 JB |
4800 | } |
4801 | ||
eb7c4339 NS |
4802 | if (num_a8_fixes < prev_num_a8_fixes) |
4803 | { | |
4804 | /* If we're doing a subsequent scan, | |
4805 | check if we've found the same fix as | |
4806 | before, and try and reuse the stub | |
4807 | name. */ | |
4808 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
4809 | if ((a8_fixes[num_a8_fixes].section != section) | |
4810 | || (a8_fixes[num_a8_fixes].offset != i)) | |
4811 | { | |
4812 | free (stub_name); | |
4813 | stub_name = NULL; | |
4814 | *stub_changed_p = TRUE; | |
4815 | } | |
4816 | } | |
4817 | ||
4818 | if (!stub_name) | |
4819 | { | |
21d799b5 | 4820 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
4821 | if (stub_name != NULL) |
4822 | sprintf (stub_name, "%x:%x", section->id, i); | |
4823 | } | |
48229727 JB |
4824 | |
4825 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; | |
4826 | a8_fixes[num_a8_fixes].section = section; | |
4827 | a8_fixes[num_a8_fixes].offset = i; | |
4828 | a8_fixes[num_a8_fixes].addend = offset; | |
4829 | a8_fixes[num_a8_fixes].orig_insn = insn; | |
4830 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
4831 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
35fc36a8 RS |
4832 | a8_fixes[num_a8_fixes].branch_type = |
4833 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; | |
48229727 JB |
4834 | |
4835 | num_a8_fixes++; | |
4836 | } | |
4837 | } | |
4838 | } | |
4839 | ||
4840 | i += insn_32bit ? 4 : 2; | |
4841 | last_was_32bit = insn_32bit; | |
4842 | last_was_branch = is_32bit_branch; | |
4843 | } | |
4844 | } | |
4845 | ||
4846 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
4847 | free (contents); | |
4848 | } | |
fe33d2fa | 4849 | |
48229727 JB |
4850 | *a8_fixes_p = a8_fixes; |
4851 | *num_a8_fixes_p = num_a8_fixes; | |
4852 | *a8_fix_table_size_p = a8_fix_table_size; | |
fe33d2fa | 4853 | |
81694485 | 4854 | return FALSE; |
48229727 JB |
4855 | } |
4856 | ||
906e58ca NC |
4857 | /* Determine and set the size of the stub section for a final link. |
4858 | ||
4859 | The basic idea here is to examine all the relocations looking for | |
4860 | PC-relative calls to a target that is unreachable with a "bl" | |
4861 | instruction. */ | |
4862 | ||
4863 | bfd_boolean | |
4864 | elf32_arm_size_stubs (bfd *output_bfd, | |
4865 | bfd *stub_bfd, | |
4866 | struct bfd_link_info *info, | |
4867 | bfd_signed_vma group_size, | |
4868 | asection * (*add_stub_section) (const char *, asection *), | |
4869 | void (*layout_sections_again) (void)) | |
4870 | { | |
4871 | bfd_size_type stub_group_size; | |
07d72278 | 4872 | bfd_boolean stubs_always_after_branch; |
906e58ca | 4873 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 4874 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 4875 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
4876 | struct a8_erratum_reloc *a8_relocs = NULL; |
4877 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
4878 | ||
4dfe6ac6 NC |
4879 | if (htab == NULL) |
4880 | return FALSE; | |
4881 | ||
48229727 JB |
4882 | if (htab->fix_cortex_a8) |
4883 | { | |
21d799b5 NC |
4884 | a8_fixes = (struct a8_erratum_fix *) |
4885 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); | |
4886 | a8_relocs = (struct a8_erratum_reloc *) | |
4887 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); | |
48229727 | 4888 | } |
906e58ca NC |
4889 | |
4890 | /* Propagate mach to stub bfd, because it may not have been | |
4891 | finalized when we created stub_bfd. */ | |
4892 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
4893 | bfd_get_mach (output_bfd)); | |
4894 | ||
4895 | /* Stash our params away. */ | |
4896 | htab->stub_bfd = stub_bfd; | |
4897 | htab->add_stub_section = add_stub_section; | |
4898 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 4899 | stubs_always_after_branch = group_size < 0; |
48229727 JB |
4900 | |
4901 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page | |
4902 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
4903 | crude way of enforcing that. */ | |
4904 | if (htab->fix_cortex_a8) | |
4905 | stubs_always_after_branch = 1; | |
4906 | ||
906e58ca NC |
4907 | if (group_size < 0) |
4908 | stub_group_size = -group_size; | |
4909 | else | |
4910 | stub_group_size = group_size; | |
4911 | ||
4912 | if (stub_group_size == 1) | |
4913 | { | |
4914 | /* Default values. */ | |
4915 | /* Thumb branch range is +-4MB has to be used as the default | |
4916 | maximum size (a given section can contain both ARM and Thumb | |
4917 | code, so the worst case has to be taken into account). | |
4918 | ||
4919 | This value is 24K less than that, which allows for 2025 | |
4920 | 12-byte stubs. If we exceed that, then we will fail to link. | |
4921 | The user will have to relink with an explicit group size | |
4922 | option. */ | |
4923 | stub_group_size = 4170000; | |
4924 | } | |
4925 | ||
07d72278 | 4926 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 4927 | |
3ae046cc NS |
4928 | /* If we're applying the cortex A8 fix, we need to determine the |
4929 | program header size now, because we cannot change it later -- | |
4930 | that could alter section placements. Notice the A8 erratum fix | |
4931 | ends up requiring the section addresses to remain unchanged | |
4932 | modulo the page size. That's something we cannot represent | |
4933 | inside BFD, and we don't want to force the section alignment to | |
4934 | be the page size. */ | |
4935 | if (htab->fix_cortex_a8) | |
4936 | (*htab->layout_sections_again) (); | |
4937 | ||
906e58ca NC |
4938 | while (1) |
4939 | { | |
4940 | bfd *input_bfd; | |
4941 | unsigned int bfd_indx; | |
4942 | asection *stub_sec; | |
eb7c4339 NS |
4943 | bfd_boolean stub_changed = FALSE; |
4944 | unsigned prev_num_a8_fixes = num_a8_fixes; | |
906e58ca | 4945 | |
48229727 | 4946 | num_a8_fixes = 0; |
906e58ca NC |
4947 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
4948 | input_bfd != NULL; | |
4949 | input_bfd = input_bfd->link_next, bfd_indx++) | |
4950 | { | |
4951 | Elf_Internal_Shdr *symtab_hdr; | |
4952 | asection *section; | |
4953 | Elf_Internal_Sym *local_syms = NULL; | |
4954 | ||
adbcc655 RM |
4955 | if (!is_arm_elf (input_bfd)) |
4956 | continue; | |
4957 | ||
48229727 JB |
4958 | num_a8_relocs = 0; |
4959 | ||
906e58ca NC |
4960 | /* We'll need the symbol table in a second. */ |
4961 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
4962 | if (symtab_hdr->sh_info == 0) | |
4963 | continue; | |
4964 | ||
4965 | /* Walk over each section attached to the input bfd. */ | |
4966 | for (section = input_bfd->sections; | |
4967 | section != NULL; | |
4968 | section = section->next) | |
4969 | { | |
4970 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
4971 | ||
4972 | /* If there aren't any relocs, then there's nothing more | |
4973 | to do. */ | |
4974 | if ((section->flags & SEC_RELOC) == 0 | |
4975 | || section->reloc_count == 0 | |
4976 | || (section->flags & SEC_CODE) == 0) | |
4977 | continue; | |
4978 | ||
4979 | /* If this section is a link-once section that will be | |
4980 | discarded, then don't create any stubs. */ | |
4981 | if (section->output_section == NULL | |
4982 | || section->output_section->owner != output_bfd) | |
4983 | continue; | |
4984 | ||
4985 | /* Get the relocs. */ | |
4986 | internal_relocs | |
4987 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
4988 | NULL, info->keep_memory); | |
4989 | if (internal_relocs == NULL) | |
4990 | goto error_ret_free_local; | |
4991 | ||
4992 | /* Now examine each relocation. */ | |
4993 | irela = internal_relocs; | |
4994 | irelaend = irela + section->reloc_count; | |
4995 | for (; irela < irelaend; irela++) | |
4996 | { | |
4997 | unsigned int r_type, r_indx; | |
4998 | enum elf32_arm_stub_type stub_type; | |
4999 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5000 | asection *sym_sec; | |
5001 | bfd_vma sym_value; | |
5002 | bfd_vma destination; | |
5003 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 5004 | const char *sym_name; |
906e58ca NC |
5005 | char *stub_name; |
5006 | const asection *id_sec; | |
34e77a92 | 5007 | unsigned char st_type; |
35fc36a8 | 5008 | enum arm_st_branch_type branch_type; |
48229727 | 5009 | bfd_boolean created_stub = FALSE; |
906e58ca NC |
5010 | |
5011 | r_type = ELF32_R_TYPE (irela->r_info); | |
5012 | r_indx = ELF32_R_SYM (irela->r_info); | |
5013 | ||
5014 | if (r_type >= (unsigned int) R_ARM_max) | |
5015 | { | |
5016 | bfd_set_error (bfd_error_bad_value); | |
5017 | error_ret_free_internal: | |
5018 | if (elf_section_data (section)->relocs == NULL) | |
5019 | free (internal_relocs); | |
5020 | goto error_ret_free_local; | |
5021 | } | |
b38cadfb | 5022 | |
0855e32b NS |
5023 | hash = NULL; |
5024 | if (r_indx >= symtab_hdr->sh_info) | |
5025 | hash = elf32_arm_hash_entry | |
5026 | (elf_sym_hashes (input_bfd) | |
5027 | [r_indx - symtab_hdr->sh_info]); | |
b38cadfb | 5028 | |
0855e32b NS |
5029 | /* Only look for stubs on branch instructions, or |
5030 | non-relaxed TLSCALL */ | |
906e58ca | 5031 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
5032 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
5033 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
5034 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
5035 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 | 5036 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
0855e32b NS |
5037 | && (r_type != (unsigned int) R_ARM_PLT32) |
5038 | && !((r_type == (unsigned int) R_ARM_TLS_CALL | |
5039 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
5040 | && r_type == elf32_arm_tls_transition | |
5041 | (info, r_type, &hash->root) | |
5042 | && ((hash ? hash->tls_type | |
5043 | : (elf32_arm_local_got_tls_type | |
5044 | (input_bfd)[r_indx])) | |
5045 | & GOT_TLS_GDESC) != 0)) | |
906e58ca NC |
5046 | continue; |
5047 | ||
5048 | /* Now determine the call target, its name, value, | |
5049 | section. */ | |
5050 | sym_sec = NULL; | |
5051 | sym_value = 0; | |
5052 | destination = 0; | |
7413f23f | 5053 | sym_name = NULL; |
b38cadfb | 5054 | |
0855e32b NS |
5055 | if (r_type == (unsigned int) R_ARM_TLS_CALL |
5056 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
5057 | { | |
5058 | /* A non-relaxed TLS call. The target is the | |
5059 | plt-resident trampoline and nothing to do | |
5060 | with the symbol. */ | |
5061 | BFD_ASSERT (htab->tls_trampoline > 0); | |
5062 | sym_sec = htab->root.splt; | |
5063 | sym_value = htab->tls_trampoline; | |
5064 | hash = 0; | |
34e77a92 | 5065 | st_type = STT_FUNC; |
35fc36a8 | 5066 | branch_type = ST_BRANCH_TO_ARM; |
0855e32b NS |
5067 | } |
5068 | else if (!hash) | |
906e58ca NC |
5069 | { |
5070 | /* It's a local symbol. */ | |
5071 | Elf_Internal_Sym *sym; | |
906e58ca NC |
5072 | |
5073 | if (local_syms == NULL) | |
5074 | { | |
5075 | local_syms | |
5076 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
5077 | if (local_syms == NULL) | |
5078 | local_syms | |
5079 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
5080 | symtab_hdr->sh_info, 0, | |
5081 | NULL, NULL, NULL); | |
5082 | if (local_syms == NULL) | |
5083 | goto error_ret_free_internal; | |
5084 | } | |
5085 | ||
5086 | sym = local_syms + r_indx; | |
f6d250ce TS |
5087 | if (sym->st_shndx == SHN_UNDEF) |
5088 | sym_sec = bfd_und_section_ptr; | |
5089 | else if (sym->st_shndx == SHN_ABS) | |
5090 | sym_sec = bfd_abs_section_ptr; | |
5091 | else if (sym->st_shndx == SHN_COMMON) | |
5092 | sym_sec = bfd_com_section_ptr; | |
5093 | else | |
5094 | sym_sec = | |
5095 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); | |
5096 | ||
ffcb4889 NS |
5097 | if (!sym_sec) |
5098 | /* This is an undefined symbol. It can never | |
5099 | be resolved. */ | |
5100 | continue; | |
fe33d2fa | 5101 | |
906e58ca NC |
5102 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
5103 | sym_value = sym->st_value; | |
5104 | destination = (sym_value + irela->r_addend | |
5105 | + sym_sec->output_offset | |
5106 | + sym_sec->output_section->vma); | |
34e77a92 | 5107 | st_type = ELF_ST_TYPE (sym->st_info); |
35fc36a8 | 5108 | branch_type = ARM_SYM_BRANCH_TYPE (sym); |
7413f23f DJ |
5109 | sym_name |
5110 | = bfd_elf_string_from_elf_section (input_bfd, | |
5111 | symtab_hdr->sh_link, | |
5112 | sym->st_name); | |
906e58ca NC |
5113 | } |
5114 | else | |
5115 | { | |
5116 | /* It's an external symbol. */ | |
906e58ca NC |
5117 | while (hash->root.root.type == bfd_link_hash_indirect |
5118 | || hash->root.root.type == bfd_link_hash_warning) | |
5119 | hash = ((struct elf32_arm_link_hash_entry *) | |
5120 | hash->root.root.u.i.link); | |
5121 | ||
5122 | if (hash->root.root.type == bfd_link_hash_defined | |
5123 | || hash->root.root.type == bfd_link_hash_defweak) | |
5124 | { | |
5125 | sym_sec = hash->root.root.u.def.section; | |
5126 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
5127 | |
5128 | struct elf32_arm_link_hash_table *globals = | |
5129 | elf32_arm_hash_table (info); | |
5130 | ||
5131 | /* For a destination in a shared library, | |
5132 | use the PLT stub as target address to | |
5133 | decide whether a branch stub is | |
5134 | needed. */ | |
4dfe6ac6 | 5135 | if (globals != NULL |
362d30a1 | 5136 | && globals->root.splt != NULL |
4dfe6ac6 | 5137 | && hash != NULL |
022f8312 CL |
5138 | && hash->root.plt.offset != (bfd_vma) -1) |
5139 | { | |
362d30a1 | 5140 | sym_sec = globals->root.splt; |
022f8312 CL |
5141 | sym_value = hash->root.plt.offset; |
5142 | if (sym_sec->output_section != NULL) | |
5143 | destination = (sym_value | |
5144 | + sym_sec->output_offset | |
5145 | + sym_sec->output_section->vma); | |
5146 | } | |
5147 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
5148 | destination = (sym_value + irela->r_addend |
5149 | + sym_sec->output_offset | |
5150 | + sym_sec->output_section->vma); | |
5151 | } | |
69c5861e CL |
5152 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
5153 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
5154 | { | |
5155 | /* For a shared library, use the PLT stub as | |
5156 | target address to decide whether a long | |
5157 | branch stub is needed. | |
5158 | For absolute code, they cannot be handled. */ | |
5159 | struct elf32_arm_link_hash_table *globals = | |
5160 | elf32_arm_hash_table (info); | |
5161 | ||
4dfe6ac6 | 5162 | if (globals != NULL |
362d30a1 | 5163 | && globals->root.splt != NULL |
4dfe6ac6 | 5164 | && hash != NULL |
69c5861e CL |
5165 | && hash->root.plt.offset != (bfd_vma) -1) |
5166 | { | |
362d30a1 | 5167 | sym_sec = globals->root.splt; |
69c5861e CL |
5168 | sym_value = hash->root.plt.offset; |
5169 | if (sym_sec->output_section != NULL) | |
5170 | destination = (sym_value | |
5171 | + sym_sec->output_offset | |
5172 | + sym_sec->output_section->vma); | |
5173 | } | |
5174 | else | |
5175 | continue; | |
5176 | } | |
906e58ca NC |
5177 | else |
5178 | { | |
5179 | bfd_set_error (bfd_error_bad_value); | |
5180 | goto error_ret_free_internal; | |
5181 | } | |
34e77a92 | 5182 | st_type = hash->root.type; |
35fc36a8 | 5183 | branch_type = hash->root.target_internal; |
7413f23f | 5184 | sym_name = hash->root.root.root.string; |
906e58ca NC |
5185 | } |
5186 | ||
48229727 | 5187 | do |
7413f23f | 5188 | { |
48229727 JB |
5189 | /* Determine what (if any) linker stub is needed. */ |
5190 | stub_type = arm_type_of_stub (info, section, irela, | |
34e77a92 RS |
5191 | st_type, &branch_type, |
5192 | hash, destination, sym_sec, | |
48229727 JB |
5193 | input_bfd, sym_name); |
5194 | if (stub_type == arm_stub_none) | |
5195 | break; | |
5196 | ||
5197 | /* Support for grouping stub sections. */ | |
5198 | id_sec = htab->stub_group[section->id].link_sec; | |
5199 | ||
5200 | /* Get the name of this stub. */ | |
5201 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, | |
fe33d2fa | 5202 | irela, stub_type); |
48229727 JB |
5203 | if (!stub_name) |
5204 | goto error_ret_free_internal; | |
5205 | ||
5206 | /* We've either created a stub for this reloc already, | |
5207 | or we are about to. */ | |
5208 | created_stub = TRUE; | |
5209 | ||
5210 | stub_entry = arm_stub_hash_lookup | |
5211 | (&htab->stub_hash_table, stub_name, | |
5212 | FALSE, FALSE); | |
5213 | if (stub_entry != NULL) | |
5214 | { | |
5215 | /* The proper stub has already been created. */ | |
5216 | free (stub_name); | |
eb7c4339 | 5217 | stub_entry->target_value = sym_value; |
48229727 JB |
5218 | break; |
5219 | } | |
7413f23f | 5220 | |
48229727 JB |
5221 | stub_entry = elf32_arm_add_stub (stub_name, section, |
5222 | htab); | |
5223 | if (stub_entry == NULL) | |
5224 | { | |
5225 | free (stub_name); | |
5226 | goto error_ret_free_internal; | |
5227 | } | |
7413f23f | 5228 | |
48229727 JB |
5229 | stub_entry->target_value = sym_value; |
5230 | stub_entry->target_section = sym_sec; | |
5231 | stub_entry->stub_type = stub_type; | |
5232 | stub_entry->h = hash; | |
35fc36a8 | 5233 | stub_entry->branch_type = branch_type; |
48229727 JB |
5234 | |
5235 | if (sym_name == NULL) | |
5236 | sym_name = "unnamed"; | |
21d799b5 NC |
5237 | stub_entry->output_name = (char *) |
5238 | bfd_alloc (htab->stub_bfd, | |
48229727 JB |
5239 | sizeof (THUMB2ARM_GLUE_ENTRY_NAME) |
5240 | + strlen (sym_name)); | |
5241 | if (stub_entry->output_name == NULL) | |
5242 | { | |
5243 | free (stub_name); | |
5244 | goto error_ret_free_internal; | |
5245 | } | |
5246 | ||
5247 | /* For historical reasons, use the existing names for | |
5248 | ARM-to-Thumb and Thumb-to-ARM stubs. */ | |
35fc36a8 RS |
5249 | if ((r_type == (unsigned int) R_ARM_THM_CALL |
5250 | || r_type == (unsigned int) R_ARM_THM_JUMP24) | |
5251 | && branch_type == ST_BRANCH_TO_ARM) | |
48229727 JB |
5252 | sprintf (stub_entry->output_name, |
5253 | THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
35fc36a8 RS |
5254 | else if ((r_type == (unsigned int) R_ARM_CALL |
5255 | || r_type == (unsigned int) R_ARM_JUMP24) | |
5256 | && branch_type == ST_BRANCH_TO_THUMB) | |
48229727 JB |
5257 | sprintf (stub_entry->output_name, |
5258 | ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
5259 | else | |
5260 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, | |
5261 | sym_name); | |
5262 | ||
5263 | stub_changed = TRUE; | |
5264 | } | |
5265 | while (0); | |
5266 | ||
5267 | /* Look for relocations which might trigger Cortex-A8 | |
5268 | erratum. */ | |
5269 | if (htab->fix_cortex_a8 | |
5270 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5271 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
5272 | || r_type == (unsigned int) R_ARM_THM_CALL | |
5273 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
5274 | { | |
5275 | bfd_vma from = section->output_section->vma | |
5276 | + section->output_offset | |
5277 | + irela->r_offset; | |
5278 | ||
5279 | if ((from & 0xfff) == 0xffe) | |
5280 | { | |
5281 | /* Found a candidate. Note we haven't checked the | |
5282 | destination is within 4K here: if we do so (and | |
5283 | don't create an entry in a8_relocs) we can't tell | |
5284 | that a branch should have been relocated when | |
5285 | scanning later. */ | |
5286 | if (num_a8_relocs == a8_reloc_table_size) | |
5287 | { | |
5288 | a8_reloc_table_size *= 2; | |
21d799b5 NC |
5289 | a8_relocs = (struct a8_erratum_reloc *) |
5290 | bfd_realloc (a8_relocs, | |
5291 | sizeof (struct a8_erratum_reloc) | |
5292 | * a8_reloc_table_size); | |
48229727 JB |
5293 | } |
5294 | ||
5295 | a8_relocs[num_a8_relocs].from = from; | |
5296 | a8_relocs[num_a8_relocs].destination = destination; | |
5297 | a8_relocs[num_a8_relocs].r_type = r_type; | |
35fc36a8 | 5298 | a8_relocs[num_a8_relocs].branch_type = branch_type; |
48229727 JB |
5299 | a8_relocs[num_a8_relocs].sym_name = sym_name; |
5300 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
92750f34 | 5301 | a8_relocs[num_a8_relocs].hash = hash; |
48229727 JB |
5302 | |
5303 | num_a8_relocs++; | |
5304 | } | |
5305 | } | |
906e58ca NC |
5306 | } |
5307 | ||
48229727 JB |
5308 | /* We're done with the internal relocs, free them. */ |
5309 | if (elf_section_data (section)->relocs == NULL) | |
5310 | free (internal_relocs); | |
5311 | } | |
5312 | ||
5313 | if (htab->fix_cortex_a8) | |
5314 | { | |
5315 | /* Sort relocs which might apply to Cortex-A8 erratum. */ | |
eb7c4339 NS |
5316 | qsort (a8_relocs, num_a8_relocs, |
5317 | sizeof (struct a8_erratum_reloc), | |
48229727 JB |
5318 | &a8_reloc_compare); |
5319 | ||
5320 | /* Scan for branches which might trigger Cortex-A8 erratum. */ | |
5321 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
5322 | &num_a8_fixes, &a8_fix_table_size, | |
eb7c4339 NS |
5323 | a8_relocs, num_a8_relocs, |
5324 | prev_num_a8_fixes, &stub_changed) | |
5325 | != 0) | |
48229727 | 5326 | goto error_ret_free_local; |
5e681ec4 | 5327 | } |
5e681ec4 PB |
5328 | } |
5329 | ||
eb7c4339 | 5330 | if (prev_num_a8_fixes != num_a8_fixes) |
48229727 JB |
5331 | stub_changed = TRUE; |
5332 | ||
906e58ca NC |
5333 | if (!stub_changed) |
5334 | break; | |
5e681ec4 | 5335 | |
906e58ca NC |
5336 | /* OK, we've added some stubs. Find out the new size of the |
5337 | stub sections. */ | |
5338 | for (stub_sec = htab->stub_bfd->sections; | |
5339 | stub_sec != NULL; | |
5340 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
5341 | { |
5342 | /* Ignore non-stub sections. */ | |
5343 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
5344 | continue; | |
5345 | ||
5346 | stub_sec->size = 0; | |
5347 | } | |
b34b2d70 | 5348 | |
906e58ca NC |
5349 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
5350 | ||
48229727 JB |
5351 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
5352 | if (htab->fix_cortex_a8) | |
5353 | for (i = 0; i < num_a8_fixes; i++) | |
5354 | { | |
5355 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, | |
5356 | a8_fixes[i].section, htab); | |
5357 | ||
5358 | if (stub_sec == NULL) | |
5359 | goto error_ret_free_local; | |
5360 | ||
5361 | stub_sec->size | |
5362 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
5363 | NULL); | |
5364 | } | |
5365 | ||
5366 | ||
906e58ca NC |
5367 | /* Ask the linker to do its stuff. */ |
5368 | (*htab->layout_sections_again) (); | |
ba93b8ac DJ |
5369 | } |
5370 | ||
48229727 JB |
5371 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
5372 | if (htab->fix_cortex_a8) | |
5373 | { | |
5374 | for (i = 0; i < num_a8_fixes; i++) | |
5375 | { | |
5376 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5377 | char *stub_name = a8_fixes[i].stub_name; | |
5378 | asection *section = a8_fixes[i].section; | |
5379 | unsigned int section_id = a8_fixes[i].section->id; | |
5380 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
5381 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
d3ce72d0 | 5382 | const insn_sequence *template_sequence; |
48229727 JB |
5383 | int template_size, size = 0; |
5384 | ||
5385 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
5386 | TRUE, FALSE); | |
5387 | if (stub_entry == NULL) | |
5388 | { | |
5389 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
5390 | section->owner, | |
5391 | stub_name); | |
5392 | return FALSE; | |
5393 | } | |
5394 | ||
5395 | stub_entry->stub_sec = stub_sec; | |
5396 | stub_entry->stub_offset = 0; | |
5397 | stub_entry->id_sec = link_sec; | |
5398 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
5399 | stub_entry->target_section = a8_fixes[i].section; | |
5400 | stub_entry->target_value = a8_fixes[i].offset; | |
5401 | stub_entry->target_addend = a8_fixes[i].addend; | |
5402 | stub_entry->orig_insn = a8_fixes[i].orig_insn; | |
35fc36a8 | 5403 | stub_entry->branch_type = a8_fixes[i].branch_type; |
48229727 | 5404 | |
d3ce72d0 NC |
5405 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
5406 | &template_sequence, | |
48229727 JB |
5407 | &template_size); |
5408 | ||
5409 | stub_entry->stub_size = size; | |
d3ce72d0 | 5410 | stub_entry->stub_template = template_sequence; |
48229727 JB |
5411 | stub_entry->stub_template_size = template_size; |
5412 | } | |
5413 | ||
5414 | /* Stash the Cortex-A8 erratum fix array for use later in | |
5415 | elf32_arm_write_section(). */ | |
5416 | htab->a8_erratum_fixes = a8_fixes; | |
5417 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
5418 | } | |
5419 | else | |
5420 | { | |
5421 | htab->a8_erratum_fixes = NULL; | |
5422 | htab->num_a8_erratum_fixes = 0; | |
5423 | } | |
906e58ca NC |
5424 | return TRUE; |
5425 | ||
5426 | error_ret_free_local: | |
5427 | return FALSE; | |
5e681ec4 PB |
5428 | } |
5429 | ||
906e58ca NC |
5430 | /* Build all the stubs associated with the current output file. The |
5431 | stubs are kept in a hash table attached to the main linker hash | |
5432 | table. We also set up the .plt entries for statically linked PIC | |
5433 | functions here. This function is called via arm_elf_finish in the | |
5434 | linker. */ | |
252b5132 | 5435 | |
906e58ca NC |
5436 | bfd_boolean |
5437 | elf32_arm_build_stubs (struct bfd_link_info *info) | |
252b5132 | 5438 | { |
906e58ca NC |
5439 | asection *stub_sec; |
5440 | struct bfd_hash_table *table; | |
5441 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 5442 | |
906e58ca | 5443 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
5444 | if (htab == NULL) |
5445 | return FALSE; | |
252b5132 | 5446 | |
906e58ca NC |
5447 | for (stub_sec = htab->stub_bfd->sections; |
5448 | stub_sec != NULL; | |
5449 | stub_sec = stub_sec->next) | |
252b5132 | 5450 | { |
906e58ca NC |
5451 | bfd_size_type size; |
5452 | ||
8029a119 | 5453 | /* Ignore non-stub sections. */ |
906e58ca NC |
5454 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
5455 | continue; | |
5456 | ||
5457 | /* Allocate memory to hold the linker stubs. */ | |
5458 | size = stub_sec->size; | |
21d799b5 | 5459 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca NC |
5460 | if (stub_sec->contents == NULL && size != 0) |
5461 | return FALSE; | |
5462 | stub_sec->size = 0; | |
252b5132 RH |
5463 | } |
5464 | ||
906e58ca NC |
5465 | /* Build the stubs as directed by the stub hash table. */ |
5466 | table = &htab->stub_hash_table; | |
5467 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
5468 | if (htab->fix_cortex_a8) |
5469 | { | |
5470 | /* Place the cortex a8 stubs last. */ | |
5471 | htab->fix_cortex_a8 = -1; | |
5472 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
5473 | } | |
252b5132 | 5474 | |
906e58ca | 5475 | return TRUE; |
252b5132 RH |
5476 | } |
5477 | ||
9b485d32 NC |
5478 | /* Locate the Thumb encoded calling stub for NAME. */ |
5479 | ||
252b5132 | 5480 | static struct elf_link_hash_entry * |
57e8b36a NC |
5481 | find_thumb_glue (struct bfd_link_info *link_info, |
5482 | const char *name, | |
f2a9dd69 | 5483 | char **error_message) |
252b5132 RH |
5484 | { |
5485 | char *tmp_name; | |
5486 | struct elf_link_hash_entry *hash; | |
5487 | struct elf32_arm_link_hash_table *hash_table; | |
5488 | ||
5489 | /* We need a pointer to the armelf specific hash table. */ | |
5490 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
5491 | if (hash_table == NULL) |
5492 | return NULL; | |
252b5132 | 5493 | |
21d799b5 NC |
5494 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5495 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5496 | |
5497 | BFD_ASSERT (tmp_name); | |
5498 | ||
5499 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
5500 | ||
5501 | hash = elf_link_hash_lookup | |
b34976b6 | 5502 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 5503 | |
b1657152 AM |
5504 | if (hash == NULL |
5505 | && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"), | |
5506 | tmp_name, name) == -1) | |
5507 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
5508 | |
5509 | free (tmp_name); | |
5510 | ||
5511 | return hash; | |
5512 | } | |
5513 | ||
9b485d32 NC |
5514 | /* Locate the ARM encoded calling stub for NAME. */ |
5515 | ||
252b5132 | 5516 | static struct elf_link_hash_entry * |
57e8b36a NC |
5517 | find_arm_glue (struct bfd_link_info *link_info, |
5518 | const char *name, | |
f2a9dd69 | 5519 | char **error_message) |
252b5132 RH |
5520 | { |
5521 | char *tmp_name; | |
5522 | struct elf_link_hash_entry *myh; | |
5523 | struct elf32_arm_link_hash_table *hash_table; | |
5524 | ||
5525 | /* We need a pointer to the elfarm specific hash table. */ | |
5526 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
5527 | if (hash_table == NULL) |
5528 | return NULL; | |
252b5132 | 5529 | |
21d799b5 NC |
5530 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5531 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5532 | |
5533 | BFD_ASSERT (tmp_name); | |
5534 | ||
5535 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
5536 | ||
5537 | myh = elf_link_hash_lookup | |
b34976b6 | 5538 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 5539 | |
b1657152 AM |
5540 | if (myh == NULL |
5541 | && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"), | |
5542 | tmp_name, name) == -1) | |
5543 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
5544 | |
5545 | free (tmp_name); | |
5546 | ||
5547 | return myh; | |
5548 | } | |
5549 | ||
8f6277f5 | 5550 | /* ARM->Thumb glue (static images): |
252b5132 RH |
5551 | |
5552 | .arm | |
5553 | __func_from_arm: | |
5554 | ldr r12, __func_addr | |
5555 | bx r12 | |
5556 | __func_addr: | |
906e58ca | 5557 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 5558 | |
26079076 PB |
5559 | (v5t static images) |
5560 | .arm | |
5561 | __func_from_arm: | |
5562 | ldr pc, __func_addr | |
5563 | __func_addr: | |
906e58ca | 5564 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 5565 | |
8f6277f5 PB |
5566 | (relocatable images) |
5567 | .arm | |
5568 | __func_from_arm: | |
5569 | ldr r12, __func_offset | |
5570 | add r12, r12, pc | |
5571 | bx r12 | |
5572 | __func_offset: | |
8029a119 | 5573 | .word func - . */ |
8f6277f5 PB |
5574 | |
5575 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
5576 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
5577 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
5578 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
5579 | ||
26079076 PB |
5580 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
5581 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
5582 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
5583 | ||
8f6277f5 PB |
5584 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
5585 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
5586 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
5587 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
5588 | ||
9b485d32 | 5589 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 5590 | |
8029a119 NC |
5591 | .thumb .thumb |
5592 | .align 2 .align 2 | |
5593 | __func_from_thumb: __func_from_thumb: | |
5594 | bx pc push {r6, lr} | |
5595 | nop ldr r6, __func_addr | |
5596 | .arm mov lr, pc | |
5597 | b func bx r6 | |
fcef9eb7 | 5598 | .arm |
b38cadfb | 5599 | ;; back_to_thumb |
fcef9eb7 | 5600 | ldmia r13! {r6, lr} |
b38cadfb | 5601 | bx lr |
8029a119 NC |
5602 | __func_addr: |
5603 | .word func */ | |
252b5132 RH |
5604 | |
5605 | #define THUMB2ARM_GLUE_SIZE 8 | |
5606 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
5607 | static const insn16 t2a2_noop_insn = 0x46c0; | |
5608 | static const insn32 t2a3_b_insn = 0xea000000; | |
5609 | ||
c7b8f16e JB |
5610 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
5611 | ||
845b51d6 PB |
5612 | #define ARM_BX_VENEER_SIZE 12 |
5613 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
5614 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
5615 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
5616 | ||
7e392df6 | 5617 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
5618 | static void |
5619 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
5620 | { |
5621 | asection * s; | |
8029a119 | 5622 | bfd_byte * contents; |
252b5132 | 5623 | |
8029a119 | 5624 | if (size == 0) |
3e6b1042 DJ |
5625 | { |
5626 | /* Do not include empty glue sections in the output. */ | |
5627 | if (abfd != NULL) | |
5628 | { | |
3d4d4302 | 5629 | s = bfd_get_linker_section (abfd, name); |
3e6b1042 DJ |
5630 | if (s != NULL) |
5631 | s->flags |= SEC_EXCLUDE; | |
5632 | } | |
5633 | return; | |
5634 | } | |
252b5132 | 5635 | |
8029a119 | 5636 | BFD_ASSERT (abfd != NULL); |
252b5132 | 5637 | |
3d4d4302 | 5638 | s = bfd_get_linker_section (abfd, name); |
8029a119 | 5639 | BFD_ASSERT (s != NULL); |
252b5132 | 5640 | |
21d799b5 | 5641 | contents = (bfd_byte *) bfd_alloc (abfd, size); |
252b5132 | 5642 | |
8029a119 NC |
5643 | BFD_ASSERT (s->size == size); |
5644 | s->contents = contents; | |
5645 | } | |
906e58ca | 5646 | |
8029a119 NC |
5647 | bfd_boolean |
5648 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) | |
5649 | { | |
5650 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 5651 | |
8029a119 NC |
5652 | globals = elf32_arm_hash_table (info); |
5653 | BFD_ASSERT (globals != NULL); | |
906e58ca | 5654 | |
8029a119 NC |
5655 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5656 | globals->arm_glue_size, | |
5657 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 5658 | |
8029a119 NC |
5659 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5660 | globals->thumb_glue_size, | |
5661 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 5662 | |
8029a119 NC |
5663 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5664 | globals->vfp11_erratum_glue_size, | |
5665 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 5666 | |
8029a119 NC |
5667 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5668 | globals->bx_glue_size, | |
845b51d6 PB |
5669 | ARM_BX_GLUE_SECTION_NAME); |
5670 | ||
b34976b6 | 5671 | return TRUE; |
252b5132 RH |
5672 | } |
5673 | ||
a4fd1a8e | 5674 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
5675 | returns the symbol identifying the stub. */ |
5676 | ||
a4fd1a8e | 5677 | static struct elf_link_hash_entry * |
57e8b36a NC |
5678 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
5679 | struct elf_link_hash_entry * h) | |
252b5132 RH |
5680 | { |
5681 | const char * name = h->root.root.string; | |
63b0f745 | 5682 | asection * s; |
252b5132 RH |
5683 | char * tmp_name; |
5684 | struct elf_link_hash_entry * myh; | |
14a793b2 | 5685 | struct bfd_link_hash_entry * bh; |
252b5132 | 5686 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 5687 | bfd_vma val; |
2f475487 | 5688 | bfd_size_type size; |
252b5132 RH |
5689 | |
5690 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
5691 | BFD_ASSERT (globals != NULL); |
5692 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
5693 | ||
3d4d4302 | 5694 | s = bfd_get_linker_section |
252b5132 RH |
5695 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); |
5696 | ||
252b5132 RH |
5697 | BFD_ASSERT (s != NULL); |
5698 | ||
21d799b5 NC |
5699 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5700 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5701 | |
5702 | BFD_ASSERT (tmp_name); | |
5703 | ||
5704 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
5705 | ||
5706 | myh = elf_link_hash_lookup | |
b34976b6 | 5707 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
5708 | |
5709 | if (myh != NULL) | |
5710 | { | |
9b485d32 | 5711 | /* We've already seen this guy. */ |
252b5132 | 5712 | free (tmp_name); |
a4fd1a8e | 5713 | return myh; |
252b5132 RH |
5714 | } |
5715 | ||
57e8b36a NC |
5716 | /* The only trick here is using hash_table->arm_glue_size as the value. |
5717 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
5718 | putting it. The +1 on the value marks that the stub has not been |
5719 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 5720 | bh = NULL; |
dc810e39 AM |
5721 | val = globals->arm_glue_size + 1; |
5722 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
5723 | tmp_name, BSF_GLOBAL, s, val, | |
b34976b6 | 5724 | NULL, TRUE, FALSE, &bh); |
252b5132 | 5725 | |
b7693d02 DJ |
5726 | myh = (struct elf_link_hash_entry *) bh; |
5727 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5728 | myh->forced_local = 1; | |
5729 | ||
252b5132 RH |
5730 | free (tmp_name); |
5731 | ||
27e55c4d PB |
5732 | if (link_info->shared || globals->root.is_relocatable_executable |
5733 | || globals->pic_veneer) | |
2f475487 | 5734 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
5735 | else if (globals->use_blx) |
5736 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 5737 | else |
2f475487 AM |
5738 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
5739 | ||
5740 | s->size += size; | |
5741 | globals->arm_glue_size += size; | |
252b5132 | 5742 | |
a4fd1a8e | 5743 | return myh; |
252b5132 RH |
5744 | } |
5745 | ||
845b51d6 PB |
5746 | /* Allocate space for ARMv4 BX veneers. */ |
5747 | ||
5748 | static void | |
5749 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
5750 | { | |
5751 | asection * s; | |
5752 | struct elf32_arm_link_hash_table *globals; | |
5753 | char *tmp_name; | |
5754 | struct elf_link_hash_entry *myh; | |
5755 | struct bfd_link_hash_entry *bh; | |
5756 | bfd_vma val; | |
5757 | ||
5758 | /* BX PC does not need a veneer. */ | |
5759 | if (reg == 15) | |
5760 | return; | |
5761 | ||
5762 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
5763 | BFD_ASSERT (globals != NULL); |
5764 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
5765 | ||
5766 | /* Check if this veneer has already been allocated. */ | |
5767 | if (globals->bx_glue_offset[reg]) | |
5768 | return; | |
5769 | ||
3d4d4302 | 5770 | s = bfd_get_linker_section |
845b51d6 PB |
5771 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); |
5772 | ||
5773 | BFD_ASSERT (s != NULL); | |
5774 | ||
5775 | /* Add symbol for veneer. */ | |
21d799b5 NC |
5776 | tmp_name = (char *) |
5777 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
906e58ca | 5778 | |
845b51d6 | 5779 | BFD_ASSERT (tmp_name); |
906e58ca | 5780 | |
845b51d6 | 5781 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 5782 | |
845b51d6 PB |
5783 | myh = elf_link_hash_lookup |
5784 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5785 | |
845b51d6 | 5786 | BFD_ASSERT (myh == NULL); |
906e58ca | 5787 | |
845b51d6 PB |
5788 | bh = NULL; |
5789 | val = globals->bx_glue_size; | |
5790 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
5791 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
5792 | NULL, TRUE, FALSE, &bh); | |
5793 | ||
5794 | myh = (struct elf_link_hash_entry *) bh; | |
5795 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5796 | myh->forced_local = 1; | |
5797 | ||
5798 | s->size += ARM_BX_VENEER_SIZE; | |
5799 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
5800 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
5801 | } | |
5802 | ||
5803 | ||
c7b8f16e JB |
5804 | /* Add an entry to the code/data map for section SEC. */ |
5805 | ||
5806 | static void | |
5807 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
5808 | { | |
5809 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
5810 | unsigned int newidx; | |
906e58ca | 5811 | |
c7b8f16e JB |
5812 | if (sec_data->map == NULL) |
5813 | { | |
21d799b5 NC |
5814 | sec_data->map = (elf32_arm_section_map *) |
5815 | bfd_malloc (sizeof (elf32_arm_section_map)); | |
c7b8f16e JB |
5816 | sec_data->mapcount = 0; |
5817 | sec_data->mapsize = 1; | |
5818 | } | |
906e58ca | 5819 | |
c7b8f16e | 5820 | newidx = sec_data->mapcount++; |
906e58ca | 5821 | |
c7b8f16e JB |
5822 | if (sec_data->mapcount > sec_data->mapsize) |
5823 | { | |
5824 | sec_data->mapsize *= 2; | |
21d799b5 NC |
5825 | sec_data->map = (elf32_arm_section_map *) |
5826 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize | |
5827 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
5828 | } |
5829 | ||
5830 | if (sec_data->map) | |
5831 | { | |
5832 | sec_data->map[newidx].vma = vma; | |
5833 | sec_data->map[newidx].type = type; | |
c7b8f16e | 5834 | } |
c7b8f16e JB |
5835 | } |
5836 | ||
5837 | ||
5838 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
5839 | veneers are handled for now. */ | |
5840 | ||
5841 | static bfd_vma | |
5842 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
5843 | elf32_vfp11_erratum_list *branch, | |
5844 | bfd *branch_bfd, | |
5845 | asection *branch_sec, | |
5846 | unsigned int offset) | |
5847 | { | |
5848 | asection *s; | |
5849 | struct elf32_arm_link_hash_table *hash_table; | |
5850 | char *tmp_name; | |
5851 | struct elf_link_hash_entry *myh; | |
5852 | struct bfd_link_hash_entry *bh; | |
5853 | bfd_vma val; | |
5854 | struct _arm_elf_section_data *sec_data; | |
c7b8f16e | 5855 | elf32_vfp11_erratum_list *newerr; |
906e58ca | 5856 | |
c7b8f16e | 5857 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
5858 | BFD_ASSERT (hash_table != NULL); |
5859 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 5860 | |
3d4d4302 | 5861 | s = bfd_get_linker_section |
c7b8f16e | 5862 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); |
906e58ca | 5863 | |
c7b8f16e | 5864 | sec_data = elf32_arm_section_data (s); |
906e58ca | 5865 | |
c7b8f16e | 5866 | BFD_ASSERT (s != NULL); |
906e58ca | 5867 | |
21d799b5 NC |
5868 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
5869 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
906e58ca | 5870 | |
c7b8f16e | 5871 | BFD_ASSERT (tmp_name); |
906e58ca | 5872 | |
c7b8f16e JB |
5873 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
5874 | hash_table->num_vfp11_fixes); | |
906e58ca | 5875 | |
c7b8f16e JB |
5876 | myh = elf_link_hash_lookup |
5877 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5878 | |
c7b8f16e | 5879 | BFD_ASSERT (myh == NULL); |
906e58ca | 5880 | |
c7b8f16e JB |
5881 | bh = NULL; |
5882 | val = hash_table->vfp11_erratum_glue_size; | |
5883 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
5884 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
5885 | NULL, TRUE, FALSE, &bh); | |
5886 | ||
5887 | myh = (struct elf_link_hash_entry *) bh; | |
5888 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5889 | myh->forced_local = 1; | |
5890 | ||
5891 | /* Link veneer back to calling location. */ | |
c7e2358a | 5892 | sec_data->erratumcount += 1; |
21d799b5 NC |
5893 | newerr = (elf32_vfp11_erratum_list *) |
5894 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 5895 | |
c7b8f16e JB |
5896 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
5897 | newerr->vma = -1; | |
5898 | newerr->u.v.branch = branch; | |
5899 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
5900 | branch->u.b.veneer = newerr; | |
5901 | ||
5902 | newerr->next = sec_data->erratumlist; | |
5903 | sec_data->erratumlist = newerr; | |
5904 | ||
5905 | /* A symbol for the return from the veneer. */ | |
5906 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
5907 | hash_table->num_vfp11_fixes); | |
5908 | ||
5909 | myh = elf_link_hash_lookup | |
5910 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5911 | |
c7b8f16e JB |
5912 | if (myh != NULL) |
5913 | abort (); | |
5914 | ||
5915 | bh = NULL; | |
5916 | val = offset + 4; | |
5917 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
5918 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
906e58ca | 5919 | |
c7b8f16e JB |
5920 | myh = (struct elf_link_hash_entry *) bh; |
5921 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5922 | myh->forced_local = 1; | |
5923 | ||
5924 | free (tmp_name); | |
906e58ca | 5925 | |
c7b8f16e JB |
5926 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
5927 | entry for that symbol to the code/data map for the section. */ | |
5928 | if (hash_table->vfp11_erratum_glue_size == 0) | |
5929 | { | |
5930 | bh = NULL; | |
5931 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
5932 | ever requires this erratum fix. */ | |
5933 | _bfd_generic_link_add_one_symbol (link_info, | |
5934 | hash_table->bfd_of_glue_owner, "$a", | |
5935 | BSF_LOCAL, s, 0, NULL, | |
5936 | TRUE, FALSE, &bh); | |
5937 | ||
5938 | myh = (struct elf_link_hash_entry *) bh; | |
5939 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
5940 | myh->forced_local = 1; | |
906e58ca | 5941 | |
c7b8f16e JB |
5942 | /* The elf32_arm_init_maps function only cares about symbols from input |
5943 | BFDs. We must make a note of this generated mapping symbol | |
5944 | ourselves so that code byteswapping works properly in | |
5945 | elf32_arm_write_section. */ | |
5946 | elf32_arm_section_map_add (s, 'a', 0); | |
5947 | } | |
906e58ca | 5948 | |
c7b8f16e JB |
5949 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
5950 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
5951 | hash_table->num_vfp11_fixes++; | |
906e58ca | 5952 | |
c7b8f16e JB |
5953 | /* The offset of the veneer. */ |
5954 | return val; | |
5955 | } | |
5956 | ||
8029a119 | 5957 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
5958 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
5959 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
5960 | |
5961 | /* Create a fake section for use by the ARM backend of the linker. */ | |
5962 | ||
5963 | static bfd_boolean | |
5964 | arm_make_glue_section (bfd * abfd, const char * name) | |
5965 | { | |
5966 | asection * sec; | |
5967 | ||
3d4d4302 | 5968 | sec = bfd_get_linker_section (abfd, name); |
8029a119 NC |
5969 | if (sec != NULL) |
5970 | /* Already made. */ | |
5971 | return TRUE; | |
5972 | ||
3d4d4302 | 5973 | sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); |
8029a119 NC |
5974 | |
5975 | if (sec == NULL | |
5976 | || !bfd_set_section_alignment (abfd, sec, 2)) | |
5977 | return FALSE; | |
5978 | ||
5979 | /* Set the gc mark to prevent the section from being removed by garbage | |
5980 | collection, despite the fact that no relocs refer to this section. */ | |
5981 | sec->gc_mark = 1; | |
5982 | ||
5983 | return TRUE; | |
5984 | } | |
5985 | ||
8afb0e02 NC |
5986 | /* Add the glue sections to ABFD. This function is called from the |
5987 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 5988 | |
b34976b6 | 5989 | bfd_boolean |
57e8b36a NC |
5990 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
5991 | struct bfd_link_info *info) | |
252b5132 | 5992 | { |
8afb0e02 NC |
5993 | /* If we are only performing a partial |
5994 | link do not bother adding the glue. */ | |
1049f94e | 5995 | if (info->relocatable) |
b34976b6 | 5996 | return TRUE; |
252b5132 | 5997 | |
8029a119 NC |
5998 | return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
5999 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) | |
6000 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
6001 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
8afb0e02 NC |
6002 | } |
6003 | ||
6004 | /* Select a BFD to be used to hold the sections used by the glue code. | |
6005 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 6006 | {armelf/pe}.em. */ |
8afb0e02 | 6007 | |
b34976b6 | 6008 | bfd_boolean |
57e8b36a | 6009 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
6010 | { |
6011 | struct elf32_arm_link_hash_table *globals; | |
6012 | ||
6013 | /* If we are only performing a partial link | |
6014 | do not bother getting a bfd to hold the glue. */ | |
1049f94e | 6015 | if (info->relocatable) |
b34976b6 | 6016 | return TRUE; |
8afb0e02 | 6017 | |
b7693d02 DJ |
6018 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
6019 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
6020 | ||
8afb0e02 | 6021 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
6022 | BFD_ASSERT (globals != NULL); |
6023 | ||
6024 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 6025 | return TRUE; |
8afb0e02 | 6026 | |
252b5132 RH |
6027 | /* Save the bfd for later use. */ |
6028 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 6029 | |
b34976b6 | 6030 | return TRUE; |
252b5132 RH |
6031 | } |
6032 | ||
906e58ca NC |
6033 | static void |
6034 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 6035 | { |
2de70689 MGD |
6036 | int cpu_arch; |
6037 | ||
b38cadfb | 6038 | cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
2de70689 MGD |
6039 | Tag_CPU_arch); |
6040 | ||
6041 | if (globals->fix_arm1176) | |
6042 | { | |
6043 | if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) | |
6044 | globals->use_blx = 1; | |
6045 | } | |
6046 | else | |
6047 | { | |
6048 | if (cpu_arch > TAG_CPU_ARCH_V4T) | |
6049 | globals->use_blx = 1; | |
6050 | } | |
39b41c9c PB |
6051 | } |
6052 | ||
b34976b6 | 6053 | bfd_boolean |
57e8b36a | 6054 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 6055 | struct bfd_link_info *link_info) |
252b5132 RH |
6056 | { |
6057 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 6058 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
6059 | Elf_Internal_Rela *irel, *irelend; |
6060 | bfd_byte *contents = NULL; | |
252b5132 RH |
6061 | |
6062 | asection *sec; | |
6063 | struct elf32_arm_link_hash_table *globals; | |
6064 | ||
6065 | /* If we are only performing a partial link do not bother | |
6066 | to construct any glue. */ | |
1049f94e | 6067 | if (link_info->relocatable) |
b34976b6 | 6068 | return TRUE; |
252b5132 | 6069 | |
39ce1a6a NC |
6070 | /* Here we have a bfd that is to be included on the link. We have a |
6071 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 6072 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 6073 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
6074 | |
6075 | check_use_blx (globals); | |
252b5132 | 6076 | |
d504ffc8 | 6077 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 6078 | { |
d003868e AM |
6079 | _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."), |
6080 | abfd); | |
e489d0ae PB |
6081 | return FALSE; |
6082 | } | |
f21f3fe0 | 6083 | |
39ce1a6a NC |
6084 | /* PR 5398: If we have not decided to include any loadable sections in |
6085 | the output then we will not have a glue owner bfd. This is OK, it | |
6086 | just means that there is nothing else for us to do here. */ | |
6087 | if (globals->bfd_of_glue_owner == NULL) | |
6088 | return TRUE; | |
6089 | ||
252b5132 RH |
6090 | /* Rummage around all the relocs and map the glue vectors. */ |
6091 | sec = abfd->sections; | |
6092 | ||
6093 | if (sec == NULL) | |
b34976b6 | 6094 | return TRUE; |
252b5132 RH |
6095 | |
6096 | for (; sec != NULL; sec = sec->next) | |
6097 | { | |
6098 | if (sec->reloc_count == 0) | |
6099 | continue; | |
6100 | ||
2f475487 AM |
6101 | if ((sec->flags & SEC_EXCLUDE) != 0) |
6102 | continue; | |
6103 | ||
0ffa91dd | 6104 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 6105 | |
9b485d32 | 6106 | /* Load the relocs. */ |
6cdc0ccc | 6107 | internal_relocs |
906e58ca | 6108 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
252b5132 | 6109 | |
6cdc0ccc AM |
6110 | if (internal_relocs == NULL) |
6111 | goto error_return; | |
252b5132 | 6112 | |
6cdc0ccc AM |
6113 | irelend = internal_relocs + sec->reloc_count; |
6114 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
6115 | { |
6116 | long r_type; | |
6117 | unsigned long r_index; | |
252b5132 RH |
6118 | |
6119 | struct elf_link_hash_entry *h; | |
6120 | ||
6121 | r_type = ELF32_R_TYPE (irel->r_info); | |
6122 | r_index = ELF32_R_SYM (irel->r_info); | |
6123 | ||
9b485d32 | 6124 | /* These are the only relocation types we care about. */ |
ba96a88f | 6125 | if ( r_type != R_ARM_PC24 |
845b51d6 | 6126 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
6127 | continue; |
6128 | ||
6129 | /* Get the section contents if we haven't done so already. */ | |
6130 | if (contents == NULL) | |
6131 | { | |
6132 | /* Get cached copy if it exists. */ | |
6133 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
6134 | contents = elf_section_data (sec)->this_hdr.contents; | |
6135 | else | |
6136 | { | |
6137 | /* Go get them off disk. */ | |
57e8b36a | 6138 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
6139 | goto error_return; |
6140 | } | |
6141 | } | |
6142 | ||
845b51d6 PB |
6143 | if (r_type == R_ARM_V4BX) |
6144 | { | |
6145 | int reg; | |
6146 | ||
6147 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
6148 | record_arm_bx_glue (link_info, reg); | |
6149 | continue; | |
6150 | } | |
6151 | ||
a7c10850 | 6152 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
6153 | h = NULL; |
6154 | ||
9b485d32 | 6155 | /* We don't care about local symbols. */ |
252b5132 RH |
6156 | if (r_index < symtab_hdr->sh_info) |
6157 | continue; | |
6158 | ||
9b485d32 | 6159 | /* This is an external symbol. */ |
252b5132 RH |
6160 | r_index -= symtab_hdr->sh_info; |
6161 | h = (struct elf_link_hash_entry *) | |
6162 | elf_sym_hashes (abfd)[r_index]; | |
6163 | ||
6164 | /* If the relocation is against a static symbol it must be within | |
6165 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
6166 | if (h == NULL) | |
6167 | continue; | |
6168 | ||
d504ffc8 DJ |
6169 | /* If the call will go through a PLT entry then we do not need |
6170 | glue. */ | |
362d30a1 | 6171 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
b7693d02 DJ |
6172 | continue; |
6173 | ||
252b5132 RH |
6174 | switch (r_type) |
6175 | { | |
6176 | case R_ARM_PC24: | |
6177 | /* This one is a call from arm code. We need to look up | |
2f0ca46a | 6178 | the target of the call. If it is a thumb target, we |
252b5132 | 6179 | insert glue. */ |
35fc36a8 | 6180 | if (h->target_internal == ST_BRANCH_TO_THUMB) |
252b5132 RH |
6181 | record_arm_to_thumb_glue (link_info, h); |
6182 | break; | |
6183 | ||
252b5132 | 6184 | default: |
c6596c5e | 6185 | abort (); |
252b5132 RH |
6186 | } |
6187 | } | |
6cdc0ccc AM |
6188 | |
6189 | if (contents != NULL | |
6190 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6191 | free (contents); | |
6192 | contents = NULL; | |
6193 | ||
6194 | if (internal_relocs != NULL | |
6195 | && elf_section_data (sec)->relocs != internal_relocs) | |
6196 | free (internal_relocs); | |
6197 | internal_relocs = NULL; | |
252b5132 RH |
6198 | } |
6199 | ||
b34976b6 | 6200 | return TRUE; |
9a5aca8c | 6201 | |
252b5132 | 6202 | error_return: |
6cdc0ccc AM |
6203 | if (contents != NULL |
6204 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6205 | free (contents); | |
6206 | if (internal_relocs != NULL | |
6207 | && elf_section_data (sec)->relocs != internal_relocs) | |
6208 | free (internal_relocs); | |
9a5aca8c | 6209 | |
b34976b6 | 6210 | return FALSE; |
252b5132 | 6211 | } |
7e392df6 | 6212 | #endif |
252b5132 | 6213 | |
eb043451 | 6214 | |
c7b8f16e JB |
6215 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
6216 | ||
6217 | void | |
6218 | bfd_elf32_arm_init_maps (bfd *abfd) | |
6219 | { | |
6220 | Elf_Internal_Sym *isymbuf; | |
6221 | Elf_Internal_Shdr *hdr; | |
6222 | unsigned int i, localsyms; | |
6223 | ||
af1f4419 NC |
6224 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
6225 | if (! is_arm_elf (abfd)) | |
6226 | return; | |
6227 | ||
c7b8f16e JB |
6228 | if ((abfd->flags & DYNAMIC) != 0) |
6229 | return; | |
6230 | ||
0ffa91dd | 6231 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
6232 | localsyms = hdr->sh_info; |
6233 | ||
6234 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
6235 | should contain the number of local symbols, which should come before any | |
6236 | global symbols. Mapping symbols are always local. */ | |
6237 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
6238 | NULL); | |
6239 | ||
6240 | /* No internal symbols read? Skip this BFD. */ | |
6241 | if (isymbuf == NULL) | |
6242 | return; | |
6243 | ||
6244 | for (i = 0; i < localsyms; i++) | |
6245 | { | |
6246 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
6247 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
6248 | const char *name; | |
906e58ca | 6249 | |
c7b8f16e JB |
6250 | if (sec != NULL |
6251 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) | |
6252 | { | |
6253 | name = bfd_elf_string_from_elf_section (abfd, | |
6254 | hdr->sh_link, isym->st_name); | |
906e58ca | 6255 | |
c7b8f16e JB |
6256 | if (bfd_is_arm_special_symbol_name (name, |
6257 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) | |
6258 | elf32_arm_section_map_add (sec, name[1], isym->st_value); | |
6259 | } | |
6260 | } | |
6261 | } | |
6262 | ||
6263 | ||
48229727 JB |
6264 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
6265 | say what they wanted. */ | |
6266 | ||
6267 | void | |
6268 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6269 | { | |
6270 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
6271 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
6272 | ||
4dfe6ac6 NC |
6273 | if (globals == NULL) |
6274 | return; | |
6275 | ||
48229727 JB |
6276 | if (globals->fix_cortex_a8 == -1) |
6277 | { | |
6278 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
6279 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
6280 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
6281 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
6282 | globals->fix_cortex_a8 = 1; | |
6283 | else | |
6284 | globals->fix_cortex_a8 = 0; | |
6285 | } | |
6286 | } | |
6287 | ||
6288 | ||
c7b8f16e JB |
6289 | void |
6290 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
6291 | { | |
6292 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 6293 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 6294 | |
4dfe6ac6 NC |
6295 | if (globals == NULL) |
6296 | return; | |
c7b8f16e JB |
6297 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
6298 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
6299 | { | |
6300 | switch (globals->vfp11_fix) | |
6301 | { | |
6302 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
6303 | case BFD_ARM_VFP11_FIX_NONE: | |
6304 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
6305 | break; | |
906e58ca | 6306 | |
c7b8f16e JB |
6307 | default: |
6308 | /* Give a warning, but do as the user requests anyway. */ | |
6309 | (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum " | |
6310 | "workaround is not necessary for target architecture"), obfd); | |
6311 | } | |
6312 | } | |
6313 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
6314 | /* For earlier architectures, we might need the workaround, but do not | |
6315 | enable it by default. If users is running with broken hardware, they | |
6316 | must enable the erratum fix explicitly. */ | |
6317 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
6318 | } | |
6319 | ||
6320 | ||
906e58ca NC |
6321 | enum bfd_arm_vfp11_pipe |
6322 | { | |
c7b8f16e JB |
6323 | VFP11_FMAC, |
6324 | VFP11_LS, | |
6325 | VFP11_DS, | |
6326 | VFP11_BAD | |
6327 | }; | |
6328 | ||
6329 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
6330 | registers, or X:RX for double-precision registers, where RX is the group of | |
6331 | four bits in the instruction encoding and X is the single extension bit. | |
6332 | RX and X fields are specified using their lowest (starting) bit. The return | |
6333 | value is: | |
6334 | ||
6335 | 0...31: single-precision registers s0...s31 | |
6336 | 32...63: double-precision registers d0...d31. | |
906e58ca | 6337 | |
c7b8f16e JB |
6338 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
6339 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 6340 | |
c7b8f16e JB |
6341 | static unsigned int |
6342 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, | |
6343 | unsigned int x) | |
6344 | { | |
6345 | if (is_double) | |
6346 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
6347 | else | |
6348 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
6349 | } | |
6350 | ||
6351 | /* Set bits in *WMASK according to a register number REG as encoded by | |
6352 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
6353 | ||
6354 | static void | |
6355 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
6356 | { | |
6357 | if (reg < 32) | |
6358 | *wmask |= 1 << reg; | |
6359 | else if (reg < 48) | |
6360 | *wmask |= 3 << ((reg - 32) * 2); | |
6361 | } | |
6362 | ||
6363 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
6364 | ||
6365 | static bfd_boolean | |
6366 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) | |
6367 | { | |
6368 | int i; | |
906e58ca | 6369 | |
c7b8f16e JB |
6370 | for (i = 0; i < numregs; i++) |
6371 | { | |
6372 | unsigned int reg = regs[i]; | |
6373 | ||
6374 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
6375 | return TRUE; | |
906e58ca | 6376 | |
c7b8f16e JB |
6377 | reg -= 32; |
6378 | ||
6379 | if (reg >= 16) | |
6380 | continue; | |
906e58ca | 6381 | |
c7b8f16e JB |
6382 | if ((wmask & (3 << (reg * 2))) != 0) |
6383 | return TRUE; | |
6384 | } | |
906e58ca | 6385 | |
c7b8f16e JB |
6386 | return FALSE; |
6387 | } | |
6388 | ||
6389 | /* In this function, we're interested in two things: finding input registers | |
6390 | for VFP data-processing instructions, and finding the set of registers which | |
6391 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
6392 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
6393 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
6394 | implemented by the chip in question). DP registers are marked by setting | |
6395 | both SP registers in the write mask). */ | |
6396 | ||
6397 | static enum bfd_arm_vfp11_pipe | |
6398 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
6399 | int *numregs) | |
6400 | { | |
91d6fa6a | 6401 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
c7b8f16e JB |
6402 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
6403 | ||
6404 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
6405 | { | |
6406 | unsigned int pqrs; | |
6407 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
6408 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
6409 | ||
6410 | pqrs = ((insn & 0x00800000) >> 20) | |
6411 | | ((insn & 0x00300000) >> 19) | |
6412 | | ((insn & 0x00000040) >> 6); | |
6413 | ||
6414 | switch (pqrs) | |
6415 | { | |
6416 | case 0: /* fmac[sd]. */ | |
6417 | case 1: /* fnmac[sd]. */ | |
6418 | case 2: /* fmsc[sd]. */ | |
6419 | case 3: /* fnmsc[sd]. */ | |
91d6fa6a | 6420 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6421 | bfd_arm_vfp11_write_mask (destmask, fd); |
6422 | regs[0] = fd; | |
6423 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
6424 | regs[2] = fm; | |
6425 | *numregs = 3; | |
6426 | break; | |
6427 | ||
6428 | case 4: /* fmul[sd]. */ | |
6429 | case 5: /* fnmul[sd]. */ | |
6430 | case 6: /* fadd[sd]. */ | |
6431 | case 7: /* fsub[sd]. */ | |
91d6fa6a | 6432 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6433 | goto vfp_binop; |
6434 | ||
6435 | case 8: /* fdiv[sd]. */ | |
91d6fa6a | 6436 | vpipe = VFP11_DS; |
c7b8f16e JB |
6437 | vfp_binop: |
6438 | bfd_arm_vfp11_write_mask (destmask, fd); | |
6439 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
6440 | regs[1] = fm; | |
6441 | *numregs = 2; | |
6442 | break; | |
6443 | ||
6444 | case 15: /* extended opcode. */ | |
6445 | { | |
6446 | unsigned int extn = ((insn >> 15) & 0x1e) | |
6447 | | ((insn >> 7) & 1); | |
6448 | ||
6449 | switch (extn) | |
6450 | { | |
6451 | case 0: /* fcpy[sd]. */ | |
6452 | case 1: /* fabs[sd]. */ | |
6453 | case 2: /* fneg[sd]. */ | |
6454 | case 8: /* fcmp[sd]. */ | |
6455 | case 9: /* fcmpe[sd]. */ | |
6456 | case 10: /* fcmpz[sd]. */ | |
6457 | case 11: /* fcmpez[sd]. */ | |
6458 | case 16: /* fuito[sd]. */ | |
6459 | case 17: /* fsito[sd]. */ | |
6460 | case 24: /* ftoui[sd]. */ | |
6461 | case 25: /* ftouiz[sd]. */ | |
6462 | case 26: /* ftosi[sd]. */ | |
6463 | case 27: /* ftosiz[sd]. */ | |
6464 | /* These instructions will not bounce due to underflow. */ | |
6465 | *numregs = 0; | |
91d6fa6a | 6466 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6467 | break; |
6468 | ||
6469 | case 3: /* fsqrt[sd]. */ | |
6470 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
6471 | registers to cause the erratum in previous instructions. */ | |
6472 | bfd_arm_vfp11_write_mask (destmask, fd); | |
91d6fa6a | 6473 | vpipe = VFP11_DS; |
c7b8f16e JB |
6474 | break; |
6475 | ||
6476 | case 15: /* fcvt{ds,sd}. */ | |
6477 | { | |
6478 | int rnum = 0; | |
6479 | ||
6480 | bfd_arm_vfp11_write_mask (destmask, fd); | |
6481 | ||
6482 | /* Only FCVTSD can underflow. */ | |
6483 | if ((insn & 0x100) != 0) | |
6484 | regs[rnum++] = fm; | |
6485 | ||
6486 | *numregs = rnum; | |
6487 | ||
91d6fa6a | 6488 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
6489 | } |
6490 | break; | |
6491 | ||
6492 | default: | |
6493 | return VFP11_BAD; | |
6494 | } | |
6495 | } | |
6496 | break; | |
6497 | ||
6498 | default: | |
6499 | return VFP11_BAD; | |
6500 | } | |
6501 | } | |
6502 | /* Two-register transfer. */ | |
6503 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
6504 | { | |
6505 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 6506 | |
c7b8f16e JB |
6507 | if ((insn & 0x100000) == 0) |
6508 | { | |
6509 | if (is_double) | |
6510 | bfd_arm_vfp11_write_mask (destmask, fm); | |
6511 | else | |
6512 | { | |
6513 | bfd_arm_vfp11_write_mask (destmask, fm); | |
6514 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
6515 | } | |
6516 | } | |
6517 | ||
91d6fa6a | 6518 | vpipe = VFP11_LS; |
c7b8f16e JB |
6519 | } |
6520 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
6521 | { | |
6522 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
6523 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 6524 | |
c7b8f16e JB |
6525 | switch (puw) |
6526 | { | |
6527 | case 0: /* Two-reg transfer. We should catch these above. */ | |
6528 | abort (); | |
906e58ca | 6529 | |
c7b8f16e JB |
6530 | case 2: /* fldm[sdx]. */ |
6531 | case 3: | |
6532 | case 5: | |
6533 | { | |
6534 | unsigned int i, offset = insn & 0xff; | |
6535 | ||
6536 | if (is_double) | |
6537 | offset >>= 1; | |
6538 | ||
6539 | for (i = fd; i < fd + offset; i++) | |
6540 | bfd_arm_vfp11_write_mask (destmask, i); | |
6541 | } | |
6542 | break; | |
906e58ca | 6543 | |
c7b8f16e JB |
6544 | case 4: /* fld[sd]. */ |
6545 | case 6: | |
6546 | bfd_arm_vfp11_write_mask (destmask, fd); | |
6547 | break; | |
906e58ca | 6548 | |
c7b8f16e JB |
6549 | default: |
6550 | return VFP11_BAD; | |
6551 | } | |
6552 | ||
91d6fa6a | 6553 | vpipe = VFP11_LS; |
c7b8f16e JB |
6554 | } |
6555 | /* Single-register transfer. Note L==0. */ | |
6556 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
6557 | { | |
6558 | unsigned int opcode = (insn >> 21) & 7; | |
6559 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
6560 | ||
6561 | switch (opcode) | |
6562 | { | |
6563 | case 0: /* fmsr/fmdlr. */ | |
6564 | case 1: /* fmdhr. */ | |
6565 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
6566 | destination register. I don't know if this is exactly right, | |
6567 | but it is the conservative choice. */ | |
6568 | bfd_arm_vfp11_write_mask (destmask, fn); | |
6569 | break; | |
6570 | ||
6571 | case 7: /* fmxr. */ | |
6572 | break; | |
6573 | } | |
6574 | ||
91d6fa6a | 6575 | vpipe = VFP11_LS; |
c7b8f16e JB |
6576 | } |
6577 | ||
91d6fa6a | 6578 | return vpipe; |
c7b8f16e JB |
6579 | } |
6580 | ||
6581 | ||
6582 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
6583 | ||
6584 | ||
6585 | /* Look for potentially-troublesome code sequences which might trigger the | |
6586 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
6587 | (available from ARM) for details of the erratum. A short version is | |
6588 | described in ld.texinfo. */ | |
6589 | ||
6590 | bfd_boolean | |
6591 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) | |
6592 | { | |
6593 | asection *sec; | |
6594 | bfd_byte *contents = NULL; | |
6595 | int state = 0; | |
6596 | int regs[3], numregs = 0; | |
6597 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
6598 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 6599 | |
4dfe6ac6 NC |
6600 | if (globals == NULL) |
6601 | return FALSE; | |
6602 | ||
c7b8f16e JB |
6603 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
6604 | The states transition as follows: | |
906e58ca | 6605 | |
c7b8f16e JB |
6606 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
6607 | A VFP FMAC-pipeline instruction has been seen. Fill | |
6608 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
6609 | instruction in 'first_fmac'. | |
6610 | ||
6611 | 1 -> 2 | |
6612 | Any instruction, except for a VFP instruction which overwrites | |
6613 | regs[*]. | |
906e58ca | 6614 | |
c7b8f16e JB |
6615 | 1 -> 3 [ -> 0 ] or |
6616 | 2 -> 3 [ -> 0 ] | |
6617 | A VFP instruction has been seen which overwrites any of regs[*]. | |
6618 | We must make a veneer! Reset state to 0 before examining next | |
6619 | instruction. | |
906e58ca | 6620 | |
c7b8f16e JB |
6621 | 2 -> 0 |
6622 | If we fail to match anything in state 2, reset to state 0 and reset | |
6623 | the instruction pointer to the instruction after 'first_fmac'. | |
6624 | ||
6625 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
6626 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 6627 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
6628 | |
6629 | /* If we are only performing a partial link do not bother | |
6630 | to construct any glue. */ | |
6631 | if (link_info->relocatable) | |
6632 | return TRUE; | |
6633 | ||
0ffa91dd NC |
6634 | /* Skip if this bfd does not correspond to an ELF image. */ |
6635 | if (! is_arm_elf (abfd)) | |
6636 | return TRUE; | |
906e58ca | 6637 | |
c7b8f16e JB |
6638 | /* We should have chosen a fix type by the time we get here. */ |
6639 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
6640 | ||
6641 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
6642 | return TRUE; | |
2e6030b9 | 6643 | |
33a7ffc2 JM |
6644 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
6645 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
6646 | return TRUE; | |
6647 | ||
c7b8f16e JB |
6648 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
6649 | { | |
6650 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
6651 | struct _arm_elf_section_data *sec_data; | |
6652 | ||
6653 | /* If we don't have executable progbits, we're not interested in this | |
6654 | section. Also skip if section is to be excluded. */ | |
6655 | if (elf_section_type (sec) != SHT_PROGBITS | |
6656 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
6657 | || (sec->flags & SEC_EXCLUDE) != 0 | |
dbaa2011 | 6658 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
33a7ffc2 | 6659 | || sec->output_section == bfd_abs_section_ptr |
c7b8f16e JB |
6660 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
6661 | continue; | |
6662 | ||
6663 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 6664 | |
c7b8f16e JB |
6665 | if (sec_data->mapcount == 0) |
6666 | continue; | |
906e58ca | 6667 | |
c7b8f16e JB |
6668 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
6669 | contents = elf_section_data (sec)->this_hdr.contents; | |
6670 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
6671 | goto error_return; | |
6672 | ||
6673 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
6674 | elf32_arm_compare_mapping); | |
6675 | ||
6676 | for (span = 0; span < sec_data->mapcount; span++) | |
6677 | { | |
6678 | unsigned int span_start = sec_data->map[span].vma; | |
6679 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
6680 | ? sec->size : sec_data->map[span + 1].vma; | |
6681 | char span_type = sec_data->map[span].type; | |
906e58ca | 6682 | |
c7b8f16e JB |
6683 | /* FIXME: Only ARM mode is supported at present. We may need to |
6684 | support Thumb-2 mode also at some point. */ | |
6685 | if (span_type != 'a') | |
6686 | continue; | |
6687 | ||
6688 | for (i = span_start; i < span_end;) | |
6689 | { | |
6690 | unsigned int next_i = i + 4; | |
6691 | unsigned int insn = bfd_big_endian (abfd) | |
6692 | ? (contents[i] << 24) | |
6693 | | (contents[i + 1] << 16) | |
6694 | | (contents[i + 2] << 8) | |
6695 | | contents[i + 3] | |
6696 | : (contents[i + 3] << 24) | |
6697 | | (contents[i + 2] << 16) | |
6698 | | (contents[i + 1] << 8) | |
6699 | | contents[i]; | |
6700 | unsigned int writemask = 0; | |
91d6fa6a | 6701 | enum bfd_arm_vfp11_pipe vpipe; |
c7b8f16e JB |
6702 | |
6703 | switch (state) | |
6704 | { | |
6705 | case 0: | |
91d6fa6a | 6706 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, |
c7b8f16e JB |
6707 | &numregs); |
6708 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
6709 | operands on either the FMAC or the DS pipeline. This might | |
6710 | lead to slightly overenthusiastic veneer insertion. */ | |
91d6fa6a | 6711 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) |
c7b8f16e JB |
6712 | { |
6713 | state = use_vector ? 1 : 2; | |
6714 | first_fmac = i; | |
6715 | veneer_of_insn = insn; | |
6716 | } | |
6717 | break; | |
6718 | ||
6719 | case 1: | |
6720 | { | |
6721 | int other_regs[3], other_numregs; | |
91d6fa6a | 6722 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
c7b8f16e JB |
6723 | other_regs, |
6724 | &other_numregs); | |
91d6fa6a | 6725 | if (vpipe != VFP11_BAD |
c7b8f16e JB |
6726 | && bfd_arm_vfp11_antidependency (writemask, regs, |
6727 | numregs)) | |
6728 | state = 3; | |
6729 | else | |
6730 | state = 2; | |
6731 | } | |
6732 | break; | |
6733 | ||
6734 | case 2: | |
6735 | { | |
6736 | int other_regs[3], other_numregs; | |
91d6fa6a | 6737 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
c7b8f16e JB |
6738 | other_regs, |
6739 | &other_numregs); | |
91d6fa6a | 6740 | if (vpipe != VFP11_BAD |
c7b8f16e JB |
6741 | && bfd_arm_vfp11_antidependency (writemask, regs, |
6742 | numregs)) | |
6743 | state = 3; | |
6744 | else | |
6745 | { | |
6746 | state = 0; | |
6747 | next_i = first_fmac + 4; | |
6748 | } | |
6749 | } | |
6750 | break; | |
6751 | ||
6752 | case 3: | |
6753 | abort (); /* Should be unreachable. */ | |
6754 | } | |
6755 | ||
6756 | if (state == 3) | |
6757 | { | |
21d799b5 NC |
6758 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) |
6759 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
c7b8f16e | 6760 | |
c7e2358a | 6761 | elf32_arm_section_data (sec)->erratumcount += 1; |
c7b8f16e JB |
6762 | |
6763 | newerr->u.b.vfp_insn = veneer_of_insn; | |
6764 | ||
6765 | switch (span_type) | |
6766 | { | |
6767 | case 'a': | |
6768 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
6769 | break; | |
906e58ca | 6770 | |
c7b8f16e JB |
6771 | default: |
6772 | abort (); | |
6773 | } | |
6774 | ||
6775 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
6776 | first_fmac); | |
6777 | ||
6778 | newerr->vma = -1; | |
6779 | ||
6780 | newerr->next = sec_data->erratumlist; | |
6781 | sec_data->erratumlist = newerr; | |
6782 | ||
6783 | state = 0; | |
6784 | } | |
6785 | ||
6786 | i = next_i; | |
6787 | } | |
6788 | } | |
906e58ca | 6789 | |
c7b8f16e JB |
6790 | if (contents != NULL |
6791 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6792 | free (contents); | |
6793 | contents = NULL; | |
6794 | } | |
6795 | ||
6796 | return TRUE; | |
6797 | ||
6798 | error_return: | |
6799 | if (contents != NULL | |
6800 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6801 | free (contents); | |
906e58ca | 6802 | |
c7b8f16e JB |
6803 | return FALSE; |
6804 | } | |
6805 | ||
6806 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
6807 | after sections have been laid out, using specially-named symbols. */ | |
6808 | ||
6809 | void | |
6810 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
6811 | struct bfd_link_info *link_info) | |
6812 | { | |
6813 | asection *sec; | |
6814 | struct elf32_arm_link_hash_table *globals; | |
6815 | char *tmp_name; | |
906e58ca | 6816 | |
c7b8f16e JB |
6817 | if (link_info->relocatable) |
6818 | return; | |
2e6030b9 MS |
6819 | |
6820 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 6821 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
6822 | return; |
6823 | ||
c7b8f16e | 6824 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
6825 | if (globals == NULL) |
6826 | return; | |
906e58ca | 6827 | |
21d799b5 NC |
6828 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
6829 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
c7b8f16e JB |
6830 | |
6831 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
6832 | { | |
6833 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
6834 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 6835 | |
c7b8f16e JB |
6836 | for (; errnode != NULL; errnode = errnode->next) |
6837 | { | |
6838 | struct elf_link_hash_entry *myh; | |
6839 | bfd_vma vma; | |
6840 | ||
6841 | switch (errnode->type) | |
6842 | { | |
6843 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
6844 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
6845 | /* Find veneer symbol. */ | |
6846 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
6847 | errnode->u.b.veneer->u.v.id); | |
6848 | ||
6849 | myh = elf_link_hash_lookup | |
6850 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
6851 | ||
6852 | if (myh == NULL) | |
6853 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
6854 | "`%s'"), abfd, tmp_name); | |
6855 | ||
6856 | vma = myh->root.u.def.section->output_section->vma | |
6857 | + myh->root.u.def.section->output_offset | |
6858 | + myh->root.u.def.value; | |
6859 | ||
6860 | errnode->u.b.veneer->vma = vma; | |
6861 | break; | |
6862 | ||
6863 | case VFP11_ERRATUM_ARM_VENEER: | |
6864 | case VFP11_ERRATUM_THUMB_VENEER: | |
6865 | /* Find return location. */ | |
6866 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6867 | errnode->u.v.id); | |
6868 | ||
6869 | myh = elf_link_hash_lookup | |
6870 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
6871 | ||
6872 | if (myh == NULL) | |
6873 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
6874 | "`%s'"), abfd, tmp_name); | |
6875 | ||
6876 | vma = myh->root.u.def.section->output_section->vma | |
6877 | + myh->root.u.def.section->output_offset | |
6878 | + myh->root.u.def.value; | |
6879 | ||
6880 | errnode->u.v.branch->vma = vma; | |
6881 | break; | |
906e58ca | 6882 | |
c7b8f16e JB |
6883 | default: |
6884 | abort (); | |
6885 | } | |
6886 | } | |
6887 | } | |
906e58ca | 6888 | |
c7b8f16e JB |
6889 | free (tmp_name); |
6890 | } | |
6891 | ||
6892 | ||
eb043451 PB |
6893 | /* Set target relocation values needed during linking. */ |
6894 | ||
6895 | void | |
bf21ed78 MS |
6896 | bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, |
6897 | struct bfd_link_info *link_info, | |
eb043451 | 6898 | int target1_is_rel, |
319850b4 | 6899 | char * target2_type, |
33bfe774 | 6900 | int fix_v4bx, |
c7b8f16e | 6901 | int use_blx, |
bf21ed78 | 6902 | bfd_arm_vfp11_fix vfp11_fix, |
a9dc9481 | 6903 | int no_enum_warn, int no_wchar_warn, |
2de70689 MGD |
6904 | int pic_veneer, int fix_cortex_a8, |
6905 | int fix_arm1176) | |
eb043451 PB |
6906 | { |
6907 | struct elf32_arm_link_hash_table *globals; | |
6908 | ||
6909 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
6910 | if (globals == NULL) |
6911 | return; | |
eb043451 PB |
6912 | |
6913 | globals->target1_is_rel = target1_is_rel; | |
6914 | if (strcmp (target2_type, "rel") == 0) | |
6915 | globals->target2_reloc = R_ARM_REL32; | |
eeac373a PB |
6916 | else if (strcmp (target2_type, "abs") == 0) |
6917 | globals->target2_reloc = R_ARM_ABS32; | |
eb043451 PB |
6918 | else if (strcmp (target2_type, "got-rel") == 0) |
6919 | globals->target2_reloc = R_ARM_GOT_PREL; | |
6920 | else | |
6921 | { | |
6922 | _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."), | |
6923 | target2_type); | |
6924 | } | |
319850b4 | 6925 | globals->fix_v4bx = fix_v4bx; |
33bfe774 | 6926 | globals->use_blx |= use_blx; |
c7b8f16e | 6927 | globals->vfp11_fix = vfp11_fix; |
27e55c4d | 6928 | globals->pic_veneer = pic_veneer; |
48229727 | 6929 | globals->fix_cortex_a8 = fix_cortex_a8; |
2de70689 | 6930 | globals->fix_arm1176 = fix_arm1176; |
bf21ed78 | 6931 | |
0ffa91dd NC |
6932 | BFD_ASSERT (is_arm_elf (output_bfd)); |
6933 | elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; | |
a9dc9481 | 6934 | elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn; |
eb043451 | 6935 | } |
eb043451 | 6936 | |
12a0a0fd | 6937 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 6938 | |
12a0a0fd PB |
6939 | static void |
6940 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
6941 | { | |
6942 | bfd_vma upper; | |
6943 | bfd_vma lower; | |
6944 | int reloc_sign; | |
6945 | ||
6946 | BFD_ASSERT ((offset & 1) == 0); | |
6947 | ||
6948 | upper = bfd_get_16 (abfd, insn); | |
6949 | lower = bfd_get_16 (abfd, insn + 2); | |
6950 | reloc_sign = (offset < 0) ? 1 : 0; | |
6951 | upper = (upper & ~(bfd_vma) 0x7ff) | |
6952 | | ((offset >> 12) & 0x3ff) | |
6953 | | (reloc_sign << 10); | |
906e58ca | 6954 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
6955 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
6956 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
6957 | | ((offset >> 1) & 0x7ff); | |
6958 | bfd_put_16 (abfd, upper, insn); | |
6959 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
6960 | } |
6961 | ||
9b485d32 NC |
6962 | /* Thumb code calling an ARM function. */ |
6963 | ||
252b5132 | 6964 | static int |
57e8b36a NC |
6965 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
6966 | const char * name, | |
6967 | bfd * input_bfd, | |
6968 | bfd * output_bfd, | |
6969 | asection * input_section, | |
6970 | bfd_byte * hit_data, | |
6971 | asection * sym_sec, | |
6972 | bfd_vma offset, | |
6973 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
6974 | bfd_vma val, |
6975 | char **error_message) | |
252b5132 | 6976 | { |
bcbdc74c | 6977 | asection * s = 0; |
dc810e39 | 6978 | bfd_vma my_offset; |
252b5132 | 6979 | long int ret_offset; |
bcbdc74c NC |
6980 | struct elf_link_hash_entry * myh; |
6981 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 6982 | |
f2a9dd69 | 6983 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 6984 | if (myh == NULL) |
b34976b6 | 6985 | return FALSE; |
252b5132 RH |
6986 | |
6987 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
6988 | BFD_ASSERT (globals != NULL); |
6989 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6990 | ||
6991 | my_offset = myh->root.u.def.value; | |
6992 | ||
3d4d4302 AM |
6993 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
6994 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 RH |
6995 | |
6996 | BFD_ASSERT (s != NULL); | |
6997 | BFD_ASSERT (s->contents != NULL); | |
6998 | BFD_ASSERT (s->output_section != NULL); | |
6999 | ||
7000 | if ((my_offset & 0x01) == 0x01) | |
7001 | { | |
7002 | if (sym_sec != NULL | |
7003 | && sym_sec->owner != NULL | |
7004 | && !INTERWORK_FLAG (sym_sec->owner)) | |
7005 | { | |
8f615d07 | 7006 | (*_bfd_error_handler) |
d003868e | 7007 | (_("%B(%s): warning: interworking not enabled.\n" |
3aaeb7d3 | 7008 | " first occurrence: %B: Thumb call to ARM"), |
d003868e | 7009 | sym_sec->owner, input_bfd, name); |
252b5132 | 7010 | |
b34976b6 | 7011 | return FALSE; |
252b5132 RH |
7012 | } |
7013 | ||
7014 | --my_offset; | |
7015 | myh->root.u.def.value = my_offset; | |
7016 | ||
52ab56c2 PB |
7017 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
7018 | s->contents + my_offset); | |
252b5132 | 7019 | |
52ab56c2 PB |
7020 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
7021 | s->contents + my_offset + 2); | |
252b5132 RH |
7022 | |
7023 | ret_offset = | |
9b485d32 NC |
7024 | /* Address of destination of the stub. */ |
7025 | ((bfd_signed_vma) val) | |
252b5132 | 7026 | - ((bfd_signed_vma) |
57e8b36a NC |
7027 | /* Offset from the start of the current section |
7028 | to the start of the stubs. */ | |
9b485d32 NC |
7029 | (s->output_offset |
7030 | /* Offset of the start of this stub from the start of the stubs. */ | |
7031 | + my_offset | |
7032 | /* Address of the start of the current section. */ | |
7033 | + s->output_section->vma) | |
7034 | /* The branch instruction is 4 bytes into the stub. */ | |
7035 | + 4 | |
7036 | /* ARM branches work from the pc of the instruction + 8. */ | |
7037 | + 8); | |
252b5132 | 7038 | |
52ab56c2 PB |
7039 | put_arm_insn (globals, output_bfd, |
7040 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
7041 | s->contents + my_offset + 4); | |
252b5132 RH |
7042 | } |
7043 | ||
7044 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
7045 | ||
427bfd90 NC |
7046 | /* Now go back and fix up the original BL insn to point to here. */ |
7047 | ret_offset = | |
7048 | /* Address of where the stub is located. */ | |
7049 | (s->output_section->vma + s->output_offset + my_offset) | |
7050 | /* Address of where the BL is located. */ | |
57e8b36a NC |
7051 | - (input_section->output_section->vma + input_section->output_offset |
7052 | + offset) | |
427bfd90 NC |
7053 | /* Addend in the relocation. */ |
7054 | - addend | |
7055 | /* Biassing for PC-relative addressing. */ | |
7056 | - 8; | |
252b5132 | 7057 | |
12a0a0fd | 7058 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 7059 | |
b34976b6 | 7060 | return TRUE; |
252b5132 RH |
7061 | } |
7062 | ||
a4fd1a8e | 7063 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 7064 | |
a4fd1a8e PB |
7065 | static struct elf_link_hash_entry * |
7066 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
7067 | const char * name, | |
7068 | bfd * input_bfd, | |
7069 | bfd * output_bfd, | |
7070 | asection * sym_sec, | |
7071 | bfd_vma val, | |
8029a119 NC |
7072 | asection * s, |
7073 | char ** error_message) | |
252b5132 | 7074 | { |
dc810e39 | 7075 | bfd_vma my_offset; |
252b5132 | 7076 | long int ret_offset; |
bcbdc74c NC |
7077 | struct elf_link_hash_entry * myh; |
7078 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 7079 | |
f2a9dd69 | 7080 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 7081 | if (myh == NULL) |
a4fd1a8e | 7082 | return NULL; |
252b5132 RH |
7083 | |
7084 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
7085 | BFD_ASSERT (globals != NULL); |
7086 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7087 | ||
7088 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
7089 | |
7090 | if ((my_offset & 0x01) == 0x01) | |
7091 | { | |
7092 | if (sym_sec != NULL | |
7093 | && sym_sec->owner != NULL | |
7094 | && !INTERWORK_FLAG (sym_sec->owner)) | |
7095 | { | |
8f615d07 | 7096 | (*_bfd_error_handler) |
d003868e AM |
7097 | (_("%B(%s): warning: interworking not enabled.\n" |
7098 | " first occurrence: %B: arm call to thumb"), | |
7099 | sym_sec->owner, input_bfd, name); | |
252b5132 | 7100 | } |
9b485d32 | 7101 | |
252b5132 RH |
7102 | --my_offset; |
7103 | myh->root.u.def.value = my_offset; | |
7104 | ||
27e55c4d PB |
7105 | if (info->shared || globals->root.is_relocatable_executable |
7106 | || globals->pic_veneer) | |
8f6277f5 PB |
7107 | { |
7108 | /* For relocatable objects we can't use absolute addresses, | |
7109 | so construct the address from a relative offset. */ | |
7110 | /* TODO: If the offset is small it's probably worth | |
7111 | constructing the address with adds. */ | |
52ab56c2 PB |
7112 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
7113 | s->contents + my_offset); | |
7114 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
7115 | s->contents + my_offset + 4); | |
7116 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
7117 | s->contents + my_offset + 8); | |
8f6277f5 PB |
7118 | /* Adjust the offset by 4 for the position of the add, |
7119 | and 8 for the pipeline offset. */ | |
7120 | ret_offset = (val - (s->output_offset | |
7121 | + s->output_section->vma | |
7122 | + my_offset + 12)) | |
7123 | | 1; | |
7124 | bfd_put_32 (output_bfd, ret_offset, | |
7125 | s->contents + my_offset + 12); | |
7126 | } | |
26079076 PB |
7127 | else if (globals->use_blx) |
7128 | { | |
7129 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
7130 | s->contents + my_offset); | |
7131 | ||
7132 | /* It's a thumb address. Add the low order bit. */ | |
7133 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
7134 | s->contents + my_offset + 4); | |
7135 | } | |
8f6277f5 PB |
7136 | else |
7137 | { | |
52ab56c2 PB |
7138 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
7139 | s->contents + my_offset); | |
252b5132 | 7140 | |
52ab56c2 PB |
7141 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
7142 | s->contents + my_offset + 4); | |
252b5132 | 7143 | |
8f6277f5 PB |
7144 | /* It's a thumb address. Add the low order bit. */ |
7145 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
7146 | s->contents + my_offset + 8); | |
8029a119 NC |
7147 | |
7148 | my_offset += 12; | |
8f6277f5 | 7149 | } |
252b5132 RH |
7150 | } |
7151 | ||
7152 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
7153 | ||
a4fd1a8e PB |
7154 | return myh; |
7155 | } | |
7156 | ||
7157 | /* Arm code calling a Thumb function. */ | |
7158 | ||
7159 | static int | |
7160 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
7161 | const char * name, | |
7162 | bfd * input_bfd, | |
7163 | bfd * output_bfd, | |
7164 | asection * input_section, | |
7165 | bfd_byte * hit_data, | |
7166 | asection * sym_sec, | |
7167 | bfd_vma offset, | |
7168 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
7169 | bfd_vma val, |
7170 | char **error_message) | |
a4fd1a8e PB |
7171 | { |
7172 | unsigned long int tmp; | |
7173 | bfd_vma my_offset; | |
7174 | asection * s; | |
7175 | long int ret_offset; | |
7176 | struct elf_link_hash_entry * myh; | |
7177 | struct elf32_arm_link_hash_table * globals; | |
7178 | ||
7179 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
7180 | BFD_ASSERT (globals != NULL); |
7181 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7182 | ||
3d4d4302 AM |
7183 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
7184 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
7185 | BFD_ASSERT (s != NULL); |
7186 | BFD_ASSERT (s->contents != NULL); | |
7187 | BFD_ASSERT (s->output_section != NULL); | |
7188 | ||
7189 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 7190 | sym_sec, val, s, error_message); |
a4fd1a8e PB |
7191 | if (!myh) |
7192 | return FALSE; | |
7193 | ||
7194 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
7195 | tmp = bfd_get_32 (input_bfd, hit_data); |
7196 | tmp = tmp & 0xFF000000; | |
7197 | ||
9b485d32 | 7198 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
7199 | ret_offset = (s->output_offset |
7200 | + my_offset | |
7201 | + s->output_section->vma | |
7202 | - (input_section->output_offset | |
7203 | + input_section->output_section->vma | |
7204 | + offset + addend) | |
7205 | - 8); | |
9a5aca8c | 7206 | |
252b5132 RH |
7207 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
7208 | ||
dc810e39 | 7209 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 7210 | |
b34976b6 | 7211 | return TRUE; |
252b5132 RH |
7212 | } |
7213 | ||
a4fd1a8e PB |
7214 | /* Populate Arm stub for an exported Thumb function. */ |
7215 | ||
7216 | static bfd_boolean | |
7217 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) | |
7218 | { | |
7219 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
7220 | asection * s; | |
7221 | struct elf_link_hash_entry * myh; | |
7222 | struct elf32_arm_link_hash_entry *eh; | |
7223 | struct elf32_arm_link_hash_table * globals; | |
7224 | asection *sec; | |
7225 | bfd_vma val; | |
f2a9dd69 | 7226 | char *error_message; |
a4fd1a8e | 7227 | |
906e58ca | 7228 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
7229 | /* Allocate stubs for exported Thumb functions on v4t. */ |
7230 | if (eh->export_glue == NULL) | |
7231 | return TRUE; | |
7232 | ||
7233 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
7234 | BFD_ASSERT (globals != NULL); |
7235 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7236 | ||
3d4d4302 AM |
7237 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
7238 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
7239 | BFD_ASSERT (s != NULL); |
7240 | BFD_ASSERT (s->contents != NULL); | |
7241 | BFD_ASSERT (s->output_section != NULL); | |
7242 | ||
7243 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
7244 | |
7245 | BFD_ASSERT (sec->output_section != NULL); | |
7246 | ||
a4fd1a8e PB |
7247 | val = eh->export_glue->root.u.def.value + sec->output_offset |
7248 | + sec->output_section->vma; | |
8029a119 | 7249 | |
a4fd1a8e PB |
7250 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
7251 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
7252 | globals->obfd, sec, val, s, |
7253 | &error_message); | |
a4fd1a8e PB |
7254 | BFD_ASSERT (myh); |
7255 | return TRUE; | |
7256 | } | |
7257 | ||
845b51d6 PB |
7258 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
7259 | ||
7260 | static bfd_vma | |
7261 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
7262 | { | |
7263 | bfd_byte *p; | |
7264 | bfd_vma glue_addr; | |
7265 | asection *s; | |
7266 | struct elf32_arm_link_hash_table *globals; | |
7267 | ||
7268 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
7269 | BFD_ASSERT (globals != NULL); |
7270 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
7271 | ||
3d4d4302 AM |
7272 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
7273 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
7274 | BFD_ASSERT (s != NULL); |
7275 | BFD_ASSERT (s->contents != NULL); | |
7276 | BFD_ASSERT (s->output_section != NULL); | |
7277 | ||
7278 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
7279 | ||
7280 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
7281 | ||
7282 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
7283 | { | |
7284 | p = s->contents + glue_addr; | |
7285 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
7286 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
7287 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
7288 | globals->bx_glue_offset[reg] |= 1; | |
7289 | } | |
7290 | ||
7291 | return glue_addr + s->output_section->vma + s->output_offset; | |
7292 | } | |
7293 | ||
a4fd1a8e PB |
7294 | /* Generate Arm stubs for exported Thumb symbols. */ |
7295 | static void | |
906e58ca | 7296 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
7297 | struct bfd_link_info *link_info) |
7298 | { | |
7299 | struct elf32_arm_link_hash_table * globals; | |
7300 | ||
8029a119 NC |
7301 | if (link_info == NULL) |
7302 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
7303 | return; |
7304 | ||
7305 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
7306 | if (globals == NULL) |
7307 | return; | |
7308 | ||
84c08195 PB |
7309 | /* If blx is available then exported Thumb symbols are OK and there is |
7310 | nothing to do. */ | |
a4fd1a8e PB |
7311 | if (globals->use_blx) |
7312 | return; | |
7313 | ||
7314 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
7315 | link_info); | |
7316 | } | |
7317 | ||
47beaa6a RS |
7318 | /* Reserve space for COUNT dynamic relocations in relocation selection |
7319 | SRELOC. */ | |
7320 | ||
7321 | static void | |
7322 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, | |
7323 | bfd_size_type count) | |
7324 | { | |
7325 | struct elf32_arm_link_hash_table *htab; | |
7326 | ||
7327 | htab = elf32_arm_hash_table (info); | |
7328 | BFD_ASSERT (htab->root.dynamic_sections_created); | |
7329 | if (sreloc == NULL) | |
7330 | abort (); | |
7331 | sreloc->size += RELOC_SIZE (htab) * count; | |
7332 | } | |
7333 | ||
34e77a92 RS |
7334 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
7335 | dynamic, the relocations should go in SRELOC, otherwise they should | |
7336 | go in the special .rel.iplt section. */ | |
7337 | ||
7338 | static void | |
7339 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, | |
7340 | bfd_size_type count) | |
7341 | { | |
7342 | struct elf32_arm_link_hash_table *htab; | |
7343 | ||
7344 | htab = elf32_arm_hash_table (info); | |
7345 | if (!htab->root.dynamic_sections_created) | |
7346 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; | |
7347 | else | |
7348 | { | |
7349 | BFD_ASSERT (sreloc != NULL); | |
7350 | sreloc->size += RELOC_SIZE (htab) * count; | |
7351 | } | |
7352 | } | |
7353 | ||
47beaa6a RS |
7354 | /* Add relocation REL to the end of relocation section SRELOC. */ |
7355 | ||
7356 | static void | |
7357 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, | |
7358 | asection *sreloc, Elf_Internal_Rela *rel) | |
7359 | { | |
7360 | bfd_byte *loc; | |
7361 | struct elf32_arm_link_hash_table *htab; | |
7362 | ||
7363 | htab = elf32_arm_hash_table (info); | |
34e77a92 RS |
7364 | if (!htab->root.dynamic_sections_created |
7365 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) | |
7366 | sreloc = htab->root.irelplt; | |
47beaa6a RS |
7367 | if (sreloc == NULL) |
7368 | abort (); | |
7369 | loc = sreloc->contents; | |
7370 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); | |
7371 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) | |
7372 | abort (); | |
7373 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); | |
7374 | } | |
7375 | ||
34e77a92 RS |
7376 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
7377 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than | |
7378 | to .plt. */ | |
7379 | ||
7380 | static void | |
7381 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, | |
7382 | bfd_boolean is_iplt_entry, | |
7383 | union gotplt_union *root_plt, | |
7384 | struct arm_plt_info *arm_plt) | |
7385 | { | |
7386 | struct elf32_arm_link_hash_table *htab; | |
7387 | asection *splt; | |
7388 | asection *sgotplt; | |
7389 | ||
7390 | htab = elf32_arm_hash_table (info); | |
7391 | ||
7392 | if (is_iplt_entry) | |
7393 | { | |
7394 | splt = htab->root.iplt; | |
7395 | sgotplt = htab->root.igotplt; | |
7396 | ||
7397 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ | |
7398 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); | |
7399 | } | |
7400 | else | |
7401 | { | |
7402 | splt = htab->root.splt; | |
7403 | sgotplt = htab->root.sgotplt; | |
7404 | ||
7405 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ | |
7406 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
7407 | ||
7408 | /* If this is the first .plt entry, make room for the special | |
7409 | first entry. */ | |
7410 | if (splt->size == 0) | |
7411 | splt->size += htab->plt_header_size; | |
7412 | } | |
7413 | ||
7414 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ | |
7415 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
7416 | splt->size += PLT_THUMB_STUB_SIZE; | |
7417 | root_plt->offset = splt->size; | |
7418 | splt->size += htab->plt_entry_size; | |
7419 | ||
7420 | if (!htab->symbian_p) | |
7421 | { | |
7422 | /* We also need to make an entry in the .got.plt section, which | |
7423 | will be placed in the .got section by the linker script. */ | |
7424 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; | |
7425 | sgotplt->size += 4; | |
7426 | } | |
7427 | } | |
7428 | ||
b38cadfb NC |
7429 | static bfd_vma |
7430 | arm_movw_immediate (bfd_vma value) | |
7431 | { | |
7432 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); | |
7433 | } | |
7434 | ||
7435 | static bfd_vma | |
7436 | arm_movt_immediate (bfd_vma value) | |
7437 | { | |
7438 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); | |
7439 | } | |
7440 | ||
34e77a92 RS |
7441 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, |
7442 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). | |
7443 | Otherwise, DYNINDX is the index of the symbol in the dynamic | |
7444 | symbol table and SYM_VALUE is undefined. | |
7445 | ||
7446 | ROOT_PLT points to the offset of the PLT entry from the start of its | |
7447 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific | |
7448 | bookkeeping information. */ | |
7449 | ||
7450 | static void | |
7451 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, | |
7452 | union gotplt_union *root_plt, | |
7453 | struct arm_plt_info *arm_plt, | |
7454 | int dynindx, bfd_vma sym_value) | |
7455 | { | |
7456 | struct elf32_arm_link_hash_table *htab; | |
7457 | asection *sgot; | |
7458 | asection *splt; | |
7459 | asection *srel; | |
7460 | bfd_byte *loc; | |
7461 | bfd_vma plt_index; | |
7462 | Elf_Internal_Rela rel; | |
7463 | bfd_vma plt_header_size; | |
7464 | bfd_vma got_header_size; | |
7465 | ||
7466 | htab = elf32_arm_hash_table (info); | |
7467 | ||
7468 | /* Pick the appropriate sections and sizes. */ | |
7469 | if (dynindx == -1) | |
7470 | { | |
7471 | splt = htab->root.iplt; | |
7472 | sgot = htab->root.igotplt; | |
7473 | srel = htab->root.irelplt; | |
7474 | ||
7475 | /* There are no reserved entries in .igot.plt, and no special | |
7476 | first entry in .iplt. */ | |
7477 | got_header_size = 0; | |
7478 | plt_header_size = 0; | |
7479 | } | |
7480 | else | |
7481 | { | |
7482 | splt = htab->root.splt; | |
7483 | sgot = htab->root.sgotplt; | |
7484 | srel = htab->root.srelplt; | |
7485 | ||
7486 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; | |
7487 | plt_header_size = htab->plt_header_size; | |
7488 | } | |
7489 | BFD_ASSERT (splt != NULL && srel != NULL); | |
7490 | ||
7491 | /* Fill in the entry in the procedure linkage table. */ | |
7492 | if (htab->symbian_p) | |
7493 | { | |
7494 | BFD_ASSERT (dynindx >= 0); | |
7495 | put_arm_insn (htab, output_bfd, | |
7496 | elf32_arm_symbian_plt_entry[0], | |
7497 | splt->contents + root_plt->offset); | |
7498 | bfd_put_32 (output_bfd, | |
7499 | elf32_arm_symbian_plt_entry[1], | |
7500 | splt->contents + root_plt->offset + 4); | |
7501 | ||
7502 | /* Fill in the entry in the .rel.plt section. */ | |
7503 | rel.r_offset = (splt->output_section->vma | |
7504 | + splt->output_offset | |
7505 | + root_plt->offset + 4); | |
7506 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT); | |
7507 | ||
7508 | /* Get the index in the procedure linkage table which | |
7509 | corresponds to this symbol. This is the index of this symbol | |
7510 | in all the symbols for which we are making plt entries. The | |
7511 | first entry in the procedure linkage table is reserved. */ | |
7512 | plt_index = ((root_plt->offset - plt_header_size) | |
7513 | / htab->plt_entry_size); | |
7514 | } | |
7515 | else | |
7516 | { | |
7517 | bfd_vma got_offset, got_address, plt_address; | |
7518 | bfd_vma got_displacement, initial_got_entry; | |
7519 | bfd_byte * ptr; | |
7520 | ||
7521 | BFD_ASSERT (sgot != NULL); | |
7522 | ||
7523 | /* Get the offset into the .(i)got.plt table of the entry that | |
7524 | corresponds to this function. */ | |
7525 | got_offset = (arm_plt->got_offset & -2); | |
7526 | ||
7527 | /* Get the index in the procedure linkage table which | |
7528 | corresponds to this symbol. This is the index of this symbol | |
7529 | in all the symbols for which we are making plt entries. | |
7530 | After the reserved .got.plt entries, all symbols appear in | |
7531 | the same order as in .plt. */ | |
7532 | plt_index = (got_offset - got_header_size) / 4; | |
7533 | ||
7534 | /* Calculate the address of the GOT entry. */ | |
7535 | got_address = (sgot->output_section->vma | |
7536 | + sgot->output_offset | |
7537 | + got_offset); | |
7538 | ||
7539 | /* ...and the address of the PLT entry. */ | |
7540 | plt_address = (splt->output_section->vma | |
7541 | + splt->output_offset | |
7542 | + root_plt->offset); | |
7543 | ||
7544 | ptr = splt->contents + root_plt->offset; | |
7545 | if (htab->vxworks_p && info->shared) | |
7546 | { | |
7547 | unsigned int i; | |
7548 | bfd_vma val; | |
7549 | ||
7550 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
7551 | { | |
7552 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
7553 | if (i == 2) | |
7554 | val |= got_address - sgot->output_section->vma; | |
7555 | if (i == 5) | |
7556 | val |= plt_index * RELOC_SIZE (htab); | |
7557 | if (i == 2 || i == 5) | |
7558 | bfd_put_32 (output_bfd, val, ptr); | |
7559 | else | |
7560 | put_arm_insn (htab, output_bfd, val, ptr); | |
7561 | } | |
7562 | } | |
7563 | else if (htab->vxworks_p) | |
7564 | { | |
7565 | unsigned int i; | |
7566 | bfd_vma val; | |
7567 | ||
7568 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
7569 | { | |
7570 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
7571 | if (i == 2) | |
7572 | val |= got_address; | |
7573 | if (i == 4) | |
7574 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); | |
7575 | if (i == 5) | |
7576 | val |= plt_index * RELOC_SIZE (htab); | |
7577 | if (i == 2 || i == 5) | |
7578 | bfd_put_32 (output_bfd, val, ptr); | |
7579 | else | |
7580 | put_arm_insn (htab, output_bfd, val, ptr); | |
7581 | } | |
7582 | ||
7583 | loc = (htab->srelplt2->contents | |
7584 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
7585 | ||
7586 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation | |
7587 | referencing the GOT for this PLT entry. */ | |
7588 | rel.r_offset = plt_address + 8; | |
7589 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
7590 | rel.r_addend = got_offset; | |
7591 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
7592 | loc += RELOC_SIZE (htab); | |
7593 | ||
7594 | /* Create the R_ARM_ABS32 relocation referencing the | |
7595 | beginning of the PLT for this GOT entry. */ | |
7596 | rel.r_offset = got_address; | |
7597 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
7598 | rel.r_addend = 0; | |
7599 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
7600 | } | |
b38cadfb NC |
7601 | else if (htab->nacl_p) |
7602 | { | |
7603 | /* Calculate the displacement between the PLT slot and the | |
7604 | common tail that's part of the special initial PLT slot. */ | |
6034aab8 | 7605 | int32_t tail_displacement |
b38cadfb NC |
7606 | = ((splt->output_section->vma + splt->output_offset |
7607 | + ARM_NACL_PLT_TAIL_OFFSET) | |
7608 | - (plt_address + htab->plt_entry_size + 4)); | |
7609 | BFD_ASSERT ((tail_displacement & 3) == 0); | |
7610 | tail_displacement >>= 2; | |
7611 | ||
7612 | BFD_ASSERT ((tail_displacement & 0xff000000) == 0 | |
7613 | || (-tail_displacement & 0xff000000) == 0); | |
7614 | ||
7615 | /* Calculate the displacement between the PLT slot and the entry | |
7616 | in the GOT. The offset accounts for the value produced by | |
7617 | adding to pc in the penultimate instruction of the PLT stub. */ | |
6034aab8 RM |
7618 | got_displacement = (got_address |
7619 | - (plt_address + htab->plt_entry_size)); | |
b38cadfb NC |
7620 | |
7621 | /* NaCl does not support interworking at all. */ | |
7622 | BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)); | |
7623 | ||
7624 | put_arm_insn (htab, output_bfd, | |
7625 | elf32_arm_nacl_plt_entry[0] | |
7626 | | arm_movw_immediate (got_displacement), | |
7627 | ptr + 0); | |
7628 | put_arm_insn (htab, output_bfd, | |
7629 | elf32_arm_nacl_plt_entry[1] | |
7630 | | arm_movt_immediate (got_displacement), | |
7631 | ptr + 4); | |
7632 | put_arm_insn (htab, output_bfd, | |
7633 | elf32_arm_nacl_plt_entry[2], | |
7634 | ptr + 8); | |
7635 | put_arm_insn (htab, output_bfd, | |
7636 | elf32_arm_nacl_plt_entry[3] | |
7637 | | (tail_displacement & 0x00ffffff), | |
7638 | ptr + 12); | |
7639 | } | |
34e77a92 RS |
7640 | else |
7641 | { | |
7642 | /* Calculate the displacement between the PLT slot and the | |
7643 | entry in the GOT. The eight-byte offset accounts for the | |
7644 | value produced by adding to pc in the first instruction | |
7645 | of the PLT stub. */ | |
7646 | got_displacement = got_address - (plt_address + 8); | |
7647 | ||
7648 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); | |
7649 | ||
7650 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
7651 | { | |
7652 | put_thumb_insn (htab, output_bfd, | |
7653 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
7654 | put_thumb_insn (htab, output_bfd, | |
7655 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
7656 | } | |
7657 | ||
7658 | put_arm_insn (htab, output_bfd, | |
7659 | elf32_arm_plt_entry[0] | |
7660 | | ((got_displacement & 0x0ff00000) >> 20), | |
7661 | ptr + 0); | |
7662 | put_arm_insn (htab, output_bfd, | |
7663 | elf32_arm_plt_entry[1] | |
7664 | | ((got_displacement & 0x000ff000) >> 12), | |
7665 | ptr+ 4); | |
7666 | put_arm_insn (htab, output_bfd, | |
7667 | elf32_arm_plt_entry[2] | |
7668 | | (got_displacement & 0x00000fff), | |
7669 | ptr + 8); | |
7670 | #ifdef FOUR_WORD_PLT | |
7671 | bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12); | |
7672 | #endif | |
7673 | } | |
7674 | ||
7675 | /* Fill in the entry in the .rel(a).(i)plt section. */ | |
7676 | rel.r_offset = got_address; | |
7677 | rel.r_addend = 0; | |
7678 | if (dynindx == -1) | |
7679 | { | |
7680 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. | |
7681 | The dynamic linker or static executable then calls SYM_VALUE | |
7682 | to determine the correct run-time value of the .igot.plt entry. */ | |
7683 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
7684 | initial_got_entry = sym_value; | |
7685 | } | |
7686 | else | |
7687 | { | |
7688 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); | |
7689 | initial_got_entry = (splt->output_section->vma | |
7690 | + splt->output_offset); | |
7691 | } | |
7692 | ||
7693 | /* Fill in the entry in the global offset table. */ | |
7694 | bfd_put_32 (output_bfd, initial_got_entry, | |
7695 | sgot->contents + got_offset); | |
7696 | } | |
7697 | ||
7698 | loc = srel->contents + plt_index * RELOC_SIZE (htab); | |
7699 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
7700 | } | |
7701 | ||
eb043451 PB |
7702 | /* Some relocations map to different relocations depending on the |
7703 | target. Return the real relocation. */ | |
8029a119 | 7704 | |
eb043451 PB |
7705 | static int |
7706 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
7707 | int r_type) | |
7708 | { | |
7709 | switch (r_type) | |
7710 | { | |
7711 | case R_ARM_TARGET1: | |
7712 | if (globals->target1_is_rel) | |
7713 | return R_ARM_REL32; | |
7714 | else | |
7715 | return R_ARM_ABS32; | |
7716 | ||
7717 | case R_ARM_TARGET2: | |
7718 | return globals->target2_reloc; | |
7719 | ||
7720 | default: | |
7721 | return r_type; | |
7722 | } | |
7723 | } | |
eb043451 | 7724 | |
ba93b8ac DJ |
7725 | /* Return the base VMA address which should be subtracted from real addresses |
7726 | when resolving @dtpoff relocation. | |
7727 | This is PT_TLS segment p_vaddr. */ | |
7728 | ||
7729 | static bfd_vma | |
7730 | dtpoff_base (struct bfd_link_info *info) | |
7731 | { | |
7732 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
7733 | if (elf_hash_table (info)->tls_sec == NULL) | |
7734 | return 0; | |
7735 | return elf_hash_table (info)->tls_sec->vma; | |
7736 | } | |
7737 | ||
7738 | /* Return the relocation value for @tpoff relocation | |
7739 | if STT_TLS virtual address is ADDRESS. */ | |
7740 | ||
7741 | static bfd_vma | |
7742 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
7743 | { | |
7744 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
7745 | bfd_vma base; | |
7746 | ||
7747 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
7748 | if (htab->tls_sec == NULL) | |
7749 | return 0; | |
7750 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
7751 | return address - htab->tls_sec->vma + base; | |
7752 | } | |
7753 | ||
00a97672 RS |
7754 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
7755 | VALUE is the relocation value. */ | |
7756 | ||
7757 | static bfd_reloc_status_type | |
7758 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
7759 | { | |
7760 | if (value > 0xfff) | |
7761 | return bfd_reloc_overflow; | |
7762 | ||
7763 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
7764 | bfd_put_32 (abfd, value, data); | |
7765 | return bfd_reloc_ok; | |
7766 | } | |
7767 | ||
0855e32b NS |
7768 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
7769 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or | |
7770 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. | |
7771 | ||
7772 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller | |
7773 | is to then call final_link_relocate. Return other values in the | |
62672b10 NS |
7774 | case of error. |
7775 | ||
7776 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing | |
7777 | the pre-relaxed code. It would be nice if the relocs were updated | |
7778 | to match the optimization. */ | |
0855e32b | 7779 | |
b38cadfb | 7780 | static bfd_reloc_status_type |
0855e32b | 7781 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, |
b38cadfb | 7782 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, |
0855e32b NS |
7783 | Elf_Internal_Rela *rel, unsigned long is_local) |
7784 | { | |
7785 | unsigned long insn; | |
b38cadfb | 7786 | |
0855e32b NS |
7787 | switch (ELF32_R_TYPE (rel->r_info)) |
7788 | { | |
7789 | default: | |
7790 | return bfd_reloc_notsupported; | |
b38cadfb | 7791 | |
0855e32b NS |
7792 | case R_ARM_TLS_GOTDESC: |
7793 | if (is_local) | |
7794 | insn = 0; | |
7795 | else | |
7796 | { | |
7797 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
7798 | if (insn & 1) | |
7799 | insn -= 5; /* THUMB */ | |
7800 | else | |
7801 | insn -= 8; /* ARM */ | |
7802 | } | |
7803 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
7804 | return bfd_reloc_continue; | |
7805 | ||
7806 | case R_ARM_THM_TLS_DESCSEQ: | |
7807 | /* Thumb insn. */ | |
7808 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); | |
7809 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ | |
7810 | { | |
7811 | if (is_local) | |
7812 | /* nop */ | |
7813 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
7814 | } | |
7815 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ | |
7816 | { | |
7817 | if (is_local) | |
7818 | /* nop */ | |
7819 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
7820 | else | |
7821 | /* ldr rx,[ry] */ | |
7822 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); | |
7823 | } | |
7824 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ | |
7825 | { | |
7826 | if (is_local) | |
7827 | /* nop */ | |
7828 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
7829 | else | |
7830 | /* mov r0, rx */ | |
7831 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), | |
7832 | contents + rel->r_offset); | |
7833 | } | |
7834 | else | |
7835 | { | |
7836 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
7837 | /* It's a 32 bit instruction, fetch the rest of it for | |
7838 | error generation. */ | |
7839 | insn = (insn << 16) | |
7840 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); | |
7841 | (*_bfd_error_handler) | |
7842 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"), | |
7843 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
7844 | return bfd_reloc_notsupported; | |
7845 | } | |
7846 | break; | |
b38cadfb | 7847 | |
0855e32b NS |
7848 | case R_ARM_TLS_DESCSEQ: |
7849 | /* arm insn. */ | |
7850 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
7851 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ | |
7852 | { | |
7853 | if (is_local) | |
7854 | /* mov rx, ry */ | |
7855 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), | |
7856 | contents + rel->r_offset); | |
7857 | } | |
7858 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ | |
7859 | { | |
7860 | if (is_local) | |
7861 | /* nop */ | |
7862 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
7863 | else | |
7864 | /* ldr rx,[ry] */ | |
7865 | bfd_put_32 (input_bfd, insn & 0xfffff000, | |
7866 | contents + rel->r_offset); | |
7867 | } | |
7868 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ | |
7869 | { | |
7870 | if (is_local) | |
7871 | /* nop */ | |
7872 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
7873 | else | |
7874 | /* mov r0, rx */ | |
7875 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), | |
7876 | contents + rel->r_offset); | |
7877 | } | |
7878 | else | |
7879 | { | |
7880 | (*_bfd_error_handler) | |
7881 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"), | |
7882 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
7883 | return bfd_reloc_notsupported; | |
7884 | } | |
7885 | break; | |
7886 | ||
7887 | case R_ARM_TLS_CALL: | |
7888 | /* GD->IE relaxation, turn the instruction into 'nop' or | |
7889 | 'ldr r0, [pc,r0]' */ | |
7890 | insn = is_local ? 0xe1a00000 : 0xe79f0000; | |
7891 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
7892 | break; | |
b38cadfb | 7893 | |
0855e32b NS |
7894 | case R_ARM_THM_TLS_CALL: |
7895 | /* GD->IE relaxation */ | |
7896 | if (!is_local) | |
7897 | /* add r0,pc; ldr r0, [r0] */ | |
7898 | insn = 0x44786800; | |
7899 | else if (arch_has_thumb2_nop (globals)) | |
7900 | /* nop.w */ | |
7901 | insn = 0xf3af8000; | |
7902 | else | |
7903 | /* nop; nop */ | |
7904 | insn = 0xbf00bf00; | |
b38cadfb | 7905 | |
0855e32b NS |
7906 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); |
7907 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); | |
7908 | break; | |
7909 | } | |
7910 | return bfd_reloc_ok; | |
7911 | } | |
7912 | ||
4962c51a MS |
7913 | /* For a given value of n, calculate the value of G_n as required to |
7914 | deal with group relocations. We return it in the form of an | |
7915 | encoded constant-and-rotation, together with the final residual. If n is | |
7916 | specified as less than zero, then final_residual is filled with the | |
7917 | input value and no further action is performed. */ | |
7918 | ||
7919 | static bfd_vma | |
7920 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
7921 | { | |
7922 | int current_n; | |
7923 | bfd_vma g_n; | |
7924 | bfd_vma encoded_g_n = 0; | |
7925 | bfd_vma residual = value; /* Also known as Y_n. */ | |
7926 | ||
7927 | for (current_n = 0; current_n <= n; current_n++) | |
7928 | { | |
7929 | int shift; | |
7930 | ||
7931 | /* Calculate which part of the value to mask. */ | |
7932 | if (residual == 0) | |
7933 | shift = 0; | |
7934 | else | |
7935 | { | |
7936 | int msb; | |
7937 | ||
7938 | /* Determine the most significant bit in the residual and | |
7939 | align the resulting value to a 2-bit boundary. */ | |
7940 | for (msb = 30; msb >= 0; msb -= 2) | |
7941 | if (residual & (3 << msb)) | |
7942 | break; | |
7943 | ||
7944 | /* The desired shift is now (msb - 6), or zero, whichever | |
7945 | is the greater. */ | |
7946 | shift = msb - 6; | |
7947 | if (shift < 0) | |
7948 | shift = 0; | |
7949 | } | |
7950 | ||
7951 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
7952 | g_n = residual & (0xff << shift); | |
7953 | encoded_g_n = (g_n >> shift) | |
7954 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); | |
7955 | ||
7956 | /* Calculate the residual for the next time around. */ | |
7957 | residual &= ~g_n; | |
7958 | } | |
7959 | ||
7960 | *final_residual = residual; | |
7961 | ||
7962 | return encoded_g_n; | |
7963 | } | |
7964 | ||
7965 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
7966 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 7967 | |
4962c51a | 7968 | static int |
906e58ca | 7969 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
7970 | { |
7971 | int opcode = insn & 0x1e00000; | |
7972 | ||
7973 | if (opcode == 1 << 23) /* ADD */ | |
7974 | return 1; | |
7975 | ||
7976 | if (opcode == 1 << 22) /* SUB */ | |
7977 | return -1; | |
7978 | ||
7979 | return 0; | |
7980 | } | |
7981 | ||
252b5132 | 7982 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 7983 | |
252b5132 | 7984 | static bfd_reloc_status_type |
57e8b36a NC |
7985 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
7986 | bfd * input_bfd, | |
7987 | bfd * output_bfd, | |
7988 | asection * input_section, | |
7989 | bfd_byte * contents, | |
7990 | Elf_Internal_Rela * rel, | |
7991 | bfd_vma value, | |
7992 | struct bfd_link_info * info, | |
7993 | asection * sym_sec, | |
7994 | const char * sym_name, | |
34e77a92 RS |
7995 | unsigned char st_type, |
7996 | enum arm_st_branch_type branch_type, | |
0945cdfd | 7997 | struct elf_link_hash_entry * h, |
f2a9dd69 | 7998 | bfd_boolean * unresolved_reloc_p, |
8029a119 | 7999 | char ** error_message) |
252b5132 RH |
8000 | { |
8001 | unsigned long r_type = howto->type; | |
8002 | unsigned long r_symndx; | |
8003 | bfd_byte * hit_data = contents + rel->r_offset; | |
252b5132 | 8004 | bfd_vma * local_got_offsets; |
0855e32b | 8005 | bfd_vma * local_tlsdesc_gotents; |
34e77a92 RS |
8006 | asection * sgot; |
8007 | asection * splt; | |
252b5132 | 8008 | asection * sreloc = NULL; |
362d30a1 | 8009 | asection * srelgot; |
252b5132 | 8010 | bfd_vma addend; |
ba96a88f | 8011 | bfd_signed_vma signed_addend; |
34e77a92 RS |
8012 | unsigned char dynreloc_st_type; |
8013 | bfd_vma dynreloc_value; | |
ba96a88f | 8014 | struct elf32_arm_link_hash_table * globals; |
34e77a92 RS |
8015 | struct elf32_arm_link_hash_entry *eh; |
8016 | union gotplt_union *root_plt; | |
8017 | struct arm_plt_info *arm_plt; | |
8018 | bfd_vma plt_offset; | |
8019 | bfd_vma gotplt_offset; | |
8020 | bfd_boolean has_iplt_entry; | |
f21f3fe0 | 8021 | |
9c504268 | 8022 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
8023 | if (globals == NULL) |
8024 | return bfd_reloc_notsupported; | |
9c504268 | 8025 | |
0ffa91dd NC |
8026 | BFD_ASSERT (is_arm_elf (input_bfd)); |
8027 | ||
8028 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 8029 | target. We pick the right one here. */ |
eb043451 | 8030 | r_type = arm_real_reloc_type (globals, r_type); |
0855e32b NS |
8031 | |
8032 | /* It is possible to have linker relaxations on some TLS access | |
8033 | models. Update our information here. */ | |
8034 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
8035 | ||
eb043451 PB |
8036 | if (r_type != howto->type) |
8037 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 8038 | |
cac15327 NC |
8039 | /* If the start address has been set, then set the EF_ARM_HASENTRY |
8040 | flag. Setting this more than once is redundant, but the cost is | |
8041 | not too high, and it keeps the code simple. | |
99e4ae17 | 8042 | |
cac15327 NC |
8043 | The test is done here, rather than somewhere else, because the |
8044 | start address is only set just before the final link commences. | |
8045 | ||
8046 | Note - if the user deliberately sets a start address of 0, the | |
8047 | flag will not be set. */ | |
8048 | if (bfd_get_start_address (output_bfd) != 0) | |
8049 | elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY; | |
99e4ae17 | 8050 | |
34e77a92 | 8051 | eh = (struct elf32_arm_link_hash_entry *) h; |
362d30a1 | 8052 | sgot = globals->root.sgot; |
252b5132 | 8053 | local_got_offsets = elf_local_got_offsets (input_bfd); |
0855e32b NS |
8054 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
8055 | ||
34e77a92 RS |
8056 | if (globals->root.dynamic_sections_created) |
8057 | srelgot = globals->root.srelgot; | |
8058 | else | |
8059 | srelgot = NULL; | |
8060 | ||
252b5132 RH |
8061 | r_symndx = ELF32_R_SYM (rel->r_info); |
8062 | ||
4e7fd91e | 8063 | if (globals->use_rel) |
ba96a88f | 8064 | { |
4e7fd91e PB |
8065 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
8066 | ||
8067 | if (addend & ((howto->src_mask + 1) >> 1)) | |
8068 | { | |
8069 | signed_addend = -1; | |
8070 | signed_addend &= ~ howto->src_mask; | |
8071 | signed_addend |= addend; | |
8072 | } | |
8073 | else | |
8074 | signed_addend = addend; | |
ba96a88f NC |
8075 | } |
8076 | else | |
4e7fd91e | 8077 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 8078 | |
34e77a92 RS |
8079 | /* Record the symbol information that should be used in dynamic |
8080 | relocations. */ | |
8081 | dynreloc_st_type = st_type; | |
8082 | dynreloc_value = value; | |
8083 | if (branch_type == ST_BRANCH_TO_THUMB) | |
8084 | dynreloc_value |= 1; | |
8085 | ||
8086 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and | |
8087 | VALUE appropriately for relocations that we resolve at link time. */ | |
8088 | has_iplt_entry = FALSE; | |
8089 | if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt) | |
8090 | && root_plt->offset != (bfd_vma) -1) | |
8091 | { | |
8092 | plt_offset = root_plt->offset; | |
8093 | gotplt_offset = arm_plt->got_offset; | |
8094 | ||
8095 | if (h == NULL || eh->is_iplt) | |
8096 | { | |
8097 | has_iplt_entry = TRUE; | |
8098 | splt = globals->root.iplt; | |
8099 | ||
8100 | /* Populate .iplt entries here, because not all of them will | |
8101 | be seen by finish_dynamic_symbol. The lower bit is set if | |
8102 | we have already populated the entry. */ | |
8103 | if (plt_offset & 1) | |
8104 | plt_offset--; | |
8105 | else | |
8106 | { | |
8107 | elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, | |
8108 | -1, dynreloc_value); | |
8109 | root_plt->offset |= 1; | |
8110 | } | |
8111 | ||
8112 | /* Static relocations always resolve to the .iplt entry. */ | |
8113 | st_type = STT_FUNC; | |
8114 | value = (splt->output_section->vma | |
8115 | + splt->output_offset | |
8116 | + plt_offset); | |
8117 | branch_type = ST_BRANCH_TO_ARM; | |
8118 | ||
8119 | /* If there are non-call relocations that resolve to the .iplt | |
8120 | entry, then all dynamic ones must too. */ | |
8121 | if (arm_plt->noncall_refcount != 0) | |
8122 | { | |
8123 | dynreloc_st_type = st_type; | |
8124 | dynreloc_value = value; | |
8125 | } | |
8126 | } | |
8127 | else | |
8128 | /* We populate the .plt entry in finish_dynamic_symbol. */ | |
8129 | splt = globals->root.splt; | |
8130 | } | |
8131 | else | |
8132 | { | |
8133 | splt = NULL; | |
8134 | plt_offset = (bfd_vma) -1; | |
8135 | gotplt_offset = (bfd_vma) -1; | |
8136 | } | |
8137 | ||
252b5132 RH |
8138 | switch (r_type) |
8139 | { | |
8140 | case R_ARM_NONE: | |
28a094c2 DJ |
8141 | /* We don't need to find a value for this symbol. It's just a |
8142 | marker. */ | |
8143 | *unresolved_reloc_p = FALSE; | |
252b5132 RH |
8144 | return bfd_reloc_ok; |
8145 | ||
00a97672 RS |
8146 | case R_ARM_ABS12: |
8147 | if (!globals->vxworks_p) | |
8148 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
8149 | ||
252b5132 RH |
8150 | case R_ARM_PC24: |
8151 | case R_ARM_ABS32: | |
bb224fc3 | 8152 | case R_ARM_ABS32_NOI: |
252b5132 | 8153 | case R_ARM_REL32: |
bb224fc3 | 8154 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
8155 | case R_ARM_CALL: |
8156 | case R_ARM_JUMP24: | |
dfc5f959 | 8157 | case R_ARM_XPC25: |
eb043451 | 8158 | case R_ARM_PREL31: |
7359ea65 | 8159 | case R_ARM_PLT32: |
7359ea65 DJ |
8160 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
8161 | will use the symbol's value, which may point to a PLT entry, but we | |
8162 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
8163 | branches in this object should go to it, except if the PLT is too |
8164 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 8165 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
5fa9e92f | 8166 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
8167 | && r_type != R_ARM_CALL |
8168 | && r_type != R_ARM_JUMP24 | |
8169 | && r_type != R_ARM_PLT32) | |
34e77a92 | 8170 | && plt_offset != (bfd_vma) -1) |
7359ea65 | 8171 | { |
34e77a92 RS |
8172 | /* If we've created a .plt section, and assigned a PLT entry |
8173 | to this function, it must either be a STT_GNU_IFUNC reference | |
8174 | or not be known to bind locally. In other cases, we should | |
8175 | have cleared the PLT entry by now. */ | |
8176 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); | |
7359ea65 DJ |
8177 | |
8178 | value = (splt->output_section->vma | |
8179 | + splt->output_offset | |
34e77a92 | 8180 | + plt_offset); |
0945cdfd | 8181 | *unresolved_reloc_p = FALSE; |
7359ea65 DJ |
8182 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
8183 | contents, rel->r_offset, value, | |
00a97672 | 8184 | rel->r_addend); |
7359ea65 DJ |
8185 | } |
8186 | ||
67687978 PB |
8187 | /* When generating a shared object or relocatable executable, these |
8188 | relocations are copied into the output file to be resolved at | |
8189 | run time. */ | |
8190 | if ((info->shared || globals->root.is_relocatable_executable) | |
7359ea65 | 8191 | && (input_section->flags & SEC_ALLOC) |
4dfe6ac6 | 8192 | && !(globals->vxworks_p |
3348747a NS |
8193 | && strcmp (input_section->output_section->name, |
8194 | ".tls_vars") == 0) | |
bb224fc3 | 8195 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 8196 | || !SYMBOL_CALLS_LOCAL (info, h)) |
ca6b5f82 AM |
8197 | && !(input_bfd == globals->stub_bfd |
8198 | && strstr (input_section->name, STUB_SUFFIX)) | |
7359ea65 DJ |
8199 | && (h == NULL |
8200 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
8201 | || h->root.type != bfd_link_hash_undefweak) | |
8202 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
8203 | && r_type != R_ARM_CALL |
8204 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 8205 | && r_type != R_ARM_PREL31 |
7359ea65 | 8206 | && r_type != R_ARM_PLT32) |
252b5132 | 8207 | { |
947216bf | 8208 | Elf_Internal_Rela outrel; |
b34976b6 | 8209 | bfd_boolean skip, relocate; |
f21f3fe0 | 8210 | |
0945cdfd DJ |
8211 | *unresolved_reloc_p = FALSE; |
8212 | ||
34e77a92 | 8213 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
252b5132 | 8214 | { |
83bac4b0 NC |
8215 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
8216 | ! globals->use_rel); | |
f21f3fe0 | 8217 | |
83bac4b0 | 8218 | if (sreloc == NULL) |
252b5132 | 8219 | return bfd_reloc_notsupported; |
252b5132 | 8220 | } |
f21f3fe0 | 8221 | |
b34976b6 AM |
8222 | skip = FALSE; |
8223 | relocate = FALSE; | |
f21f3fe0 | 8224 | |
00a97672 | 8225 | outrel.r_addend = addend; |
c629eae0 JJ |
8226 | outrel.r_offset = |
8227 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
8228 | rel->r_offset); | |
8229 | if (outrel.r_offset == (bfd_vma) -1) | |
b34976b6 | 8230 | skip = TRUE; |
0bb2d96a | 8231 | else if (outrel.r_offset == (bfd_vma) -2) |
b34976b6 | 8232 | skip = TRUE, relocate = TRUE; |
252b5132 RH |
8233 | outrel.r_offset += (input_section->output_section->vma |
8234 | + input_section->output_offset); | |
f21f3fe0 | 8235 | |
252b5132 | 8236 | if (skip) |
0bb2d96a | 8237 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
8238 | else if (h != NULL |
8239 | && h->dynindx != -1 | |
7359ea65 | 8240 | && (!info->shared |
5e681ec4 | 8241 | || !info->symbolic |
f5385ebf | 8242 | || !h->def_regular)) |
5e681ec4 | 8243 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
8244 | else |
8245 | { | |
a16385dc MM |
8246 | int symbol; |
8247 | ||
5e681ec4 | 8248 | /* This symbol is local, or marked to become local. */ |
34e77a92 | 8249 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI); |
a16385dc | 8250 | if (globals->symbian_p) |
6366ff1e | 8251 | { |
74541ad4 AM |
8252 | asection *osec; |
8253 | ||
6366ff1e MM |
8254 | /* On Symbian OS, the data segment and text segement |
8255 | can be relocated independently. Therefore, we | |
8256 | must indicate the segment to which this | |
8257 | relocation is relative. The BPABI allows us to | |
8258 | use any symbol in the right segment; we just use | |
8259 | the section symbol as it is convenient. (We | |
8260 | cannot use the symbol given by "h" directly as it | |
74541ad4 AM |
8261 | will not appear in the dynamic symbol table.) |
8262 | ||
8263 | Note that the dynamic linker ignores the section | |
8264 | symbol value, so we don't subtract osec->vma | |
8265 | from the emitted reloc addend. */ | |
10dbd1f3 | 8266 | if (sym_sec) |
74541ad4 | 8267 | osec = sym_sec->output_section; |
10dbd1f3 | 8268 | else |
74541ad4 AM |
8269 | osec = input_section->output_section; |
8270 | symbol = elf_section_data (osec)->dynindx; | |
8271 | if (symbol == 0) | |
8272 | { | |
8273 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
8274 | ||
8275 | if ((osec->flags & SEC_READONLY) == 0 | |
8276 | && htab->data_index_section != NULL) | |
8277 | osec = htab->data_index_section; | |
8278 | else | |
8279 | osec = htab->text_index_section; | |
8280 | symbol = elf_section_data (osec)->dynindx; | |
8281 | } | |
6366ff1e MM |
8282 | BFD_ASSERT (symbol != 0); |
8283 | } | |
a16385dc MM |
8284 | else |
8285 | /* On SVR4-ish systems, the dynamic loader cannot | |
8286 | relocate the text and data segments independently, | |
8287 | so the symbol does not matter. */ | |
8288 | symbol = 0; | |
34e77a92 RS |
8289 | if (dynreloc_st_type == STT_GNU_IFUNC) |
8290 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve | |
8291 | to the .iplt entry. Instead, every non-call reference | |
8292 | must use an R_ARM_IRELATIVE relocation to obtain the | |
8293 | correct run-time address. */ | |
8294 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); | |
8295 | else | |
8296 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 RS |
8297 | if (globals->use_rel) |
8298 | relocate = TRUE; | |
8299 | else | |
34e77a92 | 8300 | outrel.r_addend += dynreloc_value; |
252b5132 | 8301 | } |
f21f3fe0 | 8302 | |
47beaa6a | 8303 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); |
9a5aca8c | 8304 | |
f21f3fe0 | 8305 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 8306 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 8307 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
8308 | if (! relocate) |
8309 | return bfd_reloc_ok; | |
9a5aca8c | 8310 | |
f21f3fe0 | 8311 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
34e77a92 RS |
8312 | contents, rel->r_offset, |
8313 | dynreloc_value, (bfd_vma) 0); | |
252b5132 RH |
8314 | } |
8315 | else switch (r_type) | |
8316 | { | |
00a97672 RS |
8317 | case R_ARM_ABS12: |
8318 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
8319 | ||
dfc5f959 | 8320 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
8321 | case R_ARM_CALL: |
8322 | case R_ARM_JUMP24: | |
8029a119 | 8323 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 8324 | case R_ARM_PLT32: |
906e58ca | 8325 | { |
906e58ca NC |
8326 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
8327 | ||
dfc5f959 | 8328 | if (r_type == R_ARM_XPC25) |
252b5132 | 8329 | { |
dfc5f959 NC |
8330 | /* Check for Arm calling Arm function. */ |
8331 | /* FIXME: Should we translate the instruction into a BL | |
8332 | instruction instead ? */ | |
35fc36a8 | 8333 | if (branch_type != ST_BRANCH_TO_THUMB) |
d003868e AM |
8334 | (*_bfd_error_handler) |
8335 | (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."), | |
8336 | input_bfd, | |
8337 | h ? h->root.root.string : "(local)"); | |
dfc5f959 | 8338 | } |
155d87d7 | 8339 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
8340 | { |
8341 | /* Check for Arm calling Thumb function. */ | |
35fc36a8 | 8342 | if (branch_type == ST_BRANCH_TO_THUMB) |
dfc5f959 | 8343 | { |
f2a9dd69 DJ |
8344 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
8345 | output_bfd, input_section, | |
8346 | hit_data, sym_sec, rel->r_offset, | |
8347 | signed_addend, value, | |
8348 | error_message)) | |
8349 | return bfd_reloc_ok; | |
8350 | else | |
8351 | return bfd_reloc_dangerous; | |
dfc5f959 | 8352 | } |
252b5132 | 8353 | } |
ba96a88f | 8354 | |
906e58ca | 8355 | /* Check if a stub has to be inserted because the |
8029a119 | 8356 | destination is too far or we are changing mode. */ |
155d87d7 CL |
8357 | if ( r_type == R_ARM_CALL |
8358 | || r_type == R_ARM_JUMP24 | |
8359 | || r_type == R_ARM_PLT32) | |
906e58ca | 8360 | { |
fe33d2fa CL |
8361 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
8362 | struct elf32_arm_link_hash_entry *hash; | |
8363 | ||
8364 | hash = (struct elf32_arm_link_hash_entry *) h; | |
8365 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
8366 | st_type, &branch_type, |
8367 | hash, value, sym_sec, | |
fe33d2fa | 8368 | input_bfd, sym_name); |
5fa9e92f | 8369 | |
fe33d2fa | 8370 | if (stub_type != arm_stub_none) |
906e58ca NC |
8371 | { |
8372 | /* The target is out of reach, so redirect the | |
8373 | branch to the local stub for this function. */ | |
906e58ca NC |
8374 | stub_entry = elf32_arm_get_stub_entry (input_section, |
8375 | sym_sec, h, | |
fe33d2fa CL |
8376 | rel, globals, |
8377 | stub_type); | |
9cd3e4e5 NC |
8378 | { |
8379 | if (stub_entry != NULL) | |
8380 | value = (stub_entry->stub_offset | |
8381 | + stub_entry->stub_sec->output_offset | |
8382 | + stub_entry->stub_sec->output_section->vma); | |
8383 | ||
8384 | if (plt_offset != (bfd_vma) -1) | |
8385 | *unresolved_reloc_p = FALSE; | |
8386 | } | |
906e58ca | 8387 | } |
fe33d2fa CL |
8388 | else |
8389 | { | |
8390 | /* If the call goes through a PLT entry, make sure to | |
8391 | check distance to the right destination address. */ | |
34e77a92 | 8392 | if (plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
8393 | { |
8394 | value = (splt->output_section->vma | |
8395 | + splt->output_offset | |
34e77a92 | 8396 | + plt_offset); |
fe33d2fa CL |
8397 | *unresolved_reloc_p = FALSE; |
8398 | /* The PLT entry is in ARM mode, regardless of the | |
8399 | target function. */ | |
35fc36a8 | 8400 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
8401 | } |
8402 | } | |
906e58ca NC |
8403 | } |
8404 | ||
dea514f5 PB |
8405 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
8406 | where: | |
8407 | S is the address of the symbol in the relocation. | |
8408 | P is address of the instruction being relocated. | |
8409 | A is the addend (extracted from the instruction) in bytes. | |
8410 | ||
8411 | S is held in 'value'. | |
8412 | P is the base address of the section containing the | |
8413 | instruction plus the offset of the reloc into that | |
8414 | section, ie: | |
8415 | (input_section->output_section->vma + | |
8416 | input_section->output_offset + | |
8417 | rel->r_offset). | |
8418 | A is the addend, converted into bytes, ie: | |
8419 | (signed_addend * 4) | |
8420 | ||
8421 | Note: None of these operations have knowledge of the pipeline | |
8422 | size of the processor, thus it is up to the assembler to | |
8423 | encode this information into the addend. */ | |
8424 | value -= (input_section->output_section->vma | |
8425 | + input_section->output_offset); | |
8426 | value -= rel->r_offset; | |
4e7fd91e PB |
8427 | if (globals->use_rel) |
8428 | value += (signed_addend << howto->size); | |
8429 | else | |
8430 | /* RELA addends do not have to be adjusted by howto->size. */ | |
8431 | value += signed_addend; | |
23080146 | 8432 | |
dcb5e6e6 NC |
8433 | signed_addend = value; |
8434 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 8435 | |
5ab79981 | 8436 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 8437 | the next instruction unless a PLT entry will be created. |
77b4f08f | 8438 | Do the same for local undefined symbols (but not for STN_UNDEF). |
cd1dac3d DG |
8439 | The jump to the next instruction is optimized as a NOP depending |
8440 | on the architecture. */ | |
ffcb4889 | 8441 | if (h ? (h->root.type == bfd_link_hash_undefweak |
34e77a92 | 8442 | && plt_offset == (bfd_vma) -1) |
77b4f08f | 8443 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
5ab79981 | 8444 | { |
cd1dac3d DG |
8445 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
8446 | ||
8447 | if (arch_has_arm_nop (globals)) | |
8448 | value |= 0x0320f000; | |
8449 | else | |
8450 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
8451 | } |
8452 | else | |
59f2c4e7 | 8453 | { |
9b485d32 | 8454 | /* Perform a signed range check. */ |
dcb5e6e6 | 8455 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
8456 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
8457 | return bfd_reloc_overflow; | |
9a5aca8c | 8458 | |
5ab79981 | 8459 | addend = (value & 2); |
39b41c9c | 8460 | |
5ab79981 PB |
8461 | value = (signed_addend & howto->dst_mask) |
8462 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 8463 | |
5ab79981 PB |
8464 | if (r_type == R_ARM_CALL) |
8465 | { | |
155d87d7 | 8466 | /* Set the H bit in the BLX instruction. */ |
35fc36a8 | 8467 | if (branch_type == ST_BRANCH_TO_THUMB) |
155d87d7 CL |
8468 | { |
8469 | if (addend) | |
8470 | value |= (1 << 24); | |
8471 | else | |
8472 | value &= ~(bfd_vma)(1 << 24); | |
8473 | } | |
8474 | ||
5ab79981 | 8475 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 8476 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 8477 | case, mode switching is performed by the stub. */ |
35fc36a8 | 8478 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
5ab79981 | 8479 | value |= (1 << 28); |
63e1a0fc | 8480 | else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) |
5ab79981 PB |
8481 | { |
8482 | value &= ~(bfd_vma)(1 << 28); | |
8483 | value |= (1 << 24); | |
8484 | } | |
39b41c9c PB |
8485 | } |
8486 | } | |
906e58ca | 8487 | } |
252b5132 | 8488 | break; |
f21f3fe0 | 8489 | |
252b5132 RH |
8490 | case R_ARM_ABS32: |
8491 | value += addend; | |
35fc36a8 | 8492 | if (branch_type == ST_BRANCH_TO_THUMB) |
252b5132 RH |
8493 | value |= 1; |
8494 | break; | |
f21f3fe0 | 8495 | |
bb224fc3 MS |
8496 | case R_ARM_ABS32_NOI: |
8497 | value += addend; | |
8498 | break; | |
8499 | ||
252b5132 | 8500 | case R_ARM_REL32: |
a8bc6c78 | 8501 | value += addend; |
35fc36a8 | 8502 | if (branch_type == ST_BRANCH_TO_THUMB) |
a8bc6c78 | 8503 | value |= 1; |
252b5132 | 8504 | value -= (input_section->output_section->vma |
62efb346 | 8505 | + input_section->output_offset + rel->r_offset); |
252b5132 | 8506 | break; |
eb043451 | 8507 | |
bb224fc3 MS |
8508 | case R_ARM_REL32_NOI: |
8509 | value += addend; | |
8510 | value -= (input_section->output_section->vma | |
8511 | + input_section->output_offset + rel->r_offset); | |
8512 | break; | |
8513 | ||
eb043451 PB |
8514 | case R_ARM_PREL31: |
8515 | value -= (input_section->output_section->vma | |
8516 | + input_section->output_offset + rel->r_offset); | |
8517 | value += signed_addend; | |
8518 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
8519 | { | |
8029a119 | 8520 | /* Check for overflow. */ |
eb043451 PB |
8521 | if ((value ^ (value >> 1)) & (1 << 30)) |
8522 | return bfd_reloc_overflow; | |
8523 | } | |
8524 | value &= 0x7fffffff; | |
8525 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
35fc36a8 | 8526 | if (branch_type == ST_BRANCH_TO_THUMB) |
eb043451 PB |
8527 | value |= 1; |
8528 | break; | |
252b5132 | 8529 | } |
f21f3fe0 | 8530 | |
252b5132 RH |
8531 | bfd_put_32 (input_bfd, value, hit_data); |
8532 | return bfd_reloc_ok; | |
8533 | ||
8534 | case R_ARM_ABS8: | |
8535 | value += addend; | |
4e67d4ca DG |
8536 | |
8537 | /* There is no way to tell whether the user intended to use a signed or | |
8538 | unsigned addend. When checking for overflow we accept either, | |
8539 | as specified by the AAELF. */ | |
8540 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
8541 | return bfd_reloc_overflow; |
8542 | ||
8543 | bfd_put_8 (input_bfd, value, hit_data); | |
8544 | return bfd_reloc_ok; | |
8545 | ||
8546 | case R_ARM_ABS16: | |
8547 | value += addend; | |
8548 | ||
4e67d4ca DG |
8549 | /* See comment for R_ARM_ABS8. */ |
8550 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
8551 | return bfd_reloc_overflow; |
8552 | ||
8553 | bfd_put_16 (input_bfd, value, hit_data); | |
8554 | return bfd_reloc_ok; | |
8555 | ||
252b5132 | 8556 | case R_ARM_THM_ABS5: |
9b485d32 | 8557 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
8558 | if (globals->use_rel) |
8559 | { | |
8560 | /* Need to refetch addend. */ | |
8561 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
8562 | /* ??? Need to determine shift amount from operand size. */ | |
8563 | addend >>= howto->rightshift; | |
8564 | } | |
252b5132 RH |
8565 | value += addend; |
8566 | ||
8567 | /* ??? Isn't value unsigned? */ | |
8568 | if ((long) value > 0x1f || (long) value < -0x10) | |
8569 | return bfd_reloc_overflow; | |
8570 | ||
8571 | /* ??? Value needs to be properly shifted into place first. */ | |
8572 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
8573 | bfd_put_16 (input_bfd, value, hit_data); | |
8574 | return bfd_reloc_ok; | |
8575 | ||
2cab6cc3 MS |
8576 | case R_ARM_THM_ALU_PREL_11_0: |
8577 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
8578 | { | |
8579 | bfd_vma insn; | |
8580 | bfd_signed_vma relocation; | |
8581 | ||
8582 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
8583 | | bfd_get_16 (input_bfd, hit_data + 2); | |
8584 | ||
8585 | if (globals->use_rel) | |
8586 | { | |
8587 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
8588 | | ((insn & (1 << 26)) >> 15); | |
8589 | if (insn & 0xf00000) | |
8590 | signed_addend = -signed_addend; | |
8591 | } | |
8592 | ||
8593 | relocation = value + signed_addend; | |
79f08007 YZ |
8594 | relocation -= Pa (input_section->output_section->vma |
8595 | + input_section->output_offset | |
8596 | + rel->r_offset); | |
2cab6cc3 MS |
8597 | |
8598 | value = abs (relocation); | |
8599 | ||
8600 | if (value >= 0x1000) | |
8601 | return bfd_reloc_overflow; | |
8602 | ||
8603 | insn = (insn & 0xfb0f8f00) | (value & 0xff) | |
8604 | | ((value & 0x700) << 4) | |
8605 | | ((value & 0x800) << 15); | |
8606 | if (relocation < 0) | |
8607 | insn |= 0xa00000; | |
8608 | ||
8609 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
8610 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
8611 | ||
8612 | return bfd_reloc_ok; | |
8613 | } | |
8614 | ||
e1ec24c6 NC |
8615 | case R_ARM_THM_PC8: |
8616 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
8617 | but it is supported for compatibility with third party libraries | |
8618 | generated by other compilers, specifically the ARM/IAR. */ | |
8619 | { | |
8620 | bfd_vma insn; | |
8621 | bfd_signed_vma relocation; | |
8622 | ||
8623 | insn = bfd_get_16 (input_bfd, hit_data); | |
8624 | ||
8625 | if (globals->use_rel) | |
79f08007 | 8626 | addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4; |
e1ec24c6 NC |
8627 | |
8628 | relocation = value + addend; | |
79f08007 YZ |
8629 | relocation -= Pa (input_section->output_section->vma |
8630 | + input_section->output_offset | |
8631 | + rel->r_offset); | |
e1ec24c6 NC |
8632 | |
8633 | value = abs (relocation); | |
8634 | ||
8635 | /* We do not check for overflow of this reloc. Although strictly | |
8636 | speaking this is incorrect, it appears to be necessary in order | |
8637 | to work with IAR generated relocs. Since GCC and GAS do not | |
8638 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
8639 | a problem for them. */ | |
8640 | value &= 0x3fc; | |
8641 | ||
8642 | insn = (insn & 0xff00) | (value >> 2); | |
8643 | ||
8644 | bfd_put_16 (input_bfd, insn, hit_data); | |
8645 | ||
8646 | return bfd_reloc_ok; | |
8647 | } | |
8648 | ||
2cab6cc3 MS |
8649 | case R_ARM_THM_PC12: |
8650 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
8651 | { | |
8652 | bfd_vma insn; | |
8653 | bfd_signed_vma relocation; | |
8654 | ||
8655 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
8656 | | bfd_get_16 (input_bfd, hit_data + 2); | |
8657 | ||
8658 | if (globals->use_rel) | |
8659 | { | |
8660 | signed_addend = insn & 0xfff; | |
8661 | if (!(insn & (1 << 23))) | |
8662 | signed_addend = -signed_addend; | |
8663 | } | |
8664 | ||
8665 | relocation = value + signed_addend; | |
79f08007 YZ |
8666 | relocation -= Pa (input_section->output_section->vma |
8667 | + input_section->output_offset | |
8668 | + rel->r_offset); | |
2cab6cc3 MS |
8669 | |
8670 | value = abs (relocation); | |
8671 | ||
8672 | if (value >= 0x1000) | |
8673 | return bfd_reloc_overflow; | |
8674 | ||
8675 | insn = (insn & 0xff7ff000) | value; | |
8676 | if (relocation >= 0) | |
8677 | insn |= (1 << 23); | |
8678 | ||
8679 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
8680 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
8681 | ||
8682 | return bfd_reloc_ok; | |
8683 | } | |
8684 | ||
dfc5f959 | 8685 | case R_ARM_THM_XPC22: |
c19d1205 | 8686 | case R_ARM_THM_CALL: |
bd97cb95 | 8687 | case R_ARM_THM_JUMP24: |
dfc5f959 | 8688 | /* Thumb BL (branch long instruction). */ |
252b5132 | 8689 | { |
b34976b6 | 8690 | bfd_vma relocation; |
e95de063 | 8691 | bfd_vma reloc_sign; |
b34976b6 AM |
8692 | bfd_boolean overflow = FALSE; |
8693 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
8694 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
8695 | bfd_signed_vma reloc_signed_max; |
8696 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 8697 | bfd_vma check; |
252b5132 | 8698 | bfd_signed_vma signed_check; |
e95de063 | 8699 | int bitsize; |
cd1dac3d | 8700 | const int thumb2 = using_thumb2 (globals); |
252b5132 | 8701 | |
5ab79981 | 8702 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
8703 | the next instruction unless a PLT entry will be created. |
8704 | The jump to the next instruction is optimized as a NOP.W for | |
8705 | Thumb-2 enabled architectures. */ | |
19540007 | 8706 | if (h && h->root.type == bfd_link_hash_undefweak |
34e77a92 | 8707 | && plt_offset == (bfd_vma) -1) |
5ab79981 | 8708 | { |
cd1dac3d DG |
8709 | if (arch_has_thumb2_nop (globals)) |
8710 | { | |
8711 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
8712 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
8713 | } | |
8714 | else | |
8715 | { | |
8716 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
8717 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
8718 | } | |
5ab79981 PB |
8719 | return bfd_reloc_ok; |
8720 | } | |
8721 | ||
e95de063 MS |
8722 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
8723 | with Thumb-1) involving the J1 and J2 bits. */ | |
4e7fd91e PB |
8724 | if (globals->use_rel) |
8725 | { | |
e95de063 MS |
8726 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
8727 | bfd_vma upper = upper_insn & 0x3ff; | |
8728 | bfd_vma lower = lower_insn & 0x7ff; | |
8729 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; | |
8730 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
8731 | bfd_vma i1 = j1 ^ s ? 0 : 1; | |
8732 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
8733 | ||
8734 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); | |
8735 | /* Sign extend. */ | |
8736 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
8737 | ||
4e7fd91e PB |
8738 | signed_addend = addend; |
8739 | } | |
cb1afa5c | 8740 | |
dfc5f959 NC |
8741 | if (r_type == R_ARM_THM_XPC22) |
8742 | { | |
8743 | /* Check for Thumb to Thumb call. */ | |
8744 | /* FIXME: Should we translate the instruction into a BL | |
8745 | instruction instead ? */ | |
35fc36a8 | 8746 | if (branch_type == ST_BRANCH_TO_THUMB) |
d003868e AM |
8747 | (*_bfd_error_handler) |
8748 | (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."), | |
8749 | input_bfd, | |
8750 | h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
8751 | } |
8752 | else | |
252b5132 | 8753 | { |
dfc5f959 NC |
8754 | /* If it is not a call to Thumb, assume call to Arm. |
8755 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
8756 | function call at all, but rather a long jump. Calls through |
8757 | the PLT do not require stubs. */ | |
34e77a92 | 8758 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
dfc5f959 | 8759 | { |
bd97cb95 | 8760 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
8761 | { |
8762 | /* Convert BL to BLX. */ | |
8763 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
8764 | } | |
155d87d7 CL |
8765 | else if (( r_type != R_ARM_THM_CALL) |
8766 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
8767 | { |
8768 | if (elf32_thumb_to_arm_stub | |
8769 | (info, sym_name, input_bfd, output_bfd, input_section, | |
8770 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
8771 | error_message)) | |
8772 | return bfd_reloc_ok; | |
8773 | else | |
8774 | return bfd_reloc_dangerous; | |
8775 | } | |
da5938a2 | 8776 | } |
35fc36a8 RS |
8777 | else if (branch_type == ST_BRANCH_TO_THUMB |
8778 | && globals->use_blx | |
bd97cb95 | 8779 | && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
8780 | { |
8781 | /* Make sure this is a BL. */ | |
8782 | lower_insn |= 0x1800; | |
8783 | } | |
252b5132 | 8784 | } |
f21f3fe0 | 8785 | |
fe33d2fa | 8786 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
155d87d7 | 8787 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
8788 | { |
8789 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 8790 | is too far. */ |
fe33d2fa CL |
8791 | struct elf32_arm_stub_hash_entry *stub_entry; |
8792 | struct elf32_arm_link_hash_entry *hash; | |
8793 | ||
8794 | hash = (struct elf32_arm_link_hash_entry *) h; | |
8795 | ||
8796 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
8797 | st_type, &branch_type, |
8798 | hash, value, sym_sec, | |
fe33d2fa CL |
8799 | input_bfd, sym_name); |
8800 | ||
8801 | if (stub_type != arm_stub_none) | |
906e58ca NC |
8802 | { |
8803 | /* The target is out of reach or we are changing modes, so | |
8804 | redirect the branch to the local stub for this | |
8805 | function. */ | |
8806 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
8807 | sym_sec, h, | |
fe33d2fa CL |
8808 | rel, globals, |
8809 | stub_type); | |
906e58ca | 8810 | if (stub_entry != NULL) |
9cd3e4e5 NC |
8811 | { |
8812 | value = (stub_entry->stub_offset | |
8813 | + stub_entry->stub_sec->output_offset | |
8814 | + stub_entry->stub_sec->output_section->vma); | |
8815 | ||
8816 | if (plt_offset != (bfd_vma) -1) | |
8817 | *unresolved_reloc_p = FALSE; | |
8818 | } | |
906e58ca | 8819 | |
f4ac8484 | 8820 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 8821 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
8822 | { |
8823 | if ((stub_entry | |
8824 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
35fc36a8 | 8825 | || branch_type != ST_BRANCH_TO_THUMB) |
f4ac8484 DJ |
8826 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
8827 | } | |
906e58ca NC |
8828 | } |
8829 | } | |
8830 | ||
fe33d2fa | 8831 | /* Handle calls via the PLT. */ |
34e77a92 | 8832 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
8833 | { |
8834 | value = (splt->output_section->vma | |
8835 | + splt->output_offset | |
34e77a92 | 8836 | + plt_offset); |
fe33d2fa CL |
8837 | |
8838 | if (globals->use_blx && r_type == R_ARM_THM_CALL) | |
8839 | { | |
8840 | /* If the Thumb BLX instruction is available, convert | |
8841 | the BL to a BLX instruction to call the ARM-mode | |
8842 | PLT entry. */ | |
8843 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
35fc36a8 | 8844 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
8845 | } |
8846 | else | |
8847 | { | |
8848 | /* Target the Thumb stub before the ARM PLT entry. */ | |
8849 | value -= PLT_THUMB_STUB_SIZE; | |
35fc36a8 | 8850 | branch_type = ST_BRANCH_TO_THUMB; |
fe33d2fa CL |
8851 | } |
8852 | *unresolved_reloc_p = FALSE; | |
8853 | } | |
8854 | ||
ba96a88f | 8855 | relocation = value + signed_addend; |
f21f3fe0 | 8856 | |
252b5132 | 8857 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
8858 | + input_section->output_offset |
8859 | + rel->r_offset); | |
9a5aca8c | 8860 | |
252b5132 RH |
8861 | check = relocation >> howto->rightshift; |
8862 | ||
8863 | /* If this is a signed value, the rightshift just dropped | |
8864 | leading 1 bits (assuming twos complement). */ | |
8865 | if ((bfd_signed_vma) relocation >= 0) | |
8866 | signed_check = check; | |
8867 | else | |
8868 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
8869 | ||
e95de063 MS |
8870 | /* Calculate the permissable maximum and minimum values for |
8871 | this relocation according to whether we're relocating for | |
8872 | Thumb-2 or not. */ | |
8873 | bitsize = howto->bitsize; | |
8874 | if (!thumb2) | |
8875 | bitsize -= 2; | |
f6ebfac0 | 8876 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
8877 | reloc_signed_min = ~reloc_signed_max; |
8878 | ||
252b5132 | 8879 | /* Assumes two's complement. */ |
ba96a88f | 8880 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
b34976b6 | 8881 | overflow = TRUE; |
252b5132 | 8882 | |
bd97cb95 | 8883 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
8884 | /* For a BLX instruction, make sure that the relocation is rounded up |
8885 | to a word boundary. This follows the semantics of the instruction | |
8886 | which specifies that bit 1 of the target address will come from bit | |
8887 | 1 of the base address. */ | |
8888 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 8889 | |
e95de063 MS |
8890 | /* Put RELOCATION back into the insn. Assumes two's complement. |
8891 | We use the Thumb-2 encoding, which is safe even if dealing with | |
8892 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
8893 | reloc_sign = (signed_check < 0) ? 1 : 0; | |
8894 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) | |
8895 | | ((relocation >> 12) & 0x3ff) | |
8896 | | (reloc_sign << 10); | |
906e58ca | 8897 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
e95de063 MS |
8898 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
8899 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
8900 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 8901 | |
252b5132 RH |
8902 | /* Put the relocated value back in the object file: */ |
8903 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
8904 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
8905 | ||
8906 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
8907 | } | |
8908 | break; | |
8909 | ||
c19d1205 ZW |
8910 | case R_ARM_THM_JUMP19: |
8911 | /* Thumb32 conditional branch instruction. */ | |
8912 | { | |
8913 | bfd_vma relocation; | |
8914 | bfd_boolean overflow = FALSE; | |
8915 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
8916 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
8917 | bfd_signed_vma reloc_signed_max = 0xffffe; |
8918 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 ZW |
8919 | bfd_signed_vma signed_check; |
8920 | ||
8921 | /* Need to refetch the addend, reconstruct the top three bits, | |
8922 | and squish the two 11 bit pieces together. */ | |
8923 | if (globals->use_rel) | |
8924 | { | |
8925 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 8926 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
8927 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
8928 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
8929 | bfd_vma lower = (lower_insn & 0x07ff); | |
8930 | ||
a00a1f35 MS |
8931 | upper |= J1 << 6; |
8932 | upper |= J2 << 7; | |
8933 | upper |= (!S) << 8; | |
c19d1205 ZW |
8934 | upper -= 0x0100; /* Sign extend. */ |
8935 | ||
8936 | addend = (upper << 12) | (lower << 1); | |
8937 | signed_addend = addend; | |
8938 | } | |
8939 | ||
bd97cb95 | 8940 | /* Handle calls via the PLT. */ |
34e77a92 | 8941 | if (plt_offset != (bfd_vma) -1) |
bd97cb95 DJ |
8942 | { |
8943 | value = (splt->output_section->vma | |
8944 | + splt->output_offset | |
34e77a92 | 8945 | + plt_offset); |
bd97cb95 DJ |
8946 | /* Target the Thumb stub before the ARM PLT entry. */ |
8947 | value -= PLT_THUMB_STUB_SIZE; | |
8948 | *unresolved_reloc_p = FALSE; | |
8949 | } | |
8950 | ||
c19d1205 ZW |
8951 | /* ??? Should handle interworking? GCC might someday try to |
8952 | use this for tail calls. */ | |
8953 | ||
8954 | relocation = value + signed_addend; | |
8955 | relocation -= (input_section->output_section->vma | |
8956 | + input_section->output_offset | |
8957 | + rel->r_offset); | |
a00a1f35 | 8958 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 8959 | |
c19d1205 ZW |
8960 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
8961 | overflow = TRUE; | |
8962 | ||
8963 | /* Put RELOCATION back into the insn. */ | |
8964 | { | |
8965 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
8966 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
8967 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
8968 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
8969 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
8970 | ||
a00a1f35 | 8971 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
8972 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
8973 | } | |
8974 | ||
8975 | /* Put the relocated value back in the object file: */ | |
8976 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
8977 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
8978 | ||
8979 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
8980 | } | |
8981 | ||
8982 | case R_ARM_THM_JUMP11: | |
8983 | case R_ARM_THM_JUMP8: | |
8984 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
8985 | /* Thumb B (branch) instruction). */ |
8986 | { | |
6cf9e9fe | 8987 | bfd_signed_vma relocation; |
51c5503b NC |
8988 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
8989 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
8990 | bfd_signed_vma signed_check; |
8991 | ||
c19d1205 ZW |
8992 | /* CZB cannot jump backward. */ |
8993 | if (r_type == R_ARM_THM_JUMP6) | |
8994 | reloc_signed_min = 0; | |
8995 | ||
4e7fd91e | 8996 | if (globals->use_rel) |
6cf9e9fe | 8997 | { |
4e7fd91e PB |
8998 | /* Need to refetch addend. */ |
8999 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
9000 | if (addend & ((howto->src_mask + 1) >> 1)) | |
9001 | { | |
9002 | signed_addend = -1; | |
9003 | signed_addend &= ~ howto->src_mask; | |
9004 | signed_addend |= addend; | |
9005 | } | |
9006 | else | |
9007 | signed_addend = addend; | |
9008 | /* The value in the insn has been right shifted. We need to | |
9009 | undo this, so that we can perform the address calculation | |
9010 | in terms of bytes. */ | |
9011 | signed_addend <<= howto->rightshift; | |
6cf9e9fe | 9012 | } |
6cf9e9fe | 9013 | relocation = value + signed_addend; |
51c5503b NC |
9014 | |
9015 | relocation -= (input_section->output_section->vma | |
9016 | + input_section->output_offset | |
9017 | + rel->r_offset); | |
9018 | ||
6cf9e9fe NC |
9019 | relocation >>= howto->rightshift; |
9020 | signed_check = relocation; | |
c19d1205 ZW |
9021 | |
9022 | if (r_type == R_ARM_THM_JUMP6) | |
9023 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
9024 | else | |
9025 | relocation &= howto->dst_mask; | |
51c5503b | 9026 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 9027 | |
51c5503b NC |
9028 | bfd_put_16 (input_bfd, relocation, hit_data); |
9029 | ||
9030 | /* Assumes two's complement. */ | |
9031 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
9032 | return bfd_reloc_overflow; | |
9033 | ||
9034 | return bfd_reloc_ok; | |
9035 | } | |
cedb70c5 | 9036 | |
8375c36b PB |
9037 | case R_ARM_ALU_PCREL7_0: |
9038 | case R_ARM_ALU_PCREL15_8: | |
9039 | case R_ARM_ALU_PCREL23_15: | |
9040 | { | |
9041 | bfd_vma insn; | |
9042 | bfd_vma relocation; | |
9043 | ||
9044 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
9045 | if (globals->use_rel) |
9046 | { | |
9047 | /* Extract the addend. */ | |
9048 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
9049 | signed_addend = addend; | |
9050 | } | |
8375c36b PB |
9051 | relocation = value + signed_addend; |
9052 | ||
9053 | relocation -= (input_section->output_section->vma | |
9054 | + input_section->output_offset | |
9055 | + rel->r_offset); | |
9056 | insn = (insn & ~0xfff) | |
9057 | | ((howto->bitpos << 7) & 0xf00) | |
9058 | | ((relocation >> howto->bitpos) & 0xff); | |
9059 | bfd_put_32 (input_bfd, value, hit_data); | |
9060 | } | |
9061 | return bfd_reloc_ok; | |
9062 | ||
252b5132 RH |
9063 | case R_ARM_GNU_VTINHERIT: |
9064 | case R_ARM_GNU_VTENTRY: | |
9065 | return bfd_reloc_ok; | |
9066 | ||
c19d1205 | 9067 | case R_ARM_GOTOFF32: |
252b5132 RH |
9068 | /* Relocation is relative to the start of the |
9069 | global offset table. */ | |
9070 | ||
9071 | BFD_ASSERT (sgot != NULL); | |
9072 | if (sgot == NULL) | |
9073 | return bfd_reloc_notsupported; | |
9a5aca8c | 9074 | |
cedb70c5 | 9075 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
9076 | address by one, so that attempts to call the function pointer will |
9077 | correctly interpret it as Thumb code. */ | |
35fc36a8 | 9078 | if (branch_type == ST_BRANCH_TO_THUMB) |
ee29b9fb RE |
9079 | value += 1; |
9080 | ||
252b5132 RH |
9081 | /* Note that sgot->output_offset is not involved in this |
9082 | calculation. We always want the start of .got. If we | |
9083 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
9084 | permitted by the ABI, we might have to change this | |
9b485d32 | 9085 | calculation. */ |
252b5132 | 9086 | value -= sgot->output_section->vma; |
f21f3fe0 | 9087 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 9088 | contents, rel->r_offset, value, |
00a97672 | 9089 | rel->r_addend); |
252b5132 RH |
9090 | |
9091 | case R_ARM_GOTPC: | |
a7c10850 | 9092 | /* Use global offset table as symbol value. */ |
252b5132 | 9093 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 9094 | |
252b5132 RH |
9095 | if (sgot == NULL) |
9096 | return bfd_reloc_notsupported; | |
9097 | ||
0945cdfd | 9098 | *unresolved_reloc_p = FALSE; |
252b5132 | 9099 | value = sgot->output_section->vma; |
f21f3fe0 | 9100 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 9101 | contents, rel->r_offset, value, |
00a97672 | 9102 | rel->r_addend); |
f21f3fe0 | 9103 | |
252b5132 | 9104 | case R_ARM_GOT32: |
eb043451 | 9105 | case R_ARM_GOT_PREL: |
252b5132 | 9106 | /* Relocation is to the entry for this symbol in the |
9b485d32 | 9107 | global offset table. */ |
252b5132 RH |
9108 | if (sgot == NULL) |
9109 | return bfd_reloc_notsupported; | |
f21f3fe0 | 9110 | |
34e77a92 RS |
9111 | if (dynreloc_st_type == STT_GNU_IFUNC |
9112 | && plt_offset != (bfd_vma) -1 | |
9113 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) | |
9114 | { | |
9115 | /* We have a relocation against a locally-binding STT_GNU_IFUNC | |
9116 | symbol, and the relocation resolves directly to the runtime | |
9117 | target rather than to the .iplt entry. This means that any | |
9118 | .got entry would be the same value as the .igot.plt entry, | |
9119 | so there's no point creating both. */ | |
9120 | sgot = globals->root.igotplt; | |
9121 | value = sgot->output_offset + gotplt_offset; | |
9122 | } | |
9123 | else if (h != NULL) | |
252b5132 RH |
9124 | { |
9125 | bfd_vma off; | |
f21f3fe0 | 9126 | |
252b5132 RH |
9127 | off = h->got.offset; |
9128 | BFD_ASSERT (off != (bfd_vma) -1); | |
b436d854 | 9129 | if ((off & 1) != 0) |
252b5132 | 9130 | { |
b436d854 RS |
9131 | /* We have already processsed one GOT relocation against |
9132 | this symbol. */ | |
9133 | off &= ~1; | |
9134 | if (globals->root.dynamic_sections_created | |
9135 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
9136 | *unresolved_reloc_p = FALSE; | |
9137 | } | |
9138 | else | |
9139 | { | |
9140 | Elf_Internal_Rela outrel; | |
9141 | ||
6f820c85 | 9142 | if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h)) |
b436d854 RS |
9143 | { |
9144 | /* If the symbol doesn't resolve locally in a static | |
9145 | object, we have an undefined reference. If the | |
9146 | symbol doesn't resolve locally in a dynamic object, | |
9147 | it should be resolved by the dynamic linker. */ | |
9148 | if (globals->root.dynamic_sections_created) | |
9149 | { | |
9150 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); | |
9151 | *unresolved_reloc_p = FALSE; | |
9152 | } | |
9153 | else | |
9154 | outrel.r_info = 0; | |
9155 | outrel.r_addend = 0; | |
9156 | } | |
252b5132 RH |
9157 | else |
9158 | { | |
34e77a92 RS |
9159 | if (dynreloc_st_type == STT_GNU_IFUNC) |
9160 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
31943882 WN |
9161 | else if (info->shared && |
9162 | (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
9163 | || h->root.type != bfd_link_hash_undefweak)) | |
34e77a92 RS |
9164 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
9165 | else | |
9166 | outrel.r_info = 0; | |
9167 | outrel.r_addend = dynreloc_value; | |
b436d854 | 9168 | } |
ee29b9fb | 9169 | |
b436d854 RS |
9170 | /* The GOT entry is initialized to zero by default. |
9171 | See if we should install a different value. */ | |
9172 | if (outrel.r_addend != 0 | |
9173 | && (outrel.r_info == 0 || globals->use_rel)) | |
9174 | { | |
9175 | bfd_put_32 (output_bfd, outrel.r_addend, | |
9176 | sgot->contents + off); | |
9177 | outrel.r_addend = 0; | |
252b5132 | 9178 | } |
f21f3fe0 | 9179 | |
b436d854 RS |
9180 | if (outrel.r_info != 0) |
9181 | { | |
9182 | outrel.r_offset = (sgot->output_section->vma | |
9183 | + sgot->output_offset | |
9184 | + off); | |
9185 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
9186 | } | |
9187 | h->got.offset |= 1; | |
9188 | } | |
252b5132 RH |
9189 | value = sgot->output_offset + off; |
9190 | } | |
9191 | else | |
9192 | { | |
9193 | bfd_vma off; | |
f21f3fe0 | 9194 | |
252b5132 RH |
9195 | BFD_ASSERT (local_got_offsets != NULL && |
9196 | local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 9197 | |
252b5132 | 9198 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 9199 | |
252b5132 RH |
9200 | /* The offset must always be a multiple of 4. We use the |
9201 | least significant bit to record whether we have already | |
9b485d32 | 9202 | generated the necessary reloc. */ |
252b5132 RH |
9203 | if ((off & 1) != 0) |
9204 | off &= ~1; | |
9205 | else | |
9206 | { | |
00a97672 | 9207 | if (globals->use_rel) |
34e77a92 | 9208 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); |
f21f3fe0 | 9209 | |
34e77a92 | 9210 | if (info->shared || dynreloc_st_type == STT_GNU_IFUNC) |
252b5132 | 9211 | { |
947216bf | 9212 | Elf_Internal_Rela outrel; |
f21f3fe0 | 9213 | |
34e77a92 | 9214 | outrel.r_addend = addend + dynreloc_value; |
252b5132 | 9215 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 9216 | + sgot->output_offset |
252b5132 | 9217 | + off); |
34e77a92 RS |
9218 | if (dynreloc_st_type == STT_GNU_IFUNC) |
9219 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
9220 | else | |
9221 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
47beaa6a | 9222 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
252b5132 | 9223 | } |
f21f3fe0 | 9224 | |
252b5132 RH |
9225 | local_got_offsets[r_symndx] |= 1; |
9226 | } | |
f21f3fe0 | 9227 | |
252b5132 RH |
9228 | value = sgot->output_offset + off; |
9229 | } | |
eb043451 PB |
9230 | if (r_type != R_ARM_GOT32) |
9231 | value += sgot->output_section->vma; | |
9a5aca8c | 9232 | |
f21f3fe0 | 9233 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 9234 | contents, rel->r_offset, value, |
00a97672 | 9235 | rel->r_addend); |
f21f3fe0 | 9236 | |
ba93b8ac DJ |
9237 | case R_ARM_TLS_LDO32: |
9238 | value = value - dtpoff_base (info); | |
9239 | ||
9240 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
9241 | contents, rel->r_offset, value, |
9242 | rel->r_addend); | |
ba93b8ac DJ |
9243 | |
9244 | case R_ARM_TLS_LDM32: | |
9245 | { | |
9246 | bfd_vma off; | |
9247 | ||
362d30a1 | 9248 | if (sgot == NULL) |
ba93b8ac DJ |
9249 | abort (); |
9250 | ||
9251 | off = globals->tls_ldm_got.offset; | |
9252 | ||
9253 | if ((off & 1) != 0) | |
9254 | off &= ~1; | |
9255 | else | |
9256 | { | |
9257 | /* If we don't know the module number, create a relocation | |
9258 | for it. */ | |
9259 | if (info->shared) | |
9260 | { | |
9261 | Elf_Internal_Rela outrel; | |
ba93b8ac | 9262 | |
362d30a1 | 9263 | if (srelgot == NULL) |
ba93b8ac DJ |
9264 | abort (); |
9265 | ||
00a97672 | 9266 | outrel.r_addend = 0; |
362d30a1 RS |
9267 | outrel.r_offset = (sgot->output_section->vma |
9268 | + sgot->output_offset + off); | |
ba93b8ac DJ |
9269 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
9270 | ||
00a97672 RS |
9271 | if (globals->use_rel) |
9272 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9273 | sgot->contents + off); |
ba93b8ac | 9274 | |
47beaa6a | 9275 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
9276 | } |
9277 | else | |
362d30a1 | 9278 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
ba93b8ac DJ |
9279 | |
9280 | globals->tls_ldm_got.offset |= 1; | |
9281 | } | |
9282 | ||
362d30a1 | 9283 | value = sgot->output_section->vma + sgot->output_offset + off |
ba93b8ac DJ |
9284 | - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); |
9285 | ||
9286 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
9287 | contents, rel->r_offset, value, | |
00a97672 | 9288 | rel->r_addend); |
ba93b8ac DJ |
9289 | } |
9290 | ||
0855e32b NS |
9291 | case R_ARM_TLS_CALL: |
9292 | case R_ARM_THM_TLS_CALL: | |
ba93b8ac DJ |
9293 | case R_ARM_TLS_GD32: |
9294 | case R_ARM_TLS_IE32: | |
0855e32b NS |
9295 | case R_ARM_TLS_GOTDESC: |
9296 | case R_ARM_TLS_DESCSEQ: | |
9297 | case R_ARM_THM_TLS_DESCSEQ: | |
ba93b8ac | 9298 | { |
0855e32b NS |
9299 | bfd_vma off, offplt; |
9300 | int indx = 0; | |
ba93b8ac DJ |
9301 | char tls_type; |
9302 | ||
0855e32b | 9303 | BFD_ASSERT (sgot != NULL); |
ba93b8ac | 9304 | |
ba93b8ac DJ |
9305 | if (h != NULL) |
9306 | { | |
9307 | bfd_boolean dyn; | |
9308 | dyn = globals->root.dynamic_sections_created; | |
9309 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) | |
9310 | && (!info->shared | |
9311 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
9312 | { | |
9313 | *unresolved_reloc_p = FALSE; | |
9314 | indx = h->dynindx; | |
9315 | } | |
9316 | off = h->got.offset; | |
0855e32b | 9317 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
ba93b8ac DJ |
9318 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
9319 | } | |
9320 | else | |
9321 | { | |
0855e32b | 9322 | BFD_ASSERT (local_got_offsets != NULL); |
ba93b8ac | 9323 | off = local_got_offsets[r_symndx]; |
0855e32b | 9324 | offplt = local_tlsdesc_gotents[r_symndx]; |
ba93b8ac DJ |
9325 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
9326 | } | |
9327 | ||
0855e32b | 9328 | /* Linker relaxations happens from one of the |
b38cadfb | 9329 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ |
0855e32b | 9330 | if (ELF32_R_TYPE(rel->r_info) != r_type) |
b38cadfb | 9331 | tls_type = GOT_TLS_IE; |
0855e32b NS |
9332 | |
9333 | BFD_ASSERT (tls_type != GOT_UNKNOWN); | |
ba93b8ac DJ |
9334 | |
9335 | if ((off & 1) != 0) | |
9336 | off &= ~1; | |
9337 | else | |
9338 | { | |
9339 | bfd_boolean need_relocs = FALSE; | |
9340 | Elf_Internal_Rela outrel; | |
ba93b8ac DJ |
9341 | int cur_off = off; |
9342 | ||
9343 | /* The GOT entries have not been initialized yet. Do it | |
9344 | now, and emit any relocations. If both an IE GOT and a | |
9345 | GD GOT are necessary, we emit the GD first. */ | |
9346 | ||
9347 | if ((info->shared || indx != 0) | |
9348 | && (h == NULL | |
9349 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
9350 | || h->root.type != bfd_link_hash_undefweak)) | |
9351 | { | |
9352 | need_relocs = TRUE; | |
0855e32b | 9353 | BFD_ASSERT (srelgot != NULL); |
ba93b8ac DJ |
9354 | } |
9355 | ||
0855e32b NS |
9356 | if (tls_type & GOT_TLS_GDESC) |
9357 | { | |
47beaa6a RS |
9358 | bfd_byte *loc; |
9359 | ||
0855e32b NS |
9360 | /* We should have relaxed, unless this is an undefined |
9361 | weak symbol. */ | |
9362 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) | |
9363 | || info->shared); | |
9364 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 | |
9365 | <= globals->root.sgotplt->size); | |
9366 | ||
9367 | outrel.r_addend = 0; | |
9368 | outrel.r_offset = (globals->root.sgotplt->output_section->vma | |
9369 | + globals->root.sgotplt->output_offset | |
9370 | + offplt | |
9371 | + globals->sgotplt_jump_table_size); | |
b38cadfb | 9372 | |
0855e32b NS |
9373 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); |
9374 | sreloc = globals->root.srelplt; | |
9375 | loc = sreloc->contents; | |
9376 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); | |
9377 | BFD_ASSERT (loc + RELOC_SIZE (globals) | |
9378 | <= sreloc->contents + sreloc->size); | |
9379 | ||
9380 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
9381 | ||
9382 | /* For globals, the first word in the relocation gets | |
9383 | the relocation index and the top bit set, or zero, | |
9384 | if we're binding now. For locals, it gets the | |
9385 | symbol's offset in the tls section. */ | |
9386 | bfd_put_32 (output_bfd, | |
9387 | !h ? value - elf_hash_table (info)->tls_sec->vma | |
9388 | : info->flags & DF_BIND_NOW ? 0 | |
9389 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), | |
b38cadfb NC |
9390 | globals->root.sgotplt->contents + offplt |
9391 | + globals->sgotplt_jump_table_size); | |
9392 | ||
0855e32b NS |
9393 | /* Second word in the relocation is always zero. */ |
9394 | bfd_put_32 (output_bfd, 0, | |
b38cadfb NC |
9395 | globals->root.sgotplt->contents + offplt |
9396 | + globals->sgotplt_jump_table_size + 4); | |
0855e32b | 9397 | } |
ba93b8ac DJ |
9398 | if (tls_type & GOT_TLS_GD) |
9399 | { | |
9400 | if (need_relocs) | |
9401 | { | |
00a97672 | 9402 | outrel.r_addend = 0; |
362d30a1 RS |
9403 | outrel.r_offset = (sgot->output_section->vma |
9404 | + sgot->output_offset | |
00a97672 | 9405 | + cur_off); |
ba93b8ac | 9406 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 9407 | |
00a97672 RS |
9408 | if (globals->use_rel) |
9409 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9410 | sgot->contents + cur_off); |
00a97672 | 9411 | |
47beaa6a | 9412 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
9413 | |
9414 | if (indx == 0) | |
9415 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
362d30a1 | 9416 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
9417 | else |
9418 | { | |
00a97672 | 9419 | outrel.r_addend = 0; |
ba93b8ac DJ |
9420 | outrel.r_info = ELF32_R_INFO (indx, |
9421 | R_ARM_TLS_DTPOFF32); | |
9422 | outrel.r_offset += 4; | |
00a97672 RS |
9423 | |
9424 | if (globals->use_rel) | |
9425 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9426 | sgot->contents + cur_off + 4); |
00a97672 | 9427 | |
47beaa6a RS |
9428 | elf32_arm_add_dynreloc (output_bfd, info, |
9429 | srelgot, &outrel); | |
ba93b8ac DJ |
9430 | } |
9431 | } | |
9432 | else | |
9433 | { | |
9434 | /* If we are not emitting relocations for a | |
9435 | general dynamic reference, then we must be in a | |
9436 | static link or an executable link with the | |
9437 | symbol binding locally. Mark it as belonging | |
9438 | to module 1, the executable. */ | |
9439 | bfd_put_32 (output_bfd, 1, | |
362d30a1 | 9440 | sgot->contents + cur_off); |
ba93b8ac | 9441 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
362d30a1 | 9442 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
9443 | } |
9444 | ||
9445 | cur_off += 8; | |
9446 | } | |
9447 | ||
9448 | if (tls_type & GOT_TLS_IE) | |
9449 | { | |
9450 | if (need_relocs) | |
9451 | { | |
00a97672 RS |
9452 | if (indx == 0) |
9453 | outrel.r_addend = value - dtpoff_base (info); | |
9454 | else | |
9455 | outrel.r_addend = 0; | |
362d30a1 RS |
9456 | outrel.r_offset = (sgot->output_section->vma |
9457 | + sgot->output_offset | |
ba93b8ac DJ |
9458 | + cur_off); |
9459 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
9460 | ||
00a97672 RS |
9461 | if (globals->use_rel) |
9462 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 9463 | sgot->contents + cur_off); |
ba93b8ac | 9464 | |
47beaa6a | 9465 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
9466 | } |
9467 | else | |
9468 | bfd_put_32 (output_bfd, tpoff (info, value), | |
362d30a1 | 9469 | sgot->contents + cur_off); |
ba93b8ac DJ |
9470 | cur_off += 4; |
9471 | } | |
9472 | ||
9473 | if (h != NULL) | |
9474 | h->got.offset |= 1; | |
9475 | else | |
9476 | local_got_offsets[r_symndx] |= 1; | |
9477 | } | |
9478 | ||
9479 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32) | |
9480 | off += 8; | |
0855e32b NS |
9481 | else if (tls_type & GOT_TLS_GDESC) |
9482 | off = offplt; | |
9483 | ||
9484 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL | |
9485 | || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) | |
9486 | { | |
9487 | bfd_signed_vma offset; | |
12352d3f PB |
9488 | /* TLS stubs are arm mode. The original symbol is a |
9489 | data object, so branch_type is bogus. */ | |
9490 | branch_type = ST_BRANCH_TO_ARM; | |
0855e32b | 9491 | enum elf32_arm_stub_type stub_type |
34e77a92 RS |
9492 | = arm_type_of_stub (info, input_section, rel, |
9493 | st_type, &branch_type, | |
0855e32b NS |
9494 | (struct elf32_arm_link_hash_entry *)h, |
9495 | globals->tls_trampoline, globals->root.splt, | |
9496 | input_bfd, sym_name); | |
9497 | ||
9498 | if (stub_type != arm_stub_none) | |
9499 | { | |
9500 | struct elf32_arm_stub_hash_entry *stub_entry | |
9501 | = elf32_arm_get_stub_entry | |
9502 | (input_section, globals->root.splt, 0, rel, | |
9503 | globals, stub_type); | |
9504 | offset = (stub_entry->stub_offset | |
9505 | + stub_entry->stub_sec->output_offset | |
9506 | + stub_entry->stub_sec->output_section->vma); | |
9507 | } | |
9508 | else | |
9509 | offset = (globals->root.splt->output_section->vma | |
9510 | + globals->root.splt->output_offset | |
9511 | + globals->tls_trampoline); | |
9512 | ||
9513 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL) | |
9514 | { | |
9515 | unsigned long inst; | |
b38cadfb NC |
9516 | |
9517 | offset -= (input_section->output_section->vma | |
9518 | + input_section->output_offset | |
9519 | + rel->r_offset + 8); | |
0855e32b NS |
9520 | |
9521 | inst = offset >> 2; | |
9522 | inst &= 0x00ffffff; | |
9523 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); | |
9524 | } | |
9525 | else | |
9526 | { | |
9527 | /* Thumb blx encodes the offset in a complicated | |
9528 | fashion. */ | |
9529 | unsigned upper_insn, lower_insn; | |
9530 | unsigned neg; | |
9531 | ||
b38cadfb NC |
9532 | offset -= (input_section->output_section->vma |
9533 | + input_section->output_offset | |
0855e32b | 9534 | + rel->r_offset + 4); |
b38cadfb | 9535 | |
12352d3f PB |
9536 | if (stub_type != arm_stub_none |
9537 | && arm_stub_is_thumb (stub_type)) | |
9538 | { | |
9539 | lower_insn = 0xd000; | |
9540 | } | |
9541 | else | |
9542 | { | |
9543 | lower_insn = 0xc000; | |
9544 | /* Round up the offset to a word boundary */ | |
9545 | offset = (offset + 2) & ~2; | |
9546 | } | |
9547 | ||
0855e32b NS |
9548 | neg = offset < 0; |
9549 | upper_insn = (0xf000 | |
9550 | | ((offset >> 12) & 0x3ff) | |
9551 | | (neg << 10)); | |
12352d3f | 9552 | lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) |
0855e32b | 9553 | | (((!((offset >> 22) & 1)) ^ neg) << 11) |
12352d3f | 9554 | | ((offset >> 1) & 0x7ff); |
0855e32b NS |
9555 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
9556 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
9557 | return bfd_reloc_ok; | |
9558 | } | |
9559 | } | |
9560 | /* These relocations needs special care, as besides the fact | |
9561 | they point somewhere in .gotplt, the addend must be | |
9562 | adjusted accordingly depending on the type of instruction | |
9563 | we refer to */ | |
9564 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) | |
9565 | { | |
9566 | unsigned long data, insn; | |
9567 | unsigned thumb; | |
b38cadfb | 9568 | |
0855e32b NS |
9569 | data = bfd_get_32 (input_bfd, hit_data); |
9570 | thumb = data & 1; | |
9571 | data &= ~1u; | |
b38cadfb | 9572 | |
0855e32b NS |
9573 | if (thumb) |
9574 | { | |
9575 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); | |
9576 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
9577 | insn = (insn << 16) | |
9578 | | bfd_get_16 (input_bfd, | |
9579 | contents + rel->r_offset - data + 2); | |
9580 | if ((insn & 0xf800c000) == 0xf000c000) | |
9581 | /* bl/blx */ | |
9582 | value = -6; | |
9583 | else if ((insn & 0xffffff00) == 0x4400) | |
9584 | /* add */ | |
9585 | value = -5; | |
9586 | else | |
9587 | { | |
9588 | (*_bfd_error_handler) | |
9589 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"), | |
9590 | input_bfd, input_section, | |
9591 | (unsigned long)rel->r_offset, insn); | |
9592 | return bfd_reloc_notsupported; | |
9593 | } | |
9594 | } | |
9595 | else | |
9596 | { | |
9597 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); | |
9598 | ||
9599 | switch (insn >> 24) | |
9600 | { | |
9601 | case 0xeb: /* bl */ | |
9602 | case 0xfa: /* blx */ | |
9603 | value = -4; | |
9604 | break; | |
9605 | ||
9606 | case 0xe0: /* add */ | |
9607 | value = -8; | |
9608 | break; | |
b38cadfb | 9609 | |
0855e32b NS |
9610 | default: |
9611 | (*_bfd_error_handler) | |
9612 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"), | |
9613 | input_bfd, input_section, | |
9614 | (unsigned long)rel->r_offset, insn); | |
9615 | return bfd_reloc_notsupported; | |
9616 | } | |
9617 | } | |
b38cadfb | 9618 | |
0855e32b NS |
9619 | value += ((globals->root.sgotplt->output_section->vma |
9620 | + globals->root.sgotplt->output_offset + off) | |
9621 | - (input_section->output_section->vma | |
9622 | + input_section->output_offset | |
9623 | + rel->r_offset) | |
9624 | + globals->sgotplt_jump_table_size); | |
9625 | } | |
9626 | else | |
9627 | value = ((globals->root.sgot->output_section->vma | |
9628 | + globals->root.sgot->output_offset + off) | |
9629 | - (input_section->output_section->vma | |
9630 | + input_section->output_offset + rel->r_offset)); | |
ba93b8ac DJ |
9631 | |
9632 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
9633 | contents, rel->r_offset, value, | |
00a97672 | 9634 | rel->r_addend); |
ba93b8ac DJ |
9635 | } |
9636 | ||
9637 | case R_ARM_TLS_LE32: | |
9ec0c936 | 9638 | if (info->shared && !info->pie) |
ba93b8ac DJ |
9639 | { |
9640 | (*_bfd_error_handler) | |
9641 | (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), | |
9642 | input_bfd, input_section, | |
9643 | (long) rel->r_offset, howto->name); | |
46691134 | 9644 | return bfd_reloc_notsupported; |
ba93b8ac DJ |
9645 | } |
9646 | else | |
9647 | value = tpoff (info, value); | |
906e58ca | 9648 | |
ba93b8ac | 9649 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
9650 | contents, rel->r_offset, value, |
9651 | rel->r_addend); | |
ba93b8ac | 9652 | |
319850b4 JB |
9653 | case R_ARM_V4BX: |
9654 | if (globals->fix_v4bx) | |
845b51d6 PB |
9655 | { |
9656 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 9657 | |
845b51d6 PB |
9658 | /* Ensure that we have a BX instruction. */ |
9659 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 9660 | |
845b51d6 PB |
9661 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
9662 | { | |
9663 | /* Branch to veneer. */ | |
9664 | bfd_vma glue_addr; | |
9665 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
9666 | glue_addr -= input_section->output_section->vma | |
9667 | + input_section->output_offset | |
9668 | + rel->r_offset + 8; | |
9669 | insn = (insn & 0xf0000000) | 0x0a000000 | |
9670 | | ((glue_addr >> 2) & 0x00ffffff); | |
9671 | } | |
9672 | else | |
9673 | { | |
9674 | /* Preserve Rm (lowest four bits) and the condition code | |
9675 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
9676 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
9677 | } | |
319850b4 | 9678 | |
845b51d6 PB |
9679 | bfd_put_32 (input_bfd, insn, hit_data); |
9680 | } | |
319850b4 JB |
9681 | return bfd_reloc_ok; |
9682 | ||
b6895b4f PB |
9683 | case R_ARM_MOVW_ABS_NC: |
9684 | case R_ARM_MOVT_ABS: | |
9685 | case R_ARM_MOVW_PREL_NC: | |
9686 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
9687 | /* Until we properly support segment-base-relative addressing then |
9688 | we assume the segment base to be zero, as for the group relocations. | |
9689 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
9690 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
9691 | case R_ARM_MOVW_BREL_NC: | |
9692 | case R_ARM_MOVW_BREL: | |
9693 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
9694 | { |
9695 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9696 | ||
9697 | if (globals->use_rel) | |
9698 | { | |
9699 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 9700 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 9701 | } |
92f5d02b | 9702 | |
b6895b4f | 9703 | value += signed_addend; |
b6895b4f PB |
9704 | |
9705 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
9706 | value -= (input_section->output_section->vma | |
9707 | + input_section->output_offset + rel->r_offset); | |
9708 | ||
92f5d02b MS |
9709 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
9710 | return bfd_reloc_overflow; | |
9711 | ||
35fc36a8 | 9712 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
9713 | value |= 1; |
9714 | ||
9715 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
9716 | || r_type == R_ARM_MOVT_BREL) | |
b6895b4f PB |
9717 | value >>= 16; |
9718 | ||
9719 | insn &= 0xfff0f000; | |
9720 | insn |= value & 0xfff; | |
9721 | insn |= (value & 0xf000) << 4; | |
9722 | bfd_put_32 (input_bfd, insn, hit_data); | |
9723 | } | |
9724 | return bfd_reloc_ok; | |
9725 | ||
9726 | case R_ARM_THM_MOVW_ABS_NC: | |
9727 | case R_ARM_THM_MOVT_ABS: | |
9728 | case R_ARM_THM_MOVW_PREL_NC: | |
9729 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
9730 | /* Until we properly support segment-base-relative addressing then |
9731 | we assume the segment base to be zero, as for the above relocations. | |
9732 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
9733 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
9734 | as R_ARM_THM_MOVT_ABS. */ | |
9735 | case R_ARM_THM_MOVW_BREL_NC: | |
9736 | case R_ARM_THM_MOVW_BREL: | |
9737 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
9738 | { |
9739 | bfd_vma insn; | |
906e58ca | 9740 | |
b6895b4f PB |
9741 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
9742 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
9743 | ||
9744 | if (globals->use_rel) | |
9745 | { | |
9746 | addend = ((insn >> 4) & 0xf000) | |
9747 | | ((insn >> 15) & 0x0800) | |
9748 | | ((insn >> 4) & 0x0700) | |
9749 | | (insn & 0x00ff); | |
39623e12 | 9750 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 9751 | } |
92f5d02b | 9752 | |
b6895b4f | 9753 | value += signed_addend; |
b6895b4f PB |
9754 | |
9755 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
9756 | value -= (input_section->output_section->vma | |
9757 | + input_section->output_offset + rel->r_offset); | |
9758 | ||
92f5d02b MS |
9759 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
9760 | return bfd_reloc_overflow; | |
9761 | ||
35fc36a8 | 9762 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
9763 | value |= 1; |
9764 | ||
9765 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
9766 | || r_type == R_ARM_THM_MOVT_BREL) | |
b6895b4f PB |
9767 | value >>= 16; |
9768 | ||
9769 | insn &= 0xfbf08f00; | |
9770 | insn |= (value & 0xf000) << 4; | |
9771 | insn |= (value & 0x0800) << 15; | |
9772 | insn |= (value & 0x0700) << 4; | |
9773 | insn |= (value & 0x00ff); | |
9774 | ||
9775 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
9776 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
9777 | } | |
9778 | return bfd_reloc_ok; | |
9779 | ||
4962c51a MS |
9780 | case R_ARM_ALU_PC_G0_NC: |
9781 | case R_ARM_ALU_PC_G1_NC: | |
9782 | case R_ARM_ALU_PC_G0: | |
9783 | case R_ARM_ALU_PC_G1: | |
9784 | case R_ARM_ALU_PC_G2: | |
9785 | case R_ARM_ALU_SB_G0_NC: | |
9786 | case R_ARM_ALU_SB_G1_NC: | |
9787 | case R_ARM_ALU_SB_G0: | |
9788 | case R_ARM_ALU_SB_G1: | |
9789 | case R_ARM_ALU_SB_G2: | |
9790 | { | |
9791 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9792 | bfd_vma pc = input_section->output_section->vma | |
9793 | + input_section->output_offset + rel->r_offset; | |
9794 | /* sb should be the origin of the *segment* containing the symbol. | |
9795 | It is not clear how to obtain this OS-dependent value, so we | |
9796 | make an arbitrary choice of zero. */ | |
9797 | bfd_vma sb = 0; | |
9798 | bfd_vma residual; | |
9799 | bfd_vma g_n; | |
9800 | bfd_signed_vma signed_value; | |
9801 | int group = 0; | |
9802 | ||
9803 | /* Determine which group of bits to select. */ | |
9804 | switch (r_type) | |
9805 | { | |
9806 | case R_ARM_ALU_PC_G0_NC: | |
9807 | case R_ARM_ALU_PC_G0: | |
9808 | case R_ARM_ALU_SB_G0_NC: | |
9809 | case R_ARM_ALU_SB_G0: | |
9810 | group = 0; | |
9811 | break; | |
9812 | ||
9813 | case R_ARM_ALU_PC_G1_NC: | |
9814 | case R_ARM_ALU_PC_G1: | |
9815 | case R_ARM_ALU_SB_G1_NC: | |
9816 | case R_ARM_ALU_SB_G1: | |
9817 | group = 1; | |
9818 | break; | |
9819 | ||
9820 | case R_ARM_ALU_PC_G2: | |
9821 | case R_ARM_ALU_SB_G2: | |
9822 | group = 2; | |
9823 | break; | |
9824 | ||
9825 | default: | |
906e58ca | 9826 | abort (); |
4962c51a MS |
9827 | } |
9828 | ||
9829 | /* If REL, extract the addend from the insn. If RELA, it will | |
9830 | have already been fetched for us. */ | |
9831 | if (globals->use_rel) | |
9832 | { | |
9833 | int negative; | |
9834 | bfd_vma constant = insn & 0xff; | |
9835 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
9836 | ||
9837 | if (rotation == 0) | |
9838 | signed_addend = constant; | |
9839 | else | |
9840 | { | |
9841 | /* Compensate for the fact that in the instruction, the | |
9842 | rotation is stored in multiples of 2 bits. */ | |
9843 | rotation *= 2; | |
9844 | ||
9845 | /* Rotate "constant" right by "rotation" bits. */ | |
9846 | signed_addend = (constant >> rotation) | | |
9847 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
9848 | } | |
9849 | ||
9850 | /* Determine if the instruction is an ADD or a SUB. | |
9851 | (For REL, this determines the sign of the addend.) */ | |
9852 | negative = identify_add_or_sub (insn); | |
9853 | if (negative == 0) | |
9854 | { | |
9855 | (*_bfd_error_handler) | |
9856 | (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"), | |
9857 | input_bfd, input_section, | |
9858 | (long) rel->r_offset, howto->name); | |
906e58ca | 9859 | return bfd_reloc_overflow; |
4962c51a MS |
9860 | } |
9861 | ||
9862 | signed_addend *= negative; | |
9863 | } | |
9864 | ||
9865 | /* Compute the value (X) to go in the place. */ | |
9866 | if (r_type == R_ARM_ALU_PC_G0_NC | |
9867 | || r_type == R_ARM_ALU_PC_G1_NC | |
9868 | || r_type == R_ARM_ALU_PC_G0 | |
9869 | || r_type == R_ARM_ALU_PC_G1 | |
9870 | || r_type == R_ARM_ALU_PC_G2) | |
9871 | /* PC relative. */ | |
9872 | signed_value = value - pc + signed_addend; | |
9873 | else | |
9874 | /* Section base relative. */ | |
9875 | signed_value = value - sb + signed_addend; | |
9876 | ||
9877 | /* If the target symbol is a Thumb function, then set the | |
9878 | Thumb bit in the address. */ | |
35fc36a8 | 9879 | if (branch_type == ST_BRANCH_TO_THUMB) |
4962c51a MS |
9880 | signed_value |= 1; |
9881 | ||
9882 | /* Calculate the value of the relevant G_n, in encoded | |
9883 | constant-with-rotation format. */ | |
9884 | g_n = calculate_group_reloc_mask (abs (signed_value), group, | |
9885 | &residual); | |
9886 | ||
9887 | /* Check for overflow if required. */ | |
9888 | if ((r_type == R_ARM_ALU_PC_G0 | |
9889 | || r_type == R_ARM_ALU_PC_G1 | |
9890 | || r_type == R_ARM_ALU_PC_G2 | |
9891 | || r_type == R_ARM_ALU_SB_G0 | |
9892 | || r_type == R_ARM_ALU_SB_G1 | |
9893 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
9894 | { | |
9895 | (*_bfd_error_handler) | |
9896 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
9897 | input_bfd, input_section, | |
9898 | (long) rel->r_offset, abs (signed_value), howto->name); | |
9899 | return bfd_reloc_overflow; | |
9900 | } | |
9901 | ||
9902 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
9903 | not to destroy the S bit. */ | |
9904 | insn &= 0xff1ff000; | |
9905 | ||
9906 | /* Set the opcode according to whether the value to go in the | |
9907 | place is negative. */ | |
9908 | if (signed_value < 0) | |
9909 | insn |= 1 << 22; | |
9910 | else | |
9911 | insn |= 1 << 23; | |
9912 | ||
9913 | /* Encode the offset. */ | |
9914 | insn |= g_n; | |
9915 | ||
9916 | bfd_put_32 (input_bfd, insn, hit_data); | |
9917 | } | |
9918 | return bfd_reloc_ok; | |
9919 | ||
9920 | case R_ARM_LDR_PC_G0: | |
9921 | case R_ARM_LDR_PC_G1: | |
9922 | case R_ARM_LDR_PC_G2: | |
9923 | case R_ARM_LDR_SB_G0: | |
9924 | case R_ARM_LDR_SB_G1: | |
9925 | case R_ARM_LDR_SB_G2: | |
9926 | { | |
9927 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
9928 | bfd_vma pc = input_section->output_section->vma | |
9929 | + input_section->output_offset + rel->r_offset; | |
9930 | bfd_vma sb = 0; /* See note above. */ | |
9931 | bfd_vma residual; | |
9932 | bfd_signed_vma signed_value; | |
9933 | int group = 0; | |
9934 | ||
9935 | /* Determine which groups of bits to calculate. */ | |
9936 | switch (r_type) | |
9937 | { | |
9938 | case R_ARM_LDR_PC_G0: | |
9939 | case R_ARM_LDR_SB_G0: | |
9940 | group = 0; | |
9941 | break; | |
9942 | ||
9943 | case R_ARM_LDR_PC_G1: | |
9944 | case R_ARM_LDR_SB_G1: | |
9945 | group = 1; | |
9946 | break; | |
9947 | ||
9948 | case R_ARM_LDR_PC_G2: | |
9949 | case R_ARM_LDR_SB_G2: | |
9950 | group = 2; | |
9951 | break; | |
9952 | ||
9953 | default: | |
906e58ca | 9954 | abort (); |
4962c51a MS |
9955 | } |
9956 | ||
9957 | /* If REL, extract the addend from the insn. If RELA, it will | |
9958 | have already been fetched for us. */ | |
9959 | if (globals->use_rel) | |
9960 | { | |
9961 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
9962 | signed_addend = negative * (insn & 0xfff); | |
9963 | } | |
9964 | ||
9965 | /* Compute the value (X) to go in the place. */ | |
9966 | if (r_type == R_ARM_LDR_PC_G0 | |
9967 | || r_type == R_ARM_LDR_PC_G1 | |
9968 | || r_type == R_ARM_LDR_PC_G2) | |
9969 | /* PC relative. */ | |
9970 | signed_value = value - pc + signed_addend; | |
9971 | else | |
9972 | /* Section base relative. */ | |
9973 | signed_value = value - sb + signed_addend; | |
9974 | ||
9975 | /* Calculate the value of the relevant G_{n-1} to obtain | |
9976 | the residual at that stage. */ | |
9977 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
9978 | ||
9979 | /* Check for overflow. */ | |
9980 | if (residual >= 0x1000) | |
9981 | { | |
9982 | (*_bfd_error_handler) | |
9983 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
9984 | input_bfd, input_section, | |
9985 | (long) rel->r_offset, abs (signed_value), howto->name); | |
9986 | return bfd_reloc_overflow; | |
9987 | } | |
9988 | ||
9989 | /* Mask out the value and U bit. */ | |
9990 | insn &= 0xff7ff000; | |
9991 | ||
9992 | /* Set the U bit if the value to go in the place is non-negative. */ | |
9993 | if (signed_value >= 0) | |
9994 | insn |= 1 << 23; | |
9995 | ||
9996 | /* Encode the offset. */ | |
9997 | insn |= residual; | |
9998 | ||
9999 | bfd_put_32 (input_bfd, insn, hit_data); | |
10000 | } | |
10001 | return bfd_reloc_ok; | |
10002 | ||
10003 | case R_ARM_LDRS_PC_G0: | |
10004 | case R_ARM_LDRS_PC_G1: | |
10005 | case R_ARM_LDRS_PC_G2: | |
10006 | case R_ARM_LDRS_SB_G0: | |
10007 | case R_ARM_LDRS_SB_G1: | |
10008 | case R_ARM_LDRS_SB_G2: | |
10009 | { | |
10010 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
10011 | bfd_vma pc = input_section->output_section->vma | |
10012 | + input_section->output_offset + rel->r_offset; | |
10013 | bfd_vma sb = 0; /* See note above. */ | |
10014 | bfd_vma residual; | |
10015 | bfd_signed_vma signed_value; | |
10016 | int group = 0; | |
10017 | ||
10018 | /* Determine which groups of bits to calculate. */ | |
10019 | switch (r_type) | |
10020 | { | |
10021 | case R_ARM_LDRS_PC_G0: | |
10022 | case R_ARM_LDRS_SB_G0: | |
10023 | group = 0; | |
10024 | break; | |
10025 | ||
10026 | case R_ARM_LDRS_PC_G1: | |
10027 | case R_ARM_LDRS_SB_G1: | |
10028 | group = 1; | |
10029 | break; | |
10030 | ||
10031 | case R_ARM_LDRS_PC_G2: | |
10032 | case R_ARM_LDRS_SB_G2: | |
10033 | group = 2; | |
10034 | break; | |
10035 | ||
10036 | default: | |
906e58ca | 10037 | abort (); |
4962c51a MS |
10038 | } |
10039 | ||
10040 | /* If REL, extract the addend from the insn. If RELA, it will | |
10041 | have already been fetched for us. */ | |
10042 | if (globals->use_rel) | |
10043 | { | |
10044 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
10045 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
10046 | } | |
10047 | ||
10048 | /* Compute the value (X) to go in the place. */ | |
10049 | if (r_type == R_ARM_LDRS_PC_G0 | |
10050 | || r_type == R_ARM_LDRS_PC_G1 | |
10051 | || r_type == R_ARM_LDRS_PC_G2) | |
10052 | /* PC relative. */ | |
10053 | signed_value = value - pc + signed_addend; | |
10054 | else | |
10055 | /* Section base relative. */ | |
10056 | signed_value = value - sb + signed_addend; | |
10057 | ||
10058 | /* Calculate the value of the relevant G_{n-1} to obtain | |
10059 | the residual at that stage. */ | |
10060 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
10061 | ||
10062 | /* Check for overflow. */ | |
10063 | if (residual >= 0x100) | |
10064 | { | |
10065 | (*_bfd_error_handler) | |
10066 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
10067 | input_bfd, input_section, | |
10068 | (long) rel->r_offset, abs (signed_value), howto->name); | |
10069 | return bfd_reloc_overflow; | |
10070 | } | |
10071 | ||
10072 | /* Mask out the value and U bit. */ | |
10073 | insn &= 0xff7ff0f0; | |
10074 | ||
10075 | /* Set the U bit if the value to go in the place is non-negative. */ | |
10076 | if (signed_value >= 0) | |
10077 | insn |= 1 << 23; | |
10078 | ||
10079 | /* Encode the offset. */ | |
10080 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
10081 | ||
10082 | bfd_put_32 (input_bfd, insn, hit_data); | |
10083 | } | |
10084 | return bfd_reloc_ok; | |
10085 | ||
10086 | case R_ARM_LDC_PC_G0: | |
10087 | case R_ARM_LDC_PC_G1: | |
10088 | case R_ARM_LDC_PC_G2: | |
10089 | case R_ARM_LDC_SB_G0: | |
10090 | case R_ARM_LDC_SB_G1: | |
10091 | case R_ARM_LDC_SB_G2: | |
10092 | { | |
10093 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
10094 | bfd_vma pc = input_section->output_section->vma | |
10095 | + input_section->output_offset + rel->r_offset; | |
10096 | bfd_vma sb = 0; /* See note above. */ | |
10097 | bfd_vma residual; | |
10098 | bfd_signed_vma signed_value; | |
10099 | int group = 0; | |
10100 | ||
10101 | /* Determine which groups of bits to calculate. */ | |
10102 | switch (r_type) | |
10103 | { | |
10104 | case R_ARM_LDC_PC_G0: | |
10105 | case R_ARM_LDC_SB_G0: | |
10106 | group = 0; | |
10107 | break; | |
10108 | ||
10109 | case R_ARM_LDC_PC_G1: | |
10110 | case R_ARM_LDC_SB_G1: | |
10111 | group = 1; | |
10112 | break; | |
10113 | ||
10114 | case R_ARM_LDC_PC_G2: | |
10115 | case R_ARM_LDC_SB_G2: | |
10116 | group = 2; | |
10117 | break; | |
10118 | ||
10119 | default: | |
906e58ca | 10120 | abort (); |
4962c51a MS |
10121 | } |
10122 | ||
10123 | /* If REL, extract the addend from the insn. If RELA, it will | |
10124 | have already been fetched for us. */ | |
10125 | if (globals->use_rel) | |
10126 | { | |
10127 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
10128 | signed_addend = negative * ((insn & 0xff) << 2); | |
10129 | } | |
10130 | ||
10131 | /* Compute the value (X) to go in the place. */ | |
10132 | if (r_type == R_ARM_LDC_PC_G0 | |
10133 | || r_type == R_ARM_LDC_PC_G1 | |
10134 | || r_type == R_ARM_LDC_PC_G2) | |
10135 | /* PC relative. */ | |
10136 | signed_value = value - pc + signed_addend; | |
10137 | else | |
10138 | /* Section base relative. */ | |
10139 | signed_value = value - sb + signed_addend; | |
10140 | ||
10141 | /* Calculate the value of the relevant G_{n-1} to obtain | |
10142 | the residual at that stage. */ | |
10143 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
10144 | ||
10145 | /* Check for overflow. (The absolute value to go in the place must be | |
10146 | divisible by four and, after having been divided by four, must | |
10147 | fit in eight bits.) */ | |
10148 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
10149 | { | |
10150 | (*_bfd_error_handler) | |
10151 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
10152 | input_bfd, input_section, | |
10153 | (long) rel->r_offset, abs (signed_value), howto->name); | |
10154 | return bfd_reloc_overflow; | |
10155 | } | |
10156 | ||
10157 | /* Mask out the value and U bit. */ | |
10158 | insn &= 0xff7fff00; | |
10159 | ||
10160 | /* Set the U bit if the value to go in the place is non-negative. */ | |
10161 | if (signed_value >= 0) | |
10162 | insn |= 1 << 23; | |
10163 | ||
10164 | /* Encode the offset. */ | |
10165 | insn |= residual >> 2; | |
10166 | ||
10167 | bfd_put_32 (input_bfd, insn, hit_data); | |
10168 | } | |
10169 | return bfd_reloc_ok; | |
10170 | ||
252b5132 RH |
10171 | default: |
10172 | return bfd_reloc_notsupported; | |
10173 | } | |
10174 | } | |
10175 | ||
98c1d4aa NC |
10176 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
10177 | static void | |
57e8b36a NC |
10178 | arm_add_to_rel (bfd * abfd, |
10179 | bfd_byte * address, | |
10180 | reloc_howto_type * howto, | |
10181 | bfd_signed_vma increment) | |
98c1d4aa | 10182 | { |
98c1d4aa NC |
10183 | bfd_signed_vma addend; |
10184 | ||
bd97cb95 DJ |
10185 | if (howto->type == R_ARM_THM_CALL |
10186 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 10187 | { |
9a5aca8c AM |
10188 | int upper_insn, lower_insn; |
10189 | int upper, lower; | |
98c1d4aa | 10190 | |
9a5aca8c AM |
10191 | upper_insn = bfd_get_16 (abfd, address); |
10192 | lower_insn = bfd_get_16 (abfd, address + 2); | |
10193 | upper = upper_insn & 0x7ff; | |
10194 | lower = lower_insn & 0x7ff; | |
10195 | ||
10196 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 10197 | addend += increment; |
9a5aca8c | 10198 | addend >>= 1; |
98c1d4aa | 10199 | |
9a5aca8c AM |
10200 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
10201 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
10202 | ||
dc810e39 AM |
10203 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
10204 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
10205 | } |
10206 | else | |
10207 | { | |
10208 | bfd_vma contents; | |
10209 | ||
10210 | contents = bfd_get_32 (abfd, address); | |
10211 | ||
10212 | /* Get the (signed) value from the instruction. */ | |
10213 | addend = contents & howto->src_mask; | |
10214 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10215 | { | |
10216 | bfd_signed_vma mask; | |
10217 | ||
10218 | mask = -1; | |
10219 | mask &= ~ howto->src_mask; | |
10220 | addend |= mask; | |
10221 | } | |
10222 | ||
10223 | /* Add in the increment, (which is a byte value). */ | |
10224 | switch (howto->type) | |
10225 | { | |
10226 | default: | |
10227 | addend += increment; | |
10228 | break; | |
10229 | ||
10230 | case R_ARM_PC24: | |
c6596c5e | 10231 | case R_ARM_PLT32: |
5b5bb741 PB |
10232 | case R_ARM_CALL: |
10233 | case R_ARM_JUMP24: | |
9a5aca8c | 10234 | addend <<= howto->size; |
dc810e39 | 10235 | addend += increment; |
9a5aca8c AM |
10236 | |
10237 | /* Should we check for overflow here ? */ | |
10238 | ||
10239 | /* Drop any undesired bits. */ | |
10240 | addend >>= howto->rightshift; | |
10241 | break; | |
10242 | } | |
10243 | ||
10244 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
10245 | ||
10246 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 10247 | } |
98c1d4aa | 10248 | } |
252b5132 | 10249 | |
ba93b8ac DJ |
10250 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
10251 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
10252 | || (R_TYPE) == R_ARM_TLS_LDO32 \ | |
10253 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
10254 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ | |
10255 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
10256 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
10257 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
0855e32b NS |
10258 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
10259 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) | |
10260 | ||
10261 | /* Specific set of relocations for the gnu tls dialect. */ | |
10262 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ | |
10263 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ | |
10264 | || (R_TYPE) == R_ARM_TLS_CALL \ | |
10265 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ | |
10266 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ | |
10267 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) | |
ba93b8ac | 10268 | |
252b5132 | 10269 | /* Relocate an ARM ELF section. */ |
906e58ca | 10270 | |
b34976b6 | 10271 | static bfd_boolean |
57e8b36a NC |
10272 | elf32_arm_relocate_section (bfd * output_bfd, |
10273 | struct bfd_link_info * info, | |
10274 | bfd * input_bfd, | |
10275 | asection * input_section, | |
10276 | bfd_byte * contents, | |
10277 | Elf_Internal_Rela * relocs, | |
10278 | Elf_Internal_Sym * local_syms, | |
10279 | asection ** local_sections) | |
252b5132 | 10280 | { |
b34976b6 AM |
10281 | Elf_Internal_Shdr *symtab_hdr; |
10282 | struct elf_link_hash_entry **sym_hashes; | |
10283 | Elf_Internal_Rela *rel; | |
10284 | Elf_Internal_Rela *relend; | |
10285 | const char *name; | |
b32d3aa2 | 10286 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 10287 | |
4e7fd91e | 10288 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
10289 | if (globals == NULL) |
10290 | return FALSE; | |
b491616a | 10291 | |
0ffa91dd | 10292 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
10293 | sym_hashes = elf_sym_hashes (input_bfd); |
10294 | ||
10295 | rel = relocs; | |
10296 | relend = relocs + input_section->reloc_count; | |
10297 | for (; rel < relend; rel++) | |
10298 | { | |
ba96a88f NC |
10299 | int r_type; |
10300 | reloc_howto_type * howto; | |
10301 | unsigned long r_symndx; | |
10302 | Elf_Internal_Sym * sym; | |
10303 | asection * sec; | |
252b5132 | 10304 | struct elf_link_hash_entry * h; |
ba96a88f NC |
10305 | bfd_vma relocation; |
10306 | bfd_reloc_status_type r; | |
10307 | arelent bfd_reloc; | |
ba93b8ac | 10308 | char sym_type; |
0945cdfd | 10309 | bfd_boolean unresolved_reloc = FALSE; |
f2a9dd69 | 10310 | char *error_message = NULL; |
f21f3fe0 | 10311 | |
252b5132 | 10312 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 10313 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 10314 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 10315 | |
ba96a88f NC |
10316 | if ( r_type == R_ARM_GNU_VTENTRY |
10317 | || r_type == R_ARM_GNU_VTINHERIT) | |
252b5132 RH |
10318 | continue; |
10319 | ||
b32d3aa2 | 10320 | bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
ba96a88f | 10321 | howto = bfd_reloc.howto; |
252b5132 | 10322 | |
252b5132 RH |
10323 | h = NULL; |
10324 | sym = NULL; | |
10325 | sec = NULL; | |
9b485d32 | 10326 | |
252b5132 RH |
10327 | if (r_symndx < symtab_hdr->sh_info) |
10328 | { | |
10329 | sym = local_syms + r_symndx; | |
ba93b8ac | 10330 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 10331 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
10332 | |
10333 | /* An object file might have a reference to a local | |
10334 | undefined symbol. This is a daft object file, but we | |
10335 | should at least do something about it. V4BX & NONE | |
10336 | relocations do not use the symbol and are explicitly | |
77b4f08f TS |
10337 | allowed to use the undefined symbol, so allow those. |
10338 | Likewise for relocations against STN_UNDEF. */ | |
ffcb4889 NS |
10339 | if (r_type != R_ARM_V4BX |
10340 | && r_type != R_ARM_NONE | |
77b4f08f | 10341 | && r_symndx != STN_UNDEF |
ffcb4889 NS |
10342 | && bfd_is_und_section (sec) |
10343 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
10344 | { | |
10345 | if (!info->callbacks->undefined_symbol | |
10346 | (info, bfd_elf_string_from_elf_section | |
10347 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
10348 | input_bfd, input_section, | |
10349 | rel->r_offset, TRUE)) | |
10350 | return FALSE; | |
10351 | } | |
b38cadfb | 10352 | |
4e7fd91e | 10353 | if (globals->use_rel) |
f8df10f4 | 10354 | { |
4e7fd91e PB |
10355 | relocation = (sec->output_section->vma |
10356 | + sec->output_offset | |
10357 | + sym->st_value); | |
ab96bf03 AM |
10358 | if (!info->relocatable |
10359 | && (sec->flags & SEC_MERGE) | |
10360 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 10361 | { |
4e7fd91e PB |
10362 | asection *msec; |
10363 | bfd_vma addend, value; | |
10364 | ||
39623e12 | 10365 | switch (r_type) |
4e7fd91e | 10366 | { |
39623e12 PB |
10367 | case R_ARM_MOVW_ABS_NC: |
10368 | case R_ARM_MOVT_ABS: | |
10369 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10370 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
10371 | addend = (addend ^ 0x8000) - 0x8000; | |
10372 | break; | |
f8df10f4 | 10373 | |
39623e12 PB |
10374 | case R_ARM_THM_MOVW_ABS_NC: |
10375 | case R_ARM_THM_MOVT_ABS: | |
10376 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
10377 | << 16; | |
10378 | value |= bfd_get_16 (input_bfd, | |
10379 | contents + rel->r_offset + 2); | |
10380 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
10381 | | ((value & 0x04000000) >> 15); | |
10382 | addend = (addend ^ 0x8000) - 0x8000; | |
10383 | break; | |
f8df10f4 | 10384 | |
39623e12 PB |
10385 | default: |
10386 | if (howto->rightshift | |
10387 | || (howto->src_mask & (howto->src_mask + 1))) | |
10388 | { | |
10389 | (*_bfd_error_handler) | |
10390 | (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"), | |
10391 | input_bfd, input_section, | |
10392 | (long) rel->r_offset, howto->name); | |
10393 | return FALSE; | |
10394 | } | |
10395 | ||
10396 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
10397 | ||
10398 | /* Get the (signed) value from the instruction. */ | |
10399 | addend = value & howto->src_mask; | |
10400 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10401 | { | |
10402 | bfd_signed_vma mask; | |
10403 | ||
10404 | mask = -1; | |
10405 | mask &= ~ howto->src_mask; | |
10406 | addend |= mask; | |
10407 | } | |
10408 | break; | |
4e7fd91e | 10409 | } |
39623e12 | 10410 | |
4e7fd91e PB |
10411 | msec = sec; |
10412 | addend = | |
10413 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
10414 | - relocation; | |
10415 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 | 10416 | |
cc643b88 | 10417 | /* Cases here must match those in the preceding |
39623e12 PB |
10418 | switch statement. */ |
10419 | switch (r_type) | |
10420 | { | |
10421 | case R_ARM_MOVW_ABS_NC: | |
10422 | case R_ARM_MOVT_ABS: | |
10423 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
10424 | | (addend & 0xfff); | |
10425 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
10426 | break; | |
10427 | ||
10428 | case R_ARM_THM_MOVW_ABS_NC: | |
10429 | case R_ARM_THM_MOVT_ABS: | |
10430 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
10431 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
10432 | bfd_put_16 (input_bfd, value >> 16, | |
10433 | contents + rel->r_offset); | |
10434 | bfd_put_16 (input_bfd, value, | |
10435 | contents + rel->r_offset + 2); | |
10436 | break; | |
10437 | ||
10438 | default: | |
10439 | value = (value & ~ howto->dst_mask) | |
10440 | | (addend & howto->dst_mask); | |
10441 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
10442 | break; | |
10443 | } | |
f8df10f4 | 10444 | } |
f8df10f4 | 10445 | } |
4e7fd91e PB |
10446 | else |
10447 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
10448 | } |
10449 | else | |
10450 | { | |
560e09e9 | 10451 | bfd_boolean warned; |
560e09e9 | 10452 | |
b2a8e766 AM |
10453 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
10454 | r_symndx, symtab_hdr, sym_hashes, | |
10455 | h, sec, relocation, | |
10456 | unresolved_reloc, warned); | |
ba93b8ac DJ |
10457 | |
10458 | sym_type = h->type; | |
252b5132 RH |
10459 | } |
10460 | ||
dbaa2011 | 10461 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 10462 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 10463 | rel, 1, relend, howto, 0, contents); |
ab96bf03 AM |
10464 | |
10465 | if (info->relocatable) | |
10466 | { | |
10467 | /* This is a relocatable link. We don't have to change | |
10468 | anything, unless the reloc is against a section symbol, | |
10469 | in which case we have to adjust according to where the | |
10470 | section symbol winds up in the output section. */ | |
10471 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
10472 | { | |
10473 | if (globals->use_rel) | |
10474 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
10475 | howto, (bfd_signed_vma) sec->output_offset); | |
10476 | else | |
10477 | rel->r_addend += sec->output_offset; | |
10478 | } | |
10479 | continue; | |
10480 | } | |
10481 | ||
252b5132 RH |
10482 | if (h != NULL) |
10483 | name = h->root.root.string; | |
10484 | else | |
10485 | { | |
10486 | name = (bfd_elf_string_from_elf_section | |
10487 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
10488 | if (name == NULL || *name == '\0') | |
10489 | name = bfd_section_name (input_bfd, sec); | |
10490 | } | |
f21f3fe0 | 10491 | |
cf35638d | 10492 | if (r_symndx != STN_UNDEF |
ba93b8ac DJ |
10493 | && r_type != R_ARM_NONE |
10494 | && (h == NULL | |
10495 | || h->root.type == bfd_link_hash_defined | |
10496 | || h->root.type == bfd_link_hash_defweak) | |
10497 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
10498 | { | |
10499 | (*_bfd_error_handler) | |
10500 | ((sym_type == STT_TLS | |
10501 | ? _("%B(%A+0x%lx): %s used with TLS symbol %s") | |
10502 | : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")), | |
10503 | input_bfd, | |
10504 | input_section, | |
10505 | (long) rel->r_offset, | |
10506 | howto->name, | |
10507 | name); | |
10508 | } | |
10509 | ||
0855e32b NS |
10510 | /* We call elf32_arm_final_link_relocate unless we're completely |
10511 | done, i.e., the relaxation produced the final output we want, | |
10512 | and we won't let anybody mess with it. Also, we have to do | |
10513 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation | |
10514 | both in relaxed and non-relaxed cases */ | |
10515 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) | |
10516 | || (IS_ARM_TLS_GNU_RELOC (r_type) | |
b38cadfb | 10517 | && !((h ? elf32_arm_hash_entry (h)->tls_type : |
0855e32b NS |
10518 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) |
10519 | & GOT_TLS_GDESC))) | |
10520 | { | |
10521 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, | |
10522 | contents, rel, h == NULL); | |
10523 | /* This may have been marked unresolved because it came from | |
10524 | a shared library. But we've just dealt with that. */ | |
10525 | unresolved_reloc = 0; | |
10526 | } | |
10527 | else | |
10528 | r = bfd_reloc_continue; | |
b38cadfb | 10529 | |
0855e32b NS |
10530 | if (r == bfd_reloc_continue) |
10531 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, | |
10532 | input_section, contents, rel, | |
34e77a92 | 10533 | relocation, info, sec, name, sym_type, |
35fc36a8 RS |
10534 | (h ? h->target_internal |
10535 | : ARM_SYM_BRANCH_TYPE (sym)), h, | |
0855e32b | 10536 | &unresolved_reloc, &error_message); |
0945cdfd DJ |
10537 | |
10538 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
10539 | because such sections are not SEC_ALLOC and thus ld.so will | |
10540 | not process them. */ | |
10541 | if (unresolved_reloc | |
10542 | && !((input_section->flags & SEC_DEBUGGING) != 0 | |
1d5316ab AM |
10543 | && h->def_dynamic) |
10544 | && _bfd_elf_section_offset (output_bfd, info, input_section, | |
10545 | rel->r_offset) != (bfd_vma) -1) | |
0945cdfd DJ |
10546 | { |
10547 | (*_bfd_error_handler) | |
843fe662 L |
10548 | (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), |
10549 | input_bfd, | |
10550 | input_section, | |
10551 | (long) rel->r_offset, | |
10552 | howto->name, | |
10553 | h->root.root.string); | |
0945cdfd DJ |
10554 | return FALSE; |
10555 | } | |
252b5132 RH |
10556 | |
10557 | if (r != bfd_reloc_ok) | |
10558 | { | |
252b5132 RH |
10559 | switch (r) |
10560 | { | |
10561 | case bfd_reloc_overflow: | |
cf919dfd PB |
10562 | /* If the overflowing reloc was to an undefined symbol, |
10563 | we have already printed one error message and there | |
10564 | is no point complaining again. */ | |
10565 | if ((! h || | |
10566 | h->root.type != bfd_link_hash_undefined) | |
10567 | && (!((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
10568 | (info, (h ? &h->root : NULL), name, howto->name, |
10569 | (bfd_vma) 0, input_bfd, input_section, | |
10570 | rel->r_offset)))) | |
b34976b6 | 10571 | return FALSE; |
252b5132 RH |
10572 | break; |
10573 | ||
10574 | case bfd_reloc_undefined: | |
10575 | if (!((*info->callbacks->undefined_symbol) | |
10576 | (info, name, input_bfd, input_section, | |
b34976b6 AM |
10577 | rel->r_offset, TRUE))) |
10578 | return FALSE; | |
252b5132 RH |
10579 | break; |
10580 | ||
10581 | case bfd_reloc_outofrange: | |
f2a9dd69 | 10582 | error_message = _("out of range"); |
252b5132 RH |
10583 | goto common_error; |
10584 | ||
10585 | case bfd_reloc_notsupported: | |
f2a9dd69 | 10586 | error_message = _("unsupported relocation"); |
252b5132 RH |
10587 | goto common_error; |
10588 | ||
10589 | case bfd_reloc_dangerous: | |
f2a9dd69 | 10590 | /* error_message should already be set. */ |
252b5132 RH |
10591 | goto common_error; |
10592 | ||
10593 | default: | |
f2a9dd69 | 10594 | error_message = _("unknown error"); |
8029a119 | 10595 | /* Fall through. */ |
252b5132 RH |
10596 | |
10597 | common_error: | |
f2a9dd69 DJ |
10598 | BFD_ASSERT (error_message != NULL); |
10599 | if (!((*info->callbacks->reloc_dangerous) | |
10600 | (info, error_message, input_bfd, input_section, | |
252b5132 | 10601 | rel->r_offset))) |
b34976b6 | 10602 | return FALSE; |
252b5132 RH |
10603 | break; |
10604 | } | |
10605 | } | |
10606 | } | |
10607 | ||
b34976b6 | 10608 | return TRUE; |
252b5132 RH |
10609 | } |
10610 | ||
91d6fa6a | 10611 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 10612 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 10613 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
10614 | maintaining that condition). */ |
10615 | ||
10616 | static void | |
10617 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
10618 | arm_unwind_table_edit **tail, | |
10619 | arm_unwind_edit_type type, | |
10620 | asection *linked_section, | |
91d6fa6a | 10621 | unsigned int tindex) |
2468f9c9 | 10622 | { |
21d799b5 NC |
10623 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
10624 | xmalloc (sizeof (arm_unwind_table_edit)); | |
b38cadfb | 10625 | |
2468f9c9 PB |
10626 | new_edit->type = type; |
10627 | new_edit->linked_section = linked_section; | |
91d6fa6a | 10628 | new_edit->index = tindex; |
b38cadfb | 10629 | |
91d6fa6a | 10630 | if (tindex > 0) |
2468f9c9 PB |
10631 | { |
10632 | new_edit->next = NULL; | |
10633 | ||
10634 | if (*tail) | |
10635 | (*tail)->next = new_edit; | |
10636 | ||
10637 | (*tail) = new_edit; | |
10638 | ||
10639 | if (!*head) | |
10640 | (*head) = new_edit; | |
10641 | } | |
10642 | else | |
10643 | { | |
10644 | new_edit->next = *head; | |
10645 | ||
10646 | if (!*tail) | |
10647 | *tail = new_edit; | |
10648 | ||
10649 | *head = new_edit; | |
10650 | } | |
10651 | } | |
10652 | ||
10653 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
10654 | ||
10655 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
10656 | static void | |
10657 | adjust_exidx_size(asection *exidx_sec, int adjust) | |
10658 | { | |
10659 | asection *out_sec; | |
10660 | ||
10661 | if (!exidx_sec->rawsize) | |
10662 | exidx_sec->rawsize = exidx_sec->size; | |
10663 | ||
10664 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); | |
10665 | out_sec = exidx_sec->output_section; | |
10666 | /* Adjust size of output section. */ | |
10667 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); | |
10668 | } | |
10669 | ||
10670 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
10671 | static void | |
10672 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) | |
10673 | { | |
10674 | struct _arm_elf_section_data *exidx_arm_data; | |
10675 | ||
10676 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
10677 | add_unwind_table_edit ( | |
10678 | &exidx_arm_data->u.exidx.unwind_edit_list, | |
10679 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
10680 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
10681 | ||
10682 | adjust_exidx_size(exidx_sec, 8); | |
10683 | } | |
10684 | ||
10685 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
10686 | made to those tables, such that: | |
b38cadfb | 10687 | |
2468f9c9 PB |
10688 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. |
10689 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
10690 | codes which have been inlined into the index). | |
10691 | ||
85fdf906 AH |
10692 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
10693 | ||
2468f9c9 | 10694 | The edits are applied when the tables are written |
b38cadfb | 10695 | (in elf32_arm_write_section). */ |
2468f9c9 PB |
10696 | |
10697 | bfd_boolean | |
10698 | elf32_arm_fix_exidx_coverage (asection **text_section_order, | |
10699 | unsigned int num_text_sections, | |
85fdf906 AH |
10700 | struct bfd_link_info *info, |
10701 | bfd_boolean merge_exidx_entries) | |
2468f9c9 PB |
10702 | { |
10703 | bfd *inp; | |
10704 | unsigned int last_second_word = 0, i; | |
10705 | asection *last_exidx_sec = NULL; | |
10706 | asection *last_text_sec = NULL; | |
10707 | int last_unwind_type = -1; | |
10708 | ||
10709 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
10710 | text sections. */ | |
10711 | for (inp = info->input_bfds; inp != NULL; inp = inp->link_next) | |
10712 | { | |
10713 | asection *sec; | |
b38cadfb | 10714 | |
2468f9c9 PB |
10715 | for (sec = inp->sections; sec != NULL; sec = sec->next) |
10716 | { | |
10717 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); | |
10718 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
b38cadfb | 10719 | |
dec9d5df | 10720 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 | 10721 | continue; |
b38cadfb | 10722 | |
2468f9c9 PB |
10723 | if (elf_sec->linked_to) |
10724 | { | |
10725 | Elf_Internal_Shdr *linked_hdr | |
10726 | = &elf_section_data (elf_sec->linked_to)->this_hdr; | |
10727 | struct _arm_elf_section_data *linked_sec_arm_data | |
10728 | = get_arm_elf_section_data (linked_hdr->bfd_section); | |
10729 | ||
10730 | if (linked_sec_arm_data == NULL) | |
10731 | continue; | |
10732 | ||
10733 | /* Link this .ARM.exidx section back from the text section it | |
10734 | describes. */ | |
10735 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; | |
10736 | } | |
10737 | } | |
10738 | } | |
10739 | ||
10740 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
10741 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 10742 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
10743 | |
10744 | for (i = 0; i < num_text_sections; i++) | |
10745 | { | |
10746 | asection *sec = text_section_order[i]; | |
10747 | asection *exidx_sec; | |
10748 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
10749 | struct _arm_elf_section_data *exidx_arm_data; | |
10750 | bfd_byte *contents = NULL; | |
10751 | int deleted_exidx_bytes = 0; | |
10752 | bfd_vma j; | |
10753 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
10754 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
10755 | Elf_Internal_Shdr *hdr; | |
10756 | bfd *ibfd; | |
10757 | ||
10758 | if (arm_data == NULL) | |
10759 | continue; | |
10760 | ||
10761 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
10762 | if (exidx_sec == NULL) | |
10763 | { | |
10764 | /* Section has no unwind data. */ | |
10765 | if (last_unwind_type == 0 || !last_exidx_sec) | |
10766 | continue; | |
10767 | ||
10768 | /* Ignore zero sized sections. */ | |
10769 | if (sec->size == 0) | |
10770 | continue; | |
10771 | ||
10772 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
10773 | last_unwind_type = 0; | |
10774 | continue; | |
10775 | } | |
10776 | ||
22a8f80e PB |
10777 | /* Skip /DISCARD/ sections. */ |
10778 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
10779 | continue; | |
10780 | ||
2468f9c9 PB |
10781 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
10782 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
10783 | continue; | |
b38cadfb | 10784 | |
2468f9c9 PB |
10785 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
10786 | if (exidx_arm_data == NULL) | |
10787 | continue; | |
b38cadfb | 10788 | |
2468f9c9 | 10789 | ibfd = exidx_sec->owner; |
b38cadfb | 10790 | |
2468f9c9 PB |
10791 | if (hdr->contents != NULL) |
10792 | contents = hdr->contents; | |
10793 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
10794 | /* An error? */ | |
10795 | continue; | |
10796 | ||
10797 | for (j = 0; j < hdr->sh_size; j += 8) | |
10798 | { | |
10799 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
10800 | int unwind_type; | |
10801 | int elide = 0; | |
10802 | ||
10803 | /* An EXIDX_CANTUNWIND entry. */ | |
10804 | if (second_word == 1) | |
10805 | { | |
10806 | if (last_unwind_type == 0) | |
10807 | elide = 1; | |
10808 | unwind_type = 0; | |
10809 | } | |
10810 | /* Inlined unwinding data. Merge if equal to previous. */ | |
10811 | else if ((second_word & 0x80000000) != 0) | |
10812 | { | |
85fdf906 AH |
10813 | if (merge_exidx_entries |
10814 | && last_second_word == second_word && last_unwind_type == 1) | |
2468f9c9 PB |
10815 | elide = 1; |
10816 | unwind_type = 1; | |
10817 | last_second_word = second_word; | |
10818 | } | |
10819 | /* Normal table entry. In theory we could merge these too, | |
10820 | but duplicate entries are likely to be much less common. */ | |
10821 | else | |
10822 | unwind_type = 2; | |
10823 | ||
10824 | if (elide) | |
10825 | { | |
10826 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
10827 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
10828 | ||
10829 | deleted_exidx_bytes += 8; | |
10830 | } | |
10831 | ||
10832 | last_unwind_type = unwind_type; | |
10833 | } | |
10834 | ||
10835 | /* Free contents if we allocated it ourselves. */ | |
10836 | if (contents != hdr->contents) | |
10837 | free (contents); | |
10838 | ||
10839 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
10840 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
10841 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
b38cadfb | 10842 | |
2468f9c9 PB |
10843 | if (deleted_exidx_bytes > 0) |
10844 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); | |
10845 | ||
10846 | last_exidx_sec = exidx_sec; | |
10847 | last_text_sec = sec; | |
10848 | } | |
10849 | ||
10850 | /* Add terminating CANTUNWIND entry. */ | |
10851 | if (last_exidx_sec && last_unwind_type != 0) | |
10852 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
10853 | ||
10854 | return TRUE; | |
10855 | } | |
10856 | ||
3e6b1042 DJ |
10857 | static bfd_boolean |
10858 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, | |
10859 | bfd *ibfd, const char *name) | |
10860 | { | |
10861 | asection *sec, *osec; | |
10862 | ||
3d4d4302 | 10863 | sec = bfd_get_linker_section (ibfd, name); |
3e6b1042 DJ |
10864 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) |
10865 | return TRUE; | |
10866 | ||
10867 | osec = sec->output_section; | |
10868 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
10869 | return TRUE; | |
10870 | ||
10871 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
10872 | sec->output_offset, sec->size)) | |
10873 | return FALSE; | |
10874 | ||
10875 | return TRUE; | |
10876 | } | |
10877 | ||
10878 | static bfd_boolean | |
10879 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) | |
10880 | { | |
10881 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
fe33d2fa | 10882 | asection *sec, *osec; |
3e6b1042 | 10883 | |
4dfe6ac6 NC |
10884 | if (globals == NULL) |
10885 | return FALSE; | |
10886 | ||
3e6b1042 DJ |
10887 | /* Invoke the regular ELF backend linker to do all the work. */ |
10888 | if (!bfd_elf_final_link (abfd, info)) | |
10889 | return FALSE; | |
10890 | ||
fe33d2fa CL |
10891 | /* Process stub sections (eg BE8 encoding, ...). */ |
10892 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
10893 | int i; | |
cdb21a0a NS |
10894 | for (i=0; i<htab->top_id; i++) |
10895 | { | |
10896 | sec = htab->stub_group[i].stub_sec; | |
10897 | /* Only process it once, in its link_sec slot. */ | |
10898 | if (sec && i == htab->stub_group[i].link_sec->id) | |
10899 | { | |
10900 | osec = sec->output_section; | |
10901 | elf32_arm_write_section (abfd, info, sec, sec->contents); | |
10902 | if (! bfd_set_section_contents (abfd, osec, sec->contents, | |
10903 | sec->output_offset, sec->size)) | |
10904 | return FALSE; | |
10905 | } | |
fe33d2fa | 10906 | } |
fe33d2fa | 10907 | |
3e6b1042 DJ |
10908 | /* Write out any glue sections now that we have created all the |
10909 | stubs. */ | |
10910 | if (globals->bfd_of_glue_owner != NULL) | |
10911 | { | |
10912 | if (! elf32_arm_output_glue_section (info, abfd, | |
10913 | globals->bfd_of_glue_owner, | |
10914 | ARM2THUMB_GLUE_SECTION_NAME)) | |
10915 | return FALSE; | |
10916 | ||
10917 | if (! elf32_arm_output_glue_section (info, abfd, | |
10918 | globals->bfd_of_glue_owner, | |
10919 | THUMB2ARM_GLUE_SECTION_NAME)) | |
10920 | return FALSE; | |
10921 | ||
10922 | if (! elf32_arm_output_glue_section (info, abfd, | |
10923 | globals->bfd_of_glue_owner, | |
10924 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
10925 | return FALSE; | |
10926 | ||
10927 | if (! elf32_arm_output_glue_section (info, abfd, | |
10928 | globals->bfd_of_glue_owner, | |
10929 | ARM_BX_GLUE_SECTION_NAME)) | |
10930 | return FALSE; | |
10931 | } | |
10932 | ||
10933 | return TRUE; | |
10934 | } | |
10935 | ||
5968a7b8 NC |
10936 | /* Return a best guess for the machine number based on the attributes. */ |
10937 | ||
10938 | static unsigned int | |
10939 | bfd_arm_get_mach_from_attributes (bfd * abfd) | |
10940 | { | |
10941 | int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
10942 | ||
10943 | switch (arch) | |
10944 | { | |
10945 | case TAG_CPU_ARCH_V4: return bfd_mach_arm_4; | |
10946 | case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T; | |
10947 | case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T; | |
10948 | ||
10949 | case TAG_CPU_ARCH_V5TE: | |
10950 | { | |
10951 | char * name; | |
10952 | ||
10953 | BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES); | |
10954 | name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s; | |
10955 | ||
10956 | if (name) | |
10957 | { | |
10958 | if (strcmp (name, "IWMMXT2") == 0) | |
10959 | return bfd_mach_arm_iWMMXt2; | |
10960 | ||
10961 | if (strcmp (name, "IWMMXT") == 0) | |
6034aab8 | 10962 | return bfd_mach_arm_iWMMXt; |
088ca6c1 NC |
10963 | |
10964 | if (strcmp (name, "XSCALE") == 0) | |
10965 | { | |
10966 | int wmmx; | |
10967 | ||
10968 | BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES); | |
10969 | wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i; | |
10970 | switch (wmmx) | |
10971 | { | |
10972 | case 1: return bfd_mach_arm_iWMMXt; | |
10973 | case 2: return bfd_mach_arm_iWMMXt2; | |
10974 | default: return bfd_mach_arm_XScale; | |
10975 | } | |
10976 | } | |
5968a7b8 NC |
10977 | } |
10978 | ||
10979 | return bfd_mach_arm_5TE; | |
10980 | } | |
10981 | ||
10982 | default: | |
10983 | return bfd_mach_arm_unknown; | |
10984 | } | |
10985 | } | |
10986 | ||
c178919b NC |
10987 | /* Set the right machine number. */ |
10988 | ||
10989 | static bfd_boolean | |
57e8b36a | 10990 | elf32_arm_object_p (bfd *abfd) |
c178919b | 10991 | { |
5a6c6817 | 10992 | unsigned int mach; |
57e8b36a | 10993 | |
5a6c6817 | 10994 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 10995 | |
5968a7b8 NC |
10996 | if (mach == bfd_mach_arm_unknown) |
10997 | { | |
10998 | if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
10999 | mach = bfd_mach_arm_ep9312; | |
11000 | else | |
11001 | mach = bfd_arm_get_mach_from_attributes (abfd); | |
11002 | } | |
c178919b | 11003 | |
5968a7b8 | 11004 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
c178919b NC |
11005 | return TRUE; |
11006 | } | |
11007 | ||
fc830a83 | 11008 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 11009 | |
b34976b6 | 11010 | static bfd_boolean |
57e8b36a | 11011 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
11012 | { |
11013 | if (elf_flags_init (abfd) | |
11014 | && elf_elfheader (abfd)->e_flags != flags) | |
11015 | { | |
fc830a83 NC |
11016 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
11017 | { | |
fd2ec330 | 11018 | if (flags & EF_ARM_INTERWORK) |
d003868e AM |
11019 | (*_bfd_error_handler) |
11020 | (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), | |
11021 | abfd); | |
fc830a83 | 11022 | else |
d003868e AM |
11023 | _bfd_error_handler |
11024 | (_("Warning: Clearing the interworking flag of %B due to outside request"), | |
11025 | abfd); | |
fc830a83 | 11026 | } |
252b5132 RH |
11027 | } |
11028 | else | |
11029 | { | |
11030 | elf_elfheader (abfd)->e_flags = flags; | |
b34976b6 | 11031 | elf_flags_init (abfd) = TRUE; |
252b5132 RH |
11032 | } |
11033 | ||
b34976b6 | 11034 | return TRUE; |
252b5132 RH |
11035 | } |
11036 | ||
fc830a83 | 11037 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 11038 | |
b34976b6 | 11039 | static bfd_boolean |
57e8b36a | 11040 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
11041 | { |
11042 | flagword in_flags; | |
11043 | flagword out_flags; | |
11044 | ||
0ffa91dd | 11045 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
b34976b6 | 11046 | return TRUE; |
252b5132 | 11047 | |
fc830a83 | 11048 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
11049 | out_flags = elf_elfheader (obfd)->e_flags; |
11050 | ||
fc830a83 NC |
11051 | if (elf_flags_init (obfd) |
11052 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
11053 | && in_flags != out_flags) | |
252b5132 | 11054 | { |
252b5132 | 11055 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 11056 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
b34976b6 | 11057 | return FALSE; |
252b5132 RH |
11058 | |
11059 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 11060 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
b34976b6 | 11061 | return FALSE; |
252b5132 RH |
11062 | |
11063 | /* If the src and dest have different interworking flags | |
11064 | then turn off the interworking bit. */ | |
fd2ec330 | 11065 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 11066 | { |
fd2ec330 | 11067 | if (out_flags & EF_ARM_INTERWORK) |
d003868e AM |
11068 | _bfd_error_handler |
11069 | (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), | |
11070 | obfd, ibfd); | |
252b5132 | 11071 | |
fd2ec330 | 11072 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 11073 | } |
1006ba19 PB |
11074 | |
11075 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
11076 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
11077 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
11078 | } |
11079 | ||
11080 | elf_elfheader (obfd)->e_flags = in_flags; | |
b34976b6 | 11081 | elf_flags_init (obfd) = TRUE; |
252b5132 | 11082 | |
94a3258f PB |
11083 | /* Also copy the EI_OSABI field. */ |
11084 | elf_elfheader (obfd)->e_ident[EI_OSABI] = | |
11085 | elf_elfheader (ibfd)->e_ident[EI_OSABI]; | |
11086 | ||
104d59d1 JM |
11087 | /* Copy object attributes. */ |
11088 | _bfd_elf_copy_obj_attributes (ibfd, obfd); | |
ee065d83 PB |
11089 | |
11090 | return TRUE; | |
11091 | } | |
11092 | ||
11093 | /* Values for Tag_ABI_PCS_R9_use. */ | |
11094 | enum | |
11095 | { | |
11096 | AEABI_R9_V6, | |
11097 | AEABI_R9_SB, | |
11098 | AEABI_R9_TLS, | |
11099 | AEABI_R9_unused | |
11100 | }; | |
11101 | ||
11102 | /* Values for Tag_ABI_PCS_RW_data. */ | |
11103 | enum | |
11104 | { | |
11105 | AEABI_PCS_RW_data_absolute, | |
11106 | AEABI_PCS_RW_data_PCrel, | |
11107 | AEABI_PCS_RW_data_SBrel, | |
11108 | AEABI_PCS_RW_data_unused | |
11109 | }; | |
11110 | ||
11111 | /* Values for Tag_ABI_enum_size. */ | |
11112 | enum | |
11113 | { | |
11114 | AEABI_enum_unused, | |
11115 | AEABI_enum_short, | |
11116 | AEABI_enum_wide, | |
11117 | AEABI_enum_forced_wide | |
11118 | }; | |
11119 | ||
104d59d1 JM |
11120 | /* Determine whether an object attribute tag takes an integer, a |
11121 | string or both. */ | |
906e58ca | 11122 | |
104d59d1 JM |
11123 | static int |
11124 | elf32_arm_obj_attrs_arg_type (int tag) | |
11125 | { | |
11126 | if (tag == Tag_compatibility) | |
3483fe2e | 11127 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 11128 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
11129 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
11130 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
11131 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 11132 | else if (tag < 32) |
3483fe2e | 11133 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 11134 | else |
3483fe2e | 11135 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
11136 | } |
11137 | ||
5aa6ff7c AS |
11138 | /* The ABI defines that Tag_conformance should be emitted first, and that |
11139 | Tag_nodefaults should be second (if either is defined). This sets those | |
11140 | two positions, and bumps up the position of all the remaining tags to | |
11141 | compensate. */ | |
11142 | static int | |
11143 | elf32_arm_obj_attrs_order (int num) | |
11144 | { | |
3de4a297 | 11145 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
5aa6ff7c | 11146 | return Tag_conformance; |
3de4a297 | 11147 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
5aa6ff7c AS |
11148 | return Tag_nodefaults; |
11149 | if ((num - 2) < Tag_nodefaults) | |
11150 | return num - 2; | |
11151 | if ((num - 1) < Tag_conformance) | |
11152 | return num - 1; | |
11153 | return num; | |
11154 | } | |
11155 | ||
e8b36cd1 JM |
11156 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
11157 | static bfd_boolean | |
11158 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) | |
11159 | { | |
11160 | if ((tag & 127) < 64) | |
11161 | { | |
11162 | _bfd_error_handler | |
11163 | (_("%B: Unknown mandatory EABI object attribute %d"), | |
11164 | abfd, tag); | |
11165 | bfd_set_error (bfd_error_bad_value); | |
11166 | return FALSE; | |
11167 | } | |
11168 | else | |
11169 | { | |
11170 | _bfd_error_handler | |
11171 | (_("Warning: %B: Unknown EABI object attribute %d"), | |
11172 | abfd, tag); | |
11173 | return TRUE; | |
11174 | } | |
11175 | } | |
11176 | ||
91e22acd AS |
11177 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
11178 | Returns -1 if no architecture could be read. */ | |
11179 | ||
11180 | static int | |
11181 | get_secondary_compatible_arch (bfd *abfd) | |
11182 | { | |
11183 | obj_attribute *attr = | |
11184 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
11185 | ||
11186 | /* Note: the tag and its argument below are uleb128 values, though | |
11187 | currently-defined values fit in one byte for each. */ | |
11188 | if (attr->s | |
11189 | && attr->s[0] == Tag_CPU_arch | |
11190 | && (attr->s[1] & 128) != 128 | |
11191 | && attr->s[2] == 0) | |
11192 | return attr->s[1]; | |
11193 | ||
11194 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
11195 | return -1; | |
11196 | } | |
11197 | ||
11198 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
11199 | The tag is removed if ARCH is -1. */ | |
11200 | ||
8e79c3df | 11201 | static void |
91e22acd | 11202 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 11203 | { |
91e22acd AS |
11204 | obj_attribute *attr = |
11205 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 11206 | |
91e22acd AS |
11207 | if (arch == -1) |
11208 | { | |
11209 | attr->s = NULL; | |
11210 | return; | |
8e79c3df | 11211 | } |
91e22acd AS |
11212 | |
11213 | /* Note: the tag and its argument below are uleb128 values, though | |
11214 | currently-defined values fit in one byte for each. */ | |
11215 | if (!attr->s) | |
21d799b5 | 11216 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
11217 | attr->s[0] = Tag_CPU_arch; |
11218 | attr->s[1] = arch; | |
11219 | attr->s[2] = '\0'; | |
8e79c3df CM |
11220 | } |
11221 | ||
91e22acd AS |
11222 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
11223 | into account. */ | |
11224 | ||
11225 | static int | |
11226 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
11227 | int newtag, int secondary_compat) | |
8e79c3df | 11228 | { |
91e22acd AS |
11229 | #define T(X) TAG_CPU_ARCH_##X |
11230 | int tagl, tagh, result; | |
11231 | const int v6t2[] = | |
11232 | { | |
11233 | T(V6T2), /* PRE_V4. */ | |
11234 | T(V6T2), /* V4. */ | |
11235 | T(V6T2), /* V4T. */ | |
11236 | T(V6T2), /* V5T. */ | |
11237 | T(V6T2), /* V5TE. */ | |
11238 | T(V6T2), /* V5TEJ. */ | |
11239 | T(V6T2), /* V6. */ | |
11240 | T(V7), /* V6KZ. */ | |
11241 | T(V6T2) /* V6T2. */ | |
11242 | }; | |
11243 | const int v6k[] = | |
11244 | { | |
11245 | T(V6K), /* PRE_V4. */ | |
11246 | T(V6K), /* V4. */ | |
11247 | T(V6K), /* V4T. */ | |
11248 | T(V6K), /* V5T. */ | |
11249 | T(V6K), /* V5TE. */ | |
11250 | T(V6K), /* V5TEJ. */ | |
11251 | T(V6K), /* V6. */ | |
11252 | T(V6KZ), /* V6KZ. */ | |
11253 | T(V7), /* V6T2. */ | |
11254 | T(V6K) /* V6K. */ | |
11255 | }; | |
11256 | const int v7[] = | |
11257 | { | |
11258 | T(V7), /* PRE_V4. */ | |
11259 | T(V7), /* V4. */ | |
11260 | T(V7), /* V4T. */ | |
11261 | T(V7), /* V5T. */ | |
11262 | T(V7), /* V5TE. */ | |
11263 | T(V7), /* V5TEJ. */ | |
11264 | T(V7), /* V6. */ | |
11265 | T(V7), /* V6KZ. */ | |
11266 | T(V7), /* V6T2. */ | |
11267 | T(V7), /* V6K. */ | |
11268 | T(V7) /* V7. */ | |
11269 | }; | |
11270 | const int v6_m[] = | |
11271 | { | |
11272 | -1, /* PRE_V4. */ | |
11273 | -1, /* V4. */ | |
11274 | T(V6K), /* V4T. */ | |
11275 | T(V6K), /* V5T. */ | |
11276 | T(V6K), /* V5TE. */ | |
11277 | T(V6K), /* V5TEJ. */ | |
11278 | T(V6K), /* V6. */ | |
11279 | T(V6KZ), /* V6KZ. */ | |
11280 | T(V7), /* V6T2. */ | |
11281 | T(V6K), /* V6K. */ | |
11282 | T(V7), /* V7. */ | |
11283 | T(V6_M) /* V6_M. */ | |
11284 | }; | |
11285 | const int v6s_m[] = | |
11286 | { | |
11287 | -1, /* PRE_V4. */ | |
11288 | -1, /* V4. */ | |
11289 | T(V6K), /* V4T. */ | |
11290 | T(V6K), /* V5T. */ | |
11291 | T(V6K), /* V5TE. */ | |
11292 | T(V6K), /* V5TEJ. */ | |
11293 | T(V6K), /* V6. */ | |
11294 | T(V6KZ), /* V6KZ. */ | |
11295 | T(V7), /* V6T2. */ | |
11296 | T(V6K), /* V6K. */ | |
11297 | T(V7), /* V7. */ | |
11298 | T(V6S_M), /* V6_M. */ | |
11299 | T(V6S_M) /* V6S_M. */ | |
11300 | }; | |
9e3c6df6 PB |
11301 | const int v7e_m[] = |
11302 | { | |
11303 | -1, /* PRE_V4. */ | |
11304 | -1, /* V4. */ | |
11305 | T(V7E_M), /* V4T. */ | |
11306 | T(V7E_M), /* V5T. */ | |
11307 | T(V7E_M), /* V5TE. */ | |
11308 | T(V7E_M), /* V5TEJ. */ | |
11309 | T(V7E_M), /* V6. */ | |
11310 | T(V7E_M), /* V6KZ. */ | |
11311 | T(V7E_M), /* V6T2. */ | |
11312 | T(V7E_M), /* V6K. */ | |
11313 | T(V7E_M), /* V7. */ | |
11314 | T(V7E_M), /* V6_M. */ | |
11315 | T(V7E_M), /* V6S_M. */ | |
11316 | T(V7E_M) /* V7E_M. */ | |
11317 | }; | |
bca38921 MGD |
11318 | const int v8[] = |
11319 | { | |
11320 | T(V8), /* PRE_V4. */ | |
11321 | T(V8), /* V4. */ | |
11322 | T(V8), /* V4T. */ | |
11323 | T(V8), /* V5T. */ | |
11324 | T(V8), /* V5TE. */ | |
11325 | T(V8), /* V5TEJ. */ | |
11326 | T(V8), /* V6. */ | |
11327 | T(V8), /* V6KZ. */ | |
11328 | T(V8), /* V6T2. */ | |
11329 | T(V8), /* V6K. */ | |
11330 | T(V8), /* V7. */ | |
11331 | T(V8), /* V6_M. */ | |
11332 | T(V8), /* V6S_M. */ | |
11333 | T(V8), /* V7E_M. */ | |
11334 | T(V8) /* V8. */ | |
11335 | }; | |
91e22acd AS |
11336 | const int v4t_plus_v6_m[] = |
11337 | { | |
11338 | -1, /* PRE_V4. */ | |
11339 | -1, /* V4. */ | |
11340 | T(V4T), /* V4T. */ | |
11341 | T(V5T), /* V5T. */ | |
11342 | T(V5TE), /* V5TE. */ | |
11343 | T(V5TEJ), /* V5TEJ. */ | |
11344 | T(V6), /* V6. */ | |
11345 | T(V6KZ), /* V6KZ. */ | |
11346 | T(V6T2), /* V6T2. */ | |
11347 | T(V6K), /* V6K. */ | |
11348 | T(V7), /* V7. */ | |
11349 | T(V6_M), /* V6_M. */ | |
11350 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 11351 | T(V7E_M), /* V7E_M. */ |
bca38921 | 11352 | T(V8), /* V8. */ |
91e22acd AS |
11353 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
11354 | }; | |
11355 | const int *comb[] = | |
11356 | { | |
11357 | v6t2, | |
11358 | v6k, | |
11359 | v7, | |
11360 | v6_m, | |
11361 | v6s_m, | |
9e3c6df6 | 11362 | v7e_m, |
bca38921 | 11363 | v8, |
91e22acd AS |
11364 | /* Pseudo-architecture. */ |
11365 | v4t_plus_v6_m | |
11366 | }; | |
11367 | ||
11368 | /* Check we've not got a higher architecture than we know about. */ | |
11369 | ||
9e3c6df6 | 11370 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 11371 | { |
3895f852 | 11372 | _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd); |
91e22acd AS |
11373 | return -1; |
11374 | } | |
11375 | ||
11376 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
11377 | ||
11378 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
11379 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
11380 | oldtag = T(V4T_PLUS_V6_M); | |
11381 | ||
11382 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
11383 | input. */ | |
11384 | ||
11385 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
11386 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
11387 | newtag = T(V4T_PLUS_V6_M); | |
11388 | ||
11389 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
11390 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
11391 | ||
11392 | /* Architectures before V6KZ add features monotonically. */ | |
11393 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
11394 | return result; | |
11395 | ||
11396 | result = comb[tagh - T(V6T2)][tagl]; | |
11397 | ||
11398 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
11399 | as the canonical version. */ | |
11400 | if (result == T(V4T_PLUS_V6_M)) | |
11401 | { | |
11402 | result = T(V4T); | |
11403 | *secondary_compat_out = T(V6_M); | |
11404 | } | |
11405 | else | |
11406 | *secondary_compat_out = -1; | |
11407 | ||
11408 | if (result == -1) | |
11409 | { | |
3895f852 | 11410 | _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"), |
91e22acd AS |
11411 | ibfd, oldtag, newtag); |
11412 | return -1; | |
11413 | } | |
11414 | ||
11415 | return result; | |
11416 | #undef T | |
8e79c3df CM |
11417 | } |
11418 | ||
ac56ee8f MGD |
11419 | /* Query attributes object to see if integer divide instructions may be |
11420 | present in an object. */ | |
11421 | static bfd_boolean | |
11422 | elf32_arm_attributes_accept_div (const obj_attribute *attr) | |
11423 | { | |
11424 | int arch = attr[Tag_CPU_arch].i; | |
11425 | int profile = attr[Tag_CPU_arch_profile].i; | |
11426 | ||
11427 | switch (attr[Tag_DIV_use].i) | |
11428 | { | |
11429 | case 0: | |
11430 | /* Integer divide allowed if instruction contained in archetecture. */ | |
11431 | if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) | |
11432 | return TRUE; | |
11433 | else if (arch >= TAG_CPU_ARCH_V7E_M) | |
11434 | return TRUE; | |
11435 | else | |
11436 | return FALSE; | |
11437 | ||
11438 | case 1: | |
11439 | /* Integer divide explicitly prohibited. */ | |
11440 | return FALSE; | |
11441 | ||
11442 | default: | |
11443 | /* Unrecognised case - treat as allowing divide everywhere. */ | |
11444 | case 2: | |
11445 | /* Integer divide allowed in ARM state. */ | |
11446 | return TRUE; | |
11447 | } | |
11448 | } | |
11449 | ||
11450 | /* Query attributes object to see if integer divide instructions are | |
11451 | forbidden to be in the object. This is not the inverse of | |
11452 | elf32_arm_attributes_accept_div. */ | |
11453 | static bfd_boolean | |
11454 | elf32_arm_attributes_forbid_div (const obj_attribute *attr) | |
11455 | { | |
11456 | return attr[Tag_DIV_use].i == 1; | |
11457 | } | |
11458 | ||
ee065d83 PB |
11459 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
11460 | are conflicting attributes. */ | |
906e58ca | 11461 | |
ee065d83 PB |
11462 | static bfd_boolean |
11463 | elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) | |
11464 | { | |
104d59d1 JM |
11465 | obj_attribute *in_attr; |
11466 | obj_attribute *out_attr; | |
ee065d83 PB |
11467 | /* Some tags have 0 = don't care, 1 = strong requirement, |
11468 | 2 = weak requirement. */ | |
91e22acd | 11469 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 11470 | int i; |
91e22acd | 11471 | bfd_boolean result = TRUE; |
ee065d83 | 11472 | |
3e6b1042 DJ |
11473 | /* Skip the linker stubs file. This preserves previous behavior |
11474 | of accepting unknown attributes in the first input file - but | |
11475 | is that a bug? */ | |
11476 | if (ibfd->flags & BFD_LINKER_CREATED) | |
11477 | return TRUE; | |
11478 | ||
104d59d1 | 11479 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
11480 | { |
11481 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 11482 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 | 11483 | |
cd21e546 MGD |
11484 | out_attr = elf_known_obj_attributes_proc (obfd); |
11485 | ||
004ae526 PB |
11486 | /* Use the Tag_null value to indicate the attributes have been |
11487 | initialized. */ | |
cd21e546 | 11488 | out_attr[0].i = 1; |
004ae526 | 11489 | |
cd21e546 MGD |
11490 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
11491 | the attribute's value to Tag_MPextension_use. */ | |
11492 | if (out_attr[Tag_MPextension_use_legacy].i != 0) | |
11493 | { | |
11494 | if (out_attr[Tag_MPextension_use].i != 0 | |
11495 | && out_attr[Tag_MPextension_use_legacy].i | |
11496 | != out_attr[Tag_MPextension_use].i) | |
11497 | { | |
11498 | _bfd_error_handler | |
11499 | (_("Error: %B has both the current and legacy " | |
11500 | "Tag_MPextension_use attributes"), ibfd); | |
11501 | result = FALSE; | |
11502 | } | |
11503 | ||
11504 | out_attr[Tag_MPextension_use] = | |
11505 | out_attr[Tag_MPextension_use_legacy]; | |
11506 | out_attr[Tag_MPextension_use_legacy].type = 0; | |
11507 | out_attr[Tag_MPextension_use_legacy].i = 0; | |
11508 | } | |
11509 | ||
11510 | return result; | |
ee065d83 PB |
11511 | } |
11512 | ||
104d59d1 JM |
11513 | in_attr = elf_known_obj_attributes_proc (ibfd); |
11514 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
11515 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
11516 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
11517 | { | |
8e79c3df | 11518 | /* Ignore mismatches if the object doesn't use floating point. */ |
ee065d83 PB |
11519 | if (out_attr[Tag_ABI_FP_number_model].i == 0) |
11520 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; | |
11521 | else if (in_attr[Tag_ABI_FP_number_model].i != 0) | |
11522 | { | |
11523 | _bfd_error_handler | |
3895f852 | 11524 | (_("error: %B uses VFP register arguments, %B does not"), |
deddc40b NS |
11525 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
11526 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
91e22acd | 11527 | result = FALSE; |
ee065d83 PB |
11528 | } |
11529 | } | |
11530 | ||
3de4a297 | 11531 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
11532 | { |
11533 | /* Merge this attribute with existing attributes. */ | |
11534 | switch (i) | |
11535 | { | |
11536 | case Tag_CPU_raw_name: | |
11537 | case Tag_CPU_name: | |
91e22acd | 11538 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
11539 | break; |
11540 | ||
11541 | case Tag_ABI_optimization_goals: | |
11542 | case Tag_ABI_FP_optimization_goals: | |
11543 | /* Use the first value seen. */ | |
11544 | break; | |
11545 | ||
11546 | case Tag_CPU_arch: | |
91e22acd AS |
11547 | { |
11548 | int secondary_compat = -1, secondary_compat_out = -1; | |
11549 | unsigned int saved_out_attr = out_attr[i].i; | |
11550 | static const char *name_table[] = { | |
11551 | /* These aren't real CPU names, but we can't guess | |
11552 | that from the architecture version alone. */ | |
11553 | "Pre v4", | |
11554 | "ARM v4", | |
11555 | "ARM v4T", | |
11556 | "ARM v5T", | |
11557 | "ARM v5TE", | |
11558 | "ARM v5TEJ", | |
11559 | "ARM v6", | |
11560 | "ARM v6KZ", | |
11561 | "ARM v6T2", | |
11562 | "ARM v6K", | |
11563 | "ARM v7", | |
11564 | "ARM v6-M", | |
bca38921 MGD |
11565 | "ARM v6S-M", |
11566 | "ARM v8" | |
91e22acd AS |
11567 | }; |
11568 | ||
11569 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
11570 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
11571 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
11572 | out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i, | |
11573 | &secondary_compat_out, | |
11574 | in_attr[i].i, | |
11575 | secondary_compat); | |
11576 | set_secondary_compatible_arch (obfd, secondary_compat_out); | |
11577 | ||
11578 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
11579 | if (out_attr[i].i == saved_out_attr) | |
11580 | ; /* Leave the names alone. */ | |
11581 | else if (out_attr[i].i == in_attr[i].i) | |
11582 | { | |
11583 | /* The output architecture has been changed to match the | |
11584 | input architecture. Use the input names. */ | |
11585 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
11586 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
11587 | : NULL; | |
11588 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
11589 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
11590 | : NULL; | |
11591 | } | |
11592 | else | |
11593 | { | |
11594 | out_attr[Tag_CPU_name].s = NULL; | |
11595 | out_attr[Tag_CPU_raw_name].s = NULL; | |
11596 | } | |
11597 | ||
11598 | /* If we still don't have a value for Tag_CPU_name, | |
11599 | make one up now. Tag_CPU_raw_name remains blank. */ | |
11600 | if (out_attr[Tag_CPU_name].s == NULL | |
11601 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
11602 | out_attr[Tag_CPU_name].s = | |
11603 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
11604 | } | |
11605 | break; | |
11606 | ||
ee065d83 PB |
11607 | case Tag_ARM_ISA_use: |
11608 | case Tag_THUMB_ISA_use: | |
ee065d83 | 11609 | case Tag_WMMX_arch: |
91e22acd AS |
11610 | case Tag_Advanced_SIMD_arch: |
11611 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 11612 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
11613 | case Tag_ABI_FP_exceptions: |
11614 | case Tag_ABI_FP_user_exceptions: | |
11615 | case Tag_ABI_FP_number_model: | |
75375b3e | 11616 | case Tag_FP_HP_extension: |
91e22acd AS |
11617 | case Tag_CPU_unaligned_access: |
11618 | case Tag_T2EE_use: | |
91e22acd | 11619 | case Tag_MPextension_use: |
ee065d83 PB |
11620 | /* Use the largest value specified. */ |
11621 | if (in_attr[i].i > out_attr[i].i) | |
11622 | out_attr[i].i = in_attr[i].i; | |
11623 | break; | |
11624 | ||
75375b3e | 11625 | case Tag_ABI_align_preserved: |
91e22acd AS |
11626 | case Tag_ABI_PCS_RO_data: |
11627 | /* Use the smallest value specified. */ | |
11628 | if (in_attr[i].i < out_attr[i].i) | |
11629 | out_attr[i].i = in_attr[i].i; | |
11630 | break; | |
11631 | ||
75375b3e | 11632 | case Tag_ABI_align_needed: |
91e22acd | 11633 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
75375b3e MGD |
11634 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
11635 | || out_attr[Tag_ABI_align_preserved].i == 0)) | |
ee065d83 | 11636 | { |
91e22acd AS |
11637 | /* This error message should be enabled once all non-conformant |
11638 | binaries in the toolchain have had the attributes set | |
11639 | properly. | |
ee065d83 | 11640 | _bfd_error_handler |
3895f852 | 11641 | (_("error: %B: 8-byte data alignment conflicts with %B"), |
91e22acd AS |
11642 | obfd, ibfd); |
11643 | result = FALSE; */ | |
ee065d83 | 11644 | } |
91e22acd AS |
11645 | /* Fall through. */ |
11646 | case Tag_ABI_FP_denormal: | |
11647 | case Tag_ABI_PCS_GOT_use: | |
11648 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
11649 | value if greater than 2 (for future-proofing). */ | |
11650 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
11651 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
11652 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
11653 | out_attr[i].i = in_attr[i].i; |
11654 | break; | |
91e22acd | 11655 | |
75375b3e MGD |
11656 | case Tag_Virtualization_use: |
11657 | /* The virtualization tag effectively stores two bits of | |
11658 | information: the intended use of TrustZone (in bit 0), and the | |
11659 | intended use of Virtualization (in bit 1). */ | |
11660 | if (out_attr[i].i == 0) | |
11661 | out_attr[i].i = in_attr[i].i; | |
11662 | else if (in_attr[i].i != 0 | |
11663 | && in_attr[i].i != out_attr[i].i) | |
11664 | { | |
11665 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) | |
11666 | out_attr[i].i = 3; | |
11667 | else | |
11668 | { | |
11669 | _bfd_error_handler | |
11670 | (_("error: %B: unable to merge virtualization attributes " | |
11671 | "with %B"), | |
11672 | obfd, ibfd); | |
11673 | result = FALSE; | |
11674 | } | |
11675 | } | |
11676 | break; | |
91e22acd AS |
11677 | |
11678 | case Tag_CPU_arch_profile: | |
11679 | if (out_attr[i].i != in_attr[i].i) | |
11680 | { | |
11681 | /* 0 will merge with anything. | |
11682 | 'A' and 'S' merge to 'A'. | |
11683 | 'R' and 'S' merge to 'R'. | |
11684 | 'M' and 'A|R|S' is an error. */ | |
11685 | if (out_attr[i].i == 0 | |
11686 | || (out_attr[i].i == 'S' | |
11687 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
11688 | out_attr[i].i = in_attr[i].i; | |
11689 | else if (in_attr[i].i == 0 | |
11690 | || (in_attr[i].i == 'S' | |
11691 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
11692 | ; /* Do nothing. */ | |
11693 | else | |
11694 | { | |
11695 | _bfd_error_handler | |
3895f852 | 11696 | (_("error: %B: Conflicting architecture profiles %c/%c"), |
91e22acd AS |
11697 | ibfd, |
11698 | in_attr[i].i ? in_attr[i].i : '0', | |
11699 | out_attr[i].i ? out_attr[i].i : '0'); | |
11700 | result = FALSE; | |
11701 | } | |
11702 | } | |
11703 | break; | |
75375b3e | 11704 | case Tag_FP_arch: |
62f3b8c8 | 11705 | { |
4547cb56 NC |
11706 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
11707 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch | |
11708 | when it's 0. It might mean absence of FP hardware if | |
11709 | Tag_FP_arch is zero, otherwise it is effectively SP + DP. */ | |
11710 | ||
bca38921 | 11711 | #define VFP_VERSION_COUNT 8 |
62f3b8c8 PB |
11712 | static const struct |
11713 | { | |
11714 | int ver; | |
11715 | int regs; | |
bca38921 | 11716 | } vfp_versions[VFP_VERSION_COUNT] = |
62f3b8c8 PB |
11717 | { |
11718 | {0, 0}, | |
11719 | {1, 16}, | |
11720 | {2, 16}, | |
11721 | {3, 32}, | |
11722 | {3, 16}, | |
11723 | {4, 32}, | |
bca38921 MGD |
11724 | {4, 16}, |
11725 | {8, 32} | |
62f3b8c8 PB |
11726 | }; |
11727 | int ver; | |
11728 | int regs; | |
11729 | int newval; | |
11730 | ||
4547cb56 NC |
11731 | /* If the output has no requirement about FP hardware, |
11732 | follow the requirement of the input. */ | |
11733 | if (out_attr[i].i == 0) | |
11734 | { | |
11735 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); | |
11736 | out_attr[i].i = in_attr[i].i; | |
11737 | out_attr[Tag_ABI_HardFP_use].i | |
11738 | = in_attr[Tag_ABI_HardFP_use].i; | |
11739 | break; | |
11740 | } | |
11741 | /* If the input has no requirement about FP hardware, do | |
11742 | nothing. */ | |
11743 | else if (in_attr[i].i == 0) | |
11744 | { | |
11745 | BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0); | |
11746 | break; | |
11747 | } | |
11748 | ||
11749 | /* Both the input and the output have nonzero Tag_FP_arch. | |
11750 | So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */ | |
11751 | ||
11752 | /* If both the input and the output have zero Tag_ABI_HardFP_use, | |
11753 | do nothing. */ | |
11754 | if (in_attr[Tag_ABI_HardFP_use].i == 0 | |
11755 | && out_attr[Tag_ABI_HardFP_use].i == 0) | |
11756 | ; | |
11757 | /* If the input and the output have different Tag_ABI_HardFP_use, | |
11758 | the combination of them is 3 (SP & DP). */ | |
11759 | else if (in_attr[Tag_ABI_HardFP_use].i | |
11760 | != out_attr[Tag_ABI_HardFP_use].i) | |
11761 | out_attr[Tag_ABI_HardFP_use].i = 3; | |
11762 | ||
11763 | /* Now we can handle Tag_FP_arch. */ | |
11764 | ||
bca38921 MGD |
11765 | /* Values of VFP_VERSION_COUNT or more aren't defined, so just |
11766 | pick the biggest. */ | |
11767 | if (in_attr[i].i >= VFP_VERSION_COUNT | |
11768 | && in_attr[i].i > out_attr[i].i) | |
62f3b8c8 PB |
11769 | { |
11770 | out_attr[i] = in_attr[i]; | |
11771 | break; | |
11772 | } | |
11773 | /* The output uses the superset of input features | |
11774 | (ISA version) and registers. */ | |
11775 | ver = vfp_versions[in_attr[i].i].ver; | |
11776 | if (ver < vfp_versions[out_attr[i].i].ver) | |
11777 | ver = vfp_versions[out_attr[i].i].ver; | |
11778 | regs = vfp_versions[in_attr[i].i].regs; | |
11779 | if (regs < vfp_versions[out_attr[i].i].regs) | |
11780 | regs = vfp_versions[out_attr[i].i].regs; | |
11781 | /* This assumes all possible supersets are also a valid | |
11782 | options. */ | |
bca38921 | 11783 | for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--) |
62f3b8c8 PB |
11784 | { |
11785 | if (regs == vfp_versions[newval].regs | |
11786 | && ver == vfp_versions[newval].ver) | |
11787 | break; | |
11788 | } | |
11789 | out_attr[i].i = newval; | |
11790 | } | |
b1cc4aeb | 11791 | break; |
ee065d83 PB |
11792 | case Tag_PCS_config: |
11793 | if (out_attr[i].i == 0) | |
11794 | out_attr[i].i = in_attr[i].i; | |
b6009aca | 11795 | else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i) |
ee065d83 PB |
11796 | { |
11797 | /* It's sometimes ok to mix different configs, so this is only | |
11798 | a warning. */ | |
11799 | _bfd_error_handler | |
11800 | (_("Warning: %B: Conflicting platform configuration"), ibfd); | |
11801 | } | |
11802 | break; | |
11803 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
11804 | if (in_attr[i].i != out_attr[i].i |
11805 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
11806 | && in_attr[i].i != AEABI_R9_unused) |
11807 | { | |
11808 | _bfd_error_handler | |
3895f852 | 11809 | (_("error: %B: Conflicting use of R9"), ibfd); |
91e22acd | 11810 | result = FALSE; |
ee065d83 PB |
11811 | } |
11812 | if (out_attr[i].i == AEABI_R9_unused) | |
11813 | out_attr[i].i = in_attr[i].i; | |
11814 | break; | |
11815 | case Tag_ABI_PCS_RW_data: | |
11816 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
11817 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
11818 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
11819 | { | |
11820 | _bfd_error_handler | |
3895f852 | 11821 | (_("error: %B: SB relative addressing conflicts with use of R9"), |
ee065d83 | 11822 | ibfd); |
91e22acd | 11823 | result = FALSE; |
ee065d83 PB |
11824 | } |
11825 | /* Use the smallest value specified. */ | |
11826 | if (in_attr[i].i < out_attr[i].i) | |
11827 | out_attr[i].i = in_attr[i].i; | |
11828 | break; | |
ee065d83 | 11829 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
11830 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
11831 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
11832 | { |
11833 | _bfd_error_handler | |
a9dc9481 JM |
11834 | (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
11835 | ibfd, in_attr[i].i, out_attr[i].i); | |
ee065d83 | 11836 | } |
a9dc9481 | 11837 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
11838 | out_attr[i].i = in_attr[i].i; |
11839 | break; | |
ee065d83 PB |
11840 | case Tag_ABI_enum_size: |
11841 | if (in_attr[i].i != AEABI_enum_unused) | |
11842 | { | |
11843 | if (out_attr[i].i == AEABI_enum_unused | |
11844 | || out_attr[i].i == AEABI_enum_forced_wide) | |
11845 | { | |
11846 | /* The existing object is compatible with anything. | |
11847 | Use whatever requirements the new object has. */ | |
11848 | out_attr[i].i = in_attr[i].i; | |
11849 | } | |
11850 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 11851 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 11852 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 11853 | { |
91e22acd | 11854 | static const char *aeabi_enum_names[] = |
bf21ed78 | 11855 | { "", "variable-size", "32-bit", "" }; |
91e22acd AS |
11856 | const char *in_name = |
11857 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
11858 | ? aeabi_enum_names[in_attr[i].i] | |
11859 | : "<unknown>"; | |
11860 | const char *out_name = | |
11861 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
11862 | ? aeabi_enum_names[out_attr[i].i] | |
11863 | : "<unknown>"; | |
ee065d83 | 11864 | _bfd_error_handler |
bf21ed78 | 11865 | (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 11866 | ibfd, in_name, out_name); |
ee065d83 PB |
11867 | } |
11868 | } | |
11869 | break; | |
11870 | case Tag_ABI_VFP_args: | |
11871 | /* Aready done. */ | |
11872 | break; | |
11873 | case Tag_ABI_WMMX_args: | |
11874 | if (in_attr[i].i != out_attr[i].i) | |
11875 | { | |
11876 | _bfd_error_handler | |
3895f852 | 11877 | (_("error: %B uses iWMMXt register arguments, %B does not"), |
ee065d83 | 11878 | ibfd, obfd); |
91e22acd | 11879 | result = FALSE; |
ee065d83 PB |
11880 | } |
11881 | break; | |
7b86a9fa AS |
11882 | case Tag_compatibility: |
11883 | /* Merged in target-independent code. */ | |
11884 | break; | |
91e22acd | 11885 | case Tag_ABI_HardFP_use: |
4547cb56 | 11886 | /* This is handled along with Tag_FP_arch. */ |
91e22acd AS |
11887 | break; |
11888 | case Tag_ABI_FP_16bit_format: | |
11889 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
11890 | { | |
11891 | if (in_attr[i].i != out_attr[i].i) | |
11892 | { | |
11893 | _bfd_error_handler | |
3895f852 | 11894 | (_("error: fp16 format mismatch between %B and %B"), |
91e22acd AS |
11895 | ibfd, obfd); |
11896 | result = FALSE; | |
11897 | } | |
11898 | } | |
11899 | if (in_attr[i].i != 0) | |
11900 | out_attr[i].i = in_attr[i].i; | |
11901 | break; | |
7b86a9fa | 11902 | |
cd21e546 | 11903 | case Tag_DIV_use: |
ac56ee8f MGD |
11904 | /* A value of zero on input means that the divide instruction may |
11905 | be used if available in the base architecture as specified via | |
11906 | Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that | |
11907 | the user did not want divide instructions. A value of 2 | |
11908 | explicitly means that divide instructions were allowed in ARM | |
11909 | and Thumb state. */ | |
11910 | if (in_attr[i].i == out_attr[i].i) | |
11911 | /* Do nothing. */ ; | |
11912 | else if (elf32_arm_attributes_forbid_div (in_attr) | |
11913 | && !elf32_arm_attributes_accept_div (out_attr)) | |
11914 | out_attr[i].i = 1; | |
11915 | else if (elf32_arm_attributes_forbid_div (out_attr) | |
11916 | && elf32_arm_attributes_accept_div (in_attr)) | |
11917 | out_attr[i].i = in_attr[i].i; | |
11918 | else if (in_attr[i].i == 2) | |
11919 | out_attr[i].i = in_attr[i].i; | |
cd21e546 MGD |
11920 | break; |
11921 | ||
11922 | case Tag_MPextension_use_legacy: | |
11923 | /* We don't output objects with Tag_MPextension_use_legacy - we | |
11924 | move the value to Tag_MPextension_use. */ | |
11925 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) | |
11926 | { | |
11927 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) | |
11928 | { | |
11929 | _bfd_error_handler | |
11930 | (_("%B has has both the current and legacy " | |
b38cadfb | 11931 | "Tag_MPextension_use attributes"), |
cd21e546 MGD |
11932 | ibfd); |
11933 | result = FALSE; | |
11934 | } | |
11935 | } | |
11936 | ||
11937 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) | |
11938 | out_attr[Tag_MPextension_use] = in_attr[i]; | |
11939 | ||
11940 | break; | |
11941 | ||
91e22acd | 11942 | case Tag_nodefaults: |
2d0bb761 AS |
11943 | /* This tag is set if it exists, but the value is unused (and is |
11944 | typically zero). We don't actually need to do anything here - | |
11945 | the merge happens automatically when the type flags are merged | |
11946 | below. */ | |
91e22acd AS |
11947 | break; |
11948 | case Tag_also_compatible_with: | |
11949 | /* Already done in Tag_CPU_arch. */ | |
11950 | break; | |
11951 | case Tag_conformance: | |
11952 | /* Keep the attribute if it matches. Throw it away otherwise. | |
11953 | No attribute means no claim to conform. */ | |
11954 | if (!in_attr[i].s || !out_attr[i].s | |
11955 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
11956 | out_attr[i].s = NULL; | |
11957 | break; | |
3cfad14c | 11958 | |
91e22acd | 11959 | default: |
e8b36cd1 JM |
11960 | result |
11961 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); | |
91e22acd AS |
11962 | } |
11963 | ||
11964 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
11965 | if (in_attr[i].type && !out_attr[i].type) | |
11966 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
11967 | } |
11968 | ||
104d59d1 | 11969 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
5488d830 MGD |
11970 | if (!_bfd_elf_merge_object_attributes (ibfd, obfd)) |
11971 | return FALSE; | |
ee065d83 | 11972 | |
104d59d1 | 11973 | /* Check for any attributes not known on ARM. */ |
e8b36cd1 | 11974 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
91e22acd | 11975 | |
91e22acd | 11976 | return result; |
252b5132 RH |
11977 | } |
11978 | ||
3a4a14e9 PB |
11979 | |
11980 | /* Return TRUE if the two EABI versions are incompatible. */ | |
11981 | ||
11982 | static bfd_boolean | |
11983 | elf32_arm_versions_compatible (unsigned iver, unsigned over) | |
11984 | { | |
11985 | /* v4 and v5 are the same spec before and after it was released, | |
11986 | so allow mixing them. */ | |
11987 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
11988 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
11989 | return TRUE; | |
11990 | ||
11991 | return (iver == over); | |
11992 | } | |
11993 | ||
252b5132 RH |
11994 | /* Merge backend specific data from an object file to the output |
11995 | object file when linking. */ | |
9b485d32 | 11996 | |
b34976b6 | 11997 | static bfd_boolean |
21d799b5 | 11998 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd); |
252b5132 | 11999 | |
9b485d32 NC |
12000 | /* Display the flags field. */ |
12001 | ||
b34976b6 | 12002 | static bfd_boolean |
57e8b36a | 12003 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 12004 | { |
fc830a83 NC |
12005 | FILE * file = (FILE *) ptr; |
12006 | unsigned long flags; | |
252b5132 RH |
12007 | |
12008 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
12009 | ||
12010 | /* Print normal ELF private data. */ | |
12011 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
12012 | ||
fc830a83 | 12013 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
12014 | /* Ignore init flag - it may not be set, despite the flags field |
12015 | containing valid data. */ | |
252b5132 RH |
12016 | |
12017 | /* xgettext:c-format */ | |
9b485d32 | 12018 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 12019 | |
fc830a83 NC |
12020 | switch (EF_ARM_EABI_VERSION (flags)) |
12021 | { | |
12022 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 12023 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
12024 | official ARM ELF extended ABI. Hence they are only decoded if |
12025 | the EABI version is not set. */ | |
fd2ec330 | 12026 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 12027 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 12028 | |
fd2ec330 | 12029 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 12030 | fprintf (file, " [APCS-26]"); |
fc830a83 | 12031 | else |
6c571f00 | 12032 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 12033 | |
96a846ea RE |
12034 | if (flags & EF_ARM_VFP_FLOAT) |
12035 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
12036 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
12037 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
12038 | else |
12039 | fprintf (file, _(" [FPA float format]")); | |
12040 | ||
fd2ec330 | 12041 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 12042 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 12043 | |
fd2ec330 | 12044 | if (flags & EF_ARM_PIC) |
9b485d32 | 12045 | fprintf (file, _(" [position independent]")); |
fc830a83 | 12046 | |
fd2ec330 | 12047 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 12048 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 12049 | |
fd2ec330 | 12050 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 12051 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 12052 | |
fd2ec330 | 12053 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 12054 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 12055 | |
96a846ea RE |
12056 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
12057 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
12058 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
12059 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 12060 | break; |
9a5aca8c | 12061 | |
fc830a83 | 12062 | case EF_ARM_EABI_VER1: |
9b485d32 | 12063 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 12064 | |
fc830a83 | 12065 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 12066 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 12067 | else |
9b485d32 | 12068 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 12069 | |
fc830a83 NC |
12070 | flags &= ~ EF_ARM_SYMSARESORTED; |
12071 | break; | |
9a5aca8c | 12072 | |
fd2ec330 PB |
12073 | case EF_ARM_EABI_VER2: |
12074 | fprintf (file, _(" [Version2 EABI]")); | |
12075 | ||
12076 | if (flags & EF_ARM_SYMSARESORTED) | |
12077 | fprintf (file, _(" [sorted symbol table]")); | |
12078 | else | |
12079 | fprintf (file, _(" [unsorted symbol table]")); | |
12080 | ||
12081 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
12082 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
12083 | ||
12084 | if (flags & EF_ARM_MAPSYMSFIRST) | |
12085 | fprintf (file, _(" [mapping symbols precede others]")); | |
12086 | ||
99e4ae17 | 12087 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
12088 | | EF_ARM_MAPSYMSFIRST); |
12089 | break; | |
12090 | ||
d507cf36 PB |
12091 | case EF_ARM_EABI_VER3: |
12092 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
12093 | break; |
12094 | ||
12095 | case EF_ARM_EABI_VER4: | |
12096 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 12097 | goto eabi; |
d507cf36 | 12098 | |
3a4a14e9 PB |
12099 | case EF_ARM_EABI_VER5: |
12100 | fprintf (file, _(" [Version5 EABI]")); | |
3bfcb652 NC |
12101 | |
12102 | if (flags & EF_ARM_ABI_FLOAT_SOFT) | |
12103 | fprintf (file, _(" [soft-float ABI]")); | |
12104 | ||
12105 | if (flags & EF_ARM_ABI_FLOAT_HARD) | |
12106 | fprintf (file, _(" [hard-float ABI]")); | |
12107 | ||
12108 | flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD); | |
12109 | ||
3a4a14e9 | 12110 | eabi: |
d507cf36 PB |
12111 | if (flags & EF_ARM_BE8) |
12112 | fprintf (file, _(" [BE8]")); | |
12113 | ||
12114 | if (flags & EF_ARM_LE8) | |
12115 | fprintf (file, _(" [LE8]")); | |
12116 | ||
12117 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
12118 | break; | |
12119 | ||
fc830a83 | 12120 | default: |
9b485d32 | 12121 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
12122 | break; |
12123 | } | |
252b5132 | 12124 | |
fc830a83 | 12125 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 12126 | |
fc830a83 | 12127 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 12128 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 12129 | |
fc830a83 | 12130 | if (flags & EF_ARM_HASENTRY) |
9b485d32 | 12131 | fprintf (file, _(" [has entry point]")); |
252b5132 | 12132 | |
fc830a83 NC |
12133 | flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY); |
12134 | ||
12135 | if (flags) | |
9b485d32 | 12136 | fprintf (file, _("<Unrecognised flag bits set>")); |
9a5aca8c | 12137 | |
252b5132 RH |
12138 | fputc ('\n', file); |
12139 | ||
b34976b6 | 12140 | return TRUE; |
252b5132 RH |
12141 | } |
12142 | ||
12143 | static int | |
57e8b36a | 12144 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 12145 | { |
2f0ca46a NC |
12146 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
12147 | { | |
12148 | case STT_ARM_TFUNC: | |
12149 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 12150 | |
2f0ca46a NC |
12151 | case STT_ARM_16BIT: |
12152 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
12153 | This allows us to distinguish between data used by Thumb instructions | |
12154 | and non-data (which is probably code) inside Thumb regions of an | |
12155 | executable. */ | |
1a0eb693 | 12156 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
12157 | return ELF_ST_TYPE (elf_sym->st_info); |
12158 | break; | |
9a5aca8c | 12159 | |
ce855c42 NC |
12160 | default: |
12161 | break; | |
2f0ca46a NC |
12162 | } |
12163 | ||
12164 | return type; | |
252b5132 | 12165 | } |
f21f3fe0 | 12166 | |
252b5132 | 12167 | static asection * |
07adf181 AM |
12168 | elf32_arm_gc_mark_hook (asection *sec, |
12169 | struct bfd_link_info *info, | |
12170 | Elf_Internal_Rela *rel, | |
12171 | struct elf_link_hash_entry *h, | |
12172 | Elf_Internal_Sym *sym) | |
252b5132 RH |
12173 | { |
12174 | if (h != NULL) | |
07adf181 | 12175 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
12176 | { |
12177 | case R_ARM_GNU_VTINHERIT: | |
12178 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
12179 | return NULL; |
12180 | } | |
9ad5cbcf | 12181 | |
07adf181 | 12182 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
12183 | } |
12184 | ||
780a67af NC |
12185 | /* Update the got entry reference counts for the section being removed. */ |
12186 | ||
b34976b6 | 12187 | static bfd_boolean |
ba93b8ac DJ |
12188 | elf32_arm_gc_sweep_hook (bfd * abfd, |
12189 | struct bfd_link_info * info, | |
12190 | asection * sec, | |
12191 | const Elf_Internal_Rela * relocs) | |
252b5132 | 12192 | { |
5e681ec4 PB |
12193 | Elf_Internal_Shdr *symtab_hdr; |
12194 | struct elf_link_hash_entry **sym_hashes; | |
12195 | bfd_signed_vma *local_got_refcounts; | |
12196 | const Elf_Internal_Rela *rel, *relend; | |
eb043451 PB |
12197 | struct elf32_arm_link_hash_table * globals; |
12198 | ||
7dda2462 TG |
12199 | if (info->relocatable) |
12200 | return TRUE; | |
12201 | ||
eb043451 | 12202 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
12203 | if (globals == NULL) |
12204 | return FALSE; | |
5e681ec4 PB |
12205 | |
12206 | elf_section_data (sec)->local_dynrel = NULL; | |
12207 | ||
0ffa91dd | 12208 | symtab_hdr = & elf_symtab_hdr (abfd); |
5e681ec4 PB |
12209 | sym_hashes = elf_sym_hashes (abfd); |
12210 | local_got_refcounts = elf_local_got_refcounts (abfd); | |
12211 | ||
906e58ca | 12212 | check_use_blx (globals); |
bd97cb95 | 12213 | |
5e681ec4 PB |
12214 | relend = relocs + sec->reloc_count; |
12215 | for (rel = relocs; rel < relend; rel++) | |
eb043451 | 12216 | { |
3eb128b2 AM |
12217 | unsigned long r_symndx; |
12218 | struct elf_link_hash_entry *h = NULL; | |
f6e32f6d | 12219 | struct elf32_arm_link_hash_entry *eh; |
eb043451 | 12220 | int r_type; |
34e77a92 | 12221 | bfd_boolean call_reloc_p; |
f6e32f6d RS |
12222 | bfd_boolean may_become_dynamic_p; |
12223 | bfd_boolean may_need_local_target_p; | |
34e77a92 RS |
12224 | union gotplt_union *root_plt; |
12225 | struct arm_plt_info *arm_plt; | |
5e681ec4 | 12226 | |
3eb128b2 AM |
12227 | r_symndx = ELF32_R_SYM (rel->r_info); |
12228 | if (r_symndx >= symtab_hdr->sh_info) | |
12229 | { | |
12230 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
12231 | while (h->root.type == bfd_link_hash_indirect | |
12232 | || h->root.type == bfd_link_hash_warning) | |
12233 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
12234 | } | |
f6e32f6d RS |
12235 | eh = (struct elf32_arm_link_hash_entry *) h; |
12236 | ||
34e77a92 | 12237 | call_reloc_p = FALSE; |
f6e32f6d RS |
12238 | may_become_dynamic_p = FALSE; |
12239 | may_need_local_target_p = FALSE; | |
3eb128b2 | 12240 | |
eb043451 | 12241 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 12242 | r_type = arm_real_reloc_type (globals, r_type); |
eb043451 PB |
12243 | switch (r_type) |
12244 | { | |
12245 | case R_ARM_GOT32: | |
eb043451 | 12246 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
12247 | case R_ARM_TLS_GD32: |
12248 | case R_ARM_TLS_IE32: | |
3eb128b2 | 12249 | if (h != NULL) |
eb043451 | 12250 | { |
eb043451 PB |
12251 | if (h->got.refcount > 0) |
12252 | h->got.refcount -= 1; | |
12253 | } | |
12254 | else if (local_got_refcounts != NULL) | |
12255 | { | |
12256 | if (local_got_refcounts[r_symndx] > 0) | |
12257 | local_got_refcounts[r_symndx] -= 1; | |
12258 | } | |
12259 | break; | |
12260 | ||
ba93b8ac | 12261 | case R_ARM_TLS_LDM32: |
4dfe6ac6 | 12262 | globals->tls_ldm_got.refcount -= 1; |
ba93b8ac DJ |
12263 | break; |
12264 | ||
eb043451 PB |
12265 | case R_ARM_PC24: |
12266 | case R_ARM_PLT32: | |
5b5bb741 PB |
12267 | case R_ARM_CALL: |
12268 | case R_ARM_JUMP24: | |
eb043451 | 12269 | case R_ARM_PREL31: |
c19d1205 | 12270 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
12271 | case R_ARM_THM_JUMP24: |
12272 | case R_ARM_THM_JUMP19: | |
34e77a92 | 12273 | call_reloc_p = TRUE; |
f6e32f6d RS |
12274 | may_need_local_target_p = TRUE; |
12275 | break; | |
12276 | ||
12277 | case R_ARM_ABS12: | |
12278 | if (!globals->vxworks_p) | |
12279 | { | |
12280 | may_need_local_target_p = TRUE; | |
12281 | break; | |
12282 | } | |
12283 | /* Fall through. */ | |
12284 | case R_ARM_ABS32: | |
12285 | case R_ARM_ABS32_NOI: | |
12286 | case R_ARM_REL32: | |
12287 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
12288 | case R_ARM_MOVW_ABS_NC: |
12289 | case R_ARM_MOVT_ABS: | |
12290 | case R_ARM_MOVW_PREL_NC: | |
12291 | case R_ARM_MOVT_PREL: | |
12292 | case R_ARM_THM_MOVW_ABS_NC: | |
12293 | case R_ARM_THM_MOVT_ABS: | |
12294 | case R_ARM_THM_MOVW_PREL_NC: | |
12295 | case R_ARM_THM_MOVT_PREL: | |
b7693d02 | 12296 | /* Should the interworking branches be here also? */ |
f6e32f6d | 12297 | if ((info->shared || globals->root.is_relocatable_executable) |
34e77a92 RS |
12298 | && (sec->flags & SEC_ALLOC) != 0) |
12299 | { | |
12300 | if (h == NULL | |
12301 | && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)) | |
12302 | { | |
12303 | call_reloc_p = TRUE; | |
12304 | may_need_local_target_p = TRUE; | |
12305 | } | |
12306 | else | |
12307 | may_become_dynamic_p = TRUE; | |
12308 | } | |
f6e32f6d RS |
12309 | else |
12310 | may_need_local_target_p = TRUE; | |
12311 | break; | |
b7693d02 | 12312 | |
f6e32f6d RS |
12313 | default: |
12314 | break; | |
12315 | } | |
5e681ec4 | 12316 | |
34e77a92 RS |
12317 | if (may_need_local_target_p |
12318 | && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt)) | |
f6e32f6d | 12319 | { |
27586251 HPN |
12320 | /* If PLT refcount book-keeping is wrong and too low, we'll |
12321 | see a zero value (going to -1) for the root PLT reference | |
12322 | count. */ | |
12323 | if (root_plt->refcount >= 0) | |
12324 | { | |
12325 | BFD_ASSERT (root_plt->refcount != 0); | |
12326 | root_plt->refcount -= 1; | |
12327 | } | |
12328 | else | |
12329 | /* A value of -1 means the symbol has become local, forced | |
12330 | or seeing a hidden definition. Any other negative value | |
12331 | is an error. */ | |
12332 | BFD_ASSERT (root_plt->refcount == -1); | |
34e77a92 RS |
12333 | |
12334 | if (!call_reloc_p) | |
12335 | arm_plt->noncall_refcount--; | |
5e681ec4 | 12336 | |
f6e32f6d | 12337 | if (r_type == R_ARM_THM_CALL) |
34e77a92 | 12338 | arm_plt->maybe_thumb_refcount--; |
bd97cb95 | 12339 | |
f6e32f6d RS |
12340 | if (r_type == R_ARM_THM_JUMP24 |
12341 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 12342 | arm_plt->thumb_refcount--; |
f6e32f6d | 12343 | } |
5e681ec4 | 12344 | |
34e77a92 | 12345 | if (may_become_dynamic_p) |
f6e32f6d RS |
12346 | { |
12347 | struct elf_dyn_relocs **pp; | |
12348 | struct elf_dyn_relocs *p; | |
5e681ec4 | 12349 | |
34e77a92 | 12350 | if (h != NULL) |
9c489990 | 12351 | pp = &(eh->dyn_relocs); |
34e77a92 RS |
12352 | else |
12353 | { | |
12354 | Elf_Internal_Sym *isym; | |
12355 | ||
12356 | isym = bfd_sym_from_r_symndx (&globals->sym_cache, | |
12357 | abfd, r_symndx); | |
12358 | if (isym == NULL) | |
12359 | return FALSE; | |
12360 | pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); | |
12361 | if (pp == NULL) | |
12362 | return FALSE; | |
12363 | } | |
9c489990 | 12364 | for (; (p = *pp) != NULL; pp = &p->next) |
f6e32f6d RS |
12365 | if (p->sec == sec) |
12366 | { | |
12367 | /* Everything must go for SEC. */ | |
12368 | *pp = p->next; | |
12369 | break; | |
12370 | } | |
eb043451 PB |
12371 | } |
12372 | } | |
5e681ec4 | 12373 | |
b34976b6 | 12374 | return TRUE; |
252b5132 RH |
12375 | } |
12376 | ||
780a67af NC |
12377 | /* Look through the relocs for a section during the first phase. */ |
12378 | ||
b34976b6 | 12379 | static bfd_boolean |
57e8b36a NC |
12380 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
12381 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 12382 | { |
b34976b6 AM |
12383 | Elf_Internal_Shdr *symtab_hdr; |
12384 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
12385 | const Elf_Internal_Rela *rel; |
12386 | const Elf_Internal_Rela *rel_end; | |
12387 | bfd *dynobj; | |
5e681ec4 | 12388 | asection *sreloc; |
5e681ec4 | 12389 | struct elf32_arm_link_hash_table *htab; |
f6e32f6d RS |
12390 | bfd_boolean call_reloc_p; |
12391 | bfd_boolean may_become_dynamic_p; | |
12392 | bfd_boolean may_need_local_target_p; | |
ce98a316 | 12393 | unsigned long nsyms; |
9a5aca8c | 12394 | |
1049f94e | 12395 | if (info->relocatable) |
b34976b6 | 12396 | return TRUE; |
9a5aca8c | 12397 | |
0ffa91dd NC |
12398 | BFD_ASSERT (is_arm_elf (abfd)); |
12399 | ||
5e681ec4 | 12400 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
12401 | if (htab == NULL) |
12402 | return FALSE; | |
12403 | ||
5e681ec4 | 12404 | sreloc = NULL; |
9a5aca8c | 12405 | |
67687978 PB |
12406 | /* Create dynamic sections for relocatable executables so that we can |
12407 | copy relocations. */ | |
12408 | if (htab->root.is_relocatable_executable | |
12409 | && ! htab->root.dynamic_sections_created) | |
12410 | { | |
12411 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
12412 | return FALSE; | |
12413 | } | |
12414 | ||
cbc704f3 RS |
12415 | if (htab->root.dynobj == NULL) |
12416 | htab->root.dynobj = abfd; | |
34e77a92 RS |
12417 | if (!create_ifunc_sections (info)) |
12418 | return FALSE; | |
cbc704f3 RS |
12419 | |
12420 | dynobj = htab->root.dynobj; | |
12421 | ||
0ffa91dd | 12422 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 12423 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 | 12424 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
b38cadfb | 12425 | |
252b5132 RH |
12426 | rel_end = relocs + sec->reloc_count; |
12427 | for (rel = relocs; rel < rel_end; rel++) | |
12428 | { | |
34e77a92 | 12429 | Elf_Internal_Sym *isym; |
252b5132 | 12430 | struct elf_link_hash_entry *h; |
b7693d02 | 12431 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 12432 | unsigned long r_symndx; |
eb043451 | 12433 | int r_type; |
9a5aca8c | 12434 | |
252b5132 | 12435 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 12436 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 12437 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 12438 | |
ce98a316 NC |
12439 | if (r_symndx >= nsyms |
12440 | /* PR 9934: It is possible to have relocations that do not | |
12441 | refer to symbols, thus it is also possible to have an | |
12442 | object file containing relocations but no symbol table. */ | |
cf35638d | 12443 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
ba93b8ac DJ |
12444 | { |
12445 | (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd, | |
ce98a316 | 12446 | r_symndx); |
ba93b8ac DJ |
12447 | return FALSE; |
12448 | } | |
12449 | ||
34e77a92 RS |
12450 | h = NULL; |
12451 | isym = NULL; | |
12452 | if (nsyms > 0) | |
973a3492 | 12453 | { |
34e77a92 RS |
12454 | if (r_symndx < symtab_hdr->sh_info) |
12455 | { | |
12456 | /* A local symbol. */ | |
12457 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, | |
12458 | abfd, r_symndx); | |
12459 | if (isym == NULL) | |
12460 | return FALSE; | |
12461 | } | |
12462 | else | |
12463 | { | |
12464 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
12465 | while (h->root.type == bfd_link_hash_indirect | |
12466 | || h->root.type == bfd_link_hash_warning) | |
12467 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
81fbe831 AM |
12468 | |
12469 | /* PR15323, ref flags aren't set for references in the | |
12470 | same object. */ | |
12471 | h->root.non_ir_ref = 1; | |
34e77a92 | 12472 | } |
973a3492 | 12473 | } |
9a5aca8c | 12474 | |
b7693d02 DJ |
12475 | eh = (struct elf32_arm_link_hash_entry *) h; |
12476 | ||
f6e32f6d RS |
12477 | call_reloc_p = FALSE; |
12478 | may_become_dynamic_p = FALSE; | |
12479 | may_need_local_target_p = FALSE; | |
12480 | ||
0855e32b NS |
12481 | /* Could be done earlier, if h were already available. */ |
12482 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
eb043451 | 12483 | switch (r_type) |
252b5132 | 12484 | { |
5e681ec4 | 12485 | case R_ARM_GOT32: |
eb043451 | 12486 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
12487 | case R_ARM_TLS_GD32: |
12488 | case R_ARM_TLS_IE32: | |
0855e32b NS |
12489 | case R_ARM_TLS_GOTDESC: |
12490 | case R_ARM_TLS_DESCSEQ: | |
12491 | case R_ARM_THM_TLS_DESCSEQ: | |
12492 | case R_ARM_TLS_CALL: | |
12493 | case R_ARM_THM_TLS_CALL: | |
5e681ec4 | 12494 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
12495 | { |
12496 | int tls_type, old_tls_type; | |
5e681ec4 | 12497 | |
ba93b8ac DJ |
12498 | switch (r_type) |
12499 | { | |
12500 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
b38cadfb | 12501 | |
ba93b8ac | 12502 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
b38cadfb | 12503 | |
0855e32b NS |
12504 | case R_ARM_TLS_GOTDESC: |
12505 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: | |
12506 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: | |
12507 | tls_type = GOT_TLS_GDESC; break; | |
b38cadfb | 12508 | |
ba93b8ac DJ |
12509 | default: tls_type = GOT_NORMAL; break; |
12510 | } | |
252b5132 | 12511 | |
ba93b8ac DJ |
12512 | if (h != NULL) |
12513 | { | |
12514 | h->got.refcount++; | |
12515 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
12516 | } | |
12517 | else | |
12518 | { | |
ba93b8ac | 12519 | /* This is a global offset table entry for a local symbol. */ |
34e77a92 RS |
12520 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
12521 | return FALSE; | |
12522 | elf_local_got_refcounts (abfd)[r_symndx] += 1; | |
ba93b8ac DJ |
12523 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
12524 | } | |
12525 | ||
0855e32b NS |
12526 | /* If a variable is accessed with both tls methods, two |
12527 | slots may be created. */ | |
12528 | if (GOT_TLS_GD_ANY_P (old_tls_type) | |
12529 | && GOT_TLS_GD_ANY_P (tls_type)) | |
12530 | tls_type |= old_tls_type; | |
12531 | ||
12532 | /* We will already have issued an error message if there | |
12533 | is a TLS/non-TLS mismatch, based on the symbol | |
12534 | type. So just combine any TLS types needed. */ | |
ba93b8ac DJ |
12535 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
12536 | && tls_type != GOT_NORMAL) | |
12537 | tls_type |= old_tls_type; | |
12538 | ||
0855e32b NS |
12539 | /* If the symbol is accessed in both IE and GDESC |
12540 | method, we're able to relax. Turn off the GDESC flag, | |
12541 | without messing up with any other kind of tls types | |
12542 | that may be involved */ | |
12543 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) | |
12544 | tls_type &= ~GOT_TLS_GDESC; | |
12545 | ||
ba93b8ac DJ |
12546 | if (old_tls_type != tls_type) |
12547 | { | |
12548 | if (h != NULL) | |
12549 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
12550 | else | |
12551 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
12552 | } | |
12553 | } | |
8029a119 | 12554 | /* Fall through. */ |
ba93b8ac DJ |
12555 | |
12556 | case R_ARM_TLS_LDM32: | |
12557 | if (r_type == R_ARM_TLS_LDM32) | |
12558 | htab->tls_ldm_got.refcount++; | |
8029a119 | 12559 | /* Fall through. */ |
252b5132 | 12560 | |
c19d1205 | 12561 | case R_ARM_GOTOFF32: |
5e681ec4 | 12562 | case R_ARM_GOTPC: |
cbc704f3 RS |
12563 | if (htab->root.sgot == NULL |
12564 | && !create_got_section (htab->root.dynobj, info)) | |
12565 | return FALSE; | |
252b5132 RH |
12566 | break; |
12567 | ||
252b5132 | 12568 | case R_ARM_PC24: |
7359ea65 | 12569 | case R_ARM_PLT32: |
5b5bb741 PB |
12570 | case R_ARM_CALL: |
12571 | case R_ARM_JUMP24: | |
eb043451 | 12572 | case R_ARM_PREL31: |
c19d1205 | 12573 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
12574 | case R_ARM_THM_JUMP24: |
12575 | case R_ARM_THM_JUMP19: | |
f6e32f6d RS |
12576 | call_reloc_p = TRUE; |
12577 | may_need_local_target_p = TRUE; | |
12578 | break; | |
12579 | ||
12580 | case R_ARM_ABS12: | |
12581 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
12582 | ldr __GOTT_INDEX__ offsets. */ | |
12583 | if (!htab->vxworks_p) | |
12584 | { | |
12585 | may_need_local_target_p = TRUE; | |
12586 | break; | |
12587 | } | |
12588 | /* Fall through. */ | |
39623e12 | 12589 | |
96c23d59 JM |
12590 | case R_ARM_MOVW_ABS_NC: |
12591 | case R_ARM_MOVT_ABS: | |
12592 | case R_ARM_THM_MOVW_ABS_NC: | |
12593 | case R_ARM_THM_MOVT_ABS: | |
12594 | if (info->shared) | |
12595 | { | |
12596 | (*_bfd_error_handler) | |
12597 | (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), | |
12598 | abfd, elf32_arm_howto_table_1[r_type].name, | |
12599 | (h) ? h->root.root.string : "a local symbol"); | |
12600 | bfd_set_error (bfd_error_bad_value); | |
12601 | return FALSE; | |
12602 | } | |
12603 | ||
12604 | /* Fall through. */ | |
39623e12 PB |
12605 | case R_ARM_ABS32: |
12606 | case R_ARM_ABS32_NOI: | |
12607 | case R_ARM_REL32: | |
12608 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
12609 | case R_ARM_MOVW_PREL_NC: |
12610 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
12611 | case R_ARM_THM_MOVW_PREL_NC: |
12612 | case R_ARM_THM_MOVT_PREL: | |
39623e12 | 12613 | |
b7693d02 | 12614 | /* Should the interworking branches be listed here? */ |
67687978 | 12615 | if ((info->shared || htab->root.is_relocatable_executable) |
34e77a92 RS |
12616 | && (sec->flags & SEC_ALLOC) != 0) |
12617 | { | |
12618 | if (h == NULL | |
12619 | && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)) | |
12620 | { | |
12621 | /* In shared libraries and relocatable executables, | |
12622 | we treat local relative references as calls; | |
12623 | see the related SYMBOL_CALLS_LOCAL code in | |
12624 | allocate_dynrelocs. */ | |
12625 | call_reloc_p = TRUE; | |
12626 | may_need_local_target_p = TRUE; | |
12627 | } | |
12628 | else | |
12629 | /* We are creating a shared library or relocatable | |
12630 | executable, and this is a reloc against a global symbol, | |
12631 | or a non-PC-relative reloc against a local symbol. | |
12632 | We may need to copy the reloc into the output. */ | |
12633 | may_become_dynamic_p = TRUE; | |
12634 | } | |
f6e32f6d RS |
12635 | else |
12636 | may_need_local_target_p = TRUE; | |
252b5132 RH |
12637 | break; |
12638 | ||
12639 | /* This relocation describes the C++ object vtable hierarchy. | |
12640 | Reconstruct it for later use during GC. */ | |
12641 | case R_ARM_GNU_VTINHERIT: | |
c152c796 | 12642 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) |
b34976b6 | 12643 | return FALSE; |
252b5132 | 12644 | break; |
9a5aca8c | 12645 | |
252b5132 RH |
12646 | /* This relocation describes which C++ vtable entries are actually |
12647 | used. Record for later use during GC. */ | |
12648 | case R_ARM_GNU_VTENTRY: | |
d17e0c6e JB |
12649 | BFD_ASSERT (h != NULL); |
12650 | if (h != NULL | |
12651 | && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
b34976b6 | 12652 | return FALSE; |
252b5132 RH |
12653 | break; |
12654 | } | |
f6e32f6d RS |
12655 | |
12656 | if (h != NULL) | |
12657 | { | |
12658 | if (call_reloc_p) | |
12659 | /* We may need a .plt entry if the function this reloc | |
12660 | refers to is in a different object, regardless of the | |
12661 | symbol's type. We can't tell for sure yet, because | |
12662 | something later might force the symbol local. */ | |
12663 | h->needs_plt = 1; | |
12664 | else if (may_need_local_target_p) | |
12665 | /* If this reloc is in a read-only section, we might | |
12666 | need a copy reloc. We can't check reliably at this | |
12667 | stage whether the section is read-only, as input | |
12668 | sections have not yet been mapped to output sections. | |
12669 | Tentatively set the flag for now, and correct in | |
12670 | adjust_dynamic_symbol. */ | |
12671 | h->non_got_ref = 1; | |
12672 | } | |
12673 | ||
34e77a92 RS |
12674 | if (may_need_local_target_p |
12675 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) | |
f6e32f6d | 12676 | { |
34e77a92 RS |
12677 | union gotplt_union *root_plt; |
12678 | struct arm_plt_info *arm_plt; | |
12679 | struct arm_local_iplt_info *local_iplt; | |
12680 | ||
12681 | if (h != NULL) | |
12682 | { | |
12683 | root_plt = &h->plt; | |
12684 | arm_plt = &eh->plt; | |
12685 | } | |
12686 | else | |
12687 | { | |
12688 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
12689 | if (local_iplt == NULL) | |
12690 | return FALSE; | |
12691 | root_plt = &local_iplt->root; | |
12692 | arm_plt = &local_iplt->arm; | |
12693 | } | |
12694 | ||
f6e32f6d RS |
12695 | /* If the symbol is a function that doesn't bind locally, |
12696 | this relocation will need a PLT entry. */ | |
a8c887dd NC |
12697 | if (root_plt->refcount != -1) |
12698 | root_plt->refcount += 1; | |
34e77a92 RS |
12699 | |
12700 | if (!call_reloc_p) | |
12701 | arm_plt->noncall_refcount++; | |
f6e32f6d RS |
12702 | |
12703 | /* It's too early to use htab->use_blx here, so we have to | |
12704 | record possible blx references separately from | |
12705 | relocs that definitely need a thumb stub. */ | |
12706 | ||
12707 | if (r_type == R_ARM_THM_CALL) | |
34e77a92 | 12708 | arm_plt->maybe_thumb_refcount += 1; |
f6e32f6d RS |
12709 | |
12710 | if (r_type == R_ARM_THM_JUMP24 | |
12711 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 12712 | arm_plt->thumb_refcount += 1; |
f6e32f6d RS |
12713 | } |
12714 | ||
12715 | if (may_become_dynamic_p) | |
12716 | { | |
12717 | struct elf_dyn_relocs *p, **head; | |
12718 | ||
12719 | /* Create a reloc section in dynobj. */ | |
12720 | if (sreloc == NULL) | |
12721 | { | |
12722 | sreloc = _bfd_elf_make_dynamic_reloc_section | |
12723 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
12724 | ||
12725 | if (sreloc == NULL) | |
12726 | return FALSE; | |
12727 | ||
12728 | /* BPABI objects never have dynamic relocations mapped. */ | |
12729 | if (htab->symbian_p) | |
12730 | { | |
12731 | flagword flags; | |
12732 | ||
12733 | flags = bfd_get_section_flags (dynobj, sreloc); | |
12734 | flags &= ~(SEC_LOAD | SEC_ALLOC); | |
12735 | bfd_set_section_flags (dynobj, sreloc, flags); | |
12736 | } | |
12737 | } | |
12738 | ||
12739 | /* If this is a global symbol, count the number of | |
12740 | relocations we need for this symbol. */ | |
12741 | if (h != NULL) | |
12742 | head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; | |
12743 | else | |
12744 | { | |
34e77a92 RS |
12745 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
12746 | if (head == NULL) | |
f6e32f6d | 12747 | return FALSE; |
f6e32f6d RS |
12748 | } |
12749 | ||
12750 | p = *head; | |
12751 | if (p == NULL || p->sec != sec) | |
12752 | { | |
12753 | bfd_size_type amt = sizeof *p; | |
12754 | ||
12755 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); | |
12756 | if (p == NULL) | |
12757 | return FALSE; | |
12758 | p->next = *head; | |
12759 | *head = p; | |
12760 | p->sec = sec; | |
12761 | p->count = 0; | |
12762 | p->pc_count = 0; | |
12763 | } | |
12764 | ||
12765 | if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) | |
12766 | p->pc_count += 1; | |
12767 | p->count += 1; | |
12768 | } | |
252b5132 | 12769 | } |
f21f3fe0 | 12770 | |
b34976b6 | 12771 | return TRUE; |
252b5132 RH |
12772 | } |
12773 | ||
6a5bb875 PB |
12774 | /* Unwinding tables are not referenced directly. This pass marks them as |
12775 | required if the corresponding code section is marked. */ | |
12776 | ||
12777 | static bfd_boolean | |
906e58ca NC |
12778 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
12779 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
12780 | { |
12781 | bfd *sub; | |
12782 | Elf_Internal_Shdr **elf_shdrp; | |
12783 | bfd_boolean again; | |
12784 | ||
7f6ab9f8 AM |
12785 | _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); |
12786 | ||
6a5bb875 PB |
12787 | /* Marking EH data may cause additional code sections to be marked, |
12788 | requiring multiple passes. */ | |
12789 | again = TRUE; | |
12790 | while (again) | |
12791 | { | |
12792 | again = FALSE; | |
12793 | for (sub = info->input_bfds; sub != NULL; sub = sub->link_next) | |
12794 | { | |
12795 | asection *o; | |
12796 | ||
0ffa91dd | 12797 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
12798 | continue; |
12799 | ||
12800 | elf_shdrp = elf_elfsections (sub); | |
12801 | for (o = sub->sections; o != NULL; o = o->next) | |
12802 | { | |
12803 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 12804 | |
6a5bb875 | 12805 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
12806 | if (hdr->sh_type == SHT_ARM_EXIDX |
12807 | && hdr->sh_link | |
12808 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
12809 | && !o->gc_mark |
12810 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
12811 | { | |
12812 | again = TRUE; | |
12813 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) | |
12814 | return FALSE; | |
12815 | } | |
12816 | } | |
12817 | } | |
12818 | } | |
12819 | ||
12820 | return TRUE; | |
12821 | } | |
12822 | ||
3c9458e9 NC |
12823 | /* Treat mapping symbols as special target symbols. */ |
12824 | ||
12825 | static bfd_boolean | |
12826 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) | |
12827 | { | |
b0796911 PB |
12828 | return bfd_is_arm_special_symbol_name (sym->name, |
12829 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
12830 | } |
12831 | ||
0367ecfb NC |
12832 | /* This is a copy of elf_find_function() from elf.c except that |
12833 | ARM mapping symbols are ignored when looking for function names | |
12834 | and STT_ARM_TFUNC is considered to a function type. */ | |
252b5132 | 12835 | |
0367ecfb NC |
12836 | static bfd_boolean |
12837 | arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, | |
12838 | asection * section, | |
12839 | asymbol ** symbols, | |
12840 | bfd_vma offset, | |
12841 | const char ** filename_ptr, | |
12842 | const char ** functionname_ptr) | |
12843 | { | |
12844 | const char * filename = NULL; | |
12845 | asymbol * func = NULL; | |
12846 | bfd_vma low_func = 0; | |
12847 | asymbol ** p; | |
252b5132 RH |
12848 | |
12849 | for (p = symbols; *p != NULL; p++) | |
12850 | { | |
12851 | elf_symbol_type *q; | |
12852 | ||
12853 | q = (elf_symbol_type *) *p; | |
12854 | ||
252b5132 RH |
12855 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
12856 | { | |
12857 | default: | |
12858 | break; | |
12859 | case STT_FILE: | |
12860 | filename = bfd_asymbol_name (&q->symbol); | |
12861 | break; | |
252b5132 RH |
12862 | case STT_FUNC: |
12863 | case STT_ARM_TFUNC: | |
9d2da7ca | 12864 | case STT_NOTYPE: |
b0796911 | 12865 | /* Skip mapping symbols. */ |
0367ecfb | 12866 | if ((q->symbol.flags & BSF_LOCAL) |
b0796911 PB |
12867 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
12868 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
0367ecfb NC |
12869 | continue; |
12870 | /* Fall through. */ | |
6b40fcba | 12871 | if (bfd_get_section (&q->symbol) == section |
252b5132 RH |
12872 | && q->symbol.value >= low_func |
12873 | && q->symbol.value <= offset) | |
12874 | { | |
12875 | func = (asymbol *) q; | |
12876 | low_func = q->symbol.value; | |
12877 | } | |
12878 | break; | |
12879 | } | |
12880 | } | |
12881 | ||
12882 | if (func == NULL) | |
b34976b6 | 12883 | return FALSE; |
252b5132 | 12884 | |
0367ecfb NC |
12885 | if (filename_ptr) |
12886 | *filename_ptr = filename; | |
12887 | if (functionname_ptr) | |
12888 | *functionname_ptr = bfd_asymbol_name (func); | |
12889 | ||
12890 | return TRUE; | |
906e58ca | 12891 | } |
0367ecfb NC |
12892 | |
12893 | ||
12894 | /* Find the nearest line to a particular section and offset, for error | |
12895 | reporting. This code is a duplicate of the code in elf.c, except | |
12896 | that it uses arm_elf_find_function. */ | |
12897 | ||
12898 | static bfd_boolean | |
12899 | elf32_arm_find_nearest_line (bfd * abfd, | |
12900 | asection * section, | |
12901 | asymbol ** symbols, | |
12902 | bfd_vma offset, | |
12903 | const char ** filename_ptr, | |
12904 | const char ** functionname_ptr, | |
12905 | unsigned int * line_ptr) | |
12906 | { | |
12907 | bfd_boolean found = FALSE; | |
12908 | ||
12909 | /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */ | |
12910 | ||
fc28f9aa TG |
12911 | if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections, |
12912 | section, symbols, offset, | |
0367ecfb | 12913 | filename_ptr, functionname_ptr, |
9b8d1a36 | 12914 | line_ptr, NULL, 0, |
0367ecfb NC |
12915 | & elf_tdata (abfd)->dwarf2_find_line_info)) |
12916 | { | |
12917 | if (!*functionname_ptr) | |
12918 | arm_elf_find_function (abfd, section, symbols, offset, | |
12919 | *filename_ptr ? NULL : filename_ptr, | |
12920 | functionname_ptr); | |
f21f3fe0 | 12921 | |
0367ecfb NC |
12922 | return TRUE; |
12923 | } | |
12924 | ||
12925 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, | |
12926 | & found, filename_ptr, | |
12927 | functionname_ptr, line_ptr, | |
12928 | & elf_tdata (abfd)->line_info)) | |
12929 | return FALSE; | |
12930 | ||
12931 | if (found && (*functionname_ptr || *line_ptr)) | |
12932 | return TRUE; | |
12933 | ||
12934 | if (symbols == NULL) | |
12935 | return FALSE; | |
12936 | ||
12937 | if (! arm_elf_find_function (abfd, section, symbols, offset, | |
12938 | filename_ptr, functionname_ptr)) | |
12939 | return FALSE; | |
12940 | ||
12941 | *line_ptr = 0; | |
b34976b6 | 12942 | return TRUE; |
252b5132 RH |
12943 | } |
12944 | ||
4ab527b0 FF |
12945 | static bfd_boolean |
12946 | elf32_arm_find_inliner_info (bfd * abfd, | |
12947 | const char ** filename_ptr, | |
12948 | const char ** functionname_ptr, | |
12949 | unsigned int * line_ptr) | |
12950 | { | |
12951 | bfd_boolean found; | |
12952 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, | |
12953 | functionname_ptr, line_ptr, | |
12954 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
12955 | return found; | |
12956 | } | |
12957 | ||
252b5132 RH |
12958 | /* Adjust a symbol defined by a dynamic object and referenced by a |
12959 | regular object. The current definition is in some section of the | |
12960 | dynamic object, but we're not including those sections. We have to | |
12961 | change the definition to something the rest of the link can | |
12962 | understand. */ | |
12963 | ||
b34976b6 | 12964 | static bfd_boolean |
57e8b36a NC |
12965 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
12966 | struct elf_link_hash_entry * h) | |
252b5132 RH |
12967 | { |
12968 | bfd * dynobj; | |
12969 | asection * s; | |
b7693d02 | 12970 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 12971 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 12972 | |
67687978 | 12973 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
12974 | if (globals == NULL) |
12975 | return FALSE; | |
12976 | ||
252b5132 RH |
12977 | dynobj = elf_hash_table (info)->dynobj; |
12978 | ||
12979 | /* Make sure we know what is going on here. */ | |
12980 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 12981 | && (h->needs_plt |
34e77a92 | 12982 | || h->type == STT_GNU_IFUNC |
f6e332e6 | 12983 | || h->u.weakdef != NULL |
f5385ebf AM |
12984 | || (h->def_dynamic |
12985 | && h->ref_regular | |
12986 | && !h->def_regular))); | |
252b5132 | 12987 | |
b7693d02 DJ |
12988 | eh = (struct elf32_arm_link_hash_entry *) h; |
12989 | ||
252b5132 RH |
12990 | /* If this is a function, put it in the procedure linkage table. We |
12991 | will fill in the contents of the procedure linkage table later, | |
12992 | when we know the address of the .got section. */ | |
34e77a92 | 12993 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
252b5132 | 12994 | { |
34e77a92 RS |
12995 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
12996 | symbol binds locally. */ | |
5e681ec4 | 12997 | if (h->plt.refcount <= 0 |
34e77a92 RS |
12998 | || (h->type != STT_GNU_IFUNC |
12999 | && (SYMBOL_CALLS_LOCAL (info, h) | |
13000 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
13001 | && h->root.type == bfd_link_hash_undefweak)))) | |
252b5132 RH |
13002 | { |
13003 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
13004 | file, but the symbol was never referred to by a dynamic |
13005 | object, or if all references were garbage collected. In | |
13006 | such a case, we don't actually need to build a procedure | |
13007 | linkage table, and we can just do a PC24 reloc instead. */ | |
13008 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
13009 | eh->plt.thumb_refcount = 0; |
13010 | eh->plt.maybe_thumb_refcount = 0; | |
13011 | eh->plt.noncall_refcount = 0; | |
f5385ebf | 13012 | h->needs_plt = 0; |
252b5132 RH |
13013 | } |
13014 | ||
b34976b6 | 13015 | return TRUE; |
252b5132 | 13016 | } |
5e681ec4 | 13017 | else |
b7693d02 DJ |
13018 | { |
13019 | /* It's possible that we incorrectly decided a .plt reloc was | |
13020 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
13021 | in check_relocs. We can't decide accurately between function | |
13022 | and non-function syms in check-relocs; Objects loaded later in | |
13023 | the link may change h->type. So fix it now. */ | |
13024 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
13025 | eh->plt.thumb_refcount = 0; |
13026 | eh->plt.maybe_thumb_refcount = 0; | |
13027 | eh->plt.noncall_refcount = 0; | |
b7693d02 | 13028 | } |
252b5132 RH |
13029 | |
13030 | /* If this is a weak symbol, and there is a real definition, the | |
13031 | processor independent code will have arranged for us to see the | |
13032 | real definition first, and we can just use the same value. */ | |
f6e332e6 | 13033 | if (h->u.weakdef != NULL) |
252b5132 | 13034 | { |
f6e332e6 AM |
13035 | BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined |
13036 | || h->u.weakdef->root.type == bfd_link_hash_defweak); | |
13037 | h->root.u.def.section = h->u.weakdef->root.u.def.section; | |
13038 | h->root.u.def.value = h->u.weakdef->root.u.def.value; | |
b34976b6 | 13039 | return TRUE; |
252b5132 RH |
13040 | } |
13041 | ||
ba93b8ac DJ |
13042 | /* If there are no non-GOT references, we do not need a copy |
13043 | relocation. */ | |
13044 | if (!h->non_got_ref) | |
13045 | return TRUE; | |
13046 | ||
252b5132 RH |
13047 | /* This is a reference to a symbol defined by a dynamic object which |
13048 | is not a function. */ | |
13049 | ||
13050 | /* If we are creating a shared library, we must presume that the | |
13051 | only references to the symbol are via the global offset table. | |
13052 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
13053 | be handled correctly by relocate_section. Relocatable executables |
13054 | can reference data in shared objects directly, so we don't need to | |
13055 | do anything here. */ | |
13056 | if (info->shared || globals->root.is_relocatable_executable) | |
b34976b6 | 13057 | return TRUE; |
252b5132 RH |
13058 | |
13059 | /* We must allocate the symbol in our .dynbss section, which will | |
13060 | become part of the .bss section of the executable. There will be | |
13061 | an entry for this symbol in the .dynsym section. The dynamic | |
13062 | object will contain position independent code, so all references | |
13063 | from the dynamic object to this symbol will go through the global | |
13064 | offset table. The dynamic linker will use the .dynsym entry to | |
13065 | determine the address it must put in the global offset table, so | |
13066 | both the dynamic object and the regular object will refer to the | |
13067 | same memory location for the variable. */ | |
3d4d4302 | 13068 | s = bfd_get_linker_section (dynobj, ".dynbss"); |
252b5132 RH |
13069 | BFD_ASSERT (s != NULL); |
13070 | ||
13071 | /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to | |
13072 | copy the initial value out of the dynamic object and into the | |
13073 | runtime process image. We need to remember the offset into the | |
00a97672 | 13074 | .rel(a).bss section we are going to use. */ |
1d7e9d18 | 13075 | if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0) |
252b5132 RH |
13076 | { |
13077 | asection *srel; | |
13078 | ||
3d4d4302 | 13079 | srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss")); |
47beaa6a | 13080 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
f5385ebf | 13081 | h->needs_copy = 1; |
252b5132 RH |
13082 | } |
13083 | ||
027297b7 | 13084 | return _bfd_elf_adjust_dynamic_copy (h, s); |
252b5132 RH |
13085 | } |
13086 | ||
5e681ec4 PB |
13087 | /* Allocate space in .plt, .got and associated reloc sections for |
13088 | dynamic relocs. */ | |
13089 | ||
13090 | static bfd_boolean | |
47beaa6a | 13091 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
13092 | { |
13093 | struct bfd_link_info *info; | |
13094 | struct elf32_arm_link_hash_table *htab; | |
13095 | struct elf32_arm_link_hash_entry *eh; | |
0bdcacaf | 13096 | struct elf_dyn_relocs *p; |
5e681ec4 PB |
13097 | |
13098 | if (h->root.type == bfd_link_hash_indirect) | |
13099 | return TRUE; | |
13100 | ||
e6a6bb22 AM |
13101 | eh = (struct elf32_arm_link_hash_entry *) h; |
13102 | ||
5e681ec4 PB |
13103 | info = (struct bfd_link_info *) inf; |
13104 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
13105 | if (htab == NULL) |
13106 | return FALSE; | |
5e681ec4 | 13107 | |
34e77a92 | 13108 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
5e681ec4 PB |
13109 | && h->plt.refcount > 0) |
13110 | { | |
13111 | /* Make sure this symbol is output as a dynamic symbol. | |
13112 | Undefined weak syms won't yet be marked as dynamic. */ | |
13113 | if (h->dynindx == -1 | |
f5385ebf | 13114 | && !h->forced_local) |
5e681ec4 | 13115 | { |
c152c796 | 13116 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
13117 | return FALSE; |
13118 | } | |
13119 | ||
34e77a92 RS |
13120 | /* If the call in the PLT entry binds locally, the associated |
13121 | GOT entry should use an R_ARM_IRELATIVE relocation instead of | |
13122 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather | |
13123 | than the .plt section. */ | |
13124 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) | |
13125 | { | |
13126 | eh->is_iplt = 1; | |
13127 | if (eh->plt.noncall_refcount == 0 | |
13128 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
13129 | /* All non-call references can be resolved directly. | |
13130 | This means that they can (and in some cases, must) | |
13131 | resolve directly to the run-time target, rather than | |
13132 | to the PLT. That in turns means that any .got entry | |
13133 | would be equal to the .igot.plt entry, so there's | |
13134 | no point having both. */ | |
13135 | h->got.refcount = 0; | |
13136 | } | |
13137 | ||
5e681ec4 | 13138 | if (info->shared |
34e77a92 | 13139 | || eh->is_iplt |
7359ea65 | 13140 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 | 13141 | { |
34e77a92 | 13142 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
b7693d02 | 13143 | |
5e681ec4 PB |
13144 | /* If this symbol is not defined in a regular file, and we are |
13145 | not generating a shared library, then set the symbol to this | |
13146 | location in the .plt. This is required to make function | |
13147 | pointers compare as equal between the normal executable and | |
13148 | the shared library. */ | |
13149 | if (! info->shared | |
f5385ebf | 13150 | && !h->def_regular) |
5e681ec4 | 13151 | { |
34e77a92 | 13152 | h->root.u.def.section = htab->root.splt; |
5e681ec4 | 13153 | h->root.u.def.value = h->plt.offset; |
5e681ec4 | 13154 | |
67d74e43 DJ |
13155 | /* Make sure the function is not marked as Thumb, in case |
13156 | it is the target of an ABS32 relocation, which will | |
13157 | point to the PLT entry. */ | |
35fc36a8 | 13158 | h->target_internal = ST_BRANCH_TO_ARM; |
67d74e43 | 13159 | } |
022f8312 | 13160 | |
0855e32b | 13161 | htab->next_tls_desc_index++; |
00a97672 RS |
13162 | |
13163 | /* VxWorks executables have a second set of relocations for | |
13164 | each PLT entry. They go in a separate relocation section, | |
13165 | which is processed by the kernel loader. */ | |
13166 | if (htab->vxworks_p && !info->shared) | |
13167 | { | |
13168 | /* There is a relocation for the initial PLT entry: | |
13169 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
13170 | if (h->plt.offset == htab->plt_header_size) | |
47beaa6a | 13171 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
00a97672 RS |
13172 | |
13173 | /* There are two extra relocations for each subsequent | |
13174 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
13175 | and an R_ARM_32 relocation for the PLT entry. */ | |
47beaa6a | 13176 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
00a97672 | 13177 | } |
5e681ec4 PB |
13178 | } |
13179 | else | |
13180 | { | |
13181 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 13182 | h->needs_plt = 0; |
5e681ec4 PB |
13183 | } |
13184 | } | |
13185 | else | |
13186 | { | |
13187 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 13188 | h->needs_plt = 0; |
5e681ec4 PB |
13189 | } |
13190 | ||
0855e32b NS |
13191 | eh = (struct elf32_arm_link_hash_entry *) h; |
13192 | eh->tlsdesc_got = (bfd_vma) -1; | |
13193 | ||
5e681ec4 PB |
13194 | if (h->got.refcount > 0) |
13195 | { | |
13196 | asection *s; | |
13197 | bfd_boolean dyn; | |
ba93b8ac DJ |
13198 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
13199 | int indx; | |
5e681ec4 PB |
13200 | |
13201 | /* Make sure this symbol is output as a dynamic symbol. | |
13202 | Undefined weak syms won't yet be marked as dynamic. */ | |
13203 | if (h->dynindx == -1 | |
f5385ebf | 13204 | && !h->forced_local) |
5e681ec4 | 13205 | { |
c152c796 | 13206 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
13207 | return FALSE; |
13208 | } | |
13209 | ||
e5a52504 MM |
13210 | if (!htab->symbian_p) |
13211 | { | |
362d30a1 | 13212 | s = htab->root.sgot; |
e5a52504 | 13213 | h->got.offset = s->size; |
ba93b8ac DJ |
13214 | |
13215 | if (tls_type == GOT_UNKNOWN) | |
13216 | abort (); | |
13217 | ||
13218 | if (tls_type == GOT_NORMAL) | |
13219 | /* Non-TLS symbols need one GOT slot. */ | |
13220 | s->size += 4; | |
13221 | else | |
13222 | { | |
0855e32b NS |
13223 | if (tls_type & GOT_TLS_GDESC) |
13224 | { | |
13225 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ | |
13226 | eh->tlsdesc_got | |
13227 | = (htab->root.sgotplt->size | |
13228 | - elf32_arm_compute_jump_table_size (htab)); | |
13229 | htab->root.sgotplt->size += 8; | |
13230 | h->got.offset = (bfd_vma) -2; | |
34e77a92 | 13231 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b NS |
13232 | reloc in the middle of .got.plt. */ |
13233 | htab->num_tls_desc++; | |
13234 | } | |
13235 | ||
ba93b8ac | 13236 | if (tls_type & GOT_TLS_GD) |
0855e32b NS |
13237 | { |
13238 | /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If | |
13239 | the symbol is both GD and GDESC, got.offset may | |
13240 | have been overwritten. */ | |
13241 | h->got.offset = s->size; | |
13242 | s->size += 8; | |
13243 | } | |
13244 | ||
ba93b8ac DJ |
13245 | if (tls_type & GOT_TLS_IE) |
13246 | /* R_ARM_TLS_IE32 needs one GOT slot. */ | |
13247 | s->size += 4; | |
13248 | } | |
13249 | ||
e5a52504 | 13250 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac DJ |
13251 | |
13252 | indx = 0; | |
13253 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) | |
13254 | && (!info->shared | |
13255 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
13256 | indx = h->dynindx; | |
13257 | ||
13258 | if (tls_type != GOT_NORMAL | |
13259 | && (info->shared || indx != 0) | |
13260 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
13261 | || h->root.type != bfd_link_hash_undefweak)) | |
13262 | { | |
13263 | if (tls_type & GOT_TLS_IE) | |
47beaa6a | 13264 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
13265 | |
13266 | if (tls_type & GOT_TLS_GD) | |
47beaa6a | 13267 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 13268 | |
b38cadfb | 13269 | if (tls_type & GOT_TLS_GDESC) |
0855e32b | 13270 | { |
47beaa6a | 13271 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
0855e32b NS |
13272 | /* GDESC needs a trampoline to jump to. */ |
13273 | htab->tls_trampoline = -1; | |
13274 | } | |
13275 | ||
13276 | /* Only GD needs it. GDESC just emits one relocation per | |
13277 | 2 entries. */ | |
b38cadfb | 13278 | if ((tls_type & GOT_TLS_GD) && indx != 0) |
47beaa6a | 13279 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 13280 | } |
6f820c85 | 13281 | else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h)) |
b436d854 RS |
13282 | { |
13283 | if (htab->root.dynamic_sections_created) | |
13284 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ | |
13285 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
13286 | } | |
34e77a92 RS |
13287 | else if (h->type == STT_GNU_IFUNC |
13288 | && eh->plt.noncall_refcount == 0) | |
13289 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; | |
13290 | they all resolve dynamically instead. Reserve room for the | |
13291 | GOT entry's R_ARM_IRELATIVE relocation. */ | |
13292 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); | |
31943882 WN |
13293 | else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
13294 | || h->root.type != bfd_link_hash_undefweak)) | |
b436d854 | 13295 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ |
47beaa6a | 13296 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e5a52504 | 13297 | } |
5e681ec4 PB |
13298 | } |
13299 | else | |
13300 | h->got.offset = (bfd_vma) -1; | |
13301 | ||
a4fd1a8e PB |
13302 | /* Allocate stubs for exported Thumb functions on v4t. */ |
13303 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 13304 | && h->def_regular |
35fc36a8 | 13305 | && h->target_internal == ST_BRANCH_TO_THUMB |
a4fd1a8e PB |
13306 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
13307 | { | |
13308 | struct elf_link_hash_entry * th; | |
13309 | struct bfd_link_hash_entry * bh; | |
13310 | struct elf_link_hash_entry * myh; | |
13311 | char name[1024]; | |
13312 | asection *s; | |
13313 | bh = NULL; | |
13314 | /* Create a new symbol to regist the real location of the function. */ | |
13315 | s = h->root.u.def.section; | |
906e58ca | 13316 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
13317 | _bfd_generic_link_add_one_symbol (info, s->owner, |
13318 | name, BSF_GLOBAL, s, | |
13319 | h->root.u.def.value, | |
13320 | NULL, TRUE, FALSE, &bh); | |
13321 | ||
13322 | myh = (struct elf_link_hash_entry *) bh; | |
35fc36a8 | 13323 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
a4fd1a8e | 13324 | myh->forced_local = 1; |
35fc36a8 | 13325 | myh->target_internal = ST_BRANCH_TO_THUMB; |
a4fd1a8e PB |
13326 | eh->export_glue = myh; |
13327 | th = record_arm_to_thumb_glue (info, h); | |
13328 | /* Point the symbol at the stub. */ | |
13329 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
35fc36a8 | 13330 | h->target_internal = ST_BRANCH_TO_ARM; |
a4fd1a8e PB |
13331 | h->root.u.def.section = th->root.u.def.section; |
13332 | h->root.u.def.value = th->root.u.def.value & ~1; | |
13333 | } | |
13334 | ||
0bdcacaf | 13335 | if (eh->dyn_relocs == NULL) |
5e681ec4 PB |
13336 | return TRUE; |
13337 | ||
13338 | /* In the shared -Bsymbolic case, discard space allocated for | |
13339 | dynamic pc-relative relocs against symbols which turn out to be | |
13340 | defined in regular objects. For the normal shared case, discard | |
13341 | space for pc-relative relocs that have become local due to symbol | |
13342 | visibility changes. */ | |
13343 | ||
67687978 | 13344 | if (info->shared || htab->root.is_relocatable_executable) |
5e681ec4 | 13345 | { |
7bdca076 | 13346 | /* The only relocs that use pc_count are R_ARM_REL32 and |
bb224fc3 MS |
13347 | R_ARM_REL32_NOI, which will appear on something like |
13348 | ".long foo - .". We want calls to protected symbols to resolve | |
13349 | directly to the function rather than going via the plt. If people | |
13350 | want function pointer comparisons to work as expected then they | |
13351 | should avoid writing assembly like ".long foo - .". */ | |
ba93b8ac DJ |
13352 | if (SYMBOL_CALLS_LOCAL (info, h)) |
13353 | { | |
0bdcacaf | 13354 | struct elf_dyn_relocs **pp; |
ba93b8ac | 13355 | |
0bdcacaf | 13356 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
ba93b8ac DJ |
13357 | { |
13358 | p->count -= p->pc_count; | |
13359 | p->pc_count = 0; | |
13360 | if (p->count == 0) | |
13361 | *pp = p->next; | |
13362 | else | |
13363 | pp = &p->next; | |
13364 | } | |
13365 | } | |
13366 | ||
4dfe6ac6 | 13367 | if (htab->vxworks_p) |
3348747a | 13368 | { |
0bdcacaf | 13369 | struct elf_dyn_relocs **pp; |
3348747a | 13370 | |
0bdcacaf | 13371 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
3348747a | 13372 | { |
0bdcacaf | 13373 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
3348747a NS |
13374 | *pp = p->next; |
13375 | else | |
13376 | pp = &p->next; | |
13377 | } | |
13378 | } | |
13379 | ||
ba93b8ac | 13380 | /* Also discard relocs on undefined weak syms with non-default |
7359ea65 | 13381 | visibility. */ |
0bdcacaf | 13382 | if (eh->dyn_relocs != NULL |
5e681ec4 | 13383 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 AM |
13384 | { |
13385 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) | |
0bdcacaf | 13386 | eh->dyn_relocs = NULL; |
22d606e9 AM |
13387 | |
13388 | /* Make sure undefined weak symbols are output as a dynamic | |
13389 | symbol in PIEs. */ | |
13390 | else if (h->dynindx == -1 | |
13391 | && !h->forced_local) | |
13392 | { | |
13393 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
13394 | return FALSE; | |
13395 | } | |
13396 | } | |
13397 | ||
67687978 PB |
13398 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
13399 | && h->root.type == bfd_link_hash_new) | |
13400 | { | |
13401 | /* Output absolute symbols so that we can create relocations | |
13402 | against them. For normal symbols we output a relocation | |
13403 | against the section that contains them. */ | |
13404 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
13405 | return FALSE; | |
13406 | } | |
13407 | ||
5e681ec4 PB |
13408 | } |
13409 | else | |
13410 | { | |
13411 | /* For the non-shared case, discard space for relocs against | |
13412 | symbols which turn out to need copy relocs or are not | |
13413 | dynamic. */ | |
13414 | ||
f5385ebf AM |
13415 | if (!h->non_got_ref |
13416 | && ((h->def_dynamic | |
13417 | && !h->def_regular) | |
5e681ec4 PB |
13418 | || (htab->root.dynamic_sections_created |
13419 | && (h->root.type == bfd_link_hash_undefweak | |
13420 | || h->root.type == bfd_link_hash_undefined)))) | |
13421 | { | |
13422 | /* Make sure this symbol is output as a dynamic symbol. | |
13423 | Undefined weak syms won't yet be marked as dynamic. */ | |
13424 | if (h->dynindx == -1 | |
f5385ebf | 13425 | && !h->forced_local) |
5e681ec4 | 13426 | { |
c152c796 | 13427 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
13428 | return FALSE; |
13429 | } | |
13430 | ||
13431 | /* If that succeeded, we know we'll be keeping all the | |
13432 | relocs. */ | |
13433 | if (h->dynindx != -1) | |
13434 | goto keep; | |
13435 | } | |
13436 | ||
0bdcacaf | 13437 | eh->dyn_relocs = NULL; |
5e681ec4 PB |
13438 | |
13439 | keep: ; | |
13440 | } | |
13441 | ||
13442 | /* Finally, allocate space. */ | |
0bdcacaf | 13443 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
5e681ec4 | 13444 | { |
0bdcacaf | 13445 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
34e77a92 RS |
13446 | if (h->type == STT_GNU_IFUNC |
13447 | && eh->plt.noncall_refcount == 0 | |
13448 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
13449 | elf32_arm_allocate_irelocs (info, sreloc, p->count); | |
13450 | else | |
13451 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
5e681ec4 PB |
13452 | } |
13453 | ||
13454 | return TRUE; | |
13455 | } | |
13456 | ||
08d1f311 DJ |
13457 | /* Find any dynamic relocs that apply to read-only sections. */ |
13458 | ||
13459 | static bfd_boolean | |
8029a119 | 13460 | elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) |
08d1f311 | 13461 | { |
8029a119 | 13462 | struct elf32_arm_link_hash_entry * eh; |
0bdcacaf | 13463 | struct elf_dyn_relocs * p; |
08d1f311 | 13464 | |
08d1f311 | 13465 | eh = (struct elf32_arm_link_hash_entry *) h; |
0bdcacaf | 13466 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
08d1f311 | 13467 | { |
0bdcacaf | 13468 | asection *s = p->sec; |
08d1f311 DJ |
13469 | |
13470 | if (s != NULL && (s->flags & SEC_READONLY) != 0) | |
13471 | { | |
13472 | struct bfd_link_info *info = (struct bfd_link_info *) inf; | |
13473 | ||
13474 | info->flags |= DF_TEXTREL; | |
13475 | ||
13476 | /* Not an error, just cut short the traversal. */ | |
13477 | return FALSE; | |
13478 | } | |
13479 | } | |
13480 | return TRUE; | |
13481 | } | |
13482 | ||
d504ffc8 DJ |
13483 | void |
13484 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
13485 | int byteswap_code) | |
13486 | { | |
13487 | struct elf32_arm_link_hash_table *globals; | |
13488 | ||
13489 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
13490 | if (globals == NULL) |
13491 | return; | |
13492 | ||
d504ffc8 DJ |
13493 | globals->byteswap_code = byteswap_code; |
13494 | } | |
13495 | ||
252b5132 RH |
13496 | /* Set the sizes of the dynamic sections. */ |
13497 | ||
b34976b6 | 13498 | static bfd_boolean |
57e8b36a NC |
13499 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
13500 | struct bfd_link_info * info) | |
252b5132 RH |
13501 | { |
13502 | bfd * dynobj; | |
13503 | asection * s; | |
b34976b6 AM |
13504 | bfd_boolean plt; |
13505 | bfd_boolean relocs; | |
5e681ec4 PB |
13506 | bfd *ibfd; |
13507 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 13508 | |
5e681ec4 | 13509 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13510 | if (htab == NULL) |
13511 | return FALSE; | |
13512 | ||
252b5132 RH |
13513 | dynobj = elf_hash_table (info)->dynobj; |
13514 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 13515 | check_use_blx (htab); |
252b5132 RH |
13516 | |
13517 | if (elf_hash_table (info)->dynamic_sections_created) | |
13518 | { | |
13519 | /* Set the contents of the .interp section to the interpreter. */ | |
893c4fe2 | 13520 | if (info->executable) |
252b5132 | 13521 | { |
3d4d4302 | 13522 | s = bfd_get_linker_section (dynobj, ".interp"); |
252b5132 | 13523 | BFD_ASSERT (s != NULL); |
eea6121a | 13524 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
13525 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
13526 | } | |
13527 | } | |
5e681ec4 PB |
13528 | |
13529 | /* Set up .got offsets for local syms, and space for local dynamic | |
13530 | relocs. */ | |
13531 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) | |
252b5132 | 13532 | { |
5e681ec4 PB |
13533 | bfd_signed_vma *local_got; |
13534 | bfd_signed_vma *end_local_got; | |
34e77a92 | 13535 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
5e681ec4 | 13536 | char *local_tls_type; |
0855e32b | 13537 | bfd_vma *local_tlsdesc_gotent; |
5e681ec4 PB |
13538 | bfd_size_type locsymcount; |
13539 | Elf_Internal_Shdr *symtab_hdr; | |
13540 | asection *srel; | |
4dfe6ac6 | 13541 | bfd_boolean is_vxworks = htab->vxworks_p; |
34e77a92 | 13542 | unsigned int symndx; |
5e681ec4 | 13543 | |
0ffa91dd | 13544 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
13545 | continue; |
13546 | ||
13547 | for (s = ibfd->sections; s != NULL; s = s->next) | |
13548 | { | |
0bdcacaf | 13549 | struct elf_dyn_relocs *p; |
5e681ec4 | 13550 | |
0bdcacaf | 13551 | for (p = (struct elf_dyn_relocs *) |
21d799b5 | 13552 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
5e681ec4 | 13553 | { |
0bdcacaf RS |
13554 | if (!bfd_is_abs_section (p->sec) |
13555 | && bfd_is_abs_section (p->sec->output_section)) | |
5e681ec4 PB |
13556 | { |
13557 | /* Input section has been discarded, either because | |
13558 | it is a copy of a linkonce section or due to | |
13559 | linker script /DISCARD/, so we'll be discarding | |
13560 | the relocs too. */ | |
13561 | } | |
3348747a | 13562 | else if (is_vxworks |
0bdcacaf | 13563 | && strcmp (p->sec->output_section->name, |
3348747a NS |
13564 | ".tls_vars") == 0) |
13565 | { | |
13566 | /* Relocations in vxworks .tls_vars sections are | |
13567 | handled specially by the loader. */ | |
13568 | } | |
5e681ec4 PB |
13569 | else if (p->count != 0) |
13570 | { | |
0bdcacaf | 13571 | srel = elf_section_data (p->sec)->sreloc; |
47beaa6a | 13572 | elf32_arm_allocate_dynrelocs (info, srel, p->count); |
0bdcacaf | 13573 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
5e681ec4 PB |
13574 | info->flags |= DF_TEXTREL; |
13575 | } | |
13576 | } | |
13577 | } | |
13578 | ||
13579 | local_got = elf_local_got_refcounts (ibfd); | |
13580 | if (!local_got) | |
13581 | continue; | |
13582 | ||
0ffa91dd | 13583 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
13584 | locsymcount = symtab_hdr->sh_info; |
13585 | end_local_got = local_got + locsymcount; | |
34e77a92 | 13586 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
ba93b8ac | 13587 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
0855e32b | 13588 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
34e77a92 | 13589 | symndx = 0; |
362d30a1 RS |
13590 | s = htab->root.sgot; |
13591 | srel = htab->root.srelgot; | |
0855e32b | 13592 | for (; local_got < end_local_got; |
34e77a92 RS |
13593 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
13594 | ++local_tlsdesc_gotent, ++symndx) | |
5e681ec4 | 13595 | { |
0855e32b | 13596 | *local_tlsdesc_gotent = (bfd_vma) -1; |
34e77a92 RS |
13597 | local_iplt = *local_iplt_ptr; |
13598 | if (local_iplt != NULL) | |
13599 | { | |
13600 | struct elf_dyn_relocs *p; | |
13601 | ||
13602 | if (local_iplt->root.refcount > 0) | |
13603 | { | |
13604 | elf32_arm_allocate_plt_entry (info, TRUE, | |
13605 | &local_iplt->root, | |
13606 | &local_iplt->arm); | |
13607 | if (local_iplt->arm.noncall_refcount == 0) | |
13608 | /* All references to the PLT are calls, so all | |
13609 | non-call references can resolve directly to the | |
13610 | run-time target. This means that the .got entry | |
13611 | would be the same as the .igot.plt entry, so there's | |
13612 | no point creating both. */ | |
13613 | *local_got = 0; | |
13614 | } | |
13615 | else | |
13616 | { | |
13617 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); | |
13618 | local_iplt->root.offset = (bfd_vma) -1; | |
13619 | } | |
13620 | ||
13621 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) | |
13622 | { | |
13623 | asection *psrel; | |
13624 | ||
13625 | psrel = elf_section_data (p->sec)->sreloc; | |
13626 | if (local_iplt->arm.noncall_refcount == 0) | |
13627 | elf32_arm_allocate_irelocs (info, psrel, p->count); | |
13628 | else | |
13629 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); | |
13630 | } | |
13631 | } | |
5e681ec4 PB |
13632 | if (*local_got > 0) |
13633 | { | |
34e77a92 RS |
13634 | Elf_Internal_Sym *isym; |
13635 | ||
eea6121a | 13636 | *local_got = s->size; |
ba93b8ac DJ |
13637 | if (*local_tls_type & GOT_TLS_GD) |
13638 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
13639 | s->size += 8; | |
0855e32b NS |
13640 | if (*local_tls_type & GOT_TLS_GDESC) |
13641 | { | |
13642 | *local_tlsdesc_gotent = htab->root.sgotplt->size | |
13643 | - elf32_arm_compute_jump_table_size (htab); | |
13644 | htab->root.sgotplt->size += 8; | |
13645 | *local_got = (bfd_vma) -2; | |
34e77a92 | 13646 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b NS |
13647 | reloc in the middle of .got.plt. */ |
13648 | htab->num_tls_desc++; | |
13649 | } | |
ba93b8ac DJ |
13650 | if (*local_tls_type & GOT_TLS_IE) |
13651 | s->size += 4; | |
ba93b8ac | 13652 | |
0855e32b NS |
13653 | if (*local_tls_type & GOT_NORMAL) |
13654 | { | |
13655 | /* If the symbol is both GD and GDESC, *local_got | |
13656 | may have been overwritten. */ | |
13657 | *local_got = s->size; | |
13658 | s->size += 4; | |
13659 | } | |
13660 | ||
34e77a92 RS |
13661 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); |
13662 | if (isym == NULL) | |
13663 | return FALSE; | |
13664 | ||
13665 | /* If all references to an STT_GNU_IFUNC PLT are calls, | |
13666 | then all non-call references, including this GOT entry, | |
13667 | resolve directly to the run-time target. */ | |
13668 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC | |
13669 | && (local_iplt == NULL | |
13670 | || local_iplt->arm.noncall_refcount == 0)) | |
13671 | elf32_arm_allocate_irelocs (info, srel, 1); | |
3064e1ff | 13672 | else if (info->shared || output_bfd->flags & DYNAMIC) |
0855e32b | 13673 | { |
3064e1ff JB |
13674 | if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC)) |
13675 | || *local_tls_type & GOT_TLS_GD) | |
13676 | elf32_arm_allocate_dynrelocs (info, srel, 1); | |
13677 | ||
13678 | if (info->shared && *local_tls_type & GOT_TLS_GDESC) | |
13679 | { | |
13680 | elf32_arm_allocate_dynrelocs (info, | |
13681 | htab->root.srelplt, 1); | |
13682 | htab->tls_trampoline = -1; | |
13683 | } | |
0855e32b | 13684 | } |
5e681ec4 PB |
13685 | } |
13686 | else | |
13687 | *local_got = (bfd_vma) -1; | |
13688 | } | |
252b5132 RH |
13689 | } |
13690 | ||
ba93b8ac DJ |
13691 | if (htab->tls_ldm_got.refcount > 0) |
13692 | { | |
13693 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
13694 | for R_ARM_TLS_LDM32 relocations. */ | |
362d30a1 RS |
13695 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
13696 | htab->root.sgot->size += 8; | |
ba93b8ac | 13697 | if (info->shared) |
47beaa6a | 13698 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
13699 | } |
13700 | else | |
13701 | htab->tls_ldm_got.offset = -1; | |
13702 | ||
5e681ec4 PB |
13703 | /* Allocate global sym .plt and .got entries, and space for global |
13704 | sym dynamic relocs. */ | |
47beaa6a | 13705 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
252b5132 | 13706 | |
d504ffc8 DJ |
13707 | /* Here we rummage through the found bfds to collect glue information. */ |
13708 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) | |
c7b8f16e | 13709 | { |
0ffa91dd | 13710 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
13711 | continue; |
13712 | ||
c7b8f16e JB |
13713 | /* Initialise mapping tables for code/data. */ |
13714 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 13715 | |
c7b8f16e JB |
13716 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
13717 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)) | |
13718 | /* xgettext:c-format */ | |
13719 | _bfd_error_handler (_("Errors encountered processing file %s"), | |
13720 | ibfd->filename); | |
13721 | } | |
d504ffc8 | 13722 | |
3e6b1042 DJ |
13723 | /* Allocate space for the glue sections now that we've sized them. */ |
13724 | bfd_elf32_arm_allocate_interworking_sections (info); | |
13725 | ||
0855e32b NS |
13726 | /* For every jump slot reserved in the sgotplt, reloc_count is |
13727 | incremented. However, when we reserve space for TLS descriptors, | |
13728 | it's not incremented, so in order to compute the space reserved | |
13729 | for them, it suffices to multiply the reloc count by the jump | |
13730 | slot size. */ | |
13731 | if (htab->root.srelplt) | |
13732 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab); | |
13733 | ||
13734 | if (htab->tls_trampoline) | |
13735 | { | |
13736 | if (htab->root.splt->size == 0) | |
13737 | htab->root.splt->size += htab->plt_header_size; | |
b38cadfb | 13738 | |
0855e32b NS |
13739 | htab->tls_trampoline = htab->root.splt->size; |
13740 | htab->root.splt->size += htab->plt_entry_size; | |
b38cadfb | 13741 | |
0855e32b NS |
13742 | /* If we're not using lazy TLS relocations, don't generate the |
13743 | PLT and GOT entries they require. */ | |
13744 | if (!(info->flags & DF_BIND_NOW)) | |
13745 | { | |
13746 | htab->dt_tlsdesc_got = htab->root.sgot->size; | |
13747 | htab->root.sgot->size += 4; | |
13748 | ||
13749 | htab->dt_tlsdesc_plt = htab->root.splt->size; | |
13750 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); | |
13751 | } | |
13752 | } | |
13753 | ||
252b5132 RH |
13754 | /* The check_relocs and adjust_dynamic_symbol entry points have |
13755 | determined the sizes of the various dynamic sections. Allocate | |
13756 | memory for them. */ | |
b34976b6 AM |
13757 | plt = FALSE; |
13758 | relocs = FALSE; | |
252b5132 RH |
13759 | for (s = dynobj->sections; s != NULL; s = s->next) |
13760 | { | |
13761 | const char * name; | |
252b5132 RH |
13762 | |
13763 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
13764 | continue; | |
13765 | ||
13766 | /* It's OK to base decisions on the section name, because none | |
13767 | of the dynobj section names depend upon the input files. */ | |
13768 | name = bfd_get_section_name (dynobj, s); | |
13769 | ||
34e77a92 | 13770 | if (s == htab->root.splt) |
252b5132 | 13771 | { |
c456f082 AM |
13772 | /* Remember whether there is a PLT. */ |
13773 | plt = s->size != 0; | |
252b5132 | 13774 | } |
0112cd26 | 13775 | else if (CONST_STRNEQ (name, ".rel")) |
252b5132 | 13776 | { |
c456f082 | 13777 | if (s->size != 0) |
252b5132 | 13778 | { |
252b5132 | 13779 | /* Remember whether there are any reloc sections other |
00a97672 | 13780 | than .rel(a).plt and .rela.plt.unloaded. */ |
362d30a1 | 13781 | if (s != htab->root.srelplt && s != htab->srelplt2) |
b34976b6 | 13782 | relocs = TRUE; |
252b5132 RH |
13783 | |
13784 | /* We use the reloc_count field as a counter if we need | |
13785 | to copy relocs into the output file. */ | |
13786 | s->reloc_count = 0; | |
13787 | } | |
13788 | } | |
34e77a92 RS |
13789 | else if (s != htab->root.sgot |
13790 | && s != htab->root.sgotplt | |
13791 | && s != htab->root.iplt | |
13792 | && s != htab->root.igotplt | |
13793 | && s != htab->sdynbss) | |
252b5132 RH |
13794 | { |
13795 | /* It's not one of our sections, so don't allocate space. */ | |
13796 | continue; | |
13797 | } | |
13798 | ||
c456f082 | 13799 | if (s->size == 0) |
252b5132 | 13800 | { |
c456f082 | 13801 | /* If we don't need this section, strip it from the |
00a97672 RS |
13802 | output file. This is mostly to handle .rel(a).bss and |
13803 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
13804 | create_dynamic_sections, because they must be created |
13805 | before the linker maps input sections to output | |
13806 | sections. The linker does that before | |
13807 | adjust_dynamic_symbol is called, and it is that | |
13808 | function which decides whether anything needs to go | |
13809 | into these sections. */ | |
8423293d | 13810 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
13811 | continue; |
13812 | } | |
13813 | ||
c456f082 AM |
13814 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
13815 | continue; | |
13816 | ||
252b5132 | 13817 | /* Allocate memory for the section contents. */ |
21d799b5 | 13818 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 13819 | if (s->contents == NULL) |
b34976b6 | 13820 | return FALSE; |
252b5132 RH |
13821 | } |
13822 | ||
13823 | if (elf_hash_table (info)->dynamic_sections_created) | |
13824 | { | |
13825 | /* Add some entries to the .dynamic section. We fill in the | |
13826 | values later, in elf32_arm_finish_dynamic_sections, but we | |
13827 | must add the entries now so that we get the correct size for | |
13828 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
13829 | dynamic linker and used by the debugger. */ | |
dc810e39 | 13830 | #define add_dynamic_entry(TAG, VAL) \ |
5a580b3a | 13831 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
dc810e39 | 13832 | |
8532796c | 13833 | if (info->executable) |
252b5132 | 13834 | { |
dc810e39 | 13835 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
b34976b6 | 13836 | return FALSE; |
252b5132 RH |
13837 | } |
13838 | ||
13839 | if (plt) | |
13840 | { | |
dc810e39 AM |
13841 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
13842 | || !add_dynamic_entry (DT_PLTRELSZ, 0) | |
00a97672 RS |
13843 | || !add_dynamic_entry (DT_PLTREL, |
13844 | htab->use_rel ? DT_REL : DT_RELA) | |
dc810e39 | 13845 | || !add_dynamic_entry (DT_JMPREL, 0)) |
b34976b6 | 13846 | return FALSE; |
0855e32b NS |
13847 | |
13848 | if (htab->dt_tlsdesc_plt && | |
b38cadfb | 13849 | (!add_dynamic_entry (DT_TLSDESC_PLT,0) |
0855e32b | 13850 | || !add_dynamic_entry (DT_TLSDESC_GOT,0))) |
b38cadfb | 13851 | return FALSE; |
252b5132 RH |
13852 | } |
13853 | ||
13854 | if (relocs) | |
13855 | { | |
00a97672 RS |
13856 | if (htab->use_rel) |
13857 | { | |
13858 | if (!add_dynamic_entry (DT_REL, 0) | |
13859 | || !add_dynamic_entry (DT_RELSZ, 0) | |
13860 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) | |
13861 | return FALSE; | |
13862 | } | |
13863 | else | |
13864 | { | |
13865 | if (!add_dynamic_entry (DT_RELA, 0) | |
13866 | || !add_dynamic_entry (DT_RELASZ, 0) | |
13867 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) | |
13868 | return FALSE; | |
13869 | } | |
252b5132 RH |
13870 | } |
13871 | ||
08d1f311 DJ |
13872 | /* If any dynamic relocs apply to a read-only section, |
13873 | then we need a DT_TEXTREL entry. */ | |
13874 | if ((info->flags & DF_TEXTREL) == 0) | |
8029a119 NC |
13875 | elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs, |
13876 | info); | |
08d1f311 | 13877 | |
99e4ae17 | 13878 | if ((info->flags & DF_TEXTREL) != 0) |
252b5132 | 13879 | { |
dc810e39 | 13880 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
b34976b6 | 13881 | return FALSE; |
252b5132 | 13882 | } |
7a2b07ff NS |
13883 | if (htab->vxworks_p |
13884 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) | |
13885 | return FALSE; | |
252b5132 | 13886 | } |
8532796c | 13887 | #undef add_dynamic_entry |
252b5132 | 13888 | |
b34976b6 | 13889 | return TRUE; |
252b5132 RH |
13890 | } |
13891 | ||
0855e32b NS |
13892 | /* Size sections even though they're not dynamic. We use it to setup |
13893 | _TLS_MODULE_BASE_, if needed. */ | |
13894 | ||
13895 | static bfd_boolean | |
13896 | elf32_arm_always_size_sections (bfd *output_bfd, | |
13897 | struct bfd_link_info *info) | |
13898 | { | |
13899 | asection *tls_sec; | |
13900 | ||
13901 | if (info->relocatable) | |
13902 | return TRUE; | |
13903 | ||
13904 | tls_sec = elf_hash_table (info)->tls_sec; | |
13905 | ||
13906 | if (tls_sec) | |
13907 | { | |
13908 | struct elf_link_hash_entry *tlsbase; | |
13909 | ||
13910 | tlsbase = elf_link_hash_lookup | |
13911 | (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE); | |
13912 | ||
13913 | if (tlsbase) | |
13914 | { | |
13915 | struct bfd_link_hash_entry *bh = NULL; | |
13916 | const struct elf_backend_data *bed | |
13917 | = get_elf_backend_data (output_bfd); | |
13918 | ||
13919 | if (!(_bfd_generic_link_add_one_symbol | |
13920 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, | |
13921 | tls_sec, 0, NULL, FALSE, | |
13922 | bed->collect, &bh))) | |
13923 | return FALSE; | |
b38cadfb | 13924 | |
0855e32b NS |
13925 | tlsbase->type = STT_TLS; |
13926 | tlsbase = (struct elf_link_hash_entry *)bh; | |
13927 | tlsbase->def_regular = 1; | |
13928 | tlsbase->other = STV_HIDDEN; | |
13929 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); | |
13930 | } | |
13931 | } | |
13932 | return TRUE; | |
13933 | } | |
13934 | ||
252b5132 RH |
13935 | /* Finish up dynamic symbol handling. We set the contents of various |
13936 | dynamic sections here. */ | |
13937 | ||
b34976b6 | 13938 | static bfd_boolean |
906e58ca NC |
13939 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
13940 | struct bfd_link_info * info, | |
13941 | struct elf_link_hash_entry * h, | |
13942 | Elf_Internal_Sym * sym) | |
252b5132 | 13943 | { |
e5a52504 | 13944 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 13945 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 13946 | |
e5a52504 | 13947 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13948 | if (htab == NULL) |
13949 | return FALSE; | |
13950 | ||
b7693d02 | 13951 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
13952 | |
13953 | if (h->plt.offset != (bfd_vma) -1) | |
13954 | { | |
34e77a92 | 13955 | if (!eh->is_iplt) |
e5a52504 | 13956 | { |
34e77a92 RS |
13957 | BFD_ASSERT (h->dynindx != -1); |
13958 | elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, | |
13959 | h->dynindx, 0); | |
e5a52504 | 13960 | } |
57e8b36a | 13961 | |
f5385ebf | 13962 | if (!h->def_regular) |
252b5132 RH |
13963 | { |
13964 | /* Mark the symbol as undefined, rather than as defined in | |
13965 | the .plt section. Leave the value alone. */ | |
13966 | sym->st_shndx = SHN_UNDEF; | |
d982ba73 PB |
13967 | /* If the symbol is weak, we do need to clear the value. |
13968 | Otherwise, the PLT entry would provide a definition for | |
13969 | the symbol even if the symbol wasn't defined anywhere, | |
13970 | and so the symbol would never be NULL. */ | |
f5385ebf | 13971 | if (!h->ref_regular_nonweak) |
d982ba73 | 13972 | sym->st_value = 0; |
252b5132 | 13973 | } |
34e77a92 RS |
13974 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
13975 | { | |
13976 | /* At least one non-call relocation references this .iplt entry, | |
13977 | so the .iplt entry is the function's canonical address. */ | |
13978 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); | |
13979 | sym->st_target_internal = ST_BRANCH_TO_ARM; | |
13980 | sym->st_shndx = (_bfd_elf_section_from_bfd_section | |
13981 | (output_bfd, htab->root.iplt->output_section)); | |
13982 | sym->st_value = (h->plt.offset | |
13983 | + htab->root.iplt->output_section->vma | |
13984 | + htab->root.iplt->output_offset); | |
13985 | } | |
252b5132 RH |
13986 | } |
13987 | ||
f5385ebf | 13988 | if (h->needs_copy) |
252b5132 RH |
13989 | { |
13990 | asection * s; | |
947216bf | 13991 | Elf_Internal_Rela rel; |
252b5132 RH |
13992 | |
13993 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
13994 | BFD_ASSERT (h->dynindx != -1 |
13995 | && (h->root.type == bfd_link_hash_defined | |
13996 | || h->root.type == bfd_link_hash_defweak)); | |
13997 | ||
362d30a1 | 13998 | s = htab->srelbss; |
252b5132 RH |
13999 | BFD_ASSERT (s != NULL); |
14000 | ||
00a97672 | 14001 | rel.r_addend = 0; |
252b5132 RH |
14002 | rel.r_offset = (h->root.u.def.value |
14003 | + h->root.u.def.section->output_section->vma | |
14004 | + h->root.u.def.section->output_offset); | |
14005 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
47beaa6a | 14006 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
252b5132 RH |
14007 | } |
14008 | ||
00a97672 RS |
14009 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
14010 | the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative | |
14011 | to the ".got" section. */ | |
9637f6ef | 14012 | if (h == htab->root.hdynamic |
00a97672 | 14013 | || (!htab->vxworks_p && h == htab->root.hgot)) |
252b5132 RH |
14014 | sym->st_shndx = SHN_ABS; |
14015 | ||
b34976b6 | 14016 | return TRUE; |
252b5132 RH |
14017 | } |
14018 | ||
0855e32b NS |
14019 | static void |
14020 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
14021 | void *contents, | |
14022 | const unsigned long *template, unsigned count) | |
14023 | { | |
14024 | unsigned ix; | |
b38cadfb | 14025 | |
0855e32b NS |
14026 | for (ix = 0; ix != count; ix++) |
14027 | { | |
14028 | unsigned long insn = template[ix]; | |
14029 | ||
14030 | /* Emit mov pc,rx if bx is not permitted. */ | |
14031 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) | |
14032 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
14033 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); | |
14034 | } | |
14035 | } | |
14036 | ||
252b5132 RH |
14037 | /* Finish up the dynamic sections. */ |
14038 | ||
b34976b6 | 14039 | static bfd_boolean |
57e8b36a | 14040 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
14041 | { |
14042 | bfd * dynobj; | |
14043 | asection * sgot; | |
14044 | asection * sdyn; | |
4dfe6ac6 NC |
14045 | struct elf32_arm_link_hash_table *htab; |
14046 | ||
14047 | htab = elf32_arm_hash_table (info); | |
14048 | if (htab == NULL) | |
14049 | return FALSE; | |
252b5132 RH |
14050 | |
14051 | dynobj = elf_hash_table (info)->dynobj; | |
14052 | ||
362d30a1 | 14053 | sgot = htab->root.sgotplt; |
894891db NC |
14054 | /* A broken linker script might have discarded the dynamic sections. |
14055 | Catch this here so that we do not seg-fault later on. */ | |
14056 | if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) | |
14057 | return FALSE; | |
3d4d4302 | 14058 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
252b5132 RH |
14059 | |
14060 | if (elf_hash_table (info)->dynamic_sections_created) | |
14061 | { | |
14062 | asection *splt; | |
14063 | Elf32_External_Dyn *dyncon, *dynconend; | |
14064 | ||
362d30a1 | 14065 | splt = htab->root.splt; |
24a1ba0f | 14066 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
cbc704f3 | 14067 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
252b5132 RH |
14068 | |
14069 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 14070 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 14071 | |
252b5132 RH |
14072 | for (; dyncon < dynconend; dyncon++) |
14073 | { | |
14074 | Elf_Internal_Dyn dyn; | |
14075 | const char * name; | |
14076 | asection * s; | |
14077 | ||
14078 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
14079 | ||
14080 | switch (dyn.d_tag) | |
14081 | { | |
229fcec5 MM |
14082 | unsigned int type; |
14083 | ||
252b5132 | 14084 | default: |
7a2b07ff NS |
14085 | if (htab->vxworks_p |
14086 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) | |
14087 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
14088 | break; |
14089 | ||
229fcec5 MM |
14090 | case DT_HASH: |
14091 | name = ".hash"; | |
14092 | goto get_vma_if_bpabi; | |
14093 | case DT_STRTAB: | |
14094 | name = ".dynstr"; | |
14095 | goto get_vma_if_bpabi; | |
14096 | case DT_SYMTAB: | |
14097 | name = ".dynsym"; | |
14098 | goto get_vma_if_bpabi; | |
c0042f5d MM |
14099 | case DT_VERSYM: |
14100 | name = ".gnu.version"; | |
14101 | goto get_vma_if_bpabi; | |
14102 | case DT_VERDEF: | |
14103 | name = ".gnu.version_d"; | |
14104 | goto get_vma_if_bpabi; | |
14105 | case DT_VERNEED: | |
14106 | name = ".gnu.version_r"; | |
14107 | goto get_vma_if_bpabi; | |
14108 | ||
252b5132 RH |
14109 | case DT_PLTGOT: |
14110 | name = ".got"; | |
14111 | goto get_vma; | |
14112 | case DT_JMPREL: | |
00a97672 | 14113 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 RH |
14114 | get_vma: |
14115 | s = bfd_get_section_by_name (output_bfd, name); | |
05456594 NC |
14116 | if (s == NULL) |
14117 | { | |
14118 | /* PR ld/14397: Issue an error message if a required section is missing. */ | |
14119 | (*_bfd_error_handler) | |
14120 | (_("error: required section '%s' not found in the linker script"), name); | |
14121 | bfd_set_error (bfd_error_invalid_operation); | |
14122 | return FALSE; | |
14123 | } | |
229fcec5 MM |
14124 | if (!htab->symbian_p) |
14125 | dyn.d_un.d_ptr = s->vma; | |
14126 | else | |
14127 | /* In the BPABI, tags in the PT_DYNAMIC section point | |
14128 | at the file offset, not the memory address, for the | |
14129 | convenience of the post linker. */ | |
14130 | dyn.d_un.d_ptr = s->filepos; | |
252b5132 RH |
14131 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
14132 | break; | |
14133 | ||
229fcec5 MM |
14134 | get_vma_if_bpabi: |
14135 | if (htab->symbian_p) | |
14136 | goto get_vma; | |
14137 | break; | |
14138 | ||
252b5132 | 14139 | case DT_PLTRELSZ: |
362d30a1 | 14140 | s = htab->root.srelplt; |
252b5132 | 14141 | BFD_ASSERT (s != NULL); |
eea6121a | 14142 | dyn.d_un.d_val = s->size; |
252b5132 RH |
14143 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
14144 | break; | |
906e58ca | 14145 | |
252b5132 | 14146 | case DT_RELSZ: |
00a97672 | 14147 | case DT_RELASZ: |
229fcec5 MM |
14148 | if (!htab->symbian_p) |
14149 | { | |
14150 | /* My reading of the SVR4 ABI indicates that the | |
14151 | procedure linkage table relocs (DT_JMPREL) should be | |
14152 | included in the overall relocs (DT_REL). This is | |
14153 | what Solaris does. However, UnixWare can not handle | |
14154 | that case. Therefore, we override the DT_RELSZ entry | |
14155 | here to make it not include the JMPREL relocs. Since | |
00a97672 | 14156 | the linker script arranges for .rel(a).plt to follow all |
229fcec5 MM |
14157 | other relocation sections, we don't have to worry |
14158 | about changing the DT_REL entry. */ | |
362d30a1 | 14159 | s = htab->root.srelplt; |
229fcec5 MM |
14160 | if (s != NULL) |
14161 | dyn.d_un.d_val -= s->size; | |
14162 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
14163 | break; | |
14164 | } | |
8029a119 | 14165 | /* Fall through. */ |
229fcec5 MM |
14166 | |
14167 | case DT_REL: | |
14168 | case DT_RELA: | |
229fcec5 MM |
14169 | /* In the BPABI, the DT_REL tag must point at the file |
14170 | offset, not the VMA, of the first relocation | |
14171 | section. So, we use code similar to that in | |
14172 | elflink.c, but do not check for SHF_ALLOC on the | |
14173 | relcoation section, since relocations sections are | |
14174 | never allocated under the BPABI. The comments above | |
14175 | about Unixware notwithstanding, we include all of the | |
14176 | relocations here. */ | |
14177 | if (htab->symbian_p) | |
14178 | { | |
14179 | unsigned int i; | |
14180 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) | |
14181 | ? SHT_REL : SHT_RELA); | |
14182 | dyn.d_un.d_val = 0; | |
14183 | for (i = 1; i < elf_numsections (output_bfd); i++) | |
14184 | { | |
906e58ca | 14185 | Elf_Internal_Shdr *hdr |
229fcec5 MM |
14186 | = elf_elfsections (output_bfd)[i]; |
14187 | if (hdr->sh_type == type) | |
14188 | { | |
906e58ca | 14189 | if (dyn.d_tag == DT_RELSZ |
229fcec5 MM |
14190 | || dyn.d_tag == DT_RELASZ) |
14191 | dyn.d_un.d_val += hdr->sh_size; | |
de52dba4 AM |
14192 | else if ((ufile_ptr) hdr->sh_offset |
14193 | <= dyn.d_un.d_val - 1) | |
229fcec5 MM |
14194 | dyn.d_un.d_val = hdr->sh_offset; |
14195 | } | |
14196 | } | |
14197 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
14198 | } | |
252b5132 | 14199 | break; |
88f7bcd5 | 14200 | |
0855e32b NS |
14201 | case DT_TLSDESC_PLT: |
14202 | s = htab->root.splt; | |
14203 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset | |
14204 | + htab->dt_tlsdesc_plt); | |
14205 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
14206 | break; | |
14207 | ||
14208 | case DT_TLSDESC_GOT: | |
14209 | s = htab->root.sgot; | |
14210 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset | |
14211 | + htab->dt_tlsdesc_got); | |
14212 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
14213 | break; | |
14214 | ||
88f7bcd5 NC |
14215 | /* Set the bottom bit of DT_INIT/FINI if the |
14216 | corresponding function is Thumb. */ | |
14217 | case DT_INIT: | |
14218 | name = info->init_function; | |
14219 | goto get_sym; | |
14220 | case DT_FINI: | |
14221 | name = info->fini_function; | |
14222 | get_sym: | |
14223 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 14224 | then there is nothing to adjust. */ |
88f7bcd5 NC |
14225 | if (dyn.d_un.d_val != 0) |
14226 | { | |
14227 | struct elf_link_hash_entry * eh; | |
14228 | ||
14229 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
b34976b6 | 14230 | FALSE, FALSE, TRUE); |
35fc36a8 | 14231 | if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB) |
88f7bcd5 NC |
14232 | { |
14233 | dyn.d_un.d_val |= 1; | |
b34976b6 | 14234 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
14235 | } |
14236 | } | |
14237 | break; | |
252b5132 RH |
14238 | } |
14239 | } | |
14240 | ||
24a1ba0f | 14241 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 14242 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 14243 | { |
00a97672 RS |
14244 | const bfd_vma *plt0_entry; |
14245 | bfd_vma got_address, plt_address, got_displacement; | |
14246 | ||
14247 | /* Calculate the addresses of the GOT and PLT. */ | |
14248 | got_address = sgot->output_section->vma + sgot->output_offset; | |
14249 | plt_address = splt->output_section->vma + splt->output_offset; | |
14250 | ||
14251 | if (htab->vxworks_p) | |
14252 | { | |
14253 | /* The VxWorks GOT is relocated by the dynamic linker. | |
14254 | Therefore, we must emit relocations rather than simply | |
14255 | computing the values now. */ | |
14256 | Elf_Internal_Rela rel; | |
14257 | ||
14258 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
14259 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
14260 | splt->contents + 0); | |
14261 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
14262 | splt->contents + 4); | |
14263 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
14264 | splt->contents + 8); | |
00a97672 RS |
14265 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
14266 | ||
8029a119 | 14267 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
14268 | rel.r_offset = plt_address + 12; |
14269 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
14270 | rel.r_addend = 0; | |
14271 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
14272 | htab->srelplt2->contents); | |
14273 | } | |
b38cadfb NC |
14274 | else if (htab->nacl_p) |
14275 | { | |
14276 | unsigned int i; | |
14277 | ||
14278 | got_displacement = got_address + 8 - (plt_address + 16); | |
14279 | ||
14280 | put_arm_insn (htab, output_bfd, | |
14281 | elf32_arm_nacl_plt0_entry[0] | |
14282 | | arm_movw_immediate (got_displacement), | |
14283 | splt->contents + 0); | |
14284 | put_arm_insn (htab, output_bfd, | |
14285 | elf32_arm_nacl_plt0_entry[1] | |
14286 | | arm_movt_immediate (got_displacement), | |
14287 | splt->contents + 4); | |
14288 | for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i) | |
14289 | put_arm_insn (htab, output_bfd, | |
14290 | elf32_arm_nacl_plt0_entry[i], | |
14291 | splt->contents + (i * 4)); | |
14292 | } | |
00a97672 RS |
14293 | else |
14294 | { | |
14295 | got_displacement = got_address - (plt_address + 16); | |
14296 | ||
14297 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
14298 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
14299 | splt->contents + 0); | |
14300 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
14301 | splt->contents + 4); | |
14302 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
14303 | splt->contents + 8); | |
14304 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
14305 | splt->contents + 12); | |
5e681ec4 | 14306 | |
5e681ec4 | 14307 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
14308 | /* The displacement value goes in the otherwise-unused |
14309 | last word of the second entry. */ | |
14310 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 14311 | #else |
00a97672 | 14312 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 14313 | #endif |
00a97672 | 14314 | } |
f7a74f8c | 14315 | } |
252b5132 RH |
14316 | |
14317 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
14318 | really seem like the right value. */ | |
74541ad4 AM |
14319 | if (splt->output_section->owner == output_bfd) |
14320 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 | 14321 | |
0855e32b NS |
14322 | if (htab->dt_tlsdesc_plt) |
14323 | { | |
14324 | bfd_vma got_address | |
14325 | = sgot->output_section->vma + sgot->output_offset; | |
14326 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma | |
14327 | + htab->root.sgot->output_offset); | |
14328 | bfd_vma plt_address | |
14329 | = splt->output_section->vma + splt->output_offset; | |
14330 | ||
b38cadfb | 14331 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
14332 | splt->contents + htab->dt_tlsdesc_plt, |
14333 | dl_tlsdesc_lazy_trampoline, 6); | |
14334 | ||
14335 | bfd_put_32 (output_bfd, | |
14336 | gotplt_address + htab->dt_tlsdesc_got | |
14337 | - (plt_address + htab->dt_tlsdesc_plt) | |
14338 | - dl_tlsdesc_lazy_trampoline[6], | |
14339 | splt->contents + htab->dt_tlsdesc_plt + 24); | |
14340 | bfd_put_32 (output_bfd, | |
14341 | got_address - (plt_address + htab->dt_tlsdesc_plt) | |
14342 | - dl_tlsdesc_lazy_trampoline[7], | |
14343 | splt->contents + htab->dt_tlsdesc_plt + 24 + 4); | |
14344 | } | |
14345 | ||
14346 | if (htab->tls_trampoline) | |
14347 | { | |
b38cadfb | 14348 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
14349 | splt->contents + htab->tls_trampoline, |
14350 | tls_trampoline, 3); | |
14351 | #ifdef FOUR_WORD_PLT | |
14352 | bfd_put_32 (output_bfd, 0x00000000, | |
14353 | splt->contents + htab->tls_trampoline + 12); | |
b38cadfb | 14354 | #endif |
0855e32b NS |
14355 | } |
14356 | ||
362d30a1 | 14357 | if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0) |
00a97672 RS |
14358 | { |
14359 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
14360 | incorrect symbol indexes. */ | |
14361 | int num_plts; | |
eed62c48 | 14362 | unsigned char *p; |
00a97672 | 14363 | |
362d30a1 | 14364 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
00a97672 RS |
14365 | / htab->plt_entry_size); |
14366 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
14367 | ||
14368 | for (; num_plts; num_plts--) | |
14369 | { | |
14370 | Elf_Internal_Rela rel; | |
14371 | ||
14372 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
14373 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
14374 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
14375 | p += RELOC_SIZE (htab); | |
14376 | ||
14377 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
14378 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
14379 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
14380 | p += RELOC_SIZE (htab); | |
14381 | } | |
14382 | } | |
252b5132 RH |
14383 | } |
14384 | ||
14385 | /* Fill in the first three entries in the global offset table. */ | |
229fcec5 | 14386 | if (sgot) |
252b5132 | 14387 | { |
229fcec5 MM |
14388 | if (sgot->size > 0) |
14389 | { | |
14390 | if (sdyn == NULL) | |
14391 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
14392 | else | |
14393 | bfd_put_32 (output_bfd, | |
14394 | sdyn->output_section->vma + sdyn->output_offset, | |
14395 | sgot->contents); | |
14396 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
14397 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
14398 | } | |
252b5132 | 14399 | |
229fcec5 MM |
14400 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
14401 | } | |
252b5132 | 14402 | |
b34976b6 | 14403 | return TRUE; |
252b5132 RH |
14404 | } |
14405 | ||
ba96a88f | 14406 | static void |
57e8b36a | 14407 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
ba96a88f | 14408 | { |
9b485d32 | 14409 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 14410 | struct elf32_arm_link_hash_table *globals; |
ba96a88f NC |
14411 | |
14412 | i_ehdrp = elf_elfheader (abfd); | |
14413 | ||
94a3258f PB |
14414 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
14415 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
14416 | else | |
14417 | i_ehdrp->e_ident[EI_OSABI] = 0; | |
ba96a88f | 14418 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 14419 | |
93204d3a PB |
14420 | if (link_info) |
14421 | { | |
14422 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 14423 | if (globals != NULL && globals->byteswap_code) |
93204d3a PB |
14424 | i_ehdrp->e_flags |= EF_ARM_BE8; |
14425 | } | |
3bfcb652 NC |
14426 | |
14427 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5 | |
14428 | && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) | |
14429 | { | |
14430 | int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); | |
14431 | if (abi) | |
14432 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; | |
14433 | else | |
14434 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; | |
14435 | } | |
ba96a88f NC |
14436 | } |
14437 | ||
99e4ae17 | 14438 | static enum elf_reloc_type_class |
7e612e98 AM |
14439 | elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
14440 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
14441 | const Elf_Internal_Rela *rela) | |
99e4ae17 | 14442 | { |
f51e552e | 14443 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
14444 | { |
14445 | case R_ARM_RELATIVE: | |
14446 | return reloc_class_relative; | |
14447 | case R_ARM_JUMP_SLOT: | |
14448 | return reloc_class_plt; | |
14449 | case R_ARM_COPY: | |
14450 | return reloc_class_copy; | |
14451 | default: | |
14452 | return reloc_class_normal; | |
14453 | } | |
14454 | } | |
14455 | ||
e489d0ae | 14456 | static void |
57e8b36a | 14457 | elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) |
e16bb312 | 14458 | { |
5a6c6817 | 14459 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
14460 | } |
14461 | ||
40a18ebd NC |
14462 | /* Return TRUE if this is an unwinding table entry. */ |
14463 | ||
14464 | static bfd_boolean | |
14465 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) | |
14466 | { | |
0112cd26 NC |
14467 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
14468 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
14469 | } |
14470 | ||
14471 | ||
14472 | /* Set the type and flags for an ARM section. We do this by | |
14473 | the section name, which is a hack, but ought to work. */ | |
14474 | ||
14475 | static bfd_boolean | |
14476 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) | |
14477 | { | |
14478 | const char * name; | |
14479 | ||
14480 | name = bfd_get_section_name (abfd, sec); | |
14481 | ||
14482 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
14483 | { | |
14484 | hdr->sh_type = SHT_ARM_EXIDX; | |
14485 | hdr->sh_flags |= SHF_LINK_ORDER; | |
14486 | } | |
14487 | return TRUE; | |
14488 | } | |
14489 | ||
6dc132d9 L |
14490 | /* Handle an ARM specific section when reading an object file. This is |
14491 | called when bfd_section_from_shdr finds a section with an unknown | |
14492 | type. */ | |
40a18ebd NC |
14493 | |
14494 | static bfd_boolean | |
14495 | elf32_arm_section_from_shdr (bfd *abfd, | |
14496 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
14497 | const char *name, |
14498 | int shindex) | |
40a18ebd NC |
14499 | { |
14500 | /* There ought to be a place to keep ELF backend specific flags, but | |
14501 | at the moment there isn't one. We just keep track of the | |
14502 | sections by their name, instead. Fortunately, the ABI gives | |
14503 | names for all the ARM specific sections, so we will probably get | |
14504 | away with this. */ | |
14505 | switch (hdr->sh_type) | |
14506 | { | |
14507 | case SHT_ARM_EXIDX: | |
0951f019 RE |
14508 | case SHT_ARM_PREEMPTMAP: |
14509 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
14510 | break; |
14511 | ||
14512 | default: | |
14513 | return FALSE; | |
14514 | } | |
14515 | ||
6dc132d9 | 14516 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
40a18ebd NC |
14517 | return FALSE; |
14518 | ||
14519 | return TRUE; | |
14520 | } | |
e489d0ae | 14521 | |
44444f50 NC |
14522 | static _arm_elf_section_data * |
14523 | get_arm_elf_section_data (asection * sec) | |
14524 | { | |
47b2e99c JZ |
14525 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
14526 | return elf32_arm_section_data (sec); | |
44444f50 NC |
14527 | else |
14528 | return NULL; | |
8e3de13a NC |
14529 | } |
14530 | ||
4e617b1e PB |
14531 | typedef struct |
14532 | { | |
57402f1e | 14533 | void *flaginfo; |
4e617b1e | 14534 | struct bfd_link_info *info; |
91a5743d PB |
14535 | asection *sec; |
14536 | int sec_shndx; | |
6e0b88f1 AM |
14537 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
14538 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
14539 | } output_arch_syminfo; |
14540 | ||
14541 | enum map_symbol_type | |
14542 | { | |
14543 | ARM_MAP_ARM, | |
14544 | ARM_MAP_THUMB, | |
14545 | ARM_MAP_DATA | |
14546 | }; | |
14547 | ||
14548 | ||
7413f23f | 14549 | /* Output a single mapping symbol. */ |
4e617b1e PB |
14550 | |
14551 | static bfd_boolean | |
7413f23f DJ |
14552 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
14553 | enum map_symbol_type type, | |
14554 | bfd_vma offset) | |
4e617b1e PB |
14555 | { |
14556 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
14557 | Elf_Internal_Sym sym; |
14558 | ||
91a5743d PB |
14559 | sym.st_value = osi->sec->output_section->vma |
14560 | + osi->sec->output_offset | |
14561 | + offset; | |
4e617b1e PB |
14562 | sym.st_size = 0; |
14563 | sym.st_other = 0; | |
14564 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 14565 | sym.st_shndx = osi->sec_shndx; |
35fc36a8 | 14566 | sym.st_target_internal = 0; |
fe33d2fa | 14567 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
57402f1e | 14568 | return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
14569 | } |
14570 | ||
34e77a92 RS |
14571 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
14572 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ | |
4e617b1e PB |
14573 | |
14574 | static bfd_boolean | |
34e77a92 RS |
14575 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
14576 | bfd_boolean is_iplt_entry_p, | |
14577 | union gotplt_union *root_plt, | |
14578 | struct arm_plt_info *arm_plt) | |
4e617b1e | 14579 | { |
4e617b1e | 14580 | struct elf32_arm_link_hash_table *htab; |
34e77a92 | 14581 | bfd_vma addr, plt_header_size; |
4e617b1e | 14582 | |
34e77a92 | 14583 | if (root_plt->offset == (bfd_vma) -1) |
4e617b1e PB |
14584 | return TRUE; |
14585 | ||
4dfe6ac6 NC |
14586 | htab = elf32_arm_hash_table (osi->info); |
14587 | if (htab == NULL) | |
14588 | return FALSE; | |
14589 | ||
34e77a92 RS |
14590 | if (is_iplt_entry_p) |
14591 | { | |
14592 | osi->sec = htab->root.iplt; | |
14593 | plt_header_size = 0; | |
14594 | } | |
14595 | else | |
14596 | { | |
14597 | osi->sec = htab->root.splt; | |
14598 | plt_header_size = htab->plt_header_size; | |
14599 | } | |
14600 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section | |
14601 | (osi->info->output_bfd, osi->sec->output_section)); | |
14602 | ||
14603 | addr = root_plt->offset & -2; | |
4e617b1e PB |
14604 | if (htab->symbian_p) |
14605 | { | |
7413f23f | 14606 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 14607 | return FALSE; |
7413f23f | 14608 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
4e617b1e PB |
14609 | return FALSE; |
14610 | } | |
14611 | else if (htab->vxworks_p) | |
14612 | { | |
7413f23f | 14613 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 14614 | return FALSE; |
7413f23f | 14615 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
4e617b1e | 14616 | return FALSE; |
7413f23f | 14617 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
4e617b1e | 14618 | return FALSE; |
7413f23f | 14619 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
4e617b1e PB |
14620 | return FALSE; |
14621 | } | |
b38cadfb NC |
14622 | else if (htab->nacl_p) |
14623 | { | |
14624 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) | |
14625 | return FALSE; | |
14626 | } | |
4e617b1e PB |
14627 | else |
14628 | { | |
34e77a92 | 14629 | bfd_boolean thumb_stub_p; |
bd97cb95 | 14630 | |
34e77a92 RS |
14631 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
14632 | if (thumb_stub_p) | |
4e617b1e | 14633 | { |
7413f23f | 14634 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
4e617b1e PB |
14635 | return FALSE; |
14636 | } | |
14637 | #ifdef FOUR_WORD_PLT | |
7413f23f | 14638 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 14639 | return FALSE; |
7413f23f | 14640 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
4e617b1e PB |
14641 | return FALSE; |
14642 | #else | |
906e58ca | 14643 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
14644 | so only need to output a mapping symbol for the first PLT entry and |
14645 | entries with thumb thunks. */ | |
34e77a92 | 14646 | if (thumb_stub_p || addr == plt_header_size) |
4e617b1e | 14647 | { |
7413f23f | 14648 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e PB |
14649 | return FALSE; |
14650 | } | |
14651 | #endif | |
14652 | } | |
14653 | ||
14654 | return TRUE; | |
14655 | } | |
14656 | ||
34e77a92 RS |
14657 | /* Output mapping symbols for PLT entries associated with H. */ |
14658 | ||
14659 | static bfd_boolean | |
14660 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) | |
14661 | { | |
14662 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
14663 | struct elf32_arm_link_hash_entry *eh; | |
14664 | ||
14665 | if (h->root.type == bfd_link_hash_indirect) | |
14666 | return TRUE; | |
14667 | ||
14668 | if (h->root.type == bfd_link_hash_warning) | |
14669 | /* When warning symbols are created, they **replace** the "real" | |
14670 | entry in the hash table, thus we never get to see the real | |
14671 | symbol in a hash traversal. So look at it now. */ | |
14672 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
14673 | ||
14674 | eh = (struct elf32_arm_link_hash_entry *) h; | |
14675 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), | |
14676 | &h->plt, &eh->plt); | |
14677 | } | |
14678 | ||
7413f23f DJ |
14679 | /* Output a single local symbol for a generated stub. */ |
14680 | ||
14681 | static bfd_boolean | |
14682 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, | |
14683 | bfd_vma offset, bfd_vma size) | |
14684 | { | |
7413f23f DJ |
14685 | Elf_Internal_Sym sym; |
14686 | ||
7413f23f DJ |
14687 | sym.st_value = osi->sec->output_section->vma |
14688 | + osi->sec->output_offset | |
14689 | + offset; | |
14690 | sym.st_size = size; | |
14691 | sym.st_other = 0; | |
14692 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
14693 | sym.st_shndx = osi->sec_shndx; | |
35fc36a8 | 14694 | sym.st_target_internal = 0; |
57402f1e | 14695 | return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 14696 | } |
4e617b1e | 14697 | |
da5938a2 | 14698 | static bfd_boolean |
8029a119 NC |
14699 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
14700 | void * in_arg) | |
da5938a2 NC |
14701 | { |
14702 | struct elf32_arm_stub_hash_entry *stub_entry; | |
da5938a2 NC |
14703 | asection *stub_sec; |
14704 | bfd_vma addr; | |
7413f23f | 14705 | char *stub_name; |
9a008db3 | 14706 | output_arch_syminfo *osi; |
d3ce72d0 | 14707 | const insn_sequence *template_sequence; |
461a49ca DJ |
14708 | enum stub_insn_type prev_type; |
14709 | int size; | |
14710 | int i; | |
14711 | enum map_symbol_type sym_type; | |
da5938a2 NC |
14712 | |
14713 | /* Massage our args to the form they really have. */ | |
14714 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 14715 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 14716 | |
da5938a2 NC |
14717 | stub_sec = stub_entry->stub_sec; |
14718 | ||
14719 | /* Ensure this stub is attached to the current section being | |
7413f23f | 14720 | processed. */ |
da5938a2 NC |
14721 | if (stub_sec != osi->sec) |
14722 | return TRUE; | |
14723 | ||
7413f23f DJ |
14724 | addr = (bfd_vma) stub_entry->stub_offset; |
14725 | stub_name = stub_entry->output_name; | |
da5938a2 | 14726 | |
d3ce72d0 NC |
14727 | template_sequence = stub_entry->stub_template; |
14728 | switch (template_sequence[0].type) | |
7413f23f | 14729 | { |
461a49ca DJ |
14730 | case ARM_TYPE: |
14731 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size)) | |
da5938a2 NC |
14732 | return FALSE; |
14733 | break; | |
461a49ca | 14734 | case THUMB16_TYPE: |
48229727 | 14735 | case THUMB32_TYPE: |
461a49ca DJ |
14736 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, |
14737 | stub_entry->stub_size)) | |
da5938a2 NC |
14738 | return FALSE; |
14739 | break; | |
14740 | default: | |
14741 | BFD_FAIL (); | |
48229727 | 14742 | return 0; |
7413f23f | 14743 | } |
da5938a2 | 14744 | |
461a49ca DJ |
14745 | prev_type = DATA_TYPE; |
14746 | size = 0; | |
14747 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
14748 | { | |
d3ce72d0 | 14749 | switch (template_sequence[i].type) |
461a49ca DJ |
14750 | { |
14751 | case ARM_TYPE: | |
14752 | sym_type = ARM_MAP_ARM; | |
14753 | break; | |
14754 | ||
14755 | case THUMB16_TYPE: | |
48229727 | 14756 | case THUMB32_TYPE: |
461a49ca DJ |
14757 | sym_type = ARM_MAP_THUMB; |
14758 | break; | |
14759 | ||
14760 | case DATA_TYPE: | |
14761 | sym_type = ARM_MAP_DATA; | |
14762 | break; | |
14763 | ||
14764 | default: | |
14765 | BFD_FAIL (); | |
4e31c731 | 14766 | return FALSE; |
461a49ca DJ |
14767 | } |
14768 | ||
d3ce72d0 | 14769 | if (template_sequence[i].type != prev_type) |
461a49ca | 14770 | { |
d3ce72d0 | 14771 | prev_type = template_sequence[i].type; |
461a49ca DJ |
14772 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
14773 | return FALSE; | |
14774 | } | |
14775 | ||
d3ce72d0 | 14776 | switch (template_sequence[i].type) |
461a49ca DJ |
14777 | { |
14778 | case ARM_TYPE: | |
48229727 | 14779 | case THUMB32_TYPE: |
461a49ca DJ |
14780 | size += 4; |
14781 | break; | |
14782 | ||
14783 | case THUMB16_TYPE: | |
14784 | size += 2; | |
14785 | break; | |
14786 | ||
14787 | case DATA_TYPE: | |
14788 | size += 4; | |
14789 | break; | |
14790 | ||
14791 | default: | |
14792 | BFD_FAIL (); | |
4e31c731 | 14793 | return FALSE; |
461a49ca DJ |
14794 | } |
14795 | } | |
14796 | ||
da5938a2 NC |
14797 | return TRUE; |
14798 | } | |
14799 | ||
33811162 DG |
14800 | /* Output mapping symbols for linker generated sections, |
14801 | and for those data-only sections that do not have a | |
14802 | $d. */ | |
4e617b1e PB |
14803 | |
14804 | static bfd_boolean | |
14805 | elf32_arm_output_arch_local_syms (bfd *output_bfd, | |
906e58ca | 14806 | struct bfd_link_info *info, |
57402f1e | 14807 | void *flaginfo, |
6e0b88f1 AM |
14808 | int (*func) (void *, const char *, |
14809 | Elf_Internal_Sym *, | |
14810 | asection *, | |
14811 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
14812 | { |
14813 | output_arch_syminfo osi; | |
14814 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
14815 | bfd_vma offset; |
14816 | bfd_size_type size; | |
33811162 | 14817 | bfd *input_bfd; |
4e617b1e PB |
14818 | |
14819 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
14820 | if (htab == NULL) |
14821 | return FALSE; | |
14822 | ||
906e58ca | 14823 | check_use_blx (htab); |
91a5743d | 14824 | |
57402f1e | 14825 | osi.flaginfo = flaginfo; |
4e617b1e PB |
14826 | osi.info = info; |
14827 | osi.func = func; | |
906e58ca | 14828 | |
33811162 DG |
14829 | /* Add a $d mapping symbol to data-only sections that |
14830 | don't have any mapping symbol. This may result in (harmless) redundant | |
14831 | mapping symbols. */ | |
14832 | for (input_bfd = info->input_bfds; | |
14833 | input_bfd != NULL; | |
14834 | input_bfd = input_bfd->link_next) | |
14835 | { | |
14836 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
14837 | for (osi.sec = input_bfd->sections; | |
14838 | osi.sec != NULL; | |
14839 | osi.sec = osi.sec->next) | |
14840 | { | |
14841 | if (osi.sec->output_section != NULL | |
f7dd8c79 DJ |
14842 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
14843 | != 0) | |
33811162 DG |
14844 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
14845 | == SEC_HAS_CONTENTS | |
14846 | && get_arm_elf_section_data (osi.sec) != NULL | |
501abfe0 | 14847 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
7d500b83 CL |
14848 | && osi.sec->size > 0 |
14849 | && (osi.sec->flags & SEC_EXCLUDE) == 0) | |
33811162 DG |
14850 | { |
14851 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14852 | (output_bfd, osi.sec->output_section); | |
14853 | if (osi.sec_shndx != (int)SHN_BAD) | |
14854 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
14855 | } | |
14856 | } | |
14857 | } | |
14858 | ||
91a5743d PB |
14859 | /* ARM->Thumb glue. */ |
14860 | if (htab->arm_glue_size > 0) | |
14861 | { | |
3d4d4302 AM |
14862 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
14863 | ARM2THUMB_GLUE_SECTION_NAME); | |
91a5743d PB |
14864 | |
14865 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14866 | (output_bfd, osi.sec->output_section); | |
14867 | if (info->shared || htab->root.is_relocatable_executable | |
14868 | || htab->pic_veneer) | |
14869 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
14870 | else if (htab->use_blx) | |
14871 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
14872 | else | |
14873 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 14874 | |
91a5743d PB |
14875 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
14876 | { | |
7413f23f DJ |
14877 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
14878 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
14879 | } |
14880 | } | |
14881 | ||
14882 | /* Thumb->ARM glue. */ | |
14883 | if (htab->thumb_glue_size > 0) | |
14884 | { | |
3d4d4302 AM |
14885 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
14886 | THUMB2ARM_GLUE_SECTION_NAME); | |
91a5743d PB |
14887 | |
14888 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14889 | (output_bfd, osi.sec->output_section); | |
14890 | size = THUMB2ARM_GLUE_SIZE; | |
14891 | ||
14892 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
14893 | { | |
7413f23f DJ |
14894 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
14895 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
14896 | } |
14897 | } | |
14898 | ||
845b51d6 PB |
14899 | /* ARMv4 BX veneers. */ |
14900 | if (htab->bx_glue_size > 0) | |
14901 | { | |
3d4d4302 AM |
14902 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
14903 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
14904 | |
14905 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
14906 | (output_bfd, osi.sec->output_section); | |
14907 | ||
7413f23f | 14908 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
14909 | } |
14910 | ||
8029a119 NC |
14911 | /* Long calls stubs. */ |
14912 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
14913 | { | |
da5938a2 | 14914 | asection* stub_sec; |
8029a119 | 14915 | |
da5938a2 NC |
14916 | for (stub_sec = htab->stub_bfd->sections; |
14917 | stub_sec != NULL; | |
8029a119 NC |
14918 | stub_sec = stub_sec->next) |
14919 | { | |
14920 | /* Ignore non-stub sections. */ | |
14921 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
14922 | continue; | |
da5938a2 | 14923 | |
8029a119 | 14924 | osi.sec = stub_sec; |
da5938a2 | 14925 | |
8029a119 NC |
14926 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
14927 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 14928 | |
8029a119 NC |
14929 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
14930 | } | |
14931 | } | |
da5938a2 | 14932 | |
91a5743d | 14933 | /* Finally, output mapping symbols for the PLT. */ |
34e77a92 | 14934 | if (htab->root.splt && htab->root.splt->size > 0) |
4e617b1e | 14935 | { |
34e77a92 RS |
14936 | osi.sec = htab->root.splt; |
14937 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
14938 | (output_bfd, osi.sec->output_section)); | |
14939 | ||
14940 | /* Output mapping symbols for the plt header. SymbianOS does not have a | |
14941 | plt header. */ | |
14942 | if (htab->vxworks_p) | |
14943 | { | |
14944 | /* VxWorks shared libraries have no PLT header. */ | |
14945 | if (!info->shared) | |
14946 | { | |
14947 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
14948 | return FALSE; | |
14949 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
14950 | return FALSE; | |
14951 | } | |
14952 | } | |
b38cadfb NC |
14953 | else if (htab->nacl_p) |
14954 | { | |
14955 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
14956 | return FALSE; | |
14957 | } | |
34e77a92 | 14958 | else if (!htab->symbian_p) |
4e617b1e | 14959 | { |
7413f23f | 14960 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e | 14961 | return FALSE; |
34e77a92 RS |
14962 | #ifndef FOUR_WORD_PLT |
14963 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) | |
4e617b1e | 14964 | return FALSE; |
34e77a92 | 14965 | #endif |
4e617b1e PB |
14966 | } |
14967 | } | |
34e77a92 RS |
14968 | if ((htab->root.splt && htab->root.splt->size > 0) |
14969 | || (htab->root.iplt && htab->root.iplt->size > 0)) | |
4e617b1e | 14970 | { |
34e77a92 RS |
14971 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
14972 | for (input_bfd = info->input_bfds; | |
14973 | input_bfd != NULL; | |
14974 | input_bfd = input_bfd->link_next) | |
14975 | { | |
14976 | struct arm_local_iplt_info **local_iplt; | |
14977 | unsigned int i, num_syms; | |
4e617b1e | 14978 | |
34e77a92 RS |
14979 | local_iplt = elf32_arm_local_iplt (input_bfd); |
14980 | if (local_iplt != NULL) | |
14981 | { | |
14982 | num_syms = elf_symtab_hdr (input_bfd).sh_info; | |
14983 | for (i = 0; i < num_syms; i++) | |
14984 | if (local_iplt[i] != NULL | |
14985 | && !elf32_arm_output_plt_map_1 (&osi, TRUE, | |
14986 | &local_iplt[i]->root, | |
14987 | &local_iplt[i]->arm)) | |
14988 | return FALSE; | |
14989 | } | |
14990 | } | |
14991 | } | |
0855e32b NS |
14992 | if (htab->dt_tlsdesc_plt != 0) |
14993 | { | |
14994 | /* Mapping symbols for the lazy tls trampoline. */ | |
14995 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt)) | |
14996 | return FALSE; | |
b38cadfb | 14997 | |
0855e32b NS |
14998 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
14999 | htab->dt_tlsdesc_plt + 24)) | |
15000 | return FALSE; | |
15001 | } | |
15002 | if (htab->tls_trampoline != 0) | |
15003 | { | |
15004 | /* Mapping symbols for the tls trampoline. */ | |
15005 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) | |
15006 | return FALSE; | |
15007 | #ifdef FOUR_WORD_PLT | |
15008 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
15009 | htab->tls_trampoline + 12)) | |
15010 | return FALSE; | |
b38cadfb | 15011 | #endif |
0855e32b | 15012 | } |
b38cadfb | 15013 | |
4e617b1e PB |
15014 | return TRUE; |
15015 | } | |
15016 | ||
e489d0ae PB |
15017 | /* Allocate target specific section data. */ |
15018 | ||
15019 | static bfd_boolean | |
15020 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) | |
15021 | { | |
f592407e AM |
15022 | if (!sec->used_by_bfd) |
15023 | { | |
15024 | _arm_elf_section_data *sdata; | |
15025 | bfd_size_type amt = sizeof (*sdata); | |
e489d0ae | 15026 | |
21d799b5 | 15027 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e AM |
15028 | if (sdata == NULL) |
15029 | return FALSE; | |
15030 | sec->used_by_bfd = sdata; | |
15031 | } | |
e489d0ae PB |
15032 | |
15033 | return _bfd_elf_new_section_hook (abfd, sec); | |
15034 | } | |
15035 | ||
15036 | ||
15037 | /* Used to order a list of mapping symbols by address. */ | |
15038 | ||
15039 | static int | |
15040 | elf32_arm_compare_mapping (const void * a, const void * b) | |
15041 | { | |
7f6a71ff JM |
15042 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
15043 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
15044 | ||
15045 | if (amap->vma > bmap->vma) | |
15046 | return 1; | |
15047 | else if (amap->vma < bmap->vma) | |
15048 | return -1; | |
15049 | else if (amap->type > bmap->type) | |
15050 | /* Ensure results do not depend on the host qsort for objects with | |
15051 | multiple mapping symbols at the same address by sorting on type | |
15052 | after vma. */ | |
15053 | return 1; | |
15054 | else if (amap->type < bmap->type) | |
15055 | return -1; | |
15056 | else | |
15057 | return 0; | |
e489d0ae PB |
15058 | } |
15059 | ||
2468f9c9 PB |
15060 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
15061 | ||
15062 | static unsigned long | |
15063 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
15064 | { | |
15065 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
15066 | } | |
15067 | ||
15068 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
15069 | relocations. */ | |
15070 | ||
15071 | static void | |
15072 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
15073 | { | |
15074 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
15075 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
b38cadfb | 15076 | |
2468f9c9 PB |
15077 | /* High bit of first word is supposed to be zero. */ |
15078 | if ((first_word & 0x80000000ul) == 0) | |
15079 | first_word = offset_prel31 (first_word, offset); | |
b38cadfb | 15080 | |
2468f9c9 PB |
15081 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 |
15082 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
15083 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
15084 | second_word = offset_prel31 (second_word, offset); | |
b38cadfb | 15085 | |
2468f9c9 PB |
15086 | bfd_put_32 (output_bfd, first_word, to); |
15087 | bfd_put_32 (output_bfd, second_word, to + 4); | |
15088 | } | |
e489d0ae | 15089 | |
48229727 JB |
15090 | /* Data for make_branch_to_a8_stub(). */ |
15091 | ||
b38cadfb NC |
15092 | struct a8_branch_to_stub_data |
15093 | { | |
48229727 JB |
15094 | asection *writing_section; |
15095 | bfd_byte *contents; | |
15096 | }; | |
15097 | ||
15098 | ||
15099 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
15100 | places for a particular section. */ | |
15101 | ||
15102 | static bfd_boolean | |
15103 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, | |
15104 | void *in_arg) | |
15105 | { | |
15106 | struct elf32_arm_stub_hash_entry *stub_entry; | |
15107 | struct a8_branch_to_stub_data *data; | |
15108 | bfd_byte *contents; | |
15109 | unsigned long branch_insn; | |
15110 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
15111 | bfd_signed_vma branch_offset; | |
15112 | bfd *abfd; | |
91d6fa6a | 15113 | unsigned int target; |
48229727 JB |
15114 | |
15115 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
15116 | data = (struct a8_branch_to_stub_data *) in_arg; | |
15117 | ||
15118 | if (stub_entry->target_section != data->writing_section | |
4563a860 | 15119 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
48229727 JB |
15120 | return TRUE; |
15121 | ||
15122 | contents = data->contents; | |
15123 | ||
15124 | veneered_insn_loc = stub_entry->target_section->output_section->vma | |
15125 | + stub_entry->target_section->output_offset | |
15126 | + stub_entry->target_value; | |
15127 | ||
15128 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
15129 | + stub_entry->stub_sec->output_offset | |
15130 | + stub_entry->stub_offset; | |
15131 | ||
15132 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
15133 | veneered_insn_loc &= ~3u; | |
15134 | ||
15135 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
15136 | ||
15137 | abfd = stub_entry->target_section->owner; | |
91d6fa6a | 15138 | target = stub_entry->target_value; |
48229727 JB |
15139 | |
15140 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
15141 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
15142 | This check is just to be on the safe side... */ | |
15143 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
15144 | { | |
15145 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is " | |
15146 | "allocated in unsafe location"), abfd); | |
15147 | return FALSE; | |
15148 | } | |
15149 | ||
15150 | switch (stub_entry->stub_type) | |
15151 | { | |
15152 | case arm_stub_a8_veneer_b: | |
15153 | case arm_stub_a8_veneer_b_cond: | |
15154 | branch_insn = 0xf0009000; | |
15155 | goto jump24; | |
15156 | ||
15157 | case arm_stub_a8_veneer_blx: | |
15158 | branch_insn = 0xf000e800; | |
15159 | goto jump24; | |
15160 | ||
15161 | case arm_stub_a8_veneer_bl: | |
15162 | { | |
15163 | unsigned int i1, j1, i2, j2, s; | |
15164 | ||
15165 | branch_insn = 0xf000d000; | |
15166 | ||
15167 | jump24: | |
15168 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
15169 | { | |
15170 | /* There's not much we can do apart from complain if this | |
15171 | happens. */ | |
15172 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out " | |
15173 | "of range (input file too large)"), abfd); | |
15174 | return FALSE; | |
15175 | } | |
15176 | ||
15177 | /* i1 = not(j1 eor s), so: | |
15178 | not i1 = j1 eor s | |
15179 | j1 = (not i1) eor s. */ | |
15180 | ||
15181 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
15182 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
15183 | i2 = (branch_offset >> 22) & 1; | |
15184 | i1 = (branch_offset >> 23) & 1; | |
15185 | s = (branch_offset >> 24) & 1; | |
15186 | j1 = (!i1) ^ s; | |
15187 | j2 = (!i2) ^ s; | |
15188 | branch_insn |= j2 << 11; | |
15189 | branch_insn |= j1 << 13; | |
15190 | branch_insn |= s << 26; | |
15191 | } | |
15192 | break; | |
15193 | ||
15194 | default: | |
15195 | BFD_FAIL (); | |
15196 | return FALSE; | |
15197 | } | |
15198 | ||
91d6fa6a NC |
15199 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]); |
15200 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]); | |
48229727 JB |
15201 | |
15202 | return TRUE; | |
15203 | } | |
15204 | ||
e489d0ae PB |
15205 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
15206 | written out as normal. */ | |
15207 | ||
15208 | static bfd_boolean | |
c7b8f16e | 15209 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
15210 | struct bfd_link_info *link_info, |
15211 | asection *sec, | |
e489d0ae PB |
15212 | bfd_byte *contents) |
15213 | { | |
48229727 | 15214 | unsigned int mapcount, errcount; |
8e3de13a | 15215 | _arm_elf_section_data *arm_data; |
c7b8f16e | 15216 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 15217 | elf32_arm_section_map *map; |
c7b8f16e | 15218 | elf32_vfp11_erratum_list *errnode; |
e489d0ae PB |
15219 | bfd_vma ptr; |
15220 | bfd_vma end; | |
c7b8f16e | 15221 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 15222 | bfd_byte tmp; |
48229727 | 15223 | unsigned int i; |
57e8b36a | 15224 | |
4dfe6ac6 NC |
15225 | if (globals == NULL) |
15226 | return FALSE; | |
15227 | ||
8e3de13a NC |
15228 | /* If this section has not been allocated an _arm_elf_section_data |
15229 | structure then we cannot record anything. */ | |
15230 | arm_data = get_arm_elf_section_data (sec); | |
15231 | if (arm_data == NULL) | |
15232 | return FALSE; | |
15233 | ||
15234 | mapcount = arm_data->mapcount; | |
15235 | map = arm_data->map; | |
c7b8f16e JB |
15236 | errcount = arm_data->erratumcount; |
15237 | ||
15238 | if (errcount != 0) | |
15239 | { | |
15240 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
15241 | ||
15242 | for (errnode = arm_data->erratumlist; errnode != 0; | |
15243 | errnode = errnode->next) | |
15244 | { | |
91d6fa6a | 15245 | bfd_vma target = errnode->vma - offset; |
c7b8f16e JB |
15246 | |
15247 | switch (errnode->type) | |
15248 | { | |
15249 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
15250 | { | |
15251 | bfd_vma branch_to_veneer; | |
15252 | /* Original condition code of instruction, plus bit mask for | |
15253 | ARM B instruction. */ | |
15254 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
15255 | | 0x0a000000; | |
15256 | ||
15257 | /* The instruction is before the label. */ | |
91d6fa6a | 15258 | target -= 4; |
c7b8f16e JB |
15259 | |
15260 | /* Above offset included in -4 below. */ | |
15261 | branch_to_veneer = errnode->u.b.veneer->vma | |
15262 | - errnode->vma - 4; | |
15263 | ||
15264 | if ((signed) branch_to_veneer < -(1 << 25) | |
15265 | || (signed) branch_to_veneer >= (1 << 25)) | |
15266 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
15267 | "range"), output_bfd); | |
15268 | ||
15269 | insn |= (branch_to_veneer >> 2) & 0xffffff; | |
91d6fa6a NC |
15270 | contents[endianflip ^ target] = insn & 0xff; |
15271 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
15272 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
15273 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
15274 | } |
15275 | break; | |
15276 | ||
15277 | case VFP11_ERRATUM_ARM_VENEER: | |
15278 | { | |
15279 | bfd_vma branch_from_veneer; | |
15280 | unsigned int insn; | |
15281 | ||
15282 | /* Take size of veneer into account. */ | |
15283 | branch_from_veneer = errnode->u.v.branch->vma | |
15284 | - errnode->vma - 12; | |
15285 | ||
15286 | if ((signed) branch_from_veneer < -(1 << 25) | |
15287 | || (signed) branch_from_veneer >= (1 << 25)) | |
15288 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
15289 | "range"), output_bfd); | |
15290 | ||
15291 | /* Original instruction. */ | |
15292 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
91d6fa6a NC |
15293 | contents[endianflip ^ target] = insn & 0xff; |
15294 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
15295 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
15296 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
15297 | |
15298 | /* Branch back to insn after original insn. */ | |
15299 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
91d6fa6a NC |
15300 | contents[endianflip ^ (target + 4)] = insn & 0xff; |
15301 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
15302 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
15303 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
15304 | } |
15305 | break; | |
15306 | ||
15307 | default: | |
15308 | abort (); | |
15309 | } | |
15310 | } | |
15311 | } | |
e489d0ae | 15312 | |
2468f9c9 PB |
15313 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
15314 | { | |
15315 | arm_unwind_table_edit *edit_node | |
15316 | = arm_data->u.exidx.unwind_edit_list; | |
15317 | /* Now, sec->size is the size of the section we will write. The original | |
15318 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND | |
15319 | markers) was sec->rawsize. (This isn't the case if we perform no | |
15320 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 15321 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
15322 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
15323 | unsigned int in_index, out_index; | |
15324 | bfd_vma add_to_offsets = 0; | |
15325 | ||
15326 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) | |
15327 | { | |
15328 | if (edit_node) | |
15329 | { | |
15330 | unsigned int edit_index = edit_node->index; | |
b38cadfb | 15331 | |
2468f9c9 PB |
15332 | if (in_index < edit_index && in_index * 8 < input_size) |
15333 | { | |
15334 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
15335 | contents + in_index * 8, add_to_offsets); | |
15336 | out_index++; | |
15337 | in_index++; | |
15338 | } | |
15339 | else if (in_index == edit_index | |
15340 | || (in_index * 8 >= input_size | |
15341 | && edit_index == UINT_MAX)) | |
15342 | { | |
15343 | switch (edit_node->type) | |
15344 | { | |
15345 | case DELETE_EXIDX_ENTRY: | |
15346 | in_index++; | |
15347 | add_to_offsets += 8; | |
15348 | break; | |
b38cadfb | 15349 | |
2468f9c9 PB |
15350 | case INSERT_EXIDX_CANTUNWIND_AT_END: |
15351 | { | |
15352 | asection *text_sec = edit_node->linked_section; | |
15353 | bfd_vma text_offset = text_sec->output_section->vma | |
15354 | + text_sec->output_offset | |
15355 | + text_sec->size; | |
15356 | bfd_vma exidx_offset = offset + out_index * 8; | |
15357 | unsigned long prel31_offset; | |
15358 | ||
15359 | /* Note: this is meant to be equivalent to an | |
15360 | R_ARM_PREL31 relocation. These synthetic | |
15361 | EXIDX_CANTUNWIND markers are not relocated by the | |
15362 | usual BFD method. */ | |
15363 | prel31_offset = (text_offset - exidx_offset) | |
15364 | & 0x7ffffffful; | |
15365 | ||
15366 | /* First address we can't unwind. */ | |
15367 | bfd_put_32 (output_bfd, prel31_offset, | |
15368 | &edited_contents[out_index * 8]); | |
15369 | ||
15370 | /* Code for EXIDX_CANTUNWIND. */ | |
15371 | bfd_put_32 (output_bfd, 0x1, | |
15372 | &edited_contents[out_index * 8 + 4]); | |
15373 | ||
15374 | out_index++; | |
15375 | add_to_offsets -= 8; | |
15376 | } | |
15377 | break; | |
15378 | } | |
b38cadfb | 15379 | |
2468f9c9 PB |
15380 | edit_node = edit_node->next; |
15381 | } | |
15382 | } | |
15383 | else | |
15384 | { | |
15385 | /* No more edits, copy remaining entries verbatim. */ | |
15386 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
15387 | contents + in_index * 8, add_to_offsets); | |
15388 | out_index++; | |
15389 | in_index++; | |
15390 | } | |
15391 | } | |
15392 | ||
15393 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
15394 | bfd_set_section_contents (output_bfd, sec->output_section, | |
15395 | edited_contents, | |
15396 | (file_ptr) sec->output_offset, sec->size); | |
15397 | ||
15398 | return TRUE; | |
15399 | } | |
15400 | ||
48229727 JB |
15401 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
15402 | if (globals->fix_cortex_a8) | |
15403 | { | |
15404 | struct a8_branch_to_stub_data data; | |
15405 | ||
15406 | data.writing_section = sec; | |
15407 | data.contents = contents; | |
15408 | ||
15409 | bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub, | |
15410 | &data); | |
15411 | } | |
15412 | ||
e489d0ae PB |
15413 | if (mapcount == 0) |
15414 | return FALSE; | |
15415 | ||
c7b8f16e | 15416 | if (globals->byteswap_code) |
e489d0ae | 15417 | { |
c7b8f16e | 15418 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 15419 | |
c7b8f16e JB |
15420 | ptr = map[0].vma; |
15421 | for (i = 0; i < mapcount; i++) | |
15422 | { | |
15423 | if (i == mapcount - 1) | |
15424 | end = sec->size; | |
15425 | else | |
15426 | end = map[i + 1].vma; | |
e489d0ae | 15427 | |
c7b8f16e | 15428 | switch (map[i].type) |
e489d0ae | 15429 | { |
c7b8f16e JB |
15430 | case 'a': |
15431 | /* Byte swap code words. */ | |
15432 | while (ptr + 3 < end) | |
15433 | { | |
15434 | tmp = contents[ptr]; | |
15435 | contents[ptr] = contents[ptr + 3]; | |
15436 | contents[ptr + 3] = tmp; | |
15437 | tmp = contents[ptr + 1]; | |
15438 | contents[ptr + 1] = contents[ptr + 2]; | |
15439 | contents[ptr + 2] = tmp; | |
15440 | ptr += 4; | |
15441 | } | |
15442 | break; | |
e489d0ae | 15443 | |
c7b8f16e JB |
15444 | case 't': |
15445 | /* Byte swap code halfwords. */ | |
15446 | while (ptr + 1 < end) | |
15447 | { | |
15448 | tmp = contents[ptr]; | |
15449 | contents[ptr] = contents[ptr + 1]; | |
15450 | contents[ptr + 1] = tmp; | |
15451 | ptr += 2; | |
15452 | } | |
15453 | break; | |
15454 | ||
15455 | case 'd': | |
15456 | /* Leave data alone. */ | |
15457 | break; | |
15458 | } | |
15459 | ptr = end; | |
15460 | } | |
e489d0ae | 15461 | } |
8e3de13a | 15462 | |
93204d3a | 15463 | free (map); |
47b2e99c | 15464 | arm_data->mapcount = -1; |
c7b8f16e | 15465 | arm_data->mapsize = 0; |
8e3de13a | 15466 | arm_data->map = NULL; |
8e3de13a | 15467 | |
e489d0ae PB |
15468 | return FALSE; |
15469 | } | |
15470 | ||
0beaef2b PB |
15471 | /* Mangle thumb function symbols as we read them in. */ |
15472 | ||
8384fb8f | 15473 | static bfd_boolean |
0beaef2b PB |
15474 | elf32_arm_swap_symbol_in (bfd * abfd, |
15475 | const void *psrc, | |
15476 | const void *pshn, | |
15477 | Elf_Internal_Sym *dst) | |
15478 | { | |
8384fb8f AM |
15479 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
15480 | return FALSE; | |
0beaef2b PB |
15481 | |
15482 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
35fc36a8 | 15483 | the address. */ |
63e1a0fc PB |
15484 | if (ELF_ST_TYPE (dst->st_info) == STT_FUNC |
15485 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) | |
0beaef2b | 15486 | { |
63e1a0fc PB |
15487 | if (dst->st_value & 1) |
15488 | { | |
15489 | dst->st_value &= ~(bfd_vma) 1; | |
15490 | dst->st_target_internal = ST_BRANCH_TO_THUMB; | |
15491 | } | |
15492 | else | |
15493 | dst->st_target_internal = ST_BRANCH_TO_ARM; | |
35fc36a8 RS |
15494 | } |
15495 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) | |
15496 | { | |
15497 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); | |
15498 | dst->st_target_internal = ST_BRANCH_TO_THUMB; | |
0beaef2b | 15499 | } |
35fc36a8 RS |
15500 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
15501 | dst->st_target_internal = ST_BRANCH_LONG; | |
15502 | else | |
63e1a0fc | 15503 | dst->st_target_internal = ST_BRANCH_UNKNOWN; |
35fc36a8 | 15504 | |
8384fb8f | 15505 | return TRUE; |
0beaef2b PB |
15506 | } |
15507 | ||
15508 | ||
15509 | /* Mangle thumb function symbols as we write them out. */ | |
15510 | ||
15511 | static void | |
15512 | elf32_arm_swap_symbol_out (bfd *abfd, | |
15513 | const Elf_Internal_Sym *src, | |
15514 | void *cdst, | |
15515 | void *shndx) | |
15516 | { | |
15517 | Elf_Internal_Sym newsym; | |
15518 | ||
15519 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
15520 | of the address set, as per the new EABI. We do this unconditionally | |
15521 | because objcopy does not set the elf header flags until after | |
15522 | it writes out the symbol table. */ | |
35fc36a8 | 15523 | if (src->st_target_internal == ST_BRANCH_TO_THUMB) |
0beaef2b PB |
15524 | { |
15525 | newsym = *src; | |
34e77a92 RS |
15526 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
15527 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad PB |
15528 | if (newsym.st_shndx != SHN_UNDEF) |
15529 | { | |
15530 | /* Do this only for defined symbols. At link type, the static | |
15531 | linker will simulate the work of dynamic linker of resolving | |
15532 | symbols and will carry over the thumbness of found symbols to | |
15533 | the output symbol table. It's not clear how it happens, but | |
b0fead2b | 15534 | the thumbness of undefined symbols can well be different at |
0fa3dcad PB |
15535 | runtime, and writing '1' for them will be confusing for users |
15536 | and possibly for dynamic linker itself. | |
15537 | */ | |
15538 | newsym.st_value |= 1; | |
15539 | } | |
906e58ca | 15540 | |
0beaef2b PB |
15541 | src = &newsym; |
15542 | } | |
15543 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
15544 | } | |
15545 | ||
b294bdf8 MM |
15546 | /* Add the PT_ARM_EXIDX program header. */ |
15547 | ||
15548 | static bfd_boolean | |
906e58ca | 15549 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
15550 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
15551 | { | |
15552 | struct elf_segment_map *m; | |
15553 | asection *sec; | |
15554 | ||
15555 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
15556 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
15557 | { | |
15558 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
15559 | want to add another one. This situation arises when running | |
15560 | "strip"; the input binary already has the header. */ | |
12bd6957 | 15561 | m = elf_seg_map (abfd); |
b294bdf8 MM |
15562 | while (m && m->p_type != PT_ARM_EXIDX) |
15563 | m = m->next; | |
15564 | if (!m) | |
15565 | { | |
21d799b5 NC |
15566 | m = (struct elf_segment_map *) |
15567 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); | |
b294bdf8 MM |
15568 | if (m == NULL) |
15569 | return FALSE; | |
15570 | m->p_type = PT_ARM_EXIDX; | |
15571 | m->count = 1; | |
15572 | m->sections[0] = sec; | |
15573 | ||
12bd6957 AM |
15574 | m->next = elf_seg_map (abfd); |
15575 | elf_seg_map (abfd) = m; | |
b294bdf8 MM |
15576 | } |
15577 | } | |
15578 | ||
15579 | return TRUE; | |
15580 | } | |
15581 | ||
15582 | /* We may add a PT_ARM_EXIDX program header. */ | |
15583 | ||
15584 | static int | |
a6b96beb AM |
15585 | elf32_arm_additional_program_headers (bfd *abfd, |
15586 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
15587 | { |
15588 | asection *sec; | |
15589 | ||
15590 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
15591 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
15592 | return 1; | |
15593 | else | |
15594 | return 0; | |
15595 | } | |
15596 | ||
34e77a92 RS |
15597 | /* Hook called by the linker routine which adds symbols from an object |
15598 | file. */ | |
15599 | ||
15600 | static bfd_boolean | |
15601 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, | |
15602 | Elf_Internal_Sym *sym, const char **namep, | |
15603 | flagword *flagsp, asection **secp, bfd_vma *valp) | |
15604 | { | |
15605 | if ((abfd->flags & DYNAMIC) == 0 | |
f64b2e8d NC |
15606 | && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC |
15607 | || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)) | |
15608 | elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE; | |
34e77a92 RS |
15609 | |
15610 | if (elf32_arm_hash_table (info)->vxworks_p | |
15611 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, | |
15612 | flagsp, secp, valp)) | |
15613 | return FALSE; | |
15614 | ||
15615 | return TRUE; | |
15616 | } | |
15617 | ||
0beaef2b | 15618 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
15619 | const struct elf_size_info elf32_arm_size_info = |
15620 | { | |
0beaef2b PB |
15621 | sizeof (Elf32_External_Ehdr), |
15622 | sizeof (Elf32_External_Phdr), | |
15623 | sizeof (Elf32_External_Shdr), | |
15624 | sizeof (Elf32_External_Rel), | |
15625 | sizeof (Elf32_External_Rela), | |
15626 | sizeof (Elf32_External_Sym), | |
15627 | sizeof (Elf32_External_Dyn), | |
15628 | sizeof (Elf_External_Note), | |
15629 | 4, | |
15630 | 1, | |
15631 | 32, 2, | |
15632 | ELFCLASS32, EV_CURRENT, | |
15633 | bfd_elf32_write_out_phdrs, | |
15634 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 15635 | bfd_elf32_checksum_contents, |
0beaef2b PB |
15636 | bfd_elf32_write_relocs, |
15637 | elf32_arm_swap_symbol_in, | |
15638 | elf32_arm_swap_symbol_out, | |
15639 | bfd_elf32_slurp_reloc_table, | |
15640 | bfd_elf32_slurp_symbol_table, | |
15641 | bfd_elf32_swap_dyn_in, | |
15642 | bfd_elf32_swap_dyn_out, | |
15643 | bfd_elf32_swap_reloc_in, | |
15644 | bfd_elf32_swap_reloc_out, | |
15645 | bfd_elf32_swap_reloca_in, | |
15646 | bfd_elf32_swap_reloca_out | |
15647 | }; | |
15648 | ||
252b5132 | 15649 | #define ELF_ARCH bfd_arch_arm |
ae95ffa6 | 15650 | #define ELF_TARGET_ID ARM_ELF_DATA |
252b5132 | 15651 | #define ELF_MACHINE_CODE EM_ARM |
d0facd1b NC |
15652 | #ifdef __QNXTARGET__ |
15653 | #define ELF_MAXPAGESIZE 0x1000 | |
15654 | #else | |
f21f3fe0 | 15655 | #define ELF_MAXPAGESIZE 0x8000 |
d0facd1b | 15656 | #endif |
b1342370 | 15657 | #define ELF_MINPAGESIZE 0x1000 |
24718e3b | 15658 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 15659 | |
ba93b8ac DJ |
15660 | #define bfd_elf32_mkobject elf32_arm_mkobject |
15661 | ||
99e4ae17 AJ |
15662 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
15663 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
15664 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
15665 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
15666 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create | |
906e58ca | 15667 | #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free |
dc810e39 | 15668 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
b38cadfb | 15669 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
252b5132 | 15670 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
4ab527b0 | 15671 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
e489d0ae | 15672 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 15673 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
3e6b1042 | 15674 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
252b5132 RH |
15675 | |
15676 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type | |
15677 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook | |
6a5bb875 | 15678 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
252b5132 RH |
15679 | #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook |
15680 | #define elf_backend_check_relocs elf32_arm_check_relocs | |
dc810e39 | 15681 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 15682 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 15683 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
5e681ec4 | 15684 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
15685 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
15686 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
15687 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
0855e32b | 15688 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
74541ad4 | 15689 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ba96a88f | 15690 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
99e4ae17 | 15691 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 15692 | #define elf_backend_object_p elf32_arm_object_p |
40a18ebd NC |
15693 | #define elf_backend_fake_sections elf32_arm_fake_sections |
15694 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
e16bb312 | 15695 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
5e681ec4 | 15696 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol |
0beaef2b | 15697 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 15698 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
906e58ca NC |
15699 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
15700 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
15701 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing | |
34e77a92 | 15702 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
906e58ca NC |
15703 | |
15704 | #define elf_backend_can_refcount 1 | |
15705 | #define elf_backend_can_gc_sections 1 | |
15706 | #define elf_backend_plt_readonly 1 | |
15707 | #define elf_backend_want_got_plt 1 | |
15708 | #define elf_backend_want_plt_sym 0 | |
15709 | #define elf_backend_may_use_rel_p 1 | |
15710 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 15711 | #define elf_backend_default_use_rela_p 0 |
252b5132 | 15712 | |
04f7c78d | 15713 | #define elf_backend_got_header_size 12 |
04f7c78d | 15714 | |
906e58ca NC |
15715 | #undef elf_backend_obj_attrs_vendor |
15716 | #define elf_backend_obj_attrs_vendor "aeabi" | |
15717 | #undef elf_backend_obj_attrs_section | |
15718 | #define elf_backend_obj_attrs_section ".ARM.attributes" | |
15719 | #undef elf_backend_obj_attrs_arg_type | |
15720 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type | |
15721 | #undef elf_backend_obj_attrs_section_type | |
104d59d1 | 15722 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
b38cadfb NC |
15723 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
15724 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown | |
104d59d1 | 15725 | |
252b5132 | 15726 | #include "elf32-target.h" |
7f266840 | 15727 | |
b38cadfb NC |
15728 | /* Native Client targets. */ |
15729 | ||
15730 | #undef TARGET_LITTLE_SYM | |
15731 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec | |
15732 | #undef TARGET_LITTLE_NAME | |
15733 | #define TARGET_LITTLE_NAME "elf32-littlearm-nacl" | |
15734 | #undef TARGET_BIG_SYM | |
15735 | #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec | |
15736 | #undef TARGET_BIG_NAME | |
15737 | #define TARGET_BIG_NAME "elf32-bigarm-nacl" | |
15738 | ||
15739 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
15740 | appropriately for NaCl. */ | |
15741 | ||
15742 | static struct bfd_link_hash_table * | |
15743 | elf32_arm_nacl_link_hash_table_create (bfd *abfd) | |
15744 | { | |
15745 | struct bfd_link_hash_table *ret; | |
15746 | ||
15747 | ret = elf32_arm_link_hash_table_create (abfd); | |
15748 | if (ret) | |
15749 | { | |
15750 | struct elf32_arm_link_hash_table *htab | |
15751 | = (struct elf32_arm_link_hash_table *) ret; | |
15752 | ||
15753 | htab->nacl_p = 1; | |
15754 | ||
15755 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry); | |
15756 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry); | |
15757 | } | |
15758 | return ret; | |
15759 | } | |
15760 | ||
15761 | /* Since NaCl doesn't use the ARM-specific unwind format, we don't | |
15762 | really need to use elf32_arm_modify_segment_map. But we do it | |
15763 | anyway just to reduce gratuitous differences with the stock ARM backend. */ | |
15764 | ||
15765 | static bfd_boolean | |
15766 | elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info) | |
15767 | { | |
15768 | return (elf32_arm_modify_segment_map (abfd, info) | |
15769 | && nacl_modify_segment_map (abfd, info)); | |
15770 | } | |
15771 | ||
15772 | #undef elf32_bed | |
15773 | #define elf32_bed elf32_arm_nacl_bed | |
15774 | #undef bfd_elf32_bfd_link_hash_table_create | |
15775 | #define bfd_elf32_bfd_link_hash_table_create \ | |
15776 | elf32_arm_nacl_link_hash_table_create | |
15777 | #undef elf_backend_plt_alignment | |
15778 | #define elf_backend_plt_alignment 4 | |
15779 | #undef elf_backend_modify_segment_map | |
15780 | #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map | |
15781 | #undef elf_backend_modify_program_headers | |
15782 | #define elf_backend_modify_program_headers nacl_modify_program_headers | |
15783 | ||
15784 | #undef ELF_MAXPAGESIZE | |
15785 | #define ELF_MAXPAGESIZE 0x10000 | |
15786 | ||
15787 | #include "elf32-target.h" | |
15788 | ||
15789 | /* Reset to defaults. */ | |
15790 | #undef elf_backend_plt_alignment | |
15791 | #undef elf_backend_modify_segment_map | |
15792 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map | |
15793 | #undef elf_backend_modify_program_headers | |
15794 | ||
906e58ca | 15795 | /* VxWorks Targets. */ |
4e7fd91e | 15796 | |
906e58ca | 15797 | #undef TARGET_LITTLE_SYM |
4e7fd91e | 15798 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec |
906e58ca | 15799 | #undef TARGET_LITTLE_NAME |
4e7fd91e | 15800 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" |
906e58ca | 15801 | #undef TARGET_BIG_SYM |
4e7fd91e | 15802 | #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec |
906e58ca | 15803 | #undef TARGET_BIG_NAME |
4e7fd91e PB |
15804 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" |
15805 | ||
15806 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
15807 | appropriately for VxWorks. */ | |
906e58ca | 15808 | |
4e7fd91e PB |
15809 | static struct bfd_link_hash_table * |
15810 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
15811 | { | |
15812 | struct bfd_link_hash_table *ret; | |
15813 | ||
15814 | ret = elf32_arm_link_hash_table_create (abfd); | |
15815 | if (ret) | |
15816 | { | |
15817 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 15818 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e | 15819 | htab->use_rel = 0; |
00a97672 | 15820 | htab->vxworks_p = 1; |
4e7fd91e PB |
15821 | } |
15822 | return ret; | |
906e58ca | 15823 | } |
4e7fd91e | 15824 | |
00a97672 RS |
15825 | static void |
15826 | elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) | |
15827 | { | |
15828 | elf32_arm_final_write_processing (abfd, linker); | |
15829 | elf_vxworks_final_write_processing (abfd, linker); | |
15830 | } | |
15831 | ||
906e58ca | 15832 | #undef elf32_bed |
4e7fd91e PB |
15833 | #define elf32_bed elf32_arm_vxworks_bed |
15834 | ||
906e58ca NC |
15835 | #undef bfd_elf32_bfd_link_hash_table_create |
15836 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
906e58ca NC |
15837 | #undef elf_backend_final_write_processing |
15838 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
15839 | #undef elf_backend_emit_relocs | |
15840 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs | |
4e7fd91e | 15841 | |
906e58ca | 15842 | #undef elf_backend_may_use_rel_p |
00a97672 | 15843 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 15844 | #undef elf_backend_may_use_rela_p |
00a97672 | 15845 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 15846 | #undef elf_backend_default_use_rela_p |
00a97672 | 15847 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 15848 | #undef elf_backend_want_plt_sym |
00a97672 | 15849 | #define elf_backend_want_plt_sym 1 |
906e58ca | 15850 | #undef ELF_MAXPAGESIZE |
00a97672 | 15851 | #define ELF_MAXPAGESIZE 0x1000 |
4e7fd91e PB |
15852 | |
15853 | #include "elf32-target.h" | |
15854 | ||
15855 | ||
21d799b5 NC |
15856 | /* Merge backend specific data from an object file to the output |
15857 | object file when linking. */ | |
15858 | ||
15859 | static bfd_boolean | |
15860 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
15861 | { | |
15862 | flagword out_flags; | |
15863 | flagword in_flags; | |
15864 | bfd_boolean flags_compatible = TRUE; | |
15865 | asection *sec; | |
15866 | ||
cc643b88 | 15867 | /* Check if we have the same endianness. */ |
21d799b5 NC |
15868 | if (! _bfd_generic_verify_endian_match (ibfd, obfd)) |
15869 | return FALSE; | |
15870 | ||
15871 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
15872 | return TRUE; | |
15873 | ||
15874 | if (!elf32_arm_merge_eabi_attributes (ibfd, obfd)) | |
15875 | return FALSE; | |
15876 | ||
15877 | /* The input BFD must have had its flags initialised. */ | |
15878 | /* The following seems bogus to me -- The flags are initialized in | |
15879 | the assembler but I don't think an elf_flags_init field is | |
15880 | written into the object. */ | |
15881 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
15882 | ||
15883 | in_flags = elf_elfheader (ibfd)->e_flags; | |
15884 | out_flags = elf_elfheader (obfd)->e_flags; | |
15885 | ||
15886 | /* In theory there is no reason why we couldn't handle this. However | |
15887 | in practice it isn't even close to working and there is no real | |
15888 | reason to want it. */ | |
15889 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
15890 | && !(ibfd->flags & DYNAMIC) | |
15891 | && (in_flags & EF_ARM_BE8)) | |
15892 | { | |
15893 | _bfd_error_handler (_("error: %B is already in final BE8 format"), | |
15894 | ibfd); | |
15895 | return FALSE; | |
15896 | } | |
15897 | ||
15898 | if (!elf_flags_init (obfd)) | |
15899 | { | |
15900 | /* If the input is the default architecture and had the default | |
15901 | flags then do not bother setting the flags for the output | |
15902 | architecture, instead allow future merges to do this. If no | |
15903 | future merges ever set these flags then they will retain their | |
15904 | uninitialised values, which surprise surprise, correspond | |
15905 | to the default values. */ | |
15906 | if (bfd_get_arch_info (ibfd)->the_default | |
15907 | && elf_elfheader (ibfd)->e_flags == 0) | |
15908 | return TRUE; | |
15909 | ||
15910 | elf_flags_init (obfd) = TRUE; | |
15911 | elf_elfheader (obfd)->e_flags = in_flags; | |
15912 | ||
15913 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
15914 | && bfd_get_arch_info (obfd)->the_default) | |
15915 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
15916 | ||
15917 | return TRUE; | |
15918 | } | |
15919 | ||
15920 | /* Determine what should happen if the input ARM architecture | |
15921 | does not match the output ARM architecture. */ | |
15922 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
15923 | return FALSE; | |
15924 | ||
15925 | /* Identical flags must be compatible. */ | |
15926 | if (in_flags == out_flags) | |
15927 | return TRUE; | |
15928 | ||
15929 | /* Check to see if the input BFD actually contains any sections. If | |
15930 | not, its flags may not have been initialised either, but it | |
15931 | cannot actually cause any incompatiblity. Do not short-circuit | |
15932 | dynamic objects; their section list may be emptied by | |
15933 | elf_link_add_object_symbols. | |
15934 | ||
15935 | Also check to see if there are no code sections in the input. | |
15936 | In this case there is no need to check for code specific flags. | |
15937 | XXX - do we need to worry about floating-point format compatability | |
15938 | in data sections ? */ | |
15939 | if (!(ibfd->flags & DYNAMIC)) | |
15940 | { | |
15941 | bfd_boolean null_input_bfd = TRUE; | |
15942 | bfd_boolean only_data_sections = TRUE; | |
15943 | ||
15944 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
15945 | { | |
15946 | /* Ignore synthetic glue sections. */ | |
15947 | if (strcmp (sec->name, ".glue_7") | |
15948 | && strcmp (sec->name, ".glue_7t")) | |
15949 | { | |
15950 | if ((bfd_get_section_flags (ibfd, sec) | |
15951 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
15952 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
15953 | only_data_sections = FALSE; | |
15954 | ||
15955 | null_input_bfd = FALSE; | |
15956 | break; | |
15957 | } | |
15958 | } | |
15959 | ||
15960 | if (null_input_bfd || only_data_sections) | |
15961 | return TRUE; | |
15962 | } | |
15963 | ||
15964 | /* Complain about various flag mismatches. */ | |
15965 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
15966 | EF_ARM_EABI_VERSION (out_flags))) | |
15967 | { | |
15968 | _bfd_error_handler | |
15969 | (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"), | |
15970 | ibfd, obfd, | |
15971 | (in_flags & EF_ARM_EABIMASK) >> 24, | |
15972 | (out_flags & EF_ARM_EABIMASK) >> 24); | |
15973 | return FALSE; | |
15974 | } | |
15975 | ||
15976 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
15977 | /* VxWorks libraries do not use these flags. */ | |
15978 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
15979 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
15980 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
15981 | { | |
15982 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
15983 | { | |
15984 | _bfd_error_handler | |
15985 | (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"), | |
15986 | ibfd, obfd, | |
15987 | in_flags & EF_ARM_APCS_26 ? 26 : 32, | |
15988 | out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
15989 | flags_compatible = FALSE; | |
15990 | } | |
15991 | ||
15992 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
15993 | { | |
15994 | if (in_flags & EF_ARM_APCS_FLOAT) | |
15995 | _bfd_error_handler | |
15996 | (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"), | |
15997 | ibfd, obfd); | |
15998 | else | |
15999 | _bfd_error_handler | |
16000 | (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"), | |
16001 | ibfd, obfd); | |
16002 | ||
16003 | flags_compatible = FALSE; | |
16004 | } | |
16005 | ||
16006 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
16007 | { | |
16008 | if (in_flags & EF_ARM_VFP_FLOAT) | |
16009 | _bfd_error_handler | |
16010 | (_("error: %B uses VFP instructions, whereas %B does not"), | |
16011 | ibfd, obfd); | |
16012 | else | |
16013 | _bfd_error_handler | |
16014 | (_("error: %B uses FPA instructions, whereas %B does not"), | |
16015 | ibfd, obfd); | |
16016 | ||
16017 | flags_compatible = FALSE; | |
16018 | } | |
16019 | ||
16020 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
16021 | { | |
16022 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
16023 | _bfd_error_handler | |
16024 | (_("error: %B uses Maverick instructions, whereas %B does not"), | |
16025 | ibfd, obfd); | |
16026 | else | |
16027 | _bfd_error_handler | |
16028 | (_("error: %B does not use Maverick instructions, whereas %B does"), | |
16029 | ibfd, obfd); | |
16030 | ||
16031 | flags_compatible = FALSE; | |
16032 | } | |
16033 | ||
16034 | #ifdef EF_ARM_SOFT_FLOAT | |
16035 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
16036 | { | |
16037 | /* We can allow interworking between code that is VFP format | |
16038 | layout, and uses either soft float or integer regs for | |
16039 | passing floating point arguments and results. We already | |
16040 | know that the APCS_FLOAT flags match; similarly for VFP | |
16041 | flags. */ | |
16042 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
16043 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
16044 | { | |
16045 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
16046 | _bfd_error_handler | |
16047 | (_("error: %B uses software FP, whereas %B uses hardware FP"), | |
16048 | ibfd, obfd); | |
16049 | else | |
16050 | _bfd_error_handler | |
16051 | (_("error: %B uses hardware FP, whereas %B uses software FP"), | |
16052 | ibfd, obfd); | |
16053 | ||
16054 | flags_compatible = FALSE; | |
16055 | } | |
16056 | } | |
16057 | #endif | |
16058 | ||
16059 | /* Interworking mismatch is only a warning. */ | |
16060 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
16061 | { | |
16062 | if (in_flags & EF_ARM_INTERWORK) | |
16063 | { | |
16064 | _bfd_error_handler | |
16065 | (_("Warning: %B supports interworking, whereas %B does not"), | |
16066 | ibfd, obfd); | |
16067 | } | |
16068 | else | |
16069 | { | |
16070 | _bfd_error_handler | |
16071 | (_("Warning: %B does not support interworking, whereas %B does"), | |
16072 | ibfd, obfd); | |
16073 | } | |
16074 | } | |
16075 | } | |
16076 | ||
16077 | return flags_compatible; | |
16078 | } | |
16079 | ||
16080 | ||
906e58ca | 16081 | /* Symbian OS Targets. */ |
7f266840 | 16082 | |
906e58ca | 16083 | #undef TARGET_LITTLE_SYM |
7f266840 | 16084 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec |
906e58ca | 16085 | #undef TARGET_LITTLE_NAME |
7f266840 | 16086 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" |
906e58ca | 16087 | #undef TARGET_BIG_SYM |
7f266840 | 16088 | #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec |
906e58ca | 16089 | #undef TARGET_BIG_NAME |
7f266840 DJ |
16090 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" |
16091 | ||
16092 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
16093 | appropriately for Symbian OS. */ | |
906e58ca | 16094 | |
7f266840 DJ |
16095 | static struct bfd_link_hash_table * |
16096 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) | |
16097 | { | |
16098 | struct bfd_link_hash_table *ret; | |
16099 | ||
16100 | ret = elf32_arm_link_hash_table_create (abfd); | |
16101 | if (ret) | |
16102 | { | |
16103 | struct elf32_arm_link_hash_table *htab | |
16104 | = (struct elf32_arm_link_hash_table *)ret; | |
16105 | /* There is no PLT header for Symbian OS. */ | |
16106 | htab->plt_header_size = 0; | |
95720a86 DJ |
16107 | /* The PLT entries are each one instruction and one word. */ |
16108 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); | |
7f266840 | 16109 | htab->symbian_p = 1; |
33bfe774 JB |
16110 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
16111 | htab->use_blx = 1; | |
67687978 | 16112 | htab->root.is_relocatable_executable = 1; |
7f266840 DJ |
16113 | } |
16114 | return ret; | |
906e58ca | 16115 | } |
7f266840 | 16116 | |
b35d266b | 16117 | static const struct bfd_elf_special_section |
551b43fd | 16118 | elf32_arm_symbian_special_sections[] = |
7f266840 | 16119 | { |
5cd3778d MM |
16120 | /* In a BPABI executable, the dynamic linking sections do not go in |
16121 | the loadable read-only segment. The post-linker may wish to | |
16122 | refer to these sections, but they are not part of the final | |
16123 | program image. */ | |
0112cd26 NC |
16124 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
16125 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, | |
16126 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, | |
16127 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, | |
16128 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, | |
5cd3778d MM |
16129 | /* These sections do not need to be writable as the SymbianOS |
16130 | postlinker will arrange things so that no dynamic relocation is | |
16131 | required. */ | |
0112cd26 NC |
16132 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
16133 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, | |
16134 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, | |
16135 | { NULL, 0, 0, 0, 0 } | |
7f266840 DJ |
16136 | }; |
16137 | ||
c3c76620 | 16138 | static void |
906e58ca | 16139 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
a4fd1a8e | 16140 | struct bfd_link_info *link_info) |
c3c76620 MM |
16141 | { |
16142 | /* BPABI objects are never loaded directly by an OS kernel; they are | |
16143 | processed by a postlinker first, into an OS-specific format. If | |
16144 | the D_PAGED bit is set on the file, BFD will align segments on | |
16145 | page boundaries, so that an OS can directly map the file. With | |
16146 | BPABI objects, that just results in wasted space. In addition, | |
16147 | because we clear the D_PAGED bit, map_sections_to_segments will | |
16148 | recognize that the program headers should not be mapped into any | |
16149 | loadable segment. */ | |
16150 | abfd->flags &= ~D_PAGED; | |
906e58ca | 16151 | elf32_arm_begin_write_processing (abfd, link_info); |
c3c76620 | 16152 | } |
7f266840 DJ |
16153 | |
16154 | static bfd_boolean | |
906e58ca | 16155 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
b294bdf8 | 16156 | struct bfd_link_info *info) |
7f266840 DJ |
16157 | { |
16158 | struct elf_segment_map *m; | |
16159 | asection *dynsec; | |
16160 | ||
7f266840 DJ |
16161 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
16162 | segment. However, because the .dynamic section is not marked | |
16163 | with SEC_LOAD, the generic ELF code will not create such a | |
16164 | segment. */ | |
16165 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); | |
16166 | if (dynsec) | |
16167 | { | |
12bd6957 | 16168 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
8ded5a0f AM |
16169 | if (m->p_type == PT_DYNAMIC) |
16170 | break; | |
16171 | ||
16172 | if (m == NULL) | |
16173 | { | |
16174 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); | |
12bd6957 AM |
16175 | m->next = elf_seg_map (abfd); |
16176 | elf_seg_map (abfd) = m; | |
8ded5a0f | 16177 | } |
7f266840 DJ |
16178 | } |
16179 | ||
b294bdf8 MM |
16180 | /* Also call the generic arm routine. */ |
16181 | return elf32_arm_modify_segment_map (abfd, info); | |
7f266840 DJ |
16182 | } |
16183 | ||
95720a86 DJ |
16184 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
16185 | or (bfd_vma) -1 if it should not be included. */ | |
16186 | ||
16187 | static bfd_vma | |
16188 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, | |
16189 | const arelent *rel ATTRIBUTE_UNUSED) | |
16190 | { | |
16191 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; | |
16192 | } | |
16193 | ||
16194 | ||
8029a119 | 16195 | #undef elf32_bed |
7f266840 DJ |
16196 | #define elf32_bed elf32_arm_symbian_bed |
16197 | ||
16198 | /* The dynamic sections are not allocated on SymbianOS; the postlinker | |
16199 | will process them and then discard them. */ | |
906e58ca | 16200 | #undef ELF_DYNAMIC_SEC_FLAGS |
7f266840 DJ |
16201 | #define ELF_DYNAMIC_SEC_FLAGS \ |
16202 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) | |
16203 | ||
00a97672 | 16204 | #undef elf_backend_emit_relocs |
c3c76620 | 16205 | |
906e58ca NC |
16206 | #undef bfd_elf32_bfd_link_hash_table_create |
16207 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create | |
16208 | #undef elf_backend_special_sections | |
16209 | #define elf_backend_special_sections elf32_arm_symbian_special_sections | |
16210 | #undef elf_backend_begin_write_processing | |
16211 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing | |
16212 | #undef elf_backend_final_write_processing | |
16213 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
16214 | ||
16215 | #undef elf_backend_modify_segment_map | |
7f266840 DJ |
16216 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
16217 | ||
16218 | /* There is no .got section for BPABI objects, and hence no header. */ | |
906e58ca | 16219 | #undef elf_backend_got_header_size |
7f266840 DJ |
16220 | #define elf_backend_got_header_size 0 |
16221 | ||
16222 | /* Similarly, there is no .got.plt section. */ | |
906e58ca | 16223 | #undef elf_backend_want_got_plt |
7f266840 DJ |
16224 | #define elf_backend_want_got_plt 0 |
16225 | ||
906e58ca | 16226 | #undef elf_backend_plt_sym_val |
95720a86 DJ |
16227 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
16228 | ||
906e58ca | 16229 | #undef elf_backend_may_use_rel_p |
00a97672 | 16230 | #define elf_backend_may_use_rel_p 1 |
906e58ca | 16231 | #undef elf_backend_may_use_rela_p |
00a97672 | 16232 | #define elf_backend_may_use_rela_p 0 |
906e58ca | 16233 | #undef elf_backend_default_use_rela_p |
00a97672 | 16234 | #define elf_backend_default_use_rela_p 0 |
906e58ca | 16235 | #undef elf_backend_want_plt_sym |
00a97672 | 16236 | #define elf_backend_want_plt_sym 0 |
906e58ca | 16237 | #undef ELF_MAXPAGESIZE |
00a97672 | 16238 | #define ELF_MAXPAGESIZE 0x8000 |
4e7fd91e | 16239 | |
7f266840 | 16240 | #include "elf32-target.h" |