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[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
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252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
e6a6bb22 3 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840 231 FALSE, /* partial_inplace */
7f6ab9f8
AM		 232 0x07ff2fff, /* src_mask */
233 0x07ff2fff, /* dst_mask */
7f266840
DJ		 234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840 263
0855e32b 264 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 265 0, /* rightshift */
0855e32b
NS		 266 2, /* size (0 = byte, 1 = short, 2 = long) */
267 32, /* bitsize */
7f266840
DJ		 268 FALSE, /* pc_relative */
269 0, /* bitpos */
0855e32b 270 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 271 bfd_elf_generic_reloc, /* special_function */
0855e32b 272 "R_ARM_TLS_DESC", /* name */
7f266840 273 FALSE, /* partial_inplace */
0855e32b
NS		 274 0xffffffff, /* src_mask */
275 0xffffffff, /* dst_mask */
7f266840
DJ		 276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 296 24, /* bitsize */
7f266840
DJ		 297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 311 24, /* bitsize */
7f266840
DJ		 312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
7f6ab9f8
AM		 318 0x07ff2fff, /* src_mask */
319 0x07ff2fff, /* dst_mask */
7f266840
DJ		 320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
0855e32b
NS		 1355 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1356 0, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 32, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_bitfield,/* complain_on_overflow */
1362 NULL, /* special_function */
1363 "R_ARM_TLS_GOTDESC", /* name */
1364 TRUE, /* partial_inplace */
1365 0xffffffff, /* src_mask */
1366 0xffffffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 HOWTO (R_ARM_TLS_CALL, /* type */
1370 0, /* rightshift */
1371 2, /* size (0 = byte, 1 = short, 2 = long) */
1372 24, /* bitsize */
1373 FALSE, /* pc_relative */
1374 0, /* bitpos */
1375 complain_overflow_dont,/* complain_on_overflow */
1376 bfd_elf_generic_reloc, /* special_function */
1377 "R_ARM_TLS_CALL", /* name */
1378 FALSE, /* partial_inplace */
1379 0x00ffffff, /* src_mask */
1380 0x00ffffff, /* dst_mask */
1381 FALSE), /* pcrel_offset */
1382
1383 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1384 0, /* rightshift */
1385 2, /* size (0 = byte, 1 = short, 2 = long) */
1386 0, /* bitsize */
1387 FALSE, /* pc_relative */
1388 0, /* bitpos */
1389 complain_overflow_bitfield,/* complain_on_overflow */
1390 bfd_elf_generic_reloc, /* special_function */
1391 "R_ARM_TLS_DESCSEQ", /* name */
1392 FALSE, /* partial_inplace */
1393 0x00000000, /* src_mask */
1394 0x00000000, /* dst_mask */
1395 FALSE), /* pcrel_offset */
1396
1397 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1398 0, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 24, /* bitsize */
1401 FALSE, /* pc_relative */
1402 0, /* bitpos */
1403 complain_overflow_dont,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_ARM_THM_TLS_CALL", /* name */
1406 FALSE, /* partial_inplace */
1407 0x07ff07ff, /* src_mask */
1408 0x07ff07ff, /* dst_mask */
1409 FALSE), /* pcrel_offset */
c19d1205
ZW		 1410
1411 HOWTO (R_ARM_PLT32_ABS, /* type */
1412 0, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 32, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_ARM_PLT32_ABS", /* name */
1420 FALSE, /* partial_inplace */
1421 0xffffffff, /* src_mask */
1422 0xffffffff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424
1425 HOWTO (R_ARM_GOT_ABS, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 32, /* bitsize */
1429 FALSE, /* pc_relative */
1430 0, /* bitpos */
1431 complain_overflow_dont,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_ARM_GOT_ABS", /* name */
1434 FALSE, /* partial_inplace */
1435 0xffffffff, /* src_mask */
1436 0xffffffff, /* dst_mask */
1437 FALSE), /* pcrel_offset */
1438
1439 HOWTO (R_ARM_GOT_PREL, /* type */
1440 0, /* rightshift */
1441 2, /* size (0 = byte, 1 = short, 2 = long) */
1442 32, /* bitsize */
1443 TRUE, /* pc_relative */
1444 0, /* bitpos */
1445 complain_overflow_dont, /* complain_on_overflow */
1446 bfd_elf_generic_reloc, /* special_function */
1447 "R_ARM_GOT_PREL", /* name */
1448 FALSE, /* partial_inplace */
1449 0xffffffff, /* src_mask */
1450 0xffffffff, /* dst_mask */
1451 TRUE), /* pcrel_offset */
1452
1453 HOWTO (R_ARM_GOT_BREL12, /* type */
1454 0, /* rightshift */
1455 2, /* size (0 = byte, 1 = short, 2 = long) */
1456 12, /* bitsize */
1457 FALSE, /* pc_relative */
1458 0, /* bitpos */
1459 complain_overflow_bitfield,/* complain_on_overflow */
1460 bfd_elf_generic_reloc, /* special_function */
1461 "R_ARM_GOT_BREL12", /* name */
1462 FALSE, /* partial_inplace */
1463 0x00000fff, /* src_mask */
1464 0x00000fff, /* dst_mask */
1465 FALSE), /* pcrel_offset */
1466
1467 HOWTO (R_ARM_GOTOFF12, /* type */
1468 0, /* rightshift */
1469 2, /* size (0 = byte, 1 = short, 2 = long) */
1470 12, /* bitsize */
1471 FALSE, /* pc_relative */
1472 0, /* bitpos */
1473 complain_overflow_bitfield,/* complain_on_overflow */
1474 bfd_elf_generic_reloc, /* special_function */
1475 "R_ARM_GOTOFF12", /* name */
1476 FALSE, /* partial_inplace */
1477 0x00000fff, /* src_mask */
1478 0x00000fff, /* dst_mask */
1479 FALSE), /* pcrel_offset */
1480
1481 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1482
1483 /* GNU extension to record C++ vtable member usage */
1484 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1485 0, /* rightshift */
1486 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1487 0, /* bitsize */
ba93b8ac
DJ		 1488 FALSE, /* pc_relative */
1489 0, /* bitpos */
c19d1205
ZW		 1490 complain_overflow_dont, /* complain_on_overflow */
1491 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1492 "R_ARM_GNU_VTENTRY", /* name */
1493 FALSE, /* partial_inplace */
1494 0, /* src_mask */
1495 0, /* dst_mask */
1496 FALSE), /* pcrel_offset */
1497
1498 /* GNU extension to record C++ vtable hierarchy */
1499 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1500 0, /* rightshift */
1501 2, /* size (0 = byte, 1 = short, 2 = long) */
1502 0, /* bitsize */
1503 FALSE, /* pc_relative */
1504 0, /* bitpos */
1505 complain_overflow_dont, /* complain_on_overflow */
1506 NULL, /* special_function */
1507 "R_ARM_GNU_VTINHERIT", /* name */
1508 FALSE, /* partial_inplace */
1509 0, /* src_mask */
1510 0, /* dst_mask */
1511 FALSE), /* pcrel_offset */
1512
1513 HOWTO (R_ARM_THM_JUMP11, /* type */
1514 1, /* rightshift */
1515 1, /* size (0 = byte, 1 = short, 2 = long) */
1516 11, /* bitsize */
1517 TRUE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_signed, /* complain_on_overflow */
1520 bfd_elf_generic_reloc, /* special_function */
1521 "R_ARM_THM_JUMP11", /* name */
1522 FALSE, /* partial_inplace */
1523 0x000007ff, /* src_mask */
1524 0x000007ff, /* dst_mask */
1525 TRUE), /* pcrel_offset */
1526
1527 HOWTO (R_ARM_THM_JUMP8, /* type */
1528 1, /* rightshift */
1529 1, /* size (0 = byte, 1 = short, 2 = long) */
1530 8, /* bitsize */
1531 TRUE, /* pc_relative */
1532 0, /* bitpos */
1533 complain_overflow_signed, /* complain_on_overflow */
1534 bfd_elf_generic_reloc, /* special_function */
1535 "R_ARM_THM_JUMP8", /* name */
1536 FALSE, /* partial_inplace */
1537 0x000000ff, /* src_mask */
1538 0x000000ff, /* dst_mask */
1539 TRUE), /* pcrel_offset */
ba93b8ac 1540
c19d1205
ZW		 1541 /* TLS relocations */
1542 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 32, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1549 NULL, /* special_function */
1550 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1551 TRUE, /* partial_inplace */
1552 0xffffffff, /* src_mask */
1553 0xffffffff, /* dst_mask */
c19d1205 1554 FALSE), /* pcrel_offset */
ba93b8ac 1555
ba93b8ac
DJ		 1556 HOWTO (R_ARM_TLS_LDM32, /* type */
1557 0, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 32, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_bitfield,/* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_ARM_TLS_LDM32", /* name */
1565 TRUE, /* partial_inplace */
1566 0xffffffff, /* src_mask */
1567 0xffffffff, /* dst_mask */
c19d1205 1568 FALSE), /* pcrel_offset */
ba93b8ac 1569
c19d1205 1570 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1571 0, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 32, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_bitfield,/* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
c19d1205 1578 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1579 TRUE, /* partial_inplace */
1580 0xffffffff, /* src_mask */
1581 0xffffffff, /* dst_mask */
c19d1205 1582 FALSE), /* pcrel_offset */
ba93b8ac 1583
ba93b8ac
DJ		 1584 HOWTO (R_ARM_TLS_IE32, /* type */
1585 0, /* rightshift */
1586 2, /* size (0 = byte, 1 = short, 2 = long) */
1587 32, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_bitfield,/* complain_on_overflow */
1591 NULL, /* special_function */
1592 "R_ARM_TLS_IE32", /* name */
1593 TRUE, /* partial_inplace */
1594 0xffffffff, /* src_mask */
1595 0xffffffff, /* dst_mask */
c19d1205 1596 FALSE), /* pcrel_offset */
7f266840 1597
c19d1205 1598 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1599 0, /* rightshift */
1600 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1601 32, /* bitsize */
7f266840
DJ		 1602 FALSE, /* pc_relative */
1603 0, /* bitpos */
c19d1205
ZW		 1604 complain_overflow_bitfield,/* complain_on_overflow */
1605 bfd_elf_generic_reloc, /* special_function */
1606 "R_ARM_TLS_LE32", /* name */
1607 TRUE, /* partial_inplace */
1608 0xffffffff, /* src_mask */
1609 0xffffffff, /* dst_mask */
1610 FALSE), /* pcrel_offset */
7f266840 1611
c19d1205
ZW		 1612 HOWTO (R_ARM_TLS_LDO12, /* type */
1613 0, /* rightshift */
1614 2, /* size (0 = byte, 1 = short, 2 = long) */
1615 12, /* bitsize */
1616 FALSE, /* pc_relative */
7f266840 1617 0, /* bitpos */
c19d1205 1618 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1619 bfd_elf_generic_reloc, /* special_function */
c19d1205 1620 "R_ARM_TLS_LDO12", /* name */
7f266840 1621 FALSE, /* partial_inplace */
c19d1205
ZW		 1622 0x00000fff, /* src_mask */
1623 0x00000fff, /* dst_mask */
1624 FALSE), /* pcrel_offset */
7f266840 1625
c19d1205
ZW		 1626 HOWTO (R_ARM_TLS_LE12, /* type */
1627 0, /* rightshift */
1628 2, /* size (0 = byte, 1 = short, 2 = long) */
1629 12, /* bitsize */
1630 FALSE, /* pc_relative */
7f266840 1631 0, /* bitpos */
c19d1205 1632 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1633 bfd_elf_generic_reloc, /* special_function */
c19d1205 1634 "R_ARM_TLS_LE12", /* name */
7f266840 1635 FALSE, /* partial_inplace */
c19d1205
ZW		 1636 0x00000fff, /* src_mask */
1637 0x00000fff, /* dst_mask */
1638 FALSE), /* pcrel_offset */
7f266840 1639
c19d1205 1640 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1641 0, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1643 12, /* bitsize */
1644 FALSE, /* pc_relative */
7f266840 1645 0, /* bitpos */
c19d1205 1646 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1647 bfd_elf_generic_reloc, /* special_function */
c19d1205 1648 "R_ARM_TLS_IE12GP", /* name */
7f266840 1649 FALSE, /* partial_inplace */
c19d1205
ZW		 1650 0x00000fff, /* src_mask */
1651 0x00000fff, /* dst_mask */
1652 FALSE), /* pcrel_offset */
0855e32b 1653
34e77a92 1654 /* 112-127 private relocations. */
0855e32b
NS		 1655 EMPTY_HOWTO (112),
1656 EMPTY_HOWTO (113),
1657 EMPTY_HOWTO (114),
1658 EMPTY_HOWTO (115),
1659 EMPTY_HOWTO (116),
1660 EMPTY_HOWTO (117),
1661 EMPTY_HOWTO (118),
1662 EMPTY_HOWTO (119),
1663 EMPTY_HOWTO (120),
1664 EMPTY_HOWTO (121),
1665 EMPTY_HOWTO (122),
1666 EMPTY_HOWTO (123),
1667 EMPTY_HOWTO (124),
1668 EMPTY_HOWTO (125),
1669 EMPTY_HOWTO (126),
1670 EMPTY_HOWTO (127),
34e77a92
RS		 1671
1672 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1673 EMPTY_HOWTO (128),
1674
1675 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1676 0, /* rightshift */
1677 1, /* size (0 = byte, 1 = short, 2 = long) */
1678 0, /* bitsize */
1679 FALSE, /* pc_relative */
1680 0, /* bitpos */
1681 complain_overflow_bitfield,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_ARM_THM_TLS_DESCSEQ",/* name */
1684 FALSE, /* partial_inplace */
1685 0x00000000, /* src_mask */
1686 0x00000000, /* dst_mask */
1687 FALSE), /* pcrel_offset */
c19d1205
ZW		 1688};
1689
34e77a92
RS		 1690/* 160 onwards: */
1691static reloc_howto_type elf32_arm_howto_table_2[1] =
1692{
1693 HOWTO (R_ARM_IRELATIVE, /* type */
1694 0, /* rightshift */
1695 2, /* size (0 = byte, 1 = short, 2 = long) */
1696 32, /* bitsize */
1697 FALSE, /* pc_relative */
1698 0, /* bitpos */
1699 complain_overflow_bitfield,/* complain_on_overflow */
1700 bfd_elf_generic_reloc, /* special_function */
1701 "R_ARM_IRELATIVE", /* name */
1702 TRUE, /* partial_inplace */
1703 0xffffffff, /* src_mask */
1704 0xffffffff, /* dst_mask */
1705 FALSE) /* pcrel_offset */
1706};
c19d1205 1707
34e77a92
RS		 1708/* 249-255 extended, currently unused, relocations: */
1709static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1710{
1711 HOWTO (R_ARM_RREL32, /* type */
1712 0, /* rightshift */
1713 0, /* size (0 = byte, 1 = short, 2 = long) */
1714 0, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont,/* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_ARM_RREL32", /* name */
1720 FALSE, /* partial_inplace */
1721 0, /* src_mask */
1722 0, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 HOWTO (R_ARM_RABS32, /* type */
1726 0, /* rightshift */
1727 0, /* size (0 = byte, 1 = short, 2 = long) */
1728 0, /* bitsize */
1729 FALSE, /* pc_relative */
1730 0, /* bitpos */
1731 complain_overflow_dont,/* complain_on_overflow */
1732 bfd_elf_generic_reloc, /* special_function */
1733 "R_ARM_RABS32", /* name */
1734 FALSE, /* partial_inplace */
1735 0, /* src_mask */
1736 0, /* dst_mask */
1737 FALSE), /* pcrel_offset */
1738
1739 HOWTO (R_ARM_RPC24, /* type */
1740 0, /* rightshift */
1741 0, /* size (0 = byte, 1 = short, 2 = long) */
1742 0, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont,/* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_ARM_RPC24", /* name */
1748 FALSE, /* partial_inplace */
1749 0, /* src_mask */
1750 0, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752
1753 HOWTO (R_ARM_RBASE, /* type */
1754 0, /* rightshift */
1755 0, /* size (0 = byte, 1 = short, 2 = long) */
1756 0, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_dont,/* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_ARM_RBASE", /* name */
1762 FALSE, /* partial_inplace */
1763 0, /* src_mask */
1764 0, /* dst_mask */
1765 FALSE) /* pcrel_offset */
1766};
1767
1768static reloc_howto_type *
1769elf32_arm_howto_from_type (unsigned int r_type)
1770{
906e58ca 1771 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1772 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1773
34e77a92
RS		 1774 if (r_type == R_ARM_IRELATIVE)
1775 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1776
c19d1205 1777 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1778 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1779 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1780
c19d1205 1781 return NULL;
7f266840
DJ		 1782}
1783
1784static void
1785elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1786 Elf_Internal_Rela * elf_reloc)
1787{
1788 unsigned int r_type;
1789
1790 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1791 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1792}
1793
1794struct elf32_arm_reloc_map
1795 {
1796 bfd_reloc_code_real_type bfd_reloc_val;
1797 unsigned char elf_reloc_val;
1798 };
1799
1800/* All entries in this list must also be present in elf32_arm_howto_table. */
1801static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1802 {
1803 {BFD_RELOC_NONE, R_ARM_NONE},
1804 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1805 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1806 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1807 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1808 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1809 {BFD_RELOC_32, R_ARM_ABS32},
1810 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1811 {BFD_RELOC_8, R_ARM_ABS8},
1812 {BFD_RELOC_16, R_ARM_ABS16},
1813 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1814 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1815 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1816 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1821 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1822 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1823 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1824 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1825 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1826 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1827 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1828 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1829 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1830 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1831 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1832 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1833 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1834 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1835 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1836 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1837 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1838 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1839 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1840 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1841 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1842 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1843 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1844 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1845 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1846 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1847 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1848 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1849 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1850 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1851 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1852 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1853 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1854 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1855 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1856 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1858 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1860 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1861 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1862 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1864 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1865 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1866 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1867 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1868 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1869 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1870 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1871 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1872 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1873 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1874 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1875 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1876 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1878 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1879 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1880 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1881 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1882 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1883 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1884 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1885 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1886 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1887 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1888 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1889 };
1890
1891static reloc_howto_type *
f1c71a59
ZW		 1892elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1893 bfd_reloc_code_real_type code)
7f266840
DJ		 1894{
1895 unsigned int i;
8029a119 1896
906e58ca 1897 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1898 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1899 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1900
c19d1205 1901 return NULL;
7f266840
DJ		 1902}
1903
157090f7
AM		 1904static reloc_howto_type *
1905elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1906 const char *r_name)
1907{
1908 unsigned int i;
1909
906e58ca 1910 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1911 if (elf32_arm_howto_table_1[i].name != NULL
1912 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1913 return &elf32_arm_howto_table_1[i];
1914
906e58ca 1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1916 if (elf32_arm_howto_table_2[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_2[i];
1919
34e77a92
RS		 1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1921 if (elf32_arm_howto_table_3[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_3[i];
1924
157090f7
AM		 1925 return NULL;
1926}
1927
906e58ca
NC		 1928/* Support for core dump NOTE sections. */
1929
7f266840 1930static bfd_boolean
f1c71a59 1931elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1932{
1933 int offset;
1934 size_t size;
1935
1936 switch (note->descsz)
1937 {
1938 default:
1939 return FALSE;
1940
8029a119 1941 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1942 /* pr_cursig */
1943 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1944
1945 /* pr_pid */
261b8d08 1946 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1947
1948 /* pr_reg */
1949 offset = 72;
1950 size = 72;
1951
1952 break;
1953 }
1954
1955 /* Make a ".reg/999" section. */
1956 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1957 size, note->descpos + offset);
1958}
1959
1960static bfd_boolean
f1c71a59 1961elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1962{
1963 switch (note->descsz)
1964 {
1965 default:
1966 return FALSE;
1967
8029a119 1968 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1969 elf_tdata (abfd)->core_program
1970 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1971 elf_tdata (abfd)->core_command
1972 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1973 }
1974
1975 /* Note that for some reason, a spurious space is tacked
1976 onto the end of the args in some (at least one anyway)
1977 implementations, so strip it off if it exists. */
7f266840
DJ		 1978 {
1979 char *command = elf_tdata (abfd)->core_command;
1980 int n = strlen (command);
1981
1982 if (0 < n && command[n - 1] == ' ')
1983 command[n - 1] = '\0';
1984 }
1985
1986 return TRUE;
1987}
1988
1989#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1990#define TARGET_LITTLE_NAME "elf32-littlearm"
1991#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1992#define TARGET_BIG_NAME "elf32-bigarm"
1993
1994#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1995#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1996
252b5132
RH		 1997typedef unsigned long int insn32;
1998typedef unsigned short int insn16;
1999
3a4a14e9
PB		 2000/* In lieu of proper flags, assume all EABIv4 or later objects are
2001 interworkable. */
57e8b36a 2002#define INTERWORK_FLAG(abfd) \
3a4a14e9 2003 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2004 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2005 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2006
252b5132
RH		 2007/* The linker script knows the section names for placement.
2008 The entry_names are used to do simple name mangling on the stubs.
2009 Given a function name, and its type, the stub can be found. The
9b485d32 2010 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2011#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2012#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2013
2014#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2015#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2016
c7b8f16e
JB		 2017#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2018#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2019
845b51d6
PB		 2020#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2021#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2022
7413f23f
DJ		 2023#define STUB_ENTRY_NAME "__%s_veneer"
2024
252b5132
RH		 2025/* The name of the dynamic interpreter. This is put in the .interp
2026 section. */
2027#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2028
0855e32b
NS		 2029static const unsigned long tls_trampoline [] =
2030 {
2031 0xe08e0000, /* add r0, lr, r0 */
2032 0xe5901004, /* ldr r1, [r0,#4] */
2033 0xe12fff11, /* bx r1 */
2034 };
2035
2036static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2037 {
2038 0xe52d2004, /* push {r2} */
2039 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2040 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2041 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2042 0xe081100f, /* 2: add r1, pc */
2043 0xe12fff12, /* bx r2 */
2044 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2045 + dl_tlsdesc_lazy_resolver(GOT) */
2046 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2047 };
2048
5e681ec4
PB		 2049#ifdef FOUR_WORD_PLT
2050
252b5132
RH		 2051/* The first entry in a procedure linkage table looks like
2052 this. It is set up so that any shared library function that is
59f2c4e7 2053 called before the relocation has been set up calls the dynamic
9b485d32 2054 linker first. */
e5a52504 2055static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 2056 {
2057 0xe52de004, /* str lr, [sp, #-4]! */
2058 0xe59fe010, /* ldr lr, [pc, #16] */
2059 0xe08fe00e, /* add lr, pc, lr */
2060 0xe5bef008, /* ldr pc, [lr, #8]! */
2061 };
2062
2063/* Subsequent entries in a procedure linkage table look like
2064 this. */
e5a52504 2065static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2066 {
2067 0xe28fc600, /* add ip, pc, #NN */
2068 0xe28cca00, /* add ip, ip, #NN */
2069 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2070 0x00000000, /* unused */
2071 };
2072
2073#else
2074
5e681ec4
PB		 2075/* The first entry in a procedure linkage table looks like
2076 this. It is set up so that any shared library function that is
2077 called before the relocation has been set up calls the dynamic
2078 linker first. */
e5a52504 2079static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 2080 {
5e681ec4
PB		 2081 0xe52de004, /* str lr, [sp, #-4]! */
2082 0xe59fe004, /* ldr lr, [pc, #4] */
2083 0xe08fe00e, /* add lr, pc, lr */
2084 0xe5bef008, /* ldr pc, [lr, #8]! */
2085 0x00000000, /* &GOT[0] - . */
917583ad 2086 };
252b5132
RH		 2087
2088/* Subsequent entries in a procedure linkage table look like
2089 this. */
e5a52504 2090static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 2091 {
2092 0xe28fc600, /* add ip, pc, #0xNN00000 */
2093 0xe28cca00, /* add ip, ip, #0xNN000 */
2094 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2095 };
2096
2097#endif
252b5132 2098
00a97672
RS		 2099/* The format of the first entry in the procedure linkage table
2100 for a VxWorks executable. */
2101static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2102 {
2103 0xe52dc008, /* str ip,[sp,#-8]! */
2104 0xe59fc000, /* ldr ip,[pc] */
2105 0xe59cf008, /* ldr pc,[ip,#8] */
2106 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2107 };
2108
2109/* The format of subsequent entries in a VxWorks executable. */
2110static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2111 {
2112 0xe59fc000, /* ldr ip,[pc] */
2113 0xe59cf000, /* ldr pc,[ip] */
2114 0x00000000, /* .long @got */
2115 0xe59fc000, /* ldr ip,[pc] */
2116 0xea000000, /* b _PLT */
2117 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2118 };
2119
2120/* The format of entries in a VxWorks shared library. */
2121static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2122 {
2123 0xe59fc000, /* ldr ip,[pc] */
2124 0xe79cf009, /* ldr pc,[ip,r9] */
2125 0x00000000, /* .long @got */
2126 0xe59fc000, /* ldr ip,[pc] */
2127 0xe599f008, /* ldr pc,[r9,#8] */
2128 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2129 };
2130
b7693d02
DJ		 2131/* An initial stub used if the PLT entry is referenced from Thumb code. */
2132#define PLT_THUMB_STUB_SIZE 4
2133static const bfd_vma elf32_arm_plt_thumb_stub [] =
2134 {
2135 0x4778, /* bx pc */
2136 0x46c0 /* nop */
2137 };
2138
e5a52504
MM		 2139/* The entries in a PLT when using a DLL-based target with multiple
2140 address spaces. */
906e58ca 2141static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2142 {
83a358aa 2143 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2144 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2145 };
2146
906e58ca
NC		 2147#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2148#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2149#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2150#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2151#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2152#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2153
461a49ca
DJ		 2154enum stub_insn_type
2155 {
2156 THUMB16_TYPE = 1,
2157 THUMB32_TYPE,
2158 ARM_TYPE,
2159 DATA_TYPE
2160 };
2161
48229727
JB		 2162#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2163/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2164 is inserted in arm_build_one_stub(). */
2165#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2166#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2167#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2168#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2169#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2170#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2171
2172typedef struct
2173{
2174 bfd_vma data;
2175 enum stub_insn_type type;
ebe24dd4 2176 unsigned int r_type;
461a49ca
DJ		 2177 int reloc_addend;
2178} insn_sequence;
2179
fea2b4d6
CL		 2180/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2181 to reach the stub if necessary. */
461a49ca 2182static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2183 {
461a49ca
DJ		 2184 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2185 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2186 };
2187
fea2b4d6
CL		 2188/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2189 available. */
461a49ca 2190static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2191 {
461a49ca
DJ		 2192 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2193 ARM_INSN(0xe12fff1c), /* bx ip */
2194 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2195 };
2196
d3626fb0 2197/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2198static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2199 {
461a49ca
DJ		 2200 THUMB16_INSN(0xb401), /* push {r0} */
2201 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2202 THUMB16_INSN(0x4684), /* mov ip, r0 */
2203 THUMB16_INSN(0xbc01), /* pop {r0} */
2204 THUMB16_INSN(0x4760), /* bx ip */
2205 THUMB16_INSN(0xbf00), /* nop */
2206 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2207 };
2208
d3626fb0
CL		 2209/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2210 allowed. */
2211static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2212 {
2213 THUMB16_INSN(0x4778), /* bx pc */
2214 THUMB16_INSN(0x46c0), /* nop */
2215 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2216 ARM_INSN(0xe12fff1c), /* bx ip */
2217 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2218 };
2219
fea2b4d6
CL		 2220/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2221 available. */
461a49ca 2222static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2223 {
461a49ca
DJ		 2224 THUMB16_INSN(0x4778), /* bx pc */
2225 THUMB16_INSN(0x46c0), /* nop */
2226 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2227 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2228 };
2229
fea2b4d6
CL		 2230/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2231 one, when the destination is close enough. */
461a49ca 2232static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2233 {
461a49ca
DJ		 2234 THUMB16_INSN(0x4778), /* bx pc */
2235 THUMB16_INSN(0x46c0), /* nop */
2236 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2237 };
2238
cf3eccff 2239/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2240 blx to reach the stub if necessary. */
cf3eccff 2241static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2242 {
9ae92b05 2243 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */
461a49ca
DJ		 2244 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2245 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2246 };
2247
cf3eccff
DJ		 2248/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2249 blx to reach the stub if necessary. We can not add into pc;
2250 it is not guaranteed to mode switch (different in ARMv6 and
2251 ARMv7). */
2252static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2253 {
9ae92b05 2254 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
cf3eccff
DJ		 2255 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2256 ARM_INSN(0xe12fff1c), /* bx ip */
2257 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2258 };
2259
ebe24dd4
CL		 2260/* V4T ARM -> ARM long branch stub, PIC. */
2261static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2262 {
2263 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2264 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2265 ARM_INSN(0xe12fff1c), /* bx ip */
2266 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2267 };
2268
2269/* V4T Thumb -> ARM long branch stub, PIC. */
2270static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2271 {
2272 THUMB16_INSN(0x4778), /* bx pc */
2273 THUMB16_INSN(0x46c0), /* nop */
2274 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2275 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2276 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2277 };
2278
d3626fb0
CL		 2279/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2280 architectures. */
ebe24dd4
CL		 2281static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2282 {
2283 THUMB16_INSN(0xb401), /* push {r0} */
2284 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2285 THUMB16_INSN(0x46fc), /* mov ip, pc */
2286 THUMB16_INSN(0x4484), /* add ip, r0 */
2287 THUMB16_INSN(0xbc01), /* pop {r0} */
2288 THUMB16_INSN(0x4760), /* bx ip */
2289 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2290 };
2291
d3626fb0
CL		 2292/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2293 allowed. */
2294static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2295 {
2296 THUMB16_INSN(0x4778), /* bx pc */
2297 THUMB16_INSN(0x46c0), /* nop */
2298 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2299 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2300 ARM_INSN(0xe12fff1c), /* bx ip */
2301 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2302 };
2303
0855e32b
NS		 2304/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2305 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2306static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2307{
2308 ARM_INSN(0xe59f1000), /* ldr r1, [pc] */
2309 ARM_INSN(0xe08ff001), /* add pc, pc, r1 */
2310 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2311};
2312
2313/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2314 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2315static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2316{
2317 THUMB16_INSN(0x4778), /* bx pc */
2318 THUMB16_INSN(0x46c0), /* nop */
2319 ARM_INSN(0xe59f1000), /* ldr r1, [pc, #0] */
2320 ARM_INSN(0xe081f00f), /* add pc, r1, pc */
2321 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2322};
2323
48229727
JB		 2324/* Cortex-A8 erratum-workaround stubs. */
2325
2326/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2327 can't use a conditional branch to reach this stub). */
2328
2329static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2330 {
2331 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2332 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2333 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2334 };
2335
2336/* Stub used for b.w and bl.w instructions. */
2337
2338static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2339 {
2340 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2341 };
2342
2343static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2344 {
2345 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2346 };
2347
2348/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2349 instruction (which switches to ARM mode) to point to this stub. Jump to the
2350 real destination using an ARM-mode branch. */
2351
2352static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2353 {
2354 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2355 };
2356
906e58ca
NC		 2357/* Section name for stubs is the associated section name plus this
2358 string. */
2359#define STUB_SUFFIX ".stub"
2360
738a79f6
CL		 2361/* One entry per long/short branch stub defined above. */
2362#define DEF_STUBS \
2363 DEF_STUB(long_branch_any_any) \
2364 DEF_STUB(long_branch_v4t_arm_thumb) \
2365 DEF_STUB(long_branch_thumb_only) \
2366 DEF_STUB(long_branch_v4t_thumb_thumb) \
2367 DEF_STUB(long_branch_v4t_thumb_arm) \
2368 DEF_STUB(short_branch_v4t_thumb_arm) \
2369 DEF_STUB(long_branch_any_arm_pic) \
2370 DEF_STUB(long_branch_any_thumb_pic) \
2371 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2372 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2373 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2374 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2375 DEF_STUB(long_branch_any_tls_pic) \
2376 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
48229727
JB		 2377 DEF_STUB(a8_veneer_b_cond) \
2378 DEF_STUB(a8_veneer_b) \
2379 DEF_STUB(a8_veneer_bl) \
2380 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2381
2382#define DEF_STUB(x) arm_stub_##x,
2383enum elf32_arm_stub_type {
906e58ca 2384 arm_stub_none,
738a79f6 2385 DEF_STUBS
eb7c4339
NS		 2386 /* Note the first a8_veneer type */
2387 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2388};
2389#undef DEF_STUB
2390
2391typedef struct
2392{
d3ce72d0 2393 const insn_sequence* template_sequence;
738a79f6
CL		 2394 int template_size;
2395} stub_def;
2396
2397#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2398static const stub_def stub_definitions[] = {
2399 {NULL, 0},
2400 DEF_STUBS
906e58ca
NC		 2401};
2402
2403struct elf32_arm_stub_hash_entry
2404{
2405 /* Base hash table entry structure. */
2406 struct bfd_hash_entry root;
2407
2408 /* The stub section. */
2409 asection *stub_sec;
2410
2411 /* Offset within stub_sec of the beginning of this stub. */
2412 bfd_vma stub_offset;
2413
2414 /* Given the symbol's value and its section we can determine its final
2415 value when building the stubs (so the stub knows where to jump). */
2416 bfd_vma target_value;
2417 asection *target_section;
2418
48229727
JB		 2419 /* Offset to apply to relocation referencing target_value. */
2420 bfd_vma target_addend;
2421
2422 /* The instruction which caused this stub to be generated (only valid for
2423 Cortex-A8 erratum workaround stubs at present). */
2424 unsigned long orig_insn;
2425
461a49ca 2426 /* The stub type. */
906e58ca 2427 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2428 /* Its encoding size in bytes. */
2429 int stub_size;
2430 /* Its template. */
2431 const insn_sequence *stub_template;
2432 /* The size of the template (number of entries). */
2433 int stub_template_size;
906e58ca
NC		 2434
2435 /* The symbol table entry, if any, that this was derived from. */
2436 struct elf32_arm_link_hash_entry *h;
2437
35fc36a8
RS		 2438 /* Type of branch. */
2439 enum arm_st_branch_type branch_type;
906e58ca
NC		 2440
2441 /* Where this stub is being called from, or, in the case of combined
2442 stub sections, the first input section in the group. */
2443 asection *id_sec;
7413f23f
DJ		 2444
2445 /* The name for the local symbol at the start of this stub. The
2446 stub name in the hash table has to be unique; this does not, so
2447 it can be friendlier. */
2448 char *output_name;
906e58ca
NC		 2449};
2450
e489d0ae
PB		 2451/* Used to build a map of a section. This is required for mixed-endian
2452 code/data. */
2453
2454typedef struct elf32_elf_section_map
2455{
2456 bfd_vma vma;
2457 char type;
2458}
2459elf32_arm_section_map;
2460
c7b8f16e
JB		 2461/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2462
2463typedef enum
2464{
2465 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2466 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2467 VFP11_ERRATUM_ARM_VENEER,
2468 VFP11_ERRATUM_THUMB_VENEER
2469}
2470elf32_vfp11_erratum_type;
2471
2472typedef struct elf32_vfp11_erratum_list
2473{
2474 struct elf32_vfp11_erratum_list *next;
2475 bfd_vma vma;
2476 union
2477 {
2478 struct
2479 {
2480 struct elf32_vfp11_erratum_list *veneer;
2481 unsigned int vfp_insn;
2482 } b;
2483 struct
2484 {
2485 struct elf32_vfp11_erratum_list *branch;
2486 unsigned int id;
2487 } v;
2488 } u;
2489 elf32_vfp11_erratum_type type;
2490}
2491elf32_vfp11_erratum_list;
2492
2468f9c9
PB		 2493typedef enum
2494{
2495 DELETE_EXIDX_ENTRY,
2496 INSERT_EXIDX_CANTUNWIND_AT_END
2497}
2498arm_unwind_edit_type;
2499
2500/* A (sorted) list of edits to apply to an unwind table. */
2501typedef struct arm_unwind_table_edit
2502{
2503 arm_unwind_edit_type type;
2504 /* Note: we sometimes want to insert an unwind entry corresponding to a
2505 section different from the one we're currently writing out, so record the
2506 (text) section this edit relates to here. */
2507 asection *linked_section;
2508 unsigned int index;
2509 struct arm_unwind_table_edit *next;
2510}
2511arm_unwind_table_edit;
2512
8e3de13a 2513typedef struct _arm_elf_section_data
e489d0ae 2514{
2468f9c9 2515 /* Information about mapping symbols. */
e489d0ae 2516 struct bfd_elf_section_data elf;
8e3de13a 2517 unsigned int mapcount;
c7b8f16e 2518 unsigned int mapsize;
e489d0ae 2519 elf32_arm_section_map *map;
2468f9c9 2520 /* Information about CPU errata. */
c7b8f16e
JB		 2521 unsigned int erratumcount;
2522 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2523 /* Information about unwind tables. */
2524 union
2525 {
2526 /* Unwind info attached to a text section. */
2527 struct
2528 {
2529 asection *arm_exidx_sec;
2530 } text;
2531
2532 /* Unwind info attached to an .ARM.exidx section. */
2533 struct
2534 {
2535 arm_unwind_table_edit *unwind_edit_list;
2536 arm_unwind_table_edit *unwind_edit_tail;
2537 } exidx;
2538 } u;
8e3de13a
NC		 2539}
2540_arm_elf_section_data;
e489d0ae
PB		 2541
2542#define elf32_arm_section_data(sec) \
8e3de13a 2543 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2544
48229727
JB		 2545/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2546 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2547 so may be created multiple times: we use an array of these entries whilst
2548 relaxing which we can refresh easily, then create stubs for each potentially
2549 erratum-triggering instruction once we've settled on a solution. */
2550
2551struct a8_erratum_fix {
2552 bfd *input_bfd;
2553 asection *section;
2554 bfd_vma offset;
2555 bfd_vma addend;
2556 unsigned long orig_insn;
2557 char *stub_name;
2558 enum elf32_arm_stub_type stub_type;
35fc36a8 2559 enum arm_st_branch_type branch_type;
48229727
JB		 2560};
2561
2562/* A table of relocs applied to branches which might trigger Cortex-A8
2563 erratum. */
2564
2565struct a8_erratum_reloc {
2566 bfd_vma from;
2567 bfd_vma destination;
92750f34
DJ		 2568 struct elf32_arm_link_hash_entry *hash;
2569 const char *sym_name;
48229727 2570 unsigned int r_type;
35fc36a8 2571 enum arm_st_branch_type branch_type;
48229727
JB		 2572 bfd_boolean non_a8_stub;
2573};
2574
ba93b8ac
DJ		 2575/* The size of the thread control block. */
2576#define TCB_SIZE 8
2577
34e77a92
RS		 2578/* ARM-specific information about a PLT entry, over and above the usual
2579 gotplt_union. */
2580struct arm_plt_info {
2581 /* We reference count Thumb references to a PLT entry separately,
2582 so that we can emit the Thumb trampoline only if needed. */
2583 bfd_signed_vma thumb_refcount;
2584
2585 /* Some references from Thumb code may be eliminated by BL->BLX
2586 conversion, so record them separately. */
2587 bfd_signed_vma maybe_thumb_refcount;
2588
2589 /* How many of the recorded PLT accesses were from non-call relocations.
2590 This information is useful when deciding whether anything takes the
2591 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2592 non-call references to the function should resolve directly to the
2593 real runtime target. */
2594 unsigned int noncall_refcount;
2595
2596 /* Since PLT entries have variable size if the Thumb prologue is
2597 used, we need to record the index into .got.plt instead of
2598 recomputing it from the PLT offset. */
2599 bfd_signed_vma got_offset;
2600};
2601
2602/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2603struct arm_local_iplt_info {
2604 /* The information that is usually found in the generic ELF part of
2605 the hash table entry. */
2606 union gotplt_union root;
2607
2608 /* The information that is usually found in the ARM-specific part of
2609 the hash table entry. */
2610 struct arm_plt_info arm;
2611
2612 /* A list of all potential dynamic relocations against this symbol. */
2613 struct elf_dyn_relocs *dyn_relocs;
2614};
2615
0ffa91dd 2616struct elf_arm_obj_tdata
ba93b8ac
DJ		 2617{
2618 struct elf_obj_tdata root;
2619
2620 /* tls_type for each local got entry. */
2621 char *local_got_tls_type;
ee065d83 2622
0855e32b
NS		 2623 /* GOTPLT entries for TLS descriptors. */
2624 bfd_vma *local_tlsdesc_gotent;
2625
34e77a92
RS		 2626 /* Information for local symbols that need entries in .iplt. */
2627 struct arm_local_iplt_info **local_iplt;
2628
bf21ed78
MS		 2629 /* Zero to warn when linking objects with incompatible enum sizes. */
2630 int no_enum_size_warning;
a9dc9481
JM		 2631
2632 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2633 int no_wchar_size_warning;
ba93b8ac
DJ		 2634};
2635
0ffa91dd
NC		 2636#define elf_arm_tdata(bfd) \
2637 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2638
0ffa91dd
NC		 2639#define elf32_arm_local_got_tls_type(bfd) \
2640 (elf_arm_tdata (bfd)->local_got_tls_type)
2641
0855e32b
NS		 2642#define elf32_arm_local_tlsdesc_gotent(bfd) \
2643 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2644
34e77a92
RS		 2645#define elf32_arm_local_iplt(bfd) \
2646 (elf_arm_tdata (bfd)->local_iplt)
2647
0ffa91dd
NC		 2648#define is_arm_elf(bfd) \
2649 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2650 && elf_tdata (bfd) != NULL \
4dfe6ac6 2651 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2652
2653static bfd_boolean
2654elf32_arm_mkobject (bfd *abfd)
2655{
0ffa91dd 2656 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2657 ARM_ELF_DATA);
ba93b8ac
DJ		 2658}
2659
ba93b8ac
DJ		 2660#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2661
ba96a88f 2662/* Arm ELF linker hash entry. */
252b5132 2663struct elf32_arm_link_hash_entry
917583ad
NC		 2664 {
2665 struct elf_link_hash_entry root;
252b5132 2666
0bdcacaf
RS		 2667 /* Track dynamic relocs copied for this symbol. */
2668 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2669
34e77a92
RS		 2670 /* ARM-specific PLT information. */
2671 struct arm_plt_info plt;
ba93b8ac
DJ		 2672
2673#define GOT_UNKNOWN 0
2674#define GOT_NORMAL 1
2675#define GOT_TLS_GD 2
2676#define GOT_TLS_IE 4
0855e32b
NS		 2677#define GOT_TLS_GDESC 8
2678#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
34e77a92
RS		 2679 unsigned int tls_type : 8;
2680
2681 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2682 unsigned int is_iplt : 1;
2683
2684 unsigned int unused : 23;
a4fd1a8e 2685
0855e32b
NS		 2686 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2687 starting at the end of the jump table. */
2688 bfd_vma tlsdesc_got;
2689
a4fd1a8e
PB		 2690 /* The symbol marking the real symbol location for exported thumb
2691 symbols with Arm stubs. */
2692 struct elf_link_hash_entry *export_glue;
906e58ca 2693
da5938a2 2694 /* A pointer to the most recently used stub hash entry against this
8029a119 2695 symbol. */
da5938a2 2696 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2697 };
252b5132 2698
252b5132 2699/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2700#define elf32_arm_link_hash_traverse(table, func, info) \
2701 (elf_link_hash_traverse \
2702 (&(table)->root, \
b7693d02 2703 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2704 (info)))
2705
2706/* Get the ARM elf linker hash table from a link_info structure. */
2707#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2708 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2709 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2710
906e58ca
NC		 2711#define arm_stub_hash_lookup(table, string, create, copy) \
2712 ((struct elf32_arm_stub_hash_entry *) \
2713 bfd_hash_lookup ((table), (string), (create), (copy)))
2714
21d799b5
NC		 2715/* Array to keep track of which stub sections have been created, and
2716 information on stub grouping. */
2717struct map_stub
2718{
2719 /* This is the section to which stubs in the group will be
2720 attached. */
2721 asection *link_sec;
2722 /* The stub section. */
2723 asection *stub_sec;
2724};
2725
0855e32b
NS		 2726#define elf32_arm_compute_jump_table_size(htab) \
2727 ((htab)->next_tls_desc_index * 4)
2728
9b485d32 2729/* ARM ELF linker hash table. */
252b5132 2730struct elf32_arm_link_hash_table
906e58ca
NC		 2731{
2732 /* The main hash table. */
2733 struct elf_link_hash_table root;
252b5132 2734
906e58ca
NC		 2735 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2736 bfd_size_type thumb_glue_size;
252b5132 2737
906e58ca
NC		 2738 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2739 bfd_size_type arm_glue_size;
252b5132 2740
906e58ca
NC		 2741 /* The size in bytes of section containing the ARMv4 BX veneers. */
2742 bfd_size_type bx_glue_size;
845b51d6 2743
906e58ca
NC		 2744 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2745 veneer has been populated. */
2746 bfd_vma bx_glue_offset[15];
845b51d6 2747
906e58ca
NC		 2748 /* The size in bytes of the section containing glue for VFP11 erratum
2749 veneers. */
2750 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2751
48229727
JB		 2752 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2753 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2754 elf32_arm_write_section(). */
2755 struct a8_erratum_fix *a8_erratum_fixes;
2756 unsigned int num_a8_erratum_fixes;
2757
906e58ca
NC		 2758 /* An arbitrary input BFD chosen to hold the glue sections. */
2759 bfd * bfd_of_glue_owner;
ba96a88f 2760
906e58ca
NC		 2761 /* Nonzero to output a BE8 image. */
2762 int byteswap_code;
e489d0ae 2763
906e58ca
NC		 2764 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2765 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2766 int target1_is_rel;
9c504268 2767
906e58ca
NC		 2768 /* The relocation to use for R_ARM_TARGET2 relocations. */
2769 int target2_reloc;
eb043451 2770
906e58ca
NC		 2771 /* 0 = Ignore R_ARM_V4BX.
2772 1 = Convert BX to MOV PC.
2773 2 = Generate v4 interworing stubs. */
2774 int fix_v4bx;
319850b4 2775
48229727
JB		 2776 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2777 int fix_cortex_a8;
2778
2de70689
MGD		 2779 /* Whether we should fix the ARM1176 BLX immediate issue. */
2780 int fix_arm1176;
2781
906e58ca
NC		 2782 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2783 int use_blx;
33bfe774 2784
906e58ca
NC		 2785 /* What sort of code sequences we should look for which may trigger the
2786 VFP11 denorm erratum. */
2787 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2788
906e58ca
NC		 2789 /* Global counter for the number of fixes we have emitted. */
2790 int num_vfp11_fixes;
c7b8f16e 2791
906e58ca
NC		 2792 /* Nonzero to force PIC branch veneers. */
2793 int pic_veneer;
27e55c4d 2794
906e58ca
NC		 2795 /* The number of bytes in the initial entry in the PLT. */
2796 bfd_size_type plt_header_size;
e5a52504 2797
906e58ca
NC		 2798 /* The number of bytes in the subsequent PLT etries. */
2799 bfd_size_type plt_entry_size;
e5a52504 2800
906e58ca
NC		 2801 /* True if the target system is VxWorks. */
2802 int vxworks_p;
00a97672 2803
906e58ca
NC		 2804 /* True if the target system is Symbian OS. */
2805 int symbian_p;
e5a52504 2806
906e58ca
NC		 2807 /* True if the target uses REL relocations. */
2808 int use_rel;
4e7fd91e 2809
0855e32b
NS		 2810 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2811 bfd_vma next_tls_desc_index;
2812
2813 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2814 bfd_vma num_tls_desc;
2815
906e58ca 2816 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2817 asection *sdynbss;
2818 asection *srelbss;
5e681ec4 2819
906e58ca
NC		 2820 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2821 asection *srelplt2;
00a97672 2822
0855e32b
NS		 2823 /* The offset into splt of the PLT entry for the TLS descriptor
2824 resolver. Special values are 0, if not necessary (or not found
2825 to be necessary yet), and -1 if needed but not determined
2826 yet. */
2827 bfd_vma dt_tlsdesc_plt;
2828
2829 /* The offset into sgot of the GOT entry used by the PLT entry
2830 above. */
2831 bfd_vma dt_tlsdesc_got;
2832
2833 /* Offset in .plt section of tls_arm_trampoline. */
2834 bfd_vma tls_trampoline;
2835
906e58ca
NC		 2836 /* Data for R_ARM_TLS_LDM32 relocations. */
2837 union
2838 {
2839 bfd_signed_vma refcount;
2840 bfd_vma offset;
2841 } tls_ldm_got;
b7693d02 2842
87d72d41
AM		 2843 /* Small local sym cache. */
2844 struct sym_cache sym_cache;
906e58ca
NC		 2845
2846 /* For convenience in allocate_dynrelocs. */
2847 bfd * obfd;
2848
0855e32b
NS		 2849 /* The amount of space used by the reserved portion of the sgotplt
2850 section, plus whatever space is used by the jump slots. */
2851 bfd_vma sgotplt_jump_table_size;
2852
906e58ca
NC		 2853 /* The stub hash table. */
2854 struct bfd_hash_table stub_hash_table;
2855
2856 /* Linker stub bfd. */
2857 bfd *stub_bfd;
2858
2859 /* Linker call-backs. */
2860 asection * (*add_stub_section) (const char *, asection *);
2861 void (*layout_sections_again) (void);
2862
2863 /* Array to keep track of which stub sections have been created, and
2864 information on stub grouping. */
21d799b5 2865 struct map_stub *stub_group;
906e58ca 2866
fe33d2fa
CL		 2867 /* Number of elements in stub_group. */
2868 int top_id;
2869
906e58ca
NC		 2870 /* Assorted information used by elf32_arm_size_stubs. */
2871 unsigned int bfd_count;
2872 int top_index;
2873 asection **input_list;
2874};
252b5132 2875
780a67af
NC		 2876/* Create an entry in an ARM ELF linker hash table. */
2877
2878static struct bfd_hash_entry *
57e8b36a
NC		 2879elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2880 struct bfd_hash_table * table,
2881 const char * string)
780a67af
NC		 2882{
2883 struct elf32_arm_link_hash_entry * ret =
2884 (struct elf32_arm_link_hash_entry *) entry;
2885
2886 /* Allocate the structure if it has not already been allocated by a
2887 subclass. */
906e58ca 2888 if (ret == NULL)
21d799b5
NC		 2889 ret = (struct elf32_arm_link_hash_entry *)
2890 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2891 if (ret == NULL)
780a67af
NC		 2892 return (struct bfd_hash_entry *) ret;
2893
2894 /* Call the allocation method of the superclass. */
2895 ret = ((struct elf32_arm_link_hash_entry *)
2896 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2897 table, string));
57e8b36a 2898 if (ret != NULL)
b7693d02 2899 {
0bdcacaf 2900 ret->dyn_relocs = NULL;
ba93b8ac 2901 ret->tls_type = GOT_UNKNOWN;
0855e32b 2902 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 2903 ret->plt.thumb_refcount = 0;
2904 ret->plt.maybe_thumb_refcount = 0;
2905 ret->plt.noncall_refcount = 0;
2906 ret->plt.got_offset = -1;
2907 ret->is_iplt = FALSE;
a4fd1a8e 2908 ret->export_glue = NULL;
906e58ca
NC		 2909
2910 ret->stub_cache = NULL;
b7693d02 2911 }
780a67af
NC		 2912
2913 return (struct bfd_hash_entry *) ret;
2914}
2915
34e77a92
RS		 2916/* Ensure that we have allocated bookkeeping structures for ABFD's local
2917 symbols. */
2918
2919static bfd_boolean
2920elf32_arm_allocate_local_sym_info (bfd *abfd)
2921{
2922 if (elf_local_got_refcounts (abfd) == NULL)
2923 {
2924 bfd_size_type num_syms;
2925 bfd_size_type size;
2926 char *data;
2927
2928 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
2929 size = num_syms * (sizeof (bfd_signed_vma)
2930 + sizeof (struct arm_local_iplt_info *)
2931 + sizeof (bfd_vma)
2932 + sizeof (char));
2933 data = bfd_zalloc (abfd, size);
2934 if (data == NULL)
2935 return FALSE;
2936
2937 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
2938 data += num_syms * sizeof (bfd_signed_vma);
2939
2940 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
2941 data += num_syms * sizeof (struct arm_local_iplt_info *);
2942
2943 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
2944 data += num_syms * sizeof (bfd_vma);
2945
2946 elf32_arm_local_got_tls_type (abfd) = data;
2947 }
2948 return TRUE;
2949}
2950
2951/* Return the .iplt information for local symbol R_SYMNDX, which belongs
2952 to input bfd ABFD. Create the information if it doesn't already exist.
2953 Return null if an allocation fails. */
2954
2955static struct arm_local_iplt_info *
2956elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
2957{
2958 struct arm_local_iplt_info **ptr;
2959
2960 if (!elf32_arm_allocate_local_sym_info (abfd))
2961 return NULL;
2962
2963 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
2964 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
2965 if (*ptr == NULL)
2966 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
2967 return *ptr;
2968}
2969
2970/* Try to obtain PLT information for the symbol with index R_SYMNDX
2971 in ABFD's symbol table. If the symbol is global, H points to its
2972 hash table entry, otherwise H is null.
2973
2974 Return true if the symbol does have PLT information. When returning
2975 true, point *ROOT_PLT at the target-independent reference count/offset
2976 union and *ARM_PLT at the ARM-specific information. */
2977
2978static bfd_boolean
2979elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
2980 unsigned long r_symndx, union gotplt_union **root_plt,
2981 struct arm_plt_info **arm_plt)
2982{
2983 struct arm_local_iplt_info *local_iplt;
2984
2985 if (h != NULL)
2986 {
2987 *root_plt = &h->root.plt;
2988 *arm_plt = &h->plt;
2989 return TRUE;
2990 }
2991
2992 if (elf32_arm_local_iplt (abfd) == NULL)
2993 return FALSE;
2994
2995 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
2996 if (local_iplt == NULL)
2997 return FALSE;
2998
2999 *root_plt = &local_iplt->root;
3000 *arm_plt = &local_iplt->arm;
3001 return TRUE;
3002}
3003
3004/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3005 before it. */
3006
3007static bfd_boolean
3008elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3009 struct arm_plt_info *arm_plt)
3010{
3011 struct elf32_arm_link_hash_table *htab;
3012
3013 htab = elf32_arm_hash_table (info);
3014 return (arm_plt->thumb_refcount != 0
3015 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3016}
3017
3018/* Return a pointer to the head of the dynamic reloc list that should
3019 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3020 ABFD's symbol table. Return null if an error occurs. */
3021
3022static struct elf_dyn_relocs **
3023elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3024 Elf_Internal_Sym *isym)
3025{
3026 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3027 {
3028 struct arm_local_iplt_info *local_iplt;
3029
3030 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3031 if (local_iplt == NULL)
3032 return NULL;
3033 return &local_iplt->dyn_relocs;
3034 }
3035 else
3036 {
3037 /* Track dynamic relocs needed for local syms too.
3038 We really need local syms available to do this
3039 easily. Oh well. */
3040 asection *s;
3041 void *vpp;
3042
3043 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3044 if (s == NULL)
3045 abort ();
3046
3047 vpp = &elf_section_data (s)->local_dynrel;
3048 return (struct elf_dyn_relocs **) vpp;
3049 }
3050}
3051
906e58ca
NC		 3052/* Initialize an entry in the stub hash table. */
3053
3054static struct bfd_hash_entry *
3055stub_hash_newfunc (struct bfd_hash_entry *entry,
3056 struct bfd_hash_table *table,
3057 const char *string)
3058{
3059 /* Allocate the structure if it has not already been allocated by a
3060 subclass. */
3061 if (entry == NULL)
3062 {
21d799b5
NC		 3063 entry = (struct bfd_hash_entry *)
3064 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3065 if (entry == NULL)
3066 return entry;
3067 }
3068
3069 /* Call the allocation method of the superclass. */
3070 entry = bfd_hash_newfunc (entry, table, string);
3071 if (entry != NULL)
3072 {
3073 struct elf32_arm_stub_hash_entry *eh;
3074
3075 /* Initialize the local fields. */
3076 eh = (struct elf32_arm_stub_hash_entry *) entry;
3077 eh->stub_sec = NULL;
3078 eh->stub_offset = 0;
3079 eh->target_value = 0;
3080 eh->target_section = NULL;
cedfb179
DK		 3081 eh->target_addend = 0;
3082 eh->orig_insn = 0;
906e58ca 3083 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3084 eh->stub_size = 0;
3085 eh->stub_template = NULL;
3086 eh->stub_template_size = 0;
906e58ca
NC		 3087 eh->h = NULL;
3088 eh->id_sec = NULL;
d8d2f433 3089 eh->output_name = NULL;
906e58ca
NC		 3090 }
3091
3092 return entry;
3093}
3094
00a97672 3095/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3096 shortcuts to them in our hash table. */
3097
3098static bfd_boolean
57e8b36a 3099create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3100{
3101 struct elf32_arm_link_hash_table *htab;
3102
e5a52504 3103 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3104 if (htab == NULL)
3105 return FALSE;
3106
e5a52504
MM		 3107 /* BPABI objects never have a GOT, or associated sections. */
3108 if (htab->symbian_p)
3109 return TRUE;
3110
5e681ec4
PB		 3111 if (! _bfd_elf_create_got_section (dynobj, info))
3112 return FALSE;
3113
5e681ec4
PB		 3114 return TRUE;
3115}
3116
34e77a92
RS		 3117/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3118
3119static bfd_boolean
3120create_ifunc_sections (struct bfd_link_info *info)
3121{
3122 struct elf32_arm_link_hash_table *htab;
3123 const struct elf_backend_data *bed;
3124 bfd *dynobj;
3125 asection *s;
3126 flagword flags;
3127
3128 htab = elf32_arm_hash_table (info);
3129 dynobj = htab->root.dynobj;
3130 bed = get_elf_backend_data (dynobj);
3131 flags = bed->dynamic_sec_flags;
3132
3133 if (htab->root.iplt == NULL)
3134 {
3135 s = bfd_make_section_with_flags (dynobj, ".iplt",
3136 flags | SEC_READONLY | SEC_CODE);
3137 if (s == NULL
3138 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3139 return FALSE;
3140 htab->root.iplt = s;
3141 }
3142
3143 if (htab->root.irelplt == NULL)
3144 {
3145 s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
3146 flags | SEC_READONLY);
3147 if (s == NULL
3148 || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
3149 return FALSE;
3150 htab->root.irelplt = s;
3151 }
3152
3153 if (htab->root.igotplt == NULL)
3154 {
3155 s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
3156 if (s == NULL
3157 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3158 return FALSE;
3159 htab->root.igotplt = s;
3160 }
3161 return TRUE;
3162}
3163
00a97672
RS		 3164/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3165 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3166 hash table. */
3167
3168static bfd_boolean
57e8b36a 3169elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3170{
3171 struct elf32_arm_link_hash_table *htab;
3172
3173 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3174 if (htab == NULL)
3175 return FALSE;
3176
362d30a1 3177 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3178 return FALSE;
3179
3180 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3181 return FALSE;
3182
5e681ec4
PB		 3183 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
3184 if (!info->shared)
00a97672
RS		 3185 htab->srelbss = bfd_get_section_by_name (dynobj,
3186 RELOC_SECTION (htab, ".bss"));
3187
3188 if (htab->vxworks_p)
3189 {
3190 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3191 return FALSE;
3192
3193 if (info->shared)
3194 {
3195 htab->plt_header_size = 0;
3196 htab->plt_entry_size
3197 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3198 }
3199 else
3200 {
3201 htab->plt_header_size
3202 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3203 htab->plt_entry_size
3204 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3205 }
3206 }
5e681ec4 3207
362d30a1
RS		 3208 if (!htab->root.splt
3209 || !htab->root.srelplt
e5a52504 3210 || !htab->sdynbss
5e681ec4
PB		 3211 || (!info->shared && !htab->srelbss))
3212 abort ();
3213
3214 return TRUE;
3215}
3216
906e58ca
NC		 3217/* Copy the extra info we tack onto an elf_link_hash_entry. */
3218
3219static void
3220elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3221 struct elf_link_hash_entry *dir,
3222 struct elf_link_hash_entry *ind)
3223{
3224 struct elf32_arm_link_hash_entry *edir, *eind;
3225
3226 edir = (struct elf32_arm_link_hash_entry *) dir;
3227 eind = (struct elf32_arm_link_hash_entry *) ind;
3228
0bdcacaf 3229 if (eind->dyn_relocs != NULL)
906e58ca 3230 {
0bdcacaf 3231 if (edir->dyn_relocs != NULL)
906e58ca 3232 {
0bdcacaf
RS		 3233 struct elf_dyn_relocs **pp;
3234 struct elf_dyn_relocs *p;
906e58ca
NC		 3235
3236 /* Add reloc counts against the indirect sym to the direct sym
3237 list. Merge any entries against the same section. */
0bdcacaf 3238 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3239 {
0bdcacaf 3240 struct elf_dyn_relocs *q;
906e58ca 3241
0bdcacaf
RS		 3242 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3243 if (q->sec == p->sec)
906e58ca
NC		 3244 {
3245 q->pc_count += p->pc_count;
3246 q->count += p->count;
3247 *pp = p->next;
3248 break;
3249 }
3250 if (q == NULL)
3251 pp = &p->next;
3252 }
0bdcacaf 3253 *pp = edir->dyn_relocs;
906e58ca
NC		 3254 }
3255
0bdcacaf
RS		 3256 edir->dyn_relocs = eind->dyn_relocs;
3257 eind->dyn_relocs = NULL;
906e58ca
NC		 3258 }
3259
3260 if (ind->root.type == bfd_link_hash_indirect)
3261 {
3262 /* Copy over PLT info. */
34e77a92
RS		 3263 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3264 eind->plt.thumb_refcount = 0;
3265 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3266 eind->plt.maybe_thumb_refcount = 0;
3267 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3268 eind->plt.noncall_refcount = 0;
3269
3270 /* We should only allocate a function to .iplt once the final
3271 symbol information is known. */
3272 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3273
3274 if (dir->got.refcount <= 0)
3275 {
3276 edir->tls_type = eind->tls_type;
3277 eind->tls_type = GOT_UNKNOWN;
3278 }
3279 }
3280
3281 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3282}
3283
3284/* Create an ARM elf linker hash table. */
3285
3286static struct bfd_link_hash_table *
3287elf32_arm_link_hash_table_create (bfd *abfd)
3288{
3289 struct elf32_arm_link_hash_table *ret;
3290 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3291
21d799b5 3292 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 3293 if (ret == NULL)
3294 return NULL;
3295
3296 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3297 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3298 sizeof (struct elf32_arm_link_hash_entry),
3299 ARM_ELF_DATA))
906e58ca
NC		 3300 {
3301 free (ret);
3302 return NULL;
3303 }
3304
906e58ca
NC		 3305 ret->sdynbss = NULL;
3306 ret->srelbss = NULL;
3307 ret->srelplt2 = NULL;
0855e32b
NS		 3308 ret->dt_tlsdesc_plt = 0;
3309 ret->dt_tlsdesc_got = 0;
3310 ret->tls_trampoline = 0;
3311 ret->next_tls_desc_index = 0;
3312 ret->num_tls_desc = 0;
906e58ca
NC		 3313 ret->thumb_glue_size = 0;
3314 ret->arm_glue_size = 0;
3315 ret->bx_glue_size = 0;
3316 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3317 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3318 ret->vfp11_erratum_glue_size = 0;
3319 ret->num_vfp11_fixes = 0;
48229727 3320 ret->fix_cortex_a8 = 0;
2de70689 3321 ret->fix_arm1176 = 0;
906e58ca
NC		 3322 ret->bfd_of_glue_owner = NULL;
3323 ret->byteswap_code = 0;
3324 ret->target1_is_rel = 0;
3325 ret->target2_reloc = R_ARM_NONE;
3326#ifdef FOUR_WORD_PLT
3327 ret->plt_header_size = 16;
3328 ret->plt_entry_size = 16;
3329#else
3330 ret->plt_header_size = 20;
3331 ret->plt_entry_size = 12;
3332#endif
3333 ret->fix_v4bx = 0;
3334 ret->use_blx = 0;
3335 ret->vxworks_p = 0;
3336 ret->symbian_p = 0;
3337 ret->use_rel = 1;
87d72d41 3338 ret->sym_cache.abfd = NULL;
906e58ca
NC		 3339 ret->obfd = abfd;
3340 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 3341 ret->stub_bfd = NULL;
3342 ret->add_stub_section = NULL;
3343 ret->layout_sections_again = NULL;
3344 ret->stub_group = NULL;
fe33d2fa 3345 ret->top_id = 0;
6cee0a6f
L		 3346 ret->bfd_count = 0;
3347 ret->top_index = 0;
3348 ret->input_list = NULL;
906e58ca
NC		 3349
3350 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3351 sizeof (struct elf32_arm_stub_hash_entry)))
3352 {
3353 free (ret);
3354 return NULL;
3355 }
3356
3357 return &ret->root.root;
3358}
3359
3360/* Free the derived linker hash table. */
3361
3362static void
3363elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3364{
3365 struct elf32_arm_link_hash_table *ret
3366 = (struct elf32_arm_link_hash_table *) hash;
3367
3368 bfd_hash_table_free (&ret->stub_hash_table);
3369 _bfd_generic_link_hash_table_free (hash);
3370}
3371
3372/* Determine if we're dealing with a Thumb only architecture. */
3373
3374static bfd_boolean
3375using_thumb_only (struct elf32_arm_link_hash_table *globals)
3376{
3377 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3378 Tag_CPU_arch);
3379 int profile;
3380
41ed1ee7
DJ		 3381 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3382 return TRUE;
3383
9e3c6df6 3384 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3385 return FALSE;
3386
3387 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3388 Tag_CPU_arch_profile);
3389
3390 return profile == 'M';
3391}
3392
3393/* Determine if we're dealing with a Thumb-2 object. */
3394
3395static bfd_boolean
3396using_thumb2 (struct elf32_arm_link_hash_table *globals)
3397{
3398 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3399 Tag_CPU_arch);
3400 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3401}
3402
cd1dac3d
DG		 3403/* Determine what kind of NOPs are available. */
3404
3405static bfd_boolean
3406arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3407{
3408 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3409 Tag_CPU_arch);
3410 return arch == TAG_CPU_ARCH_V6T2
3411 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3412 || arch == TAG_CPU_ARCH_V7
3413 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3414}
3415
3416static bfd_boolean
3417arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3418{
3419 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3420 Tag_CPU_arch);
9e3c6df6
PB		 3421 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3422 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3423}
3424
f4ac8484
DJ		 3425static bfd_boolean
3426arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3427{
3428 switch (stub_type)
3429 {
fea2b4d6
CL		 3430 case arm_stub_long_branch_thumb_only:
3431 case arm_stub_long_branch_v4t_thumb_arm:
3432 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3433 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3434 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3435 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3436 return TRUE;
3437 case arm_stub_none:
3438 BFD_FAIL ();
3439 return FALSE;
3440 break;
3441 default:
3442 return FALSE;
3443 }
3444}
3445
906e58ca
NC		 3446/* Determine the type of stub needed, if any, for a call. */
3447
3448static enum elf32_arm_stub_type
3449arm_type_of_stub (struct bfd_link_info *info,
3450 asection *input_sec,
3451 const Elf_Internal_Rela *rel,
34e77a92 3452 unsigned char st_type,
35fc36a8 3453 enum arm_st_branch_type *actual_branch_type,
906e58ca 3454 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3455 bfd_vma destination,
3456 asection *sym_sec,
3457 bfd *input_bfd,
3458 const char *name)
906e58ca
NC		 3459{
3460 bfd_vma location;
3461 bfd_signed_vma branch_offset;
3462 unsigned int r_type;
3463 struct elf32_arm_link_hash_table * globals;
3464 int thumb2;
3465 int thumb_only;
3466 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3467 int use_plt = 0;
35fc36a8 3468 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3469 union gotplt_union *root_plt;
3470 struct arm_plt_info *arm_plt;
906e58ca 3471
35fc36a8 3472 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3473 return stub_type;
3474
906e58ca 3475 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3476 if (globals == NULL)
3477 return stub_type;
906e58ca
NC		 3478
3479 thumb_only = using_thumb_only (globals);
3480
3481 thumb2 = using_thumb2 (globals);
3482
3483 /* Determine where the call point is. */
3484 location = (input_sec->output_offset
3485 + input_sec->output_section->vma
3486 + rel->r_offset);
3487
906e58ca
NC		 3488 r_type = ELF32_R_TYPE (rel->r_info);
3489
34e77a92
RS		 3490 /* For TLS call relocs, it is the caller's responsibility to provide
3491 the address of the appropriate trampoline. */
3492 if (r_type != R_ARM_TLS_CALL
3493 && r_type != R_ARM_THM_TLS_CALL
3494 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3495 &root_plt, &arm_plt)
3496 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3497 {
34e77a92 3498 asection *splt;
fe33d2fa 3499
34e77a92
RS		 3500 if (hash == NULL || hash->is_iplt)
3501 splt = globals->root.iplt;
3502 else
3503 splt = globals->root.splt;
3504 if (splt != NULL)
3505 {
3506 use_plt = 1;
3507
3508 /* Note when dealing with PLT entries: the main PLT stub is in
3509 ARM mode, so if the branch is in Thumb mode, another
3510 Thumb->ARM stub will be inserted later just before the ARM
3511 PLT stub. We don't take this extra distance into account
3512 here, because if a long branch stub is needed, we'll add a
3513 Thumb->Arm one and branch directly to the ARM PLT entry
3514 because it avoids spreading offset corrections in several
3515 places. */
3516
3517 destination = (splt->output_section->vma
3518 + splt->output_offset
3519 + root_plt->offset);
3520 st_type = STT_FUNC;
3521 branch_type = ST_BRANCH_TO_ARM;
3522 }
5fa9e92f 3523 }
34e77a92
RS		 3524 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3525 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3526
fe33d2fa
CL		 3527 branch_offset = (bfd_signed_vma)(destination - location);
3528
0855e32b
NS		 3529 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3530 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3531 {
5fa9e92f
CL		 3532 /* Handle cases where:
3533 - this call goes too far (different Thumb/Thumb2 max
3534 distance)
155d87d7
CL		 3535 - it's a Thumb->Arm call and blx is not available, or it's a
3536 Thumb->Arm branch (not bl). A stub is needed in this case,
3537 but only if this call is not through a PLT entry. Indeed,
3538 PLT stubs handle mode switching already.
5fa9e92f 3539 */
906e58ca
NC		 3540 if ((!thumb2
3541 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3542 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3543 || (thumb2
3544 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3545 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3546 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3547 && (((r_type == R_ARM_THM_CALL
3548 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3549 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3550 && !use_plt))
906e58ca 3551 {
35fc36a8 3552 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3553 {
3554 /* Thumb to thumb. */
3555 if (!thumb_only)
3556 {
3557 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3558 /* PIC stubs. */
155d87d7
CL		 3559 ? ((globals->use_blx
3560 && (r_type ==R_ARM_THM_CALL))
3561 /* V5T and above. Stub starts with ARM code, so
3562 we must be able to switch mode before
3563 reaching it, which is only possible for 'bl'
3564 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3565 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3566 /* On V4T, use Thumb code only. */
d3626fb0 3567 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3568
3569 /* non-PIC stubs. */
155d87d7
CL		 3570 : ((globals->use_blx
3571 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3572 /* V5T and above. */
3573 ? arm_stub_long_branch_any_any
3574 /* V4T. */
d3626fb0 3575 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3576 }
3577 else
3578 {
3579 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3580 /* PIC stub. */
3581 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3582 /* non-PIC stub. */
3583 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3584 }
3585 }
3586 else
3587 {
3588 /* Thumb to arm. */
c820be07
NC		 3589 if (sym_sec != NULL
3590 && sym_sec->owner != NULL
3591 && !INTERWORK_FLAG (sym_sec->owner))
3592 {
3593 (*_bfd_error_handler)
3594 (_("%B(%s): warning: interworking not enabled.\n"
3595 " first occurrence: %B: Thumb call to ARM"),
3596 sym_sec->owner, input_bfd, name);
3597 }
3598
0855e32b
NS		 3599 stub_type =
3600 (info->shared | globals->pic_veneer)
c2b4a39d 3601 /* PIC stubs. */
0855e32b
NS		 3602 ? (r_type == R_ARM_THM_TLS_CALL
3603 /* TLS PIC stubs */
3604 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3605 : arm_stub_long_branch_v4t_thumb_tls_pic)
3606 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3607 /* V5T PIC and above. */
3608 ? arm_stub_long_branch_any_arm_pic
3609 /* V4T PIC stub. */
3610 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3611
3612 /* non-PIC stubs. */
0855e32b 3613 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3614 /* V5T and above. */
3615 ? arm_stub_long_branch_any_any
3616 /* V4T. */
3617 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3618
3619 /* Handle v4t short branches. */
fea2b4d6 3620 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3621 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3622 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3623 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3624 }
3625 }
3626 }
fe33d2fa
CL		 3627 else if (r_type == R_ARM_CALL
3628 || r_type == R_ARM_JUMP24
0855e32b
NS		 3629 || r_type == R_ARM_PLT32
3630 || r_type == R_ARM_TLS_CALL)
906e58ca 3631 {
35fc36a8 3632 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3633 {
3634 /* Arm to thumb. */
c820be07
NC		 3635
3636 if (sym_sec != NULL
3637 && sym_sec->owner != NULL
3638 && !INTERWORK_FLAG (sym_sec->owner))
3639 {
3640 (*_bfd_error_handler)
3641 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3642 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3643 sym_sec->owner, input_bfd, name);
3644 }
3645
3646 /* We have an extra 2-bytes reach because of
3647 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3648 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3649 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3650 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3651 || (r_type == R_ARM_JUMP24)
3652 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3653 {
3654 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3655 /* PIC stubs. */
ebe24dd4
CL		 3656 ? ((globals->use_blx)
3657 /* V5T and above. */
3658 ? arm_stub_long_branch_any_thumb_pic
3659 /* V4T stub. */
3660 : arm_stub_long_branch_v4t_arm_thumb_pic)
3661
c2b4a39d
CL		 3662 /* non-PIC stubs. */
3663 : ((globals->use_blx)
3664 /* V5T and above. */
3665 ? arm_stub_long_branch_any_any
3666 /* V4T. */
3667 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3668 }
3669 }
3670 else
3671 {
3672 /* Arm to arm. */
3673 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3674 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3675 {
0855e32b
NS		 3676 stub_type =
3677 (info->shared | globals->pic_veneer)
c2b4a39d 3678 /* PIC stubs. */
0855e32b
NS		 3679 ? (r_type == R_ARM_TLS_CALL
3680 /* TLS PIC Stub */
3681 ? arm_stub_long_branch_any_tls_pic
3682 : arm_stub_long_branch_any_arm_pic)
c2b4a39d 3683 /* non-PIC stubs. */
fea2b4d6 3684 : arm_stub_long_branch_any_any;
906e58ca
NC		 3685 }
3686 }
3687 }
3688
fe33d2fa
CL		 3689 /* If a stub is needed, record the actual destination type. */
3690 if (stub_type != arm_stub_none)
35fc36a8 3691 *actual_branch_type = branch_type;
fe33d2fa 3692
906e58ca
NC		 3693 return stub_type;
3694}
3695
3696/* Build a name for an entry in the stub hash table. */
3697
3698static char *
3699elf32_arm_stub_name (const asection *input_section,
3700 const asection *sym_sec,
3701 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3702 const Elf_Internal_Rela *rel,
3703 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3704{
3705 char *stub_name;
3706 bfd_size_type len;
3707
3708 if (hash)
3709 {
fe33d2fa 3710 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3711 stub_name = (char *) bfd_malloc (len);
906e58ca 3712 if (stub_name != NULL)
fe33d2fa 3713 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3714 input_section->id & 0xffffffff,
3715 hash->root.root.root.string,
fe33d2fa
CL		 3716 (int) rel->r_addend & 0xffffffff,
3717 (int) stub_type);
906e58ca
NC		 3718 }
3719 else
3720 {
fe33d2fa 3721 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3722 stub_name = (char *) bfd_malloc (len);
906e58ca 3723 if (stub_name != NULL)
fe33d2fa 3724 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3725 input_section->id & 0xffffffff,
3726 sym_sec->id & 0xffffffff,
0855e32b
NS		 3727 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3728 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3729 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3730 (int) rel->r_addend & 0xffffffff,
3731 (int) stub_type);
906e58ca
NC		 3732 }
3733
3734 return stub_name;
3735}
3736
3737/* Look up an entry in the stub hash. Stub entries are cached because
3738 creating the stub name takes a bit of time. */
3739
3740static struct elf32_arm_stub_hash_entry *
3741elf32_arm_get_stub_entry (const asection *input_section,
3742 const asection *sym_sec,
3743 struct elf_link_hash_entry *hash,
3744 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3745 struct elf32_arm_link_hash_table *htab,
3746 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3747{
3748 struct elf32_arm_stub_hash_entry *stub_entry;
3749 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3750 const asection *id_sec;
3751
3752 if ((input_section->flags & SEC_CODE) == 0)
3753 return NULL;
3754
3755 /* If this input section is part of a group of sections sharing one
3756 stub section, then use the id of the first section in the group.
3757 Stub names need to include a section id, as there may well be
3758 more than one stub used to reach say, printf, and we need to
3759 distinguish between them. */
3760 id_sec = htab->stub_group[input_section->id].link_sec;
3761
3762 if (h != NULL && h->stub_cache != NULL
3763 && h->stub_cache->h == h
fe33d2fa
CL		 3764 && h->stub_cache->id_sec == id_sec
3765 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3766 {
3767 stub_entry = h->stub_cache;
3768 }
3769 else
3770 {
3771 char *stub_name;
3772
fe33d2fa 3773 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3774 if (stub_name == NULL)
3775 return NULL;
3776
3777 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3778 stub_name, FALSE, FALSE);
3779 if (h != NULL)
3780 h->stub_cache = stub_entry;
3781
3782 free (stub_name);
3783 }
3784
3785 return stub_entry;
3786}
3787
48229727
JB		 3788/* Find or create a stub section. Returns a pointer to the stub section, and
3789 the section to which the stub section will be attached (in *LINK_SEC_P).
3790 LINK_SEC_P may be NULL. */
906e58ca 3791
48229727
JB		 3792static asection *
3793elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3794 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3795{
3796 asection *link_sec;
3797 asection *stub_sec;
906e58ca
NC		 3798
3799 link_sec = htab->stub_group[section->id].link_sec;
3800 stub_sec = htab->stub_group[section->id].stub_sec;
3801 if (stub_sec == NULL)
3802 {
3803 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3804 if (stub_sec == NULL)
3805 {
3806 size_t namelen;
3807 bfd_size_type len;
3808 char *s_name;
3809
3810 namelen = strlen (link_sec->name);
3811 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3812 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3813 if (s_name == NULL)
3814 return NULL;
3815
3816 memcpy (s_name, link_sec->name, namelen);
3817 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3818 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3819 if (stub_sec == NULL)
3820 return NULL;
3821 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3822 }
3823 htab->stub_group[section->id].stub_sec = stub_sec;
3824 }
48229727
JB		 3825
3826 if (link_sec_p)
3827 *link_sec_p = link_sec;
3828
3829 return stub_sec;
3830}
3831
3832/* Add a new stub entry to the stub hash. Not all fields of the new
3833 stub entry are initialised. */
3834
3835static struct elf32_arm_stub_hash_entry *
3836elf32_arm_add_stub (const char *stub_name,
3837 asection *section,
3838 struct elf32_arm_link_hash_table *htab)
3839{
3840 asection *link_sec;
3841 asection *stub_sec;
3842 struct elf32_arm_stub_hash_entry *stub_entry;
3843
3844 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3845 if (stub_sec == NULL)
3846 return NULL;
906e58ca
NC		 3847
3848 /* Enter this entry into the linker stub hash table. */
3849 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3850 TRUE, FALSE);
3851 if (stub_entry == NULL)
3852 {
3853 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3854 section->owner,
3855 stub_name);
3856 return NULL;
3857 }
3858
3859 stub_entry->stub_sec = stub_sec;
3860 stub_entry->stub_offset = 0;
3861 stub_entry->id_sec = link_sec;
3862
906e58ca
NC		 3863 return stub_entry;
3864}
3865
3866/* Store an Arm insn into an output section not processed by
3867 elf32_arm_write_section. */
3868
3869static void
8029a119
NC		 3870put_arm_insn (struct elf32_arm_link_hash_table * htab,
3871 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3872{
3873 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3874 bfd_putl32 (val, ptr);
3875 else
3876 bfd_putb32 (val, ptr);
3877}
3878
3879/* Store a 16-bit Thumb insn into an output section not processed by
3880 elf32_arm_write_section. */
3881
3882static void
8029a119
NC		 3883put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3884 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3885{
3886 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3887 bfd_putl16 (val, ptr);
3888 else
3889 bfd_putb16 (val, ptr);
3890}
3891
0855e32b
NS		 3892/* If it's possible to change R_TYPE to a more efficient access
3893 model, return the new reloc type. */
3894
3895static unsigned
3896elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3897 struct elf_link_hash_entry *h)
3898{
3899 int is_local = (h == NULL);
3900
3901 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
3902 return r_type;
3903
3904 /* We do not support relaxations for Old TLS models. */
3905 switch (r_type)
3906 {
3907 case R_ARM_TLS_GOTDESC:
3908 case R_ARM_TLS_CALL:
3909 case R_ARM_THM_TLS_CALL:
3910 case R_ARM_TLS_DESCSEQ:
3911 case R_ARM_THM_TLS_DESCSEQ:
3912 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
3913 }
3914
3915 return r_type;
3916}
3917
48229727
JB		 3918static bfd_reloc_status_type elf32_arm_final_link_relocate
3919 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3920 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 3921 const char *, unsigned char, enum arm_st_branch_type,
3922 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 3923
4563a860
JB		 3924static unsigned int
3925arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
3926{
3927 switch (stub_type)
3928 {
3929 case arm_stub_a8_veneer_b_cond:
3930 case arm_stub_a8_veneer_b:
3931 case arm_stub_a8_veneer_bl:
3932 return 2;
3933
3934 case arm_stub_long_branch_any_any:
3935 case arm_stub_long_branch_v4t_arm_thumb:
3936 case arm_stub_long_branch_thumb_only:
3937 case arm_stub_long_branch_v4t_thumb_thumb:
3938 case arm_stub_long_branch_v4t_thumb_arm:
3939 case arm_stub_short_branch_v4t_thumb_arm:
3940 case arm_stub_long_branch_any_arm_pic:
3941 case arm_stub_long_branch_any_thumb_pic:
3942 case arm_stub_long_branch_v4t_thumb_thumb_pic:
3943 case arm_stub_long_branch_v4t_arm_thumb_pic:
3944 case arm_stub_long_branch_v4t_thumb_arm_pic:
3945 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 3946 case arm_stub_long_branch_any_tls_pic:
3947 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 3948 case arm_stub_a8_veneer_blx:
3949 return 4;
3950
3951 default:
3952 abort (); /* Should be unreachable. */
3953 }
3954}
3955
906e58ca
NC		 3956static bfd_boolean
3957arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3958 void * in_arg)
3959{
48229727 3960#define MAXRELOCS 2
906e58ca 3961 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3962 struct elf32_arm_link_hash_table *globals;
906e58ca 3963 struct bfd_link_info *info;
906e58ca
NC		 3964 asection *stub_sec;
3965 bfd *stub_bfd;
906e58ca
NC		 3966 bfd_byte *loc;
3967 bfd_vma sym_value;
3968 int template_size;
3969 int size;
d3ce72d0 3970 const insn_sequence *template_sequence;
906e58ca 3971 int i;
48229727
JB		 3972 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3973 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3974 int nrelocs = 0;
906e58ca
NC		 3975
3976 /* Massage our args to the form they really have. */
3977 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3978 info = (struct bfd_link_info *) in_arg;
3979
3980 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3981 if (globals == NULL)
3982 return FALSE;
906e58ca 3983
906e58ca
NC		 3984 stub_sec = stub_entry->stub_sec;
3985
4dfe6ac6 3986 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 3987 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
3988 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 3989 return TRUE;
fe33d2fa 3990
906e58ca
NC		 3991 /* Make a note of the offset within the stubs for this entry. */
3992 stub_entry->stub_offset = stub_sec->size;
3993 loc = stub_sec->contents + stub_entry->stub_offset;
3994
3995 stub_bfd = stub_sec->owner;
3996
906e58ca
NC		 3997 /* This is the address of the stub destination. */
3998 sym_value = (stub_entry->target_value
3999 + stub_entry->target_section->output_offset
4000 + stub_entry->target_section->output_section->vma);
4001
d3ce72d0 4002 template_sequence = stub_entry->stub_template;
461a49ca 4003 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4004
4005 size = 0;
461a49ca 4006 for (i = 0; i < template_size; i++)
906e58ca 4007 {
d3ce72d0 4008 switch (template_sequence[i].type)
461a49ca
DJ		 4009 {
4010 case THUMB16_TYPE:
48229727 4011 {
d3ce72d0
NC		 4012 bfd_vma data = (bfd_vma) template_sequence[i].data;
4013 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 4014 {
4015 /* We've borrowed the reloc_addend field to mean we should
4016 insert a condition code into this (Thumb-1 branch)
4017 instruction. See THUMB16_BCOND_INSN. */
4018 BFD_ASSERT ((data & 0xff00) == 0xd000);
4019 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4020 }
fe33d2fa 4021 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4022 size += 2;
4023 }
461a49ca 4024 break;
906e58ca 4025
48229727 4026 case THUMB32_TYPE:
fe33d2fa
CL		 4027 bfd_put_16 (stub_bfd,
4028 (template_sequence[i].data >> 16) & 0xffff,
4029 loc + size);
4030 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4031 loc + size + 2);
d3ce72d0 4032 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 4033 {
4034 stub_reloc_idx[nrelocs] = i;
4035 stub_reloc_offset[nrelocs++] = size;
4036 }
4037 size += 4;
4038 break;
4039
461a49ca 4040 case ARM_TYPE:
fe33d2fa
CL		 4041 bfd_put_32 (stub_bfd, template_sequence[i].data,
4042 loc + size);
461a49ca
DJ		 4043 /* Handle cases where the target is encoded within the
4044 instruction. */
d3ce72d0 4045 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4046 {
48229727
JB		 4047 stub_reloc_idx[nrelocs] = i;
4048 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4049 }
4050 size += 4;
4051 break;
4052
4053 case DATA_TYPE:
d3ce72d0 4054 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4055 stub_reloc_idx[nrelocs] = i;
4056 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4057 size += 4;
4058 break;
4059
4060 default:
4061 BFD_FAIL ();
4062 return FALSE;
4063 }
906e58ca 4064 }
461a49ca 4065
906e58ca
NC		 4066 stub_sec->size += size;
4067
461a49ca
DJ		 4068 /* Stub size has already been computed in arm_size_one_stub. Check
4069 consistency. */
4070 BFD_ASSERT (size == stub_entry->stub_size);
4071
906e58ca 4072 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4073 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4074 sym_value |= 1;
4075
48229727
JB		 4076 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4077 in each stub. */
4078 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4079
48229727 4080 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4081 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4082 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4083 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4084 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4085 {
4086 Elf_Internal_Rela rel;
4087 bfd_boolean unresolved_reloc;
4088 char *error_message;
35fc36a8
RS		 4089 enum arm_st_branch_type branch_type
4090 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4091 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4092 bfd_vma points_to = sym_value + stub_entry->target_addend;
4093
4094 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 4095 rel.r_info = ELF32_R_INFO (0,
4096 template_sequence[stub_reloc_idx[i]].r_type);
4097 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4098
4099 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4100 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4101 template should refer back to the instruction after the original
4102 branch. */
4103 points_to = sym_value;
4104
33c6a8fc
JB		 4105 /* There may be unintended consequences if this is not true. */
4106 BFD_ASSERT (stub_entry->h == NULL);
4107
48229727
JB		 4108 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4109 properly. We should probably use this function unconditionally,
4110 rather than only for certain relocations listed in the enclosing
4111 conditional, for the sake of consistency. */
4112 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4113 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4114 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4115 points_to, info, stub_entry->target_section, "", STT_FUNC,
4116 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4117 &unresolved_reloc, &error_message);
48229727
JB		 4118 }
4119 else
4120 {
fe33d2fa
CL		 4121 Elf_Internal_Rela rel;
4122 bfd_boolean unresolved_reloc;
4123 char *error_message;
4124 bfd_vma points_to = sym_value + stub_entry->target_addend
4125 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4126
4127 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4128 rel.r_info = ELF32_R_INFO (0,
4129 template_sequence[stub_reloc_idx[i]].r_type);
4130 rel.r_addend = 0;
4131
4132 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4133 (template_sequence[stub_reloc_idx[i]].r_type),
4134 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4135 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4136 stub_entry->branch_type,
fe33d2fa
CL		 4137 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4138 &error_message);
48229727 4139 }
906e58ca
NC		 4140
4141 return TRUE;
48229727 4142#undef MAXRELOCS
906e58ca
NC		 4143}
4144
48229727
JB		 4145/* Calculate the template, template size and instruction size for a stub.
4146 Return value is the instruction size. */
906e58ca 4147
48229727
JB		 4148static unsigned int
4149find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4150 const insn_sequence **stub_template,
4151 int *stub_template_size)
906e58ca 4152{
d3ce72d0 4153 const insn_sequence *template_sequence = NULL;
48229727
JB		 4154 int template_size = 0, i;
4155 unsigned int size;
906e58ca 4156
d3ce72d0 4157 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4158 if (stub_template)
4159 *stub_template = template_sequence;
4160
48229727 4161 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4162 if (stub_template_size)
4163 *stub_template_size = template_size;
906e58ca
NC		 4164
4165 size = 0;
461a49ca
DJ		 4166 for (i = 0; i < template_size; i++)
4167 {
d3ce72d0 4168 switch (template_sequence[i].type)
461a49ca
DJ		 4169 {
4170 case THUMB16_TYPE:
4171 size += 2;
4172 break;
4173
4174 case ARM_TYPE:
48229727 4175 case THUMB32_TYPE:
461a49ca
DJ		 4176 case DATA_TYPE:
4177 size += 4;
4178 break;
4179
4180 default:
4181 BFD_FAIL ();
2a229407 4182 return 0;
461a49ca
DJ		 4183 }
4184 }
4185
48229727
JB		 4186 return size;
4187}
4188
4189/* As above, but don't actually build the stub. Just bump offset so
4190 we know stub section sizes. */
4191
4192static bfd_boolean
4193arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4194 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4195{
4196 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4197 const insn_sequence *template_sequence;
48229727
JB		 4198 int template_size, size;
4199
4200 /* Massage our args to the form they really have. */
4201 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4202
4203 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4204 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4205
d3ce72d0 4206 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4207 &template_size);
4208
461a49ca 4209 stub_entry->stub_size = size;
d3ce72d0 4210 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4211 stub_entry->stub_template_size = template_size;
4212
906e58ca
NC		 4213 size = (size + 7) & ~7;
4214 stub_entry->stub_sec->size += size;
461a49ca 4215
906e58ca
NC		 4216 return TRUE;
4217}
4218
4219/* External entry points for sizing and building linker stubs. */
4220
4221/* Set up various things so that we can make a list of input sections
4222 for each output section included in the link. Returns -1 on error,
4223 0 when no stubs will be needed, and 1 on success. */
4224
4225int
4226elf32_arm_setup_section_lists (bfd *output_bfd,
4227 struct bfd_link_info *info)
4228{
4229 bfd *input_bfd;
4230 unsigned int bfd_count;
4231 int top_id, top_index;
4232 asection *section;
4233 asection **input_list, **list;
4234 bfd_size_type amt;
4235 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4236
4dfe6ac6
NC		 4237 if (htab == NULL)
4238 return 0;
906e58ca
NC		 4239 if (! is_elf_hash_table (htab))
4240 return 0;
4241
4242 /* Count the number of input BFDs and find the top input section id. */
4243 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4244 input_bfd != NULL;
4245 input_bfd = input_bfd->link_next)
4246 {
4247 bfd_count += 1;
4248 for (section = input_bfd->sections;
4249 section != NULL;
4250 section = section->next)
4251 {
4252 if (top_id < section->id)
4253 top_id = section->id;
4254 }
4255 }
4256 htab->bfd_count = bfd_count;
4257
4258 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4259 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4260 if (htab->stub_group == NULL)
4261 return -1;
fe33d2fa 4262 htab->top_id = top_id;
906e58ca
NC		 4263
4264 /* We can't use output_bfd->section_count here to find the top output
4265 section index as some sections may have been removed, and
4266 _bfd_strip_section_from_output doesn't renumber the indices. */
4267 for (section = output_bfd->sections, top_index = 0;
4268 section != NULL;
4269 section = section->next)
4270 {
4271 if (top_index < section->index)
4272 top_index = section->index;
4273 }
4274
4275 htab->top_index = top_index;
4276 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4277 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4278 htab->input_list = input_list;
4279 if (input_list == NULL)
4280 return -1;
4281
4282 /* For sections we aren't interested in, mark their entries with a
4283 value we can check later. */
4284 list = input_list + top_index;
4285 do
4286 *list = bfd_abs_section_ptr;
4287 while (list-- != input_list);
4288
4289 for (section = output_bfd->sections;
4290 section != NULL;
4291 section = section->next)
4292 {
4293 if ((section->flags & SEC_CODE) != 0)
4294 input_list[section->index] = NULL;
4295 }
4296
4297 return 1;
4298}
4299
4300/* The linker repeatedly calls this function for each input section,
4301 in the order that input sections are linked into output sections.
4302 Build lists of input sections to determine groupings between which
4303 we may insert linker stubs. */
4304
4305void
4306elf32_arm_next_input_section (struct bfd_link_info *info,
4307 asection *isec)
4308{
4309 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4310
4dfe6ac6
NC		 4311 if (htab == NULL)
4312 return;
4313
906e58ca
NC		 4314 if (isec->output_section->index <= htab->top_index)
4315 {
4316 asection **list = htab->input_list + isec->output_section->index;
4317
a7470592 4318 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4319 {
4320 /* Steal the link_sec pointer for our list. */
4321#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4322 /* This happens to make the list in reverse order,
07d72278 4323 which we reverse later. */
906e58ca
NC		 4324 PREV_SEC (isec) = *list;
4325 *list = isec;
4326 }
4327 }
4328}
4329
4330/* See whether we can group stub sections together. Grouping stub
4331 sections may result in fewer stubs. More importantly, we need to
07d72278 4332 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4333 .fini output sections respectively, because glibc splits the
4334 _init and _fini functions into multiple parts. Putting a stub in
4335 the middle of a function is not a good idea. */
4336
4337static void
4338group_sections (struct elf32_arm_link_hash_table *htab,
4339 bfd_size_type stub_group_size,
07d72278 4340 bfd_boolean stubs_always_after_branch)
906e58ca 4341{
07d72278 4342 asection **list = htab->input_list;
906e58ca
NC		 4343
4344 do
4345 {
4346 asection *tail = *list;
07d72278 4347 asection *head;
906e58ca
NC		 4348
4349 if (tail == bfd_abs_section_ptr)
4350 continue;
4351
07d72278
DJ		 4352 /* Reverse the list: we must avoid placing stubs at the
4353 beginning of the section because the beginning of the text
4354 section may be required for an interrupt vector in bare metal
4355 code. */
4356#define NEXT_SEC PREV_SEC
e780aef2
CL		 4357 head = NULL;
4358 while (tail != NULL)
4359 {
4360 /* Pop from tail. */
4361 asection *item = tail;
4362 tail = PREV_SEC (item);
4363
4364 /* Push on head. */
4365 NEXT_SEC (item) = head;
4366 head = item;
4367 }
07d72278
DJ		 4368
4369 while (head != NULL)
906e58ca
NC		 4370 {
4371 asection *curr;
07d72278 4372 asection *next;
e780aef2
CL		 4373 bfd_vma stub_group_start = head->output_offset;
4374 bfd_vma end_of_next;
906e58ca 4375
07d72278 4376 curr = head;
e780aef2 4377 while (NEXT_SEC (curr) != NULL)
8cd931b7 4378 {
e780aef2
CL		 4379 next = NEXT_SEC (curr);
4380 end_of_next = next->output_offset + next->size;
4381 if (end_of_next - stub_group_start >= stub_group_size)
4382 /* End of NEXT is too far from start, so stop. */
8cd931b7 4383 break;
e780aef2
CL		 4384 /* Add NEXT to the group. */
4385 curr = next;
8cd931b7 4386 }
906e58ca 4387
07d72278 4388 /* OK, the size from the start to the start of CURR is less
906e58ca 4389 than stub_group_size and thus can be handled by one stub
07d72278 4390 section. (Or the head section is itself larger than
906e58ca
NC		 4391 stub_group_size, in which case we may be toast.)
4392 We should really be keeping track of the total size of
4393 stubs added here, as stubs contribute to the final output
7fb9f789 4394 section size. */
906e58ca
NC		 4395 do
4396 {
07d72278 4397 next = NEXT_SEC (head);
906e58ca 4398 /* Set up this stub group. */
07d72278 4399 htab->stub_group[head->id].link_sec = curr;
906e58ca 4400 }
07d72278 4401 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4402
4403 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4404 bytes after the stub section can be handled by it too. */
4405 if (!stubs_always_after_branch)
906e58ca 4406 {
e780aef2
CL		 4407 stub_group_start = curr->output_offset + curr->size;
4408
8cd931b7 4409 while (next != NULL)
906e58ca 4410 {
e780aef2
CL		 4411 end_of_next = next->output_offset + next->size;
4412 if (end_of_next - stub_group_start >= stub_group_size)
4413 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4414 break;
e780aef2 4415 /* Add NEXT to the stub group. */
07d72278
DJ		 4416 head = next;
4417 next = NEXT_SEC (head);
4418 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4419 }
4420 }
07d72278 4421 head = next;
906e58ca
NC		 4422 }
4423 }
07d72278 4424 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4425
4426 free (htab->input_list);
4427#undef PREV_SEC
07d72278 4428#undef NEXT_SEC
906e58ca
NC		 4429}
4430
48229727
JB		 4431/* Comparison function for sorting/searching relocations relating to Cortex-A8
4432 erratum fix. */
4433
4434static int
4435a8_reloc_compare (const void *a, const void *b)
4436{
21d799b5
NC		 4437 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4438 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4439
4440 if (ra->from < rb->from)
4441 return -1;
4442 else if (ra->from > rb->from)
4443 return 1;
4444 else
4445 return 0;
4446}
4447
4448static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4449 const char *, char **);
4450
4451/* Helper function to scan code for sequences which might trigger the Cortex-A8
4452 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4453 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4454 otherwise. */
4455
81694485
NC		 4456static bfd_boolean
4457cortex_a8_erratum_scan (bfd *input_bfd,
4458 struct bfd_link_info *info,
48229727
JB		 4459 struct a8_erratum_fix **a8_fixes_p,
4460 unsigned int *num_a8_fixes_p,
4461 unsigned int *a8_fix_table_size_p,
4462 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4463 unsigned int num_a8_relocs,
4464 unsigned prev_num_a8_fixes,
4465 bfd_boolean *stub_changed_p)
48229727
JB		 4466{
4467 asection *section;
4468 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4469 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4470 unsigned int num_a8_fixes = *num_a8_fixes_p;
4471 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4472
4dfe6ac6
NC		 4473 if (htab == NULL)
4474 return FALSE;
4475
48229727
JB		 4476 for (section = input_bfd->sections;
4477 section != NULL;
4478 section = section->next)
4479 {
4480 bfd_byte *contents = NULL;
4481 struct _arm_elf_section_data *sec_data;
4482 unsigned int span;
4483 bfd_vma base_vma;
4484
4485 if (elf_section_type (section) != SHT_PROGBITS
4486 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4487 || (section->flags & SEC_EXCLUDE) != 0
4488 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4489 || (section->output_section == bfd_abs_section_ptr))
4490 continue;
4491
4492 base_vma = section->output_section->vma + section->output_offset;
4493
4494 if (elf_section_data (section)->this_hdr.contents != NULL)
4495 contents = elf_section_data (section)->this_hdr.contents;
4496 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4497 return TRUE;
48229727
JB		 4498
4499 sec_data = elf32_arm_section_data (section);
4500
4501 for (span = 0; span < sec_data->mapcount; span++)
4502 {
4503 unsigned int span_start = sec_data->map[span].vma;
4504 unsigned int span_end = (span == sec_data->mapcount - 1)
4505 ? section->size : sec_data->map[span + 1].vma;
4506 unsigned int i;
4507 char span_type = sec_data->map[span].type;
4508 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4509
4510 if (span_type != 't')
4511 continue;
4512
4513 /* Span is entirely within a single 4KB region: skip scanning. */
4514 if (((base_vma + span_start) & ~0xfff)
4515 == ((base_vma + span_end) & ~0xfff))
4516 continue;
4517
4518 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4519
4520 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4521 * The branch target is in the same 4KB region as the
4522 first half of the branch.
4523 * The instruction before the branch is a 32-bit
81694485 4524 length non-branch instruction. */
48229727
JB		 4525 for (i = span_start; i < span_end;)
4526 {
4527 unsigned int insn = bfd_getl16 (&contents[i]);
4528 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4529 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4530
4531 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4532 insn_32bit = TRUE;
4533
4534 if (insn_32bit)
4535 {
4536 /* Load the rest of the insn (in manual-friendly order). */
4537 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4538
4539 /* Encoding T4: B<c>.W. */
4540 is_b = (insn & 0xf800d000) == 0xf0009000;
4541 /* Encoding T1: BL<c>.W. */
4542 is_bl = (insn & 0xf800d000) == 0xf000d000;
4543 /* Encoding T2: BLX<c>.W. */
4544 is_blx = (insn & 0xf800d000) == 0xf000c000;
4545 /* Encoding T3: B<c>.W (not permitted in IT block). */
4546 is_bcc = (insn & 0xf800d000) == 0xf0008000
4547 && (insn & 0x07f00000) != 0x03800000;
4548 }
4549
4550 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4551
81694485
NC		 4552 if (((base_vma + i) & 0xfff) == 0xffe
4553 && insn_32bit
4554 && is_32bit_branch
4555 && last_was_32bit
4556 && ! last_was_branch)
48229727 4557 {
8f73510c 4558 bfd_signed_vma offset = 0;
48229727
JB		 4559 bfd_boolean force_target_arm = FALSE;
4560 bfd_boolean force_target_thumb = FALSE;
4561 bfd_vma target;
4562 enum elf32_arm_stub_type stub_type = arm_stub_none;
4563 struct a8_erratum_reloc key, *found;
7d24e6a6 4564 bfd_boolean use_plt = FALSE;
48229727
JB		 4565
4566 key.from = base_vma + i;
21d799b5
NC		 4567 found = (struct a8_erratum_reloc *)
4568 bsearch (&key, a8_relocs, num_a8_relocs,
4569 sizeof (struct a8_erratum_reloc),
4570 &a8_reloc_compare);
48229727
JB		 4571
4572 if (found)
4573 {
4574 char *error_message = NULL;
4575 struct elf_link_hash_entry *entry;
4576
4577 /* We don't care about the error returned from this
4578 function, only if there is glue or not. */
4579 entry = find_thumb_glue (info, found->sym_name,
4580 &error_message);
4581
4582 if (entry)
4583 found->non_a8_stub = TRUE;
4584
92750f34 4585 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4586 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4587 && found->hash->root.plt.offset != (bfd_vma) -1)
4588 use_plt = TRUE;
4589
4590 if (found->r_type == R_ARM_THM_CALL)
4591 {
35fc36a8
RS		 4592 if (found->branch_type == ST_BRANCH_TO_ARM
4593 || use_plt)
92750f34
DJ		 4594 force_target_arm = TRUE;
4595 else
4596 force_target_thumb = TRUE;
4597 }
48229727
JB		 4598 }
4599
4600 /* Check if we have an offending branch instruction. */
4601
4602 if (found && found->non_a8_stub)
4603 /* We've already made a stub for this instruction, e.g.
4604 it's a long branch or a Thumb->ARM stub. Assume that
4605 stub will suffice to work around the A8 erratum (see
4606 setting of always_after_branch above). */
4607 ;
4608 else if (is_bcc)
4609 {
4610 offset = (insn & 0x7ff) << 1;
4611 offset |= (insn & 0x3f0000) >> 4;
4612 offset |= (insn & 0x2000) ? 0x40000 : 0;
4613 offset |= (insn & 0x800) ? 0x80000 : 0;
4614 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4615 if (offset & 0x100000)
81694485 4616 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4617 stub_type = arm_stub_a8_veneer_b_cond;
4618 }
4619 else if (is_b || is_bl || is_blx)
4620 {
4621 int s = (insn & 0x4000000) != 0;
4622 int j1 = (insn & 0x2000) != 0;
4623 int j2 = (insn & 0x800) != 0;
4624 int i1 = !(j1 ^ s);
4625 int i2 = !(j2 ^ s);
4626
4627 offset = (insn & 0x7ff) << 1;
4628 offset |= (insn & 0x3ff0000) >> 4;
4629 offset |= i2 << 22;
4630 offset |= i1 << 23;
4631 offset |= s << 24;
4632 if (offset & 0x1000000)
81694485 4633 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4634
4635 if (is_blx)
81694485 4636 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4637
4638 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4639 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4640 }
4641
4642 if (stub_type != arm_stub_none)
4643 {
4644 bfd_vma pc_for_insn = base_vma + i + 4;
4645
4646 /* The original instruction is a BL, but the target is
4647 an ARM instruction. If we were not making a stub,
4648 the BL would have been converted to a BLX. Use the
4649 BLX stub instead in that case. */
4650 if (htab->use_blx && force_target_arm
4651 && stub_type == arm_stub_a8_veneer_bl)
4652 {
4653 stub_type = arm_stub_a8_veneer_blx;
4654 is_blx = TRUE;
4655 is_bl = FALSE;
4656 }
4657 /* Conversely, if the original instruction was
4658 BLX but the target is Thumb mode, use the BL
4659 stub. */
4660 else if (force_target_thumb
4661 && stub_type == arm_stub_a8_veneer_blx)
4662 {
4663 stub_type = arm_stub_a8_veneer_bl;
4664 is_blx = FALSE;
4665 is_bl = TRUE;
4666 }
4667
4668 if (is_blx)
81694485 4669 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4670
4671 /* If we found a relocation, use the proper destination,
4672 not the offset in the (unrelocated) instruction.
4673 Note this is always done if we switched the stub type
4674 above. */
4675 if (found)
81694485
NC		 4676 offset =
4677 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4678
7d24e6a6
RS		 4679 /* If the stub will use a Thumb-mode branch to a
4680 PLT target, redirect it to the preceding Thumb
4681 entry point. */
4682 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4683 offset -= PLT_THUMB_STUB_SIZE;
4684
48229727
JB		 4685 target = pc_for_insn + offset;
4686
4687 /* The BLX stub is ARM-mode code. Adjust the offset to
4688 take the different PC value (+8 instead of +4) into
4689 account. */
4690 if (stub_type == arm_stub_a8_veneer_blx)
4691 offset += 4;
4692
4693 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4694 {
eb7c4339 4695 char *stub_name = NULL;
48229727
JB		 4696
4697 if (num_a8_fixes == a8_fix_table_size)
4698 {
4699 a8_fix_table_size *= 2;
21d799b5
NC		 4700 a8_fixes = (struct a8_erratum_fix *)
4701 bfd_realloc (a8_fixes,
4702 sizeof (struct a8_erratum_fix)
4703 * a8_fix_table_size);
48229727
JB		 4704 }
4705
eb7c4339
NS		 4706 if (num_a8_fixes < prev_num_a8_fixes)
4707 {
4708 /* If we're doing a subsequent scan,
4709 check if we've found the same fix as
4710 before, and try and reuse the stub
4711 name. */
4712 stub_name = a8_fixes[num_a8_fixes].stub_name;
4713 if ((a8_fixes[num_a8_fixes].section != section)
4714 || (a8_fixes[num_a8_fixes].offset != i))
4715 {
4716 free (stub_name);
4717 stub_name = NULL;
4718 *stub_changed_p = TRUE;
4719 }
4720 }
4721
4722 if (!stub_name)
4723 {
21d799b5 4724 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4725 if (stub_name != NULL)
4726 sprintf (stub_name, "%x:%x", section->id, i);
4727 }
48229727
JB		 4728
4729 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4730 a8_fixes[num_a8_fixes].section = section;
4731 a8_fixes[num_a8_fixes].offset = i;
4732 a8_fixes[num_a8_fixes].addend = offset;
4733 a8_fixes[num_a8_fixes].orig_insn = insn;
4734 a8_fixes[num_a8_fixes].stub_name = stub_name;
4735 a8_fixes[num_a8_fixes].stub_type = stub_type;
35fc36a8
RS		 4736 a8_fixes[num_a8_fixes].branch_type =
4737 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727
JB		 4738
4739 num_a8_fixes++;
4740 }
4741 }
4742 }
4743
4744 i += insn_32bit ? 4 : 2;
4745 last_was_32bit = insn_32bit;
4746 last_was_branch = is_32bit_branch;
4747 }
4748 }
4749
4750 if (elf_section_data (section)->this_hdr.contents == NULL)
4751 free (contents);
4752 }
fe33d2fa 4753
48229727
JB		 4754 *a8_fixes_p = a8_fixes;
4755 *num_a8_fixes_p = num_a8_fixes;
4756 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4757
81694485 4758 return FALSE;
48229727
JB		 4759}
4760
906e58ca
NC		 4761/* Determine and set the size of the stub section for a final link.
4762
4763 The basic idea here is to examine all the relocations looking for
4764 PC-relative calls to a target that is unreachable with a "bl"
4765 instruction. */
4766
4767bfd_boolean
4768elf32_arm_size_stubs (bfd *output_bfd,
4769 bfd *stub_bfd,
4770 struct bfd_link_info *info,
4771 bfd_signed_vma group_size,
4772 asection * (*add_stub_section) (const char *, asection *),
4773 void (*layout_sections_again) (void))
4774{
4775 bfd_size_type stub_group_size;
07d72278 4776 bfd_boolean stubs_always_after_branch;
906e58ca 4777 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4778 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4779 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4780 struct a8_erratum_reloc *a8_relocs = NULL;
4781 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4782
4dfe6ac6
NC		 4783 if (htab == NULL)
4784 return FALSE;
4785
48229727
JB		 4786 if (htab->fix_cortex_a8)
4787 {
21d799b5
NC		 4788 a8_fixes = (struct a8_erratum_fix *)
4789 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4790 a8_relocs = (struct a8_erratum_reloc *)
4791 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4792 }
906e58ca
NC		 4793
4794 /* Propagate mach to stub bfd, because it may not have been
4795 finalized when we created stub_bfd. */
4796 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4797 bfd_get_mach (output_bfd));
4798
4799 /* Stash our params away. */
4800 htab->stub_bfd = stub_bfd;
4801 htab->add_stub_section = add_stub_section;
4802 htab->layout_sections_again = layout_sections_again;
07d72278 4803 stubs_always_after_branch = group_size < 0;
48229727
JB		 4804
4805 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4806 as the first half of a 32-bit branch straddling two 4K pages. This is a
4807 crude way of enforcing that. */
4808 if (htab->fix_cortex_a8)
4809 stubs_always_after_branch = 1;
4810
906e58ca
NC		 4811 if (group_size < 0)
4812 stub_group_size = -group_size;
4813 else
4814 stub_group_size = group_size;
4815
4816 if (stub_group_size == 1)
4817 {
4818 /* Default values. */
4819 /* Thumb branch range is +-4MB has to be used as the default
4820 maximum size (a given section can contain both ARM and Thumb
4821 code, so the worst case has to be taken into account).
4822
4823 This value is 24K less than that, which allows for 2025
4824 12-byte stubs. If we exceed that, then we will fail to link.
4825 The user will have to relink with an explicit group size
4826 option. */
4827 stub_group_size = 4170000;
4828 }
4829
07d72278 4830 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4831
3ae046cc
NS		 4832 /* If we're applying the cortex A8 fix, we need to determine the
4833 program header size now, because we cannot change it later --
4834 that could alter section placements. Notice the A8 erratum fix
4835 ends up requiring the section addresses to remain unchanged
4836 modulo the page size. That's something we cannot represent
4837 inside BFD, and we don't want to force the section alignment to
4838 be the page size. */
4839 if (htab->fix_cortex_a8)
4840 (*htab->layout_sections_again) ();
4841
906e58ca
NC		 4842 while (1)
4843 {
4844 bfd *input_bfd;
4845 unsigned int bfd_indx;
4846 asection *stub_sec;
eb7c4339
NS		 4847 bfd_boolean stub_changed = FALSE;
4848 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4849
48229727 4850 num_a8_fixes = 0;
906e58ca
NC		 4851 for (input_bfd = info->input_bfds, bfd_indx = 0;
4852 input_bfd != NULL;
4853 input_bfd = input_bfd->link_next, bfd_indx++)
4854 {
4855 Elf_Internal_Shdr *symtab_hdr;
4856 asection *section;
4857 Elf_Internal_Sym *local_syms = NULL;
4858
48229727
JB		 4859 num_a8_relocs = 0;
4860
906e58ca
NC		 4861 /* We'll need the symbol table in a second. */
4862 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4863 if (symtab_hdr->sh_info == 0)
4864 continue;
4865
4866 /* Walk over each section attached to the input bfd. */
4867 for (section = input_bfd->sections;
4868 section != NULL;
4869 section = section->next)
4870 {
4871 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4872
4873 /* If there aren't any relocs, then there's nothing more
4874 to do. */
4875 if ((section->flags & SEC_RELOC) == 0
4876 || section->reloc_count == 0
4877 || (section->flags & SEC_CODE) == 0)
4878 continue;
4879
4880 /* If this section is a link-once section that will be
4881 discarded, then don't create any stubs. */
4882 if (section->output_section == NULL
4883 || section->output_section->owner != output_bfd)
4884 continue;
4885
4886 /* Get the relocs. */
4887 internal_relocs
4888 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4889 NULL, info->keep_memory);
4890 if (internal_relocs == NULL)
4891 goto error_ret_free_local;
4892
4893 /* Now examine each relocation. */
4894 irela = internal_relocs;
4895 irelaend = irela + section->reloc_count;
4896 for (; irela < irelaend; irela++)
4897 {
4898 unsigned int r_type, r_indx;
4899 enum elf32_arm_stub_type stub_type;
4900 struct elf32_arm_stub_hash_entry *stub_entry;
4901 asection *sym_sec;
4902 bfd_vma sym_value;
4903 bfd_vma destination;
4904 struct elf32_arm_link_hash_entry *hash;
7413f23f 4905 const char *sym_name;
906e58ca
NC		 4906 char *stub_name;
4907 const asection *id_sec;
34e77a92 4908 unsigned char st_type;
35fc36a8 4909 enum arm_st_branch_type branch_type;
48229727 4910 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4911
4912 r_type = ELF32_R_TYPE (irela->r_info);
4913 r_indx = ELF32_R_SYM (irela->r_info);
4914
4915 if (r_type >= (unsigned int) R_ARM_max)
4916 {
4917 bfd_set_error (bfd_error_bad_value);
4918 error_ret_free_internal:
4919 if (elf_section_data (section)->relocs == NULL)
4920 free (internal_relocs);
4921 goto error_ret_free_local;
4922 }
0855e32b
NS		 4923
4924 hash = NULL;
4925 if (r_indx >= symtab_hdr->sh_info)
4926 hash = elf32_arm_hash_entry
4927 (elf_sym_hashes (input_bfd)
4928 [r_indx - symtab_hdr->sh_info]);
4929
4930 /* Only look for stubs on branch instructions, or
4931 non-relaxed TLSCALL */
906e58ca 4932 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4933 && (r_type != (unsigned int) R_ARM_THM_CALL)
4934 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4935 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4936 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 4937 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 4938 && (r_type != (unsigned int) R_ARM_PLT32)
4939 && !((r_type == (unsigned int) R_ARM_TLS_CALL
4940 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4941 && r_type == elf32_arm_tls_transition
4942 (info, r_type, &hash->root)
4943 && ((hash ? hash->tls_type
4944 : (elf32_arm_local_got_tls_type
4945 (input_bfd)[r_indx]))
4946 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 4947 continue;
4948
4949 /* Now determine the call target, its name, value,
4950 section. */
4951 sym_sec = NULL;
4952 sym_value = 0;
4953 destination = 0;
7413f23f 4954 sym_name = NULL;
0855e32b
NS		 4955
4956 if (r_type == (unsigned int) R_ARM_TLS_CALL
4957 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
4958 {
4959 /* A non-relaxed TLS call. The target is the
4960 plt-resident trampoline and nothing to do
4961 with the symbol. */
4962 BFD_ASSERT (htab->tls_trampoline > 0);
4963 sym_sec = htab->root.splt;
4964 sym_value = htab->tls_trampoline;
4965 hash = 0;
34e77a92 4966 st_type = STT_FUNC;
35fc36a8 4967 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 4968 }
4969 else if (!hash)
906e58ca
NC		 4970 {
4971 /* It's a local symbol. */
4972 Elf_Internal_Sym *sym;
906e58ca
NC		 4973
4974 if (local_syms == NULL)
4975 {
4976 local_syms
4977 = (Elf_Internal_Sym *) symtab_hdr->contents;
4978 if (local_syms == NULL)
4979 local_syms
4980 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4981 symtab_hdr->sh_info, 0,
4982 NULL, NULL, NULL);
4983 if (local_syms == NULL)
4984 goto error_ret_free_internal;
4985 }
4986
4987 sym = local_syms + r_indx;
f6d250ce
TS		 4988 if (sym->st_shndx == SHN_UNDEF)
4989 sym_sec = bfd_und_section_ptr;
4990 else if (sym->st_shndx == SHN_ABS)
4991 sym_sec = bfd_abs_section_ptr;
4992 else if (sym->st_shndx == SHN_COMMON)
4993 sym_sec = bfd_com_section_ptr;
4994 else
4995 sym_sec =
4996 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
4997
ffcb4889
NS		 4998 if (!sym_sec)
4999 /* This is an undefined symbol. It can never
5000 be resolved. */
5001 continue;
fe33d2fa 5002
906e58ca
NC		 5003 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5004 sym_value = sym->st_value;
5005 destination = (sym_value + irela->r_addend
5006 + sym_sec->output_offset
5007 + sym_sec->output_section->vma);
34e77a92 5008 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5009 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5010 sym_name
5011 = bfd_elf_string_from_elf_section (input_bfd,
5012 symtab_hdr->sh_link,
5013 sym->st_name);
906e58ca
NC		 5014 }
5015 else
5016 {
5017 /* It's an external symbol. */
906e58ca
NC		 5018 while (hash->root.root.type == bfd_link_hash_indirect
5019 || hash->root.root.type == bfd_link_hash_warning)
5020 hash = ((struct elf32_arm_link_hash_entry *)
5021 hash->root.root.u.i.link);
5022
5023 if (hash->root.root.type == bfd_link_hash_defined
5024 || hash->root.root.type == bfd_link_hash_defweak)
5025 {
5026 sym_sec = hash->root.root.u.def.section;
5027 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5028
5029 struct elf32_arm_link_hash_table *globals =
5030 elf32_arm_hash_table (info);
5031
5032 /* For a destination in a shared library,
5033 use the PLT stub as target address to
5034 decide whether a branch stub is
5035 needed. */
4dfe6ac6 5036 if (globals != NULL
362d30a1 5037 && globals->root.splt != NULL
4dfe6ac6 5038 && hash != NULL
022f8312
CL		 5039 && hash->root.plt.offset != (bfd_vma) -1)
5040 {
362d30a1 5041 sym_sec = globals->root.splt;
022f8312
CL		 5042 sym_value = hash->root.plt.offset;
5043 if (sym_sec->output_section != NULL)
5044 destination = (sym_value
5045 + sym_sec->output_offset
5046 + sym_sec->output_section->vma);
5047 }
5048 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5049 destination = (sym_value + irela->r_addend
5050 + sym_sec->output_offset
5051 + sym_sec->output_section->vma);
5052 }
69c5861e
CL		 5053 else if ((hash->root.root.type == bfd_link_hash_undefined)
5054 || (hash->root.root.type == bfd_link_hash_undefweak))
5055 {
5056 /* For a shared library, use the PLT stub as
5057 target address to decide whether a long
5058 branch stub is needed.
5059 For absolute code, they cannot be handled. */
5060 struct elf32_arm_link_hash_table *globals =
5061 elf32_arm_hash_table (info);
5062
4dfe6ac6 5063 if (globals != NULL
362d30a1 5064 && globals->root.splt != NULL
4dfe6ac6 5065 && hash != NULL
69c5861e
CL		 5066 && hash->root.plt.offset != (bfd_vma) -1)
5067 {
362d30a1 5068 sym_sec = globals->root.splt;
69c5861e
CL		 5069 sym_value = hash->root.plt.offset;
5070 if (sym_sec->output_section != NULL)
5071 destination = (sym_value
5072 + sym_sec->output_offset
5073 + sym_sec->output_section->vma);
5074 }
5075 else
5076 continue;
5077 }
906e58ca
NC		 5078 else
5079 {
5080 bfd_set_error (bfd_error_bad_value);
5081 goto error_ret_free_internal;
5082 }
34e77a92 5083 st_type = hash->root.type;
35fc36a8 5084 branch_type = hash->root.target_internal;
7413f23f 5085 sym_name = hash->root.root.root.string;
906e58ca
NC		 5086 }
5087
48229727 5088 do
7413f23f 5089 {
48229727
JB		 5090 /* Determine what (if any) linker stub is needed. */
5091 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5092 st_type, &branch_type,
5093 hash, destination, sym_sec,
48229727
JB		 5094 input_bfd, sym_name);
5095 if (stub_type == arm_stub_none)
5096 break;
5097
5098 /* Support for grouping stub sections. */
5099 id_sec = htab->stub_group[section->id].link_sec;
5100
5101 /* Get the name of this stub. */
5102 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5103 irela, stub_type);
48229727
JB		 5104 if (!stub_name)
5105 goto error_ret_free_internal;
5106
5107 /* We've either created a stub for this reloc already,
5108 or we are about to. */
5109 created_stub = TRUE;
5110
5111 stub_entry = arm_stub_hash_lookup
5112 (&htab->stub_hash_table, stub_name,
5113 FALSE, FALSE);
5114 if (stub_entry != NULL)
5115 {
5116 /* The proper stub has already been created. */
5117 free (stub_name);
eb7c4339 5118 stub_entry->target_value = sym_value;
48229727
JB		 5119 break;
5120 }
7413f23f 5121
48229727
JB		 5122 stub_entry = elf32_arm_add_stub (stub_name, section,
5123 htab);
5124 if (stub_entry == NULL)
5125 {
5126 free (stub_name);
5127 goto error_ret_free_internal;
5128 }
7413f23f 5129
48229727
JB		 5130 stub_entry->target_value = sym_value;
5131 stub_entry->target_section = sym_sec;
5132 stub_entry->stub_type = stub_type;
5133 stub_entry->h = hash;
35fc36a8 5134 stub_entry->branch_type = branch_type;
48229727
JB		 5135
5136 if (sym_name == NULL)
5137 sym_name = "unnamed";
21d799b5
NC		 5138 stub_entry->output_name = (char *)
5139 bfd_alloc (htab->stub_bfd,
48229727
JB		 5140 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5141 + strlen (sym_name));
5142 if (stub_entry->output_name == NULL)
5143 {
5144 free (stub_name);
5145 goto error_ret_free_internal;
5146 }
5147
5148 /* For historical reasons, use the existing names for
5149 ARM-to-Thumb and Thumb-to-ARM stubs. */
35fc36a8
RS		 5150 if ((r_type == (unsigned int) R_ARM_THM_CALL
5151 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5152 && branch_type == ST_BRANCH_TO_ARM)
48229727
JB		 5153 sprintf (stub_entry->output_name,
5154 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
35fc36a8
RS		 5155 else if ((r_type == (unsigned int) R_ARM_CALL
5156 || r_type == (unsigned int) R_ARM_JUMP24)
5157 && branch_type == ST_BRANCH_TO_THUMB)
48229727
JB		 5158 sprintf (stub_entry->output_name,
5159 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5160 else
5161 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5162 sym_name);
5163
5164 stub_changed = TRUE;
5165 }
5166 while (0);
5167
5168 /* Look for relocations which might trigger Cortex-A8
5169 erratum. */
5170 if (htab->fix_cortex_a8
5171 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5172 || r_type == (unsigned int) R_ARM_THM_JUMP19
5173 || r_type == (unsigned int) R_ARM_THM_CALL
5174 || r_type == (unsigned int) R_ARM_THM_XPC22))
5175 {
5176 bfd_vma from = section->output_section->vma
5177 + section->output_offset
5178 + irela->r_offset;
5179
5180 if ((from & 0xfff) == 0xffe)
5181 {
5182 /* Found a candidate. Note we haven't checked the
5183 destination is within 4K here: if we do so (and
5184 don't create an entry in a8_relocs) we can't tell
5185 that a branch should have been relocated when
5186 scanning later. */
5187 if (num_a8_relocs == a8_reloc_table_size)
5188 {
5189 a8_reloc_table_size *= 2;
21d799b5
NC		 5190 a8_relocs = (struct a8_erratum_reloc *)
5191 bfd_realloc (a8_relocs,
5192 sizeof (struct a8_erratum_reloc)
5193 * a8_reloc_table_size);
48229727
JB		 5194 }
5195
5196 a8_relocs[num_a8_relocs].from = from;
5197 a8_relocs[num_a8_relocs].destination = destination;
5198 a8_relocs[num_a8_relocs].r_type = r_type;
35fc36a8 5199 a8_relocs[num_a8_relocs].branch_type = branch_type;
48229727
JB		 5200 a8_relocs[num_a8_relocs].sym_name = sym_name;
5201 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 5202 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 5203
5204 num_a8_relocs++;
5205 }
5206 }
906e58ca
NC		 5207 }
5208
48229727
JB		 5209 /* We're done with the internal relocs, free them. */
5210 if (elf_section_data (section)->relocs == NULL)
5211 free (internal_relocs);
5212 }
5213
5214 if (htab->fix_cortex_a8)
5215 {
5216 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 5217 qsort (a8_relocs, num_a8_relocs,
5218 sizeof (struct a8_erratum_reloc),
48229727
JB		 5219 &a8_reloc_compare);
5220
5221 /* Scan for branches which might trigger Cortex-A8 erratum. */
5222 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5223 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5224 a8_relocs, num_a8_relocs,
5225 prev_num_a8_fixes, &stub_changed)
5226 != 0)
48229727 5227 goto error_ret_free_local;
5e681ec4 5228 }
5e681ec4
PB		 5229 }
5230
eb7c4339 5231 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 5232 stub_changed = TRUE;
5233
906e58ca
NC		 5234 if (!stub_changed)
5235 break;
5e681ec4 5236
906e58ca
NC		 5237 /* OK, we've added some stubs. Find out the new size of the
5238 stub sections. */
5239 for (stub_sec = htab->stub_bfd->sections;
5240 stub_sec != NULL;
5241 stub_sec = stub_sec->next)
3e6b1042
DJ		 5242 {
5243 /* Ignore non-stub sections. */
5244 if (!strstr (stub_sec->name, STUB_SUFFIX))
5245 continue;
5246
5247 stub_sec->size = 0;
5248 }
b34b2d70 5249
906e58ca
NC		 5250 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5251
48229727
JB		 5252 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5253 if (htab->fix_cortex_a8)
5254 for (i = 0; i < num_a8_fixes; i++)
5255 {
5256 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5257 a8_fixes[i].section, htab);
5258
5259 if (stub_sec == NULL)
5260 goto error_ret_free_local;
5261
5262 stub_sec->size
5263 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5264 NULL);
5265 }
5266
5267
906e58ca
NC		 5268 /* Ask the linker to do its stuff. */
5269 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5270 }
5271
48229727
JB		 5272 /* Add stubs for Cortex-A8 erratum fixes now. */
5273 if (htab->fix_cortex_a8)
5274 {
5275 for (i = 0; i < num_a8_fixes; i++)
5276 {
5277 struct elf32_arm_stub_hash_entry *stub_entry;
5278 char *stub_name = a8_fixes[i].stub_name;
5279 asection *section = a8_fixes[i].section;
5280 unsigned int section_id = a8_fixes[i].section->id;
5281 asection *link_sec = htab->stub_group[section_id].link_sec;
5282 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 5283 const insn_sequence *template_sequence;
48229727
JB		 5284 int template_size, size = 0;
5285
5286 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5287 TRUE, FALSE);
5288 if (stub_entry == NULL)
5289 {
5290 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5291 section->owner,
5292 stub_name);
5293 return FALSE;
5294 }
5295
5296 stub_entry->stub_sec = stub_sec;
5297 stub_entry->stub_offset = 0;
5298 stub_entry->id_sec = link_sec;
5299 stub_entry->stub_type = a8_fixes[i].stub_type;
5300 stub_entry->target_section = a8_fixes[i].section;
5301 stub_entry->target_value = a8_fixes[i].offset;
5302 stub_entry->target_addend = a8_fixes[i].addend;
5303 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5304 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5305
d3ce72d0
NC		 5306 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5307 &template_sequence,
48229727
JB		 5308 &template_size);
5309
5310 stub_entry->stub_size = size;
d3ce72d0 5311 stub_entry->stub_template = template_sequence;
48229727
JB		 5312 stub_entry->stub_template_size = template_size;
5313 }
5314
5315 /* Stash the Cortex-A8 erratum fix array for use later in
5316 elf32_arm_write_section(). */
5317 htab->a8_erratum_fixes = a8_fixes;
5318 htab->num_a8_erratum_fixes = num_a8_fixes;
5319 }
5320 else
5321 {
5322 htab->a8_erratum_fixes = NULL;
5323 htab->num_a8_erratum_fixes = 0;
5324 }
906e58ca
NC		 5325 return TRUE;
5326
5327 error_ret_free_local:
5328 return FALSE;
5e681ec4
PB		 5329}
5330
906e58ca
NC		 5331/* Build all the stubs associated with the current output file. The
5332 stubs are kept in a hash table attached to the main linker hash
5333 table. We also set up the .plt entries for statically linked PIC
5334 functions here. This function is called via arm_elf_finish in the
5335 linker. */
252b5132 5336
906e58ca
NC		 5337bfd_boolean
5338elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5339{
906e58ca
NC		 5340 asection *stub_sec;
5341 struct bfd_hash_table *table;
5342 struct elf32_arm_link_hash_table *htab;
252b5132 5343
906e58ca 5344 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5345 if (htab == NULL)
5346 return FALSE;
252b5132 5347
906e58ca
NC		 5348 for (stub_sec = htab->stub_bfd->sections;
5349 stub_sec != NULL;
5350 stub_sec = stub_sec->next)
252b5132 5351 {
906e58ca
NC		 5352 bfd_size_type size;
5353
8029a119 5354 /* Ignore non-stub sections. */
906e58ca
NC		 5355 if (!strstr (stub_sec->name, STUB_SUFFIX))
5356 continue;
5357
5358 /* Allocate memory to hold the linker stubs. */
5359 size = stub_sec->size;
21d799b5 5360 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5361 if (stub_sec->contents == NULL && size != 0)
5362 return FALSE;
5363 stub_sec->size = 0;
252b5132
RH		 5364 }
5365
906e58ca
NC		 5366 /* Build the stubs as directed by the stub hash table. */
5367 table = &htab->stub_hash_table;
5368 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5369 if (htab->fix_cortex_a8)
5370 {
5371 /* Place the cortex a8 stubs last. */
5372 htab->fix_cortex_a8 = -1;
5373 bfd_hash_traverse (table, arm_build_one_stub, info);
5374 }
252b5132 5375
906e58ca 5376 return TRUE;
252b5132
RH		 5377}
5378
9b485d32
NC		 5379/* Locate the Thumb encoded calling stub for NAME. */
5380
252b5132 5381static struct elf_link_hash_entry *
57e8b36a
NC		 5382find_thumb_glue (struct bfd_link_info *link_info,
5383 const char *name,
f2a9dd69 5384 char **error_message)
252b5132
RH		 5385{
5386 char *tmp_name;
5387 struct elf_link_hash_entry *hash;
5388 struct elf32_arm_link_hash_table *hash_table;
5389
5390 /* We need a pointer to the armelf specific hash table. */
5391 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5392 if (hash_table == NULL)
5393 return NULL;
252b5132 5394
21d799b5
NC		 5395 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5396 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5397
5398 BFD_ASSERT (tmp_name);
5399
5400 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5401
5402 hash = elf_link_hash_lookup
b34976b6 5403 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5404
b1657152
AM		 5405 if (hash == NULL
5406 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5407 tmp_name, name) == -1)
5408 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5409
5410 free (tmp_name);
5411
5412 return hash;
5413}
5414
9b485d32
NC		 5415/* Locate the ARM encoded calling stub for NAME. */
5416
252b5132 5417static struct elf_link_hash_entry *
57e8b36a
NC		 5418find_arm_glue (struct bfd_link_info *link_info,
5419 const char *name,
f2a9dd69 5420 char **error_message)
252b5132
RH		 5421{
5422 char *tmp_name;
5423 struct elf_link_hash_entry *myh;
5424 struct elf32_arm_link_hash_table *hash_table;
5425
5426 /* We need a pointer to the elfarm specific hash table. */
5427 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5428 if (hash_table == NULL)
5429 return NULL;
252b5132 5430
21d799b5
NC		 5431 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5432 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5433
5434 BFD_ASSERT (tmp_name);
5435
5436 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5437
5438 myh = elf_link_hash_lookup
b34976b6 5439 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5440
b1657152
AM		 5441 if (myh == NULL
5442 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5443 tmp_name, name) == -1)
5444 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5445
5446 free (tmp_name);
5447
5448 return myh;
5449}
5450
8f6277f5 5451/* ARM->Thumb glue (static images):
252b5132
RH		 5452
5453 .arm
5454 __func_from_arm:
5455 ldr r12, __func_addr
5456 bx r12
5457 __func_addr:
906e58ca 5458 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5459
26079076
PB		 5460 (v5t static images)
5461 .arm
5462 __func_from_arm:
5463 ldr pc, __func_addr
5464 __func_addr:
906e58ca 5465 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5466
8f6277f5
PB		 5467 (relocatable images)
5468 .arm
5469 __func_from_arm:
5470 ldr r12, __func_offset
5471 add r12, r12, pc
5472 bx r12
5473 __func_offset:
8029a119 5474 .word func - . */
8f6277f5
PB		 5475
5476#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5477static const insn32 a2t1_ldr_insn = 0xe59fc000;
5478static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5479static const insn32 a2t3_func_addr_insn = 0x00000001;
5480
26079076
PB		 5481#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5482static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5483static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5484
8f6277f5
PB		 5485#define ARM2THUMB_PIC_GLUE_SIZE 16
5486static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5487static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5488static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5489
9b485d32 5490/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5491
8029a119
NC		 5492 .thumb .thumb
5493 .align 2 .align 2
5494 __func_from_thumb: __func_from_thumb:
5495 bx pc push {r6, lr}
5496 nop ldr r6, __func_addr
5497 .arm mov lr, pc
5498 b func bx r6
fcef9eb7
NC		 5499 .arm
5500 ;; back_to_thumb
5501 ldmia r13! {r6, lr}
5502 bx lr
8029a119
NC		 5503 __func_addr:
5504 .word func */
252b5132
RH		 5505
5506#define THUMB2ARM_GLUE_SIZE 8
5507static const insn16 t2a1_bx_pc_insn = 0x4778;
5508static const insn16 t2a2_noop_insn = 0x46c0;
5509static const insn32 t2a3_b_insn = 0xea000000;
5510
c7b8f16e
JB		 5511#define VFP11_ERRATUM_VENEER_SIZE 8
5512
845b51d6
PB		 5513#define ARM_BX_VENEER_SIZE 12
5514static const insn32 armbx1_tst_insn = 0xe3100001;
5515static const insn32 armbx2_moveq_insn = 0x01a0f000;
5516static const insn32 armbx3_bx_insn = 0xe12fff10;
5517
7e392df6 5518#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5519static void
5520arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5521{
5522 asection * s;
8029a119 5523 bfd_byte * contents;
252b5132 5524
8029a119 5525 if (size == 0)
3e6b1042
DJ		 5526 {
5527 /* Do not include empty glue sections in the output. */
5528 if (abfd != NULL)
5529 {
5530 s = bfd_get_section_by_name (abfd, name);
5531 if (s != NULL)
5532 s->flags |= SEC_EXCLUDE;
5533 }
5534 return;
5535 }
252b5132 5536
8029a119 5537 BFD_ASSERT (abfd != NULL);
252b5132 5538
8029a119
NC		 5539 s = bfd_get_section_by_name (abfd, name);
5540 BFD_ASSERT (s != NULL);
252b5132 5541
21d799b5 5542 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5543
8029a119
NC		 5544 BFD_ASSERT (s->size == size);
5545 s->contents = contents;
5546}
906e58ca 5547
8029a119
NC		 5548bfd_boolean
5549bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5550{
5551 struct elf32_arm_link_hash_table * globals;
906e58ca 5552
8029a119
NC		 5553 globals = elf32_arm_hash_table (info);
5554 BFD_ASSERT (globals != NULL);
906e58ca 5555
8029a119
NC		 5556 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5557 globals->arm_glue_size,
5558 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5559
8029a119
NC		 5560 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5561 globals->thumb_glue_size,
5562 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5563
8029a119
NC		 5564 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5565 globals->vfp11_erratum_glue_size,
5566 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5567
8029a119
NC		 5568 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5569 globals->bx_glue_size,
845b51d6
PB		 5570 ARM_BX_GLUE_SECTION_NAME);
5571
b34976b6 5572 return TRUE;
252b5132
RH		 5573}
5574
a4fd1a8e 5575/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5576 returns the symbol identifying the stub. */
5577
a4fd1a8e 5578static struct elf_link_hash_entry *
57e8b36a
NC		 5579record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5580 struct elf_link_hash_entry * h)
252b5132
RH		 5581{
5582 const char * name = h->root.root.string;
63b0f745 5583 asection * s;
252b5132
RH		 5584 char * tmp_name;
5585 struct elf_link_hash_entry * myh;
14a793b2 5586 struct bfd_link_hash_entry * bh;
252b5132 5587 struct elf32_arm_link_hash_table * globals;
dc810e39 5588 bfd_vma val;
2f475487 5589 bfd_size_type size;
252b5132
RH		 5590
5591 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5592 BFD_ASSERT (globals != NULL);
5593 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5594
5595 s = bfd_get_section_by_name
5596 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5597
252b5132
RH		 5598 BFD_ASSERT (s != NULL);
5599
21d799b5
NC		 5600 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5601 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5602
5603 BFD_ASSERT (tmp_name);
5604
5605 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5606
5607 myh = elf_link_hash_lookup
b34976b6 5608 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5609
5610 if (myh != NULL)
5611 {
9b485d32 5612 /* We've already seen this guy. */
252b5132 5613 free (tmp_name);
a4fd1a8e 5614 return myh;
252b5132
RH		 5615 }
5616
57e8b36a
NC		 5617 /* The only trick here is using hash_table->arm_glue_size as the value.
5618 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5619 putting it. The +1 on the value marks that the stub has not been
5620 output yet - not that it is a Thumb function. */
14a793b2 5621 bh = NULL;
dc810e39
AM		 5622 val = globals->arm_glue_size + 1;
5623 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5624 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5625 NULL, TRUE, FALSE, &bh);
252b5132 5626
b7693d02
DJ		 5627 myh = (struct elf_link_hash_entry *) bh;
5628 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5629 myh->forced_local = 1;
5630
252b5132
RH		 5631 free (tmp_name);
5632
27e55c4d
PB		 5633 if (link_info->shared || globals->root.is_relocatable_executable
5634 || globals->pic_veneer)
2f475487 5635 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5636 else if (globals->use_blx)
5637 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5638 else
2f475487
AM		 5639 size = ARM2THUMB_STATIC_GLUE_SIZE;
5640
5641 s->size += size;
5642 globals->arm_glue_size += size;
252b5132 5643
a4fd1a8e 5644 return myh;
252b5132
RH		 5645}
5646
845b51d6
PB		 5647/* Allocate space for ARMv4 BX veneers. */
5648
5649static void
5650record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5651{
5652 asection * s;
5653 struct elf32_arm_link_hash_table *globals;
5654 char *tmp_name;
5655 struct elf_link_hash_entry *myh;
5656 struct bfd_link_hash_entry *bh;
5657 bfd_vma val;
5658
5659 /* BX PC does not need a veneer. */
5660 if (reg == 15)
5661 return;
5662
5663 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5664 BFD_ASSERT (globals != NULL);
5665 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5666
5667 /* Check if this veneer has already been allocated. */
5668 if (globals->bx_glue_offset[reg])
5669 return;
5670
5671 s = bfd_get_section_by_name
5672 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5673
5674 BFD_ASSERT (s != NULL);
5675
5676 /* Add symbol for veneer. */
21d799b5
NC		 5677 tmp_name = (char *)
5678 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5679
845b51d6 5680 BFD_ASSERT (tmp_name);
906e58ca 5681
845b51d6 5682 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5683
845b51d6
PB		 5684 myh = elf_link_hash_lookup
5685 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5686
845b51d6 5687 BFD_ASSERT (myh == NULL);
906e58ca 5688
845b51d6
PB		 5689 bh = NULL;
5690 val = globals->bx_glue_size;
5691 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5692 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5693 NULL, TRUE, FALSE, &bh);
5694
5695 myh = (struct elf_link_hash_entry *) bh;
5696 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5697 myh->forced_local = 1;
5698
5699 s->size += ARM_BX_VENEER_SIZE;
5700 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5701 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5702}
5703
5704
c7b8f16e
JB		 5705/* Add an entry to the code/data map for section SEC. */
5706
5707static void
5708elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5709{
5710 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5711 unsigned int newidx;
906e58ca 5712
c7b8f16e
JB		 5713 if (sec_data->map == NULL)
5714 {
21d799b5
NC		 5715 sec_data->map = (elf32_arm_section_map *)
5716 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5717 sec_data->mapcount = 0;
5718 sec_data->mapsize = 1;
5719 }
906e58ca 5720
c7b8f16e 5721 newidx = sec_data->mapcount++;
906e58ca 5722
c7b8f16e
JB		 5723 if (sec_data->mapcount > sec_data->mapsize)
5724 {
5725 sec_data->mapsize *= 2;
21d799b5
NC		 5726 sec_data->map = (elf32_arm_section_map *)
5727 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5728 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5729 }
5730
5731 if (sec_data->map)
5732 {
5733 sec_data->map[newidx].vma = vma;
5734 sec_data->map[newidx].type = type;
c7b8f16e 5735 }
c7b8f16e
JB		 5736}
5737
5738
5739/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5740 veneers are handled for now. */
5741
5742static bfd_vma
5743record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5744 elf32_vfp11_erratum_list *branch,
5745 bfd *branch_bfd,
5746 asection *branch_sec,
5747 unsigned int offset)
5748{
5749 asection *s;
5750 struct elf32_arm_link_hash_table *hash_table;
5751 char *tmp_name;
5752 struct elf_link_hash_entry *myh;
5753 struct bfd_link_hash_entry *bh;
5754 bfd_vma val;
5755 struct _arm_elf_section_data *sec_data;
c7b8f16e 5756 elf32_vfp11_erratum_list *newerr;
906e58ca 5757
c7b8f16e 5758 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5759 BFD_ASSERT (hash_table != NULL);
5760 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5761
c7b8f16e
JB		 5762 s = bfd_get_section_by_name
5763 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5764
c7b8f16e 5765 sec_data = elf32_arm_section_data (s);
906e58ca 5766
c7b8f16e 5767 BFD_ASSERT (s != NULL);
906e58ca 5768
21d799b5
NC		 5769 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5770 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5771
c7b8f16e 5772 BFD_ASSERT (tmp_name);
906e58ca 5773
c7b8f16e
JB		 5774 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5775 hash_table->num_vfp11_fixes);
906e58ca 5776
c7b8f16e
JB		 5777 myh = elf_link_hash_lookup
5778 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5779
c7b8f16e 5780 BFD_ASSERT (myh == NULL);
906e58ca 5781
c7b8f16e
JB		 5782 bh = NULL;
5783 val = hash_table->vfp11_erratum_glue_size;
5784 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5785 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5786 NULL, TRUE, FALSE, &bh);
5787
5788 myh = (struct elf_link_hash_entry *) bh;
5789 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5790 myh->forced_local = 1;
5791
5792 /* Link veneer back to calling location. */
c7e2358a 5793 sec_data->erratumcount += 1;
21d799b5
NC		 5794 newerr = (elf32_vfp11_erratum_list *)
5795 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5796
c7b8f16e
JB		 5797 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5798 newerr->vma = -1;
5799 newerr->u.v.branch = branch;
5800 newerr->u.v.id = hash_table->num_vfp11_fixes;
5801 branch->u.b.veneer = newerr;
5802
5803 newerr->next = sec_data->erratumlist;
5804 sec_data->erratumlist = newerr;
5805
5806 /* A symbol for the return from the veneer. */
5807 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5808 hash_table->num_vfp11_fixes);
5809
5810 myh = elf_link_hash_lookup
5811 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5812
c7b8f16e
JB		 5813 if (myh != NULL)
5814 abort ();
5815
5816 bh = NULL;
5817 val = offset + 4;
5818 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5819 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5820
c7b8f16e
JB		 5821 myh = (struct elf_link_hash_entry *) bh;
5822 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5823 myh->forced_local = 1;
5824
5825 free (tmp_name);
906e58ca 5826
c7b8f16e
JB		 5827 /* Generate a mapping symbol for the veneer section, and explicitly add an
5828 entry for that symbol to the code/data map for the section. */
5829 if (hash_table->vfp11_erratum_glue_size == 0)
5830 {
5831 bh = NULL;
5832 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5833 ever requires this erratum fix. */
5834 _bfd_generic_link_add_one_symbol (link_info,
5835 hash_table->bfd_of_glue_owner, "$a",
5836 BSF_LOCAL, s, 0, NULL,
5837 TRUE, FALSE, &bh);
5838
5839 myh = (struct elf_link_hash_entry *) bh;
5840 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5841 myh->forced_local = 1;
906e58ca 5842
c7b8f16e
JB		 5843 /* The elf32_arm_init_maps function only cares about symbols from input
5844 BFDs. We must make a note of this generated mapping symbol
5845 ourselves so that code byteswapping works properly in
5846 elf32_arm_write_section. */
5847 elf32_arm_section_map_add (s, 'a', 0);
5848 }
906e58ca 5849
c7b8f16e
JB		 5850 s->size += VFP11_ERRATUM_VENEER_SIZE;
5851 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5852 hash_table->num_vfp11_fixes++;
906e58ca 5853
c7b8f16e
JB		 5854 /* The offset of the veneer. */
5855 return val;
5856}
5857
8029a119 5858#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5859 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5860 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5861
5862/* Create a fake section for use by the ARM backend of the linker. */
5863
5864static bfd_boolean
5865arm_make_glue_section (bfd * abfd, const char * name)
5866{
5867 asection * sec;
5868
5869 sec = bfd_get_section_by_name (abfd, name);
5870 if (sec != NULL)
5871 /* Already made. */
5872 return TRUE;
5873
5874 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5875
5876 if (sec == NULL
5877 || !bfd_set_section_alignment (abfd, sec, 2))
5878 return FALSE;
5879
5880 /* Set the gc mark to prevent the section from being removed by garbage
5881 collection, despite the fact that no relocs refer to this section. */
5882 sec->gc_mark = 1;
5883
5884 return TRUE;
5885}
5886
8afb0e02
NC		 5887/* Add the glue sections to ABFD. This function is called from the
5888 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5889
b34976b6 5890bfd_boolean
57e8b36a
NC		 5891bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5892 struct bfd_link_info *info)
252b5132 5893{
8afb0e02
NC		 5894 /* If we are only performing a partial
5895 link do not bother adding the glue. */
1049f94e 5896 if (info->relocatable)
b34976b6 5897 return TRUE;
252b5132 5898
8029a119
NC		 5899 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5900 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5901 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5902 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5903}
5904
5905/* Select a BFD to be used to hold the sections used by the glue code.
5906 This function is called from the linker scripts in ld/emultempl/
8029a119 5907 {armelf/pe}.em. */
8afb0e02 5908
b34976b6 5909bfd_boolean
57e8b36a 5910bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5911{
5912 struct elf32_arm_link_hash_table *globals;
5913
5914 /* If we are only performing a partial link
5915 do not bother getting a bfd to hold the glue. */
1049f94e 5916 if (info->relocatable)
b34976b6 5917 return TRUE;
8afb0e02 5918
b7693d02
DJ		 5919 /* Make sure we don't attach the glue sections to a dynamic object. */
5920 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5921
8afb0e02 5922 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5923 BFD_ASSERT (globals != NULL);
5924
5925 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5926 return TRUE;
8afb0e02 5927
252b5132
RH		 5928 /* Save the bfd for later use. */
5929 globals->bfd_of_glue_owner = abfd;
cedb70c5 5930
b34976b6 5931 return TRUE;
252b5132
RH		 5932}
5933
906e58ca
NC		 5934static void
5935check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5936{
2de70689
MGD		 5937 int cpu_arch;
5938
5939 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5940 Tag_CPU_arch);
5941
5942 if (globals->fix_arm1176)
5943 {
5944 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
5945 globals->use_blx = 1;
5946 }
5947 else
5948 {
5949 if (cpu_arch > TAG_CPU_ARCH_V4T)
5950 globals->use_blx = 1;
5951 }
39b41c9c
PB		 5952}
5953
b34976b6 5954bfd_boolean
57e8b36a 5955bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5956 struct bfd_link_info *link_info)
252b5132
RH		 5957{
5958 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5959 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5960 Elf_Internal_Rela *irel, *irelend;
5961 bfd_byte *contents = NULL;
252b5132
RH		 5962
5963 asection *sec;
5964 struct elf32_arm_link_hash_table *globals;
5965
5966 /* If we are only performing a partial link do not bother
5967 to construct any glue. */
1049f94e 5968 if (link_info->relocatable)
b34976b6 5969 return TRUE;
252b5132 5970
39ce1a6a
NC		 5971 /* Here we have a bfd that is to be included on the link. We have a
5972 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5973 globals = elf32_arm_hash_table (link_info);
252b5132 5974 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5975
5976 check_use_blx (globals);
252b5132 5977
d504ffc8 5978 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5979 {
d003868e
AM		 5980 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5981 abfd);
e489d0ae
PB		 5982 return FALSE;
5983 }
f21f3fe0 5984
39ce1a6a
NC		 5985 /* PR 5398: If we have not decided to include any loadable sections in
5986 the output then we will not have a glue owner bfd. This is OK, it
5987 just means that there is nothing else for us to do here. */
5988 if (globals->bfd_of_glue_owner == NULL)
5989 return TRUE;
5990
252b5132
RH		 5991 /* Rummage around all the relocs and map the glue vectors. */
5992 sec = abfd->sections;
5993
5994 if (sec == NULL)
b34976b6 5995 return TRUE;
252b5132
RH		 5996
5997 for (; sec != NULL; sec = sec->next)
5998 {
5999 if (sec->reloc_count == 0)
6000 continue;
6001
2f475487
AM		 6002 if ((sec->flags & SEC_EXCLUDE) != 0)
6003 continue;
6004
0ffa91dd 6005 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6006
9b485d32 6007 /* Load the relocs. */
6cdc0ccc 6008 internal_relocs
906e58ca 6009 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6010
6cdc0ccc
AM		 6011 if (internal_relocs == NULL)
6012 goto error_return;
252b5132 6013
6cdc0ccc
AM		 6014 irelend = internal_relocs + sec->reloc_count;
6015 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6016 {
6017 long r_type;
6018 unsigned long r_index;
252b5132
RH		 6019
6020 struct elf_link_hash_entry *h;
6021
6022 r_type = ELF32_R_TYPE (irel->r_info);
6023 r_index = ELF32_R_SYM (irel->r_info);
6024
9b485d32 6025 /* These are the only relocation types we care about. */
ba96a88f 6026 if ( r_type != R_ARM_PC24
845b51d6 6027 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6028 continue;
6029
6030 /* Get the section contents if we haven't done so already. */
6031 if (contents == NULL)
6032 {
6033 /* Get cached copy if it exists. */
6034 if (elf_section_data (sec)->this_hdr.contents != NULL)
6035 contents = elf_section_data (sec)->this_hdr.contents;
6036 else
6037 {
6038 /* Go get them off disk. */
57e8b36a 6039 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6040 goto error_return;
6041 }
6042 }
6043
845b51d6
PB		 6044 if (r_type == R_ARM_V4BX)
6045 {
6046 int reg;
6047
6048 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6049 record_arm_bx_glue (link_info, reg);
6050 continue;
6051 }
6052
a7c10850 6053 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6054 h = NULL;
6055
9b485d32 6056 /* We don't care about local symbols. */
252b5132
RH		 6057 if (r_index < symtab_hdr->sh_info)
6058 continue;
6059
9b485d32 6060 /* This is an external symbol. */
252b5132
RH		 6061 r_index -= symtab_hdr->sh_info;
6062 h = (struct elf_link_hash_entry *)
6063 elf_sym_hashes (abfd)[r_index];
6064
6065 /* If the relocation is against a static symbol it must be within
6066 the current section and so cannot be a cross ARM/Thumb relocation. */
6067 if (h == NULL)
6068 continue;
6069
d504ffc8
DJ		 6070 /* If the call will go through a PLT entry then we do not need
6071 glue. */
362d30a1 6072 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6073 continue;
6074
252b5132
RH		 6075 switch (r_type)
6076 {
6077 case R_ARM_PC24:
6078 /* This one is a call from arm code. We need to look up
2f0ca46a 6079 the target of the call. If it is a thumb target, we
252b5132 6080 insert glue. */
35fc36a8 6081 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6082 record_arm_to_thumb_glue (link_info, h);
6083 break;
6084
252b5132 6085 default:
c6596c5e 6086 abort ();
252b5132
RH		 6087 }
6088 }
6cdc0ccc
AM		 6089
6090 if (contents != NULL
6091 && elf_section_data (sec)->this_hdr.contents != contents)
6092 free (contents);
6093 contents = NULL;
6094
6095 if (internal_relocs != NULL
6096 && elf_section_data (sec)->relocs != internal_relocs)
6097 free (internal_relocs);
6098 internal_relocs = NULL;
252b5132
RH		 6099 }
6100
b34976b6 6101 return TRUE;
9a5aca8c 6102
252b5132 6103error_return:
6cdc0ccc
AM		 6104 if (contents != NULL
6105 && elf_section_data (sec)->this_hdr.contents != contents)
6106 free (contents);
6107 if (internal_relocs != NULL
6108 && elf_section_data (sec)->relocs != internal_relocs)
6109 free (internal_relocs);
9a5aca8c 6110
b34976b6 6111 return FALSE;
252b5132 6112}
7e392df6 6113#endif
252b5132 6114
eb043451 6115
c7b8f16e
JB		 6116/* Initialise maps of ARM/Thumb/data for input BFDs. */
6117
6118void
6119bfd_elf32_arm_init_maps (bfd *abfd)
6120{
6121 Elf_Internal_Sym *isymbuf;
6122 Elf_Internal_Shdr *hdr;
6123 unsigned int i, localsyms;
6124
af1f4419
NC		 6125 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6126 if (! is_arm_elf (abfd))
6127 return;
6128
c7b8f16e
JB		 6129 if ((abfd->flags & DYNAMIC) != 0)
6130 return;
6131
0ffa91dd 6132 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6133 localsyms = hdr->sh_info;
6134
6135 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6136 should contain the number of local symbols, which should come before any
6137 global symbols. Mapping symbols are always local. */
6138 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6139 NULL);
6140
6141 /* No internal symbols read? Skip this BFD. */
6142 if (isymbuf == NULL)
6143 return;
6144
6145 for (i = 0; i < localsyms; i++)
6146 {
6147 Elf_Internal_Sym *isym = &isymbuf[i];
6148 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6149 const char *name;
906e58ca 6150
c7b8f16e
JB		 6151 if (sec != NULL
6152 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6153 {
6154 name = bfd_elf_string_from_elf_section (abfd,
6155 hdr->sh_link, isym->st_name);
906e58ca 6156
c7b8f16e
JB		 6157 if (bfd_is_arm_special_symbol_name (name,
6158 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6159 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6160 }
6161 }
6162}
6163
6164
48229727
JB		 6165/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6166 say what they wanted. */
6167
6168void
6169bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6170{
6171 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6172 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6173
4dfe6ac6
NC		 6174 if (globals == NULL)
6175 return;
6176
48229727
JB		 6177 if (globals->fix_cortex_a8 == -1)
6178 {
6179 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6180 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6181 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6182 || out_attr[Tag_CPU_arch_profile].i == 0))
6183 globals->fix_cortex_a8 = 1;
6184 else
6185 globals->fix_cortex_a8 = 0;
6186 }
6187}
6188
6189
c7b8f16e
JB		 6190void
6191bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6192{
6193 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6194 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6195
4dfe6ac6
NC		 6196 if (globals == NULL)
6197 return;
c7b8f16e
JB		 6198 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6199 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6200 {
6201 switch (globals->vfp11_fix)
6202 {
6203 case BFD_ARM_VFP11_FIX_DEFAULT:
6204 case BFD_ARM_VFP11_FIX_NONE:
6205 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6206 break;
906e58ca 6207
c7b8f16e
JB		 6208 default:
6209 /* Give a warning, but do as the user requests anyway. */
6210 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6211 "workaround is not necessary for target architecture"), obfd);
6212 }
6213 }
6214 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6215 /* For earlier architectures, we might need the workaround, but do not
6216 enable it by default. If users is running with broken hardware, they
6217 must enable the erratum fix explicitly. */
6218 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6219}
6220
6221
906e58ca
NC		 6222enum bfd_arm_vfp11_pipe
6223{
c7b8f16e
JB		 6224 VFP11_FMAC,
6225 VFP11_LS,
6226 VFP11_DS,
6227 VFP11_BAD
6228};
6229
6230/* Return a VFP register number. This is encoded as RX:X for single-precision
6231 registers, or X:RX for double-precision registers, where RX is the group of
6232 four bits in the instruction encoding and X is the single extension bit.
6233 RX and X fields are specified using their lowest (starting) bit. The return
6234 value is:
6235
6236 0...31: single-precision registers s0...s31
6237 32...63: double-precision registers d0...d31.
906e58ca 6238
c7b8f16e
JB		 6239 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6240 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6241
c7b8f16e
JB		 6242static unsigned int
6243bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6244 unsigned int x)
6245{
6246 if (is_double)
6247 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6248 else
6249 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6250}
6251
6252/* Set bits in *WMASK according to a register number REG as encoded by
6253 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6254
6255static void
6256bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6257{
6258 if (reg < 32)
6259 *wmask |= 1 << reg;
6260 else if (reg < 48)
6261 *wmask |= 3 << ((reg - 32) * 2);
6262}
6263
6264/* Return TRUE if WMASK overwrites anything in REGS. */
6265
6266static bfd_boolean
6267bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6268{
6269 int i;
906e58ca 6270
c7b8f16e
JB		 6271 for (i = 0; i < numregs; i++)
6272 {
6273 unsigned int reg = regs[i];
6274
6275 if (reg < 32 && (wmask & (1 << reg)) != 0)
6276 return TRUE;
906e58ca 6277
c7b8f16e
JB		 6278 reg -= 32;
6279
6280 if (reg >= 16)
6281 continue;
906e58ca 6282
c7b8f16e
JB		 6283 if ((wmask & (3 << (reg * 2))) != 0)
6284 return TRUE;
6285 }
906e58ca 6286
c7b8f16e
JB		 6287 return FALSE;
6288}
6289
6290/* In this function, we're interested in two things: finding input registers
6291 for VFP data-processing instructions, and finding the set of registers which
6292 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6293 hold the written set, so FLDM etc. are easy to deal with (we're only
6294 interested in 32 SP registers or 16 dp registers, due to the VFP version
6295 implemented by the chip in question). DP registers are marked by setting
6296 both SP registers in the write mask). */
6297
6298static enum bfd_arm_vfp11_pipe
6299bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6300 int *numregs)
6301{
91d6fa6a 6302 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6303 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6304
6305 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6306 {
6307 unsigned int pqrs;
6308 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6309 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6310
6311 pqrs = ((insn & 0x00800000) >> 20)
6312 | ((insn & 0x00300000) >> 19)
6313 | ((insn & 0x00000040) >> 6);
6314
6315 switch (pqrs)
6316 {
6317 case 0: /* fmac[sd]. */
6318 case 1: /* fnmac[sd]. */
6319 case 2: /* fmsc[sd]. */
6320 case 3: /* fnmsc[sd]. */
91d6fa6a 6321 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6322 bfd_arm_vfp11_write_mask (destmask, fd);
6323 regs[0] = fd;
6324 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6325 regs[2] = fm;
6326 *numregs = 3;
6327 break;
6328
6329 case 4: /* fmul[sd]. */
6330 case 5: /* fnmul[sd]. */
6331 case 6: /* fadd[sd]. */
6332 case 7: /* fsub[sd]. */
91d6fa6a 6333 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6334 goto vfp_binop;
6335
6336 case 8: /* fdiv[sd]. */
91d6fa6a 6337 vpipe = VFP11_DS;
c7b8f16e
JB		 6338 vfp_binop:
6339 bfd_arm_vfp11_write_mask (destmask, fd);
6340 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6341 regs[1] = fm;
6342 *numregs = 2;
6343 break;
6344
6345 case 15: /* extended opcode. */
6346 {
6347 unsigned int extn = ((insn >> 15) & 0x1e)
6348 | ((insn >> 7) & 1);
6349
6350 switch (extn)
6351 {
6352 case 0: /* fcpy[sd]. */
6353 case 1: /* fabs[sd]. */
6354 case 2: /* fneg[sd]. */
6355 case 8: /* fcmp[sd]. */
6356 case 9: /* fcmpe[sd]. */
6357 case 10: /* fcmpz[sd]. */
6358 case 11: /* fcmpez[sd]. */
6359 case 16: /* fuito[sd]. */
6360 case 17: /* fsito[sd]. */
6361 case 24: /* ftoui[sd]. */
6362 case 25: /* ftouiz[sd]. */
6363 case 26: /* ftosi[sd]. */
6364 case 27: /* ftosiz[sd]. */
6365 /* These instructions will not bounce due to underflow. */
6366 *numregs = 0;
91d6fa6a 6367 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6368 break;
6369
6370 case 3: /* fsqrt[sd]. */
6371 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6372 registers to cause the erratum in previous instructions. */
6373 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 6374 vpipe = VFP11_DS;
c7b8f16e
JB		 6375 break;
6376
6377 case 15: /* fcvt{ds,sd}. */
6378 {
6379 int rnum = 0;
6380
6381 bfd_arm_vfp11_write_mask (destmask, fd);
6382
6383 /* Only FCVTSD can underflow. */
6384 if ((insn & 0x100) != 0)
6385 regs[rnum++] = fm;
6386
6387 *numregs = rnum;
6388
91d6fa6a 6389 vpipe = VFP11_FMAC;
c7b8f16e
JB		 6390 }
6391 break;
6392
6393 default:
6394 return VFP11_BAD;
6395 }
6396 }
6397 break;
6398
6399 default:
6400 return VFP11_BAD;
6401 }
6402 }
6403 /* Two-register transfer. */
6404 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6405 {
6406 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6407
c7b8f16e
JB		 6408 if ((insn & 0x100000) == 0)
6409 {
6410 if (is_double)
6411 bfd_arm_vfp11_write_mask (destmask, fm);
6412 else
6413 {
6414 bfd_arm_vfp11_write_mask (destmask, fm);
6415 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6416 }
6417 }
6418
91d6fa6a 6419 vpipe = VFP11_LS;
c7b8f16e
JB		 6420 }
6421 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6422 {
6423 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6424 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6425
c7b8f16e
JB		 6426 switch (puw)
6427 {
6428 case 0: /* Two-reg transfer. We should catch these above. */
6429 abort ();
906e58ca 6430
c7b8f16e
JB		 6431 case 2: /* fldm[sdx]. */
6432 case 3:
6433 case 5:
6434 {
6435 unsigned int i, offset = insn & 0xff;
6436
6437 if (is_double)
6438 offset >>= 1;
6439
6440 for (i = fd; i < fd + offset; i++)
6441 bfd_arm_vfp11_write_mask (destmask, i);
6442 }
6443 break;
906e58ca 6444
c7b8f16e
JB		 6445 case 4: /* fld[sd]. */
6446 case 6:
6447 bfd_arm_vfp11_write_mask (destmask, fd);
6448 break;
906e58ca 6449
c7b8f16e
JB		 6450 default:
6451 return VFP11_BAD;
6452 }
6453
91d6fa6a 6454 vpipe = VFP11_LS;
c7b8f16e
JB		 6455 }
6456 /* Single-register transfer. Note L==0. */
6457 else if ((insn & 0x0f100e10) == 0x0e000a10)
6458 {
6459 unsigned int opcode = (insn >> 21) & 7;
6460 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6461
6462 switch (opcode)
6463 {
6464 case 0: /* fmsr/fmdlr. */
6465 case 1: /* fmdhr. */
6466 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6467 destination register. I don't know if this is exactly right,
6468 but it is the conservative choice. */
6469 bfd_arm_vfp11_write_mask (destmask, fn);
6470 break;
6471
6472 case 7: /* fmxr. */
6473 break;
6474 }
6475
91d6fa6a 6476 vpipe = VFP11_LS;
c7b8f16e
JB		 6477 }
6478
91d6fa6a 6479 return vpipe;
c7b8f16e
JB		 6480}
6481
6482
6483static int elf32_arm_compare_mapping (const void * a, const void * b);
6484
6485
6486/* Look for potentially-troublesome code sequences which might trigger the
6487 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6488 (available from ARM) for details of the erratum. A short version is
6489 described in ld.texinfo. */
6490
6491bfd_boolean
6492bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6493{
6494 asection *sec;
6495 bfd_byte *contents = NULL;
6496 int state = 0;
6497 int regs[3], numregs = 0;
6498 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6499 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6500
4dfe6ac6
NC		 6501 if (globals == NULL)
6502 return FALSE;
6503
c7b8f16e
JB		 6504 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6505 The states transition as follows:
906e58ca 6506
c7b8f16e
JB		 6507 0 -> 1 (vector) or 0 -> 2 (scalar)
6508 A VFP FMAC-pipeline instruction has been seen. Fill
6509 regs[0]..regs[numregs-1] with its input operands. Remember this
6510 instruction in 'first_fmac'.
6511
6512 1 -> 2
6513 Any instruction, except for a VFP instruction which overwrites
6514 regs[*].
906e58ca 6515
c7b8f16e
JB		 6516 1 -> 3 [ -> 0 ] or
6517 2 -> 3 [ -> 0 ]
6518 A VFP instruction has been seen which overwrites any of regs[*].
6519 We must make a veneer! Reset state to 0 before examining next
6520 instruction.
906e58ca 6521
c7b8f16e
JB		 6522 2 -> 0
6523 If we fail to match anything in state 2, reset to state 0 and reset
6524 the instruction pointer to the instruction after 'first_fmac'.
6525
6526 If the VFP11 vector mode is in use, there must be at least two unrelated
6527 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6528 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6529
6530 /* If we are only performing a partial link do not bother
6531 to construct any glue. */
6532 if (link_info->relocatable)
6533 return TRUE;
6534
0ffa91dd
NC		 6535 /* Skip if this bfd does not correspond to an ELF image. */
6536 if (! is_arm_elf (abfd))
6537 return TRUE;
906e58ca 6538
c7b8f16e
JB		 6539 /* We should have chosen a fix type by the time we get here. */
6540 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6541
6542 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6543 return TRUE;
2e6030b9 6544
33a7ffc2
JM		 6545 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6546 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6547 return TRUE;
6548
c7b8f16e
JB		 6549 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6550 {
6551 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6552 struct _arm_elf_section_data *sec_data;
6553
6554 /* If we don't have executable progbits, we're not interested in this
6555 section. Also skip if section is to be excluded. */
6556 if (elf_section_type (sec) != SHT_PROGBITS
6557 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6558 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6559 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6560 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6561 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6562 continue;
6563
6564 sec_data = elf32_arm_section_data (sec);
906e58ca 6565
c7b8f16e
JB		 6566 if (sec_data->mapcount == 0)
6567 continue;
906e58ca 6568
c7b8f16e
JB		 6569 if (elf_section_data (sec)->this_hdr.contents != NULL)
6570 contents = elf_section_data (sec)->this_hdr.contents;
6571 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6572 goto error_return;
6573
6574 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6575 elf32_arm_compare_mapping);
6576
6577 for (span = 0; span < sec_data->mapcount; span++)
6578 {
6579 unsigned int span_start = sec_data->map[span].vma;
6580 unsigned int span_end = (span == sec_data->mapcount - 1)
6581 ? sec->size : sec_data->map[span + 1].vma;
6582 char span_type = sec_data->map[span].type;
906e58ca 6583
c7b8f16e
JB		 6584 /* FIXME: Only ARM mode is supported at present. We may need to
6585 support Thumb-2 mode also at some point. */
6586 if (span_type != 'a')
6587 continue;
6588
6589 for (i = span_start; i < span_end;)
6590 {
6591 unsigned int next_i = i + 4;
6592 unsigned int insn = bfd_big_endian (abfd)
6593 ? (contents[i] << 24)
6594 | (contents[i + 1] << 16)
6595 | (contents[i + 2] << 8)
6596 | contents[i + 3]
6597 : (contents[i + 3] << 24)
6598 | (contents[i + 2] << 16)
6599 | (contents[i + 1] << 8)
6600 | contents[i];
6601 unsigned int writemask = 0;
91d6fa6a 6602 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6603
6604 switch (state)
6605 {
6606 case 0:
91d6fa6a 6607 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6608 &numregs);
6609 /* I'm assuming the VFP11 erratum can trigger with denorm
6610 operands on either the FMAC or the DS pipeline. This might
6611 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6612 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6613 {
6614 state = use_vector ? 1 : 2;
6615 first_fmac = i;
6616 veneer_of_insn = insn;
6617 }
6618 break;
6619
6620 case 1:
6621 {
6622 int other_regs[3], other_numregs;
91d6fa6a 6623 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6624 other_regs,
6625 &other_numregs);
91d6fa6a 6626 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6627 && bfd_arm_vfp11_antidependency (writemask, regs,
6628 numregs))
6629 state = 3;
6630 else
6631 state = 2;
6632 }
6633 break;
6634
6635 case 2:
6636 {
6637 int other_regs[3], other_numregs;
91d6fa6a 6638 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6639 other_regs,
6640 &other_numregs);
91d6fa6a 6641 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6642 && bfd_arm_vfp11_antidependency (writemask, regs,
6643 numregs))
6644 state = 3;
6645 else
6646 {
6647 state = 0;
6648 next_i = first_fmac + 4;
6649 }
6650 }
6651 break;
6652
6653 case 3:
6654 abort (); /* Should be unreachable. */
6655 }
6656
6657 if (state == 3)
6658 {
21d799b5
NC		 6659 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6660 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e 6661
c7e2358a 6662 elf32_arm_section_data (sec)->erratumcount += 1;
c7b8f16e
JB		 6663
6664 newerr->u.b.vfp_insn = veneer_of_insn;
6665
6666 switch (span_type)
6667 {
6668 case 'a':
6669 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6670 break;
906e58ca 6671
c7b8f16e
JB		 6672 default:
6673 abort ();
6674 }
6675
6676 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6677 first_fmac);
6678
6679 newerr->vma = -1;
6680
6681 newerr->next = sec_data->erratumlist;
6682 sec_data->erratumlist = newerr;
6683
6684 state = 0;
6685 }
6686
6687 i = next_i;
6688 }
6689 }
906e58ca 6690
c7b8f16e
JB		 6691 if (contents != NULL
6692 && elf_section_data (sec)->this_hdr.contents != contents)
6693 free (contents);
6694 contents = NULL;
6695 }
6696
6697 return TRUE;
6698
6699error_return:
6700 if (contents != NULL
6701 && elf_section_data (sec)->this_hdr.contents != contents)
6702 free (contents);
906e58ca 6703
c7b8f16e
JB		 6704 return FALSE;
6705}
6706
6707/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6708 after sections have been laid out, using specially-named symbols. */
6709
6710void
6711bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6712 struct bfd_link_info *link_info)
6713{
6714 asection *sec;
6715 struct elf32_arm_link_hash_table *globals;
6716 char *tmp_name;
906e58ca 6717
c7b8f16e
JB		 6718 if (link_info->relocatable)
6719 return;
2e6030b9
MS		 6720
6721 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6722 if (! is_arm_elf (abfd))
2e6030b9
MS		 6723 return;
6724
c7b8f16e 6725 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6726 if (globals == NULL)
6727 return;
906e58ca 6728
21d799b5
NC		 6729 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6730 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6731
6732 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6733 {
6734 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6735 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6736
c7b8f16e
JB		 6737 for (; errnode != NULL; errnode = errnode->next)
6738 {
6739 struct elf_link_hash_entry *myh;
6740 bfd_vma vma;
6741
6742 switch (errnode->type)
6743 {
6744 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6745 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6746 /* Find veneer symbol. */
6747 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6748 errnode->u.b.veneer->u.v.id);
6749
6750 myh = elf_link_hash_lookup
6751 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6752
6753 if (myh == NULL)
6754 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6755 "`%s'"), abfd, tmp_name);
6756
6757 vma = myh->root.u.def.section->output_section->vma
6758 + myh->root.u.def.section->output_offset
6759 + myh->root.u.def.value;
6760
6761 errnode->u.b.veneer->vma = vma;
6762 break;
6763
6764 case VFP11_ERRATUM_ARM_VENEER:
6765 case VFP11_ERRATUM_THUMB_VENEER:
6766 /* Find return location. */
6767 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6768 errnode->u.v.id);
6769
6770 myh = elf_link_hash_lookup
6771 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6772
6773 if (myh == NULL)
6774 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6775 "`%s'"), abfd, tmp_name);
6776
6777 vma = myh->root.u.def.section->output_section->vma
6778 + myh->root.u.def.section->output_offset
6779 + myh->root.u.def.value;
6780
6781 errnode->u.v.branch->vma = vma;
6782 break;
906e58ca 6783
c7b8f16e
JB		 6784 default:
6785 abort ();
6786 }
6787 }
6788 }
906e58ca 6789
c7b8f16e
JB		 6790 free (tmp_name);
6791}
6792
6793
eb043451
PB		 6794/* Set target relocation values needed during linking. */
6795
6796void
bf21ed78
MS		 6797bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6798 struct bfd_link_info *link_info,
eb043451 6799 int target1_is_rel,
319850b4 6800 char * target2_type,
33bfe774 6801 int fix_v4bx,
c7b8f16e 6802 int use_blx,
bf21ed78 6803 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6804 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6805 int pic_veneer, int fix_cortex_a8,
6806 int fix_arm1176)
eb043451
PB		 6807{
6808 struct elf32_arm_link_hash_table *globals;
6809
6810 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6811 if (globals == NULL)
6812 return;
eb043451
PB		 6813
6814 globals->target1_is_rel = target1_is_rel;
6815 if (strcmp (target2_type, "rel") == 0)
6816 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6817 else if (strcmp (target2_type, "abs") == 0)
6818 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6819 else if (strcmp (target2_type, "got-rel") == 0)
6820 globals->target2_reloc = R_ARM_GOT_PREL;
6821 else
6822 {
6823 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6824 target2_type);
6825 }
319850b4 6826 globals->fix_v4bx = fix_v4bx;
33bfe774 6827 globals->use_blx |= use_blx;
c7b8f16e 6828 globals->vfp11_fix = vfp11_fix;
27e55c4d 6829 globals->pic_veneer = pic_veneer;
48229727 6830 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6831 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6832
0ffa91dd
NC		 6833 BFD_ASSERT (is_arm_elf (output_bfd));
6834 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6835 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6836}
eb043451 6837
12a0a0fd 6838/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6839
12a0a0fd
PB		 6840static void
6841insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6842{
6843 bfd_vma upper;
6844 bfd_vma lower;
6845 int reloc_sign;
6846
6847 BFD_ASSERT ((offset & 1) == 0);
6848
6849 upper = bfd_get_16 (abfd, insn);
6850 lower = bfd_get_16 (abfd, insn + 2);
6851 reloc_sign = (offset < 0) ? 1 : 0;
6852 upper = (upper & ~(bfd_vma) 0x7ff)
6853 | ((offset >> 12) & 0x3ff)
6854 | (reloc_sign << 10);
906e58ca 6855 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6856 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6857 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6858 | ((offset >> 1) & 0x7ff);
6859 bfd_put_16 (abfd, upper, insn);
6860 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6861}
6862
9b485d32
NC		 6863/* Thumb code calling an ARM function. */
6864
252b5132 6865static int
57e8b36a
NC		 6866elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6867 const char * name,
6868 bfd * input_bfd,
6869 bfd * output_bfd,
6870 asection * input_section,
6871 bfd_byte * hit_data,
6872 asection * sym_sec,
6873 bfd_vma offset,
6874 bfd_signed_vma addend,
f2a9dd69
DJ		 6875 bfd_vma val,
6876 char **error_message)
252b5132 6877{
bcbdc74c 6878 asection * s = 0;
dc810e39 6879 bfd_vma my_offset;
252b5132 6880 long int ret_offset;
bcbdc74c
NC		 6881 struct elf_link_hash_entry * myh;
6882 struct elf32_arm_link_hash_table * globals;
252b5132 6883
f2a9dd69 6884 myh = find_thumb_glue (info, name, error_message);
252b5132 6885 if (myh == NULL)
b34976b6 6886 return FALSE;
252b5132
RH		 6887
6888 globals = elf32_arm_hash_table (info);
252b5132
RH		 6889 BFD_ASSERT (globals != NULL);
6890 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6891
6892 my_offset = myh->root.u.def.value;
6893
6894 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6895 THUMB2ARM_GLUE_SECTION_NAME);
6896
6897 BFD_ASSERT (s != NULL);
6898 BFD_ASSERT (s->contents != NULL);
6899 BFD_ASSERT (s->output_section != NULL);
6900
6901 if ((my_offset & 0x01) == 0x01)
6902 {
6903 if (sym_sec != NULL
6904 && sym_sec->owner != NULL
6905 && !INTERWORK_FLAG (sym_sec->owner))
6906 {
8f615d07 6907 (*_bfd_error_handler)
d003868e
AM		 6908 (_("%B(%s): warning: interworking not enabled.\n"
6909 " first occurrence: %B: thumb call to arm"),
6910 sym_sec->owner, input_bfd, name);
252b5132 6911
b34976b6 6912 return FALSE;
252b5132
RH		 6913 }
6914
6915 --my_offset;
6916 myh->root.u.def.value = my_offset;
6917
52ab56c2
PB		 6918 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6919 s->contents + my_offset);
252b5132 6920
52ab56c2
PB		 6921 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6922 s->contents + my_offset + 2);
252b5132
RH		 6923
6924 ret_offset =
9b485d32
NC		 6925 /* Address of destination of the stub. */
6926 ((bfd_signed_vma) val)
252b5132 6927 - ((bfd_signed_vma)
57e8b36a
NC		 6928 /* Offset from the start of the current section
6929 to the start of the stubs. */
9b485d32
NC		 6930 (s->output_offset
6931 /* Offset of the start of this stub from the start of the stubs. */
6932 + my_offset
6933 /* Address of the start of the current section. */
6934 + s->output_section->vma)
6935 /* The branch instruction is 4 bytes into the stub. */
6936 + 4
6937 /* ARM branches work from the pc of the instruction + 8. */
6938 + 8);
252b5132 6939
52ab56c2
PB		 6940 put_arm_insn (globals, output_bfd,
6941 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6942 s->contents + my_offset + 4);
252b5132
RH		 6943 }
6944
6945 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6946
427bfd90
NC		 6947 /* Now go back and fix up the original BL insn to point to here. */
6948 ret_offset =
6949 /* Address of where the stub is located. */
6950 (s->output_section->vma + s->output_offset + my_offset)
6951 /* Address of where the BL is located. */
57e8b36a
NC		 6952 - (input_section->output_section->vma + input_section->output_offset
6953 + offset)
427bfd90
NC		 6954 /* Addend in the relocation. */
6955 - addend
6956 /* Biassing for PC-relative addressing. */
6957 - 8;
252b5132 6958
12a0a0fd 6959 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6960
b34976b6 6961 return TRUE;
252b5132
RH		 6962}
6963
a4fd1a8e 6964/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6965
a4fd1a8e
PB		 6966static struct elf_link_hash_entry *
6967elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6968 const char * name,
6969 bfd * input_bfd,
6970 bfd * output_bfd,
6971 asection * sym_sec,
6972 bfd_vma val,
8029a119
NC		 6973 asection * s,
6974 char ** error_message)
252b5132 6975{
dc810e39 6976 bfd_vma my_offset;
252b5132 6977 long int ret_offset;
bcbdc74c
NC		 6978 struct elf_link_hash_entry * myh;
6979 struct elf32_arm_link_hash_table * globals;
252b5132 6980
f2a9dd69 6981 myh = find_arm_glue (info, name, error_message);
252b5132 6982 if (myh == NULL)
a4fd1a8e 6983 return NULL;
252b5132
RH		 6984
6985 globals = elf32_arm_hash_table (info);
252b5132
RH		 6986 BFD_ASSERT (globals != NULL);
6987 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6988
6989 my_offset = myh->root.u.def.value;
252b5132
RH		 6990
6991 if ((my_offset & 0x01) == 0x01)
6992 {
6993 if (sym_sec != NULL
6994 && sym_sec->owner != NULL
6995 && !INTERWORK_FLAG (sym_sec->owner))
6996 {
8f615d07 6997 (*_bfd_error_handler)
d003868e
AM		 6998 (_("%B(%s): warning: interworking not enabled.\n"
6999 " first occurrence: %B: arm call to thumb"),
7000 sym_sec->owner, input_bfd, name);
252b5132 7001 }
9b485d32 7002
252b5132
RH		 7003 --my_offset;
7004 myh->root.u.def.value = my_offset;
7005
27e55c4d
PB		 7006 if (info->shared || globals->root.is_relocatable_executable
7007 || globals->pic_veneer)
8f6277f5
PB		 7008 {
7009 /* For relocatable objects we can't use absolute addresses,
7010 so construct the address from a relative offset. */
7011 /* TODO: If the offset is small it's probably worth
7012 constructing the address with adds. */
52ab56c2
PB		 7013 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7014 s->contents + my_offset);
7015 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7016 s->contents + my_offset + 4);
7017 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7018 s->contents + my_offset + 8);
8f6277f5
PB		 7019 /* Adjust the offset by 4 for the position of the add,
7020 and 8 for the pipeline offset. */
7021 ret_offset = (val - (s->output_offset
7022 + s->output_section->vma
7023 + my_offset + 12))
7024 | 1;
7025 bfd_put_32 (output_bfd, ret_offset,
7026 s->contents + my_offset + 12);
7027 }
26079076
PB		 7028 else if (globals->use_blx)
7029 {
7030 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7031 s->contents + my_offset);
7032
7033 /* It's a thumb address. Add the low order bit. */
7034 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7035 s->contents + my_offset + 4);
7036 }
8f6277f5
PB		 7037 else
7038 {
52ab56c2
PB		 7039 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7040 s->contents + my_offset);
252b5132 7041
52ab56c2
PB		 7042 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7043 s->contents + my_offset + 4);
252b5132 7044
8f6277f5
PB		 7045 /* It's a thumb address. Add the low order bit. */
7046 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7047 s->contents + my_offset + 8);
8029a119
NC		 7048
7049 my_offset += 12;
8f6277f5 7050 }
252b5132
RH		 7051 }
7052
7053 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7054
a4fd1a8e
PB		 7055 return myh;
7056}
7057
7058/* Arm code calling a Thumb function. */
7059
7060static int
7061elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7062 const char * name,
7063 bfd * input_bfd,
7064 bfd * output_bfd,
7065 asection * input_section,
7066 bfd_byte * hit_data,
7067 asection * sym_sec,
7068 bfd_vma offset,
7069 bfd_signed_vma addend,
f2a9dd69
DJ		 7070 bfd_vma val,
7071 char **error_message)
a4fd1a8e
PB		 7072{
7073 unsigned long int tmp;
7074 bfd_vma my_offset;
7075 asection * s;
7076 long int ret_offset;
7077 struct elf_link_hash_entry * myh;
7078 struct elf32_arm_link_hash_table * globals;
7079
7080 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7081 BFD_ASSERT (globals != NULL);
7082 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7083
7084 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7085 ARM2THUMB_GLUE_SECTION_NAME);
7086 BFD_ASSERT (s != NULL);
7087 BFD_ASSERT (s->contents != NULL);
7088 BFD_ASSERT (s->output_section != NULL);
7089
7090 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7091 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7092 if (!myh)
7093 return FALSE;
7094
7095 my_offset = myh->root.u.def.value;
252b5132
RH		 7096 tmp = bfd_get_32 (input_bfd, hit_data);
7097 tmp = tmp & 0xFF000000;
7098
9b485d32 7099 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7100 ret_offset = (s->output_offset
7101 + my_offset
7102 + s->output_section->vma
7103 - (input_section->output_offset
7104 + input_section->output_section->vma
7105 + offset + addend)
7106 - 8);
9a5aca8c 7107
252b5132
RH		 7108 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7109
dc810e39 7110 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7111
b34976b6 7112 return TRUE;
252b5132
RH		 7113}
7114
a4fd1a8e
PB		 7115/* Populate Arm stub for an exported Thumb function. */
7116
7117static bfd_boolean
7118elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7119{
7120 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7121 asection * s;
7122 struct elf_link_hash_entry * myh;
7123 struct elf32_arm_link_hash_entry *eh;
7124 struct elf32_arm_link_hash_table * globals;
7125 asection *sec;
7126 bfd_vma val;
f2a9dd69 7127 char *error_message;
a4fd1a8e 7128
906e58ca 7129 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7130 /* Allocate stubs for exported Thumb functions on v4t. */
7131 if (eh->export_glue == NULL)
7132 return TRUE;
7133
7134 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7135 BFD_ASSERT (globals != NULL);
7136 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7137
7138 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7139 ARM2THUMB_GLUE_SECTION_NAME);
7140 BFD_ASSERT (s != NULL);
7141 BFD_ASSERT (s->contents != NULL);
7142 BFD_ASSERT (s->output_section != NULL);
7143
7144 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7145
7146 BFD_ASSERT (sec->output_section != NULL);
7147
a4fd1a8e
PB		 7148 val = eh->export_glue->root.u.def.value + sec->output_offset
7149 + sec->output_section->vma;
8029a119 7150
a4fd1a8e
PB		 7151 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7152 h->root.u.def.section->owner,
f2a9dd69
DJ		 7153 globals->obfd, sec, val, s,
7154 &error_message);
a4fd1a8e
PB		 7155 BFD_ASSERT (myh);
7156 return TRUE;
7157}
7158
845b51d6
PB		 7159/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7160
7161static bfd_vma
7162elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7163{
7164 bfd_byte *p;
7165 bfd_vma glue_addr;
7166 asection *s;
7167 struct elf32_arm_link_hash_table *globals;
7168
7169 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7170 BFD_ASSERT (globals != NULL);
7171 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7172
7173 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
7174 ARM_BX_GLUE_SECTION_NAME);
7175 BFD_ASSERT (s != NULL);
7176 BFD_ASSERT (s->contents != NULL);
7177 BFD_ASSERT (s->output_section != NULL);
7178
7179 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7180
7181 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7182
7183 if ((globals->bx_glue_offset[reg] & 1) == 0)
7184 {
7185 p = s->contents + glue_addr;
7186 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7187 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7188 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7189 globals->bx_glue_offset[reg] |= 1;
7190 }
7191
7192 return glue_addr + s->output_section->vma + s->output_offset;
7193}
7194
a4fd1a8e
PB		 7195/* Generate Arm stubs for exported Thumb symbols. */
7196static void
906e58ca 7197elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7198 struct bfd_link_info *link_info)
7199{
7200 struct elf32_arm_link_hash_table * globals;
7201
8029a119
NC		 7202 if (link_info == NULL)
7203 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7204 return;
7205
7206 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7207 if (globals == NULL)
7208 return;
7209
84c08195
PB		 7210 /* If blx is available then exported Thumb symbols are OK and there is
7211 nothing to do. */
a4fd1a8e
PB		 7212 if (globals->use_blx)
7213 return;
7214
7215 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7216 link_info);
7217}
7218
47beaa6a
RS		 7219/* Reserve space for COUNT dynamic relocations in relocation selection
7220 SRELOC. */
7221
7222static void
7223elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7224 bfd_size_type count)
7225{
7226 struct elf32_arm_link_hash_table *htab;
7227
7228 htab = elf32_arm_hash_table (info);
7229 BFD_ASSERT (htab->root.dynamic_sections_created);
7230 if (sreloc == NULL)
7231 abort ();
7232 sreloc->size += RELOC_SIZE (htab) * count;
7233}
7234
34e77a92
RS		 7235/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7236 dynamic, the relocations should go in SRELOC, otherwise they should
7237 go in the special .rel.iplt section. */
7238
7239static void
7240elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7241 bfd_size_type count)
7242{
7243 struct elf32_arm_link_hash_table *htab;
7244
7245 htab = elf32_arm_hash_table (info);
7246 if (!htab->root.dynamic_sections_created)
7247 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7248 else
7249 {
7250 BFD_ASSERT (sreloc != NULL);
7251 sreloc->size += RELOC_SIZE (htab) * count;
7252 }
7253}
7254
47beaa6a
RS		 7255/* Add relocation REL to the end of relocation section SRELOC. */
7256
7257static void
7258elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7259 asection *sreloc, Elf_Internal_Rela *rel)
7260{
7261 bfd_byte *loc;
7262 struct elf32_arm_link_hash_table *htab;
7263
7264 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7265 if (!htab->root.dynamic_sections_created
7266 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7267 sreloc = htab->root.irelplt;
47beaa6a
RS		 7268 if (sreloc == NULL)
7269 abort ();
7270 loc = sreloc->contents;
7271 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7272 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7273 abort ();
7274 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7275}
7276
34e77a92
RS		 7277/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7278 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7279 to .plt. */
7280
7281static void
7282elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7283 bfd_boolean is_iplt_entry,
7284 union gotplt_union *root_plt,
7285 struct arm_plt_info *arm_plt)
7286{
7287 struct elf32_arm_link_hash_table *htab;
7288 asection *splt;
7289 asection *sgotplt;
7290
7291 htab = elf32_arm_hash_table (info);
7292
7293 if (is_iplt_entry)
7294 {
7295 splt = htab->root.iplt;
7296 sgotplt = htab->root.igotplt;
7297
7298 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7299 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7300 }
7301 else
7302 {
7303 splt = htab->root.splt;
7304 sgotplt = htab->root.sgotplt;
7305
7306 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7307 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7308
7309 /* If this is the first .plt entry, make room for the special
7310 first entry. */
7311 if (splt->size == 0)
7312 splt->size += htab->plt_header_size;
7313 }
7314
7315 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7316 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7317 splt->size += PLT_THUMB_STUB_SIZE;
7318 root_plt->offset = splt->size;
7319 splt->size += htab->plt_entry_size;
7320
7321 if (!htab->symbian_p)
7322 {
7323 /* We also need to make an entry in the .got.plt section, which
7324 will be placed in the .got section by the linker script. */
7325 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7326 sgotplt->size += 4;
7327 }
7328}
7329
7330/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7331 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7332 Otherwise, DYNINDX is the index of the symbol in the dynamic
7333 symbol table and SYM_VALUE is undefined.
7334
7335 ROOT_PLT points to the offset of the PLT entry from the start of its
7336 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7337 bookkeeping information. */
7338
7339static void
7340elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7341 union gotplt_union *root_plt,
7342 struct arm_plt_info *arm_plt,
7343 int dynindx, bfd_vma sym_value)
7344{
7345 struct elf32_arm_link_hash_table *htab;
7346 asection *sgot;
7347 asection *splt;
7348 asection *srel;
7349 bfd_byte *loc;
7350 bfd_vma plt_index;
7351 Elf_Internal_Rela rel;
7352 bfd_vma plt_header_size;
7353 bfd_vma got_header_size;
7354
7355 htab = elf32_arm_hash_table (info);
7356
7357 /* Pick the appropriate sections and sizes. */
7358 if (dynindx == -1)
7359 {
7360 splt = htab->root.iplt;
7361 sgot = htab->root.igotplt;
7362 srel = htab->root.irelplt;
7363
7364 /* There are no reserved entries in .igot.plt, and no special
7365 first entry in .iplt. */
7366 got_header_size = 0;
7367 plt_header_size = 0;
7368 }
7369 else
7370 {
7371 splt = htab->root.splt;
7372 sgot = htab->root.sgotplt;
7373 srel = htab->root.srelplt;
7374
7375 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7376 plt_header_size = htab->plt_header_size;
7377 }
7378 BFD_ASSERT (splt != NULL && srel != NULL);
7379
7380 /* Fill in the entry in the procedure linkage table. */
7381 if (htab->symbian_p)
7382 {
7383 BFD_ASSERT (dynindx >= 0);
7384 put_arm_insn (htab, output_bfd,
7385 elf32_arm_symbian_plt_entry[0],
7386 splt->contents + root_plt->offset);
7387 bfd_put_32 (output_bfd,
7388 elf32_arm_symbian_plt_entry[1],
7389 splt->contents + root_plt->offset + 4);
7390
7391 /* Fill in the entry in the .rel.plt section. */
7392 rel.r_offset = (splt->output_section->vma
7393 + splt->output_offset
7394 + root_plt->offset + 4);
7395 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7396
7397 /* Get the index in the procedure linkage table which
7398 corresponds to this symbol. This is the index of this symbol
7399 in all the symbols for which we are making plt entries. The
7400 first entry in the procedure linkage table is reserved. */
7401 plt_index = ((root_plt->offset - plt_header_size)
7402 / htab->plt_entry_size);
7403 }
7404 else
7405 {
7406 bfd_vma got_offset, got_address, plt_address;
7407 bfd_vma got_displacement, initial_got_entry;
7408 bfd_byte * ptr;
7409
7410 BFD_ASSERT (sgot != NULL);
7411
7412 /* Get the offset into the .(i)got.plt table of the entry that
7413 corresponds to this function. */
7414 got_offset = (arm_plt->got_offset & -2);
7415
7416 /* Get the index in the procedure linkage table which
7417 corresponds to this symbol. This is the index of this symbol
7418 in all the symbols for which we are making plt entries.
7419 After the reserved .got.plt entries, all symbols appear in
7420 the same order as in .plt. */
7421 plt_index = (got_offset - got_header_size) / 4;
7422
7423 /* Calculate the address of the GOT entry. */
7424 got_address = (sgot->output_section->vma
7425 + sgot->output_offset
7426 + got_offset);
7427
7428 /* ...and the address of the PLT entry. */
7429 plt_address = (splt->output_section->vma
7430 + splt->output_offset
7431 + root_plt->offset);
7432
7433 ptr = splt->contents + root_plt->offset;
7434 if (htab->vxworks_p && info->shared)
7435 {
7436 unsigned int i;
7437 bfd_vma val;
7438
7439 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7440 {
7441 val = elf32_arm_vxworks_shared_plt_entry[i];
7442 if (i == 2)
7443 val |= got_address - sgot->output_section->vma;
7444 if (i == 5)
7445 val |= plt_index * RELOC_SIZE (htab);
7446 if (i == 2 || i == 5)
7447 bfd_put_32 (output_bfd, val, ptr);
7448 else
7449 put_arm_insn (htab, output_bfd, val, ptr);
7450 }
7451 }
7452 else if (htab->vxworks_p)
7453 {
7454 unsigned int i;
7455 bfd_vma val;
7456
7457 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7458 {
7459 val = elf32_arm_vxworks_exec_plt_entry[i];
7460 if (i == 2)
7461 val |= got_address;
7462 if (i == 4)
7463 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7464 if (i == 5)
7465 val |= plt_index * RELOC_SIZE (htab);
7466 if (i == 2 || i == 5)
7467 bfd_put_32 (output_bfd, val, ptr);
7468 else
7469 put_arm_insn (htab, output_bfd, val, ptr);
7470 }
7471
7472 loc = (htab->srelplt2->contents
7473 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7474
7475 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7476 referencing the GOT for this PLT entry. */
7477 rel.r_offset = plt_address + 8;
7478 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7479 rel.r_addend = got_offset;
7480 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7481 loc += RELOC_SIZE (htab);
7482
7483 /* Create the R_ARM_ABS32 relocation referencing the
7484 beginning of the PLT for this GOT entry. */
7485 rel.r_offset = got_address;
7486 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7487 rel.r_addend = 0;
7488 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7489 }
7490 else
7491 {
7492 /* Calculate the displacement between the PLT slot and the
7493 entry in the GOT. The eight-byte offset accounts for the
7494 value produced by adding to pc in the first instruction
7495 of the PLT stub. */
7496 got_displacement = got_address - (plt_address + 8);
7497
7498 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7499
7500 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7501 {
7502 put_thumb_insn (htab, output_bfd,
7503 elf32_arm_plt_thumb_stub[0], ptr - 4);
7504 put_thumb_insn (htab, output_bfd,
7505 elf32_arm_plt_thumb_stub[1], ptr - 2);
7506 }
7507
7508 put_arm_insn (htab, output_bfd,
7509 elf32_arm_plt_entry[0]
7510 | ((got_displacement & 0x0ff00000) >> 20),
7511 ptr + 0);
7512 put_arm_insn (htab, output_bfd,
7513 elf32_arm_plt_entry[1]
7514 | ((got_displacement & 0x000ff000) >> 12),
7515 ptr+ 4);
7516 put_arm_insn (htab, output_bfd,
7517 elf32_arm_plt_entry[2]
7518 | (got_displacement & 0x00000fff),
7519 ptr + 8);
7520#ifdef FOUR_WORD_PLT
7521 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7522#endif
7523 }
7524
7525 /* Fill in the entry in the .rel(a).(i)plt section. */
7526 rel.r_offset = got_address;
7527 rel.r_addend = 0;
7528 if (dynindx == -1)
7529 {
7530 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7531 The dynamic linker or static executable then calls SYM_VALUE
7532 to determine the correct run-time value of the .igot.plt entry. */
7533 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7534 initial_got_entry = sym_value;
7535 }
7536 else
7537 {
7538 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7539 initial_got_entry = (splt->output_section->vma
7540 + splt->output_offset);
7541 }
7542
7543 /* Fill in the entry in the global offset table. */
7544 bfd_put_32 (output_bfd, initial_got_entry,
7545 sgot->contents + got_offset);
7546 }
7547
7548 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7549 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7550}
7551
eb043451
PB		 7552/* Some relocations map to different relocations depending on the
7553 target. Return the real relocation. */
8029a119 7554
eb043451
PB		 7555static int
7556arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7557 int r_type)
7558{
7559 switch (r_type)
7560 {
7561 case R_ARM_TARGET1:
7562 if (globals->target1_is_rel)
7563 return R_ARM_REL32;
7564 else
7565 return R_ARM_ABS32;
7566
7567 case R_ARM_TARGET2:
7568 return globals->target2_reloc;
7569
7570 default:
7571 return r_type;
7572 }
7573}
eb043451 7574
ba93b8ac
DJ		 7575/* Return the base VMA address which should be subtracted from real addresses
7576 when resolving @dtpoff relocation.
7577 This is PT_TLS segment p_vaddr. */
7578
7579static bfd_vma
7580dtpoff_base (struct bfd_link_info *info)
7581{
7582 /* If tls_sec is NULL, we should have signalled an error already. */
7583 if (elf_hash_table (info)->tls_sec == NULL)
7584 return 0;
7585 return elf_hash_table (info)->tls_sec->vma;
7586}
7587
7588/* Return the relocation value for @tpoff relocation
7589 if STT_TLS virtual address is ADDRESS. */
7590
7591static bfd_vma
7592tpoff (struct bfd_link_info *info, bfd_vma address)
7593{
7594 struct elf_link_hash_table *htab = elf_hash_table (info);
7595 bfd_vma base;
7596
7597 /* If tls_sec is NULL, we should have signalled an error already. */
7598 if (htab->tls_sec == NULL)
7599 return 0;
7600 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7601 return address - htab->tls_sec->vma + base;
7602}
7603
00a97672
RS		 7604/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7605 VALUE is the relocation value. */
7606
7607static bfd_reloc_status_type
7608elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7609{
7610 if (value > 0xfff)
7611 return bfd_reloc_overflow;
7612
7613 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7614 bfd_put_32 (abfd, value, data);
7615 return bfd_reloc_ok;
7616}
7617
0855e32b
NS		 7618/* Handle TLS relaxations. Relaxing is possible for symbols that use
7619 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7620 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7621
7622 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7623 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7624 case of error.
7625
7626 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7627 the pre-relaxed code. It would be nice if the relocs were updated
7628 to match the optimization. */
0855e32b
NS		 7629
7630static bfd_reloc_status_type
7631elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7632 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7633 Elf_Internal_Rela *rel, unsigned long is_local)
7634{
7635 unsigned long insn;
7636
7637 switch (ELF32_R_TYPE (rel->r_info))
7638 {
7639 default:
7640 return bfd_reloc_notsupported;
7641
7642 case R_ARM_TLS_GOTDESC:
7643 if (is_local)
7644 insn = 0;
7645 else
7646 {
7647 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7648 if (insn & 1)
7649 insn -= 5; /* THUMB */
7650 else
7651 insn -= 8; /* ARM */
7652 }
7653 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7654 return bfd_reloc_continue;
7655
7656 case R_ARM_THM_TLS_DESCSEQ:
7657 /* Thumb insn. */
7658 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7659 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7660 {
7661 if (is_local)
7662 /* nop */
7663 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7664 }
7665 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7666 {
7667 if (is_local)
7668 /* nop */
7669 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7670 else
7671 /* ldr rx,[ry] */
7672 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7673 }
7674 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7675 {
7676 if (is_local)
7677 /* nop */
7678 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7679 else
7680 /* mov r0, rx */
7681 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7682 contents + rel->r_offset);
7683 }
7684 else
7685 {
7686 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7687 /* It's a 32 bit instruction, fetch the rest of it for
7688 error generation. */
7689 insn = (insn << 16)
7690 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7691 (*_bfd_error_handler)
7692 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7693 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7694 return bfd_reloc_notsupported;
7695 }
7696 break;
7697
7698 case R_ARM_TLS_DESCSEQ:
7699 /* arm insn. */
7700 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7701 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7702 {
7703 if (is_local)
7704 /* mov rx, ry */
7705 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7706 contents + rel->r_offset);
7707 }
7708 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7709 {
7710 if (is_local)
7711 /* nop */
7712 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7713 else
7714 /* ldr rx,[ry] */
7715 bfd_put_32 (input_bfd, insn & 0xfffff000,
7716 contents + rel->r_offset);
7717 }
7718 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7719 {
7720 if (is_local)
7721 /* nop */
7722 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7723 else
7724 /* mov r0, rx */
7725 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7726 contents + rel->r_offset);
7727 }
7728 else
7729 {
7730 (*_bfd_error_handler)
7731 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7732 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7733 return bfd_reloc_notsupported;
7734 }
7735 break;
7736
7737 case R_ARM_TLS_CALL:
7738 /* GD->IE relaxation, turn the instruction into 'nop' or
7739 'ldr r0, [pc,r0]' */
7740 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7741 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7742 break;
7743
7744 case R_ARM_THM_TLS_CALL:
7745 /* GD->IE relaxation */
7746 if (!is_local)
7747 /* add r0,pc; ldr r0, [r0] */
7748 insn = 0x44786800;
7749 else if (arch_has_thumb2_nop (globals))
7750 /* nop.w */
7751 insn = 0xf3af8000;
7752 else
7753 /* nop; nop */
7754 insn = 0xbf00bf00;
7755
7756 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7757 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7758 break;
7759 }
7760 return bfd_reloc_ok;
7761}
7762
4962c51a
MS		 7763/* For a given value of n, calculate the value of G_n as required to
7764 deal with group relocations. We return it in the form of an
7765 encoded constant-and-rotation, together with the final residual. If n is
7766 specified as less than zero, then final_residual is filled with the
7767 input value and no further action is performed. */
7768
7769static bfd_vma
7770calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7771{
7772 int current_n;
7773 bfd_vma g_n;
7774 bfd_vma encoded_g_n = 0;
7775 bfd_vma residual = value; /* Also known as Y_n. */
7776
7777 for (current_n = 0; current_n <= n; current_n++)
7778 {
7779 int shift;
7780
7781 /* Calculate which part of the value to mask. */
7782 if (residual == 0)
7783 shift = 0;
7784 else
7785 {
7786 int msb;
7787
7788 /* Determine the most significant bit in the residual and
7789 align the resulting value to a 2-bit boundary. */
7790 for (msb = 30; msb >= 0; msb -= 2)
7791 if (residual & (3 << msb))
7792 break;
7793
7794 /* The desired shift is now (msb - 6), or zero, whichever
7795 is the greater. */
7796 shift = msb - 6;
7797 if (shift < 0)
7798 shift = 0;
7799 }
7800
7801 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7802 g_n = residual & (0xff << shift);
7803 encoded_g_n = (g_n >> shift)
7804 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7805
7806 /* Calculate the residual for the next time around. */
7807 residual &= ~g_n;
7808 }
7809
7810 *final_residual = residual;
7811
7812 return encoded_g_n;
7813}
7814
7815/* Given an ARM instruction, determine whether it is an ADD or a SUB.
7816 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 7817
4962c51a 7818static int
906e58ca 7819identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 7820{
7821 int opcode = insn & 0x1e00000;
7822
7823 if (opcode == 1 << 23) /* ADD */
7824 return 1;
7825
7826 if (opcode == 1 << 22) /* SUB */
7827 return -1;
7828
7829 return 0;
7830}
7831
252b5132 7832/* Perform a relocation as part of a final link. */
9b485d32 7833
252b5132 7834static bfd_reloc_status_type
57e8b36a
NC		 7835elf32_arm_final_link_relocate (reloc_howto_type * howto,
7836 bfd * input_bfd,
7837 bfd * output_bfd,
7838 asection * input_section,
7839 bfd_byte * contents,
7840 Elf_Internal_Rela * rel,
7841 bfd_vma value,
7842 struct bfd_link_info * info,
7843 asection * sym_sec,
7844 const char * sym_name,
34e77a92
RS		 7845 unsigned char st_type,
7846 enum arm_st_branch_type branch_type,
0945cdfd 7847 struct elf_link_hash_entry * h,
f2a9dd69 7848 bfd_boolean * unresolved_reloc_p,
8029a119 7849 char ** error_message)
252b5132
RH		 7850{
7851 unsigned long r_type = howto->type;
7852 unsigned long r_symndx;
7853 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 7854 bfd_vma * local_got_offsets;
0855e32b 7855 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 7856 asection * sgot;
7857 asection * splt;
252b5132 7858 asection * sreloc = NULL;
362d30a1 7859 asection * srelgot;
252b5132 7860 bfd_vma addend;
ba96a88f 7861 bfd_signed_vma signed_addend;
34e77a92
RS		 7862 unsigned char dynreloc_st_type;
7863 bfd_vma dynreloc_value;
ba96a88f 7864 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 7865 struct elf32_arm_link_hash_entry *eh;
7866 union gotplt_union *root_plt;
7867 struct arm_plt_info *arm_plt;
7868 bfd_vma plt_offset;
7869 bfd_vma gotplt_offset;
7870 bfd_boolean has_iplt_entry;
f21f3fe0 7871
9c504268 7872 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 7873 if (globals == NULL)
7874 return bfd_reloc_notsupported;
9c504268 7875
0ffa91dd
NC		 7876 BFD_ASSERT (is_arm_elf (input_bfd));
7877
7878 /* Some relocation types map to different relocations depending on the
9c504268 7879 target. We pick the right one here. */
eb043451 7880 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 7881
7882 /* It is possible to have linker relaxations on some TLS access
7883 models. Update our information here. */
7884 r_type = elf32_arm_tls_transition (info, r_type, h);
7885
eb043451
PB		 7886 if (r_type != howto->type)
7887 howto = elf32_arm_howto_from_type (r_type);
9c504268 7888
cac15327
NC		 7889 /* If the start address has been set, then set the EF_ARM_HASENTRY
7890 flag. Setting this more than once is redundant, but the cost is
7891 not too high, and it keeps the code simple.
99e4ae17 7892
cac15327
NC		 7893 The test is done here, rather than somewhere else, because the
7894 start address is only set just before the final link commences.
7895
7896 Note - if the user deliberately sets a start address of 0, the
7897 flag will not be set. */
7898 if (bfd_get_start_address (output_bfd) != 0)
7899 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 7900
34e77a92 7901 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 7902 sgot = globals->root.sgot;
252b5132 7903 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 7904 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
7905
34e77a92
RS		 7906 if (globals->root.dynamic_sections_created)
7907 srelgot = globals->root.srelgot;
7908 else
7909 srelgot = NULL;
7910
252b5132
RH		 7911 r_symndx = ELF32_R_SYM (rel->r_info);
7912
4e7fd91e 7913 if (globals->use_rel)
ba96a88f 7914 {
4e7fd91e
PB		 7915 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
7916
7917 if (addend & ((howto->src_mask + 1) >> 1))
7918 {
7919 signed_addend = -1;
7920 signed_addend &= ~ howto->src_mask;
7921 signed_addend |= addend;
7922 }
7923 else
7924 signed_addend = addend;
ba96a88f
NC		 7925 }
7926 else
4e7fd91e 7927 addend = signed_addend = rel->r_addend;
f21f3fe0 7928
34e77a92
RS		 7929 /* Record the symbol information that should be used in dynamic
7930 relocations. */
7931 dynreloc_st_type = st_type;
7932 dynreloc_value = value;
7933 if (branch_type == ST_BRANCH_TO_THUMB)
7934 dynreloc_value |= 1;
7935
7936 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
7937 VALUE appropriately for relocations that we resolve at link time. */
7938 has_iplt_entry = FALSE;
7939 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
7940 && root_plt->offset != (bfd_vma) -1)
7941 {
7942 plt_offset = root_plt->offset;
7943 gotplt_offset = arm_plt->got_offset;
7944
7945 if (h == NULL || eh->is_iplt)
7946 {
7947 has_iplt_entry = TRUE;
7948 splt = globals->root.iplt;
7949
7950 /* Populate .iplt entries here, because not all of them will
7951 be seen by finish_dynamic_symbol. The lower bit is set if
7952 we have already populated the entry. */
7953 if (plt_offset & 1)
7954 plt_offset--;
7955 else
7956 {
7957 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
7958 -1, dynreloc_value);
7959 root_plt->offset |= 1;
7960 }
7961
7962 /* Static relocations always resolve to the .iplt entry. */
7963 st_type = STT_FUNC;
7964 value = (splt->output_section->vma
7965 + splt->output_offset
7966 + plt_offset);
7967 branch_type = ST_BRANCH_TO_ARM;
7968
7969 /* If there are non-call relocations that resolve to the .iplt
7970 entry, then all dynamic ones must too. */
7971 if (arm_plt->noncall_refcount != 0)
7972 {
7973 dynreloc_st_type = st_type;
7974 dynreloc_value = value;
7975 }
7976 }
7977 else
7978 /* We populate the .plt entry in finish_dynamic_symbol. */
7979 splt = globals->root.splt;
7980 }
7981 else
7982 {
7983 splt = NULL;
7984 plt_offset = (bfd_vma) -1;
7985 gotplt_offset = (bfd_vma) -1;
7986 }
7987
252b5132
RH		 7988 switch (r_type)
7989 {
7990 case R_ARM_NONE:
28a094c2
DJ		 7991 /* We don't need to find a value for this symbol. It's just a
7992 marker. */
7993 *unresolved_reloc_p = FALSE;
252b5132
RH		 7994 return bfd_reloc_ok;
7995
00a97672
RS		 7996 case R_ARM_ABS12:
7997 if (!globals->vxworks_p)
7998 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7999
252b5132
RH		 8000 case R_ARM_PC24:
8001 case R_ARM_ABS32:
bb224fc3 8002 case R_ARM_ABS32_NOI:
252b5132 8003 case R_ARM_REL32:
bb224fc3 8004 case R_ARM_REL32_NOI:
5b5bb741
PB		 8005 case R_ARM_CALL:
8006 case R_ARM_JUMP24:
dfc5f959 8007 case R_ARM_XPC25:
eb043451 8008 case R_ARM_PREL31:
7359ea65 8009 case R_ARM_PLT32:
7359ea65
DJ		 8010 /* Handle relocations which should use the PLT entry. ABS32/REL32
8011 will use the symbol's value, which may point to a PLT entry, but we
8012 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8013 branches in this object should go to it, except if the PLT is too
8014 far away, in which case a long branch stub should be inserted. */
bb224fc3 8015 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 8016 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8017 && r_type != R_ARM_CALL
8018 && r_type != R_ARM_JUMP24
8019 && r_type != R_ARM_PLT32)
34e77a92 8020 && plt_offset != (bfd_vma) -1)
7359ea65 8021 {
34e77a92
RS		 8022 /* If we've created a .plt section, and assigned a PLT entry
8023 to this function, it must either be a STT_GNU_IFUNC reference
8024 or not be known to bind locally. In other cases, we should
8025 have cleared the PLT entry by now. */
8026 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8027
8028 value = (splt->output_section->vma
8029 + splt->output_offset
34e77a92 8030 + plt_offset);
0945cdfd 8031 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8032 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8033 contents, rel->r_offset, value,
00a97672 8034 rel->r_addend);
7359ea65
DJ		 8035 }
8036
67687978
PB		 8037 /* When generating a shared object or relocatable executable, these
8038 relocations are copied into the output file to be resolved at
8039 run time. */
8040 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8041 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8042 && !(globals->vxworks_p
3348747a
NS		 8043 && strcmp (input_section->output_section->name,
8044 ".tls_vars") == 0)
bb224fc3 8045 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8046 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 8047 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8048 && (h == NULL
8049 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8050 || h->root.type != bfd_link_hash_undefweak)
8051 && r_type != R_ARM_PC24
5b5bb741
PB		 8052 && r_type != R_ARM_CALL
8053 && r_type != R_ARM_JUMP24
ee06dc07 8054 && r_type != R_ARM_PREL31
7359ea65 8055 && r_type != R_ARM_PLT32)
252b5132 8056 {
947216bf 8057 Elf_Internal_Rela outrel;
b34976b6 8058 bfd_boolean skip, relocate;
f21f3fe0 8059
0945cdfd
DJ		 8060 *unresolved_reloc_p = FALSE;
8061
34e77a92 8062 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8063 {
83bac4b0
NC		 8064 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8065 ! globals->use_rel);
f21f3fe0 8066
83bac4b0 8067 if (sreloc == NULL)
252b5132 8068 return bfd_reloc_notsupported;
252b5132 8069 }
f21f3fe0 8070
b34976b6
AM		 8071 skip = FALSE;
8072 relocate = FALSE;
f21f3fe0 8073
00a97672 8074 outrel.r_addend = addend;
c629eae0
JJ		 8075 outrel.r_offset =
8076 _bfd_elf_section_offset (output_bfd, info, input_section,
8077 rel->r_offset);
8078 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8079 skip = TRUE;
0bb2d96a 8080 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8081 skip = TRUE, relocate = TRUE;
252b5132
RH		 8082 outrel.r_offset += (input_section->output_section->vma
8083 + input_section->output_offset);
f21f3fe0 8084
252b5132 8085 if (skip)
0bb2d96a 8086 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8087 else if (h != NULL
8088 && h->dynindx != -1
7359ea65 8089 && (!info->shared
5e681ec4 8090 || !info->symbolic
f5385ebf 8091 || !h->def_regular))
5e681ec4 8092 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8093 else
8094 {
a16385dc
MM		 8095 int symbol;
8096
5e681ec4 8097 /* This symbol is local, or marked to become local. */
34e77a92 8098 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8099 if (globals->symbian_p)
6366ff1e 8100 {
74541ad4
AM		 8101 asection *osec;
8102
6366ff1e
MM		 8103 /* On Symbian OS, the data segment and text segement
8104 can be relocated independently. Therefore, we
8105 must indicate the segment to which this
8106 relocation is relative. The BPABI allows us to
8107 use any symbol in the right segment; we just use
8108 the section symbol as it is convenient. (We
8109 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8110 will not appear in the dynamic symbol table.)
8111
8112 Note that the dynamic linker ignores the section
8113 symbol value, so we don't subtract osec->vma
8114 from the emitted reloc addend. */
10dbd1f3 8115 if (sym_sec)
74541ad4 8116 osec = sym_sec->output_section;
10dbd1f3 8117 else
74541ad4
AM		 8118 osec = input_section->output_section;
8119 symbol = elf_section_data (osec)->dynindx;
8120 if (symbol == 0)
8121 {
8122 struct elf_link_hash_table *htab = elf_hash_table (info);
8123
8124 if ((osec->flags & SEC_READONLY) == 0
8125 && htab->data_index_section != NULL)
8126 osec = htab->data_index_section;
8127 else
8128 osec = htab->text_index_section;
8129 symbol = elf_section_data (osec)->dynindx;
8130 }
6366ff1e
MM		 8131 BFD_ASSERT (symbol != 0);
8132 }
a16385dc
MM		 8133 else
8134 /* On SVR4-ish systems, the dynamic loader cannot
8135 relocate the text and data segments independently,
8136 so the symbol does not matter. */
8137 symbol = 0;
34e77a92
RS		 8138 if (dynreloc_st_type == STT_GNU_IFUNC)
8139 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8140 to the .iplt entry. Instead, every non-call reference
8141 must use an R_ARM_IRELATIVE relocation to obtain the
8142 correct run-time address. */
8143 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8144 else
8145 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8146 if (globals->use_rel)
8147 relocate = TRUE;
8148 else
34e77a92 8149 outrel.r_addend += dynreloc_value;
252b5132 8150 }
f21f3fe0 8151
47beaa6a 8152 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8153
f21f3fe0 8154 /* If this reloc is against an external symbol, we do not want to
252b5132 8155 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8156 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8157 if (! relocate)
8158 return bfd_reloc_ok;
9a5aca8c 8159
f21f3fe0 8160 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8161 contents, rel->r_offset,
8162 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8163 }
8164 else switch (r_type)
8165 {
00a97672
RS		 8166 case R_ARM_ABS12:
8167 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8168
dfc5f959 8169 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8170 case R_ARM_CALL:
8171 case R_ARM_JUMP24:
8029a119 8172 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8173 case R_ARM_PLT32:
906e58ca 8174 {
906e58ca
NC		 8175 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8176
dfc5f959 8177 if (r_type == R_ARM_XPC25)
252b5132 8178 {
dfc5f959
NC		 8179 /* Check for Arm calling Arm function. */
8180 /* FIXME: Should we translate the instruction into a BL
8181 instruction instead ? */
35fc36a8 8182 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8183 (*_bfd_error_handler)
8184 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8185 input_bfd,
8186 h ? h->root.root.string : "(local)");
dfc5f959 8187 }
155d87d7 8188 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8189 {
8190 /* Check for Arm calling Thumb function. */
35fc36a8 8191 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8192 {
f2a9dd69
DJ		 8193 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8194 output_bfd, input_section,
8195 hit_data, sym_sec, rel->r_offset,
8196 signed_addend, value,
8197 error_message))
8198 return bfd_reloc_ok;
8199 else
8200 return bfd_reloc_dangerous;
dfc5f959 8201 }
252b5132 8202 }
ba96a88f 8203
906e58ca 8204 /* Check if a stub has to be inserted because the
8029a119 8205 destination is too far or we are changing mode. */
155d87d7
CL		 8206 if ( r_type == R_ARM_CALL
8207 || r_type == R_ARM_JUMP24
8208 || r_type == R_ARM_PLT32)
906e58ca 8209 {
fe33d2fa
CL		 8210 enum elf32_arm_stub_type stub_type = arm_stub_none;
8211 struct elf32_arm_link_hash_entry *hash;
8212
8213 hash = (struct elf32_arm_link_hash_entry *) h;
8214 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8215 st_type, &branch_type,
8216 hash, value, sym_sec,
fe33d2fa 8217 input_bfd, sym_name);
5fa9e92f 8218
fe33d2fa 8219 if (stub_type != arm_stub_none)
906e58ca
NC		 8220 {
8221 /* The target is out of reach, so redirect the
8222 branch to the local stub for this function. */
906e58ca
NC		 8223 stub_entry = elf32_arm_get_stub_entry (input_section,
8224 sym_sec, h,
fe33d2fa
CL		 8225 rel, globals,
8226 stub_type);
9cd3e4e5
NC		 8227 {
8228 if (stub_entry != NULL)
8229 value = (stub_entry->stub_offset
8230 + stub_entry->stub_sec->output_offset
8231 + stub_entry->stub_sec->output_section->vma);
8232
8233 if (plt_offset != (bfd_vma) -1)
8234 *unresolved_reloc_p = FALSE;
8235 }
906e58ca 8236 }
fe33d2fa
CL		 8237 else
8238 {
8239 /* If the call goes through a PLT entry, make sure to
8240 check distance to the right destination address. */
34e77a92 8241 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8242 {
8243 value = (splt->output_section->vma
8244 + splt->output_offset
34e77a92 8245 + plt_offset);
fe33d2fa
CL		 8246 *unresolved_reloc_p = FALSE;
8247 /* The PLT entry is in ARM mode, regardless of the
8248 target function. */
35fc36a8 8249 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8250 }
8251 }
906e58ca
NC		 8252 }
8253
dea514f5
PB		 8254 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8255 where:
8256 S is the address of the symbol in the relocation.
8257 P is address of the instruction being relocated.
8258 A is the addend (extracted from the instruction) in bytes.
8259
8260 S is held in 'value'.
8261 P is the base address of the section containing the
8262 instruction plus the offset of the reloc into that
8263 section, ie:
8264 (input_section->output_section->vma +
8265 input_section->output_offset +
8266 rel->r_offset).
8267 A is the addend, converted into bytes, ie:
8268 (signed_addend * 4)
8269
8270 Note: None of these operations have knowledge of the pipeline
8271 size of the processor, thus it is up to the assembler to
8272 encode this information into the addend. */
8273 value -= (input_section->output_section->vma
8274 + input_section->output_offset);
8275 value -= rel->r_offset;
4e7fd91e
PB		 8276 if (globals->use_rel)
8277 value += (signed_addend << howto->size);
8278 else
8279 /* RELA addends do not have to be adjusted by howto->size. */
8280 value += signed_addend;
23080146 8281
dcb5e6e6
NC		 8282 signed_addend = value;
8283 signed_addend >>= howto->rightshift;
9a5aca8c 8284
5ab79981 8285 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8286 the next instruction unless a PLT entry will be created.
77b4f08f 8287 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8288 The jump to the next instruction is optimized as a NOP depending
8289 on the architecture. */
ffcb4889 8290 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8291 && plt_offset == (bfd_vma) -1)
77b4f08f 8292 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8293 {
cd1dac3d
DG		 8294 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8295
8296 if (arch_has_arm_nop (globals))
8297 value |= 0x0320f000;
8298 else
8299 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8300 }
8301 else
59f2c4e7 8302 {
9b485d32 8303 /* Perform a signed range check. */
dcb5e6e6 8304 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8305 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8306 return bfd_reloc_overflow;
9a5aca8c 8307
5ab79981 8308 addend = (value & 2);
39b41c9c 8309
5ab79981
PB		 8310 value = (signed_addend & howto->dst_mask)
8311 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8312
5ab79981
PB		 8313 if (r_type == R_ARM_CALL)
8314 {
155d87d7 8315 /* Set the H bit in the BLX instruction. */
35fc36a8 8316 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8317 {
8318 if (addend)
8319 value |= (1 << 24);
8320 else
8321 value &= ~(bfd_vma)(1 << 24);
8322 }
8323
5ab79981 8324 /* Select the correct instruction (BL or BLX). */
906e58ca 8325 /* Only if we are not handling a BL to a stub. In this
8029a119 8326 case, mode switching is performed by the stub. */
35fc36a8 8327 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8328 value |= (1 << 28);
63e1a0fc 8329 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8330 {
8331 value &= ~(bfd_vma)(1 << 28);
8332 value |= (1 << 24);
8333 }
39b41c9c
PB		 8334 }
8335 }
906e58ca 8336 }
252b5132 8337 break;
f21f3fe0 8338
252b5132
RH		 8339 case R_ARM_ABS32:
8340 value += addend;
35fc36a8 8341 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8342 value |= 1;
8343 break;
f21f3fe0 8344
bb224fc3
MS		 8345 case R_ARM_ABS32_NOI:
8346 value += addend;
8347 break;
8348
252b5132 8349 case R_ARM_REL32:
a8bc6c78 8350 value += addend;
35fc36a8 8351 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8352 value |= 1;
252b5132 8353 value -= (input_section->output_section->vma
62efb346 8354 + input_section->output_offset + rel->r_offset);
252b5132 8355 break;
eb043451 8356
bb224fc3
MS		 8357 case R_ARM_REL32_NOI:
8358 value += addend;
8359 value -= (input_section->output_section->vma
8360 + input_section->output_offset + rel->r_offset);
8361 break;
8362
eb043451
PB		 8363 case R_ARM_PREL31:
8364 value -= (input_section->output_section->vma
8365 + input_section->output_offset + rel->r_offset);
8366 value += signed_addend;
8367 if (! h || h->root.type != bfd_link_hash_undefweak)
8368 {
8029a119 8369 /* Check for overflow. */
eb043451
PB		 8370 if ((value ^ (value >> 1)) & (1 << 30))
8371 return bfd_reloc_overflow;
8372 }
8373 value &= 0x7fffffff;
8374 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8375 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8376 value |= 1;
8377 break;
252b5132 8378 }
f21f3fe0 8379
252b5132
RH		 8380 bfd_put_32 (input_bfd, value, hit_data);
8381 return bfd_reloc_ok;
8382
8383 case R_ARM_ABS8:
8384 value += addend;
4e67d4ca
DG		 8385
8386 /* There is no way to tell whether the user intended to use a signed or
8387 unsigned addend. When checking for overflow we accept either,
8388 as specified by the AAELF. */
8389 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8390 return bfd_reloc_overflow;
8391
8392 bfd_put_8 (input_bfd, value, hit_data);
8393 return bfd_reloc_ok;
8394
8395 case R_ARM_ABS16:
8396 value += addend;
8397
4e67d4ca
DG		 8398 /* See comment for R_ARM_ABS8. */
8399 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8400 return bfd_reloc_overflow;
8401
8402 bfd_put_16 (input_bfd, value, hit_data);
8403 return bfd_reloc_ok;
8404
252b5132 8405 case R_ARM_THM_ABS5:
9b485d32 8406 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8407 if (globals->use_rel)
8408 {
8409 /* Need to refetch addend. */
8410 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8411 /* ??? Need to determine shift amount from operand size. */
8412 addend >>= howto->rightshift;
8413 }
252b5132
RH		 8414 value += addend;
8415
8416 /* ??? Isn't value unsigned? */
8417 if ((long) value > 0x1f || (long) value < -0x10)
8418 return bfd_reloc_overflow;
8419
8420 /* ??? Value needs to be properly shifted into place first. */
8421 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8422 bfd_put_16 (input_bfd, value, hit_data);
8423 return bfd_reloc_ok;
8424
2cab6cc3
MS		 8425 case R_ARM_THM_ALU_PREL_11_0:
8426 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8427 {
8428 bfd_vma insn;
8429 bfd_signed_vma relocation;
8430
8431 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8432 | bfd_get_16 (input_bfd, hit_data + 2);
8433
8434 if (globals->use_rel)
8435 {
8436 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8437 | ((insn & (1 << 26)) >> 15);
8438 if (insn & 0xf00000)
8439 signed_addend = -signed_addend;
8440 }
8441
8442 relocation = value + signed_addend;
8443 relocation -= (input_section->output_section->vma
8444 + input_section->output_offset
8445 + rel->r_offset);
8446
8447 value = abs (relocation);
8448
8449 if (value >= 0x1000)
8450 return bfd_reloc_overflow;
8451
8452 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8453 | ((value & 0x700) << 4)
8454 | ((value & 0x800) << 15);
8455 if (relocation < 0)
8456 insn |= 0xa00000;
8457
8458 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8459 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8460
8461 return bfd_reloc_ok;
8462 }
8463
e1ec24c6
NC		 8464 case R_ARM_THM_PC8:
8465 /* PR 10073: This reloc is not generated by the GNU toolchain,
8466 but it is supported for compatibility with third party libraries
8467 generated by other compilers, specifically the ARM/IAR. */
8468 {
8469 bfd_vma insn;
8470 bfd_signed_vma relocation;
8471
8472 insn = bfd_get_16 (input_bfd, hit_data);
8473
8474 if (globals->use_rel)
8475 addend = (insn & 0x00ff) << 2;
8476
8477 relocation = value + addend;
8478 relocation -= (input_section->output_section->vma
8479 + input_section->output_offset
8480 + rel->r_offset);
8481
8482 value = abs (relocation);
8483
8484 /* We do not check for overflow of this reloc. Although strictly
8485 speaking this is incorrect, it appears to be necessary in order
8486 to work with IAR generated relocs. Since GCC and GAS do not
8487 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8488 a problem for them. */
8489 value &= 0x3fc;
8490
8491 insn = (insn & 0xff00) | (value >> 2);
8492
8493 bfd_put_16 (input_bfd, insn, hit_data);
8494
8495 return bfd_reloc_ok;
8496 }
8497
2cab6cc3
MS		 8498 case R_ARM_THM_PC12:
8499 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8500 {
8501 bfd_vma insn;
8502 bfd_signed_vma relocation;
8503
8504 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8505 | bfd_get_16 (input_bfd, hit_data + 2);
8506
8507 if (globals->use_rel)
8508 {
8509 signed_addend = insn & 0xfff;
8510 if (!(insn & (1 << 23)))
8511 signed_addend = -signed_addend;
8512 }
8513
8514 relocation = value + signed_addend;
8515 relocation -= (input_section->output_section->vma
8516 + input_section->output_offset
8517 + rel->r_offset);
8518
8519 value = abs (relocation);
8520
8521 if (value >= 0x1000)
8522 return bfd_reloc_overflow;
8523
8524 insn = (insn & 0xff7ff000) | value;
8525 if (relocation >= 0)
8526 insn |= (1 << 23);
8527
8528 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8529 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8530
8531 return bfd_reloc_ok;
8532 }
8533
dfc5f959 8534 case R_ARM_THM_XPC22:
c19d1205 8535 case R_ARM_THM_CALL:
bd97cb95 8536 case R_ARM_THM_JUMP24:
dfc5f959 8537 /* Thumb BL (branch long instruction). */
252b5132 8538 {
b34976b6 8539 bfd_vma relocation;
e95de063 8540 bfd_vma reloc_sign;
b34976b6
AM		 8541 bfd_boolean overflow = FALSE;
8542 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8543 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8544 bfd_signed_vma reloc_signed_max;
8545 bfd_signed_vma reloc_signed_min;
b34976b6 8546 bfd_vma check;
252b5132 8547 bfd_signed_vma signed_check;
e95de063 8548 int bitsize;
cd1dac3d 8549 const int thumb2 = using_thumb2 (globals);
252b5132 8550
5ab79981 8551 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8552 the next instruction unless a PLT entry will be created.
8553 The jump to the next instruction is optimized as a NOP.W for
8554 Thumb-2 enabled architectures. */
19540007 8555 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8556 && plt_offset == (bfd_vma) -1)
5ab79981 8557 {
cd1dac3d
DG		 8558 if (arch_has_thumb2_nop (globals))
8559 {
8560 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8561 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8562 }
8563 else
8564 {
8565 bfd_put_16 (input_bfd, 0xe000, hit_data);
8566 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8567 }
5ab79981
PB		 8568 return bfd_reloc_ok;
8569 }
8570
e95de063
MS		 8571 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8572 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8573 if (globals->use_rel)
8574 {
e95de063
MS		 8575 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8576 bfd_vma upper = upper_insn & 0x3ff;
8577 bfd_vma lower = lower_insn & 0x7ff;
8578 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8579 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8580 bfd_vma i1 = j1 ^ s ? 0 : 1;
8581 bfd_vma i2 = j2 ^ s ? 0 : 1;
8582
8583 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8584 /* Sign extend. */
8585 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8586
4e7fd91e
PB		 8587 signed_addend = addend;
8588 }
cb1afa5c 8589
dfc5f959
NC		 8590 if (r_type == R_ARM_THM_XPC22)
8591 {
8592 /* Check for Thumb to Thumb call. */
8593 /* FIXME: Should we translate the instruction into a BL
8594 instruction instead ? */
35fc36a8 8595 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8596 (*_bfd_error_handler)
8597 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8598 input_bfd,
8599 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8600 }
8601 else
252b5132 8602 {
dfc5f959
NC		 8603 /* If it is not a call to Thumb, assume call to Arm.
8604 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8605 function call at all, but rather a long jump. Calls through
8606 the PLT do not require stubs. */
34e77a92 8607 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8608 {
bd97cb95 8609 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8610 {
8611 /* Convert BL to BLX. */
8612 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8613 }
155d87d7
CL		 8614 else if (( r_type != R_ARM_THM_CALL)
8615 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8616 {
8617 if (elf32_thumb_to_arm_stub
8618 (info, sym_name, input_bfd, output_bfd, input_section,
8619 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8620 error_message))
8621 return bfd_reloc_ok;
8622 else
8623 return bfd_reloc_dangerous;
8624 }
da5938a2 8625 }
35fc36a8
RS		 8626 else if (branch_type == ST_BRANCH_TO_THUMB
8627 && globals->use_blx
bd97cb95 8628 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8629 {
8630 /* Make sure this is a BL. */
8631 lower_insn |= 0x1800;
8632 }
252b5132 8633 }
f21f3fe0 8634
fe33d2fa 8635 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8636 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8637 {
8638 /* Check if a stub has to be inserted because the destination
8029a119 8639 is too far. */
fe33d2fa
CL		 8640 struct elf32_arm_stub_hash_entry *stub_entry;
8641 struct elf32_arm_link_hash_entry *hash;
8642
8643 hash = (struct elf32_arm_link_hash_entry *) h;
8644
8645 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8646 st_type, &branch_type,
8647 hash, value, sym_sec,
fe33d2fa
CL		 8648 input_bfd, sym_name);
8649
8650 if (stub_type != arm_stub_none)
906e58ca
NC		 8651 {
8652 /* The target is out of reach or we are changing modes, so
8653 redirect the branch to the local stub for this
8654 function. */
8655 stub_entry = elf32_arm_get_stub_entry (input_section,
8656 sym_sec, h,
fe33d2fa
CL		 8657 rel, globals,
8658 stub_type);
906e58ca 8659 if (stub_entry != NULL)
9cd3e4e5
NC		 8660 {
8661 value = (stub_entry->stub_offset
8662 + stub_entry->stub_sec->output_offset
8663 + stub_entry->stub_sec->output_section->vma);
8664
8665 if (plt_offset != (bfd_vma) -1)
8666 *unresolved_reloc_p = FALSE;
8667 }
906e58ca 8668
f4ac8484 8669 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8670 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8671 {
8672 if ((stub_entry
8673 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8674 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8675 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8676 }
906e58ca
NC		 8677 }
8678 }
8679
fe33d2fa 8680 /* Handle calls via the PLT. */
34e77a92 8681 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8682 {
8683 value = (splt->output_section->vma
8684 + splt->output_offset
34e77a92 8685 + plt_offset);
fe33d2fa
CL		 8686
8687 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8688 {
8689 /* If the Thumb BLX instruction is available, convert
8690 the BL to a BLX instruction to call the ARM-mode
8691 PLT entry. */
8692 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8693 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8694 }
8695 else
8696 {
8697 /* Target the Thumb stub before the ARM PLT entry. */
8698 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8699 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8700 }
8701 *unresolved_reloc_p = FALSE;
8702 }
8703
ba96a88f 8704 relocation = value + signed_addend;
f21f3fe0 8705
252b5132 8706 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8707 + input_section->output_offset
8708 + rel->r_offset);
9a5aca8c 8709
252b5132
RH		 8710 check = relocation >> howto->rightshift;
8711
8712 /* If this is a signed value, the rightshift just dropped
8713 leading 1 bits (assuming twos complement). */
8714 if ((bfd_signed_vma) relocation >= 0)
8715 signed_check = check;
8716 else
8717 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8718
e95de063
MS		 8719 /* Calculate the permissable maximum and minimum values for
8720 this relocation according to whether we're relocating for
8721 Thumb-2 or not. */
8722 bitsize = howto->bitsize;
8723 if (!thumb2)
8724 bitsize -= 2;
f6ebfac0 8725 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 8726 reloc_signed_min = ~reloc_signed_max;
8727
252b5132 8728 /* Assumes two's complement. */
ba96a88f 8729 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 8730 overflow = TRUE;
252b5132 8731
bd97cb95 8732 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 8733 /* For a BLX instruction, make sure that the relocation is rounded up
8734 to a word boundary. This follows the semantics of the instruction
8735 which specifies that bit 1 of the target address will come from bit
8736 1 of the base address. */
8737 relocation = (relocation + 2) & ~ 3;
cb1afa5c 8738
e95de063
MS		 8739 /* Put RELOCATION back into the insn. Assumes two's complement.
8740 We use the Thumb-2 encoding, which is safe even if dealing with
8741 a Thumb-1 instruction by virtue of our overflow check above. */
8742 reloc_sign = (signed_check < 0) ? 1 : 0;
8743 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8744 | ((relocation >> 12) & 0x3ff)
8745 | (reloc_sign << 10);
906e58ca 8746 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 8747 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8748 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8749 | ((relocation >> 1) & 0x7ff);
c62e1cc3 8750
252b5132
RH		 8751 /* Put the relocated value back in the object file: */
8752 bfd_put_16 (input_bfd, upper_insn, hit_data);
8753 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8754
8755 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8756 }
8757 break;
8758
c19d1205
ZW		 8759 case R_ARM_THM_JUMP19:
8760 /* Thumb32 conditional branch instruction. */
8761 {
8762 bfd_vma relocation;
8763 bfd_boolean overflow = FALSE;
8764 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8765 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 8766 bfd_signed_vma reloc_signed_max = 0xffffe;
8767 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 8768 bfd_signed_vma signed_check;
8769
8770 /* Need to refetch the addend, reconstruct the top three bits,
8771 and squish the two 11 bit pieces together. */
8772 if (globals->use_rel)
8773 {
8774 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 8775 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 8776 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8777 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8778 bfd_vma lower = (lower_insn & 0x07ff);
8779
a00a1f35
MS		 8780 upper |= J1 << 6;
8781 upper |= J2 << 7;
8782 upper |= (!S) << 8;
c19d1205
ZW		 8783 upper -= 0x0100; /* Sign extend. */
8784
8785 addend = (upper << 12) | (lower << 1);
8786 signed_addend = addend;
8787 }
8788
bd97cb95 8789 /* Handle calls via the PLT. */
34e77a92 8790 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 8791 {
8792 value = (splt->output_section->vma
8793 + splt->output_offset
34e77a92 8794 + plt_offset);
bd97cb95
DJ		 8795 /* Target the Thumb stub before the ARM PLT entry. */
8796 value -= PLT_THUMB_STUB_SIZE;
8797 *unresolved_reloc_p = FALSE;
8798 }
8799
c19d1205
ZW		 8800 /* ??? Should handle interworking? GCC might someday try to
8801 use this for tail calls. */
8802
8803 relocation = value + signed_addend;
8804 relocation -= (input_section->output_section->vma
8805 + input_section->output_offset
8806 + rel->r_offset);
a00a1f35 8807 signed_check = (bfd_signed_vma) relocation;
c19d1205 8808
c19d1205
ZW		 8809 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8810 overflow = TRUE;
8811
8812 /* Put RELOCATION back into the insn. */
8813 {
8814 bfd_vma S = (relocation & 0x00100000) >> 20;
8815 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8816 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8817 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8818 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8819
a00a1f35 8820 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 8821 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8822 }
8823
8824 /* Put the relocated value back in the object file: */
8825 bfd_put_16 (input_bfd, upper_insn, hit_data);
8826 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8827
8828 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8829 }
8830
8831 case R_ARM_THM_JUMP11:
8832 case R_ARM_THM_JUMP8:
8833 case R_ARM_THM_JUMP6:
51c5503b
NC		 8834 /* Thumb B (branch) instruction). */
8835 {
6cf9e9fe 8836 bfd_signed_vma relocation;
51c5503b
NC		 8837 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8838 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 8839 bfd_signed_vma signed_check;
8840
c19d1205
ZW		 8841 /* CZB cannot jump backward. */
8842 if (r_type == R_ARM_THM_JUMP6)
8843 reloc_signed_min = 0;
8844
4e7fd91e 8845 if (globals->use_rel)
6cf9e9fe 8846 {
4e7fd91e
PB		 8847 /* Need to refetch addend. */
8848 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8849 if (addend & ((howto->src_mask + 1) >> 1))
8850 {
8851 signed_addend = -1;
8852 signed_addend &= ~ howto->src_mask;
8853 signed_addend |= addend;
8854 }
8855 else
8856 signed_addend = addend;
8857 /* The value in the insn has been right shifted. We need to
8858 undo this, so that we can perform the address calculation
8859 in terms of bytes. */
8860 signed_addend <<= howto->rightshift;
6cf9e9fe 8861 }
6cf9e9fe 8862 relocation = value + signed_addend;
51c5503b
NC		 8863
8864 relocation -= (input_section->output_section->vma
8865 + input_section->output_offset
8866 + rel->r_offset);
8867
6cf9e9fe
NC		 8868 relocation >>= howto->rightshift;
8869 signed_check = relocation;
c19d1205
ZW		 8870
8871 if (r_type == R_ARM_THM_JUMP6)
8872 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
8873 else
8874 relocation &= howto->dst_mask;
51c5503b 8875 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 8876
51c5503b
NC		 8877 bfd_put_16 (input_bfd, relocation, hit_data);
8878
8879 /* Assumes two's complement. */
8880 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8881 return bfd_reloc_overflow;
8882
8883 return bfd_reloc_ok;
8884 }
cedb70c5 8885
8375c36b
PB		 8886 case R_ARM_ALU_PCREL7_0:
8887 case R_ARM_ALU_PCREL15_8:
8888 case R_ARM_ALU_PCREL23_15:
8889 {
8890 bfd_vma insn;
8891 bfd_vma relocation;
8892
8893 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 8894 if (globals->use_rel)
8895 {
8896 /* Extract the addend. */
8897 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
8898 signed_addend = addend;
8899 }
8375c36b
PB		 8900 relocation = value + signed_addend;
8901
8902 relocation -= (input_section->output_section->vma
8903 + input_section->output_offset
8904 + rel->r_offset);
8905 insn = (insn & ~0xfff)
8906 | ((howto->bitpos << 7) & 0xf00)
8907 | ((relocation >> howto->bitpos) & 0xff);
8908 bfd_put_32 (input_bfd, value, hit_data);
8909 }
8910 return bfd_reloc_ok;
8911
252b5132
RH		 8912 case R_ARM_GNU_VTINHERIT:
8913 case R_ARM_GNU_VTENTRY:
8914 return bfd_reloc_ok;
8915
c19d1205 8916 case R_ARM_GOTOFF32:
252b5132
RH		 8917 /* Relocation is relative to the start of the
8918 global offset table. */
8919
8920 BFD_ASSERT (sgot != NULL);
8921 if (sgot == NULL)
8922 return bfd_reloc_notsupported;
9a5aca8c 8923
cedb70c5 8924 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 8925 address by one, so that attempts to call the function pointer will
8926 correctly interpret it as Thumb code. */
35fc36a8 8927 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 8928 value += 1;
8929
252b5132
RH		 8930 /* Note that sgot->output_offset is not involved in this
8931 calculation. We always want the start of .got. If we
8932 define _GLOBAL_OFFSET_TABLE in a different way, as is
8933 permitted by the ABI, we might have to change this
9b485d32 8934 calculation. */
252b5132 8935 value -= sgot->output_section->vma;
f21f3fe0 8936 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8937 contents, rel->r_offset, value,
00a97672 8938 rel->r_addend);
252b5132
RH		 8939
8940 case R_ARM_GOTPC:
a7c10850 8941 /* Use global offset table as symbol value. */
252b5132 8942 BFD_ASSERT (sgot != NULL);
f21f3fe0 8943
252b5132
RH		 8944 if (sgot == NULL)
8945 return bfd_reloc_notsupported;
8946
0945cdfd 8947 *unresolved_reloc_p = FALSE;
252b5132 8948 value = sgot->output_section->vma;
f21f3fe0 8949 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 8950 contents, rel->r_offset, value,
00a97672 8951 rel->r_addend);
f21f3fe0 8952
252b5132 8953 case R_ARM_GOT32:
eb043451 8954 case R_ARM_GOT_PREL:
252b5132 8955 /* Relocation is to the entry for this symbol in the
9b485d32 8956 global offset table. */
252b5132
RH		 8957 if (sgot == NULL)
8958 return bfd_reloc_notsupported;
f21f3fe0 8959
34e77a92
RS		 8960 if (dynreloc_st_type == STT_GNU_IFUNC
8961 && plt_offset != (bfd_vma) -1
8962 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
8963 {
8964 /* We have a relocation against a locally-binding STT_GNU_IFUNC
8965 symbol, and the relocation resolves directly to the runtime
8966 target rather than to the .iplt entry. This means that any
8967 .got entry would be the same value as the .igot.plt entry,
8968 so there's no point creating both. */
8969 sgot = globals->root.igotplt;
8970 value = sgot->output_offset + gotplt_offset;
8971 }
8972 else if (h != NULL)
252b5132
RH		 8973 {
8974 bfd_vma off;
f21f3fe0 8975
252b5132
RH		 8976 off = h->got.offset;
8977 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 8978 if ((off & 1) != 0)
252b5132 8979 {
b436d854
RS		 8980 /* We have already processsed one GOT relocation against
8981 this symbol. */
8982 off &= ~1;
8983 if (globals->root.dynamic_sections_created
8984 && !SYMBOL_REFERENCES_LOCAL (info, h))
8985 *unresolved_reloc_p = FALSE;
8986 }
8987 else
8988 {
8989 Elf_Internal_Rela outrel;
8990
8991 if (!SYMBOL_REFERENCES_LOCAL (info, h))
8992 {
8993 /* If the symbol doesn't resolve locally in a static
8994 object, we have an undefined reference. If the
8995 symbol doesn't resolve locally in a dynamic object,
8996 it should be resolved by the dynamic linker. */
8997 if (globals->root.dynamic_sections_created)
8998 {
8999 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9000 *unresolved_reloc_p = FALSE;
9001 }
9002 else
9003 outrel.r_info = 0;
9004 outrel.r_addend = 0;
9005 }
252b5132
RH		 9006 else
9007 {
34e77a92
RS		 9008 if (dynreloc_st_type == STT_GNU_IFUNC)
9009 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9010 else if (info->shared)
9011 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9012 else
9013 outrel.r_info = 0;
9014 outrel.r_addend = dynreloc_value;
b436d854 9015 }
ee29b9fb 9016
b436d854
RS		 9017 /* The GOT entry is initialized to zero by default.
9018 See if we should install a different value. */
9019 if (outrel.r_addend != 0
9020 && (outrel.r_info == 0 || globals->use_rel))
9021 {
9022 bfd_put_32 (output_bfd, outrel.r_addend,
9023 sgot->contents + off);
9024 outrel.r_addend = 0;
252b5132 9025 }
f21f3fe0 9026
b436d854
RS		 9027 if (outrel.r_info != 0)
9028 {
9029 outrel.r_offset = (sgot->output_section->vma
9030 + sgot->output_offset
9031 + off);
9032 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9033 }
9034 h->got.offset |= 1;
9035 }
252b5132
RH		 9036 value = sgot->output_offset + off;
9037 }
9038 else
9039 {
9040 bfd_vma off;
f21f3fe0 9041
252b5132
RH		 9042 BFD_ASSERT (local_got_offsets != NULL &&
9043 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9044
252b5132 9045 off = local_got_offsets[r_symndx];
f21f3fe0 9046
252b5132
RH		 9047 /* The offset must always be a multiple of 4. We use the
9048 least significant bit to record whether we have already
9b485d32 9049 generated the necessary reloc. */
252b5132
RH		 9050 if ((off & 1) != 0)
9051 off &= ~1;
9052 else
9053 {
00a97672 9054 if (globals->use_rel)
34e77a92 9055 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9056
34e77a92 9057 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9058 {
947216bf 9059 Elf_Internal_Rela outrel;
f21f3fe0 9060
34e77a92 9061 outrel.r_addend = addend + dynreloc_value;
252b5132 9062 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9063 + sgot->output_offset
252b5132 9064 + off);
34e77a92
RS		 9065 if (dynreloc_st_type == STT_GNU_IFUNC)
9066 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9067 else
9068 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9069 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9070 }
f21f3fe0 9071
252b5132
RH		 9072 local_got_offsets[r_symndx] |= 1;
9073 }
f21f3fe0 9074
252b5132
RH		 9075 value = sgot->output_offset + off;
9076 }
eb043451
PB		 9077 if (r_type != R_ARM_GOT32)
9078 value += sgot->output_section->vma;
9a5aca8c 9079
f21f3fe0 9080 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9081 contents, rel->r_offset, value,
00a97672 9082 rel->r_addend);
f21f3fe0 9083
ba93b8ac
DJ		 9084 case R_ARM_TLS_LDO32:
9085 value = value - dtpoff_base (info);
9086
9087 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9088 contents, rel->r_offset, value,
9089 rel->r_addend);
ba93b8ac
DJ		 9090
9091 case R_ARM_TLS_LDM32:
9092 {
9093 bfd_vma off;
9094
362d30a1 9095 if (sgot == NULL)
ba93b8ac
DJ		 9096 abort ();
9097
9098 off = globals->tls_ldm_got.offset;
9099
9100 if ((off & 1) != 0)
9101 off &= ~1;
9102 else
9103 {
9104 /* If we don't know the module number, create a relocation
9105 for it. */
9106 if (info->shared)
9107 {
9108 Elf_Internal_Rela outrel;
ba93b8ac 9109
362d30a1 9110 if (srelgot == NULL)
ba93b8ac
DJ		 9111 abort ();
9112
00a97672 9113 outrel.r_addend = 0;
362d30a1
RS		 9114 outrel.r_offset = (sgot->output_section->vma
9115 + sgot->output_offset + off);
ba93b8ac
DJ		 9116 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9117
00a97672
RS		 9118 if (globals->use_rel)
9119 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9120 sgot->contents + off);
ba93b8ac 9121
47beaa6a 9122 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9123 }
9124 else
362d30a1 9125 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9126
9127 globals->tls_ldm_got.offset |= 1;
9128 }
9129
362d30a1 9130 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9131 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9132
9133 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9134 contents, rel->r_offset, value,
00a97672 9135 rel->r_addend);
ba93b8ac
DJ		 9136 }
9137
0855e32b
NS		 9138 case R_ARM_TLS_CALL:
9139 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9140 case R_ARM_TLS_GD32:
9141 case R_ARM_TLS_IE32:
0855e32b
NS		 9142 case R_ARM_TLS_GOTDESC:
9143 case R_ARM_TLS_DESCSEQ:
9144 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9145 {
0855e32b
NS		 9146 bfd_vma off, offplt;
9147 int indx = 0;
ba93b8ac
DJ		 9148 char tls_type;
9149
0855e32b 9150 BFD_ASSERT (sgot != NULL);
ba93b8ac 9151
ba93b8ac
DJ		 9152 if (h != NULL)
9153 {
9154 bfd_boolean dyn;
9155 dyn = globals->root.dynamic_sections_created;
9156 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9157 && (!info->shared
9158 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9159 {
9160 *unresolved_reloc_p = FALSE;
9161 indx = h->dynindx;
9162 }
9163 off = h->got.offset;
0855e32b 9164 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9165 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9166 }
9167 else
9168 {
0855e32b 9169 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9170 off = local_got_offsets[r_symndx];
0855e32b 9171 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9172 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9173 }
9174
0855e32b
NS		 9175 /* Linker relaxations happens from one of the
9176 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9177 if (ELF32_R_TYPE(rel->r_info) != r_type)
9178 tls_type = GOT_TLS_IE;
9179
9180 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9181
9182 if ((off & 1) != 0)
9183 off &= ~1;
9184 else
9185 {
9186 bfd_boolean need_relocs = FALSE;
9187 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9188 int cur_off = off;
9189
9190 /* The GOT entries have not been initialized yet. Do it
9191 now, and emit any relocations. If both an IE GOT and a
9192 GD GOT are necessary, we emit the GD first. */
9193
9194 if ((info->shared || indx != 0)
9195 && (h == NULL
9196 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9197 || h->root.type != bfd_link_hash_undefweak))
9198 {
9199 need_relocs = TRUE;
0855e32b 9200 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9201 }
9202
0855e32b
NS		 9203 if (tls_type & GOT_TLS_GDESC)
9204 {
47beaa6a
RS		 9205 bfd_byte *loc;
9206
0855e32b
NS		 9207 /* We should have relaxed, unless this is an undefined
9208 weak symbol. */
9209 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9210 || info->shared);
9211 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9212 <= globals->root.sgotplt->size);
9213
9214 outrel.r_addend = 0;
9215 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9216 + globals->root.sgotplt->output_offset
9217 + offplt
9218 + globals->sgotplt_jump_table_size);
9219
9220 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9221 sreloc = globals->root.srelplt;
9222 loc = sreloc->contents;
9223 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9224 BFD_ASSERT (loc + RELOC_SIZE (globals)
9225 <= sreloc->contents + sreloc->size);
9226
9227 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9228
9229 /* For globals, the first word in the relocation gets
9230 the relocation index and the top bit set, or zero,
9231 if we're binding now. For locals, it gets the
9232 symbol's offset in the tls section. */
9233 bfd_put_32 (output_bfd,
9234 !h ? value - elf_hash_table (info)->tls_sec->vma
9235 : info->flags & DF_BIND_NOW ? 0
9236 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9237 globals->root.sgotplt->contents + offplt +
9238 globals->sgotplt_jump_table_size);
9239
9240 /* Second word in the relocation is always zero. */
9241 bfd_put_32 (output_bfd, 0,
9242 globals->root.sgotplt->contents + offplt +
9243 globals->sgotplt_jump_table_size + 4);
9244 }
ba93b8ac
DJ		 9245 if (tls_type & GOT_TLS_GD)
9246 {
9247 if (need_relocs)
9248 {
00a97672 9249 outrel.r_addend = 0;
362d30a1
RS		 9250 outrel.r_offset = (sgot->output_section->vma
9251 + sgot->output_offset
00a97672 9252 + cur_off);
ba93b8ac 9253 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9254
00a97672
RS		 9255 if (globals->use_rel)
9256 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9257 sgot->contents + cur_off);
00a97672 9258
47beaa6a 9259 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9260
9261 if (indx == 0)
9262 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9263 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9264 else
9265 {
00a97672 9266 outrel.r_addend = 0;
ba93b8ac
DJ		 9267 outrel.r_info = ELF32_R_INFO (indx,
9268 R_ARM_TLS_DTPOFF32);
9269 outrel.r_offset += 4;
00a97672
RS		 9270
9271 if (globals->use_rel)
9272 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9273 sgot->contents + cur_off + 4);
00a97672 9274
47beaa6a
RS		 9275 elf32_arm_add_dynreloc (output_bfd, info,
9276 srelgot, &outrel);
ba93b8ac
DJ		 9277 }
9278 }
9279 else
9280 {
9281 /* If we are not emitting relocations for a
9282 general dynamic reference, then we must be in a
9283 static link or an executable link with the
9284 symbol binding locally. Mark it as belonging
9285 to module 1, the executable. */
9286 bfd_put_32 (output_bfd, 1,
362d30a1 9287 sgot->contents + cur_off);
ba93b8ac 9288 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9289 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9290 }
9291
9292 cur_off += 8;
9293 }
9294
9295 if (tls_type & GOT_TLS_IE)
9296 {
9297 if (need_relocs)
9298 {
00a97672
RS		 9299 if (indx == 0)
9300 outrel.r_addend = value - dtpoff_base (info);
9301 else
9302 outrel.r_addend = 0;
362d30a1
RS		 9303 outrel.r_offset = (sgot->output_section->vma
9304 + sgot->output_offset
ba93b8ac
DJ		 9305 + cur_off);
9306 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9307
00a97672
RS		 9308 if (globals->use_rel)
9309 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9310 sgot->contents + cur_off);
ba93b8ac 9311
47beaa6a 9312 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9313 }
9314 else
9315 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9316 sgot->contents + cur_off);
ba93b8ac
DJ		 9317 cur_off += 4;
9318 }
9319
9320 if (h != NULL)
9321 h->got.offset |= 1;
9322 else
9323 local_got_offsets[r_symndx] |= 1;
9324 }
9325
9326 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9327 off += 8;
0855e32b
NS		 9328 else if (tls_type & GOT_TLS_GDESC)
9329 off = offplt;
9330
9331 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9332 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9333 {
9334 bfd_signed_vma offset;
12352d3f
PB		 9335 /* TLS stubs are arm mode. The original symbol is a
9336 data object, so branch_type is bogus. */
9337 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9338 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9339 = arm_type_of_stub (info, input_section, rel,
9340 st_type, &branch_type,
0855e32b
NS		 9341 (struct elf32_arm_link_hash_entry *)h,
9342 globals->tls_trampoline, globals->root.splt,
9343 input_bfd, sym_name);
9344
9345 if (stub_type != arm_stub_none)
9346 {
9347 struct elf32_arm_stub_hash_entry *stub_entry
9348 = elf32_arm_get_stub_entry
9349 (input_section, globals->root.splt, 0, rel,
9350 globals, stub_type);
9351 offset = (stub_entry->stub_offset
9352 + stub_entry->stub_sec->output_offset
9353 + stub_entry->stub_sec->output_section->vma);
9354 }
9355 else
9356 offset = (globals->root.splt->output_section->vma
9357 + globals->root.splt->output_offset
9358 + globals->tls_trampoline);
9359
9360 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9361 {
9362 unsigned long inst;
9363
9364 offset -= (input_section->output_section->vma +
9365 input_section->output_offset + rel->r_offset + 8);
9366
9367 inst = offset >> 2;
9368 inst &= 0x00ffffff;
9369 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9370 }
9371 else
9372 {
9373 /* Thumb blx encodes the offset in a complicated
9374 fashion. */
9375 unsigned upper_insn, lower_insn;
9376 unsigned neg;
9377
9378 offset -= (input_section->output_section->vma +
9379 input_section->output_offset
9380 + rel->r_offset + 4);
9381
12352d3f
PB		 9382 if (stub_type != arm_stub_none
9383 && arm_stub_is_thumb (stub_type))
9384 {
9385 lower_insn = 0xd000;
9386 }
9387 else
9388 {
9389 lower_insn = 0xc000;
9390 /* Round up the offset to a word boundary */
9391 offset = (offset + 2) & ~2;
9392 }
9393
0855e32b
NS		 9394 neg = offset < 0;
9395 upper_insn = (0xf000
9396 | ((offset >> 12) & 0x3ff)
9397 | (neg << 10));
12352d3f 9398 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9399 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9400 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9401 bfd_put_16 (input_bfd, upper_insn, hit_data);
9402 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9403 return bfd_reloc_ok;
9404 }
9405 }
9406 /* These relocations needs special care, as besides the fact
9407 they point somewhere in .gotplt, the addend must be
9408 adjusted accordingly depending on the type of instruction
9409 we refer to */
9410 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9411 {
9412 unsigned long data, insn;
9413 unsigned thumb;
9414
9415 data = bfd_get_32 (input_bfd, hit_data);
9416 thumb = data & 1;
9417 data &= ~1u;
9418
9419 if (thumb)
9420 {
9421 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9422 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9423 insn = (insn << 16)
9424 | bfd_get_16 (input_bfd,
9425 contents + rel->r_offset - data + 2);
9426 if ((insn & 0xf800c000) == 0xf000c000)
9427 /* bl/blx */
9428 value = -6;
9429 else if ((insn & 0xffffff00) == 0x4400)
9430 /* add */
9431 value = -5;
9432 else
9433 {
9434 (*_bfd_error_handler)
9435 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9436 input_bfd, input_section,
9437 (unsigned long)rel->r_offset, insn);
9438 return bfd_reloc_notsupported;
9439 }
9440 }
9441 else
9442 {
9443 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9444
9445 switch (insn >> 24)
9446 {
9447 case 0xeb: /* bl */
9448 case 0xfa: /* blx */
9449 value = -4;
9450 break;
9451
9452 case 0xe0: /* add */
9453 value = -8;
9454 break;
9455
9456 default:
9457 (*_bfd_error_handler)
9458 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9459 input_bfd, input_section,
9460 (unsigned long)rel->r_offset, insn);
9461 return bfd_reloc_notsupported;
9462 }
9463 }
9464
9465 value += ((globals->root.sgotplt->output_section->vma
9466 + globals->root.sgotplt->output_offset + off)
9467 - (input_section->output_section->vma
9468 + input_section->output_offset
9469 + rel->r_offset)
9470 + globals->sgotplt_jump_table_size);
9471 }
9472 else
9473 value = ((globals->root.sgot->output_section->vma
9474 + globals->root.sgot->output_offset + off)
9475 - (input_section->output_section->vma
9476 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9477
9478 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9479 contents, rel->r_offset, value,
00a97672 9480 rel->r_addend);
ba93b8ac
DJ		 9481 }
9482
9483 case R_ARM_TLS_LE32:
9ec0c936 9484 if (info->shared && !info->pie)
ba93b8ac
DJ		 9485 {
9486 (*_bfd_error_handler)
9487 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9488 input_bfd, input_section,
9489 (long) rel->r_offset, howto->name);
21d799b5 9490 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 9491 }
9492 else
9493 value = tpoff (info, value);
906e58ca 9494
ba93b8ac 9495 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9496 contents, rel->r_offset, value,
9497 rel->r_addend);
ba93b8ac 9498
319850b4
JB		 9499 case R_ARM_V4BX:
9500 if (globals->fix_v4bx)
845b51d6
PB		 9501 {
9502 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9503
845b51d6
PB		 9504 /* Ensure that we have a BX instruction. */
9505 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9506
845b51d6
PB		 9507 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9508 {
9509 /* Branch to veneer. */
9510 bfd_vma glue_addr;
9511 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9512 glue_addr -= input_section->output_section->vma
9513 + input_section->output_offset
9514 + rel->r_offset + 8;
9515 insn = (insn & 0xf0000000) | 0x0a000000
9516 | ((glue_addr >> 2) & 0x00ffffff);
9517 }
9518 else
9519 {
9520 /* Preserve Rm (lowest four bits) and the condition code
9521 (highest four bits). Other bits encode MOV PC,Rm. */
9522 insn = (insn & 0xf000000f) | 0x01a0f000;
9523 }
319850b4 9524
845b51d6
PB		 9525 bfd_put_32 (input_bfd, insn, hit_data);
9526 }
319850b4
JB		 9527 return bfd_reloc_ok;
9528
b6895b4f
PB		 9529 case R_ARM_MOVW_ABS_NC:
9530 case R_ARM_MOVT_ABS:
9531 case R_ARM_MOVW_PREL_NC:
9532 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9533 /* Until we properly support segment-base-relative addressing then
9534 we assume the segment base to be zero, as for the group relocations.
9535 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9536 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9537 case R_ARM_MOVW_BREL_NC:
9538 case R_ARM_MOVW_BREL:
9539 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9540 {
9541 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9542
9543 if (globals->use_rel)
9544 {
9545 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9546 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9547 }
92f5d02b 9548
b6895b4f 9549 value += signed_addend;
b6895b4f
PB		 9550
9551 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9552 value -= (input_section->output_section->vma
9553 + input_section->output_offset + rel->r_offset);
9554
92f5d02b
MS		 9555 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9556 return bfd_reloc_overflow;
9557
35fc36a8 9558 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9559 value |= 1;
9560
9561 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9562 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9563 value >>= 16;
9564
9565 insn &= 0xfff0f000;
9566 insn |= value & 0xfff;
9567 insn |= (value & 0xf000) << 4;
9568 bfd_put_32 (input_bfd, insn, hit_data);
9569 }
9570 return bfd_reloc_ok;
9571
9572 case R_ARM_THM_MOVW_ABS_NC:
9573 case R_ARM_THM_MOVT_ABS:
9574 case R_ARM_THM_MOVW_PREL_NC:
9575 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9576 /* Until we properly support segment-base-relative addressing then
9577 we assume the segment base to be zero, as for the above relocations.
9578 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9579 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9580 as R_ARM_THM_MOVT_ABS. */
9581 case R_ARM_THM_MOVW_BREL_NC:
9582 case R_ARM_THM_MOVW_BREL:
9583 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9584 {
9585 bfd_vma insn;
906e58ca 9586
b6895b4f
PB		 9587 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9588 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9589
9590 if (globals->use_rel)
9591 {
9592 addend = ((insn >> 4) & 0xf000)
9593 | ((insn >> 15) & 0x0800)
9594 | ((insn >> 4) & 0x0700)
9595 | (insn & 0x00ff);
39623e12 9596 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9597 }
92f5d02b 9598
b6895b4f 9599 value += signed_addend;
b6895b4f
PB		 9600
9601 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9602 value -= (input_section->output_section->vma
9603 + input_section->output_offset + rel->r_offset);
9604
92f5d02b
MS		 9605 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9606 return bfd_reloc_overflow;
9607
35fc36a8 9608 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9609 value |= 1;
9610
9611 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9612 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9613 value >>= 16;
9614
9615 insn &= 0xfbf08f00;
9616 insn |= (value & 0xf000) << 4;
9617 insn |= (value & 0x0800) << 15;
9618 insn |= (value & 0x0700) << 4;
9619 insn |= (value & 0x00ff);
9620
9621 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9622 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9623 }
9624 return bfd_reloc_ok;
9625
4962c51a
MS		 9626 case R_ARM_ALU_PC_G0_NC:
9627 case R_ARM_ALU_PC_G1_NC:
9628 case R_ARM_ALU_PC_G0:
9629 case R_ARM_ALU_PC_G1:
9630 case R_ARM_ALU_PC_G2:
9631 case R_ARM_ALU_SB_G0_NC:
9632 case R_ARM_ALU_SB_G1_NC:
9633 case R_ARM_ALU_SB_G0:
9634 case R_ARM_ALU_SB_G1:
9635 case R_ARM_ALU_SB_G2:
9636 {
9637 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9638 bfd_vma pc = input_section->output_section->vma
9639 + input_section->output_offset + rel->r_offset;
9640 /* sb should be the origin of the *segment* containing the symbol.
9641 It is not clear how to obtain this OS-dependent value, so we
9642 make an arbitrary choice of zero. */
9643 bfd_vma sb = 0;
9644 bfd_vma residual;
9645 bfd_vma g_n;
9646 bfd_signed_vma signed_value;
9647 int group = 0;
9648
9649 /* Determine which group of bits to select. */
9650 switch (r_type)
9651 {
9652 case R_ARM_ALU_PC_G0_NC:
9653 case R_ARM_ALU_PC_G0:
9654 case R_ARM_ALU_SB_G0_NC:
9655 case R_ARM_ALU_SB_G0:
9656 group = 0;
9657 break;
9658
9659 case R_ARM_ALU_PC_G1_NC:
9660 case R_ARM_ALU_PC_G1:
9661 case R_ARM_ALU_SB_G1_NC:
9662 case R_ARM_ALU_SB_G1:
9663 group = 1;
9664 break;
9665
9666 case R_ARM_ALU_PC_G2:
9667 case R_ARM_ALU_SB_G2:
9668 group = 2;
9669 break;
9670
9671 default:
906e58ca 9672 abort ();
4962c51a
MS		 9673 }
9674
9675 /* If REL, extract the addend from the insn. If RELA, it will
9676 have already been fetched for us. */
9677 if (globals->use_rel)
9678 {
9679 int negative;
9680 bfd_vma constant = insn & 0xff;
9681 bfd_vma rotation = (insn & 0xf00) >> 8;
9682
9683 if (rotation == 0)
9684 signed_addend = constant;
9685 else
9686 {
9687 /* Compensate for the fact that in the instruction, the
9688 rotation is stored in multiples of 2 bits. */
9689 rotation *= 2;
9690
9691 /* Rotate "constant" right by "rotation" bits. */
9692 signed_addend = (constant >> rotation) |
9693 (constant << (8 * sizeof (bfd_vma) - rotation));
9694 }
9695
9696 /* Determine if the instruction is an ADD or a SUB.
9697 (For REL, this determines the sign of the addend.) */
9698 negative = identify_add_or_sub (insn);
9699 if (negative == 0)
9700 {
9701 (*_bfd_error_handler)
9702 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9703 input_bfd, input_section,
9704 (long) rel->r_offset, howto->name);
906e58ca 9705 return bfd_reloc_overflow;
4962c51a
MS		 9706 }
9707
9708 signed_addend *= negative;
9709 }
9710
9711 /* Compute the value (X) to go in the place. */
9712 if (r_type == R_ARM_ALU_PC_G0_NC
9713 || r_type == R_ARM_ALU_PC_G1_NC
9714 || r_type == R_ARM_ALU_PC_G0
9715 || r_type == R_ARM_ALU_PC_G1
9716 || r_type == R_ARM_ALU_PC_G2)
9717 /* PC relative. */
9718 signed_value = value - pc + signed_addend;
9719 else
9720 /* Section base relative. */
9721 signed_value = value - sb + signed_addend;
9722
9723 /* If the target symbol is a Thumb function, then set the
9724 Thumb bit in the address. */
35fc36a8 9725 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 9726 signed_value |= 1;
9727
9728 /* Calculate the value of the relevant G_n, in encoded
9729 constant-with-rotation format. */
9730 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9731 &residual);
9732
9733 /* Check for overflow if required. */
9734 if ((r_type == R_ARM_ALU_PC_G0
9735 || r_type == R_ARM_ALU_PC_G1
9736 || r_type == R_ARM_ALU_PC_G2
9737 || r_type == R_ARM_ALU_SB_G0
9738 || r_type == R_ARM_ALU_SB_G1
9739 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9740 {
9741 (*_bfd_error_handler)
9742 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9743 input_bfd, input_section,
9744 (long) rel->r_offset, abs (signed_value), howto->name);
9745 return bfd_reloc_overflow;
9746 }
9747
9748 /* Mask out the value and the ADD/SUB part of the opcode; take care
9749 not to destroy the S bit. */
9750 insn &= 0xff1ff000;
9751
9752 /* Set the opcode according to whether the value to go in the
9753 place is negative. */
9754 if (signed_value < 0)
9755 insn |= 1 << 22;
9756 else
9757 insn |= 1 << 23;
9758
9759 /* Encode the offset. */
9760 insn |= g_n;
9761
9762 bfd_put_32 (input_bfd, insn, hit_data);
9763 }
9764 return bfd_reloc_ok;
9765
9766 case R_ARM_LDR_PC_G0:
9767 case R_ARM_LDR_PC_G1:
9768 case R_ARM_LDR_PC_G2:
9769 case R_ARM_LDR_SB_G0:
9770 case R_ARM_LDR_SB_G1:
9771 case R_ARM_LDR_SB_G2:
9772 {
9773 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9774 bfd_vma pc = input_section->output_section->vma
9775 + input_section->output_offset + rel->r_offset;
9776 bfd_vma sb = 0; /* See note above. */
9777 bfd_vma residual;
9778 bfd_signed_vma signed_value;
9779 int group = 0;
9780
9781 /* Determine which groups of bits to calculate. */
9782 switch (r_type)
9783 {
9784 case R_ARM_LDR_PC_G0:
9785 case R_ARM_LDR_SB_G0:
9786 group = 0;
9787 break;
9788
9789 case R_ARM_LDR_PC_G1:
9790 case R_ARM_LDR_SB_G1:
9791 group = 1;
9792 break;
9793
9794 case R_ARM_LDR_PC_G2:
9795 case R_ARM_LDR_SB_G2:
9796 group = 2;
9797 break;
9798
9799 default:
906e58ca 9800 abort ();
4962c51a
MS		 9801 }
9802
9803 /* If REL, extract the addend from the insn. If RELA, it will
9804 have already been fetched for us. */
9805 if (globals->use_rel)
9806 {
9807 int negative = (insn & (1 << 23)) ? 1 : -1;
9808 signed_addend = negative * (insn & 0xfff);
9809 }
9810
9811 /* Compute the value (X) to go in the place. */
9812 if (r_type == R_ARM_LDR_PC_G0
9813 || r_type == R_ARM_LDR_PC_G1
9814 || r_type == R_ARM_LDR_PC_G2)
9815 /* PC relative. */
9816 signed_value = value - pc + signed_addend;
9817 else
9818 /* Section base relative. */
9819 signed_value = value - sb + signed_addend;
9820
9821 /* Calculate the value of the relevant G_{n-1} to obtain
9822 the residual at that stage. */
9823 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9824
9825 /* Check for overflow. */
9826 if (residual >= 0x1000)
9827 {
9828 (*_bfd_error_handler)
9829 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9830 input_bfd, input_section,
9831 (long) rel->r_offset, abs (signed_value), howto->name);
9832 return bfd_reloc_overflow;
9833 }
9834
9835 /* Mask out the value and U bit. */
9836 insn &= 0xff7ff000;
9837
9838 /* Set the U bit if the value to go in the place is non-negative. */
9839 if (signed_value >= 0)
9840 insn |= 1 << 23;
9841
9842 /* Encode the offset. */
9843 insn |= residual;
9844
9845 bfd_put_32 (input_bfd, insn, hit_data);
9846 }
9847 return bfd_reloc_ok;
9848
9849 case R_ARM_LDRS_PC_G0:
9850 case R_ARM_LDRS_PC_G1:
9851 case R_ARM_LDRS_PC_G2:
9852 case R_ARM_LDRS_SB_G0:
9853 case R_ARM_LDRS_SB_G1:
9854 case R_ARM_LDRS_SB_G2:
9855 {
9856 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9857 bfd_vma pc = input_section->output_section->vma
9858 + input_section->output_offset + rel->r_offset;
9859 bfd_vma sb = 0; /* See note above. */
9860 bfd_vma residual;
9861 bfd_signed_vma signed_value;
9862 int group = 0;
9863
9864 /* Determine which groups of bits to calculate. */
9865 switch (r_type)
9866 {
9867 case R_ARM_LDRS_PC_G0:
9868 case R_ARM_LDRS_SB_G0:
9869 group = 0;
9870 break;
9871
9872 case R_ARM_LDRS_PC_G1:
9873 case R_ARM_LDRS_SB_G1:
9874 group = 1;
9875 break;
9876
9877 case R_ARM_LDRS_PC_G2:
9878 case R_ARM_LDRS_SB_G2:
9879 group = 2;
9880 break;
9881
9882 default:
906e58ca 9883 abort ();
4962c51a
MS		 9884 }
9885
9886 /* If REL, extract the addend from the insn. If RELA, it will
9887 have already been fetched for us. */
9888 if (globals->use_rel)
9889 {
9890 int negative = (insn & (1 << 23)) ? 1 : -1;
9891 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
9892 }
9893
9894 /* Compute the value (X) to go in the place. */
9895 if (r_type == R_ARM_LDRS_PC_G0
9896 || r_type == R_ARM_LDRS_PC_G1
9897 || r_type == R_ARM_LDRS_PC_G2)
9898 /* PC relative. */
9899 signed_value = value - pc + signed_addend;
9900 else
9901 /* Section base relative. */
9902 signed_value = value - sb + signed_addend;
9903
9904 /* Calculate the value of the relevant G_{n-1} to obtain
9905 the residual at that stage. */
9906 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9907
9908 /* Check for overflow. */
9909 if (residual >= 0x100)
9910 {
9911 (*_bfd_error_handler)
9912 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9913 input_bfd, input_section,
9914 (long) rel->r_offset, abs (signed_value), howto->name);
9915 return bfd_reloc_overflow;
9916 }
9917
9918 /* Mask out the value and U bit. */
9919 insn &= 0xff7ff0f0;
9920
9921 /* Set the U bit if the value to go in the place is non-negative. */
9922 if (signed_value >= 0)
9923 insn |= 1 << 23;
9924
9925 /* Encode the offset. */
9926 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
9927
9928 bfd_put_32 (input_bfd, insn, hit_data);
9929 }
9930 return bfd_reloc_ok;
9931
9932 case R_ARM_LDC_PC_G0:
9933 case R_ARM_LDC_PC_G1:
9934 case R_ARM_LDC_PC_G2:
9935 case R_ARM_LDC_SB_G0:
9936 case R_ARM_LDC_SB_G1:
9937 case R_ARM_LDC_SB_G2:
9938 {
9939 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9940 bfd_vma pc = input_section->output_section->vma
9941 + input_section->output_offset + rel->r_offset;
9942 bfd_vma sb = 0; /* See note above. */
9943 bfd_vma residual;
9944 bfd_signed_vma signed_value;
9945 int group = 0;
9946
9947 /* Determine which groups of bits to calculate. */
9948 switch (r_type)
9949 {
9950 case R_ARM_LDC_PC_G0:
9951 case R_ARM_LDC_SB_G0:
9952 group = 0;
9953 break;
9954
9955 case R_ARM_LDC_PC_G1:
9956 case R_ARM_LDC_SB_G1:
9957 group = 1;
9958 break;
9959
9960 case R_ARM_LDC_PC_G2:
9961 case R_ARM_LDC_SB_G2:
9962 group = 2;
9963 break;
9964
9965 default:
906e58ca 9966 abort ();
4962c51a
MS		 9967 }
9968
9969 /* If REL, extract the addend from the insn. If RELA, it will
9970 have already been fetched for us. */
9971 if (globals->use_rel)
9972 {
9973 int negative = (insn & (1 << 23)) ? 1 : -1;
9974 signed_addend = negative * ((insn & 0xff) << 2);
9975 }
9976
9977 /* Compute the value (X) to go in the place. */
9978 if (r_type == R_ARM_LDC_PC_G0
9979 || r_type == R_ARM_LDC_PC_G1
9980 || r_type == R_ARM_LDC_PC_G2)
9981 /* PC relative. */
9982 signed_value = value - pc + signed_addend;
9983 else
9984 /* Section base relative. */
9985 signed_value = value - sb + signed_addend;
9986
9987 /* Calculate the value of the relevant G_{n-1} to obtain
9988 the residual at that stage. */
9989 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9990
9991 /* Check for overflow. (The absolute value to go in the place must be
9992 divisible by four and, after having been divided by four, must
9993 fit in eight bits.) */
9994 if ((residual & 0x3) != 0 || residual >= 0x400)
9995 {
9996 (*_bfd_error_handler)
9997 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9998 input_bfd, input_section,
9999 (long) rel->r_offset, abs (signed_value), howto->name);
10000 return bfd_reloc_overflow;
10001 }
10002
10003 /* Mask out the value and U bit. */
10004 insn &= 0xff7fff00;
10005
10006 /* Set the U bit if the value to go in the place is non-negative. */
10007 if (signed_value >= 0)
10008 insn |= 1 << 23;
10009
10010 /* Encode the offset. */
10011 insn |= residual >> 2;
10012
10013 bfd_put_32 (input_bfd, insn, hit_data);
10014 }
10015 return bfd_reloc_ok;
10016
252b5132
RH		 10017 default:
10018 return bfd_reloc_notsupported;
10019 }
10020}
10021
98c1d4aa
NC		 10022/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10023static void
57e8b36a
NC		 10024arm_add_to_rel (bfd * abfd,
10025 bfd_byte * address,
10026 reloc_howto_type * howto,
10027 bfd_signed_vma increment)
98c1d4aa 10028{
98c1d4aa
NC		 10029 bfd_signed_vma addend;
10030
bd97cb95
DJ		 10031 if (howto->type == R_ARM_THM_CALL
10032 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10033 {
9a5aca8c
AM		 10034 int upper_insn, lower_insn;
10035 int upper, lower;
98c1d4aa 10036
9a5aca8c
AM		 10037 upper_insn = bfd_get_16 (abfd, address);
10038 lower_insn = bfd_get_16 (abfd, address + 2);
10039 upper = upper_insn & 0x7ff;
10040 lower = lower_insn & 0x7ff;
10041
10042 addend = (upper << 12) | (lower << 1);
ddda4409 10043 addend += increment;
9a5aca8c 10044 addend >>= 1;
98c1d4aa 10045
9a5aca8c
AM		 10046 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10047 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10048
dc810e39
AM		 10049 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10050 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10051 }
10052 else
10053 {
10054 bfd_vma contents;
10055
10056 contents = bfd_get_32 (abfd, address);
10057
10058 /* Get the (signed) value from the instruction. */
10059 addend = contents & howto->src_mask;
10060 if (addend & ((howto->src_mask + 1) >> 1))
10061 {
10062 bfd_signed_vma mask;
10063
10064 mask = -1;
10065 mask &= ~ howto->src_mask;
10066 addend |= mask;
10067 }
10068
10069 /* Add in the increment, (which is a byte value). */
10070 switch (howto->type)
10071 {
10072 default:
10073 addend += increment;
10074 break;
10075
10076 case R_ARM_PC24:
c6596c5e 10077 case R_ARM_PLT32:
5b5bb741
PB		 10078 case R_ARM_CALL:
10079 case R_ARM_JUMP24:
9a5aca8c 10080 addend <<= howto->size;
dc810e39 10081 addend += increment;
9a5aca8c
AM		 10082
10083 /* Should we check for overflow here ? */
10084
10085 /* Drop any undesired bits. */
10086 addend >>= howto->rightshift;
10087 break;
10088 }
10089
10090 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10091
10092 bfd_put_32 (abfd, contents, address);
ddda4409 10093 }
98c1d4aa 10094}
252b5132 10095
ba93b8ac
DJ		 10096#define IS_ARM_TLS_RELOC(R_TYPE) \
10097 ((R_TYPE) == R_ARM_TLS_GD32 \
10098 || (R_TYPE) == R_ARM_TLS_LDO32 \
10099 || (R_TYPE) == R_ARM_TLS_LDM32 \
10100 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10101 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10102 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10103 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10104 || (R_TYPE) == R_ARM_TLS_IE32 \
10105 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10106
10107/* Specific set of relocations for the gnu tls dialect. */
10108#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10109 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10110 || (R_TYPE) == R_ARM_TLS_CALL \
10111 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10112 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10113 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10114
252b5132 10115/* Relocate an ARM ELF section. */
906e58ca 10116
b34976b6 10117static bfd_boolean
57e8b36a
NC		 10118elf32_arm_relocate_section (bfd * output_bfd,
10119 struct bfd_link_info * info,
10120 bfd * input_bfd,
10121 asection * input_section,
10122 bfd_byte * contents,
10123 Elf_Internal_Rela * relocs,
10124 Elf_Internal_Sym * local_syms,
10125 asection ** local_sections)
252b5132 10126{
b34976b6
AM		 10127 Elf_Internal_Shdr *symtab_hdr;
10128 struct elf_link_hash_entry **sym_hashes;
10129 Elf_Internal_Rela *rel;
10130 Elf_Internal_Rela *relend;
10131 const char *name;
b32d3aa2 10132 struct elf32_arm_link_hash_table * globals;
252b5132 10133
4e7fd91e 10134 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10135 if (globals == NULL)
10136 return FALSE;
b491616a 10137
0ffa91dd 10138 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10139 sym_hashes = elf_sym_hashes (input_bfd);
10140
10141 rel = relocs;
10142 relend = relocs + input_section->reloc_count;
10143 for (; rel < relend; rel++)
10144 {
ba96a88f
NC		 10145 int r_type;
10146 reloc_howto_type * howto;
10147 unsigned long r_symndx;
10148 Elf_Internal_Sym * sym;
10149 asection * sec;
252b5132 10150 struct elf_link_hash_entry * h;
ba96a88f
NC		 10151 bfd_vma relocation;
10152 bfd_reloc_status_type r;
10153 arelent bfd_reloc;
ba93b8ac 10154 char sym_type;
0945cdfd 10155 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10156 char *error_message = NULL;
f21f3fe0 10157
252b5132 10158 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10159 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10160 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10161
ba96a88f
NC		 10162 if ( r_type == R_ARM_GNU_VTENTRY
10163 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 10164 continue;
10165
b32d3aa2 10166 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10167 howto = bfd_reloc.howto;
252b5132 10168
252b5132
RH		 10169 h = NULL;
10170 sym = NULL;
10171 sec = NULL;
9b485d32 10172
252b5132
RH		 10173 if (r_symndx < symtab_hdr->sh_info)
10174 {
10175 sym = local_syms + r_symndx;
ba93b8ac 10176 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10177 sec = local_sections[r_symndx];
ffcb4889
NS		 10178
10179 /* An object file might have a reference to a local
10180 undefined symbol. This is a daft object file, but we
10181 should at least do something about it. V4BX & NONE
10182 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10183 allowed to use the undefined symbol, so allow those.
10184 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10185 if (r_type != R_ARM_V4BX
10186 && r_type != R_ARM_NONE
77b4f08f 10187 && r_symndx != STN_UNDEF
ffcb4889
NS		 10188 && bfd_is_und_section (sec)
10189 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10190 {
10191 if (!info->callbacks->undefined_symbol
10192 (info, bfd_elf_string_from_elf_section
10193 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10194 input_bfd, input_section,
10195 rel->r_offset, TRUE))
10196 return FALSE;
10197 }
10198
4e7fd91e 10199 if (globals->use_rel)
f8df10f4 10200 {
4e7fd91e
PB		 10201 relocation = (sec->output_section->vma
10202 + sec->output_offset
10203 + sym->st_value);
ab96bf03
AM		 10204 if (!info->relocatable
10205 && (sec->flags & SEC_MERGE)
10206 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10207 {
4e7fd91e
PB		 10208 asection *msec;
10209 bfd_vma addend, value;
10210
39623e12 10211 switch (r_type)
4e7fd91e 10212 {
39623e12
PB		 10213 case R_ARM_MOVW_ABS_NC:
10214 case R_ARM_MOVT_ABS:
10215 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10216 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10217 addend = (addend ^ 0x8000) - 0x8000;
10218 break;
f8df10f4 10219
39623e12
PB		 10220 case R_ARM_THM_MOVW_ABS_NC:
10221 case R_ARM_THM_MOVT_ABS:
10222 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10223 << 16;
10224 value |= bfd_get_16 (input_bfd,
10225 contents + rel->r_offset + 2);
10226 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10227 | ((value & 0x04000000) >> 15);
10228 addend = (addend ^ 0x8000) - 0x8000;
10229 break;
f8df10f4 10230
39623e12
PB		 10231 default:
10232 if (howto->rightshift
10233 || (howto->src_mask & (howto->src_mask + 1)))
10234 {
10235 (*_bfd_error_handler)
10236 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10237 input_bfd, input_section,
10238 (long) rel->r_offset, howto->name);
10239 return FALSE;
10240 }
10241
10242 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10243
10244 /* Get the (signed) value from the instruction. */
10245 addend = value & howto->src_mask;
10246 if (addend & ((howto->src_mask + 1) >> 1))
10247 {
10248 bfd_signed_vma mask;
10249
10250 mask = -1;
10251 mask &= ~ howto->src_mask;
10252 addend |= mask;
10253 }
10254 break;
4e7fd91e 10255 }
39623e12 10256
4e7fd91e
PB		 10257 msec = sec;
10258 addend =
10259 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10260 - relocation;
10261 addend += msec->output_section->vma + msec->output_offset;
39623e12 10262
cc643b88 10263 /* Cases here must match those in the preceding
39623e12
PB		 10264 switch statement. */
10265 switch (r_type)
10266 {
10267 case R_ARM_MOVW_ABS_NC:
10268 case R_ARM_MOVT_ABS:
10269 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10270 | (addend & 0xfff);
10271 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10272 break;
10273
10274 case R_ARM_THM_MOVW_ABS_NC:
10275 case R_ARM_THM_MOVT_ABS:
10276 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10277 | (addend & 0xff) | ((addend & 0x0800) << 15);
10278 bfd_put_16 (input_bfd, value >> 16,
10279 contents + rel->r_offset);
10280 bfd_put_16 (input_bfd, value,
10281 contents + rel->r_offset + 2);
10282 break;
10283
10284 default:
10285 value = (value & ~ howto->dst_mask)
10286 | (addend & howto->dst_mask);
10287 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10288 break;
10289 }
f8df10f4 10290 }
f8df10f4 10291 }
4e7fd91e
PB		 10292 else
10293 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10294 }
10295 else
10296 {
560e09e9 10297 bfd_boolean warned;
560e09e9 10298
b2a8e766
AM		 10299 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10300 r_symndx, symtab_hdr, sym_hashes,
10301 h, sec, relocation,
10302 unresolved_reloc, warned);
ba93b8ac
DJ		 10303
10304 sym_type = h->type;
252b5132
RH		 10305 }
10306
ab96bf03 10307 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 10308 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10309 rel, relend, howto, contents);
ab96bf03
AM		 10310
10311 if (info->relocatable)
10312 {
10313 /* This is a relocatable link. We don't have to change
10314 anything, unless the reloc is against a section symbol,
10315 in which case we have to adjust according to where the
10316 section symbol winds up in the output section. */
10317 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10318 {
10319 if (globals->use_rel)
10320 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10321 howto, (bfd_signed_vma) sec->output_offset);
10322 else
10323 rel->r_addend += sec->output_offset;
10324 }
10325 continue;
10326 }
10327
252b5132
RH		 10328 if (h != NULL)
10329 name = h->root.root.string;
10330 else
10331 {
10332 name = (bfd_elf_string_from_elf_section
10333 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10334 if (name == NULL || *name == '\0')
10335 name = bfd_section_name (input_bfd, sec);
10336 }
f21f3fe0 10337
cf35638d 10338 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10339 && r_type != R_ARM_NONE
10340 && (h == NULL
10341 || h->root.type == bfd_link_hash_defined
10342 || h->root.type == bfd_link_hash_defweak)
10343 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10344 {
10345 (*_bfd_error_handler)
10346 ((sym_type == STT_TLS
10347 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10348 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10349 input_bfd,
10350 input_section,
10351 (long) rel->r_offset,
10352 howto->name,
10353 name);
10354 }
10355
0855e32b
NS		 10356 /* We call elf32_arm_final_link_relocate unless we're completely
10357 done, i.e., the relaxation produced the final output we want,
10358 and we won't let anybody mess with it. Also, we have to do
10359 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10360 both in relaxed and non-relaxed cases */
10361 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10362 || (IS_ARM_TLS_GNU_RELOC (r_type)
10363 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10364 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10365 & GOT_TLS_GDESC)))
10366 {
10367 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10368 contents, rel, h == NULL);
10369 /* This may have been marked unresolved because it came from
10370 a shared library. But we've just dealt with that. */
10371 unresolved_reloc = 0;
10372 }
10373 else
10374 r = bfd_reloc_continue;
10375
10376 if (r == bfd_reloc_continue)
10377 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10378 input_section, contents, rel,
34e77a92 10379 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10380 (h ? h->target_internal
10381 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10382 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10383
10384 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10385 because such sections are not SEC_ALLOC and thus ld.so will
10386 not process them. */
10387 if (unresolved_reloc
10388 && !((input_section->flags & SEC_DEBUGGING) != 0
1d5316ab
AM		 10389 && h->def_dynamic)
10390 && _bfd_elf_section_offset (output_bfd, info, input_section,
10391 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10392 {
10393 (*_bfd_error_handler)
843fe662
L		 10394 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10395 input_bfd,
10396 input_section,
10397 (long) rel->r_offset,
10398 howto->name,
10399 h->root.root.string);
0945cdfd
DJ		 10400 return FALSE;
10401 }
252b5132
RH		 10402
10403 if (r != bfd_reloc_ok)
10404 {
252b5132
RH		 10405 switch (r)
10406 {
10407 case bfd_reloc_overflow:
cf919dfd
PB		 10408 /* If the overflowing reloc was to an undefined symbol,
10409 we have already printed one error message and there
10410 is no point complaining again. */
10411 if ((! h ||
10412 h->root.type != bfd_link_hash_undefined)
10413 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10414 (info, (h ? &h->root : NULL), name, howto->name,
10415 (bfd_vma) 0, input_bfd, input_section,
10416 rel->r_offset))))
b34976b6 10417 return FALSE;
252b5132
RH		 10418 break;
10419
10420 case bfd_reloc_undefined:
10421 if (!((*info->callbacks->undefined_symbol)
10422 (info, name, input_bfd, input_section,
b34976b6
AM		 10423 rel->r_offset, TRUE)))
10424 return FALSE;
252b5132
RH		 10425 break;
10426
10427 case bfd_reloc_outofrange:
f2a9dd69 10428 error_message = _("out of range");
252b5132
RH		 10429 goto common_error;
10430
10431 case bfd_reloc_notsupported:
f2a9dd69 10432 error_message = _("unsupported relocation");
252b5132
RH		 10433 goto common_error;
10434
10435 case bfd_reloc_dangerous:
f2a9dd69 10436 /* error_message should already be set. */
252b5132
RH		 10437 goto common_error;
10438
10439 default:
f2a9dd69 10440 error_message = _("unknown error");
8029a119 10441 /* Fall through. */
252b5132
RH		 10442
10443 common_error:
f2a9dd69
DJ		 10444 BFD_ASSERT (error_message != NULL);
10445 if (!((*info->callbacks->reloc_dangerous)
10446 (info, error_message, input_bfd, input_section,
252b5132 10447 rel->r_offset)))
b34976b6 10448 return FALSE;
252b5132
RH		 10449 break;
10450 }
10451 }
10452 }
10453
b34976b6 10454 return TRUE;
252b5132
RH		 10455}
10456
91d6fa6a 10457/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10458 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10459 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10460 maintaining that condition). */
10461
10462static void
10463add_unwind_table_edit (arm_unwind_table_edit **head,
10464 arm_unwind_table_edit **tail,
10465 arm_unwind_edit_type type,
10466 asection *linked_section,
91d6fa6a 10467 unsigned int tindex)
2468f9c9 10468{
21d799b5
NC		 10469 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10470 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 10471
10472 new_edit->type = type;
10473 new_edit->linked_section = linked_section;
91d6fa6a 10474 new_edit->index = tindex;
2468f9c9 10475
91d6fa6a 10476 if (tindex > 0)
2468f9c9
PB		 10477 {
10478 new_edit->next = NULL;
10479
10480 if (*tail)
10481 (*tail)->next = new_edit;
10482
10483 (*tail) = new_edit;
10484
10485 if (!*head)
10486 (*head) = new_edit;
10487 }
10488 else
10489 {
10490 new_edit->next = *head;
10491
10492 if (!*tail)
10493 *tail = new_edit;
10494
10495 *head = new_edit;
10496 }
10497}
10498
10499static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10500
10501/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10502static void
10503adjust_exidx_size(asection *exidx_sec, int adjust)
10504{
10505 asection *out_sec;
10506
10507 if (!exidx_sec->rawsize)
10508 exidx_sec->rawsize = exidx_sec->size;
10509
10510 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10511 out_sec = exidx_sec->output_section;
10512 /* Adjust size of output section. */
10513 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10514}
10515
10516/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10517static void
10518insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10519{
10520 struct _arm_elf_section_data *exidx_arm_data;
10521
10522 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10523 add_unwind_table_edit (
10524 &exidx_arm_data->u.exidx.unwind_edit_list,
10525 &exidx_arm_data->u.exidx.unwind_edit_tail,
10526 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10527
10528 adjust_exidx_size(exidx_sec, 8);
10529}
10530
10531/* Scan .ARM.exidx tables, and create a list describing edits which should be
10532 made to those tables, such that:
10533
10534 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10535 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10536 codes which have been inlined into the index).
10537
85fdf906
AH		 10538 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10539
2468f9c9
PB		 10540 The edits are applied when the tables are written
10541 (in elf32_arm_write_section).
10542*/
10543
10544bfd_boolean
10545elf32_arm_fix_exidx_coverage (asection **text_section_order,
10546 unsigned int num_text_sections,
85fdf906
AH		 10547 struct bfd_link_info *info,
10548 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10549{
10550 bfd *inp;
10551 unsigned int last_second_word = 0, i;
10552 asection *last_exidx_sec = NULL;
10553 asection *last_text_sec = NULL;
10554 int last_unwind_type = -1;
10555
10556 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10557 text sections. */
10558 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10559 {
10560 asection *sec;
10561
10562 for (sec = inp->sections; sec != NULL; sec = sec->next)
10563 {
10564 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10565 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10566
dec9d5df 10567 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 10568 continue;
10569
10570 if (elf_sec->linked_to)
10571 {
10572 Elf_Internal_Shdr *linked_hdr
10573 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10574 struct _arm_elf_section_data *linked_sec_arm_data
10575 = get_arm_elf_section_data (linked_hdr->bfd_section);
10576
10577 if (linked_sec_arm_data == NULL)
10578 continue;
10579
10580 /* Link this .ARM.exidx section back from the text section it
10581 describes. */
10582 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10583 }
10584 }
10585 }
10586
10587 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10588 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10589 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10590
10591 for (i = 0; i < num_text_sections; i++)
10592 {
10593 asection *sec = text_section_order[i];
10594 asection *exidx_sec;
10595 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10596 struct _arm_elf_section_data *exidx_arm_data;
10597 bfd_byte *contents = NULL;
10598 int deleted_exidx_bytes = 0;
10599 bfd_vma j;
10600 arm_unwind_table_edit *unwind_edit_head = NULL;
10601 arm_unwind_table_edit *unwind_edit_tail = NULL;
10602 Elf_Internal_Shdr *hdr;
10603 bfd *ibfd;
10604
10605 if (arm_data == NULL)
10606 continue;
10607
10608 exidx_sec = arm_data->u.text.arm_exidx_sec;
10609 if (exidx_sec == NULL)
10610 {
10611 /* Section has no unwind data. */
10612 if (last_unwind_type == 0 || !last_exidx_sec)
10613 continue;
10614
10615 /* Ignore zero sized sections. */
10616 if (sec->size == 0)
10617 continue;
10618
10619 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10620 last_unwind_type = 0;
10621 continue;
10622 }
10623
22a8f80e
PB		 10624 /* Skip /DISCARD/ sections. */
10625 if (bfd_is_abs_section (exidx_sec->output_section))
10626 continue;
10627
2468f9c9
PB		 10628 hdr = &elf_section_data (exidx_sec)->this_hdr;
10629 if (hdr->sh_type != SHT_ARM_EXIDX)
10630 continue;
10631
10632 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10633 if (exidx_arm_data == NULL)
10634 continue;
10635
10636 ibfd = exidx_sec->owner;
10637
10638 if (hdr->contents != NULL)
10639 contents = hdr->contents;
10640 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10641 /* An error? */
10642 continue;
10643
10644 for (j = 0; j < hdr->sh_size; j += 8)
10645 {
10646 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10647 int unwind_type;
10648 int elide = 0;
10649
10650 /* An EXIDX_CANTUNWIND entry. */
10651 if (second_word == 1)
10652 {
10653 if (last_unwind_type == 0)
10654 elide = 1;
10655 unwind_type = 0;
10656 }
10657 /* Inlined unwinding data. Merge if equal to previous. */
10658 else if ((second_word & 0x80000000) != 0)
10659 {
85fdf906
AH		 10660 if (merge_exidx_entries
10661 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10662 elide = 1;
10663 unwind_type = 1;
10664 last_second_word = second_word;
10665 }
10666 /* Normal table entry. In theory we could merge these too,
10667 but duplicate entries are likely to be much less common. */
10668 else
10669 unwind_type = 2;
10670
10671 if (elide)
10672 {
10673 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10674 DELETE_EXIDX_ENTRY, NULL, j / 8);
10675
10676 deleted_exidx_bytes += 8;
10677 }
10678
10679 last_unwind_type = unwind_type;
10680 }
10681
10682 /* Free contents if we allocated it ourselves. */
10683 if (contents != hdr->contents)
10684 free (contents);
10685
10686 /* Record edits to be applied later (in elf32_arm_write_section). */
10687 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10688 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10689
10690 if (deleted_exidx_bytes > 0)
10691 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10692
10693 last_exidx_sec = exidx_sec;
10694 last_text_sec = sec;
10695 }
10696
10697 /* Add terminating CANTUNWIND entry. */
10698 if (last_exidx_sec && last_unwind_type != 0)
10699 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10700
10701 return TRUE;
10702}
10703
3e6b1042
DJ		 10704static bfd_boolean
10705elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10706 bfd *ibfd, const char *name)
10707{
10708 asection *sec, *osec;
10709
10710 sec = bfd_get_section_by_name (ibfd, name);
10711 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10712 return TRUE;
10713
10714 osec = sec->output_section;
10715 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10716 return TRUE;
10717
10718 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10719 sec->output_offset, sec->size))
10720 return FALSE;
10721
10722 return TRUE;
10723}
10724
10725static bfd_boolean
10726elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10727{
10728 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 10729 asection *sec, *osec;
3e6b1042 10730
4dfe6ac6
NC		 10731 if (globals == NULL)
10732 return FALSE;
10733
3e6b1042
DJ		 10734 /* Invoke the regular ELF backend linker to do all the work. */
10735 if (!bfd_elf_final_link (abfd, info))
10736 return FALSE;
10737
fe33d2fa
CL		 10738 /* Process stub sections (eg BE8 encoding, ...). */
10739 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10740 int i;
cdb21a0a
NS		 10741 for (i=0; i<htab->top_id; i++)
10742 {
10743 sec = htab->stub_group[i].stub_sec;
10744 /* Only process it once, in its link_sec slot. */
10745 if (sec && i == htab->stub_group[i].link_sec->id)
10746 {
10747 osec = sec->output_section;
10748 elf32_arm_write_section (abfd, info, sec, sec->contents);
10749 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10750 sec->output_offset, sec->size))
10751 return FALSE;
10752 }
fe33d2fa 10753 }
fe33d2fa 10754
3e6b1042
DJ		 10755 /* Write out any glue sections now that we have created all the
10756 stubs. */
10757 if (globals->bfd_of_glue_owner != NULL)
10758 {
10759 if (! elf32_arm_output_glue_section (info, abfd,
10760 globals->bfd_of_glue_owner,
10761 ARM2THUMB_GLUE_SECTION_NAME))
10762 return FALSE;
10763
10764 if (! elf32_arm_output_glue_section (info, abfd,
10765 globals->bfd_of_glue_owner,
10766 THUMB2ARM_GLUE_SECTION_NAME))
10767 return FALSE;
10768
10769 if (! elf32_arm_output_glue_section (info, abfd,
10770 globals->bfd_of_glue_owner,
10771 VFP11_ERRATUM_VENEER_SECTION_NAME))
10772 return FALSE;
10773
10774 if (! elf32_arm_output_glue_section (info, abfd,
10775 globals->bfd_of_glue_owner,
10776 ARM_BX_GLUE_SECTION_NAME))
10777 return FALSE;
10778 }
10779
10780 return TRUE;
10781}
10782
c178919b
NC		 10783/* Set the right machine number. */
10784
10785static bfd_boolean
57e8b36a 10786elf32_arm_object_p (bfd *abfd)
c178919b 10787{
5a6c6817 10788 unsigned int mach;
57e8b36a 10789
5a6c6817 10790 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 10791
5a6c6817
NC		 10792 if (mach != bfd_mach_arm_unknown)
10793 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
10794
10795 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
10796 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 10797
e16bb312 10798 else
5a6c6817 10799 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 10800
10801 return TRUE;
10802}
10803
fc830a83 10804/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 10805
b34976b6 10806static bfd_boolean
57e8b36a 10807elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 10808{
10809 if (elf_flags_init (abfd)
10810 && elf_elfheader (abfd)->e_flags != flags)
10811 {
fc830a83
NC		 10812 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
10813 {
fd2ec330 10814 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 10815 (*_bfd_error_handler)
10816 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
10817 abfd);
fc830a83 10818 else
d003868e
AM		 10819 _bfd_error_handler
10820 (_("Warning: Clearing the interworking flag of %B due to outside request"),
10821 abfd);
fc830a83 10822 }
252b5132
RH		 10823 }
10824 else
10825 {
10826 elf_elfheader (abfd)->e_flags = flags;
b34976b6 10827 elf_flags_init (abfd) = TRUE;
252b5132
RH		 10828 }
10829
b34976b6 10830 return TRUE;
252b5132
RH		 10831}
10832
fc830a83 10833/* Copy backend specific data from one object module to another. */
9b485d32 10834
b34976b6 10835static bfd_boolean
57e8b36a 10836elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 10837{
10838 flagword in_flags;
10839 flagword out_flags;
10840
0ffa91dd 10841 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10842 return TRUE;
252b5132 10843
fc830a83 10844 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 10845 out_flags = elf_elfheader (obfd)->e_flags;
10846
fc830a83
NC		 10847 if (elf_flags_init (obfd)
10848 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
10849 && in_flags != out_flags)
252b5132 10850 {
252b5132 10851 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 10852 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 10853 return FALSE;
252b5132
RH		 10854
10855 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 10856 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 10857 return FALSE;
252b5132
RH		 10858
10859 /* If the src and dest have different interworking flags
10860 then turn off the interworking bit. */
fd2ec330 10861 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 10862 {
fd2ec330 10863 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 10864 _bfd_error_handler
10865 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
10866 obfd, ibfd);
252b5132 10867
fd2ec330 10868 in_flags &= ~EF_ARM_INTERWORK;
252b5132 10869 }
1006ba19
PB		 10870
10871 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 10872 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
10873 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 10874 }
10875
10876 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 10877 elf_flags_init (obfd) = TRUE;
252b5132 10878
94a3258f
PB		 10879 /* Also copy the EI_OSABI field. */
10880 elf_elfheader (obfd)->e_ident[EI_OSABI] =
10881 elf_elfheader (ibfd)->e_ident[EI_OSABI];
10882
104d59d1
JM		 10883 /* Copy object attributes. */
10884 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 10885
10886 return TRUE;
10887}
10888
10889/* Values for Tag_ABI_PCS_R9_use. */
10890enum
10891{
10892 AEABI_R9_V6,
10893 AEABI_R9_SB,
10894 AEABI_R9_TLS,
10895 AEABI_R9_unused
10896};
10897
10898/* Values for Tag_ABI_PCS_RW_data. */
10899enum
10900{
10901 AEABI_PCS_RW_data_absolute,
10902 AEABI_PCS_RW_data_PCrel,
10903 AEABI_PCS_RW_data_SBrel,
10904 AEABI_PCS_RW_data_unused
10905};
10906
10907/* Values for Tag_ABI_enum_size. */
10908enum
10909{
10910 AEABI_enum_unused,
10911 AEABI_enum_short,
10912 AEABI_enum_wide,
10913 AEABI_enum_forced_wide
10914};
10915
104d59d1
JM		 10916/* Determine whether an object attribute tag takes an integer, a
10917 string or both. */
906e58ca 10918
104d59d1
JM		 10919static int
10920elf32_arm_obj_attrs_arg_type (int tag)
10921{
10922 if (tag == Tag_compatibility)
3483fe2e 10923 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 10924 else if (tag == Tag_nodefaults)
3483fe2e
AS		 10925 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
10926 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
10927 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 10928 else if (tag < 32)
3483fe2e 10929 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 10930 else
3483fe2e 10931 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 10932}
10933
5aa6ff7c
AS		 10934/* The ABI defines that Tag_conformance should be emitted first, and that
10935 Tag_nodefaults should be second (if either is defined). This sets those
10936 two positions, and bumps up the position of all the remaining tags to
10937 compensate. */
10938static int
10939elf32_arm_obj_attrs_order (int num)
10940{
3de4a297 10941 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 10942 return Tag_conformance;
3de4a297 10943 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 10944 return Tag_nodefaults;
10945 if ((num - 2) < Tag_nodefaults)
10946 return num - 2;
10947 if ((num - 1) < Tag_conformance)
10948 return num - 1;
10949 return num;
10950}
10951
e8b36cd1
JM		 10952/* Attribute numbers >=64 (mod 128) can be safely ignored. */
10953static bfd_boolean
10954elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
10955{
10956 if ((tag & 127) < 64)
10957 {
10958 _bfd_error_handler
10959 (_("%B: Unknown mandatory EABI object attribute %d"),
10960 abfd, tag);
10961 bfd_set_error (bfd_error_bad_value);
10962 return FALSE;
10963 }
10964 else
10965 {
10966 _bfd_error_handler
10967 (_("Warning: %B: Unknown EABI object attribute %d"),
10968 abfd, tag);
10969 return TRUE;
10970 }
10971}
10972
91e22acd
AS		 10973/* Read the architecture from the Tag_also_compatible_with attribute, if any.
10974 Returns -1 if no architecture could be read. */
10975
10976static int
10977get_secondary_compatible_arch (bfd *abfd)
10978{
10979 obj_attribute *attr =
10980 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
10981
10982 /* Note: the tag and its argument below are uleb128 values, though
10983 currently-defined values fit in one byte for each. */
10984 if (attr->s
10985 && attr->s[0] == Tag_CPU_arch
10986 && (attr->s[1] & 128) != 128
10987 && attr->s[2] == 0)
10988 return attr->s[1];
10989
10990 /* This tag is "safely ignorable", so don't complain if it looks funny. */
10991 return -1;
10992}
10993
10994/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10995 The tag is removed if ARCH is -1. */
10996
8e79c3df 10997static void
91e22acd 10998set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 10999{
91e22acd
AS		 11000 obj_attribute *attr =
11001 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11002
91e22acd
AS		 11003 if (arch == -1)
11004 {
11005 attr->s = NULL;
11006 return;
8e79c3df 11007 }
91e22acd
AS		 11008
11009 /* Note: the tag and its argument below are uleb128 values, though
11010 currently-defined values fit in one byte for each. */
11011 if (!attr->s)
21d799b5 11012 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11013 attr->s[0] = Tag_CPU_arch;
11014 attr->s[1] = arch;
11015 attr->s[2] = '\0';
8e79c3df
CM		 11016}
11017
91e22acd
AS		 11018/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11019 into account. */
11020
11021static int
11022tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11023 int newtag, int secondary_compat)
8e79c3df 11024{
91e22acd
AS		 11025#define T(X) TAG_CPU_ARCH_##X
11026 int tagl, tagh, result;
11027 const int v6t2[] =
11028 {
11029 T(V6T2), /* PRE_V4. */
11030 T(V6T2), /* V4. */
11031 T(V6T2), /* V4T. */
11032 T(V6T2), /* V5T. */
11033 T(V6T2), /* V5TE. */
11034 T(V6T2), /* V5TEJ. */
11035 T(V6T2), /* V6. */
11036 T(V7), /* V6KZ. */
11037 T(V6T2) /* V6T2. */
11038 };
11039 const int v6k[] =
11040 {
11041 T(V6K), /* PRE_V4. */
11042 T(V6K), /* V4. */
11043 T(V6K), /* V4T. */
11044 T(V6K), /* V5T. */
11045 T(V6K), /* V5TE. */
11046 T(V6K), /* V5TEJ. */
11047 T(V6K), /* V6. */
11048 T(V6KZ), /* V6KZ. */
11049 T(V7), /* V6T2. */
11050 T(V6K) /* V6K. */
11051 };
11052 const int v7[] =
11053 {
11054 T(V7), /* PRE_V4. */
11055 T(V7), /* V4. */
11056 T(V7), /* V4T. */
11057 T(V7), /* V5T. */
11058 T(V7), /* V5TE. */
11059 T(V7), /* V5TEJ. */
11060 T(V7), /* V6. */
11061 T(V7), /* V6KZ. */
11062 T(V7), /* V6T2. */
11063 T(V7), /* V6K. */
11064 T(V7) /* V7. */
11065 };
11066 const int v6_m[] =
11067 {
11068 -1, /* PRE_V4. */
11069 -1, /* V4. */
11070 T(V6K), /* V4T. */
11071 T(V6K), /* V5T. */
11072 T(V6K), /* V5TE. */
11073 T(V6K), /* V5TEJ. */
11074 T(V6K), /* V6. */
11075 T(V6KZ), /* V6KZ. */
11076 T(V7), /* V6T2. */
11077 T(V6K), /* V6K. */
11078 T(V7), /* V7. */
11079 T(V6_M) /* V6_M. */
11080 };
11081 const int v6s_m[] =
11082 {
11083 -1, /* PRE_V4. */
11084 -1, /* V4. */
11085 T(V6K), /* V4T. */
11086 T(V6K), /* V5T. */
11087 T(V6K), /* V5TE. */
11088 T(V6K), /* V5TEJ. */
11089 T(V6K), /* V6. */
11090 T(V6KZ), /* V6KZ. */
11091 T(V7), /* V6T2. */
11092 T(V6K), /* V6K. */
11093 T(V7), /* V7. */
11094 T(V6S_M), /* V6_M. */
11095 T(V6S_M) /* V6S_M. */
11096 };
9e3c6df6
PB		 11097 const int v7e_m[] =
11098 {
11099 -1, /* PRE_V4. */
11100 -1, /* V4. */
11101 T(V7E_M), /* V4T. */
11102 T(V7E_M), /* V5T. */
11103 T(V7E_M), /* V5TE. */
11104 T(V7E_M), /* V5TEJ. */
11105 T(V7E_M), /* V6. */
11106 T(V7E_M), /* V6KZ. */
11107 T(V7E_M), /* V6T2. */
11108 T(V7E_M), /* V6K. */
11109 T(V7E_M), /* V7. */
11110 T(V7E_M), /* V6_M. */
11111 T(V7E_M), /* V6S_M. */
11112 T(V7E_M) /* V7E_M. */
11113 };
91e22acd
AS		 11114 const int v4t_plus_v6_m[] =
11115 {
11116 -1, /* PRE_V4. */
11117 -1, /* V4. */
11118 T(V4T), /* V4T. */
11119 T(V5T), /* V5T. */
11120 T(V5TE), /* V5TE. */
11121 T(V5TEJ), /* V5TEJ. */
11122 T(V6), /* V6. */
11123 T(V6KZ), /* V6KZ. */
11124 T(V6T2), /* V6T2. */
11125 T(V6K), /* V6K. */
11126 T(V7), /* V7. */
11127 T(V6_M), /* V6_M. */
11128 T(V6S_M), /* V6S_M. */
9e3c6df6 11129 T(V7E_M), /* V7E_M. */
91e22acd
AS		 11130 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11131 };
11132 const int *comb[] =
11133 {
11134 v6t2,
11135 v6k,
11136 v7,
11137 v6_m,
11138 v6s_m,
9e3c6df6 11139 v7e_m,
91e22acd
AS		 11140 /* Pseudo-architecture. */
11141 v4t_plus_v6_m
11142 };
11143
11144 /* Check we've not got a higher architecture than we know about. */
11145
9e3c6df6 11146 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11147 {
3895f852 11148 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11149 return -1;
11150 }
11151
11152 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11153
11154 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11155 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11156 oldtag = T(V4T_PLUS_V6_M);
11157
11158 /* And override the new tag if we have a Tag_also_compatible_with on the
11159 input. */
11160
11161 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11162 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11163 newtag = T(V4T_PLUS_V6_M);
11164
11165 tagl = (oldtag < newtag) ? oldtag : newtag;
11166 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11167
11168 /* Architectures before V6KZ add features monotonically. */
11169 if (tagh <= TAG_CPU_ARCH_V6KZ)
11170 return result;
11171
11172 result = comb[tagh - T(V6T2)][tagl];
11173
11174 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11175 as the canonical version. */
11176 if (result == T(V4T_PLUS_V6_M))
11177 {
11178 result = T(V4T);
11179 *secondary_compat_out = T(V6_M);
11180 }
11181 else
11182 *secondary_compat_out = -1;
11183
11184 if (result == -1)
11185 {
3895f852 11186 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11187 ibfd, oldtag, newtag);
11188 return -1;
11189 }
11190
11191 return result;
11192#undef T
8e79c3df
CM		 11193}
11194
ee065d83
PB		 11195/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11196 are conflicting attributes. */
906e58ca 11197
ee065d83
PB		 11198static bfd_boolean
11199elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11200{
104d59d1
JM		 11201 obj_attribute *in_attr;
11202 obj_attribute *out_attr;
ee065d83
PB		 11203 /* Some tags have 0 = don't care, 1 = strong requirement,
11204 2 = weak requirement. */
91e22acd 11205 static const int order_021[3] = {0, 2, 1};
ee065d83 11206 int i;
91e22acd 11207 bfd_boolean result = TRUE;
ee065d83 11208
3e6b1042
DJ		 11209 /* Skip the linker stubs file. This preserves previous behavior
11210 of accepting unknown attributes in the first input file - but
11211 is that a bug? */
11212 if (ibfd->flags & BFD_LINKER_CREATED)
11213 return TRUE;
11214
104d59d1 11215 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11216 {
11217 /* This is the first object. Copy the attributes. */
104d59d1 11218 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11219
cd21e546
MGD		 11220 out_attr = elf_known_obj_attributes_proc (obfd);
11221
004ae526
PB		 11222 /* Use the Tag_null value to indicate the attributes have been
11223 initialized. */
cd21e546 11224 out_attr[0].i = 1;
004ae526 11225
cd21e546
MGD		 11226 /* We do not output objects with Tag_MPextension_use_legacy - we move
11227 the attribute's value to Tag_MPextension_use. */
11228 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11229 {
11230 if (out_attr[Tag_MPextension_use].i != 0
11231 && out_attr[Tag_MPextension_use_legacy].i
11232 != out_attr[Tag_MPextension_use].i)
11233 {
11234 _bfd_error_handler
11235 (_("Error: %B has both the current and legacy "
11236 "Tag_MPextension_use attributes"), ibfd);
11237 result = FALSE;
11238 }
11239
11240 out_attr[Tag_MPextension_use] =
11241 out_attr[Tag_MPextension_use_legacy];
11242 out_attr[Tag_MPextension_use_legacy].type = 0;
11243 out_attr[Tag_MPextension_use_legacy].i = 0;
11244 }
11245
11246 return result;
ee065d83
PB		 11247 }
11248
104d59d1
JM		 11249 in_attr = elf_known_obj_attributes_proc (ibfd);
11250 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11251 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11252 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11253 {
8e79c3df 11254 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11255 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11256 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11257 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11258 {
11259 _bfd_error_handler
3895f852 11260 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11261 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11262 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11263 result = FALSE;
ee065d83
PB		 11264 }
11265 }
11266
3de4a297 11267 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11268 {
11269 /* Merge this attribute with existing attributes. */
11270 switch (i)
11271 {
11272 case Tag_CPU_raw_name:
11273 case Tag_CPU_name:
91e22acd 11274 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11275 break;
11276
11277 case Tag_ABI_optimization_goals:
11278 case Tag_ABI_FP_optimization_goals:
11279 /* Use the first value seen. */
11280 break;
11281
11282 case Tag_CPU_arch:
91e22acd
AS		 11283 {
11284 int secondary_compat = -1, secondary_compat_out = -1;
11285 unsigned int saved_out_attr = out_attr[i].i;
11286 static const char *name_table[] = {
11287 /* These aren't real CPU names, but we can't guess
11288 that from the architecture version alone. */
11289 "Pre v4",
11290 "ARM v4",
11291 "ARM v4T",
11292 "ARM v5T",
11293 "ARM v5TE",
11294 "ARM v5TEJ",
11295 "ARM v6",
11296 "ARM v6KZ",
11297 "ARM v6T2",
11298 "ARM v6K",
11299 "ARM v7",
11300 "ARM v6-M",
11301 "ARM v6S-M"
11302 };
11303
11304 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11305 secondary_compat = get_secondary_compatible_arch (ibfd);
11306 secondary_compat_out = get_secondary_compatible_arch (obfd);
11307 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11308 &secondary_compat_out,
11309 in_attr[i].i,
11310 secondary_compat);
11311 set_secondary_compatible_arch (obfd, secondary_compat_out);
11312
11313 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11314 if (out_attr[i].i == saved_out_attr)
11315 ; /* Leave the names alone. */
11316 else if (out_attr[i].i == in_attr[i].i)
11317 {
11318 /* The output architecture has been changed to match the
11319 input architecture. Use the input names. */
11320 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11321 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11322 : NULL;
11323 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11324 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11325 : NULL;
11326 }
11327 else
11328 {
11329 out_attr[Tag_CPU_name].s = NULL;
11330 out_attr[Tag_CPU_raw_name].s = NULL;
11331 }
11332
11333 /* If we still don't have a value for Tag_CPU_name,
11334 make one up now. Tag_CPU_raw_name remains blank. */
11335 if (out_attr[Tag_CPU_name].s == NULL
11336 && out_attr[i].i < ARRAY_SIZE (name_table))
11337 out_attr[Tag_CPU_name].s =
11338 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11339 }
11340 break;
11341
ee065d83
PB		 11342 case Tag_ARM_ISA_use:
11343 case Tag_THUMB_ISA_use:
ee065d83 11344 case Tag_WMMX_arch:
91e22acd
AS		 11345 case Tag_Advanced_SIMD_arch:
11346 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11347 case Tag_ABI_FP_rounding:
ee065d83
PB		 11348 case Tag_ABI_FP_exceptions:
11349 case Tag_ABI_FP_user_exceptions:
11350 case Tag_ABI_FP_number_model:
75375b3e 11351 case Tag_FP_HP_extension:
91e22acd
AS		 11352 case Tag_CPU_unaligned_access:
11353 case Tag_T2EE_use:
91e22acd 11354 case Tag_MPextension_use:
ee065d83
PB		 11355 /* Use the largest value specified. */
11356 if (in_attr[i].i > out_attr[i].i)
11357 out_attr[i].i = in_attr[i].i;
11358 break;
11359
75375b3e 11360 case Tag_ABI_align_preserved:
91e22acd
AS		 11361 case Tag_ABI_PCS_RO_data:
11362 /* Use the smallest value specified. */
11363 if (in_attr[i].i < out_attr[i].i)
11364 out_attr[i].i = in_attr[i].i;
11365 break;
11366
75375b3e 11367 case Tag_ABI_align_needed:
91e22acd 11368 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11369 && (in_attr[Tag_ABI_align_preserved].i == 0
11370 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11371 {
91e22acd
AS		 11372 /* This error message should be enabled once all non-conformant
11373 binaries in the toolchain have had the attributes set
11374 properly.
ee065d83 11375 _bfd_error_handler
3895f852 11376 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11377 obfd, ibfd);
11378 result = FALSE; */
ee065d83 11379 }
91e22acd
AS		 11380 /* Fall through. */
11381 case Tag_ABI_FP_denormal:
11382 case Tag_ABI_PCS_GOT_use:
11383 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11384 value if greater than 2 (for future-proofing). */
11385 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11386 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11387 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11388 out_attr[i].i = in_attr[i].i;
11389 break;
91e22acd 11390
75375b3e
MGD		 11391 case Tag_Virtualization_use:
11392 /* The virtualization tag effectively stores two bits of
11393 information: the intended use of TrustZone (in bit 0), and the
11394 intended use of Virtualization (in bit 1). */
11395 if (out_attr[i].i == 0)
11396 out_attr[i].i = in_attr[i].i;
11397 else if (in_attr[i].i != 0
11398 && in_attr[i].i != out_attr[i].i)
11399 {
11400 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11401 out_attr[i].i = 3;
11402 else
11403 {
11404 _bfd_error_handler
11405 (_("error: %B: unable to merge virtualization attributes "
11406 "with %B"),
11407 obfd, ibfd);
11408 result = FALSE;
11409 }
11410 }
11411 break;
91e22acd
AS		 11412
11413 case Tag_CPU_arch_profile:
11414 if (out_attr[i].i != in_attr[i].i)
11415 {
11416 /* 0 will merge with anything.
11417 'A' and 'S' merge to 'A'.
11418 'R' and 'S' merge to 'R'.
11419 'M' and 'A|R|S' is an error. */
11420 if (out_attr[i].i == 0
11421 || (out_attr[i].i == 'S'
11422 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11423 out_attr[i].i = in_attr[i].i;
11424 else if (in_attr[i].i == 0
11425 || (in_attr[i].i == 'S'
11426 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11427 ; /* Do nothing. */
11428 else
11429 {
11430 _bfd_error_handler
3895f852 11431 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11432 ibfd,
11433 in_attr[i].i ? in_attr[i].i : '0',
11434 out_attr[i].i ? out_attr[i].i : '0');
11435 result = FALSE;
11436 }
11437 }
11438 break;
75375b3e 11439 case Tag_FP_arch:
62f3b8c8 11440 {
4547cb56
NC		 11441 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11442 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11443 when it's 0. It might mean absence of FP hardware if
11444 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11445
62f3b8c8
PB		 11446 static const struct
11447 {
11448 int ver;
11449 int regs;
11450 } vfp_versions[7] =
11451 {
11452 {0, 0},
11453 {1, 16},
11454 {2, 16},
11455 {3, 32},
11456 {3, 16},
11457 {4, 32},
11458 {4, 16}
11459 };
11460 int ver;
11461 int regs;
11462 int newval;
11463
4547cb56
NC		 11464 /* If the output has no requirement about FP hardware,
11465 follow the requirement of the input. */
11466 if (out_attr[i].i == 0)
11467 {
11468 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11469 out_attr[i].i = in_attr[i].i;
11470 out_attr[Tag_ABI_HardFP_use].i
11471 = in_attr[Tag_ABI_HardFP_use].i;
11472 break;
11473 }
11474 /* If the input has no requirement about FP hardware, do
11475 nothing. */
11476 else if (in_attr[i].i == 0)
11477 {
11478 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11479 break;
11480 }
11481
11482 /* Both the input and the output have nonzero Tag_FP_arch.
11483 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11484
11485 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11486 do nothing. */
11487 if (in_attr[Tag_ABI_HardFP_use].i == 0
11488 && out_attr[Tag_ABI_HardFP_use].i == 0)
11489 ;
11490 /* If the input and the output have different Tag_ABI_HardFP_use,
11491 the combination of them is 3 (SP & DP). */
11492 else if (in_attr[Tag_ABI_HardFP_use].i
11493 != out_attr[Tag_ABI_HardFP_use].i)
11494 out_attr[Tag_ABI_HardFP_use].i = 3;
11495
11496 /* Now we can handle Tag_FP_arch. */
11497
62f3b8c8
PB		 11498 /* Values greater than 6 aren't defined, so just pick the
11499 biggest */
11500 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11501 {
11502 out_attr[i] = in_attr[i];
11503 break;
11504 }
11505 /* The output uses the superset of input features
11506 (ISA version) and registers. */
11507 ver = vfp_versions[in_attr[i].i].ver;
11508 if (ver < vfp_versions[out_attr[i].i].ver)
11509 ver = vfp_versions[out_attr[i].i].ver;
11510 regs = vfp_versions[in_attr[i].i].regs;
11511 if (regs < vfp_versions[out_attr[i].i].regs)
11512 regs = vfp_versions[out_attr[i].i].regs;
11513 /* This assumes all possible supersets are also a valid
11514 options. */
11515 for (newval = 6; newval > 0; newval--)
11516 {
11517 if (regs == vfp_versions[newval].regs
11518 && ver == vfp_versions[newval].ver)
11519 break;
11520 }
11521 out_attr[i].i = newval;
11522 }
b1cc4aeb 11523 break;
ee065d83
PB		 11524 case Tag_PCS_config:
11525 if (out_attr[i].i == 0)
11526 out_attr[i].i = in_attr[i].i;
11527 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
11528 {
11529 /* It's sometimes ok to mix different configs, so this is only
11530 a warning. */
11531 _bfd_error_handler
11532 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11533 }
11534 break;
11535 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11536 if (in_attr[i].i != out_attr[i].i
11537 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11538 && in_attr[i].i != AEABI_R9_unused)
11539 {
11540 _bfd_error_handler
3895f852 11541 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11542 result = FALSE;
ee065d83
PB		 11543 }
11544 if (out_attr[i].i == AEABI_R9_unused)
11545 out_attr[i].i = in_attr[i].i;
11546 break;
11547 case Tag_ABI_PCS_RW_data:
11548 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11549 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11550 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11551 {
11552 _bfd_error_handler
3895f852 11553 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11554 ibfd);
91e22acd 11555 result = FALSE;
ee065d83
PB		 11556 }
11557 /* Use the smallest value specified. */
11558 if (in_attr[i].i < out_attr[i].i)
11559 out_attr[i].i = in_attr[i].i;
11560 break;
ee065d83 11561 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11562 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11563 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11564 {
11565 _bfd_error_handler
a9dc9481
JM		 11566 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11567 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11568 }
a9dc9481 11569 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11570 out_attr[i].i = in_attr[i].i;
11571 break;
ee065d83
PB		 11572 case Tag_ABI_enum_size:
11573 if (in_attr[i].i != AEABI_enum_unused)
11574 {
11575 if (out_attr[i].i == AEABI_enum_unused
11576 || out_attr[i].i == AEABI_enum_forced_wide)
11577 {
11578 /* The existing object is compatible with anything.
11579 Use whatever requirements the new object has. */
11580 out_attr[i].i = in_attr[i].i;
11581 }
11582 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11583 && out_attr[i].i != in_attr[i].i
0ffa91dd 11584 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11585 {
91e22acd 11586 static const char *aeabi_enum_names[] =
bf21ed78 11587 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11588 const char *in_name =
11589 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11590 ? aeabi_enum_names[in_attr[i].i]
11591 : "<unknown>";
11592 const char *out_name =
11593 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11594 ? aeabi_enum_names[out_attr[i].i]
11595 : "<unknown>";
ee065d83 11596 _bfd_error_handler
bf21ed78 11597 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11598 ibfd, in_name, out_name);
ee065d83
PB		 11599 }
11600 }
11601 break;
11602 case Tag_ABI_VFP_args:
11603 /* Aready done. */
11604 break;
11605 case Tag_ABI_WMMX_args:
11606 if (in_attr[i].i != out_attr[i].i)
11607 {
11608 _bfd_error_handler
3895f852 11609 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11610 ibfd, obfd);
91e22acd 11611 result = FALSE;
ee065d83
PB		 11612 }
11613 break;
7b86a9fa
AS		 11614 case Tag_compatibility:
11615 /* Merged in target-independent code. */
11616 break;
91e22acd 11617 case Tag_ABI_HardFP_use:
4547cb56 11618 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 11619 break;
11620 case Tag_ABI_FP_16bit_format:
11621 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11622 {
11623 if (in_attr[i].i != out_attr[i].i)
11624 {
11625 _bfd_error_handler
3895f852 11626 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 11627 ibfd, obfd);
11628 result = FALSE;
11629 }
11630 }
11631 if (in_attr[i].i != 0)
11632 out_attr[i].i = in_attr[i].i;
11633 break;
7b86a9fa 11634
cd21e546
MGD		 11635 case Tag_DIV_use:
11636 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
11637 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
11638 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
11639 CPU. We will merge as follows: If the input attribute's value
11640 is one then the output attribute's value remains unchanged. If
11641 the input attribute's value is zero or two then if the output
11642 attribute's value is one the output value is set to the input
11643 value, otherwise the output value must be the same as the
11644 inputs. */
11645 if (in_attr[i].i != 1 && out_attr[i].i != 1)
11646 {
11647 if (in_attr[i].i != out_attr[i].i)
11648 {
11649 _bfd_error_handler
11650 (_("DIV usage mismatch between %B and %B"),
11651 ibfd, obfd);
11652 result = FALSE;
11653 }
11654 }
11655
11656 if (in_attr[i].i != 1)
11657 out_attr[i].i = in_attr[i].i;
11658
11659 break;
11660
11661 case Tag_MPextension_use_legacy:
11662 /* We don't output objects with Tag_MPextension_use_legacy - we
11663 move the value to Tag_MPextension_use. */
11664 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11665 {
11666 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11667 {
11668 _bfd_error_handler
11669 (_("%B has has both the current and legacy "
11670 "Tag_MPextension_use attributes"),
11671 ibfd);
11672 result = FALSE;
11673 }
11674 }
11675
11676 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11677 out_attr[Tag_MPextension_use] = in_attr[i];
11678
11679 break;
11680
91e22acd 11681 case Tag_nodefaults:
2d0bb761
AS		 11682 /* This tag is set if it exists, but the value is unused (and is
11683 typically zero). We don't actually need to do anything here -
11684 the merge happens automatically when the type flags are merged
11685 below. */
91e22acd
AS		 11686 break;
11687 case Tag_also_compatible_with:
11688 /* Already done in Tag_CPU_arch. */
11689 break;
11690 case Tag_conformance:
11691 /* Keep the attribute if it matches. Throw it away otherwise.
11692 No attribute means no claim to conform. */
11693 if (!in_attr[i].s || !out_attr[i].s
11694 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11695 out_attr[i].s = NULL;
11696 break;
3cfad14c 11697
91e22acd 11698 default:
e8b36cd1
JM		 11699 result
11700 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 11701 }
11702
11703 /* If out_attr was copied from in_attr then it won't have a type yet. */
11704 if (in_attr[i].type && !out_attr[i].type)
11705 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 11706 }
11707
104d59d1 11708 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 11709 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11710 return FALSE;
ee065d83 11711
104d59d1 11712 /* Check for any attributes not known on ARM. */
e8b36cd1 11713 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 11714
91e22acd 11715 return result;
252b5132
RH		 11716}
11717
3a4a14e9
PB		 11718
11719/* Return TRUE if the two EABI versions are incompatible. */
11720
11721static bfd_boolean
11722elf32_arm_versions_compatible (unsigned iver, unsigned over)
11723{
11724 /* v4 and v5 are the same spec before and after it was released,
11725 so allow mixing them. */
11726 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11727 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11728 return TRUE;
11729
11730 return (iver == over);
11731}
11732
252b5132
RH		 11733/* Merge backend specific data from an object file to the output
11734 object file when linking. */
9b485d32 11735
b34976b6 11736static bfd_boolean
21d799b5 11737elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 11738
9b485d32
NC		 11739/* Display the flags field. */
11740
b34976b6 11741static bfd_boolean
57e8b36a 11742elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 11743{
fc830a83
NC		 11744 FILE * file = (FILE *) ptr;
11745 unsigned long flags;
252b5132
RH		 11746
11747 BFD_ASSERT (abfd != NULL && ptr != NULL);
11748
11749 /* Print normal ELF private data. */
11750 _bfd_elf_print_private_bfd_data (abfd, ptr);
11751
fc830a83 11752 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 11753 /* Ignore init flag - it may not be set, despite the flags field
11754 containing valid data. */
252b5132
RH		 11755
11756 /* xgettext:c-format */
9b485d32 11757 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 11758
fc830a83
NC		 11759 switch (EF_ARM_EABI_VERSION (flags))
11760 {
11761 case EF_ARM_EABI_UNKNOWN:
4cc11e76 11762 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 11763 official ARM ELF extended ABI. Hence they are only decoded if
11764 the EABI version is not set. */
fd2ec330 11765 if (flags & EF_ARM_INTERWORK)
9b485d32 11766 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 11767
fd2ec330 11768 if (flags & EF_ARM_APCS_26)
6c571f00 11769 fprintf (file, " [APCS-26]");
fc830a83 11770 else
6c571f00 11771 fprintf (file, " [APCS-32]");
9a5aca8c 11772
96a846ea
RE		 11773 if (flags & EF_ARM_VFP_FLOAT)
11774 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 11775 else if (flags & EF_ARM_MAVERICK_FLOAT)
11776 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 11777 else
11778 fprintf (file, _(" [FPA float format]"));
11779
fd2ec330 11780 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 11781 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 11782
fd2ec330 11783 if (flags & EF_ARM_PIC)
9b485d32 11784 fprintf (file, _(" [position independent]"));
fc830a83 11785
fd2ec330 11786 if (flags & EF_ARM_NEW_ABI)
9b485d32 11787 fprintf (file, _(" [new ABI]"));
9a5aca8c 11788
fd2ec330 11789 if (flags & EF_ARM_OLD_ABI)
9b485d32 11790 fprintf (file, _(" [old ABI]"));
9a5aca8c 11791
fd2ec330 11792 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 11793 fprintf (file, _(" [software FP]"));
9a5aca8c 11794
96a846ea
RE		 11795 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
11796 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 11797 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
11798 | EF_ARM_MAVERICK_FLOAT);
fc830a83 11799 break;
9a5aca8c 11800
fc830a83 11801 case EF_ARM_EABI_VER1:
9b485d32 11802 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 11803
fc830a83 11804 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 11805 fprintf (file, _(" [sorted symbol table]"));
fc830a83 11806 else
9b485d32 11807 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 11808
fc830a83
NC		 11809 flags &= ~ EF_ARM_SYMSARESORTED;
11810 break;
9a5aca8c 11811
fd2ec330
PB		 11812 case EF_ARM_EABI_VER2:
11813 fprintf (file, _(" [Version2 EABI]"));
11814
11815 if (flags & EF_ARM_SYMSARESORTED)
11816 fprintf (file, _(" [sorted symbol table]"));
11817 else
11818 fprintf (file, _(" [unsorted symbol table]"));
11819
11820 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
11821 fprintf (file, _(" [dynamic symbols use segment index]"));
11822
11823 if (flags & EF_ARM_MAPSYMSFIRST)
11824 fprintf (file, _(" [mapping symbols precede others]"));
11825
99e4ae17 11826 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 11827 | EF_ARM_MAPSYMSFIRST);
11828 break;
11829
d507cf36
PB		 11830 case EF_ARM_EABI_VER3:
11831 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 11832 break;
11833
11834 case EF_ARM_EABI_VER4:
11835 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 11836 goto eabi;
d507cf36 11837
3a4a14e9
PB		 11838 case EF_ARM_EABI_VER5:
11839 fprintf (file, _(" [Version5 EABI]"));
11840 eabi:
d507cf36
PB		 11841 if (flags & EF_ARM_BE8)
11842 fprintf (file, _(" [BE8]"));
11843
11844 if (flags & EF_ARM_LE8)
11845 fprintf (file, _(" [LE8]"));
11846
11847 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
11848 break;
11849
fc830a83 11850 default:
9b485d32 11851 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 11852 break;
11853 }
252b5132 11854
fc830a83 11855 flags &= ~ EF_ARM_EABIMASK;
252b5132 11856
fc830a83 11857 if (flags & EF_ARM_RELEXEC)
9b485d32 11858 fprintf (file, _(" [relocatable executable]"));
252b5132 11859
fc830a83 11860 if (flags & EF_ARM_HASENTRY)
9b485d32 11861 fprintf (file, _(" [has entry point]"));
252b5132 11862
fc830a83
NC		 11863 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
11864
11865 if (flags)
9b485d32 11866 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 11867
252b5132
RH		 11868 fputc ('\n', file);
11869
b34976b6 11870 return TRUE;
252b5132
RH		 11871}
11872
11873static int
57e8b36a 11874elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 11875{
2f0ca46a
NC		 11876 switch (ELF_ST_TYPE (elf_sym->st_info))
11877 {
11878 case STT_ARM_TFUNC:
11879 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 11880
2f0ca46a
NC		 11881 case STT_ARM_16BIT:
11882 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
11883 This allows us to distinguish between data used by Thumb instructions
11884 and non-data (which is probably code) inside Thumb regions of an
11885 executable. */
1a0eb693 11886 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 11887 return ELF_ST_TYPE (elf_sym->st_info);
11888 break;
9a5aca8c 11889
ce855c42
NC		 11890 default:
11891 break;
2f0ca46a
NC		 11892 }
11893
11894 return type;
252b5132 11895}
f21f3fe0 11896
252b5132 11897static asection *
07adf181
AM		 11898elf32_arm_gc_mark_hook (asection *sec,
11899 struct bfd_link_info *info,
11900 Elf_Internal_Rela *rel,
11901 struct elf_link_hash_entry *h,
11902 Elf_Internal_Sym *sym)
252b5132
RH		 11903{
11904 if (h != NULL)
07adf181 11905 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 11906 {
11907 case R_ARM_GNU_VTINHERIT:
11908 case R_ARM_GNU_VTENTRY:
07adf181
AM		 11909 return NULL;
11910 }
9ad5cbcf 11911
07adf181 11912 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 11913}
11914
780a67af
NC		 11915/* Update the got entry reference counts for the section being removed. */
11916
b34976b6 11917static bfd_boolean
ba93b8ac
DJ		 11918elf32_arm_gc_sweep_hook (bfd * abfd,
11919 struct bfd_link_info * info,
11920 asection * sec,
11921 const Elf_Internal_Rela * relocs)
252b5132 11922{
5e681ec4
PB		 11923 Elf_Internal_Shdr *symtab_hdr;
11924 struct elf_link_hash_entry **sym_hashes;
11925 bfd_signed_vma *local_got_refcounts;
11926 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 11927 struct elf32_arm_link_hash_table * globals;
11928
7dda2462
TG		 11929 if (info->relocatable)
11930 return TRUE;
11931
eb043451 11932 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11933 if (globals == NULL)
11934 return FALSE;
5e681ec4
PB		 11935
11936 elf_section_data (sec)->local_dynrel = NULL;
11937
0ffa91dd 11938 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 11939 sym_hashes = elf_sym_hashes (abfd);
11940 local_got_refcounts = elf_local_got_refcounts (abfd);
11941
906e58ca 11942 check_use_blx (globals);
bd97cb95 11943
5e681ec4
PB		 11944 relend = relocs + sec->reloc_count;
11945 for (rel = relocs; rel < relend; rel++)
eb043451 11946 {
3eb128b2
AM		 11947 unsigned long r_symndx;
11948 struct elf_link_hash_entry *h = NULL;
f6e32f6d 11949 struct elf32_arm_link_hash_entry *eh;
eb043451 11950 int r_type;
34e77a92 11951 bfd_boolean call_reloc_p;
f6e32f6d
RS		 11952 bfd_boolean may_become_dynamic_p;
11953 bfd_boolean may_need_local_target_p;
34e77a92
RS		 11954 union gotplt_union *root_plt;
11955 struct arm_plt_info *arm_plt;
5e681ec4 11956
3eb128b2
AM		 11957 r_symndx = ELF32_R_SYM (rel->r_info);
11958 if (r_symndx >= symtab_hdr->sh_info)
11959 {
11960 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
11961 while (h->root.type == bfd_link_hash_indirect
11962 || h->root.type == bfd_link_hash_warning)
11963 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11964 }
f6e32f6d
RS		 11965 eh = (struct elf32_arm_link_hash_entry *) h;
11966
34e77a92 11967 call_reloc_p = FALSE;
f6e32f6d
RS		 11968 may_become_dynamic_p = FALSE;
11969 may_need_local_target_p = FALSE;
3eb128b2 11970
eb043451 11971 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 11972 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 11973 switch (r_type)
11974 {
11975 case R_ARM_GOT32:
eb043451 11976 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 11977 case R_ARM_TLS_GD32:
11978 case R_ARM_TLS_IE32:
3eb128b2 11979 if (h != NULL)
eb043451 11980 {
eb043451
PB		 11981 if (h->got.refcount > 0)
11982 h->got.refcount -= 1;
11983 }
11984 else if (local_got_refcounts != NULL)
11985 {
11986 if (local_got_refcounts[r_symndx] > 0)
11987 local_got_refcounts[r_symndx] -= 1;
11988 }
11989 break;
11990
ba93b8ac 11991 case R_ARM_TLS_LDM32:
4dfe6ac6 11992 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 11993 break;
11994
eb043451
PB		 11995 case R_ARM_PC24:
11996 case R_ARM_PLT32:
5b5bb741
PB		 11997 case R_ARM_CALL:
11998 case R_ARM_JUMP24:
eb043451 11999 case R_ARM_PREL31:
c19d1205 12000 case R_ARM_THM_CALL:
bd97cb95
DJ		 12001 case R_ARM_THM_JUMP24:
12002 case R_ARM_THM_JUMP19:
34e77a92 12003 call_reloc_p = TRUE;
f6e32f6d
RS		 12004 may_need_local_target_p = TRUE;
12005 break;
12006
12007 case R_ARM_ABS12:
12008 if (!globals->vxworks_p)
12009 {
12010 may_need_local_target_p = TRUE;
12011 break;
12012 }
12013 /* Fall through. */
12014 case R_ARM_ABS32:
12015 case R_ARM_ABS32_NOI:
12016 case R_ARM_REL32:
12017 case R_ARM_REL32_NOI:
b6895b4f
PB		 12018 case R_ARM_MOVW_ABS_NC:
12019 case R_ARM_MOVT_ABS:
12020 case R_ARM_MOVW_PREL_NC:
12021 case R_ARM_MOVT_PREL:
12022 case R_ARM_THM_MOVW_ABS_NC:
12023 case R_ARM_THM_MOVT_ABS:
12024 case R_ARM_THM_MOVW_PREL_NC:
12025 case R_ARM_THM_MOVT_PREL:
b7693d02 12026 /* Should the interworking branches be here also? */
f6e32f6d 12027 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12028 && (sec->flags & SEC_ALLOC) != 0)
12029 {
12030 if (h == NULL
12031 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12032 {
12033 call_reloc_p = TRUE;
12034 may_need_local_target_p = TRUE;
12035 }
12036 else
12037 may_become_dynamic_p = TRUE;
12038 }
f6e32f6d
RS		 12039 else
12040 may_need_local_target_p = TRUE;
12041 break;
b7693d02 12042
f6e32f6d
RS		 12043 default:
12044 break;
12045 }
5e681ec4 12046
34e77a92
RS		 12047 if (may_need_local_target_p
12048 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12049 {
34e77a92
RS		 12050 BFD_ASSERT (root_plt->refcount > 0);
12051 root_plt->refcount -= 1;
12052
12053 if (!call_reloc_p)
12054 arm_plt->noncall_refcount--;
5e681ec4 12055
f6e32f6d 12056 if (r_type == R_ARM_THM_CALL)
34e77a92 12057 arm_plt->maybe_thumb_refcount--;
bd97cb95 12058
f6e32f6d
RS		 12059 if (r_type == R_ARM_THM_JUMP24
12060 || r_type == R_ARM_THM_JUMP19)
34e77a92 12061 arm_plt->thumb_refcount--;
f6e32f6d 12062 }
5e681ec4 12063
34e77a92 12064 if (may_become_dynamic_p)
f6e32f6d
RS		 12065 {
12066 struct elf_dyn_relocs **pp;
12067 struct elf_dyn_relocs *p;
5e681ec4 12068
34e77a92 12069 if (h != NULL)
9c489990 12070 pp = &(eh->dyn_relocs);
34e77a92
RS		 12071 else
12072 {
12073 Elf_Internal_Sym *isym;
12074
12075 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12076 abfd, r_symndx);
12077 if (isym == NULL)
12078 return FALSE;
12079 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12080 if (pp == NULL)
12081 return FALSE;
12082 }
9c489990 12083 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12084 if (p->sec == sec)
12085 {
12086 /* Everything must go for SEC. */
12087 *pp = p->next;
12088 break;
12089 }
eb043451
PB		 12090 }
12091 }
5e681ec4 12092
b34976b6 12093 return TRUE;
252b5132
RH		 12094}
12095
780a67af
NC		 12096/* Look through the relocs for a section during the first phase. */
12097
b34976b6 12098static bfd_boolean
57e8b36a
NC		 12099elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12100 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12101{
b34976b6
AM		 12102 Elf_Internal_Shdr *symtab_hdr;
12103 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12104 const Elf_Internal_Rela *rel;
12105 const Elf_Internal_Rela *rel_end;
12106 bfd *dynobj;
5e681ec4 12107 asection *sreloc;
5e681ec4 12108 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12109 bfd_boolean call_reloc_p;
12110 bfd_boolean may_become_dynamic_p;
12111 bfd_boolean may_need_local_target_p;
ce98a316 12112 unsigned long nsyms;
9a5aca8c 12113
1049f94e 12114 if (info->relocatable)
b34976b6 12115 return TRUE;
9a5aca8c 12116
0ffa91dd
NC		 12117 BFD_ASSERT (is_arm_elf (abfd));
12118
5e681ec4 12119 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12120 if (htab == NULL)
12121 return FALSE;
12122
5e681ec4 12123 sreloc = NULL;
9a5aca8c 12124
67687978
PB		 12125 /* Create dynamic sections for relocatable executables so that we can
12126 copy relocations. */
12127 if (htab->root.is_relocatable_executable
12128 && ! htab->root.dynamic_sections_created)
12129 {
12130 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12131 return FALSE;
12132 }
12133
cbc704f3
RS		 12134 if (htab->root.dynobj == NULL)
12135 htab->root.dynobj = abfd;
34e77a92
RS		 12136 if (!create_ifunc_sections (info))
12137 return FALSE;
cbc704f3
RS		 12138
12139 dynobj = htab->root.dynobj;
12140
0ffa91dd 12141 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12142 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 12143 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12144
252b5132
RH		 12145 rel_end = relocs + sec->reloc_count;
12146 for (rel = relocs; rel < rel_end; rel++)
12147 {
34e77a92 12148 Elf_Internal_Sym *isym;
252b5132 12149 struct elf_link_hash_entry *h;
b7693d02 12150 struct elf32_arm_link_hash_entry *eh;
252b5132 12151 unsigned long r_symndx;
eb043451 12152 int r_type;
9a5aca8c 12153
252b5132 12154 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12155 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12156 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12157
ce98a316
NC		 12158 if (r_symndx >= nsyms
12159 /* PR 9934: It is possible to have relocations that do not
12160 refer to symbols, thus it is also possible to have an
12161 object file containing relocations but no symbol table. */
cf35638d 12162 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12163 {
12164 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12165 r_symndx);
ba93b8ac
DJ		 12166 return FALSE;
12167 }
12168
34e77a92
RS		 12169 h = NULL;
12170 isym = NULL;
12171 if (nsyms > 0)
973a3492 12172 {
34e77a92
RS		 12173 if (r_symndx < symtab_hdr->sh_info)
12174 {
12175 /* A local symbol. */
12176 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12177 abfd, r_symndx);
12178 if (isym == NULL)
12179 return FALSE;
12180 }
12181 else
12182 {
12183 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12184 while (h->root.type == bfd_link_hash_indirect
12185 || h->root.type == bfd_link_hash_warning)
12186 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12187 }
973a3492 12188 }
9a5aca8c 12189
b7693d02
DJ		 12190 eh = (struct elf32_arm_link_hash_entry *) h;
12191
f6e32f6d
RS		 12192 call_reloc_p = FALSE;
12193 may_become_dynamic_p = FALSE;
12194 may_need_local_target_p = FALSE;
12195
0855e32b
NS		 12196 /* Could be done earlier, if h were already available. */
12197 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12198 switch (r_type)
252b5132 12199 {
5e681ec4 12200 case R_ARM_GOT32:
eb043451 12201 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12202 case R_ARM_TLS_GD32:
12203 case R_ARM_TLS_IE32:
0855e32b
NS		 12204 case R_ARM_TLS_GOTDESC:
12205 case R_ARM_TLS_DESCSEQ:
12206 case R_ARM_THM_TLS_DESCSEQ:
12207 case R_ARM_TLS_CALL:
12208 case R_ARM_THM_TLS_CALL:
5e681ec4 12209 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12210 {
12211 int tls_type, old_tls_type;
5e681ec4 12212
ba93b8ac
DJ		 12213 switch (r_type)
12214 {
12215 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
0855e32b 12216
ba93b8ac 12217 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
0855e32b
NS		 12218
12219 case R_ARM_TLS_GOTDESC:
12220 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12221 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12222 tls_type = GOT_TLS_GDESC; break;
12223
ba93b8ac
DJ		 12224 default: tls_type = GOT_NORMAL; break;
12225 }
252b5132 12226
ba93b8ac
DJ		 12227 if (h != NULL)
12228 {
12229 h->got.refcount++;
12230 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12231 }
12232 else
12233 {
ba93b8ac 12234 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12235 if (!elf32_arm_allocate_local_sym_info (abfd))
12236 return FALSE;
12237 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12238 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12239 }
12240
0855e32b
NS		 12241 /* If a variable is accessed with both tls methods, two
12242 slots may be created. */
12243 if (GOT_TLS_GD_ANY_P (old_tls_type)
12244 && GOT_TLS_GD_ANY_P (tls_type))
12245 tls_type |= old_tls_type;
12246
12247 /* We will already have issued an error message if there
12248 is a TLS/non-TLS mismatch, based on the symbol
12249 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12250 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12251 && tls_type != GOT_NORMAL)
12252 tls_type |= old_tls_type;
12253
0855e32b
NS		 12254 /* If the symbol is accessed in both IE and GDESC
12255 method, we're able to relax. Turn off the GDESC flag,
12256 without messing up with any other kind of tls types
12257 that may be involved */
12258 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12259 tls_type &= ~GOT_TLS_GDESC;
12260
ba93b8ac
DJ		 12261 if (old_tls_type != tls_type)
12262 {
12263 if (h != NULL)
12264 elf32_arm_hash_entry (h)->tls_type = tls_type;
12265 else
12266 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12267 }
12268 }
8029a119 12269 /* Fall through. */
ba93b8ac
DJ		 12270
12271 case R_ARM_TLS_LDM32:
12272 if (r_type == R_ARM_TLS_LDM32)
12273 htab->tls_ldm_got.refcount++;
8029a119 12274 /* Fall through. */
252b5132 12275
c19d1205 12276 case R_ARM_GOTOFF32:
5e681ec4 12277 case R_ARM_GOTPC:
cbc704f3
RS		 12278 if (htab->root.sgot == NULL
12279 && !create_got_section (htab->root.dynobj, info))
12280 return FALSE;
252b5132
RH		 12281 break;
12282
252b5132 12283 case R_ARM_PC24:
7359ea65 12284 case R_ARM_PLT32:
5b5bb741
PB		 12285 case R_ARM_CALL:
12286 case R_ARM_JUMP24:
eb043451 12287 case R_ARM_PREL31:
c19d1205 12288 case R_ARM_THM_CALL:
bd97cb95
DJ		 12289 case R_ARM_THM_JUMP24:
12290 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12291 call_reloc_p = TRUE;
12292 may_need_local_target_p = TRUE;
12293 break;
12294
12295 case R_ARM_ABS12:
12296 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12297 ldr __GOTT_INDEX__ offsets. */
12298 if (!htab->vxworks_p)
12299 {
12300 may_need_local_target_p = TRUE;
12301 break;
12302 }
12303 /* Fall through. */
39623e12 12304
96c23d59
JM		 12305 case R_ARM_MOVW_ABS_NC:
12306 case R_ARM_MOVT_ABS:
12307 case R_ARM_THM_MOVW_ABS_NC:
12308 case R_ARM_THM_MOVT_ABS:
12309 if (info->shared)
12310 {
12311 (*_bfd_error_handler)
12312 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12313 abfd, elf32_arm_howto_table_1[r_type].name,
12314 (h) ? h->root.root.string : "a local symbol");
12315 bfd_set_error (bfd_error_bad_value);
12316 return FALSE;
12317 }
12318
12319 /* Fall through. */
39623e12
PB		 12320 case R_ARM_ABS32:
12321 case R_ARM_ABS32_NOI:
12322 case R_ARM_REL32:
12323 case R_ARM_REL32_NOI:
b6895b4f
PB		 12324 case R_ARM_MOVW_PREL_NC:
12325 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12326 case R_ARM_THM_MOVW_PREL_NC:
12327 case R_ARM_THM_MOVT_PREL:
39623e12 12328
b7693d02 12329 /* Should the interworking branches be listed here? */
67687978 12330 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12331 && (sec->flags & SEC_ALLOC) != 0)
12332 {
12333 if (h == NULL
12334 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12335 {
12336 /* In shared libraries and relocatable executables,
12337 we treat local relative references as calls;
12338 see the related SYMBOL_CALLS_LOCAL code in
12339 allocate_dynrelocs. */
12340 call_reloc_p = TRUE;
12341 may_need_local_target_p = TRUE;
12342 }
12343 else
12344 /* We are creating a shared library or relocatable
12345 executable, and this is a reloc against a global symbol,
12346 or a non-PC-relative reloc against a local symbol.
12347 We may need to copy the reloc into the output. */
12348 may_become_dynamic_p = TRUE;
12349 }
f6e32f6d
RS		 12350 else
12351 may_need_local_target_p = TRUE;
252b5132
RH		 12352 break;
12353
12354 /* This relocation describes the C++ object vtable hierarchy.
12355 Reconstruct it for later use during GC. */
12356 case R_ARM_GNU_VTINHERIT:
c152c796 12357 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 12358 return FALSE;
252b5132 12359 break;
9a5aca8c 12360
252b5132
RH		 12361 /* This relocation describes which C++ vtable entries are actually
12362 used. Record for later use during GC. */
12363 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 12364 BFD_ASSERT (h != NULL);
12365 if (h != NULL
12366 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 12367 return FALSE;
252b5132
RH		 12368 break;
12369 }
f6e32f6d
RS		 12370
12371 if (h != NULL)
12372 {
12373 if (call_reloc_p)
12374 /* We may need a .plt entry if the function this reloc
12375 refers to is in a different object, regardless of the
12376 symbol's type. We can't tell for sure yet, because
12377 something later might force the symbol local. */
12378 h->needs_plt = 1;
12379 else if (may_need_local_target_p)
12380 /* If this reloc is in a read-only section, we might
12381 need a copy reloc. We can't check reliably at this
12382 stage whether the section is read-only, as input
12383 sections have not yet been mapped to output sections.
12384 Tentatively set the flag for now, and correct in
12385 adjust_dynamic_symbol. */
12386 h->non_got_ref = 1;
12387 }
12388
34e77a92
RS		 12389 if (may_need_local_target_p
12390 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12391 {
34e77a92
RS		 12392 union gotplt_union *root_plt;
12393 struct arm_plt_info *arm_plt;
12394 struct arm_local_iplt_info *local_iplt;
12395
12396 if (h != NULL)
12397 {
12398 root_plt = &h->plt;
12399 arm_plt = &eh->plt;
12400 }
12401 else
12402 {
12403 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12404 if (local_iplt == NULL)
12405 return FALSE;
12406 root_plt = &local_iplt->root;
12407 arm_plt = &local_iplt->arm;
12408 }
12409
f6e32f6d
RS		 12410 /* If the symbol is a function that doesn't bind locally,
12411 this relocation will need a PLT entry. */
34e77a92
RS		 12412 root_plt->refcount += 1;
12413
12414 if (!call_reloc_p)
12415 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12416
12417 /* It's too early to use htab->use_blx here, so we have to
12418 record possible blx references separately from
12419 relocs that definitely need a thumb stub. */
12420
12421 if (r_type == R_ARM_THM_CALL)
34e77a92 12422 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12423
12424 if (r_type == R_ARM_THM_JUMP24
12425 || r_type == R_ARM_THM_JUMP19)
34e77a92 12426 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12427 }
12428
12429 if (may_become_dynamic_p)
12430 {
12431 struct elf_dyn_relocs *p, **head;
12432
12433 /* Create a reloc section in dynobj. */
12434 if (sreloc == NULL)
12435 {
12436 sreloc = _bfd_elf_make_dynamic_reloc_section
12437 (sec, dynobj, 2, abfd, ! htab->use_rel);
12438
12439 if (sreloc == NULL)
12440 return FALSE;
12441
12442 /* BPABI objects never have dynamic relocations mapped. */
12443 if (htab->symbian_p)
12444 {
12445 flagword flags;
12446
12447 flags = bfd_get_section_flags (dynobj, sreloc);
12448 flags &= ~(SEC_LOAD | SEC_ALLOC);
12449 bfd_set_section_flags (dynobj, sreloc, flags);
12450 }
12451 }
12452
12453 /* If this is a global symbol, count the number of
12454 relocations we need for this symbol. */
12455 if (h != NULL)
12456 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12457 else
12458 {
34e77a92
RS		 12459 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12460 if (head == NULL)
f6e32f6d 12461 return FALSE;
f6e32f6d
RS		 12462 }
12463
12464 p = *head;
12465 if (p == NULL || p->sec != sec)
12466 {
12467 bfd_size_type amt = sizeof *p;
12468
12469 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12470 if (p == NULL)
12471 return FALSE;
12472 p->next = *head;
12473 *head = p;
12474 p->sec = sec;
12475 p->count = 0;
12476 p->pc_count = 0;
12477 }
12478
12479 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12480 p->pc_count += 1;
12481 p->count += 1;
12482 }
252b5132 12483 }
f21f3fe0 12484
b34976b6 12485 return TRUE;
252b5132
RH		 12486}
12487
6a5bb875
PB		 12488/* Unwinding tables are not referenced directly. This pass marks them as
12489 required if the corresponding code section is marked. */
12490
12491static bfd_boolean
906e58ca
NC		 12492elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12493 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12494{
12495 bfd *sub;
12496 Elf_Internal_Shdr **elf_shdrp;
12497 bfd_boolean again;
12498
7f6ab9f8
AM		 12499 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12500
6a5bb875
PB		 12501 /* Marking EH data may cause additional code sections to be marked,
12502 requiring multiple passes. */
12503 again = TRUE;
12504 while (again)
12505 {
12506 again = FALSE;
12507 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12508 {
12509 asection *o;
12510
0ffa91dd 12511 if (! is_arm_elf (sub))
6a5bb875
PB		 12512 continue;
12513
12514 elf_shdrp = elf_elfsections (sub);
12515 for (o = sub->sections; o != NULL; o = o->next)
12516 {
12517 Elf_Internal_Shdr *hdr;
0ffa91dd 12518
6a5bb875 12519 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12520 if (hdr->sh_type == SHT_ARM_EXIDX
12521 && hdr->sh_link
12522 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12523 && !o->gc_mark
12524 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12525 {
12526 again = TRUE;
12527 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12528 return FALSE;
12529 }
12530 }
12531 }
12532 }
12533
12534 return TRUE;
12535}
12536
3c9458e9
NC		 12537/* Treat mapping symbols as special target symbols. */
12538
12539static bfd_boolean
12540elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12541{
b0796911
PB		 12542 return bfd_is_arm_special_symbol_name (sym->name,
12543 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12544}
12545
0367ecfb
NC		 12546/* This is a copy of elf_find_function() from elf.c except that
12547 ARM mapping symbols are ignored when looking for function names
12548 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12549
0367ecfb
NC		 12550static bfd_boolean
12551arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12552 asection * section,
12553 asymbol ** symbols,
12554 bfd_vma offset,
12555 const char ** filename_ptr,
12556 const char ** functionname_ptr)
12557{
12558 const char * filename = NULL;
12559 asymbol * func = NULL;
12560 bfd_vma low_func = 0;
12561 asymbol ** p;
252b5132
RH		 12562
12563 for (p = symbols; *p != NULL; p++)
12564 {
12565 elf_symbol_type *q;
12566
12567 q = (elf_symbol_type *) *p;
12568
252b5132
RH		 12569 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12570 {
12571 default:
12572 break;
12573 case STT_FILE:
12574 filename = bfd_asymbol_name (&q->symbol);
12575 break;
252b5132
RH		 12576 case STT_FUNC:
12577 case STT_ARM_TFUNC:
9d2da7ca 12578 case STT_NOTYPE:
b0796911 12579 /* Skip mapping symbols. */
0367ecfb 12580 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12581 && bfd_is_arm_special_symbol_name (q->symbol.name,
12582 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12583 continue;
12584 /* Fall through. */
6b40fcba 12585 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12586 && q->symbol.value >= low_func
12587 && q->symbol.value <= offset)
12588 {
12589 func = (asymbol *) q;
12590 low_func = q->symbol.value;
12591 }
12592 break;
12593 }
12594 }
12595
12596 if (func == NULL)
b34976b6 12597 return FALSE;
252b5132 12598
0367ecfb
NC		 12599 if (filename_ptr)
12600 *filename_ptr = filename;
12601 if (functionname_ptr)
12602 *functionname_ptr = bfd_asymbol_name (func);
12603
12604 return TRUE;
906e58ca 12605}
0367ecfb
NC		 12606
12607
12608/* Find the nearest line to a particular section and offset, for error
12609 reporting. This code is a duplicate of the code in elf.c, except
12610 that it uses arm_elf_find_function. */
12611
12612static bfd_boolean
12613elf32_arm_find_nearest_line (bfd * abfd,
12614 asection * section,
12615 asymbol ** symbols,
12616 bfd_vma offset,
12617 const char ** filename_ptr,
12618 const char ** functionname_ptr,
12619 unsigned int * line_ptr)
12620{
12621 bfd_boolean found = FALSE;
12622
12623 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12624
fc28f9aa
TG		 12625 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12626 section, symbols, offset,
0367ecfb
NC		 12627 filename_ptr, functionname_ptr,
12628 line_ptr, 0,
12629 & elf_tdata (abfd)->dwarf2_find_line_info))
12630 {
12631 if (!*functionname_ptr)
12632 arm_elf_find_function (abfd, section, symbols, offset,
12633 *filename_ptr ? NULL : filename_ptr,
12634 functionname_ptr);
f21f3fe0 12635
0367ecfb
NC		 12636 return TRUE;
12637 }
12638
12639 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12640 & found, filename_ptr,
12641 functionname_ptr, line_ptr,
12642 & elf_tdata (abfd)->line_info))
12643 return FALSE;
12644
12645 if (found && (*functionname_ptr || *line_ptr))
12646 return TRUE;
12647
12648 if (symbols == NULL)
12649 return FALSE;
12650
12651 if (! arm_elf_find_function (abfd, section, symbols, offset,
12652 filename_ptr, functionname_ptr))
12653 return FALSE;
12654
12655 *line_ptr = 0;
b34976b6 12656 return TRUE;
252b5132
RH		 12657}
12658
4ab527b0
FF		 12659static bfd_boolean
12660elf32_arm_find_inliner_info (bfd * abfd,
12661 const char ** filename_ptr,
12662 const char ** functionname_ptr,
12663 unsigned int * line_ptr)
12664{
12665 bfd_boolean found;
12666 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12667 functionname_ptr, line_ptr,
12668 & elf_tdata (abfd)->dwarf2_find_line_info);
12669 return found;
12670}
12671
252b5132
RH		 12672/* Adjust a symbol defined by a dynamic object and referenced by a
12673 regular object. The current definition is in some section of the
12674 dynamic object, but we're not including those sections. We have to
12675 change the definition to something the rest of the link can
12676 understand. */
12677
b34976b6 12678static bfd_boolean
57e8b36a
NC		 12679elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12680 struct elf_link_hash_entry * h)
252b5132
RH		 12681{
12682 bfd * dynobj;
12683 asection * s;
b7693d02 12684 struct elf32_arm_link_hash_entry * eh;
67687978 12685 struct elf32_arm_link_hash_table *globals;
252b5132 12686
67687978 12687 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12688 if (globals == NULL)
12689 return FALSE;
12690
252b5132
RH		 12691 dynobj = elf_hash_table (info)->dynobj;
12692
12693 /* Make sure we know what is going on here. */
12694 BFD_ASSERT (dynobj != NULL
f5385ebf 12695 && (h->needs_plt
34e77a92 12696 || h->type == STT_GNU_IFUNC
f6e332e6 12697 || h->u.weakdef != NULL
f5385ebf
AM		 12698 || (h->def_dynamic
12699 && h->ref_regular
12700 && !h->def_regular)));
252b5132 12701
b7693d02
DJ		 12702 eh = (struct elf32_arm_link_hash_entry *) h;
12703
252b5132
RH		 12704 /* If this is a function, put it in the procedure linkage table. We
12705 will fill in the contents of the procedure linkage table later,
12706 when we know the address of the .got section. */
34e77a92 12707 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 12708 {
34e77a92
RS		 12709 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12710 symbol binds locally. */
5e681ec4 12711 if (h->plt.refcount <= 0
34e77a92
RS		 12712 || (h->type != STT_GNU_IFUNC
12713 && (SYMBOL_CALLS_LOCAL (info, h)
12714 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12715 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 12716 {
12717 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 12718 file, but the symbol was never referred to by a dynamic
12719 object, or if all references were garbage collected. In
12720 such a case, we don't actually need to build a procedure
12721 linkage table, and we can just do a PC24 reloc instead. */
12722 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12723 eh->plt.thumb_refcount = 0;
12724 eh->plt.maybe_thumb_refcount = 0;
12725 eh->plt.noncall_refcount = 0;
f5385ebf 12726 h->needs_plt = 0;
252b5132
RH		 12727 }
12728
b34976b6 12729 return TRUE;
252b5132 12730 }
5e681ec4 12731 else
b7693d02
DJ		 12732 {
12733 /* It's possible that we incorrectly decided a .plt reloc was
12734 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12735 in check_relocs. We can't decide accurately between function
12736 and non-function syms in check-relocs; Objects loaded later in
12737 the link may change h->type. So fix it now. */
12738 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 12739 eh->plt.thumb_refcount = 0;
12740 eh->plt.maybe_thumb_refcount = 0;
12741 eh->plt.noncall_refcount = 0;
b7693d02 12742 }
252b5132
RH		 12743
12744 /* If this is a weak symbol, and there is a real definition, the
12745 processor independent code will have arranged for us to see the
12746 real definition first, and we can just use the same value. */
f6e332e6 12747 if (h->u.weakdef != NULL)
252b5132 12748 {
f6e332e6
AM		 12749 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
12750 || h->u.weakdef->root.type == bfd_link_hash_defweak);
12751 h->root.u.def.section = h->u.weakdef->root.u.def.section;
12752 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 12753 return TRUE;
252b5132
RH		 12754 }
12755
ba93b8ac
DJ		 12756 /* If there are no non-GOT references, we do not need a copy
12757 relocation. */
12758 if (!h->non_got_ref)
12759 return TRUE;
12760
252b5132
RH		 12761 /* This is a reference to a symbol defined by a dynamic object which
12762 is not a function. */
12763
12764 /* If we are creating a shared library, we must presume that the
12765 only references to the symbol are via the global offset table.
12766 For such cases we need not do anything here; the relocations will
67687978
PB		 12767 be handled correctly by relocate_section. Relocatable executables
12768 can reference data in shared objects directly, so we don't need to
12769 do anything here. */
12770 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 12771 return TRUE;
252b5132 12772
909272ee
AM		 12773 if (h->size == 0)
12774 {
12775 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
12776 h->root.root.string);
12777 return TRUE;
12778 }
12779
252b5132
RH		 12780 /* We must allocate the symbol in our .dynbss section, which will
12781 become part of the .bss section of the executable. There will be
12782 an entry for this symbol in the .dynsym section. The dynamic
12783 object will contain position independent code, so all references
12784 from the dynamic object to this symbol will go through the global
12785 offset table. The dynamic linker will use the .dynsym entry to
12786 determine the address it must put in the global offset table, so
12787 both the dynamic object and the regular object will refer to the
12788 same memory location for the variable. */
252b5132
RH		 12789 s = bfd_get_section_by_name (dynobj, ".dynbss");
12790 BFD_ASSERT (s != NULL);
12791
12792 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
12793 copy the initial value out of the dynamic object and into the
12794 runtime process image. We need to remember the offset into the
00a97672 12795 .rel(a).bss section we are going to use. */
252b5132
RH		 12796 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
12797 {
12798 asection *srel;
12799
00a97672 12800 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 12801 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 12802 h->needs_copy = 1;
252b5132
RH		 12803 }
12804
027297b7 12805 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 12806}
12807
5e681ec4
PB		 12808/* Allocate space in .plt, .got and associated reloc sections for
12809 dynamic relocs. */
12810
12811static bfd_boolean
47beaa6a 12812allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 12813{
12814 struct bfd_link_info *info;
12815 struct elf32_arm_link_hash_table *htab;
12816 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 12817 struct elf_dyn_relocs *p;
5e681ec4
PB		 12818
12819 if (h->root.type == bfd_link_hash_indirect)
12820 return TRUE;
12821
e6a6bb22
AM		 12822 eh = (struct elf32_arm_link_hash_entry *) h;
12823
5e681ec4
PB		 12824 info = (struct bfd_link_info *) inf;
12825 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12826 if (htab == NULL)
12827 return FALSE;
5e681ec4 12828
34e77a92 12829 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 12830 && h->plt.refcount > 0)
12831 {
12832 /* Make sure this symbol is output as a dynamic symbol.
12833 Undefined weak syms won't yet be marked as dynamic. */
12834 if (h->dynindx == -1
f5385ebf 12835 && !h->forced_local)
5e681ec4 12836 {
c152c796 12837 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12838 return FALSE;
12839 }
12840
34e77a92
RS		 12841 /* If the call in the PLT entry binds locally, the associated
12842 GOT entry should use an R_ARM_IRELATIVE relocation instead of
12843 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
12844 than the .plt section. */
12845 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
12846 {
12847 eh->is_iplt = 1;
12848 if (eh->plt.noncall_refcount == 0
12849 && SYMBOL_REFERENCES_LOCAL (info, h))
12850 /* All non-call references can be resolved directly.
12851 This means that they can (and in some cases, must)
12852 resolve directly to the run-time target, rather than
12853 to the PLT. That in turns means that any .got entry
12854 would be equal to the .igot.plt entry, so there's
12855 no point having both. */
12856 h->got.refcount = 0;
12857 }
12858
5e681ec4 12859 if (info->shared
34e77a92 12860 || eh->is_iplt
7359ea65 12861 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 12862 {
34e77a92 12863 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 12864
5e681ec4
PB		 12865 /* If this symbol is not defined in a regular file, and we are
12866 not generating a shared library, then set the symbol to this
12867 location in the .plt. This is required to make function
12868 pointers compare as equal between the normal executable and
12869 the shared library. */
12870 if (! info->shared
f5385ebf 12871 && !h->def_regular)
5e681ec4 12872 {
34e77a92 12873 h->root.u.def.section = htab->root.splt;
5e681ec4 12874 h->root.u.def.value = h->plt.offset;
5e681ec4 12875
67d74e43
DJ		 12876 /* Make sure the function is not marked as Thumb, in case
12877 it is the target of an ABS32 relocation, which will
12878 point to the PLT entry. */
35fc36a8 12879 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 12880 }
022f8312 12881
0855e32b 12882 htab->next_tls_desc_index++;
00a97672
RS		 12883
12884 /* VxWorks executables have a second set of relocations for
12885 each PLT entry. They go in a separate relocation section,
12886 which is processed by the kernel loader. */
12887 if (htab->vxworks_p && !info->shared)
12888 {
12889 /* There is a relocation for the initial PLT entry:
12890 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
12891 if (h->plt.offset == htab->plt_header_size)
47beaa6a 12892 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 12893
12894 /* There are two extra relocations for each subsequent
12895 PLT entry: an R_ARM_32 relocation for the GOT entry,
12896 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 12897 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 12898 }
5e681ec4
PB		 12899 }
12900 else
12901 {
12902 h->plt.offset = (bfd_vma) -1;
f5385ebf 12903 h->needs_plt = 0;
5e681ec4
PB		 12904 }
12905 }
12906 else
12907 {
12908 h->plt.offset = (bfd_vma) -1;
f5385ebf 12909 h->needs_plt = 0;
5e681ec4
PB		 12910 }
12911
0855e32b
NS		 12912 eh = (struct elf32_arm_link_hash_entry *) h;
12913 eh->tlsdesc_got = (bfd_vma) -1;
12914
5e681ec4
PB		 12915 if (h->got.refcount > 0)
12916 {
12917 asection *s;
12918 bfd_boolean dyn;
ba93b8ac
DJ		 12919 int tls_type = elf32_arm_hash_entry (h)->tls_type;
12920 int indx;
5e681ec4
PB		 12921
12922 /* Make sure this symbol is output as a dynamic symbol.
12923 Undefined weak syms won't yet be marked as dynamic. */
12924 if (h->dynindx == -1
f5385ebf 12925 && !h->forced_local)
5e681ec4 12926 {
c152c796 12927 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 12928 return FALSE;
12929 }
12930
e5a52504
MM		 12931 if (!htab->symbian_p)
12932 {
362d30a1 12933 s = htab->root.sgot;
e5a52504 12934 h->got.offset = s->size;
ba93b8ac
DJ		 12935
12936 if (tls_type == GOT_UNKNOWN)
12937 abort ();
12938
12939 if (tls_type == GOT_NORMAL)
12940 /* Non-TLS symbols need one GOT slot. */
12941 s->size += 4;
12942 else
12943 {
0855e32b
NS		 12944 if (tls_type & GOT_TLS_GDESC)
12945 {
12946 /* R_ARM_TLS_DESC needs 2 GOT slots. */
12947 eh->tlsdesc_got
12948 = (htab->root.sgotplt->size
12949 - elf32_arm_compute_jump_table_size (htab));
12950 htab->root.sgotplt->size += 8;
12951 h->got.offset = (bfd_vma) -2;
34e77a92 12952 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 12953 reloc in the middle of .got.plt. */
12954 htab->num_tls_desc++;
12955 }
12956
ba93b8ac 12957 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 12958 {
12959 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
12960 the symbol is both GD and GDESC, got.offset may
12961 have been overwritten. */
12962 h->got.offset = s->size;
12963 s->size += 8;
12964 }
12965
ba93b8ac
DJ		 12966 if (tls_type & GOT_TLS_IE)
12967 /* R_ARM_TLS_IE32 needs one GOT slot. */
12968 s->size += 4;
12969 }
12970
e5a52504 12971 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 12972
12973 indx = 0;
12974 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
12975 && (!info->shared
12976 || !SYMBOL_REFERENCES_LOCAL (info, h)))
12977 indx = h->dynindx;
12978
12979 if (tls_type != GOT_NORMAL
12980 && (info->shared || indx != 0)
12981 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
12982 || h->root.type != bfd_link_hash_undefweak))
12983 {
12984 if (tls_type & GOT_TLS_IE)
47beaa6a 12985 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 12986
12987 if (tls_type & GOT_TLS_GD)
47beaa6a 12988 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 12989
0855e32b
NS		 12990 if (tls_type & GOT_TLS_GDESC)
12991 {
47beaa6a 12992 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 12993 /* GDESC needs a trampoline to jump to. */
12994 htab->tls_trampoline = -1;
12995 }
12996
12997 /* Only GD needs it. GDESC just emits one relocation per
12998 2 entries. */
12999 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13000 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13001 }
b436d854
RS		 13002 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13003 {
13004 if (htab->root.dynamic_sections_created)
13005 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13006 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13007 }
34e77a92
RS		 13008 else if (h->type == STT_GNU_IFUNC
13009 && eh->plt.noncall_refcount == 0)
13010 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13011 they all resolve dynamically instead. Reserve room for the
13012 GOT entry's R_ARM_IRELATIVE relocation. */
13013 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
b436d854
RS		 13014 else if (info->shared)
13015 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13016 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13017 }
5e681ec4
PB		 13018 }
13019 else
13020 h->got.offset = (bfd_vma) -1;
13021
a4fd1a8e
PB		 13022 /* Allocate stubs for exported Thumb functions on v4t. */
13023 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13024 && h->def_regular
35fc36a8 13025 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13026 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13027 {
13028 struct elf_link_hash_entry * th;
13029 struct bfd_link_hash_entry * bh;
13030 struct elf_link_hash_entry * myh;
13031 char name[1024];
13032 asection *s;
13033 bh = NULL;
13034 /* Create a new symbol to regist the real location of the function. */
13035 s = h->root.u.def.section;
906e58ca 13036 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13037 _bfd_generic_link_add_one_symbol (info, s->owner,
13038 name, BSF_GLOBAL, s,
13039 h->root.u.def.value,
13040 NULL, TRUE, FALSE, &bh);
13041
13042 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13043 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13044 myh->forced_local = 1;
35fc36a8 13045 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13046 eh->export_glue = myh;
13047 th = record_arm_to_thumb_glue (info, h);
13048 /* Point the symbol at the stub. */
13049 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13050 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13051 h->root.u.def.section = th->root.u.def.section;
13052 h->root.u.def.value = th->root.u.def.value & ~1;
13053 }
13054
0bdcacaf 13055 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13056 return TRUE;
13057
13058 /* In the shared -Bsymbolic case, discard space allocated for
13059 dynamic pc-relative relocs against symbols which turn out to be
13060 defined in regular objects. For the normal shared case, discard
13061 space for pc-relative relocs that have become local due to symbol
13062 visibility changes. */
13063
67687978 13064 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13065 {
7bdca076 13066 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 13067 R_ARM_REL32_NOI, which will appear on something like
13068 ".long foo - .". We want calls to protected symbols to resolve
13069 directly to the function rather than going via the plt. If people
13070 want function pointer comparisons to work as expected then they
13071 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13072 if (SYMBOL_CALLS_LOCAL (info, h))
13073 {
0bdcacaf 13074 struct elf_dyn_relocs **pp;
ba93b8ac 13075
0bdcacaf 13076 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13077 {
13078 p->count -= p->pc_count;
13079 p->pc_count = 0;
13080 if (p->count == 0)
13081 *pp = p->next;
13082 else
13083 pp = &p->next;
13084 }
13085 }
13086
4dfe6ac6 13087 if (htab->vxworks_p)
3348747a 13088 {
0bdcacaf 13089 struct elf_dyn_relocs **pp;
3348747a 13090
0bdcacaf 13091 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13092 {
0bdcacaf 13093 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13094 *pp = p->next;
13095 else
13096 pp = &p->next;
13097 }
13098 }
13099
ba93b8ac 13100 /* Also discard relocs on undefined weak syms with non-default
7359ea65 13101 visibility. */
0bdcacaf 13102 if (eh->dyn_relocs != NULL
5e681ec4 13103 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13104 {
13105 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13106 eh->dyn_relocs = NULL;
22d606e9
AM		 13107
13108 /* Make sure undefined weak symbols are output as a dynamic
13109 symbol in PIEs. */
13110 else if (h->dynindx == -1
13111 && !h->forced_local)
13112 {
13113 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13114 return FALSE;
13115 }
13116 }
13117
67687978
PB		 13118 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13119 && h->root.type == bfd_link_hash_new)
13120 {
13121 /* Output absolute symbols so that we can create relocations
13122 against them. For normal symbols we output a relocation
13123 against the section that contains them. */
13124 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13125 return FALSE;
13126 }
13127
5e681ec4
PB		 13128 }
13129 else
13130 {
13131 /* For the non-shared case, discard space for relocs against
13132 symbols which turn out to need copy relocs or are not
13133 dynamic. */
13134
f5385ebf
AM		 13135 if (!h->non_got_ref
13136 && ((h->def_dynamic
13137 && !h->def_regular)
5e681ec4
PB		 13138 || (htab->root.dynamic_sections_created
13139 && (h->root.type == bfd_link_hash_undefweak
13140 || h->root.type == bfd_link_hash_undefined))))
13141 {
13142 /* Make sure this symbol is output as a dynamic symbol.
13143 Undefined weak syms won't yet be marked as dynamic. */
13144 if (h->dynindx == -1
f5385ebf 13145 && !h->forced_local)
5e681ec4 13146 {
c152c796 13147 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13148 return FALSE;
13149 }
13150
13151 /* If that succeeded, we know we'll be keeping all the
13152 relocs. */
13153 if (h->dynindx != -1)
13154 goto keep;
13155 }
13156
0bdcacaf 13157 eh->dyn_relocs = NULL;
5e681ec4
PB		 13158
13159 keep: ;
13160 }
13161
13162 /* Finally, allocate space. */
0bdcacaf 13163 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13164 {
0bdcacaf 13165 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13166 if (h->type == STT_GNU_IFUNC
13167 && eh->plt.noncall_refcount == 0
13168 && SYMBOL_REFERENCES_LOCAL (info, h))
13169 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13170 else
13171 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13172 }
13173
13174 return TRUE;
13175}
13176
08d1f311
DJ		 13177/* Find any dynamic relocs that apply to read-only sections. */
13178
13179static bfd_boolean
8029a119 13180elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13181{
8029a119 13182 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13183 struct elf_dyn_relocs * p;
08d1f311 13184
08d1f311 13185 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13186 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13187 {
0bdcacaf 13188 asection *s = p->sec;
08d1f311
DJ		 13189
13190 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13191 {
13192 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13193
13194 info->flags |= DF_TEXTREL;
13195
13196 /* Not an error, just cut short the traversal. */
13197 return FALSE;
13198 }
13199 }
13200 return TRUE;
13201}
13202
d504ffc8
DJ		 13203void
13204bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13205 int byteswap_code)
13206{
13207 struct elf32_arm_link_hash_table *globals;
13208
13209 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13210 if (globals == NULL)
13211 return;
13212
d504ffc8
DJ		 13213 globals->byteswap_code = byteswap_code;
13214}
13215
252b5132
RH		 13216/* Set the sizes of the dynamic sections. */
13217
b34976b6 13218static bfd_boolean
57e8b36a
NC		 13219elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13220 struct bfd_link_info * info)
252b5132
RH		 13221{
13222 bfd * dynobj;
13223 asection * s;
b34976b6
AM		 13224 bfd_boolean plt;
13225 bfd_boolean relocs;
5e681ec4
PB		 13226 bfd *ibfd;
13227 struct elf32_arm_link_hash_table *htab;
252b5132 13228
5e681ec4 13229 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13230 if (htab == NULL)
13231 return FALSE;
13232
252b5132
RH		 13233 dynobj = elf_hash_table (info)->dynobj;
13234 BFD_ASSERT (dynobj != NULL);
39b41c9c 13235 check_use_blx (htab);
252b5132
RH		 13236
13237 if (elf_hash_table (info)->dynamic_sections_created)
13238 {
13239 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13240 if (info->executable)
252b5132
RH		 13241 {
13242 s = bfd_get_section_by_name (dynobj, ".interp");
13243 BFD_ASSERT (s != NULL);
eea6121a 13244 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13245 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13246 }
13247 }
5e681ec4
PB		 13248
13249 /* Set up .got offsets for local syms, and space for local dynamic
13250 relocs. */
13251 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13252 {
5e681ec4
PB		 13253 bfd_signed_vma *local_got;
13254 bfd_signed_vma *end_local_got;
34e77a92 13255 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13256 char *local_tls_type;
0855e32b 13257 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13258 bfd_size_type locsymcount;
13259 Elf_Internal_Shdr *symtab_hdr;
13260 asection *srel;
4dfe6ac6 13261 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13262 unsigned int symndx;
5e681ec4 13263
0ffa91dd 13264 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13265 continue;
13266
13267 for (s = ibfd->sections; s != NULL; s = s->next)
13268 {
0bdcacaf 13269 struct elf_dyn_relocs *p;
5e681ec4 13270
0bdcacaf 13271 for (p = (struct elf_dyn_relocs *)
21d799b5 13272 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13273 {
0bdcacaf
RS		 13274 if (!bfd_is_abs_section (p->sec)
13275 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13276 {
13277 /* Input section has been discarded, either because
13278 it is a copy of a linkonce section or due to
13279 linker script /DISCARD/, so we'll be discarding
13280 the relocs too. */
13281 }
3348747a 13282 else if (is_vxworks
0bdcacaf 13283 && strcmp (p->sec->output_section->name,
3348747a
NS		 13284 ".tls_vars") == 0)
13285 {
13286 /* Relocations in vxworks .tls_vars sections are
13287 handled specially by the loader. */
13288 }
5e681ec4
PB		 13289 else if (p->count != 0)
13290 {
0bdcacaf 13291 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13292 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13293 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13294 info->flags |= DF_TEXTREL;
13295 }
13296 }
13297 }
13298
13299 local_got = elf_local_got_refcounts (ibfd);
13300 if (!local_got)
13301 continue;
13302
0ffa91dd 13303 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13304 locsymcount = symtab_hdr->sh_info;
13305 end_local_got = local_got + locsymcount;
34e77a92 13306 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13307 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13308 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13309 symndx = 0;
362d30a1
RS		 13310 s = htab->root.sgot;
13311 srel = htab->root.srelgot;
0855e32b 13312 for (; local_got < end_local_got;
34e77a92
RS		 13313 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13314 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13315 {
0855e32b 13316 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13317 local_iplt = *local_iplt_ptr;
13318 if (local_iplt != NULL)
13319 {
13320 struct elf_dyn_relocs *p;
13321
13322 if (local_iplt->root.refcount > 0)
13323 {
13324 elf32_arm_allocate_plt_entry (info, TRUE,
13325 &local_iplt->root,
13326 &local_iplt->arm);
13327 if (local_iplt->arm.noncall_refcount == 0)
13328 /* All references to the PLT are calls, so all
13329 non-call references can resolve directly to the
13330 run-time target. This means that the .got entry
13331 would be the same as the .igot.plt entry, so there's
13332 no point creating both. */
13333 *local_got = 0;
13334 }
13335 else
13336 {
13337 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13338 local_iplt->root.offset = (bfd_vma) -1;
13339 }
13340
13341 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13342 {
13343 asection *psrel;
13344
13345 psrel = elf_section_data (p->sec)->sreloc;
13346 if (local_iplt->arm.noncall_refcount == 0)
13347 elf32_arm_allocate_irelocs (info, psrel, p->count);
13348 else
13349 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13350 }
13351 }
5e681ec4
PB		 13352 if (*local_got > 0)
13353 {
34e77a92
RS		 13354 Elf_Internal_Sym *isym;
13355
eea6121a 13356 *local_got = s->size;
ba93b8ac
DJ		 13357 if (*local_tls_type & GOT_TLS_GD)
13358 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13359 s->size += 8;
0855e32b
NS		 13360 if (*local_tls_type & GOT_TLS_GDESC)
13361 {
13362 *local_tlsdesc_gotent = htab->root.sgotplt->size
13363 - elf32_arm_compute_jump_table_size (htab);
13364 htab->root.sgotplt->size += 8;
13365 *local_got = (bfd_vma) -2;
34e77a92 13366 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b
NS		 13367 reloc in the middle of .got.plt. */
13368 htab->num_tls_desc++;
13369 }
ba93b8ac
DJ		 13370 if (*local_tls_type & GOT_TLS_IE)
13371 s->size += 4;
ba93b8ac 13372
0855e32b
NS		 13373 if (*local_tls_type & GOT_NORMAL)
13374 {
13375 /* If the symbol is both GD and GDESC, *local_got
13376 may have been overwritten. */
13377 *local_got = s->size;
13378 s->size += 4;
13379 }
13380
34e77a92
RS		 13381 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13382 if (isym == NULL)
13383 return FALSE;
13384
13385 /* If all references to an STT_GNU_IFUNC PLT are calls,
13386 then all non-call references, including this GOT entry,
13387 resolve directly to the run-time target. */
13388 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13389 && (local_iplt == NULL
13390 || local_iplt->arm.noncall_refcount == 0))
13391 elf32_arm_allocate_irelocs (info, srel, 1);
13392 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13393 || *local_tls_type & GOT_TLS_GD)
47beaa6a 13394 elf32_arm_allocate_dynrelocs (info, srel, 1);
0855e32b
NS		 13395
13396 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13397 {
47beaa6a 13398 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13399 htab->tls_trampoline = -1;
13400 }
5e681ec4
PB		 13401 }
13402 else
13403 *local_got = (bfd_vma) -1;
13404 }
252b5132
RH		 13405 }
13406
ba93b8ac
DJ		 13407 if (htab->tls_ldm_got.refcount > 0)
13408 {
13409 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13410 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13411 htab->tls_ldm_got.offset = htab->root.sgot->size;
13412 htab->root.sgot->size += 8;
ba93b8ac 13413 if (info->shared)
47beaa6a 13414 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13415 }
13416 else
13417 htab->tls_ldm_got.offset = -1;
13418
5e681ec4
PB		 13419 /* Allocate global sym .plt and .got entries, and space for global
13420 sym dynamic relocs. */
47beaa6a 13421 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13422
d504ffc8
DJ		 13423 /* Here we rummage through the found bfds to collect glue information. */
13424 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13425 {
0ffa91dd 13426 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13427 continue;
13428
c7b8f16e
JB		 13429 /* Initialise mapping tables for code/data. */
13430 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13431
c7b8f16e
JB		 13432 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13433 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13434 /* xgettext:c-format */
13435 _bfd_error_handler (_("Errors encountered processing file %s"),
13436 ibfd->filename);
13437 }
d504ffc8 13438
3e6b1042
DJ		 13439 /* Allocate space for the glue sections now that we've sized them. */
13440 bfd_elf32_arm_allocate_interworking_sections (info);
13441
0855e32b
NS		 13442 /* For every jump slot reserved in the sgotplt, reloc_count is
13443 incremented. However, when we reserve space for TLS descriptors,
13444 it's not incremented, so in order to compute the space reserved
13445 for them, it suffices to multiply the reloc count by the jump
13446 slot size. */
13447 if (htab->root.srelplt)
13448 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13449
13450 if (htab->tls_trampoline)
13451 {
13452 if (htab->root.splt->size == 0)
13453 htab->root.splt->size += htab->plt_header_size;
13454
13455 htab->tls_trampoline = htab->root.splt->size;
13456 htab->root.splt->size += htab->plt_entry_size;
13457
13458 /* If we're not using lazy TLS relocations, don't generate the
13459 PLT and GOT entries they require. */
13460 if (!(info->flags & DF_BIND_NOW))
13461 {
13462 htab->dt_tlsdesc_got = htab->root.sgot->size;
13463 htab->root.sgot->size += 4;
13464
13465 htab->dt_tlsdesc_plt = htab->root.splt->size;
13466 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13467 }
13468 }
13469
252b5132
RH		 13470 /* The check_relocs and adjust_dynamic_symbol entry points have
13471 determined the sizes of the various dynamic sections. Allocate
13472 memory for them. */
b34976b6
AM		 13473 plt = FALSE;
13474 relocs = FALSE;
252b5132
RH		 13475 for (s = dynobj->sections; s != NULL; s = s->next)
13476 {
13477 const char * name;
252b5132
RH		 13478
13479 if ((s->flags & SEC_LINKER_CREATED) == 0)
13480 continue;
13481
13482 /* It's OK to base decisions on the section name, because none
13483 of the dynobj section names depend upon the input files. */
13484 name = bfd_get_section_name (dynobj, s);
13485
34e77a92 13486 if (s == htab->root.splt)
252b5132 13487 {
c456f082
AM		 13488 /* Remember whether there is a PLT. */
13489 plt = s->size != 0;
252b5132 13490 }
0112cd26 13491 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13492 {
c456f082 13493 if (s->size != 0)
252b5132 13494 {
252b5132 13495 /* Remember whether there are any reloc sections other
00a97672 13496 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13497 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13498 relocs = TRUE;
252b5132
RH		 13499
13500 /* We use the reloc_count field as a counter if we need
13501 to copy relocs into the output file. */
13502 s->reloc_count = 0;
13503 }
13504 }
34e77a92
RS		 13505 else if (s != htab->root.sgot
13506 && s != htab->root.sgotplt
13507 && s != htab->root.iplt
13508 && s != htab->root.igotplt
13509 && s != htab->sdynbss)
252b5132
RH		 13510 {
13511 /* It's not one of our sections, so don't allocate space. */
13512 continue;
13513 }
13514
c456f082 13515 if (s->size == 0)
252b5132 13516 {
c456f082 13517 /* If we don't need this section, strip it from the
00a97672
RS		 13518 output file. This is mostly to handle .rel(a).bss and
13519 .rel(a).plt. We must create both sections in
c456f082
AM		 13520 create_dynamic_sections, because they must be created
13521 before the linker maps input sections to output
13522 sections. The linker does that before
13523 adjust_dynamic_symbol is called, and it is that
13524 function which decides whether anything needs to go
13525 into these sections. */
8423293d 13526 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13527 continue;
13528 }
13529
c456f082
AM		 13530 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13531 continue;
13532
252b5132 13533 /* Allocate memory for the section contents. */
21d799b5 13534 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13535 if (s->contents == NULL)
b34976b6 13536 return FALSE;
252b5132
RH		 13537 }
13538
13539 if (elf_hash_table (info)->dynamic_sections_created)
13540 {
13541 /* Add some entries to the .dynamic section. We fill in the
13542 values later, in elf32_arm_finish_dynamic_sections, but we
13543 must add the entries now so that we get the correct size for
13544 the .dynamic section. The DT_DEBUG entry is filled in by the
13545 dynamic linker and used by the debugger. */
dc810e39 13546#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13547 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13548
8532796c 13549 if (info->executable)
252b5132 13550 {
dc810e39 13551 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13552 return FALSE;
252b5132
RH		 13553 }
13554
13555 if (plt)
13556 {
dc810e39
AM		 13557 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13558 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13559 || !add_dynamic_entry (DT_PLTREL,
13560 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13561 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13562 return FALSE;
0855e32b
NS		 13563
13564 if (htab->dt_tlsdesc_plt &&
13565 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13566 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13567 return FALSE;
252b5132
RH		 13568 }
13569
13570 if (relocs)
13571 {
00a97672
RS		 13572 if (htab->use_rel)
13573 {
13574 if (!add_dynamic_entry (DT_REL, 0)
13575 || !add_dynamic_entry (DT_RELSZ, 0)
13576 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13577 return FALSE;
13578 }
13579 else
13580 {
13581 if (!add_dynamic_entry (DT_RELA, 0)
13582 || !add_dynamic_entry (DT_RELASZ, 0)
13583 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13584 return FALSE;
13585 }
252b5132
RH		 13586 }
13587
08d1f311
DJ		 13588 /* If any dynamic relocs apply to a read-only section,
13589 then we need a DT_TEXTREL entry. */
13590 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13591 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13592 info);
08d1f311 13593
99e4ae17 13594 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13595 {
dc810e39 13596 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 13597 return FALSE;
252b5132 13598 }
7a2b07ff
NS		 13599 if (htab->vxworks_p
13600 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13601 return FALSE;
252b5132 13602 }
8532796c 13603#undef add_dynamic_entry
252b5132 13604
b34976b6 13605 return TRUE;
252b5132
RH		 13606}
13607
0855e32b
NS		 13608/* Size sections even though they're not dynamic. We use it to setup
13609 _TLS_MODULE_BASE_, if needed. */
13610
13611static bfd_boolean
13612elf32_arm_always_size_sections (bfd *output_bfd,
13613 struct bfd_link_info *info)
13614{
13615 asection *tls_sec;
13616
13617 if (info->relocatable)
13618 return TRUE;
13619
13620 tls_sec = elf_hash_table (info)->tls_sec;
13621
13622 if (tls_sec)
13623 {
13624 struct elf_link_hash_entry *tlsbase;
13625
13626 tlsbase = elf_link_hash_lookup
13627 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13628
13629 if (tlsbase)
13630 {
13631 struct bfd_link_hash_entry *bh = NULL;
13632 const struct elf_backend_data *bed
13633 = get_elf_backend_data (output_bfd);
13634
13635 if (!(_bfd_generic_link_add_one_symbol
13636 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13637 tls_sec, 0, NULL, FALSE,
13638 bed->collect, &bh)))
13639 return FALSE;
13640
13641 tlsbase->type = STT_TLS;
13642 tlsbase = (struct elf_link_hash_entry *)bh;
13643 tlsbase->def_regular = 1;
13644 tlsbase->other = STV_HIDDEN;
13645 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13646 }
13647 }
13648 return TRUE;
13649}
13650
252b5132
RH		 13651/* Finish up dynamic symbol handling. We set the contents of various
13652 dynamic sections here. */
13653
b34976b6 13654static bfd_boolean
906e58ca
NC		 13655elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13656 struct bfd_link_info * info,
13657 struct elf_link_hash_entry * h,
13658 Elf_Internal_Sym * sym)
252b5132 13659{
e5a52504 13660 struct elf32_arm_link_hash_table *htab;
b7693d02 13661 struct elf32_arm_link_hash_entry *eh;
252b5132 13662
e5a52504 13663 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13664 if (htab == NULL)
13665 return FALSE;
13666
b7693d02 13667 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 13668
13669 if (h->plt.offset != (bfd_vma) -1)
13670 {
34e77a92 13671 if (!eh->is_iplt)
e5a52504 13672 {
34e77a92
RS		 13673 BFD_ASSERT (h->dynindx != -1);
13674 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13675 h->dynindx, 0);
e5a52504 13676 }
57e8b36a 13677
f5385ebf 13678 if (!h->def_regular)
252b5132
RH		 13679 {
13680 /* Mark the symbol as undefined, rather than as defined in
13681 the .plt section. Leave the value alone. */
13682 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 13683 /* If the symbol is weak, we do need to clear the value.
13684 Otherwise, the PLT entry would provide a definition for
13685 the symbol even if the symbol wasn't defined anywhere,
13686 and so the symbol would never be NULL. */
f5385ebf 13687 if (!h->ref_regular_nonweak)
d982ba73 13688 sym->st_value = 0;
252b5132 13689 }
34e77a92
RS		 13690 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13691 {
13692 /* At least one non-call relocation references this .iplt entry,
13693 so the .iplt entry is the function's canonical address. */
13694 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13695 sym->st_target_internal = ST_BRANCH_TO_ARM;
13696 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13697 (output_bfd, htab->root.iplt->output_section));
13698 sym->st_value = (h->plt.offset
13699 + htab->root.iplt->output_section->vma
13700 + htab->root.iplt->output_offset);
13701 }
252b5132
RH		 13702 }
13703
f5385ebf 13704 if (h->needs_copy)
252b5132
RH		 13705 {
13706 asection * s;
947216bf 13707 Elf_Internal_Rela rel;
252b5132
RH		 13708
13709 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 13710 BFD_ASSERT (h->dynindx != -1
13711 && (h->root.type == bfd_link_hash_defined
13712 || h->root.type == bfd_link_hash_defweak));
13713
362d30a1 13714 s = htab->srelbss;
252b5132
RH		 13715 BFD_ASSERT (s != NULL);
13716
00a97672 13717 rel.r_addend = 0;
252b5132
RH		 13718 rel.r_offset = (h->root.u.def.value
13719 + h->root.u.def.section->output_section->vma
13720 + h->root.u.def.section->output_offset);
13721 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 13722 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 13723 }
13724
00a97672
RS		 13725 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13726 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13727 to the ".got" section. */
252b5132 13728 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 13729 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 13730 sym->st_shndx = SHN_ABS;
13731
b34976b6 13732 return TRUE;
252b5132
RH		 13733}
13734
0855e32b
NS		 13735static void
13736arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13737 void *contents,
13738 const unsigned long *template, unsigned count)
13739{
13740 unsigned ix;
13741
13742 for (ix = 0; ix != count; ix++)
13743 {
13744 unsigned long insn = template[ix];
13745
13746 /* Emit mov pc,rx if bx is not permitted. */
13747 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
13748 insn = (insn & 0xf000000f) | 0x01a0f000;
13749 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
13750 }
13751}
13752
252b5132
RH		 13753/* Finish up the dynamic sections. */
13754
b34976b6 13755static bfd_boolean
57e8b36a 13756elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 13757{
13758 bfd * dynobj;
13759 asection * sgot;
13760 asection * sdyn;
4dfe6ac6
NC		 13761 struct elf32_arm_link_hash_table *htab;
13762
13763 htab = elf32_arm_hash_table (info);
13764 if (htab == NULL)
13765 return FALSE;
252b5132
RH		 13766
13767 dynobj = elf_hash_table (info)->dynobj;
13768
362d30a1 13769 sgot = htab->root.sgotplt;
894891db
NC		 13770 /* A broken linker script might have discarded the dynamic sections.
13771 Catch this here so that we do not seg-fault later on. */
13772 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
13773 return FALSE;
252b5132
RH		 13774 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
13775
13776 if (elf_hash_table (info)->dynamic_sections_created)
13777 {
13778 asection *splt;
13779 Elf32_External_Dyn *dyncon, *dynconend;
13780
362d30a1 13781 splt = htab->root.splt;
24a1ba0f 13782 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 13783 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 13784
13785 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 13786 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 13787
252b5132
RH		 13788 for (; dyncon < dynconend; dyncon++)
13789 {
13790 Elf_Internal_Dyn dyn;
13791 const char * name;
13792 asection * s;
13793
13794 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
13795
13796 switch (dyn.d_tag)
13797 {
229fcec5
MM		 13798 unsigned int type;
13799
252b5132 13800 default:
7a2b07ff
NS		 13801 if (htab->vxworks_p
13802 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
13803 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 13804 break;
13805
229fcec5
MM		 13806 case DT_HASH:
13807 name = ".hash";
13808 goto get_vma_if_bpabi;
13809 case DT_STRTAB:
13810 name = ".dynstr";
13811 goto get_vma_if_bpabi;
13812 case DT_SYMTAB:
13813 name = ".dynsym";
13814 goto get_vma_if_bpabi;
c0042f5d
MM		 13815 case DT_VERSYM:
13816 name = ".gnu.version";
13817 goto get_vma_if_bpabi;
13818 case DT_VERDEF:
13819 name = ".gnu.version_d";
13820 goto get_vma_if_bpabi;
13821 case DT_VERNEED:
13822 name = ".gnu.version_r";
13823 goto get_vma_if_bpabi;
13824
252b5132
RH		 13825 case DT_PLTGOT:
13826 name = ".got";
13827 goto get_vma;
13828 case DT_JMPREL:
00a97672 13829 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 13830 get_vma:
13831 s = bfd_get_section_by_name (output_bfd, name);
13832 BFD_ASSERT (s != NULL);
229fcec5
MM		 13833 if (!htab->symbian_p)
13834 dyn.d_un.d_ptr = s->vma;
13835 else
13836 /* In the BPABI, tags in the PT_DYNAMIC section point
13837 at the file offset, not the memory address, for the
13838 convenience of the post linker. */
13839 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 13840 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13841 break;
13842
229fcec5
MM		 13843 get_vma_if_bpabi:
13844 if (htab->symbian_p)
13845 goto get_vma;
13846 break;
13847
252b5132 13848 case DT_PLTRELSZ:
362d30a1 13849 s = htab->root.srelplt;
252b5132 13850 BFD_ASSERT (s != NULL);
eea6121a 13851 dyn.d_un.d_val = s->size;
252b5132
RH		 13852 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13853 break;
906e58ca 13854
252b5132 13855 case DT_RELSZ:
00a97672 13856 case DT_RELASZ:
229fcec5
MM		 13857 if (!htab->symbian_p)
13858 {
13859 /* My reading of the SVR4 ABI indicates that the
13860 procedure linkage table relocs (DT_JMPREL) should be
13861 included in the overall relocs (DT_REL). This is
13862 what Solaris does. However, UnixWare can not handle
13863 that case. Therefore, we override the DT_RELSZ entry
13864 here to make it not include the JMPREL relocs. Since
00a97672 13865 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 13866 other relocation sections, we don't have to worry
13867 about changing the DT_REL entry. */
362d30a1 13868 s = htab->root.srelplt;
229fcec5
MM		 13869 if (s != NULL)
13870 dyn.d_un.d_val -= s->size;
13871 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13872 break;
13873 }
8029a119 13874 /* Fall through. */
229fcec5
MM		 13875
13876 case DT_REL:
13877 case DT_RELA:
229fcec5
MM		 13878 /* In the BPABI, the DT_REL tag must point at the file
13879 offset, not the VMA, of the first relocation
13880 section. So, we use code similar to that in
13881 elflink.c, but do not check for SHF_ALLOC on the
13882 relcoation section, since relocations sections are
13883 never allocated under the BPABI. The comments above
13884 about Unixware notwithstanding, we include all of the
13885 relocations here. */
13886 if (htab->symbian_p)
13887 {
13888 unsigned int i;
13889 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
13890 ? SHT_REL : SHT_RELA);
13891 dyn.d_un.d_val = 0;
13892 for (i = 1; i < elf_numsections (output_bfd); i++)
13893 {
906e58ca 13894 Elf_Internal_Shdr *hdr
229fcec5
MM		 13895 = elf_elfsections (output_bfd)[i];
13896 if (hdr->sh_type == type)
13897 {
906e58ca 13898 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 13899 || dyn.d_tag == DT_RELASZ)
13900 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 13901 else if ((ufile_ptr) hdr->sh_offset
13902 <= dyn.d_un.d_val - 1)
229fcec5
MM		 13903 dyn.d_un.d_val = hdr->sh_offset;
13904 }
13905 }
13906 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13907 }
252b5132 13908 break;
88f7bcd5 13909
0855e32b
NS		 13910 case DT_TLSDESC_PLT:
13911 s = htab->root.splt;
13912 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13913 + htab->dt_tlsdesc_plt);
13914 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13915 break;
13916
13917 case DT_TLSDESC_GOT:
13918 s = htab->root.sgot;
13919 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
13920 + htab->dt_tlsdesc_got);
13921 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
13922 break;
13923
88f7bcd5
NC		 13924 /* Set the bottom bit of DT_INIT/FINI if the
13925 corresponding function is Thumb. */
13926 case DT_INIT:
13927 name = info->init_function;
13928 goto get_sym;
13929 case DT_FINI:
13930 name = info->fini_function;
13931 get_sym:
13932 /* If it wasn't set by elf_bfd_final_link
4cc11e76 13933 then there is nothing to adjust. */
88f7bcd5
NC		 13934 if (dyn.d_un.d_val != 0)
13935 {
13936 struct elf_link_hash_entry * eh;
13937
13938 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 13939 FALSE, FALSE, TRUE);
35fc36a8 13940 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 13941 {
13942 dyn.d_un.d_val |= 1;
b34976b6 13943 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 13944 }
13945 }
13946 break;
252b5132
RH		 13947 }
13948 }
13949
24a1ba0f 13950 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 13951 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 13952 {
00a97672
RS		 13953 const bfd_vma *plt0_entry;
13954 bfd_vma got_address, plt_address, got_displacement;
13955
13956 /* Calculate the addresses of the GOT and PLT. */
13957 got_address = sgot->output_section->vma + sgot->output_offset;
13958 plt_address = splt->output_section->vma + splt->output_offset;
13959
13960 if (htab->vxworks_p)
13961 {
13962 /* The VxWorks GOT is relocated by the dynamic linker.
13963 Therefore, we must emit relocations rather than simply
13964 computing the values now. */
13965 Elf_Internal_Rela rel;
13966
13967 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 13968 put_arm_insn (htab, output_bfd, plt0_entry[0],
13969 splt->contents + 0);
13970 put_arm_insn (htab, output_bfd, plt0_entry[1],
13971 splt->contents + 4);
13972 put_arm_insn (htab, output_bfd, plt0_entry[2],
13973 splt->contents + 8);
00a97672
RS		 13974 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
13975
8029a119 13976 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 13977 rel.r_offset = plt_address + 12;
13978 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
13979 rel.r_addend = 0;
13980 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
13981 htab->srelplt2->contents);
13982 }
13983 else
13984 {
13985 got_displacement = got_address - (plt_address + 16);
13986
13987 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 13988 put_arm_insn (htab, output_bfd, plt0_entry[0],
13989 splt->contents + 0);
13990 put_arm_insn (htab, output_bfd, plt0_entry[1],
13991 splt->contents + 4);
13992 put_arm_insn (htab, output_bfd, plt0_entry[2],
13993 splt->contents + 8);
13994 put_arm_insn (htab, output_bfd, plt0_entry[3],
13995 splt->contents + 12);
5e681ec4 13996
5e681ec4 13997#ifdef FOUR_WORD_PLT
00a97672
RS		 13998 /* The displacement value goes in the otherwise-unused
13999 last word of the second entry. */
14000 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14001#else
00a97672 14002 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14003#endif
00a97672 14004 }
f7a74f8c 14005 }
252b5132
RH		 14006
14007 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14008 really seem like the right value. */
74541ad4
AM		 14009 if (splt->output_section->owner == output_bfd)
14010 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14011
0855e32b
NS		 14012 if (htab->dt_tlsdesc_plt)
14013 {
14014 bfd_vma got_address
14015 = sgot->output_section->vma + sgot->output_offset;
14016 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14017 + htab->root.sgot->output_offset);
14018 bfd_vma plt_address
14019 = splt->output_section->vma + splt->output_offset;
14020
14021 arm_put_trampoline (htab, output_bfd,
14022 splt->contents + htab->dt_tlsdesc_plt,
14023 dl_tlsdesc_lazy_trampoline, 6);
14024
14025 bfd_put_32 (output_bfd,
14026 gotplt_address + htab->dt_tlsdesc_got
14027 - (plt_address + htab->dt_tlsdesc_plt)
14028 - dl_tlsdesc_lazy_trampoline[6],
14029 splt->contents + htab->dt_tlsdesc_plt + 24);
14030 bfd_put_32 (output_bfd,
14031 got_address - (plt_address + htab->dt_tlsdesc_plt)
14032 - dl_tlsdesc_lazy_trampoline[7],
14033 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14034 }
14035
14036 if (htab->tls_trampoline)
14037 {
14038 arm_put_trampoline (htab, output_bfd,
14039 splt->contents + htab->tls_trampoline,
14040 tls_trampoline, 3);
14041#ifdef FOUR_WORD_PLT
14042 bfd_put_32 (output_bfd, 0x00000000,
14043 splt->contents + htab->tls_trampoline + 12);
14044#endif
14045 }
14046
362d30a1 14047 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14048 {
14049 /* Correct the .rel(a).plt.unloaded relocations. They will have
14050 incorrect symbol indexes. */
14051 int num_plts;
eed62c48 14052 unsigned char *p;
00a97672 14053
362d30a1 14054 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14055 / htab->plt_entry_size);
14056 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14057
14058 for (; num_plts; num_plts--)
14059 {
14060 Elf_Internal_Rela rel;
14061
14062 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14063 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14064 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14065 p += RELOC_SIZE (htab);
14066
14067 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14068 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14069 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14070 p += RELOC_SIZE (htab);
14071 }
14072 }
252b5132
RH		 14073 }
14074
14075 /* Fill in the first three entries in the global offset table. */
229fcec5 14076 if (sgot)
252b5132 14077 {
229fcec5
MM		 14078 if (sgot->size > 0)
14079 {
14080 if (sdyn == NULL)
14081 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14082 else
14083 bfd_put_32 (output_bfd,
14084 sdyn->output_section->vma + sdyn->output_offset,
14085 sgot->contents);
14086 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14087 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14088 }
252b5132 14089
229fcec5
MM		 14090 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14091 }
252b5132 14092
b34976b6 14093 return TRUE;
252b5132
RH		 14094}
14095
ba96a88f 14096static void
57e8b36a 14097elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14098{
9b485d32 14099 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14100 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14101
14102 i_ehdrp = elf_elfheader (abfd);
14103
94a3258f
PB		 14104 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14105 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14106 else
14107 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 14108 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14109
93204d3a
PB		 14110 if (link_info)
14111 {
14112 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14113 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14114 i_ehdrp->e_flags |= EF_ARM_BE8;
14115 }
ba96a88f
NC		 14116}
14117
99e4ae17 14118static enum elf_reloc_type_class
57e8b36a 14119elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 14120{
f51e552e 14121 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14122 {
14123 case R_ARM_RELATIVE:
14124 return reloc_class_relative;
14125 case R_ARM_JUMP_SLOT:
14126 return reloc_class_plt;
14127 case R_ARM_COPY:
14128 return reloc_class_copy;
14129 default:
14130 return reloc_class_normal;
14131 }
14132}
14133
e489d0ae 14134static void
57e8b36a 14135elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14136{
5a6c6817 14137 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14138}
14139
40a18ebd
NC		 14140/* Return TRUE if this is an unwinding table entry. */
14141
14142static bfd_boolean
14143is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14144{
0112cd26
NC		 14145 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14146 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14147}
14148
14149
14150/* Set the type and flags for an ARM section. We do this by
14151 the section name, which is a hack, but ought to work. */
14152
14153static bfd_boolean
14154elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14155{
14156 const char * name;
14157
14158 name = bfd_get_section_name (abfd, sec);
14159
14160 if (is_arm_elf_unwind_section_name (abfd, name))
14161 {
14162 hdr->sh_type = SHT_ARM_EXIDX;
14163 hdr->sh_flags |= SHF_LINK_ORDER;
14164 }
14165 return TRUE;
14166}
14167
6dc132d9
L		 14168/* Handle an ARM specific section when reading an object file. This is
14169 called when bfd_section_from_shdr finds a section with an unknown
14170 type. */
40a18ebd
NC		 14171
14172static bfd_boolean
14173elf32_arm_section_from_shdr (bfd *abfd,
14174 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14175 const char *name,
14176 int shindex)
40a18ebd
NC		 14177{
14178 /* There ought to be a place to keep ELF backend specific flags, but
14179 at the moment there isn't one. We just keep track of the
14180 sections by their name, instead. Fortunately, the ABI gives
14181 names for all the ARM specific sections, so we will probably get
14182 away with this. */
14183 switch (hdr->sh_type)
14184 {
14185 case SHT_ARM_EXIDX:
0951f019
RE		 14186 case SHT_ARM_PREEMPTMAP:
14187 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14188 break;
14189
14190 default:
14191 return FALSE;
14192 }
14193
6dc132d9 14194 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14195 return FALSE;
14196
14197 return TRUE;
14198}
e489d0ae 14199
44444f50
NC		 14200static _arm_elf_section_data *
14201get_arm_elf_section_data (asection * sec)
14202{
47b2e99c
JZ		 14203 if (sec && sec->owner && is_arm_elf (sec->owner))
14204 return elf32_arm_section_data (sec);
44444f50
NC		 14205 else
14206 return NULL;
8e3de13a
NC		 14207}
14208
4e617b1e
PB		 14209typedef struct
14210{
14211 void *finfo;
14212 struct bfd_link_info *info;
91a5743d
PB		 14213 asection *sec;
14214 int sec_shndx;
6e0b88f1
AM		 14215 int (*func) (void *, const char *, Elf_Internal_Sym *,
14216 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14217} output_arch_syminfo;
14218
14219enum map_symbol_type
14220{
14221 ARM_MAP_ARM,
14222 ARM_MAP_THUMB,
14223 ARM_MAP_DATA
14224};
14225
14226
7413f23f 14227/* Output a single mapping symbol. */
4e617b1e
PB		 14228
14229static bfd_boolean
7413f23f
DJ		 14230elf32_arm_output_map_sym (output_arch_syminfo *osi,
14231 enum map_symbol_type type,
14232 bfd_vma offset)
4e617b1e
PB		 14233{
14234 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14235 Elf_Internal_Sym sym;
14236
91a5743d
PB		 14237 sym.st_value = osi->sec->output_section->vma
14238 + osi->sec->output_offset
14239 + offset;
4e617b1e
PB		 14240 sym.st_size = 0;
14241 sym.st_other = 0;
14242 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14243 sym.st_shndx = osi->sec_shndx;
35fc36a8 14244 sym.st_target_internal = 0;
fe33d2fa 14245 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 14246 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14247}
14248
34e77a92
RS		 14249/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14250 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14251
14252static bfd_boolean
34e77a92
RS		 14253elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14254 bfd_boolean is_iplt_entry_p,
14255 union gotplt_union *root_plt,
14256 struct arm_plt_info *arm_plt)
4e617b1e 14257{
4e617b1e 14258 struct elf32_arm_link_hash_table *htab;
34e77a92 14259 bfd_vma addr, plt_header_size;
4e617b1e 14260
34e77a92 14261 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14262 return TRUE;
14263
4dfe6ac6
NC		 14264 htab = elf32_arm_hash_table (osi->info);
14265 if (htab == NULL)
14266 return FALSE;
14267
34e77a92
RS		 14268 if (is_iplt_entry_p)
14269 {
14270 osi->sec = htab->root.iplt;
14271 plt_header_size = 0;
14272 }
14273 else
14274 {
14275 osi->sec = htab->root.splt;
14276 plt_header_size = htab->plt_header_size;
14277 }
14278 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14279 (osi->info->output_bfd, osi->sec->output_section));
14280
14281 addr = root_plt->offset & -2;
4e617b1e
PB		 14282 if (htab->symbian_p)
14283 {
7413f23f 14284 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14285 return FALSE;
7413f23f 14286 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14287 return FALSE;
14288 }
14289 else if (htab->vxworks_p)
14290 {
7413f23f 14291 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14292 return FALSE;
7413f23f 14293 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14294 return FALSE;
7413f23f 14295 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14296 return FALSE;
7413f23f 14297 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14298 return FALSE;
14299 }
14300 else
14301 {
34e77a92 14302 bfd_boolean thumb_stub_p;
bd97cb95 14303
34e77a92
RS		 14304 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14305 if (thumb_stub_p)
4e617b1e 14306 {
7413f23f 14307 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14308 return FALSE;
14309 }
14310#ifdef FOUR_WORD_PLT
7413f23f 14311 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14312 return FALSE;
7413f23f 14313 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14314 return FALSE;
14315#else
906e58ca 14316 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14317 so only need to output a mapping symbol for the first PLT entry and
14318 entries with thumb thunks. */
34e77a92 14319 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14320 {
7413f23f 14321 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14322 return FALSE;
14323 }
14324#endif
14325 }
14326
14327 return TRUE;
14328}
14329
34e77a92
RS		 14330/* Output mapping symbols for PLT entries associated with H. */
14331
14332static bfd_boolean
14333elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14334{
14335 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14336 struct elf32_arm_link_hash_entry *eh;
14337
14338 if (h->root.type == bfd_link_hash_indirect)
14339 return TRUE;
14340
14341 if (h->root.type == bfd_link_hash_warning)
14342 /* When warning symbols are created, they **replace** the "real"
14343 entry in the hash table, thus we never get to see the real
14344 symbol in a hash traversal. So look at it now. */
14345 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14346
14347 eh = (struct elf32_arm_link_hash_entry *) h;
14348 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14349 &h->plt, &eh->plt);
14350}
14351
7413f23f
DJ		 14352/* Output a single local symbol for a generated stub. */
14353
14354static bfd_boolean
14355elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14356 bfd_vma offset, bfd_vma size)
14357{
7413f23f
DJ		 14358 Elf_Internal_Sym sym;
14359
7413f23f
DJ		 14360 sym.st_value = osi->sec->output_section->vma
14361 + osi->sec->output_offset
14362 + offset;
14363 sym.st_size = size;
14364 sym.st_other = 0;
14365 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14366 sym.st_shndx = osi->sec_shndx;
35fc36a8 14367 sym.st_target_internal = 0;
6e0b88f1 14368 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14369}
4e617b1e 14370
da5938a2 14371static bfd_boolean
8029a119
NC		 14372arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14373 void * in_arg)
da5938a2
NC		 14374{
14375 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14376 asection *stub_sec;
14377 bfd_vma addr;
7413f23f 14378 char *stub_name;
9a008db3 14379 output_arch_syminfo *osi;
d3ce72d0 14380 const insn_sequence *template_sequence;
461a49ca
DJ		 14381 enum stub_insn_type prev_type;
14382 int size;
14383 int i;
14384 enum map_symbol_type sym_type;
da5938a2
NC		 14385
14386 /* Massage our args to the form they really have. */
14387 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14388 osi = (output_arch_syminfo *) in_arg;
da5938a2 14389
da5938a2
NC		 14390 stub_sec = stub_entry->stub_sec;
14391
14392 /* Ensure this stub is attached to the current section being
7413f23f 14393 processed. */
da5938a2
NC		 14394 if (stub_sec != osi->sec)
14395 return TRUE;
14396
7413f23f
DJ		 14397 addr = (bfd_vma) stub_entry->stub_offset;
14398 stub_name = stub_entry->output_name;
da5938a2 14399
d3ce72d0
NC		 14400 template_sequence = stub_entry->stub_template;
14401 switch (template_sequence[0].type)
7413f23f 14402 {
461a49ca
DJ		 14403 case ARM_TYPE:
14404 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14405 return FALSE;
14406 break;
461a49ca 14407 case THUMB16_TYPE:
48229727 14408 case THUMB32_TYPE:
461a49ca
DJ		 14409 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14410 stub_entry->stub_size))
da5938a2
NC		 14411 return FALSE;
14412 break;
14413 default:
14414 BFD_FAIL ();
48229727 14415 return 0;
7413f23f 14416 }
da5938a2 14417
461a49ca
DJ		 14418 prev_type = DATA_TYPE;
14419 size = 0;
14420 for (i = 0; i < stub_entry->stub_template_size; i++)
14421 {
d3ce72d0 14422 switch (template_sequence[i].type)
461a49ca
DJ		 14423 {
14424 case ARM_TYPE:
14425 sym_type = ARM_MAP_ARM;
14426 break;
14427
14428 case THUMB16_TYPE:
48229727 14429 case THUMB32_TYPE:
461a49ca
DJ		 14430 sym_type = ARM_MAP_THUMB;
14431 break;
14432
14433 case DATA_TYPE:
14434 sym_type = ARM_MAP_DATA;
14435 break;
14436
14437 default:
14438 BFD_FAIL ();
4e31c731 14439 return FALSE;
461a49ca
DJ		 14440 }
14441
d3ce72d0 14442 if (template_sequence[i].type != prev_type)
461a49ca 14443 {
d3ce72d0 14444 prev_type = template_sequence[i].type;
461a49ca
DJ		 14445 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14446 return FALSE;
14447 }
14448
d3ce72d0 14449 switch (template_sequence[i].type)
461a49ca
DJ		 14450 {
14451 case ARM_TYPE:
48229727 14452 case THUMB32_TYPE:
461a49ca
DJ		 14453 size += 4;
14454 break;
14455
14456 case THUMB16_TYPE:
14457 size += 2;
14458 break;
14459
14460 case DATA_TYPE:
14461 size += 4;
14462 break;
14463
14464 default:
14465 BFD_FAIL ();
4e31c731 14466 return FALSE;
461a49ca
DJ		 14467 }
14468 }
14469
da5938a2
NC		 14470 return TRUE;
14471}
14472
33811162
DG		 14473/* Output mapping symbols for linker generated sections,
14474 and for those data-only sections that do not have a
14475 $d. */
4e617b1e
PB		 14476
14477static bfd_boolean
14478elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 14479 struct bfd_link_info *info,
14480 void *finfo,
6e0b88f1
AM		 14481 int (*func) (void *, const char *,
14482 Elf_Internal_Sym *,
14483 asection *,
14484 struct elf_link_hash_entry *))
4e617b1e
PB		 14485{
14486 output_arch_syminfo osi;
14487 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14488 bfd_vma offset;
14489 bfd_size_type size;
33811162 14490 bfd *input_bfd;
4e617b1e
PB		 14491
14492 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14493 if (htab == NULL)
14494 return FALSE;
14495
906e58ca 14496 check_use_blx (htab);
91a5743d 14497
4e617b1e
PB		 14498 osi.finfo = finfo;
14499 osi.info = info;
14500 osi.func = func;
906e58ca 14501
33811162
DG		 14502 /* Add a $d mapping symbol to data-only sections that
14503 don't have any mapping symbol. This may result in (harmless) redundant
14504 mapping symbols. */
14505 for (input_bfd = info->input_bfds;
14506 input_bfd != NULL;
14507 input_bfd = input_bfd->link_next)
14508 {
14509 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14510 for (osi.sec = input_bfd->sections;
14511 osi.sec != NULL;
14512 osi.sec = osi.sec->next)
14513 {
14514 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14515 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14516 != 0)
33811162
DG		 14517 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14518 == SEC_HAS_CONTENTS
14519 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14520 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14521 && osi.sec->size > 0
14522 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14523 {
14524 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14525 (output_bfd, osi.sec->output_section);
14526 if (osi.sec_shndx != (int)SHN_BAD)
14527 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14528 }
14529 }
14530 }
14531
91a5743d
PB		 14532 /* ARM->Thumb glue. */
14533 if (htab->arm_glue_size > 0)
14534 {
14535 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14536 ARM2THUMB_GLUE_SECTION_NAME);
14537
14538 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14539 (output_bfd, osi.sec->output_section);
14540 if (info->shared || htab->root.is_relocatable_executable
14541 || htab->pic_veneer)
14542 size = ARM2THUMB_PIC_GLUE_SIZE;
14543 else if (htab->use_blx)
14544 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14545 else
14546 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 14547
91a5743d
PB		 14548 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14549 {
7413f23f
DJ		 14550 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14551 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 14552 }
14553 }
14554
14555 /* Thumb->ARM glue. */
14556 if (htab->thumb_glue_size > 0)
14557 {
14558 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14559 THUMB2ARM_GLUE_SECTION_NAME);
14560
14561 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14562 (output_bfd, osi.sec->output_section);
14563 size = THUMB2ARM_GLUE_SIZE;
14564
14565 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14566 {
7413f23f
DJ		 14567 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14568 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 14569 }
14570 }
14571
845b51d6
PB		 14572 /* ARMv4 BX veneers. */
14573 if (htab->bx_glue_size > 0)
14574 {
14575 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
14576 ARM_BX_GLUE_SECTION_NAME);
14577
14578 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14579 (output_bfd, osi.sec->output_section);
14580
7413f23f 14581 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 14582 }
14583
8029a119
NC		 14584 /* Long calls stubs. */
14585 if (htab->stub_bfd && htab->stub_bfd->sections)
14586 {
da5938a2 14587 asection* stub_sec;
8029a119 14588
da5938a2
NC		 14589 for (stub_sec = htab->stub_bfd->sections;
14590 stub_sec != NULL;
8029a119
NC		 14591 stub_sec = stub_sec->next)
14592 {
14593 /* Ignore non-stub sections. */
14594 if (!strstr (stub_sec->name, STUB_SUFFIX))
14595 continue;
da5938a2 14596
8029a119 14597 osi.sec = stub_sec;
da5938a2 14598
8029a119
NC		 14599 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14600 (output_bfd, osi.sec->output_section);
da5938a2 14601
8029a119
NC		 14602 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14603 }
14604 }
da5938a2 14605
91a5743d 14606 /* Finally, output mapping symbols for the PLT. */
34e77a92 14607 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 14608 {
34e77a92
RS		 14609 osi.sec = htab->root.splt;
14610 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14611 (output_bfd, osi.sec->output_section));
14612
14613 /* Output mapping symbols for the plt header. SymbianOS does not have a
14614 plt header. */
14615 if (htab->vxworks_p)
14616 {
14617 /* VxWorks shared libraries have no PLT header. */
14618 if (!info->shared)
14619 {
14620 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14621 return FALSE;
14622 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14623 return FALSE;
14624 }
14625 }
14626 else if (!htab->symbian_p)
4e617b1e 14627 {
7413f23f 14628 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 14629 return FALSE;
34e77a92
RS		 14630#ifndef FOUR_WORD_PLT
14631 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 14632 return FALSE;
34e77a92 14633#endif
4e617b1e
PB		 14634 }
14635 }
34e77a92
RS		 14636 if ((htab->root.splt && htab->root.splt->size > 0)
14637 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 14638 {
34e77a92
RS		 14639 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14640 for (input_bfd = info->input_bfds;
14641 input_bfd != NULL;
14642 input_bfd = input_bfd->link_next)
14643 {
14644 struct arm_local_iplt_info **local_iplt;
14645 unsigned int i, num_syms;
4e617b1e 14646
34e77a92
RS		 14647 local_iplt = elf32_arm_local_iplt (input_bfd);
14648 if (local_iplt != NULL)
14649 {
14650 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14651 for (i = 0; i < num_syms; i++)
14652 if (local_iplt[i] != NULL
14653 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14654 &local_iplt[i]->root,
14655 &local_iplt[i]->arm))
14656 return FALSE;
14657 }
14658 }
14659 }
0855e32b
NS		 14660 if (htab->dt_tlsdesc_plt != 0)
14661 {
14662 /* Mapping symbols for the lazy tls trampoline. */
14663 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14664 return FALSE;
14665
14666 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14667 htab->dt_tlsdesc_plt + 24))
14668 return FALSE;
14669 }
14670 if (htab->tls_trampoline != 0)
14671 {
14672 /* Mapping symbols for the tls trampoline. */
14673 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14674 return FALSE;
14675#ifdef FOUR_WORD_PLT
14676 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14677 htab->tls_trampoline + 12))
14678 return FALSE;
14679#endif
14680 }
14681
4e617b1e
PB		 14682 return TRUE;
14683}
14684
e489d0ae
PB		 14685/* Allocate target specific section data. */
14686
14687static bfd_boolean
14688elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14689{
f592407e
AM		 14690 if (!sec->used_by_bfd)
14691 {
14692 _arm_elf_section_data *sdata;
14693 bfd_size_type amt = sizeof (*sdata);
e489d0ae 14694
21d799b5 14695 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 14696 if (sdata == NULL)
14697 return FALSE;
14698 sec->used_by_bfd = sdata;
14699 }
e489d0ae
PB		 14700
14701 return _bfd_elf_new_section_hook (abfd, sec);
14702}
14703
14704
14705/* Used to order a list of mapping symbols by address. */
14706
14707static int
14708elf32_arm_compare_mapping (const void * a, const void * b)
14709{
7f6a71ff
JM		 14710 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14711 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14712
14713 if (amap->vma > bmap->vma)
14714 return 1;
14715 else if (amap->vma < bmap->vma)
14716 return -1;
14717 else if (amap->type > bmap->type)
14718 /* Ensure results do not depend on the host qsort for objects with
14719 multiple mapping symbols at the same address by sorting on type
14720 after vma. */
14721 return 1;
14722 else if (amap->type < bmap->type)
14723 return -1;
14724 else
14725 return 0;
e489d0ae
PB		 14726}
14727
2468f9c9
PB		 14728/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
14729
14730static unsigned long
14731offset_prel31 (unsigned long addr, bfd_vma offset)
14732{
14733 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
14734}
14735
14736/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
14737 relocations. */
14738
14739static void
14740copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
14741{
14742 unsigned long first_word = bfd_get_32 (output_bfd, from);
14743 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
14744
14745 /* High bit of first word is supposed to be zero. */
14746 if ((first_word & 0x80000000ul) == 0)
14747 first_word = offset_prel31 (first_word, offset);
14748
14749 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
14750 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
14751 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
14752 second_word = offset_prel31 (second_word, offset);
14753
14754 bfd_put_32 (output_bfd, first_word, to);
14755 bfd_put_32 (output_bfd, second_word, to + 4);
14756}
e489d0ae 14757
48229727
JB		 14758/* Data for make_branch_to_a8_stub(). */
14759
14760struct a8_branch_to_stub_data {
14761 asection *writing_section;
14762 bfd_byte *contents;
14763};
14764
14765
14766/* Helper to insert branches to Cortex-A8 erratum stubs in the right
14767 places for a particular section. */
14768
14769static bfd_boolean
14770make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
14771 void *in_arg)
14772{
14773 struct elf32_arm_stub_hash_entry *stub_entry;
14774 struct a8_branch_to_stub_data *data;
14775 bfd_byte *contents;
14776 unsigned long branch_insn;
14777 bfd_vma veneered_insn_loc, veneer_entry_loc;
14778 bfd_signed_vma branch_offset;
14779 bfd *abfd;
91d6fa6a 14780 unsigned int target;
48229727
JB		 14781
14782 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14783 data = (struct a8_branch_to_stub_data *) in_arg;
14784
14785 if (stub_entry->target_section != data->writing_section
4563a860 14786 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 14787 return TRUE;
14788
14789 contents = data->contents;
14790
14791 veneered_insn_loc = stub_entry->target_section->output_section->vma
14792 + stub_entry->target_section->output_offset
14793 + stub_entry->target_value;
14794
14795 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
14796 + stub_entry->stub_sec->output_offset
14797 + stub_entry->stub_offset;
14798
14799 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
14800 veneered_insn_loc &= ~3u;
14801
14802 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
14803
14804 abfd = stub_entry->target_section->owner;
91d6fa6a 14805 target = stub_entry->target_value;
48229727
JB		 14806
14807 /* We attempt to avoid this condition by setting stubs_always_after_branch
14808 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
14809 This check is just to be on the safe side... */
14810 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
14811 {
14812 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
14813 "allocated in unsafe location"), abfd);
14814 return FALSE;
14815 }
14816
14817 switch (stub_entry->stub_type)
14818 {
14819 case arm_stub_a8_veneer_b:
14820 case arm_stub_a8_veneer_b_cond:
14821 branch_insn = 0xf0009000;
14822 goto jump24;
14823
14824 case arm_stub_a8_veneer_blx:
14825 branch_insn = 0xf000e800;
14826 goto jump24;
14827
14828 case arm_stub_a8_veneer_bl:
14829 {
14830 unsigned int i1, j1, i2, j2, s;
14831
14832 branch_insn = 0xf000d000;
14833
14834 jump24:
14835 if (branch_offset < -16777216 || branch_offset > 16777214)
14836 {
14837 /* There's not much we can do apart from complain if this
14838 happens. */
14839 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
14840 "of range (input file too large)"), abfd);
14841 return FALSE;
14842 }
14843
14844 /* i1 = not(j1 eor s), so:
14845 not i1 = j1 eor s
14846 j1 = (not i1) eor s. */
14847
14848 branch_insn |= (branch_offset >> 1) & 0x7ff;
14849 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
14850 i2 = (branch_offset >> 22) & 1;
14851 i1 = (branch_offset >> 23) & 1;
14852 s = (branch_offset >> 24) & 1;
14853 j1 = (!i1) ^ s;
14854 j2 = (!i2) ^ s;
14855 branch_insn |= j2 << 11;
14856 branch_insn |= j1 << 13;
14857 branch_insn |= s << 26;
14858 }
14859 break;
14860
14861 default:
14862 BFD_FAIL ();
14863 return FALSE;
14864 }
14865
91d6fa6a
NC		 14866 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
14867 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 14868
14869 return TRUE;
14870}
14871
e489d0ae
PB		 14872/* Do code byteswapping. Return FALSE afterwards so that the section is
14873 written out as normal. */
14874
14875static bfd_boolean
c7b8f16e 14876elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 14877 struct bfd_link_info *link_info,
14878 asection *sec,
e489d0ae
PB		 14879 bfd_byte *contents)
14880{
48229727 14881 unsigned int mapcount, errcount;
8e3de13a 14882 _arm_elf_section_data *arm_data;
c7b8f16e 14883 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 14884 elf32_arm_section_map *map;
c7b8f16e 14885 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 14886 bfd_vma ptr;
14887 bfd_vma end;
c7b8f16e 14888 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 14889 bfd_byte tmp;
48229727 14890 unsigned int i;
57e8b36a 14891
4dfe6ac6
NC		 14892 if (globals == NULL)
14893 return FALSE;
14894
8e3de13a
NC		 14895 /* If this section has not been allocated an _arm_elf_section_data
14896 structure then we cannot record anything. */
14897 arm_data = get_arm_elf_section_data (sec);
14898 if (arm_data == NULL)
14899 return FALSE;
14900
14901 mapcount = arm_data->mapcount;
14902 map = arm_data->map;
c7b8f16e
JB		 14903 errcount = arm_data->erratumcount;
14904
14905 if (errcount != 0)
14906 {
14907 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
14908
14909 for (errnode = arm_data->erratumlist; errnode != 0;
14910 errnode = errnode->next)
14911 {
91d6fa6a 14912 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 14913
14914 switch (errnode->type)
14915 {
14916 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
14917 {
14918 bfd_vma branch_to_veneer;
14919 /* Original condition code of instruction, plus bit mask for
14920 ARM B instruction. */
14921 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
14922 | 0x0a000000;
14923
14924 /* The instruction is before the label. */
91d6fa6a 14925 target -= 4;
c7b8f16e
JB		 14926
14927 /* Above offset included in -4 below. */
14928 branch_to_veneer = errnode->u.b.veneer->vma
14929 - errnode->vma - 4;
14930
14931 if ((signed) branch_to_veneer < -(1 << 25)
14932 || (signed) branch_to_veneer >= (1 << 25))
14933 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14934 "range"), output_bfd);
14935
14936 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 14937 contents[endianflip ^ target] = insn & 0xff;
14938 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14939 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14940 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14941 }
14942 break;
14943
14944 case VFP11_ERRATUM_ARM_VENEER:
14945 {
14946 bfd_vma branch_from_veneer;
14947 unsigned int insn;
14948
14949 /* Take size of veneer into account. */
14950 branch_from_veneer = errnode->u.v.branch->vma
14951 - errnode->vma - 12;
14952
14953 if ((signed) branch_from_veneer < -(1 << 25)
14954 || (signed) branch_from_veneer >= (1 << 25))
14955 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
14956 "range"), output_bfd);
14957
14958 /* Original instruction. */
14959 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 14960 contents[endianflip ^ target] = insn & 0xff;
14961 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
14962 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
14963 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14964
14965 /* Branch back to insn after original insn. */
14966 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 14967 contents[endianflip ^ (target + 4)] = insn & 0xff;
14968 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
14969 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
14970 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 14971 }
14972 break;
14973
14974 default:
14975 abort ();
14976 }
14977 }
14978 }
e489d0ae 14979
2468f9c9
PB		 14980 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
14981 {
14982 arm_unwind_table_edit *edit_node
14983 = arm_data->u.exidx.unwind_edit_list;
14984 /* Now, sec->size is the size of the section we will write. The original
14985 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
14986 markers) was sec->rawsize. (This isn't the case if we perform no
14987 edits, then rawsize will be zero and we should use size). */
21d799b5 14988 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 14989 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
14990 unsigned int in_index, out_index;
14991 bfd_vma add_to_offsets = 0;
14992
14993 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
14994 {
14995 if (edit_node)
14996 {
14997 unsigned int edit_index = edit_node->index;
14998
14999 if (in_index < edit_index && in_index * 8 < input_size)
15000 {
15001 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15002 contents + in_index * 8, add_to_offsets);
15003 out_index++;
15004 in_index++;
15005 }
15006 else if (in_index == edit_index
15007 || (in_index * 8 >= input_size
15008 && edit_index == UINT_MAX))
15009 {
15010 switch (edit_node->type)
15011 {
15012 case DELETE_EXIDX_ENTRY:
15013 in_index++;
15014 add_to_offsets += 8;
15015 break;
15016
15017 case INSERT_EXIDX_CANTUNWIND_AT_END:
15018 {
15019 asection *text_sec = edit_node->linked_section;
15020 bfd_vma text_offset = text_sec->output_section->vma
15021 + text_sec->output_offset
15022 + text_sec->size;
15023 bfd_vma exidx_offset = offset + out_index * 8;
15024 unsigned long prel31_offset;
15025
15026 /* Note: this is meant to be equivalent to an
15027 R_ARM_PREL31 relocation. These synthetic
15028 EXIDX_CANTUNWIND markers are not relocated by the
15029 usual BFD method. */
15030 prel31_offset = (text_offset - exidx_offset)
15031 & 0x7ffffffful;
15032
15033 /* First address we can't unwind. */
15034 bfd_put_32 (output_bfd, prel31_offset,
15035 &edited_contents[out_index * 8]);
15036
15037 /* Code for EXIDX_CANTUNWIND. */
15038 bfd_put_32 (output_bfd, 0x1,
15039 &edited_contents[out_index * 8 + 4]);
15040
15041 out_index++;
15042 add_to_offsets -= 8;
15043 }
15044 break;
15045 }
15046
15047 edit_node = edit_node->next;
15048 }
15049 }
15050 else
15051 {
15052 /* No more edits, copy remaining entries verbatim. */
15053 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15054 contents + in_index * 8, add_to_offsets);
15055 out_index++;
15056 in_index++;
15057 }
15058 }
15059
15060 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15061 bfd_set_section_contents (output_bfd, sec->output_section,
15062 edited_contents,
15063 (file_ptr) sec->output_offset, sec->size);
15064
15065 return TRUE;
15066 }
15067
48229727
JB		 15068 /* Fix code to point to Cortex-A8 erratum stubs. */
15069 if (globals->fix_cortex_a8)
15070 {
15071 struct a8_branch_to_stub_data data;
15072
15073 data.writing_section = sec;
15074 data.contents = contents;
15075
15076 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15077 &data);
15078 }
15079
e489d0ae
PB		 15080 if (mapcount == 0)
15081 return FALSE;
15082
c7b8f16e 15083 if (globals->byteswap_code)
e489d0ae 15084 {
c7b8f16e 15085 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15086
c7b8f16e
JB		 15087 ptr = map[0].vma;
15088 for (i = 0; i < mapcount; i++)
15089 {
15090 if (i == mapcount - 1)
15091 end = sec->size;
15092 else
15093 end = map[i + 1].vma;
e489d0ae 15094
c7b8f16e 15095 switch (map[i].type)
e489d0ae 15096 {
c7b8f16e
JB		 15097 case 'a':
15098 /* Byte swap code words. */
15099 while (ptr + 3 < end)
15100 {
15101 tmp = contents[ptr];
15102 contents[ptr] = contents[ptr + 3];
15103 contents[ptr + 3] = tmp;
15104 tmp = contents[ptr + 1];
15105 contents[ptr + 1] = contents[ptr + 2];
15106 contents[ptr + 2] = tmp;
15107 ptr += 4;
15108 }
15109 break;
e489d0ae 15110
c7b8f16e
JB		 15111 case 't':
15112 /* Byte swap code halfwords. */
15113 while (ptr + 1 < end)
15114 {
15115 tmp = contents[ptr];
15116 contents[ptr] = contents[ptr + 1];
15117 contents[ptr + 1] = tmp;
15118 ptr += 2;
15119 }
15120 break;
15121
15122 case 'd':
15123 /* Leave data alone. */
15124 break;
15125 }
15126 ptr = end;
15127 }
e489d0ae 15128 }
8e3de13a 15129
93204d3a 15130 free (map);
47b2e99c 15131 arm_data->mapcount = -1;
c7b8f16e 15132 arm_data->mapsize = 0;
8e3de13a 15133 arm_data->map = NULL;
8e3de13a 15134
e489d0ae
PB		 15135 return FALSE;
15136}
15137
0beaef2b
PB		 15138/* Mangle thumb function symbols as we read them in. */
15139
8384fb8f 15140static bfd_boolean
0beaef2b
PB		 15141elf32_arm_swap_symbol_in (bfd * abfd,
15142 const void *psrc,
15143 const void *pshn,
15144 Elf_Internal_Sym *dst)
15145{
8384fb8f
AM		 15146 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15147 return FALSE;
0beaef2b
PB		 15148
15149 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15150 the address. */
63e1a0fc
PB		 15151 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15152 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15153 {
63e1a0fc
PB		 15154 if (dst->st_value & 1)
15155 {
15156 dst->st_value &= ~(bfd_vma) 1;
15157 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15158 }
15159 else
15160 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15161 }
15162 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15163 {
15164 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15165 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15166 }
35fc36a8
RS		 15167 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15168 dst->st_target_internal = ST_BRANCH_LONG;
15169 else
63e1a0fc 15170 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15171
8384fb8f 15172 return TRUE;
0beaef2b
PB		 15173}
15174
15175
15176/* Mangle thumb function symbols as we write them out. */
15177
15178static void
15179elf32_arm_swap_symbol_out (bfd *abfd,
15180 const Elf_Internal_Sym *src,
15181 void *cdst,
15182 void *shndx)
15183{
15184 Elf_Internal_Sym newsym;
15185
15186 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15187 of the address set, as per the new EABI. We do this unconditionally
15188 because objcopy does not set the elf header flags until after
15189 it writes out the symbol table. */
35fc36a8 15190 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15191 {
15192 newsym = *src;
34e77a92
RS		 15193 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15194 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 15195 if (newsym.st_shndx != SHN_UNDEF)
15196 {
15197 /* Do this only for defined symbols. At link type, the static
15198 linker will simulate the work of dynamic linker of resolving
15199 symbols and will carry over the thumbness of found symbols to
15200 the output symbol table. It's not clear how it happens, but
b0fead2b 15201 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 15202 runtime, and writing '1' for them will be confusing for users
15203 and possibly for dynamic linker itself.
15204 */
15205 newsym.st_value |= 1;
15206 }
906e58ca 15207
0beaef2b
PB		 15208 src = &newsym;
15209 }
15210 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15211}
15212
b294bdf8
MM		 15213/* Add the PT_ARM_EXIDX program header. */
15214
15215static bfd_boolean
906e58ca 15216elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15217 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15218{
15219 struct elf_segment_map *m;
15220 asection *sec;
15221
15222 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15223 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15224 {
15225 /* If there is already a PT_ARM_EXIDX header, then we do not
15226 want to add another one. This situation arises when running
15227 "strip"; the input binary already has the header. */
15228 m = elf_tdata (abfd)->segment_map;
15229 while (m && m->p_type != PT_ARM_EXIDX)
15230 m = m->next;
15231 if (!m)
15232 {
21d799b5
NC		 15233 m = (struct elf_segment_map *)
15234 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15235 if (m == NULL)
15236 return FALSE;
15237 m->p_type = PT_ARM_EXIDX;
15238 m->count = 1;
15239 m->sections[0] = sec;
15240
15241 m->next = elf_tdata (abfd)->segment_map;
15242 elf_tdata (abfd)->segment_map = m;
15243 }
15244 }
15245
15246 return TRUE;
15247}
15248
15249/* We may add a PT_ARM_EXIDX program header. */
15250
15251static int
a6b96beb
AM		 15252elf32_arm_additional_program_headers (bfd *abfd,
15253 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15254{
15255 asection *sec;
15256
15257 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15258 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15259 return 1;
15260 else
15261 return 0;
15262}
15263
34e77a92
RS		 15264/* Hook called by the linker routine which adds symbols from an object
15265 file. */
15266
15267static bfd_boolean
15268elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15269 Elf_Internal_Sym *sym, const char **namep,
15270 flagword *flagsp, asection **secp, bfd_vma *valp)
15271{
15272 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15273 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15274 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15275 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15276
15277 if (elf32_arm_hash_table (info)->vxworks_p
15278 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15279 flagsp, secp, valp))
15280 return FALSE;
15281
15282 return TRUE;
15283}
15284
0beaef2b 15285/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15286const struct elf_size_info elf32_arm_size_info =
15287{
0beaef2b
PB		 15288 sizeof (Elf32_External_Ehdr),
15289 sizeof (Elf32_External_Phdr),
15290 sizeof (Elf32_External_Shdr),
15291 sizeof (Elf32_External_Rel),
15292 sizeof (Elf32_External_Rela),
15293 sizeof (Elf32_External_Sym),
15294 sizeof (Elf32_External_Dyn),
15295 sizeof (Elf_External_Note),
15296 4,
15297 1,
15298 32, 2,
15299 ELFCLASS32, EV_CURRENT,
15300 bfd_elf32_write_out_phdrs,
15301 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15302 bfd_elf32_checksum_contents,
0beaef2b
PB		 15303 bfd_elf32_write_relocs,
15304 elf32_arm_swap_symbol_in,
15305 elf32_arm_swap_symbol_out,
15306 bfd_elf32_slurp_reloc_table,
15307 bfd_elf32_slurp_symbol_table,
15308 bfd_elf32_swap_dyn_in,
15309 bfd_elf32_swap_dyn_out,
15310 bfd_elf32_swap_reloc_in,
15311 bfd_elf32_swap_reloc_out,
15312 bfd_elf32_swap_reloca_in,
15313 bfd_elf32_swap_reloca_out
15314};
15315
252b5132 15316#define ELF_ARCH bfd_arch_arm
ae95ffa6 15317#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15318#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15319#ifdef __QNXTARGET__
15320#define ELF_MAXPAGESIZE 0x1000
15321#else
f21f3fe0 15322#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15323#endif
b1342370 15324#define ELF_MINPAGESIZE 0x1000
24718e3b 15325#define ELF_COMMONPAGESIZE 0x1000
252b5132 15326
ba93b8ac
DJ		 15327#define bfd_elf32_mkobject elf32_arm_mkobject
15328
99e4ae17
AJ		 15329#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15330#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15331#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15332#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15333#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15334#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15335#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 15336#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15337#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15338#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15339#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15340#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15341#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15342
15343#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15344#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15345#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15346#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15347#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15348#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15349#define elf_backend_write_section elf32_arm_write_section
252b5132 15350#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15351#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15352#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15353#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15354#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15355#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15356#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15357#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15358#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15359#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15360#define elf_backend_fake_sections elf32_arm_fake_sections
15361#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15362#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15363#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15364#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15365#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15366#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15367#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15368#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15369#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15370
15371#define elf_backend_can_refcount 1
15372#define elf_backend_can_gc_sections 1
15373#define elf_backend_plt_readonly 1
15374#define elf_backend_want_got_plt 1
15375#define elf_backend_want_plt_sym 0
15376#define elf_backend_may_use_rel_p 1
15377#define elf_backend_may_use_rela_p 0
4e7fd91e 15378#define elf_backend_default_use_rela_p 0
252b5132 15379
04f7c78d 15380#define elf_backend_got_header_size 12
04f7c78d 15381
906e58ca
NC		 15382#undef elf_backend_obj_attrs_vendor
15383#define elf_backend_obj_attrs_vendor "aeabi"
15384#undef elf_backend_obj_attrs_section
15385#define elf_backend_obj_attrs_section ".ARM.attributes"
15386#undef elf_backend_obj_attrs_arg_type
15387#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15388#undef elf_backend_obj_attrs_section_type
104d59d1 15389#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 15390#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
e8b36cd1 15391#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15392
252b5132 15393#include "elf32-target.h"
7f266840 15394
906e58ca 15395/* VxWorks Targets. */
4e7fd91e 15396
906e58ca 15397#undef TARGET_LITTLE_SYM
4e7fd91e 15398#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15399#undef TARGET_LITTLE_NAME
4e7fd91e 15400#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15401#undef TARGET_BIG_SYM
4e7fd91e 15402#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15403#undef TARGET_BIG_NAME
4e7fd91e
PB		 15404#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15405
15406/* Like elf32_arm_link_hash_table_create -- but overrides
15407 appropriately for VxWorks. */
906e58ca 15408
4e7fd91e
PB		 15409static struct bfd_link_hash_table *
15410elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15411{
15412 struct bfd_link_hash_table *ret;
15413
15414 ret = elf32_arm_link_hash_table_create (abfd);
15415 if (ret)
15416 {
15417 struct elf32_arm_link_hash_table *htab
00a97672 15418 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15419 htab->use_rel = 0;
00a97672 15420 htab->vxworks_p = 1;
4e7fd91e
PB		 15421 }
15422 return ret;
906e58ca 15423}
4e7fd91e 15424
00a97672
RS		 15425static void
15426elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15427{
15428 elf32_arm_final_write_processing (abfd, linker);
15429 elf_vxworks_final_write_processing (abfd, linker);
15430}
15431
906e58ca 15432#undef elf32_bed
4e7fd91e
PB		 15433#define elf32_bed elf32_arm_vxworks_bed
15434
906e58ca
NC		 15435#undef bfd_elf32_bfd_link_hash_table_create
15436#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 15437#undef elf_backend_final_write_processing
15438#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15439#undef elf_backend_emit_relocs
15440#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 15441
906e58ca 15442#undef elf_backend_may_use_rel_p
00a97672 15443#define elf_backend_may_use_rel_p 0
906e58ca 15444#undef elf_backend_may_use_rela_p
00a97672 15445#define elf_backend_may_use_rela_p 1
906e58ca 15446#undef elf_backend_default_use_rela_p
00a97672 15447#define elf_backend_default_use_rela_p 1
906e58ca 15448#undef elf_backend_want_plt_sym
00a97672 15449#define elf_backend_want_plt_sym 1
906e58ca 15450#undef ELF_MAXPAGESIZE
00a97672 15451#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 15452
15453#include "elf32-target.h"
15454
15455
21d799b5
NC		 15456/* Merge backend specific data from an object file to the output
15457 object file when linking. */
15458
15459static bfd_boolean
15460elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15461{
15462 flagword out_flags;
15463 flagword in_flags;
15464 bfd_boolean flags_compatible = TRUE;
15465 asection *sec;
15466
cc643b88 15467 /* Check if we have the same endianness. */
21d799b5
NC		 15468 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15469 return FALSE;
15470
15471 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15472 return TRUE;
15473
15474 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15475 return FALSE;
15476
15477 /* The input BFD must have had its flags initialised. */
15478 /* The following seems bogus to me -- The flags are initialized in
15479 the assembler but I don't think an elf_flags_init field is
15480 written into the object. */
15481 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15482
15483 in_flags = elf_elfheader (ibfd)->e_flags;
15484 out_flags = elf_elfheader (obfd)->e_flags;
15485
15486 /* In theory there is no reason why we couldn't handle this. However
15487 in practice it isn't even close to working and there is no real
15488 reason to want it. */
15489 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15490 && !(ibfd->flags & DYNAMIC)
15491 && (in_flags & EF_ARM_BE8))
15492 {
15493 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15494 ibfd);
15495 return FALSE;
15496 }
15497
15498 if (!elf_flags_init (obfd))
15499 {
15500 /* If the input is the default architecture and had the default
15501 flags then do not bother setting the flags for the output
15502 architecture, instead allow future merges to do this. If no
15503 future merges ever set these flags then they will retain their
15504 uninitialised values, which surprise surprise, correspond
15505 to the default values. */
15506 if (bfd_get_arch_info (ibfd)->the_default
15507 && elf_elfheader (ibfd)->e_flags == 0)
15508 return TRUE;
15509
15510 elf_flags_init (obfd) = TRUE;
15511 elf_elfheader (obfd)->e_flags = in_flags;
15512
15513 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15514 && bfd_get_arch_info (obfd)->the_default)
15515 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15516
15517 return TRUE;
15518 }
15519
15520 /* Determine what should happen if the input ARM architecture
15521 does not match the output ARM architecture. */
15522 if (! bfd_arm_merge_machines (ibfd, obfd))
15523 return FALSE;
15524
15525 /* Identical flags must be compatible. */
15526 if (in_flags == out_flags)
15527 return TRUE;
15528
15529 /* Check to see if the input BFD actually contains any sections. If
15530 not, its flags may not have been initialised either, but it
15531 cannot actually cause any incompatiblity. Do not short-circuit
15532 dynamic objects; their section list may be emptied by
15533 elf_link_add_object_symbols.
15534
15535 Also check to see if there are no code sections in the input.
15536 In this case there is no need to check for code specific flags.
15537 XXX - do we need to worry about floating-point format compatability
15538 in data sections ? */
15539 if (!(ibfd->flags & DYNAMIC))
15540 {
15541 bfd_boolean null_input_bfd = TRUE;
15542 bfd_boolean only_data_sections = TRUE;
15543
15544 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15545 {
15546 /* Ignore synthetic glue sections. */
15547 if (strcmp (sec->name, ".glue_7")
15548 && strcmp (sec->name, ".glue_7t"))
15549 {
15550 if ((bfd_get_section_flags (ibfd, sec)
15551 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15552 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15553 only_data_sections = FALSE;
15554
15555 null_input_bfd = FALSE;
15556 break;
15557 }
15558 }
15559
15560 if (null_input_bfd || only_data_sections)
15561 return TRUE;
15562 }
15563
15564 /* Complain about various flag mismatches. */
15565 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15566 EF_ARM_EABI_VERSION (out_flags)))
15567 {
15568 _bfd_error_handler
15569 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15570 ibfd, obfd,
15571 (in_flags & EF_ARM_EABIMASK) >> 24,
15572 (out_flags & EF_ARM_EABIMASK) >> 24);
15573 return FALSE;
15574 }
15575
15576 /* Not sure what needs to be checked for EABI versions >= 1. */
15577 /* VxWorks libraries do not use these flags. */
15578 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15579 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15580 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15581 {
15582 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15583 {
15584 _bfd_error_handler
15585 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15586 ibfd, obfd,
15587 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15588 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15589 flags_compatible = FALSE;
15590 }
15591
15592 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15593 {
15594 if (in_flags & EF_ARM_APCS_FLOAT)
15595 _bfd_error_handler
15596 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15597 ibfd, obfd);
15598 else
15599 _bfd_error_handler
15600 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15601 ibfd, obfd);
15602
15603 flags_compatible = FALSE;
15604 }
15605
15606 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15607 {
15608 if (in_flags & EF_ARM_VFP_FLOAT)
15609 _bfd_error_handler
15610 (_("error: %B uses VFP instructions, whereas %B does not"),
15611 ibfd, obfd);
15612 else
15613 _bfd_error_handler
15614 (_("error: %B uses FPA instructions, whereas %B does not"),
15615 ibfd, obfd);
15616
15617 flags_compatible = FALSE;
15618 }
15619
15620 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15621 {
15622 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15623 _bfd_error_handler
15624 (_("error: %B uses Maverick instructions, whereas %B does not"),
15625 ibfd, obfd);
15626 else
15627 _bfd_error_handler
15628 (_("error: %B does not use Maverick instructions, whereas %B does"),
15629 ibfd, obfd);
15630
15631 flags_compatible = FALSE;
15632 }
15633
15634#ifdef EF_ARM_SOFT_FLOAT
15635 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15636 {
15637 /* We can allow interworking between code that is VFP format
15638 layout, and uses either soft float or integer regs for
15639 passing floating point arguments and results. We already
15640 know that the APCS_FLOAT flags match; similarly for VFP
15641 flags. */
15642 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15643 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15644 {
15645 if (in_flags & EF_ARM_SOFT_FLOAT)
15646 _bfd_error_handler
15647 (_("error: %B uses software FP, whereas %B uses hardware FP"),
15648 ibfd, obfd);
15649 else
15650 _bfd_error_handler
15651 (_("error: %B uses hardware FP, whereas %B uses software FP"),
15652 ibfd, obfd);
15653
15654 flags_compatible = FALSE;
15655 }
15656 }
15657#endif
15658
15659 /* Interworking mismatch is only a warning. */
15660 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
15661 {
15662 if (in_flags & EF_ARM_INTERWORK)
15663 {
15664 _bfd_error_handler
15665 (_("Warning: %B supports interworking, whereas %B does not"),
15666 ibfd, obfd);
15667 }
15668 else
15669 {
15670 _bfd_error_handler
15671 (_("Warning: %B does not support interworking, whereas %B does"),
15672 ibfd, obfd);
15673 }
15674 }
15675 }
15676
15677 return flags_compatible;
15678}
15679
15680
906e58ca 15681/* Symbian OS Targets. */
7f266840 15682
906e58ca 15683#undef TARGET_LITTLE_SYM
7f266840 15684#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 15685#undef TARGET_LITTLE_NAME
7f266840 15686#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 15687#undef TARGET_BIG_SYM
7f266840 15688#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 15689#undef TARGET_BIG_NAME
7f266840
DJ		 15690#define TARGET_BIG_NAME "elf32-bigarm-symbian"
15691
15692/* Like elf32_arm_link_hash_table_create -- but overrides
15693 appropriately for Symbian OS. */
906e58ca 15694
7f266840
DJ		 15695static struct bfd_link_hash_table *
15696elf32_arm_symbian_link_hash_table_create (bfd *abfd)
15697{
15698 struct bfd_link_hash_table *ret;
15699
15700 ret = elf32_arm_link_hash_table_create (abfd);
15701 if (ret)
15702 {
15703 struct elf32_arm_link_hash_table *htab
15704 = (struct elf32_arm_link_hash_table *)ret;
15705 /* There is no PLT header for Symbian OS. */
15706 htab->plt_header_size = 0;
95720a86
DJ		 15707 /* The PLT entries are each one instruction and one word. */
15708 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 15709 htab->symbian_p = 1;
33bfe774
JB		 15710 /* Symbian uses armv5t or above, so use_blx is always true. */
15711 htab->use_blx = 1;
67687978 15712 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 15713 }
15714 return ret;
906e58ca 15715}
7f266840 15716
b35d266b 15717static const struct bfd_elf_special_section
551b43fd 15718elf32_arm_symbian_special_sections[] =
7f266840 15719{
5cd3778d
MM		 15720 /* In a BPABI executable, the dynamic linking sections do not go in
15721 the loadable read-only segment. The post-linker may wish to
15722 refer to these sections, but they are not part of the final
15723 program image. */
0112cd26
NC		 15724 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
15725 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
15726 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
15727 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
15728 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 15729 /* These sections do not need to be writable as the SymbianOS
15730 postlinker will arrange things so that no dynamic relocation is
15731 required. */
0112cd26
NC		 15732 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
15733 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
15734 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
15735 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 15736};
15737
c3c76620 15738static void
906e58ca 15739elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 15740 struct bfd_link_info *link_info)
c3c76620
MM		 15741{
15742 /* BPABI objects are never loaded directly by an OS kernel; they are
15743 processed by a postlinker first, into an OS-specific format. If
15744 the D_PAGED bit is set on the file, BFD will align segments on
15745 page boundaries, so that an OS can directly map the file. With
15746 BPABI objects, that just results in wasted space. In addition,
15747 because we clear the D_PAGED bit, map_sections_to_segments will
15748 recognize that the program headers should not be mapped into any
15749 loadable segment. */
15750 abfd->flags &= ~D_PAGED;
906e58ca 15751 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 15752}
7f266840
DJ		 15753
15754static bfd_boolean
906e58ca 15755elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 15756 struct bfd_link_info *info)
7f266840
DJ		 15757{
15758 struct elf_segment_map *m;
15759 asection *dynsec;
15760
7f266840
DJ		 15761 /* BPABI shared libraries and executables should have a PT_DYNAMIC
15762 segment. However, because the .dynamic section is not marked
15763 with SEC_LOAD, the generic ELF code will not create such a
15764 segment. */
15765 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
15766 if (dynsec)
15767 {
8ded5a0f
AM		 15768 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
15769 if (m->p_type == PT_DYNAMIC)
15770 break;
15771
15772 if (m == NULL)
15773 {
15774 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
15775 m->next = elf_tdata (abfd)->segment_map;
15776 elf_tdata (abfd)->segment_map = m;
15777 }
7f266840
DJ		 15778 }
15779
b294bdf8
MM		 15780 /* Also call the generic arm routine. */
15781 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 15782}
15783
95720a86
DJ		 15784/* Return address for Ith PLT stub in section PLT, for relocation REL
15785 or (bfd_vma) -1 if it should not be included. */
15786
15787static bfd_vma
15788elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
15789 const arelent *rel ATTRIBUTE_UNUSED)
15790{
15791 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
15792}
15793
15794
8029a119 15795#undef elf32_bed
7f266840
DJ		 15796#define elf32_bed elf32_arm_symbian_bed
15797
15798/* The dynamic sections are not allocated on SymbianOS; the postlinker
15799 will process them and then discard them. */
906e58ca 15800#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 15801#define ELF_DYNAMIC_SEC_FLAGS \
15802 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
15803
00a97672 15804#undef elf_backend_emit_relocs
c3c76620 15805
906e58ca
NC		 15806#undef bfd_elf32_bfd_link_hash_table_create
15807#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
15808#undef elf_backend_special_sections
15809#define elf_backend_special_sections elf32_arm_symbian_special_sections
15810#undef elf_backend_begin_write_processing
15811#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
15812#undef elf_backend_final_write_processing
15813#define elf_backend_final_write_processing elf32_arm_final_write_processing
15814
15815#undef elf_backend_modify_segment_map
7f266840
DJ		 15816#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
15817
15818/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 15819#undef elf_backend_got_header_size
7f266840
DJ		 15820#define elf_backend_got_header_size 0
15821
15822/* Similarly, there is no .got.plt section. */
906e58ca 15823#undef elf_backend_want_got_plt
7f266840
DJ		 15824#define elf_backend_want_got_plt 0
15825
906e58ca 15826#undef elf_backend_plt_sym_val
95720a86
DJ		 15827#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
15828
906e58ca 15829#undef elf_backend_may_use_rel_p
00a97672 15830#define elf_backend_may_use_rel_p 1
906e58ca 15831#undef elf_backend_may_use_rela_p
00a97672 15832#define elf_backend_may_use_rela_p 0
906e58ca 15833#undef elf_backend_default_use_rela_p
00a97672 15834#define elf_backend_default_use_rela_p 0
906e58ca 15835#undef elf_backend_want_plt_sym
00a97672 15836#define elf_backend_want_plt_sym 0
906e58ca 15837#undef ELF_MAXPAGESIZE
00a97672 15838#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 15839
7f266840 15840#include "elf32-target.h"
GDB Binutils - Deliverables
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