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2009-06-27 Michael Snyder <msnyder@vmware.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
81694485 3 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
24718e3b 64static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 65
3e6b1042
DJ		 66static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
68 asection *sec,
69 bfd_byte *contents);
70
7f266840
DJ		 71/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
74
c19d1205 75static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 76{
8029a119 77 /* No relocation. */
7f266840
DJ		 78 HOWTO (R_ARM_NONE, /* type */
79 0, /* rightshift */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
81 0, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
88 0, /* src_mask */
89 0, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 HOWTO (R_ARM_PC24, /* type */
93 2, /* rightshift */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
95 24, /* bitsize */
96 TRUE, /* pc_relative */
97 0, /* bitpos */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
105
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
108 0, /* rightshift */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
110 32, /* bitsize */
111 FALSE, /* pc_relative */
112 0, /* bitpos */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
120
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
123 0, /* rightshift */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
125 32, /* bitsize */
126 TRUE, /* pc_relative */
127 0, /* bitpos */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
135
c19d1205 136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 137 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 138 0, /* rightshift */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 140 32, /* bitsize */
141 TRUE, /* pc_relative */
7f266840 142 0, /* bitpos */
4962c51a 143 complain_overflow_dont,/* complain_on_overflow */
7f266840 144 bfd_elf_generic_reloc, /* special_function */
4962c51a 145 "R_ARM_LDR_PC_G0", /* name */
7f266840 146 FALSE, /* partial_inplace */
4962c51a
MS		 147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
7f266840
DJ		 150
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
153 0, /* rightshift */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
155 16, /* bitsize */
156 FALSE, /* pc_relative */
157 0, /* bitpos */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
165
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
168 0, /* rightshift */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
170 12, /* bitsize */
171 FALSE, /* pc_relative */
172 0, /* bitpos */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
00a97672
RS		 177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
7f266840
DJ		 179 FALSE), /* pcrel_offset */
180
181 HOWTO (R_ARM_THM_ABS5, /* type */
182 6, /* rightshift */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
184 5, /* bitsize */
185 FALSE, /* pc_relative */
186 0, /* bitpos */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
194
195 /* 8 bit absolute */
196 HOWTO (R_ARM_ABS8, /* type */
197 0, /* rightshift */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
199 8, /* bitsize */
200 FALSE, /* pc_relative */
201 0, /* bitpos */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
209
210 HOWTO (R_ARM_SBREL32, /* type */
211 0, /* rightshift */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
213 32, /* bitsize */
214 FALSE, /* pc_relative */
215 0, /* bitpos */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
223
c19d1205 224 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 225 1, /* rightshift */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 227 25, /* bitsize */
7f266840
DJ		 228 TRUE, /* pc_relative */
229 0, /* bitpos */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
c19d1205 232 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 233 FALSE, /* partial_inplace */
234 0x07ff07ff, /* src_mask */
235 0x07ff07ff, /* dst_mask */
236 TRUE), /* pcrel_offset */
237
238 HOWTO (R_ARM_THM_PC8, /* type */
239 1, /* rightshift */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
241 8, /* bitsize */
242 TRUE, /* pc_relative */
243 0, /* bitpos */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
251
c19d1205 252 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 255 32, /* bitsize */
256 FALSE, /* pc_relative */
7f266840
DJ		 257 0, /* bitpos */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
c19d1205 260 "R_ARM_BREL_ADJ", /* name */
7f266840 261 FALSE, /* partial_inplace */
c19d1205
ZW		 262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
7f266840
DJ		 265
266 HOWTO (R_ARM_SWI24, /* type */
267 0, /* rightshift */
268 0, /* size (0 = byte, 1 = short, 2 = long) */
269 0, /* bitsize */
270 FALSE, /* pc_relative */
271 0, /* bitpos */
272 complain_overflow_signed,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_SWI24", /* name */
275 FALSE, /* partial_inplace */
276 0x00000000, /* src_mask */
277 0x00000000, /* dst_mask */
278 FALSE), /* pcrel_offset */
279
280 HOWTO (R_ARM_THM_SWI8, /* type */
281 0, /* rightshift */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
283 0, /* bitsize */
284 FALSE, /* pc_relative */
285 0, /* bitpos */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
293
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
296 2, /* rightshift */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
298 25, /* bitsize */
299 TRUE, /* pc_relative */
300 0, /* bitpos */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
308
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
311 2, /* rightshift */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
313 22, /* bitsize */
314 TRUE, /* pc_relative */
315 0, /* bitpos */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff07ff, /* src_mask */
321 0x07ff07ff, /* dst_mask */
322 TRUE), /* pcrel_offset */
323
ba93b8ac 324 /* Dynamic TLS relocations. */
7f266840 325
ba93b8ac
DJ		 326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
327 0, /* rightshift */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
329 32, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
7f266840 339
ba93b8ac
DJ		 340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
341 0, /* rightshift */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
343 32, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
7f266840 353
ba93b8ac
DJ		 354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
355 0, /* rightshift */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
357 32, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
7f266840
DJ		 367
368 /* Relocs used in ARM Linux */
369
370 HOWTO (R_ARM_COPY, /* type */
371 0, /* rightshift */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
373 32, /* bitsize */
374 FALSE, /* pc_relative */
375 0, /* bitpos */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
383
384 HOWTO (R_ARM_GLOB_DAT, /* type */
385 0, /* rightshift */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
387 32, /* bitsize */
388 FALSE, /* pc_relative */
389 0, /* bitpos */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
397
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
399 0, /* rightshift */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
401 32, /* bitsize */
402 FALSE, /* pc_relative */
403 0, /* bitpos */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
411
412 HOWTO (R_ARM_RELATIVE, /* type */
413 0, /* rightshift */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
415 32, /* bitsize */
416 FALSE, /* pc_relative */
417 0, /* bitpos */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
425
c19d1205 426 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 427 0, /* rightshift */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
429 32, /* bitsize */
430 FALSE, /* pc_relative */
431 0, /* bitpos */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
c19d1205 434 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
439
440 HOWTO (R_ARM_GOTPC, /* type */
441 0, /* rightshift */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
443 32, /* bitsize */
444 TRUE, /* pc_relative */
445 0, /* bitpos */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
453
454 HOWTO (R_ARM_GOT32, /* type */
455 0, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 32, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 HOWTO (R_ARM_PLT32, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 471 24, /* bitsize */
7f266840
DJ		 472 TRUE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
ce490eda 477 FALSE, /* partial_inplace */
7f266840
DJ		 478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
481
482 HOWTO (R_ARM_CALL, /* type */
483 2, /* rightshift */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
485 24, /* bitsize */
486 TRUE, /* pc_relative */
487 0, /* bitpos */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
495
496 HOWTO (R_ARM_JUMP24, /* type */
497 2, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 24, /* bitsize */
500 TRUE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
509
c19d1205
ZW		 510 HOWTO (R_ARM_THM_JUMP24, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 24, /* bitsize */
514 TRUE, /* pc_relative */
7f266840 515 0, /* bitpos */
c19d1205 516 complain_overflow_signed,/* complain_on_overflow */
7f266840 517 bfd_elf_generic_reloc, /* special_function */
c19d1205 518 "R_ARM_THM_JUMP24", /* name */
7f266840 519 FALSE, /* partial_inplace */
c19d1205
ZW		 520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
7f266840 523
c19d1205 524 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 525 0, /* rightshift */
c19d1205
ZW		 526 2, /* size (0 = byte, 1 = short, 2 = long) */
527 32, /* bitsize */
7f266840
DJ		 528 FALSE, /* pc_relative */
529 0, /* bitpos */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
c19d1205 532 "R_ARM_BASE_ABS", /* name */
7f266840 533 FALSE, /* partial_inplace */
c19d1205
ZW		 534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
7f266840
DJ		 536 FALSE), /* pcrel_offset */
537
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 12, /* bitsize */
542 TRUE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
551
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
553 0, /* rightshift */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
555 12, /* bitsize */
556 TRUE, /* pc_relative */
557 8, /* bitpos */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
565
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
567 0, /* rightshift */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
569 12, /* bitsize */
570 TRUE, /* pc_relative */
571 16, /* bitpos */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
579
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
581 0, /* rightshift */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
583 12, /* bitsize */
584 FALSE, /* pc_relative */
585 0, /* bitpos */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
593
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
595 0, /* rightshift */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
597 8, /* bitsize */
598 FALSE, /* pc_relative */
599 12, /* bitpos */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
607
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
609 0, /* rightshift */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
611 8, /* bitsize */
612 FALSE, /* pc_relative */
613 20, /* bitpos */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
621
622 HOWTO (R_ARM_TARGET1, /* type */
623 0, /* rightshift */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
625 32, /* bitsize */
626 FALSE, /* pc_relative */
627 0, /* bitpos */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
635
636 HOWTO (R_ARM_ROSEGREL32, /* type */
637 0, /* rightshift */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
639 32, /* bitsize */
640 FALSE, /* pc_relative */
641 0, /* bitpos */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
649
650 HOWTO (R_ARM_V4BX, /* type */
651 0, /* rightshift */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
653 32, /* bitsize */
654 FALSE, /* pc_relative */
655 0, /* bitpos */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
663
664 HOWTO (R_ARM_TARGET2, /* type */
665 0, /* rightshift */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
667 32, /* bitsize */
668 FALSE, /* pc_relative */
669 0, /* bitpos */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
677
678 HOWTO (R_ARM_PREL31, /* type */
679 0, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 31, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
c19d1205
ZW		 691
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
693 0, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 16, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
39623e12
PB		 702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
c19d1205
ZW		 704 FALSE), /* pcrel_offset */
705
706 HOWTO (R_ARM_MOVT_ABS, /* type */
707 0, /* rightshift */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
709 16, /* bitsize */
710 FALSE, /* pc_relative */
711 0, /* bitpos */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
39623e12
PB		 716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
c19d1205
ZW		 718 FALSE), /* pcrel_offset */
719
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
721 0, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 16, /* bitsize */
724 TRUE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
39623e12
PB		 730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
c19d1205
ZW		 732 TRUE), /* pcrel_offset */
733
734 HOWTO (R_ARM_MOVT_PREL, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 16, /* bitsize */
738 TRUE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
39623e12
PB		 744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
c19d1205
ZW		 746 TRUE), /* pcrel_offset */
747
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 16, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
763 0, /* rightshift */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
765 16, /* bitsize */
766 FALSE, /* pc_relative */
767 0, /* bitpos */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
775
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
777 0, /* rightshift */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
779 16, /* bitsize */
780 TRUE, /* pc_relative */
781 0, /* bitpos */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
789
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
791 0, /* rightshift */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
793 16, /* bitsize */
794 TRUE, /* pc_relative */
795 0, /* bitpos */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
803
804 HOWTO (R_ARM_THM_JUMP19, /* type */
805 1, /* rightshift */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
807 19, /* bitsize */
808 TRUE, /* pc_relative */
809 0, /* bitpos */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
817
818 HOWTO (R_ARM_THM_JUMP6, /* type */
819 1, /* rightshift */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
821 6, /* bitsize */
822 TRUE, /* pc_relative */
823 0, /* bitpos */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
831
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
836 0, /* rightshift */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
838 13, /* bitsize */
839 TRUE, /* pc_relative */
840 0, /* bitpos */
2cab6cc3 841 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
2cab6cc3
MS		 845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
c19d1205
ZW		 847 TRUE), /* pcrel_offset */
848
849 HOWTO (R_ARM_THM_PC12, /* type */
850 0, /* rightshift */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
852 13, /* bitsize */
853 TRUE, /* pc_relative */
854 0, /* bitpos */
2cab6cc3 855 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
2cab6cc3
MS		 859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
c19d1205
ZW		 861 TRUE), /* pcrel_offset */
862
863 HOWTO (R_ARM_ABS32_NOI, /* type */
864 0, /* rightshift */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
866 32, /* bitsize */
867 FALSE, /* pc_relative */
868 0, /* bitpos */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
876
877 HOWTO (R_ARM_REL32_NOI, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 TRUE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
7f266840 890
4962c51a
MS		 891 /* Group relocations. */
892
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
894 0, /* rightshift */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
896 32, /* bitsize */
897 TRUE, /* pc_relative */
898 0, /* bitpos */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
906
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 32, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
925 TRUE, /* pc_relative */
926 0, /* bitpos */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
934
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 32, /* bitsize */
939 TRUE, /* pc_relative */
940 0, /* bitpos */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
948
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
950 0, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 32, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
964 0, /* rightshift */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
966 32, /* bitsize */
967 TRUE, /* pc_relative */
968 0, /* bitpos */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
976
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
978 0, /* rightshift */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
980 32, /* bitsize */
981 TRUE, /* pc_relative */
982 0, /* bitpos */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
990
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
992 0, /* rightshift */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
994 32, /* bitsize */
995 TRUE, /* pc_relative */
996 0, /* bitpos */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1004
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1006 0, /* rightshift */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1008 32, /* bitsize */
1009 TRUE, /* pc_relative */
1010 0, /* bitpos */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1018
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1020 0, /* rightshift */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1022 32, /* bitsize */
1023 TRUE, /* pc_relative */
1024 0, /* bitpos */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1032
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1034 0, /* rightshift */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1036 32, /* bitsize */
1037 TRUE, /* pc_relative */
1038 0, /* bitpos */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1046
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1048 0, /* rightshift */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1050 32, /* bitsize */
1051 TRUE, /* pc_relative */
1052 0, /* bitpos */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1060
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1062 0, /* rightshift */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1064 32, /* bitsize */
1065 TRUE, /* pc_relative */
1066 0, /* bitpos */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1074
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1076 0, /* rightshift */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1078 32, /* bitsize */
1079 TRUE, /* pc_relative */
1080 0, /* bitpos */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1088
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1090 0, /* rightshift */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1092 32, /* bitsize */
1093 TRUE, /* pc_relative */
1094 0, /* bitpos */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1102
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 TRUE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1116
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 TRUE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1130
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1132 0, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 32, /* bitsize */
1135 TRUE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1144
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1146 0, /* rightshift */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1148 32, /* bitsize */
1149 TRUE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1158
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
1163 TRUE, /* pc_relative */
1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1172
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1174 0, /* rightshift */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1176 32, /* bitsize */
1177 TRUE, /* pc_relative */
1178 0, /* bitpos */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1186
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1188 0, /* rightshift */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1190 32, /* bitsize */
1191 TRUE, /* pc_relative */
1192 0, /* bitpos */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1200
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1202 0, /* rightshift */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1204 32, /* bitsize */
1205 TRUE, /* pc_relative */
1206 0, /* bitpos */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1214
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1216 0, /* rightshift */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1218 32, /* bitsize */
1219 TRUE, /* pc_relative */
1220 0, /* bitpos */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1228
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1230 0, /* rightshift */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1232 32, /* bitsize */
1233 TRUE, /* pc_relative */
1234 0, /* bitpos */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1242
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1244 0, /* rightshift */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1246 32, /* bitsize */
1247 TRUE, /* pc_relative */
1248 0, /* bitpos */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1256
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1258 0, /* rightshift */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1260 32, /* bitsize */
1261 TRUE, /* pc_relative */
1262 0, /* bitpos */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1270
1271 /* End of group relocations. */
c19d1205 1272
c19d1205
ZW		 1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1274 0, /* rightshift */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1276 16, /* bitsize */
1277 FALSE, /* pc_relative */
1278 0, /* bitpos */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1286
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1288 0, /* rightshift */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1290 16, /* bitsize */
1291 FALSE, /* pc_relative */
1292 0, /* bitpos */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1300
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1302 0, /* rightshift */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1304 16, /* bitsize */
1305 FALSE, /* pc_relative */
1306 0, /* bitpos */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1314
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1316 0, /* rightshift */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1318 16, /* bitsize */
1319 FALSE, /* pc_relative */
1320 0, /* bitpos */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1328
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1330 0, /* rightshift */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1332 16, /* bitsize */
1333 FALSE, /* pc_relative */
1334 0, /* bitpos */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1342
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 16, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
8029a119 1357 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1358 EMPTY_HOWTO (91),
1359 EMPTY_HOWTO (92),
1360 EMPTY_HOWTO (93),
1361
1362 HOWTO (R_ARM_PLT32_ABS, /* type */
1363 0, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 32, /* bitsize */
1366 FALSE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont,/* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
1370 "R_ARM_PLT32_ABS", /* name */
1371 FALSE, /* partial_inplace */
1372 0xffffffff, /* src_mask */
1373 0xffffffff, /* dst_mask */
1374 FALSE), /* pcrel_offset */
1375
1376 HOWTO (R_ARM_GOT_ABS, /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 32, /* bitsize */
1380 FALSE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont,/* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 "R_ARM_GOT_ABS", /* name */
1385 FALSE, /* partial_inplace */
1386 0xffffffff, /* src_mask */
1387 0xffffffff, /* dst_mask */
1388 FALSE), /* pcrel_offset */
1389
1390 HOWTO (R_ARM_GOT_PREL, /* type */
1391 0, /* rightshift */
1392 2, /* size (0 = byte, 1 = short, 2 = long) */
1393 32, /* bitsize */
1394 TRUE, /* pc_relative */
1395 0, /* bitpos */
1396 complain_overflow_dont, /* complain_on_overflow */
1397 bfd_elf_generic_reloc, /* special_function */
1398 "R_ARM_GOT_PREL", /* name */
1399 FALSE, /* partial_inplace */
1400 0xffffffff, /* src_mask */
1401 0xffffffff, /* dst_mask */
1402 TRUE), /* pcrel_offset */
1403
1404 HOWTO (R_ARM_GOT_BREL12, /* type */
1405 0, /* rightshift */
1406 2, /* size (0 = byte, 1 = short, 2 = long) */
1407 12, /* bitsize */
1408 FALSE, /* pc_relative */
1409 0, /* bitpos */
1410 complain_overflow_bitfield,/* complain_on_overflow */
1411 bfd_elf_generic_reloc, /* special_function */
1412 "R_ARM_GOT_BREL12", /* name */
1413 FALSE, /* partial_inplace */
1414 0x00000fff, /* src_mask */
1415 0x00000fff, /* dst_mask */
1416 FALSE), /* pcrel_offset */
1417
1418 HOWTO (R_ARM_GOTOFF12, /* type */
1419 0, /* rightshift */
1420 2, /* size (0 = byte, 1 = short, 2 = long) */
1421 12, /* bitsize */
1422 FALSE, /* pc_relative */
1423 0, /* bitpos */
1424 complain_overflow_bitfield,/* complain_on_overflow */
1425 bfd_elf_generic_reloc, /* special_function */
1426 "R_ARM_GOTOFF12", /* name */
1427 FALSE, /* partial_inplace */
1428 0x00000fff, /* src_mask */
1429 0x00000fff, /* dst_mask */
1430 FALSE), /* pcrel_offset */
1431
1432 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1433
1434 /* GNU extension to record C++ vtable member usage */
1435 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1436 0, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1438 0, /* bitsize */
ba93b8ac
DJ		 1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
c19d1205
ZW		 1441 complain_overflow_dont, /* complain_on_overflow */
1442 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1443 "R_ARM_GNU_VTENTRY", /* name */
1444 FALSE, /* partial_inplace */
1445 0, /* src_mask */
1446 0, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
1449 /* GNU extension to record C++ vtable hierarchy */
1450 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1451 0, /* rightshift */
1452 2, /* size (0 = byte, 1 = short, 2 = long) */
1453 0, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont, /* complain_on_overflow */
1457 NULL, /* special_function */
1458 "R_ARM_GNU_VTINHERIT", /* name */
1459 FALSE, /* partial_inplace */
1460 0, /* src_mask */
1461 0, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463
1464 HOWTO (R_ARM_THM_JUMP11, /* type */
1465 1, /* rightshift */
1466 1, /* size (0 = byte, 1 = short, 2 = long) */
1467 11, /* bitsize */
1468 TRUE, /* pc_relative */
1469 0, /* bitpos */
1470 complain_overflow_signed, /* complain_on_overflow */
1471 bfd_elf_generic_reloc, /* special_function */
1472 "R_ARM_THM_JUMP11", /* name */
1473 FALSE, /* partial_inplace */
1474 0x000007ff, /* src_mask */
1475 0x000007ff, /* dst_mask */
1476 TRUE), /* pcrel_offset */
1477
1478 HOWTO (R_ARM_THM_JUMP8, /* type */
1479 1, /* rightshift */
1480 1, /* size (0 = byte, 1 = short, 2 = long) */
1481 8, /* bitsize */
1482 TRUE, /* pc_relative */
1483 0, /* bitpos */
1484 complain_overflow_signed, /* complain_on_overflow */
1485 bfd_elf_generic_reloc, /* special_function */
1486 "R_ARM_THM_JUMP8", /* name */
1487 FALSE, /* partial_inplace */
1488 0x000000ff, /* src_mask */
1489 0x000000ff, /* dst_mask */
1490 TRUE), /* pcrel_offset */
ba93b8ac 1491
c19d1205
ZW		 1492 /* TLS relocations */
1493 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 32, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1500 NULL, /* special_function */
1501 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1502 TRUE, /* partial_inplace */
1503 0xffffffff, /* src_mask */
1504 0xffffffff, /* dst_mask */
c19d1205 1505 FALSE), /* pcrel_offset */
ba93b8ac 1506
ba93b8ac
DJ		 1507 HOWTO (R_ARM_TLS_LDM32, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 32, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_bitfield,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_ARM_TLS_LDM32", /* name */
1516 TRUE, /* partial_inplace */
1517 0xffffffff, /* src_mask */
1518 0xffffffff, /* dst_mask */
c19d1205 1519 FALSE), /* pcrel_offset */
ba93b8ac 1520
c19d1205 1521 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1522 0, /* rightshift */
1523 2, /* size (0 = byte, 1 = short, 2 = long) */
1524 32, /* bitsize */
1525 FALSE, /* pc_relative */
1526 0, /* bitpos */
1527 complain_overflow_bitfield,/* complain_on_overflow */
1528 bfd_elf_generic_reloc, /* special_function */
c19d1205 1529 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1530 TRUE, /* partial_inplace */
1531 0xffffffff, /* src_mask */
1532 0xffffffff, /* dst_mask */
c19d1205 1533 FALSE), /* pcrel_offset */
ba93b8ac 1534
ba93b8ac
DJ		 1535 HOWTO (R_ARM_TLS_IE32, /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 32, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_bitfield,/* complain_on_overflow */
1542 NULL, /* special_function */
1543 "R_ARM_TLS_IE32", /* name */
1544 TRUE, /* partial_inplace */
1545 0xffffffff, /* src_mask */
1546 0xffffffff, /* dst_mask */
c19d1205 1547 FALSE), /* pcrel_offset */
7f266840 1548
c19d1205 1549 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1550 0, /* rightshift */
1551 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1552 32, /* bitsize */
7f266840
DJ		 1553 FALSE, /* pc_relative */
1554 0, /* bitpos */
c19d1205
ZW		 1555 complain_overflow_bitfield,/* complain_on_overflow */
1556 bfd_elf_generic_reloc, /* special_function */
1557 "R_ARM_TLS_LE32", /* name */
1558 TRUE, /* partial_inplace */
1559 0xffffffff, /* src_mask */
1560 0xffffffff, /* dst_mask */
1561 FALSE), /* pcrel_offset */
7f266840 1562
c19d1205
ZW		 1563 HOWTO (R_ARM_TLS_LDO12, /* type */
1564 0, /* rightshift */
1565 2, /* size (0 = byte, 1 = short, 2 = long) */
1566 12, /* bitsize */
1567 FALSE, /* pc_relative */
7f266840 1568 0, /* bitpos */
c19d1205 1569 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1570 bfd_elf_generic_reloc, /* special_function */
c19d1205 1571 "R_ARM_TLS_LDO12", /* name */
7f266840 1572 FALSE, /* partial_inplace */
c19d1205
ZW		 1573 0x00000fff, /* src_mask */
1574 0x00000fff, /* dst_mask */
1575 FALSE), /* pcrel_offset */
7f266840 1576
c19d1205
ZW		 1577 HOWTO (R_ARM_TLS_LE12, /* type */
1578 0, /* rightshift */
1579 2, /* size (0 = byte, 1 = short, 2 = long) */
1580 12, /* bitsize */
1581 FALSE, /* pc_relative */
7f266840 1582 0, /* bitpos */
c19d1205 1583 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1584 bfd_elf_generic_reloc, /* special_function */
c19d1205 1585 "R_ARM_TLS_LE12", /* name */
7f266840 1586 FALSE, /* partial_inplace */
c19d1205
ZW		 1587 0x00000fff, /* src_mask */
1588 0x00000fff, /* dst_mask */
1589 FALSE), /* pcrel_offset */
7f266840 1590
c19d1205 1591 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1592 0, /* rightshift */
1593 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1594 12, /* bitsize */
1595 FALSE, /* pc_relative */
7f266840 1596 0, /* bitpos */
c19d1205 1597 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1598 bfd_elf_generic_reloc, /* special_function */
c19d1205 1599 "R_ARM_TLS_IE12GP", /* name */
7f266840 1600 FALSE, /* partial_inplace */
c19d1205
ZW		 1601 0x00000fff, /* src_mask */
1602 0x00000fff, /* dst_mask */
1603 FALSE), /* pcrel_offset */
1604};
1605
1606/* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
7f266840 1609
c19d1205
ZW		 1610 249-255 extended, currently unused, relocations: */
1611
4962c51a 1612static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1613{
1614 HOWTO (R_ARM_RREL32, /* type */
1615 0, /* rightshift */
1616 0, /* size (0 = byte, 1 = short, 2 = long) */
1617 0, /* bitsize */
1618 FALSE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_dont,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_RREL32", /* name */
1623 FALSE, /* partial_inplace */
1624 0, /* src_mask */
1625 0, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1627
1628 HOWTO (R_ARM_RABS32, /* type */
1629 0, /* rightshift */
1630 0, /* size (0 = byte, 1 = short, 2 = long) */
1631 0, /* bitsize */
1632 FALSE, /* pc_relative */
1633 0, /* bitpos */
1634 complain_overflow_dont,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_RABS32", /* name */
1637 FALSE, /* partial_inplace */
1638 0, /* src_mask */
1639 0, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1641
1642 HOWTO (R_ARM_RPC24, /* type */
1643 0, /* rightshift */
1644 0, /* size (0 = byte, 1 = short, 2 = long) */
1645 0, /* bitsize */
1646 FALSE, /* pc_relative */
1647 0, /* bitpos */
1648 complain_overflow_dont,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_RPC24", /* name */
1651 FALSE, /* partial_inplace */
1652 0, /* src_mask */
1653 0, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1655
1656 HOWTO (R_ARM_RBASE, /* type */
1657 0, /* rightshift */
1658 0, /* size (0 = byte, 1 = short, 2 = long) */
1659 0, /* bitsize */
1660 FALSE, /* pc_relative */
1661 0, /* bitpos */
1662 complain_overflow_dont,/* complain_on_overflow */
1663 bfd_elf_generic_reloc, /* special_function */
1664 "R_ARM_RBASE", /* name */
1665 FALSE, /* partial_inplace */
1666 0, /* src_mask */
1667 0, /* dst_mask */
1668 FALSE) /* pcrel_offset */
1669};
1670
1671static reloc_howto_type *
1672elf32_arm_howto_from_type (unsigned int r_type)
1673{
906e58ca 1674 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1675 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1676
c19d1205 1677 if (r_type >= R_ARM_RREL32
906e58ca 1678 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1679 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1680
c19d1205 1681 return NULL;
7f266840
DJ		 1682}
1683
1684static void
1685elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1686 Elf_Internal_Rela * elf_reloc)
1687{
1688 unsigned int r_type;
1689
1690 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1691 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1692}
1693
1694struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1697 unsigned char elf_reloc_val;
1698 };
1699
1700/* All entries in this list must also be present in elf32_arm_howto_table. */
1701static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1702 {
1703 {BFD_RELOC_NONE, R_ARM_NONE},
1704 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1705 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1706 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1707 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1708 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1709 {BFD_RELOC_32, R_ARM_ABS32},
1710 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1711 {BFD_RELOC_8, R_ARM_ABS8},
1712 {BFD_RELOC_16, R_ARM_ABS16},
1713 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1714 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1715 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1719 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1720 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1721 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1722 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1723 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1724 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1726 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1727 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1728 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1729 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1730 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1731 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1732 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1733 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1734 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1735 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1736 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1737 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1738 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1739 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1740 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1741 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1742 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1743 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1744 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1745 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1746 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1747 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1748 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1749 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1750 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1751 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1752 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1753 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1754 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1755 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1756 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1757 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1758 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1759 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1760 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1761 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1762 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1763 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1764 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1765 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1766 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1767 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1768 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1769 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1770 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1771 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1772 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1773 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1774 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1775 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1776 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1777 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1778 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1779 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1780 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1781 };
1782
1783static reloc_howto_type *
f1c71a59
ZW		 1784elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1785 bfd_reloc_code_real_type code)
7f266840
DJ		 1786{
1787 unsigned int i;
8029a119 1788
906e58ca 1789 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1790 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1791 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1792
c19d1205 1793 return NULL;
7f266840
DJ		 1794}
1795
157090f7
AM		 1796static reloc_howto_type *
1797elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1798 const char *r_name)
1799{
1800 unsigned int i;
1801
906e58ca 1802 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1803 if (elf32_arm_howto_table_1[i].name != NULL
1804 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1805 return &elf32_arm_howto_table_1[i];
1806
906e58ca 1807 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1808 if (elf32_arm_howto_table_2[i].name != NULL
1809 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1810 return &elf32_arm_howto_table_2[i];
1811
1812 return NULL;
1813}
1814
906e58ca
NC		 1815/* Support for core dump NOTE sections. */
1816
7f266840 1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
8029a119 1828 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
8029a119 1855 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
7f266840
DJ		 1865 {
1866 char *command = elf_tdata (abfd)->core_command;
1867 int n = strlen (command);
1868
1869 if (0 < n && command[n - 1] == ' ')
1870 command[n - 1] = '\0';
1871 }
1872
1873 return TRUE;
1874}
1875
1876#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1877#define TARGET_LITTLE_NAME "elf32-littlearm"
1878#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1879#define TARGET_BIG_NAME "elf32-bigarm"
1880
1881#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1883
252b5132
RH		 1884typedef unsigned long int insn32;
1885typedef unsigned short int insn16;
1886
3a4a14e9
PB		 1887/* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
57e8b36a 1889#define INTERWORK_FLAG(abfd) \
3a4a14e9 1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1893
252b5132
RH		 1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB		 1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
845b51d6
PB		 1907#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1908#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1909
7413f23f
DJ		 1910#define STUB_ENTRY_NAME "__%s_veneer"
1911
252b5132
RH		 1912/* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1914#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1915
5e681ec4
PB		 1916#ifdef FOUR_WORD_PLT
1917
252b5132
RH		 1918/* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
59f2c4e7 1920 called before the relocation has been set up calls the dynamic
9b485d32 1921 linker first. */
e5a52504 1922static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1923 {
1924 0xe52de004, /* str lr, [sp, #-4]! */
1925 0xe59fe010, /* ldr lr, [pc, #16] */
1926 0xe08fe00e, /* add lr, pc, lr */
1927 0xe5bef008, /* ldr pc, [lr, #8]! */
1928 };
1929
1930/* Subsequent entries in a procedure linkage table look like
1931 this. */
e5a52504 1932static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1933 {
1934 0xe28fc600, /* add ip, pc, #NN */
1935 0xe28cca00, /* add ip, ip, #NN */
1936 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1937 0x00000000, /* unused */
1938 };
1939
1940#else
1941
5e681ec4
PB		 1942/* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
e5a52504 1946static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1947 {
5e681ec4
PB		 1948 0xe52de004, /* str lr, [sp, #-4]! */
1949 0xe59fe004, /* ldr lr, [pc, #4] */
1950 0xe08fe00e, /* add lr, pc, lr */
1951 0xe5bef008, /* ldr pc, [lr, #8]! */
1952 0x00000000, /* &GOT[0] - . */
917583ad 1953 };
252b5132
RH		 1954
1955/* Subsequent entries in a procedure linkage table look like
1956 this. */
e5a52504 1957static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1958 {
1959 0xe28fc600, /* add ip, pc, #0xNN00000 */
1960 0xe28cca00, /* add ip, ip, #0xNN000 */
1961 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1962 };
1963
1964#endif
252b5132 1965
00a97672
RS		 1966/* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1968static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1969 {
1970 0xe52dc008, /* str ip,[sp,#-8]! */
1971 0xe59fc000, /* ldr ip,[pc] */
1972 0xe59cf008, /* ldr pc,[ip,#8] */
1973 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1974 };
1975
1976/* The format of subsequent entries in a VxWorks executable. */
1977static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1978 {
1979 0xe59fc000, /* ldr ip,[pc] */
1980 0xe59cf000, /* ldr pc,[ip] */
1981 0x00000000, /* .long @got */
1982 0xe59fc000, /* ldr ip,[pc] */
1983 0xea000000, /* b _PLT */
1984 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1985 };
1986
1987/* The format of entries in a VxWorks shared library. */
1988static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1989 {
1990 0xe59fc000, /* ldr ip,[pc] */
1991 0xe79cf009, /* ldr pc,[ip,r9] */
1992 0x00000000, /* .long @got */
1993 0xe59fc000, /* ldr ip,[pc] */
1994 0xe599f008, /* ldr pc,[r9,#8] */
1995 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1996 };
1997
b7693d02
DJ		 1998/* An initial stub used if the PLT entry is referenced from Thumb code. */
1999#define PLT_THUMB_STUB_SIZE 4
2000static const bfd_vma elf32_arm_plt_thumb_stub [] =
2001 {
2002 0x4778, /* bx pc */
2003 0x46c0 /* nop */
2004 };
2005
e5a52504
MM		 2006/* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
906e58ca 2008static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2009 {
83a358aa 2010 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2011 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2012 };
2013
906e58ca
NC		 2014#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2020
461a49ca
DJ		 2021enum stub_insn_type
2022 {
2023 THUMB16_TYPE = 1,
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2028
48229727
JB		 2029#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2031 is inserted in arm_build_one_stub(). */
2032#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2033#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2034#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2035#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2036#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2037#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2038
2039typedef struct
2040{
2041 bfd_vma data;
2042 enum stub_insn_type type;
ebe24dd4 2043 unsigned int r_type;
461a49ca
DJ		 2044 int reloc_addend;
2045} insn_sequence;
2046
fea2b4d6
CL		 2047/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2048 to reach the stub if necessary. */
461a49ca 2049static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2050 {
461a49ca
DJ		 2051 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2052 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2053 };
2054
fea2b4d6
CL		 2055/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2056 available. */
461a49ca 2057static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2058 {
461a49ca
DJ		 2059 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2060 ARM_INSN(0xe12fff1c), /* bx ip */
2061 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2062 };
2063
d3626fb0 2064/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2065static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2066 {
461a49ca
DJ		 2067 THUMB16_INSN(0xb401), /* push {r0} */
2068 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2069 THUMB16_INSN(0x4684), /* mov ip, r0 */
2070 THUMB16_INSN(0xbc01), /* pop {r0} */
2071 THUMB16_INSN(0x4760), /* bx ip */
2072 THUMB16_INSN(0xbf00), /* nop */
2073 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2074 };
2075
d3626fb0
CL		 2076/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2077 allowed. */
2078static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2079 {
2080 THUMB16_INSN(0x4778), /* bx pc */
2081 THUMB16_INSN(0x46c0), /* nop */
2082 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2083 ARM_INSN(0xe12fff1c), /* bx ip */
2084 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2085 };
2086
fea2b4d6
CL		 2087/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2088 available. */
461a49ca 2089static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2090 {
461a49ca
DJ		 2091 THUMB16_INSN(0x4778), /* bx pc */
2092 THUMB16_INSN(0x46c0), /* nop */
2093 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2094 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2095 };
2096
fea2b4d6
CL		 2097/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2098 one, when the destination is close enough. */
461a49ca 2099static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2100 {
461a49ca
DJ		 2101 THUMB16_INSN(0x4778), /* bx pc */
2102 THUMB16_INSN(0x46c0), /* nop */
2103 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2104 };
2105
cf3eccff 2106/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2107 blx to reach the stub if necessary. */
cf3eccff 2108static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2109 {
461a49ca
DJ		 2110 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2111 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2112 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2113 };
2114
cf3eccff
DJ		 2115/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2116 blx to reach the stub if necessary. We can not add into pc;
2117 it is not guaranteed to mode switch (different in ARMv6 and
2118 ARMv7). */
2119static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2120 {
2121 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2122 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2123 ARM_INSN(0xe12fff1c), /* bx ip */
2124 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2125 };
2126
ebe24dd4
CL		 2127/* V4T ARM -> ARM long branch stub, PIC. */
2128static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2129 {
2130 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2131 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2132 ARM_INSN(0xe12fff1c), /* bx ip */
2133 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2134 };
2135
2136/* V4T Thumb -> ARM long branch stub, PIC. */
2137static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2138 {
2139 THUMB16_INSN(0x4778), /* bx pc */
2140 THUMB16_INSN(0x46c0), /* nop */
2141 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2142 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2143 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2144 };
2145
d3626fb0
CL		 2146/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2147 architectures. */
ebe24dd4
CL		 2148static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2149 {
2150 THUMB16_INSN(0xb401), /* push {r0} */
2151 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2152 THUMB16_INSN(0x46fc), /* mov ip, pc */
2153 THUMB16_INSN(0x4484), /* add ip, r0 */
2154 THUMB16_INSN(0xbc01), /* pop {r0} */
2155 THUMB16_INSN(0x4760), /* bx ip */
2156 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2157 };
2158
d3626fb0
CL		 2159/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2160 allowed. */
2161static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2162 {
2163 THUMB16_INSN(0x4778), /* bx pc */
2164 THUMB16_INSN(0x46c0), /* nop */
2165 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2166 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2167 ARM_INSN(0xe12fff1c), /* bx ip */
2168 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2169 };
2170
48229727
JB		 2171/* Cortex-A8 erratum-workaround stubs. */
2172
2173/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2174 can't use a conditional branch to reach this stub). */
2175
2176static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2177 {
2178 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2179 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2180 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2181 };
2182
2183/* Stub used for b.w and bl.w instructions. */
2184
2185static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2186 {
2187 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2188 };
2189
2190static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2191 {
2192 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2193 };
2194
2195/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2196 instruction (which switches to ARM mode) to point to this stub. Jump to the
2197 real destination using an ARM-mode branch. */
2198
2199static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2200 {
2201 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2202 };
2203
906e58ca
NC		 2204/* Section name for stubs is the associated section name plus this
2205 string. */
2206#define STUB_SUFFIX ".stub"
2207
738a79f6
CL		 2208/* One entry per long/short branch stub defined above. */
2209#define DEF_STUBS \
2210 DEF_STUB(long_branch_any_any) \
2211 DEF_STUB(long_branch_v4t_arm_thumb) \
2212 DEF_STUB(long_branch_thumb_only) \
2213 DEF_STUB(long_branch_v4t_thumb_thumb) \
2214 DEF_STUB(long_branch_v4t_thumb_arm) \
2215 DEF_STUB(short_branch_v4t_thumb_arm) \
2216 DEF_STUB(long_branch_any_arm_pic) \
2217 DEF_STUB(long_branch_any_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2220 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2221 DEF_STUB(long_branch_thumb_only_pic) \
2222 DEF_STUB(a8_veneer_b_cond) \
2223 DEF_STUB(a8_veneer_b) \
2224 DEF_STUB(a8_veneer_bl) \
2225 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2226
2227#define DEF_STUB(x) arm_stub_##x,
2228enum elf32_arm_stub_type {
906e58ca 2229 arm_stub_none,
738a79f6
CL		 2230 DEF_STUBS
2231};
2232#undef DEF_STUB
2233
2234typedef struct
2235{
2236 const insn_sequence* template;
2237 int template_size;
2238} stub_def;
2239
2240#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2241static const stub_def stub_definitions[] = {
2242 {NULL, 0},
2243 DEF_STUBS
906e58ca
NC		 2244};
2245
2246struct elf32_arm_stub_hash_entry
2247{
2248 /* Base hash table entry structure. */
2249 struct bfd_hash_entry root;
2250
2251 /* The stub section. */
2252 asection *stub_sec;
2253
2254 /* Offset within stub_sec of the beginning of this stub. */
2255 bfd_vma stub_offset;
2256
2257 /* Given the symbol's value and its section we can determine its final
2258 value when building the stubs (so the stub knows where to jump). */
2259 bfd_vma target_value;
2260 asection *target_section;
2261
48229727
JB		 2262 /* Offset to apply to relocation referencing target_value. */
2263 bfd_vma target_addend;
2264
2265 /* The instruction which caused this stub to be generated (only valid for
2266 Cortex-A8 erratum workaround stubs at present). */
2267 unsigned long orig_insn;
2268
461a49ca 2269 /* The stub type. */
906e58ca 2270 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2271 /* Its encoding size in bytes. */
2272 int stub_size;
2273 /* Its template. */
2274 const insn_sequence *stub_template;
2275 /* The size of the template (number of entries). */
2276 int stub_template_size;
906e58ca
NC		 2277
2278 /* The symbol table entry, if any, that this was derived from. */
2279 struct elf32_arm_link_hash_entry *h;
2280
2281 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2282 unsigned char st_type;
2283
2284 /* Where this stub is being called from, or, in the case of combined
2285 stub sections, the first input section in the group. */
2286 asection *id_sec;
7413f23f
DJ		 2287
2288 /* The name for the local symbol at the start of this stub. The
2289 stub name in the hash table has to be unique; this does not, so
2290 it can be friendlier. */
2291 char *output_name;
906e58ca
NC		 2292};
2293
e489d0ae
PB		 2294/* Used to build a map of a section. This is required for mixed-endian
2295 code/data. */
2296
2297typedef struct elf32_elf_section_map
2298{
2299 bfd_vma vma;
2300 char type;
2301}
2302elf32_arm_section_map;
2303
c7b8f16e
JB		 2304/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2305
2306typedef enum
2307{
2308 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2309 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2310 VFP11_ERRATUM_ARM_VENEER,
2311 VFP11_ERRATUM_THUMB_VENEER
2312}
2313elf32_vfp11_erratum_type;
2314
2315typedef struct elf32_vfp11_erratum_list
2316{
2317 struct elf32_vfp11_erratum_list *next;
2318 bfd_vma vma;
2319 union
2320 {
2321 struct
2322 {
2323 struct elf32_vfp11_erratum_list *veneer;
2324 unsigned int vfp_insn;
2325 } b;
2326 struct
2327 {
2328 struct elf32_vfp11_erratum_list *branch;
2329 unsigned int id;
2330 } v;
2331 } u;
2332 elf32_vfp11_erratum_type type;
2333}
2334elf32_vfp11_erratum_list;
2335
2468f9c9
PB		 2336typedef enum
2337{
2338 DELETE_EXIDX_ENTRY,
2339 INSERT_EXIDX_CANTUNWIND_AT_END
2340}
2341arm_unwind_edit_type;
2342
2343/* A (sorted) list of edits to apply to an unwind table. */
2344typedef struct arm_unwind_table_edit
2345{
2346 arm_unwind_edit_type type;
2347 /* Note: we sometimes want to insert an unwind entry corresponding to a
2348 section different from the one we're currently writing out, so record the
2349 (text) section this edit relates to here. */
2350 asection *linked_section;
2351 unsigned int index;
2352 struct arm_unwind_table_edit *next;
2353}
2354arm_unwind_table_edit;
2355
8e3de13a 2356typedef struct _arm_elf_section_data
e489d0ae 2357{
2468f9c9 2358 /* Information about mapping symbols. */
e489d0ae 2359 struct bfd_elf_section_data elf;
8e3de13a 2360 unsigned int mapcount;
c7b8f16e 2361 unsigned int mapsize;
e489d0ae 2362 elf32_arm_section_map *map;
2468f9c9 2363 /* Information about CPU errata. */
c7b8f16e
JB		 2364 unsigned int erratumcount;
2365 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2366 /* Information about unwind tables. */
2367 union
2368 {
2369 /* Unwind info attached to a text section. */
2370 struct
2371 {
2372 asection *arm_exidx_sec;
2373 } text;
2374
2375 /* Unwind info attached to an .ARM.exidx section. */
2376 struct
2377 {
2378 arm_unwind_table_edit *unwind_edit_list;
2379 arm_unwind_table_edit *unwind_edit_tail;
2380 } exidx;
2381 } u;
8e3de13a
NC		 2382}
2383_arm_elf_section_data;
e489d0ae
PB		 2384
2385#define elf32_arm_section_data(sec) \
8e3de13a 2386 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2387
48229727
JB		 2388/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2389 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2390 so may be created multiple times: we use an array of these entries whilst
2391 relaxing which we can refresh easily, then create stubs for each potentially
2392 erratum-triggering instruction once we've settled on a solution. */
2393
2394struct a8_erratum_fix {
2395 bfd *input_bfd;
2396 asection *section;
2397 bfd_vma offset;
2398 bfd_vma addend;
2399 unsigned long orig_insn;
2400 char *stub_name;
2401 enum elf32_arm_stub_type stub_type;
2402};
2403
2404/* A table of relocs applied to branches which might trigger Cortex-A8
2405 erratum. */
2406
2407struct a8_erratum_reloc {
2408 bfd_vma from;
2409 bfd_vma destination;
2410 unsigned int r_type;
2411 unsigned char st_type;
2412 const char *sym_name;
2413 bfd_boolean non_a8_stub;
2414};
2415
ba93b8ac
DJ		 2416/* The size of the thread control block. */
2417#define TCB_SIZE 8
2418
0ffa91dd 2419struct elf_arm_obj_tdata
ba93b8ac
DJ		 2420{
2421 struct elf_obj_tdata root;
2422
2423 /* tls_type for each local got entry. */
2424 char *local_got_tls_type;
ee065d83 2425
bf21ed78
MS		 2426 /* Zero to warn when linking objects with incompatible enum sizes. */
2427 int no_enum_size_warning;
a9dc9481
JM		 2428
2429 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2430 int no_wchar_size_warning;
ba93b8ac
DJ		 2431};
2432
0ffa91dd
NC		 2433#define elf_arm_tdata(bfd) \
2434 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2435
0ffa91dd
NC		 2436#define elf32_arm_local_got_tls_type(bfd) \
2437 (elf_arm_tdata (bfd)->local_got_tls_type)
2438
2439#define is_arm_elf(bfd) \
2440 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2441 && elf_tdata (bfd) != NULL \
2442 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2443
2444static bfd_boolean
2445elf32_arm_mkobject (bfd *abfd)
2446{
0ffa91dd
NC		 2447 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2448 ARM_ELF_TDATA);
ba93b8ac
DJ		 2449}
2450
252b5132
RH		 2451/* The ARM linker needs to keep track of the number of relocs that it
2452 decides to copy in check_relocs for each symbol. This is so that
2453 it can discard PC relative relocs if it doesn't need them when
2454 linking with -Bsymbolic. We store the information in a field
2455 extending the regular ELF linker hash table. */
2456
ba93b8ac
DJ		 2457/* This structure keeps track of the number of relocs we have copied
2458 for a given symbol. */
5e681ec4 2459struct elf32_arm_relocs_copied
917583ad
NC		 2460 {
2461 /* Next section. */
5e681ec4 2462 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2463 /* A section in dynobj. */
2464 asection * section;
2465 /* Number of relocs copied in this section. */
2466 bfd_size_type count;
ba93b8ac
DJ		 2467 /* Number of PC-relative relocs copied in this section. */
2468 bfd_size_type pc_count;
917583ad 2469 };
252b5132 2470
ba93b8ac
DJ		 2471#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2472
ba96a88f 2473/* Arm ELF linker hash entry. */
252b5132 2474struct elf32_arm_link_hash_entry
917583ad
NC		 2475 {
2476 struct elf_link_hash_entry root;
252b5132 2477
917583ad 2478 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2479 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2480
2481 /* We reference count Thumb references to a PLT entry separately,
2482 so that we can emit the Thumb trampoline only if needed. */
2483 bfd_signed_vma plt_thumb_refcount;
2484
bd97cb95
DJ		 2485 /* Some references from Thumb code may be eliminated by BL->BLX
2486 conversion, so record them separately. */
2487 bfd_signed_vma plt_maybe_thumb_refcount;
2488
b7693d02
DJ		 2489 /* Since PLT entries have variable size if the Thumb prologue is
2490 used, we need to record the index into .got.plt instead of
2491 recomputing it from the PLT offset. */
2492 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2493
2494#define GOT_UNKNOWN 0
2495#define GOT_NORMAL 1
2496#define GOT_TLS_GD 2
2497#define GOT_TLS_IE 4
2498 unsigned char tls_type;
a4fd1a8e
PB		 2499
2500 /* The symbol marking the real symbol location for exported thumb
2501 symbols with Arm stubs. */
2502 struct elf_link_hash_entry *export_glue;
906e58ca 2503
da5938a2 2504 /* A pointer to the most recently used stub hash entry against this
8029a119 2505 symbol. */
da5938a2 2506 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2507 };
252b5132 2508
252b5132 2509/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2510#define elf32_arm_link_hash_traverse(table, func, info) \
2511 (elf_link_hash_traverse \
2512 (&(table)->root, \
b7693d02 2513 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2514 (info)))
2515
2516/* Get the ARM elf linker hash table from a link_info structure. */
2517#define elf32_arm_hash_table(info) \
2518 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2519
906e58ca
NC		 2520#define arm_stub_hash_lookup(table, string, create, copy) \
2521 ((struct elf32_arm_stub_hash_entry *) \
2522 bfd_hash_lookup ((table), (string), (create), (copy)))
2523
9b485d32 2524/* ARM ELF linker hash table. */
252b5132 2525struct elf32_arm_link_hash_table
906e58ca
NC		 2526{
2527 /* The main hash table. */
2528 struct elf_link_hash_table root;
252b5132 2529
906e58ca
NC		 2530 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2531 bfd_size_type thumb_glue_size;
252b5132 2532
906e58ca
NC		 2533 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2534 bfd_size_type arm_glue_size;
252b5132 2535
906e58ca
NC		 2536 /* The size in bytes of section containing the ARMv4 BX veneers. */
2537 bfd_size_type bx_glue_size;
845b51d6 2538
906e58ca
NC		 2539 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2540 veneer has been populated. */
2541 bfd_vma bx_glue_offset[15];
845b51d6 2542
906e58ca
NC		 2543 /* The size in bytes of the section containing glue for VFP11 erratum
2544 veneers. */
2545 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2546
48229727
JB		 2547 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2548 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2549 elf32_arm_write_section(). */
2550 struct a8_erratum_fix *a8_erratum_fixes;
2551 unsigned int num_a8_erratum_fixes;
2552
906e58ca
NC		 2553 /* An arbitrary input BFD chosen to hold the glue sections. */
2554 bfd * bfd_of_glue_owner;
ba96a88f 2555
906e58ca
NC		 2556 /* Nonzero to output a BE8 image. */
2557 int byteswap_code;
e489d0ae 2558
906e58ca
NC		 2559 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2560 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2561 int target1_is_rel;
9c504268 2562
906e58ca
NC		 2563 /* The relocation to use for R_ARM_TARGET2 relocations. */
2564 int target2_reloc;
eb043451 2565
906e58ca
NC		 2566 /* 0 = Ignore R_ARM_V4BX.
2567 1 = Convert BX to MOV PC.
2568 2 = Generate v4 interworing stubs. */
2569 int fix_v4bx;
319850b4 2570
48229727
JB		 2571 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2572 int fix_cortex_a8;
2573
906e58ca
NC		 2574 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2575 int use_blx;
33bfe774 2576
906e58ca
NC		 2577 /* What sort of code sequences we should look for which may trigger the
2578 VFP11 denorm erratum. */
2579 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2580
906e58ca
NC		 2581 /* Global counter for the number of fixes we have emitted. */
2582 int num_vfp11_fixes;
c7b8f16e 2583
906e58ca
NC		 2584 /* Nonzero to force PIC branch veneers. */
2585 int pic_veneer;
27e55c4d 2586
906e58ca
NC		 2587 /* The number of bytes in the initial entry in the PLT. */
2588 bfd_size_type plt_header_size;
e5a52504 2589
906e58ca
NC		 2590 /* The number of bytes in the subsequent PLT etries. */
2591 bfd_size_type plt_entry_size;
e5a52504 2592
906e58ca
NC		 2593 /* True if the target system is VxWorks. */
2594 int vxworks_p;
00a97672 2595
906e58ca
NC		 2596 /* True if the target system is Symbian OS. */
2597 int symbian_p;
e5a52504 2598
906e58ca
NC		 2599 /* True if the target uses REL relocations. */
2600 int use_rel;
4e7fd91e 2601
906e58ca
NC		 2602 /* Short-cuts to get to dynamic linker sections. */
2603 asection *sgot;
2604 asection *sgotplt;
2605 asection *srelgot;
2606 asection *splt;
2607 asection *srelplt;
2608 asection *sdynbss;
2609 asection *srelbss;
5e681ec4 2610
906e58ca
NC		 2611 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2612 asection *srelplt2;
00a97672 2613
906e58ca
NC		 2614 /* Data for R_ARM_TLS_LDM32 relocations. */
2615 union
2616 {
2617 bfd_signed_vma refcount;
2618 bfd_vma offset;
2619 } tls_ldm_got;
b7693d02 2620
87d72d41
AM		 2621 /* Small local sym cache. */
2622 struct sym_cache sym_cache;
906e58ca
NC		 2623
2624 /* For convenience in allocate_dynrelocs. */
2625 bfd * obfd;
2626
2627 /* The stub hash table. */
2628 struct bfd_hash_table stub_hash_table;
2629
2630 /* Linker stub bfd. */
2631 bfd *stub_bfd;
2632
2633 /* Linker call-backs. */
2634 asection * (*add_stub_section) (const char *, asection *);
2635 void (*layout_sections_again) (void);
2636
2637 /* Array to keep track of which stub sections have been created, and
2638 information on stub grouping. */
2639 struct map_stub
2640 {
2641 /* This is the section to which stubs in the group will be
2642 attached. */
2643 asection *link_sec;
2644 /* The stub section. */
2645 asection *stub_sec;
2646 } *stub_group;
2647
2648 /* Assorted information used by elf32_arm_size_stubs. */
2649 unsigned int bfd_count;
2650 int top_index;
2651 asection **input_list;
2652};
252b5132 2653
780a67af
NC		 2654/* Create an entry in an ARM ELF linker hash table. */
2655
2656static struct bfd_hash_entry *
57e8b36a
NC		 2657elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2658 struct bfd_hash_table * table,
2659 const char * string)
780a67af
NC		 2660{
2661 struct elf32_arm_link_hash_entry * ret =
2662 (struct elf32_arm_link_hash_entry *) entry;
2663
2664 /* Allocate the structure if it has not already been allocated by a
2665 subclass. */
906e58ca 2666 if (ret == NULL)
57e8b36a
NC		 2667 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2668 if (ret == NULL)
780a67af
NC		 2669 return (struct bfd_hash_entry *) ret;
2670
2671 /* Call the allocation method of the superclass. */
2672 ret = ((struct elf32_arm_link_hash_entry *)
2673 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2674 table, string));
57e8b36a 2675 if (ret != NULL)
b7693d02
DJ		 2676 {
2677 ret->relocs_copied = NULL;
ba93b8ac 2678 ret->tls_type = GOT_UNKNOWN;
b7693d02 2679 ret->plt_thumb_refcount = 0;
bd97cb95 2680 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2681 ret->plt_got_offset = -1;
a4fd1a8e 2682 ret->export_glue = NULL;
906e58ca
NC		 2683
2684 ret->stub_cache = NULL;
b7693d02 2685 }
780a67af
NC		 2686
2687 return (struct bfd_hash_entry *) ret;
2688}
2689
906e58ca
NC		 2690/* Initialize an entry in the stub hash table. */
2691
2692static struct bfd_hash_entry *
2693stub_hash_newfunc (struct bfd_hash_entry *entry,
2694 struct bfd_hash_table *table,
2695 const char *string)
2696{
2697 /* Allocate the structure if it has not already been allocated by a
2698 subclass. */
2699 if (entry == NULL)
2700 {
2701 entry = bfd_hash_allocate (table,
2702 sizeof (struct elf32_arm_stub_hash_entry));
2703 if (entry == NULL)
2704 return entry;
2705 }
2706
2707 /* Call the allocation method of the superclass. */
2708 entry = bfd_hash_newfunc (entry, table, string);
2709 if (entry != NULL)
2710 {
2711 struct elf32_arm_stub_hash_entry *eh;
2712
2713 /* Initialize the local fields. */
2714 eh = (struct elf32_arm_stub_hash_entry *) entry;
2715 eh->stub_sec = NULL;
2716 eh->stub_offset = 0;
2717 eh->target_value = 0;
2718 eh->target_section = NULL;
2719 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2720 eh->stub_size = 0;
2721 eh->stub_template = NULL;
2722 eh->stub_template_size = 0;
906e58ca
NC		 2723 eh->h = NULL;
2724 eh->id_sec = NULL;
2725 }
2726
2727 return entry;
2728}
2729
00a97672 2730/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2731 shortcuts to them in our hash table. */
2732
2733static bfd_boolean
57e8b36a 2734create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2735{
2736 struct elf32_arm_link_hash_table *htab;
2737
e5a52504
MM		 2738 htab = elf32_arm_hash_table (info);
2739 /* BPABI objects never have a GOT, or associated sections. */
2740 if (htab->symbian_p)
2741 return TRUE;
2742
5e681ec4
PB		 2743 if (! _bfd_elf_create_got_section (dynobj, info))
2744 return FALSE;
2745
5e681ec4
PB		 2746 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2747 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2748 if (!htab->sgot || !htab->sgotplt)
2749 abort ();
2750
64e77c6d
L		 2751 htab->srelgot = bfd_get_section_by_name (dynobj,
2752 RELOC_SECTION (htab, ".got"));
2753 if (htab->srelgot == NULL)
5e681ec4
PB		 2754 return FALSE;
2755 return TRUE;
2756}
2757
00a97672
RS		 2758/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2759 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2760 hash table. */
2761
2762static bfd_boolean
57e8b36a 2763elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2764{
2765 struct elf32_arm_link_hash_table *htab;
2766
2767 htab = elf32_arm_hash_table (info);
2768 if (!htab->sgot && !create_got_section (dynobj, info))
2769 return FALSE;
2770
2771 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2772 return FALSE;
2773
2774 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2775 htab->srelplt = bfd_get_section_by_name (dynobj,
2776 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2777 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2778 if (!info->shared)
00a97672
RS		 2779 htab->srelbss = bfd_get_section_by_name (dynobj,
2780 RELOC_SECTION (htab, ".bss"));
2781
2782 if (htab->vxworks_p)
2783 {
2784 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2785 return FALSE;
2786
2787 if (info->shared)
2788 {
2789 htab->plt_header_size = 0;
2790 htab->plt_entry_size
2791 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2792 }
2793 else
2794 {
2795 htab->plt_header_size
2796 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2797 htab->plt_entry_size
2798 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2799 }
2800 }
5e681ec4 2801
906e58ca 2802 if (!htab->splt
e5a52504
MM		 2803 || !htab->srelplt
2804 || !htab->sdynbss
5e681ec4
PB		 2805 || (!info->shared && !htab->srelbss))
2806 abort ();
2807
2808 return TRUE;
2809}
2810
906e58ca
NC		 2811/* Copy the extra info we tack onto an elf_link_hash_entry. */
2812
2813static void
2814elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2815 struct elf_link_hash_entry *dir,
2816 struct elf_link_hash_entry *ind)
2817{
2818 struct elf32_arm_link_hash_entry *edir, *eind;
2819
2820 edir = (struct elf32_arm_link_hash_entry *) dir;
2821 eind = (struct elf32_arm_link_hash_entry *) ind;
2822
2823 if (eind->relocs_copied != NULL)
2824 {
2825 if (edir->relocs_copied != NULL)
2826 {
2827 struct elf32_arm_relocs_copied **pp;
2828 struct elf32_arm_relocs_copied *p;
2829
2830 /* Add reloc counts against the indirect sym to the direct sym
2831 list. Merge any entries against the same section. */
2832 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2833 {
2834 struct elf32_arm_relocs_copied *q;
2835
2836 for (q = edir->relocs_copied; q != NULL; q = q->next)
2837 if (q->section == p->section)
2838 {
2839 q->pc_count += p->pc_count;
2840 q->count += p->count;
2841 *pp = p->next;
2842 break;
2843 }
2844 if (q == NULL)
2845 pp = &p->next;
2846 }
2847 *pp = edir->relocs_copied;
2848 }
2849
2850 edir->relocs_copied = eind->relocs_copied;
2851 eind->relocs_copied = NULL;
2852 }
2853
2854 if (ind->root.type == bfd_link_hash_indirect)
2855 {
2856 /* Copy over PLT info. */
2857 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2858 eind->plt_thumb_refcount = 0;
2859 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2860 eind->plt_maybe_thumb_refcount = 0;
2861
2862 if (dir->got.refcount <= 0)
2863 {
2864 edir->tls_type = eind->tls_type;
2865 eind->tls_type = GOT_UNKNOWN;
2866 }
2867 }
2868
2869 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2870}
2871
2872/* Create an ARM elf linker hash table. */
2873
2874static struct bfd_link_hash_table *
2875elf32_arm_link_hash_table_create (bfd *abfd)
2876{
2877 struct elf32_arm_link_hash_table *ret;
2878 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2879
2880 ret = bfd_malloc (amt);
2881 if (ret == NULL)
2882 return NULL;
2883
2884 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2885 elf32_arm_link_hash_newfunc,
2886 sizeof (struct elf32_arm_link_hash_entry)))
2887 {
2888 free (ret);
2889 return NULL;
2890 }
2891
2892 ret->sgot = NULL;
2893 ret->sgotplt = NULL;
2894 ret->srelgot = NULL;
2895 ret->splt = NULL;
2896 ret->srelplt = NULL;
2897 ret->sdynbss = NULL;
2898 ret->srelbss = NULL;
2899 ret->srelplt2 = NULL;
2900 ret->thumb_glue_size = 0;
2901 ret->arm_glue_size = 0;
2902 ret->bx_glue_size = 0;
2903 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2904 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2905 ret->vfp11_erratum_glue_size = 0;
2906 ret->num_vfp11_fixes = 0;
48229727 2907 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2908 ret->bfd_of_glue_owner = NULL;
2909 ret->byteswap_code = 0;
2910 ret->target1_is_rel = 0;
2911 ret->target2_reloc = R_ARM_NONE;
2912#ifdef FOUR_WORD_PLT
2913 ret->plt_header_size = 16;
2914 ret->plt_entry_size = 16;
2915#else
2916 ret->plt_header_size = 20;
2917 ret->plt_entry_size = 12;
2918#endif
2919 ret->fix_v4bx = 0;
2920 ret->use_blx = 0;
2921 ret->vxworks_p = 0;
2922 ret->symbian_p = 0;
2923 ret->use_rel = 1;
87d72d41 2924 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2925 ret->obfd = abfd;
2926 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2927 ret->stub_bfd = NULL;
2928 ret->add_stub_section = NULL;
2929 ret->layout_sections_again = NULL;
2930 ret->stub_group = NULL;
2931 ret->bfd_count = 0;
2932 ret->top_index = 0;
2933 ret->input_list = NULL;
906e58ca
NC		 2934
2935 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2936 sizeof (struct elf32_arm_stub_hash_entry)))
2937 {
2938 free (ret);
2939 return NULL;
2940 }
2941
2942 return &ret->root.root;
2943}
2944
2945/* Free the derived linker hash table. */
2946
2947static void
2948elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2949{
2950 struct elf32_arm_link_hash_table *ret
2951 = (struct elf32_arm_link_hash_table *) hash;
2952
2953 bfd_hash_table_free (&ret->stub_hash_table);
2954 _bfd_generic_link_hash_table_free (hash);
2955}
2956
2957/* Determine if we're dealing with a Thumb only architecture. */
2958
2959static bfd_boolean
2960using_thumb_only (struct elf32_arm_link_hash_table *globals)
2961{
2962 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2963 Tag_CPU_arch);
2964 int profile;
2965
2966 if (arch != TAG_CPU_ARCH_V7)
2967 return FALSE;
2968
2969 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2970 Tag_CPU_arch_profile);
2971
2972 return profile == 'M';
2973}
2974
2975/* Determine if we're dealing with a Thumb-2 object. */
2976
2977static bfd_boolean
2978using_thumb2 (struct elf32_arm_link_hash_table *globals)
2979{
2980 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2981 Tag_CPU_arch);
2982 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
2983}
2984
f4ac8484
DJ		 2985static bfd_boolean
2986arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
2987{
2988 switch (stub_type)
2989 {
fea2b4d6
CL		 2990 case arm_stub_long_branch_thumb_only:
2991 case arm_stub_long_branch_v4t_thumb_arm:
2992 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 2993 case arm_stub_long_branch_v4t_thumb_arm_pic:
2994 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 2995 return TRUE;
2996 case arm_stub_none:
2997 BFD_FAIL ();
2998 return FALSE;
2999 break;
3000 default:
3001 return FALSE;
3002 }
3003}
3004
906e58ca
NC		 3005/* Determine the type of stub needed, if any, for a call. */
3006
3007static enum elf32_arm_stub_type
3008arm_type_of_stub (struct bfd_link_info *info,
3009 asection *input_sec,
3010 const Elf_Internal_Rela *rel,
3011 unsigned char st_type,
3012 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3013 bfd_vma destination,
3014 asection *sym_sec,
3015 bfd *input_bfd,
3016 const char *name)
906e58ca
NC		 3017{
3018 bfd_vma location;
3019 bfd_signed_vma branch_offset;
3020 unsigned int r_type;
3021 struct elf32_arm_link_hash_table * globals;
3022 int thumb2;
3023 int thumb_only;
3024 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3025 int use_plt = 0;
906e58ca 3026
da5938a2 3027 /* We don't know the actual type of destination in case it is of
8029a119 3028 type STT_SECTION: give up. */
da5938a2
NC		 3029 if (st_type == STT_SECTION)
3030 return stub_type;
3031
906e58ca
NC		 3032 globals = elf32_arm_hash_table (info);
3033
3034 thumb_only = using_thumb_only (globals);
3035
3036 thumb2 = using_thumb2 (globals);
3037
3038 /* Determine where the call point is. */
3039 location = (input_sec->output_offset
3040 + input_sec->output_section->vma
3041 + rel->r_offset);
3042
3043 branch_offset = (bfd_signed_vma)(destination - location);
3044
3045 r_type = ELF32_R_TYPE (rel->r_info);
3046
5fa9e92f 3047 /* Keep a simpler condition, for the sake of clarity. */
329dcd78 3048 if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3049 {
3050 use_plt = 1;
3051 /* Note when dealing with PLT entries: the main PLT stub is in
3052 ARM mode, so if the branch is in Thumb mode, another
3053 Thumb->ARM stub will be inserted later just before the ARM
3054 PLT stub. We don't take this extra distance into account
3055 here, because if a long branch stub is needed, we'll add a
3056 Thumb->Arm one and branch directly to the ARM PLT entry
3057 because it avoids spreading offset corrections in several
3058 places. */
3059 }
906e58ca 3060
155d87d7 3061 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3062 {
5fa9e92f
CL		 3063 /* Handle cases where:
3064 - this call goes too far (different Thumb/Thumb2 max
3065 distance)
155d87d7
CL		 3066 - it's a Thumb->Arm call and blx is not available, or it's a
3067 Thumb->Arm branch (not bl). A stub is needed in this case,
3068 but only if this call is not through a PLT entry. Indeed,
3069 PLT stubs handle mode switching already.
5fa9e92f 3070 */
906e58ca
NC		 3071 if ((!thumb2
3072 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3073 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3074 || (thumb2
3075 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3076 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3077 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3078 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3079 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3080 && !use_plt))
906e58ca
NC		 3081 {
3082 if (st_type == STT_ARM_TFUNC)
3083 {
3084 /* Thumb to thumb. */
3085 if (!thumb_only)
3086 {
3087 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3088 /* PIC stubs. */
155d87d7
CL		 3089 ? ((globals->use_blx
3090 && (r_type ==R_ARM_THM_CALL))
3091 /* V5T and above. Stub starts with ARM code, so
3092 we must be able to switch mode before
3093 reaching it, which is only possible for 'bl'
3094 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3095 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3096 /* On V4T, use Thumb code only. */
d3626fb0 3097 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3098
3099 /* non-PIC stubs. */
155d87d7
CL		 3100 : ((globals->use_blx
3101 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3102 /* V5T and above. */
3103 ? arm_stub_long_branch_any_any
3104 /* V4T. */
d3626fb0 3105 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3106 }
3107 else
3108 {
3109 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3110 /* PIC stub. */
3111 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3112 /* non-PIC stub. */
3113 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3114 }
3115 }
3116 else
3117 {
3118 /* Thumb to arm. */
c820be07
NC		 3119 if (sym_sec != NULL
3120 && sym_sec->owner != NULL
3121 && !INTERWORK_FLAG (sym_sec->owner))
3122 {
3123 (*_bfd_error_handler)
3124 (_("%B(%s): warning: interworking not enabled.\n"
3125 " first occurrence: %B: Thumb call to ARM"),
3126 sym_sec->owner, input_bfd, name);
3127 }
3128
906e58ca 3129 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3130 /* PIC stubs. */
155d87d7
CL		 3131 ? ((globals->use_blx
3132 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3133 /* V5T and above. */
cf3eccff 3134 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3135 /* V4T PIC stub. */
3136 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3137
3138 /* non-PIC stubs. */
155d87d7
CL		 3139 : ((globals->use_blx
3140 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3141 /* V5T and above. */
3142 ? arm_stub_long_branch_any_any
3143 /* V4T. */
3144 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3145
3146 /* Handle v4t short branches. */
fea2b4d6 3147 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3148 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3149 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3150 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3151 }
3152 }
3153 }
155d87d7 3154 else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
906e58ca
NC		 3155 {
3156 if (st_type == STT_ARM_TFUNC)
3157 {
3158 /* Arm to thumb. */
c820be07
NC		 3159
3160 if (sym_sec != NULL
3161 && sym_sec->owner != NULL
3162 && !INTERWORK_FLAG (sym_sec->owner))
3163 {
3164 (*_bfd_error_handler)
3165 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3166 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3167 sym_sec->owner, input_bfd, name);
3168 }
3169
3170 /* We have an extra 2-bytes reach because of
3171 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3172 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3173 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3174 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3175 || (r_type == R_ARM_JUMP24)
3176 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3177 {
3178 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3179 /* PIC stubs. */
ebe24dd4
CL		 3180 ? ((globals->use_blx)
3181 /* V5T and above. */
3182 ? arm_stub_long_branch_any_thumb_pic
3183 /* V4T stub. */
3184 : arm_stub_long_branch_v4t_arm_thumb_pic)
3185
c2b4a39d
CL		 3186 /* non-PIC stubs. */
3187 : ((globals->use_blx)
3188 /* V5T and above. */
3189 ? arm_stub_long_branch_any_any
3190 /* V4T. */
3191 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3192 }
3193 }
3194 else
3195 {
3196 /* Arm to arm. */
3197 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3198 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3199 {
3200 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3201 /* PIC stubs. */
cf3eccff 3202 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3203 /* non-PIC stubs. */
fea2b4d6 3204 : arm_stub_long_branch_any_any;
906e58ca
NC		 3205 }
3206 }
3207 }
3208
3209 return stub_type;
3210}
3211
3212/* Build a name for an entry in the stub hash table. */
3213
3214static char *
3215elf32_arm_stub_name (const asection *input_section,
3216 const asection *sym_sec,
3217 const struct elf32_arm_link_hash_entry *hash,
3218 const Elf_Internal_Rela *rel)
3219{
3220 char *stub_name;
3221 bfd_size_type len;
3222
3223 if (hash)
3224 {
3225 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1;
3226 stub_name = bfd_malloc (len);
3227 if (stub_name != NULL)
3228 sprintf (stub_name, "%08x_%s+%x",
3229 input_section->id & 0xffffffff,
3230 hash->root.root.root.string,
3231 (int) rel->r_addend & 0xffffffff);
3232 }
3233 else
3234 {
3235 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
3236 stub_name = bfd_malloc (len);
3237 if (stub_name != NULL)
3238 sprintf (stub_name, "%08x_%x:%x+%x",
3239 input_section->id & 0xffffffff,
3240 sym_sec->id & 0xffffffff,
3241 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3242 (int) rel->r_addend & 0xffffffff);
3243 }
3244
3245 return stub_name;
3246}
3247
3248/* Look up an entry in the stub hash. Stub entries are cached because
3249 creating the stub name takes a bit of time. */
3250
3251static struct elf32_arm_stub_hash_entry *
3252elf32_arm_get_stub_entry (const asection *input_section,
3253 const asection *sym_sec,
3254 struct elf_link_hash_entry *hash,
3255 const Elf_Internal_Rela *rel,
3256 struct elf32_arm_link_hash_table *htab)
3257{
3258 struct elf32_arm_stub_hash_entry *stub_entry;
3259 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3260 const asection *id_sec;
3261
3262 if ((input_section->flags & SEC_CODE) == 0)
3263 return NULL;
3264
3265 /* If this input section is part of a group of sections sharing one
3266 stub section, then use the id of the first section in the group.
3267 Stub names need to include a section id, as there may well be
3268 more than one stub used to reach say, printf, and we need to
3269 distinguish between them. */
3270 id_sec = htab->stub_group[input_section->id].link_sec;
3271
3272 if (h != NULL && h->stub_cache != NULL
3273 && h->stub_cache->h == h
3274 && h->stub_cache->id_sec == id_sec)
3275 {
3276 stub_entry = h->stub_cache;
3277 }
3278 else
3279 {
3280 char *stub_name;
3281
3282 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel);
3283 if (stub_name == NULL)
3284 return NULL;
3285
3286 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3287 stub_name, FALSE, FALSE);
3288 if (h != NULL)
3289 h->stub_cache = stub_entry;
3290
3291 free (stub_name);
3292 }
3293
3294 return stub_entry;
3295}
3296
48229727
JB		 3297/* Find or create a stub section. Returns a pointer to the stub section, and
3298 the section to which the stub section will be attached (in *LINK_SEC_P).
3299 LINK_SEC_P may be NULL. */
906e58ca 3300
48229727
JB		 3301static asection *
3302elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3303 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3304{
3305 asection *link_sec;
3306 asection *stub_sec;
906e58ca
NC		 3307
3308 link_sec = htab->stub_group[section->id].link_sec;
3309 stub_sec = htab->stub_group[section->id].stub_sec;
3310 if (stub_sec == NULL)
3311 {
3312 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3313 if (stub_sec == NULL)
3314 {
3315 size_t namelen;
3316 bfd_size_type len;
3317 char *s_name;
3318
3319 namelen = strlen (link_sec->name);
3320 len = namelen + sizeof (STUB_SUFFIX);
3321 s_name = bfd_alloc (htab->stub_bfd, len);
3322 if (s_name == NULL)
3323 return NULL;
3324
3325 memcpy (s_name, link_sec->name, namelen);
3326 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3327 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3328 if (stub_sec == NULL)
3329 return NULL;
3330 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3331 }
3332 htab->stub_group[section->id].stub_sec = stub_sec;
3333 }
48229727
JB		 3334
3335 if (link_sec_p)
3336 *link_sec_p = link_sec;
3337
3338 return stub_sec;
3339}
3340
3341/* Add a new stub entry to the stub hash. Not all fields of the new
3342 stub entry are initialised. */
3343
3344static struct elf32_arm_stub_hash_entry *
3345elf32_arm_add_stub (const char *stub_name,
3346 asection *section,
3347 struct elf32_arm_link_hash_table *htab)
3348{
3349 asection *link_sec;
3350 asection *stub_sec;
3351 struct elf32_arm_stub_hash_entry *stub_entry;
3352
3353 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3354 if (stub_sec == NULL)
3355 return NULL;
906e58ca
NC		 3356
3357 /* Enter this entry into the linker stub hash table. */
3358 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3359 TRUE, FALSE);
3360 if (stub_entry == NULL)
3361 {
3362 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3363 section->owner,
3364 stub_name);
3365 return NULL;
3366 }
3367
3368 stub_entry->stub_sec = stub_sec;
3369 stub_entry->stub_offset = 0;
3370 stub_entry->id_sec = link_sec;
3371
906e58ca
NC		 3372 return stub_entry;
3373}
3374
3375/* Store an Arm insn into an output section not processed by
3376 elf32_arm_write_section. */
3377
3378static void
8029a119
NC		 3379put_arm_insn (struct elf32_arm_link_hash_table * htab,
3380 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3381{
3382 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3383 bfd_putl32 (val, ptr);
3384 else
3385 bfd_putb32 (val, ptr);
3386}
3387
3388/* Store a 16-bit Thumb insn into an output section not processed by
3389 elf32_arm_write_section. */
3390
3391static void
8029a119
NC		 3392put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3393 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3394{
3395 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3396 bfd_putl16 (val, ptr);
3397 else
3398 bfd_putb16 (val, ptr);
3399}
3400
48229727
JB		 3401static bfd_reloc_status_type elf32_arm_final_link_relocate
3402 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3403 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3404 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3405
906e58ca
NC		 3406static bfd_boolean
3407arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3408 void * in_arg)
3409{
48229727 3410#define MAXRELOCS 2
906e58ca
NC		 3411 struct elf32_arm_stub_hash_entry *stub_entry;
3412 struct bfd_link_info *info;
3413 struct elf32_arm_link_hash_table *htab;
3414 asection *stub_sec;
3415 bfd *stub_bfd;
3416 bfd_vma stub_addr;
3417 bfd_byte *loc;
3418 bfd_vma sym_value;
3419 int template_size;
3420 int size;
461a49ca 3421 const insn_sequence *template;
906e58ca
NC		 3422 int i;
3423 struct elf32_arm_link_hash_table * globals;
48229727
JB		 3424 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3425 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3426 int nrelocs = 0;
906e58ca
NC		 3427
3428 /* Massage our args to the form they really have. */
3429 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3430 info = (struct bfd_link_info *) in_arg;
3431
3432 globals = elf32_arm_hash_table (info);
3433
3434 htab = elf32_arm_hash_table (info);
3435 stub_sec = stub_entry->stub_sec;
3436
3437 /* Make a note of the offset within the stubs for this entry. */
3438 stub_entry->stub_offset = stub_sec->size;
3439 loc = stub_sec->contents + stub_entry->stub_offset;
3440
3441 stub_bfd = stub_sec->owner;
3442
3443 /* This is the address of the start of the stub. */
3444 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3445 + stub_entry->stub_offset;
3446
3447 /* This is the address of the stub destination. */
3448 sym_value = (stub_entry->target_value
3449 + stub_entry->target_section->output_offset
3450 + stub_entry->target_section->output_section->vma);
3451
461a49ca
DJ		 3452 template = stub_entry->stub_template;
3453 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3454
3455 size = 0;
461a49ca 3456 for (i = 0; i < template_size; i++)
906e58ca 3457 {
4e31c731 3458 switch (template[i].type)
461a49ca
DJ		 3459 {
3460 case THUMB16_TYPE:
48229727
JB		 3461 {
3462 bfd_vma data = template[i].data;
3463 if (template[i].reloc_addend != 0)
3464 {
3465 /* We've borrowed the reloc_addend field to mean we should
3466 insert a condition code into this (Thumb-1 branch)
3467 instruction. See THUMB16_BCOND_INSN. */
3468 BFD_ASSERT ((data & 0xff00) == 0xd000);
3469 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3470 }
3471 put_thumb_insn (globals, stub_bfd, data, loc + size);
3472 size += 2;
3473 }
461a49ca 3474 break;
906e58ca 3475
48229727
JB		 3476 case THUMB32_TYPE:
3477 put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
3478 loc + size);
3479 put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
3480 loc + size + 2);
3481 if (template[i].r_type != R_ARM_NONE)
3482 {
3483 stub_reloc_idx[nrelocs] = i;
3484 stub_reloc_offset[nrelocs++] = size;
3485 }
3486 size += 4;
3487 break;
3488
461a49ca
DJ		 3489 case ARM_TYPE:
3490 put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
3491 /* Handle cases where the target is encoded within the
3492 instruction. */
ebe24dd4 3493 if (template[i].r_type == R_ARM_JUMP24)
461a49ca 3494 {
48229727
JB		 3495 stub_reloc_idx[nrelocs] = i;
3496 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3497 }
3498 size += 4;
3499 break;
3500
3501 case DATA_TYPE:
3502 bfd_put_32 (stub_bfd, template[i].data, loc + size);
48229727
JB		 3503 stub_reloc_idx[nrelocs] = i;
3504 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3505 size += 4;
3506 break;
3507
3508 default:
3509 BFD_FAIL ();
3510 return FALSE;
3511 }
906e58ca 3512 }
461a49ca 3513
906e58ca
NC		 3514 stub_sec->size += size;
3515
461a49ca
DJ		 3516 /* Stub size has already been computed in arm_size_one_stub. Check
3517 consistency. */
3518 BFD_ASSERT (size == stub_entry->stub_size);
3519
906e58ca
NC		 3520 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3521 if (stub_entry->st_type == STT_ARM_TFUNC)
3522 sym_value |= 1;
3523
48229727
JB		 3524 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3525 in each stub. */
3526 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3527
48229727
JB		 3528 for (i = 0; i < nrelocs; i++)
3529 if (template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3530 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3531 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3532 || template[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
3533 {
3534 Elf_Internal_Rela rel;
3535 bfd_boolean unresolved_reloc;
3536 char *error_message;
3537 int sym_flags
3538 = (template[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
3539 ? STT_ARM_TFUNC : 0;
3540 bfd_vma points_to = sym_value + stub_entry->target_addend;
3541
3542 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3543 rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].r_type);
3544 rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
3545
3546 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3547 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3548 template should refer back to the instruction after the original
3549 branch. */
3550 points_to = sym_value;
3551
3552 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3553 properly. We should probably use this function unconditionally,
3554 rather than only for certain relocations listed in the enclosing
3555 conditional, for the sake of consistency. */
3556 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3557 (template[stub_reloc_idx[i]].r_type),
3558 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3559 points_to, info, stub_entry->target_section, "", sym_flags,
3560 (struct elf_link_hash_entry *) stub_entry, &unresolved_reloc,
3561 &error_message);
3562 }
3563 else
3564 {
3565 _bfd_final_link_relocate (elf32_arm_howto_from_type
3566 (template[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec,
3567 stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
3568 sym_value + stub_entry->target_addend,
3569 template[stub_reloc_idx[i]].reloc_addend);
3570 }
906e58ca
NC		 3571
3572 return TRUE;
48229727 3573#undef MAXRELOCS
906e58ca
NC		 3574}
3575
48229727
JB		 3576/* Calculate the template, template size and instruction size for a stub.
3577 Return value is the instruction size. */
906e58ca 3578
48229727
JB		 3579static unsigned int
3580find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3581 const insn_sequence **stub_template,
3582 int *stub_template_size)
906e58ca 3583{
48229727
JB		 3584 const insn_sequence *template = NULL;
3585 int template_size = 0, i;
3586 unsigned int size;
906e58ca 3587
48229727
JB		 3588 template = stub_definitions[stub_type].template;
3589 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3590
3591 size = 0;
461a49ca
DJ		 3592 for (i = 0; i < template_size; i++)
3593 {
4e31c731 3594 switch (template[i].type)
461a49ca
DJ		 3595 {
3596 case THUMB16_TYPE:
3597 size += 2;
3598 break;
3599
3600 case ARM_TYPE:
48229727 3601 case THUMB32_TYPE:
461a49ca
DJ		 3602 case DATA_TYPE:
3603 size += 4;
3604 break;
3605
3606 default:
3607 BFD_FAIL ();
3608 return FALSE;
3609 }
3610 }
3611
48229727
JB		 3612 if (stub_template)
3613 *stub_template = template;
3614
3615 if (stub_template_size)
3616 *stub_template_size = template_size;
3617
3618 return size;
3619}
3620
3621/* As above, but don't actually build the stub. Just bump offset so
3622 we know stub section sizes. */
3623
3624static bfd_boolean
3625arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3626 void * in_arg)
3627{
3628 struct elf32_arm_stub_hash_entry *stub_entry;
3629 struct elf32_arm_link_hash_table *htab;
3630 const insn_sequence *template;
3631 int template_size, size;
3632
3633 /* Massage our args to the form they really have. */
3634 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3635 htab = (struct elf32_arm_link_hash_table *) in_arg;
3636
3637 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3638 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3639
3640 size = find_stub_size_and_template (stub_entry->stub_type, &template,
3641 &template_size);
3642
461a49ca
DJ		 3643 stub_entry->stub_size = size;
3644 stub_entry->stub_template = template;
3645 stub_entry->stub_template_size = template_size;
3646
906e58ca
NC		 3647 size = (size + 7) & ~7;
3648 stub_entry->stub_sec->size += size;
461a49ca 3649
906e58ca
NC		 3650 return TRUE;
3651}
3652
3653/* External entry points for sizing and building linker stubs. */
3654
3655/* Set up various things so that we can make a list of input sections
3656 for each output section included in the link. Returns -1 on error,
3657 0 when no stubs will be needed, and 1 on success. */
3658
3659int
3660elf32_arm_setup_section_lists (bfd *output_bfd,
3661 struct bfd_link_info *info)
3662{
3663 bfd *input_bfd;
3664 unsigned int bfd_count;
3665 int top_id, top_index;
3666 asection *section;
3667 asection **input_list, **list;
3668 bfd_size_type amt;
3669 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3670
3671 if (! is_elf_hash_table (htab))
3672 return 0;
3673
3674 /* Count the number of input BFDs and find the top input section id. */
3675 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3676 input_bfd != NULL;
3677 input_bfd = input_bfd->link_next)
3678 {
3679 bfd_count += 1;
3680 for (section = input_bfd->sections;
3681 section != NULL;
3682 section = section->next)
3683 {
3684 if (top_id < section->id)
3685 top_id = section->id;
3686 }
3687 }
3688 htab->bfd_count = bfd_count;
3689
3690 amt = sizeof (struct map_stub) * (top_id + 1);
3691 htab->stub_group = bfd_zmalloc (amt);
3692 if (htab->stub_group == NULL)
3693 return -1;
3694
3695 /* We can't use output_bfd->section_count here to find the top output
3696 section index as some sections may have been removed, and
3697 _bfd_strip_section_from_output doesn't renumber the indices. */
3698 for (section = output_bfd->sections, top_index = 0;
3699 section != NULL;
3700 section = section->next)
3701 {
3702 if (top_index < section->index)
3703 top_index = section->index;
3704 }
3705
3706 htab->top_index = top_index;
3707 amt = sizeof (asection *) * (top_index + 1);
3708 input_list = bfd_malloc (amt);
3709 htab->input_list = input_list;
3710 if (input_list == NULL)
3711 return -1;
3712
3713 /* For sections we aren't interested in, mark their entries with a
3714 value we can check later. */
3715 list = input_list + top_index;
3716 do
3717 *list = bfd_abs_section_ptr;
3718 while (list-- != input_list);
3719
3720 for (section = output_bfd->sections;
3721 section != NULL;
3722 section = section->next)
3723 {
3724 if ((section->flags & SEC_CODE) != 0)
3725 input_list[section->index] = NULL;
3726 }
3727
3728 return 1;
3729}
3730
3731/* The linker repeatedly calls this function for each input section,
3732 in the order that input sections are linked into output sections.
3733 Build lists of input sections to determine groupings between which
3734 we may insert linker stubs. */
3735
3736void
3737elf32_arm_next_input_section (struct bfd_link_info *info,
3738 asection *isec)
3739{
3740 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3741
3742 if (isec->output_section->index <= htab->top_index)
3743 {
3744 asection **list = htab->input_list + isec->output_section->index;
3745
3746 if (*list != bfd_abs_section_ptr)
3747 {
3748 /* Steal the link_sec pointer for our list. */
3749#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3750 /* This happens to make the list in reverse order,
07d72278 3751 which we reverse later. */
906e58ca
NC		 3752 PREV_SEC (isec) = *list;
3753 *list = isec;
3754 }
3755 }
3756}
3757
3758/* See whether we can group stub sections together. Grouping stub
3759 sections may result in fewer stubs. More importantly, we need to
07d72278 3760 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3761 .fini output sections respectively, because glibc splits the
3762 _init and _fini functions into multiple parts. Putting a stub in
3763 the middle of a function is not a good idea. */
3764
3765static void
3766group_sections (struct elf32_arm_link_hash_table *htab,
3767 bfd_size_type stub_group_size,
07d72278 3768 bfd_boolean stubs_always_after_branch)
906e58ca 3769{
07d72278 3770 asection **list = htab->input_list;
906e58ca
NC		 3771
3772 do
3773 {
3774 asection *tail = *list;
07d72278 3775 asection *head;
906e58ca
NC		 3776
3777 if (tail == bfd_abs_section_ptr)
3778 continue;
3779
07d72278
DJ		 3780 /* Reverse the list: we must avoid placing stubs at the
3781 beginning of the section because the beginning of the text
3782 section may be required for an interrupt vector in bare metal
3783 code. */
3784#define NEXT_SEC PREV_SEC
e780aef2
CL		 3785 head = NULL;
3786 while (tail != NULL)
3787 {
3788 /* Pop from tail. */
3789 asection *item = tail;
3790 tail = PREV_SEC (item);
3791
3792 /* Push on head. */
3793 NEXT_SEC (item) = head;
3794 head = item;
3795 }
07d72278
DJ		 3796
3797 while (head != NULL)
906e58ca
NC		 3798 {
3799 asection *curr;
07d72278 3800 asection *next;
e780aef2
CL		 3801 bfd_vma stub_group_start = head->output_offset;
3802 bfd_vma end_of_next;
906e58ca 3803
07d72278 3804 curr = head;
e780aef2 3805 while (NEXT_SEC (curr) != NULL)
8cd931b7 3806 {
e780aef2
CL		 3807 next = NEXT_SEC (curr);
3808 end_of_next = next->output_offset + next->size;
3809 if (end_of_next - stub_group_start >= stub_group_size)
3810 /* End of NEXT is too far from start, so stop. */
8cd931b7 3811 break;
e780aef2
CL		 3812 /* Add NEXT to the group. */
3813 curr = next;
8cd931b7 3814 }
906e58ca 3815
07d72278 3816 /* OK, the size from the start to the start of CURR is less
906e58ca 3817 than stub_group_size and thus can be handled by one stub
07d72278 3818 section. (Or the head section is itself larger than
906e58ca
NC		 3819 stub_group_size, in which case we may be toast.)
3820 We should really be keeping track of the total size of
3821 stubs added here, as stubs contribute to the final output
7fb9f789 3822 section size. */
906e58ca
NC		 3823 do
3824 {
07d72278 3825 next = NEXT_SEC (head);
906e58ca 3826 /* Set up this stub group. */
07d72278 3827 htab->stub_group[head->id].link_sec = curr;
906e58ca 3828 }
07d72278 3829 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3830
3831 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3832 bytes after the stub section can be handled by it too. */
3833 if (!stubs_always_after_branch)
906e58ca 3834 {
e780aef2
CL		 3835 stub_group_start = curr->output_offset + curr->size;
3836
8cd931b7 3837 while (next != NULL)
906e58ca 3838 {
e780aef2
CL		 3839 end_of_next = next->output_offset + next->size;
3840 if (end_of_next - stub_group_start >= stub_group_size)
3841 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3842 break;
e780aef2 3843 /* Add NEXT to the stub group. */
07d72278
DJ		 3844 head = next;
3845 next = NEXT_SEC (head);
3846 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3847 }
3848 }
07d72278 3849 head = next;
906e58ca
NC		 3850 }
3851 }
07d72278 3852 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3853
3854 free (htab->input_list);
3855#undef PREV_SEC
07d72278 3856#undef NEXT_SEC
906e58ca
NC		 3857}
3858
48229727
JB		 3859/* Comparison function for sorting/searching relocations relating to Cortex-A8
3860 erratum fix. */
3861
3862static int
3863a8_reloc_compare (const void *a, const void *b)
3864{
3865 const struct a8_erratum_reloc *ra = a, *rb = b;
3866
3867 if (ra->from < rb->from)
3868 return -1;
3869 else if (ra->from > rb->from)
3870 return 1;
3871 else
3872 return 0;
3873}
3874
3875static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3876 const char *, char **);
3877
3878/* Helper function to scan code for sequences which might trigger the Cortex-A8
3879 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3880 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3881 otherwise. */
3882
81694485
NC		 3883static bfd_boolean
3884cortex_a8_erratum_scan (bfd *input_bfd,
3885 struct bfd_link_info *info,
48229727
JB		 3886 struct a8_erratum_fix **a8_fixes_p,
3887 unsigned int *num_a8_fixes_p,
3888 unsigned int *a8_fix_table_size_p,
3889 struct a8_erratum_reloc *a8_relocs,
3890 unsigned int num_a8_relocs)
3891{
3892 asection *section;
3893 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3894 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
3895 unsigned int num_a8_fixes = *num_a8_fixes_p;
3896 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
3897
3898 for (section = input_bfd->sections;
3899 section != NULL;
3900 section = section->next)
3901 {
3902 bfd_byte *contents = NULL;
3903 struct _arm_elf_section_data *sec_data;
3904 unsigned int span;
3905 bfd_vma base_vma;
3906
3907 if (elf_section_type (section) != SHT_PROGBITS
3908 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
3909 || (section->flags & SEC_EXCLUDE) != 0
3910 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
3911 || (section->output_section == bfd_abs_section_ptr))
3912 continue;
3913
3914 base_vma = section->output_section->vma + section->output_offset;
3915
3916 if (elf_section_data (section)->this_hdr.contents != NULL)
3917 contents = elf_section_data (section)->this_hdr.contents;
3918 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 3919 return TRUE;
48229727
JB		 3920
3921 sec_data = elf32_arm_section_data (section);
3922
3923 for (span = 0; span < sec_data->mapcount; span++)
3924 {
3925 unsigned int span_start = sec_data->map[span].vma;
3926 unsigned int span_end = (span == sec_data->mapcount - 1)
3927 ? section->size : sec_data->map[span + 1].vma;
3928 unsigned int i;
3929 char span_type = sec_data->map[span].type;
3930 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
3931
3932 if (span_type != 't')
3933 continue;
3934
3935 /* Span is entirely within a single 4KB region: skip scanning. */
3936 if (((base_vma + span_start) & ~0xfff)
3937 == ((base_vma + span_end) & ~0xfff))
3938 continue;
3939
3940 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
3941
3942 * The opcode is BLX.W, BL.W, B.W, Bcc.W
3943 * The branch target is in the same 4KB region as the
3944 first half of the branch.
3945 * The instruction before the branch is a 32-bit
81694485 3946 length non-branch instruction. */
48229727
JB		 3947 for (i = span_start; i < span_end;)
3948 {
3949 unsigned int insn = bfd_getl16 (&contents[i]);
3950 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
3951 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
3952
3953 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
3954 insn_32bit = TRUE;
3955
3956 if (insn_32bit)
3957 {
3958 /* Load the rest of the insn (in manual-friendly order). */
3959 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
3960
3961 /* Encoding T4: B<c>.W. */
3962 is_b = (insn & 0xf800d000) == 0xf0009000;
3963 /* Encoding T1: BL<c>.W. */
3964 is_bl = (insn & 0xf800d000) == 0xf000d000;
3965 /* Encoding T2: BLX<c>.W. */
3966 is_blx = (insn & 0xf800d000) == 0xf000c000;
3967 /* Encoding T3: B<c>.W (not permitted in IT block). */
3968 is_bcc = (insn & 0xf800d000) == 0xf0008000
3969 && (insn & 0x07f00000) != 0x03800000;
3970 }
3971
3972 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
3973
81694485
NC		 3974 if (((base_vma + i) & 0xfff) == 0xffe
3975 && insn_32bit
3976 && is_32bit_branch
3977 && last_was_32bit
3978 && ! last_was_branch)
48229727 3979 {
81694485 3980 bfd_signed_vma offset;
48229727
JB		 3981 bfd_boolean force_target_arm = FALSE;
3982 bfd_boolean force_target_thumb = FALSE;
3983 bfd_vma target;
3984 enum elf32_arm_stub_type stub_type = arm_stub_none;
3985 struct a8_erratum_reloc key, *found;
3986
3987 key.from = base_vma + i;
3988 found = bsearch (&key, a8_relocs, num_a8_relocs,
3989 sizeof (struct a8_erratum_reloc),
3990 &a8_reloc_compare);
3991
3992 if (found)
3993 {
3994 char *error_message = NULL;
3995 struct elf_link_hash_entry *entry;
3996
3997 /* We don't care about the error returned from this
3998 function, only if there is glue or not. */
3999 entry = find_thumb_glue (info, found->sym_name,
4000 &error_message);
4001
4002 if (entry)
4003 found->non_a8_stub = TRUE;
4004
4005 if (found->r_type == R_ARM_THM_CALL
4006 && found->st_type != STT_ARM_TFUNC)
4007 force_target_arm = TRUE;
4008 else if (found->r_type == R_ARM_THM_CALL
4009 && found->st_type == STT_ARM_TFUNC)
4010 force_target_thumb = TRUE;
4011 }
4012
4013 /* Check if we have an offending branch instruction. */
4014
4015 if (found && found->non_a8_stub)
4016 /* We've already made a stub for this instruction, e.g.
4017 it's a long branch or a Thumb->ARM stub. Assume that
4018 stub will suffice to work around the A8 erratum (see
4019 setting of always_after_branch above). */
4020 ;
4021 else if (is_bcc)
4022 {
4023 offset = (insn & 0x7ff) << 1;
4024 offset |= (insn & 0x3f0000) >> 4;
4025 offset |= (insn & 0x2000) ? 0x40000 : 0;
4026 offset |= (insn & 0x800) ? 0x80000 : 0;
4027 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4028 if (offset & 0x100000)
81694485 4029 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4030 stub_type = arm_stub_a8_veneer_b_cond;
4031 }
4032 else if (is_b || is_bl || is_blx)
4033 {
4034 int s = (insn & 0x4000000) != 0;
4035 int j1 = (insn & 0x2000) != 0;
4036 int j2 = (insn & 0x800) != 0;
4037 int i1 = !(j1 ^ s);
4038 int i2 = !(j2 ^ s);
4039
4040 offset = (insn & 0x7ff) << 1;
4041 offset |= (insn & 0x3ff0000) >> 4;
4042 offset |= i2 << 22;
4043 offset |= i1 << 23;
4044 offset |= s << 24;
4045 if (offset & 0x1000000)
81694485 4046 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4047
4048 if (is_blx)
81694485 4049 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4050
4051 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4052 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4053 }
4054
4055 if (stub_type != arm_stub_none)
4056 {
4057 bfd_vma pc_for_insn = base_vma + i + 4;
4058
4059 /* The original instruction is a BL, but the target is
4060 an ARM instruction. If we were not making a stub,
4061 the BL would have been converted to a BLX. Use the
4062 BLX stub instead in that case. */
4063 if (htab->use_blx && force_target_arm
4064 && stub_type == arm_stub_a8_veneer_bl)
4065 {
4066 stub_type = arm_stub_a8_veneer_blx;
4067 is_blx = TRUE;
4068 is_bl = FALSE;
4069 }
4070 /* Conversely, if the original instruction was
4071 BLX but the target is Thumb mode, use the BL
4072 stub. */
4073 else if (force_target_thumb
4074 && stub_type == arm_stub_a8_veneer_blx)
4075 {
4076 stub_type = arm_stub_a8_veneer_bl;
4077 is_blx = FALSE;
4078 is_bl = TRUE;
4079 }
4080
4081 if (is_blx)
81694485 4082 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4083
4084 /* If we found a relocation, use the proper destination,
4085 not the offset in the (unrelocated) instruction.
4086 Note this is always done if we switched the stub type
4087 above. */
4088 if (found)
81694485
NC		 4089 offset =
4090 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4091
4092 target = pc_for_insn + offset;
4093
4094 /* The BLX stub is ARM-mode code. Adjust the offset to
4095 take the different PC value (+8 instead of +4) into
4096 account. */
4097 if (stub_type == arm_stub_a8_veneer_blx)
4098 offset += 4;
4099
4100 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4101 {
4102 char *stub_name;
4103
4104 if (num_a8_fixes == a8_fix_table_size)
4105 {
4106 a8_fix_table_size *= 2;
4107 a8_fixes = bfd_realloc (a8_fixes,
4108 sizeof (struct a8_erratum_fix)
4109 * a8_fix_table_size);
4110 }
4111
4112 stub_name = bfd_malloc (8 + 1 + 8 + 1);
4113 if (stub_name != NULL)
4114 sprintf (stub_name, "%x:%x", section->id, i);
4115
4116 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4117 a8_fixes[num_a8_fixes].section = section;
4118 a8_fixes[num_a8_fixes].offset = i;
4119 a8_fixes[num_a8_fixes].addend = offset;
4120 a8_fixes[num_a8_fixes].orig_insn = insn;
4121 a8_fixes[num_a8_fixes].stub_name = stub_name;
4122 a8_fixes[num_a8_fixes].stub_type = stub_type;
4123
4124 num_a8_fixes++;
4125 }
4126 }
4127 }
4128
4129 i += insn_32bit ? 4 : 2;
4130 last_was_32bit = insn_32bit;
4131 last_was_branch = is_32bit_branch;
4132 }
4133 }
4134
4135 if (elf_section_data (section)->this_hdr.contents == NULL)
4136 free (contents);
4137 }
4138
4139 *a8_fixes_p = a8_fixes;
4140 *num_a8_fixes_p = num_a8_fixes;
4141 *a8_fix_table_size_p = a8_fix_table_size;
4142
81694485 4143 return FALSE;
48229727
JB		 4144}
4145
906e58ca
NC		 4146/* Determine and set the size of the stub section for a final link.
4147
4148 The basic idea here is to examine all the relocations looking for
4149 PC-relative calls to a target that is unreachable with a "bl"
4150 instruction. */
4151
4152bfd_boolean
4153elf32_arm_size_stubs (bfd *output_bfd,
4154 bfd *stub_bfd,
4155 struct bfd_link_info *info,
4156 bfd_signed_vma group_size,
4157 asection * (*add_stub_section) (const char *, asection *),
4158 void (*layout_sections_again) (void))
4159{
4160 bfd_size_type stub_group_size;
07d72278 4161 bfd_boolean stubs_always_after_branch;
906e58ca
NC		 4162 bfd_boolean stub_changed = 0;
4163 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727
JB		 4164 struct a8_erratum_fix *a8_fixes = NULL;
4165 unsigned int num_a8_fixes = 0, prev_num_a8_fixes = 0, a8_fix_table_size = 10;
4166 struct a8_erratum_reloc *a8_relocs = NULL;
4167 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4168
4169 if (htab->fix_cortex_a8)
4170 {
4171 a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
4172 * a8_fix_table_size);
4173 a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
4174 * a8_reloc_table_size);
4175 }
906e58ca
NC		 4176
4177 /* Propagate mach to stub bfd, because it may not have been
4178 finalized when we created stub_bfd. */
4179 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4180 bfd_get_mach (output_bfd));
4181
4182 /* Stash our params away. */
4183 htab->stub_bfd = stub_bfd;
4184 htab->add_stub_section = add_stub_section;
4185 htab->layout_sections_again = layout_sections_again;
07d72278 4186 stubs_always_after_branch = group_size < 0;
48229727
JB		 4187
4188 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4189 as the first half of a 32-bit branch straddling two 4K pages. This is a
4190 crude way of enforcing that. */
4191 if (htab->fix_cortex_a8)
4192 stubs_always_after_branch = 1;
4193
906e58ca
NC		 4194 if (group_size < 0)
4195 stub_group_size = -group_size;
4196 else
4197 stub_group_size = group_size;
4198
4199 if (stub_group_size == 1)
4200 {
4201 /* Default values. */
4202 /* Thumb branch range is +-4MB has to be used as the default
4203 maximum size (a given section can contain both ARM and Thumb
4204 code, so the worst case has to be taken into account).
4205
4206 This value is 24K less than that, which allows for 2025
4207 12-byte stubs. If we exceed that, then we will fail to link.
4208 The user will have to relink with an explicit group size
4209 option. */
4210 stub_group_size = 4170000;
4211 }
4212
07d72278 4213 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca
NC		 4214
4215 while (1)
4216 {
4217 bfd *input_bfd;
4218 unsigned int bfd_indx;
4219 asection *stub_sec;
4220
48229727
JB		 4221 num_a8_fixes = 0;
4222
906e58ca
NC		 4223 for (input_bfd = info->input_bfds, bfd_indx = 0;
4224 input_bfd != NULL;
4225 input_bfd = input_bfd->link_next, bfd_indx++)
4226 {
4227 Elf_Internal_Shdr *symtab_hdr;
4228 asection *section;
4229 Elf_Internal_Sym *local_syms = NULL;
4230
48229727
JB		 4231 num_a8_relocs = 0;
4232
906e58ca
NC		 4233 /* We'll need the symbol table in a second. */
4234 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4235 if (symtab_hdr->sh_info == 0)
4236 continue;
4237
4238 /* Walk over each section attached to the input bfd. */
4239 for (section = input_bfd->sections;
4240 section != NULL;
4241 section = section->next)
4242 {
4243 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4244
4245 /* If there aren't any relocs, then there's nothing more
4246 to do. */
4247 if ((section->flags & SEC_RELOC) == 0
4248 || section->reloc_count == 0
4249 || (section->flags & SEC_CODE) == 0)
4250 continue;
4251
4252 /* If this section is a link-once section that will be
4253 discarded, then don't create any stubs. */
4254 if (section->output_section == NULL
4255 || section->output_section->owner != output_bfd)
4256 continue;
4257
4258 /* Get the relocs. */
4259 internal_relocs
4260 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4261 NULL, info->keep_memory);
4262 if (internal_relocs == NULL)
4263 goto error_ret_free_local;
4264
4265 /* Now examine each relocation. */
4266 irela = internal_relocs;
4267 irelaend = irela + section->reloc_count;
4268 for (; irela < irelaend; irela++)
4269 {
4270 unsigned int r_type, r_indx;
4271 enum elf32_arm_stub_type stub_type;
4272 struct elf32_arm_stub_hash_entry *stub_entry;
4273 asection *sym_sec;
4274 bfd_vma sym_value;
4275 bfd_vma destination;
4276 struct elf32_arm_link_hash_entry *hash;
7413f23f 4277 const char *sym_name;
906e58ca
NC		 4278 char *stub_name;
4279 const asection *id_sec;
4280 unsigned char st_type;
48229727 4281 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4282
4283 r_type = ELF32_R_TYPE (irela->r_info);
4284 r_indx = ELF32_R_SYM (irela->r_info);
4285
4286 if (r_type >= (unsigned int) R_ARM_max)
4287 {
4288 bfd_set_error (bfd_error_bad_value);
4289 error_ret_free_internal:
4290 if (elf_section_data (section)->relocs == NULL)
4291 free (internal_relocs);
4292 goto error_ret_free_local;
4293 }
4294
155d87d7 4295 /* Only look for stubs on branch instructions. */
906e58ca 4296 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4297 && (r_type != (unsigned int) R_ARM_THM_CALL)
4298 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4299 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4300 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4301 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4302 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4303 continue;
4304
4305 /* Now determine the call target, its name, value,
4306 section. */
4307 sym_sec = NULL;
4308 sym_value = 0;
4309 destination = 0;
4310 hash = NULL;
7413f23f 4311 sym_name = NULL;
906e58ca
NC		 4312 if (r_indx < symtab_hdr->sh_info)
4313 {
4314 /* It's a local symbol. */
4315 Elf_Internal_Sym *sym;
4316 Elf_Internal_Shdr *hdr;
4317
4318 if (local_syms == NULL)
4319 {
4320 local_syms
4321 = (Elf_Internal_Sym *) symtab_hdr->contents;
4322 if (local_syms == NULL)
4323 local_syms
4324 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4325 symtab_hdr->sh_info, 0,
4326 NULL, NULL, NULL);
4327 if (local_syms == NULL)
4328 goto error_ret_free_internal;
4329 }
4330
4331 sym = local_syms + r_indx;
4332 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4333 sym_sec = hdr->bfd_section;
4334 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4335 sym_value = sym->st_value;
4336 destination = (sym_value + irela->r_addend
4337 + sym_sec->output_offset
4338 + sym_sec->output_section->vma);
4339 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4340 sym_name
4341 = bfd_elf_string_from_elf_section (input_bfd,
4342 symtab_hdr->sh_link,
4343 sym->st_name);
906e58ca
NC		 4344 }
4345 else
4346 {
4347 /* It's an external symbol. */
4348 int e_indx;
4349
4350 e_indx = r_indx - symtab_hdr->sh_info;
4351 hash = ((struct elf32_arm_link_hash_entry *)
4352 elf_sym_hashes (input_bfd)[e_indx]);
4353
4354 while (hash->root.root.type == bfd_link_hash_indirect
4355 || hash->root.root.type == bfd_link_hash_warning)
4356 hash = ((struct elf32_arm_link_hash_entry *)
4357 hash->root.root.u.i.link);
4358
4359 if (hash->root.root.type == bfd_link_hash_defined
4360 || hash->root.root.type == bfd_link_hash_defweak)
4361 {
4362 sym_sec = hash->root.root.u.def.section;
4363 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4364
4365 struct elf32_arm_link_hash_table *globals =
4366 elf32_arm_hash_table (info);
4367
4368 /* For a destination in a shared library,
4369 use the PLT stub as target address to
4370 decide whether a branch stub is
4371 needed. */
4372 if (globals->splt != NULL && hash != NULL
4373 && hash->root.plt.offset != (bfd_vma) -1)
4374 {
4375 sym_sec = globals->splt;
4376 sym_value = hash->root.plt.offset;
4377 if (sym_sec->output_section != NULL)
4378 destination = (sym_value
4379 + sym_sec->output_offset
4380 + sym_sec->output_section->vma);
4381 }
4382 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4383 destination = (sym_value + irela->r_addend
4384 + sym_sec->output_offset
4385 + sym_sec->output_section->vma);
4386 }
69c5861e
CL		 4387 else if ((hash->root.root.type == bfd_link_hash_undefined)
4388 || (hash->root.root.type == bfd_link_hash_undefweak))
4389 {
4390 /* For a shared library, use the PLT stub as
4391 target address to decide whether a long
4392 branch stub is needed.
4393 For absolute code, they cannot be handled. */
4394 struct elf32_arm_link_hash_table *globals =
4395 elf32_arm_hash_table (info);
4396
4397 if (globals->splt != NULL && hash != NULL
4398 && hash->root.plt.offset != (bfd_vma) -1)
4399 {
4400 sym_sec = globals->splt;
4401 sym_value = hash->root.plt.offset;
4402 if (sym_sec->output_section != NULL)
4403 destination = (sym_value
4404 + sym_sec->output_offset
4405 + sym_sec->output_section->vma);
4406 }
4407 else
4408 continue;
4409 }
906e58ca
NC		 4410 else
4411 {
4412 bfd_set_error (bfd_error_bad_value);
4413 goto error_ret_free_internal;
4414 }
4415 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4416 sym_name = hash->root.root.root.string;
906e58ca
NC		 4417 }
4418
48229727 4419 do
7413f23f 4420 {
48229727
JB		 4421 /* Determine what (if any) linker stub is needed. */
4422 stub_type = arm_type_of_stub (info, section, irela,
4423 st_type, hash,
4424 destination, sym_sec,
4425 input_bfd, sym_name);
4426 if (stub_type == arm_stub_none)
4427 break;
4428
4429 /* Support for grouping stub sections. */
4430 id_sec = htab->stub_group[section->id].link_sec;
4431
4432 /* Get the name of this stub. */
4433 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
4434 irela);
4435 if (!stub_name)
4436 goto error_ret_free_internal;
4437
4438 /* We've either created a stub for this reloc already,
4439 or we are about to. */
4440 created_stub = TRUE;
4441
4442 stub_entry = arm_stub_hash_lookup
4443 (&htab->stub_hash_table, stub_name,
4444 FALSE, FALSE);
4445 if (stub_entry != NULL)
4446 {
4447 /* The proper stub has already been created. */
4448 free (stub_name);
4449 break;
4450 }
7413f23f 4451
48229727
JB		 4452 stub_entry = elf32_arm_add_stub (stub_name, section,
4453 htab);
4454 if (stub_entry == NULL)
4455 {
4456 free (stub_name);
4457 goto error_ret_free_internal;
4458 }
7413f23f 4459
48229727
JB		 4460 stub_entry->target_value = sym_value;
4461 stub_entry->target_section = sym_sec;
4462 stub_entry->stub_type = stub_type;
4463 stub_entry->h = hash;
4464 stub_entry->st_type = st_type;
4465
4466 if (sym_name == NULL)
4467 sym_name = "unnamed";
4468 stub_entry->output_name
4469 = bfd_alloc (htab->stub_bfd,
4470 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4471 + strlen (sym_name));
4472 if (stub_entry->output_name == NULL)
4473 {
4474 free (stub_name);
4475 goto error_ret_free_internal;
4476 }
4477
4478 /* For historical reasons, use the existing names for
4479 ARM-to-Thumb and Thumb-to-ARM stubs. */
4480 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4481 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4482 && st_type != STT_ARM_TFUNC)
4483 sprintf (stub_entry->output_name,
4484 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4485 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4486 || (r_type == (unsigned int) R_ARM_JUMP24))
4487 && st_type == STT_ARM_TFUNC)
4488 sprintf (stub_entry->output_name,
4489 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4490 else
4491 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4492 sym_name);
4493
4494 stub_changed = TRUE;
4495 }
4496 while (0);
4497
4498 /* Look for relocations which might trigger Cortex-A8
4499 erratum. */
4500 if (htab->fix_cortex_a8
4501 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4502 || r_type == (unsigned int) R_ARM_THM_JUMP19
4503 || r_type == (unsigned int) R_ARM_THM_CALL
4504 || r_type == (unsigned int) R_ARM_THM_XPC22))
4505 {
4506 bfd_vma from = section->output_section->vma
4507 + section->output_offset
4508 + irela->r_offset;
4509
4510 if ((from & 0xfff) == 0xffe)
4511 {
4512 /* Found a candidate. Note we haven't checked the
4513 destination is within 4K here: if we do so (and
4514 don't create an entry in a8_relocs) we can't tell
4515 that a branch should have been relocated when
4516 scanning later. */
4517 if (num_a8_relocs == a8_reloc_table_size)
4518 {
4519 a8_reloc_table_size *= 2;
4520 a8_relocs = bfd_realloc (a8_relocs,
4521 sizeof (struct a8_erratum_reloc)
4522 * a8_reloc_table_size);
4523 }
4524
4525 a8_relocs[num_a8_relocs].from = from;
4526 a8_relocs[num_a8_relocs].destination = destination;
4527 a8_relocs[num_a8_relocs].r_type = r_type;
4528 a8_relocs[num_a8_relocs].st_type = st_type;
4529 a8_relocs[num_a8_relocs].sym_name = sym_name;
4530 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
4531
4532 num_a8_relocs++;
4533 }
4534 }
906e58ca
NC		 4535 }
4536
48229727
JB		 4537 /* We're done with the internal relocs, free them. */
4538 if (elf_section_data (section)->relocs == NULL)
4539 free (internal_relocs);
4540 }
4541
4542 if (htab->fix_cortex_a8)
4543 {
4544 /* Sort relocs which might apply to Cortex-A8 erratum. */
4545 qsort (a8_relocs, num_a8_relocs, sizeof (struct a8_erratum_reloc),
4546 &a8_reloc_compare);
4547
4548 /* Scan for branches which might trigger Cortex-A8 erratum. */
4549 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4550 &num_a8_fixes, &a8_fix_table_size,
4551 a8_relocs, num_a8_relocs) != 0)
4552 goto error_ret_free_local;
5e681ec4 4553 }
5e681ec4
PB		 4554 }
4555
48229727
JB		 4556 if (htab->fix_cortex_a8 && num_a8_fixes != prev_num_a8_fixes)
4557 stub_changed = TRUE;
4558
906e58ca
NC		 4559 if (!stub_changed)
4560 break;
5e681ec4 4561
906e58ca
NC		 4562 /* OK, we've added some stubs. Find out the new size of the
4563 stub sections. */
4564 for (stub_sec = htab->stub_bfd->sections;
4565 stub_sec != NULL;
4566 stub_sec = stub_sec->next)
3e6b1042
DJ		 4567 {
4568 /* Ignore non-stub sections. */
4569 if (!strstr (stub_sec->name, STUB_SUFFIX))
4570 continue;
4571
4572 stub_sec->size = 0;
4573 }
b34b2d70 4574
906e58ca
NC		 4575 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4576
48229727
JB		 4577 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4578 if (htab->fix_cortex_a8)
4579 for (i = 0; i < num_a8_fixes; i++)
4580 {
4581 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4582 a8_fixes[i].section, htab);
4583
4584 if (stub_sec == NULL)
4585 goto error_ret_free_local;
4586
4587 stub_sec->size
4588 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4589 NULL);
4590 }
4591
4592
906e58ca
NC		 4593 /* Ask the linker to do its stuff. */
4594 (*htab->layout_sections_again) ();
4595 stub_changed = FALSE;
48229727 4596 prev_num_a8_fixes = num_a8_fixes;
ba93b8ac
DJ		 4597 }
4598
48229727
JB		 4599 /* Add stubs for Cortex-A8 erratum fixes now. */
4600 if (htab->fix_cortex_a8)
4601 {
4602 for (i = 0; i < num_a8_fixes; i++)
4603 {
4604 struct elf32_arm_stub_hash_entry *stub_entry;
4605 char *stub_name = a8_fixes[i].stub_name;
4606 asection *section = a8_fixes[i].section;
4607 unsigned int section_id = a8_fixes[i].section->id;
4608 asection *link_sec = htab->stub_group[section_id].link_sec;
4609 asection *stub_sec = htab->stub_group[section_id].stub_sec;
4610 const insn_sequence *template;
4611 int template_size, size = 0;
4612
4613 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4614 TRUE, FALSE);
4615 if (stub_entry == NULL)
4616 {
4617 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4618 section->owner,
4619 stub_name);
4620 return FALSE;
4621 }
4622
4623 stub_entry->stub_sec = stub_sec;
4624 stub_entry->stub_offset = 0;
4625 stub_entry->id_sec = link_sec;
4626 stub_entry->stub_type = a8_fixes[i].stub_type;
4627 stub_entry->target_section = a8_fixes[i].section;
4628 stub_entry->target_value = a8_fixes[i].offset;
4629 stub_entry->target_addend = a8_fixes[i].addend;
4630 stub_entry->orig_insn = a8_fixes[i].orig_insn;
4631 stub_entry->st_type = STT_ARM_TFUNC;
4632
4633 size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
4634 &template_size);
4635
4636 stub_entry->stub_size = size;
4637 stub_entry->stub_template = template;
4638 stub_entry->stub_template_size = template_size;
4639 }
4640
4641 /* Stash the Cortex-A8 erratum fix array for use later in
4642 elf32_arm_write_section(). */
4643 htab->a8_erratum_fixes = a8_fixes;
4644 htab->num_a8_erratum_fixes = num_a8_fixes;
4645 }
4646 else
4647 {
4648 htab->a8_erratum_fixes = NULL;
4649 htab->num_a8_erratum_fixes = 0;
4650 }
906e58ca
NC		 4651 return TRUE;
4652
4653 error_ret_free_local:
4654 return FALSE;
5e681ec4
PB		 4655}
4656
906e58ca
NC		 4657/* Build all the stubs associated with the current output file. The
4658 stubs are kept in a hash table attached to the main linker hash
4659 table. We also set up the .plt entries for statically linked PIC
4660 functions here. This function is called via arm_elf_finish in the
4661 linker. */
252b5132 4662
906e58ca
NC		 4663bfd_boolean
4664elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4665{
906e58ca
NC		 4666 asection *stub_sec;
4667 struct bfd_hash_table *table;
4668 struct elf32_arm_link_hash_table *htab;
252b5132 4669
906e58ca 4670 htab = elf32_arm_hash_table (info);
252b5132 4671
906e58ca
NC		 4672 for (stub_sec = htab->stub_bfd->sections;
4673 stub_sec != NULL;
4674 stub_sec = stub_sec->next)
252b5132 4675 {
906e58ca
NC		 4676 bfd_size_type size;
4677
8029a119 4678 /* Ignore non-stub sections. */
906e58ca
NC		 4679 if (!strstr (stub_sec->name, STUB_SUFFIX))
4680 continue;
4681
4682 /* Allocate memory to hold the linker stubs. */
4683 size = stub_sec->size;
4684 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
4685 if (stub_sec->contents == NULL && size != 0)
4686 return FALSE;
4687 stub_sec->size = 0;
252b5132
RH		 4688 }
4689
906e58ca
NC		 4690 /* Build the stubs as directed by the stub hash table. */
4691 table = &htab->stub_hash_table;
4692 bfd_hash_traverse (table, arm_build_one_stub, info);
252b5132 4693
906e58ca 4694 return TRUE;
252b5132
RH		 4695}
4696
9b485d32
NC		 4697/* Locate the Thumb encoded calling stub for NAME. */
4698
252b5132 4699static struct elf_link_hash_entry *
57e8b36a
NC		 4700find_thumb_glue (struct bfd_link_info *link_info,
4701 const char *name,
f2a9dd69 4702 char **error_message)
252b5132
RH		 4703{
4704 char *tmp_name;
4705 struct elf_link_hash_entry *hash;
4706 struct elf32_arm_link_hash_table *hash_table;
4707
4708 /* We need a pointer to the armelf specific hash table. */
4709 hash_table = elf32_arm_hash_table (link_info);
4710
57e8b36a
NC		 4711 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4712 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4713
4714 BFD_ASSERT (tmp_name);
4715
4716 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4717
4718 hash = elf_link_hash_lookup
b34976b6 4719 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4720
b1657152
AM		 4721 if (hash == NULL
4722 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4723 tmp_name, name) == -1)
4724 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4725
4726 free (tmp_name);
4727
4728 return hash;
4729}
4730
9b485d32
NC		 4731/* Locate the ARM encoded calling stub for NAME. */
4732
252b5132 4733static struct elf_link_hash_entry *
57e8b36a
NC		 4734find_arm_glue (struct bfd_link_info *link_info,
4735 const char *name,
f2a9dd69 4736 char **error_message)
252b5132
RH		 4737{
4738 char *tmp_name;
4739 struct elf_link_hash_entry *myh;
4740 struct elf32_arm_link_hash_table *hash_table;
4741
4742 /* We need a pointer to the elfarm specific hash table. */
4743 hash_table = elf32_arm_hash_table (link_info);
4744
57e8b36a
NC		 4745 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
4746 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4747
4748 BFD_ASSERT (tmp_name);
4749
4750 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4751
4752 myh = elf_link_hash_lookup
b34976b6 4753 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4754
b1657152
AM		 4755 if (myh == NULL
4756 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4757 tmp_name, name) == -1)
4758 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4759
4760 free (tmp_name);
4761
4762 return myh;
4763}
4764
8f6277f5 4765/* ARM->Thumb glue (static images):
252b5132
RH		 4766
4767 .arm
4768 __func_from_arm:
4769 ldr r12, __func_addr
4770 bx r12
4771 __func_addr:
906e58ca 4772 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4773
26079076
PB		 4774 (v5t static images)
4775 .arm
4776 __func_from_arm:
4777 ldr pc, __func_addr
4778 __func_addr:
906e58ca 4779 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4780
8f6277f5
PB		 4781 (relocatable images)
4782 .arm
4783 __func_from_arm:
4784 ldr r12, __func_offset
4785 add r12, r12, pc
4786 bx r12
4787 __func_offset:
8029a119 4788 .word func - . */
8f6277f5
PB		 4789
4790#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4791static const insn32 a2t1_ldr_insn = 0xe59fc000;
4792static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4793static const insn32 a2t3_func_addr_insn = 0x00000001;
4794
26079076
PB		 4795#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4796static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4797static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4798
8f6277f5
PB		 4799#define ARM2THUMB_PIC_GLUE_SIZE 16
4800static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4801static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4802static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4803
9b485d32 4804/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4805
8029a119
NC		 4806 .thumb .thumb
4807 .align 2 .align 2
4808 __func_from_thumb: __func_from_thumb:
4809 bx pc push {r6, lr}
4810 nop ldr r6, __func_addr
4811 .arm mov lr, pc
4812 b func bx r6
fcef9eb7
NC		 4813 .arm
4814 ;; back_to_thumb
4815 ldmia r13! {r6, lr}
4816 bx lr
8029a119
NC		 4817 __func_addr:
4818 .word func */
252b5132
RH		 4819
4820#define THUMB2ARM_GLUE_SIZE 8
4821static const insn16 t2a1_bx_pc_insn = 0x4778;
4822static const insn16 t2a2_noop_insn = 0x46c0;
4823static const insn32 t2a3_b_insn = 0xea000000;
4824
c7b8f16e
JB		 4825#define VFP11_ERRATUM_VENEER_SIZE 8
4826
845b51d6
PB		 4827#define ARM_BX_VENEER_SIZE 12
4828static const insn32 armbx1_tst_insn = 0xe3100001;
4829static const insn32 armbx2_moveq_insn = 0x01a0f000;
4830static const insn32 armbx3_bx_insn = 0xe12fff10;
4831
7e392df6 4832#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 4833static void
4834arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 4835{
4836 asection * s;
8029a119 4837 bfd_byte * contents;
252b5132 4838
8029a119 4839 if (size == 0)
3e6b1042
DJ		 4840 {
4841 /* Do not include empty glue sections in the output. */
4842 if (abfd != NULL)
4843 {
4844 s = bfd_get_section_by_name (abfd, name);
4845 if (s != NULL)
4846 s->flags |= SEC_EXCLUDE;
4847 }
4848 return;
4849 }
252b5132 4850
8029a119 4851 BFD_ASSERT (abfd != NULL);
252b5132 4852
8029a119
NC		 4853 s = bfd_get_section_by_name (abfd, name);
4854 BFD_ASSERT (s != NULL);
252b5132 4855
8029a119 4856 contents = bfd_alloc (abfd, size);
252b5132 4857
8029a119
NC		 4858 BFD_ASSERT (s->size == size);
4859 s->contents = contents;
4860}
906e58ca 4861
8029a119
NC		 4862bfd_boolean
4863bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
4864{
4865 struct elf32_arm_link_hash_table * globals;
906e58ca 4866
8029a119
NC		 4867 globals = elf32_arm_hash_table (info);
4868 BFD_ASSERT (globals != NULL);
906e58ca 4869
8029a119
NC		 4870 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4871 globals->arm_glue_size,
4872 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 4873
8029a119
NC		 4874 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4875 globals->thumb_glue_size,
4876 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 4877
8029a119
NC		 4878 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4879 globals->vfp11_erratum_glue_size,
4880 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 4881
8029a119
NC		 4882 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
4883 globals->bx_glue_size,
845b51d6
PB		 4884 ARM_BX_GLUE_SECTION_NAME);
4885
b34976b6 4886 return TRUE;
252b5132
RH		 4887}
4888
a4fd1a8e 4889/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 4890 returns the symbol identifying the stub. */
4891
a4fd1a8e 4892static struct elf_link_hash_entry *
57e8b36a
NC		 4893record_arm_to_thumb_glue (struct bfd_link_info * link_info,
4894 struct elf_link_hash_entry * h)
252b5132
RH		 4895{
4896 const char * name = h->root.root.string;
63b0f745 4897 asection * s;
252b5132
RH		 4898 char * tmp_name;
4899 struct elf_link_hash_entry * myh;
14a793b2 4900 struct bfd_link_hash_entry * bh;
252b5132 4901 struct elf32_arm_link_hash_table * globals;
dc810e39 4902 bfd_vma val;
2f475487 4903 bfd_size_type size;
252b5132
RH		 4904
4905 globals = elf32_arm_hash_table (link_info);
4906
4907 BFD_ASSERT (globals != NULL);
4908 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4909
4910 s = bfd_get_section_by_name
4911 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
4912
252b5132
RH		 4913 BFD_ASSERT (s != NULL);
4914
57e8b36a 4915 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4916
4917 BFD_ASSERT (tmp_name);
4918
4919 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4920
4921 myh = elf_link_hash_lookup
b34976b6 4922 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 4923
4924 if (myh != NULL)
4925 {
9b485d32 4926 /* We've already seen this guy. */
252b5132 4927 free (tmp_name);
a4fd1a8e 4928 return myh;
252b5132
RH		 4929 }
4930
57e8b36a
NC		 4931 /* The only trick here is using hash_table->arm_glue_size as the value.
4932 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 4933 putting it. The +1 on the value marks that the stub has not been
4934 output yet - not that it is a Thumb function. */
14a793b2 4935 bh = NULL;
dc810e39
AM		 4936 val = globals->arm_glue_size + 1;
4937 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
4938 tmp_name, BSF_GLOBAL, s, val,
b34976b6 4939 NULL, TRUE, FALSE, &bh);
252b5132 4940
b7693d02
DJ		 4941 myh = (struct elf_link_hash_entry *) bh;
4942 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
4943 myh->forced_local = 1;
4944
252b5132
RH		 4945 free (tmp_name);
4946
27e55c4d
PB		 4947 if (link_info->shared || globals->root.is_relocatable_executable
4948 || globals->pic_veneer)
2f475487 4949 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 4950 else if (globals->use_blx)
4951 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 4952 else
2f475487
AM		 4953 size = ARM2THUMB_STATIC_GLUE_SIZE;
4954
4955 s->size += size;
4956 globals->arm_glue_size += size;
252b5132 4957
a4fd1a8e 4958 return myh;
252b5132
RH		 4959}
4960
845b51d6
PB		 4961/* Allocate space for ARMv4 BX veneers. */
4962
4963static void
4964record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
4965{
4966 asection * s;
4967 struct elf32_arm_link_hash_table *globals;
4968 char *tmp_name;
4969 struct elf_link_hash_entry *myh;
4970 struct bfd_link_hash_entry *bh;
4971 bfd_vma val;
4972
4973 /* BX PC does not need a veneer. */
4974 if (reg == 15)
4975 return;
4976
4977 globals = elf32_arm_hash_table (link_info);
4978
4979 BFD_ASSERT (globals != NULL);
4980 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4981
4982 /* Check if this veneer has already been allocated. */
4983 if (globals->bx_glue_offset[reg])
4984 return;
4985
4986 s = bfd_get_section_by_name
4987 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
4988
4989 BFD_ASSERT (s != NULL);
4990
4991 /* Add symbol for veneer. */
4992 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 4993
845b51d6 4994 BFD_ASSERT (tmp_name);
906e58ca 4995
845b51d6 4996 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 4997
845b51d6
PB		 4998 myh = elf_link_hash_lookup
4999 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5000
845b51d6 5001 BFD_ASSERT (myh == NULL);
906e58ca 5002
845b51d6
PB		 5003 bh = NULL;
5004 val = globals->bx_glue_size;
5005 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5006 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5007 NULL, TRUE, FALSE, &bh);
5008
5009 myh = (struct elf_link_hash_entry *) bh;
5010 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5011 myh->forced_local = 1;
5012
5013 s->size += ARM_BX_VENEER_SIZE;
5014 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5015 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5016}
5017
5018
c7b8f16e
JB		 5019/* Add an entry to the code/data map for section SEC. */
5020
5021static void
5022elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5023{
5024 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5025 unsigned int newidx;
906e58ca 5026
c7b8f16e
JB		 5027 if (sec_data->map == NULL)
5028 {
5029 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
5030 sec_data->mapcount = 0;
5031 sec_data->mapsize = 1;
5032 }
906e58ca 5033
c7b8f16e 5034 newidx = sec_data->mapcount++;
906e58ca 5035
c7b8f16e
JB		 5036 if (sec_data->mapcount > sec_data->mapsize)
5037 {
5038 sec_data->mapsize *= 2;
515ef31d
NC		 5039 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5040 * sizeof (elf32_arm_section_map));
5041 }
5042
5043 if (sec_data->map)
5044 {
5045 sec_data->map[newidx].vma = vma;
5046 sec_data->map[newidx].type = type;
c7b8f16e 5047 }
c7b8f16e
JB		 5048}
5049
5050
5051/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5052 veneers are handled for now. */
5053
5054static bfd_vma
5055record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5056 elf32_vfp11_erratum_list *branch,
5057 bfd *branch_bfd,
5058 asection *branch_sec,
5059 unsigned int offset)
5060{
5061 asection *s;
5062 struct elf32_arm_link_hash_table *hash_table;
5063 char *tmp_name;
5064 struct elf_link_hash_entry *myh;
5065 struct bfd_link_hash_entry *bh;
5066 bfd_vma val;
5067 struct _arm_elf_section_data *sec_data;
5068 int errcount;
5069 elf32_vfp11_erratum_list *newerr;
906e58ca 5070
c7b8f16e 5071 hash_table = elf32_arm_hash_table (link_info);
906e58ca 5072
c7b8f16e
JB		 5073 BFD_ASSERT (hash_table != NULL);
5074 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5075
c7b8f16e
JB		 5076 s = bfd_get_section_by_name
5077 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5078
c7b8f16e 5079 sec_data = elf32_arm_section_data (s);
906e58ca 5080
c7b8f16e 5081 BFD_ASSERT (s != NULL);
906e58ca 5082
c7b8f16e
JB		 5083 tmp_name = bfd_malloc ((bfd_size_type) strlen
5084 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5085
c7b8f16e 5086 BFD_ASSERT (tmp_name);
906e58ca 5087
c7b8f16e
JB		 5088 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5089 hash_table->num_vfp11_fixes);
906e58ca 5090
c7b8f16e
JB		 5091 myh = elf_link_hash_lookup
5092 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5093
c7b8f16e 5094 BFD_ASSERT (myh == NULL);
906e58ca 5095
c7b8f16e
JB		 5096 bh = NULL;
5097 val = hash_table->vfp11_erratum_glue_size;
5098 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5099 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5100 NULL, TRUE, FALSE, &bh);
5101
5102 myh = (struct elf_link_hash_entry *) bh;
5103 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5104 myh->forced_local = 1;
5105
5106 /* Link veneer back to calling location. */
5107 errcount = ++(sec_data->erratumcount);
5108 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5109
c7b8f16e
JB		 5110 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5111 newerr->vma = -1;
5112 newerr->u.v.branch = branch;
5113 newerr->u.v.id = hash_table->num_vfp11_fixes;
5114 branch->u.b.veneer = newerr;
5115
5116 newerr->next = sec_data->erratumlist;
5117 sec_data->erratumlist = newerr;
5118
5119 /* A symbol for the return from the veneer. */
5120 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5121 hash_table->num_vfp11_fixes);
5122
5123 myh = elf_link_hash_lookup
5124 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5125
c7b8f16e
JB		 5126 if (myh != NULL)
5127 abort ();
5128
5129 bh = NULL;
5130 val = offset + 4;
5131 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5132 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5133
c7b8f16e
JB		 5134 myh = (struct elf_link_hash_entry *) bh;
5135 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5136 myh->forced_local = 1;
5137
5138 free (tmp_name);
906e58ca 5139
c7b8f16e
JB		 5140 /* Generate a mapping symbol for the veneer section, and explicitly add an
5141 entry for that symbol to the code/data map for the section. */
5142 if (hash_table->vfp11_erratum_glue_size == 0)
5143 {
5144 bh = NULL;
5145 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5146 ever requires this erratum fix. */
5147 _bfd_generic_link_add_one_symbol (link_info,
5148 hash_table->bfd_of_glue_owner, "$a",
5149 BSF_LOCAL, s, 0, NULL,
5150 TRUE, FALSE, &bh);
5151
5152 myh = (struct elf_link_hash_entry *) bh;
5153 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5154 myh->forced_local = 1;
906e58ca 5155
c7b8f16e
JB		 5156 /* The elf32_arm_init_maps function only cares about symbols from input
5157 BFDs. We must make a note of this generated mapping symbol
5158 ourselves so that code byteswapping works properly in
5159 elf32_arm_write_section. */
5160 elf32_arm_section_map_add (s, 'a', 0);
5161 }
906e58ca 5162
c7b8f16e
JB		 5163 s->size += VFP11_ERRATUM_VENEER_SIZE;
5164 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5165 hash_table->num_vfp11_fixes++;
906e58ca 5166
c7b8f16e
JB		 5167 /* The offset of the veneer. */
5168 return val;
5169}
5170
8029a119 5171#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5172 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5173 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5174
5175/* Create a fake section for use by the ARM backend of the linker. */
5176
5177static bfd_boolean
5178arm_make_glue_section (bfd * abfd, const char * name)
5179{
5180 asection * sec;
5181
5182 sec = bfd_get_section_by_name (abfd, name);
5183 if (sec != NULL)
5184 /* Already made. */
5185 return TRUE;
5186
5187 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5188
5189 if (sec == NULL
5190 || !bfd_set_section_alignment (abfd, sec, 2))
5191 return FALSE;
5192
5193 /* Set the gc mark to prevent the section from being removed by garbage
5194 collection, despite the fact that no relocs refer to this section. */
5195 sec->gc_mark = 1;
5196
5197 return TRUE;
5198}
5199
8afb0e02
NC		 5200/* Add the glue sections to ABFD. This function is called from the
5201 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5202
b34976b6 5203bfd_boolean
57e8b36a
NC		 5204bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5205 struct bfd_link_info *info)
252b5132 5206{
8afb0e02
NC		 5207 /* If we are only performing a partial
5208 link do not bother adding the glue. */
1049f94e 5209 if (info->relocatable)
b34976b6 5210 return TRUE;
252b5132 5211
8029a119
NC		 5212 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5213 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5214 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5215 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5216}
5217
5218/* Select a BFD to be used to hold the sections used by the glue code.
5219 This function is called from the linker scripts in ld/emultempl/
8029a119 5220 {armelf/pe}.em. */
8afb0e02 5221
b34976b6 5222bfd_boolean
57e8b36a 5223bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5224{
5225 struct elf32_arm_link_hash_table *globals;
5226
5227 /* If we are only performing a partial link
5228 do not bother getting a bfd to hold the glue. */
1049f94e 5229 if (info->relocatable)
b34976b6 5230 return TRUE;
8afb0e02 5231
b7693d02
DJ		 5232 /* Make sure we don't attach the glue sections to a dynamic object. */
5233 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5234
8afb0e02
NC		 5235 globals = elf32_arm_hash_table (info);
5236
5237 BFD_ASSERT (globals != NULL);
5238
5239 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5240 return TRUE;
8afb0e02 5241
252b5132
RH		 5242 /* Save the bfd for later use. */
5243 globals->bfd_of_glue_owner = abfd;
cedb70c5 5244
b34976b6 5245 return TRUE;
252b5132
RH		 5246}
5247
906e58ca
NC		 5248static void
5249check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5250{
104d59d1
JM		 5251 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5252 Tag_CPU_arch) > 2)
39b41c9c
PB		 5253 globals->use_blx = 1;
5254}
5255
b34976b6 5256bfd_boolean
57e8b36a 5257bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5258 struct bfd_link_info *link_info)
252b5132
RH		 5259{
5260 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5261 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5262 Elf_Internal_Rela *irel, *irelend;
5263 bfd_byte *contents = NULL;
252b5132
RH		 5264
5265 asection *sec;
5266 struct elf32_arm_link_hash_table *globals;
5267
5268 /* If we are only performing a partial link do not bother
5269 to construct any glue. */
1049f94e 5270 if (link_info->relocatable)
b34976b6 5271 return TRUE;
252b5132 5272
39ce1a6a
NC		 5273 /* Here we have a bfd that is to be included on the link. We have a
5274 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 5275 globals = elf32_arm_hash_table (link_info);
5276
5277 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5278
5279 check_use_blx (globals);
252b5132 5280
d504ffc8 5281 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5282 {
d003868e
AM		 5283 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5284 abfd);
e489d0ae
PB		 5285 return FALSE;
5286 }
f21f3fe0 5287
39ce1a6a
NC		 5288 /* PR 5398: If we have not decided to include any loadable sections in
5289 the output then we will not have a glue owner bfd. This is OK, it
5290 just means that there is nothing else for us to do here. */
5291 if (globals->bfd_of_glue_owner == NULL)
5292 return TRUE;
5293
252b5132
RH		 5294 /* Rummage around all the relocs and map the glue vectors. */
5295 sec = abfd->sections;
5296
5297 if (sec == NULL)
b34976b6 5298 return TRUE;
252b5132
RH		 5299
5300 for (; sec != NULL; sec = sec->next)
5301 {
5302 if (sec->reloc_count == 0)
5303 continue;
5304
2f475487
AM		 5305 if ((sec->flags & SEC_EXCLUDE) != 0)
5306 continue;
5307
0ffa91dd 5308 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5309
9b485d32 5310 /* Load the relocs. */
6cdc0ccc 5311 internal_relocs
906e58ca 5312 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5313
6cdc0ccc
AM		 5314 if (internal_relocs == NULL)
5315 goto error_return;
252b5132 5316
6cdc0ccc
AM		 5317 irelend = internal_relocs + sec->reloc_count;
5318 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5319 {
5320 long r_type;
5321 unsigned long r_index;
252b5132
RH		 5322
5323 struct elf_link_hash_entry *h;
5324
5325 r_type = ELF32_R_TYPE (irel->r_info);
5326 r_index = ELF32_R_SYM (irel->r_info);
5327
9b485d32 5328 /* These are the only relocation types we care about. */
ba96a88f 5329 if ( r_type != R_ARM_PC24
845b51d6 5330 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5331 continue;
5332
5333 /* Get the section contents if we haven't done so already. */
5334 if (contents == NULL)
5335 {
5336 /* Get cached copy if it exists. */
5337 if (elf_section_data (sec)->this_hdr.contents != NULL)
5338 contents = elf_section_data (sec)->this_hdr.contents;
5339 else
5340 {
5341 /* Go get them off disk. */
57e8b36a 5342 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5343 goto error_return;
5344 }
5345 }
5346
845b51d6
PB		 5347 if (r_type == R_ARM_V4BX)
5348 {
5349 int reg;
5350
5351 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5352 record_arm_bx_glue (link_info, reg);
5353 continue;
5354 }
5355
a7c10850 5356 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5357 h = NULL;
5358
9b485d32 5359 /* We don't care about local symbols. */
252b5132
RH		 5360 if (r_index < symtab_hdr->sh_info)
5361 continue;
5362
9b485d32 5363 /* This is an external symbol. */
252b5132
RH		 5364 r_index -= symtab_hdr->sh_info;
5365 h = (struct elf_link_hash_entry *)
5366 elf_sym_hashes (abfd)[r_index];
5367
5368 /* If the relocation is against a static symbol it must be within
5369 the current section and so cannot be a cross ARM/Thumb relocation. */
5370 if (h == NULL)
5371 continue;
5372
d504ffc8
DJ		 5373 /* If the call will go through a PLT entry then we do not need
5374 glue. */
5375 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5376 continue;
5377
252b5132
RH		 5378 switch (r_type)
5379 {
5380 case R_ARM_PC24:
5381 /* This one is a call from arm code. We need to look up
2f0ca46a 5382 the target of the call. If it is a thumb target, we
252b5132 5383 insert glue. */
ebe24dd4 5384 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5385 record_arm_to_thumb_glue (link_info, h);
5386 break;
5387
252b5132 5388 default:
c6596c5e 5389 abort ();
252b5132
RH		 5390 }
5391 }
6cdc0ccc
AM		 5392
5393 if (contents != NULL
5394 && elf_section_data (sec)->this_hdr.contents != contents)
5395 free (contents);
5396 contents = NULL;
5397
5398 if (internal_relocs != NULL
5399 && elf_section_data (sec)->relocs != internal_relocs)
5400 free (internal_relocs);
5401 internal_relocs = NULL;
252b5132
RH		 5402 }
5403
b34976b6 5404 return TRUE;
9a5aca8c 5405
252b5132 5406error_return:
6cdc0ccc
AM		 5407 if (contents != NULL
5408 && elf_section_data (sec)->this_hdr.contents != contents)
5409 free (contents);
5410 if (internal_relocs != NULL
5411 && elf_section_data (sec)->relocs != internal_relocs)
5412 free (internal_relocs);
9a5aca8c 5413
b34976b6 5414 return FALSE;
252b5132 5415}
7e392df6 5416#endif
252b5132 5417
eb043451 5418
c7b8f16e
JB		 5419/* Initialise maps of ARM/Thumb/data for input BFDs. */
5420
5421void
5422bfd_elf32_arm_init_maps (bfd *abfd)
5423{
5424 Elf_Internal_Sym *isymbuf;
5425 Elf_Internal_Shdr *hdr;
5426 unsigned int i, localsyms;
5427
af1f4419
NC		 5428 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5429 if (! is_arm_elf (abfd))
5430 return;
5431
c7b8f16e
JB		 5432 if ((abfd->flags & DYNAMIC) != 0)
5433 return;
5434
0ffa91dd 5435 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5436 localsyms = hdr->sh_info;
5437
5438 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5439 should contain the number of local symbols, which should come before any
5440 global symbols. Mapping symbols are always local. */
5441 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5442 NULL);
5443
5444 /* No internal symbols read? Skip this BFD. */
5445 if (isymbuf == NULL)
5446 return;
5447
5448 for (i = 0; i < localsyms; i++)
5449 {
5450 Elf_Internal_Sym *isym = &isymbuf[i];
5451 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5452 const char *name;
906e58ca 5453
c7b8f16e
JB		 5454 if (sec != NULL
5455 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5456 {
5457 name = bfd_elf_string_from_elf_section (abfd,
5458 hdr->sh_link, isym->st_name);
906e58ca 5459
c7b8f16e
JB		 5460 if (bfd_is_arm_special_symbol_name (name,
5461 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5462 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5463 }
5464 }
5465}
5466
5467
48229727
JB		 5468/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5469 say what they wanted. */
5470
5471void
5472bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5473{
5474 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5475 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5476
5477 if (globals->fix_cortex_a8 == -1)
5478 {
5479 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5480 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5481 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5482 || out_attr[Tag_CPU_arch_profile].i == 0))
5483 globals->fix_cortex_a8 = 1;
5484 else
5485 globals->fix_cortex_a8 = 0;
5486 }
5487}
5488
5489
c7b8f16e
JB		 5490void
5491bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5492{
5493 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5494 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5495
c7b8f16e
JB		 5496 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5497 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5498 {
5499 switch (globals->vfp11_fix)
5500 {
5501 case BFD_ARM_VFP11_FIX_DEFAULT:
5502 case BFD_ARM_VFP11_FIX_NONE:
5503 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5504 break;
906e58ca 5505
c7b8f16e
JB		 5506 default:
5507 /* Give a warning, but do as the user requests anyway. */
5508 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5509 "workaround is not necessary for target architecture"), obfd);
5510 }
5511 }
5512 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5513 /* For earlier architectures, we might need the workaround, but do not
5514 enable it by default. If users is running with broken hardware, they
5515 must enable the erratum fix explicitly. */
5516 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5517}
5518
5519
906e58ca
NC		 5520enum bfd_arm_vfp11_pipe
5521{
c7b8f16e
JB		 5522 VFP11_FMAC,
5523 VFP11_LS,
5524 VFP11_DS,
5525 VFP11_BAD
5526};
5527
5528/* Return a VFP register number. This is encoded as RX:X for single-precision
5529 registers, or X:RX for double-precision registers, where RX is the group of
5530 four bits in the instruction encoding and X is the single extension bit.
5531 RX and X fields are specified using their lowest (starting) bit. The return
5532 value is:
5533
5534 0...31: single-precision registers s0...s31
5535 32...63: double-precision registers d0...d31.
906e58ca 5536
c7b8f16e
JB		 5537 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5538 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5539
c7b8f16e
JB		 5540static unsigned int
5541bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5542 unsigned int x)
5543{
5544 if (is_double)
5545 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5546 else
5547 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5548}
5549
5550/* Set bits in *WMASK according to a register number REG as encoded by
5551 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5552
5553static void
5554bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5555{
5556 if (reg < 32)
5557 *wmask |= 1 << reg;
5558 else if (reg < 48)
5559 *wmask |= 3 << ((reg - 32) * 2);
5560}
5561
5562/* Return TRUE if WMASK overwrites anything in REGS. */
5563
5564static bfd_boolean
5565bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5566{
5567 int i;
906e58ca 5568
c7b8f16e
JB		 5569 for (i = 0; i < numregs; i++)
5570 {
5571 unsigned int reg = regs[i];
5572
5573 if (reg < 32 && (wmask & (1 << reg)) != 0)
5574 return TRUE;
906e58ca 5575
c7b8f16e
JB		 5576 reg -= 32;
5577
5578 if (reg >= 16)
5579 continue;
906e58ca 5580
c7b8f16e
JB		 5581 if ((wmask & (3 << (reg * 2))) != 0)
5582 return TRUE;
5583 }
906e58ca 5584
c7b8f16e
JB		 5585 return FALSE;
5586}
5587
5588/* In this function, we're interested in two things: finding input registers
5589 for VFP data-processing instructions, and finding the set of registers which
5590 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5591 hold the written set, so FLDM etc. are easy to deal with (we're only
5592 interested in 32 SP registers or 16 dp registers, due to the VFP version
5593 implemented by the chip in question). DP registers are marked by setting
5594 both SP registers in the write mask). */
5595
5596static enum bfd_arm_vfp11_pipe
5597bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5598 int *numregs)
5599{
5600 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
5601 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5602
5603 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5604 {
5605 unsigned int pqrs;
5606 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5607 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5608
5609 pqrs = ((insn & 0x00800000) >> 20)
5610 | ((insn & 0x00300000) >> 19)
5611 | ((insn & 0x00000040) >> 6);
5612
5613 switch (pqrs)
5614 {
5615 case 0: /* fmac[sd]. */
5616 case 1: /* fnmac[sd]. */
5617 case 2: /* fmsc[sd]. */
5618 case 3: /* fnmsc[sd]. */
5619 pipe = VFP11_FMAC;
5620 bfd_arm_vfp11_write_mask (destmask, fd);
5621 regs[0] = fd;
5622 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5623 regs[2] = fm;
5624 *numregs = 3;
5625 break;
5626
5627 case 4: /* fmul[sd]. */
5628 case 5: /* fnmul[sd]. */
5629 case 6: /* fadd[sd]. */
5630 case 7: /* fsub[sd]. */
5631 pipe = VFP11_FMAC;
5632 goto vfp_binop;
5633
5634 case 8: /* fdiv[sd]. */
5635 pipe = VFP11_DS;
5636 vfp_binop:
5637 bfd_arm_vfp11_write_mask (destmask, fd);
5638 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5639 regs[1] = fm;
5640 *numregs = 2;
5641 break;
5642
5643 case 15: /* extended opcode. */
5644 {
5645 unsigned int extn = ((insn >> 15) & 0x1e)
5646 | ((insn >> 7) & 1);
5647
5648 switch (extn)
5649 {
5650 case 0: /* fcpy[sd]. */
5651 case 1: /* fabs[sd]. */
5652 case 2: /* fneg[sd]. */
5653 case 8: /* fcmp[sd]. */
5654 case 9: /* fcmpe[sd]. */
5655 case 10: /* fcmpz[sd]. */
5656 case 11: /* fcmpez[sd]. */
5657 case 16: /* fuito[sd]. */
5658 case 17: /* fsito[sd]. */
5659 case 24: /* ftoui[sd]. */
5660 case 25: /* ftouiz[sd]. */
5661 case 26: /* ftosi[sd]. */
5662 case 27: /* ftosiz[sd]. */
5663 /* These instructions will not bounce due to underflow. */
5664 *numregs = 0;
5665 pipe = VFP11_FMAC;
5666 break;
5667
5668 case 3: /* fsqrt[sd]. */
5669 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5670 registers to cause the erratum in previous instructions. */
5671 bfd_arm_vfp11_write_mask (destmask, fd);
5672 pipe = VFP11_DS;
5673 break;
5674
5675 case 15: /* fcvt{ds,sd}. */
5676 {
5677 int rnum = 0;
5678
5679 bfd_arm_vfp11_write_mask (destmask, fd);
5680
5681 /* Only FCVTSD can underflow. */
5682 if ((insn & 0x100) != 0)
5683 regs[rnum++] = fm;
5684
5685 *numregs = rnum;
5686
5687 pipe = VFP11_FMAC;
5688 }
5689 break;
5690
5691 default:
5692 return VFP11_BAD;
5693 }
5694 }
5695 break;
5696
5697 default:
5698 return VFP11_BAD;
5699 }
5700 }
5701 /* Two-register transfer. */
5702 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5703 {
5704 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5705
c7b8f16e
JB		 5706 if ((insn & 0x100000) == 0)
5707 {
5708 if (is_double)
5709 bfd_arm_vfp11_write_mask (destmask, fm);
5710 else
5711 {
5712 bfd_arm_vfp11_write_mask (destmask, fm);
5713 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5714 }
5715 }
5716
5717 pipe = VFP11_LS;
5718 }
5719 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5720 {
5721 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5722 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5723
c7b8f16e
JB		 5724 switch (puw)
5725 {
5726 case 0: /* Two-reg transfer. We should catch these above. */
5727 abort ();
906e58ca 5728
c7b8f16e
JB		 5729 case 2: /* fldm[sdx]. */
5730 case 3:
5731 case 5:
5732 {
5733 unsigned int i, offset = insn & 0xff;
5734
5735 if (is_double)
5736 offset >>= 1;
5737
5738 for (i = fd; i < fd + offset; i++)
5739 bfd_arm_vfp11_write_mask (destmask, i);
5740 }
5741 break;
906e58ca 5742
c7b8f16e
JB		 5743 case 4: /* fld[sd]. */
5744 case 6:
5745 bfd_arm_vfp11_write_mask (destmask, fd);
5746 break;
906e58ca 5747
c7b8f16e
JB		 5748 default:
5749 return VFP11_BAD;
5750 }
5751
5752 pipe = VFP11_LS;
5753 }
5754 /* Single-register transfer. Note L==0. */
5755 else if ((insn & 0x0f100e10) == 0x0e000a10)
5756 {
5757 unsigned int opcode = (insn >> 21) & 7;
5758 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5759
5760 switch (opcode)
5761 {
5762 case 0: /* fmsr/fmdlr. */
5763 case 1: /* fmdhr. */
5764 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5765 destination register. I don't know if this is exactly right,
5766 but it is the conservative choice. */
5767 bfd_arm_vfp11_write_mask (destmask, fn);
5768 break;
5769
5770 case 7: /* fmxr. */
5771 break;
5772 }
5773
5774 pipe = VFP11_LS;
5775 }
5776
5777 return pipe;
5778}
5779
5780
5781static int elf32_arm_compare_mapping (const void * a, const void * b);
5782
5783
5784/* Look for potentially-troublesome code sequences which might trigger the
5785 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5786 (available from ARM) for details of the erratum. A short version is
5787 described in ld.texinfo. */
5788
5789bfd_boolean
5790bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5791{
5792 asection *sec;
5793 bfd_byte *contents = NULL;
5794 int state = 0;
5795 int regs[3], numregs = 0;
5796 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5797 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5798
c7b8f16e
JB		 5799 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5800 The states transition as follows:
906e58ca 5801
c7b8f16e
JB		 5802 0 -> 1 (vector) or 0 -> 2 (scalar)
5803 A VFP FMAC-pipeline instruction has been seen. Fill
5804 regs[0]..regs[numregs-1] with its input operands. Remember this
5805 instruction in 'first_fmac'.
5806
5807 1 -> 2
5808 Any instruction, except for a VFP instruction which overwrites
5809 regs[*].
906e58ca 5810
c7b8f16e
JB		 5811 1 -> 3 [ -> 0 ] or
5812 2 -> 3 [ -> 0 ]
5813 A VFP instruction has been seen which overwrites any of regs[*].
5814 We must make a veneer! Reset state to 0 before examining next
5815 instruction.
906e58ca 5816
c7b8f16e
JB		 5817 2 -> 0
5818 If we fail to match anything in state 2, reset to state 0 and reset
5819 the instruction pointer to the instruction after 'first_fmac'.
5820
5821 If the VFP11 vector mode is in use, there must be at least two unrelated
5822 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 5823 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 5824
5825 /* If we are only performing a partial link do not bother
5826 to construct any glue. */
5827 if (link_info->relocatable)
5828 return TRUE;
5829
0ffa91dd
NC		 5830 /* Skip if this bfd does not correspond to an ELF image. */
5831 if (! is_arm_elf (abfd))
5832 return TRUE;
906e58ca 5833
c7b8f16e
JB		 5834 /* We should have chosen a fix type by the time we get here. */
5835 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
5836
5837 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
5838 return TRUE;
2e6030b9 5839
33a7ffc2
JM		 5840 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5841 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
5842 return TRUE;
5843
c7b8f16e
JB		 5844 for (sec = abfd->sections; sec != NULL; sec = sec->next)
5845 {
5846 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
5847 struct _arm_elf_section_data *sec_data;
5848
5849 /* If we don't have executable progbits, we're not interested in this
5850 section. Also skip if section is to be excluded. */
5851 if (elf_section_type (sec) != SHT_PROGBITS
5852 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
5853 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 5854 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
5855 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 5856 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
5857 continue;
5858
5859 sec_data = elf32_arm_section_data (sec);
906e58ca 5860
c7b8f16e
JB		 5861 if (sec_data->mapcount == 0)
5862 continue;
906e58ca 5863
c7b8f16e
JB		 5864 if (elf_section_data (sec)->this_hdr.contents != NULL)
5865 contents = elf_section_data (sec)->this_hdr.contents;
5866 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
5867 goto error_return;
5868
5869 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
5870 elf32_arm_compare_mapping);
5871
5872 for (span = 0; span < sec_data->mapcount; span++)
5873 {
5874 unsigned int span_start = sec_data->map[span].vma;
5875 unsigned int span_end = (span == sec_data->mapcount - 1)
5876 ? sec->size : sec_data->map[span + 1].vma;
5877 char span_type = sec_data->map[span].type;
906e58ca 5878
c7b8f16e
JB		 5879 /* FIXME: Only ARM mode is supported at present. We may need to
5880 support Thumb-2 mode also at some point. */
5881 if (span_type != 'a')
5882 continue;
5883
5884 for (i = span_start; i < span_end;)
5885 {
5886 unsigned int next_i = i + 4;
5887 unsigned int insn = bfd_big_endian (abfd)
5888 ? (contents[i] << 24)
5889 | (contents[i + 1] << 16)
5890 | (contents[i + 2] << 8)
5891 | contents[i + 3]
5892 : (contents[i + 3] << 24)
5893 | (contents[i + 2] << 16)
5894 | (contents[i + 1] << 8)
5895 | contents[i];
5896 unsigned int writemask = 0;
5897 enum bfd_arm_vfp11_pipe pipe;
5898
5899 switch (state)
5900 {
5901 case 0:
5902 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
5903 &numregs);
5904 /* I'm assuming the VFP11 erratum can trigger with denorm
5905 operands on either the FMAC or the DS pipeline. This might
5906 lead to slightly overenthusiastic veneer insertion. */
5907 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
5908 {
5909 state = use_vector ? 1 : 2;
5910 first_fmac = i;
5911 veneer_of_insn = insn;
5912 }
5913 break;
5914
5915 case 1:
5916 {
5917 int other_regs[3], other_numregs;
5918 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5919 other_regs,
5920 &other_numregs);
5921 if (pipe != VFP11_BAD
5922 && bfd_arm_vfp11_antidependency (writemask, regs,
5923 numregs))
5924 state = 3;
5925 else
5926 state = 2;
5927 }
5928 break;
5929
5930 case 2:
5931 {
5932 int other_regs[3], other_numregs;
5933 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
5934 other_regs,
5935 &other_numregs);
5936 if (pipe != VFP11_BAD
5937 && bfd_arm_vfp11_antidependency (writemask, regs,
5938 numregs))
5939 state = 3;
5940 else
5941 {
5942 state = 0;
5943 next_i = first_fmac + 4;
5944 }
5945 }
5946 break;
5947
5948 case 3:
5949 abort (); /* Should be unreachable. */
5950 }
5951
5952 if (state == 3)
5953 {
5954 elf32_vfp11_erratum_list *newerr
5955 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5956 int errcount;
5957
5958 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
5959
5960 newerr->u.b.vfp_insn = veneer_of_insn;
5961
5962 switch (span_type)
5963 {
5964 case 'a':
5965 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
5966 break;
906e58ca 5967
c7b8f16e
JB		 5968 default:
5969 abort ();
5970 }
5971
5972 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
5973 first_fmac);
5974
5975 newerr->vma = -1;
5976
5977 newerr->next = sec_data->erratumlist;
5978 sec_data->erratumlist = newerr;
5979
5980 state = 0;
5981 }
5982
5983 i = next_i;
5984 }
5985 }
906e58ca 5986
c7b8f16e
JB		 5987 if (contents != NULL
5988 && elf_section_data (sec)->this_hdr.contents != contents)
5989 free (contents);
5990 contents = NULL;
5991 }
5992
5993 return TRUE;
5994
5995error_return:
5996 if (contents != NULL
5997 && elf_section_data (sec)->this_hdr.contents != contents)
5998 free (contents);
906e58ca 5999
c7b8f16e
JB		 6000 return FALSE;
6001}
6002
6003/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6004 after sections have been laid out, using specially-named symbols. */
6005
6006void
6007bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6008 struct bfd_link_info *link_info)
6009{
6010 asection *sec;
6011 struct elf32_arm_link_hash_table *globals;
6012 char *tmp_name;
906e58ca 6013
c7b8f16e
JB		 6014 if (link_info->relocatable)
6015 return;
2e6030b9
MS		 6016
6017 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6018 if (! is_arm_elf (abfd))
2e6030b9
MS		 6019 return;
6020
c7b8f16e 6021 globals = elf32_arm_hash_table (link_info);
906e58ca 6022
c7b8f16e
JB		 6023 tmp_name = bfd_malloc ((bfd_size_type) strlen
6024 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6025
6026 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6027 {
6028 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6029 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6030
c7b8f16e
JB		 6031 for (; errnode != NULL; errnode = errnode->next)
6032 {
6033 struct elf_link_hash_entry *myh;
6034 bfd_vma vma;
6035
6036 switch (errnode->type)
6037 {
6038 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6039 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6040 /* Find veneer symbol. */
6041 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6042 errnode->u.b.veneer->u.v.id);
6043
6044 myh = elf_link_hash_lookup
6045 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6046
6047 if (myh == NULL)
6048 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6049 "`%s'"), abfd, tmp_name);
6050
6051 vma = myh->root.u.def.section->output_section->vma
6052 + myh->root.u.def.section->output_offset
6053 + myh->root.u.def.value;
6054
6055 errnode->u.b.veneer->vma = vma;
6056 break;
6057
6058 case VFP11_ERRATUM_ARM_VENEER:
6059 case VFP11_ERRATUM_THUMB_VENEER:
6060 /* Find return location. */
6061 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6062 errnode->u.v.id);
6063
6064 myh = elf_link_hash_lookup
6065 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6066
6067 if (myh == NULL)
6068 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6069 "`%s'"), abfd, tmp_name);
6070
6071 vma = myh->root.u.def.section->output_section->vma
6072 + myh->root.u.def.section->output_offset
6073 + myh->root.u.def.value;
6074
6075 errnode->u.v.branch->vma = vma;
6076 break;
906e58ca 6077
c7b8f16e
JB		 6078 default:
6079 abort ();
6080 }
6081 }
6082 }
906e58ca 6083
c7b8f16e
JB		 6084 free (tmp_name);
6085}
6086
6087
eb043451
PB		 6088/* Set target relocation values needed during linking. */
6089
6090void
bf21ed78
MS		 6091bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6092 struct bfd_link_info *link_info,
eb043451 6093 int target1_is_rel,
319850b4 6094 char * target2_type,
33bfe774 6095 int fix_v4bx,
c7b8f16e 6096 int use_blx,
bf21ed78 6097 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6098 int no_enum_warn, int no_wchar_warn,
48229727 6099 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6100{
6101 struct elf32_arm_link_hash_table *globals;
6102
6103 globals = elf32_arm_hash_table (link_info);
6104
6105 globals->target1_is_rel = target1_is_rel;
6106 if (strcmp (target2_type, "rel") == 0)
6107 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6108 else if (strcmp (target2_type, "abs") == 0)
6109 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6110 else if (strcmp (target2_type, "got-rel") == 0)
6111 globals->target2_reloc = R_ARM_GOT_PREL;
6112 else
6113 {
6114 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6115 target2_type);
6116 }
319850b4 6117 globals->fix_v4bx = fix_v4bx;
33bfe774 6118 globals->use_blx |= use_blx;
c7b8f16e 6119 globals->vfp11_fix = vfp11_fix;
27e55c4d 6120 globals->pic_veneer = pic_veneer;
48229727 6121 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6122
0ffa91dd
NC		 6123 BFD_ASSERT (is_arm_elf (output_bfd));
6124 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6125 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6126}
eb043451 6127
12a0a0fd 6128/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6129
12a0a0fd
PB		 6130static void
6131insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6132{
6133 bfd_vma upper;
6134 bfd_vma lower;
6135 int reloc_sign;
6136
6137 BFD_ASSERT ((offset & 1) == 0);
6138
6139 upper = bfd_get_16 (abfd, insn);
6140 lower = bfd_get_16 (abfd, insn + 2);
6141 reloc_sign = (offset < 0) ? 1 : 0;
6142 upper = (upper & ~(bfd_vma) 0x7ff)
6143 | ((offset >> 12) & 0x3ff)
6144 | (reloc_sign << 10);
906e58ca 6145 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6146 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6147 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6148 | ((offset >> 1) & 0x7ff);
6149 bfd_put_16 (abfd, upper, insn);
6150 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6151}
6152
9b485d32
NC		 6153/* Thumb code calling an ARM function. */
6154
252b5132 6155static int
57e8b36a
NC		 6156elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6157 const char * name,
6158 bfd * input_bfd,
6159 bfd * output_bfd,
6160 asection * input_section,
6161 bfd_byte * hit_data,
6162 asection * sym_sec,
6163 bfd_vma offset,
6164 bfd_signed_vma addend,
f2a9dd69
DJ		 6165 bfd_vma val,
6166 char **error_message)
252b5132 6167{
bcbdc74c 6168 asection * s = 0;
dc810e39 6169 bfd_vma my_offset;
252b5132 6170 long int ret_offset;
bcbdc74c
NC		 6171 struct elf_link_hash_entry * myh;
6172 struct elf32_arm_link_hash_table * globals;
252b5132 6173
f2a9dd69 6174 myh = find_thumb_glue (info, name, error_message);
252b5132 6175 if (myh == NULL)
b34976b6 6176 return FALSE;
252b5132
RH		 6177
6178 globals = elf32_arm_hash_table (info);
6179
6180 BFD_ASSERT (globals != NULL);
6181 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6182
6183 my_offset = myh->root.u.def.value;
6184
6185 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6186 THUMB2ARM_GLUE_SECTION_NAME);
6187
6188 BFD_ASSERT (s != NULL);
6189 BFD_ASSERT (s->contents != NULL);
6190 BFD_ASSERT (s->output_section != NULL);
6191
6192 if ((my_offset & 0x01) == 0x01)
6193 {
6194 if (sym_sec != NULL
6195 && sym_sec->owner != NULL
6196 && !INTERWORK_FLAG (sym_sec->owner))
6197 {
8f615d07 6198 (*_bfd_error_handler)
d003868e
AM		 6199 (_("%B(%s): warning: interworking not enabled.\n"
6200 " first occurrence: %B: thumb call to arm"),
6201 sym_sec->owner, input_bfd, name);
252b5132 6202
b34976b6 6203 return FALSE;
252b5132
RH		 6204 }
6205
6206 --my_offset;
6207 myh->root.u.def.value = my_offset;
6208
52ab56c2
PB		 6209 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6210 s->contents + my_offset);
252b5132 6211
52ab56c2
PB		 6212 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6213 s->contents + my_offset + 2);
252b5132
RH		 6214
6215 ret_offset =
9b485d32
NC		 6216 /* Address of destination of the stub. */
6217 ((bfd_signed_vma) val)
252b5132 6218 - ((bfd_signed_vma)
57e8b36a
NC		 6219 /* Offset from the start of the current section
6220 to the start of the stubs. */
9b485d32
NC		 6221 (s->output_offset
6222 /* Offset of the start of this stub from the start of the stubs. */
6223 + my_offset
6224 /* Address of the start of the current section. */
6225 + s->output_section->vma)
6226 /* The branch instruction is 4 bytes into the stub. */
6227 + 4
6228 /* ARM branches work from the pc of the instruction + 8. */
6229 + 8);
252b5132 6230
52ab56c2
PB		 6231 put_arm_insn (globals, output_bfd,
6232 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6233 s->contents + my_offset + 4);
252b5132
RH		 6234 }
6235
6236 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6237
427bfd90
NC		 6238 /* Now go back and fix up the original BL insn to point to here. */
6239 ret_offset =
6240 /* Address of where the stub is located. */
6241 (s->output_section->vma + s->output_offset + my_offset)
6242 /* Address of where the BL is located. */
57e8b36a
NC		 6243 - (input_section->output_section->vma + input_section->output_offset
6244 + offset)
427bfd90
NC		 6245 /* Addend in the relocation. */
6246 - addend
6247 /* Biassing for PC-relative addressing. */
6248 - 8;
252b5132 6249
12a0a0fd 6250 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6251
b34976b6 6252 return TRUE;
252b5132
RH		 6253}
6254
a4fd1a8e 6255/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6256
a4fd1a8e
PB		 6257static struct elf_link_hash_entry *
6258elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6259 const char * name,
6260 bfd * input_bfd,
6261 bfd * output_bfd,
6262 asection * sym_sec,
6263 bfd_vma val,
8029a119
NC		 6264 asection * s,
6265 char ** error_message)
252b5132 6266{
dc810e39 6267 bfd_vma my_offset;
252b5132 6268 long int ret_offset;
bcbdc74c
NC		 6269 struct elf_link_hash_entry * myh;
6270 struct elf32_arm_link_hash_table * globals;
252b5132 6271
f2a9dd69 6272 myh = find_arm_glue (info, name, error_message);
252b5132 6273 if (myh == NULL)
a4fd1a8e 6274 return NULL;
252b5132
RH		 6275
6276 globals = elf32_arm_hash_table (info);
6277
6278 BFD_ASSERT (globals != NULL);
6279 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6280
6281 my_offset = myh->root.u.def.value;
252b5132
RH		 6282
6283 if ((my_offset & 0x01) == 0x01)
6284 {
6285 if (sym_sec != NULL
6286 && sym_sec->owner != NULL
6287 && !INTERWORK_FLAG (sym_sec->owner))
6288 {
8f615d07 6289 (*_bfd_error_handler)
d003868e
AM		 6290 (_("%B(%s): warning: interworking not enabled.\n"
6291 " first occurrence: %B: arm call to thumb"),
6292 sym_sec->owner, input_bfd, name);
252b5132 6293 }
9b485d32 6294
252b5132
RH		 6295 --my_offset;
6296 myh->root.u.def.value = my_offset;
6297
27e55c4d
PB		 6298 if (info->shared || globals->root.is_relocatable_executable
6299 || globals->pic_veneer)
8f6277f5
PB		 6300 {
6301 /* For relocatable objects we can't use absolute addresses,
6302 so construct the address from a relative offset. */
6303 /* TODO: If the offset is small it's probably worth
6304 constructing the address with adds. */
52ab56c2
PB		 6305 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6306 s->contents + my_offset);
6307 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6308 s->contents + my_offset + 4);
6309 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6310 s->contents + my_offset + 8);
8f6277f5
PB		 6311 /* Adjust the offset by 4 for the position of the add,
6312 and 8 for the pipeline offset. */
6313 ret_offset = (val - (s->output_offset
6314 + s->output_section->vma
6315 + my_offset + 12))
6316 | 1;
6317 bfd_put_32 (output_bfd, ret_offset,
6318 s->contents + my_offset + 12);
6319 }
26079076
PB		 6320 else if (globals->use_blx)
6321 {
6322 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6323 s->contents + my_offset);
6324
6325 /* It's a thumb address. Add the low order bit. */
6326 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6327 s->contents + my_offset + 4);
6328 }
8f6277f5
PB		 6329 else
6330 {
52ab56c2
PB		 6331 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6332 s->contents + my_offset);
252b5132 6333
52ab56c2
PB		 6334 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6335 s->contents + my_offset + 4);
252b5132 6336
8f6277f5
PB		 6337 /* It's a thumb address. Add the low order bit. */
6338 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6339 s->contents + my_offset + 8);
8029a119
NC		 6340
6341 my_offset += 12;
8f6277f5 6342 }
252b5132
RH		 6343 }
6344
6345 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6346
a4fd1a8e
PB		 6347 return myh;
6348}
6349
6350/* Arm code calling a Thumb function. */
6351
6352static int
6353elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6354 const char * name,
6355 bfd * input_bfd,
6356 bfd * output_bfd,
6357 asection * input_section,
6358 bfd_byte * hit_data,
6359 asection * sym_sec,
6360 bfd_vma offset,
6361 bfd_signed_vma addend,
f2a9dd69
DJ		 6362 bfd_vma val,
6363 char **error_message)
a4fd1a8e
PB		 6364{
6365 unsigned long int tmp;
6366 bfd_vma my_offset;
6367 asection * s;
6368 long int ret_offset;
6369 struct elf_link_hash_entry * myh;
6370 struct elf32_arm_link_hash_table * globals;
6371
6372 globals = elf32_arm_hash_table (info);
6373
6374 BFD_ASSERT (globals != NULL);
6375 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6376
6377 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6378 ARM2THUMB_GLUE_SECTION_NAME);
6379 BFD_ASSERT (s != NULL);
6380 BFD_ASSERT (s->contents != NULL);
6381 BFD_ASSERT (s->output_section != NULL);
6382
6383 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6384 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6385 if (!myh)
6386 return FALSE;
6387
6388 my_offset = myh->root.u.def.value;
252b5132
RH		 6389 tmp = bfd_get_32 (input_bfd, hit_data);
6390 tmp = tmp & 0xFF000000;
6391
9b485d32 6392 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6393 ret_offset = (s->output_offset
6394 + my_offset
6395 + s->output_section->vma
6396 - (input_section->output_offset
6397 + input_section->output_section->vma
6398 + offset + addend)
6399 - 8);
9a5aca8c 6400
252b5132
RH		 6401 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6402
dc810e39 6403 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6404
b34976b6 6405 return TRUE;
252b5132
RH		 6406}
6407
a4fd1a8e
PB		 6408/* Populate Arm stub for an exported Thumb function. */
6409
6410static bfd_boolean
6411elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6412{
6413 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6414 asection * s;
6415 struct elf_link_hash_entry * myh;
6416 struct elf32_arm_link_hash_entry *eh;
6417 struct elf32_arm_link_hash_table * globals;
6418 asection *sec;
6419 bfd_vma val;
f2a9dd69 6420 char *error_message;
a4fd1a8e 6421
906e58ca 6422 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6423 /* Allocate stubs for exported Thumb functions on v4t. */
6424 if (eh->export_glue == NULL)
6425 return TRUE;
6426
6427 globals = elf32_arm_hash_table (info);
6428
6429 BFD_ASSERT (globals != NULL);
6430 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6431
6432 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6433 ARM2THUMB_GLUE_SECTION_NAME);
6434 BFD_ASSERT (s != NULL);
6435 BFD_ASSERT (s->contents != NULL);
6436 BFD_ASSERT (s->output_section != NULL);
6437
6438 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6439
6440 BFD_ASSERT (sec->output_section != NULL);
6441
a4fd1a8e
PB		 6442 val = eh->export_glue->root.u.def.value + sec->output_offset
6443 + sec->output_section->vma;
8029a119 6444
a4fd1a8e
PB		 6445 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6446 h->root.u.def.section->owner,
f2a9dd69
DJ		 6447 globals->obfd, sec, val, s,
6448 &error_message);
a4fd1a8e
PB		 6449 BFD_ASSERT (myh);
6450 return TRUE;
6451}
6452
845b51d6
PB		 6453/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6454
6455static bfd_vma
6456elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6457{
6458 bfd_byte *p;
6459 bfd_vma glue_addr;
6460 asection *s;
6461 struct elf32_arm_link_hash_table *globals;
6462
6463 globals = elf32_arm_hash_table (info);
6464
6465 BFD_ASSERT (globals != NULL);
6466 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6467
6468 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6469 ARM_BX_GLUE_SECTION_NAME);
6470 BFD_ASSERT (s != NULL);
6471 BFD_ASSERT (s->contents != NULL);
6472 BFD_ASSERT (s->output_section != NULL);
6473
6474 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6475
6476 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6477
6478 if ((globals->bx_glue_offset[reg] & 1) == 0)
6479 {
6480 p = s->contents + glue_addr;
6481 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6482 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6483 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6484 globals->bx_glue_offset[reg] |= 1;
6485 }
6486
6487 return glue_addr + s->output_section->vma + s->output_offset;
6488}
6489
a4fd1a8e
PB		 6490/* Generate Arm stubs for exported Thumb symbols. */
6491static void
906e58ca 6492elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6493 struct bfd_link_info *link_info)
6494{
6495 struct elf32_arm_link_hash_table * globals;
6496
8029a119
NC		 6497 if (link_info == NULL)
6498 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6499 return;
6500
6501 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 6502 /* If blx is available then exported Thumb symbols are OK and there is
6503 nothing to do. */
a4fd1a8e
PB		 6504 if (globals->use_blx)
6505 return;
6506
6507 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6508 link_info);
6509}
6510
eb043451
PB		 6511/* Some relocations map to different relocations depending on the
6512 target. Return the real relocation. */
8029a119 6513
eb043451
PB		 6514static int
6515arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6516 int r_type)
6517{
6518 switch (r_type)
6519 {
6520 case R_ARM_TARGET1:
6521 if (globals->target1_is_rel)
6522 return R_ARM_REL32;
6523 else
6524 return R_ARM_ABS32;
6525
6526 case R_ARM_TARGET2:
6527 return globals->target2_reloc;
6528
6529 default:
6530 return r_type;
6531 }
6532}
eb043451 6533
ba93b8ac
DJ		 6534/* Return the base VMA address which should be subtracted from real addresses
6535 when resolving @dtpoff relocation.
6536 This is PT_TLS segment p_vaddr. */
6537
6538static bfd_vma
6539dtpoff_base (struct bfd_link_info *info)
6540{
6541 /* If tls_sec is NULL, we should have signalled an error already. */
6542 if (elf_hash_table (info)->tls_sec == NULL)
6543 return 0;
6544 return elf_hash_table (info)->tls_sec->vma;
6545}
6546
6547/* Return the relocation value for @tpoff relocation
6548 if STT_TLS virtual address is ADDRESS. */
6549
6550static bfd_vma
6551tpoff (struct bfd_link_info *info, bfd_vma address)
6552{
6553 struct elf_link_hash_table *htab = elf_hash_table (info);
6554 bfd_vma base;
6555
6556 /* If tls_sec is NULL, we should have signalled an error already. */
6557 if (htab->tls_sec == NULL)
6558 return 0;
6559 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6560 return address - htab->tls_sec->vma + base;
6561}
6562
00a97672
RS		 6563/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6564 VALUE is the relocation value. */
6565
6566static bfd_reloc_status_type
6567elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6568{
6569 if (value > 0xfff)
6570 return bfd_reloc_overflow;
6571
6572 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6573 bfd_put_32 (abfd, value, data);
6574 return bfd_reloc_ok;
6575}
6576
4962c51a
MS		 6577/* For a given value of n, calculate the value of G_n as required to
6578 deal with group relocations. We return it in the form of an
6579 encoded constant-and-rotation, together with the final residual. If n is
6580 specified as less than zero, then final_residual is filled with the
6581 input value and no further action is performed. */
6582
6583static bfd_vma
6584calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6585{
6586 int current_n;
6587 bfd_vma g_n;
6588 bfd_vma encoded_g_n = 0;
6589 bfd_vma residual = value; /* Also known as Y_n. */
6590
6591 for (current_n = 0; current_n <= n; current_n++)
6592 {
6593 int shift;
6594
6595 /* Calculate which part of the value to mask. */
6596 if (residual == 0)
6597 shift = 0;
6598 else
6599 {
6600 int msb;
6601
6602 /* Determine the most significant bit in the residual and
6603 align the resulting value to a 2-bit boundary. */
6604 for (msb = 30; msb >= 0; msb -= 2)
6605 if (residual & (3 << msb))
6606 break;
6607
6608 /* The desired shift is now (msb - 6), or zero, whichever
6609 is the greater. */
6610 shift = msb - 6;
6611 if (shift < 0)
6612 shift = 0;
6613 }
6614
6615 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6616 g_n = residual & (0xff << shift);
6617 encoded_g_n = (g_n >> shift)
6618 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6619
6620 /* Calculate the residual for the next time around. */
6621 residual &= ~g_n;
6622 }
6623
6624 *final_residual = residual;
6625
6626 return encoded_g_n;
6627}
6628
6629/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6630 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6631
4962c51a 6632static int
906e58ca 6633identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6634{
6635 int opcode = insn & 0x1e00000;
6636
6637 if (opcode == 1 << 23) /* ADD */
6638 return 1;
6639
6640 if (opcode == 1 << 22) /* SUB */
6641 return -1;
6642
6643 return 0;
6644}
6645
252b5132 6646/* Perform a relocation as part of a final link. */
9b485d32 6647
252b5132 6648static bfd_reloc_status_type
57e8b36a
NC		 6649elf32_arm_final_link_relocate (reloc_howto_type * howto,
6650 bfd * input_bfd,
6651 bfd * output_bfd,
6652 asection * input_section,
6653 bfd_byte * contents,
6654 Elf_Internal_Rela * rel,
6655 bfd_vma value,
6656 struct bfd_link_info * info,
6657 asection * sym_sec,
6658 const char * sym_name,
6659 int sym_flags,
0945cdfd 6660 struct elf_link_hash_entry * h,
f2a9dd69 6661 bfd_boolean * unresolved_reloc_p,
8029a119 6662 char ** error_message)
252b5132
RH		 6663{
6664 unsigned long r_type = howto->type;
6665 unsigned long r_symndx;
6666 bfd_byte * hit_data = contents + rel->r_offset;
6667 bfd * dynobj = NULL;
6668 Elf_Internal_Shdr * symtab_hdr;
6669 struct elf_link_hash_entry ** sym_hashes;
6670 bfd_vma * local_got_offsets;
6671 asection * sgot = NULL;
6672 asection * splt = NULL;
6673 asection * sreloc = NULL;
252b5132 6674 bfd_vma addend;
ba96a88f
NC		 6675 bfd_signed_vma signed_addend;
6676 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6677
9c504268
PB		 6678 globals = elf32_arm_hash_table (info);
6679
0ffa91dd
NC		 6680 BFD_ASSERT (is_arm_elf (input_bfd));
6681
6682 /* Some relocation types map to different relocations depending on the
9c504268 6683 target. We pick the right one here. */
eb043451
PB		 6684 r_type = arm_real_reloc_type (globals, r_type);
6685 if (r_type != howto->type)
6686 howto = elf32_arm_howto_from_type (r_type);
9c504268 6687
cac15327
NC		 6688 /* If the start address has been set, then set the EF_ARM_HASENTRY
6689 flag. Setting this more than once is redundant, but the cost is
6690 not too high, and it keeps the code simple.
99e4ae17 6691
cac15327
NC		 6692 The test is done here, rather than somewhere else, because the
6693 start address is only set just before the final link commences.
6694
6695 Note - if the user deliberately sets a start address of 0, the
6696 flag will not be set. */
6697 if (bfd_get_start_address (output_bfd) != 0)
6698 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6699
252b5132
RH		 6700 dynobj = elf_hash_table (info)->dynobj;
6701 if (dynobj)
6702 {
6703 sgot = bfd_get_section_by_name (dynobj, ".got");
6704 splt = bfd_get_section_by_name (dynobj, ".plt");
6705 }
0ffa91dd 6706 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6707 sym_hashes = elf_sym_hashes (input_bfd);
6708 local_got_offsets = elf_local_got_offsets (input_bfd);
6709 r_symndx = ELF32_R_SYM (rel->r_info);
6710
4e7fd91e 6711 if (globals->use_rel)
ba96a88f 6712 {
4e7fd91e
PB		 6713 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6714
6715 if (addend & ((howto->src_mask + 1) >> 1))
6716 {
6717 signed_addend = -1;
6718 signed_addend &= ~ howto->src_mask;
6719 signed_addend |= addend;
6720 }
6721 else
6722 signed_addend = addend;
ba96a88f
NC		 6723 }
6724 else
4e7fd91e 6725 addend = signed_addend = rel->r_addend;
f21f3fe0 6726
252b5132
RH		 6727 switch (r_type)
6728 {
6729 case R_ARM_NONE:
28a094c2
DJ		 6730 /* We don't need to find a value for this symbol. It's just a
6731 marker. */
6732 *unresolved_reloc_p = FALSE;
252b5132
RH		 6733 return bfd_reloc_ok;
6734
00a97672
RS		 6735 case R_ARM_ABS12:
6736 if (!globals->vxworks_p)
6737 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6738
252b5132
RH		 6739 case R_ARM_PC24:
6740 case R_ARM_ABS32:
bb224fc3 6741 case R_ARM_ABS32_NOI:
252b5132 6742 case R_ARM_REL32:
bb224fc3 6743 case R_ARM_REL32_NOI:
5b5bb741
PB		 6744 case R_ARM_CALL:
6745 case R_ARM_JUMP24:
dfc5f959 6746 case R_ARM_XPC25:
eb043451 6747 case R_ARM_PREL31:
7359ea65 6748 case R_ARM_PLT32:
7359ea65
DJ		 6749 /* Handle relocations which should use the PLT entry. ABS32/REL32
6750 will use the symbol's value, which may point to a PLT entry, but we
6751 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6752 branches in this object should go to it, except if the PLT is too
6753 far away, in which case a long branch stub should be inserted. */
bb224fc3 6754 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6755 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6756 && r_type != R_ARM_CALL
6757 && r_type != R_ARM_JUMP24
6758 && r_type != R_ARM_PLT32)
7359ea65 6759 && h != NULL
c84cd8ee 6760 && splt != NULL
7359ea65
DJ		 6761 && h->plt.offset != (bfd_vma) -1)
6762 {
c84cd8ee
DJ		 6763 /* If we've created a .plt section, and assigned a PLT entry to
6764 this function, it should not be known to bind locally. If
6765 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6766 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6767
6768 value = (splt->output_section->vma
6769 + splt->output_offset
6770 + h->plt.offset);
0945cdfd 6771 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6772 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6773 contents, rel->r_offset, value,
00a97672 6774 rel->r_addend);
7359ea65
DJ		 6775 }
6776
67687978
PB		 6777 /* When generating a shared object or relocatable executable, these
6778 relocations are copied into the output file to be resolved at
6779 run time. */
6780 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6781 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 6782 && !(elf32_arm_hash_table (info)->vxworks_p
6783 && strcmp (input_section->output_section->name,
6784 ".tls_vars") == 0)
bb224fc3 6785 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6786 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 6787 && (h == NULL
6788 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6789 || h->root.type != bfd_link_hash_undefweak)
6790 && r_type != R_ARM_PC24
5b5bb741
PB		 6791 && r_type != R_ARM_CALL
6792 && r_type != R_ARM_JUMP24
ee06dc07 6793 && r_type != R_ARM_PREL31
7359ea65 6794 && r_type != R_ARM_PLT32)
252b5132 6795 {
947216bf
AM		 6796 Elf_Internal_Rela outrel;
6797 bfd_byte *loc;
b34976b6 6798 bfd_boolean skip, relocate;
f21f3fe0 6799
0945cdfd
DJ		 6800 *unresolved_reloc_p = FALSE;
6801
252b5132
RH		 6802 if (sreloc == NULL)
6803 {
83bac4b0
NC		 6804 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6805 ! globals->use_rel);
f21f3fe0 6806
83bac4b0 6807 if (sreloc == NULL)
252b5132 6808 return bfd_reloc_notsupported;
252b5132 6809 }
f21f3fe0 6810
b34976b6
AM		 6811 skip = FALSE;
6812 relocate = FALSE;
f21f3fe0 6813
00a97672 6814 outrel.r_addend = addend;
c629eae0
JJ		 6815 outrel.r_offset =
6816 _bfd_elf_section_offset (output_bfd, info, input_section,
6817 rel->r_offset);
6818 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 6819 skip = TRUE;
0bb2d96a 6820 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 6821 skip = TRUE, relocate = TRUE;
252b5132
RH		 6822 outrel.r_offset += (input_section->output_section->vma
6823 + input_section->output_offset);
f21f3fe0 6824
252b5132 6825 if (skip)
0bb2d96a 6826 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 6827 else if (h != NULL
6828 && h->dynindx != -1
7359ea65 6829 && (!info->shared
5e681ec4 6830 || !info->symbolic
f5385ebf 6831 || !h->def_regular))
5e681ec4 6832 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 6833 else
6834 {
a16385dc
MM		 6835 int symbol;
6836
5e681ec4 6837 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 6838 if (sym_flags == STT_ARM_TFUNC)
6839 value |= 1;
a16385dc 6840 if (globals->symbian_p)
6366ff1e 6841 {
74541ad4
AM		 6842 asection *osec;
6843
6366ff1e
MM		 6844 /* On Symbian OS, the data segment and text segement
6845 can be relocated independently. Therefore, we
6846 must indicate the segment to which this
6847 relocation is relative. The BPABI allows us to
6848 use any symbol in the right segment; we just use
6849 the section symbol as it is convenient. (We
6850 cannot use the symbol given by "h" directly as it
74541ad4
AM		 6851 will not appear in the dynamic symbol table.)
6852
6853 Note that the dynamic linker ignores the section
6854 symbol value, so we don't subtract osec->vma
6855 from the emitted reloc addend. */
10dbd1f3 6856 if (sym_sec)
74541ad4 6857 osec = sym_sec->output_section;
10dbd1f3 6858 else
74541ad4
AM		 6859 osec = input_section->output_section;
6860 symbol = elf_section_data (osec)->dynindx;
6861 if (symbol == 0)
6862 {
6863 struct elf_link_hash_table *htab = elf_hash_table (info);
6864
6865 if ((osec->flags & SEC_READONLY) == 0
6866 && htab->data_index_section != NULL)
6867 osec = htab->data_index_section;
6868 else
6869 osec = htab->text_index_section;
6870 symbol = elf_section_data (osec)->dynindx;
6871 }
6366ff1e
MM		 6872 BFD_ASSERT (symbol != 0);
6873 }
a16385dc
MM		 6874 else
6875 /* On SVR4-ish systems, the dynamic loader cannot
6876 relocate the text and data segments independently,
6877 so the symbol does not matter. */
6878 symbol = 0;
6879 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 6880 if (globals->use_rel)
6881 relocate = TRUE;
6882 else
6883 outrel.r_addend += value;
252b5132 6884 }
f21f3fe0 6885
947216bf 6886 loc = sreloc->contents;
00a97672
RS		 6887 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
6888 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 6889
f21f3fe0 6890 /* If this reloc is against an external symbol, we do not want to
252b5132 6891 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 6892 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 6893 if (! relocate)
6894 return bfd_reloc_ok;
9a5aca8c 6895
f21f3fe0 6896 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 6897 contents, rel->r_offset, value,
6898 (bfd_vma) 0);
6899 }
6900 else switch (r_type)
6901 {
00a97672
RS		 6902 case R_ARM_ABS12:
6903 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6904
dfc5f959 6905 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 6906 case R_ARM_CALL:
6907 case R_ARM_JUMP24:
8029a119 6908 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 6909 case R_ARM_PLT32:
906e58ca
NC		 6910 {
6911 bfd_vma from;
6912 bfd_signed_vma branch_offset;
6913 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
6914
dfc5f959 6915 if (r_type == R_ARM_XPC25)
252b5132 6916 {
dfc5f959
NC		 6917 /* Check for Arm calling Arm function. */
6918 /* FIXME: Should we translate the instruction into a BL
6919 instruction instead ? */
6920 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 6921 (*_bfd_error_handler)
6922 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
6923 input_bfd,
6924 h ? h->root.root.string : "(local)");
dfc5f959 6925 }
155d87d7 6926 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 6927 {
6928 /* Check for Arm calling Thumb function. */
6929 if (sym_flags == STT_ARM_TFUNC)
6930 {
f2a9dd69
DJ		 6931 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
6932 output_bfd, input_section,
6933 hit_data, sym_sec, rel->r_offset,
6934 signed_addend, value,
6935 error_message))
6936 return bfd_reloc_ok;
6937 else
6938 return bfd_reloc_dangerous;
dfc5f959 6939 }
252b5132 6940 }
ba96a88f 6941
906e58ca 6942 /* Check if a stub has to be inserted because the
8029a119 6943 destination is too far or we are changing mode. */
155d87d7
CL		 6944 if ( r_type == R_ARM_CALL
6945 || r_type == R_ARM_JUMP24
6946 || r_type == R_ARM_PLT32)
906e58ca 6947 {
5fa9e92f
CL		 6948 /* If the call goes through a PLT entry, make sure to
6949 check distance to the right destination address. */
6950 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
6951 {
6952 value = (splt->output_section->vma
6953 + splt->output_offset
6954 + h->plt.offset);
6955 *unresolved_reloc_p = FALSE;
6956 }
6957
6958 from = (input_section->output_section->vma
6959 + input_section->output_offset
6960 + rel->r_offset);
6961 branch_offset = (bfd_signed_vma)(value - from);
6962
906e58ca
NC		 6963 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
6964 || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET
155d87d7
CL		 6965 || ((sym_flags == STT_ARM_TFUNC)
6966 && (((r_type == R_ARM_CALL) && !globals->use_blx)
6967 || (r_type == R_ARM_JUMP24)
6968 || (r_type == R_ARM_PLT32) ))
6969 )
906e58ca
NC		 6970 {
6971 /* The target is out of reach, so redirect the
6972 branch to the local stub for this function. */
6973
6974 stub_entry = elf32_arm_get_stub_entry (input_section,
6975 sym_sec, h,
6976 rel, globals);
6977 if (stub_entry != NULL)
6978 value = (stub_entry->stub_offset
6979 + stub_entry->stub_sec->output_offset
6980 + stub_entry->stub_sec->output_section->vma);
6981 }
6982 }
6983
dea514f5
PB		 6984 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6985 where:
6986 S is the address of the symbol in the relocation.
6987 P is address of the instruction being relocated.
6988 A is the addend (extracted from the instruction) in bytes.
6989
6990 S is held in 'value'.
6991 P is the base address of the section containing the
6992 instruction plus the offset of the reloc into that
6993 section, ie:
6994 (input_section->output_section->vma +
6995 input_section->output_offset +
6996 rel->r_offset).
6997 A is the addend, converted into bytes, ie:
6998 (signed_addend * 4)
6999
7000 Note: None of these operations have knowledge of the pipeline
7001 size of the processor, thus it is up to the assembler to
7002 encode this information into the addend. */
7003 value -= (input_section->output_section->vma
7004 + input_section->output_offset);
7005 value -= rel->r_offset;
4e7fd91e
PB		 7006 if (globals->use_rel)
7007 value += (signed_addend << howto->size);
7008 else
7009 /* RELA addends do not have to be adjusted by howto->size. */
7010 value += signed_addend;
23080146 7011
dcb5e6e6
NC		 7012 signed_addend = value;
7013 signed_addend >>= howto->rightshift;
9a5aca8c 7014
5ab79981 7015 /* A branch to an undefined weak symbol is turned into a jump to
82b5c97a
CL		 7016 the next instruction unless a PLT entry will be created. */
7017 if (h && h->root.type == bfd_link_hash_undefweak
7018 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7019 {
7020 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
7021 | 0x0affffff;
7022 }
7023 else
59f2c4e7 7024 {
9b485d32 7025 /* Perform a signed range check. */
dcb5e6e6 7026 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7027 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7028 return bfd_reloc_overflow;
9a5aca8c 7029
5ab79981 7030 addend = (value & 2);
39b41c9c 7031
5ab79981
PB		 7032 value = (signed_addend & howto->dst_mask)
7033 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7034
5ab79981
PB		 7035 if (r_type == R_ARM_CALL)
7036 {
155d87d7
CL		 7037 /* Set the H bit in the BLX instruction. */
7038 if (sym_flags == STT_ARM_TFUNC)
7039 {
7040 if (addend)
7041 value |= (1 << 24);
7042 else
7043 value &= ~(bfd_vma)(1 << 24);
7044 }
7045
5ab79981 7046 /* Select the correct instruction (BL or BLX). */
906e58ca 7047 /* Only if we are not handling a BL to a stub. In this
8029a119 7048 case, mode switching is performed by the stub. */
906e58ca 7049 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7050 value |= (1 << 28);
7051 else
7052 {
7053 value &= ~(bfd_vma)(1 << 28);
7054 value |= (1 << 24);
7055 }
39b41c9c
PB		 7056 }
7057 }
906e58ca 7058 }
252b5132 7059 break;
f21f3fe0 7060
252b5132
RH		 7061 case R_ARM_ABS32:
7062 value += addend;
7063 if (sym_flags == STT_ARM_TFUNC)
7064 value |= 1;
7065 break;
f21f3fe0 7066
bb224fc3
MS		 7067 case R_ARM_ABS32_NOI:
7068 value += addend;
7069 break;
7070
252b5132 7071 case R_ARM_REL32:
a8bc6c78
PB		 7072 value += addend;
7073 if (sym_flags == STT_ARM_TFUNC)
7074 value |= 1;
252b5132 7075 value -= (input_section->output_section->vma
62efb346 7076 + input_section->output_offset + rel->r_offset);
252b5132 7077 break;
eb043451 7078
bb224fc3
MS		 7079 case R_ARM_REL32_NOI:
7080 value += addend;
7081 value -= (input_section->output_section->vma
7082 + input_section->output_offset + rel->r_offset);
7083 break;
7084
eb043451
PB		 7085 case R_ARM_PREL31:
7086 value -= (input_section->output_section->vma
7087 + input_section->output_offset + rel->r_offset);
7088 value += signed_addend;
7089 if (! h || h->root.type != bfd_link_hash_undefweak)
7090 {
8029a119 7091 /* Check for overflow. */
eb043451
PB		 7092 if ((value ^ (value >> 1)) & (1 << 30))
7093 return bfd_reloc_overflow;
7094 }
7095 value &= 0x7fffffff;
7096 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7097 if (sym_flags == STT_ARM_TFUNC)
7098 value |= 1;
7099 break;
252b5132 7100 }
f21f3fe0 7101
252b5132
RH		 7102 bfd_put_32 (input_bfd, value, hit_data);
7103 return bfd_reloc_ok;
7104
7105 case R_ARM_ABS8:
7106 value += addend;
7107 if ((long) value > 0x7f || (long) value < -0x80)
7108 return bfd_reloc_overflow;
7109
7110 bfd_put_8 (input_bfd, value, hit_data);
7111 return bfd_reloc_ok;
7112
7113 case R_ARM_ABS16:
7114 value += addend;
7115
7116 if ((long) value > 0x7fff || (long) value < -0x8000)
7117 return bfd_reloc_overflow;
7118
7119 bfd_put_16 (input_bfd, value, hit_data);
7120 return bfd_reloc_ok;
7121
252b5132 7122 case R_ARM_THM_ABS5:
9b485d32 7123 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7124 if (globals->use_rel)
7125 {
7126 /* Need to refetch addend. */
7127 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7128 /* ??? Need to determine shift amount from operand size. */
7129 addend >>= howto->rightshift;
7130 }
252b5132
RH		 7131 value += addend;
7132
7133 /* ??? Isn't value unsigned? */
7134 if ((long) value > 0x1f || (long) value < -0x10)
7135 return bfd_reloc_overflow;
7136
7137 /* ??? Value needs to be properly shifted into place first. */
7138 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7139 bfd_put_16 (input_bfd, value, hit_data);
7140 return bfd_reloc_ok;
7141
2cab6cc3
MS		 7142 case R_ARM_THM_ALU_PREL_11_0:
7143 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7144 {
7145 bfd_vma insn;
7146 bfd_signed_vma relocation;
7147
7148 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7149 | bfd_get_16 (input_bfd, hit_data + 2);
7150
7151 if (globals->use_rel)
7152 {
7153 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7154 | ((insn & (1 << 26)) >> 15);
7155 if (insn & 0xf00000)
7156 signed_addend = -signed_addend;
7157 }
7158
7159 relocation = value + signed_addend;
7160 relocation -= (input_section->output_section->vma
7161 + input_section->output_offset
7162 + rel->r_offset);
7163
7164 value = abs (relocation);
7165
7166 if (value >= 0x1000)
7167 return bfd_reloc_overflow;
7168
7169 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7170 | ((value & 0x700) << 4)
7171 | ((value & 0x800) << 15);
7172 if (relocation < 0)
7173 insn |= 0xa00000;
7174
7175 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7176 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7177
7178 return bfd_reloc_ok;
7179 }
7180
7181 case R_ARM_THM_PC12:
7182 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7183 {
7184 bfd_vma insn;
7185 bfd_signed_vma relocation;
7186
7187 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7188 | bfd_get_16 (input_bfd, hit_data + 2);
7189
7190 if (globals->use_rel)
7191 {
7192 signed_addend = insn & 0xfff;
7193 if (!(insn & (1 << 23)))
7194 signed_addend = -signed_addend;
7195 }
7196
7197 relocation = value + signed_addend;
7198 relocation -= (input_section->output_section->vma
7199 + input_section->output_offset
7200 + rel->r_offset);
7201
7202 value = abs (relocation);
7203
7204 if (value >= 0x1000)
7205 return bfd_reloc_overflow;
7206
7207 insn = (insn & 0xff7ff000) | value;
7208 if (relocation >= 0)
7209 insn |= (1 << 23);
7210
7211 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7212 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7213
7214 return bfd_reloc_ok;
7215 }
7216
dfc5f959 7217 case R_ARM_THM_XPC22:
c19d1205 7218 case R_ARM_THM_CALL:
bd97cb95 7219 case R_ARM_THM_JUMP24:
dfc5f959 7220 /* Thumb BL (branch long instruction). */
252b5132 7221 {
b34976b6 7222 bfd_vma relocation;
e95de063 7223 bfd_vma reloc_sign;
b34976b6
AM		 7224 bfd_boolean overflow = FALSE;
7225 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7226 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7227 bfd_signed_vma reloc_signed_max;
7228 bfd_signed_vma reloc_signed_min;
b34976b6 7229 bfd_vma check;
252b5132 7230 bfd_signed_vma signed_check;
e95de063
MS		 7231 int bitsize;
7232 int thumb2 = using_thumb2 (globals);
252b5132 7233
5ab79981 7234 /* A branch to an undefined weak symbol is turned into a jump to
19540007
JM		 7235 the next instruction unless a PLT entry will be created. */
7236 if (h && h->root.type == bfd_link_hash_undefweak
7237 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981
PB		 7238 {
7239 bfd_put_16 (input_bfd, 0xe000, hit_data);
7240 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7241 return bfd_reloc_ok;
7242 }
7243
e95de063
MS		 7244 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7245 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7246 if (globals->use_rel)
7247 {
e95de063
MS		 7248 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7249 bfd_vma upper = upper_insn & 0x3ff;
7250 bfd_vma lower = lower_insn & 0x7ff;
7251 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7252 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7253 bfd_vma i1 = j1 ^ s ? 0 : 1;
7254 bfd_vma i2 = j2 ^ s ? 0 : 1;
7255
7256 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7257 /* Sign extend. */
7258 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7259
4e7fd91e
PB		 7260 signed_addend = addend;
7261 }
cb1afa5c 7262
dfc5f959
NC		 7263 if (r_type == R_ARM_THM_XPC22)
7264 {
7265 /* Check for Thumb to Thumb call. */
7266 /* FIXME: Should we translate the instruction into a BL
7267 instruction instead ? */
7268 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7269 (*_bfd_error_handler)
7270 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7271 input_bfd,
7272 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7273 }
7274 else
252b5132 7275 {
dfc5f959
NC		 7276 /* If it is not a call to Thumb, assume call to Arm.
7277 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7278 function call at all, but rather a long jump. Calls through
7279 the PLT do not require stubs. */
7280 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7281 && (h == NULL || splt == NULL
7282 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7283 {
bd97cb95 7284 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7285 {
7286 /* Convert BL to BLX. */
7287 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7288 }
155d87d7
CL		 7289 else if (( r_type != R_ARM_THM_CALL)
7290 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7291 {
7292 if (elf32_thumb_to_arm_stub
7293 (info, sym_name, input_bfd, output_bfd, input_section,
7294 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7295 error_message))
7296 return bfd_reloc_ok;
7297 else
7298 return bfd_reloc_dangerous;
7299 }
da5938a2 7300 }
bd97cb95
DJ		 7301 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7302 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7303 {
7304 /* Make sure this is a BL. */
7305 lower_insn |= 0x1800;
7306 }
252b5132 7307 }
f21f3fe0 7308
b7693d02
DJ		 7309 /* Handle calls via the PLT. */
7310 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7311 {
7312 value = (splt->output_section->vma
7313 + splt->output_offset
7314 + h->plt.offset);
bd97cb95 7315 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 7316 {
7317 /* If the Thumb BLX instruction is available, convert the
7318 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 7319 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 7320 }
7321 else
7322 /* Target the Thumb stub before the ARM PLT entry. */
7323 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 7324 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 7325 }
7326
155d87d7 7327 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7328 {
7329 /* Check if a stub has to be inserted because the destination
8029a119 7330 is too far. */
906e58ca
NC		 7331 bfd_vma from;
7332 bfd_signed_vma branch_offset;
7333 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7334
7335 from = (input_section->output_section->vma
7336 + input_section->output_offset
7337 + rel->r_offset);
7338 branch_offset = (bfd_signed_vma)(value - from);
7339
7340 if ((!thumb2
7341 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
7342 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
7343 ||
7344 (thumb2
7345 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
f4ac8484 7346 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
155d87d7
CL		 7347 || ((sym_flags != STT_ARM_TFUNC)
7348 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
7349 || r_type == R_ARM_THM_JUMP24)))
906e58ca
NC		 7350 {
7351 /* The target is out of reach or we are changing modes, so
7352 redirect the branch to the local stub for this
7353 function. */
7354 stub_entry = elf32_arm_get_stub_entry (input_section,
7355 sym_sec, h,
7356 rel, globals);
7357 if (stub_entry != NULL)
7358 value = (stub_entry->stub_offset
7359 + stub_entry->stub_sec->output_offset
7360 + stub_entry->stub_sec->output_section->vma);
7361
f4ac8484 7362 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7363 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7364 {
7365 if ((stub_entry
7366 && !arm_stub_is_thumb (stub_entry->stub_type))
7367 || (sym_flags != STT_ARM_TFUNC))
7368 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7369 }
906e58ca
NC		 7370 }
7371 }
7372
ba96a88f 7373 relocation = value + signed_addend;
f21f3fe0 7374
252b5132 7375 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7376 + input_section->output_offset
7377 + rel->r_offset);
9a5aca8c 7378
252b5132
RH		 7379 check = relocation >> howto->rightshift;
7380
7381 /* If this is a signed value, the rightshift just dropped
7382 leading 1 bits (assuming twos complement). */
7383 if ((bfd_signed_vma) relocation >= 0)
7384 signed_check = check;
7385 else
7386 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7387
e95de063
MS		 7388 /* Calculate the permissable maximum and minimum values for
7389 this relocation according to whether we're relocating for
7390 Thumb-2 or not. */
7391 bitsize = howto->bitsize;
7392 if (!thumb2)
7393 bitsize -= 2;
7394 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
7395 reloc_signed_min = ~reloc_signed_max;
7396
252b5132 7397 /* Assumes two's complement. */
ba96a88f 7398 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7399 overflow = TRUE;
252b5132 7400
bd97cb95 7401 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7402 /* For a BLX instruction, make sure that the relocation is rounded up
7403 to a word boundary. This follows the semantics of the instruction
7404 which specifies that bit 1 of the target address will come from bit
7405 1 of the base address. */
7406 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7407
e95de063
MS		 7408 /* Put RELOCATION back into the insn. Assumes two's complement.
7409 We use the Thumb-2 encoding, which is safe even if dealing with
7410 a Thumb-1 instruction by virtue of our overflow check above. */
7411 reloc_sign = (signed_check < 0) ? 1 : 0;
7412 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7413 | ((relocation >> 12) & 0x3ff)
7414 | (reloc_sign << 10);
906e58ca 7415 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7416 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7417 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7418 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7419
252b5132
RH		 7420 /* Put the relocated value back in the object file: */
7421 bfd_put_16 (input_bfd, upper_insn, hit_data);
7422 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7423
7424 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7425 }
7426 break;
7427
c19d1205
ZW		 7428 case R_ARM_THM_JUMP19:
7429 /* Thumb32 conditional branch instruction. */
7430 {
7431 bfd_vma relocation;
7432 bfd_boolean overflow = FALSE;
7433 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7434 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7435 bfd_signed_vma reloc_signed_max = 0xffffe;
7436 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7437 bfd_signed_vma signed_check;
7438
7439 /* Need to refetch the addend, reconstruct the top three bits,
7440 and squish the two 11 bit pieces together. */
7441 if (globals->use_rel)
7442 {
7443 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7444 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7445 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7446 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7447 bfd_vma lower = (lower_insn & 0x07ff);
7448
a00a1f35
MS		 7449 upper |= J1 << 6;
7450 upper |= J2 << 7;
7451 upper |= (!S) << 8;
c19d1205
ZW		 7452 upper -= 0x0100; /* Sign extend. */
7453
7454 addend = (upper << 12) | (lower << 1);
7455 signed_addend = addend;
7456 }
7457
bd97cb95
DJ		 7458 /* Handle calls via the PLT. */
7459 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7460 {
7461 value = (splt->output_section->vma
7462 + splt->output_offset
7463 + h->plt.offset);
7464 /* Target the Thumb stub before the ARM PLT entry. */
7465 value -= PLT_THUMB_STUB_SIZE;
7466 *unresolved_reloc_p = FALSE;
7467 }
7468
c19d1205
ZW		 7469 /* ??? Should handle interworking? GCC might someday try to
7470 use this for tail calls. */
7471
7472 relocation = value + signed_addend;
7473 relocation -= (input_section->output_section->vma
7474 + input_section->output_offset
7475 + rel->r_offset);
a00a1f35 7476 signed_check = (bfd_signed_vma) relocation;
c19d1205 7477
c19d1205
ZW		 7478 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7479 overflow = TRUE;
7480
7481 /* Put RELOCATION back into the insn. */
7482 {
7483 bfd_vma S = (relocation & 0x00100000) >> 20;
7484 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7485 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7486 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7487 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7488
a00a1f35 7489 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7490 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7491 }
7492
7493 /* Put the relocated value back in the object file: */
7494 bfd_put_16 (input_bfd, upper_insn, hit_data);
7495 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7496
7497 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7498 }
7499
7500 case R_ARM_THM_JUMP11:
7501 case R_ARM_THM_JUMP8:
7502 case R_ARM_THM_JUMP6:
51c5503b
NC		 7503 /* Thumb B (branch) instruction). */
7504 {
6cf9e9fe 7505 bfd_signed_vma relocation;
51c5503b
NC		 7506 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7507 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7508 bfd_signed_vma signed_check;
7509
c19d1205
ZW		 7510 /* CZB cannot jump backward. */
7511 if (r_type == R_ARM_THM_JUMP6)
7512 reloc_signed_min = 0;
7513
4e7fd91e 7514 if (globals->use_rel)
6cf9e9fe 7515 {
4e7fd91e
PB		 7516 /* Need to refetch addend. */
7517 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7518 if (addend & ((howto->src_mask + 1) >> 1))
7519 {
7520 signed_addend = -1;
7521 signed_addend &= ~ howto->src_mask;
7522 signed_addend |= addend;
7523 }
7524 else
7525 signed_addend = addend;
7526 /* The value in the insn has been right shifted. We need to
7527 undo this, so that we can perform the address calculation
7528 in terms of bytes. */
7529 signed_addend <<= howto->rightshift;
6cf9e9fe 7530 }
6cf9e9fe 7531 relocation = value + signed_addend;
51c5503b
NC		 7532
7533 relocation -= (input_section->output_section->vma
7534 + input_section->output_offset
7535 + rel->r_offset);
7536
6cf9e9fe
NC		 7537 relocation >>= howto->rightshift;
7538 signed_check = relocation;
c19d1205
ZW		 7539
7540 if (r_type == R_ARM_THM_JUMP6)
7541 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7542 else
7543 relocation &= howto->dst_mask;
51c5503b 7544 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7545
51c5503b
NC		 7546 bfd_put_16 (input_bfd, relocation, hit_data);
7547
7548 /* Assumes two's complement. */
7549 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7550 return bfd_reloc_overflow;
7551
7552 return bfd_reloc_ok;
7553 }
cedb70c5 7554
8375c36b
PB		 7555 case R_ARM_ALU_PCREL7_0:
7556 case R_ARM_ALU_PCREL15_8:
7557 case R_ARM_ALU_PCREL23_15:
7558 {
7559 bfd_vma insn;
7560 bfd_vma relocation;
7561
7562 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7563 if (globals->use_rel)
7564 {
7565 /* Extract the addend. */
7566 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7567 signed_addend = addend;
7568 }
8375c36b
PB		 7569 relocation = value + signed_addend;
7570
7571 relocation -= (input_section->output_section->vma
7572 + input_section->output_offset
7573 + rel->r_offset);
7574 insn = (insn & ~0xfff)
7575 | ((howto->bitpos << 7) & 0xf00)
7576 | ((relocation >> howto->bitpos) & 0xff);
7577 bfd_put_32 (input_bfd, value, hit_data);
7578 }
7579 return bfd_reloc_ok;
7580
252b5132
RH		 7581 case R_ARM_GNU_VTINHERIT:
7582 case R_ARM_GNU_VTENTRY:
7583 return bfd_reloc_ok;
7584
c19d1205 7585 case R_ARM_GOTOFF32:
252b5132
RH		 7586 /* Relocation is relative to the start of the
7587 global offset table. */
7588
7589 BFD_ASSERT (sgot != NULL);
7590 if (sgot == NULL)
7591 return bfd_reloc_notsupported;
9a5aca8c 7592
cedb70c5 7593 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7594 address by one, so that attempts to call the function pointer will
7595 correctly interpret it as Thumb code. */
7596 if (sym_flags == STT_ARM_TFUNC)
7597 value += 1;
7598
252b5132
RH		 7599 /* Note that sgot->output_offset is not involved in this
7600 calculation. We always want the start of .got. If we
7601 define _GLOBAL_OFFSET_TABLE in a different way, as is
7602 permitted by the ABI, we might have to change this
9b485d32 7603 calculation. */
252b5132 7604 value -= sgot->output_section->vma;
f21f3fe0 7605 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7606 contents, rel->r_offset, value,
00a97672 7607 rel->r_addend);
252b5132
RH		 7608
7609 case R_ARM_GOTPC:
a7c10850 7610 /* Use global offset table as symbol value. */
252b5132 7611 BFD_ASSERT (sgot != NULL);
f21f3fe0 7612
252b5132
RH		 7613 if (sgot == NULL)
7614 return bfd_reloc_notsupported;
7615
0945cdfd 7616 *unresolved_reloc_p = FALSE;
252b5132 7617 value = sgot->output_section->vma;
f21f3fe0 7618 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7619 contents, rel->r_offset, value,
00a97672 7620 rel->r_addend);
f21f3fe0 7621
252b5132 7622 case R_ARM_GOT32:
eb043451 7623 case R_ARM_GOT_PREL:
252b5132 7624 /* Relocation is to the entry for this symbol in the
9b485d32 7625 global offset table. */
252b5132
RH		 7626 if (sgot == NULL)
7627 return bfd_reloc_notsupported;
f21f3fe0 7628
252b5132
RH		 7629 if (h != NULL)
7630 {
7631 bfd_vma off;
5e681ec4 7632 bfd_boolean dyn;
f21f3fe0 7633
252b5132
RH		 7634 off = h->got.offset;
7635 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7636 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7637
5e681ec4 7638 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7639 || (info->shared
5e681ec4
PB		 7640 && SYMBOL_REFERENCES_LOCAL (info, h))
7641 || (ELF_ST_VISIBILITY (h->other)
7642 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7643 {
7644 /* This is actually a static link, or it is a -Bsymbolic link
7645 and the symbol is defined locally. We must initialize this
7646 entry in the global offset table. Since the offset must
7647 always be a multiple of 4, we use the least significant bit
7648 to record whether we have initialized it already.
f21f3fe0 7649
00a97672 7650 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7651 entry to initialize the value. This is done in the
9b485d32 7652 finish_dynamic_symbol routine. */
252b5132
RH		 7653 if ((off & 1) != 0)
7654 off &= ~1;
7655 else
7656 {
ee29b9fb
RE		 7657 /* If we are addressing a Thumb function, we need to
7658 adjust the address by one, so that attempts to
7659 call the function pointer will correctly
7660 interpret it as Thumb code. */
7661 if (sym_flags == STT_ARM_TFUNC)
7662 value |= 1;
7663
252b5132
RH		 7664 bfd_put_32 (output_bfd, value, sgot->contents + off);
7665 h->got.offset |= 1;
7666 }
7667 }
0945cdfd
DJ		 7668 else
7669 *unresolved_reloc_p = FALSE;
f21f3fe0 7670
252b5132
RH		 7671 value = sgot->output_offset + off;
7672 }
7673 else
7674 {
7675 bfd_vma off;
f21f3fe0 7676
252b5132
RH		 7677 BFD_ASSERT (local_got_offsets != NULL &&
7678 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7679
252b5132 7680 off = local_got_offsets[r_symndx];
f21f3fe0 7681
252b5132
RH		 7682 /* The offset must always be a multiple of 4. We use the
7683 least significant bit to record whether we have already
9b485d32 7684 generated the necessary reloc. */
252b5132
RH		 7685 if ((off & 1) != 0)
7686 off &= ~1;
7687 else
7688 {
b7693d02
DJ		 7689 /* If we are addressing a Thumb function, we need to
7690 adjust the address by one, so that attempts to
7691 call the function pointer will correctly
7692 interpret it as Thumb code. */
7693 if (sym_flags == STT_ARM_TFUNC)
7694 value |= 1;
7695
00a97672
RS		 7696 if (globals->use_rel)
7697 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7698
252b5132
RH		 7699 if (info->shared)
7700 {
7701 asection * srelgot;
947216bf
AM		 7702 Elf_Internal_Rela outrel;
7703 bfd_byte *loc;
f21f3fe0 7704
00a97672
RS		 7705 srelgot = (bfd_get_section_by_name
7706 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7707 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7708
00a97672 7709 outrel.r_addend = addend + value;
252b5132 7710 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7711 + sgot->output_offset
252b5132
RH		 7712 + off);
7713 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7714 loc = srelgot->contents;
00a97672
RS		 7715 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7716 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7717 }
f21f3fe0 7718
252b5132
RH		 7719 local_got_offsets[r_symndx] |= 1;
7720 }
f21f3fe0 7721
252b5132
RH		 7722 value = sgot->output_offset + off;
7723 }
eb043451
PB		 7724 if (r_type != R_ARM_GOT32)
7725 value += sgot->output_section->vma;
9a5aca8c 7726
f21f3fe0 7727 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7728 contents, rel->r_offset, value,
00a97672 7729 rel->r_addend);
f21f3fe0 7730
ba93b8ac
DJ		 7731 case R_ARM_TLS_LDO32:
7732 value = value - dtpoff_base (info);
7733
7734 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7735 contents, rel->r_offset, value,
7736 rel->r_addend);
ba93b8ac
DJ		 7737
7738 case R_ARM_TLS_LDM32:
7739 {
7740 bfd_vma off;
7741
7742 if (globals->sgot == NULL)
7743 abort ();
7744
7745 off = globals->tls_ldm_got.offset;
7746
7747 if ((off & 1) != 0)
7748 off &= ~1;
7749 else
7750 {
7751 /* If we don't know the module number, create a relocation
7752 for it. */
7753 if (info->shared)
7754 {
7755 Elf_Internal_Rela outrel;
7756 bfd_byte *loc;
7757
7758 if (globals->srelgot == NULL)
7759 abort ();
7760
00a97672 7761 outrel.r_addend = 0;
ba93b8ac
DJ		 7762 outrel.r_offset = (globals->sgot->output_section->vma
7763 + globals->sgot->output_offset + off);
7764 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
7765
00a97672
RS		 7766 if (globals->use_rel)
7767 bfd_put_32 (output_bfd, outrel.r_addend,
7768 globals->sgot->contents + off);
ba93b8ac
DJ		 7769
7770 loc = globals->srelgot->contents;
00a97672
RS		 7771 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
7772 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 7773 }
7774 else
7775 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
7776
7777 globals->tls_ldm_got.offset |= 1;
7778 }
7779
906e58ca 7780 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7781 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7782
7783 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7784 contents, rel->r_offset, value,
00a97672 7785 rel->r_addend);
ba93b8ac
DJ		 7786 }
7787
7788 case R_ARM_TLS_GD32:
7789 case R_ARM_TLS_IE32:
7790 {
7791 bfd_vma off;
7792 int indx;
7793 char tls_type;
7794
7795 if (globals->sgot == NULL)
7796 abort ();
7797
7798 indx = 0;
7799 if (h != NULL)
7800 {
7801 bfd_boolean dyn;
7802 dyn = globals->root.dynamic_sections_created;
7803 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
7804 && (!info->shared
7805 || !SYMBOL_REFERENCES_LOCAL (info, h)))
7806 {
7807 *unresolved_reloc_p = FALSE;
7808 indx = h->dynindx;
7809 }
7810 off = h->got.offset;
7811 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
7812 }
7813 else
7814 {
7815 if (local_got_offsets == NULL)
7816 abort ();
7817 off = local_got_offsets[r_symndx];
7818 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
7819 }
7820
7821 if (tls_type == GOT_UNKNOWN)
7822 abort ();
7823
7824 if ((off & 1) != 0)
7825 off &= ~1;
7826 else
7827 {
7828 bfd_boolean need_relocs = FALSE;
7829 Elf_Internal_Rela outrel;
7830 bfd_byte *loc = NULL;
7831 int cur_off = off;
7832
7833 /* The GOT entries have not been initialized yet. Do it
7834 now, and emit any relocations. If both an IE GOT and a
7835 GD GOT are necessary, we emit the GD first. */
7836
7837 if ((info->shared || indx != 0)
7838 && (h == NULL
7839 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
7840 || h->root.type != bfd_link_hash_undefweak))
7841 {
7842 need_relocs = TRUE;
7843 if (globals->srelgot == NULL)
7844 abort ();
7845 loc = globals->srelgot->contents;
00a97672 7846 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 7847 }
7848
7849 if (tls_type & GOT_TLS_GD)
7850 {
7851 if (need_relocs)
7852 {
00a97672 7853 outrel.r_addend = 0;
ba93b8ac 7854 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 7855 + globals->sgot->output_offset
7856 + cur_off);
ba93b8ac 7857 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 7858
00a97672
RS		 7859 if (globals->use_rel)
7860 bfd_put_32 (output_bfd, outrel.r_addend,
7861 globals->sgot->contents + cur_off);
7862
7863 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7864 globals->srelgot->reloc_count++;
00a97672 7865 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7866
7867 if (indx == 0)
7868 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7869 globals->sgot->contents + cur_off + 4);
7870 else
7871 {
00a97672 7872 outrel.r_addend = 0;
ba93b8ac
DJ		 7873 outrel.r_info = ELF32_R_INFO (indx,
7874 R_ARM_TLS_DTPOFF32);
7875 outrel.r_offset += 4;
00a97672
RS		 7876
7877 if (globals->use_rel)
7878 bfd_put_32 (output_bfd, outrel.r_addend,
7879 globals->sgot->contents + cur_off + 4);
7880
7881
7882 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7883 globals->srelgot->reloc_count++;
00a97672 7884 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7885 }
7886 }
7887 else
7888 {
7889 /* If we are not emitting relocations for a
7890 general dynamic reference, then we must be in a
7891 static link or an executable link with the
7892 symbol binding locally. Mark it as belonging
7893 to module 1, the executable. */
7894 bfd_put_32 (output_bfd, 1,
7895 globals->sgot->contents + cur_off);
7896 bfd_put_32 (output_bfd, value - dtpoff_base (info),
7897 globals->sgot->contents + cur_off + 4);
7898 }
7899
7900 cur_off += 8;
7901 }
7902
7903 if (tls_type & GOT_TLS_IE)
7904 {
7905 if (need_relocs)
7906 {
00a97672
RS		 7907 if (indx == 0)
7908 outrel.r_addend = value - dtpoff_base (info);
7909 else
7910 outrel.r_addend = 0;
ba93b8ac
DJ		 7911 outrel.r_offset = (globals->sgot->output_section->vma
7912 + globals->sgot->output_offset
7913 + cur_off);
7914 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
7915
00a97672
RS		 7916 if (globals->use_rel)
7917 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 7918 globals->sgot->contents + cur_off);
7919
00a97672 7920 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 7921 globals->srelgot->reloc_count++;
00a97672 7922 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 7923 }
7924 else
7925 bfd_put_32 (output_bfd, tpoff (info, value),
7926 globals->sgot->contents + cur_off);
7927 cur_off += 4;
7928 }
7929
7930 if (h != NULL)
7931 h->got.offset |= 1;
7932 else
7933 local_got_offsets[r_symndx] |= 1;
7934 }
7935
7936 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
7937 off += 8;
906e58ca 7938 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 7939 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
7940
7941 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7942 contents, rel->r_offset, value,
00a97672 7943 rel->r_addend);
ba93b8ac
DJ		 7944 }
7945
7946 case R_ARM_TLS_LE32:
7947 if (info->shared)
7948 {
7949 (*_bfd_error_handler)
7950 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
7951 input_bfd, input_section,
7952 (long) rel->r_offset, howto->name);
906e58ca 7953 return FALSE;
ba93b8ac
DJ		 7954 }
7955 else
7956 value = tpoff (info, value);
906e58ca 7957
ba93b8ac 7958 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7959 contents, rel->r_offset, value,
7960 rel->r_addend);
ba93b8ac 7961
319850b4
JB		 7962 case R_ARM_V4BX:
7963 if (globals->fix_v4bx)
845b51d6
PB		 7964 {
7965 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 7966
845b51d6
PB		 7967 /* Ensure that we have a BX instruction. */
7968 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 7969
845b51d6
PB		 7970 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
7971 {
7972 /* Branch to veneer. */
7973 bfd_vma glue_addr;
7974 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
7975 glue_addr -= input_section->output_section->vma
7976 + input_section->output_offset
7977 + rel->r_offset + 8;
7978 insn = (insn & 0xf0000000) | 0x0a000000
7979 | ((glue_addr >> 2) & 0x00ffffff);
7980 }
7981 else
7982 {
7983 /* Preserve Rm (lowest four bits) and the condition code
7984 (highest four bits). Other bits encode MOV PC,Rm. */
7985 insn = (insn & 0xf000000f) | 0x01a0f000;
7986 }
319850b4 7987
845b51d6
PB		 7988 bfd_put_32 (input_bfd, insn, hit_data);
7989 }
319850b4
JB		 7990 return bfd_reloc_ok;
7991
b6895b4f
PB		 7992 case R_ARM_MOVW_ABS_NC:
7993 case R_ARM_MOVT_ABS:
7994 case R_ARM_MOVW_PREL_NC:
7995 case R_ARM_MOVT_PREL:
92f5d02b
MS		 7996 /* Until we properly support segment-base-relative addressing then
7997 we assume the segment base to be zero, as for the group relocations.
7998 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7999 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8000 case R_ARM_MOVW_BREL_NC:
8001 case R_ARM_MOVW_BREL:
8002 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8003 {
8004 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8005
8006 if (globals->use_rel)
8007 {
8008 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8009 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8010 }
92f5d02b 8011
b6895b4f 8012 value += signed_addend;
b6895b4f
PB		 8013
8014 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8015 value -= (input_section->output_section->vma
8016 + input_section->output_offset + rel->r_offset);
8017
92f5d02b
MS		 8018 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8019 return bfd_reloc_overflow;
8020
8021 if (sym_flags == STT_ARM_TFUNC)
8022 value |= 1;
8023
8024 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8025 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8026 value >>= 16;
8027
8028 insn &= 0xfff0f000;
8029 insn |= value & 0xfff;
8030 insn |= (value & 0xf000) << 4;
8031 bfd_put_32 (input_bfd, insn, hit_data);
8032 }
8033 return bfd_reloc_ok;
8034
8035 case R_ARM_THM_MOVW_ABS_NC:
8036 case R_ARM_THM_MOVT_ABS:
8037 case R_ARM_THM_MOVW_PREL_NC:
8038 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8039 /* Until we properly support segment-base-relative addressing then
8040 we assume the segment base to be zero, as for the above relocations.
8041 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8042 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8043 as R_ARM_THM_MOVT_ABS. */
8044 case R_ARM_THM_MOVW_BREL_NC:
8045 case R_ARM_THM_MOVW_BREL:
8046 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8047 {
8048 bfd_vma insn;
906e58ca 8049
b6895b4f
PB		 8050 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8051 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8052
8053 if (globals->use_rel)
8054 {
8055 addend = ((insn >> 4) & 0xf000)
8056 | ((insn >> 15) & 0x0800)
8057 | ((insn >> 4) & 0x0700)
8058 | (insn & 0x00ff);
39623e12 8059 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8060 }
92f5d02b 8061
b6895b4f 8062 value += signed_addend;
b6895b4f
PB		 8063
8064 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8065 value -= (input_section->output_section->vma
8066 + input_section->output_offset + rel->r_offset);
8067
92f5d02b
MS		 8068 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8069 return bfd_reloc_overflow;
8070
8071 if (sym_flags == STT_ARM_TFUNC)
8072 value |= 1;
8073
8074 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8075 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8076 value >>= 16;
8077
8078 insn &= 0xfbf08f00;
8079 insn |= (value & 0xf000) << 4;
8080 insn |= (value & 0x0800) << 15;
8081 insn |= (value & 0x0700) << 4;
8082 insn |= (value & 0x00ff);
8083
8084 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8085 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8086 }
8087 return bfd_reloc_ok;
8088
4962c51a
MS		 8089 case R_ARM_ALU_PC_G0_NC:
8090 case R_ARM_ALU_PC_G1_NC:
8091 case R_ARM_ALU_PC_G0:
8092 case R_ARM_ALU_PC_G1:
8093 case R_ARM_ALU_PC_G2:
8094 case R_ARM_ALU_SB_G0_NC:
8095 case R_ARM_ALU_SB_G1_NC:
8096 case R_ARM_ALU_SB_G0:
8097 case R_ARM_ALU_SB_G1:
8098 case R_ARM_ALU_SB_G2:
8099 {
8100 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8101 bfd_vma pc = input_section->output_section->vma
8102 + input_section->output_offset + rel->r_offset;
8103 /* sb should be the origin of the *segment* containing the symbol.
8104 It is not clear how to obtain this OS-dependent value, so we
8105 make an arbitrary choice of zero. */
8106 bfd_vma sb = 0;
8107 bfd_vma residual;
8108 bfd_vma g_n;
8109 bfd_signed_vma signed_value;
8110 int group = 0;
8111
8112 /* Determine which group of bits to select. */
8113 switch (r_type)
8114 {
8115 case R_ARM_ALU_PC_G0_NC:
8116 case R_ARM_ALU_PC_G0:
8117 case R_ARM_ALU_SB_G0_NC:
8118 case R_ARM_ALU_SB_G0:
8119 group = 0;
8120 break;
8121
8122 case R_ARM_ALU_PC_G1_NC:
8123 case R_ARM_ALU_PC_G1:
8124 case R_ARM_ALU_SB_G1_NC:
8125 case R_ARM_ALU_SB_G1:
8126 group = 1;
8127 break;
8128
8129 case R_ARM_ALU_PC_G2:
8130 case R_ARM_ALU_SB_G2:
8131 group = 2;
8132 break;
8133
8134 default:
906e58ca 8135 abort ();
4962c51a
MS		 8136 }
8137
8138 /* If REL, extract the addend from the insn. If RELA, it will
8139 have already been fetched for us. */
8140 if (globals->use_rel)
8141 {
8142 int negative;
8143 bfd_vma constant = insn & 0xff;
8144 bfd_vma rotation = (insn & 0xf00) >> 8;
8145
8146 if (rotation == 0)
8147 signed_addend = constant;
8148 else
8149 {
8150 /* Compensate for the fact that in the instruction, the
8151 rotation is stored in multiples of 2 bits. */
8152 rotation *= 2;
8153
8154 /* Rotate "constant" right by "rotation" bits. */
8155 signed_addend = (constant >> rotation) |
8156 (constant << (8 * sizeof (bfd_vma) - rotation));
8157 }
8158
8159 /* Determine if the instruction is an ADD or a SUB.
8160 (For REL, this determines the sign of the addend.) */
8161 negative = identify_add_or_sub (insn);
8162 if (negative == 0)
8163 {
8164 (*_bfd_error_handler)
8165 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8166 input_bfd, input_section,
8167 (long) rel->r_offset, howto->name);
906e58ca 8168 return bfd_reloc_overflow;
4962c51a
MS		 8169 }
8170
8171 signed_addend *= negative;
8172 }
8173
8174 /* Compute the value (X) to go in the place. */
8175 if (r_type == R_ARM_ALU_PC_G0_NC
8176 || r_type == R_ARM_ALU_PC_G1_NC
8177 || r_type == R_ARM_ALU_PC_G0
8178 || r_type == R_ARM_ALU_PC_G1
8179 || r_type == R_ARM_ALU_PC_G2)
8180 /* PC relative. */
8181 signed_value = value - pc + signed_addend;
8182 else
8183 /* Section base relative. */
8184 signed_value = value - sb + signed_addend;
8185
8186 /* If the target symbol is a Thumb function, then set the
8187 Thumb bit in the address. */
8188 if (sym_flags == STT_ARM_TFUNC)
8189 signed_value |= 1;
8190
8191 /* Calculate the value of the relevant G_n, in encoded
8192 constant-with-rotation format. */
8193 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8194 &residual);
8195
8196 /* Check for overflow if required. */
8197 if ((r_type == R_ARM_ALU_PC_G0
8198 || r_type == R_ARM_ALU_PC_G1
8199 || r_type == R_ARM_ALU_PC_G2
8200 || r_type == R_ARM_ALU_SB_G0
8201 || r_type == R_ARM_ALU_SB_G1
8202 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8203 {
8204 (*_bfd_error_handler)
8205 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8206 input_bfd, input_section,
8207 (long) rel->r_offset, abs (signed_value), howto->name);
8208 return bfd_reloc_overflow;
8209 }
8210
8211 /* Mask out the value and the ADD/SUB part of the opcode; take care
8212 not to destroy the S bit. */
8213 insn &= 0xff1ff000;
8214
8215 /* Set the opcode according to whether the value to go in the
8216 place is negative. */
8217 if (signed_value < 0)
8218 insn |= 1 << 22;
8219 else
8220 insn |= 1 << 23;
8221
8222 /* Encode the offset. */
8223 insn |= g_n;
8224
8225 bfd_put_32 (input_bfd, insn, hit_data);
8226 }
8227 return bfd_reloc_ok;
8228
8229 case R_ARM_LDR_PC_G0:
8230 case R_ARM_LDR_PC_G1:
8231 case R_ARM_LDR_PC_G2:
8232 case R_ARM_LDR_SB_G0:
8233 case R_ARM_LDR_SB_G1:
8234 case R_ARM_LDR_SB_G2:
8235 {
8236 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8237 bfd_vma pc = input_section->output_section->vma
8238 + input_section->output_offset + rel->r_offset;
8239 bfd_vma sb = 0; /* See note above. */
8240 bfd_vma residual;
8241 bfd_signed_vma signed_value;
8242 int group = 0;
8243
8244 /* Determine which groups of bits to calculate. */
8245 switch (r_type)
8246 {
8247 case R_ARM_LDR_PC_G0:
8248 case R_ARM_LDR_SB_G0:
8249 group = 0;
8250 break;
8251
8252 case R_ARM_LDR_PC_G1:
8253 case R_ARM_LDR_SB_G1:
8254 group = 1;
8255 break;
8256
8257 case R_ARM_LDR_PC_G2:
8258 case R_ARM_LDR_SB_G2:
8259 group = 2;
8260 break;
8261
8262 default:
906e58ca 8263 abort ();
4962c51a
MS		 8264 }
8265
8266 /* If REL, extract the addend from the insn. If RELA, it will
8267 have already been fetched for us. */
8268 if (globals->use_rel)
8269 {
8270 int negative = (insn & (1 << 23)) ? 1 : -1;
8271 signed_addend = negative * (insn & 0xfff);
8272 }
8273
8274 /* Compute the value (X) to go in the place. */
8275 if (r_type == R_ARM_LDR_PC_G0
8276 || r_type == R_ARM_LDR_PC_G1
8277 || r_type == R_ARM_LDR_PC_G2)
8278 /* PC relative. */
8279 signed_value = value - pc + signed_addend;
8280 else
8281 /* Section base relative. */
8282 signed_value = value - sb + signed_addend;
8283
8284 /* Calculate the value of the relevant G_{n-1} to obtain
8285 the residual at that stage. */
8286 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8287
8288 /* Check for overflow. */
8289 if (residual >= 0x1000)
8290 {
8291 (*_bfd_error_handler)
8292 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8293 input_bfd, input_section,
8294 (long) rel->r_offset, abs (signed_value), howto->name);
8295 return bfd_reloc_overflow;
8296 }
8297
8298 /* Mask out the value and U bit. */
8299 insn &= 0xff7ff000;
8300
8301 /* Set the U bit if the value to go in the place is non-negative. */
8302 if (signed_value >= 0)
8303 insn |= 1 << 23;
8304
8305 /* Encode the offset. */
8306 insn |= residual;
8307
8308 bfd_put_32 (input_bfd, insn, hit_data);
8309 }
8310 return bfd_reloc_ok;
8311
8312 case R_ARM_LDRS_PC_G0:
8313 case R_ARM_LDRS_PC_G1:
8314 case R_ARM_LDRS_PC_G2:
8315 case R_ARM_LDRS_SB_G0:
8316 case R_ARM_LDRS_SB_G1:
8317 case R_ARM_LDRS_SB_G2:
8318 {
8319 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8320 bfd_vma pc = input_section->output_section->vma
8321 + input_section->output_offset + rel->r_offset;
8322 bfd_vma sb = 0; /* See note above. */
8323 bfd_vma residual;
8324 bfd_signed_vma signed_value;
8325 int group = 0;
8326
8327 /* Determine which groups of bits to calculate. */
8328 switch (r_type)
8329 {
8330 case R_ARM_LDRS_PC_G0:
8331 case R_ARM_LDRS_SB_G0:
8332 group = 0;
8333 break;
8334
8335 case R_ARM_LDRS_PC_G1:
8336 case R_ARM_LDRS_SB_G1:
8337 group = 1;
8338 break;
8339
8340 case R_ARM_LDRS_PC_G2:
8341 case R_ARM_LDRS_SB_G2:
8342 group = 2;
8343 break;
8344
8345 default:
906e58ca 8346 abort ();
4962c51a
MS		 8347 }
8348
8349 /* If REL, extract the addend from the insn. If RELA, it will
8350 have already been fetched for us. */
8351 if (globals->use_rel)
8352 {
8353 int negative = (insn & (1 << 23)) ? 1 : -1;
8354 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8355 }
8356
8357 /* Compute the value (X) to go in the place. */
8358 if (r_type == R_ARM_LDRS_PC_G0
8359 || r_type == R_ARM_LDRS_PC_G1
8360 || r_type == R_ARM_LDRS_PC_G2)
8361 /* PC relative. */
8362 signed_value = value - pc + signed_addend;
8363 else
8364 /* Section base relative. */
8365 signed_value = value - sb + signed_addend;
8366
8367 /* Calculate the value of the relevant G_{n-1} to obtain
8368 the residual at that stage. */
8369 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8370
8371 /* Check for overflow. */
8372 if (residual >= 0x100)
8373 {
8374 (*_bfd_error_handler)
8375 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8376 input_bfd, input_section,
8377 (long) rel->r_offset, abs (signed_value), howto->name);
8378 return bfd_reloc_overflow;
8379 }
8380
8381 /* Mask out the value and U bit. */
8382 insn &= 0xff7ff0f0;
8383
8384 /* Set the U bit if the value to go in the place is non-negative. */
8385 if (signed_value >= 0)
8386 insn |= 1 << 23;
8387
8388 /* Encode the offset. */
8389 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8390
8391 bfd_put_32 (input_bfd, insn, hit_data);
8392 }
8393 return bfd_reloc_ok;
8394
8395 case R_ARM_LDC_PC_G0:
8396 case R_ARM_LDC_PC_G1:
8397 case R_ARM_LDC_PC_G2:
8398 case R_ARM_LDC_SB_G0:
8399 case R_ARM_LDC_SB_G1:
8400 case R_ARM_LDC_SB_G2:
8401 {
8402 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8403 bfd_vma pc = input_section->output_section->vma
8404 + input_section->output_offset + rel->r_offset;
8405 bfd_vma sb = 0; /* See note above. */
8406 bfd_vma residual;
8407 bfd_signed_vma signed_value;
8408 int group = 0;
8409
8410 /* Determine which groups of bits to calculate. */
8411 switch (r_type)
8412 {
8413 case R_ARM_LDC_PC_G0:
8414 case R_ARM_LDC_SB_G0:
8415 group = 0;
8416 break;
8417
8418 case R_ARM_LDC_PC_G1:
8419 case R_ARM_LDC_SB_G1:
8420 group = 1;
8421 break;
8422
8423 case R_ARM_LDC_PC_G2:
8424 case R_ARM_LDC_SB_G2:
8425 group = 2;
8426 break;
8427
8428 default:
906e58ca 8429 abort ();
4962c51a
MS		 8430 }
8431
8432 /* If REL, extract the addend from the insn. If RELA, it will
8433 have already been fetched for us. */
8434 if (globals->use_rel)
8435 {
8436 int negative = (insn & (1 << 23)) ? 1 : -1;
8437 signed_addend = negative * ((insn & 0xff) << 2);
8438 }
8439
8440 /* Compute the value (X) to go in the place. */
8441 if (r_type == R_ARM_LDC_PC_G0
8442 || r_type == R_ARM_LDC_PC_G1
8443 || r_type == R_ARM_LDC_PC_G2)
8444 /* PC relative. */
8445 signed_value = value - pc + signed_addend;
8446 else
8447 /* Section base relative. */
8448 signed_value = value - sb + signed_addend;
8449
8450 /* Calculate the value of the relevant G_{n-1} to obtain
8451 the residual at that stage. */
8452 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8453
8454 /* Check for overflow. (The absolute value to go in the place must be
8455 divisible by four and, after having been divided by four, must
8456 fit in eight bits.) */
8457 if ((residual & 0x3) != 0 || residual >= 0x400)
8458 {
8459 (*_bfd_error_handler)
8460 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8461 input_bfd, input_section,
8462 (long) rel->r_offset, abs (signed_value), howto->name);
8463 return bfd_reloc_overflow;
8464 }
8465
8466 /* Mask out the value and U bit. */
8467 insn &= 0xff7fff00;
8468
8469 /* Set the U bit if the value to go in the place is non-negative. */
8470 if (signed_value >= 0)
8471 insn |= 1 << 23;
8472
8473 /* Encode the offset. */
8474 insn |= residual >> 2;
8475
8476 bfd_put_32 (input_bfd, insn, hit_data);
8477 }
8478 return bfd_reloc_ok;
8479
252b5132
RH		 8480 default:
8481 return bfd_reloc_notsupported;
8482 }
8483}
8484
98c1d4aa
NC		 8485/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8486static void
57e8b36a
NC		 8487arm_add_to_rel (bfd * abfd,
8488 bfd_byte * address,
8489 reloc_howto_type * howto,
8490 bfd_signed_vma increment)
98c1d4aa 8491{
98c1d4aa
NC		 8492 bfd_signed_vma addend;
8493
bd97cb95
DJ		 8494 if (howto->type == R_ARM_THM_CALL
8495 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8496 {
9a5aca8c
AM		 8497 int upper_insn, lower_insn;
8498 int upper, lower;
98c1d4aa 8499
9a5aca8c
AM		 8500 upper_insn = bfd_get_16 (abfd, address);
8501 lower_insn = bfd_get_16 (abfd, address + 2);
8502 upper = upper_insn & 0x7ff;
8503 lower = lower_insn & 0x7ff;
8504
8505 addend = (upper << 12) | (lower << 1);
ddda4409 8506 addend += increment;
9a5aca8c 8507 addend >>= 1;
98c1d4aa 8508
9a5aca8c
AM		 8509 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8510 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8511
dc810e39
AM		 8512 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8513 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8514 }
8515 else
8516 {
8517 bfd_vma contents;
8518
8519 contents = bfd_get_32 (abfd, address);
8520
8521 /* Get the (signed) value from the instruction. */
8522 addend = contents & howto->src_mask;
8523 if (addend & ((howto->src_mask + 1) >> 1))
8524 {
8525 bfd_signed_vma mask;
8526
8527 mask = -1;
8528 mask &= ~ howto->src_mask;
8529 addend |= mask;
8530 }
8531
8532 /* Add in the increment, (which is a byte value). */
8533 switch (howto->type)
8534 {
8535 default:
8536 addend += increment;
8537 break;
8538
8539 case R_ARM_PC24:
c6596c5e 8540 case R_ARM_PLT32:
5b5bb741
PB		 8541 case R_ARM_CALL:
8542 case R_ARM_JUMP24:
9a5aca8c 8543 addend <<= howto->size;
dc810e39 8544 addend += increment;
9a5aca8c
AM		 8545
8546 /* Should we check for overflow here ? */
8547
8548 /* Drop any undesired bits. */
8549 addend >>= howto->rightshift;
8550 break;
8551 }
8552
8553 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8554
8555 bfd_put_32 (abfd, contents, address);
ddda4409 8556 }
98c1d4aa 8557}
252b5132 8558
ba93b8ac
DJ		 8559#define IS_ARM_TLS_RELOC(R_TYPE) \
8560 ((R_TYPE) == R_ARM_TLS_GD32 \
8561 || (R_TYPE) == R_ARM_TLS_LDO32 \
8562 || (R_TYPE) == R_ARM_TLS_LDM32 \
8563 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8564 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8565 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8566 || (R_TYPE) == R_ARM_TLS_LE32 \
8567 || (R_TYPE) == R_ARM_TLS_IE32)
8568
252b5132 8569/* Relocate an ARM ELF section. */
906e58ca 8570
b34976b6 8571static bfd_boolean
57e8b36a
NC		 8572elf32_arm_relocate_section (bfd * output_bfd,
8573 struct bfd_link_info * info,
8574 bfd * input_bfd,
8575 asection * input_section,
8576 bfd_byte * contents,
8577 Elf_Internal_Rela * relocs,
8578 Elf_Internal_Sym * local_syms,
8579 asection ** local_sections)
252b5132 8580{
b34976b6
AM		 8581 Elf_Internal_Shdr *symtab_hdr;
8582 struct elf_link_hash_entry **sym_hashes;
8583 Elf_Internal_Rela *rel;
8584 Elf_Internal_Rela *relend;
8585 const char *name;
b32d3aa2 8586 struct elf32_arm_link_hash_table * globals;
252b5132 8587
4e7fd91e 8588 globals = elf32_arm_hash_table (info);
b491616a 8589
0ffa91dd 8590 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8591 sym_hashes = elf_sym_hashes (input_bfd);
8592
8593 rel = relocs;
8594 relend = relocs + input_section->reloc_count;
8595 for (; rel < relend; rel++)
8596 {
ba96a88f
NC		 8597 int r_type;
8598 reloc_howto_type * howto;
8599 unsigned long r_symndx;
8600 Elf_Internal_Sym * sym;
8601 asection * sec;
252b5132 8602 struct elf_link_hash_entry * h;
ba96a88f
NC		 8603 bfd_vma relocation;
8604 bfd_reloc_status_type r;
8605 arelent bfd_reloc;
ba93b8ac 8606 char sym_type;
0945cdfd 8607 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8608 char *error_message = NULL;
f21f3fe0 8609
252b5132 8610 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8611 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8612 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8613
ba96a88f
NC		 8614 if ( r_type == R_ARM_GNU_VTENTRY
8615 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8616 continue;
8617
b32d3aa2 8618 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8619 howto = bfd_reloc.howto;
252b5132 8620
252b5132
RH		 8621 h = NULL;
8622 sym = NULL;
8623 sec = NULL;
9b485d32 8624
252b5132
RH		 8625 if (r_symndx < symtab_hdr->sh_info)
8626 {
8627 sym = local_syms + r_symndx;
ba93b8ac 8628 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8629 sec = local_sections[r_symndx];
4e7fd91e 8630 if (globals->use_rel)
f8df10f4 8631 {
4e7fd91e
PB		 8632 relocation = (sec->output_section->vma
8633 + sec->output_offset
8634 + sym->st_value);
ab96bf03
AM		 8635 if (!info->relocatable
8636 && (sec->flags & SEC_MERGE)
8637 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8638 {
4e7fd91e
PB		 8639 asection *msec;
8640 bfd_vma addend, value;
8641
39623e12 8642 switch (r_type)
4e7fd91e 8643 {
39623e12
PB		 8644 case R_ARM_MOVW_ABS_NC:
8645 case R_ARM_MOVT_ABS:
8646 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8647 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8648 addend = (addend ^ 0x8000) - 0x8000;
8649 break;
f8df10f4 8650
39623e12
PB		 8651 case R_ARM_THM_MOVW_ABS_NC:
8652 case R_ARM_THM_MOVT_ABS:
8653 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8654 << 16;
8655 value |= bfd_get_16 (input_bfd,
8656 contents + rel->r_offset + 2);
8657 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8658 | ((value & 0x04000000) >> 15);
8659 addend = (addend ^ 0x8000) - 0x8000;
8660 break;
f8df10f4 8661
39623e12
PB		 8662 default:
8663 if (howto->rightshift
8664 || (howto->src_mask & (howto->src_mask + 1)))
8665 {
8666 (*_bfd_error_handler)
8667 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8668 input_bfd, input_section,
8669 (long) rel->r_offset, howto->name);
8670 return FALSE;
8671 }
8672
8673 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8674
8675 /* Get the (signed) value from the instruction. */
8676 addend = value & howto->src_mask;
8677 if (addend & ((howto->src_mask + 1) >> 1))
8678 {
8679 bfd_signed_vma mask;
8680
8681 mask = -1;
8682 mask &= ~ howto->src_mask;
8683 addend |= mask;
8684 }
8685 break;
4e7fd91e 8686 }
39623e12 8687
4e7fd91e
PB		 8688 msec = sec;
8689 addend =
8690 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8691 - relocation;
8692 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8693
8694 /* Cases here must match those in the preceeding
8695 switch statement. */
8696 switch (r_type)
8697 {
8698 case R_ARM_MOVW_ABS_NC:
8699 case R_ARM_MOVT_ABS:
8700 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8701 | (addend & 0xfff);
8702 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8703 break;
8704
8705 case R_ARM_THM_MOVW_ABS_NC:
8706 case R_ARM_THM_MOVT_ABS:
8707 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8708 | (addend & 0xff) | ((addend & 0x0800) << 15);
8709 bfd_put_16 (input_bfd, value >> 16,
8710 contents + rel->r_offset);
8711 bfd_put_16 (input_bfd, value,
8712 contents + rel->r_offset + 2);
8713 break;
8714
8715 default:
8716 value = (value & ~ howto->dst_mask)
8717 | (addend & howto->dst_mask);
8718 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8719 break;
8720 }
f8df10f4 8721 }
f8df10f4 8722 }
4e7fd91e
PB		 8723 else
8724 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8725 }
8726 else
8727 {
560e09e9 8728 bfd_boolean warned;
560e09e9 8729
b2a8e766
AM		 8730 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8731 r_symndx, symtab_hdr, sym_hashes,
8732 h, sec, relocation,
8733 unresolved_reloc, warned);
ba93b8ac
DJ		 8734
8735 sym_type = h->type;
252b5132
RH		 8736 }
8737
ab96bf03
AM		 8738 if (sec != NULL && elf_discarded_section (sec))
8739 {
8740 /* For relocs against symbols from removed linkonce sections,
8741 or sections discarded by a linker script, we just want the
8742 section contents zeroed. Avoid any special processing. */
8743 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
8744 rel->r_info = 0;
8745 rel->r_addend = 0;
8746 continue;
8747 }
8748
8749 if (info->relocatable)
8750 {
8751 /* This is a relocatable link. We don't have to change
8752 anything, unless the reloc is against a section symbol,
8753 in which case we have to adjust according to where the
8754 section symbol winds up in the output section. */
8755 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8756 {
8757 if (globals->use_rel)
8758 arm_add_to_rel (input_bfd, contents + rel->r_offset,
8759 howto, (bfd_signed_vma) sec->output_offset);
8760 else
8761 rel->r_addend += sec->output_offset;
8762 }
8763 continue;
8764 }
8765
252b5132
RH		 8766 if (h != NULL)
8767 name = h->root.root.string;
8768 else
8769 {
8770 name = (bfd_elf_string_from_elf_section
8771 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8772 if (name == NULL || *name == '\0')
8773 name = bfd_section_name (input_bfd, sec);
8774 }
f21f3fe0 8775
ba93b8ac
DJ		 8776 if (r_symndx != 0
8777 && r_type != R_ARM_NONE
8778 && (h == NULL
8779 || h->root.type == bfd_link_hash_defined
8780 || h->root.type == bfd_link_hash_defweak)
8781 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
8782 {
8783 (*_bfd_error_handler)
8784 ((sym_type == STT_TLS
8785 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
8786 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
8787 input_bfd,
8788 input_section,
8789 (long) rel->r_offset,
8790 howto->name,
8791 name);
8792 }
8793
252b5132
RH		 8794 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
8795 input_section, contents, rel,
8796 relocation, info, sec, name,
8797 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 8798 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 8799 &unresolved_reloc, &error_message);
0945cdfd
DJ		 8800
8801 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8802 because such sections are not SEC_ALLOC and thus ld.so will
8803 not process them. */
8804 if (unresolved_reloc
8805 && !((input_section->flags & SEC_DEBUGGING) != 0
8806 && h->def_dynamic))
8807 {
8808 (*_bfd_error_handler)
843fe662
L		 8809 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
8810 input_bfd,
8811 input_section,
8812 (long) rel->r_offset,
8813 howto->name,
8814 h->root.root.string);
0945cdfd
DJ		 8815 return FALSE;
8816 }
252b5132
RH		 8817
8818 if (r != bfd_reloc_ok)
8819 {
252b5132
RH		 8820 switch (r)
8821 {
8822 case bfd_reloc_overflow:
cf919dfd
PB		 8823 /* If the overflowing reloc was to an undefined symbol,
8824 we have already printed one error message and there
8825 is no point complaining again. */
8826 if ((! h ||
8827 h->root.type != bfd_link_hash_undefined)
8828 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 8829 (info, (h ? &h->root : NULL), name, howto->name,
8830 (bfd_vma) 0, input_bfd, input_section,
8831 rel->r_offset))))
b34976b6 8832 return FALSE;
252b5132
RH		 8833 break;
8834
8835 case bfd_reloc_undefined:
8836 if (!((*info->callbacks->undefined_symbol)
8837 (info, name, input_bfd, input_section,
b34976b6
AM		 8838 rel->r_offset, TRUE)))
8839 return FALSE;
252b5132
RH		 8840 break;
8841
8842 case bfd_reloc_outofrange:
f2a9dd69 8843 error_message = _("out of range");
252b5132
RH		 8844 goto common_error;
8845
8846 case bfd_reloc_notsupported:
f2a9dd69 8847 error_message = _("unsupported relocation");
252b5132
RH		 8848 goto common_error;
8849
8850 case bfd_reloc_dangerous:
f2a9dd69 8851 /* error_message should already be set. */
252b5132
RH		 8852 goto common_error;
8853
8854 default:
f2a9dd69 8855 error_message = _("unknown error");
8029a119 8856 /* Fall through. */
252b5132
RH		 8857
8858 common_error:
f2a9dd69
DJ		 8859 BFD_ASSERT (error_message != NULL);
8860 if (!((*info->callbacks->reloc_dangerous)
8861 (info, error_message, input_bfd, input_section,
252b5132 8862 rel->r_offset)))
b34976b6 8863 return FALSE;
252b5132
RH		 8864 break;
8865 }
8866 }
8867 }
8868
b34976b6 8869 return TRUE;
252b5132
RH		 8870}
8871
2468f9c9
PB		 8872/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8873 adds the edit to the start of the list. (The list must be built in order of
8874 ascending INDEX: the function's callers are primarily responsible for
8875 maintaining that condition). */
8876
8877static void
8878add_unwind_table_edit (arm_unwind_table_edit **head,
8879 arm_unwind_table_edit **tail,
8880 arm_unwind_edit_type type,
8881 asection *linked_section,
8882 unsigned int index)
8883{
8884 arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
8885
8886 new_edit->type = type;
8887 new_edit->linked_section = linked_section;
8888 new_edit->index = index;
8889
8890 if (index > 0)
8891 {
8892 new_edit->next = NULL;
8893
8894 if (*tail)
8895 (*tail)->next = new_edit;
8896
8897 (*tail) = new_edit;
8898
8899 if (!*head)
8900 (*head) = new_edit;
8901 }
8902 else
8903 {
8904 new_edit->next = *head;
8905
8906 if (!*tail)
8907 *tail = new_edit;
8908
8909 *head = new_edit;
8910 }
8911}
8912
8913static _arm_elf_section_data *get_arm_elf_section_data (asection *);
8914
8915/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
8916static void
8917adjust_exidx_size(asection *exidx_sec, int adjust)
8918{
8919 asection *out_sec;
8920
8921 if (!exidx_sec->rawsize)
8922 exidx_sec->rawsize = exidx_sec->size;
8923
8924 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
8925 out_sec = exidx_sec->output_section;
8926 /* Adjust size of output section. */
8927 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
8928}
8929
8930/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
8931static void
8932insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
8933{
8934 struct _arm_elf_section_data *exidx_arm_data;
8935
8936 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
8937 add_unwind_table_edit (
8938 &exidx_arm_data->u.exidx.unwind_edit_list,
8939 &exidx_arm_data->u.exidx.unwind_edit_tail,
8940 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
8941
8942 adjust_exidx_size(exidx_sec, 8);
8943}
8944
8945/* Scan .ARM.exidx tables, and create a list describing edits which should be
8946 made to those tables, such that:
8947
8948 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
8949 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
8950 codes which have been inlined into the index).
8951
8952 The edits are applied when the tables are written
8953 (in elf32_arm_write_section).
8954*/
8955
8956bfd_boolean
8957elf32_arm_fix_exidx_coverage (asection **text_section_order,
8958 unsigned int num_text_sections,
8959 struct bfd_link_info *info)
8960{
8961 bfd *inp;
8962 unsigned int last_second_word = 0, i;
8963 asection *last_exidx_sec = NULL;
8964 asection *last_text_sec = NULL;
8965 int last_unwind_type = -1;
8966
8967 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
8968 text sections. */
8969 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
8970 {
8971 asection *sec;
8972
8973 for (sec = inp->sections; sec != NULL; sec = sec->next)
8974 {
8975 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
8976 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
8977
dec9d5df 8978 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 8979 continue;
8980
8981 if (elf_sec->linked_to)
8982 {
8983 Elf_Internal_Shdr *linked_hdr
8984 = &elf_section_data (elf_sec->linked_to)->this_hdr;
8985 struct _arm_elf_section_data *linked_sec_arm_data
8986 = get_arm_elf_section_data (linked_hdr->bfd_section);
8987
8988 if (linked_sec_arm_data == NULL)
8989 continue;
8990
8991 /* Link this .ARM.exidx section back from the text section it
8992 describes. */
8993 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
8994 }
8995 }
8996 }
8997
8998 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
8999 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
9000 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
9001 */
9002
9003 for (i = 0; i < num_text_sections; i++)
9004 {
9005 asection *sec = text_section_order[i];
9006 asection *exidx_sec;
9007 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9008 struct _arm_elf_section_data *exidx_arm_data;
9009 bfd_byte *contents = NULL;
9010 int deleted_exidx_bytes = 0;
9011 bfd_vma j;
9012 arm_unwind_table_edit *unwind_edit_head = NULL;
9013 arm_unwind_table_edit *unwind_edit_tail = NULL;
9014 Elf_Internal_Shdr *hdr;
9015 bfd *ibfd;
9016
9017 if (arm_data == NULL)
9018 continue;
9019
9020 exidx_sec = arm_data->u.text.arm_exidx_sec;
9021 if (exidx_sec == NULL)
9022 {
9023 /* Section has no unwind data. */
9024 if (last_unwind_type == 0 || !last_exidx_sec)
9025 continue;
9026
9027 /* Ignore zero sized sections. */
9028 if (sec->size == 0)
9029 continue;
9030
9031 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9032 last_unwind_type = 0;
9033 continue;
9034 }
9035
22a8f80e
PB		 9036 /* Skip /DISCARD/ sections. */
9037 if (bfd_is_abs_section (exidx_sec->output_section))
9038 continue;
9039
2468f9c9
PB		 9040 hdr = &elf_section_data (exidx_sec)->this_hdr;
9041 if (hdr->sh_type != SHT_ARM_EXIDX)
9042 continue;
9043
9044 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9045 if (exidx_arm_data == NULL)
9046 continue;
9047
9048 ibfd = exidx_sec->owner;
9049
9050 if (hdr->contents != NULL)
9051 contents = hdr->contents;
9052 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9053 /* An error? */
9054 continue;
9055
9056 for (j = 0; j < hdr->sh_size; j += 8)
9057 {
9058 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9059 int unwind_type;
9060 int elide = 0;
9061
9062 /* An EXIDX_CANTUNWIND entry. */
9063 if (second_word == 1)
9064 {
9065 if (last_unwind_type == 0)
9066 elide = 1;
9067 unwind_type = 0;
9068 }
9069 /* Inlined unwinding data. Merge if equal to previous. */
9070 else if ((second_word & 0x80000000) != 0)
9071 {
9072 if (last_second_word == second_word && last_unwind_type == 1)
9073 elide = 1;
9074 unwind_type = 1;
9075 last_second_word = second_word;
9076 }
9077 /* Normal table entry. In theory we could merge these too,
9078 but duplicate entries are likely to be much less common. */
9079 else
9080 unwind_type = 2;
9081
9082 if (elide)
9083 {
9084 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9085 DELETE_EXIDX_ENTRY, NULL, j / 8);
9086
9087 deleted_exidx_bytes += 8;
9088 }
9089
9090 last_unwind_type = unwind_type;
9091 }
9092
9093 /* Free contents if we allocated it ourselves. */
9094 if (contents != hdr->contents)
9095 free (contents);
9096
9097 /* Record edits to be applied later (in elf32_arm_write_section). */
9098 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9099 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9100
9101 if (deleted_exidx_bytes > 0)
9102 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9103
9104 last_exidx_sec = exidx_sec;
9105 last_text_sec = sec;
9106 }
9107
9108 /* Add terminating CANTUNWIND entry. */
9109 if (last_exidx_sec && last_unwind_type != 0)
9110 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9111
9112 return TRUE;
9113}
9114
3e6b1042
DJ		 9115static bfd_boolean
9116elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9117 bfd *ibfd, const char *name)
9118{
9119 asection *sec, *osec;
9120
9121 sec = bfd_get_section_by_name (ibfd, name);
9122 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9123 return TRUE;
9124
9125 osec = sec->output_section;
9126 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9127 return TRUE;
9128
9129 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9130 sec->output_offset, sec->size))
9131 return FALSE;
9132
9133 return TRUE;
9134}
9135
9136static bfd_boolean
9137elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9138{
9139 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
9140
9141 /* Invoke the regular ELF backend linker to do all the work. */
9142 if (!bfd_elf_final_link (abfd, info))
9143 return FALSE;
9144
9145 /* Write out any glue sections now that we have created all the
9146 stubs. */
9147 if (globals->bfd_of_glue_owner != NULL)
9148 {
9149 if (! elf32_arm_output_glue_section (info, abfd,
9150 globals->bfd_of_glue_owner,
9151 ARM2THUMB_GLUE_SECTION_NAME))
9152 return FALSE;
9153
9154 if (! elf32_arm_output_glue_section (info, abfd,
9155 globals->bfd_of_glue_owner,
9156 THUMB2ARM_GLUE_SECTION_NAME))
9157 return FALSE;
9158
9159 if (! elf32_arm_output_glue_section (info, abfd,
9160 globals->bfd_of_glue_owner,
9161 VFP11_ERRATUM_VENEER_SECTION_NAME))
9162 return FALSE;
9163
9164 if (! elf32_arm_output_glue_section (info, abfd,
9165 globals->bfd_of_glue_owner,
9166 ARM_BX_GLUE_SECTION_NAME))
9167 return FALSE;
9168 }
9169
9170 return TRUE;
9171}
9172
c178919b
NC		 9173/* Set the right machine number. */
9174
9175static bfd_boolean
57e8b36a 9176elf32_arm_object_p (bfd *abfd)
c178919b 9177{
5a6c6817 9178 unsigned int mach;
57e8b36a 9179
5a6c6817 9180 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9181
5a6c6817
NC		 9182 if (mach != bfd_mach_arm_unknown)
9183 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9184
9185 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9186 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9187
e16bb312 9188 else
5a6c6817 9189 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9190
9191 return TRUE;
9192}
9193
fc830a83 9194/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9195
b34976b6 9196static bfd_boolean
57e8b36a 9197elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9198{
9199 if (elf_flags_init (abfd)
9200 && elf_elfheader (abfd)->e_flags != flags)
9201 {
fc830a83
NC		 9202 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9203 {
fd2ec330 9204 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9205 (*_bfd_error_handler)
9206 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9207 abfd);
fc830a83 9208 else
d003868e
AM		 9209 _bfd_error_handler
9210 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9211 abfd);
fc830a83 9212 }
252b5132
RH		 9213 }
9214 else
9215 {
9216 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9217 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9218 }
9219
b34976b6 9220 return TRUE;
252b5132
RH		 9221}
9222
fc830a83 9223/* Copy backend specific data from one object module to another. */
9b485d32 9224
b34976b6 9225static bfd_boolean
57e8b36a 9226elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9227{
9228 flagword in_flags;
9229 flagword out_flags;
9230
0ffa91dd 9231 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9232 return TRUE;
252b5132 9233
fc830a83 9234 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9235 out_flags = elf_elfheader (obfd)->e_flags;
9236
fc830a83
NC		 9237 if (elf_flags_init (obfd)
9238 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9239 && in_flags != out_flags)
252b5132 9240 {
252b5132 9241 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9242 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9243 return FALSE;
252b5132
RH		 9244
9245 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9246 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9247 return FALSE;
252b5132
RH		 9248
9249 /* If the src and dest have different interworking flags
9250 then turn off the interworking bit. */
fd2ec330 9251 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9252 {
fd2ec330 9253 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9254 _bfd_error_handler
9255 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9256 obfd, ibfd);
252b5132 9257
fd2ec330 9258 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9259 }
1006ba19
PB		 9260
9261 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9262 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9263 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9264 }
9265
9266 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9267 elf_flags_init (obfd) = TRUE;
252b5132 9268
94a3258f
PB		 9269 /* Also copy the EI_OSABI field. */
9270 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9271 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9272
104d59d1
JM		 9273 /* Copy object attributes. */
9274 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9275
9276 return TRUE;
9277}
9278
9279/* Values for Tag_ABI_PCS_R9_use. */
9280enum
9281{
9282 AEABI_R9_V6,
9283 AEABI_R9_SB,
9284 AEABI_R9_TLS,
9285 AEABI_R9_unused
9286};
9287
9288/* Values for Tag_ABI_PCS_RW_data. */
9289enum
9290{
9291 AEABI_PCS_RW_data_absolute,
9292 AEABI_PCS_RW_data_PCrel,
9293 AEABI_PCS_RW_data_SBrel,
9294 AEABI_PCS_RW_data_unused
9295};
9296
9297/* Values for Tag_ABI_enum_size. */
9298enum
9299{
9300 AEABI_enum_unused,
9301 AEABI_enum_short,
9302 AEABI_enum_wide,
9303 AEABI_enum_forced_wide
9304};
9305
104d59d1
JM		 9306/* Determine whether an object attribute tag takes an integer, a
9307 string or both. */
906e58ca 9308
104d59d1
JM		 9309static int
9310elf32_arm_obj_attrs_arg_type (int tag)
9311{
9312 if (tag == Tag_compatibility)
3483fe2e 9313 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9314 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9315 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9316 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9317 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9318 else if (tag < 32)
3483fe2e 9319 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9320 else
3483fe2e 9321 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9322}
9323
5aa6ff7c
AS		 9324/* The ABI defines that Tag_conformance should be emitted first, and that
9325 Tag_nodefaults should be second (if either is defined). This sets those
9326 two positions, and bumps up the position of all the remaining tags to
9327 compensate. */
9328static int
9329elf32_arm_obj_attrs_order (int num)
9330{
9331 if (num == 4)
9332 return Tag_conformance;
9333 if (num == 5)
9334 return Tag_nodefaults;
9335 if ((num - 2) < Tag_nodefaults)
9336 return num - 2;
9337 if ((num - 1) < Tag_conformance)
9338 return num - 1;
9339 return num;
9340}
9341
91e22acd
AS		 9342/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9343 Returns -1 if no architecture could be read. */
9344
9345static int
9346get_secondary_compatible_arch (bfd *abfd)
9347{
9348 obj_attribute *attr =
9349 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9350
9351 /* Note: the tag and its argument below are uleb128 values, though
9352 currently-defined values fit in one byte for each. */
9353 if (attr->s
9354 && attr->s[0] == Tag_CPU_arch
9355 && (attr->s[1] & 128) != 128
9356 && attr->s[2] == 0)
9357 return attr->s[1];
9358
9359 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9360 return -1;
9361}
9362
9363/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9364 The tag is removed if ARCH is -1. */
9365
8e79c3df 9366static void
91e22acd 9367set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9368{
91e22acd
AS		 9369 obj_attribute *attr =
9370 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9371
91e22acd
AS		 9372 if (arch == -1)
9373 {
9374 attr->s = NULL;
9375 return;
8e79c3df 9376 }
91e22acd
AS		 9377
9378 /* Note: the tag and its argument below are uleb128 values, though
9379 currently-defined values fit in one byte for each. */
9380 if (!attr->s)
9381 attr->s = bfd_alloc (abfd, 3);
9382 attr->s[0] = Tag_CPU_arch;
9383 attr->s[1] = arch;
9384 attr->s[2] = '\0';
8e79c3df
CM		 9385}
9386
91e22acd
AS		 9387/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9388 into account. */
9389
9390static int
9391tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9392 int newtag, int secondary_compat)
8e79c3df 9393{
91e22acd
AS		 9394#define T(X) TAG_CPU_ARCH_##X
9395 int tagl, tagh, result;
9396 const int v6t2[] =
9397 {
9398 T(V6T2), /* PRE_V4. */
9399 T(V6T2), /* V4. */
9400 T(V6T2), /* V4T. */
9401 T(V6T2), /* V5T. */
9402 T(V6T2), /* V5TE. */
9403 T(V6T2), /* V5TEJ. */
9404 T(V6T2), /* V6. */
9405 T(V7), /* V6KZ. */
9406 T(V6T2) /* V6T2. */
9407 };
9408 const int v6k[] =
9409 {
9410 T(V6K), /* PRE_V4. */
9411 T(V6K), /* V4. */
9412 T(V6K), /* V4T. */
9413 T(V6K), /* V5T. */
9414 T(V6K), /* V5TE. */
9415 T(V6K), /* V5TEJ. */
9416 T(V6K), /* V6. */
9417 T(V6KZ), /* V6KZ. */
9418 T(V7), /* V6T2. */
9419 T(V6K) /* V6K. */
9420 };
9421 const int v7[] =
9422 {
9423 T(V7), /* PRE_V4. */
9424 T(V7), /* V4. */
9425 T(V7), /* V4T. */
9426 T(V7), /* V5T. */
9427 T(V7), /* V5TE. */
9428 T(V7), /* V5TEJ. */
9429 T(V7), /* V6. */
9430 T(V7), /* V6KZ. */
9431 T(V7), /* V6T2. */
9432 T(V7), /* V6K. */
9433 T(V7) /* V7. */
9434 };
9435 const int v6_m[] =
9436 {
9437 -1, /* PRE_V4. */
9438 -1, /* V4. */
9439 T(V6K), /* V4T. */
9440 T(V6K), /* V5T. */
9441 T(V6K), /* V5TE. */
9442 T(V6K), /* V5TEJ. */
9443 T(V6K), /* V6. */
9444 T(V6KZ), /* V6KZ. */
9445 T(V7), /* V6T2. */
9446 T(V6K), /* V6K. */
9447 T(V7), /* V7. */
9448 T(V6_M) /* V6_M. */
9449 };
9450 const int v6s_m[] =
9451 {
9452 -1, /* PRE_V4. */
9453 -1, /* V4. */
9454 T(V6K), /* V4T. */
9455 T(V6K), /* V5T. */
9456 T(V6K), /* V5TE. */
9457 T(V6K), /* V5TEJ. */
9458 T(V6K), /* V6. */
9459 T(V6KZ), /* V6KZ. */
9460 T(V7), /* V6T2. */
9461 T(V6K), /* V6K. */
9462 T(V7), /* V7. */
9463 T(V6S_M), /* V6_M. */
9464 T(V6S_M) /* V6S_M. */
9465 };
9466 const int v4t_plus_v6_m[] =
9467 {
9468 -1, /* PRE_V4. */
9469 -1, /* V4. */
9470 T(V4T), /* V4T. */
9471 T(V5T), /* V5T. */
9472 T(V5TE), /* V5TE. */
9473 T(V5TEJ), /* V5TEJ. */
9474 T(V6), /* V6. */
9475 T(V6KZ), /* V6KZ. */
9476 T(V6T2), /* V6T2. */
9477 T(V6K), /* V6K. */
9478 T(V7), /* V7. */
9479 T(V6_M), /* V6_M. */
9480 T(V6S_M), /* V6S_M. */
9481 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9482 };
9483 const int *comb[] =
9484 {
9485 v6t2,
9486 v6k,
9487 v7,
9488 v6_m,
9489 v6s_m,
9490 /* Pseudo-architecture. */
9491 v4t_plus_v6_m
9492 };
9493
9494 /* Check we've not got a higher architecture than we know about. */
9495
9496 if (oldtag >= MAX_TAG_CPU_ARCH || newtag >= MAX_TAG_CPU_ARCH)
9497 {
3895f852 9498 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9499 return -1;
9500 }
9501
9502 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9503
9504 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9505 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9506 oldtag = T(V4T_PLUS_V6_M);
9507
9508 /* And override the new tag if we have a Tag_also_compatible_with on the
9509 input. */
9510
9511 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9512 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9513 newtag = T(V4T_PLUS_V6_M);
9514
9515 tagl = (oldtag < newtag) ? oldtag : newtag;
9516 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9517
9518 /* Architectures before V6KZ add features monotonically. */
9519 if (tagh <= TAG_CPU_ARCH_V6KZ)
9520 return result;
9521
9522 result = comb[tagh - T(V6T2)][tagl];
9523
9524 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9525 as the canonical version. */
9526 if (result == T(V4T_PLUS_V6_M))
9527 {
9528 result = T(V4T);
9529 *secondary_compat_out = T(V6_M);
9530 }
9531 else
9532 *secondary_compat_out = -1;
9533
9534 if (result == -1)
9535 {
3895f852 9536 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9537 ibfd, oldtag, newtag);
9538 return -1;
9539 }
9540
9541 return result;
9542#undef T
8e79c3df
CM		 9543}
9544
ee065d83
PB		 9545/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9546 are conflicting attributes. */
906e58ca 9547
ee065d83
PB		 9548static bfd_boolean
9549elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9550{
104d59d1
JM		 9551 obj_attribute *in_attr;
9552 obj_attribute *out_attr;
9553 obj_attribute_list *in_list;
8e79c3df 9554 obj_attribute_list *out_list;
91e22acd 9555 obj_attribute_list **out_listp;
ee065d83
PB		 9556 /* Some tags have 0 = don't care, 1 = strong requirement,
9557 2 = weak requirement. */
91e22acd 9558 static const int order_021[3] = {0, 2, 1};
b1cc4aeb
PB		 9559 /* For use with Tag_VFP_arch. */
9560 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83 9561 int i;
91e22acd 9562 bfd_boolean result = TRUE;
ee065d83 9563
3e6b1042
DJ		 9564 /* Skip the linker stubs file. This preserves previous behavior
9565 of accepting unknown attributes in the first input file - but
9566 is that a bug? */
9567 if (ibfd->flags & BFD_LINKER_CREATED)
9568 return TRUE;
9569
104d59d1 9570 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9571 {
9572 /* This is the first object. Copy the attributes. */
104d59d1 9573 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 9574
9575 /* Use the Tag_null value to indicate the attributes have been
9576 initialized. */
104d59d1 9577 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 9578
ee065d83
PB		 9579 return TRUE;
9580 }
9581
104d59d1
JM		 9582 in_attr = elf_known_obj_attributes_proc (ibfd);
9583 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9584 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9585 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9586 {
8e79c3df 9587 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9588 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9589 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9590 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9591 {
9592 _bfd_error_handler
3895f852 9593 (_("error: %B uses VFP register arguments, %B does not"),
ee065d83 9594 ibfd, obfd);
91e22acd 9595 result = FALSE;
ee065d83
PB		 9596 }
9597 }
9598
104d59d1 9599 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9600 {
9601 /* Merge this attribute with existing attributes. */
9602 switch (i)
9603 {
9604 case Tag_CPU_raw_name:
9605 case Tag_CPU_name:
91e22acd 9606 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9607 break;
9608
9609 case Tag_ABI_optimization_goals:
9610 case Tag_ABI_FP_optimization_goals:
9611 /* Use the first value seen. */
9612 break;
9613
9614 case Tag_CPU_arch:
91e22acd
AS		 9615 {
9616 int secondary_compat = -1, secondary_compat_out = -1;
9617 unsigned int saved_out_attr = out_attr[i].i;
9618 static const char *name_table[] = {
9619 /* These aren't real CPU names, but we can't guess
9620 that from the architecture version alone. */
9621 "Pre v4",
9622 "ARM v4",
9623 "ARM v4T",
9624 "ARM v5T",
9625 "ARM v5TE",
9626 "ARM v5TEJ",
9627 "ARM v6",
9628 "ARM v6KZ",
9629 "ARM v6T2",
9630 "ARM v6K",
9631 "ARM v7",
9632 "ARM v6-M",
9633 "ARM v6S-M"
9634 };
9635
9636 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9637 secondary_compat = get_secondary_compatible_arch (ibfd);
9638 secondary_compat_out = get_secondary_compatible_arch (obfd);
9639 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9640 &secondary_compat_out,
9641 in_attr[i].i,
9642 secondary_compat);
9643 set_secondary_compatible_arch (obfd, secondary_compat_out);
9644
9645 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9646 if (out_attr[i].i == saved_out_attr)
9647 ; /* Leave the names alone. */
9648 else if (out_attr[i].i == in_attr[i].i)
9649 {
9650 /* The output architecture has been changed to match the
9651 input architecture. Use the input names. */
9652 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9653 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9654 : NULL;
9655 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9656 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9657 : NULL;
9658 }
9659 else
9660 {
9661 out_attr[Tag_CPU_name].s = NULL;
9662 out_attr[Tag_CPU_raw_name].s = NULL;
9663 }
9664
9665 /* If we still don't have a value for Tag_CPU_name,
9666 make one up now. Tag_CPU_raw_name remains blank. */
9667 if (out_attr[Tag_CPU_name].s == NULL
9668 && out_attr[i].i < ARRAY_SIZE (name_table))
9669 out_attr[Tag_CPU_name].s =
9670 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
9671 }
9672 break;
9673
ee065d83
PB		 9674 case Tag_ARM_ISA_use:
9675 case Tag_THUMB_ISA_use:
ee065d83 9676 case Tag_WMMX_arch:
91e22acd
AS		 9677 case Tag_Advanced_SIMD_arch:
9678 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 9679 case Tag_ABI_FP_rounding:
ee065d83
PB		 9680 case Tag_ABI_FP_exceptions:
9681 case Tag_ABI_FP_user_exceptions:
9682 case Tag_ABI_FP_number_model:
91e22acd
AS		 9683 case Tag_VFP_HP_extension:
9684 case Tag_CPU_unaligned_access:
9685 case Tag_T2EE_use:
9686 case Tag_Virtualization_use:
9687 case Tag_MPextension_use:
ee065d83
PB		 9688 /* Use the largest value specified. */
9689 if (in_attr[i].i > out_attr[i].i)
9690 out_attr[i].i = in_attr[i].i;
9691 break;
9692
91e22acd
AS		 9693 case Tag_ABI_align8_preserved:
9694 case Tag_ABI_PCS_RO_data:
9695 /* Use the smallest value specified. */
9696 if (in_attr[i].i < out_attr[i].i)
9697 out_attr[i].i = in_attr[i].i;
9698 break;
9699
9700 case Tag_ABI_align8_needed:
9701 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
9702 && (in_attr[Tag_ABI_align8_preserved].i == 0
9703 || out_attr[Tag_ABI_align8_preserved].i == 0))
ee065d83 9704 {
91e22acd
AS		 9705 /* This error message should be enabled once all non-conformant
9706 binaries in the toolchain have had the attributes set
9707 properly.
ee065d83 9708 _bfd_error_handler
3895f852 9709 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 9710 obfd, ibfd);
9711 result = FALSE; */
ee065d83 9712 }
91e22acd
AS		 9713 /* Fall through. */
9714 case Tag_ABI_FP_denormal:
9715 case Tag_ABI_PCS_GOT_use:
9716 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9717 value if greater than 2 (for future-proofing). */
9718 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
9719 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
9720 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 9721 out_attr[i].i = in_attr[i].i;
9722 break;
91e22acd
AS		 9723
9724
9725 case Tag_CPU_arch_profile:
9726 if (out_attr[i].i != in_attr[i].i)
9727 {
9728 /* 0 will merge with anything.
9729 'A' and 'S' merge to 'A'.
9730 'R' and 'S' merge to 'R'.
9731 'M' and 'A|R|S' is an error. */
9732 if (out_attr[i].i == 0
9733 || (out_attr[i].i == 'S'
9734 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
9735 out_attr[i].i = in_attr[i].i;
9736 else if (in_attr[i].i == 0
9737 || (in_attr[i].i == 'S'
9738 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
9739 ; /* Do nothing. */
9740 else
9741 {
9742 _bfd_error_handler
3895f852 9743 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 9744 ibfd,
9745 in_attr[i].i ? in_attr[i].i : '0',
9746 out_attr[i].i ? out_attr[i].i : '0');
9747 result = FALSE;
9748 }
9749 }
9750 break;
b1cc4aeb 9751 case Tag_VFP_arch:
91e22acd
AS		 9752 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9753 largest value if greater than 4 (for future-proofing). */
9754 if ((in_attr[i].i > 4 && in_attr[i].i > out_attr[i].i)
9755 || (in_attr[i].i <= 4 && out_attr[i].i <= 4
9756 && order_01243[in_attr[i].i] > order_01243[out_attr[i].i]))
b1cc4aeb
PB		 9757 out_attr[i].i = in_attr[i].i;
9758 break;
ee065d83
PB		 9759 case Tag_PCS_config:
9760 if (out_attr[i].i == 0)
9761 out_attr[i].i = in_attr[i].i;
9762 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
9763 {
9764 /* It's sometimes ok to mix different configs, so this is only
9765 a warning. */
9766 _bfd_error_handler
9767 (_("Warning: %B: Conflicting platform configuration"), ibfd);
9768 }
9769 break;
9770 case Tag_ABI_PCS_R9_use:
004ae526
PB		 9771 if (in_attr[i].i != out_attr[i].i
9772 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 9773 && in_attr[i].i != AEABI_R9_unused)
9774 {
9775 _bfd_error_handler
3895f852 9776 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 9777 result = FALSE;
ee065d83
PB		 9778 }
9779 if (out_attr[i].i == AEABI_R9_unused)
9780 out_attr[i].i = in_attr[i].i;
9781 break;
9782 case Tag_ABI_PCS_RW_data:
9783 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
9784 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
9785 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
9786 {
9787 _bfd_error_handler
3895f852 9788 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 9789 ibfd);
91e22acd 9790 result = FALSE;
ee065d83
PB		 9791 }
9792 /* Use the smallest value specified. */
9793 if (in_attr[i].i < out_attr[i].i)
9794 out_attr[i].i = in_attr[i].i;
9795 break;
ee065d83 9796 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 9797 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
9798 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 9799 {
9800 _bfd_error_handler
a9dc9481
JM		 9801 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9802 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 9803 }
a9dc9481 9804 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 9805 out_attr[i].i = in_attr[i].i;
9806 break;
ee065d83
PB		 9807 case Tag_ABI_enum_size:
9808 if (in_attr[i].i != AEABI_enum_unused)
9809 {
9810 if (out_attr[i].i == AEABI_enum_unused
9811 || out_attr[i].i == AEABI_enum_forced_wide)
9812 {
9813 /* The existing object is compatible with anything.
9814 Use whatever requirements the new object has. */
9815 out_attr[i].i = in_attr[i].i;
9816 }
9817 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 9818 && out_attr[i].i != in_attr[i].i
0ffa91dd 9819 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 9820 {
91e22acd 9821 static const char *aeabi_enum_names[] =
bf21ed78 9822 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 9823 const char *in_name =
9824 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9825 ? aeabi_enum_names[in_attr[i].i]
9826 : "<unknown>";
9827 const char *out_name =
9828 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
9829 ? aeabi_enum_names[out_attr[i].i]
9830 : "<unknown>";
ee065d83 9831 _bfd_error_handler
bf21ed78 9832 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 9833 ibfd, in_name, out_name);
ee065d83
PB		 9834 }
9835 }
9836 break;
9837 case Tag_ABI_VFP_args:
9838 /* Aready done. */
9839 break;
9840 case Tag_ABI_WMMX_args:
9841 if (in_attr[i].i != out_attr[i].i)
9842 {
9843 _bfd_error_handler
3895f852 9844 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 9845 ibfd, obfd);
91e22acd 9846 result = FALSE;
ee065d83
PB		 9847 }
9848 break;
7b86a9fa
AS		 9849 case Tag_compatibility:
9850 /* Merged in target-independent code. */
9851 break;
91e22acd
AS		 9852 case Tag_ABI_HardFP_use:
9853 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9854 if ((in_attr[i].i == 1 && out_attr[i].i == 2)
9855 || (in_attr[i].i == 2 && out_attr[i].i == 1))
9856 out_attr[i].i = 3;
9857 else if (in_attr[i].i > out_attr[i].i)
9858 out_attr[i].i = in_attr[i].i;
9859 break;
9860 case Tag_ABI_FP_16bit_format:
9861 if (in_attr[i].i != 0 && out_attr[i].i != 0)
9862 {
9863 if (in_attr[i].i != out_attr[i].i)
9864 {
9865 _bfd_error_handler
3895f852 9866 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 9867 ibfd, obfd);
9868 result = FALSE;
9869 }
9870 }
9871 if (in_attr[i].i != 0)
9872 out_attr[i].i = in_attr[i].i;
9873 break;
7b86a9fa 9874
91e22acd 9875 case Tag_nodefaults:
2d0bb761
AS		 9876 /* This tag is set if it exists, but the value is unused (and is
9877 typically zero). We don't actually need to do anything here -
9878 the merge happens automatically when the type flags are merged
9879 below. */
91e22acd
AS		 9880 break;
9881 case Tag_also_compatible_with:
9882 /* Already done in Tag_CPU_arch. */
9883 break;
9884 case Tag_conformance:
9885 /* Keep the attribute if it matches. Throw it away otherwise.
9886 No attribute means no claim to conform. */
9887 if (!in_attr[i].s || !out_attr[i].s
9888 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
9889 out_attr[i].s = NULL;
9890 break;
3cfad14c 9891
91e22acd 9892 default:
3cfad14c 9893 {
91e22acd
AS		 9894 bfd *err_bfd = NULL;
9895
9896 /* The "known_obj_attributes" table does contain some undefined
9897 attributes. Ensure that there are unused. */
9898 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
9899 err_bfd = obfd;
9900 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
9901 err_bfd = ibfd;
9902
9903 if (err_bfd != NULL)
9904 {
9905 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9906 if ((i & 127) < 64)
9907 {
9908 _bfd_error_handler
9909 (_("%B: Unknown mandatory EABI object attribute %d"),
9910 err_bfd, i);
9911 bfd_set_error (bfd_error_bad_value);
9912 result = FALSE;
9913 }
9914 else
9915 {
9916 _bfd_error_handler
9917 (_("Warning: %B: Unknown EABI object attribute %d"),
9918 err_bfd, i);
9919 }
9920 }
9921
9922 /* Only pass on attributes that match in both inputs. */
9923 if (in_attr[i].i != out_attr[i].i
9924 || in_attr[i].s != out_attr[i].s
9925 || (in_attr[i].s != NULL && out_attr[i].s != NULL
9926 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
9927 {
9928 out_attr[i].i = 0;
9929 out_attr[i].s = NULL;
9930 }
3cfad14c 9931 }
91e22acd
AS		 9932 }
9933
9934 /* If out_attr was copied from in_attr then it won't have a type yet. */
9935 if (in_attr[i].type && !out_attr[i].type)
9936 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 9937 }
9938
104d59d1
JM		 9939 /* Merge Tag_compatibility attributes and any common GNU ones. */
9940 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 9941
104d59d1
JM		 9942 /* Check for any attributes not known on ARM. */
9943 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 9944 out_listp = &elf_other_obj_attributes_proc (obfd);
9945 out_list = *out_listp;
8e79c3df 9946
91e22acd 9947 for (; in_list || out_list; )
ee065d83 9948 {
91e22acd
AS		 9949 bfd *err_bfd = NULL;
9950 int err_tag = 0;
8e79c3df
CM		 9951
9952 /* The tags for each list are in numerical order. */
9953 /* If the tags are equal, then merge. */
91e22acd 9954 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 9955 {
91e22acd
AS		 9956 /* This attribute only exists in obfd. We can't merge, and we don't
9957 know what the tag means, so delete it. */
9958 err_bfd = obfd;
9959 err_tag = out_list->tag;
9960 *out_listp = out_list->next;
9961 out_list = *out_listp;
8e79c3df 9962 }
91e22acd 9963 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 9964 {
91e22acd
AS		 9965 /* This attribute only exists in ibfd. We can't merge, and we don't
9966 know what the tag means, so ignore it. */
9967 err_bfd = ibfd;
9968 err_tag = in_list->tag;
8e79c3df 9969 in_list = in_list->next;
eb111b1f 9970 }
91e22acd
AS		 9971 else /* The tags are equal. */
9972 {
9973 /* As present, all attributes in the list are unknown, and
9974 therefore can't be merged meaningfully. */
9975 err_bfd = obfd;
9976 err_tag = out_list->tag;
9977
9978 /* Only pass on attributes that match in both inputs. */
9979 if (in_list->attr.i != out_list->attr.i
9980 || in_list->attr.s != out_list->attr.s
9981 || (in_list->attr.s && out_list->attr.s
9982 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
9983 {
9984 /* No match. Delete the attribute. */
9985 *out_listp = out_list->next;
9986 out_list = *out_listp;
9987 }
9988 else
9989 {
9990 /* Matched. Keep the attribute and move to the next. */
9991 out_list = out_list->next;
9992 in_list = in_list->next;
9993 }
9994 }
9995
9996 if (err_bfd)
9997 {
9998 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9999 if ((err_tag & 127) < 64)
10000 {
10001 _bfd_error_handler
10002 (_("%B: Unknown mandatory EABI object attribute %d"),
10003 err_bfd, err_tag);
10004 bfd_set_error (bfd_error_bad_value);
10005 result = FALSE;
10006 }
10007 else
10008 {
10009 _bfd_error_handler
10010 (_("Warning: %B: Unknown EABI object attribute %d"),
10011 err_bfd, err_tag);
10012 }
10013 }
ee065d83 10014 }
91e22acd 10015 return result;
252b5132
RH		 10016}
10017
3a4a14e9
PB		 10018
10019/* Return TRUE if the two EABI versions are incompatible. */
10020
10021static bfd_boolean
10022elf32_arm_versions_compatible (unsigned iver, unsigned over)
10023{
10024 /* v4 and v5 are the same spec before and after it was released,
10025 so allow mixing them. */
10026 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10027 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10028 return TRUE;
10029
10030 return (iver == over);
10031}
10032
252b5132
RH		 10033/* Merge backend specific data from an object file to the output
10034 object file when linking. */
9b485d32 10035
b34976b6 10036static bfd_boolean
57e8b36a 10037elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 10038{
10039 flagword out_flags;
10040 flagword in_flags;
b34976b6 10041 bfd_boolean flags_compatible = TRUE;
cf919dfd 10042 asection *sec;
252b5132 10043
9b485d32 10044 /* Check if we have the same endianess. */
82e51918 10045 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 10046 return FALSE;
1fe494a5 10047
0ffa91dd 10048 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 10049 return TRUE;
252b5132 10050
ee065d83
PB		 10051 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
10052 return FALSE;
10053
252b5132
RH		 10054 /* The input BFD must have had its flags initialised. */
10055 /* The following seems bogus to me -- The flags are initialized in
10056 the assembler but I don't think an elf_flags_init field is
9b485d32 10057 written into the object. */
252b5132
RH		 10058 /* BFD_ASSERT (elf_flags_init (ibfd)); */
10059
10060 in_flags = elf_elfheader (ibfd)->e_flags;
10061 out_flags = elf_elfheader (obfd)->e_flags;
10062
23684067
PB		 10063 /* In theory there is no reason why we couldn't handle this. However
10064 in practice it isn't even close to working and there is no real
10065 reason to want it. */
10066 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
c13bb2ea 10067 && !(ibfd->flags & DYNAMIC)
23684067
PB		 10068 && (in_flags & EF_ARM_BE8))
10069 {
3895f852 10070 _bfd_error_handler (_("error: %B is already in final BE8 format"),
23684067
PB		 10071 ibfd);
10072 return FALSE;
10073 }
10074
252b5132
RH		 10075 if (!elf_flags_init (obfd))
10076 {
fe077fa6
NC		 10077 /* If the input is the default architecture and had the default
10078 flags then do not bother setting the flags for the output
10079 architecture, instead allow future merges to do this. If no
10080 future merges ever set these flags then they will retain their
10081 uninitialised values, which surprise surprise, correspond
252b5132 10082 to the default values. */
fe077fa6
NC		 10083 if (bfd_get_arch_info (ibfd)->the_default
10084 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 10085 return TRUE;
252b5132 10086
b34976b6 10087 elf_flags_init (obfd) = TRUE;
252b5132
RH		 10088 elf_elfheader (obfd)->e_flags = in_flags;
10089
10090 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
10091 && bfd_get_arch_info (obfd)->the_default)
10092 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
10093
b34976b6 10094 return TRUE;
252b5132
RH		 10095 }
10096
5a6c6817
NC		 10097 /* Determine what should happen if the input ARM architecture
10098 does not match the output ARM architecture. */
10099 if (! bfd_arm_merge_machines (ibfd, obfd))
10100 return FALSE;
e16bb312 10101
1006ba19 10102 /* Identical flags must be compatible. */
252b5132 10103 if (in_flags == out_flags)
b34976b6 10104 return TRUE;
252b5132 10105
35a0f415
DJ		 10106 /* Check to see if the input BFD actually contains any sections. If
10107 not, its flags may not have been initialised either, but it
8e3de13a 10108 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 10109 dynamic objects; their section list may be emptied by
d1f161ea 10110 elf_link_add_object_symbols.
35a0f415 10111
d1f161ea
NC		 10112 Also check to see if there are no code sections in the input.
10113 In this case there is no need to check for code specific flags.
10114 XXX - do we need to worry about floating-point format compatability
10115 in data sections ? */
35a0f415 10116 if (!(ibfd->flags & DYNAMIC))
cf919dfd 10117 {
35a0f415 10118 bfd_boolean null_input_bfd = TRUE;
d1f161ea 10119 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 10120
10121 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 10122 {
35a0f415
DJ		 10123 /* Ignore synthetic glue sections. */
10124 if (strcmp (sec->name, ".glue_7")
10125 && strcmp (sec->name, ".glue_7t"))
10126 {
d1f161ea
NC		 10127 if ((bfd_get_section_flags (ibfd, sec)
10128 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10129 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
10130 only_data_sections = FALSE;
10131
35a0f415
DJ		 10132 null_input_bfd = FALSE;
10133 break;
10134 }
cf919dfd 10135 }
d1f161ea
NC		 10136
10137 if (null_input_bfd || only_data_sections)
35a0f415 10138 return TRUE;
cf919dfd 10139 }
cf919dfd 10140
252b5132 10141 /* Complain about various flag mismatches. */
3a4a14e9
PB		 10142 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
10143 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 10144 {
d003868e 10145 _bfd_error_handler
3895f852 10146 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 10147 ibfd, obfd,
10148 (in_flags & EF_ARM_EABIMASK) >> 24,
10149 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 10150 return FALSE;
fc830a83 10151 }
252b5132 10152
1006ba19 10153 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 10154 /* VxWorks libraries do not use these flags. */
10155 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
10156 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
10157 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 10158 {
fd2ec330 10159 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 10160 {
d003868e 10161 _bfd_error_handler
3895f852 10162 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
d003868e
AM		 10163 ibfd, obfd,
10164 in_flags & EF_ARM_APCS_26 ? 26 : 32,
10165 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 10166 flags_compatible = FALSE;
1006ba19 10167 }
252b5132 10168
fd2ec330 10169 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 10170 {
5eefb65f 10171 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e 10172 _bfd_error_handler
3895f852 10173 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
d003868e 10174 ibfd, obfd);
5eefb65f 10175 else
d003868e 10176 _bfd_error_handler
3895f852 10177 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
d003868e 10178 ibfd, obfd);
63b0f745 10179
b34976b6 10180 flags_compatible = FALSE;
1006ba19 10181 }
252b5132 10182
96a846ea 10183 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 10184 {
96a846ea 10185 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e 10186 _bfd_error_handler
3895f852 10187 (_("error: %B uses VFP instructions, whereas %B does not"),
d003868e 10188 ibfd, obfd);
5eefb65f 10189 else
d003868e 10190 _bfd_error_handler
3895f852 10191 (_("error: %B uses FPA instructions, whereas %B does not"),
d003868e 10192 ibfd, obfd);
fde78edd
NC		 10193
10194 flags_compatible = FALSE;
10195 }
10196
10197 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
10198 {
10199 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e 10200 _bfd_error_handler
3895f852 10201 (_("error: %B uses Maverick instructions, whereas %B does not"),
d003868e 10202 ibfd, obfd);
fde78edd 10203 else
d003868e 10204 _bfd_error_handler
3895f852 10205 (_("error: %B does not use Maverick instructions, whereas %B does"),
d003868e 10206 ibfd, obfd);
63b0f745 10207
b34976b6 10208 flags_compatible = FALSE;
1006ba19 10209 }
96a846ea
RE		 10210
10211#ifdef EF_ARM_SOFT_FLOAT
10212 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
10213 {
10214 /* We can allow interworking between code that is VFP format
10215 layout, and uses either soft float or integer regs for
10216 passing floating point arguments and results. We already
10217 know that the APCS_FLOAT flags match; similarly for VFP
10218 flags. */
10219 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
10220 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
10221 {
10222 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e 10223 _bfd_error_handler
3895f852 10224 (_("error: %B uses software FP, whereas %B uses hardware FP"),
d003868e 10225 ibfd, obfd);
96a846ea 10226 else
d003868e 10227 _bfd_error_handler
3895f852 10228 (_("error: %B uses hardware FP, whereas %B uses software FP"),
d003868e 10229 ibfd, obfd);
96a846ea 10230
b34976b6 10231 flags_compatible = FALSE;
96a846ea
RE		 10232 }
10233 }
ee43f35e 10234#endif
252b5132 10235
1006ba19 10236 /* Interworking mismatch is only a warning. */
fd2ec330 10237 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 10238 {
e3c8793a
NC		 10239 if (in_flags & EF_ARM_INTERWORK)
10240 {
d003868e
AM		 10241 _bfd_error_handler
10242 (_("Warning: %B supports interworking, whereas %B does not"),
10243 ibfd, obfd);
e3c8793a
NC		 10244 }
10245 else
10246 {
d003868e
AM		 10247 _bfd_error_handler
10248 (_("Warning: %B does not support interworking, whereas %B does"),
10249 ibfd, obfd);
e3c8793a 10250 }
8f615d07 10251 }
252b5132 10252 }
63b0f745 10253
1006ba19 10254 return flags_compatible;
252b5132
RH		 10255}
10256
9b485d32
NC		 10257/* Display the flags field. */
10258
b34976b6 10259static bfd_boolean
57e8b36a 10260elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10261{
fc830a83
NC		 10262 FILE * file = (FILE *) ptr;
10263 unsigned long flags;
252b5132
RH		 10264
10265 BFD_ASSERT (abfd != NULL && ptr != NULL);
10266
10267 /* Print normal ELF private data. */
10268 _bfd_elf_print_private_bfd_data (abfd, ptr);
10269
fc830a83 10270 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10271 /* Ignore init flag - it may not be set, despite the flags field
10272 containing valid data. */
252b5132
RH		 10273
10274 /* xgettext:c-format */
9b485d32 10275 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10276
fc830a83
NC		 10277 switch (EF_ARM_EABI_VERSION (flags))
10278 {
10279 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10280 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10281 official ARM ELF extended ABI. Hence they are only decoded if
10282 the EABI version is not set. */
fd2ec330 10283 if (flags & EF_ARM_INTERWORK)
9b485d32 10284 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10285
fd2ec330 10286 if (flags & EF_ARM_APCS_26)
6c571f00 10287 fprintf (file, " [APCS-26]");
fc830a83 10288 else
6c571f00 10289 fprintf (file, " [APCS-32]");
9a5aca8c 10290
96a846ea
RE		 10291 if (flags & EF_ARM_VFP_FLOAT)
10292 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10293 else if (flags & EF_ARM_MAVERICK_FLOAT)
10294 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10295 else
10296 fprintf (file, _(" [FPA float format]"));
10297
fd2ec330 10298 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10299 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10300
fd2ec330 10301 if (flags & EF_ARM_PIC)
9b485d32 10302 fprintf (file, _(" [position independent]"));
fc830a83 10303
fd2ec330 10304 if (flags & EF_ARM_NEW_ABI)
9b485d32 10305 fprintf (file, _(" [new ABI]"));
9a5aca8c 10306
fd2ec330 10307 if (flags & EF_ARM_OLD_ABI)
9b485d32 10308 fprintf (file, _(" [old ABI]"));
9a5aca8c 10309
fd2ec330 10310 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10311 fprintf (file, _(" [software FP]"));
9a5aca8c 10312
96a846ea
RE		 10313 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10314 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10315 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10316 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10317 break;
9a5aca8c 10318
fc830a83 10319 case EF_ARM_EABI_VER1:
9b485d32 10320 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10321
fc830a83 10322 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10323 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10324 else
9b485d32 10325 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10326
fc830a83
NC		 10327 flags &= ~ EF_ARM_SYMSARESORTED;
10328 break;
9a5aca8c 10329
fd2ec330
PB		 10330 case EF_ARM_EABI_VER2:
10331 fprintf (file, _(" [Version2 EABI]"));
10332
10333 if (flags & EF_ARM_SYMSARESORTED)
10334 fprintf (file, _(" [sorted symbol table]"));
10335 else
10336 fprintf (file, _(" [unsorted symbol table]"));
10337
10338 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10339 fprintf (file, _(" [dynamic symbols use segment index]"));
10340
10341 if (flags & EF_ARM_MAPSYMSFIRST)
10342 fprintf (file, _(" [mapping symbols precede others]"));
10343
99e4ae17 10344 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10345 | EF_ARM_MAPSYMSFIRST);
10346 break;
10347
d507cf36
PB		 10348 case EF_ARM_EABI_VER3:
10349 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10350 break;
10351
10352 case EF_ARM_EABI_VER4:
10353 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10354 goto eabi;
d507cf36 10355
3a4a14e9
PB		 10356 case EF_ARM_EABI_VER5:
10357 fprintf (file, _(" [Version5 EABI]"));
10358 eabi:
d507cf36
PB		 10359 if (flags & EF_ARM_BE8)
10360 fprintf (file, _(" [BE8]"));
10361
10362 if (flags & EF_ARM_LE8)
10363 fprintf (file, _(" [LE8]"));
10364
10365 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10366 break;
10367
fc830a83 10368 default:
9b485d32 10369 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10370 break;
10371 }
252b5132 10372
fc830a83 10373 flags &= ~ EF_ARM_EABIMASK;
252b5132 10374
fc830a83 10375 if (flags & EF_ARM_RELEXEC)
9b485d32 10376 fprintf (file, _(" [relocatable executable]"));
252b5132 10377
fc830a83 10378 if (flags & EF_ARM_HASENTRY)
9b485d32 10379 fprintf (file, _(" [has entry point]"));
252b5132 10380
fc830a83
NC		 10381 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10382
10383 if (flags)
9b485d32 10384 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10385
252b5132
RH		 10386 fputc ('\n', file);
10387
b34976b6 10388 return TRUE;
252b5132
RH		 10389}
10390
10391static int
57e8b36a 10392elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10393{
2f0ca46a
NC		 10394 switch (ELF_ST_TYPE (elf_sym->st_info))
10395 {
10396 case STT_ARM_TFUNC:
10397 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10398
2f0ca46a
NC		 10399 case STT_ARM_16BIT:
10400 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10401 This allows us to distinguish between data used by Thumb instructions
10402 and non-data (which is probably code) inside Thumb regions of an
10403 executable. */
1a0eb693 10404 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10405 return ELF_ST_TYPE (elf_sym->st_info);
10406 break;
9a5aca8c 10407
ce855c42
NC		 10408 default:
10409 break;
2f0ca46a
NC		 10410 }
10411
10412 return type;
252b5132 10413}
f21f3fe0 10414
252b5132 10415static asection *
07adf181
AM		 10416elf32_arm_gc_mark_hook (asection *sec,
10417 struct bfd_link_info *info,
10418 Elf_Internal_Rela *rel,
10419 struct elf_link_hash_entry *h,
10420 Elf_Internal_Sym *sym)
252b5132
RH		 10421{
10422 if (h != NULL)
07adf181 10423 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10424 {
10425 case R_ARM_GNU_VTINHERIT:
10426 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10427 return NULL;
10428 }
9ad5cbcf 10429
07adf181 10430 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10431}
10432
780a67af
NC		 10433/* Update the got entry reference counts for the section being removed. */
10434
b34976b6 10435static bfd_boolean
ba93b8ac
DJ		 10436elf32_arm_gc_sweep_hook (bfd * abfd,
10437 struct bfd_link_info * info,
10438 asection * sec,
10439 const Elf_Internal_Rela * relocs)
252b5132 10440{
5e681ec4
PB		 10441 Elf_Internal_Shdr *symtab_hdr;
10442 struct elf_link_hash_entry **sym_hashes;
10443 bfd_signed_vma *local_got_refcounts;
10444 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10445 struct elf32_arm_link_hash_table * globals;
10446
7dda2462
TG		 10447 if (info->relocatable)
10448 return TRUE;
10449
eb043451 10450 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 10451
10452 elf_section_data (sec)->local_dynrel = NULL;
10453
0ffa91dd 10454 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10455 sym_hashes = elf_sym_hashes (abfd);
10456 local_got_refcounts = elf_local_got_refcounts (abfd);
10457
906e58ca 10458 check_use_blx (globals);
bd97cb95 10459
5e681ec4
PB		 10460 relend = relocs + sec->reloc_count;
10461 for (rel = relocs; rel < relend; rel++)
eb043451 10462 {
3eb128b2
AM		 10463 unsigned long r_symndx;
10464 struct elf_link_hash_entry *h = NULL;
eb043451 10465 int r_type;
5e681ec4 10466
3eb128b2
AM		 10467 r_symndx = ELF32_R_SYM (rel->r_info);
10468 if (r_symndx >= symtab_hdr->sh_info)
10469 {
10470 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10471 while (h->root.type == bfd_link_hash_indirect
10472 || h->root.type == bfd_link_hash_warning)
10473 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10474 }
10475
eb043451 10476 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10477 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10478 switch (r_type)
10479 {
10480 case R_ARM_GOT32:
eb043451 10481 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10482 case R_ARM_TLS_GD32:
10483 case R_ARM_TLS_IE32:
3eb128b2 10484 if (h != NULL)
eb043451 10485 {
eb043451
PB		 10486 if (h->got.refcount > 0)
10487 h->got.refcount -= 1;
10488 }
10489 else if (local_got_refcounts != NULL)
10490 {
10491 if (local_got_refcounts[r_symndx] > 0)
10492 local_got_refcounts[r_symndx] -= 1;
10493 }
10494 break;
10495
ba93b8ac
DJ		 10496 case R_ARM_TLS_LDM32:
10497 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
10498 break;
10499
eb043451 10500 case R_ARM_ABS32:
bb224fc3 10501 case R_ARM_ABS32_NOI:
eb043451 10502 case R_ARM_REL32:
bb224fc3 10503 case R_ARM_REL32_NOI:
eb043451
PB		 10504 case R_ARM_PC24:
10505 case R_ARM_PLT32:
5b5bb741
PB		 10506 case R_ARM_CALL:
10507 case R_ARM_JUMP24:
eb043451 10508 case R_ARM_PREL31:
c19d1205 10509 case R_ARM_THM_CALL:
bd97cb95
DJ		 10510 case R_ARM_THM_JUMP24:
10511 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10512 case R_ARM_MOVW_ABS_NC:
10513 case R_ARM_MOVT_ABS:
10514 case R_ARM_MOVW_PREL_NC:
10515 case R_ARM_MOVT_PREL:
10516 case R_ARM_THM_MOVW_ABS_NC:
10517 case R_ARM_THM_MOVT_ABS:
10518 case R_ARM_THM_MOVW_PREL_NC:
10519 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10520 /* Should the interworking branches be here also? */
10521
3eb128b2 10522 if (h != NULL)
eb043451
PB		 10523 {
10524 struct elf32_arm_link_hash_entry *eh;
10525 struct elf32_arm_relocs_copied **pp;
10526 struct elf32_arm_relocs_copied *p;
5e681ec4 10527
b7693d02 10528 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10529
eb043451 10530 if (h->plt.refcount > 0)
b7693d02
DJ		 10531 {
10532 h->plt.refcount -= 1;
bd97cb95
DJ		 10533 if (r_type == R_ARM_THM_CALL)
10534 eh->plt_maybe_thumb_refcount--;
10535
10536 if (r_type == R_ARM_THM_JUMP24
10537 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10538 eh->plt_thumb_refcount--;
10539 }
5e681ec4 10540
eb043451 10541 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10542 || r_type == R_ARM_REL32
10543 || r_type == R_ARM_ABS32_NOI
10544 || r_type == R_ARM_REL32_NOI)
eb043451 10545 {
eb043451
PB		 10546 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10547 pp = &p->next)
10548 if (p->section == sec)
10549 {
10550 p->count -= 1;
bb224fc3
MS		 10551 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10552 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10553 p->pc_count -= 1;
eb043451
PB		 10554 if (p->count == 0)
10555 *pp = p->next;
10556 break;
10557 }
10558 }
10559 }
10560 break;
5e681ec4 10561
eb043451
PB		 10562 default:
10563 break;
10564 }
10565 }
5e681ec4 10566
b34976b6 10567 return TRUE;
252b5132
RH		 10568}
10569
780a67af
NC		 10570/* Look through the relocs for a section during the first phase. */
10571
b34976b6 10572static bfd_boolean
57e8b36a
NC		 10573elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10574 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10575{
b34976b6
AM		 10576 Elf_Internal_Shdr *symtab_hdr;
10577 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10578 const Elf_Internal_Rela *rel;
10579 const Elf_Internal_Rela *rel_end;
10580 bfd *dynobj;
5e681ec4 10581 asection *sreloc;
b34976b6 10582 bfd_vma *local_got_offsets;
5e681ec4 10583 struct elf32_arm_link_hash_table *htab;
39623e12 10584 bfd_boolean needs_plt;
ce98a316 10585 unsigned long nsyms;
9a5aca8c 10586
1049f94e 10587 if (info->relocatable)
b34976b6 10588 return TRUE;
9a5aca8c 10589
0ffa91dd
NC		 10590 BFD_ASSERT (is_arm_elf (abfd));
10591
5e681ec4
PB		 10592 htab = elf32_arm_hash_table (info);
10593 sreloc = NULL;
9a5aca8c 10594
67687978
PB		 10595 /* Create dynamic sections for relocatable executables so that we can
10596 copy relocations. */
10597 if (htab->root.is_relocatable_executable
10598 && ! htab->root.dynamic_sections_created)
10599 {
10600 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10601 return FALSE;
10602 }
10603
252b5132
RH		 10604 dynobj = elf_hash_table (info)->dynobj;
10605 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10606
0ffa91dd 10607 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10608 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10609 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10610
252b5132
RH		 10611 rel_end = relocs + sec->reloc_count;
10612 for (rel = relocs; rel < rel_end; rel++)
10613 {
10614 struct elf_link_hash_entry *h;
b7693d02 10615 struct elf32_arm_link_hash_entry *eh;
252b5132 10616 unsigned long r_symndx;
eb043451 10617 int r_type;
9a5aca8c 10618
252b5132 10619 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10620 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10621 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10622
ce98a316
NC		 10623 if (r_symndx >= nsyms
10624 /* PR 9934: It is possible to have relocations that do not
10625 refer to symbols, thus it is also possible to have an
10626 object file containing relocations but no symbol table. */
10627 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10628 {
10629 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10630 r_symndx);
ba93b8ac
DJ		 10631 return FALSE;
10632 }
10633
ce98a316 10634 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10635 h = NULL;
10636 else
973a3492
L		 10637 {
10638 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10639 while (h->root.type == bfd_link_hash_indirect
10640 || h->root.type == bfd_link_hash_warning)
10641 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10642 }
9a5aca8c 10643
b7693d02
DJ		 10644 eh = (struct elf32_arm_link_hash_entry *) h;
10645
eb043451 10646 switch (r_type)
252b5132 10647 {
5e681ec4 10648 case R_ARM_GOT32:
eb043451 10649 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10650 case R_ARM_TLS_GD32:
10651 case R_ARM_TLS_IE32:
5e681ec4 10652 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10653 {
10654 int tls_type, old_tls_type;
5e681ec4 10655
ba93b8ac
DJ		 10656 switch (r_type)
10657 {
10658 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10659 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10660 default: tls_type = GOT_NORMAL; break;
10661 }
252b5132 10662
ba93b8ac
DJ		 10663 if (h != NULL)
10664 {
10665 h->got.refcount++;
10666 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10667 }
10668 else
10669 {
10670 bfd_signed_vma *local_got_refcounts;
10671
10672 /* This is a global offset table entry for a local symbol. */
10673 local_got_refcounts = elf_local_got_refcounts (abfd);
10674 if (local_got_refcounts == NULL)
10675 {
10676 bfd_size_type size;
906e58ca 10677
ba93b8ac 10678 size = symtab_hdr->sh_info;
906e58ca 10679 size *= (sizeof (bfd_signed_vma) + sizeof (char));
ba93b8ac
DJ		 10680 local_got_refcounts = bfd_zalloc (abfd, size);
10681 if (local_got_refcounts == NULL)
10682 return FALSE;
10683 elf_local_got_refcounts (abfd) = local_got_refcounts;
10684 elf32_arm_local_got_tls_type (abfd)
10685 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10686 }
10687 local_got_refcounts[r_symndx] += 1;
10688 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10689 }
10690
10691 /* We will already have issued an error message if there is a
10692 TLS / non-TLS mismatch, based on the symbol type. We don't
10693 support any linker relaxations. So just combine any TLS
10694 types needed. */
10695 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10696 && tls_type != GOT_NORMAL)
10697 tls_type |= old_tls_type;
10698
10699 if (old_tls_type != tls_type)
10700 {
10701 if (h != NULL)
10702 elf32_arm_hash_entry (h)->tls_type = tls_type;
10703 else
10704 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10705 }
10706 }
8029a119 10707 /* Fall through. */
ba93b8ac
DJ		 10708
10709 case R_ARM_TLS_LDM32:
10710 if (r_type == R_ARM_TLS_LDM32)
10711 htab->tls_ldm_got.refcount++;
8029a119 10712 /* Fall through. */
252b5132 10713
c19d1205 10714 case R_ARM_GOTOFF32:
5e681ec4
PB		 10715 case R_ARM_GOTPC:
10716 if (htab->sgot == NULL)
10717 {
10718 if (htab->root.dynobj == NULL)
10719 htab->root.dynobj = abfd;
10720 if (!create_got_section (htab->root.dynobj, info))
10721 return FALSE;
10722 }
252b5132
RH		 10723 break;
10724
00a97672
RS		 10725 case R_ARM_ABS12:
10726 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10727 ldr __GOTT_INDEX__ offsets. */
10728 if (!htab->vxworks_p)
10729 break;
8029a119 10730 /* Fall through. */
00a97672 10731
252b5132 10732 case R_ARM_PC24:
7359ea65 10733 case R_ARM_PLT32:
5b5bb741
PB		 10734 case R_ARM_CALL:
10735 case R_ARM_JUMP24:
eb043451 10736 case R_ARM_PREL31:
c19d1205 10737 case R_ARM_THM_CALL:
bd97cb95
DJ		 10738 case R_ARM_THM_JUMP24:
10739 case R_ARM_THM_JUMP19:
39623e12
PB		 10740 needs_plt = 1;
10741 goto normal_reloc;
10742
96c23d59
JM		 10743 case R_ARM_MOVW_ABS_NC:
10744 case R_ARM_MOVT_ABS:
10745 case R_ARM_THM_MOVW_ABS_NC:
10746 case R_ARM_THM_MOVT_ABS:
10747 if (info->shared)
10748 {
10749 (*_bfd_error_handler)
10750 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10751 abfd, elf32_arm_howto_table_1[r_type].name,
10752 (h) ? h->root.root.string : "a local symbol");
10753 bfd_set_error (bfd_error_bad_value);
10754 return FALSE;
10755 }
10756
10757 /* Fall through. */
39623e12
PB		 10758 case R_ARM_ABS32:
10759 case R_ARM_ABS32_NOI:
10760 case R_ARM_REL32:
10761 case R_ARM_REL32_NOI:
b6895b4f
PB		 10762 case R_ARM_MOVW_PREL_NC:
10763 case R_ARM_MOVT_PREL:
b6895b4f
PB		 10764 case R_ARM_THM_MOVW_PREL_NC:
10765 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 10766 needs_plt = 0;
10767 normal_reloc:
10768
b7693d02 10769 /* Should the interworking branches be listed here? */
7359ea65 10770 if (h != NULL)
5e681ec4
PB		 10771 {
10772 /* If this reloc is in a read-only section, we might
10773 need a copy reloc. We can't check reliably at this
10774 stage whether the section is read-only, as input
10775 sections have not yet been mapped to output sections.
10776 Tentatively set the flag for now, and correct in
10777 adjust_dynamic_symbol. */
7359ea65 10778 if (!info->shared)
f5385ebf 10779 h->non_got_ref = 1;
7359ea65 10780
5e681ec4 10781 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 10782 refers to is in a different object. We can't tell for
10783 sure yet, because something later might force the
10784 symbol local. */
39623e12 10785 if (needs_plt)
f5385ebf 10786 h->needs_plt = 1;
4f199be3
DJ		 10787
10788 /* If we create a PLT entry, this relocation will reference
10789 it, even if it's an ABS32 relocation. */
10790 h->plt.refcount += 1;
b7693d02 10791
bd97cb95
DJ		 10792 /* It's too early to use htab->use_blx here, so we have to
10793 record possible blx references separately from
10794 relocs that definitely need a thumb stub. */
10795
c19d1205 10796 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 10797 eh->plt_maybe_thumb_refcount += 1;
10798
10799 if (r_type == R_ARM_THM_JUMP24
10800 || r_type == R_ARM_THM_JUMP19)
b7693d02 10801 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 10802 }
10803
67687978
PB		 10804 /* If we are creating a shared library or relocatable executable,
10805 and this is a reloc against a global symbol, or a non PC
10806 relative reloc against a local symbol, then we need to copy
10807 the reloc into the shared library. However, if we are linking
10808 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 10809 global symbol which is defined in an object we are
10810 including in the link (i.e., DEF_REGULAR is set). At
10811 this point we have not seen all the input files, so it is
10812 possible that DEF_REGULAR is not set now but will be set
10813 later (it is never cleared). We account for that
10814 possibility below by storing information in the
5e681ec4 10815 relocs_copied field of the hash table entry. */
67687978 10816 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 10817 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 10818 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 10819 || (h != NULL && ! h->needs_plt
10820 && (! info->symbolic || ! h->def_regular))))
252b5132 10821 {
5e681ec4
PB		 10822 struct elf32_arm_relocs_copied *p, **head;
10823
252b5132
RH		 10824 /* When creating a shared object, we must copy these
10825 reloc types into the output file. We create a reloc
10826 section in dynobj and make room for this reloc. */
83bac4b0 10827 if (sreloc == NULL)
252b5132 10828 {
83bac4b0
NC		 10829 sreloc = _bfd_elf_make_dynamic_reloc_section
10830 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 10831
83bac4b0 10832 if (sreloc == NULL)
b34976b6 10833 return FALSE;
252b5132 10834
83bac4b0 10835 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 10836 if (htab->symbian_p)
252b5132 10837 {
83bac4b0 10838 flagword flags;
5e681ec4 10839
83bac4b0 10840 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 10841 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 10842 bfd_set_section_flags (dynobj, sreloc, flags);
10843 }
252b5132
RH		 10844 }
10845
5e681ec4
PB		 10846 /* If this is a global symbol, we count the number of
10847 relocations we need for this symbol. */
10848 if (h != NULL)
252b5132 10849 {
5e681ec4
PB		 10850 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
10851 }
10852 else
10853 {
10854 /* Track dynamic relocs needed for local syms too.
10855 We really need local syms available to do this
10856 easily. Oh well. */
5e681ec4 10857 asection *s;
6edfbbad 10858 void *vpp;
87d72d41 10859 Elf_Internal_Sym *isym;
6edfbbad 10860
87d72d41
AM		 10861 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
10862 abfd, r_symndx);
10863 if (isym == NULL)
5e681ec4 10864 return FALSE;
57e8b36a 10865
87d72d41
AM		 10866 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
10867 if (s == NULL)
10868 s = sec;
10869
6edfbbad
DJ		 10870 vpp = &elf_section_data (s)->local_dynrel;
10871 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 10872 }
57e8b36a 10873
5e681ec4
PB		 10874 p = *head;
10875 if (p == NULL || p->section != sec)
10876 {
10877 bfd_size_type amt = sizeof *p;
57e8b36a 10878
5e681ec4 10879 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 10880 if (p == NULL)
5e681ec4
PB		 10881 return FALSE;
10882 p->next = *head;
10883 *head = p;
10884 p->section = sec;
10885 p->count = 0;
ba93b8ac 10886 p->pc_count = 0;
252b5132 10887 }
57e8b36a 10888
bb224fc3 10889 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 10890 p->pc_count += 1;
71a976dd 10891 p->count += 1;
252b5132
RH		 10892 }
10893 break;
10894
10895 /* This relocation describes the C++ object vtable hierarchy.
10896 Reconstruct it for later use during GC. */
10897 case R_ARM_GNU_VTINHERIT:
c152c796 10898 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 10899 return FALSE;
252b5132 10900 break;
9a5aca8c 10901
252b5132
RH		 10902 /* This relocation describes which C++ vtable entries are actually
10903 used. Record for later use during GC. */
10904 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 10905 BFD_ASSERT (h != NULL);
10906 if (h != NULL
10907 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 10908 return FALSE;
252b5132
RH		 10909 break;
10910 }
10911 }
f21f3fe0 10912
b34976b6 10913 return TRUE;
252b5132
RH		 10914}
10915
6a5bb875
PB		 10916/* Unwinding tables are not referenced directly. This pass marks them as
10917 required if the corresponding code section is marked. */
10918
10919static bfd_boolean
906e58ca
NC		 10920elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
10921 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 10922{
10923 bfd *sub;
10924 Elf_Internal_Shdr **elf_shdrp;
10925 bfd_boolean again;
10926
10927 /* Marking EH data may cause additional code sections to be marked,
10928 requiring multiple passes. */
10929 again = TRUE;
10930 while (again)
10931 {
10932 again = FALSE;
10933 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
10934 {
10935 asection *o;
10936
0ffa91dd 10937 if (! is_arm_elf (sub))
6a5bb875
PB		 10938 continue;
10939
10940 elf_shdrp = elf_elfsections (sub);
10941 for (o = sub->sections; o != NULL; o = o->next)
10942 {
10943 Elf_Internal_Shdr *hdr;
0ffa91dd 10944
6a5bb875 10945 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 10946 if (hdr->sh_type == SHT_ARM_EXIDX
10947 && hdr->sh_link
10948 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 10949 && !o->gc_mark
10950 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
10951 {
10952 again = TRUE;
10953 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
10954 return FALSE;
10955 }
10956 }
10957 }
10958 }
10959
10960 return TRUE;
10961}
10962
3c9458e9
NC		 10963/* Treat mapping symbols as special target symbols. */
10964
10965static bfd_boolean
10966elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
10967{
b0796911
PB		 10968 return bfd_is_arm_special_symbol_name (sym->name,
10969 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 10970}
10971
0367ecfb
NC		 10972/* This is a copy of elf_find_function() from elf.c except that
10973 ARM mapping symbols are ignored when looking for function names
10974 and STT_ARM_TFUNC is considered to a function type. */
252b5132 10975
0367ecfb
NC		 10976static bfd_boolean
10977arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
10978 asection * section,
10979 asymbol ** symbols,
10980 bfd_vma offset,
10981 const char ** filename_ptr,
10982 const char ** functionname_ptr)
10983{
10984 const char * filename = NULL;
10985 asymbol * func = NULL;
10986 bfd_vma low_func = 0;
10987 asymbol ** p;
252b5132
RH		 10988
10989 for (p = symbols; *p != NULL; p++)
10990 {
10991 elf_symbol_type *q;
10992
10993 q = (elf_symbol_type *) *p;
10994
252b5132
RH		 10995 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
10996 {
10997 default:
10998 break;
10999 case STT_FILE:
11000 filename = bfd_asymbol_name (&q->symbol);
11001 break;
252b5132
RH		 11002 case STT_FUNC:
11003 case STT_ARM_TFUNC:
9d2da7ca 11004 case STT_NOTYPE:
b0796911 11005 /* Skip mapping symbols. */
0367ecfb 11006 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11007 && bfd_is_arm_special_symbol_name (q->symbol.name,
11008 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11009 continue;
11010 /* Fall through. */
6b40fcba 11011 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11012 && q->symbol.value >= low_func
11013 && q->symbol.value <= offset)
11014 {
11015 func = (asymbol *) q;
11016 low_func = q->symbol.value;
11017 }
11018 break;
11019 }
11020 }
11021
11022 if (func == NULL)
b34976b6 11023 return FALSE;
252b5132 11024
0367ecfb
NC		 11025 if (filename_ptr)
11026 *filename_ptr = filename;
11027 if (functionname_ptr)
11028 *functionname_ptr = bfd_asymbol_name (func);
11029
11030 return TRUE;
906e58ca 11031}
0367ecfb
NC		 11032
11033
11034/* Find the nearest line to a particular section and offset, for error
11035 reporting. This code is a duplicate of the code in elf.c, except
11036 that it uses arm_elf_find_function. */
11037
11038static bfd_boolean
11039elf32_arm_find_nearest_line (bfd * abfd,
11040 asection * section,
11041 asymbol ** symbols,
11042 bfd_vma offset,
11043 const char ** filename_ptr,
11044 const char ** functionname_ptr,
11045 unsigned int * line_ptr)
11046{
11047 bfd_boolean found = FALSE;
11048
11049 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11050
11051 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11052 filename_ptr, functionname_ptr,
11053 line_ptr, 0,
11054 & elf_tdata (abfd)->dwarf2_find_line_info))
11055 {
11056 if (!*functionname_ptr)
11057 arm_elf_find_function (abfd, section, symbols, offset,
11058 *filename_ptr ? NULL : filename_ptr,
11059 functionname_ptr);
f21f3fe0 11060
0367ecfb
NC		 11061 return TRUE;
11062 }
11063
11064 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11065 & found, filename_ptr,
11066 functionname_ptr, line_ptr,
11067 & elf_tdata (abfd)->line_info))
11068 return FALSE;
11069
11070 if (found && (*functionname_ptr || *line_ptr))
11071 return TRUE;
11072
11073 if (symbols == NULL)
11074 return FALSE;
11075
11076 if (! arm_elf_find_function (abfd, section, symbols, offset,
11077 filename_ptr, functionname_ptr))
11078 return FALSE;
11079
11080 *line_ptr = 0;
b34976b6 11081 return TRUE;
252b5132
RH		 11082}
11083
4ab527b0
FF		 11084static bfd_boolean
11085elf32_arm_find_inliner_info (bfd * abfd,
11086 const char ** filename_ptr,
11087 const char ** functionname_ptr,
11088 unsigned int * line_ptr)
11089{
11090 bfd_boolean found;
11091 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11092 functionname_ptr, line_ptr,
11093 & elf_tdata (abfd)->dwarf2_find_line_info);
11094 return found;
11095}
11096
252b5132
RH		 11097/* Adjust a symbol defined by a dynamic object and referenced by a
11098 regular object. The current definition is in some section of the
11099 dynamic object, but we're not including those sections. We have to
11100 change the definition to something the rest of the link can
11101 understand. */
11102
b34976b6 11103static bfd_boolean
57e8b36a
NC		 11104elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11105 struct elf_link_hash_entry * h)
252b5132
RH		 11106{
11107 bfd * dynobj;
11108 asection * s;
b7693d02 11109 struct elf32_arm_link_hash_entry * eh;
67687978 11110 struct elf32_arm_link_hash_table *globals;
252b5132 11111
67687978 11112 globals = elf32_arm_hash_table (info);
252b5132
RH		 11113 dynobj = elf_hash_table (info)->dynobj;
11114
11115 /* Make sure we know what is going on here. */
11116 BFD_ASSERT (dynobj != NULL
f5385ebf 11117 && (h->needs_plt
f6e332e6 11118 || h->u.weakdef != NULL
f5385ebf
AM		 11119 || (h->def_dynamic
11120 && h->ref_regular
11121 && !h->def_regular)));
252b5132 11122
b7693d02
DJ		 11123 eh = (struct elf32_arm_link_hash_entry *) h;
11124
252b5132
RH		 11125 /* If this is a function, put it in the procedure linkage table. We
11126 will fill in the contents of the procedure linkage table later,
11127 when we know the address of the .got section. */
0f88be7a 11128 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11129 || h->needs_plt)
252b5132 11130 {
5e681ec4
PB		 11131 if (h->plt.refcount <= 0
11132 || SYMBOL_CALLS_LOCAL (info, h)
11133 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11134 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11135 {
11136 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11137 file, but the symbol was never referred to by a dynamic
11138 object, or if all references were garbage collected. In
11139 such a case, we don't actually need to build a procedure
11140 linkage table, and we can just do a PC24 reloc instead. */
11141 h->plt.offset = (bfd_vma) -1;
b7693d02 11142 eh->plt_thumb_refcount = 0;
bd97cb95 11143 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11144 h->needs_plt = 0;
252b5132
RH		 11145 }
11146
b34976b6 11147 return TRUE;
252b5132 11148 }
5e681ec4 11149 else
b7693d02
DJ		 11150 {
11151 /* It's possible that we incorrectly decided a .plt reloc was
11152 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11153 in check_relocs. We can't decide accurately between function
11154 and non-function syms in check-relocs; Objects loaded later in
11155 the link may change h->type. So fix it now. */
11156 h->plt.offset = (bfd_vma) -1;
11157 eh->plt_thumb_refcount = 0;
bd97cb95 11158 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11159 }
252b5132
RH		 11160
11161 /* If this is a weak symbol, and there is a real definition, the
11162 processor independent code will have arranged for us to see the
11163 real definition first, and we can just use the same value. */
f6e332e6 11164 if (h->u.weakdef != NULL)
252b5132 11165 {
f6e332e6
AM		 11166 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11167 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11168 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11169 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11170 return TRUE;
252b5132
RH		 11171 }
11172
ba93b8ac
DJ		 11173 /* If there are no non-GOT references, we do not need a copy
11174 relocation. */
11175 if (!h->non_got_ref)
11176 return TRUE;
11177
252b5132
RH		 11178 /* This is a reference to a symbol defined by a dynamic object which
11179 is not a function. */
11180
11181 /* If we are creating a shared library, we must presume that the
11182 only references to the symbol are via the global offset table.
11183 For such cases we need not do anything here; the relocations will
67687978
PB		 11184 be handled correctly by relocate_section. Relocatable executables
11185 can reference data in shared objects directly, so we don't need to
11186 do anything here. */
11187 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11188 return TRUE;
252b5132 11189
909272ee
AM		 11190 if (h->size == 0)
11191 {
11192 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11193 h->root.root.string);
11194 return TRUE;
11195 }
11196
252b5132
RH		 11197 /* We must allocate the symbol in our .dynbss section, which will
11198 become part of the .bss section of the executable. There will be
11199 an entry for this symbol in the .dynsym section. The dynamic
11200 object will contain position independent code, so all references
11201 from the dynamic object to this symbol will go through the global
11202 offset table. The dynamic linker will use the .dynsym entry to
11203 determine the address it must put in the global offset table, so
11204 both the dynamic object and the regular object will refer to the
11205 same memory location for the variable. */
252b5132
RH		 11206 s = bfd_get_section_by_name (dynobj, ".dynbss");
11207 BFD_ASSERT (s != NULL);
11208
11209 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11210 copy the initial value out of the dynamic object and into the
11211 runtime process image. We need to remember the offset into the
00a97672 11212 .rel(a).bss section we are going to use. */
252b5132
RH		 11213 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11214 {
11215 asection *srel;
11216
00a97672 11217 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11218 BFD_ASSERT (srel != NULL);
00a97672 11219 srel->size += RELOC_SIZE (globals);
f5385ebf 11220 h->needs_copy = 1;
252b5132
RH		 11221 }
11222
027297b7 11223 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11224}
11225
5e681ec4
PB		 11226/* Allocate space in .plt, .got and associated reloc sections for
11227 dynamic relocs. */
11228
11229static bfd_boolean
57e8b36a 11230allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11231{
11232 struct bfd_link_info *info;
11233 struct elf32_arm_link_hash_table *htab;
11234 struct elf32_arm_link_hash_entry *eh;
11235 struct elf32_arm_relocs_copied *p;
bd97cb95 11236 bfd_signed_vma thumb_refs;
5e681ec4 11237
b7693d02
DJ		 11238 eh = (struct elf32_arm_link_hash_entry *) h;
11239
5e681ec4
PB		 11240 if (h->root.type == bfd_link_hash_indirect)
11241 return TRUE;
11242
11243 if (h->root.type == bfd_link_hash_warning)
11244 /* When warning symbols are created, they **replace** the "real"
11245 entry in the hash table, thus we never get to see the real
11246 symbol in a hash traversal. So look at it now. */
11247 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11248
11249 info = (struct bfd_link_info *) inf;
11250 htab = elf32_arm_hash_table (info);
11251
11252 if (htab->root.dynamic_sections_created
11253 && h->plt.refcount > 0)
11254 {
11255 /* Make sure this symbol is output as a dynamic symbol.
11256 Undefined weak syms won't yet be marked as dynamic. */
11257 if (h->dynindx == -1
f5385ebf 11258 && !h->forced_local)
5e681ec4 11259 {
c152c796 11260 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11261 return FALSE;
11262 }
11263
11264 if (info->shared
7359ea65 11265 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11266 {
11267 asection *s = htab->splt;
11268
11269 /* If this is the first .plt entry, make room for the special
11270 first entry. */
eea6121a 11271 if (s->size == 0)
e5a52504 11272 s->size += htab->plt_header_size;
5e681ec4 11273
eea6121a 11274 h->plt.offset = s->size;
5e681ec4 11275
b7693d02
DJ		 11276 /* If we will insert a Thumb trampoline before this PLT, leave room
11277 for it. */
bd97cb95
DJ		 11278 thumb_refs = eh->plt_thumb_refcount;
11279 if (!htab->use_blx)
11280 thumb_refs += eh->plt_maybe_thumb_refcount;
11281
11282 if (thumb_refs > 0)
b7693d02
DJ		 11283 {
11284 h->plt.offset += PLT_THUMB_STUB_SIZE;
11285 s->size += PLT_THUMB_STUB_SIZE;
11286 }
11287
5e681ec4
PB		 11288 /* If this symbol is not defined in a regular file, and we are
11289 not generating a shared library, then set the symbol to this
11290 location in the .plt. This is required to make function
11291 pointers compare as equal between the normal executable and
11292 the shared library. */
11293 if (! info->shared
f5385ebf 11294 && !h->def_regular)
5e681ec4
PB		 11295 {
11296 h->root.u.def.section = s;
11297 h->root.u.def.value = h->plt.offset;
11298 }
11299
022f8312
CL		 11300 /* Make sure the function is not marked as Thumb, in case
11301 it is the target of an ABS32 relocation, which will
11302 point to the PLT entry. */
11303 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11304 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11305
5e681ec4 11306 /* Make room for this entry. */
e5a52504 11307 s->size += htab->plt_entry_size;
5e681ec4 11308
e5a52504 11309 if (!htab->symbian_p)
b7693d02
DJ		 11310 {
11311 /* We also need to make an entry in the .got.plt section, which
11312 will be placed in the .got section by the linker script. */
11313 eh->plt_got_offset = htab->sgotplt->size;
11314 htab->sgotplt->size += 4;
11315 }
5e681ec4 11316
00a97672
RS		 11317 /* We also need to make an entry in the .rel(a).plt section. */
11318 htab->srelplt->size += RELOC_SIZE (htab);
11319
11320 /* VxWorks executables have a second set of relocations for
11321 each PLT entry. They go in a separate relocation section,
11322 which is processed by the kernel loader. */
11323 if (htab->vxworks_p && !info->shared)
11324 {
11325 /* There is a relocation for the initial PLT entry:
11326 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11327 if (h->plt.offset == htab->plt_header_size)
11328 htab->srelplt2->size += RELOC_SIZE (htab);
11329
11330 /* There are two extra relocations for each subsequent
11331 PLT entry: an R_ARM_32 relocation for the GOT entry,
11332 and an R_ARM_32 relocation for the PLT entry. */
11333 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11334 }
5e681ec4
PB		 11335 }
11336 else
11337 {
11338 h->plt.offset = (bfd_vma) -1;
f5385ebf 11339 h->needs_plt = 0;
5e681ec4
PB		 11340 }
11341 }
11342 else
11343 {
11344 h->plt.offset = (bfd_vma) -1;
f5385ebf 11345 h->needs_plt = 0;
5e681ec4
PB		 11346 }
11347
11348 if (h->got.refcount > 0)
11349 {
11350 asection *s;
11351 bfd_boolean dyn;
ba93b8ac
DJ		 11352 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11353 int indx;
5e681ec4
PB		 11354
11355 /* Make sure this symbol is output as a dynamic symbol.
11356 Undefined weak syms won't yet be marked as dynamic. */
11357 if (h->dynindx == -1
f5385ebf 11358 && !h->forced_local)
5e681ec4 11359 {
c152c796 11360 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11361 return FALSE;
11362 }
11363
e5a52504
MM		 11364 if (!htab->symbian_p)
11365 {
11366 s = htab->sgot;
11367 h->got.offset = s->size;
ba93b8ac
DJ		 11368
11369 if (tls_type == GOT_UNKNOWN)
11370 abort ();
11371
11372 if (tls_type == GOT_NORMAL)
11373 /* Non-TLS symbols need one GOT slot. */
11374 s->size += 4;
11375 else
11376 {
11377 if (tls_type & GOT_TLS_GD)
11378 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11379 s->size += 8;
11380 if (tls_type & GOT_TLS_IE)
11381 /* R_ARM_TLS_IE32 needs one GOT slot. */
11382 s->size += 4;
11383 }
11384
e5a52504 11385 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11386
11387 indx = 0;
11388 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11389 && (!info->shared
11390 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11391 indx = h->dynindx;
11392
11393 if (tls_type != GOT_NORMAL
11394 && (info->shared || indx != 0)
11395 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11396 || h->root.type != bfd_link_hash_undefweak))
11397 {
11398 if (tls_type & GOT_TLS_IE)
00a97672 11399 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11400
11401 if (tls_type & GOT_TLS_GD)
00a97672 11402 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11403
11404 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11405 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11406 }
11407 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11408 || h->root.type != bfd_link_hash_undefweak)
11409 && (info->shared
11410 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11411 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11412 }
5e681ec4
PB		 11413 }
11414 else
11415 h->got.offset = (bfd_vma) -1;
11416
a4fd1a8e
PB		 11417 /* Allocate stubs for exported Thumb functions on v4t. */
11418 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11419 && h->def_regular
a4fd1a8e
PB		 11420 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11421 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11422 {
11423 struct elf_link_hash_entry * th;
11424 struct bfd_link_hash_entry * bh;
11425 struct elf_link_hash_entry * myh;
11426 char name[1024];
11427 asection *s;
11428 bh = NULL;
11429 /* Create a new symbol to regist the real location of the function. */
11430 s = h->root.u.def.section;
906e58ca 11431 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11432 _bfd_generic_link_add_one_symbol (info, s->owner,
11433 name, BSF_GLOBAL, s,
11434 h->root.u.def.value,
11435 NULL, TRUE, FALSE, &bh);
11436
11437 myh = (struct elf_link_hash_entry *) bh;
11438 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11439 myh->forced_local = 1;
11440 eh->export_glue = myh;
11441 th = record_arm_to_thumb_glue (info, h);
11442 /* Point the symbol at the stub. */
11443 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11444 h->root.u.def.section = th->root.u.def.section;
11445 h->root.u.def.value = th->root.u.def.value & ~1;
11446 }
11447
5e681ec4
PB		 11448 if (eh->relocs_copied == NULL)
11449 return TRUE;
11450
11451 /* In the shared -Bsymbolic case, discard space allocated for
11452 dynamic pc-relative relocs against symbols which turn out to be
11453 defined in regular objects. For the normal shared case, discard
11454 space for pc-relative relocs that have become local due to symbol
11455 visibility changes. */
11456
67687978 11457 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11458 {
7bdca076 11459 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11460 R_ARM_REL32_NOI, which will appear on something like
11461 ".long foo - .". We want calls to protected symbols to resolve
11462 directly to the function rather than going via the plt. If people
11463 want function pointer comparisons to work as expected then they
11464 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11465 if (SYMBOL_CALLS_LOCAL (info, h))
11466 {
11467 struct elf32_arm_relocs_copied **pp;
11468
11469 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11470 {
11471 p->count -= p->pc_count;
11472 p->pc_count = 0;
11473 if (p->count == 0)
11474 *pp = p->next;
11475 else
11476 pp = &p->next;
11477 }
11478 }
11479
3348747a
NS		 11480 if (elf32_arm_hash_table (info)->vxworks_p)
11481 {
11482 struct elf32_arm_relocs_copied **pp;
11483
11484 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11485 {
11486 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11487 *pp = p->next;
11488 else
11489 pp = &p->next;
11490 }
11491 }
11492
ba93b8ac 11493 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11494 visibility. */
22d606e9 11495 if (eh->relocs_copied != NULL
5e681ec4 11496 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11497 {
11498 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11499 eh->relocs_copied = NULL;
11500
11501 /* Make sure undefined weak symbols are output as a dynamic
11502 symbol in PIEs. */
11503 else if (h->dynindx == -1
11504 && !h->forced_local)
11505 {
11506 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11507 return FALSE;
11508 }
11509 }
11510
67687978
PB		 11511 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11512 && h->root.type == bfd_link_hash_new)
11513 {
11514 /* Output absolute symbols so that we can create relocations
11515 against them. For normal symbols we output a relocation
11516 against the section that contains them. */
11517 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11518 return FALSE;
11519 }
11520
5e681ec4
PB		 11521 }
11522 else
11523 {
11524 /* For the non-shared case, discard space for relocs against
11525 symbols which turn out to need copy relocs or are not
11526 dynamic. */
11527
f5385ebf
AM		 11528 if (!h->non_got_ref
11529 && ((h->def_dynamic
11530 && !h->def_regular)
5e681ec4
PB		 11531 || (htab->root.dynamic_sections_created
11532 && (h->root.type == bfd_link_hash_undefweak
11533 || h->root.type == bfd_link_hash_undefined))))
11534 {
11535 /* Make sure this symbol is output as a dynamic symbol.
11536 Undefined weak syms won't yet be marked as dynamic. */
11537 if (h->dynindx == -1
f5385ebf 11538 && !h->forced_local)
5e681ec4 11539 {
c152c796 11540 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11541 return FALSE;
11542 }
11543
11544 /* If that succeeded, we know we'll be keeping all the
11545 relocs. */
11546 if (h->dynindx != -1)
11547 goto keep;
11548 }
11549
11550 eh->relocs_copied = NULL;
11551
11552 keep: ;
11553 }
11554
11555 /* Finally, allocate space. */
11556 for (p = eh->relocs_copied; p != NULL; p = p->next)
11557 {
11558 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11559 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11560 }
11561
11562 return TRUE;
11563}
11564
08d1f311
DJ		 11565/* Find any dynamic relocs that apply to read-only sections. */
11566
11567static bfd_boolean
8029a119 11568elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11569{
8029a119
NC		 11570 struct elf32_arm_link_hash_entry * eh;
11571 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11572
11573 if (h->root.type == bfd_link_hash_warning)
11574 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11575
11576 eh = (struct elf32_arm_link_hash_entry *) h;
11577 for (p = eh->relocs_copied; p != NULL; p = p->next)
11578 {
11579 asection *s = p->section;
11580
11581 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11582 {
11583 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11584
11585 info->flags |= DF_TEXTREL;
11586
11587 /* Not an error, just cut short the traversal. */
11588 return FALSE;
11589 }
11590 }
11591 return TRUE;
11592}
11593
d504ffc8
DJ		 11594void
11595bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11596 int byteswap_code)
11597{
11598 struct elf32_arm_link_hash_table *globals;
11599
11600 globals = elf32_arm_hash_table (info);
11601 globals->byteswap_code = byteswap_code;
11602}
11603
252b5132
RH		 11604/* Set the sizes of the dynamic sections. */
11605
b34976b6 11606static bfd_boolean
57e8b36a
NC		 11607elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11608 struct bfd_link_info * info)
252b5132
RH		 11609{
11610 bfd * dynobj;
11611 asection * s;
b34976b6
AM		 11612 bfd_boolean plt;
11613 bfd_boolean relocs;
5e681ec4
PB		 11614 bfd *ibfd;
11615 struct elf32_arm_link_hash_table *htab;
252b5132 11616
5e681ec4 11617 htab = elf32_arm_hash_table (info);
252b5132
RH		 11618 dynobj = elf_hash_table (info)->dynobj;
11619 BFD_ASSERT (dynobj != NULL);
39b41c9c 11620 check_use_blx (htab);
252b5132
RH		 11621
11622 if (elf_hash_table (info)->dynamic_sections_created)
11623 {
11624 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11625 if (info->executable)
252b5132
RH		 11626 {
11627 s = bfd_get_section_by_name (dynobj, ".interp");
11628 BFD_ASSERT (s != NULL);
eea6121a 11629 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11630 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11631 }
11632 }
5e681ec4
PB		 11633
11634 /* Set up .got offsets for local syms, and space for local dynamic
11635 relocs. */
11636 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11637 {
5e681ec4
PB		 11638 bfd_signed_vma *local_got;
11639 bfd_signed_vma *end_local_got;
11640 char *local_tls_type;
11641 bfd_size_type locsymcount;
11642 Elf_Internal_Shdr *symtab_hdr;
11643 asection *srel;
3348747a 11644 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 11645
0ffa91dd 11646 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11647 continue;
11648
11649 for (s = ibfd->sections; s != NULL; s = s->next)
11650 {
11651 struct elf32_arm_relocs_copied *p;
11652
6edfbbad 11653 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11654 {
11655 if (!bfd_is_abs_section (p->section)
11656 && bfd_is_abs_section (p->section->output_section))
11657 {
11658 /* Input section has been discarded, either because
11659 it is a copy of a linkonce section or due to
11660 linker script /DISCARD/, so we'll be discarding
11661 the relocs too. */
11662 }
3348747a
NS		 11663 else if (is_vxworks
11664 && strcmp (p->section->output_section->name,
11665 ".tls_vars") == 0)
11666 {
11667 /* Relocations in vxworks .tls_vars sections are
11668 handled specially by the loader. */
11669 }
5e681ec4
PB		 11670 else if (p->count != 0)
11671 {
11672 srel = elf_section_data (p->section)->sreloc;
00a97672 11673 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11674 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11675 info->flags |= DF_TEXTREL;
11676 }
11677 }
11678 }
11679
11680 local_got = elf_local_got_refcounts (ibfd);
11681 if (!local_got)
11682 continue;
11683
0ffa91dd 11684 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11685 locsymcount = symtab_hdr->sh_info;
11686 end_local_got = local_got + locsymcount;
ba93b8ac 11687 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11688 s = htab->sgot;
11689 srel = htab->srelgot;
11690 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11691 {
11692 if (*local_got > 0)
11693 {
eea6121a 11694 *local_got = s->size;
ba93b8ac
DJ		 11695 if (*local_tls_type & GOT_TLS_GD)
11696 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11697 s->size += 8;
11698 if (*local_tls_type & GOT_TLS_IE)
11699 s->size += 4;
11700 if (*local_tls_type == GOT_NORMAL)
11701 s->size += 4;
11702
11703 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11704 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11705 }
11706 else
11707 *local_got = (bfd_vma) -1;
11708 }
252b5132
RH		 11709 }
11710
ba93b8ac
DJ		 11711 if (htab->tls_ldm_got.refcount > 0)
11712 {
11713 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11714 for R_ARM_TLS_LDM32 relocations. */
11715 htab->tls_ldm_got.offset = htab->sgot->size;
11716 htab->sgot->size += 8;
11717 if (info->shared)
00a97672 11718 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11719 }
11720 else
11721 htab->tls_ldm_got.offset = -1;
11722
5e681ec4
PB		 11723 /* Allocate global sym .plt and .got entries, and space for global
11724 sym dynamic relocs. */
57e8b36a 11725 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 11726
d504ffc8
DJ		 11727 /* Here we rummage through the found bfds to collect glue information. */
11728 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 11729 {
0ffa91dd 11730 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 11731 continue;
11732
c7b8f16e
JB		 11733 /* Initialise mapping tables for code/data. */
11734 bfd_elf32_arm_init_maps (ibfd);
906e58ca 11735
c7b8f16e
JB		 11736 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
11737 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
11738 /* xgettext:c-format */
11739 _bfd_error_handler (_("Errors encountered processing file %s"),
11740 ibfd->filename);
11741 }
d504ffc8 11742
3e6b1042
DJ		 11743 /* Allocate space for the glue sections now that we've sized them. */
11744 bfd_elf32_arm_allocate_interworking_sections (info);
11745
252b5132
RH		 11746 /* The check_relocs and adjust_dynamic_symbol entry points have
11747 determined the sizes of the various dynamic sections. Allocate
11748 memory for them. */
b34976b6
AM		 11749 plt = FALSE;
11750 relocs = FALSE;
252b5132
RH		 11751 for (s = dynobj->sections; s != NULL; s = s->next)
11752 {
11753 const char * name;
252b5132
RH		 11754
11755 if ((s->flags & SEC_LINKER_CREATED) == 0)
11756 continue;
11757
11758 /* It's OK to base decisions on the section name, because none
11759 of the dynobj section names depend upon the input files. */
11760 name = bfd_get_section_name (dynobj, s);
11761
24a1ba0f 11762 if (strcmp (name, ".plt") == 0)
252b5132 11763 {
c456f082
AM		 11764 /* Remember whether there is a PLT. */
11765 plt = s->size != 0;
252b5132 11766 }
0112cd26 11767 else if (CONST_STRNEQ (name, ".rel"))
252b5132 11768 {
c456f082 11769 if (s->size != 0)
252b5132 11770 {
252b5132 11771 /* Remember whether there are any reloc sections other
00a97672
RS		 11772 than .rel(a).plt and .rela.plt.unloaded. */
11773 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 11774 relocs = TRUE;
252b5132
RH		 11775
11776 /* We use the reloc_count field as a counter if we need
11777 to copy relocs into the output file. */
11778 s->reloc_count = 0;
11779 }
11780 }
0112cd26 11781 else if (! CONST_STRNEQ (name, ".got")
c456f082 11782 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 11783 {
11784 /* It's not one of our sections, so don't allocate space. */
11785 continue;
11786 }
11787
c456f082 11788 if (s->size == 0)
252b5132 11789 {
c456f082 11790 /* If we don't need this section, strip it from the
00a97672
RS		 11791 output file. This is mostly to handle .rel(a).bss and
11792 .rel(a).plt. We must create both sections in
c456f082
AM		 11793 create_dynamic_sections, because they must be created
11794 before the linker maps input sections to output
11795 sections. The linker does that before
11796 adjust_dynamic_symbol is called, and it is that
11797 function which decides whether anything needs to go
11798 into these sections. */
8423293d 11799 s->flags |= SEC_EXCLUDE;
252b5132
RH		 11800 continue;
11801 }
11802
c456f082
AM		 11803 if ((s->flags & SEC_HAS_CONTENTS) == 0)
11804 continue;
11805
252b5132 11806 /* Allocate memory for the section contents. */
906e58ca 11807 s->contents = bfd_zalloc (dynobj, s->size);
c456f082 11808 if (s->contents == NULL)
b34976b6 11809 return FALSE;
252b5132
RH		 11810 }
11811
11812 if (elf_hash_table (info)->dynamic_sections_created)
11813 {
11814 /* Add some entries to the .dynamic section. We fill in the
11815 values later, in elf32_arm_finish_dynamic_sections, but we
11816 must add the entries now so that we get the correct size for
11817 the .dynamic section. The DT_DEBUG entry is filled in by the
11818 dynamic linker and used by the debugger. */
dc810e39 11819#define add_dynamic_entry(TAG, VAL) \
5a580b3a 11820 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 11821
8532796c 11822 if (info->executable)
252b5132 11823 {
dc810e39 11824 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 11825 return FALSE;
252b5132
RH		 11826 }
11827
11828 if (plt)
11829 {
dc810e39
AM		 11830 if ( !add_dynamic_entry (DT_PLTGOT, 0)
11831 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 11832 || !add_dynamic_entry (DT_PLTREL,
11833 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 11834 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 11835 return FALSE;
252b5132
RH		 11836 }
11837
11838 if (relocs)
11839 {
00a97672
RS		 11840 if (htab->use_rel)
11841 {
11842 if (!add_dynamic_entry (DT_REL, 0)
11843 || !add_dynamic_entry (DT_RELSZ, 0)
11844 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
11845 return FALSE;
11846 }
11847 else
11848 {
11849 if (!add_dynamic_entry (DT_RELA, 0)
11850 || !add_dynamic_entry (DT_RELASZ, 0)
11851 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
11852 return FALSE;
11853 }
252b5132
RH		 11854 }
11855
08d1f311
DJ		 11856 /* If any dynamic relocs apply to a read-only section,
11857 then we need a DT_TEXTREL entry. */
11858 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 11859 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
11860 info);
08d1f311 11861
99e4ae17 11862 if ((info->flags & DF_TEXTREL) != 0)
252b5132 11863 {
dc810e39 11864 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 11865 return FALSE;
252b5132 11866 }
7a2b07ff
NS		 11867 if (htab->vxworks_p
11868 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
11869 return FALSE;
252b5132 11870 }
8532796c 11871#undef add_dynamic_entry
252b5132 11872
b34976b6 11873 return TRUE;
252b5132
RH		 11874}
11875
252b5132
RH		 11876/* Finish up dynamic symbol handling. We set the contents of various
11877 dynamic sections here. */
11878
b34976b6 11879static bfd_boolean
906e58ca
NC		 11880elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
11881 struct bfd_link_info * info,
11882 struct elf_link_hash_entry * h,
11883 Elf_Internal_Sym * sym)
252b5132
RH		 11884{
11885 bfd * dynobj;
e5a52504 11886 struct elf32_arm_link_hash_table *htab;
b7693d02 11887 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 11888
11889 dynobj = elf_hash_table (info)->dynobj;
e5a52504 11890 htab = elf32_arm_hash_table (info);
b7693d02 11891 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 11892
11893 if (h->plt.offset != (bfd_vma) -1)
11894 {
11895 asection * splt;
252b5132 11896 asection * srel;
e5a52504 11897 bfd_byte *loc;
24a1ba0f 11898 bfd_vma plt_index;
947216bf 11899 Elf_Internal_Rela rel;
252b5132
RH		 11900
11901 /* This symbol has an entry in the procedure linkage table. Set
11902 it up. */
11903
11904 BFD_ASSERT (h->dynindx != -1);
11905
11906 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 11907 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 11908 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 11909
e5a52504
MM		 11910 /* Fill in the entry in the procedure linkage table. */
11911 if (htab->symbian_p)
11912 {
906e58ca 11913 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 11914 elf32_arm_symbian_plt_entry[0],
11915 splt->contents + h->plt.offset);
906e58ca 11916 bfd_put_32 (output_bfd,
52ab56c2
PB		 11917 elf32_arm_symbian_plt_entry[1],
11918 splt->contents + h->plt.offset + 4);
906e58ca 11919
e5a52504 11920 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 11921 rel.r_offset = (splt->output_section->vma
11922 + splt->output_offset
52ab56c2 11923 + h->plt.offset + 4);
e5a52504 11924 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 11925
11926 /* Get the index in the procedure linkage table which
11927 corresponds to this symbol. This is the index of this symbol
11928 in all the symbols for which we are making plt entries. The
11929 first entry in the procedure linkage table is reserved. */
906e58ca 11930 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 11931 / htab->plt_entry_size);
e5a52504
MM		 11932 }
11933 else
11934 {
00a97672 11935 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 11936 bfd_vma got_displacement;
11937 asection * sgot;
52ab56c2 11938 bfd_byte * ptr;
906e58ca 11939
e5a52504
MM		 11940 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
11941 BFD_ASSERT (sgot != NULL);
11942
b7693d02
DJ		 11943 /* Get the offset into the .got.plt table of the entry that
11944 corresponds to this function. */
11945 got_offset = eh->plt_got_offset;
11946
11947 /* Get the index in the procedure linkage table which
11948 corresponds to this symbol. This is the index of this symbol
11949 in all the symbols for which we are making plt entries. The
11950 first three entries in .got.plt are reserved; after that
11951 symbols appear in the same order as in .plt. */
11952 plt_index = (got_offset - 12) / 4;
e5a52504 11953
00a97672
RS		 11954 /* Calculate the address of the GOT entry. */
11955 got_address = (sgot->output_section->vma
11956 + sgot->output_offset
11957 + got_offset);
5e681ec4 11958
00a97672
RS		 11959 /* ...and the address of the PLT entry. */
11960 plt_address = (splt->output_section->vma
11961 + splt->output_offset
11962 + h->plt.offset);
5e681ec4 11963
52ab56c2 11964 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 11965 if (htab->vxworks_p && info->shared)
11966 {
11967 unsigned int i;
11968 bfd_vma val;
11969
52ab56c2 11970 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11971 {
11972 val = elf32_arm_vxworks_shared_plt_entry[i];
11973 if (i == 2)
11974 val |= got_address - sgot->output_section->vma;
11975 if (i == 5)
11976 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11977 if (i == 2 || i == 5)
11978 bfd_put_32 (output_bfd, val, ptr);
11979 else
11980 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 11981 }
11982 }
11983 else if (htab->vxworks_p)
b7693d02 11984 {
00a97672
RS		 11985 unsigned int i;
11986 bfd_vma val;
11987
d3753b85 11988 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 11989 {
11990 val = elf32_arm_vxworks_exec_plt_entry[i];
11991 if (i == 2)
11992 val |= got_address;
11993 if (i == 4)
11994 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
11995 if (i == 5)
11996 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 11997 if (i == 2 || i == 5)
11998 bfd_put_32 (output_bfd, val, ptr);
11999 else
12000 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12001 }
12002
12003 loc = (htab->srelplt2->contents
12004 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12005
12006 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12007 referencing the GOT for this PLT entry. */
12008 rel.r_offset = plt_address + 8;
12009 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12010 rel.r_addend = got_offset;
12011 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12012 loc += RELOC_SIZE (htab);
12013
12014 /* Create the R_ARM_ABS32 relocation referencing the
12015 beginning of the PLT for this GOT entry. */
12016 rel.r_offset = got_address;
12017 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12018 rel.r_addend = 0;
12019 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12020 }
00a97672
RS		 12021 else
12022 {
bd97cb95 12023 bfd_signed_vma thumb_refs;
00a97672
RS		 12024 /* Calculate the displacement between the PLT slot and the
12025 entry in the GOT. The eight-byte offset accounts for the
12026 value produced by adding to pc in the first instruction
12027 of the PLT stub. */
12028 got_displacement = got_address - (plt_address + 8);
b7693d02 12029
00a97672
RS		 12030 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12031
bd97cb95
DJ		 12032 thumb_refs = eh->plt_thumb_refcount;
12033 if (!htab->use_blx)
12034 thumb_refs += eh->plt_maybe_thumb_refcount;
12035
12036 if (thumb_refs > 0)
00a97672 12037 {
52ab56c2
PB		 12038 put_thumb_insn (htab, output_bfd,
12039 elf32_arm_plt_thumb_stub[0], ptr - 4);
12040 put_thumb_insn (htab, output_bfd,
12041 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12042 }
12043
52ab56c2
PB		 12044 put_arm_insn (htab, output_bfd,
12045 elf32_arm_plt_entry[0]
12046 | ((got_displacement & 0x0ff00000) >> 20),
12047 ptr + 0);
12048 put_arm_insn (htab, output_bfd,
12049 elf32_arm_plt_entry[1]
12050 | ((got_displacement & 0x000ff000) >> 12),
12051 ptr+ 4);
12052 put_arm_insn (htab, output_bfd,
12053 elf32_arm_plt_entry[2]
12054 | (got_displacement & 0x00000fff),
12055 ptr + 8);
5e681ec4 12056#ifdef FOUR_WORD_PLT
52ab56c2 12057 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12058#endif
00a97672 12059 }
252b5132 12060
e5a52504
MM		 12061 /* Fill in the entry in the global offset table. */
12062 bfd_put_32 (output_bfd,
12063 (splt->output_section->vma
12064 + splt->output_offset),
12065 sgot->contents + got_offset);
906e58ca 12066
00a97672
RS		 12067 /* Fill in the entry in the .rel(a).plt section. */
12068 rel.r_addend = 0;
12069 rel.r_offset = got_address;
e5a52504
MM		 12070 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12071 }
57e8b36a 12072
00a97672
RS		 12073 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12074 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12075
f5385ebf 12076 if (!h->def_regular)
252b5132
RH		 12077 {
12078 /* Mark the symbol as undefined, rather than as defined in
12079 the .plt section. Leave the value alone. */
12080 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12081 /* If the symbol is weak, we do need to clear the value.
12082 Otherwise, the PLT entry would provide a definition for
12083 the symbol even if the symbol wasn't defined anywhere,
12084 and so the symbol would never be NULL. */
f5385ebf 12085 if (!h->ref_regular_nonweak)
d982ba73 12086 sym->st_value = 0;
252b5132
RH		 12087 }
12088 }
12089
ba93b8ac
DJ		 12090 if (h->got.offset != (bfd_vma) -1
12091 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12092 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12093 {
12094 asection * sgot;
12095 asection * srel;
947216bf
AM		 12096 Elf_Internal_Rela rel;
12097 bfd_byte *loc;
00a97672 12098 bfd_vma offset;
252b5132
RH		 12099
12100 /* This symbol has an entry in the global offset table. Set it
12101 up. */
252b5132 12102 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12103 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12104 BFD_ASSERT (sgot != NULL && srel != NULL);
12105
00a97672
RS		 12106 offset = (h->got.offset & ~(bfd_vma) 1);
12107 rel.r_addend = 0;
252b5132
RH		 12108 rel.r_offset = (sgot->output_section->vma
12109 + sgot->output_offset
00a97672 12110 + offset);
252b5132 12111
5e681ec4
PB		 12112 /* If this is a static link, or it is a -Bsymbolic link and the
12113 symbol is defined locally or was forced to be local because
12114 of a version file, we just want to emit a RELATIVE reloc.
12115 The entry in the global offset table will already have been
12116 initialized in the relocate_section function. */
252b5132 12117 if (info->shared
5e681ec4
PB		 12118 && SYMBOL_REFERENCES_LOCAL (info, h))
12119 {
906e58ca 12120 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12121 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12122 if (!htab->use_rel)
12123 {
12124 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12125 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12126 }
5e681ec4 12127 }
252b5132
RH		 12128 else
12129 {
906e58ca 12130 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12131 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12132 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12133 }
12134
00a97672
RS		 12135 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12136 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12137 }
12138
f5385ebf 12139 if (h->needs_copy)
252b5132
RH		 12140 {
12141 asection * s;
947216bf
AM		 12142 Elf_Internal_Rela rel;
12143 bfd_byte *loc;
252b5132
RH		 12144
12145 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12146 BFD_ASSERT (h->dynindx != -1
12147 && (h->root.type == bfd_link_hash_defined
12148 || h->root.type == bfd_link_hash_defweak));
12149
12150 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12151 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12152 BFD_ASSERT (s != NULL);
12153
00a97672 12154 rel.r_addend = 0;
252b5132
RH		 12155 rel.r_offset = (h->root.u.def.value
12156 + h->root.u.def.section->output_section->vma
12157 + h->root.u.def.section->output_offset);
12158 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12159 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12160 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12161 }
12162
00a97672
RS		 12163 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12164 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12165 to the ".got" section. */
252b5132 12166 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12167 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12168 sym->st_shndx = SHN_ABS;
12169
b34976b6 12170 return TRUE;
252b5132
RH		 12171}
12172
12173/* Finish up the dynamic sections. */
12174
b34976b6 12175static bfd_boolean
57e8b36a 12176elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12177{
12178 bfd * dynobj;
12179 asection * sgot;
12180 asection * sdyn;
12181
12182 dynobj = elf_hash_table (info)->dynobj;
12183
12184 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 12185 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 12186 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12187
12188 if (elf_hash_table (info)->dynamic_sections_created)
12189 {
12190 asection *splt;
12191 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 12192 struct elf32_arm_link_hash_table *htab;
252b5132 12193
229fcec5 12194 htab = elf32_arm_hash_table (info);
252b5132 12195 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12196 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12197
12198 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12199 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12200
252b5132
RH		 12201 for (; dyncon < dynconend; dyncon++)
12202 {
12203 Elf_Internal_Dyn dyn;
12204 const char * name;
12205 asection * s;
12206
12207 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12208
12209 switch (dyn.d_tag)
12210 {
229fcec5
MM		 12211 unsigned int type;
12212
252b5132 12213 default:
7a2b07ff
NS		 12214 if (htab->vxworks_p
12215 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12216 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12217 break;
12218
229fcec5
MM		 12219 case DT_HASH:
12220 name = ".hash";
12221 goto get_vma_if_bpabi;
12222 case DT_STRTAB:
12223 name = ".dynstr";
12224 goto get_vma_if_bpabi;
12225 case DT_SYMTAB:
12226 name = ".dynsym";
12227 goto get_vma_if_bpabi;
c0042f5d
MM		 12228 case DT_VERSYM:
12229 name = ".gnu.version";
12230 goto get_vma_if_bpabi;
12231 case DT_VERDEF:
12232 name = ".gnu.version_d";
12233 goto get_vma_if_bpabi;
12234 case DT_VERNEED:
12235 name = ".gnu.version_r";
12236 goto get_vma_if_bpabi;
12237
252b5132
RH		 12238 case DT_PLTGOT:
12239 name = ".got";
12240 goto get_vma;
12241 case DT_JMPREL:
00a97672 12242 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12243 get_vma:
12244 s = bfd_get_section_by_name (output_bfd, name);
12245 BFD_ASSERT (s != NULL);
229fcec5
MM		 12246 if (!htab->symbian_p)
12247 dyn.d_un.d_ptr = s->vma;
12248 else
12249 /* In the BPABI, tags in the PT_DYNAMIC section point
12250 at the file offset, not the memory address, for the
12251 convenience of the post linker. */
12252 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12253 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12254 break;
12255
229fcec5
MM		 12256 get_vma_if_bpabi:
12257 if (htab->symbian_p)
12258 goto get_vma;
12259 break;
12260
252b5132 12261 case DT_PLTRELSZ:
00a97672
RS		 12262 s = bfd_get_section_by_name (output_bfd,
12263 RELOC_SECTION (htab, ".plt"));
252b5132 12264 BFD_ASSERT (s != NULL);
eea6121a 12265 dyn.d_un.d_val = s->size;
252b5132
RH		 12266 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12267 break;
906e58ca 12268
252b5132 12269 case DT_RELSZ:
00a97672 12270 case DT_RELASZ:
229fcec5
MM		 12271 if (!htab->symbian_p)
12272 {
12273 /* My reading of the SVR4 ABI indicates that the
12274 procedure linkage table relocs (DT_JMPREL) should be
12275 included in the overall relocs (DT_REL). This is
12276 what Solaris does. However, UnixWare can not handle
12277 that case. Therefore, we override the DT_RELSZ entry
12278 here to make it not include the JMPREL relocs. Since
00a97672 12279 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12280 other relocation sections, we don't have to worry
12281 about changing the DT_REL entry. */
00a97672
RS		 12282 s = bfd_get_section_by_name (output_bfd,
12283 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12284 if (s != NULL)
12285 dyn.d_un.d_val -= s->size;
12286 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12287 break;
12288 }
8029a119 12289 /* Fall through. */
229fcec5
MM		 12290
12291 case DT_REL:
12292 case DT_RELA:
229fcec5
MM		 12293 /* In the BPABI, the DT_REL tag must point at the file
12294 offset, not the VMA, of the first relocation
12295 section. So, we use code similar to that in
12296 elflink.c, but do not check for SHF_ALLOC on the
12297 relcoation section, since relocations sections are
12298 never allocated under the BPABI. The comments above
12299 about Unixware notwithstanding, we include all of the
12300 relocations here. */
12301 if (htab->symbian_p)
12302 {
12303 unsigned int i;
12304 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12305 ? SHT_REL : SHT_RELA);
12306 dyn.d_un.d_val = 0;
12307 for (i = 1; i < elf_numsections (output_bfd); i++)
12308 {
906e58ca 12309 Elf_Internal_Shdr *hdr
229fcec5
MM		 12310 = elf_elfsections (output_bfd)[i];
12311 if (hdr->sh_type == type)
12312 {
906e58ca 12313 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12314 || dyn.d_tag == DT_RELASZ)
12315 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12316 else if ((ufile_ptr) hdr->sh_offset
12317 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12318 dyn.d_un.d_val = hdr->sh_offset;
12319 }
12320 }
12321 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12322 }
252b5132 12323 break;
88f7bcd5
NC		 12324
12325 /* Set the bottom bit of DT_INIT/FINI if the
12326 corresponding function is Thumb. */
12327 case DT_INIT:
12328 name = info->init_function;
12329 goto get_sym;
12330 case DT_FINI:
12331 name = info->fini_function;
12332 get_sym:
12333 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12334 then there is nothing to adjust. */
88f7bcd5
NC		 12335 if (dyn.d_un.d_val != 0)
12336 {
12337 struct elf_link_hash_entry * eh;
12338
12339 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12340 FALSE, FALSE, TRUE);
906e58ca 12341 if (eh != NULL
88f7bcd5
NC		 12342 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12343 {
12344 dyn.d_un.d_val |= 1;
b34976b6 12345 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12346 }
12347 }
12348 break;
252b5132
RH		 12349 }
12350 }
12351
24a1ba0f 12352 /* Fill in the first entry in the procedure linkage table. */
e5a52504 12353 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 12354 {
00a97672
RS		 12355 const bfd_vma *plt0_entry;
12356 bfd_vma got_address, plt_address, got_displacement;
12357
12358 /* Calculate the addresses of the GOT and PLT. */
12359 got_address = sgot->output_section->vma + sgot->output_offset;
12360 plt_address = splt->output_section->vma + splt->output_offset;
12361
12362 if (htab->vxworks_p)
12363 {
12364 /* The VxWorks GOT is relocated by the dynamic linker.
12365 Therefore, we must emit relocations rather than simply
12366 computing the values now. */
12367 Elf_Internal_Rela rel;
12368
12369 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12370 put_arm_insn (htab, output_bfd, plt0_entry[0],
12371 splt->contents + 0);
12372 put_arm_insn (htab, output_bfd, plt0_entry[1],
12373 splt->contents + 4);
12374 put_arm_insn (htab, output_bfd, plt0_entry[2],
12375 splt->contents + 8);
00a97672
RS		 12376 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12377
8029a119 12378 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12379 rel.r_offset = plt_address + 12;
12380 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12381 rel.r_addend = 0;
12382 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12383 htab->srelplt2->contents);
12384 }
12385 else
12386 {
12387 got_displacement = got_address - (plt_address + 16);
12388
12389 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12390 put_arm_insn (htab, output_bfd, plt0_entry[0],
12391 splt->contents + 0);
12392 put_arm_insn (htab, output_bfd, plt0_entry[1],
12393 splt->contents + 4);
12394 put_arm_insn (htab, output_bfd, plt0_entry[2],
12395 splt->contents + 8);
12396 put_arm_insn (htab, output_bfd, plt0_entry[3],
12397 splt->contents + 12);
5e681ec4 12398
5e681ec4 12399#ifdef FOUR_WORD_PLT
00a97672
RS		 12400 /* The displacement value goes in the otherwise-unused
12401 last word of the second entry. */
12402 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12403#else
00a97672 12404 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12405#endif
00a97672 12406 }
f7a74f8c 12407 }
252b5132
RH		 12408
12409 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12410 really seem like the right value. */
74541ad4
AM		 12411 if (splt->output_section->owner == output_bfd)
12412 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12413
12414 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12415 {
12416 /* Correct the .rel(a).plt.unloaded relocations. They will have
12417 incorrect symbol indexes. */
12418 int num_plts;
eed62c48 12419 unsigned char *p;
00a97672
RS		 12420
12421 num_plts = ((htab->splt->size - htab->plt_header_size)
12422 / htab->plt_entry_size);
12423 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12424
12425 for (; num_plts; num_plts--)
12426 {
12427 Elf_Internal_Rela rel;
12428
12429 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12430 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12431 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12432 p += RELOC_SIZE (htab);
12433
12434 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12435 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12436 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12437 p += RELOC_SIZE (htab);
12438 }
12439 }
252b5132
RH		 12440 }
12441
12442 /* Fill in the first three entries in the global offset table. */
229fcec5 12443 if (sgot)
252b5132 12444 {
229fcec5
MM		 12445 if (sgot->size > 0)
12446 {
12447 if (sdyn == NULL)
12448 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12449 else
12450 bfd_put_32 (output_bfd,
12451 sdyn->output_section->vma + sdyn->output_offset,
12452 sgot->contents);
12453 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12454 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12455 }
252b5132 12456
229fcec5
MM		 12457 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12458 }
252b5132 12459
b34976b6 12460 return TRUE;
252b5132
RH		 12461}
12462
ba96a88f 12463static void
57e8b36a 12464elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12465{
9b485d32 12466 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12467 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12468
12469 i_ehdrp = elf_elfheader (abfd);
12470
94a3258f
PB		 12471 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12472 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12473 else
12474 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12475 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12476
93204d3a
PB		 12477 if (link_info)
12478 {
12479 globals = elf32_arm_hash_table (link_info);
12480 if (globals->byteswap_code)
12481 i_ehdrp->e_flags |= EF_ARM_BE8;
12482 }
ba96a88f
NC		 12483}
12484
99e4ae17 12485static enum elf_reloc_type_class
57e8b36a 12486elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12487{
f51e552e 12488 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12489 {
12490 case R_ARM_RELATIVE:
12491 return reloc_class_relative;
12492 case R_ARM_JUMP_SLOT:
12493 return reloc_class_plt;
12494 case R_ARM_COPY:
12495 return reloc_class_copy;
12496 default:
12497 return reloc_class_normal;
12498 }
12499}
12500
e16bb312
NC		 12501/* Set the right machine number for an Arm ELF file. */
12502
12503static bfd_boolean
57e8b36a 12504elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12505{
12506 if (hdr->sh_type == SHT_NOTE)
12507 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12508
12509 return TRUE;
12510}
12511
e489d0ae 12512static void
57e8b36a 12513elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12514{
5a6c6817 12515 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12516}
12517
40a18ebd
NC		 12518/* Return TRUE if this is an unwinding table entry. */
12519
12520static bfd_boolean
12521is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12522{
0112cd26
NC		 12523 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12524 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12525}
12526
12527
12528/* Set the type and flags for an ARM section. We do this by
12529 the section name, which is a hack, but ought to work. */
12530
12531static bfd_boolean
12532elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12533{
12534 const char * name;
12535
12536 name = bfd_get_section_name (abfd, sec);
12537
12538 if (is_arm_elf_unwind_section_name (abfd, name))
12539 {
12540 hdr->sh_type = SHT_ARM_EXIDX;
12541 hdr->sh_flags |= SHF_LINK_ORDER;
12542 }
12543 return TRUE;
12544}
12545
6dc132d9
L		 12546/* Handle an ARM specific section when reading an object file. This is
12547 called when bfd_section_from_shdr finds a section with an unknown
12548 type. */
40a18ebd
NC		 12549
12550static bfd_boolean
12551elf32_arm_section_from_shdr (bfd *abfd,
12552 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12553 const char *name,
12554 int shindex)
40a18ebd
NC		 12555{
12556 /* There ought to be a place to keep ELF backend specific flags, but
12557 at the moment there isn't one. We just keep track of the
12558 sections by their name, instead. Fortunately, the ABI gives
12559 names for all the ARM specific sections, so we will probably get
12560 away with this. */
12561 switch (hdr->sh_type)
12562 {
12563 case SHT_ARM_EXIDX:
0951f019
RE		 12564 case SHT_ARM_PREEMPTMAP:
12565 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12566 break;
12567
12568 default:
12569 return FALSE;
12570 }
12571
6dc132d9 12572 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12573 return FALSE;
12574
12575 return TRUE;
12576}
e489d0ae 12577
8e3de13a
NC		 12578/* A structure used to record a list of sections, independently
12579 of the next and prev fields in the asection structure. */
12580typedef struct section_list
12581{
12582 asection * sec;
12583 struct section_list * next;
12584 struct section_list * prev;
12585}
12586section_list;
12587
12588/* Unfortunately we need to keep a list of sections for which
12589 an _arm_elf_section_data structure has been allocated. This
12590 is because it is possible for functions like elf32_arm_write_section
12591 to be called on a section which has had an elf_data_structure
12592 allocated for it (and so the used_by_bfd field is valid) but
12593 for which the ARM extended version of this structure - the
12594 _arm_elf_section_data structure - has not been allocated. */
12595static section_list * sections_with_arm_elf_section_data = NULL;
12596
12597static void
957c6e41 12598record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 12599{
12600 struct section_list * entry;
12601
957c6e41 12602 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 12603 if (entry == NULL)
12604 return;
12605 entry->sec = sec;
12606 entry->next = sections_with_arm_elf_section_data;
12607 entry->prev = NULL;
12608 if (entry->next != NULL)
12609 entry->next->prev = entry;
12610 sections_with_arm_elf_section_data = entry;
12611}
12612
44444f50
NC		 12613static struct section_list *
12614find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 12615{
12616 struct section_list * entry;
bd4aae00 12617 static struct section_list * last_entry = NULL;
8e3de13a 12618
bd4aae00
NC		 12619 /* This is a short cut for the typical case where the sections are added
12620 to the sections_with_arm_elf_section_data list in forward order and
12621 then looked up here in backwards order. This makes a real difference
12622 to the ld-srec/sec64k.exp linker test. */
44444f50 12623 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 12624 if (last_entry != NULL)
12625 {
12626 if (last_entry->sec == sec)
44444f50
NC		 12627 entry = last_entry;
12628 else if (last_entry->next != NULL
12629 && last_entry->next->sec == sec)
12630 entry = last_entry->next;
bd4aae00 12631 }
44444f50
NC		 12632
12633 for (; entry; entry = entry->next)
8e3de13a 12634 if (entry->sec == sec)
44444f50 12635 break;
bd4aae00 12636
44444f50
NC		 12637 if (entry)
12638 /* Record the entry prior to this one - it is the entry we are most
12639 likely to want to locate next time. Also this way if we have been
12640 called from unrecord_section_with_arm_elf_section_data() we will not
12641 be caching a pointer that is about to be freed. */
12642 last_entry = entry->prev;
12643
12644 return entry;
12645}
12646
12647static _arm_elf_section_data *
12648get_arm_elf_section_data (asection * sec)
12649{
12650 struct section_list * entry;
12651
12652 entry = find_arm_elf_section_entry (sec);
12653
12654 if (entry)
12655 return elf32_arm_section_data (entry->sec);
12656 else
12657 return NULL;
8e3de13a
NC		 12658}
12659
12660static void
12661unrecord_section_with_arm_elf_section_data (asection * sec)
12662{
12663 struct section_list * entry;
12664
44444f50
NC		 12665 entry = find_arm_elf_section_entry (sec);
12666
12667 if (entry)
12668 {
12669 if (entry->prev != NULL)
12670 entry->prev->next = entry->next;
12671 if (entry->next != NULL)
12672 entry->next->prev = entry->prev;
12673 if (entry == sections_with_arm_elf_section_data)
12674 sections_with_arm_elf_section_data = entry->next;
12675 free (entry);
12676 }
8e3de13a
NC		 12677}
12678
e489d0ae 12679
4e617b1e
PB		 12680typedef struct
12681{
12682 void *finfo;
12683 struct bfd_link_info *info;
91a5743d
PB		 12684 asection *sec;
12685 int sec_shndx;
6e0b88f1
AM		 12686 int (*func) (void *, const char *, Elf_Internal_Sym *,
12687 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12688} output_arch_syminfo;
12689
12690enum map_symbol_type
12691{
12692 ARM_MAP_ARM,
12693 ARM_MAP_THUMB,
12694 ARM_MAP_DATA
12695};
12696
12697
7413f23f 12698/* Output a single mapping symbol. */
4e617b1e
PB		 12699
12700static bfd_boolean
7413f23f
DJ		 12701elf32_arm_output_map_sym (output_arch_syminfo *osi,
12702 enum map_symbol_type type,
12703 bfd_vma offset)
4e617b1e
PB		 12704{
12705 static const char *names[3] = {"$a", "$t", "$d"};
12706 struct elf32_arm_link_hash_table *htab;
12707 Elf_Internal_Sym sym;
12708
12709 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 12710 sym.st_value = osi->sec->output_section->vma
12711 + osi->sec->output_offset
12712 + offset;
4e617b1e
PB		 12713 sym.st_size = 0;
12714 sym.st_other = 0;
12715 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12716 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12717 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12718}
12719
12720
12721/* Output mapping symbols for PLT entries associated with H. */
12722
12723static bfd_boolean
12724elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12725{
12726 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12727 struct elf32_arm_link_hash_table *htab;
12728 struct elf32_arm_link_hash_entry *eh;
12729 bfd_vma addr;
12730
12731 htab = elf32_arm_hash_table (osi->info);
12732
12733 if (h->root.type == bfd_link_hash_indirect)
12734 return TRUE;
12735
12736 if (h->root.type == bfd_link_hash_warning)
12737 /* When warning symbols are created, they **replace** the "real"
12738 entry in the hash table, thus we never get to see the real
12739 symbol in a hash traversal. So look at it now. */
12740 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12741
12742 if (h->plt.offset == (bfd_vma) -1)
12743 return TRUE;
12744
12745 eh = (struct elf32_arm_link_hash_entry *) h;
12746 addr = h->plt.offset;
12747 if (htab->symbian_p)
12748 {
7413f23f 12749 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12750 return FALSE;
7413f23f 12751 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12752 return FALSE;
12753 }
12754 else if (htab->vxworks_p)
12755 {
7413f23f 12756 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12757 return FALSE;
7413f23f 12758 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12759 return FALSE;
7413f23f 12760 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12761 return FALSE;
7413f23f 12762 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12763 return FALSE;
12764 }
12765 else
12766 {
bd97cb95
DJ		 12767 bfd_signed_vma thumb_refs;
12768
12769 thumb_refs = eh->plt_thumb_refcount;
12770 if (!htab->use_blx)
12771 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12772
bd97cb95 12773 if (thumb_refs > 0)
4e617b1e 12774 {
7413f23f 12775 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12776 return FALSE;
12777 }
12778#ifdef FOUR_WORD_PLT
7413f23f 12779 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12780 return FALSE;
7413f23f 12781 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12782 return FALSE;
12783#else
906e58ca 12784 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12785 so only need to output a mapping symbol for the first PLT entry and
12786 entries with thumb thunks. */
bd97cb95 12787 if (thumb_refs > 0 || addr == 20)
4e617b1e 12788 {
7413f23f 12789 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12790 return FALSE;
12791 }
12792#endif
12793 }
12794
12795 return TRUE;
12796}
12797
7413f23f
DJ		 12798/* Output a single local symbol for a generated stub. */
12799
12800static bfd_boolean
12801elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12802 bfd_vma offset, bfd_vma size)
12803{
12804 struct elf32_arm_link_hash_table *htab;
12805 Elf_Internal_Sym sym;
12806
12807 htab = elf32_arm_hash_table (osi->info);
12808 sym.st_value = osi->sec->output_section->vma
12809 + osi->sec->output_offset
12810 + offset;
12811 sym.st_size = size;
12812 sym.st_other = 0;
12813 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
12814 sym.st_shndx = osi->sec_shndx;
6e0b88f1 12815 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 12816}
4e617b1e 12817
da5938a2 12818static bfd_boolean
8029a119
NC		 12819arm_map_one_stub (struct bfd_hash_entry * gen_entry,
12820 void * in_arg)
da5938a2
NC		 12821{
12822 struct elf32_arm_stub_hash_entry *stub_entry;
12823 struct bfd_link_info *info;
12824 struct elf32_arm_link_hash_table *htab;
12825 asection *stub_sec;
12826 bfd_vma addr;
7413f23f 12827 char *stub_name;
9a008db3 12828 output_arch_syminfo *osi;
461a49ca
DJ		 12829 const insn_sequence *template;
12830 enum stub_insn_type prev_type;
12831 int size;
12832 int i;
12833 enum map_symbol_type sym_type;
da5938a2
NC		 12834
12835 /* Massage our args to the form they really have. */
12836 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 12837 osi = (output_arch_syminfo *) in_arg;
da5938a2 12838
da5938a2
NC		 12839 info = osi->info;
12840
12841 htab = elf32_arm_hash_table (info);
12842 stub_sec = stub_entry->stub_sec;
12843
12844 /* Ensure this stub is attached to the current section being
7413f23f 12845 processed. */
da5938a2
NC		 12846 if (stub_sec != osi->sec)
12847 return TRUE;
12848
7413f23f
DJ		 12849 addr = (bfd_vma) stub_entry->stub_offset;
12850 stub_name = stub_entry->output_name;
da5938a2 12851
461a49ca 12852 template = stub_entry->stub_template;
4e31c731 12853 switch (template[0].type)
7413f23f 12854 {
461a49ca
DJ		 12855 case ARM_TYPE:
12856 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 12857 return FALSE;
12858 break;
461a49ca 12859 case THUMB16_TYPE:
48229727 12860 case THUMB32_TYPE:
461a49ca
DJ		 12861 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
12862 stub_entry->stub_size))
da5938a2
NC		 12863 return FALSE;
12864 break;
12865 default:
12866 BFD_FAIL ();
48229727 12867 return 0;
7413f23f 12868 }
da5938a2 12869
461a49ca
DJ		 12870 prev_type = DATA_TYPE;
12871 size = 0;
12872 for (i = 0; i < stub_entry->stub_template_size; i++)
12873 {
4e31c731 12874 switch (template[i].type)
461a49ca
DJ		 12875 {
12876 case ARM_TYPE:
12877 sym_type = ARM_MAP_ARM;
12878 break;
12879
12880 case THUMB16_TYPE:
48229727 12881 case THUMB32_TYPE:
461a49ca
DJ		 12882 sym_type = ARM_MAP_THUMB;
12883 break;
12884
12885 case DATA_TYPE:
12886 sym_type = ARM_MAP_DATA;
12887 break;
12888
12889 default:
12890 BFD_FAIL ();
4e31c731 12891 return FALSE;
461a49ca
DJ		 12892 }
12893
12894 if (template[i].type != prev_type)
12895 {
12896 prev_type = template[i].type;
12897 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
12898 return FALSE;
12899 }
12900
4e31c731 12901 switch (template[i].type)
461a49ca
DJ		 12902 {
12903 case ARM_TYPE:
48229727 12904 case THUMB32_TYPE:
461a49ca
DJ		 12905 size += 4;
12906 break;
12907
12908 case THUMB16_TYPE:
12909 size += 2;
12910 break;
12911
12912 case DATA_TYPE:
12913 size += 4;
12914 break;
12915
12916 default:
12917 BFD_FAIL ();
4e31c731 12918 return FALSE;
461a49ca
DJ		 12919 }
12920 }
12921
da5938a2
NC		 12922 return TRUE;
12923}
12924
91a5743d 12925/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 12926
12927static bfd_boolean
12928elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 12929 struct bfd_link_info *info,
12930 void *finfo,
6e0b88f1
AM		 12931 int (*func) (void *, const char *,
12932 Elf_Internal_Sym *,
12933 asection *,
12934 struct elf_link_hash_entry *))
4e617b1e
PB		 12935{
12936 output_arch_syminfo osi;
12937 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 12938 bfd_vma offset;
12939 bfd_size_type size;
4e617b1e
PB		 12940
12941 htab = elf32_arm_hash_table (info);
906e58ca 12942 check_use_blx (htab);
91a5743d 12943
4e617b1e
PB		 12944 osi.finfo = finfo;
12945 osi.info = info;
12946 osi.func = func;
906e58ca 12947
91a5743d
PB		 12948 /* ARM->Thumb glue. */
12949 if (htab->arm_glue_size > 0)
12950 {
12951 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12952 ARM2THUMB_GLUE_SECTION_NAME);
12953
12954 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12955 (output_bfd, osi.sec->output_section);
12956 if (info->shared || htab->root.is_relocatable_executable
12957 || htab->pic_veneer)
12958 size = ARM2THUMB_PIC_GLUE_SIZE;
12959 else if (htab->use_blx)
12960 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
12961 else
12962 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 12963
91a5743d
PB		 12964 for (offset = 0; offset < htab->arm_glue_size; offset += size)
12965 {
7413f23f
DJ		 12966 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
12967 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 12968 }
12969 }
12970
12971 /* Thumb->ARM glue. */
12972 if (htab->thumb_glue_size > 0)
12973 {
12974 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12975 THUMB2ARM_GLUE_SECTION_NAME);
12976
12977 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12978 (output_bfd, osi.sec->output_section);
12979 size = THUMB2ARM_GLUE_SIZE;
12980
12981 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
12982 {
7413f23f
DJ		 12983 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
12984 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 12985 }
12986 }
12987
845b51d6
PB		 12988 /* ARMv4 BX veneers. */
12989 if (htab->bx_glue_size > 0)
12990 {
12991 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
12992 ARM_BX_GLUE_SECTION_NAME);
12993
12994 osi.sec_shndx = _bfd_elf_section_from_bfd_section
12995 (output_bfd, osi.sec->output_section);
12996
7413f23f 12997 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 12998 }
12999
8029a119
NC		 13000 /* Long calls stubs. */
13001 if (htab->stub_bfd && htab->stub_bfd->sections)
13002 {
da5938a2 13003 asection* stub_sec;
8029a119 13004
da5938a2
NC		 13005 for (stub_sec = htab->stub_bfd->sections;
13006 stub_sec != NULL;
8029a119
NC		 13007 stub_sec = stub_sec->next)
13008 {
13009 /* Ignore non-stub sections. */
13010 if (!strstr (stub_sec->name, STUB_SUFFIX))
13011 continue;
da5938a2 13012
8029a119 13013 osi.sec = stub_sec;
da5938a2 13014
8029a119
NC		 13015 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13016 (output_bfd, osi.sec->output_section);
da5938a2 13017
8029a119
NC		 13018 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13019 }
13020 }
da5938a2 13021
91a5743d
PB		 13022 /* Finally, output mapping symbols for the PLT. */
13023 if (!htab->splt || htab->splt->size == 0)
13024 return TRUE;
13025
13026 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13027 htab->splt->output_section);
91a5743d 13028 osi.sec = htab->splt;
4e617b1e
PB		 13029 /* Output mapping symbols for the plt header. SymbianOS does not have a
13030 plt header. */
13031 if (htab->vxworks_p)
13032 {
13033 /* VxWorks shared libraries have no PLT header. */
13034 if (!info->shared)
13035 {
7413f23f 13036 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13037 return FALSE;
7413f23f 13038 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13039 return FALSE;
13040 }
13041 }
13042 else if (!htab->symbian_p)
13043 {
7413f23f 13044 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13045 return FALSE;
13046#ifndef FOUR_WORD_PLT
7413f23f 13047 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13048 return FALSE;
13049#endif
13050 }
13051
13052 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13053 return TRUE;
13054}
13055
e489d0ae
PB		 13056/* Allocate target specific section data. */
13057
13058static bfd_boolean
13059elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13060{
f592407e
AM		 13061 if (!sec->used_by_bfd)
13062 {
13063 _arm_elf_section_data *sdata;
13064 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13065
f592407e
AM		 13066 sdata = bfd_zalloc (abfd, amt);
13067 if (sdata == NULL)
13068 return FALSE;
13069 sec->used_by_bfd = sdata;
13070 }
e489d0ae 13071
957c6e41 13072 record_section_with_arm_elf_section_data (sec);
8e3de13a 13073
e489d0ae
PB		 13074 return _bfd_elf_new_section_hook (abfd, sec);
13075}
13076
13077
13078/* Used to order a list of mapping symbols by address. */
13079
13080static int
13081elf32_arm_compare_mapping (const void * a, const void * b)
13082{
7f6a71ff
JM		 13083 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13084 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13085
13086 if (amap->vma > bmap->vma)
13087 return 1;
13088 else if (amap->vma < bmap->vma)
13089 return -1;
13090 else if (amap->type > bmap->type)
13091 /* Ensure results do not depend on the host qsort for objects with
13092 multiple mapping symbols at the same address by sorting on type
13093 after vma. */
13094 return 1;
13095 else if (amap->type < bmap->type)
13096 return -1;
13097 else
13098 return 0;
e489d0ae
PB		 13099}
13100
2468f9c9
PB		 13101/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13102
13103static unsigned long
13104offset_prel31 (unsigned long addr, bfd_vma offset)
13105{
13106 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13107}
13108
13109/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13110 relocations. */
13111
13112static void
13113copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13114{
13115 unsigned long first_word = bfd_get_32 (output_bfd, from);
13116 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13117
13118 /* High bit of first word is supposed to be zero. */
13119 if ((first_word & 0x80000000ul) == 0)
13120 first_word = offset_prel31 (first_word, offset);
13121
13122 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13123 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13124 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13125 second_word = offset_prel31 (second_word, offset);
13126
13127 bfd_put_32 (output_bfd, first_word, to);
13128 bfd_put_32 (output_bfd, second_word, to + 4);
13129}
e489d0ae 13130
48229727
JB		 13131/* Data for make_branch_to_a8_stub(). */
13132
13133struct a8_branch_to_stub_data {
13134 asection *writing_section;
13135 bfd_byte *contents;
13136};
13137
13138
13139/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13140 places for a particular section. */
13141
13142static bfd_boolean
13143make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13144 void *in_arg)
13145{
13146 struct elf32_arm_stub_hash_entry *stub_entry;
13147 struct a8_branch_to_stub_data *data;
13148 bfd_byte *contents;
13149 unsigned long branch_insn;
13150 bfd_vma veneered_insn_loc, veneer_entry_loc;
13151 bfd_signed_vma branch_offset;
13152 bfd *abfd;
13153 unsigned int index;
13154
13155 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13156 data = (struct a8_branch_to_stub_data *) in_arg;
13157
13158 if (stub_entry->target_section != data->writing_section
13159 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13160 return TRUE;
13161
13162 contents = data->contents;
13163
13164 veneered_insn_loc = stub_entry->target_section->output_section->vma
13165 + stub_entry->target_section->output_offset
13166 + stub_entry->target_value;
13167
13168 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13169 + stub_entry->stub_sec->output_offset
13170 + stub_entry->stub_offset;
13171
13172 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13173 veneered_insn_loc &= ~3u;
13174
13175 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13176
13177 abfd = stub_entry->target_section->owner;
13178 index = stub_entry->target_value;
13179
13180 /* We attempt to avoid this condition by setting stubs_always_after_branch
13181 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13182 This check is just to be on the safe side... */
13183 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13184 {
13185 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13186 "allocated in unsafe location"), abfd);
13187 return FALSE;
13188 }
13189
13190 switch (stub_entry->stub_type)
13191 {
13192 case arm_stub_a8_veneer_b:
13193 case arm_stub_a8_veneer_b_cond:
13194 branch_insn = 0xf0009000;
13195 goto jump24;
13196
13197 case arm_stub_a8_veneer_blx:
13198 branch_insn = 0xf000e800;
13199 goto jump24;
13200
13201 case arm_stub_a8_veneer_bl:
13202 {
13203 unsigned int i1, j1, i2, j2, s;
13204
13205 branch_insn = 0xf000d000;
13206
13207 jump24:
13208 if (branch_offset < -16777216 || branch_offset > 16777214)
13209 {
13210 /* There's not much we can do apart from complain if this
13211 happens. */
13212 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13213 "of range (input file too large)"), abfd);
13214 return FALSE;
13215 }
13216
13217 /* i1 = not(j1 eor s), so:
13218 not i1 = j1 eor s
13219 j1 = (not i1) eor s. */
13220
13221 branch_insn |= (branch_offset >> 1) & 0x7ff;
13222 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13223 i2 = (branch_offset >> 22) & 1;
13224 i1 = (branch_offset >> 23) & 1;
13225 s = (branch_offset >> 24) & 1;
13226 j1 = (!i1) ^ s;
13227 j2 = (!i2) ^ s;
13228 branch_insn |= j2 << 11;
13229 branch_insn |= j1 << 13;
13230 branch_insn |= s << 26;
13231 }
13232 break;
13233
13234 default:
13235 BFD_FAIL ();
13236 return FALSE;
13237 }
13238
13239 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[index]);
13240 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[index + 2]);
13241
13242 return TRUE;
13243}
13244
e489d0ae
PB		 13245/* Do code byteswapping. Return FALSE afterwards so that the section is
13246 written out as normal. */
13247
13248static bfd_boolean
c7b8f16e 13249elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13250 struct bfd_link_info *link_info,
13251 asection *sec,
e489d0ae
PB		 13252 bfd_byte *contents)
13253{
48229727 13254 unsigned int mapcount, errcount;
8e3de13a 13255 _arm_elf_section_data *arm_data;
c7b8f16e 13256 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13257 elf32_arm_section_map *map;
c7b8f16e 13258 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13259 bfd_vma ptr;
13260 bfd_vma end;
c7b8f16e 13261 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13262 bfd_byte tmp;
48229727 13263 unsigned int i;
57e8b36a 13264
8e3de13a
NC		 13265 /* If this section has not been allocated an _arm_elf_section_data
13266 structure then we cannot record anything. */
13267 arm_data = get_arm_elf_section_data (sec);
13268 if (arm_data == NULL)
13269 return FALSE;
13270
13271 mapcount = arm_data->mapcount;
13272 map = arm_data->map;
c7b8f16e
JB		 13273 errcount = arm_data->erratumcount;
13274
13275 if (errcount != 0)
13276 {
13277 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13278
13279 for (errnode = arm_data->erratumlist; errnode != 0;
13280 errnode = errnode->next)
13281 {
13282 bfd_vma index = errnode->vma - offset;
13283
13284 switch (errnode->type)
13285 {
13286 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13287 {
13288 bfd_vma branch_to_veneer;
13289 /* Original condition code of instruction, plus bit mask for
13290 ARM B instruction. */
13291 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13292 | 0x0a000000;
13293
13294 /* The instruction is before the label. */
13295 index -= 4;
13296
13297 /* Above offset included in -4 below. */
13298 branch_to_veneer = errnode->u.b.veneer->vma
13299 - errnode->vma - 4;
13300
13301 if ((signed) branch_to_veneer < -(1 << 25)
13302 || (signed) branch_to_veneer >= (1 << 25))
13303 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13304 "range"), output_bfd);
13305
13306 insn |= (branch_to_veneer >> 2) & 0xffffff;
13307 contents[endianflip ^ index] = insn & 0xff;
13308 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13309 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13310 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13311 }
13312 break;
13313
13314 case VFP11_ERRATUM_ARM_VENEER:
13315 {
13316 bfd_vma branch_from_veneer;
13317 unsigned int insn;
13318
13319 /* Take size of veneer into account. */
13320 branch_from_veneer = errnode->u.v.branch->vma
13321 - errnode->vma - 12;
13322
13323 if ((signed) branch_from_veneer < -(1 << 25)
13324 || (signed) branch_from_veneer >= (1 << 25))
13325 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13326 "range"), output_bfd);
13327
13328 /* Original instruction. */
13329 insn = errnode->u.v.branch->u.b.vfp_insn;
13330 contents[endianflip ^ index] = insn & 0xff;
13331 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
13332 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
13333 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
13334
13335 /* Branch back to insn after original insn. */
13336 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
13337 contents[endianflip ^ (index + 4)] = insn & 0xff;
13338 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
13339 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
13340 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
13341 }
13342 break;
13343
13344 default:
13345 abort ();
13346 }
13347 }
13348 }
e489d0ae 13349
2468f9c9
PB		 13350 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13351 {
13352 arm_unwind_table_edit *edit_node
13353 = arm_data->u.exidx.unwind_edit_list;
13354 /* Now, sec->size is the size of the section we will write. The original
13355 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13356 markers) was sec->rawsize. (This isn't the case if we perform no
13357 edits, then rawsize will be zero and we should use size). */
13358 bfd_byte *edited_contents = bfd_malloc (sec->size);
13359 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13360 unsigned int in_index, out_index;
13361 bfd_vma add_to_offsets = 0;
13362
13363 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13364 {
13365 if (edit_node)
13366 {
13367 unsigned int edit_index = edit_node->index;
13368
13369 if (in_index < edit_index && in_index * 8 < input_size)
13370 {
13371 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13372 contents + in_index * 8, add_to_offsets);
13373 out_index++;
13374 in_index++;
13375 }
13376 else if (in_index == edit_index
13377 || (in_index * 8 >= input_size
13378 && edit_index == UINT_MAX))
13379 {
13380 switch (edit_node->type)
13381 {
13382 case DELETE_EXIDX_ENTRY:
13383 in_index++;
13384 add_to_offsets += 8;
13385 break;
13386
13387 case INSERT_EXIDX_CANTUNWIND_AT_END:
13388 {
13389 asection *text_sec = edit_node->linked_section;
13390 bfd_vma text_offset = text_sec->output_section->vma
13391 + text_sec->output_offset
13392 + text_sec->size;
13393 bfd_vma exidx_offset = offset + out_index * 8;
13394 unsigned long prel31_offset;
13395
13396 /* Note: this is meant to be equivalent to an
13397 R_ARM_PREL31 relocation. These synthetic
13398 EXIDX_CANTUNWIND markers are not relocated by the
13399 usual BFD method. */
13400 prel31_offset = (text_offset - exidx_offset)
13401 & 0x7ffffffful;
13402
13403 /* First address we can't unwind. */
13404 bfd_put_32 (output_bfd, prel31_offset,
13405 &edited_contents[out_index * 8]);
13406
13407 /* Code for EXIDX_CANTUNWIND. */
13408 bfd_put_32 (output_bfd, 0x1,
13409 &edited_contents[out_index * 8 + 4]);
13410
13411 out_index++;
13412 add_to_offsets -= 8;
13413 }
13414 break;
13415 }
13416
13417 edit_node = edit_node->next;
13418 }
13419 }
13420 else
13421 {
13422 /* No more edits, copy remaining entries verbatim. */
13423 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13424 contents + in_index * 8, add_to_offsets);
13425 out_index++;
13426 in_index++;
13427 }
13428 }
13429
13430 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13431 bfd_set_section_contents (output_bfd, sec->output_section,
13432 edited_contents,
13433 (file_ptr) sec->output_offset, sec->size);
13434
13435 return TRUE;
13436 }
13437
48229727
JB		 13438 /* Fix code to point to Cortex-A8 erratum stubs. */
13439 if (globals->fix_cortex_a8)
13440 {
13441 struct a8_branch_to_stub_data data;
13442
13443 data.writing_section = sec;
13444 data.contents = contents;
13445
13446 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13447 &data);
13448 }
13449
e489d0ae
PB		 13450 if (mapcount == 0)
13451 return FALSE;
13452
c7b8f16e 13453 if (globals->byteswap_code)
e489d0ae 13454 {
c7b8f16e 13455 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13456
c7b8f16e
JB		 13457 ptr = map[0].vma;
13458 for (i = 0; i < mapcount; i++)
13459 {
13460 if (i == mapcount - 1)
13461 end = sec->size;
13462 else
13463 end = map[i + 1].vma;
e489d0ae 13464
c7b8f16e 13465 switch (map[i].type)
e489d0ae 13466 {
c7b8f16e
JB		 13467 case 'a':
13468 /* Byte swap code words. */
13469 while (ptr + 3 < end)
13470 {
13471 tmp = contents[ptr];
13472 contents[ptr] = contents[ptr + 3];
13473 contents[ptr + 3] = tmp;
13474 tmp = contents[ptr + 1];
13475 contents[ptr + 1] = contents[ptr + 2];
13476 contents[ptr + 2] = tmp;
13477 ptr += 4;
13478 }
13479 break;
e489d0ae 13480
c7b8f16e
JB		 13481 case 't':
13482 /* Byte swap code halfwords. */
13483 while (ptr + 1 < end)
13484 {
13485 tmp = contents[ptr];
13486 contents[ptr] = contents[ptr + 1];
13487 contents[ptr + 1] = tmp;
13488 ptr += 2;
13489 }
13490 break;
13491
13492 case 'd':
13493 /* Leave data alone. */
13494 break;
13495 }
13496 ptr = end;
13497 }
e489d0ae 13498 }
8e3de13a 13499
93204d3a 13500 free (map);
8e3de13a 13501 arm_data->mapcount = 0;
c7b8f16e 13502 arm_data->mapsize = 0;
8e3de13a
NC		 13503 arm_data->map = NULL;
13504 unrecord_section_with_arm_elf_section_data (sec);
13505
e489d0ae
PB		 13506 return FALSE;
13507}
13508
957c6e41
NC		 13509static void
13510unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
13511 asection * sec,
13512 void * ignore ATTRIBUTE_UNUSED)
13513{
13514 unrecord_section_with_arm_elf_section_data (sec);
13515}
13516
13517static bfd_boolean
13518elf32_arm_close_and_cleanup (bfd * abfd)
13519{
b25e3d87
L		 13520 if (abfd->sections)
13521 bfd_map_over_sections (abfd,
13522 unrecord_section_via_map_over_sections,
13523 NULL);
957c6e41
NC		 13524
13525 return _bfd_elf_close_and_cleanup (abfd);
13526}
13527
b25e3d87
L		 13528static bfd_boolean
13529elf32_arm_bfd_free_cached_info (bfd * abfd)
13530{
13531 if (abfd->sections)
13532 bfd_map_over_sections (abfd,
13533 unrecord_section_via_map_over_sections,
13534 NULL);
13535
13536 return _bfd_free_cached_info (abfd);
13537}
13538
b7693d02
DJ		 13539/* Display STT_ARM_TFUNC symbols as functions. */
13540
13541static void
13542elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13543 asymbol *asym)
13544{
13545 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13546
13547 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13548 elfsym->symbol.flags |= BSF_FUNCTION;
13549}
13550
0beaef2b
PB		 13551
13552/* Mangle thumb function symbols as we read them in. */
13553
8384fb8f 13554static bfd_boolean
0beaef2b
PB		 13555elf32_arm_swap_symbol_in (bfd * abfd,
13556 const void *psrc,
13557 const void *pshn,
13558 Elf_Internal_Sym *dst)
13559{
8384fb8f
AM		 13560 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13561 return FALSE;
0beaef2b
PB		 13562
13563 /* New EABI objects mark thumb function symbols by setting the low bit of
13564 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13565 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13566 && (dst->st_value & 1))
13567 {
13568 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13569 dst->st_value &= ~(bfd_vma) 1;
13570 }
8384fb8f 13571 return TRUE;
0beaef2b
PB		 13572}
13573
13574
13575/* Mangle thumb function symbols as we write them out. */
13576
13577static void
13578elf32_arm_swap_symbol_out (bfd *abfd,
13579 const Elf_Internal_Sym *src,
13580 void *cdst,
13581 void *shndx)
13582{
13583 Elf_Internal_Sym newsym;
13584
13585 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13586 of the address set, as per the new EABI. We do this unconditionally
13587 because objcopy does not set the elf header flags until after
13588 it writes out the symbol table. */
13589 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13590 {
13591 newsym = *src;
13592 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13593 if (newsym.st_shndx != SHN_UNDEF)
13594 {
13595 /* Do this only for defined symbols. At link type, the static
13596 linker will simulate the work of dynamic linker of resolving
13597 symbols and will carry over the thumbness of found symbols to
13598 the output symbol table. It's not clear how it happens, but
b0fead2b 13599 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13600 runtime, and writing '1' for them will be confusing for users
13601 and possibly for dynamic linker itself.
13602 */
13603 newsym.st_value |= 1;
13604 }
906e58ca 13605
0beaef2b
PB		 13606 src = &newsym;
13607 }
13608 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13609}
13610
b294bdf8
MM		 13611/* Add the PT_ARM_EXIDX program header. */
13612
13613static bfd_boolean
906e58ca 13614elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13615 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13616{
13617 struct elf_segment_map *m;
13618 asection *sec;
13619
13620 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13621 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13622 {
13623 /* If there is already a PT_ARM_EXIDX header, then we do not
13624 want to add another one. This situation arises when running
13625 "strip"; the input binary already has the header. */
13626 m = elf_tdata (abfd)->segment_map;
13627 while (m && m->p_type != PT_ARM_EXIDX)
13628 m = m->next;
13629 if (!m)
13630 {
13631 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
13632 if (m == NULL)
13633 return FALSE;
13634 m->p_type = PT_ARM_EXIDX;
13635 m->count = 1;
13636 m->sections[0] = sec;
13637
13638 m->next = elf_tdata (abfd)->segment_map;
13639 elf_tdata (abfd)->segment_map = m;
13640 }
13641 }
13642
13643 return TRUE;
13644}
13645
13646/* We may add a PT_ARM_EXIDX program header. */
13647
13648static int
a6b96beb
AM		 13649elf32_arm_additional_program_headers (bfd *abfd,
13650 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13651{
13652 asection *sec;
13653
13654 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13655 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13656 return 1;
13657 else
13658 return 0;
13659}
13660
fcb93ecf 13661/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13662
fcb93ecf
PB		 13663static bfd_boolean
13664elf32_arm_is_function_type (unsigned int type)
13665{
0f88be7a 13666 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13667}
13668
0beaef2b 13669/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13670const struct elf_size_info elf32_arm_size_info =
13671{
0beaef2b
PB		 13672 sizeof (Elf32_External_Ehdr),
13673 sizeof (Elf32_External_Phdr),
13674 sizeof (Elf32_External_Shdr),
13675 sizeof (Elf32_External_Rel),
13676 sizeof (Elf32_External_Rela),
13677 sizeof (Elf32_External_Sym),
13678 sizeof (Elf32_External_Dyn),
13679 sizeof (Elf_External_Note),
13680 4,
13681 1,
13682 32, 2,
13683 ELFCLASS32, EV_CURRENT,
13684 bfd_elf32_write_out_phdrs,
13685 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13686 bfd_elf32_checksum_contents,
0beaef2b
PB		 13687 bfd_elf32_write_relocs,
13688 elf32_arm_swap_symbol_in,
13689 elf32_arm_swap_symbol_out,
13690 bfd_elf32_slurp_reloc_table,
13691 bfd_elf32_slurp_symbol_table,
13692 bfd_elf32_swap_dyn_in,
13693 bfd_elf32_swap_dyn_out,
13694 bfd_elf32_swap_reloc_in,
13695 bfd_elf32_swap_reloc_out,
13696 bfd_elf32_swap_reloca_in,
13697 bfd_elf32_swap_reloca_out
13698};
13699
252b5132
RH		 13700#define ELF_ARCH bfd_arch_arm
13701#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13702#ifdef __QNXTARGET__
13703#define ELF_MAXPAGESIZE 0x1000
13704#else
f21f3fe0 13705#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13706#endif
b1342370 13707#define ELF_MINPAGESIZE 0x1000
24718e3b 13708#define ELF_COMMONPAGESIZE 0x1000
252b5132 13709
ba93b8ac
DJ		 13710#define bfd_elf32_mkobject elf32_arm_mkobject
13711
99e4ae17
AJ		 13712#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13713#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13714#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13715#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13716#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13717#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13718#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13719#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13720#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13721#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13722#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13723#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 13724#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 13725#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
3e6b1042 13726#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13727
13728#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13729#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13730#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13731#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13732#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13733#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13734#define elf_backend_write_section elf32_arm_write_section
252b5132 13735#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13736#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13737#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13738#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13739#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13740#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13741#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13742#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13743#define elf_backend_object_p elf32_arm_object_p
e16bb312 13744#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13745#define elf_backend_fake_sections elf32_arm_fake_sections
13746#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13747#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13748#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13749#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13750#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13751#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13752#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13753#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13754#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13755#define elf_backend_is_function_type elf32_arm_is_function_type
13756
13757#define elf_backend_can_refcount 1
13758#define elf_backend_can_gc_sections 1
13759#define elf_backend_plt_readonly 1
13760#define elf_backend_want_got_plt 1
13761#define elf_backend_want_plt_sym 0
13762#define elf_backend_may_use_rel_p 1
13763#define elf_backend_may_use_rela_p 0
4e7fd91e 13764#define elf_backend_default_use_rela_p 0
252b5132 13765
04f7c78d 13766#define elf_backend_got_header_size 12
04f7c78d 13767
906e58ca
NC		 13768#undef elf_backend_obj_attrs_vendor
13769#define elf_backend_obj_attrs_vendor "aeabi"
13770#undef elf_backend_obj_attrs_section
13771#define elf_backend_obj_attrs_section ".ARM.attributes"
13772#undef elf_backend_obj_attrs_arg_type
13773#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13774#undef elf_backend_obj_attrs_section_type
104d59d1 13775#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13776#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13777
252b5132 13778#include "elf32-target.h"
7f266840 13779
906e58ca 13780/* VxWorks Targets. */
4e7fd91e 13781
906e58ca 13782#undef TARGET_LITTLE_SYM
4e7fd91e 13783#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13784#undef TARGET_LITTLE_NAME
4e7fd91e 13785#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13786#undef TARGET_BIG_SYM
4e7fd91e 13787#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13788#undef TARGET_BIG_NAME
4e7fd91e
PB		 13789#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13790
13791/* Like elf32_arm_link_hash_table_create -- but overrides
13792 appropriately for VxWorks. */
906e58ca 13793
4e7fd91e
PB		 13794static struct bfd_link_hash_table *
13795elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13796{
13797 struct bfd_link_hash_table *ret;
13798
13799 ret = elf32_arm_link_hash_table_create (abfd);
13800 if (ret)
13801 {
13802 struct elf32_arm_link_hash_table *htab
00a97672 13803 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13804 htab->use_rel = 0;
00a97672 13805 htab->vxworks_p = 1;
4e7fd91e
PB		 13806 }
13807 return ret;
906e58ca 13808}
4e7fd91e 13809
00a97672
RS		 13810static void
13811elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
13812{
13813 elf32_arm_final_write_processing (abfd, linker);
13814 elf_vxworks_final_write_processing (abfd, linker);
13815}
13816
906e58ca 13817#undef elf32_bed
4e7fd91e
PB		 13818#define elf32_bed elf32_arm_vxworks_bed
13819
906e58ca
NC		 13820#undef bfd_elf32_bfd_link_hash_table_create
13821#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13822#undef elf_backend_add_symbol_hook
13823#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13824#undef elf_backend_final_write_processing
13825#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13826#undef elf_backend_emit_relocs
13827#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 13828
906e58ca 13829#undef elf_backend_may_use_rel_p
00a97672 13830#define elf_backend_may_use_rel_p 0
906e58ca 13831#undef elf_backend_may_use_rela_p
00a97672 13832#define elf_backend_may_use_rela_p 1
906e58ca 13833#undef elf_backend_default_use_rela_p
00a97672 13834#define elf_backend_default_use_rela_p 1
906e58ca 13835#undef elf_backend_want_plt_sym
00a97672 13836#define elf_backend_want_plt_sym 1
906e58ca 13837#undef ELF_MAXPAGESIZE
00a97672 13838#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 13839
13840#include "elf32-target.h"
13841
13842
906e58ca 13843/* Symbian OS Targets. */
7f266840 13844
906e58ca 13845#undef TARGET_LITTLE_SYM
7f266840 13846#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 13847#undef TARGET_LITTLE_NAME
7f266840 13848#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 13849#undef TARGET_BIG_SYM
7f266840 13850#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 13851#undef TARGET_BIG_NAME
7f266840
DJ		 13852#define TARGET_BIG_NAME "elf32-bigarm-symbian"
13853
13854/* Like elf32_arm_link_hash_table_create -- but overrides
13855 appropriately for Symbian OS. */
906e58ca 13856
7f266840
DJ		 13857static struct bfd_link_hash_table *
13858elf32_arm_symbian_link_hash_table_create (bfd *abfd)
13859{
13860 struct bfd_link_hash_table *ret;
13861
13862 ret = elf32_arm_link_hash_table_create (abfd);
13863 if (ret)
13864 {
13865 struct elf32_arm_link_hash_table *htab
13866 = (struct elf32_arm_link_hash_table *)ret;
13867 /* There is no PLT header for Symbian OS. */
13868 htab->plt_header_size = 0;
95720a86
DJ		 13869 /* The PLT entries are each one instruction and one word. */
13870 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 13871 htab->symbian_p = 1;
33bfe774
JB		 13872 /* Symbian uses armv5t or above, so use_blx is always true. */
13873 htab->use_blx = 1;
67687978 13874 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 13875 }
13876 return ret;
906e58ca 13877}
7f266840 13878
b35d266b 13879static const struct bfd_elf_special_section
551b43fd 13880elf32_arm_symbian_special_sections[] =
7f266840 13881{
5cd3778d
MM		 13882 /* In a BPABI executable, the dynamic linking sections do not go in
13883 the loadable read-only segment. The post-linker may wish to
13884 refer to these sections, but they are not part of the final
13885 program image. */
0112cd26
NC		 13886 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
13887 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
13888 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
13889 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
13890 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 13891 /* These sections do not need to be writable as the SymbianOS
13892 postlinker will arrange things so that no dynamic relocation is
13893 required. */
0112cd26
NC		 13894 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
13895 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
13896 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
13897 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 13898};
13899
c3c76620 13900static void
906e58ca 13901elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 13902 struct bfd_link_info *link_info)
c3c76620
MM		 13903{
13904 /* BPABI objects are never loaded directly by an OS kernel; they are
13905 processed by a postlinker first, into an OS-specific format. If
13906 the D_PAGED bit is set on the file, BFD will align segments on
13907 page boundaries, so that an OS can directly map the file. With
13908 BPABI objects, that just results in wasted space. In addition,
13909 because we clear the D_PAGED bit, map_sections_to_segments will
13910 recognize that the program headers should not be mapped into any
13911 loadable segment. */
13912 abfd->flags &= ~D_PAGED;
906e58ca 13913 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 13914}
7f266840
DJ		 13915
13916static bfd_boolean
906e58ca 13917elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 13918 struct bfd_link_info *info)
7f266840
DJ		 13919{
13920 struct elf_segment_map *m;
13921 asection *dynsec;
13922
7f266840
DJ		 13923 /* BPABI shared libraries and executables should have a PT_DYNAMIC
13924 segment. However, because the .dynamic section is not marked
13925 with SEC_LOAD, the generic ELF code will not create such a
13926 segment. */
13927 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
13928 if (dynsec)
13929 {
8ded5a0f
AM		 13930 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
13931 if (m->p_type == PT_DYNAMIC)
13932 break;
13933
13934 if (m == NULL)
13935 {
13936 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
13937 m->next = elf_tdata (abfd)->segment_map;
13938 elf_tdata (abfd)->segment_map = m;
13939 }
7f266840
DJ		 13940 }
13941
b294bdf8
MM		 13942 /* Also call the generic arm routine. */
13943 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 13944}
13945
95720a86
DJ		 13946/* Return address for Ith PLT stub in section PLT, for relocation REL
13947 or (bfd_vma) -1 if it should not be included. */
13948
13949static bfd_vma
13950elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
13951 const arelent *rel ATTRIBUTE_UNUSED)
13952{
13953 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
13954}
13955
13956
8029a119 13957#undef elf32_bed
7f266840
DJ		 13958#define elf32_bed elf32_arm_symbian_bed
13959
13960/* The dynamic sections are not allocated on SymbianOS; the postlinker
13961 will process them and then discard them. */
906e58ca 13962#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 13963#define ELF_DYNAMIC_SEC_FLAGS \
13964 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
13965
00a97672 13966#undef elf_backend_add_symbol_hook
00a97672 13967#undef elf_backend_emit_relocs
c3c76620 13968
906e58ca
NC		 13969#undef bfd_elf32_bfd_link_hash_table_create
13970#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
13971#undef elf_backend_special_sections
13972#define elf_backend_special_sections elf32_arm_symbian_special_sections
13973#undef elf_backend_begin_write_processing
13974#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
13975#undef elf_backend_final_write_processing
13976#define elf_backend_final_write_processing elf32_arm_final_write_processing
13977
13978#undef elf_backend_modify_segment_map
7f266840
DJ		 13979#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
13980
13981/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 13982#undef elf_backend_got_header_size
7f266840
DJ		 13983#define elf_backend_got_header_size 0
13984
13985/* Similarly, there is no .got.plt section. */
906e58ca 13986#undef elf_backend_want_got_plt
7f266840
DJ		 13987#define elf_backend_want_got_plt 0
13988
906e58ca 13989#undef elf_backend_plt_sym_val
95720a86
DJ		 13990#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
13991
906e58ca 13992#undef elf_backend_may_use_rel_p
00a97672 13993#define elf_backend_may_use_rel_p 1
906e58ca 13994#undef elf_backend_may_use_rela_p
00a97672 13995#define elf_backend_may_use_rela_p 0
906e58ca 13996#undef elf_backend_default_use_rela_p
00a97672 13997#define elf_backend_default_use_rela_p 0
906e58ca 13998#undef elf_backend_want_plt_sym
00a97672 13999#define elf_backend_want_plt_sym 0
906e58ca 14000#undef ELF_MAXPAGESIZE
00a97672 14001#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14002
7f266840 14003#include "elf32-target.h"
GDB Binutils - Deliverables
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