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sim: convert old style prototypes
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
1db37fe6 2 Copyright 1998-2014 Free Software Foundation, Inc.
252b5132
RH		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
6e6718a3 21#include "sysdep.h"
2468f9c9
PB		 22#include <limits.h>
23
3db64b00 24#include "bfd.h"
6034aab8 25#include "bfd_stdint.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
79f08007
YZ		 65/* The Adjusted Place, as defined by AAELF. */
66#define Pa(X) ((X) & 0xfffffffc)
67
3e6b1042
DJ		 68static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
7f266840
DJ		 73/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
c19d1205 77static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 78{
8029a119 79 /* No relocation. */
7f266840
DJ		 80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
c19d1205 138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 139 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 142 32, /* bitsize */
143 TRUE, /* pc_relative */
7f266840 144 0, /* bitpos */
4962c51a 145 complain_overflow_dont,/* complain_on_overflow */
7f266840 146 bfd_elf_generic_reloc, /* special_function */
4962c51a 147 "R_ARM_LDR_PC_G0", /* name */
7f266840 148 FALSE, /* partial_inplace */
4962c51a
MS		 149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
7f266840
DJ		 152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
00a97672
RS		 179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
7f266840
DJ		 181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
c19d1205 226 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 229 24, /* bitsize */
7f266840
DJ		 230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
c19d1205 234 "R_ARM_THM_CALL", /* name */
7f266840 235 FALSE, /* partial_inplace */
7f6ab9f8
AM		 236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
7f266840
DJ		 238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
c19d1205 254 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 257 32, /* bitsize */
258 FALSE, /* pc_relative */
7f266840
DJ		 259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
c19d1205 262 "R_ARM_BREL_ADJ", /* name */
7f266840 263 FALSE, /* partial_inplace */
c19d1205
ZW		 264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
7f266840 267
0855e32b 268 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 269 0, /* rightshift */
0855e32b
NS		 270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
7f266840
DJ		 272 FALSE, /* pc_relative */
273 0, /* bitpos */
0855e32b 274 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 275 bfd_elf_generic_reloc, /* special_function */
0855e32b 276 "R_ARM_TLS_DESC", /* name */
7f266840 277 FALSE, /* partial_inplace */
0855e32b
NS		 278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
7f266840
DJ		 280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 300 24, /* bitsize */
7f266840
DJ		 301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 315 24, /* bitsize */
7f266840
DJ		 316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
7f6ab9f8
AM		 322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
7f266840
DJ		 324 TRUE), /* pcrel_offset */
325
ba93b8ac 326 /* Dynamic TLS relocations. */
7f266840 327
ba93b8ac 328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
99059e56
RM		 329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
7f266840 341
ba93b8ac 342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
99059e56
RM		 343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
7f266840 355
ba93b8ac 356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
99059e56
RM		 357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
7f266840
DJ		 369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
99059e56
RM		 373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
7f266840
DJ		 385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
99059e56
RM		 387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
7f266840
DJ		 399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
99059e56
RM		 401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
7f266840
DJ		 413
414 HOWTO (R_ARM_RELATIVE, /* type */
99059e56
RM		 415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
7f266840 427
c19d1205 428 HOWTO (R_ARM_GOTOFF32, /* type */
99059e56
RM		 429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
7f266840
DJ		 441
442 HOWTO (R_ARM_GOTPC, /* type */
99059e56
RM		 443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
7f266840
DJ		 455
456 HOWTO (R_ARM_GOT32, /* type */
99059e56
RM		 457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
7f266840
DJ		 469
470 HOWTO (R_ARM_PLT32, /* type */
99059e56
RM		 471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
7f266840
DJ		 483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
c19d1205
ZW		 512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
7f266840 517 0, /* bitpos */
c19d1205 518 complain_overflow_signed,/* complain_on_overflow */
7f266840 519 bfd_elf_generic_reloc, /* special_function */
c19d1205 520 "R_ARM_THM_JUMP24", /* name */
7f266840 521 FALSE, /* partial_inplace */
c19d1205
ZW		 522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
7f266840 525
c19d1205 526 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 527 0, /* rightshift */
c19d1205
ZW		 528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
7f266840
DJ		 530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
c19d1205 534 "R_ARM_BASE_ABS", /* name */
7f266840 535 FALSE, /* partial_inplace */
c19d1205
ZW		 536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
7f266840
DJ		 538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
c19d1205
ZW		 693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
39623e12
PB		 704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
c19d1205
ZW		 706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
39623e12
PB		 718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
c19d1205
ZW		 720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
39623e12
PB		 732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
c19d1205
ZW		 734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
39623e12
PB		 746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
c19d1205
ZW		 748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
2cab6cc3 843 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
2cab6cc3
MS		 847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
c19d1205
ZW		 849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
2cab6cc3 857 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
2cab6cc3
MS		 861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
c19d1205
ZW		 863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
7f266840 892
4962c51a
MS		 893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
c19d1205 1274
c19d1205
ZW		 1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
0855e32b
NS		 1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
c19d1205
ZW		 1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
99059e56
RM		 1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
c19d1205
ZW		 1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
99059e56
RM		 1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
c19d1205
ZW		 1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
ba93b8ac 1544
c19d1205
ZW		 1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
99059e56
RM		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
ba93b8ac 1559
ba93b8ac 1560 HOWTO (R_ARM_TLS_LDM32, /* type */
99059e56
RM		 1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
ba93b8ac 1573
c19d1205 1574 HOWTO (R_ARM_TLS_LDO32, /* type */
99059e56
RM		 1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
ba93b8ac 1587
ba93b8ac 1588 HOWTO (R_ARM_TLS_IE32, /* type */
99059e56
RM		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
7f266840 1601
c19d1205 1602 HOWTO (R_ARM_TLS_LE32, /* type */
99059e56
RM		 1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
7f266840 1615
c19d1205
ZW		 1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
7f266840 1621 0, /* bitpos */
c19d1205 1622 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1623 bfd_elf_generic_reloc, /* special_function */
c19d1205 1624 "R_ARM_TLS_LDO12", /* name */
7f266840 1625 FALSE, /* partial_inplace */
c19d1205
ZW		 1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
7f266840 1629
c19d1205
ZW		 1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
7f266840 1635 0, /* bitpos */
c19d1205 1636 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1637 bfd_elf_generic_reloc, /* special_function */
c19d1205 1638 "R_ARM_TLS_LE12", /* name */
7f266840 1639 FALSE, /* partial_inplace */
c19d1205
ZW		 1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
7f266840 1643
c19d1205 1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
7f266840 1649 0, /* bitpos */
c19d1205 1650 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1651 bfd_elf_generic_reloc, /* special_function */
c19d1205 1652 "R_ARM_TLS_IE12GP", /* name */
7f266840 1653 FALSE, /* partial_inplace */
c19d1205
ZW		 1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
0855e32b 1657
34e77a92 1658 /* 112-127 private relocations. */
0855e32b
NS		 1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
34e77a92
RS		 1675
1676 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
c19d1205
ZW		 1692};
1693
34e77a92
RS		 1694/* 160 onwards: */
1695static reloc_howto_type elf32_arm_howto_table_2[1] =
1696{
1697 HOWTO (R_ARM_IRELATIVE, /* type */
99059e56
RM		 1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
34e77a92 1710};
c19d1205 1711
34e77a92
RS		 1712/* 249-255 extended, currently unused, relocations: */
1713static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1714{
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770};
1771
1772static reloc_howto_type *
1773elf32_arm_howto_from_type (unsigned int r_type)
1774{
906e58ca 1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1776 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1777
34e77a92
RS		 1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
c19d1205 1781 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1784
c19d1205 1785 return NULL;
7f266840
DJ		 1786}
1787
1788static void
1789elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791{
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796}
1797
1798struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804/* All entries in this list must also be present in elf32_arm_howto_table. */
1805static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1893 };
1894
1895static reloc_howto_type *
f1c71a59
ZW		 1896elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
7f266840
DJ		 1898{
1899 unsigned int i;
8029a119 1900
906e58ca 1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1904
c19d1205 1905 return NULL;
7f266840
DJ		 1906}
1907
157090f7
AM		 1908static reloc_howto_type *
1909elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911{
1912 unsigned int i;
1913
906e58ca 1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
906e58ca 1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
34e77a92
RS		 1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
157090f7
AM		 1929 return NULL;
1930}
1931
906e58ca
NC		 1932/* Support for core dump NOTE sections. */
1933
7f266840 1934static bfd_boolean
f1c71a59 1935elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1936{
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
8029a119 1945 case 148: /* Linux/ARM 32-bit. */
7f266840 1946 /* pr_cursig */
228e534f 1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1948
1949 /* pr_pid */
228e534f 1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962}
1963
1964static bfd_boolean
f1c71a59 1965elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1966{
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
8029a119 1972 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1973 elf_tdata (abfd)->core->pid
4395ee08 1974 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1975 elf_tdata (abfd)->core->program
7f266840 1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1977 elf_tdata (abfd)->core->command
7f266840
DJ		 1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
7f266840 1984 {
228e534f 1985 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993}
1994
1f20dca5
UW		 1995static char *
1996elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998{
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041}
2042
7f266840
DJ		 2043#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044#define TARGET_LITTLE_NAME "elf32-littlearm"
2045#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046#define TARGET_BIG_NAME "elf32-bigarm"
2047
2048#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2050#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2051
252b5132
RH		 2052typedef unsigned long int insn32;
2053typedef unsigned short int insn16;
2054
3a4a14e9
PB		 2055/* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
57e8b36a 2057#define INTERWORK_FLAG(abfd) \
3a4a14e9 2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2061
252b5132
RH		 2062/* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
9b485d32 2065 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2066#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
c7b8f16e
JB		 2072#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
845b51d6
PB		 2075#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
7413f23f
DJ		 2078#define STUB_ENTRY_NAME "__%s_veneer"
2079
252b5132
RH		 2080/* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
0855e32b 2084static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2085{
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089};
0855e32b
NS		 2090
2091static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2092{
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
99059e56 2100 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102};
0855e32b 2103
5e681ec4
PB		 2104#ifdef FOUR_WORD_PLT
2105
252b5132
RH		 2106/* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
59f2c4e7 2108 called before the relocation has been set up calls the dynamic
9b485d32 2109 linker first. */
e5a52504 2110static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2111{
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116};
5e681ec4
PB		 2117
2118/* Subsequent entries in a procedure linkage table look like
2119 this. */
e5a52504 2120static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2121{
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126};
5e681ec4
PB		 2127
2128#else
2129
5e681ec4
PB		 2130/* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
e5a52504 2134static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2135{
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141};
252b5132 2142
1db37fe6
YG		 2143/* By default subsequent entries in a procedure linkage table look like
2144 this. Offsets that don't fit into 28 bits will cause link error. */
2145static const bfd_vma elf32_arm_plt_entry_short [] =
b38cadfb
NC		 2146{
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150};
5e681ec4 2151
1db37fe6
YG		 2152/* When explicitly asked, we'll use this "long" entry format
2153 which can cope with arbitrary displacements. */
2154static const bfd_vma elf32_arm_plt_entry_long [] =
2155{
2156 0xe28fc200, /* add ip, pc, #0xN0000000 */
2157 0xe28cc600, /* add ip, ip, #0xNN00000 */
2158 0xe28cca00, /* add ip, ip, #0xNN000 */
2159 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2160};
2161
2162static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2163
5e681ec4 2164#endif
252b5132 2165
00a97672
RS		 2166/* The format of the first entry in the procedure linkage table
2167 for a VxWorks executable. */
2168static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2169{
2170 0xe52dc008, /* str ip,[sp,#-8]! */
2171 0xe59fc000, /* ldr ip,[pc] */
2172 0xe59cf008, /* ldr pc,[ip,#8] */
2173 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2174};
00a97672
RS		 2175
2176/* The format of subsequent entries in a VxWorks executable. */
2177static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2178{
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe59cf000, /* ldr pc,[ip] */
2181 0x00000000, /* .long @got */
2182 0xe59fc000, /* ldr ip,[pc] */
2183 0xea000000, /* b _PLT */
2184 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2185};
00a97672
RS		 2186
2187/* The format of entries in a VxWorks shared library. */
2188static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2189{
2190 0xe59fc000, /* ldr ip,[pc] */
2191 0xe79cf009, /* ldr pc,[ip,r9] */
2192 0x00000000, /* .long @got */
2193 0xe59fc000, /* ldr ip,[pc] */
2194 0xe599f008, /* ldr pc,[r9,#8] */
2195 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2196};
00a97672 2197
b7693d02
DJ		 2198/* An initial stub used if the PLT entry is referenced from Thumb code. */
2199#define PLT_THUMB_STUB_SIZE 4
2200static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2201{
2202 0x4778, /* bx pc */
2203 0x46c0 /* nop */
2204};
b7693d02 2205
e5a52504
MM		 2206/* The entries in a PLT when using a DLL-based target with multiple
2207 address spaces. */
906e58ca 2208static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2209{
2210 0xe51ff004, /* ldr pc, [pc, #-4] */
2211 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2212};
2213
2214/* The first entry in a procedure linkage table looks like
2215 this. It is set up so that any shared library function that is
2216 called before the relocation has been set up calls the dynamic
2217 linker first. */
2218static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2219{
2220 /* First bundle: */
2221 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2222 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2223 0xe08cc00f, /* add ip, ip, pc */
2224 0xe52dc008, /* str ip, [sp, #-8]! */
2225 /* Second bundle: */
edccdf7c
RM		 2226 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2227 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2228 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2229 0xe12fff1c, /* bx ip */
b38cadfb 2230 /* Third bundle: */
edccdf7c
RM		 2231 0xe320f000, /* nop */
2232 0xe320f000, /* nop */
2233 0xe320f000, /* nop */
b38cadfb
NC		 2234 /* .Lplt_tail: */
2235 0xe50dc004, /* str ip, [sp, #-4] */
2236 /* Fourth bundle: */
edccdf7c
RM		 2237 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2238 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2239 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2240 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2241};
2242#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2243
2244/* Subsequent entries in a procedure linkage table look like this. */
2245static const bfd_vma elf32_arm_nacl_plt_entry [] =
2246{
2247 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2248 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2249 0xe08cc00f, /* add ip, ip, pc */
2250 0xea000000, /* b .Lplt_tail */
2251};
e5a52504 2252
906e58ca
NC		 2253#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2254#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2255#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2256#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2257#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2258#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2259
461a49ca 2260enum stub_insn_type
b38cadfb
NC		 2261{
2262 THUMB16_TYPE = 1,
2263 THUMB32_TYPE,
2264 ARM_TYPE,
2265 DATA_TYPE
2266};
461a49ca 2267
48229727
JB		 2268#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2269/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2270 is inserted in arm_build_one_stub(). */
2271#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2272#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2273#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2274#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2275#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2276#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2277
2278typedef struct
2279{
b38cadfb
NC		 2280 bfd_vma data;
2281 enum stub_insn_type type;
2282 unsigned int r_type;
2283 int reloc_addend;
461a49ca
DJ		 2284} insn_sequence;
2285
fea2b4d6
CL		 2286/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2287 to reach the stub if necessary. */
461a49ca 2288static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2289{
2290 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2291 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2292};
906e58ca 2293
fea2b4d6
CL		 2294/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2295 available. */
461a49ca 2296static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2297{
2298 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2299 ARM_INSN (0xe12fff1c), /* bx ip */
2300 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2301};
906e58ca 2302
d3626fb0 2303/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2304static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2305{
2306 THUMB16_INSN (0xb401), /* push {r0} */
2307 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2308 THUMB16_INSN (0x4684), /* mov ip, r0 */
2309 THUMB16_INSN (0xbc01), /* pop {r0} */
2310 THUMB16_INSN (0x4760), /* bx ip */
2311 THUMB16_INSN (0xbf00), /* nop */
2312 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2313};
906e58ca 2314
d3626fb0
CL		 2315/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2316 allowed. */
2317static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2318{
2319 THUMB16_INSN (0x4778), /* bx pc */
2320 THUMB16_INSN (0x46c0), /* nop */
2321 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2322 ARM_INSN (0xe12fff1c), /* bx ip */
2323 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2324};
d3626fb0 2325
fea2b4d6
CL		 2326/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2327 available. */
461a49ca 2328static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2329{
2330 THUMB16_INSN (0x4778), /* bx pc */
2331 THUMB16_INSN (0x46c0), /* nop */
2332 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2333 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2334};
906e58ca 2335
fea2b4d6
CL		 2336/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2337 one, when the destination is close enough. */
461a49ca 2338static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2339{
2340 THUMB16_INSN (0x4778), /* bx pc */
2341 THUMB16_INSN (0x46c0), /* nop */
2342 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2343};
c820be07 2344
cf3eccff 2345/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2346 blx to reach the stub if necessary. */
cf3eccff 2347static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2348{
2349 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2350 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2351 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2352};
906e58ca 2353
cf3eccff
DJ		 2354/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2355 blx to reach the stub if necessary. We can not add into pc;
2356 it is not guaranteed to mode switch (different in ARMv6 and
2357 ARMv7). */
2358static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2359{
2360 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2361 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2362 ARM_INSN (0xe12fff1c), /* bx ip */
2363 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2364};
cf3eccff 2365
ebe24dd4
CL		 2366/* V4T ARM -> ARM long branch stub, PIC. */
2367static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2368{
2369 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2370 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2371 ARM_INSN (0xe12fff1c), /* bx ip */
2372 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2373};
ebe24dd4
CL		 2374
2375/* V4T Thumb -> ARM long branch stub, PIC. */
2376static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2377{
2378 THUMB16_INSN (0x4778), /* bx pc */
2379 THUMB16_INSN (0x46c0), /* nop */
2380 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2381 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2382 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2383};
ebe24dd4 2384
d3626fb0
CL		 2385/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2386 architectures. */
ebe24dd4 2387static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2388{
2389 THUMB16_INSN (0xb401), /* push {r0} */
2390 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2391 THUMB16_INSN (0x46fc), /* mov ip, pc */
2392 THUMB16_INSN (0x4484), /* add ip, r0 */
2393 THUMB16_INSN (0xbc01), /* pop {r0} */
2394 THUMB16_INSN (0x4760), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2396};
ebe24dd4 2397
d3626fb0
CL		 2398/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2399 allowed. */
2400static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2401{
2402 THUMB16_INSN (0x4778), /* bx pc */
2403 THUMB16_INSN (0x46c0), /* nop */
2404 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2405 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2406 ARM_INSN (0xe12fff1c), /* bx ip */
2407 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2408};
d3626fb0 2409
0855e32b
NS		 2410/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2411 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2412static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2413{
b38cadfb
NC		 2414 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2415 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2416 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2417};
2418
2419/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2420 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2421static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2422{
b38cadfb
NC		 2423 THUMB16_INSN (0x4778), /* bx pc */
2424 THUMB16_INSN (0x46c0), /* nop */
2425 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2426 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2427 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2428};
2429
7a89b94e
NC		 2430/* NaCl ARM -> ARM long branch stub. */
2431static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2432{
2433 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2434 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2435 ARM_INSN (0xe12fff1c), /* bx ip */
2436 ARM_INSN (0xe320f000), /* nop */
2437 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2438 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2439 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2440 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2441};
2442
2443/* NaCl ARM -> ARM long branch stub, PIC. */
2444static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2445{
2446 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2447 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2448 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2449 ARM_INSN (0xe12fff1c), /* bx ip */
2450 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2451 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2452 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2453 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2454};
2455
2456
48229727
JB		 2457/* Cortex-A8 erratum-workaround stubs. */
2458
2459/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2460 can't use a conditional branch to reach this stub). */
2461
2462static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2463{
2464 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2465 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2466 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2467};
48229727
JB		 2468
2469/* Stub used for b.w and bl.w instructions. */
2470
2471static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2472{
2473 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2474};
48229727
JB		 2475
2476static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2477{
2478 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2479};
48229727
JB		 2480
2481/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2482 instruction (which switches to ARM mode) to point to this stub. Jump to the
2483 real destination using an ARM-mode branch. */
2484
2485static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2486{
2487 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2488};
48229727 2489
9553db3c
NC		 2490/* For each section group there can be a specially created linker section
2491 to hold the stubs for that group. The name of the stub section is based
2492 upon the name of another section within that group with the suffix below
2493 applied.
2494
2495 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2496 create what appeared to be a linker stub section when it actually
2497 contained user code/data. For example, consider this fragment:
b38cadfb 2498
9553db3c
NC		 2499 const char * stubborn_problems[] = { "np" };
2500
2501 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2502 section called:
2503
2504 .data.rel.local.stubborn_problems
2505
2506 This then causes problems in arm32_arm_build_stubs() as it triggers:
2507
2508 // Ignore non-stub sections.
2509 if (!strstr (stub_sec->name, STUB_SUFFIX))
2510 continue;
2511
2512 And so the section would be ignored instead of being processed. Hence
2513 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2514 C identifier. */
2515#define STUB_SUFFIX ".__stub"
906e58ca 2516
738a79f6
CL		 2517/* One entry per long/short branch stub defined above. */
2518#define DEF_STUBS \
2519 DEF_STUB(long_branch_any_any) \
2520 DEF_STUB(long_branch_v4t_arm_thumb) \
2521 DEF_STUB(long_branch_thumb_only) \
2522 DEF_STUB(long_branch_v4t_thumb_thumb) \
2523 DEF_STUB(long_branch_v4t_thumb_arm) \
2524 DEF_STUB(short_branch_v4t_thumb_arm) \
2525 DEF_STUB(long_branch_any_arm_pic) \
2526 DEF_STUB(long_branch_any_thumb_pic) \
2527 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2528 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2529 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2530 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2531 DEF_STUB(long_branch_any_tls_pic) \
2532 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
7a89b94e
NC		 2533 DEF_STUB(long_branch_arm_nacl) \
2534 DEF_STUB(long_branch_arm_nacl_pic) \
48229727
JB		 2535 DEF_STUB(a8_veneer_b_cond) \
2536 DEF_STUB(a8_veneer_b) \
2537 DEF_STUB(a8_veneer_bl) \
2538 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2539
2540#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2541enum elf32_arm_stub_type
2542{
906e58ca 2543 arm_stub_none,
738a79f6 2544 DEF_STUBS
eb7c4339
NS		 2545 /* Note the first a8_veneer type */
2546 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2547};
2548#undef DEF_STUB
2549
2550typedef struct
2551{
d3ce72d0 2552 const insn_sequence* template_sequence;
738a79f6
CL		 2553 int template_size;
2554} stub_def;
2555
2556#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2557static const stub_def stub_definitions[] =
2558{
738a79f6
CL		 2559 {NULL, 0},
2560 DEF_STUBS
906e58ca
NC		 2561};
2562
2563struct elf32_arm_stub_hash_entry
2564{
2565 /* Base hash table entry structure. */
2566 struct bfd_hash_entry root;
2567
2568 /* The stub section. */
2569 asection *stub_sec;
2570
2571 /* Offset within stub_sec of the beginning of this stub. */
2572 bfd_vma stub_offset;
2573
2574 /* Given the symbol's value and its section we can determine its final
2575 value when building the stubs (so the stub knows where to jump). */
2576 bfd_vma target_value;
2577 asection *target_section;
2578
48229727
JB		 2579 /* Offset to apply to relocation referencing target_value. */
2580 bfd_vma target_addend;
2581
2582 /* The instruction which caused this stub to be generated (only valid for
2583 Cortex-A8 erratum workaround stubs at present). */
2584 unsigned long orig_insn;
2585
461a49ca 2586 /* The stub type. */
906e58ca 2587 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2588 /* Its encoding size in bytes. */
2589 int stub_size;
2590 /* Its template. */
2591 const insn_sequence *stub_template;
2592 /* The size of the template (number of entries). */
2593 int stub_template_size;
906e58ca
NC		 2594
2595 /* The symbol table entry, if any, that this was derived from. */
2596 struct elf32_arm_link_hash_entry *h;
2597
35fc36a8
RS		 2598 /* Type of branch. */
2599 enum arm_st_branch_type branch_type;
906e58ca
NC		 2600
2601 /* Where this stub is being called from, or, in the case of combined
2602 stub sections, the first input section in the group. */
2603 asection *id_sec;
7413f23f
DJ		 2604
2605 /* The name for the local symbol at the start of this stub. The
2606 stub name in the hash table has to be unique; this does not, so
2607 it can be friendlier. */
2608 char *output_name;
906e58ca
NC		 2609};
2610
e489d0ae
PB		 2611/* Used to build a map of a section. This is required for mixed-endian
2612 code/data. */
2613
2614typedef struct elf32_elf_section_map
2615{
2616 bfd_vma vma;
2617 char type;
2618}
2619elf32_arm_section_map;
2620
c7b8f16e
JB		 2621/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2622
2623typedef enum
2624{
2625 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2626 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2627 VFP11_ERRATUM_ARM_VENEER,
2628 VFP11_ERRATUM_THUMB_VENEER
2629}
2630elf32_vfp11_erratum_type;
2631
2632typedef struct elf32_vfp11_erratum_list
2633{
2634 struct elf32_vfp11_erratum_list *next;
2635 bfd_vma vma;
2636 union
2637 {
2638 struct
2639 {
2640 struct elf32_vfp11_erratum_list *veneer;
2641 unsigned int vfp_insn;
2642 } b;
2643 struct
2644 {
2645 struct elf32_vfp11_erratum_list *branch;
2646 unsigned int id;
2647 } v;
2648 } u;
2649 elf32_vfp11_erratum_type type;
2650}
2651elf32_vfp11_erratum_list;
2652
2468f9c9
PB		 2653typedef enum
2654{
2655 DELETE_EXIDX_ENTRY,
2656 INSERT_EXIDX_CANTUNWIND_AT_END
2657}
2658arm_unwind_edit_type;
2659
2660/* A (sorted) list of edits to apply to an unwind table. */
2661typedef struct arm_unwind_table_edit
2662{
2663 arm_unwind_edit_type type;
2664 /* Note: we sometimes want to insert an unwind entry corresponding to a
2665 section different from the one we're currently writing out, so record the
2666 (text) section this edit relates to here. */
2667 asection *linked_section;
2668 unsigned int index;
2669 struct arm_unwind_table_edit *next;
2670}
2671arm_unwind_table_edit;
2672
8e3de13a 2673typedef struct _arm_elf_section_data
e489d0ae 2674{
2468f9c9 2675 /* Information about mapping symbols. */
e489d0ae 2676 struct bfd_elf_section_data elf;
8e3de13a 2677 unsigned int mapcount;
c7b8f16e 2678 unsigned int mapsize;
e489d0ae 2679 elf32_arm_section_map *map;
2468f9c9 2680 /* Information about CPU errata. */
c7b8f16e
JB		 2681 unsigned int erratumcount;
2682 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2683 /* Information about unwind tables. */
2684 union
2685 {
2686 /* Unwind info attached to a text section. */
2687 struct
2688 {
2689 asection *arm_exidx_sec;
2690 } text;
2691
2692 /* Unwind info attached to an .ARM.exidx section. */
2693 struct
2694 {
2695 arm_unwind_table_edit *unwind_edit_list;
2696 arm_unwind_table_edit *unwind_edit_tail;
2697 } exidx;
2698 } u;
8e3de13a
NC		 2699}
2700_arm_elf_section_data;
e489d0ae
PB		 2701
2702#define elf32_arm_section_data(sec) \
8e3de13a 2703 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2704
48229727
JB		 2705/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2706 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2707 so may be created multiple times: we use an array of these entries whilst
2708 relaxing which we can refresh easily, then create stubs for each potentially
2709 erratum-triggering instruction once we've settled on a solution. */
2710
b38cadfb
NC		 2711struct a8_erratum_fix
2712{
48229727
JB		 2713 bfd *input_bfd;
2714 asection *section;
2715 bfd_vma offset;
2716 bfd_vma addend;
2717 unsigned long orig_insn;
2718 char *stub_name;
2719 enum elf32_arm_stub_type stub_type;
35fc36a8 2720 enum arm_st_branch_type branch_type;
48229727
JB		 2721};
2722
2723/* A table of relocs applied to branches which might trigger Cortex-A8
2724 erratum. */
2725
b38cadfb
NC		 2726struct a8_erratum_reloc
2727{
48229727
JB		 2728 bfd_vma from;
2729 bfd_vma destination;
92750f34
DJ		 2730 struct elf32_arm_link_hash_entry *hash;
2731 const char *sym_name;
48229727 2732 unsigned int r_type;
35fc36a8 2733 enum arm_st_branch_type branch_type;
48229727
JB		 2734 bfd_boolean non_a8_stub;
2735};
2736
ba93b8ac
DJ		 2737/* The size of the thread control block. */
2738#define TCB_SIZE 8
2739
34e77a92
RS		 2740/* ARM-specific information about a PLT entry, over and above the usual
2741 gotplt_union. */
b38cadfb
NC		 2742struct arm_plt_info
2743{
34e77a92
RS		 2744 /* We reference count Thumb references to a PLT entry separately,
2745 so that we can emit the Thumb trampoline only if needed. */
2746 bfd_signed_vma thumb_refcount;
2747
2748 /* Some references from Thumb code may be eliminated by BL->BLX
2749 conversion, so record them separately. */
2750 bfd_signed_vma maybe_thumb_refcount;
2751
2752 /* How many of the recorded PLT accesses were from non-call relocations.
2753 This information is useful when deciding whether anything takes the
2754 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2755 non-call references to the function should resolve directly to the
2756 real runtime target. */
2757 unsigned int noncall_refcount;
2758
2759 /* Since PLT entries have variable size if the Thumb prologue is
2760 used, we need to record the index into .got.plt instead of
2761 recomputing it from the PLT offset. */
2762 bfd_signed_vma got_offset;
2763};
2764
2765/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2766struct arm_local_iplt_info
2767{
34e77a92
RS		 2768 /* The information that is usually found in the generic ELF part of
2769 the hash table entry. */
2770 union gotplt_union root;
2771
2772 /* The information that is usually found in the ARM-specific part of
2773 the hash table entry. */
2774 struct arm_plt_info arm;
2775
2776 /* A list of all potential dynamic relocations against this symbol. */
2777 struct elf_dyn_relocs *dyn_relocs;
2778};
2779
0ffa91dd 2780struct elf_arm_obj_tdata
ba93b8ac
DJ		 2781{
2782 struct elf_obj_tdata root;
2783
2784 /* tls_type for each local got entry. */
2785 char *local_got_tls_type;
ee065d83 2786
0855e32b
NS		 2787 /* GOTPLT entries for TLS descriptors. */
2788 bfd_vma *local_tlsdesc_gotent;
2789
34e77a92
RS		 2790 /* Information for local symbols that need entries in .iplt. */
2791 struct arm_local_iplt_info **local_iplt;
2792
bf21ed78
MS		 2793 /* Zero to warn when linking objects with incompatible enum sizes. */
2794 int no_enum_size_warning;
a9dc9481
JM		 2795
2796 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2797 int no_wchar_size_warning;
ba93b8ac
DJ		 2798};
2799
0ffa91dd
NC		 2800#define elf_arm_tdata(bfd) \
2801 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2802
0ffa91dd
NC		 2803#define elf32_arm_local_got_tls_type(bfd) \
2804 (elf_arm_tdata (bfd)->local_got_tls_type)
2805
0855e32b
NS		 2806#define elf32_arm_local_tlsdesc_gotent(bfd) \
2807 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2808
34e77a92
RS		 2809#define elf32_arm_local_iplt(bfd) \
2810 (elf_arm_tdata (bfd)->local_iplt)
2811
0ffa91dd
NC		 2812#define is_arm_elf(bfd) \
2813 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2814 && elf_tdata (bfd) != NULL \
4dfe6ac6 2815 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2816
2817static bfd_boolean
2818elf32_arm_mkobject (bfd *abfd)
2819{
0ffa91dd 2820 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2821 ARM_ELF_DATA);
ba93b8ac
DJ		 2822}
2823
ba93b8ac
DJ		 2824#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2825
ba96a88f 2826/* Arm ELF linker hash entry. */
252b5132 2827struct elf32_arm_link_hash_entry
b38cadfb
NC		 2828{
2829 struct elf_link_hash_entry root;
252b5132 2830
b38cadfb
NC		 2831 /* Track dynamic relocs copied for this symbol. */
2832 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2833
b38cadfb
NC		 2834 /* ARM-specific PLT information. */
2835 struct arm_plt_info plt;
ba93b8ac
DJ		 2836
2837#define GOT_UNKNOWN 0
2838#define GOT_NORMAL 1
2839#define GOT_TLS_GD 2
2840#define GOT_TLS_IE 4
0855e32b
NS		 2841#define GOT_TLS_GDESC 8
2842#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2843 unsigned int tls_type : 8;
34e77a92 2844
b38cadfb
NC		 2845 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2846 unsigned int is_iplt : 1;
34e77a92 2847
b38cadfb 2848 unsigned int unused : 23;
a4fd1a8e 2849
b38cadfb
NC		 2850 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2851 starting at the end of the jump table. */
2852 bfd_vma tlsdesc_got;
0855e32b 2853
b38cadfb
NC		 2854 /* The symbol marking the real symbol location for exported thumb
2855 symbols with Arm stubs. */
2856 struct elf_link_hash_entry *export_glue;
906e58ca 2857
b38cadfb 2858 /* A pointer to the most recently used stub hash entry against this
8029a119 2859 symbol. */
b38cadfb
NC		 2860 struct elf32_arm_stub_hash_entry *stub_cache;
2861};
252b5132 2862
252b5132 2863/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2864#define elf32_arm_link_hash_traverse(table, func, info) \
2865 (elf_link_hash_traverse \
2866 (&(table)->root, \
b7693d02 2867 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2868 (info)))
2869
2870/* Get the ARM elf linker hash table from a link_info structure. */
2871#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2872 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2873 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2874
906e58ca
NC		 2875#define arm_stub_hash_lookup(table, string, create, copy) \
2876 ((struct elf32_arm_stub_hash_entry *) \
2877 bfd_hash_lookup ((table), (string), (create), (copy)))
2878
21d799b5
NC		 2879/* Array to keep track of which stub sections have been created, and
2880 information on stub grouping. */
2881struct map_stub
2882{
2883 /* This is the section to which stubs in the group will be
2884 attached. */
2885 asection *link_sec;
2886 /* The stub section. */
2887 asection *stub_sec;
2888};
2889
0855e32b
NS		 2890#define elf32_arm_compute_jump_table_size(htab) \
2891 ((htab)->next_tls_desc_index * 4)
2892
9b485d32 2893/* ARM ELF linker hash table. */
252b5132 2894struct elf32_arm_link_hash_table
906e58ca
NC		 2895{
2896 /* The main hash table. */
2897 struct elf_link_hash_table root;
252b5132 2898
906e58ca
NC		 2899 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2900 bfd_size_type thumb_glue_size;
252b5132 2901
906e58ca
NC		 2902 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2903 bfd_size_type arm_glue_size;
252b5132 2904
906e58ca
NC		 2905 /* The size in bytes of section containing the ARMv4 BX veneers. */
2906 bfd_size_type bx_glue_size;
845b51d6 2907
906e58ca
NC		 2908 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2909 veneer has been populated. */
2910 bfd_vma bx_glue_offset[15];
845b51d6 2911
906e58ca
NC		 2912 /* The size in bytes of the section containing glue for VFP11 erratum
2913 veneers. */
2914 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2915
48229727
JB		 2916 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2917 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2918 elf32_arm_write_section(). */
2919 struct a8_erratum_fix *a8_erratum_fixes;
2920 unsigned int num_a8_erratum_fixes;
2921
906e58ca
NC		 2922 /* An arbitrary input BFD chosen to hold the glue sections. */
2923 bfd * bfd_of_glue_owner;
ba96a88f 2924
906e58ca
NC		 2925 /* Nonzero to output a BE8 image. */
2926 int byteswap_code;
e489d0ae 2927
906e58ca
NC		 2928 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2929 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2930 int target1_is_rel;
9c504268 2931
906e58ca
NC		 2932 /* The relocation to use for R_ARM_TARGET2 relocations. */
2933 int target2_reloc;
eb043451 2934
906e58ca
NC		 2935 /* 0 = Ignore R_ARM_V4BX.
2936 1 = Convert BX to MOV PC.
2937 2 = Generate v4 interworing stubs. */
2938 int fix_v4bx;
319850b4 2939
48229727
JB		 2940 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2941 int fix_cortex_a8;
2942
2de70689
MGD		 2943 /* Whether we should fix the ARM1176 BLX immediate issue. */
2944 int fix_arm1176;
2945
906e58ca
NC		 2946 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2947 int use_blx;
33bfe774 2948
906e58ca
NC		 2949 /* What sort of code sequences we should look for which may trigger the
2950 VFP11 denorm erratum. */
2951 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2952
906e58ca
NC		 2953 /* Global counter for the number of fixes we have emitted. */
2954 int num_vfp11_fixes;
c7b8f16e 2955
906e58ca
NC		 2956 /* Nonzero to force PIC branch veneers. */
2957 int pic_veneer;
27e55c4d 2958
906e58ca
NC		 2959 /* The number of bytes in the initial entry in the PLT. */
2960 bfd_size_type plt_header_size;
e5a52504 2961
906e58ca
NC		 2962 /* The number of bytes in the subsequent PLT etries. */
2963 bfd_size_type plt_entry_size;
e5a52504 2964
906e58ca
NC		 2965 /* True if the target system is VxWorks. */
2966 int vxworks_p;
00a97672 2967
906e58ca
NC		 2968 /* True if the target system is Symbian OS. */
2969 int symbian_p;
e5a52504 2970
b38cadfb
NC		 2971 /* True if the target system is Native Client. */
2972 int nacl_p;
2973
906e58ca
NC		 2974 /* True if the target uses REL relocations. */
2975 int use_rel;
4e7fd91e 2976
0855e32b
NS		 2977 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2978 bfd_vma next_tls_desc_index;
2979
2980 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2981 bfd_vma num_tls_desc;
2982
906e58ca 2983 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 2984 asection *sdynbss;
2985 asection *srelbss;
5e681ec4 2986
906e58ca
NC		 2987 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2988 asection *srelplt2;
00a97672 2989
0855e32b
NS		 2990 /* The offset into splt of the PLT entry for the TLS descriptor
2991 resolver. Special values are 0, if not necessary (or not found
2992 to be necessary yet), and -1 if needed but not determined
2993 yet. */
2994 bfd_vma dt_tlsdesc_plt;
2995
2996 /* The offset into sgot of the GOT entry used by the PLT entry
2997 above. */
b38cadfb 2998 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 2999
3000 /* Offset in .plt section of tls_arm_trampoline. */
3001 bfd_vma tls_trampoline;
3002
906e58ca
NC		 3003 /* Data for R_ARM_TLS_LDM32 relocations. */
3004 union
3005 {
3006 bfd_signed_vma refcount;
3007 bfd_vma offset;
3008 } tls_ldm_got;
b7693d02 3009
87d72d41
AM		 3010 /* Small local sym cache. */
3011 struct sym_cache sym_cache;
906e58ca
NC		 3012
3013 /* For convenience in allocate_dynrelocs. */
3014 bfd * obfd;
3015
0855e32b
NS		 3016 /* The amount of space used by the reserved portion of the sgotplt
3017 section, plus whatever space is used by the jump slots. */
3018 bfd_vma sgotplt_jump_table_size;
3019
906e58ca
NC		 3020 /* The stub hash table. */
3021 struct bfd_hash_table stub_hash_table;
3022
3023 /* Linker stub bfd. */
3024 bfd *stub_bfd;
3025
3026 /* Linker call-backs. */
7a89b94e 3027 asection * (*add_stub_section) (const char *, asection *, unsigned int);
906e58ca
NC		 3028 void (*layout_sections_again) (void);
3029
3030 /* Array to keep track of which stub sections have been created, and
3031 information on stub grouping. */
21d799b5 3032 struct map_stub *stub_group;
906e58ca 3033
fe33d2fa
CL		 3034 /* Number of elements in stub_group. */
3035 int top_id;
3036
906e58ca
NC		 3037 /* Assorted information used by elf32_arm_size_stubs. */
3038 unsigned int bfd_count;
3039 int top_index;
3040 asection **input_list;
3041};
252b5132 3042
780a67af
NC		 3043/* Create an entry in an ARM ELF linker hash table. */
3044
3045static struct bfd_hash_entry *
57e8b36a 3046elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
99059e56
RM		 3047 struct bfd_hash_table * table,
3048 const char * string)
780a67af
NC		 3049{
3050 struct elf32_arm_link_hash_entry * ret =
3051 (struct elf32_arm_link_hash_entry *) entry;
3052
3053 /* Allocate the structure if it has not already been allocated by a
3054 subclass. */
906e58ca 3055 if (ret == NULL)
21d799b5 3056 ret = (struct elf32_arm_link_hash_entry *)
99059e56 3057 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3058 if (ret == NULL)
780a67af
NC		 3059 return (struct bfd_hash_entry *) ret;
3060
3061 /* Call the allocation method of the superclass. */
3062 ret = ((struct elf32_arm_link_hash_entry *)
3063 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3064 table, string));
57e8b36a 3065 if (ret != NULL)
b7693d02 3066 {
0bdcacaf 3067 ret->dyn_relocs = NULL;
ba93b8ac 3068 ret->tls_type = GOT_UNKNOWN;
0855e32b 3069 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3070 ret->plt.thumb_refcount = 0;
3071 ret->plt.maybe_thumb_refcount = 0;
3072 ret->plt.noncall_refcount = 0;
3073 ret->plt.got_offset = -1;
3074 ret->is_iplt = FALSE;
a4fd1a8e 3075 ret->export_glue = NULL;
906e58ca
NC		 3076
3077 ret->stub_cache = NULL;
b7693d02 3078 }
780a67af
NC		 3079
3080 return (struct bfd_hash_entry *) ret;
3081}
3082
34e77a92
RS		 3083/* Ensure that we have allocated bookkeeping structures for ABFD's local
3084 symbols. */
3085
3086static bfd_boolean
3087elf32_arm_allocate_local_sym_info (bfd *abfd)
3088{
3089 if (elf_local_got_refcounts (abfd) == NULL)
3090 {
3091 bfd_size_type num_syms;
3092 bfd_size_type size;
3093 char *data;
3094
3095 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3096 size = num_syms * (sizeof (bfd_signed_vma)
3097 + sizeof (struct arm_local_iplt_info *)
3098 + sizeof (bfd_vma)
3099 + sizeof (char));
3100 data = bfd_zalloc (abfd, size);
3101 if (data == NULL)
3102 return FALSE;
3103
3104 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3105 data += num_syms * sizeof (bfd_signed_vma);
3106
3107 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3108 data += num_syms * sizeof (struct arm_local_iplt_info *);
3109
3110 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3111 data += num_syms * sizeof (bfd_vma);
3112
3113 elf32_arm_local_got_tls_type (abfd) = data;
3114 }
3115 return TRUE;
3116}
3117
3118/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3119 to input bfd ABFD. Create the information if it doesn't already exist.
3120 Return null if an allocation fails. */
3121
3122static struct arm_local_iplt_info *
3123elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3124{
3125 struct arm_local_iplt_info **ptr;
3126
3127 if (!elf32_arm_allocate_local_sym_info (abfd))
3128 return NULL;
3129
3130 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3131 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3132 if (*ptr == NULL)
3133 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3134 return *ptr;
3135}
3136
3137/* Try to obtain PLT information for the symbol with index R_SYMNDX
3138 in ABFD's symbol table. If the symbol is global, H points to its
3139 hash table entry, otherwise H is null.
3140
3141 Return true if the symbol does have PLT information. When returning
3142 true, point *ROOT_PLT at the target-independent reference count/offset
3143 union and *ARM_PLT at the ARM-specific information. */
3144
3145static bfd_boolean
3146elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3147 unsigned long r_symndx, union gotplt_union **root_plt,
3148 struct arm_plt_info **arm_plt)
3149{
3150 struct arm_local_iplt_info *local_iplt;
3151
3152 if (h != NULL)
3153 {
3154 *root_plt = &h->root.plt;
3155 *arm_plt = &h->plt;
3156 return TRUE;
3157 }
3158
3159 if (elf32_arm_local_iplt (abfd) == NULL)
3160 return FALSE;
3161
3162 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3163 if (local_iplt == NULL)
3164 return FALSE;
3165
3166 *root_plt = &local_iplt->root;
3167 *arm_plt = &local_iplt->arm;
3168 return TRUE;
3169}
3170
3171/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3172 before it. */
3173
3174static bfd_boolean
3175elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3176 struct arm_plt_info *arm_plt)
3177{
3178 struct elf32_arm_link_hash_table *htab;
3179
3180 htab = elf32_arm_hash_table (info);
3181 return (arm_plt->thumb_refcount != 0
3182 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3183}
3184
3185/* Return a pointer to the head of the dynamic reloc list that should
3186 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3187 ABFD's symbol table. Return null if an error occurs. */
3188
3189static struct elf_dyn_relocs **
3190elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3191 Elf_Internal_Sym *isym)
3192{
3193 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3194 {
3195 struct arm_local_iplt_info *local_iplt;
3196
3197 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3198 if (local_iplt == NULL)
3199 return NULL;
3200 return &local_iplt->dyn_relocs;
3201 }
3202 else
3203 {
3204 /* Track dynamic relocs needed for local syms too.
3205 We really need local syms available to do this
3206 easily. Oh well. */
3207 asection *s;
3208 void *vpp;
3209
3210 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3211 if (s == NULL)
3212 abort ();
3213
3214 vpp = &elf_section_data (s)->local_dynrel;
3215 return (struct elf_dyn_relocs **) vpp;
3216 }
3217}
3218
906e58ca
NC		 3219/* Initialize an entry in the stub hash table. */
3220
3221static struct bfd_hash_entry *
3222stub_hash_newfunc (struct bfd_hash_entry *entry,
3223 struct bfd_hash_table *table,
3224 const char *string)
3225{
3226 /* Allocate the structure if it has not already been allocated by a
3227 subclass. */
3228 if (entry == NULL)
3229 {
21d799b5 3230 entry = (struct bfd_hash_entry *)
99059e56 3231 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3232 if (entry == NULL)
3233 return entry;
3234 }
3235
3236 /* Call the allocation method of the superclass. */
3237 entry = bfd_hash_newfunc (entry, table, string);
3238 if (entry != NULL)
3239 {
3240 struct elf32_arm_stub_hash_entry *eh;
3241
3242 /* Initialize the local fields. */
3243 eh = (struct elf32_arm_stub_hash_entry *) entry;
3244 eh->stub_sec = NULL;
3245 eh->stub_offset = 0;
3246 eh->target_value = 0;
3247 eh->target_section = NULL;
cedfb179
DK		 3248 eh->target_addend = 0;
3249 eh->orig_insn = 0;
906e58ca 3250 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3251 eh->stub_size = 0;
3252 eh->stub_template = NULL;
3253 eh->stub_template_size = 0;
906e58ca
NC		 3254 eh->h = NULL;
3255 eh->id_sec = NULL;
d8d2f433 3256 eh->output_name = NULL;
906e58ca
NC		 3257 }
3258
3259 return entry;
3260}
3261
00a97672 3262/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3263 shortcuts to them in our hash table. */
3264
3265static bfd_boolean
57e8b36a 3266create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3267{
3268 struct elf32_arm_link_hash_table *htab;
3269
e5a52504 3270 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3271 if (htab == NULL)
3272 return FALSE;
3273
e5a52504
MM		 3274 /* BPABI objects never have a GOT, or associated sections. */
3275 if (htab->symbian_p)
3276 return TRUE;
3277
5e681ec4
PB		 3278 if (! _bfd_elf_create_got_section (dynobj, info))
3279 return FALSE;
3280
5e681ec4
PB		 3281 return TRUE;
3282}
3283
34e77a92
RS		 3284/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3285
3286static bfd_boolean
3287create_ifunc_sections (struct bfd_link_info *info)
3288{
3289 struct elf32_arm_link_hash_table *htab;
3290 const struct elf_backend_data *bed;
3291 bfd *dynobj;
3292 asection *s;
3293 flagword flags;
b38cadfb 3294
34e77a92
RS		 3295 htab = elf32_arm_hash_table (info);
3296 dynobj = htab->root.dynobj;
3297 bed = get_elf_backend_data (dynobj);
3298 flags = bed->dynamic_sec_flags;
3299
3300 if (htab->root.iplt == NULL)
3301 {
3d4d4302
AM		 3302 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3303 flags | SEC_READONLY | SEC_CODE);
34e77a92 3304 if (s == NULL
a0f49396 3305 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3306 return FALSE;
3307 htab->root.iplt = s;
3308 }
3309
3310 if (htab->root.irelplt == NULL)
3311 {
3d4d4302
AM		 3312 s = bfd_make_section_anyway_with_flags (dynobj,
3313 RELOC_SECTION (htab, ".iplt"),
3314 flags | SEC_READONLY);
34e77a92 3315 if (s == NULL
a0f49396 3316 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3317 return FALSE;
3318 htab->root.irelplt = s;
3319 }
3320
3321 if (htab->root.igotplt == NULL)
3322 {
3d4d4302 3323 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3324 if (s == NULL
3325 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3326 return FALSE;
3327 htab->root.igotplt = s;
3328 }
3329 return TRUE;
3330}
3331
00a97672
RS		 3332/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3333 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3334 hash table. */
3335
3336static bfd_boolean
57e8b36a 3337elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3338{
3339 struct elf32_arm_link_hash_table *htab;
3340
3341 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3342 if (htab == NULL)
3343 return FALSE;
3344
362d30a1 3345 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3346 return FALSE;
3347
3348 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3349 return FALSE;
3350
3d4d4302 3351 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3352 if (!info->shared)
3d4d4302
AM		 3353 htab->srelbss = bfd_get_linker_section (dynobj,
3354 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3355
3356 if (htab->vxworks_p)
3357 {
3358 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3359 return FALSE;
3360
3361 if (info->shared)
3362 {
3363 htab->plt_header_size = 0;
3364 htab->plt_entry_size
3365 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3366 }
3367 else
3368 {
3369 htab->plt_header_size
3370 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3371 htab->plt_entry_size
3372 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3373 }
3374 }
5e681ec4 3375
362d30a1
RS		 3376 if (!htab->root.splt
3377 || !htab->root.srelplt
e5a52504 3378 || !htab->sdynbss
5e681ec4
PB		 3379 || (!info->shared && !htab->srelbss))
3380 abort ();
3381
3382 return TRUE;
3383}
3384
906e58ca
NC		 3385/* Copy the extra info we tack onto an elf_link_hash_entry. */
3386
3387static void
3388elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3389 struct elf_link_hash_entry *dir,
3390 struct elf_link_hash_entry *ind)
3391{
3392 struct elf32_arm_link_hash_entry *edir, *eind;
3393
3394 edir = (struct elf32_arm_link_hash_entry *) dir;
3395 eind = (struct elf32_arm_link_hash_entry *) ind;
3396
0bdcacaf 3397 if (eind->dyn_relocs != NULL)
906e58ca 3398 {
0bdcacaf 3399 if (edir->dyn_relocs != NULL)
906e58ca 3400 {
0bdcacaf
RS		 3401 struct elf_dyn_relocs **pp;
3402 struct elf_dyn_relocs *p;
906e58ca
NC		 3403
3404 /* Add reloc counts against the indirect sym to the direct sym
3405 list. Merge any entries against the same section. */
0bdcacaf 3406 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3407 {
0bdcacaf 3408 struct elf_dyn_relocs *q;
906e58ca 3409
0bdcacaf
RS		 3410 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3411 if (q->sec == p->sec)
906e58ca
NC		 3412 {
3413 q->pc_count += p->pc_count;
3414 q->count += p->count;
3415 *pp = p->next;
3416 break;
3417 }
3418 if (q == NULL)
3419 pp = &p->next;
3420 }
0bdcacaf 3421 *pp = edir->dyn_relocs;
906e58ca
NC		 3422 }
3423
0bdcacaf
RS		 3424 edir->dyn_relocs = eind->dyn_relocs;
3425 eind->dyn_relocs = NULL;
906e58ca
NC		 3426 }
3427
3428 if (ind->root.type == bfd_link_hash_indirect)
3429 {
3430 /* Copy over PLT info. */
34e77a92
RS		 3431 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3432 eind->plt.thumb_refcount = 0;
3433 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3434 eind->plt.maybe_thumb_refcount = 0;
3435 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3436 eind->plt.noncall_refcount = 0;
3437
3438 /* We should only allocate a function to .iplt once the final
3439 symbol information is known. */
3440 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3441
3442 if (dir->got.refcount <= 0)
3443 {
3444 edir->tls_type = eind->tls_type;
3445 eind->tls_type = GOT_UNKNOWN;
3446 }
3447 }
3448
3449 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3450}
3451
3452/* Create an ARM elf linker hash table. */
3453
3454static struct bfd_link_hash_table *
3455elf32_arm_link_hash_table_create (bfd *abfd)
3456{
3457 struct elf32_arm_link_hash_table *ret;
3458 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3459
7bf52ea2 3460 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3461 if (ret == NULL)
3462 return NULL;
3463
3464 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3465 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3466 sizeof (struct elf32_arm_link_hash_entry),
3467 ARM_ELF_DATA))
906e58ca
NC		 3468 {
3469 free (ret);
3470 return NULL;
3471 }
3472
906e58ca 3473 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3474#ifdef FOUR_WORD_PLT
3475 ret->plt_header_size = 16;
3476 ret->plt_entry_size = 16;
3477#else
3478 ret->plt_header_size = 20;
1db37fe6 3479 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
906e58ca 3480#endif
906e58ca 3481 ret->use_rel = 1;
906e58ca 3482 ret->obfd = abfd;
906e58ca
NC		 3483
3484 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3485 sizeof (struct elf32_arm_stub_hash_entry)))
3486 {
3487 free (ret);
3488 return NULL;
3489 }
3490
3491 return &ret->root.root;
3492}
3493
3494/* Free the derived linker hash table. */
3495
3496static void
3497elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3498{
3499 struct elf32_arm_link_hash_table *ret
3500 = (struct elf32_arm_link_hash_table *) hash;
3501
3502 bfd_hash_table_free (&ret->stub_hash_table);
9f7c3e5e 3503 _bfd_elf_link_hash_table_free (hash);
906e58ca
NC		 3504}
3505
3506/* Determine if we're dealing with a Thumb only architecture. */
3507
3508static bfd_boolean
3509using_thumb_only (struct elf32_arm_link_hash_table *globals)
3510{
3511 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3512 Tag_CPU_arch);
3513 int profile;
3514
41ed1ee7
DJ		 3515 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3516 return TRUE;
3517
9e3c6df6 3518 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 3519 return FALSE;
3520
3521 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3522 Tag_CPU_arch_profile);
3523
3524 return profile == 'M';
3525}
3526
3527/* Determine if we're dealing with a Thumb-2 object. */
3528
3529static bfd_boolean
3530using_thumb2 (struct elf32_arm_link_hash_table *globals)
3531{
3532 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3533 Tag_CPU_arch);
3534 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3535}
3536
cd1dac3d
DG		 3537/* Determine what kind of NOPs are available. */
3538
3539static bfd_boolean
3540arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3541{
3542 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3543 Tag_CPU_arch);
3544 return arch == TAG_CPU_ARCH_V6T2
3545 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3546 || arch == TAG_CPU_ARCH_V7
3547 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3548}
3549
3550static bfd_boolean
3551arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3552{
3553 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3554 Tag_CPU_arch);
9e3c6df6
PB		 3555 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3556 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3557}
3558
f4ac8484
DJ		 3559static bfd_boolean
3560arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3561{
3562 switch (stub_type)
3563 {
fea2b4d6
CL		 3564 case arm_stub_long_branch_thumb_only:
3565 case arm_stub_long_branch_v4t_thumb_arm:
3566 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3567 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3568 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3569 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3570 return TRUE;
3571 case arm_stub_none:
3572 BFD_FAIL ();
3573 return FALSE;
3574 break;
3575 default:
3576 return FALSE;
3577 }
3578}
3579
906e58ca
NC		 3580/* Determine the type of stub needed, if any, for a call. */
3581
3582static enum elf32_arm_stub_type
3583arm_type_of_stub (struct bfd_link_info *info,
3584 asection *input_sec,
3585 const Elf_Internal_Rela *rel,
34e77a92 3586 unsigned char st_type,
35fc36a8 3587 enum arm_st_branch_type *actual_branch_type,
906e58ca 3588 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3589 bfd_vma destination,
3590 asection *sym_sec,
3591 bfd *input_bfd,
3592 const char *name)
906e58ca
NC		 3593{
3594 bfd_vma location;
3595 bfd_signed_vma branch_offset;
3596 unsigned int r_type;
3597 struct elf32_arm_link_hash_table * globals;
3598 int thumb2;
3599 int thumb_only;
3600 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3601 int use_plt = 0;
35fc36a8 3602 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3603 union gotplt_union *root_plt;
3604 struct arm_plt_info *arm_plt;
906e58ca 3605
35fc36a8 3606 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3607 return stub_type;
3608
906e58ca 3609 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3610 if (globals == NULL)
3611 return stub_type;
906e58ca
NC		 3612
3613 thumb_only = using_thumb_only (globals);
3614
3615 thumb2 = using_thumb2 (globals);
3616
3617 /* Determine where the call point is. */
3618 location = (input_sec->output_offset
3619 + input_sec->output_section->vma
3620 + rel->r_offset);
3621
906e58ca
NC		 3622 r_type = ELF32_R_TYPE (rel->r_info);
3623
39f21624
NC		 3624 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3625 are considering a function call relocation. */
3626 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3627 && branch_type == ST_BRANCH_TO_ARM)
3628 branch_type = ST_BRANCH_TO_THUMB;
3629
34e77a92
RS		 3630 /* For TLS call relocs, it is the caller's responsibility to provide
3631 the address of the appropriate trampoline. */
3632 if (r_type != R_ARM_TLS_CALL
3633 && r_type != R_ARM_THM_TLS_CALL
3634 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3635 &root_plt, &arm_plt)
3636 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3637 {
34e77a92 3638 asection *splt;
fe33d2fa 3639
34e77a92
RS		 3640 if (hash == NULL || hash->is_iplt)
3641 splt = globals->root.iplt;
3642 else
3643 splt = globals->root.splt;
3644 if (splt != NULL)
b38cadfb 3645 {
34e77a92
RS		 3646 use_plt = 1;
3647
3648 /* Note when dealing with PLT entries: the main PLT stub is in
3649 ARM mode, so if the branch is in Thumb mode, another
3650 Thumb->ARM stub will be inserted later just before the ARM
3651 PLT stub. We don't take this extra distance into account
3652 here, because if a long branch stub is needed, we'll add a
3653 Thumb->Arm one and branch directly to the ARM PLT entry
3654 because it avoids spreading offset corrections in several
3655 places. */
3656
3657 destination = (splt->output_section->vma
3658 + splt->output_offset
3659 + root_plt->offset);
3660 st_type = STT_FUNC;
3661 branch_type = ST_BRANCH_TO_ARM;
3662 }
5fa9e92f 3663 }
34e77a92
RS		 3664 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3665 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3666
fe33d2fa
CL		 3667 branch_offset = (bfd_signed_vma)(destination - location);
3668
0855e32b
NS		 3669 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3670 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3671 {
5fa9e92f
CL		 3672 /* Handle cases where:
3673 - this call goes too far (different Thumb/Thumb2 max
99059e56 3674 distance)
155d87d7 3675 - it's a Thumb->Arm call and blx is not available, or it's a
99059e56
RM		 3676 Thumb->Arm branch (not bl). A stub is needed in this case,
3677 but only if this call is not through a PLT entry. Indeed,
3678 PLT stubs handle mode switching already.
5fa9e92f 3679 */
906e58ca
NC		 3680 if ((!thumb2
3681 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3682 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3683 || (thumb2
3684 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3685 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3686 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3687 && (((r_type == R_ARM_THM_CALL
3688 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3689 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3690 && !use_plt))
906e58ca 3691 {
35fc36a8 3692 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3693 {
3694 /* Thumb to thumb. */
3695 if (!thumb_only)
3696 {
3697 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3698 /* PIC stubs. */
155d87d7 3699 ? ((globals->use_blx
9553db3c 3700 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3701 /* V5T and above. Stub starts with ARM code, so
3702 we must be able to switch mode before
3703 reaching it, which is only possible for 'bl'
3704 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3705 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3706 /* On V4T, use Thumb code only. */
d3626fb0 3707 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3708
3709 /* non-PIC stubs. */
155d87d7 3710 : ((globals->use_blx
9553db3c 3711 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3712 /* V5T and above. */
3713 ? arm_stub_long_branch_any_any
3714 /* V4T. */
d3626fb0 3715 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3716 }
3717 else
3718 {
3719 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3720 /* PIC stub. */
3721 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3722 /* non-PIC stub. */
3723 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3724 }
3725 }
3726 else
3727 {
3728 /* Thumb to arm. */
c820be07
NC		 3729 if (sym_sec != NULL
3730 && sym_sec->owner != NULL
3731 && !INTERWORK_FLAG (sym_sec->owner))
3732 {
3733 (*_bfd_error_handler)
3734 (_("%B(%s): warning: interworking not enabled.\n"
3735 " first occurrence: %B: Thumb call to ARM"),
3736 sym_sec->owner, input_bfd, name);
3737 }
3738
0855e32b
NS		 3739 stub_type =
3740 (info->shared | globals->pic_veneer)
c2b4a39d 3741 /* PIC stubs. */
0855e32b
NS		 3742 ? (r_type == R_ARM_THM_TLS_CALL
3743 /* TLS PIC stubs */
3744 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3745 : arm_stub_long_branch_v4t_thumb_tls_pic)
3746 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3747 /* V5T PIC and above. */
3748 ? arm_stub_long_branch_any_arm_pic
3749 /* V4T PIC stub. */
3750 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3751
3752 /* non-PIC stubs. */
0855e32b 3753 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3754 /* V5T and above. */
3755 ? arm_stub_long_branch_any_any
3756 /* V4T. */
3757 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3758
3759 /* Handle v4t short branches. */
fea2b4d6 3760 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3761 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3762 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3763 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3764 }
3765 }
3766 }
fe33d2fa
CL		 3767 else if (r_type == R_ARM_CALL
3768 || r_type == R_ARM_JUMP24
0855e32b
NS		 3769 || r_type == R_ARM_PLT32
3770 || r_type == R_ARM_TLS_CALL)
906e58ca 3771 {
35fc36a8 3772 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3773 {
3774 /* Arm to thumb. */
c820be07
NC		 3775
3776 if (sym_sec != NULL
3777 && sym_sec->owner != NULL
3778 && !INTERWORK_FLAG (sym_sec->owner))
3779 {
3780 (*_bfd_error_handler)
3781 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3782 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3783 sym_sec->owner, input_bfd, name);
3784 }
3785
3786 /* We have an extra 2-bytes reach because of
3787 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3788 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3789 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3790 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3791 || (r_type == R_ARM_JUMP24)
3792 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3793 {
3794 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3795 /* PIC stubs. */
ebe24dd4
CL		 3796 ? ((globals->use_blx)
3797 /* V5T and above. */
3798 ? arm_stub_long_branch_any_thumb_pic
3799 /* V4T stub. */
3800 : arm_stub_long_branch_v4t_arm_thumb_pic)
3801
c2b4a39d
CL		 3802 /* non-PIC stubs. */
3803 : ((globals->use_blx)
3804 /* V5T and above. */
3805 ? arm_stub_long_branch_any_any
3806 /* V4T. */
3807 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3808 }
3809 }
3810 else
3811 {
3812 /* Arm to arm. */
3813 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3814 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3815 {
0855e32b
NS		 3816 stub_type =
3817 (info->shared | globals->pic_veneer)
c2b4a39d 3818 /* PIC stubs. */
0855e32b
NS		 3819 ? (r_type == R_ARM_TLS_CALL
3820 /* TLS PIC Stub */
3821 ? arm_stub_long_branch_any_tls_pic
7a89b94e
NC		 3822 : (globals->nacl_p
3823 ? arm_stub_long_branch_arm_nacl_pic
3824 : arm_stub_long_branch_any_arm_pic))
c2b4a39d 3825 /* non-PIC stubs. */
7a89b94e
NC		 3826 : (globals->nacl_p
3827 ? arm_stub_long_branch_arm_nacl
3828 : arm_stub_long_branch_any_any);
906e58ca
NC		 3829 }
3830 }
3831 }
3832
fe33d2fa
CL		 3833 /* If a stub is needed, record the actual destination type. */
3834 if (stub_type != arm_stub_none)
35fc36a8 3835 *actual_branch_type = branch_type;
fe33d2fa 3836
906e58ca
NC		 3837 return stub_type;
3838}
3839
3840/* Build a name for an entry in the stub hash table. */
3841
3842static char *
3843elf32_arm_stub_name (const asection *input_section,
3844 const asection *sym_sec,
3845 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3846 const Elf_Internal_Rela *rel,
3847 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3848{
3849 char *stub_name;
3850 bfd_size_type len;
3851
3852 if (hash)
3853 {
fe33d2fa 3854 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3855 stub_name = (char *) bfd_malloc (len);
906e58ca 3856 if (stub_name != NULL)
fe33d2fa 3857 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3858 input_section->id & 0xffffffff,
3859 hash->root.root.root.string,
fe33d2fa
CL		 3860 (int) rel->r_addend & 0xffffffff,
3861 (int) stub_type);
906e58ca
NC		 3862 }
3863 else
3864 {
fe33d2fa 3865 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3866 stub_name = (char *) bfd_malloc (len);
906e58ca 3867 if (stub_name != NULL)
fe33d2fa 3868 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3869 input_section->id & 0xffffffff,
3870 sym_sec->id & 0xffffffff,
0855e32b
NS		 3871 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3872 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3873 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3874 (int) rel->r_addend & 0xffffffff,
3875 (int) stub_type);
906e58ca
NC		 3876 }
3877
3878 return stub_name;
3879}
3880
3881/* Look up an entry in the stub hash. Stub entries are cached because
3882 creating the stub name takes a bit of time. */
3883
3884static struct elf32_arm_stub_hash_entry *
3885elf32_arm_get_stub_entry (const asection *input_section,
3886 const asection *sym_sec,
3887 struct elf_link_hash_entry *hash,
3888 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3889 struct elf32_arm_link_hash_table *htab,
3890 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3891{
3892 struct elf32_arm_stub_hash_entry *stub_entry;
3893 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3894 const asection *id_sec;
3895
3896 if ((input_section->flags & SEC_CODE) == 0)
3897 return NULL;
3898
3899 /* If this input section is part of a group of sections sharing one
3900 stub section, then use the id of the first section in the group.
3901 Stub names need to include a section id, as there may well be
3902 more than one stub used to reach say, printf, and we need to
3903 distinguish between them. */
3904 id_sec = htab->stub_group[input_section->id].link_sec;
3905
3906 if (h != NULL && h->stub_cache != NULL
3907 && h->stub_cache->h == h
fe33d2fa
CL		 3908 && h->stub_cache->id_sec == id_sec
3909 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3910 {
3911 stub_entry = h->stub_cache;
3912 }
3913 else
3914 {
3915 char *stub_name;
3916
fe33d2fa 3917 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3918 if (stub_name == NULL)
3919 return NULL;
3920
3921 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3922 stub_name, FALSE, FALSE);
3923 if (h != NULL)
3924 h->stub_cache = stub_entry;
3925
3926 free (stub_name);
3927 }
3928
3929 return stub_entry;
3930}
3931
48229727 3932/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3933 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3934 LINK_SEC_P may be NULL. */
906e58ca 3935
48229727
JB		 3936static asection *
3937elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3938 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3939{
3940 asection *link_sec;
3941 asection *stub_sec;
906e58ca
NC		 3942
3943 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3944 BFD_ASSERT (link_sec != NULL);
906e58ca 3945 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3946
906e58ca
NC		 3947 if (stub_sec == NULL)
3948 {
3949 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3950 if (stub_sec == NULL)
3951 {
3952 size_t namelen;
3953 bfd_size_type len;
3954 char *s_name;
3955
3956 namelen = strlen (link_sec->name);
3957 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3958 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3959 if (s_name == NULL)
3960 return NULL;
3961
3962 memcpy (s_name, link_sec->name, namelen);
3963 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
7a89b94e
NC		 3964 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
3965 htab->nacl_p ? 4 : 3);
906e58ca
NC		 3966 if (stub_sec == NULL)
3967 return NULL;
3968 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3969 }
3970 htab->stub_group[section->id].stub_sec = stub_sec;
3971 }
b38cadfb 3972
48229727
JB		 3973 if (link_sec_p)
3974 *link_sec_p = link_sec;
b38cadfb 3975
48229727
JB		 3976 return stub_sec;
3977}
3978
3979/* Add a new stub entry to the stub hash. Not all fields of the new
3980 stub entry are initialised. */
3981
3982static struct elf32_arm_stub_hash_entry *
3983elf32_arm_add_stub (const char *stub_name,
3984 asection *section,
3985 struct elf32_arm_link_hash_table *htab)
3986{
3987 asection *link_sec;
3988 asection *stub_sec;
3989 struct elf32_arm_stub_hash_entry *stub_entry;
3990
3991 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3992 if (stub_sec == NULL)
3993 return NULL;
906e58ca
NC		 3994
3995 /* Enter this entry into the linker stub hash table. */
3996 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3997 TRUE, FALSE);
3998 if (stub_entry == NULL)
3999 {
4000 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4001 section->owner,
4002 stub_name);
4003 return NULL;
4004 }
4005
4006 stub_entry->stub_sec = stub_sec;
4007 stub_entry->stub_offset = 0;
4008 stub_entry->id_sec = link_sec;
4009
906e58ca
NC		 4010 return stub_entry;
4011}
4012
4013/* Store an Arm insn into an output section not processed by
4014 elf32_arm_write_section. */
4015
4016static void
8029a119
NC		 4017put_arm_insn (struct elf32_arm_link_hash_table * htab,
4018 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4019{
4020 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4021 bfd_putl32 (val, ptr);
4022 else
4023 bfd_putb32 (val, ptr);
4024}
4025
4026/* Store a 16-bit Thumb insn into an output section not processed by
4027 elf32_arm_write_section. */
4028
4029static void
8029a119
NC		 4030put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4031 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4032{
4033 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4034 bfd_putl16 (val, ptr);
4035 else
4036 bfd_putb16 (val, ptr);
4037}
4038
0855e32b
NS		 4039/* If it's possible to change R_TYPE to a more efficient access
4040 model, return the new reloc type. */
4041
4042static unsigned
b38cadfb 4043elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4044 struct elf_link_hash_entry *h)
4045{
4046 int is_local = (h == NULL);
4047
4048 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4049 return r_type;
4050
b38cadfb 4051 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4052 switch (r_type)
4053 {
4054 case R_ARM_TLS_GOTDESC:
4055 case R_ARM_TLS_CALL:
4056 case R_ARM_THM_TLS_CALL:
4057 case R_ARM_TLS_DESCSEQ:
4058 case R_ARM_THM_TLS_DESCSEQ:
4059 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4060 }
4061
4062 return r_type;
4063}
4064
48229727
JB		 4065static bfd_reloc_status_type elf32_arm_final_link_relocate
4066 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4067 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4068 const char *, unsigned char, enum arm_st_branch_type,
4069 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4070
4563a860
JB		 4071static unsigned int
4072arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4073{
4074 switch (stub_type)
4075 {
4076 case arm_stub_a8_veneer_b_cond:
4077 case arm_stub_a8_veneer_b:
4078 case arm_stub_a8_veneer_bl:
4079 return 2;
4080
4081 case arm_stub_long_branch_any_any:
4082 case arm_stub_long_branch_v4t_arm_thumb:
4083 case arm_stub_long_branch_thumb_only:
4084 case arm_stub_long_branch_v4t_thumb_thumb:
4085 case arm_stub_long_branch_v4t_thumb_arm:
4086 case arm_stub_short_branch_v4t_thumb_arm:
4087 case arm_stub_long_branch_any_arm_pic:
4088 case arm_stub_long_branch_any_thumb_pic:
4089 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4090 case arm_stub_long_branch_v4t_arm_thumb_pic:
4091 case arm_stub_long_branch_v4t_thumb_arm_pic:
4092 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4093 case arm_stub_long_branch_any_tls_pic:
4094 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4095 case arm_stub_a8_veneer_blx:
4096 return 4;
b38cadfb 4097
7a89b94e
NC		 4098 case arm_stub_long_branch_arm_nacl:
4099 case arm_stub_long_branch_arm_nacl_pic:
4100 return 16;
4101
4563a860
JB		 4102 default:
4103 abort (); /* Should be unreachable. */
4104 }
4105}
4106
906e58ca
NC		 4107static bfd_boolean
4108arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4109 void * in_arg)
4110{
7a89b94e 4111#define MAXRELOCS 3
906e58ca 4112 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4113 struct elf32_arm_link_hash_table *globals;
906e58ca 4114 struct bfd_link_info *info;
906e58ca
NC		 4115 asection *stub_sec;
4116 bfd *stub_bfd;
906e58ca
NC		 4117 bfd_byte *loc;
4118 bfd_vma sym_value;
4119 int template_size;
4120 int size;
d3ce72d0 4121 const insn_sequence *template_sequence;
906e58ca 4122 int i;
48229727
JB		 4123 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4124 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4125 int nrelocs = 0;
906e58ca
NC		 4126
4127 /* Massage our args to the form they really have. */
4128 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4129 info = (struct bfd_link_info *) in_arg;
4130
4131 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4132 if (globals == NULL)
4133 return FALSE;
906e58ca 4134
906e58ca
NC		 4135 stub_sec = stub_entry->stub_sec;
4136
4dfe6ac6 4137 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4138 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4139 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4140 return TRUE;
fe33d2fa 4141
906e58ca
NC		 4142 /* Make a note of the offset within the stubs for this entry. */
4143 stub_entry->stub_offset = stub_sec->size;
4144 loc = stub_sec->contents + stub_entry->stub_offset;
4145
4146 stub_bfd = stub_sec->owner;
4147
906e58ca
NC		 4148 /* This is the address of the stub destination. */
4149 sym_value = (stub_entry->target_value
4150 + stub_entry->target_section->output_offset
4151 + stub_entry->target_section->output_section->vma);
4152
d3ce72d0 4153 template_sequence = stub_entry->stub_template;
461a49ca 4154 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4155
4156 size = 0;
461a49ca 4157 for (i = 0; i < template_size; i++)
906e58ca 4158 {
d3ce72d0 4159 switch (template_sequence[i].type)
461a49ca
DJ		 4160 {
4161 case THUMB16_TYPE:
48229727 4162 {
d3ce72d0
NC		 4163 bfd_vma data = (bfd_vma) template_sequence[i].data;
4164 if (template_sequence[i].reloc_addend != 0)
48229727 4165 {
99059e56
RM		 4166 /* We've borrowed the reloc_addend field to mean we should
4167 insert a condition code into this (Thumb-1 branch)
4168 instruction. See THUMB16_BCOND_INSN. */
4169 BFD_ASSERT ((data & 0xff00) == 0xd000);
4170 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
48229727 4171 }
fe33d2fa 4172 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4173 size += 2;
4174 }
461a49ca 4175 break;
906e58ca 4176
48229727 4177 case THUMB32_TYPE:
fe33d2fa
CL		 4178 bfd_put_16 (stub_bfd,
4179 (template_sequence[i].data >> 16) & 0xffff,
4180 loc + size);
4181 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4182 loc + size + 2);
99059e56
RM		 4183 if (template_sequence[i].r_type != R_ARM_NONE)
4184 {
4185 stub_reloc_idx[nrelocs] = i;
4186 stub_reloc_offset[nrelocs++] = size;
4187 }
4188 size += 4;
4189 break;
48229727 4190
461a49ca 4191 case ARM_TYPE:
fe33d2fa
CL		 4192 bfd_put_32 (stub_bfd, template_sequence[i].data,
4193 loc + size);
461a49ca
DJ		 4194 /* Handle cases where the target is encoded within the
4195 instruction. */
d3ce72d0 4196 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4197 {
48229727
JB		 4198 stub_reloc_idx[nrelocs] = i;
4199 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4200 }
4201 size += 4;
4202 break;
4203
4204 case DATA_TYPE:
d3ce72d0 4205 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4206 stub_reloc_idx[nrelocs] = i;
4207 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4208 size += 4;
4209 break;
4210
4211 default:
4212 BFD_FAIL ();
4213 return FALSE;
4214 }
906e58ca 4215 }
461a49ca 4216
906e58ca
NC		 4217 stub_sec->size += size;
4218
461a49ca
DJ		 4219 /* Stub size has already been computed in arm_size_one_stub. Check
4220 consistency. */
4221 BFD_ASSERT (size == stub_entry->stub_size);
4222
906e58ca 4223 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4224 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4225 sym_value |= 1;
4226
48229727
JB		 4227 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4228 in each stub. */
4229 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4230
48229727 4231 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4232 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4233 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4234 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4235 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4236 {
4237 Elf_Internal_Rela rel;
4238 bfd_boolean unresolved_reloc;
4239 char *error_message;
35fc36a8
RS		 4240 enum arm_st_branch_type branch_type
4241 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4242 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4243 bfd_vma points_to = sym_value + stub_entry->target_addend;
4244
4245 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0 4246 rel.r_info = ELF32_R_INFO (0,
99059e56 4247 template_sequence[stub_reloc_idx[i]].r_type);
d3ce72d0 4248 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4249
4250 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4251 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4252 template should refer back to the instruction after the original
4253 branch. */
4254 points_to = sym_value;
4255
33c6a8fc
JB		 4256 /* There may be unintended consequences if this is not true. */
4257 BFD_ASSERT (stub_entry->h == NULL);
4258
48229727
JB		 4259 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4260 properly. We should probably use this function unconditionally,
4261 rather than only for certain relocations listed in the enclosing
4262 conditional, for the sake of consistency. */
4263 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4264 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4265 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4266 points_to, info, stub_entry->target_section, "", STT_FUNC,
4267 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4268 &unresolved_reloc, &error_message);
48229727
JB		 4269 }
4270 else
4271 {
fe33d2fa
CL		 4272 Elf_Internal_Rela rel;
4273 bfd_boolean unresolved_reloc;
4274 char *error_message;
4275 bfd_vma points_to = sym_value + stub_entry->target_addend
4276 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4277
4278 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4279 rel.r_info = ELF32_R_INFO (0,
99059e56 4280 template_sequence[stub_reloc_idx[i]].r_type);
fe33d2fa
CL		 4281 rel.r_addend = 0;
4282
4283 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4284 (template_sequence[stub_reloc_idx[i]].r_type),
4285 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4286 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4287 stub_entry->branch_type,
fe33d2fa
CL		 4288 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4289 &error_message);
48229727 4290 }
906e58ca
NC		 4291
4292 return TRUE;
48229727 4293#undef MAXRELOCS
906e58ca
NC		 4294}
4295
48229727
JB		 4296/* Calculate the template, template size and instruction size for a stub.
4297 Return value is the instruction size. */
906e58ca 4298
48229727
JB		 4299static unsigned int
4300find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4301 const insn_sequence **stub_template,
4302 int *stub_template_size)
906e58ca 4303{
d3ce72d0 4304 const insn_sequence *template_sequence = NULL;
48229727
JB		 4305 int template_size = 0, i;
4306 unsigned int size;
906e58ca 4307
d3ce72d0 4308 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4309 if (stub_template)
4310 *stub_template = template_sequence;
4311
48229727 4312 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4313 if (stub_template_size)
4314 *stub_template_size = template_size;
906e58ca
NC		 4315
4316 size = 0;
461a49ca
DJ		 4317 for (i = 0; i < template_size; i++)
4318 {
d3ce72d0 4319 switch (template_sequence[i].type)
461a49ca
DJ		 4320 {
4321 case THUMB16_TYPE:
4322 size += 2;
4323 break;
4324
4325 case ARM_TYPE:
48229727 4326 case THUMB32_TYPE:
461a49ca
DJ		 4327 case DATA_TYPE:
4328 size += 4;
4329 break;
4330
4331 default:
4332 BFD_FAIL ();
2a229407 4333 return 0;
461a49ca
DJ		 4334 }
4335 }
4336
48229727
JB		 4337 return size;
4338}
4339
4340/* As above, but don't actually build the stub. Just bump offset so
4341 we know stub section sizes. */
4342
4343static bfd_boolean
4344arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4345 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4346{
4347 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4348 const insn_sequence *template_sequence;
48229727
JB		 4349 int template_size, size;
4350
4351 /* Massage our args to the form they really have. */
4352 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4353
4354 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4355 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4356
d3ce72d0 4357 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4358 &template_size);
4359
461a49ca 4360 stub_entry->stub_size = size;
d3ce72d0 4361 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4362 stub_entry->stub_template_size = template_size;
4363
906e58ca
NC		 4364 size = (size + 7) & ~7;
4365 stub_entry->stub_sec->size += size;
461a49ca 4366
906e58ca
NC		 4367 return TRUE;
4368}
4369
4370/* External entry points for sizing and building linker stubs. */
4371
4372/* Set up various things so that we can make a list of input sections
4373 for each output section included in the link. Returns -1 on error,
4374 0 when no stubs will be needed, and 1 on success. */
4375
4376int
4377elf32_arm_setup_section_lists (bfd *output_bfd,
4378 struct bfd_link_info *info)
4379{
4380 bfd *input_bfd;
4381 unsigned int bfd_count;
4382 int top_id, top_index;
4383 asection *section;
4384 asection **input_list, **list;
4385 bfd_size_type amt;
4386 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4387
4dfe6ac6
NC		 4388 if (htab == NULL)
4389 return 0;
906e58ca
NC		 4390 if (! is_elf_hash_table (htab))
4391 return 0;
4392
4393 /* Count the number of input BFDs and find the top input section id. */
4394 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4395 input_bfd != NULL;
4396 input_bfd = input_bfd->link_next)
4397 {
4398 bfd_count += 1;
4399 for (section = input_bfd->sections;
4400 section != NULL;
4401 section = section->next)
4402 {
4403 if (top_id < section->id)
4404 top_id = section->id;
4405 }
4406 }
4407 htab->bfd_count = bfd_count;
4408
4409 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4410 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4411 if (htab->stub_group == NULL)
4412 return -1;
fe33d2fa 4413 htab->top_id = top_id;
906e58ca
NC		 4414
4415 /* We can't use output_bfd->section_count here to find the top output
4416 section index as some sections may have been removed, and
4417 _bfd_strip_section_from_output doesn't renumber the indices. */
4418 for (section = output_bfd->sections, top_index = 0;
4419 section != NULL;
4420 section = section->next)
4421 {
4422 if (top_index < section->index)
4423 top_index = section->index;
4424 }
4425
4426 htab->top_index = top_index;
4427 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4428 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4429 htab->input_list = input_list;
4430 if (input_list == NULL)
4431 return -1;
4432
4433 /* For sections we aren't interested in, mark their entries with a
4434 value we can check later. */
4435 list = input_list + top_index;
4436 do
4437 *list = bfd_abs_section_ptr;
4438 while (list-- != input_list);
4439
4440 for (section = output_bfd->sections;
4441 section != NULL;
4442 section = section->next)
4443 {
4444 if ((section->flags & SEC_CODE) != 0)
4445 input_list[section->index] = NULL;
4446 }
4447
4448 return 1;
4449}
4450
4451/* The linker repeatedly calls this function for each input section,
4452 in the order that input sections are linked into output sections.
4453 Build lists of input sections to determine groupings between which
4454 we may insert linker stubs. */
4455
4456void
4457elf32_arm_next_input_section (struct bfd_link_info *info,
4458 asection *isec)
4459{
4460 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4461
4dfe6ac6
NC		 4462 if (htab == NULL)
4463 return;
4464
906e58ca
NC		 4465 if (isec->output_section->index <= htab->top_index)
4466 {
4467 asection **list = htab->input_list + isec->output_section->index;
4468
a7470592 4469 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4470 {
4471 /* Steal the link_sec pointer for our list. */
4472#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4473 /* This happens to make the list in reverse order,
07d72278 4474 which we reverse later. */
906e58ca
NC		 4475 PREV_SEC (isec) = *list;
4476 *list = isec;
4477 }
4478 }
4479}
4480
4481/* See whether we can group stub sections together. Grouping stub
4482 sections may result in fewer stubs. More importantly, we need to
07d72278 4483 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4484 .fini output sections respectively, because glibc splits the
4485 _init and _fini functions into multiple parts. Putting a stub in
4486 the middle of a function is not a good idea. */
4487
4488static void
4489group_sections (struct elf32_arm_link_hash_table *htab,
4490 bfd_size_type stub_group_size,
07d72278 4491 bfd_boolean stubs_always_after_branch)
906e58ca 4492{
07d72278 4493 asection **list = htab->input_list;
906e58ca
NC		 4494
4495 do
4496 {
4497 asection *tail = *list;
07d72278 4498 asection *head;
906e58ca
NC		 4499
4500 if (tail == bfd_abs_section_ptr)
4501 continue;
4502
07d72278
DJ		 4503 /* Reverse the list: we must avoid placing stubs at the
4504 beginning of the section because the beginning of the text
4505 section may be required for an interrupt vector in bare metal
4506 code. */
4507#define NEXT_SEC PREV_SEC
e780aef2
CL		 4508 head = NULL;
4509 while (tail != NULL)
99059e56
RM		 4510 {
4511 /* Pop from tail. */
4512 asection *item = tail;
4513 tail = PREV_SEC (item);
e780aef2 4514
99059e56
RM		 4515 /* Push on head. */
4516 NEXT_SEC (item) = head;
4517 head = item;
4518 }
07d72278
DJ		 4519
4520 while (head != NULL)
906e58ca
NC		 4521 {
4522 asection *curr;
07d72278 4523 asection *next;
e780aef2
CL		 4524 bfd_vma stub_group_start = head->output_offset;
4525 bfd_vma end_of_next;
906e58ca 4526
07d72278 4527 curr = head;
e780aef2 4528 while (NEXT_SEC (curr) != NULL)
8cd931b7 4529 {
e780aef2
CL		 4530 next = NEXT_SEC (curr);
4531 end_of_next = next->output_offset + next->size;
4532 if (end_of_next - stub_group_start >= stub_group_size)
4533 /* End of NEXT is too far from start, so stop. */
8cd931b7 4534 break;
e780aef2
CL		 4535 /* Add NEXT to the group. */
4536 curr = next;
8cd931b7 4537 }
906e58ca 4538
07d72278 4539 /* OK, the size from the start to the start of CURR is less
906e58ca 4540 than stub_group_size and thus can be handled by one stub
07d72278 4541 section. (Or the head section is itself larger than
906e58ca
NC		 4542 stub_group_size, in which case we may be toast.)
4543 We should really be keeping track of the total size of
4544 stubs added here, as stubs contribute to the final output
7fb9f789 4545 section size. */
906e58ca
NC		 4546 do
4547 {
07d72278 4548 next = NEXT_SEC (head);
906e58ca 4549 /* Set up this stub group. */
07d72278 4550 htab->stub_group[head->id].link_sec = curr;
906e58ca 4551 }
07d72278 4552 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4553
4554 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4555 bytes after the stub section can be handled by it too. */
4556 if (!stubs_always_after_branch)
906e58ca 4557 {
e780aef2
CL		 4558 stub_group_start = curr->output_offset + curr->size;
4559
8cd931b7 4560 while (next != NULL)
906e58ca 4561 {
e780aef2
CL		 4562 end_of_next = next->output_offset + next->size;
4563 if (end_of_next - stub_group_start >= stub_group_size)
4564 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4565 break;
e780aef2 4566 /* Add NEXT to the stub group. */
07d72278
DJ		 4567 head = next;
4568 next = NEXT_SEC (head);
4569 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4570 }
4571 }
07d72278 4572 head = next;
906e58ca
NC		 4573 }
4574 }
07d72278 4575 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4576
4577 free (htab->input_list);
4578#undef PREV_SEC
07d72278 4579#undef NEXT_SEC
906e58ca
NC		 4580}
4581
48229727
JB		 4582/* Comparison function for sorting/searching relocations relating to Cortex-A8
4583 erratum fix. */
4584
4585static int
4586a8_reloc_compare (const void *a, const void *b)
4587{
21d799b5
NC		 4588 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4589 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4590
4591 if (ra->from < rb->from)
4592 return -1;
4593 else if (ra->from > rb->from)
4594 return 1;
4595 else
4596 return 0;
4597}
4598
4599static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4600 const char *, char **);
4601
4602/* Helper function to scan code for sequences which might trigger the Cortex-A8
4603 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4604 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4605 otherwise. */
4606
81694485
NC		 4607static bfd_boolean
4608cortex_a8_erratum_scan (bfd *input_bfd,
4609 struct bfd_link_info *info,
48229727
JB		 4610 struct a8_erratum_fix **a8_fixes_p,
4611 unsigned int *num_a8_fixes_p,
4612 unsigned int *a8_fix_table_size_p,
4613 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4614 unsigned int num_a8_relocs,
4615 unsigned prev_num_a8_fixes,
4616 bfd_boolean *stub_changed_p)
48229727
JB		 4617{
4618 asection *section;
4619 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4620 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4621 unsigned int num_a8_fixes = *num_a8_fixes_p;
4622 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4623
4dfe6ac6
NC		 4624 if (htab == NULL)
4625 return FALSE;
4626
48229727
JB		 4627 for (section = input_bfd->sections;
4628 section != NULL;
4629 section = section->next)
4630 {
4631 bfd_byte *contents = NULL;
4632 struct _arm_elf_section_data *sec_data;
4633 unsigned int span;
4634 bfd_vma base_vma;
4635
4636 if (elf_section_type (section) != SHT_PROGBITS
99059e56
RM		 4637 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4638 || (section->flags & SEC_EXCLUDE) != 0
4639 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4640 || (section->output_section == bfd_abs_section_ptr))
4641 continue;
48229727
JB		 4642
4643 base_vma = section->output_section->vma + section->output_offset;
4644
4645 if (elf_section_data (section)->this_hdr.contents != NULL)
99059e56 4646 contents = elf_section_data (section)->this_hdr.contents;
48229727 4647 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
99059e56 4648 return TRUE;
48229727
JB		 4649
4650 sec_data = elf32_arm_section_data (section);
4651
4652 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 4653 {
4654 unsigned int span_start = sec_data->map[span].vma;
4655 unsigned int span_end = (span == sec_data->mapcount - 1)
4656 ? section->size : sec_data->map[span + 1].vma;
4657 unsigned int i;
4658 char span_type = sec_data->map[span].type;
4659 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4660
4661 if (span_type != 't')
4662 continue;
4663
4664 /* Span is entirely within a single 4KB region: skip scanning. */
4665 if (((base_vma + span_start) & ~0xfff)
48229727 4666 == ((base_vma + span_end) & ~0xfff))
99059e56
RM		 4667 continue;
4668
4669 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4670
4671 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4672 * The branch target is in the same 4KB region as the
4673 first half of the branch.
4674 * The instruction before the branch is a 32-bit
4675 length non-branch instruction. */
4676 for (i = span_start; i < span_end;)
4677 {
4678 unsigned int insn = bfd_getl16 (&contents[i]);
4679 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
48229727
JB		 4680 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4681
99059e56
RM		 4682 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4683 insn_32bit = TRUE;
48229727
JB		 4684
4685 if (insn_32bit)
99059e56
RM		 4686 {
4687 /* Load the rest of the insn (in manual-friendly order). */
4688 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4689
4690 /* Encoding T4: B<c>.W. */
4691 is_b = (insn & 0xf800d000) == 0xf0009000;
4692 /* Encoding T1: BL<c>.W. */
4693 is_bl = (insn & 0xf800d000) == 0xf000d000;
4694 /* Encoding T2: BLX<c>.W. */
4695 is_blx = (insn & 0xf800d000) == 0xf000c000;
48229727
JB		 4696 /* Encoding T3: B<c>.W (not permitted in IT block). */
4697 is_bcc = (insn & 0xf800d000) == 0xf0008000
4698 && (insn & 0x07f00000) != 0x03800000;
4699 }
4700
4701 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4702
99059e56 4703 if (((base_vma + i) & 0xfff) == 0xffe
81694485
NC		 4704 && insn_32bit
4705 && is_32bit_branch
4706 && last_was_32bit
4707 && ! last_was_branch)
99059e56
RM		 4708 {
4709 bfd_signed_vma offset = 0;
4710 bfd_boolean force_target_arm = FALSE;
48229727 4711 bfd_boolean force_target_thumb = FALSE;
99059e56
RM		 4712 bfd_vma target;
4713 enum elf32_arm_stub_type stub_type = arm_stub_none;
4714 struct a8_erratum_reloc key, *found;
4715 bfd_boolean use_plt = FALSE;
48229727 4716
99059e56
RM		 4717 key.from = base_vma + i;
4718 found = (struct a8_erratum_reloc *)
4719 bsearch (&key, a8_relocs, num_a8_relocs,
4720 sizeof (struct a8_erratum_reloc),
4721 &a8_reloc_compare);
48229727
JB		 4722
4723 if (found)
4724 {
4725 char *error_message = NULL;
4726 struct elf_link_hash_entry *entry;
4727
4728 /* We don't care about the error returned from this
99059e56 4729 function, only if there is glue or not. */
48229727
JB		 4730 entry = find_thumb_glue (info, found->sym_name,
4731 &error_message);
4732
4733 if (entry)
4734 found->non_a8_stub = TRUE;
4735
92750f34 4736 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4737 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4738 && found->hash->root.plt.offset != (bfd_vma) -1)
4739 use_plt = TRUE;
4740
4741 if (found->r_type == R_ARM_THM_CALL)
4742 {
35fc36a8
RS		 4743 if (found->branch_type == ST_BRANCH_TO_ARM
4744 || use_plt)
92750f34
DJ		 4745 force_target_arm = TRUE;
4746 else
4747 force_target_thumb = TRUE;
4748 }
48229727
JB		 4749 }
4750
99059e56 4751 /* Check if we have an offending branch instruction. */
48229727
JB		 4752
4753 if (found && found->non_a8_stub)
4754 /* We've already made a stub for this instruction, e.g.
4755 it's a long branch or a Thumb->ARM stub. Assume that
4756 stub will suffice to work around the A8 erratum (see
4757 setting of always_after_branch above). */
4758 ;
99059e56
RM		 4759 else if (is_bcc)
4760 {
4761 offset = (insn & 0x7ff) << 1;
4762 offset |= (insn & 0x3f0000) >> 4;
4763 offset |= (insn & 0x2000) ? 0x40000 : 0;
4764 offset |= (insn & 0x800) ? 0x80000 : 0;
4765 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4766 if (offset & 0x100000)
4767 offset |= ~ ((bfd_signed_vma) 0xfffff);
4768 stub_type = arm_stub_a8_veneer_b_cond;
4769 }
4770 else if (is_b || is_bl || is_blx)
4771 {
4772 int s = (insn & 0x4000000) != 0;
4773 int j1 = (insn & 0x2000) != 0;
4774 int j2 = (insn & 0x800) != 0;
4775 int i1 = !(j1 ^ s);
4776 int i2 = !(j2 ^ s);
4777
4778 offset = (insn & 0x7ff) << 1;
4779 offset |= (insn & 0x3ff0000) >> 4;
4780 offset |= i2 << 22;
4781 offset |= i1 << 23;
4782 offset |= s << 24;
4783 if (offset & 0x1000000)
4784 offset |= ~ ((bfd_signed_vma) 0xffffff);
4785
4786 if (is_blx)
4787 offset &= ~ ((bfd_signed_vma) 3);
4788
4789 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4790 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4791 }
4792
4793 if (stub_type != arm_stub_none)
4794 {
4795 bfd_vma pc_for_insn = base_vma + i + 4;
48229727
JB		 4796
4797 /* The original instruction is a BL, but the target is
99059e56 4798 an ARM instruction. If we were not making a stub,
48229727
JB		 4799 the BL would have been converted to a BLX. Use the
4800 BLX stub instead in that case. */
4801 if (htab->use_blx && force_target_arm
4802 && stub_type == arm_stub_a8_veneer_bl)
4803 {
4804 stub_type = arm_stub_a8_veneer_blx;
4805 is_blx = TRUE;
4806 is_bl = FALSE;
4807 }
4808 /* Conversely, if the original instruction was
4809 BLX but the target is Thumb mode, use the BL
4810 stub. */
4811 else if (force_target_thumb
4812 && stub_type == arm_stub_a8_veneer_blx)
4813 {
4814 stub_type = arm_stub_a8_veneer_bl;
4815 is_blx = FALSE;
4816 is_bl = TRUE;
4817 }
4818
99059e56
RM		 4819 if (is_blx)
4820 pc_for_insn &= ~ ((bfd_vma) 3);
48229727 4821
99059e56
RM		 4822 /* If we found a relocation, use the proper destination,
4823 not the offset in the (unrelocated) instruction.
48229727
JB		 4824 Note this is always done if we switched the stub type
4825 above. */
99059e56
RM		 4826 if (found)
4827 offset =
81694485 4828 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4829
99059e56
RM		 4830 /* If the stub will use a Thumb-mode branch to a
4831 PLT target, redirect it to the preceding Thumb
4832 entry point. */
4833 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4834 offset -= PLT_THUMB_STUB_SIZE;
7d24e6a6 4835
99059e56 4836 target = pc_for_insn + offset;
48229727 4837
99059e56
RM		 4838 /* The BLX stub is ARM-mode code. Adjust the offset to
4839 take the different PC value (+8 instead of +4) into
48229727 4840 account. */
99059e56
RM		 4841 if (stub_type == arm_stub_a8_veneer_blx)
4842 offset += 4;
4843
4844 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4845 {
4846 char *stub_name = NULL;
4847
4848 if (num_a8_fixes == a8_fix_table_size)
4849 {
4850 a8_fix_table_size *= 2;
4851 a8_fixes = (struct a8_erratum_fix *)
4852 bfd_realloc (a8_fixes,
4853 sizeof (struct a8_erratum_fix)
4854 * a8_fix_table_size);
4855 }
48229727 4856
eb7c4339
NS		 4857 if (num_a8_fixes < prev_num_a8_fixes)
4858 {
4859 /* If we're doing a subsequent scan,
4860 check if we've found the same fix as
4861 before, and try and reuse the stub
4862 name. */
4863 stub_name = a8_fixes[num_a8_fixes].stub_name;
4864 if ((a8_fixes[num_a8_fixes].section != section)
4865 || (a8_fixes[num_a8_fixes].offset != i))
4866 {
4867 free (stub_name);
4868 stub_name = NULL;
4869 *stub_changed_p = TRUE;
4870 }
4871 }
4872
4873 if (!stub_name)
4874 {
21d799b5 4875 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4876 if (stub_name != NULL)
4877 sprintf (stub_name, "%x:%x", section->id, i);
4878 }
48229727 4879
99059e56
RM		 4880 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4881 a8_fixes[num_a8_fixes].section = section;
4882 a8_fixes[num_a8_fixes].offset = i;
4883 a8_fixes[num_a8_fixes].addend = offset;
4884 a8_fixes[num_a8_fixes].orig_insn = insn;
4885 a8_fixes[num_a8_fixes].stub_name = stub_name;
4886 a8_fixes[num_a8_fixes].stub_type = stub_type;
4887 a8_fixes[num_a8_fixes].branch_type =
35fc36a8 4888 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727 4889
99059e56
RM		 4890 num_a8_fixes++;
4891 }
4892 }
4893 }
48229727 4894
99059e56
RM		 4895 i += insn_32bit ? 4 : 2;
4896 last_was_32bit = insn_32bit;
48229727 4897 last_was_branch = is_32bit_branch;
99059e56
RM		 4898 }
4899 }
48229727
JB		 4900
4901 if (elf_section_data (section)->this_hdr.contents == NULL)
99059e56 4902 free (contents);
48229727 4903 }
fe33d2fa 4904
48229727
JB		 4905 *a8_fixes_p = a8_fixes;
4906 *num_a8_fixes_p = num_a8_fixes;
4907 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4908
81694485 4909 return FALSE;
48229727
JB		 4910}
4911
906e58ca
NC		 4912/* Determine and set the size of the stub section for a final link.
4913
4914 The basic idea here is to examine all the relocations looking for
4915 PC-relative calls to a target that is unreachable with a "bl"
4916 instruction. */
4917
4918bfd_boolean
4919elf32_arm_size_stubs (bfd *output_bfd,
4920 bfd *stub_bfd,
4921 struct bfd_link_info *info,
4922 bfd_signed_vma group_size,
7a89b94e
NC		 4923 asection * (*add_stub_section) (const char *, asection *,
4924 unsigned int),
906e58ca
NC		 4925 void (*layout_sections_again) (void))
4926{
4927 bfd_size_type stub_group_size;
07d72278 4928 bfd_boolean stubs_always_after_branch;
906e58ca 4929 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4930 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4931 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4932 struct a8_erratum_reloc *a8_relocs = NULL;
4933 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4934
4dfe6ac6
NC		 4935 if (htab == NULL)
4936 return FALSE;
4937
48229727
JB		 4938 if (htab->fix_cortex_a8)
4939 {
21d799b5 4940 a8_fixes = (struct a8_erratum_fix *)
99059e56 4941 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
21d799b5 4942 a8_relocs = (struct a8_erratum_reloc *)
99059e56 4943 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4944 }
906e58ca
NC		 4945
4946 /* Propagate mach to stub bfd, because it may not have been
4947 finalized when we created stub_bfd. */
4948 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4949 bfd_get_mach (output_bfd));
4950
4951 /* Stash our params away. */
4952 htab->stub_bfd = stub_bfd;
4953 htab->add_stub_section = add_stub_section;
4954 htab->layout_sections_again = layout_sections_again;
07d72278 4955 stubs_always_after_branch = group_size < 0;
48229727
JB		 4956
4957 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4958 as the first half of a 32-bit branch straddling two 4K pages. This is a
4959 crude way of enforcing that. */
4960 if (htab->fix_cortex_a8)
4961 stubs_always_after_branch = 1;
4962
906e58ca
NC		 4963 if (group_size < 0)
4964 stub_group_size = -group_size;
4965 else
4966 stub_group_size = group_size;
4967
4968 if (stub_group_size == 1)
4969 {
4970 /* Default values. */
4971 /* Thumb branch range is +-4MB has to be used as the default
4972 maximum size (a given section can contain both ARM and Thumb
4973 code, so the worst case has to be taken into account).
4974
4975 This value is 24K less than that, which allows for 2025
4976 12-byte stubs. If we exceed that, then we will fail to link.
4977 The user will have to relink with an explicit group size
4978 option. */
4979 stub_group_size = 4170000;
4980 }
4981
07d72278 4982 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4983
3ae046cc
NS		 4984 /* If we're applying the cortex A8 fix, we need to determine the
4985 program header size now, because we cannot change it later --
4986 that could alter section placements. Notice the A8 erratum fix
4987 ends up requiring the section addresses to remain unchanged
4988 modulo the page size. That's something we cannot represent
4989 inside BFD, and we don't want to force the section alignment to
4990 be the page size. */
4991 if (htab->fix_cortex_a8)
4992 (*htab->layout_sections_again) ();
4993
906e58ca
NC		 4994 while (1)
4995 {
4996 bfd *input_bfd;
4997 unsigned int bfd_indx;
4998 asection *stub_sec;
eb7c4339
NS		 4999 bfd_boolean stub_changed = FALSE;
5000 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 5001
48229727 5002 num_a8_fixes = 0;
906e58ca
NC		 5003 for (input_bfd = info->input_bfds, bfd_indx = 0;
5004 input_bfd != NULL;
5005 input_bfd = input_bfd->link_next, bfd_indx++)
5006 {
5007 Elf_Internal_Shdr *symtab_hdr;
5008 asection *section;
5009 Elf_Internal_Sym *local_syms = NULL;
5010
99059e56
RM		 5011 if (!is_arm_elf (input_bfd))
5012 continue;
adbcc655 5013
48229727
JB		 5014 num_a8_relocs = 0;
5015
906e58ca
NC		 5016 /* We'll need the symbol table in a second. */
5017 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5018 if (symtab_hdr->sh_info == 0)
5019 continue;
5020
5021 /* Walk over each section attached to the input bfd. */
5022 for (section = input_bfd->sections;
5023 section != NULL;
5024 section = section->next)
5025 {
5026 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5027
5028 /* If there aren't any relocs, then there's nothing more
5029 to do. */
5030 if ((section->flags & SEC_RELOC) == 0
5031 || section->reloc_count == 0
5032 || (section->flags & SEC_CODE) == 0)
5033 continue;
5034
5035 /* If this section is a link-once section that will be
5036 discarded, then don't create any stubs. */
5037 if (section->output_section == NULL
5038 || section->output_section->owner != output_bfd)
5039 continue;
5040
5041 /* Get the relocs. */
5042 internal_relocs
5043 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5044 NULL, info->keep_memory);
5045 if (internal_relocs == NULL)
5046 goto error_ret_free_local;
5047
5048 /* Now examine each relocation. */
5049 irela = internal_relocs;
5050 irelaend = irela + section->reloc_count;
5051 for (; irela < irelaend; irela++)
5052 {
5053 unsigned int r_type, r_indx;
5054 enum elf32_arm_stub_type stub_type;
5055 struct elf32_arm_stub_hash_entry *stub_entry;
5056 asection *sym_sec;
5057 bfd_vma sym_value;
5058 bfd_vma destination;
5059 struct elf32_arm_link_hash_entry *hash;
7413f23f 5060 const char *sym_name;
906e58ca
NC		 5061 char *stub_name;
5062 const asection *id_sec;
34e77a92 5063 unsigned char st_type;
35fc36a8 5064 enum arm_st_branch_type branch_type;
48229727 5065 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5066
5067 r_type = ELF32_R_TYPE (irela->r_info);
5068 r_indx = ELF32_R_SYM (irela->r_info);
5069
5070 if (r_type >= (unsigned int) R_ARM_max)
5071 {
5072 bfd_set_error (bfd_error_bad_value);
5073 error_ret_free_internal:
5074 if (elf_section_data (section)->relocs == NULL)
5075 free (internal_relocs);
5076 goto error_ret_free_local;
5077 }
b38cadfb 5078
0855e32b
NS		 5079 hash = NULL;
5080 if (r_indx >= symtab_hdr->sh_info)
5081 hash = elf32_arm_hash_entry
5082 (elf_sym_hashes (input_bfd)
5083 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5084
0855e32b
NS		 5085 /* Only look for stubs on branch instructions, or
5086 non-relaxed TLSCALL */
906e58ca 5087 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5088 && (r_type != (unsigned int) R_ARM_THM_CALL)
5089 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5090 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5091 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5092 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5093 && (r_type != (unsigned int) R_ARM_PLT32)
5094 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5095 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5096 && r_type == elf32_arm_tls_transition
5097 (info, r_type, &hash->root)
5098 && ((hash ? hash->tls_type
5099 : (elf32_arm_local_got_tls_type
5100 (input_bfd)[r_indx]))
5101 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5102 continue;
5103
5104 /* Now determine the call target, its name, value,
5105 section. */
5106 sym_sec = NULL;
5107 sym_value = 0;
5108 destination = 0;
7413f23f 5109 sym_name = NULL;
b38cadfb 5110
0855e32b
NS		 5111 if (r_type == (unsigned int) R_ARM_TLS_CALL
5112 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5113 {
5114 /* A non-relaxed TLS call. The target is the
5115 plt-resident trampoline and nothing to do
5116 with the symbol. */
5117 BFD_ASSERT (htab->tls_trampoline > 0);
5118 sym_sec = htab->root.splt;
5119 sym_value = htab->tls_trampoline;
5120 hash = 0;
34e77a92 5121 st_type = STT_FUNC;
35fc36a8 5122 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5123 }
5124 else if (!hash)
906e58ca
NC		 5125 {
5126 /* It's a local symbol. */
5127 Elf_Internal_Sym *sym;
906e58ca
NC		 5128
5129 if (local_syms == NULL)
5130 {
5131 local_syms
5132 = (Elf_Internal_Sym *) symtab_hdr->contents;
5133 if (local_syms == NULL)
5134 local_syms
5135 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5136 symtab_hdr->sh_info, 0,
5137 NULL, NULL, NULL);
5138 if (local_syms == NULL)
5139 goto error_ret_free_internal;
5140 }
5141
5142 sym = local_syms + r_indx;
f6d250ce
TS		 5143 if (sym->st_shndx == SHN_UNDEF)
5144 sym_sec = bfd_und_section_ptr;
5145 else if (sym->st_shndx == SHN_ABS)
5146 sym_sec = bfd_abs_section_ptr;
5147 else if (sym->st_shndx == SHN_COMMON)
5148 sym_sec = bfd_com_section_ptr;
5149 else
5150 sym_sec =
5151 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5152
ffcb4889
NS		 5153 if (!sym_sec)
5154 /* This is an undefined symbol. It can never
5155 be resolved. */
5156 continue;
fe33d2fa 5157
906e58ca
NC		 5158 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5159 sym_value = sym->st_value;
5160 destination = (sym_value + irela->r_addend
5161 + sym_sec->output_offset
5162 + sym_sec->output_section->vma);
34e77a92 5163 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5164 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5165 sym_name
5166 = bfd_elf_string_from_elf_section (input_bfd,
5167 symtab_hdr->sh_link,
5168 sym->st_name);
906e58ca
NC		 5169 }
5170 else
5171 {
5172 /* It's an external symbol. */
906e58ca
NC		 5173 while (hash->root.root.type == bfd_link_hash_indirect
5174 || hash->root.root.type == bfd_link_hash_warning)
5175 hash = ((struct elf32_arm_link_hash_entry *)
5176 hash->root.root.u.i.link);
5177
5178 if (hash->root.root.type == bfd_link_hash_defined
5179 || hash->root.root.type == bfd_link_hash_defweak)
5180 {
5181 sym_sec = hash->root.root.u.def.section;
5182 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5183
5184 struct elf32_arm_link_hash_table *globals =
5185 elf32_arm_hash_table (info);
5186
5187 /* For a destination in a shared library,
5188 use the PLT stub as target address to
5189 decide whether a branch stub is
5190 needed. */
4dfe6ac6 5191 if (globals != NULL
362d30a1 5192 && globals->root.splt != NULL
4dfe6ac6 5193 && hash != NULL
022f8312
CL		 5194 && hash->root.plt.offset != (bfd_vma) -1)
5195 {
362d30a1 5196 sym_sec = globals->root.splt;
022f8312
CL		 5197 sym_value = hash->root.plt.offset;
5198 if (sym_sec->output_section != NULL)
5199 destination = (sym_value
5200 + sym_sec->output_offset
5201 + sym_sec->output_section->vma);
5202 }
5203 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5204 destination = (sym_value + irela->r_addend
5205 + sym_sec->output_offset
5206 + sym_sec->output_section->vma);
5207 }
69c5861e
CL		 5208 else if ((hash->root.root.type == bfd_link_hash_undefined)
5209 || (hash->root.root.type == bfd_link_hash_undefweak))
5210 {
5211 /* For a shared library, use the PLT stub as
5212 target address to decide whether a long
5213 branch stub is needed.
5214 For absolute code, they cannot be handled. */
5215 struct elf32_arm_link_hash_table *globals =
5216 elf32_arm_hash_table (info);
5217
4dfe6ac6 5218 if (globals != NULL
362d30a1 5219 && globals->root.splt != NULL
4dfe6ac6 5220 && hash != NULL
69c5861e
CL		 5221 && hash->root.plt.offset != (bfd_vma) -1)
5222 {
362d30a1 5223 sym_sec = globals->root.splt;
69c5861e
CL		 5224 sym_value = hash->root.plt.offset;
5225 if (sym_sec->output_section != NULL)
5226 destination = (sym_value
5227 + sym_sec->output_offset
5228 + sym_sec->output_section->vma);
5229 }
5230 else
5231 continue;
5232 }
906e58ca
NC		 5233 else
5234 {
5235 bfd_set_error (bfd_error_bad_value);
5236 goto error_ret_free_internal;
5237 }
34e77a92 5238 st_type = hash->root.type;
35fc36a8 5239 branch_type = hash->root.target_internal;
7413f23f 5240 sym_name = hash->root.root.root.string;
906e58ca
NC		 5241 }
5242
48229727 5243 do
7413f23f 5244 {
48229727
JB		 5245 /* Determine what (if any) linker stub is needed. */
5246 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5247 st_type, &branch_type,
5248 hash, destination, sym_sec,
48229727
JB		 5249 input_bfd, sym_name);
5250 if (stub_type == arm_stub_none)
5251 break;
5252
5253 /* Support for grouping stub sections. */
5254 id_sec = htab->stub_group[section->id].link_sec;
5255
5256 /* Get the name of this stub. */
5257 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5258 irela, stub_type);
48229727
JB		 5259 if (!stub_name)
5260 goto error_ret_free_internal;
5261
5262 /* We've either created a stub for this reloc already,
5263 or we are about to. */
5264 created_stub = TRUE;
5265
5266 stub_entry = arm_stub_hash_lookup
5267 (&htab->stub_hash_table, stub_name,
5268 FALSE, FALSE);
5269 if (stub_entry != NULL)
5270 {
5271 /* The proper stub has already been created. */
5272 free (stub_name);
eb7c4339 5273 stub_entry->target_value = sym_value;
48229727
JB		 5274 break;
5275 }
7413f23f 5276
48229727
JB		 5277 stub_entry = elf32_arm_add_stub (stub_name, section,
5278 htab);
5279 if (stub_entry == NULL)
5280 {
5281 free (stub_name);
5282 goto error_ret_free_internal;
5283 }
7413f23f 5284
99059e56
RM		 5285 stub_entry->target_value = sym_value;
5286 stub_entry->target_section = sym_sec;
5287 stub_entry->stub_type = stub_type;
5288 stub_entry->h = hash;
5289 stub_entry->branch_type = branch_type;
5290
5291 if (sym_name == NULL)
5292 sym_name = "unnamed";
5293 stub_entry->output_name = (char *)
5294 bfd_alloc (htab->stub_bfd,
5295 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5296 + strlen (sym_name));
5297 if (stub_entry->output_name == NULL)
5298 {
5299 free (stub_name);
5300 goto error_ret_free_internal;
5301 }
5302
5303 /* For historical reasons, use the existing names for
5304 ARM-to-Thumb and Thumb-to-ARM stubs. */
5305 if ((r_type == (unsigned int) R_ARM_THM_CALL
35fc36a8
RS		 5306 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5307 && branch_type == ST_BRANCH_TO_ARM)
99059e56
RM		 5308 sprintf (stub_entry->output_name,
5309 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5310 else if ((r_type == (unsigned int) R_ARM_CALL
35fc36a8
RS		 5311 || r_type == (unsigned int) R_ARM_JUMP24)
5312 && branch_type == ST_BRANCH_TO_THUMB)
99059e56
RM		 5313 sprintf (stub_entry->output_name,
5314 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5315 else
5316 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5317 sym_name);
5318
5319 stub_changed = TRUE;
5320 }
5321 while (0);
5322
5323 /* Look for relocations which might trigger Cortex-A8
5324 erratum. */
5325 if (htab->fix_cortex_a8
5326 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5327 || r_type == (unsigned int) R_ARM_THM_JUMP19
5328 || r_type == (unsigned int) R_ARM_THM_CALL
5329 || r_type == (unsigned int) R_ARM_THM_XPC22))
5330 {
5331 bfd_vma from = section->output_section->vma
5332 + section->output_offset
5333 + irela->r_offset;
5334
5335 if ((from & 0xfff) == 0xffe)
5336 {
5337 /* Found a candidate. Note we haven't checked the
5338 destination is within 4K here: if we do so (and
5339 don't create an entry in a8_relocs) we can't tell
5340 that a branch should have been relocated when
5341 scanning later. */
5342 if (num_a8_relocs == a8_reloc_table_size)
5343 {
5344 a8_reloc_table_size *= 2;
5345 a8_relocs = (struct a8_erratum_reloc *)
5346 bfd_realloc (a8_relocs,
5347 sizeof (struct a8_erratum_reloc)
5348 * a8_reloc_table_size);
5349 }
5350
5351 a8_relocs[num_a8_relocs].from = from;
5352 a8_relocs[num_a8_relocs].destination = destination;
5353 a8_relocs[num_a8_relocs].r_type = r_type;
5354 a8_relocs[num_a8_relocs].branch_type = branch_type;
5355 a8_relocs[num_a8_relocs].sym_name = sym_name;
5356 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5357 a8_relocs[num_a8_relocs].hash = hash;
5358
5359 num_a8_relocs++;
5360 }
5361 }
906e58ca
NC		 5362 }
5363
99059e56
RM		 5364 /* We're done with the internal relocs, free them. */
5365 if (elf_section_data (section)->relocs == NULL)
5366 free (internal_relocs);
5367 }
48229727 5368
99059e56 5369 if (htab->fix_cortex_a8)
48229727 5370 {
99059e56
RM		 5371 /* Sort relocs which might apply to Cortex-A8 erratum. */
5372 qsort (a8_relocs, num_a8_relocs,
eb7c4339 5373 sizeof (struct a8_erratum_reloc),
99059e56 5374 &a8_reloc_compare);
48229727 5375
99059e56
RM		 5376 /* Scan for branches which might trigger Cortex-A8 erratum. */
5377 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
48229727 5378 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5379 a8_relocs, num_a8_relocs,
5380 prev_num_a8_fixes, &stub_changed)
5381 != 0)
48229727 5382 goto error_ret_free_local;
5e681ec4 5383 }
5e681ec4
PB		 5384 }
5385
eb7c4339 5386 if (prev_num_a8_fixes != num_a8_fixes)
99059e56 5387 stub_changed = TRUE;
48229727 5388
906e58ca
NC		 5389 if (!stub_changed)
5390 break;
5e681ec4 5391
906e58ca
NC		 5392 /* OK, we've added some stubs. Find out the new size of the
5393 stub sections. */
5394 for (stub_sec = htab->stub_bfd->sections;
5395 stub_sec != NULL;
5396 stub_sec = stub_sec->next)
3e6b1042
DJ		 5397 {
5398 /* Ignore non-stub sections. */
5399 if (!strstr (stub_sec->name, STUB_SUFFIX))
5400 continue;
5401
5402 stub_sec->size = 0;
5403 }
b34b2d70 5404
906e58ca
NC		 5405 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5406
48229727
JB		 5407 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5408 if (htab->fix_cortex_a8)
99059e56
RM		 5409 for (i = 0; i < num_a8_fixes; i++)
5410 {
48229727
JB		 5411 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5412 a8_fixes[i].section, htab);
5413
5414 if (stub_sec == NULL)
5415 goto error_ret_free_local;
5416
99059e56
RM		 5417 stub_sec->size
5418 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5419 NULL);
5420 }
48229727
JB		 5421
5422
906e58ca
NC		 5423 /* Ask the linker to do its stuff. */
5424 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5425 }
5426
48229727
JB		 5427 /* Add stubs for Cortex-A8 erratum fixes now. */
5428 if (htab->fix_cortex_a8)
5429 {
5430 for (i = 0; i < num_a8_fixes; i++)
99059e56
RM		 5431 {
5432 struct elf32_arm_stub_hash_entry *stub_entry;
5433 char *stub_name = a8_fixes[i].stub_name;
5434 asection *section = a8_fixes[i].section;
5435 unsigned int section_id = a8_fixes[i].section->id;
5436 asection *link_sec = htab->stub_group[section_id].link_sec;
5437 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5438 const insn_sequence *template_sequence;
5439 int template_size, size = 0;
5440
5441 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5442 TRUE, FALSE);
5443 if (stub_entry == NULL)
5444 {
5445 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5446 section->owner,
5447 stub_name);
5448 return FALSE;
5449 }
5450
5451 stub_entry->stub_sec = stub_sec;
5452 stub_entry->stub_offset = 0;
5453 stub_entry->id_sec = link_sec;
5454 stub_entry->stub_type = a8_fixes[i].stub_type;
5455 stub_entry->target_section = a8_fixes[i].section;
5456 stub_entry->target_value = a8_fixes[i].offset;
5457 stub_entry->target_addend = a8_fixes[i].addend;
5458 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5459 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5460
99059e56
RM		 5461 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5462 &template_sequence,
5463 &template_size);
48229727 5464
99059e56
RM		 5465 stub_entry->stub_size = size;
5466 stub_entry->stub_template = template_sequence;
5467 stub_entry->stub_template_size = template_size;
5468 }
48229727
JB		 5469
5470 /* Stash the Cortex-A8 erratum fix array for use later in
99059e56 5471 elf32_arm_write_section(). */
48229727
JB		 5472 htab->a8_erratum_fixes = a8_fixes;
5473 htab->num_a8_erratum_fixes = num_a8_fixes;
5474 }
5475 else
5476 {
5477 htab->a8_erratum_fixes = NULL;
5478 htab->num_a8_erratum_fixes = 0;
5479 }
906e58ca
NC		 5480 return TRUE;
5481
5482 error_ret_free_local:
5483 return FALSE;
5e681ec4
PB		 5484}
5485
906e58ca
NC		 5486/* Build all the stubs associated with the current output file. The
5487 stubs are kept in a hash table attached to the main linker hash
5488 table. We also set up the .plt entries for statically linked PIC
5489 functions here. This function is called via arm_elf_finish in the
5490 linker. */
252b5132 5491
906e58ca
NC		 5492bfd_boolean
5493elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5494{
906e58ca
NC		 5495 asection *stub_sec;
5496 struct bfd_hash_table *table;
5497 struct elf32_arm_link_hash_table *htab;
252b5132 5498
906e58ca 5499 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5500 if (htab == NULL)
5501 return FALSE;
252b5132 5502
906e58ca
NC		 5503 for (stub_sec = htab->stub_bfd->sections;
5504 stub_sec != NULL;
5505 stub_sec = stub_sec->next)
252b5132 5506 {
906e58ca
NC		 5507 bfd_size_type size;
5508
8029a119 5509 /* Ignore non-stub sections. */
906e58ca
NC		 5510 if (!strstr (stub_sec->name, STUB_SUFFIX))
5511 continue;
5512
5513 /* Allocate memory to hold the linker stubs. */
5514 size = stub_sec->size;
21d799b5 5515 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5516 if (stub_sec->contents == NULL && size != 0)
5517 return FALSE;
5518 stub_sec->size = 0;
252b5132
RH		 5519 }
5520
906e58ca
NC		 5521 /* Build the stubs as directed by the stub hash table. */
5522 table = &htab->stub_hash_table;
5523 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5524 if (htab->fix_cortex_a8)
5525 {
5526 /* Place the cortex a8 stubs last. */
5527 htab->fix_cortex_a8 = -1;
5528 bfd_hash_traverse (table, arm_build_one_stub, info);
5529 }
252b5132 5530
906e58ca 5531 return TRUE;
252b5132
RH		 5532}
5533
9b485d32
NC		 5534/* Locate the Thumb encoded calling stub for NAME. */
5535
252b5132 5536static struct elf_link_hash_entry *
57e8b36a
NC		 5537find_thumb_glue (struct bfd_link_info *link_info,
5538 const char *name,
f2a9dd69 5539 char **error_message)
252b5132
RH		 5540{
5541 char *tmp_name;
5542 struct elf_link_hash_entry *hash;
5543 struct elf32_arm_link_hash_table *hash_table;
5544
5545 /* We need a pointer to the armelf specific hash table. */
5546 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5547 if (hash_table == NULL)
5548 return NULL;
252b5132 5549
21d799b5 5550 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5551 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5552
5553 BFD_ASSERT (tmp_name);
5554
5555 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5556
5557 hash = elf_link_hash_lookup
b34976b6 5558 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5559
b1657152
AM		 5560 if (hash == NULL
5561 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5562 tmp_name, name) == -1)
5563 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5564
5565 free (tmp_name);
5566
5567 return hash;
5568}
5569
9b485d32
NC		 5570/* Locate the ARM encoded calling stub for NAME. */
5571
252b5132 5572static struct elf_link_hash_entry *
57e8b36a
NC		 5573find_arm_glue (struct bfd_link_info *link_info,
5574 const char *name,
f2a9dd69 5575 char **error_message)
252b5132
RH		 5576{
5577 char *tmp_name;
5578 struct elf_link_hash_entry *myh;
5579 struct elf32_arm_link_hash_table *hash_table;
5580
5581 /* We need a pointer to the elfarm specific hash table. */
5582 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5583 if (hash_table == NULL)
5584 return NULL;
252b5132 5585
21d799b5 5586 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5587 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5588
5589 BFD_ASSERT (tmp_name);
5590
5591 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5592
5593 myh = elf_link_hash_lookup
b34976b6 5594 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5595
b1657152
AM		 5596 if (myh == NULL
5597 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5598 tmp_name, name) == -1)
5599 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5600
5601 free (tmp_name);
5602
5603 return myh;
5604}
5605
8f6277f5 5606/* ARM->Thumb glue (static images):
252b5132
RH		 5607
5608 .arm
5609 __func_from_arm:
5610 ldr r12, __func_addr
5611 bx r12
5612 __func_addr:
906e58ca 5613 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5614
26079076
PB		 5615 (v5t static images)
5616 .arm
5617 __func_from_arm:
5618 ldr pc, __func_addr
5619 __func_addr:
906e58ca 5620 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5621
8f6277f5
PB		 5622 (relocatable images)
5623 .arm
5624 __func_from_arm:
5625 ldr r12, __func_offset
5626 add r12, r12, pc
5627 bx r12
5628 __func_offset:
8029a119 5629 .word func - . */
8f6277f5
PB		 5630
5631#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5632static const insn32 a2t1_ldr_insn = 0xe59fc000;
5633static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5634static const insn32 a2t3_func_addr_insn = 0x00000001;
5635
26079076
PB		 5636#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5637static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5638static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5639
8f6277f5
PB		 5640#define ARM2THUMB_PIC_GLUE_SIZE 16
5641static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5642static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5643static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5644
9b485d32 5645/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5646
8029a119
NC		 5647 .thumb .thumb
5648 .align 2 .align 2
5649 __func_from_thumb: __func_from_thumb:
5650 bx pc push {r6, lr}
5651 nop ldr r6, __func_addr
5652 .arm mov lr, pc
5653 b func bx r6
99059e56
RM		 5654 .arm
5655 ;; back_to_thumb
5656 ldmia r13! {r6, lr}
5657 bx lr
5658 __func_addr:
5659 .word func */
252b5132
RH		 5660
5661#define THUMB2ARM_GLUE_SIZE 8
5662static const insn16 t2a1_bx_pc_insn = 0x4778;
5663static const insn16 t2a2_noop_insn = 0x46c0;
5664static const insn32 t2a3_b_insn = 0xea000000;
5665
c7b8f16e
JB		 5666#define VFP11_ERRATUM_VENEER_SIZE 8
5667
845b51d6
PB		 5668#define ARM_BX_VENEER_SIZE 12
5669static const insn32 armbx1_tst_insn = 0xe3100001;
5670static const insn32 armbx2_moveq_insn = 0x01a0f000;
5671static const insn32 armbx3_bx_insn = 0xe12fff10;
5672
7e392df6 5673#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5674static void
5675arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5676{
5677 asection * s;
8029a119 5678 bfd_byte * contents;
252b5132 5679
8029a119 5680 if (size == 0)
3e6b1042
DJ		 5681 {
5682 /* Do not include empty glue sections in the output. */
5683 if (abfd != NULL)
5684 {
3d4d4302 5685 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5686 if (s != NULL)
5687 s->flags |= SEC_EXCLUDE;
5688 }
5689 return;
5690 }
252b5132 5691
8029a119 5692 BFD_ASSERT (abfd != NULL);
252b5132 5693
3d4d4302 5694 s = bfd_get_linker_section (abfd, name);
8029a119 5695 BFD_ASSERT (s != NULL);
252b5132 5696
21d799b5 5697 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5698
8029a119
NC		 5699 BFD_ASSERT (s->size == size);
5700 s->contents = contents;
5701}
906e58ca 5702
8029a119
NC		 5703bfd_boolean
5704bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5705{
5706 struct elf32_arm_link_hash_table * globals;
906e58ca 5707
8029a119
NC		 5708 globals = elf32_arm_hash_table (info);
5709 BFD_ASSERT (globals != NULL);
906e58ca 5710
8029a119
NC		 5711 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5712 globals->arm_glue_size,
5713 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5714
8029a119
NC		 5715 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5716 globals->thumb_glue_size,
5717 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5718
8029a119
NC		 5719 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5720 globals->vfp11_erratum_glue_size,
5721 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5722
8029a119
NC		 5723 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5724 globals->bx_glue_size,
845b51d6
PB		 5725 ARM_BX_GLUE_SECTION_NAME);
5726
b34976b6 5727 return TRUE;
252b5132
RH		 5728}
5729
a4fd1a8e 5730/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5731 returns the symbol identifying the stub. */
5732
a4fd1a8e 5733static struct elf_link_hash_entry *
57e8b36a
NC		 5734record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5735 struct elf_link_hash_entry * h)
252b5132
RH		 5736{
5737 const char * name = h->root.root.string;
63b0f745 5738 asection * s;
252b5132
RH		 5739 char * tmp_name;
5740 struct elf_link_hash_entry * myh;
14a793b2 5741 struct bfd_link_hash_entry * bh;
252b5132 5742 struct elf32_arm_link_hash_table * globals;
dc810e39 5743 bfd_vma val;
2f475487 5744 bfd_size_type size;
252b5132
RH		 5745
5746 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5747 BFD_ASSERT (globals != NULL);
5748 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5749
3d4d4302 5750 s = bfd_get_linker_section
252b5132
RH		 5751 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5752
252b5132
RH		 5753 BFD_ASSERT (s != NULL);
5754
21d799b5 5755 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5756 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5757
5758 BFD_ASSERT (tmp_name);
5759
5760 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5761
5762 myh = elf_link_hash_lookup
b34976b6 5763 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5764
5765 if (myh != NULL)
5766 {
9b485d32 5767 /* We've already seen this guy. */
252b5132 5768 free (tmp_name);
a4fd1a8e 5769 return myh;
252b5132
RH		 5770 }
5771
57e8b36a
NC		 5772 /* The only trick here is using hash_table->arm_glue_size as the value.
5773 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5774 putting it. The +1 on the value marks that the stub has not been
5775 output yet - not that it is a Thumb function. */
14a793b2 5776 bh = NULL;
dc810e39
AM		 5777 val = globals->arm_glue_size + 1;
5778 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5779 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5780 NULL, TRUE, FALSE, &bh);
252b5132 5781
b7693d02
DJ		 5782 myh = (struct elf_link_hash_entry *) bh;
5783 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5784 myh->forced_local = 1;
5785
252b5132
RH		 5786 free (tmp_name);
5787
27e55c4d
PB		 5788 if (link_info->shared || globals->root.is_relocatable_executable
5789 || globals->pic_veneer)
2f475487 5790 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5791 else if (globals->use_blx)
5792 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5793 else
2f475487
AM		 5794 size = ARM2THUMB_STATIC_GLUE_SIZE;
5795
5796 s->size += size;
5797 globals->arm_glue_size += size;
252b5132 5798
a4fd1a8e 5799 return myh;
252b5132
RH		 5800}
5801
845b51d6
PB		 5802/* Allocate space for ARMv4 BX veneers. */
5803
5804static void
5805record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5806{
5807 asection * s;
5808 struct elf32_arm_link_hash_table *globals;
5809 char *tmp_name;
5810 struct elf_link_hash_entry *myh;
5811 struct bfd_link_hash_entry *bh;
5812 bfd_vma val;
5813
5814 /* BX PC does not need a veneer. */
5815 if (reg == 15)
5816 return;
5817
5818 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5819 BFD_ASSERT (globals != NULL);
5820 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5821
5822 /* Check if this veneer has already been allocated. */
5823 if (globals->bx_glue_offset[reg])
5824 return;
5825
3d4d4302 5826 s = bfd_get_linker_section
845b51d6
PB		 5827 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5828
5829 BFD_ASSERT (s != NULL);
5830
5831 /* Add symbol for veneer. */
21d799b5
NC		 5832 tmp_name = (char *)
5833 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5834
845b51d6 5835 BFD_ASSERT (tmp_name);
906e58ca 5836
845b51d6 5837 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5838
845b51d6
PB		 5839 myh = elf_link_hash_lookup
5840 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5841
845b51d6 5842 BFD_ASSERT (myh == NULL);
906e58ca 5843
845b51d6
PB		 5844 bh = NULL;
5845 val = globals->bx_glue_size;
5846 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
99059e56
RM		 5847 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5848 NULL, TRUE, FALSE, &bh);
845b51d6
PB		 5849
5850 myh = (struct elf_link_hash_entry *) bh;
5851 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5852 myh->forced_local = 1;
5853
5854 s->size += ARM_BX_VENEER_SIZE;
5855 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5856 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5857}
5858
5859
c7b8f16e
JB		 5860/* Add an entry to the code/data map for section SEC. */
5861
5862static void
5863elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5864{
5865 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5866 unsigned int newidx;
906e58ca 5867
c7b8f16e
JB		 5868 if (sec_data->map == NULL)
5869 {
21d799b5 5870 sec_data->map = (elf32_arm_section_map *)
99059e56 5871 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5872 sec_data->mapcount = 0;
5873 sec_data->mapsize = 1;
5874 }
906e58ca 5875
c7b8f16e 5876 newidx = sec_data->mapcount++;
906e58ca 5877
c7b8f16e
JB		 5878 if (sec_data->mapcount > sec_data->mapsize)
5879 {
5880 sec_data->mapsize *= 2;
21d799b5 5881 sec_data->map = (elf32_arm_section_map *)
99059e56
RM		 5882 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5883 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5884 }
5885
5886 if (sec_data->map)
5887 {
5888 sec_data->map[newidx].vma = vma;
5889 sec_data->map[newidx].type = type;
c7b8f16e 5890 }
c7b8f16e
JB		 5891}
5892
5893
5894/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5895 veneers are handled for now. */
5896
5897static bfd_vma
5898record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
99059e56
RM		 5899 elf32_vfp11_erratum_list *branch,
5900 bfd *branch_bfd,
5901 asection *branch_sec,
5902 unsigned int offset)
c7b8f16e
JB		 5903{
5904 asection *s;
5905 struct elf32_arm_link_hash_table *hash_table;
5906 char *tmp_name;
5907 struct elf_link_hash_entry *myh;
5908 struct bfd_link_hash_entry *bh;
5909 bfd_vma val;
5910 struct _arm_elf_section_data *sec_data;
c7b8f16e 5911 elf32_vfp11_erratum_list *newerr;
906e58ca 5912
c7b8f16e 5913 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5914 BFD_ASSERT (hash_table != NULL);
5915 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5916
3d4d4302 5917 s = bfd_get_linker_section
c7b8f16e 5918 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5919
c7b8f16e 5920 sec_data = elf32_arm_section_data (s);
906e58ca 5921
c7b8f16e 5922 BFD_ASSERT (s != NULL);
906e58ca 5923
21d799b5 5924 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 5925 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5926
c7b8f16e 5927 BFD_ASSERT (tmp_name);
906e58ca 5928
c7b8f16e
JB		 5929 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5930 hash_table->num_vfp11_fixes);
906e58ca 5931
c7b8f16e
JB		 5932 myh = elf_link_hash_lookup
5933 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5934
c7b8f16e 5935 BFD_ASSERT (myh == NULL);
906e58ca 5936
c7b8f16e
JB		 5937 bh = NULL;
5938 val = hash_table->vfp11_erratum_glue_size;
5939 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
99059e56
RM		 5940 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5941 NULL, TRUE, FALSE, &bh);
c7b8f16e
JB		 5942
5943 myh = (struct elf_link_hash_entry *) bh;
5944 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5945 myh->forced_local = 1;
5946
5947 /* Link veneer back to calling location. */
c7e2358a 5948 sec_data->erratumcount += 1;
21d799b5
NC		 5949 newerr = (elf32_vfp11_erratum_list *)
5950 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5951
c7b8f16e
JB		 5952 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5953 newerr->vma = -1;
5954 newerr->u.v.branch = branch;
5955 newerr->u.v.id = hash_table->num_vfp11_fixes;
5956 branch->u.b.veneer = newerr;
5957
5958 newerr->next = sec_data->erratumlist;
5959 sec_data->erratumlist = newerr;
5960
5961 /* A symbol for the return from the veneer. */
5962 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5963 hash_table->num_vfp11_fixes);
5964
5965 myh = elf_link_hash_lookup
5966 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5967
c7b8f16e
JB		 5968 if (myh != NULL)
5969 abort ();
5970
5971 bh = NULL;
5972 val = offset + 4;
5973 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5974 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5975
c7b8f16e
JB		 5976 myh = (struct elf_link_hash_entry *) bh;
5977 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5978 myh->forced_local = 1;
5979
5980 free (tmp_name);
906e58ca 5981
c7b8f16e
JB		 5982 /* Generate a mapping symbol for the veneer section, and explicitly add an
5983 entry for that symbol to the code/data map for the section. */
5984 if (hash_table->vfp11_erratum_glue_size == 0)
5985 {
5986 bh = NULL;
5987 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
99059e56 5988 ever requires this erratum fix. */
c7b8f16e
JB		 5989 _bfd_generic_link_add_one_symbol (link_info,
5990 hash_table->bfd_of_glue_owner, "$a",
5991 BSF_LOCAL, s, 0, NULL,
99059e56 5992 TRUE, FALSE, &bh);
c7b8f16e
JB		 5993
5994 myh = (struct elf_link_hash_entry *) bh;
5995 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5996 myh->forced_local = 1;
906e58ca 5997
c7b8f16e 5998 /* The elf32_arm_init_maps function only cares about symbols from input
99059e56
RM		 5999 BFDs. We must make a note of this generated mapping symbol
6000 ourselves so that code byteswapping works properly in
6001 elf32_arm_write_section. */
c7b8f16e
JB		 6002 elf32_arm_section_map_add (s, 'a', 0);
6003 }
906e58ca 6004
c7b8f16e
JB		 6005 s->size += VFP11_ERRATUM_VENEER_SIZE;
6006 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6007 hash_table->num_vfp11_fixes++;
906e58ca 6008
c7b8f16e
JB		 6009 /* The offset of the veneer. */
6010 return val;
6011}
6012
8029a119 6013#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 6014 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6015 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 6016
6017/* Create a fake section for use by the ARM backend of the linker. */
6018
6019static bfd_boolean
6020arm_make_glue_section (bfd * abfd, const char * name)
6021{
6022 asection * sec;
6023
3d4d4302 6024 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6025 if (sec != NULL)
6026 /* Already made. */
6027 return TRUE;
6028
3d4d4302 6029 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6030
6031 if (sec == NULL
6032 || !bfd_set_section_alignment (abfd, sec, 2))
6033 return FALSE;
6034
6035 /* Set the gc mark to prevent the section from being removed by garbage
6036 collection, despite the fact that no relocs refer to this section. */
6037 sec->gc_mark = 1;
6038
6039 return TRUE;
6040}
6041
1db37fe6
YG		 6042/* Set size of .plt entries. This function is called from the
6043 linker scripts in ld/emultempl/{armelf}.em. */
6044
6045void
6046bfd_elf32_arm_use_long_plt (void)
6047{
6048 elf32_arm_use_long_plt_entry = TRUE;
6049}
6050
8afb0e02
NC		 6051/* Add the glue sections to ABFD. This function is called from the
6052 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6053
b34976b6 6054bfd_boolean
57e8b36a
NC		 6055bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6056 struct bfd_link_info *info)
252b5132 6057{
8afb0e02
NC		 6058 /* If we are only performing a partial
6059 link do not bother adding the glue. */
1049f94e 6060 if (info->relocatable)
b34976b6 6061 return TRUE;
252b5132 6062
8029a119
NC		 6063 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6064 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6065 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6066 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6067}
6068
6069/* Select a BFD to be used to hold the sections used by the glue code.
6070 This function is called from the linker scripts in ld/emultempl/
8029a119 6071 {armelf/pe}.em. */
8afb0e02 6072
b34976b6 6073bfd_boolean
57e8b36a 6074bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6075{
6076 struct elf32_arm_link_hash_table *globals;
6077
6078 /* If we are only performing a partial link
6079 do not bother getting a bfd to hold the glue. */
1049f94e 6080 if (info->relocatable)
b34976b6 6081 return TRUE;
8afb0e02 6082
b7693d02
DJ		 6083 /* Make sure we don't attach the glue sections to a dynamic object. */
6084 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6085
8afb0e02 6086 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6087 BFD_ASSERT (globals != NULL);
6088
6089 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6090 return TRUE;
8afb0e02 6091
252b5132
RH		 6092 /* Save the bfd for later use. */
6093 globals->bfd_of_glue_owner = abfd;
cedb70c5 6094
b34976b6 6095 return TRUE;
252b5132
RH		 6096}
6097
906e58ca
NC		 6098static void
6099check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6100{
2de70689
MGD		 6101 int cpu_arch;
6102
b38cadfb 6103 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6104 Tag_CPU_arch);
6105
6106 if (globals->fix_arm1176)
6107 {
6108 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6109 globals->use_blx = 1;
6110 }
6111 else
6112 {
6113 if (cpu_arch > TAG_CPU_ARCH_V4T)
6114 globals->use_blx = 1;
6115 }
39b41c9c
PB		 6116}
6117
b34976b6 6118bfd_boolean
57e8b36a 6119bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6120 struct bfd_link_info *link_info)
252b5132
RH		 6121{
6122 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6123 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6124 Elf_Internal_Rela *irel, *irelend;
6125 bfd_byte *contents = NULL;
252b5132
RH		 6126
6127 asection *sec;
6128 struct elf32_arm_link_hash_table *globals;
6129
6130 /* If we are only performing a partial link do not bother
6131 to construct any glue. */
1049f94e 6132 if (link_info->relocatable)
b34976b6 6133 return TRUE;
252b5132 6134
39ce1a6a
NC		 6135 /* Here we have a bfd that is to be included on the link. We have a
6136 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6137 globals = elf32_arm_hash_table (link_info);
252b5132 6138 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6139
6140 check_use_blx (globals);
252b5132 6141
d504ffc8 6142 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6143 {
d003868e
AM		 6144 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6145 abfd);
e489d0ae
PB		 6146 return FALSE;
6147 }
f21f3fe0 6148
39ce1a6a
NC		 6149 /* PR 5398: If we have not decided to include any loadable sections in
6150 the output then we will not have a glue owner bfd. This is OK, it
6151 just means that there is nothing else for us to do here. */
6152 if (globals->bfd_of_glue_owner == NULL)
6153 return TRUE;
6154
252b5132
RH		 6155 /* Rummage around all the relocs and map the glue vectors. */
6156 sec = abfd->sections;
6157
6158 if (sec == NULL)
b34976b6 6159 return TRUE;
252b5132
RH		 6160
6161 for (; sec != NULL; sec = sec->next)
6162 {
6163 if (sec->reloc_count == 0)
6164 continue;
6165
2f475487
AM		 6166 if ((sec->flags & SEC_EXCLUDE) != 0)
6167 continue;
6168
0ffa91dd 6169 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6170
9b485d32 6171 /* Load the relocs. */
6cdc0ccc 6172 internal_relocs
906e58ca 6173 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6174
6cdc0ccc
AM		 6175 if (internal_relocs == NULL)
6176 goto error_return;
252b5132 6177
6cdc0ccc
AM		 6178 irelend = internal_relocs + sec->reloc_count;
6179 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6180 {
6181 long r_type;
6182 unsigned long r_index;
252b5132
RH		 6183
6184 struct elf_link_hash_entry *h;
6185
6186 r_type = ELF32_R_TYPE (irel->r_info);
6187 r_index = ELF32_R_SYM (irel->r_info);
6188
9b485d32 6189 /* These are the only relocation types we care about. */
ba96a88f 6190 if ( r_type != R_ARM_PC24
845b51d6 6191 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6192 continue;
6193
6194 /* Get the section contents if we haven't done so already. */
6195 if (contents == NULL)
6196 {
6197 /* Get cached copy if it exists. */
6198 if (elf_section_data (sec)->this_hdr.contents != NULL)
6199 contents = elf_section_data (sec)->this_hdr.contents;
6200 else
6201 {
6202 /* Go get them off disk. */
57e8b36a 6203 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6204 goto error_return;
6205 }
6206 }
6207
845b51d6
PB		 6208 if (r_type == R_ARM_V4BX)
6209 {
6210 int reg;
6211
6212 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6213 record_arm_bx_glue (link_info, reg);
6214 continue;
6215 }
6216
a7c10850 6217 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6218 h = NULL;
6219
9b485d32 6220 /* We don't care about local symbols. */
252b5132
RH		 6221 if (r_index < symtab_hdr->sh_info)
6222 continue;
6223
9b485d32 6224 /* This is an external symbol. */
252b5132
RH		 6225 r_index -= symtab_hdr->sh_info;
6226 h = (struct elf_link_hash_entry *)
6227 elf_sym_hashes (abfd)[r_index];
6228
6229 /* If the relocation is against a static symbol it must be within
6230 the current section and so cannot be a cross ARM/Thumb relocation. */
6231 if (h == NULL)
6232 continue;
6233
d504ffc8
DJ		 6234 /* If the call will go through a PLT entry then we do not need
6235 glue. */
362d30a1 6236 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6237 continue;
6238
252b5132
RH		 6239 switch (r_type)
6240 {
6241 case R_ARM_PC24:
6242 /* This one is a call from arm code. We need to look up
99059e56
RM		 6243 the target of the call. If it is a thumb target, we
6244 insert glue. */
35fc36a8 6245 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6246 record_arm_to_thumb_glue (link_info, h);
6247 break;
6248
252b5132 6249 default:
c6596c5e 6250 abort ();
252b5132
RH		 6251 }
6252 }
6cdc0ccc
AM		 6253
6254 if (contents != NULL
6255 && elf_section_data (sec)->this_hdr.contents != contents)
6256 free (contents);
6257 contents = NULL;
6258
6259 if (internal_relocs != NULL
6260 && elf_section_data (sec)->relocs != internal_relocs)
6261 free (internal_relocs);
6262 internal_relocs = NULL;
252b5132
RH		 6263 }
6264
b34976b6 6265 return TRUE;
9a5aca8c 6266
252b5132 6267error_return:
6cdc0ccc
AM		 6268 if (contents != NULL
6269 && elf_section_data (sec)->this_hdr.contents != contents)
6270 free (contents);
6271 if (internal_relocs != NULL
6272 && elf_section_data (sec)->relocs != internal_relocs)
6273 free (internal_relocs);
9a5aca8c 6274
b34976b6 6275 return FALSE;
252b5132 6276}
7e392df6 6277#endif
252b5132 6278
eb043451 6279
c7b8f16e
JB		 6280/* Initialise maps of ARM/Thumb/data for input BFDs. */
6281
6282void
6283bfd_elf32_arm_init_maps (bfd *abfd)
6284{
6285 Elf_Internal_Sym *isymbuf;
6286 Elf_Internal_Shdr *hdr;
6287 unsigned int i, localsyms;
6288
af1f4419
NC		 6289 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6290 if (! is_arm_elf (abfd))
6291 return;
6292
c7b8f16e
JB		 6293 if ((abfd->flags & DYNAMIC) != 0)
6294 return;
6295
0ffa91dd 6296 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6297 localsyms = hdr->sh_info;
6298
6299 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6300 should contain the number of local symbols, which should come before any
6301 global symbols. Mapping symbols are always local. */
6302 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6303 NULL);
6304
6305 /* No internal symbols read? Skip this BFD. */
6306 if (isymbuf == NULL)
6307 return;
6308
6309 for (i = 0; i < localsyms; i++)
6310 {
6311 Elf_Internal_Sym *isym = &isymbuf[i];
6312 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6313 const char *name;
906e58ca 6314
c7b8f16e 6315 if (sec != NULL
99059e56
RM		 6316 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6317 {
6318 name = bfd_elf_string_from_elf_section (abfd,
6319 hdr->sh_link, isym->st_name);
906e58ca 6320
99059e56 6321 if (bfd_is_arm_special_symbol_name (name,
c7b8f16e 6322 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
99059e56
RM		 6323 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6324 }
c7b8f16e
JB		 6325 }
6326}
6327
6328
48229727
JB		 6329/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6330 say what they wanted. */
6331
6332void
6333bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6334{
6335 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6336 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6337
4dfe6ac6
NC		 6338 if (globals == NULL)
6339 return;
6340
48229727
JB		 6341 if (globals->fix_cortex_a8 == -1)
6342 {
6343 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6344 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6345 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6346 || out_attr[Tag_CPU_arch_profile].i == 0))
6347 globals->fix_cortex_a8 = 1;
6348 else
6349 globals->fix_cortex_a8 = 0;
6350 }
6351}
6352
6353
c7b8f16e
JB		 6354void
6355bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6356{
6357 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6358 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6359
4dfe6ac6
NC		 6360 if (globals == NULL)
6361 return;
c7b8f16e
JB		 6362 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6363 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6364 {
6365 switch (globals->vfp11_fix)
99059e56
RM		 6366 {
6367 case BFD_ARM_VFP11_FIX_DEFAULT:
6368 case BFD_ARM_VFP11_FIX_NONE:
6369 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6370 break;
6371
6372 default:
6373 /* Give a warning, but do as the user requests anyway. */
6374 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6375 "workaround is not necessary for target architecture"), obfd);
6376 }
c7b8f16e
JB		 6377 }
6378 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6379 /* For earlier architectures, we might need the workaround, but do not
6380 enable it by default. If users is running with broken hardware, they
6381 must enable the erratum fix explicitly. */
6382 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6383}
6384
6385
906e58ca
NC		 6386enum bfd_arm_vfp11_pipe
6387{
c7b8f16e
JB		 6388 VFP11_FMAC,
6389 VFP11_LS,
6390 VFP11_DS,
6391 VFP11_BAD
6392};
6393
6394/* Return a VFP register number. This is encoded as RX:X for single-precision
6395 registers, or X:RX for double-precision registers, where RX is the group of
6396 four bits in the instruction encoding and X is the single extension bit.
6397 RX and X fields are specified using their lowest (starting) bit. The return
6398 value is:
6399
6400 0...31: single-precision registers s0...s31
6401 32...63: double-precision registers d0...d31.
906e58ca 6402
c7b8f16e
JB		 6403 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6404 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6405
c7b8f16e
JB		 6406static unsigned int
6407bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
99059e56 6408 unsigned int x)
c7b8f16e
JB		 6409{
6410 if (is_double)
6411 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6412 else
6413 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6414}
6415
6416/* Set bits in *WMASK according to a register number REG as encoded by
6417 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6418
6419static void
6420bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6421{
6422 if (reg < 32)
6423 *wmask |= 1 << reg;
6424 else if (reg < 48)
6425 *wmask |= 3 << ((reg - 32) * 2);
6426}
6427
6428/* Return TRUE if WMASK overwrites anything in REGS. */
6429
6430static bfd_boolean
6431bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6432{
6433 int i;
906e58ca 6434
c7b8f16e
JB		 6435 for (i = 0; i < numregs; i++)
6436 {
6437 unsigned int reg = regs[i];
6438
6439 if (reg < 32 && (wmask & (1 << reg)) != 0)
99059e56 6440 return TRUE;
906e58ca 6441
c7b8f16e
JB		 6442 reg -= 32;
6443
6444 if (reg >= 16)
99059e56 6445 continue;
906e58ca 6446
c7b8f16e 6447 if ((wmask & (3 << (reg * 2))) != 0)
99059e56 6448 return TRUE;
c7b8f16e 6449 }
906e58ca 6450
c7b8f16e
JB		 6451 return FALSE;
6452}
6453
6454/* In this function, we're interested in two things: finding input registers
6455 for VFP data-processing instructions, and finding the set of registers which
6456 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6457 hold the written set, so FLDM etc. are easy to deal with (we're only
6458 interested in 32 SP registers or 16 dp registers, due to the VFP version
6459 implemented by the chip in question). DP registers are marked by setting
6460 both SP registers in the write mask). */
6461
6462static enum bfd_arm_vfp11_pipe
6463bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
99059e56 6464 int *numregs)
c7b8f16e 6465{
91d6fa6a 6466 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6467 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6468
6469 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6470 {
6471 unsigned int pqrs;
6472 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6473 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6474
6475 pqrs = ((insn & 0x00800000) >> 20)
99059e56
RM		 6476 | ((insn & 0x00300000) >> 19)
6477 | ((insn & 0x00000040) >> 6);
c7b8f16e
JB		 6478
6479 switch (pqrs)
99059e56
RM		 6480 {
6481 case 0: /* fmac[sd]. */
6482 case 1: /* fnmac[sd]. */
6483 case 2: /* fmsc[sd]. */
6484 case 3: /* fnmsc[sd]. */
6485 vpipe = VFP11_FMAC;
6486 bfd_arm_vfp11_write_mask (destmask, fd);
6487 regs[0] = fd;
6488 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6489 regs[2] = fm;
6490 *numregs = 3;
6491 break;
6492
6493 case 4: /* fmul[sd]. */
6494 case 5: /* fnmul[sd]. */
6495 case 6: /* fadd[sd]. */
6496 case 7: /* fsub[sd]. */
6497 vpipe = VFP11_FMAC;
6498 goto vfp_binop;
6499
6500 case 8: /* fdiv[sd]. */
6501 vpipe = VFP11_DS;
6502 vfp_binop:
6503 bfd_arm_vfp11_write_mask (destmask, fd);
6504 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6505 regs[1] = fm;
6506 *numregs = 2;
6507 break;
6508
6509 case 15: /* extended opcode. */
6510 {
6511 unsigned int extn = ((insn >> 15) & 0x1e)
6512 | ((insn >> 7) & 1);
6513
6514 switch (extn)
6515 {
6516 case 0: /* fcpy[sd]. */
6517 case 1: /* fabs[sd]. */
6518 case 2: /* fneg[sd]. */
6519 case 8: /* fcmp[sd]. */
6520 case 9: /* fcmpe[sd]. */
6521 case 10: /* fcmpz[sd]. */
6522 case 11: /* fcmpez[sd]. */
6523 case 16: /* fuito[sd]. */
6524 case 17: /* fsito[sd]. */
6525 case 24: /* ftoui[sd]. */
6526 case 25: /* ftouiz[sd]. */
6527 case 26: /* ftosi[sd]. */
6528 case 27: /* ftosiz[sd]. */
6529 /* These instructions will not bounce due to underflow. */
6530 *numregs = 0;
6531 vpipe = VFP11_FMAC;
6532 break;
6533
6534 case 3: /* fsqrt[sd]. */
6535 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6536 registers to cause the erratum in previous instructions. */
6537 bfd_arm_vfp11_write_mask (destmask, fd);
6538 vpipe = VFP11_DS;
6539 break;
6540
6541 case 15: /* fcvt{ds,sd}. */
6542 {
6543 int rnum = 0;
6544
6545 bfd_arm_vfp11_write_mask (destmask, fd);
c7b8f16e
JB		 6546
6547 /* Only FCVTSD can underflow. */
99059e56
RM		 6548 if ((insn & 0x100) != 0)
6549 regs[rnum++] = fm;
c7b8f16e 6550
99059e56 6551 *numregs = rnum;
c7b8f16e 6552
99059e56
RM		 6553 vpipe = VFP11_FMAC;
6554 }
6555 break;
c7b8f16e 6556
99059e56
RM		 6557 default:
6558 return VFP11_BAD;
6559 }
6560 }
6561 break;
c7b8f16e 6562
99059e56
RM		 6563 default:
6564 return VFP11_BAD;
6565 }
c7b8f16e
JB		 6566 }
6567 /* Two-register transfer. */
6568 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6569 {
6570 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6571
c7b8f16e
JB		 6572 if ((insn & 0x100000) == 0)
6573 {
99059e56
RM		 6574 if (is_double)
6575 bfd_arm_vfp11_write_mask (destmask, fm);
6576 else
6577 {
6578 bfd_arm_vfp11_write_mask (destmask, fm);
6579 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6580 }
c7b8f16e
JB		 6581 }
6582
91d6fa6a 6583 vpipe = VFP11_LS;
c7b8f16e
JB		 6584 }
6585 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6586 {
6587 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6588 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6589
c7b8f16e 6590 switch (puw)
99059e56
RM		 6591 {
6592 case 0: /* Two-reg transfer. We should catch these above. */
6593 abort ();
906e58ca 6594
99059e56
RM		 6595 case 2: /* fldm[sdx]. */
6596 case 3:
6597 case 5:
6598 {
6599 unsigned int i, offset = insn & 0xff;
c7b8f16e 6600
99059e56
RM		 6601 if (is_double)
6602 offset >>= 1;
c7b8f16e 6603
99059e56
RM		 6604 for (i = fd; i < fd + offset; i++)
6605 bfd_arm_vfp11_write_mask (destmask, i);
6606 }
6607 break;
906e58ca 6608
99059e56
RM		 6609 case 4: /* fld[sd]. */
6610 case 6:
6611 bfd_arm_vfp11_write_mask (destmask, fd);
6612 break;
906e58ca 6613
99059e56
RM		 6614 default:
6615 return VFP11_BAD;
6616 }
c7b8f16e 6617
91d6fa6a 6618 vpipe = VFP11_LS;
c7b8f16e
JB		 6619 }
6620 /* Single-register transfer. Note L==0. */
6621 else if ((insn & 0x0f100e10) == 0x0e000a10)
6622 {
6623 unsigned int opcode = (insn >> 21) & 7;
6624 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6625
6626 switch (opcode)
99059e56
RM		 6627 {
6628 case 0: /* fmsr/fmdlr. */
6629 case 1: /* fmdhr. */
6630 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6631 destination register. I don't know if this is exactly right,
6632 but it is the conservative choice. */
6633 bfd_arm_vfp11_write_mask (destmask, fn);
6634 break;
6635
6636 case 7: /* fmxr. */
6637 break;
6638 }
c7b8f16e 6639
91d6fa6a 6640 vpipe = VFP11_LS;
c7b8f16e
JB		 6641 }
6642
91d6fa6a 6643 return vpipe;
c7b8f16e
JB		 6644}
6645
6646
6647static int elf32_arm_compare_mapping (const void * a, const void * b);
6648
6649
6650/* Look for potentially-troublesome code sequences which might trigger the
6651 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6652 (available from ARM) for details of the erratum. A short version is
6653 described in ld.texinfo. */
6654
6655bfd_boolean
6656bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6657{
6658 asection *sec;
6659 bfd_byte *contents = NULL;
6660 int state = 0;
6661 int regs[3], numregs = 0;
6662 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6663 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6664
4dfe6ac6
NC		 6665 if (globals == NULL)
6666 return FALSE;
6667
c7b8f16e
JB		 6668 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6669 The states transition as follows:
906e58ca 6670
c7b8f16e 6671 0 -> 1 (vector) or 0 -> 2 (scalar)
99059e56
RM		 6672 A VFP FMAC-pipeline instruction has been seen. Fill
6673 regs[0]..regs[numregs-1] with its input operands. Remember this
6674 instruction in 'first_fmac'.
c7b8f16e
JB		 6675
6676 1 -> 2
99059e56
RM		 6677 Any instruction, except for a VFP instruction which overwrites
6678 regs[*].
906e58ca 6679
c7b8f16e
JB		 6680 1 -> 3 [ -> 0 ] or
6681 2 -> 3 [ -> 0 ]
99059e56
RM		 6682 A VFP instruction has been seen which overwrites any of regs[*].
6683 We must make a veneer! Reset state to 0 before examining next
6684 instruction.
906e58ca 6685
c7b8f16e 6686 2 -> 0
99059e56
RM		 6687 If we fail to match anything in state 2, reset to state 0 and reset
6688 the instruction pointer to the instruction after 'first_fmac'.
c7b8f16e
JB		 6689
6690 If the VFP11 vector mode is in use, there must be at least two unrelated
6691 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6692 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6693
6694 /* If we are only performing a partial link do not bother
6695 to construct any glue. */
6696 if (link_info->relocatable)
6697 return TRUE;
6698
0ffa91dd
NC		 6699 /* Skip if this bfd does not correspond to an ELF image. */
6700 if (! is_arm_elf (abfd))
6701 return TRUE;
906e58ca 6702
c7b8f16e
JB		 6703 /* We should have chosen a fix type by the time we get here. */
6704 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6705
6706 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6707 return TRUE;
2e6030b9 6708
33a7ffc2
JM		 6709 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6710 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6711 return TRUE;
6712
c7b8f16e
JB		 6713 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6714 {
6715 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6716 struct _arm_elf_section_data *sec_data;
6717
6718 /* If we don't have executable progbits, we're not interested in this
99059e56 6719 section. Also skip if section is to be excluded. */
c7b8f16e 6720 if (elf_section_type (sec) != SHT_PROGBITS
99059e56
RM		 6721 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6722 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6723 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6724 || sec->output_section == bfd_abs_section_ptr
99059e56
RM		 6725 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6726 continue;
c7b8f16e
JB		 6727
6728 sec_data = elf32_arm_section_data (sec);
906e58ca 6729
c7b8f16e 6730 if (sec_data->mapcount == 0)
99059e56 6731 continue;
906e58ca 6732
c7b8f16e
JB		 6733 if (elf_section_data (sec)->this_hdr.contents != NULL)
6734 contents = elf_section_data (sec)->this_hdr.contents;
6735 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6736 goto error_return;
6737
6738 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6739 elf32_arm_compare_mapping);
6740
6741 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 6742 {
6743 unsigned int span_start = sec_data->map[span].vma;
6744 unsigned int span_end = (span == sec_data->mapcount - 1)
c7b8f16e 6745 ? sec->size : sec_data->map[span + 1].vma;
99059e56
RM		 6746 char span_type = sec_data->map[span].type;
6747
6748 /* FIXME: Only ARM mode is supported at present. We may need to
6749 support Thumb-2 mode also at some point. */
6750 if (span_type != 'a')
6751 continue;
6752
6753 for (i = span_start; i < span_end;)
6754 {
6755 unsigned int next_i = i + 4;
6756 unsigned int insn = bfd_big_endian (abfd)
6757 ? (contents[i] << 24)
6758 | (contents[i + 1] << 16)
6759 | (contents[i + 2] << 8)
6760 | contents[i + 3]
6761 : (contents[i + 3] << 24)
6762 | (contents[i + 2] << 16)
6763 | (contents[i + 1] << 8)
6764 | contents[i];
6765 unsigned int writemask = 0;
6766 enum bfd_arm_vfp11_pipe vpipe;
6767
6768 switch (state)
6769 {
6770 case 0:
6771 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6772 &numregs);
6773 /* I'm assuming the VFP11 erratum can trigger with denorm
6774 operands on either the FMAC or the DS pipeline. This might
6775 lead to slightly overenthusiastic veneer insertion. */
6776 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6777 {
6778 state = use_vector ? 1 : 2;
6779 first_fmac = i;
6780 veneer_of_insn = insn;
6781 }
6782 break;
6783
6784 case 1:
6785 {
6786 int other_regs[3], other_numregs;
6787 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6788 other_regs,
99059e56
RM		 6789 &other_numregs);
6790 if (vpipe != VFP11_BAD
6791 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6792 numregs))
99059e56
RM		 6793 state = 3;
6794 else
6795 state = 2;
6796 }
6797 break;
6798
6799 case 2:
6800 {
6801 int other_regs[3], other_numregs;
6802 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6803 other_regs,
99059e56
RM		 6804 &other_numregs);
6805 if (vpipe != VFP11_BAD
6806 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6807 numregs))
99059e56
RM		 6808 state = 3;
6809 else
6810 {
6811 state = 0;
6812 next_i = first_fmac + 4;
6813 }
6814 }
6815 break;
6816
6817 case 3:
6818 abort (); /* Should be unreachable. */
6819 }
6820
6821 if (state == 3)
6822 {
6823 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6824 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6825
6826 elf32_arm_section_data (sec)->erratumcount += 1;
6827
6828 newerr->u.b.vfp_insn = veneer_of_insn;
6829
6830 switch (span_type)
6831 {
6832 case 'a':
6833 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6834 break;
6835
6836 default:
6837 abort ();
6838 }
6839
6840 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
c7b8f16e
JB		 6841 first_fmac);
6842
99059e56 6843 newerr->vma = -1;
c7b8f16e 6844
99059e56
RM		 6845 newerr->next = sec_data->erratumlist;
6846 sec_data->erratumlist = newerr;
c7b8f16e 6847
99059e56
RM		 6848 state = 0;
6849 }
c7b8f16e 6850
99059e56
RM		 6851 i = next_i;
6852 }
6853 }
906e58ca 6854
c7b8f16e 6855 if (contents != NULL
99059e56
RM		 6856 && elf_section_data (sec)->this_hdr.contents != contents)
6857 free (contents);
c7b8f16e
JB		 6858 contents = NULL;
6859 }
6860
6861 return TRUE;
6862
6863error_return:
6864 if (contents != NULL
6865 && elf_section_data (sec)->this_hdr.contents != contents)
6866 free (contents);
906e58ca 6867
c7b8f16e
JB		 6868 return FALSE;
6869}
6870
6871/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6872 after sections have been laid out, using specially-named symbols. */
6873
6874void
6875bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6876 struct bfd_link_info *link_info)
6877{
6878 asection *sec;
6879 struct elf32_arm_link_hash_table *globals;
6880 char *tmp_name;
906e58ca 6881
c7b8f16e
JB		 6882 if (link_info->relocatable)
6883 return;
2e6030b9
MS		 6884
6885 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6886 if (! is_arm_elf (abfd))
2e6030b9
MS		 6887 return;
6888
c7b8f16e 6889 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6890 if (globals == NULL)
6891 return;
906e58ca 6892
21d799b5 6893 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 6894 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6895
6896 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6897 {
6898 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6899 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6900
c7b8f16e 6901 for (; errnode != NULL; errnode = errnode->next)
99059e56
RM		 6902 {
6903 struct elf_link_hash_entry *myh;
6904 bfd_vma vma;
6905
6906 switch (errnode->type)
6907 {
6908 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6909 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6910 /* Find veneer symbol. */
6911 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
c7b8f16e
JB		 6912 errnode->u.b.veneer->u.v.id);
6913
99059e56
RM		 6914 myh = elf_link_hash_lookup
6915 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6916
99059e56
RM		 6917 if (myh == NULL)
6918 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6919 "`%s'"), abfd, tmp_name);
c7b8f16e 6920
99059e56
RM		 6921 vma = myh->root.u.def.section->output_section->vma
6922 + myh->root.u.def.section->output_offset
6923 + myh->root.u.def.value;
c7b8f16e 6924
99059e56
RM		 6925 errnode->u.b.veneer->vma = vma;
6926 break;
c7b8f16e
JB		 6927
6928 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 6929 case VFP11_ERRATUM_THUMB_VENEER:
6930 /* Find return location. */
6931 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6932 errnode->u.v.id);
c7b8f16e 6933
99059e56
RM		 6934 myh = elf_link_hash_lookup
6935 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6936
99059e56
RM		 6937 if (myh == NULL)
6938 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
c7b8f16e
JB		 6939 "`%s'"), abfd, tmp_name);
6940
99059e56
RM		 6941 vma = myh->root.u.def.section->output_section->vma
6942 + myh->root.u.def.section->output_offset
6943 + myh->root.u.def.value;
c7b8f16e 6944
99059e56
RM		 6945 errnode->u.v.branch->vma = vma;
6946 break;
906e58ca 6947
99059e56
RM		 6948 default:
6949 abort ();
6950 }
6951 }
c7b8f16e 6952 }
906e58ca 6953
c7b8f16e
JB		 6954 free (tmp_name);
6955}
6956
6957
eb043451
PB		 6958/* Set target relocation values needed during linking. */
6959
6960void
bf21ed78
MS		 6961bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6962 struct bfd_link_info *link_info,
eb043451 6963 int target1_is_rel,
319850b4 6964 char * target2_type,
99059e56 6965 int fix_v4bx,
c7b8f16e 6966 int use_blx,
99059e56 6967 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6968 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 6969 int pic_veneer, int fix_cortex_a8,
6970 int fix_arm1176)
eb043451
PB		 6971{
6972 struct elf32_arm_link_hash_table *globals;
6973
6974 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6975 if (globals == NULL)
6976 return;
eb043451
PB		 6977
6978 globals->target1_is_rel = target1_is_rel;
6979 if (strcmp (target2_type, "rel") == 0)
6980 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6981 else if (strcmp (target2_type, "abs") == 0)
6982 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6983 else if (strcmp (target2_type, "got-rel") == 0)
6984 globals->target2_reloc = R_ARM_GOT_PREL;
6985 else
6986 {
6987 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6988 target2_type);
6989 }
319850b4 6990 globals->fix_v4bx = fix_v4bx;
33bfe774 6991 globals->use_blx |= use_blx;
c7b8f16e 6992 globals->vfp11_fix = vfp11_fix;
27e55c4d 6993 globals->pic_veneer = pic_veneer;
48229727 6994 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 6995 globals->fix_arm1176 = fix_arm1176;
bf21ed78 6996
0ffa91dd
NC		 6997 BFD_ASSERT (is_arm_elf (output_bfd));
6998 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6999 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 7000}
eb043451 7001
12a0a0fd 7002/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 7003
12a0a0fd
PB		 7004static void
7005insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7006{
7007 bfd_vma upper;
7008 bfd_vma lower;
7009 int reloc_sign;
7010
7011 BFD_ASSERT ((offset & 1) == 0);
7012
7013 upper = bfd_get_16 (abfd, insn);
7014 lower = bfd_get_16 (abfd, insn + 2);
7015 reloc_sign = (offset < 0) ? 1 : 0;
7016 upper = (upper & ~(bfd_vma) 0x7ff)
7017 | ((offset >> 12) & 0x3ff)
7018 | (reloc_sign << 10);
906e58ca 7019 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 7020 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7021 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7022 | ((offset >> 1) & 0x7ff);
7023 bfd_put_16 (abfd, upper, insn);
7024 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 7025}
7026
9b485d32
NC		 7027/* Thumb code calling an ARM function. */
7028
252b5132 7029static int
57e8b36a
NC		 7030elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7031 const char * name,
7032 bfd * input_bfd,
7033 bfd * output_bfd,
7034 asection * input_section,
7035 bfd_byte * hit_data,
7036 asection * sym_sec,
7037 bfd_vma offset,
7038 bfd_signed_vma addend,
f2a9dd69
DJ		 7039 bfd_vma val,
7040 char **error_message)
252b5132 7041{
bcbdc74c 7042 asection * s = 0;
dc810e39 7043 bfd_vma my_offset;
252b5132 7044 long int ret_offset;
bcbdc74c
NC		 7045 struct elf_link_hash_entry * myh;
7046 struct elf32_arm_link_hash_table * globals;
252b5132 7047
f2a9dd69 7048 myh = find_thumb_glue (info, name, error_message);
252b5132 7049 if (myh == NULL)
b34976b6 7050 return FALSE;
252b5132
RH		 7051
7052 globals = elf32_arm_hash_table (info);
252b5132
RH		 7053 BFD_ASSERT (globals != NULL);
7054 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7055
7056 my_offset = myh->root.u.def.value;
7057
3d4d4302
AM		 7058 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7059 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7060
7061 BFD_ASSERT (s != NULL);
7062 BFD_ASSERT (s->contents != NULL);
7063 BFD_ASSERT (s->output_section != NULL);
7064
7065 if ((my_offset & 0x01) == 0x01)
7066 {
7067 if (sym_sec != NULL
7068 && sym_sec->owner != NULL
7069 && !INTERWORK_FLAG (sym_sec->owner))
7070 {
8f615d07 7071 (*_bfd_error_handler)
d003868e 7072 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7073 " first occurrence: %B: Thumb call to ARM"),
d003868e 7074 sym_sec->owner, input_bfd, name);
252b5132 7075
b34976b6 7076 return FALSE;
252b5132
RH		 7077 }
7078
7079 --my_offset;
7080 myh->root.u.def.value = my_offset;
7081
52ab56c2
PB		 7082 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7083 s->contents + my_offset);
252b5132 7084
52ab56c2
PB		 7085 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7086 s->contents + my_offset + 2);
252b5132
RH		 7087
7088 ret_offset =
9b485d32
NC		 7089 /* Address of destination of the stub. */
7090 ((bfd_signed_vma) val)
252b5132 7091 - ((bfd_signed_vma)
57e8b36a
NC		 7092 /* Offset from the start of the current section
7093 to the start of the stubs. */
9b485d32
NC		 7094 (s->output_offset
7095 /* Offset of the start of this stub from the start of the stubs. */
7096 + my_offset
7097 /* Address of the start of the current section. */
7098 + s->output_section->vma)
7099 /* The branch instruction is 4 bytes into the stub. */
7100 + 4
7101 /* ARM branches work from the pc of the instruction + 8. */
7102 + 8);
252b5132 7103
52ab56c2
PB		 7104 put_arm_insn (globals, output_bfd,
7105 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7106 s->contents + my_offset + 4);
252b5132
RH		 7107 }
7108
7109 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7110
427bfd90
NC		 7111 /* Now go back and fix up the original BL insn to point to here. */
7112 ret_offset =
7113 /* Address of where the stub is located. */
7114 (s->output_section->vma + s->output_offset + my_offset)
7115 /* Address of where the BL is located. */
57e8b36a
NC		 7116 - (input_section->output_section->vma + input_section->output_offset
7117 + offset)
427bfd90
NC		 7118 /* Addend in the relocation. */
7119 - addend
7120 /* Biassing for PC-relative addressing. */
7121 - 8;
252b5132 7122
12a0a0fd 7123 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7124
b34976b6 7125 return TRUE;
252b5132
RH		 7126}
7127
a4fd1a8e 7128/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7129
a4fd1a8e
PB		 7130static struct elf_link_hash_entry *
7131elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7132 const char * name,
7133 bfd * input_bfd,
7134 bfd * output_bfd,
7135 asection * sym_sec,
7136 bfd_vma val,
8029a119
NC		 7137 asection * s,
7138 char ** error_message)
252b5132 7139{
dc810e39 7140 bfd_vma my_offset;
252b5132 7141 long int ret_offset;
bcbdc74c
NC		 7142 struct elf_link_hash_entry * myh;
7143 struct elf32_arm_link_hash_table * globals;
252b5132 7144
f2a9dd69 7145 myh = find_arm_glue (info, name, error_message);
252b5132 7146 if (myh == NULL)
a4fd1a8e 7147 return NULL;
252b5132
RH		 7148
7149 globals = elf32_arm_hash_table (info);
252b5132
RH		 7150 BFD_ASSERT (globals != NULL);
7151 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7152
7153 my_offset = myh->root.u.def.value;
252b5132
RH		 7154
7155 if ((my_offset & 0x01) == 0x01)
7156 {
7157 if (sym_sec != NULL
7158 && sym_sec->owner != NULL
7159 && !INTERWORK_FLAG (sym_sec->owner))
7160 {
8f615d07 7161 (*_bfd_error_handler)
d003868e
AM		 7162 (_("%B(%s): warning: interworking not enabled.\n"
7163 " first occurrence: %B: arm call to thumb"),
7164 sym_sec->owner, input_bfd, name);
252b5132 7165 }
9b485d32 7166
252b5132
RH		 7167 --my_offset;
7168 myh->root.u.def.value = my_offset;
7169
27e55c4d
PB		 7170 if (info->shared || globals->root.is_relocatable_executable
7171 || globals->pic_veneer)
8f6277f5
PB		 7172 {
7173 /* For relocatable objects we can't use absolute addresses,
7174 so construct the address from a relative offset. */
7175 /* TODO: If the offset is small it's probably worth
7176 constructing the address with adds. */
52ab56c2
PB		 7177 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7178 s->contents + my_offset);
7179 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7180 s->contents + my_offset + 4);
7181 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7182 s->contents + my_offset + 8);
8f6277f5
PB		 7183 /* Adjust the offset by 4 for the position of the add,
7184 and 8 for the pipeline offset. */
7185 ret_offset = (val - (s->output_offset
7186 + s->output_section->vma
7187 + my_offset + 12))
7188 | 1;
7189 bfd_put_32 (output_bfd, ret_offset,
7190 s->contents + my_offset + 12);
7191 }
26079076
PB		 7192 else if (globals->use_blx)
7193 {
7194 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7195 s->contents + my_offset);
7196
7197 /* It's a thumb address. Add the low order bit. */
7198 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7199 s->contents + my_offset + 4);
7200 }
8f6277f5
PB		 7201 else
7202 {
52ab56c2
PB		 7203 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7204 s->contents + my_offset);
252b5132 7205
52ab56c2
PB		 7206 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7207 s->contents + my_offset + 4);
252b5132 7208
8f6277f5
PB		 7209 /* It's a thumb address. Add the low order bit. */
7210 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7211 s->contents + my_offset + 8);
8029a119
NC		 7212
7213 my_offset += 12;
8f6277f5 7214 }
252b5132
RH		 7215 }
7216
7217 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7218
a4fd1a8e
PB		 7219 return myh;
7220}
7221
7222/* Arm code calling a Thumb function. */
7223
7224static int
7225elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7226 const char * name,
7227 bfd * input_bfd,
7228 bfd * output_bfd,
7229 asection * input_section,
7230 bfd_byte * hit_data,
7231 asection * sym_sec,
7232 bfd_vma offset,
7233 bfd_signed_vma addend,
f2a9dd69
DJ		 7234 bfd_vma val,
7235 char **error_message)
a4fd1a8e
PB		 7236{
7237 unsigned long int tmp;
7238 bfd_vma my_offset;
7239 asection * s;
7240 long int ret_offset;
7241 struct elf_link_hash_entry * myh;
7242 struct elf32_arm_link_hash_table * globals;
7243
7244 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7245 BFD_ASSERT (globals != NULL);
7246 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7247
3d4d4302
AM		 7248 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7249 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7250 BFD_ASSERT (s != NULL);
7251 BFD_ASSERT (s->contents != NULL);
7252 BFD_ASSERT (s->output_section != NULL);
7253
7254 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7255 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7256 if (!myh)
7257 return FALSE;
7258
7259 my_offset = myh->root.u.def.value;
252b5132
RH		 7260 tmp = bfd_get_32 (input_bfd, hit_data);
7261 tmp = tmp & 0xFF000000;
7262
9b485d32 7263 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7264 ret_offset = (s->output_offset
7265 + my_offset
7266 + s->output_section->vma
7267 - (input_section->output_offset
7268 + input_section->output_section->vma
7269 + offset + addend)
7270 - 8);
9a5aca8c 7271
252b5132
RH		 7272 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7273
dc810e39 7274 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7275
b34976b6 7276 return TRUE;
252b5132
RH		 7277}
7278
a4fd1a8e
PB		 7279/* Populate Arm stub for an exported Thumb function. */
7280
7281static bfd_boolean
7282elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7283{
7284 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7285 asection * s;
7286 struct elf_link_hash_entry * myh;
7287 struct elf32_arm_link_hash_entry *eh;
7288 struct elf32_arm_link_hash_table * globals;
7289 asection *sec;
7290 bfd_vma val;
f2a9dd69 7291 char *error_message;
a4fd1a8e 7292
906e58ca 7293 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7294 /* Allocate stubs for exported Thumb functions on v4t. */
7295 if (eh->export_glue == NULL)
7296 return TRUE;
7297
7298 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7299 BFD_ASSERT (globals != NULL);
7300 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7301
3d4d4302
AM		 7302 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7303 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7304 BFD_ASSERT (s != NULL);
7305 BFD_ASSERT (s->contents != NULL);
7306 BFD_ASSERT (s->output_section != NULL);
7307
7308 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7309
7310 BFD_ASSERT (sec->output_section != NULL);
7311
a4fd1a8e
PB		 7312 val = eh->export_glue->root.u.def.value + sec->output_offset
7313 + sec->output_section->vma;
8029a119 7314
a4fd1a8e
PB		 7315 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7316 h->root.u.def.section->owner,
f2a9dd69
DJ		 7317 globals->obfd, sec, val, s,
7318 &error_message);
a4fd1a8e
PB		 7319 BFD_ASSERT (myh);
7320 return TRUE;
7321}
7322
845b51d6
PB		 7323/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7324
7325static bfd_vma
7326elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7327{
7328 bfd_byte *p;
7329 bfd_vma glue_addr;
7330 asection *s;
7331 struct elf32_arm_link_hash_table *globals;
7332
7333 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7334 BFD_ASSERT (globals != NULL);
7335 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7336
3d4d4302
AM		 7337 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7338 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7339 BFD_ASSERT (s != NULL);
7340 BFD_ASSERT (s->contents != NULL);
7341 BFD_ASSERT (s->output_section != NULL);
7342
7343 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7344
7345 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7346
7347 if ((globals->bx_glue_offset[reg] & 1) == 0)
7348 {
7349 p = s->contents + glue_addr;
7350 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7351 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7352 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7353 globals->bx_glue_offset[reg] |= 1;
7354 }
7355
7356 return glue_addr + s->output_section->vma + s->output_offset;
7357}
7358
a4fd1a8e
PB		 7359/* Generate Arm stubs for exported Thumb symbols. */
7360static void
906e58ca 7361elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7362 struct bfd_link_info *link_info)
7363{
7364 struct elf32_arm_link_hash_table * globals;
7365
8029a119
NC		 7366 if (link_info == NULL)
7367 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7368 return;
7369
7370 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7371 if (globals == NULL)
7372 return;
7373
84c08195
PB		 7374 /* If blx is available then exported Thumb symbols are OK and there is
7375 nothing to do. */
a4fd1a8e
PB		 7376 if (globals->use_blx)
7377 return;
7378
7379 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7380 link_info);
7381}
7382
47beaa6a
RS		 7383/* Reserve space for COUNT dynamic relocations in relocation selection
7384 SRELOC. */
7385
7386static void
7387elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7388 bfd_size_type count)
7389{
7390 struct elf32_arm_link_hash_table *htab;
7391
7392 htab = elf32_arm_hash_table (info);
7393 BFD_ASSERT (htab->root.dynamic_sections_created);
7394 if (sreloc == NULL)
7395 abort ();
7396 sreloc->size += RELOC_SIZE (htab) * count;
7397}
7398
34e77a92
RS		 7399/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7400 dynamic, the relocations should go in SRELOC, otherwise they should
7401 go in the special .rel.iplt section. */
7402
7403static void
7404elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7405 bfd_size_type count)
7406{
7407 struct elf32_arm_link_hash_table *htab;
7408
7409 htab = elf32_arm_hash_table (info);
7410 if (!htab->root.dynamic_sections_created)
7411 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7412 else
7413 {
7414 BFD_ASSERT (sreloc != NULL);
7415 sreloc->size += RELOC_SIZE (htab) * count;
7416 }
7417}
7418
47beaa6a
RS		 7419/* Add relocation REL to the end of relocation section SRELOC. */
7420
7421static void
7422elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7423 asection *sreloc, Elf_Internal_Rela *rel)
7424{
7425 bfd_byte *loc;
7426 struct elf32_arm_link_hash_table *htab;
7427
7428 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7429 if (!htab->root.dynamic_sections_created
7430 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7431 sreloc = htab->root.irelplt;
47beaa6a
RS		 7432 if (sreloc == NULL)
7433 abort ();
7434 loc = sreloc->contents;
7435 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7436 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7437 abort ();
7438 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7439}
7440
34e77a92
RS		 7441/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7442 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7443 to .plt. */
7444
7445static void
7446elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7447 bfd_boolean is_iplt_entry,
7448 union gotplt_union *root_plt,
7449 struct arm_plt_info *arm_plt)
7450{
7451 struct elf32_arm_link_hash_table *htab;
7452 asection *splt;
7453 asection *sgotplt;
7454
7455 htab = elf32_arm_hash_table (info);
7456
7457 if (is_iplt_entry)
7458 {
7459 splt = htab->root.iplt;
7460 sgotplt = htab->root.igotplt;
7461
99059e56
RM		 7462 /* NaCl uses a special first entry in .iplt too. */
7463 if (htab->nacl_p && splt->size == 0)
7464 splt->size += htab->plt_header_size;
7465
34e77a92
RS		 7466 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7467 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7468 }
7469 else
7470 {
7471 splt = htab->root.splt;
7472 sgotplt = htab->root.sgotplt;
7473
7474 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7475 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7476
7477 /* If this is the first .plt entry, make room for the special
7478 first entry. */
7479 if (splt->size == 0)
7480 splt->size += htab->plt_header_size;
7481 }
7482
7483 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7484 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7485 splt->size += PLT_THUMB_STUB_SIZE;
7486 root_plt->offset = splt->size;
7487 splt->size += htab->plt_entry_size;
7488
7489 if (!htab->symbian_p)
7490 {
7491 /* We also need to make an entry in the .got.plt section, which
7492 will be placed in the .got section by the linker script. */
7493 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7494 sgotplt->size += 4;
7495 }
7496}
7497
b38cadfb
NC		 7498static bfd_vma
7499arm_movw_immediate (bfd_vma value)
7500{
7501 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7502}
7503
7504static bfd_vma
7505arm_movt_immediate (bfd_vma value)
7506{
7507 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7508}
7509
34e77a92
RS		 7510/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7511 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7512 Otherwise, DYNINDX is the index of the symbol in the dynamic
7513 symbol table and SYM_VALUE is undefined.
7514
7515 ROOT_PLT points to the offset of the PLT entry from the start of its
7516 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
57460bcf 7517 bookkeeping information.
34e77a92 7518
57460bcf
NC		 7519 Returns FALSE if there was a problem. */
7520
7521static bfd_boolean
34e77a92
RS		 7522elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7523 union gotplt_union *root_plt,
7524 struct arm_plt_info *arm_plt,
7525 int dynindx, bfd_vma sym_value)
7526{
7527 struct elf32_arm_link_hash_table *htab;
7528 asection *sgot;
7529 asection *splt;
7530 asection *srel;
7531 bfd_byte *loc;
7532 bfd_vma plt_index;
7533 Elf_Internal_Rela rel;
7534 bfd_vma plt_header_size;
7535 bfd_vma got_header_size;
7536
7537 htab = elf32_arm_hash_table (info);
7538
7539 /* Pick the appropriate sections and sizes. */
7540 if (dynindx == -1)
7541 {
7542 splt = htab->root.iplt;
7543 sgot = htab->root.igotplt;
7544 srel = htab->root.irelplt;
7545
7546 /* There are no reserved entries in .igot.plt, and no special
7547 first entry in .iplt. */
7548 got_header_size = 0;
7549 plt_header_size = 0;
7550 }
7551 else
7552 {
7553 splt = htab->root.splt;
7554 sgot = htab->root.sgotplt;
7555 srel = htab->root.srelplt;
7556
7557 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7558 plt_header_size = htab->plt_header_size;
7559 }
7560 BFD_ASSERT (splt != NULL && srel != NULL);
7561
7562 /* Fill in the entry in the procedure linkage table. */
7563 if (htab->symbian_p)
7564 {
7565 BFD_ASSERT (dynindx >= 0);
7566 put_arm_insn (htab, output_bfd,
7567 elf32_arm_symbian_plt_entry[0],
7568 splt->contents + root_plt->offset);
7569 bfd_put_32 (output_bfd,
7570 elf32_arm_symbian_plt_entry[1],
7571 splt->contents + root_plt->offset + 4);
7572
7573 /* Fill in the entry in the .rel.plt section. */
7574 rel.r_offset = (splt->output_section->vma
7575 + splt->output_offset
7576 + root_plt->offset + 4);
7577 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7578
7579 /* Get the index in the procedure linkage table which
7580 corresponds to this symbol. This is the index of this symbol
7581 in all the symbols for which we are making plt entries. The
7582 first entry in the procedure linkage table is reserved. */
7583 plt_index = ((root_plt->offset - plt_header_size)
7584 / htab->plt_entry_size);
7585 }
7586 else
7587 {
7588 bfd_vma got_offset, got_address, plt_address;
7589 bfd_vma got_displacement, initial_got_entry;
7590 bfd_byte * ptr;
7591
7592 BFD_ASSERT (sgot != NULL);
7593
7594 /* Get the offset into the .(i)got.plt table of the entry that
7595 corresponds to this function. */
7596 got_offset = (arm_plt->got_offset & -2);
7597
7598 /* Get the index in the procedure linkage table which
7599 corresponds to this symbol. This is the index of this symbol
7600 in all the symbols for which we are making plt entries.
7601 After the reserved .got.plt entries, all symbols appear in
7602 the same order as in .plt. */
7603 plt_index = (got_offset - got_header_size) / 4;
7604
7605 /* Calculate the address of the GOT entry. */
7606 got_address = (sgot->output_section->vma
7607 + sgot->output_offset
7608 + got_offset);
7609
7610 /* ...and the address of the PLT entry. */
7611 plt_address = (splt->output_section->vma
7612 + splt->output_offset
7613 + root_plt->offset);
7614
7615 ptr = splt->contents + root_plt->offset;
7616 if (htab->vxworks_p && info->shared)
7617 {
7618 unsigned int i;
7619 bfd_vma val;
7620
7621 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7622 {
7623 val = elf32_arm_vxworks_shared_plt_entry[i];
7624 if (i == 2)
7625 val |= got_address - sgot->output_section->vma;
7626 if (i == 5)
7627 val |= plt_index * RELOC_SIZE (htab);
7628 if (i == 2 || i == 5)
7629 bfd_put_32 (output_bfd, val, ptr);
7630 else
7631 put_arm_insn (htab, output_bfd, val, ptr);
7632 }
7633 }
7634 else if (htab->vxworks_p)
7635 {
7636 unsigned int i;
7637 bfd_vma val;
7638
7639 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7640 {
7641 val = elf32_arm_vxworks_exec_plt_entry[i];
7642 if (i == 2)
7643 val |= got_address;
7644 if (i == 4)
7645 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7646 if (i == 5)
7647 val |= plt_index * RELOC_SIZE (htab);
7648 if (i == 2 || i == 5)
7649 bfd_put_32 (output_bfd, val, ptr);
7650 else
7651 put_arm_insn (htab, output_bfd, val, ptr);
7652 }
7653
7654 loc = (htab->srelplt2->contents
7655 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7656
7657 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7658 referencing the GOT for this PLT entry. */
7659 rel.r_offset = plt_address + 8;
7660 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7661 rel.r_addend = got_offset;
7662 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7663 loc += RELOC_SIZE (htab);
7664
7665 /* Create the R_ARM_ABS32 relocation referencing the
7666 beginning of the PLT for this GOT entry. */
7667 rel.r_offset = got_address;
7668 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7669 rel.r_addend = 0;
7670 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7671 }
b38cadfb
NC		 7672 else if (htab->nacl_p)
7673 {
7674 /* Calculate the displacement between the PLT slot and the
7675 common tail that's part of the special initial PLT slot. */
6034aab8 7676 int32_t tail_displacement
b38cadfb
NC		 7677 = ((splt->output_section->vma + splt->output_offset
7678 + ARM_NACL_PLT_TAIL_OFFSET)
7679 - (plt_address + htab->plt_entry_size + 4));
7680 BFD_ASSERT ((tail_displacement & 3) == 0);
7681 tail_displacement >>= 2;
7682
7683 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7684 || (-tail_displacement & 0xff000000) == 0);
7685
7686 /* Calculate the displacement between the PLT slot and the entry
7687 in the GOT. The offset accounts for the value produced by
7688 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8 7689 got_displacement = (got_address
99059e56 7690 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7691
7692 /* NaCl does not support interworking at all. */
7693 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7694
7695 put_arm_insn (htab, output_bfd,
7696 elf32_arm_nacl_plt_entry[0]
7697 | arm_movw_immediate (got_displacement),
7698 ptr + 0);
7699 put_arm_insn (htab, output_bfd,
7700 elf32_arm_nacl_plt_entry[1]
7701 | arm_movt_immediate (got_displacement),
7702 ptr + 4);
7703 put_arm_insn (htab, output_bfd,
7704 elf32_arm_nacl_plt_entry[2],
7705 ptr + 8);
7706 put_arm_insn (htab, output_bfd,
7707 elf32_arm_nacl_plt_entry[3]
7708 | (tail_displacement & 0x00ffffff),
7709 ptr + 12);
7710 }
57460bcf
NC		 7711 else if (using_thumb_only (htab))
7712 {
7713 /* PR ld/16017: Do not generate ARM instructions for
7714 the PLT if compiling for a thumb-only target.
7715
7716 FIXME: We ought to be able to generate thumb PLT instructions... */
7717 _bfd_error_handler (_("%B: Warning: thumb mode PLT generation not currently supported"),
7718 output_bfd);
7719 return FALSE;
7720 }
34e77a92
RS		 7721 else
7722 {
7723 /* Calculate the displacement between the PLT slot and the
7724 entry in the GOT. The eight-byte offset accounts for the
7725 value produced by adding to pc in the first instruction
7726 of the PLT stub. */
7727 got_displacement = got_address - (plt_address + 8);
7728
34e77a92
RS		 7729 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7730 {
7731 put_thumb_insn (htab, output_bfd,
7732 elf32_arm_plt_thumb_stub[0], ptr - 4);
7733 put_thumb_insn (htab, output_bfd,
7734 elf32_arm_plt_thumb_stub[1], ptr - 2);
7735 }
7736
1db37fe6
YG		 7737 if (!elf32_arm_use_long_plt_entry)
7738 {
7739 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7740
7741 put_arm_insn (htab, output_bfd,
7742 elf32_arm_plt_entry_short[0]
7743 | ((got_displacement & 0x0ff00000) >> 20),
7744 ptr + 0);
7745 put_arm_insn (htab, output_bfd,
7746 elf32_arm_plt_entry_short[1]
7747 | ((got_displacement & 0x000ff000) >> 12),
7748 ptr+ 4);
7749 put_arm_insn (htab, output_bfd,
7750 elf32_arm_plt_entry_short[2]
7751 | (got_displacement & 0x00000fff),
7752 ptr + 8);
34e77a92 7753#ifdef FOUR_WORD_PLT
1db37fe6 7754 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
34e77a92 7755#endif
1db37fe6
YG		 7756 }
7757 else
7758 {
7759 put_arm_insn (htab, output_bfd,
7760 elf32_arm_plt_entry_long[0]
7761 | ((got_displacement & 0xf0000000) >> 28),
7762 ptr + 0);
7763 put_arm_insn (htab, output_bfd,
7764 elf32_arm_plt_entry_long[1]
7765 | ((got_displacement & 0x0ff00000) >> 20),
7766 ptr + 4);
7767 put_arm_insn (htab, output_bfd,
7768 elf32_arm_plt_entry_long[2]
7769 | ((got_displacement & 0x000ff000) >> 12),
7770 ptr+ 8);
7771 put_arm_insn (htab, output_bfd,
7772 elf32_arm_plt_entry_long[3]
7773 | (got_displacement & 0x00000fff),
7774 ptr + 12);
7775 }
34e77a92
RS		 7776 }
7777
7778 /* Fill in the entry in the .rel(a).(i)plt section. */
7779 rel.r_offset = got_address;
7780 rel.r_addend = 0;
7781 if (dynindx == -1)
7782 {
7783 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7784 The dynamic linker or static executable then calls SYM_VALUE
7785 to determine the correct run-time value of the .igot.plt entry. */
7786 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7787 initial_got_entry = sym_value;
7788 }
7789 else
7790 {
7791 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7792 initial_got_entry = (splt->output_section->vma
7793 + splt->output_offset);
7794 }
7795
7796 /* Fill in the entry in the global offset table. */
7797 bfd_put_32 (output_bfd, initial_got_entry,
7798 sgot->contents + got_offset);
7799 }
7800
aba8c3de
WN		 7801 if (dynindx == -1)
7802 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7803 else
7804 {
7805 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7806 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7807 }
57460bcf
NC		 7808
7809 return TRUE;
34e77a92
RS		 7810}
7811
eb043451
PB		 7812/* Some relocations map to different relocations depending on the
7813 target. Return the real relocation. */
8029a119 7814
eb043451
PB		 7815static int
7816arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7817 int r_type)
7818{
7819 switch (r_type)
7820 {
7821 case R_ARM_TARGET1:
7822 if (globals->target1_is_rel)
7823 return R_ARM_REL32;
7824 else
7825 return R_ARM_ABS32;
7826
7827 case R_ARM_TARGET2:
7828 return globals->target2_reloc;
7829
7830 default:
7831 return r_type;
7832 }
7833}
eb043451 7834
ba93b8ac
DJ		 7835/* Return the base VMA address which should be subtracted from real addresses
7836 when resolving @dtpoff relocation.
7837 This is PT_TLS segment p_vaddr. */
7838
7839static bfd_vma
7840dtpoff_base (struct bfd_link_info *info)
7841{
7842 /* If tls_sec is NULL, we should have signalled an error already. */
7843 if (elf_hash_table (info)->tls_sec == NULL)
7844 return 0;
7845 return elf_hash_table (info)->tls_sec->vma;
7846}
7847
7848/* Return the relocation value for @tpoff relocation
7849 if STT_TLS virtual address is ADDRESS. */
7850
7851static bfd_vma
7852tpoff (struct bfd_link_info *info, bfd_vma address)
7853{
7854 struct elf_link_hash_table *htab = elf_hash_table (info);
7855 bfd_vma base;
7856
7857 /* If tls_sec is NULL, we should have signalled an error already. */
7858 if (htab->tls_sec == NULL)
7859 return 0;
7860 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7861 return address - htab->tls_sec->vma + base;
7862}
7863
00a97672
RS		 7864/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7865 VALUE is the relocation value. */
7866
7867static bfd_reloc_status_type
7868elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7869{
7870 if (value > 0xfff)
7871 return bfd_reloc_overflow;
7872
7873 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7874 bfd_put_32 (abfd, value, data);
7875 return bfd_reloc_ok;
7876}
7877
0855e32b
NS		 7878/* Handle TLS relaxations. Relaxing is possible for symbols that use
7879 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7880 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7881
7882 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7883 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7884 case of error.
7885
7886 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7887 the pre-relaxed code. It would be nice if the relocs were updated
7888 to match the optimization. */
0855e32b 7889
b38cadfb 7890static bfd_reloc_status_type
0855e32b 7891elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7892 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7893 Elf_Internal_Rela *rel, unsigned long is_local)
7894{
7895 unsigned long insn;
b38cadfb 7896
0855e32b
NS		 7897 switch (ELF32_R_TYPE (rel->r_info))
7898 {
7899 default:
7900 return bfd_reloc_notsupported;
b38cadfb 7901
0855e32b
NS		 7902 case R_ARM_TLS_GOTDESC:
7903 if (is_local)
7904 insn = 0;
7905 else
7906 {
7907 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7908 if (insn & 1)
7909 insn -= 5; /* THUMB */
7910 else
7911 insn -= 8; /* ARM */
7912 }
7913 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7914 return bfd_reloc_continue;
7915
7916 case R_ARM_THM_TLS_DESCSEQ:
7917 /* Thumb insn. */
7918 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7919 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7920 {
7921 if (is_local)
7922 /* nop */
7923 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7924 }
7925 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7926 {
7927 if (is_local)
7928 /* nop */
7929 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7930 else
7931 /* ldr rx,[ry] */
7932 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7933 }
7934 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7935 {
7936 if (is_local)
7937 /* nop */
7938 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7939 else
7940 /* mov r0, rx */
7941 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7942 contents + rel->r_offset);
7943 }
7944 else
7945 {
7946 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7947 /* It's a 32 bit instruction, fetch the rest of it for
7948 error generation. */
7949 insn = (insn << 16)
7950 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7951 (*_bfd_error_handler)
7952 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7953 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7954 return bfd_reloc_notsupported;
7955 }
7956 break;
b38cadfb 7957
0855e32b
NS		 7958 case R_ARM_TLS_DESCSEQ:
7959 /* arm insn. */
7960 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7961 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7962 {
7963 if (is_local)
7964 /* mov rx, ry */
7965 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7966 contents + rel->r_offset);
7967 }
7968 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7969 {
7970 if (is_local)
7971 /* nop */
7972 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7973 else
7974 /* ldr rx,[ry] */
7975 bfd_put_32 (input_bfd, insn & 0xfffff000,
7976 contents + rel->r_offset);
7977 }
7978 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7979 {
7980 if (is_local)
7981 /* nop */
7982 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7983 else
7984 /* mov r0, rx */
7985 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7986 contents + rel->r_offset);
7987 }
7988 else
7989 {
7990 (*_bfd_error_handler)
7991 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7992 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7993 return bfd_reloc_notsupported;
7994 }
7995 break;
7996
7997 case R_ARM_TLS_CALL:
7998 /* GD->IE relaxation, turn the instruction into 'nop' or
7999 'ldr r0, [pc,r0]' */
8000 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8001 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8002 break;
b38cadfb 8003
0855e32b
NS		 8004 case R_ARM_THM_TLS_CALL:
8005 /* GD->IE relaxation */
8006 if (!is_local)
8007 /* add r0,pc; ldr r0, [r0] */
8008 insn = 0x44786800;
8009 else if (arch_has_thumb2_nop (globals))
8010 /* nop.w */
8011 insn = 0xf3af8000;
8012 else
8013 /* nop; nop */
8014 insn = 0xbf00bf00;
b38cadfb 8015
0855e32b
NS		 8016 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8017 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8018 break;
8019 }
8020 return bfd_reloc_ok;
8021}
8022
4962c51a
MS		 8023/* For a given value of n, calculate the value of G_n as required to
8024 deal with group relocations. We return it in the form of an
8025 encoded constant-and-rotation, together with the final residual. If n is
8026 specified as less than zero, then final_residual is filled with the
8027 input value and no further action is performed. */
8028
8029static bfd_vma
8030calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8031{
8032 int current_n;
8033 bfd_vma g_n;
8034 bfd_vma encoded_g_n = 0;
8035 bfd_vma residual = value; /* Also known as Y_n. */
8036
8037 for (current_n = 0; current_n <= n; current_n++)
8038 {
8039 int shift;
8040
8041 /* Calculate which part of the value to mask. */
8042 if (residual == 0)
99059e56 8043 shift = 0;
4962c51a 8044 else
99059e56
RM		 8045 {
8046 int msb;
8047
8048 /* Determine the most significant bit in the residual and
8049 align the resulting value to a 2-bit boundary. */
8050 for (msb = 30; msb >= 0; msb -= 2)
8051 if (residual & (3 << msb))
8052 break;
8053
8054 /* The desired shift is now (msb - 6), or zero, whichever
8055 is the greater. */
8056 shift = msb - 6;
8057 if (shift < 0)
8058 shift = 0;
8059 }
4962c51a
MS		 8060
8061 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8062 g_n = residual & (0xff << shift);
8063 encoded_g_n = (g_n >> shift)
99059e56 8064 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4962c51a
MS		 8065
8066 /* Calculate the residual for the next time around. */
8067 residual &= ~g_n;
8068 }
8069
8070 *final_residual = residual;
8071
8072 return encoded_g_n;
8073}
8074
8075/* Given an ARM instruction, determine whether it is an ADD or a SUB.
8076 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 8077
4962c51a 8078static int
906e58ca 8079identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8080{
8081 int opcode = insn & 0x1e00000;
8082
8083 if (opcode == 1 << 23) /* ADD */
8084 return 1;
8085
8086 if (opcode == 1 << 22) /* SUB */
8087 return -1;
8088
8089 return 0;
8090}
8091
252b5132 8092/* Perform a relocation as part of a final link. */
9b485d32 8093
252b5132 8094static bfd_reloc_status_type
57e8b36a
NC		 8095elf32_arm_final_link_relocate (reloc_howto_type * howto,
8096 bfd * input_bfd,
8097 bfd * output_bfd,
8098 asection * input_section,
8099 bfd_byte * contents,
8100 Elf_Internal_Rela * rel,
8101 bfd_vma value,
8102 struct bfd_link_info * info,
8103 asection * sym_sec,
8104 const char * sym_name,
34e77a92
RS		 8105 unsigned char st_type,
8106 enum arm_st_branch_type branch_type,
0945cdfd 8107 struct elf_link_hash_entry * h,
f2a9dd69 8108 bfd_boolean * unresolved_reloc_p,
8029a119 8109 char ** error_message)
252b5132
RH		 8110{
8111 unsigned long r_type = howto->type;
8112 unsigned long r_symndx;
8113 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8114 bfd_vma * local_got_offsets;
0855e32b 8115 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8116 asection * sgot;
8117 asection * splt;
252b5132 8118 asection * sreloc = NULL;
362d30a1 8119 asection * srelgot;
252b5132 8120 bfd_vma addend;
ba96a88f 8121 bfd_signed_vma signed_addend;
34e77a92
RS		 8122 unsigned char dynreloc_st_type;
8123 bfd_vma dynreloc_value;
ba96a88f 8124 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8125 struct elf32_arm_link_hash_entry *eh;
8126 union gotplt_union *root_plt;
8127 struct arm_plt_info *arm_plt;
8128 bfd_vma plt_offset;
8129 bfd_vma gotplt_offset;
8130 bfd_boolean has_iplt_entry;
f21f3fe0 8131
9c504268 8132 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8133 if (globals == NULL)
8134 return bfd_reloc_notsupported;
9c504268 8135
0ffa91dd
NC		 8136 BFD_ASSERT (is_arm_elf (input_bfd));
8137
8138 /* Some relocation types map to different relocations depending on the
9c504268 8139 target. We pick the right one here. */
eb043451 8140 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8141
8142 /* It is possible to have linker relaxations on some TLS access
8143 models. Update our information here. */
8144 r_type = elf32_arm_tls_transition (info, r_type, h);
8145
eb043451
PB		 8146 if (r_type != howto->type)
8147 howto = elf32_arm_howto_from_type (r_type);
9c504268 8148
cac15327
NC		 8149 /* If the start address has been set, then set the EF_ARM_HASENTRY
8150 flag. Setting this more than once is redundant, but the cost is
8151 not too high, and it keeps the code simple.
99e4ae17 8152
cac15327
NC		 8153 The test is done here, rather than somewhere else, because the
8154 start address is only set just before the final link commences.
8155
8156 Note - if the user deliberately sets a start address of 0, the
8157 flag will not be set. */
8158 if (bfd_get_start_address (output_bfd) != 0)
8159 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8160
34e77a92 8161 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8162 sgot = globals->root.sgot;
252b5132 8163 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8164 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8165
34e77a92
RS		 8166 if (globals->root.dynamic_sections_created)
8167 srelgot = globals->root.srelgot;
8168 else
8169 srelgot = NULL;
8170
252b5132
RH		 8171 r_symndx = ELF32_R_SYM (rel->r_info);
8172
4e7fd91e 8173 if (globals->use_rel)
ba96a88f 8174 {
4e7fd91e
PB		 8175 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8176
8177 if (addend & ((howto->src_mask + 1) >> 1))
8178 {
8179 signed_addend = -1;
8180 signed_addend &= ~ howto->src_mask;
8181 signed_addend |= addend;
8182 }
8183 else
8184 signed_addend = addend;
ba96a88f
NC		 8185 }
8186 else
4e7fd91e 8187 addend = signed_addend = rel->r_addend;
f21f3fe0 8188
39f21624
NC		 8189 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8190 are resolving a function call relocation. */
8191 if (using_thumb_only (globals)
8192 && (r_type == R_ARM_THM_CALL
8193 || r_type == R_ARM_THM_JUMP24)
8194 && branch_type == ST_BRANCH_TO_ARM)
8195 branch_type = ST_BRANCH_TO_THUMB;
8196
34e77a92
RS		 8197 /* Record the symbol information that should be used in dynamic
8198 relocations. */
8199 dynreloc_st_type = st_type;
8200 dynreloc_value = value;
8201 if (branch_type == ST_BRANCH_TO_THUMB)
8202 dynreloc_value |= 1;
8203
8204 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8205 VALUE appropriately for relocations that we resolve at link time. */
8206 has_iplt_entry = FALSE;
8207 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8208 && root_plt->offset != (bfd_vma) -1)
8209 {
8210 plt_offset = root_plt->offset;
8211 gotplt_offset = arm_plt->got_offset;
8212
8213 if (h == NULL || eh->is_iplt)
8214 {
8215 has_iplt_entry = TRUE;
8216 splt = globals->root.iplt;
8217
8218 /* Populate .iplt entries here, because not all of them will
8219 be seen by finish_dynamic_symbol. The lower bit is set if
8220 we have already populated the entry. */
8221 if (plt_offset & 1)
8222 plt_offset--;
8223 else
8224 {
57460bcf
NC		 8225 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8226 -1, dynreloc_value))
8227 root_plt->offset |= 1;
8228 else
8229 return bfd_reloc_notsupported;
34e77a92
RS		 8230 }
8231
8232 /* Static relocations always resolve to the .iplt entry. */
8233 st_type = STT_FUNC;
8234 value = (splt->output_section->vma
8235 + splt->output_offset
8236 + plt_offset);
8237 branch_type = ST_BRANCH_TO_ARM;
8238
8239 /* If there are non-call relocations that resolve to the .iplt
8240 entry, then all dynamic ones must too. */
8241 if (arm_plt->noncall_refcount != 0)
8242 {
8243 dynreloc_st_type = st_type;
8244 dynreloc_value = value;
8245 }
8246 }
8247 else
8248 /* We populate the .plt entry in finish_dynamic_symbol. */
8249 splt = globals->root.splt;
8250 }
8251 else
8252 {
8253 splt = NULL;
8254 plt_offset = (bfd_vma) -1;
8255 gotplt_offset = (bfd_vma) -1;
8256 }
8257
252b5132
RH		 8258 switch (r_type)
8259 {
8260 case R_ARM_NONE:
28a094c2
DJ		 8261 /* We don't need to find a value for this symbol. It's just a
8262 marker. */
8263 *unresolved_reloc_p = FALSE;
252b5132
RH		 8264 return bfd_reloc_ok;
8265
00a97672
RS		 8266 case R_ARM_ABS12:
8267 if (!globals->vxworks_p)
8268 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8269
252b5132
RH		 8270 case R_ARM_PC24:
8271 case R_ARM_ABS32:
bb224fc3 8272 case R_ARM_ABS32_NOI:
252b5132 8273 case R_ARM_REL32:
bb224fc3 8274 case R_ARM_REL32_NOI:
5b5bb741
PB		 8275 case R_ARM_CALL:
8276 case R_ARM_JUMP24:
dfc5f959 8277 case R_ARM_XPC25:
eb043451 8278 case R_ARM_PREL31:
7359ea65 8279 case R_ARM_PLT32:
7359ea65
DJ		 8280 /* Handle relocations which should use the PLT entry. ABS32/REL32
8281 will use the symbol's value, which may point to a PLT entry, but we
8282 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8283 branches in this object should go to it, except if the PLT is too
8284 far away, in which case a long branch stub should be inserted. */
bb224fc3 8285 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
99059e56 8286 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8287 && r_type != R_ARM_CALL
8288 && r_type != R_ARM_JUMP24
8289 && r_type != R_ARM_PLT32)
34e77a92 8290 && plt_offset != (bfd_vma) -1)
7359ea65 8291 {
34e77a92
RS		 8292 /* If we've created a .plt section, and assigned a PLT entry
8293 to this function, it must either be a STT_GNU_IFUNC reference
8294 or not be known to bind locally. In other cases, we should
8295 have cleared the PLT entry by now. */
8296 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8297
8298 value = (splt->output_section->vma
8299 + splt->output_offset
34e77a92 8300 + plt_offset);
0945cdfd 8301 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8302 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8303 contents, rel->r_offset, value,
00a97672 8304 rel->r_addend);
7359ea65
DJ		 8305 }
8306
67687978
PB		 8307 /* When generating a shared object or relocatable executable, these
8308 relocations are copied into the output file to be resolved at
8309 run time. */
8310 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8311 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8312 && !(globals->vxworks_p
3348747a
NS		 8313 && strcmp (input_section->output_section->name,
8314 ".tls_vars") == 0)
bb224fc3 8315 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8316 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8317 && !(input_bfd == globals->stub_bfd
8318 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8319 && (h == NULL
8320 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8321 || h->root.type != bfd_link_hash_undefweak)
8322 && r_type != R_ARM_PC24
5b5bb741
PB		 8323 && r_type != R_ARM_CALL
8324 && r_type != R_ARM_JUMP24
ee06dc07 8325 && r_type != R_ARM_PREL31
7359ea65 8326 && r_type != R_ARM_PLT32)
252b5132 8327 {
947216bf 8328 Elf_Internal_Rela outrel;
b34976b6 8329 bfd_boolean skip, relocate;
f21f3fe0 8330
0945cdfd
DJ		 8331 *unresolved_reloc_p = FALSE;
8332
34e77a92 8333 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8334 {
83bac4b0
NC		 8335 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8336 ! globals->use_rel);
f21f3fe0 8337
83bac4b0 8338 if (sreloc == NULL)
252b5132 8339 return bfd_reloc_notsupported;
252b5132 8340 }
f21f3fe0 8341
b34976b6
AM		 8342 skip = FALSE;
8343 relocate = FALSE;
f21f3fe0 8344
00a97672 8345 outrel.r_addend = addend;
c629eae0
JJ		 8346 outrel.r_offset =
8347 _bfd_elf_section_offset (output_bfd, info, input_section,
8348 rel->r_offset);
8349 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8350 skip = TRUE;
0bb2d96a 8351 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8352 skip = TRUE, relocate = TRUE;
252b5132
RH		 8353 outrel.r_offset += (input_section->output_section->vma
8354 + input_section->output_offset);
f21f3fe0 8355
252b5132 8356 if (skip)
0bb2d96a 8357 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8358 else if (h != NULL
8359 && h->dynindx != -1
7359ea65 8360 && (!info->shared
5e681ec4 8361 || !info->symbolic
f5385ebf 8362 || !h->def_regular))
5e681ec4 8363 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8364 else
8365 {
a16385dc
MM		 8366 int symbol;
8367
5e681ec4 8368 /* This symbol is local, or marked to become local. */
34e77a92 8369 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8370 if (globals->symbian_p)
6366ff1e 8371 {
74541ad4
AM		 8372 asection *osec;
8373
6366ff1e
MM		 8374 /* On Symbian OS, the data segment and text segement
8375 can be relocated independently. Therefore, we
8376 must indicate the segment to which this
8377 relocation is relative. The BPABI allows us to
8378 use any symbol in the right segment; we just use
8379 the section symbol as it is convenient. (We
8380 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8381 will not appear in the dynamic symbol table.)
8382
8383 Note that the dynamic linker ignores the section
8384 symbol value, so we don't subtract osec->vma
8385 from the emitted reloc addend. */
10dbd1f3 8386 if (sym_sec)
74541ad4 8387 osec = sym_sec->output_section;
10dbd1f3 8388 else
74541ad4
AM		 8389 osec = input_section->output_section;
8390 symbol = elf_section_data (osec)->dynindx;
8391 if (symbol == 0)
8392 {
8393 struct elf_link_hash_table *htab = elf_hash_table (info);
8394
8395 if ((osec->flags & SEC_READONLY) == 0
8396 && htab->data_index_section != NULL)
8397 osec = htab->data_index_section;
8398 else
8399 osec = htab->text_index_section;
8400 symbol = elf_section_data (osec)->dynindx;
8401 }
6366ff1e
MM		 8402 BFD_ASSERT (symbol != 0);
8403 }
a16385dc
MM		 8404 else
8405 /* On SVR4-ish systems, the dynamic loader cannot
8406 relocate the text and data segments independently,
8407 so the symbol does not matter. */
8408 symbol = 0;
34e77a92
RS		 8409 if (dynreloc_st_type == STT_GNU_IFUNC)
8410 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8411 to the .iplt entry. Instead, every non-call reference
8412 must use an R_ARM_IRELATIVE relocation to obtain the
8413 correct run-time address. */
8414 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8415 else
8416 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8417 if (globals->use_rel)
8418 relocate = TRUE;
8419 else
34e77a92 8420 outrel.r_addend += dynreloc_value;
252b5132 8421 }
f21f3fe0 8422
47beaa6a 8423 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8424
f21f3fe0 8425 /* If this reloc is against an external symbol, we do not want to
252b5132 8426 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8427 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8428 if (! relocate)
8429 return bfd_reloc_ok;
9a5aca8c 8430
f21f3fe0 8431 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8432 contents, rel->r_offset,
8433 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8434 }
8435 else switch (r_type)
8436 {
00a97672
RS		 8437 case R_ARM_ABS12:
8438 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8439
dfc5f959 8440 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8441 case R_ARM_CALL:
8442 case R_ARM_JUMP24:
8029a119 8443 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8444 case R_ARM_PLT32:
906e58ca 8445 {
906e58ca
NC		 8446 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8447
dfc5f959 8448 if (r_type == R_ARM_XPC25)
252b5132 8449 {
dfc5f959
NC		 8450 /* Check for Arm calling Arm function. */
8451 /* FIXME: Should we translate the instruction into a BL
8452 instruction instead ? */
35fc36a8 8453 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8454 (*_bfd_error_handler)
8455 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8456 input_bfd,
8457 h ? h->root.root.string : "(local)");
dfc5f959 8458 }
155d87d7 8459 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8460 {
8461 /* Check for Arm calling Thumb function. */
35fc36a8 8462 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8463 {
f2a9dd69
DJ		 8464 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8465 output_bfd, input_section,
8466 hit_data, sym_sec, rel->r_offset,
8467 signed_addend, value,
8468 error_message))
8469 return bfd_reloc_ok;
8470 else
8471 return bfd_reloc_dangerous;
dfc5f959 8472 }
252b5132 8473 }
ba96a88f 8474
906e58ca 8475 /* Check if a stub has to be inserted because the
8029a119 8476 destination is too far or we are changing mode. */
155d87d7
CL		 8477 if ( r_type == R_ARM_CALL
8478 || r_type == R_ARM_JUMP24
8479 || r_type == R_ARM_PLT32)
906e58ca 8480 {
fe33d2fa
CL		 8481 enum elf32_arm_stub_type stub_type = arm_stub_none;
8482 struct elf32_arm_link_hash_entry *hash;
8483
8484 hash = (struct elf32_arm_link_hash_entry *) h;
8485 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8486 st_type, &branch_type,
8487 hash, value, sym_sec,
fe33d2fa 8488 input_bfd, sym_name);
5fa9e92f 8489
fe33d2fa 8490 if (stub_type != arm_stub_none)
906e58ca
NC		 8491 {
8492 /* The target is out of reach, so redirect the
8493 branch to the local stub for this function. */
906e58ca
NC		 8494 stub_entry = elf32_arm_get_stub_entry (input_section,
8495 sym_sec, h,
fe33d2fa
CL		 8496 rel, globals,
8497 stub_type);
9cd3e4e5
NC		 8498 {
8499 if (stub_entry != NULL)
8500 value = (stub_entry->stub_offset
8501 + stub_entry->stub_sec->output_offset
8502 + stub_entry->stub_sec->output_section->vma);
8503
8504 if (plt_offset != (bfd_vma) -1)
8505 *unresolved_reloc_p = FALSE;
8506 }
906e58ca 8507 }
fe33d2fa
CL		 8508 else
8509 {
8510 /* If the call goes through a PLT entry, make sure to
8511 check distance to the right destination address. */
34e77a92 8512 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8513 {
8514 value = (splt->output_section->vma
8515 + splt->output_offset
34e77a92 8516 + plt_offset);
fe33d2fa
CL		 8517 *unresolved_reloc_p = FALSE;
8518 /* The PLT entry is in ARM mode, regardless of the
8519 target function. */
35fc36a8 8520 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8521 }
8522 }
906e58ca
NC		 8523 }
8524
dea514f5
PB		 8525 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8526 where:
8527 S is the address of the symbol in the relocation.
8528 P is address of the instruction being relocated.
8529 A is the addend (extracted from the instruction) in bytes.
8530
8531 S is held in 'value'.
8532 P is the base address of the section containing the
8533 instruction plus the offset of the reloc into that
8534 section, ie:
8535 (input_section->output_section->vma +
8536 input_section->output_offset +
8537 rel->r_offset).
8538 A is the addend, converted into bytes, ie:
8539 (signed_addend * 4)
8540
8541 Note: None of these operations have knowledge of the pipeline
8542 size of the processor, thus it is up to the assembler to
8543 encode this information into the addend. */
8544 value -= (input_section->output_section->vma
8545 + input_section->output_offset);
8546 value -= rel->r_offset;
4e7fd91e
PB		 8547 if (globals->use_rel)
8548 value += (signed_addend << howto->size);
8549 else
8550 /* RELA addends do not have to be adjusted by howto->size. */
8551 value += signed_addend;
23080146 8552
dcb5e6e6
NC		 8553 signed_addend = value;
8554 signed_addend >>= howto->rightshift;
9a5aca8c 8555
5ab79981 8556 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8557 the next instruction unless a PLT entry will be created.
77b4f08f 8558 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8559 The jump to the next instruction is optimized as a NOP depending
8560 on the architecture. */
ffcb4889 8561 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8562 && plt_offset == (bfd_vma) -1)
77b4f08f 8563 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8564 {
cd1dac3d
DG		 8565 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8566
8567 if (arch_has_arm_nop (globals))
8568 value |= 0x0320f000;
8569 else
8570 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8571 }
8572 else
59f2c4e7 8573 {
9b485d32 8574 /* Perform a signed range check. */
dcb5e6e6 8575 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8576 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8577 return bfd_reloc_overflow;
9a5aca8c 8578
5ab79981 8579 addend = (value & 2);
39b41c9c 8580
5ab79981
PB		 8581 value = (signed_addend & howto->dst_mask)
8582 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8583
5ab79981
PB		 8584 if (r_type == R_ARM_CALL)
8585 {
155d87d7 8586 /* Set the H bit in the BLX instruction. */
35fc36a8 8587 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8588 {
8589 if (addend)
8590 value |= (1 << 24);
8591 else
8592 value &= ~(bfd_vma)(1 << 24);
8593 }
8594
5ab79981 8595 /* Select the correct instruction (BL or BLX). */
906e58ca 8596 /* Only if we are not handling a BL to a stub. In this
8029a119 8597 case, mode switching is performed by the stub. */
35fc36a8 8598 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8599 value |= (1 << 28);
63e1a0fc 8600 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8601 {
8602 value &= ~(bfd_vma)(1 << 28);
8603 value |= (1 << 24);
8604 }
39b41c9c
PB		 8605 }
8606 }
906e58ca 8607 }
252b5132 8608 break;
f21f3fe0 8609
252b5132
RH		 8610 case R_ARM_ABS32:
8611 value += addend;
35fc36a8 8612 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8613 value |= 1;
8614 break;
f21f3fe0 8615
bb224fc3
MS		 8616 case R_ARM_ABS32_NOI:
8617 value += addend;
8618 break;
8619
252b5132 8620 case R_ARM_REL32:
a8bc6c78 8621 value += addend;
35fc36a8 8622 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8623 value |= 1;
252b5132 8624 value -= (input_section->output_section->vma
62efb346 8625 + input_section->output_offset + rel->r_offset);
252b5132 8626 break;
eb043451 8627
bb224fc3
MS		 8628 case R_ARM_REL32_NOI:
8629 value += addend;
8630 value -= (input_section->output_section->vma
8631 + input_section->output_offset + rel->r_offset);
8632 break;
8633
eb043451
PB		 8634 case R_ARM_PREL31:
8635 value -= (input_section->output_section->vma
8636 + input_section->output_offset + rel->r_offset);
8637 value += signed_addend;
8638 if (! h || h->root.type != bfd_link_hash_undefweak)
8639 {
8029a119 8640 /* Check for overflow. */
eb043451
PB		 8641 if ((value ^ (value >> 1)) & (1 << 30))
8642 return bfd_reloc_overflow;
8643 }
8644 value &= 0x7fffffff;
8645 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8646 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8647 value |= 1;
8648 break;
252b5132 8649 }
f21f3fe0 8650
252b5132
RH		 8651 bfd_put_32 (input_bfd, value, hit_data);
8652 return bfd_reloc_ok;
8653
8654 case R_ARM_ABS8:
fd0fd00c
MJ		 8655 /* PR 16202: Refectch the addend using the correct size. */
8656 if (globals->use_rel)
8657 addend = bfd_get_8 (input_bfd, hit_data);
252b5132 8658 value += addend;
4e67d4ca
DG		 8659
8660 /* There is no way to tell whether the user intended to use a signed or
8661 unsigned addend. When checking for overflow we accept either,
8662 as specified by the AAELF. */
8663 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8664 return bfd_reloc_overflow;
8665
8666 bfd_put_8 (input_bfd, value, hit_data);
8667 return bfd_reloc_ok;
8668
8669 case R_ARM_ABS16:
fd0fd00c
MJ		 8670 /* PR 16202: Refectch the addend using the correct size. */
8671 if (globals->use_rel)
8672 addend = bfd_get_16 (input_bfd, hit_data);
252b5132
RH		 8673 value += addend;
8674
4e67d4ca
DG		 8675 /* See comment for R_ARM_ABS8. */
8676 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8677 return bfd_reloc_overflow;
8678
8679 bfd_put_16 (input_bfd, value, hit_data);
8680 return bfd_reloc_ok;
8681
252b5132 8682 case R_ARM_THM_ABS5:
9b485d32 8683 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8684 if (globals->use_rel)
8685 {
8686 /* Need to refetch addend. */
8687 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8688 /* ??? Need to determine shift amount from operand size. */
8689 addend >>= howto->rightshift;
8690 }
252b5132
RH		 8691 value += addend;
8692
8693 /* ??? Isn't value unsigned? */
8694 if ((long) value > 0x1f || (long) value < -0x10)
8695 return bfd_reloc_overflow;
8696
8697 /* ??? Value needs to be properly shifted into place first. */
8698 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8699 bfd_put_16 (input_bfd, value, hit_data);
8700 return bfd_reloc_ok;
8701
2cab6cc3
MS		 8702 case R_ARM_THM_ALU_PREL_11_0:
8703 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8704 {
8705 bfd_vma insn;
8706 bfd_signed_vma relocation;
8707
8708 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8709 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8710
99059e56
RM		 8711 if (globals->use_rel)
8712 {
8713 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8714 | ((insn & (1 << 26)) >> 15);
8715 if (insn & 0xf00000)
8716 signed_addend = -signed_addend;
8717 }
2cab6cc3
MS		 8718
8719 relocation = value + signed_addend;
79f08007 8720 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8721 + input_section->output_offset
8722 + rel->r_offset);
2cab6cc3 8723
99059e56 8724 value = abs (relocation);
2cab6cc3 8725
99059e56
RM		 8726 if (value >= 0x1000)
8727 return bfd_reloc_overflow;
2cab6cc3
MS		 8728
8729 insn = (insn & 0xfb0f8f00) | (value & 0xff)
99059e56
RM		 8730 | ((value & 0x700) << 4)
8731 | ((value & 0x800) << 15);
8732 if (relocation < 0)
8733 insn |= 0xa00000;
2cab6cc3
MS		 8734
8735 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8736 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8737
99059e56 8738 return bfd_reloc_ok;
2cab6cc3
MS		 8739 }
8740
e1ec24c6
NC		 8741 case R_ARM_THM_PC8:
8742 /* PR 10073: This reloc is not generated by the GNU toolchain,
8743 but it is supported for compatibility with third party libraries
8744 generated by other compilers, specifically the ARM/IAR. */
8745 {
8746 bfd_vma insn;
8747 bfd_signed_vma relocation;
8748
8749 insn = bfd_get_16 (input_bfd, hit_data);
8750
99059e56 8751 if (globals->use_rel)
79f08007 8752 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8753
8754 relocation = value + addend;
79f08007 8755 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8756 + input_section->output_offset
8757 + rel->r_offset);
e1ec24c6 8758
99059e56 8759 value = abs (relocation);
e1ec24c6
NC		 8760
8761 /* We do not check for overflow of this reloc. Although strictly
8762 speaking this is incorrect, it appears to be necessary in order
8763 to work with IAR generated relocs. Since GCC and GAS do not
8764 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8765 a problem for them. */
8766 value &= 0x3fc;
8767
8768 insn = (insn & 0xff00) | (value >> 2);
8769
8770 bfd_put_16 (input_bfd, insn, hit_data);
8771
99059e56 8772 return bfd_reloc_ok;
e1ec24c6
NC		 8773 }
8774
2cab6cc3
MS		 8775 case R_ARM_THM_PC12:
8776 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8777 {
8778 bfd_vma insn;
8779 bfd_signed_vma relocation;
8780
8781 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8782 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8783
99059e56
RM		 8784 if (globals->use_rel)
8785 {
8786 signed_addend = insn & 0xfff;
8787 if (!(insn & (1 << 23)))
8788 signed_addend = -signed_addend;
8789 }
2cab6cc3
MS		 8790
8791 relocation = value + signed_addend;
79f08007 8792 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8793 + input_section->output_offset
8794 + rel->r_offset);
2cab6cc3 8795
99059e56 8796 value = abs (relocation);
2cab6cc3 8797
99059e56
RM		 8798 if (value >= 0x1000)
8799 return bfd_reloc_overflow;
2cab6cc3
MS		 8800
8801 insn = (insn & 0xff7ff000) | value;
99059e56
RM		 8802 if (relocation >= 0)
8803 insn |= (1 << 23);
2cab6cc3
MS		 8804
8805 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8806 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8807
99059e56 8808 return bfd_reloc_ok;
2cab6cc3
MS		 8809 }
8810
dfc5f959 8811 case R_ARM_THM_XPC22:
c19d1205 8812 case R_ARM_THM_CALL:
bd97cb95 8813 case R_ARM_THM_JUMP24:
dfc5f959 8814 /* Thumb BL (branch long instruction). */
252b5132 8815 {
b34976b6 8816 bfd_vma relocation;
99059e56 8817 bfd_vma reloc_sign;
b34976b6
AM		 8818 bfd_boolean overflow = FALSE;
8819 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8820 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8821 bfd_signed_vma reloc_signed_max;
8822 bfd_signed_vma reloc_signed_min;
b34976b6 8823 bfd_vma check;
252b5132 8824 bfd_signed_vma signed_check;
e95de063 8825 int bitsize;
cd1dac3d 8826 const int thumb2 = using_thumb2 (globals);
252b5132 8827
5ab79981 8828 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8829 the next instruction unless a PLT entry will be created.
8830 The jump to the next instruction is optimized as a NOP.W for
8831 Thumb-2 enabled architectures. */
19540007 8832 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8833 && plt_offset == (bfd_vma) -1)
5ab79981 8834 {
cd1dac3d
DG		 8835 if (arch_has_thumb2_nop (globals))
8836 {
8837 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8838 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8839 }
8840 else
8841 {
8842 bfd_put_16 (input_bfd, 0xe000, hit_data);
8843 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8844 }
5ab79981
PB		 8845 return bfd_reloc_ok;
8846 }
8847
e95de063 8848 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
99059e56 8849 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8850 if (globals->use_rel)
8851 {
99059e56
RM		 8852 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8853 bfd_vma upper = upper_insn & 0x3ff;
8854 bfd_vma lower = lower_insn & 0x7ff;
e95de063
MS		 8855 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8856 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
99059e56
RM		 8857 bfd_vma i1 = j1 ^ s ? 0 : 1;
8858 bfd_vma i2 = j2 ^ s ? 0 : 1;
e95de063 8859
99059e56
RM		 8860 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8861 /* Sign extend. */
8862 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
e95de063 8863
4e7fd91e
PB		 8864 signed_addend = addend;
8865 }
cb1afa5c 8866
dfc5f959
NC		 8867 if (r_type == R_ARM_THM_XPC22)
8868 {
8869 /* Check for Thumb to Thumb call. */
8870 /* FIXME: Should we translate the instruction into a BL
8871 instruction instead ? */
35fc36a8 8872 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8873 (*_bfd_error_handler)
8874 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8875 input_bfd,
8876 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8877 }
8878 else
252b5132 8879 {
dfc5f959
NC		 8880 /* If it is not a call to Thumb, assume call to Arm.
8881 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8882 function call at all, but rather a long jump. Calls through
8883 the PLT do not require stubs. */
34e77a92 8884 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8885 {
bd97cb95 8886 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8887 {
8888 /* Convert BL to BLX. */
8889 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8890 }
155d87d7
CL		 8891 else if (( r_type != R_ARM_THM_CALL)
8892 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8893 {
8894 if (elf32_thumb_to_arm_stub
8895 (info, sym_name, input_bfd, output_bfd, input_section,
8896 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8897 error_message))
8898 return bfd_reloc_ok;
8899 else
8900 return bfd_reloc_dangerous;
8901 }
da5938a2 8902 }
35fc36a8
RS		 8903 else if (branch_type == ST_BRANCH_TO_THUMB
8904 && globals->use_blx
bd97cb95 8905 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8906 {
8907 /* Make sure this is a BL. */
8908 lower_insn |= 0x1800;
8909 }
252b5132 8910 }
f21f3fe0 8911
fe33d2fa 8912 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8913 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8914 {
8915 /* Check if a stub has to be inserted because the destination
8029a119 8916 is too far. */
fe33d2fa
CL		 8917 struct elf32_arm_stub_hash_entry *stub_entry;
8918 struct elf32_arm_link_hash_entry *hash;
8919
8920 hash = (struct elf32_arm_link_hash_entry *) h;
8921
8922 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8923 st_type, &branch_type,
8924 hash, value, sym_sec,
fe33d2fa
CL		 8925 input_bfd, sym_name);
8926
8927 if (stub_type != arm_stub_none)
906e58ca
NC		 8928 {
8929 /* The target is out of reach or we are changing modes, so
8930 redirect the branch to the local stub for this
8931 function. */
8932 stub_entry = elf32_arm_get_stub_entry (input_section,
8933 sym_sec, h,
fe33d2fa
CL		 8934 rel, globals,
8935 stub_type);
906e58ca 8936 if (stub_entry != NULL)
9cd3e4e5
NC		 8937 {
8938 value = (stub_entry->stub_offset
8939 + stub_entry->stub_sec->output_offset
8940 + stub_entry->stub_sec->output_section->vma);
8941
8942 if (plt_offset != (bfd_vma) -1)
8943 *unresolved_reloc_p = FALSE;
8944 }
906e58ca 8945
f4ac8484 8946 /* If this call becomes a call to Arm, force BLX. */
155d87d7 8947 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 8948 {
8949 if ((stub_entry
8950 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 8951 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 8952 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8953 }
906e58ca
NC		 8954 }
8955 }
8956
fe33d2fa 8957 /* Handle calls via the PLT. */
34e77a92 8958 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8959 {
8960 value = (splt->output_section->vma
8961 + splt->output_offset
34e77a92 8962 + plt_offset);
fe33d2fa
CL		 8963
8964 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8965 {
8966 /* If the Thumb BLX instruction is available, convert
8967 the BL to a BLX instruction to call the ARM-mode
8968 PLT entry. */
8969 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 8970 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8971 }
8972 else
8973 {
8974 /* Target the Thumb stub before the ARM PLT entry. */
8975 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 8976 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 8977 }
8978 *unresolved_reloc_p = FALSE;
8979 }
8980
ba96a88f 8981 relocation = value + signed_addend;
f21f3fe0 8982
252b5132 8983 relocation -= (input_section->output_section->vma
ba96a88f
NC		 8984 + input_section->output_offset
8985 + rel->r_offset);
9a5aca8c 8986
252b5132
RH		 8987 check = relocation >> howto->rightshift;
8988
8989 /* If this is a signed value, the rightshift just dropped
8990 leading 1 bits (assuming twos complement). */
8991 if ((bfd_signed_vma) relocation >= 0)
8992 signed_check = check;
8993 else
8994 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8995
e95de063
MS		 8996 /* Calculate the permissable maximum and minimum values for
8997 this relocation according to whether we're relocating for
8998 Thumb-2 or not. */
8999 bitsize = howto->bitsize;
9000 if (!thumb2)
9001 bitsize -= 2;
f6ebfac0 9002 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 9003 reloc_signed_min = ~reloc_signed_max;
9004
252b5132 9005 /* Assumes two's complement. */
ba96a88f 9006 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 9007 overflow = TRUE;
252b5132 9008
bd97cb95 9009 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 9010 /* For a BLX instruction, make sure that the relocation is rounded up
9011 to a word boundary. This follows the semantics of the instruction
9012 which specifies that bit 1 of the target address will come from bit
9013 1 of the base address. */
9014 relocation = (relocation + 2) & ~ 3;
cb1afa5c 9015
e95de063
MS		 9016 /* Put RELOCATION back into the insn. Assumes two's complement.
9017 We use the Thumb-2 encoding, which is safe even if dealing with
9018 a Thumb-1 instruction by virtue of our overflow check above. */
99059e56 9019 reloc_sign = (signed_check < 0) ? 1 : 0;
e95de063 9020 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
99059e56
RM		 9021 | ((relocation >> 12) & 0x3ff)
9022 | (reloc_sign << 10);
906e58ca 9023 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
99059e56
RM		 9024 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9025 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9026 | ((relocation >> 1) & 0x7ff);
c62e1cc3 9027
252b5132
RH		 9028 /* Put the relocated value back in the object file: */
9029 bfd_put_16 (input_bfd, upper_insn, hit_data);
9030 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9031
9032 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9033 }
9034 break;
9035
c19d1205
ZW		 9036 case R_ARM_THM_JUMP19:
9037 /* Thumb32 conditional branch instruction. */
9038 {
9039 bfd_vma relocation;
9040 bfd_boolean overflow = FALSE;
9041 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9042 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 9043 bfd_signed_vma reloc_signed_max = 0xffffe;
9044 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 9045 bfd_signed_vma signed_check;
9046
9047 /* Need to refetch the addend, reconstruct the top three bits,
9048 and squish the two 11 bit pieces together. */
9049 if (globals->use_rel)
9050 {
9051 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 9052 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 9053 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9054 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9055 bfd_vma lower = (lower_insn & 0x07ff);
9056
a00a1f35
MS		 9057 upper |= J1 << 6;
9058 upper |= J2 << 7;
9059 upper |= (!S) << 8;
c19d1205
ZW		 9060 upper -= 0x0100; /* Sign extend. */
9061
9062 addend = (upper << 12) | (lower << 1);
9063 signed_addend = addend;
9064 }
9065
bd97cb95 9066 /* Handle calls via the PLT. */
34e77a92 9067 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 9068 {
9069 value = (splt->output_section->vma
9070 + splt->output_offset
34e77a92 9071 + plt_offset);
bd97cb95
DJ		 9072 /* Target the Thumb stub before the ARM PLT entry. */
9073 value -= PLT_THUMB_STUB_SIZE;
9074 *unresolved_reloc_p = FALSE;
9075 }
9076
c19d1205
ZW		 9077 /* ??? Should handle interworking? GCC might someday try to
9078 use this for tail calls. */
9079
99059e56 9080 relocation = value + signed_addend;
c19d1205
ZW		 9081 relocation -= (input_section->output_section->vma
9082 + input_section->output_offset
9083 + rel->r_offset);
a00a1f35 9084 signed_check = (bfd_signed_vma) relocation;
c19d1205 9085
c19d1205
ZW		 9086 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9087 overflow = TRUE;
9088
9089 /* Put RELOCATION back into the insn. */
9090 {
9091 bfd_vma S = (relocation & 0x00100000) >> 20;
9092 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9093 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9094 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9095 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9096
a00a1f35 9097 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9098 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9099 }
9100
9101 /* Put the relocated value back in the object file: */
9102 bfd_put_16 (input_bfd, upper_insn, hit_data);
9103 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9104
9105 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9106 }
9107
9108 case R_ARM_THM_JUMP11:
9109 case R_ARM_THM_JUMP8:
9110 case R_ARM_THM_JUMP6:
51c5503b
NC		 9111 /* Thumb B (branch) instruction). */
9112 {
6cf9e9fe 9113 bfd_signed_vma relocation;
51c5503b
NC		 9114 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9115 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9116 bfd_signed_vma signed_check;
9117
c19d1205
ZW		 9118 /* CZB cannot jump backward. */
9119 if (r_type == R_ARM_THM_JUMP6)
9120 reloc_signed_min = 0;
9121
4e7fd91e 9122 if (globals->use_rel)
6cf9e9fe 9123 {
4e7fd91e
PB		 9124 /* Need to refetch addend. */
9125 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9126 if (addend & ((howto->src_mask + 1) >> 1))
9127 {
9128 signed_addend = -1;
9129 signed_addend &= ~ howto->src_mask;
9130 signed_addend |= addend;
9131 }
9132 else
9133 signed_addend = addend;
9134 /* The value in the insn has been right shifted. We need to
9135 undo this, so that we can perform the address calculation
9136 in terms of bytes. */
9137 signed_addend <<= howto->rightshift;
6cf9e9fe 9138 }
6cf9e9fe 9139 relocation = value + signed_addend;
51c5503b
NC		 9140
9141 relocation -= (input_section->output_section->vma
9142 + input_section->output_offset
9143 + rel->r_offset);
9144
6cf9e9fe
NC		 9145 relocation >>= howto->rightshift;
9146 signed_check = relocation;
c19d1205
ZW		 9147
9148 if (r_type == R_ARM_THM_JUMP6)
9149 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9150 else
9151 relocation &= howto->dst_mask;
51c5503b 9152 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9153
51c5503b
NC		 9154 bfd_put_16 (input_bfd, relocation, hit_data);
9155
9156 /* Assumes two's complement. */
9157 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9158 return bfd_reloc_overflow;
9159
9160 return bfd_reloc_ok;
9161 }
cedb70c5 9162
8375c36b
PB		 9163 case R_ARM_ALU_PCREL7_0:
9164 case R_ARM_ALU_PCREL15_8:
9165 case R_ARM_ALU_PCREL23_15:
9166 {
9167 bfd_vma insn;
9168 bfd_vma relocation;
9169
9170 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9171 if (globals->use_rel)
9172 {
9173 /* Extract the addend. */
9174 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9175 signed_addend = addend;
9176 }
8375c36b
PB		 9177 relocation = value + signed_addend;
9178
9179 relocation -= (input_section->output_section->vma
9180 + input_section->output_offset
9181 + rel->r_offset);
9182 insn = (insn & ~0xfff)
9183 | ((howto->bitpos << 7) & 0xf00)
9184 | ((relocation >> howto->bitpos) & 0xff);
9185 bfd_put_32 (input_bfd, value, hit_data);
9186 }
9187 return bfd_reloc_ok;
9188
252b5132
RH		 9189 case R_ARM_GNU_VTINHERIT:
9190 case R_ARM_GNU_VTENTRY:
9191 return bfd_reloc_ok;
9192
c19d1205 9193 case R_ARM_GOTOFF32:
252b5132 9194 /* Relocation is relative to the start of the
99059e56 9195 global offset table. */
252b5132
RH		 9196
9197 BFD_ASSERT (sgot != NULL);
9198 if (sgot == NULL)
99059e56 9199 return bfd_reloc_notsupported;
9a5aca8c 9200
cedb70c5 9201 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9202 address by one, so that attempts to call the function pointer will
9203 correctly interpret it as Thumb code. */
35fc36a8 9204 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9205 value += 1;
9206
252b5132 9207 /* Note that sgot->output_offset is not involved in this
99059e56
RM		 9208 calculation. We always want the start of .got. If we
9209 define _GLOBAL_OFFSET_TABLE in a different way, as is
9210 permitted by the ABI, we might have to change this
9211 calculation. */
252b5132 9212 value -= sgot->output_section->vma;
f21f3fe0 9213 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9214 contents, rel->r_offset, value,
00a97672 9215 rel->r_addend);
252b5132
RH		 9216
9217 case R_ARM_GOTPC:
a7c10850 9218 /* Use global offset table as symbol value. */
252b5132 9219 BFD_ASSERT (sgot != NULL);
f21f3fe0 9220
252b5132 9221 if (sgot == NULL)
99059e56 9222 return bfd_reloc_notsupported;
252b5132 9223
0945cdfd 9224 *unresolved_reloc_p = FALSE;
252b5132 9225 value = sgot->output_section->vma;
f21f3fe0 9226 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9227 contents, rel->r_offset, value,
00a97672 9228 rel->r_addend);
f21f3fe0 9229
252b5132 9230 case R_ARM_GOT32:
eb043451 9231 case R_ARM_GOT_PREL:
252b5132 9232 /* Relocation is to the entry for this symbol in the
99059e56 9233 global offset table. */
252b5132
RH		 9234 if (sgot == NULL)
9235 return bfd_reloc_notsupported;
f21f3fe0 9236
34e77a92
RS		 9237 if (dynreloc_st_type == STT_GNU_IFUNC
9238 && plt_offset != (bfd_vma) -1
9239 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9240 {
9241 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9242 symbol, and the relocation resolves directly to the runtime
9243 target rather than to the .iplt entry. This means that any
9244 .got entry would be the same value as the .igot.plt entry,
9245 so there's no point creating both. */
9246 sgot = globals->root.igotplt;
9247 value = sgot->output_offset + gotplt_offset;
9248 }
9249 else if (h != NULL)
252b5132
RH		 9250 {
9251 bfd_vma off;
f21f3fe0 9252
252b5132
RH		 9253 off = h->got.offset;
9254 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9255 if ((off & 1) != 0)
252b5132 9256 {
b436d854
RS		 9257 /* We have already processsed one GOT relocation against
9258 this symbol. */
9259 off &= ~1;
9260 if (globals->root.dynamic_sections_created
9261 && !SYMBOL_REFERENCES_LOCAL (info, h))
9262 *unresolved_reloc_p = FALSE;
9263 }
9264 else
9265 {
9266 Elf_Internal_Rela outrel;
9267
6f820c85 9268 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 9269 {
9270 /* If the symbol doesn't resolve locally in a static
9271 object, we have an undefined reference. If the
9272 symbol doesn't resolve locally in a dynamic object,
9273 it should be resolved by the dynamic linker. */
9274 if (globals->root.dynamic_sections_created)
9275 {
9276 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9277 *unresolved_reloc_p = FALSE;
9278 }
9279 else
9280 outrel.r_info = 0;
9281 outrel.r_addend = 0;
9282 }
252b5132
RH		 9283 else
9284 {
34e77a92 9285 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9286 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
31943882
WN		 9287 else if (info->shared &&
9288 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9289 || h->root.type != bfd_link_hash_undefweak))
99059e56
RM		 9290 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9291 else
9292 outrel.r_info = 0;
34e77a92 9293 outrel.r_addend = dynreloc_value;
b436d854 9294 }
ee29b9fb 9295
b436d854
RS		 9296 /* The GOT entry is initialized to zero by default.
9297 See if we should install a different value. */
9298 if (outrel.r_addend != 0
9299 && (outrel.r_info == 0 || globals->use_rel))
9300 {
9301 bfd_put_32 (output_bfd, outrel.r_addend,
9302 sgot->contents + off);
9303 outrel.r_addend = 0;
252b5132 9304 }
f21f3fe0 9305
b436d854
RS		 9306 if (outrel.r_info != 0)
9307 {
9308 outrel.r_offset = (sgot->output_section->vma
9309 + sgot->output_offset
9310 + off);
9311 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9312 }
9313 h->got.offset |= 1;
9314 }
252b5132
RH		 9315 value = sgot->output_offset + off;
9316 }
9317 else
9318 {
9319 bfd_vma off;
f21f3fe0 9320
252b5132
RH		 9321 BFD_ASSERT (local_got_offsets != NULL &&
9322 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9323
252b5132 9324 off = local_got_offsets[r_symndx];
f21f3fe0 9325
252b5132
RH		 9326 /* The offset must always be a multiple of 4. We use the
9327 least significant bit to record whether we have already
9b485d32 9328 generated the necessary reloc. */
252b5132
RH		 9329 if ((off & 1) != 0)
9330 off &= ~1;
9331 else
9332 {
00a97672 9333 if (globals->use_rel)
34e77a92 9334 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9335
34e77a92 9336 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9337 {
947216bf 9338 Elf_Internal_Rela outrel;
f21f3fe0 9339
34e77a92 9340 outrel.r_addend = addend + dynreloc_value;
252b5132 9341 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9342 + sgot->output_offset
252b5132 9343 + off);
34e77a92 9344 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9345 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
34e77a92
RS		 9346 else
9347 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9348 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9349 }
f21f3fe0 9350
252b5132
RH		 9351 local_got_offsets[r_symndx] |= 1;
9352 }
f21f3fe0 9353
252b5132
RH		 9354 value = sgot->output_offset + off;
9355 }
eb043451
PB		 9356 if (r_type != R_ARM_GOT32)
9357 value += sgot->output_section->vma;
9a5aca8c 9358
f21f3fe0 9359 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9360 contents, rel->r_offset, value,
00a97672 9361 rel->r_addend);
f21f3fe0 9362
ba93b8ac
DJ		 9363 case R_ARM_TLS_LDO32:
9364 value = value - dtpoff_base (info);
9365
9366 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9367 contents, rel->r_offset, value,
9368 rel->r_addend);
ba93b8ac
DJ		 9369
9370 case R_ARM_TLS_LDM32:
9371 {
9372 bfd_vma off;
9373
362d30a1 9374 if (sgot == NULL)
ba93b8ac
DJ		 9375 abort ();
9376
9377 off = globals->tls_ldm_got.offset;
9378
9379 if ((off & 1) != 0)
9380 off &= ~1;
9381 else
9382 {
9383 /* If we don't know the module number, create a relocation
9384 for it. */
9385 if (info->shared)
9386 {
9387 Elf_Internal_Rela outrel;
ba93b8ac 9388
362d30a1 9389 if (srelgot == NULL)
ba93b8ac
DJ		 9390 abort ();
9391
00a97672 9392 outrel.r_addend = 0;
362d30a1
RS		 9393 outrel.r_offset = (sgot->output_section->vma
9394 + sgot->output_offset + off);
ba93b8ac
DJ		 9395 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9396
00a97672
RS		 9397 if (globals->use_rel)
9398 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9399 sgot->contents + off);
ba93b8ac 9400
47beaa6a 9401 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9402 }
9403 else
362d30a1 9404 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9405
9406 globals->tls_ldm_got.offset |= 1;
9407 }
9408
362d30a1 9409 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9410 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9411
9412 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9413 contents, rel->r_offset, value,
00a97672 9414 rel->r_addend);
ba93b8ac
DJ		 9415 }
9416
0855e32b
NS		 9417 case R_ARM_TLS_CALL:
9418 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9419 case R_ARM_TLS_GD32:
9420 case R_ARM_TLS_IE32:
0855e32b
NS		 9421 case R_ARM_TLS_GOTDESC:
9422 case R_ARM_TLS_DESCSEQ:
9423 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9424 {
0855e32b
NS		 9425 bfd_vma off, offplt;
9426 int indx = 0;
ba93b8ac
DJ		 9427 char tls_type;
9428
0855e32b 9429 BFD_ASSERT (sgot != NULL);
ba93b8ac 9430
ba93b8ac
DJ		 9431 if (h != NULL)
9432 {
9433 bfd_boolean dyn;
9434 dyn = globals->root.dynamic_sections_created;
9435 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9436 && (!info->shared
9437 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9438 {
9439 *unresolved_reloc_p = FALSE;
9440 indx = h->dynindx;
9441 }
9442 off = h->got.offset;
0855e32b 9443 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9444 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9445 }
9446 else
9447 {
0855e32b 9448 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9449 off = local_got_offsets[r_symndx];
0855e32b 9450 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9451 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9452 }
9453
0855e32b 9454 /* Linker relaxations happens from one of the
b38cadfb 9455 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9456 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9457 tls_type = GOT_TLS_IE;
0855e32b
NS		 9458
9459 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9460
9461 if ((off & 1) != 0)
9462 off &= ~1;
9463 else
9464 {
9465 bfd_boolean need_relocs = FALSE;
9466 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9467 int cur_off = off;
9468
9469 /* The GOT entries have not been initialized yet. Do it
9470 now, and emit any relocations. If both an IE GOT and a
9471 GD GOT are necessary, we emit the GD first. */
9472
9473 if ((info->shared || indx != 0)
9474 && (h == NULL
9475 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9476 || h->root.type != bfd_link_hash_undefweak))
9477 {
9478 need_relocs = TRUE;
0855e32b 9479 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9480 }
9481
0855e32b
NS		 9482 if (tls_type & GOT_TLS_GDESC)
9483 {
47beaa6a
RS		 9484 bfd_byte *loc;
9485
0855e32b
NS		 9486 /* We should have relaxed, unless this is an undefined
9487 weak symbol. */
9488 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9489 || info->shared);
9490 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
99059e56 9491 <= globals->root.sgotplt->size);
0855e32b
NS		 9492
9493 outrel.r_addend = 0;
9494 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9495 + globals->root.sgotplt->output_offset
9496 + offplt
9497 + globals->sgotplt_jump_table_size);
b38cadfb 9498
0855e32b
NS		 9499 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9500 sreloc = globals->root.srelplt;
9501 loc = sreloc->contents;
9502 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9503 BFD_ASSERT (loc + RELOC_SIZE (globals)
99059e56 9504 <= sreloc->contents + sreloc->size);
0855e32b
NS		 9505
9506 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9507
9508 /* For globals, the first word in the relocation gets
9509 the relocation index and the top bit set, or zero,
9510 if we're binding now. For locals, it gets the
9511 symbol's offset in the tls section. */
99059e56 9512 bfd_put_32 (output_bfd,
0855e32b
NS		 9513 !h ? value - elf_hash_table (info)->tls_sec->vma
9514 : info->flags & DF_BIND_NOW ? 0
9515 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9516 globals->root.sgotplt->contents + offplt
9517 + globals->sgotplt_jump_table_size);
9518
0855e32b 9519 /* Second word in the relocation is always zero. */
99059e56 9520 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9521 globals->root.sgotplt->contents + offplt
9522 + globals->sgotplt_jump_table_size + 4);
0855e32b 9523 }
ba93b8ac
DJ		 9524 if (tls_type & GOT_TLS_GD)
9525 {
9526 if (need_relocs)
9527 {
00a97672 9528 outrel.r_addend = 0;
362d30a1
RS		 9529 outrel.r_offset = (sgot->output_section->vma
9530 + sgot->output_offset
00a97672 9531 + cur_off);
ba93b8ac 9532 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9533
00a97672
RS		 9534 if (globals->use_rel)
9535 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9536 sgot->contents + cur_off);
00a97672 9537
47beaa6a 9538 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9539
9540 if (indx == 0)
9541 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9542 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9543 else
9544 {
00a97672 9545 outrel.r_addend = 0;
ba93b8ac
DJ		 9546 outrel.r_info = ELF32_R_INFO (indx,
9547 R_ARM_TLS_DTPOFF32);
9548 outrel.r_offset += 4;
00a97672
RS		 9549
9550 if (globals->use_rel)
9551 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9552 sgot->contents + cur_off + 4);
00a97672 9553
47beaa6a
RS		 9554 elf32_arm_add_dynreloc (output_bfd, info,
9555 srelgot, &outrel);
ba93b8ac
DJ		 9556 }
9557 }
9558 else
9559 {
9560 /* If we are not emitting relocations for a
9561 general dynamic reference, then we must be in a
9562 static link or an executable link with the
9563 symbol binding locally. Mark it as belonging
9564 to module 1, the executable. */
9565 bfd_put_32 (output_bfd, 1,
362d30a1 9566 sgot->contents + cur_off);
ba93b8ac 9567 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9568 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9569 }
9570
9571 cur_off += 8;
9572 }
9573
9574 if (tls_type & GOT_TLS_IE)
9575 {
9576 if (need_relocs)
9577 {
00a97672
RS		 9578 if (indx == 0)
9579 outrel.r_addend = value - dtpoff_base (info);
9580 else
9581 outrel.r_addend = 0;
362d30a1
RS		 9582 outrel.r_offset = (sgot->output_section->vma
9583 + sgot->output_offset
ba93b8ac
DJ		 9584 + cur_off);
9585 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9586
00a97672
RS		 9587 if (globals->use_rel)
9588 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9589 sgot->contents + cur_off);
ba93b8ac 9590
47beaa6a 9591 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9592 }
9593 else
9594 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9595 sgot->contents + cur_off);
ba93b8ac
DJ		 9596 cur_off += 4;
9597 }
9598
9599 if (h != NULL)
9600 h->got.offset |= 1;
9601 else
9602 local_got_offsets[r_symndx] |= 1;
9603 }
9604
9605 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9606 off += 8;
0855e32b
NS		 9607 else if (tls_type & GOT_TLS_GDESC)
9608 off = offplt;
9609
9610 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9611 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9612 {
9613 bfd_signed_vma offset;
12352d3f
PB		 9614 /* TLS stubs are arm mode. The original symbol is a
9615 data object, so branch_type is bogus. */
9616 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9617 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9618 = arm_type_of_stub (info, input_section, rel,
9619 st_type, &branch_type,
0855e32b
NS		 9620 (struct elf32_arm_link_hash_entry *)h,
9621 globals->tls_trampoline, globals->root.splt,
9622 input_bfd, sym_name);
9623
9624 if (stub_type != arm_stub_none)
9625 {
9626 struct elf32_arm_stub_hash_entry *stub_entry
9627 = elf32_arm_get_stub_entry
9628 (input_section, globals->root.splt, 0, rel,
9629 globals, stub_type);
9630 offset = (stub_entry->stub_offset
9631 + stub_entry->stub_sec->output_offset
9632 + stub_entry->stub_sec->output_section->vma);
9633 }
9634 else
9635 offset = (globals->root.splt->output_section->vma
9636 + globals->root.splt->output_offset
9637 + globals->tls_trampoline);
9638
9639 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9640 {
9641 unsigned long inst;
b38cadfb
NC		 9642
9643 offset -= (input_section->output_section->vma
9644 + input_section->output_offset
9645 + rel->r_offset + 8);
0855e32b
NS		 9646
9647 inst = offset >> 2;
9648 inst &= 0x00ffffff;
9649 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9650 }
9651 else
9652 {
9653 /* Thumb blx encodes the offset in a complicated
9654 fashion. */
9655 unsigned upper_insn, lower_insn;
9656 unsigned neg;
9657
b38cadfb
NC		 9658 offset -= (input_section->output_section->vma
9659 + input_section->output_offset
0855e32b 9660 + rel->r_offset + 4);
b38cadfb 9661
12352d3f
PB		 9662 if (stub_type != arm_stub_none
9663 && arm_stub_is_thumb (stub_type))
9664 {
9665 lower_insn = 0xd000;
9666 }
9667 else
9668 {
9669 lower_insn = 0xc000;
9670 /* Round up the offset to a word boundary */
9671 offset = (offset + 2) & ~2;
9672 }
9673
0855e32b
NS		 9674 neg = offset < 0;
9675 upper_insn = (0xf000
9676 | ((offset >> 12) & 0x3ff)
9677 | (neg << 10));
12352d3f 9678 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9679 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9680 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9681 bfd_put_16 (input_bfd, upper_insn, hit_data);
9682 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9683 return bfd_reloc_ok;
9684 }
9685 }
9686 /* These relocations needs special care, as besides the fact
9687 they point somewhere in .gotplt, the addend must be
9688 adjusted accordingly depending on the type of instruction
9689 we refer to */
9690 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9691 {
9692 unsigned long data, insn;
9693 unsigned thumb;
b38cadfb 9694
0855e32b
NS		 9695 data = bfd_get_32 (input_bfd, hit_data);
9696 thumb = data & 1;
9697 data &= ~1u;
b38cadfb 9698
0855e32b
NS		 9699 if (thumb)
9700 {
9701 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9702 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9703 insn = (insn << 16)
9704 | bfd_get_16 (input_bfd,
9705 contents + rel->r_offset - data + 2);
9706 if ((insn & 0xf800c000) == 0xf000c000)
9707 /* bl/blx */
9708 value = -6;
9709 else if ((insn & 0xffffff00) == 0x4400)
9710 /* add */
9711 value = -5;
9712 else
9713 {
9714 (*_bfd_error_handler)
9715 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9716 input_bfd, input_section,
9717 (unsigned long)rel->r_offset, insn);
9718 return bfd_reloc_notsupported;
9719 }
9720 }
9721 else
9722 {
9723 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9724
9725 switch (insn >> 24)
9726 {
9727 case 0xeb: /* bl */
9728 case 0xfa: /* blx */
9729 value = -4;
9730 break;
9731
9732 case 0xe0: /* add */
9733 value = -8;
9734 break;
b38cadfb 9735
0855e32b
NS		 9736 default:
9737 (*_bfd_error_handler)
9738 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9739 input_bfd, input_section,
9740 (unsigned long)rel->r_offset, insn);
9741 return bfd_reloc_notsupported;
9742 }
9743 }
b38cadfb 9744
0855e32b
NS		 9745 value += ((globals->root.sgotplt->output_section->vma
9746 + globals->root.sgotplt->output_offset + off)
9747 - (input_section->output_section->vma
9748 + input_section->output_offset
9749 + rel->r_offset)
9750 + globals->sgotplt_jump_table_size);
9751 }
9752 else
9753 value = ((globals->root.sgot->output_section->vma
9754 + globals->root.sgot->output_offset + off)
9755 - (input_section->output_section->vma
9756 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9757
9758 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9759 contents, rel->r_offset, value,
00a97672 9760 rel->r_addend);
ba93b8ac
DJ		 9761 }
9762
9763 case R_ARM_TLS_LE32:
9ec0c936 9764 if (info->shared && !info->pie)
ba93b8ac
DJ		 9765 {
9766 (*_bfd_error_handler)
9767 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9768 input_bfd, input_section,
9769 (long) rel->r_offset, howto->name);
46691134 9770 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9771 }
9772 else
9773 value = tpoff (info, value);
906e58ca 9774
ba93b8ac 9775 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9776 contents, rel->r_offset, value,
9777 rel->r_addend);
ba93b8ac 9778
319850b4
JB		 9779 case R_ARM_V4BX:
9780 if (globals->fix_v4bx)
845b51d6
PB		 9781 {
9782 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9783
845b51d6
PB		 9784 /* Ensure that we have a BX instruction. */
9785 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9786
845b51d6
PB		 9787 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9788 {
9789 /* Branch to veneer. */
9790 bfd_vma glue_addr;
9791 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9792 glue_addr -= input_section->output_section->vma
9793 + input_section->output_offset
9794 + rel->r_offset + 8;
9795 insn = (insn & 0xf0000000) | 0x0a000000
9796 | ((glue_addr >> 2) & 0x00ffffff);
9797 }
9798 else
9799 {
9800 /* Preserve Rm (lowest four bits) and the condition code
9801 (highest four bits). Other bits encode MOV PC,Rm. */
9802 insn = (insn & 0xf000000f) | 0x01a0f000;
9803 }
319850b4 9804
845b51d6
PB		 9805 bfd_put_32 (input_bfd, insn, hit_data);
9806 }
319850b4
JB		 9807 return bfd_reloc_ok;
9808
b6895b4f
PB		 9809 case R_ARM_MOVW_ABS_NC:
9810 case R_ARM_MOVT_ABS:
9811 case R_ARM_MOVW_PREL_NC:
9812 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9813 /* Until we properly support segment-base-relative addressing then
9814 we assume the segment base to be zero, as for the group relocations.
9815 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9816 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9817 case R_ARM_MOVW_BREL_NC:
9818 case R_ARM_MOVW_BREL:
9819 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9820 {
9821 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9822
9823 if (globals->use_rel)
9824 {
9825 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9826 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9827 }
92f5d02b 9828
b6895b4f 9829 value += signed_addend;
b6895b4f
PB		 9830
9831 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9832 value -= (input_section->output_section->vma
9833 + input_section->output_offset + rel->r_offset);
9834
92f5d02b 9835 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
99059e56 9836 return bfd_reloc_overflow;
92f5d02b 9837
35fc36a8 9838 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9839 value |= 1;
9840
9841 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
99059e56 9842 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9843 value >>= 16;
9844
9845 insn &= 0xfff0f000;
9846 insn |= value & 0xfff;
9847 insn |= (value & 0xf000) << 4;
9848 bfd_put_32 (input_bfd, insn, hit_data);
9849 }
9850 return bfd_reloc_ok;
9851
9852 case R_ARM_THM_MOVW_ABS_NC:
9853 case R_ARM_THM_MOVT_ABS:
9854 case R_ARM_THM_MOVW_PREL_NC:
9855 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9856 /* Until we properly support segment-base-relative addressing then
9857 we assume the segment base to be zero, as for the above relocations.
9858 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9859 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9860 as R_ARM_THM_MOVT_ABS. */
9861 case R_ARM_THM_MOVW_BREL_NC:
9862 case R_ARM_THM_MOVW_BREL:
9863 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9864 {
9865 bfd_vma insn;
906e58ca 9866
b6895b4f
PB		 9867 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9868 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9869
9870 if (globals->use_rel)
9871 {
9872 addend = ((insn >> 4) & 0xf000)
9873 | ((insn >> 15) & 0x0800)
9874 | ((insn >> 4) & 0x0700)
9875 | (insn & 0x00ff);
39623e12 9876 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9877 }
92f5d02b 9878
b6895b4f 9879 value += signed_addend;
b6895b4f
PB		 9880
9881 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9882 value -= (input_section->output_section->vma
9883 + input_section->output_offset + rel->r_offset);
9884
92f5d02b 9885 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
99059e56 9886 return bfd_reloc_overflow;
92f5d02b 9887
35fc36a8 9888 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9889 value |= 1;
9890
9891 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
99059e56 9892 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9893 value >>= 16;
9894
9895 insn &= 0xfbf08f00;
9896 insn |= (value & 0xf000) << 4;
9897 insn |= (value & 0x0800) << 15;
9898 insn |= (value & 0x0700) << 4;
9899 insn |= (value & 0x00ff);
9900
9901 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9902 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9903 }
9904 return bfd_reloc_ok;
9905
4962c51a
MS		 9906 case R_ARM_ALU_PC_G0_NC:
9907 case R_ARM_ALU_PC_G1_NC:
9908 case R_ARM_ALU_PC_G0:
9909 case R_ARM_ALU_PC_G1:
9910 case R_ARM_ALU_PC_G2:
9911 case R_ARM_ALU_SB_G0_NC:
9912 case R_ARM_ALU_SB_G1_NC:
9913 case R_ARM_ALU_SB_G0:
9914 case R_ARM_ALU_SB_G1:
9915 case R_ARM_ALU_SB_G2:
9916 {
9917 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 9918 bfd_vma pc = input_section->output_section->vma
4962c51a 9919 + input_section->output_offset + rel->r_offset;
31a91d61 9920 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 9921 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56
RM		 9922 bfd_vma residual;
9923 bfd_vma g_n;
4962c51a 9924 bfd_signed_vma signed_value;
99059e56
RM		 9925 int group = 0;
9926
9927 /* Determine which group of bits to select. */
9928 switch (r_type)
9929 {
9930 case R_ARM_ALU_PC_G0_NC:
9931 case R_ARM_ALU_PC_G0:
9932 case R_ARM_ALU_SB_G0_NC:
9933 case R_ARM_ALU_SB_G0:
9934 group = 0;
9935 break;
9936
9937 case R_ARM_ALU_PC_G1_NC:
9938 case R_ARM_ALU_PC_G1:
9939 case R_ARM_ALU_SB_G1_NC:
9940 case R_ARM_ALU_SB_G1:
9941 group = 1;
9942 break;
9943
9944 case R_ARM_ALU_PC_G2:
9945 case R_ARM_ALU_SB_G2:
9946 group = 2;
9947 break;
9948
9949 default:
9950 abort ();
9951 }
9952
9953 /* If REL, extract the addend from the insn. If RELA, it will
9954 have already been fetched for us. */
4962c51a 9955 if (globals->use_rel)
99059e56
RM		 9956 {
9957 int negative;
9958 bfd_vma constant = insn & 0xff;
9959 bfd_vma rotation = (insn & 0xf00) >> 8;
9960
9961 if (rotation == 0)
9962 signed_addend = constant;
9963 else
9964 {
9965 /* Compensate for the fact that in the instruction, the
9966 rotation is stored in multiples of 2 bits. */
9967 rotation *= 2;
9968
9969 /* Rotate "constant" right by "rotation" bits. */
9970 signed_addend = (constant >> rotation) |
9971 (constant << (8 * sizeof (bfd_vma) - rotation));
9972 }
9973
9974 /* Determine if the instruction is an ADD or a SUB.
9975 (For REL, this determines the sign of the addend.) */
9976 negative = identify_add_or_sub (insn);
9977 if (negative == 0)
9978 {
9979 (*_bfd_error_handler)
9980 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9981 input_bfd, input_section,
9982 (long) rel->r_offset, howto->name);
9983 return bfd_reloc_overflow;
9984 }
9985
9986 signed_addend *= negative;
9987 }
4962c51a
MS		 9988
9989 /* Compute the value (X) to go in the place. */
99059e56
RM		 9990 if (r_type == R_ARM_ALU_PC_G0_NC
9991 || r_type == R_ARM_ALU_PC_G1_NC
9992 || r_type == R_ARM_ALU_PC_G0
9993 || r_type == R_ARM_ALU_PC_G1
9994 || r_type == R_ARM_ALU_PC_G2)
9995 /* PC relative. */
9996 signed_value = value - pc + signed_addend;
9997 else
9998 /* Section base relative. */
9999 signed_value = value - sb + signed_addend;
10000
10001 /* If the target symbol is a Thumb function, then set the
10002 Thumb bit in the address. */
35fc36a8 10003 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 10004 signed_value |= 1;
10005
99059e56
RM		 10006 /* Calculate the value of the relevant G_n, in encoded
10007 constant-with-rotation format. */
10008 g_n = calculate_group_reloc_mask (abs (signed_value), group,
10009 &residual);
10010
10011 /* Check for overflow if required. */
10012 if ((r_type == R_ARM_ALU_PC_G0
10013 || r_type == R_ARM_ALU_PC_G1
10014 || r_type == R_ARM_ALU_PC_G2
10015 || r_type == R_ARM_ALU_SB_G0
10016 || r_type == R_ARM_ALU_SB_G1
10017 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10018 {
10019 (*_bfd_error_handler)
10020 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10021 input_bfd, input_section,
10022 (long) rel->r_offset, abs (signed_value), howto->name);
10023 return bfd_reloc_overflow;
10024 }
10025
10026 /* Mask out the value and the ADD/SUB part of the opcode; take care
10027 not to destroy the S bit. */
10028 insn &= 0xff1ff000;
10029
10030 /* Set the opcode according to whether the value to go in the
10031 place is negative. */
10032 if (signed_value < 0)
10033 insn |= 1 << 22;
10034 else
10035 insn |= 1 << 23;
10036
10037 /* Encode the offset. */
10038 insn |= g_n;
4962c51a
MS		 10039
10040 bfd_put_32 (input_bfd, insn, hit_data);
10041 }
10042 return bfd_reloc_ok;
10043
10044 case R_ARM_LDR_PC_G0:
10045 case R_ARM_LDR_PC_G1:
10046 case R_ARM_LDR_PC_G2:
10047 case R_ARM_LDR_SB_G0:
10048 case R_ARM_LDR_SB_G1:
10049 case R_ARM_LDR_SB_G2:
10050 {
10051 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10052 bfd_vma pc = input_section->output_section->vma
4962c51a 10053 + input_section->output_offset + rel->r_offset;
31a91d61 10054 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10055 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10056 bfd_vma residual;
4962c51a 10057 bfd_signed_vma signed_value;
99059e56
RM		 10058 int group = 0;
10059
10060 /* Determine which groups of bits to calculate. */
10061 switch (r_type)
10062 {
10063 case R_ARM_LDR_PC_G0:
10064 case R_ARM_LDR_SB_G0:
10065 group = 0;
10066 break;
10067
10068 case R_ARM_LDR_PC_G1:
10069 case R_ARM_LDR_SB_G1:
10070 group = 1;
10071 break;
10072
10073 case R_ARM_LDR_PC_G2:
10074 case R_ARM_LDR_SB_G2:
10075 group = 2;
10076 break;
10077
10078 default:
10079 abort ();
10080 }
10081
10082 /* If REL, extract the addend from the insn. If RELA, it will
10083 have already been fetched for us. */
4962c51a 10084 if (globals->use_rel)
99059e56
RM		 10085 {
10086 int negative = (insn & (1 << 23)) ? 1 : -1;
10087 signed_addend = negative * (insn & 0xfff);
10088 }
4962c51a
MS		 10089
10090 /* Compute the value (X) to go in the place. */
99059e56
RM		 10091 if (r_type == R_ARM_LDR_PC_G0
10092 || r_type == R_ARM_LDR_PC_G1
10093 || r_type == R_ARM_LDR_PC_G2)
10094 /* PC relative. */
10095 signed_value = value - pc + signed_addend;
10096 else
10097 /* Section base relative. */
10098 signed_value = value - sb + signed_addend;
10099
10100 /* Calculate the value of the relevant G_{n-1} to obtain
10101 the residual at that stage. */
10102 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10103
10104 /* Check for overflow. */
10105 if (residual >= 0x1000)
10106 {
10107 (*_bfd_error_handler)
10108 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10109 input_bfd, input_section,
10110 (long) rel->r_offset, abs (signed_value), howto->name);
10111 return bfd_reloc_overflow;
10112 }
10113
10114 /* Mask out the value and U bit. */
10115 insn &= 0xff7ff000;
10116
10117 /* Set the U bit if the value to go in the place is non-negative. */
10118 if (signed_value >= 0)
10119 insn |= 1 << 23;
10120
10121 /* Encode the offset. */
10122 insn |= residual;
4962c51a
MS		 10123
10124 bfd_put_32 (input_bfd, insn, hit_data);
10125 }
10126 return bfd_reloc_ok;
10127
10128 case R_ARM_LDRS_PC_G0:
10129 case R_ARM_LDRS_PC_G1:
10130 case R_ARM_LDRS_PC_G2:
10131 case R_ARM_LDRS_SB_G0:
10132 case R_ARM_LDRS_SB_G1:
10133 case R_ARM_LDRS_SB_G2:
10134 {
10135 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10136 bfd_vma pc = input_section->output_section->vma
4962c51a 10137 + input_section->output_offset + rel->r_offset;
31a91d61 10138 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10139 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10140 bfd_vma residual;
4962c51a 10141 bfd_signed_vma signed_value;
99059e56
RM		 10142 int group = 0;
10143
10144 /* Determine which groups of bits to calculate. */
10145 switch (r_type)
10146 {
10147 case R_ARM_LDRS_PC_G0:
10148 case R_ARM_LDRS_SB_G0:
10149 group = 0;
10150 break;
10151
10152 case R_ARM_LDRS_PC_G1:
10153 case R_ARM_LDRS_SB_G1:
10154 group = 1;
10155 break;
10156
10157 case R_ARM_LDRS_PC_G2:
10158 case R_ARM_LDRS_SB_G2:
10159 group = 2;
10160 break;
10161
10162 default:
10163 abort ();
10164 }
10165
10166 /* If REL, extract the addend from the insn. If RELA, it will
10167 have already been fetched for us. */
4962c51a 10168 if (globals->use_rel)
99059e56
RM		 10169 {
10170 int negative = (insn & (1 << 23)) ? 1 : -1;
10171 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10172 }
4962c51a
MS		 10173
10174 /* Compute the value (X) to go in the place. */
99059e56
RM		 10175 if (r_type == R_ARM_LDRS_PC_G0
10176 || r_type == R_ARM_LDRS_PC_G1
10177 || r_type == R_ARM_LDRS_PC_G2)
10178 /* PC relative. */
10179 signed_value = value - pc + signed_addend;
10180 else
10181 /* Section base relative. */
10182 signed_value = value - sb + signed_addend;
10183
10184 /* Calculate the value of the relevant G_{n-1} to obtain
10185 the residual at that stage. */
10186 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10187
10188 /* Check for overflow. */
10189 if (residual >= 0x100)
10190 {
10191 (*_bfd_error_handler)
10192 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10193 input_bfd, input_section,
10194 (long) rel->r_offset, abs (signed_value), howto->name);
10195 return bfd_reloc_overflow;
10196 }
10197
10198 /* Mask out the value and U bit. */
10199 insn &= 0xff7ff0f0;
10200
10201 /* Set the U bit if the value to go in the place is non-negative. */
10202 if (signed_value >= 0)
10203 insn |= 1 << 23;
10204
10205 /* Encode the offset. */
10206 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
4962c51a
MS		 10207
10208 bfd_put_32 (input_bfd, insn, hit_data);
10209 }
10210 return bfd_reloc_ok;
10211
10212 case R_ARM_LDC_PC_G0:
10213 case R_ARM_LDC_PC_G1:
10214 case R_ARM_LDC_PC_G2:
10215 case R_ARM_LDC_SB_G0:
10216 case R_ARM_LDC_SB_G1:
10217 case R_ARM_LDC_SB_G2:
10218 {
10219 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10220 bfd_vma pc = input_section->output_section->vma
4962c51a 10221 + input_section->output_offset + rel->r_offset;
31a91d61 10222 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10223 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10224 bfd_vma residual;
4962c51a 10225 bfd_signed_vma signed_value;
99059e56
RM		 10226 int group = 0;
10227
10228 /* Determine which groups of bits to calculate. */
10229 switch (r_type)
10230 {
10231 case R_ARM_LDC_PC_G0:
10232 case R_ARM_LDC_SB_G0:
10233 group = 0;
10234 break;
10235
10236 case R_ARM_LDC_PC_G1:
10237 case R_ARM_LDC_SB_G1:
10238 group = 1;
10239 break;
10240
10241 case R_ARM_LDC_PC_G2:
10242 case R_ARM_LDC_SB_G2:
10243 group = 2;
10244 break;
10245
10246 default:
10247 abort ();
10248 }
10249
10250 /* If REL, extract the addend from the insn. If RELA, it will
10251 have already been fetched for us. */
4962c51a 10252 if (globals->use_rel)
99059e56
RM		 10253 {
10254 int negative = (insn & (1 << 23)) ? 1 : -1;
10255 signed_addend = negative * ((insn & 0xff) << 2);
10256 }
4962c51a
MS		 10257
10258 /* Compute the value (X) to go in the place. */
99059e56
RM		 10259 if (r_type == R_ARM_LDC_PC_G0
10260 || r_type == R_ARM_LDC_PC_G1
10261 || r_type == R_ARM_LDC_PC_G2)
10262 /* PC relative. */
10263 signed_value = value - pc + signed_addend;
10264 else
10265 /* Section base relative. */
10266 signed_value = value - sb + signed_addend;
10267
10268 /* Calculate the value of the relevant G_{n-1} to obtain
10269 the residual at that stage. */
10270 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10271
10272 /* Check for overflow. (The absolute value to go in the place must be
10273 divisible by four and, after having been divided by four, must
10274 fit in eight bits.) */
10275 if ((residual & 0x3) != 0 || residual >= 0x400)
10276 {
10277 (*_bfd_error_handler)
10278 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10279 input_bfd, input_section,
10280 (long) rel->r_offset, abs (signed_value), howto->name);
10281 return bfd_reloc_overflow;
10282 }
10283
10284 /* Mask out the value and U bit. */
10285 insn &= 0xff7fff00;
10286
10287 /* Set the U bit if the value to go in the place is non-negative. */
10288 if (signed_value >= 0)
10289 insn |= 1 << 23;
10290
10291 /* Encode the offset. */
10292 insn |= residual >> 2;
4962c51a
MS		 10293
10294 bfd_put_32 (input_bfd, insn, hit_data);
10295 }
10296 return bfd_reloc_ok;
10297
252b5132
RH		 10298 default:
10299 return bfd_reloc_notsupported;
10300 }
10301}
10302
98c1d4aa
NC		 10303/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10304static void
57e8b36a
NC		 10305arm_add_to_rel (bfd * abfd,
10306 bfd_byte * address,
10307 reloc_howto_type * howto,
10308 bfd_signed_vma increment)
98c1d4aa 10309{
98c1d4aa
NC		 10310 bfd_signed_vma addend;
10311
bd97cb95
DJ		 10312 if (howto->type == R_ARM_THM_CALL
10313 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10314 {
9a5aca8c
AM		 10315 int upper_insn, lower_insn;
10316 int upper, lower;
98c1d4aa 10317
9a5aca8c
AM		 10318 upper_insn = bfd_get_16 (abfd, address);
10319 lower_insn = bfd_get_16 (abfd, address + 2);
10320 upper = upper_insn & 0x7ff;
10321 lower = lower_insn & 0x7ff;
10322
10323 addend = (upper << 12) | (lower << 1);
ddda4409 10324 addend += increment;
9a5aca8c 10325 addend >>= 1;
98c1d4aa 10326
9a5aca8c
AM		 10327 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10328 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10329
dc810e39
AM		 10330 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10331 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10332 }
10333 else
10334 {
10335 bfd_vma contents;
10336
10337 contents = bfd_get_32 (abfd, address);
10338
10339 /* Get the (signed) value from the instruction. */
10340 addend = contents & howto->src_mask;
10341 if (addend & ((howto->src_mask + 1) >> 1))
10342 {
10343 bfd_signed_vma mask;
10344
10345 mask = -1;
10346 mask &= ~ howto->src_mask;
10347 addend |= mask;
10348 }
10349
10350 /* Add in the increment, (which is a byte value). */
10351 switch (howto->type)
10352 {
10353 default:
10354 addend += increment;
10355 break;
10356
10357 case R_ARM_PC24:
c6596c5e 10358 case R_ARM_PLT32:
5b5bb741
PB		 10359 case R_ARM_CALL:
10360 case R_ARM_JUMP24:
9a5aca8c 10361 addend <<= howto->size;
dc810e39 10362 addend += increment;
9a5aca8c
AM		 10363
10364 /* Should we check for overflow here ? */
10365
10366 /* Drop any undesired bits. */
10367 addend >>= howto->rightshift;
10368 break;
10369 }
10370
10371 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10372
10373 bfd_put_32 (abfd, contents, address);
ddda4409 10374 }
98c1d4aa 10375}
252b5132 10376
ba93b8ac
DJ		 10377#define IS_ARM_TLS_RELOC(R_TYPE) \
10378 ((R_TYPE) == R_ARM_TLS_GD32 \
10379 || (R_TYPE) == R_ARM_TLS_LDO32 \
10380 || (R_TYPE) == R_ARM_TLS_LDM32 \
10381 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10382 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10383 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10384 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10385 || (R_TYPE) == R_ARM_TLS_IE32 \
10386 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10387
10388/* Specific set of relocations for the gnu tls dialect. */
10389#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10390 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10391 || (R_TYPE) == R_ARM_TLS_CALL \
10392 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10393 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10394 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10395
252b5132 10396/* Relocate an ARM ELF section. */
906e58ca 10397
b34976b6 10398static bfd_boolean
57e8b36a
NC		 10399elf32_arm_relocate_section (bfd * output_bfd,
10400 struct bfd_link_info * info,
10401 bfd * input_bfd,
10402 asection * input_section,
10403 bfd_byte * contents,
10404 Elf_Internal_Rela * relocs,
10405 Elf_Internal_Sym * local_syms,
10406 asection ** local_sections)
252b5132 10407{
b34976b6
AM		 10408 Elf_Internal_Shdr *symtab_hdr;
10409 struct elf_link_hash_entry **sym_hashes;
10410 Elf_Internal_Rela *rel;
10411 Elf_Internal_Rela *relend;
10412 const char *name;
b32d3aa2 10413 struct elf32_arm_link_hash_table * globals;
252b5132 10414
4e7fd91e 10415 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10416 if (globals == NULL)
10417 return FALSE;
b491616a 10418
0ffa91dd 10419 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10420 sym_hashes = elf_sym_hashes (input_bfd);
10421
10422 rel = relocs;
10423 relend = relocs + input_section->reloc_count;
10424 for (; rel < relend; rel++)
10425 {
ba96a88f
NC		 10426 int r_type;
10427 reloc_howto_type * howto;
10428 unsigned long r_symndx;
10429 Elf_Internal_Sym * sym;
10430 asection * sec;
252b5132 10431 struct elf_link_hash_entry * h;
ba96a88f
NC		 10432 bfd_vma relocation;
10433 bfd_reloc_status_type r;
10434 arelent bfd_reloc;
ba93b8ac 10435 char sym_type;
0945cdfd 10436 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10437 char *error_message = NULL;
f21f3fe0 10438
252b5132 10439 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10440 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10441 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10442
ba96a88f 10443 if ( r_type == R_ARM_GNU_VTENTRY
99059e56
RM		 10444 || r_type == R_ARM_GNU_VTINHERIT)
10445 continue;
252b5132 10446
b32d3aa2 10447 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10448 howto = bfd_reloc.howto;
252b5132 10449
252b5132
RH		 10450 h = NULL;
10451 sym = NULL;
10452 sec = NULL;
9b485d32 10453
252b5132
RH		 10454 if (r_symndx < symtab_hdr->sh_info)
10455 {
10456 sym = local_syms + r_symndx;
ba93b8ac 10457 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10458 sec = local_sections[r_symndx];
ffcb4889
NS		 10459
10460 /* An object file might have a reference to a local
10461 undefined symbol. This is a daft object file, but we
10462 should at least do something about it. V4BX & NONE
10463 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10464 allowed to use the undefined symbol, so allow those.
10465 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10466 if (r_type != R_ARM_V4BX
10467 && r_type != R_ARM_NONE
77b4f08f 10468 && r_symndx != STN_UNDEF
ffcb4889
NS		 10469 && bfd_is_und_section (sec)
10470 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10471 {
10472 if (!info->callbacks->undefined_symbol
10473 (info, bfd_elf_string_from_elf_section
10474 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10475 input_bfd, input_section,
10476 rel->r_offset, TRUE))
10477 return FALSE;
10478 }
b38cadfb 10479
4e7fd91e 10480 if (globals->use_rel)
f8df10f4 10481 {
4e7fd91e
PB		 10482 relocation = (sec->output_section->vma
10483 + sec->output_offset
10484 + sym->st_value);
ab96bf03
AM		 10485 if (!info->relocatable
10486 && (sec->flags & SEC_MERGE)
10487 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10488 {
4e7fd91e
PB		 10489 asection *msec;
10490 bfd_vma addend, value;
10491
39623e12 10492 switch (r_type)
4e7fd91e 10493 {
39623e12
PB		 10494 case R_ARM_MOVW_ABS_NC:
10495 case R_ARM_MOVT_ABS:
10496 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10497 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10498 addend = (addend ^ 0x8000) - 0x8000;
10499 break;
f8df10f4 10500
39623e12
PB		 10501 case R_ARM_THM_MOVW_ABS_NC:
10502 case R_ARM_THM_MOVT_ABS:
10503 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10504 << 16;
10505 value |= bfd_get_16 (input_bfd,
10506 contents + rel->r_offset + 2);
10507 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10508 | ((value & 0x04000000) >> 15);
10509 addend = (addend ^ 0x8000) - 0x8000;
10510 break;
f8df10f4 10511
39623e12
PB		 10512 default:
10513 if (howto->rightshift
10514 || (howto->src_mask & (howto->src_mask + 1)))
10515 {
10516 (*_bfd_error_handler)
10517 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10518 input_bfd, input_section,
10519 (long) rel->r_offset, howto->name);
10520 return FALSE;
10521 }
10522
10523 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10524
10525 /* Get the (signed) value from the instruction. */
10526 addend = value & howto->src_mask;
10527 if (addend & ((howto->src_mask + 1) >> 1))
10528 {
10529 bfd_signed_vma mask;
10530
10531 mask = -1;
10532 mask &= ~ howto->src_mask;
10533 addend |= mask;
10534 }
10535 break;
4e7fd91e 10536 }
39623e12 10537
4e7fd91e
PB		 10538 msec = sec;
10539 addend =
10540 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10541 - relocation;
10542 addend += msec->output_section->vma + msec->output_offset;
39623e12 10543
cc643b88 10544 /* Cases here must match those in the preceding
39623e12
PB		 10545 switch statement. */
10546 switch (r_type)
10547 {
10548 case R_ARM_MOVW_ABS_NC:
10549 case R_ARM_MOVT_ABS:
10550 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10551 | (addend & 0xfff);
10552 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10553 break;
10554
10555 case R_ARM_THM_MOVW_ABS_NC:
10556 case R_ARM_THM_MOVT_ABS:
10557 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10558 | (addend & 0xff) | ((addend & 0x0800) << 15);
10559 bfd_put_16 (input_bfd, value >> 16,
10560 contents + rel->r_offset);
10561 bfd_put_16 (input_bfd, value,
10562 contents + rel->r_offset + 2);
10563 break;
10564
10565 default:
10566 value = (value & ~ howto->dst_mask)
10567 | (addend & howto->dst_mask);
10568 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10569 break;
10570 }
f8df10f4 10571 }
f8df10f4 10572 }
4e7fd91e
PB		 10573 else
10574 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10575 }
10576 else
10577 {
62d887d4 10578 bfd_boolean warned, ignored;
560e09e9 10579
b2a8e766
AM		 10580 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10581 r_symndx, symtab_hdr, sym_hashes,
10582 h, sec, relocation,
62d887d4 10583 unresolved_reloc, warned, ignored);
ba93b8ac
DJ		 10584
10585 sym_type = h->type;
252b5132
RH		 10586 }
10587
dbaa2011 10588 if (sec != NULL && discarded_section (sec))
e4067dbb 10589 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10590 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10591
10592 if (info->relocatable)
10593 {
10594 /* This is a relocatable link. We don't have to change
10595 anything, unless the reloc is against a section symbol,
10596 in which case we have to adjust according to where the
10597 section symbol winds up in the output section. */
10598 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10599 {
10600 if (globals->use_rel)
10601 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10602 howto, (bfd_signed_vma) sec->output_offset);
10603 else
10604 rel->r_addend += sec->output_offset;
10605 }
10606 continue;
10607 }
10608
252b5132
RH		 10609 if (h != NULL)
10610 name = h->root.root.string;
10611 else
10612 {
10613 name = (bfd_elf_string_from_elf_section
10614 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10615 if (name == NULL || *name == '\0')
10616 name = bfd_section_name (input_bfd, sec);
10617 }
f21f3fe0 10618
cf35638d 10619 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10620 && r_type != R_ARM_NONE
10621 && (h == NULL
10622 || h->root.type == bfd_link_hash_defined
10623 || h->root.type == bfd_link_hash_defweak)
10624 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10625 {
10626 (*_bfd_error_handler)
10627 ((sym_type == STT_TLS
10628 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10629 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10630 input_bfd,
10631 input_section,
10632 (long) rel->r_offset,
10633 howto->name,
10634 name);
10635 }
10636
0855e32b 10637 /* We call elf32_arm_final_link_relocate unless we're completely
99059e56
RM		 10638 done, i.e., the relaxation produced the final output we want,
10639 and we won't let anybody mess with it. Also, we have to do
10640 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10641 both in relaxed and non-relaxed cases */
0855e32b
NS		 10642 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10643 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10644 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10645 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10646 & GOT_TLS_GDESC)))
10647 {
10648 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10649 contents, rel, h == NULL);
10650 /* This may have been marked unresolved because it came from
10651 a shared library. But we've just dealt with that. */
10652 unresolved_reloc = 0;
10653 }
10654 else
10655 r = bfd_reloc_continue;
b38cadfb 10656
0855e32b
NS		 10657 if (r == bfd_reloc_continue)
10658 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10659 input_section, contents, rel,
34e77a92 10660 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10661 (h ? h->target_internal
10662 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10663 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10664
10665 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10666 because such sections are not SEC_ALLOC and thus ld.so will
10667 not process them. */
10668 if (unresolved_reloc
99059e56
RM		 10669 && !((input_section->flags & SEC_DEBUGGING) != 0
10670 && h->def_dynamic)
1d5316ab
AM		 10671 && _bfd_elf_section_offset (output_bfd, info, input_section,
10672 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10673 {
10674 (*_bfd_error_handler)
843fe662
L		 10675 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10676 input_bfd,
10677 input_section,
10678 (long) rel->r_offset,
10679 howto->name,
10680 h->root.root.string);
0945cdfd
DJ		 10681 return FALSE;
10682 }
252b5132
RH		 10683
10684 if (r != bfd_reloc_ok)
10685 {
252b5132
RH		 10686 switch (r)
10687 {
10688 case bfd_reloc_overflow:
cf919dfd
PB		 10689 /* If the overflowing reloc was to an undefined symbol,
10690 we have already printed one error message and there
10691 is no point complaining again. */
10692 if ((! h ||
10693 h->root.type != bfd_link_hash_undefined)
10694 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10695 (info, (h ? &h->root : NULL), name, howto->name,
10696 (bfd_vma) 0, input_bfd, input_section,
10697 rel->r_offset))))
b34976b6 10698 return FALSE;
252b5132
RH		 10699 break;
10700
10701 case bfd_reloc_undefined:
10702 if (!((*info->callbacks->undefined_symbol)
10703 (info, name, input_bfd, input_section,
b34976b6
AM		 10704 rel->r_offset, TRUE)))
10705 return FALSE;
252b5132
RH		 10706 break;
10707
10708 case bfd_reloc_outofrange:
f2a9dd69 10709 error_message = _("out of range");
252b5132
RH		 10710 goto common_error;
10711
10712 case bfd_reloc_notsupported:
f2a9dd69 10713 error_message = _("unsupported relocation");
252b5132
RH		 10714 goto common_error;
10715
10716 case bfd_reloc_dangerous:
f2a9dd69 10717 /* error_message should already be set. */
252b5132
RH		 10718 goto common_error;
10719
10720 default:
f2a9dd69 10721 error_message = _("unknown error");
8029a119 10722 /* Fall through. */
252b5132
RH		 10723
10724 common_error:
f2a9dd69
DJ		 10725 BFD_ASSERT (error_message != NULL);
10726 if (!((*info->callbacks->reloc_dangerous)
10727 (info, error_message, input_bfd, input_section,
252b5132 10728 rel->r_offset)))
b34976b6 10729 return FALSE;
252b5132
RH		 10730 break;
10731 }
10732 }
10733 }
10734
b34976b6 10735 return TRUE;
252b5132
RH		 10736}
10737
91d6fa6a 10738/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10739 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10740 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10741 maintaining that condition). */
10742
10743static void
10744add_unwind_table_edit (arm_unwind_table_edit **head,
10745 arm_unwind_table_edit **tail,
10746 arm_unwind_edit_type type,
10747 asection *linked_section,
91d6fa6a 10748 unsigned int tindex)
2468f9c9 10749{
21d799b5
NC		 10750 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10751 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10752
2468f9c9
PB		 10753 new_edit->type = type;
10754 new_edit->linked_section = linked_section;
91d6fa6a 10755 new_edit->index = tindex;
b38cadfb 10756
91d6fa6a 10757 if (tindex > 0)
2468f9c9
PB		 10758 {
10759 new_edit->next = NULL;
10760
10761 if (*tail)
10762 (*tail)->next = new_edit;
10763
10764 (*tail) = new_edit;
10765
10766 if (!*head)
10767 (*head) = new_edit;
10768 }
10769 else
10770 {
10771 new_edit->next = *head;
10772
10773 if (!*tail)
10774 *tail = new_edit;
10775
10776 *head = new_edit;
10777 }
10778}
10779
10780static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10781
10782/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10783static void
10784adjust_exidx_size(asection *exidx_sec, int adjust)
10785{
10786 asection *out_sec;
10787
10788 if (!exidx_sec->rawsize)
10789 exidx_sec->rawsize = exidx_sec->size;
10790
10791 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10792 out_sec = exidx_sec->output_section;
10793 /* Adjust size of output section. */
10794 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10795}
10796
10797/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10798static void
10799insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10800{
10801 struct _arm_elf_section_data *exidx_arm_data;
10802
10803 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10804 add_unwind_table_edit (
10805 &exidx_arm_data->u.exidx.unwind_edit_list,
10806 &exidx_arm_data->u.exidx.unwind_edit_tail,
10807 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10808
10809 adjust_exidx_size(exidx_sec, 8);
10810}
10811
10812/* Scan .ARM.exidx tables, and create a list describing edits which should be
10813 made to those tables, such that:
b38cadfb 10814
2468f9c9
PB		 10815 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10816 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
99059e56 10817 codes which have been inlined into the index).
2468f9c9 10818
85fdf906
AH		 10819 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10820
2468f9c9 10821 The edits are applied when the tables are written
b38cadfb 10822 (in elf32_arm_write_section). */
2468f9c9
PB		 10823
10824bfd_boolean
10825elf32_arm_fix_exidx_coverage (asection **text_section_order,
10826 unsigned int num_text_sections,
85fdf906
AH		 10827 struct bfd_link_info *info,
10828 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10829{
10830 bfd *inp;
10831 unsigned int last_second_word = 0, i;
10832 asection *last_exidx_sec = NULL;
10833 asection *last_text_sec = NULL;
10834 int last_unwind_type = -1;
10835
10836 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10837 text sections. */
10838 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10839 {
10840 asection *sec;
b38cadfb 10841
2468f9c9 10842 for (sec = inp->sections; sec != NULL; sec = sec->next)
99059e56 10843 {
2468f9c9
PB		 10844 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10845 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10846
dec9d5df 10847 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10848 continue;
b38cadfb 10849
2468f9c9
PB		 10850 if (elf_sec->linked_to)
10851 {
10852 Elf_Internal_Shdr *linked_hdr
99059e56 10853 = &elf_section_data (elf_sec->linked_to)->this_hdr;
2468f9c9 10854 struct _arm_elf_section_data *linked_sec_arm_data
99059e56 10855 = get_arm_elf_section_data (linked_hdr->bfd_section);
2468f9c9
PB		 10856
10857 if (linked_sec_arm_data == NULL)
99059e56 10858 continue;
2468f9c9
PB		 10859
10860 /* Link this .ARM.exidx section back from the text section it
99059e56 10861 describes. */
2468f9c9
PB		 10862 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10863 }
10864 }
10865 }
10866
10867 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10868 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10869 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10870
10871 for (i = 0; i < num_text_sections; i++)
10872 {
10873 asection *sec = text_section_order[i];
10874 asection *exidx_sec;
10875 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10876 struct _arm_elf_section_data *exidx_arm_data;
10877 bfd_byte *contents = NULL;
10878 int deleted_exidx_bytes = 0;
10879 bfd_vma j;
10880 arm_unwind_table_edit *unwind_edit_head = NULL;
10881 arm_unwind_table_edit *unwind_edit_tail = NULL;
10882 Elf_Internal_Shdr *hdr;
10883 bfd *ibfd;
10884
10885 if (arm_data == NULL)
99059e56 10886 continue;
2468f9c9
PB		 10887
10888 exidx_sec = arm_data->u.text.arm_exidx_sec;
10889 if (exidx_sec == NULL)
10890 {
10891 /* Section has no unwind data. */
10892 if (last_unwind_type == 0 || !last_exidx_sec)
10893 continue;
10894
10895 /* Ignore zero sized sections. */
10896 if (sec->size == 0)
10897 continue;
10898
10899 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10900 last_unwind_type = 0;
10901 continue;
10902 }
10903
22a8f80e
PB		 10904 /* Skip /DISCARD/ sections. */
10905 if (bfd_is_abs_section (exidx_sec->output_section))
10906 continue;
10907
2468f9c9
PB		 10908 hdr = &elf_section_data (exidx_sec)->this_hdr;
10909 if (hdr->sh_type != SHT_ARM_EXIDX)
99059e56 10910 continue;
b38cadfb 10911
2468f9c9
PB		 10912 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10913 if (exidx_arm_data == NULL)
99059e56 10914 continue;
b38cadfb 10915
2468f9c9 10916 ibfd = exidx_sec->owner;
b38cadfb 10917
2468f9c9
PB		 10918 if (hdr->contents != NULL)
10919 contents = hdr->contents;
10920 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10921 /* An error? */
10922 continue;
10923
10924 for (j = 0; j < hdr->sh_size; j += 8)
10925 {
10926 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10927 int unwind_type;
10928 int elide = 0;
10929
10930 /* An EXIDX_CANTUNWIND entry. */
10931 if (second_word == 1)
10932 {
10933 if (last_unwind_type == 0)
10934 elide = 1;
10935 unwind_type = 0;
10936 }
10937 /* Inlined unwinding data. Merge if equal to previous. */
10938 else if ((second_word & 0x80000000) != 0)
10939 {
85fdf906
AH		 10940 if (merge_exidx_entries
10941 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 10942 elide = 1;
10943 unwind_type = 1;
10944 last_second_word = second_word;
10945 }
10946 /* Normal table entry. In theory we could merge these too,
10947 but duplicate entries are likely to be much less common. */
10948 else
10949 unwind_type = 2;
10950
10951 if (elide)
10952 {
10953 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10954 DELETE_EXIDX_ENTRY, NULL, j / 8);
10955
10956 deleted_exidx_bytes += 8;
10957 }
10958
10959 last_unwind_type = unwind_type;
10960 }
10961
10962 /* Free contents if we allocated it ourselves. */
10963 if (contents != hdr->contents)
99059e56 10964 free (contents);
2468f9c9
PB		 10965
10966 /* Record edits to be applied later (in elf32_arm_write_section). */
10967 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10968 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 10969
2468f9c9
PB		 10970 if (deleted_exidx_bytes > 0)
10971 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10972
10973 last_exidx_sec = exidx_sec;
10974 last_text_sec = sec;
10975 }
10976
10977 /* Add terminating CANTUNWIND entry. */
10978 if (last_exidx_sec && last_unwind_type != 0)
10979 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10980
10981 return TRUE;
10982}
10983
3e6b1042
DJ		 10984static bfd_boolean
10985elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10986 bfd *ibfd, const char *name)
10987{
10988 asection *sec, *osec;
10989
3d4d4302 10990 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 10991 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10992 return TRUE;
10993
10994 osec = sec->output_section;
10995 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10996 return TRUE;
10997
10998 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10999 sec->output_offset, sec->size))
11000 return FALSE;
11001
11002 return TRUE;
11003}
11004
11005static bfd_boolean
11006elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11007{
11008 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 11009 asection *sec, *osec;
3e6b1042 11010
4dfe6ac6
NC		 11011 if (globals == NULL)
11012 return FALSE;
11013
3e6b1042
DJ		 11014 /* Invoke the regular ELF backend linker to do all the work. */
11015 if (!bfd_elf_final_link (abfd, info))
11016 return FALSE;
11017
fe33d2fa
CL		 11018 /* Process stub sections (eg BE8 encoding, ...). */
11019 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11020 int i;
cdb21a0a
NS		 11021 for (i=0; i<htab->top_id; i++)
11022 {
11023 sec = htab->stub_group[i].stub_sec;
11024 /* Only process it once, in its link_sec slot. */
11025 if (sec && i == htab->stub_group[i].link_sec->id)
11026 {
11027 osec = sec->output_section;
11028 elf32_arm_write_section (abfd, info, sec, sec->contents);
11029 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11030 sec->output_offset, sec->size))
11031 return FALSE;
11032 }
fe33d2fa 11033 }
fe33d2fa 11034
3e6b1042
DJ		 11035 /* Write out any glue sections now that we have created all the
11036 stubs. */
11037 if (globals->bfd_of_glue_owner != NULL)
11038 {
11039 if (! elf32_arm_output_glue_section (info, abfd,
11040 globals->bfd_of_glue_owner,
11041 ARM2THUMB_GLUE_SECTION_NAME))
11042 return FALSE;
11043
11044 if (! elf32_arm_output_glue_section (info, abfd,
11045 globals->bfd_of_glue_owner,
11046 THUMB2ARM_GLUE_SECTION_NAME))
11047 return FALSE;
11048
11049 if (! elf32_arm_output_glue_section (info, abfd,
11050 globals->bfd_of_glue_owner,
11051 VFP11_ERRATUM_VENEER_SECTION_NAME))
11052 return FALSE;
11053
11054 if (! elf32_arm_output_glue_section (info, abfd,
11055 globals->bfd_of_glue_owner,
11056 ARM_BX_GLUE_SECTION_NAME))
11057 return FALSE;
11058 }
11059
11060 return TRUE;
11061}
11062
5968a7b8
NC		 11063/* Return a best guess for the machine number based on the attributes. */
11064
11065static unsigned int
11066bfd_arm_get_mach_from_attributes (bfd * abfd)
11067{
11068 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11069
11070 switch (arch)
11071 {
11072 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11073 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11074 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11075
11076 case TAG_CPU_ARCH_V5TE:
11077 {
11078 char * name;
11079
11080 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11081 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11082
11083 if (name)
11084 {
11085 if (strcmp (name, "IWMMXT2") == 0)
11086 return bfd_mach_arm_iWMMXt2;
11087
11088 if (strcmp (name, "IWMMXT") == 0)
6034aab8 11089 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 11090
11091 if (strcmp (name, "XSCALE") == 0)
11092 {
11093 int wmmx;
11094
11095 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11096 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11097 switch (wmmx)
11098 {
11099 case 1: return bfd_mach_arm_iWMMXt;
11100 case 2: return bfd_mach_arm_iWMMXt2;
11101 default: return bfd_mach_arm_XScale;
11102 }
11103 }
5968a7b8
NC		 11104 }
11105
11106 return bfd_mach_arm_5TE;
11107 }
11108
11109 default:
11110 return bfd_mach_arm_unknown;
11111 }
11112}
11113
c178919b
NC		 11114/* Set the right machine number. */
11115
11116static bfd_boolean
57e8b36a 11117elf32_arm_object_p (bfd *abfd)
c178919b 11118{
5a6c6817 11119 unsigned int mach;
57e8b36a 11120
5a6c6817 11121 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11122
5968a7b8
NC		 11123 if (mach == bfd_mach_arm_unknown)
11124 {
11125 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11126 mach = bfd_mach_arm_ep9312;
11127 else
11128 mach = bfd_arm_get_mach_from_attributes (abfd);
11129 }
c178919b 11130
5968a7b8 11131 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11132 return TRUE;
11133}
11134
fc830a83 11135/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11136
b34976b6 11137static bfd_boolean
57e8b36a 11138elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11139{
11140 if (elf_flags_init (abfd)
11141 && elf_elfheader (abfd)->e_flags != flags)
11142 {
fc830a83
NC		 11143 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11144 {
fd2ec330 11145 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11146 (*_bfd_error_handler)
11147 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11148 abfd);
fc830a83 11149 else
d003868e
AM		 11150 _bfd_error_handler
11151 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11152 abfd);
fc830a83 11153 }
252b5132
RH		 11154 }
11155 else
11156 {
11157 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11158 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11159 }
11160
b34976b6 11161 return TRUE;
252b5132
RH		 11162}
11163
fc830a83 11164/* Copy backend specific data from one object module to another. */
9b485d32 11165
b34976b6 11166static bfd_boolean
57e8b36a 11167elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11168{
11169 flagword in_flags;
11170 flagword out_flags;
11171
0ffa91dd 11172 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11173 return TRUE;
252b5132 11174
fc830a83 11175 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11176 out_flags = elf_elfheader (obfd)->e_flags;
11177
fc830a83
NC		 11178 if (elf_flags_init (obfd)
11179 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11180 && in_flags != out_flags)
252b5132 11181 {
252b5132 11182 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11183 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11184 return FALSE;
252b5132
RH		 11185
11186 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11187 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11188 return FALSE;
252b5132
RH		 11189
11190 /* If the src and dest have different interworking flags
99059e56 11191 then turn off the interworking bit. */
fd2ec330 11192 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11193 {
fd2ec330 11194 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11195 _bfd_error_handler
11196 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11197 obfd, ibfd);
252b5132 11198
fd2ec330 11199 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11200 }
1006ba19
PB		 11201
11202 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11203 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11204 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11205 }
11206
11207 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11208 elf_flags_init (obfd) = TRUE;
252b5132 11209
e2349352 11210 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
ee065d83
PB		 11211}
11212
11213/* Values for Tag_ABI_PCS_R9_use. */
11214enum
11215{
11216 AEABI_R9_V6,
11217 AEABI_R9_SB,
11218 AEABI_R9_TLS,
11219 AEABI_R9_unused
11220};
11221
11222/* Values for Tag_ABI_PCS_RW_data. */
11223enum
11224{
11225 AEABI_PCS_RW_data_absolute,
11226 AEABI_PCS_RW_data_PCrel,
11227 AEABI_PCS_RW_data_SBrel,
11228 AEABI_PCS_RW_data_unused
11229};
11230
11231/* Values for Tag_ABI_enum_size. */
11232enum
11233{
11234 AEABI_enum_unused,
11235 AEABI_enum_short,
11236 AEABI_enum_wide,
11237 AEABI_enum_forced_wide
11238};
11239
104d59d1
JM		 11240/* Determine whether an object attribute tag takes an integer, a
11241 string or both. */
906e58ca 11242
104d59d1
JM		 11243static int
11244elf32_arm_obj_attrs_arg_type (int tag)
11245{
11246 if (tag == Tag_compatibility)
3483fe2e 11247 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11248 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11249 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11250 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11251 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11252 else if (tag < 32)
3483fe2e 11253 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11254 else
3483fe2e 11255 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11256}
11257
5aa6ff7c
AS		 11258/* The ABI defines that Tag_conformance should be emitted first, and that
11259 Tag_nodefaults should be second (if either is defined). This sets those
11260 two positions, and bumps up the position of all the remaining tags to
11261 compensate. */
11262static int
11263elf32_arm_obj_attrs_order (int num)
11264{
3de4a297 11265 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11266 return Tag_conformance;
3de4a297 11267 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11268 return Tag_nodefaults;
11269 if ((num - 2) < Tag_nodefaults)
11270 return num - 2;
11271 if ((num - 1) < Tag_conformance)
11272 return num - 1;
11273 return num;
11274}
11275
e8b36cd1
JM		 11276/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11277static bfd_boolean
11278elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11279{
11280 if ((tag & 127) < 64)
11281 {
11282 _bfd_error_handler
11283 (_("%B: Unknown mandatory EABI object attribute %d"),
11284 abfd, tag);
11285 bfd_set_error (bfd_error_bad_value);
11286 return FALSE;
11287 }
11288 else
11289 {
11290 _bfd_error_handler
11291 (_("Warning: %B: Unknown EABI object attribute %d"),
11292 abfd, tag);
11293 return TRUE;
11294 }
11295}
11296
91e22acd
AS		 11297/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11298 Returns -1 if no architecture could be read. */
11299
11300static int
11301get_secondary_compatible_arch (bfd *abfd)
11302{
11303 obj_attribute *attr =
11304 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11305
11306 /* Note: the tag and its argument below are uleb128 values, though
11307 currently-defined values fit in one byte for each. */
11308 if (attr->s
11309 && attr->s[0] == Tag_CPU_arch
11310 && (attr->s[1] & 128) != 128
11311 && attr->s[2] == 0)
11312 return attr->s[1];
11313
11314 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11315 return -1;
11316}
11317
11318/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11319 The tag is removed if ARCH is -1. */
11320
8e79c3df 11321static void
91e22acd 11322set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11323{
91e22acd
AS		 11324 obj_attribute *attr =
11325 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11326
91e22acd
AS		 11327 if (arch == -1)
11328 {
11329 attr->s = NULL;
11330 return;
8e79c3df 11331 }
91e22acd
AS		 11332
11333 /* Note: the tag and its argument below are uleb128 values, though
11334 currently-defined values fit in one byte for each. */
11335 if (!attr->s)
21d799b5 11336 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11337 attr->s[0] = Tag_CPU_arch;
11338 attr->s[1] = arch;
11339 attr->s[2] = '\0';
8e79c3df
CM		 11340}
11341
91e22acd
AS		 11342/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11343 into account. */
11344
11345static int
11346tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11347 int newtag, int secondary_compat)
8e79c3df 11348{
91e22acd
AS		 11349#define T(X) TAG_CPU_ARCH_##X
11350 int tagl, tagh, result;
11351 const int v6t2[] =
11352 {
11353 T(V6T2), /* PRE_V4. */
11354 T(V6T2), /* V4. */
11355 T(V6T2), /* V4T. */
11356 T(V6T2), /* V5T. */
11357 T(V6T2), /* V5TE. */
11358 T(V6T2), /* V5TEJ. */
11359 T(V6T2), /* V6. */
11360 T(V7), /* V6KZ. */
11361 T(V6T2) /* V6T2. */
11362 };
11363 const int v6k[] =
11364 {
11365 T(V6K), /* PRE_V4. */
11366 T(V6K), /* V4. */
11367 T(V6K), /* V4T. */
11368 T(V6K), /* V5T. */
11369 T(V6K), /* V5TE. */
11370 T(V6K), /* V5TEJ. */
11371 T(V6K), /* V6. */
11372 T(V6KZ), /* V6KZ. */
11373 T(V7), /* V6T2. */
11374 T(V6K) /* V6K. */
11375 };
11376 const int v7[] =
11377 {
11378 T(V7), /* PRE_V4. */
11379 T(V7), /* V4. */
11380 T(V7), /* V4T. */
11381 T(V7), /* V5T. */
11382 T(V7), /* V5TE. */
11383 T(V7), /* V5TEJ. */
11384 T(V7), /* V6. */
11385 T(V7), /* V6KZ. */
11386 T(V7), /* V6T2. */
11387 T(V7), /* V6K. */
11388 T(V7) /* V7. */
11389 };
11390 const int v6_m[] =
11391 {
11392 -1, /* PRE_V4. */
11393 -1, /* V4. */
11394 T(V6K), /* V4T. */
11395 T(V6K), /* V5T. */
11396 T(V6K), /* V5TE. */
11397 T(V6K), /* V5TEJ. */
11398 T(V6K), /* V6. */
11399 T(V6KZ), /* V6KZ. */
11400 T(V7), /* V6T2. */
11401 T(V6K), /* V6K. */
11402 T(V7), /* V7. */
11403 T(V6_M) /* V6_M. */
11404 };
11405 const int v6s_m[] =
11406 {
11407 -1, /* PRE_V4. */
11408 -1, /* V4. */
11409 T(V6K), /* V4T. */
11410 T(V6K), /* V5T. */
11411 T(V6K), /* V5TE. */
11412 T(V6K), /* V5TEJ. */
11413 T(V6K), /* V6. */
11414 T(V6KZ), /* V6KZ. */
11415 T(V7), /* V6T2. */
11416 T(V6K), /* V6K. */
11417 T(V7), /* V7. */
11418 T(V6S_M), /* V6_M. */
11419 T(V6S_M) /* V6S_M. */
11420 };
9e3c6df6
PB		 11421 const int v7e_m[] =
11422 {
11423 -1, /* PRE_V4. */
11424 -1, /* V4. */
11425 T(V7E_M), /* V4T. */
11426 T(V7E_M), /* V5T. */
11427 T(V7E_M), /* V5TE. */
11428 T(V7E_M), /* V5TEJ. */
11429 T(V7E_M), /* V6. */
11430 T(V7E_M), /* V6KZ. */
11431 T(V7E_M), /* V6T2. */
11432 T(V7E_M), /* V6K. */
11433 T(V7E_M), /* V7. */
11434 T(V7E_M), /* V6_M. */
11435 T(V7E_M), /* V6S_M. */
11436 T(V7E_M) /* V7E_M. */
11437 };
bca38921
MGD		 11438 const int v8[] =
11439 {
11440 T(V8), /* PRE_V4. */
11441 T(V8), /* V4. */
11442 T(V8), /* V4T. */
11443 T(V8), /* V5T. */
11444 T(V8), /* V5TE. */
11445 T(V8), /* V5TEJ. */
11446 T(V8), /* V6. */
11447 T(V8), /* V6KZ. */
11448 T(V8), /* V6T2. */
11449 T(V8), /* V6K. */
11450 T(V8), /* V7. */
11451 T(V8), /* V6_M. */
11452 T(V8), /* V6S_M. */
11453 T(V8), /* V7E_M. */
11454 T(V8) /* V8. */
11455 };
91e22acd
AS		 11456 const int v4t_plus_v6_m[] =
11457 {
11458 -1, /* PRE_V4. */
11459 -1, /* V4. */
11460 T(V4T), /* V4T. */
11461 T(V5T), /* V5T. */
11462 T(V5TE), /* V5TE. */
11463 T(V5TEJ), /* V5TEJ. */
11464 T(V6), /* V6. */
11465 T(V6KZ), /* V6KZ. */
11466 T(V6T2), /* V6T2. */
11467 T(V6K), /* V6K. */
11468 T(V7), /* V7. */
11469 T(V6_M), /* V6_M. */
11470 T(V6S_M), /* V6S_M. */
9e3c6df6 11471 T(V7E_M), /* V7E_M. */
bca38921 11472 T(V8), /* V8. */
91e22acd
AS		 11473 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11474 };
11475 const int *comb[] =
11476 {
11477 v6t2,
11478 v6k,
11479 v7,
11480 v6_m,
11481 v6s_m,
9e3c6df6 11482 v7e_m,
bca38921 11483 v8,
91e22acd
AS		 11484 /* Pseudo-architecture. */
11485 v4t_plus_v6_m
11486 };
11487
11488 /* Check we've not got a higher architecture than we know about. */
11489
9e3c6df6 11490 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11491 {
3895f852 11492 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11493 return -1;
11494 }
11495
11496 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11497
11498 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11499 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11500 oldtag = T(V4T_PLUS_V6_M);
11501
11502 /* And override the new tag if we have a Tag_also_compatible_with on the
11503 input. */
11504
11505 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11506 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11507 newtag = T(V4T_PLUS_V6_M);
11508
11509 tagl = (oldtag < newtag) ? oldtag : newtag;
11510 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11511
11512 /* Architectures before V6KZ add features monotonically. */
11513 if (tagh <= TAG_CPU_ARCH_V6KZ)
11514 return result;
11515
11516 result = comb[tagh - T(V6T2)][tagl];
11517
11518 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11519 as the canonical version. */
11520 if (result == T(V4T_PLUS_V6_M))
11521 {
11522 result = T(V4T);
11523 *secondary_compat_out = T(V6_M);
11524 }
11525 else
11526 *secondary_compat_out = -1;
11527
11528 if (result == -1)
11529 {
3895f852 11530 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11531 ibfd, oldtag, newtag);
11532 return -1;
11533 }
11534
11535 return result;
11536#undef T
8e79c3df
CM		 11537}
11538
ac56ee8f
MGD		 11539/* Query attributes object to see if integer divide instructions may be
11540 present in an object. */
11541static bfd_boolean
11542elf32_arm_attributes_accept_div (const obj_attribute *attr)
11543{
11544 int arch = attr[Tag_CPU_arch].i;
11545 int profile = attr[Tag_CPU_arch_profile].i;
11546
11547 switch (attr[Tag_DIV_use].i)
11548 {
11549 case 0:
11550 /* Integer divide allowed if instruction contained in archetecture. */
11551 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11552 return TRUE;
11553 else if (arch >= TAG_CPU_ARCH_V7E_M)
11554 return TRUE;
11555 else
11556 return FALSE;
11557
11558 case 1:
11559 /* Integer divide explicitly prohibited. */
11560 return FALSE;
11561
11562 default:
11563 /* Unrecognised case - treat as allowing divide everywhere. */
11564 case 2:
11565 /* Integer divide allowed in ARM state. */
11566 return TRUE;
11567 }
11568}
11569
11570/* Query attributes object to see if integer divide instructions are
11571 forbidden to be in the object. This is not the inverse of
11572 elf32_arm_attributes_accept_div. */
11573static bfd_boolean
11574elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11575{
11576 return attr[Tag_DIV_use].i == 1;
11577}
11578
ee065d83
PB		 11579/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11580 are conflicting attributes. */
906e58ca 11581
ee065d83
PB		 11582static bfd_boolean
11583elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11584{
104d59d1
JM		 11585 obj_attribute *in_attr;
11586 obj_attribute *out_attr;
ee065d83
PB		 11587 /* Some tags have 0 = don't care, 1 = strong requirement,
11588 2 = weak requirement. */
91e22acd 11589 static const int order_021[3] = {0, 2, 1};
ee065d83 11590 int i;
91e22acd 11591 bfd_boolean result = TRUE;
ee065d83 11592
3e6b1042
DJ		 11593 /* Skip the linker stubs file. This preserves previous behavior
11594 of accepting unknown attributes in the first input file - but
11595 is that a bug? */
11596 if (ibfd->flags & BFD_LINKER_CREATED)
11597 return TRUE;
11598
104d59d1 11599 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11600 {
11601 /* This is the first object. Copy the attributes. */
104d59d1 11602 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11603
cd21e546
MGD		 11604 out_attr = elf_known_obj_attributes_proc (obfd);
11605
004ae526
PB		 11606 /* Use the Tag_null value to indicate the attributes have been
11607 initialized. */
cd21e546 11608 out_attr[0].i = 1;
004ae526 11609
cd21e546
MGD		 11610 /* We do not output objects with Tag_MPextension_use_legacy - we move
11611 the attribute's value to Tag_MPextension_use. */
11612 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11613 {
11614 if (out_attr[Tag_MPextension_use].i != 0
11615 && out_attr[Tag_MPextension_use_legacy].i
99059e56 11616 != out_attr[Tag_MPextension_use].i)
cd21e546
MGD		 11617 {
11618 _bfd_error_handler
11619 (_("Error: %B has both the current and legacy "
11620 "Tag_MPextension_use attributes"), ibfd);
11621 result = FALSE;
11622 }
11623
11624 out_attr[Tag_MPextension_use] =
11625 out_attr[Tag_MPextension_use_legacy];
11626 out_attr[Tag_MPextension_use_legacy].type = 0;
11627 out_attr[Tag_MPextension_use_legacy].i = 0;
11628 }
11629
11630 return result;
ee065d83
PB		 11631 }
11632
104d59d1
JM		 11633 in_attr = elf_known_obj_attributes_proc (ibfd);
11634 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11635 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11636 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11637 {
8e79c3df 11638 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11639 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11640 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11641 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11642 {
11643 _bfd_error_handler
3895f852 11644 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11645 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11646 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11647 result = FALSE;
ee065d83
PB		 11648 }
11649 }
11650
3de4a297 11651 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11652 {
11653 /* Merge this attribute with existing attributes. */
11654 switch (i)
11655 {
11656 case Tag_CPU_raw_name:
11657 case Tag_CPU_name:
91e22acd 11658 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11659 break;
11660
11661 case Tag_ABI_optimization_goals:
11662 case Tag_ABI_FP_optimization_goals:
11663 /* Use the first value seen. */
11664 break;
11665
11666 case Tag_CPU_arch:
91e22acd
AS		 11667 {
11668 int secondary_compat = -1, secondary_compat_out = -1;
11669 unsigned int saved_out_attr = out_attr[i].i;
11670 static const char *name_table[] = {
11671 /* These aren't real CPU names, but we can't guess
11672 that from the architecture version alone. */
11673 "Pre v4",
11674 "ARM v4",
11675 "ARM v4T",
11676 "ARM v5T",
11677 "ARM v5TE",
11678 "ARM v5TEJ",
11679 "ARM v6",
11680 "ARM v6KZ",
11681 "ARM v6T2",
11682 "ARM v6K",
11683 "ARM v7",
11684 "ARM v6-M",
bca38921
MGD		 11685 "ARM v6S-M",
11686 "ARM v8"
91e22acd
AS		 11687 };
11688
11689 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11690 secondary_compat = get_secondary_compatible_arch (ibfd);
11691 secondary_compat_out = get_secondary_compatible_arch (obfd);
11692 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11693 &secondary_compat_out,
11694 in_attr[i].i,
11695 secondary_compat);
11696 set_secondary_compatible_arch (obfd, secondary_compat_out);
11697
11698 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11699 if (out_attr[i].i == saved_out_attr)
11700 ; /* Leave the names alone. */
11701 else if (out_attr[i].i == in_attr[i].i)
11702 {
11703 /* The output architecture has been changed to match the
11704 input architecture. Use the input names. */
11705 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11706 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11707 : NULL;
11708 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11709 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11710 : NULL;
11711 }
11712 else
11713 {
11714 out_attr[Tag_CPU_name].s = NULL;
11715 out_attr[Tag_CPU_raw_name].s = NULL;
11716 }
11717
11718 /* If we still don't have a value for Tag_CPU_name,
11719 make one up now. Tag_CPU_raw_name remains blank. */
11720 if (out_attr[Tag_CPU_name].s == NULL
11721 && out_attr[i].i < ARRAY_SIZE (name_table))
11722 out_attr[Tag_CPU_name].s =
11723 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11724 }
11725 break;
11726
ee065d83
PB		 11727 case Tag_ARM_ISA_use:
11728 case Tag_THUMB_ISA_use:
ee065d83 11729 case Tag_WMMX_arch:
91e22acd
AS		 11730 case Tag_Advanced_SIMD_arch:
11731 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11732 case Tag_ABI_FP_rounding:
ee065d83
PB		 11733 case Tag_ABI_FP_exceptions:
11734 case Tag_ABI_FP_user_exceptions:
11735 case Tag_ABI_FP_number_model:
75375b3e 11736 case Tag_FP_HP_extension:
91e22acd
AS		 11737 case Tag_CPU_unaligned_access:
11738 case Tag_T2EE_use:
91e22acd 11739 case Tag_MPextension_use:
ee065d83
PB		 11740 /* Use the largest value specified. */
11741 if (in_attr[i].i > out_attr[i].i)
11742 out_attr[i].i = in_attr[i].i;
11743 break;
11744
75375b3e 11745 case Tag_ABI_align_preserved:
91e22acd
AS		 11746 case Tag_ABI_PCS_RO_data:
11747 /* Use the smallest value specified. */
11748 if (in_attr[i].i < out_attr[i].i)
11749 out_attr[i].i = in_attr[i].i;
11750 break;
11751
75375b3e 11752 case Tag_ABI_align_needed:
91e22acd 11753 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11754 && (in_attr[Tag_ABI_align_preserved].i == 0
11755 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11756 {
91e22acd
AS		 11757 /* This error message should be enabled once all non-conformant
11758 binaries in the toolchain have had the attributes set
11759 properly.
ee065d83 11760 _bfd_error_handler
3895f852 11761 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11762 obfd, ibfd);
11763 result = FALSE; */
ee065d83 11764 }
91e22acd
AS		 11765 /* Fall through. */
11766 case Tag_ABI_FP_denormal:
11767 case Tag_ABI_PCS_GOT_use:
11768 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11769 value if greater than 2 (for future-proofing). */
11770 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11771 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11772 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11773 out_attr[i].i = in_attr[i].i;
11774 break;
91e22acd 11775
75375b3e
MGD		 11776 case Tag_Virtualization_use:
11777 /* The virtualization tag effectively stores two bits of
11778 information: the intended use of TrustZone (in bit 0), and the
11779 intended use of Virtualization (in bit 1). */
11780 if (out_attr[i].i == 0)
11781 out_attr[i].i = in_attr[i].i;
11782 else if (in_attr[i].i != 0
11783 && in_attr[i].i != out_attr[i].i)
11784 {
11785 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11786 out_attr[i].i = 3;
11787 else
11788 {
11789 _bfd_error_handler
11790 (_("error: %B: unable to merge virtualization attributes "
11791 "with %B"),
11792 obfd, ibfd);
11793 result = FALSE;
11794 }
11795 }
11796 break;
91e22acd
AS		 11797
11798 case Tag_CPU_arch_profile:
11799 if (out_attr[i].i != in_attr[i].i)
11800 {
11801 /* 0 will merge with anything.
11802 'A' and 'S' merge to 'A'.
11803 'R' and 'S' merge to 'R'.
99059e56 11804 'M' and 'A|R|S' is an error. */
91e22acd
AS		 11805 if (out_attr[i].i == 0
11806 || (out_attr[i].i == 'S'
11807 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11808 out_attr[i].i = in_attr[i].i;
11809 else if (in_attr[i].i == 0
11810 || (in_attr[i].i == 'S'
11811 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11812 ; /* Do nothing. */
11813 else
11814 {
11815 _bfd_error_handler
3895f852 11816 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11817 ibfd,
11818 in_attr[i].i ? in_attr[i].i : '0',
11819 out_attr[i].i ? out_attr[i].i : '0');
11820 result = FALSE;
11821 }
11822 }
11823 break;
75375b3e 11824 case Tag_FP_arch:
62f3b8c8 11825 {
4547cb56
NC		 11826 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11827 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11828 when it's 0. It might mean absence of FP hardware if
11829 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11830
bca38921 11831#define VFP_VERSION_COUNT 8
62f3b8c8
PB		 11832 static const struct
11833 {
11834 int ver;
11835 int regs;
bca38921 11836 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11837 {
11838 {0, 0},
11839 {1, 16},
11840 {2, 16},
11841 {3, 32},
11842 {3, 16},
11843 {4, 32},
bca38921
MGD		 11844 {4, 16},
11845 {8, 32}
62f3b8c8
PB		 11846 };
11847 int ver;
11848 int regs;
11849 int newval;
11850
4547cb56
NC		 11851 /* If the output has no requirement about FP hardware,
11852 follow the requirement of the input. */
11853 if (out_attr[i].i == 0)
11854 {
11855 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11856 out_attr[i].i = in_attr[i].i;
11857 out_attr[Tag_ABI_HardFP_use].i
11858 = in_attr[Tag_ABI_HardFP_use].i;
11859 break;
11860 }
11861 /* If the input has no requirement about FP hardware, do
11862 nothing. */
11863 else if (in_attr[i].i == 0)
11864 {
11865 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11866 break;
11867 }
11868
11869 /* Both the input and the output have nonzero Tag_FP_arch.
11870 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11871
11872 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11873 do nothing. */
11874 if (in_attr[Tag_ABI_HardFP_use].i == 0
11875 && out_attr[Tag_ABI_HardFP_use].i == 0)
11876 ;
11877 /* If the input and the output have different Tag_ABI_HardFP_use,
11878 the combination of them is 3 (SP & DP). */
11879 else if (in_attr[Tag_ABI_HardFP_use].i
11880 != out_attr[Tag_ABI_HardFP_use].i)
11881 out_attr[Tag_ABI_HardFP_use].i = 3;
11882
11883 /* Now we can handle Tag_FP_arch. */
11884
bca38921
MGD		 11885 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11886 pick the biggest. */
11887 if (in_attr[i].i >= VFP_VERSION_COUNT
11888 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 11889 {
11890 out_attr[i] = in_attr[i];
11891 break;
11892 }
11893 /* The output uses the superset of input features
11894 (ISA version) and registers. */
11895 ver = vfp_versions[in_attr[i].i].ver;
11896 if (ver < vfp_versions[out_attr[i].i].ver)
11897 ver = vfp_versions[out_attr[i].i].ver;
11898 regs = vfp_versions[in_attr[i].i].regs;
11899 if (regs < vfp_versions[out_attr[i].i].regs)
11900 regs = vfp_versions[out_attr[i].i].regs;
11901 /* This assumes all possible supersets are also a valid
99059e56 11902 options. */
bca38921 11903 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 11904 {
11905 if (regs == vfp_versions[newval].regs
11906 && ver == vfp_versions[newval].ver)
11907 break;
11908 }
11909 out_attr[i].i = newval;
11910 }
b1cc4aeb 11911 break;
ee065d83
PB		 11912 case Tag_PCS_config:
11913 if (out_attr[i].i == 0)
11914 out_attr[i].i = in_attr[i].i;
b6009aca 11915 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11916 {
11917 /* It's sometimes ok to mix different configs, so this is only
99059e56 11918 a warning. */
ee065d83
PB		 11919 _bfd_error_handler
11920 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11921 }
11922 break;
11923 case Tag_ABI_PCS_R9_use:
004ae526
PB		 11924 if (in_attr[i].i != out_attr[i].i
11925 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 11926 && in_attr[i].i != AEABI_R9_unused)
11927 {
11928 _bfd_error_handler
3895f852 11929 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 11930 result = FALSE;
ee065d83
PB		 11931 }
11932 if (out_attr[i].i == AEABI_R9_unused)
11933 out_attr[i].i = in_attr[i].i;
11934 break;
11935 case Tag_ABI_PCS_RW_data:
11936 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11937 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11938 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11939 {
11940 _bfd_error_handler
3895f852 11941 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 11942 ibfd);
91e22acd 11943 result = FALSE;
ee065d83
PB		 11944 }
11945 /* Use the smallest value specified. */
11946 if (in_attr[i].i < out_attr[i].i)
11947 out_attr[i].i = in_attr[i].i;
11948 break;
ee065d83 11949 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 11950 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11951 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 11952 {
11953 _bfd_error_handler
a9dc9481
JM		 11954 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11955 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 11956 }
a9dc9481 11957 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 11958 out_attr[i].i = in_attr[i].i;
11959 break;
ee065d83
PB		 11960 case Tag_ABI_enum_size:
11961 if (in_attr[i].i != AEABI_enum_unused)
11962 {
11963 if (out_attr[i].i == AEABI_enum_unused
11964 || out_attr[i].i == AEABI_enum_forced_wide)
11965 {
11966 /* The existing object is compatible with anything.
11967 Use whatever requirements the new object has. */
11968 out_attr[i].i = in_attr[i].i;
11969 }
11970 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 11971 && out_attr[i].i != in_attr[i].i
0ffa91dd 11972 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 11973 {
91e22acd 11974 static const char *aeabi_enum_names[] =
bf21ed78 11975 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 11976 const char *in_name =
11977 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11978 ? aeabi_enum_names[in_attr[i].i]
11979 : "<unknown>";
11980 const char *out_name =
11981 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11982 ? aeabi_enum_names[out_attr[i].i]
11983 : "<unknown>";
ee065d83 11984 _bfd_error_handler
bf21ed78 11985 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 11986 ibfd, in_name, out_name);
ee065d83
PB		 11987 }
11988 }
11989 break;
11990 case Tag_ABI_VFP_args:
11991 /* Aready done. */
11992 break;
11993 case Tag_ABI_WMMX_args:
11994 if (in_attr[i].i != out_attr[i].i)
11995 {
11996 _bfd_error_handler
3895f852 11997 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 11998 ibfd, obfd);
91e22acd 11999 result = FALSE;
ee065d83
PB		 12000 }
12001 break;
7b86a9fa
AS		 12002 case Tag_compatibility:
12003 /* Merged in target-independent code. */
12004 break;
91e22acd 12005 case Tag_ABI_HardFP_use:
4547cb56 12006 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 12007 break;
12008 case Tag_ABI_FP_16bit_format:
12009 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12010 {
12011 if (in_attr[i].i != out_attr[i].i)
12012 {
12013 _bfd_error_handler
3895f852 12014 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 12015 ibfd, obfd);
12016 result = FALSE;
12017 }
12018 }
12019 if (in_attr[i].i != 0)
12020 out_attr[i].i = in_attr[i].i;
12021 break;
7b86a9fa 12022
cd21e546 12023 case Tag_DIV_use:
ac56ee8f
MGD		 12024 /* A value of zero on input means that the divide instruction may
12025 be used if available in the base architecture as specified via
12026 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12027 the user did not want divide instructions. A value of 2
12028 explicitly means that divide instructions were allowed in ARM
12029 and Thumb state. */
12030 if (in_attr[i].i == out_attr[i].i)
12031 /* Do nothing. */ ;
12032 else if (elf32_arm_attributes_forbid_div (in_attr)
12033 && !elf32_arm_attributes_accept_div (out_attr))
12034 out_attr[i].i = 1;
12035 else if (elf32_arm_attributes_forbid_div (out_attr)
12036 && elf32_arm_attributes_accept_div (in_attr))
12037 out_attr[i].i = in_attr[i].i;
12038 else if (in_attr[i].i == 2)
12039 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 12040 break;
12041
12042 case Tag_MPextension_use_legacy:
12043 /* We don't output objects with Tag_MPextension_use_legacy - we
12044 move the value to Tag_MPextension_use. */
12045 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12046 {
12047 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12048 {
12049 _bfd_error_handler
12050 (_("%B has has both the current and legacy "
b38cadfb 12051 "Tag_MPextension_use attributes"),
cd21e546
MGD		 12052 ibfd);
12053 result = FALSE;
12054 }
12055 }
12056
12057 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12058 out_attr[Tag_MPextension_use] = in_attr[i];
12059
12060 break;
12061
91e22acd 12062 case Tag_nodefaults:
2d0bb761
AS		 12063 /* This tag is set if it exists, but the value is unused (and is
12064 typically zero). We don't actually need to do anything here -
12065 the merge happens automatically when the type flags are merged
12066 below. */
91e22acd
AS		 12067 break;
12068 case Tag_also_compatible_with:
12069 /* Already done in Tag_CPU_arch. */
12070 break;
12071 case Tag_conformance:
12072 /* Keep the attribute if it matches. Throw it away otherwise.
12073 No attribute means no claim to conform. */
12074 if (!in_attr[i].s || !out_attr[i].s
12075 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12076 out_attr[i].s = NULL;
12077 break;
3cfad14c 12078
91e22acd 12079 default:
e8b36cd1
JM		 12080 result
12081 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 12082 }
12083
12084 /* If out_attr was copied from in_attr then it won't have a type yet. */
12085 if (in_attr[i].type && !out_attr[i].type)
12086 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 12087 }
12088
104d59d1 12089 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 12090 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12091 return FALSE;
ee065d83 12092
104d59d1 12093 /* Check for any attributes not known on ARM. */
e8b36cd1 12094 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 12095
91e22acd 12096 return result;
252b5132
RH		 12097}
12098
3a4a14e9
PB		 12099
12100/* Return TRUE if the two EABI versions are incompatible. */
12101
12102static bfd_boolean
12103elf32_arm_versions_compatible (unsigned iver, unsigned over)
12104{
12105 /* v4 and v5 are the same spec before and after it was released,
12106 so allow mixing them. */
12107 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12108 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12109 return TRUE;
12110
12111 return (iver == over);
12112}
12113
252b5132
RH		 12114/* Merge backend specific data from an object file to the output
12115 object file when linking. */
9b485d32 12116
b34976b6 12117static bfd_boolean
21d799b5 12118elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12119
9b485d32
NC		 12120/* Display the flags field. */
12121
b34976b6 12122static bfd_boolean
57e8b36a 12123elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12124{
fc830a83
NC		 12125 FILE * file = (FILE *) ptr;
12126 unsigned long flags;
252b5132
RH		 12127
12128 BFD_ASSERT (abfd != NULL && ptr != NULL);
12129
12130 /* Print normal ELF private data. */
12131 _bfd_elf_print_private_bfd_data (abfd, ptr);
12132
fc830a83 12133 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12134 /* Ignore init flag - it may not be set, despite the flags field
12135 containing valid data. */
252b5132
RH		 12136
12137 /* xgettext:c-format */
9b485d32 12138 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12139
fc830a83
NC		 12140 switch (EF_ARM_EABI_VERSION (flags))
12141 {
12142 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12143 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12144 official ARM ELF extended ABI. Hence they are only decoded if
12145 the EABI version is not set. */
fd2ec330 12146 if (flags & EF_ARM_INTERWORK)
9b485d32 12147 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12148
fd2ec330 12149 if (flags & EF_ARM_APCS_26)
6c571f00 12150 fprintf (file, " [APCS-26]");
fc830a83 12151 else
6c571f00 12152 fprintf (file, " [APCS-32]");
9a5aca8c 12153
96a846ea
RE		 12154 if (flags & EF_ARM_VFP_FLOAT)
12155 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12156 else if (flags & EF_ARM_MAVERICK_FLOAT)
12157 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12158 else
12159 fprintf (file, _(" [FPA float format]"));
12160
fd2ec330 12161 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12162 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12163
fd2ec330 12164 if (flags & EF_ARM_PIC)
9b485d32 12165 fprintf (file, _(" [position independent]"));
fc830a83 12166
fd2ec330 12167 if (flags & EF_ARM_NEW_ABI)
9b485d32 12168 fprintf (file, _(" [new ABI]"));
9a5aca8c 12169
fd2ec330 12170 if (flags & EF_ARM_OLD_ABI)
9b485d32 12171 fprintf (file, _(" [old ABI]"));
9a5aca8c 12172
fd2ec330 12173 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12174 fprintf (file, _(" [software FP]"));
9a5aca8c 12175
96a846ea
RE		 12176 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12177 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12178 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12179 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12180 break;
9a5aca8c 12181
fc830a83 12182 case EF_ARM_EABI_VER1:
9b485d32 12183 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12184
fc830a83 12185 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12186 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12187 else
9b485d32 12188 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12189
fc830a83
NC		 12190 flags &= ~ EF_ARM_SYMSARESORTED;
12191 break;
9a5aca8c 12192
fd2ec330
PB		 12193 case EF_ARM_EABI_VER2:
12194 fprintf (file, _(" [Version2 EABI]"));
12195
12196 if (flags & EF_ARM_SYMSARESORTED)
12197 fprintf (file, _(" [sorted symbol table]"));
12198 else
12199 fprintf (file, _(" [unsorted symbol table]"));
12200
12201 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12202 fprintf (file, _(" [dynamic symbols use segment index]"));
12203
12204 if (flags & EF_ARM_MAPSYMSFIRST)
12205 fprintf (file, _(" [mapping symbols precede others]"));
12206
99e4ae17 12207 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12208 | EF_ARM_MAPSYMSFIRST);
12209 break;
12210
d507cf36
PB		 12211 case EF_ARM_EABI_VER3:
12212 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12213 break;
12214
12215 case EF_ARM_EABI_VER4:
12216 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12217 goto eabi;
d507cf36 12218
3a4a14e9
PB		 12219 case EF_ARM_EABI_VER5:
12220 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12221
12222 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12223 fprintf (file, _(" [soft-float ABI]"));
12224
12225 if (flags & EF_ARM_ABI_FLOAT_HARD)
12226 fprintf (file, _(" [hard-float ABI]"));
12227
12228 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12229
3a4a14e9 12230 eabi:
d507cf36
PB		 12231 if (flags & EF_ARM_BE8)
12232 fprintf (file, _(" [BE8]"));
12233
12234 if (flags & EF_ARM_LE8)
12235 fprintf (file, _(" [LE8]"));
12236
12237 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12238 break;
12239
fc830a83 12240 default:
9b485d32 12241 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12242 break;
12243 }
252b5132 12244
fc830a83 12245 flags &= ~ EF_ARM_EABIMASK;
252b5132 12246
fc830a83 12247 if (flags & EF_ARM_RELEXEC)
9b485d32 12248 fprintf (file, _(" [relocatable executable]"));
252b5132 12249
fc830a83 12250 if (flags & EF_ARM_HASENTRY)
9b485d32 12251 fprintf (file, _(" [has entry point]"));
252b5132 12252
fc830a83
NC		 12253 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12254
12255 if (flags)
9b485d32 12256 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12257
252b5132
RH		 12258 fputc ('\n', file);
12259
b34976b6 12260 return TRUE;
252b5132
RH		 12261}
12262
12263static int
57e8b36a 12264elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12265{
2f0ca46a
NC		 12266 switch (ELF_ST_TYPE (elf_sym->st_info))
12267 {
12268 case STT_ARM_TFUNC:
12269 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12270
2f0ca46a
NC		 12271 case STT_ARM_16BIT:
12272 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12273 This allows us to distinguish between data used by Thumb instructions
12274 and non-data (which is probably code) inside Thumb regions of an
12275 executable. */
1a0eb693 12276 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12277 return ELF_ST_TYPE (elf_sym->st_info);
12278 break;
9a5aca8c 12279
ce855c42
NC		 12280 default:
12281 break;
2f0ca46a
NC		 12282 }
12283
12284 return type;
252b5132 12285}
f21f3fe0 12286
252b5132 12287static asection *
07adf181
AM		 12288elf32_arm_gc_mark_hook (asection *sec,
12289 struct bfd_link_info *info,
12290 Elf_Internal_Rela *rel,
12291 struct elf_link_hash_entry *h,
12292 Elf_Internal_Sym *sym)
252b5132
RH		 12293{
12294 if (h != NULL)
07adf181 12295 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12296 {
12297 case R_ARM_GNU_VTINHERIT:
12298 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12299 return NULL;
12300 }
9ad5cbcf 12301
07adf181 12302 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12303}
12304
780a67af
NC		 12305/* Update the got entry reference counts for the section being removed. */
12306
b34976b6 12307static bfd_boolean
ba93b8ac
DJ		 12308elf32_arm_gc_sweep_hook (bfd * abfd,
12309 struct bfd_link_info * info,
12310 asection * sec,
12311 const Elf_Internal_Rela * relocs)
252b5132 12312{
5e681ec4
PB		 12313 Elf_Internal_Shdr *symtab_hdr;
12314 struct elf_link_hash_entry **sym_hashes;
12315 bfd_signed_vma *local_got_refcounts;
12316 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12317 struct elf32_arm_link_hash_table * globals;
12318
7dda2462
TG		 12319 if (info->relocatable)
12320 return TRUE;
12321
eb043451 12322 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12323 if (globals == NULL)
12324 return FALSE;
5e681ec4
PB		 12325
12326 elf_section_data (sec)->local_dynrel = NULL;
12327
0ffa91dd 12328 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12329 sym_hashes = elf_sym_hashes (abfd);
12330 local_got_refcounts = elf_local_got_refcounts (abfd);
12331
906e58ca 12332 check_use_blx (globals);
bd97cb95 12333
5e681ec4
PB		 12334 relend = relocs + sec->reloc_count;
12335 for (rel = relocs; rel < relend; rel++)
eb043451 12336 {
3eb128b2
AM		 12337 unsigned long r_symndx;
12338 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12339 struct elf32_arm_link_hash_entry *eh;
eb043451 12340 int r_type;
34e77a92 12341 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12342 bfd_boolean may_become_dynamic_p;
12343 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12344 union gotplt_union *root_plt;
12345 struct arm_plt_info *arm_plt;
5e681ec4 12346
3eb128b2
AM		 12347 r_symndx = ELF32_R_SYM (rel->r_info);
12348 if (r_symndx >= symtab_hdr->sh_info)
12349 {
12350 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12351 while (h->root.type == bfd_link_hash_indirect
12352 || h->root.type == bfd_link_hash_warning)
12353 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12354 }
f6e32f6d
RS		 12355 eh = (struct elf32_arm_link_hash_entry *) h;
12356
34e77a92 12357 call_reloc_p = FALSE;
f6e32f6d
RS		 12358 may_become_dynamic_p = FALSE;
12359 may_need_local_target_p = FALSE;
3eb128b2 12360
eb043451 12361 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12362 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12363 switch (r_type)
12364 {
12365 case R_ARM_GOT32:
eb043451 12366 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12367 case R_ARM_TLS_GD32:
12368 case R_ARM_TLS_IE32:
3eb128b2 12369 if (h != NULL)
eb043451 12370 {
eb043451
PB		 12371 if (h->got.refcount > 0)
12372 h->got.refcount -= 1;
12373 }
12374 else if (local_got_refcounts != NULL)
12375 {
12376 if (local_got_refcounts[r_symndx] > 0)
12377 local_got_refcounts[r_symndx] -= 1;
12378 }
12379 break;
12380
ba93b8ac 12381 case R_ARM_TLS_LDM32:
4dfe6ac6 12382 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12383 break;
12384
eb043451
PB		 12385 case R_ARM_PC24:
12386 case R_ARM_PLT32:
5b5bb741
PB		 12387 case R_ARM_CALL:
12388 case R_ARM_JUMP24:
eb043451 12389 case R_ARM_PREL31:
c19d1205 12390 case R_ARM_THM_CALL:
bd97cb95
DJ		 12391 case R_ARM_THM_JUMP24:
12392 case R_ARM_THM_JUMP19:
34e77a92 12393 call_reloc_p = TRUE;
f6e32f6d
RS		 12394 may_need_local_target_p = TRUE;
12395 break;
12396
12397 case R_ARM_ABS12:
12398 if (!globals->vxworks_p)
12399 {
12400 may_need_local_target_p = TRUE;
12401 break;
12402 }
12403 /* Fall through. */
12404 case R_ARM_ABS32:
12405 case R_ARM_ABS32_NOI:
12406 case R_ARM_REL32:
12407 case R_ARM_REL32_NOI:
b6895b4f
PB		 12408 case R_ARM_MOVW_ABS_NC:
12409 case R_ARM_MOVT_ABS:
12410 case R_ARM_MOVW_PREL_NC:
12411 case R_ARM_MOVT_PREL:
12412 case R_ARM_THM_MOVW_ABS_NC:
12413 case R_ARM_THM_MOVT_ABS:
12414 case R_ARM_THM_MOVW_PREL_NC:
12415 case R_ARM_THM_MOVT_PREL:
b7693d02 12416 /* Should the interworking branches be here also? */
f6e32f6d 12417 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12418 && (sec->flags & SEC_ALLOC) != 0)
12419 {
12420 if (h == NULL
12421 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12422 {
12423 call_reloc_p = TRUE;
12424 may_need_local_target_p = TRUE;
12425 }
12426 else
12427 may_become_dynamic_p = TRUE;
12428 }
f6e32f6d
RS		 12429 else
12430 may_need_local_target_p = TRUE;
12431 break;
b7693d02 12432
f6e32f6d
RS		 12433 default:
12434 break;
12435 }
5e681ec4 12436
34e77a92
RS		 12437 if (may_need_local_target_p
12438 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12439 {
27586251
HPN		 12440 /* If PLT refcount book-keeping is wrong and too low, we'll
12441 see a zero value (going to -1) for the root PLT reference
12442 count. */
12443 if (root_plt->refcount >= 0)
12444 {
12445 BFD_ASSERT (root_plt->refcount != 0);
12446 root_plt->refcount -= 1;
12447 }
12448 else
12449 /* A value of -1 means the symbol has become local, forced
12450 or seeing a hidden definition. Any other negative value
12451 is an error. */
12452 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12453
12454 if (!call_reloc_p)
12455 arm_plt->noncall_refcount--;
5e681ec4 12456
f6e32f6d 12457 if (r_type == R_ARM_THM_CALL)
34e77a92 12458 arm_plt->maybe_thumb_refcount--;
bd97cb95 12459
f6e32f6d
RS		 12460 if (r_type == R_ARM_THM_JUMP24
12461 || r_type == R_ARM_THM_JUMP19)
34e77a92 12462 arm_plt->thumb_refcount--;
f6e32f6d 12463 }
5e681ec4 12464
34e77a92 12465 if (may_become_dynamic_p)
f6e32f6d
RS		 12466 {
12467 struct elf_dyn_relocs **pp;
12468 struct elf_dyn_relocs *p;
5e681ec4 12469
34e77a92 12470 if (h != NULL)
9c489990 12471 pp = &(eh->dyn_relocs);
34e77a92
RS		 12472 else
12473 {
12474 Elf_Internal_Sym *isym;
12475
12476 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12477 abfd, r_symndx);
12478 if (isym == NULL)
12479 return FALSE;
12480 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12481 if (pp == NULL)
12482 return FALSE;
12483 }
9c489990 12484 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12485 if (p->sec == sec)
12486 {
12487 /* Everything must go for SEC. */
12488 *pp = p->next;
12489 break;
12490 }
eb043451
PB		 12491 }
12492 }
5e681ec4 12493
b34976b6 12494 return TRUE;
252b5132
RH		 12495}
12496
780a67af
NC		 12497/* Look through the relocs for a section during the first phase. */
12498
b34976b6 12499static bfd_boolean
57e8b36a
NC		 12500elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12501 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12502{
b34976b6
AM		 12503 Elf_Internal_Shdr *symtab_hdr;
12504 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12505 const Elf_Internal_Rela *rel;
12506 const Elf_Internal_Rela *rel_end;
12507 bfd *dynobj;
5e681ec4 12508 asection *sreloc;
5e681ec4 12509 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12510 bfd_boolean call_reloc_p;
12511 bfd_boolean may_become_dynamic_p;
12512 bfd_boolean may_need_local_target_p;
ce98a316 12513 unsigned long nsyms;
9a5aca8c 12514
1049f94e 12515 if (info->relocatable)
b34976b6 12516 return TRUE;
9a5aca8c 12517
0ffa91dd
NC		 12518 BFD_ASSERT (is_arm_elf (abfd));
12519
5e681ec4 12520 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12521 if (htab == NULL)
12522 return FALSE;
12523
5e681ec4 12524 sreloc = NULL;
9a5aca8c 12525
67687978
PB		 12526 /* Create dynamic sections for relocatable executables so that we can
12527 copy relocations. */
12528 if (htab->root.is_relocatable_executable
12529 && ! htab->root.dynamic_sections_created)
12530 {
12531 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12532 return FALSE;
12533 }
12534
cbc704f3
RS		 12535 if (htab->root.dynobj == NULL)
12536 htab->root.dynobj = abfd;
34e77a92
RS		 12537 if (!create_ifunc_sections (info))
12538 return FALSE;
cbc704f3
RS		 12539
12540 dynobj = htab->root.dynobj;
12541
0ffa91dd 12542 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12543 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12544 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12545
252b5132
RH		 12546 rel_end = relocs + sec->reloc_count;
12547 for (rel = relocs; rel < rel_end; rel++)
12548 {
34e77a92 12549 Elf_Internal_Sym *isym;
252b5132 12550 struct elf_link_hash_entry *h;
b7693d02 12551 struct elf32_arm_link_hash_entry *eh;
252b5132 12552 unsigned long r_symndx;
eb043451 12553 int r_type;
9a5aca8c 12554
252b5132 12555 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12556 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12557 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12558
ce98a316
NC		 12559 if (r_symndx >= nsyms
12560 /* PR 9934: It is possible to have relocations that do not
12561 refer to symbols, thus it is also possible to have an
12562 object file containing relocations but no symbol table. */
cf35638d 12563 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12564 {
12565 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12566 r_symndx);
ba93b8ac
DJ		 12567 return FALSE;
12568 }
12569
34e77a92
RS		 12570 h = NULL;
12571 isym = NULL;
12572 if (nsyms > 0)
973a3492 12573 {
34e77a92
RS		 12574 if (r_symndx < symtab_hdr->sh_info)
12575 {
12576 /* A local symbol. */
12577 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12578 abfd, r_symndx);
12579 if (isym == NULL)
12580 return FALSE;
12581 }
12582 else
12583 {
12584 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12585 while (h->root.type == bfd_link_hash_indirect
12586 || h->root.type == bfd_link_hash_warning)
12587 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 12588
12589 /* PR15323, ref flags aren't set for references in the
12590 same object. */
12591 h->root.non_ir_ref = 1;
34e77a92 12592 }
973a3492 12593 }
9a5aca8c 12594
b7693d02
DJ		 12595 eh = (struct elf32_arm_link_hash_entry *) h;
12596
f6e32f6d
RS		 12597 call_reloc_p = FALSE;
12598 may_become_dynamic_p = FALSE;
12599 may_need_local_target_p = FALSE;
12600
0855e32b
NS		 12601 /* Could be done earlier, if h were already available. */
12602 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12603 switch (r_type)
99059e56 12604 {
5e681ec4 12605 case R_ARM_GOT32:
eb043451 12606 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12607 case R_ARM_TLS_GD32:
12608 case R_ARM_TLS_IE32:
0855e32b
NS		 12609 case R_ARM_TLS_GOTDESC:
12610 case R_ARM_TLS_DESCSEQ:
12611 case R_ARM_THM_TLS_DESCSEQ:
12612 case R_ARM_TLS_CALL:
12613 case R_ARM_THM_TLS_CALL:
5e681ec4 12614 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12615 {
12616 int tls_type, old_tls_type;
5e681ec4 12617
ba93b8ac
DJ		 12618 switch (r_type)
12619 {
12620 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12621
ba93b8ac 12622 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12623
0855e32b
NS		 12624 case R_ARM_TLS_GOTDESC:
12625 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12626 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12627 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12628
ba93b8ac
DJ		 12629 default: tls_type = GOT_NORMAL; break;
12630 }
252b5132 12631
ba93b8ac
DJ		 12632 if (h != NULL)
12633 {
12634 h->got.refcount++;
12635 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12636 }
12637 else
12638 {
ba93b8ac 12639 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12640 if (!elf32_arm_allocate_local_sym_info (abfd))
12641 return FALSE;
12642 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12643 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12644 }
12645
0855e32b 12646 /* If a variable is accessed with both tls methods, two
99059e56 12647 slots may be created. */
0855e32b
NS		 12648 if (GOT_TLS_GD_ANY_P (old_tls_type)
12649 && GOT_TLS_GD_ANY_P (tls_type))
12650 tls_type |= old_tls_type;
12651
12652 /* We will already have issued an error message if there
12653 is a TLS/non-TLS mismatch, based on the symbol
12654 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12655 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12656 && tls_type != GOT_NORMAL)
12657 tls_type |= old_tls_type;
12658
0855e32b 12659 /* If the symbol is accessed in both IE and GDESC
99059e56
RM		 12660 method, we're able to relax. Turn off the GDESC flag,
12661 without messing up with any other kind of tls types
12662 that may be involved */
0855e32b
NS		 12663 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12664 tls_type &= ~GOT_TLS_GDESC;
12665
ba93b8ac
DJ		 12666 if (old_tls_type != tls_type)
12667 {
12668 if (h != NULL)
12669 elf32_arm_hash_entry (h)->tls_type = tls_type;
12670 else
12671 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12672 }
12673 }
8029a119 12674 /* Fall through. */
ba93b8ac
DJ		 12675
12676 case R_ARM_TLS_LDM32:
12677 if (r_type == R_ARM_TLS_LDM32)
12678 htab->tls_ldm_got.refcount++;
8029a119 12679 /* Fall through. */
252b5132 12680
c19d1205 12681 case R_ARM_GOTOFF32:
5e681ec4 12682 case R_ARM_GOTPC:
cbc704f3
RS		 12683 if (htab->root.sgot == NULL
12684 && !create_got_section (htab->root.dynobj, info))
12685 return FALSE;
252b5132
RH		 12686 break;
12687
252b5132 12688 case R_ARM_PC24:
7359ea65 12689 case R_ARM_PLT32:
5b5bb741
PB		 12690 case R_ARM_CALL:
12691 case R_ARM_JUMP24:
eb043451 12692 case R_ARM_PREL31:
c19d1205 12693 case R_ARM_THM_CALL:
bd97cb95
DJ		 12694 case R_ARM_THM_JUMP24:
12695 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12696 call_reloc_p = TRUE;
12697 may_need_local_target_p = TRUE;
12698 break;
12699
12700 case R_ARM_ABS12:
12701 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12702 ldr __GOTT_INDEX__ offsets. */
12703 if (!htab->vxworks_p)
12704 {
12705 may_need_local_target_p = TRUE;
12706 break;
12707 }
12708 /* Fall through. */
39623e12 12709
96c23d59
JM		 12710 case R_ARM_MOVW_ABS_NC:
12711 case R_ARM_MOVT_ABS:
12712 case R_ARM_THM_MOVW_ABS_NC:
12713 case R_ARM_THM_MOVT_ABS:
12714 if (info->shared)
12715 {
12716 (*_bfd_error_handler)
12717 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12718 abfd, elf32_arm_howto_table_1[r_type].name,
12719 (h) ? h->root.root.string : "a local symbol");
12720 bfd_set_error (bfd_error_bad_value);
12721 return FALSE;
12722 }
12723
12724 /* Fall through. */
39623e12
PB		 12725 case R_ARM_ABS32:
12726 case R_ARM_ABS32_NOI:
12727 case R_ARM_REL32:
12728 case R_ARM_REL32_NOI:
b6895b4f
PB		 12729 case R_ARM_MOVW_PREL_NC:
12730 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12731 case R_ARM_THM_MOVW_PREL_NC:
12732 case R_ARM_THM_MOVT_PREL:
39623e12 12733
b7693d02 12734 /* Should the interworking branches be listed here? */
67687978 12735 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12736 && (sec->flags & SEC_ALLOC) != 0)
12737 {
12738 if (h == NULL
12739 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12740 {
12741 /* In shared libraries and relocatable executables,
12742 we treat local relative references as calls;
12743 see the related SYMBOL_CALLS_LOCAL code in
12744 allocate_dynrelocs. */
12745 call_reloc_p = TRUE;
12746 may_need_local_target_p = TRUE;
12747 }
12748 else
12749 /* We are creating a shared library or relocatable
12750 executable, and this is a reloc against a global symbol,
12751 or a non-PC-relative reloc against a local symbol.
12752 We may need to copy the reloc into the output. */
12753 may_become_dynamic_p = TRUE;
12754 }
f6e32f6d
RS		 12755 else
12756 may_need_local_target_p = TRUE;
252b5132
RH		 12757 break;
12758
99059e56
RM		 12759 /* This relocation describes the C++ object vtable hierarchy.
12760 Reconstruct it for later use during GC. */
12761 case R_ARM_GNU_VTINHERIT:
12762 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12763 return FALSE;
12764 break;
12765
12766 /* This relocation describes which C++ vtable entries are actually
12767 used. Record for later use during GC. */
12768 case R_ARM_GNU_VTENTRY:
12769 BFD_ASSERT (h != NULL);
12770 if (h != NULL
12771 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12772 return FALSE;
12773 break;
12774 }
f6e32f6d
RS		 12775
12776 if (h != NULL)
12777 {
12778 if (call_reloc_p)
12779 /* We may need a .plt entry if the function this reloc
12780 refers to is in a different object, regardless of the
12781 symbol's type. We can't tell for sure yet, because
12782 something later might force the symbol local. */
12783 h->needs_plt = 1;
12784 else if (may_need_local_target_p)
12785 /* If this reloc is in a read-only section, we might
12786 need a copy reloc. We can't check reliably at this
12787 stage whether the section is read-only, as input
12788 sections have not yet been mapped to output sections.
12789 Tentatively set the flag for now, and correct in
12790 adjust_dynamic_symbol. */
12791 h->non_got_ref = 1;
12792 }
12793
34e77a92
RS		 12794 if (may_need_local_target_p
12795 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12796 {
34e77a92
RS		 12797 union gotplt_union *root_plt;
12798 struct arm_plt_info *arm_plt;
12799 struct arm_local_iplt_info *local_iplt;
12800
12801 if (h != NULL)
12802 {
12803 root_plt = &h->plt;
12804 arm_plt = &eh->plt;
12805 }
12806 else
12807 {
12808 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12809 if (local_iplt == NULL)
12810 return FALSE;
12811 root_plt = &local_iplt->root;
12812 arm_plt = &local_iplt->arm;
12813 }
12814
f6e32f6d
RS		 12815 /* If the symbol is a function that doesn't bind locally,
12816 this relocation will need a PLT entry. */
a8c887dd
NC		 12817 if (root_plt->refcount != -1)
12818 root_plt->refcount += 1;
34e77a92
RS		 12819
12820 if (!call_reloc_p)
12821 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12822
12823 /* It's too early to use htab->use_blx here, so we have to
12824 record possible blx references separately from
12825 relocs that definitely need a thumb stub. */
12826
12827 if (r_type == R_ARM_THM_CALL)
34e77a92 12828 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12829
12830 if (r_type == R_ARM_THM_JUMP24
12831 || r_type == R_ARM_THM_JUMP19)
34e77a92 12832 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12833 }
12834
12835 if (may_become_dynamic_p)
12836 {
12837 struct elf_dyn_relocs *p, **head;
12838
12839 /* Create a reloc section in dynobj. */
12840 if (sreloc == NULL)
12841 {
12842 sreloc = _bfd_elf_make_dynamic_reloc_section
12843 (sec, dynobj, 2, abfd, ! htab->use_rel);
12844
12845 if (sreloc == NULL)
12846 return FALSE;
12847
12848 /* BPABI objects never have dynamic relocations mapped. */
12849 if (htab->symbian_p)
12850 {
12851 flagword flags;
12852
12853 flags = bfd_get_section_flags (dynobj, sreloc);
12854 flags &= ~(SEC_LOAD | SEC_ALLOC);
12855 bfd_set_section_flags (dynobj, sreloc, flags);
12856 }
12857 }
12858
12859 /* If this is a global symbol, count the number of
12860 relocations we need for this symbol. */
12861 if (h != NULL)
12862 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12863 else
12864 {
34e77a92
RS		 12865 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12866 if (head == NULL)
f6e32f6d 12867 return FALSE;
f6e32f6d
RS		 12868 }
12869
12870 p = *head;
12871 if (p == NULL || p->sec != sec)
12872 {
12873 bfd_size_type amt = sizeof *p;
12874
12875 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12876 if (p == NULL)
12877 return FALSE;
12878 p->next = *head;
12879 *head = p;
12880 p->sec = sec;
12881 p->count = 0;
12882 p->pc_count = 0;
12883 }
12884
12885 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12886 p->pc_count += 1;
12887 p->count += 1;
12888 }
252b5132 12889 }
f21f3fe0 12890
b34976b6 12891 return TRUE;
252b5132
RH		 12892}
12893
6a5bb875
PB		 12894/* Unwinding tables are not referenced directly. This pass marks them as
12895 required if the corresponding code section is marked. */
12896
12897static bfd_boolean
906e58ca
NC		 12898elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12899 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12900{
12901 bfd *sub;
12902 Elf_Internal_Shdr **elf_shdrp;
12903 bfd_boolean again;
12904
7f6ab9f8
AM		 12905 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12906
6a5bb875
PB		 12907 /* Marking EH data may cause additional code sections to be marked,
12908 requiring multiple passes. */
12909 again = TRUE;
12910 while (again)
12911 {
12912 again = FALSE;
12913 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12914 {
12915 asection *o;
12916
0ffa91dd 12917 if (! is_arm_elf (sub))
6a5bb875
PB		 12918 continue;
12919
12920 elf_shdrp = elf_elfsections (sub);
12921 for (o = sub->sections; o != NULL; o = o->next)
12922 {
12923 Elf_Internal_Shdr *hdr;
0ffa91dd 12924
6a5bb875 12925 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 12926 if (hdr->sh_type == SHT_ARM_EXIDX
12927 && hdr->sh_link
12928 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 12929 && !o->gc_mark
12930 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12931 {
12932 again = TRUE;
12933 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12934 return FALSE;
12935 }
12936 }
12937 }
12938 }
12939
12940 return TRUE;
12941}
12942
3c9458e9
NC		 12943/* Treat mapping symbols as special target symbols. */
12944
12945static bfd_boolean
12946elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12947{
b0796911
PB		 12948 return bfd_is_arm_special_symbol_name (sym->name,
12949 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 12950}
12951
0367ecfb
NC		 12952/* This is a copy of elf_find_function() from elf.c except that
12953 ARM mapping symbols are ignored when looking for function names
12954 and STT_ARM_TFUNC is considered to a function type. */
252b5132 12955
0367ecfb
NC		 12956static bfd_boolean
12957arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12958 asection * section,
12959 asymbol ** symbols,
12960 bfd_vma offset,
12961 const char ** filename_ptr,
12962 const char ** functionname_ptr)
12963{
12964 const char * filename = NULL;
12965 asymbol * func = NULL;
12966 bfd_vma low_func = 0;
12967 asymbol ** p;
252b5132
RH		 12968
12969 for (p = symbols; *p != NULL; p++)
12970 {
12971 elf_symbol_type *q;
12972
12973 q = (elf_symbol_type *) *p;
12974
252b5132
RH		 12975 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12976 {
12977 default:
12978 break;
12979 case STT_FILE:
12980 filename = bfd_asymbol_name (&q->symbol);
12981 break;
252b5132
RH		 12982 case STT_FUNC:
12983 case STT_ARM_TFUNC:
9d2da7ca 12984 case STT_NOTYPE:
b0796911 12985 /* Skip mapping symbols. */
0367ecfb 12986 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 12987 && bfd_is_arm_special_symbol_name (q->symbol.name,
12988 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 12989 continue;
12990 /* Fall through. */
6b40fcba 12991 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 12992 && q->symbol.value >= low_func
12993 && q->symbol.value <= offset)
12994 {
12995 func = (asymbol *) q;
12996 low_func = q->symbol.value;
12997 }
12998 break;
12999 }
13000 }
13001
13002 if (func == NULL)
b34976b6 13003 return FALSE;
252b5132 13004
0367ecfb
NC		 13005 if (filename_ptr)
13006 *filename_ptr = filename;
13007 if (functionname_ptr)
13008 *functionname_ptr = bfd_asymbol_name (func);
13009
13010 return TRUE;
906e58ca 13011}
0367ecfb
NC		 13012
13013
13014/* Find the nearest line to a particular section and offset, for error
13015 reporting. This code is a duplicate of the code in elf.c, except
13016 that it uses arm_elf_find_function. */
13017
13018static bfd_boolean
13019elf32_arm_find_nearest_line (bfd * abfd,
13020 asection * section,
13021 asymbol ** symbols,
13022 bfd_vma offset,
13023 const char ** filename_ptr,
13024 const char ** functionname_ptr,
13025 unsigned int * line_ptr)
13026{
13027 bfd_boolean found = FALSE;
13028
13029 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
13030
fc28f9aa 13031 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
99059e56 13032 section, symbols, offset,
0367ecfb 13033 filename_ptr, functionname_ptr,
9b8d1a36 13034 line_ptr, NULL, 0,
0367ecfb
NC		 13035 & elf_tdata (abfd)->dwarf2_find_line_info))
13036 {
13037 if (!*functionname_ptr)
13038 arm_elf_find_function (abfd, section, symbols, offset,
13039 *filename_ptr ? NULL : filename_ptr,
13040 functionname_ptr);
f21f3fe0 13041
0367ecfb
NC		 13042 return TRUE;
13043 }
13044
13045 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13046 & found, filename_ptr,
13047 functionname_ptr, line_ptr,
13048 & elf_tdata (abfd)->line_info))
13049 return FALSE;
13050
13051 if (found && (*functionname_ptr || *line_ptr))
13052 return TRUE;
13053
13054 if (symbols == NULL)
13055 return FALSE;
13056
13057 if (! arm_elf_find_function (abfd, section, symbols, offset,
13058 filename_ptr, functionname_ptr))
13059 return FALSE;
13060
13061 *line_ptr = 0;
b34976b6 13062 return TRUE;
252b5132
RH		 13063}
13064
4ab527b0
FF		 13065static bfd_boolean
13066elf32_arm_find_inliner_info (bfd * abfd,
13067 const char ** filename_ptr,
13068 const char ** functionname_ptr,
13069 unsigned int * line_ptr)
13070{
13071 bfd_boolean found;
13072 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13073 functionname_ptr, line_ptr,
13074 & elf_tdata (abfd)->dwarf2_find_line_info);
13075 return found;
13076}
13077
252b5132
RH		 13078/* Adjust a symbol defined by a dynamic object and referenced by a
13079 regular object. The current definition is in some section of the
13080 dynamic object, but we're not including those sections. We have to
13081 change the definition to something the rest of the link can
13082 understand. */
13083
b34976b6 13084static bfd_boolean
57e8b36a
NC		 13085elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13086 struct elf_link_hash_entry * h)
252b5132
RH		 13087{
13088 bfd * dynobj;
13089 asection * s;
b7693d02 13090 struct elf32_arm_link_hash_entry * eh;
67687978 13091 struct elf32_arm_link_hash_table *globals;
252b5132 13092
67687978 13093 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13094 if (globals == NULL)
13095 return FALSE;
13096
252b5132
RH		 13097 dynobj = elf_hash_table (info)->dynobj;
13098
13099 /* Make sure we know what is going on here. */
13100 BFD_ASSERT (dynobj != NULL
f5385ebf 13101 && (h->needs_plt
34e77a92 13102 || h->type == STT_GNU_IFUNC
f6e332e6 13103 || h->u.weakdef != NULL
f5385ebf
AM		 13104 || (h->def_dynamic
13105 && h->ref_regular
13106 && !h->def_regular)));
252b5132 13107
b7693d02
DJ		 13108 eh = (struct elf32_arm_link_hash_entry *) h;
13109
252b5132
RH		 13110 /* If this is a function, put it in the procedure linkage table. We
13111 will fill in the contents of the procedure linkage table later,
13112 when we know the address of the .got section. */
34e77a92 13113 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13114 {
34e77a92
RS		 13115 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13116 symbol binds locally. */
5e681ec4 13117 if (h->plt.refcount <= 0
34e77a92
RS		 13118 || (h->type != STT_GNU_IFUNC
13119 && (SYMBOL_CALLS_LOCAL (info, h)
13120 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13121 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13122 {
13123 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13124 file, but the symbol was never referred to by a dynamic
13125 object, or if all references were garbage collected. In
13126 such a case, we don't actually need to build a procedure
13127 linkage table, and we can just do a PC24 reloc instead. */
13128 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13129 eh->plt.thumb_refcount = 0;
13130 eh->plt.maybe_thumb_refcount = 0;
13131 eh->plt.noncall_refcount = 0;
f5385ebf 13132 h->needs_plt = 0;
252b5132
RH		 13133 }
13134
b34976b6 13135 return TRUE;
252b5132 13136 }
5e681ec4 13137 else
b7693d02
DJ		 13138 {
13139 /* It's possible that we incorrectly decided a .plt reloc was
13140 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13141 in check_relocs. We can't decide accurately between function
13142 and non-function syms in check-relocs; Objects loaded later in
13143 the link may change h->type. So fix it now. */
13144 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13145 eh->plt.thumb_refcount = 0;
13146 eh->plt.maybe_thumb_refcount = 0;
13147 eh->plt.noncall_refcount = 0;
b7693d02 13148 }
252b5132
RH		 13149
13150 /* If this is a weak symbol, and there is a real definition, the
13151 processor independent code will have arranged for us to see the
13152 real definition first, and we can just use the same value. */
f6e332e6 13153 if (h->u.weakdef != NULL)
252b5132 13154 {
f6e332e6
AM		 13155 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13156 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13157 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13158 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13159 return TRUE;
252b5132
RH		 13160 }
13161
ba93b8ac
DJ		 13162 /* If there are no non-GOT references, we do not need a copy
13163 relocation. */
13164 if (!h->non_got_ref)
13165 return TRUE;
13166
252b5132
RH		 13167 /* This is a reference to a symbol defined by a dynamic object which
13168 is not a function. */
13169
13170 /* If we are creating a shared library, we must presume that the
13171 only references to the symbol are via the global offset table.
13172 For such cases we need not do anything here; the relocations will
67687978
PB		 13173 be handled correctly by relocate_section. Relocatable executables
13174 can reference data in shared objects directly, so we don't need to
13175 do anything here. */
13176 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13177 return TRUE;
252b5132
RH		 13178
13179 /* We must allocate the symbol in our .dynbss section, which will
13180 become part of the .bss section of the executable. There will be
13181 an entry for this symbol in the .dynsym section. The dynamic
13182 object will contain position independent code, so all references
13183 from the dynamic object to this symbol will go through the global
13184 offset table. The dynamic linker will use the .dynsym entry to
13185 determine the address it must put in the global offset table, so
13186 both the dynamic object and the regular object will refer to the
13187 same memory location for the variable. */
3d4d4302 13188 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13189 BFD_ASSERT (s != NULL);
13190
13191 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13192 copy the initial value out of the dynamic object and into the
13193 runtime process image. We need to remember the offset into the
00a97672 13194 .rel(a).bss section we are going to use. */
1d7e9d18 13195 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13196 {
13197 asection *srel;
13198
3d4d4302 13199 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13200 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13201 h->needs_copy = 1;
252b5132
RH		 13202 }
13203
027297b7 13204 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13205}
13206
5e681ec4
PB		 13207/* Allocate space in .plt, .got and associated reloc sections for
13208 dynamic relocs. */
13209
13210static bfd_boolean
47beaa6a 13211allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13212{
13213 struct bfd_link_info *info;
13214 struct elf32_arm_link_hash_table *htab;
13215 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13216 struct elf_dyn_relocs *p;
5e681ec4
PB		 13217
13218 if (h->root.type == bfd_link_hash_indirect)
13219 return TRUE;
13220
e6a6bb22
AM		 13221 eh = (struct elf32_arm_link_hash_entry *) h;
13222
5e681ec4
PB		 13223 info = (struct bfd_link_info *) inf;
13224 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13225 if (htab == NULL)
13226 return FALSE;
5e681ec4 13227
34e77a92 13228 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13229 && h->plt.refcount > 0)
13230 {
13231 /* Make sure this symbol is output as a dynamic symbol.
13232 Undefined weak syms won't yet be marked as dynamic. */
13233 if (h->dynindx == -1
f5385ebf 13234 && !h->forced_local)
5e681ec4 13235 {
c152c796 13236 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13237 return FALSE;
13238 }
13239
34e77a92
RS		 13240 /* If the call in the PLT entry binds locally, the associated
13241 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13242 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13243 than the .plt section. */
13244 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13245 {
13246 eh->is_iplt = 1;
13247 if (eh->plt.noncall_refcount == 0
13248 && SYMBOL_REFERENCES_LOCAL (info, h))
13249 /* All non-call references can be resolved directly.
13250 This means that they can (and in some cases, must)
13251 resolve directly to the run-time target, rather than
13252 to the PLT. That in turns means that any .got entry
13253 would be equal to the .igot.plt entry, so there's
13254 no point having both. */
13255 h->got.refcount = 0;
13256 }
13257
5e681ec4 13258 if (info->shared
34e77a92 13259 || eh->is_iplt
7359ea65 13260 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13261 {
34e77a92 13262 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13263
5e681ec4
PB		 13264 /* If this symbol is not defined in a regular file, and we are
13265 not generating a shared library, then set the symbol to this
13266 location in the .plt. This is required to make function
13267 pointers compare as equal between the normal executable and
13268 the shared library. */
13269 if (! info->shared
f5385ebf 13270 && !h->def_regular)
5e681ec4 13271 {
34e77a92 13272 h->root.u.def.section = htab->root.splt;
5e681ec4 13273 h->root.u.def.value = h->plt.offset;
5e681ec4 13274
67d74e43
DJ		 13275 /* Make sure the function is not marked as Thumb, in case
13276 it is the target of an ABS32 relocation, which will
13277 point to the PLT entry. */
35fc36a8 13278 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13279 }
022f8312 13280
0855e32b 13281 htab->next_tls_desc_index++;
00a97672
RS		 13282
13283 /* VxWorks executables have a second set of relocations for
13284 each PLT entry. They go in a separate relocation section,
13285 which is processed by the kernel loader. */
13286 if (htab->vxworks_p && !info->shared)
13287 {
13288 /* There is a relocation for the initial PLT entry:
13289 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13290 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13291 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13292
13293 /* There are two extra relocations for each subsequent
13294 PLT entry: an R_ARM_32 relocation for the GOT entry,
13295 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13296 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13297 }
5e681ec4
PB		 13298 }
13299 else
13300 {
13301 h->plt.offset = (bfd_vma) -1;
f5385ebf 13302 h->needs_plt = 0;
5e681ec4
PB		 13303 }
13304 }
13305 else
13306 {
13307 h->plt.offset = (bfd_vma) -1;
f5385ebf 13308 h->needs_plt = 0;
5e681ec4
PB		 13309 }
13310
0855e32b
NS		 13311 eh = (struct elf32_arm_link_hash_entry *) h;
13312 eh->tlsdesc_got = (bfd_vma) -1;
13313
5e681ec4
PB		 13314 if (h->got.refcount > 0)
13315 {
13316 asection *s;
13317 bfd_boolean dyn;
ba93b8ac
DJ		 13318 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13319 int indx;
5e681ec4
PB		 13320
13321 /* Make sure this symbol is output as a dynamic symbol.
13322 Undefined weak syms won't yet be marked as dynamic. */
13323 if (h->dynindx == -1
f5385ebf 13324 && !h->forced_local)
5e681ec4 13325 {
c152c796 13326 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13327 return FALSE;
13328 }
13329
e5a52504
MM		 13330 if (!htab->symbian_p)
13331 {
362d30a1 13332 s = htab->root.sgot;
e5a52504 13333 h->got.offset = s->size;
ba93b8ac
DJ		 13334
13335 if (tls_type == GOT_UNKNOWN)
13336 abort ();
13337
13338 if (tls_type == GOT_NORMAL)
13339 /* Non-TLS symbols need one GOT slot. */
13340 s->size += 4;
13341 else
13342 {
99059e56
RM		 13343 if (tls_type & GOT_TLS_GDESC)
13344 {
0855e32b 13345 /* R_ARM_TLS_DESC needs 2 GOT slots. */
99059e56 13346 eh->tlsdesc_got
0855e32b
NS		 13347 = (htab->root.sgotplt->size
13348 - elf32_arm_compute_jump_table_size (htab));
99059e56
RM		 13349 htab->root.sgotplt->size += 8;
13350 h->got.offset = (bfd_vma) -2;
34e77a92 13351 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13352 reloc in the middle of .got.plt. */
99059e56
RM		 13353 htab->num_tls_desc++;
13354 }
0855e32b 13355
ba93b8ac 13356 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13357 {
13358 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13359 the symbol is both GD and GDESC, got.offset may
13360 have been overwritten. */
13361 h->got.offset = s->size;
13362 s->size += 8;
13363 }
13364
ba93b8ac
DJ		 13365 if (tls_type & GOT_TLS_IE)
13366 /* R_ARM_TLS_IE32 needs one GOT slot. */
13367 s->size += 4;
13368 }
13369
e5a52504 13370 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13371
13372 indx = 0;
13373 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13374 && (!info->shared
13375 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13376 indx = h->dynindx;
13377
13378 if (tls_type != GOT_NORMAL
13379 && (info->shared || indx != 0)
13380 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13381 || h->root.type != bfd_link_hash_undefweak))
13382 {
13383 if (tls_type & GOT_TLS_IE)
47beaa6a 13384 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13385
13386 if (tls_type & GOT_TLS_GD)
47beaa6a 13387 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13388
b38cadfb 13389 if (tls_type & GOT_TLS_GDESC)
0855e32b 13390 {
47beaa6a 13391 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13392 /* GDESC needs a trampoline to jump to. */
13393 htab->tls_trampoline = -1;
13394 }
13395
13396 /* Only GD needs it. GDESC just emits one relocation per
13397 2 entries. */
b38cadfb 13398 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13399 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13400 }
6f820c85 13401 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 13402 {
13403 if (htab->root.dynamic_sections_created)
13404 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13405 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13406 }
34e77a92
RS		 13407 else if (h->type == STT_GNU_IFUNC
13408 && eh->plt.noncall_refcount == 0)
13409 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13410 they all resolve dynamically instead. Reserve room for the
13411 GOT entry's R_ARM_IRELATIVE relocation. */
13412 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
31943882
WN		 13413 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13414 || h->root.type != bfd_link_hash_undefweak))
b436d854 13415 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13416 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13417 }
5e681ec4
PB		 13418 }
13419 else
13420 h->got.offset = (bfd_vma) -1;
13421
a4fd1a8e
PB		 13422 /* Allocate stubs for exported Thumb functions on v4t. */
13423 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13424 && h->def_regular
35fc36a8 13425 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13426 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13427 {
13428 struct elf_link_hash_entry * th;
13429 struct bfd_link_hash_entry * bh;
13430 struct elf_link_hash_entry * myh;
13431 char name[1024];
13432 asection *s;
13433 bh = NULL;
13434 /* Create a new symbol to regist the real location of the function. */
13435 s = h->root.u.def.section;
906e58ca 13436 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13437 _bfd_generic_link_add_one_symbol (info, s->owner,
13438 name, BSF_GLOBAL, s,
13439 h->root.u.def.value,
13440 NULL, TRUE, FALSE, &bh);
13441
13442 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13443 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13444 myh->forced_local = 1;
35fc36a8 13445 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13446 eh->export_glue = myh;
13447 th = record_arm_to_thumb_glue (info, h);
13448 /* Point the symbol at the stub. */
13449 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13450 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13451 h->root.u.def.section = th->root.u.def.section;
13452 h->root.u.def.value = th->root.u.def.value & ~1;
13453 }
13454
0bdcacaf 13455 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13456 return TRUE;
13457
13458 /* In the shared -Bsymbolic case, discard space allocated for
13459 dynamic pc-relative relocs against symbols which turn out to be
13460 defined in regular objects. For the normal shared case, discard
13461 space for pc-relative relocs that have become local due to symbol
13462 visibility changes. */
13463
67687978 13464 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13465 {
7bdca076 13466 /* The only relocs that use pc_count are R_ARM_REL32 and
99059e56
RM		 13467 R_ARM_REL32_NOI, which will appear on something like
13468 ".long foo - .". We want calls to protected symbols to resolve
13469 directly to the function rather than going via the plt. If people
13470 want function pointer comparisons to work as expected then they
13471 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13472 if (SYMBOL_CALLS_LOCAL (info, h))
13473 {
0bdcacaf 13474 struct elf_dyn_relocs **pp;
ba93b8ac 13475
0bdcacaf 13476 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13477 {
13478 p->count -= p->pc_count;
13479 p->pc_count = 0;
13480 if (p->count == 0)
13481 *pp = p->next;
13482 else
13483 pp = &p->next;
13484 }
13485 }
13486
4dfe6ac6 13487 if (htab->vxworks_p)
3348747a 13488 {
0bdcacaf 13489 struct elf_dyn_relocs **pp;
3348747a 13490
0bdcacaf 13491 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13492 {
0bdcacaf 13493 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13494 *pp = p->next;
13495 else
13496 pp = &p->next;
13497 }
13498 }
13499
ba93b8ac 13500 /* Also discard relocs on undefined weak syms with non-default
99059e56 13501 visibility. */
0bdcacaf 13502 if (eh->dyn_relocs != NULL
5e681ec4 13503 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13504 {
13505 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13506 eh->dyn_relocs = NULL;
22d606e9
AM		 13507
13508 /* Make sure undefined weak symbols are output as a dynamic
13509 symbol in PIEs. */
13510 else if (h->dynindx == -1
13511 && !h->forced_local)
13512 {
13513 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13514 return FALSE;
13515 }
13516 }
13517
67687978
PB		 13518 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13519 && h->root.type == bfd_link_hash_new)
13520 {
13521 /* Output absolute symbols so that we can create relocations
13522 against them. For normal symbols we output a relocation
13523 against the section that contains them. */
13524 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13525 return FALSE;
13526 }
13527
5e681ec4
PB		 13528 }
13529 else
13530 {
13531 /* For the non-shared case, discard space for relocs against
13532 symbols which turn out to need copy relocs or are not
13533 dynamic. */
13534
f5385ebf
AM		 13535 if (!h->non_got_ref
13536 && ((h->def_dynamic
13537 && !h->def_regular)
5e681ec4
PB		 13538 || (htab->root.dynamic_sections_created
13539 && (h->root.type == bfd_link_hash_undefweak
13540 || h->root.type == bfd_link_hash_undefined))))
13541 {
13542 /* Make sure this symbol is output as a dynamic symbol.
13543 Undefined weak syms won't yet be marked as dynamic. */
13544 if (h->dynindx == -1
f5385ebf 13545 && !h->forced_local)
5e681ec4 13546 {
c152c796 13547 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13548 return FALSE;
13549 }
13550
13551 /* If that succeeded, we know we'll be keeping all the
13552 relocs. */
13553 if (h->dynindx != -1)
13554 goto keep;
13555 }
13556
0bdcacaf 13557 eh->dyn_relocs = NULL;
5e681ec4
PB		 13558
13559 keep: ;
13560 }
13561
13562 /* Finally, allocate space. */
0bdcacaf 13563 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13564 {
0bdcacaf 13565 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13566 if (h->type == STT_GNU_IFUNC
13567 && eh->plt.noncall_refcount == 0
13568 && SYMBOL_REFERENCES_LOCAL (info, h))
13569 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13570 else
13571 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13572 }
13573
13574 return TRUE;
13575}
13576
08d1f311
DJ		 13577/* Find any dynamic relocs that apply to read-only sections. */
13578
13579static bfd_boolean
8029a119 13580elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13581{
8029a119 13582 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13583 struct elf_dyn_relocs * p;
08d1f311 13584
08d1f311 13585 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13586 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13587 {
0bdcacaf 13588 asection *s = p->sec;
08d1f311
DJ		 13589
13590 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13591 {
13592 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13593
13594 info->flags |= DF_TEXTREL;
13595
13596 /* Not an error, just cut short the traversal. */
13597 return FALSE;
13598 }
13599 }
13600 return TRUE;
13601}
13602
d504ffc8
DJ		 13603void
13604bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13605 int byteswap_code)
13606{
13607 struct elf32_arm_link_hash_table *globals;
13608
13609 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13610 if (globals == NULL)
13611 return;
13612
d504ffc8
DJ		 13613 globals->byteswap_code = byteswap_code;
13614}
13615
252b5132
RH		 13616/* Set the sizes of the dynamic sections. */
13617
b34976b6 13618static bfd_boolean
57e8b36a
NC		 13619elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13620 struct bfd_link_info * info)
252b5132
RH		 13621{
13622 bfd * dynobj;
13623 asection * s;
b34976b6
AM		 13624 bfd_boolean plt;
13625 bfd_boolean relocs;
5e681ec4
PB		 13626 bfd *ibfd;
13627 struct elf32_arm_link_hash_table *htab;
252b5132 13628
5e681ec4 13629 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13630 if (htab == NULL)
13631 return FALSE;
13632
252b5132
RH		 13633 dynobj = elf_hash_table (info)->dynobj;
13634 BFD_ASSERT (dynobj != NULL);
39b41c9c 13635 check_use_blx (htab);
252b5132
RH		 13636
13637 if (elf_hash_table (info)->dynamic_sections_created)
13638 {
13639 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13640 if (info->executable)
252b5132 13641 {
3d4d4302 13642 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13643 BFD_ASSERT (s != NULL);
eea6121a 13644 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13645 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13646 }
13647 }
5e681ec4
PB		 13648
13649 /* Set up .got offsets for local syms, and space for local dynamic
13650 relocs. */
13651 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 13652 {
5e681ec4
PB		 13653 bfd_signed_vma *local_got;
13654 bfd_signed_vma *end_local_got;
34e77a92 13655 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13656 char *local_tls_type;
0855e32b 13657 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13658 bfd_size_type locsymcount;
13659 Elf_Internal_Shdr *symtab_hdr;
13660 asection *srel;
4dfe6ac6 13661 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13662 unsigned int symndx;
5e681ec4 13663
0ffa91dd 13664 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13665 continue;
13666
13667 for (s = ibfd->sections; s != NULL; s = s->next)
13668 {
0bdcacaf 13669 struct elf_dyn_relocs *p;
5e681ec4 13670
0bdcacaf 13671 for (p = (struct elf_dyn_relocs *)
99059e56 13672 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13673 {
0bdcacaf
RS		 13674 if (!bfd_is_abs_section (p->sec)
13675 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13676 {
13677 /* Input section has been discarded, either because
13678 it is a copy of a linkonce section or due to
13679 linker script /DISCARD/, so we'll be discarding
13680 the relocs too. */
13681 }
3348747a 13682 else if (is_vxworks
0bdcacaf 13683 && strcmp (p->sec->output_section->name,
3348747a
NS		 13684 ".tls_vars") == 0)
13685 {
13686 /* Relocations in vxworks .tls_vars sections are
13687 handled specially by the loader. */
13688 }
5e681ec4
PB		 13689 else if (p->count != 0)
13690 {
0bdcacaf 13691 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13692 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13693 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13694 info->flags |= DF_TEXTREL;
13695 }
13696 }
13697 }
13698
13699 local_got = elf_local_got_refcounts (ibfd);
13700 if (!local_got)
13701 continue;
13702
0ffa91dd 13703 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13704 locsymcount = symtab_hdr->sh_info;
13705 end_local_got = local_got + locsymcount;
34e77a92 13706 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13707 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13708 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13709 symndx = 0;
362d30a1
RS		 13710 s = htab->root.sgot;
13711 srel = htab->root.srelgot;
0855e32b 13712 for (; local_got < end_local_got;
34e77a92
RS		 13713 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13714 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13715 {
0855e32b 13716 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13717 local_iplt = *local_iplt_ptr;
13718 if (local_iplt != NULL)
13719 {
13720 struct elf_dyn_relocs *p;
13721
13722 if (local_iplt->root.refcount > 0)
13723 {
13724 elf32_arm_allocate_plt_entry (info, TRUE,
13725 &local_iplt->root,
13726 &local_iplt->arm);
13727 if (local_iplt->arm.noncall_refcount == 0)
13728 /* All references to the PLT are calls, so all
13729 non-call references can resolve directly to the
13730 run-time target. This means that the .got entry
13731 would be the same as the .igot.plt entry, so there's
13732 no point creating both. */
13733 *local_got = 0;
13734 }
13735 else
13736 {
13737 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13738 local_iplt->root.offset = (bfd_vma) -1;
13739 }
13740
13741 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13742 {
13743 asection *psrel;
13744
13745 psrel = elf_section_data (p->sec)->sreloc;
13746 if (local_iplt->arm.noncall_refcount == 0)
13747 elf32_arm_allocate_irelocs (info, psrel, p->count);
13748 else
13749 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13750 }
13751 }
5e681ec4
PB		 13752 if (*local_got > 0)
13753 {
34e77a92
RS		 13754 Elf_Internal_Sym *isym;
13755
eea6121a 13756 *local_got = s->size;
ba93b8ac
DJ		 13757 if (*local_tls_type & GOT_TLS_GD)
13758 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13759 s->size += 8;
0855e32b
NS		 13760 if (*local_tls_type & GOT_TLS_GDESC)
13761 {
13762 *local_tlsdesc_gotent = htab->root.sgotplt->size
13763 - elf32_arm_compute_jump_table_size (htab);
13764 htab->root.sgotplt->size += 8;
13765 *local_got = (bfd_vma) -2;
34e77a92 13766 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13767 reloc in the middle of .got.plt. */
99059e56 13768 htab->num_tls_desc++;
0855e32b 13769 }
ba93b8ac
DJ		 13770 if (*local_tls_type & GOT_TLS_IE)
13771 s->size += 4;
ba93b8ac 13772
0855e32b
NS		 13773 if (*local_tls_type & GOT_NORMAL)
13774 {
13775 /* If the symbol is both GD and GDESC, *local_got
13776 may have been overwritten. */
13777 *local_got = s->size;
13778 s->size += 4;
13779 }
13780
34e77a92
RS		 13781 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13782 if (isym == NULL)
13783 return FALSE;
13784
13785 /* If all references to an STT_GNU_IFUNC PLT are calls,
13786 then all non-call references, including this GOT entry,
13787 resolve directly to the run-time target. */
13788 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13789 && (local_iplt == NULL
13790 || local_iplt->arm.noncall_refcount == 0))
13791 elf32_arm_allocate_irelocs (info, srel, 1);
3064e1ff 13792 else if (info->shared || output_bfd->flags & DYNAMIC)
0855e32b 13793 {
3064e1ff
JB		 13794 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13795 || *local_tls_type & GOT_TLS_GD)
13796 elf32_arm_allocate_dynrelocs (info, srel, 1);
99059e56 13797
3064e1ff
JB		 13798 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13799 {
13800 elf32_arm_allocate_dynrelocs (info,
13801 htab->root.srelplt, 1);
13802 htab->tls_trampoline = -1;
13803 }
0855e32b 13804 }
5e681ec4
PB		 13805 }
13806 else
13807 *local_got = (bfd_vma) -1;
13808 }
252b5132
RH		 13809 }
13810
ba93b8ac
DJ		 13811 if (htab->tls_ldm_got.refcount > 0)
13812 {
13813 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13814 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13815 htab->tls_ldm_got.offset = htab->root.sgot->size;
13816 htab->root.sgot->size += 8;
ba93b8ac 13817 if (info->shared)
47beaa6a 13818 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13819 }
13820 else
13821 htab->tls_ldm_got.offset = -1;
13822
5e681ec4
PB		 13823 /* Allocate global sym .plt and .got entries, and space for global
13824 sym dynamic relocs. */
47beaa6a 13825 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13826
d504ffc8
DJ		 13827 /* Here we rummage through the found bfds to collect glue information. */
13828 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 13829 {
0ffa91dd 13830 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13831 continue;
13832
c7b8f16e
JB		 13833 /* Initialise mapping tables for code/data. */
13834 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13835
c7b8f16e
JB		 13836 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13837 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
99059e56
RM		 13838 /* xgettext:c-format */
13839 _bfd_error_handler (_("Errors encountered processing file %s"),
c7b8f16e
JB		 13840 ibfd->filename);
13841 }
d504ffc8 13842
3e6b1042
DJ		 13843 /* Allocate space for the glue sections now that we've sized them. */
13844 bfd_elf32_arm_allocate_interworking_sections (info);
13845
0855e32b
NS		 13846 /* For every jump slot reserved in the sgotplt, reloc_count is
13847 incremented. However, when we reserve space for TLS descriptors,
13848 it's not incremented, so in order to compute the space reserved
13849 for them, it suffices to multiply the reloc count by the jump
13850 slot size. */
13851 if (htab->root.srelplt)
13852 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13853
13854 if (htab->tls_trampoline)
13855 {
13856 if (htab->root.splt->size == 0)
13857 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13858
0855e32b
NS		 13859 htab->tls_trampoline = htab->root.splt->size;
13860 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13861
0855e32b 13862 /* If we're not using lazy TLS relocations, don't generate the
99059e56 13863 PLT and GOT entries they require. */
0855e32b
NS		 13864 if (!(info->flags & DF_BIND_NOW))
13865 {
13866 htab->dt_tlsdesc_got = htab->root.sgot->size;
13867 htab->root.sgot->size += 4;
13868
13869 htab->dt_tlsdesc_plt = htab->root.splt->size;
13870 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13871 }
13872 }
13873
252b5132
RH		 13874 /* The check_relocs and adjust_dynamic_symbol entry points have
13875 determined the sizes of the various dynamic sections. Allocate
13876 memory for them. */
b34976b6
AM		 13877 plt = FALSE;
13878 relocs = FALSE;
252b5132
RH		 13879 for (s = dynobj->sections; s != NULL; s = s->next)
13880 {
13881 const char * name;
252b5132
RH		 13882
13883 if ((s->flags & SEC_LINKER_CREATED) == 0)
13884 continue;
13885
13886 /* It's OK to base decisions on the section name, because none
13887 of the dynobj section names depend upon the input files. */
13888 name = bfd_get_section_name (dynobj, s);
13889
34e77a92 13890 if (s == htab->root.splt)
252b5132 13891 {
c456f082
AM		 13892 /* Remember whether there is a PLT. */
13893 plt = s->size != 0;
252b5132 13894 }
0112cd26 13895 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13896 {
c456f082 13897 if (s->size != 0)
252b5132 13898 {
252b5132 13899 /* Remember whether there are any reloc sections other
00a97672 13900 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13901 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13902 relocs = TRUE;
252b5132
RH		 13903
13904 /* We use the reloc_count field as a counter if we need
13905 to copy relocs into the output file. */
13906 s->reloc_count = 0;
13907 }
13908 }
34e77a92
RS		 13909 else if (s != htab->root.sgot
13910 && s != htab->root.sgotplt
13911 && s != htab->root.iplt
13912 && s != htab->root.igotplt
13913 && s != htab->sdynbss)
252b5132
RH		 13914 {
13915 /* It's not one of our sections, so don't allocate space. */
13916 continue;
13917 }
13918
c456f082 13919 if (s->size == 0)
252b5132 13920 {
c456f082 13921 /* If we don't need this section, strip it from the
00a97672
RS		 13922 output file. This is mostly to handle .rel(a).bss and
13923 .rel(a).plt. We must create both sections in
c456f082
AM		 13924 create_dynamic_sections, because they must be created
13925 before the linker maps input sections to output
13926 sections. The linker does that before
13927 adjust_dynamic_symbol is called, and it is that
13928 function which decides whether anything needs to go
13929 into these sections. */
8423293d 13930 s->flags |= SEC_EXCLUDE;
252b5132
RH		 13931 continue;
13932 }
13933
c456f082
AM		 13934 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13935 continue;
13936
252b5132 13937 /* Allocate memory for the section contents. */
21d799b5 13938 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 13939 if (s->contents == NULL)
b34976b6 13940 return FALSE;
252b5132
RH		 13941 }
13942
13943 if (elf_hash_table (info)->dynamic_sections_created)
13944 {
13945 /* Add some entries to the .dynamic section. We fill in the
13946 values later, in elf32_arm_finish_dynamic_sections, but we
13947 must add the entries now so that we get the correct size for
13948 the .dynamic section. The DT_DEBUG entry is filled in by the
13949 dynamic linker and used by the debugger. */
dc810e39 13950#define add_dynamic_entry(TAG, VAL) \
5a580b3a 13951 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 13952
8532796c 13953 if (info->executable)
252b5132 13954 {
dc810e39 13955 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 13956 return FALSE;
252b5132
RH		 13957 }
13958
13959 if (plt)
13960 {
dc810e39
AM		 13961 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13962 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 13963 || !add_dynamic_entry (DT_PLTREL,
13964 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 13965 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 13966 return FALSE;
0855e32b
NS		 13967
13968 if (htab->dt_tlsdesc_plt &&
b38cadfb 13969 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 13970 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 13971 return FALSE;
252b5132
RH		 13972 }
13973
13974 if (relocs)
13975 {
00a97672
RS		 13976 if (htab->use_rel)
13977 {
13978 if (!add_dynamic_entry (DT_REL, 0)
13979 || !add_dynamic_entry (DT_RELSZ, 0)
13980 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13981 return FALSE;
13982 }
13983 else
13984 {
13985 if (!add_dynamic_entry (DT_RELA, 0)
13986 || !add_dynamic_entry (DT_RELASZ, 0)
13987 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13988 return FALSE;
13989 }
252b5132
RH		 13990 }
13991
08d1f311
DJ		 13992 /* If any dynamic relocs apply to a read-only section,
13993 then we need a DT_TEXTREL entry. */
13994 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 13995 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13996 info);
08d1f311 13997
99e4ae17 13998 if ((info->flags & DF_TEXTREL) != 0)
252b5132 13999 {
dc810e39 14000 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 14001 return FALSE;
252b5132 14002 }
7a2b07ff
NS		 14003 if (htab->vxworks_p
14004 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14005 return FALSE;
252b5132 14006 }
8532796c 14007#undef add_dynamic_entry
252b5132 14008
b34976b6 14009 return TRUE;
252b5132
RH		 14010}
14011
0855e32b
NS		 14012/* Size sections even though they're not dynamic. We use it to setup
14013 _TLS_MODULE_BASE_, if needed. */
14014
14015static bfd_boolean
14016elf32_arm_always_size_sections (bfd *output_bfd,
99059e56 14017 struct bfd_link_info *info)
0855e32b
NS		 14018{
14019 asection *tls_sec;
14020
14021 if (info->relocatable)
14022 return TRUE;
14023
14024 tls_sec = elf_hash_table (info)->tls_sec;
14025
14026 if (tls_sec)
14027 {
14028 struct elf_link_hash_entry *tlsbase;
14029
14030 tlsbase = elf_link_hash_lookup
14031 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14032
14033 if (tlsbase)
99059e56
RM		 14034 {
14035 struct bfd_link_hash_entry *bh = NULL;
0855e32b 14036 const struct elf_backend_data *bed
99059e56 14037 = get_elf_backend_data (output_bfd);
0855e32b 14038
99059e56 14039 if (!(_bfd_generic_link_add_one_symbol
0855e32b
NS		 14040 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14041 tls_sec, 0, NULL, FALSE,
14042 bed->collect, &bh)))
14043 return FALSE;
b38cadfb 14044
99059e56
RM		 14045 tlsbase->type = STT_TLS;
14046 tlsbase = (struct elf_link_hash_entry *)bh;
14047 tlsbase->def_regular = 1;
14048 tlsbase->other = STV_HIDDEN;
14049 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
0855e32b
NS		 14050 }
14051 }
14052 return TRUE;
14053}
14054
252b5132
RH		 14055/* Finish up dynamic symbol handling. We set the contents of various
14056 dynamic sections here. */
14057
b34976b6 14058static bfd_boolean
906e58ca
NC		 14059elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14060 struct bfd_link_info * info,
14061 struct elf_link_hash_entry * h,
14062 Elf_Internal_Sym * sym)
252b5132 14063{
e5a52504 14064 struct elf32_arm_link_hash_table *htab;
b7693d02 14065 struct elf32_arm_link_hash_entry *eh;
252b5132 14066
e5a52504 14067 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14068 if (htab == NULL)
14069 return FALSE;
14070
b7693d02 14071 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 14072
14073 if (h->plt.offset != (bfd_vma) -1)
14074 {
34e77a92 14075 if (!eh->is_iplt)
e5a52504 14076 {
34e77a92 14077 BFD_ASSERT (h->dynindx != -1);
57460bcf
NC		 14078 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14079 h->dynindx, 0))
14080 return FALSE;
e5a52504 14081 }
57e8b36a 14082
f5385ebf 14083 if (!h->def_regular)
252b5132
RH		 14084 {
14085 /* Mark the symbol as undefined, rather than as defined in
14086 the .plt section. Leave the value alone. */
14087 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 14088 /* If the symbol is weak, we do need to clear the value.
14089 Otherwise, the PLT entry would provide a definition for
14090 the symbol even if the symbol wasn't defined anywhere,
14091 and so the symbol would never be NULL. */
f5385ebf 14092 if (!h->ref_regular_nonweak)
d982ba73 14093 sym->st_value = 0;
252b5132 14094 }
34e77a92
RS		 14095 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14096 {
14097 /* At least one non-call relocation references this .iplt entry,
14098 so the .iplt entry is the function's canonical address. */
14099 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14100 sym->st_target_internal = ST_BRANCH_TO_ARM;
14101 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14102 (output_bfd, htab->root.iplt->output_section));
14103 sym->st_value = (h->plt.offset
14104 + htab->root.iplt->output_section->vma
14105 + htab->root.iplt->output_offset);
14106 }
252b5132
RH		 14107 }
14108
f5385ebf 14109 if (h->needs_copy)
252b5132
RH		 14110 {
14111 asection * s;
947216bf 14112 Elf_Internal_Rela rel;
252b5132
RH		 14113
14114 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14115 BFD_ASSERT (h->dynindx != -1
14116 && (h->root.type == bfd_link_hash_defined
14117 || h->root.type == bfd_link_hash_defweak));
14118
362d30a1 14119 s = htab->srelbss;
252b5132
RH		 14120 BFD_ASSERT (s != NULL);
14121
00a97672 14122 rel.r_addend = 0;
252b5132
RH		 14123 rel.r_offset = (h->root.u.def.value
14124 + h->root.u.def.section->output_section->vma
14125 + h->root.u.def.section->output_offset);
14126 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14127 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14128 }
14129
00a97672
RS		 14130 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14131 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14132 to the ".got" section. */
9637f6ef 14133 if (h == htab->root.hdynamic
00a97672 14134 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14135 sym->st_shndx = SHN_ABS;
14136
b34976b6 14137 return TRUE;
252b5132
RH		 14138}
14139
0855e32b
NS		 14140static void
14141arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14142 void *contents,
14143 const unsigned long *template, unsigned count)
14144{
14145 unsigned ix;
b38cadfb 14146
0855e32b
NS		 14147 for (ix = 0; ix != count; ix++)
14148 {
14149 unsigned long insn = template[ix];
14150
14151 /* Emit mov pc,rx if bx is not permitted. */
14152 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14153 insn = (insn & 0xf000000f) | 0x01a0f000;
14154 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14155 }
14156}
14157
99059e56
RM		 14158/* Install the special first PLT entry for elf32-arm-nacl. Unlike
14159 other variants, NaCl needs this entry in a static executable's
14160 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14161 zero. For .iplt really only the last bundle is useful, and .iplt
14162 could have a shorter first entry, with each individual PLT entry's
14163 relative branch calculated differently so it targets the last
14164 bundle instead of the instruction before it (labelled .Lplt_tail
14165 above). But it's simpler to keep the size and layout of PLT0
14166 consistent with the dynamic case, at the cost of some dead code at
14167 the start of .iplt and the one dead store to the stack at the start
14168 of .Lplt_tail. */
14169static void
14170arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14171 asection *plt, bfd_vma got_displacement)
14172{
14173 unsigned int i;
14174
14175 put_arm_insn (htab, output_bfd,
14176 elf32_arm_nacl_plt0_entry[0]
14177 | arm_movw_immediate (got_displacement),
14178 plt->contents + 0);
14179 put_arm_insn (htab, output_bfd,
14180 elf32_arm_nacl_plt0_entry[1]
14181 | arm_movt_immediate (got_displacement),
14182 plt->contents + 4);
14183
14184 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14185 put_arm_insn (htab, output_bfd,
14186 elf32_arm_nacl_plt0_entry[i],
14187 plt->contents + (i * 4));
14188}
14189
252b5132
RH		 14190/* Finish up the dynamic sections. */
14191
b34976b6 14192static bfd_boolean
57e8b36a 14193elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14194{
14195 bfd * dynobj;
14196 asection * sgot;
14197 asection * sdyn;
4dfe6ac6
NC		 14198 struct elf32_arm_link_hash_table *htab;
14199
14200 htab = elf32_arm_hash_table (info);
14201 if (htab == NULL)
14202 return FALSE;
252b5132
RH		 14203
14204 dynobj = elf_hash_table (info)->dynobj;
14205
362d30a1 14206 sgot = htab->root.sgotplt;
894891db
NC		 14207 /* A broken linker script might have discarded the dynamic sections.
14208 Catch this here so that we do not seg-fault later on. */
14209 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14210 return FALSE;
3d4d4302 14211 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14212
14213 if (elf_hash_table (info)->dynamic_sections_created)
14214 {
14215 asection *splt;
14216 Elf32_External_Dyn *dyncon, *dynconend;
14217
362d30a1 14218 splt = htab->root.splt;
24a1ba0f 14219 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14220 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14221
14222 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14223 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14224
252b5132
RH		 14225 for (; dyncon < dynconend; dyncon++)
14226 {
14227 Elf_Internal_Dyn dyn;
14228 const char * name;
14229 asection * s;
14230
14231 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14232
14233 switch (dyn.d_tag)
14234 {
229fcec5
MM		 14235 unsigned int type;
14236
252b5132 14237 default:
7a2b07ff
NS		 14238 if (htab->vxworks_p
14239 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14240 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14241 break;
14242
229fcec5
MM		 14243 case DT_HASH:
14244 name = ".hash";
14245 goto get_vma_if_bpabi;
14246 case DT_STRTAB:
14247 name = ".dynstr";
14248 goto get_vma_if_bpabi;
14249 case DT_SYMTAB:
14250 name = ".dynsym";
14251 goto get_vma_if_bpabi;
c0042f5d
MM		 14252 case DT_VERSYM:
14253 name = ".gnu.version";
14254 goto get_vma_if_bpabi;
14255 case DT_VERDEF:
14256 name = ".gnu.version_d";
14257 goto get_vma_if_bpabi;
14258 case DT_VERNEED:
14259 name = ".gnu.version_r";
14260 goto get_vma_if_bpabi;
14261
252b5132
RH		 14262 case DT_PLTGOT:
14263 name = ".got";
14264 goto get_vma;
14265 case DT_JMPREL:
00a97672 14266 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14267 get_vma:
14268 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14269 if (s == NULL)
14270 {
14271 /* PR ld/14397: Issue an error message if a required section is missing. */
14272 (*_bfd_error_handler)
14273 (_("error: required section '%s' not found in the linker script"), name);
14274 bfd_set_error (bfd_error_invalid_operation);
14275 return FALSE;
14276 }
229fcec5
MM		 14277 if (!htab->symbian_p)
14278 dyn.d_un.d_ptr = s->vma;
14279 else
14280 /* In the BPABI, tags in the PT_DYNAMIC section point
14281 at the file offset, not the memory address, for the
14282 convenience of the post linker. */
14283 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14284 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14285 break;
14286
229fcec5
MM		 14287 get_vma_if_bpabi:
14288 if (htab->symbian_p)
14289 goto get_vma;
14290 break;
14291
252b5132 14292 case DT_PLTRELSZ:
362d30a1 14293 s = htab->root.srelplt;
252b5132 14294 BFD_ASSERT (s != NULL);
eea6121a 14295 dyn.d_un.d_val = s->size;
252b5132
RH		 14296 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14297 break;
906e58ca 14298
252b5132 14299 case DT_RELSZ:
00a97672 14300 case DT_RELASZ:
229fcec5
MM		 14301 if (!htab->symbian_p)
14302 {
14303 /* My reading of the SVR4 ABI indicates that the
14304 procedure linkage table relocs (DT_JMPREL) should be
14305 included in the overall relocs (DT_REL). This is
14306 what Solaris does. However, UnixWare can not handle
14307 that case. Therefore, we override the DT_RELSZ entry
14308 here to make it not include the JMPREL relocs. Since
00a97672 14309 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14310 other relocation sections, we don't have to worry
14311 about changing the DT_REL entry. */
362d30a1 14312 s = htab->root.srelplt;
229fcec5
MM		 14313 if (s != NULL)
14314 dyn.d_un.d_val -= s->size;
14315 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14316 break;
14317 }
8029a119 14318 /* Fall through. */
229fcec5
MM		 14319
14320 case DT_REL:
14321 case DT_RELA:
229fcec5
MM		 14322 /* In the BPABI, the DT_REL tag must point at the file
14323 offset, not the VMA, of the first relocation
14324 section. So, we use code similar to that in
14325 elflink.c, but do not check for SHF_ALLOC on the
14326 relcoation section, since relocations sections are
14327 never allocated under the BPABI. The comments above
14328 about Unixware notwithstanding, we include all of the
14329 relocations here. */
14330 if (htab->symbian_p)
14331 {
14332 unsigned int i;
14333 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14334 ? SHT_REL : SHT_RELA);
14335 dyn.d_un.d_val = 0;
14336 for (i = 1; i < elf_numsections (output_bfd); i++)
14337 {
906e58ca 14338 Elf_Internal_Shdr *hdr
229fcec5
MM		 14339 = elf_elfsections (output_bfd)[i];
14340 if (hdr->sh_type == type)
14341 {
906e58ca 14342 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14343 || dyn.d_tag == DT_RELASZ)
14344 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14345 else if ((ufile_ptr) hdr->sh_offset
14346 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14347 dyn.d_un.d_val = hdr->sh_offset;
14348 }
14349 }
14350 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14351 }
252b5132 14352 break;
88f7bcd5 14353
0855e32b 14354 case DT_TLSDESC_PLT:
99059e56 14355 s = htab->root.splt;
0855e32b
NS		 14356 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14357 + htab->dt_tlsdesc_plt);
14358 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14359 break;
14360
14361 case DT_TLSDESC_GOT:
99059e56 14362 s = htab->root.sgot;
0855e32b 14363 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
99059e56 14364 + htab->dt_tlsdesc_got);
0855e32b
NS		 14365 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14366 break;
14367
88f7bcd5
NC		 14368 /* Set the bottom bit of DT_INIT/FINI if the
14369 corresponding function is Thumb. */
14370 case DT_INIT:
14371 name = info->init_function;
14372 goto get_sym;
14373 case DT_FINI:
14374 name = info->fini_function;
14375 get_sym:
14376 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14377 then there is nothing to adjust. */
88f7bcd5
NC		 14378 if (dyn.d_un.d_val != 0)
14379 {
14380 struct elf_link_hash_entry * eh;
14381
14382 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14383 FALSE, FALSE, TRUE);
35fc36a8 14384 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14385 {
14386 dyn.d_un.d_val |= 1;
b34976b6 14387 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14388 }
14389 }
14390 break;
252b5132
RH		 14391 }
14392 }
14393
24a1ba0f 14394 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14395 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14396 {
00a97672
RS		 14397 const bfd_vma *plt0_entry;
14398 bfd_vma got_address, plt_address, got_displacement;
14399
14400 /* Calculate the addresses of the GOT and PLT. */
14401 got_address = sgot->output_section->vma + sgot->output_offset;
14402 plt_address = splt->output_section->vma + splt->output_offset;
14403
14404 if (htab->vxworks_p)
14405 {
14406 /* The VxWorks GOT is relocated by the dynamic linker.
14407 Therefore, we must emit relocations rather than simply
14408 computing the values now. */
14409 Elf_Internal_Rela rel;
14410
14411 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14412 put_arm_insn (htab, output_bfd, plt0_entry[0],
14413 splt->contents + 0);
14414 put_arm_insn (htab, output_bfd, plt0_entry[1],
14415 splt->contents + 4);
14416 put_arm_insn (htab, output_bfd, plt0_entry[2],
14417 splt->contents + 8);
00a97672
RS		 14418 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14419
8029a119 14420 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14421 rel.r_offset = plt_address + 12;
14422 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14423 rel.r_addend = 0;
14424 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14425 htab->srelplt2->contents);
14426 }
b38cadfb 14427 else if (htab->nacl_p)
99059e56
RM		 14428 arm_nacl_put_plt0 (htab, output_bfd, splt,
14429 got_address + 8 - (plt_address + 16));
00a97672
RS		 14430 else
14431 {
14432 got_displacement = got_address - (plt_address + 16);
14433
14434 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14435 put_arm_insn (htab, output_bfd, plt0_entry[0],
14436 splt->contents + 0);
14437 put_arm_insn (htab, output_bfd, plt0_entry[1],
14438 splt->contents + 4);
14439 put_arm_insn (htab, output_bfd, plt0_entry[2],
14440 splt->contents + 8);
14441 put_arm_insn (htab, output_bfd, plt0_entry[3],
14442 splt->contents + 12);
5e681ec4 14443
5e681ec4 14444#ifdef FOUR_WORD_PLT
00a97672
RS		 14445 /* The displacement value goes in the otherwise-unused
14446 last word of the second entry. */
14447 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14448#else
00a97672 14449 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14450#endif
00a97672 14451 }
f7a74f8c 14452 }
252b5132
RH		 14453
14454 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14455 really seem like the right value. */
74541ad4
AM		 14456 if (splt->output_section->owner == output_bfd)
14457 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14458
0855e32b
NS		 14459 if (htab->dt_tlsdesc_plt)
14460 {
14461 bfd_vma got_address
14462 = sgot->output_section->vma + sgot->output_offset;
14463 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14464 + htab->root.sgot->output_offset);
14465 bfd_vma plt_address
14466 = splt->output_section->vma + splt->output_offset;
14467
b38cadfb 14468 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14469 splt->contents + htab->dt_tlsdesc_plt,
14470 dl_tlsdesc_lazy_trampoline, 6);
14471
14472 bfd_put_32 (output_bfd,
14473 gotplt_address + htab->dt_tlsdesc_got
14474 - (plt_address + htab->dt_tlsdesc_plt)
14475 - dl_tlsdesc_lazy_trampoline[6],
14476 splt->contents + htab->dt_tlsdesc_plt + 24);
14477 bfd_put_32 (output_bfd,
14478 got_address - (plt_address + htab->dt_tlsdesc_plt)
14479 - dl_tlsdesc_lazy_trampoline[7],
14480 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14481 }
14482
14483 if (htab->tls_trampoline)
14484 {
b38cadfb 14485 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14486 splt->contents + htab->tls_trampoline,
14487 tls_trampoline, 3);
14488#ifdef FOUR_WORD_PLT
14489 bfd_put_32 (output_bfd, 0x00000000,
14490 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14491#endif
0855e32b
NS		 14492 }
14493
362d30a1 14494 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14495 {
14496 /* Correct the .rel(a).plt.unloaded relocations. They will have
14497 incorrect symbol indexes. */
14498 int num_plts;
eed62c48 14499 unsigned char *p;
00a97672 14500
362d30a1 14501 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14502 / htab->plt_entry_size);
14503 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14504
14505 for (; num_plts; num_plts--)
14506 {
14507 Elf_Internal_Rela rel;
14508
14509 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14510 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14511 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14512 p += RELOC_SIZE (htab);
14513
14514 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14515 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14516 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14517 p += RELOC_SIZE (htab);
14518 }
14519 }
252b5132
RH		 14520 }
14521
99059e56
RM		 14522 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14523 /* NaCl uses a special first entry in .iplt too. */
14524 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14525
252b5132 14526 /* Fill in the first three entries in the global offset table. */
229fcec5 14527 if (sgot)
252b5132 14528 {
229fcec5
MM		 14529 if (sgot->size > 0)
14530 {
14531 if (sdyn == NULL)
14532 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14533 else
14534 bfd_put_32 (output_bfd,
14535 sdyn->output_section->vma + sdyn->output_offset,
14536 sgot->contents);
14537 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14538 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14539 }
252b5132 14540
229fcec5
MM		 14541 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14542 }
252b5132 14543
b34976b6 14544 return TRUE;
252b5132
RH		 14545}
14546
ba96a88f 14547static void
57e8b36a 14548elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14549{
9b485d32 14550 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14551 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14552
14553 i_ehdrp = elf_elfheader (abfd);
14554
94a3258f
PB		 14555 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14556 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14557 else
7394f108 14558 _bfd_elf_post_process_headers (abfd, link_info);
ba96a88f 14559 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14560
93204d3a
PB		 14561 if (link_info)
14562 {
14563 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14564 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14565 i_ehdrp->e_flags |= EF_ARM_BE8;
14566 }
3bfcb652
NC		 14567
14568 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14569 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14570 {
14571 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14572 if (abi)
14573 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14574 else
14575 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14576 }
ba96a88f
NC		 14577}
14578
99e4ae17 14579static enum elf_reloc_type_class
7e612e98
AM		 14580elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14581 const asection *rel_sec ATTRIBUTE_UNUSED,
14582 const Elf_Internal_Rela *rela)
99e4ae17 14583{
f51e552e 14584 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14585 {
14586 case R_ARM_RELATIVE:
14587 return reloc_class_relative;
14588 case R_ARM_JUMP_SLOT:
14589 return reloc_class_plt;
14590 case R_ARM_COPY:
14591 return reloc_class_copy;
14592 default:
14593 return reloc_class_normal;
14594 }
14595}
14596
e489d0ae 14597static void
57e8b36a 14598elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14599{
5a6c6817 14600 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14601}
14602
40a18ebd
NC		 14603/* Return TRUE if this is an unwinding table entry. */
14604
14605static bfd_boolean
14606is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14607{
0112cd26
NC		 14608 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14609 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14610}
14611
14612
14613/* Set the type and flags for an ARM section. We do this by
14614 the section name, which is a hack, but ought to work. */
14615
14616static bfd_boolean
14617elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14618{
14619 const char * name;
14620
14621 name = bfd_get_section_name (abfd, sec);
14622
14623 if (is_arm_elf_unwind_section_name (abfd, name))
14624 {
14625 hdr->sh_type = SHT_ARM_EXIDX;
14626 hdr->sh_flags |= SHF_LINK_ORDER;
14627 }
14628 return TRUE;
14629}
14630
6dc132d9
L		 14631/* Handle an ARM specific section when reading an object file. This is
14632 called when bfd_section_from_shdr finds a section with an unknown
14633 type. */
40a18ebd
NC		 14634
14635static bfd_boolean
14636elf32_arm_section_from_shdr (bfd *abfd,
14637 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14638 const char *name,
14639 int shindex)
40a18ebd
NC		 14640{
14641 /* There ought to be a place to keep ELF backend specific flags, but
14642 at the moment there isn't one. We just keep track of the
14643 sections by their name, instead. Fortunately, the ABI gives
14644 names for all the ARM specific sections, so we will probably get
14645 away with this. */
14646 switch (hdr->sh_type)
14647 {
14648 case SHT_ARM_EXIDX:
0951f019
RE		 14649 case SHT_ARM_PREEMPTMAP:
14650 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14651 break;
14652
14653 default:
14654 return FALSE;
14655 }
14656
6dc132d9 14657 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14658 return FALSE;
14659
14660 return TRUE;
14661}
e489d0ae 14662
44444f50
NC		 14663static _arm_elf_section_data *
14664get_arm_elf_section_data (asection * sec)
14665{
47b2e99c
JZ		 14666 if (sec && sec->owner && is_arm_elf (sec->owner))
14667 return elf32_arm_section_data (sec);
44444f50
NC		 14668 else
14669 return NULL;
8e3de13a
NC		 14670}
14671
4e617b1e
PB		 14672typedef struct
14673{
57402f1e 14674 void *flaginfo;
4e617b1e 14675 struct bfd_link_info *info;
91a5743d
PB		 14676 asection *sec;
14677 int sec_shndx;
6e0b88f1
AM		 14678 int (*func) (void *, const char *, Elf_Internal_Sym *,
14679 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14680} output_arch_syminfo;
14681
14682enum map_symbol_type
14683{
14684 ARM_MAP_ARM,
14685 ARM_MAP_THUMB,
14686 ARM_MAP_DATA
14687};
14688
14689
7413f23f 14690/* Output a single mapping symbol. */
4e617b1e
PB		 14691
14692static bfd_boolean
7413f23f
DJ		 14693elf32_arm_output_map_sym (output_arch_syminfo *osi,
14694 enum map_symbol_type type,
14695 bfd_vma offset)
4e617b1e
PB		 14696{
14697 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14698 Elf_Internal_Sym sym;
14699
91a5743d
PB		 14700 sym.st_value = osi->sec->output_section->vma
14701 + osi->sec->output_offset
14702 + offset;
4e617b1e
PB		 14703 sym.st_size = 0;
14704 sym.st_other = 0;
14705 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14706 sym.st_shndx = osi->sec_shndx;
35fc36a8 14707 sym.st_target_internal = 0;
fe33d2fa 14708 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14709 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14710}
14711
34e77a92
RS		 14712/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14713 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14714
14715static bfd_boolean
34e77a92
RS		 14716elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14717 bfd_boolean is_iplt_entry_p,
14718 union gotplt_union *root_plt,
14719 struct arm_plt_info *arm_plt)
4e617b1e 14720{
4e617b1e 14721 struct elf32_arm_link_hash_table *htab;
34e77a92 14722 bfd_vma addr, plt_header_size;
4e617b1e 14723
34e77a92 14724 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14725 return TRUE;
14726
4dfe6ac6
NC		 14727 htab = elf32_arm_hash_table (osi->info);
14728 if (htab == NULL)
14729 return FALSE;
14730
34e77a92
RS		 14731 if (is_iplt_entry_p)
14732 {
14733 osi->sec = htab->root.iplt;
14734 plt_header_size = 0;
14735 }
14736 else
14737 {
14738 osi->sec = htab->root.splt;
14739 plt_header_size = htab->plt_header_size;
14740 }
14741 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14742 (osi->info->output_bfd, osi->sec->output_section));
14743
14744 addr = root_plt->offset & -2;
4e617b1e
PB		 14745 if (htab->symbian_p)
14746 {
7413f23f 14747 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14748 return FALSE;
7413f23f 14749 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14750 return FALSE;
14751 }
14752 else if (htab->vxworks_p)
14753 {
7413f23f 14754 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14755 return FALSE;
7413f23f 14756 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14757 return FALSE;
7413f23f 14758 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14759 return FALSE;
7413f23f 14760 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14761 return FALSE;
14762 }
b38cadfb
NC		 14763 else if (htab->nacl_p)
14764 {
14765 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14766 return FALSE;
14767 }
4e617b1e
PB		 14768 else
14769 {
34e77a92 14770 bfd_boolean thumb_stub_p;
bd97cb95 14771
34e77a92
RS		 14772 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14773 if (thumb_stub_p)
4e617b1e 14774 {
7413f23f 14775 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14776 return FALSE;
14777 }
14778#ifdef FOUR_WORD_PLT
7413f23f 14779 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14780 return FALSE;
7413f23f 14781 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14782 return FALSE;
14783#else
906e58ca 14784 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14785 so only need to output a mapping symbol for the first PLT entry and
14786 entries with thumb thunks. */
34e77a92 14787 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14788 {
7413f23f 14789 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14790 return FALSE;
14791 }
14792#endif
14793 }
14794
14795 return TRUE;
14796}
14797
34e77a92
RS		 14798/* Output mapping symbols for PLT entries associated with H. */
14799
14800static bfd_boolean
14801elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14802{
14803 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14804 struct elf32_arm_link_hash_entry *eh;
14805
14806 if (h->root.type == bfd_link_hash_indirect)
14807 return TRUE;
14808
14809 if (h->root.type == bfd_link_hash_warning)
14810 /* When warning symbols are created, they **replace** the "real"
14811 entry in the hash table, thus we never get to see the real
14812 symbol in a hash traversal. So look at it now. */
14813 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14814
14815 eh = (struct elf32_arm_link_hash_entry *) h;
14816 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14817 &h->plt, &eh->plt);
14818}
14819
7413f23f
DJ		 14820/* Output a single local symbol for a generated stub. */
14821
14822static bfd_boolean
14823elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14824 bfd_vma offset, bfd_vma size)
14825{
7413f23f
DJ		 14826 Elf_Internal_Sym sym;
14827
7413f23f
DJ		 14828 sym.st_value = osi->sec->output_section->vma
14829 + osi->sec->output_offset
14830 + offset;
14831 sym.st_size = size;
14832 sym.st_other = 0;
14833 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14834 sym.st_shndx = osi->sec_shndx;
35fc36a8 14835 sym.st_target_internal = 0;
57402f1e 14836 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14837}
4e617b1e 14838
da5938a2 14839static bfd_boolean
8029a119
NC		 14840arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14841 void * in_arg)
da5938a2
NC		 14842{
14843 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14844 asection *stub_sec;
14845 bfd_vma addr;
7413f23f 14846 char *stub_name;
9a008db3 14847 output_arch_syminfo *osi;
d3ce72d0 14848 const insn_sequence *template_sequence;
461a49ca
DJ		 14849 enum stub_insn_type prev_type;
14850 int size;
14851 int i;
14852 enum map_symbol_type sym_type;
da5938a2
NC		 14853
14854 /* Massage our args to the form they really have. */
14855 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14856 osi = (output_arch_syminfo *) in_arg;
da5938a2 14857
da5938a2
NC		 14858 stub_sec = stub_entry->stub_sec;
14859
14860 /* Ensure this stub is attached to the current section being
7413f23f 14861 processed. */
da5938a2
NC		 14862 if (stub_sec != osi->sec)
14863 return TRUE;
14864
7413f23f
DJ		 14865 addr = (bfd_vma) stub_entry->stub_offset;
14866 stub_name = stub_entry->output_name;
da5938a2 14867
d3ce72d0
NC		 14868 template_sequence = stub_entry->stub_template;
14869 switch (template_sequence[0].type)
7413f23f 14870 {
461a49ca
DJ		 14871 case ARM_TYPE:
14872 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14873 return FALSE;
14874 break;
461a49ca 14875 case THUMB16_TYPE:
48229727 14876 case THUMB32_TYPE:
461a49ca
DJ		 14877 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14878 stub_entry->stub_size))
da5938a2
NC		 14879 return FALSE;
14880 break;
14881 default:
14882 BFD_FAIL ();
48229727 14883 return 0;
7413f23f 14884 }
da5938a2 14885
461a49ca
DJ		 14886 prev_type = DATA_TYPE;
14887 size = 0;
14888 for (i = 0; i < stub_entry->stub_template_size; i++)
14889 {
d3ce72d0 14890 switch (template_sequence[i].type)
461a49ca
DJ		 14891 {
14892 case ARM_TYPE:
14893 sym_type = ARM_MAP_ARM;
14894 break;
14895
14896 case THUMB16_TYPE:
48229727 14897 case THUMB32_TYPE:
461a49ca
DJ		 14898 sym_type = ARM_MAP_THUMB;
14899 break;
14900
14901 case DATA_TYPE:
14902 sym_type = ARM_MAP_DATA;
14903 break;
14904
14905 default:
14906 BFD_FAIL ();
4e31c731 14907 return FALSE;
461a49ca
DJ		 14908 }
14909
d3ce72d0 14910 if (template_sequence[i].type != prev_type)
461a49ca 14911 {
d3ce72d0 14912 prev_type = template_sequence[i].type;
461a49ca
DJ		 14913 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14914 return FALSE;
14915 }
14916
d3ce72d0 14917 switch (template_sequence[i].type)
461a49ca
DJ		 14918 {
14919 case ARM_TYPE:
48229727 14920 case THUMB32_TYPE:
461a49ca
DJ		 14921 size += 4;
14922 break;
14923
14924 case THUMB16_TYPE:
14925 size += 2;
14926 break;
14927
14928 case DATA_TYPE:
14929 size += 4;
14930 break;
14931
14932 default:
14933 BFD_FAIL ();
4e31c731 14934 return FALSE;
461a49ca
DJ		 14935 }
14936 }
14937
da5938a2
NC		 14938 return TRUE;
14939}
14940
33811162
DG		 14941/* Output mapping symbols for linker generated sections,
14942 and for those data-only sections that do not have a
14943 $d. */
4e617b1e
PB		 14944
14945static bfd_boolean
14946elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 14947 struct bfd_link_info *info,
57402f1e 14948 void *flaginfo,
6e0b88f1
AM		 14949 int (*func) (void *, const char *,
14950 Elf_Internal_Sym *,
14951 asection *,
14952 struct elf_link_hash_entry *))
4e617b1e
PB		 14953{
14954 output_arch_syminfo osi;
14955 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 14956 bfd_vma offset;
14957 bfd_size_type size;
33811162 14958 bfd *input_bfd;
4e617b1e
PB		 14959
14960 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14961 if (htab == NULL)
14962 return FALSE;
14963
906e58ca 14964 check_use_blx (htab);
91a5743d 14965
57402f1e 14966 osi.flaginfo = flaginfo;
4e617b1e
PB		 14967 osi.info = info;
14968 osi.func = func;
906e58ca 14969
33811162
DG		 14970 /* Add a $d mapping symbol to data-only sections that
14971 don't have any mapping symbol. This may result in (harmless) redundant
14972 mapping symbols. */
14973 for (input_bfd = info->input_bfds;
14974 input_bfd != NULL;
14975 input_bfd = input_bfd->link_next)
14976 {
14977 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14978 for (osi.sec = input_bfd->sections;
14979 osi.sec != NULL;
14980 osi.sec = osi.sec->next)
14981 {
14982 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 14983 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14984 != 0)
33811162
DG		 14985 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14986 == SEC_HAS_CONTENTS
14987 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 14988 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 14989 && osi.sec->size > 0
14990 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 14991 {
14992 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14993 (output_bfd, osi.sec->output_section);
14994 if (osi.sec_shndx != (int)SHN_BAD)
14995 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14996 }
14997 }
14998 }
14999
91a5743d
PB		 15000 /* ARM->Thumb glue. */
15001 if (htab->arm_glue_size > 0)
15002 {
3d4d4302
AM		 15003 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15004 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 15005
15006 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15007 (output_bfd, osi.sec->output_section);
15008 if (info->shared || htab->root.is_relocatable_executable
15009 || htab->pic_veneer)
15010 size = ARM2THUMB_PIC_GLUE_SIZE;
15011 else if (htab->use_blx)
15012 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15013 else
15014 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 15015
91a5743d
PB		 15016 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15017 {
7413f23f
DJ		 15018 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15019 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 15020 }
15021 }
15022
15023 /* Thumb->ARM glue. */
15024 if (htab->thumb_glue_size > 0)
15025 {
3d4d4302
AM		 15026 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15027 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 15028
15029 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15030 (output_bfd, osi.sec->output_section);
15031 size = THUMB2ARM_GLUE_SIZE;
15032
15033 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15034 {
7413f23f
DJ		 15035 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15036 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 15037 }
15038 }
15039
845b51d6
PB		 15040 /* ARMv4 BX veneers. */
15041 if (htab->bx_glue_size > 0)
15042 {
3d4d4302
AM		 15043 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15044 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 15045
15046 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15047 (output_bfd, osi.sec->output_section);
15048
7413f23f 15049 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 15050 }
15051
8029a119
NC		 15052 /* Long calls stubs. */
15053 if (htab->stub_bfd && htab->stub_bfd->sections)
15054 {
da5938a2 15055 asection* stub_sec;
8029a119 15056
da5938a2
NC		 15057 for (stub_sec = htab->stub_bfd->sections;
15058 stub_sec != NULL;
8029a119
NC		 15059 stub_sec = stub_sec->next)
15060 {
15061 /* Ignore non-stub sections. */
15062 if (!strstr (stub_sec->name, STUB_SUFFIX))
15063 continue;
da5938a2 15064
8029a119 15065 osi.sec = stub_sec;
da5938a2 15066
8029a119
NC		 15067 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15068 (output_bfd, osi.sec->output_section);
da5938a2 15069
8029a119
NC		 15070 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15071 }
15072 }
da5938a2 15073
91a5743d 15074 /* Finally, output mapping symbols for the PLT. */
34e77a92 15075 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 15076 {
34e77a92
RS		 15077 osi.sec = htab->root.splt;
15078 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15079 (output_bfd, osi.sec->output_section));
15080
15081 /* Output mapping symbols for the plt header. SymbianOS does not have a
15082 plt header. */
15083 if (htab->vxworks_p)
15084 {
15085 /* VxWorks shared libraries have no PLT header. */
15086 if (!info->shared)
15087 {
15088 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15089 return FALSE;
15090 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15091 return FALSE;
15092 }
15093 }
b38cadfb
NC		 15094 else if (htab->nacl_p)
15095 {
15096 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15097 return FALSE;
15098 }
34e77a92 15099 else if (!htab->symbian_p)
4e617b1e 15100 {
7413f23f 15101 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 15102 return FALSE;
34e77a92
RS		 15103#ifndef FOUR_WORD_PLT
15104 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 15105 return FALSE;
34e77a92 15106#endif
4e617b1e
PB		 15107 }
15108 }
99059e56
RM		 15109 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15110 {
15111 /* NaCl uses a special first entry in .iplt too. */
15112 osi.sec = htab->root.iplt;
15113 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15114 (output_bfd, osi.sec->output_section));
15115 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15116 return FALSE;
15117 }
34e77a92
RS		 15118 if ((htab->root.splt && htab->root.splt->size > 0)
15119 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 15120 {
34e77a92
RS		 15121 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15122 for (input_bfd = info->input_bfds;
15123 input_bfd != NULL;
15124 input_bfd = input_bfd->link_next)
15125 {
15126 struct arm_local_iplt_info **local_iplt;
15127 unsigned int i, num_syms;
4e617b1e 15128
34e77a92
RS		 15129 local_iplt = elf32_arm_local_iplt (input_bfd);
15130 if (local_iplt != NULL)
15131 {
15132 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15133 for (i = 0; i < num_syms; i++)
15134 if (local_iplt[i] != NULL
15135 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15136 &local_iplt[i]->root,
15137 &local_iplt[i]->arm))
15138 return FALSE;
15139 }
15140 }
15141 }
0855e32b
NS		 15142 if (htab->dt_tlsdesc_plt != 0)
15143 {
15144 /* Mapping symbols for the lazy tls trampoline. */
15145 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15146 return FALSE;
b38cadfb 15147
0855e32b
NS		 15148 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15149 htab->dt_tlsdesc_plt + 24))
15150 return FALSE;
15151 }
15152 if (htab->tls_trampoline != 0)
15153 {
15154 /* Mapping symbols for the tls trampoline. */
15155 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15156 return FALSE;
15157#ifdef FOUR_WORD_PLT
15158 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15159 htab->tls_trampoline + 12))
15160 return FALSE;
b38cadfb 15161#endif
0855e32b 15162 }
b38cadfb 15163
4e617b1e
PB		 15164 return TRUE;
15165}
15166
e489d0ae
PB		 15167/* Allocate target specific section data. */
15168
15169static bfd_boolean
15170elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15171{
f592407e
AM		 15172 if (!sec->used_by_bfd)
15173 {
15174 _arm_elf_section_data *sdata;
15175 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15176
21d799b5 15177 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15178 if (sdata == NULL)
15179 return FALSE;
15180 sec->used_by_bfd = sdata;
15181 }
e489d0ae
PB		 15182
15183 return _bfd_elf_new_section_hook (abfd, sec);
15184}
15185
15186
15187/* Used to order a list of mapping symbols by address. */
15188
15189static int
15190elf32_arm_compare_mapping (const void * a, const void * b)
15191{
7f6a71ff
JM		 15192 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15193 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15194
15195 if (amap->vma > bmap->vma)
15196 return 1;
15197 else if (amap->vma < bmap->vma)
15198 return -1;
15199 else if (amap->type > bmap->type)
15200 /* Ensure results do not depend on the host qsort for objects with
15201 multiple mapping symbols at the same address by sorting on type
15202 after vma. */
15203 return 1;
15204 else if (amap->type < bmap->type)
15205 return -1;
15206 else
15207 return 0;
e489d0ae
PB		 15208}
15209
2468f9c9
PB		 15210/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15211
15212static unsigned long
15213offset_prel31 (unsigned long addr, bfd_vma offset)
15214{
15215 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15216}
15217
15218/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15219 relocations. */
15220
15221static void
15222copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15223{
15224 unsigned long first_word = bfd_get_32 (output_bfd, from);
15225 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15226
2468f9c9
PB		 15227 /* High bit of first word is supposed to be zero. */
15228 if ((first_word & 0x80000000ul) == 0)
15229 first_word = offset_prel31 (first_word, offset);
b38cadfb 15230
2468f9c9
PB		 15231 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15232 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15233 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15234 second_word = offset_prel31 (second_word, offset);
b38cadfb 15235
2468f9c9
PB		 15236 bfd_put_32 (output_bfd, first_word, to);
15237 bfd_put_32 (output_bfd, second_word, to + 4);
15238}
e489d0ae 15239
48229727
JB		 15240/* Data for make_branch_to_a8_stub(). */
15241
b38cadfb
NC		 15242struct a8_branch_to_stub_data
15243{
48229727
JB		 15244 asection *writing_section;
15245 bfd_byte *contents;
15246};
15247
15248
15249/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15250 places for a particular section. */
15251
15252static bfd_boolean
15253make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
99059e56 15254 void *in_arg)
48229727
JB		 15255{
15256 struct elf32_arm_stub_hash_entry *stub_entry;
15257 struct a8_branch_to_stub_data *data;
15258 bfd_byte *contents;
15259 unsigned long branch_insn;
15260 bfd_vma veneered_insn_loc, veneer_entry_loc;
15261 bfd_signed_vma branch_offset;
15262 bfd *abfd;
91d6fa6a 15263 unsigned int target;
48229727
JB		 15264
15265 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15266 data = (struct a8_branch_to_stub_data *) in_arg;
15267
15268 if (stub_entry->target_section != data->writing_section
4563a860 15269 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15270 return TRUE;
15271
15272 contents = data->contents;
15273
15274 veneered_insn_loc = stub_entry->target_section->output_section->vma
15275 + stub_entry->target_section->output_offset
15276 + stub_entry->target_value;
15277
15278 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15279 + stub_entry->stub_sec->output_offset
15280 + stub_entry->stub_offset;
15281
15282 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15283 veneered_insn_loc &= ~3u;
15284
15285 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15286
15287 abfd = stub_entry->target_section->owner;
91d6fa6a 15288 target = stub_entry->target_value;
48229727
JB		 15289
15290 /* We attempt to avoid this condition by setting stubs_always_after_branch
15291 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15292 This check is just to be on the safe side... */
15293 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15294 {
15295 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15296 "allocated in unsafe location"), abfd);
15297 return FALSE;
15298 }
15299
15300 switch (stub_entry->stub_type)
15301 {
15302 case arm_stub_a8_veneer_b:
15303 case arm_stub_a8_veneer_b_cond:
15304 branch_insn = 0xf0009000;
15305 goto jump24;
15306
15307 case arm_stub_a8_veneer_blx:
15308 branch_insn = 0xf000e800;
15309 goto jump24;
15310
15311 case arm_stub_a8_veneer_bl:
15312 {
15313 unsigned int i1, j1, i2, j2, s;
15314
15315 branch_insn = 0xf000d000;
15316
15317 jump24:
15318 if (branch_offset < -16777216 || branch_offset > 16777214)
15319 {
15320 /* There's not much we can do apart from complain if this
15321 happens. */
15322 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15323 "of range (input file too large)"), abfd);
15324 return FALSE;
15325 }
15326
15327 /* i1 = not(j1 eor s), so:
15328 not i1 = j1 eor s
15329 j1 = (not i1) eor s. */
15330
15331 branch_insn |= (branch_offset >> 1) & 0x7ff;
15332 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15333 i2 = (branch_offset >> 22) & 1;
15334 i1 = (branch_offset >> 23) & 1;
15335 s = (branch_offset >> 24) & 1;
15336 j1 = (!i1) ^ s;
15337 j2 = (!i2) ^ s;
15338 branch_insn |= j2 << 11;
15339 branch_insn |= j1 << 13;
15340 branch_insn |= s << 26;
15341 }
15342 break;
15343
15344 default:
15345 BFD_FAIL ();
15346 return FALSE;
15347 }
15348
91d6fa6a
NC		 15349 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15350 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15351
15352 return TRUE;
15353}
15354
e489d0ae
PB		 15355/* Do code byteswapping. Return FALSE afterwards so that the section is
15356 written out as normal. */
15357
15358static bfd_boolean
c7b8f16e 15359elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15360 struct bfd_link_info *link_info,
15361 asection *sec,
e489d0ae
PB		 15362 bfd_byte *contents)
15363{
48229727 15364 unsigned int mapcount, errcount;
8e3de13a 15365 _arm_elf_section_data *arm_data;
c7b8f16e 15366 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15367 elf32_arm_section_map *map;
c7b8f16e 15368 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15369 bfd_vma ptr;
15370 bfd_vma end;
c7b8f16e 15371 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15372 bfd_byte tmp;
48229727 15373 unsigned int i;
57e8b36a 15374
4dfe6ac6
NC		 15375 if (globals == NULL)
15376 return FALSE;
15377
8e3de13a
NC		 15378 /* If this section has not been allocated an _arm_elf_section_data
15379 structure then we cannot record anything. */
15380 arm_data = get_arm_elf_section_data (sec);
15381 if (arm_data == NULL)
15382 return FALSE;
15383
15384 mapcount = arm_data->mapcount;
15385 map = arm_data->map;
c7b8f16e
JB		 15386 errcount = arm_data->erratumcount;
15387
15388 if (errcount != 0)
15389 {
15390 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15391
15392 for (errnode = arm_data->erratumlist; errnode != 0;
99059e56
RM		 15393 errnode = errnode->next)
15394 {
15395 bfd_vma target = errnode->vma - offset;
15396
15397 switch (errnode->type)
15398 {
15399 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15400 {
15401 bfd_vma branch_to_veneer;
15402 /* Original condition code of instruction, plus bit mask for
15403 ARM B instruction. */
15404 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15405 | 0x0a000000;
c7b8f16e
JB		 15406
15407 /* The instruction is before the label. */
91d6fa6a 15408 target -= 4;
c7b8f16e
JB		 15409
15410 /* Above offset included in -4 below. */
15411 branch_to_veneer = errnode->u.b.veneer->vma
99059e56 15412 - errnode->vma - 4;
c7b8f16e
JB		 15413
15414 if ((signed) branch_to_veneer < -(1 << 25)
15415 || (signed) branch_to_veneer >= (1 << 25))
15416 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15417 "range"), output_bfd);
15418
99059e56
RM		 15419 insn |= (branch_to_veneer >> 2) & 0xffffff;
15420 contents[endianflip ^ target] = insn & 0xff;
15421 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15422 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15423 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15424 }
15425 break;
c7b8f16e
JB		 15426
15427 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 15428 {
15429 bfd_vma branch_from_veneer;
15430 unsigned int insn;
c7b8f16e 15431
99059e56
RM		 15432 /* Take size of veneer into account. */
15433 branch_from_veneer = errnode->u.v.branch->vma
15434 - errnode->vma - 12;
c7b8f16e
JB		 15435
15436 if ((signed) branch_from_veneer < -(1 << 25)
15437 || (signed) branch_from_veneer >= (1 << 25))
15438 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15439 "range"), output_bfd);
15440
99059e56
RM		 15441 /* Original instruction. */
15442 insn = errnode->u.v.branch->u.b.vfp_insn;
15443 contents[endianflip ^ target] = insn & 0xff;
15444 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15445 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15446 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15447
15448 /* Branch back to insn after original insn. */
15449 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15450 contents[endianflip ^ (target + 4)] = insn & 0xff;
15451 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15452 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15453 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15454 }
15455 break;
c7b8f16e 15456
99059e56
RM		 15457 default:
15458 abort ();
15459 }
15460 }
c7b8f16e 15461 }
e489d0ae 15462
2468f9c9
PB		 15463 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15464 {
15465 arm_unwind_table_edit *edit_node
99059e56 15466 = arm_data->u.exidx.unwind_edit_list;
2468f9c9 15467 /* Now, sec->size is the size of the section we will write. The original
99059e56 15468 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
2468f9c9
PB		 15469 markers) was sec->rawsize. (This isn't the case if we perform no
15470 edits, then rawsize will be zero and we should use size). */
21d799b5 15471 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15472 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15473 unsigned int in_index, out_index;
15474 bfd_vma add_to_offsets = 0;
15475
15476 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
99059e56 15477 {
2468f9c9
PB		 15478 if (edit_node)
15479 {
15480 unsigned int edit_index = edit_node->index;
b38cadfb 15481
2468f9c9 15482 if (in_index < edit_index && in_index * 8 < input_size)
99059e56 15483 {
2468f9c9
PB		 15484 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15485 contents + in_index * 8, add_to_offsets);
15486 out_index++;
15487 in_index++;
15488 }
15489 else if (in_index == edit_index
15490 || (in_index * 8 >= input_size
15491 && edit_index == UINT_MAX))
99059e56 15492 {
2468f9c9
PB		 15493 switch (edit_node->type)
15494 {
15495 case DELETE_EXIDX_ENTRY:
15496 in_index++;
15497 add_to_offsets += 8;
15498 break;
b38cadfb 15499
2468f9c9
PB		 15500 case INSERT_EXIDX_CANTUNWIND_AT_END:
15501 {
99059e56 15502 asection *text_sec = edit_node->linked_section;
2468f9c9
PB		 15503 bfd_vma text_offset = text_sec->output_section->vma
15504 + text_sec->output_offset
15505 + text_sec->size;
15506 bfd_vma exidx_offset = offset + out_index * 8;
99059e56 15507 unsigned long prel31_offset;
2468f9c9
PB		 15508
15509 /* Note: this is meant to be equivalent to an
15510 R_ARM_PREL31 relocation. These synthetic
15511 EXIDX_CANTUNWIND markers are not relocated by the
15512 usual BFD method. */
15513 prel31_offset = (text_offset - exidx_offset)
15514 & 0x7ffffffful;
15515
15516 /* First address we can't unwind. */
15517 bfd_put_32 (output_bfd, prel31_offset,
15518 &edited_contents[out_index * 8]);
15519
15520 /* Code for EXIDX_CANTUNWIND. */
15521 bfd_put_32 (output_bfd, 0x1,
15522 &edited_contents[out_index * 8 + 4]);
15523
15524 out_index++;
15525 add_to_offsets -= 8;
15526 }
15527 break;
15528 }
b38cadfb 15529
2468f9c9
PB		 15530 edit_node = edit_node->next;
15531 }
15532 }
15533 else
15534 {
15535 /* No more edits, copy remaining entries verbatim. */
15536 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15537 contents + in_index * 8, add_to_offsets);
15538 out_index++;
15539 in_index++;
15540 }
15541 }
15542
15543 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15544 bfd_set_section_contents (output_bfd, sec->output_section,
15545 edited_contents,
15546 (file_ptr) sec->output_offset, sec->size);
15547
15548 return TRUE;
15549 }
15550
48229727
JB		 15551 /* Fix code to point to Cortex-A8 erratum stubs. */
15552 if (globals->fix_cortex_a8)
15553 {
15554 struct a8_branch_to_stub_data data;
15555
15556 data.writing_section = sec;
15557 data.contents = contents;
15558
15559 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15560 &data);
15561 }
15562
e489d0ae
PB		 15563 if (mapcount == 0)
15564 return FALSE;
15565
c7b8f16e 15566 if (globals->byteswap_code)
e489d0ae 15567 {
c7b8f16e 15568 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15569
c7b8f16e
JB		 15570 ptr = map[0].vma;
15571 for (i = 0; i < mapcount; i++)
99059e56
RM		 15572 {
15573 if (i == mapcount - 1)
c7b8f16e 15574 end = sec->size;
99059e56
RM		 15575 else
15576 end = map[i + 1].vma;
e489d0ae 15577
99059e56 15578 switch (map[i].type)
e489d0ae 15579 {
c7b8f16e
JB		 15580 case 'a':
15581 /* Byte swap code words. */
15582 while (ptr + 3 < end)
99059e56
RM		 15583 {
15584 tmp = contents[ptr];
15585 contents[ptr] = contents[ptr + 3];
15586 contents[ptr + 3] = tmp;
15587 tmp = contents[ptr + 1];
15588 contents[ptr + 1] = contents[ptr + 2];
15589 contents[ptr + 2] = tmp;
15590 ptr += 4;
15591 }
c7b8f16e 15592 break;
e489d0ae 15593
c7b8f16e
JB		 15594 case 't':
15595 /* Byte swap code halfwords. */
15596 while (ptr + 1 < end)
99059e56
RM		 15597 {
15598 tmp = contents[ptr];
15599 contents[ptr] = contents[ptr + 1];
15600 contents[ptr + 1] = tmp;
15601 ptr += 2;
15602 }
c7b8f16e
JB		 15603 break;
15604
15605 case 'd':
15606 /* Leave data alone. */
15607 break;
15608 }
99059e56
RM		 15609 ptr = end;
15610 }
e489d0ae 15611 }
8e3de13a 15612
93204d3a 15613 free (map);
47b2e99c 15614 arm_data->mapcount = -1;
c7b8f16e 15615 arm_data->mapsize = 0;
8e3de13a 15616 arm_data->map = NULL;
8e3de13a 15617
e489d0ae
PB		 15618 return FALSE;
15619}
15620
0beaef2b
PB		 15621/* Mangle thumb function symbols as we read them in. */
15622
8384fb8f 15623static bfd_boolean
0beaef2b
PB		 15624elf32_arm_swap_symbol_in (bfd * abfd,
15625 const void *psrc,
15626 const void *pshn,
15627 Elf_Internal_Sym *dst)
15628{
8384fb8f
AM		 15629 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15630 return FALSE;
0beaef2b
PB		 15631
15632 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15633 the address. */
63e1a0fc
PB		 15634 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15635 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15636 {
63e1a0fc
PB		 15637 if (dst->st_value & 1)
15638 {
15639 dst->st_value &= ~(bfd_vma) 1;
15640 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15641 }
15642 else
15643 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15644 }
15645 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15646 {
15647 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15648 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15649 }
35fc36a8
RS		 15650 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15651 dst->st_target_internal = ST_BRANCH_LONG;
15652 else
63e1a0fc 15653 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15654
8384fb8f 15655 return TRUE;
0beaef2b
PB		 15656}
15657
15658
15659/* Mangle thumb function symbols as we write them out. */
15660
15661static void
15662elf32_arm_swap_symbol_out (bfd *abfd,
15663 const Elf_Internal_Sym *src,
15664 void *cdst,
15665 void *shndx)
15666{
15667 Elf_Internal_Sym newsym;
15668
15669 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15670 of the address set, as per the new EABI. We do this unconditionally
15671 because objcopy does not set the elf header flags until after
15672 it writes out the symbol table. */
35fc36a8 15673 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15674 {
15675 newsym = *src;
34e77a92
RS		 15676 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15677 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad 15678 if (newsym.st_shndx != SHN_UNDEF)
99059e56
RM		 15679 {
15680 /* Do this only for defined symbols. At link type, the static
15681 linker will simulate the work of dynamic linker of resolving
15682 symbols and will carry over the thumbness of found symbols to
15683 the output symbol table. It's not clear how it happens, but
15684 the thumbness of undefined symbols can well be different at
15685 runtime, and writing '1' for them will be confusing for users
15686 and possibly for dynamic linker itself.
15687 */
15688 newsym.st_value |= 1;
15689 }
906e58ca 15690
0beaef2b
PB		 15691 src = &newsym;
15692 }
15693 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15694}
15695
b294bdf8
MM		 15696/* Add the PT_ARM_EXIDX program header. */
15697
15698static bfd_boolean
906e58ca 15699elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15700 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15701{
15702 struct elf_segment_map *m;
15703 asection *sec;
15704
15705 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15706 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15707 {
15708 /* If there is already a PT_ARM_EXIDX header, then we do not
15709 want to add another one. This situation arises when running
15710 "strip"; the input binary already has the header. */
12bd6957 15711 m = elf_seg_map (abfd);
b294bdf8
MM		 15712 while (m && m->p_type != PT_ARM_EXIDX)
15713 m = m->next;
15714 if (!m)
15715 {
21d799b5 15716 m = (struct elf_segment_map *)
99059e56 15717 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15718 if (m == NULL)
15719 return FALSE;
15720 m->p_type = PT_ARM_EXIDX;
15721 m->count = 1;
15722 m->sections[0] = sec;
15723
12bd6957
AM		 15724 m->next = elf_seg_map (abfd);
15725 elf_seg_map (abfd) = m;
b294bdf8
MM		 15726 }
15727 }
15728
15729 return TRUE;
15730}
15731
15732/* We may add a PT_ARM_EXIDX program header. */
15733
15734static int
a6b96beb
AM		 15735elf32_arm_additional_program_headers (bfd *abfd,
15736 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15737{
15738 asection *sec;
15739
15740 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15741 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15742 return 1;
15743 else
15744 return 0;
15745}
15746
34e77a92
RS		 15747/* Hook called by the linker routine which adds symbols from an object
15748 file. */
15749
15750static bfd_boolean
15751elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15752 Elf_Internal_Sym *sym, const char **namep,
15753 flagword *flagsp, asection **secp, bfd_vma *valp)
15754{
15755 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15756 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15757 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15758 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92
RS		 15759
15760 if (elf32_arm_hash_table (info)->vxworks_p
15761 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15762 flagsp, secp, valp))
15763 return FALSE;
15764
15765 return TRUE;
15766}
15767
0beaef2b 15768/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15769const struct elf_size_info elf32_arm_size_info =
15770{
0beaef2b
PB		 15771 sizeof (Elf32_External_Ehdr),
15772 sizeof (Elf32_External_Phdr),
15773 sizeof (Elf32_External_Shdr),
15774 sizeof (Elf32_External_Rel),
15775 sizeof (Elf32_External_Rela),
15776 sizeof (Elf32_External_Sym),
15777 sizeof (Elf32_External_Dyn),
15778 sizeof (Elf_External_Note),
15779 4,
15780 1,
15781 32, 2,
15782 ELFCLASS32, EV_CURRENT,
15783 bfd_elf32_write_out_phdrs,
15784 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15785 bfd_elf32_checksum_contents,
0beaef2b
PB		 15786 bfd_elf32_write_relocs,
15787 elf32_arm_swap_symbol_in,
15788 elf32_arm_swap_symbol_out,
15789 bfd_elf32_slurp_reloc_table,
15790 bfd_elf32_slurp_symbol_table,
15791 bfd_elf32_swap_dyn_in,
15792 bfd_elf32_swap_dyn_out,
15793 bfd_elf32_swap_reloc_in,
15794 bfd_elf32_swap_reloc_out,
15795 bfd_elf32_swap_reloca_in,
15796 bfd_elf32_swap_reloca_out
15797};
15798
252b5132 15799#define ELF_ARCH bfd_arch_arm
ae95ffa6 15800#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 15801#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 15802#ifdef __QNXTARGET__
15803#define ELF_MAXPAGESIZE 0x1000
15804#else
f21f3fe0 15805#define ELF_MAXPAGESIZE 0x8000
d0facd1b 15806#endif
b1342370 15807#define ELF_MINPAGESIZE 0x1000
24718e3b 15808#define ELF_COMMONPAGESIZE 0x1000
252b5132 15809
ba93b8ac
DJ		 15810#define bfd_elf32_mkobject elf32_arm_mkobject
15811
99e4ae17
AJ		 15812#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15813#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 15814#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15815#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15816#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 15817#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 15818#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 15819#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 15820#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 15821#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 15822#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 15823#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 15824#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 15825
15826#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15827#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 15828#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 15829#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15830#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 15831#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 15832#define elf_backend_write_section elf32_arm_write_section
252b5132 15833#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 15834#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 15835#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15836#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15837#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 15838#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 15839#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 15840#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 15841#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 15842#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 15843#define elf_backend_fake_sections elf32_arm_fake_sections
15844#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 15845#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 15846#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 15847#define elf_backend_size_info elf32_arm_size_info
b294bdf8 15848#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 15849#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15850#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15851#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 15852#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 15853
15854#define elf_backend_can_refcount 1
15855#define elf_backend_can_gc_sections 1
15856#define elf_backend_plt_readonly 1
15857#define elf_backend_want_got_plt 1
15858#define elf_backend_want_plt_sym 0
15859#define elf_backend_may_use_rel_p 1
15860#define elf_backend_may_use_rela_p 0
4e7fd91e 15861#define elf_backend_default_use_rela_p 0
252b5132 15862
04f7c78d 15863#define elf_backend_got_header_size 12
04f7c78d 15864
906e58ca
NC		 15865#undef elf_backend_obj_attrs_vendor
15866#define elf_backend_obj_attrs_vendor "aeabi"
15867#undef elf_backend_obj_attrs_section
15868#define elf_backend_obj_attrs_section ".ARM.attributes"
15869#undef elf_backend_obj_attrs_arg_type
15870#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15871#undef elf_backend_obj_attrs_section_type
104d59d1 15872#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 15873#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15874#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 15875
252b5132 15876#include "elf32-target.h"
7f266840 15877
b38cadfb
NC		 15878/* Native Client targets. */
15879
15880#undef TARGET_LITTLE_SYM
15881#define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15882#undef TARGET_LITTLE_NAME
15883#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15884#undef TARGET_BIG_SYM
15885#define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15886#undef TARGET_BIG_NAME
15887#define TARGET_BIG_NAME "elf32-bigarm-nacl"
15888
15889/* Like elf32_arm_link_hash_table_create -- but overrides
15890 appropriately for NaCl. */
15891
15892static struct bfd_link_hash_table *
15893elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15894{
15895 struct bfd_link_hash_table *ret;
15896
15897 ret = elf32_arm_link_hash_table_create (abfd);
15898 if (ret)
15899 {
15900 struct elf32_arm_link_hash_table *htab
15901 = (struct elf32_arm_link_hash_table *) ret;
15902
15903 htab->nacl_p = 1;
15904
15905 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15906 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15907 }
15908 return ret;
15909}
15910
15911/* Since NaCl doesn't use the ARM-specific unwind format, we don't
15912 really need to use elf32_arm_modify_segment_map. But we do it
15913 anyway just to reduce gratuitous differences with the stock ARM backend. */
15914
15915static bfd_boolean
15916elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15917{
15918 return (elf32_arm_modify_segment_map (abfd, info)
15919 && nacl_modify_segment_map (abfd, info));
15920}
15921
887badb3
RM		 15922static void
15923elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
15924{
15925 elf32_arm_final_write_processing (abfd, linker);
15926 nacl_final_write_processing (abfd, linker);
15927}
15928
15929
b38cadfb
NC		 15930#undef elf32_bed
15931#define elf32_bed elf32_arm_nacl_bed
15932#undef bfd_elf32_bfd_link_hash_table_create
15933#define bfd_elf32_bfd_link_hash_table_create \
15934 elf32_arm_nacl_link_hash_table_create
15935#undef elf_backend_plt_alignment
15936#define elf_backend_plt_alignment 4
15937#undef elf_backend_modify_segment_map
15938#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15939#undef elf_backend_modify_program_headers
15940#define elf_backend_modify_program_headers nacl_modify_program_headers
887badb3
RM		 15941#undef elf_backend_final_write_processing
15942#define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
b38cadfb
NC		 15943
15944#undef ELF_MAXPAGESIZE
15945#define ELF_MAXPAGESIZE 0x10000
887badb3
RM		 15946#undef ELF_MINPAGESIZE
15947#undef ELF_COMMONPAGESIZE
15948
b38cadfb
NC		 15949
15950#include "elf32-target.h"
15951
15952/* Reset to defaults. */
15953#undef elf_backend_plt_alignment
15954#undef elf_backend_modify_segment_map
15955#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15956#undef elf_backend_modify_program_headers
887badb3
RM		 15957#undef elf_backend_final_write_processing
15958#define elf_backend_final_write_processing elf32_arm_final_write_processing
15959#undef ELF_MINPAGESIZE
15960#define ELF_MINPAGESIZE 0x1000
15961#undef ELF_COMMONPAGESIZE
15962#define ELF_COMMONPAGESIZE 0x1000
15963
b38cadfb 15964
906e58ca 15965/* VxWorks Targets. */
4e7fd91e 15966
906e58ca 15967#undef TARGET_LITTLE_SYM
4e7fd91e 15968#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 15969#undef TARGET_LITTLE_NAME
4e7fd91e 15970#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 15971#undef TARGET_BIG_SYM
4e7fd91e 15972#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 15973#undef TARGET_BIG_NAME
4e7fd91e
PB		 15974#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15975
15976/* Like elf32_arm_link_hash_table_create -- but overrides
15977 appropriately for VxWorks. */
906e58ca 15978
4e7fd91e
PB		 15979static struct bfd_link_hash_table *
15980elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15981{
15982 struct bfd_link_hash_table *ret;
15983
15984 ret = elf32_arm_link_hash_table_create (abfd);
15985 if (ret)
15986 {
15987 struct elf32_arm_link_hash_table *htab
00a97672 15988 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 15989 htab->use_rel = 0;
00a97672 15990 htab->vxworks_p = 1;
4e7fd91e
PB		 15991 }
15992 return ret;
906e58ca 15993}
4e7fd91e 15994
00a97672
RS		 15995static void
15996elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15997{
15998 elf32_arm_final_write_processing (abfd, linker);
15999 elf_vxworks_final_write_processing (abfd, linker);
16000}
16001
906e58ca 16002#undef elf32_bed
4e7fd91e
PB		 16003#define elf32_bed elf32_arm_vxworks_bed
16004
906e58ca
NC		 16005#undef bfd_elf32_bfd_link_hash_table_create
16006#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 16007#undef elf_backend_final_write_processing
16008#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
16009#undef elf_backend_emit_relocs
16010#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 16011
906e58ca 16012#undef elf_backend_may_use_rel_p
00a97672 16013#define elf_backend_may_use_rel_p 0
906e58ca 16014#undef elf_backend_may_use_rela_p
00a97672 16015#define elf_backend_may_use_rela_p 1
906e58ca 16016#undef elf_backend_default_use_rela_p
00a97672 16017#define elf_backend_default_use_rela_p 1
906e58ca 16018#undef elf_backend_want_plt_sym
00a97672 16019#define elf_backend_want_plt_sym 1
906e58ca 16020#undef ELF_MAXPAGESIZE
00a97672 16021#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 16022
16023#include "elf32-target.h"
16024
16025
21d799b5
NC		 16026/* Merge backend specific data from an object file to the output
16027 object file when linking. */
16028
16029static bfd_boolean
16030elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
16031{
16032 flagword out_flags;
16033 flagword in_flags;
16034 bfd_boolean flags_compatible = TRUE;
16035 asection *sec;
16036
cc643b88 16037 /* Check if we have the same endianness. */
21d799b5
NC		 16038 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
16039 return FALSE;
16040
16041 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16042 return TRUE;
16043
16044 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16045 return FALSE;
16046
16047 /* The input BFD must have had its flags initialised. */
16048 /* The following seems bogus to me -- The flags are initialized in
16049 the assembler but I don't think an elf_flags_init field is
16050 written into the object. */
16051 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16052
16053 in_flags = elf_elfheader (ibfd)->e_flags;
16054 out_flags = elf_elfheader (obfd)->e_flags;
16055
16056 /* In theory there is no reason why we couldn't handle this. However
16057 in practice it isn't even close to working and there is no real
16058 reason to want it. */
16059 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16060 && !(ibfd->flags & DYNAMIC)
16061 && (in_flags & EF_ARM_BE8))
16062 {
16063 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16064 ibfd);
16065 return FALSE;
16066 }
16067
16068 if (!elf_flags_init (obfd))
16069 {
16070 /* If the input is the default architecture and had the default
16071 flags then do not bother setting the flags for the output
16072 architecture, instead allow future merges to do this. If no
16073 future merges ever set these flags then they will retain their
99059e56
RM		 16074 uninitialised values, which surprise surprise, correspond
16075 to the default values. */
21d799b5
NC		 16076 if (bfd_get_arch_info (ibfd)->the_default
16077 && elf_elfheader (ibfd)->e_flags == 0)
16078 return TRUE;
16079
16080 elf_flags_init (obfd) = TRUE;
16081 elf_elfheader (obfd)->e_flags = in_flags;
16082
16083 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16084 && bfd_get_arch_info (obfd)->the_default)
16085 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16086
16087 return TRUE;
16088 }
16089
16090 /* Determine what should happen if the input ARM architecture
16091 does not match the output ARM architecture. */
16092 if (! bfd_arm_merge_machines (ibfd, obfd))
16093 return FALSE;
16094
16095 /* Identical flags must be compatible. */
16096 if (in_flags == out_flags)
16097 return TRUE;
16098
16099 /* Check to see if the input BFD actually contains any sections. If
16100 not, its flags may not have been initialised either, but it
16101 cannot actually cause any incompatiblity. Do not short-circuit
16102 dynamic objects; their section list may be emptied by
16103 elf_link_add_object_symbols.
16104
16105 Also check to see if there are no code sections in the input.
16106 In this case there is no need to check for code specific flags.
16107 XXX - do we need to worry about floating-point format compatability
16108 in data sections ? */
16109 if (!(ibfd->flags & DYNAMIC))
16110 {
16111 bfd_boolean null_input_bfd = TRUE;
16112 bfd_boolean only_data_sections = TRUE;
16113
16114 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16115 {
16116 /* Ignore synthetic glue sections. */
16117 if (strcmp (sec->name, ".glue_7")
16118 && strcmp (sec->name, ".glue_7t"))
16119 {
16120 if ((bfd_get_section_flags (ibfd, sec)
16121 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16122 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
99059e56 16123 only_data_sections = FALSE;
21d799b5
NC		 16124
16125 null_input_bfd = FALSE;
16126 break;
16127 }
16128 }
16129
16130 if (null_input_bfd || only_data_sections)
16131 return TRUE;
16132 }
16133
16134 /* Complain about various flag mismatches. */
16135 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16136 EF_ARM_EABI_VERSION (out_flags)))
16137 {
16138 _bfd_error_handler
16139 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16140 ibfd, obfd,
16141 (in_flags & EF_ARM_EABIMASK) >> 24,
16142 (out_flags & EF_ARM_EABIMASK) >> 24);
16143 return FALSE;
16144 }
16145
16146 /* Not sure what needs to be checked for EABI versions >= 1. */
16147 /* VxWorks libraries do not use these flags. */
16148 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16149 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16150 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16151 {
16152 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16153 {
16154 _bfd_error_handler
16155 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16156 ibfd, obfd,
16157 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16158 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16159 flags_compatible = FALSE;
16160 }
16161
16162 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16163 {
16164 if (in_flags & EF_ARM_APCS_FLOAT)
16165 _bfd_error_handler
16166 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16167 ibfd, obfd);
16168 else
16169 _bfd_error_handler
16170 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16171 ibfd, obfd);
16172
16173 flags_compatible = FALSE;
16174 }
16175
16176 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16177 {
16178 if (in_flags & EF_ARM_VFP_FLOAT)
16179 _bfd_error_handler
16180 (_("error: %B uses VFP instructions, whereas %B does not"),
16181 ibfd, obfd);
16182 else
16183 _bfd_error_handler
16184 (_("error: %B uses FPA instructions, whereas %B does not"),
16185 ibfd, obfd);
16186
16187 flags_compatible = FALSE;
16188 }
16189
16190 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16191 {
16192 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16193 _bfd_error_handler
16194 (_("error: %B uses Maverick instructions, whereas %B does not"),
16195 ibfd, obfd);
16196 else
16197 _bfd_error_handler
16198 (_("error: %B does not use Maverick instructions, whereas %B does"),
16199 ibfd, obfd);
16200
16201 flags_compatible = FALSE;
16202 }
16203
16204#ifdef EF_ARM_SOFT_FLOAT
16205 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16206 {
16207 /* We can allow interworking between code that is VFP format
16208 layout, and uses either soft float or integer regs for
16209 passing floating point arguments and results. We already
16210 know that the APCS_FLOAT flags match; similarly for VFP
16211 flags. */
16212 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16213 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16214 {
16215 if (in_flags & EF_ARM_SOFT_FLOAT)
16216 _bfd_error_handler
16217 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16218 ibfd, obfd);
16219 else
16220 _bfd_error_handler
16221 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16222 ibfd, obfd);
16223
16224 flags_compatible = FALSE;
16225 }
16226 }
16227#endif
16228
16229 /* Interworking mismatch is only a warning. */
16230 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16231 {
16232 if (in_flags & EF_ARM_INTERWORK)
16233 {
16234 _bfd_error_handler
16235 (_("Warning: %B supports interworking, whereas %B does not"),
16236 ibfd, obfd);
16237 }
16238 else
16239 {
16240 _bfd_error_handler
16241 (_("Warning: %B does not support interworking, whereas %B does"),
16242 ibfd, obfd);
16243 }
16244 }
16245 }
16246
16247 return flags_compatible;
16248}
16249
16250
906e58ca 16251/* Symbian OS Targets. */
7f266840 16252
906e58ca 16253#undef TARGET_LITTLE_SYM
7f266840 16254#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 16255#undef TARGET_LITTLE_NAME
7f266840 16256#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16257#undef TARGET_BIG_SYM
7f266840 16258#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 16259#undef TARGET_BIG_NAME
7f266840
DJ		 16260#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16261
16262/* Like elf32_arm_link_hash_table_create -- but overrides
16263 appropriately for Symbian OS. */
906e58ca 16264
7f266840
DJ		 16265static struct bfd_link_hash_table *
16266elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16267{
16268 struct bfd_link_hash_table *ret;
16269
16270 ret = elf32_arm_link_hash_table_create (abfd);
16271 if (ret)
16272 {
16273 struct elf32_arm_link_hash_table *htab
16274 = (struct elf32_arm_link_hash_table *)ret;
16275 /* There is no PLT header for Symbian OS. */
16276 htab->plt_header_size = 0;
95720a86
DJ		 16277 /* The PLT entries are each one instruction and one word. */
16278 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16279 htab->symbian_p = 1;
33bfe774
JB		 16280 /* Symbian uses armv5t or above, so use_blx is always true. */
16281 htab->use_blx = 1;
67687978 16282 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16283 }
16284 return ret;
906e58ca 16285}
7f266840 16286
b35d266b 16287static const struct bfd_elf_special_section
551b43fd 16288elf32_arm_symbian_special_sections[] =
7f266840 16289{
5cd3778d
MM		 16290 /* In a BPABI executable, the dynamic linking sections do not go in
16291 the loadable read-only segment. The post-linker may wish to
16292 refer to these sections, but they are not part of the final
16293 program image. */
0112cd26
NC		 16294 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16295 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16296 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16297 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16298 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16299 /* These sections do not need to be writable as the SymbianOS
16300 postlinker will arrange things so that no dynamic relocation is
16301 required. */
0112cd26
NC		 16302 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16303 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16304 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16305 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16306};
16307
c3c76620 16308static void
906e58ca 16309elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16310 struct bfd_link_info *link_info)
c3c76620
MM		 16311{
16312 /* BPABI objects are never loaded directly by an OS kernel; they are
16313 processed by a postlinker first, into an OS-specific format. If
16314 the D_PAGED bit is set on the file, BFD will align segments on
16315 page boundaries, so that an OS can directly map the file. With
16316 BPABI objects, that just results in wasted space. In addition,
16317 because we clear the D_PAGED bit, map_sections_to_segments will
16318 recognize that the program headers should not be mapped into any
16319 loadable segment. */
16320 abfd->flags &= ~D_PAGED;
906e58ca 16321 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16322}
7f266840
DJ		 16323
16324static bfd_boolean
906e58ca 16325elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16326 struct bfd_link_info *info)
7f266840
DJ		 16327{
16328 struct elf_segment_map *m;
16329 asection *dynsec;
16330
7f266840
DJ		 16331 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16332 segment. However, because the .dynamic section is not marked
16333 with SEC_LOAD, the generic ELF code will not create such a
16334 segment. */
16335 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16336 if (dynsec)
16337 {
12bd6957 16338 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16339 if (m->p_type == PT_DYNAMIC)
16340 break;
16341
16342 if (m == NULL)
16343 {
16344 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16345 m->next = elf_seg_map (abfd);
16346 elf_seg_map (abfd) = m;
8ded5a0f 16347 }
7f266840
DJ		 16348 }
16349
b294bdf8
MM		 16350 /* Also call the generic arm routine. */
16351 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16352}
16353
95720a86
DJ		 16354/* Return address for Ith PLT stub in section PLT, for relocation REL
16355 or (bfd_vma) -1 if it should not be included. */
16356
16357static bfd_vma
16358elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16359 const arelent *rel ATTRIBUTE_UNUSED)
16360{
16361 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16362}
16363
16364
8029a119 16365#undef elf32_bed
7f266840
DJ		 16366#define elf32_bed elf32_arm_symbian_bed
16367
16368/* The dynamic sections are not allocated on SymbianOS; the postlinker
16369 will process them and then discard them. */
906e58ca 16370#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16371#define ELF_DYNAMIC_SEC_FLAGS \
16372 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16373
00a97672 16374#undef elf_backend_emit_relocs
c3c76620 16375
906e58ca
NC		 16376#undef bfd_elf32_bfd_link_hash_table_create
16377#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16378#undef elf_backend_special_sections
16379#define elf_backend_special_sections elf32_arm_symbian_special_sections
16380#undef elf_backend_begin_write_processing
16381#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16382#undef elf_backend_final_write_processing
16383#define elf_backend_final_write_processing elf32_arm_final_write_processing
16384
16385#undef elf_backend_modify_segment_map
7f266840
DJ		 16386#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16387
16388/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16389#undef elf_backend_got_header_size
7f266840
DJ		 16390#define elf_backend_got_header_size 0
16391
16392/* Similarly, there is no .got.plt section. */
906e58ca 16393#undef elf_backend_want_got_plt
7f266840
DJ		 16394#define elf_backend_want_got_plt 0
16395
906e58ca 16396#undef elf_backend_plt_sym_val
95720a86
DJ		 16397#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16398
906e58ca 16399#undef elf_backend_may_use_rel_p
00a97672 16400#define elf_backend_may_use_rel_p 1
906e58ca 16401#undef elf_backend_may_use_rela_p
00a97672 16402#define elf_backend_may_use_rela_p 0
906e58ca 16403#undef elf_backend_default_use_rela_p
00a97672 16404#define elf_backend_default_use_rela_p 0
906e58ca 16405#undef elf_backend_want_plt_sym
00a97672 16406#define elf_backend_want_plt_sym 0
906e58ca 16407#undef ELF_MAXPAGESIZE
00a97672 16408#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16409
7f266840 16410#include "elf32-target.h"
GDB Binutils - Deliverables
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