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252b5132 | 1 | /* 32-bit ELF support for ARM |
6f2750fe | 2 | Copyright (C) 1998-2016 Free Software Foundation, Inc. |
252b5132 RH |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 8 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
9 | (at your option) any later version. |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | MA 02110-1301, USA. */ | |
252b5132 | 20 | |
6e6718a3 | 21 | #include "sysdep.h" |
2468f9c9 PB |
22 | #include <limits.h> |
23 | ||
3db64b00 | 24 | #include "bfd.h" |
6034aab8 | 25 | #include "bfd_stdint.h" |
00a97672 | 26 | #include "libiberty.h" |
7f266840 DJ |
27 | #include "libbfd.h" |
28 | #include "elf-bfd.h" | |
b38cadfb | 29 | #include "elf-nacl.h" |
00a97672 | 30 | #include "elf-vxworks.h" |
ee065d83 | 31 | #include "elf/arm.h" |
7f266840 | 32 | |
00a97672 RS |
33 | /* Return the relocation section associated with NAME. HTAB is the |
34 | bfd's elf32_arm_link_hash_entry. */ | |
35 | #define RELOC_SECTION(HTAB, NAME) \ | |
36 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
37 | ||
38 | /* Return size of a relocation entry. HTAB is the bfd's | |
39 | elf32_arm_link_hash_entry. */ | |
40 | #define RELOC_SIZE(HTAB) \ | |
41 | ((HTAB)->use_rel \ | |
42 | ? sizeof (Elf32_External_Rel) \ | |
43 | : sizeof (Elf32_External_Rela)) | |
44 | ||
45 | /* Return function to swap relocations in. HTAB is the bfd's | |
46 | elf32_arm_link_hash_entry. */ | |
47 | #define SWAP_RELOC_IN(HTAB) \ | |
48 | ((HTAB)->use_rel \ | |
49 | ? bfd_elf32_swap_reloc_in \ | |
50 | : bfd_elf32_swap_reloca_in) | |
51 | ||
52 | /* Return function to swap relocations out. HTAB is the bfd's | |
53 | elf32_arm_link_hash_entry. */ | |
54 | #define SWAP_RELOC_OUT(HTAB) \ | |
55 | ((HTAB)->use_rel \ | |
56 | ? bfd_elf32_swap_reloc_out \ | |
57 | : bfd_elf32_swap_reloca_out) | |
58 | ||
7f266840 DJ |
59 | #define elf_info_to_howto 0 |
60 | #define elf_info_to_howto_rel elf32_arm_info_to_howto | |
61 | ||
62 | #define ARM_ELF_ABI_VERSION 0 | |
63 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
64 | ||
79f08007 YZ |
65 | /* The Adjusted Place, as defined by AAELF. */ |
66 | #define Pa(X) ((X) & 0xfffffffc) | |
67 | ||
3e6b1042 DJ |
68 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
69 | struct bfd_link_info *link_info, | |
70 | asection *sec, | |
71 | bfd_byte *contents); | |
72 | ||
7f266840 DJ |
73 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
74 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
75 | in that slot. */ | |
76 | ||
c19d1205 | 77 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 78 | { |
8029a119 | 79 | /* No relocation. */ |
7f266840 DJ |
80 | HOWTO (R_ARM_NONE, /* type */ |
81 | 0, /* rightshift */ | |
6346d5ca | 82 | 3, /* size (0 = byte, 1 = short, 2 = long) */ |
7f266840 DJ |
83 | 0, /* bitsize */ |
84 | FALSE, /* pc_relative */ | |
85 | 0, /* bitpos */ | |
86 | complain_overflow_dont,/* complain_on_overflow */ | |
87 | bfd_elf_generic_reloc, /* special_function */ | |
88 | "R_ARM_NONE", /* name */ | |
89 | FALSE, /* partial_inplace */ | |
90 | 0, /* src_mask */ | |
91 | 0, /* dst_mask */ | |
92 | FALSE), /* pcrel_offset */ | |
93 | ||
94 | HOWTO (R_ARM_PC24, /* type */ | |
95 | 2, /* rightshift */ | |
96 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
97 | 24, /* bitsize */ | |
98 | TRUE, /* pc_relative */ | |
99 | 0, /* bitpos */ | |
100 | complain_overflow_signed,/* complain_on_overflow */ | |
101 | bfd_elf_generic_reloc, /* special_function */ | |
102 | "R_ARM_PC24", /* name */ | |
103 | FALSE, /* partial_inplace */ | |
104 | 0x00ffffff, /* src_mask */ | |
105 | 0x00ffffff, /* dst_mask */ | |
106 | TRUE), /* pcrel_offset */ | |
107 | ||
108 | /* 32 bit absolute */ | |
109 | HOWTO (R_ARM_ABS32, /* type */ | |
110 | 0, /* rightshift */ | |
111 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
112 | 32, /* bitsize */ | |
113 | FALSE, /* pc_relative */ | |
114 | 0, /* bitpos */ | |
115 | complain_overflow_bitfield,/* complain_on_overflow */ | |
116 | bfd_elf_generic_reloc, /* special_function */ | |
117 | "R_ARM_ABS32", /* name */ | |
118 | FALSE, /* partial_inplace */ | |
119 | 0xffffffff, /* src_mask */ | |
120 | 0xffffffff, /* dst_mask */ | |
121 | FALSE), /* pcrel_offset */ | |
122 | ||
123 | /* standard 32bit pc-relative reloc */ | |
124 | HOWTO (R_ARM_REL32, /* type */ | |
125 | 0, /* rightshift */ | |
126 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
127 | 32, /* bitsize */ | |
128 | TRUE, /* pc_relative */ | |
129 | 0, /* bitpos */ | |
130 | complain_overflow_bitfield,/* complain_on_overflow */ | |
131 | bfd_elf_generic_reloc, /* special_function */ | |
132 | "R_ARM_REL32", /* name */ | |
133 | FALSE, /* partial_inplace */ | |
134 | 0xffffffff, /* src_mask */ | |
135 | 0xffffffff, /* dst_mask */ | |
136 | TRUE), /* pcrel_offset */ | |
137 | ||
c19d1205 | 138 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 139 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 DJ |
140 | 0, /* rightshift */ |
141 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
4962c51a MS |
142 | 32, /* bitsize */ |
143 | TRUE, /* pc_relative */ | |
7f266840 | 144 | 0, /* bitpos */ |
4962c51a | 145 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 146 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 147 | "R_ARM_LDR_PC_G0", /* name */ |
7f266840 | 148 | FALSE, /* partial_inplace */ |
4962c51a MS |
149 | 0xffffffff, /* src_mask */ |
150 | 0xffffffff, /* dst_mask */ | |
151 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
152 | |
153 | /* 16 bit absolute */ | |
154 | HOWTO (R_ARM_ABS16, /* type */ | |
155 | 0, /* rightshift */ | |
156 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
157 | 16, /* bitsize */ | |
158 | FALSE, /* pc_relative */ | |
159 | 0, /* bitpos */ | |
160 | complain_overflow_bitfield,/* complain_on_overflow */ | |
161 | bfd_elf_generic_reloc, /* special_function */ | |
162 | "R_ARM_ABS16", /* name */ | |
163 | FALSE, /* partial_inplace */ | |
164 | 0x0000ffff, /* src_mask */ | |
165 | 0x0000ffff, /* dst_mask */ | |
166 | FALSE), /* pcrel_offset */ | |
167 | ||
168 | /* 12 bit absolute */ | |
169 | HOWTO (R_ARM_ABS12, /* type */ | |
170 | 0, /* rightshift */ | |
171 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
172 | 12, /* bitsize */ | |
173 | FALSE, /* pc_relative */ | |
174 | 0, /* bitpos */ | |
175 | complain_overflow_bitfield,/* complain_on_overflow */ | |
176 | bfd_elf_generic_reloc, /* special_function */ | |
177 | "R_ARM_ABS12", /* name */ | |
178 | FALSE, /* partial_inplace */ | |
00a97672 RS |
179 | 0x00000fff, /* src_mask */ |
180 | 0x00000fff, /* dst_mask */ | |
7f266840 DJ |
181 | FALSE), /* pcrel_offset */ |
182 | ||
183 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
184 | 6, /* rightshift */ | |
185 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
186 | 5, /* bitsize */ | |
187 | FALSE, /* pc_relative */ | |
188 | 0, /* bitpos */ | |
189 | complain_overflow_bitfield,/* complain_on_overflow */ | |
190 | bfd_elf_generic_reloc, /* special_function */ | |
191 | "R_ARM_THM_ABS5", /* name */ | |
192 | FALSE, /* partial_inplace */ | |
193 | 0x000007e0, /* src_mask */ | |
194 | 0x000007e0, /* dst_mask */ | |
195 | FALSE), /* pcrel_offset */ | |
196 | ||
197 | /* 8 bit absolute */ | |
198 | HOWTO (R_ARM_ABS8, /* type */ | |
199 | 0, /* rightshift */ | |
200 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
201 | 8, /* bitsize */ | |
202 | FALSE, /* pc_relative */ | |
203 | 0, /* bitpos */ | |
204 | complain_overflow_bitfield,/* complain_on_overflow */ | |
205 | bfd_elf_generic_reloc, /* special_function */ | |
206 | "R_ARM_ABS8", /* name */ | |
207 | FALSE, /* partial_inplace */ | |
208 | 0x000000ff, /* src_mask */ | |
209 | 0x000000ff, /* dst_mask */ | |
210 | FALSE), /* pcrel_offset */ | |
211 | ||
212 | HOWTO (R_ARM_SBREL32, /* type */ | |
213 | 0, /* rightshift */ | |
214 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
215 | 32, /* bitsize */ | |
216 | FALSE, /* pc_relative */ | |
217 | 0, /* bitpos */ | |
218 | complain_overflow_dont,/* complain_on_overflow */ | |
219 | bfd_elf_generic_reloc, /* special_function */ | |
220 | "R_ARM_SBREL32", /* name */ | |
221 | FALSE, /* partial_inplace */ | |
222 | 0xffffffff, /* src_mask */ | |
223 | 0xffffffff, /* dst_mask */ | |
224 | FALSE), /* pcrel_offset */ | |
225 | ||
c19d1205 | 226 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 DJ |
227 | 1, /* rightshift */ |
228 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
f6ebfac0 | 229 | 24, /* bitsize */ |
7f266840 DJ |
230 | TRUE, /* pc_relative */ |
231 | 0, /* bitpos */ | |
232 | complain_overflow_signed,/* complain_on_overflow */ | |
233 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 234 | "R_ARM_THM_CALL", /* name */ |
7f266840 | 235 | FALSE, /* partial_inplace */ |
7f6ab9f8 AM |
236 | 0x07ff2fff, /* src_mask */ |
237 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
238 | TRUE), /* pcrel_offset */ |
239 | ||
240 | HOWTO (R_ARM_THM_PC8, /* type */ | |
241 | 1, /* rightshift */ | |
242 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
243 | 8, /* bitsize */ | |
244 | TRUE, /* pc_relative */ | |
245 | 0, /* bitpos */ | |
246 | complain_overflow_signed,/* complain_on_overflow */ | |
247 | bfd_elf_generic_reloc, /* special_function */ | |
248 | "R_ARM_THM_PC8", /* name */ | |
249 | FALSE, /* partial_inplace */ | |
250 | 0x000000ff, /* src_mask */ | |
251 | 0x000000ff, /* dst_mask */ | |
252 | TRUE), /* pcrel_offset */ | |
253 | ||
c19d1205 | 254 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 DJ |
255 | 1, /* rightshift */ |
256 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
257 | 32, /* bitsize */ |
258 | FALSE, /* pc_relative */ | |
7f266840 DJ |
259 | 0, /* bitpos */ |
260 | complain_overflow_signed,/* complain_on_overflow */ | |
261 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 262 | "R_ARM_BREL_ADJ", /* name */ |
7f266840 | 263 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
264 | 0xffffffff, /* src_mask */ |
265 | 0xffffffff, /* dst_mask */ | |
266 | FALSE), /* pcrel_offset */ | |
7f266840 | 267 | |
0855e32b | 268 | HOWTO (R_ARM_TLS_DESC, /* type */ |
7f266840 | 269 | 0, /* rightshift */ |
0855e32b NS |
270 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
271 | 32, /* bitsize */ | |
7f266840 DJ |
272 | FALSE, /* pc_relative */ |
273 | 0, /* bitpos */ | |
0855e32b | 274 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 275 | bfd_elf_generic_reloc, /* special_function */ |
0855e32b | 276 | "R_ARM_TLS_DESC", /* name */ |
7f266840 | 277 | FALSE, /* partial_inplace */ |
0855e32b NS |
278 | 0xffffffff, /* src_mask */ |
279 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
280 | FALSE), /* pcrel_offset */ |
281 | ||
282 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
283 | 0, /* rightshift */ | |
284 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
285 | 0, /* bitsize */ | |
286 | FALSE, /* pc_relative */ | |
287 | 0, /* bitpos */ | |
288 | complain_overflow_signed,/* complain_on_overflow */ | |
289 | bfd_elf_generic_reloc, /* special_function */ | |
290 | "R_ARM_SWI8", /* name */ | |
291 | FALSE, /* partial_inplace */ | |
292 | 0x00000000, /* src_mask */ | |
293 | 0x00000000, /* dst_mask */ | |
294 | FALSE), /* pcrel_offset */ | |
295 | ||
296 | /* BLX instruction for the ARM. */ | |
297 | HOWTO (R_ARM_XPC25, /* type */ | |
298 | 2, /* rightshift */ | |
299 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 300 | 24, /* bitsize */ |
7f266840 DJ |
301 | TRUE, /* pc_relative */ |
302 | 0, /* bitpos */ | |
303 | complain_overflow_signed,/* complain_on_overflow */ | |
304 | bfd_elf_generic_reloc, /* special_function */ | |
305 | "R_ARM_XPC25", /* name */ | |
306 | FALSE, /* partial_inplace */ | |
307 | 0x00ffffff, /* src_mask */ | |
308 | 0x00ffffff, /* dst_mask */ | |
309 | TRUE), /* pcrel_offset */ | |
310 | ||
311 | /* BLX instruction for the Thumb. */ | |
312 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
313 | 2, /* rightshift */ | |
314 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
7f6ab9f8 | 315 | 24, /* bitsize */ |
7f266840 DJ |
316 | TRUE, /* pc_relative */ |
317 | 0, /* bitpos */ | |
318 | complain_overflow_signed,/* complain_on_overflow */ | |
319 | bfd_elf_generic_reloc, /* special_function */ | |
320 | "R_ARM_THM_XPC22", /* name */ | |
321 | FALSE, /* partial_inplace */ | |
7f6ab9f8 AM |
322 | 0x07ff2fff, /* src_mask */ |
323 | 0x07ff2fff, /* dst_mask */ | |
7f266840 DJ |
324 | TRUE), /* pcrel_offset */ |
325 | ||
ba93b8ac | 326 | /* Dynamic TLS relocations. */ |
7f266840 | 327 | |
ba93b8ac | 328 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
99059e56 RM |
329 | 0, /* rightshift */ |
330 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
331 | 32, /* bitsize */ | |
332 | FALSE, /* pc_relative */ | |
333 | 0, /* bitpos */ | |
334 | complain_overflow_bitfield,/* complain_on_overflow */ | |
335 | bfd_elf_generic_reloc, /* special_function */ | |
336 | "R_ARM_TLS_DTPMOD32", /* name */ | |
337 | TRUE, /* partial_inplace */ | |
338 | 0xffffffff, /* src_mask */ | |
339 | 0xffffffff, /* dst_mask */ | |
340 | FALSE), /* pcrel_offset */ | |
7f266840 | 341 | |
ba93b8ac | 342 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
99059e56 RM |
343 | 0, /* rightshift */ |
344 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
345 | 32, /* bitsize */ | |
346 | FALSE, /* pc_relative */ | |
347 | 0, /* bitpos */ | |
348 | complain_overflow_bitfield,/* complain_on_overflow */ | |
349 | bfd_elf_generic_reloc, /* special_function */ | |
350 | "R_ARM_TLS_DTPOFF32", /* name */ | |
351 | TRUE, /* partial_inplace */ | |
352 | 0xffffffff, /* src_mask */ | |
353 | 0xffffffff, /* dst_mask */ | |
354 | FALSE), /* pcrel_offset */ | |
7f266840 | 355 | |
ba93b8ac | 356 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
99059e56 RM |
357 | 0, /* rightshift */ |
358 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
359 | 32, /* bitsize */ | |
360 | FALSE, /* pc_relative */ | |
361 | 0, /* bitpos */ | |
362 | complain_overflow_bitfield,/* complain_on_overflow */ | |
363 | bfd_elf_generic_reloc, /* special_function */ | |
364 | "R_ARM_TLS_TPOFF32", /* name */ | |
365 | TRUE, /* partial_inplace */ | |
366 | 0xffffffff, /* src_mask */ | |
367 | 0xffffffff, /* dst_mask */ | |
368 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
369 | |
370 | /* Relocs used in ARM Linux */ | |
371 | ||
372 | HOWTO (R_ARM_COPY, /* type */ | |
99059e56 RM |
373 | 0, /* rightshift */ |
374 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
375 | 32, /* bitsize */ | |
376 | FALSE, /* pc_relative */ | |
377 | 0, /* bitpos */ | |
378 | complain_overflow_bitfield,/* complain_on_overflow */ | |
379 | bfd_elf_generic_reloc, /* special_function */ | |
380 | "R_ARM_COPY", /* name */ | |
381 | TRUE, /* partial_inplace */ | |
382 | 0xffffffff, /* src_mask */ | |
383 | 0xffffffff, /* dst_mask */ | |
384 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
385 | |
386 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
99059e56 RM |
387 | 0, /* rightshift */ |
388 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
389 | 32, /* bitsize */ | |
390 | FALSE, /* pc_relative */ | |
391 | 0, /* bitpos */ | |
392 | complain_overflow_bitfield,/* complain_on_overflow */ | |
393 | bfd_elf_generic_reloc, /* special_function */ | |
394 | "R_ARM_GLOB_DAT", /* name */ | |
395 | TRUE, /* partial_inplace */ | |
396 | 0xffffffff, /* src_mask */ | |
397 | 0xffffffff, /* dst_mask */ | |
398 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
399 | |
400 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
99059e56 RM |
401 | 0, /* rightshift */ |
402 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
403 | 32, /* bitsize */ | |
404 | FALSE, /* pc_relative */ | |
405 | 0, /* bitpos */ | |
406 | complain_overflow_bitfield,/* complain_on_overflow */ | |
407 | bfd_elf_generic_reloc, /* special_function */ | |
408 | "R_ARM_JUMP_SLOT", /* name */ | |
409 | TRUE, /* partial_inplace */ | |
410 | 0xffffffff, /* src_mask */ | |
411 | 0xffffffff, /* dst_mask */ | |
412 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
413 | |
414 | HOWTO (R_ARM_RELATIVE, /* type */ | |
99059e56 RM |
415 | 0, /* rightshift */ |
416 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
417 | 32, /* bitsize */ | |
418 | FALSE, /* pc_relative */ | |
419 | 0, /* bitpos */ | |
420 | complain_overflow_bitfield,/* complain_on_overflow */ | |
421 | bfd_elf_generic_reloc, /* special_function */ | |
422 | "R_ARM_RELATIVE", /* name */ | |
423 | TRUE, /* partial_inplace */ | |
424 | 0xffffffff, /* src_mask */ | |
425 | 0xffffffff, /* dst_mask */ | |
426 | FALSE), /* pcrel_offset */ | |
7f266840 | 427 | |
c19d1205 | 428 | HOWTO (R_ARM_GOTOFF32, /* type */ |
99059e56 RM |
429 | 0, /* rightshift */ |
430 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
431 | 32, /* bitsize */ | |
432 | FALSE, /* pc_relative */ | |
433 | 0, /* bitpos */ | |
434 | complain_overflow_bitfield,/* complain_on_overflow */ | |
435 | bfd_elf_generic_reloc, /* special_function */ | |
436 | "R_ARM_GOTOFF32", /* name */ | |
437 | TRUE, /* partial_inplace */ | |
438 | 0xffffffff, /* src_mask */ | |
439 | 0xffffffff, /* dst_mask */ | |
440 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
441 | |
442 | HOWTO (R_ARM_GOTPC, /* type */ | |
99059e56 RM |
443 | 0, /* rightshift */ |
444 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
445 | 32, /* bitsize */ | |
446 | TRUE, /* pc_relative */ | |
447 | 0, /* bitpos */ | |
448 | complain_overflow_bitfield,/* complain_on_overflow */ | |
449 | bfd_elf_generic_reloc, /* special_function */ | |
450 | "R_ARM_GOTPC", /* name */ | |
451 | TRUE, /* partial_inplace */ | |
452 | 0xffffffff, /* src_mask */ | |
453 | 0xffffffff, /* dst_mask */ | |
454 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
455 | |
456 | HOWTO (R_ARM_GOT32, /* type */ | |
99059e56 RM |
457 | 0, /* rightshift */ |
458 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
459 | 32, /* bitsize */ | |
460 | FALSE, /* pc_relative */ | |
461 | 0, /* bitpos */ | |
462 | complain_overflow_bitfield,/* complain_on_overflow */ | |
463 | bfd_elf_generic_reloc, /* special_function */ | |
464 | "R_ARM_GOT32", /* name */ | |
465 | TRUE, /* partial_inplace */ | |
466 | 0xffffffff, /* src_mask */ | |
467 | 0xffffffff, /* dst_mask */ | |
468 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
469 | |
470 | HOWTO (R_ARM_PLT32, /* type */ | |
99059e56 RM |
471 | 2, /* rightshift */ |
472 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
473 | 24, /* bitsize */ | |
474 | TRUE, /* pc_relative */ | |
475 | 0, /* bitpos */ | |
476 | complain_overflow_bitfield,/* complain_on_overflow */ | |
477 | bfd_elf_generic_reloc, /* special_function */ | |
478 | "R_ARM_PLT32", /* name */ | |
479 | FALSE, /* partial_inplace */ | |
480 | 0x00ffffff, /* src_mask */ | |
481 | 0x00ffffff, /* dst_mask */ | |
482 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
483 | |
484 | HOWTO (R_ARM_CALL, /* type */ | |
485 | 2, /* rightshift */ | |
486 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
487 | 24, /* bitsize */ | |
488 | TRUE, /* pc_relative */ | |
489 | 0, /* bitpos */ | |
490 | complain_overflow_signed,/* complain_on_overflow */ | |
491 | bfd_elf_generic_reloc, /* special_function */ | |
492 | "R_ARM_CALL", /* name */ | |
493 | FALSE, /* partial_inplace */ | |
494 | 0x00ffffff, /* src_mask */ | |
495 | 0x00ffffff, /* dst_mask */ | |
496 | TRUE), /* pcrel_offset */ | |
497 | ||
498 | HOWTO (R_ARM_JUMP24, /* type */ | |
499 | 2, /* rightshift */ | |
500 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
501 | 24, /* bitsize */ | |
502 | TRUE, /* pc_relative */ | |
503 | 0, /* bitpos */ | |
504 | complain_overflow_signed,/* complain_on_overflow */ | |
505 | bfd_elf_generic_reloc, /* special_function */ | |
506 | "R_ARM_JUMP24", /* name */ | |
507 | FALSE, /* partial_inplace */ | |
508 | 0x00ffffff, /* src_mask */ | |
509 | 0x00ffffff, /* dst_mask */ | |
510 | TRUE), /* pcrel_offset */ | |
511 | ||
c19d1205 ZW |
512 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
513 | 1, /* rightshift */ | |
514 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
515 | 24, /* bitsize */ | |
516 | TRUE, /* pc_relative */ | |
7f266840 | 517 | 0, /* bitpos */ |
c19d1205 | 518 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 519 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 520 | "R_ARM_THM_JUMP24", /* name */ |
7f266840 | 521 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
522 | 0x07ff2fff, /* src_mask */ |
523 | 0x07ff2fff, /* dst_mask */ | |
524 | TRUE), /* pcrel_offset */ | |
7f266840 | 525 | |
c19d1205 | 526 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 527 | 0, /* rightshift */ |
c19d1205 ZW |
528 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
529 | 32, /* bitsize */ | |
7f266840 DJ |
530 | FALSE, /* pc_relative */ |
531 | 0, /* bitpos */ | |
532 | complain_overflow_dont,/* complain_on_overflow */ | |
533 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 534 | "R_ARM_BASE_ABS", /* name */ |
7f266840 | 535 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
536 | 0xffffffff, /* src_mask */ |
537 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
538 | FALSE), /* pcrel_offset */ |
539 | ||
540 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
541 | 0, /* rightshift */ | |
542 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
543 | 12, /* bitsize */ | |
544 | TRUE, /* pc_relative */ | |
545 | 0, /* bitpos */ | |
546 | complain_overflow_dont,/* complain_on_overflow */ | |
547 | bfd_elf_generic_reloc, /* special_function */ | |
548 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
549 | FALSE, /* partial_inplace */ | |
550 | 0x00000fff, /* src_mask */ | |
551 | 0x00000fff, /* dst_mask */ | |
552 | TRUE), /* pcrel_offset */ | |
553 | ||
554 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
555 | 0, /* rightshift */ | |
556 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
557 | 12, /* bitsize */ | |
558 | TRUE, /* pc_relative */ | |
559 | 8, /* bitpos */ | |
560 | complain_overflow_dont,/* complain_on_overflow */ | |
561 | bfd_elf_generic_reloc, /* special_function */ | |
562 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
563 | FALSE, /* partial_inplace */ | |
564 | 0x00000fff, /* src_mask */ | |
565 | 0x00000fff, /* dst_mask */ | |
566 | TRUE), /* pcrel_offset */ | |
567 | ||
568 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
569 | 0, /* rightshift */ | |
570 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
571 | 12, /* bitsize */ | |
572 | TRUE, /* pc_relative */ | |
573 | 16, /* bitpos */ | |
574 | complain_overflow_dont,/* complain_on_overflow */ | |
575 | bfd_elf_generic_reloc, /* special_function */ | |
576 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
577 | FALSE, /* partial_inplace */ | |
578 | 0x00000fff, /* src_mask */ | |
579 | 0x00000fff, /* dst_mask */ | |
580 | TRUE), /* pcrel_offset */ | |
581 | ||
582 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
583 | 0, /* rightshift */ | |
584 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
585 | 12, /* bitsize */ | |
586 | FALSE, /* pc_relative */ | |
587 | 0, /* bitpos */ | |
588 | complain_overflow_dont,/* complain_on_overflow */ | |
589 | bfd_elf_generic_reloc, /* special_function */ | |
590 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
591 | FALSE, /* partial_inplace */ | |
592 | 0x00000fff, /* src_mask */ | |
593 | 0x00000fff, /* dst_mask */ | |
594 | FALSE), /* pcrel_offset */ | |
595 | ||
596 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
597 | 0, /* rightshift */ | |
598 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
599 | 8, /* bitsize */ | |
600 | FALSE, /* pc_relative */ | |
601 | 12, /* bitpos */ | |
602 | complain_overflow_dont,/* complain_on_overflow */ | |
603 | bfd_elf_generic_reloc, /* special_function */ | |
604 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
605 | FALSE, /* partial_inplace */ | |
606 | 0x000ff000, /* src_mask */ | |
607 | 0x000ff000, /* dst_mask */ | |
608 | FALSE), /* pcrel_offset */ | |
609 | ||
610 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
611 | 0, /* rightshift */ | |
612 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
613 | 8, /* bitsize */ | |
614 | FALSE, /* pc_relative */ | |
615 | 20, /* bitpos */ | |
616 | complain_overflow_dont,/* complain_on_overflow */ | |
617 | bfd_elf_generic_reloc, /* special_function */ | |
618 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
619 | FALSE, /* partial_inplace */ | |
620 | 0x0ff00000, /* src_mask */ | |
621 | 0x0ff00000, /* dst_mask */ | |
622 | FALSE), /* pcrel_offset */ | |
623 | ||
624 | HOWTO (R_ARM_TARGET1, /* type */ | |
625 | 0, /* rightshift */ | |
626 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
627 | 32, /* bitsize */ | |
628 | FALSE, /* pc_relative */ | |
629 | 0, /* bitpos */ | |
630 | complain_overflow_dont,/* complain_on_overflow */ | |
631 | bfd_elf_generic_reloc, /* special_function */ | |
632 | "R_ARM_TARGET1", /* name */ | |
633 | FALSE, /* partial_inplace */ | |
634 | 0xffffffff, /* src_mask */ | |
635 | 0xffffffff, /* dst_mask */ | |
636 | FALSE), /* pcrel_offset */ | |
637 | ||
638 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
639 | 0, /* rightshift */ | |
640 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
641 | 32, /* bitsize */ | |
642 | FALSE, /* pc_relative */ | |
643 | 0, /* bitpos */ | |
644 | complain_overflow_dont,/* complain_on_overflow */ | |
645 | bfd_elf_generic_reloc, /* special_function */ | |
646 | "R_ARM_ROSEGREL32", /* name */ | |
647 | FALSE, /* partial_inplace */ | |
648 | 0xffffffff, /* src_mask */ | |
649 | 0xffffffff, /* dst_mask */ | |
650 | FALSE), /* pcrel_offset */ | |
651 | ||
652 | HOWTO (R_ARM_V4BX, /* type */ | |
653 | 0, /* rightshift */ | |
654 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
655 | 32, /* bitsize */ | |
656 | FALSE, /* pc_relative */ | |
657 | 0, /* bitpos */ | |
658 | complain_overflow_dont,/* complain_on_overflow */ | |
659 | bfd_elf_generic_reloc, /* special_function */ | |
660 | "R_ARM_V4BX", /* name */ | |
661 | FALSE, /* partial_inplace */ | |
662 | 0xffffffff, /* src_mask */ | |
663 | 0xffffffff, /* dst_mask */ | |
664 | FALSE), /* pcrel_offset */ | |
665 | ||
666 | HOWTO (R_ARM_TARGET2, /* type */ | |
667 | 0, /* rightshift */ | |
668 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
669 | 32, /* bitsize */ | |
670 | FALSE, /* pc_relative */ | |
671 | 0, /* bitpos */ | |
672 | complain_overflow_signed,/* complain_on_overflow */ | |
673 | bfd_elf_generic_reloc, /* special_function */ | |
674 | "R_ARM_TARGET2", /* name */ | |
675 | FALSE, /* partial_inplace */ | |
676 | 0xffffffff, /* src_mask */ | |
677 | 0xffffffff, /* dst_mask */ | |
678 | TRUE), /* pcrel_offset */ | |
679 | ||
680 | HOWTO (R_ARM_PREL31, /* type */ | |
681 | 0, /* rightshift */ | |
682 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
683 | 31, /* bitsize */ | |
684 | TRUE, /* pc_relative */ | |
685 | 0, /* bitpos */ | |
686 | complain_overflow_signed,/* complain_on_overflow */ | |
687 | bfd_elf_generic_reloc, /* special_function */ | |
688 | "R_ARM_PREL31", /* name */ | |
689 | FALSE, /* partial_inplace */ | |
690 | 0x7fffffff, /* src_mask */ | |
691 | 0x7fffffff, /* dst_mask */ | |
692 | TRUE), /* pcrel_offset */ | |
c19d1205 ZW |
693 | |
694 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
695 | 0, /* rightshift */ | |
696 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
697 | 16, /* bitsize */ | |
698 | FALSE, /* pc_relative */ | |
699 | 0, /* bitpos */ | |
700 | complain_overflow_dont,/* complain_on_overflow */ | |
701 | bfd_elf_generic_reloc, /* special_function */ | |
702 | "R_ARM_MOVW_ABS_NC", /* name */ | |
703 | FALSE, /* partial_inplace */ | |
39623e12 PB |
704 | 0x000f0fff, /* src_mask */ |
705 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
706 | FALSE), /* pcrel_offset */ |
707 | ||
708 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
709 | 0, /* rightshift */ | |
710 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
711 | 16, /* bitsize */ | |
712 | FALSE, /* pc_relative */ | |
713 | 0, /* bitpos */ | |
714 | complain_overflow_bitfield,/* complain_on_overflow */ | |
715 | bfd_elf_generic_reloc, /* special_function */ | |
716 | "R_ARM_MOVT_ABS", /* name */ | |
717 | FALSE, /* partial_inplace */ | |
39623e12 PB |
718 | 0x000f0fff, /* src_mask */ |
719 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
720 | FALSE), /* pcrel_offset */ |
721 | ||
722 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
723 | 0, /* rightshift */ | |
724 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
725 | 16, /* bitsize */ | |
726 | TRUE, /* pc_relative */ | |
727 | 0, /* bitpos */ | |
728 | complain_overflow_dont,/* complain_on_overflow */ | |
729 | bfd_elf_generic_reloc, /* special_function */ | |
730 | "R_ARM_MOVW_PREL_NC", /* name */ | |
731 | FALSE, /* partial_inplace */ | |
39623e12 PB |
732 | 0x000f0fff, /* src_mask */ |
733 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
734 | TRUE), /* pcrel_offset */ |
735 | ||
736 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
737 | 0, /* rightshift */ | |
738 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
739 | 16, /* bitsize */ | |
740 | TRUE, /* pc_relative */ | |
741 | 0, /* bitpos */ | |
742 | complain_overflow_bitfield,/* complain_on_overflow */ | |
743 | bfd_elf_generic_reloc, /* special_function */ | |
744 | "R_ARM_MOVT_PREL", /* name */ | |
745 | FALSE, /* partial_inplace */ | |
39623e12 PB |
746 | 0x000f0fff, /* src_mask */ |
747 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
748 | TRUE), /* pcrel_offset */ |
749 | ||
750 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
751 | 0, /* rightshift */ | |
752 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
753 | 16, /* bitsize */ | |
754 | FALSE, /* pc_relative */ | |
755 | 0, /* bitpos */ | |
756 | complain_overflow_dont,/* complain_on_overflow */ | |
757 | bfd_elf_generic_reloc, /* special_function */ | |
758 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
759 | FALSE, /* partial_inplace */ | |
760 | 0x040f70ff, /* src_mask */ | |
761 | 0x040f70ff, /* dst_mask */ | |
762 | FALSE), /* pcrel_offset */ | |
763 | ||
764 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
765 | 0, /* rightshift */ | |
766 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
767 | 16, /* bitsize */ | |
768 | FALSE, /* pc_relative */ | |
769 | 0, /* bitpos */ | |
770 | complain_overflow_bitfield,/* complain_on_overflow */ | |
771 | bfd_elf_generic_reloc, /* special_function */ | |
772 | "R_ARM_THM_MOVT_ABS", /* name */ | |
773 | FALSE, /* partial_inplace */ | |
774 | 0x040f70ff, /* src_mask */ | |
775 | 0x040f70ff, /* dst_mask */ | |
776 | FALSE), /* pcrel_offset */ | |
777 | ||
778 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
779 | 0, /* rightshift */ | |
780 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
781 | 16, /* bitsize */ | |
782 | TRUE, /* pc_relative */ | |
783 | 0, /* bitpos */ | |
784 | complain_overflow_dont,/* complain_on_overflow */ | |
785 | bfd_elf_generic_reloc, /* special_function */ | |
786 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
787 | FALSE, /* partial_inplace */ | |
788 | 0x040f70ff, /* src_mask */ | |
789 | 0x040f70ff, /* dst_mask */ | |
790 | TRUE), /* pcrel_offset */ | |
791 | ||
792 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
793 | 0, /* rightshift */ | |
794 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
795 | 16, /* bitsize */ | |
796 | TRUE, /* pc_relative */ | |
797 | 0, /* bitpos */ | |
798 | complain_overflow_bitfield,/* complain_on_overflow */ | |
799 | bfd_elf_generic_reloc, /* special_function */ | |
800 | "R_ARM_THM_MOVT_PREL", /* name */ | |
801 | FALSE, /* partial_inplace */ | |
802 | 0x040f70ff, /* src_mask */ | |
803 | 0x040f70ff, /* dst_mask */ | |
804 | TRUE), /* pcrel_offset */ | |
805 | ||
806 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
807 | 1, /* rightshift */ | |
808 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
809 | 19, /* bitsize */ | |
810 | TRUE, /* pc_relative */ | |
811 | 0, /* bitpos */ | |
812 | complain_overflow_signed,/* complain_on_overflow */ | |
813 | bfd_elf_generic_reloc, /* special_function */ | |
814 | "R_ARM_THM_JUMP19", /* name */ | |
815 | FALSE, /* partial_inplace */ | |
816 | 0x043f2fff, /* src_mask */ | |
817 | 0x043f2fff, /* dst_mask */ | |
818 | TRUE), /* pcrel_offset */ | |
819 | ||
820 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
821 | 1, /* rightshift */ | |
822 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
823 | 6, /* bitsize */ | |
824 | TRUE, /* pc_relative */ | |
825 | 0, /* bitpos */ | |
826 | complain_overflow_unsigned,/* complain_on_overflow */ | |
827 | bfd_elf_generic_reloc, /* special_function */ | |
828 | "R_ARM_THM_JUMP6", /* name */ | |
829 | FALSE, /* partial_inplace */ | |
830 | 0x02f8, /* src_mask */ | |
831 | 0x02f8, /* dst_mask */ | |
832 | TRUE), /* pcrel_offset */ | |
833 | ||
834 | /* These are declared as 13-bit signed relocations because we can | |
835 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
836 | versa. */ | |
837 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
838 | 0, /* rightshift */ | |
839 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
840 | 13, /* bitsize */ | |
841 | TRUE, /* pc_relative */ | |
842 | 0, /* bitpos */ | |
2cab6cc3 | 843 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
844 | bfd_elf_generic_reloc, /* special_function */ |
845 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
846 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
847 | 0xffffffff, /* src_mask */ |
848 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
849 | TRUE), /* pcrel_offset */ |
850 | ||
851 | HOWTO (R_ARM_THM_PC12, /* type */ | |
852 | 0, /* rightshift */ | |
853 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
854 | 13, /* bitsize */ | |
855 | TRUE, /* pc_relative */ | |
856 | 0, /* bitpos */ | |
2cab6cc3 | 857 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
858 | bfd_elf_generic_reloc, /* special_function */ |
859 | "R_ARM_THM_PC12", /* name */ | |
860 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
861 | 0xffffffff, /* src_mask */ |
862 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
863 | TRUE), /* pcrel_offset */ |
864 | ||
865 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
866 | 0, /* rightshift */ | |
867 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
868 | 32, /* bitsize */ | |
869 | FALSE, /* pc_relative */ | |
870 | 0, /* bitpos */ | |
871 | complain_overflow_dont,/* complain_on_overflow */ | |
872 | bfd_elf_generic_reloc, /* special_function */ | |
873 | "R_ARM_ABS32_NOI", /* name */ | |
874 | FALSE, /* partial_inplace */ | |
875 | 0xffffffff, /* src_mask */ | |
876 | 0xffffffff, /* dst_mask */ | |
877 | FALSE), /* pcrel_offset */ | |
878 | ||
879 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
880 | 0, /* rightshift */ | |
881 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
882 | 32, /* bitsize */ | |
883 | TRUE, /* pc_relative */ | |
884 | 0, /* bitpos */ | |
885 | complain_overflow_dont,/* complain_on_overflow */ | |
886 | bfd_elf_generic_reloc, /* special_function */ | |
887 | "R_ARM_REL32_NOI", /* name */ | |
888 | FALSE, /* partial_inplace */ | |
889 | 0xffffffff, /* src_mask */ | |
890 | 0xffffffff, /* dst_mask */ | |
891 | FALSE), /* pcrel_offset */ | |
7f266840 | 892 | |
4962c51a MS |
893 | /* Group relocations. */ |
894 | ||
895 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
896 | 0, /* rightshift */ | |
897 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
898 | 32, /* bitsize */ | |
899 | TRUE, /* pc_relative */ | |
900 | 0, /* bitpos */ | |
901 | complain_overflow_dont,/* complain_on_overflow */ | |
902 | bfd_elf_generic_reloc, /* special_function */ | |
903 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
904 | FALSE, /* partial_inplace */ | |
905 | 0xffffffff, /* src_mask */ | |
906 | 0xffffffff, /* dst_mask */ | |
907 | TRUE), /* pcrel_offset */ | |
908 | ||
909 | HOWTO (R_ARM_ALU_PC_G0, /* type */ | |
910 | 0, /* rightshift */ | |
911 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
912 | 32, /* bitsize */ | |
913 | TRUE, /* pc_relative */ | |
914 | 0, /* bitpos */ | |
915 | complain_overflow_dont,/* complain_on_overflow */ | |
916 | bfd_elf_generic_reloc, /* special_function */ | |
917 | "R_ARM_ALU_PC_G0", /* name */ | |
918 | FALSE, /* partial_inplace */ | |
919 | 0xffffffff, /* src_mask */ | |
920 | 0xffffffff, /* dst_mask */ | |
921 | TRUE), /* pcrel_offset */ | |
922 | ||
923 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
924 | 0, /* rightshift */ | |
925 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
926 | 32, /* bitsize */ | |
927 | TRUE, /* pc_relative */ | |
928 | 0, /* bitpos */ | |
929 | complain_overflow_dont,/* complain_on_overflow */ | |
930 | bfd_elf_generic_reloc, /* special_function */ | |
931 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
932 | FALSE, /* partial_inplace */ | |
933 | 0xffffffff, /* src_mask */ | |
934 | 0xffffffff, /* dst_mask */ | |
935 | TRUE), /* pcrel_offset */ | |
936 | ||
937 | HOWTO (R_ARM_ALU_PC_G1, /* type */ | |
938 | 0, /* rightshift */ | |
939 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
940 | 32, /* bitsize */ | |
941 | TRUE, /* pc_relative */ | |
942 | 0, /* bitpos */ | |
943 | complain_overflow_dont,/* complain_on_overflow */ | |
944 | bfd_elf_generic_reloc, /* special_function */ | |
945 | "R_ARM_ALU_PC_G1", /* name */ | |
946 | FALSE, /* partial_inplace */ | |
947 | 0xffffffff, /* src_mask */ | |
948 | 0xffffffff, /* dst_mask */ | |
949 | TRUE), /* pcrel_offset */ | |
950 | ||
951 | HOWTO (R_ARM_ALU_PC_G2, /* type */ | |
952 | 0, /* rightshift */ | |
953 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
954 | 32, /* bitsize */ | |
955 | TRUE, /* pc_relative */ | |
956 | 0, /* bitpos */ | |
957 | complain_overflow_dont,/* complain_on_overflow */ | |
958 | bfd_elf_generic_reloc, /* special_function */ | |
959 | "R_ARM_ALU_PC_G2", /* name */ | |
960 | FALSE, /* partial_inplace */ | |
961 | 0xffffffff, /* src_mask */ | |
962 | 0xffffffff, /* dst_mask */ | |
963 | TRUE), /* pcrel_offset */ | |
964 | ||
965 | HOWTO (R_ARM_LDR_PC_G1, /* type */ | |
966 | 0, /* rightshift */ | |
967 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
968 | 32, /* bitsize */ | |
969 | TRUE, /* pc_relative */ | |
970 | 0, /* bitpos */ | |
971 | complain_overflow_dont,/* complain_on_overflow */ | |
972 | bfd_elf_generic_reloc, /* special_function */ | |
973 | "R_ARM_LDR_PC_G1", /* name */ | |
974 | FALSE, /* partial_inplace */ | |
975 | 0xffffffff, /* src_mask */ | |
976 | 0xffffffff, /* dst_mask */ | |
977 | TRUE), /* pcrel_offset */ | |
978 | ||
979 | HOWTO (R_ARM_LDR_PC_G2, /* type */ | |
980 | 0, /* rightshift */ | |
981 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
982 | 32, /* bitsize */ | |
983 | TRUE, /* pc_relative */ | |
984 | 0, /* bitpos */ | |
985 | complain_overflow_dont,/* complain_on_overflow */ | |
986 | bfd_elf_generic_reloc, /* special_function */ | |
987 | "R_ARM_LDR_PC_G2", /* name */ | |
988 | FALSE, /* partial_inplace */ | |
989 | 0xffffffff, /* src_mask */ | |
990 | 0xffffffff, /* dst_mask */ | |
991 | TRUE), /* pcrel_offset */ | |
992 | ||
993 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ | |
994 | 0, /* rightshift */ | |
995 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
996 | 32, /* bitsize */ | |
997 | TRUE, /* pc_relative */ | |
998 | 0, /* bitpos */ | |
999 | complain_overflow_dont,/* complain_on_overflow */ | |
1000 | bfd_elf_generic_reloc, /* special_function */ | |
1001 | "R_ARM_LDRS_PC_G0", /* name */ | |
1002 | FALSE, /* partial_inplace */ | |
1003 | 0xffffffff, /* src_mask */ | |
1004 | 0xffffffff, /* dst_mask */ | |
1005 | TRUE), /* pcrel_offset */ | |
1006 | ||
1007 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ | |
1008 | 0, /* rightshift */ | |
1009 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1010 | 32, /* bitsize */ | |
1011 | TRUE, /* pc_relative */ | |
1012 | 0, /* bitpos */ | |
1013 | complain_overflow_dont,/* complain_on_overflow */ | |
1014 | bfd_elf_generic_reloc, /* special_function */ | |
1015 | "R_ARM_LDRS_PC_G1", /* name */ | |
1016 | FALSE, /* partial_inplace */ | |
1017 | 0xffffffff, /* src_mask */ | |
1018 | 0xffffffff, /* dst_mask */ | |
1019 | TRUE), /* pcrel_offset */ | |
1020 | ||
1021 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ | |
1022 | 0, /* rightshift */ | |
1023 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1024 | 32, /* bitsize */ | |
1025 | TRUE, /* pc_relative */ | |
1026 | 0, /* bitpos */ | |
1027 | complain_overflow_dont,/* complain_on_overflow */ | |
1028 | bfd_elf_generic_reloc, /* special_function */ | |
1029 | "R_ARM_LDRS_PC_G2", /* name */ | |
1030 | FALSE, /* partial_inplace */ | |
1031 | 0xffffffff, /* src_mask */ | |
1032 | 0xffffffff, /* dst_mask */ | |
1033 | TRUE), /* pcrel_offset */ | |
1034 | ||
1035 | HOWTO (R_ARM_LDC_PC_G0, /* type */ | |
1036 | 0, /* rightshift */ | |
1037 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1038 | 32, /* bitsize */ | |
1039 | TRUE, /* pc_relative */ | |
1040 | 0, /* bitpos */ | |
1041 | complain_overflow_dont,/* complain_on_overflow */ | |
1042 | bfd_elf_generic_reloc, /* special_function */ | |
1043 | "R_ARM_LDC_PC_G0", /* name */ | |
1044 | FALSE, /* partial_inplace */ | |
1045 | 0xffffffff, /* src_mask */ | |
1046 | 0xffffffff, /* dst_mask */ | |
1047 | TRUE), /* pcrel_offset */ | |
1048 | ||
1049 | HOWTO (R_ARM_LDC_PC_G1, /* type */ | |
1050 | 0, /* rightshift */ | |
1051 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1052 | 32, /* bitsize */ | |
1053 | TRUE, /* pc_relative */ | |
1054 | 0, /* bitpos */ | |
1055 | complain_overflow_dont,/* complain_on_overflow */ | |
1056 | bfd_elf_generic_reloc, /* special_function */ | |
1057 | "R_ARM_LDC_PC_G1", /* name */ | |
1058 | FALSE, /* partial_inplace */ | |
1059 | 0xffffffff, /* src_mask */ | |
1060 | 0xffffffff, /* dst_mask */ | |
1061 | TRUE), /* pcrel_offset */ | |
1062 | ||
1063 | HOWTO (R_ARM_LDC_PC_G2, /* type */ | |
1064 | 0, /* rightshift */ | |
1065 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1066 | 32, /* bitsize */ | |
1067 | TRUE, /* pc_relative */ | |
1068 | 0, /* bitpos */ | |
1069 | complain_overflow_dont,/* complain_on_overflow */ | |
1070 | bfd_elf_generic_reloc, /* special_function */ | |
1071 | "R_ARM_LDC_PC_G2", /* name */ | |
1072 | FALSE, /* partial_inplace */ | |
1073 | 0xffffffff, /* src_mask */ | |
1074 | 0xffffffff, /* dst_mask */ | |
1075 | TRUE), /* pcrel_offset */ | |
1076 | ||
1077 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ | |
1078 | 0, /* rightshift */ | |
1079 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1080 | 32, /* bitsize */ | |
1081 | TRUE, /* pc_relative */ | |
1082 | 0, /* bitpos */ | |
1083 | complain_overflow_dont,/* complain_on_overflow */ | |
1084 | bfd_elf_generic_reloc, /* special_function */ | |
1085 | "R_ARM_ALU_SB_G0_NC", /* name */ | |
1086 | FALSE, /* partial_inplace */ | |
1087 | 0xffffffff, /* src_mask */ | |
1088 | 0xffffffff, /* dst_mask */ | |
1089 | TRUE), /* pcrel_offset */ | |
1090 | ||
1091 | HOWTO (R_ARM_ALU_SB_G0, /* type */ | |
1092 | 0, /* rightshift */ | |
1093 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1094 | 32, /* bitsize */ | |
1095 | TRUE, /* pc_relative */ | |
1096 | 0, /* bitpos */ | |
1097 | complain_overflow_dont,/* complain_on_overflow */ | |
1098 | bfd_elf_generic_reloc, /* special_function */ | |
1099 | "R_ARM_ALU_SB_G0", /* name */ | |
1100 | FALSE, /* partial_inplace */ | |
1101 | 0xffffffff, /* src_mask */ | |
1102 | 0xffffffff, /* dst_mask */ | |
1103 | TRUE), /* pcrel_offset */ | |
1104 | ||
1105 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ | |
1106 | 0, /* rightshift */ | |
1107 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1108 | 32, /* bitsize */ | |
1109 | TRUE, /* pc_relative */ | |
1110 | 0, /* bitpos */ | |
1111 | complain_overflow_dont,/* complain_on_overflow */ | |
1112 | bfd_elf_generic_reloc, /* special_function */ | |
1113 | "R_ARM_ALU_SB_G1_NC", /* name */ | |
1114 | FALSE, /* partial_inplace */ | |
1115 | 0xffffffff, /* src_mask */ | |
1116 | 0xffffffff, /* dst_mask */ | |
1117 | TRUE), /* pcrel_offset */ | |
1118 | ||
1119 | HOWTO (R_ARM_ALU_SB_G1, /* type */ | |
1120 | 0, /* rightshift */ | |
1121 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1122 | 32, /* bitsize */ | |
1123 | TRUE, /* pc_relative */ | |
1124 | 0, /* bitpos */ | |
1125 | complain_overflow_dont,/* complain_on_overflow */ | |
1126 | bfd_elf_generic_reloc, /* special_function */ | |
1127 | "R_ARM_ALU_SB_G1", /* name */ | |
1128 | FALSE, /* partial_inplace */ | |
1129 | 0xffffffff, /* src_mask */ | |
1130 | 0xffffffff, /* dst_mask */ | |
1131 | TRUE), /* pcrel_offset */ | |
1132 | ||
1133 | HOWTO (R_ARM_ALU_SB_G2, /* type */ | |
1134 | 0, /* rightshift */ | |
1135 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1136 | 32, /* bitsize */ | |
1137 | TRUE, /* pc_relative */ | |
1138 | 0, /* bitpos */ | |
1139 | complain_overflow_dont,/* complain_on_overflow */ | |
1140 | bfd_elf_generic_reloc, /* special_function */ | |
1141 | "R_ARM_ALU_SB_G2", /* name */ | |
1142 | FALSE, /* partial_inplace */ | |
1143 | 0xffffffff, /* src_mask */ | |
1144 | 0xffffffff, /* dst_mask */ | |
1145 | TRUE), /* pcrel_offset */ | |
1146 | ||
1147 | HOWTO (R_ARM_LDR_SB_G0, /* type */ | |
1148 | 0, /* rightshift */ | |
1149 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1150 | 32, /* bitsize */ | |
1151 | TRUE, /* pc_relative */ | |
1152 | 0, /* bitpos */ | |
1153 | complain_overflow_dont,/* complain_on_overflow */ | |
1154 | bfd_elf_generic_reloc, /* special_function */ | |
1155 | "R_ARM_LDR_SB_G0", /* name */ | |
1156 | FALSE, /* partial_inplace */ | |
1157 | 0xffffffff, /* src_mask */ | |
1158 | 0xffffffff, /* dst_mask */ | |
1159 | TRUE), /* pcrel_offset */ | |
1160 | ||
1161 | HOWTO (R_ARM_LDR_SB_G1, /* type */ | |
1162 | 0, /* rightshift */ | |
1163 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1164 | 32, /* bitsize */ | |
1165 | TRUE, /* pc_relative */ | |
1166 | 0, /* bitpos */ | |
1167 | complain_overflow_dont,/* complain_on_overflow */ | |
1168 | bfd_elf_generic_reloc, /* special_function */ | |
1169 | "R_ARM_LDR_SB_G1", /* name */ | |
1170 | FALSE, /* partial_inplace */ | |
1171 | 0xffffffff, /* src_mask */ | |
1172 | 0xffffffff, /* dst_mask */ | |
1173 | TRUE), /* pcrel_offset */ | |
1174 | ||
1175 | HOWTO (R_ARM_LDR_SB_G2, /* type */ | |
1176 | 0, /* rightshift */ | |
1177 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1178 | 32, /* bitsize */ | |
1179 | TRUE, /* pc_relative */ | |
1180 | 0, /* bitpos */ | |
1181 | complain_overflow_dont,/* complain_on_overflow */ | |
1182 | bfd_elf_generic_reloc, /* special_function */ | |
1183 | "R_ARM_LDR_SB_G2", /* name */ | |
1184 | FALSE, /* partial_inplace */ | |
1185 | 0xffffffff, /* src_mask */ | |
1186 | 0xffffffff, /* dst_mask */ | |
1187 | TRUE), /* pcrel_offset */ | |
1188 | ||
1189 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ | |
1190 | 0, /* rightshift */ | |
1191 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1192 | 32, /* bitsize */ | |
1193 | TRUE, /* pc_relative */ | |
1194 | 0, /* bitpos */ | |
1195 | complain_overflow_dont,/* complain_on_overflow */ | |
1196 | bfd_elf_generic_reloc, /* special_function */ | |
1197 | "R_ARM_LDRS_SB_G0", /* name */ | |
1198 | FALSE, /* partial_inplace */ | |
1199 | 0xffffffff, /* src_mask */ | |
1200 | 0xffffffff, /* dst_mask */ | |
1201 | TRUE), /* pcrel_offset */ | |
1202 | ||
1203 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ | |
1204 | 0, /* rightshift */ | |
1205 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1206 | 32, /* bitsize */ | |
1207 | TRUE, /* pc_relative */ | |
1208 | 0, /* bitpos */ | |
1209 | complain_overflow_dont,/* complain_on_overflow */ | |
1210 | bfd_elf_generic_reloc, /* special_function */ | |
1211 | "R_ARM_LDRS_SB_G1", /* name */ | |
1212 | FALSE, /* partial_inplace */ | |
1213 | 0xffffffff, /* src_mask */ | |
1214 | 0xffffffff, /* dst_mask */ | |
1215 | TRUE), /* pcrel_offset */ | |
1216 | ||
1217 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ | |
1218 | 0, /* rightshift */ | |
1219 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1220 | 32, /* bitsize */ | |
1221 | TRUE, /* pc_relative */ | |
1222 | 0, /* bitpos */ | |
1223 | complain_overflow_dont,/* complain_on_overflow */ | |
1224 | bfd_elf_generic_reloc, /* special_function */ | |
1225 | "R_ARM_LDRS_SB_G2", /* name */ | |
1226 | FALSE, /* partial_inplace */ | |
1227 | 0xffffffff, /* src_mask */ | |
1228 | 0xffffffff, /* dst_mask */ | |
1229 | TRUE), /* pcrel_offset */ | |
1230 | ||
1231 | HOWTO (R_ARM_LDC_SB_G0, /* type */ | |
1232 | 0, /* rightshift */ | |
1233 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1234 | 32, /* bitsize */ | |
1235 | TRUE, /* pc_relative */ | |
1236 | 0, /* bitpos */ | |
1237 | complain_overflow_dont,/* complain_on_overflow */ | |
1238 | bfd_elf_generic_reloc, /* special_function */ | |
1239 | "R_ARM_LDC_SB_G0", /* name */ | |
1240 | FALSE, /* partial_inplace */ | |
1241 | 0xffffffff, /* src_mask */ | |
1242 | 0xffffffff, /* dst_mask */ | |
1243 | TRUE), /* pcrel_offset */ | |
1244 | ||
1245 | HOWTO (R_ARM_LDC_SB_G1, /* type */ | |
1246 | 0, /* rightshift */ | |
1247 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1248 | 32, /* bitsize */ | |
1249 | TRUE, /* pc_relative */ | |
1250 | 0, /* bitpos */ | |
1251 | complain_overflow_dont,/* complain_on_overflow */ | |
1252 | bfd_elf_generic_reloc, /* special_function */ | |
1253 | "R_ARM_LDC_SB_G1", /* name */ | |
1254 | FALSE, /* partial_inplace */ | |
1255 | 0xffffffff, /* src_mask */ | |
1256 | 0xffffffff, /* dst_mask */ | |
1257 | TRUE), /* pcrel_offset */ | |
1258 | ||
1259 | HOWTO (R_ARM_LDC_SB_G2, /* type */ | |
1260 | 0, /* rightshift */ | |
1261 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1262 | 32, /* bitsize */ | |
1263 | TRUE, /* pc_relative */ | |
1264 | 0, /* bitpos */ | |
1265 | complain_overflow_dont,/* complain_on_overflow */ | |
1266 | bfd_elf_generic_reloc, /* special_function */ | |
1267 | "R_ARM_LDC_SB_G2", /* name */ | |
1268 | FALSE, /* partial_inplace */ | |
1269 | 0xffffffff, /* src_mask */ | |
1270 | 0xffffffff, /* dst_mask */ | |
1271 | TRUE), /* pcrel_offset */ | |
1272 | ||
1273 | /* End of group relocations. */ | |
c19d1205 | 1274 | |
c19d1205 ZW |
1275 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1276 | 0, /* rightshift */ | |
1277 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1278 | 16, /* bitsize */ | |
1279 | FALSE, /* pc_relative */ | |
1280 | 0, /* bitpos */ | |
1281 | complain_overflow_dont,/* complain_on_overflow */ | |
1282 | bfd_elf_generic_reloc, /* special_function */ | |
1283 | "R_ARM_MOVW_BREL_NC", /* name */ | |
1284 | FALSE, /* partial_inplace */ | |
1285 | 0x0000ffff, /* src_mask */ | |
1286 | 0x0000ffff, /* dst_mask */ | |
1287 | FALSE), /* pcrel_offset */ | |
1288 | ||
1289 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1290 | 0, /* rightshift */ | |
1291 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1292 | 16, /* bitsize */ | |
1293 | FALSE, /* pc_relative */ | |
1294 | 0, /* bitpos */ | |
1295 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1296 | bfd_elf_generic_reloc, /* special_function */ | |
1297 | "R_ARM_MOVT_BREL", /* name */ | |
1298 | FALSE, /* partial_inplace */ | |
1299 | 0x0000ffff, /* src_mask */ | |
1300 | 0x0000ffff, /* dst_mask */ | |
1301 | FALSE), /* pcrel_offset */ | |
1302 | ||
1303 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1304 | 0, /* rightshift */ | |
1305 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1306 | 16, /* bitsize */ | |
1307 | FALSE, /* pc_relative */ | |
1308 | 0, /* bitpos */ | |
1309 | complain_overflow_dont,/* complain_on_overflow */ | |
1310 | bfd_elf_generic_reloc, /* special_function */ | |
1311 | "R_ARM_MOVW_BREL", /* name */ | |
1312 | FALSE, /* partial_inplace */ | |
1313 | 0x0000ffff, /* src_mask */ | |
1314 | 0x0000ffff, /* dst_mask */ | |
1315 | FALSE), /* pcrel_offset */ | |
1316 | ||
1317 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1318 | 0, /* rightshift */ | |
1319 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1320 | 16, /* bitsize */ | |
1321 | FALSE, /* pc_relative */ | |
1322 | 0, /* bitpos */ | |
1323 | complain_overflow_dont,/* complain_on_overflow */ | |
1324 | bfd_elf_generic_reloc, /* special_function */ | |
1325 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
1326 | FALSE, /* partial_inplace */ | |
1327 | 0x040f70ff, /* src_mask */ | |
1328 | 0x040f70ff, /* dst_mask */ | |
1329 | FALSE), /* pcrel_offset */ | |
1330 | ||
1331 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1332 | 0, /* rightshift */ | |
1333 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1334 | 16, /* bitsize */ | |
1335 | FALSE, /* pc_relative */ | |
1336 | 0, /* bitpos */ | |
1337 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1338 | bfd_elf_generic_reloc, /* special_function */ | |
1339 | "R_ARM_THM_MOVT_BREL", /* name */ | |
1340 | FALSE, /* partial_inplace */ | |
1341 | 0x040f70ff, /* src_mask */ | |
1342 | 0x040f70ff, /* dst_mask */ | |
1343 | FALSE), /* pcrel_offset */ | |
1344 | ||
1345 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1346 | 0, /* rightshift */ | |
1347 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1348 | 16, /* bitsize */ | |
1349 | FALSE, /* pc_relative */ | |
1350 | 0, /* bitpos */ | |
1351 | complain_overflow_dont,/* complain_on_overflow */ | |
1352 | bfd_elf_generic_reloc, /* special_function */ | |
1353 | "R_ARM_THM_MOVW_BREL", /* name */ | |
1354 | FALSE, /* partial_inplace */ | |
1355 | 0x040f70ff, /* src_mask */ | |
1356 | 0x040f70ff, /* dst_mask */ | |
1357 | FALSE), /* pcrel_offset */ | |
1358 | ||
0855e32b NS |
1359 | HOWTO (R_ARM_TLS_GOTDESC, /* type */ |
1360 | 0, /* rightshift */ | |
1361 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1362 | 32, /* bitsize */ | |
1363 | FALSE, /* pc_relative */ | |
1364 | 0, /* bitpos */ | |
1365 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1366 | NULL, /* special_function */ | |
1367 | "R_ARM_TLS_GOTDESC", /* name */ | |
1368 | TRUE, /* partial_inplace */ | |
1369 | 0xffffffff, /* src_mask */ | |
1370 | 0xffffffff, /* dst_mask */ | |
1371 | FALSE), /* pcrel_offset */ | |
1372 | ||
1373 | HOWTO (R_ARM_TLS_CALL, /* type */ | |
1374 | 0, /* rightshift */ | |
1375 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1376 | 24, /* bitsize */ | |
1377 | FALSE, /* pc_relative */ | |
1378 | 0, /* bitpos */ | |
1379 | complain_overflow_dont,/* complain_on_overflow */ | |
1380 | bfd_elf_generic_reloc, /* special_function */ | |
1381 | "R_ARM_TLS_CALL", /* name */ | |
1382 | FALSE, /* partial_inplace */ | |
1383 | 0x00ffffff, /* src_mask */ | |
1384 | 0x00ffffff, /* dst_mask */ | |
1385 | FALSE), /* pcrel_offset */ | |
1386 | ||
1387 | HOWTO (R_ARM_TLS_DESCSEQ, /* type */ | |
1388 | 0, /* rightshift */ | |
1389 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1390 | 0, /* bitsize */ | |
1391 | FALSE, /* pc_relative */ | |
1392 | 0, /* bitpos */ | |
1393 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1394 | bfd_elf_generic_reloc, /* special_function */ | |
1395 | "R_ARM_TLS_DESCSEQ", /* name */ | |
1396 | FALSE, /* partial_inplace */ | |
1397 | 0x00000000, /* src_mask */ | |
1398 | 0x00000000, /* dst_mask */ | |
1399 | FALSE), /* pcrel_offset */ | |
1400 | ||
1401 | HOWTO (R_ARM_THM_TLS_CALL, /* type */ | |
1402 | 0, /* rightshift */ | |
1403 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1404 | 24, /* bitsize */ | |
1405 | FALSE, /* pc_relative */ | |
1406 | 0, /* bitpos */ | |
1407 | complain_overflow_dont,/* complain_on_overflow */ | |
1408 | bfd_elf_generic_reloc, /* special_function */ | |
1409 | "R_ARM_THM_TLS_CALL", /* name */ | |
1410 | FALSE, /* partial_inplace */ | |
1411 | 0x07ff07ff, /* src_mask */ | |
1412 | 0x07ff07ff, /* dst_mask */ | |
1413 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1414 | |
1415 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1416 | 0, /* rightshift */ | |
1417 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1418 | 32, /* bitsize */ | |
1419 | FALSE, /* pc_relative */ | |
1420 | 0, /* bitpos */ | |
1421 | complain_overflow_dont,/* complain_on_overflow */ | |
1422 | bfd_elf_generic_reloc, /* special_function */ | |
1423 | "R_ARM_PLT32_ABS", /* name */ | |
1424 | FALSE, /* partial_inplace */ | |
1425 | 0xffffffff, /* src_mask */ | |
1426 | 0xffffffff, /* dst_mask */ | |
1427 | FALSE), /* pcrel_offset */ | |
1428 | ||
1429 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1430 | 0, /* rightshift */ | |
1431 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1432 | 32, /* bitsize */ | |
1433 | FALSE, /* pc_relative */ | |
1434 | 0, /* bitpos */ | |
1435 | complain_overflow_dont,/* complain_on_overflow */ | |
1436 | bfd_elf_generic_reloc, /* special_function */ | |
1437 | "R_ARM_GOT_ABS", /* name */ | |
1438 | FALSE, /* partial_inplace */ | |
1439 | 0xffffffff, /* src_mask */ | |
1440 | 0xffffffff, /* dst_mask */ | |
1441 | FALSE), /* pcrel_offset */ | |
1442 | ||
1443 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1444 | 0, /* rightshift */ | |
1445 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1446 | 32, /* bitsize */ | |
1447 | TRUE, /* pc_relative */ | |
1448 | 0, /* bitpos */ | |
1449 | complain_overflow_dont, /* complain_on_overflow */ | |
1450 | bfd_elf_generic_reloc, /* special_function */ | |
1451 | "R_ARM_GOT_PREL", /* name */ | |
1452 | FALSE, /* partial_inplace */ | |
1453 | 0xffffffff, /* src_mask */ | |
1454 | 0xffffffff, /* dst_mask */ | |
1455 | TRUE), /* pcrel_offset */ | |
1456 | ||
1457 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1458 | 0, /* rightshift */ | |
1459 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1460 | 12, /* bitsize */ | |
1461 | FALSE, /* pc_relative */ | |
1462 | 0, /* bitpos */ | |
1463 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1464 | bfd_elf_generic_reloc, /* special_function */ | |
1465 | "R_ARM_GOT_BREL12", /* name */ | |
1466 | FALSE, /* partial_inplace */ | |
1467 | 0x00000fff, /* src_mask */ | |
1468 | 0x00000fff, /* dst_mask */ | |
1469 | FALSE), /* pcrel_offset */ | |
1470 | ||
1471 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1472 | 0, /* rightshift */ | |
1473 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1474 | 12, /* bitsize */ | |
1475 | FALSE, /* pc_relative */ | |
1476 | 0, /* bitpos */ | |
1477 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1478 | bfd_elf_generic_reloc, /* special_function */ | |
1479 | "R_ARM_GOTOFF12", /* name */ | |
1480 | FALSE, /* partial_inplace */ | |
1481 | 0x00000fff, /* src_mask */ | |
1482 | 0x00000fff, /* dst_mask */ | |
1483 | FALSE), /* pcrel_offset */ | |
1484 | ||
1485 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ | |
1486 | ||
1487 | /* GNU extension to record C++ vtable member usage */ | |
1488 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ | |
99059e56 RM |
1489 | 0, /* rightshift */ |
1490 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1491 | 0, /* bitsize */ | |
1492 | FALSE, /* pc_relative */ | |
1493 | 0, /* bitpos */ | |
1494 | complain_overflow_dont, /* complain_on_overflow */ | |
1495 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
1496 | "R_ARM_GNU_VTENTRY", /* name */ | |
1497 | FALSE, /* partial_inplace */ | |
1498 | 0, /* src_mask */ | |
1499 | 0, /* dst_mask */ | |
1500 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1501 | |
1502 | /* GNU extension to record C++ vtable hierarchy */ | |
1503 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
99059e56 RM |
1504 | 0, /* rightshift */ |
1505 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1506 | 0, /* bitsize */ | |
1507 | FALSE, /* pc_relative */ | |
1508 | 0, /* bitpos */ | |
1509 | complain_overflow_dont, /* complain_on_overflow */ | |
1510 | NULL, /* special_function */ | |
1511 | "R_ARM_GNU_VTINHERIT", /* name */ | |
1512 | FALSE, /* partial_inplace */ | |
1513 | 0, /* src_mask */ | |
1514 | 0, /* dst_mask */ | |
1515 | FALSE), /* pcrel_offset */ | |
c19d1205 ZW |
1516 | |
1517 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1518 | 1, /* rightshift */ | |
1519 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1520 | 11, /* bitsize */ | |
1521 | TRUE, /* pc_relative */ | |
1522 | 0, /* bitpos */ | |
1523 | complain_overflow_signed, /* complain_on_overflow */ | |
1524 | bfd_elf_generic_reloc, /* special_function */ | |
1525 | "R_ARM_THM_JUMP11", /* name */ | |
1526 | FALSE, /* partial_inplace */ | |
1527 | 0x000007ff, /* src_mask */ | |
1528 | 0x000007ff, /* dst_mask */ | |
1529 | TRUE), /* pcrel_offset */ | |
1530 | ||
1531 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1532 | 1, /* rightshift */ | |
1533 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1534 | 8, /* bitsize */ | |
1535 | TRUE, /* pc_relative */ | |
1536 | 0, /* bitpos */ | |
1537 | complain_overflow_signed, /* complain_on_overflow */ | |
1538 | bfd_elf_generic_reloc, /* special_function */ | |
1539 | "R_ARM_THM_JUMP8", /* name */ | |
1540 | FALSE, /* partial_inplace */ | |
1541 | 0x000000ff, /* src_mask */ | |
1542 | 0x000000ff, /* dst_mask */ | |
1543 | TRUE), /* pcrel_offset */ | |
ba93b8ac | 1544 | |
c19d1205 ZW |
1545 | /* TLS relocations */ |
1546 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
99059e56 RM |
1547 | 0, /* rightshift */ |
1548 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1549 | 32, /* bitsize */ | |
1550 | FALSE, /* pc_relative */ | |
1551 | 0, /* bitpos */ | |
1552 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1553 | NULL, /* special_function */ | |
1554 | "R_ARM_TLS_GD32", /* name */ | |
1555 | TRUE, /* partial_inplace */ | |
1556 | 0xffffffff, /* src_mask */ | |
1557 | 0xffffffff, /* dst_mask */ | |
1558 | FALSE), /* pcrel_offset */ | |
ba93b8ac | 1559 | |
ba93b8ac | 1560 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
99059e56 RM |
1561 | 0, /* rightshift */ |
1562 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1563 | 32, /* bitsize */ | |
1564 | FALSE, /* pc_relative */ | |
1565 | 0, /* bitpos */ | |
1566 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1567 | bfd_elf_generic_reloc, /* special_function */ | |
1568 | "R_ARM_TLS_LDM32", /* name */ | |
1569 | TRUE, /* partial_inplace */ | |
1570 | 0xffffffff, /* src_mask */ | |
1571 | 0xffffffff, /* dst_mask */ | |
1572 | FALSE), /* pcrel_offset */ | |
ba93b8ac | 1573 | |
c19d1205 | 1574 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
99059e56 RM |
1575 | 0, /* rightshift */ |
1576 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1577 | 32, /* bitsize */ | |
1578 | FALSE, /* pc_relative */ | |
1579 | 0, /* bitpos */ | |
1580 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1581 | bfd_elf_generic_reloc, /* special_function */ | |
1582 | "R_ARM_TLS_LDO32", /* name */ | |
1583 | TRUE, /* partial_inplace */ | |
1584 | 0xffffffff, /* src_mask */ | |
1585 | 0xffffffff, /* dst_mask */ | |
1586 | FALSE), /* pcrel_offset */ | |
ba93b8ac | 1587 | |
ba93b8ac | 1588 | HOWTO (R_ARM_TLS_IE32, /* type */ |
99059e56 RM |
1589 | 0, /* rightshift */ |
1590 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1591 | 32, /* bitsize */ | |
1592 | FALSE, /* pc_relative */ | |
1593 | 0, /* bitpos */ | |
1594 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1595 | NULL, /* special_function */ | |
1596 | "R_ARM_TLS_IE32", /* name */ | |
1597 | TRUE, /* partial_inplace */ | |
1598 | 0xffffffff, /* src_mask */ | |
1599 | 0xffffffff, /* dst_mask */ | |
1600 | FALSE), /* pcrel_offset */ | |
7f266840 | 1601 | |
c19d1205 | 1602 | HOWTO (R_ARM_TLS_LE32, /* type */ |
99059e56 RM |
1603 | 0, /* rightshift */ |
1604 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1605 | 32, /* bitsize */ | |
1606 | FALSE, /* pc_relative */ | |
1607 | 0, /* bitpos */ | |
1608 | complain_overflow_bitfield,/* complain_on_overflow */ | |
75c11999 | 1609 | NULL, /* special_function */ |
99059e56 RM |
1610 | "R_ARM_TLS_LE32", /* name */ |
1611 | TRUE, /* partial_inplace */ | |
1612 | 0xffffffff, /* src_mask */ | |
1613 | 0xffffffff, /* dst_mask */ | |
1614 | FALSE), /* pcrel_offset */ | |
7f266840 | 1615 | |
c19d1205 ZW |
1616 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1617 | 0, /* rightshift */ | |
1618 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1619 | 12, /* bitsize */ | |
1620 | FALSE, /* pc_relative */ | |
7f266840 | 1621 | 0, /* bitpos */ |
c19d1205 | 1622 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1623 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1624 | "R_ARM_TLS_LDO12", /* name */ |
7f266840 | 1625 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1626 | 0x00000fff, /* src_mask */ |
1627 | 0x00000fff, /* dst_mask */ | |
1628 | FALSE), /* pcrel_offset */ | |
7f266840 | 1629 | |
c19d1205 ZW |
1630 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1631 | 0, /* rightshift */ | |
1632 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1633 | 12, /* bitsize */ | |
1634 | FALSE, /* pc_relative */ | |
7f266840 | 1635 | 0, /* bitpos */ |
c19d1205 | 1636 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1637 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1638 | "R_ARM_TLS_LE12", /* name */ |
7f266840 | 1639 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1640 | 0x00000fff, /* src_mask */ |
1641 | 0x00000fff, /* dst_mask */ | |
1642 | FALSE), /* pcrel_offset */ | |
7f266840 | 1643 | |
c19d1205 | 1644 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 DJ |
1645 | 0, /* rightshift */ |
1646 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
1647 | 12, /* bitsize */ |
1648 | FALSE, /* pc_relative */ | |
7f266840 | 1649 | 0, /* bitpos */ |
c19d1205 | 1650 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1651 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1652 | "R_ARM_TLS_IE12GP", /* name */ |
7f266840 | 1653 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1654 | 0x00000fff, /* src_mask */ |
1655 | 0x00000fff, /* dst_mask */ | |
1656 | FALSE), /* pcrel_offset */ | |
0855e32b | 1657 | |
34e77a92 | 1658 | /* 112-127 private relocations. */ |
0855e32b NS |
1659 | EMPTY_HOWTO (112), |
1660 | EMPTY_HOWTO (113), | |
1661 | EMPTY_HOWTO (114), | |
1662 | EMPTY_HOWTO (115), | |
1663 | EMPTY_HOWTO (116), | |
1664 | EMPTY_HOWTO (117), | |
1665 | EMPTY_HOWTO (118), | |
1666 | EMPTY_HOWTO (119), | |
1667 | EMPTY_HOWTO (120), | |
1668 | EMPTY_HOWTO (121), | |
1669 | EMPTY_HOWTO (122), | |
1670 | EMPTY_HOWTO (123), | |
1671 | EMPTY_HOWTO (124), | |
1672 | EMPTY_HOWTO (125), | |
1673 | EMPTY_HOWTO (126), | |
1674 | EMPTY_HOWTO (127), | |
34e77a92 RS |
1675 | |
1676 | /* R_ARM_ME_TOO, obsolete. */ | |
0855e32b NS |
1677 | EMPTY_HOWTO (128), |
1678 | ||
1679 | HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */ | |
1680 | 0, /* rightshift */ | |
1681 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1682 | 0, /* bitsize */ | |
1683 | FALSE, /* pc_relative */ | |
1684 | 0, /* bitpos */ | |
1685 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1686 | bfd_elf_generic_reloc, /* special_function */ | |
1687 | "R_ARM_THM_TLS_DESCSEQ",/* name */ | |
1688 | FALSE, /* partial_inplace */ | |
1689 | 0x00000000, /* src_mask */ | |
1690 | 0x00000000, /* dst_mask */ | |
1691 | FALSE), /* pcrel_offset */ | |
72d98d16 MG |
1692 | EMPTY_HOWTO (130), |
1693 | EMPTY_HOWTO (131), | |
1694 | HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */ | |
1695 | 0, /* rightshift. */ | |
1696 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1697 | 16, /* bitsize. */ | |
1698 | FALSE, /* pc_relative. */ | |
1699 | 0, /* bitpos. */ | |
1700 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1701 | bfd_elf_generic_reloc, /* special_function. */ | |
1702 | "R_ARM_THM_ALU_ABS_G0_NC",/* name. */ | |
1703 | FALSE, /* partial_inplace. */ | |
1704 | 0x00000000, /* src_mask. */ | |
1705 | 0x00000000, /* dst_mask. */ | |
1706 | FALSE), /* pcrel_offset. */ | |
1707 | HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */ | |
1708 | 0, /* rightshift. */ | |
1709 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1710 | 16, /* bitsize. */ | |
1711 | FALSE, /* pc_relative. */ | |
1712 | 0, /* bitpos. */ | |
1713 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1714 | bfd_elf_generic_reloc, /* special_function. */ | |
1715 | "R_ARM_THM_ALU_ABS_G1_NC",/* name. */ | |
1716 | FALSE, /* partial_inplace. */ | |
1717 | 0x00000000, /* src_mask. */ | |
1718 | 0x00000000, /* dst_mask. */ | |
1719 | FALSE), /* pcrel_offset. */ | |
1720 | HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */ | |
1721 | 0, /* rightshift. */ | |
1722 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1723 | 16, /* bitsize. */ | |
1724 | FALSE, /* pc_relative. */ | |
1725 | 0, /* bitpos. */ | |
1726 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1727 | bfd_elf_generic_reloc, /* special_function. */ | |
1728 | "R_ARM_THM_ALU_ABS_G2_NC",/* name. */ | |
1729 | FALSE, /* partial_inplace. */ | |
1730 | 0x00000000, /* src_mask. */ | |
1731 | 0x00000000, /* dst_mask. */ | |
1732 | FALSE), /* pcrel_offset. */ | |
1733 | HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */ | |
1734 | 0, /* rightshift. */ | |
1735 | 1, /* size (0 = byte, 1 = short, 2 = long). */ | |
1736 | 16, /* bitsize. */ | |
1737 | FALSE, /* pc_relative. */ | |
1738 | 0, /* bitpos. */ | |
1739 | complain_overflow_bitfield,/* complain_on_overflow. */ | |
1740 | bfd_elf_generic_reloc, /* special_function. */ | |
1741 | "R_ARM_THM_ALU_ABS_G3_NC",/* name. */ | |
1742 | FALSE, /* partial_inplace. */ | |
1743 | 0x00000000, /* src_mask. */ | |
1744 | 0x00000000, /* dst_mask. */ | |
1745 | FALSE), /* pcrel_offset. */ | |
c19d1205 ZW |
1746 | }; |
1747 | ||
34e77a92 RS |
1748 | /* 160 onwards: */ |
1749 | static reloc_howto_type elf32_arm_howto_table_2[1] = | |
1750 | { | |
1751 | HOWTO (R_ARM_IRELATIVE, /* type */ | |
99059e56 RM |
1752 | 0, /* rightshift */ |
1753 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1754 | 32, /* bitsize */ | |
1755 | FALSE, /* pc_relative */ | |
1756 | 0, /* bitpos */ | |
1757 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1758 | bfd_elf_generic_reloc, /* special_function */ | |
1759 | "R_ARM_IRELATIVE", /* name */ | |
1760 | TRUE, /* partial_inplace */ | |
1761 | 0xffffffff, /* src_mask */ | |
1762 | 0xffffffff, /* dst_mask */ | |
1763 | FALSE) /* pcrel_offset */ | |
34e77a92 | 1764 | }; |
c19d1205 | 1765 | |
34e77a92 RS |
1766 | /* 249-255 extended, currently unused, relocations: */ |
1767 | static reloc_howto_type elf32_arm_howto_table_3[4] = | |
7f266840 DJ |
1768 | { |
1769 | HOWTO (R_ARM_RREL32, /* type */ | |
1770 | 0, /* rightshift */ | |
1771 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1772 | 0, /* bitsize */ | |
1773 | FALSE, /* pc_relative */ | |
1774 | 0, /* bitpos */ | |
1775 | complain_overflow_dont,/* complain_on_overflow */ | |
1776 | bfd_elf_generic_reloc, /* special_function */ | |
1777 | "R_ARM_RREL32", /* name */ | |
1778 | FALSE, /* partial_inplace */ | |
1779 | 0, /* src_mask */ | |
1780 | 0, /* dst_mask */ | |
1781 | FALSE), /* pcrel_offset */ | |
1782 | ||
1783 | HOWTO (R_ARM_RABS32, /* type */ | |
1784 | 0, /* rightshift */ | |
1785 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1786 | 0, /* bitsize */ | |
1787 | FALSE, /* pc_relative */ | |
1788 | 0, /* bitpos */ | |
1789 | complain_overflow_dont,/* complain_on_overflow */ | |
1790 | bfd_elf_generic_reloc, /* special_function */ | |
1791 | "R_ARM_RABS32", /* name */ | |
1792 | FALSE, /* partial_inplace */ | |
1793 | 0, /* src_mask */ | |
1794 | 0, /* dst_mask */ | |
1795 | FALSE), /* pcrel_offset */ | |
1796 | ||
1797 | HOWTO (R_ARM_RPC24, /* type */ | |
1798 | 0, /* rightshift */ | |
1799 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1800 | 0, /* bitsize */ | |
1801 | FALSE, /* pc_relative */ | |
1802 | 0, /* bitpos */ | |
1803 | complain_overflow_dont,/* complain_on_overflow */ | |
1804 | bfd_elf_generic_reloc, /* special_function */ | |
1805 | "R_ARM_RPC24", /* name */ | |
1806 | FALSE, /* partial_inplace */ | |
1807 | 0, /* src_mask */ | |
1808 | 0, /* dst_mask */ | |
1809 | FALSE), /* pcrel_offset */ | |
1810 | ||
1811 | HOWTO (R_ARM_RBASE, /* type */ | |
1812 | 0, /* rightshift */ | |
1813 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1814 | 0, /* bitsize */ | |
1815 | FALSE, /* pc_relative */ | |
1816 | 0, /* bitpos */ | |
1817 | complain_overflow_dont,/* complain_on_overflow */ | |
1818 | bfd_elf_generic_reloc, /* special_function */ | |
1819 | "R_ARM_RBASE", /* name */ | |
1820 | FALSE, /* partial_inplace */ | |
1821 | 0, /* src_mask */ | |
1822 | 0, /* dst_mask */ | |
1823 | FALSE) /* pcrel_offset */ | |
1824 | }; | |
1825 | ||
1826 | static reloc_howto_type * | |
1827 | elf32_arm_howto_from_type (unsigned int r_type) | |
1828 | { | |
906e58ca | 1829 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1830 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1831 | |
34e77a92 RS |
1832 | if (r_type == R_ARM_IRELATIVE) |
1833 | return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE]; | |
1834 | ||
c19d1205 | 1835 | if (r_type >= R_ARM_RREL32 |
34e77a92 RS |
1836 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3)) |
1837 | return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32]; | |
7f266840 | 1838 | |
c19d1205 | 1839 | return NULL; |
7f266840 DJ |
1840 | } |
1841 | ||
1842 | static void | |
1843 | elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc, | |
1844 | Elf_Internal_Rela * elf_reloc) | |
1845 | { | |
1846 | unsigned int r_type; | |
1847 | ||
1848 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
1849 | bfd_reloc->howto = elf32_arm_howto_from_type (r_type); | |
1850 | } | |
1851 | ||
1852 | struct elf32_arm_reloc_map | |
1853 | { | |
1854 | bfd_reloc_code_real_type bfd_reloc_val; | |
1855 | unsigned char elf_reloc_val; | |
1856 | }; | |
1857 | ||
1858 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
1859 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
1860 | { | |
1861 | {BFD_RELOC_NONE, R_ARM_NONE}, | |
1862 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, | |
39b41c9c PB |
1863 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
1864 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
7f266840 DJ |
1865 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
1866 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
1867 | {BFD_RELOC_32, R_ARM_ABS32}, | |
1868 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
1869 | {BFD_RELOC_8, R_ARM_ABS8}, | |
1870 | {BFD_RELOC_16, R_ARM_ABS16}, | |
1871 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
1872 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, | |
c19d1205 ZW |
1873 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
1874 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
1875 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
1876 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
1877 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
1878 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
7f266840 DJ |
1879 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
1880 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
1881 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
c19d1205 | 1882 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, |
7f266840 | 1883 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, |
b43420e6 | 1884 | {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, |
7f266840 DJ |
1885 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, |
1886 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
1887 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, | |
1888 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
1889 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
1890 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac DJ |
1891 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
1892 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
0855e32b NS |
1893 | {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC}, |
1894 | {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL}, | |
1895 | {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL}, | |
1896 | {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ}, | |
1897 | {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ}, | |
1898 | {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC}, | |
ba93b8ac DJ |
1899 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, |
1900 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
1901 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
1902 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
1903 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
1904 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, | |
1905 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
1906 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
34e77a92 | 1907 | {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE}, |
c19d1205 ZW |
1908 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
1909 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
1910 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
1911 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
1912 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
1913 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
1914 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
1915 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
1916 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
1917 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
1918 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
1919 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
1920 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
1921 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
1922 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
1923 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
1924 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
1925 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
1926 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
1927 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
1928 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
1929 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
1930 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
1931 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
1932 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
1933 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
1934 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
1935 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
1936 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
1937 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
1938 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
1939 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
1940 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
1941 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
1942 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
1943 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
1944 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 | 1945 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
72d98d16 MG |
1946 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}, |
1947 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC}, | |
1948 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC}, | |
1949 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC}, | |
1950 | {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC} | |
7f266840 DJ |
1951 | }; |
1952 | ||
1953 | static reloc_howto_type * | |
f1c71a59 ZW |
1954 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
1955 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
1956 | { |
1957 | unsigned int i; | |
8029a119 | 1958 | |
906e58ca | 1959 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
1960 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
1961 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 1962 | |
c19d1205 | 1963 | return NULL; |
7f266840 DJ |
1964 | } |
1965 | ||
157090f7 AM |
1966 | static reloc_howto_type * |
1967 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1968 | const char *r_name) | |
1969 | { | |
1970 | unsigned int i; | |
1971 | ||
906e58ca | 1972 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
1973 | if (elf32_arm_howto_table_1[i].name != NULL |
1974 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
1975 | return &elf32_arm_howto_table_1[i]; | |
1976 | ||
906e58ca | 1977 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
1978 | if (elf32_arm_howto_table_2[i].name != NULL |
1979 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
1980 | return &elf32_arm_howto_table_2[i]; | |
1981 | ||
34e77a92 RS |
1982 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++) |
1983 | if (elf32_arm_howto_table_3[i].name != NULL | |
1984 | && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0) | |
1985 | return &elf32_arm_howto_table_3[i]; | |
1986 | ||
157090f7 AM |
1987 | return NULL; |
1988 | } | |
1989 | ||
906e58ca NC |
1990 | /* Support for core dump NOTE sections. */ |
1991 | ||
7f266840 | 1992 | static bfd_boolean |
f1c71a59 | 1993 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1994 | { |
1995 | int offset; | |
1996 | size_t size; | |
1997 | ||
1998 | switch (note->descsz) | |
1999 | { | |
2000 | default: | |
2001 | return FALSE; | |
2002 | ||
8029a119 | 2003 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 | 2004 | /* pr_cursig */ |
228e534f | 2005 | elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); |
7f266840 DJ |
2006 | |
2007 | /* pr_pid */ | |
228e534f | 2008 | elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24); |
7f266840 DJ |
2009 | |
2010 | /* pr_reg */ | |
2011 | offset = 72; | |
2012 | size = 72; | |
2013 | ||
2014 | break; | |
2015 | } | |
2016 | ||
2017 | /* Make a ".reg/999" section. */ | |
2018 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
2019 | size, note->descpos + offset); | |
2020 | } | |
2021 | ||
2022 | static bfd_boolean | |
f1c71a59 | 2023 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
2024 | { |
2025 | switch (note->descsz) | |
2026 | { | |
2027 | default: | |
2028 | return FALSE; | |
2029 | ||
8029a119 | 2030 | case 124: /* Linux/ARM elf_prpsinfo. */ |
228e534f | 2031 | elf_tdata (abfd)->core->pid |
4395ee08 | 2032 | = bfd_get_32 (abfd, note->descdata + 12); |
228e534f | 2033 | elf_tdata (abfd)->core->program |
7f266840 | 2034 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); |
228e534f | 2035 | elf_tdata (abfd)->core->command |
7f266840 DJ |
2036 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); |
2037 | } | |
2038 | ||
2039 | /* Note that for some reason, a spurious space is tacked | |
2040 | onto the end of the args in some (at least one anyway) | |
2041 | implementations, so strip it off if it exists. */ | |
7f266840 | 2042 | { |
228e534f | 2043 | char *command = elf_tdata (abfd)->core->command; |
7f266840 DJ |
2044 | int n = strlen (command); |
2045 | ||
2046 | if (0 < n && command[n - 1] == ' ') | |
2047 | command[n - 1] = '\0'; | |
2048 | } | |
2049 | ||
2050 | return TRUE; | |
2051 | } | |
2052 | ||
1f20dca5 UW |
2053 | static char * |
2054 | elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz, | |
2055 | int note_type, ...) | |
2056 | { | |
2057 | switch (note_type) | |
2058 | { | |
2059 | default: | |
2060 | return NULL; | |
2061 | ||
2062 | case NT_PRPSINFO: | |
2063 | { | |
2064 | char data[124]; | |
2065 | va_list ap; | |
2066 | ||
2067 | va_start (ap, note_type); | |
2068 | memset (data, 0, sizeof (data)); | |
2069 | strncpy (data + 28, va_arg (ap, const char *), 16); | |
2070 | strncpy (data + 44, va_arg (ap, const char *), 80); | |
2071 | va_end (ap); | |
2072 | ||
2073 | return elfcore_write_note (abfd, buf, bufsiz, | |
2074 | "CORE", note_type, data, sizeof (data)); | |
2075 | } | |
2076 | ||
2077 | case NT_PRSTATUS: | |
2078 | { | |
2079 | char data[148]; | |
2080 | va_list ap; | |
2081 | long pid; | |
2082 | int cursig; | |
2083 | const void *greg; | |
2084 | ||
2085 | va_start (ap, note_type); | |
2086 | memset (data, 0, sizeof (data)); | |
2087 | pid = va_arg (ap, long); | |
2088 | bfd_put_32 (abfd, pid, data + 24); | |
2089 | cursig = va_arg (ap, int); | |
2090 | bfd_put_16 (abfd, cursig, data + 12); | |
2091 | greg = va_arg (ap, const void *); | |
2092 | memcpy (data + 72, greg, 72); | |
2093 | va_end (ap); | |
2094 | ||
2095 | return elfcore_write_note (abfd, buf, bufsiz, | |
2096 | "CORE", note_type, data, sizeof (data)); | |
2097 | } | |
2098 | } | |
2099 | } | |
2100 | ||
6d00b590 | 2101 | #define TARGET_LITTLE_SYM arm_elf32_le_vec |
7f266840 | 2102 | #define TARGET_LITTLE_NAME "elf32-littlearm" |
6d00b590 | 2103 | #define TARGET_BIG_SYM arm_elf32_be_vec |
7f266840 DJ |
2104 | #define TARGET_BIG_NAME "elf32-bigarm" |
2105 | ||
2106 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
2107 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1f20dca5 | 2108 | #define elf_backend_write_core_note elf32_arm_nabi_write_core_note |
7f266840 | 2109 | |
252b5132 RH |
2110 | typedef unsigned long int insn32; |
2111 | typedef unsigned short int insn16; | |
2112 | ||
3a4a14e9 PB |
2113 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
2114 | interworkable. */ | |
57e8b36a | 2115 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 2116 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
2117 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
2118 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 2119 | |
252b5132 RH |
2120 | /* The linker script knows the section names for placement. |
2121 | The entry_names are used to do simple name mangling on the stubs. | |
2122 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 2123 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
2124 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
2125 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
2126 | ||
2127 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
2128 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
2129 | ||
c7b8f16e JB |
2130 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
2131 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
2132 | ||
a504d23a LA |
2133 | #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer" |
2134 | #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x" | |
2135 | ||
845b51d6 PB |
2136 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
2137 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
2138 | ||
7413f23f DJ |
2139 | #define STUB_ENTRY_NAME "__%s_veneer" |
2140 | ||
4ba2ef8f TP |
2141 | #define CMSE_PREFIX "__acle_se_" |
2142 | ||
252b5132 RH |
2143 | /* The name of the dynamic interpreter. This is put in the .interp |
2144 | section. */ | |
2145 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
2146 | ||
0855e32b | 2147 | static const unsigned long tls_trampoline [] = |
b38cadfb NC |
2148 | { |
2149 | 0xe08e0000, /* add r0, lr, r0 */ | |
2150 | 0xe5901004, /* ldr r1, [r0,#4] */ | |
2151 | 0xe12fff11, /* bx r1 */ | |
2152 | }; | |
0855e32b NS |
2153 | |
2154 | static const unsigned long dl_tlsdesc_lazy_trampoline [] = | |
b38cadfb NC |
2155 | { |
2156 | 0xe52d2004, /* push {r2} */ | |
2157 | 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */ | |
2158 | 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */ | |
2159 | 0xe79f2002, /* 1: ldr r2, [pc, r2] */ | |
2160 | 0xe081100f, /* 2: add r1, pc */ | |
2161 | 0xe12fff12, /* bx r2 */ | |
2162 | 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8 | |
99059e56 | 2163 | + dl_tlsdesc_lazy_resolver(GOT) */ |
b38cadfb NC |
2164 | 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ |
2165 | }; | |
0855e32b | 2166 | |
5e681ec4 PB |
2167 | #ifdef FOUR_WORD_PLT |
2168 | ||
252b5132 RH |
2169 | /* The first entry in a procedure linkage table looks like |
2170 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 2171 | called before the relocation has been set up calls the dynamic |
9b485d32 | 2172 | linker first. */ |
e5a52504 | 2173 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2174 | { |
2175 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2176 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
2177 | 0xe08fe00e, /* add lr, pc, lr */ | |
2178 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2179 | }; | |
5e681ec4 PB |
2180 | |
2181 | /* Subsequent entries in a procedure linkage table look like | |
2182 | this. */ | |
e5a52504 | 2183 | static const bfd_vma elf32_arm_plt_entry [] = |
b38cadfb NC |
2184 | { |
2185 | 0xe28fc600, /* add ip, pc, #NN */ | |
2186 | 0xe28cca00, /* add ip, ip, #NN */ | |
2187 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
2188 | 0x00000000, /* unused */ | |
2189 | }; | |
5e681ec4 | 2190 | |
eed94f8f | 2191 | #else /* not FOUR_WORD_PLT */ |
5e681ec4 | 2192 | |
5e681ec4 PB |
2193 | /* The first entry in a procedure linkage table looks like |
2194 | this. It is set up so that any shared library function that is | |
2195 | called before the relocation has been set up calls the dynamic | |
2196 | linker first. */ | |
e5a52504 | 2197 | static const bfd_vma elf32_arm_plt0_entry [] = |
b38cadfb NC |
2198 | { |
2199 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
2200 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
2201 | 0xe08fe00e, /* add lr, pc, lr */ | |
2202 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
2203 | 0x00000000, /* &GOT[0] - . */ | |
2204 | }; | |
252b5132 | 2205 | |
1db37fe6 YG |
2206 | /* By default subsequent entries in a procedure linkage table look like |
2207 | this. Offsets that don't fit into 28 bits will cause link error. */ | |
2208 | static const bfd_vma elf32_arm_plt_entry_short [] = | |
b38cadfb NC |
2209 | { |
2210 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
2211 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2212 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2213 | }; | |
5e681ec4 | 2214 | |
1db37fe6 YG |
2215 | /* When explicitly asked, we'll use this "long" entry format |
2216 | which can cope with arbitrary displacements. */ | |
2217 | static const bfd_vma elf32_arm_plt_entry_long [] = | |
2218 | { | |
2219 | 0xe28fc200, /* add ip, pc, #0xN0000000 */ | |
2220 | 0xe28cc600, /* add ip, ip, #0xNN00000 */ | |
2221 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
2222 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
2223 | }; | |
2224 | ||
2225 | static bfd_boolean elf32_arm_use_long_plt_entry = FALSE; | |
2226 | ||
eed94f8f NC |
2227 | #endif /* not FOUR_WORD_PLT */ |
2228 | ||
2229 | /* The first entry in a procedure linkage table looks like this. | |
2230 | It is set up so that any shared library function that is called before the | |
2231 | relocation has been set up calls the dynamic linker first. */ | |
2232 | static const bfd_vma elf32_thumb2_plt0_entry [] = | |
2233 | { | |
2234 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2235 | an instruction maybe encoded to one or two array elements. */ | |
2236 | 0xf8dfb500, /* push {lr} */ | |
2237 | 0x44fee008, /* ldr.w lr, [pc, #8] */ | |
469a3493 | 2238 | /* add lr, pc */ |
eed94f8f NC |
2239 | 0xff08f85e, /* ldr.w pc, [lr, #8]! */ |
2240 | 0x00000000, /* &GOT[0] - . */ | |
2241 | }; | |
2242 | ||
2243 | /* Subsequent entries in a procedure linkage table for thumb only target | |
2244 | look like this. */ | |
2245 | static const bfd_vma elf32_thumb2_plt_entry [] = | |
2246 | { | |
2247 | /* NOTE: As this is a mixture of 16-bit and 32-bit instructions, | |
2248 | an instruction maybe encoded to one or two array elements. */ | |
2249 | 0x0c00f240, /* movw ip, #0xNNNN */ | |
2250 | 0x0c00f2c0, /* movt ip, #0xNNNN */ | |
2251 | 0xf8dc44fc, /* add ip, pc */ | |
2252 | 0xbf00f000 /* ldr.w pc, [ip] */ | |
469a3493 | 2253 | /* nop */ |
eed94f8f | 2254 | }; |
252b5132 | 2255 | |
00a97672 RS |
2256 | /* The format of the first entry in the procedure linkage table |
2257 | for a VxWorks executable. */ | |
2258 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
b38cadfb NC |
2259 | { |
2260 | 0xe52dc008, /* str ip,[sp,#-8]! */ | |
2261 | 0xe59fc000, /* ldr ip,[pc] */ | |
2262 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
2263 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
2264 | }; | |
00a97672 RS |
2265 | |
2266 | /* The format of subsequent entries in a VxWorks executable. */ | |
2267 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
b38cadfb NC |
2268 | { |
2269 | 0xe59fc000, /* ldr ip,[pc] */ | |
2270 | 0xe59cf000, /* ldr pc,[ip] */ | |
2271 | 0x00000000, /* .long @got */ | |
2272 | 0xe59fc000, /* ldr ip,[pc] */ | |
2273 | 0xea000000, /* b _PLT */ | |
2274 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2275 | }; | |
00a97672 RS |
2276 | |
2277 | /* The format of entries in a VxWorks shared library. */ | |
2278 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
b38cadfb NC |
2279 | { |
2280 | 0xe59fc000, /* ldr ip,[pc] */ | |
2281 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
2282 | 0x00000000, /* .long @got */ | |
2283 | 0xe59fc000, /* ldr ip,[pc] */ | |
2284 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
2285 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
2286 | }; | |
00a97672 | 2287 | |
b7693d02 DJ |
2288 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
2289 | #define PLT_THUMB_STUB_SIZE 4 | |
2290 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
b38cadfb NC |
2291 | { |
2292 | 0x4778, /* bx pc */ | |
2293 | 0x46c0 /* nop */ | |
2294 | }; | |
b7693d02 | 2295 | |
e5a52504 MM |
2296 | /* The entries in a PLT when using a DLL-based target with multiple |
2297 | address spaces. */ | |
906e58ca | 2298 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
b38cadfb NC |
2299 | { |
2300 | 0xe51ff004, /* ldr pc, [pc, #-4] */ | |
2301 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ | |
2302 | }; | |
2303 | ||
2304 | /* The first entry in a procedure linkage table looks like | |
2305 | this. It is set up so that any shared library function that is | |
2306 | called before the relocation has been set up calls the dynamic | |
2307 | linker first. */ | |
2308 | static const bfd_vma elf32_arm_nacl_plt0_entry [] = | |
2309 | { | |
2310 | /* First bundle: */ | |
2311 | 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */ | |
2312 | 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */ | |
2313 | 0xe08cc00f, /* add ip, ip, pc */ | |
2314 | 0xe52dc008, /* str ip, [sp, #-8]! */ | |
2315 | /* Second bundle: */ | |
edccdf7c RM |
2316 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2317 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2318 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2319 | 0xe12fff1c, /* bx ip */ |
b38cadfb | 2320 | /* Third bundle: */ |
edccdf7c RM |
2321 | 0xe320f000, /* nop */ |
2322 | 0xe320f000, /* nop */ | |
2323 | 0xe320f000, /* nop */ | |
b38cadfb NC |
2324 | /* .Lplt_tail: */ |
2325 | 0xe50dc004, /* str ip, [sp, #-4] */ | |
2326 | /* Fourth bundle: */ | |
edccdf7c RM |
2327 | 0xe3ccc103, /* bic ip, ip, #0xc0000000 */ |
2328 | 0xe59cc000, /* ldr ip, [ip] */ | |
b38cadfb | 2329 | 0xe3ccc13f, /* bic ip, ip, #0xc000000f */ |
edccdf7c | 2330 | 0xe12fff1c, /* bx ip */ |
b38cadfb NC |
2331 | }; |
2332 | #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4) | |
2333 | ||
2334 | /* Subsequent entries in a procedure linkage table look like this. */ | |
2335 | static const bfd_vma elf32_arm_nacl_plt_entry [] = | |
2336 | { | |
2337 | 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */ | |
2338 | 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */ | |
2339 | 0xe08cc00f, /* add ip, ip, pc */ | |
2340 | 0xea000000, /* b .Lplt_tail */ | |
2341 | }; | |
e5a52504 | 2342 | |
906e58ca NC |
2343 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
2344 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) | |
2345 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) | |
2346 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) | |
2347 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) | |
2348 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) | |
c5423981 TG |
2349 | #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4) |
2350 | #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4) | |
906e58ca | 2351 | |
461a49ca | 2352 | enum stub_insn_type |
b38cadfb NC |
2353 | { |
2354 | THUMB16_TYPE = 1, | |
2355 | THUMB32_TYPE, | |
2356 | ARM_TYPE, | |
2357 | DATA_TYPE | |
2358 | }; | |
461a49ca | 2359 | |
48229727 JB |
2360 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2361 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2362 | is inserted in arm_build_one_stub(). */ | |
2363 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2364 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
d5a67c02 AV |
2365 | #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0} |
2366 | #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0} | |
48229727 JB |
2367 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} |
2368 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2369 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2370 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2371 | |
2372 | typedef struct | |
2373 | { | |
b38cadfb NC |
2374 | bfd_vma data; |
2375 | enum stub_insn_type type; | |
2376 | unsigned int r_type; | |
2377 | int reloc_addend; | |
461a49ca DJ |
2378 | } insn_sequence; |
2379 | ||
fea2b4d6 CL |
2380 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2381 | to reach the stub if necessary. */ | |
461a49ca | 2382 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
b38cadfb NC |
2383 | { |
2384 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2385 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2386 | }; | |
906e58ca | 2387 | |
fea2b4d6 CL |
2388 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2389 | available. */ | |
461a49ca | 2390 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
b38cadfb NC |
2391 | { |
2392 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2393 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2394 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2395 | }; | |
906e58ca | 2396 | |
d3626fb0 | 2397 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2398 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
b38cadfb NC |
2399 | { |
2400 | THUMB16_INSN (0xb401), /* push {r0} */ | |
2401 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2402 | THUMB16_INSN (0x4684), /* mov ip, r0 */ | |
2403 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2404 | THUMB16_INSN (0x4760), /* bx ip */ | |
2405 | THUMB16_INSN (0xbf00), /* nop */ | |
2406 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2407 | }; | |
906e58ca | 2408 | |
80c135e5 TP |
2409 | /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */ |
2410 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] = | |
2411 | { | |
2412 | THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */ | |
2413 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */ | |
2414 | }; | |
2415 | ||
d5a67c02 AV |
2416 | /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2 |
2417 | M-profile architectures. */ | |
2418 | static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] = | |
2419 | { | |
2420 | THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */ | |
2421 | THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */ | |
2422 | THUMB16_INSN (0x4760), /* bx ip */ | |
2423 | }; | |
2424 | ||
d3626fb0 CL |
2425 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2426 | allowed. */ | |
2427 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
b38cadfb NC |
2428 | { |
2429 | THUMB16_INSN (0x4778), /* bx pc */ | |
2430 | THUMB16_INSN (0x46c0), /* nop */ | |
2431 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2432 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2433 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2434 | }; | |
d3626fb0 | 2435 | |
fea2b4d6 CL |
2436 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2437 | available. */ | |
461a49ca | 2438 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
b38cadfb NC |
2439 | { |
2440 | THUMB16_INSN (0x4778), /* bx pc */ | |
2441 | THUMB16_INSN (0x46c0), /* nop */ | |
2442 | ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2443 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2444 | }; | |
906e58ca | 2445 | |
fea2b4d6 CL |
2446 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2447 | one, when the destination is close enough. */ | |
461a49ca | 2448 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
b38cadfb NC |
2449 | { |
2450 | THUMB16_INSN (0x4778), /* bx pc */ | |
2451 | THUMB16_INSN (0x46c0), /* nop */ | |
2452 | ARM_REL_INSN (0xea000000, -8), /* b (X-8) */ | |
2453 | }; | |
c820be07 | 2454 | |
cf3eccff | 2455 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2456 | blx to reach the stub if necessary. */ |
cf3eccff | 2457 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
b38cadfb NC |
2458 | { |
2459 | ARM_INSN (0xe59fc000), /* ldr ip, [pc] */ | |
2460 | ARM_INSN (0xe08ff00c), /* add pc, pc, ip */ | |
2461 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
2462 | }; | |
906e58ca | 2463 | |
cf3eccff DJ |
2464 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2465 | blx to reach the stub if necessary. We can not add into pc; | |
2466 | it is not guaranteed to mode switch (different in ARMv6 and | |
2467 | ARMv7). */ | |
2468 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
b38cadfb NC |
2469 | { |
2470 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2471 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2472 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2473 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2474 | }; | |
cf3eccff | 2475 | |
ebe24dd4 CL |
2476 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2477 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
b38cadfb NC |
2478 | { |
2479 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2480 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2481 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2482 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2483 | }; | |
ebe24dd4 CL |
2484 | |
2485 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2486 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
b38cadfb NC |
2487 | { |
2488 | THUMB16_INSN (0x4778), /* bx pc */ | |
2489 | THUMB16_INSN (0x46c0), /* nop */ | |
2490 | ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */ | |
2491 | ARM_INSN (0xe08cf00f), /* add pc, ip, pc */ | |
2492 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
2493 | }; | |
ebe24dd4 | 2494 | |
d3626fb0 CL |
2495 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2496 | architectures. */ | |
ebe24dd4 | 2497 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
b38cadfb NC |
2498 | { |
2499 | THUMB16_INSN (0xb401), /* push {r0} */ | |
2500 | THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */ | |
2501 | THUMB16_INSN (0x46fc), /* mov ip, pc */ | |
2502 | THUMB16_INSN (0x4484), /* add ip, r0 */ | |
2503 | THUMB16_INSN (0xbc01), /* pop {r0} */ | |
2504 | THUMB16_INSN (0x4760), /* bx ip */ | |
2505 | DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ | |
2506 | }; | |
ebe24dd4 | 2507 | |
d3626fb0 CL |
2508 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2509 | allowed. */ | |
2510 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
b38cadfb NC |
2511 | { |
2512 | THUMB16_INSN (0x4778), /* bx pc */ | |
2513 | THUMB16_INSN (0x46c0), /* nop */ | |
2514 | ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */ | |
2515 | ARM_INSN (0xe08fc00c), /* add ip, pc, ip */ | |
2516 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2517 | DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2518 | }; | |
d3626fb0 | 2519 | |
0855e32b NS |
2520 | /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a |
2521 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2522 | static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] = | |
2523 | { | |
b38cadfb NC |
2524 | ARM_INSN (0xe59f1000), /* ldr r1, [pc] */ |
2525 | ARM_INSN (0xe08ff001), /* add pc, pc, r1 */ | |
2526 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
0855e32b NS |
2527 | }; |
2528 | ||
2529 | /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a | |
2530 | long PIC stub. We can use r1 as a scratch -- and cannot use ip. */ | |
2531 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] = | |
2532 | { | |
b38cadfb NC |
2533 | THUMB16_INSN (0x4778), /* bx pc */ |
2534 | THUMB16_INSN (0x46c0), /* nop */ | |
2535 | ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */ | |
2536 | ARM_INSN (0xe081f00f), /* add pc, r1, pc */ | |
2537 | DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
0855e32b NS |
2538 | }; |
2539 | ||
7a89b94e NC |
2540 | /* NaCl ARM -> ARM long branch stub. */ |
2541 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] = | |
2542 | { | |
2543 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
2544 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ | |
2545 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2546 | ARM_INSN (0xe320f000), /* nop */ | |
2547 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2548 | DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2549 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2550 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2551 | }; | |
2552 | ||
2553 | /* NaCl ARM -> ARM long branch stub, PIC. */ | |
2554 | static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] = | |
2555 | { | |
2556 | ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */ | |
2557 | ARM_INSN (0xe08cc00f), /* add ip, ip, pc */ | |
2558 | ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */ | |
2559 | ARM_INSN (0xe12fff1c), /* bx ip */ | |
2560 | ARM_INSN (0xe125be70), /* bkpt 0x5be0 */ | |
2561 | DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */ | |
2562 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2563 | DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */ | |
2564 | }; | |
2565 | ||
4ba2ef8f TP |
2566 | /* Stub used for transition to secure state (aka SG veneer). */ |
2567 | static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] = | |
2568 | { | |
2569 | THUMB32_INSN (0xe97fe97f), /* sg. */ | |
2570 | THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */ | |
2571 | }; | |
2572 | ||
7a89b94e | 2573 | |
48229727 JB |
2574 | /* Cortex-A8 erratum-workaround stubs. */ |
2575 | ||
2576 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2577 | can't use a conditional branch to reach this stub). */ | |
2578 | ||
2579 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
b38cadfb NC |
2580 | { |
2581 | THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */ | |
2582 | THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */ | |
2583 | THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2584 | }; | |
48229727 JB |
2585 | |
2586 | /* Stub used for b.w and bl.w instructions. */ | |
2587 | ||
2588 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
b38cadfb NC |
2589 | { |
2590 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2591 | }; | |
48229727 JB |
2592 | |
2593 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
b38cadfb NC |
2594 | { |
2595 | THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */ | |
2596 | }; | |
48229727 JB |
2597 | |
2598 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2599 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2600 | real destination using an ARM-mode branch. */ | |
2601 | ||
2602 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
b38cadfb NC |
2603 | { |
2604 | ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */ | |
2605 | }; | |
48229727 | 2606 | |
9553db3c NC |
2607 | /* For each section group there can be a specially created linker section |
2608 | to hold the stubs for that group. The name of the stub section is based | |
2609 | upon the name of another section within that group with the suffix below | |
2610 | applied. | |
2611 | ||
2612 | PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to | |
2613 | create what appeared to be a linker stub section when it actually | |
2614 | contained user code/data. For example, consider this fragment: | |
b38cadfb | 2615 | |
9553db3c NC |
2616 | const char * stubborn_problems[] = { "np" }; |
2617 | ||
2618 | If this is compiled with "-fPIC -fdata-sections" then gcc produces a | |
2619 | section called: | |
2620 | ||
2621 | .data.rel.local.stubborn_problems | |
2622 | ||
2623 | This then causes problems in arm32_arm_build_stubs() as it triggers: | |
2624 | ||
2625 | // Ignore non-stub sections. | |
2626 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
2627 | continue; | |
2628 | ||
2629 | And so the section would be ignored instead of being processed. Hence | |
2630 | the change in definition of STUB_SUFFIX to a name that cannot be a valid | |
2631 | C identifier. */ | |
2632 | #define STUB_SUFFIX ".__stub" | |
906e58ca | 2633 | |
738a79f6 CL |
2634 | /* One entry per long/short branch stub defined above. */ |
2635 | #define DEF_STUBS \ | |
2636 | DEF_STUB(long_branch_any_any) \ | |
2637 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
2638 | DEF_STUB(long_branch_thumb_only) \ | |
2639 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
2640 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
2641 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
2642 | DEF_STUB(long_branch_any_arm_pic) \ | |
2643 | DEF_STUB(long_branch_any_thumb_pic) \ | |
2644 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
2645 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
2646 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
48229727 | 2647 | DEF_STUB(long_branch_thumb_only_pic) \ |
0855e32b NS |
2648 | DEF_STUB(long_branch_any_tls_pic) \ |
2649 | DEF_STUB(long_branch_v4t_thumb_tls_pic) \ | |
7a89b94e NC |
2650 | DEF_STUB(long_branch_arm_nacl) \ |
2651 | DEF_STUB(long_branch_arm_nacl_pic) \ | |
4ba2ef8f | 2652 | DEF_STUB(cmse_branch_thumb_only) \ |
48229727 JB |
2653 | DEF_STUB(a8_veneer_b_cond) \ |
2654 | DEF_STUB(a8_veneer_b) \ | |
2655 | DEF_STUB(a8_veneer_bl) \ | |
80c135e5 TP |
2656 | DEF_STUB(a8_veneer_blx) \ |
2657 | DEF_STUB(long_branch_thumb2_only) \ | |
d5a67c02 | 2658 | DEF_STUB(long_branch_thumb2_only_pure) |
738a79f6 CL |
2659 | |
2660 | #define DEF_STUB(x) arm_stub_##x, | |
b38cadfb NC |
2661 | enum elf32_arm_stub_type |
2662 | { | |
906e58ca | 2663 | arm_stub_none, |
738a79f6 | 2664 | DEF_STUBS |
4f4faa4d | 2665 | max_stub_type |
738a79f6 CL |
2666 | }; |
2667 | #undef DEF_STUB | |
2668 | ||
8d9d9490 TP |
2669 | /* Note the first a8_veneer type. */ |
2670 | const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond; | |
2671 | ||
738a79f6 CL |
2672 | typedef struct |
2673 | { | |
d3ce72d0 | 2674 | const insn_sequence* template_sequence; |
738a79f6 CL |
2675 | int template_size; |
2676 | } stub_def; | |
2677 | ||
2678 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
b38cadfb NC |
2679 | static const stub_def stub_definitions[] = |
2680 | { | |
738a79f6 CL |
2681 | {NULL, 0}, |
2682 | DEF_STUBS | |
906e58ca NC |
2683 | }; |
2684 | ||
2685 | struct elf32_arm_stub_hash_entry | |
2686 | { | |
2687 | /* Base hash table entry structure. */ | |
2688 | struct bfd_hash_entry root; | |
2689 | ||
2690 | /* The stub section. */ | |
2691 | asection *stub_sec; | |
2692 | ||
2693 | /* Offset within stub_sec of the beginning of this stub. */ | |
2694 | bfd_vma stub_offset; | |
2695 | ||
2696 | /* Given the symbol's value and its section we can determine its final | |
2697 | value when building the stubs (so the stub knows where to jump). */ | |
2698 | bfd_vma target_value; | |
2699 | asection *target_section; | |
2700 | ||
8d9d9490 TP |
2701 | /* Same as above but for the source of the branch to the stub. Used for |
2702 | Cortex-A8 erratum workaround to patch it to branch to the stub. As | |
2703 | such, source section does not need to be recorded since Cortex-A8 erratum | |
2704 | workaround stubs are only generated when both source and target are in the | |
2705 | same section. */ | |
2706 | bfd_vma source_value; | |
48229727 JB |
2707 | |
2708 | /* The instruction which caused this stub to be generated (only valid for | |
2709 | Cortex-A8 erratum workaround stubs at present). */ | |
2710 | unsigned long orig_insn; | |
2711 | ||
461a49ca | 2712 | /* The stub type. */ |
906e58ca | 2713 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2714 | /* Its encoding size in bytes. */ |
2715 | int stub_size; | |
2716 | /* Its template. */ | |
2717 | const insn_sequence *stub_template; | |
2718 | /* The size of the template (number of entries). */ | |
2719 | int stub_template_size; | |
906e58ca NC |
2720 | |
2721 | /* The symbol table entry, if any, that this was derived from. */ | |
2722 | struct elf32_arm_link_hash_entry *h; | |
2723 | ||
35fc36a8 RS |
2724 | /* Type of branch. */ |
2725 | enum arm_st_branch_type branch_type; | |
906e58ca NC |
2726 | |
2727 | /* Where this stub is being called from, or, in the case of combined | |
2728 | stub sections, the first input section in the group. */ | |
2729 | asection *id_sec; | |
7413f23f DJ |
2730 | |
2731 | /* The name for the local symbol at the start of this stub. The | |
2732 | stub name in the hash table has to be unique; this does not, so | |
2733 | it can be friendlier. */ | |
2734 | char *output_name; | |
906e58ca NC |
2735 | }; |
2736 | ||
e489d0ae PB |
2737 | /* Used to build a map of a section. This is required for mixed-endian |
2738 | code/data. */ | |
2739 | ||
2740 | typedef struct elf32_elf_section_map | |
2741 | { | |
2742 | bfd_vma vma; | |
2743 | char type; | |
2744 | } | |
2745 | elf32_arm_section_map; | |
2746 | ||
c7b8f16e JB |
2747 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2748 | ||
2749 | typedef enum | |
2750 | { | |
2751 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2752 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2753 | VFP11_ERRATUM_ARM_VENEER, | |
2754 | VFP11_ERRATUM_THUMB_VENEER | |
2755 | } | |
2756 | elf32_vfp11_erratum_type; | |
2757 | ||
2758 | typedef struct elf32_vfp11_erratum_list | |
2759 | { | |
2760 | struct elf32_vfp11_erratum_list *next; | |
2761 | bfd_vma vma; | |
2762 | union | |
2763 | { | |
2764 | struct | |
2765 | { | |
2766 | struct elf32_vfp11_erratum_list *veneer; | |
2767 | unsigned int vfp_insn; | |
2768 | } b; | |
2769 | struct | |
2770 | { | |
2771 | struct elf32_vfp11_erratum_list *branch; | |
2772 | unsigned int id; | |
2773 | } v; | |
2774 | } u; | |
2775 | elf32_vfp11_erratum_type type; | |
2776 | } | |
2777 | elf32_vfp11_erratum_list; | |
2778 | ||
a504d23a LA |
2779 | /* Information about a STM32L4XX erratum veneer, or a branch to such a |
2780 | veneer. */ | |
2781 | typedef enum | |
2782 | { | |
2783 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER, | |
2784 | STM32L4XX_ERRATUM_VENEER | |
2785 | } | |
2786 | elf32_stm32l4xx_erratum_type; | |
2787 | ||
2788 | typedef struct elf32_stm32l4xx_erratum_list | |
2789 | { | |
2790 | struct elf32_stm32l4xx_erratum_list *next; | |
2791 | bfd_vma vma; | |
2792 | union | |
2793 | { | |
2794 | struct | |
2795 | { | |
2796 | struct elf32_stm32l4xx_erratum_list *veneer; | |
2797 | unsigned int insn; | |
2798 | } b; | |
2799 | struct | |
2800 | { | |
2801 | struct elf32_stm32l4xx_erratum_list *branch; | |
2802 | unsigned int id; | |
2803 | } v; | |
2804 | } u; | |
2805 | elf32_stm32l4xx_erratum_type type; | |
2806 | } | |
2807 | elf32_stm32l4xx_erratum_list; | |
2808 | ||
2468f9c9 PB |
2809 | typedef enum |
2810 | { | |
2811 | DELETE_EXIDX_ENTRY, | |
2812 | INSERT_EXIDX_CANTUNWIND_AT_END | |
2813 | } | |
2814 | arm_unwind_edit_type; | |
2815 | ||
2816 | /* A (sorted) list of edits to apply to an unwind table. */ | |
2817 | typedef struct arm_unwind_table_edit | |
2818 | { | |
2819 | arm_unwind_edit_type type; | |
2820 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
2821 | section different from the one we're currently writing out, so record the | |
2822 | (text) section this edit relates to here. */ | |
2823 | asection *linked_section; | |
2824 | unsigned int index; | |
2825 | struct arm_unwind_table_edit *next; | |
2826 | } | |
2827 | arm_unwind_table_edit; | |
2828 | ||
8e3de13a | 2829 | typedef struct _arm_elf_section_data |
e489d0ae | 2830 | { |
2468f9c9 | 2831 | /* Information about mapping symbols. */ |
e489d0ae | 2832 | struct bfd_elf_section_data elf; |
8e3de13a | 2833 | unsigned int mapcount; |
c7b8f16e | 2834 | unsigned int mapsize; |
e489d0ae | 2835 | elf32_arm_section_map *map; |
2468f9c9 | 2836 | /* Information about CPU errata. */ |
c7b8f16e JB |
2837 | unsigned int erratumcount; |
2838 | elf32_vfp11_erratum_list *erratumlist; | |
a504d23a LA |
2839 | unsigned int stm32l4xx_erratumcount; |
2840 | elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist; | |
491d01d3 | 2841 | unsigned int additional_reloc_count; |
2468f9c9 PB |
2842 | /* Information about unwind tables. */ |
2843 | union | |
2844 | { | |
2845 | /* Unwind info attached to a text section. */ | |
2846 | struct | |
2847 | { | |
2848 | asection *arm_exidx_sec; | |
2849 | } text; | |
2850 | ||
2851 | /* Unwind info attached to an .ARM.exidx section. */ | |
2852 | struct | |
2853 | { | |
2854 | arm_unwind_table_edit *unwind_edit_list; | |
2855 | arm_unwind_table_edit *unwind_edit_tail; | |
2856 | } exidx; | |
2857 | } u; | |
8e3de13a NC |
2858 | } |
2859 | _arm_elf_section_data; | |
e489d0ae PB |
2860 | |
2861 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 2862 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 2863 | |
48229727 JB |
2864 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
2865 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
2866 | so may be created multiple times: we use an array of these entries whilst | |
2867 | relaxing which we can refresh easily, then create stubs for each potentially | |
2868 | erratum-triggering instruction once we've settled on a solution. */ | |
2869 | ||
b38cadfb NC |
2870 | struct a8_erratum_fix |
2871 | { | |
48229727 JB |
2872 | bfd *input_bfd; |
2873 | asection *section; | |
2874 | bfd_vma offset; | |
8d9d9490 | 2875 | bfd_vma target_offset; |
48229727 JB |
2876 | unsigned long orig_insn; |
2877 | char *stub_name; | |
2878 | enum elf32_arm_stub_type stub_type; | |
35fc36a8 | 2879 | enum arm_st_branch_type branch_type; |
48229727 JB |
2880 | }; |
2881 | ||
2882 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
2883 | erratum. */ | |
2884 | ||
b38cadfb NC |
2885 | struct a8_erratum_reloc |
2886 | { | |
48229727 JB |
2887 | bfd_vma from; |
2888 | bfd_vma destination; | |
92750f34 DJ |
2889 | struct elf32_arm_link_hash_entry *hash; |
2890 | const char *sym_name; | |
48229727 | 2891 | unsigned int r_type; |
35fc36a8 | 2892 | enum arm_st_branch_type branch_type; |
48229727 JB |
2893 | bfd_boolean non_a8_stub; |
2894 | }; | |
2895 | ||
ba93b8ac DJ |
2896 | /* The size of the thread control block. */ |
2897 | #define TCB_SIZE 8 | |
2898 | ||
34e77a92 RS |
2899 | /* ARM-specific information about a PLT entry, over and above the usual |
2900 | gotplt_union. */ | |
b38cadfb NC |
2901 | struct arm_plt_info |
2902 | { | |
34e77a92 RS |
2903 | /* We reference count Thumb references to a PLT entry separately, |
2904 | so that we can emit the Thumb trampoline only if needed. */ | |
2905 | bfd_signed_vma thumb_refcount; | |
2906 | ||
2907 | /* Some references from Thumb code may be eliminated by BL->BLX | |
2908 | conversion, so record them separately. */ | |
2909 | bfd_signed_vma maybe_thumb_refcount; | |
2910 | ||
2911 | /* How many of the recorded PLT accesses were from non-call relocations. | |
2912 | This information is useful when deciding whether anything takes the | |
2913 | address of an STT_GNU_IFUNC PLT. A value of 0 means that all | |
2914 | non-call references to the function should resolve directly to the | |
2915 | real runtime target. */ | |
2916 | unsigned int noncall_refcount; | |
2917 | ||
2918 | /* Since PLT entries have variable size if the Thumb prologue is | |
2919 | used, we need to record the index into .got.plt instead of | |
2920 | recomputing it from the PLT offset. */ | |
2921 | bfd_signed_vma got_offset; | |
2922 | }; | |
2923 | ||
2924 | /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */ | |
b38cadfb NC |
2925 | struct arm_local_iplt_info |
2926 | { | |
34e77a92 RS |
2927 | /* The information that is usually found in the generic ELF part of |
2928 | the hash table entry. */ | |
2929 | union gotplt_union root; | |
2930 | ||
2931 | /* The information that is usually found in the ARM-specific part of | |
2932 | the hash table entry. */ | |
2933 | struct arm_plt_info arm; | |
2934 | ||
2935 | /* A list of all potential dynamic relocations against this symbol. */ | |
2936 | struct elf_dyn_relocs *dyn_relocs; | |
2937 | }; | |
2938 | ||
0ffa91dd | 2939 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
2940 | { |
2941 | struct elf_obj_tdata root; | |
2942 | ||
2943 | /* tls_type for each local got entry. */ | |
2944 | char *local_got_tls_type; | |
ee065d83 | 2945 | |
0855e32b NS |
2946 | /* GOTPLT entries for TLS descriptors. */ |
2947 | bfd_vma *local_tlsdesc_gotent; | |
2948 | ||
34e77a92 RS |
2949 | /* Information for local symbols that need entries in .iplt. */ |
2950 | struct arm_local_iplt_info **local_iplt; | |
2951 | ||
bf21ed78 MS |
2952 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
2953 | int no_enum_size_warning; | |
a9dc9481 JM |
2954 | |
2955 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
2956 | int no_wchar_size_warning; | |
ba93b8ac DJ |
2957 | }; |
2958 | ||
0ffa91dd NC |
2959 | #define elf_arm_tdata(bfd) \ |
2960 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 2961 | |
0ffa91dd NC |
2962 | #define elf32_arm_local_got_tls_type(bfd) \ |
2963 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
2964 | ||
0855e32b NS |
2965 | #define elf32_arm_local_tlsdesc_gotent(bfd) \ |
2966 | (elf_arm_tdata (bfd)->local_tlsdesc_gotent) | |
2967 | ||
34e77a92 RS |
2968 | #define elf32_arm_local_iplt(bfd) \ |
2969 | (elf_arm_tdata (bfd)->local_iplt) | |
2970 | ||
0ffa91dd NC |
2971 | #define is_arm_elf(bfd) \ |
2972 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
2973 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 2974 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac DJ |
2975 | |
2976 | static bfd_boolean | |
2977 | elf32_arm_mkobject (bfd *abfd) | |
2978 | { | |
0ffa91dd | 2979 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 2980 | ARM_ELF_DATA); |
ba93b8ac DJ |
2981 | } |
2982 | ||
ba93b8ac DJ |
2983 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
2984 | ||
ba96a88f | 2985 | /* Arm ELF linker hash entry. */ |
252b5132 | 2986 | struct elf32_arm_link_hash_entry |
b38cadfb NC |
2987 | { |
2988 | struct elf_link_hash_entry root; | |
252b5132 | 2989 | |
b38cadfb NC |
2990 | /* Track dynamic relocs copied for this symbol. */ |
2991 | struct elf_dyn_relocs *dyn_relocs; | |
b7693d02 | 2992 | |
b38cadfb NC |
2993 | /* ARM-specific PLT information. */ |
2994 | struct arm_plt_info plt; | |
ba93b8ac DJ |
2995 | |
2996 | #define GOT_UNKNOWN 0 | |
2997 | #define GOT_NORMAL 1 | |
2998 | #define GOT_TLS_GD 2 | |
2999 | #define GOT_TLS_IE 4 | |
0855e32b NS |
3000 | #define GOT_TLS_GDESC 8 |
3001 | #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC)) | |
b38cadfb | 3002 | unsigned int tls_type : 8; |
34e77a92 | 3003 | |
b38cadfb NC |
3004 | /* True if the symbol's PLT entry is in .iplt rather than .plt. */ |
3005 | unsigned int is_iplt : 1; | |
34e77a92 | 3006 | |
b38cadfb | 3007 | unsigned int unused : 23; |
a4fd1a8e | 3008 | |
b38cadfb NC |
3009 | /* Offset of the GOTPLT entry reserved for the TLS descriptor, |
3010 | starting at the end of the jump table. */ | |
3011 | bfd_vma tlsdesc_got; | |
0855e32b | 3012 | |
b38cadfb NC |
3013 | /* The symbol marking the real symbol location for exported thumb |
3014 | symbols with Arm stubs. */ | |
3015 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 3016 | |
b38cadfb | 3017 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 3018 | symbol. */ |
b38cadfb NC |
3019 | struct elf32_arm_stub_hash_entry *stub_cache; |
3020 | }; | |
252b5132 | 3021 | |
252b5132 | 3022 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
3023 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
3024 | (elf_link_hash_traverse \ | |
3025 | (&(table)->root, \ | |
b7693d02 | 3026 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
3027 | (info))) |
3028 | ||
3029 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
3030 | #define elf32_arm_hash_table(info) \ | |
4dfe6ac6 NC |
3031 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
3032 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) | |
252b5132 | 3033 | |
906e58ca NC |
3034 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
3035 | ((struct elf32_arm_stub_hash_entry *) \ | |
3036 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
3037 | ||
21d799b5 NC |
3038 | /* Array to keep track of which stub sections have been created, and |
3039 | information on stub grouping. */ | |
3040 | struct map_stub | |
3041 | { | |
3042 | /* This is the section to which stubs in the group will be | |
3043 | attached. */ | |
3044 | asection *link_sec; | |
3045 | /* The stub section. */ | |
3046 | asection *stub_sec; | |
3047 | }; | |
3048 | ||
0855e32b NS |
3049 | #define elf32_arm_compute_jump_table_size(htab) \ |
3050 | ((htab)->next_tls_desc_index * 4) | |
3051 | ||
9b485d32 | 3052 | /* ARM ELF linker hash table. */ |
252b5132 | 3053 | struct elf32_arm_link_hash_table |
906e58ca NC |
3054 | { |
3055 | /* The main hash table. */ | |
3056 | struct elf_link_hash_table root; | |
252b5132 | 3057 | |
906e58ca NC |
3058 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
3059 | bfd_size_type thumb_glue_size; | |
252b5132 | 3060 | |
906e58ca NC |
3061 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
3062 | bfd_size_type arm_glue_size; | |
252b5132 | 3063 | |
906e58ca NC |
3064 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
3065 | bfd_size_type bx_glue_size; | |
845b51d6 | 3066 | |
906e58ca NC |
3067 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
3068 | veneer has been populated. */ | |
3069 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 3070 | |
906e58ca NC |
3071 | /* The size in bytes of the section containing glue for VFP11 erratum |
3072 | veneers. */ | |
3073 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 3074 | |
a504d23a LA |
3075 | /* The size in bytes of the section containing glue for STM32L4XX erratum |
3076 | veneers. */ | |
3077 | bfd_size_type stm32l4xx_erratum_glue_size; | |
3078 | ||
48229727 JB |
3079 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
3080 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
3081 | elf32_arm_write_section(). */ | |
3082 | struct a8_erratum_fix *a8_erratum_fixes; | |
3083 | unsigned int num_a8_erratum_fixes; | |
3084 | ||
906e58ca NC |
3085 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
3086 | bfd * bfd_of_glue_owner; | |
ba96a88f | 3087 | |
906e58ca NC |
3088 | /* Nonzero to output a BE8 image. */ |
3089 | int byteswap_code; | |
e489d0ae | 3090 | |
906e58ca NC |
3091 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
3092 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
3093 | int target1_is_rel; | |
9c504268 | 3094 | |
906e58ca NC |
3095 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
3096 | int target2_reloc; | |
eb043451 | 3097 | |
906e58ca NC |
3098 | /* 0 = Ignore R_ARM_V4BX. |
3099 | 1 = Convert BX to MOV PC. | |
3100 | 2 = Generate v4 interworing stubs. */ | |
3101 | int fix_v4bx; | |
319850b4 | 3102 | |
48229727 JB |
3103 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
3104 | int fix_cortex_a8; | |
3105 | ||
2de70689 MGD |
3106 | /* Whether we should fix the ARM1176 BLX immediate issue. */ |
3107 | int fix_arm1176; | |
3108 | ||
906e58ca NC |
3109 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
3110 | int use_blx; | |
33bfe774 | 3111 | |
906e58ca NC |
3112 | /* What sort of code sequences we should look for which may trigger the |
3113 | VFP11 denorm erratum. */ | |
3114 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 3115 | |
906e58ca NC |
3116 | /* Global counter for the number of fixes we have emitted. */ |
3117 | int num_vfp11_fixes; | |
c7b8f16e | 3118 | |
a504d23a LA |
3119 | /* What sort of code sequences we should look for which may trigger the |
3120 | STM32L4XX erratum. */ | |
3121 | bfd_arm_stm32l4xx_fix stm32l4xx_fix; | |
3122 | ||
3123 | /* Global counter for the number of fixes we have emitted. */ | |
3124 | int num_stm32l4xx_fixes; | |
3125 | ||
906e58ca NC |
3126 | /* Nonzero to force PIC branch veneers. */ |
3127 | int pic_veneer; | |
27e55c4d | 3128 | |
906e58ca NC |
3129 | /* The number of bytes in the initial entry in the PLT. */ |
3130 | bfd_size_type plt_header_size; | |
e5a52504 | 3131 | |
906e58ca NC |
3132 | /* The number of bytes in the subsequent PLT etries. */ |
3133 | bfd_size_type plt_entry_size; | |
e5a52504 | 3134 | |
906e58ca NC |
3135 | /* True if the target system is VxWorks. */ |
3136 | int vxworks_p; | |
00a97672 | 3137 | |
906e58ca NC |
3138 | /* True if the target system is Symbian OS. */ |
3139 | int symbian_p; | |
e5a52504 | 3140 | |
b38cadfb NC |
3141 | /* True if the target system is Native Client. */ |
3142 | int nacl_p; | |
3143 | ||
906e58ca NC |
3144 | /* True if the target uses REL relocations. */ |
3145 | int use_rel; | |
4e7fd91e | 3146 | |
54ddd295 TP |
3147 | /* Nonzero if import library must be a secure gateway import library |
3148 | as per ARMv8-M Security Extensions. */ | |
3149 | int cmse_implib; | |
3150 | ||
0855e32b NS |
3151 | /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */ |
3152 | bfd_vma next_tls_desc_index; | |
3153 | ||
3154 | /* How many R_ARM_TLS_DESC relocations were generated so far. */ | |
3155 | bfd_vma num_tls_desc; | |
3156 | ||
906e58ca | 3157 | /* Short-cuts to get to dynamic linker sections. */ |
906e58ca NC |
3158 | asection *sdynbss; |
3159 | asection *srelbss; | |
5e681ec4 | 3160 | |
906e58ca NC |
3161 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
3162 | asection *srelplt2; | |
00a97672 | 3163 | |
0855e32b NS |
3164 | /* The offset into splt of the PLT entry for the TLS descriptor |
3165 | resolver. Special values are 0, if not necessary (or not found | |
3166 | to be necessary yet), and -1 if needed but not determined | |
3167 | yet. */ | |
3168 | bfd_vma dt_tlsdesc_plt; | |
3169 | ||
3170 | /* The offset into sgot of the GOT entry used by the PLT entry | |
3171 | above. */ | |
b38cadfb | 3172 | bfd_vma dt_tlsdesc_got; |
0855e32b NS |
3173 | |
3174 | /* Offset in .plt section of tls_arm_trampoline. */ | |
3175 | bfd_vma tls_trampoline; | |
3176 | ||
906e58ca NC |
3177 | /* Data for R_ARM_TLS_LDM32 relocations. */ |
3178 | union | |
3179 | { | |
3180 | bfd_signed_vma refcount; | |
3181 | bfd_vma offset; | |
3182 | } tls_ldm_got; | |
b7693d02 | 3183 | |
87d72d41 AM |
3184 | /* Small local sym cache. */ |
3185 | struct sym_cache sym_cache; | |
906e58ca NC |
3186 | |
3187 | /* For convenience in allocate_dynrelocs. */ | |
3188 | bfd * obfd; | |
3189 | ||
0855e32b NS |
3190 | /* The amount of space used by the reserved portion of the sgotplt |
3191 | section, plus whatever space is used by the jump slots. */ | |
3192 | bfd_vma sgotplt_jump_table_size; | |
3193 | ||
906e58ca NC |
3194 | /* The stub hash table. */ |
3195 | struct bfd_hash_table stub_hash_table; | |
3196 | ||
3197 | /* Linker stub bfd. */ | |
3198 | bfd *stub_bfd; | |
3199 | ||
3200 | /* Linker call-backs. */ | |
6bde4c52 TP |
3201 | asection * (*add_stub_section) (const char *, asection *, asection *, |
3202 | unsigned int); | |
906e58ca NC |
3203 | void (*layout_sections_again) (void); |
3204 | ||
3205 | /* Array to keep track of which stub sections have been created, and | |
3206 | information on stub grouping. */ | |
21d799b5 | 3207 | struct map_stub *stub_group; |
906e58ca | 3208 | |
4ba2ef8f TP |
3209 | /* Input stub section holding secure gateway veneers. */ |
3210 | asection *cmse_stub_sec; | |
3211 | ||
fe33d2fa | 3212 | /* Number of elements in stub_group. */ |
7292b3ac | 3213 | unsigned int top_id; |
fe33d2fa | 3214 | |
906e58ca NC |
3215 | /* Assorted information used by elf32_arm_size_stubs. */ |
3216 | unsigned int bfd_count; | |
7292b3ac | 3217 | unsigned int top_index; |
906e58ca NC |
3218 | asection **input_list; |
3219 | }; | |
252b5132 | 3220 | |
a504d23a LA |
3221 | static inline int |
3222 | ctz (unsigned int mask) | |
3223 | { | |
3224 | #if GCC_VERSION >= 3004 | |
3225 | return __builtin_ctz (mask); | |
3226 | #else | |
3227 | unsigned int i; | |
3228 | ||
3229 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3230 | { | |
3231 | if (mask & 0x1) | |
3232 | break; | |
3233 | mask = (mask >> 1); | |
3234 | } | |
3235 | return i; | |
3236 | #endif | |
3237 | } | |
3238 | ||
3239 | static inline int | |
3240 | popcount (unsigned int mask) | |
3241 | { | |
3242 | #if GCC_VERSION >= 3004 | |
3243 | return __builtin_popcount (mask); | |
3244 | #else | |
3245 | unsigned int i, sum = 0; | |
3246 | ||
3247 | for (i = 0; i < 8 * sizeof (mask); i++) | |
3248 | { | |
3249 | if (mask & 0x1) | |
3250 | sum++; | |
3251 | mask = (mask >> 1); | |
3252 | } | |
3253 | return sum; | |
3254 | #endif | |
3255 | } | |
3256 | ||
780a67af NC |
3257 | /* Create an entry in an ARM ELF linker hash table. */ |
3258 | ||
3259 | static struct bfd_hash_entry * | |
57e8b36a | 3260 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
99059e56 RM |
3261 | struct bfd_hash_table * table, |
3262 | const char * string) | |
780a67af NC |
3263 | { |
3264 | struct elf32_arm_link_hash_entry * ret = | |
3265 | (struct elf32_arm_link_hash_entry *) entry; | |
3266 | ||
3267 | /* Allocate the structure if it has not already been allocated by a | |
3268 | subclass. */ | |
906e58ca | 3269 | if (ret == NULL) |
21d799b5 | 3270 | ret = (struct elf32_arm_link_hash_entry *) |
99059e56 | 3271 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); |
57e8b36a | 3272 | if (ret == NULL) |
780a67af NC |
3273 | return (struct bfd_hash_entry *) ret; |
3274 | ||
3275 | /* Call the allocation method of the superclass. */ | |
3276 | ret = ((struct elf32_arm_link_hash_entry *) | |
3277 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
3278 | table, string)); | |
57e8b36a | 3279 | if (ret != NULL) |
b7693d02 | 3280 | { |
0bdcacaf | 3281 | ret->dyn_relocs = NULL; |
ba93b8ac | 3282 | ret->tls_type = GOT_UNKNOWN; |
0855e32b | 3283 | ret->tlsdesc_got = (bfd_vma) -1; |
34e77a92 RS |
3284 | ret->plt.thumb_refcount = 0; |
3285 | ret->plt.maybe_thumb_refcount = 0; | |
3286 | ret->plt.noncall_refcount = 0; | |
3287 | ret->plt.got_offset = -1; | |
3288 | ret->is_iplt = FALSE; | |
a4fd1a8e | 3289 | ret->export_glue = NULL; |
906e58ca NC |
3290 | |
3291 | ret->stub_cache = NULL; | |
b7693d02 | 3292 | } |
780a67af NC |
3293 | |
3294 | return (struct bfd_hash_entry *) ret; | |
3295 | } | |
3296 | ||
34e77a92 RS |
3297 | /* Ensure that we have allocated bookkeeping structures for ABFD's local |
3298 | symbols. */ | |
3299 | ||
3300 | static bfd_boolean | |
3301 | elf32_arm_allocate_local_sym_info (bfd *abfd) | |
3302 | { | |
3303 | if (elf_local_got_refcounts (abfd) == NULL) | |
3304 | { | |
3305 | bfd_size_type num_syms; | |
3306 | bfd_size_type size; | |
3307 | char *data; | |
3308 | ||
3309 | num_syms = elf_tdata (abfd)->symtab_hdr.sh_info; | |
3310 | size = num_syms * (sizeof (bfd_signed_vma) | |
3311 | + sizeof (struct arm_local_iplt_info *) | |
3312 | + sizeof (bfd_vma) | |
3313 | + sizeof (char)); | |
3314 | data = bfd_zalloc (abfd, size); | |
3315 | if (data == NULL) | |
3316 | return FALSE; | |
3317 | ||
3318 | elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data; | |
3319 | data += num_syms * sizeof (bfd_signed_vma); | |
3320 | ||
3321 | elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data; | |
3322 | data += num_syms * sizeof (struct arm_local_iplt_info *); | |
3323 | ||
3324 | elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data; | |
3325 | data += num_syms * sizeof (bfd_vma); | |
3326 | ||
3327 | elf32_arm_local_got_tls_type (abfd) = data; | |
3328 | } | |
3329 | return TRUE; | |
3330 | } | |
3331 | ||
3332 | /* Return the .iplt information for local symbol R_SYMNDX, which belongs | |
3333 | to input bfd ABFD. Create the information if it doesn't already exist. | |
3334 | Return null if an allocation fails. */ | |
3335 | ||
3336 | static struct arm_local_iplt_info * | |
3337 | elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx) | |
3338 | { | |
3339 | struct arm_local_iplt_info **ptr; | |
3340 | ||
3341 | if (!elf32_arm_allocate_local_sym_info (abfd)) | |
3342 | return NULL; | |
3343 | ||
3344 | BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info); | |
3345 | ptr = &elf32_arm_local_iplt (abfd)[r_symndx]; | |
3346 | if (*ptr == NULL) | |
3347 | *ptr = bfd_zalloc (abfd, sizeof (**ptr)); | |
3348 | return *ptr; | |
3349 | } | |
3350 | ||
3351 | /* Try to obtain PLT information for the symbol with index R_SYMNDX | |
3352 | in ABFD's symbol table. If the symbol is global, H points to its | |
3353 | hash table entry, otherwise H is null. | |
3354 | ||
3355 | Return true if the symbol does have PLT information. When returning | |
3356 | true, point *ROOT_PLT at the target-independent reference count/offset | |
3357 | union and *ARM_PLT at the ARM-specific information. */ | |
3358 | ||
3359 | static bfd_boolean | |
4ba2ef8f TP |
3360 | elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals, |
3361 | struct elf32_arm_link_hash_entry *h, | |
34e77a92 RS |
3362 | unsigned long r_symndx, union gotplt_union **root_plt, |
3363 | struct arm_plt_info **arm_plt) | |
3364 | { | |
3365 | struct arm_local_iplt_info *local_iplt; | |
3366 | ||
4ba2ef8f TP |
3367 | if (globals->root.splt == NULL && globals->root.iplt == NULL) |
3368 | return FALSE; | |
3369 | ||
34e77a92 RS |
3370 | if (h != NULL) |
3371 | { | |
3372 | *root_plt = &h->root.plt; | |
3373 | *arm_plt = &h->plt; | |
3374 | return TRUE; | |
3375 | } | |
3376 | ||
3377 | if (elf32_arm_local_iplt (abfd) == NULL) | |
3378 | return FALSE; | |
3379 | ||
3380 | local_iplt = elf32_arm_local_iplt (abfd)[r_symndx]; | |
3381 | if (local_iplt == NULL) | |
3382 | return FALSE; | |
3383 | ||
3384 | *root_plt = &local_iplt->root; | |
3385 | *arm_plt = &local_iplt->arm; | |
3386 | return TRUE; | |
3387 | } | |
3388 | ||
3389 | /* Return true if the PLT described by ARM_PLT requires a Thumb stub | |
3390 | before it. */ | |
3391 | ||
3392 | static bfd_boolean | |
3393 | elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info, | |
3394 | struct arm_plt_info *arm_plt) | |
3395 | { | |
3396 | struct elf32_arm_link_hash_table *htab; | |
3397 | ||
3398 | htab = elf32_arm_hash_table (info); | |
3399 | return (arm_plt->thumb_refcount != 0 | |
3400 | || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)); | |
3401 | } | |
3402 | ||
3403 | /* Return a pointer to the head of the dynamic reloc list that should | |
3404 | be used for local symbol ISYM, which is symbol number R_SYMNDX in | |
3405 | ABFD's symbol table. Return null if an error occurs. */ | |
3406 | ||
3407 | static struct elf_dyn_relocs ** | |
3408 | elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx, | |
3409 | Elf_Internal_Sym *isym) | |
3410 | { | |
3411 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) | |
3412 | { | |
3413 | struct arm_local_iplt_info *local_iplt; | |
3414 | ||
3415 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
3416 | if (local_iplt == NULL) | |
3417 | return NULL; | |
3418 | return &local_iplt->dyn_relocs; | |
3419 | } | |
3420 | else | |
3421 | { | |
3422 | /* Track dynamic relocs needed for local syms too. | |
3423 | We really need local syms available to do this | |
3424 | easily. Oh well. */ | |
3425 | asection *s; | |
3426 | void *vpp; | |
3427 | ||
3428 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
3429 | if (s == NULL) | |
3430 | abort (); | |
3431 | ||
3432 | vpp = &elf_section_data (s)->local_dynrel; | |
3433 | return (struct elf_dyn_relocs **) vpp; | |
3434 | } | |
3435 | } | |
3436 | ||
906e58ca NC |
3437 | /* Initialize an entry in the stub hash table. */ |
3438 | ||
3439 | static struct bfd_hash_entry * | |
3440 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
3441 | struct bfd_hash_table *table, | |
3442 | const char *string) | |
3443 | { | |
3444 | /* Allocate the structure if it has not already been allocated by a | |
3445 | subclass. */ | |
3446 | if (entry == NULL) | |
3447 | { | |
21d799b5 | 3448 | entry = (struct bfd_hash_entry *) |
99059e56 | 3449 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); |
906e58ca NC |
3450 | if (entry == NULL) |
3451 | return entry; | |
3452 | } | |
3453 | ||
3454 | /* Call the allocation method of the superclass. */ | |
3455 | entry = bfd_hash_newfunc (entry, table, string); | |
3456 | if (entry != NULL) | |
3457 | { | |
3458 | struct elf32_arm_stub_hash_entry *eh; | |
3459 | ||
3460 | /* Initialize the local fields. */ | |
3461 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
3462 | eh->stub_sec = NULL; | |
3463 | eh->stub_offset = 0; | |
8d9d9490 | 3464 | eh->source_value = 0; |
906e58ca NC |
3465 | eh->target_value = 0; |
3466 | eh->target_section = NULL; | |
cedfb179 | 3467 | eh->orig_insn = 0; |
906e58ca | 3468 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
3469 | eh->stub_size = 0; |
3470 | eh->stub_template = NULL; | |
3471 | eh->stub_template_size = 0; | |
906e58ca NC |
3472 | eh->h = NULL; |
3473 | eh->id_sec = NULL; | |
d8d2f433 | 3474 | eh->output_name = NULL; |
906e58ca NC |
3475 | } |
3476 | ||
3477 | return entry; | |
3478 | } | |
3479 | ||
00a97672 | 3480 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
3481 | shortcuts to them in our hash table. */ |
3482 | ||
3483 | static bfd_boolean | |
57e8b36a | 3484 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3485 | { |
3486 | struct elf32_arm_link_hash_table *htab; | |
3487 | ||
e5a52504 | 3488 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3489 | if (htab == NULL) |
3490 | return FALSE; | |
3491 | ||
e5a52504 MM |
3492 | /* BPABI objects never have a GOT, or associated sections. */ |
3493 | if (htab->symbian_p) | |
3494 | return TRUE; | |
3495 | ||
5e681ec4 PB |
3496 | if (! _bfd_elf_create_got_section (dynobj, info)) |
3497 | return FALSE; | |
3498 | ||
5e681ec4 PB |
3499 | return TRUE; |
3500 | } | |
3501 | ||
34e77a92 RS |
3502 | /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */ |
3503 | ||
3504 | static bfd_boolean | |
3505 | create_ifunc_sections (struct bfd_link_info *info) | |
3506 | { | |
3507 | struct elf32_arm_link_hash_table *htab; | |
3508 | const struct elf_backend_data *bed; | |
3509 | bfd *dynobj; | |
3510 | asection *s; | |
3511 | flagword flags; | |
b38cadfb | 3512 | |
34e77a92 RS |
3513 | htab = elf32_arm_hash_table (info); |
3514 | dynobj = htab->root.dynobj; | |
3515 | bed = get_elf_backend_data (dynobj); | |
3516 | flags = bed->dynamic_sec_flags; | |
3517 | ||
3518 | if (htab->root.iplt == NULL) | |
3519 | { | |
3d4d4302 AM |
3520 | s = bfd_make_section_anyway_with_flags (dynobj, ".iplt", |
3521 | flags | SEC_READONLY | SEC_CODE); | |
34e77a92 | 3522 | if (s == NULL |
a0f49396 | 3523 | || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment)) |
34e77a92 RS |
3524 | return FALSE; |
3525 | htab->root.iplt = s; | |
3526 | } | |
3527 | ||
3528 | if (htab->root.irelplt == NULL) | |
3529 | { | |
3d4d4302 AM |
3530 | s = bfd_make_section_anyway_with_flags (dynobj, |
3531 | RELOC_SECTION (htab, ".iplt"), | |
3532 | flags | SEC_READONLY); | |
34e77a92 | 3533 | if (s == NULL |
a0f49396 | 3534 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) |
34e77a92 RS |
3535 | return FALSE; |
3536 | htab->root.irelplt = s; | |
3537 | } | |
3538 | ||
3539 | if (htab->root.igotplt == NULL) | |
3540 | { | |
3d4d4302 | 3541 | s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags); |
34e77a92 RS |
3542 | if (s == NULL |
3543 | || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) | |
3544 | return FALSE; | |
3545 | htab->root.igotplt = s; | |
3546 | } | |
3547 | return TRUE; | |
3548 | } | |
3549 | ||
eed94f8f NC |
3550 | /* Determine if we're dealing with a Thumb only architecture. */ |
3551 | ||
3552 | static bfd_boolean | |
3553 | using_thumb_only (struct elf32_arm_link_hash_table *globals) | |
3554 | { | |
2fd158eb TP |
3555 | int arch; |
3556 | int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3557 | Tag_CPU_arch_profile); | |
eed94f8f | 3558 | |
2fd158eb TP |
3559 | if (profile) |
3560 | return profile == 'M'; | |
eed94f8f | 3561 | |
2fd158eb | 3562 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
eed94f8f | 3563 | |
60a019a0 TP |
3564 | /* Force return logic to be reviewed for each new architecture. */ |
3565 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 | |
3566 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3567 | || arch == TAG_CPU_ARCH_V8M_MAIN); | |
3568 | ||
2fd158eb TP |
3569 | if (arch == TAG_CPU_ARCH_V6_M |
3570 | || arch == TAG_CPU_ARCH_V6S_M | |
3571 | || arch == TAG_CPU_ARCH_V7E_M | |
3572 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3573 | || arch == TAG_CPU_ARCH_V8M_MAIN) | |
3574 | return TRUE; | |
eed94f8f | 3575 | |
2fd158eb | 3576 | return FALSE; |
eed94f8f NC |
3577 | } |
3578 | ||
3579 | /* Determine if we're dealing with a Thumb-2 object. */ | |
3580 | ||
3581 | static bfd_boolean | |
3582 | using_thumb2 (struct elf32_arm_link_hash_table *globals) | |
3583 | { | |
60a019a0 TP |
3584 | int arch; |
3585 | int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3586 | Tag_THUMB_ISA_use); | |
3587 | ||
3588 | if (thumb_isa) | |
3589 | return thumb_isa == 2; | |
3590 | ||
3591 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
3592 | ||
3593 | /* Force return logic to be reviewed for each new architecture. */ | |
3594 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 | |
3595 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3596 | || arch == TAG_CPU_ARCH_V8M_MAIN); | |
3597 | ||
3598 | return (arch == TAG_CPU_ARCH_V6T2 | |
3599 | || arch == TAG_CPU_ARCH_V7 | |
3600 | || arch == TAG_CPU_ARCH_V7E_M | |
3601 | || arch == TAG_CPU_ARCH_V8 | |
3602 | || arch == TAG_CPU_ARCH_V8M_MAIN); | |
eed94f8f NC |
3603 | } |
3604 | ||
5e866f5a TP |
3605 | /* Determine whether Thumb-2 BL instruction is available. */ |
3606 | ||
3607 | static bfd_boolean | |
3608 | using_thumb2_bl (struct elf32_arm_link_hash_table *globals) | |
3609 | { | |
3610 | int arch = | |
3611 | bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
3612 | ||
3613 | /* Force return logic to be reviewed for each new architecture. */ | |
3614 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 | |
3615 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3616 | || arch == TAG_CPU_ARCH_V8M_MAIN); | |
3617 | ||
3618 | /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */ | |
3619 | return (arch == TAG_CPU_ARCH_V6T2 | |
3620 | || arch >= TAG_CPU_ARCH_V7); | |
3621 | } | |
3622 | ||
00a97672 RS |
3623 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
3624 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
3625 | hash table. */ |
3626 | ||
3627 | static bfd_boolean | |
57e8b36a | 3628 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
3629 | { |
3630 | struct elf32_arm_link_hash_table *htab; | |
3631 | ||
3632 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3633 | if (htab == NULL) |
3634 | return FALSE; | |
3635 | ||
362d30a1 | 3636 | if (!htab->root.sgot && !create_got_section (dynobj, info)) |
5e681ec4 PB |
3637 | return FALSE; |
3638 | ||
3639 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
3640 | return FALSE; | |
3641 | ||
3d4d4302 | 3642 | htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss"); |
0e1862bb | 3643 | if (!bfd_link_pic (info)) |
3d4d4302 AM |
3644 | htab->srelbss = bfd_get_linker_section (dynobj, |
3645 | RELOC_SECTION (htab, ".bss")); | |
00a97672 RS |
3646 | |
3647 | if (htab->vxworks_p) | |
3648 | { | |
3649 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
3650 | return FALSE; | |
3651 | ||
0e1862bb | 3652 | if (bfd_link_pic (info)) |
00a97672 RS |
3653 | { |
3654 | htab->plt_header_size = 0; | |
3655 | htab->plt_entry_size | |
3656 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
3657 | } | |
3658 | else | |
3659 | { | |
3660 | htab->plt_header_size | |
3661 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
3662 | htab->plt_entry_size | |
3663 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
3664 | } | |
aebf9be7 NC |
3665 | |
3666 | if (elf_elfheader (dynobj)) | |
3667 | elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32; | |
00a97672 | 3668 | } |
eed94f8f NC |
3669 | else |
3670 | { | |
3671 | /* PR ld/16017 | |
3672 | Test for thumb only architectures. Note - we cannot just call | |
3673 | using_thumb_only() as the attributes in the output bfd have not been | |
3674 | initialised at this point, so instead we use the input bfd. */ | |
3675 | bfd * saved_obfd = htab->obfd; | |
3676 | ||
3677 | htab->obfd = dynobj; | |
3678 | if (using_thumb_only (htab)) | |
3679 | { | |
3680 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
3681 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); | |
3682 | } | |
3683 | htab->obfd = saved_obfd; | |
3684 | } | |
5e681ec4 | 3685 | |
362d30a1 RS |
3686 | if (!htab->root.splt |
3687 | || !htab->root.srelplt | |
e5a52504 | 3688 | || !htab->sdynbss |
0e1862bb | 3689 | || (!bfd_link_pic (info) && !htab->srelbss)) |
5e681ec4 PB |
3690 | abort (); |
3691 | ||
3692 | return TRUE; | |
3693 | } | |
3694 | ||
906e58ca NC |
3695 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
3696 | ||
3697 | static void | |
3698 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
3699 | struct elf_link_hash_entry *dir, | |
3700 | struct elf_link_hash_entry *ind) | |
3701 | { | |
3702 | struct elf32_arm_link_hash_entry *edir, *eind; | |
3703 | ||
3704 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
3705 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
3706 | ||
0bdcacaf | 3707 | if (eind->dyn_relocs != NULL) |
906e58ca | 3708 | { |
0bdcacaf | 3709 | if (edir->dyn_relocs != NULL) |
906e58ca | 3710 | { |
0bdcacaf RS |
3711 | struct elf_dyn_relocs **pp; |
3712 | struct elf_dyn_relocs *p; | |
906e58ca NC |
3713 | |
3714 | /* Add reloc counts against the indirect sym to the direct sym | |
3715 | list. Merge any entries against the same section. */ | |
0bdcacaf | 3716 | for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) |
906e58ca | 3717 | { |
0bdcacaf | 3718 | struct elf_dyn_relocs *q; |
906e58ca | 3719 | |
0bdcacaf RS |
3720 | for (q = edir->dyn_relocs; q != NULL; q = q->next) |
3721 | if (q->sec == p->sec) | |
906e58ca NC |
3722 | { |
3723 | q->pc_count += p->pc_count; | |
3724 | q->count += p->count; | |
3725 | *pp = p->next; | |
3726 | break; | |
3727 | } | |
3728 | if (q == NULL) | |
3729 | pp = &p->next; | |
3730 | } | |
0bdcacaf | 3731 | *pp = edir->dyn_relocs; |
906e58ca NC |
3732 | } |
3733 | ||
0bdcacaf RS |
3734 | edir->dyn_relocs = eind->dyn_relocs; |
3735 | eind->dyn_relocs = NULL; | |
906e58ca NC |
3736 | } |
3737 | ||
3738 | if (ind->root.type == bfd_link_hash_indirect) | |
3739 | { | |
3740 | /* Copy over PLT info. */ | |
34e77a92 RS |
3741 | edir->plt.thumb_refcount += eind->plt.thumb_refcount; |
3742 | eind->plt.thumb_refcount = 0; | |
3743 | edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount; | |
3744 | eind->plt.maybe_thumb_refcount = 0; | |
3745 | edir->plt.noncall_refcount += eind->plt.noncall_refcount; | |
3746 | eind->plt.noncall_refcount = 0; | |
3747 | ||
3748 | /* We should only allocate a function to .iplt once the final | |
3749 | symbol information is known. */ | |
3750 | BFD_ASSERT (!eind->is_iplt); | |
906e58ca NC |
3751 | |
3752 | if (dir->got.refcount <= 0) | |
3753 | { | |
3754 | edir->tls_type = eind->tls_type; | |
3755 | eind->tls_type = GOT_UNKNOWN; | |
3756 | } | |
3757 | } | |
3758 | ||
3759 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
3760 | } | |
3761 | ||
68faa637 AM |
3762 | /* Destroy an ARM elf linker hash table. */ |
3763 | ||
3764 | static void | |
d495ab0d | 3765 | elf32_arm_link_hash_table_free (bfd *obfd) |
68faa637 AM |
3766 | { |
3767 | struct elf32_arm_link_hash_table *ret | |
d495ab0d | 3768 | = (struct elf32_arm_link_hash_table *) obfd->link.hash; |
68faa637 AM |
3769 | |
3770 | bfd_hash_table_free (&ret->stub_hash_table); | |
d495ab0d | 3771 | _bfd_elf_link_hash_table_free (obfd); |
68faa637 AM |
3772 | } |
3773 | ||
906e58ca NC |
3774 | /* Create an ARM elf linker hash table. */ |
3775 | ||
3776 | static struct bfd_link_hash_table * | |
3777 | elf32_arm_link_hash_table_create (bfd *abfd) | |
3778 | { | |
3779 | struct elf32_arm_link_hash_table *ret; | |
3780 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); | |
3781 | ||
7bf52ea2 | 3782 | ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt); |
906e58ca NC |
3783 | if (ret == NULL) |
3784 | return NULL; | |
3785 | ||
3786 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
3787 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
3788 | sizeof (struct elf32_arm_link_hash_entry), |
3789 | ARM_ELF_DATA)) | |
906e58ca NC |
3790 | { |
3791 | free (ret); | |
3792 | return NULL; | |
3793 | } | |
3794 | ||
906e58ca | 3795 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; |
a504d23a | 3796 | ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE; |
906e58ca NC |
3797 | #ifdef FOUR_WORD_PLT |
3798 | ret->plt_header_size = 16; | |
3799 | ret->plt_entry_size = 16; | |
3800 | #else | |
3801 | ret->plt_header_size = 20; | |
1db37fe6 | 3802 | ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12; |
906e58ca | 3803 | #endif |
906e58ca | 3804 | ret->use_rel = 1; |
906e58ca | 3805 | ret->obfd = abfd; |
906e58ca NC |
3806 | |
3807 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
3808 | sizeof (struct elf32_arm_stub_hash_entry))) | |
3809 | { | |
d495ab0d | 3810 | _bfd_elf_link_hash_table_free (abfd); |
906e58ca NC |
3811 | return NULL; |
3812 | } | |
d495ab0d | 3813 | ret->root.root.hash_table_free = elf32_arm_link_hash_table_free; |
906e58ca NC |
3814 | |
3815 | return &ret->root.root; | |
3816 | } | |
3817 | ||
cd1dac3d DG |
3818 | /* Determine what kind of NOPs are available. */ |
3819 | ||
3820 | static bfd_boolean | |
3821 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) | |
3822 | { | |
3823 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3824 | Tag_CPU_arch); | |
cd1dac3d | 3825 | |
60a019a0 TP |
3826 | /* Force return logic to be reviewed for each new architecture. */ |
3827 | BFD_ASSERT (arch <= TAG_CPU_ARCH_V8 | |
3828 | || arch == TAG_CPU_ARCH_V8M_BASE | |
3829 | || arch == TAG_CPU_ARCH_V8M_MAIN); | |
3830 | ||
3831 | return (arch == TAG_CPU_ARCH_V6T2 | |
3832 | || arch == TAG_CPU_ARCH_V6K | |
3833 | || arch == TAG_CPU_ARCH_V7 | |
3834 | || arch == TAG_CPU_ARCH_V8); | |
cd1dac3d DG |
3835 | } |
3836 | ||
f4ac8484 DJ |
3837 | static bfd_boolean |
3838 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) | |
3839 | { | |
3840 | switch (stub_type) | |
3841 | { | |
fea2b4d6 | 3842 | case arm_stub_long_branch_thumb_only: |
80c135e5 | 3843 | case arm_stub_long_branch_thumb2_only: |
d5a67c02 | 3844 | case arm_stub_long_branch_thumb2_only_pure: |
fea2b4d6 CL |
3845 | case arm_stub_long_branch_v4t_thumb_arm: |
3846 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 | 3847 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
12352d3f | 3848 | case arm_stub_long_branch_v4t_thumb_tls_pic: |
ebe24dd4 | 3849 | case arm_stub_long_branch_thumb_only_pic: |
4ba2ef8f | 3850 | case arm_stub_cmse_branch_thumb_only: |
f4ac8484 DJ |
3851 | return TRUE; |
3852 | case arm_stub_none: | |
3853 | BFD_FAIL (); | |
3854 | return FALSE; | |
3855 | break; | |
3856 | default: | |
3857 | return FALSE; | |
3858 | } | |
3859 | } | |
3860 | ||
906e58ca NC |
3861 | /* Determine the type of stub needed, if any, for a call. */ |
3862 | ||
3863 | static enum elf32_arm_stub_type | |
3864 | arm_type_of_stub (struct bfd_link_info *info, | |
3865 | asection *input_sec, | |
3866 | const Elf_Internal_Rela *rel, | |
34e77a92 | 3867 | unsigned char st_type, |
35fc36a8 | 3868 | enum arm_st_branch_type *actual_branch_type, |
906e58ca | 3869 | struct elf32_arm_link_hash_entry *hash, |
c820be07 NC |
3870 | bfd_vma destination, |
3871 | asection *sym_sec, | |
3872 | bfd *input_bfd, | |
3873 | const char *name) | |
906e58ca NC |
3874 | { |
3875 | bfd_vma location; | |
3876 | bfd_signed_vma branch_offset; | |
3877 | unsigned int r_type; | |
3878 | struct elf32_arm_link_hash_table * globals; | |
5e866f5a | 3879 | bfd_boolean thumb2, thumb2_bl, thumb_only; |
906e58ca | 3880 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
5fa9e92f | 3881 | int use_plt = 0; |
35fc36a8 | 3882 | enum arm_st_branch_type branch_type = *actual_branch_type; |
34e77a92 RS |
3883 | union gotplt_union *root_plt; |
3884 | struct arm_plt_info *arm_plt; | |
d5a67c02 AV |
3885 | int arch; |
3886 | int thumb2_movw; | |
906e58ca | 3887 | |
35fc36a8 | 3888 | if (branch_type == ST_BRANCH_LONG) |
da5938a2 NC |
3889 | return stub_type; |
3890 | ||
906e58ca | 3891 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3892 | if (globals == NULL) |
3893 | return stub_type; | |
906e58ca NC |
3894 | |
3895 | thumb_only = using_thumb_only (globals); | |
906e58ca | 3896 | thumb2 = using_thumb2 (globals); |
5e866f5a | 3897 | thumb2_bl = using_thumb2_bl (globals); |
906e58ca | 3898 | |
d5a67c02 AV |
3899 | arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch); |
3900 | ||
3901 | /* True for architectures that implement the thumb2 movw instruction. */ | |
3902 | thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE); | |
3903 | ||
906e58ca NC |
3904 | /* Determine where the call point is. */ |
3905 | location = (input_sec->output_offset | |
3906 | + input_sec->output_section->vma | |
3907 | + rel->r_offset); | |
3908 | ||
906e58ca NC |
3909 | r_type = ELF32_R_TYPE (rel->r_info); |
3910 | ||
39f21624 NC |
3911 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
3912 | are considering a function call relocation. */ | |
c5423981 TG |
3913 | if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
3914 | || r_type == R_ARM_THM_JUMP19) | |
39f21624 NC |
3915 | && branch_type == ST_BRANCH_TO_ARM) |
3916 | branch_type = ST_BRANCH_TO_THUMB; | |
3917 | ||
34e77a92 RS |
3918 | /* For TLS call relocs, it is the caller's responsibility to provide |
3919 | the address of the appropriate trampoline. */ | |
3920 | if (r_type != R_ARM_TLS_CALL | |
3921 | && r_type != R_ARM_THM_TLS_CALL | |
4ba2ef8f TP |
3922 | && elf32_arm_get_plt_info (input_bfd, globals, hash, |
3923 | ELF32_R_SYM (rel->r_info), &root_plt, | |
3924 | &arm_plt) | |
34e77a92 | 3925 | && root_plt->offset != (bfd_vma) -1) |
5fa9e92f | 3926 | { |
34e77a92 | 3927 | asection *splt; |
fe33d2fa | 3928 | |
34e77a92 RS |
3929 | if (hash == NULL || hash->is_iplt) |
3930 | splt = globals->root.iplt; | |
3931 | else | |
3932 | splt = globals->root.splt; | |
3933 | if (splt != NULL) | |
b38cadfb | 3934 | { |
34e77a92 RS |
3935 | use_plt = 1; |
3936 | ||
3937 | /* Note when dealing with PLT entries: the main PLT stub is in | |
3938 | ARM mode, so if the branch is in Thumb mode, another | |
3939 | Thumb->ARM stub will be inserted later just before the ARM | |
3940 | PLT stub. We don't take this extra distance into account | |
3941 | here, because if a long branch stub is needed, we'll add a | |
3942 | Thumb->Arm one and branch directly to the ARM PLT entry | |
3943 | because it avoids spreading offset corrections in several | |
3944 | places. */ | |
3945 | ||
3946 | destination = (splt->output_section->vma | |
3947 | + splt->output_offset | |
3948 | + root_plt->offset); | |
3949 | st_type = STT_FUNC; | |
3950 | branch_type = ST_BRANCH_TO_ARM; | |
3951 | } | |
5fa9e92f | 3952 | } |
34e77a92 RS |
3953 | /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */ |
3954 | BFD_ASSERT (st_type != STT_GNU_IFUNC); | |
906e58ca | 3955 | |
fe33d2fa CL |
3956 | branch_offset = (bfd_signed_vma)(destination - location); |
3957 | ||
0855e32b | 3958 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24 |
c5423981 | 3959 | || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19) |
906e58ca | 3960 | { |
5fa9e92f CL |
3961 | /* Handle cases where: |
3962 | - this call goes too far (different Thumb/Thumb2 max | |
99059e56 | 3963 | distance) |
155d87d7 | 3964 | - it's a Thumb->Arm call and blx is not available, or it's a |
99059e56 RM |
3965 | Thumb->Arm branch (not bl). A stub is needed in this case, |
3966 | but only if this call is not through a PLT entry. Indeed, | |
3967 | PLT stubs handle mode switching already. | |
5fa9e92f | 3968 | */ |
5e866f5a | 3969 | if ((!thumb2_bl |
906e58ca NC |
3970 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET |
3971 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
5e866f5a | 3972 | || (thumb2_bl |
906e58ca NC |
3973 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET |
3974 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
c5423981 TG |
3975 | || (thumb2 |
3976 | && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET | |
3977 | || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET)) | |
3978 | && (r_type == R_ARM_THM_JUMP19)) | |
35fc36a8 | 3979 | || (branch_type == ST_BRANCH_TO_ARM |
0855e32b NS |
3980 | && (((r_type == R_ARM_THM_CALL |
3981 | || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx) | |
c5423981 TG |
3982 | || (r_type == R_ARM_THM_JUMP24) |
3983 | || (r_type == R_ARM_THM_JUMP19)) | |
5fa9e92f | 3984 | && !use_plt)) |
906e58ca | 3985 | { |
35fc36a8 | 3986 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
3987 | { |
3988 | /* Thumb to thumb. */ | |
3989 | if (!thumb_only) | |
3990 | { | |
d5a67c02 AV |
3991 | if (input_sec->flags & SEC_ELF_PURECODE) |
3992 | (*_bfd_error_handler) (_("%B(%s): warning: long branch " | |
3993 | " veneers used in section with " | |
3994 | "SHF_ARM_PURECODE section " | |
3995 | "attribute is only supported" | |
3996 | " for M-profile targets that " | |
3997 | "implement the movw " | |
3998 | "instruction.")); | |
3999 | ||
0e1862bb | 4000 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4001 | /* PIC stubs. */ |
155d87d7 | 4002 | ? ((globals->use_blx |
9553db3c | 4003 | && (r_type == R_ARM_THM_CALL)) |
155d87d7 CL |
4004 | /* V5T and above. Stub starts with ARM code, so |
4005 | we must be able to switch mode before | |
4006 | reaching it, which is only possible for 'bl' | |
4007 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 4008 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 4009 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 4010 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
4011 | |
4012 | /* non-PIC stubs. */ | |
155d87d7 | 4013 | : ((globals->use_blx |
9553db3c | 4014 | && (r_type == R_ARM_THM_CALL)) |
c2b4a39d CL |
4015 | /* V5T and above. */ |
4016 | ? arm_stub_long_branch_any_any | |
4017 | /* V4T. */ | |
d3626fb0 | 4018 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
4019 | } |
4020 | else | |
4021 | { | |
d5a67c02 AV |
4022 | if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE)) |
4023 | stub_type = arm_stub_long_branch_thumb2_only_pure; | |
4024 | else | |
4025 | { | |
4026 | if (input_sec->flags & SEC_ELF_PURECODE) | |
4027 | (*_bfd_error_handler) (_("%B(%s): warning: long branch " | |
4028 | " veneers used in section with " | |
4029 | "SHF_ARM_PURECODE section " | |
4030 | "attribute is only supported" | |
4031 | " for M-profile targets that " | |
4032 | "implement the movw " | |
4033 | "instruction.")); | |
4034 | ||
4035 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) | |
4036 | /* PIC stub. */ | |
4037 | ? arm_stub_long_branch_thumb_only_pic | |
4038 | /* non-PIC stub. */ | |
4039 | : (thumb2 ? arm_stub_long_branch_thumb2_only | |
4040 | : arm_stub_long_branch_thumb_only); | |
4041 | } | |
906e58ca NC |
4042 | } |
4043 | } | |
4044 | else | |
4045 | { | |
d5a67c02 AV |
4046 | if (input_sec->flags & SEC_ELF_PURECODE) |
4047 | (*_bfd_error_handler) (_("%B(%s): warning: long branch " | |
4048 | " veneers used in section with " | |
4049 | "SHF_ARM_PURECODE section " | |
4050 | "attribute is only supported" | |
4051 | " for M-profile targets that " | |
4052 | "implement the movw " | |
4053 | "instruction.")); | |
4054 | ||
906e58ca | 4055 | /* Thumb to arm. */ |
c820be07 NC |
4056 | if (sym_sec != NULL |
4057 | && sym_sec->owner != NULL | |
4058 | && !INTERWORK_FLAG (sym_sec->owner)) | |
4059 | { | |
4060 | (*_bfd_error_handler) | |
4061 | (_("%B(%s): warning: interworking not enabled.\n" | |
4062 | " first occurrence: %B: Thumb call to ARM"), | |
4063 | sym_sec->owner, input_bfd, name); | |
4064 | } | |
4065 | ||
0855e32b | 4066 | stub_type = |
0e1862bb | 4067 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4068 | /* PIC stubs. */ |
0855e32b | 4069 | ? (r_type == R_ARM_THM_TLS_CALL |
6a631e86 | 4070 | /* TLS PIC stubs. */ |
0855e32b NS |
4071 | ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic |
4072 | : arm_stub_long_branch_v4t_thumb_tls_pic) | |
4073 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) | |
4074 | /* V5T PIC and above. */ | |
4075 | ? arm_stub_long_branch_any_arm_pic | |
4076 | /* V4T PIC stub. */ | |
4077 | : arm_stub_long_branch_v4t_thumb_arm_pic)) | |
c2b4a39d CL |
4078 | |
4079 | /* non-PIC stubs. */ | |
0855e32b | 4080 | : ((globals->use_blx && r_type == R_ARM_THM_CALL) |
c2b4a39d CL |
4081 | /* V5T and above. */ |
4082 | ? arm_stub_long_branch_any_any | |
4083 | /* V4T. */ | |
4084 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
4085 | |
4086 | /* Handle v4t short branches. */ | |
fea2b4d6 | 4087 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
4088 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
4089 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 4090 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
4091 | } |
4092 | } | |
4093 | } | |
fe33d2fa CL |
4094 | else if (r_type == R_ARM_CALL |
4095 | || r_type == R_ARM_JUMP24 | |
0855e32b NS |
4096 | || r_type == R_ARM_PLT32 |
4097 | || r_type == R_ARM_TLS_CALL) | |
906e58ca | 4098 | { |
d5a67c02 AV |
4099 | if (input_sec->flags & SEC_ELF_PURECODE) |
4100 | (*_bfd_error_handler) (_("%B(%s): warning: long branch " | |
4101 | " veneers used in section with " | |
4102 | "SHF_ARM_PURECODE section " | |
4103 | "attribute is only supported" | |
4104 | " for M-profile targets that " | |
4105 | "implement the movw " | |
4106 | "instruction.")); | |
35fc36a8 | 4107 | if (branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4108 | { |
4109 | /* Arm to thumb. */ | |
c820be07 NC |
4110 | |
4111 | if (sym_sec != NULL | |
4112 | && sym_sec->owner != NULL | |
4113 | && !INTERWORK_FLAG (sym_sec->owner)) | |
4114 | { | |
4115 | (*_bfd_error_handler) | |
4116 | (_("%B(%s): warning: interworking not enabled.\n" | |
c2b4a39d | 4117 | " first occurrence: %B: ARM call to Thumb"), |
c820be07 NC |
4118 | sym_sec->owner, input_bfd, name); |
4119 | } | |
4120 | ||
4121 | /* We have an extra 2-bytes reach because of | |
4122 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
4123 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
4124 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
0855e32b | 4125 | || (r_type == R_ARM_CALL && !globals->use_blx) |
4116d8d7 PB |
4126 | || (r_type == R_ARM_JUMP24) |
4127 | || (r_type == R_ARM_PLT32)) | |
906e58ca | 4128 | { |
0e1862bb | 4129 | stub_type = (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4130 | /* PIC stubs. */ |
ebe24dd4 CL |
4131 | ? ((globals->use_blx) |
4132 | /* V5T and above. */ | |
4133 | ? arm_stub_long_branch_any_thumb_pic | |
4134 | /* V4T stub. */ | |
4135 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
4136 | ||
c2b4a39d CL |
4137 | /* non-PIC stubs. */ |
4138 | : ((globals->use_blx) | |
4139 | /* V5T and above. */ | |
4140 | ? arm_stub_long_branch_any_any | |
4141 | /* V4T. */ | |
4142 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
4143 | } |
4144 | } | |
4145 | else | |
4146 | { | |
4147 | /* Arm to arm. */ | |
4148 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
4149 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
4150 | { | |
0855e32b | 4151 | stub_type = |
0e1862bb | 4152 | (bfd_link_pic (info) | globals->pic_veneer) |
c2b4a39d | 4153 | /* PIC stubs. */ |
0855e32b | 4154 | ? (r_type == R_ARM_TLS_CALL |
6a631e86 | 4155 | /* TLS PIC Stub. */ |
0855e32b | 4156 | ? arm_stub_long_branch_any_tls_pic |
7a89b94e NC |
4157 | : (globals->nacl_p |
4158 | ? arm_stub_long_branch_arm_nacl_pic | |
4159 | : arm_stub_long_branch_any_arm_pic)) | |
c2b4a39d | 4160 | /* non-PIC stubs. */ |
7a89b94e NC |
4161 | : (globals->nacl_p |
4162 | ? arm_stub_long_branch_arm_nacl | |
4163 | : arm_stub_long_branch_any_any); | |
906e58ca NC |
4164 | } |
4165 | } | |
4166 | } | |
4167 | ||
fe33d2fa CL |
4168 | /* If a stub is needed, record the actual destination type. */ |
4169 | if (stub_type != arm_stub_none) | |
35fc36a8 | 4170 | *actual_branch_type = branch_type; |
fe33d2fa | 4171 | |
906e58ca NC |
4172 | return stub_type; |
4173 | } | |
4174 | ||
4175 | /* Build a name for an entry in the stub hash table. */ | |
4176 | ||
4177 | static char * | |
4178 | elf32_arm_stub_name (const asection *input_section, | |
4179 | const asection *sym_sec, | |
4180 | const struct elf32_arm_link_hash_entry *hash, | |
fe33d2fa CL |
4181 | const Elf_Internal_Rela *rel, |
4182 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4183 | { |
4184 | char *stub_name; | |
4185 | bfd_size_type len; | |
4186 | ||
4187 | if (hash) | |
4188 | { | |
fe33d2fa | 4189 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4190 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4191 | if (stub_name != NULL) |
fe33d2fa | 4192 | sprintf (stub_name, "%08x_%s+%x_%d", |
906e58ca NC |
4193 | input_section->id & 0xffffffff, |
4194 | hash->root.root.root.string, | |
fe33d2fa CL |
4195 | (int) rel->r_addend & 0xffffffff, |
4196 | (int) stub_type); | |
906e58ca NC |
4197 | } |
4198 | else | |
4199 | { | |
fe33d2fa | 4200 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; |
21d799b5 | 4201 | stub_name = (char *) bfd_malloc (len); |
906e58ca | 4202 | if (stub_name != NULL) |
fe33d2fa | 4203 | sprintf (stub_name, "%08x_%x:%x+%x_%d", |
906e58ca NC |
4204 | input_section->id & 0xffffffff, |
4205 | sym_sec->id & 0xffffffff, | |
0855e32b NS |
4206 | ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL |
4207 | || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL | |
4208 | ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
fe33d2fa CL |
4209 | (int) rel->r_addend & 0xffffffff, |
4210 | (int) stub_type); | |
906e58ca NC |
4211 | } |
4212 | ||
4213 | return stub_name; | |
4214 | } | |
4215 | ||
4216 | /* Look up an entry in the stub hash. Stub entries are cached because | |
4217 | creating the stub name takes a bit of time. */ | |
4218 | ||
4219 | static struct elf32_arm_stub_hash_entry * | |
4220 | elf32_arm_get_stub_entry (const asection *input_section, | |
4221 | const asection *sym_sec, | |
4222 | struct elf_link_hash_entry *hash, | |
4223 | const Elf_Internal_Rela *rel, | |
fe33d2fa CL |
4224 | struct elf32_arm_link_hash_table *htab, |
4225 | enum elf32_arm_stub_type stub_type) | |
906e58ca NC |
4226 | { |
4227 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4228 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
4229 | const asection *id_sec; | |
4230 | ||
4231 | if ((input_section->flags & SEC_CODE) == 0) | |
4232 | return NULL; | |
4233 | ||
4234 | /* If this input section is part of a group of sections sharing one | |
4235 | stub section, then use the id of the first section in the group. | |
4236 | Stub names need to include a section id, as there may well be | |
4237 | more than one stub used to reach say, printf, and we need to | |
4238 | distinguish between them. */ | |
4239 | id_sec = htab->stub_group[input_section->id].link_sec; | |
4240 | ||
4241 | if (h != NULL && h->stub_cache != NULL | |
4242 | && h->stub_cache->h == h | |
fe33d2fa CL |
4243 | && h->stub_cache->id_sec == id_sec |
4244 | && h->stub_cache->stub_type == stub_type) | |
906e58ca NC |
4245 | { |
4246 | stub_entry = h->stub_cache; | |
4247 | } | |
4248 | else | |
4249 | { | |
4250 | char *stub_name; | |
4251 | ||
fe33d2fa | 4252 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); |
906e58ca NC |
4253 | if (stub_name == NULL) |
4254 | return NULL; | |
4255 | ||
4256 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
4257 | stub_name, FALSE, FALSE); | |
4258 | if (h != NULL) | |
4259 | h->stub_cache = stub_entry; | |
4260 | ||
4261 | free (stub_name); | |
4262 | } | |
4263 | ||
4264 | return stub_entry; | |
4265 | } | |
4266 | ||
daa4adae TP |
4267 | /* Whether veneers of type STUB_TYPE require to be in a dedicated output |
4268 | section. */ | |
4269 | ||
4270 | static bfd_boolean | |
4271 | arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type) | |
4272 | { | |
4273 | if (stub_type >= max_stub_type) | |
4274 | abort (); /* Should be unreachable. */ | |
4275 | ||
4ba2ef8f TP |
4276 | switch (stub_type) |
4277 | { | |
4278 | case arm_stub_cmse_branch_thumb_only: | |
4279 | return TRUE; | |
4280 | ||
4281 | default: | |
4282 | return FALSE; | |
4283 | } | |
4284 | ||
4285 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4286 | } |
4287 | ||
4288 | /* Required alignment (as a power of 2) for the dedicated section holding | |
4289 | veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed | |
4290 | with input sections. */ | |
4291 | ||
4292 | static int | |
4293 | arm_dedicated_stub_output_section_required_alignment | |
4294 | (enum elf32_arm_stub_type stub_type) | |
4295 | { | |
4296 | if (stub_type >= max_stub_type) | |
4297 | abort (); /* Should be unreachable. */ | |
4298 | ||
4ba2ef8f TP |
4299 | switch (stub_type) |
4300 | { | |
4301 | /* Vectors of Secure Gateway veneers must be aligned on 32byte | |
4302 | boundary. */ | |
4303 | case arm_stub_cmse_branch_thumb_only: | |
4304 | return 5; | |
4305 | ||
4306 | default: | |
4307 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4308 | return 0; | |
4309 | } | |
4310 | ||
4311 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4312 | } |
4313 | ||
4314 | /* Name of the dedicated output section to put veneers of type STUB_TYPE, or | |
4315 | NULL if veneers of this type are interspersed with input sections. */ | |
4316 | ||
4317 | static const char * | |
4318 | arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type) | |
4319 | { | |
4320 | if (stub_type >= max_stub_type) | |
4321 | abort (); /* Should be unreachable. */ | |
4322 | ||
4ba2ef8f TP |
4323 | switch (stub_type) |
4324 | { | |
4325 | case arm_stub_cmse_branch_thumb_only: | |
4326 | return ".gnu.sgstubs"; | |
4327 | ||
4328 | default: | |
4329 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4330 | return NULL; | |
4331 | } | |
4332 | ||
4333 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4334 | } |
4335 | ||
4336 | /* If veneers of type STUB_TYPE should go in a dedicated output section, | |
4337 | returns the address of the hash table field in HTAB holding a pointer to the | |
4338 | corresponding input section. Otherwise, returns NULL. */ | |
4339 | ||
4340 | static asection ** | |
4ba2ef8f TP |
4341 | arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab, |
4342 | enum elf32_arm_stub_type stub_type) | |
daa4adae TP |
4343 | { |
4344 | if (stub_type >= max_stub_type) | |
4345 | abort (); /* Should be unreachable. */ | |
4346 | ||
4ba2ef8f TP |
4347 | switch (stub_type) |
4348 | { | |
4349 | case arm_stub_cmse_branch_thumb_only: | |
4350 | return &htab->cmse_stub_sec; | |
4351 | ||
4352 | default: | |
4353 | BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type)); | |
4354 | return NULL; | |
4355 | } | |
4356 | ||
4357 | abort (); /* Should be unreachable. */ | |
daa4adae TP |
4358 | } |
4359 | ||
4360 | /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION | |
4361 | is the section that branch into veneer and can be NULL if stub should go in | |
4362 | a dedicated output section. Returns a pointer to the stub section, and the | |
4363 | section to which the stub section will be attached (in *LINK_SEC_P). | |
48229727 | 4364 | LINK_SEC_P may be NULL. */ |
906e58ca | 4365 | |
48229727 JB |
4366 | static asection * |
4367 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
daa4adae TP |
4368 | struct elf32_arm_link_hash_table *htab, |
4369 | enum elf32_arm_stub_type stub_type) | |
906e58ca | 4370 | { |
daa4adae TP |
4371 | asection *link_sec, *out_sec, **stub_sec_p; |
4372 | const char *stub_sec_prefix; | |
4373 | bfd_boolean dedicated_output_section = | |
4374 | arm_dedicated_stub_output_section_required (stub_type); | |
4375 | int align; | |
906e58ca | 4376 | |
daa4adae | 4377 | if (dedicated_output_section) |
906e58ca | 4378 | { |
daa4adae TP |
4379 | bfd *output_bfd = htab->obfd; |
4380 | const char *out_sec_name = | |
4381 | arm_dedicated_stub_output_section_name (stub_type); | |
4382 | link_sec = NULL; | |
4383 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
4384 | stub_sec_prefix = out_sec_name; | |
4385 | align = arm_dedicated_stub_output_section_required_alignment (stub_type); | |
4386 | out_sec = bfd_get_section_by_name (output_bfd, out_sec_name); | |
4387 | if (out_sec == NULL) | |
906e58ca | 4388 | { |
daa4adae TP |
4389 | (*_bfd_error_handler) (_("No address assigned to the veneers output " |
4390 | "section %s"), out_sec_name); | |
4391 | return NULL; | |
906e58ca | 4392 | } |
daa4adae TP |
4393 | } |
4394 | else | |
4395 | { | |
4396 | link_sec = htab->stub_group[section->id].link_sec; | |
4397 | BFD_ASSERT (link_sec != NULL); | |
4398 | stub_sec_p = &htab->stub_group[section->id].stub_sec; | |
4399 | if (*stub_sec_p == NULL) | |
4400 | stub_sec_p = &htab->stub_group[link_sec->id].stub_sec; | |
4401 | stub_sec_prefix = link_sec->name; | |
4402 | out_sec = link_sec->output_section; | |
4403 | align = htab->nacl_p ? 4 : 3; | |
906e58ca | 4404 | } |
b38cadfb | 4405 | |
daa4adae TP |
4406 | if (*stub_sec_p == NULL) |
4407 | { | |
4408 | size_t namelen; | |
4409 | bfd_size_type len; | |
4410 | char *s_name; | |
4411 | ||
4412 | namelen = strlen (stub_sec_prefix); | |
4413 | len = namelen + sizeof (STUB_SUFFIX); | |
4414 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); | |
4415 | if (s_name == NULL) | |
4416 | return NULL; | |
4417 | ||
4418 | memcpy (s_name, stub_sec_prefix, namelen); | |
4419 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
4420 | *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec, | |
4421 | align); | |
4422 | if (*stub_sec_p == NULL) | |
4423 | return NULL; | |
4424 | ||
4425 | out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE | |
4426 | | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | |
4427 | | SEC_KEEP; | |
4428 | } | |
4429 | ||
4430 | if (!dedicated_output_section) | |
4431 | htab->stub_group[section->id].stub_sec = *stub_sec_p; | |
4432 | ||
48229727 JB |
4433 | if (link_sec_p) |
4434 | *link_sec_p = link_sec; | |
b38cadfb | 4435 | |
daa4adae | 4436 | return *stub_sec_p; |
48229727 JB |
4437 | } |
4438 | ||
4439 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
4440 | stub entry are initialised. */ | |
4441 | ||
4442 | static struct elf32_arm_stub_hash_entry * | |
daa4adae TP |
4443 | elf32_arm_add_stub (const char *stub_name, asection *section, |
4444 | struct elf32_arm_link_hash_table *htab, | |
4445 | enum elf32_arm_stub_type stub_type) | |
48229727 JB |
4446 | { |
4447 | asection *link_sec; | |
4448 | asection *stub_sec; | |
4449 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4450 | ||
daa4adae TP |
4451 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab, |
4452 | stub_type); | |
48229727 JB |
4453 | if (stub_sec == NULL) |
4454 | return NULL; | |
906e58ca NC |
4455 | |
4456 | /* Enter this entry into the linker stub hash table. */ | |
4457 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
4458 | TRUE, FALSE); | |
4459 | if (stub_entry == NULL) | |
4460 | { | |
6bde4c52 TP |
4461 | if (section == NULL) |
4462 | section = stub_sec; | |
906e58ca NC |
4463 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), |
4464 | section->owner, | |
4465 | stub_name); | |
4466 | return NULL; | |
4467 | } | |
4468 | ||
4469 | stub_entry->stub_sec = stub_sec; | |
4470 | stub_entry->stub_offset = 0; | |
4471 | stub_entry->id_sec = link_sec; | |
4472 | ||
906e58ca NC |
4473 | return stub_entry; |
4474 | } | |
4475 | ||
4476 | /* Store an Arm insn into an output section not processed by | |
4477 | elf32_arm_write_section. */ | |
4478 | ||
4479 | static void | |
8029a119 NC |
4480 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
4481 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4482 | { |
4483 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4484 | bfd_putl32 (val, ptr); | |
4485 | else | |
4486 | bfd_putb32 (val, ptr); | |
4487 | } | |
4488 | ||
4489 | /* Store a 16-bit Thumb insn into an output section not processed by | |
4490 | elf32_arm_write_section. */ | |
4491 | ||
4492 | static void | |
8029a119 NC |
4493 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
4494 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
4495 | { |
4496 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4497 | bfd_putl16 (val, ptr); | |
4498 | else | |
4499 | bfd_putb16 (val, ptr); | |
4500 | } | |
4501 | ||
a504d23a LA |
4502 | /* Store a Thumb2 insn into an output section not processed by |
4503 | elf32_arm_write_section. */ | |
4504 | ||
4505 | static void | |
4506 | put_thumb2_insn (struct elf32_arm_link_hash_table * htab, | |
b98e6871 | 4507 | bfd * output_bfd, bfd_vma val, bfd_byte * ptr) |
a504d23a LA |
4508 | { |
4509 | /* T2 instructions are 16-bit streamed. */ | |
4510 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
4511 | { | |
4512 | bfd_putl16 ((val >> 16) & 0xffff, ptr); | |
4513 | bfd_putl16 ((val & 0xffff), ptr + 2); | |
4514 | } | |
4515 | else | |
4516 | { | |
4517 | bfd_putb16 ((val >> 16) & 0xffff, ptr); | |
4518 | bfd_putb16 ((val & 0xffff), ptr + 2); | |
4519 | } | |
4520 | } | |
4521 | ||
0855e32b NS |
4522 | /* If it's possible to change R_TYPE to a more efficient access |
4523 | model, return the new reloc type. */ | |
4524 | ||
4525 | static unsigned | |
b38cadfb | 4526 | elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, |
0855e32b NS |
4527 | struct elf_link_hash_entry *h) |
4528 | { | |
4529 | int is_local = (h == NULL); | |
4530 | ||
0e1862bb L |
4531 | if (bfd_link_pic (info) |
4532 | || (h && h->root.type == bfd_link_hash_undefweak)) | |
0855e32b NS |
4533 | return r_type; |
4534 | ||
b38cadfb | 4535 | /* We do not support relaxations for Old TLS models. */ |
0855e32b NS |
4536 | switch (r_type) |
4537 | { | |
4538 | case R_ARM_TLS_GOTDESC: | |
4539 | case R_ARM_TLS_CALL: | |
4540 | case R_ARM_THM_TLS_CALL: | |
4541 | case R_ARM_TLS_DESCSEQ: | |
4542 | case R_ARM_THM_TLS_DESCSEQ: | |
4543 | return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32; | |
4544 | } | |
4545 | ||
4546 | return r_type; | |
4547 | } | |
4548 | ||
48229727 JB |
4549 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
4550 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
4551 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
34e77a92 RS |
4552 | const char *, unsigned char, enum arm_st_branch_type, |
4553 | struct elf_link_hash_entry *, bfd_boolean *, char **); | |
48229727 | 4554 | |
4563a860 JB |
4555 | static unsigned int |
4556 | arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) | |
4557 | { | |
4558 | switch (stub_type) | |
4559 | { | |
4560 | case arm_stub_a8_veneer_b_cond: | |
4561 | case arm_stub_a8_veneer_b: | |
4562 | case arm_stub_a8_veneer_bl: | |
4563 | return 2; | |
4564 | ||
4565 | case arm_stub_long_branch_any_any: | |
4566 | case arm_stub_long_branch_v4t_arm_thumb: | |
4567 | case arm_stub_long_branch_thumb_only: | |
80c135e5 | 4568 | case arm_stub_long_branch_thumb2_only: |
d5a67c02 | 4569 | case arm_stub_long_branch_thumb2_only_pure: |
4563a860 JB |
4570 | case arm_stub_long_branch_v4t_thumb_thumb: |
4571 | case arm_stub_long_branch_v4t_thumb_arm: | |
4572 | case arm_stub_short_branch_v4t_thumb_arm: | |
4573 | case arm_stub_long_branch_any_arm_pic: | |
4574 | case arm_stub_long_branch_any_thumb_pic: | |
4575 | case arm_stub_long_branch_v4t_thumb_thumb_pic: | |
4576 | case arm_stub_long_branch_v4t_arm_thumb_pic: | |
4577 | case arm_stub_long_branch_v4t_thumb_arm_pic: | |
4578 | case arm_stub_long_branch_thumb_only_pic: | |
0855e32b NS |
4579 | case arm_stub_long_branch_any_tls_pic: |
4580 | case arm_stub_long_branch_v4t_thumb_tls_pic: | |
4ba2ef8f | 4581 | case arm_stub_cmse_branch_thumb_only: |
4563a860 JB |
4582 | case arm_stub_a8_veneer_blx: |
4583 | return 4; | |
b38cadfb | 4584 | |
7a89b94e NC |
4585 | case arm_stub_long_branch_arm_nacl: |
4586 | case arm_stub_long_branch_arm_nacl_pic: | |
4587 | return 16; | |
4588 | ||
4563a860 JB |
4589 | default: |
4590 | abort (); /* Should be unreachable. */ | |
4591 | } | |
4592 | } | |
4593 | ||
4f4faa4d TP |
4594 | /* Returns whether stubs of type STUB_TYPE take over the symbol they are |
4595 | veneering (TRUE) or have their own symbol (FALSE). */ | |
4596 | ||
4597 | static bfd_boolean | |
4598 | arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type) | |
4599 | { | |
4600 | if (stub_type >= max_stub_type) | |
4601 | abort (); /* Should be unreachable. */ | |
4602 | ||
4ba2ef8f TP |
4603 | switch (stub_type) |
4604 | { | |
4605 | case arm_stub_cmse_branch_thumb_only: | |
4606 | return TRUE; | |
4607 | ||
4608 | default: | |
4609 | return FALSE; | |
4610 | } | |
4611 | ||
4612 | abort (); /* Should be unreachable. */ | |
4f4faa4d TP |
4613 | } |
4614 | ||
d7c5bd02 TP |
4615 | /* Returns the padding needed for the dedicated section used stubs of type |
4616 | STUB_TYPE. */ | |
4617 | ||
4618 | static int | |
4619 | arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type) | |
4620 | { | |
4621 | if (stub_type >= max_stub_type) | |
4622 | abort (); /* Should be unreachable. */ | |
4623 | ||
4ba2ef8f TP |
4624 | switch (stub_type) |
4625 | { | |
4626 | case arm_stub_cmse_branch_thumb_only: | |
4627 | return 32; | |
4628 | ||
4629 | default: | |
4630 | return 0; | |
4631 | } | |
4632 | ||
4633 | abort (); /* Should be unreachable. */ | |
d7c5bd02 TP |
4634 | } |
4635 | ||
906e58ca NC |
4636 | static bfd_boolean |
4637 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, | |
4638 | void * in_arg) | |
4639 | { | |
7a89b94e | 4640 | #define MAXRELOCS 3 |
906e58ca | 4641 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 4642 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 4643 | struct bfd_link_info *info; |
906e58ca NC |
4644 | asection *stub_sec; |
4645 | bfd *stub_bfd; | |
906e58ca NC |
4646 | bfd_byte *loc; |
4647 | bfd_vma sym_value; | |
4648 | int template_size; | |
4649 | int size; | |
d3ce72d0 | 4650 | const insn_sequence *template_sequence; |
906e58ca | 4651 | int i; |
48229727 JB |
4652 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
4653 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
4654 | int nrelocs = 0; | |
906e58ca NC |
4655 | |
4656 | /* Massage our args to the form they really have. */ | |
4657 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
4658 | info = (struct bfd_link_info *) in_arg; | |
4659 | ||
4660 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
4661 | if (globals == NULL) |
4662 | return FALSE; | |
906e58ca | 4663 | |
906e58ca NC |
4664 | stub_sec = stub_entry->stub_sec; |
4665 | ||
4dfe6ac6 | 4666 | if ((globals->fix_cortex_a8 < 0) |
4563a860 JB |
4667 | != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) |
4668 | /* We have to do less-strictly-aligned fixes last. */ | |
eb7c4339 | 4669 | return TRUE; |
fe33d2fa | 4670 | |
906e58ca NC |
4671 | /* Make a note of the offset within the stubs for this entry. */ |
4672 | stub_entry->stub_offset = stub_sec->size; | |
4673 | loc = stub_sec->contents + stub_entry->stub_offset; | |
4674 | ||
4675 | stub_bfd = stub_sec->owner; | |
4676 | ||
906e58ca NC |
4677 | /* This is the address of the stub destination. */ |
4678 | sym_value = (stub_entry->target_value | |
4679 | + stub_entry->target_section->output_offset | |
4680 | + stub_entry->target_section->output_section->vma); | |
4681 | ||
d3ce72d0 | 4682 | template_sequence = stub_entry->stub_template; |
461a49ca | 4683 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
4684 | |
4685 | size = 0; | |
461a49ca | 4686 | for (i = 0; i < template_size; i++) |
906e58ca | 4687 | { |
d3ce72d0 | 4688 | switch (template_sequence[i].type) |
461a49ca DJ |
4689 | { |
4690 | case THUMB16_TYPE: | |
48229727 | 4691 | { |
d3ce72d0 NC |
4692 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
4693 | if (template_sequence[i].reloc_addend != 0) | |
48229727 | 4694 | { |
99059e56 RM |
4695 | /* We've borrowed the reloc_addend field to mean we should |
4696 | insert a condition code into this (Thumb-1 branch) | |
4697 | instruction. See THUMB16_BCOND_INSN. */ | |
4698 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
4699 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
48229727 | 4700 | } |
fe33d2fa | 4701 | bfd_put_16 (stub_bfd, data, loc + size); |
48229727 JB |
4702 | size += 2; |
4703 | } | |
461a49ca | 4704 | break; |
906e58ca | 4705 | |
48229727 | 4706 | case THUMB32_TYPE: |
fe33d2fa CL |
4707 | bfd_put_16 (stub_bfd, |
4708 | (template_sequence[i].data >> 16) & 0xffff, | |
4709 | loc + size); | |
4710 | bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, | |
4711 | loc + size + 2); | |
99059e56 RM |
4712 | if (template_sequence[i].r_type != R_ARM_NONE) |
4713 | { | |
4714 | stub_reloc_idx[nrelocs] = i; | |
4715 | stub_reloc_offset[nrelocs++] = size; | |
4716 | } | |
4717 | size += 4; | |
4718 | break; | |
48229727 | 4719 | |
461a49ca | 4720 | case ARM_TYPE: |
fe33d2fa CL |
4721 | bfd_put_32 (stub_bfd, template_sequence[i].data, |
4722 | loc + size); | |
461a49ca DJ |
4723 | /* Handle cases where the target is encoded within the |
4724 | instruction. */ | |
d3ce72d0 | 4725 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 4726 | { |
48229727 JB |
4727 | stub_reloc_idx[nrelocs] = i; |
4728 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4729 | } |
4730 | size += 4; | |
4731 | break; | |
4732 | ||
4733 | case DATA_TYPE: | |
d3ce72d0 | 4734 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
4735 | stub_reloc_idx[nrelocs] = i; |
4736 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
4737 | size += 4; |
4738 | break; | |
4739 | ||
4740 | default: | |
4741 | BFD_FAIL (); | |
4742 | return FALSE; | |
4743 | } | |
906e58ca | 4744 | } |
461a49ca | 4745 | |
906e58ca NC |
4746 | stub_sec->size += size; |
4747 | ||
461a49ca DJ |
4748 | /* Stub size has already been computed in arm_size_one_stub. Check |
4749 | consistency. */ | |
4750 | BFD_ASSERT (size == stub_entry->stub_size); | |
4751 | ||
906e58ca | 4752 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
35fc36a8 | 4753 | if (stub_entry->branch_type == ST_BRANCH_TO_THUMB) |
906e58ca NC |
4754 | sym_value |= 1; |
4755 | ||
48229727 JB |
4756 | /* Assume there is at least one and at most MAXRELOCS entries to relocate |
4757 | in each stub. */ | |
4758 | BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS); | |
c820be07 | 4759 | |
48229727 | 4760 | for (i = 0; i < nrelocs; i++) |
8d9d9490 TP |
4761 | { |
4762 | Elf_Internal_Rela rel; | |
4763 | bfd_boolean unresolved_reloc; | |
4764 | char *error_message; | |
4765 | bfd_vma points_to = | |
4766 | sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend; | |
4767 | ||
4768 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
4769 | rel.r_info = ELF32_R_INFO (0, | |
4770 | template_sequence[stub_reloc_idx[i]].r_type); | |
4771 | rel.r_addend = 0; | |
4772 | ||
4773 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
4774 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
4775 | template should refer back to the instruction after the original | |
4776 | branch. We use target_section as Cortex-A8 erratum workaround stubs | |
4777 | are only generated when both source and target are in the same | |
4778 | section. */ | |
4779 | points_to = stub_entry->target_section->output_section->vma | |
4780 | + stub_entry->target_section->output_offset | |
4781 | + stub_entry->source_value; | |
4782 | ||
4783 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
4784 | (template_sequence[stub_reloc_idx[i]].r_type), | |
4785 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, | |
4786 | points_to, info, stub_entry->target_section, "", STT_FUNC, | |
4787 | stub_entry->branch_type, | |
4788 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, | |
4789 | &error_message); | |
4790 | } | |
906e58ca NC |
4791 | |
4792 | return TRUE; | |
48229727 | 4793 | #undef MAXRELOCS |
906e58ca NC |
4794 | } |
4795 | ||
48229727 JB |
4796 | /* Calculate the template, template size and instruction size for a stub. |
4797 | Return value is the instruction size. */ | |
906e58ca | 4798 | |
48229727 JB |
4799 | static unsigned int |
4800 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
4801 | const insn_sequence **stub_template, | |
4802 | int *stub_template_size) | |
906e58ca | 4803 | { |
d3ce72d0 | 4804 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
4805 | int template_size = 0, i; |
4806 | unsigned int size; | |
906e58ca | 4807 | |
d3ce72d0 | 4808 | template_sequence = stub_definitions[stub_type].template_sequence; |
2a229407 AM |
4809 | if (stub_template) |
4810 | *stub_template = template_sequence; | |
4811 | ||
48229727 | 4812 | template_size = stub_definitions[stub_type].template_size; |
2a229407 AM |
4813 | if (stub_template_size) |
4814 | *stub_template_size = template_size; | |
906e58ca NC |
4815 | |
4816 | size = 0; | |
461a49ca DJ |
4817 | for (i = 0; i < template_size; i++) |
4818 | { | |
d3ce72d0 | 4819 | switch (template_sequence[i].type) |
461a49ca DJ |
4820 | { |
4821 | case THUMB16_TYPE: | |
4822 | size += 2; | |
4823 | break; | |
4824 | ||
4825 | case ARM_TYPE: | |
48229727 | 4826 | case THUMB32_TYPE: |
461a49ca DJ |
4827 | case DATA_TYPE: |
4828 | size += 4; | |
4829 | break; | |
4830 | ||
4831 | default: | |
4832 | BFD_FAIL (); | |
2a229407 | 4833 | return 0; |
461a49ca DJ |
4834 | } |
4835 | } | |
4836 | ||
48229727 JB |
4837 | return size; |
4838 | } | |
4839 | ||
4840 | /* As above, but don't actually build the stub. Just bump offset so | |
4841 | we know stub section sizes. */ | |
4842 | ||
4843 | static bfd_boolean | |
4844 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, | |
c7e2358a | 4845 | void *in_arg ATTRIBUTE_UNUSED) |
48229727 JB |
4846 | { |
4847 | struct elf32_arm_stub_hash_entry *stub_entry; | |
d3ce72d0 | 4848 | const insn_sequence *template_sequence; |
48229727 JB |
4849 | int template_size, size; |
4850 | ||
4851 | /* Massage our args to the form they really have. */ | |
4852 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
48229727 JB |
4853 | |
4854 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) | |
4855 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); | |
4856 | ||
d3ce72d0 | 4857 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
4858 | &template_size); |
4859 | ||
461a49ca | 4860 | stub_entry->stub_size = size; |
d3ce72d0 | 4861 | stub_entry->stub_template = template_sequence; |
461a49ca DJ |
4862 | stub_entry->stub_template_size = template_size; |
4863 | ||
906e58ca NC |
4864 | size = (size + 7) & ~7; |
4865 | stub_entry->stub_sec->size += size; | |
461a49ca | 4866 | |
906e58ca NC |
4867 | return TRUE; |
4868 | } | |
4869 | ||
4870 | /* External entry points for sizing and building linker stubs. */ | |
4871 | ||
4872 | /* Set up various things so that we can make a list of input sections | |
4873 | for each output section included in the link. Returns -1 on error, | |
4874 | 0 when no stubs will be needed, and 1 on success. */ | |
4875 | ||
4876 | int | |
4877 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
4878 | struct bfd_link_info *info) | |
4879 | { | |
4880 | bfd *input_bfd; | |
4881 | unsigned int bfd_count; | |
7292b3ac | 4882 | unsigned int top_id, top_index; |
906e58ca NC |
4883 | asection *section; |
4884 | asection **input_list, **list; | |
4885 | bfd_size_type amt; | |
4886 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4887 | ||
4dfe6ac6 NC |
4888 | if (htab == NULL) |
4889 | return 0; | |
906e58ca NC |
4890 | if (! is_elf_hash_table (htab)) |
4891 | return 0; | |
4892 | ||
4893 | /* Count the number of input BFDs and find the top input section id. */ | |
4894 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
4895 | input_bfd != NULL; | |
c72f2fb2 | 4896 | input_bfd = input_bfd->link.next) |
906e58ca NC |
4897 | { |
4898 | bfd_count += 1; | |
4899 | for (section = input_bfd->sections; | |
4900 | section != NULL; | |
4901 | section = section->next) | |
4902 | { | |
4903 | if (top_id < section->id) | |
4904 | top_id = section->id; | |
4905 | } | |
4906 | } | |
4907 | htab->bfd_count = bfd_count; | |
4908 | ||
4909 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 4910 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
4911 | if (htab->stub_group == NULL) |
4912 | return -1; | |
fe33d2fa | 4913 | htab->top_id = top_id; |
906e58ca NC |
4914 | |
4915 | /* We can't use output_bfd->section_count here to find the top output | |
4916 | section index as some sections may have been removed, and | |
4917 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
4918 | for (section = output_bfd->sections, top_index = 0; | |
4919 | section != NULL; | |
4920 | section = section->next) | |
4921 | { | |
4922 | if (top_index < section->index) | |
4923 | top_index = section->index; | |
4924 | } | |
4925 | ||
4926 | htab->top_index = top_index; | |
4927 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 4928 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
4929 | htab->input_list = input_list; |
4930 | if (input_list == NULL) | |
4931 | return -1; | |
4932 | ||
4933 | /* For sections we aren't interested in, mark their entries with a | |
4934 | value we can check later. */ | |
4935 | list = input_list + top_index; | |
4936 | do | |
4937 | *list = bfd_abs_section_ptr; | |
4938 | while (list-- != input_list); | |
4939 | ||
4940 | for (section = output_bfd->sections; | |
4941 | section != NULL; | |
4942 | section = section->next) | |
4943 | { | |
4944 | if ((section->flags & SEC_CODE) != 0) | |
4945 | input_list[section->index] = NULL; | |
4946 | } | |
4947 | ||
4948 | return 1; | |
4949 | } | |
4950 | ||
4951 | /* The linker repeatedly calls this function for each input section, | |
4952 | in the order that input sections are linked into output sections. | |
4953 | Build lists of input sections to determine groupings between which | |
4954 | we may insert linker stubs. */ | |
4955 | ||
4956 | void | |
4957 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
4958 | asection *isec) | |
4959 | { | |
4960 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
4961 | ||
4dfe6ac6 NC |
4962 | if (htab == NULL) |
4963 | return; | |
4964 | ||
906e58ca NC |
4965 | if (isec->output_section->index <= htab->top_index) |
4966 | { | |
4967 | asection **list = htab->input_list + isec->output_section->index; | |
4968 | ||
a7470592 | 4969 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
4970 | { |
4971 | /* Steal the link_sec pointer for our list. */ | |
4972 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
4973 | /* This happens to make the list in reverse order, | |
07d72278 | 4974 | which we reverse later. */ |
906e58ca NC |
4975 | PREV_SEC (isec) = *list; |
4976 | *list = isec; | |
4977 | } | |
4978 | } | |
4979 | } | |
4980 | ||
4981 | /* See whether we can group stub sections together. Grouping stub | |
4982 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 4983 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
4984 | .fini output sections respectively, because glibc splits the |
4985 | _init and _fini functions into multiple parts. Putting a stub in | |
4986 | the middle of a function is not a good idea. */ | |
4987 | ||
4988 | static void | |
4989 | group_sections (struct elf32_arm_link_hash_table *htab, | |
4990 | bfd_size_type stub_group_size, | |
07d72278 | 4991 | bfd_boolean stubs_always_after_branch) |
906e58ca | 4992 | { |
07d72278 | 4993 | asection **list = htab->input_list; |
906e58ca NC |
4994 | |
4995 | do | |
4996 | { | |
4997 | asection *tail = *list; | |
07d72278 | 4998 | asection *head; |
906e58ca NC |
4999 | |
5000 | if (tail == bfd_abs_section_ptr) | |
5001 | continue; | |
5002 | ||
07d72278 DJ |
5003 | /* Reverse the list: we must avoid placing stubs at the |
5004 | beginning of the section because the beginning of the text | |
5005 | section may be required for an interrupt vector in bare metal | |
5006 | code. */ | |
5007 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
5008 | head = NULL; |
5009 | while (tail != NULL) | |
99059e56 RM |
5010 | { |
5011 | /* Pop from tail. */ | |
5012 | asection *item = tail; | |
5013 | tail = PREV_SEC (item); | |
e780aef2 | 5014 | |
99059e56 RM |
5015 | /* Push on head. */ |
5016 | NEXT_SEC (item) = head; | |
5017 | head = item; | |
5018 | } | |
07d72278 DJ |
5019 | |
5020 | while (head != NULL) | |
906e58ca NC |
5021 | { |
5022 | asection *curr; | |
07d72278 | 5023 | asection *next; |
e780aef2 CL |
5024 | bfd_vma stub_group_start = head->output_offset; |
5025 | bfd_vma end_of_next; | |
906e58ca | 5026 | |
07d72278 | 5027 | curr = head; |
e780aef2 | 5028 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 5029 | { |
e780aef2 CL |
5030 | next = NEXT_SEC (curr); |
5031 | end_of_next = next->output_offset + next->size; | |
5032 | if (end_of_next - stub_group_start >= stub_group_size) | |
5033 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 5034 | break; |
e780aef2 CL |
5035 | /* Add NEXT to the group. */ |
5036 | curr = next; | |
8cd931b7 | 5037 | } |
906e58ca | 5038 | |
07d72278 | 5039 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 5040 | than stub_group_size and thus can be handled by one stub |
07d72278 | 5041 | section. (Or the head section is itself larger than |
906e58ca NC |
5042 | stub_group_size, in which case we may be toast.) |
5043 | We should really be keeping track of the total size of | |
5044 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 5045 | section size. */ |
906e58ca NC |
5046 | do |
5047 | { | |
07d72278 | 5048 | next = NEXT_SEC (head); |
906e58ca | 5049 | /* Set up this stub group. */ |
07d72278 | 5050 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 5051 | } |
07d72278 | 5052 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
5053 | |
5054 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
5055 | bytes after the stub section can be handled by it too. */ |
5056 | if (!stubs_always_after_branch) | |
906e58ca | 5057 | { |
e780aef2 CL |
5058 | stub_group_start = curr->output_offset + curr->size; |
5059 | ||
8cd931b7 | 5060 | while (next != NULL) |
906e58ca | 5061 | { |
e780aef2 CL |
5062 | end_of_next = next->output_offset + next->size; |
5063 | if (end_of_next - stub_group_start >= stub_group_size) | |
5064 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 5065 | break; |
e780aef2 | 5066 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
5067 | head = next; |
5068 | next = NEXT_SEC (head); | |
5069 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
5070 | } |
5071 | } | |
07d72278 | 5072 | head = next; |
906e58ca NC |
5073 | } |
5074 | } | |
07d72278 | 5075 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
5076 | |
5077 | free (htab->input_list); | |
5078 | #undef PREV_SEC | |
07d72278 | 5079 | #undef NEXT_SEC |
906e58ca NC |
5080 | } |
5081 | ||
48229727 JB |
5082 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
5083 | erratum fix. */ | |
5084 | ||
5085 | static int | |
5086 | a8_reloc_compare (const void *a, const void *b) | |
5087 | { | |
21d799b5 NC |
5088 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
5089 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
5090 | |
5091 | if (ra->from < rb->from) | |
5092 | return -1; | |
5093 | else if (ra->from > rb->from) | |
5094 | return 1; | |
5095 | else | |
5096 | return 0; | |
5097 | } | |
5098 | ||
5099 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
5100 | const char *, char **); | |
5101 | ||
5102 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
5103 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 5104 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
5105 | otherwise. */ |
5106 | ||
81694485 NC |
5107 | static bfd_boolean |
5108 | cortex_a8_erratum_scan (bfd *input_bfd, | |
5109 | struct bfd_link_info *info, | |
48229727 JB |
5110 | struct a8_erratum_fix **a8_fixes_p, |
5111 | unsigned int *num_a8_fixes_p, | |
5112 | unsigned int *a8_fix_table_size_p, | |
5113 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
5114 | unsigned int num_a8_relocs, |
5115 | unsigned prev_num_a8_fixes, | |
5116 | bfd_boolean *stub_changed_p) | |
48229727 JB |
5117 | { |
5118 | asection *section; | |
5119 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
5120 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
5121 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
5122 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
5123 | ||
4dfe6ac6 NC |
5124 | if (htab == NULL) |
5125 | return FALSE; | |
5126 | ||
48229727 JB |
5127 | for (section = input_bfd->sections; |
5128 | section != NULL; | |
5129 | section = section->next) | |
5130 | { | |
5131 | bfd_byte *contents = NULL; | |
5132 | struct _arm_elf_section_data *sec_data; | |
5133 | unsigned int span; | |
5134 | bfd_vma base_vma; | |
5135 | ||
5136 | if (elf_section_type (section) != SHT_PROGBITS | |
99059e56 RM |
5137 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 |
5138 | || (section->flags & SEC_EXCLUDE) != 0 | |
5139 | || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS) | |
5140 | || (section->output_section == bfd_abs_section_ptr)) | |
5141 | continue; | |
48229727 JB |
5142 | |
5143 | base_vma = section->output_section->vma + section->output_offset; | |
5144 | ||
5145 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
99059e56 | 5146 | contents = elf_section_data (section)->this_hdr.contents; |
48229727 | 5147 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) |
99059e56 | 5148 | return TRUE; |
48229727 JB |
5149 | |
5150 | sec_data = elf32_arm_section_data (section); | |
5151 | ||
5152 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
5153 | { |
5154 | unsigned int span_start = sec_data->map[span].vma; | |
5155 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
5156 | ? section->size : sec_data->map[span + 1].vma; | |
5157 | unsigned int i; | |
5158 | char span_type = sec_data->map[span].type; | |
5159 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; | |
5160 | ||
5161 | if (span_type != 't') | |
5162 | continue; | |
5163 | ||
5164 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
5165 | if (((base_vma + span_start) & ~0xfff) | |
48229727 | 5166 | == ((base_vma + span_end) & ~0xfff)) |
99059e56 RM |
5167 | continue; |
5168 | ||
5169 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
5170 | ||
5171 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
5172 | * The branch target is in the same 4KB region as the | |
5173 | first half of the branch. | |
5174 | * The instruction before the branch is a 32-bit | |
5175 | length non-branch instruction. */ | |
5176 | for (i = span_start; i < span_end;) | |
5177 | { | |
5178 | unsigned int insn = bfd_getl16 (&contents[i]); | |
5179 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; | |
48229727 JB |
5180 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; |
5181 | ||
99059e56 RM |
5182 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) |
5183 | insn_32bit = TRUE; | |
48229727 JB |
5184 | |
5185 | if (insn_32bit) | |
99059e56 RM |
5186 | { |
5187 | /* Load the rest of the insn (in manual-friendly order). */ | |
5188 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
5189 | ||
5190 | /* Encoding T4: B<c>.W. */ | |
5191 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
5192 | /* Encoding T1: BL<c>.W. */ | |
5193 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
5194 | /* Encoding T2: BLX<c>.W. */ | |
5195 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
48229727 JB |
5196 | /* Encoding T3: B<c>.W (not permitted in IT block). */ |
5197 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
5198 | && (insn & 0x07f00000) != 0x03800000; | |
5199 | } | |
5200 | ||
5201 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
fe33d2fa | 5202 | |
99059e56 | 5203 | if (((base_vma + i) & 0xfff) == 0xffe |
81694485 NC |
5204 | && insn_32bit |
5205 | && is_32bit_branch | |
5206 | && last_was_32bit | |
5207 | && ! last_was_branch) | |
99059e56 RM |
5208 | { |
5209 | bfd_signed_vma offset = 0; | |
5210 | bfd_boolean force_target_arm = FALSE; | |
48229727 | 5211 | bfd_boolean force_target_thumb = FALSE; |
99059e56 RM |
5212 | bfd_vma target; |
5213 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5214 | struct a8_erratum_reloc key, *found; | |
5215 | bfd_boolean use_plt = FALSE; | |
48229727 | 5216 | |
99059e56 RM |
5217 | key.from = base_vma + i; |
5218 | found = (struct a8_erratum_reloc *) | |
5219 | bsearch (&key, a8_relocs, num_a8_relocs, | |
5220 | sizeof (struct a8_erratum_reloc), | |
5221 | &a8_reloc_compare); | |
48229727 JB |
5222 | |
5223 | if (found) | |
5224 | { | |
5225 | char *error_message = NULL; | |
5226 | struct elf_link_hash_entry *entry; | |
5227 | ||
5228 | /* We don't care about the error returned from this | |
99059e56 | 5229 | function, only if there is glue or not. */ |
48229727 JB |
5230 | entry = find_thumb_glue (info, found->sym_name, |
5231 | &error_message); | |
5232 | ||
5233 | if (entry) | |
5234 | found->non_a8_stub = TRUE; | |
5235 | ||
92750f34 | 5236 | /* Keep a simpler condition, for the sake of clarity. */ |
362d30a1 | 5237 | if (htab->root.splt != NULL && found->hash != NULL |
92750f34 DJ |
5238 | && found->hash->root.plt.offset != (bfd_vma) -1) |
5239 | use_plt = TRUE; | |
5240 | ||
5241 | if (found->r_type == R_ARM_THM_CALL) | |
5242 | { | |
35fc36a8 RS |
5243 | if (found->branch_type == ST_BRANCH_TO_ARM |
5244 | || use_plt) | |
92750f34 DJ |
5245 | force_target_arm = TRUE; |
5246 | else | |
5247 | force_target_thumb = TRUE; | |
5248 | } | |
48229727 JB |
5249 | } |
5250 | ||
99059e56 | 5251 | /* Check if we have an offending branch instruction. */ |
48229727 JB |
5252 | |
5253 | if (found && found->non_a8_stub) | |
5254 | /* We've already made a stub for this instruction, e.g. | |
5255 | it's a long branch or a Thumb->ARM stub. Assume that | |
5256 | stub will suffice to work around the A8 erratum (see | |
5257 | setting of always_after_branch above). */ | |
5258 | ; | |
99059e56 RM |
5259 | else if (is_bcc) |
5260 | { | |
5261 | offset = (insn & 0x7ff) << 1; | |
5262 | offset |= (insn & 0x3f0000) >> 4; | |
5263 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
5264 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
5265 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
5266 | if (offset & 0x100000) | |
5267 | offset |= ~ ((bfd_signed_vma) 0xfffff); | |
5268 | stub_type = arm_stub_a8_veneer_b_cond; | |
5269 | } | |
5270 | else if (is_b || is_bl || is_blx) | |
5271 | { | |
5272 | int s = (insn & 0x4000000) != 0; | |
5273 | int j1 = (insn & 0x2000) != 0; | |
5274 | int j2 = (insn & 0x800) != 0; | |
5275 | int i1 = !(j1 ^ s); | |
5276 | int i2 = !(j2 ^ s); | |
5277 | ||
5278 | offset = (insn & 0x7ff) << 1; | |
5279 | offset |= (insn & 0x3ff0000) >> 4; | |
5280 | offset |= i2 << 22; | |
5281 | offset |= i1 << 23; | |
5282 | offset |= s << 24; | |
5283 | if (offset & 0x1000000) | |
5284 | offset |= ~ ((bfd_signed_vma) 0xffffff); | |
5285 | ||
5286 | if (is_blx) | |
5287 | offset &= ~ ((bfd_signed_vma) 3); | |
5288 | ||
5289 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
5290 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
5291 | } | |
5292 | ||
5293 | if (stub_type != arm_stub_none) | |
5294 | { | |
5295 | bfd_vma pc_for_insn = base_vma + i + 4; | |
48229727 JB |
5296 | |
5297 | /* The original instruction is a BL, but the target is | |
99059e56 | 5298 | an ARM instruction. If we were not making a stub, |
48229727 JB |
5299 | the BL would have been converted to a BLX. Use the |
5300 | BLX stub instead in that case. */ | |
5301 | if (htab->use_blx && force_target_arm | |
5302 | && stub_type == arm_stub_a8_veneer_bl) | |
5303 | { | |
5304 | stub_type = arm_stub_a8_veneer_blx; | |
5305 | is_blx = TRUE; | |
5306 | is_bl = FALSE; | |
5307 | } | |
5308 | /* Conversely, if the original instruction was | |
5309 | BLX but the target is Thumb mode, use the BL | |
5310 | stub. */ | |
5311 | else if (force_target_thumb | |
5312 | && stub_type == arm_stub_a8_veneer_blx) | |
5313 | { | |
5314 | stub_type = arm_stub_a8_veneer_bl; | |
5315 | is_blx = FALSE; | |
5316 | is_bl = TRUE; | |
5317 | } | |
5318 | ||
99059e56 RM |
5319 | if (is_blx) |
5320 | pc_for_insn &= ~ ((bfd_vma) 3); | |
48229727 | 5321 | |
99059e56 RM |
5322 | /* If we found a relocation, use the proper destination, |
5323 | not the offset in the (unrelocated) instruction. | |
48229727 JB |
5324 | Note this is always done if we switched the stub type |
5325 | above. */ | |
99059e56 RM |
5326 | if (found) |
5327 | offset = | |
81694485 | 5328 | (bfd_signed_vma) (found->destination - pc_for_insn); |
48229727 | 5329 | |
99059e56 RM |
5330 | /* If the stub will use a Thumb-mode branch to a |
5331 | PLT target, redirect it to the preceding Thumb | |
5332 | entry point. */ | |
5333 | if (stub_type != arm_stub_a8_veneer_blx && use_plt) | |
5334 | offset -= PLT_THUMB_STUB_SIZE; | |
7d24e6a6 | 5335 | |
99059e56 | 5336 | target = pc_for_insn + offset; |
48229727 | 5337 | |
99059e56 RM |
5338 | /* The BLX stub is ARM-mode code. Adjust the offset to |
5339 | take the different PC value (+8 instead of +4) into | |
48229727 | 5340 | account. */ |
99059e56 RM |
5341 | if (stub_type == arm_stub_a8_veneer_blx) |
5342 | offset += 4; | |
5343 | ||
5344 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
5345 | { | |
5346 | char *stub_name = NULL; | |
5347 | ||
5348 | if (num_a8_fixes == a8_fix_table_size) | |
5349 | { | |
5350 | a8_fix_table_size *= 2; | |
5351 | a8_fixes = (struct a8_erratum_fix *) | |
5352 | bfd_realloc (a8_fixes, | |
5353 | sizeof (struct a8_erratum_fix) | |
5354 | * a8_fix_table_size); | |
5355 | } | |
48229727 | 5356 | |
eb7c4339 NS |
5357 | if (num_a8_fixes < prev_num_a8_fixes) |
5358 | { | |
5359 | /* If we're doing a subsequent scan, | |
5360 | check if we've found the same fix as | |
5361 | before, and try and reuse the stub | |
5362 | name. */ | |
5363 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
5364 | if ((a8_fixes[num_a8_fixes].section != section) | |
5365 | || (a8_fixes[num_a8_fixes].offset != i)) | |
5366 | { | |
5367 | free (stub_name); | |
5368 | stub_name = NULL; | |
5369 | *stub_changed_p = TRUE; | |
5370 | } | |
5371 | } | |
5372 | ||
5373 | if (!stub_name) | |
5374 | { | |
21d799b5 | 5375 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
5376 | if (stub_name != NULL) |
5377 | sprintf (stub_name, "%x:%x", section->id, i); | |
5378 | } | |
48229727 | 5379 | |
99059e56 RM |
5380 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; |
5381 | a8_fixes[num_a8_fixes].section = section; | |
5382 | a8_fixes[num_a8_fixes].offset = i; | |
8d9d9490 TP |
5383 | a8_fixes[num_a8_fixes].target_offset = |
5384 | target - base_vma; | |
99059e56 RM |
5385 | a8_fixes[num_a8_fixes].orig_insn = insn; |
5386 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
5387 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
5388 | a8_fixes[num_a8_fixes].branch_type = | |
35fc36a8 | 5389 | is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB; |
48229727 | 5390 | |
99059e56 RM |
5391 | num_a8_fixes++; |
5392 | } | |
5393 | } | |
5394 | } | |
48229727 | 5395 | |
99059e56 RM |
5396 | i += insn_32bit ? 4 : 2; |
5397 | last_was_32bit = insn_32bit; | |
48229727 | 5398 | last_was_branch = is_32bit_branch; |
99059e56 RM |
5399 | } |
5400 | } | |
48229727 JB |
5401 | |
5402 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
99059e56 | 5403 | free (contents); |
48229727 | 5404 | } |
fe33d2fa | 5405 | |
48229727 JB |
5406 | *a8_fixes_p = a8_fixes; |
5407 | *num_a8_fixes_p = num_a8_fixes; | |
5408 | *a8_fix_table_size_p = a8_fix_table_size; | |
fe33d2fa | 5409 | |
81694485 | 5410 | return FALSE; |
48229727 JB |
5411 | } |
5412 | ||
b715f643 TP |
5413 | /* Create or update a stub entry depending on whether the stub can already be |
5414 | found in HTAB. The stub is identified by: | |
5415 | - its type STUB_TYPE | |
5416 | - its source branch (note that several can share the same stub) whose | |
5417 | section and relocation (if any) are given by SECTION and IRELA | |
5418 | respectively | |
5419 | - its target symbol whose input section, hash, name, value and branch type | |
5420 | are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE | |
5421 | respectively | |
5422 | ||
5423 | If found, the value of the stub's target symbol is updated from SYM_VALUE | |
5424 | and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to | |
5425 | TRUE and the stub entry is initialized. | |
5426 | ||
5427 | Returns whether the stub could be successfully created or updated, or FALSE | |
5428 | if an error occured. */ | |
5429 | ||
5430 | static bfd_boolean | |
5431 | elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab, | |
5432 | enum elf32_arm_stub_type stub_type, asection *section, | |
5433 | Elf_Internal_Rela *irela, asection *sym_sec, | |
5434 | struct elf32_arm_link_hash_entry *hash, char *sym_name, | |
5435 | bfd_vma sym_value, enum arm_st_branch_type branch_type, | |
5436 | bfd_boolean *new_stub) | |
5437 | { | |
5438 | const asection *id_sec; | |
5439 | char *stub_name; | |
5440 | struct elf32_arm_stub_hash_entry *stub_entry; | |
5441 | unsigned int r_type; | |
4f4faa4d | 5442 | bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type); |
b715f643 TP |
5443 | |
5444 | BFD_ASSERT (stub_type != arm_stub_none); | |
5445 | *new_stub = FALSE; | |
5446 | ||
4f4faa4d TP |
5447 | if (sym_claimed) |
5448 | stub_name = sym_name; | |
5449 | else | |
5450 | { | |
5451 | BFD_ASSERT (irela); | |
5452 | BFD_ASSERT (section); | |
b715f643 | 5453 | |
4f4faa4d TP |
5454 | /* Support for grouping stub sections. */ |
5455 | id_sec = htab->stub_group[section->id].link_sec; | |
b715f643 | 5456 | |
4f4faa4d TP |
5457 | /* Get the name of this stub. */ |
5458 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, | |
5459 | stub_type); | |
5460 | if (!stub_name) | |
5461 | return FALSE; | |
5462 | } | |
b715f643 TP |
5463 | |
5464 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE, | |
5465 | FALSE); | |
5466 | /* The proper stub has already been created, just update its value. */ | |
5467 | if (stub_entry != NULL) | |
5468 | { | |
4f4faa4d TP |
5469 | if (!sym_claimed) |
5470 | free (stub_name); | |
b715f643 TP |
5471 | stub_entry->target_value = sym_value; |
5472 | return TRUE; | |
5473 | } | |
5474 | ||
daa4adae | 5475 | stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type); |
b715f643 TP |
5476 | if (stub_entry == NULL) |
5477 | { | |
4f4faa4d TP |
5478 | if (!sym_claimed) |
5479 | free (stub_name); | |
b715f643 TP |
5480 | return FALSE; |
5481 | } | |
5482 | ||
5483 | stub_entry->target_value = sym_value; | |
5484 | stub_entry->target_section = sym_sec; | |
5485 | stub_entry->stub_type = stub_type; | |
5486 | stub_entry->h = hash; | |
5487 | stub_entry->branch_type = branch_type; | |
5488 | ||
4f4faa4d TP |
5489 | if (sym_claimed) |
5490 | stub_entry->output_name = sym_name; | |
5491 | else | |
b715f643 | 5492 | { |
4f4faa4d TP |
5493 | if (sym_name == NULL) |
5494 | sym_name = "unnamed"; | |
5495 | stub_entry->output_name = (char *) | |
5496 | bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME) | |
5497 | + strlen (sym_name)); | |
5498 | if (stub_entry->output_name == NULL) | |
5499 | { | |
5500 | free (stub_name); | |
5501 | return FALSE; | |
5502 | } | |
b715f643 | 5503 | |
4f4faa4d TP |
5504 | /* For historical reasons, use the existing names for ARM-to-Thumb and |
5505 | Thumb-to-ARM stubs. */ | |
5506 | r_type = ELF32_R_TYPE (irela->r_info); | |
5507 | if ((r_type == (unsigned int) R_ARM_THM_CALL | |
5508 | || r_type == (unsigned int) R_ARM_THM_JUMP24 | |
5509 | || r_type == (unsigned int) R_ARM_THM_JUMP19) | |
5510 | && branch_type == ST_BRANCH_TO_ARM) | |
5511 | sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
5512 | else if ((r_type == (unsigned int) R_ARM_CALL | |
5513 | || r_type == (unsigned int) R_ARM_JUMP24) | |
5514 | && branch_type == ST_BRANCH_TO_THUMB) | |
5515 | sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
5516 | else | |
5517 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name); | |
5518 | } | |
b715f643 TP |
5519 | |
5520 | *new_stub = TRUE; | |
5521 | return TRUE; | |
5522 | } | |
5523 | ||
4ba2ef8f TP |
5524 | /* Scan symbols in INPUT_BFD to identify secure entry functions needing a |
5525 | gateway veneer to transition from non secure to secure state and create them | |
5526 | accordingly. | |
5527 | ||
5528 | "ARMv8-M Security Extensions: Requirements on Development Tools" document | |
5529 | defines the conditions that govern Secure Gateway veneer creation for a | |
5530 | given symbol <SYM> as follows: | |
5531 | - it has function type | |
5532 | - it has non local binding | |
5533 | - a symbol named __acle_se_<SYM> (called special symbol) exists with the | |
5534 | same type, binding and value as <SYM> (called normal symbol). | |
5535 | An entry function can handle secure state transition itself in which case | |
5536 | its special symbol would have a different value from the normal symbol. | |
5537 | ||
5538 | OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash | |
5539 | entry mapping while HTAB gives the name to hash entry mapping. | |
5540 | ||
5541 | If any secure gateway veneer is created, *STUB_CHANGED is set to TRUE. The | |
5542 | return value gives whether a stub failed to be allocated. */ | |
5543 | ||
5544 | static bfd_boolean | |
5545 | cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab, | |
5546 | obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes, | |
5547 | bfd_boolean *stub_changed) | |
5548 | { | |
5549 | const struct elf_backend_data *bed; | |
5550 | Elf_Internal_Shdr *symtab_hdr; | |
5551 | unsigned i, j, sym_count, ext_start; | |
5552 | Elf_Internal_Sym *cmse_sym, *local_syms; | |
5553 | struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL; | |
5554 | enum arm_st_branch_type branch_type; | |
5555 | char *sym_name, *lsym_name; | |
5556 | bfd_vma sym_value; | |
5557 | asection *section; | |
5558 | bfd_boolean is_v8m, new_stub, created_stub, cmse_invalid, ret = TRUE; | |
5559 | ||
5560 | bed = get_elf_backend_data (input_bfd); | |
5561 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
5562 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; | |
5563 | ext_start = symtab_hdr->sh_info; | |
5564 | is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE | |
5565 | && out_attr[Tag_CPU_arch_profile].i == 'M'); | |
5566 | ||
5567 | local_syms = (Elf_Internal_Sym *) symtab_hdr->contents; | |
5568 | if (local_syms == NULL) | |
5569 | local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
5570 | symtab_hdr->sh_info, 0, NULL, NULL, | |
5571 | NULL); | |
5572 | if (symtab_hdr->sh_info && local_syms == NULL) | |
5573 | return FALSE; | |
5574 | ||
5575 | /* Scan symbols. */ | |
5576 | for (i = 0; i < sym_count; i++) | |
5577 | { | |
5578 | cmse_invalid = FALSE; | |
5579 | ||
5580 | if (i < ext_start) | |
5581 | { | |
5582 | cmse_sym = &local_syms[i]; | |
5583 | /* Not a special symbol. */ | |
5584 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal)) | |
5585 | continue; | |
5586 | sym_name = bfd_elf_string_from_elf_section (input_bfd, | |
5587 | symtab_hdr->sh_link, | |
5588 | cmse_sym->st_name); | |
5589 | /* Special symbol with local binding. */ | |
5590 | cmse_invalid = TRUE; | |
5591 | } | |
5592 | else | |
5593 | { | |
5594 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); | |
5595 | sym_name = (char *) cmse_hash->root.root.root.string; | |
5596 | ||
5597 | /* Not a special symbol. */ | |
5598 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) | |
5599 | continue; | |
5600 | ||
5601 | /* Special symbol has incorrect binding or type. */ | |
5602 | if ((cmse_hash->root.root.type != bfd_link_hash_defined | |
5603 | && cmse_hash->root.root.type != bfd_link_hash_defweak) | |
5604 | || cmse_hash->root.type != STT_FUNC) | |
5605 | cmse_invalid = TRUE; | |
5606 | } | |
5607 | ||
5608 | if (!is_v8m) | |
5609 | { | |
5610 | (*_bfd_error_handler) (_("%B: Special symbol `%s' only allowed for " | |
5611 | "ARMv8-M architecture or later."), | |
5612 | input_bfd, sym_name); | |
5613 | is_v8m = TRUE; /* Avoid multiple warning. */ | |
5614 | ret = FALSE; | |
5615 | } | |
5616 | ||
5617 | if (cmse_invalid) | |
5618 | { | |
5619 | (*_bfd_error_handler) (_("%B: invalid special symbol `%s'."), | |
5620 | input_bfd, sym_name); | |
5621 | (*_bfd_error_handler) (_("It must be a global or weak function " | |
5622 | "symbol.")); | |
5623 | ret = FALSE; | |
5624 | if (i < ext_start) | |
5625 | continue; | |
5626 | } | |
5627 | ||
5628 | sym_name += strlen (CMSE_PREFIX); | |
5629 | hash = (struct elf32_arm_link_hash_entry *) | |
5630 | elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE); | |
5631 | ||
5632 | /* No associated normal symbol or it is neither global nor weak. */ | |
5633 | if (!hash | |
5634 | || (hash->root.root.type != bfd_link_hash_defined | |
5635 | && hash->root.root.type != bfd_link_hash_defweak) | |
5636 | || hash->root.type != STT_FUNC) | |
5637 | { | |
5638 | /* Initialize here to avoid warning about use of possibly | |
5639 | uninitialized variable. */ | |
5640 | j = 0; | |
5641 | ||
5642 | if (!hash) | |
5643 | { | |
5644 | /* Searching for a normal symbol with local binding. */ | |
5645 | for (; j < ext_start; j++) | |
5646 | { | |
5647 | lsym_name = | |
5648 | bfd_elf_string_from_elf_section (input_bfd, | |
5649 | symtab_hdr->sh_link, | |
5650 | local_syms[j].st_name); | |
5651 | if (!strcmp (sym_name, lsym_name)) | |
5652 | break; | |
5653 | } | |
5654 | } | |
5655 | ||
5656 | if (hash || j < ext_start) | |
5657 | { | |
5658 | (*_bfd_error_handler) | |
5659 | (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name); | |
5660 | (*_bfd_error_handler) | |
5661 | (_("It must be a global or weak function symbol.")); | |
5662 | } | |
5663 | else | |
5664 | (*_bfd_error_handler) | |
5665 | (_("%B: absent standard symbol `%s'."), input_bfd, sym_name); | |
5666 | ret = FALSE; | |
5667 | if (!hash) | |
5668 | continue; | |
5669 | } | |
5670 | ||
5671 | sym_value = hash->root.root.u.def.value; | |
5672 | section = hash->root.root.u.def.section; | |
5673 | ||
5674 | if (cmse_hash->root.root.u.def.section != section) | |
5675 | { | |
5676 | (*_bfd_error_handler) | |
5677 | (_("%B: `%s' and its special symbol are in different sections."), | |
5678 | input_bfd, sym_name); | |
5679 | ret = FALSE; | |
5680 | } | |
5681 | if (cmse_hash->root.root.u.def.value != sym_value) | |
5682 | continue; /* Ignore: could be an entry function starting with SG. */ | |
5683 | ||
5684 | /* If this section is a link-once section that will be discarded, then | |
5685 | don't create any stubs. */ | |
5686 | if (section->output_section == NULL) | |
5687 | { | |
5688 | (*_bfd_error_handler) | |
5689 | (_("%B: entry function `%s' not output."), input_bfd, sym_name); | |
5690 | continue; | |
5691 | } | |
5692 | ||
5693 | if (hash->root.size == 0) | |
5694 | { | |
5695 | (*_bfd_error_handler) | |
5696 | (_("%B: entry function `%s' is empty."), input_bfd, sym_name); | |
5697 | ret = FALSE; | |
5698 | } | |
5699 | ||
5700 | if (!ret) | |
5701 | continue; | |
5702 | branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
5703 | created_stub | |
5704 | = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only, | |
5705 | NULL, NULL, section, hash, sym_name, | |
5706 | sym_value, branch_type, &new_stub); | |
5707 | ||
5708 | if (!created_stub) | |
5709 | ret = FALSE; | |
5710 | else | |
5711 | { | |
5712 | BFD_ASSERT (new_stub); | |
5713 | *stub_changed = TRUE; | |
5714 | } | |
5715 | } | |
5716 | ||
5717 | if (!symtab_hdr->contents) | |
5718 | free (local_syms); | |
5719 | return ret; | |
5720 | } | |
5721 | ||
906e58ca NC |
5722 | /* Determine and set the size of the stub section for a final link. |
5723 | ||
5724 | The basic idea here is to examine all the relocations looking for | |
5725 | PC-relative calls to a target that is unreachable with a "bl" | |
5726 | instruction. */ | |
5727 | ||
5728 | bfd_boolean | |
5729 | elf32_arm_size_stubs (bfd *output_bfd, | |
5730 | bfd *stub_bfd, | |
5731 | struct bfd_link_info *info, | |
5732 | bfd_signed_vma group_size, | |
7a89b94e | 5733 | asection * (*add_stub_section) (const char *, asection *, |
6bde4c52 | 5734 | asection *, |
7a89b94e | 5735 | unsigned int), |
906e58ca NC |
5736 | void (*layout_sections_again) (void)) |
5737 | { | |
4ba2ef8f | 5738 | obj_attribute *out_attr; |
906e58ca | 5739 | bfd_size_type stub_group_size; |
4ba2ef8f | 5740 | bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE; |
906e58ca | 5741 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 5742 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 5743 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
5744 | struct a8_erratum_reloc *a8_relocs = NULL; |
5745 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
5746 | ||
4dfe6ac6 NC |
5747 | if (htab == NULL) |
5748 | return FALSE; | |
5749 | ||
48229727 JB |
5750 | if (htab->fix_cortex_a8) |
5751 | { | |
21d799b5 | 5752 | a8_fixes = (struct a8_erratum_fix *) |
99059e56 | 5753 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); |
21d799b5 | 5754 | a8_relocs = (struct a8_erratum_reloc *) |
99059e56 | 5755 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); |
48229727 | 5756 | } |
906e58ca NC |
5757 | |
5758 | /* Propagate mach to stub bfd, because it may not have been | |
5759 | finalized when we created stub_bfd. */ | |
5760 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
5761 | bfd_get_mach (output_bfd)); | |
5762 | ||
5763 | /* Stash our params away. */ | |
5764 | htab->stub_bfd = stub_bfd; | |
5765 | htab->add_stub_section = add_stub_section; | |
5766 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 5767 | stubs_always_after_branch = group_size < 0; |
48229727 | 5768 | |
4ba2ef8f TP |
5769 | out_attr = elf_known_obj_attributes_proc (output_bfd); |
5770 | m_profile = out_attr[Tag_CPU_arch_profile].i == 'M'; | |
48229727 JB |
5771 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page |
5772 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
5773 | crude way of enforcing that. */ | |
5774 | if (htab->fix_cortex_a8) | |
5775 | stubs_always_after_branch = 1; | |
5776 | ||
906e58ca NC |
5777 | if (group_size < 0) |
5778 | stub_group_size = -group_size; | |
5779 | else | |
5780 | stub_group_size = group_size; | |
5781 | ||
5782 | if (stub_group_size == 1) | |
5783 | { | |
5784 | /* Default values. */ | |
5785 | /* Thumb branch range is +-4MB has to be used as the default | |
5786 | maximum size (a given section can contain both ARM and Thumb | |
5787 | code, so the worst case has to be taken into account). | |
5788 | ||
5789 | This value is 24K less than that, which allows for 2025 | |
5790 | 12-byte stubs. If we exceed that, then we will fail to link. | |
5791 | The user will have to relink with an explicit group size | |
5792 | option. */ | |
5793 | stub_group_size = 4170000; | |
5794 | } | |
5795 | ||
07d72278 | 5796 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 5797 | |
3ae046cc NS |
5798 | /* If we're applying the cortex A8 fix, we need to determine the |
5799 | program header size now, because we cannot change it later -- | |
5800 | that could alter section placements. Notice the A8 erratum fix | |
5801 | ends up requiring the section addresses to remain unchanged | |
5802 | modulo the page size. That's something we cannot represent | |
5803 | inside BFD, and we don't want to force the section alignment to | |
5804 | be the page size. */ | |
5805 | if (htab->fix_cortex_a8) | |
5806 | (*htab->layout_sections_again) (); | |
5807 | ||
906e58ca NC |
5808 | while (1) |
5809 | { | |
5810 | bfd *input_bfd; | |
5811 | unsigned int bfd_indx; | |
5812 | asection *stub_sec; | |
d7c5bd02 | 5813 | enum elf32_arm_stub_type stub_type; |
eb7c4339 NS |
5814 | bfd_boolean stub_changed = FALSE; |
5815 | unsigned prev_num_a8_fixes = num_a8_fixes; | |
906e58ca | 5816 | |
48229727 | 5817 | num_a8_fixes = 0; |
906e58ca NC |
5818 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
5819 | input_bfd != NULL; | |
c72f2fb2 | 5820 | input_bfd = input_bfd->link.next, bfd_indx++) |
906e58ca NC |
5821 | { |
5822 | Elf_Internal_Shdr *symtab_hdr; | |
5823 | asection *section; | |
5824 | Elf_Internal_Sym *local_syms = NULL; | |
5825 | ||
99059e56 RM |
5826 | if (!is_arm_elf (input_bfd)) |
5827 | continue; | |
adbcc655 | 5828 | |
48229727 JB |
5829 | num_a8_relocs = 0; |
5830 | ||
906e58ca NC |
5831 | /* We'll need the symbol table in a second. */ |
5832 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
5833 | if (symtab_hdr->sh_info == 0) | |
5834 | continue; | |
5835 | ||
4ba2ef8f TP |
5836 | /* Limit scan of symbols to object file whose profile is |
5837 | Microcontroller to not hinder performance in the general case. */ | |
5838 | if (m_profile && first_veneer_scan) | |
5839 | { | |
5840 | struct elf_link_hash_entry **sym_hashes; | |
5841 | ||
5842 | sym_hashes = elf_sym_hashes (input_bfd); | |
5843 | if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes, | |
5844 | &stub_changed)) | |
5845 | goto error_ret_free_local; | |
5846 | } | |
5847 | ||
906e58ca NC |
5848 | /* Walk over each section attached to the input bfd. */ |
5849 | for (section = input_bfd->sections; | |
5850 | section != NULL; | |
5851 | section = section->next) | |
5852 | { | |
5853 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
5854 | ||
5855 | /* If there aren't any relocs, then there's nothing more | |
5856 | to do. */ | |
5857 | if ((section->flags & SEC_RELOC) == 0 | |
5858 | || section->reloc_count == 0 | |
5859 | || (section->flags & SEC_CODE) == 0) | |
5860 | continue; | |
5861 | ||
5862 | /* If this section is a link-once section that will be | |
5863 | discarded, then don't create any stubs. */ | |
5864 | if (section->output_section == NULL | |
5865 | || section->output_section->owner != output_bfd) | |
5866 | continue; | |
5867 | ||
5868 | /* Get the relocs. */ | |
5869 | internal_relocs | |
5870 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
5871 | NULL, info->keep_memory); | |
5872 | if (internal_relocs == NULL) | |
5873 | goto error_ret_free_local; | |
5874 | ||
5875 | /* Now examine each relocation. */ | |
5876 | irela = internal_relocs; | |
5877 | irelaend = irela + section->reloc_count; | |
5878 | for (; irela < irelaend; irela++) | |
5879 | { | |
5880 | unsigned int r_type, r_indx; | |
906e58ca NC |
5881 | asection *sym_sec; |
5882 | bfd_vma sym_value; | |
5883 | bfd_vma destination; | |
5884 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 5885 | const char *sym_name; |
34e77a92 | 5886 | unsigned char st_type; |
35fc36a8 | 5887 | enum arm_st_branch_type branch_type; |
48229727 | 5888 | bfd_boolean created_stub = FALSE; |
906e58ca NC |
5889 | |
5890 | r_type = ELF32_R_TYPE (irela->r_info); | |
5891 | r_indx = ELF32_R_SYM (irela->r_info); | |
5892 | ||
5893 | if (r_type >= (unsigned int) R_ARM_max) | |
5894 | { | |
5895 | bfd_set_error (bfd_error_bad_value); | |
5896 | error_ret_free_internal: | |
5897 | if (elf_section_data (section)->relocs == NULL) | |
5898 | free (internal_relocs); | |
15dd01b1 TP |
5899 | /* Fall through. */ |
5900 | error_ret_free_local: | |
5901 | if (local_syms != NULL | |
5902 | && (symtab_hdr->contents | |
5903 | != (unsigned char *) local_syms)) | |
5904 | free (local_syms); | |
5905 | return FALSE; | |
906e58ca | 5906 | } |
b38cadfb | 5907 | |
0855e32b NS |
5908 | hash = NULL; |
5909 | if (r_indx >= symtab_hdr->sh_info) | |
5910 | hash = elf32_arm_hash_entry | |
5911 | (elf_sym_hashes (input_bfd) | |
5912 | [r_indx - symtab_hdr->sh_info]); | |
b38cadfb | 5913 | |
0855e32b NS |
5914 | /* Only look for stubs on branch instructions, or |
5915 | non-relaxed TLSCALL */ | |
906e58ca | 5916 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
5917 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
5918 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
5919 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
5920 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 | 5921 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
0855e32b NS |
5922 | && (r_type != (unsigned int) R_ARM_PLT32) |
5923 | && !((r_type == (unsigned int) R_ARM_TLS_CALL | |
5924 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
5925 | && r_type == elf32_arm_tls_transition | |
5926 | (info, r_type, &hash->root) | |
5927 | && ((hash ? hash->tls_type | |
5928 | : (elf32_arm_local_got_tls_type | |
5929 | (input_bfd)[r_indx])) | |
5930 | & GOT_TLS_GDESC) != 0)) | |
906e58ca NC |
5931 | continue; |
5932 | ||
5933 | /* Now determine the call target, its name, value, | |
5934 | section. */ | |
5935 | sym_sec = NULL; | |
5936 | sym_value = 0; | |
5937 | destination = 0; | |
7413f23f | 5938 | sym_name = NULL; |
b38cadfb | 5939 | |
0855e32b NS |
5940 | if (r_type == (unsigned int) R_ARM_TLS_CALL |
5941 | || r_type == (unsigned int) R_ARM_THM_TLS_CALL) | |
5942 | { | |
5943 | /* A non-relaxed TLS call. The target is the | |
5944 | plt-resident trampoline and nothing to do | |
5945 | with the symbol. */ | |
5946 | BFD_ASSERT (htab->tls_trampoline > 0); | |
5947 | sym_sec = htab->root.splt; | |
5948 | sym_value = htab->tls_trampoline; | |
5949 | hash = 0; | |
34e77a92 | 5950 | st_type = STT_FUNC; |
35fc36a8 | 5951 | branch_type = ST_BRANCH_TO_ARM; |
0855e32b NS |
5952 | } |
5953 | else if (!hash) | |
906e58ca NC |
5954 | { |
5955 | /* It's a local symbol. */ | |
5956 | Elf_Internal_Sym *sym; | |
906e58ca NC |
5957 | |
5958 | if (local_syms == NULL) | |
5959 | { | |
5960 | local_syms | |
5961 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
5962 | if (local_syms == NULL) | |
5963 | local_syms | |
5964 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
5965 | symtab_hdr->sh_info, 0, | |
5966 | NULL, NULL, NULL); | |
5967 | if (local_syms == NULL) | |
5968 | goto error_ret_free_internal; | |
5969 | } | |
5970 | ||
5971 | sym = local_syms + r_indx; | |
f6d250ce TS |
5972 | if (sym->st_shndx == SHN_UNDEF) |
5973 | sym_sec = bfd_und_section_ptr; | |
5974 | else if (sym->st_shndx == SHN_ABS) | |
5975 | sym_sec = bfd_abs_section_ptr; | |
5976 | else if (sym->st_shndx == SHN_COMMON) | |
5977 | sym_sec = bfd_com_section_ptr; | |
5978 | else | |
5979 | sym_sec = | |
5980 | bfd_section_from_elf_index (input_bfd, sym->st_shndx); | |
5981 | ||
ffcb4889 NS |
5982 | if (!sym_sec) |
5983 | /* This is an undefined symbol. It can never | |
6a631e86 | 5984 | be resolved. */ |
ffcb4889 | 5985 | continue; |
fe33d2fa | 5986 | |
906e58ca NC |
5987 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
5988 | sym_value = sym->st_value; | |
5989 | destination = (sym_value + irela->r_addend | |
5990 | + sym_sec->output_offset | |
5991 | + sym_sec->output_section->vma); | |
34e77a92 | 5992 | st_type = ELF_ST_TYPE (sym->st_info); |
39d911fc TP |
5993 | branch_type = |
5994 | ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
7413f23f DJ |
5995 | sym_name |
5996 | = bfd_elf_string_from_elf_section (input_bfd, | |
5997 | symtab_hdr->sh_link, | |
5998 | sym->st_name); | |
906e58ca NC |
5999 | } |
6000 | else | |
6001 | { | |
6002 | /* It's an external symbol. */ | |
906e58ca NC |
6003 | while (hash->root.root.type == bfd_link_hash_indirect |
6004 | || hash->root.root.type == bfd_link_hash_warning) | |
6005 | hash = ((struct elf32_arm_link_hash_entry *) | |
6006 | hash->root.root.u.i.link); | |
6007 | ||
6008 | if (hash->root.root.type == bfd_link_hash_defined | |
6009 | || hash->root.root.type == bfd_link_hash_defweak) | |
6010 | { | |
6011 | sym_sec = hash->root.root.u.def.section; | |
6012 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
6013 | |
6014 | struct elf32_arm_link_hash_table *globals = | |
6015 | elf32_arm_hash_table (info); | |
6016 | ||
6017 | /* For a destination in a shared library, | |
6018 | use the PLT stub as target address to | |
6019 | decide whether a branch stub is | |
6020 | needed. */ | |
4dfe6ac6 | 6021 | if (globals != NULL |
362d30a1 | 6022 | && globals->root.splt != NULL |
4dfe6ac6 | 6023 | && hash != NULL |
022f8312 CL |
6024 | && hash->root.plt.offset != (bfd_vma) -1) |
6025 | { | |
362d30a1 | 6026 | sym_sec = globals->root.splt; |
022f8312 CL |
6027 | sym_value = hash->root.plt.offset; |
6028 | if (sym_sec->output_section != NULL) | |
6029 | destination = (sym_value | |
6030 | + sym_sec->output_offset | |
6031 | + sym_sec->output_section->vma); | |
6032 | } | |
6033 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
6034 | destination = (sym_value + irela->r_addend |
6035 | + sym_sec->output_offset | |
6036 | + sym_sec->output_section->vma); | |
6037 | } | |
69c5861e CL |
6038 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
6039 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
6040 | { | |
6041 | /* For a shared library, use the PLT stub as | |
6042 | target address to decide whether a long | |
6043 | branch stub is needed. | |
6044 | For absolute code, they cannot be handled. */ | |
6045 | struct elf32_arm_link_hash_table *globals = | |
6046 | elf32_arm_hash_table (info); | |
6047 | ||
4dfe6ac6 | 6048 | if (globals != NULL |
362d30a1 | 6049 | && globals->root.splt != NULL |
4dfe6ac6 | 6050 | && hash != NULL |
69c5861e CL |
6051 | && hash->root.plt.offset != (bfd_vma) -1) |
6052 | { | |
362d30a1 | 6053 | sym_sec = globals->root.splt; |
69c5861e CL |
6054 | sym_value = hash->root.plt.offset; |
6055 | if (sym_sec->output_section != NULL) | |
6056 | destination = (sym_value | |
6057 | + sym_sec->output_offset | |
6058 | + sym_sec->output_section->vma); | |
6059 | } | |
6060 | else | |
6061 | continue; | |
6062 | } | |
906e58ca NC |
6063 | else |
6064 | { | |
6065 | bfd_set_error (bfd_error_bad_value); | |
6066 | goto error_ret_free_internal; | |
6067 | } | |
34e77a92 | 6068 | st_type = hash->root.type; |
39d911fc TP |
6069 | branch_type = |
6070 | ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal); | |
7413f23f | 6071 | sym_name = hash->root.root.root.string; |
906e58ca NC |
6072 | } |
6073 | ||
48229727 | 6074 | do |
7413f23f | 6075 | { |
b715f643 TP |
6076 | bfd_boolean new_stub; |
6077 | ||
48229727 JB |
6078 | /* Determine what (if any) linker stub is needed. */ |
6079 | stub_type = arm_type_of_stub (info, section, irela, | |
34e77a92 RS |
6080 | st_type, &branch_type, |
6081 | hash, destination, sym_sec, | |
48229727 JB |
6082 | input_bfd, sym_name); |
6083 | if (stub_type == arm_stub_none) | |
6084 | break; | |
6085 | ||
48229727 JB |
6086 | /* We've either created a stub for this reloc already, |
6087 | or we are about to. */ | |
b715f643 TP |
6088 | created_stub = |
6089 | elf32_arm_create_stub (htab, stub_type, section, irela, | |
6090 | sym_sec, hash, | |
6091 | (char *) sym_name, sym_value, | |
6092 | branch_type, &new_stub); | |
7413f23f | 6093 | |
b715f643 TP |
6094 | if (!created_stub) |
6095 | goto error_ret_free_internal; | |
6096 | else if (!new_stub) | |
6097 | break; | |
99059e56 | 6098 | else |
b715f643 | 6099 | stub_changed = TRUE; |
99059e56 RM |
6100 | } |
6101 | while (0); | |
6102 | ||
6103 | /* Look for relocations which might trigger Cortex-A8 | |
6104 | erratum. */ | |
6105 | if (htab->fix_cortex_a8 | |
6106 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
6107 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
6108 | || r_type == (unsigned int) R_ARM_THM_CALL | |
6109 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
6110 | { | |
6111 | bfd_vma from = section->output_section->vma | |
6112 | + section->output_offset | |
6113 | + irela->r_offset; | |
6114 | ||
6115 | if ((from & 0xfff) == 0xffe) | |
6116 | { | |
6117 | /* Found a candidate. Note we haven't checked the | |
6118 | destination is within 4K here: if we do so (and | |
6119 | don't create an entry in a8_relocs) we can't tell | |
6120 | that a branch should have been relocated when | |
6121 | scanning later. */ | |
6122 | if (num_a8_relocs == a8_reloc_table_size) | |
6123 | { | |
6124 | a8_reloc_table_size *= 2; | |
6125 | a8_relocs = (struct a8_erratum_reloc *) | |
6126 | bfd_realloc (a8_relocs, | |
6127 | sizeof (struct a8_erratum_reloc) | |
6128 | * a8_reloc_table_size); | |
6129 | } | |
6130 | ||
6131 | a8_relocs[num_a8_relocs].from = from; | |
6132 | a8_relocs[num_a8_relocs].destination = destination; | |
6133 | a8_relocs[num_a8_relocs].r_type = r_type; | |
6134 | a8_relocs[num_a8_relocs].branch_type = branch_type; | |
6135 | a8_relocs[num_a8_relocs].sym_name = sym_name; | |
6136 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
6137 | a8_relocs[num_a8_relocs].hash = hash; | |
6138 | ||
6139 | num_a8_relocs++; | |
6140 | } | |
6141 | } | |
906e58ca NC |
6142 | } |
6143 | ||
99059e56 RM |
6144 | /* We're done with the internal relocs, free them. */ |
6145 | if (elf_section_data (section)->relocs == NULL) | |
6146 | free (internal_relocs); | |
6147 | } | |
48229727 | 6148 | |
99059e56 | 6149 | if (htab->fix_cortex_a8) |
48229727 | 6150 | { |
99059e56 RM |
6151 | /* Sort relocs which might apply to Cortex-A8 erratum. */ |
6152 | qsort (a8_relocs, num_a8_relocs, | |
eb7c4339 | 6153 | sizeof (struct a8_erratum_reloc), |
99059e56 | 6154 | &a8_reloc_compare); |
48229727 | 6155 | |
99059e56 RM |
6156 | /* Scan for branches which might trigger Cortex-A8 erratum. */ |
6157 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
48229727 | 6158 | &num_a8_fixes, &a8_fix_table_size, |
eb7c4339 NS |
6159 | a8_relocs, num_a8_relocs, |
6160 | prev_num_a8_fixes, &stub_changed) | |
6161 | != 0) | |
48229727 | 6162 | goto error_ret_free_local; |
5e681ec4 | 6163 | } |
7f991970 AM |
6164 | |
6165 | if (local_syms != NULL | |
6166 | && symtab_hdr->contents != (unsigned char *) local_syms) | |
6167 | { | |
6168 | if (!info->keep_memory) | |
6169 | free (local_syms); | |
6170 | else | |
6171 | symtab_hdr->contents = (unsigned char *) local_syms; | |
6172 | } | |
5e681ec4 PB |
6173 | } |
6174 | ||
eb7c4339 | 6175 | if (prev_num_a8_fixes != num_a8_fixes) |
99059e56 | 6176 | stub_changed = TRUE; |
48229727 | 6177 | |
906e58ca NC |
6178 | if (!stub_changed) |
6179 | break; | |
5e681ec4 | 6180 | |
906e58ca NC |
6181 | /* OK, we've added some stubs. Find out the new size of the |
6182 | stub sections. */ | |
6183 | for (stub_sec = htab->stub_bfd->sections; | |
6184 | stub_sec != NULL; | |
6185 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
6186 | { |
6187 | /* Ignore non-stub sections. */ | |
6188 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
6189 | continue; | |
6190 | ||
6191 | stub_sec->size = 0; | |
6192 | } | |
b34b2d70 | 6193 | |
d7c5bd02 | 6194 | /* Compute stub section size, considering padding. */ |
906e58ca | 6195 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
d7c5bd02 TP |
6196 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; |
6197 | stub_type++) | |
6198 | { | |
6199 | int size, padding; | |
6200 | asection **stub_sec_p; | |
6201 | ||
6202 | padding = arm_dedicated_stub_section_padding (stub_type); | |
6203 | stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type); | |
6204 | /* Skip if no stub input section or no stub section padding | |
6205 | required. */ | |
6206 | if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0) | |
6207 | continue; | |
6208 | /* Stub section padding required but no dedicated section. */ | |
6209 | BFD_ASSERT (stub_sec_p); | |
6210 | ||
6211 | size = (*stub_sec_p)->size; | |
6212 | size = (size + padding - 1) & ~(padding - 1); | |
6213 | (*stub_sec_p)->size = size; | |
6214 | } | |
906e58ca | 6215 | |
48229727 JB |
6216 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
6217 | if (htab->fix_cortex_a8) | |
99059e56 RM |
6218 | for (i = 0; i < num_a8_fixes; i++) |
6219 | { | |
48229727 | 6220 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, |
daa4adae | 6221 | a8_fixes[i].section, htab, a8_fixes[i].stub_type); |
48229727 JB |
6222 | |
6223 | if (stub_sec == NULL) | |
7f991970 | 6224 | return FALSE; |
48229727 | 6225 | |
99059e56 RM |
6226 | stub_sec->size |
6227 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
6228 | NULL); | |
6229 | } | |
48229727 JB |
6230 | |
6231 | ||
906e58ca NC |
6232 | /* Ask the linker to do its stuff. */ |
6233 | (*htab->layout_sections_again) (); | |
4ba2ef8f | 6234 | first_veneer_scan = FALSE; |
ba93b8ac DJ |
6235 | } |
6236 | ||
48229727 JB |
6237 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
6238 | if (htab->fix_cortex_a8) | |
6239 | { | |
6240 | for (i = 0; i < num_a8_fixes; i++) | |
99059e56 RM |
6241 | { |
6242 | struct elf32_arm_stub_hash_entry *stub_entry; | |
6243 | char *stub_name = a8_fixes[i].stub_name; | |
6244 | asection *section = a8_fixes[i].section; | |
6245 | unsigned int section_id = a8_fixes[i].section->id; | |
6246 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
6247 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
6248 | const insn_sequence *template_sequence; | |
6249 | int template_size, size = 0; | |
6250 | ||
6251 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
6252 | TRUE, FALSE); | |
6253 | if (stub_entry == NULL) | |
6254 | { | |
6255 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
6256 | section->owner, | |
6257 | stub_name); | |
6258 | return FALSE; | |
6259 | } | |
6260 | ||
6261 | stub_entry->stub_sec = stub_sec; | |
6262 | stub_entry->stub_offset = 0; | |
6263 | stub_entry->id_sec = link_sec; | |
6264 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
8d9d9490 | 6265 | stub_entry->source_value = a8_fixes[i].offset; |
99059e56 | 6266 | stub_entry->target_section = a8_fixes[i].section; |
8d9d9490 | 6267 | stub_entry->target_value = a8_fixes[i].target_offset; |
99059e56 | 6268 | stub_entry->orig_insn = a8_fixes[i].orig_insn; |
35fc36a8 | 6269 | stub_entry->branch_type = a8_fixes[i].branch_type; |
48229727 | 6270 | |
99059e56 RM |
6271 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
6272 | &template_sequence, | |
6273 | &template_size); | |
48229727 | 6274 | |
99059e56 RM |
6275 | stub_entry->stub_size = size; |
6276 | stub_entry->stub_template = template_sequence; | |
6277 | stub_entry->stub_template_size = template_size; | |
6278 | } | |
48229727 JB |
6279 | |
6280 | /* Stash the Cortex-A8 erratum fix array for use later in | |
99059e56 | 6281 | elf32_arm_write_section(). */ |
48229727 JB |
6282 | htab->a8_erratum_fixes = a8_fixes; |
6283 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
6284 | } | |
6285 | else | |
6286 | { | |
6287 | htab->a8_erratum_fixes = NULL; | |
6288 | htab->num_a8_erratum_fixes = 0; | |
6289 | } | |
906e58ca | 6290 | return TRUE; |
5e681ec4 PB |
6291 | } |
6292 | ||
906e58ca NC |
6293 | /* Build all the stubs associated with the current output file. The |
6294 | stubs are kept in a hash table attached to the main linker hash | |
6295 | table. We also set up the .plt entries for statically linked PIC | |
6296 | functions here. This function is called via arm_elf_finish in the | |
6297 | linker. */ | |
252b5132 | 6298 | |
906e58ca NC |
6299 | bfd_boolean |
6300 | elf32_arm_build_stubs (struct bfd_link_info *info) | |
252b5132 | 6301 | { |
906e58ca NC |
6302 | asection *stub_sec; |
6303 | struct bfd_hash_table *table; | |
6304 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 6305 | |
906e58ca | 6306 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
6307 | if (htab == NULL) |
6308 | return FALSE; | |
252b5132 | 6309 | |
906e58ca NC |
6310 | for (stub_sec = htab->stub_bfd->sections; |
6311 | stub_sec != NULL; | |
6312 | stub_sec = stub_sec->next) | |
252b5132 | 6313 | { |
906e58ca NC |
6314 | bfd_size_type size; |
6315 | ||
8029a119 | 6316 | /* Ignore non-stub sections. */ |
906e58ca NC |
6317 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
6318 | continue; | |
6319 | ||
d7c5bd02 TP |
6320 | /* Allocate memory to hold the linker stubs. Zeroing the stub sections |
6321 | must at least be done for stub section requiring padding. */ | |
906e58ca | 6322 | size = stub_sec->size; |
21d799b5 | 6323 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca NC |
6324 | if (stub_sec->contents == NULL && size != 0) |
6325 | return FALSE; | |
6326 | stub_sec->size = 0; | |
252b5132 RH |
6327 | } |
6328 | ||
906e58ca NC |
6329 | /* Build the stubs as directed by the stub hash table. */ |
6330 | table = &htab->stub_hash_table; | |
6331 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
6332 | if (htab->fix_cortex_a8) |
6333 | { | |
6334 | /* Place the cortex a8 stubs last. */ | |
6335 | htab->fix_cortex_a8 = -1; | |
6336 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
6337 | } | |
252b5132 | 6338 | |
906e58ca | 6339 | return TRUE; |
252b5132 RH |
6340 | } |
6341 | ||
9b485d32 NC |
6342 | /* Locate the Thumb encoded calling stub for NAME. */ |
6343 | ||
252b5132 | 6344 | static struct elf_link_hash_entry * |
57e8b36a NC |
6345 | find_thumb_glue (struct bfd_link_info *link_info, |
6346 | const char *name, | |
f2a9dd69 | 6347 | char **error_message) |
252b5132 RH |
6348 | { |
6349 | char *tmp_name; | |
6350 | struct elf_link_hash_entry *hash; | |
6351 | struct elf32_arm_link_hash_table *hash_table; | |
6352 | ||
6353 | /* We need a pointer to the armelf specific hash table. */ | |
6354 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
6355 | if (hash_table == NULL) |
6356 | return NULL; | |
252b5132 | 6357 | |
21d799b5 | 6358 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 6359 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
6360 | |
6361 | BFD_ASSERT (tmp_name); | |
6362 | ||
6363 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
6364 | ||
6365 | hash = elf_link_hash_lookup | |
b34976b6 | 6366 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 6367 | |
b1657152 AM |
6368 | if (hash == NULL |
6369 | && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"), | |
6370 | tmp_name, name) == -1) | |
6371 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
6372 | |
6373 | free (tmp_name); | |
6374 | ||
6375 | return hash; | |
6376 | } | |
6377 | ||
9b485d32 NC |
6378 | /* Locate the ARM encoded calling stub for NAME. */ |
6379 | ||
252b5132 | 6380 | static struct elf_link_hash_entry * |
57e8b36a NC |
6381 | find_arm_glue (struct bfd_link_info *link_info, |
6382 | const char *name, | |
f2a9dd69 | 6383 | char **error_message) |
252b5132 RH |
6384 | { |
6385 | char *tmp_name; | |
6386 | struct elf_link_hash_entry *myh; | |
6387 | struct elf32_arm_link_hash_table *hash_table; | |
6388 | ||
6389 | /* We need a pointer to the elfarm specific hash table. */ | |
6390 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
6391 | if (hash_table == NULL) |
6392 | return NULL; | |
252b5132 | 6393 | |
21d799b5 | 6394 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 6395 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
6396 | |
6397 | BFD_ASSERT (tmp_name); | |
6398 | ||
6399 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
6400 | ||
6401 | myh = elf_link_hash_lookup | |
b34976b6 | 6402 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 6403 | |
b1657152 AM |
6404 | if (myh == NULL |
6405 | && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"), | |
6406 | tmp_name, name) == -1) | |
6407 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
6408 | |
6409 | free (tmp_name); | |
6410 | ||
6411 | return myh; | |
6412 | } | |
6413 | ||
8f6277f5 | 6414 | /* ARM->Thumb glue (static images): |
252b5132 RH |
6415 | |
6416 | .arm | |
6417 | __func_from_arm: | |
6418 | ldr r12, __func_addr | |
6419 | bx r12 | |
6420 | __func_addr: | |
906e58ca | 6421 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 6422 | |
26079076 PB |
6423 | (v5t static images) |
6424 | .arm | |
6425 | __func_from_arm: | |
6426 | ldr pc, __func_addr | |
6427 | __func_addr: | |
906e58ca | 6428 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 6429 | |
8f6277f5 PB |
6430 | (relocatable images) |
6431 | .arm | |
6432 | __func_from_arm: | |
6433 | ldr r12, __func_offset | |
6434 | add r12, r12, pc | |
6435 | bx r12 | |
6436 | __func_offset: | |
8029a119 | 6437 | .word func - . */ |
8f6277f5 PB |
6438 | |
6439 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
6440 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
6441 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
6442 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
6443 | ||
26079076 PB |
6444 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
6445 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
6446 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
6447 | ||
8f6277f5 PB |
6448 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
6449 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
6450 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
6451 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
6452 | ||
9b485d32 | 6453 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 6454 | |
8029a119 NC |
6455 | .thumb .thumb |
6456 | .align 2 .align 2 | |
6457 | __func_from_thumb: __func_from_thumb: | |
6458 | bx pc push {r6, lr} | |
6459 | nop ldr r6, __func_addr | |
6460 | .arm mov lr, pc | |
6461 | b func bx r6 | |
99059e56 RM |
6462 | .arm |
6463 | ;; back_to_thumb | |
6464 | ldmia r13! {r6, lr} | |
6465 | bx lr | |
6466 | __func_addr: | |
6467 | .word func */ | |
252b5132 RH |
6468 | |
6469 | #define THUMB2ARM_GLUE_SIZE 8 | |
6470 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
6471 | static const insn16 t2a2_noop_insn = 0x46c0; | |
6472 | static const insn32 t2a3_b_insn = 0xea000000; | |
6473 | ||
c7b8f16e | 6474 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
a504d23a LA |
6475 | #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16 |
6476 | #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24 | |
c7b8f16e | 6477 | |
845b51d6 PB |
6478 | #define ARM_BX_VENEER_SIZE 12 |
6479 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
6480 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
6481 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
6482 | ||
7e392df6 | 6483 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
6484 | static void |
6485 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
6486 | { |
6487 | asection * s; | |
8029a119 | 6488 | bfd_byte * contents; |
252b5132 | 6489 | |
8029a119 | 6490 | if (size == 0) |
3e6b1042 DJ |
6491 | { |
6492 | /* Do not include empty glue sections in the output. */ | |
6493 | if (abfd != NULL) | |
6494 | { | |
3d4d4302 | 6495 | s = bfd_get_linker_section (abfd, name); |
3e6b1042 DJ |
6496 | if (s != NULL) |
6497 | s->flags |= SEC_EXCLUDE; | |
6498 | } | |
6499 | return; | |
6500 | } | |
252b5132 | 6501 | |
8029a119 | 6502 | BFD_ASSERT (abfd != NULL); |
252b5132 | 6503 | |
3d4d4302 | 6504 | s = bfd_get_linker_section (abfd, name); |
8029a119 | 6505 | BFD_ASSERT (s != NULL); |
252b5132 | 6506 | |
21d799b5 | 6507 | contents = (bfd_byte *) bfd_alloc (abfd, size); |
252b5132 | 6508 | |
8029a119 NC |
6509 | BFD_ASSERT (s->size == size); |
6510 | s->contents = contents; | |
6511 | } | |
906e58ca | 6512 | |
8029a119 NC |
6513 | bfd_boolean |
6514 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) | |
6515 | { | |
6516 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 6517 | |
8029a119 NC |
6518 | globals = elf32_arm_hash_table (info); |
6519 | BFD_ASSERT (globals != NULL); | |
906e58ca | 6520 | |
8029a119 NC |
6521 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6522 | globals->arm_glue_size, | |
6523 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 6524 | |
8029a119 NC |
6525 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6526 | globals->thumb_glue_size, | |
6527 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 6528 | |
8029a119 NC |
6529 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6530 | globals->vfp11_erratum_glue_size, | |
6531 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 6532 | |
a504d23a LA |
6533 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6534 | globals->stm32l4xx_erratum_glue_size, | |
6535 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
6536 | ||
8029a119 NC |
6537 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
6538 | globals->bx_glue_size, | |
845b51d6 PB |
6539 | ARM_BX_GLUE_SECTION_NAME); |
6540 | ||
b34976b6 | 6541 | return TRUE; |
252b5132 RH |
6542 | } |
6543 | ||
a4fd1a8e | 6544 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
6545 | returns the symbol identifying the stub. */ |
6546 | ||
a4fd1a8e | 6547 | static struct elf_link_hash_entry * |
57e8b36a NC |
6548 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
6549 | struct elf_link_hash_entry * h) | |
252b5132 RH |
6550 | { |
6551 | const char * name = h->root.root.string; | |
63b0f745 | 6552 | asection * s; |
252b5132 RH |
6553 | char * tmp_name; |
6554 | struct elf_link_hash_entry * myh; | |
14a793b2 | 6555 | struct bfd_link_hash_entry * bh; |
252b5132 | 6556 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 6557 | bfd_vma val; |
2f475487 | 6558 | bfd_size_type size; |
252b5132 RH |
6559 | |
6560 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
6561 | BFD_ASSERT (globals != NULL); |
6562 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6563 | ||
3d4d4302 | 6564 | s = bfd_get_linker_section |
252b5132 RH |
6565 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); |
6566 | ||
252b5132 RH |
6567 | BFD_ASSERT (s != NULL); |
6568 | ||
21d799b5 | 6569 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
99059e56 | 6570 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); |
252b5132 RH |
6571 | |
6572 | BFD_ASSERT (tmp_name); | |
6573 | ||
6574 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
6575 | ||
6576 | myh = elf_link_hash_lookup | |
b34976b6 | 6577 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
6578 | |
6579 | if (myh != NULL) | |
6580 | { | |
9b485d32 | 6581 | /* We've already seen this guy. */ |
252b5132 | 6582 | free (tmp_name); |
a4fd1a8e | 6583 | return myh; |
252b5132 RH |
6584 | } |
6585 | ||
57e8b36a NC |
6586 | /* The only trick here is using hash_table->arm_glue_size as the value. |
6587 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
6588 | putting it. The +1 on the value marks that the stub has not been |
6589 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 6590 | bh = NULL; |
dc810e39 AM |
6591 | val = globals->arm_glue_size + 1; |
6592 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
6593 | tmp_name, BSF_GLOBAL, s, val, | |
b34976b6 | 6594 | NULL, TRUE, FALSE, &bh); |
252b5132 | 6595 | |
b7693d02 DJ |
6596 | myh = (struct elf_link_hash_entry *) bh; |
6597 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6598 | myh->forced_local = 1; | |
6599 | ||
252b5132 RH |
6600 | free (tmp_name); |
6601 | ||
0e1862bb L |
6602 | if (bfd_link_pic (link_info) |
6603 | || globals->root.is_relocatable_executable | |
27e55c4d | 6604 | || globals->pic_veneer) |
2f475487 | 6605 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
6606 | else if (globals->use_blx) |
6607 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 6608 | else |
2f475487 AM |
6609 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
6610 | ||
6611 | s->size += size; | |
6612 | globals->arm_glue_size += size; | |
252b5132 | 6613 | |
a4fd1a8e | 6614 | return myh; |
252b5132 RH |
6615 | } |
6616 | ||
845b51d6 PB |
6617 | /* Allocate space for ARMv4 BX veneers. */ |
6618 | ||
6619 | static void | |
6620 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
6621 | { | |
6622 | asection * s; | |
6623 | struct elf32_arm_link_hash_table *globals; | |
6624 | char *tmp_name; | |
6625 | struct elf_link_hash_entry *myh; | |
6626 | struct bfd_link_hash_entry *bh; | |
6627 | bfd_vma val; | |
6628 | ||
6629 | /* BX PC does not need a veneer. */ | |
6630 | if (reg == 15) | |
6631 | return; | |
6632 | ||
6633 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
6634 | BFD_ASSERT (globals != NULL); |
6635 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6636 | ||
6637 | /* Check if this veneer has already been allocated. */ | |
6638 | if (globals->bx_glue_offset[reg]) | |
6639 | return; | |
6640 | ||
3d4d4302 | 6641 | s = bfd_get_linker_section |
845b51d6 PB |
6642 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); |
6643 | ||
6644 | BFD_ASSERT (s != NULL); | |
6645 | ||
6646 | /* Add symbol for veneer. */ | |
21d799b5 NC |
6647 | tmp_name = (char *) |
6648 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
906e58ca | 6649 | |
845b51d6 | 6650 | BFD_ASSERT (tmp_name); |
906e58ca | 6651 | |
845b51d6 | 6652 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 6653 | |
845b51d6 PB |
6654 | myh = elf_link_hash_lookup |
6655 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 6656 | |
845b51d6 | 6657 | BFD_ASSERT (myh == NULL); |
906e58ca | 6658 | |
845b51d6 PB |
6659 | bh = NULL; |
6660 | val = globals->bx_glue_size; | |
6661 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
99059e56 RM |
6662 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
6663 | NULL, TRUE, FALSE, &bh); | |
845b51d6 PB |
6664 | |
6665 | myh = (struct elf_link_hash_entry *) bh; | |
6666 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6667 | myh->forced_local = 1; | |
6668 | ||
6669 | s->size += ARM_BX_VENEER_SIZE; | |
6670 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
6671 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
6672 | } | |
6673 | ||
6674 | ||
c7b8f16e JB |
6675 | /* Add an entry to the code/data map for section SEC. */ |
6676 | ||
6677 | static void | |
6678 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
6679 | { | |
6680 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
6681 | unsigned int newidx; | |
906e58ca | 6682 | |
c7b8f16e JB |
6683 | if (sec_data->map == NULL) |
6684 | { | |
21d799b5 | 6685 | sec_data->map = (elf32_arm_section_map *) |
99059e56 | 6686 | bfd_malloc (sizeof (elf32_arm_section_map)); |
c7b8f16e JB |
6687 | sec_data->mapcount = 0; |
6688 | sec_data->mapsize = 1; | |
6689 | } | |
906e58ca | 6690 | |
c7b8f16e | 6691 | newidx = sec_data->mapcount++; |
906e58ca | 6692 | |
c7b8f16e JB |
6693 | if (sec_data->mapcount > sec_data->mapsize) |
6694 | { | |
6695 | sec_data->mapsize *= 2; | |
21d799b5 | 6696 | sec_data->map = (elf32_arm_section_map *) |
99059e56 RM |
6697 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize |
6698 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
6699 | } |
6700 | ||
6701 | if (sec_data->map) | |
6702 | { | |
6703 | sec_data->map[newidx].vma = vma; | |
6704 | sec_data->map[newidx].type = type; | |
c7b8f16e | 6705 | } |
c7b8f16e JB |
6706 | } |
6707 | ||
6708 | ||
6709 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
6710 | veneers are handled for now. */ | |
6711 | ||
6712 | static bfd_vma | |
6713 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
99059e56 RM |
6714 | elf32_vfp11_erratum_list *branch, |
6715 | bfd *branch_bfd, | |
6716 | asection *branch_sec, | |
6717 | unsigned int offset) | |
c7b8f16e JB |
6718 | { |
6719 | asection *s; | |
6720 | struct elf32_arm_link_hash_table *hash_table; | |
6721 | char *tmp_name; | |
6722 | struct elf_link_hash_entry *myh; | |
6723 | struct bfd_link_hash_entry *bh; | |
6724 | bfd_vma val; | |
6725 | struct _arm_elf_section_data *sec_data; | |
c7b8f16e | 6726 | elf32_vfp11_erratum_list *newerr; |
906e58ca | 6727 | |
c7b8f16e | 6728 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
6729 | BFD_ASSERT (hash_table != NULL); |
6730 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 6731 | |
3d4d4302 | 6732 | s = bfd_get_linker_section |
c7b8f16e | 6733 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); |
906e58ca | 6734 | |
c7b8f16e | 6735 | sec_data = elf32_arm_section_data (s); |
906e58ca | 6736 | |
c7b8f16e | 6737 | BFD_ASSERT (s != NULL); |
906e58ca | 6738 | |
21d799b5 | 6739 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 6740 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
906e58ca | 6741 | |
c7b8f16e | 6742 | BFD_ASSERT (tmp_name); |
906e58ca | 6743 | |
c7b8f16e JB |
6744 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
6745 | hash_table->num_vfp11_fixes); | |
906e58ca | 6746 | |
c7b8f16e JB |
6747 | myh = elf_link_hash_lookup |
6748 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 6749 | |
c7b8f16e | 6750 | BFD_ASSERT (myh == NULL); |
906e58ca | 6751 | |
c7b8f16e JB |
6752 | bh = NULL; |
6753 | val = hash_table->vfp11_erratum_glue_size; | |
6754 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
99059e56 RM |
6755 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, |
6756 | NULL, TRUE, FALSE, &bh); | |
c7b8f16e JB |
6757 | |
6758 | myh = (struct elf_link_hash_entry *) bh; | |
6759 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6760 | myh->forced_local = 1; | |
6761 | ||
6762 | /* Link veneer back to calling location. */ | |
c7e2358a | 6763 | sec_data->erratumcount += 1; |
21d799b5 NC |
6764 | newerr = (elf32_vfp11_erratum_list *) |
6765 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 6766 | |
c7b8f16e JB |
6767 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
6768 | newerr->vma = -1; | |
6769 | newerr->u.v.branch = branch; | |
6770 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
6771 | branch->u.b.veneer = newerr; | |
6772 | ||
6773 | newerr->next = sec_data->erratumlist; | |
6774 | sec_data->erratumlist = newerr; | |
6775 | ||
6776 | /* A symbol for the return from the veneer. */ | |
6777 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6778 | hash_table->num_vfp11_fixes); | |
6779 | ||
6780 | myh = elf_link_hash_lookup | |
6781 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 6782 | |
c7b8f16e JB |
6783 | if (myh != NULL) |
6784 | abort (); | |
6785 | ||
6786 | bh = NULL; | |
6787 | val = offset + 4; | |
6788 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
6789 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
906e58ca | 6790 | |
c7b8f16e JB |
6791 | myh = (struct elf_link_hash_entry *) bh; |
6792 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6793 | myh->forced_local = 1; | |
6794 | ||
6795 | free (tmp_name); | |
906e58ca | 6796 | |
c7b8f16e JB |
6797 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
6798 | entry for that symbol to the code/data map for the section. */ | |
6799 | if (hash_table->vfp11_erratum_glue_size == 0) | |
6800 | { | |
6801 | bh = NULL; | |
6802 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
99059e56 | 6803 | ever requires this erratum fix. */ |
c7b8f16e JB |
6804 | _bfd_generic_link_add_one_symbol (link_info, |
6805 | hash_table->bfd_of_glue_owner, "$a", | |
6806 | BSF_LOCAL, s, 0, NULL, | |
99059e56 | 6807 | TRUE, FALSE, &bh); |
c7b8f16e JB |
6808 | |
6809 | myh = (struct elf_link_hash_entry *) bh; | |
6810 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
6811 | myh->forced_local = 1; | |
906e58ca | 6812 | |
c7b8f16e | 6813 | /* The elf32_arm_init_maps function only cares about symbols from input |
99059e56 RM |
6814 | BFDs. We must make a note of this generated mapping symbol |
6815 | ourselves so that code byteswapping works properly in | |
6816 | elf32_arm_write_section. */ | |
c7b8f16e JB |
6817 | elf32_arm_section_map_add (s, 'a', 0); |
6818 | } | |
906e58ca | 6819 | |
c7b8f16e JB |
6820 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
6821 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
6822 | hash_table->num_vfp11_fixes++; | |
906e58ca | 6823 | |
c7b8f16e JB |
6824 | /* The offset of the veneer. */ |
6825 | return val; | |
6826 | } | |
6827 | ||
a504d23a LA |
6828 | /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode |
6829 | veneers need to be handled because used only in Cortex-M. */ | |
6830 | ||
6831 | static bfd_vma | |
6832 | record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info, | |
6833 | elf32_stm32l4xx_erratum_list *branch, | |
6834 | bfd *branch_bfd, | |
6835 | asection *branch_sec, | |
6836 | unsigned int offset, | |
6837 | bfd_size_type veneer_size) | |
6838 | { | |
6839 | asection *s; | |
6840 | struct elf32_arm_link_hash_table *hash_table; | |
6841 | char *tmp_name; | |
6842 | struct elf_link_hash_entry *myh; | |
6843 | struct bfd_link_hash_entry *bh; | |
6844 | bfd_vma val; | |
6845 | struct _arm_elf_section_data *sec_data; | |
6846 | elf32_stm32l4xx_erratum_list *newerr; | |
6847 | ||
6848 | hash_table = elf32_arm_hash_table (link_info); | |
6849 | BFD_ASSERT (hash_table != NULL); | |
6850 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
6851 | ||
6852 | s = bfd_get_linker_section | |
6853 | (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
6854 | ||
6855 | BFD_ASSERT (s != NULL); | |
6856 | ||
6857 | sec_data = elf32_arm_section_data (s); | |
6858 | ||
6859 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
6860 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
6861 | ||
6862 | BFD_ASSERT (tmp_name); | |
6863 | ||
6864 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
6865 | hash_table->num_stm32l4xx_fixes); | |
6866 | ||
6867 | myh = elf_link_hash_lookup | |
6868 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
6869 | ||
6870 | BFD_ASSERT (myh == NULL); | |
6871 | ||
6872 | bh = NULL; | |
6873 | val = hash_table->stm32l4xx_erratum_glue_size; | |
6874 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
6875 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
6876 | NULL, TRUE, FALSE, &bh); | |
6877 | ||
6878 | myh = (struct elf_link_hash_entry *) bh; | |
6879 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6880 | myh->forced_local = 1; | |
6881 | ||
6882 | /* Link veneer back to calling location. */ | |
6883 | sec_data->stm32l4xx_erratumcount += 1; | |
6884 | newerr = (elf32_stm32l4xx_erratum_list *) | |
6885 | bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list)); | |
6886 | ||
6887 | newerr->type = STM32L4XX_ERRATUM_VENEER; | |
6888 | newerr->vma = -1; | |
6889 | newerr->u.v.branch = branch; | |
6890 | newerr->u.v.id = hash_table->num_stm32l4xx_fixes; | |
6891 | branch->u.b.veneer = newerr; | |
6892 | ||
6893 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
6894 | sec_data->stm32l4xx_erratumlist = newerr; | |
6895 | ||
6896 | /* A symbol for the return from the veneer. */ | |
6897 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6898 | hash_table->num_stm32l4xx_fixes); | |
6899 | ||
6900 | myh = elf_link_hash_lookup | |
6901 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
6902 | ||
6903 | if (myh != NULL) | |
6904 | abort (); | |
6905 | ||
6906 | bh = NULL; | |
6907 | val = offset + 4; | |
6908 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
6909 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
6910 | ||
6911 | myh = (struct elf_link_hash_entry *) bh; | |
6912 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
6913 | myh->forced_local = 1; | |
6914 | ||
6915 | free (tmp_name); | |
6916 | ||
6917 | /* Generate a mapping symbol for the veneer section, and explicitly add an | |
6918 | entry for that symbol to the code/data map for the section. */ | |
6919 | if (hash_table->stm32l4xx_erratum_glue_size == 0) | |
6920 | { | |
6921 | bh = NULL; | |
6922 | /* Creates a THUMB symbol since there is no other choice. */ | |
6923 | _bfd_generic_link_add_one_symbol (link_info, | |
6924 | hash_table->bfd_of_glue_owner, "$t", | |
6925 | BSF_LOCAL, s, 0, NULL, | |
6926 | TRUE, FALSE, &bh); | |
6927 | ||
6928 | myh = (struct elf_link_hash_entry *) bh; | |
6929 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
6930 | myh->forced_local = 1; | |
6931 | ||
6932 | /* The elf32_arm_init_maps function only cares about symbols from input | |
6933 | BFDs. We must make a note of this generated mapping symbol | |
6934 | ourselves so that code byteswapping works properly in | |
6935 | elf32_arm_write_section. */ | |
6936 | elf32_arm_section_map_add (s, 't', 0); | |
6937 | } | |
6938 | ||
6939 | s->size += veneer_size; | |
6940 | hash_table->stm32l4xx_erratum_glue_size += veneer_size; | |
6941 | hash_table->num_stm32l4xx_fixes++; | |
6942 | ||
6943 | /* The offset of the veneer. */ | |
6944 | return val; | |
6945 | } | |
6946 | ||
8029a119 | 6947 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
6948 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
6949 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
6950 | |
6951 | /* Create a fake section for use by the ARM backend of the linker. */ | |
6952 | ||
6953 | static bfd_boolean | |
6954 | arm_make_glue_section (bfd * abfd, const char * name) | |
6955 | { | |
6956 | asection * sec; | |
6957 | ||
3d4d4302 | 6958 | sec = bfd_get_linker_section (abfd, name); |
8029a119 NC |
6959 | if (sec != NULL) |
6960 | /* Already made. */ | |
6961 | return TRUE; | |
6962 | ||
3d4d4302 | 6963 | sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); |
8029a119 NC |
6964 | |
6965 | if (sec == NULL | |
6966 | || !bfd_set_section_alignment (abfd, sec, 2)) | |
6967 | return FALSE; | |
6968 | ||
6969 | /* Set the gc mark to prevent the section from being removed by garbage | |
6970 | collection, despite the fact that no relocs refer to this section. */ | |
6971 | sec->gc_mark = 1; | |
6972 | ||
6973 | return TRUE; | |
6974 | } | |
6975 | ||
1db37fe6 YG |
6976 | /* Set size of .plt entries. This function is called from the |
6977 | linker scripts in ld/emultempl/{armelf}.em. */ | |
6978 | ||
6979 | void | |
6980 | bfd_elf32_arm_use_long_plt (void) | |
6981 | { | |
6982 | elf32_arm_use_long_plt_entry = TRUE; | |
6983 | } | |
6984 | ||
8afb0e02 NC |
6985 | /* Add the glue sections to ABFD. This function is called from the |
6986 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 6987 | |
b34976b6 | 6988 | bfd_boolean |
57e8b36a NC |
6989 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
6990 | struct bfd_link_info *info) | |
252b5132 | 6991 | { |
a504d23a LA |
6992 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); |
6993 | bfd_boolean dostm32l4xx = globals | |
6994 | && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE; | |
6995 | bfd_boolean addglue; | |
6996 | ||
8afb0e02 NC |
6997 | /* If we are only performing a partial |
6998 | link do not bother adding the glue. */ | |
0e1862bb | 6999 | if (bfd_link_relocatable (info)) |
b34976b6 | 7000 | return TRUE; |
252b5132 | 7001 | |
a504d23a | 7002 | addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
8029a119 NC |
7003 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) |
7004 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
7005 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
a504d23a LA |
7006 | |
7007 | if (!dostm32l4xx) | |
7008 | return addglue; | |
7009 | ||
7010 | return addglue | |
7011 | && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME); | |
8afb0e02 NC |
7012 | } |
7013 | ||
daa4adae TP |
7014 | /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This |
7015 | ensures they are not marked for deletion by | |
7016 | strip_excluded_output_sections () when veneers are going to be created | |
7017 | later. Not doing so would trigger assert on empty section size in | |
7018 | lang_size_sections_1 (). */ | |
7019 | ||
7020 | void | |
7021 | bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info) | |
7022 | { | |
7023 | enum elf32_arm_stub_type stub_type; | |
7024 | ||
7025 | /* If we are only performing a partial | |
7026 | link do not bother adding the glue. */ | |
7027 | if (bfd_link_relocatable (info)) | |
7028 | return; | |
7029 | ||
7030 | for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++) | |
7031 | { | |
7032 | asection *out_sec; | |
7033 | const char *out_sec_name; | |
7034 | ||
7035 | if (!arm_dedicated_stub_output_section_required (stub_type)) | |
7036 | continue; | |
7037 | ||
7038 | out_sec_name = arm_dedicated_stub_output_section_name (stub_type); | |
7039 | out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name); | |
7040 | if (out_sec != NULL) | |
7041 | out_sec->flags |= SEC_KEEP; | |
7042 | } | |
7043 | } | |
7044 | ||
8afb0e02 NC |
7045 | /* Select a BFD to be used to hold the sections used by the glue code. |
7046 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 7047 | {armelf/pe}.em. */ |
8afb0e02 | 7048 | |
b34976b6 | 7049 | bfd_boolean |
57e8b36a | 7050 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
7051 | { |
7052 | struct elf32_arm_link_hash_table *globals; | |
7053 | ||
7054 | /* If we are only performing a partial link | |
7055 | do not bother getting a bfd to hold the glue. */ | |
0e1862bb | 7056 | if (bfd_link_relocatable (info)) |
b34976b6 | 7057 | return TRUE; |
8afb0e02 | 7058 | |
b7693d02 DJ |
7059 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
7060 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
7061 | ||
8afb0e02 | 7062 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
7063 | BFD_ASSERT (globals != NULL); |
7064 | ||
7065 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 7066 | return TRUE; |
8afb0e02 | 7067 | |
252b5132 RH |
7068 | /* Save the bfd for later use. */ |
7069 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 7070 | |
b34976b6 | 7071 | return TRUE; |
252b5132 RH |
7072 | } |
7073 | ||
906e58ca NC |
7074 | static void |
7075 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 7076 | { |
2de70689 MGD |
7077 | int cpu_arch; |
7078 | ||
b38cadfb | 7079 | cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
2de70689 MGD |
7080 | Tag_CPU_arch); |
7081 | ||
7082 | if (globals->fix_arm1176) | |
7083 | { | |
7084 | if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K) | |
7085 | globals->use_blx = 1; | |
7086 | } | |
7087 | else | |
7088 | { | |
7089 | if (cpu_arch > TAG_CPU_ARCH_V4T) | |
7090 | globals->use_blx = 1; | |
7091 | } | |
39b41c9c PB |
7092 | } |
7093 | ||
b34976b6 | 7094 | bfd_boolean |
57e8b36a | 7095 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 7096 | struct bfd_link_info *link_info) |
252b5132 RH |
7097 | { |
7098 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 7099 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
7100 | Elf_Internal_Rela *irel, *irelend; |
7101 | bfd_byte *contents = NULL; | |
252b5132 RH |
7102 | |
7103 | asection *sec; | |
7104 | struct elf32_arm_link_hash_table *globals; | |
7105 | ||
7106 | /* If we are only performing a partial link do not bother | |
7107 | to construct any glue. */ | |
0e1862bb | 7108 | if (bfd_link_relocatable (link_info)) |
b34976b6 | 7109 | return TRUE; |
252b5132 | 7110 | |
39ce1a6a NC |
7111 | /* Here we have a bfd that is to be included on the link. We have a |
7112 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 7113 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 7114 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
7115 | |
7116 | check_use_blx (globals); | |
252b5132 | 7117 | |
d504ffc8 | 7118 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 7119 | { |
d003868e AM |
7120 | _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."), |
7121 | abfd); | |
e489d0ae PB |
7122 | return FALSE; |
7123 | } | |
f21f3fe0 | 7124 | |
39ce1a6a NC |
7125 | /* PR 5398: If we have not decided to include any loadable sections in |
7126 | the output then we will not have a glue owner bfd. This is OK, it | |
7127 | just means that there is nothing else for us to do here. */ | |
7128 | if (globals->bfd_of_glue_owner == NULL) | |
7129 | return TRUE; | |
7130 | ||
252b5132 RH |
7131 | /* Rummage around all the relocs and map the glue vectors. */ |
7132 | sec = abfd->sections; | |
7133 | ||
7134 | if (sec == NULL) | |
b34976b6 | 7135 | return TRUE; |
252b5132 RH |
7136 | |
7137 | for (; sec != NULL; sec = sec->next) | |
7138 | { | |
7139 | if (sec->reloc_count == 0) | |
7140 | continue; | |
7141 | ||
2f475487 AM |
7142 | if ((sec->flags & SEC_EXCLUDE) != 0) |
7143 | continue; | |
7144 | ||
0ffa91dd | 7145 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 7146 | |
9b485d32 | 7147 | /* Load the relocs. */ |
6cdc0ccc | 7148 | internal_relocs |
906e58ca | 7149 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
252b5132 | 7150 | |
6cdc0ccc AM |
7151 | if (internal_relocs == NULL) |
7152 | goto error_return; | |
252b5132 | 7153 | |
6cdc0ccc AM |
7154 | irelend = internal_relocs + sec->reloc_count; |
7155 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
7156 | { |
7157 | long r_type; | |
7158 | unsigned long r_index; | |
252b5132 RH |
7159 | |
7160 | struct elf_link_hash_entry *h; | |
7161 | ||
7162 | r_type = ELF32_R_TYPE (irel->r_info); | |
7163 | r_index = ELF32_R_SYM (irel->r_info); | |
7164 | ||
9b485d32 | 7165 | /* These are the only relocation types we care about. */ |
ba96a88f | 7166 | if ( r_type != R_ARM_PC24 |
845b51d6 | 7167 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
7168 | continue; |
7169 | ||
7170 | /* Get the section contents if we haven't done so already. */ | |
7171 | if (contents == NULL) | |
7172 | { | |
7173 | /* Get cached copy if it exists. */ | |
7174 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
7175 | contents = elf_section_data (sec)->this_hdr.contents; | |
7176 | else | |
7177 | { | |
7178 | /* Go get them off disk. */ | |
57e8b36a | 7179 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
7180 | goto error_return; |
7181 | } | |
7182 | } | |
7183 | ||
845b51d6 PB |
7184 | if (r_type == R_ARM_V4BX) |
7185 | { | |
7186 | int reg; | |
7187 | ||
7188 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
7189 | record_arm_bx_glue (link_info, reg); | |
7190 | continue; | |
7191 | } | |
7192 | ||
a7c10850 | 7193 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
7194 | h = NULL; |
7195 | ||
9b485d32 | 7196 | /* We don't care about local symbols. */ |
252b5132 RH |
7197 | if (r_index < symtab_hdr->sh_info) |
7198 | continue; | |
7199 | ||
9b485d32 | 7200 | /* This is an external symbol. */ |
252b5132 RH |
7201 | r_index -= symtab_hdr->sh_info; |
7202 | h = (struct elf_link_hash_entry *) | |
7203 | elf_sym_hashes (abfd)[r_index]; | |
7204 | ||
7205 | /* If the relocation is against a static symbol it must be within | |
7206 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
7207 | if (h == NULL) | |
7208 | continue; | |
7209 | ||
d504ffc8 DJ |
7210 | /* If the call will go through a PLT entry then we do not need |
7211 | glue. */ | |
362d30a1 | 7212 | if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1) |
b7693d02 DJ |
7213 | continue; |
7214 | ||
252b5132 RH |
7215 | switch (r_type) |
7216 | { | |
7217 | case R_ARM_PC24: | |
7218 | /* This one is a call from arm code. We need to look up | |
99059e56 RM |
7219 | the target of the call. If it is a thumb target, we |
7220 | insert glue. */ | |
39d911fc TP |
7221 | if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal) |
7222 | == ST_BRANCH_TO_THUMB) | |
252b5132 RH |
7223 | record_arm_to_thumb_glue (link_info, h); |
7224 | break; | |
7225 | ||
252b5132 | 7226 | default: |
c6596c5e | 7227 | abort (); |
252b5132 RH |
7228 | } |
7229 | } | |
6cdc0ccc AM |
7230 | |
7231 | if (contents != NULL | |
7232 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7233 | free (contents); | |
7234 | contents = NULL; | |
7235 | ||
7236 | if (internal_relocs != NULL | |
7237 | && elf_section_data (sec)->relocs != internal_relocs) | |
7238 | free (internal_relocs); | |
7239 | internal_relocs = NULL; | |
252b5132 RH |
7240 | } |
7241 | ||
b34976b6 | 7242 | return TRUE; |
9a5aca8c | 7243 | |
252b5132 | 7244 | error_return: |
6cdc0ccc AM |
7245 | if (contents != NULL |
7246 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7247 | free (contents); | |
7248 | if (internal_relocs != NULL | |
7249 | && elf_section_data (sec)->relocs != internal_relocs) | |
7250 | free (internal_relocs); | |
9a5aca8c | 7251 | |
b34976b6 | 7252 | return FALSE; |
252b5132 | 7253 | } |
7e392df6 | 7254 | #endif |
252b5132 | 7255 | |
eb043451 | 7256 | |
c7b8f16e JB |
7257 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
7258 | ||
7259 | void | |
7260 | bfd_elf32_arm_init_maps (bfd *abfd) | |
7261 | { | |
7262 | Elf_Internal_Sym *isymbuf; | |
7263 | Elf_Internal_Shdr *hdr; | |
7264 | unsigned int i, localsyms; | |
7265 | ||
af1f4419 NC |
7266 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
7267 | if (! is_arm_elf (abfd)) | |
7268 | return; | |
7269 | ||
c7b8f16e JB |
7270 | if ((abfd->flags & DYNAMIC) != 0) |
7271 | return; | |
7272 | ||
0ffa91dd | 7273 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
7274 | localsyms = hdr->sh_info; |
7275 | ||
7276 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
7277 | should contain the number of local symbols, which should come before any | |
7278 | global symbols. Mapping symbols are always local. */ | |
7279 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
7280 | NULL); | |
7281 | ||
7282 | /* No internal symbols read? Skip this BFD. */ | |
7283 | if (isymbuf == NULL) | |
7284 | return; | |
7285 | ||
7286 | for (i = 0; i < localsyms; i++) | |
7287 | { | |
7288 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
7289 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
7290 | const char *name; | |
906e58ca | 7291 | |
c7b8f16e | 7292 | if (sec != NULL |
99059e56 RM |
7293 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) |
7294 | { | |
7295 | name = bfd_elf_string_from_elf_section (abfd, | |
7296 | hdr->sh_link, isym->st_name); | |
906e58ca | 7297 | |
99059e56 | 7298 | if (bfd_is_arm_special_symbol_name (name, |
c7b8f16e | 7299 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) |
99059e56 RM |
7300 | elf32_arm_section_map_add (sec, name[1], isym->st_value); |
7301 | } | |
c7b8f16e JB |
7302 | } |
7303 | } | |
7304 | ||
7305 | ||
48229727 JB |
7306 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
7307 | say what they wanted. */ | |
7308 | ||
7309 | void | |
7310 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
7311 | { | |
7312 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
7313 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
7314 | ||
4dfe6ac6 NC |
7315 | if (globals == NULL) |
7316 | return; | |
7317 | ||
48229727 JB |
7318 | if (globals->fix_cortex_a8 == -1) |
7319 | { | |
7320 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
7321 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
7322 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
7323 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
7324 | globals->fix_cortex_a8 = 1; | |
7325 | else | |
7326 | globals->fix_cortex_a8 = 0; | |
7327 | } | |
7328 | } | |
7329 | ||
7330 | ||
c7b8f16e JB |
7331 | void |
7332 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
7333 | { | |
7334 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 7335 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 7336 | |
4dfe6ac6 NC |
7337 | if (globals == NULL) |
7338 | return; | |
c7b8f16e JB |
7339 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
7340 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
7341 | { | |
7342 | switch (globals->vfp11_fix) | |
99059e56 RM |
7343 | { |
7344 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
7345 | case BFD_ARM_VFP11_FIX_NONE: | |
7346 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
7347 | break; | |
7348 | ||
7349 | default: | |
7350 | /* Give a warning, but do as the user requests anyway. */ | |
7351 | (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum " | |
7352 | "workaround is not necessary for target architecture"), obfd); | |
7353 | } | |
c7b8f16e JB |
7354 | } |
7355 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
7356 | /* For earlier architectures, we might need the workaround, but do not | |
7357 | enable it by default. If users is running with broken hardware, they | |
7358 | must enable the erratum fix explicitly. */ | |
7359 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
7360 | } | |
7361 | ||
a504d23a LA |
7362 | void |
7363 | bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info) | |
7364 | { | |
7365 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
7366 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
7367 | ||
7368 | if (globals == NULL) | |
7369 | return; | |
7370 | ||
7371 | /* We assume only Cortex-M4 may require the fix. */ | |
7372 | if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M | |
7373 | || out_attr[Tag_CPU_arch_profile].i != 'M') | |
7374 | { | |
7375 | if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE) | |
7376 | /* Give a warning, but do as the user requests anyway. */ | |
7377 | (*_bfd_error_handler) | |
7378 | (_("%B: warning: selected STM32L4XX erratum " | |
7379 | "workaround is not necessary for target architecture"), obfd); | |
7380 | } | |
7381 | } | |
c7b8f16e | 7382 | |
906e58ca NC |
7383 | enum bfd_arm_vfp11_pipe |
7384 | { | |
c7b8f16e JB |
7385 | VFP11_FMAC, |
7386 | VFP11_LS, | |
7387 | VFP11_DS, | |
7388 | VFP11_BAD | |
7389 | }; | |
7390 | ||
7391 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
7392 | registers, or X:RX for double-precision registers, where RX is the group of | |
7393 | four bits in the instruction encoding and X is the single extension bit. | |
7394 | RX and X fields are specified using their lowest (starting) bit. The return | |
7395 | value is: | |
7396 | ||
7397 | 0...31: single-precision registers s0...s31 | |
7398 | 32...63: double-precision registers d0...d31. | |
906e58ca | 7399 | |
c7b8f16e JB |
7400 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
7401 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 7402 | |
c7b8f16e JB |
7403 | static unsigned int |
7404 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, | |
99059e56 | 7405 | unsigned int x) |
c7b8f16e JB |
7406 | { |
7407 | if (is_double) | |
7408 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
7409 | else | |
7410 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
7411 | } | |
7412 | ||
7413 | /* Set bits in *WMASK according to a register number REG as encoded by | |
7414 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
7415 | ||
7416 | static void | |
7417 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
7418 | { | |
7419 | if (reg < 32) | |
7420 | *wmask |= 1 << reg; | |
7421 | else if (reg < 48) | |
7422 | *wmask |= 3 << ((reg - 32) * 2); | |
7423 | } | |
7424 | ||
7425 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
7426 | ||
7427 | static bfd_boolean | |
7428 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) | |
7429 | { | |
7430 | int i; | |
906e58ca | 7431 | |
c7b8f16e JB |
7432 | for (i = 0; i < numregs; i++) |
7433 | { | |
7434 | unsigned int reg = regs[i]; | |
7435 | ||
7436 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
99059e56 | 7437 | return TRUE; |
906e58ca | 7438 | |
c7b8f16e JB |
7439 | reg -= 32; |
7440 | ||
7441 | if (reg >= 16) | |
99059e56 | 7442 | continue; |
906e58ca | 7443 | |
c7b8f16e | 7444 | if ((wmask & (3 << (reg * 2))) != 0) |
99059e56 | 7445 | return TRUE; |
c7b8f16e | 7446 | } |
906e58ca | 7447 | |
c7b8f16e JB |
7448 | return FALSE; |
7449 | } | |
7450 | ||
7451 | /* In this function, we're interested in two things: finding input registers | |
7452 | for VFP data-processing instructions, and finding the set of registers which | |
7453 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
7454 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
7455 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
7456 | implemented by the chip in question). DP registers are marked by setting | |
7457 | both SP registers in the write mask). */ | |
7458 | ||
7459 | static enum bfd_arm_vfp11_pipe | |
7460 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
99059e56 | 7461 | int *numregs) |
c7b8f16e | 7462 | { |
91d6fa6a | 7463 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
c7b8f16e JB |
7464 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
7465 | ||
7466 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
7467 | { | |
7468 | unsigned int pqrs; | |
7469 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
7470 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
7471 | ||
7472 | pqrs = ((insn & 0x00800000) >> 20) | |
99059e56 RM |
7473 | | ((insn & 0x00300000) >> 19) |
7474 | | ((insn & 0x00000040) >> 6); | |
c7b8f16e JB |
7475 | |
7476 | switch (pqrs) | |
99059e56 RM |
7477 | { |
7478 | case 0: /* fmac[sd]. */ | |
7479 | case 1: /* fnmac[sd]. */ | |
7480 | case 2: /* fmsc[sd]. */ | |
7481 | case 3: /* fnmsc[sd]. */ | |
7482 | vpipe = VFP11_FMAC; | |
7483 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7484 | regs[0] = fd; | |
7485 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
7486 | regs[2] = fm; | |
7487 | *numregs = 3; | |
7488 | break; | |
7489 | ||
7490 | case 4: /* fmul[sd]. */ | |
7491 | case 5: /* fnmul[sd]. */ | |
7492 | case 6: /* fadd[sd]. */ | |
7493 | case 7: /* fsub[sd]. */ | |
7494 | vpipe = VFP11_FMAC; | |
7495 | goto vfp_binop; | |
7496 | ||
7497 | case 8: /* fdiv[sd]. */ | |
7498 | vpipe = VFP11_DS; | |
7499 | vfp_binop: | |
7500 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7501 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
7502 | regs[1] = fm; | |
7503 | *numregs = 2; | |
7504 | break; | |
7505 | ||
7506 | case 15: /* extended opcode. */ | |
7507 | { | |
7508 | unsigned int extn = ((insn >> 15) & 0x1e) | |
7509 | | ((insn >> 7) & 1); | |
7510 | ||
7511 | switch (extn) | |
7512 | { | |
7513 | case 0: /* fcpy[sd]. */ | |
7514 | case 1: /* fabs[sd]. */ | |
7515 | case 2: /* fneg[sd]. */ | |
7516 | case 8: /* fcmp[sd]. */ | |
7517 | case 9: /* fcmpe[sd]. */ | |
7518 | case 10: /* fcmpz[sd]. */ | |
7519 | case 11: /* fcmpez[sd]. */ | |
7520 | case 16: /* fuito[sd]. */ | |
7521 | case 17: /* fsito[sd]. */ | |
7522 | case 24: /* ftoui[sd]. */ | |
7523 | case 25: /* ftouiz[sd]. */ | |
7524 | case 26: /* ftosi[sd]. */ | |
7525 | case 27: /* ftosiz[sd]. */ | |
7526 | /* These instructions will not bounce due to underflow. */ | |
7527 | *numregs = 0; | |
7528 | vpipe = VFP11_FMAC; | |
7529 | break; | |
7530 | ||
7531 | case 3: /* fsqrt[sd]. */ | |
7532 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
7533 | registers to cause the erratum in previous instructions. */ | |
7534 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7535 | vpipe = VFP11_DS; | |
7536 | break; | |
7537 | ||
7538 | case 15: /* fcvt{ds,sd}. */ | |
7539 | { | |
7540 | int rnum = 0; | |
7541 | ||
7542 | bfd_arm_vfp11_write_mask (destmask, fd); | |
c7b8f16e JB |
7543 | |
7544 | /* Only FCVTSD can underflow. */ | |
99059e56 RM |
7545 | if ((insn & 0x100) != 0) |
7546 | regs[rnum++] = fm; | |
c7b8f16e | 7547 | |
99059e56 | 7548 | *numregs = rnum; |
c7b8f16e | 7549 | |
99059e56 RM |
7550 | vpipe = VFP11_FMAC; |
7551 | } | |
7552 | break; | |
c7b8f16e | 7553 | |
99059e56 RM |
7554 | default: |
7555 | return VFP11_BAD; | |
7556 | } | |
7557 | } | |
7558 | break; | |
c7b8f16e | 7559 | |
99059e56 RM |
7560 | default: |
7561 | return VFP11_BAD; | |
7562 | } | |
c7b8f16e JB |
7563 | } |
7564 | /* Two-register transfer. */ | |
7565 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
7566 | { | |
7567 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 7568 | |
c7b8f16e JB |
7569 | if ((insn & 0x100000) == 0) |
7570 | { | |
99059e56 RM |
7571 | if (is_double) |
7572 | bfd_arm_vfp11_write_mask (destmask, fm); | |
7573 | else | |
7574 | { | |
7575 | bfd_arm_vfp11_write_mask (destmask, fm); | |
7576 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
7577 | } | |
c7b8f16e JB |
7578 | } |
7579 | ||
91d6fa6a | 7580 | vpipe = VFP11_LS; |
c7b8f16e JB |
7581 | } |
7582 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
7583 | { | |
7584 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
7585 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 7586 | |
c7b8f16e | 7587 | switch (puw) |
99059e56 RM |
7588 | { |
7589 | case 0: /* Two-reg transfer. We should catch these above. */ | |
7590 | abort (); | |
906e58ca | 7591 | |
99059e56 RM |
7592 | case 2: /* fldm[sdx]. */ |
7593 | case 3: | |
7594 | case 5: | |
7595 | { | |
7596 | unsigned int i, offset = insn & 0xff; | |
c7b8f16e | 7597 | |
99059e56 RM |
7598 | if (is_double) |
7599 | offset >>= 1; | |
c7b8f16e | 7600 | |
99059e56 RM |
7601 | for (i = fd; i < fd + offset; i++) |
7602 | bfd_arm_vfp11_write_mask (destmask, i); | |
7603 | } | |
7604 | break; | |
906e58ca | 7605 | |
99059e56 RM |
7606 | case 4: /* fld[sd]. */ |
7607 | case 6: | |
7608 | bfd_arm_vfp11_write_mask (destmask, fd); | |
7609 | break; | |
906e58ca | 7610 | |
99059e56 RM |
7611 | default: |
7612 | return VFP11_BAD; | |
7613 | } | |
c7b8f16e | 7614 | |
91d6fa6a | 7615 | vpipe = VFP11_LS; |
c7b8f16e JB |
7616 | } |
7617 | /* Single-register transfer. Note L==0. */ | |
7618 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
7619 | { | |
7620 | unsigned int opcode = (insn >> 21) & 7; | |
7621 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
7622 | ||
7623 | switch (opcode) | |
99059e56 RM |
7624 | { |
7625 | case 0: /* fmsr/fmdlr. */ | |
7626 | case 1: /* fmdhr. */ | |
7627 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
7628 | destination register. I don't know if this is exactly right, | |
7629 | but it is the conservative choice. */ | |
7630 | bfd_arm_vfp11_write_mask (destmask, fn); | |
7631 | break; | |
7632 | ||
7633 | case 7: /* fmxr. */ | |
7634 | break; | |
7635 | } | |
c7b8f16e | 7636 | |
91d6fa6a | 7637 | vpipe = VFP11_LS; |
c7b8f16e JB |
7638 | } |
7639 | ||
91d6fa6a | 7640 | return vpipe; |
c7b8f16e JB |
7641 | } |
7642 | ||
7643 | ||
7644 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
7645 | ||
7646 | ||
7647 | /* Look for potentially-troublesome code sequences which might trigger the | |
7648 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
7649 | (available from ARM) for details of the erratum. A short version is | |
7650 | described in ld.texinfo. */ | |
7651 | ||
7652 | bfd_boolean | |
7653 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) | |
7654 | { | |
7655 | asection *sec; | |
7656 | bfd_byte *contents = NULL; | |
7657 | int state = 0; | |
7658 | int regs[3], numregs = 0; | |
7659 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
7660 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 7661 | |
4dfe6ac6 NC |
7662 | if (globals == NULL) |
7663 | return FALSE; | |
7664 | ||
c7b8f16e JB |
7665 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
7666 | The states transition as follows: | |
906e58ca | 7667 | |
c7b8f16e | 7668 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
99059e56 RM |
7669 | A VFP FMAC-pipeline instruction has been seen. Fill |
7670 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
7671 | instruction in 'first_fmac'. | |
c7b8f16e JB |
7672 | |
7673 | 1 -> 2 | |
99059e56 RM |
7674 | Any instruction, except for a VFP instruction which overwrites |
7675 | regs[*]. | |
906e58ca | 7676 | |
c7b8f16e JB |
7677 | 1 -> 3 [ -> 0 ] or |
7678 | 2 -> 3 [ -> 0 ] | |
99059e56 RM |
7679 | A VFP instruction has been seen which overwrites any of regs[*]. |
7680 | We must make a veneer! Reset state to 0 before examining next | |
7681 | instruction. | |
906e58ca | 7682 | |
c7b8f16e | 7683 | 2 -> 0 |
99059e56 RM |
7684 | If we fail to match anything in state 2, reset to state 0 and reset |
7685 | the instruction pointer to the instruction after 'first_fmac'. | |
c7b8f16e JB |
7686 | |
7687 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
7688 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 7689 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
7690 | |
7691 | /* If we are only performing a partial link do not bother | |
7692 | to construct any glue. */ | |
0e1862bb | 7693 | if (bfd_link_relocatable (link_info)) |
c7b8f16e JB |
7694 | return TRUE; |
7695 | ||
0ffa91dd NC |
7696 | /* Skip if this bfd does not correspond to an ELF image. */ |
7697 | if (! is_arm_elf (abfd)) | |
7698 | return TRUE; | |
906e58ca | 7699 | |
c7b8f16e JB |
7700 | /* We should have chosen a fix type by the time we get here. */ |
7701 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
7702 | ||
7703 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
7704 | return TRUE; | |
2e6030b9 | 7705 | |
33a7ffc2 JM |
7706 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
7707 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
7708 | return TRUE; | |
7709 | ||
c7b8f16e JB |
7710 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
7711 | { | |
7712 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
7713 | struct _arm_elf_section_data *sec_data; | |
7714 | ||
7715 | /* If we don't have executable progbits, we're not interested in this | |
99059e56 | 7716 | section. Also skip if section is to be excluded. */ |
c7b8f16e | 7717 | if (elf_section_type (sec) != SHT_PROGBITS |
99059e56 RM |
7718 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 |
7719 | || (sec->flags & SEC_EXCLUDE) != 0 | |
dbaa2011 | 7720 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS |
33a7ffc2 | 7721 | || sec->output_section == bfd_abs_section_ptr |
99059e56 RM |
7722 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
7723 | continue; | |
c7b8f16e JB |
7724 | |
7725 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 7726 | |
c7b8f16e | 7727 | if (sec_data->mapcount == 0) |
99059e56 | 7728 | continue; |
906e58ca | 7729 | |
c7b8f16e JB |
7730 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
7731 | contents = elf_section_data (sec)->this_hdr.contents; | |
7732 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
7733 | goto error_return; | |
7734 | ||
7735 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
7736 | elf32_arm_compare_mapping); | |
7737 | ||
7738 | for (span = 0; span < sec_data->mapcount; span++) | |
99059e56 RM |
7739 | { |
7740 | unsigned int span_start = sec_data->map[span].vma; | |
7741 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
c7b8f16e | 7742 | ? sec->size : sec_data->map[span + 1].vma; |
99059e56 RM |
7743 | char span_type = sec_data->map[span].type; |
7744 | ||
7745 | /* FIXME: Only ARM mode is supported at present. We may need to | |
7746 | support Thumb-2 mode also at some point. */ | |
7747 | if (span_type != 'a') | |
7748 | continue; | |
7749 | ||
7750 | for (i = span_start; i < span_end;) | |
7751 | { | |
7752 | unsigned int next_i = i + 4; | |
7753 | unsigned int insn = bfd_big_endian (abfd) | |
7754 | ? (contents[i] << 24) | |
7755 | | (contents[i + 1] << 16) | |
7756 | | (contents[i + 2] << 8) | |
7757 | | contents[i + 3] | |
7758 | : (contents[i + 3] << 24) | |
7759 | | (contents[i + 2] << 16) | |
7760 | | (contents[i + 1] << 8) | |
7761 | | contents[i]; | |
7762 | unsigned int writemask = 0; | |
7763 | enum bfd_arm_vfp11_pipe vpipe; | |
7764 | ||
7765 | switch (state) | |
7766 | { | |
7767 | case 0: | |
7768 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, | |
7769 | &numregs); | |
7770 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
7771 | operands on either the FMAC or the DS pipeline. This might | |
7772 | lead to slightly overenthusiastic veneer insertion. */ | |
7773 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) | |
7774 | { | |
7775 | state = use_vector ? 1 : 2; | |
7776 | first_fmac = i; | |
7777 | veneer_of_insn = insn; | |
7778 | } | |
7779 | break; | |
7780 | ||
7781 | case 1: | |
7782 | { | |
7783 | int other_regs[3], other_numregs; | |
7784 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 7785 | other_regs, |
99059e56 RM |
7786 | &other_numregs); |
7787 | if (vpipe != VFP11_BAD | |
7788 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 7789 | numregs)) |
99059e56 RM |
7790 | state = 3; |
7791 | else | |
7792 | state = 2; | |
7793 | } | |
7794 | break; | |
7795 | ||
7796 | case 2: | |
7797 | { | |
7798 | int other_regs[3], other_numregs; | |
7799 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, | |
c7b8f16e | 7800 | other_regs, |
99059e56 RM |
7801 | &other_numregs); |
7802 | if (vpipe != VFP11_BAD | |
7803 | && bfd_arm_vfp11_antidependency (writemask, regs, | |
c7b8f16e | 7804 | numregs)) |
99059e56 RM |
7805 | state = 3; |
7806 | else | |
7807 | { | |
7808 | state = 0; | |
7809 | next_i = first_fmac + 4; | |
7810 | } | |
7811 | } | |
7812 | break; | |
7813 | ||
7814 | case 3: | |
7815 | abort (); /* Should be unreachable. */ | |
7816 | } | |
7817 | ||
7818 | if (state == 3) | |
7819 | { | |
7820 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) | |
7821 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
7822 | ||
7823 | elf32_arm_section_data (sec)->erratumcount += 1; | |
7824 | ||
7825 | newerr->u.b.vfp_insn = veneer_of_insn; | |
7826 | ||
7827 | switch (span_type) | |
7828 | { | |
7829 | case 'a': | |
7830 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
7831 | break; | |
7832 | ||
7833 | default: | |
7834 | abort (); | |
7835 | } | |
7836 | ||
7837 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
c7b8f16e JB |
7838 | first_fmac); |
7839 | ||
99059e56 | 7840 | newerr->vma = -1; |
c7b8f16e | 7841 | |
99059e56 RM |
7842 | newerr->next = sec_data->erratumlist; |
7843 | sec_data->erratumlist = newerr; | |
c7b8f16e | 7844 | |
99059e56 RM |
7845 | state = 0; |
7846 | } | |
c7b8f16e | 7847 | |
99059e56 RM |
7848 | i = next_i; |
7849 | } | |
7850 | } | |
906e58ca | 7851 | |
c7b8f16e | 7852 | if (contents != NULL |
99059e56 RM |
7853 | && elf_section_data (sec)->this_hdr.contents != contents) |
7854 | free (contents); | |
c7b8f16e JB |
7855 | contents = NULL; |
7856 | } | |
7857 | ||
7858 | return TRUE; | |
7859 | ||
7860 | error_return: | |
7861 | if (contents != NULL | |
7862 | && elf_section_data (sec)->this_hdr.contents != contents) | |
7863 | free (contents); | |
906e58ca | 7864 | |
c7b8f16e JB |
7865 | return FALSE; |
7866 | } | |
7867 | ||
7868 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
7869 | after sections have been laid out, using specially-named symbols. */ | |
7870 | ||
7871 | void | |
7872 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
7873 | struct bfd_link_info *link_info) | |
7874 | { | |
7875 | asection *sec; | |
7876 | struct elf32_arm_link_hash_table *globals; | |
7877 | char *tmp_name; | |
906e58ca | 7878 | |
0e1862bb | 7879 | if (bfd_link_relocatable (link_info)) |
c7b8f16e | 7880 | return; |
2e6030b9 MS |
7881 | |
7882 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 7883 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
7884 | return; |
7885 | ||
c7b8f16e | 7886 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
7887 | if (globals == NULL) |
7888 | return; | |
906e58ca | 7889 | |
21d799b5 | 7890 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
99059e56 | 7891 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); |
c7b8f16e JB |
7892 | |
7893 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
7894 | { | |
7895 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
7896 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 7897 | |
c7b8f16e | 7898 | for (; errnode != NULL; errnode = errnode->next) |
99059e56 RM |
7899 | { |
7900 | struct elf_link_hash_entry *myh; | |
7901 | bfd_vma vma; | |
7902 | ||
7903 | switch (errnode->type) | |
7904 | { | |
7905 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
7906 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
7907 | /* Find veneer symbol. */ | |
7908 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
c7b8f16e JB |
7909 | errnode->u.b.veneer->u.v.id); |
7910 | ||
99059e56 RM |
7911 | myh = elf_link_hash_lookup |
7912 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
c7b8f16e | 7913 | |
a504d23a LA |
7914 | if (myh == NULL) |
7915 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
7916 | "`%s'"), abfd, tmp_name); | |
7917 | ||
7918 | vma = myh->root.u.def.section->output_section->vma | |
7919 | + myh->root.u.def.section->output_offset | |
7920 | + myh->root.u.def.value; | |
7921 | ||
7922 | errnode->u.b.veneer->vma = vma; | |
7923 | break; | |
7924 | ||
7925 | case VFP11_ERRATUM_ARM_VENEER: | |
7926 | case VFP11_ERRATUM_THUMB_VENEER: | |
7927 | /* Find return location. */ | |
7928 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
7929 | errnode->u.v.id); | |
7930 | ||
7931 | myh = elf_link_hash_lookup | |
7932 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
7933 | ||
7934 | if (myh == NULL) | |
7935 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
7936 | "`%s'"), abfd, tmp_name); | |
7937 | ||
7938 | vma = myh->root.u.def.section->output_section->vma | |
7939 | + myh->root.u.def.section->output_offset | |
7940 | + myh->root.u.def.value; | |
7941 | ||
7942 | errnode->u.v.branch->vma = vma; | |
7943 | break; | |
7944 | ||
7945 | default: | |
7946 | abort (); | |
7947 | } | |
7948 | } | |
7949 | } | |
7950 | ||
7951 | free (tmp_name); | |
7952 | } | |
7953 | ||
7954 | /* Find virtual-memory addresses for STM32L4XX erratum veneers and | |
7955 | return locations after sections have been laid out, using | |
7956 | specially-named symbols. */ | |
7957 | ||
7958 | void | |
7959 | bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd, | |
7960 | struct bfd_link_info *link_info) | |
7961 | { | |
7962 | asection *sec; | |
7963 | struct elf32_arm_link_hash_table *globals; | |
7964 | char *tmp_name; | |
7965 | ||
7966 | if (bfd_link_relocatable (link_info)) | |
7967 | return; | |
7968 | ||
7969 | /* Skip if this bfd does not correspond to an ELF image. */ | |
7970 | if (! is_arm_elf (abfd)) | |
7971 | return; | |
7972 | ||
7973 | globals = elf32_arm_hash_table (link_info); | |
7974 | if (globals == NULL) | |
7975 | return; | |
7976 | ||
7977 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen | |
7978 | (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
7979 | ||
7980 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
7981 | { | |
7982 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
7983 | elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist; | |
7984 | ||
7985 | for (; errnode != NULL; errnode = errnode->next) | |
7986 | { | |
7987 | struct elf_link_hash_entry *myh; | |
7988 | bfd_vma vma; | |
7989 | ||
7990 | switch (errnode->type) | |
7991 | { | |
7992 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
7993 | /* Find veneer symbol. */ | |
7994 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME, | |
7995 | errnode->u.b.veneer->u.v.id); | |
7996 | ||
7997 | myh = elf_link_hash_lookup | |
7998 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
7999 | ||
8000 | if (myh == NULL) | |
8001 | (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer " | |
8002 | "`%s'"), abfd, tmp_name); | |
8003 | ||
8004 | vma = myh->root.u.def.section->output_section->vma | |
8005 | + myh->root.u.def.section->output_offset | |
8006 | + myh->root.u.def.value; | |
8007 | ||
8008 | errnode->u.b.veneer->vma = vma; | |
8009 | break; | |
8010 | ||
8011 | case STM32L4XX_ERRATUM_VENEER: | |
8012 | /* Find return location. */ | |
8013 | sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r", | |
8014 | errnode->u.v.id); | |
8015 | ||
8016 | myh = elf_link_hash_lookup | |
8017 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
8018 | ||
8019 | if (myh == NULL) | |
8020 | (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer " | |
8021 | "`%s'"), abfd, tmp_name); | |
8022 | ||
8023 | vma = myh->root.u.def.section->output_section->vma | |
8024 | + myh->root.u.def.section->output_offset | |
8025 | + myh->root.u.def.value; | |
8026 | ||
8027 | errnode->u.v.branch->vma = vma; | |
8028 | break; | |
8029 | ||
8030 | default: | |
8031 | abort (); | |
8032 | } | |
8033 | } | |
8034 | } | |
8035 | ||
8036 | free (tmp_name); | |
8037 | } | |
8038 | ||
8039 | static inline bfd_boolean | |
8040 | is_thumb2_ldmia (const insn32 insn) | |
8041 | { | |
8042 | /* Encoding T2: LDM<c>.W <Rn>{!},<registers> | |
8043 | 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
8044 | return (insn & 0xffd02000) == 0xe8900000; | |
8045 | } | |
8046 | ||
8047 | static inline bfd_boolean | |
8048 | is_thumb2_ldmdb (const insn32 insn) | |
8049 | { | |
8050 | /* Encoding T1: LDMDB<c> <Rn>{!},<registers> | |
8051 | 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */ | |
8052 | return (insn & 0xffd02000) == 0xe9100000; | |
8053 | } | |
8054 | ||
8055 | static inline bfd_boolean | |
8056 | is_thumb2_vldm (const insn32 insn) | |
8057 | { | |
8058 | /* A6.5 Extension register load or store instruction | |
8059 | A7.7.229 | |
9239bbd3 CM |
8060 | We look for SP 32-bit and DP 64-bit registers. |
8061 | Encoding T1 VLDM{mode}<c> <Rn>{!}, <list> | |
8062 | <list> is consecutive 64-bit registers | |
8063 | 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii | |
a504d23a LA |
8064 | Encoding T2 VLDM{mode}<c> <Rn>{!}, <list> |
8065 | <list> is consecutive 32-bit registers | |
8066 | 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii | |
8067 | if P==0 && U==1 && W==1 && Rn=1101 VPOP | |
8068 | if PUW=010 || PUW=011 || PUW=101 VLDM. */ | |
8069 | return | |
9239bbd3 CM |
8070 | (((insn & 0xfe100f00) == 0xec100b00) || |
8071 | ((insn & 0xfe100f00) == 0xec100a00)) | |
a504d23a LA |
8072 | && /* (IA without !). */ |
8073 | (((((insn << 7) >> 28) & 0xd) == 0x4) | |
9239bbd3 | 8074 | /* (IA with !), includes VPOP (when reg number is SP). */ |
a504d23a LA |
8075 | || ((((insn << 7) >> 28) & 0xd) == 0x5) |
8076 | /* (DB with !). */ | |
8077 | || ((((insn << 7) >> 28) & 0xd) == 0x9)); | |
8078 | } | |
8079 | ||
8080 | /* STM STM32L4XX erratum : This function assumes that it receives an LDM or | |
8081 | VLDM opcode and: | |
8082 | - computes the number and the mode of memory accesses | |
8083 | - decides if the replacement should be done: | |
8084 | . replaces only if > 8-word accesses | |
8085 | . or (testing purposes only) replaces all accesses. */ | |
8086 | ||
8087 | static bfd_boolean | |
8088 | stm32l4xx_need_create_replacing_stub (const insn32 insn, | |
8089 | bfd_arm_stm32l4xx_fix stm32l4xx_fix) | |
8090 | { | |
9239bbd3 | 8091 | int nb_words = 0; |
a504d23a LA |
8092 | |
8093 | /* The field encoding the register list is the same for both LDMIA | |
8094 | and LDMDB encodings. */ | |
8095 | if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn)) | |
9239bbd3 | 8096 | nb_words = popcount (insn & 0x0000ffff); |
a504d23a | 8097 | else if (is_thumb2_vldm (insn)) |
9239bbd3 | 8098 | nb_words = (insn & 0xff); |
a504d23a LA |
8099 | |
8100 | /* DEFAULT mode accounts for the real bug condition situation, | |
8101 | ALL mode inserts stubs for each LDM/VLDM instruction (testing). */ | |
8102 | return | |
9239bbd3 | 8103 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 : |
a504d23a LA |
8104 | (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE; |
8105 | } | |
8106 | ||
8107 | /* Look for potentially-troublesome code sequences which might trigger | |
8108 | the STM STM32L4XX erratum. */ | |
8109 | ||
8110 | bfd_boolean | |
8111 | bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd, | |
8112 | struct bfd_link_info *link_info) | |
8113 | { | |
8114 | asection *sec; | |
8115 | bfd_byte *contents = NULL; | |
8116 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
8117 | ||
8118 | if (globals == NULL) | |
8119 | return FALSE; | |
8120 | ||
8121 | /* If we are only performing a partial link do not bother | |
8122 | to construct any glue. */ | |
8123 | if (bfd_link_relocatable (link_info)) | |
8124 | return TRUE; | |
8125 | ||
8126 | /* Skip if this bfd does not correspond to an ELF image. */ | |
8127 | if (! is_arm_elf (abfd)) | |
8128 | return TRUE; | |
8129 | ||
8130 | if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE) | |
8131 | return TRUE; | |
8132 | ||
8133 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ | |
8134 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
8135 | return TRUE; | |
8136 | ||
8137 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
8138 | { | |
8139 | unsigned int i, span; | |
8140 | struct _arm_elf_section_data *sec_data; | |
8141 | ||
8142 | /* If we don't have executable progbits, we're not interested in this | |
8143 | section. Also skip if section is to be excluded. */ | |
8144 | if (elf_section_type (sec) != SHT_PROGBITS | |
8145 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
8146 | || (sec->flags & SEC_EXCLUDE) != 0 | |
8147 | || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS | |
8148 | || sec->output_section == bfd_abs_section_ptr | |
8149 | || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0) | |
8150 | continue; | |
8151 | ||
8152 | sec_data = elf32_arm_section_data (sec); | |
c7b8f16e | 8153 | |
a504d23a LA |
8154 | if (sec_data->mapcount == 0) |
8155 | continue; | |
c7b8f16e | 8156 | |
a504d23a LA |
8157 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
8158 | contents = elf_section_data (sec)->this_hdr.contents; | |
8159 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
8160 | goto error_return; | |
c7b8f16e | 8161 | |
a504d23a LA |
8162 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), |
8163 | elf32_arm_compare_mapping); | |
c7b8f16e | 8164 | |
a504d23a LA |
8165 | for (span = 0; span < sec_data->mapcount; span++) |
8166 | { | |
8167 | unsigned int span_start = sec_data->map[span].vma; | |
8168 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
8169 | ? sec->size : sec_data->map[span + 1].vma; | |
8170 | char span_type = sec_data->map[span].type; | |
8171 | int itblock_current_pos = 0; | |
c7b8f16e | 8172 | |
a504d23a LA |
8173 | /* Only Thumb2 mode need be supported with this CM4 specific |
8174 | code, we should not encounter any arm mode eg span_type | |
8175 | != 'a'. */ | |
8176 | if (span_type != 't') | |
8177 | continue; | |
c7b8f16e | 8178 | |
a504d23a LA |
8179 | for (i = span_start; i < span_end;) |
8180 | { | |
8181 | unsigned int insn = bfd_get_16 (abfd, &contents[i]); | |
8182 | bfd_boolean insn_32bit = FALSE; | |
8183 | bfd_boolean is_ldm = FALSE; | |
8184 | bfd_boolean is_vldm = FALSE; | |
8185 | bfd_boolean is_not_last_in_it_block = FALSE; | |
8186 | ||
8187 | /* The first 16-bits of all 32-bit thumb2 instructions start | |
8188 | with opcode[15..13]=0b111 and the encoded op1 can be anything | |
8189 | except opcode[12..11]!=0b00. | |
8190 | See 32-bit Thumb instruction encoding. */ | |
8191 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
8192 | insn_32bit = TRUE; | |
c7b8f16e | 8193 | |
a504d23a LA |
8194 | /* Compute the predicate that tells if the instruction |
8195 | is concerned by the IT block | |
8196 | - Creates an error if there is a ldm that is not | |
8197 | last in the IT block thus cannot be replaced | |
8198 | - Otherwise we can create a branch at the end of the | |
8199 | IT block, it will be controlled naturally by IT | |
8200 | with the proper pseudo-predicate | |
8201 | - So the only interesting predicate is the one that | |
8202 | tells that we are not on the last item of an IT | |
8203 | block. */ | |
8204 | if (itblock_current_pos != 0) | |
8205 | is_not_last_in_it_block = !!--itblock_current_pos; | |
906e58ca | 8206 | |
a504d23a LA |
8207 | if (insn_32bit) |
8208 | { | |
8209 | /* Load the rest of the insn (in manual-friendly order). */ | |
8210 | insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]); | |
8211 | is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn); | |
8212 | is_vldm = is_thumb2_vldm (insn); | |
8213 | ||
8214 | /* Veneers are created for (v)ldm depending on | |
8215 | option flags and memory accesses conditions; but | |
8216 | if the instruction is not the last instruction of | |
8217 | an IT block, we cannot create a jump there, so we | |
8218 | bail out. */ | |
8219 | if ((is_ldm || is_vldm) && | |
8220 | stm32l4xx_need_create_replacing_stub | |
8221 | (insn, globals->stm32l4xx_fix)) | |
8222 | { | |
8223 | if (is_not_last_in_it_block) | |
8224 | { | |
8225 | (*_bfd_error_handler) | |
8226 | /* Note - overlong line used here to allow for translation. */ | |
8227 | (_("\ | |
8228 | %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n" | |
8229 | "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"), | |
8230 | abfd, sec, (long)i); | |
8231 | } | |
8232 | else | |
8233 | { | |
8234 | elf32_stm32l4xx_erratum_list *newerr = | |
8235 | (elf32_stm32l4xx_erratum_list *) | |
8236 | bfd_zmalloc | |
8237 | (sizeof (elf32_stm32l4xx_erratum_list)); | |
8238 | ||
8239 | elf32_arm_section_data (sec) | |
8240 | ->stm32l4xx_erratumcount += 1; | |
8241 | newerr->u.b.insn = insn; | |
8242 | /* We create only thumb branches. */ | |
8243 | newerr->type = | |
8244 | STM32L4XX_ERRATUM_BRANCH_TO_VENEER; | |
8245 | record_stm32l4xx_erratum_veneer | |
8246 | (link_info, newerr, abfd, sec, | |
8247 | i, | |
8248 | is_ldm ? | |
8249 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE: | |
8250 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
8251 | newerr->vma = -1; | |
8252 | newerr->next = sec_data->stm32l4xx_erratumlist; | |
8253 | sec_data->stm32l4xx_erratumlist = newerr; | |
8254 | } | |
8255 | } | |
8256 | } | |
8257 | else | |
8258 | { | |
8259 | /* A7.7.37 IT p208 | |
8260 | IT blocks are only encoded in T1 | |
8261 | Encoding T1: IT{x{y{z}}} <firstcond> | |
8262 | 1 0 1 1 - 1 1 1 1 - firstcond - mask | |
8263 | if mask = '0000' then see 'related encodings' | |
8264 | We don't deal with UNPREDICTABLE, just ignore these. | |
8265 | There can be no nested IT blocks so an IT block | |
8266 | is naturally a new one for which it is worth | |
8267 | computing its size. */ | |
8268 | bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) && | |
8269 | ((insn & 0x000f) != 0x0000); | |
8270 | /* If we have a new IT block we compute its size. */ | |
8271 | if (is_newitblock) | |
8272 | { | |
8273 | /* Compute the number of instructions controlled | |
8274 | by the IT block, it will be used to decide | |
8275 | whether we are inside an IT block or not. */ | |
8276 | unsigned int mask = insn & 0x000f; | |
8277 | itblock_current_pos = 4 - ctz (mask); | |
8278 | } | |
8279 | } | |
8280 | ||
8281 | i += insn_32bit ? 4 : 2; | |
99059e56 RM |
8282 | } |
8283 | } | |
a504d23a LA |
8284 | |
8285 | if (contents != NULL | |
8286 | && elf_section_data (sec)->this_hdr.contents != contents) | |
8287 | free (contents); | |
8288 | contents = NULL; | |
c7b8f16e | 8289 | } |
906e58ca | 8290 | |
a504d23a LA |
8291 | return TRUE; |
8292 | ||
8293 | error_return: | |
8294 | if (contents != NULL | |
8295 | && elf_section_data (sec)->this_hdr.contents != contents) | |
8296 | free (contents); | |
c7b8f16e | 8297 | |
a504d23a LA |
8298 | return FALSE; |
8299 | } | |
c7b8f16e | 8300 | |
eb043451 PB |
8301 | /* Set target relocation values needed during linking. */ |
8302 | ||
8303 | void | |
bf21ed78 MS |
8304 | bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, |
8305 | struct bfd_link_info *link_info, | |
eb043451 | 8306 | int target1_is_rel, |
319850b4 | 8307 | char * target2_type, |
99059e56 | 8308 | int fix_v4bx, |
c7b8f16e | 8309 | int use_blx, |
99059e56 | 8310 | bfd_arm_vfp11_fix vfp11_fix, |
a504d23a | 8311 | bfd_arm_stm32l4xx_fix stm32l4xx_fix, |
a9dc9481 | 8312 | int no_enum_warn, int no_wchar_warn, |
2de70689 | 8313 | int pic_veneer, int fix_cortex_a8, |
54ddd295 | 8314 | int fix_arm1176, int cmse_implib) |
eb043451 PB |
8315 | { |
8316 | struct elf32_arm_link_hash_table *globals; | |
8317 | ||
8318 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
8319 | if (globals == NULL) |
8320 | return; | |
eb043451 PB |
8321 | |
8322 | globals->target1_is_rel = target1_is_rel; | |
8323 | if (strcmp (target2_type, "rel") == 0) | |
8324 | globals->target2_reloc = R_ARM_REL32; | |
eeac373a PB |
8325 | else if (strcmp (target2_type, "abs") == 0) |
8326 | globals->target2_reloc = R_ARM_ABS32; | |
eb043451 PB |
8327 | else if (strcmp (target2_type, "got-rel") == 0) |
8328 | globals->target2_reloc = R_ARM_GOT_PREL; | |
8329 | else | |
8330 | { | |
8331 | _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."), | |
8332 | target2_type); | |
8333 | } | |
319850b4 | 8334 | globals->fix_v4bx = fix_v4bx; |
33bfe774 | 8335 | globals->use_blx |= use_blx; |
c7b8f16e | 8336 | globals->vfp11_fix = vfp11_fix; |
a504d23a | 8337 | globals->stm32l4xx_fix = stm32l4xx_fix; |
27e55c4d | 8338 | globals->pic_veneer = pic_veneer; |
48229727 | 8339 | globals->fix_cortex_a8 = fix_cortex_a8; |
2de70689 | 8340 | globals->fix_arm1176 = fix_arm1176; |
54ddd295 | 8341 | globals->cmse_implib = cmse_implib; |
bf21ed78 | 8342 | |
0ffa91dd NC |
8343 | BFD_ASSERT (is_arm_elf (output_bfd)); |
8344 | elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; | |
a9dc9481 | 8345 | elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn; |
eb043451 | 8346 | } |
eb043451 | 8347 | |
12a0a0fd | 8348 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 8349 | |
12a0a0fd PB |
8350 | static void |
8351 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
8352 | { | |
8353 | bfd_vma upper; | |
8354 | bfd_vma lower; | |
8355 | int reloc_sign; | |
8356 | ||
8357 | BFD_ASSERT ((offset & 1) == 0); | |
8358 | ||
8359 | upper = bfd_get_16 (abfd, insn); | |
8360 | lower = bfd_get_16 (abfd, insn + 2); | |
8361 | reloc_sign = (offset < 0) ? 1 : 0; | |
8362 | upper = (upper & ~(bfd_vma) 0x7ff) | |
8363 | | ((offset >> 12) & 0x3ff) | |
8364 | | (reloc_sign << 10); | |
906e58ca | 8365 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
8366 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
8367 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
8368 | | ((offset >> 1) & 0x7ff); | |
8369 | bfd_put_16 (abfd, upper, insn); | |
8370 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
8371 | } |
8372 | ||
9b485d32 NC |
8373 | /* Thumb code calling an ARM function. */ |
8374 | ||
252b5132 | 8375 | static int |
57e8b36a NC |
8376 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
8377 | const char * name, | |
8378 | bfd * input_bfd, | |
8379 | bfd * output_bfd, | |
8380 | asection * input_section, | |
8381 | bfd_byte * hit_data, | |
8382 | asection * sym_sec, | |
8383 | bfd_vma offset, | |
8384 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
8385 | bfd_vma val, |
8386 | char **error_message) | |
252b5132 | 8387 | { |
bcbdc74c | 8388 | asection * s = 0; |
dc810e39 | 8389 | bfd_vma my_offset; |
252b5132 | 8390 | long int ret_offset; |
bcbdc74c NC |
8391 | struct elf_link_hash_entry * myh; |
8392 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 8393 | |
f2a9dd69 | 8394 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 8395 | if (myh == NULL) |
b34976b6 | 8396 | return FALSE; |
252b5132 RH |
8397 | |
8398 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
8399 | BFD_ASSERT (globals != NULL); |
8400 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8401 | ||
8402 | my_offset = myh->root.u.def.value; | |
8403 | ||
3d4d4302 AM |
8404 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8405 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 RH |
8406 | |
8407 | BFD_ASSERT (s != NULL); | |
8408 | BFD_ASSERT (s->contents != NULL); | |
8409 | BFD_ASSERT (s->output_section != NULL); | |
8410 | ||
8411 | if ((my_offset & 0x01) == 0x01) | |
8412 | { | |
8413 | if (sym_sec != NULL | |
8414 | && sym_sec->owner != NULL | |
8415 | && !INTERWORK_FLAG (sym_sec->owner)) | |
8416 | { | |
8f615d07 | 8417 | (*_bfd_error_handler) |
d003868e | 8418 | (_("%B(%s): warning: interworking not enabled.\n" |
3aaeb7d3 | 8419 | " first occurrence: %B: Thumb call to ARM"), |
d003868e | 8420 | sym_sec->owner, input_bfd, name); |
252b5132 | 8421 | |
b34976b6 | 8422 | return FALSE; |
252b5132 RH |
8423 | } |
8424 | ||
8425 | --my_offset; | |
8426 | myh->root.u.def.value = my_offset; | |
8427 | ||
52ab56c2 PB |
8428 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
8429 | s->contents + my_offset); | |
252b5132 | 8430 | |
52ab56c2 PB |
8431 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
8432 | s->contents + my_offset + 2); | |
252b5132 RH |
8433 | |
8434 | ret_offset = | |
9b485d32 NC |
8435 | /* Address of destination of the stub. */ |
8436 | ((bfd_signed_vma) val) | |
252b5132 | 8437 | - ((bfd_signed_vma) |
57e8b36a NC |
8438 | /* Offset from the start of the current section |
8439 | to the start of the stubs. */ | |
9b485d32 NC |
8440 | (s->output_offset |
8441 | /* Offset of the start of this stub from the start of the stubs. */ | |
8442 | + my_offset | |
8443 | /* Address of the start of the current section. */ | |
8444 | + s->output_section->vma) | |
8445 | /* The branch instruction is 4 bytes into the stub. */ | |
8446 | + 4 | |
8447 | /* ARM branches work from the pc of the instruction + 8. */ | |
8448 | + 8); | |
252b5132 | 8449 | |
52ab56c2 PB |
8450 | put_arm_insn (globals, output_bfd, |
8451 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
8452 | s->contents + my_offset + 4); | |
252b5132 RH |
8453 | } |
8454 | ||
8455 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
8456 | ||
427bfd90 NC |
8457 | /* Now go back and fix up the original BL insn to point to here. */ |
8458 | ret_offset = | |
8459 | /* Address of where the stub is located. */ | |
8460 | (s->output_section->vma + s->output_offset + my_offset) | |
8461 | /* Address of where the BL is located. */ | |
57e8b36a NC |
8462 | - (input_section->output_section->vma + input_section->output_offset |
8463 | + offset) | |
427bfd90 NC |
8464 | /* Addend in the relocation. */ |
8465 | - addend | |
8466 | /* Biassing for PC-relative addressing. */ | |
8467 | - 8; | |
252b5132 | 8468 | |
12a0a0fd | 8469 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 8470 | |
b34976b6 | 8471 | return TRUE; |
252b5132 RH |
8472 | } |
8473 | ||
a4fd1a8e | 8474 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 8475 | |
a4fd1a8e PB |
8476 | static struct elf_link_hash_entry * |
8477 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
8478 | const char * name, | |
8479 | bfd * input_bfd, | |
8480 | bfd * output_bfd, | |
8481 | asection * sym_sec, | |
8482 | bfd_vma val, | |
8029a119 NC |
8483 | asection * s, |
8484 | char ** error_message) | |
252b5132 | 8485 | { |
dc810e39 | 8486 | bfd_vma my_offset; |
252b5132 | 8487 | long int ret_offset; |
bcbdc74c NC |
8488 | struct elf_link_hash_entry * myh; |
8489 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 8490 | |
f2a9dd69 | 8491 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 8492 | if (myh == NULL) |
a4fd1a8e | 8493 | return NULL; |
252b5132 RH |
8494 | |
8495 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
8496 | BFD_ASSERT (globals != NULL); |
8497 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8498 | ||
8499 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
8500 | |
8501 | if ((my_offset & 0x01) == 0x01) | |
8502 | { | |
8503 | if (sym_sec != NULL | |
8504 | && sym_sec->owner != NULL | |
8505 | && !INTERWORK_FLAG (sym_sec->owner)) | |
8506 | { | |
8f615d07 | 8507 | (*_bfd_error_handler) |
d003868e AM |
8508 | (_("%B(%s): warning: interworking not enabled.\n" |
8509 | " first occurrence: %B: arm call to thumb"), | |
8510 | sym_sec->owner, input_bfd, name); | |
252b5132 | 8511 | } |
9b485d32 | 8512 | |
252b5132 RH |
8513 | --my_offset; |
8514 | myh->root.u.def.value = my_offset; | |
8515 | ||
0e1862bb L |
8516 | if (bfd_link_pic (info) |
8517 | || globals->root.is_relocatable_executable | |
27e55c4d | 8518 | || globals->pic_veneer) |
8f6277f5 PB |
8519 | { |
8520 | /* For relocatable objects we can't use absolute addresses, | |
8521 | so construct the address from a relative offset. */ | |
8522 | /* TODO: If the offset is small it's probably worth | |
8523 | constructing the address with adds. */ | |
52ab56c2 PB |
8524 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
8525 | s->contents + my_offset); | |
8526 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
8527 | s->contents + my_offset + 4); | |
8528 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
8529 | s->contents + my_offset + 8); | |
8f6277f5 PB |
8530 | /* Adjust the offset by 4 for the position of the add, |
8531 | and 8 for the pipeline offset. */ | |
8532 | ret_offset = (val - (s->output_offset | |
8533 | + s->output_section->vma | |
8534 | + my_offset + 12)) | |
8535 | | 1; | |
8536 | bfd_put_32 (output_bfd, ret_offset, | |
8537 | s->contents + my_offset + 12); | |
8538 | } | |
26079076 PB |
8539 | else if (globals->use_blx) |
8540 | { | |
8541 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
8542 | s->contents + my_offset); | |
8543 | ||
8544 | /* It's a thumb address. Add the low order bit. */ | |
8545 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
8546 | s->contents + my_offset + 4); | |
8547 | } | |
8f6277f5 PB |
8548 | else |
8549 | { | |
52ab56c2 PB |
8550 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
8551 | s->contents + my_offset); | |
252b5132 | 8552 | |
52ab56c2 PB |
8553 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
8554 | s->contents + my_offset + 4); | |
252b5132 | 8555 | |
8f6277f5 PB |
8556 | /* It's a thumb address. Add the low order bit. */ |
8557 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
8558 | s->contents + my_offset + 8); | |
8029a119 NC |
8559 | |
8560 | my_offset += 12; | |
8f6277f5 | 8561 | } |
252b5132 RH |
8562 | } |
8563 | ||
8564 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
8565 | ||
a4fd1a8e PB |
8566 | return myh; |
8567 | } | |
8568 | ||
8569 | /* Arm code calling a Thumb function. */ | |
8570 | ||
8571 | static int | |
8572 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
8573 | const char * name, | |
8574 | bfd * input_bfd, | |
8575 | bfd * output_bfd, | |
8576 | asection * input_section, | |
8577 | bfd_byte * hit_data, | |
8578 | asection * sym_sec, | |
8579 | bfd_vma offset, | |
8580 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
8581 | bfd_vma val, |
8582 | char **error_message) | |
a4fd1a8e PB |
8583 | { |
8584 | unsigned long int tmp; | |
8585 | bfd_vma my_offset; | |
8586 | asection * s; | |
8587 | long int ret_offset; | |
8588 | struct elf_link_hash_entry * myh; | |
8589 | struct elf32_arm_link_hash_table * globals; | |
8590 | ||
8591 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
8592 | BFD_ASSERT (globals != NULL); |
8593 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8594 | ||
3d4d4302 AM |
8595 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8596 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
8597 | BFD_ASSERT (s != NULL); |
8598 | BFD_ASSERT (s->contents != NULL); | |
8599 | BFD_ASSERT (s->output_section != NULL); | |
8600 | ||
8601 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 8602 | sym_sec, val, s, error_message); |
a4fd1a8e PB |
8603 | if (!myh) |
8604 | return FALSE; | |
8605 | ||
8606 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
8607 | tmp = bfd_get_32 (input_bfd, hit_data); |
8608 | tmp = tmp & 0xFF000000; | |
8609 | ||
9b485d32 | 8610 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
8611 | ret_offset = (s->output_offset |
8612 | + my_offset | |
8613 | + s->output_section->vma | |
8614 | - (input_section->output_offset | |
8615 | + input_section->output_section->vma | |
8616 | + offset + addend) | |
8617 | - 8); | |
9a5aca8c | 8618 | |
252b5132 RH |
8619 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
8620 | ||
dc810e39 | 8621 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 8622 | |
b34976b6 | 8623 | return TRUE; |
252b5132 RH |
8624 | } |
8625 | ||
a4fd1a8e PB |
8626 | /* Populate Arm stub for an exported Thumb function. */ |
8627 | ||
8628 | static bfd_boolean | |
8629 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) | |
8630 | { | |
8631 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
8632 | asection * s; | |
8633 | struct elf_link_hash_entry * myh; | |
8634 | struct elf32_arm_link_hash_entry *eh; | |
8635 | struct elf32_arm_link_hash_table * globals; | |
8636 | asection *sec; | |
8637 | bfd_vma val; | |
f2a9dd69 | 8638 | char *error_message; |
a4fd1a8e | 8639 | |
906e58ca | 8640 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
8641 | /* Allocate stubs for exported Thumb functions on v4t. */ |
8642 | if (eh->export_glue == NULL) | |
8643 | return TRUE; | |
8644 | ||
8645 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
8646 | BFD_ASSERT (globals != NULL); |
8647 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8648 | ||
3d4d4302 AM |
8649 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8650 | ARM2THUMB_GLUE_SECTION_NAME); | |
a4fd1a8e PB |
8651 | BFD_ASSERT (s != NULL); |
8652 | BFD_ASSERT (s->contents != NULL); | |
8653 | BFD_ASSERT (s->output_section != NULL); | |
8654 | ||
8655 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
8656 | |
8657 | BFD_ASSERT (sec->output_section != NULL); | |
8658 | ||
a4fd1a8e PB |
8659 | val = eh->export_glue->root.u.def.value + sec->output_offset |
8660 | + sec->output_section->vma; | |
8029a119 | 8661 | |
a4fd1a8e PB |
8662 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
8663 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
8664 | globals->obfd, sec, val, s, |
8665 | &error_message); | |
a4fd1a8e PB |
8666 | BFD_ASSERT (myh); |
8667 | return TRUE; | |
8668 | } | |
8669 | ||
845b51d6 PB |
8670 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
8671 | ||
8672 | static bfd_vma | |
8673 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
8674 | { | |
8675 | bfd_byte *p; | |
8676 | bfd_vma glue_addr; | |
8677 | asection *s; | |
8678 | struct elf32_arm_link_hash_table *globals; | |
8679 | ||
8680 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
8681 | BFD_ASSERT (globals != NULL); |
8682 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
8683 | ||
3d4d4302 AM |
8684 | s = bfd_get_linker_section (globals->bfd_of_glue_owner, |
8685 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
8686 | BFD_ASSERT (s != NULL); |
8687 | BFD_ASSERT (s->contents != NULL); | |
8688 | BFD_ASSERT (s->output_section != NULL); | |
8689 | ||
8690 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
8691 | ||
8692 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
8693 | ||
8694 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
8695 | { | |
8696 | p = s->contents + glue_addr; | |
8697 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
8698 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
8699 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
8700 | globals->bx_glue_offset[reg] |= 1; | |
8701 | } | |
8702 | ||
8703 | return glue_addr + s->output_section->vma + s->output_offset; | |
8704 | } | |
8705 | ||
a4fd1a8e PB |
8706 | /* Generate Arm stubs for exported Thumb symbols. */ |
8707 | static void | |
906e58ca | 8708 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
8709 | struct bfd_link_info *link_info) |
8710 | { | |
8711 | struct elf32_arm_link_hash_table * globals; | |
8712 | ||
8029a119 NC |
8713 | if (link_info == NULL) |
8714 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
8715 | return; |
8716 | ||
8717 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
8718 | if (globals == NULL) |
8719 | return; | |
8720 | ||
84c08195 PB |
8721 | /* If blx is available then exported Thumb symbols are OK and there is |
8722 | nothing to do. */ | |
a4fd1a8e PB |
8723 | if (globals->use_blx) |
8724 | return; | |
8725 | ||
8726 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
8727 | link_info); | |
8728 | } | |
8729 | ||
47beaa6a RS |
8730 | /* Reserve space for COUNT dynamic relocations in relocation selection |
8731 | SRELOC. */ | |
8732 | ||
8733 | static void | |
8734 | elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc, | |
8735 | bfd_size_type count) | |
8736 | { | |
8737 | struct elf32_arm_link_hash_table *htab; | |
8738 | ||
8739 | htab = elf32_arm_hash_table (info); | |
8740 | BFD_ASSERT (htab->root.dynamic_sections_created); | |
8741 | if (sreloc == NULL) | |
8742 | abort (); | |
8743 | sreloc->size += RELOC_SIZE (htab) * count; | |
8744 | } | |
8745 | ||
34e77a92 RS |
8746 | /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is |
8747 | dynamic, the relocations should go in SRELOC, otherwise they should | |
8748 | go in the special .rel.iplt section. */ | |
8749 | ||
8750 | static void | |
8751 | elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc, | |
8752 | bfd_size_type count) | |
8753 | { | |
8754 | struct elf32_arm_link_hash_table *htab; | |
8755 | ||
8756 | htab = elf32_arm_hash_table (info); | |
8757 | if (!htab->root.dynamic_sections_created) | |
8758 | htab->root.irelplt->size += RELOC_SIZE (htab) * count; | |
8759 | else | |
8760 | { | |
8761 | BFD_ASSERT (sreloc != NULL); | |
8762 | sreloc->size += RELOC_SIZE (htab) * count; | |
8763 | } | |
8764 | } | |
8765 | ||
47beaa6a RS |
8766 | /* Add relocation REL to the end of relocation section SRELOC. */ |
8767 | ||
8768 | static void | |
8769 | elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info, | |
8770 | asection *sreloc, Elf_Internal_Rela *rel) | |
8771 | { | |
8772 | bfd_byte *loc; | |
8773 | struct elf32_arm_link_hash_table *htab; | |
8774 | ||
8775 | htab = elf32_arm_hash_table (info); | |
34e77a92 RS |
8776 | if (!htab->root.dynamic_sections_created |
8777 | && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE) | |
8778 | sreloc = htab->root.irelplt; | |
47beaa6a RS |
8779 | if (sreloc == NULL) |
8780 | abort (); | |
8781 | loc = sreloc->contents; | |
8782 | loc += sreloc->reloc_count++ * RELOC_SIZE (htab); | |
8783 | if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size) | |
8784 | abort (); | |
8785 | SWAP_RELOC_OUT (htab) (output_bfd, rel, loc); | |
8786 | } | |
8787 | ||
34e77a92 RS |
8788 | /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT. |
8789 | IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than | |
8790 | to .plt. */ | |
8791 | ||
8792 | static void | |
8793 | elf32_arm_allocate_plt_entry (struct bfd_link_info *info, | |
8794 | bfd_boolean is_iplt_entry, | |
8795 | union gotplt_union *root_plt, | |
8796 | struct arm_plt_info *arm_plt) | |
8797 | { | |
8798 | struct elf32_arm_link_hash_table *htab; | |
8799 | asection *splt; | |
8800 | asection *sgotplt; | |
8801 | ||
8802 | htab = elf32_arm_hash_table (info); | |
8803 | ||
8804 | if (is_iplt_entry) | |
8805 | { | |
8806 | splt = htab->root.iplt; | |
8807 | sgotplt = htab->root.igotplt; | |
8808 | ||
99059e56 RM |
8809 | /* NaCl uses a special first entry in .iplt too. */ |
8810 | if (htab->nacl_p && splt->size == 0) | |
8811 | splt->size += htab->plt_header_size; | |
8812 | ||
34e77a92 RS |
8813 | /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */ |
8814 | elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1); | |
8815 | } | |
8816 | else | |
8817 | { | |
8818 | splt = htab->root.splt; | |
8819 | sgotplt = htab->root.sgotplt; | |
8820 | ||
8821 | /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */ | |
8822 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); | |
8823 | ||
8824 | /* If this is the first .plt entry, make room for the special | |
8825 | first entry. */ | |
8826 | if (splt->size == 0) | |
8827 | splt->size += htab->plt_header_size; | |
9f19ab6d WN |
8828 | |
8829 | htab->next_tls_desc_index++; | |
34e77a92 RS |
8830 | } |
8831 | ||
8832 | /* Allocate the PLT entry itself, including any leading Thumb stub. */ | |
8833 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) | |
8834 | splt->size += PLT_THUMB_STUB_SIZE; | |
8835 | root_plt->offset = splt->size; | |
8836 | splt->size += htab->plt_entry_size; | |
8837 | ||
8838 | if (!htab->symbian_p) | |
8839 | { | |
8840 | /* We also need to make an entry in the .got.plt section, which | |
8841 | will be placed in the .got section by the linker script. */ | |
9f19ab6d WN |
8842 | if (is_iplt_entry) |
8843 | arm_plt->got_offset = sgotplt->size; | |
8844 | else | |
8845 | arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc; | |
34e77a92 RS |
8846 | sgotplt->size += 4; |
8847 | } | |
8848 | } | |
8849 | ||
b38cadfb NC |
8850 | static bfd_vma |
8851 | arm_movw_immediate (bfd_vma value) | |
8852 | { | |
8853 | return (value & 0x00000fff) | ((value & 0x0000f000) << 4); | |
8854 | } | |
8855 | ||
8856 | static bfd_vma | |
8857 | arm_movt_immediate (bfd_vma value) | |
8858 | { | |
8859 | return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); | |
8860 | } | |
8861 | ||
34e77a92 RS |
8862 | /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1, |
8863 | the entry lives in .iplt and resolves to (*SYM_VALUE)(). | |
8864 | Otherwise, DYNINDX is the index of the symbol in the dynamic | |
8865 | symbol table and SYM_VALUE is undefined. | |
8866 | ||
8867 | ROOT_PLT points to the offset of the PLT entry from the start of its | |
8868 | section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific | |
57460bcf | 8869 | bookkeeping information. |
34e77a92 | 8870 | |
57460bcf NC |
8871 | Returns FALSE if there was a problem. */ |
8872 | ||
8873 | static bfd_boolean | |
34e77a92 RS |
8874 | elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info, |
8875 | union gotplt_union *root_plt, | |
8876 | struct arm_plt_info *arm_plt, | |
8877 | int dynindx, bfd_vma sym_value) | |
8878 | { | |
8879 | struct elf32_arm_link_hash_table *htab; | |
8880 | asection *sgot; | |
8881 | asection *splt; | |
8882 | asection *srel; | |
8883 | bfd_byte *loc; | |
8884 | bfd_vma plt_index; | |
8885 | Elf_Internal_Rela rel; | |
8886 | bfd_vma plt_header_size; | |
8887 | bfd_vma got_header_size; | |
8888 | ||
8889 | htab = elf32_arm_hash_table (info); | |
8890 | ||
8891 | /* Pick the appropriate sections and sizes. */ | |
8892 | if (dynindx == -1) | |
8893 | { | |
8894 | splt = htab->root.iplt; | |
8895 | sgot = htab->root.igotplt; | |
8896 | srel = htab->root.irelplt; | |
8897 | ||
8898 | /* There are no reserved entries in .igot.plt, and no special | |
8899 | first entry in .iplt. */ | |
8900 | got_header_size = 0; | |
8901 | plt_header_size = 0; | |
8902 | } | |
8903 | else | |
8904 | { | |
8905 | splt = htab->root.splt; | |
8906 | sgot = htab->root.sgotplt; | |
8907 | srel = htab->root.srelplt; | |
8908 | ||
8909 | got_header_size = get_elf_backend_data (output_bfd)->got_header_size; | |
8910 | plt_header_size = htab->plt_header_size; | |
8911 | } | |
8912 | BFD_ASSERT (splt != NULL && srel != NULL); | |
8913 | ||
8914 | /* Fill in the entry in the procedure linkage table. */ | |
8915 | if (htab->symbian_p) | |
8916 | { | |
8917 | BFD_ASSERT (dynindx >= 0); | |
8918 | put_arm_insn (htab, output_bfd, | |
8919 | elf32_arm_symbian_plt_entry[0], | |
8920 | splt->contents + root_plt->offset); | |
8921 | bfd_put_32 (output_bfd, | |
8922 | elf32_arm_symbian_plt_entry[1], | |
8923 | splt->contents + root_plt->offset + 4); | |
8924 | ||
8925 | /* Fill in the entry in the .rel.plt section. */ | |
8926 | rel.r_offset = (splt->output_section->vma | |
8927 | + splt->output_offset | |
8928 | + root_plt->offset + 4); | |
8929 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT); | |
8930 | ||
8931 | /* Get the index in the procedure linkage table which | |
8932 | corresponds to this symbol. This is the index of this symbol | |
8933 | in all the symbols for which we are making plt entries. The | |
8934 | first entry in the procedure linkage table is reserved. */ | |
8935 | plt_index = ((root_plt->offset - plt_header_size) | |
8936 | / htab->plt_entry_size); | |
8937 | } | |
8938 | else | |
8939 | { | |
8940 | bfd_vma got_offset, got_address, plt_address; | |
8941 | bfd_vma got_displacement, initial_got_entry; | |
8942 | bfd_byte * ptr; | |
8943 | ||
8944 | BFD_ASSERT (sgot != NULL); | |
8945 | ||
8946 | /* Get the offset into the .(i)got.plt table of the entry that | |
8947 | corresponds to this function. */ | |
8948 | got_offset = (arm_plt->got_offset & -2); | |
8949 | ||
8950 | /* Get the index in the procedure linkage table which | |
8951 | corresponds to this symbol. This is the index of this symbol | |
8952 | in all the symbols for which we are making plt entries. | |
8953 | After the reserved .got.plt entries, all symbols appear in | |
8954 | the same order as in .plt. */ | |
8955 | plt_index = (got_offset - got_header_size) / 4; | |
8956 | ||
8957 | /* Calculate the address of the GOT entry. */ | |
8958 | got_address = (sgot->output_section->vma | |
8959 | + sgot->output_offset | |
8960 | + got_offset); | |
8961 | ||
8962 | /* ...and the address of the PLT entry. */ | |
8963 | plt_address = (splt->output_section->vma | |
8964 | + splt->output_offset | |
8965 | + root_plt->offset); | |
8966 | ||
8967 | ptr = splt->contents + root_plt->offset; | |
0e1862bb | 8968 | if (htab->vxworks_p && bfd_link_pic (info)) |
34e77a92 RS |
8969 | { |
8970 | unsigned int i; | |
8971 | bfd_vma val; | |
8972 | ||
8973 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
8974 | { | |
8975 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
8976 | if (i == 2) | |
8977 | val |= got_address - sgot->output_section->vma; | |
8978 | if (i == 5) | |
8979 | val |= plt_index * RELOC_SIZE (htab); | |
8980 | if (i == 2 || i == 5) | |
8981 | bfd_put_32 (output_bfd, val, ptr); | |
8982 | else | |
8983 | put_arm_insn (htab, output_bfd, val, ptr); | |
8984 | } | |
8985 | } | |
8986 | else if (htab->vxworks_p) | |
8987 | { | |
8988 | unsigned int i; | |
8989 | bfd_vma val; | |
8990 | ||
8991 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) | |
8992 | { | |
8993 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
8994 | if (i == 2) | |
8995 | val |= got_address; | |
8996 | if (i == 4) | |
8997 | val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2); | |
8998 | if (i == 5) | |
8999 | val |= plt_index * RELOC_SIZE (htab); | |
9000 | if (i == 2 || i == 5) | |
9001 | bfd_put_32 (output_bfd, val, ptr); | |
9002 | else | |
9003 | put_arm_insn (htab, output_bfd, val, ptr); | |
9004 | } | |
9005 | ||
9006 | loc = (htab->srelplt2->contents | |
9007 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
9008 | ||
9009 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation | |
9010 | referencing the GOT for this PLT entry. */ | |
9011 | rel.r_offset = plt_address + 8; | |
9012 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
9013 | rel.r_addend = got_offset; | |
9014 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9015 | loc += RELOC_SIZE (htab); | |
9016 | ||
9017 | /* Create the R_ARM_ABS32 relocation referencing the | |
9018 | beginning of the PLT for this GOT entry. */ | |
9019 | rel.r_offset = got_address; | |
9020 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
9021 | rel.r_addend = 0; | |
9022 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9023 | } | |
b38cadfb NC |
9024 | else if (htab->nacl_p) |
9025 | { | |
9026 | /* Calculate the displacement between the PLT slot and the | |
9027 | common tail that's part of the special initial PLT slot. */ | |
6034aab8 | 9028 | int32_t tail_displacement |
b38cadfb NC |
9029 | = ((splt->output_section->vma + splt->output_offset |
9030 | + ARM_NACL_PLT_TAIL_OFFSET) | |
9031 | - (plt_address + htab->plt_entry_size + 4)); | |
9032 | BFD_ASSERT ((tail_displacement & 3) == 0); | |
9033 | tail_displacement >>= 2; | |
9034 | ||
9035 | BFD_ASSERT ((tail_displacement & 0xff000000) == 0 | |
9036 | || (-tail_displacement & 0xff000000) == 0); | |
9037 | ||
9038 | /* Calculate the displacement between the PLT slot and the entry | |
9039 | in the GOT. The offset accounts for the value produced by | |
9040 | adding to pc in the penultimate instruction of the PLT stub. */ | |
6034aab8 | 9041 | got_displacement = (got_address |
99059e56 | 9042 | - (plt_address + htab->plt_entry_size)); |
b38cadfb NC |
9043 | |
9044 | /* NaCl does not support interworking at all. */ | |
9045 | BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)); | |
9046 | ||
9047 | put_arm_insn (htab, output_bfd, | |
9048 | elf32_arm_nacl_plt_entry[0] | |
9049 | | arm_movw_immediate (got_displacement), | |
9050 | ptr + 0); | |
9051 | put_arm_insn (htab, output_bfd, | |
9052 | elf32_arm_nacl_plt_entry[1] | |
9053 | | arm_movt_immediate (got_displacement), | |
9054 | ptr + 4); | |
9055 | put_arm_insn (htab, output_bfd, | |
9056 | elf32_arm_nacl_plt_entry[2], | |
9057 | ptr + 8); | |
9058 | put_arm_insn (htab, output_bfd, | |
9059 | elf32_arm_nacl_plt_entry[3] | |
9060 | | (tail_displacement & 0x00ffffff), | |
9061 | ptr + 12); | |
9062 | } | |
57460bcf NC |
9063 | else if (using_thumb_only (htab)) |
9064 | { | |
eed94f8f | 9065 | /* PR ld/16017: Generate thumb only PLT entries. */ |
469a3493 | 9066 | if (!using_thumb2 (htab)) |
eed94f8f NC |
9067 | { |
9068 | /* FIXME: We ought to be able to generate thumb-1 PLT | |
9069 | instructions... */ | |
9070 | _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"), | |
9071 | output_bfd); | |
9072 | return FALSE; | |
9073 | } | |
57460bcf | 9074 | |
eed94f8f NC |
9075 | /* Calculate the displacement between the PLT slot and the entry in |
9076 | the GOT. The 12-byte offset accounts for the value produced by | |
9077 | adding to pc in the 3rd instruction of the PLT stub. */ | |
9078 | got_displacement = got_address - (plt_address + 12); | |
9079 | ||
9080 | /* As we are using 32 bit instructions we have to use 'put_arm_insn' | |
9081 | instead of 'put_thumb_insn'. */ | |
9082 | put_arm_insn (htab, output_bfd, | |
9083 | elf32_thumb2_plt_entry[0] | |
9084 | | ((got_displacement & 0x000000ff) << 16) | |
9085 | | ((got_displacement & 0x00000700) << 20) | |
9086 | | ((got_displacement & 0x00000800) >> 1) | |
9087 | | ((got_displacement & 0x0000f000) >> 12), | |
9088 | ptr + 0); | |
9089 | put_arm_insn (htab, output_bfd, | |
9090 | elf32_thumb2_plt_entry[1] | |
9091 | | ((got_displacement & 0x00ff0000) ) | |
9092 | | ((got_displacement & 0x07000000) << 4) | |
9093 | | ((got_displacement & 0x08000000) >> 17) | |
9094 | | ((got_displacement & 0xf0000000) >> 28), | |
9095 | ptr + 4); | |
9096 | put_arm_insn (htab, output_bfd, | |
9097 | elf32_thumb2_plt_entry[2], | |
9098 | ptr + 8); | |
9099 | put_arm_insn (htab, output_bfd, | |
9100 | elf32_thumb2_plt_entry[3], | |
9101 | ptr + 12); | |
57460bcf | 9102 | } |
34e77a92 RS |
9103 | else |
9104 | { | |
9105 | /* Calculate the displacement between the PLT slot and the | |
9106 | entry in the GOT. The eight-byte offset accounts for the | |
9107 | value produced by adding to pc in the first instruction | |
9108 | of the PLT stub. */ | |
9109 | got_displacement = got_address - (plt_address + 8); | |
9110 | ||
34e77a92 RS |
9111 | if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt)) |
9112 | { | |
9113 | put_thumb_insn (htab, output_bfd, | |
9114 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
9115 | put_thumb_insn (htab, output_bfd, | |
9116 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
9117 | } | |
9118 | ||
1db37fe6 YG |
9119 | if (!elf32_arm_use_long_plt_entry) |
9120 | { | |
9121 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); | |
9122 | ||
9123 | put_arm_insn (htab, output_bfd, | |
9124 | elf32_arm_plt_entry_short[0] | |
9125 | | ((got_displacement & 0x0ff00000) >> 20), | |
9126 | ptr + 0); | |
9127 | put_arm_insn (htab, output_bfd, | |
9128 | elf32_arm_plt_entry_short[1] | |
9129 | | ((got_displacement & 0x000ff000) >> 12), | |
9130 | ptr+ 4); | |
9131 | put_arm_insn (htab, output_bfd, | |
9132 | elf32_arm_plt_entry_short[2] | |
9133 | | (got_displacement & 0x00000fff), | |
9134 | ptr + 8); | |
34e77a92 | 9135 | #ifdef FOUR_WORD_PLT |
1db37fe6 | 9136 | bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12); |
34e77a92 | 9137 | #endif |
1db37fe6 YG |
9138 | } |
9139 | else | |
9140 | { | |
9141 | put_arm_insn (htab, output_bfd, | |
9142 | elf32_arm_plt_entry_long[0] | |
9143 | | ((got_displacement & 0xf0000000) >> 28), | |
9144 | ptr + 0); | |
9145 | put_arm_insn (htab, output_bfd, | |
9146 | elf32_arm_plt_entry_long[1] | |
9147 | | ((got_displacement & 0x0ff00000) >> 20), | |
9148 | ptr + 4); | |
9149 | put_arm_insn (htab, output_bfd, | |
9150 | elf32_arm_plt_entry_long[2] | |
9151 | | ((got_displacement & 0x000ff000) >> 12), | |
9152 | ptr+ 8); | |
9153 | put_arm_insn (htab, output_bfd, | |
9154 | elf32_arm_plt_entry_long[3] | |
9155 | | (got_displacement & 0x00000fff), | |
9156 | ptr + 12); | |
9157 | } | |
34e77a92 RS |
9158 | } |
9159 | ||
9160 | /* Fill in the entry in the .rel(a).(i)plt section. */ | |
9161 | rel.r_offset = got_address; | |
9162 | rel.r_addend = 0; | |
9163 | if (dynindx == -1) | |
9164 | { | |
9165 | /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE. | |
9166 | The dynamic linker or static executable then calls SYM_VALUE | |
9167 | to determine the correct run-time value of the .igot.plt entry. */ | |
9168 | rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); | |
9169 | initial_got_entry = sym_value; | |
9170 | } | |
9171 | else | |
9172 | { | |
9173 | rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT); | |
9174 | initial_got_entry = (splt->output_section->vma | |
9175 | + splt->output_offset); | |
9176 | } | |
9177 | ||
9178 | /* Fill in the entry in the global offset table. */ | |
9179 | bfd_put_32 (output_bfd, initial_got_entry, | |
9180 | sgot->contents + got_offset); | |
9181 | } | |
9182 | ||
aba8c3de WN |
9183 | if (dynindx == -1) |
9184 | elf32_arm_add_dynreloc (output_bfd, info, srel, &rel); | |
9185 | else | |
9186 | { | |
9187 | loc = srel->contents + plt_index * RELOC_SIZE (htab); | |
9188 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
9189 | } | |
57460bcf NC |
9190 | |
9191 | return TRUE; | |
34e77a92 RS |
9192 | } |
9193 | ||
eb043451 PB |
9194 | /* Some relocations map to different relocations depending on the |
9195 | target. Return the real relocation. */ | |
8029a119 | 9196 | |
eb043451 PB |
9197 | static int |
9198 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
9199 | int r_type) | |
9200 | { | |
9201 | switch (r_type) | |
9202 | { | |
9203 | case R_ARM_TARGET1: | |
9204 | if (globals->target1_is_rel) | |
9205 | return R_ARM_REL32; | |
9206 | else | |
9207 | return R_ARM_ABS32; | |
9208 | ||
9209 | case R_ARM_TARGET2: | |
9210 | return globals->target2_reloc; | |
9211 | ||
9212 | default: | |
9213 | return r_type; | |
9214 | } | |
9215 | } | |
eb043451 | 9216 | |
ba93b8ac DJ |
9217 | /* Return the base VMA address which should be subtracted from real addresses |
9218 | when resolving @dtpoff relocation. | |
9219 | This is PT_TLS segment p_vaddr. */ | |
9220 | ||
9221 | static bfd_vma | |
9222 | dtpoff_base (struct bfd_link_info *info) | |
9223 | { | |
9224 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
9225 | if (elf_hash_table (info)->tls_sec == NULL) | |
9226 | return 0; | |
9227 | return elf_hash_table (info)->tls_sec->vma; | |
9228 | } | |
9229 | ||
9230 | /* Return the relocation value for @tpoff relocation | |
9231 | if STT_TLS virtual address is ADDRESS. */ | |
9232 | ||
9233 | static bfd_vma | |
9234 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
9235 | { | |
9236 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
9237 | bfd_vma base; | |
9238 | ||
9239 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
9240 | if (htab->tls_sec == NULL) | |
9241 | return 0; | |
9242 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
9243 | return address - htab->tls_sec->vma + base; | |
9244 | } | |
9245 | ||
00a97672 RS |
9246 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
9247 | VALUE is the relocation value. */ | |
9248 | ||
9249 | static bfd_reloc_status_type | |
9250 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
9251 | { | |
9252 | if (value > 0xfff) | |
9253 | return bfd_reloc_overflow; | |
9254 | ||
9255 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
9256 | bfd_put_32 (abfd, value, data); | |
9257 | return bfd_reloc_ok; | |
9258 | } | |
9259 | ||
0855e32b NS |
9260 | /* Handle TLS relaxations. Relaxing is possible for symbols that use |
9261 | R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or | |
9262 | R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link. | |
9263 | ||
9264 | Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller | |
9265 | is to then call final_link_relocate. Return other values in the | |
62672b10 NS |
9266 | case of error. |
9267 | ||
9268 | FIXME:When --emit-relocs is in effect, we'll emit relocs describing | |
9269 | the pre-relaxed code. It would be nice if the relocs were updated | |
9270 | to match the optimization. */ | |
0855e32b | 9271 | |
b38cadfb | 9272 | static bfd_reloc_status_type |
0855e32b | 9273 | elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals, |
b38cadfb | 9274 | bfd *input_bfd, asection *input_sec, bfd_byte *contents, |
0855e32b NS |
9275 | Elf_Internal_Rela *rel, unsigned long is_local) |
9276 | { | |
9277 | unsigned long insn; | |
b38cadfb | 9278 | |
0855e32b NS |
9279 | switch (ELF32_R_TYPE (rel->r_info)) |
9280 | { | |
9281 | default: | |
9282 | return bfd_reloc_notsupported; | |
b38cadfb | 9283 | |
0855e32b NS |
9284 | case R_ARM_TLS_GOTDESC: |
9285 | if (is_local) | |
9286 | insn = 0; | |
9287 | else | |
9288 | { | |
9289 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
9290 | if (insn & 1) | |
9291 | insn -= 5; /* THUMB */ | |
9292 | else | |
9293 | insn -= 8; /* ARM */ | |
9294 | } | |
9295 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
9296 | return bfd_reloc_continue; | |
9297 | ||
9298 | case R_ARM_THM_TLS_DESCSEQ: | |
9299 | /* Thumb insn. */ | |
9300 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset); | |
9301 | if ((insn & 0xff78) == 0x4478) /* add rx, pc */ | |
9302 | { | |
9303 | if (is_local) | |
9304 | /* nop */ | |
9305 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
9306 | } | |
9307 | else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */ | |
9308 | { | |
9309 | if (is_local) | |
9310 | /* nop */ | |
9311 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
9312 | else | |
9313 | /* ldr rx,[ry] */ | |
9314 | bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset); | |
9315 | } | |
9316 | else if ((insn & 0xff87) == 0x4780) /* blx rx */ | |
9317 | { | |
9318 | if (is_local) | |
9319 | /* nop */ | |
9320 | bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset); | |
9321 | else | |
9322 | /* mov r0, rx */ | |
9323 | bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78), | |
9324 | contents + rel->r_offset); | |
9325 | } | |
9326 | else | |
9327 | { | |
9328 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
9329 | /* It's a 32 bit instruction, fetch the rest of it for | |
9330 | error generation. */ | |
9331 | insn = (insn << 16) | |
9332 | | bfd_get_16 (input_bfd, contents + rel->r_offset + 2); | |
9333 | (*_bfd_error_handler) | |
9334 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"), | |
9335 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
9336 | return bfd_reloc_notsupported; | |
9337 | } | |
9338 | break; | |
b38cadfb | 9339 | |
0855e32b NS |
9340 | case R_ARM_TLS_DESCSEQ: |
9341 | /* arm insn. */ | |
9342 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
9343 | if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */ | |
9344 | { | |
9345 | if (is_local) | |
9346 | /* mov rx, ry */ | |
9347 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff), | |
9348 | contents + rel->r_offset); | |
9349 | } | |
9350 | else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/ | |
9351 | { | |
9352 | if (is_local) | |
9353 | /* nop */ | |
9354 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
9355 | else | |
9356 | /* ldr rx,[ry] */ | |
9357 | bfd_put_32 (input_bfd, insn & 0xfffff000, | |
9358 | contents + rel->r_offset); | |
9359 | } | |
9360 | else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */ | |
9361 | { | |
9362 | if (is_local) | |
9363 | /* nop */ | |
9364 | bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset); | |
9365 | else | |
9366 | /* mov r0, rx */ | |
9367 | bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf), | |
9368 | contents + rel->r_offset); | |
9369 | } | |
9370 | else | |
9371 | { | |
9372 | (*_bfd_error_handler) | |
9373 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"), | |
9374 | input_bfd, input_sec, (unsigned long)rel->r_offset, insn); | |
9375 | return bfd_reloc_notsupported; | |
9376 | } | |
9377 | break; | |
9378 | ||
9379 | case R_ARM_TLS_CALL: | |
9380 | /* GD->IE relaxation, turn the instruction into 'nop' or | |
9381 | 'ldr r0, [pc,r0]' */ | |
9382 | insn = is_local ? 0xe1a00000 : 0xe79f0000; | |
9383 | bfd_put_32 (input_bfd, insn, contents + rel->r_offset); | |
9384 | break; | |
b38cadfb | 9385 | |
0855e32b | 9386 | case R_ARM_THM_TLS_CALL: |
6a631e86 | 9387 | /* GD->IE relaxation. */ |
0855e32b NS |
9388 | if (!is_local) |
9389 | /* add r0,pc; ldr r0, [r0] */ | |
9390 | insn = 0x44786800; | |
60a019a0 | 9391 | else if (using_thumb2 (globals)) |
0855e32b NS |
9392 | /* nop.w */ |
9393 | insn = 0xf3af8000; | |
9394 | else | |
9395 | /* nop; nop */ | |
9396 | insn = 0xbf00bf00; | |
b38cadfb | 9397 | |
0855e32b NS |
9398 | bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset); |
9399 | bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2); | |
9400 | break; | |
9401 | } | |
9402 | return bfd_reloc_ok; | |
9403 | } | |
9404 | ||
4962c51a MS |
9405 | /* For a given value of n, calculate the value of G_n as required to |
9406 | deal with group relocations. We return it in the form of an | |
9407 | encoded constant-and-rotation, together with the final residual. If n is | |
9408 | specified as less than zero, then final_residual is filled with the | |
9409 | input value and no further action is performed. */ | |
9410 | ||
9411 | static bfd_vma | |
9412 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
9413 | { | |
9414 | int current_n; | |
9415 | bfd_vma g_n; | |
9416 | bfd_vma encoded_g_n = 0; | |
9417 | bfd_vma residual = value; /* Also known as Y_n. */ | |
9418 | ||
9419 | for (current_n = 0; current_n <= n; current_n++) | |
9420 | { | |
9421 | int shift; | |
9422 | ||
9423 | /* Calculate which part of the value to mask. */ | |
9424 | if (residual == 0) | |
99059e56 | 9425 | shift = 0; |
4962c51a | 9426 | else |
99059e56 RM |
9427 | { |
9428 | int msb; | |
9429 | ||
9430 | /* Determine the most significant bit in the residual and | |
9431 | align the resulting value to a 2-bit boundary. */ | |
9432 | for (msb = 30; msb >= 0; msb -= 2) | |
9433 | if (residual & (3 << msb)) | |
9434 | break; | |
9435 | ||
9436 | /* The desired shift is now (msb - 6), or zero, whichever | |
9437 | is the greater. */ | |
9438 | shift = msb - 6; | |
9439 | if (shift < 0) | |
9440 | shift = 0; | |
9441 | } | |
4962c51a MS |
9442 | |
9443 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
9444 | g_n = residual & (0xff << shift); | |
9445 | encoded_g_n = (g_n >> shift) | |
99059e56 | 9446 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); |
4962c51a MS |
9447 | |
9448 | /* Calculate the residual for the next time around. */ | |
9449 | residual &= ~g_n; | |
9450 | } | |
9451 | ||
9452 | *final_residual = residual; | |
9453 | ||
9454 | return encoded_g_n; | |
9455 | } | |
9456 | ||
9457 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
9458 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 9459 | |
4962c51a | 9460 | static int |
906e58ca | 9461 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
9462 | { |
9463 | int opcode = insn & 0x1e00000; | |
9464 | ||
9465 | if (opcode == 1 << 23) /* ADD */ | |
9466 | return 1; | |
9467 | ||
9468 | if (opcode == 1 << 22) /* SUB */ | |
9469 | return -1; | |
9470 | ||
9471 | return 0; | |
9472 | } | |
9473 | ||
252b5132 | 9474 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 9475 | |
252b5132 | 9476 | static bfd_reloc_status_type |
57e8b36a NC |
9477 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
9478 | bfd * input_bfd, | |
9479 | bfd * output_bfd, | |
9480 | asection * input_section, | |
9481 | bfd_byte * contents, | |
9482 | Elf_Internal_Rela * rel, | |
9483 | bfd_vma value, | |
9484 | struct bfd_link_info * info, | |
9485 | asection * sym_sec, | |
9486 | const char * sym_name, | |
34e77a92 RS |
9487 | unsigned char st_type, |
9488 | enum arm_st_branch_type branch_type, | |
0945cdfd | 9489 | struct elf_link_hash_entry * h, |
f2a9dd69 | 9490 | bfd_boolean * unresolved_reloc_p, |
8029a119 | 9491 | char ** error_message) |
252b5132 RH |
9492 | { |
9493 | unsigned long r_type = howto->type; | |
9494 | unsigned long r_symndx; | |
9495 | bfd_byte * hit_data = contents + rel->r_offset; | |
252b5132 | 9496 | bfd_vma * local_got_offsets; |
0855e32b | 9497 | bfd_vma * local_tlsdesc_gotents; |
34e77a92 RS |
9498 | asection * sgot; |
9499 | asection * splt; | |
252b5132 | 9500 | asection * sreloc = NULL; |
362d30a1 | 9501 | asection * srelgot; |
252b5132 | 9502 | bfd_vma addend; |
ba96a88f | 9503 | bfd_signed_vma signed_addend; |
34e77a92 RS |
9504 | unsigned char dynreloc_st_type; |
9505 | bfd_vma dynreloc_value; | |
ba96a88f | 9506 | struct elf32_arm_link_hash_table * globals; |
34e77a92 RS |
9507 | struct elf32_arm_link_hash_entry *eh; |
9508 | union gotplt_union *root_plt; | |
9509 | struct arm_plt_info *arm_plt; | |
9510 | bfd_vma plt_offset; | |
9511 | bfd_vma gotplt_offset; | |
9512 | bfd_boolean has_iplt_entry; | |
f21f3fe0 | 9513 | |
9c504268 | 9514 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
9515 | if (globals == NULL) |
9516 | return bfd_reloc_notsupported; | |
9c504268 | 9517 | |
0ffa91dd NC |
9518 | BFD_ASSERT (is_arm_elf (input_bfd)); |
9519 | ||
9520 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 9521 | target. We pick the right one here. */ |
eb043451 | 9522 | r_type = arm_real_reloc_type (globals, r_type); |
0855e32b NS |
9523 | |
9524 | /* It is possible to have linker relaxations on some TLS access | |
9525 | models. Update our information here. */ | |
9526 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
9527 | ||
eb043451 PB |
9528 | if (r_type != howto->type) |
9529 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 9530 | |
34e77a92 | 9531 | eh = (struct elf32_arm_link_hash_entry *) h; |
362d30a1 | 9532 | sgot = globals->root.sgot; |
252b5132 | 9533 | local_got_offsets = elf_local_got_offsets (input_bfd); |
0855e32b NS |
9534 | local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd); |
9535 | ||
34e77a92 RS |
9536 | if (globals->root.dynamic_sections_created) |
9537 | srelgot = globals->root.srelgot; | |
9538 | else | |
9539 | srelgot = NULL; | |
9540 | ||
252b5132 RH |
9541 | r_symndx = ELF32_R_SYM (rel->r_info); |
9542 | ||
4e7fd91e | 9543 | if (globals->use_rel) |
ba96a88f | 9544 | { |
4e7fd91e PB |
9545 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
9546 | ||
9547 | if (addend & ((howto->src_mask + 1) >> 1)) | |
9548 | { | |
9549 | signed_addend = -1; | |
9550 | signed_addend &= ~ howto->src_mask; | |
9551 | signed_addend |= addend; | |
9552 | } | |
9553 | else | |
9554 | signed_addend = addend; | |
ba96a88f NC |
9555 | } |
9556 | else | |
4e7fd91e | 9557 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 9558 | |
39f21624 NC |
9559 | /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we |
9560 | are resolving a function call relocation. */ | |
9561 | if (using_thumb_only (globals) | |
9562 | && (r_type == R_ARM_THM_CALL | |
9563 | || r_type == R_ARM_THM_JUMP24) | |
9564 | && branch_type == ST_BRANCH_TO_ARM) | |
9565 | branch_type = ST_BRANCH_TO_THUMB; | |
9566 | ||
34e77a92 RS |
9567 | /* Record the symbol information that should be used in dynamic |
9568 | relocations. */ | |
9569 | dynreloc_st_type = st_type; | |
9570 | dynreloc_value = value; | |
9571 | if (branch_type == ST_BRANCH_TO_THUMB) | |
9572 | dynreloc_value |= 1; | |
9573 | ||
9574 | /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and | |
9575 | VALUE appropriately for relocations that we resolve at link time. */ | |
9576 | has_iplt_entry = FALSE; | |
4ba2ef8f TP |
9577 | if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt, |
9578 | &arm_plt) | |
34e77a92 RS |
9579 | && root_plt->offset != (bfd_vma) -1) |
9580 | { | |
9581 | plt_offset = root_plt->offset; | |
9582 | gotplt_offset = arm_plt->got_offset; | |
9583 | ||
9584 | if (h == NULL || eh->is_iplt) | |
9585 | { | |
9586 | has_iplt_entry = TRUE; | |
9587 | splt = globals->root.iplt; | |
9588 | ||
9589 | /* Populate .iplt entries here, because not all of them will | |
9590 | be seen by finish_dynamic_symbol. The lower bit is set if | |
9591 | we have already populated the entry. */ | |
9592 | if (plt_offset & 1) | |
9593 | plt_offset--; | |
9594 | else | |
9595 | { | |
57460bcf NC |
9596 | if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt, |
9597 | -1, dynreloc_value)) | |
9598 | root_plt->offset |= 1; | |
9599 | else | |
9600 | return bfd_reloc_notsupported; | |
34e77a92 RS |
9601 | } |
9602 | ||
9603 | /* Static relocations always resolve to the .iplt entry. */ | |
9604 | st_type = STT_FUNC; | |
9605 | value = (splt->output_section->vma | |
9606 | + splt->output_offset | |
9607 | + plt_offset); | |
9608 | branch_type = ST_BRANCH_TO_ARM; | |
9609 | ||
9610 | /* If there are non-call relocations that resolve to the .iplt | |
9611 | entry, then all dynamic ones must too. */ | |
9612 | if (arm_plt->noncall_refcount != 0) | |
9613 | { | |
9614 | dynreloc_st_type = st_type; | |
9615 | dynreloc_value = value; | |
9616 | } | |
9617 | } | |
9618 | else | |
9619 | /* We populate the .plt entry in finish_dynamic_symbol. */ | |
9620 | splt = globals->root.splt; | |
9621 | } | |
9622 | else | |
9623 | { | |
9624 | splt = NULL; | |
9625 | plt_offset = (bfd_vma) -1; | |
9626 | gotplt_offset = (bfd_vma) -1; | |
9627 | } | |
9628 | ||
252b5132 RH |
9629 | switch (r_type) |
9630 | { | |
9631 | case R_ARM_NONE: | |
28a094c2 DJ |
9632 | /* We don't need to find a value for this symbol. It's just a |
9633 | marker. */ | |
9634 | *unresolved_reloc_p = FALSE; | |
252b5132 RH |
9635 | return bfd_reloc_ok; |
9636 | ||
00a97672 RS |
9637 | case R_ARM_ABS12: |
9638 | if (!globals->vxworks_p) | |
9639 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
9640 | ||
252b5132 RH |
9641 | case R_ARM_PC24: |
9642 | case R_ARM_ABS32: | |
bb224fc3 | 9643 | case R_ARM_ABS32_NOI: |
252b5132 | 9644 | case R_ARM_REL32: |
bb224fc3 | 9645 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
9646 | case R_ARM_CALL: |
9647 | case R_ARM_JUMP24: | |
dfc5f959 | 9648 | case R_ARM_XPC25: |
eb043451 | 9649 | case R_ARM_PREL31: |
7359ea65 | 9650 | case R_ARM_PLT32: |
7359ea65 DJ |
9651 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
9652 | will use the symbol's value, which may point to a PLT entry, but we | |
9653 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
9654 | branches in this object should go to it, except if the PLT is too |
9655 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 9656 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
99059e56 | 9657 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
9658 | && r_type != R_ARM_CALL |
9659 | && r_type != R_ARM_JUMP24 | |
9660 | && r_type != R_ARM_PLT32) | |
34e77a92 | 9661 | && plt_offset != (bfd_vma) -1) |
7359ea65 | 9662 | { |
34e77a92 RS |
9663 | /* If we've created a .plt section, and assigned a PLT entry |
9664 | to this function, it must either be a STT_GNU_IFUNC reference | |
9665 | or not be known to bind locally. In other cases, we should | |
9666 | have cleared the PLT entry by now. */ | |
9667 | BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h)); | |
7359ea65 DJ |
9668 | |
9669 | value = (splt->output_section->vma | |
9670 | + splt->output_offset | |
34e77a92 | 9671 | + plt_offset); |
0945cdfd | 9672 | *unresolved_reloc_p = FALSE; |
7359ea65 DJ |
9673 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
9674 | contents, rel->r_offset, value, | |
00a97672 | 9675 | rel->r_addend); |
7359ea65 DJ |
9676 | } |
9677 | ||
67687978 PB |
9678 | /* When generating a shared object or relocatable executable, these |
9679 | relocations are copied into the output file to be resolved at | |
9680 | run time. */ | |
0e1862bb L |
9681 | if ((bfd_link_pic (info) |
9682 | || globals->root.is_relocatable_executable) | |
7359ea65 | 9683 | && (input_section->flags & SEC_ALLOC) |
4dfe6ac6 | 9684 | && !(globals->vxworks_p |
3348747a NS |
9685 | && strcmp (input_section->output_section->name, |
9686 | ".tls_vars") == 0) | |
bb224fc3 | 9687 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 9688 | || !SYMBOL_CALLS_LOCAL (info, h)) |
ca6b5f82 AM |
9689 | && !(input_bfd == globals->stub_bfd |
9690 | && strstr (input_section->name, STUB_SUFFIX)) | |
7359ea65 DJ |
9691 | && (h == NULL |
9692 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
9693 | || h->root.type != bfd_link_hash_undefweak) | |
9694 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
9695 | && r_type != R_ARM_CALL |
9696 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 9697 | && r_type != R_ARM_PREL31 |
7359ea65 | 9698 | && r_type != R_ARM_PLT32) |
252b5132 | 9699 | { |
947216bf | 9700 | Elf_Internal_Rela outrel; |
b34976b6 | 9701 | bfd_boolean skip, relocate; |
f21f3fe0 | 9702 | |
52db4ec2 JW |
9703 | if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) |
9704 | && !h->def_regular) | |
9705 | { | |
9706 | char *v = _("shared object"); | |
9707 | ||
0e1862bb | 9708 | if (bfd_link_executable (info)) |
52db4ec2 JW |
9709 | v = _("PIE executable"); |
9710 | ||
9711 | (*_bfd_error_handler) | |
9712 | (_("%B: relocation %s against external or undefined symbol `%s'" | |
9713 | " can not be used when making a %s; recompile with -fPIC"), input_bfd, | |
9714 | elf32_arm_howto_table_1[r_type].name, h->root.root.string, v); | |
9715 | return bfd_reloc_notsupported; | |
9716 | } | |
9717 | ||
0945cdfd DJ |
9718 | *unresolved_reloc_p = FALSE; |
9719 | ||
34e77a92 | 9720 | if (sreloc == NULL && globals->root.dynamic_sections_created) |
252b5132 | 9721 | { |
83bac4b0 NC |
9722 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
9723 | ! globals->use_rel); | |
f21f3fe0 | 9724 | |
83bac4b0 | 9725 | if (sreloc == NULL) |
252b5132 | 9726 | return bfd_reloc_notsupported; |
252b5132 | 9727 | } |
f21f3fe0 | 9728 | |
b34976b6 AM |
9729 | skip = FALSE; |
9730 | relocate = FALSE; | |
f21f3fe0 | 9731 | |
00a97672 | 9732 | outrel.r_addend = addend; |
c629eae0 JJ |
9733 | outrel.r_offset = |
9734 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
9735 | rel->r_offset); | |
9736 | if (outrel.r_offset == (bfd_vma) -1) | |
b34976b6 | 9737 | skip = TRUE; |
0bb2d96a | 9738 | else if (outrel.r_offset == (bfd_vma) -2) |
b34976b6 | 9739 | skip = TRUE, relocate = TRUE; |
252b5132 RH |
9740 | outrel.r_offset += (input_section->output_section->vma |
9741 | + input_section->output_offset); | |
f21f3fe0 | 9742 | |
252b5132 | 9743 | if (skip) |
0bb2d96a | 9744 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
9745 | else if (h != NULL |
9746 | && h->dynindx != -1 | |
0e1862bb | 9747 | && (!bfd_link_pic (info) |
a496fbc8 | 9748 | || !SYMBOLIC_BIND (info, h) |
f5385ebf | 9749 | || !h->def_regular)) |
5e681ec4 | 9750 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
9751 | else |
9752 | { | |
a16385dc MM |
9753 | int symbol; |
9754 | ||
5e681ec4 | 9755 | /* This symbol is local, or marked to become local. */ |
34e77a92 | 9756 | BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI); |
a16385dc | 9757 | if (globals->symbian_p) |
6366ff1e | 9758 | { |
74541ad4 AM |
9759 | asection *osec; |
9760 | ||
6366ff1e MM |
9761 | /* On Symbian OS, the data segment and text segement |
9762 | can be relocated independently. Therefore, we | |
9763 | must indicate the segment to which this | |
9764 | relocation is relative. The BPABI allows us to | |
9765 | use any symbol in the right segment; we just use | |
9766 | the section symbol as it is convenient. (We | |
9767 | cannot use the symbol given by "h" directly as it | |
74541ad4 AM |
9768 | will not appear in the dynamic symbol table.) |
9769 | ||
9770 | Note that the dynamic linker ignores the section | |
9771 | symbol value, so we don't subtract osec->vma | |
9772 | from the emitted reloc addend. */ | |
10dbd1f3 | 9773 | if (sym_sec) |
74541ad4 | 9774 | osec = sym_sec->output_section; |
10dbd1f3 | 9775 | else |
74541ad4 AM |
9776 | osec = input_section->output_section; |
9777 | symbol = elf_section_data (osec)->dynindx; | |
9778 | if (symbol == 0) | |
9779 | { | |
9780 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
9781 | ||
9782 | if ((osec->flags & SEC_READONLY) == 0 | |
9783 | && htab->data_index_section != NULL) | |
9784 | osec = htab->data_index_section; | |
9785 | else | |
9786 | osec = htab->text_index_section; | |
9787 | symbol = elf_section_data (osec)->dynindx; | |
9788 | } | |
6366ff1e MM |
9789 | BFD_ASSERT (symbol != 0); |
9790 | } | |
a16385dc MM |
9791 | else |
9792 | /* On SVR4-ish systems, the dynamic loader cannot | |
9793 | relocate the text and data segments independently, | |
9794 | so the symbol does not matter. */ | |
9795 | symbol = 0; | |
34e77a92 RS |
9796 | if (dynreloc_st_type == STT_GNU_IFUNC) |
9797 | /* We have an STT_GNU_IFUNC symbol that doesn't resolve | |
9798 | to the .iplt entry. Instead, every non-call reference | |
9799 | must use an R_ARM_IRELATIVE relocation to obtain the | |
9800 | correct run-time address. */ | |
9801 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE); | |
9802 | else | |
9803 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 RS |
9804 | if (globals->use_rel) |
9805 | relocate = TRUE; | |
9806 | else | |
34e77a92 | 9807 | outrel.r_addend += dynreloc_value; |
252b5132 | 9808 | } |
f21f3fe0 | 9809 | |
47beaa6a | 9810 | elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel); |
9a5aca8c | 9811 | |
f21f3fe0 | 9812 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 9813 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 9814 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
9815 | if (! relocate) |
9816 | return bfd_reloc_ok; | |
9a5aca8c | 9817 | |
f21f3fe0 | 9818 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
34e77a92 RS |
9819 | contents, rel->r_offset, |
9820 | dynreloc_value, (bfd_vma) 0); | |
252b5132 RH |
9821 | } |
9822 | else switch (r_type) | |
9823 | { | |
00a97672 RS |
9824 | case R_ARM_ABS12: |
9825 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
9826 | ||
dfc5f959 | 9827 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
9828 | case R_ARM_CALL: |
9829 | case R_ARM_JUMP24: | |
8029a119 | 9830 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 9831 | case R_ARM_PLT32: |
906e58ca | 9832 | { |
906e58ca NC |
9833 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; |
9834 | ||
dfc5f959 | 9835 | if (r_type == R_ARM_XPC25) |
252b5132 | 9836 | { |
dfc5f959 NC |
9837 | /* Check for Arm calling Arm function. */ |
9838 | /* FIXME: Should we translate the instruction into a BL | |
9839 | instruction instead ? */ | |
35fc36a8 | 9840 | if (branch_type != ST_BRANCH_TO_THUMB) |
d003868e AM |
9841 | (*_bfd_error_handler) |
9842 | (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."), | |
9843 | input_bfd, | |
9844 | h ? h->root.root.string : "(local)"); | |
dfc5f959 | 9845 | } |
155d87d7 | 9846 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
9847 | { |
9848 | /* Check for Arm calling Thumb function. */ | |
35fc36a8 | 9849 | if (branch_type == ST_BRANCH_TO_THUMB) |
dfc5f959 | 9850 | { |
f2a9dd69 DJ |
9851 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
9852 | output_bfd, input_section, | |
9853 | hit_data, sym_sec, rel->r_offset, | |
9854 | signed_addend, value, | |
9855 | error_message)) | |
9856 | return bfd_reloc_ok; | |
9857 | else | |
9858 | return bfd_reloc_dangerous; | |
dfc5f959 | 9859 | } |
252b5132 | 9860 | } |
ba96a88f | 9861 | |
906e58ca | 9862 | /* Check if a stub has to be inserted because the |
8029a119 | 9863 | destination is too far or we are changing mode. */ |
155d87d7 CL |
9864 | if ( r_type == R_ARM_CALL |
9865 | || r_type == R_ARM_JUMP24 | |
9866 | || r_type == R_ARM_PLT32) | |
906e58ca | 9867 | { |
fe33d2fa CL |
9868 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
9869 | struct elf32_arm_link_hash_entry *hash; | |
9870 | ||
9871 | hash = (struct elf32_arm_link_hash_entry *) h; | |
9872 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
9873 | st_type, &branch_type, |
9874 | hash, value, sym_sec, | |
fe33d2fa | 9875 | input_bfd, sym_name); |
5fa9e92f | 9876 | |
fe33d2fa | 9877 | if (stub_type != arm_stub_none) |
906e58ca NC |
9878 | { |
9879 | /* The target is out of reach, so redirect the | |
9880 | branch to the local stub for this function. */ | |
906e58ca NC |
9881 | stub_entry = elf32_arm_get_stub_entry (input_section, |
9882 | sym_sec, h, | |
fe33d2fa CL |
9883 | rel, globals, |
9884 | stub_type); | |
9cd3e4e5 NC |
9885 | { |
9886 | if (stub_entry != NULL) | |
9887 | value = (stub_entry->stub_offset | |
9888 | + stub_entry->stub_sec->output_offset | |
9889 | + stub_entry->stub_sec->output_section->vma); | |
9890 | ||
9891 | if (plt_offset != (bfd_vma) -1) | |
9892 | *unresolved_reloc_p = FALSE; | |
9893 | } | |
906e58ca | 9894 | } |
fe33d2fa CL |
9895 | else |
9896 | { | |
9897 | /* If the call goes through a PLT entry, make sure to | |
9898 | check distance to the right destination address. */ | |
34e77a92 | 9899 | if (plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
9900 | { |
9901 | value = (splt->output_section->vma | |
9902 | + splt->output_offset | |
34e77a92 | 9903 | + plt_offset); |
fe33d2fa CL |
9904 | *unresolved_reloc_p = FALSE; |
9905 | /* The PLT entry is in ARM mode, regardless of the | |
9906 | target function. */ | |
35fc36a8 | 9907 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
9908 | } |
9909 | } | |
906e58ca NC |
9910 | } |
9911 | ||
dea514f5 PB |
9912 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
9913 | where: | |
9914 | S is the address of the symbol in the relocation. | |
9915 | P is address of the instruction being relocated. | |
9916 | A is the addend (extracted from the instruction) in bytes. | |
9917 | ||
9918 | S is held in 'value'. | |
9919 | P is the base address of the section containing the | |
9920 | instruction plus the offset of the reloc into that | |
9921 | section, ie: | |
9922 | (input_section->output_section->vma + | |
9923 | input_section->output_offset + | |
9924 | rel->r_offset). | |
9925 | A is the addend, converted into bytes, ie: | |
9926 | (signed_addend * 4) | |
9927 | ||
9928 | Note: None of these operations have knowledge of the pipeline | |
9929 | size of the processor, thus it is up to the assembler to | |
9930 | encode this information into the addend. */ | |
9931 | value -= (input_section->output_section->vma | |
9932 | + input_section->output_offset); | |
9933 | value -= rel->r_offset; | |
4e7fd91e PB |
9934 | if (globals->use_rel) |
9935 | value += (signed_addend << howto->size); | |
9936 | else | |
9937 | /* RELA addends do not have to be adjusted by howto->size. */ | |
9938 | value += signed_addend; | |
23080146 | 9939 | |
dcb5e6e6 NC |
9940 | signed_addend = value; |
9941 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 9942 | |
5ab79981 | 9943 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 9944 | the next instruction unless a PLT entry will be created. |
77b4f08f | 9945 | Do the same for local undefined symbols (but not for STN_UNDEF). |
cd1dac3d DG |
9946 | The jump to the next instruction is optimized as a NOP depending |
9947 | on the architecture. */ | |
ffcb4889 | 9948 | if (h ? (h->root.type == bfd_link_hash_undefweak |
34e77a92 | 9949 | && plt_offset == (bfd_vma) -1) |
77b4f08f | 9950 | : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) |
5ab79981 | 9951 | { |
cd1dac3d DG |
9952 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
9953 | ||
9954 | if (arch_has_arm_nop (globals)) | |
9955 | value |= 0x0320f000; | |
9956 | else | |
9957 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
9958 | } |
9959 | else | |
59f2c4e7 | 9960 | { |
9b485d32 | 9961 | /* Perform a signed range check. */ |
dcb5e6e6 | 9962 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
9963 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
9964 | return bfd_reloc_overflow; | |
9a5aca8c | 9965 | |
5ab79981 | 9966 | addend = (value & 2); |
39b41c9c | 9967 | |
5ab79981 PB |
9968 | value = (signed_addend & howto->dst_mask) |
9969 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 9970 | |
5ab79981 PB |
9971 | if (r_type == R_ARM_CALL) |
9972 | { | |
155d87d7 | 9973 | /* Set the H bit in the BLX instruction. */ |
35fc36a8 | 9974 | if (branch_type == ST_BRANCH_TO_THUMB) |
155d87d7 CL |
9975 | { |
9976 | if (addend) | |
9977 | value |= (1 << 24); | |
9978 | else | |
9979 | value &= ~(bfd_vma)(1 << 24); | |
9980 | } | |
9981 | ||
5ab79981 | 9982 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 9983 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 9984 | case, mode switching is performed by the stub. */ |
35fc36a8 | 9985 | if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry) |
5ab79981 | 9986 | value |= (1 << 28); |
63e1a0fc | 9987 | else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN) |
5ab79981 PB |
9988 | { |
9989 | value &= ~(bfd_vma)(1 << 28); | |
9990 | value |= (1 << 24); | |
9991 | } | |
39b41c9c PB |
9992 | } |
9993 | } | |
906e58ca | 9994 | } |
252b5132 | 9995 | break; |
f21f3fe0 | 9996 | |
252b5132 RH |
9997 | case R_ARM_ABS32: |
9998 | value += addend; | |
35fc36a8 | 9999 | if (branch_type == ST_BRANCH_TO_THUMB) |
252b5132 RH |
10000 | value |= 1; |
10001 | break; | |
f21f3fe0 | 10002 | |
bb224fc3 MS |
10003 | case R_ARM_ABS32_NOI: |
10004 | value += addend; | |
10005 | break; | |
10006 | ||
252b5132 | 10007 | case R_ARM_REL32: |
a8bc6c78 | 10008 | value += addend; |
35fc36a8 | 10009 | if (branch_type == ST_BRANCH_TO_THUMB) |
a8bc6c78 | 10010 | value |= 1; |
252b5132 | 10011 | value -= (input_section->output_section->vma |
62efb346 | 10012 | + input_section->output_offset + rel->r_offset); |
252b5132 | 10013 | break; |
eb043451 | 10014 | |
bb224fc3 MS |
10015 | case R_ARM_REL32_NOI: |
10016 | value += addend; | |
10017 | value -= (input_section->output_section->vma | |
10018 | + input_section->output_offset + rel->r_offset); | |
10019 | break; | |
10020 | ||
eb043451 PB |
10021 | case R_ARM_PREL31: |
10022 | value -= (input_section->output_section->vma | |
10023 | + input_section->output_offset + rel->r_offset); | |
10024 | value += signed_addend; | |
10025 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
10026 | { | |
8029a119 | 10027 | /* Check for overflow. */ |
eb043451 PB |
10028 | if ((value ^ (value >> 1)) & (1 << 30)) |
10029 | return bfd_reloc_overflow; | |
10030 | } | |
10031 | value &= 0x7fffffff; | |
10032 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
35fc36a8 | 10033 | if (branch_type == ST_BRANCH_TO_THUMB) |
eb043451 PB |
10034 | value |= 1; |
10035 | break; | |
252b5132 | 10036 | } |
f21f3fe0 | 10037 | |
252b5132 RH |
10038 | bfd_put_32 (input_bfd, value, hit_data); |
10039 | return bfd_reloc_ok; | |
10040 | ||
10041 | case R_ARM_ABS8: | |
fd0fd00c MJ |
10042 | /* PR 16202: Refectch the addend using the correct size. */ |
10043 | if (globals->use_rel) | |
10044 | addend = bfd_get_8 (input_bfd, hit_data); | |
252b5132 | 10045 | value += addend; |
4e67d4ca DG |
10046 | |
10047 | /* There is no way to tell whether the user intended to use a signed or | |
10048 | unsigned addend. When checking for overflow we accept either, | |
10049 | as specified by the AAELF. */ | |
10050 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
10051 | return bfd_reloc_overflow; |
10052 | ||
10053 | bfd_put_8 (input_bfd, value, hit_data); | |
10054 | return bfd_reloc_ok; | |
10055 | ||
10056 | case R_ARM_ABS16: | |
fd0fd00c MJ |
10057 | /* PR 16202: Refectch the addend using the correct size. */ |
10058 | if (globals->use_rel) | |
10059 | addend = bfd_get_16 (input_bfd, hit_data); | |
252b5132 RH |
10060 | value += addend; |
10061 | ||
4e67d4ca DG |
10062 | /* See comment for R_ARM_ABS8. */ |
10063 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
10064 | return bfd_reloc_overflow; |
10065 | ||
10066 | bfd_put_16 (input_bfd, value, hit_data); | |
10067 | return bfd_reloc_ok; | |
10068 | ||
252b5132 | 10069 | case R_ARM_THM_ABS5: |
9b485d32 | 10070 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
10071 | if (globals->use_rel) |
10072 | { | |
10073 | /* Need to refetch addend. */ | |
10074 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
10075 | /* ??? Need to determine shift amount from operand size. */ | |
10076 | addend >>= howto->rightshift; | |
10077 | } | |
252b5132 RH |
10078 | value += addend; |
10079 | ||
10080 | /* ??? Isn't value unsigned? */ | |
10081 | if ((long) value > 0x1f || (long) value < -0x10) | |
10082 | return bfd_reloc_overflow; | |
10083 | ||
10084 | /* ??? Value needs to be properly shifted into place first. */ | |
10085 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
10086 | bfd_put_16 (input_bfd, value, hit_data); | |
10087 | return bfd_reloc_ok; | |
10088 | ||
2cab6cc3 MS |
10089 | case R_ARM_THM_ALU_PREL_11_0: |
10090 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
10091 | { | |
10092 | bfd_vma insn; | |
10093 | bfd_signed_vma relocation; | |
10094 | ||
10095 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 10096 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 10097 | |
99059e56 RM |
10098 | if (globals->use_rel) |
10099 | { | |
10100 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
10101 | | ((insn & (1 << 26)) >> 15); | |
10102 | if (insn & 0xf00000) | |
10103 | signed_addend = -signed_addend; | |
10104 | } | |
2cab6cc3 MS |
10105 | |
10106 | relocation = value + signed_addend; | |
79f08007 | 10107 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10108 | + input_section->output_offset |
10109 | + rel->r_offset); | |
2cab6cc3 | 10110 | |
b6518b38 | 10111 | value = relocation; |
2cab6cc3 | 10112 | |
99059e56 RM |
10113 | if (value >= 0x1000) |
10114 | return bfd_reloc_overflow; | |
2cab6cc3 MS |
10115 | |
10116 | insn = (insn & 0xfb0f8f00) | (value & 0xff) | |
99059e56 RM |
10117 | | ((value & 0x700) << 4) |
10118 | | ((value & 0x800) << 15); | |
10119 | if (relocation < 0) | |
10120 | insn |= 0xa00000; | |
2cab6cc3 MS |
10121 | |
10122 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10123 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10124 | ||
99059e56 | 10125 | return bfd_reloc_ok; |
2cab6cc3 MS |
10126 | } |
10127 | ||
e1ec24c6 NC |
10128 | case R_ARM_THM_PC8: |
10129 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
10130 | but it is supported for compatibility with third party libraries | |
10131 | generated by other compilers, specifically the ARM/IAR. */ | |
10132 | { | |
10133 | bfd_vma insn; | |
10134 | bfd_signed_vma relocation; | |
10135 | ||
10136 | insn = bfd_get_16 (input_bfd, hit_data); | |
10137 | ||
99059e56 | 10138 | if (globals->use_rel) |
79f08007 | 10139 | addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4; |
e1ec24c6 NC |
10140 | |
10141 | relocation = value + addend; | |
79f08007 | 10142 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10143 | + input_section->output_offset |
10144 | + rel->r_offset); | |
e1ec24c6 | 10145 | |
b6518b38 | 10146 | value = relocation; |
e1ec24c6 NC |
10147 | |
10148 | /* We do not check for overflow of this reloc. Although strictly | |
10149 | speaking this is incorrect, it appears to be necessary in order | |
10150 | to work with IAR generated relocs. Since GCC and GAS do not | |
10151 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
10152 | a problem for them. */ | |
10153 | value &= 0x3fc; | |
10154 | ||
10155 | insn = (insn & 0xff00) | (value >> 2); | |
10156 | ||
10157 | bfd_put_16 (input_bfd, insn, hit_data); | |
10158 | ||
99059e56 | 10159 | return bfd_reloc_ok; |
e1ec24c6 NC |
10160 | } |
10161 | ||
2cab6cc3 MS |
10162 | case R_ARM_THM_PC12: |
10163 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
10164 | { | |
10165 | bfd_vma insn; | |
10166 | bfd_signed_vma relocation; | |
10167 | ||
10168 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
99059e56 | 10169 | | bfd_get_16 (input_bfd, hit_data + 2); |
2cab6cc3 | 10170 | |
99059e56 RM |
10171 | if (globals->use_rel) |
10172 | { | |
10173 | signed_addend = insn & 0xfff; | |
10174 | if (!(insn & (1 << 23))) | |
10175 | signed_addend = -signed_addend; | |
10176 | } | |
2cab6cc3 MS |
10177 | |
10178 | relocation = value + signed_addend; | |
79f08007 | 10179 | relocation -= Pa (input_section->output_section->vma |
99059e56 RM |
10180 | + input_section->output_offset |
10181 | + rel->r_offset); | |
2cab6cc3 | 10182 | |
b6518b38 | 10183 | value = relocation; |
2cab6cc3 | 10184 | |
99059e56 RM |
10185 | if (value >= 0x1000) |
10186 | return bfd_reloc_overflow; | |
2cab6cc3 MS |
10187 | |
10188 | insn = (insn & 0xff7ff000) | value; | |
99059e56 RM |
10189 | if (relocation >= 0) |
10190 | insn |= (1 << 23); | |
2cab6cc3 MS |
10191 | |
10192 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
10193 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
10194 | ||
99059e56 | 10195 | return bfd_reloc_ok; |
2cab6cc3 MS |
10196 | } |
10197 | ||
dfc5f959 | 10198 | case R_ARM_THM_XPC22: |
c19d1205 | 10199 | case R_ARM_THM_CALL: |
bd97cb95 | 10200 | case R_ARM_THM_JUMP24: |
dfc5f959 | 10201 | /* Thumb BL (branch long instruction). */ |
252b5132 | 10202 | { |
b34976b6 | 10203 | bfd_vma relocation; |
99059e56 | 10204 | bfd_vma reloc_sign; |
b34976b6 AM |
10205 | bfd_boolean overflow = FALSE; |
10206 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
10207 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
10208 | bfd_signed_vma reloc_signed_max; |
10209 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 10210 | bfd_vma check; |
252b5132 | 10211 | bfd_signed_vma signed_check; |
e95de063 | 10212 | int bitsize; |
cd1dac3d | 10213 | const int thumb2 = using_thumb2 (globals); |
5e866f5a | 10214 | const int thumb2_bl = using_thumb2_bl (globals); |
252b5132 | 10215 | |
5ab79981 | 10216 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
10217 | the next instruction unless a PLT entry will be created. |
10218 | The jump to the next instruction is optimized as a NOP.W for | |
10219 | Thumb-2 enabled architectures. */ | |
19540007 | 10220 | if (h && h->root.type == bfd_link_hash_undefweak |
34e77a92 | 10221 | && plt_offset == (bfd_vma) -1) |
5ab79981 | 10222 | { |
60a019a0 | 10223 | if (thumb2) |
cd1dac3d DG |
10224 | { |
10225 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
10226 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
10227 | } | |
10228 | else | |
10229 | { | |
10230 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
10231 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
10232 | } | |
5ab79981 PB |
10233 | return bfd_reloc_ok; |
10234 | } | |
10235 | ||
e95de063 | 10236 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
99059e56 | 10237 | with Thumb-1) involving the J1 and J2 bits. */ |
4e7fd91e PB |
10238 | if (globals->use_rel) |
10239 | { | |
99059e56 RM |
10240 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
10241 | bfd_vma upper = upper_insn & 0x3ff; | |
10242 | bfd_vma lower = lower_insn & 0x7ff; | |
e95de063 MS |
10243 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; |
10244 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
99059e56 RM |
10245 | bfd_vma i1 = j1 ^ s ? 0 : 1; |
10246 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
e95de063 | 10247 | |
99059e56 RM |
10248 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); |
10249 | /* Sign extend. */ | |
10250 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
e95de063 | 10251 | |
4e7fd91e PB |
10252 | signed_addend = addend; |
10253 | } | |
cb1afa5c | 10254 | |
dfc5f959 NC |
10255 | if (r_type == R_ARM_THM_XPC22) |
10256 | { | |
10257 | /* Check for Thumb to Thumb call. */ | |
10258 | /* FIXME: Should we translate the instruction into a BL | |
10259 | instruction instead ? */ | |
35fc36a8 | 10260 | if (branch_type == ST_BRANCH_TO_THUMB) |
d003868e AM |
10261 | (*_bfd_error_handler) |
10262 | (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."), | |
10263 | input_bfd, | |
10264 | h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
10265 | } |
10266 | else | |
252b5132 | 10267 | { |
dfc5f959 NC |
10268 | /* If it is not a call to Thumb, assume call to Arm. |
10269 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
10270 | function call at all, but rather a long jump. Calls through |
10271 | the PLT do not require stubs. */ | |
34e77a92 | 10272 | if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1) |
dfc5f959 | 10273 | { |
bd97cb95 | 10274 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
10275 | { |
10276 | /* Convert BL to BLX. */ | |
10277 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
10278 | } | |
155d87d7 CL |
10279 | else if (( r_type != R_ARM_THM_CALL) |
10280 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
10281 | { |
10282 | if (elf32_thumb_to_arm_stub | |
10283 | (info, sym_name, input_bfd, output_bfd, input_section, | |
10284 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
10285 | error_message)) | |
10286 | return bfd_reloc_ok; | |
10287 | else | |
10288 | return bfd_reloc_dangerous; | |
10289 | } | |
da5938a2 | 10290 | } |
35fc36a8 RS |
10291 | else if (branch_type == ST_BRANCH_TO_THUMB |
10292 | && globals->use_blx | |
bd97cb95 | 10293 | && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
10294 | { |
10295 | /* Make sure this is a BL. */ | |
10296 | lower_insn |= 0x1800; | |
10297 | } | |
252b5132 | 10298 | } |
f21f3fe0 | 10299 | |
fe33d2fa | 10300 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
155d87d7 | 10301 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
10302 | { |
10303 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 10304 | is too far. */ |
fe33d2fa CL |
10305 | struct elf32_arm_stub_hash_entry *stub_entry; |
10306 | struct elf32_arm_link_hash_entry *hash; | |
10307 | ||
10308 | hash = (struct elf32_arm_link_hash_entry *) h; | |
10309 | ||
10310 | stub_type = arm_type_of_stub (info, input_section, rel, | |
34e77a92 RS |
10311 | st_type, &branch_type, |
10312 | hash, value, sym_sec, | |
fe33d2fa CL |
10313 | input_bfd, sym_name); |
10314 | ||
10315 | if (stub_type != arm_stub_none) | |
906e58ca NC |
10316 | { |
10317 | /* The target is out of reach or we are changing modes, so | |
10318 | redirect the branch to the local stub for this | |
10319 | function. */ | |
10320 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
10321 | sym_sec, h, | |
fe33d2fa CL |
10322 | rel, globals, |
10323 | stub_type); | |
906e58ca | 10324 | if (stub_entry != NULL) |
9cd3e4e5 NC |
10325 | { |
10326 | value = (stub_entry->stub_offset | |
10327 | + stub_entry->stub_sec->output_offset | |
10328 | + stub_entry->stub_sec->output_section->vma); | |
10329 | ||
10330 | if (plt_offset != (bfd_vma) -1) | |
10331 | *unresolved_reloc_p = FALSE; | |
10332 | } | |
906e58ca | 10333 | |
f4ac8484 | 10334 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 10335 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
10336 | { |
10337 | if ((stub_entry | |
10338 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
35fc36a8 | 10339 | || branch_type != ST_BRANCH_TO_THUMB) |
f4ac8484 DJ |
10340 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
10341 | } | |
906e58ca NC |
10342 | } |
10343 | } | |
10344 | ||
fe33d2fa | 10345 | /* Handle calls via the PLT. */ |
34e77a92 | 10346 | if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1) |
fe33d2fa CL |
10347 | { |
10348 | value = (splt->output_section->vma | |
10349 | + splt->output_offset | |
34e77a92 | 10350 | + plt_offset); |
fe33d2fa | 10351 | |
eed94f8f NC |
10352 | if (globals->use_blx |
10353 | && r_type == R_ARM_THM_CALL | |
10354 | && ! using_thumb_only (globals)) | |
fe33d2fa CL |
10355 | { |
10356 | /* If the Thumb BLX instruction is available, convert | |
10357 | the BL to a BLX instruction to call the ARM-mode | |
10358 | PLT entry. */ | |
10359 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
35fc36a8 | 10360 | branch_type = ST_BRANCH_TO_ARM; |
fe33d2fa CL |
10361 | } |
10362 | else | |
10363 | { | |
eed94f8f NC |
10364 | if (! using_thumb_only (globals)) |
10365 | /* Target the Thumb stub before the ARM PLT entry. */ | |
10366 | value -= PLT_THUMB_STUB_SIZE; | |
35fc36a8 | 10367 | branch_type = ST_BRANCH_TO_THUMB; |
fe33d2fa CL |
10368 | } |
10369 | *unresolved_reloc_p = FALSE; | |
10370 | } | |
10371 | ||
ba96a88f | 10372 | relocation = value + signed_addend; |
f21f3fe0 | 10373 | |
252b5132 | 10374 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
10375 | + input_section->output_offset |
10376 | + rel->r_offset); | |
9a5aca8c | 10377 | |
252b5132 RH |
10378 | check = relocation >> howto->rightshift; |
10379 | ||
10380 | /* If this is a signed value, the rightshift just dropped | |
10381 | leading 1 bits (assuming twos complement). */ | |
10382 | if ((bfd_signed_vma) relocation >= 0) | |
10383 | signed_check = check; | |
10384 | else | |
10385 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
10386 | ||
e95de063 MS |
10387 | /* Calculate the permissable maximum and minimum values for |
10388 | this relocation according to whether we're relocating for | |
10389 | Thumb-2 or not. */ | |
10390 | bitsize = howto->bitsize; | |
5e866f5a | 10391 | if (!thumb2_bl) |
e95de063 | 10392 | bitsize -= 2; |
f6ebfac0 | 10393 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
10394 | reloc_signed_min = ~reloc_signed_max; |
10395 | ||
252b5132 | 10396 | /* Assumes two's complement. */ |
ba96a88f | 10397 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
b34976b6 | 10398 | overflow = TRUE; |
252b5132 | 10399 | |
bd97cb95 | 10400 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
10401 | /* For a BLX instruction, make sure that the relocation is rounded up |
10402 | to a word boundary. This follows the semantics of the instruction | |
10403 | which specifies that bit 1 of the target address will come from bit | |
10404 | 1 of the base address. */ | |
10405 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 10406 | |
e95de063 MS |
10407 | /* Put RELOCATION back into the insn. Assumes two's complement. |
10408 | We use the Thumb-2 encoding, which is safe even if dealing with | |
10409 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
99059e56 | 10410 | reloc_sign = (signed_check < 0) ? 1 : 0; |
e95de063 | 10411 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) |
99059e56 RM |
10412 | | ((relocation >> 12) & 0x3ff) |
10413 | | (reloc_sign << 10); | |
906e58ca | 10414 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
99059e56 RM |
10415 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
10416 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
10417 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 10418 | |
252b5132 RH |
10419 | /* Put the relocated value back in the object file: */ |
10420 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
10421 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
10422 | ||
10423 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
10424 | } | |
10425 | break; | |
10426 | ||
c19d1205 ZW |
10427 | case R_ARM_THM_JUMP19: |
10428 | /* Thumb32 conditional branch instruction. */ | |
10429 | { | |
10430 | bfd_vma relocation; | |
10431 | bfd_boolean overflow = FALSE; | |
10432 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
10433 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
10434 | bfd_signed_vma reloc_signed_max = 0xffffe; |
10435 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 | 10436 | bfd_signed_vma signed_check; |
c5423981 TG |
10437 | enum elf32_arm_stub_type stub_type = arm_stub_none; |
10438 | struct elf32_arm_stub_hash_entry *stub_entry; | |
10439 | struct elf32_arm_link_hash_entry *hash; | |
c19d1205 ZW |
10440 | |
10441 | /* Need to refetch the addend, reconstruct the top three bits, | |
10442 | and squish the two 11 bit pieces together. */ | |
10443 | if (globals->use_rel) | |
10444 | { | |
10445 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 10446 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
10447 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
10448 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
10449 | bfd_vma lower = (lower_insn & 0x07ff); | |
10450 | ||
a00a1f35 MS |
10451 | upper |= J1 << 6; |
10452 | upper |= J2 << 7; | |
10453 | upper |= (!S) << 8; | |
c19d1205 ZW |
10454 | upper -= 0x0100; /* Sign extend. */ |
10455 | ||
10456 | addend = (upper << 12) | (lower << 1); | |
10457 | signed_addend = addend; | |
10458 | } | |
10459 | ||
bd97cb95 | 10460 | /* Handle calls via the PLT. */ |
34e77a92 | 10461 | if (plt_offset != (bfd_vma) -1) |
bd97cb95 DJ |
10462 | { |
10463 | value = (splt->output_section->vma | |
10464 | + splt->output_offset | |
34e77a92 | 10465 | + plt_offset); |
bd97cb95 DJ |
10466 | /* Target the Thumb stub before the ARM PLT entry. */ |
10467 | value -= PLT_THUMB_STUB_SIZE; | |
10468 | *unresolved_reloc_p = FALSE; | |
10469 | } | |
10470 | ||
c5423981 TG |
10471 | hash = (struct elf32_arm_link_hash_entry *)h; |
10472 | ||
10473 | stub_type = arm_type_of_stub (info, input_section, rel, | |
10474 | st_type, &branch_type, | |
10475 | hash, value, sym_sec, | |
10476 | input_bfd, sym_name); | |
10477 | if (stub_type != arm_stub_none) | |
10478 | { | |
10479 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
10480 | sym_sec, h, | |
10481 | rel, globals, | |
10482 | stub_type); | |
10483 | if (stub_entry != NULL) | |
10484 | { | |
10485 | value = (stub_entry->stub_offset | |
10486 | + stub_entry->stub_sec->output_offset | |
10487 | + stub_entry->stub_sec->output_section->vma); | |
10488 | } | |
10489 | } | |
c19d1205 | 10490 | |
99059e56 | 10491 | relocation = value + signed_addend; |
c19d1205 ZW |
10492 | relocation -= (input_section->output_section->vma |
10493 | + input_section->output_offset | |
10494 | + rel->r_offset); | |
a00a1f35 | 10495 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 10496 | |
c19d1205 ZW |
10497 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
10498 | overflow = TRUE; | |
10499 | ||
10500 | /* Put RELOCATION back into the insn. */ | |
10501 | { | |
10502 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
10503 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
10504 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
10505 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
10506 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
10507 | ||
a00a1f35 | 10508 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
10509 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
10510 | } | |
10511 | ||
10512 | /* Put the relocated value back in the object file: */ | |
10513 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
10514 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
10515 | ||
10516 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
10517 | } | |
10518 | ||
10519 | case R_ARM_THM_JUMP11: | |
10520 | case R_ARM_THM_JUMP8: | |
10521 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
10522 | /* Thumb B (branch) instruction). */ |
10523 | { | |
6cf9e9fe | 10524 | bfd_signed_vma relocation; |
51c5503b NC |
10525 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
10526 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
10527 | bfd_signed_vma signed_check; |
10528 | ||
c19d1205 ZW |
10529 | /* CZB cannot jump backward. */ |
10530 | if (r_type == R_ARM_THM_JUMP6) | |
10531 | reloc_signed_min = 0; | |
10532 | ||
4e7fd91e | 10533 | if (globals->use_rel) |
6cf9e9fe | 10534 | { |
4e7fd91e PB |
10535 | /* Need to refetch addend. */ |
10536 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
10537 | if (addend & ((howto->src_mask + 1) >> 1)) | |
10538 | { | |
10539 | signed_addend = -1; | |
10540 | signed_addend &= ~ howto->src_mask; | |
10541 | signed_addend |= addend; | |
10542 | } | |
10543 | else | |
10544 | signed_addend = addend; | |
10545 | /* The value in the insn has been right shifted. We need to | |
10546 | undo this, so that we can perform the address calculation | |
10547 | in terms of bytes. */ | |
10548 | signed_addend <<= howto->rightshift; | |
6cf9e9fe | 10549 | } |
6cf9e9fe | 10550 | relocation = value + signed_addend; |
51c5503b NC |
10551 | |
10552 | relocation -= (input_section->output_section->vma | |
10553 | + input_section->output_offset | |
10554 | + rel->r_offset); | |
10555 | ||
6cf9e9fe NC |
10556 | relocation >>= howto->rightshift; |
10557 | signed_check = relocation; | |
c19d1205 ZW |
10558 | |
10559 | if (r_type == R_ARM_THM_JUMP6) | |
10560 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
10561 | else | |
10562 | relocation &= howto->dst_mask; | |
51c5503b | 10563 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 10564 | |
51c5503b NC |
10565 | bfd_put_16 (input_bfd, relocation, hit_data); |
10566 | ||
10567 | /* Assumes two's complement. */ | |
10568 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
10569 | return bfd_reloc_overflow; | |
10570 | ||
10571 | return bfd_reloc_ok; | |
10572 | } | |
cedb70c5 | 10573 | |
8375c36b PB |
10574 | case R_ARM_ALU_PCREL7_0: |
10575 | case R_ARM_ALU_PCREL15_8: | |
10576 | case R_ARM_ALU_PCREL23_15: | |
10577 | { | |
10578 | bfd_vma insn; | |
10579 | bfd_vma relocation; | |
10580 | ||
10581 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
10582 | if (globals->use_rel) |
10583 | { | |
10584 | /* Extract the addend. */ | |
10585 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
10586 | signed_addend = addend; | |
10587 | } | |
8375c36b PB |
10588 | relocation = value + signed_addend; |
10589 | ||
10590 | relocation -= (input_section->output_section->vma | |
10591 | + input_section->output_offset | |
10592 | + rel->r_offset); | |
10593 | insn = (insn & ~0xfff) | |
10594 | | ((howto->bitpos << 7) & 0xf00) | |
10595 | | ((relocation >> howto->bitpos) & 0xff); | |
10596 | bfd_put_32 (input_bfd, value, hit_data); | |
10597 | } | |
10598 | return bfd_reloc_ok; | |
10599 | ||
252b5132 RH |
10600 | case R_ARM_GNU_VTINHERIT: |
10601 | case R_ARM_GNU_VTENTRY: | |
10602 | return bfd_reloc_ok; | |
10603 | ||
c19d1205 | 10604 | case R_ARM_GOTOFF32: |
252b5132 | 10605 | /* Relocation is relative to the start of the |
99059e56 | 10606 | global offset table. */ |
252b5132 RH |
10607 | |
10608 | BFD_ASSERT (sgot != NULL); | |
10609 | if (sgot == NULL) | |
99059e56 | 10610 | return bfd_reloc_notsupported; |
9a5aca8c | 10611 | |
cedb70c5 | 10612 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
10613 | address by one, so that attempts to call the function pointer will |
10614 | correctly interpret it as Thumb code. */ | |
35fc36a8 | 10615 | if (branch_type == ST_BRANCH_TO_THUMB) |
ee29b9fb RE |
10616 | value += 1; |
10617 | ||
252b5132 | 10618 | /* Note that sgot->output_offset is not involved in this |
99059e56 RM |
10619 | calculation. We always want the start of .got. If we |
10620 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
10621 | permitted by the ABI, we might have to change this | |
10622 | calculation. */ | |
252b5132 | 10623 | value -= sgot->output_section->vma; |
f21f3fe0 | 10624 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 10625 | contents, rel->r_offset, value, |
00a97672 | 10626 | rel->r_addend); |
252b5132 RH |
10627 | |
10628 | case R_ARM_GOTPC: | |
a7c10850 | 10629 | /* Use global offset table as symbol value. */ |
252b5132 | 10630 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 10631 | |
252b5132 | 10632 | if (sgot == NULL) |
99059e56 | 10633 | return bfd_reloc_notsupported; |
252b5132 | 10634 | |
0945cdfd | 10635 | *unresolved_reloc_p = FALSE; |
252b5132 | 10636 | value = sgot->output_section->vma; |
f21f3fe0 | 10637 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 10638 | contents, rel->r_offset, value, |
00a97672 | 10639 | rel->r_addend); |
f21f3fe0 | 10640 | |
252b5132 | 10641 | case R_ARM_GOT32: |
eb043451 | 10642 | case R_ARM_GOT_PREL: |
252b5132 | 10643 | /* Relocation is to the entry for this symbol in the |
99059e56 | 10644 | global offset table. */ |
252b5132 RH |
10645 | if (sgot == NULL) |
10646 | return bfd_reloc_notsupported; | |
f21f3fe0 | 10647 | |
34e77a92 RS |
10648 | if (dynreloc_st_type == STT_GNU_IFUNC |
10649 | && plt_offset != (bfd_vma) -1 | |
10650 | && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h))) | |
10651 | { | |
10652 | /* We have a relocation against a locally-binding STT_GNU_IFUNC | |
10653 | symbol, and the relocation resolves directly to the runtime | |
10654 | target rather than to the .iplt entry. This means that any | |
10655 | .got entry would be the same value as the .igot.plt entry, | |
10656 | so there's no point creating both. */ | |
10657 | sgot = globals->root.igotplt; | |
10658 | value = sgot->output_offset + gotplt_offset; | |
10659 | } | |
10660 | else if (h != NULL) | |
252b5132 RH |
10661 | { |
10662 | bfd_vma off; | |
f21f3fe0 | 10663 | |
252b5132 RH |
10664 | off = h->got.offset; |
10665 | BFD_ASSERT (off != (bfd_vma) -1); | |
b436d854 | 10666 | if ((off & 1) != 0) |
252b5132 | 10667 | { |
b436d854 RS |
10668 | /* We have already processsed one GOT relocation against |
10669 | this symbol. */ | |
10670 | off &= ~1; | |
10671 | if (globals->root.dynamic_sections_created | |
10672 | && !SYMBOL_REFERENCES_LOCAL (info, h)) | |
10673 | *unresolved_reloc_p = FALSE; | |
10674 | } | |
10675 | else | |
10676 | { | |
10677 | Elf_Internal_Rela outrel; | |
10678 | ||
6f820c85 | 10679 | if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h)) |
b436d854 RS |
10680 | { |
10681 | /* If the symbol doesn't resolve locally in a static | |
10682 | object, we have an undefined reference. If the | |
10683 | symbol doesn't resolve locally in a dynamic object, | |
10684 | it should be resolved by the dynamic linker. */ | |
10685 | if (globals->root.dynamic_sections_created) | |
10686 | { | |
10687 | outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); | |
10688 | *unresolved_reloc_p = FALSE; | |
10689 | } | |
10690 | else | |
10691 | outrel.r_info = 0; | |
10692 | outrel.r_addend = 0; | |
10693 | } | |
252b5132 RH |
10694 | else |
10695 | { | |
34e77a92 | 10696 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 10697 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
0e1862bb | 10698 | else if (bfd_link_pic (info) && |
31943882 WN |
10699 | (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
10700 | || h->root.type != bfd_link_hash_undefweak)) | |
99059e56 RM |
10701 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
10702 | else | |
10703 | outrel.r_info = 0; | |
34e77a92 | 10704 | outrel.r_addend = dynreloc_value; |
b436d854 | 10705 | } |
ee29b9fb | 10706 | |
b436d854 RS |
10707 | /* The GOT entry is initialized to zero by default. |
10708 | See if we should install a different value. */ | |
10709 | if (outrel.r_addend != 0 | |
10710 | && (outrel.r_info == 0 || globals->use_rel)) | |
10711 | { | |
10712 | bfd_put_32 (output_bfd, outrel.r_addend, | |
10713 | sgot->contents + off); | |
10714 | outrel.r_addend = 0; | |
252b5132 | 10715 | } |
f21f3fe0 | 10716 | |
b436d854 RS |
10717 | if (outrel.r_info != 0) |
10718 | { | |
10719 | outrel.r_offset = (sgot->output_section->vma | |
10720 | + sgot->output_offset | |
10721 | + off); | |
10722 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); | |
10723 | } | |
10724 | h->got.offset |= 1; | |
10725 | } | |
252b5132 RH |
10726 | value = sgot->output_offset + off; |
10727 | } | |
10728 | else | |
10729 | { | |
10730 | bfd_vma off; | |
f21f3fe0 | 10731 | |
252b5132 RH |
10732 | BFD_ASSERT (local_got_offsets != NULL && |
10733 | local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 10734 | |
252b5132 | 10735 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 10736 | |
252b5132 RH |
10737 | /* The offset must always be a multiple of 4. We use the |
10738 | least significant bit to record whether we have already | |
9b485d32 | 10739 | generated the necessary reloc. */ |
252b5132 RH |
10740 | if ((off & 1) != 0) |
10741 | off &= ~1; | |
10742 | else | |
10743 | { | |
00a97672 | 10744 | if (globals->use_rel) |
34e77a92 | 10745 | bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off); |
f21f3fe0 | 10746 | |
0e1862bb | 10747 | if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC) |
252b5132 | 10748 | { |
947216bf | 10749 | Elf_Internal_Rela outrel; |
f21f3fe0 | 10750 | |
34e77a92 | 10751 | outrel.r_addend = addend + dynreloc_value; |
252b5132 | 10752 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 10753 | + sgot->output_offset |
252b5132 | 10754 | + off); |
34e77a92 | 10755 | if (dynreloc_st_type == STT_GNU_IFUNC) |
99059e56 | 10756 | outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE); |
34e77a92 RS |
10757 | else |
10758 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
47beaa6a | 10759 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
252b5132 | 10760 | } |
f21f3fe0 | 10761 | |
252b5132 RH |
10762 | local_got_offsets[r_symndx] |= 1; |
10763 | } | |
f21f3fe0 | 10764 | |
252b5132 RH |
10765 | value = sgot->output_offset + off; |
10766 | } | |
eb043451 PB |
10767 | if (r_type != R_ARM_GOT32) |
10768 | value += sgot->output_section->vma; | |
9a5aca8c | 10769 | |
f21f3fe0 | 10770 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 10771 | contents, rel->r_offset, value, |
00a97672 | 10772 | rel->r_addend); |
f21f3fe0 | 10773 | |
ba93b8ac DJ |
10774 | case R_ARM_TLS_LDO32: |
10775 | value = value - dtpoff_base (info); | |
10776 | ||
10777 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
10778 | contents, rel->r_offset, value, |
10779 | rel->r_addend); | |
ba93b8ac DJ |
10780 | |
10781 | case R_ARM_TLS_LDM32: | |
10782 | { | |
10783 | bfd_vma off; | |
10784 | ||
362d30a1 | 10785 | if (sgot == NULL) |
ba93b8ac DJ |
10786 | abort (); |
10787 | ||
10788 | off = globals->tls_ldm_got.offset; | |
10789 | ||
10790 | if ((off & 1) != 0) | |
10791 | off &= ~1; | |
10792 | else | |
10793 | { | |
10794 | /* If we don't know the module number, create a relocation | |
10795 | for it. */ | |
0e1862bb | 10796 | if (bfd_link_pic (info)) |
ba93b8ac DJ |
10797 | { |
10798 | Elf_Internal_Rela outrel; | |
ba93b8ac | 10799 | |
362d30a1 | 10800 | if (srelgot == NULL) |
ba93b8ac DJ |
10801 | abort (); |
10802 | ||
00a97672 | 10803 | outrel.r_addend = 0; |
362d30a1 RS |
10804 | outrel.r_offset = (sgot->output_section->vma |
10805 | + sgot->output_offset + off); | |
ba93b8ac DJ |
10806 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); |
10807 | ||
00a97672 RS |
10808 | if (globals->use_rel) |
10809 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10810 | sgot->contents + off); |
ba93b8ac | 10811 | |
47beaa6a | 10812 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
10813 | } |
10814 | else | |
362d30a1 | 10815 | bfd_put_32 (output_bfd, 1, sgot->contents + off); |
ba93b8ac DJ |
10816 | |
10817 | globals->tls_ldm_got.offset |= 1; | |
10818 | } | |
10819 | ||
362d30a1 | 10820 | value = sgot->output_section->vma + sgot->output_offset + off |
ba93b8ac DJ |
10821 | - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); |
10822 | ||
10823 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
10824 | contents, rel->r_offset, value, | |
00a97672 | 10825 | rel->r_addend); |
ba93b8ac DJ |
10826 | } |
10827 | ||
0855e32b NS |
10828 | case R_ARM_TLS_CALL: |
10829 | case R_ARM_THM_TLS_CALL: | |
ba93b8ac DJ |
10830 | case R_ARM_TLS_GD32: |
10831 | case R_ARM_TLS_IE32: | |
0855e32b NS |
10832 | case R_ARM_TLS_GOTDESC: |
10833 | case R_ARM_TLS_DESCSEQ: | |
10834 | case R_ARM_THM_TLS_DESCSEQ: | |
ba93b8ac | 10835 | { |
0855e32b NS |
10836 | bfd_vma off, offplt; |
10837 | int indx = 0; | |
ba93b8ac DJ |
10838 | char tls_type; |
10839 | ||
0855e32b | 10840 | BFD_ASSERT (sgot != NULL); |
ba93b8ac | 10841 | |
ba93b8ac DJ |
10842 | if (h != NULL) |
10843 | { | |
10844 | bfd_boolean dyn; | |
10845 | dyn = globals->root.dynamic_sections_created; | |
0e1862bb L |
10846 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
10847 | bfd_link_pic (info), | |
10848 | h) | |
10849 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
10850 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
10851 | { | |
10852 | *unresolved_reloc_p = FALSE; | |
10853 | indx = h->dynindx; | |
10854 | } | |
10855 | off = h->got.offset; | |
0855e32b | 10856 | offplt = elf32_arm_hash_entry (h)->tlsdesc_got; |
ba93b8ac DJ |
10857 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; |
10858 | } | |
10859 | else | |
10860 | { | |
0855e32b | 10861 | BFD_ASSERT (local_got_offsets != NULL); |
ba93b8ac | 10862 | off = local_got_offsets[r_symndx]; |
0855e32b | 10863 | offplt = local_tlsdesc_gotents[r_symndx]; |
ba93b8ac DJ |
10864 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; |
10865 | } | |
10866 | ||
0855e32b | 10867 | /* Linker relaxations happens from one of the |
b38cadfb | 10868 | R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */ |
0855e32b | 10869 | if (ELF32_R_TYPE(rel->r_info) != r_type) |
b38cadfb | 10870 | tls_type = GOT_TLS_IE; |
0855e32b NS |
10871 | |
10872 | BFD_ASSERT (tls_type != GOT_UNKNOWN); | |
ba93b8ac DJ |
10873 | |
10874 | if ((off & 1) != 0) | |
10875 | off &= ~1; | |
10876 | else | |
10877 | { | |
10878 | bfd_boolean need_relocs = FALSE; | |
10879 | Elf_Internal_Rela outrel; | |
ba93b8ac DJ |
10880 | int cur_off = off; |
10881 | ||
10882 | /* The GOT entries have not been initialized yet. Do it | |
10883 | now, and emit any relocations. If both an IE GOT and a | |
10884 | GD GOT are necessary, we emit the GD first. */ | |
10885 | ||
0e1862bb | 10886 | if ((bfd_link_pic (info) || indx != 0) |
ba93b8ac DJ |
10887 | && (h == NULL |
10888 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
10889 | || h->root.type != bfd_link_hash_undefweak)) | |
10890 | { | |
10891 | need_relocs = TRUE; | |
0855e32b | 10892 | BFD_ASSERT (srelgot != NULL); |
ba93b8ac DJ |
10893 | } |
10894 | ||
0855e32b NS |
10895 | if (tls_type & GOT_TLS_GDESC) |
10896 | { | |
47beaa6a RS |
10897 | bfd_byte *loc; |
10898 | ||
0855e32b NS |
10899 | /* We should have relaxed, unless this is an undefined |
10900 | weak symbol. */ | |
10901 | BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak)) | |
0e1862bb | 10902 | || bfd_link_pic (info)); |
0855e32b | 10903 | BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8 |
99059e56 | 10904 | <= globals->root.sgotplt->size); |
0855e32b NS |
10905 | |
10906 | outrel.r_addend = 0; | |
10907 | outrel.r_offset = (globals->root.sgotplt->output_section->vma | |
10908 | + globals->root.sgotplt->output_offset | |
10909 | + offplt | |
10910 | + globals->sgotplt_jump_table_size); | |
b38cadfb | 10911 | |
0855e32b NS |
10912 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC); |
10913 | sreloc = globals->root.srelplt; | |
10914 | loc = sreloc->contents; | |
10915 | loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals); | |
10916 | BFD_ASSERT (loc + RELOC_SIZE (globals) | |
99059e56 | 10917 | <= sreloc->contents + sreloc->size); |
0855e32b NS |
10918 | |
10919 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
10920 | ||
10921 | /* For globals, the first word in the relocation gets | |
10922 | the relocation index and the top bit set, or zero, | |
10923 | if we're binding now. For locals, it gets the | |
10924 | symbol's offset in the tls section. */ | |
99059e56 | 10925 | bfd_put_32 (output_bfd, |
0855e32b NS |
10926 | !h ? value - elf_hash_table (info)->tls_sec->vma |
10927 | : info->flags & DF_BIND_NOW ? 0 | |
10928 | : 0x80000000 | ELF32_R_SYM (outrel.r_info), | |
b38cadfb NC |
10929 | globals->root.sgotplt->contents + offplt |
10930 | + globals->sgotplt_jump_table_size); | |
10931 | ||
0855e32b | 10932 | /* Second word in the relocation is always zero. */ |
99059e56 | 10933 | bfd_put_32 (output_bfd, 0, |
b38cadfb NC |
10934 | globals->root.sgotplt->contents + offplt |
10935 | + globals->sgotplt_jump_table_size + 4); | |
0855e32b | 10936 | } |
ba93b8ac DJ |
10937 | if (tls_type & GOT_TLS_GD) |
10938 | { | |
10939 | if (need_relocs) | |
10940 | { | |
00a97672 | 10941 | outrel.r_addend = 0; |
362d30a1 RS |
10942 | outrel.r_offset = (sgot->output_section->vma |
10943 | + sgot->output_offset | |
00a97672 | 10944 | + cur_off); |
ba93b8ac | 10945 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 10946 | |
00a97672 RS |
10947 | if (globals->use_rel) |
10948 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10949 | sgot->contents + cur_off); |
00a97672 | 10950 | |
47beaa6a | 10951 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
10952 | |
10953 | if (indx == 0) | |
10954 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
362d30a1 | 10955 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
10956 | else |
10957 | { | |
00a97672 | 10958 | outrel.r_addend = 0; |
ba93b8ac DJ |
10959 | outrel.r_info = ELF32_R_INFO (indx, |
10960 | R_ARM_TLS_DTPOFF32); | |
10961 | outrel.r_offset += 4; | |
00a97672 RS |
10962 | |
10963 | if (globals->use_rel) | |
10964 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 10965 | sgot->contents + cur_off + 4); |
00a97672 | 10966 | |
47beaa6a RS |
10967 | elf32_arm_add_dynreloc (output_bfd, info, |
10968 | srelgot, &outrel); | |
ba93b8ac DJ |
10969 | } |
10970 | } | |
10971 | else | |
10972 | { | |
10973 | /* If we are not emitting relocations for a | |
10974 | general dynamic reference, then we must be in a | |
10975 | static link or an executable link with the | |
10976 | symbol binding locally. Mark it as belonging | |
10977 | to module 1, the executable. */ | |
10978 | bfd_put_32 (output_bfd, 1, | |
362d30a1 | 10979 | sgot->contents + cur_off); |
ba93b8ac | 10980 | bfd_put_32 (output_bfd, value - dtpoff_base (info), |
362d30a1 | 10981 | sgot->contents + cur_off + 4); |
ba93b8ac DJ |
10982 | } |
10983 | ||
10984 | cur_off += 8; | |
10985 | } | |
10986 | ||
10987 | if (tls_type & GOT_TLS_IE) | |
10988 | { | |
10989 | if (need_relocs) | |
10990 | { | |
00a97672 RS |
10991 | if (indx == 0) |
10992 | outrel.r_addend = value - dtpoff_base (info); | |
10993 | else | |
10994 | outrel.r_addend = 0; | |
362d30a1 RS |
10995 | outrel.r_offset = (sgot->output_section->vma |
10996 | + sgot->output_offset | |
ba93b8ac DJ |
10997 | + cur_off); |
10998 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
10999 | ||
00a97672 RS |
11000 | if (globals->use_rel) |
11001 | bfd_put_32 (output_bfd, outrel.r_addend, | |
362d30a1 | 11002 | sgot->contents + cur_off); |
ba93b8ac | 11003 | |
47beaa6a | 11004 | elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel); |
ba93b8ac DJ |
11005 | } |
11006 | else | |
11007 | bfd_put_32 (output_bfd, tpoff (info, value), | |
362d30a1 | 11008 | sgot->contents + cur_off); |
ba93b8ac DJ |
11009 | cur_off += 4; |
11010 | } | |
11011 | ||
11012 | if (h != NULL) | |
11013 | h->got.offset |= 1; | |
11014 | else | |
11015 | local_got_offsets[r_symndx] |= 1; | |
11016 | } | |
11017 | ||
11018 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32) | |
11019 | off += 8; | |
0855e32b NS |
11020 | else if (tls_type & GOT_TLS_GDESC) |
11021 | off = offplt; | |
11022 | ||
11023 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL | |
11024 | || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL) | |
11025 | { | |
11026 | bfd_signed_vma offset; | |
12352d3f PB |
11027 | /* TLS stubs are arm mode. The original symbol is a |
11028 | data object, so branch_type is bogus. */ | |
11029 | branch_type = ST_BRANCH_TO_ARM; | |
0855e32b | 11030 | enum elf32_arm_stub_type stub_type |
34e77a92 RS |
11031 | = arm_type_of_stub (info, input_section, rel, |
11032 | st_type, &branch_type, | |
0855e32b NS |
11033 | (struct elf32_arm_link_hash_entry *)h, |
11034 | globals->tls_trampoline, globals->root.splt, | |
11035 | input_bfd, sym_name); | |
11036 | ||
11037 | if (stub_type != arm_stub_none) | |
11038 | { | |
11039 | struct elf32_arm_stub_hash_entry *stub_entry | |
11040 | = elf32_arm_get_stub_entry | |
11041 | (input_section, globals->root.splt, 0, rel, | |
11042 | globals, stub_type); | |
11043 | offset = (stub_entry->stub_offset | |
11044 | + stub_entry->stub_sec->output_offset | |
11045 | + stub_entry->stub_sec->output_section->vma); | |
11046 | } | |
11047 | else | |
11048 | offset = (globals->root.splt->output_section->vma | |
11049 | + globals->root.splt->output_offset | |
11050 | + globals->tls_trampoline); | |
11051 | ||
11052 | if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL) | |
11053 | { | |
11054 | unsigned long inst; | |
b38cadfb NC |
11055 | |
11056 | offset -= (input_section->output_section->vma | |
11057 | + input_section->output_offset | |
11058 | + rel->r_offset + 8); | |
0855e32b NS |
11059 | |
11060 | inst = offset >> 2; | |
11061 | inst &= 0x00ffffff; | |
11062 | value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000); | |
11063 | } | |
11064 | else | |
11065 | { | |
11066 | /* Thumb blx encodes the offset in a complicated | |
11067 | fashion. */ | |
11068 | unsigned upper_insn, lower_insn; | |
11069 | unsigned neg; | |
11070 | ||
b38cadfb NC |
11071 | offset -= (input_section->output_section->vma |
11072 | + input_section->output_offset | |
0855e32b | 11073 | + rel->r_offset + 4); |
b38cadfb | 11074 | |
12352d3f PB |
11075 | if (stub_type != arm_stub_none |
11076 | && arm_stub_is_thumb (stub_type)) | |
11077 | { | |
11078 | lower_insn = 0xd000; | |
11079 | } | |
11080 | else | |
11081 | { | |
11082 | lower_insn = 0xc000; | |
6a631e86 | 11083 | /* Round up the offset to a word boundary. */ |
12352d3f PB |
11084 | offset = (offset + 2) & ~2; |
11085 | } | |
11086 | ||
0855e32b NS |
11087 | neg = offset < 0; |
11088 | upper_insn = (0xf000 | |
11089 | | ((offset >> 12) & 0x3ff) | |
11090 | | (neg << 10)); | |
12352d3f | 11091 | lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13) |
0855e32b | 11092 | | (((!((offset >> 22) & 1)) ^ neg) << 11) |
12352d3f | 11093 | | ((offset >> 1) & 0x7ff); |
0855e32b NS |
11094 | bfd_put_16 (input_bfd, upper_insn, hit_data); |
11095 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
11096 | return bfd_reloc_ok; | |
11097 | } | |
11098 | } | |
11099 | /* These relocations needs special care, as besides the fact | |
11100 | they point somewhere in .gotplt, the addend must be | |
11101 | adjusted accordingly depending on the type of instruction | |
6a631e86 | 11102 | we refer to. */ |
0855e32b NS |
11103 | else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC)) |
11104 | { | |
11105 | unsigned long data, insn; | |
11106 | unsigned thumb; | |
b38cadfb | 11107 | |
0855e32b NS |
11108 | data = bfd_get_32 (input_bfd, hit_data); |
11109 | thumb = data & 1; | |
11110 | data &= ~1u; | |
b38cadfb | 11111 | |
0855e32b NS |
11112 | if (thumb) |
11113 | { | |
11114 | insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data); | |
11115 | if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800) | |
11116 | insn = (insn << 16) | |
11117 | | bfd_get_16 (input_bfd, | |
11118 | contents + rel->r_offset - data + 2); | |
11119 | if ((insn & 0xf800c000) == 0xf000c000) | |
11120 | /* bl/blx */ | |
11121 | value = -6; | |
11122 | else if ((insn & 0xffffff00) == 0x4400) | |
11123 | /* add */ | |
11124 | value = -5; | |
11125 | else | |
11126 | { | |
11127 | (*_bfd_error_handler) | |
11128 | (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"), | |
11129 | input_bfd, input_section, | |
11130 | (unsigned long)rel->r_offset, insn); | |
11131 | return bfd_reloc_notsupported; | |
11132 | } | |
11133 | } | |
11134 | else | |
11135 | { | |
11136 | insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data); | |
11137 | ||
11138 | switch (insn >> 24) | |
11139 | { | |
11140 | case 0xeb: /* bl */ | |
11141 | case 0xfa: /* blx */ | |
11142 | value = -4; | |
11143 | break; | |
11144 | ||
11145 | case 0xe0: /* add */ | |
11146 | value = -8; | |
11147 | break; | |
b38cadfb | 11148 | |
0855e32b NS |
11149 | default: |
11150 | (*_bfd_error_handler) | |
11151 | (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"), | |
11152 | input_bfd, input_section, | |
11153 | (unsigned long)rel->r_offset, insn); | |
11154 | return bfd_reloc_notsupported; | |
11155 | } | |
11156 | } | |
b38cadfb | 11157 | |
0855e32b NS |
11158 | value += ((globals->root.sgotplt->output_section->vma |
11159 | + globals->root.sgotplt->output_offset + off) | |
11160 | - (input_section->output_section->vma | |
11161 | + input_section->output_offset | |
11162 | + rel->r_offset) | |
11163 | + globals->sgotplt_jump_table_size); | |
11164 | } | |
11165 | else | |
11166 | value = ((globals->root.sgot->output_section->vma | |
11167 | + globals->root.sgot->output_offset + off) | |
11168 | - (input_section->output_section->vma | |
11169 | + input_section->output_offset + rel->r_offset)); | |
ba93b8ac DJ |
11170 | |
11171 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
11172 | contents, rel->r_offset, value, | |
00a97672 | 11173 | rel->r_addend); |
ba93b8ac DJ |
11174 | } |
11175 | ||
11176 | case R_ARM_TLS_LE32: | |
3cbc1e5e | 11177 | if (bfd_link_dll (info)) |
ba93b8ac DJ |
11178 | { |
11179 | (*_bfd_error_handler) | |
11180 | (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), | |
11181 | input_bfd, input_section, | |
11182 | (long) rel->r_offset, howto->name); | |
46691134 | 11183 | return bfd_reloc_notsupported; |
ba93b8ac DJ |
11184 | } |
11185 | else | |
11186 | value = tpoff (info, value); | |
906e58ca | 11187 | |
ba93b8ac | 11188 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
11189 | contents, rel->r_offset, value, |
11190 | rel->r_addend); | |
ba93b8ac | 11191 | |
319850b4 JB |
11192 | case R_ARM_V4BX: |
11193 | if (globals->fix_v4bx) | |
845b51d6 PB |
11194 | { |
11195 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 11196 | |
845b51d6 PB |
11197 | /* Ensure that we have a BX instruction. */ |
11198 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 11199 | |
845b51d6 PB |
11200 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
11201 | { | |
11202 | /* Branch to veneer. */ | |
11203 | bfd_vma glue_addr; | |
11204 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
11205 | glue_addr -= input_section->output_section->vma | |
11206 | + input_section->output_offset | |
11207 | + rel->r_offset + 8; | |
11208 | insn = (insn & 0xf0000000) | 0x0a000000 | |
11209 | | ((glue_addr >> 2) & 0x00ffffff); | |
11210 | } | |
11211 | else | |
11212 | { | |
11213 | /* Preserve Rm (lowest four bits) and the condition code | |
11214 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
11215 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
11216 | } | |
319850b4 | 11217 | |
845b51d6 PB |
11218 | bfd_put_32 (input_bfd, insn, hit_data); |
11219 | } | |
319850b4 JB |
11220 | return bfd_reloc_ok; |
11221 | ||
b6895b4f PB |
11222 | case R_ARM_MOVW_ABS_NC: |
11223 | case R_ARM_MOVT_ABS: | |
11224 | case R_ARM_MOVW_PREL_NC: | |
11225 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
11226 | /* Until we properly support segment-base-relative addressing then |
11227 | we assume the segment base to be zero, as for the group relocations. | |
11228 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
11229 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
11230 | case R_ARM_MOVW_BREL_NC: | |
11231 | case R_ARM_MOVW_BREL: | |
11232 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
11233 | { |
11234 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
11235 | ||
11236 | if (globals->use_rel) | |
11237 | { | |
11238 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 11239 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 11240 | } |
92f5d02b | 11241 | |
b6895b4f | 11242 | value += signed_addend; |
b6895b4f PB |
11243 | |
11244 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
11245 | value -= (input_section->output_section->vma | |
11246 | + input_section->output_offset + rel->r_offset); | |
11247 | ||
92f5d02b | 11248 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
99059e56 | 11249 | return bfd_reloc_overflow; |
92f5d02b | 11250 | |
35fc36a8 | 11251 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
11252 | value |= 1; |
11253 | ||
11254 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
99059e56 | 11255 | || r_type == R_ARM_MOVT_BREL) |
b6895b4f PB |
11256 | value >>= 16; |
11257 | ||
11258 | insn &= 0xfff0f000; | |
11259 | insn |= value & 0xfff; | |
11260 | insn |= (value & 0xf000) << 4; | |
11261 | bfd_put_32 (input_bfd, insn, hit_data); | |
11262 | } | |
11263 | return bfd_reloc_ok; | |
11264 | ||
11265 | case R_ARM_THM_MOVW_ABS_NC: | |
11266 | case R_ARM_THM_MOVT_ABS: | |
11267 | case R_ARM_THM_MOVW_PREL_NC: | |
11268 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
11269 | /* Until we properly support segment-base-relative addressing then |
11270 | we assume the segment base to be zero, as for the above relocations. | |
11271 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
11272 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
11273 | as R_ARM_THM_MOVT_ABS. */ | |
11274 | case R_ARM_THM_MOVW_BREL_NC: | |
11275 | case R_ARM_THM_MOVW_BREL: | |
11276 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
11277 | { |
11278 | bfd_vma insn; | |
906e58ca | 11279 | |
b6895b4f PB |
11280 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
11281 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
11282 | ||
11283 | if (globals->use_rel) | |
11284 | { | |
11285 | addend = ((insn >> 4) & 0xf000) | |
11286 | | ((insn >> 15) & 0x0800) | |
11287 | | ((insn >> 4) & 0x0700) | |
11288 | | (insn & 0x00ff); | |
39623e12 | 11289 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 11290 | } |
92f5d02b | 11291 | |
b6895b4f | 11292 | value += signed_addend; |
b6895b4f PB |
11293 | |
11294 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
11295 | value -= (input_section->output_section->vma | |
11296 | + input_section->output_offset + rel->r_offset); | |
11297 | ||
92f5d02b | 11298 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
99059e56 | 11299 | return bfd_reloc_overflow; |
92f5d02b | 11300 | |
35fc36a8 | 11301 | if (branch_type == ST_BRANCH_TO_THUMB) |
92f5d02b MS |
11302 | value |= 1; |
11303 | ||
11304 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
99059e56 | 11305 | || r_type == R_ARM_THM_MOVT_BREL) |
b6895b4f PB |
11306 | value >>= 16; |
11307 | ||
11308 | insn &= 0xfbf08f00; | |
11309 | insn |= (value & 0xf000) << 4; | |
11310 | insn |= (value & 0x0800) << 15; | |
11311 | insn |= (value & 0x0700) << 4; | |
11312 | insn |= (value & 0x00ff); | |
11313 | ||
11314 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
11315 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
11316 | } | |
11317 | return bfd_reloc_ok; | |
11318 | ||
4962c51a MS |
11319 | case R_ARM_ALU_PC_G0_NC: |
11320 | case R_ARM_ALU_PC_G1_NC: | |
11321 | case R_ARM_ALU_PC_G0: | |
11322 | case R_ARM_ALU_PC_G1: | |
11323 | case R_ARM_ALU_PC_G2: | |
11324 | case R_ARM_ALU_SB_G0_NC: | |
11325 | case R_ARM_ALU_SB_G1_NC: | |
11326 | case R_ARM_ALU_SB_G0: | |
11327 | case R_ARM_ALU_SB_G1: | |
11328 | case R_ARM_ALU_SB_G2: | |
11329 | { | |
11330 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11331 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11332 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11333 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11334 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 RM |
11335 | bfd_vma residual; |
11336 | bfd_vma g_n; | |
4962c51a | 11337 | bfd_signed_vma signed_value; |
99059e56 RM |
11338 | int group = 0; |
11339 | ||
11340 | /* Determine which group of bits to select. */ | |
11341 | switch (r_type) | |
11342 | { | |
11343 | case R_ARM_ALU_PC_G0_NC: | |
11344 | case R_ARM_ALU_PC_G0: | |
11345 | case R_ARM_ALU_SB_G0_NC: | |
11346 | case R_ARM_ALU_SB_G0: | |
11347 | group = 0; | |
11348 | break; | |
11349 | ||
11350 | case R_ARM_ALU_PC_G1_NC: | |
11351 | case R_ARM_ALU_PC_G1: | |
11352 | case R_ARM_ALU_SB_G1_NC: | |
11353 | case R_ARM_ALU_SB_G1: | |
11354 | group = 1; | |
11355 | break; | |
11356 | ||
11357 | case R_ARM_ALU_PC_G2: | |
11358 | case R_ARM_ALU_SB_G2: | |
11359 | group = 2; | |
11360 | break; | |
11361 | ||
11362 | default: | |
11363 | abort (); | |
11364 | } | |
11365 | ||
11366 | /* If REL, extract the addend from the insn. If RELA, it will | |
11367 | have already been fetched for us. */ | |
4962c51a | 11368 | if (globals->use_rel) |
99059e56 RM |
11369 | { |
11370 | int negative; | |
11371 | bfd_vma constant = insn & 0xff; | |
11372 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
11373 | ||
11374 | if (rotation == 0) | |
11375 | signed_addend = constant; | |
11376 | else | |
11377 | { | |
11378 | /* Compensate for the fact that in the instruction, the | |
11379 | rotation is stored in multiples of 2 bits. */ | |
11380 | rotation *= 2; | |
11381 | ||
11382 | /* Rotate "constant" right by "rotation" bits. */ | |
11383 | signed_addend = (constant >> rotation) | | |
11384 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
11385 | } | |
11386 | ||
11387 | /* Determine if the instruction is an ADD or a SUB. | |
11388 | (For REL, this determines the sign of the addend.) */ | |
11389 | negative = identify_add_or_sub (insn); | |
11390 | if (negative == 0) | |
11391 | { | |
11392 | (*_bfd_error_handler) | |
11393 | (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"), | |
11394 | input_bfd, input_section, | |
11395 | (long) rel->r_offset, howto->name); | |
11396 | return bfd_reloc_overflow; | |
11397 | } | |
11398 | ||
11399 | signed_addend *= negative; | |
11400 | } | |
4962c51a MS |
11401 | |
11402 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11403 | if (r_type == R_ARM_ALU_PC_G0_NC |
11404 | || r_type == R_ARM_ALU_PC_G1_NC | |
11405 | || r_type == R_ARM_ALU_PC_G0 | |
11406 | || r_type == R_ARM_ALU_PC_G1 | |
11407 | || r_type == R_ARM_ALU_PC_G2) | |
11408 | /* PC relative. */ | |
11409 | signed_value = value - pc + signed_addend; | |
11410 | else | |
11411 | /* Section base relative. */ | |
11412 | signed_value = value - sb + signed_addend; | |
11413 | ||
11414 | /* If the target symbol is a Thumb function, then set the | |
11415 | Thumb bit in the address. */ | |
35fc36a8 | 11416 | if (branch_type == ST_BRANCH_TO_THUMB) |
4962c51a MS |
11417 | signed_value |= 1; |
11418 | ||
99059e56 RM |
11419 | /* Calculate the value of the relevant G_n, in encoded |
11420 | constant-with-rotation format. */ | |
b6518b38 NC |
11421 | g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11422 | group, &residual); | |
99059e56 RM |
11423 | |
11424 | /* Check for overflow if required. */ | |
11425 | if ((r_type == R_ARM_ALU_PC_G0 | |
11426 | || r_type == R_ARM_ALU_PC_G1 | |
11427 | || r_type == R_ARM_ALU_PC_G2 | |
11428 | || r_type == R_ARM_ALU_SB_G0 | |
11429 | || r_type == R_ARM_ALU_SB_G1 | |
11430 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
11431 | { | |
11432 | (*_bfd_error_handler) | |
11433 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
11434 | input_bfd, input_section, | |
b6518b38 NC |
11435 | (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value, |
11436 | howto->name); | |
99059e56 RM |
11437 | return bfd_reloc_overflow; |
11438 | } | |
11439 | ||
11440 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
11441 | not to destroy the S bit. */ | |
11442 | insn &= 0xff1ff000; | |
11443 | ||
11444 | /* Set the opcode according to whether the value to go in the | |
11445 | place is negative. */ | |
11446 | if (signed_value < 0) | |
11447 | insn |= 1 << 22; | |
11448 | else | |
11449 | insn |= 1 << 23; | |
11450 | ||
11451 | /* Encode the offset. */ | |
11452 | insn |= g_n; | |
4962c51a MS |
11453 | |
11454 | bfd_put_32 (input_bfd, insn, hit_data); | |
11455 | } | |
11456 | return bfd_reloc_ok; | |
11457 | ||
11458 | case R_ARM_LDR_PC_G0: | |
11459 | case R_ARM_LDR_PC_G1: | |
11460 | case R_ARM_LDR_PC_G2: | |
11461 | case R_ARM_LDR_SB_G0: | |
11462 | case R_ARM_LDR_SB_G1: | |
11463 | case R_ARM_LDR_SB_G2: | |
11464 | { | |
11465 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11466 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11467 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11468 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11469 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 11470 | bfd_vma residual; |
4962c51a | 11471 | bfd_signed_vma signed_value; |
99059e56 RM |
11472 | int group = 0; |
11473 | ||
11474 | /* Determine which groups of bits to calculate. */ | |
11475 | switch (r_type) | |
11476 | { | |
11477 | case R_ARM_LDR_PC_G0: | |
11478 | case R_ARM_LDR_SB_G0: | |
11479 | group = 0; | |
11480 | break; | |
11481 | ||
11482 | case R_ARM_LDR_PC_G1: | |
11483 | case R_ARM_LDR_SB_G1: | |
11484 | group = 1; | |
11485 | break; | |
11486 | ||
11487 | case R_ARM_LDR_PC_G2: | |
11488 | case R_ARM_LDR_SB_G2: | |
11489 | group = 2; | |
11490 | break; | |
11491 | ||
11492 | default: | |
11493 | abort (); | |
11494 | } | |
11495 | ||
11496 | /* If REL, extract the addend from the insn. If RELA, it will | |
11497 | have already been fetched for us. */ | |
4962c51a | 11498 | if (globals->use_rel) |
99059e56 RM |
11499 | { |
11500 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
11501 | signed_addend = negative * (insn & 0xfff); | |
11502 | } | |
4962c51a MS |
11503 | |
11504 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11505 | if (r_type == R_ARM_LDR_PC_G0 |
11506 | || r_type == R_ARM_LDR_PC_G1 | |
11507 | || r_type == R_ARM_LDR_PC_G2) | |
11508 | /* PC relative. */ | |
11509 | signed_value = value - pc + signed_addend; | |
11510 | else | |
11511 | /* Section base relative. */ | |
11512 | signed_value = value - sb + signed_addend; | |
11513 | ||
11514 | /* Calculate the value of the relevant G_{n-1} to obtain | |
11515 | the residual at that stage. */ | |
b6518b38 NC |
11516 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11517 | group - 1, &residual); | |
99059e56 RM |
11518 | |
11519 | /* Check for overflow. */ | |
11520 | if (residual >= 0x1000) | |
11521 | { | |
11522 | (*_bfd_error_handler) | |
11523 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
b6518b38 NC |
11524 | input_bfd, input_section, |
11525 | (long) rel->r_offset, labs (signed_value), howto->name); | |
99059e56 RM |
11526 | return bfd_reloc_overflow; |
11527 | } | |
11528 | ||
11529 | /* Mask out the value and U bit. */ | |
11530 | insn &= 0xff7ff000; | |
11531 | ||
11532 | /* Set the U bit if the value to go in the place is non-negative. */ | |
11533 | if (signed_value >= 0) | |
11534 | insn |= 1 << 23; | |
11535 | ||
11536 | /* Encode the offset. */ | |
11537 | insn |= residual; | |
4962c51a MS |
11538 | |
11539 | bfd_put_32 (input_bfd, insn, hit_data); | |
11540 | } | |
11541 | return bfd_reloc_ok; | |
11542 | ||
11543 | case R_ARM_LDRS_PC_G0: | |
11544 | case R_ARM_LDRS_PC_G1: | |
11545 | case R_ARM_LDRS_PC_G2: | |
11546 | case R_ARM_LDRS_SB_G0: | |
11547 | case R_ARM_LDRS_SB_G1: | |
11548 | case R_ARM_LDRS_SB_G2: | |
11549 | { | |
11550 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11551 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11552 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11553 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11554 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 11555 | bfd_vma residual; |
4962c51a | 11556 | bfd_signed_vma signed_value; |
99059e56 RM |
11557 | int group = 0; |
11558 | ||
11559 | /* Determine which groups of bits to calculate. */ | |
11560 | switch (r_type) | |
11561 | { | |
11562 | case R_ARM_LDRS_PC_G0: | |
11563 | case R_ARM_LDRS_SB_G0: | |
11564 | group = 0; | |
11565 | break; | |
11566 | ||
11567 | case R_ARM_LDRS_PC_G1: | |
11568 | case R_ARM_LDRS_SB_G1: | |
11569 | group = 1; | |
11570 | break; | |
11571 | ||
11572 | case R_ARM_LDRS_PC_G2: | |
11573 | case R_ARM_LDRS_SB_G2: | |
11574 | group = 2; | |
11575 | break; | |
11576 | ||
11577 | default: | |
11578 | abort (); | |
11579 | } | |
11580 | ||
11581 | /* If REL, extract the addend from the insn. If RELA, it will | |
11582 | have already been fetched for us. */ | |
4962c51a | 11583 | if (globals->use_rel) |
99059e56 RM |
11584 | { |
11585 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
11586 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
11587 | } | |
4962c51a MS |
11588 | |
11589 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11590 | if (r_type == R_ARM_LDRS_PC_G0 |
11591 | || r_type == R_ARM_LDRS_PC_G1 | |
11592 | || r_type == R_ARM_LDRS_PC_G2) | |
11593 | /* PC relative. */ | |
11594 | signed_value = value - pc + signed_addend; | |
11595 | else | |
11596 | /* Section base relative. */ | |
11597 | signed_value = value - sb + signed_addend; | |
11598 | ||
11599 | /* Calculate the value of the relevant G_{n-1} to obtain | |
11600 | the residual at that stage. */ | |
b6518b38 NC |
11601 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11602 | group - 1, &residual); | |
99059e56 RM |
11603 | |
11604 | /* Check for overflow. */ | |
11605 | if (residual >= 0x100) | |
11606 | { | |
11607 | (*_bfd_error_handler) | |
11608 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
b6518b38 NC |
11609 | input_bfd, input_section, |
11610 | (long) rel->r_offset, labs (signed_value), howto->name); | |
99059e56 RM |
11611 | return bfd_reloc_overflow; |
11612 | } | |
11613 | ||
11614 | /* Mask out the value and U bit. */ | |
11615 | insn &= 0xff7ff0f0; | |
11616 | ||
11617 | /* Set the U bit if the value to go in the place is non-negative. */ | |
11618 | if (signed_value >= 0) | |
11619 | insn |= 1 << 23; | |
11620 | ||
11621 | /* Encode the offset. */ | |
11622 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
4962c51a MS |
11623 | |
11624 | bfd_put_32 (input_bfd, insn, hit_data); | |
11625 | } | |
11626 | return bfd_reloc_ok; | |
11627 | ||
11628 | case R_ARM_LDC_PC_G0: | |
11629 | case R_ARM_LDC_PC_G1: | |
11630 | case R_ARM_LDC_PC_G2: | |
11631 | case R_ARM_LDC_SB_G0: | |
11632 | case R_ARM_LDC_SB_G1: | |
11633 | case R_ARM_LDC_SB_G2: | |
11634 | { | |
11635 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
99059e56 | 11636 | bfd_vma pc = input_section->output_section->vma |
4962c51a | 11637 | + input_section->output_offset + rel->r_offset; |
31a91d61 | 11638 | /* sb is the origin of the *segment* containing the symbol. */ |
62c34db3 | 11639 | bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0; |
99059e56 | 11640 | bfd_vma residual; |
4962c51a | 11641 | bfd_signed_vma signed_value; |
99059e56 RM |
11642 | int group = 0; |
11643 | ||
11644 | /* Determine which groups of bits to calculate. */ | |
11645 | switch (r_type) | |
11646 | { | |
11647 | case R_ARM_LDC_PC_G0: | |
11648 | case R_ARM_LDC_SB_G0: | |
11649 | group = 0; | |
11650 | break; | |
11651 | ||
11652 | case R_ARM_LDC_PC_G1: | |
11653 | case R_ARM_LDC_SB_G1: | |
11654 | group = 1; | |
11655 | break; | |
11656 | ||
11657 | case R_ARM_LDC_PC_G2: | |
11658 | case R_ARM_LDC_SB_G2: | |
11659 | group = 2; | |
11660 | break; | |
11661 | ||
11662 | default: | |
11663 | abort (); | |
11664 | } | |
11665 | ||
11666 | /* If REL, extract the addend from the insn. If RELA, it will | |
11667 | have already been fetched for us. */ | |
4962c51a | 11668 | if (globals->use_rel) |
99059e56 RM |
11669 | { |
11670 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
11671 | signed_addend = negative * ((insn & 0xff) << 2); | |
11672 | } | |
4962c51a MS |
11673 | |
11674 | /* Compute the value (X) to go in the place. */ | |
99059e56 RM |
11675 | if (r_type == R_ARM_LDC_PC_G0 |
11676 | || r_type == R_ARM_LDC_PC_G1 | |
11677 | || r_type == R_ARM_LDC_PC_G2) | |
11678 | /* PC relative. */ | |
11679 | signed_value = value - pc + signed_addend; | |
11680 | else | |
11681 | /* Section base relative. */ | |
11682 | signed_value = value - sb + signed_addend; | |
11683 | ||
11684 | /* Calculate the value of the relevant G_{n-1} to obtain | |
11685 | the residual at that stage. */ | |
b6518b38 NC |
11686 | calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value, |
11687 | group - 1, &residual); | |
99059e56 RM |
11688 | |
11689 | /* Check for overflow. (The absolute value to go in the place must be | |
11690 | divisible by four and, after having been divided by four, must | |
11691 | fit in eight bits.) */ | |
11692 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
11693 | { | |
11694 | (*_bfd_error_handler) | |
11695 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
11696 | input_bfd, input_section, | |
b6518b38 | 11697 | (long) rel->r_offset, labs (signed_value), howto->name); |
99059e56 RM |
11698 | return bfd_reloc_overflow; |
11699 | } | |
11700 | ||
11701 | /* Mask out the value and U bit. */ | |
11702 | insn &= 0xff7fff00; | |
11703 | ||
11704 | /* Set the U bit if the value to go in the place is non-negative. */ | |
11705 | if (signed_value >= 0) | |
11706 | insn |= 1 << 23; | |
11707 | ||
11708 | /* Encode the offset. */ | |
11709 | insn |= residual >> 2; | |
4962c51a MS |
11710 | |
11711 | bfd_put_32 (input_bfd, insn, hit_data); | |
11712 | } | |
11713 | return bfd_reloc_ok; | |
11714 | ||
72d98d16 MG |
11715 | case R_ARM_THM_ALU_ABS_G0_NC: |
11716 | case R_ARM_THM_ALU_ABS_G1_NC: | |
11717 | case R_ARM_THM_ALU_ABS_G2_NC: | |
11718 | case R_ARM_THM_ALU_ABS_G3_NC: | |
11719 | { | |
11720 | const int shift_array[4] = {0, 8, 16, 24}; | |
11721 | bfd_vma insn = bfd_get_16 (input_bfd, hit_data); | |
11722 | bfd_vma addr = value; | |
11723 | int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC]; | |
11724 | ||
11725 | /* Compute address. */ | |
11726 | if (globals->use_rel) | |
11727 | signed_addend = insn & 0xff; | |
11728 | addr += signed_addend; | |
11729 | if (branch_type == ST_BRANCH_TO_THUMB) | |
11730 | addr |= 1; | |
11731 | /* Clean imm8 insn. */ | |
11732 | insn &= 0xff00; | |
11733 | /* And update with correct part of address. */ | |
11734 | insn |= (addr >> shift) & 0xff; | |
11735 | /* Update insn. */ | |
11736 | bfd_put_16 (input_bfd, insn, hit_data); | |
11737 | } | |
11738 | ||
11739 | *unresolved_reloc_p = FALSE; | |
11740 | return bfd_reloc_ok; | |
11741 | ||
252b5132 RH |
11742 | default: |
11743 | return bfd_reloc_notsupported; | |
11744 | } | |
11745 | } | |
11746 | ||
98c1d4aa NC |
11747 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
11748 | static void | |
57e8b36a NC |
11749 | arm_add_to_rel (bfd * abfd, |
11750 | bfd_byte * address, | |
11751 | reloc_howto_type * howto, | |
11752 | bfd_signed_vma increment) | |
98c1d4aa | 11753 | { |
98c1d4aa NC |
11754 | bfd_signed_vma addend; |
11755 | ||
bd97cb95 DJ |
11756 | if (howto->type == R_ARM_THM_CALL |
11757 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 11758 | { |
9a5aca8c AM |
11759 | int upper_insn, lower_insn; |
11760 | int upper, lower; | |
98c1d4aa | 11761 | |
9a5aca8c AM |
11762 | upper_insn = bfd_get_16 (abfd, address); |
11763 | lower_insn = bfd_get_16 (abfd, address + 2); | |
11764 | upper = upper_insn & 0x7ff; | |
11765 | lower = lower_insn & 0x7ff; | |
11766 | ||
11767 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 11768 | addend += increment; |
9a5aca8c | 11769 | addend >>= 1; |
98c1d4aa | 11770 | |
9a5aca8c AM |
11771 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
11772 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
11773 | ||
dc810e39 AM |
11774 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
11775 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
11776 | } |
11777 | else | |
11778 | { | |
11779 | bfd_vma contents; | |
11780 | ||
11781 | contents = bfd_get_32 (abfd, address); | |
11782 | ||
11783 | /* Get the (signed) value from the instruction. */ | |
11784 | addend = contents & howto->src_mask; | |
11785 | if (addend & ((howto->src_mask + 1) >> 1)) | |
11786 | { | |
11787 | bfd_signed_vma mask; | |
11788 | ||
11789 | mask = -1; | |
11790 | mask &= ~ howto->src_mask; | |
11791 | addend |= mask; | |
11792 | } | |
11793 | ||
11794 | /* Add in the increment, (which is a byte value). */ | |
11795 | switch (howto->type) | |
11796 | { | |
11797 | default: | |
11798 | addend += increment; | |
11799 | break; | |
11800 | ||
11801 | case R_ARM_PC24: | |
c6596c5e | 11802 | case R_ARM_PLT32: |
5b5bb741 PB |
11803 | case R_ARM_CALL: |
11804 | case R_ARM_JUMP24: | |
9a5aca8c | 11805 | addend <<= howto->size; |
dc810e39 | 11806 | addend += increment; |
9a5aca8c AM |
11807 | |
11808 | /* Should we check for overflow here ? */ | |
11809 | ||
11810 | /* Drop any undesired bits. */ | |
11811 | addend >>= howto->rightshift; | |
11812 | break; | |
11813 | } | |
11814 | ||
11815 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
11816 | ||
11817 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 11818 | } |
98c1d4aa | 11819 | } |
252b5132 | 11820 | |
ba93b8ac DJ |
11821 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
11822 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
11823 | || (R_TYPE) == R_ARM_TLS_LDO32 \ | |
11824 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
11825 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ | |
11826 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
11827 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
11828 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
0855e32b NS |
11829 | || (R_TYPE) == R_ARM_TLS_IE32 \ |
11830 | || IS_ARM_TLS_GNU_RELOC (R_TYPE)) | |
11831 | ||
11832 | /* Specific set of relocations for the gnu tls dialect. */ | |
11833 | #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \ | |
11834 | ((R_TYPE) == R_ARM_TLS_GOTDESC \ | |
11835 | || (R_TYPE) == R_ARM_TLS_CALL \ | |
11836 | || (R_TYPE) == R_ARM_THM_TLS_CALL \ | |
11837 | || (R_TYPE) == R_ARM_TLS_DESCSEQ \ | |
11838 | || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ) | |
ba93b8ac | 11839 | |
252b5132 | 11840 | /* Relocate an ARM ELF section. */ |
906e58ca | 11841 | |
b34976b6 | 11842 | static bfd_boolean |
57e8b36a NC |
11843 | elf32_arm_relocate_section (bfd * output_bfd, |
11844 | struct bfd_link_info * info, | |
11845 | bfd * input_bfd, | |
11846 | asection * input_section, | |
11847 | bfd_byte * contents, | |
11848 | Elf_Internal_Rela * relocs, | |
11849 | Elf_Internal_Sym * local_syms, | |
11850 | asection ** local_sections) | |
252b5132 | 11851 | { |
b34976b6 AM |
11852 | Elf_Internal_Shdr *symtab_hdr; |
11853 | struct elf_link_hash_entry **sym_hashes; | |
11854 | Elf_Internal_Rela *rel; | |
11855 | Elf_Internal_Rela *relend; | |
11856 | const char *name; | |
b32d3aa2 | 11857 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 11858 | |
4e7fd91e | 11859 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
11860 | if (globals == NULL) |
11861 | return FALSE; | |
b491616a | 11862 | |
0ffa91dd | 11863 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
11864 | sym_hashes = elf_sym_hashes (input_bfd); |
11865 | ||
11866 | rel = relocs; | |
11867 | relend = relocs + input_section->reloc_count; | |
11868 | for (; rel < relend; rel++) | |
11869 | { | |
ba96a88f NC |
11870 | int r_type; |
11871 | reloc_howto_type * howto; | |
11872 | unsigned long r_symndx; | |
11873 | Elf_Internal_Sym * sym; | |
11874 | asection * sec; | |
252b5132 | 11875 | struct elf_link_hash_entry * h; |
ba96a88f NC |
11876 | bfd_vma relocation; |
11877 | bfd_reloc_status_type r; | |
11878 | arelent bfd_reloc; | |
ba93b8ac | 11879 | char sym_type; |
0945cdfd | 11880 | bfd_boolean unresolved_reloc = FALSE; |
f2a9dd69 | 11881 | char *error_message = NULL; |
f21f3fe0 | 11882 | |
252b5132 | 11883 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 11884 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 11885 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 11886 | |
ba96a88f | 11887 | if ( r_type == R_ARM_GNU_VTENTRY |
99059e56 RM |
11888 | || r_type == R_ARM_GNU_VTINHERIT) |
11889 | continue; | |
252b5132 | 11890 | |
b32d3aa2 | 11891 | bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
ba96a88f | 11892 | howto = bfd_reloc.howto; |
252b5132 | 11893 | |
252b5132 RH |
11894 | h = NULL; |
11895 | sym = NULL; | |
11896 | sec = NULL; | |
9b485d32 | 11897 | |
252b5132 RH |
11898 | if (r_symndx < symtab_hdr->sh_info) |
11899 | { | |
11900 | sym = local_syms + r_symndx; | |
ba93b8ac | 11901 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 11902 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
11903 | |
11904 | /* An object file might have a reference to a local | |
11905 | undefined symbol. This is a daft object file, but we | |
11906 | should at least do something about it. V4BX & NONE | |
11907 | relocations do not use the symbol and are explicitly | |
77b4f08f TS |
11908 | allowed to use the undefined symbol, so allow those. |
11909 | Likewise for relocations against STN_UNDEF. */ | |
ffcb4889 NS |
11910 | if (r_type != R_ARM_V4BX |
11911 | && r_type != R_ARM_NONE | |
77b4f08f | 11912 | && r_symndx != STN_UNDEF |
ffcb4889 NS |
11913 | && bfd_is_und_section (sec) |
11914 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
1a72702b AM |
11915 | (*info->callbacks->undefined_symbol) |
11916 | (info, bfd_elf_string_from_elf_section | |
11917 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
11918 | input_bfd, input_section, | |
11919 | rel->r_offset, TRUE); | |
b38cadfb | 11920 | |
4e7fd91e | 11921 | if (globals->use_rel) |
f8df10f4 | 11922 | { |
4e7fd91e PB |
11923 | relocation = (sec->output_section->vma |
11924 | + sec->output_offset | |
11925 | + sym->st_value); | |
0e1862bb | 11926 | if (!bfd_link_relocatable (info) |
ab96bf03 AM |
11927 | && (sec->flags & SEC_MERGE) |
11928 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 11929 | { |
4e7fd91e PB |
11930 | asection *msec; |
11931 | bfd_vma addend, value; | |
11932 | ||
39623e12 | 11933 | switch (r_type) |
4e7fd91e | 11934 | { |
39623e12 PB |
11935 | case R_ARM_MOVW_ABS_NC: |
11936 | case R_ARM_MOVT_ABS: | |
11937 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
11938 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
11939 | addend = (addend ^ 0x8000) - 0x8000; | |
11940 | break; | |
f8df10f4 | 11941 | |
39623e12 PB |
11942 | case R_ARM_THM_MOVW_ABS_NC: |
11943 | case R_ARM_THM_MOVT_ABS: | |
11944 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
11945 | << 16; | |
11946 | value |= bfd_get_16 (input_bfd, | |
11947 | contents + rel->r_offset + 2); | |
11948 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
11949 | | ((value & 0x04000000) >> 15); | |
11950 | addend = (addend ^ 0x8000) - 0x8000; | |
11951 | break; | |
f8df10f4 | 11952 | |
39623e12 PB |
11953 | default: |
11954 | if (howto->rightshift | |
11955 | || (howto->src_mask & (howto->src_mask + 1))) | |
11956 | { | |
11957 | (*_bfd_error_handler) | |
11958 | (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"), | |
11959 | input_bfd, input_section, | |
11960 | (long) rel->r_offset, howto->name); | |
11961 | return FALSE; | |
11962 | } | |
11963 | ||
11964 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
11965 | ||
11966 | /* Get the (signed) value from the instruction. */ | |
11967 | addend = value & howto->src_mask; | |
11968 | if (addend & ((howto->src_mask + 1) >> 1)) | |
11969 | { | |
11970 | bfd_signed_vma mask; | |
11971 | ||
11972 | mask = -1; | |
11973 | mask &= ~ howto->src_mask; | |
11974 | addend |= mask; | |
11975 | } | |
11976 | break; | |
4e7fd91e | 11977 | } |
39623e12 | 11978 | |
4e7fd91e PB |
11979 | msec = sec; |
11980 | addend = | |
11981 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
11982 | - relocation; | |
11983 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 | 11984 | |
cc643b88 | 11985 | /* Cases here must match those in the preceding |
39623e12 PB |
11986 | switch statement. */ |
11987 | switch (r_type) | |
11988 | { | |
11989 | case R_ARM_MOVW_ABS_NC: | |
11990 | case R_ARM_MOVT_ABS: | |
11991 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
11992 | | (addend & 0xfff); | |
11993 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
11994 | break; | |
11995 | ||
11996 | case R_ARM_THM_MOVW_ABS_NC: | |
11997 | case R_ARM_THM_MOVT_ABS: | |
11998 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
11999 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
12000 | bfd_put_16 (input_bfd, value >> 16, | |
12001 | contents + rel->r_offset); | |
12002 | bfd_put_16 (input_bfd, value, | |
12003 | contents + rel->r_offset + 2); | |
12004 | break; | |
12005 | ||
12006 | default: | |
12007 | value = (value & ~ howto->dst_mask) | |
12008 | | (addend & howto->dst_mask); | |
12009 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
12010 | break; | |
12011 | } | |
f8df10f4 | 12012 | } |
f8df10f4 | 12013 | } |
4e7fd91e PB |
12014 | else |
12015 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
12016 | } |
12017 | else | |
12018 | { | |
62d887d4 | 12019 | bfd_boolean warned, ignored; |
560e09e9 | 12020 | |
b2a8e766 AM |
12021 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
12022 | r_symndx, symtab_hdr, sym_hashes, | |
12023 | h, sec, relocation, | |
62d887d4 | 12024 | unresolved_reloc, warned, ignored); |
ba93b8ac DJ |
12025 | |
12026 | sym_type = h->type; | |
252b5132 RH |
12027 | } |
12028 | ||
dbaa2011 | 12029 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 12030 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 12031 | rel, 1, relend, howto, 0, contents); |
ab96bf03 | 12032 | |
0e1862bb | 12033 | if (bfd_link_relocatable (info)) |
ab96bf03 AM |
12034 | { |
12035 | /* This is a relocatable link. We don't have to change | |
12036 | anything, unless the reloc is against a section symbol, | |
12037 | in which case we have to adjust according to where the | |
12038 | section symbol winds up in the output section. */ | |
12039 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
12040 | { | |
12041 | if (globals->use_rel) | |
12042 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
12043 | howto, (bfd_signed_vma) sec->output_offset); | |
12044 | else | |
12045 | rel->r_addend += sec->output_offset; | |
12046 | } | |
12047 | continue; | |
12048 | } | |
12049 | ||
252b5132 RH |
12050 | if (h != NULL) |
12051 | name = h->root.root.string; | |
12052 | else | |
12053 | { | |
12054 | name = (bfd_elf_string_from_elf_section | |
12055 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
12056 | if (name == NULL || *name == '\0') | |
12057 | name = bfd_section_name (input_bfd, sec); | |
12058 | } | |
f21f3fe0 | 12059 | |
cf35638d | 12060 | if (r_symndx != STN_UNDEF |
ba93b8ac DJ |
12061 | && r_type != R_ARM_NONE |
12062 | && (h == NULL | |
12063 | || h->root.type == bfd_link_hash_defined | |
12064 | || h->root.type == bfd_link_hash_defweak) | |
12065 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
12066 | { | |
12067 | (*_bfd_error_handler) | |
12068 | ((sym_type == STT_TLS | |
12069 | ? _("%B(%A+0x%lx): %s used with TLS symbol %s") | |
12070 | : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")), | |
12071 | input_bfd, | |
12072 | input_section, | |
12073 | (long) rel->r_offset, | |
12074 | howto->name, | |
12075 | name); | |
12076 | } | |
12077 | ||
0855e32b | 12078 | /* We call elf32_arm_final_link_relocate unless we're completely |
99059e56 RM |
12079 | done, i.e., the relaxation produced the final output we want, |
12080 | and we won't let anybody mess with it. Also, we have to do | |
12081 | addend adjustments in case of a R_ARM_TLS_GOTDESC relocation | |
6a631e86 | 12082 | both in relaxed and non-relaxed cases. */ |
39d911fc TP |
12083 | if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type) |
12084 | || (IS_ARM_TLS_GNU_RELOC (r_type) | |
12085 | && !((h ? elf32_arm_hash_entry (h)->tls_type : | |
12086 | elf32_arm_local_got_tls_type (input_bfd)[r_symndx]) | |
12087 | & GOT_TLS_GDESC))) | |
12088 | { | |
12089 | r = elf32_arm_tls_relax (globals, input_bfd, input_section, | |
12090 | contents, rel, h == NULL); | |
12091 | /* This may have been marked unresolved because it came from | |
12092 | a shared library. But we've just dealt with that. */ | |
12093 | unresolved_reloc = 0; | |
12094 | } | |
12095 | else | |
12096 | r = bfd_reloc_continue; | |
b38cadfb | 12097 | |
39d911fc TP |
12098 | if (r == bfd_reloc_continue) |
12099 | { | |
12100 | unsigned char branch_type = | |
12101 | h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal) | |
12102 | : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal); | |
12103 | ||
12104 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, | |
12105 | input_section, contents, rel, | |
12106 | relocation, info, sec, name, | |
12107 | sym_type, branch_type, h, | |
12108 | &unresolved_reloc, | |
12109 | &error_message); | |
12110 | } | |
0945cdfd DJ |
12111 | |
12112 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
12113 | because such sections are not SEC_ALLOC and thus ld.so will | |
12114 | not process them. */ | |
12115 | if (unresolved_reloc | |
99059e56 RM |
12116 | && !((input_section->flags & SEC_DEBUGGING) != 0 |
12117 | && h->def_dynamic) | |
1d5316ab AM |
12118 | && _bfd_elf_section_offset (output_bfd, info, input_section, |
12119 | rel->r_offset) != (bfd_vma) -1) | |
0945cdfd DJ |
12120 | { |
12121 | (*_bfd_error_handler) | |
843fe662 L |
12122 | (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), |
12123 | input_bfd, | |
12124 | input_section, | |
12125 | (long) rel->r_offset, | |
12126 | howto->name, | |
12127 | h->root.root.string); | |
0945cdfd DJ |
12128 | return FALSE; |
12129 | } | |
252b5132 RH |
12130 | |
12131 | if (r != bfd_reloc_ok) | |
12132 | { | |
252b5132 RH |
12133 | switch (r) |
12134 | { | |
12135 | case bfd_reloc_overflow: | |
cf919dfd PB |
12136 | /* If the overflowing reloc was to an undefined symbol, |
12137 | we have already printed one error message and there | |
12138 | is no point complaining again. */ | |
1a72702b AM |
12139 | if (!h || h->root.type != bfd_link_hash_undefined) |
12140 | (*info->callbacks->reloc_overflow) | |
12141 | (info, (h ? &h->root : NULL), name, howto->name, | |
12142 | (bfd_vma) 0, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
12143 | break; |
12144 | ||
12145 | case bfd_reloc_undefined: | |
1a72702b AM |
12146 | (*info->callbacks->undefined_symbol) |
12147 | (info, name, input_bfd, input_section, rel->r_offset, TRUE); | |
252b5132 RH |
12148 | break; |
12149 | ||
12150 | case bfd_reloc_outofrange: | |
f2a9dd69 | 12151 | error_message = _("out of range"); |
252b5132 RH |
12152 | goto common_error; |
12153 | ||
12154 | case bfd_reloc_notsupported: | |
f2a9dd69 | 12155 | error_message = _("unsupported relocation"); |
252b5132 RH |
12156 | goto common_error; |
12157 | ||
12158 | case bfd_reloc_dangerous: | |
f2a9dd69 | 12159 | /* error_message should already be set. */ |
252b5132 RH |
12160 | goto common_error; |
12161 | ||
12162 | default: | |
f2a9dd69 | 12163 | error_message = _("unknown error"); |
8029a119 | 12164 | /* Fall through. */ |
252b5132 RH |
12165 | |
12166 | common_error: | |
f2a9dd69 | 12167 | BFD_ASSERT (error_message != NULL); |
1a72702b AM |
12168 | (*info->callbacks->reloc_dangerous) |
12169 | (info, error_message, input_bfd, input_section, rel->r_offset); | |
252b5132 RH |
12170 | break; |
12171 | } | |
12172 | } | |
12173 | } | |
12174 | ||
b34976b6 | 12175 | return TRUE; |
252b5132 RH |
12176 | } |
12177 | ||
91d6fa6a | 12178 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 12179 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 12180 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
12181 | maintaining that condition). */ |
12182 | ||
12183 | static void | |
12184 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
12185 | arm_unwind_table_edit **tail, | |
12186 | arm_unwind_edit_type type, | |
12187 | asection *linked_section, | |
91d6fa6a | 12188 | unsigned int tindex) |
2468f9c9 | 12189 | { |
21d799b5 NC |
12190 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
12191 | xmalloc (sizeof (arm_unwind_table_edit)); | |
b38cadfb | 12192 | |
2468f9c9 PB |
12193 | new_edit->type = type; |
12194 | new_edit->linked_section = linked_section; | |
91d6fa6a | 12195 | new_edit->index = tindex; |
b38cadfb | 12196 | |
91d6fa6a | 12197 | if (tindex > 0) |
2468f9c9 PB |
12198 | { |
12199 | new_edit->next = NULL; | |
12200 | ||
12201 | if (*tail) | |
12202 | (*tail)->next = new_edit; | |
12203 | ||
12204 | (*tail) = new_edit; | |
12205 | ||
12206 | if (!*head) | |
12207 | (*head) = new_edit; | |
12208 | } | |
12209 | else | |
12210 | { | |
12211 | new_edit->next = *head; | |
12212 | ||
12213 | if (!*tail) | |
12214 | *tail = new_edit; | |
12215 | ||
12216 | *head = new_edit; | |
12217 | } | |
12218 | } | |
12219 | ||
12220 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
12221 | ||
12222 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
12223 | static void | |
12224 | adjust_exidx_size(asection *exidx_sec, int adjust) | |
12225 | { | |
12226 | asection *out_sec; | |
12227 | ||
12228 | if (!exidx_sec->rawsize) | |
12229 | exidx_sec->rawsize = exidx_sec->size; | |
12230 | ||
12231 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); | |
12232 | out_sec = exidx_sec->output_section; | |
12233 | /* Adjust size of output section. */ | |
12234 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); | |
12235 | } | |
12236 | ||
12237 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
12238 | static void | |
12239 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) | |
12240 | { | |
12241 | struct _arm_elf_section_data *exidx_arm_data; | |
12242 | ||
12243 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
12244 | add_unwind_table_edit ( | |
12245 | &exidx_arm_data->u.exidx.unwind_edit_list, | |
12246 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
12247 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
12248 | ||
491d01d3 YU |
12249 | exidx_arm_data->additional_reloc_count++; |
12250 | ||
2468f9c9 PB |
12251 | adjust_exidx_size(exidx_sec, 8); |
12252 | } | |
12253 | ||
12254 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
12255 | made to those tables, such that: | |
b38cadfb | 12256 | |
2468f9c9 PB |
12257 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. |
12258 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
99059e56 | 12259 | codes which have been inlined into the index). |
2468f9c9 | 12260 | |
85fdf906 AH |
12261 | If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. |
12262 | ||
2468f9c9 | 12263 | The edits are applied when the tables are written |
b38cadfb | 12264 | (in elf32_arm_write_section). */ |
2468f9c9 PB |
12265 | |
12266 | bfd_boolean | |
12267 | elf32_arm_fix_exidx_coverage (asection **text_section_order, | |
12268 | unsigned int num_text_sections, | |
85fdf906 AH |
12269 | struct bfd_link_info *info, |
12270 | bfd_boolean merge_exidx_entries) | |
2468f9c9 PB |
12271 | { |
12272 | bfd *inp; | |
12273 | unsigned int last_second_word = 0, i; | |
12274 | asection *last_exidx_sec = NULL; | |
12275 | asection *last_text_sec = NULL; | |
12276 | int last_unwind_type = -1; | |
12277 | ||
12278 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
12279 | text sections. */ | |
c72f2fb2 | 12280 | for (inp = info->input_bfds; inp != NULL; inp = inp->link.next) |
2468f9c9 PB |
12281 | { |
12282 | asection *sec; | |
b38cadfb | 12283 | |
2468f9c9 | 12284 | for (sec = inp->sections; sec != NULL; sec = sec->next) |
99059e56 | 12285 | { |
2468f9c9 PB |
12286 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); |
12287 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
b38cadfb | 12288 | |
dec9d5df | 12289 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 | 12290 | continue; |
b38cadfb | 12291 | |
2468f9c9 PB |
12292 | if (elf_sec->linked_to) |
12293 | { | |
12294 | Elf_Internal_Shdr *linked_hdr | |
99059e56 | 12295 | = &elf_section_data (elf_sec->linked_to)->this_hdr; |
2468f9c9 | 12296 | struct _arm_elf_section_data *linked_sec_arm_data |
99059e56 | 12297 | = get_arm_elf_section_data (linked_hdr->bfd_section); |
2468f9c9 PB |
12298 | |
12299 | if (linked_sec_arm_data == NULL) | |
99059e56 | 12300 | continue; |
2468f9c9 PB |
12301 | |
12302 | /* Link this .ARM.exidx section back from the text section it | |
99059e56 | 12303 | describes. */ |
2468f9c9 PB |
12304 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; |
12305 | } | |
12306 | } | |
12307 | } | |
12308 | ||
12309 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
12310 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 12311 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
12312 | |
12313 | for (i = 0; i < num_text_sections; i++) | |
12314 | { | |
12315 | asection *sec = text_section_order[i]; | |
12316 | asection *exidx_sec; | |
12317 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
12318 | struct _arm_elf_section_data *exidx_arm_data; | |
12319 | bfd_byte *contents = NULL; | |
12320 | int deleted_exidx_bytes = 0; | |
12321 | bfd_vma j; | |
12322 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
12323 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
12324 | Elf_Internal_Shdr *hdr; | |
12325 | bfd *ibfd; | |
12326 | ||
12327 | if (arm_data == NULL) | |
99059e56 | 12328 | continue; |
2468f9c9 PB |
12329 | |
12330 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
12331 | if (exidx_sec == NULL) | |
12332 | { | |
12333 | /* Section has no unwind data. */ | |
12334 | if (last_unwind_type == 0 || !last_exidx_sec) | |
12335 | continue; | |
12336 | ||
12337 | /* Ignore zero sized sections. */ | |
12338 | if (sec->size == 0) | |
12339 | continue; | |
12340 | ||
12341 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
12342 | last_unwind_type = 0; | |
12343 | continue; | |
12344 | } | |
12345 | ||
22a8f80e PB |
12346 | /* Skip /DISCARD/ sections. */ |
12347 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
12348 | continue; | |
12349 | ||
2468f9c9 PB |
12350 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
12351 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
99059e56 | 12352 | continue; |
b38cadfb | 12353 | |
2468f9c9 PB |
12354 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); |
12355 | if (exidx_arm_data == NULL) | |
99059e56 | 12356 | continue; |
b38cadfb | 12357 | |
2468f9c9 | 12358 | ibfd = exidx_sec->owner; |
b38cadfb | 12359 | |
2468f9c9 PB |
12360 | if (hdr->contents != NULL) |
12361 | contents = hdr->contents; | |
12362 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
12363 | /* An error? */ | |
12364 | continue; | |
12365 | ||
ac06903d YU |
12366 | if (last_unwind_type > 0) |
12367 | { | |
12368 | unsigned int first_word = bfd_get_32 (ibfd, contents); | |
12369 | /* Add cantunwind if first unwind item does not match section | |
12370 | start. */ | |
12371 | if (first_word != sec->vma) | |
12372 | { | |
12373 | insert_cantunwind_after (last_text_sec, last_exidx_sec); | |
12374 | last_unwind_type = 0; | |
12375 | } | |
12376 | } | |
12377 | ||
2468f9c9 PB |
12378 | for (j = 0; j < hdr->sh_size; j += 8) |
12379 | { | |
12380 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
12381 | int unwind_type; | |
12382 | int elide = 0; | |
12383 | ||
12384 | /* An EXIDX_CANTUNWIND entry. */ | |
12385 | if (second_word == 1) | |
12386 | { | |
12387 | if (last_unwind_type == 0) | |
12388 | elide = 1; | |
12389 | unwind_type = 0; | |
12390 | } | |
12391 | /* Inlined unwinding data. Merge if equal to previous. */ | |
12392 | else if ((second_word & 0x80000000) != 0) | |
12393 | { | |
85fdf906 AH |
12394 | if (merge_exidx_entries |
12395 | && last_second_word == second_word && last_unwind_type == 1) | |
2468f9c9 PB |
12396 | elide = 1; |
12397 | unwind_type = 1; | |
12398 | last_second_word = second_word; | |
12399 | } | |
12400 | /* Normal table entry. In theory we could merge these too, | |
12401 | but duplicate entries are likely to be much less common. */ | |
12402 | else | |
12403 | unwind_type = 2; | |
12404 | ||
491d01d3 | 12405 | if (elide && !bfd_link_relocatable (info)) |
2468f9c9 PB |
12406 | { |
12407 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
12408 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
12409 | ||
12410 | deleted_exidx_bytes += 8; | |
12411 | } | |
12412 | ||
12413 | last_unwind_type = unwind_type; | |
12414 | } | |
12415 | ||
12416 | /* Free contents if we allocated it ourselves. */ | |
12417 | if (contents != hdr->contents) | |
99059e56 | 12418 | free (contents); |
2468f9c9 PB |
12419 | |
12420 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
12421 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
12422 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
b38cadfb | 12423 | |
2468f9c9 PB |
12424 | if (deleted_exidx_bytes > 0) |
12425 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); | |
12426 | ||
12427 | last_exidx_sec = exidx_sec; | |
12428 | last_text_sec = sec; | |
12429 | } | |
12430 | ||
12431 | /* Add terminating CANTUNWIND entry. */ | |
491d01d3 YU |
12432 | if (!bfd_link_relocatable (info) && last_exidx_sec |
12433 | && last_unwind_type != 0) | |
2468f9c9 PB |
12434 | insert_cantunwind_after(last_text_sec, last_exidx_sec); |
12435 | ||
12436 | return TRUE; | |
12437 | } | |
12438 | ||
3e6b1042 DJ |
12439 | static bfd_boolean |
12440 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, | |
12441 | bfd *ibfd, const char *name) | |
12442 | { | |
12443 | asection *sec, *osec; | |
12444 | ||
3d4d4302 | 12445 | sec = bfd_get_linker_section (ibfd, name); |
3e6b1042 DJ |
12446 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) |
12447 | return TRUE; | |
12448 | ||
12449 | osec = sec->output_section; | |
12450 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
12451 | return TRUE; | |
12452 | ||
12453 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
12454 | sec->output_offset, sec->size)) | |
12455 | return FALSE; | |
12456 | ||
12457 | return TRUE; | |
12458 | } | |
12459 | ||
12460 | static bfd_boolean | |
12461 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) | |
12462 | { | |
12463 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
fe33d2fa | 12464 | asection *sec, *osec; |
3e6b1042 | 12465 | |
4dfe6ac6 NC |
12466 | if (globals == NULL) |
12467 | return FALSE; | |
12468 | ||
3e6b1042 DJ |
12469 | /* Invoke the regular ELF backend linker to do all the work. */ |
12470 | if (!bfd_elf_final_link (abfd, info)) | |
12471 | return FALSE; | |
12472 | ||
fe33d2fa CL |
12473 | /* Process stub sections (eg BE8 encoding, ...). */ |
12474 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
7292b3ac | 12475 | unsigned int i; |
cdb21a0a NS |
12476 | for (i=0; i<htab->top_id; i++) |
12477 | { | |
12478 | sec = htab->stub_group[i].stub_sec; | |
12479 | /* Only process it once, in its link_sec slot. */ | |
12480 | if (sec && i == htab->stub_group[i].link_sec->id) | |
12481 | { | |
12482 | osec = sec->output_section; | |
12483 | elf32_arm_write_section (abfd, info, sec, sec->contents); | |
12484 | if (! bfd_set_section_contents (abfd, osec, sec->contents, | |
12485 | sec->output_offset, sec->size)) | |
12486 | return FALSE; | |
12487 | } | |
fe33d2fa | 12488 | } |
fe33d2fa | 12489 | |
3e6b1042 DJ |
12490 | /* Write out any glue sections now that we have created all the |
12491 | stubs. */ | |
12492 | if (globals->bfd_of_glue_owner != NULL) | |
12493 | { | |
12494 | if (! elf32_arm_output_glue_section (info, abfd, | |
12495 | globals->bfd_of_glue_owner, | |
12496 | ARM2THUMB_GLUE_SECTION_NAME)) | |
12497 | return FALSE; | |
12498 | ||
12499 | if (! elf32_arm_output_glue_section (info, abfd, | |
12500 | globals->bfd_of_glue_owner, | |
12501 | THUMB2ARM_GLUE_SECTION_NAME)) | |
12502 | return FALSE; | |
12503 | ||
12504 | if (! elf32_arm_output_glue_section (info, abfd, | |
12505 | globals->bfd_of_glue_owner, | |
12506 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
12507 | return FALSE; | |
12508 | ||
a504d23a LA |
12509 | if (! elf32_arm_output_glue_section (info, abfd, |
12510 | globals->bfd_of_glue_owner, | |
12511 | STM32L4XX_ERRATUM_VENEER_SECTION_NAME)) | |
12512 | return FALSE; | |
12513 | ||
3e6b1042 DJ |
12514 | if (! elf32_arm_output_glue_section (info, abfd, |
12515 | globals->bfd_of_glue_owner, | |
12516 | ARM_BX_GLUE_SECTION_NAME)) | |
12517 | return FALSE; | |
12518 | } | |
12519 | ||
12520 | return TRUE; | |
12521 | } | |
12522 | ||
5968a7b8 NC |
12523 | /* Return a best guess for the machine number based on the attributes. */ |
12524 | ||
12525 | static unsigned int | |
12526 | bfd_arm_get_mach_from_attributes (bfd * abfd) | |
12527 | { | |
12528 | int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch); | |
12529 | ||
12530 | switch (arch) | |
12531 | { | |
12532 | case TAG_CPU_ARCH_V4: return bfd_mach_arm_4; | |
12533 | case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T; | |
12534 | case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T; | |
12535 | ||
12536 | case TAG_CPU_ARCH_V5TE: | |
12537 | { | |
12538 | char * name; | |
12539 | ||
12540 | BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES); | |
12541 | name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s; | |
12542 | ||
12543 | if (name) | |
12544 | { | |
12545 | if (strcmp (name, "IWMMXT2") == 0) | |
12546 | return bfd_mach_arm_iWMMXt2; | |
12547 | ||
12548 | if (strcmp (name, "IWMMXT") == 0) | |
6034aab8 | 12549 | return bfd_mach_arm_iWMMXt; |
088ca6c1 NC |
12550 | |
12551 | if (strcmp (name, "XSCALE") == 0) | |
12552 | { | |
12553 | int wmmx; | |
12554 | ||
12555 | BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES); | |
12556 | wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i; | |
12557 | switch (wmmx) | |
12558 | { | |
12559 | case 1: return bfd_mach_arm_iWMMXt; | |
12560 | case 2: return bfd_mach_arm_iWMMXt2; | |
12561 | default: return bfd_mach_arm_XScale; | |
12562 | } | |
12563 | } | |
5968a7b8 NC |
12564 | } |
12565 | ||
12566 | return bfd_mach_arm_5TE; | |
12567 | } | |
12568 | ||
12569 | default: | |
12570 | return bfd_mach_arm_unknown; | |
12571 | } | |
12572 | } | |
12573 | ||
c178919b NC |
12574 | /* Set the right machine number. */ |
12575 | ||
12576 | static bfd_boolean | |
57e8b36a | 12577 | elf32_arm_object_p (bfd *abfd) |
c178919b | 12578 | { |
5a6c6817 | 12579 | unsigned int mach; |
57e8b36a | 12580 | |
5a6c6817 | 12581 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 12582 | |
5968a7b8 NC |
12583 | if (mach == bfd_mach_arm_unknown) |
12584 | { | |
12585 | if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
12586 | mach = bfd_mach_arm_ep9312; | |
12587 | else | |
12588 | mach = bfd_arm_get_mach_from_attributes (abfd); | |
12589 | } | |
c178919b | 12590 | |
5968a7b8 | 12591 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
c178919b NC |
12592 | return TRUE; |
12593 | } | |
12594 | ||
fc830a83 | 12595 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 12596 | |
b34976b6 | 12597 | static bfd_boolean |
57e8b36a | 12598 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
12599 | { |
12600 | if (elf_flags_init (abfd) | |
12601 | && elf_elfheader (abfd)->e_flags != flags) | |
12602 | { | |
fc830a83 NC |
12603 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
12604 | { | |
fd2ec330 | 12605 | if (flags & EF_ARM_INTERWORK) |
d003868e AM |
12606 | (*_bfd_error_handler) |
12607 | (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), | |
12608 | abfd); | |
fc830a83 | 12609 | else |
d003868e AM |
12610 | _bfd_error_handler |
12611 | (_("Warning: Clearing the interworking flag of %B due to outside request"), | |
12612 | abfd); | |
fc830a83 | 12613 | } |
252b5132 RH |
12614 | } |
12615 | else | |
12616 | { | |
12617 | elf_elfheader (abfd)->e_flags = flags; | |
b34976b6 | 12618 | elf_flags_init (abfd) = TRUE; |
252b5132 RH |
12619 | } |
12620 | ||
b34976b6 | 12621 | return TRUE; |
252b5132 RH |
12622 | } |
12623 | ||
fc830a83 | 12624 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 12625 | |
b34976b6 | 12626 | static bfd_boolean |
57e8b36a | 12627 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
12628 | { |
12629 | flagword in_flags; | |
12630 | flagword out_flags; | |
12631 | ||
0ffa91dd | 12632 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
b34976b6 | 12633 | return TRUE; |
252b5132 | 12634 | |
fc830a83 | 12635 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
12636 | out_flags = elf_elfheader (obfd)->e_flags; |
12637 | ||
fc830a83 NC |
12638 | if (elf_flags_init (obfd) |
12639 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
12640 | && in_flags != out_flags) | |
252b5132 | 12641 | { |
252b5132 | 12642 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 12643 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
b34976b6 | 12644 | return FALSE; |
252b5132 RH |
12645 | |
12646 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 12647 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
b34976b6 | 12648 | return FALSE; |
252b5132 RH |
12649 | |
12650 | /* If the src and dest have different interworking flags | |
99059e56 | 12651 | then turn off the interworking bit. */ |
fd2ec330 | 12652 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 12653 | { |
fd2ec330 | 12654 | if (out_flags & EF_ARM_INTERWORK) |
d003868e AM |
12655 | _bfd_error_handler |
12656 | (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), | |
12657 | obfd, ibfd); | |
252b5132 | 12658 | |
fd2ec330 | 12659 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 12660 | } |
1006ba19 PB |
12661 | |
12662 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
12663 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
12664 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
12665 | } |
12666 | ||
12667 | elf_elfheader (obfd)->e_flags = in_flags; | |
b34976b6 | 12668 | elf_flags_init (obfd) = TRUE; |
252b5132 | 12669 | |
e2349352 | 12670 | return _bfd_elf_copy_private_bfd_data (ibfd, obfd); |
ee065d83 PB |
12671 | } |
12672 | ||
12673 | /* Values for Tag_ABI_PCS_R9_use. */ | |
12674 | enum | |
12675 | { | |
12676 | AEABI_R9_V6, | |
12677 | AEABI_R9_SB, | |
12678 | AEABI_R9_TLS, | |
12679 | AEABI_R9_unused | |
12680 | }; | |
12681 | ||
12682 | /* Values for Tag_ABI_PCS_RW_data. */ | |
12683 | enum | |
12684 | { | |
12685 | AEABI_PCS_RW_data_absolute, | |
12686 | AEABI_PCS_RW_data_PCrel, | |
12687 | AEABI_PCS_RW_data_SBrel, | |
12688 | AEABI_PCS_RW_data_unused | |
12689 | }; | |
12690 | ||
12691 | /* Values for Tag_ABI_enum_size. */ | |
12692 | enum | |
12693 | { | |
12694 | AEABI_enum_unused, | |
12695 | AEABI_enum_short, | |
12696 | AEABI_enum_wide, | |
12697 | AEABI_enum_forced_wide | |
12698 | }; | |
12699 | ||
104d59d1 JM |
12700 | /* Determine whether an object attribute tag takes an integer, a |
12701 | string or both. */ | |
906e58ca | 12702 | |
104d59d1 JM |
12703 | static int |
12704 | elf32_arm_obj_attrs_arg_type (int tag) | |
12705 | { | |
12706 | if (tag == Tag_compatibility) | |
3483fe2e | 12707 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 12708 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
12709 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
12710 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
12711 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 12712 | else if (tag < 32) |
3483fe2e | 12713 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 12714 | else |
3483fe2e | 12715 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
12716 | } |
12717 | ||
5aa6ff7c AS |
12718 | /* The ABI defines that Tag_conformance should be emitted first, and that |
12719 | Tag_nodefaults should be second (if either is defined). This sets those | |
12720 | two positions, and bumps up the position of all the remaining tags to | |
12721 | compensate. */ | |
12722 | static int | |
12723 | elf32_arm_obj_attrs_order (int num) | |
12724 | { | |
3de4a297 | 12725 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) |
5aa6ff7c | 12726 | return Tag_conformance; |
3de4a297 | 12727 | if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) |
5aa6ff7c AS |
12728 | return Tag_nodefaults; |
12729 | if ((num - 2) < Tag_nodefaults) | |
12730 | return num - 2; | |
12731 | if ((num - 1) < Tag_conformance) | |
12732 | return num - 1; | |
12733 | return num; | |
12734 | } | |
12735 | ||
e8b36cd1 JM |
12736 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ |
12737 | static bfd_boolean | |
12738 | elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) | |
12739 | { | |
12740 | if ((tag & 127) < 64) | |
12741 | { | |
12742 | _bfd_error_handler | |
12743 | (_("%B: Unknown mandatory EABI object attribute %d"), | |
12744 | abfd, tag); | |
12745 | bfd_set_error (bfd_error_bad_value); | |
12746 | return FALSE; | |
12747 | } | |
12748 | else | |
12749 | { | |
12750 | _bfd_error_handler | |
12751 | (_("Warning: %B: Unknown EABI object attribute %d"), | |
12752 | abfd, tag); | |
12753 | return TRUE; | |
12754 | } | |
12755 | } | |
12756 | ||
91e22acd AS |
12757 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
12758 | Returns -1 if no architecture could be read. */ | |
12759 | ||
12760 | static int | |
12761 | get_secondary_compatible_arch (bfd *abfd) | |
12762 | { | |
12763 | obj_attribute *attr = | |
12764 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
12765 | ||
12766 | /* Note: the tag and its argument below are uleb128 values, though | |
12767 | currently-defined values fit in one byte for each. */ | |
12768 | if (attr->s | |
12769 | && attr->s[0] == Tag_CPU_arch | |
12770 | && (attr->s[1] & 128) != 128 | |
12771 | && attr->s[2] == 0) | |
12772 | return attr->s[1]; | |
12773 | ||
12774 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
12775 | return -1; | |
12776 | } | |
12777 | ||
12778 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
12779 | The tag is removed if ARCH is -1. */ | |
12780 | ||
8e79c3df | 12781 | static void |
91e22acd | 12782 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 12783 | { |
91e22acd AS |
12784 | obj_attribute *attr = |
12785 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 12786 | |
91e22acd AS |
12787 | if (arch == -1) |
12788 | { | |
12789 | attr->s = NULL; | |
12790 | return; | |
8e79c3df | 12791 | } |
91e22acd AS |
12792 | |
12793 | /* Note: the tag and its argument below are uleb128 values, though | |
12794 | currently-defined values fit in one byte for each. */ | |
12795 | if (!attr->s) | |
21d799b5 | 12796 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
12797 | attr->s[0] = Tag_CPU_arch; |
12798 | attr->s[1] = arch; | |
12799 | attr->s[2] = '\0'; | |
8e79c3df CM |
12800 | } |
12801 | ||
91e22acd AS |
12802 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
12803 | into account. */ | |
12804 | ||
12805 | static int | |
12806 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
12807 | int newtag, int secondary_compat) | |
8e79c3df | 12808 | { |
91e22acd AS |
12809 | #define T(X) TAG_CPU_ARCH_##X |
12810 | int tagl, tagh, result; | |
12811 | const int v6t2[] = | |
12812 | { | |
12813 | T(V6T2), /* PRE_V4. */ | |
12814 | T(V6T2), /* V4. */ | |
12815 | T(V6T2), /* V4T. */ | |
12816 | T(V6T2), /* V5T. */ | |
12817 | T(V6T2), /* V5TE. */ | |
12818 | T(V6T2), /* V5TEJ. */ | |
12819 | T(V6T2), /* V6. */ | |
12820 | T(V7), /* V6KZ. */ | |
12821 | T(V6T2) /* V6T2. */ | |
12822 | }; | |
12823 | const int v6k[] = | |
12824 | { | |
12825 | T(V6K), /* PRE_V4. */ | |
12826 | T(V6K), /* V4. */ | |
12827 | T(V6K), /* V4T. */ | |
12828 | T(V6K), /* V5T. */ | |
12829 | T(V6K), /* V5TE. */ | |
12830 | T(V6K), /* V5TEJ. */ | |
12831 | T(V6K), /* V6. */ | |
12832 | T(V6KZ), /* V6KZ. */ | |
12833 | T(V7), /* V6T2. */ | |
12834 | T(V6K) /* V6K. */ | |
12835 | }; | |
12836 | const int v7[] = | |
12837 | { | |
12838 | T(V7), /* PRE_V4. */ | |
12839 | T(V7), /* V4. */ | |
12840 | T(V7), /* V4T. */ | |
12841 | T(V7), /* V5T. */ | |
12842 | T(V7), /* V5TE. */ | |
12843 | T(V7), /* V5TEJ. */ | |
12844 | T(V7), /* V6. */ | |
12845 | T(V7), /* V6KZ. */ | |
12846 | T(V7), /* V6T2. */ | |
12847 | T(V7), /* V6K. */ | |
12848 | T(V7) /* V7. */ | |
12849 | }; | |
12850 | const int v6_m[] = | |
12851 | { | |
12852 | -1, /* PRE_V4. */ | |
12853 | -1, /* V4. */ | |
12854 | T(V6K), /* V4T. */ | |
12855 | T(V6K), /* V5T. */ | |
12856 | T(V6K), /* V5TE. */ | |
12857 | T(V6K), /* V5TEJ. */ | |
12858 | T(V6K), /* V6. */ | |
12859 | T(V6KZ), /* V6KZ. */ | |
12860 | T(V7), /* V6T2. */ | |
12861 | T(V6K), /* V6K. */ | |
12862 | T(V7), /* V7. */ | |
12863 | T(V6_M) /* V6_M. */ | |
12864 | }; | |
12865 | const int v6s_m[] = | |
12866 | { | |
12867 | -1, /* PRE_V4. */ | |
12868 | -1, /* V4. */ | |
12869 | T(V6K), /* V4T. */ | |
12870 | T(V6K), /* V5T. */ | |
12871 | T(V6K), /* V5TE. */ | |
12872 | T(V6K), /* V5TEJ. */ | |
12873 | T(V6K), /* V6. */ | |
12874 | T(V6KZ), /* V6KZ. */ | |
12875 | T(V7), /* V6T2. */ | |
12876 | T(V6K), /* V6K. */ | |
12877 | T(V7), /* V7. */ | |
12878 | T(V6S_M), /* V6_M. */ | |
12879 | T(V6S_M) /* V6S_M. */ | |
12880 | }; | |
9e3c6df6 PB |
12881 | const int v7e_m[] = |
12882 | { | |
12883 | -1, /* PRE_V4. */ | |
12884 | -1, /* V4. */ | |
12885 | T(V7E_M), /* V4T. */ | |
12886 | T(V7E_M), /* V5T. */ | |
12887 | T(V7E_M), /* V5TE. */ | |
12888 | T(V7E_M), /* V5TEJ. */ | |
12889 | T(V7E_M), /* V6. */ | |
12890 | T(V7E_M), /* V6KZ. */ | |
12891 | T(V7E_M), /* V6T2. */ | |
12892 | T(V7E_M), /* V6K. */ | |
12893 | T(V7E_M), /* V7. */ | |
12894 | T(V7E_M), /* V6_M. */ | |
12895 | T(V7E_M), /* V6S_M. */ | |
12896 | T(V7E_M) /* V7E_M. */ | |
12897 | }; | |
bca38921 MGD |
12898 | const int v8[] = |
12899 | { | |
12900 | T(V8), /* PRE_V4. */ | |
12901 | T(V8), /* V4. */ | |
12902 | T(V8), /* V4T. */ | |
12903 | T(V8), /* V5T. */ | |
12904 | T(V8), /* V5TE. */ | |
12905 | T(V8), /* V5TEJ. */ | |
12906 | T(V8), /* V6. */ | |
12907 | T(V8), /* V6KZ. */ | |
12908 | T(V8), /* V6T2. */ | |
12909 | T(V8), /* V6K. */ | |
12910 | T(V8), /* V7. */ | |
12911 | T(V8), /* V6_M. */ | |
12912 | T(V8), /* V6S_M. */ | |
12913 | T(V8), /* V7E_M. */ | |
12914 | T(V8) /* V8. */ | |
12915 | }; | |
2fd158eb TP |
12916 | const int v8m_baseline[] = |
12917 | { | |
12918 | -1, /* PRE_V4. */ | |
12919 | -1, /* V4. */ | |
12920 | -1, /* V4T. */ | |
12921 | -1, /* V5T. */ | |
12922 | -1, /* V5TE. */ | |
12923 | -1, /* V5TEJ. */ | |
12924 | -1, /* V6. */ | |
12925 | -1, /* V6KZ. */ | |
12926 | -1, /* V6T2. */ | |
12927 | -1, /* V6K. */ | |
12928 | -1, /* V7. */ | |
12929 | T(V8M_BASE), /* V6_M. */ | |
12930 | T(V8M_BASE), /* V6S_M. */ | |
12931 | -1, /* V7E_M. */ | |
12932 | -1, /* V8. */ | |
12933 | -1, | |
12934 | T(V8M_BASE) /* V8-M BASELINE. */ | |
12935 | }; | |
12936 | const int v8m_mainline[] = | |
12937 | { | |
12938 | -1, /* PRE_V4. */ | |
12939 | -1, /* V4. */ | |
12940 | -1, /* V4T. */ | |
12941 | -1, /* V5T. */ | |
12942 | -1, /* V5TE. */ | |
12943 | -1, /* V5TEJ. */ | |
12944 | -1, /* V6. */ | |
12945 | -1, /* V6KZ. */ | |
12946 | -1, /* V6T2. */ | |
12947 | -1, /* V6K. */ | |
12948 | T(V8M_MAIN), /* V7. */ | |
12949 | T(V8M_MAIN), /* V6_M. */ | |
12950 | T(V8M_MAIN), /* V6S_M. */ | |
12951 | T(V8M_MAIN), /* V7E_M. */ | |
12952 | -1, /* V8. */ | |
12953 | -1, | |
12954 | T(V8M_MAIN), /* V8-M BASELINE. */ | |
12955 | T(V8M_MAIN) /* V8-M MAINLINE. */ | |
12956 | }; | |
91e22acd AS |
12957 | const int v4t_plus_v6_m[] = |
12958 | { | |
12959 | -1, /* PRE_V4. */ | |
12960 | -1, /* V4. */ | |
12961 | T(V4T), /* V4T. */ | |
12962 | T(V5T), /* V5T. */ | |
12963 | T(V5TE), /* V5TE. */ | |
12964 | T(V5TEJ), /* V5TEJ. */ | |
12965 | T(V6), /* V6. */ | |
12966 | T(V6KZ), /* V6KZ. */ | |
12967 | T(V6T2), /* V6T2. */ | |
12968 | T(V6K), /* V6K. */ | |
12969 | T(V7), /* V7. */ | |
12970 | T(V6_M), /* V6_M. */ | |
12971 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 12972 | T(V7E_M), /* V7E_M. */ |
bca38921 | 12973 | T(V8), /* V8. */ |
4ed7ed8d | 12974 | -1, /* Unused. */ |
2fd158eb TP |
12975 | T(V8M_BASE), /* V8-M BASELINE. */ |
12976 | T(V8M_MAIN), /* V8-M MAINLINE. */ | |
91e22acd AS |
12977 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
12978 | }; | |
12979 | const int *comb[] = | |
12980 | { | |
12981 | v6t2, | |
12982 | v6k, | |
12983 | v7, | |
12984 | v6_m, | |
12985 | v6s_m, | |
9e3c6df6 | 12986 | v7e_m, |
bca38921 | 12987 | v8, |
4ed7ed8d | 12988 | NULL, |
2fd158eb TP |
12989 | v8m_baseline, |
12990 | v8m_mainline, | |
91e22acd AS |
12991 | /* Pseudo-architecture. */ |
12992 | v4t_plus_v6_m | |
12993 | }; | |
12994 | ||
12995 | /* Check we've not got a higher architecture than we know about. */ | |
12996 | ||
9e3c6df6 | 12997 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 12998 | { |
3895f852 | 12999 | _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd); |
91e22acd AS |
13000 | return -1; |
13001 | } | |
13002 | ||
13003 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
13004 | ||
13005 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
13006 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
13007 | oldtag = T(V4T_PLUS_V6_M); | |
13008 | ||
13009 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
13010 | input. */ | |
13011 | ||
13012 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
13013 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
13014 | newtag = T(V4T_PLUS_V6_M); | |
13015 | ||
13016 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
13017 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
13018 | ||
13019 | /* Architectures before V6KZ add features monotonically. */ | |
13020 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
13021 | return result; | |
13022 | ||
4ed7ed8d | 13023 | result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1; |
91e22acd AS |
13024 | |
13025 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
13026 | as the canonical version. */ | |
13027 | if (result == T(V4T_PLUS_V6_M)) | |
13028 | { | |
13029 | result = T(V4T); | |
13030 | *secondary_compat_out = T(V6_M); | |
13031 | } | |
13032 | else | |
13033 | *secondary_compat_out = -1; | |
13034 | ||
13035 | if (result == -1) | |
13036 | { | |
3895f852 | 13037 | _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"), |
91e22acd AS |
13038 | ibfd, oldtag, newtag); |
13039 | return -1; | |
13040 | } | |
13041 | ||
13042 | return result; | |
13043 | #undef T | |
8e79c3df CM |
13044 | } |
13045 | ||
ac56ee8f MGD |
13046 | /* Query attributes object to see if integer divide instructions may be |
13047 | present in an object. */ | |
13048 | static bfd_boolean | |
13049 | elf32_arm_attributes_accept_div (const obj_attribute *attr) | |
13050 | { | |
13051 | int arch = attr[Tag_CPU_arch].i; | |
13052 | int profile = attr[Tag_CPU_arch_profile].i; | |
13053 | ||
13054 | switch (attr[Tag_DIV_use].i) | |
13055 | { | |
13056 | case 0: | |
13057 | /* Integer divide allowed if instruction contained in archetecture. */ | |
13058 | if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) | |
13059 | return TRUE; | |
13060 | else if (arch >= TAG_CPU_ARCH_V7E_M) | |
13061 | return TRUE; | |
13062 | else | |
13063 | return FALSE; | |
13064 | ||
13065 | case 1: | |
13066 | /* Integer divide explicitly prohibited. */ | |
13067 | return FALSE; | |
13068 | ||
13069 | default: | |
13070 | /* Unrecognised case - treat as allowing divide everywhere. */ | |
13071 | case 2: | |
13072 | /* Integer divide allowed in ARM state. */ | |
13073 | return TRUE; | |
13074 | } | |
13075 | } | |
13076 | ||
13077 | /* Query attributes object to see if integer divide instructions are | |
13078 | forbidden to be in the object. This is not the inverse of | |
13079 | elf32_arm_attributes_accept_div. */ | |
13080 | static bfd_boolean | |
13081 | elf32_arm_attributes_forbid_div (const obj_attribute *attr) | |
13082 | { | |
13083 | return attr[Tag_DIV_use].i == 1; | |
13084 | } | |
13085 | ||
ee065d83 PB |
13086 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
13087 | are conflicting attributes. */ | |
906e58ca | 13088 | |
ee065d83 PB |
13089 | static bfd_boolean |
13090 | elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) | |
13091 | { | |
104d59d1 JM |
13092 | obj_attribute *in_attr; |
13093 | obj_attribute *out_attr; | |
ee065d83 PB |
13094 | /* Some tags have 0 = don't care, 1 = strong requirement, |
13095 | 2 = weak requirement. */ | |
91e22acd | 13096 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 13097 | int i; |
91e22acd | 13098 | bfd_boolean result = TRUE; |
9274e9de | 13099 | const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section; |
ee065d83 | 13100 | |
3e6b1042 DJ |
13101 | /* Skip the linker stubs file. This preserves previous behavior |
13102 | of accepting unknown attributes in the first input file - but | |
13103 | is that a bug? */ | |
13104 | if (ibfd->flags & BFD_LINKER_CREATED) | |
13105 | return TRUE; | |
13106 | ||
9274e9de TG |
13107 | /* Skip any input that hasn't attribute section. |
13108 | This enables to link object files without attribute section with | |
13109 | any others. */ | |
13110 | if (bfd_get_section_by_name (ibfd, sec_name) == NULL) | |
13111 | return TRUE; | |
13112 | ||
104d59d1 | 13113 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
13114 | { |
13115 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 13116 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 | 13117 | |
cd21e546 MGD |
13118 | out_attr = elf_known_obj_attributes_proc (obfd); |
13119 | ||
004ae526 PB |
13120 | /* Use the Tag_null value to indicate the attributes have been |
13121 | initialized. */ | |
cd21e546 | 13122 | out_attr[0].i = 1; |
004ae526 | 13123 | |
cd21e546 MGD |
13124 | /* We do not output objects with Tag_MPextension_use_legacy - we move |
13125 | the attribute's value to Tag_MPextension_use. */ | |
13126 | if (out_attr[Tag_MPextension_use_legacy].i != 0) | |
13127 | { | |
13128 | if (out_attr[Tag_MPextension_use].i != 0 | |
13129 | && out_attr[Tag_MPextension_use_legacy].i | |
99059e56 | 13130 | != out_attr[Tag_MPextension_use].i) |
cd21e546 MGD |
13131 | { |
13132 | _bfd_error_handler | |
13133 | (_("Error: %B has both the current and legacy " | |
13134 | "Tag_MPextension_use attributes"), ibfd); | |
13135 | result = FALSE; | |
13136 | } | |
13137 | ||
13138 | out_attr[Tag_MPextension_use] = | |
13139 | out_attr[Tag_MPextension_use_legacy]; | |
13140 | out_attr[Tag_MPextension_use_legacy].type = 0; | |
13141 | out_attr[Tag_MPextension_use_legacy].i = 0; | |
13142 | } | |
13143 | ||
13144 | return result; | |
ee065d83 PB |
13145 | } |
13146 | ||
104d59d1 JM |
13147 | in_attr = elf_known_obj_attributes_proc (ibfd); |
13148 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
13149 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
13150 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
13151 | { | |
5c294fee TG |
13152 | /* Ignore mismatches if the object doesn't use floating point or is |
13153 | floating point ABI independent. */ | |
13154 | if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none | |
13155 | || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none | |
13156 | && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible)) | |
ee065d83 | 13157 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; |
5c294fee TG |
13158 | else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none |
13159 | && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible) | |
ee065d83 PB |
13160 | { |
13161 | _bfd_error_handler | |
3895f852 | 13162 | (_("error: %B uses VFP register arguments, %B does not"), |
deddc40b NS |
13163 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
13164 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
91e22acd | 13165 | result = FALSE; |
ee065d83 PB |
13166 | } |
13167 | } | |
13168 | ||
3de4a297 | 13169 | for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
13170 | { |
13171 | /* Merge this attribute with existing attributes. */ | |
13172 | switch (i) | |
13173 | { | |
13174 | case Tag_CPU_raw_name: | |
13175 | case Tag_CPU_name: | |
6a631e86 | 13176 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
13177 | break; |
13178 | ||
13179 | case Tag_ABI_optimization_goals: | |
13180 | case Tag_ABI_FP_optimization_goals: | |
13181 | /* Use the first value seen. */ | |
13182 | break; | |
13183 | ||
13184 | case Tag_CPU_arch: | |
91e22acd AS |
13185 | { |
13186 | int secondary_compat = -1, secondary_compat_out = -1; | |
13187 | unsigned int saved_out_attr = out_attr[i].i; | |
70e99720 TG |
13188 | int arch_attr; |
13189 | static const char *name_table[] = | |
13190 | { | |
91e22acd AS |
13191 | /* These aren't real CPU names, but we can't guess |
13192 | that from the architecture version alone. */ | |
13193 | "Pre v4", | |
13194 | "ARM v4", | |
13195 | "ARM v4T", | |
13196 | "ARM v5T", | |
13197 | "ARM v5TE", | |
13198 | "ARM v5TEJ", | |
13199 | "ARM v6", | |
13200 | "ARM v6KZ", | |
13201 | "ARM v6T2", | |
13202 | "ARM v6K", | |
13203 | "ARM v7", | |
13204 | "ARM v6-M", | |
bca38921 | 13205 | "ARM v6S-M", |
2fd158eb TP |
13206 | "ARM v8", |
13207 | "", | |
13208 | "ARM v8-M.baseline", | |
13209 | "ARM v8-M.mainline", | |
91e22acd AS |
13210 | }; |
13211 | ||
13212 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
13213 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
13214 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
70e99720 TG |
13215 | arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i, |
13216 | &secondary_compat_out, | |
13217 | in_attr[i].i, | |
13218 | secondary_compat); | |
13219 | ||
13220 | /* Return with error if failed to merge. */ | |
13221 | if (arch_attr == -1) | |
13222 | return FALSE; | |
13223 | ||
13224 | out_attr[i].i = arch_attr; | |
13225 | ||
91e22acd AS |
13226 | set_secondary_compatible_arch (obfd, secondary_compat_out); |
13227 | ||
13228 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
13229 | if (out_attr[i].i == saved_out_attr) | |
13230 | ; /* Leave the names alone. */ | |
13231 | else if (out_attr[i].i == in_attr[i].i) | |
13232 | { | |
13233 | /* The output architecture has been changed to match the | |
13234 | input architecture. Use the input names. */ | |
13235 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
13236 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
13237 | : NULL; | |
13238 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
13239 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
13240 | : NULL; | |
13241 | } | |
13242 | else | |
13243 | { | |
13244 | out_attr[Tag_CPU_name].s = NULL; | |
13245 | out_attr[Tag_CPU_raw_name].s = NULL; | |
13246 | } | |
13247 | ||
13248 | /* If we still don't have a value for Tag_CPU_name, | |
13249 | make one up now. Tag_CPU_raw_name remains blank. */ | |
13250 | if (out_attr[Tag_CPU_name].s == NULL | |
13251 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
13252 | out_attr[Tag_CPU_name].s = | |
13253 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
13254 | } | |
13255 | break; | |
13256 | ||
ee065d83 PB |
13257 | case Tag_ARM_ISA_use: |
13258 | case Tag_THUMB_ISA_use: | |
ee065d83 | 13259 | case Tag_WMMX_arch: |
91e22acd AS |
13260 | case Tag_Advanced_SIMD_arch: |
13261 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 13262 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
13263 | case Tag_ABI_FP_exceptions: |
13264 | case Tag_ABI_FP_user_exceptions: | |
13265 | case Tag_ABI_FP_number_model: | |
75375b3e | 13266 | case Tag_FP_HP_extension: |
91e22acd AS |
13267 | case Tag_CPU_unaligned_access: |
13268 | case Tag_T2EE_use: | |
91e22acd | 13269 | case Tag_MPextension_use: |
ee065d83 PB |
13270 | /* Use the largest value specified. */ |
13271 | if (in_attr[i].i > out_attr[i].i) | |
13272 | out_attr[i].i = in_attr[i].i; | |
13273 | break; | |
13274 | ||
75375b3e | 13275 | case Tag_ABI_align_preserved: |
91e22acd AS |
13276 | case Tag_ABI_PCS_RO_data: |
13277 | /* Use the smallest value specified. */ | |
13278 | if (in_attr[i].i < out_attr[i].i) | |
13279 | out_attr[i].i = in_attr[i].i; | |
13280 | break; | |
13281 | ||
75375b3e | 13282 | case Tag_ABI_align_needed: |
91e22acd | 13283 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) |
75375b3e MGD |
13284 | && (in_attr[Tag_ABI_align_preserved].i == 0 |
13285 | || out_attr[Tag_ABI_align_preserved].i == 0)) | |
ee065d83 | 13286 | { |
91e22acd AS |
13287 | /* This error message should be enabled once all non-conformant |
13288 | binaries in the toolchain have had the attributes set | |
13289 | properly. | |
ee065d83 | 13290 | _bfd_error_handler |
3895f852 | 13291 | (_("error: %B: 8-byte data alignment conflicts with %B"), |
91e22acd AS |
13292 | obfd, ibfd); |
13293 | result = FALSE; */ | |
ee065d83 | 13294 | } |
91e22acd AS |
13295 | /* Fall through. */ |
13296 | case Tag_ABI_FP_denormal: | |
13297 | case Tag_ABI_PCS_GOT_use: | |
13298 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
13299 | value if greater than 2 (for future-proofing). */ | |
13300 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
13301 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
13302 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
13303 | out_attr[i].i = in_attr[i].i; |
13304 | break; | |
91e22acd | 13305 | |
75375b3e MGD |
13306 | case Tag_Virtualization_use: |
13307 | /* The virtualization tag effectively stores two bits of | |
13308 | information: the intended use of TrustZone (in bit 0), and the | |
13309 | intended use of Virtualization (in bit 1). */ | |
13310 | if (out_attr[i].i == 0) | |
13311 | out_attr[i].i = in_attr[i].i; | |
13312 | else if (in_attr[i].i != 0 | |
13313 | && in_attr[i].i != out_attr[i].i) | |
13314 | { | |
13315 | if (in_attr[i].i <= 3 && out_attr[i].i <= 3) | |
13316 | out_attr[i].i = 3; | |
13317 | else | |
13318 | { | |
13319 | _bfd_error_handler | |
13320 | (_("error: %B: unable to merge virtualization attributes " | |
13321 | "with %B"), | |
13322 | obfd, ibfd); | |
13323 | result = FALSE; | |
13324 | } | |
13325 | } | |
13326 | break; | |
91e22acd AS |
13327 | |
13328 | case Tag_CPU_arch_profile: | |
13329 | if (out_attr[i].i != in_attr[i].i) | |
13330 | { | |
13331 | /* 0 will merge with anything. | |
13332 | 'A' and 'S' merge to 'A'. | |
13333 | 'R' and 'S' merge to 'R'. | |
99059e56 | 13334 | 'M' and 'A|R|S' is an error. */ |
91e22acd AS |
13335 | if (out_attr[i].i == 0 |
13336 | || (out_attr[i].i == 'S' | |
13337 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
13338 | out_attr[i].i = in_attr[i].i; | |
13339 | else if (in_attr[i].i == 0 | |
13340 | || (in_attr[i].i == 'S' | |
13341 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
6a631e86 | 13342 | ; /* Do nothing. */ |
91e22acd AS |
13343 | else |
13344 | { | |
13345 | _bfd_error_handler | |
3895f852 | 13346 | (_("error: %B: Conflicting architecture profiles %c/%c"), |
91e22acd AS |
13347 | ibfd, |
13348 | in_attr[i].i ? in_attr[i].i : '0', | |
13349 | out_attr[i].i ? out_attr[i].i : '0'); | |
13350 | result = FALSE; | |
13351 | } | |
13352 | } | |
13353 | break; | |
15afaa63 TP |
13354 | |
13355 | case Tag_DSP_extension: | |
13356 | /* No need to change output value if any of: | |
13357 | - pre (<=) ARMv5T input architecture (do not have DSP) | |
13358 | - M input profile not ARMv7E-M and do not have DSP. */ | |
13359 | if (in_attr[Tag_CPU_arch].i <= 3 | |
13360 | || (in_attr[Tag_CPU_arch_profile].i == 'M' | |
13361 | && in_attr[Tag_CPU_arch].i != 13 | |
13362 | && in_attr[i].i == 0)) | |
13363 | ; /* Do nothing. */ | |
13364 | /* Output value should be 0 if DSP part of architecture, ie. | |
13365 | - post (>=) ARMv5te architecture output | |
13366 | - A, R or S profile output or ARMv7E-M output architecture. */ | |
13367 | else if (out_attr[Tag_CPU_arch].i >= 4 | |
13368 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
13369 | || out_attr[Tag_CPU_arch_profile].i == 'R' | |
13370 | || out_attr[Tag_CPU_arch_profile].i == 'S' | |
13371 | || out_attr[Tag_CPU_arch].i == 13)) | |
13372 | out_attr[i].i = 0; | |
13373 | /* Otherwise, DSP instructions are added and not part of output | |
13374 | architecture. */ | |
13375 | else | |
13376 | out_attr[i].i = 1; | |
13377 | break; | |
13378 | ||
75375b3e | 13379 | case Tag_FP_arch: |
62f3b8c8 | 13380 | { |
4547cb56 NC |
13381 | /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since |
13382 | the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch | |
13383 | when it's 0. It might mean absence of FP hardware if | |
99654aaf | 13384 | Tag_FP_arch is zero. */ |
4547cb56 | 13385 | |
a715796b | 13386 | #define VFP_VERSION_COUNT 9 |
62f3b8c8 PB |
13387 | static const struct |
13388 | { | |
13389 | int ver; | |
13390 | int regs; | |
bca38921 | 13391 | } vfp_versions[VFP_VERSION_COUNT] = |
62f3b8c8 PB |
13392 | { |
13393 | {0, 0}, | |
13394 | {1, 16}, | |
13395 | {2, 16}, | |
13396 | {3, 32}, | |
13397 | {3, 16}, | |
13398 | {4, 32}, | |
bca38921 | 13399 | {4, 16}, |
a715796b TG |
13400 | {8, 32}, |
13401 | {8, 16} | |
62f3b8c8 PB |
13402 | }; |
13403 | int ver; | |
13404 | int regs; | |
13405 | int newval; | |
13406 | ||
4547cb56 NC |
13407 | /* If the output has no requirement about FP hardware, |
13408 | follow the requirement of the input. */ | |
13409 | if (out_attr[i].i == 0) | |
13410 | { | |
13411 | BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); | |
13412 | out_attr[i].i = in_attr[i].i; | |
13413 | out_attr[Tag_ABI_HardFP_use].i | |
13414 | = in_attr[Tag_ABI_HardFP_use].i; | |
13415 | break; | |
13416 | } | |
13417 | /* If the input has no requirement about FP hardware, do | |
13418 | nothing. */ | |
13419 | else if (in_attr[i].i == 0) | |
13420 | { | |
13421 | BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0); | |
13422 | break; | |
13423 | } | |
13424 | ||
13425 | /* Both the input and the output have nonzero Tag_FP_arch. | |
99654aaf | 13426 | So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */ |
4547cb56 NC |
13427 | |
13428 | /* If both the input and the output have zero Tag_ABI_HardFP_use, | |
13429 | do nothing. */ | |
13430 | if (in_attr[Tag_ABI_HardFP_use].i == 0 | |
13431 | && out_attr[Tag_ABI_HardFP_use].i == 0) | |
13432 | ; | |
13433 | /* If the input and the output have different Tag_ABI_HardFP_use, | |
99654aaf | 13434 | the combination of them is 0 (implied by Tag_FP_arch). */ |
4547cb56 NC |
13435 | else if (in_attr[Tag_ABI_HardFP_use].i |
13436 | != out_attr[Tag_ABI_HardFP_use].i) | |
99654aaf | 13437 | out_attr[Tag_ABI_HardFP_use].i = 0; |
4547cb56 NC |
13438 | |
13439 | /* Now we can handle Tag_FP_arch. */ | |
13440 | ||
bca38921 MGD |
13441 | /* Values of VFP_VERSION_COUNT or more aren't defined, so just |
13442 | pick the biggest. */ | |
13443 | if (in_attr[i].i >= VFP_VERSION_COUNT | |
13444 | && in_attr[i].i > out_attr[i].i) | |
62f3b8c8 PB |
13445 | { |
13446 | out_attr[i] = in_attr[i]; | |
13447 | break; | |
13448 | } | |
13449 | /* The output uses the superset of input features | |
13450 | (ISA version) and registers. */ | |
13451 | ver = vfp_versions[in_attr[i].i].ver; | |
13452 | if (ver < vfp_versions[out_attr[i].i].ver) | |
13453 | ver = vfp_versions[out_attr[i].i].ver; | |
13454 | regs = vfp_versions[in_attr[i].i].regs; | |
13455 | if (regs < vfp_versions[out_attr[i].i].regs) | |
13456 | regs = vfp_versions[out_attr[i].i].regs; | |
13457 | /* This assumes all possible supersets are also a valid | |
99059e56 | 13458 | options. */ |
bca38921 | 13459 | for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--) |
62f3b8c8 PB |
13460 | { |
13461 | if (regs == vfp_versions[newval].regs | |
13462 | && ver == vfp_versions[newval].ver) | |
13463 | break; | |
13464 | } | |
13465 | out_attr[i].i = newval; | |
13466 | } | |
b1cc4aeb | 13467 | break; |
ee065d83 PB |
13468 | case Tag_PCS_config: |
13469 | if (out_attr[i].i == 0) | |
13470 | out_attr[i].i = in_attr[i].i; | |
b6009aca | 13471 | else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i) |
ee065d83 PB |
13472 | { |
13473 | /* It's sometimes ok to mix different configs, so this is only | |
99059e56 | 13474 | a warning. */ |
ee065d83 PB |
13475 | _bfd_error_handler |
13476 | (_("Warning: %B: Conflicting platform configuration"), ibfd); | |
13477 | } | |
13478 | break; | |
13479 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
13480 | if (in_attr[i].i != out_attr[i].i |
13481 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
13482 | && in_attr[i].i != AEABI_R9_unused) |
13483 | { | |
13484 | _bfd_error_handler | |
3895f852 | 13485 | (_("error: %B: Conflicting use of R9"), ibfd); |
91e22acd | 13486 | result = FALSE; |
ee065d83 PB |
13487 | } |
13488 | if (out_attr[i].i == AEABI_R9_unused) | |
13489 | out_attr[i].i = in_attr[i].i; | |
13490 | break; | |
13491 | case Tag_ABI_PCS_RW_data: | |
13492 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
13493 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
13494 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
13495 | { | |
13496 | _bfd_error_handler | |
3895f852 | 13497 | (_("error: %B: SB relative addressing conflicts with use of R9"), |
ee065d83 | 13498 | ibfd); |
91e22acd | 13499 | result = FALSE; |
ee065d83 PB |
13500 | } |
13501 | /* Use the smallest value specified. */ | |
13502 | if (in_attr[i].i < out_attr[i].i) | |
13503 | out_attr[i].i = in_attr[i].i; | |
13504 | break; | |
ee065d83 | 13505 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
13506 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
13507 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
13508 | { |
13509 | _bfd_error_handler | |
a9dc9481 JM |
13510 | (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
13511 | ibfd, in_attr[i].i, out_attr[i].i); | |
ee065d83 | 13512 | } |
a9dc9481 | 13513 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
13514 | out_attr[i].i = in_attr[i].i; |
13515 | break; | |
ee065d83 PB |
13516 | case Tag_ABI_enum_size: |
13517 | if (in_attr[i].i != AEABI_enum_unused) | |
13518 | { | |
13519 | if (out_attr[i].i == AEABI_enum_unused | |
13520 | || out_attr[i].i == AEABI_enum_forced_wide) | |
13521 | { | |
13522 | /* The existing object is compatible with anything. | |
13523 | Use whatever requirements the new object has. */ | |
13524 | out_attr[i].i = in_attr[i].i; | |
13525 | } | |
13526 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 13527 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 13528 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 13529 | { |
91e22acd | 13530 | static const char *aeabi_enum_names[] = |
bf21ed78 | 13531 | { "", "variable-size", "32-bit", "" }; |
91e22acd AS |
13532 | const char *in_name = |
13533 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
13534 | ? aeabi_enum_names[in_attr[i].i] | |
13535 | : "<unknown>"; | |
13536 | const char *out_name = | |
13537 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
13538 | ? aeabi_enum_names[out_attr[i].i] | |
13539 | : "<unknown>"; | |
ee065d83 | 13540 | _bfd_error_handler |
bf21ed78 | 13541 | (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 13542 | ibfd, in_name, out_name); |
ee065d83 PB |
13543 | } |
13544 | } | |
13545 | break; | |
13546 | case Tag_ABI_VFP_args: | |
13547 | /* Aready done. */ | |
13548 | break; | |
13549 | case Tag_ABI_WMMX_args: | |
13550 | if (in_attr[i].i != out_attr[i].i) | |
13551 | { | |
13552 | _bfd_error_handler | |
3895f852 | 13553 | (_("error: %B uses iWMMXt register arguments, %B does not"), |
ee065d83 | 13554 | ibfd, obfd); |
91e22acd | 13555 | result = FALSE; |
ee065d83 PB |
13556 | } |
13557 | break; | |
7b86a9fa AS |
13558 | case Tag_compatibility: |
13559 | /* Merged in target-independent code. */ | |
13560 | break; | |
91e22acd | 13561 | case Tag_ABI_HardFP_use: |
4547cb56 | 13562 | /* This is handled along with Tag_FP_arch. */ |
91e22acd AS |
13563 | break; |
13564 | case Tag_ABI_FP_16bit_format: | |
13565 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
13566 | { | |
13567 | if (in_attr[i].i != out_attr[i].i) | |
13568 | { | |
13569 | _bfd_error_handler | |
3895f852 | 13570 | (_("error: fp16 format mismatch between %B and %B"), |
91e22acd AS |
13571 | ibfd, obfd); |
13572 | result = FALSE; | |
13573 | } | |
13574 | } | |
13575 | if (in_attr[i].i != 0) | |
13576 | out_attr[i].i = in_attr[i].i; | |
13577 | break; | |
7b86a9fa | 13578 | |
cd21e546 | 13579 | case Tag_DIV_use: |
ac56ee8f MGD |
13580 | /* A value of zero on input means that the divide instruction may |
13581 | be used if available in the base architecture as specified via | |
13582 | Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that | |
13583 | the user did not want divide instructions. A value of 2 | |
13584 | explicitly means that divide instructions were allowed in ARM | |
13585 | and Thumb state. */ | |
13586 | if (in_attr[i].i == out_attr[i].i) | |
13587 | /* Do nothing. */ ; | |
13588 | else if (elf32_arm_attributes_forbid_div (in_attr) | |
13589 | && !elf32_arm_attributes_accept_div (out_attr)) | |
13590 | out_attr[i].i = 1; | |
13591 | else if (elf32_arm_attributes_forbid_div (out_attr) | |
13592 | && elf32_arm_attributes_accept_div (in_attr)) | |
13593 | out_attr[i].i = in_attr[i].i; | |
13594 | else if (in_attr[i].i == 2) | |
13595 | out_attr[i].i = in_attr[i].i; | |
cd21e546 MGD |
13596 | break; |
13597 | ||
13598 | case Tag_MPextension_use_legacy: | |
13599 | /* We don't output objects with Tag_MPextension_use_legacy - we | |
13600 | move the value to Tag_MPextension_use. */ | |
13601 | if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) | |
13602 | { | |
13603 | if (in_attr[Tag_MPextension_use].i != in_attr[i].i) | |
13604 | { | |
13605 | _bfd_error_handler | |
13606 | (_("%B has has both the current and legacy " | |
b38cadfb | 13607 | "Tag_MPextension_use attributes"), |
cd21e546 MGD |
13608 | ibfd); |
13609 | result = FALSE; | |
13610 | } | |
13611 | } | |
13612 | ||
13613 | if (in_attr[i].i > out_attr[Tag_MPextension_use].i) | |
13614 | out_attr[Tag_MPextension_use] = in_attr[i]; | |
13615 | ||
13616 | break; | |
13617 | ||
91e22acd | 13618 | case Tag_nodefaults: |
2d0bb761 AS |
13619 | /* This tag is set if it exists, but the value is unused (and is |
13620 | typically zero). We don't actually need to do anything here - | |
13621 | the merge happens automatically when the type flags are merged | |
13622 | below. */ | |
91e22acd AS |
13623 | break; |
13624 | case Tag_also_compatible_with: | |
13625 | /* Already done in Tag_CPU_arch. */ | |
13626 | break; | |
13627 | case Tag_conformance: | |
13628 | /* Keep the attribute if it matches. Throw it away otherwise. | |
13629 | No attribute means no claim to conform. */ | |
13630 | if (!in_attr[i].s || !out_attr[i].s | |
13631 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
13632 | out_attr[i].s = NULL; | |
13633 | break; | |
3cfad14c | 13634 | |
91e22acd | 13635 | default: |
e8b36cd1 JM |
13636 | result |
13637 | = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); | |
91e22acd AS |
13638 | } |
13639 | ||
13640 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
13641 | if (in_attr[i].type && !out_attr[i].type) | |
13642 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
13643 | } |
13644 | ||
104d59d1 | 13645 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
5488d830 MGD |
13646 | if (!_bfd_elf_merge_object_attributes (ibfd, obfd)) |
13647 | return FALSE; | |
ee065d83 | 13648 | |
104d59d1 | 13649 | /* Check for any attributes not known on ARM. */ |
e8b36cd1 | 13650 | result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); |
91e22acd | 13651 | |
91e22acd | 13652 | return result; |
252b5132 RH |
13653 | } |
13654 | ||
3a4a14e9 PB |
13655 | |
13656 | /* Return TRUE if the two EABI versions are incompatible. */ | |
13657 | ||
13658 | static bfd_boolean | |
13659 | elf32_arm_versions_compatible (unsigned iver, unsigned over) | |
13660 | { | |
13661 | /* v4 and v5 are the same spec before and after it was released, | |
13662 | so allow mixing them. */ | |
13663 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
13664 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
13665 | return TRUE; | |
13666 | ||
13667 | return (iver == over); | |
13668 | } | |
13669 | ||
252b5132 RH |
13670 | /* Merge backend specific data from an object file to the output |
13671 | object file when linking. */ | |
9b485d32 | 13672 | |
b34976b6 | 13673 | static bfd_boolean |
21d799b5 | 13674 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd); |
252b5132 | 13675 | |
9b485d32 NC |
13676 | /* Display the flags field. */ |
13677 | ||
b34976b6 | 13678 | static bfd_boolean |
57e8b36a | 13679 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 13680 | { |
fc830a83 NC |
13681 | FILE * file = (FILE *) ptr; |
13682 | unsigned long flags; | |
252b5132 RH |
13683 | |
13684 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
13685 | ||
13686 | /* Print normal ELF private data. */ | |
13687 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
13688 | ||
fc830a83 | 13689 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
13690 | /* Ignore init flag - it may not be set, despite the flags field |
13691 | containing valid data. */ | |
252b5132 RH |
13692 | |
13693 | /* xgettext:c-format */ | |
9b485d32 | 13694 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 13695 | |
fc830a83 NC |
13696 | switch (EF_ARM_EABI_VERSION (flags)) |
13697 | { | |
13698 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 13699 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
13700 | official ARM ELF extended ABI. Hence they are only decoded if |
13701 | the EABI version is not set. */ | |
fd2ec330 | 13702 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 13703 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 13704 | |
fd2ec330 | 13705 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 13706 | fprintf (file, " [APCS-26]"); |
fc830a83 | 13707 | else |
6c571f00 | 13708 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 13709 | |
96a846ea RE |
13710 | if (flags & EF_ARM_VFP_FLOAT) |
13711 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
13712 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
13713 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
13714 | else |
13715 | fprintf (file, _(" [FPA float format]")); | |
13716 | ||
fd2ec330 | 13717 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 13718 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 13719 | |
fd2ec330 | 13720 | if (flags & EF_ARM_PIC) |
9b485d32 | 13721 | fprintf (file, _(" [position independent]")); |
fc830a83 | 13722 | |
fd2ec330 | 13723 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 13724 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 13725 | |
fd2ec330 | 13726 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 13727 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 13728 | |
fd2ec330 | 13729 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 13730 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 13731 | |
96a846ea RE |
13732 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
13733 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
13734 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
13735 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 13736 | break; |
9a5aca8c | 13737 | |
fc830a83 | 13738 | case EF_ARM_EABI_VER1: |
9b485d32 | 13739 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 13740 | |
fc830a83 | 13741 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 13742 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 13743 | else |
9b485d32 | 13744 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 13745 | |
fc830a83 NC |
13746 | flags &= ~ EF_ARM_SYMSARESORTED; |
13747 | break; | |
9a5aca8c | 13748 | |
fd2ec330 PB |
13749 | case EF_ARM_EABI_VER2: |
13750 | fprintf (file, _(" [Version2 EABI]")); | |
13751 | ||
13752 | if (flags & EF_ARM_SYMSARESORTED) | |
13753 | fprintf (file, _(" [sorted symbol table]")); | |
13754 | else | |
13755 | fprintf (file, _(" [unsorted symbol table]")); | |
13756 | ||
13757 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
13758 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
13759 | ||
13760 | if (flags & EF_ARM_MAPSYMSFIRST) | |
13761 | fprintf (file, _(" [mapping symbols precede others]")); | |
13762 | ||
99e4ae17 | 13763 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
13764 | | EF_ARM_MAPSYMSFIRST); |
13765 | break; | |
13766 | ||
d507cf36 PB |
13767 | case EF_ARM_EABI_VER3: |
13768 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
13769 | break; |
13770 | ||
13771 | case EF_ARM_EABI_VER4: | |
13772 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 13773 | goto eabi; |
d507cf36 | 13774 | |
3a4a14e9 PB |
13775 | case EF_ARM_EABI_VER5: |
13776 | fprintf (file, _(" [Version5 EABI]")); | |
3bfcb652 NC |
13777 | |
13778 | if (flags & EF_ARM_ABI_FLOAT_SOFT) | |
13779 | fprintf (file, _(" [soft-float ABI]")); | |
13780 | ||
13781 | if (flags & EF_ARM_ABI_FLOAT_HARD) | |
13782 | fprintf (file, _(" [hard-float ABI]")); | |
13783 | ||
13784 | flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD); | |
13785 | ||
3a4a14e9 | 13786 | eabi: |
d507cf36 PB |
13787 | if (flags & EF_ARM_BE8) |
13788 | fprintf (file, _(" [BE8]")); | |
13789 | ||
13790 | if (flags & EF_ARM_LE8) | |
13791 | fprintf (file, _(" [LE8]")); | |
13792 | ||
13793 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
13794 | break; | |
13795 | ||
fc830a83 | 13796 | default: |
9b485d32 | 13797 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
13798 | break; |
13799 | } | |
252b5132 | 13800 | |
fc830a83 | 13801 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 13802 | |
fc830a83 | 13803 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 13804 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 13805 | |
a5721edd | 13806 | flags &= ~EF_ARM_RELEXEC; |
fc830a83 NC |
13807 | |
13808 | if (flags) | |
9b485d32 | 13809 | fprintf (file, _("<Unrecognised flag bits set>")); |
9a5aca8c | 13810 | |
252b5132 RH |
13811 | fputc ('\n', file); |
13812 | ||
b34976b6 | 13813 | return TRUE; |
252b5132 RH |
13814 | } |
13815 | ||
13816 | static int | |
57e8b36a | 13817 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 13818 | { |
2f0ca46a NC |
13819 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
13820 | { | |
13821 | case STT_ARM_TFUNC: | |
13822 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 13823 | |
2f0ca46a NC |
13824 | case STT_ARM_16BIT: |
13825 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
13826 | This allows us to distinguish between data used by Thumb instructions | |
13827 | and non-data (which is probably code) inside Thumb regions of an | |
13828 | executable. */ | |
1a0eb693 | 13829 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
13830 | return ELF_ST_TYPE (elf_sym->st_info); |
13831 | break; | |
9a5aca8c | 13832 | |
ce855c42 NC |
13833 | default: |
13834 | break; | |
2f0ca46a NC |
13835 | } |
13836 | ||
13837 | return type; | |
252b5132 | 13838 | } |
f21f3fe0 | 13839 | |
252b5132 | 13840 | static asection * |
07adf181 AM |
13841 | elf32_arm_gc_mark_hook (asection *sec, |
13842 | struct bfd_link_info *info, | |
13843 | Elf_Internal_Rela *rel, | |
13844 | struct elf_link_hash_entry *h, | |
13845 | Elf_Internal_Sym *sym) | |
252b5132 RH |
13846 | { |
13847 | if (h != NULL) | |
07adf181 | 13848 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
13849 | { |
13850 | case R_ARM_GNU_VTINHERIT: | |
13851 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
13852 | return NULL; |
13853 | } | |
9ad5cbcf | 13854 | |
07adf181 | 13855 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
13856 | } |
13857 | ||
780a67af NC |
13858 | /* Update the got entry reference counts for the section being removed. */ |
13859 | ||
b34976b6 | 13860 | static bfd_boolean |
ba93b8ac DJ |
13861 | elf32_arm_gc_sweep_hook (bfd * abfd, |
13862 | struct bfd_link_info * info, | |
13863 | asection * sec, | |
13864 | const Elf_Internal_Rela * relocs) | |
252b5132 | 13865 | { |
5e681ec4 PB |
13866 | Elf_Internal_Shdr *symtab_hdr; |
13867 | struct elf_link_hash_entry **sym_hashes; | |
13868 | bfd_signed_vma *local_got_refcounts; | |
13869 | const Elf_Internal_Rela *rel, *relend; | |
eb043451 PB |
13870 | struct elf32_arm_link_hash_table * globals; |
13871 | ||
0e1862bb | 13872 | if (bfd_link_relocatable (info)) |
7dda2462 TG |
13873 | return TRUE; |
13874 | ||
eb043451 | 13875 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
13876 | if (globals == NULL) |
13877 | return FALSE; | |
5e681ec4 PB |
13878 | |
13879 | elf_section_data (sec)->local_dynrel = NULL; | |
13880 | ||
0ffa91dd | 13881 | symtab_hdr = & elf_symtab_hdr (abfd); |
5e681ec4 PB |
13882 | sym_hashes = elf_sym_hashes (abfd); |
13883 | local_got_refcounts = elf_local_got_refcounts (abfd); | |
13884 | ||
906e58ca | 13885 | check_use_blx (globals); |
bd97cb95 | 13886 | |
5e681ec4 PB |
13887 | relend = relocs + sec->reloc_count; |
13888 | for (rel = relocs; rel < relend; rel++) | |
eb043451 | 13889 | { |
3eb128b2 AM |
13890 | unsigned long r_symndx; |
13891 | struct elf_link_hash_entry *h = NULL; | |
f6e32f6d | 13892 | struct elf32_arm_link_hash_entry *eh; |
eb043451 | 13893 | int r_type; |
34e77a92 | 13894 | bfd_boolean call_reloc_p; |
f6e32f6d RS |
13895 | bfd_boolean may_become_dynamic_p; |
13896 | bfd_boolean may_need_local_target_p; | |
34e77a92 RS |
13897 | union gotplt_union *root_plt; |
13898 | struct arm_plt_info *arm_plt; | |
5e681ec4 | 13899 | |
3eb128b2 AM |
13900 | r_symndx = ELF32_R_SYM (rel->r_info); |
13901 | if (r_symndx >= symtab_hdr->sh_info) | |
13902 | { | |
13903 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
13904 | while (h->root.type == bfd_link_hash_indirect | |
13905 | || h->root.type == bfd_link_hash_warning) | |
13906 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
13907 | } | |
f6e32f6d RS |
13908 | eh = (struct elf32_arm_link_hash_entry *) h; |
13909 | ||
34e77a92 | 13910 | call_reloc_p = FALSE; |
f6e32f6d RS |
13911 | may_become_dynamic_p = FALSE; |
13912 | may_need_local_target_p = FALSE; | |
3eb128b2 | 13913 | |
eb043451 | 13914 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 13915 | r_type = arm_real_reloc_type (globals, r_type); |
eb043451 PB |
13916 | switch (r_type) |
13917 | { | |
13918 | case R_ARM_GOT32: | |
eb043451 | 13919 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
13920 | case R_ARM_TLS_GD32: |
13921 | case R_ARM_TLS_IE32: | |
3eb128b2 | 13922 | if (h != NULL) |
eb043451 | 13923 | { |
eb043451 PB |
13924 | if (h->got.refcount > 0) |
13925 | h->got.refcount -= 1; | |
13926 | } | |
13927 | else if (local_got_refcounts != NULL) | |
13928 | { | |
13929 | if (local_got_refcounts[r_symndx] > 0) | |
13930 | local_got_refcounts[r_symndx] -= 1; | |
13931 | } | |
13932 | break; | |
13933 | ||
ba93b8ac | 13934 | case R_ARM_TLS_LDM32: |
4dfe6ac6 | 13935 | globals->tls_ldm_got.refcount -= 1; |
ba93b8ac DJ |
13936 | break; |
13937 | ||
eb043451 PB |
13938 | case R_ARM_PC24: |
13939 | case R_ARM_PLT32: | |
5b5bb741 PB |
13940 | case R_ARM_CALL: |
13941 | case R_ARM_JUMP24: | |
eb043451 | 13942 | case R_ARM_PREL31: |
c19d1205 | 13943 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
13944 | case R_ARM_THM_JUMP24: |
13945 | case R_ARM_THM_JUMP19: | |
34e77a92 | 13946 | call_reloc_p = TRUE; |
f6e32f6d RS |
13947 | may_need_local_target_p = TRUE; |
13948 | break; | |
13949 | ||
13950 | case R_ARM_ABS12: | |
13951 | if (!globals->vxworks_p) | |
13952 | { | |
13953 | may_need_local_target_p = TRUE; | |
13954 | break; | |
13955 | } | |
13956 | /* Fall through. */ | |
13957 | case R_ARM_ABS32: | |
13958 | case R_ARM_ABS32_NOI: | |
13959 | case R_ARM_REL32: | |
13960 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
13961 | case R_ARM_MOVW_ABS_NC: |
13962 | case R_ARM_MOVT_ABS: | |
13963 | case R_ARM_MOVW_PREL_NC: | |
13964 | case R_ARM_MOVT_PREL: | |
13965 | case R_ARM_THM_MOVW_ABS_NC: | |
13966 | case R_ARM_THM_MOVT_ABS: | |
13967 | case R_ARM_THM_MOVW_PREL_NC: | |
13968 | case R_ARM_THM_MOVT_PREL: | |
b7693d02 | 13969 | /* Should the interworking branches be here also? */ |
0e1862bb | 13970 | if ((bfd_link_pic (info) || globals->root.is_relocatable_executable) |
34e77a92 RS |
13971 | && (sec->flags & SEC_ALLOC) != 0) |
13972 | { | |
13973 | if (h == NULL | |
469a3493 | 13974 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
34e77a92 RS |
13975 | { |
13976 | call_reloc_p = TRUE; | |
13977 | may_need_local_target_p = TRUE; | |
13978 | } | |
13979 | else | |
13980 | may_become_dynamic_p = TRUE; | |
13981 | } | |
f6e32f6d RS |
13982 | else |
13983 | may_need_local_target_p = TRUE; | |
13984 | break; | |
b7693d02 | 13985 | |
f6e32f6d RS |
13986 | default: |
13987 | break; | |
13988 | } | |
5e681ec4 | 13989 | |
34e77a92 | 13990 | if (may_need_local_target_p |
4ba2ef8f TP |
13991 | && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt, |
13992 | &arm_plt)) | |
f6e32f6d | 13993 | { |
27586251 HPN |
13994 | /* If PLT refcount book-keeping is wrong and too low, we'll |
13995 | see a zero value (going to -1) for the root PLT reference | |
13996 | count. */ | |
13997 | if (root_plt->refcount >= 0) | |
13998 | { | |
13999 | BFD_ASSERT (root_plt->refcount != 0); | |
14000 | root_plt->refcount -= 1; | |
14001 | } | |
14002 | else | |
14003 | /* A value of -1 means the symbol has become local, forced | |
14004 | or seeing a hidden definition. Any other negative value | |
14005 | is an error. */ | |
14006 | BFD_ASSERT (root_plt->refcount == -1); | |
34e77a92 RS |
14007 | |
14008 | if (!call_reloc_p) | |
14009 | arm_plt->noncall_refcount--; | |
5e681ec4 | 14010 | |
f6e32f6d | 14011 | if (r_type == R_ARM_THM_CALL) |
34e77a92 | 14012 | arm_plt->maybe_thumb_refcount--; |
bd97cb95 | 14013 | |
f6e32f6d RS |
14014 | if (r_type == R_ARM_THM_JUMP24 |
14015 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 14016 | arm_plt->thumb_refcount--; |
f6e32f6d | 14017 | } |
5e681ec4 | 14018 | |
34e77a92 | 14019 | if (may_become_dynamic_p) |
f6e32f6d RS |
14020 | { |
14021 | struct elf_dyn_relocs **pp; | |
14022 | struct elf_dyn_relocs *p; | |
5e681ec4 | 14023 | |
34e77a92 | 14024 | if (h != NULL) |
9c489990 | 14025 | pp = &(eh->dyn_relocs); |
34e77a92 RS |
14026 | else |
14027 | { | |
14028 | Elf_Internal_Sym *isym; | |
14029 | ||
14030 | isym = bfd_sym_from_r_symndx (&globals->sym_cache, | |
14031 | abfd, r_symndx); | |
14032 | if (isym == NULL) | |
14033 | return FALSE; | |
14034 | pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); | |
14035 | if (pp == NULL) | |
14036 | return FALSE; | |
14037 | } | |
9c489990 | 14038 | for (; (p = *pp) != NULL; pp = &p->next) |
f6e32f6d RS |
14039 | if (p->sec == sec) |
14040 | { | |
14041 | /* Everything must go for SEC. */ | |
14042 | *pp = p->next; | |
14043 | break; | |
14044 | } | |
eb043451 PB |
14045 | } |
14046 | } | |
5e681ec4 | 14047 | |
b34976b6 | 14048 | return TRUE; |
252b5132 RH |
14049 | } |
14050 | ||
780a67af NC |
14051 | /* Look through the relocs for a section during the first phase. */ |
14052 | ||
b34976b6 | 14053 | static bfd_boolean |
57e8b36a NC |
14054 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
14055 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 14056 | { |
b34976b6 AM |
14057 | Elf_Internal_Shdr *symtab_hdr; |
14058 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
14059 | const Elf_Internal_Rela *rel; |
14060 | const Elf_Internal_Rela *rel_end; | |
14061 | bfd *dynobj; | |
5e681ec4 | 14062 | asection *sreloc; |
5e681ec4 | 14063 | struct elf32_arm_link_hash_table *htab; |
f6e32f6d RS |
14064 | bfd_boolean call_reloc_p; |
14065 | bfd_boolean may_become_dynamic_p; | |
14066 | bfd_boolean may_need_local_target_p; | |
ce98a316 | 14067 | unsigned long nsyms; |
9a5aca8c | 14068 | |
0e1862bb | 14069 | if (bfd_link_relocatable (info)) |
b34976b6 | 14070 | return TRUE; |
9a5aca8c | 14071 | |
0ffa91dd NC |
14072 | BFD_ASSERT (is_arm_elf (abfd)); |
14073 | ||
5e681ec4 | 14074 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
14075 | if (htab == NULL) |
14076 | return FALSE; | |
14077 | ||
5e681ec4 | 14078 | sreloc = NULL; |
9a5aca8c | 14079 | |
67687978 PB |
14080 | /* Create dynamic sections for relocatable executables so that we can |
14081 | copy relocations. */ | |
14082 | if (htab->root.is_relocatable_executable | |
14083 | && ! htab->root.dynamic_sections_created) | |
14084 | { | |
14085 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
14086 | return FALSE; | |
14087 | } | |
14088 | ||
cbc704f3 RS |
14089 | if (htab->root.dynobj == NULL) |
14090 | htab->root.dynobj = abfd; | |
34e77a92 RS |
14091 | if (!create_ifunc_sections (info)) |
14092 | return FALSE; | |
cbc704f3 RS |
14093 | |
14094 | dynobj = htab->root.dynobj; | |
14095 | ||
0ffa91dd | 14096 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 14097 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 | 14098 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
b38cadfb | 14099 | |
252b5132 RH |
14100 | rel_end = relocs + sec->reloc_count; |
14101 | for (rel = relocs; rel < rel_end; rel++) | |
14102 | { | |
34e77a92 | 14103 | Elf_Internal_Sym *isym; |
252b5132 | 14104 | struct elf_link_hash_entry *h; |
b7693d02 | 14105 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 14106 | unsigned long r_symndx; |
eb043451 | 14107 | int r_type; |
9a5aca8c | 14108 | |
252b5132 | 14109 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 14110 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 14111 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 14112 | |
ce98a316 NC |
14113 | if (r_symndx >= nsyms |
14114 | /* PR 9934: It is possible to have relocations that do not | |
14115 | refer to symbols, thus it is also possible to have an | |
14116 | object file containing relocations but no symbol table. */ | |
cf35638d | 14117 | && (r_symndx > STN_UNDEF || nsyms > 0)) |
ba93b8ac DJ |
14118 | { |
14119 | (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd, | |
ce98a316 | 14120 | r_symndx); |
ba93b8ac DJ |
14121 | return FALSE; |
14122 | } | |
14123 | ||
34e77a92 RS |
14124 | h = NULL; |
14125 | isym = NULL; | |
14126 | if (nsyms > 0) | |
973a3492 | 14127 | { |
34e77a92 RS |
14128 | if (r_symndx < symtab_hdr->sh_info) |
14129 | { | |
14130 | /* A local symbol. */ | |
14131 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, | |
14132 | abfd, r_symndx); | |
14133 | if (isym == NULL) | |
14134 | return FALSE; | |
14135 | } | |
14136 | else | |
14137 | { | |
14138 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
14139 | while (h->root.type == bfd_link_hash_indirect | |
14140 | || h->root.type == bfd_link_hash_warning) | |
14141 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
81fbe831 AM |
14142 | |
14143 | /* PR15323, ref flags aren't set for references in the | |
14144 | same object. */ | |
14145 | h->root.non_ir_ref = 1; | |
34e77a92 | 14146 | } |
973a3492 | 14147 | } |
9a5aca8c | 14148 | |
b7693d02 DJ |
14149 | eh = (struct elf32_arm_link_hash_entry *) h; |
14150 | ||
f6e32f6d RS |
14151 | call_reloc_p = FALSE; |
14152 | may_become_dynamic_p = FALSE; | |
14153 | may_need_local_target_p = FALSE; | |
14154 | ||
0855e32b NS |
14155 | /* Could be done earlier, if h were already available. */ |
14156 | r_type = elf32_arm_tls_transition (info, r_type, h); | |
eb043451 | 14157 | switch (r_type) |
99059e56 | 14158 | { |
5e681ec4 | 14159 | case R_ARM_GOT32: |
eb043451 | 14160 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
14161 | case R_ARM_TLS_GD32: |
14162 | case R_ARM_TLS_IE32: | |
0855e32b NS |
14163 | case R_ARM_TLS_GOTDESC: |
14164 | case R_ARM_TLS_DESCSEQ: | |
14165 | case R_ARM_THM_TLS_DESCSEQ: | |
14166 | case R_ARM_TLS_CALL: | |
14167 | case R_ARM_THM_TLS_CALL: | |
5e681ec4 | 14168 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
14169 | { |
14170 | int tls_type, old_tls_type; | |
5e681ec4 | 14171 | |
ba93b8ac DJ |
14172 | switch (r_type) |
14173 | { | |
14174 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
b38cadfb | 14175 | |
ba93b8ac | 14176 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; |
b38cadfb | 14177 | |
0855e32b NS |
14178 | case R_ARM_TLS_GOTDESC: |
14179 | case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL: | |
14180 | case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ: | |
14181 | tls_type = GOT_TLS_GDESC; break; | |
b38cadfb | 14182 | |
ba93b8ac DJ |
14183 | default: tls_type = GOT_NORMAL; break; |
14184 | } | |
252b5132 | 14185 | |
0e1862bb | 14186 | if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE)) |
eea6dad2 KM |
14187 | info->flags |= DF_STATIC_TLS; |
14188 | ||
ba93b8ac DJ |
14189 | if (h != NULL) |
14190 | { | |
14191 | h->got.refcount++; | |
14192 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
14193 | } | |
14194 | else | |
14195 | { | |
ba93b8ac | 14196 | /* This is a global offset table entry for a local symbol. */ |
34e77a92 RS |
14197 | if (!elf32_arm_allocate_local_sym_info (abfd)) |
14198 | return FALSE; | |
14199 | elf_local_got_refcounts (abfd)[r_symndx] += 1; | |
ba93b8ac DJ |
14200 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; |
14201 | } | |
14202 | ||
0855e32b | 14203 | /* If a variable is accessed with both tls methods, two |
99059e56 | 14204 | slots may be created. */ |
0855e32b NS |
14205 | if (GOT_TLS_GD_ANY_P (old_tls_type) |
14206 | && GOT_TLS_GD_ANY_P (tls_type)) | |
14207 | tls_type |= old_tls_type; | |
14208 | ||
14209 | /* We will already have issued an error message if there | |
14210 | is a TLS/non-TLS mismatch, based on the symbol | |
14211 | type. So just combine any TLS types needed. */ | |
ba93b8ac DJ |
14212 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL |
14213 | && tls_type != GOT_NORMAL) | |
14214 | tls_type |= old_tls_type; | |
14215 | ||
0855e32b | 14216 | /* If the symbol is accessed in both IE and GDESC |
99059e56 RM |
14217 | method, we're able to relax. Turn off the GDESC flag, |
14218 | without messing up with any other kind of tls types | |
6a631e86 | 14219 | that may be involved. */ |
0855e32b NS |
14220 | if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC)) |
14221 | tls_type &= ~GOT_TLS_GDESC; | |
14222 | ||
ba93b8ac DJ |
14223 | if (old_tls_type != tls_type) |
14224 | { | |
14225 | if (h != NULL) | |
14226 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
14227 | else | |
14228 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
14229 | } | |
14230 | } | |
8029a119 | 14231 | /* Fall through. */ |
ba93b8ac DJ |
14232 | |
14233 | case R_ARM_TLS_LDM32: | |
14234 | if (r_type == R_ARM_TLS_LDM32) | |
14235 | htab->tls_ldm_got.refcount++; | |
8029a119 | 14236 | /* Fall through. */ |
252b5132 | 14237 | |
c19d1205 | 14238 | case R_ARM_GOTOFF32: |
5e681ec4 | 14239 | case R_ARM_GOTPC: |
cbc704f3 RS |
14240 | if (htab->root.sgot == NULL |
14241 | && !create_got_section (htab->root.dynobj, info)) | |
14242 | return FALSE; | |
252b5132 RH |
14243 | break; |
14244 | ||
252b5132 | 14245 | case R_ARM_PC24: |
7359ea65 | 14246 | case R_ARM_PLT32: |
5b5bb741 PB |
14247 | case R_ARM_CALL: |
14248 | case R_ARM_JUMP24: | |
eb043451 | 14249 | case R_ARM_PREL31: |
c19d1205 | 14250 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
14251 | case R_ARM_THM_JUMP24: |
14252 | case R_ARM_THM_JUMP19: | |
f6e32f6d RS |
14253 | call_reloc_p = TRUE; |
14254 | may_need_local_target_p = TRUE; | |
14255 | break; | |
14256 | ||
14257 | case R_ARM_ABS12: | |
14258 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
14259 | ldr __GOTT_INDEX__ offsets. */ | |
14260 | if (!htab->vxworks_p) | |
14261 | { | |
14262 | may_need_local_target_p = TRUE; | |
14263 | break; | |
14264 | } | |
aebf9be7 NC |
14265 | else goto jump_over; |
14266 | ||
f6e32f6d | 14267 | /* Fall through. */ |
39623e12 | 14268 | |
96c23d59 JM |
14269 | case R_ARM_MOVW_ABS_NC: |
14270 | case R_ARM_MOVT_ABS: | |
14271 | case R_ARM_THM_MOVW_ABS_NC: | |
14272 | case R_ARM_THM_MOVT_ABS: | |
0e1862bb | 14273 | if (bfd_link_pic (info)) |
96c23d59 JM |
14274 | { |
14275 | (*_bfd_error_handler) | |
14276 | (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), | |
14277 | abfd, elf32_arm_howto_table_1[r_type].name, | |
14278 | (h) ? h->root.root.string : "a local symbol"); | |
14279 | bfd_set_error (bfd_error_bad_value); | |
14280 | return FALSE; | |
14281 | } | |
14282 | ||
14283 | /* Fall through. */ | |
39623e12 PB |
14284 | case R_ARM_ABS32: |
14285 | case R_ARM_ABS32_NOI: | |
aebf9be7 | 14286 | jump_over: |
0e1862bb | 14287 | if (h != NULL && bfd_link_executable (info)) |
97323ad1 WN |
14288 | { |
14289 | h->pointer_equality_needed = 1; | |
14290 | } | |
14291 | /* Fall through. */ | |
39623e12 PB |
14292 | case R_ARM_REL32: |
14293 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
14294 | case R_ARM_MOVW_PREL_NC: |
14295 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
14296 | case R_ARM_THM_MOVW_PREL_NC: |
14297 | case R_ARM_THM_MOVT_PREL: | |
39623e12 | 14298 | |
b7693d02 | 14299 | /* Should the interworking branches be listed here? */ |
0e1862bb | 14300 | if ((bfd_link_pic (info) || htab->root.is_relocatable_executable) |
34e77a92 RS |
14301 | && (sec->flags & SEC_ALLOC) != 0) |
14302 | { | |
14303 | if (h == NULL | |
469a3493 | 14304 | && elf32_arm_howto_from_type (r_type)->pc_relative) |
34e77a92 RS |
14305 | { |
14306 | /* In shared libraries and relocatable executables, | |
14307 | we treat local relative references as calls; | |
14308 | see the related SYMBOL_CALLS_LOCAL code in | |
14309 | allocate_dynrelocs. */ | |
14310 | call_reloc_p = TRUE; | |
14311 | may_need_local_target_p = TRUE; | |
14312 | } | |
14313 | else | |
14314 | /* We are creating a shared library or relocatable | |
14315 | executable, and this is a reloc against a global symbol, | |
14316 | or a non-PC-relative reloc against a local symbol. | |
14317 | We may need to copy the reloc into the output. */ | |
14318 | may_become_dynamic_p = TRUE; | |
14319 | } | |
f6e32f6d RS |
14320 | else |
14321 | may_need_local_target_p = TRUE; | |
252b5132 RH |
14322 | break; |
14323 | ||
99059e56 RM |
14324 | /* This relocation describes the C++ object vtable hierarchy. |
14325 | Reconstruct it for later use during GC. */ | |
14326 | case R_ARM_GNU_VTINHERIT: | |
14327 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
14328 | return FALSE; | |
14329 | break; | |
14330 | ||
14331 | /* This relocation describes which C++ vtable entries are actually | |
14332 | used. Record for later use during GC. */ | |
14333 | case R_ARM_GNU_VTENTRY: | |
14334 | BFD_ASSERT (h != NULL); | |
14335 | if (h != NULL | |
14336 | && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
14337 | return FALSE; | |
14338 | break; | |
14339 | } | |
f6e32f6d RS |
14340 | |
14341 | if (h != NULL) | |
14342 | { | |
14343 | if (call_reloc_p) | |
14344 | /* We may need a .plt entry if the function this reloc | |
14345 | refers to is in a different object, regardless of the | |
14346 | symbol's type. We can't tell for sure yet, because | |
14347 | something later might force the symbol local. */ | |
14348 | h->needs_plt = 1; | |
14349 | else if (may_need_local_target_p) | |
14350 | /* If this reloc is in a read-only section, we might | |
14351 | need a copy reloc. We can't check reliably at this | |
14352 | stage whether the section is read-only, as input | |
14353 | sections have not yet been mapped to output sections. | |
14354 | Tentatively set the flag for now, and correct in | |
14355 | adjust_dynamic_symbol. */ | |
14356 | h->non_got_ref = 1; | |
14357 | } | |
14358 | ||
34e77a92 RS |
14359 | if (may_need_local_target_p |
14360 | && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)) | |
f6e32f6d | 14361 | { |
34e77a92 RS |
14362 | union gotplt_union *root_plt; |
14363 | struct arm_plt_info *arm_plt; | |
14364 | struct arm_local_iplt_info *local_iplt; | |
14365 | ||
14366 | if (h != NULL) | |
14367 | { | |
14368 | root_plt = &h->plt; | |
14369 | arm_plt = &eh->plt; | |
14370 | } | |
14371 | else | |
14372 | { | |
14373 | local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx); | |
14374 | if (local_iplt == NULL) | |
14375 | return FALSE; | |
14376 | root_plt = &local_iplt->root; | |
14377 | arm_plt = &local_iplt->arm; | |
14378 | } | |
14379 | ||
f6e32f6d RS |
14380 | /* If the symbol is a function that doesn't bind locally, |
14381 | this relocation will need a PLT entry. */ | |
a8c887dd NC |
14382 | if (root_plt->refcount != -1) |
14383 | root_plt->refcount += 1; | |
34e77a92 RS |
14384 | |
14385 | if (!call_reloc_p) | |
14386 | arm_plt->noncall_refcount++; | |
f6e32f6d RS |
14387 | |
14388 | /* It's too early to use htab->use_blx here, so we have to | |
14389 | record possible blx references separately from | |
14390 | relocs that definitely need a thumb stub. */ | |
14391 | ||
14392 | if (r_type == R_ARM_THM_CALL) | |
34e77a92 | 14393 | arm_plt->maybe_thumb_refcount += 1; |
f6e32f6d RS |
14394 | |
14395 | if (r_type == R_ARM_THM_JUMP24 | |
14396 | || r_type == R_ARM_THM_JUMP19) | |
34e77a92 | 14397 | arm_plt->thumb_refcount += 1; |
f6e32f6d RS |
14398 | } |
14399 | ||
14400 | if (may_become_dynamic_p) | |
14401 | { | |
14402 | struct elf_dyn_relocs *p, **head; | |
14403 | ||
14404 | /* Create a reloc section in dynobj. */ | |
14405 | if (sreloc == NULL) | |
14406 | { | |
14407 | sreloc = _bfd_elf_make_dynamic_reloc_section | |
14408 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
14409 | ||
14410 | if (sreloc == NULL) | |
14411 | return FALSE; | |
14412 | ||
14413 | /* BPABI objects never have dynamic relocations mapped. */ | |
14414 | if (htab->symbian_p) | |
14415 | { | |
14416 | flagword flags; | |
14417 | ||
14418 | flags = bfd_get_section_flags (dynobj, sreloc); | |
14419 | flags &= ~(SEC_LOAD | SEC_ALLOC); | |
14420 | bfd_set_section_flags (dynobj, sreloc, flags); | |
14421 | } | |
14422 | } | |
14423 | ||
14424 | /* If this is a global symbol, count the number of | |
14425 | relocations we need for this symbol. */ | |
14426 | if (h != NULL) | |
14427 | head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs; | |
14428 | else | |
14429 | { | |
34e77a92 RS |
14430 | head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym); |
14431 | if (head == NULL) | |
f6e32f6d | 14432 | return FALSE; |
f6e32f6d RS |
14433 | } |
14434 | ||
14435 | p = *head; | |
14436 | if (p == NULL || p->sec != sec) | |
14437 | { | |
14438 | bfd_size_type amt = sizeof *p; | |
14439 | ||
14440 | p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt); | |
14441 | if (p == NULL) | |
14442 | return FALSE; | |
14443 | p->next = *head; | |
14444 | *head = p; | |
14445 | p->sec = sec; | |
14446 | p->count = 0; | |
14447 | p->pc_count = 0; | |
14448 | } | |
14449 | ||
469a3493 | 14450 | if (elf32_arm_howto_from_type (r_type)->pc_relative) |
f6e32f6d RS |
14451 | p->pc_count += 1; |
14452 | p->count += 1; | |
14453 | } | |
252b5132 | 14454 | } |
f21f3fe0 | 14455 | |
b34976b6 | 14456 | return TRUE; |
252b5132 RH |
14457 | } |
14458 | ||
6a5bb875 | 14459 | /* Unwinding tables are not referenced directly. This pass marks them as |
4ba2ef8f TP |
14460 | required if the corresponding code section is marked. Similarly, ARMv8-M |
14461 | secure entry functions can only be referenced by SG veneers which are | |
14462 | created after the GC process. They need to be marked in case they reside in | |
14463 | their own section (as would be the case if code was compiled with | |
14464 | -ffunction-sections). */ | |
6a5bb875 PB |
14465 | |
14466 | static bfd_boolean | |
906e58ca NC |
14467 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
14468 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
14469 | { |
14470 | bfd *sub; | |
14471 | Elf_Internal_Shdr **elf_shdrp; | |
4ba2ef8f TP |
14472 | asection *cmse_sec; |
14473 | obj_attribute *out_attr; | |
14474 | Elf_Internal_Shdr *symtab_hdr; | |
14475 | unsigned i, sym_count, ext_start; | |
14476 | const struct elf_backend_data *bed; | |
14477 | struct elf_link_hash_entry **sym_hashes; | |
14478 | struct elf32_arm_link_hash_entry *cmse_hash; | |
14479 | bfd_boolean again, is_v8m, first_bfd_browse = TRUE; | |
6a5bb875 | 14480 | |
7f6ab9f8 AM |
14481 | _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook); |
14482 | ||
4ba2ef8f TP |
14483 | out_attr = elf_known_obj_attributes_proc (info->output_bfd); |
14484 | is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE | |
14485 | && out_attr[Tag_CPU_arch_profile].i == 'M'; | |
14486 | ||
6a5bb875 PB |
14487 | /* Marking EH data may cause additional code sections to be marked, |
14488 | requiring multiple passes. */ | |
14489 | again = TRUE; | |
14490 | while (again) | |
14491 | { | |
14492 | again = FALSE; | |
c72f2fb2 | 14493 | for (sub = info->input_bfds; sub != NULL; sub = sub->link.next) |
6a5bb875 PB |
14494 | { |
14495 | asection *o; | |
14496 | ||
0ffa91dd | 14497 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
14498 | continue; |
14499 | ||
14500 | elf_shdrp = elf_elfsections (sub); | |
14501 | for (o = sub->sections; o != NULL; o = o->next) | |
14502 | { | |
14503 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 14504 | |
6a5bb875 | 14505 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
14506 | if (hdr->sh_type == SHT_ARM_EXIDX |
14507 | && hdr->sh_link | |
14508 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
14509 | && !o->gc_mark |
14510 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
14511 | { | |
14512 | again = TRUE; | |
14513 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) | |
14514 | return FALSE; | |
14515 | } | |
14516 | } | |
4ba2ef8f TP |
14517 | |
14518 | /* Mark section holding ARMv8-M secure entry functions. We mark all | |
14519 | of them so no need for a second browsing. */ | |
14520 | if (is_v8m && first_bfd_browse) | |
14521 | { | |
14522 | sym_hashes = elf_sym_hashes (sub); | |
14523 | bed = get_elf_backend_data (sub); | |
14524 | symtab_hdr = &elf_tdata (sub)->symtab_hdr; | |
14525 | sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym; | |
14526 | ext_start = symtab_hdr->sh_info; | |
14527 | ||
14528 | /* Scan symbols. */ | |
14529 | for (i = ext_start; i < sym_count; i++) | |
14530 | { | |
14531 | cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]); | |
14532 | ||
14533 | /* Assume it is a special symbol. If not, cmse_scan will | |
14534 | warn about it and user can do something about it. */ | |
14535 | if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) | |
14536 | { | |
14537 | cmse_sec = cmse_hash->root.root.u.def.section; | |
14538 | if (!_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook)) | |
14539 | return FALSE; | |
14540 | } | |
14541 | } | |
14542 | } | |
6a5bb875 | 14543 | } |
4ba2ef8f | 14544 | first_bfd_browse = FALSE; |
6a5bb875 PB |
14545 | } |
14546 | ||
14547 | return TRUE; | |
14548 | } | |
14549 | ||
3c9458e9 NC |
14550 | /* Treat mapping symbols as special target symbols. */ |
14551 | ||
14552 | static bfd_boolean | |
14553 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) | |
14554 | { | |
b0796911 PB |
14555 | return bfd_is_arm_special_symbol_name (sym->name, |
14556 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
14557 | } |
14558 | ||
0367ecfb NC |
14559 | /* This is a copy of elf_find_function() from elf.c except that |
14560 | ARM mapping symbols are ignored when looking for function names | |
14561 | and STT_ARM_TFUNC is considered to a function type. */ | |
252b5132 | 14562 | |
0367ecfb NC |
14563 | static bfd_boolean |
14564 | arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, | |
0367ecfb | 14565 | asymbol ** symbols, |
fb167eb2 | 14566 | asection * section, |
0367ecfb NC |
14567 | bfd_vma offset, |
14568 | const char ** filename_ptr, | |
14569 | const char ** functionname_ptr) | |
14570 | { | |
14571 | const char * filename = NULL; | |
14572 | asymbol * func = NULL; | |
14573 | bfd_vma low_func = 0; | |
14574 | asymbol ** p; | |
252b5132 RH |
14575 | |
14576 | for (p = symbols; *p != NULL; p++) | |
14577 | { | |
14578 | elf_symbol_type *q; | |
14579 | ||
14580 | q = (elf_symbol_type *) *p; | |
14581 | ||
252b5132 RH |
14582 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
14583 | { | |
14584 | default: | |
14585 | break; | |
14586 | case STT_FILE: | |
14587 | filename = bfd_asymbol_name (&q->symbol); | |
14588 | break; | |
252b5132 RH |
14589 | case STT_FUNC: |
14590 | case STT_ARM_TFUNC: | |
9d2da7ca | 14591 | case STT_NOTYPE: |
b0796911 | 14592 | /* Skip mapping symbols. */ |
0367ecfb | 14593 | if ((q->symbol.flags & BSF_LOCAL) |
b0796911 PB |
14594 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
14595 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
0367ecfb NC |
14596 | continue; |
14597 | /* Fall through. */ | |
6b40fcba | 14598 | if (bfd_get_section (&q->symbol) == section |
252b5132 RH |
14599 | && q->symbol.value >= low_func |
14600 | && q->symbol.value <= offset) | |
14601 | { | |
14602 | func = (asymbol *) q; | |
14603 | low_func = q->symbol.value; | |
14604 | } | |
14605 | break; | |
14606 | } | |
14607 | } | |
14608 | ||
14609 | if (func == NULL) | |
b34976b6 | 14610 | return FALSE; |
252b5132 | 14611 | |
0367ecfb NC |
14612 | if (filename_ptr) |
14613 | *filename_ptr = filename; | |
14614 | if (functionname_ptr) | |
14615 | *functionname_ptr = bfd_asymbol_name (func); | |
14616 | ||
14617 | return TRUE; | |
906e58ca | 14618 | } |
0367ecfb NC |
14619 | |
14620 | ||
14621 | /* Find the nearest line to a particular section and offset, for error | |
14622 | reporting. This code is a duplicate of the code in elf.c, except | |
14623 | that it uses arm_elf_find_function. */ | |
14624 | ||
14625 | static bfd_boolean | |
14626 | elf32_arm_find_nearest_line (bfd * abfd, | |
0367ecfb | 14627 | asymbol ** symbols, |
fb167eb2 | 14628 | asection * section, |
0367ecfb NC |
14629 | bfd_vma offset, |
14630 | const char ** filename_ptr, | |
14631 | const char ** functionname_ptr, | |
fb167eb2 AM |
14632 | unsigned int * line_ptr, |
14633 | unsigned int * discriminator_ptr) | |
0367ecfb NC |
14634 | { |
14635 | bfd_boolean found = FALSE; | |
14636 | ||
fb167eb2 | 14637 | if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset, |
0367ecfb | 14638 | filename_ptr, functionname_ptr, |
fb167eb2 AM |
14639 | line_ptr, discriminator_ptr, |
14640 | dwarf_debug_sections, 0, | |
0367ecfb NC |
14641 | & elf_tdata (abfd)->dwarf2_find_line_info)) |
14642 | { | |
14643 | if (!*functionname_ptr) | |
fb167eb2 | 14644 | arm_elf_find_function (abfd, symbols, section, offset, |
0367ecfb NC |
14645 | *filename_ptr ? NULL : filename_ptr, |
14646 | functionname_ptr); | |
f21f3fe0 | 14647 | |
0367ecfb NC |
14648 | return TRUE; |
14649 | } | |
14650 | ||
fb167eb2 AM |
14651 | /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain |
14652 | uses DWARF1. */ | |
14653 | ||
0367ecfb NC |
14654 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, |
14655 | & found, filename_ptr, | |
14656 | functionname_ptr, line_ptr, | |
14657 | & elf_tdata (abfd)->line_info)) | |
14658 | return FALSE; | |
14659 | ||
14660 | if (found && (*functionname_ptr || *line_ptr)) | |
14661 | return TRUE; | |
14662 | ||
14663 | if (symbols == NULL) | |
14664 | return FALSE; | |
14665 | ||
fb167eb2 | 14666 | if (! arm_elf_find_function (abfd, symbols, section, offset, |
0367ecfb NC |
14667 | filename_ptr, functionname_ptr)) |
14668 | return FALSE; | |
14669 | ||
14670 | *line_ptr = 0; | |
b34976b6 | 14671 | return TRUE; |
252b5132 RH |
14672 | } |
14673 | ||
4ab527b0 FF |
14674 | static bfd_boolean |
14675 | elf32_arm_find_inliner_info (bfd * abfd, | |
14676 | const char ** filename_ptr, | |
14677 | const char ** functionname_ptr, | |
14678 | unsigned int * line_ptr) | |
14679 | { | |
14680 | bfd_boolean found; | |
14681 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, | |
14682 | functionname_ptr, line_ptr, | |
14683 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
14684 | return found; | |
14685 | } | |
14686 | ||
252b5132 RH |
14687 | /* Adjust a symbol defined by a dynamic object and referenced by a |
14688 | regular object. The current definition is in some section of the | |
14689 | dynamic object, but we're not including those sections. We have to | |
14690 | change the definition to something the rest of the link can | |
14691 | understand. */ | |
14692 | ||
b34976b6 | 14693 | static bfd_boolean |
57e8b36a NC |
14694 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
14695 | struct elf_link_hash_entry * h) | |
252b5132 RH |
14696 | { |
14697 | bfd * dynobj; | |
14698 | asection * s; | |
b7693d02 | 14699 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 14700 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 14701 | |
67687978 | 14702 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
14703 | if (globals == NULL) |
14704 | return FALSE; | |
14705 | ||
252b5132 RH |
14706 | dynobj = elf_hash_table (info)->dynobj; |
14707 | ||
14708 | /* Make sure we know what is going on here. */ | |
14709 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 14710 | && (h->needs_plt |
34e77a92 | 14711 | || h->type == STT_GNU_IFUNC |
f6e332e6 | 14712 | || h->u.weakdef != NULL |
f5385ebf AM |
14713 | || (h->def_dynamic |
14714 | && h->ref_regular | |
14715 | && !h->def_regular))); | |
252b5132 | 14716 | |
b7693d02 DJ |
14717 | eh = (struct elf32_arm_link_hash_entry *) h; |
14718 | ||
252b5132 RH |
14719 | /* If this is a function, put it in the procedure linkage table. We |
14720 | will fill in the contents of the procedure linkage table later, | |
14721 | when we know the address of the .got section. */ | |
34e77a92 | 14722 | if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) |
252b5132 | 14723 | { |
34e77a92 RS |
14724 | /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the |
14725 | symbol binds locally. */ | |
5e681ec4 | 14726 | if (h->plt.refcount <= 0 |
34e77a92 RS |
14727 | || (h->type != STT_GNU_IFUNC |
14728 | && (SYMBOL_CALLS_LOCAL (info, h) | |
14729 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
14730 | && h->root.type == bfd_link_hash_undefweak)))) | |
252b5132 RH |
14731 | { |
14732 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
14733 | file, but the symbol was never referred to by a dynamic |
14734 | object, or if all references were garbage collected. In | |
14735 | such a case, we don't actually need to build a procedure | |
14736 | linkage table, and we can just do a PC24 reloc instead. */ | |
14737 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
14738 | eh->plt.thumb_refcount = 0; |
14739 | eh->plt.maybe_thumb_refcount = 0; | |
14740 | eh->plt.noncall_refcount = 0; | |
f5385ebf | 14741 | h->needs_plt = 0; |
252b5132 RH |
14742 | } |
14743 | ||
b34976b6 | 14744 | return TRUE; |
252b5132 | 14745 | } |
5e681ec4 | 14746 | else |
b7693d02 DJ |
14747 | { |
14748 | /* It's possible that we incorrectly decided a .plt reloc was | |
14749 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
14750 | in check_relocs. We can't decide accurately between function | |
14751 | and non-function syms in check-relocs; Objects loaded later in | |
14752 | the link may change h->type. So fix it now. */ | |
14753 | h->plt.offset = (bfd_vma) -1; | |
34e77a92 RS |
14754 | eh->plt.thumb_refcount = 0; |
14755 | eh->plt.maybe_thumb_refcount = 0; | |
14756 | eh->plt.noncall_refcount = 0; | |
b7693d02 | 14757 | } |
252b5132 RH |
14758 | |
14759 | /* If this is a weak symbol, and there is a real definition, the | |
14760 | processor independent code will have arranged for us to see the | |
14761 | real definition first, and we can just use the same value. */ | |
f6e332e6 | 14762 | if (h->u.weakdef != NULL) |
252b5132 | 14763 | { |
f6e332e6 AM |
14764 | BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined |
14765 | || h->u.weakdef->root.type == bfd_link_hash_defweak); | |
14766 | h->root.u.def.section = h->u.weakdef->root.u.def.section; | |
14767 | h->root.u.def.value = h->u.weakdef->root.u.def.value; | |
b34976b6 | 14768 | return TRUE; |
252b5132 RH |
14769 | } |
14770 | ||
ba93b8ac DJ |
14771 | /* If there are no non-GOT references, we do not need a copy |
14772 | relocation. */ | |
14773 | if (!h->non_got_ref) | |
14774 | return TRUE; | |
14775 | ||
252b5132 RH |
14776 | /* This is a reference to a symbol defined by a dynamic object which |
14777 | is not a function. */ | |
14778 | ||
14779 | /* If we are creating a shared library, we must presume that the | |
14780 | only references to the symbol are via the global offset table. | |
14781 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
14782 | be handled correctly by relocate_section. Relocatable executables |
14783 | can reference data in shared objects directly, so we don't need to | |
14784 | do anything here. */ | |
0e1862bb | 14785 | if (bfd_link_pic (info) || globals->root.is_relocatable_executable) |
b34976b6 | 14786 | return TRUE; |
252b5132 RH |
14787 | |
14788 | /* We must allocate the symbol in our .dynbss section, which will | |
14789 | become part of the .bss section of the executable. There will be | |
14790 | an entry for this symbol in the .dynsym section. The dynamic | |
14791 | object will contain position independent code, so all references | |
14792 | from the dynamic object to this symbol will go through the global | |
14793 | offset table. The dynamic linker will use the .dynsym entry to | |
14794 | determine the address it must put in the global offset table, so | |
14795 | both the dynamic object and the regular object will refer to the | |
14796 | same memory location for the variable. */ | |
3d4d4302 | 14797 | s = bfd_get_linker_section (dynobj, ".dynbss"); |
252b5132 RH |
14798 | BFD_ASSERT (s != NULL); |
14799 | ||
5522f910 NC |
14800 | /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic |
14801 | linker to copy the initial value out of the dynamic object and into | |
14802 | the runtime process image. We need to remember the offset into the | |
00a97672 | 14803 | .rel(a).bss section we are going to use. */ |
5522f910 NC |
14804 | if (info->nocopyreloc == 0 |
14805 | && (h->root.u.def.section->flags & SEC_ALLOC) != 0 | |
5522f910 | 14806 | && h->size != 0) |
252b5132 RH |
14807 | { |
14808 | asection *srel; | |
14809 | ||
3d4d4302 | 14810 | srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss")); |
47beaa6a | 14811 | elf32_arm_allocate_dynrelocs (info, srel, 1); |
f5385ebf | 14812 | h->needs_copy = 1; |
252b5132 RH |
14813 | } |
14814 | ||
6cabe1ea | 14815 | return _bfd_elf_adjust_dynamic_copy (info, h, s); |
252b5132 RH |
14816 | } |
14817 | ||
5e681ec4 PB |
14818 | /* Allocate space in .plt, .got and associated reloc sections for |
14819 | dynamic relocs. */ | |
14820 | ||
14821 | static bfd_boolean | |
47beaa6a | 14822 | allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
14823 | { |
14824 | struct bfd_link_info *info; | |
14825 | struct elf32_arm_link_hash_table *htab; | |
14826 | struct elf32_arm_link_hash_entry *eh; | |
0bdcacaf | 14827 | struct elf_dyn_relocs *p; |
5e681ec4 PB |
14828 | |
14829 | if (h->root.type == bfd_link_hash_indirect) | |
14830 | return TRUE; | |
14831 | ||
e6a6bb22 AM |
14832 | eh = (struct elf32_arm_link_hash_entry *) h; |
14833 | ||
5e681ec4 PB |
14834 | info = (struct bfd_link_info *) inf; |
14835 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
14836 | if (htab == NULL) |
14837 | return FALSE; | |
5e681ec4 | 14838 | |
34e77a92 | 14839 | if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC) |
5e681ec4 PB |
14840 | && h->plt.refcount > 0) |
14841 | { | |
14842 | /* Make sure this symbol is output as a dynamic symbol. | |
14843 | Undefined weak syms won't yet be marked as dynamic. */ | |
14844 | if (h->dynindx == -1 | |
f5385ebf | 14845 | && !h->forced_local) |
5e681ec4 | 14846 | { |
c152c796 | 14847 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
14848 | return FALSE; |
14849 | } | |
14850 | ||
34e77a92 RS |
14851 | /* If the call in the PLT entry binds locally, the associated |
14852 | GOT entry should use an R_ARM_IRELATIVE relocation instead of | |
14853 | the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather | |
14854 | than the .plt section. */ | |
14855 | if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h)) | |
14856 | { | |
14857 | eh->is_iplt = 1; | |
14858 | if (eh->plt.noncall_refcount == 0 | |
14859 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
14860 | /* All non-call references can be resolved directly. | |
14861 | This means that they can (and in some cases, must) | |
14862 | resolve directly to the run-time target, rather than | |
14863 | to the PLT. That in turns means that any .got entry | |
14864 | would be equal to the .igot.plt entry, so there's | |
14865 | no point having both. */ | |
14866 | h->got.refcount = 0; | |
14867 | } | |
14868 | ||
0e1862bb | 14869 | if (bfd_link_pic (info) |
34e77a92 | 14870 | || eh->is_iplt |
7359ea65 | 14871 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 | 14872 | { |
34e77a92 | 14873 | elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt); |
b7693d02 | 14874 | |
5e681ec4 PB |
14875 | /* If this symbol is not defined in a regular file, and we are |
14876 | not generating a shared library, then set the symbol to this | |
14877 | location in the .plt. This is required to make function | |
14878 | pointers compare as equal between the normal executable and | |
14879 | the shared library. */ | |
0e1862bb | 14880 | if (! bfd_link_pic (info) |
f5385ebf | 14881 | && !h->def_regular) |
5e681ec4 | 14882 | { |
34e77a92 | 14883 | h->root.u.def.section = htab->root.splt; |
5e681ec4 | 14884 | h->root.u.def.value = h->plt.offset; |
5e681ec4 | 14885 | |
67d74e43 DJ |
14886 | /* Make sure the function is not marked as Thumb, in case |
14887 | it is the target of an ABS32 relocation, which will | |
14888 | point to the PLT entry. */ | |
39d911fc | 14889 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
67d74e43 | 14890 | } |
022f8312 | 14891 | |
00a97672 RS |
14892 | /* VxWorks executables have a second set of relocations for |
14893 | each PLT entry. They go in a separate relocation section, | |
14894 | which is processed by the kernel loader. */ | |
0e1862bb | 14895 | if (htab->vxworks_p && !bfd_link_pic (info)) |
00a97672 RS |
14896 | { |
14897 | /* There is a relocation for the initial PLT entry: | |
14898 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
14899 | if (h->plt.offset == htab->plt_header_size) | |
47beaa6a | 14900 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1); |
00a97672 RS |
14901 | |
14902 | /* There are two extra relocations for each subsequent | |
14903 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
14904 | and an R_ARM_32 relocation for the PLT entry. */ | |
47beaa6a | 14905 | elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2); |
00a97672 | 14906 | } |
5e681ec4 PB |
14907 | } |
14908 | else | |
14909 | { | |
14910 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 14911 | h->needs_plt = 0; |
5e681ec4 PB |
14912 | } |
14913 | } | |
14914 | else | |
14915 | { | |
14916 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 14917 | h->needs_plt = 0; |
5e681ec4 PB |
14918 | } |
14919 | ||
0855e32b NS |
14920 | eh = (struct elf32_arm_link_hash_entry *) h; |
14921 | eh->tlsdesc_got = (bfd_vma) -1; | |
14922 | ||
5e681ec4 PB |
14923 | if (h->got.refcount > 0) |
14924 | { | |
14925 | asection *s; | |
14926 | bfd_boolean dyn; | |
ba93b8ac DJ |
14927 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
14928 | int indx; | |
5e681ec4 PB |
14929 | |
14930 | /* Make sure this symbol is output as a dynamic symbol. | |
14931 | Undefined weak syms won't yet be marked as dynamic. */ | |
14932 | if (h->dynindx == -1 | |
f5385ebf | 14933 | && !h->forced_local) |
5e681ec4 | 14934 | { |
c152c796 | 14935 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
14936 | return FALSE; |
14937 | } | |
14938 | ||
e5a52504 MM |
14939 | if (!htab->symbian_p) |
14940 | { | |
362d30a1 | 14941 | s = htab->root.sgot; |
e5a52504 | 14942 | h->got.offset = s->size; |
ba93b8ac DJ |
14943 | |
14944 | if (tls_type == GOT_UNKNOWN) | |
14945 | abort (); | |
14946 | ||
14947 | if (tls_type == GOT_NORMAL) | |
14948 | /* Non-TLS symbols need one GOT slot. */ | |
14949 | s->size += 4; | |
14950 | else | |
14951 | { | |
99059e56 RM |
14952 | if (tls_type & GOT_TLS_GDESC) |
14953 | { | |
0855e32b | 14954 | /* R_ARM_TLS_DESC needs 2 GOT slots. */ |
99059e56 | 14955 | eh->tlsdesc_got |
0855e32b NS |
14956 | = (htab->root.sgotplt->size |
14957 | - elf32_arm_compute_jump_table_size (htab)); | |
99059e56 RM |
14958 | htab->root.sgotplt->size += 8; |
14959 | h->got.offset = (bfd_vma) -2; | |
34e77a92 | 14960 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 14961 | reloc in the middle of .got.plt. */ |
99059e56 RM |
14962 | htab->num_tls_desc++; |
14963 | } | |
0855e32b | 14964 | |
ba93b8ac | 14965 | if (tls_type & GOT_TLS_GD) |
0855e32b NS |
14966 | { |
14967 | /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If | |
14968 | the symbol is both GD and GDESC, got.offset may | |
14969 | have been overwritten. */ | |
14970 | h->got.offset = s->size; | |
14971 | s->size += 8; | |
14972 | } | |
14973 | ||
ba93b8ac DJ |
14974 | if (tls_type & GOT_TLS_IE) |
14975 | /* R_ARM_TLS_IE32 needs one GOT slot. */ | |
14976 | s->size += 4; | |
14977 | } | |
14978 | ||
e5a52504 | 14979 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac DJ |
14980 | |
14981 | indx = 0; | |
0e1862bb L |
14982 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, |
14983 | bfd_link_pic (info), | |
14984 | h) | |
14985 | && (!bfd_link_pic (info) | |
ba93b8ac DJ |
14986 | || !SYMBOL_REFERENCES_LOCAL (info, h))) |
14987 | indx = h->dynindx; | |
14988 | ||
14989 | if (tls_type != GOT_NORMAL | |
0e1862bb | 14990 | && (bfd_link_pic (info) || indx != 0) |
ba93b8ac DJ |
14991 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT |
14992 | || h->root.type != bfd_link_hash_undefweak)) | |
14993 | { | |
14994 | if (tls_type & GOT_TLS_IE) | |
47beaa6a | 14995 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
14996 | |
14997 | if (tls_type & GOT_TLS_GD) | |
47beaa6a | 14998 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 14999 | |
b38cadfb | 15000 | if (tls_type & GOT_TLS_GDESC) |
0855e32b | 15001 | { |
47beaa6a | 15002 | elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1); |
0855e32b NS |
15003 | /* GDESC needs a trampoline to jump to. */ |
15004 | htab->tls_trampoline = -1; | |
15005 | } | |
15006 | ||
15007 | /* Only GD needs it. GDESC just emits one relocation per | |
15008 | 2 entries. */ | |
b38cadfb | 15009 | if ((tls_type & GOT_TLS_GD) && indx != 0) |
47beaa6a | 15010 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac | 15011 | } |
6f820c85 | 15012 | else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h)) |
b436d854 RS |
15013 | { |
15014 | if (htab->root.dynamic_sections_created) | |
15015 | /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */ | |
15016 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); | |
15017 | } | |
34e77a92 RS |
15018 | else if (h->type == STT_GNU_IFUNC |
15019 | && eh->plt.noncall_refcount == 0) | |
15020 | /* No non-call references resolve the STT_GNU_IFUNC's PLT entry; | |
15021 | they all resolve dynamically instead. Reserve room for the | |
15022 | GOT entry's R_ARM_IRELATIVE relocation. */ | |
15023 | elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1); | |
0e1862bb L |
15024 | else if (bfd_link_pic (info) |
15025 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
15026 | || h->root.type != bfd_link_hash_undefweak)) | |
b436d854 | 15027 | /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */ |
47beaa6a | 15028 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
e5a52504 | 15029 | } |
5e681ec4 PB |
15030 | } |
15031 | else | |
15032 | h->got.offset = (bfd_vma) -1; | |
15033 | ||
a4fd1a8e PB |
15034 | /* Allocate stubs for exported Thumb functions on v4t. */ |
15035 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 15036 | && h->def_regular |
39d911fc | 15037 | && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB |
a4fd1a8e PB |
15038 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) |
15039 | { | |
15040 | struct elf_link_hash_entry * th; | |
15041 | struct bfd_link_hash_entry * bh; | |
15042 | struct elf_link_hash_entry * myh; | |
15043 | char name[1024]; | |
15044 | asection *s; | |
15045 | bh = NULL; | |
15046 | /* Create a new symbol to regist the real location of the function. */ | |
15047 | s = h->root.u.def.section; | |
906e58ca | 15048 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
15049 | _bfd_generic_link_add_one_symbol (info, s->owner, |
15050 | name, BSF_GLOBAL, s, | |
15051 | h->root.u.def.value, | |
15052 | NULL, TRUE, FALSE, &bh); | |
15053 | ||
15054 | myh = (struct elf_link_hash_entry *) bh; | |
35fc36a8 | 15055 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); |
a4fd1a8e | 15056 | myh->forced_local = 1; |
39d911fc | 15057 | ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB); |
a4fd1a8e PB |
15058 | eh->export_glue = myh; |
15059 | th = record_arm_to_thumb_glue (info, h); | |
15060 | /* Point the symbol at the stub. */ | |
15061 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
39d911fc | 15062 | ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM); |
a4fd1a8e PB |
15063 | h->root.u.def.section = th->root.u.def.section; |
15064 | h->root.u.def.value = th->root.u.def.value & ~1; | |
15065 | } | |
15066 | ||
0bdcacaf | 15067 | if (eh->dyn_relocs == NULL) |
5e681ec4 PB |
15068 | return TRUE; |
15069 | ||
15070 | /* In the shared -Bsymbolic case, discard space allocated for | |
15071 | dynamic pc-relative relocs against symbols which turn out to be | |
15072 | defined in regular objects. For the normal shared case, discard | |
15073 | space for pc-relative relocs that have become local due to symbol | |
15074 | visibility changes. */ | |
15075 | ||
0e1862bb | 15076 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable) |
5e681ec4 | 15077 | { |
469a3493 RM |
15078 | /* Relocs that use pc_count are PC-relative forms, which will appear |
15079 | on something like ".long foo - ." or "movw REG, foo - .". We want | |
15080 | calls to protected symbols to resolve directly to the function | |
15081 | rather than going via the plt. If people want function pointer | |
15082 | comparisons to work as expected then they should avoid writing | |
15083 | assembly like ".long foo - .". */ | |
ba93b8ac DJ |
15084 | if (SYMBOL_CALLS_LOCAL (info, h)) |
15085 | { | |
0bdcacaf | 15086 | struct elf_dyn_relocs **pp; |
ba93b8ac | 15087 | |
0bdcacaf | 15088 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
ba93b8ac DJ |
15089 | { |
15090 | p->count -= p->pc_count; | |
15091 | p->pc_count = 0; | |
15092 | if (p->count == 0) | |
15093 | *pp = p->next; | |
15094 | else | |
15095 | pp = &p->next; | |
15096 | } | |
15097 | } | |
15098 | ||
4dfe6ac6 | 15099 | if (htab->vxworks_p) |
3348747a | 15100 | { |
0bdcacaf | 15101 | struct elf_dyn_relocs **pp; |
3348747a | 15102 | |
0bdcacaf | 15103 | for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) |
3348747a | 15104 | { |
0bdcacaf | 15105 | if (strcmp (p->sec->output_section->name, ".tls_vars") == 0) |
3348747a NS |
15106 | *pp = p->next; |
15107 | else | |
15108 | pp = &p->next; | |
15109 | } | |
15110 | } | |
15111 | ||
ba93b8ac | 15112 | /* Also discard relocs on undefined weak syms with non-default |
99059e56 | 15113 | visibility. */ |
0bdcacaf | 15114 | if (eh->dyn_relocs != NULL |
5e681ec4 | 15115 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 AM |
15116 | { |
15117 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) | |
0bdcacaf | 15118 | eh->dyn_relocs = NULL; |
22d606e9 AM |
15119 | |
15120 | /* Make sure undefined weak symbols are output as a dynamic | |
15121 | symbol in PIEs. */ | |
15122 | else if (h->dynindx == -1 | |
15123 | && !h->forced_local) | |
15124 | { | |
15125 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
15126 | return FALSE; | |
15127 | } | |
15128 | } | |
15129 | ||
67687978 PB |
15130 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
15131 | && h->root.type == bfd_link_hash_new) | |
15132 | { | |
15133 | /* Output absolute symbols so that we can create relocations | |
15134 | against them. For normal symbols we output a relocation | |
15135 | against the section that contains them. */ | |
15136 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
15137 | return FALSE; | |
15138 | } | |
15139 | ||
5e681ec4 PB |
15140 | } |
15141 | else | |
15142 | { | |
15143 | /* For the non-shared case, discard space for relocs against | |
15144 | symbols which turn out to need copy relocs or are not | |
15145 | dynamic. */ | |
15146 | ||
f5385ebf AM |
15147 | if (!h->non_got_ref |
15148 | && ((h->def_dynamic | |
15149 | && !h->def_regular) | |
5e681ec4 PB |
15150 | || (htab->root.dynamic_sections_created |
15151 | && (h->root.type == bfd_link_hash_undefweak | |
15152 | || h->root.type == bfd_link_hash_undefined)))) | |
15153 | { | |
15154 | /* Make sure this symbol is output as a dynamic symbol. | |
15155 | Undefined weak syms won't yet be marked as dynamic. */ | |
15156 | if (h->dynindx == -1 | |
f5385ebf | 15157 | && !h->forced_local) |
5e681ec4 | 15158 | { |
c152c796 | 15159 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
15160 | return FALSE; |
15161 | } | |
15162 | ||
15163 | /* If that succeeded, we know we'll be keeping all the | |
15164 | relocs. */ | |
15165 | if (h->dynindx != -1) | |
15166 | goto keep; | |
15167 | } | |
15168 | ||
0bdcacaf | 15169 | eh->dyn_relocs = NULL; |
5e681ec4 PB |
15170 | |
15171 | keep: ; | |
15172 | } | |
15173 | ||
15174 | /* Finally, allocate space. */ | |
0bdcacaf | 15175 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
5e681ec4 | 15176 | { |
0bdcacaf | 15177 | asection *sreloc = elf_section_data (p->sec)->sreloc; |
34e77a92 RS |
15178 | if (h->type == STT_GNU_IFUNC |
15179 | && eh->plt.noncall_refcount == 0 | |
15180 | && SYMBOL_REFERENCES_LOCAL (info, h)) | |
15181 | elf32_arm_allocate_irelocs (info, sreloc, p->count); | |
15182 | else | |
15183 | elf32_arm_allocate_dynrelocs (info, sreloc, p->count); | |
5e681ec4 PB |
15184 | } |
15185 | ||
15186 | return TRUE; | |
15187 | } | |
15188 | ||
08d1f311 DJ |
15189 | /* Find any dynamic relocs that apply to read-only sections. */ |
15190 | ||
15191 | static bfd_boolean | |
8029a119 | 15192 | elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) |
08d1f311 | 15193 | { |
8029a119 | 15194 | struct elf32_arm_link_hash_entry * eh; |
0bdcacaf | 15195 | struct elf_dyn_relocs * p; |
08d1f311 | 15196 | |
08d1f311 | 15197 | eh = (struct elf32_arm_link_hash_entry *) h; |
0bdcacaf | 15198 | for (p = eh->dyn_relocs; p != NULL; p = p->next) |
08d1f311 | 15199 | { |
0bdcacaf | 15200 | asection *s = p->sec; |
08d1f311 DJ |
15201 | |
15202 | if (s != NULL && (s->flags & SEC_READONLY) != 0) | |
15203 | { | |
15204 | struct bfd_link_info *info = (struct bfd_link_info *) inf; | |
15205 | ||
15206 | info->flags |= DF_TEXTREL; | |
15207 | ||
15208 | /* Not an error, just cut short the traversal. */ | |
15209 | return FALSE; | |
15210 | } | |
15211 | } | |
15212 | return TRUE; | |
15213 | } | |
15214 | ||
d504ffc8 DJ |
15215 | void |
15216 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
15217 | int byteswap_code) | |
15218 | { | |
15219 | struct elf32_arm_link_hash_table *globals; | |
15220 | ||
15221 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
15222 | if (globals == NULL) |
15223 | return; | |
15224 | ||
d504ffc8 DJ |
15225 | globals->byteswap_code = byteswap_code; |
15226 | } | |
15227 | ||
252b5132 RH |
15228 | /* Set the sizes of the dynamic sections. */ |
15229 | ||
b34976b6 | 15230 | static bfd_boolean |
57e8b36a NC |
15231 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
15232 | struct bfd_link_info * info) | |
252b5132 RH |
15233 | { |
15234 | bfd * dynobj; | |
15235 | asection * s; | |
b34976b6 AM |
15236 | bfd_boolean plt; |
15237 | bfd_boolean relocs; | |
5e681ec4 PB |
15238 | bfd *ibfd; |
15239 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 15240 | |
5e681ec4 | 15241 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
15242 | if (htab == NULL) |
15243 | return FALSE; | |
15244 | ||
252b5132 RH |
15245 | dynobj = elf_hash_table (info)->dynobj; |
15246 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 15247 | check_use_blx (htab); |
252b5132 RH |
15248 | |
15249 | if (elf_hash_table (info)->dynamic_sections_created) | |
15250 | { | |
15251 | /* Set the contents of the .interp section to the interpreter. */ | |
9b8b325a | 15252 | if (bfd_link_executable (info) && !info->nointerp) |
252b5132 | 15253 | { |
3d4d4302 | 15254 | s = bfd_get_linker_section (dynobj, ".interp"); |
252b5132 | 15255 | BFD_ASSERT (s != NULL); |
eea6121a | 15256 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
15257 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
15258 | } | |
15259 | } | |
5e681ec4 PB |
15260 | |
15261 | /* Set up .got offsets for local syms, and space for local dynamic | |
15262 | relocs. */ | |
c72f2fb2 | 15263 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
252b5132 | 15264 | { |
5e681ec4 PB |
15265 | bfd_signed_vma *local_got; |
15266 | bfd_signed_vma *end_local_got; | |
34e77a92 | 15267 | struct arm_local_iplt_info **local_iplt_ptr, *local_iplt; |
5e681ec4 | 15268 | char *local_tls_type; |
0855e32b | 15269 | bfd_vma *local_tlsdesc_gotent; |
5e681ec4 PB |
15270 | bfd_size_type locsymcount; |
15271 | Elf_Internal_Shdr *symtab_hdr; | |
15272 | asection *srel; | |
4dfe6ac6 | 15273 | bfd_boolean is_vxworks = htab->vxworks_p; |
34e77a92 | 15274 | unsigned int symndx; |
5e681ec4 | 15275 | |
0ffa91dd | 15276 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
15277 | continue; |
15278 | ||
15279 | for (s = ibfd->sections; s != NULL; s = s->next) | |
15280 | { | |
0bdcacaf | 15281 | struct elf_dyn_relocs *p; |
5e681ec4 | 15282 | |
0bdcacaf | 15283 | for (p = (struct elf_dyn_relocs *) |
99059e56 | 15284 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) |
5e681ec4 | 15285 | { |
0bdcacaf RS |
15286 | if (!bfd_is_abs_section (p->sec) |
15287 | && bfd_is_abs_section (p->sec->output_section)) | |
5e681ec4 PB |
15288 | { |
15289 | /* Input section has been discarded, either because | |
15290 | it is a copy of a linkonce section or due to | |
15291 | linker script /DISCARD/, so we'll be discarding | |
15292 | the relocs too. */ | |
15293 | } | |
3348747a | 15294 | else if (is_vxworks |
0bdcacaf | 15295 | && strcmp (p->sec->output_section->name, |
3348747a NS |
15296 | ".tls_vars") == 0) |
15297 | { | |
15298 | /* Relocations in vxworks .tls_vars sections are | |
15299 | handled specially by the loader. */ | |
15300 | } | |
5e681ec4 PB |
15301 | else if (p->count != 0) |
15302 | { | |
0bdcacaf | 15303 | srel = elf_section_data (p->sec)->sreloc; |
47beaa6a | 15304 | elf32_arm_allocate_dynrelocs (info, srel, p->count); |
0bdcacaf | 15305 | if ((p->sec->output_section->flags & SEC_READONLY) != 0) |
5e681ec4 PB |
15306 | info->flags |= DF_TEXTREL; |
15307 | } | |
15308 | } | |
15309 | } | |
15310 | ||
15311 | local_got = elf_local_got_refcounts (ibfd); | |
15312 | if (!local_got) | |
15313 | continue; | |
15314 | ||
0ffa91dd | 15315 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
15316 | locsymcount = symtab_hdr->sh_info; |
15317 | end_local_got = local_got + locsymcount; | |
34e77a92 | 15318 | local_iplt_ptr = elf32_arm_local_iplt (ibfd); |
ba93b8ac | 15319 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
0855e32b | 15320 | local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd); |
34e77a92 | 15321 | symndx = 0; |
362d30a1 RS |
15322 | s = htab->root.sgot; |
15323 | srel = htab->root.srelgot; | |
0855e32b | 15324 | for (; local_got < end_local_got; |
34e77a92 RS |
15325 | ++local_got, ++local_iplt_ptr, ++local_tls_type, |
15326 | ++local_tlsdesc_gotent, ++symndx) | |
5e681ec4 | 15327 | { |
0855e32b | 15328 | *local_tlsdesc_gotent = (bfd_vma) -1; |
34e77a92 RS |
15329 | local_iplt = *local_iplt_ptr; |
15330 | if (local_iplt != NULL) | |
15331 | { | |
15332 | struct elf_dyn_relocs *p; | |
15333 | ||
15334 | if (local_iplt->root.refcount > 0) | |
15335 | { | |
15336 | elf32_arm_allocate_plt_entry (info, TRUE, | |
15337 | &local_iplt->root, | |
15338 | &local_iplt->arm); | |
15339 | if (local_iplt->arm.noncall_refcount == 0) | |
15340 | /* All references to the PLT are calls, so all | |
15341 | non-call references can resolve directly to the | |
15342 | run-time target. This means that the .got entry | |
15343 | would be the same as the .igot.plt entry, so there's | |
15344 | no point creating both. */ | |
15345 | *local_got = 0; | |
15346 | } | |
15347 | else | |
15348 | { | |
15349 | BFD_ASSERT (local_iplt->arm.noncall_refcount == 0); | |
15350 | local_iplt->root.offset = (bfd_vma) -1; | |
15351 | } | |
15352 | ||
15353 | for (p = local_iplt->dyn_relocs; p != NULL; p = p->next) | |
15354 | { | |
15355 | asection *psrel; | |
15356 | ||
15357 | psrel = elf_section_data (p->sec)->sreloc; | |
15358 | if (local_iplt->arm.noncall_refcount == 0) | |
15359 | elf32_arm_allocate_irelocs (info, psrel, p->count); | |
15360 | else | |
15361 | elf32_arm_allocate_dynrelocs (info, psrel, p->count); | |
15362 | } | |
15363 | } | |
5e681ec4 PB |
15364 | if (*local_got > 0) |
15365 | { | |
34e77a92 RS |
15366 | Elf_Internal_Sym *isym; |
15367 | ||
eea6121a | 15368 | *local_got = s->size; |
ba93b8ac DJ |
15369 | if (*local_tls_type & GOT_TLS_GD) |
15370 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
15371 | s->size += 8; | |
0855e32b NS |
15372 | if (*local_tls_type & GOT_TLS_GDESC) |
15373 | { | |
15374 | *local_tlsdesc_gotent = htab->root.sgotplt->size | |
15375 | - elf32_arm_compute_jump_table_size (htab); | |
15376 | htab->root.sgotplt->size += 8; | |
15377 | *local_got = (bfd_vma) -2; | |
34e77a92 | 15378 | /* plt.got_offset needs to know there's a TLS_DESC |
0855e32b | 15379 | reloc in the middle of .got.plt. */ |
99059e56 | 15380 | htab->num_tls_desc++; |
0855e32b | 15381 | } |
ba93b8ac DJ |
15382 | if (*local_tls_type & GOT_TLS_IE) |
15383 | s->size += 4; | |
ba93b8ac | 15384 | |
0855e32b NS |
15385 | if (*local_tls_type & GOT_NORMAL) |
15386 | { | |
15387 | /* If the symbol is both GD and GDESC, *local_got | |
15388 | may have been overwritten. */ | |
15389 | *local_got = s->size; | |
15390 | s->size += 4; | |
15391 | } | |
15392 | ||
34e77a92 RS |
15393 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx); |
15394 | if (isym == NULL) | |
15395 | return FALSE; | |
15396 | ||
15397 | /* If all references to an STT_GNU_IFUNC PLT are calls, | |
15398 | then all non-call references, including this GOT entry, | |
15399 | resolve directly to the run-time target. */ | |
15400 | if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC | |
15401 | && (local_iplt == NULL | |
15402 | || local_iplt->arm.noncall_refcount == 0)) | |
15403 | elf32_arm_allocate_irelocs (info, srel, 1); | |
0e1862bb | 15404 | else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC) |
0855e32b | 15405 | { |
0e1862bb | 15406 | if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)) |
3064e1ff JB |
15407 | || *local_tls_type & GOT_TLS_GD) |
15408 | elf32_arm_allocate_dynrelocs (info, srel, 1); | |
99059e56 | 15409 | |
0e1862bb | 15410 | if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC) |
3064e1ff JB |
15411 | { |
15412 | elf32_arm_allocate_dynrelocs (info, | |
15413 | htab->root.srelplt, 1); | |
15414 | htab->tls_trampoline = -1; | |
15415 | } | |
0855e32b | 15416 | } |
5e681ec4 PB |
15417 | } |
15418 | else | |
15419 | *local_got = (bfd_vma) -1; | |
15420 | } | |
252b5132 RH |
15421 | } |
15422 | ||
ba93b8ac DJ |
15423 | if (htab->tls_ldm_got.refcount > 0) |
15424 | { | |
15425 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
15426 | for R_ARM_TLS_LDM32 relocations. */ | |
362d30a1 RS |
15427 | htab->tls_ldm_got.offset = htab->root.sgot->size; |
15428 | htab->root.sgot->size += 8; | |
0e1862bb | 15429 | if (bfd_link_pic (info)) |
47beaa6a | 15430 | elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1); |
ba93b8ac DJ |
15431 | } |
15432 | else | |
15433 | htab->tls_ldm_got.offset = -1; | |
15434 | ||
5e681ec4 PB |
15435 | /* Allocate global sym .plt and .got entries, and space for global |
15436 | sym dynamic relocs. */ | |
47beaa6a | 15437 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info); |
252b5132 | 15438 | |
d504ffc8 | 15439 | /* Here we rummage through the found bfds to collect glue information. */ |
c72f2fb2 | 15440 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) |
c7b8f16e | 15441 | { |
0ffa91dd | 15442 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
15443 | continue; |
15444 | ||
c7b8f16e JB |
15445 | /* Initialise mapping tables for code/data. */ |
15446 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 15447 | |
c7b8f16e | 15448 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
a504d23a LA |
15449 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info) |
15450 | || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info)) | |
99059e56 RM |
15451 | /* xgettext:c-format */ |
15452 | _bfd_error_handler (_("Errors encountered processing file %s"), | |
c7b8f16e JB |
15453 | ibfd->filename); |
15454 | } | |
d504ffc8 | 15455 | |
3e6b1042 DJ |
15456 | /* Allocate space for the glue sections now that we've sized them. */ |
15457 | bfd_elf32_arm_allocate_interworking_sections (info); | |
15458 | ||
0855e32b NS |
15459 | /* For every jump slot reserved in the sgotplt, reloc_count is |
15460 | incremented. However, when we reserve space for TLS descriptors, | |
15461 | it's not incremented, so in order to compute the space reserved | |
15462 | for them, it suffices to multiply the reloc count by the jump | |
15463 | slot size. */ | |
15464 | if (htab->root.srelplt) | |
15465 | htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab); | |
15466 | ||
15467 | if (htab->tls_trampoline) | |
15468 | { | |
15469 | if (htab->root.splt->size == 0) | |
15470 | htab->root.splt->size += htab->plt_header_size; | |
b38cadfb | 15471 | |
0855e32b NS |
15472 | htab->tls_trampoline = htab->root.splt->size; |
15473 | htab->root.splt->size += htab->plt_entry_size; | |
b38cadfb | 15474 | |
0855e32b | 15475 | /* If we're not using lazy TLS relocations, don't generate the |
99059e56 | 15476 | PLT and GOT entries they require. */ |
0855e32b NS |
15477 | if (!(info->flags & DF_BIND_NOW)) |
15478 | { | |
15479 | htab->dt_tlsdesc_got = htab->root.sgot->size; | |
15480 | htab->root.sgot->size += 4; | |
15481 | ||
15482 | htab->dt_tlsdesc_plt = htab->root.splt->size; | |
15483 | htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline); | |
15484 | } | |
15485 | } | |
15486 | ||
252b5132 RH |
15487 | /* The check_relocs and adjust_dynamic_symbol entry points have |
15488 | determined the sizes of the various dynamic sections. Allocate | |
15489 | memory for them. */ | |
b34976b6 AM |
15490 | plt = FALSE; |
15491 | relocs = FALSE; | |
252b5132 RH |
15492 | for (s = dynobj->sections; s != NULL; s = s->next) |
15493 | { | |
15494 | const char * name; | |
252b5132 RH |
15495 | |
15496 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
15497 | continue; | |
15498 | ||
15499 | /* It's OK to base decisions on the section name, because none | |
15500 | of the dynobj section names depend upon the input files. */ | |
15501 | name = bfd_get_section_name (dynobj, s); | |
15502 | ||
34e77a92 | 15503 | if (s == htab->root.splt) |
252b5132 | 15504 | { |
c456f082 AM |
15505 | /* Remember whether there is a PLT. */ |
15506 | plt = s->size != 0; | |
252b5132 | 15507 | } |
0112cd26 | 15508 | else if (CONST_STRNEQ (name, ".rel")) |
252b5132 | 15509 | { |
c456f082 | 15510 | if (s->size != 0) |
252b5132 | 15511 | { |
252b5132 | 15512 | /* Remember whether there are any reloc sections other |
00a97672 | 15513 | than .rel(a).plt and .rela.plt.unloaded. */ |
362d30a1 | 15514 | if (s != htab->root.srelplt && s != htab->srelplt2) |
b34976b6 | 15515 | relocs = TRUE; |
252b5132 RH |
15516 | |
15517 | /* We use the reloc_count field as a counter if we need | |
15518 | to copy relocs into the output file. */ | |
15519 | s->reloc_count = 0; | |
15520 | } | |
15521 | } | |
34e77a92 RS |
15522 | else if (s != htab->root.sgot |
15523 | && s != htab->root.sgotplt | |
15524 | && s != htab->root.iplt | |
15525 | && s != htab->root.igotplt | |
15526 | && s != htab->sdynbss) | |
252b5132 RH |
15527 | { |
15528 | /* It's not one of our sections, so don't allocate space. */ | |
15529 | continue; | |
15530 | } | |
15531 | ||
c456f082 | 15532 | if (s->size == 0) |
252b5132 | 15533 | { |
c456f082 | 15534 | /* If we don't need this section, strip it from the |
00a97672 RS |
15535 | output file. This is mostly to handle .rel(a).bss and |
15536 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
15537 | create_dynamic_sections, because they must be created |
15538 | before the linker maps input sections to output | |
15539 | sections. The linker does that before | |
15540 | adjust_dynamic_symbol is called, and it is that | |
15541 | function which decides whether anything needs to go | |
15542 | into these sections. */ | |
8423293d | 15543 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
15544 | continue; |
15545 | } | |
15546 | ||
c456f082 AM |
15547 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
15548 | continue; | |
15549 | ||
252b5132 | 15550 | /* Allocate memory for the section contents. */ |
21d799b5 | 15551 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 15552 | if (s->contents == NULL) |
b34976b6 | 15553 | return FALSE; |
252b5132 RH |
15554 | } |
15555 | ||
15556 | if (elf_hash_table (info)->dynamic_sections_created) | |
15557 | { | |
15558 | /* Add some entries to the .dynamic section. We fill in the | |
15559 | values later, in elf32_arm_finish_dynamic_sections, but we | |
15560 | must add the entries now so that we get the correct size for | |
15561 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
15562 | dynamic linker and used by the debugger. */ | |
dc810e39 | 15563 | #define add_dynamic_entry(TAG, VAL) \ |
5a580b3a | 15564 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
dc810e39 | 15565 | |
0e1862bb | 15566 | if (bfd_link_executable (info)) |
252b5132 | 15567 | { |
dc810e39 | 15568 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
b34976b6 | 15569 | return FALSE; |
252b5132 RH |
15570 | } |
15571 | ||
15572 | if (plt) | |
15573 | { | |
dc810e39 AM |
15574 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
15575 | || !add_dynamic_entry (DT_PLTRELSZ, 0) | |
00a97672 RS |
15576 | || !add_dynamic_entry (DT_PLTREL, |
15577 | htab->use_rel ? DT_REL : DT_RELA) | |
dc810e39 | 15578 | || !add_dynamic_entry (DT_JMPREL, 0)) |
b34976b6 | 15579 | return FALSE; |
0855e32b NS |
15580 | |
15581 | if (htab->dt_tlsdesc_plt && | |
b38cadfb | 15582 | (!add_dynamic_entry (DT_TLSDESC_PLT,0) |
0855e32b | 15583 | || !add_dynamic_entry (DT_TLSDESC_GOT,0))) |
b38cadfb | 15584 | return FALSE; |
252b5132 RH |
15585 | } |
15586 | ||
15587 | if (relocs) | |
15588 | { | |
00a97672 RS |
15589 | if (htab->use_rel) |
15590 | { | |
15591 | if (!add_dynamic_entry (DT_REL, 0) | |
15592 | || !add_dynamic_entry (DT_RELSZ, 0) | |
15593 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) | |
15594 | return FALSE; | |
15595 | } | |
15596 | else | |
15597 | { | |
15598 | if (!add_dynamic_entry (DT_RELA, 0) | |
15599 | || !add_dynamic_entry (DT_RELASZ, 0) | |
15600 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) | |
15601 | return FALSE; | |
15602 | } | |
252b5132 RH |
15603 | } |
15604 | ||
08d1f311 DJ |
15605 | /* If any dynamic relocs apply to a read-only section, |
15606 | then we need a DT_TEXTREL entry. */ | |
15607 | if ((info->flags & DF_TEXTREL) == 0) | |
8029a119 NC |
15608 | elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs, |
15609 | info); | |
08d1f311 | 15610 | |
99e4ae17 | 15611 | if ((info->flags & DF_TEXTREL) != 0) |
252b5132 | 15612 | { |
dc810e39 | 15613 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
b34976b6 | 15614 | return FALSE; |
252b5132 | 15615 | } |
7a2b07ff NS |
15616 | if (htab->vxworks_p |
15617 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) | |
15618 | return FALSE; | |
252b5132 | 15619 | } |
8532796c | 15620 | #undef add_dynamic_entry |
252b5132 | 15621 | |
b34976b6 | 15622 | return TRUE; |
252b5132 RH |
15623 | } |
15624 | ||
0855e32b NS |
15625 | /* Size sections even though they're not dynamic. We use it to setup |
15626 | _TLS_MODULE_BASE_, if needed. */ | |
15627 | ||
15628 | static bfd_boolean | |
15629 | elf32_arm_always_size_sections (bfd *output_bfd, | |
99059e56 | 15630 | struct bfd_link_info *info) |
0855e32b NS |
15631 | { |
15632 | asection *tls_sec; | |
15633 | ||
0e1862bb | 15634 | if (bfd_link_relocatable (info)) |
0855e32b NS |
15635 | return TRUE; |
15636 | ||
15637 | tls_sec = elf_hash_table (info)->tls_sec; | |
15638 | ||
15639 | if (tls_sec) | |
15640 | { | |
15641 | struct elf_link_hash_entry *tlsbase; | |
15642 | ||
15643 | tlsbase = elf_link_hash_lookup | |
15644 | (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE); | |
15645 | ||
15646 | if (tlsbase) | |
99059e56 RM |
15647 | { |
15648 | struct bfd_link_hash_entry *bh = NULL; | |
0855e32b | 15649 | const struct elf_backend_data *bed |
99059e56 | 15650 | = get_elf_backend_data (output_bfd); |
0855e32b | 15651 | |
99059e56 | 15652 | if (!(_bfd_generic_link_add_one_symbol |
0855e32b NS |
15653 | (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL, |
15654 | tls_sec, 0, NULL, FALSE, | |
15655 | bed->collect, &bh))) | |
15656 | return FALSE; | |
b38cadfb | 15657 | |
99059e56 RM |
15658 | tlsbase->type = STT_TLS; |
15659 | tlsbase = (struct elf_link_hash_entry *)bh; | |
15660 | tlsbase->def_regular = 1; | |
15661 | tlsbase->other = STV_HIDDEN; | |
15662 | (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE); | |
0855e32b NS |
15663 | } |
15664 | } | |
15665 | return TRUE; | |
15666 | } | |
15667 | ||
252b5132 RH |
15668 | /* Finish up dynamic symbol handling. We set the contents of various |
15669 | dynamic sections here. */ | |
15670 | ||
b34976b6 | 15671 | static bfd_boolean |
906e58ca NC |
15672 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
15673 | struct bfd_link_info * info, | |
15674 | struct elf_link_hash_entry * h, | |
15675 | Elf_Internal_Sym * sym) | |
252b5132 | 15676 | { |
e5a52504 | 15677 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 15678 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 15679 | |
e5a52504 | 15680 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
15681 | if (htab == NULL) |
15682 | return FALSE; | |
15683 | ||
b7693d02 | 15684 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
15685 | |
15686 | if (h->plt.offset != (bfd_vma) -1) | |
15687 | { | |
34e77a92 | 15688 | if (!eh->is_iplt) |
e5a52504 | 15689 | { |
34e77a92 | 15690 | BFD_ASSERT (h->dynindx != -1); |
57460bcf NC |
15691 | if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt, |
15692 | h->dynindx, 0)) | |
15693 | return FALSE; | |
e5a52504 | 15694 | } |
57e8b36a | 15695 | |
f5385ebf | 15696 | if (!h->def_regular) |
252b5132 RH |
15697 | { |
15698 | /* Mark the symbol as undefined, rather than as defined in | |
3a635617 | 15699 | the .plt section. */ |
252b5132 | 15700 | sym->st_shndx = SHN_UNDEF; |
3a635617 | 15701 | /* If the symbol is weak we need to clear the value. |
d982ba73 PB |
15702 | Otherwise, the PLT entry would provide a definition for |
15703 | the symbol even if the symbol wasn't defined anywhere, | |
3a635617 WN |
15704 | and so the symbol would never be NULL. Leave the value if |
15705 | there were any relocations where pointer equality matters | |
15706 | (this is a clue for the dynamic linker, to make function | |
15707 | pointer comparisons work between an application and shared | |
15708 | library). */ | |
97323ad1 | 15709 | if (!h->ref_regular_nonweak || !h->pointer_equality_needed) |
d982ba73 | 15710 | sym->st_value = 0; |
252b5132 | 15711 | } |
34e77a92 RS |
15712 | else if (eh->is_iplt && eh->plt.noncall_refcount != 0) |
15713 | { | |
15714 | /* At least one non-call relocation references this .iplt entry, | |
15715 | so the .iplt entry is the function's canonical address. */ | |
15716 | sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC); | |
39d911fc | 15717 | ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM); |
34e77a92 RS |
15718 | sym->st_shndx = (_bfd_elf_section_from_bfd_section |
15719 | (output_bfd, htab->root.iplt->output_section)); | |
15720 | sym->st_value = (h->plt.offset | |
15721 | + htab->root.iplt->output_section->vma | |
15722 | + htab->root.iplt->output_offset); | |
15723 | } | |
252b5132 RH |
15724 | } |
15725 | ||
f5385ebf | 15726 | if (h->needs_copy) |
252b5132 RH |
15727 | { |
15728 | asection * s; | |
947216bf | 15729 | Elf_Internal_Rela rel; |
252b5132 RH |
15730 | |
15731 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
15732 | BFD_ASSERT (h->dynindx != -1 |
15733 | && (h->root.type == bfd_link_hash_defined | |
15734 | || h->root.type == bfd_link_hash_defweak)); | |
15735 | ||
362d30a1 | 15736 | s = htab->srelbss; |
252b5132 RH |
15737 | BFD_ASSERT (s != NULL); |
15738 | ||
00a97672 | 15739 | rel.r_addend = 0; |
252b5132 RH |
15740 | rel.r_offset = (h->root.u.def.value |
15741 | + h->root.u.def.section->output_section->vma | |
15742 | + h->root.u.def.section->output_offset); | |
15743 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
47beaa6a | 15744 | elf32_arm_add_dynreloc (output_bfd, info, s, &rel); |
252b5132 RH |
15745 | } |
15746 | ||
00a97672 RS |
15747 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
15748 | the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative | |
15749 | to the ".got" section. */ | |
9637f6ef | 15750 | if (h == htab->root.hdynamic |
00a97672 | 15751 | || (!htab->vxworks_p && h == htab->root.hgot)) |
252b5132 RH |
15752 | sym->st_shndx = SHN_ABS; |
15753 | ||
b34976b6 | 15754 | return TRUE; |
252b5132 RH |
15755 | } |
15756 | ||
0855e32b NS |
15757 | static void |
15758 | arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
15759 | void *contents, | |
15760 | const unsigned long *template, unsigned count) | |
15761 | { | |
15762 | unsigned ix; | |
b38cadfb | 15763 | |
0855e32b NS |
15764 | for (ix = 0; ix != count; ix++) |
15765 | { | |
15766 | unsigned long insn = template[ix]; | |
15767 | ||
15768 | /* Emit mov pc,rx if bx is not permitted. */ | |
15769 | if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10) | |
15770 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
15771 | put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4); | |
15772 | } | |
15773 | } | |
15774 | ||
99059e56 RM |
15775 | /* Install the special first PLT entry for elf32-arm-nacl. Unlike |
15776 | other variants, NaCl needs this entry in a static executable's | |
15777 | .iplt too. When we're handling that case, GOT_DISPLACEMENT is | |
15778 | zero. For .iplt really only the last bundle is useful, and .iplt | |
15779 | could have a shorter first entry, with each individual PLT entry's | |
15780 | relative branch calculated differently so it targets the last | |
15781 | bundle instead of the instruction before it (labelled .Lplt_tail | |
15782 | above). But it's simpler to keep the size and layout of PLT0 | |
15783 | consistent with the dynamic case, at the cost of some dead code at | |
15784 | the start of .iplt and the one dead store to the stack at the start | |
15785 | of .Lplt_tail. */ | |
15786 | static void | |
15787 | arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd, | |
15788 | asection *plt, bfd_vma got_displacement) | |
15789 | { | |
15790 | unsigned int i; | |
15791 | ||
15792 | put_arm_insn (htab, output_bfd, | |
15793 | elf32_arm_nacl_plt0_entry[0] | |
15794 | | arm_movw_immediate (got_displacement), | |
15795 | plt->contents + 0); | |
15796 | put_arm_insn (htab, output_bfd, | |
15797 | elf32_arm_nacl_plt0_entry[1] | |
15798 | | arm_movt_immediate (got_displacement), | |
15799 | plt->contents + 4); | |
15800 | ||
15801 | for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i) | |
15802 | put_arm_insn (htab, output_bfd, | |
15803 | elf32_arm_nacl_plt0_entry[i], | |
15804 | plt->contents + (i * 4)); | |
15805 | } | |
15806 | ||
252b5132 RH |
15807 | /* Finish up the dynamic sections. */ |
15808 | ||
b34976b6 | 15809 | static bfd_boolean |
57e8b36a | 15810 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
15811 | { |
15812 | bfd * dynobj; | |
15813 | asection * sgot; | |
15814 | asection * sdyn; | |
4dfe6ac6 NC |
15815 | struct elf32_arm_link_hash_table *htab; |
15816 | ||
15817 | htab = elf32_arm_hash_table (info); | |
15818 | if (htab == NULL) | |
15819 | return FALSE; | |
252b5132 RH |
15820 | |
15821 | dynobj = elf_hash_table (info)->dynobj; | |
15822 | ||
362d30a1 | 15823 | sgot = htab->root.sgotplt; |
894891db NC |
15824 | /* A broken linker script might have discarded the dynamic sections. |
15825 | Catch this here so that we do not seg-fault later on. */ | |
15826 | if (sgot != NULL && bfd_is_abs_section (sgot->output_section)) | |
15827 | return FALSE; | |
3d4d4302 | 15828 | sdyn = bfd_get_linker_section (dynobj, ".dynamic"); |
252b5132 RH |
15829 | |
15830 | if (elf_hash_table (info)->dynamic_sections_created) | |
15831 | { | |
15832 | asection *splt; | |
15833 | Elf32_External_Dyn *dyncon, *dynconend; | |
15834 | ||
362d30a1 | 15835 | splt = htab->root.splt; |
24a1ba0f | 15836 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
cbc704f3 | 15837 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
252b5132 RH |
15838 | |
15839 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 15840 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 15841 | |
252b5132 RH |
15842 | for (; dyncon < dynconend; dyncon++) |
15843 | { | |
15844 | Elf_Internal_Dyn dyn; | |
15845 | const char * name; | |
15846 | asection * s; | |
15847 | ||
15848 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
15849 | ||
15850 | switch (dyn.d_tag) | |
15851 | { | |
229fcec5 MM |
15852 | unsigned int type; |
15853 | ||
252b5132 | 15854 | default: |
7a2b07ff NS |
15855 | if (htab->vxworks_p |
15856 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) | |
15857 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
15858 | break; |
15859 | ||
229fcec5 MM |
15860 | case DT_HASH: |
15861 | name = ".hash"; | |
15862 | goto get_vma_if_bpabi; | |
15863 | case DT_STRTAB: | |
15864 | name = ".dynstr"; | |
15865 | goto get_vma_if_bpabi; | |
15866 | case DT_SYMTAB: | |
15867 | name = ".dynsym"; | |
15868 | goto get_vma_if_bpabi; | |
c0042f5d MM |
15869 | case DT_VERSYM: |
15870 | name = ".gnu.version"; | |
15871 | goto get_vma_if_bpabi; | |
15872 | case DT_VERDEF: | |
15873 | name = ".gnu.version_d"; | |
15874 | goto get_vma_if_bpabi; | |
15875 | case DT_VERNEED: | |
15876 | name = ".gnu.version_r"; | |
15877 | goto get_vma_if_bpabi; | |
15878 | ||
252b5132 | 15879 | case DT_PLTGOT: |
4ade44b7 | 15880 | name = htab->symbian_p ? ".got" : ".got.plt"; |
252b5132 RH |
15881 | goto get_vma; |
15882 | case DT_JMPREL: | |
00a97672 | 15883 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 | 15884 | get_vma: |
4ade44b7 | 15885 | s = bfd_get_linker_section (dynobj, name); |
05456594 NC |
15886 | if (s == NULL) |
15887 | { | |
05456594 | 15888 | (*_bfd_error_handler) |
4ade44b7 | 15889 | (_("could not find section %s"), name); |
05456594 NC |
15890 | bfd_set_error (bfd_error_invalid_operation); |
15891 | return FALSE; | |
15892 | } | |
229fcec5 | 15893 | if (!htab->symbian_p) |
4ade44b7 | 15894 | dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; |
229fcec5 MM |
15895 | else |
15896 | /* In the BPABI, tags in the PT_DYNAMIC section point | |
15897 | at the file offset, not the memory address, for the | |
15898 | convenience of the post linker. */ | |
4ade44b7 | 15899 | dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset; |
252b5132 RH |
15900 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
15901 | break; | |
15902 | ||
229fcec5 MM |
15903 | get_vma_if_bpabi: |
15904 | if (htab->symbian_p) | |
15905 | goto get_vma; | |
15906 | break; | |
15907 | ||
252b5132 | 15908 | case DT_PLTRELSZ: |
362d30a1 | 15909 | s = htab->root.srelplt; |
252b5132 | 15910 | BFD_ASSERT (s != NULL); |
eea6121a | 15911 | dyn.d_un.d_val = s->size; |
252b5132 RH |
15912 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
15913 | break; | |
906e58ca | 15914 | |
252b5132 | 15915 | case DT_RELSZ: |
00a97672 | 15916 | case DT_RELASZ: |
229fcec5 MM |
15917 | if (!htab->symbian_p) |
15918 | { | |
15919 | /* My reading of the SVR4 ABI indicates that the | |
15920 | procedure linkage table relocs (DT_JMPREL) should be | |
15921 | included in the overall relocs (DT_REL). This is | |
15922 | what Solaris does. However, UnixWare can not handle | |
15923 | that case. Therefore, we override the DT_RELSZ entry | |
15924 | here to make it not include the JMPREL relocs. Since | |
00a97672 | 15925 | the linker script arranges for .rel(a).plt to follow all |
229fcec5 MM |
15926 | other relocation sections, we don't have to worry |
15927 | about changing the DT_REL entry. */ | |
362d30a1 | 15928 | s = htab->root.srelplt; |
229fcec5 MM |
15929 | if (s != NULL) |
15930 | dyn.d_un.d_val -= s->size; | |
15931 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
15932 | break; | |
15933 | } | |
8029a119 | 15934 | /* Fall through. */ |
229fcec5 MM |
15935 | |
15936 | case DT_REL: | |
15937 | case DT_RELA: | |
229fcec5 MM |
15938 | /* In the BPABI, the DT_REL tag must point at the file |
15939 | offset, not the VMA, of the first relocation | |
15940 | section. So, we use code similar to that in | |
15941 | elflink.c, but do not check for SHF_ALLOC on the | |
15942 | relcoation section, since relocations sections are | |
15943 | never allocated under the BPABI. The comments above | |
15944 | about Unixware notwithstanding, we include all of the | |
15945 | relocations here. */ | |
15946 | if (htab->symbian_p) | |
15947 | { | |
15948 | unsigned int i; | |
15949 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) | |
15950 | ? SHT_REL : SHT_RELA); | |
15951 | dyn.d_un.d_val = 0; | |
15952 | for (i = 1; i < elf_numsections (output_bfd); i++) | |
15953 | { | |
906e58ca | 15954 | Elf_Internal_Shdr *hdr |
229fcec5 MM |
15955 | = elf_elfsections (output_bfd)[i]; |
15956 | if (hdr->sh_type == type) | |
15957 | { | |
906e58ca | 15958 | if (dyn.d_tag == DT_RELSZ |
229fcec5 MM |
15959 | || dyn.d_tag == DT_RELASZ) |
15960 | dyn.d_un.d_val += hdr->sh_size; | |
de52dba4 AM |
15961 | else if ((ufile_ptr) hdr->sh_offset |
15962 | <= dyn.d_un.d_val - 1) | |
229fcec5 MM |
15963 | dyn.d_un.d_val = hdr->sh_offset; |
15964 | } | |
15965 | } | |
15966 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
15967 | } | |
252b5132 | 15968 | break; |
88f7bcd5 | 15969 | |
0855e32b | 15970 | case DT_TLSDESC_PLT: |
99059e56 | 15971 | s = htab->root.splt; |
0855e32b NS |
15972 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
15973 | + htab->dt_tlsdesc_plt); | |
15974 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
15975 | break; | |
15976 | ||
15977 | case DT_TLSDESC_GOT: | |
99059e56 | 15978 | s = htab->root.sgot; |
0855e32b | 15979 | dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset |
99059e56 | 15980 | + htab->dt_tlsdesc_got); |
0855e32b NS |
15981 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
15982 | break; | |
15983 | ||
88f7bcd5 NC |
15984 | /* Set the bottom bit of DT_INIT/FINI if the |
15985 | corresponding function is Thumb. */ | |
15986 | case DT_INIT: | |
15987 | name = info->init_function; | |
15988 | goto get_sym; | |
15989 | case DT_FINI: | |
15990 | name = info->fini_function; | |
15991 | get_sym: | |
15992 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 15993 | then there is nothing to adjust. */ |
88f7bcd5 NC |
15994 | if (dyn.d_un.d_val != 0) |
15995 | { | |
15996 | struct elf_link_hash_entry * eh; | |
15997 | ||
15998 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
b34976b6 | 15999 | FALSE, FALSE, TRUE); |
39d911fc TP |
16000 | if (eh != NULL |
16001 | && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal) | |
16002 | == ST_BRANCH_TO_THUMB) | |
88f7bcd5 NC |
16003 | { |
16004 | dyn.d_un.d_val |= 1; | |
b34976b6 | 16005 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
16006 | } |
16007 | } | |
16008 | break; | |
252b5132 RH |
16009 | } |
16010 | } | |
16011 | ||
24a1ba0f | 16012 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 16013 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 16014 | { |
00a97672 RS |
16015 | const bfd_vma *plt0_entry; |
16016 | bfd_vma got_address, plt_address, got_displacement; | |
16017 | ||
16018 | /* Calculate the addresses of the GOT and PLT. */ | |
16019 | got_address = sgot->output_section->vma + sgot->output_offset; | |
16020 | plt_address = splt->output_section->vma + splt->output_offset; | |
16021 | ||
16022 | if (htab->vxworks_p) | |
16023 | { | |
16024 | /* The VxWorks GOT is relocated by the dynamic linker. | |
16025 | Therefore, we must emit relocations rather than simply | |
16026 | computing the values now. */ | |
16027 | Elf_Internal_Rela rel; | |
16028 | ||
16029 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
16030 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
16031 | splt->contents + 0); | |
16032 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
16033 | splt->contents + 4); | |
16034 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
16035 | splt->contents + 8); | |
00a97672 RS |
16036 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
16037 | ||
8029a119 | 16038 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
16039 | rel.r_offset = plt_address + 12; |
16040 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
16041 | rel.r_addend = 0; | |
16042 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
16043 | htab->srelplt2->contents); | |
16044 | } | |
b38cadfb | 16045 | else if (htab->nacl_p) |
99059e56 RM |
16046 | arm_nacl_put_plt0 (htab, output_bfd, splt, |
16047 | got_address + 8 - (plt_address + 16)); | |
eed94f8f NC |
16048 | else if (using_thumb_only (htab)) |
16049 | { | |
16050 | got_displacement = got_address - (plt_address + 12); | |
16051 | ||
16052 | plt0_entry = elf32_thumb2_plt0_entry; | |
16053 | put_arm_insn (htab, output_bfd, plt0_entry[0], | |
16054 | splt->contents + 0); | |
16055 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
16056 | splt->contents + 4); | |
16057 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
16058 | splt->contents + 8); | |
16059 | ||
16060 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 12); | |
16061 | } | |
00a97672 RS |
16062 | else |
16063 | { | |
16064 | got_displacement = got_address - (plt_address + 16); | |
16065 | ||
16066 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
16067 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
16068 | splt->contents + 0); | |
16069 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
16070 | splt->contents + 4); | |
16071 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
16072 | splt->contents + 8); | |
16073 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
16074 | splt->contents + 12); | |
5e681ec4 | 16075 | |
5e681ec4 | 16076 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
16077 | /* The displacement value goes in the otherwise-unused |
16078 | last word of the second entry. */ | |
16079 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 16080 | #else |
00a97672 | 16081 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 16082 | #endif |
00a97672 | 16083 | } |
f7a74f8c | 16084 | } |
252b5132 RH |
16085 | |
16086 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
16087 | really seem like the right value. */ | |
74541ad4 AM |
16088 | if (splt->output_section->owner == output_bfd) |
16089 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 | 16090 | |
0855e32b NS |
16091 | if (htab->dt_tlsdesc_plt) |
16092 | { | |
16093 | bfd_vma got_address | |
16094 | = sgot->output_section->vma + sgot->output_offset; | |
16095 | bfd_vma gotplt_address = (htab->root.sgot->output_section->vma | |
16096 | + htab->root.sgot->output_offset); | |
16097 | bfd_vma plt_address | |
16098 | = splt->output_section->vma + splt->output_offset; | |
16099 | ||
b38cadfb | 16100 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
16101 | splt->contents + htab->dt_tlsdesc_plt, |
16102 | dl_tlsdesc_lazy_trampoline, 6); | |
16103 | ||
16104 | bfd_put_32 (output_bfd, | |
16105 | gotplt_address + htab->dt_tlsdesc_got | |
16106 | - (plt_address + htab->dt_tlsdesc_plt) | |
16107 | - dl_tlsdesc_lazy_trampoline[6], | |
16108 | splt->contents + htab->dt_tlsdesc_plt + 24); | |
16109 | bfd_put_32 (output_bfd, | |
16110 | got_address - (plt_address + htab->dt_tlsdesc_plt) | |
16111 | - dl_tlsdesc_lazy_trampoline[7], | |
16112 | splt->contents + htab->dt_tlsdesc_plt + 24 + 4); | |
16113 | } | |
16114 | ||
16115 | if (htab->tls_trampoline) | |
16116 | { | |
b38cadfb | 16117 | arm_put_trampoline (htab, output_bfd, |
0855e32b NS |
16118 | splt->contents + htab->tls_trampoline, |
16119 | tls_trampoline, 3); | |
16120 | #ifdef FOUR_WORD_PLT | |
16121 | bfd_put_32 (output_bfd, 0x00000000, | |
16122 | splt->contents + htab->tls_trampoline + 12); | |
b38cadfb | 16123 | #endif |
0855e32b NS |
16124 | } |
16125 | ||
0e1862bb L |
16126 | if (htab->vxworks_p |
16127 | && !bfd_link_pic (info) | |
16128 | && htab->root.splt->size > 0) | |
00a97672 RS |
16129 | { |
16130 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
16131 | incorrect symbol indexes. */ | |
16132 | int num_plts; | |
eed62c48 | 16133 | unsigned char *p; |
00a97672 | 16134 | |
362d30a1 | 16135 | num_plts = ((htab->root.splt->size - htab->plt_header_size) |
00a97672 RS |
16136 | / htab->plt_entry_size); |
16137 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
16138 | ||
16139 | for (; num_plts; num_plts--) | |
16140 | { | |
16141 | Elf_Internal_Rela rel; | |
16142 | ||
16143 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
16144 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
16145 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
16146 | p += RELOC_SIZE (htab); | |
16147 | ||
16148 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
16149 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
16150 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
16151 | p += RELOC_SIZE (htab); | |
16152 | } | |
16153 | } | |
252b5132 RH |
16154 | } |
16155 | ||
99059e56 RM |
16156 | if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0) |
16157 | /* NaCl uses a special first entry in .iplt too. */ | |
16158 | arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0); | |
16159 | ||
252b5132 | 16160 | /* Fill in the first three entries in the global offset table. */ |
229fcec5 | 16161 | if (sgot) |
252b5132 | 16162 | { |
229fcec5 MM |
16163 | if (sgot->size > 0) |
16164 | { | |
16165 | if (sdyn == NULL) | |
16166 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
16167 | else | |
16168 | bfd_put_32 (output_bfd, | |
16169 | sdyn->output_section->vma + sdyn->output_offset, | |
16170 | sgot->contents); | |
16171 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
16172 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
16173 | } | |
252b5132 | 16174 | |
229fcec5 MM |
16175 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
16176 | } | |
252b5132 | 16177 | |
b34976b6 | 16178 | return TRUE; |
252b5132 RH |
16179 | } |
16180 | ||
ba96a88f | 16181 | static void |
57e8b36a | 16182 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
ba96a88f | 16183 | { |
9b485d32 | 16184 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 16185 | struct elf32_arm_link_hash_table *globals; |
ac4c9b04 | 16186 | struct elf_segment_map *m; |
ba96a88f NC |
16187 | |
16188 | i_ehdrp = elf_elfheader (abfd); | |
16189 | ||
94a3258f PB |
16190 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
16191 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
16192 | else | |
7394f108 | 16193 | _bfd_elf_post_process_headers (abfd, link_info); |
ba96a88f | 16194 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 16195 | |
93204d3a PB |
16196 | if (link_info) |
16197 | { | |
16198 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 16199 | if (globals != NULL && globals->byteswap_code) |
93204d3a PB |
16200 | i_ehdrp->e_flags |= EF_ARM_BE8; |
16201 | } | |
3bfcb652 NC |
16202 | |
16203 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5 | |
16204 | && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC))) | |
16205 | { | |
16206 | int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args); | |
5c294fee | 16207 | if (abi == AEABI_VFP_args_vfp) |
3bfcb652 NC |
16208 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD; |
16209 | else | |
16210 | i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT; | |
16211 | } | |
ac4c9b04 MG |
16212 | |
16213 | /* Scan segment to set p_flags attribute if it contains only sections with | |
f0728ee3 | 16214 | SHF_ARM_PURECODE flag. */ |
ac4c9b04 MG |
16215 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
16216 | { | |
16217 | unsigned int j; | |
16218 | ||
16219 | if (m->count == 0) | |
16220 | continue; | |
16221 | for (j = 0; j < m->count; j++) | |
16222 | { | |
f0728ee3 | 16223 | if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE)) |
ac4c9b04 MG |
16224 | break; |
16225 | } | |
16226 | if (j == m->count) | |
16227 | { | |
16228 | m->p_flags = PF_X; | |
16229 | m->p_flags_valid = 1; | |
16230 | } | |
16231 | } | |
ba96a88f NC |
16232 | } |
16233 | ||
99e4ae17 | 16234 | static enum elf_reloc_type_class |
7e612e98 AM |
16235 | elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, |
16236 | const asection *rel_sec ATTRIBUTE_UNUSED, | |
16237 | const Elf_Internal_Rela *rela) | |
99e4ae17 | 16238 | { |
f51e552e | 16239 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
16240 | { |
16241 | case R_ARM_RELATIVE: | |
16242 | return reloc_class_relative; | |
16243 | case R_ARM_JUMP_SLOT: | |
16244 | return reloc_class_plt; | |
16245 | case R_ARM_COPY: | |
16246 | return reloc_class_copy; | |
109575d7 JW |
16247 | case R_ARM_IRELATIVE: |
16248 | return reloc_class_ifunc; | |
99e4ae17 AJ |
16249 | default: |
16250 | return reloc_class_normal; | |
16251 | } | |
16252 | } | |
16253 | ||
e489d0ae | 16254 | static void |
57e8b36a | 16255 | elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) |
e16bb312 | 16256 | { |
5a6c6817 | 16257 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
16258 | } |
16259 | ||
40a18ebd NC |
16260 | /* Return TRUE if this is an unwinding table entry. */ |
16261 | ||
16262 | static bfd_boolean | |
16263 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) | |
16264 | { | |
0112cd26 NC |
16265 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
16266 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
16267 | } |
16268 | ||
16269 | ||
16270 | /* Set the type and flags for an ARM section. We do this by | |
16271 | the section name, which is a hack, but ought to work. */ | |
16272 | ||
16273 | static bfd_boolean | |
16274 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) | |
16275 | { | |
16276 | const char * name; | |
16277 | ||
16278 | name = bfd_get_section_name (abfd, sec); | |
16279 | ||
16280 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
16281 | { | |
16282 | hdr->sh_type = SHT_ARM_EXIDX; | |
16283 | hdr->sh_flags |= SHF_LINK_ORDER; | |
16284 | } | |
ac4c9b04 | 16285 | |
f0728ee3 AV |
16286 | if (sec->flags & SEC_ELF_PURECODE) |
16287 | hdr->sh_flags |= SHF_ARM_PURECODE; | |
ac4c9b04 | 16288 | |
40a18ebd NC |
16289 | return TRUE; |
16290 | } | |
16291 | ||
6dc132d9 L |
16292 | /* Handle an ARM specific section when reading an object file. This is |
16293 | called when bfd_section_from_shdr finds a section with an unknown | |
16294 | type. */ | |
40a18ebd NC |
16295 | |
16296 | static bfd_boolean | |
16297 | elf32_arm_section_from_shdr (bfd *abfd, | |
16298 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
16299 | const char *name, |
16300 | int shindex) | |
40a18ebd NC |
16301 | { |
16302 | /* There ought to be a place to keep ELF backend specific flags, but | |
16303 | at the moment there isn't one. We just keep track of the | |
16304 | sections by their name, instead. Fortunately, the ABI gives | |
16305 | names for all the ARM specific sections, so we will probably get | |
16306 | away with this. */ | |
16307 | switch (hdr->sh_type) | |
16308 | { | |
16309 | case SHT_ARM_EXIDX: | |
0951f019 RE |
16310 | case SHT_ARM_PREEMPTMAP: |
16311 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
16312 | break; |
16313 | ||
16314 | default: | |
16315 | return FALSE; | |
16316 | } | |
16317 | ||
6dc132d9 | 16318 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
40a18ebd NC |
16319 | return FALSE; |
16320 | ||
16321 | return TRUE; | |
16322 | } | |
e489d0ae | 16323 | |
44444f50 NC |
16324 | static _arm_elf_section_data * |
16325 | get_arm_elf_section_data (asection * sec) | |
16326 | { | |
47b2e99c JZ |
16327 | if (sec && sec->owner && is_arm_elf (sec->owner)) |
16328 | return elf32_arm_section_data (sec); | |
44444f50 NC |
16329 | else |
16330 | return NULL; | |
8e3de13a NC |
16331 | } |
16332 | ||
4e617b1e PB |
16333 | typedef struct |
16334 | { | |
57402f1e | 16335 | void *flaginfo; |
4e617b1e | 16336 | struct bfd_link_info *info; |
91a5743d PB |
16337 | asection *sec; |
16338 | int sec_shndx; | |
6e0b88f1 AM |
16339 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
16340 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
16341 | } output_arch_syminfo; |
16342 | ||
16343 | enum map_symbol_type | |
16344 | { | |
16345 | ARM_MAP_ARM, | |
16346 | ARM_MAP_THUMB, | |
16347 | ARM_MAP_DATA | |
16348 | }; | |
16349 | ||
16350 | ||
7413f23f | 16351 | /* Output a single mapping symbol. */ |
4e617b1e PB |
16352 | |
16353 | static bfd_boolean | |
7413f23f DJ |
16354 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
16355 | enum map_symbol_type type, | |
16356 | bfd_vma offset) | |
4e617b1e PB |
16357 | { |
16358 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
16359 | Elf_Internal_Sym sym; |
16360 | ||
91a5743d PB |
16361 | sym.st_value = osi->sec->output_section->vma |
16362 | + osi->sec->output_offset | |
16363 | + offset; | |
4e617b1e PB |
16364 | sym.st_size = 0; |
16365 | sym.st_other = 0; | |
16366 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 16367 | sym.st_shndx = osi->sec_shndx; |
35fc36a8 | 16368 | sym.st_target_internal = 0; |
fe33d2fa | 16369 | elf32_arm_section_map_add (osi->sec, names[type][1], offset); |
57402f1e | 16370 | return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
16371 | } |
16372 | ||
34e77a92 RS |
16373 | /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT. |
16374 | IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */ | |
4e617b1e PB |
16375 | |
16376 | static bfd_boolean | |
34e77a92 RS |
16377 | elf32_arm_output_plt_map_1 (output_arch_syminfo *osi, |
16378 | bfd_boolean is_iplt_entry_p, | |
16379 | union gotplt_union *root_plt, | |
16380 | struct arm_plt_info *arm_plt) | |
4e617b1e | 16381 | { |
4e617b1e | 16382 | struct elf32_arm_link_hash_table *htab; |
34e77a92 | 16383 | bfd_vma addr, plt_header_size; |
4e617b1e | 16384 | |
34e77a92 | 16385 | if (root_plt->offset == (bfd_vma) -1) |
4e617b1e PB |
16386 | return TRUE; |
16387 | ||
4dfe6ac6 NC |
16388 | htab = elf32_arm_hash_table (osi->info); |
16389 | if (htab == NULL) | |
16390 | return FALSE; | |
16391 | ||
34e77a92 RS |
16392 | if (is_iplt_entry_p) |
16393 | { | |
16394 | osi->sec = htab->root.iplt; | |
16395 | plt_header_size = 0; | |
16396 | } | |
16397 | else | |
16398 | { | |
16399 | osi->sec = htab->root.splt; | |
16400 | plt_header_size = htab->plt_header_size; | |
16401 | } | |
16402 | osi->sec_shndx = (_bfd_elf_section_from_bfd_section | |
16403 | (osi->info->output_bfd, osi->sec->output_section)); | |
16404 | ||
16405 | addr = root_plt->offset & -2; | |
4e617b1e PB |
16406 | if (htab->symbian_p) |
16407 | { | |
7413f23f | 16408 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 16409 | return FALSE; |
7413f23f | 16410 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
4e617b1e PB |
16411 | return FALSE; |
16412 | } | |
16413 | else if (htab->vxworks_p) | |
16414 | { | |
7413f23f | 16415 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 16416 | return FALSE; |
7413f23f | 16417 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
4e617b1e | 16418 | return FALSE; |
7413f23f | 16419 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
4e617b1e | 16420 | return FALSE; |
7413f23f | 16421 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
4e617b1e PB |
16422 | return FALSE; |
16423 | } | |
b38cadfb NC |
16424 | else if (htab->nacl_p) |
16425 | { | |
16426 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) | |
16427 | return FALSE; | |
16428 | } | |
eed94f8f NC |
16429 | else if (using_thumb_only (htab)) |
16430 | { | |
16431 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr)) | |
16432 | return FALSE; | |
6a631e86 | 16433 | } |
4e617b1e PB |
16434 | else |
16435 | { | |
34e77a92 | 16436 | bfd_boolean thumb_stub_p; |
bd97cb95 | 16437 | |
34e77a92 RS |
16438 | thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt); |
16439 | if (thumb_stub_p) | |
4e617b1e | 16440 | { |
7413f23f | 16441 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
4e617b1e PB |
16442 | return FALSE; |
16443 | } | |
16444 | #ifdef FOUR_WORD_PLT | |
7413f23f | 16445 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 16446 | return FALSE; |
7413f23f | 16447 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
4e617b1e PB |
16448 | return FALSE; |
16449 | #else | |
906e58ca | 16450 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
16451 | so only need to output a mapping symbol for the first PLT entry and |
16452 | entries with thumb thunks. */ | |
34e77a92 | 16453 | if (thumb_stub_p || addr == plt_header_size) |
4e617b1e | 16454 | { |
7413f23f | 16455 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e PB |
16456 | return FALSE; |
16457 | } | |
16458 | #endif | |
16459 | } | |
16460 | ||
16461 | return TRUE; | |
16462 | } | |
16463 | ||
34e77a92 RS |
16464 | /* Output mapping symbols for PLT entries associated with H. */ |
16465 | ||
16466 | static bfd_boolean | |
16467 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) | |
16468 | { | |
16469 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
16470 | struct elf32_arm_link_hash_entry *eh; | |
16471 | ||
16472 | if (h->root.type == bfd_link_hash_indirect) | |
16473 | return TRUE; | |
16474 | ||
16475 | if (h->root.type == bfd_link_hash_warning) | |
16476 | /* When warning symbols are created, they **replace** the "real" | |
16477 | entry in the hash table, thus we never get to see the real | |
16478 | symbol in a hash traversal. So look at it now. */ | |
16479 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
16480 | ||
16481 | eh = (struct elf32_arm_link_hash_entry *) h; | |
16482 | return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h), | |
16483 | &h->plt, &eh->plt); | |
16484 | } | |
16485 | ||
4f4faa4d TP |
16486 | /* Bind a veneered symbol to its veneer identified by its hash entry |
16487 | STUB_ENTRY. The veneered location thus loose its symbol. */ | |
16488 | ||
16489 | static void | |
16490 | arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry) | |
16491 | { | |
16492 | struct elf32_arm_link_hash_entry *hash = stub_entry->h; | |
16493 | ||
16494 | BFD_ASSERT (hash); | |
16495 | hash->root.root.u.def.section = stub_entry->stub_sec; | |
16496 | hash->root.root.u.def.value = stub_entry->stub_offset; | |
16497 | hash->root.size = stub_entry->stub_size; | |
16498 | } | |
16499 | ||
7413f23f DJ |
16500 | /* Output a single local symbol for a generated stub. */ |
16501 | ||
16502 | static bfd_boolean | |
16503 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, | |
16504 | bfd_vma offset, bfd_vma size) | |
16505 | { | |
7413f23f DJ |
16506 | Elf_Internal_Sym sym; |
16507 | ||
7413f23f DJ |
16508 | sym.st_value = osi->sec->output_section->vma |
16509 | + osi->sec->output_offset | |
16510 | + offset; | |
16511 | sym.st_size = size; | |
16512 | sym.st_other = 0; | |
16513 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
16514 | sym.st_shndx = osi->sec_shndx; | |
35fc36a8 | 16515 | sym.st_target_internal = 0; |
57402f1e | 16516 | return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 16517 | } |
4e617b1e | 16518 | |
da5938a2 | 16519 | static bfd_boolean |
8029a119 NC |
16520 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
16521 | void * in_arg) | |
da5938a2 NC |
16522 | { |
16523 | struct elf32_arm_stub_hash_entry *stub_entry; | |
da5938a2 NC |
16524 | asection *stub_sec; |
16525 | bfd_vma addr; | |
7413f23f | 16526 | char *stub_name; |
9a008db3 | 16527 | output_arch_syminfo *osi; |
d3ce72d0 | 16528 | const insn_sequence *template_sequence; |
461a49ca DJ |
16529 | enum stub_insn_type prev_type; |
16530 | int size; | |
16531 | int i; | |
16532 | enum map_symbol_type sym_type; | |
da5938a2 NC |
16533 | |
16534 | /* Massage our args to the form they really have. */ | |
16535 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 16536 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 16537 | |
da5938a2 NC |
16538 | stub_sec = stub_entry->stub_sec; |
16539 | ||
16540 | /* Ensure this stub is attached to the current section being | |
7413f23f | 16541 | processed. */ |
da5938a2 NC |
16542 | if (stub_sec != osi->sec) |
16543 | return TRUE; | |
16544 | ||
7413f23f | 16545 | addr = (bfd_vma) stub_entry->stub_offset; |
d3ce72d0 | 16546 | template_sequence = stub_entry->stub_template; |
4f4faa4d TP |
16547 | |
16548 | if (arm_stub_sym_claimed (stub_entry->stub_type)) | |
16549 | arm_stub_claim_sym (stub_entry); | |
16550 | else | |
7413f23f | 16551 | { |
4f4faa4d TP |
16552 | stub_name = stub_entry->output_name; |
16553 | switch (template_sequence[0].type) | |
16554 | { | |
16555 | case ARM_TYPE: | |
16556 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, | |
16557 | stub_entry->stub_size)) | |
16558 | return FALSE; | |
16559 | break; | |
16560 | case THUMB16_TYPE: | |
16561 | case THUMB32_TYPE: | |
16562 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, | |
16563 | stub_entry->stub_size)) | |
16564 | return FALSE; | |
16565 | break; | |
16566 | default: | |
16567 | BFD_FAIL (); | |
16568 | return 0; | |
16569 | } | |
7413f23f | 16570 | } |
da5938a2 | 16571 | |
461a49ca DJ |
16572 | prev_type = DATA_TYPE; |
16573 | size = 0; | |
16574 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
16575 | { | |
d3ce72d0 | 16576 | switch (template_sequence[i].type) |
461a49ca DJ |
16577 | { |
16578 | case ARM_TYPE: | |
16579 | sym_type = ARM_MAP_ARM; | |
16580 | break; | |
16581 | ||
16582 | case THUMB16_TYPE: | |
48229727 | 16583 | case THUMB32_TYPE: |
461a49ca DJ |
16584 | sym_type = ARM_MAP_THUMB; |
16585 | break; | |
16586 | ||
16587 | case DATA_TYPE: | |
16588 | sym_type = ARM_MAP_DATA; | |
16589 | break; | |
16590 | ||
16591 | default: | |
16592 | BFD_FAIL (); | |
4e31c731 | 16593 | return FALSE; |
461a49ca DJ |
16594 | } |
16595 | ||
d3ce72d0 | 16596 | if (template_sequence[i].type != prev_type) |
461a49ca | 16597 | { |
d3ce72d0 | 16598 | prev_type = template_sequence[i].type; |
461a49ca DJ |
16599 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
16600 | return FALSE; | |
16601 | } | |
16602 | ||
d3ce72d0 | 16603 | switch (template_sequence[i].type) |
461a49ca DJ |
16604 | { |
16605 | case ARM_TYPE: | |
48229727 | 16606 | case THUMB32_TYPE: |
461a49ca DJ |
16607 | size += 4; |
16608 | break; | |
16609 | ||
16610 | case THUMB16_TYPE: | |
16611 | size += 2; | |
16612 | break; | |
16613 | ||
16614 | case DATA_TYPE: | |
16615 | size += 4; | |
16616 | break; | |
16617 | ||
16618 | default: | |
16619 | BFD_FAIL (); | |
4e31c731 | 16620 | return FALSE; |
461a49ca DJ |
16621 | } |
16622 | } | |
16623 | ||
da5938a2 NC |
16624 | return TRUE; |
16625 | } | |
16626 | ||
33811162 DG |
16627 | /* Output mapping symbols for linker generated sections, |
16628 | and for those data-only sections that do not have a | |
16629 | $d. */ | |
4e617b1e PB |
16630 | |
16631 | static bfd_boolean | |
16632 | elf32_arm_output_arch_local_syms (bfd *output_bfd, | |
906e58ca | 16633 | struct bfd_link_info *info, |
57402f1e | 16634 | void *flaginfo, |
6e0b88f1 AM |
16635 | int (*func) (void *, const char *, |
16636 | Elf_Internal_Sym *, | |
16637 | asection *, | |
16638 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
16639 | { |
16640 | output_arch_syminfo osi; | |
16641 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
16642 | bfd_vma offset; |
16643 | bfd_size_type size; | |
33811162 | 16644 | bfd *input_bfd; |
4e617b1e PB |
16645 | |
16646 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
16647 | if (htab == NULL) |
16648 | return FALSE; | |
16649 | ||
906e58ca | 16650 | check_use_blx (htab); |
91a5743d | 16651 | |
57402f1e | 16652 | osi.flaginfo = flaginfo; |
4e617b1e PB |
16653 | osi.info = info; |
16654 | osi.func = func; | |
906e58ca | 16655 | |
33811162 DG |
16656 | /* Add a $d mapping symbol to data-only sections that |
16657 | don't have any mapping symbol. This may result in (harmless) redundant | |
16658 | mapping symbols. */ | |
16659 | for (input_bfd = info->input_bfds; | |
16660 | input_bfd != NULL; | |
c72f2fb2 | 16661 | input_bfd = input_bfd->link.next) |
33811162 DG |
16662 | { |
16663 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
16664 | for (osi.sec = input_bfd->sections; | |
16665 | osi.sec != NULL; | |
16666 | osi.sec = osi.sec->next) | |
16667 | { | |
16668 | if (osi.sec->output_section != NULL | |
f7dd8c79 DJ |
16669 | && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) |
16670 | != 0) | |
33811162 DG |
16671 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) |
16672 | == SEC_HAS_CONTENTS | |
16673 | && get_arm_elf_section_data (osi.sec) != NULL | |
501abfe0 | 16674 | && get_arm_elf_section_data (osi.sec)->mapcount == 0 |
7d500b83 CL |
16675 | && osi.sec->size > 0 |
16676 | && (osi.sec->flags & SEC_EXCLUDE) == 0) | |
33811162 DG |
16677 | { |
16678 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16679 | (output_bfd, osi.sec->output_section); | |
16680 | if (osi.sec_shndx != (int)SHN_BAD) | |
16681 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
16682 | } | |
16683 | } | |
16684 | } | |
16685 | ||
91a5743d PB |
16686 | /* ARM->Thumb glue. */ |
16687 | if (htab->arm_glue_size > 0) | |
16688 | { | |
3d4d4302 AM |
16689 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
16690 | ARM2THUMB_GLUE_SECTION_NAME); | |
91a5743d PB |
16691 | |
16692 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16693 | (output_bfd, osi.sec->output_section); | |
0e1862bb | 16694 | if (bfd_link_pic (info) || htab->root.is_relocatable_executable |
91a5743d PB |
16695 | || htab->pic_veneer) |
16696 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
16697 | else if (htab->use_blx) | |
16698 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
16699 | else | |
16700 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 16701 | |
91a5743d PB |
16702 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
16703 | { | |
7413f23f DJ |
16704 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
16705 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
16706 | } |
16707 | } | |
16708 | ||
16709 | /* Thumb->ARM glue. */ | |
16710 | if (htab->thumb_glue_size > 0) | |
16711 | { | |
3d4d4302 AM |
16712 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
16713 | THUMB2ARM_GLUE_SECTION_NAME); | |
91a5743d PB |
16714 | |
16715 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16716 | (output_bfd, osi.sec->output_section); | |
16717 | size = THUMB2ARM_GLUE_SIZE; | |
16718 | ||
16719 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
16720 | { | |
7413f23f DJ |
16721 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
16722 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
16723 | } |
16724 | } | |
16725 | ||
845b51d6 PB |
16726 | /* ARMv4 BX veneers. */ |
16727 | if (htab->bx_glue_size > 0) | |
16728 | { | |
3d4d4302 AM |
16729 | osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner, |
16730 | ARM_BX_GLUE_SECTION_NAME); | |
845b51d6 PB |
16731 | |
16732 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
16733 | (output_bfd, osi.sec->output_section); | |
16734 | ||
7413f23f | 16735 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
16736 | } |
16737 | ||
8029a119 NC |
16738 | /* Long calls stubs. */ |
16739 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
16740 | { | |
da5938a2 | 16741 | asection* stub_sec; |
8029a119 | 16742 | |
da5938a2 NC |
16743 | for (stub_sec = htab->stub_bfd->sections; |
16744 | stub_sec != NULL; | |
8029a119 NC |
16745 | stub_sec = stub_sec->next) |
16746 | { | |
16747 | /* Ignore non-stub sections. */ | |
16748 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
16749 | continue; | |
da5938a2 | 16750 | |
8029a119 | 16751 | osi.sec = stub_sec; |
da5938a2 | 16752 | |
8029a119 NC |
16753 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
16754 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 16755 | |
8029a119 NC |
16756 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
16757 | } | |
16758 | } | |
da5938a2 | 16759 | |
91a5743d | 16760 | /* Finally, output mapping symbols for the PLT. */ |
34e77a92 | 16761 | if (htab->root.splt && htab->root.splt->size > 0) |
4e617b1e | 16762 | { |
34e77a92 RS |
16763 | osi.sec = htab->root.splt; |
16764 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
16765 | (output_bfd, osi.sec->output_section)); | |
16766 | ||
16767 | /* Output mapping symbols for the plt header. SymbianOS does not have a | |
16768 | plt header. */ | |
16769 | if (htab->vxworks_p) | |
16770 | { | |
16771 | /* VxWorks shared libraries have no PLT header. */ | |
0e1862bb | 16772 | if (!bfd_link_pic (info)) |
34e77a92 RS |
16773 | { |
16774 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
16775 | return FALSE; | |
16776 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
16777 | return FALSE; | |
16778 | } | |
16779 | } | |
b38cadfb NC |
16780 | else if (htab->nacl_p) |
16781 | { | |
16782 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
16783 | return FALSE; | |
16784 | } | |
eed94f8f NC |
16785 | else if (using_thumb_only (htab)) |
16786 | { | |
16787 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0)) | |
16788 | return FALSE; | |
16789 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) | |
16790 | return FALSE; | |
16791 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16)) | |
16792 | return FALSE; | |
16793 | } | |
34e77a92 | 16794 | else if (!htab->symbian_p) |
4e617b1e | 16795 | { |
7413f23f | 16796 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e | 16797 | return FALSE; |
34e77a92 RS |
16798 | #ifndef FOUR_WORD_PLT |
16799 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) | |
4e617b1e | 16800 | return FALSE; |
34e77a92 | 16801 | #endif |
4e617b1e PB |
16802 | } |
16803 | } | |
99059e56 RM |
16804 | if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0) |
16805 | { | |
16806 | /* NaCl uses a special first entry in .iplt too. */ | |
16807 | osi.sec = htab->root.iplt; | |
16808 | osi.sec_shndx = (_bfd_elf_section_from_bfd_section | |
16809 | (output_bfd, osi.sec->output_section)); | |
16810 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) | |
16811 | return FALSE; | |
16812 | } | |
34e77a92 RS |
16813 | if ((htab->root.splt && htab->root.splt->size > 0) |
16814 | || (htab->root.iplt && htab->root.iplt->size > 0)) | |
4e617b1e | 16815 | { |
34e77a92 RS |
16816 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi); |
16817 | for (input_bfd = info->input_bfds; | |
16818 | input_bfd != NULL; | |
c72f2fb2 | 16819 | input_bfd = input_bfd->link.next) |
34e77a92 RS |
16820 | { |
16821 | struct arm_local_iplt_info **local_iplt; | |
16822 | unsigned int i, num_syms; | |
4e617b1e | 16823 | |
34e77a92 RS |
16824 | local_iplt = elf32_arm_local_iplt (input_bfd); |
16825 | if (local_iplt != NULL) | |
16826 | { | |
16827 | num_syms = elf_symtab_hdr (input_bfd).sh_info; | |
16828 | for (i = 0; i < num_syms; i++) | |
16829 | if (local_iplt[i] != NULL | |
16830 | && !elf32_arm_output_plt_map_1 (&osi, TRUE, | |
16831 | &local_iplt[i]->root, | |
16832 | &local_iplt[i]->arm)) | |
16833 | return FALSE; | |
16834 | } | |
16835 | } | |
16836 | } | |
0855e32b NS |
16837 | if (htab->dt_tlsdesc_plt != 0) |
16838 | { | |
16839 | /* Mapping symbols for the lazy tls trampoline. */ | |
16840 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt)) | |
16841 | return FALSE; | |
b38cadfb | 16842 | |
0855e32b NS |
16843 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, |
16844 | htab->dt_tlsdesc_plt + 24)) | |
16845 | return FALSE; | |
16846 | } | |
16847 | if (htab->tls_trampoline != 0) | |
16848 | { | |
16849 | /* Mapping symbols for the tls trampoline. */ | |
16850 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline)) | |
16851 | return FALSE; | |
16852 | #ifdef FOUR_WORD_PLT | |
16853 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, | |
16854 | htab->tls_trampoline + 12)) | |
16855 | return FALSE; | |
b38cadfb | 16856 | #endif |
0855e32b | 16857 | } |
b38cadfb | 16858 | |
4e617b1e PB |
16859 | return TRUE; |
16860 | } | |
16861 | ||
54ddd295 TP |
16862 | /* Filter normal symbols of CMSE entry functions of ABFD to include in |
16863 | the import library. All SYMCOUNT symbols of ABFD can be examined | |
16864 | from their pointers in SYMS. Pointers of symbols to keep should be | |
16865 | stored continuously at the beginning of that array. | |
16866 | ||
16867 | Returns the number of symbols to keep. */ | |
16868 | ||
16869 | static unsigned int | |
16870 | elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED, | |
16871 | struct bfd_link_info *info, | |
16872 | asymbol **syms, long symcount) | |
16873 | { | |
16874 | size_t maxnamelen; | |
16875 | char *cmse_name; | |
16876 | long src_count, dst_count = 0; | |
16877 | struct elf32_arm_link_hash_table *htab; | |
16878 | ||
16879 | htab = elf32_arm_hash_table (info); | |
16880 | if (!htab->stub_bfd || !htab->stub_bfd->sections) | |
16881 | symcount = 0; | |
16882 | ||
16883 | maxnamelen = 128; | |
16884 | cmse_name = (char *) bfd_malloc (maxnamelen); | |
16885 | for (src_count = 0; src_count < symcount; src_count++) | |
16886 | { | |
16887 | struct elf32_arm_link_hash_entry *cmse_hash; | |
16888 | asymbol *sym; | |
16889 | flagword flags; | |
16890 | char *name; | |
16891 | size_t namelen; | |
16892 | ||
16893 | sym = syms[src_count]; | |
16894 | flags = sym->flags; | |
16895 | name = (char *) bfd_asymbol_name (sym); | |
16896 | ||
16897 | if ((flags & BSF_FUNCTION) != BSF_FUNCTION) | |
16898 | continue; | |
16899 | if (!(flags & (BSF_GLOBAL | BSF_WEAK))) | |
16900 | continue; | |
16901 | ||
16902 | namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1; | |
16903 | if (namelen > maxnamelen) | |
16904 | { | |
16905 | cmse_name = (char *) | |
16906 | bfd_realloc (cmse_name, namelen); | |
16907 | maxnamelen = namelen; | |
16908 | } | |
16909 | snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name); | |
16910 | cmse_hash = (struct elf32_arm_link_hash_entry *) | |
16911 | elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE); | |
16912 | ||
16913 | if (!cmse_hash | |
16914 | || (cmse_hash->root.root.type != bfd_link_hash_defined | |
16915 | && cmse_hash->root.root.type != bfd_link_hash_defweak) | |
16916 | || cmse_hash->root.type != STT_FUNC) | |
16917 | continue; | |
16918 | ||
16919 | if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal)) | |
16920 | continue; | |
16921 | ||
16922 | syms[dst_count++] = sym; | |
16923 | } | |
16924 | free (cmse_name); | |
16925 | ||
16926 | syms[dst_count] = NULL; | |
16927 | ||
16928 | return dst_count; | |
16929 | } | |
16930 | ||
16931 | /* Filter symbols of ABFD to include in the import library. All | |
16932 | SYMCOUNT symbols of ABFD can be examined from their pointers in | |
16933 | SYMS. Pointers of symbols to keep should be stored continuously at | |
16934 | the beginning of that array. | |
16935 | ||
16936 | Returns the number of symbols to keep. */ | |
16937 | ||
16938 | static unsigned int | |
16939 | elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED, | |
16940 | struct bfd_link_info *info, | |
16941 | asymbol **syms, long symcount) | |
16942 | { | |
16943 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
16944 | ||
16945 | if (globals->cmse_implib) | |
16946 | return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount); | |
16947 | else | |
16948 | return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount); | |
16949 | } | |
16950 | ||
e489d0ae PB |
16951 | /* Allocate target specific section data. */ |
16952 | ||
16953 | static bfd_boolean | |
16954 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) | |
16955 | { | |
f592407e AM |
16956 | if (!sec->used_by_bfd) |
16957 | { | |
16958 | _arm_elf_section_data *sdata; | |
16959 | bfd_size_type amt = sizeof (*sdata); | |
e489d0ae | 16960 | |
21d799b5 | 16961 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e AM |
16962 | if (sdata == NULL) |
16963 | return FALSE; | |
16964 | sec->used_by_bfd = sdata; | |
16965 | } | |
e489d0ae PB |
16966 | |
16967 | return _bfd_elf_new_section_hook (abfd, sec); | |
16968 | } | |
16969 | ||
16970 | ||
16971 | /* Used to order a list of mapping symbols by address. */ | |
16972 | ||
16973 | static int | |
16974 | elf32_arm_compare_mapping (const void * a, const void * b) | |
16975 | { | |
7f6a71ff JM |
16976 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
16977 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
16978 | ||
16979 | if (amap->vma > bmap->vma) | |
16980 | return 1; | |
16981 | else if (amap->vma < bmap->vma) | |
16982 | return -1; | |
16983 | else if (amap->type > bmap->type) | |
16984 | /* Ensure results do not depend on the host qsort for objects with | |
16985 | multiple mapping symbols at the same address by sorting on type | |
16986 | after vma. */ | |
16987 | return 1; | |
16988 | else if (amap->type < bmap->type) | |
16989 | return -1; | |
16990 | else | |
16991 | return 0; | |
e489d0ae PB |
16992 | } |
16993 | ||
2468f9c9 PB |
16994 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
16995 | ||
16996 | static unsigned long | |
16997 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
16998 | { | |
16999 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
17000 | } | |
17001 | ||
17002 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
17003 | relocations. */ | |
17004 | ||
17005 | static void | |
17006 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
17007 | { | |
17008 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
17009 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
b38cadfb | 17010 | |
2468f9c9 PB |
17011 | /* High bit of first word is supposed to be zero. */ |
17012 | if ((first_word & 0x80000000ul) == 0) | |
17013 | first_word = offset_prel31 (first_word, offset); | |
b38cadfb | 17014 | |
2468f9c9 PB |
17015 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 |
17016 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
17017 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
17018 | second_word = offset_prel31 (second_word, offset); | |
b38cadfb | 17019 | |
2468f9c9 PB |
17020 | bfd_put_32 (output_bfd, first_word, to); |
17021 | bfd_put_32 (output_bfd, second_word, to + 4); | |
17022 | } | |
e489d0ae | 17023 | |
48229727 JB |
17024 | /* Data for make_branch_to_a8_stub(). */ |
17025 | ||
b38cadfb NC |
17026 | struct a8_branch_to_stub_data |
17027 | { | |
48229727 JB |
17028 | asection *writing_section; |
17029 | bfd_byte *contents; | |
17030 | }; | |
17031 | ||
17032 | ||
17033 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
17034 | places for a particular section. */ | |
17035 | ||
17036 | static bfd_boolean | |
17037 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, | |
99059e56 | 17038 | void *in_arg) |
48229727 JB |
17039 | { |
17040 | struct elf32_arm_stub_hash_entry *stub_entry; | |
17041 | struct a8_branch_to_stub_data *data; | |
17042 | bfd_byte *contents; | |
17043 | unsigned long branch_insn; | |
17044 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
17045 | bfd_signed_vma branch_offset; | |
17046 | bfd *abfd; | |
8d9d9490 | 17047 | unsigned int loc; |
48229727 JB |
17048 | |
17049 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
17050 | data = (struct a8_branch_to_stub_data *) in_arg; | |
17051 | ||
17052 | if (stub_entry->target_section != data->writing_section | |
4563a860 | 17053 | || stub_entry->stub_type < arm_stub_a8_veneer_lwm) |
48229727 JB |
17054 | return TRUE; |
17055 | ||
17056 | contents = data->contents; | |
17057 | ||
8d9d9490 TP |
17058 | /* We use target_section as Cortex-A8 erratum workaround stubs are only |
17059 | generated when both source and target are in the same section. */ | |
48229727 JB |
17060 | veneered_insn_loc = stub_entry->target_section->output_section->vma |
17061 | + stub_entry->target_section->output_offset | |
8d9d9490 | 17062 | + stub_entry->source_value; |
48229727 JB |
17063 | |
17064 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
17065 | + stub_entry->stub_sec->output_offset | |
17066 | + stub_entry->stub_offset; | |
17067 | ||
17068 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
17069 | veneered_insn_loc &= ~3u; | |
17070 | ||
17071 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
17072 | ||
17073 | abfd = stub_entry->target_section->owner; | |
8d9d9490 | 17074 | loc = stub_entry->source_value; |
48229727 JB |
17075 | |
17076 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
17077 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
17078 | This check is just to be on the safe side... */ | |
17079 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
17080 | { | |
17081 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is " | |
17082 | "allocated in unsafe location"), abfd); | |
17083 | return FALSE; | |
17084 | } | |
17085 | ||
17086 | switch (stub_entry->stub_type) | |
17087 | { | |
17088 | case arm_stub_a8_veneer_b: | |
17089 | case arm_stub_a8_veneer_b_cond: | |
17090 | branch_insn = 0xf0009000; | |
17091 | goto jump24; | |
17092 | ||
17093 | case arm_stub_a8_veneer_blx: | |
17094 | branch_insn = 0xf000e800; | |
17095 | goto jump24; | |
17096 | ||
17097 | case arm_stub_a8_veneer_bl: | |
17098 | { | |
17099 | unsigned int i1, j1, i2, j2, s; | |
17100 | ||
17101 | branch_insn = 0xf000d000; | |
17102 | ||
17103 | jump24: | |
17104 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
17105 | { | |
17106 | /* There's not much we can do apart from complain if this | |
17107 | happens. */ | |
17108 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out " | |
17109 | "of range (input file too large)"), abfd); | |
17110 | return FALSE; | |
17111 | } | |
17112 | ||
17113 | /* i1 = not(j1 eor s), so: | |
17114 | not i1 = j1 eor s | |
17115 | j1 = (not i1) eor s. */ | |
17116 | ||
17117 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
17118 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
17119 | i2 = (branch_offset >> 22) & 1; | |
17120 | i1 = (branch_offset >> 23) & 1; | |
17121 | s = (branch_offset >> 24) & 1; | |
17122 | j1 = (!i1) ^ s; | |
17123 | j2 = (!i2) ^ s; | |
17124 | branch_insn |= j2 << 11; | |
17125 | branch_insn |= j1 << 13; | |
17126 | branch_insn |= s << 26; | |
17127 | } | |
17128 | break; | |
17129 | ||
17130 | default: | |
17131 | BFD_FAIL (); | |
17132 | return FALSE; | |
17133 | } | |
17134 | ||
8d9d9490 TP |
17135 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]); |
17136 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]); | |
48229727 JB |
17137 | |
17138 | return TRUE; | |
17139 | } | |
17140 | ||
a504d23a LA |
17141 | /* Beginning of stm32l4xx work-around. */ |
17142 | ||
17143 | /* Functions encoding instructions necessary for the emission of the | |
17144 | fix-stm32l4xx-629360. | |
17145 | Encoding is extracted from the | |
17146 | ARM (C) Architecture Reference Manual | |
17147 | ARMv7-A and ARMv7-R edition | |
17148 | ARM DDI 0406C.b (ID072512). */ | |
17149 | ||
17150 | static inline bfd_vma | |
82188b29 | 17151 | create_instruction_branch_absolute (int branch_offset) |
a504d23a LA |
17152 | { |
17153 | /* A8.8.18 B (A8-334) | |
17154 | B target_address (Encoding T4). */ | |
17155 | /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */ | |
17156 | /* jump offset is: S:I1:I2:imm10:imm11:0. */ | |
17157 | /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */ | |
17158 | ||
a504d23a LA |
17159 | int s = ((branch_offset & 0x1000000) >> 24); |
17160 | int j1 = s ^ !((branch_offset & 0x800000) >> 23); | |
17161 | int j2 = s ^ !((branch_offset & 0x400000) >> 22); | |
17162 | ||
17163 | if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24)) | |
17164 | BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch."); | |
17165 | ||
17166 | bfd_vma patched_inst = 0xf0009000 | |
17167 | | s << 26 /* S. */ | |
17168 | | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */ | |
17169 | | j1 << 13 /* J1. */ | |
17170 | | j2 << 11 /* J2. */ | |
17171 | | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */ | |
17172 | ||
17173 | return patched_inst; | |
17174 | } | |
17175 | ||
17176 | static inline bfd_vma | |
17177 | create_instruction_ldmia (int base_reg, int wback, int reg_mask) | |
17178 | { | |
17179 | /* A8.8.57 LDM/LDMIA/LDMFD (A8-396) | |
17180 | LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */ | |
17181 | bfd_vma patched_inst = 0xe8900000 | |
17182 | | (/*W=*/wback << 21) | |
17183 | | (base_reg << 16) | |
17184 | | (reg_mask & 0x0000ffff); | |
17185 | ||
17186 | return patched_inst; | |
17187 | } | |
17188 | ||
17189 | static inline bfd_vma | |
17190 | create_instruction_ldmdb (int base_reg, int wback, int reg_mask) | |
17191 | { | |
17192 | /* A8.8.60 LDMDB/LDMEA (A8-402) | |
17193 | LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */ | |
17194 | bfd_vma patched_inst = 0xe9100000 | |
17195 | | (/*W=*/wback << 21) | |
17196 | | (base_reg << 16) | |
17197 | | (reg_mask & 0x0000ffff); | |
17198 | ||
17199 | return patched_inst; | |
17200 | } | |
17201 | ||
17202 | static inline bfd_vma | |
17203 | create_instruction_mov (int target_reg, int source_reg) | |
17204 | { | |
17205 | /* A8.8.103 MOV (register) (A8-486) | |
17206 | MOV Rd, Rm (Encoding T1). */ | |
17207 | bfd_vma patched_inst = 0x4600 | |
17208 | | (target_reg & 0x7) | |
17209 | | ((target_reg & 0x8) >> 3) << 7 | |
17210 | | (source_reg << 3); | |
17211 | ||
17212 | return patched_inst; | |
17213 | } | |
17214 | ||
17215 | static inline bfd_vma | |
17216 | create_instruction_sub (int target_reg, int source_reg, int value) | |
17217 | { | |
17218 | /* A8.8.221 SUB (immediate) (A8-708) | |
17219 | SUB Rd, Rn, #value (Encoding T3). */ | |
17220 | bfd_vma patched_inst = 0xf1a00000 | |
17221 | | (target_reg << 8) | |
17222 | | (source_reg << 16) | |
17223 | | (/*S=*/0 << 20) | |
17224 | | ((value & 0x800) >> 11) << 26 | |
17225 | | ((value & 0x700) >> 8) << 12 | |
17226 | | (value & 0x0ff); | |
17227 | ||
17228 | return patched_inst; | |
17229 | } | |
17230 | ||
17231 | static inline bfd_vma | |
9239bbd3 | 17232 | create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words, |
a504d23a LA |
17233 | int first_reg) |
17234 | { | |
17235 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
17236 | VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */ |
17237 | bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00) | |
a504d23a LA |
17238 | | (/*W=*/wback << 21) |
17239 | | (base_reg << 16) | |
9239bbd3 CM |
17240 | | (num_words & 0x000000ff) |
17241 | | (((unsigned)first_reg >> 1) & 0x0000000f) << 12 | |
a504d23a LA |
17242 | | (first_reg & 0x00000001) << 22; |
17243 | ||
17244 | return patched_inst; | |
17245 | } | |
17246 | ||
17247 | static inline bfd_vma | |
9239bbd3 CM |
17248 | create_instruction_vldmdb (int base_reg, int is_dp, int num_words, |
17249 | int first_reg) | |
a504d23a LA |
17250 | { |
17251 | /* A8.8.332 VLDM (A8-922) | |
9239bbd3 CM |
17252 | VLMD{MODE} Rn!, {} (Encoding T1 or T2). */ |
17253 | bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00) | |
a504d23a | 17254 | | (base_reg << 16) |
9239bbd3 CM |
17255 | | (num_words & 0x000000ff) |
17256 | | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12 | |
a504d23a LA |
17257 | | (first_reg & 0x00000001) << 22; |
17258 | ||
17259 | return patched_inst; | |
17260 | } | |
17261 | ||
17262 | static inline bfd_vma | |
17263 | create_instruction_udf_w (int value) | |
17264 | { | |
17265 | /* A8.8.247 UDF (A8-758) | |
17266 | Undefined (Encoding T2). */ | |
17267 | bfd_vma patched_inst = 0xf7f0a000 | |
17268 | | (value & 0x00000fff) | |
17269 | | (value & 0x000f0000) << 16; | |
17270 | ||
17271 | return patched_inst; | |
17272 | } | |
17273 | ||
17274 | static inline bfd_vma | |
17275 | create_instruction_udf (int value) | |
17276 | { | |
17277 | /* A8.8.247 UDF (A8-758) | |
17278 | Undefined (Encoding T1). */ | |
17279 | bfd_vma patched_inst = 0xde00 | |
17280 | | (value & 0xff); | |
17281 | ||
17282 | return patched_inst; | |
17283 | } | |
17284 | ||
17285 | /* Functions writing an instruction in memory, returning the next | |
17286 | memory position to write to. */ | |
17287 | ||
17288 | static inline bfd_byte * | |
17289 | push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab, | |
17290 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
17291 | { | |
17292 | put_thumb2_insn (htab, output_bfd, insn, pt); | |
17293 | return pt + 4; | |
17294 | } | |
17295 | ||
17296 | static inline bfd_byte * | |
17297 | push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab, | |
17298 | bfd * output_bfd, bfd_byte *pt, insn32 insn) | |
17299 | { | |
17300 | put_thumb_insn (htab, output_bfd, insn, pt); | |
17301 | return pt + 2; | |
17302 | } | |
17303 | ||
17304 | /* Function filling up a region in memory with T1 and T2 UDFs taking | |
17305 | care of alignment. */ | |
17306 | ||
17307 | static bfd_byte * | |
17308 | stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab, | |
17309 | bfd * output_bfd, | |
17310 | const bfd_byte * const base_stub_contents, | |
17311 | bfd_byte * const from_stub_contents, | |
17312 | const bfd_byte * const end_stub_contents) | |
17313 | { | |
17314 | bfd_byte *current_stub_contents = from_stub_contents; | |
17315 | ||
17316 | /* Fill the remaining of the stub with deterministic contents : UDF | |
17317 | instructions. | |
17318 | Check if realignment is needed on modulo 4 frontier using T1, to | |
17319 | further use T2. */ | |
17320 | if ((current_stub_contents < end_stub_contents) | |
17321 | && !((current_stub_contents - base_stub_contents) % 2) | |
17322 | && ((current_stub_contents - base_stub_contents) % 4)) | |
17323 | current_stub_contents = | |
17324 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17325 | create_instruction_udf (0)); | |
17326 | ||
17327 | for (; current_stub_contents < end_stub_contents;) | |
17328 | current_stub_contents = | |
17329 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17330 | create_instruction_udf_w (0)); | |
17331 | ||
17332 | return current_stub_contents; | |
17333 | } | |
17334 | ||
17335 | /* Functions writing the stream of instructions equivalent to the | |
17336 | derived sequence for ldmia, ldmdb, vldm respectively. */ | |
17337 | ||
17338 | static void | |
17339 | stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab, | |
17340 | bfd * output_bfd, | |
17341 | const insn32 initial_insn, | |
17342 | const bfd_byte *const initial_insn_addr, | |
17343 | bfd_byte *const base_stub_contents) | |
17344 | { | |
17345 | int wback = (initial_insn & 0x00200000) >> 21; | |
17346 | int ri, rn = (initial_insn & 0x000F0000) >> 16; | |
17347 | int insn_all_registers = initial_insn & 0x0000ffff; | |
17348 | int insn_low_registers, insn_high_registers; | |
17349 | int usable_register_mask; | |
17350 | int nb_registers = popcount (insn_all_registers); | |
17351 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; | |
17352 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
17353 | bfd_byte *current_stub_contents = base_stub_contents; | |
17354 | ||
17355 | BFD_ASSERT (is_thumb2_ldmia (initial_insn)); | |
17356 | ||
17357 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
17358 | smaller than 8 registers load sequences that do not cause the | |
17359 | hardware issue. */ | |
17360 | if (nb_registers <= 8) | |
17361 | { | |
17362 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
17363 | current_stub_contents = | |
17364 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17365 | initial_insn); | |
17366 | ||
17367 | /* B initial_insn_addr+4. */ | |
17368 | if (!restore_pc) | |
17369 | current_stub_contents = | |
17370 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17371 | create_instruction_branch_absolute | |
82188b29 NC |
17372 | (initial_insn_addr - current_stub_contents)); |
17373 | ||
a504d23a LA |
17374 | |
17375 | /* Fill the remaining of the stub with deterministic contents. */ | |
17376 | current_stub_contents = | |
17377 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17378 | base_stub_contents, current_stub_contents, | |
17379 | base_stub_contents + | |
17380 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
17381 | ||
17382 | return; | |
17383 | } | |
17384 | ||
17385 | /* - reg_list[13] == 0. */ | |
17386 | BFD_ASSERT ((insn_all_registers & (1 << 13))==0); | |
17387 | ||
17388 | /* - reg_list[14] & reg_list[15] != 1. */ | |
17389 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
17390 | ||
17391 | /* - if (wback==1) reg_list[rn] == 0. */ | |
17392 | BFD_ASSERT (!wback || !restore_rn); | |
17393 | ||
17394 | /* - nb_registers > 8. */ | |
17395 | BFD_ASSERT (popcount (insn_all_registers) > 8); | |
17396 | ||
17397 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
17398 | ||
17399 | /* In the following algorithm, we split this wide LDM using 2 LDM insns: | |
17400 | - One with the 7 lowest registers (register mask 0x007F) | |
17401 | This LDM will finally contain between 2 and 7 registers | |
17402 | - One with the 7 highest registers (register mask 0xDF80) | |
17403 | This ldm will finally contain between 2 and 7 registers. */ | |
17404 | insn_low_registers = insn_all_registers & 0x007F; | |
17405 | insn_high_registers = insn_all_registers & 0xDF80; | |
17406 | ||
17407 | /* A spare register may be needed during this veneer to temporarily | |
17408 | handle the base register. This register will be restored with the | |
17409 | last LDM operation. | |
17410 | The usable register may be any general purpose register (that | |
17411 | excludes PC, SP, LR : register mask is 0x1FFF). */ | |
17412 | usable_register_mask = 0x1FFF; | |
17413 | ||
17414 | /* Generate the stub function. */ | |
17415 | if (wback) | |
17416 | { | |
17417 | /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */ | |
17418 | current_stub_contents = | |
17419 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17420 | create_instruction_ldmia | |
17421 | (rn, /*wback=*/1, insn_low_registers)); | |
17422 | ||
17423 | /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */ | |
17424 | current_stub_contents = | |
17425 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17426 | create_instruction_ldmia | |
17427 | (rn, /*wback=*/1, insn_high_registers)); | |
17428 | if (!restore_pc) | |
17429 | { | |
17430 | /* B initial_insn_addr+4. */ | |
17431 | current_stub_contents = | |
17432 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17433 | create_instruction_branch_absolute | |
82188b29 | 17434 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17435 | } |
17436 | } | |
17437 | else /* if (!wback). */ | |
17438 | { | |
17439 | ri = rn; | |
17440 | ||
17441 | /* If Rn is not part of the high-register-list, move it there. */ | |
17442 | if (!(insn_high_registers & (1 << rn))) | |
17443 | { | |
17444 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17445 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17446 | ||
17447 | /* MOV Ri, Rn. */ | |
17448 | current_stub_contents = | |
17449 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17450 | create_instruction_mov (ri, rn)); | |
17451 | } | |
17452 | ||
17453 | /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */ | |
17454 | current_stub_contents = | |
17455 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17456 | create_instruction_ldmia | |
17457 | (ri, /*wback=*/1, insn_low_registers)); | |
17458 | ||
17459 | /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */ | |
17460 | current_stub_contents = | |
17461 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17462 | create_instruction_ldmia | |
17463 | (ri, /*wback=*/0, insn_high_registers)); | |
17464 | ||
17465 | if (!restore_pc) | |
17466 | { | |
17467 | /* B initial_insn_addr+4. */ | |
17468 | current_stub_contents = | |
17469 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17470 | create_instruction_branch_absolute | |
82188b29 | 17471 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17472 | } |
17473 | } | |
17474 | ||
17475 | /* Fill the remaining of the stub with deterministic contents. */ | |
17476 | current_stub_contents = | |
17477 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17478 | base_stub_contents, current_stub_contents, | |
17479 | base_stub_contents + | |
17480 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
17481 | } | |
17482 | ||
17483 | static void | |
17484 | stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab, | |
17485 | bfd * output_bfd, | |
17486 | const insn32 initial_insn, | |
17487 | const bfd_byte *const initial_insn_addr, | |
17488 | bfd_byte *const base_stub_contents) | |
17489 | { | |
17490 | int wback = (initial_insn & 0x00200000) >> 21; | |
17491 | int ri, rn = (initial_insn & 0x000f0000) >> 16; | |
17492 | int insn_all_registers = initial_insn & 0x0000ffff; | |
17493 | int insn_low_registers, insn_high_registers; | |
17494 | int usable_register_mask; | |
17495 | int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0; | |
17496 | int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0; | |
17497 | int nb_registers = popcount (insn_all_registers); | |
17498 | bfd_byte *current_stub_contents = base_stub_contents; | |
17499 | ||
17500 | BFD_ASSERT (is_thumb2_ldmdb (initial_insn)); | |
17501 | ||
17502 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
17503 | smaller than 8 registers load sequences that do not cause the | |
17504 | hardware issue. */ | |
17505 | if (nb_registers <= 8) | |
17506 | { | |
17507 | /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */ | |
17508 | current_stub_contents = | |
17509 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17510 | initial_insn); | |
17511 | ||
17512 | /* B initial_insn_addr+4. */ | |
17513 | current_stub_contents = | |
17514 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17515 | create_instruction_branch_absolute | |
82188b29 | 17516 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17517 | |
17518 | /* Fill the remaining of the stub with deterministic contents. */ | |
17519 | current_stub_contents = | |
17520 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17521 | base_stub_contents, current_stub_contents, | |
17522 | base_stub_contents + | |
17523 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
17524 | ||
17525 | return; | |
17526 | } | |
17527 | ||
17528 | /* - reg_list[13] == 0. */ | |
17529 | BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0); | |
17530 | ||
17531 | /* - reg_list[14] & reg_list[15] != 1. */ | |
17532 | BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000); | |
17533 | ||
17534 | /* - if (wback==1) reg_list[rn] == 0. */ | |
17535 | BFD_ASSERT (!wback || !restore_rn); | |
17536 | ||
17537 | /* - nb_registers > 8. */ | |
17538 | BFD_ASSERT (popcount (insn_all_registers) > 8); | |
17539 | ||
17540 | /* At this point, LDMxx initial insn loads between 9 and 14 registers. */ | |
17541 | ||
17542 | /* In the following algorithm, we split this wide LDM using 2 LDM insn: | |
17543 | - One with the 7 lowest registers (register mask 0x007F) | |
17544 | This LDM will finally contain between 2 and 7 registers | |
17545 | - One with the 7 highest registers (register mask 0xDF80) | |
17546 | This ldm will finally contain between 2 and 7 registers. */ | |
17547 | insn_low_registers = insn_all_registers & 0x007F; | |
17548 | insn_high_registers = insn_all_registers & 0xDF80; | |
17549 | ||
17550 | /* A spare register may be needed during this veneer to temporarily | |
17551 | handle the base register. This register will be restored with | |
17552 | the last LDM operation. | |
17553 | The usable register may be any general purpose register (that excludes | |
17554 | PC, SP, LR : register mask is 0x1FFF). */ | |
17555 | usable_register_mask = 0x1FFF; | |
17556 | ||
17557 | /* Generate the stub function. */ | |
17558 | if (!wback && !restore_pc && !restore_rn) | |
17559 | { | |
17560 | /* Choose a Ri in the low-register-list that will be restored. */ | |
17561 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
17562 | ||
17563 | /* MOV Ri, Rn. */ | |
17564 | current_stub_contents = | |
17565 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17566 | create_instruction_mov (ri, rn)); | |
17567 | ||
17568 | /* LDMDB Ri!, {R-high-register-list}. */ | |
17569 | current_stub_contents = | |
17570 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17571 | create_instruction_ldmdb | |
17572 | (ri, /*wback=*/1, insn_high_registers)); | |
17573 | ||
17574 | /* LDMDB Ri, {R-low-register-list}. */ | |
17575 | current_stub_contents = | |
17576 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17577 | create_instruction_ldmdb | |
17578 | (ri, /*wback=*/0, insn_low_registers)); | |
17579 | ||
17580 | /* B initial_insn_addr+4. */ | |
17581 | current_stub_contents = | |
17582 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17583 | create_instruction_branch_absolute | |
82188b29 | 17584 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17585 | } |
17586 | else if (wback && !restore_pc && !restore_rn) | |
17587 | { | |
17588 | /* LDMDB Rn!, {R-high-register-list}. */ | |
17589 | current_stub_contents = | |
17590 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17591 | create_instruction_ldmdb | |
17592 | (rn, /*wback=*/1, insn_high_registers)); | |
17593 | ||
17594 | /* LDMDB Rn!, {R-low-register-list}. */ | |
17595 | current_stub_contents = | |
17596 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17597 | create_instruction_ldmdb | |
17598 | (rn, /*wback=*/1, insn_low_registers)); | |
17599 | ||
17600 | /* B initial_insn_addr+4. */ | |
17601 | current_stub_contents = | |
17602 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17603 | create_instruction_branch_absolute | |
82188b29 | 17604 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17605 | } |
17606 | else if (!wback && restore_pc && !restore_rn) | |
17607 | { | |
17608 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17609 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17610 | ||
17611 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
17612 | current_stub_contents = | |
17613 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17614 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
17615 | ||
17616 | /* LDMIA Ri!, {R-low-register-list}. */ | |
17617 | current_stub_contents = | |
17618 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17619 | create_instruction_ldmia | |
17620 | (ri, /*wback=*/1, insn_low_registers)); | |
17621 | ||
17622 | /* LDMIA Ri, {R-high-register-list}. */ | |
17623 | current_stub_contents = | |
17624 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17625 | create_instruction_ldmia | |
17626 | (ri, /*wback=*/0, insn_high_registers)); | |
17627 | } | |
17628 | else if (wback && restore_pc && !restore_rn) | |
17629 | { | |
17630 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17631 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17632 | ||
17633 | /* SUB Rn, Rn, #(4*nb_registers) */ | |
17634 | current_stub_contents = | |
17635 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17636 | create_instruction_sub (rn, rn, (4 * nb_registers))); | |
17637 | ||
17638 | /* MOV Ri, Rn. */ | |
17639 | current_stub_contents = | |
17640 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17641 | create_instruction_mov (ri, rn)); | |
17642 | ||
17643 | /* LDMIA Ri!, {R-low-register-list}. */ | |
17644 | current_stub_contents = | |
17645 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17646 | create_instruction_ldmia | |
17647 | (ri, /*wback=*/1, insn_low_registers)); | |
17648 | ||
17649 | /* LDMIA Ri, {R-high-register-list}. */ | |
17650 | current_stub_contents = | |
17651 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17652 | create_instruction_ldmia | |
17653 | (ri, /*wback=*/0, insn_high_registers)); | |
17654 | } | |
17655 | else if (!wback && !restore_pc && restore_rn) | |
17656 | { | |
17657 | ri = rn; | |
17658 | if (!(insn_low_registers & (1 << rn))) | |
17659 | { | |
17660 | /* Choose a Ri in the low-register-list that will be restored. */ | |
17661 | ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn)); | |
17662 | ||
17663 | /* MOV Ri, Rn. */ | |
17664 | current_stub_contents = | |
17665 | push_thumb2_insn16 (htab, output_bfd, current_stub_contents, | |
17666 | create_instruction_mov (ri, rn)); | |
17667 | } | |
17668 | ||
17669 | /* LDMDB Ri!, {R-high-register-list}. */ | |
17670 | current_stub_contents = | |
17671 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17672 | create_instruction_ldmdb | |
17673 | (ri, /*wback=*/1, insn_high_registers)); | |
17674 | ||
17675 | /* LDMDB Ri, {R-low-register-list}. */ | |
17676 | current_stub_contents = | |
17677 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17678 | create_instruction_ldmdb | |
17679 | (ri, /*wback=*/0, insn_low_registers)); | |
17680 | ||
17681 | /* B initial_insn_addr+4. */ | |
17682 | current_stub_contents = | |
17683 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17684 | create_instruction_branch_absolute | |
82188b29 | 17685 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17686 | } |
17687 | else if (!wback && restore_pc && restore_rn) | |
17688 | { | |
17689 | ri = rn; | |
17690 | if (!(insn_high_registers & (1 << rn))) | |
17691 | { | |
17692 | /* Choose a Ri in the high-register-list that will be restored. */ | |
17693 | ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn)); | |
17694 | } | |
17695 | ||
17696 | /* SUB Ri, Rn, #(4*nb_registers). */ | |
17697 | current_stub_contents = | |
17698 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17699 | create_instruction_sub (ri, rn, (4 * nb_registers))); | |
17700 | ||
17701 | /* LDMIA Ri!, {R-low-register-list}. */ | |
17702 | current_stub_contents = | |
17703 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17704 | create_instruction_ldmia | |
17705 | (ri, /*wback=*/1, insn_low_registers)); | |
17706 | ||
17707 | /* LDMIA Ri, {R-high-register-list}. */ | |
17708 | current_stub_contents = | |
17709 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17710 | create_instruction_ldmia | |
17711 | (ri, /*wback=*/0, insn_high_registers)); | |
17712 | } | |
17713 | else if (wback && restore_rn) | |
17714 | { | |
17715 | /* The assembler should not have accepted to encode this. */ | |
17716 | BFD_ASSERT (0 && "Cannot patch an instruction that has an " | |
17717 | "undefined behavior.\n"); | |
17718 | } | |
17719 | ||
17720 | /* Fill the remaining of the stub with deterministic contents. */ | |
17721 | current_stub_contents = | |
17722 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17723 | base_stub_contents, current_stub_contents, | |
17724 | base_stub_contents + | |
17725 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE); | |
17726 | ||
17727 | } | |
17728 | ||
17729 | static void | |
17730 | stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab, | |
17731 | bfd * output_bfd, | |
17732 | const insn32 initial_insn, | |
17733 | const bfd_byte *const initial_insn_addr, | |
17734 | bfd_byte *const base_stub_contents) | |
17735 | { | |
9239bbd3 | 17736 | int num_words = ((unsigned int) initial_insn << 24) >> 24; |
a504d23a LA |
17737 | bfd_byte *current_stub_contents = base_stub_contents; |
17738 | ||
17739 | BFD_ASSERT (is_thumb2_vldm (initial_insn)); | |
17740 | ||
17741 | /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with | |
9239bbd3 | 17742 | smaller than 8 words load sequences that do not cause the |
a504d23a | 17743 | hardware issue. */ |
9239bbd3 | 17744 | if (num_words <= 8) |
a504d23a LA |
17745 | { |
17746 | /* Untouched instruction. */ | |
17747 | current_stub_contents = | |
17748 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17749 | initial_insn); | |
17750 | ||
17751 | /* B initial_insn_addr+4. */ | |
17752 | current_stub_contents = | |
17753 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17754 | create_instruction_branch_absolute | |
82188b29 | 17755 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17756 | } |
17757 | else | |
17758 | { | |
9239bbd3 CM |
17759 | bfd_boolean is_dp = /* DP encoding. */ |
17760 | (initial_insn & 0xfe100f00) == 0xec100b00; | |
a504d23a LA |
17761 | bfd_boolean is_ia_nobang = /* (IA without !). */ |
17762 | (((initial_insn << 7) >> 28) & 0xd) == 0x4; | |
17763 | bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */ | |
17764 | (((initial_insn << 7) >> 28) & 0xd) == 0x5; | |
17765 | bfd_boolean is_db_bang = /* (DB with !). */ | |
17766 | (((initial_insn << 7) >> 28) & 0xd) == 0x9; | |
9239bbd3 | 17767 | int base_reg = ((unsigned int) initial_insn << 12) >> 28; |
a504d23a | 17768 | /* d = UInt (Vd:D);. */ |
9239bbd3 | 17769 | int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1) |
a504d23a LA |
17770 | | (((unsigned int)initial_insn << 9) >> 31); |
17771 | ||
9239bbd3 CM |
17772 | /* Compute the number of 8-words chunks needed to split. */ |
17773 | int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8); | |
a504d23a LA |
17774 | int chunk; |
17775 | ||
17776 | /* The test coverage has been done assuming the following | |
17777 | hypothesis that exactly one of the previous is_ predicates is | |
17778 | true. */ | |
9239bbd3 CM |
17779 | BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang) |
17780 | && !(is_ia_nobang & is_ia_bang & is_db_bang)); | |
a504d23a | 17781 | |
9239bbd3 | 17782 | /* We treat the cutting of the words in one pass for all |
a504d23a LA |
17783 | cases, then we emit the adjustments: |
17784 | ||
17785 | vldm rx, {...} | |
17786 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
17787 | -> sub rx, rx, #size (list) | |
17788 | ||
17789 | vldm rx!, {...} | |
17790 | -> vldm rx!, {8_words_or_less} for each needed 8_word | |
17791 | This also handles vpop instruction (when rx is sp) | |
17792 | ||
17793 | vldmd rx!, {...} | |
17794 | -> vldmb rx!, {8_words_or_less} for each needed 8_word. */ | |
9239bbd3 | 17795 | for (chunk = 0; chunk < chunks; ++chunk) |
a504d23a | 17796 | { |
9239bbd3 CM |
17797 | bfd_vma new_insn = 0; |
17798 | ||
a504d23a LA |
17799 | if (is_ia_nobang || is_ia_bang) |
17800 | { | |
9239bbd3 CM |
17801 | new_insn = create_instruction_vldmia |
17802 | (base_reg, | |
17803 | is_dp, | |
17804 | /*wback= . */1, | |
17805 | chunks - (chunk + 1) ? | |
17806 | 8 : num_words - chunk * 8, | |
17807 | first_reg + chunk * 8); | |
a504d23a LA |
17808 | } |
17809 | else if (is_db_bang) | |
17810 | { | |
9239bbd3 CM |
17811 | new_insn = create_instruction_vldmdb |
17812 | (base_reg, | |
17813 | is_dp, | |
17814 | chunks - (chunk + 1) ? | |
17815 | 8 : num_words - chunk * 8, | |
17816 | first_reg + chunk * 8); | |
a504d23a | 17817 | } |
9239bbd3 CM |
17818 | |
17819 | if (new_insn) | |
17820 | current_stub_contents = | |
17821 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17822 | new_insn); | |
a504d23a LA |
17823 | } |
17824 | ||
17825 | /* Only this case requires the base register compensation | |
17826 | subtract. */ | |
17827 | if (is_ia_nobang) | |
17828 | { | |
17829 | current_stub_contents = | |
17830 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17831 | create_instruction_sub | |
9239bbd3 | 17832 | (base_reg, base_reg, 4*num_words)); |
a504d23a LA |
17833 | } |
17834 | ||
17835 | /* B initial_insn_addr+4. */ | |
17836 | current_stub_contents = | |
17837 | push_thumb2_insn32 (htab, output_bfd, current_stub_contents, | |
17838 | create_instruction_branch_absolute | |
82188b29 | 17839 | (initial_insn_addr - current_stub_contents)); |
a504d23a LA |
17840 | } |
17841 | ||
17842 | /* Fill the remaining of the stub with deterministic contents. */ | |
17843 | current_stub_contents = | |
17844 | stm32l4xx_fill_stub_udf (htab, output_bfd, | |
17845 | base_stub_contents, current_stub_contents, | |
17846 | base_stub_contents + | |
17847 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE); | |
17848 | } | |
17849 | ||
17850 | static void | |
17851 | stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab, | |
17852 | bfd * output_bfd, | |
17853 | const insn32 wrong_insn, | |
17854 | const bfd_byte *const wrong_insn_addr, | |
17855 | bfd_byte *const stub_contents) | |
17856 | { | |
17857 | if (is_thumb2_ldmia (wrong_insn)) | |
17858 | stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd, | |
17859 | wrong_insn, wrong_insn_addr, | |
17860 | stub_contents); | |
17861 | else if (is_thumb2_ldmdb (wrong_insn)) | |
17862 | stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd, | |
17863 | wrong_insn, wrong_insn_addr, | |
17864 | stub_contents); | |
17865 | else if (is_thumb2_vldm (wrong_insn)) | |
17866 | stm32l4xx_create_replacing_stub_vldm (htab, output_bfd, | |
17867 | wrong_insn, wrong_insn_addr, | |
17868 | stub_contents); | |
17869 | } | |
17870 | ||
17871 | /* End of stm32l4xx work-around. */ | |
17872 | ||
17873 | ||
491d01d3 YU |
17874 | static void |
17875 | elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info, | |
17876 | asection *output_sec, Elf_Internal_Rela *rel) | |
17877 | { | |
17878 | BFD_ASSERT (output_sec && rel); | |
17879 | struct bfd_elf_section_reloc_data *output_reldata; | |
17880 | struct elf32_arm_link_hash_table *htab; | |
17881 | struct bfd_elf_section_data *oesd = elf_section_data (output_sec); | |
17882 | Elf_Internal_Shdr *rel_hdr; | |
17883 | ||
17884 | ||
17885 | if (oesd->rel.hdr) | |
17886 | { | |
17887 | rel_hdr = oesd->rel.hdr; | |
17888 | output_reldata = &(oesd->rel); | |
17889 | } | |
17890 | else if (oesd->rela.hdr) | |
17891 | { | |
17892 | rel_hdr = oesd->rela.hdr; | |
17893 | output_reldata = &(oesd->rela); | |
17894 | } | |
17895 | else | |
17896 | { | |
17897 | abort (); | |
17898 | } | |
17899 | ||
17900 | bfd_byte *erel = rel_hdr->contents; | |
17901 | erel += output_reldata->count * rel_hdr->sh_entsize; | |
17902 | htab = elf32_arm_hash_table (info); | |
17903 | SWAP_RELOC_OUT (htab) (output_bfd, rel, erel); | |
17904 | output_reldata->count++; | |
17905 | } | |
17906 | ||
e489d0ae PB |
17907 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
17908 | written out as normal. */ | |
17909 | ||
17910 | static bfd_boolean | |
c7b8f16e | 17911 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
17912 | struct bfd_link_info *link_info, |
17913 | asection *sec, | |
e489d0ae PB |
17914 | bfd_byte *contents) |
17915 | { | |
48229727 | 17916 | unsigned int mapcount, errcount; |
8e3de13a | 17917 | _arm_elf_section_data *arm_data; |
c7b8f16e | 17918 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 17919 | elf32_arm_section_map *map; |
c7b8f16e | 17920 | elf32_vfp11_erratum_list *errnode; |
a504d23a | 17921 | elf32_stm32l4xx_erratum_list *stm32l4xx_errnode; |
e489d0ae PB |
17922 | bfd_vma ptr; |
17923 | bfd_vma end; | |
c7b8f16e | 17924 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 17925 | bfd_byte tmp; |
48229727 | 17926 | unsigned int i; |
57e8b36a | 17927 | |
4dfe6ac6 NC |
17928 | if (globals == NULL) |
17929 | return FALSE; | |
17930 | ||
8e3de13a NC |
17931 | /* If this section has not been allocated an _arm_elf_section_data |
17932 | structure then we cannot record anything. */ | |
17933 | arm_data = get_arm_elf_section_data (sec); | |
17934 | if (arm_data == NULL) | |
17935 | return FALSE; | |
17936 | ||
17937 | mapcount = arm_data->mapcount; | |
17938 | map = arm_data->map; | |
c7b8f16e JB |
17939 | errcount = arm_data->erratumcount; |
17940 | ||
17941 | if (errcount != 0) | |
17942 | { | |
17943 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
17944 | ||
17945 | for (errnode = arm_data->erratumlist; errnode != 0; | |
99059e56 RM |
17946 | errnode = errnode->next) |
17947 | { | |
17948 | bfd_vma target = errnode->vma - offset; | |
17949 | ||
17950 | switch (errnode->type) | |
17951 | { | |
17952 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
17953 | { | |
17954 | bfd_vma branch_to_veneer; | |
17955 | /* Original condition code of instruction, plus bit mask for | |
17956 | ARM B instruction. */ | |
17957 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
17958 | | 0x0a000000; | |
c7b8f16e JB |
17959 | |
17960 | /* The instruction is before the label. */ | |
91d6fa6a | 17961 | target -= 4; |
c7b8f16e JB |
17962 | |
17963 | /* Above offset included in -4 below. */ | |
17964 | branch_to_veneer = errnode->u.b.veneer->vma | |
99059e56 | 17965 | - errnode->vma - 4; |
c7b8f16e JB |
17966 | |
17967 | if ((signed) branch_to_veneer < -(1 << 25) | |
17968 | || (signed) branch_to_veneer >= (1 << 25)) | |
17969 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
17970 | "range"), output_bfd); | |
17971 | ||
99059e56 RM |
17972 | insn |= (branch_to_veneer >> 2) & 0xffffff; |
17973 | contents[endianflip ^ target] = insn & 0xff; | |
17974 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
17975 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
17976 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
17977 | } | |
17978 | break; | |
c7b8f16e JB |
17979 | |
17980 | case VFP11_ERRATUM_ARM_VENEER: | |
99059e56 RM |
17981 | { |
17982 | bfd_vma branch_from_veneer; | |
17983 | unsigned int insn; | |
c7b8f16e | 17984 | |
99059e56 RM |
17985 | /* Take size of veneer into account. */ |
17986 | branch_from_veneer = errnode->u.v.branch->vma | |
17987 | - errnode->vma - 12; | |
c7b8f16e JB |
17988 | |
17989 | if ((signed) branch_from_veneer < -(1 << 25) | |
17990 | || (signed) branch_from_veneer >= (1 << 25)) | |
17991 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
17992 | "range"), output_bfd); | |
17993 | ||
99059e56 RM |
17994 | /* Original instruction. */ |
17995 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
17996 | contents[endianflip ^ target] = insn & 0xff; | |
17997 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
17998 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
17999 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
18000 | ||
18001 | /* Branch back to insn after original insn. */ | |
18002 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
18003 | contents[endianflip ^ (target + 4)] = insn & 0xff; | |
18004 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
18005 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
18006 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
18007 | } | |
18008 | break; | |
c7b8f16e | 18009 | |
99059e56 RM |
18010 | default: |
18011 | abort (); | |
18012 | } | |
18013 | } | |
c7b8f16e | 18014 | } |
e489d0ae | 18015 | |
a504d23a LA |
18016 | if (arm_data->stm32l4xx_erratumcount != 0) |
18017 | { | |
18018 | for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist; | |
18019 | stm32l4xx_errnode != 0; | |
18020 | stm32l4xx_errnode = stm32l4xx_errnode->next) | |
18021 | { | |
18022 | bfd_vma target = stm32l4xx_errnode->vma - offset; | |
18023 | ||
18024 | switch (stm32l4xx_errnode->type) | |
18025 | { | |
18026 | case STM32L4XX_ERRATUM_BRANCH_TO_VENEER: | |
18027 | { | |
18028 | unsigned int insn; | |
18029 | bfd_vma branch_to_veneer = | |
18030 | stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma; | |
18031 | ||
18032 | if ((signed) branch_to_veneer < -(1 << 24) | |
18033 | || (signed) branch_to_veneer >= (1 << 24)) | |
18034 | { | |
18035 | bfd_vma out_of_range = | |
18036 | ((signed) branch_to_veneer < -(1 << 24)) ? | |
18037 | - branch_to_veneer - (1 << 24) : | |
18038 | ((signed) branch_to_veneer >= (1 << 24)) ? | |
18039 | branch_to_veneer - (1 << 24) : 0; | |
18040 | ||
18041 | (*_bfd_error_handler) | |
18042 | (_("%B(%#x): error: Cannot create STM32L4XX veneer. " | |
eee926f2 | 18043 | "Jump out of range by %ld bytes. " |
a504d23a LA |
18044 | "Cannot encode branch instruction. "), |
18045 | output_bfd, | |
eee926f2 | 18046 | (long) (stm32l4xx_errnode->vma - 4), |
a504d23a LA |
18047 | out_of_range); |
18048 | continue; | |
18049 | } | |
18050 | ||
18051 | insn = create_instruction_branch_absolute | |
82188b29 | 18052 | (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma); |
a504d23a LA |
18053 | |
18054 | /* The instruction is before the label. */ | |
18055 | target -= 4; | |
18056 | ||
18057 | put_thumb2_insn (globals, output_bfd, | |
18058 | (bfd_vma) insn, contents + target); | |
18059 | } | |
18060 | break; | |
18061 | ||
18062 | case STM32L4XX_ERRATUM_VENEER: | |
18063 | { | |
82188b29 NC |
18064 | bfd_byte * veneer; |
18065 | bfd_byte * veneer_r; | |
a504d23a LA |
18066 | unsigned int insn; |
18067 | ||
82188b29 NC |
18068 | veneer = contents + target; |
18069 | veneer_r = veneer | |
18070 | + stm32l4xx_errnode->u.b.veneer->vma | |
18071 | - stm32l4xx_errnode->vma - 4; | |
a504d23a LA |
18072 | |
18073 | if ((signed) (veneer_r - veneer - | |
18074 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE > | |
18075 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE ? | |
18076 | STM32L4XX_ERRATUM_VLDM_VENEER_SIZE : | |
18077 | STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24) | |
18078 | || (signed) (veneer_r - veneer) >= (1 << 24)) | |
18079 | { | |
18080 | (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX " | |
18081 | "veneer."), output_bfd); | |
18082 | continue; | |
18083 | } | |
18084 | ||
18085 | /* Original instruction. */ | |
18086 | insn = stm32l4xx_errnode->u.v.branch->u.b.insn; | |
18087 | ||
18088 | stm32l4xx_create_replacing_stub | |
18089 | (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer); | |
18090 | } | |
18091 | break; | |
18092 | ||
18093 | default: | |
18094 | abort (); | |
18095 | } | |
18096 | } | |
18097 | } | |
18098 | ||
2468f9c9 PB |
18099 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
18100 | { | |
18101 | arm_unwind_table_edit *edit_node | |
99059e56 | 18102 | = arm_data->u.exidx.unwind_edit_list; |
2468f9c9 | 18103 | /* Now, sec->size is the size of the section we will write. The original |
99059e56 | 18104 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND |
2468f9c9 PB |
18105 | markers) was sec->rawsize. (This isn't the case if we perform no |
18106 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 18107 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
18108 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
18109 | unsigned int in_index, out_index; | |
18110 | bfd_vma add_to_offsets = 0; | |
18111 | ||
18112 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) | |
99059e56 | 18113 | { |
2468f9c9 PB |
18114 | if (edit_node) |
18115 | { | |
18116 | unsigned int edit_index = edit_node->index; | |
b38cadfb | 18117 | |
2468f9c9 | 18118 | if (in_index < edit_index && in_index * 8 < input_size) |
99059e56 | 18119 | { |
2468f9c9 PB |
18120 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, |
18121 | contents + in_index * 8, add_to_offsets); | |
18122 | out_index++; | |
18123 | in_index++; | |
18124 | } | |
18125 | else if (in_index == edit_index | |
18126 | || (in_index * 8 >= input_size | |
18127 | && edit_index == UINT_MAX)) | |
99059e56 | 18128 | { |
2468f9c9 PB |
18129 | switch (edit_node->type) |
18130 | { | |
18131 | case DELETE_EXIDX_ENTRY: | |
18132 | in_index++; | |
18133 | add_to_offsets += 8; | |
18134 | break; | |
b38cadfb | 18135 | |
2468f9c9 PB |
18136 | case INSERT_EXIDX_CANTUNWIND_AT_END: |
18137 | { | |
99059e56 | 18138 | asection *text_sec = edit_node->linked_section; |
2468f9c9 PB |
18139 | bfd_vma text_offset = text_sec->output_section->vma |
18140 | + text_sec->output_offset | |
18141 | + text_sec->size; | |
18142 | bfd_vma exidx_offset = offset + out_index * 8; | |
99059e56 | 18143 | unsigned long prel31_offset; |
2468f9c9 PB |
18144 | |
18145 | /* Note: this is meant to be equivalent to an | |
18146 | R_ARM_PREL31 relocation. These synthetic | |
18147 | EXIDX_CANTUNWIND markers are not relocated by the | |
18148 | usual BFD method. */ | |
18149 | prel31_offset = (text_offset - exidx_offset) | |
18150 | & 0x7ffffffful; | |
491d01d3 YU |
18151 | if (bfd_link_relocatable (link_info)) |
18152 | { | |
18153 | /* Here relocation for new EXIDX_CANTUNWIND is | |
18154 | created, so there is no need to | |
18155 | adjust offset by hand. */ | |
18156 | prel31_offset = text_sec->output_offset | |
18157 | + text_sec->size; | |
18158 | ||
18159 | /* New relocation entity. */ | |
18160 | asection *text_out = text_sec->output_section; | |
18161 | Elf_Internal_Rela rel; | |
18162 | rel.r_addend = 0; | |
18163 | rel.r_offset = exidx_offset; | |
18164 | rel.r_info = ELF32_R_INFO (text_out->target_index, | |
18165 | R_ARM_PREL31); | |
18166 | ||
18167 | elf32_arm_add_relocation (output_bfd, link_info, | |
18168 | sec->output_section, | |
18169 | &rel); | |
18170 | } | |
2468f9c9 PB |
18171 | |
18172 | /* First address we can't unwind. */ | |
18173 | bfd_put_32 (output_bfd, prel31_offset, | |
18174 | &edited_contents[out_index * 8]); | |
18175 | ||
18176 | /* Code for EXIDX_CANTUNWIND. */ | |
18177 | bfd_put_32 (output_bfd, 0x1, | |
18178 | &edited_contents[out_index * 8 + 4]); | |
18179 | ||
18180 | out_index++; | |
18181 | add_to_offsets -= 8; | |
18182 | } | |
18183 | break; | |
18184 | } | |
b38cadfb | 18185 | |
2468f9c9 PB |
18186 | edit_node = edit_node->next; |
18187 | } | |
18188 | } | |
18189 | else | |
18190 | { | |
18191 | /* No more edits, copy remaining entries verbatim. */ | |
18192 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
18193 | contents + in_index * 8, add_to_offsets); | |
18194 | out_index++; | |
18195 | in_index++; | |
18196 | } | |
18197 | } | |
18198 | ||
18199 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
18200 | bfd_set_section_contents (output_bfd, sec->output_section, | |
18201 | edited_contents, | |
18202 | (file_ptr) sec->output_offset, sec->size); | |
18203 | ||
18204 | return TRUE; | |
18205 | } | |
18206 | ||
48229727 JB |
18207 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
18208 | if (globals->fix_cortex_a8) | |
18209 | { | |
18210 | struct a8_branch_to_stub_data data; | |
18211 | ||
18212 | data.writing_section = sec; | |
18213 | data.contents = contents; | |
18214 | ||
a504d23a LA |
18215 | bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub, |
18216 | & data); | |
48229727 JB |
18217 | } |
18218 | ||
e489d0ae PB |
18219 | if (mapcount == 0) |
18220 | return FALSE; | |
18221 | ||
c7b8f16e | 18222 | if (globals->byteswap_code) |
e489d0ae | 18223 | { |
c7b8f16e | 18224 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 18225 | |
c7b8f16e JB |
18226 | ptr = map[0].vma; |
18227 | for (i = 0; i < mapcount; i++) | |
99059e56 RM |
18228 | { |
18229 | if (i == mapcount - 1) | |
c7b8f16e | 18230 | end = sec->size; |
99059e56 RM |
18231 | else |
18232 | end = map[i + 1].vma; | |
e489d0ae | 18233 | |
99059e56 | 18234 | switch (map[i].type) |
e489d0ae | 18235 | { |
c7b8f16e JB |
18236 | case 'a': |
18237 | /* Byte swap code words. */ | |
18238 | while (ptr + 3 < end) | |
99059e56 RM |
18239 | { |
18240 | tmp = contents[ptr]; | |
18241 | contents[ptr] = contents[ptr + 3]; | |
18242 | contents[ptr + 3] = tmp; | |
18243 | tmp = contents[ptr + 1]; | |
18244 | contents[ptr + 1] = contents[ptr + 2]; | |
18245 | contents[ptr + 2] = tmp; | |
18246 | ptr += 4; | |
18247 | } | |
c7b8f16e | 18248 | break; |
e489d0ae | 18249 | |
c7b8f16e JB |
18250 | case 't': |
18251 | /* Byte swap code halfwords. */ | |
18252 | while (ptr + 1 < end) | |
99059e56 RM |
18253 | { |
18254 | tmp = contents[ptr]; | |
18255 | contents[ptr] = contents[ptr + 1]; | |
18256 | contents[ptr + 1] = tmp; | |
18257 | ptr += 2; | |
18258 | } | |
c7b8f16e JB |
18259 | break; |
18260 | ||
18261 | case 'd': | |
18262 | /* Leave data alone. */ | |
18263 | break; | |
18264 | } | |
99059e56 RM |
18265 | ptr = end; |
18266 | } | |
e489d0ae | 18267 | } |
8e3de13a | 18268 | |
93204d3a | 18269 | free (map); |
47b2e99c | 18270 | arm_data->mapcount = -1; |
c7b8f16e | 18271 | arm_data->mapsize = 0; |
8e3de13a | 18272 | arm_data->map = NULL; |
8e3de13a | 18273 | |
e489d0ae PB |
18274 | return FALSE; |
18275 | } | |
18276 | ||
0beaef2b PB |
18277 | /* Mangle thumb function symbols as we read them in. */ |
18278 | ||
8384fb8f | 18279 | static bfd_boolean |
0beaef2b PB |
18280 | elf32_arm_swap_symbol_in (bfd * abfd, |
18281 | const void *psrc, | |
18282 | const void *pshn, | |
18283 | Elf_Internal_Sym *dst) | |
18284 | { | |
4ba2ef8f TP |
18285 | Elf_Internal_Shdr *symtab_hdr; |
18286 | const char *name = NULL; | |
18287 | ||
8384fb8f AM |
18288 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
18289 | return FALSE; | |
39d911fc | 18290 | dst->st_target_internal = 0; |
0beaef2b PB |
18291 | |
18292 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
35fc36a8 | 18293 | the address. */ |
63e1a0fc PB |
18294 | if (ELF_ST_TYPE (dst->st_info) == STT_FUNC |
18295 | || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC) | |
0beaef2b | 18296 | { |
63e1a0fc PB |
18297 | if (dst->st_value & 1) |
18298 | { | |
18299 | dst->st_value &= ~(bfd_vma) 1; | |
39d911fc TP |
18300 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, |
18301 | ST_BRANCH_TO_THUMB); | |
63e1a0fc PB |
18302 | } |
18303 | else | |
39d911fc | 18304 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM); |
35fc36a8 RS |
18305 | } |
18306 | else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC) | |
18307 | { | |
18308 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC); | |
39d911fc | 18309 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB); |
0beaef2b | 18310 | } |
35fc36a8 | 18311 | else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION) |
39d911fc | 18312 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG); |
35fc36a8 | 18313 | else |
39d911fc | 18314 | ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN); |
35fc36a8 | 18315 | |
4ba2ef8f TP |
18316 | /* Mark CMSE special symbols. */ |
18317 | symtab_hdr = & elf_symtab_hdr (abfd); | |
18318 | if (symtab_hdr->sh_size) | |
18319 | name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL); | |
18320 | if (name && CONST_STRNEQ (name, CMSE_PREFIX)) | |
18321 | ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal); | |
18322 | ||
8384fb8f | 18323 | return TRUE; |
0beaef2b PB |
18324 | } |
18325 | ||
18326 | ||
18327 | /* Mangle thumb function symbols as we write them out. */ | |
18328 | ||
18329 | static void | |
18330 | elf32_arm_swap_symbol_out (bfd *abfd, | |
18331 | const Elf_Internal_Sym *src, | |
18332 | void *cdst, | |
18333 | void *shndx) | |
18334 | { | |
18335 | Elf_Internal_Sym newsym; | |
18336 | ||
18337 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
18338 | of the address set, as per the new EABI. We do this unconditionally | |
18339 | because objcopy does not set the elf header flags until after | |
18340 | it writes out the symbol table. */ | |
39d911fc | 18341 | if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB) |
0beaef2b PB |
18342 | { |
18343 | newsym = *src; | |
34e77a92 RS |
18344 | if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC) |
18345 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad | 18346 | if (newsym.st_shndx != SHN_UNDEF) |
99059e56 RM |
18347 | { |
18348 | /* Do this only for defined symbols. At link type, the static | |
18349 | linker will simulate the work of dynamic linker of resolving | |
18350 | symbols and will carry over the thumbness of found symbols to | |
18351 | the output symbol table. It's not clear how it happens, but | |
18352 | the thumbness of undefined symbols can well be different at | |
18353 | runtime, and writing '1' for them will be confusing for users | |
18354 | and possibly for dynamic linker itself. | |
18355 | */ | |
18356 | newsym.st_value |= 1; | |
18357 | } | |
906e58ca | 18358 | |
0beaef2b PB |
18359 | src = &newsym; |
18360 | } | |
18361 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
18362 | } | |
18363 | ||
b294bdf8 MM |
18364 | /* Add the PT_ARM_EXIDX program header. */ |
18365 | ||
18366 | static bfd_boolean | |
906e58ca | 18367 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
18368 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
18369 | { | |
18370 | struct elf_segment_map *m; | |
18371 | asection *sec; | |
18372 | ||
18373 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
18374 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
18375 | { | |
18376 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
18377 | want to add another one. This situation arises when running | |
18378 | "strip"; the input binary already has the header. */ | |
12bd6957 | 18379 | m = elf_seg_map (abfd); |
b294bdf8 MM |
18380 | while (m && m->p_type != PT_ARM_EXIDX) |
18381 | m = m->next; | |
18382 | if (!m) | |
18383 | { | |
21d799b5 | 18384 | m = (struct elf_segment_map *) |
99059e56 | 18385 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); |
b294bdf8 MM |
18386 | if (m == NULL) |
18387 | return FALSE; | |
18388 | m->p_type = PT_ARM_EXIDX; | |
18389 | m->count = 1; | |
18390 | m->sections[0] = sec; | |
18391 | ||
12bd6957 AM |
18392 | m->next = elf_seg_map (abfd); |
18393 | elf_seg_map (abfd) = m; | |
b294bdf8 MM |
18394 | } |
18395 | } | |
18396 | ||
18397 | return TRUE; | |
18398 | } | |
18399 | ||
18400 | /* We may add a PT_ARM_EXIDX program header. */ | |
18401 | ||
18402 | static int | |
a6b96beb AM |
18403 | elf32_arm_additional_program_headers (bfd *abfd, |
18404 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
18405 | { |
18406 | asection *sec; | |
18407 | ||
18408 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
18409 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
18410 | return 1; | |
18411 | else | |
18412 | return 0; | |
18413 | } | |
18414 | ||
34e77a92 RS |
18415 | /* Hook called by the linker routine which adds symbols from an object |
18416 | file. */ | |
18417 | ||
18418 | static bfd_boolean | |
18419 | elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, | |
18420 | Elf_Internal_Sym *sym, const char **namep, | |
18421 | flagword *flagsp, asection **secp, bfd_vma *valp) | |
18422 | { | |
a43942db | 18423 | if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC |
f1885d1e AM |
18424 | && (abfd->flags & DYNAMIC) == 0 |
18425 | && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour) | |
a43942db | 18426 | elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc; |
34e77a92 | 18427 | |
c792917c NC |
18428 | if (elf32_arm_hash_table (info) == NULL) |
18429 | return FALSE; | |
18430 | ||
34e77a92 RS |
18431 | if (elf32_arm_hash_table (info)->vxworks_p |
18432 | && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep, | |
18433 | flagsp, secp, valp)) | |
18434 | return FALSE; | |
18435 | ||
18436 | return TRUE; | |
18437 | } | |
18438 | ||
0beaef2b | 18439 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
18440 | const struct elf_size_info elf32_arm_size_info = |
18441 | { | |
0beaef2b PB |
18442 | sizeof (Elf32_External_Ehdr), |
18443 | sizeof (Elf32_External_Phdr), | |
18444 | sizeof (Elf32_External_Shdr), | |
18445 | sizeof (Elf32_External_Rel), | |
18446 | sizeof (Elf32_External_Rela), | |
18447 | sizeof (Elf32_External_Sym), | |
18448 | sizeof (Elf32_External_Dyn), | |
18449 | sizeof (Elf_External_Note), | |
18450 | 4, | |
18451 | 1, | |
18452 | 32, 2, | |
18453 | ELFCLASS32, EV_CURRENT, | |
18454 | bfd_elf32_write_out_phdrs, | |
18455 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 18456 | bfd_elf32_checksum_contents, |
0beaef2b PB |
18457 | bfd_elf32_write_relocs, |
18458 | elf32_arm_swap_symbol_in, | |
18459 | elf32_arm_swap_symbol_out, | |
18460 | bfd_elf32_slurp_reloc_table, | |
18461 | bfd_elf32_slurp_symbol_table, | |
18462 | bfd_elf32_swap_dyn_in, | |
18463 | bfd_elf32_swap_dyn_out, | |
18464 | bfd_elf32_swap_reloc_in, | |
18465 | bfd_elf32_swap_reloc_out, | |
18466 | bfd_elf32_swap_reloca_in, | |
18467 | bfd_elf32_swap_reloca_out | |
18468 | }; | |
18469 | ||
685e70ae VK |
18470 | static bfd_vma |
18471 | read_code32 (const bfd *abfd, const bfd_byte *addr) | |
18472 | { | |
18473 | /* V7 BE8 code is always little endian. */ | |
18474 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
18475 | return bfd_getl32 (addr); | |
18476 | ||
18477 | return bfd_get_32 (abfd, addr); | |
18478 | } | |
18479 | ||
18480 | static bfd_vma | |
18481 | read_code16 (const bfd *abfd, const bfd_byte *addr) | |
18482 | { | |
18483 | /* V7 BE8 code is always little endian. */ | |
18484 | if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0) | |
18485 | return bfd_getl16 (addr); | |
18486 | ||
18487 | return bfd_get_16 (abfd, addr); | |
18488 | } | |
18489 | ||
6a631e86 YG |
18490 | /* Return size of plt0 entry starting at ADDR |
18491 | or (bfd_vma) -1 if size can not be determined. */ | |
18492 | ||
18493 | static bfd_vma | |
18494 | elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr) | |
18495 | { | |
18496 | bfd_vma first_word; | |
18497 | bfd_vma plt0_size; | |
18498 | ||
685e70ae | 18499 | first_word = read_code32 (abfd, addr); |
6a631e86 YG |
18500 | |
18501 | if (first_word == elf32_arm_plt0_entry[0]) | |
18502 | plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry); | |
18503 | else if (first_word == elf32_thumb2_plt0_entry[0]) | |
18504 | plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry); | |
18505 | else | |
18506 | /* We don't yet handle this PLT format. */ | |
18507 | return (bfd_vma) -1; | |
18508 | ||
18509 | return plt0_size; | |
18510 | } | |
18511 | ||
18512 | /* Return size of plt entry starting at offset OFFSET | |
18513 | of plt section located at address START | |
18514 | or (bfd_vma) -1 if size can not be determined. */ | |
18515 | ||
18516 | static bfd_vma | |
18517 | elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset) | |
18518 | { | |
18519 | bfd_vma first_insn; | |
18520 | bfd_vma plt_size = 0; | |
18521 | const bfd_byte *addr = start + offset; | |
18522 | ||
18523 | /* PLT entry size if fixed on Thumb-only platforms. */ | |
685e70ae | 18524 | if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0]) |
6a631e86 YG |
18525 | return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry); |
18526 | ||
18527 | /* Respect Thumb stub if necessary. */ | |
685e70ae | 18528 | if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0]) |
6a631e86 YG |
18529 | { |
18530 | plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub); | |
18531 | } | |
18532 | ||
18533 | /* Strip immediate from first add. */ | |
685e70ae | 18534 | first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00; |
6a631e86 YG |
18535 | |
18536 | #ifdef FOUR_WORD_PLT | |
18537 | if (first_insn == elf32_arm_plt_entry[0]) | |
18538 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry); | |
18539 | #else | |
18540 | if (first_insn == elf32_arm_plt_entry_long[0]) | |
18541 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long); | |
18542 | else if (first_insn == elf32_arm_plt_entry_short[0]) | |
18543 | plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short); | |
18544 | #endif | |
18545 | else | |
18546 | /* We don't yet handle this PLT format. */ | |
18547 | return (bfd_vma) -1; | |
18548 | ||
18549 | return plt_size; | |
18550 | } | |
18551 | ||
18552 | /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */ | |
18553 | ||
18554 | static long | |
18555 | elf32_arm_get_synthetic_symtab (bfd *abfd, | |
18556 | long symcount ATTRIBUTE_UNUSED, | |
18557 | asymbol **syms ATTRIBUTE_UNUSED, | |
18558 | long dynsymcount, | |
18559 | asymbol **dynsyms, | |
18560 | asymbol **ret) | |
18561 | { | |
18562 | asection *relplt; | |
18563 | asymbol *s; | |
18564 | arelent *p; | |
18565 | long count, i, n; | |
18566 | size_t size; | |
18567 | Elf_Internal_Shdr *hdr; | |
18568 | char *names; | |
18569 | asection *plt; | |
18570 | bfd_vma offset; | |
18571 | bfd_byte *data; | |
18572 | ||
18573 | *ret = NULL; | |
18574 | ||
18575 | if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0) | |
18576 | return 0; | |
18577 | ||
18578 | if (dynsymcount <= 0) | |
18579 | return 0; | |
18580 | ||
18581 | relplt = bfd_get_section_by_name (abfd, ".rel.plt"); | |
18582 | if (relplt == NULL) | |
18583 | return 0; | |
18584 | ||
18585 | hdr = &elf_section_data (relplt)->this_hdr; | |
18586 | if (hdr->sh_link != elf_dynsymtab (abfd) | |
18587 | || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA)) | |
18588 | return 0; | |
18589 | ||
18590 | plt = bfd_get_section_by_name (abfd, ".plt"); | |
18591 | if (plt == NULL) | |
18592 | return 0; | |
18593 | ||
18594 | if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE)) | |
18595 | return -1; | |
18596 | ||
18597 | data = plt->contents; | |
18598 | if (data == NULL) | |
18599 | { | |
18600 | if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL) | |
18601 | return -1; | |
18602 | bfd_cache_section_contents((asection *) plt, data); | |
18603 | } | |
18604 | ||
18605 | count = relplt->size / hdr->sh_entsize; | |
18606 | size = count * sizeof (asymbol); | |
18607 | p = relplt->relocation; | |
18608 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
18609 | { | |
18610 | size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt"); | |
18611 | if (p->addend != 0) | |
18612 | size += sizeof ("+0x") - 1 + 8; | |
18613 | } | |
18614 | ||
18615 | s = *ret = (asymbol *) bfd_malloc (size); | |
18616 | if (s == NULL) | |
18617 | return -1; | |
18618 | ||
18619 | offset = elf32_arm_plt0_size (abfd, data); | |
18620 | if (offset == (bfd_vma) -1) | |
18621 | return -1; | |
18622 | ||
18623 | names = (char *) (s + count); | |
18624 | p = relplt->relocation; | |
18625 | n = 0; | |
18626 | for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel) | |
18627 | { | |
18628 | size_t len; | |
18629 | ||
18630 | bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset); | |
18631 | if (plt_size == (bfd_vma) -1) | |
18632 | break; | |
18633 | ||
18634 | *s = **p->sym_ptr_ptr; | |
18635 | /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since | |
18636 | we are defining a symbol, ensure one of them is set. */ | |
18637 | if ((s->flags & BSF_LOCAL) == 0) | |
18638 | s->flags |= BSF_GLOBAL; | |
18639 | s->flags |= BSF_SYNTHETIC; | |
18640 | s->section = plt; | |
18641 | s->value = offset; | |
18642 | s->name = names; | |
18643 | s->udata.p = NULL; | |
18644 | len = strlen ((*p->sym_ptr_ptr)->name); | |
18645 | memcpy (names, (*p->sym_ptr_ptr)->name, len); | |
18646 | names += len; | |
18647 | if (p->addend != 0) | |
18648 | { | |
18649 | char buf[30], *a; | |
18650 | ||
18651 | memcpy (names, "+0x", sizeof ("+0x") - 1); | |
18652 | names += sizeof ("+0x") - 1; | |
18653 | bfd_sprintf_vma (abfd, buf, p->addend); | |
18654 | for (a = buf; *a == '0'; ++a) | |
18655 | ; | |
18656 | len = strlen (a); | |
18657 | memcpy (names, a, len); | |
18658 | names += len; | |
18659 | } | |
18660 | memcpy (names, "@plt", sizeof ("@plt")); | |
18661 | names += sizeof ("@plt"); | |
18662 | ++s, ++n; | |
18663 | offset += plt_size; | |
18664 | } | |
18665 | ||
18666 | return n; | |
18667 | } | |
18668 | ||
ac4c9b04 MG |
18669 | static bfd_boolean |
18670 | elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr) | |
18671 | { | |
f0728ee3 AV |
18672 | if (hdr->sh_flags & SHF_ARM_PURECODE) |
18673 | *flags |= SEC_ELF_PURECODE; | |
ac4c9b04 MG |
18674 | return TRUE; |
18675 | } | |
18676 | ||
18677 | static flagword | |
18678 | elf32_arm_lookup_section_flags (char *flag_name) | |
18679 | { | |
f0728ee3 AV |
18680 | if (!strcmp (flag_name, "SHF_ARM_PURECODE")) |
18681 | return SHF_ARM_PURECODE; | |
ac4c9b04 MG |
18682 | |
18683 | return SEC_NO_FLAGS; | |
18684 | } | |
18685 | ||
491d01d3 YU |
18686 | static unsigned int |
18687 | elf32_arm_count_additional_relocs (asection *sec) | |
18688 | { | |
18689 | struct _arm_elf_section_data *arm_data; | |
18690 | arm_data = get_arm_elf_section_data (sec); | |
18691 | return arm_data->additional_reloc_count; | |
18692 | } | |
18693 | ||
5522f910 NC |
18694 | /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which |
18695 | has a type >= SHT_LOOS. Returns TRUE if these fields were initialised | |
18696 | FALSE otherwise. ISECTION is the best guess matching section from the | |
18697 | input bfd IBFD, but it might be NULL. */ | |
18698 | ||
18699 | static bfd_boolean | |
18700 | elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED, | |
18701 | bfd *obfd ATTRIBUTE_UNUSED, | |
18702 | const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED, | |
18703 | Elf_Internal_Shdr *osection) | |
18704 | { | |
18705 | switch (osection->sh_type) | |
18706 | { | |
18707 | case SHT_ARM_EXIDX: | |
18708 | { | |
18709 | Elf_Internal_Shdr **oheaders = elf_elfsections (obfd); | |
18710 | Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd); | |
18711 | unsigned i = 0; | |
18712 | ||
18713 | osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER; | |
18714 | osection->sh_info = 0; | |
18715 | ||
18716 | /* The sh_link field must be set to the text section associated with | |
18717 | this index section. Unfortunately the ARM EHABI does not specify | |
18718 | exactly how to determine this association. Our caller does try | |
18719 | to match up OSECTION with its corresponding input section however | |
18720 | so that is a good first guess. */ | |
18721 | if (isection != NULL | |
18722 | && osection->bfd_section != NULL | |
18723 | && isection->bfd_section != NULL | |
18724 | && isection->bfd_section->output_section != NULL | |
18725 | && isection->bfd_section->output_section == osection->bfd_section | |
18726 | && iheaders != NULL | |
18727 | && isection->sh_link > 0 | |
18728 | && isection->sh_link < elf_numsections (ibfd) | |
18729 | && iheaders[isection->sh_link]->bfd_section != NULL | |
18730 | && iheaders[isection->sh_link]->bfd_section->output_section != NULL | |
18731 | ) | |
18732 | { | |
18733 | for (i = elf_numsections (obfd); i-- > 0;) | |
18734 | if (oheaders[i]->bfd_section | |
18735 | == iheaders[isection->sh_link]->bfd_section->output_section) | |
18736 | break; | |
18737 | } | |
18738 | ||
18739 | if (i == 0) | |
18740 | { | |
18741 | /* Failing that we have to find a matching section ourselves. If | |
18742 | we had the output section name available we could compare that | |
18743 | with input section names. Unfortunately we don't. So instead | |
18744 | we use a simple heuristic and look for the nearest executable | |
18745 | section before this one. */ | |
18746 | for (i = elf_numsections (obfd); i-- > 0;) | |
18747 | if (oheaders[i] == osection) | |
18748 | break; | |
18749 | if (i == 0) | |
18750 | break; | |
18751 | ||
18752 | while (i-- > 0) | |
18753 | if (oheaders[i]->sh_type == SHT_PROGBITS | |
18754 | && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR)) | |
18755 | == (SHF_ALLOC | SHF_EXECINSTR)) | |
18756 | break; | |
18757 | } | |
18758 | ||
18759 | if (i) | |
18760 | { | |
18761 | osection->sh_link = i; | |
18762 | /* If the text section was part of a group | |
18763 | then the index section should be too. */ | |
18764 | if (oheaders[i]->sh_flags & SHF_GROUP) | |
18765 | osection->sh_flags |= SHF_GROUP; | |
18766 | return TRUE; | |
18767 | } | |
18768 | } | |
18769 | break; | |
18770 | ||
18771 | case SHT_ARM_PREEMPTMAP: | |
18772 | osection->sh_flags = SHF_ALLOC; | |
18773 | break; | |
18774 | ||
18775 | case SHT_ARM_ATTRIBUTES: | |
18776 | case SHT_ARM_DEBUGOVERLAY: | |
18777 | case SHT_ARM_OVERLAYSECTION: | |
18778 | default: | |
18779 | break; | |
18780 | } | |
18781 | ||
18782 | return FALSE; | |
18783 | } | |
18784 | ||
d691934d NC |
18785 | /* Returns TRUE if NAME is an ARM mapping symbol. |
18786 | Traditionally the symbols $a, $d and $t have been used. | |
18787 | The ARM ELF standard also defines $x (for A64 code). It also allows a | |
18788 | period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+". | |
18789 | Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do | |
18790 | not support them here. $t.x indicates the start of ThumbEE instructions. */ | |
18791 | ||
18792 | static bfd_boolean | |
18793 | is_arm_mapping_symbol (const char * name) | |
18794 | { | |
18795 | return name != NULL /* Paranoia. */ | |
18796 | && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then | |
18797 | the mapping symbols could have acquired a prefix. | |
18798 | We do not support this here, since such symbols no | |
18799 | longer conform to the ARM ELF ABI. */ | |
18800 | && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x') | |
18801 | && (name[2] == 0 || name[2] == '.'); | |
18802 | /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if | |
18803 | any characters that follow the period are legal characters for the body | |
18804 | of a symbol's name. For now we just assume that this is the case. */ | |
18805 | } | |
18806 | ||
fca2a38f NC |
18807 | /* Make sure that mapping symbols in object files are not removed via the |
18808 | "strip --strip-unneeded" tool. These symbols are needed in order to | |
18809 | correctly generate interworking veneers, and for byte swapping code | |
18810 | regions. Once an object file has been linked, it is safe to remove the | |
18811 | symbols as they will no longer be needed. */ | |
18812 | ||
18813 | static void | |
18814 | elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym) | |
18815 | { | |
18816 | if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0) | |
fca2a38f | 18817 | && sym->section != bfd_abs_section_ptr |
d691934d | 18818 | && is_arm_mapping_symbol (sym->name)) |
fca2a38f NC |
18819 | sym->flags |= BSF_KEEP; |
18820 | } | |
18821 | ||
5522f910 NC |
18822 | #undef elf_backend_copy_special_section_fields |
18823 | #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields | |
18824 | ||
252b5132 | 18825 | #define ELF_ARCH bfd_arch_arm |
ae95ffa6 | 18826 | #define ELF_TARGET_ID ARM_ELF_DATA |
252b5132 | 18827 | #define ELF_MACHINE_CODE EM_ARM |
d0facd1b NC |
18828 | #ifdef __QNXTARGET__ |
18829 | #define ELF_MAXPAGESIZE 0x1000 | |
18830 | #else | |
7572ca89 | 18831 | #define ELF_MAXPAGESIZE 0x10000 |
d0facd1b | 18832 | #endif |
b1342370 | 18833 | #define ELF_MINPAGESIZE 0x1000 |
24718e3b | 18834 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 18835 | |
ba93b8ac DJ |
18836 | #define bfd_elf32_mkobject elf32_arm_mkobject |
18837 | ||
99e4ae17 AJ |
18838 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
18839 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
18840 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
18841 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
18842 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create | |
dc810e39 | 18843 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
b38cadfb | 18844 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
252b5132 | 18845 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
4ab527b0 | 18846 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
e489d0ae | 18847 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 18848 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
3e6b1042 | 18849 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
6a631e86 | 18850 | #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab |
252b5132 RH |
18851 | |
18852 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type | |
18853 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook | |
6a5bb875 | 18854 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
252b5132 RH |
18855 | #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook |
18856 | #define elf_backend_check_relocs elf32_arm_check_relocs | |
dc810e39 | 18857 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 18858 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 18859 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
5e681ec4 | 18860 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
18861 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
18862 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
18863 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
0855e32b | 18864 | #define elf_backend_always_size_sections elf32_arm_always_size_sections |
74541ad4 | 18865 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ba96a88f | 18866 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
99e4ae17 | 18867 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 18868 | #define elf_backend_object_p elf32_arm_object_p |
40a18ebd NC |
18869 | #define elf_backend_fake_sections elf32_arm_fake_sections |
18870 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
e16bb312 | 18871 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
5e681ec4 | 18872 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol |
0beaef2b | 18873 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 18874 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
906e58ca NC |
18875 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
18876 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
54ddd295 | 18877 | #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols |
906e58ca | 18878 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing |
34e77a92 | 18879 | #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook |
491d01d3 | 18880 | #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs |
fca2a38f | 18881 | #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing |
906e58ca NC |
18882 | |
18883 | #define elf_backend_can_refcount 1 | |
18884 | #define elf_backend_can_gc_sections 1 | |
18885 | #define elf_backend_plt_readonly 1 | |
18886 | #define elf_backend_want_got_plt 1 | |
18887 | #define elf_backend_want_plt_sym 0 | |
18888 | #define elf_backend_may_use_rel_p 1 | |
18889 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 18890 | #define elf_backend_default_use_rela_p 0 |
252b5132 | 18891 | |
04f7c78d | 18892 | #define elf_backend_got_header_size 12 |
b68a20d6 | 18893 | #define elf_backend_extern_protected_data 1 |
04f7c78d | 18894 | |
906e58ca NC |
18895 | #undef elf_backend_obj_attrs_vendor |
18896 | #define elf_backend_obj_attrs_vendor "aeabi" | |
18897 | #undef elf_backend_obj_attrs_section | |
18898 | #define elf_backend_obj_attrs_section ".ARM.attributes" | |
18899 | #undef elf_backend_obj_attrs_arg_type | |
18900 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type | |
18901 | #undef elf_backend_obj_attrs_section_type | |
104d59d1 | 18902 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
b38cadfb NC |
18903 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
18904 | #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown | |
104d59d1 | 18905 | |
ac4c9b04 MG |
18906 | #undef elf_backend_section_flags |
18907 | #define elf_backend_section_flags elf32_arm_section_flags | |
18908 | #undef elf_backend_lookup_section_flags_hook | |
18909 | #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags | |
18910 | ||
252b5132 | 18911 | #include "elf32-target.h" |
7f266840 | 18912 | |
b38cadfb NC |
18913 | /* Native Client targets. */ |
18914 | ||
18915 | #undef TARGET_LITTLE_SYM | |
6d00b590 | 18916 | #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec |
b38cadfb NC |
18917 | #undef TARGET_LITTLE_NAME |
18918 | #define TARGET_LITTLE_NAME "elf32-littlearm-nacl" | |
18919 | #undef TARGET_BIG_SYM | |
6d00b590 | 18920 | #define TARGET_BIG_SYM arm_elf32_nacl_be_vec |
b38cadfb NC |
18921 | #undef TARGET_BIG_NAME |
18922 | #define TARGET_BIG_NAME "elf32-bigarm-nacl" | |
18923 | ||
18924 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
18925 | appropriately for NaCl. */ | |
18926 | ||
18927 | static struct bfd_link_hash_table * | |
18928 | elf32_arm_nacl_link_hash_table_create (bfd *abfd) | |
18929 | { | |
18930 | struct bfd_link_hash_table *ret; | |
18931 | ||
18932 | ret = elf32_arm_link_hash_table_create (abfd); | |
18933 | if (ret) | |
18934 | { | |
18935 | struct elf32_arm_link_hash_table *htab | |
18936 | = (struct elf32_arm_link_hash_table *) ret; | |
18937 | ||
18938 | htab->nacl_p = 1; | |
18939 | ||
18940 | htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry); | |
18941 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry); | |
18942 | } | |
18943 | return ret; | |
18944 | } | |
18945 | ||
18946 | /* Since NaCl doesn't use the ARM-specific unwind format, we don't | |
18947 | really need to use elf32_arm_modify_segment_map. But we do it | |
18948 | anyway just to reduce gratuitous differences with the stock ARM backend. */ | |
18949 | ||
18950 | static bfd_boolean | |
18951 | elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info) | |
18952 | { | |
18953 | return (elf32_arm_modify_segment_map (abfd, info) | |
18954 | && nacl_modify_segment_map (abfd, info)); | |
18955 | } | |
18956 | ||
887badb3 RM |
18957 | static void |
18958 | elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker) | |
18959 | { | |
18960 | elf32_arm_final_write_processing (abfd, linker); | |
18961 | nacl_final_write_processing (abfd, linker); | |
18962 | } | |
18963 | ||
6a631e86 YG |
18964 | static bfd_vma |
18965 | elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt, | |
18966 | const arelent *rel ATTRIBUTE_UNUSED) | |
18967 | { | |
18968 | return plt->vma | |
18969 | + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) + | |
18970 | i * ARRAY_SIZE (elf32_arm_nacl_plt_entry)); | |
18971 | } | |
887badb3 | 18972 | |
b38cadfb | 18973 | #undef elf32_bed |
6a631e86 | 18974 | #define elf32_bed elf32_arm_nacl_bed |
b38cadfb NC |
18975 | #undef bfd_elf32_bfd_link_hash_table_create |
18976 | #define bfd_elf32_bfd_link_hash_table_create \ | |
18977 | elf32_arm_nacl_link_hash_table_create | |
18978 | #undef elf_backend_plt_alignment | |
6a631e86 | 18979 | #define elf_backend_plt_alignment 4 |
b38cadfb NC |
18980 | #undef elf_backend_modify_segment_map |
18981 | #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map | |
18982 | #undef elf_backend_modify_program_headers | |
18983 | #define elf_backend_modify_program_headers nacl_modify_program_headers | |
887badb3 RM |
18984 | #undef elf_backend_final_write_processing |
18985 | #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing | |
6a631e86 YG |
18986 | #undef bfd_elf32_get_synthetic_symtab |
18987 | #undef elf_backend_plt_sym_val | |
18988 | #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val | |
5522f910 | 18989 | #undef elf_backend_copy_special_section_fields |
b38cadfb | 18990 | |
887badb3 RM |
18991 | #undef ELF_MINPAGESIZE |
18992 | #undef ELF_COMMONPAGESIZE | |
18993 | ||
b38cadfb NC |
18994 | |
18995 | #include "elf32-target.h" | |
18996 | ||
18997 | /* Reset to defaults. */ | |
18998 | #undef elf_backend_plt_alignment | |
18999 | #undef elf_backend_modify_segment_map | |
19000 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map | |
19001 | #undef elf_backend_modify_program_headers | |
887badb3 RM |
19002 | #undef elf_backend_final_write_processing |
19003 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
19004 | #undef ELF_MINPAGESIZE | |
19005 | #define ELF_MINPAGESIZE 0x1000 | |
19006 | #undef ELF_COMMONPAGESIZE | |
19007 | #define ELF_COMMONPAGESIZE 0x1000 | |
19008 | ||
b38cadfb | 19009 | |
906e58ca | 19010 | /* VxWorks Targets. */ |
4e7fd91e | 19011 | |
906e58ca | 19012 | #undef TARGET_LITTLE_SYM |
6d00b590 | 19013 | #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec |
906e58ca | 19014 | #undef TARGET_LITTLE_NAME |
4e7fd91e | 19015 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" |
906e58ca | 19016 | #undef TARGET_BIG_SYM |
6d00b590 | 19017 | #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec |
906e58ca | 19018 | #undef TARGET_BIG_NAME |
4e7fd91e PB |
19019 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" |
19020 | ||
19021 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
19022 | appropriately for VxWorks. */ | |
906e58ca | 19023 | |
4e7fd91e PB |
19024 | static struct bfd_link_hash_table * |
19025 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
19026 | { | |
19027 | struct bfd_link_hash_table *ret; | |
19028 | ||
19029 | ret = elf32_arm_link_hash_table_create (abfd); | |
19030 | if (ret) | |
19031 | { | |
19032 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 19033 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e | 19034 | htab->use_rel = 0; |
00a97672 | 19035 | htab->vxworks_p = 1; |
4e7fd91e PB |
19036 | } |
19037 | return ret; | |
906e58ca | 19038 | } |
4e7fd91e | 19039 | |
00a97672 RS |
19040 | static void |
19041 | elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) | |
19042 | { | |
19043 | elf32_arm_final_write_processing (abfd, linker); | |
19044 | elf_vxworks_final_write_processing (abfd, linker); | |
19045 | } | |
19046 | ||
906e58ca | 19047 | #undef elf32_bed |
4e7fd91e PB |
19048 | #define elf32_bed elf32_arm_vxworks_bed |
19049 | ||
906e58ca NC |
19050 | #undef bfd_elf32_bfd_link_hash_table_create |
19051 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
906e58ca NC |
19052 | #undef elf_backend_final_write_processing |
19053 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
19054 | #undef elf_backend_emit_relocs | |
19055 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs | |
4e7fd91e | 19056 | |
906e58ca | 19057 | #undef elf_backend_may_use_rel_p |
00a97672 | 19058 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 19059 | #undef elf_backend_may_use_rela_p |
00a97672 | 19060 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 19061 | #undef elf_backend_default_use_rela_p |
00a97672 | 19062 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 19063 | #undef elf_backend_want_plt_sym |
00a97672 | 19064 | #define elf_backend_want_plt_sym 1 |
906e58ca | 19065 | #undef ELF_MAXPAGESIZE |
00a97672 | 19066 | #define ELF_MAXPAGESIZE 0x1000 |
4e7fd91e PB |
19067 | |
19068 | #include "elf32-target.h" | |
19069 | ||
19070 | ||
21d799b5 NC |
19071 | /* Merge backend specific data from an object file to the output |
19072 | object file when linking. */ | |
19073 | ||
19074 | static bfd_boolean | |
19075 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
19076 | { | |
19077 | flagword out_flags; | |
19078 | flagword in_flags; | |
19079 | bfd_boolean flags_compatible = TRUE; | |
19080 | asection *sec; | |
19081 | ||
cc643b88 | 19082 | /* Check if we have the same endianness. */ |
21d799b5 NC |
19083 | if (! _bfd_generic_verify_endian_match (ibfd, obfd)) |
19084 | return FALSE; | |
19085 | ||
19086 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
19087 | return TRUE; | |
19088 | ||
19089 | if (!elf32_arm_merge_eabi_attributes (ibfd, obfd)) | |
19090 | return FALSE; | |
19091 | ||
19092 | /* The input BFD must have had its flags initialised. */ | |
19093 | /* The following seems bogus to me -- The flags are initialized in | |
19094 | the assembler but I don't think an elf_flags_init field is | |
19095 | written into the object. */ | |
19096 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
19097 | ||
19098 | in_flags = elf_elfheader (ibfd)->e_flags; | |
19099 | out_flags = elf_elfheader (obfd)->e_flags; | |
19100 | ||
19101 | /* In theory there is no reason why we couldn't handle this. However | |
19102 | in practice it isn't even close to working and there is no real | |
19103 | reason to want it. */ | |
19104 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
19105 | && !(ibfd->flags & DYNAMIC) | |
19106 | && (in_flags & EF_ARM_BE8)) | |
19107 | { | |
19108 | _bfd_error_handler (_("error: %B is already in final BE8 format"), | |
19109 | ibfd); | |
19110 | return FALSE; | |
19111 | } | |
19112 | ||
19113 | if (!elf_flags_init (obfd)) | |
19114 | { | |
19115 | /* If the input is the default architecture and had the default | |
19116 | flags then do not bother setting the flags for the output | |
19117 | architecture, instead allow future merges to do this. If no | |
19118 | future merges ever set these flags then they will retain their | |
99059e56 RM |
19119 | uninitialised values, which surprise surprise, correspond |
19120 | to the default values. */ | |
21d799b5 NC |
19121 | if (bfd_get_arch_info (ibfd)->the_default |
19122 | && elf_elfheader (ibfd)->e_flags == 0) | |
19123 | return TRUE; | |
19124 | ||
19125 | elf_flags_init (obfd) = TRUE; | |
19126 | elf_elfheader (obfd)->e_flags = in_flags; | |
19127 | ||
19128 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
19129 | && bfd_get_arch_info (obfd)->the_default) | |
19130 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
19131 | ||
19132 | return TRUE; | |
19133 | } | |
19134 | ||
19135 | /* Determine what should happen if the input ARM architecture | |
19136 | does not match the output ARM architecture. */ | |
19137 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
19138 | return FALSE; | |
19139 | ||
19140 | /* Identical flags must be compatible. */ | |
19141 | if (in_flags == out_flags) | |
19142 | return TRUE; | |
19143 | ||
19144 | /* Check to see if the input BFD actually contains any sections. If | |
19145 | not, its flags may not have been initialised either, but it | |
19146 | cannot actually cause any incompatiblity. Do not short-circuit | |
19147 | dynamic objects; their section list may be emptied by | |
19148 | elf_link_add_object_symbols. | |
19149 | ||
19150 | Also check to see if there are no code sections in the input. | |
19151 | In this case there is no need to check for code specific flags. | |
19152 | XXX - do we need to worry about floating-point format compatability | |
19153 | in data sections ? */ | |
19154 | if (!(ibfd->flags & DYNAMIC)) | |
19155 | { | |
19156 | bfd_boolean null_input_bfd = TRUE; | |
19157 | bfd_boolean only_data_sections = TRUE; | |
19158 | ||
19159 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
19160 | { | |
19161 | /* Ignore synthetic glue sections. */ | |
19162 | if (strcmp (sec->name, ".glue_7") | |
19163 | && strcmp (sec->name, ".glue_7t")) | |
19164 | { | |
19165 | if ((bfd_get_section_flags (ibfd, sec) | |
19166 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
19167 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
99059e56 | 19168 | only_data_sections = FALSE; |
21d799b5 NC |
19169 | |
19170 | null_input_bfd = FALSE; | |
19171 | break; | |
19172 | } | |
19173 | } | |
19174 | ||
19175 | if (null_input_bfd || only_data_sections) | |
19176 | return TRUE; | |
19177 | } | |
19178 | ||
19179 | /* Complain about various flag mismatches. */ | |
19180 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
19181 | EF_ARM_EABI_VERSION (out_flags))) | |
19182 | { | |
19183 | _bfd_error_handler | |
19184 | (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"), | |
19185 | ibfd, obfd, | |
19186 | (in_flags & EF_ARM_EABIMASK) >> 24, | |
19187 | (out_flags & EF_ARM_EABIMASK) >> 24); | |
19188 | return FALSE; | |
19189 | } | |
19190 | ||
19191 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
19192 | /* VxWorks libraries do not use these flags. */ | |
19193 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
19194 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
19195 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
19196 | { | |
19197 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
19198 | { | |
19199 | _bfd_error_handler | |
19200 | (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"), | |
19201 | ibfd, obfd, | |
19202 | in_flags & EF_ARM_APCS_26 ? 26 : 32, | |
19203 | out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
19204 | flags_compatible = FALSE; | |
19205 | } | |
19206 | ||
19207 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
19208 | { | |
19209 | if (in_flags & EF_ARM_APCS_FLOAT) | |
19210 | _bfd_error_handler | |
19211 | (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"), | |
19212 | ibfd, obfd); | |
19213 | else | |
19214 | _bfd_error_handler | |
19215 | (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"), | |
19216 | ibfd, obfd); | |
19217 | ||
19218 | flags_compatible = FALSE; | |
19219 | } | |
19220 | ||
19221 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
19222 | { | |
19223 | if (in_flags & EF_ARM_VFP_FLOAT) | |
19224 | _bfd_error_handler | |
19225 | (_("error: %B uses VFP instructions, whereas %B does not"), | |
19226 | ibfd, obfd); | |
19227 | else | |
19228 | _bfd_error_handler | |
19229 | (_("error: %B uses FPA instructions, whereas %B does not"), | |
19230 | ibfd, obfd); | |
19231 | ||
19232 | flags_compatible = FALSE; | |
19233 | } | |
19234 | ||
19235 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
19236 | { | |
19237 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
19238 | _bfd_error_handler | |
19239 | (_("error: %B uses Maverick instructions, whereas %B does not"), | |
19240 | ibfd, obfd); | |
19241 | else | |
19242 | _bfd_error_handler | |
19243 | (_("error: %B does not use Maverick instructions, whereas %B does"), | |
19244 | ibfd, obfd); | |
19245 | ||
19246 | flags_compatible = FALSE; | |
19247 | } | |
19248 | ||
19249 | #ifdef EF_ARM_SOFT_FLOAT | |
19250 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
19251 | { | |
19252 | /* We can allow interworking between code that is VFP format | |
19253 | layout, and uses either soft float or integer regs for | |
19254 | passing floating point arguments and results. We already | |
19255 | know that the APCS_FLOAT flags match; similarly for VFP | |
19256 | flags. */ | |
19257 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
19258 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
19259 | { | |
19260 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
19261 | _bfd_error_handler | |
19262 | (_("error: %B uses software FP, whereas %B uses hardware FP"), | |
19263 | ibfd, obfd); | |
19264 | else | |
19265 | _bfd_error_handler | |
19266 | (_("error: %B uses hardware FP, whereas %B uses software FP"), | |
19267 | ibfd, obfd); | |
19268 | ||
19269 | flags_compatible = FALSE; | |
19270 | } | |
19271 | } | |
19272 | #endif | |
19273 | ||
19274 | /* Interworking mismatch is only a warning. */ | |
19275 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
19276 | { | |
19277 | if (in_flags & EF_ARM_INTERWORK) | |
19278 | { | |
19279 | _bfd_error_handler | |
19280 | (_("Warning: %B supports interworking, whereas %B does not"), | |
19281 | ibfd, obfd); | |
19282 | } | |
19283 | else | |
19284 | { | |
19285 | _bfd_error_handler | |
19286 | (_("Warning: %B does not support interworking, whereas %B does"), | |
19287 | ibfd, obfd); | |
19288 | } | |
19289 | } | |
19290 | } | |
19291 | ||
19292 | return flags_compatible; | |
19293 | } | |
19294 | ||
19295 | ||
906e58ca | 19296 | /* Symbian OS Targets. */ |
7f266840 | 19297 | |
906e58ca | 19298 | #undef TARGET_LITTLE_SYM |
6d00b590 | 19299 | #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec |
906e58ca | 19300 | #undef TARGET_LITTLE_NAME |
7f266840 | 19301 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" |
906e58ca | 19302 | #undef TARGET_BIG_SYM |
6d00b590 | 19303 | #define TARGET_BIG_SYM arm_elf32_symbian_be_vec |
906e58ca | 19304 | #undef TARGET_BIG_NAME |
7f266840 DJ |
19305 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" |
19306 | ||
19307 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
19308 | appropriately for Symbian OS. */ | |
906e58ca | 19309 | |
7f266840 DJ |
19310 | static struct bfd_link_hash_table * |
19311 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) | |
19312 | { | |
19313 | struct bfd_link_hash_table *ret; | |
19314 | ||
19315 | ret = elf32_arm_link_hash_table_create (abfd); | |
19316 | if (ret) | |
19317 | { | |
19318 | struct elf32_arm_link_hash_table *htab | |
19319 | = (struct elf32_arm_link_hash_table *)ret; | |
19320 | /* There is no PLT header for Symbian OS. */ | |
19321 | htab->plt_header_size = 0; | |
95720a86 DJ |
19322 | /* The PLT entries are each one instruction and one word. */ |
19323 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); | |
7f266840 | 19324 | htab->symbian_p = 1; |
33bfe774 JB |
19325 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
19326 | htab->use_blx = 1; | |
67687978 | 19327 | htab->root.is_relocatable_executable = 1; |
7f266840 DJ |
19328 | } |
19329 | return ret; | |
906e58ca | 19330 | } |
7f266840 | 19331 | |
b35d266b | 19332 | static const struct bfd_elf_special_section |
551b43fd | 19333 | elf32_arm_symbian_special_sections[] = |
7f266840 | 19334 | { |
5cd3778d MM |
19335 | /* In a BPABI executable, the dynamic linking sections do not go in |
19336 | the loadable read-only segment. The post-linker may wish to | |
19337 | refer to these sections, but they are not part of the final | |
19338 | program image. */ | |
0112cd26 NC |
19339 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
19340 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, | |
19341 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, | |
19342 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, | |
19343 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, | |
5cd3778d MM |
19344 | /* These sections do not need to be writable as the SymbianOS |
19345 | postlinker will arrange things so that no dynamic relocation is | |
19346 | required. */ | |
0112cd26 NC |
19347 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
19348 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, | |
19349 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, | |
19350 | { NULL, 0, 0, 0, 0 } | |
7f266840 DJ |
19351 | }; |
19352 | ||
c3c76620 | 19353 | static void |
906e58ca | 19354 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
a4fd1a8e | 19355 | struct bfd_link_info *link_info) |
c3c76620 MM |
19356 | { |
19357 | /* BPABI objects are never loaded directly by an OS kernel; they are | |
19358 | processed by a postlinker first, into an OS-specific format. If | |
19359 | the D_PAGED bit is set on the file, BFD will align segments on | |
19360 | page boundaries, so that an OS can directly map the file. With | |
19361 | BPABI objects, that just results in wasted space. In addition, | |
19362 | because we clear the D_PAGED bit, map_sections_to_segments will | |
19363 | recognize that the program headers should not be mapped into any | |
19364 | loadable segment. */ | |
19365 | abfd->flags &= ~D_PAGED; | |
906e58ca | 19366 | elf32_arm_begin_write_processing (abfd, link_info); |
c3c76620 | 19367 | } |
7f266840 DJ |
19368 | |
19369 | static bfd_boolean | |
906e58ca | 19370 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
b294bdf8 | 19371 | struct bfd_link_info *info) |
7f266840 DJ |
19372 | { |
19373 | struct elf_segment_map *m; | |
19374 | asection *dynsec; | |
19375 | ||
7f266840 DJ |
19376 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
19377 | segment. However, because the .dynamic section is not marked | |
19378 | with SEC_LOAD, the generic ELF code will not create such a | |
19379 | segment. */ | |
19380 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); | |
19381 | if (dynsec) | |
19382 | { | |
12bd6957 | 19383 | for (m = elf_seg_map (abfd); m != NULL; m = m->next) |
8ded5a0f AM |
19384 | if (m->p_type == PT_DYNAMIC) |
19385 | break; | |
19386 | ||
19387 | if (m == NULL) | |
19388 | { | |
19389 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); | |
12bd6957 AM |
19390 | m->next = elf_seg_map (abfd); |
19391 | elf_seg_map (abfd) = m; | |
8ded5a0f | 19392 | } |
7f266840 DJ |
19393 | } |
19394 | ||
b294bdf8 MM |
19395 | /* Also call the generic arm routine. */ |
19396 | return elf32_arm_modify_segment_map (abfd, info); | |
7f266840 DJ |
19397 | } |
19398 | ||
95720a86 DJ |
19399 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
19400 | or (bfd_vma) -1 if it should not be included. */ | |
19401 | ||
19402 | static bfd_vma | |
19403 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, | |
19404 | const arelent *rel ATTRIBUTE_UNUSED) | |
19405 | { | |
19406 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; | |
19407 | } | |
19408 | ||
8029a119 | 19409 | #undef elf32_bed |
7f266840 DJ |
19410 | #define elf32_bed elf32_arm_symbian_bed |
19411 | ||
19412 | /* The dynamic sections are not allocated on SymbianOS; the postlinker | |
19413 | will process them and then discard them. */ | |
906e58ca | 19414 | #undef ELF_DYNAMIC_SEC_FLAGS |
7f266840 DJ |
19415 | #define ELF_DYNAMIC_SEC_FLAGS \ |
19416 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) | |
19417 | ||
00a97672 | 19418 | #undef elf_backend_emit_relocs |
c3c76620 | 19419 | |
906e58ca NC |
19420 | #undef bfd_elf32_bfd_link_hash_table_create |
19421 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create | |
19422 | #undef elf_backend_special_sections | |
19423 | #define elf_backend_special_sections elf32_arm_symbian_special_sections | |
19424 | #undef elf_backend_begin_write_processing | |
19425 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing | |
19426 | #undef elf_backend_final_write_processing | |
19427 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
19428 | ||
19429 | #undef elf_backend_modify_segment_map | |
7f266840 DJ |
19430 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
19431 | ||
19432 | /* There is no .got section for BPABI objects, and hence no header. */ | |
906e58ca | 19433 | #undef elf_backend_got_header_size |
7f266840 DJ |
19434 | #define elf_backend_got_header_size 0 |
19435 | ||
19436 | /* Similarly, there is no .got.plt section. */ | |
906e58ca | 19437 | #undef elf_backend_want_got_plt |
7f266840 DJ |
19438 | #define elf_backend_want_got_plt 0 |
19439 | ||
906e58ca | 19440 | #undef elf_backend_plt_sym_val |
95720a86 DJ |
19441 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
19442 | ||
906e58ca | 19443 | #undef elf_backend_may_use_rel_p |
00a97672 | 19444 | #define elf_backend_may_use_rel_p 1 |
906e58ca | 19445 | #undef elf_backend_may_use_rela_p |
00a97672 | 19446 | #define elf_backend_may_use_rela_p 0 |
906e58ca | 19447 | #undef elf_backend_default_use_rela_p |
00a97672 | 19448 | #define elf_backend_default_use_rela_p 0 |
906e58ca | 19449 | #undef elf_backend_want_plt_sym |
00a97672 | 19450 | #define elf_backend_want_plt_sym 0 |
906e58ca | 19451 | #undef ELF_MAXPAGESIZE |
00a97672 | 19452 | #define ELF_MAXPAGESIZE 0x8000 |
4e7fd91e | 19453 | |
7f266840 | 19454 | #include "elf32-target.h" |