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2010-05-10 Andrew Stubbs <ams@codesourcery.com>
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
f6ebfac0 3 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
6e6718a3 22#include "sysdep.h"
2468f9c9
PB		 23#include <limits.h>
24
3db64b00 25#include "bfd.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
00a97672 29#include "elf-vxworks.h"
ee065d83 30#include "elf/arm.h"
7f266840 31
00a97672
RS		 32/* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34#define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
36
37/* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39#define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
43
44/* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46#define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
50
51/* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53#define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
57
7f266840
DJ		 58#define elf_info_to_howto 0
59#define elf_info_to_howto_rel elf32_arm_info_to_howto
60
61#define ARM_ELF_ABI_VERSION 0
62#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
63
3e6b1042
DJ		 64static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
65 struct bfd_link_info *link_info,
66 asection *sec,
67 bfd_byte *contents);
68
7f266840
DJ		 69/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
71 in that slot. */
72
c19d1205 73static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 74{
8029a119 75 /* No relocation. */
7f266840
DJ		 76 HOWTO (R_ARM_NONE, /* type */
77 0, /* rightshift */
78 0, /* size (0 = byte, 1 = short, 2 = long) */
79 0, /* bitsize */
80 FALSE, /* pc_relative */
81 0, /* bitpos */
82 complain_overflow_dont,/* complain_on_overflow */
83 bfd_elf_generic_reloc, /* special_function */
84 "R_ARM_NONE", /* name */
85 FALSE, /* partial_inplace */
86 0, /* src_mask */
87 0, /* dst_mask */
88 FALSE), /* pcrel_offset */
89
90 HOWTO (R_ARM_PC24, /* type */
91 2, /* rightshift */
92 2, /* size (0 = byte, 1 = short, 2 = long) */
93 24, /* bitsize */
94 TRUE, /* pc_relative */
95 0, /* bitpos */
96 complain_overflow_signed,/* complain_on_overflow */
97 bfd_elf_generic_reloc, /* special_function */
98 "R_ARM_PC24", /* name */
99 FALSE, /* partial_inplace */
100 0x00ffffff, /* src_mask */
101 0x00ffffff, /* dst_mask */
102 TRUE), /* pcrel_offset */
103
104 /* 32 bit absolute */
105 HOWTO (R_ARM_ABS32, /* type */
106 0, /* rightshift */
107 2, /* size (0 = byte, 1 = short, 2 = long) */
108 32, /* bitsize */
109 FALSE, /* pc_relative */
110 0, /* bitpos */
111 complain_overflow_bitfield,/* complain_on_overflow */
112 bfd_elf_generic_reloc, /* special_function */
113 "R_ARM_ABS32", /* name */
114 FALSE, /* partial_inplace */
115 0xffffffff, /* src_mask */
116 0xffffffff, /* dst_mask */
117 FALSE), /* pcrel_offset */
118
119 /* standard 32bit pc-relative reloc */
120 HOWTO (R_ARM_REL32, /* type */
121 0, /* rightshift */
122 2, /* size (0 = byte, 1 = short, 2 = long) */
123 32, /* bitsize */
124 TRUE, /* pc_relative */
125 0, /* bitpos */
126 complain_overflow_bitfield,/* complain_on_overflow */
127 bfd_elf_generic_reloc, /* special_function */
128 "R_ARM_REL32", /* name */
129 FALSE, /* partial_inplace */
130 0xffffffff, /* src_mask */
131 0xffffffff, /* dst_mask */
132 TRUE), /* pcrel_offset */
133
c19d1205 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 135 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 136 0, /* rightshift */
137 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 138 32, /* bitsize */
139 TRUE, /* pc_relative */
7f266840 140 0, /* bitpos */
4962c51a 141 complain_overflow_dont,/* complain_on_overflow */
7f266840 142 bfd_elf_generic_reloc, /* special_function */
4962c51a 143 "R_ARM_LDR_PC_G0", /* name */
7f266840 144 FALSE, /* partial_inplace */
4962c51a
MS		 145 0xffffffff, /* src_mask */
146 0xffffffff, /* dst_mask */
147 TRUE), /* pcrel_offset */
7f266840
DJ		 148
149 /* 16 bit absolute */
150 HOWTO (R_ARM_ABS16, /* type */
151 0, /* rightshift */
152 1, /* size (0 = byte, 1 = short, 2 = long) */
153 16, /* bitsize */
154 FALSE, /* pc_relative */
155 0, /* bitpos */
156 complain_overflow_bitfield,/* complain_on_overflow */
157 bfd_elf_generic_reloc, /* special_function */
158 "R_ARM_ABS16", /* name */
159 FALSE, /* partial_inplace */
160 0x0000ffff, /* src_mask */
161 0x0000ffff, /* dst_mask */
162 FALSE), /* pcrel_offset */
163
164 /* 12 bit absolute */
165 HOWTO (R_ARM_ABS12, /* type */
166 0, /* rightshift */
167 2, /* size (0 = byte, 1 = short, 2 = long) */
168 12, /* bitsize */
169 FALSE, /* pc_relative */
170 0, /* bitpos */
171 complain_overflow_bitfield,/* complain_on_overflow */
172 bfd_elf_generic_reloc, /* special_function */
173 "R_ARM_ABS12", /* name */
174 FALSE, /* partial_inplace */
00a97672
RS		 175 0x00000fff, /* src_mask */
176 0x00000fff, /* dst_mask */
7f266840
DJ		 177 FALSE), /* pcrel_offset */
178
179 HOWTO (R_ARM_THM_ABS5, /* type */
180 6, /* rightshift */
181 1, /* size (0 = byte, 1 = short, 2 = long) */
182 5, /* bitsize */
183 FALSE, /* pc_relative */
184 0, /* bitpos */
185 complain_overflow_bitfield,/* complain_on_overflow */
186 bfd_elf_generic_reloc, /* special_function */
187 "R_ARM_THM_ABS5", /* name */
188 FALSE, /* partial_inplace */
189 0x000007e0, /* src_mask */
190 0x000007e0, /* dst_mask */
191 FALSE), /* pcrel_offset */
192
193 /* 8 bit absolute */
194 HOWTO (R_ARM_ABS8, /* type */
195 0, /* rightshift */
196 0, /* size (0 = byte, 1 = short, 2 = long) */
197 8, /* bitsize */
198 FALSE, /* pc_relative */
199 0, /* bitpos */
200 complain_overflow_bitfield,/* complain_on_overflow */
201 bfd_elf_generic_reloc, /* special_function */
202 "R_ARM_ABS8", /* name */
203 FALSE, /* partial_inplace */
204 0x000000ff, /* src_mask */
205 0x000000ff, /* dst_mask */
206 FALSE), /* pcrel_offset */
207
208 HOWTO (R_ARM_SBREL32, /* type */
209 0, /* rightshift */
210 2, /* size (0 = byte, 1 = short, 2 = long) */
211 32, /* bitsize */
212 FALSE, /* pc_relative */
213 0, /* bitpos */
214 complain_overflow_dont,/* complain_on_overflow */
215 bfd_elf_generic_reloc, /* special_function */
216 "R_ARM_SBREL32", /* name */
217 FALSE, /* partial_inplace */
218 0xffffffff, /* src_mask */
219 0xffffffff, /* dst_mask */
220 FALSE), /* pcrel_offset */
221
c19d1205 222 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 223 1, /* rightshift */
224 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 225 24, /* bitsize */
7f266840
DJ		 226 TRUE, /* pc_relative */
227 0, /* bitpos */
228 complain_overflow_signed,/* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
c19d1205 230 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 231 FALSE, /* partial_inplace */
232 0x07ff07ff, /* src_mask */
233 0x07ff07ff, /* dst_mask */
234 TRUE), /* pcrel_offset */
235
236 HOWTO (R_ARM_THM_PC8, /* type */
237 1, /* rightshift */
238 1, /* size (0 = byte, 1 = short, 2 = long) */
239 8, /* bitsize */
240 TRUE, /* pc_relative */
241 0, /* bitpos */
242 complain_overflow_signed,/* complain_on_overflow */
243 bfd_elf_generic_reloc, /* special_function */
244 "R_ARM_THM_PC8", /* name */
245 FALSE, /* partial_inplace */
246 0x000000ff, /* src_mask */
247 0x000000ff, /* dst_mask */
248 TRUE), /* pcrel_offset */
249
c19d1205 250 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 251 1, /* rightshift */
252 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 253 32, /* bitsize */
254 FALSE, /* pc_relative */
7f266840
DJ		 255 0, /* bitpos */
256 complain_overflow_signed,/* complain_on_overflow */
257 bfd_elf_generic_reloc, /* special_function */
c19d1205 258 "R_ARM_BREL_ADJ", /* name */
7f266840 259 FALSE, /* partial_inplace */
c19d1205
ZW		 260 0xffffffff, /* src_mask */
261 0xffffffff, /* dst_mask */
262 FALSE), /* pcrel_offset */
7f266840
DJ		 263
264 HOWTO (R_ARM_SWI24, /* type */
265 0, /* rightshift */
266 0, /* size (0 = byte, 1 = short, 2 = long) */
267 0, /* bitsize */
268 FALSE, /* pc_relative */
269 0, /* bitpos */
270 complain_overflow_signed,/* complain_on_overflow */
271 bfd_elf_generic_reloc, /* special_function */
272 "R_ARM_SWI24", /* name */
273 FALSE, /* partial_inplace */
274 0x00000000, /* src_mask */
275 0x00000000, /* dst_mask */
276 FALSE), /* pcrel_offset */
277
278 HOWTO (R_ARM_THM_SWI8, /* type */
279 0, /* rightshift */
280 0, /* size (0 = byte, 1 = short, 2 = long) */
281 0, /* bitsize */
282 FALSE, /* pc_relative */
283 0, /* bitpos */
284 complain_overflow_signed,/* complain_on_overflow */
285 bfd_elf_generic_reloc, /* special_function */
286 "R_ARM_SWI8", /* name */
287 FALSE, /* partial_inplace */
288 0x00000000, /* src_mask */
289 0x00000000, /* dst_mask */
290 FALSE), /* pcrel_offset */
291
292 /* BLX instruction for the ARM. */
293 HOWTO (R_ARM_XPC25, /* type */
294 2, /* rightshift */
295 2, /* size (0 = byte, 1 = short, 2 = long) */
296 25, /* bitsize */
297 TRUE, /* pc_relative */
298 0, /* bitpos */
299 complain_overflow_signed,/* complain_on_overflow */
300 bfd_elf_generic_reloc, /* special_function */
301 "R_ARM_XPC25", /* name */
302 FALSE, /* partial_inplace */
303 0x00ffffff, /* src_mask */
304 0x00ffffff, /* dst_mask */
305 TRUE), /* pcrel_offset */
306
307 /* BLX instruction for the Thumb. */
308 HOWTO (R_ARM_THM_XPC22, /* type */
309 2, /* rightshift */
310 2, /* size (0 = byte, 1 = short, 2 = long) */
311 22, /* bitsize */
312 TRUE, /* pc_relative */
313 0, /* bitpos */
314 complain_overflow_signed,/* complain_on_overflow */
315 bfd_elf_generic_reloc, /* special_function */
316 "R_ARM_THM_XPC22", /* name */
317 FALSE, /* partial_inplace */
318 0x07ff07ff, /* src_mask */
319 0x07ff07ff, /* dst_mask */
320 TRUE), /* pcrel_offset */
321
ba93b8ac 322 /* Dynamic TLS relocations. */
7f266840 323
ba93b8ac
DJ		 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
325 0, /* rightshift */
326 2, /* size (0 = byte, 1 = short, 2 = long) */
327 32, /* bitsize */
328 FALSE, /* pc_relative */
329 0, /* bitpos */
330 complain_overflow_bitfield,/* complain_on_overflow */
331 bfd_elf_generic_reloc, /* special_function */
332 "R_ARM_TLS_DTPMOD32", /* name */
333 TRUE, /* partial_inplace */
334 0xffffffff, /* src_mask */
335 0xffffffff, /* dst_mask */
336 FALSE), /* pcrel_offset */
7f266840 337
ba93b8ac
DJ		 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
339 0, /* rightshift */
340 2, /* size (0 = byte, 1 = short, 2 = long) */
341 32, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield,/* complain_on_overflow */
345 bfd_elf_generic_reloc, /* special_function */
346 "R_ARM_TLS_DTPOFF32", /* name */
347 TRUE, /* partial_inplace */
348 0xffffffff, /* src_mask */
349 0xffffffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
7f266840 351
ba93b8ac
DJ		 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */
353 0, /* rightshift */
354 2, /* size (0 = byte, 1 = short, 2 = long) */
355 32, /* bitsize */
356 FALSE, /* pc_relative */
357 0, /* bitpos */
358 complain_overflow_bitfield,/* complain_on_overflow */
359 bfd_elf_generic_reloc, /* special_function */
360 "R_ARM_TLS_TPOFF32", /* name */
361 TRUE, /* partial_inplace */
362 0xffffffff, /* src_mask */
363 0xffffffff, /* dst_mask */
364 FALSE), /* pcrel_offset */
7f266840
DJ		 365
366 /* Relocs used in ARM Linux */
367
368 HOWTO (R_ARM_COPY, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 32, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_ARM_COPY", /* name */
377 TRUE, /* partial_inplace */
378 0xffffffff, /* src_mask */
379 0xffffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_ARM_GLOB_DAT, /* type */
383 0, /* rightshift */
384 2, /* size (0 = byte, 1 = short, 2 = long) */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_ARM_GLOB_DAT", /* name */
391 TRUE, /* partial_inplace */
392 0xffffffff, /* src_mask */
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_ARM_JUMP_SLOT, /* type */
397 0, /* rightshift */
398 2, /* size (0 = byte, 1 = short, 2 = long) */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_ARM_JUMP_SLOT", /* name */
405 TRUE, /* partial_inplace */
406 0xffffffff, /* src_mask */
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_ARM_RELATIVE, /* type */
411 0, /* rightshift */
412 2, /* size (0 = byte, 1 = short, 2 = long) */
413 32, /* bitsize */
414 FALSE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_bitfield,/* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_ARM_RELATIVE", /* name */
419 TRUE, /* partial_inplace */
420 0xffffffff, /* src_mask */
421 0xffffffff, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
c19d1205 424 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 425 0, /* rightshift */
426 2, /* size (0 = byte, 1 = short, 2 = long) */
427 32, /* bitsize */
428 FALSE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_bitfield,/* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
c19d1205 432 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 433 TRUE, /* partial_inplace */
434 0xffffffff, /* src_mask */
435 0xffffffff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_ARM_GOTPC, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 32, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_bitfield,/* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_ARM_GOTPC", /* name */
447 TRUE, /* partial_inplace */
448 0xffffffff, /* src_mask */
449 0xffffffff, /* dst_mask */
450 TRUE), /* pcrel_offset */
451
452 HOWTO (R_ARM_GOT32, /* type */
453 0, /* rightshift */
454 2, /* size (0 = byte, 1 = short, 2 = long) */
455 32, /* bitsize */
456 FALSE, /* pc_relative */
457 0, /* bitpos */
458 complain_overflow_bitfield,/* complain_on_overflow */
459 bfd_elf_generic_reloc, /* special_function */
460 "R_ARM_GOT32", /* name */
461 TRUE, /* partial_inplace */
462 0xffffffff, /* src_mask */
463 0xffffffff, /* dst_mask */
464 FALSE), /* pcrel_offset */
465
466 HOWTO (R_ARM_PLT32, /* type */
467 2, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 469 24, /* bitsize */
7f266840
DJ		 470 TRUE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_bitfield,/* complain_on_overflow */
473 bfd_elf_generic_reloc, /* special_function */
474 "R_ARM_PLT32", /* name */
ce490eda 475 FALSE, /* partial_inplace */
7f266840
DJ		 476 0x00ffffff, /* src_mask */
477 0x00ffffff, /* dst_mask */
478 TRUE), /* pcrel_offset */
479
480 HOWTO (R_ARM_CALL, /* type */
481 2, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 24, /* bitsize */
484 TRUE, /* pc_relative */
485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 bfd_elf_generic_reloc, /* special_function */
488 "R_ARM_CALL", /* name */
489 FALSE, /* partial_inplace */
490 0x00ffffff, /* src_mask */
491 0x00ffffff, /* dst_mask */
492 TRUE), /* pcrel_offset */
493
494 HOWTO (R_ARM_JUMP24, /* type */
495 2, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 24, /* bitsize */
498 TRUE, /* pc_relative */
499 0, /* bitpos */
500 complain_overflow_signed,/* complain_on_overflow */
501 bfd_elf_generic_reloc, /* special_function */
502 "R_ARM_JUMP24", /* name */
503 FALSE, /* partial_inplace */
504 0x00ffffff, /* src_mask */
505 0x00ffffff, /* dst_mask */
506 TRUE), /* pcrel_offset */
507
c19d1205
ZW		 508 HOWTO (R_ARM_THM_JUMP24, /* type */
509 1, /* rightshift */
510 2, /* size (0 = byte, 1 = short, 2 = long) */
511 24, /* bitsize */
512 TRUE, /* pc_relative */
7f266840 513 0, /* bitpos */
c19d1205 514 complain_overflow_signed,/* complain_on_overflow */
7f266840 515 bfd_elf_generic_reloc, /* special_function */
c19d1205 516 "R_ARM_THM_JUMP24", /* name */
7f266840 517 FALSE, /* partial_inplace */
c19d1205
ZW		 518 0x07ff2fff, /* src_mask */
519 0x07ff2fff, /* dst_mask */
520 TRUE), /* pcrel_offset */
7f266840 521
c19d1205 522 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 523 0, /* rightshift */
c19d1205
ZW		 524 2, /* size (0 = byte, 1 = short, 2 = long) */
525 32, /* bitsize */
7f266840
DJ		 526 FALSE, /* pc_relative */
527 0, /* bitpos */
528 complain_overflow_dont,/* complain_on_overflow */
529 bfd_elf_generic_reloc, /* special_function */
c19d1205 530 "R_ARM_BASE_ABS", /* name */
7f266840 531 FALSE, /* partial_inplace */
c19d1205
ZW		 532 0xffffffff, /* src_mask */
533 0xffffffff, /* dst_mask */
7f266840
DJ		 534 FALSE), /* pcrel_offset */
535
536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
537 0, /* rightshift */
538 2, /* size (0 = byte, 1 = short, 2 = long) */
539 12, /* bitsize */
540 TRUE, /* pc_relative */
541 0, /* bitpos */
542 complain_overflow_dont,/* complain_on_overflow */
543 bfd_elf_generic_reloc, /* special_function */
544 "R_ARM_ALU_PCREL_7_0", /* name */
545 FALSE, /* partial_inplace */
546 0x00000fff, /* src_mask */
547 0x00000fff, /* dst_mask */
548 TRUE), /* pcrel_offset */
549
550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
551 0, /* rightshift */
552 2, /* size (0 = byte, 1 = short, 2 = long) */
553 12, /* bitsize */
554 TRUE, /* pc_relative */
555 8, /* bitpos */
556 complain_overflow_dont,/* complain_on_overflow */
557 bfd_elf_generic_reloc, /* special_function */
558 "R_ARM_ALU_PCREL_15_8",/* name */
559 FALSE, /* partial_inplace */
560 0x00000fff, /* src_mask */
561 0x00000fff, /* dst_mask */
562 TRUE), /* pcrel_offset */
563
564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
565 0, /* rightshift */
566 2, /* size (0 = byte, 1 = short, 2 = long) */
567 12, /* bitsize */
568 TRUE, /* pc_relative */
569 16, /* bitpos */
570 complain_overflow_dont,/* complain_on_overflow */
571 bfd_elf_generic_reloc, /* special_function */
572 "R_ARM_ALU_PCREL_23_15",/* name */
573 FALSE, /* partial_inplace */
574 0x00000fff, /* src_mask */
575 0x00000fff, /* dst_mask */
576 TRUE), /* pcrel_offset */
577
578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
579 0, /* rightshift */
580 2, /* size (0 = byte, 1 = short, 2 = long) */
581 12, /* bitsize */
582 FALSE, /* pc_relative */
583 0, /* bitpos */
584 complain_overflow_dont,/* complain_on_overflow */
585 bfd_elf_generic_reloc, /* special_function */
586 "R_ARM_LDR_SBREL_11_0",/* name */
587 FALSE, /* partial_inplace */
588 0x00000fff, /* src_mask */
589 0x00000fff, /* dst_mask */
590 FALSE), /* pcrel_offset */
591
592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
593 0, /* rightshift */
594 2, /* size (0 = byte, 1 = short, 2 = long) */
595 8, /* bitsize */
596 FALSE, /* pc_relative */
597 12, /* bitpos */
598 complain_overflow_dont,/* complain_on_overflow */
599 bfd_elf_generic_reloc, /* special_function */
600 "R_ARM_ALU_SBREL_19_12",/* name */
601 FALSE, /* partial_inplace */
602 0x000ff000, /* src_mask */
603 0x000ff000, /* dst_mask */
604 FALSE), /* pcrel_offset */
605
606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
607 0, /* rightshift */
608 2, /* size (0 = byte, 1 = short, 2 = long) */
609 8, /* bitsize */
610 FALSE, /* pc_relative */
611 20, /* bitpos */
612 complain_overflow_dont,/* complain_on_overflow */
613 bfd_elf_generic_reloc, /* special_function */
614 "R_ARM_ALU_SBREL_27_20",/* name */
615 FALSE, /* partial_inplace */
616 0x0ff00000, /* src_mask */
617 0x0ff00000, /* dst_mask */
618 FALSE), /* pcrel_offset */
619
620 HOWTO (R_ARM_TARGET1, /* type */
621 0, /* rightshift */
622 2, /* size (0 = byte, 1 = short, 2 = long) */
623 32, /* bitsize */
624 FALSE, /* pc_relative */
625 0, /* bitpos */
626 complain_overflow_dont,/* complain_on_overflow */
627 bfd_elf_generic_reloc, /* special_function */
628 "R_ARM_TARGET1", /* name */
629 FALSE, /* partial_inplace */
630 0xffffffff, /* src_mask */
631 0xffffffff, /* dst_mask */
632 FALSE), /* pcrel_offset */
633
634 HOWTO (R_ARM_ROSEGREL32, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_dont,/* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_ARM_ROSEGREL32", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 HOWTO (R_ARM_V4BX, /* type */
649 0, /* rightshift */
650 2, /* size (0 = byte, 1 = short, 2 = long) */
651 32, /* bitsize */
652 FALSE, /* pc_relative */
653 0, /* bitpos */
654 complain_overflow_dont,/* complain_on_overflow */
655 bfd_elf_generic_reloc, /* special_function */
656 "R_ARM_V4BX", /* name */
657 FALSE, /* partial_inplace */
658 0xffffffff, /* src_mask */
659 0xffffffff, /* dst_mask */
660 FALSE), /* pcrel_offset */
661
662 HOWTO (R_ARM_TARGET2, /* type */
663 0, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 32, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_signed,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_ARM_TARGET2", /* name */
671 FALSE, /* partial_inplace */
672 0xffffffff, /* src_mask */
673 0xffffffff, /* dst_mask */
674 TRUE), /* pcrel_offset */
675
676 HOWTO (R_ARM_PREL31, /* type */
677 0, /* rightshift */
678 2, /* size (0 = byte, 1 = short, 2 = long) */
679 31, /* bitsize */
680 TRUE, /* pc_relative */
681 0, /* bitpos */
682 complain_overflow_signed,/* complain_on_overflow */
683 bfd_elf_generic_reloc, /* special_function */
684 "R_ARM_PREL31", /* name */
685 FALSE, /* partial_inplace */
686 0x7fffffff, /* src_mask */
687 0x7fffffff, /* dst_mask */
688 TRUE), /* pcrel_offset */
c19d1205
ZW		 689
690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 16, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_ARM_MOVW_ABS_NC", /* name */
699 FALSE, /* partial_inplace */
39623e12
PB		 700 0x000f0fff, /* src_mask */
701 0x000f0fff, /* dst_mask */
c19d1205
ZW		 702 FALSE), /* pcrel_offset */
703
704 HOWTO (R_ARM_MOVT_ABS, /* type */
705 0, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 16, /* bitsize */
708 FALSE, /* pc_relative */
709 0, /* bitpos */
710 complain_overflow_bitfield,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_ARM_MOVT_ABS", /* name */
713 FALSE, /* partial_inplace */
39623e12
PB		 714 0x000f0fff, /* src_mask */
715 0x000f0fff, /* dst_mask */
c19d1205
ZW		 716 FALSE), /* pcrel_offset */
717
718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
721 16, /* bitsize */
722 TRUE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_dont,/* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
726 "R_ARM_MOVW_PREL_NC", /* name */
727 FALSE, /* partial_inplace */
39623e12
PB		 728 0x000f0fff, /* src_mask */
729 0x000f0fff, /* dst_mask */
c19d1205
ZW		 730 TRUE), /* pcrel_offset */
731
732 HOWTO (R_ARM_MOVT_PREL, /* type */
733 0, /* rightshift */
734 2, /* size (0 = byte, 1 = short, 2 = long) */
735 16, /* bitsize */
736 TRUE, /* pc_relative */
737 0, /* bitpos */
738 complain_overflow_bitfield,/* complain_on_overflow */
739 bfd_elf_generic_reloc, /* special_function */
740 "R_ARM_MOVT_PREL", /* name */
741 FALSE, /* partial_inplace */
39623e12
PB		 742 0x000f0fff, /* src_mask */
743 0x000f0fff, /* dst_mask */
c19d1205
ZW		 744 TRUE), /* pcrel_offset */
745
746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
747 0, /* rightshift */
748 2, /* size (0 = byte, 1 = short, 2 = long) */
749 16, /* bitsize */
750 FALSE, /* pc_relative */
751 0, /* bitpos */
752 complain_overflow_dont,/* complain_on_overflow */
753 bfd_elf_generic_reloc, /* special_function */
754 "R_ARM_THM_MOVW_ABS_NC",/* name */
755 FALSE, /* partial_inplace */
756 0x040f70ff, /* src_mask */
757 0x040f70ff, /* dst_mask */
758 FALSE), /* pcrel_offset */
759
760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
761 0, /* rightshift */
762 2, /* size (0 = byte, 1 = short, 2 = long) */
763 16, /* bitsize */
764 FALSE, /* pc_relative */
765 0, /* bitpos */
766 complain_overflow_bitfield,/* complain_on_overflow */
767 bfd_elf_generic_reloc, /* special_function */
768 "R_ARM_THM_MOVT_ABS", /* name */
769 FALSE, /* partial_inplace */
770 0x040f70ff, /* src_mask */
771 0x040f70ff, /* dst_mask */
772 FALSE), /* pcrel_offset */
773
774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
775 0, /* rightshift */
776 2, /* size (0 = byte, 1 = short, 2 = long) */
777 16, /* bitsize */
778 TRUE, /* pc_relative */
779 0, /* bitpos */
780 complain_overflow_dont,/* complain_on_overflow */
781 bfd_elf_generic_reloc, /* special_function */
782 "R_ARM_THM_MOVW_PREL_NC",/* name */
783 FALSE, /* partial_inplace */
784 0x040f70ff, /* src_mask */
785 0x040f70ff, /* dst_mask */
786 TRUE), /* pcrel_offset */
787
788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
789 0, /* rightshift */
790 2, /* size (0 = byte, 1 = short, 2 = long) */
791 16, /* bitsize */
792 TRUE, /* pc_relative */
793 0, /* bitpos */
794 complain_overflow_bitfield,/* complain_on_overflow */
795 bfd_elf_generic_reloc, /* special_function */
796 "R_ARM_THM_MOVT_PREL", /* name */
797 FALSE, /* partial_inplace */
798 0x040f70ff, /* src_mask */
799 0x040f70ff, /* dst_mask */
800 TRUE), /* pcrel_offset */
801
802 HOWTO (R_ARM_THM_JUMP19, /* type */
803 1, /* rightshift */
804 2, /* size (0 = byte, 1 = short, 2 = long) */
805 19, /* bitsize */
806 TRUE, /* pc_relative */
807 0, /* bitpos */
808 complain_overflow_signed,/* complain_on_overflow */
809 bfd_elf_generic_reloc, /* special_function */
810 "R_ARM_THM_JUMP19", /* name */
811 FALSE, /* partial_inplace */
812 0x043f2fff, /* src_mask */
813 0x043f2fff, /* dst_mask */
814 TRUE), /* pcrel_offset */
815
816 HOWTO (R_ARM_THM_JUMP6, /* type */
817 1, /* rightshift */
818 1, /* size (0 = byte, 1 = short, 2 = long) */
819 6, /* bitsize */
820 TRUE, /* pc_relative */
821 0, /* bitpos */
822 complain_overflow_unsigned,/* complain_on_overflow */
823 bfd_elf_generic_reloc, /* special_function */
824 "R_ARM_THM_JUMP6", /* name */
825 FALSE, /* partial_inplace */
826 0x02f8, /* src_mask */
827 0x02f8, /* dst_mask */
828 TRUE), /* pcrel_offset */
829
830 /* These are declared as 13-bit signed relocations because we can
831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
832 versa. */
833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
834 0, /* rightshift */
835 2, /* size (0 = byte, 1 = short, 2 = long) */
836 13, /* bitsize */
837 TRUE, /* pc_relative */
838 0, /* bitpos */
2cab6cc3 839 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 840 bfd_elf_generic_reloc, /* special_function */
841 "R_ARM_THM_ALU_PREL_11_0",/* name */
842 FALSE, /* partial_inplace */
2cab6cc3
MS		 843 0xffffffff, /* src_mask */
844 0xffffffff, /* dst_mask */
c19d1205
ZW		 845 TRUE), /* pcrel_offset */
846
847 HOWTO (R_ARM_THM_PC12, /* type */
848 0, /* rightshift */
849 2, /* size (0 = byte, 1 = short, 2 = long) */
850 13, /* bitsize */
851 TRUE, /* pc_relative */
852 0, /* bitpos */
2cab6cc3 853 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 854 bfd_elf_generic_reloc, /* special_function */
855 "R_ARM_THM_PC12", /* name */
856 FALSE, /* partial_inplace */
2cab6cc3
MS		 857 0xffffffff, /* src_mask */
858 0xffffffff, /* dst_mask */
c19d1205
ZW		 859 TRUE), /* pcrel_offset */
860
861 HOWTO (R_ARM_ABS32_NOI, /* type */
862 0, /* rightshift */
863 2, /* size (0 = byte, 1 = short, 2 = long) */
864 32, /* bitsize */
865 FALSE, /* pc_relative */
866 0, /* bitpos */
867 complain_overflow_dont,/* complain_on_overflow */
868 bfd_elf_generic_reloc, /* special_function */
869 "R_ARM_ABS32_NOI", /* name */
870 FALSE, /* partial_inplace */
871 0xffffffff, /* src_mask */
872 0xffffffff, /* dst_mask */
873 FALSE), /* pcrel_offset */
874
875 HOWTO (R_ARM_REL32_NOI, /* type */
876 0, /* rightshift */
877 2, /* size (0 = byte, 1 = short, 2 = long) */
878 32, /* bitsize */
879 TRUE, /* pc_relative */
880 0, /* bitpos */
881 complain_overflow_dont,/* complain_on_overflow */
882 bfd_elf_generic_reloc, /* special_function */
883 "R_ARM_REL32_NOI", /* name */
884 FALSE, /* partial_inplace */
885 0xffffffff, /* src_mask */
886 0xffffffff, /* dst_mask */
887 FALSE), /* pcrel_offset */
7f266840 888
4962c51a
MS		 889 /* Group relocations. */
890
891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 32, /* bitsize */
895 TRUE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_dont,/* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_ARM_ALU_PC_G0_NC", /* name */
900 FALSE, /* partial_inplace */
901 0xffffffff, /* src_mask */
902 0xffffffff, /* dst_mask */
903 TRUE), /* pcrel_offset */
904
905 HOWTO (R_ARM_ALU_PC_G0, /* type */
906 0, /* rightshift */
907 2, /* size (0 = byte, 1 = short, 2 = long) */
908 32, /* bitsize */
909 TRUE, /* pc_relative */
910 0, /* bitpos */
911 complain_overflow_dont,/* complain_on_overflow */
912 bfd_elf_generic_reloc, /* special_function */
913 "R_ARM_ALU_PC_G0", /* name */
914 FALSE, /* partial_inplace */
915 0xffffffff, /* src_mask */
916 0xffffffff, /* dst_mask */
917 TRUE), /* pcrel_offset */
918
919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
920 0, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 32, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont,/* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 "R_ARM_ALU_PC_G1_NC", /* name */
928 FALSE, /* partial_inplace */
929 0xffffffff, /* src_mask */
930 0xffffffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
933 HOWTO (R_ARM_ALU_PC_G1, /* type */
934 0, /* rightshift */
935 2, /* size (0 = byte, 1 = short, 2 = long) */
936 32, /* bitsize */
937 TRUE, /* pc_relative */
938 0, /* bitpos */
939 complain_overflow_dont,/* complain_on_overflow */
940 bfd_elf_generic_reloc, /* special_function */
941 "R_ARM_ALU_PC_G1", /* name */
942 FALSE, /* partial_inplace */
943 0xffffffff, /* src_mask */
944 0xffffffff, /* dst_mask */
945 TRUE), /* pcrel_offset */
946
947 HOWTO (R_ARM_ALU_PC_G2, /* type */
948 0, /* rightshift */
949 2, /* size (0 = byte, 1 = short, 2 = long) */
950 32, /* bitsize */
951 TRUE, /* pc_relative */
952 0, /* bitpos */
953 complain_overflow_dont,/* complain_on_overflow */
954 bfd_elf_generic_reloc, /* special_function */
955 "R_ARM_ALU_PC_G2", /* name */
956 FALSE, /* partial_inplace */
957 0xffffffff, /* src_mask */
958 0xffffffff, /* dst_mask */
959 TRUE), /* pcrel_offset */
960
961 HOWTO (R_ARM_LDR_PC_G1, /* type */
962 0, /* rightshift */
963 2, /* size (0 = byte, 1 = short, 2 = long) */
964 32, /* bitsize */
965 TRUE, /* pc_relative */
966 0, /* bitpos */
967 complain_overflow_dont,/* complain_on_overflow */
968 bfd_elf_generic_reloc, /* special_function */
969 "R_ARM_LDR_PC_G1", /* name */
970 FALSE, /* partial_inplace */
971 0xffffffff, /* src_mask */
972 0xffffffff, /* dst_mask */
973 TRUE), /* pcrel_offset */
974
975 HOWTO (R_ARM_LDR_PC_G2, /* type */
976 0, /* rightshift */
977 2, /* size (0 = byte, 1 = short, 2 = long) */
978 32, /* bitsize */
979 TRUE, /* pc_relative */
980 0, /* bitpos */
981 complain_overflow_dont,/* complain_on_overflow */
982 bfd_elf_generic_reloc, /* special_function */
983 "R_ARM_LDR_PC_G2", /* name */
984 FALSE, /* partial_inplace */
985 0xffffffff, /* src_mask */
986 0xffffffff, /* dst_mask */
987 TRUE), /* pcrel_offset */
988
989 HOWTO (R_ARM_LDRS_PC_G0, /* type */
990 0, /* rightshift */
991 2, /* size (0 = byte, 1 = short, 2 = long) */
992 32, /* bitsize */
993 TRUE, /* pc_relative */
994 0, /* bitpos */
995 complain_overflow_dont,/* complain_on_overflow */
996 bfd_elf_generic_reloc, /* special_function */
997 "R_ARM_LDRS_PC_G0", /* name */
998 FALSE, /* partial_inplace */
999 0xffffffff, /* src_mask */
1000 0xffffffff, /* dst_mask */
1001 TRUE), /* pcrel_offset */
1002
1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1004 0, /* rightshift */
1005 2, /* size (0 = byte, 1 = short, 2 = long) */
1006 32, /* bitsize */
1007 TRUE, /* pc_relative */
1008 0, /* bitpos */
1009 complain_overflow_dont,/* complain_on_overflow */
1010 bfd_elf_generic_reloc, /* special_function */
1011 "R_ARM_LDRS_PC_G1", /* name */
1012 FALSE, /* partial_inplace */
1013 0xffffffff, /* src_mask */
1014 0xffffffff, /* dst_mask */
1015 TRUE), /* pcrel_offset */
1016
1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1018 0, /* rightshift */
1019 2, /* size (0 = byte, 1 = short, 2 = long) */
1020 32, /* bitsize */
1021 TRUE, /* pc_relative */
1022 0, /* bitpos */
1023 complain_overflow_dont,/* complain_on_overflow */
1024 bfd_elf_generic_reloc, /* special_function */
1025 "R_ARM_LDRS_PC_G2", /* name */
1026 FALSE, /* partial_inplace */
1027 0xffffffff, /* src_mask */
1028 0xffffffff, /* dst_mask */
1029 TRUE), /* pcrel_offset */
1030
1031 HOWTO (R_ARM_LDC_PC_G0, /* type */
1032 0, /* rightshift */
1033 2, /* size (0 = byte, 1 = short, 2 = long) */
1034 32, /* bitsize */
1035 TRUE, /* pc_relative */
1036 0, /* bitpos */
1037 complain_overflow_dont,/* complain_on_overflow */
1038 bfd_elf_generic_reloc, /* special_function */
1039 "R_ARM_LDC_PC_G0", /* name */
1040 FALSE, /* partial_inplace */
1041 0xffffffff, /* src_mask */
1042 0xffffffff, /* dst_mask */
1043 TRUE), /* pcrel_offset */
1044
1045 HOWTO (R_ARM_LDC_PC_G1, /* type */
1046 0, /* rightshift */
1047 2, /* size (0 = byte, 1 = short, 2 = long) */
1048 32, /* bitsize */
1049 TRUE, /* pc_relative */
1050 0, /* bitpos */
1051 complain_overflow_dont,/* complain_on_overflow */
1052 bfd_elf_generic_reloc, /* special_function */
1053 "R_ARM_LDC_PC_G1", /* name */
1054 FALSE, /* partial_inplace */
1055 0xffffffff, /* src_mask */
1056 0xffffffff, /* dst_mask */
1057 TRUE), /* pcrel_offset */
1058
1059 HOWTO (R_ARM_LDC_PC_G2, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 32, /* bitsize */
1063 TRUE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont,/* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_ARM_LDC_PC_G2", /* name */
1068 FALSE, /* partial_inplace */
1069 0xffffffff, /* src_mask */
1070 0xffffffff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1074 0, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 32, /* bitsize */
1077 TRUE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_ARM_ALU_SB_G0_NC", /* name */
1082 FALSE, /* partial_inplace */
1083 0xffffffff, /* src_mask */
1084 0xffffffff, /* dst_mask */
1085 TRUE), /* pcrel_offset */
1086
1087 HOWTO (R_ARM_ALU_SB_G0, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 TRUE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 bfd_elf_generic_reloc, /* special_function */
1095 "R_ARM_ALU_SB_G0", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 TRUE), /* pcrel_offset */
1100
1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1102 0, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 32, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_dont,/* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 "R_ARM_ALU_SB_G1_NC", /* name */
1110 FALSE, /* partial_inplace */
1111 0xffffffff, /* src_mask */
1112 0xffffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 HOWTO (R_ARM_ALU_SB_G1, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 TRUE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 bfd_elf_generic_reloc, /* special_function */
1123 "R_ARM_ALU_SB_G1", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 TRUE), /* pcrel_offset */
1128
1129 HOWTO (R_ARM_ALU_SB_G2, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
1133 TRUE, /* pc_relative */
1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 bfd_elf_generic_reloc, /* special_function */
1137 "R_ARM_ALU_SB_G2", /* name */
1138 FALSE, /* partial_inplace */
1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
1141 TRUE), /* pcrel_offset */
1142
1143 HOWTO (R_ARM_LDR_SB_G0, /* type */
1144 0, /* rightshift */
1145 2, /* size (0 = byte, 1 = short, 2 = long) */
1146 32, /* bitsize */
1147 TRUE, /* pc_relative */
1148 0, /* bitpos */
1149 complain_overflow_dont,/* complain_on_overflow */
1150 bfd_elf_generic_reloc, /* special_function */
1151 "R_ARM_LDR_SB_G0", /* name */
1152 FALSE, /* partial_inplace */
1153 0xffffffff, /* src_mask */
1154 0xffffffff, /* dst_mask */
1155 TRUE), /* pcrel_offset */
1156
1157 HOWTO (R_ARM_LDR_SB_G1, /* type */
1158 0, /* rightshift */
1159 2, /* size (0 = byte, 1 = short, 2 = long) */
1160 32, /* bitsize */
1161 TRUE, /* pc_relative */
1162 0, /* bitpos */
1163 complain_overflow_dont,/* complain_on_overflow */
1164 bfd_elf_generic_reloc, /* special_function */
1165 "R_ARM_LDR_SB_G1", /* name */
1166 FALSE, /* partial_inplace */
1167 0xffffffff, /* src_mask */
1168 0xffffffff, /* dst_mask */
1169 TRUE), /* pcrel_offset */
1170
1171 HOWTO (R_ARM_LDR_SB_G2, /* type */
1172 0, /* rightshift */
1173 2, /* size (0 = byte, 1 = short, 2 = long) */
1174 32, /* bitsize */
1175 TRUE, /* pc_relative */
1176 0, /* bitpos */
1177 complain_overflow_dont,/* complain_on_overflow */
1178 bfd_elf_generic_reloc, /* special_function */
1179 "R_ARM_LDR_SB_G2", /* name */
1180 FALSE, /* partial_inplace */
1181 0xffffffff, /* src_mask */
1182 0xffffffff, /* dst_mask */
1183 TRUE), /* pcrel_offset */
1184
1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1186 0, /* rightshift */
1187 2, /* size (0 = byte, 1 = short, 2 = long) */
1188 32, /* bitsize */
1189 TRUE, /* pc_relative */
1190 0, /* bitpos */
1191 complain_overflow_dont,/* complain_on_overflow */
1192 bfd_elf_generic_reloc, /* special_function */
1193 "R_ARM_LDRS_SB_G0", /* name */
1194 FALSE, /* partial_inplace */
1195 0xffffffff, /* src_mask */
1196 0xffffffff, /* dst_mask */
1197 TRUE), /* pcrel_offset */
1198
1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1200 0, /* rightshift */
1201 2, /* size (0 = byte, 1 = short, 2 = long) */
1202 32, /* bitsize */
1203 TRUE, /* pc_relative */
1204 0, /* bitpos */
1205 complain_overflow_dont,/* complain_on_overflow */
1206 bfd_elf_generic_reloc, /* special_function */
1207 "R_ARM_LDRS_SB_G1", /* name */
1208 FALSE, /* partial_inplace */
1209 0xffffffff, /* src_mask */
1210 0xffffffff, /* dst_mask */
1211 TRUE), /* pcrel_offset */
1212
1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1214 0, /* rightshift */
1215 2, /* size (0 = byte, 1 = short, 2 = long) */
1216 32, /* bitsize */
1217 TRUE, /* pc_relative */
1218 0, /* bitpos */
1219 complain_overflow_dont,/* complain_on_overflow */
1220 bfd_elf_generic_reloc, /* special_function */
1221 "R_ARM_LDRS_SB_G2", /* name */
1222 FALSE, /* partial_inplace */
1223 0xffffffff, /* src_mask */
1224 0xffffffff, /* dst_mask */
1225 TRUE), /* pcrel_offset */
1226
1227 HOWTO (R_ARM_LDC_SB_G0, /* type */
1228 0, /* rightshift */
1229 2, /* size (0 = byte, 1 = short, 2 = long) */
1230 32, /* bitsize */
1231 TRUE, /* pc_relative */
1232 0, /* bitpos */
1233 complain_overflow_dont,/* complain_on_overflow */
1234 bfd_elf_generic_reloc, /* special_function */
1235 "R_ARM_LDC_SB_G0", /* name */
1236 FALSE, /* partial_inplace */
1237 0xffffffff, /* src_mask */
1238 0xffffffff, /* dst_mask */
1239 TRUE), /* pcrel_offset */
1240
1241 HOWTO (R_ARM_LDC_SB_G1, /* type */
1242 0, /* rightshift */
1243 2, /* size (0 = byte, 1 = short, 2 = long) */
1244 32, /* bitsize */
1245 TRUE, /* pc_relative */
1246 0, /* bitpos */
1247 complain_overflow_dont,/* complain_on_overflow */
1248 bfd_elf_generic_reloc, /* special_function */
1249 "R_ARM_LDC_SB_G1", /* name */
1250 FALSE, /* partial_inplace */
1251 0xffffffff, /* src_mask */
1252 0xffffffff, /* dst_mask */
1253 TRUE), /* pcrel_offset */
1254
1255 HOWTO (R_ARM_LDC_SB_G2, /* type */
1256 0, /* rightshift */
1257 2, /* size (0 = byte, 1 = short, 2 = long) */
1258 32, /* bitsize */
1259 TRUE, /* pc_relative */
1260 0, /* bitpos */
1261 complain_overflow_dont,/* complain_on_overflow */
1262 bfd_elf_generic_reloc, /* special_function */
1263 "R_ARM_LDC_SB_G2", /* name */
1264 FALSE, /* partial_inplace */
1265 0xffffffff, /* src_mask */
1266 0xffffffff, /* dst_mask */
1267 TRUE), /* pcrel_offset */
1268
1269 /* End of group relocations. */
c19d1205 1270
c19d1205
ZW		 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1272 0, /* rightshift */
1273 2, /* size (0 = byte, 1 = short, 2 = long) */
1274 16, /* bitsize */
1275 FALSE, /* pc_relative */
1276 0, /* bitpos */
1277 complain_overflow_dont,/* complain_on_overflow */
1278 bfd_elf_generic_reloc, /* special_function */
1279 "R_ARM_MOVW_BREL_NC", /* name */
1280 FALSE, /* partial_inplace */
1281 0x0000ffff, /* src_mask */
1282 0x0000ffff, /* dst_mask */
1283 FALSE), /* pcrel_offset */
1284
1285 HOWTO (R_ARM_MOVT_BREL, /* type */
1286 0, /* rightshift */
1287 2, /* size (0 = byte, 1 = short, 2 = long) */
1288 16, /* bitsize */
1289 FALSE, /* pc_relative */
1290 0, /* bitpos */
1291 complain_overflow_bitfield,/* complain_on_overflow */
1292 bfd_elf_generic_reloc, /* special_function */
1293 "R_ARM_MOVT_BREL", /* name */
1294 FALSE, /* partial_inplace */
1295 0x0000ffff, /* src_mask */
1296 0x0000ffff, /* dst_mask */
1297 FALSE), /* pcrel_offset */
1298
1299 HOWTO (R_ARM_MOVW_BREL, /* type */
1300 0, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_dont,/* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 "R_ARM_MOVW_BREL", /* name */
1308 FALSE, /* partial_inplace */
1309 0x0000ffff, /* src_mask */
1310 0x0000ffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 16, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_ARM_THM_MOVW_BREL_NC",/* name */
1322 FALSE, /* partial_inplace */
1323 0x040f70ff, /* src_mask */
1324 0x040f70ff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1328 0, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 16, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_bitfield,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_ARM_THM_MOVT_BREL", /* name */
1336 FALSE, /* partial_inplace */
1337 0x040f70ff, /* src_mask */
1338 0x040f70ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340
1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 16, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_ARM_THM_MOVW_BREL", /* name */
1350 FALSE, /* partial_inplace */
1351 0x040f70ff, /* src_mask */
1352 0x040f70ff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354
8029a119 1355 EMPTY_HOWTO (90), /* Unallocated. */
c19d1205
ZW		 1356 EMPTY_HOWTO (91),
1357 EMPTY_HOWTO (92),
1358 EMPTY_HOWTO (93),
1359
1360 HOWTO (R_ARM_PLT32_ABS, /* type */
1361 0, /* rightshift */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 32, /* bitsize */
1364 FALSE, /* pc_relative */
1365 0, /* bitpos */
1366 complain_overflow_dont,/* complain_on_overflow */
1367 bfd_elf_generic_reloc, /* special_function */
1368 "R_ARM_PLT32_ABS", /* name */
1369 FALSE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1373
1374 HOWTO (R_ARM_GOT_ABS, /* type */
1375 0, /* rightshift */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 32, /* bitsize */
1378 FALSE, /* pc_relative */
1379 0, /* bitpos */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_GOT_ABS", /* name */
1383 FALSE, /* partial_inplace */
1384 0xffffffff, /* src_mask */
1385 0xffffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1387
1388 HOWTO (R_ARM_GOT_PREL, /* type */
1389 0, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 32, /* bitsize */
1392 TRUE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont, /* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_GOT_PREL", /* name */
1397 FALSE, /* partial_inplace */
1398 0xffffffff, /* src_mask */
1399 0xffffffff, /* dst_mask */
1400 TRUE), /* pcrel_offset */
1401
1402 HOWTO (R_ARM_GOT_BREL12, /* type */
1403 0, /* rightshift */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 12, /* bitsize */
1406 FALSE, /* pc_relative */
1407 0, /* bitpos */
1408 complain_overflow_bitfield,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_GOT_BREL12", /* name */
1411 FALSE, /* partial_inplace */
1412 0x00000fff, /* src_mask */
1413 0x00000fff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1415
1416 HOWTO (R_ARM_GOTOFF12, /* type */
1417 0, /* rightshift */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 12, /* bitsize */
1420 FALSE, /* pc_relative */
1421 0, /* bitpos */
1422 complain_overflow_bitfield,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_GOTOFF12", /* name */
1425 FALSE, /* partial_inplace */
1426 0x00000fff, /* src_mask */
1427 0x00000fff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1429
1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1431
1432 /* GNU extension to record C++ vtable member usage */
1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1434 0, /* rightshift */
1435 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1436 0, /* bitsize */
ba93b8ac
DJ		 1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
c19d1205
ZW		 1439 complain_overflow_dont, /* complain_on_overflow */
1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1441 "R_ARM_GNU_VTENTRY", /* name */
1442 FALSE, /* partial_inplace */
1443 0, /* src_mask */
1444 0, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446
1447 /* GNU extension to record C++ vtable hierarchy */
1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1449 0, /* rightshift */
1450 2, /* size (0 = byte, 1 = short, 2 = long) */
1451 0, /* bitsize */
1452 FALSE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_dont, /* complain_on_overflow */
1455 NULL, /* special_function */
1456 "R_ARM_GNU_VTINHERIT", /* name */
1457 FALSE, /* partial_inplace */
1458 0, /* src_mask */
1459 0, /* dst_mask */
1460 FALSE), /* pcrel_offset */
1461
1462 HOWTO (R_ARM_THM_JUMP11, /* type */
1463 1, /* rightshift */
1464 1, /* size (0 = byte, 1 = short, 2 = long) */
1465 11, /* bitsize */
1466 TRUE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_signed, /* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_ARM_THM_JUMP11", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000007ff, /* src_mask */
1473 0x000007ff, /* dst_mask */
1474 TRUE), /* pcrel_offset */
1475
1476 HOWTO (R_ARM_THM_JUMP8, /* type */
1477 1, /* rightshift */
1478 1, /* size (0 = byte, 1 = short, 2 = long) */
1479 8, /* bitsize */
1480 TRUE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_signed, /* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_ARM_THM_JUMP8", /* name */
1485 FALSE, /* partial_inplace */
1486 0x000000ff, /* src_mask */
1487 0x000000ff, /* dst_mask */
1488 TRUE), /* pcrel_offset */
ba93b8ac 1489
c19d1205
ZW		 1490 /* TLS relocations */
1491 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 32, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1498 NULL, /* special_function */
1499 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1500 TRUE, /* partial_inplace */
1501 0xffffffff, /* src_mask */
1502 0xffffffff, /* dst_mask */
c19d1205 1503 FALSE), /* pcrel_offset */
ba93b8ac 1504
ba93b8ac
DJ		 1505 HOWTO (R_ARM_TLS_LDM32, /* type */
1506 0, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 32, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_bitfield,/* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 "R_ARM_TLS_LDM32", /* name */
1514 TRUE, /* partial_inplace */
1515 0xffffffff, /* src_mask */
1516 0xffffffff, /* dst_mask */
c19d1205 1517 FALSE), /* pcrel_offset */
ba93b8ac 1518
c19d1205 1519 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1520 0, /* rightshift */
1521 2, /* size (0 = byte, 1 = short, 2 = long) */
1522 32, /* bitsize */
1523 FALSE, /* pc_relative */
1524 0, /* bitpos */
1525 complain_overflow_bitfield,/* complain_on_overflow */
1526 bfd_elf_generic_reloc, /* special_function */
c19d1205 1527 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1528 TRUE, /* partial_inplace */
1529 0xffffffff, /* src_mask */
1530 0xffffffff, /* dst_mask */
c19d1205 1531 FALSE), /* pcrel_offset */
ba93b8ac 1532
ba93b8ac
DJ		 1533 HOWTO (R_ARM_TLS_IE32, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 32, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_bitfield,/* complain_on_overflow */
1540 NULL, /* special_function */
1541 "R_ARM_TLS_IE32", /* name */
1542 TRUE, /* partial_inplace */
1543 0xffffffff, /* src_mask */
1544 0xffffffff, /* dst_mask */
c19d1205 1545 FALSE), /* pcrel_offset */
7f266840 1546
c19d1205 1547 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1550 32, /* bitsize */
7f266840
DJ		 1551 FALSE, /* pc_relative */
1552 0, /* bitpos */
c19d1205
ZW		 1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_ARM_TLS_LE32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
7f266840 1560
c19d1205
ZW		 1561 HOWTO (R_ARM_TLS_LDO12, /* type */
1562 0, /* rightshift */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 12, /* bitsize */
1565 FALSE, /* pc_relative */
7f266840 1566 0, /* bitpos */
c19d1205 1567 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1568 bfd_elf_generic_reloc, /* special_function */
c19d1205 1569 "R_ARM_TLS_LDO12", /* name */
7f266840 1570 FALSE, /* partial_inplace */
c19d1205
ZW		 1571 0x00000fff, /* src_mask */
1572 0x00000fff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
7f266840 1574
c19d1205
ZW		 1575 HOWTO (R_ARM_TLS_LE12, /* type */
1576 0, /* rightshift */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 12, /* bitsize */
1579 FALSE, /* pc_relative */
7f266840 1580 0, /* bitpos */
c19d1205 1581 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1582 bfd_elf_generic_reloc, /* special_function */
c19d1205 1583 "R_ARM_TLS_LE12", /* name */
7f266840 1584 FALSE, /* partial_inplace */
c19d1205
ZW		 1585 0x00000fff, /* src_mask */
1586 0x00000fff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
7f266840 1588
c19d1205 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1590 0, /* rightshift */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1592 12, /* bitsize */
1593 FALSE, /* pc_relative */
7f266840 1594 0, /* bitpos */
c19d1205 1595 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1596 bfd_elf_generic_reloc, /* special_function */
c19d1205 1597 "R_ARM_TLS_IE12GP", /* name */
7f266840 1598 FALSE, /* partial_inplace */
c19d1205
ZW		 1599 0x00000fff, /* src_mask */
1600 0x00000fff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1602};
1603
1604/* 112-127 private relocations
1605 128 R_ARM_ME_TOO, obsolete
1606 129-255 unallocated in AAELF.
7f266840 1607
c19d1205
ZW		 1608 249-255 extended, currently unused, relocations: */
1609
4962c51a 1610static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1611{
1612 HOWTO (R_ARM_RREL32, /* type */
1613 0, /* rightshift */
1614 0, /* size (0 = byte, 1 = short, 2 = long) */
1615 0, /* bitsize */
1616 FALSE, /* pc_relative */
1617 0, /* bitpos */
1618 complain_overflow_dont,/* complain_on_overflow */
1619 bfd_elf_generic_reloc, /* special_function */
1620 "R_ARM_RREL32", /* name */
1621 FALSE, /* partial_inplace */
1622 0, /* src_mask */
1623 0, /* dst_mask */
1624 FALSE), /* pcrel_offset */
1625
1626 HOWTO (R_ARM_RABS32, /* type */
1627 0, /* rightshift */
1628 0, /* size (0 = byte, 1 = short, 2 = long) */
1629 0, /* bitsize */
1630 FALSE, /* pc_relative */
1631 0, /* bitpos */
1632 complain_overflow_dont,/* complain_on_overflow */
1633 bfd_elf_generic_reloc, /* special_function */
1634 "R_ARM_RABS32", /* name */
1635 FALSE, /* partial_inplace */
1636 0, /* src_mask */
1637 0, /* dst_mask */
1638 FALSE), /* pcrel_offset */
1639
1640 HOWTO (R_ARM_RPC24, /* type */
1641 0, /* rightshift */
1642 0, /* size (0 = byte, 1 = short, 2 = long) */
1643 0, /* bitsize */
1644 FALSE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_dont,/* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_ARM_RPC24", /* name */
1649 FALSE, /* partial_inplace */
1650 0, /* src_mask */
1651 0, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 HOWTO (R_ARM_RBASE, /* type */
1655 0, /* rightshift */
1656 0, /* size (0 = byte, 1 = short, 2 = long) */
1657 0, /* bitsize */
1658 FALSE, /* pc_relative */
1659 0, /* bitpos */
1660 complain_overflow_dont,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_ARM_RBASE", /* name */
1663 FALSE, /* partial_inplace */
1664 0, /* src_mask */
1665 0, /* dst_mask */
1666 FALSE) /* pcrel_offset */
1667};
1668
1669static reloc_howto_type *
1670elf32_arm_howto_from_type (unsigned int r_type)
1671{
906e58ca 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1673 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1674
c19d1205 1675 if (r_type >= R_ARM_RREL32
906e58ca 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2))
4962c51a 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1678
c19d1205 1679 return NULL;
7f266840
DJ		 1680}
1681
1682static void
1683elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1684 Elf_Internal_Rela * elf_reloc)
1685{
1686 unsigned int r_type;
1687
1688 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1690}
1691
1692struct elf32_arm_reloc_map
1693 {
1694 bfd_reloc_code_real_type bfd_reloc_val;
1695 unsigned char elf_reloc_val;
1696 };
1697
1698/* All entries in this list must also be present in elf32_arm_howto_table. */
1699static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1700 {
1701 {BFD_RELOC_NONE, R_ARM_NONE},
1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1707 {BFD_RELOC_32, R_ARM_ABS32},
1708 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1709 {BFD_RELOC_8, R_ARM_ABS8},
1710 {BFD_RELOC_16, R_ARM_ABS16},
1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1780 };
1781
1782static reloc_howto_type *
f1c71a59
ZW		 1783elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1784 bfd_reloc_code_real_type code)
7f266840
DJ		 1785{
1786 unsigned int i;
8029a119 1787
906e58ca 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1791
c19d1205 1792 return NULL;
7f266840
DJ		 1793}
1794
157090f7
AM		 1795static reloc_howto_type *
1796elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1797 const char *r_name)
1798{
1799 unsigned int i;
1800
906e58ca 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
906e58ca 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1807 if (elf32_arm_howto_table_2[i].name != NULL
1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1809 return &elf32_arm_howto_table_2[i];
1810
1811 return NULL;
1812}
1813
906e58ca
NC		 1814/* Support for core dump NOTE sections. */
1815
7f266840 1816static bfd_boolean
f1c71a59 1817elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1818{
1819 int offset;
1820 size_t size;
1821
1822 switch (note->descsz)
1823 {
1824 default:
1825 return FALSE;
1826
8029a119 1827 case 148: /* Linux/ARM 32-bit. */
7f266840
DJ		 1828 /* pr_cursig */
1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1830
1831 /* pr_pid */
1832 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1833
1834 /* pr_reg */
1835 offset = 72;
1836 size = 72;
1837
1838 break;
1839 }
1840
1841 /* Make a ".reg/999" section. */
1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1843 size, note->descpos + offset);
1844}
1845
1846static bfd_boolean
f1c71a59 1847elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1848{
1849 switch (note->descsz)
1850 {
1851 default:
1852 return FALSE;
1853
8029a119 1854 case 124: /* Linux/ARM elf_prpsinfo. */
7f266840
DJ		 1855 elf_tdata (abfd)->core_program
1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1857 elf_tdata (abfd)->core_command
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1859 }
1860
1861 /* Note that for some reason, a spurious space is tacked
1862 onto the end of the args in some (at least one anyway)
1863 implementations, so strip it off if it exists. */
7f266840
DJ		 1864 {
1865 char *command = elf_tdata (abfd)->core_command;
1866 int n = strlen (command);
1867
1868 if (0 < n && command[n - 1] == ' ')
1869 command[n - 1] = '\0';
1870 }
1871
1872 return TRUE;
1873}
1874
1875#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1876#define TARGET_LITTLE_NAME "elf32-littlearm"
1877#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1878#define TARGET_BIG_NAME "elf32-bigarm"
1879
1880#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1881#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1882
252b5132
RH		 1883typedef unsigned long int insn32;
1884typedef unsigned short int insn16;
1885
3a4a14e9
PB		 1886/* In lieu of proper flags, assume all EABIv4 or later objects are
1887 interworkable. */
57e8b36a 1888#define INTERWORK_FLAG(abfd) \
3a4a14e9 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1891 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 1892
252b5132
RH		 1893/* The linker script knows the section names for placement.
1894 The entry_names are used to do simple name mangling on the stubs.
1895 Given a function name, and its type, the stub can be found. The
9b485d32 1896 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1897#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1898#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1899
1900#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1901#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1902
c7b8f16e
JB		 1903#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1904#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1905
845b51d6
PB		 1906#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1907#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1908
7413f23f
DJ		 1909#define STUB_ENTRY_NAME "__%s_veneer"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
906e58ca 2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
e5a52504 2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
906e58ca
NC		 2013#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2014#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2015#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2016#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2017#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2018#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2019
461a49ca
DJ		 2020enum stub_insn_type
2021 {
2022 THUMB16_TYPE = 1,
2023 THUMB32_TYPE,
2024 ARM_TYPE,
2025 DATA_TYPE
2026 };
2027
48229727
JB		 2028#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2029/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2030 is inserted in arm_build_one_stub(). */
2031#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2032#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2033#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2034#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2035#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2036#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2037
2038typedef struct
2039{
2040 bfd_vma data;
2041 enum stub_insn_type type;
ebe24dd4 2042 unsigned int r_type;
461a49ca
DJ		 2043 int reloc_addend;
2044} insn_sequence;
2045
fea2b4d6
CL		 2046/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2047 to reach the stub if necessary. */
461a49ca 2048static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
906e58ca 2049 {
461a49ca
DJ		 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2052 };
2053
fea2b4d6
CL		 2054/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2055 available. */
461a49ca 2056static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
906e58ca 2057 {
461a49ca
DJ		 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2059 ARM_INSN(0xe12fff1c), /* bx ip */
2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2061 };
2062
d3626fb0 2063/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2064static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
906e58ca 2065 {
461a49ca
DJ		 2066 THUMB16_INSN(0xb401), /* push {r0} */
2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2068 THUMB16_INSN(0x4684), /* mov ip, r0 */
2069 THUMB16_INSN(0xbc01), /* pop {r0} */
2070 THUMB16_INSN(0x4760), /* bx ip */
2071 THUMB16_INSN(0xbf00), /* nop */
2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2073 };
2074
d3626fb0
CL		 2075/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2076 allowed. */
2077static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2078 {
2079 THUMB16_INSN(0x4778), /* bx pc */
2080 THUMB16_INSN(0x46c0), /* nop */
2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2082 ARM_INSN(0xe12fff1c), /* bx ip */
2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2084 };
2085
fea2b4d6
CL		 2086/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2087 available. */
461a49ca 2088static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
906e58ca 2089 {
461a49ca
DJ		 2090 THUMB16_INSN(0x4778), /* bx pc */
2091 THUMB16_INSN(0x46c0), /* nop */
2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
906e58ca
NC		 2094 };
2095
fea2b4d6
CL		 2096/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2097 one, when the destination is close enough. */
461a49ca 2098static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
c820be07 2099 {
461a49ca
DJ		 2100 THUMB16_INSN(0x4778), /* bx pc */
2101 THUMB16_INSN(0x46c0), /* nop */
2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
c820be07
NC		 2103 };
2104
cf3eccff 2105/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2106 blx to reach the stub if necessary. */
cf3eccff 2107static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
906e58ca 2108 {
461a49ca
DJ		 2109 ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
906e58ca
NC		 2112 };
2113
cf3eccff
DJ		 2114/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2115 blx to reach the stub if necessary. We can not add into pc;
2116 it is not guaranteed to mode switch (different in ARMv6 and
2117 ARMv7). */
2118static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2119 {
2120 ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2122 ARM_INSN(0xe12fff1c), /* bx ip */
2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2124 };
2125
ebe24dd4
CL		 2126/* V4T ARM -> ARM long branch stub, PIC. */
2127static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2128 {
2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2131 ARM_INSN(0xe12fff1c), /* bx ip */
2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2133 };
2134
2135/* V4T Thumb -> ARM long branch stub, PIC. */
2136static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2137 {
2138 THUMB16_INSN(0x4778), /* bx pc */
2139 THUMB16_INSN(0x46c0), /* nop */
2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */
2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2143 };
2144
d3626fb0
CL		 2145/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2146 architectures. */
ebe24dd4
CL		 2147static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2148 {
2149 THUMB16_INSN(0xb401), /* push {r0} */
2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
2151 THUMB16_INSN(0x46fc), /* mov ip, pc */
2152 THUMB16_INSN(0x4484), /* add ip, r0 */
2153 THUMB16_INSN(0xbc01), /* pop {r0} */
2154 THUMB16_INSN(0x4760), /* bx ip */
2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2156 };
2157
d3626fb0
CL		 2158/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2159 allowed. */
2160static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2161 {
2162 THUMB16_INSN(0x4778), /* bx pc */
2163 THUMB16_INSN(0x46c0), /* nop */
2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */
2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
2166 ARM_INSN(0xe12fff1c), /* bx ip */
2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2168 };
2169
48229727
JB		 2170/* Cortex-A8 erratum-workaround stubs. */
2171
2172/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2173 can't use a conditional branch to reach this stub). */
2174
2175static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2176 {
2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */
2180 };
2181
2182/* Stub used for b.w and bl.w instructions. */
2183
2184static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2185 {
2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2187 };
2188
2189static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2190 {
2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
2192 };
2193
2194/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2195 instruction (which switches to ARM mode) to point to this stub. Jump to the
2196 real destination using an ARM-mode branch. */
2197
2198static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2199 {
2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */
2201 };
2202
906e58ca
NC		 2203/* Section name for stubs is the associated section name plus this
2204 string. */
2205#define STUB_SUFFIX ".stub"
2206
738a79f6
CL		 2207/* One entry per long/short branch stub defined above. */
2208#define DEF_STUBS \
2209 DEF_STUB(long_branch_any_any) \
2210 DEF_STUB(long_branch_v4t_arm_thumb) \
2211 DEF_STUB(long_branch_thumb_only) \
2212 DEF_STUB(long_branch_v4t_thumb_thumb) \
2213 DEF_STUB(long_branch_v4t_thumb_arm) \
2214 DEF_STUB(short_branch_v4t_thumb_arm) \
2215 DEF_STUB(long_branch_any_arm_pic) \
2216 DEF_STUB(long_branch_any_thumb_pic) \
2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727
JB		 2220 DEF_STUB(long_branch_thumb_only_pic) \
2221 DEF_STUB(a8_veneer_b_cond) \
2222 DEF_STUB(a8_veneer_b) \
2223 DEF_STUB(a8_veneer_bl) \
2224 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2225
2226#define DEF_STUB(x) arm_stub_##x,
2227enum elf32_arm_stub_type {
906e58ca 2228 arm_stub_none,
738a79f6 2229 DEF_STUBS
eb7c4339
NS		 2230 /* Note the first a8_veneer type */
2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2232};
2233#undef DEF_STUB
2234
2235typedef struct
2236{
d3ce72d0 2237 const insn_sequence* template_sequence;
738a79f6
CL		 2238 int template_size;
2239} stub_def;
2240
2241#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2242static const stub_def stub_definitions[] = {
2243 {NULL, 0},
2244 DEF_STUBS
906e58ca
NC		 2245};
2246
2247struct elf32_arm_stub_hash_entry
2248{
2249 /* Base hash table entry structure. */
2250 struct bfd_hash_entry root;
2251
2252 /* The stub section. */
2253 asection *stub_sec;
2254
2255 /* Offset within stub_sec of the beginning of this stub. */
2256 bfd_vma stub_offset;
2257
2258 /* Given the symbol's value and its section we can determine its final
2259 value when building the stubs (so the stub knows where to jump). */
2260 bfd_vma target_value;
2261 asection *target_section;
2262
48229727
JB		 2263 /* Offset to apply to relocation referencing target_value. */
2264 bfd_vma target_addend;
2265
2266 /* The instruction which caused this stub to be generated (only valid for
2267 Cortex-A8 erratum workaround stubs at present). */
2268 unsigned long orig_insn;
2269
461a49ca 2270 /* The stub type. */
906e58ca 2271 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2272 /* Its encoding size in bytes. */
2273 int stub_size;
2274 /* Its template. */
2275 const insn_sequence *stub_template;
2276 /* The size of the template (number of entries). */
2277 int stub_template_size;
906e58ca
NC		 2278
2279 /* The symbol table entry, if any, that this was derived from. */
2280 struct elf32_arm_link_hash_entry *h;
2281
2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2283 unsigned char st_type;
2284
2285 /* Where this stub is being called from, or, in the case of combined
2286 stub sections, the first input section in the group. */
2287 asection *id_sec;
7413f23f
DJ		 2288
2289 /* The name for the local symbol at the start of this stub. The
2290 stub name in the hash table has to be unique; this does not, so
2291 it can be friendlier. */
2292 char *output_name;
906e58ca
NC		 2293};
2294
e489d0ae
PB		 2295/* Used to build a map of a section. This is required for mixed-endian
2296 code/data. */
2297
2298typedef struct elf32_elf_section_map
2299{
2300 bfd_vma vma;
2301 char type;
2302}
2303elf32_arm_section_map;
2304
c7b8f16e
JB		 2305/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2306
2307typedef enum
2308{
2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2311 VFP11_ERRATUM_ARM_VENEER,
2312 VFP11_ERRATUM_THUMB_VENEER
2313}
2314elf32_vfp11_erratum_type;
2315
2316typedef struct elf32_vfp11_erratum_list
2317{
2318 struct elf32_vfp11_erratum_list *next;
2319 bfd_vma vma;
2320 union
2321 {
2322 struct
2323 {
2324 struct elf32_vfp11_erratum_list *veneer;
2325 unsigned int vfp_insn;
2326 } b;
2327 struct
2328 {
2329 struct elf32_vfp11_erratum_list *branch;
2330 unsigned int id;
2331 } v;
2332 } u;
2333 elf32_vfp11_erratum_type type;
2334}
2335elf32_vfp11_erratum_list;
2336
2468f9c9
PB		 2337typedef enum
2338{
2339 DELETE_EXIDX_ENTRY,
2340 INSERT_EXIDX_CANTUNWIND_AT_END
2341}
2342arm_unwind_edit_type;
2343
2344/* A (sorted) list of edits to apply to an unwind table. */
2345typedef struct arm_unwind_table_edit
2346{
2347 arm_unwind_edit_type type;
2348 /* Note: we sometimes want to insert an unwind entry corresponding to a
2349 section different from the one we're currently writing out, so record the
2350 (text) section this edit relates to here. */
2351 asection *linked_section;
2352 unsigned int index;
2353 struct arm_unwind_table_edit *next;
2354}
2355arm_unwind_table_edit;
2356
8e3de13a 2357typedef struct _arm_elf_section_data
e489d0ae 2358{
2468f9c9 2359 /* Information about mapping symbols. */
e489d0ae 2360 struct bfd_elf_section_data elf;
8e3de13a 2361 unsigned int mapcount;
c7b8f16e 2362 unsigned int mapsize;
e489d0ae 2363 elf32_arm_section_map *map;
2468f9c9 2364 /* Information about CPU errata. */
c7b8f16e
JB		 2365 unsigned int erratumcount;
2366 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2367 /* Information about unwind tables. */
2368 union
2369 {
2370 /* Unwind info attached to a text section. */
2371 struct
2372 {
2373 asection *arm_exidx_sec;
2374 } text;
2375
2376 /* Unwind info attached to an .ARM.exidx section. */
2377 struct
2378 {
2379 arm_unwind_table_edit *unwind_edit_list;
2380 arm_unwind_table_edit *unwind_edit_tail;
2381 } exidx;
2382 } u;
8e3de13a
NC		 2383}
2384_arm_elf_section_data;
e489d0ae
PB		 2385
2386#define elf32_arm_section_data(sec) \
8e3de13a 2387 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2388
48229727
JB		 2389/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2391 so may be created multiple times: we use an array of these entries whilst
2392 relaxing which we can refresh easily, then create stubs for each potentially
2393 erratum-triggering instruction once we've settled on a solution. */
2394
2395struct a8_erratum_fix {
2396 bfd *input_bfd;
2397 asection *section;
2398 bfd_vma offset;
2399 bfd_vma addend;
2400 unsigned long orig_insn;
2401 char *stub_name;
2402 enum elf32_arm_stub_type stub_type;
fe33d2fa 2403 int st_type;
48229727
JB		 2404};
2405
2406/* A table of relocs applied to branches which might trigger Cortex-A8
2407 erratum. */
2408
2409struct a8_erratum_reloc {
2410 bfd_vma from;
2411 bfd_vma destination;
92750f34
DJ		 2412 struct elf32_arm_link_hash_entry *hash;
2413 const char *sym_name;
48229727
JB		 2414 unsigned int r_type;
2415 unsigned char st_type;
48229727
JB		 2416 bfd_boolean non_a8_stub;
2417};
2418
ba93b8ac
DJ		 2419/* The size of the thread control block. */
2420#define TCB_SIZE 8
2421
0ffa91dd 2422struct elf_arm_obj_tdata
ba93b8ac
DJ		 2423{
2424 struct elf_obj_tdata root;
2425
2426 /* tls_type for each local got entry. */
2427 char *local_got_tls_type;
ee065d83 2428
bf21ed78
MS		 2429 /* Zero to warn when linking objects with incompatible enum sizes. */
2430 int no_enum_size_warning;
a9dc9481
JM		 2431
2432 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2433 int no_wchar_size_warning;
ba93b8ac
DJ		 2434};
2435
0ffa91dd
NC		 2436#define elf_arm_tdata(bfd) \
2437 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2438
0ffa91dd
NC		 2439#define elf32_arm_local_got_tls_type(bfd) \
2440 (elf_arm_tdata (bfd)->local_got_tls_type)
2441
2442#define is_arm_elf(bfd) \
2443 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2444 && elf_tdata (bfd) != NULL \
4dfe6ac6 2445 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2446
2447static bfd_boolean
2448elf32_arm_mkobject (bfd *abfd)
2449{
0ffa91dd 2450 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2451 ARM_ELF_DATA);
ba93b8ac
DJ		 2452}
2453
252b5132
RH		 2454/* The ARM linker needs to keep track of the number of relocs that it
2455 decides to copy in check_relocs for each symbol. This is so that
2456 it can discard PC relative relocs if it doesn't need them when
2457 linking with -Bsymbolic. We store the information in a field
2458 extending the regular ELF linker hash table. */
2459
ba93b8ac
DJ		 2460/* This structure keeps track of the number of relocs we have copied
2461 for a given symbol. */
5e681ec4 2462struct elf32_arm_relocs_copied
917583ad
NC		 2463 {
2464 /* Next section. */
5e681ec4 2465 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2466 /* A section in dynobj. */
2467 asection * section;
2468 /* Number of relocs copied in this section. */
2469 bfd_size_type count;
ba93b8ac
DJ		 2470 /* Number of PC-relative relocs copied in this section. */
2471 bfd_size_type pc_count;
917583ad 2472 };
252b5132 2473
ba93b8ac
DJ		 2474#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2475
ba96a88f 2476/* Arm ELF linker hash entry. */
252b5132 2477struct elf32_arm_link_hash_entry
917583ad
NC		 2478 {
2479 struct elf_link_hash_entry root;
252b5132 2480
917583ad 2481 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2482 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2483
2484 /* We reference count Thumb references to a PLT entry separately,
2485 so that we can emit the Thumb trampoline only if needed. */
2486 bfd_signed_vma plt_thumb_refcount;
2487
bd97cb95
DJ		 2488 /* Some references from Thumb code may be eliminated by BL->BLX
2489 conversion, so record them separately. */
2490 bfd_signed_vma plt_maybe_thumb_refcount;
2491
b7693d02
DJ		 2492 /* Since PLT entries have variable size if the Thumb prologue is
2493 used, we need to record the index into .got.plt instead of
2494 recomputing it from the PLT offset. */
2495 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2496
2497#define GOT_UNKNOWN 0
2498#define GOT_NORMAL 1
2499#define GOT_TLS_GD 2
2500#define GOT_TLS_IE 4
2501 unsigned char tls_type;
a4fd1a8e
PB		 2502
2503 /* The symbol marking the real symbol location for exported thumb
2504 symbols with Arm stubs. */
2505 struct elf_link_hash_entry *export_glue;
906e58ca 2506
da5938a2 2507 /* A pointer to the most recently used stub hash entry against this
8029a119 2508 symbol. */
da5938a2 2509 struct elf32_arm_stub_hash_entry *stub_cache;
917583ad 2510 };
252b5132 2511
252b5132 2512/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2513#define elf32_arm_link_hash_traverse(table, func, info) \
2514 (elf_link_hash_traverse \
2515 (&(table)->root, \
b7693d02 2516 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2517 (info)))
2518
2519/* Get the ARM elf linker hash table from a link_info structure. */
2520#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2521 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2522 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2523
906e58ca
NC		 2524#define arm_stub_hash_lookup(table, string, create, copy) \
2525 ((struct elf32_arm_stub_hash_entry *) \
2526 bfd_hash_lookup ((table), (string), (create), (copy)))
2527
21d799b5
NC		 2528/* Array to keep track of which stub sections have been created, and
2529 information on stub grouping. */
2530struct map_stub
2531{
2532 /* This is the section to which stubs in the group will be
2533 attached. */
2534 asection *link_sec;
2535 /* The stub section. */
2536 asection *stub_sec;
2537};
2538
9b485d32 2539/* ARM ELF linker hash table. */
252b5132 2540struct elf32_arm_link_hash_table
906e58ca
NC		 2541{
2542 /* The main hash table. */
2543 struct elf_link_hash_table root;
252b5132 2544
906e58ca
NC		 2545 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2546 bfd_size_type thumb_glue_size;
252b5132 2547
906e58ca
NC		 2548 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2549 bfd_size_type arm_glue_size;
252b5132 2550
906e58ca
NC		 2551 /* The size in bytes of section containing the ARMv4 BX veneers. */
2552 bfd_size_type bx_glue_size;
845b51d6 2553
906e58ca
NC		 2554 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2555 veneer has been populated. */
2556 bfd_vma bx_glue_offset[15];
845b51d6 2557
906e58ca
NC		 2558 /* The size in bytes of the section containing glue for VFP11 erratum
2559 veneers. */
2560 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2561
48229727
JB		 2562 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2563 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2564 elf32_arm_write_section(). */
2565 struct a8_erratum_fix *a8_erratum_fixes;
2566 unsigned int num_a8_erratum_fixes;
2567
906e58ca
NC		 2568 /* An arbitrary input BFD chosen to hold the glue sections. */
2569 bfd * bfd_of_glue_owner;
ba96a88f 2570
906e58ca
NC		 2571 /* Nonzero to output a BE8 image. */
2572 int byteswap_code;
e489d0ae 2573
906e58ca
NC		 2574 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2575 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2576 int target1_is_rel;
9c504268 2577
906e58ca
NC		 2578 /* The relocation to use for R_ARM_TARGET2 relocations. */
2579 int target2_reloc;
eb043451 2580
906e58ca
NC		 2581 /* 0 = Ignore R_ARM_V4BX.
2582 1 = Convert BX to MOV PC.
2583 2 = Generate v4 interworing stubs. */
2584 int fix_v4bx;
319850b4 2585
48229727
JB		 2586 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2587 int fix_cortex_a8;
2588
906e58ca
NC		 2589 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2590 int use_blx;
33bfe774 2591
906e58ca
NC		 2592 /* What sort of code sequences we should look for which may trigger the
2593 VFP11 denorm erratum. */
2594 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2595
906e58ca
NC		 2596 /* Global counter for the number of fixes we have emitted. */
2597 int num_vfp11_fixes;
c7b8f16e 2598
906e58ca
NC		 2599 /* Nonzero to force PIC branch veneers. */
2600 int pic_veneer;
27e55c4d 2601
906e58ca
NC		 2602 /* The number of bytes in the initial entry in the PLT. */
2603 bfd_size_type plt_header_size;
e5a52504 2604
906e58ca
NC		 2605 /* The number of bytes in the subsequent PLT etries. */
2606 bfd_size_type plt_entry_size;
e5a52504 2607
906e58ca
NC		 2608 /* True if the target system is VxWorks. */
2609 int vxworks_p;
00a97672 2610
906e58ca
NC		 2611 /* True if the target system is Symbian OS. */
2612 int symbian_p;
e5a52504 2613
906e58ca
NC		 2614 /* True if the target uses REL relocations. */
2615 int use_rel;
4e7fd91e 2616
906e58ca
NC		 2617 /* Short-cuts to get to dynamic linker sections. */
2618 asection *sgot;
2619 asection *sgotplt;
2620 asection *srelgot;
2621 asection *splt;
2622 asection *srelplt;
2623 asection *sdynbss;
2624 asection *srelbss;
5e681ec4 2625
906e58ca
NC		 2626 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2627 asection *srelplt2;
00a97672 2628
906e58ca
NC		 2629 /* Data for R_ARM_TLS_LDM32 relocations. */
2630 union
2631 {
2632 bfd_signed_vma refcount;
2633 bfd_vma offset;
2634 } tls_ldm_got;
b7693d02 2635
87d72d41
AM		 2636 /* Small local sym cache. */
2637 struct sym_cache sym_cache;
906e58ca
NC		 2638
2639 /* For convenience in allocate_dynrelocs. */
2640 bfd * obfd;
2641
2642 /* The stub hash table. */
2643 struct bfd_hash_table stub_hash_table;
2644
2645 /* Linker stub bfd. */
2646 bfd *stub_bfd;
2647
2648 /* Linker call-backs. */
2649 asection * (*add_stub_section) (const char *, asection *);
2650 void (*layout_sections_again) (void);
2651
2652 /* Array to keep track of which stub sections have been created, and
2653 information on stub grouping. */
21d799b5 2654 struct map_stub *stub_group;
906e58ca 2655
fe33d2fa
CL		 2656 /* Number of elements in stub_group. */
2657 int top_id;
2658
906e58ca
NC		 2659 /* Assorted information used by elf32_arm_size_stubs. */
2660 unsigned int bfd_count;
2661 int top_index;
2662 asection **input_list;
2663};
252b5132 2664
780a67af
NC		 2665/* Create an entry in an ARM ELF linker hash table. */
2666
2667static struct bfd_hash_entry *
57e8b36a
NC		 2668elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2669 struct bfd_hash_table * table,
2670 const char * string)
780a67af
NC		 2671{
2672 struct elf32_arm_link_hash_entry * ret =
2673 (struct elf32_arm_link_hash_entry *) entry;
2674
2675 /* Allocate the structure if it has not already been allocated by a
2676 subclass. */
906e58ca 2677 if (ret == NULL)
21d799b5
NC		 2678 ret = (struct elf32_arm_link_hash_entry *)
2679 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 2680 if (ret == NULL)
780a67af
NC		 2681 return (struct bfd_hash_entry *) ret;
2682
2683 /* Call the allocation method of the superclass. */
2684 ret = ((struct elf32_arm_link_hash_entry *)
2685 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2686 table, string));
57e8b36a 2687 if (ret != NULL)
b7693d02
DJ		 2688 {
2689 ret->relocs_copied = NULL;
ba93b8ac 2690 ret->tls_type = GOT_UNKNOWN;
b7693d02 2691 ret->plt_thumb_refcount = 0;
bd97cb95 2692 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2693 ret->plt_got_offset = -1;
a4fd1a8e 2694 ret->export_glue = NULL;
906e58ca
NC		 2695
2696 ret->stub_cache = NULL;
b7693d02 2697 }
780a67af
NC		 2698
2699 return (struct bfd_hash_entry *) ret;
2700}
2701
906e58ca
NC		 2702/* Initialize an entry in the stub hash table. */
2703
2704static struct bfd_hash_entry *
2705stub_hash_newfunc (struct bfd_hash_entry *entry,
2706 struct bfd_hash_table *table,
2707 const char *string)
2708{
2709 /* Allocate the structure if it has not already been allocated by a
2710 subclass. */
2711 if (entry == NULL)
2712 {
21d799b5
NC		 2713 entry = (struct bfd_hash_entry *)
2714 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 2715 if (entry == NULL)
2716 return entry;
2717 }
2718
2719 /* Call the allocation method of the superclass. */
2720 entry = bfd_hash_newfunc (entry, table, string);
2721 if (entry != NULL)
2722 {
2723 struct elf32_arm_stub_hash_entry *eh;
2724
2725 /* Initialize the local fields. */
2726 eh = (struct elf32_arm_stub_hash_entry *) entry;
2727 eh->stub_sec = NULL;
2728 eh->stub_offset = 0;
2729 eh->target_value = 0;
2730 eh->target_section = NULL;
cedfb179
DK		 2731 eh->target_addend = 0;
2732 eh->orig_insn = 0;
906e58ca 2733 eh->stub_type = arm_stub_none;
461a49ca
DJ		 2734 eh->stub_size = 0;
2735 eh->stub_template = NULL;
2736 eh->stub_template_size = 0;
906e58ca
NC		 2737 eh->h = NULL;
2738 eh->id_sec = NULL;
d8d2f433 2739 eh->output_name = NULL;
906e58ca
NC		 2740 }
2741
2742 return entry;
2743}
2744
00a97672 2745/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2746 shortcuts to them in our hash table. */
2747
2748static bfd_boolean
57e8b36a 2749create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2750{
2751 struct elf32_arm_link_hash_table *htab;
2752
e5a52504 2753 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2754 if (htab == NULL)
2755 return FALSE;
2756
e5a52504
MM		 2757 /* BPABI objects never have a GOT, or associated sections. */
2758 if (htab->symbian_p)
2759 return TRUE;
2760
5e681ec4
PB		 2761 if (! _bfd_elf_create_got_section (dynobj, info))
2762 return FALSE;
2763
5e681ec4
PB		 2764 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2765 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2766 if (!htab->sgot || !htab->sgotplt)
2767 abort ();
2768
64e77c6d
L		 2769 htab->srelgot = bfd_get_section_by_name (dynobj,
2770 RELOC_SECTION (htab, ".got"));
2771 if (htab->srelgot == NULL)
5e681ec4
PB		 2772 return FALSE;
2773 return TRUE;
2774}
2775
00a97672
RS		 2776/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2777 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2778 hash table. */
2779
2780static bfd_boolean
57e8b36a 2781elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2782{
2783 struct elf32_arm_link_hash_table *htab;
2784
2785 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 2786 if (htab == NULL)
2787 return FALSE;
2788
5e681ec4
PB		 2789 if (!htab->sgot && !create_got_section (dynobj, info))
2790 return FALSE;
2791
2792 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2793 return FALSE;
2794
2795 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2796 htab->srelplt = bfd_get_section_by_name (dynobj,
2797 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2798 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2799 if (!info->shared)
00a97672
RS		 2800 htab->srelbss = bfd_get_section_by_name (dynobj,
2801 RELOC_SECTION (htab, ".bss"));
2802
2803 if (htab->vxworks_p)
2804 {
2805 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2806 return FALSE;
2807
2808 if (info->shared)
2809 {
2810 htab->plt_header_size = 0;
2811 htab->plt_entry_size
2812 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2813 }
2814 else
2815 {
2816 htab->plt_header_size
2817 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2818 htab->plt_entry_size
2819 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2820 }
2821 }
5e681ec4 2822
906e58ca 2823 if (!htab->splt
e5a52504
MM		 2824 || !htab->srelplt
2825 || !htab->sdynbss
5e681ec4
PB		 2826 || (!info->shared && !htab->srelbss))
2827 abort ();
2828
2829 return TRUE;
2830}
2831
906e58ca
NC		 2832/* Copy the extra info we tack onto an elf_link_hash_entry. */
2833
2834static void
2835elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
2836 struct elf_link_hash_entry *dir,
2837 struct elf_link_hash_entry *ind)
2838{
2839 struct elf32_arm_link_hash_entry *edir, *eind;
2840
2841 edir = (struct elf32_arm_link_hash_entry *) dir;
2842 eind = (struct elf32_arm_link_hash_entry *) ind;
2843
2844 if (eind->relocs_copied != NULL)
2845 {
2846 if (edir->relocs_copied != NULL)
2847 {
2848 struct elf32_arm_relocs_copied **pp;
2849 struct elf32_arm_relocs_copied *p;
2850
2851 /* Add reloc counts against the indirect sym to the direct sym
2852 list. Merge any entries against the same section. */
2853 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2854 {
2855 struct elf32_arm_relocs_copied *q;
2856
2857 for (q = edir->relocs_copied; q != NULL; q = q->next)
2858 if (q->section == p->section)
2859 {
2860 q->pc_count += p->pc_count;
2861 q->count += p->count;
2862 *pp = p->next;
2863 break;
2864 }
2865 if (q == NULL)
2866 pp = &p->next;
2867 }
2868 *pp = edir->relocs_copied;
2869 }
2870
2871 edir->relocs_copied = eind->relocs_copied;
2872 eind->relocs_copied = NULL;
2873 }
2874
2875 if (ind->root.type == bfd_link_hash_indirect)
2876 {
2877 /* Copy over PLT info. */
2878 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2879 eind->plt_thumb_refcount = 0;
2880 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2881 eind->plt_maybe_thumb_refcount = 0;
2882
2883 if (dir->got.refcount <= 0)
2884 {
2885 edir->tls_type = eind->tls_type;
2886 eind->tls_type = GOT_UNKNOWN;
2887 }
2888 }
2889
2890 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
2891}
2892
2893/* Create an ARM elf linker hash table. */
2894
2895static struct bfd_link_hash_table *
2896elf32_arm_link_hash_table_create (bfd *abfd)
2897{
2898 struct elf32_arm_link_hash_table *ret;
2899 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
2900
21d799b5 2901 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
906e58ca
NC		 2902 if (ret == NULL)
2903 return NULL;
2904
2905 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
2906 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 2907 sizeof (struct elf32_arm_link_hash_entry),
2908 ARM_ELF_DATA))
906e58ca
NC		 2909 {
2910 free (ret);
2911 return NULL;
2912 }
2913
2914 ret->sgot = NULL;
2915 ret->sgotplt = NULL;
2916 ret->srelgot = NULL;
2917 ret->splt = NULL;
2918 ret->srelplt = NULL;
2919 ret->sdynbss = NULL;
2920 ret->srelbss = NULL;
2921 ret->srelplt2 = NULL;
2922 ret->thumb_glue_size = 0;
2923 ret->arm_glue_size = 0;
2924 ret->bx_glue_size = 0;
2925 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
2926 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2927 ret->vfp11_erratum_glue_size = 0;
2928 ret->num_vfp11_fixes = 0;
48229727 2929 ret->fix_cortex_a8 = 0;
906e58ca
NC		 2930 ret->bfd_of_glue_owner = NULL;
2931 ret->byteswap_code = 0;
2932 ret->target1_is_rel = 0;
2933 ret->target2_reloc = R_ARM_NONE;
2934#ifdef FOUR_WORD_PLT
2935 ret->plt_header_size = 16;
2936 ret->plt_entry_size = 16;
2937#else
2938 ret->plt_header_size = 20;
2939 ret->plt_entry_size = 12;
2940#endif
2941 ret->fix_v4bx = 0;
2942 ret->use_blx = 0;
2943 ret->vxworks_p = 0;
2944 ret->symbian_p = 0;
2945 ret->use_rel = 1;
87d72d41 2946 ret->sym_cache.abfd = NULL;
906e58ca
NC		 2947 ret->obfd = abfd;
2948 ret->tls_ldm_got.refcount = 0;
6cee0a6f
L		 2949 ret->stub_bfd = NULL;
2950 ret->add_stub_section = NULL;
2951 ret->layout_sections_again = NULL;
2952 ret->stub_group = NULL;
fe33d2fa 2953 ret->top_id = 0;
6cee0a6f
L		 2954 ret->bfd_count = 0;
2955 ret->top_index = 0;
2956 ret->input_list = NULL;
906e58ca
NC		 2957
2958 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
2959 sizeof (struct elf32_arm_stub_hash_entry)))
2960 {
2961 free (ret);
2962 return NULL;
2963 }
2964
2965 return &ret->root.root;
2966}
2967
2968/* Free the derived linker hash table. */
2969
2970static void
2971elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
2972{
2973 struct elf32_arm_link_hash_table *ret
2974 = (struct elf32_arm_link_hash_table *) hash;
2975
2976 bfd_hash_table_free (&ret->stub_hash_table);
2977 _bfd_generic_link_hash_table_free (hash);
2978}
2979
2980/* Determine if we're dealing with a Thumb only architecture. */
2981
2982static bfd_boolean
2983using_thumb_only (struct elf32_arm_link_hash_table *globals)
2984{
2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2986 Tag_CPU_arch);
2987 int profile;
2988
41ed1ee7
DJ		 2989 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
2990 return TRUE;
2991
9e3c6df6 2992 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
906e58ca
NC		 2993 return FALSE;
2994
2995 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2996 Tag_CPU_arch_profile);
2997
2998 return profile == 'M';
2999}
3000
3001/* Determine if we're dealing with a Thumb-2 object. */
3002
3003static bfd_boolean
3004using_thumb2 (struct elf32_arm_link_hash_table *globals)
3005{
3006 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3007 Tag_CPU_arch);
3008 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3009}
3010
cd1dac3d
DG		 3011/* Determine what kind of NOPs are available. */
3012
3013static bfd_boolean
3014arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3015{
3016 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3017 Tag_CPU_arch);
3018 return arch == TAG_CPU_ARCH_V6T2
3019 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3020 || arch == TAG_CPU_ARCH_V7
3021 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3022}
3023
3024static bfd_boolean
3025arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3026{
3027 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3028 Tag_CPU_arch);
9e3c6df6
PB		 3029 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3030 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3031}
3032
f4ac8484
DJ		 3033static bfd_boolean
3034arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3035{
3036 switch (stub_type)
3037 {
fea2b4d6
CL		 3038 case arm_stub_long_branch_thumb_only:
3039 case arm_stub_long_branch_v4t_thumb_arm:
3040 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4
CL		 3041 case arm_stub_long_branch_v4t_thumb_arm_pic:
3042 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3043 return TRUE;
3044 case arm_stub_none:
3045 BFD_FAIL ();
3046 return FALSE;
3047 break;
3048 default:
3049 return FALSE;
3050 }
3051}
3052
906e58ca
NC		 3053/* Determine the type of stub needed, if any, for a call. */
3054
3055static enum elf32_arm_stub_type
3056arm_type_of_stub (struct bfd_link_info *info,
3057 asection *input_sec,
3058 const Elf_Internal_Rela *rel,
fe33d2fa 3059 int *actual_st_type,
906e58ca 3060 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3061 bfd_vma destination,
3062 asection *sym_sec,
3063 bfd *input_bfd,
3064 const char *name)
906e58ca
NC		 3065{
3066 bfd_vma location;
3067 bfd_signed_vma branch_offset;
3068 unsigned int r_type;
3069 struct elf32_arm_link_hash_table * globals;
3070 int thumb2;
3071 int thumb_only;
3072 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3073 int use_plt = 0;
fe33d2fa 3074 int st_type = *actual_st_type;
906e58ca 3075
da5938a2 3076 /* We don't know the actual type of destination in case it is of
8029a119 3077 type STT_SECTION: give up. */
da5938a2
NC		 3078 if (st_type == STT_SECTION)
3079 return stub_type;
3080
906e58ca 3081 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3082 if (globals == NULL)
3083 return stub_type;
906e58ca
NC		 3084
3085 thumb_only = using_thumb_only (globals);
3086
3087 thumb2 = using_thumb2 (globals);
3088
3089 /* Determine where the call point is. */
3090 location = (input_sec->output_offset
3091 + input_sec->output_section->vma
3092 + rel->r_offset);
3093
906e58ca
NC		 3094 r_type = ELF32_R_TYPE (rel->r_info);
3095
5fa9e92f 3096 /* Keep a simpler condition, for the sake of clarity. */
fe33d2fa
CL		 3097 if (globals->splt != NULL
3098 && hash != NULL
3099 && hash->root.plt.offset != (bfd_vma) -1)
5fa9e92f
CL		 3100 {
3101 use_plt = 1;
fe33d2fa 3102
5fa9e92f
CL		 3103 /* Note when dealing with PLT entries: the main PLT stub is in
3104 ARM mode, so if the branch is in Thumb mode, another
3105 Thumb->ARM stub will be inserted later just before the ARM
3106 PLT stub. We don't take this extra distance into account
3107 here, because if a long branch stub is needed, we'll add a
3108 Thumb->Arm one and branch directly to the ARM PLT entry
3109 because it avoids spreading offset corrections in several
3110 places. */
fe33d2fa
CL		 3111
3112 destination = (globals->splt->output_section->vma
3113 + globals->splt->output_offset
3114 + hash->root.plt.offset);
3115 st_type = STT_FUNC;
5fa9e92f 3116 }
906e58ca 3117
fe33d2fa
CL		 3118 branch_offset = (bfd_signed_vma)(destination - location);
3119
155d87d7 3120 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca 3121 {
5fa9e92f
CL		 3122 /* Handle cases where:
3123 - this call goes too far (different Thumb/Thumb2 max
3124 distance)
155d87d7
CL		 3125 - it's a Thumb->Arm call and blx is not available, or it's a
3126 Thumb->Arm branch (not bl). A stub is needed in this case,
3127 but only if this call is not through a PLT entry. Indeed,
3128 PLT stubs handle mode switching already.
5fa9e92f 3129 */
906e58ca
NC		 3130 if ((!thumb2
3131 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3132 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3133 || (thumb2
3134 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3135 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
5fa9e92f 3136 || ((st_type != STT_ARM_TFUNC)
155d87d7
CL		 3137 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
3138 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3139 && !use_plt))
906e58ca
NC		 3140 {
3141 if (st_type == STT_ARM_TFUNC)
3142 {
3143 /* Thumb to thumb. */
3144 if (!thumb_only)
3145 {
3146 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3147 /* PIC stubs. */
155d87d7
CL		 3148 ? ((globals->use_blx
3149 && (r_type ==R_ARM_THM_CALL))
3150 /* V5T and above. Stub starts with ARM code, so
3151 we must be able to switch mode before
3152 reaching it, which is only possible for 'bl'
3153 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3154 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3155 /* On V4T, use Thumb code only. */
d3626fb0 3156 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3157
3158 /* non-PIC stubs. */
155d87d7
CL		 3159 : ((globals->use_blx
3160 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3161 /* V5T and above. */
3162 ? arm_stub_long_branch_any_any
3163 /* V4T. */
d3626fb0 3164 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3165 }
3166 else
3167 {
3168 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3169 /* PIC stub. */
3170 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3171 /* non-PIC stub. */
3172 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3173 }
3174 }
3175 else
3176 {
3177 /* Thumb to arm. */
c820be07
NC		 3178 if (sym_sec != NULL
3179 && sym_sec->owner != NULL
3180 && !INTERWORK_FLAG (sym_sec->owner))
3181 {
3182 (*_bfd_error_handler)
3183 (_("%B(%s): warning: interworking not enabled.\n"
3184 " first occurrence: %B: Thumb call to ARM"),
3185 sym_sec->owner, input_bfd, name);
3186 }
3187
906e58ca 3188 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3189 /* PIC stubs. */
155d87d7
CL		 3190 ? ((globals->use_blx
3191 && (r_type ==R_ARM_THM_CALL))
c2b4a39d 3192 /* V5T and above. */
cf3eccff 3193 ? arm_stub_long_branch_any_arm_pic
ebe24dd4
CL		 3194 /* V4T PIC stub. */
3195 : arm_stub_long_branch_v4t_thumb_arm_pic)
c2b4a39d
CL		 3196
3197 /* non-PIC stubs. */
155d87d7
CL		 3198 : ((globals->use_blx
3199 && (r_type ==R_ARM_THM_CALL))
c2b4a39d
CL		 3200 /* V5T and above. */
3201 ? arm_stub_long_branch_any_any
3202 /* V4T. */
3203 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3204
3205 /* Handle v4t short branches. */
fea2b4d6 3206 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3207 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3208 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3209 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3210 }
3211 }
3212 }
fe33d2fa
CL		 3213 else if (r_type == R_ARM_CALL
3214 || r_type == R_ARM_JUMP24
3215 || r_type == R_ARM_PLT32)
906e58ca
NC		 3216 {
3217 if (st_type == STT_ARM_TFUNC)
3218 {
3219 /* Arm to thumb. */
c820be07
NC		 3220
3221 if (sym_sec != NULL
3222 && sym_sec->owner != NULL
3223 && !INTERWORK_FLAG (sym_sec->owner))
3224 {
3225 (*_bfd_error_handler)
3226 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3227 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3228 sym_sec->owner, input_bfd, name);
3229 }
3230
3231 /* We have an extra 2-bytes reach because of
3232 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3233 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3234 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3235 || ((r_type == R_ARM_CALL) && !globals->use_blx)
3236 || (r_type == R_ARM_JUMP24)
3237 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3238 {
3239 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3240 /* PIC stubs. */
ebe24dd4
CL		 3241 ? ((globals->use_blx)
3242 /* V5T and above. */
3243 ? arm_stub_long_branch_any_thumb_pic
3244 /* V4T stub. */
3245 : arm_stub_long_branch_v4t_arm_thumb_pic)
3246
c2b4a39d
CL		 3247 /* non-PIC stubs. */
3248 : ((globals->use_blx)
3249 /* V5T and above. */
3250 ? arm_stub_long_branch_any_any
3251 /* V4T. */
3252 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3253 }
3254 }
3255 else
3256 {
3257 /* Arm to arm. */
3258 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3259 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3260 {
3261 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3262 /* PIC stubs. */
cf3eccff 3263 ? arm_stub_long_branch_any_arm_pic
c2b4a39d 3264 /* non-PIC stubs. */
fea2b4d6 3265 : arm_stub_long_branch_any_any;
906e58ca
NC		 3266 }
3267 }
3268 }
3269
fe33d2fa
CL		 3270 /* If a stub is needed, record the actual destination type. */
3271 if (stub_type != arm_stub_none)
3272 {
3273 *actual_st_type = st_type;
3274 }
3275
906e58ca
NC		 3276 return stub_type;
3277}
3278
3279/* Build a name for an entry in the stub hash table. */
3280
3281static char *
3282elf32_arm_stub_name (const asection *input_section,
3283 const asection *sym_sec,
3284 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3285 const Elf_Internal_Rela *rel,
3286 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3287{
3288 char *stub_name;
3289 bfd_size_type len;
3290
3291 if (hash)
3292 {
fe33d2fa 3293 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3294 stub_name = (char *) bfd_malloc (len);
906e58ca 3295 if (stub_name != NULL)
fe33d2fa 3296 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3297 input_section->id & 0xffffffff,
3298 hash->root.root.root.string,
fe33d2fa
CL		 3299 (int) rel->r_addend & 0xffffffff,
3300 (int) stub_type);
906e58ca
NC		 3301 }
3302 else
3303 {
fe33d2fa 3304 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3305 stub_name = (char *) bfd_malloc (len);
906e58ca 3306 if (stub_name != NULL)
fe33d2fa 3307 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3308 input_section->id & 0xffffffff,
3309 sym_sec->id & 0xffffffff,
3310 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3311 (int) rel->r_addend & 0xffffffff,
3312 (int) stub_type);
906e58ca
NC		 3313 }
3314
3315 return stub_name;
3316}
3317
3318/* Look up an entry in the stub hash. Stub entries are cached because
3319 creating the stub name takes a bit of time. */
3320
3321static struct elf32_arm_stub_hash_entry *
3322elf32_arm_get_stub_entry (const asection *input_section,
3323 const asection *sym_sec,
3324 struct elf_link_hash_entry *hash,
3325 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3326 struct elf32_arm_link_hash_table *htab,
3327 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3328{
3329 struct elf32_arm_stub_hash_entry *stub_entry;
3330 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3331 const asection *id_sec;
3332
3333 if ((input_section->flags & SEC_CODE) == 0)
3334 return NULL;
3335
3336 /* If this input section is part of a group of sections sharing one
3337 stub section, then use the id of the first section in the group.
3338 Stub names need to include a section id, as there may well be
3339 more than one stub used to reach say, printf, and we need to
3340 distinguish between them. */
3341 id_sec = htab->stub_group[input_section->id].link_sec;
3342
3343 if (h != NULL && h->stub_cache != NULL
3344 && h->stub_cache->h == h
fe33d2fa
CL		 3345 && h->stub_cache->id_sec == id_sec
3346 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3347 {
3348 stub_entry = h->stub_cache;
3349 }
3350 else
3351 {
3352 char *stub_name;
3353
fe33d2fa 3354 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3355 if (stub_name == NULL)
3356 return NULL;
3357
3358 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3359 stub_name, FALSE, FALSE);
3360 if (h != NULL)
3361 h->stub_cache = stub_entry;
3362
3363 free (stub_name);
3364 }
3365
3366 return stub_entry;
3367}
3368
48229727
JB		 3369/* Find or create a stub section. Returns a pointer to the stub section, and
3370 the section to which the stub section will be attached (in *LINK_SEC_P).
3371 LINK_SEC_P may be NULL. */
906e58ca 3372
48229727
JB		 3373static asection *
3374elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3375 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3376{
3377 asection *link_sec;
3378 asection *stub_sec;
906e58ca
NC		 3379
3380 link_sec = htab->stub_group[section->id].link_sec;
3381 stub_sec = htab->stub_group[section->id].stub_sec;
3382 if (stub_sec == NULL)
3383 {
3384 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3385 if (stub_sec == NULL)
3386 {
3387 size_t namelen;
3388 bfd_size_type len;
3389 char *s_name;
3390
3391 namelen = strlen (link_sec->name);
3392 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 3393 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 3394 if (s_name == NULL)
3395 return NULL;
3396
3397 memcpy (s_name, link_sec->name, namelen);
3398 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3399 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3400 if (stub_sec == NULL)
3401 return NULL;
3402 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3403 }
3404 htab->stub_group[section->id].stub_sec = stub_sec;
3405 }
48229727
JB		 3406
3407 if (link_sec_p)
3408 *link_sec_p = link_sec;
3409
3410 return stub_sec;
3411}
3412
3413/* Add a new stub entry to the stub hash. Not all fields of the new
3414 stub entry are initialised. */
3415
3416static struct elf32_arm_stub_hash_entry *
3417elf32_arm_add_stub (const char *stub_name,
3418 asection *section,
3419 struct elf32_arm_link_hash_table *htab)
3420{
3421 asection *link_sec;
3422 asection *stub_sec;
3423 struct elf32_arm_stub_hash_entry *stub_entry;
3424
3425 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3426 if (stub_sec == NULL)
3427 return NULL;
906e58ca
NC		 3428
3429 /* Enter this entry into the linker stub hash table. */
3430 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3431 TRUE, FALSE);
3432 if (stub_entry == NULL)
3433 {
3434 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3435 section->owner,
3436 stub_name);
3437 return NULL;
3438 }
3439
3440 stub_entry->stub_sec = stub_sec;
3441 stub_entry->stub_offset = 0;
3442 stub_entry->id_sec = link_sec;
3443
906e58ca
NC		 3444 return stub_entry;
3445}
3446
3447/* Store an Arm insn into an output section not processed by
3448 elf32_arm_write_section. */
3449
3450static void
8029a119
NC		 3451put_arm_insn (struct elf32_arm_link_hash_table * htab,
3452 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3453{
3454 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3455 bfd_putl32 (val, ptr);
3456 else
3457 bfd_putb32 (val, ptr);
3458}
3459
3460/* Store a 16-bit Thumb insn into an output section not processed by
3461 elf32_arm_write_section. */
3462
3463static void
8029a119
NC		 3464put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3465 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 3466{
3467 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3468 bfd_putl16 (val, ptr);
3469 else
3470 bfd_putb16 (val, ptr);
3471}
3472
48229727
JB		 3473static bfd_reloc_status_type elf32_arm_final_link_relocate
3474 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
3475 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
3476 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
3477
906e58ca
NC		 3478static bfd_boolean
3479arm_build_one_stub (struct bfd_hash_entry *gen_entry,
3480 void * in_arg)
3481{
48229727 3482#define MAXRELOCS 2
906e58ca 3483 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 3484 struct elf32_arm_link_hash_table *globals;
906e58ca 3485 struct bfd_link_info *info;
906e58ca
NC		 3486 asection *stub_sec;
3487 bfd *stub_bfd;
3488 bfd_vma stub_addr;
3489 bfd_byte *loc;
3490 bfd_vma sym_value;
3491 int template_size;
3492 int size;
d3ce72d0 3493 const insn_sequence *template_sequence;
906e58ca 3494 int i;
48229727
JB		 3495 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
3496 int stub_reloc_offset[MAXRELOCS] = {0, 0};
3497 int nrelocs = 0;
906e58ca
NC		 3498
3499 /* Massage our args to the form they really have. */
3500 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3501 info = (struct bfd_link_info *) in_arg;
3502
3503 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3504 if (globals == NULL)
3505 return FALSE;
906e58ca 3506
906e58ca
NC		 3507 stub_sec = stub_entry->stub_sec;
3508
4dfe6ac6 3509 if ((globals->fix_cortex_a8 < 0)
eb7c4339
NS		 3510 != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm))
3511 /* We have to do the a8 fixes last, as they are less aligned than
3512 the other veneers. */
3513 return TRUE;
fe33d2fa 3514
906e58ca
NC		 3515 /* Make a note of the offset within the stubs for this entry. */
3516 stub_entry->stub_offset = stub_sec->size;
3517 loc = stub_sec->contents + stub_entry->stub_offset;
3518
3519 stub_bfd = stub_sec->owner;
3520
3521 /* This is the address of the start of the stub. */
3522 stub_addr = stub_sec->output_section->vma + stub_sec->output_offset
3523 + stub_entry->stub_offset;
3524
3525 /* This is the address of the stub destination. */
3526 sym_value = (stub_entry->target_value
3527 + stub_entry->target_section->output_offset
3528 + stub_entry->target_section->output_section->vma);
3529
d3ce72d0 3530 template_sequence = stub_entry->stub_template;
461a49ca 3531 template_size = stub_entry->stub_template_size;
906e58ca
NC		 3532
3533 size = 0;
461a49ca 3534 for (i = 0; i < template_size; i++)
906e58ca 3535 {
d3ce72d0 3536 switch (template_sequence[i].type)
461a49ca
DJ		 3537 {
3538 case THUMB16_TYPE:
48229727 3539 {
d3ce72d0
NC		 3540 bfd_vma data = (bfd_vma) template_sequence[i].data;
3541 if (template_sequence[i].reloc_addend != 0)
48229727
JB		 3542 {
3543 /* We've borrowed the reloc_addend field to mean we should
3544 insert a condition code into this (Thumb-1 branch)
3545 instruction. See THUMB16_BCOND_INSN. */
3546 BFD_ASSERT ((data & 0xff00) == 0xd000);
3547 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
3548 }
fe33d2fa 3549 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 3550 size += 2;
3551 }
461a49ca 3552 break;
906e58ca 3553
48229727 3554 case THUMB32_TYPE:
fe33d2fa
CL		 3555 bfd_put_16 (stub_bfd,
3556 (template_sequence[i].data >> 16) & 0xffff,
3557 loc + size);
3558 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
3559 loc + size + 2);
d3ce72d0 3560 if (template_sequence[i].r_type != R_ARM_NONE)
48229727
JB		 3561 {
3562 stub_reloc_idx[nrelocs] = i;
3563 stub_reloc_offset[nrelocs++] = size;
3564 }
3565 size += 4;
3566 break;
3567
461a49ca 3568 case ARM_TYPE:
fe33d2fa
CL		 3569 bfd_put_32 (stub_bfd, template_sequence[i].data,
3570 loc + size);
461a49ca
DJ		 3571 /* Handle cases where the target is encoded within the
3572 instruction. */
d3ce72d0 3573 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 3574 {
48229727
JB		 3575 stub_reloc_idx[nrelocs] = i;
3576 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3577 }
3578 size += 4;
3579 break;
3580
3581 case DATA_TYPE:
d3ce72d0 3582 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 3583 stub_reloc_idx[nrelocs] = i;
3584 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 3585 size += 4;
3586 break;
3587
3588 default:
3589 BFD_FAIL ();
3590 return FALSE;
3591 }
906e58ca 3592 }
461a49ca 3593
906e58ca
NC		 3594 stub_sec->size += size;
3595
461a49ca
DJ		 3596 /* Stub size has already been computed in arm_size_one_stub. Check
3597 consistency. */
3598 BFD_ASSERT (size == stub_entry->stub_size);
3599
906e58ca
NC		 3600 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3601 if (stub_entry->st_type == STT_ARM_TFUNC)
3602 sym_value |= 1;
3603
48229727
JB		 3604 /* Assume there is at least one and at most MAXRELOCS entries to relocate
3605 in each stub. */
3606 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 3607
48229727 3608 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 3609 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
3610 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
3611 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
3612 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 3613 {
3614 Elf_Internal_Rela rel;
3615 bfd_boolean unresolved_reloc;
3616 char *error_message;
3617 int sym_flags
d3ce72d0 3618 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22)
48229727
JB		 3619 ? STT_ARM_TFUNC : 0;
3620 bfd_vma points_to = sym_value + stub_entry->target_addend;
3621
3622 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0
NC		 3623 rel.r_info = ELF32_R_INFO (0,
3624 template_sequence[stub_reloc_idx[i]].r_type);
3625 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 3626
3627 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
3628 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
3629 template should refer back to the instruction after the original
3630 branch. */
3631 points_to = sym_value;
3632
33c6a8fc
JB		 3633 /* There may be unintended consequences if this is not true. */
3634 BFD_ASSERT (stub_entry->h == NULL);
3635
48229727
JB		 3636 /* Note: _bfd_final_link_relocate doesn't handle these relocations
3637 properly. We should probably use this function unconditionally,
3638 rather than only for certain relocations listed in the enclosing
3639 conditional, for the sake of consistency. */
3640 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 3641 (template_sequence[stub_reloc_idx[i]].r_type),
48229727
JB		 3642 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3643 points_to, info, stub_entry->target_section, "", sym_flags,
33c6a8fc 3644 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
48229727
JB		 3645 &error_message);
3646 }
3647 else
3648 {
fe33d2fa
CL		 3649 Elf_Internal_Rela rel;
3650 bfd_boolean unresolved_reloc;
3651 char *error_message;
3652 bfd_vma points_to = sym_value + stub_entry->target_addend
3653 + template_sequence[stub_reloc_idx[i]].reloc_addend;
3654
3655 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
3656 rel.r_info = ELF32_R_INFO (0,
3657 template_sequence[stub_reloc_idx[i]].r_type);
3658 rel.r_addend = 0;
3659
3660 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
3661 (template_sequence[stub_reloc_idx[i]].r_type),
3662 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
3663 points_to, info, stub_entry->target_section, "", stub_entry->st_type,
3664 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
3665 &error_message);
48229727 3666 }
906e58ca
NC		 3667
3668 return TRUE;
48229727 3669#undef MAXRELOCS
906e58ca
NC		 3670}
3671
48229727
JB		 3672/* Calculate the template, template size and instruction size for a stub.
3673 Return value is the instruction size. */
906e58ca 3674
48229727
JB		 3675static unsigned int
3676find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
3677 const insn_sequence **stub_template,
3678 int *stub_template_size)
906e58ca 3679{
d3ce72d0 3680 const insn_sequence *template_sequence = NULL;
48229727
JB		 3681 int template_size = 0, i;
3682 unsigned int size;
906e58ca 3683
d3ce72d0 3684 template_sequence = stub_definitions[stub_type].template_sequence;
48229727 3685 template_size = stub_definitions[stub_type].template_size;
906e58ca
NC		 3686
3687 size = 0;
461a49ca
DJ		 3688 for (i = 0; i < template_size; i++)
3689 {
d3ce72d0 3690 switch (template_sequence[i].type)
461a49ca
DJ		 3691 {
3692 case THUMB16_TYPE:
3693 size += 2;
3694 break;
3695
3696 case ARM_TYPE:
48229727 3697 case THUMB32_TYPE:
461a49ca
DJ		 3698 case DATA_TYPE:
3699 size += 4;
3700 break;
3701
3702 default:
3703 BFD_FAIL ();
3704 return FALSE;
3705 }
3706 }
3707
48229727 3708 if (stub_template)
d3ce72d0 3709 *stub_template = template_sequence;
48229727
JB		 3710
3711 if (stub_template_size)
3712 *stub_template_size = template_size;
3713
3714 return size;
3715}
3716
3717/* As above, but don't actually build the stub. Just bump offset so
3718 we know stub section sizes. */
3719
3720static bfd_boolean
3721arm_size_one_stub (struct bfd_hash_entry *gen_entry,
3722 void * in_arg)
3723{
3724 struct elf32_arm_stub_hash_entry *stub_entry;
3725 struct elf32_arm_link_hash_table *htab;
d3ce72d0 3726 const insn_sequence *template_sequence;
48229727
JB		 3727 int template_size, size;
3728
3729 /* Massage our args to the form they really have. */
3730 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
3731 htab = (struct elf32_arm_link_hash_table *) in_arg;
3732
3733 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
3734 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
3735
d3ce72d0 3736 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 3737 &template_size);
3738
461a49ca 3739 stub_entry->stub_size = size;
d3ce72d0 3740 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 3741 stub_entry->stub_template_size = template_size;
3742
906e58ca
NC		 3743 size = (size + 7) & ~7;
3744 stub_entry->stub_sec->size += size;
461a49ca 3745
906e58ca
NC		 3746 return TRUE;
3747}
3748
3749/* External entry points for sizing and building linker stubs. */
3750
3751/* Set up various things so that we can make a list of input sections
3752 for each output section included in the link. Returns -1 on error,
3753 0 when no stubs will be needed, and 1 on success. */
3754
3755int
3756elf32_arm_setup_section_lists (bfd *output_bfd,
3757 struct bfd_link_info *info)
3758{
3759 bfd *input_bfd;
3760 unsigned int bfd_count;
3761 int top_id, top_index;
3762 asection *section;
3763 asection **input_list, **list;
3764 bfd_size_type amt;
3765 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3766
4dfe6ac6
NC		 3767 if (htab == NULL)
3768 return 0;
906e58ca
NC		 3769 if (! is_elf_hash_table (htab))
3770 return 0;
3771
3772 /* Count the number of input BFDs and find the top input section id. */
3773 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
3774 input_bfd != NULL;
3775 input_bfd = input_bfd->link_next)
3776 {
3777 bfd_count += 1;
3778 for (section = input_bfd->sections;
3779 section != NULL;
3780 section = section->next)
3781 {
3782 if (top_id < section->id)
3783 top_id = section->id;
3784 }
3785 }
3786 htab->bfd_count = bfd_count;
3787
3788 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 3789 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 3790 if (htab->stub_group == NULL)
3791 return -1;
fe33d2fa 3792 htab->top_id = top_id;
906e58ca
NC		 3793
3794 /* We can't use output_bfd->section_count here to find the top output
3795 section index as some sections may have been removed, and
3796 _bfd_strip_section_from_output doesn't renumber the indices. */
3797 for (section = output_bfd->sections, top_index = 0;
3798 section != NULL;
3799 section = section->next)
3800 {
3801 if (top_index < section->index)
3802 top_index = section->index;
3803 }
3804
3805 htab->top_index = top_index;
3806 amt = sizeof (asection *) * (top_index + 1);
21d799b5 3807 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 3808 htab->input_list = input_list;
3809 if (input_list == NULL)
3810 return -1;
3811
3812 /* For sections we aren't interested in, mark their entries with a
3813 value we can check later. */
3814 list = input_list + top_index;
3815 do
3816 *list = bfd_abs_section_ptr;
3817 while (list-- != input_list);
3818
3819 for (section = output_bfd->sections;
3820 section != NULL;
3821 section = section->next)
3822 {
3823 if ((section->flags & SEC_CODE) != 0)
3824 input_list[section->index] = NULL;
3825 }
3826
3827 return 1;
3828}
3829
3830/* The linker repeatedly calls this function for each input section,
3831 in the order that input sections are linked into output sections.
3832 Build lists of input sections to determine groupings between which
3833 we may insert linker stubs. */
3834
3835void
3836elf32_arm_next_input_section (struct bfd_link_info *info,
3837 asection *isec)
3838{
3839 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3840
4dfe6ac6
NC		 3841 if (htab == NULL)
3842 return;
3843
906e58ca
NC		 3844 if (isec->output_section->index <= htab->top_index)
3845 {
3846 asection **list = htab->input_list + isec->output_section->index;
3847
a7470592 3848 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 3849 {
3850 /* Steal the link_sec pointer for our list. */
3851#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3852 /* This happens to make the list in reverse order,
07d72278 3853 which we reverse later. */
906e58ca
NC		 3854 PREV_SEC (isec) = *list;
3855 *list = isec;
3856 }
3857 }
3858}
3859
3860/* See whether we can group stub sections together. Grouping stub
3861 sections may result in fewer stubs. More importantly, we need to
07d72278 3862 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 3863 .fini output sections respectively, because glibc splits the
3864 _init and _fini functions into multiple parts. Putting a stub in
3865 the middle of a function is not a good idea. */
3866
3867static void
3868group_sections (struct elf32_arm_link_hash_table *htab,
3869 bfd_size_type stub_group_size,
07d72278 3870 bfd_boolean stubs_always_after_branch)
906e58ca 3871{
07d72278 3872 asection **list = htab->input_list;
906e58ca
NC		 3873
3874 do
3875 {
3876 asection *tail = *list;
07d72278 3877 asection *head;
906e58ca
NC		 3878
3879 if (tail == bfd_abs_section_ptr)
3880 continue;
3881
07d72278
DJ		 3882 /* Reverse the list: we must avoid placing stubs at the
3883 beginning of the section because the beginning of the text
3884 section may be required for an interrupt vector in bare metal
3885 code. */
3886#define NEXT_SEC PREV_SEC
e780aef2
CL		 3887 head = NULL;
3888 while (tail != NULL)
3889 {
3890 /* Pop from tail. */
3891 asection *item = tail;
3892 tail = PREV_SEC (item);
3893
3894 /* Push on head. */
3895 NEXT_SEC (item) = head;
3896 head = item;
3897 }
07d72278
DJ		 3898
3899 while (head != NULL)
906e58ca
NC		 3900 {
3901 asection *curr;
07d72278 3902 asection *next;
e780aef2
CL		 3903 bfd_vma stub_group_start = head->output_offset;
3904 bfd_vma end_of_next;
906e58ca 3905
07d72278 3906 curr = head;
e780aef2 3907 while (NEXT_SEC (curr) != NULL)
8cd931b7 3908 {
e780aef2
CL		 3909 next = NEXT_SEC (curr);
3910 end_of_next = next->output_offset + next->size;
3911 if (end_of_next - stub_group_start >= stub_group_size)
3912 /* End of NEXT is too far from start, so stop. */
8cd931b7 3913 break;
e780aef2
CL		 3914 /* Add NEXT to the group. */
3915 curr = next;
8cd931b7 3916 }
906e58ca 3917
07d72278 3918 /* OK, the size from the start to the start of CURR is less
906e58ca 3919 than stub_group_size and thus can be handled by one stub
07d72278 3920 section. (Or the head section is itself larger than
906e58ca
NC		 3921 stub_group_size, in which case we may be toast.)
3922 We should really be keeping track of the total size of
3923 stubs added here, as stubs contribute to the final output
7fb9f789 3924 section size. */
906e58ca
NC		 3925 do
3926 {
07d72278 3927 next = NEXT_SEC (head);
906e58ca 3928 /* Set up this stub group. */
07d72278 3929 htab->stub_group[head->id].link_sec = curr;
906e58ca 3930 }
07d72278 3931 while (head != curr && (head = next) != NULL);
906e58ca
NC		 3932
3933 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 3934 bytes after the stub section can be handled by it too. */
3935 if (!stubs_always_after_branch)
906e58ca 3936 {
e780aef2
CL		 3937 stub_group_start = curr->output_offset + curr->size;
3938
8cd931b7 3939 while (next != NULL)
906e58ca 3940 {
e780aef2
CL		 3941 end_of_next = next->output_offset + next->size;
3942 if (end_of_next - stub_group_start >= stub_group_size)
3943 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 3944 break;
e780aef2 3945 /* Add NEXT to the stub group. */
07d72278
DJ		 3946 head = next;
3947 next = NEXT_SEC (head);
3948 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 3949 }
3950 }
07d72278 3951 head = next;
906e58ca
NC		 3952 }
3953 }
07d72278 3954 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 3955
3956 free (htab->input_list);
3957#undef PREV_SEC
07d72278 3958#undef NEXT_SEC
906e58ca
NC		 3959}
3960
48229727
JB		 3961/* Comparison function for sorting/searching relocations relating to Cortex-A8
3962 erratum fix. */
3963
3964static int
3965a8_reloc_compare (const void *a, const void *b)
3966{
21d799b5
NC		 3967 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
3968 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 3969
3970 if (ra->from < rb->from)
3971 return -1;
3972 else if (ra->from > rb->from)
3973 return 1;
3974 else
3975 return 0;
3976}
3977
3978static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
3979 const char *, char **);
3980
3981/* Helper function to scan code for sequences which might trigger the Cortex-A8
3982 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 3983 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 3984 otherwise. */
3985
81694485
NC		 3986static bfd_boolean
3987cortex_a8_erratum_scan (bfd *input_bfd,
3988 struct bfd_link_info *info,
48229727
JB		 3989 struct a8_erratum_fix **a8_fixes_p,
3990 unsigned int *num_a8_fixes_p,
3991 unsigned int *a8_fix_table_size_p,
3992 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 3993 unsigned int num_a8_relocs,
3994 unsigned prev_num_a8_fixes,
3995 bfd_boolean *stub_changed_p)
48229727
JB		 3996{
3997 asection *section;
3998 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
3999 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4000 unsigned int num_a8_fixes = *num_a8_fixes_p;
4001 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4002
4dfe6ac6
NC		 4003 if (htab == NULL)
4004 return FALSE;
4005
48229727
JB		 4006 for (section = input_bfd->sections;
4007 section != NULL;
4008 section = section->next)
4009 {
4010 bfd_byte *contents = NULL;
4011 struct _arm_elf_section_data *sec_data;
4012 unsigned int span;
4013 bfd_vma base_vma;
4014
4015 if (elf_section_type (section) != SHT_PROGBITS
4016 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4017 || (section->flags & SEC_EXCLUDE) != 0
4018 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
4019 || (section->output_section == bfd_abs_section_ptr))
4020 continue;
4021
4022 base_vma = section->output_section->vma + section->output_offset;
4023
4024 if (elf_section_data (section)->this_hdr.contents != NULL)
4025 contents = elf_section_data (section)->this_hdr.contents;
4026 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
81694485 4027 return TRUE;
48229727
JB		 4028
4029 sec_data = elf32_arm_section_data (section);
4030
4031 for (span = 0; span < sec_data->mapcount; span++)
4032 {
4033 unsigned int span_start = sec_data->map[span].vma;
4034 unsigned int span_end = (span == sec_data->mapcount - 1)
4035 ? section->size : sec_data->map[span + 1].vma;
4036 unsigned int i;
4037 char span_type = sec_data->map[span].type;
4038 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4039
4040 if (span_type != 't')
4041 continue;
4042
4043 /* Span is entirely within a single 4KB region: skip scanning. */
4044 if (((base_vma + span_start) & ~0xfff)
4045 == ((base_vma + span_end) & ~0xfff))
4046 continue;
4047
4048 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4049
4050 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4051 * The branch target is in the same 4KB region as the
4052 first half of the branch.
4053 * The instruction before the branch is a 32-bit
81694485 4054 length non-branch instruction. */
48229727
JB		 4055 for (i = span_start; i < span_end;)
4056 {
4057 unsigned int insn = bfd_getl16 (&contents[i]);
4058 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4059 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4060
4061 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4062 insn_32bit = TRUE;
4063
4064 if (insn_32bit)
4065 {
4066 /* Load the rest of the insn (in manual-friendly order). */
4067 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4068
4069 /* Encoding T4: B<c>.W. */
4070 is_b = (insn & 0xf800d000) == 0xf0009000;
4071 /* Encoding T1: BL<c>.W. */
4072 is_bl = (insn & 0xf800d000) == 0xf000d000;
4073 /* Encoding T2: BLX<c>.W. */
4074 is_blx = (insn & 0xf800d000) == 0xf000c000;
4075 /* Encoding T3: B<c>.W (not permitted in IT block). */
4076 is_bcc = (insn & 0xf800d000) == 0xf0008000
4077 && (insn & 0x07f00000) != 0x03800000;
4078 }
4079
4080 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4081
81694485
NC		 4082 if (((base_vma + i) & 0xfff) == 0xffe
4083 && insn_32bit
4084 && is_32bit_branch
4085 && last_was_32bit
4086 && ! last_was_branch)
48229727 4087 {
8f73510c 4088 bfd_signed_vma offset = 0;
48229727
JB		 4089 bfd_boolean force_target_arm = FALSE;
4090 bfd_boolean force_target_thumb = FALSE;
4091 bfd_vma target;
4092 enum elf32_arm_stub_type stub_type = arm_stub_none;
4093 struct a8_erratum_reloc key, *found;
4094
4095 key.from = base_vma + i;
21d799b5
NC		 4096 found = (struct a8_erratum_reloc *)
4097 bsearch (&key, a8_relocs, num_a8_relocs,
4098 sizeof (struct a8_erratum_reloc),
4099 &a8_reloc_compare);
48229727
JB		 4100
4101 if (found)
4102 {
4103 char *error_message = NULL;
4104 struct elf_link_hash_entry *entry;
92750f34 4105 bfd_boolean use_plt = FALSE;
48229727
JB		 4106
4107 /* We don't care about the error returned from this
4108 function, only if there is glue or not. */
4109 entry = find_thumb_glue (info, found->sym_name,
4110 &error_message);
4111
4112 if (entry)
4113 found->non_a8_stub = TRUE;
4114
92750f34
DJ		 4115 /* Keep a simpler condition, for the sake of clarity. */
4116 if (htab->splt != NULL && found->hash != NULL
4117 && found->hash->root.plt.offset != (bfd_vma) -1)
4118 use_plt = TRUE;
4119
4120 if (found->r_type == R_ARM_THM_CALL)
4121 {
4122 if (found->st_type != STT_ARM_TFUNC || use_plt)
4123 force_target_arm = TRUE;
4124 else
4125 force_target_thumb = TRUE;
4126 }
48229727
JB		 4127 }
4128
4129 /* Check if we have an offending branch instruction. */
4130
4131 if (found && found->non_a8_stub)
4132 /* We've already made a stub for this instruction, e.g.
4133 it's a long branch or a Thumb->ARM stub. Assume that
4134 stub will suffice to work around the A8 erratum (see
4135 setting of always_after_branch above). */
4136 ;
4137 else if (is_bcc)
4138 {
4139 offset = (insn & 0x7ff) << 1;
4140 offset |= (insn & 0x3f0000) >> 4;
4141 offset |= (insn & 0x2000) ? 0x40000 : 0;
4142 offset |= (insn & 0x800) ? 0x80000 : 0;
4143 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4144 if (offset & 0x100000)
81694485 4145 offset |= ~ ((bfd_signed_vma) 0xfffff);
48229727
JB		 4146 stub_type = arm_stub_a8_veneer_b_cond;
4147 }
4148 else if (is_b || is_bl || is_blx)
4149 {
4150 int s = (insn & 0x4000000) != 0;
4151 int j1 = (insn & 0x2000) != 0;
4152 int j2 = (insn & 0x800) != 0;
4153 int i1 = !(j1 ^ s);
4154 int i2 = !(j2 ^ s);
4155
4156 offset = (insn & 0x7ff) << 1;
4157 offset |= (insn & 0x3ff0000) >> 4;
4158 offset |= i2 << 22;
4159 offset |= i1 << 23;
4160 offset |= s << 24;
4161 if (offset & 0x1000000)
81694485 4162 offset |= ~ ((bfd_signed_vma) 0xffffff);
48229727
JB		 4163
4164 if (is_blx)
81694485 4165 offset &= ~ ((bfd_signed_vma) 3);
48229727
JB		 4166
4167 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4168 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4169 }
4170
4171 if (stub_type != arm_stub_none)
4172 {
4173 bfd_vma pc_for_insn = base_vma + i + 4;
4174
4175 /* The original instruction is a BL, but the target is
4176 an ARM instruction. If we were not making a stub,
4177 the BL would have been converted to a BLX. Use the
4178 BLX stub instead in that case. */
4179 if (htab->use_blx && force_target_arm
4180 && stub_type == arm_stub_a8_veneer_bl)
4181 {
4182 stub_type = arm_stub_a8_veneer_blx;
4183 is_blx = TRUE;
4184 is_bl = FALSE;
4185 }
4186 /* Conversely, if the original instruction was
4187 BLX but the target is Thumb mode, use the BL
4188 stub. */
4189 else if (force_target_thumb
4190 && stub_type == arm_stub_a8_veneer_blx)
4191 {
4192 stub_type = arm_stub_a8_veneer_bl;
4193 is_blx = FALSE;
4194 is_bl = TRUE;
4195 }
4196
4197 if (is_blx)
81694485 4198 pc_for_insn &= ~ ((bfd_vma) 3);
48229727
JB		 4199
4200 /* If we found a relocation, use the proper destination,
4201 not the offset in the (unrelocated) instruction.
4202 Note this is always done if we switched the stub type
4203 above. */
4204 if (found)
81694485
NC		 4205 offset =
4206 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727
JB		 4207
4208 target = pc_for_insn + offset;
4209
4210 /* The BLX stub is ARM-mode code. Adjust the offset to
4211 take the different PC value (+8 instead of +4) into
4212 account. */
4213 if (stub_type == arm_stub_a8_veneer_blx)
4214 offset += 4;
4215
4216 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4217 {
eb7c4339 4218 char *stub_name = NULL;
48229727
JB		 4219
4220 if (num_a8_fixes == a8_fix_table_size)
4221 {
4222 a8_fix_table_size *= 2;
21d799b5
NC		 4223 a8_fixes = (struct a8_erratum_fix *)
4224 bfd_realloc (a8_fixes,
4225 sizeof (struct a8_erratum_fix)
4226 * a8_fix_table_size);
48229727
JB		 4227 }
4228
eb7c4339
NS		 4229 if (num_a8_fixes < prev_num_a8_fixes)
4230 {
4231 /* If we're doing a subsequent scan,
4232 check if we've found the same fix as
4233 before, and try and reuse the stub
4234 name. */
4235 stub_name = a8_fixes[num_a8_fixes].stub_name;
4236 if ((a8_fixes[num_a8_fixes].section != section)
4237 || (a8_fixes[num_a8_fixes].offset != i))
4238 {
4239 free (stub_name);
4240 stub_name = NULL;
4241 *stub_changed_p = TRUE;
4242 }
4243 }
4244
4245 if (!stub_name)
4246 {
21d799b5 4247 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4248 if (stub_name != NULL)
4249 sprintf (stub_name, "%x:%x", section->id, i);
4250 }
48229727
JB		 4251
4252 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4253 a8_fixes[num_a8_fixes].section = section;
4254 a8_fixes[num_a8_fixes].offset = i;
4255 a8_fixes[num_a8_fixes].addend = offset;
4256 a8_fixes[num_a8_fixes].orig_insn = insn;
4257 a8_fixes[num_a8_fixes].stub_name = stub_name;
4258 a8_fixes[num_a8_fixes].stub_type = stub_type;
fe33d2fa
CL		 4259 a8_fixes[num_a8_fixes].st_type =
4260 is_blx ? STT_FUNC : STT_ARM_TFUNC;
48229727
JB		 4261
4262 num_a8_fixes++;
4263 }
4264 }
4265 }
4266
4267 i += insn_32bit ? 4 : 2;
4268 last_was_32bit = insn_32bit;
4269 last_was_branch = is_32bit_branch;
4270 }
4271 }
4272
4273 if (elf_section_data (section)->this_hdr.contents == NULL)
4274 free (contents);
4275 }
fe33d2fa 4276
48229727
JB		 4277 *a8_fixes_p = a8_fixes;
4278 *num_a8_fixes_p = num_a8_fixes;
4279 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4280
81694485 4281 return FALSE;
48229727
JB		 4282}
4283
906e58ca
NC		 4284/* Determine and set the size of the stub section for a final link.
4285
4286 The basic idea here is to examine all the relocations looking for
4287 PC-relative calls to a target that is unreachable with a "bl"
4288 instruction. */
4289
4290bfd_boolean
4291elf32_arm_size_stubs (bfd *output_bfd,
4292 bfd *stub_bfd,
4293 struct bfd_link_info *info,
4294 bfd_signed_vma group_size,
4295 asection * (*add_stub_section) (const char *, asection *),
4296 void (*layout_sections_again) (void))
4297{
4298 bfd_size_type stub_group_size;
07d72278 4299 bfd_boolean stubs_always_after_branch;
906e58ca 4300 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4301 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4302 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4303 struct a8_erratum_reloc *a8_relocs = NULL;
4304 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4305
4dfe6ac6
NC		 4306 if (htab == NULL)
4307 return FALSE;
4308
48229727
JB		 4309 if (htab->fix_cortex_a8)
4310 {
21d799b5
NC		 4311 a8_fixes = (struct a8_erratum_fix *)
4312 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4313 a8_relocs = (struct a8_erratum_reloc *)
4314 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4315 }
906e58ca
NC		 4316
4317 /* Propagate mach to stub bfd, because it may not have been
4318 finalized when we created stub_bfd. */
4319 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4320 bfd_get_mach (output_bfd));
4321
4322 /* Stash our params away. */
4323 htab->stub_bfd = stub_bfd;
4324 htab->add_stub_section = add_stub_section;
4325 htab->layout_sections_again = layout_sections_again;
07d72278 4326 stubs_always_after_branch = group_size < 0;
48229727
JB		 4327
4328 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4329 as the first half of a 32-bit branch straddling two 4K pages. This is a
4330 crude way of enforcing that. */
4331 if (htab->fix_cortex_a8)
4332 stubs_always_after_branch = 1;
4333
906e58ca
NC		 4334 if (group_size < 0)
4335 stub_group_size = -group_size;
4336 else
4337 stub_group_size = group_size;
4338
4339 if (stub_group_size == 1)
4340 {
4341 /* Default values. */
4342 /* Thumb branch range is +-4MB has to be used as the default
4343 maximum size (a given section can contain both ARM and Thumb
4344 code, so the worst case has to be taken into account).
4345
4346 This value is 24K less than that, which allows for 2025
4347 12-byte stubs. If we exceed that, then we will fail to link.
4348 The user will have to relink with an explicit group size
4349 option. */
4350 stub_group_size = 4170000;
4351 }
4352
07d72278 4353 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 4354
3ae046cc
NS		 4355 /* If we're applying the cortex A8 fix, we need to determine the
4356 program header size now, because we cannot change it later --
4357 that could alter section placements. Notice the A8 erratum fix
4358 ends up requiring the section addresses to remain unchanged
4359 modulo the page size. That's something we cannot represent
4360 inside BFD, and we don't want to force the section alignment to
4361 be the page size. */
4362 if (htab->fix_cortex_a8)
4363 (*htab->layout_sections_again) ();
4364
906e58ca
NC		 4365 while (1)
4366 {
4367 bfd *input_bfd;
4368 unsigned int bfd_indx;
4369 asection *stub_sec;
eb7c4339
NS		 4370 bfd_boolean stub_changed = FALSE;
4371 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 4372
48229727 4373 num_a8_fixes = 0;
906e58ca
NC		 4374 for (input_bfd = info->input_bfds, bfd_indx = 0;
4375 input_bfd != NULL;
4376 input_bfd = input_bfd->link_next, bfd_indx++)
4377 {
4378 Elf_Internal_Shdr *symtab_hdr;
4379 asection *section;
4380 Elf_Internal_Sym *local_syms = NULL;
4381
48229727
JB		 4382 num_a8_relocs = 0;
4383
906e58ca
NC		 4384 /* We'll need the symbol table in a second. */
4385 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4386 if (symtab_hdr->sh_info == 0)
4387 continue;
4388
4389 /* Walk over each section attached to the input bfd. */
4390 for (section = input_bfd->sections;
4391 section != NULL;
4392 section = section->next)
4393 {
4394 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4395
4396 /* If there aren't any relocs, then there's nothing more
4397 to do. */
4398 if ((section->flags & SEC_RELOC) == 0
4399 || section->reloc_count == 0
4400 || (section->flags & SEC_CODE) == 0)
4401 continue;
4402
4403 /* If this section is a link-once section that will be
4404 discarded, then don't create any stubs. */
4405 if (section->output_section == NULL
4406 || section->output_section->owner != output_bfd)
4407 continue;
4408
4409 /* Get the relocs. */
4410 internal_relocs
4411 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4412 NULL, info->keep_memory);
4413 if (internal_relocs == NULL)
4414 goto error_ret_free_local;
4415
4416 /* Now examine each relocation. */
4417 irela = internal_relocs;
4418 irelaend = irela + section->reloc_count;
4419 for (; irela < irelaend; irela++)
4420 {
4421 unsigned int r_type, r_indx;
4422 enum elf32_arm_stub_type stub_type;
4423 struct elf32_arm_stub_hash_entry *stub_entry;
4424 asection *sym_sec;
4425 bfd_vma sym_value;
4426 bfd_vma destination;
4427 struct elf32_arm_link_hash_entry *hash;
7413f23f 4428 const char *sym_name;
906e58ca
NC		 4429 char *stub_name;
4430 const asection *id_sec;
fe33d2fa 4431 int st_type;
48229727 4432 bfd_boolean created_stub = FALSE;
906e58ca
NC		 4433
4434 r_type = ELF32_R_TYPE (irela->r_info);
4435 r_indx = ELF32_R_SYM (irela->r_info);
4436
4437 if (r_type >= (unsigned int) R_ARM_max)
4438 {
4439 bfd_set_error (bfd_error_bad_value);
4440 error_ret_free_internal:
4441 if (elf_section_data (section)->relocs == NULL)
4442 free (internal_relocs);
4443 goto error_ret_free_local;
4444 }
4445
155d87d7 4446 /* Only look for stubs on branch instructions. */
906e58ca 4447 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 4448 && (r_type != (unsigned int) R_ARM_THM_CALL)
4449 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 4450 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
4451 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7
CL		 4452 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
4453 && (r_type != (unsigned int) R_ARM_PLT32))
906e58ca
NC		 4454 continue;
4455
4456 /* Now determine the call target, its name, value,
4457 section. */
4458 sym_sec = NULL;
4459 sym_value = 0;
4460 destination = 0;
4461 hash = NULL;
7413f23f 4462 sym_name = NULL;
906e58ca
NC		 4463 if (r_indx < symtab_hdr->sh_info)
4464 {
4465 /* It's a local symbol. */
4466 Elf_Internal_Sym *sym;
4467 Elf_Internal_Shdr *hdr;
4468
4469 if (local_syms == NULL)
4470 {
4471 local_syms
4472 = (Elf_Internal_Sym *) symtab_hdr->contents;
4473 if (local_syms == NULL)
4474 local_syms
4475 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
4476 symtab_hdr->sh_info, 0,
4477 NULL, NULL, NULL);
4478 if (local_syms == NULL)
4479 goto error_ret_free_internal;
4480 }
4481
4482 sym = local_syms + r_indx;
4483 hdr = elf_elfsections (input_bfd)[sym->st_shndx];
4484 sym_sec = hdr->bfd_section;
ffcb4889
NS		 4485 if (!sym_sec)
4486 /* This is an undefined symbol. It can never
4487 be resolved. */
4488 continue;
fe33d2fa 4489
906e58ca
NC		 4490 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
4491 sym_value = sym->st_value;
4492 destination = (sym_value + irela->r_addend
4493 + sym_sec->output_offset
4494 + sym_sec->output_section->vma);
4495 st_type = ELF_ST_TYPE (sym->st_info);
7413f23f
DJ		 4496 sym_name
4497 = bfd_elf_string_from_elf_section (input_bfd,
4498 symtab_hdr->sh_link,
4499 sym->st_name);
906e58ca
NC		 4500 }
4501 else
4502 {
4503 /* It's an external symbol. */
4504 int e_indx;
4505
4506 e_indx = r_indx - symtab_hdr->sh_info;
4507 hash = ((struct elf32_arm_link_hash_entry *)
4508 elf_sym_hashes (input_bfd)[e_indx]);
4509
4510 while (hash->root.root.type == bfd_link_hash_indirect
4511 || hash->root.root.type == bfd_link_hash_warning)
4512 hash = ((struct elf32_arm_link_hash_entry *)
4513 hash->root.root.u.i.link);
4514
4515 if (hash->root.root.type == bfd_link_hash_defined
4516 || hash->root.root.type == bfd_link_hash_defweak)
4517 {
4518 sym_sec = hash->root.root.u.def.section;
4519 sym_value = hash->root.root.u.def.value;
022f8312
CL		 4520
4521 struct elf32_arm_link_hash_table *globals =
4522 elf32_arm_hash_table (info);
4523
4524 /* For a destination in a shared library,
4525 use the PLT stub as target address to
4526 decide whether a branch stub is
4527 needed. */
4dfe6ac6
NC		 4528 if (globals != NULL
4529 && globals->splt != NULL
4530 && hash != NULL
022f8312
CL		 4531 && hash->root.plt.offset != (bfd_vma) -1)
4532 {
4533 sym_sec = globals->splt;
4534 sym_value = hash->root.plt.offset;
4535 if (sym_sec->output_section != NULL)
4536 destination = (sym_value
4537 + sym_sec->output_offset
4538 + sym_sec->output_section->vma);
4539 }
4540 else if (sym_sec->output_section != NULL)
906e58ca
NC		 4541 destination = (sym_value + irela->r_addend
4542 + sym_sec->output_offset
4543 + sym_sec->output_section->vma);
4544 }
69c5861e
CL		 4545 else if ((hash->root.root.type == bfd_link_hash_undefined)
4546 || (hash->root.root.type == bfd_link_hash_undefweak))
4547 {
4548 /* For a shared library, use the PLT stub as
4549 target address to decide whether a long
4550 branch stub is needed.
4551 For absolute code, they cannot be handled. */
4552 struct elf32_arm_link_hash_table *globals =
4553 elf32_arm_hash_table (info);
4554
4dfe6ac6
NC		 4555 if (globals != NULL
4556 && globals->splt != NULL
4557 && hash != NULL
69c5861e
CL		 4558 && hash->root.plt.offset != (bfd_vma) -1)
4559 {
4560 sym_sec = globals->splt;
4561 sym_value = hash->root.plt.offset;
4562 if (sym_sec->output_section != NULL)
4563 destination = (sym_value
4564 + sym_sec->output_offset
4565 + sym_sec->output_section->vma);
4566 }
4567 else
4568 continue;
4569 }
906e58ca
NC		 4570 else
4571 {
4572 bfd_set_error (bfd_error_bad_value);
4573 goto error_ret_free_internal;
4574 }
4575 st_type = ELF_ST_TYPE (hash->root.type);
7413f23f 4576 sym_name = hash->root.root.root.string;
906e58ca
NC		 4577 }
4578
48229727 4579 do
7413f23f 4580 {
48229727
JB		 4581 /* Determine what (if any) linker stub is needed. */
4582 stub_type = arm_type_of_stub (info, section, irela,
fe33d2fa 4583 &st_type, hash,
48229727
JB		 4584 destination, sym_sec,
4585 input_bfd, sym_name);
4586 if (stub_type == arm_stub_none)
4587 break;
4588
4589 /* Support for grouping stub sections. */
4590 id_sec = htab->stub_group[section->id].link_sec;
4591
4592 /* Get the name of this stub. */
4593 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 4594 irela, stub_type);
48229727
JB		 4595 if (!stub_name)
4596 goto error_ret_free_internal;
4597
4598 /* We've either created a stub for this reloc already,
4599 or we are about to. */
4600 created_stub = TRUE;
4601
4602 stub_entry = arm_stub_hash_lookup
4603 (&htab->stub_hash_table, stub_name,
4604 FALSE, FALSE);
4605 if (stub_entry != NULL)
4606 {
4607 /* The proper stub has already been created. */
4608 free (stub_name);
eb7c4339 4609 stub_entry->target_value = sym_value;
48229727
JB		 4610 break;
4611 }
7413f23f 4612
48229727
JB		 4613 stub_entry = elf32_arm_add_stub (stub_name, section,
4614 htab);
4615 if (stub_entry == NULL)
4616 {
4617 free (stub_name);
4618 goto error_ret_free_internal;
4619 }
7413f23f 4620
48229727
JB		 4621 stub_entry->target_value = sym_value;
4622 stub_entry->target_section = sym_sec;
4623 stub_entry->stub_type = stub_type;
4624 stub_entry->h = hash;
4625 stub_entry->st_type = st_type;
4626
4627 if (sym_name == NULL)
4628 sym_name = "unnamed";
21d799b5
NC		 4629 stub_entry->output_name = (char *)
4630 bfd_alloc (htab->stub_bfd,
48229727
JB		 4631 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
4632 + strlen (sym_name));
4633 if (stub_entry->output_name == NULL)
4634 {
4635 free (stub_name);
4636 goto error_ret_free_internal;
4637 }
4638
4639 /* For historical reasons, use the existing names for
4640 ARM-to-Thumb and Thumb-to-ARM stubs. */
4641 if ( ((r_type == (unsigned int) R_ARM_THM_CALL)
4642 || (r_type == (unsigned int) R_ARM_THM_JUMP24))
4643 && st_type != STT_ARM_TFUNC)
4644 sprintf (stub_entry->output_name,
4645 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
4646 else if ( ((r_type == (unsigned int) R_ARM_CALL)
4647 || (r_type == (unsigned int) R_ARM_JUMP24))
4648 && st_type == STT_ARM_TFUNC)
4649 sprintf (stub_entry->output_name,
4650 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
4651 else
4652 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
4653 sym_name);
4654
4655 stub_changed = TRUE;
4656 }
4657 while (0);
4658
4659 /* Look for relocations which might trigger Cortex-A8
4660 erratum. */
4661 if (htab->fix_cortex_a8
4662 && (r_type == (unsigned int) R_ARM_THM_JUMP24
4663 || r_type == (unsigned int) R_ARM_THM_JUMP19
4664 || r_type == (unsigned int) R_ARM_THM_CALL
4665 || r_type == (unsigned int) R_ARM_THM_XPC22))
4666 {
4667 bfd_vma from = section->output_section->vma
4668 + section->output_offset
4669 + irela->r_offset;
4670
4671 if ((from & 0xfff) == 0xffe)
4672 {
4673 /* Found a candidate. Note we haven't checked the
4674 destination is within 4K here: if we do so (and
4675 don't create an entry in a8_relocs) we can't tell
4676 that a branch should have been relocated when
4677 scanning later. */
4678 if (num_a8_relocs == a8_reloc_table_size)
4679 {
4680 a8_reloc_table_size *= 2;
21d799b5
NC		 4681 a8_relocs = (struct a8_erratum_reloc *)
4682 bfd_realloc (a8_relocs,
4683 sizeof (struct a8_erratum_reloc)
4684 * a8_reloc_table_size);
48229727
JB		 4685 }
4686
4687 a8_relocs[num_a8_relocs].from = from;
4688 a8_relocs[num_a8_relocs].destination = destination;
4689 a8_relocs[num_a8_relocs].r_type = r_type;
4690 a8_relocs[num_a8_relocs].st_type = st_type;
4691 a8_relocs[num_a8_relocs].sym_name = sym_name;
4692 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
92750f34 4693 a8_relocs[num_a8_relocs].hash = hash;
48229727
JB		 4694
4695 num_a8_relocs++;
4696 }
4697 }
906e58ca
NC		 4698 }
4699
48229727
JB		 4700 /* We're done with the internal relocs, free them. */
4701 if (elf_section_data (section)->relocs == NULL)
4702 free (internal_relocs);
4703 }
4704
4705 if (htab->fix_cortex_a8)
4706 {
4707 /* Sort relocs which might apply to Cortex-A8 erratum. */
eb7c4339
NS		 4708 qsort (a8_relocs, num_a8_relocs,
4709 sizeof (struct a8_erratum_reloc),
48229727
JB		 4710 &a8_reloc_compare);
4711
4712 /* Scan for branches which might trigger Cortex-A8 erratum. */
4713 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
4714 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 4715 a8_relocs, num_a8_relocs,
4716 prev_num_a8_fixes, &stub_changed)
4717 != 0)
48229727 4718 goto error_ret_free_local;
5e681ec4 4719 }
5e681ec4
PB		 4720 }
4721
eb7c4339 4722 if (prev_num_a8_fixes != num_a8_fixes)
48229727
JB		 4723 stub_changed = TRUE;
4724
906e58ca
NC		 4725 if (!stub_changed)
4726 break;
5e681ec4 4727
906e58ca
NC		 4728 /* OK, we've added some stubs. Find out the new size of the
4729 stub sections. */
4730 for (stub_sec = htab->stub_bfd->sections;
4731 stub_sec != NULL;
4732 stub_sec = stub_sec->next)
3e6b1042
DJ		 4733 {
4734 /* Ignore non-stub sections. */
4735 if (!strstr (stub_sec->name, STUB_SUFFIX))
4736 continue;
4737
4738 stub_sec->size = 0;
4739 }
b34b2d70 4740
906e58ca
NC		 4741 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
4742
48229727
JB		 4743 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
4744 if (htab->fix_cortex_a8)
4745 for (i = 0; i < num_a8_fixes; i++)
4746 {
4747 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
4748 a8_fixes[i].section, htab);
4749
4750 if (stub_sec == NULL)
4751 goto error_ret_free_local;
4752
4753 stub_sec->size
4754 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
4755 NULL);
4756 }
4757
4758
906e58ca
NC		 4759 /* Ask the linker to do its stuff. */
4760 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 4761 }
4762
48229727
JB		 4763 /* Add stubs for Cortex-A8 erratum fixes now. */
4764 if (htab->fix_cortex_a8)
4765 {
4766 for (i = 0; i < num_a8_fixes; i++)
4767 {
4768 struct elf32_arm_stub_hash_entry *stub_entry;
4769 char *stub_name = a8_fixes[i].stub_name;
4770 asection *section = a8_fixes[i].section;
4771 unsigned int section_id = a8_fixes[i].section->id;
4772 asection *link_sec = htab->stub_group[section_id].link_sec;
4773 asection *stub_sec = htab->stub_group[section_id].stub_sec;
d3ce72d0 4774 const insn_sequence *template_sequence;
48229727
JB		 4775 int template_size, size = 0;
4776
4777 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4778 TRUE, FALSE);
4779 if (stub_entry == NULL)
4780 {
4781 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4782 section->owner,
4783 stub_name);
4784 return FALSE;
4785 }
4786
4787 stub_entry->stub_sec = stub_sec;
4788 stub_entry->stub_offset = 0;
4789 stub_entry->id_sec = link_sec;
4790 stub_entry->stub_type = a8_fixes[i].stub_type;
4791 stub_entry->target_section = a8_fixes[i].section;
4792 stub_entry->target_value = a8_fixes[i].offset;
4793 stub_entry->target_addend = a8_fixes[i].addend;
4794 stub_entry->orig_insn = a8_fixes[i].orig_insn;
fe33d2fa 4795 stub_entry->st_type = a8_fixes[i].st_type;
48229727 4796
d3ce72d0
NC		 4797 size = find_stub_size_and_template (a8_fixes[i].stub_type,
4798 &template_sequence,
48229727
JB		 4799 &template_size);
4800
4801 stub_entry->stub_size = size;
d3ce72d0 4802 stub_entry->stub_template = template_sequence;
48229727
JB		 4803 stub_entry->stub_template_size = template_size;
4804 }
4805
4806 /* Stash the Cortex-A8 erratum fix array for use later in
4807 elf32_arm_write_section(). */
4808 htab->a8_erratum_fixes = a8_fixes;
4809 htab->num_a8_erratum_fixes = num_a8_fixes;
4810 }
4811 else
4812 {
4813 htab->a8_erratum_fixes = NULL;
4814 htab->num_a8_erratum_fixes = 0;
4815 }
906e58ca
NC		 4816 return TRUE;
4817
4818 error_ret_free_local:
4819 return FALSE;
5e681ec4
PB		 4820}
4821
906e58ca
NC		 4822/* Build all the stubs associated with the current output file. The
4823 stubs are kept in a hash table attached to the main linker hash
4824 table. We also set up the .plt entries for statically linked PIC
4825 functions here. This function is called via arm_elf_finish in the
4826 linker. */
252b5132 4827
906e58ca
NC		 4828bfd_boolean
4829elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 4830{
906e58ca
NC		 4831 asection *stub_sec;
4832 struct bfd_hash_table *table;
4833 struct elf32_arm_link_hash_table *htab;
252b5132 4834
906e58ca 4835 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4836 if (htab == NULL)
4837 return FALSE;
252b5132 4838
906e58ca
NC		 4839 for (stub_sec = htab->stub_bfd->sections;
4840 stub_sec != NULL;
4841 stub_sec = stub_sec->next)
252b5132 4842 {
906e58ca
NC		 4843 bfd_size_type size;
4844
8029a119 4845 /* Ignore non-stub sections. */
906e58ca
NC		 4846 if (!strstr (stub_sec->name, STUB_SUFFIX))
4847 continue;
4848
4849 /* Allocate memory to hold the linker stubs. */
4850 size = stub_sec->size;
21d799b5 4851 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 4852 if (stub_sec->contents == NULL && size != 0)
4853 return FALSE;
4854 stub_sec->size = 0;
252b5132
RH		 4855 }
4856
906e58ca
NC		 4857 /* Build the stubs as directed by the stub hash table. */
4858 table = &htab->stub_hash_table;
4859 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 4860 if (htab->fix_cortex_a8)
4861 {
4862 /* Place the cortex a8 stubs last. */
4863 htab->fix_cortex_a8 = -1;
4864 bfd_hash_traverse (table, arm_build_one_stub, info);
4865 }
252b5132 4866
906e58ca 4867 return TRUE;
252b5132
RH		 4868}
4869
9b485d32
NC		 4870/* Locate the Thumb encoded calling stub for NAME. */
4871
252b5132 4872static struct elf_link_hash_entry *
57e8b36a
NC		 4873find_thumb_glue (struct bfd_link_info *link_info,
4874 const char *name,
f2a9dd69 4875 char **error_message)
252b5132
RH		 4876{
4877 char *tmp_name;
4878 struct elf_link_hash_entry *hash;
4879 struct elf32_arm_link_hash_table *hash_table;
4880
4881 /* We need a pointer to the armelf specific hash table. */
4882 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4883 if (hash_table == NULL)
4884 return NULL;
252b5132 4885
21d799b5
NC		 4886 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4887 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4888
4889 BFD_ASSERT (tmp_name);
4890
4891 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
4892
4893 hash = elf_link_hash_lookup
b34976b6 4894 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4895
b1657152
AM		 4896 if (hash == NULL
4897 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
4898 tmp_name, name) == -1)
4899 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4900
4901 free (tmp_name);
4902
4903 return hash;
4904}
4905
9b485d32
NC		 4906/* Locate the ARM encoded calling stub for NAME. */
4907
252b5132 4908static struct elf_link_hash_entry *
57e8b36a
NC		 4909find_arm_glue (struct bfd_link_info *link_info,
4910 const char *name,
f2a9dd69 4911 char **error_message)
252b5132
RH		 4912{
4913 char *tmp_name;
4914 struct elf_link_hash_entry *myh;
4915 struct elf32_arm_link_hash_table *hash_table;
4916
4917 /* We need a pointer to the elfarm specific hash table. */
4918 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 4919 if (hash_table == NULL)
4920 return NULL;
252b5132 4921
21d799b5
NC		 4922 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
4923 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 4924
4925 BFD_ASSERT (tmp_name);
4926
4927 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
4928
4929 myh = elf_link_hash_lookup
b34976b6 4930 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 4931
b1657152
AM		 4932 if (myh == NULL
4933 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
4934 tmp_name, name) == -1)
4935 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 4936
4937 free (tmp_name);
4938
4939 return myh;
4940}
4941
8f6277f5 4942/* ARM->Thumb glue (static images):
252b5132
RH		 4943
4944 .arm
4945 __func_from_arm:
4946 ldr r12, __func_addr
4947 bx r12
4948 __func_addr:
906e58ca 4949 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 4950
26079076
PB		 4951 (v5t static images)
4952 .arm
4953 __func_from_arm:
4954 ldr pc, __func_addr
4955 __func_addr:
906e58ca 4956 .word func @ behave as if you saw a ARM_32 reloc.
26079076 4957
8f6277f5
PB		 4958 (relocatable images)
4959 .arm
4960 __func_from_arm:
4961 ldr r12, __func_offset
4962 add r12, r12, pc
4963 bx r12
4964 __func_offset:
8029a119 4965 .word func - . */
8f6277f5
PB		 4966
4967#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 4968static const insn32 a2t1_ldr_insn = 0xe59fc000;
4969static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
4970static const insn32 a2t3_func_addr_insn = 0x00000001;
4971
26079076
PB		 4972#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4973static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
4974static const insn32 a2t2v5_func_addr_insn = 0x00000001;
4975
8f6277f5
PB		 4976#define ARM2THUMB_PIC_GLUE_SIZE 16
4977static const insn32 a2t1p_ldr_insn = 0xe59fc004;
4978static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
4979static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
4980
9b485d32 4981/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 4982
8029a119
NC		 4983 .thumb .thumb
4984 .align 2 .align 2
4985 __func_from_thumb: __func_from_thumb:
4986 bx pc push {r6, lr}
4987 nop ldr r6, __func_addr
4988 .arm mov lr, pc
4989 b func bx r6
fcef9eb7
NC		 4990 .arm
4991 ;; back_to_thumb
4992 ldmia r13! {r6, lr}
4993 bx lr
8029a119
NC		 4994 __func_addr:
4995 .word func */
252b5132
RH		 4996
4997#define THUMB2ARM_GLUE_SIZE 8
4998static const insn16 t2a1_bx_pc_insn = 0x4778;
4999static const insn16 t2a2_noop_insn = 0x46c0;
5000static const insn32 t2a3_b_insn = 0xea000000;
5001
c7b8f16e
JB		 5002#define VFP11_ERRATUM_VENEER_SIZE 8
5003
845b51d6
PB		 5004#define ARM_BX_VENEER_SIZE 12
5005static const insn32 armbx1_tst_insn = 0xe3100001;
5006static const insn32 armbx2_moveq_insn = 0x01a0f000;
5007static const insn32 armbx3_bx_insn = 0xe12fff10;
5008
7e392df6 5009#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5010static void
5011arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5012{
5013 asection * s;
8029a119 5014 bfd_byte * contents;
252b5132 5015
8029a119 5016 if (size == 0)
3e6b1042
DJ		 5017 {
5018 /* Do not include empty glue sections in the output. */
5019 if (abfd != NULL)
5020 {
5021 s = bfd_get_section_by_name (abfd, name);
5022 if (s != NULL)
5023 s->flags |= SEC_EXCLUDE;
5024 }
5025 return;
5026 }
252b5132 5027
8029a119 5028 BFD_ASSERT (abfd != NULL);
252b5132 5029
8029a119
NC		 5030 s = bfd_get_section_by_name (abfd, name);
5031 BFD_ASSERT (s != NULL);
252b5132 5032
21d799b5 5033 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5034
8029a119
NC		 5035 BFD_ASSERT (s->size == size);
5036 s->contents = contents;
5037}
906e58ca 5038
8029a119
NC		 5039bfd_boolean
5040bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5041{
5042 struct elf32_arm_link_hash_table * globals;
906e58ca 5043
8029a119
NC		 5044 globals = elf32_arm_hash_table (info);
5045 BFD_ASSERT (globals != NULL);
906e58ca 5046
8029a119
NC		 5047 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5048 globals->arm_glue_size,
5049 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5050
8029a119
NC		 5051 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5052 globals->thumb_glue_size,
5053 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5054
8029a119
NC		 5055 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5056 globals->vfp11_erratum_glue_size,
5057 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5058
8029a119
NC		 5059 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5060 globals->bx_glue_size,
845b51d6
PB		 5061 ARM_BX_GLUE_SECTION_NAME);
5062
b34976b6 5063 return TRUE;
252b5132
RH		 5064}
5065
a4fd1a8e 5066/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5067 returns the symbol identifying the stub. */
5068
a4fd1a8e 5069static struct elf_link_hash_entry *
57e8b36a
NC		 5070record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5071 struct elf_link_hash_entry * h)
252b5132
RH		 5072{
5073 const char * name = h->root.root.string;
63b0f745 5074 asection * s;
252b5132
RH		 5075 char * tmp_name;
5076 struct elf_link_hash_entry * myh;
14a793b2 5077 struct bfd_link_hash_entry * bh;
252b5132 5078 struct elf32_arm_link_hash_table * globals;
dc810e39 5079 bfd_vma val;
2f475487 5080 bfd_size_type size;
252b5132
RH		 5081
5082 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5083 BFD_ASSERT (globals != NULL);
5084 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5085
5086 s = bfd_get_section_by_name
5087 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5088
252b5132
RH		 5089 BFD_ASSERT (s != NULL);
5090
21d799b5
NC		 5091 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5092 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5093
5094 BFD_ASSERT (tmp_name);
5095
5096 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5097
5098 myh = elf_link_hash_lookup
b34976b6 5099 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5100
5101 if (myh != NULL)
5102 {
9b485d32 5103 /* We've already seen this guy. */
252b5132 5104 free (tmp_name);
a4fd1a8e 5105 return myh;
252b5132
RH		 5106 }
5107
57e8b36a
NC		 5108 /* The only trick here is using hash_table->arm_glue_size as the value.
5109 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5110 putting it. The +1 on the value marks that the stub has not been
5111 output yet - not that it is a Thumb function. */
14a793b2 5112 bh = NULL;
dc810e39
AM		 5113 val = globals->arm_glue_size + 1;
5114 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5115 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5116 NULL, TRUE, FALSE, &bh);
252b5132 5117
b7693d02
DJ		 5118 myh = (struct elf_link_hash_entry *) bh;
5119 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5120 myh->forced_local = 1;
5121
252b5132
RH		 5122 free (tmp_name);
5123
27e55c4d
PB		 5124 if (link_info->shared || globals->root.is_relocatable_executable
5125 || globals->pic_veneer)
2f475487 5126 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5127 else if (globals->use_blx)
5128 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5129 else
2f475487
AM		 5130 size = ARM2THUMB_STATIC_GLUE_SIZE;
5131
5132 s->size += size;
5133 globals->arm_glue_size += size;
252b5132 5134
a4fd1a8e 5135 return myh;
252b5132
RH		 5136}
5137
845b51d6
PB		 5138/* Allocate space for ARMv4 BX veneers. */
5139
5140static void
5141record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5142{
5143 asection * s;
5144 struct elf32_arm_link_hash_table *globals;
5145 char *tmp_name;
5146 struct elf_link_hash_entry *myh;
5147 struct bfd_link_hash_entry *bh;
5148 bfd_vma val;
5149
5150 /* BX PC does not need a veneer. */
5151 if (reg == 15)
5152 return;
5153
5154 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5155 BFD_ASSERT (globals != NULL);
5156 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5157
5158 /* Check if this veneer has already been allocated. */
5159 if (globals->bx_glue_offset[reg])
5160 return;
5161
5162 s = bfd_get_section_by_name
5163 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5164
5165 BFD_ASSERT (s != NULL);
5166
5167 /* Add symbol for veneer. */
21d799b5
NC		 5168 tmp_name = (char *)
5169 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5170
845b51d6 5171 BFD_ASSERT (tmp_name);
906e58ca 5172
845b51d6 5173 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5174
845b51d6
PB		 5175 myh = elf_link_hash_lookup
5176 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5177
845b51d6 5178 BFD_ASSERT (myh == NULL);
906e58ca 5179
845b51d6
PB		 5180 bh = NULL;
5181 val = globals->bx_glue_size;
5182 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5183 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5184 NULL, TRUE, FALSE, &bh);
5185
5186 myh = (struct elf_link_hash_entry *) bh;
5187 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5188 myh->forced_local = 1;
5189
5190 s->size += ARM_BX_VENEER_SIZE;
5191 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5192 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5193}
5194
5195
c7b8f16e
JB		 5196/* Add an entry to the code/data map for section SEC. */
5197
5198static void
5199elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5200{
5201 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5202 unsigned int newidx;
906e58ca 5203
c7b8f16e
JB		 5204 if (sec_data->map == NULL)
5205 {
21d799b5
NC		 5206 sec_data->map = (elf32_arm_section_map *)
5207 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5208 sec_data->mapcount = 0;
5209 sec_data->mapsize = 1;
5210 }
906e58ca 5211
c7b8f16e 5212 newidx = sec_data->mapcount++;
906e58ca 5213
c7b8f16e
JB		 5214 if (sec_data->mapcount > sec_data->mapsize)
5215 {
5216 sec_data->mapsize *= 2;
21d799b5
NC		 5217 sec_data->map = (elf32_arm_section_map *)
5218 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5219 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5220 }
5221
5222 if (sec_data->map)
5223 {
5224 sec_data->map[newidx].vma = vma;
5225 sec_data->map[newidx].type = type;
c7b8f16e 5226 }
c7b8f16e
JB		 5227}
5228
5229
5230/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5231 veneers are handled for now. */
5232
5233static bfd_vma
5234record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5235 elf32_vfp11_erratum_list *branch,
5236 bfd *branch_bfd,
5237 asection *branch_sec,
5238 unsigned int offset)
5239{
5240 asection *s;
5241 struct elf32_arm_link_hash_table *hash_table;
5242 char *tmp_name;
5243 struct elf_link_hash_entry *myh;
5244 struct bfd_link_hash_entry *bh;
5245 bfd_vma val;
5246 struct _arm_elf_section_data *sec_data;
5247 int errcount;
5248 elf32_vfp11_erratum_list *newerr;
906e58ca 5249
c7b8f16e 5250 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5251 BFD_ASSERT (hash_table != NULL);
5252 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5253
c7b8f16e
JB		 5254 s = bfd_get_section_by_name
5255 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5256
c7b8f16e 5257 sec_data = elf32_arm_section_data (s);
906e58ca 5258
c7b8f16e 5259 BFD_ASSERT (s != NULL);
906e58ca 5260
21d799b5
NC		 5261 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5262 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5263
c7b8f16e 5264 BFD_ASSERT (tmp_name);
906e58ca 5265
c7b8f16e
JB		 5266 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5267 hash_table->num_vfp11_fixes);
906e58ca 5268
c7b8f16e
JB		 5269 myh = elf_link_hash_lookup
5270 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5271
c7b8f16e 5272 BFD_ASSERT (myh == NULL);
906e58ca 5273
c7b8f16e
JB		 5274 bh = NULL;
5275 val = hash_table->vfp11_erratum_glue_size;
5276 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5277 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5278 NULL, TRUE, FALSE, &bh);
5279
5280 myh = (struct elf_link_hash_entry *) bh;
5281 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5282 myh->forced_local = 1;
5283
5284 /* Link veneer back to calling location. */
5285 errcount = ++(sec_data->erratumcount);
21d799b5
NC		 5286 newerr = (elf32_vfp11_erratum_list *)
5287 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5288
c7b8f16e
JB		 5289 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5290 newerr->vma = -1;
5291 newerr->u.v.branch = branch;
5292 newerr->u.v.id = hash_table->num_vfp11_fixes;
5293 branch->u.b.veneer = newerr;
5294
5295 newerr->next = sec_data->erratumlist;
5296 sec_data->erratumlist = newerr;
5297
5298 /* A symbol for the return from the veneer. */
5299 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5300 hash_table->num_vfp11_fixes);
5301
5302 myh = elf_link_hash_lookup
5303 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5304
c7b8f16e
JB		 5305 if (myh != NULL)
5306 abort ();
5307
5308 bh = NULL;
5309 val = offset + 4;
5310 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5311 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 5312
c7b8f16e
JB		 5313 myh = (struct elf_link_hash_entry *) bh;
5314 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5315 myh->forced_local = 1;
5316
5317 free (tmp_name);
906e58ca 5318
c7b8f16e
JB		 5319 /* Generate a mapping symbol for the veneer section, and explicitly add an
5320 entry for that symbol to the code/data map for the section. */
5321 if (hash_table->vfp11_erratum_glue_size == 0)
5322 {
5323 bh = NULL;
5324 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5325 ever requires this erratum fix. */
5326 _bfd_generic_link_add_one_symbol (link_info,
5327 hash_table->bfd_of_glue_owner, "$a",
5328 BSF_LOCAL, s, 0, NULL,
5329 TRUE, FALSE, &bh);
5330
5331 myh = (struct elf_link_hash_entry *) bh;
5332 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5333 myh->forced_local = 1;
906e58ca 5334
c7b8f16e
JB		 5335 /* The elf32_arm_init_maps function only cares about symbols from input
5336 BFDs. We must make a note of this generated mapping symbol
5337 ourselves so that code byteswapping works properly in
5338 elf32_arm_write_section. */
5339 elf32_arm_section_map_add (s, 'a', 0);
5340 }
906e58ca 5341
c7b8f16e
JB		 5342 s->size += VFP11_ERRATUM_VENEER_SIZE;
5343 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5344 hash_table->num_vfp11_fixes++;
906e58ca 5345
c7b8f16e
JB		 5346 /* The offset of the veneer. */
5347 return val;
5348}
5349
8029a119 5350#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 5351 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5352 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 5353
5354/* Create a fake section for use by the ARM backend of the linker. */
5355
5356static bfd_boolean
5357arm_make_glue_section (bfd * abfd, const char * name)
5358{
5359 asection * sec;
5360
5361 sec = bfd_get_section_by_name (abfd, name);
5362 if (sec != NULL)
5363 /* Already made. */
5364 return TRUE;
5365
5366 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5367
5368 if (sec == NULL
5369 || !bfd_set_section_alignment (abfd, sec, 2))
5370 return FALSE;
5371
5372 /* Set the gc mark to prevent the section from being removed by garbage
5373 collection, despite the fact that no relocs refer to this section. */
5374 sec->gc_mark = 1;
5375
5376 return TRUE;
5377}
5378
8afb0e02
NC		 5379/* Add the glue sections to ABFD. This function is called from the
5380 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 5381
b34976b6 5382bfd_boolean
57e8b36a
NC		 5383bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5384 struct bfd_link_info *info)
252b5132 5385{
8afb0e02
NC		 5386 /* If we are only performing a partial
5387 link do not bother adding the glue. */
1049f94e 5388 if (info->relocatable)
b34976b6 5389 return TRUE;
252b5132 5390
8029a119
NC		 5391 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5392 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
5393 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
5394 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 5395}
5396
5397/* Select a BFD to be used to hold the sections used by the glue code.
5398 This function is called from the linker scripts in ld/emultempl/
8029a119 5399 {armelf/pe}.em. */
8afb0e02 5400
b34976b6 5401bfd_boolean
57e8b36a 5402bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 5403{
5404 struct elf32_arm_link_hash_table *globals;
5405
5406 /* If we are only performing a partial link
5407 do not bother getting a bfd to hold the glue. */
1049f94e 5408 if (info->relocatable)
b34976b6 5409 return TRUE;
8afb0e02 5410
b7693d02
DJ		 5411 /* Make sure we don't attach the glue sections to a dynamic object. */
5412 BFD_ASSERT (!(abfd->flags & DYNAMIC));
5413
8afb0e02 5414 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 5415 BFD_ASSERT (globals != NULL);
5416
5417 if (globals->bfd_of_glue_owner != NULL)
b34976b6 5418 return TRUE;
8afb0e02 5419
252b5132
RH		 5420 /* Save the bfd for later use. */
5421 globals->bfd_of_glue_owner = abfd;
cedb70c5 5422
b34976b6 5423 return TRUE;
252b5132
RH		 5424}
5425
906e58ca
NC		 5426static void
5427check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 5428{
104d59d1
JM		 5429 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
5430 Tag_CPU_arch) > 2)
39b41c9c
PB		 5431 globals->use_blx = 1;
5432}
5433
b34976b6 5434bfd_boolean
57e8b36a 5435bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 5436 struct bfd_link_info *link_info)
252b5132
RH		 5437{
5438 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 5439 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 5440 Elf_Internal_Rela *irel, *irelend;
5441 bfd_byte *contents = NULL;
252b5132
RH		 5442
5443 asection *sec;
5444 struct elf32_arm_link_hash_table *globals;
5445
5446 /* If we are only performing a partial link do not bother
5447 to construct any glue. */
1049f94e 5448 if (link_info->relocatable)
b34976b6 5449 return TRUE;
252b5132 5450
39ce1a6a
NC		 5451 /* Here we have a bfd that is to be included on the link. We have a
5452 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 5453 globals = elf32_arm_hash_table (link_info);
252b5132 5454 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 5455
5456 check_use_blx (globals);
252b5132 5457
d504ffc8 5458 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 5459 {
d003868e
AM		 5460 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
5461 abfd);
e489d0ae
PB		 5462 return FALSE;
5463 }
f21f3fe0 5464
39ce1a6a
NC		 5465 /* PR 5398: If we have not decided to include any loadable sections in
5466 the output then we will not have a glue owner bfd. This is OK, it
5467 just means that there is nothing else for us to do here. */
5468 if (globals->bfd_of_glue_owner == NULL)
5469 return TRUE;
5470
252b5132
RH		 5471 /* Rummage around all the relocs and map the glue vectors. */
5472 sec = abfd->sections;
5473
5474 if (sec == NULL)
b34976b6 5475 return TRUE;
252b5132
RH		 5476
5477 for (; sec != NULL; sec = sec->next)
5478 {
5479 if (sec->reloc_count == 0)
5480 continue;
5481
2f475487
AM		 5482 if ((sec->flags & SEC_EXCLUDE) != 0)
5483 continue;
5484
0ffa91dd 5485 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 5486
9b485d32 5487 /* Load the relocs. */
6cdc0ccc 5488 internal_relocs
906e58ca 5489 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 5490
6cdc0ccc
AM		 5491 if (internal_relocs == NULL)
5492 goto error_return;
252b5132 5493
6cdc0ccc
AM		 5494 irelend = internal_relocs + sec->reloc_count;
5495 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 5496 {
5497 long r_type;
5498 unsigned long r_index;
252b5132
RH		 5499
5500 struct elf_link_hash_entry *h;
5501
5502 r_type = ELF32_R_TYPE (irel->r_info);
5503 r_index = ELF32_R_SYM (irel->r_info);
5504
9b485d32 5505 /* These are the only relocation types we care about. */
ba96a88f 5506 if ( r_type != R_ARM_PC24
845b51d6 5507 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 5508 continue;
5509
5510 /* Get the section contents if we haven't done so already. */
5511 if (contents == NULL)
5512 {
5513 /* Get cached copy if it exists. */
5514 if (elf_section_data (sec)->this_hdr.contents != NULL)
5515 contents = elf_section_data (sec)->this_hdr.contents;
5516 else
5517 {
5518 /* Go get them off disk. */
57e8b36a 5519 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 5520 goto error_return;
5521 }
5522 }
5523
845b51d6
PB		 5524 if (r_type == R_ARM_V4BX)
5525 {
5526 int reg;
5527
5528 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
5529 record_arm_bx_glue (link_info, reg);
5530 continue;
5531 }
5532
a7c10850 5533 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 5534 h = NULL;
5535
9b485d32 5536 /* We don't care about local symbols. */
252b5132
RH		 5537 if (r_index < symtab_hdr->sh_info)
5538 continue;
5539
9b485d32 5540 /* This is an external symbol. */
252b5132
RH		 5541 r_index -= symtab_hdr->sh_info;
5542 h = (struct elf_link_hash_entry *)
5543 elf_sym_hashes (abfd)[r_index];
5544
5545 /* If the relocation is against a static symbol it must be within
5546 the current section and so cannot be a cross ARM/Thumb relocation. */
5547 if (h == NULL)
5548 continue;
5549
d504ffc8
DJ		 5550 /* If the call will go through a PLT entry then we do not need
5551 glue. */
5552 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 5553 continue;
5554
252b5132
RH		 5555 switch (r_type)
5556 {
5557 case R_ARM_PC24:
5558 /* This one is a call from arm code. We need to look up
2f0ca46a 5559 the target of the call. If it is a thumb target, we
252b5132 5560 insert glue. */
ebe24dd4 5561 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
252b5132
RH		 5562 record_arm_to_thumb_glue (link_info, h);
5563 break;
5564
252b5132 5565 default:
c6596c5e 5566 abort ();
252b5132
RH		 5567 }
5568 }
6cdc0ccc
AM		 5569
5570 if (contents != NULL
5571 && elf_section_data (sec)->this_hdr.contents != contents)
5572 free (contents);
5573 contents = NULL;
5574
5575 if (internal_relocs != NULL
5576 && elf_section_data (sec)->relocs != internal_relocs)
5577 free (internal_relocs);
5578 internal_relocs = NULL;
252b5132
RH		 5579 }
5580
b34976b6 5581 return TRUE;
9a5aca8c 5582
252b5132 5583error_return:
6cdc0ccc
AM		 5584 if (contents != NULL
5585 && elf_section_data (sec)->this_hdr.contents != contents)
5586 free (contents);
5587 if (internal_relocs != NULL
5588 && elf_section_data (sec)->relocs != internal_relocs)
5589 free (internal_relocs);
9a5aca8c 5590
b34976b6 5591 return FALSE;
252b5132 5592}
7e392df6 5593#endif
252b5132 5594
eb043451 5595
c7b8f16e
JB		 5596/* Initialise maps of ARM/Thumb/data for input BFDs. */
5597
5598void
5599bfd_elf32_arm_init_maps (bfd *abfd)
5600{
5601 Elf_Internal_Sym *isymbuf;
5602 Elf_Internal_Shdr *hdr;
5603 unsigned int i, localsyms;
5604
af1f4419
NC		 5605 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
5606 if (! is_arm_elf (abfd))
5607 return;
5608
c7b8f16e
JB		 5609 if ((abfd->flags & DYNAMIC) != 0)
5610 return;
5611
0ffa91dd 5612 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 5613 localsyms = hdr->sh_info;
5614
5615 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5616 should contain the number of local symbols, which should come before any
5617 global symbols. Mapping symbols are always local. */
5618 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
5619 NULL);
5620
5621 /* No internal symbols read? Skip this BFD. */
5622 if (isymbuf == NULL)
5623 return;
5624
5625 for (i = 0; i < localsyms; i++)
5626 {
5627 Elf_Internal_Sym *isym = &isymbuf[i];
5628 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5629 const char *name;
906e58ca 5630
c7b8f16e
JB		 5631 if (sec != NULL
5632 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5633 {
5634 name = bfd_elf_string_from_elf_section (abfd,
5635 hdr->sh_link, isym->st_name);
906e58ca 5636
c7b8f16e
JB		 5637 if (bfd_is_arm_special_symbol_name (name,
5638 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
5639 elf32_arm_section_map_add (sec, name[1], isym->st_value);
5640 }
5641 }
5642}
5643
5644
48229727
JB		 5645/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
5646 say what they wanted. */
5647
5648void
5649bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
5650{
5651 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5652 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
5653
4dfe6ac6
NC		 5654 if (globals == NULL)
5655 return;
5656
48229727
JB		 5657 if (globals->fix_cortex_a8 == -1)
5658 {
5659 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
5660 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
5661 && (out_attr[Tag_CPU_arch_profile].i == 'A'
5662 || out_attr[Tag_CPU_arch_profile].i == 0))
5663 globals->fix_cortex_a8 = 1;
5664 else
5665 globals->fix_cortex_a8 = 0;
5666 }
5667}
5668
5669
c7b8f16e
JB		 5670void
5671bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
5672{
5673 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 5674 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 5675
4dfe6ac6
NC		 5676 if (globals == NULL)
5677 return;
c7b8f16e
JB		 5678 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
5679 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
5680 {
5681 switch (globals->vfp11_fix)
5682 {
5683 case BFD_ARM_VFP11_FIX_DEFAULT:
5684 case BFD_ARM_VFP11_FIX_NONE:
5685 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5686 break;
906e58ca 5687
c7b8f16e
JB		 5688 default:
5689 /* Give a warning, but do as the user requests anyway. */
5690 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
5691 "workaround is not necessary for target architecture"), obfd);
5692 }
5693 }
5694 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
5695 /* For earlier architectures, we might need the workaround, but do not
5696 enable it by default. If users is running with broken hardware, they
5697 must enable the erratum fix explicitly. */
5698 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
5699}
5700
5701
906e58ca
NC		 5702enum bfd_arm_vfp11_pipe
5703{
c7b8f16e
JB		 5704 VFP11_FMAC,
5705 VFP11_LS,
5706 VFP11_DS,
5707 VFP11_BAD
5708};
5709
5710/* Return a VFP register number. This is encoded as RX:X for single-precision
5711 registers, or X:RX for double-precision registers, where RX is the group of
5712 four bits in the instruction encoding and X is the single extension bit.
5713 RX and X fields are specified using their lowest (starting) bit. The return
5714 value is:
5715
5716 0...31: single-precision registers s0...s31
5717 32...63: double-precision registers d0...d31.
906e58ca 5718
c7b8f16e
JB		 5719 Although X should be zero for VFP11 (encoding d0...d15 only), we might
5720 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 5721
c7b8f16e
JB		 5722static unsigned int
5723bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
5724 unsigned int x)
5725{
5726 if (is_double)
5727 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
5728 else
5729 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
5730}
5731
5732/* Set bits in *WMASK according to a register number REG as encoded by
5733 bfd_arm_vfp11_regno(). Ignore d16-d31. */
5734
5735static void
5736bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
5737{
5738 if (reg < 32)
5739 *wmask |= 1 << reg;
5740 else if (reg < 48)
5741 *wmask |= 3 << ((reg - 32) * 2);
5742}
5743
5744/* Return TRUE if WMASK overwrites anything in REGS. */
5745
5746static bfd_boolean
5747bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
5748{
5749 int i;
906e58ca 5750
c7b8f16e
JB		 5751 for (i = 0; i < numregs; i++)
5752 {
5753 unsigned int reg = regs[i];
5754
5755 if (reg < 32 && (wmask & (1 << reg)) != 0)
5756 return TRUE;
906e58ca 5757
c7b8f16e
JB		 5758 reg -= 32;
5759
5760 if (reg >= 16)
5761 continue;
906e58ca 5762
c7b8f16e
JB		 5763 if ((wmask & (3 << (reg * 2))) != 0)
5764 return TRUE;
5765 }
906e58ca 5766
c7b8f16e
JB		 5767 return FALSE;
5768}
5769
5770/* In this function, we're interested in two things: finding input registers
5771 for VFP data-processing instructions, and finding the set of registers which
5772 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
5773 hold the written set, so FLDM etc. are easy to deal with (we're only
5774 interested in 32 SP registers or 16 dp registers, due to the VFP version
5775 implemented by the chip in question). DP registers are marked by setting
5776 both SP registers in the write mask). */
5777
5778static enum bfd_arm_vfp11_pipe
5779bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
5780 int *numregs)
5781{
91d6fa6a 5782 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 5783 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
5784
5785 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
5786 {
5787 unsigned int pqrs;
5788 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5789 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
5790
5791 pqrs = ((insn & 0x00800000) >> 20)
5792 | ((insn & 0x00300000) >> 19)
5793 | ((insn & 0x00000040) >> 6);
5794
5795 switch (pqrs)
5796 {
5797 case 0: /* fmac[sd]. */
5798 case 1: /* fnmac[sd]. */
5799 case 2: /* fmsc[sd]. */
5800 case 3: /* fnmsc[sd]. */
91d6fa6a 5801 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5802 bfd_arm_vfp11_write_mask (destmask, fd);
5803 regs[0] = fd;
5804 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5805 regs[2] = fm;
5806 *numregs = 3;
5807 break;
5808
5809 case 4: /* fmul[sd]. */
5810 case 5: /* fnmul[sd]. */
5811 case 6: /* fadd[sd]. */
5812 case 7: /* fsub[sd]. */
91d6fa6a 5813 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5814 goto vfp_binop;
5815
5816 case 8: /* fdiv[sd]. */
91d6fa6a 5817 vpipe = VFP11_DS;
c7b8f16e
JB		 5818 vfp_binop:
5819 bfd_arm_vfp11_write_mask (destmask, fd);
5820 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
5821 regs[1] = fm;
5822 *numregs = 2;
5823 break;
5824
5825 case 15: /* extended opcode. */
5826 {
5827 unsigned int extn = ((insn >> 15) & 0x1e)
5828 | ((insn >> 7) & 1);
5829
5830 switch (extn)
5831 {
5832 case 0: /* fcpy[sd]. */
5833 case 1: /* fabs[sd]. */
5834 case 2: /* fneg[sd]. */
5835 case 8: /* fcmp[sd]. */
5836 case 9: /* fcmpe[sd]. */
5837 case 10: /* fcmpz[sd]. */
5838 case 11: /* fcmpez[sd]. */
5839 case 16: /* fuito[sd]. */
5840 case 17: /* fsito[sd]. */
5841 case 24: /* ftoui[sd]. */
5842 case 25: /* ftouiz[sd]. */
5843 case 26: /* ftosi[sd]. */
5844 case 27: /* ftosiz[sd]. */
5845 /* These instructions will not bounce due to underflow. */
5846 *numregs = 0;
91d6fa6a 5847 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5848 break;
5849
5850 case 3: /* fsqrt[sd]. */
5851 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5852 registers to cause the erratum in previous instructions. */
5853 bfd_arm_vfp11_write_mask (destmask, fd);
91d6fa6a 5854 vpipe = VFP11_DS;
c7b8f16e
JB		 5855 break;
5856
5857 case 15: /* fcvt{ds,sd}. */
5858 {
5859 int rnum = 0;
5860
5861 bfd_arm_vfp11_write_mask (destmask, fd);
5862
5863 /* Only FCVTSD can underflow. */
5864 if ((insn & 0x100) != 0)
5865 regs[rnum++] = fm;
5866
5867 *numregs = rnum;
5868
91d6fa6a 5869 vpipe = VFP11_FMAC;
c7b8f16e
JB		 5870 }
5871 break;
5872
5873 default:
5874 return VFP11_BAD;
5875 }
5876 }
5877 break;
5878
5879 default:
5880 return VFP11_BAD;
5881 }
5882 }
5883 /* Two-register transfer. */
5884 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
5885 {
5886 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 5887
c7b8f16e
JB		 5888 if ((insn & 0x100000) == 0)
5889 {
5890 if (is_double)
5891 bfd_arm_vfp11_write_mask (destmask, fm);
5892 else
5893 {
5894 bfd_arm_vfp11_write_mask (destmask, fm);
5895 bfd_arm_vfp11_write_mask (destmask, fm + 1);
5896 }
5897 }
5898
91d6fa6a 5899 vpipe = VFP11_LS;
c7b8f16e
JB		 5900 }
5901 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
5902 {
5903 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
5904 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 5905
c7b8f16e
JB		 5906 switch (puw)
5907 {
5908 case 0: /* Two-reg transfer. We should catch these above. */
5909 abort ();
906e58ca 5910
c7b8f16e
JB		 5911 case 2: /* fldm[sdx]. */
5912 case 3:
5913 case 5:
5914 {
5915 unsigned int i, offset = insn & 0xff;
5916
5917 if (is_double)
5918 offset >>= 1;
5919
5920 for (i = fd; i < fd + offset; i++)
5921 bfd_arm_vfp11_write_mask (destmask, i);
5922 }
5923 break;
906e58ca 5924
c7b8f16e
JB		 5925 case 4: /* fld[sd]. */
5926 case 6:
5927 bfd_arm_vfp11_write_mask (destmask, fd);
5928 break;
906e58ca 5929
c7b8f16e
JB		 5930 default:
5931 return VFP11_BAD;
5932 }
5933
91d6fa6a 5934 vpipe = VFP11_LS;
c7b8f16e
JB		 5935 }
5936 /* Single-register transfer. Note L==0. */
5937 else if ((insn & 0x0f100e10) == 0x0e000a10)
5938 {
5939 unsigned int opcode = (insn >> 21) & 7;
5940 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
5941
5942 switch (opcode)
5943 {
5944 case 0: /* fmsr/fmdlr. */
5945 case 1: /* fmdhr. */
5946 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5947 destination register. I don't know if this is exactly right,
5948 but it is the conservative choice. */
5949 bfd_arm_vfp11_write_mask (destmask, fn);
5950 break;
5951
5952 case 7: /* fmxr. */
5953 break;
5954 }
5955
91d6fa6a 5956 vpipe = VFP11_LS;
c7b8f16e
JB		 5957 }
5958
91d6fa6a 5959 return vpipe;
c7b8f16e
JB		 5960}
5961
5962
5963static int elf32_arm_compare_mapping (const void * a, const void * b);
5964
5965
5966/* Look for potentially-troublesome code sequences which might trigger the
5967 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5968 (available from ARM) for details of the erratum. A short version is
5969 described in ld.texinfo. */
5970
5971bfd_boolean
5972bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
5973{
5974 asection *sec;
5975 bfd_byte *contents = NULL;
5976 int state = 0;
5977 int regs[3], numregs = 0;
5978 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
5979 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 5980
4dfe6ac6
NC		 5981 if (globals == NULL)
5982 return FALSE;
5983
c7b8f16e
JB		 5984 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5985 The states transition as follows:
906e58ca 5986
c7b8f16e
JB		 5987 0 -> 1 (vector) or 0 -> 2 (scalar)
5988 A VFP FMAC-pipeline instruction has been seen. Fill
5989 regs[0]..regs[numregs-1] with its input operands. Remember this
5990 instruction in 'first_fmac'.
5991
5992 1 -> 2
5993 Any instruction, except for a VFP instruction which overwrites
5994 regs[*].
906e58ca 5995
c7b8f16e
JB		 5996 1 -> 3 [ -> 0 ] or
5997 2 -> 3 [ -> 0 ]
5998 A VFP instruction has been seen which overwrites any of regs[*].
5999 We must make a veneer! Reset state to 0 before examining next
6000 instruction.
906e58ca 6001
c7b8f16e
JB		 6002 2 -> 0
6003 If we fail to match anything in state 2, reset to state 0 and reset
6004 the instruction pointer to the instruction after 'first_fmac'.
6005
6006 If the VFP11 vector mode is in use, there must be at least two unrelated
6007 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6008 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6009
6010 /* If we are only performing a partial link do not bother
6011 to construct any glue. */
6012 if (link_info->relocatable)
6013 return TRUE;
6014
0ffa91dd
NC		 6015 /* Skip if this bfd does not correspond to an ELF image. */
6016 if (! is_arm_elf (abfd))
6017 return TRUE;
906e58ca 6018
c7b8f16e
JB		 6019 /* We should have chosen a fix type by the time we get here. */
6020 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6021
6022 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6023 return TRUE;
2e6030b9 6024
33a7ffc2
JM		 6025 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6026 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6027 return TRUE;
6028
c7b8f16e
JB		 6029 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6030 {
6031 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6032 struct _arm_elf_section_data *sec_data;
6033
6034 /* If we don't have executable progbits, we're not interested in this
6035 section. Also skip if section is to be excluded. */
6036 if (elf_section_type (sec) != SHT_PROGBITS
6037 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6038 || (sec->flags & SEC_EXCLUDE) != 0
33a7ffc2
JM		 6039 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
6040 || sec->output_section == bfd_abs_section_ptr
c7b8f16e
JB		 6041 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6042 continue;
6043
6044 sec_data = elf32_arm_section_data (sec);
906e58ca 6045
c7b8f16e
JB		 6046 if (sec_data->mapcount == 0)
6047 continue;
906e58ca 6048
c7b8f16e
JB		 6049 if (elf_section_data (sec)->this_hdr.contents != NULL)
6050 contents = elf_section_data (sec)->this_hdr.contents;
6051 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6052 goto error_return;
6053
6054 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6055 elf32_arm_compare_mapping);
6056
6057 for (span = 0; span < sec_data->mapcount; span++)
6058 {
6059 unsigned int span_start = sec_data->map[span].vma;
6060 unsigned int span_end = (span == sec_data->mapcount - 1)
6061 ? sec->size : sec_data->map[span + 1].vma;
6062 char span_type = sec_data->map[span].type;
906e58ca 6063
c7b8f16e
JB		 6064 /* FIXME: Only ARM mode is supported at present. We may need to
6065 support Thumb-2 mode also at some point. */
6066 if (span_type != 'a')
6067 continue;
6068
6069 for (i = span_start; i < span_end;)
6070 {
6071 unsigned int next_i = i + 4;
6072 unsigned int insn = bfd_big_endian (abfd)
6073 ? (contents[i] << 24)
6074 | (contents[i + 1] << 16)
6075 | (contents[i + 2] << 8)
6076 | contents[i + 3]
6077 : (contents[i + 3] << 24)
6078 | (contents[i + 2] << 16)
6079 | (contents[i + 1] << 8)
6080 | contents[i];
6081 unsigned int writemask = 0;
91d6fa6a 6082 enum bfd_arm_vfp11_pipe vpipe;
c7b8f16e
JB		 6083
6084 switch (state)
6085 {
6086 case 0:
91d6fa6a 6087 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
c7b8f16e
JB		 6088 &numregs);
6089 /* I'm assuming the VFP11 erratum can trigger with denorm
6090 operands on either the FMAC or the DS pipeline. This might
6091 lead to slightly overenthusiastic veneer insertion. */
91d6fa6a 6092 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
c7b8f16e
JB		 6093 {
6094 state = use_vector ? 1 : 2;
6095 first_fmac = i;
6096 veneer_of_insn = insn;
6097 }
6098 break;
6099
6100 case 1:
6101 {
6102 int other_regs[3], other_numregs;
91d6fa6a 6103 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6104 other_regs,
6105 &other_numregs);
91d6fa6a 6106 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6107 && bfd_arm_vfp11_antidependency (writemask, regs,
6108 numregs))
6109 state = 3;
6110 else
6111 state = 2;
6112 }
6113 break;
6114
6115 case 2:
6116 {
6117 int other_regs[3], other_numregs;
91d6fa6a 6118 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e
JB		 6119 other_regs,
6120 &other_numregs);
91d6fa6a 6121 if (vpipe != VFP11_BAD
c7b8f16e
JB		 6122 && bfd_arm_vfp11_antidependency (writemask, regs,
6123 numregs))
6124 state = 3;
6125 else
6126 {
6127 state = 0;
6128 next_i = first_fmac + 4;
6129 }
6130 }
6131 break;
6132
6133 case 3:
6134 abort (); /* Should be unreachable. */
6135 }
6136
6137 if (state == 3)
6138 {
21d799b5
NC		 6139 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6140 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
c7b8f16e
JB		 6141 int errcount;
6142
6143 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
6144
6145 newerr->u.b.vfp_insn = veneer_of_insn;
6146
6147 switch (span_type)
6148 {
6149 case 'a':
6150 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6151 break;
906e58ca 6152
c7b8f16e
JB		 6153 default:
6154 abort ();
6155 }
6156
6157 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6158 first_fmac);
6159
6160 newerr->vma = -1;
6161
6162 newerr->next = sec_data->erratumlist;
6163 sec_data->erratumlist = newerr;
6164
6165 state = 0;
6166 }
6167
6168 i = next_i;
6169 }
6170 }
906e58ca 6171
c7b8f16e
JB		 6172 if (contents != NULL
6173 && elf_section_data (sec)->this_hdr.contents != contents)
6174 free (contents);
6175 contents = NULL;
6176 }
6177
6178 return TRUE;
6179
6180error_return:
6181 if (contents != NULL
6182 && elf_section_data (sec)->this_hdr.contents != contents)
6183 free (contents);
906e58ca 6184
c7b8f16e
JB		 6185 return FALSE;
6186}
6187
6188/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6189 after sections have been laid out, using specially-named symbols. */
6190
6191void
6192bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6193 struct bfd_link_info *link_info)
6194{
6195 asection *sec;
6196 struct elf32_arm_link_hash_table *globals;
6197 char *tmp_name;
906e58ca 6198
c7b8f16e
JB		 6199 if (link_info->relocatable)
6200 return;
2e6030b9
MS		 6201
6202 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6203 if (! is_arm_elf (abfd))
2e6030b9
MS		 6204 return;
6205
c7b8f16e 6206 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6207 if (globals == NULL)
6208 return;
906e58ca 6209
21d799b5
NC		 6210 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6211 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6212
6213 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6214 {
6215 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6216 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6217
c7b8f16e
JB		 6218 for (; errnode != NULL; errnode = errnode->next)
6219 {
6220 struct elf_link_hash_entry *myh;
6221 bfd_vma vma;
6222
6223 switch (errnode->type)
6224 {
6225 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6226 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6227 /* Find veneer symbol. */
6228 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6229 errnode->u.b.veneer->u.v.id);
6230
6231 myh = elf_link_hash_lookup
6232 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6233
6234 if (myh == NULL)
6235 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6236 "`%s'"), abfd, tmp_name);
6237
6238 vma = myh->root.u.def.section->output_section->vma
6239 + myh->root.u.def.section->output_offset
6240 + myh->root.u.def.value;
6241
6242 errnode->u.b.veneer->vma = vma;
6243 break;
6244
6245 case VFP11_ERRATUM_ARM_VENEER:
6246 case VFP11_ERRATUM_THUMB_VENEER:
6247 /* Find return location. */
6248 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6249 errnode->u.v.id);
6250
6251 myh = elf_link_hash_lookup
6252 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6253
6254 if (myh == NULL)
6255 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6256 "`%s'"), abfd, tmp_name);
6257
6258 vma = myh->root.u.def.section->output_section->vma
6259 + myh->root.u.def.section->output_offset
6260 + myh->root.u.def.value;
6261
6262 errnode->u.v.branch->vma = vma;
6263 break;
906e58ca 6264
c7b8f16e
JB		 6265 default:
6266 abort ();
6267 }
6268 }
6269 }
906e58ca 6270
c7b8f16e
JB		 6271 free (tmp_name);
6272}
6273
6274
eb043451
PB		 6275/* Set target relocation values needed during linking. */
6276
6277void
bf21ed78
MS		 6278bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6279 struct bfd_link_info *link_info,
eb043451 6280 int target1_is_rel,
319850b4 6281 char * target2_type,
33bfe774 6282 int fix_v4bx,
c7b8f16e 6283 int use_blx,
bf21ed78 6284 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 6285 int no_enum_warn, int no_wchar_warn,
48229727 6286 int pic_veneer, int fix_cortex_a8)
eb043451
PB		 6287{
6288 struct elf32_arm_link_hash_table *globals;
6289
6290 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6291 if (globals == NULL)
6292 return;
eb043451
PB		 6293
6294 globals->target1_is_rel = target1_is_rel;
6295 if (strcmp (target2_type, "rel") == 0)
6296 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 6297 else if (strcmp (target2_type, "abs") == 0)
6298 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 6299 else if (strcmp (target2_type, "got-rel") == 0)
6300 globals->target2_reloc = R_ARM_GOT_PREL;
6301 else
6302 {
6303 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6304 target2_type);
6305 }
319850b4 6306 globals->fix_v4bx = fix_v4bx;
33bfe774 6307 globals->use_blx |= use_blx;
c7b8f16e 6308 globals->vfp11_fix = vfp11_fix;
27e55c4d 6309 globals->pic_veneer = pic_veneer;
48229727 6310 globals->fix_cortex_a8 = fix_cortex_a8;
bf21ed78 6311
0ffa91dd
NC		 6312 BFD_ASSERT (is_arm_elf (output_bfd));
6313 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 6314 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 6315}
eb043451 6316
12a0a0fd 6317/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 6318
12a0a0fd
PB		 6319static void
6320insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6321{
6322 bfd_vma upper;
6323 bfd_vma lower;
6324 int reloc_sign;
6325
6326 BFD_ASSERT ((offset & 1) == 0);
6327
6328 upper = bfd_get_16 (abfd, insn);
6329 lower = bfd_get_16 (abfd, insn + 2);
6330 reloc_sign = (offset < 0) ? 1 : 0;
6331 upper = (upper & ~(bfd_vma) 0x7ff)
6332 | ((offset >> 12) & 0x3ff)
6333 | (reloc_sign << 10);
906e58ca 6334 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 6335 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6336 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6337 | ((offset >> 1) & 0x7ff);
6338 bfd_put_16 (abfd, upper, insn);
6339 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 6340}
6341
9b485d32
NC		 6342/* Thumb code calling an ARM function. */
6343
252b5132 6344static int
57e8b36a
NC		 6345elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6346 const char * name,
6347 bfd * input_bfd,
6348 bfd * output_bfd,
6349 asection * input_section,
6350 bfd_byte * hit_data,
6351 asection * sym_sec,
6352 bfd_vma offset,
6353 bfd_signed_vma addend,
f2a9dd69
DJ		 6354 bfd_vma val,
6355 char **error_message)
252b5132 6356{
bcbdc74c 6357 asection * s = 0;
dc810e39 6358 bfd_vma my_offset;
252b5132 6359 long int ret_offset;
bcbdc74c
NC		 6360 struct elf_link_hash_entry * myh;
6361 struct elf32_arm_link_hash_table * globals;
252b5132 6362
f2a9dd69 6363 myh = find_thumb_glue (info, name, error_message);
252b5132 6364 if (myh == NULL)
b34976b6 6365 return FALSE;
252b5132
RH		 6366
6367 globals = elf32_arm_hash_table (info);
252b5132
RH		 6368 BFD_ASSERT (globals != NULL);
6369 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6370
6371 my_offset = myh->root.u.def.value;
6372
6373 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6374 THUMB2ARM_GLUE_SECTION_NAME);
6375
6376 BFD_ASSERT (s != NULL);
6377 BFD_ASSERT (s->contents != NULL);
6378 BFD_ASSERT (s->output_section != NULL);
6379
6380 if ((my_offset & 0x01) == 0x01)
6381 {
6382 if (sym_sec != NULL
6383 && sym_sec->owner != NULL
6384 && !INTERWORK_FLAG (sym_sec->owner))
6385 {
8f615d07 6386 (*_bfd_error_handler)
d003868e
AM		 6387 (_("%B(%s): warning: interworking not enabled.\n"
6388 " first occurrence: %B: thumb call to arm"),
6389 sym_sec->owner, input_bfd, name);
252b5132 6390
b34976b6 6391 return FALSE;
252b5132
RH		 6392 }
6393
6394 --my_offset;
6395 myh->root.u.def.value = my_offset;
6396
52ab56c2
PB		 6397 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
6398 s->contents + my_offset);
252b5132 6399
52ab56c2
PB		 6400 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
6401 s->contents + my_offset + 2);
252b5132
RH		 6402
6403 ret_offset =
9b485d32
NC		 6404 /* Address of destination of the stub. */
6405 ((bfd_signed_vma) val)
252b5132 6406 - ((bfd_signed_vma)
57e8b36a
NC		 6407 /* Offset from the start of the current section
6408 to the start of the stubs. */
9b485d32
NC		 6409 (s->output_offset
6410 /* Offset of the start of this stub from the start of the stubs. */
6411 + my_offset
6412 /* Address of the start of the current section. */
6413 + s->output_section->vma)
6414 /* The branch instruction is 4 bytes into the stub. */
6415 + 4
6416 /* ARM branches work from the pc of the instruction + 8. */
6417 + 8);
252b5132 6418
52ab56c2
PB		 6419 put_arm_insn (globals, output_bfd,
6420 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
6421 s->contents + my_offset + 4);
252b5132
RH		 6422 }
6423
6424 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
6425
427bfd90
NC		 6426 /* Now go back and fix up the original BL insn to point to here. */
6427 ret_offset =
6428 /* Address of where the stub is located. */
6429 (s->output_section->vma + s->output_offset + my_offset)
6430 /* Address of where the BL is located. */
57e8b36a
NC		 6431 - (input_section->output_section->vma + input_section->output_offset
6432 + offset)
427bfd90
NC		 6433 /* Addend in the relocation. */
6434 - addend
6435 /* Biassing for PC-relative addressing. */
6436 - 8;
252b5132 6437
12a0a0fd 6438 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 6439
b34976b6 6440 return TRUE;
252b5132
RH		 6441}
6442
a4fd1a8e 6443/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 6444
a4fd1a8e
PB		 6445static struct elf_link_hash_entry *
6446elf32_arm_create_thumb_stub (struct bfd_link_info * info,
6447 const char * name,
6448 bfd * input_bfd,
6449 bfd * output_bfd,
6450 asection * sym_sec,
6451 bfd_vma val,
8029a119
NC		 6452 asection * s,
6453 char ** error_message)
252b5132 6454{
dc810e39 6455 bfd_vma my_offset;
252b5132 6456 long int ret_offset;
bcbdc74c
NC		 6457 struct elf_link_hash_entry * myh;
6458 struct elf32_arm_link_hash_table * globals;
252b5132 6459
f2a9dd69 6460 myh = find_arm_glue (info, name, error_message);
252b5132 6461 if (myh == NULL)
a4fd1a8e 6462 return NULL;
252b5132
RH		 6463
6464 globals = elf32_arm_hash_table (info);
252b5132
RH		 6465 BFD_ASSERT (globals != NULL);
6466 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6467
6468 my_offset = myh->root.u.def.value;
252b5132
RH		 6469
6470 if ((my_offset & 0x01) == 0x01)
6471 {
6472 if (sym_sec != NULL
6473 && sym_sec->owner != NULL
6474 && !INTERWORK_FLAG (sym_sec->owner))
6475 {
8f615d07 6476 (*_bfd_error_handler)
d003868e
AM		 6477 (_("%B(%s): warning: interworking not enabled.\n"
6478 " first occurrence: %B: arm call to thumb"),
6479 sym_sec->owner, input_bfd, name);
252b5132 6480 }
9b485d32 6481
252b5132
RH		 6482 --my_offset;
6483 myh->root.u.def.value = my_offset;
6484
27e55c4d
PB		 6485 if (info->shared || globals->root.is_relocatable_executable
6486 || globals->pic_veneer)
8f6277f5
PB		 6487 {
6488 /* For relocatable objects we can't use absolute addresses,
6489 so construct the address from a relative offset. */
6490 /* TODO: If the offset is small it's probably worth
6491 constructing the address with adds. */
52ab56c2
PB		 6492 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
6493 s->contents + my_offset);
6494 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
6495 s->contents + my_offset + 4);
6496 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
6497 s->contents + my_offset + 8);
8f6277f5
PB		 6498 /* Adjust the offset by 4 for the position of the add,
6499 and 8 for the pipeline offset. */
6500 ret_offset = (val - (s->output_offset
6501 + s->output_section->vma
6502 + my_offset + 12))
6503 | 1;
6504 bfd_put_32 (output_bfd, ret_offset,
6505 s->contents + my_offset + 12);
6506 }
26079076
PB		 6507 else if (globals->use_blx)
6508 {
6509 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
6510 s->contents + my_offset);
6511
6512 /* It's a thumb address. Add the low order bit. */
6513 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
6514 s->contents + my_offset + 4);
6515 }
8f6277f5
PB		 6516 else
6517 {
52ab56c2
PB		 6518 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
6519 s->contents + my_offset);
252b5132 6520
52ab56c2
PB		 6521 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
6522 s->contents + my_offset + 4);
252b5132 6523
8f6277f5
PB		 6524 /* It's a thumb address. Add the low order bit. */
6525 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
6526 s->contents + my_offset + 8);
8029a119
NC		 6527
6528 my_offset += 12;
8f6277f5 6529 }
252b5132
RH		 6530 }
6531
6532 BFD_ASSERT (my_offset <= globals->arm_glue_size);
6533
a4fd1a8e
PB		 6534 return myh;
6535}
6536
6537/* Arm code calling a Thumb function. */
6538
6539static int
6540elf32_arm_to_thumb_stub (struct bfd_link_info * info,
6541 const char * name,
6542 bfd * input_bfd,
6543 bfd * output_bfd,
6544 asection * input_section,
6545 bfd_byte * hit_data,
6546 asection * sym_sec,
6547 bfd_vma offset,
6548 bfd_signed_vma addend,
f2a9dd69
DJ		 6549 bfd_vma val,
6550 char **error_message)
a4fd1a8e
PB		 6551{
6552 unsigned long int tmp;
6553 bfd_vma my_offset;
6554 asection * s;
6555 long int ret_offset;
6556 struct elf_link_hash_entry * myh;
6557 struct elf32_arm_link_hash_table * globals;
6558
6559 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6560 BFD_ASSERT (globals != NULL);
6561 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6562
6563 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6564 ARM2THUMB_GLUE_SECTION_NAME);
6565 BFD_ASSERT (s != NULL);
6566 BFD_ASSERT (s->contents != NULL);
6567 BFD_ASSERT (s->output_section != NULL);
6568
6569 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 6570 sym_sec, val, s, error_message);
a4fd1a8e
PB		 6571 if (!myh)
6572 return FALSE;
6573
6574 my_offset = myh->root.u.def.value;
252b5132
RH		 6575 tmp = bfd_get_32 (input_bfd, hit_data);
6576 tmp = tmp & 0xFF000000;
6577
9b485d32 6578 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 6579 ret_offset = (s->output_offset
6580 + my_offset
6581 + s->output_section->vma
6582 - (input_section->output_offset
6583 + input_section->output_section->vma
6584 + offset + addend)
6585 - 8);
9a5aca8c 6586
252b5132
RH		 6587 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
6588
dc810e39 6589 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 6590
b34976b6 6591 return TRUE;
252b5132
RH		 6592}
6593
a4fd1a8e
PB		 6594/* Populate Arm stub for an exported Thumb function. */
6595
6596static bfd_boolean
6597elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
6598{
6599 struct bfd_link_info * info = (struct bfd_link_info *) inf;
6600 asection * s;
6601 struct elf_link_hash_entry * myh;
6602 struct elf32_arm_link_hash_entry *eh;
6603 struct elf32_arm_link_hash_table * globals;
6604 asection *sec;
6605 bfd_vma val;
f2a9dd69 6606 char *error_message;
a4fd1a8e 6607
906e58ca 6608 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 6609 /* Allocate stubs for exported Thumb functions on v4t. */
6610 if (eh->export_glue == NULL)
6611 return TRUE;
6612
6613 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 6614 BFD_ASSERT (globals != NULL);
6615 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6616
6617 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6618 ARM2THUMB_GLUE_SECTION_NAME);
6619 BFD_ASSERT (s != NULL);
6620 BFD_ASSERT (s->contents != NULL);
6621 BFD_ASSERT (s->output_section != NULL);
6622
6623 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 6624
6625 BFD_ASSERT (sec->output_section != NULL);
6626
a4fd1a8e
PB		 6627 val = eh->export_glue->root.u.def.value + sec->output_offset
6628 + sec->output_section->vma;
8029a119 6629
a4fd1a8e
PB		 6630 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
6631 h->root.u.def.section->owner,
f2a9dd69
DJ		 6632 globals->obfd, sec, val, s,
6633 &error_message);
a4fd1a8e
PB		 6634 BFD_ASSERT (myh);
6635 return TRUE;
6636}
6637
845b51d6
PB		 6638/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
6639
6640static bfd_vma
6641elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
6642{
6643 bfd_byte *p;
6644 bfd_vma glue_addr;
6645 asection *s;
6646 struct elf32_arm_link_hash_table *globals;
6647
6648 globals = elf32_arm_hash_table (info);
845b51d6
PB		 6649 BFD_ASSERT (globals != NULL);
6650 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6651
6652 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
6653 ARM_BX_GLUE_SECTION_NAME);
6654 BFD_ASSERT (s != NULL);
6655 BFD_ASSERT (s->contents != NULL);
6656 BFD_ASSERT (s->output_section != NULL);
6657
6658 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
6659
6660 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
6661
6662 if ((globals->bx_glue_offset[reg] & 1) == 0)
6663 {
6664 p = s->contents + glue_addr;
6665 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
6666 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
6667 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
6668 globals->bx_glue_offset[reg] |= 1;
6669 }
6670
6671 return glue_addr + s->output_section->vma + s->output_offset;
6672}
6673
a4fd1a8e
PB		 6674/* Generate Arm stubs for exported Thumb symbols. */
6675static void
906e58ca 6676elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 6677 struct bfd_link_info *link_info)
6678{
6679 struct elf32_arm_link_hash_table * globals;
6680
8029a119
NC		 6681 if (link_info == NULL)
6682 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 6683 return;
6684
6685 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6686 if (globals == NULL)
6687 return;
6688
84c08195
PB		 6689 /* If blx is available then exported Thumb symbols are OK and there is
6690 nothing to do. */
a4fd1a8e
PB		 6691 if (globals->use_blx)
6692 return;
6693
6694 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
6695 link_info);
6696}
6697
eb043451
PB		 6698/* Some relocations map to different relocations depending on the
6699 target. Return the real relocation. */
8029a119 6700
eb043451
PB		 6701static int
6702arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
6703 int r_type)
6704{
6705 switch (r_type)
6706 {
6707 case R_ARM_TARGET1:
6708 if (globals->target1_is_rel)
6709 return R_ARM_REL32;
6710 else
6711 return R_ARM_ABS32;
6712
6713 case R_ARM_TARGET2:
6714 return globals->target2_reloc;
6715
6716 default:
6717 return r_type;
6718 }
6719}
eb043451 6720
ba93b8ac
DJ		 6721/* Return the base VMA address which should be subtracted from real addresses
6722 when resolving @dtpoff relocation.
6723 This is PT_TLS segment p_vaddr. */
6724
6725static bfd_vma
6726dtpoff_base (struct bfd_link_info *info)
6727{
6728 /* If tls_sec is NULL, we should have signalled an error already. */
6729 if (elf_hash_table (info)->tls_sec == NULL)
6730 return 0;
6731 return elf_hash_table (info)->tls_sec->vma;
6732}
6733
6734/* Return the relocation value for @tpoff relocation
6735 if STT_TLS virtual address is ADDRESS. */
6736
6737static bfd_vma
6738tpoff (struct bfd_link_info *info, bfd_vma address)
6739{
6740 struct elf_link_hash_table *htab = elf_hash_table (info);
6741 bfd_vma base;
6742
6743 /* If tls_sec is NULL, we should have signalled an error already. */
6744 if (htab->tls_sec == NULL)
6745 return 0;
6746 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
6747 return address - htab->tls_sec->vma + base;
6748}
6749
00a97672
RS		 6750/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
6751 VALUE is the relocation value. */
6752
6753static bfd_reloc_status_type
6754elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
6755{
6756 if (value > 0xfff)
6757 return bfd_reloc_overflow;
6758
6759 value |= bfd_get_32 (abfd, data) & 0xfffff000;
6760 bfd_put_32 (abfd, value, data);
6761 return bfd_reloc_ok;
6762}
6763
4962c51a
MS		 6764/* For a given value of n, calculate the value of G_n as required to
6765 deal with group relocations. We return it in the form of an
6766 encoded constant-and-rotation, together with the final residual. If n is
6767 specified as less than zero, then final_residual is filled with the
6768 input value and no further action is performed. */
6769
6770static bfd_vma
6771calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
6772{
6773 int current_n;
6774 bfd_vma g_n;
6775 bfd_vma encoded_g_n = 0;
6776 bfd_vma residual = value; /* Also known as Y_n. */
6777
6778 for (current_n = 0; current_n <= n; current_n++)
6779 {
6780 int shift;
6781
6782 /* Calculate which part of the value to mask. */
6783 if (residual == 0)
6784 shift = 0;
6785 else
6786 {
6787 int msb;
6788
6789 /* Determine the most significant bit in the residual and
6790 align the resulting value to a 2-bit boundary. */
6791 for (msb = 30; msb >= 0; msb -= 2)
6792 if (residual & (3 << msb))
6793 break;
6794
6795 /* The desired shift is now (msb - 6), or zero, whichever
6796 is the greater. */
6797 shift = msb - 6;
6798 if (shift < 0)
6799 shift = 0;
6800 }
6801
6802 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
6803 g_n = residual & (0xff << shift);
6804 encoded_g_n = (g_n >> shift)
6805 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
6806
6807 /* Calculate the residual for the next time around. */
6808 residual &= ~g_n;
6809 }
6810
6811 *final_residual = residual;
6812
6813 return encoded_g_n;
6814}
6815
6816/* Given an ARM instruction, determine whether it is an ADD or a SUB.
6817 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 6818
4962c51a 6819static int
906e58ca 6820identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 6821{
6822 int opcode = insn & 0x1e00000;
6823
6824 if (opcode == 1 << 23) /* ADD */
6825 return 1;
6826
6827 if (opcode == 1 << 22) /* SUB */
6828 return -1;
6829
6830 return 0;
6831}
6832
252b5132 6833/* Perform a relocation as part of a final link. */
9b485d32 6834
252b5132 6835static bfd_reloc_status_type
57e8b36a
NC		 6836elf32_arm_final_link_relocate (reloc_howto_type * howto,
6837 bfd * input_bfd,
6838 bfd * output_bfd,
6839 asection * input_section,
6840 bfd_byte * contents,
6841 Elf_Internal_Rela * rel,
6842 bfd_vma value,
6843 struct bfd_link_info * info,
6844 asection * sym_sec,
6845 const char * sym_name,
6846 int sym_flags,
0945cdfd 6847 struct elf_link_hash_entry * h,
f2a9dd69 6848 bfd_boolean * unresolved_reloc_p,
8029a119 6849 char ** error_message)
252b5132
RH		 6850{
6851 unsigned long r_type = howto->type;
6852 unsigned long r_symndx;
6853 bfd_byte * hit_data = contents + rel->r_offset;
6854 bfd * dynobj = NULL;
6855 Elf_Internal_Shdr * symtab_hdr;
6856 struct elf_link_hash_entry ** sym_hashes;
6857 bfd_vma * local_got_offsets;
6858 asection * sgot = NULL;
6859 asection * splt = NULL;
6860 asection * sreloc = NULL;
252b5132 6861 bfd_vma addend;
ba96a88f
NC		 6862 bfd_signed_vma signed_addend;
6863 struct elf32_arm_link_hash_table * globals;
f21f3fe0 6864
9c504268 6865 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 6866 if (globals == NULL)
6867 return bfd_reloc_notsupported;
9c504268 6868
0ffa91dd
NC		 6869 BFD_ASSERT (is_arm_elf (input_bfd));
6870
6871 /* Some relocation types map to different relocations depending on the
9c504268 6872 target. We pick the right one here. */
eb043451
PB		 6873 r_type = arm_real_reloc_type (globals, r_type);
6874 if (r_type != howto->type)
6875 howto = elf32_arm_howto_from_type (r_type);
9c504268 6876
cac15327
NC		 6877 /* If the start address has been set, then set the EF_ARM_HASENTRY
6878 flag. Setting this more than once is redundant, but the cost is
6879 not too high, and it keeps the code simple.
99e4ae17 6880
cac15327
NC		 6881 The test is done here, rather than somewhere else, because the
6882 start address is only set just before the final link commences.
6883
6884 Note - if the user deliberately sets a start address of 0, the
6885 flag will not be set. */
6886 if (bfd_get_start_address (output_bfd) != 0)
6887 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 6888
252b5132
RH		 6889 dynobj = elf_hash_table (info)->dynobj;
6890 if (dynobj)
6891 {
6892 sgot = bfd_get_section_by_name (dynobj, ".got");
6893 splt = bfd_get_section_by_name (dynobj, ".plt");
6894 }
0ffa91dd 6895 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6896 sym_hashes = elf_sym_hashes (input_bfd);
6897 local_got_offsets = elf_local_got_offsets (input_bfd);
6898 r_symndx = ELF32_R_SYM (rel->r_info);
6899
4e7fd91e 6900 if (globals->use_rel)
ba96a88f 6901 {
4e7fd91e
PB		 6902 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
6903
6904 if (addend & ((howto->src_mask + 1) >> 1))
6905 {
6906 signed_addend = -1;
6907 signed_addend &= ~ howto->src_mask;
6908 signed_addend |= addend;
6909 }
6910 else
6911 signed_addend = addend;
ba96a88f
NC		 6912 }
6913 else
4e7fd91e 6914 addend = signed_addend = rel->r_addend;
f21f3fe0 6915
252b5132
RH		 6916 switch (r_type)
6917 {
6918 case R_ARM_NONE:
28a094c2
DJ		 6919 /* We don't need to find a value for this symbol. It's just a
6920 marker. */
6921 *unresolved_reloc_p = FALSE;
252b5132
RH		 6922 return bfd_reloc_ok;
6923
00a97672
RS		 6924 case R_ARM_ABS12:
6925 if (!globals->vxworks_p)
6926 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
6927
252b5132
RH		 6928 case R_ARM_PC24:
6929 case R_ARM_ABS32:
bb224fc3 6930 case R_ARM_ABS32_NOI:
252b5132 6931 case R_ARM_REL32:
bb224fc3 6932 case R_ARM_REL32_NOI:
5b5bb741
PB		 6933 case R_ARM_CALL:
6934 case R_ARM_JUMP24:
dfc5f959 6935 case R_ARM_XPC25:
eb043451 6936 case R_ARM_PREL31:
7359ea65 6937 case R_ARM_PLT32:
7359ea65
DJ		 6938 /* Handle relocations which should use the PLT entry. ABS32/REL32
6939 will use the symbol's value, which may point to a PLT entry, but we
6940 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 6941 branches in this object should go to it, except if the PLT is too
6942 far away, in which case a long branch stub should be inserted. */
bb224fc3 6943 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
5fa9e92f 6944 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 6945 && r_type != R_ARM_CALL
6946 && r_type != R_ARM_JUMP24
6947 && r_type != R_ARM_PLT32)
7359ea65 6948 && h != NULL
c84cd8ee 6949 && splt != NULL
7359ea65
DJ		 6950 && h->plt.offset != (bfd_vma) -1)
6951 {
c84cd8ee
DJ		 6952 /* If we've created a .plt section, and assigned a PLT entry to
6953 this function, it should not be known to bind locally. If
6954 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 6955 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
6956
6957 value = (splt->output_section->vma
6958 + splt->output_offset
6959 + h->plt.offset);
0945cdfd 6960 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 6961 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6962 contents, rel->r_offset, value,
00a97672 6963 rel->r_addend);
7359ea65
DJ		 6964 }
6965
67687978
PB		 6966 /* When generating a shared object or relocatable executable, these
6967 relocations are copied into the output file to be resolved at
6968 run time. */
6969 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 6970 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 6971 && !(globals->vxworks_p
3348747a
NS		 6972 && strcmp (input_section->output_section->name,
6973 ".tls_vars") == 0)
bb224fc3 6974 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 6975 || !SYMBOL_CALLS_LOCAL (info, h))
fe33d2fa 6976 && (!strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 6977 && (h == NULL
6978 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6979 || h->root.type != bfd_link_hash_undefweak)
6980 && r_type != R_ARM_PC24
5b5bb741
PB		 6981 && r_type != R_ARM_CALL
6982 && r_type != R_ARM_JUMP24
ee06dc07 6983 && r_type != R_ARM_PREL31
7359ea65 6984 && r_type != R_ARM_PLT32)
252b5132 6985 {
947216bf
AM		 6986 Elf_Internal_Rela outrel;
6987 bfd_byte *loc;
b34976b6 6988 bfd_boolean skip, relocate;
f21f3fe0 6989
0945cdfd
DJ		 6990 *unresolved_reloc_p = FALSE;
6991
252b5132
RH		 6992 if (sreloc == NULL)
6993 {
83bac4b0
NC		 6994 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
6995 ! globals->use_rel);
f21f3fe0 6996
83bac4b0 6997 if (sreloc == NULL)
252b5132 6998 return bfd_reloc_notsupported;
252b5132 6999 }
f21f3fe0 7000
b34976b6
AM		 7001 skip = FALSE;
7002 relocate = FALSE;
f21f3fe0 7003
00a97672 7004 outrel.r_addend = addend;
c629eae0
JJ		 7005 outrel.r_offset =
7006 _bfd_elf_section_offset (output_bfd, info, input_section,
7007 rel->r_offset);
7008 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 7009 skip = TRUE;
0bb2d96a 7010 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 7011 skip = TRUE, relocate = TRUE;
252b5132
RH		 7012 outrel.r_offset += (input_section->output_section->vma
7013 + input_section->output_offset);
f21f3fe0 7014
252b5132 7015 if (skip)
0bb2d96a 7016 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 7017 else if (h != NULL
7018 && h->dynindx != -1
7359ea65 7019 && (!info->shared
5e681ec4 7020 || !info->symbolic
f5385ebf 7021 || !h->def_regular))
5e681ec4 7022 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 7023 else
7024 {
a16385dc
MM		 7025 int symbol;
7026
5e681ec4 7027 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 7028 if (sym_flags == STT_ARM_TFUNC)
7029 value |= 1;
a16385dc 7030 if (globals->symbian_p)
6366ff1e 7031 {
74541ad4
AM		 7032 asection *osec;
7033
6366ff1e
MM		 7034 /* On Symbian OS, the data segment and text segement
7035 can be relocated independently. Therefore, we
7036 must indicate the segment to which this
7037 relocation is relative. The BPABI allows us to
7038 use any symbol in the right segment; we just use
7039 the section symbol as it is convenient. (We
7040 cannot use the symbol given by "h" directly as it
74541ad4
AM		 7041 will not appear in the dynamic symbol table.)
7042
7043 Note that the dynamic linker ignores the section
7044 symbol value, so we don't subtract osec->vma
7045 from the emitted reloc addend. */
10dbd1f3 7046 if (sym_sec)
74541ad4 7047 osec = sym_sec->output_section;
10dbd1f3 7048 else
74541ad4
AM		 7049 osec = input_section->output_section;
7050 symbol = elf_section_data (osec)->dynindx;
7051 if (symbol == 0)
7052 {
7053 struct elf_link_hash_table *htab = elf_hash_table (info);
7054
7055 if ((osec->flags & SEC_READONLY) == 0
7056 && htab->data_index_section != NULL)
7057 osec = htab->data_index_section;
7058 else
7059 osec = htab->text_index_section;
7060 symbol = elf_section_data (osec)->dynindx;
7061 }
6366ff1e
MM		 7062 BFD_ASSERT (symbol != 0);
7063 }
a16385dc
MM		 7064 else
7065 /* On SVR4-ish systems, the dynamic loader cannot
7066 relocate the text and data segments independently,
7067 so the symbol does not matter. */
7068 symbol = 0;
7069 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 7070 if (globals->use_rel)
7071 relocate = TRUE;
7072 else
7073 outrel.r_addend += value;
252b5132 7074 }
f21f3fe0 7075
947216bf 7076 loc = sreloc->contents;
00a97672
RS		 7077 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
7078 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 7079
f21f3fe0 7080 /* If this reloc is against an external symbol, we do not want to
252b5132 7081 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 7082 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 7083 if (! relocate)
7084 return bfd_reloc_ok;
9a5aca8c 7085
f21f3fe0 7086 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 7087 contents, rel->r_offset, value,
7088 (bfd_vma) 0);
7089 }
7090 else switch (r_type)
7091 {
00a97672
RS		 7092 case R_ARM_ABS12:
7093 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
7094
dfc5f959 7095 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 7096 case R_ARM_CALL:
7097 case R_ARM_JUMP24:
8029a119 7098 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 7099 case R_ARM_PLT32:
906e58ca 7100 {
906e58ca
NC		 7101 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
7102
dfc5f959 7103 if (r_type == R_ARM_XPC25)
252b5132 7104 {
dfc5f959
NC		 7105 /* Check for Arm calling Arm function. */
7106 /* FIXME: Should we translate the instruction into a BL
7107 instruction instead ? */
7108 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 7109 (*_bfd_error_handler)
7110 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
7111 input_bfd,
7112 h ? h->root.root.string : "(local)");
dfc5f959 7113 }
155d87d7 7114 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 7115 {
7116 /* Check for Arm calling Thumb function. */
7117 if (sym_flags == STT_ARM_TFUNC)
7118 {
f2a9dd69
DJ		 7119 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
7120 output_bfd, input_section,
7121 hit_data, sym_sec, rel->r_offset,
7122 signed_addend, value,
7123 error_message))
7124 return bfd_reloc_ok;
7125 else
7126 return bfd_reloc_dangerous;
dfc5f959 7127 }
252b5132 7128 }
ba96a88f 7129
906e58ca 7130 /* Check if a stub has to be inserted because the
8029a119 7131 destination is too far or we are changing mode. */
155d87d7
CL		 7132 if ( r_type == R_ARM_CALL
7133 || r_type == R_ARM_JUMP24
7134 || r_type == R_ARM_PLT32)
906e58ca 7135 {
fe33d2fa
CL		 7136 enum elf32_arm_stub_type stub_type = arm_stub_none;
7137 struct elf32_arm_link_hash_entry *hash;
7138
7139 hash = (struct elf32_arm_link_hash_entry *) h;
7140 stub_type = arm_type_of_stub (info, input_section, rel,
7141 &sym_flags, hash,
7142 value, sym_sec,
7143 input_bfd, sym_name);
5fa9e92f 7144
fe33d2fa 7145 if (stub_type != arm_stub_none)
906e58ca
NC		 7146 {
7147 /* The target is out of reach, so redirect the
7148 branch to the local stub for this function. */
7149
7150 stub_entry = elf32_arm_get_stub_entry (input_section,
7151 sym_sec, h,
fe33d2fa
CL		 7152 rel, globals,
7153 stub_type);
906e58ca
NC		 7154 if (stub_entry != NULL)
7155 value = (stub_entry->stub_offset
7156 + stub_entry->stub_sec->output_offset
7157 + stub_entry->stub_sec->output_section->vma);
7158 }
fe33d2fa
CL		 7159 else
7160 {
7161 /* If the call goes through a PLT entry, make sure to
7162 check distance to the right destination address. */
7163 if (h != NULL
7164 && splt != NULL
7165 && h->plt.offset != (bfd_vma) -1)
7166 {
7167 value = (splt->output_section->vma
7168 + splt->output_offset
7169 + h->plt.offset);
7170 *unresolved_reloc_p = FALSE;
7171 /* The PLT entry is in ARM mode, regardless of the
7172 target function. */
7173 sym_flags = STT_FUNC;
7174 }
7175 }
906e58ca
NC		 7176 }
7177
dea514f5
PB		 7178 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
7179 where:
7180 S is the address of the symbol in the relocation.
7181 P is address of the instruction being relocated.
7182 A is the addend (extracted from the instruction) in bytes.
7183
7184 S is held in 'value'.
7185 P is the base address of the section containing the
7186 instruction plus the offset of the reloc into that
7187 section, ie:
7188 (input_section->output_section->vma +
7189 input_section->output_offset +
7190 rel->r_offset).
7191 A is the addend, converted into bytes, ie:
7192 (signed_addend * 4)
7193
7194 Note: None of these operations have knowledge of the pipeline
7195 size of the processor, thus it is up to the assembler to
7196 encode this information into the addend. */
7197 value -= (input_section->output_section->vma
7198 + input_section->output_offset);
7199 value -= rel->r_offset;
4e7fd91e
PB		 7200 if (globals->use_rel)
7201 value += (signed_addend << howto->size);
7202 else
7203 /* RELA addends do not have to be adjusted by howto->size. */
7204 value += signed_addend;
23080146 7205
dcb5e6e6
NC		 7206 signed_addend = value;
7207 signed_addend >>= howto->rightshift;
9a5aca8c 7208
5ab79981 7209 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 7210 the next instruction unless a PLT entry will be created.
cd1dac3d
DG		 7211 Do the same for local undefined symbols.
7212 The jump to the next instruction is optimized as a NOP depending
7213 on the architecture. */
ffcb4889
NS		 7214 if (h ? (h->root.type == bfd_link_hash_undefweak
7215 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
7216 : bfd_is_und_section (sym_sec))
5ab79981 7217 {
cd1dac3d
DG		 7218 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
7219
7220 if (arch_has_arm_nop (globals))
7221 value |= 0x0320f000;
7222 else
7223 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 7224 }
7225 else
59f2c4e7 7226 {
9b485d32 7227 /* Perform a signed range check. */
dcb5e6e6 7228 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 7229 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
7230 return bfd_reloc_overflow;
9a5aca8c 7231
5ab79981 7232 addend = (value & 2);
39b41c9c 7233
5ab79981
PB		 7234 value = (signed_addend & howto->dst_mask)
7235 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 7236
5ab79981
PB		 7237 if (r_type == R_ARM_CALL)
7238 {
155d87d7
CL		 7239 /* Set the H bit in the BLX instruction. */
7240 if (sym_flags == STT_ARM_TFUNC)
7241 {
7242 if (addend)
7243 value |= (1 << 24);
7244 else
7245 value &= ~(bfd_vma)(1 << 24);
7246 }
7247
5ab79981 7248 /* Select the correct instruction (BL or BLX). */
906e58ca 7249 /* Only if we are not handling a BL to a stub. In this
8029a119 7250 case, mode switching is performed by the stub. */
906e58ca 7251 if (sym_flags == STT_ARM_TFUNC && !stub_entry)
5ab79981
PB		 7252 value |= (1 << 28);
7253 else
7254 {
7255 value &= ~(bfd_vma)(1 << 28);
7256 value |= (1 << 24);
7257 }
39b41c9c
PB		 7258 }
7259 }
906e58ca 7260 }
252b5132 7261 break;
f21f3fe0 7262
252b5132
RH		 7263 case R_ARM_ABS32:
7264 value += addend;
7265 if (sym_flags == STT_ARM_TFUNC)
7266 value |= 1;
7267 break;
f21f3fe0 7268
bb224fc3
MS		 7269 case R_ARM_ABS32_NOI:
7270 value += addend;
7271 break;
7272
252b5132 7273 case R_ARM_REL32:
a8bc6c78
PB		 7274 value += addend;
7275 if (sym_flags == STT_ARM_TFUNC)
7276 value |= 1;
252b5132 7277 value -= (input_section->output_section->vma
62efb346 7278 + input_section->output_offset + rel->r_offset);
252b5132 7279 break;
eb043451 7280
bb224fc3
MS		 7281 case R_ARM_REL32_NOI:
7282 value += addend;
7283 value -= (input_section->output_section->vma
7284 + input_section->output_offset + rel->r_offset);
7285 break;
7286
eb043451
PB		 7287 case R_ARM_PREL31:
7288 value -= (input_section->output_section->vma
7289 + input_section->output_offset + rel->r_offset);
7290 value += signed_addend;
7291 if (! h || h->root.type != bfd_link_hash_undefweak)
7292 {
8029a119 7293 /* Check for overflow. */
eb043451
PB		 7294 if ((value ^ (value >> 1)) & (1 << 30))
7295 return bfd_reloc_overflow;
7296 }
7297 value &= 0x7fffffff;
7298 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
7299 if (sym_flags == STT_ARM_TFUNC)
7300 value |= 1;
7301 break;
252b5132 7302 }
f21f3fe0 7303
252b5132
RH		 7304 bfd_put_32 (input_bfd, value, hit_data);
7305 return bfd_reloc_ok;
7306
7307 case R_ARM_ABS8:
7308 value += addend;
4e67d4ca
DG		 7309
7310 /* There is no way to tell whether the user intended to use a signed or
7311 unsigned addend. When checking for overflow we accept either,
7312 as specified by the AAELF. */
7313 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 7314 return bfd_reloc_overflow;
7315
7316 bfd_put_8 (input_bfd, value, hit_data);
7317 return bfd_reloc_ok;
7318
7319 case R_ARM_ABS16:
7320 value += addend;
7321
4e67d4ca
DG		 7322 /* See comment for R_ARM_ABS8. */
7323 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 7324 return bfd_reloc_overflow;
7325
7326 bfd_put_16 (input_bfd, value, hit_data);
7327 return bfd_reloc_ok;
7328
252b5132 7329 case R_ARM_THM_ABS5:
9b485d32 7330 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 7331 if (globals->use_rel)
7332 {
7333 /* Need to refetch addend. */
7334 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7335 /* ??? Need to determine shift amount from operand size. */
7336 addend >>= howto->rightshift;
7337 }
252b5132
RH		 7338 value += addend;
7339
7340 /* ??? Isn't value unsigned? */
7341 if ((long) value > 0x1f || (long) value < -0x10)
7342 return bfd_reloc_overflow;
7343
7344 /* ??? Value needs to be properly shifted into place first. */
7345 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
7346 bfd_put_16 (input_bfd, value, hit_data);
7347 return bfd_reloc_ok;
7348
2cab6cc3
MS		 7349 case R_ARM_THM_ALU_PREL_11_0:
7350 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
7351 {
7352 bfd_vma insn;
7353 bfd_signed_vma relocation;
7354
7355 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7356 | bfd_get_16 (input_bfd, hit_data + 2);
7357
7358 if (globals->use_rel)
7359 {
7360 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
7361 | ((insn & (1 << 26)) >> 15);
7362 if (insn & 0xf00000)
7363 signed_addend = -signed_addend;
7364 }
7365
7366 relocation = value + signed_addend;
7367 relocation -= (input_section->output_section->vma
7368 + input_section->output_offset
7369 + rel->r_offset);
7370
7371 value = abs (relocation);
7372
7373 if (value >= 0x1000)
7374 return bfd_reloc_overflow;
7375
7376 insn = (insn & 0xfb0f8f00) | (value & 0xff)
7377 | ((value & 0x700) << 4)
7378 | ((value & 0x800) << 15);
7379 if (relocation < 0)
7380 insn |= 0xa00000;
7381
7382 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7383 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7384
7385 return bfd_reloc_ok;
7386 }
7387
e1ec24c6
NC		 7388 case R_ARM_THM_PC8:
7389 /* PR 10073: This reloc is not generated by the GNU toolchain,
7390 but it is supported for compatibility with third party libraries
7391 generated by other compilers, specifically the ARM/IAR. */
7392 {
7393 bfd_vma insn;
7394 bfd_signed_vma relocation;
7395
7396 insn = bfd_get_16 (input_bfd, hit_data);
7397
7398 if (globals->use_rel)
7399 addend = (insn & 0x00ff) << 2;
7400
7401 relocation = value + addend;
7402 relocation -= (input_section->output_section->vma
7403 + input_section->output_offset
7404 + rel->r_offset);
7405
7406 value = abs (relocation);
7407
7408 /* We do not check for overflow of this reloc. Although strictly
7409 speaking this is incorrect, it appears to be necessary in order
7410 to work with IAR generated relocs. Since GCC and GAS do not
7411 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
7412 a problem for them. */
7413 value &= 0x3fc;
7414
7415 insn = (insn & 0xff00) | (value >> 2);
7416
7417 bfd_put_16 (input_bfd, insn, hit_data);
7418
7419 return bfd_reloc_ok;
7420 }
7421
2cab6cc3
MS		 7422 case R_ARM_THM_PC12:
7423 /* Corresponds to: ldr.w reg, [pc, #offset]. */
7424 {
7425 bfd_vma insn;
7426 bfd_signed_vma relocation;
7427
7428 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
7429 | bfd_get_16 (input_bfd, hit_data + 2);
7430
7431 if (globals->use_rel)
7432 {
7433 signed_addend = insn & 0xfff;
7434 if (!(insn & (1 << 23)))
7435 signed_addend = -signed_addend;
7436 }
7437
7438 relocation = value + signed_addend;
7439 relocation -= (input_section->output_section->vma
7440 + input_section->output_offset
7441 + rel->r_offset);
7442
7443 value = abs (relocation);
7444
7445 if (value >= 0x1000)
7446 return bfd_reloc_overflow;
7447
7448 insn = (insn & 0xff7ff000) | value;
7449 if (relocation >= 0)
7450 insn |= (1 << 23);
7451
7452 bfd_put_16 (input_bfd, insn >> 16, hit_data);
7453 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
7454
7455 return bfd_reloc_ok;
7456 }
7457
dfc5f959 7458 case R_ARM_THM_XPC22:
c19d1205 7459 case R_ARM_THM_CALL:
bd97cb95 7460 case R_ARM_THM_JUMP24:
dfc5f959 7461 /* Thumb BL (branch long instruction). */
252b5132 7462 {
b34976b6 7463 bfd_vma relocation;
e95de063 7464 bfd_vma reloc_sign;
b34976b6
AM		 7465 bfd_boolean overflow = FALSE;
7466 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7467 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 7468 bfd_signed_vma reloc_signed_max;
7469 bfd_signed_vma reloc_signed_min;
b34976b6 7470 bfd_vma check;
252b5132 7471 bfd_signed_vma signed_check;
e95de063 7472 int bitsize;
cd1dac3d 7473 const int thumb2 = using_thumb2 (globals);
252b5132 7474
5ab79981 7475 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 7476 the next instruction unless a PLT entry will be created.
7477 The jump to the next instruction is optimized as a NOP.W for
7478 Thumb-2 enabled architectures. */
19540007
JM		 7479 if (h && h->root.type == bfd_link_hash_undefweak
7480 && !(splt != NULL && h->plt.offset != (bfd_vma) -1))
5ab79981 7481 {
cd1dac3d
DG		 7482 if (arch_has_thumb2_nop (globals))
7483 {
7484 bfd_put_16 (input_bfd, 0xf3af, hit_data);
7485 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
7486 }
7487 else
7488 {
7489 bfd_put_16 (input_bfd, 0xe000, hit_data);
7490 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
7491 }
5ab79981
PB		 7492 return bfd_reloc_ok;
7493 }
7494
e95de063
MS		 7495 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
7496 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 7497 if (globals->use_rel)
7498 {
e95de063
MS		 7499 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
7500 bfd_vma upper = upper_insn & 0x3ff;
7501 bfd_vma lower = lower_insn & 0x7ff;
7502 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
7503 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
7504 bfd_vma i1 = j1 ^ s ? 0 : 1;
7505 bfd_vma i2 = j2 ^ s ? 0 : 1;
7506
7507 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
7508 /* Sign extend. */
7509 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
7510
4e7fd91e
PB		 7511 signed_addend = addend;
7512 }
cb1afa5c 7513
dfc5f959
NC		 7514 if (r_type == R_ARM_THM_XPC22)
7515 {
7516 /* Check for Thumb to Thumb call. */
7517 /* FIXME: Should we translate the instruction into a BL
7518 instruction instead ? */
7519 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 7520 (*_bfd_error_handler)
7521 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
7522 input_bfd,
7523 h ? h->root.root.string : "(local)");
dfc5f959
NC		 7524 }
7525 else
252b5132 7526 {
dfc5f959
NC		 7527 /* If it is not a call to Thumb, assume call to Arm.
7528 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 7529 function call at all, but rather a long jump. Calls through
7530 the PLT do not require stubs. */
7531 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
7532 && (h == NULL || splt == NULL
7533 || h->plt.offset == (bfd_vma) -1))
dfc5f959 7534 {
bd97cb95 7535 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7536 {
7537 /* Convert BL to BLX. */
7538 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7539 }
155d87d7
CL		 7540 else if (( r_type != R_ARM_THM_CALL)
7541 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 7542 {
7543 if (elf32_thumb_to_arm_stub
7544 (info, sym_name, input_bfd, output_bfd, input_section,
7545 hit_data, sym_sec, rel->r_offset, signed_addend, value,
7546 error_message))
7547 return bfd_reloc_ok;
7548 else
7549 return bfd_reloc_dangerous;
7550 }
da5938a2 7551 }
bd97cb95
DJ		 7552 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
7553 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 7554 {
7555 /* Make sure this is a BL. */
7556 lower_insn |= 0x1800;
7557 }
252b5132 7558 }
f21f3fe0 7559
fe33d2fa 7560 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 7561 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 7562 {
7563 /* Check if a stub has to be inserted because the destination
8029a119 7564 is too far. */
fe33d2fa
CL		 7565 struct elf32_arm_stub_hash_entry *stub_entry;
7566 struct elf32_arm_link_hash_entry *hash;
7567
7568 hash = (struct elf32_arm_link_hash_entry *) h;
7569
7570 stub_type = arm_type_of_stub (info, input_section, rel,
7571 &sym_flags, hash, value, sym_sec,
7572 input_bfd, sym_name);
7573
7574 if (stub_type != arm_stub_none)
906e58ca
NC		 7575 {
7576 /* The target is out of reach or we are changing modes, so
7577 redirect the branch to the local stub for this
7578 function. */
7579 stub_entry = elf32_arm_get_stub_entry (input_section,
7580 sym_sec, h,
fe33d2fa
CL		 7581 rel, globals,
7582 stub_type);
906e58ca
NC		 7583 if (stub_entry != NULL)
7584 value = (stub_entry->stub_offset
7585 + stub_entry->stub_sec->output_offset
7586 + stub_entry->stub_sec->output_section->vma);
7587
f4ac8484 7588 /* If this call becomes a call to Arm, force BLX. */
155d87d7 7589 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 7590 {
7591 if ((stub_entry
7592 && !arm_stub_is_thumb (stub_entry->stub_type))
7593 || (sym_flags != STT_ARM_TFUNC))
7594 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7595 }
906e58ca
NC		 7596 }
7597 }
7598
fe33d2fa
CL		 7599 /* Handle calls via the PLT. */
7600 if (stub_type == arm_stub_none
7601 && h != NULL
7602 && splt != NULL
7603 && h->plt.offset != (bfd_vma) -1)
7604 {
7605 value = (splt->output_section->vma
7606 + splt->output_offset
7607 + h->plt.offset);
7608
7609 if (globals->use_blx && r_type == R_ARM_THM_CALL)
7610 {
7611 /* If the Thumb BLX instruction is available, convert
7612 the BL to a BLX instruction to call the ARM-mode
7613 PLT entry. */
7614 lower_insn = (lower_insn & ~0x1000) | 0x0800;
7615 sym_flags = STT_FUNC;
7616 }
7617 else
7618 {
7619 /* Target the Thumb stub before the ARM PLT entry. */
7620 value -= PLT_THUMB_STUB_SIZE;
7621 sym_flags = STT_ARM_TFUNC;
7622 }
7623 *unresolved_reloc_p = FALSE;
7624 }
7625
ba96a88f 7626 relocation = value + signed_addend;
f21f3fe0 7627
252b5132 7628 relocation -= (input_section->output_section->vma
ba96a88f
NC		 7629 + input_section->output_offset
7630 + rel->r_offset);
9a5aca8c 7631
252b5132
RH		 7632 check = relocation >> howto->rightshift;
7633
7634 /* If this is a signed value, the rightshift just dropped
7635 leading 1 bits (assuming twos complement). */
7636 if ((bfd_signed_vma) relocation >= 0)
7637 signed_check = check;
7638 else
7639 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
7640
e95de063
MS		 7641 /* Calculate the permissable maximum and minimum values for
7642 this relocation according to whether we're relocating for
7643 Thumb-2 or not. */
7644 bitsize = howto->bitsize;
7645 if (!thumb2)
7646 bitsize -= 2;
f6ebfac0 7647 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 7648 reloc_signed_min = ~reloc_signed_max;
7649
252b5132 7650 /* Assumes two's complement. */
ba96a88f 7651 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 7652 overflow = TRUE;
252b5132 7653
bd97cb95 7654 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 7655 /* For a BLX instruction, make sure that the relocation is rounded up
7656 to a word boundary. This follows the semantics of the instruction
7657 which specifies that bit 1 of the target address will come from bit
7658 1 of the base address. */
7659 relocation = (relocation + 2) & ~ 3;
cb1afa5c 7660
e95de063
MS		 7661 /* Put RELOCATION back into the insn. Assumes two's complement.
7662 We use the Thumb-2 encoding, which is safe even if dealing with
7663 a Thumb-1 instruction by virtue of our overflow check above. */
7664 reloc_sign = (signed_check < 0) ? 1 : 0;
7665 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
7666 | ((relocation >> 12) & 0x3ff)
7667 | (reloc_sign << 10);
906e58ca 7668 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
e95de063
MS		 7669 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
7670 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
7671 | ((relocation >> 1) & 0x7ff);
c62e1cc3 7672
252b5132
RH		 7673 /* Put the relocated value back in the object file: */
7674 bfd_put_16 (input_bfd, upper_insn, hit_data);
7675 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7676
7677 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7678 }
7679 break;
7680
c19d1205
ZW		 7681 case R_ARM_THM_JUMP19:
7682 /* Thumb32 conditional branch instruction. */
7683 {
7684 bfd_vma relocation;
7685 bfd_boolean overflow = FALSE;
7686 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
7687 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 7688 bfd_signed_vma reloc_signed_max = 0xffffe;
7689 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 7690 bfd_signed_vma signed_check;
7691
7692 /* Need to refetch the addend, reconstruct the top three bits,
7693 and squish the two 11 bit pieces together. */
7694 if (globals->use_rel)
7695 {
7696 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 7697 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 7698 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
7699 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
7700 bfd_vma lower = (lower_insn & 0x07ff);
7701
a00a1f35
MS		 7702 upper |= J1 << 6;
7703 upper |= J2 << 7;
7704 upper |= (!S) << 8;
c19d1205
ZW		 7705 upper -= 0x0100; /* Sign extend. */
7706
7707 addend = (upper << 12) | (lower << 1);
7708 signed_addend = addend;
7709 }
7710
bd97cb95
DJ		 7711 /* Handle calls via the PLT. */
7712 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
7713 {
7714 value = (splt->output_section->vma
7715 + splt->output_offset
7716 + h->plt.offset);
7717 /* Target the Thumb stub before the ARM PLT entry. */
7718 value -= PLT_THUMB_STUB_SIZE;
7719 *unresolved_reloc_p = FALSE;
7720 }
7721
c19d1205
ZW		 7722 /* ??? Should handle interworking? GCC might someday try to
7723 use this for tail calls. */
7724
7725 relocation = value + signed_addend;
7726 relocation -= (input_section->output_section->vma
7727 + input_section->output_offset
7728 + rel->r_offset);
a00a1f35 7729 signed_check = (bfd_signed_vma) relocation;
c19d1205 7730
c19d1205
ZW		 7731 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7732 overflow = TRUE;
7733
7734 /* Put RELOCATION back into the insn. */
7735 {
7736 bfd_vma S = (relocation & 0x00100000) >> 20;
7737 bfd_vma J2 = (relocation & 0x00080000) >> 19;
7738 bfd_vma J1 = (relocation & 0x00040000) >> 18;
7739 bfd_vma hi = (relocation & 0x0003f000) >> 12;
7740 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
7741
a00a1f35 7742 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 7743 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
7744 }
7745
7746 /* Put the relocated value back in the object file: */
7747 bfd_put_16 (input_bfd, upper_insn, hit_data);
7748 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
7749
7750 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
7751 }
7752
7753 case R_ARM_THM_JUMP11:
7754 case R_ARM_THM_JUMP8:
7755 case R_ARM_THM_JUMP6:
51c5503b
NC		 7756 /* Thumb B (branch) instruction). */
7757 {
6cf9e9fe 7758 bfd_signed_vma relocation;
51c5503b
NC		 7759 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
7760 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 7761 bfd_signed_vma signed_check;
7762
c19d1205
ZW		 7763 /* CZB cannot jump backward. */
7764 if (r_type == R_ARM_THM_JUMP6)
7765 reloc_signed_min = 0;
7766
4e7fd91e 7767 if (globals->use_rel)
6cf9e9fe 7768 {
4e7fd91e
PB		 7769 /* Need to refetch addend. */
7770 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
7771 if (addend & ((howto->src_mask + 1) >> 1))
7772 {
7773 signed_addend = -1;
7774 signed_addend &= ~ howto->src_mask;
7775 signed_addend |= addend;
7776 }
7777 else
7778 signed_addend = addend;
7779 /* The value in the insn has been right shifted. We need to
7780 undo this, so that we can perform the address calculation
7781 in terms of bytes. */
7782 signed_addend <<= howto->rightshift;
6cf9e9fe 7783 }
6cf9e9fe 7784 relocation = value + signed_addend;
51c5503b
NC		 7785
7786 relocation -= (input_section->output_section->vma
7787 + input_section->output_offset
7788 + rel->r_offset);
7789
6cf9e9fe
NC		 7790 relocation >>= howto->rightshift;
7791 signed_check = relocation;
c19d1205
ZW		 7792
7793 if (r_type == R_ARM_THM_JUMP6)
7794 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
7795 else
7796 relocation &= howto->dst_mask;
51c5503b 7797 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 7798
51c5503b
NC		 7799 bfd_put_16 (input_bfd, relocation, hit_data);
7800
7801 /* Assumes two's complement. */
7802 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
7803 return bfd_reloc_overflow;
7804
7805 return bfd_reloc_ok;
7806 }
cedb70c5 7807
8375c36b
PB		 7808 case R_ARM_ALU_PCREL7_0:
7809 case R_ARM_ALU_PCREL15_8:
7810 case R_ARM_ALU_PCREL23_15:
7811 {
7812 bfd_vma insn;
7813 bfd_vma relocation;
7814
7815 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 7816 if (globals->use_rel)
7817 {
7818 /* Extract the addend. */
7819 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
7820 signed_addend = addend;
7821 }
8375c36b
PB		 7822 relocation = value + signed_addend;
7823
7824 relocation -= (input_section->output_section->vma
7825 + input_section->output_offset
7826 + rel->r_offset);
7827 insn = (insn & ~0xfff)
7828 | ((howto->bitpos << 7) & 0xf00)
7829 | ((relocation >> howto->bitpos) & 0xff);
7830 bfd_put_32 (input_bfd, value, hit_data);
7831 }
7832 return bfd_reloc_ok;
7833
252b5132
RH		 7834 case R_ARM_GNU_VTINHERIT:
7835 case R_ARM_GNU_VTENTRY:
7836 return bfd_reloc_ok;
7837
c19d1205 7838 case R_ARM_GOTOFF32:
252b5132
RH		 7839 /* Relocation is relative to the start of the
7840 global offset table. */
7841
7842 BFD_ASSERT (sgot != NULL);
7843 if (sgot == NULL)
7844 return bfd_reloc_notsupported;
9a5aca8c 7845
cedb70c5 7846 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 7847 address by one, so that attempts to call the function pointer will
7848 correctly interpret it as Thumb code. */
7849 if (sym_flags == STT_ARM_TFUNC)
7850 value += 1;
7851
252b5132
RH		 7852 /* Note that sgot->output_offset is not involved in this
7853 calculation. We always want the start of .got. If we
7854 define _GLOBAL_OFFSET_TABLE in a different way, as is
7855 permitted by the ABI, we might have to change this
9b485d32 7856 calculation. */
252b5132 7857 value -= sgot->output_section->vma;
f21f3fe0 7858 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7859 contents, rel->r_offset, value,
00a97672 7860 rel->r_addend);
252b5132
RH		 7861
7862 case R_ARM_GOTPC:
a7c10850 7863 /* Use global offset table as symbol value. */
252b5132 7864 BFD_ASSERT (sgot != NULL);
f21f3fe0 7865
252b5132
RH		 7866 if (sgot == NULL)
7867 return bfd_reloc_notsupported;
7868
0945cdfd 7869 *unresolved_reloc_p = FALSE;
252b5132 7870 value = sgot->output_section->vma;
f21f3fe0 7871 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7872 contents, rel->r_offset, value,
00a97672 7873 rel->r_addend);
f21f3fe0 7874
252b5132 7875 case R_ARM_GOT32:
eb043451 7876 case R_ARM_GOT_PREL:
252b5132 7877 /* Relocation is to the entry for this symbol in the
9b485d32 7878 global offset table. */
252b5132
RH		 7879 if (sgot == NULL)
7880 return bfd_reloc_notsupported;
f21f3fe0 7881
252b5132
RH		 7882 if (h != NULL)
7883 {
7884 bfd_vma off;
5e681ec4 7885 bfd_boolean dyn;
f21f3fe0 7886
252b5132
RH		 7887 off = h->got.offset;
7888 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 7889 dyn = globals->root.dynamic_sections_created;
f21f3fe0 7890
5e681ec4 7891 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 7892 || (info->shared
5e681ec4
PB		 7893 && SYMBOL_REFERENCES_LOCAL (info, h))
7894 || (ELF_ST_VISIBILITY (h->other)
7895 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 7896 {
7897 /* This is actually a static link, or it is a -Bsymbolic link
7898 and the symbol is defined locally. We must initialize this
7899 entry in the global offset table. Since the offset must
7900 always be a multiple of 4, we use the least significant bit
7901 to record whether we have initialized it already.
f21f3fe0 7902
00a97672 7903 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 7904 entry to initialize the value. This is done in the
9b485d32 7905 finish_dynamic_symbol routine. */
252b5132
RH		 7906 if ((off & 1) != 0)
7907 off &= ~1;
7908 else
7909 {
ee29b9fb
RE		 7910 /* If we are addressing a Thumb function, we need to
7911 adjust the address by one, so that attempts to
7912 call the function pointer will correctly
7913 interpret it as Thumb code. */
7914 if (sym_flags == STT_ARM_TFUNC)
7915 value |= 1;
7916
252b5132
RH		 7917 bfd_put_32 (output_bfd, value, sgot->contents + off);
7918 h->got.offset |= 1;
7919 }
7920 }
0945cdfd
DJ		 7921 else
7922 *unresolved_reloc_p = FALSE;
f21f3fe0 7923
252b5132
RH		 7924 value = sgot->output_offset + off;
7925 }
7926 else
7927 {
7928 bfd_vma off;
f21f3fe0 7929
252b5132
RH		 7930 BFD_ASSERT (local_got_offsets != NULL &&
7931 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 7932
252b5132 7933 off = local_got_offsets[r_symndx];
f21f3fe0 7934
252b5132
RH		 7935 /* The offset must always be a multiple of 4. We use the
7936 least significant bit to record whether we have already
9b485d32 7937 generated the necessary reloc. */
252b5132
RH		 7938 if ((off & 1) != 0)
7939 off &= ~1;
7940 else
7941 {
b7693d02
DJ		 7942 /* If we are addressing a Thumb function, we need to
7943 adjust the address by one, so that attempts to
7944 call the function pointer will correctly
7945 interpret it as Thumb code. */
7946 if (sym_flags == STT_ARM_TFUNC)
7947 value |= 1;
7948
00a97672
RS		 7949 if (globals->use_rel)
7950 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 7951
252b5132
RH		 7952 if (info->shared)
7953 {
7954 asection * srelgot;
947216bf
AM		 7955 Elf_Internal_Rela outrel;
7956 bfd_byte *loc;
f21f3fe0 7957
00a97672
RS		 7958 srelgot = (bfd_get_section_by_name
7959 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 7960 BFD_ASSERT (srelgot != NULL);
f21f3fe0 7961
00a97672 7962 outrel.r_addend = addend + value;
252b5132 7963 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 7964 + sgot->output_offset
252b5132
RH		 7965 + off);
7966 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 7967 loc = srelgot->contents;
00a97672
RS		 7968 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
7969 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 7970 }
f21f3fe0 7971
252b5132
RH		 7972 local_got_offsets[r_symndx] |= 1;
7973 }
f21f3fe0 7974
252b5132
RH		 7975 value = sgot->output_offset + off;
7976 }
eb043451
PB		 7977 if (r_type != R_ARM_GOT32)
7978 value += sgot->output_section->vma;
9a5aca8c 7979
f21f3fe0 7980 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 7981 contents, rel->r_offset, value,
00a97672 7982 rel->r_addend);
f21f3fe0 7983
ba93b8ac
DJ		 7984 case R_ARM_TLS_LDO32:
7985 value = value - dtpoff_base (info);
7986
7987 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 7988 contents, rel->r_offset, value,
7989 rel->r_addend);
ba93b8ac
DJ		 7990
7991 case R_ARM_TLS_LDM32:
7992 {
7993 bfd_vma off;
7994
7995 if (globals->sgot == NULL)
7996 abort ();
7997
7998 off = globals->tls_ldm_got.offset;
7999
8000 if ((off & 1) != 0)
8001 off &= ~1;
8002 else
8003 {
8004 /* If we don't know the module number, create a relocation
8005 for it. */
8006 if (info->shared)
8007 {
8008 Elf_Internal_Rela outrel;
8009 bfd_byte *loc;
8010
8011 if (globals->srelgot == NULL)
8012 abort ();
8013
00a97672 8014 outrel.r_addend = 0;
ba93b8ac
DJ		 8015 outrel.r_offset = (globals->sgot->output_section->vma
8016 + globals->sgot->output_offset + off);
8017 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
8018
00a97672
RS		 8019 if (globals->use_rel)
8020 bfd_put_32 (output_bfd, outrel.r_addend,
8021 globals->sgot->contents + off);
ba93b8ac
DJ		 8022
8023 loc = globals->srelgot->contents;
00a97672
RS		 8024 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
8025 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 8026 }
8027 else
8028 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
8029
8030 globals->tls_ldm_got.offset |= 1;
8031 }
8032
906e58ca 8033 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8034 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8035
8036 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8037 contents, rel->r_offset, value,
00a97672 8038 rel->r_addend);
ba93b8ac
DJ		 8039 }
8040
8041 case R_ARM_TLS_GD32:
8042 case R_ARM_TLS_IE32:
8043 {
8044 bfd_vma off;
8045 int indx;
8046 char tls_type;
8047
8048 if (globals->sgot == NULL)
8049 abort ();
8050
8051 indx = 0;
8052 if (h != NULL)
8053 {
8054 bfd_boolean dyn;
8055 dyn = globals->root.dynamic_sections_created;
8056 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8057 && (!info->shared
8058 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8059 {
8060 *unresolved_reloc_p = FALSE;
8061 indx = h->dynindx;
8062 }
8063 off = h->got.offset;
8064 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
8065 }
8066 else
8067 {
8068 if (local_got_offsets == NULL)
8069 abort ();
8070 off = local_got_offsets[r_symndx];
8071 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
8072 }
8073
8074 if (tls_type == GOT_UNKNOWN)
8075 abort ();
8076
8077 if ((off & 1) != 0)
8078 off &= ~1;
8079 else
8080 {
8081 bfd_boolean need_relocs = FALSE;
8082 Elf_Internal_Rela outrel;
8083 bfd_byte *loc = NULL;
8084 int cur_off = off;
8085
8086 /* The GOT entries have not been initialized yet. Do it
8087 now, and emit any relocations. If both an IE GOT and a
8088 GD GOT are necessary, we emit the GD first. */
8089
8090 if ((info->shared || indx != 0)
8091 && (h == NULL
8092 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8093 || h->root.type != bfd_link_hash_undefweak))
8094 {
8095 need_relocs = TRUE;
8096 if (globals->srelgot == NULL)
8097 abort ();
8098 loc = globals->srelgot->contents;
00a97672 8099 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 8100 }
8101
8102 if (tls_type & GOT_TLS_GD)
8103 {
8104 if (need_relocs)
8105 {
00a97672 8106 outrel.r_addend = 0;
ba93b8ac 8107 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 8108 + globals->sgot->output_offset
8109 + cur_off);
ba93b8ac 8110 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 8111
00a97672
RS		 8112 if (globals->use_rel)
8113 bfd_put_32 (output_bfd, outrel.r_addend,
8114 globals->sgot->contents + cur_off);
8115
8116 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8117 globals->srelgot->reloc_count++;
00a97672 8118 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8119
8120 if (indx == 0)
8121 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8122 globals->sgot->contents + cur_off + 4);
8123 else
8124 {
00a97672 8125 outrel.r_addend = 0;
ba93b8ac
DJ		 8126 outrel.r_info = ELF32_R_INFO (indx,
8127 R_ARM_TLS_DTPOFF32);
8128 outrel.r_offset += 4;
00a97672
RS		 8129
8130 if (globals->use_rel)
8131 bfd_put_32 (output_bfd, outrel.r_addend,
8132 globals->sgot->contents + cur_off + 4);
8133
8134
8135 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8136 globals->srelgot->reloc_count++;
00a97672 8137 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8138 }
8139 }
8140 else
8141 {
8142 /* If we are not emitting relocations for a
8143 general dynamic reference, then we must be in a
8144 static link or an executable link with the
8145 symbol binding locally. Mark it as belonging
8146 to module 1, the executable. */
8147 bfd_put_32 (output_bfd, 1,
8148 globals->sgot->contents + cur_off);
8149 bfd_put_32 (output_bfd, value - dtpoff_base (info),
8150 globals->sgot->contents + cur_off + 4);
8151 }
8152
8153 cur_off += 8;
8154 }
8155
8156 if (tls_type & GOT_TLS_IE)
8157 {
8158 if (need_relocs)
8159 {
00a97672
RS		 8160 if (indx == 0)
8161 outrel.r_addend = value - dtpoff_base (info);
8162 else
8163 outrel.r_addend = 0;
ba93b8ac
DJ		 8164 outrel.r_offset = (globals->sgot->output_section->vma
8165 + globals->sgot->output_offset
8166 + cur_off);
8167 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
8168
00a97672
RS		 8169 if (globals->use_rel)
8170 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 8171 globals->sgot->contents + cur_off);
8172
00a97672 8173 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 8174 globals->srelgot->reloc_count++;
00a97672 8175 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 8176 }
8177 else
8178 bfd_put_32 (output_bfd, tpoff (info, value),
8179 globals->sgot->contents + cur_off);
8180 cur_off += 4;
8181 }
8182
8183 if (h != NULL)
8184 h->got.offset |= 1;
8185 else
8186 local_got_offsets[r_symndx] |= 1;
8187 }
8188
8189 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
8190 off += 8;
906e58ca 8191 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
ba93b8ac
DJ		 8192 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
8193
8194 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8195 contents, rel->r_offset, value,
00a97672 8196 rel->r_addend);
ba93b8ac
DJ		 8197 }
8198
8199 case R_ARM_TLS_LE32:
8200 if (info->shared)
8201 {
8202 (*_bfd_error_handler)
8203 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
8204 input_bfd, input_section,
8205 (long) rel->r_offset, howto->name);
21d799b5 8206 return (bfd_reloc_status_type) FALSE;
ba93b8ac
DJ		 8207 }
8208 else
8209 value = tpoff (info, value);
906e58ca 8210
ba93b8ac 8211 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 8212 contents, rel->r_offset, value,
8213 rel->r_addend);
ba93b8ac 8214
319850b4
JB		 8215 case R_ARM_V4BX:
8216 if (globals->fix_v4bx)
845b51d6
PB		 8217 {
8218 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 8219
845b51d6
PB		 8220 /* Ensure that we have a BX instruction. */
8221 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 8222
845b51d6
PB		 8223 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
8224 {
8225 /* Branch to veneer. */
8226 bfd_vma glue_addr;
8227 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
8228 glue_addr -= input_section->output_section->vma
8229 + input_section->output_offset
8230 + rel->r_offset + 8;
8231 insn = (insn & 0xf0000000) | 0x0a000000
8232 | ((glue_addr >> 2) & 0x00ffffff);
8233 }
8234 else
8235 {
8236 /* Preserve Rm (lowest four bits) and the condition code
8237 (highest four bits). Other bits encode MOV PC,Rm. */
8238 insn = (insn & 0xf000000f) | 0x01a0f000;
8239 }
319850b4 8240
845b51d6
PB		 8241 bfd_put_32 (input_bfd, insn, hit_data);
8242 }
319850b4
JB		 8243 return bfd_reloc_ok;
8244
b6895b4f
PB		 8245 case R_ARM_MOVW_ABS_NC:
8246 case R_ARM_MOVT_ABS:
8247 case R_ARM_MOVW_PREL_NC:
8248 case R_ARM_MOVT_PREL:
92f5d02b
MS		 8249 /* Until we properly support segment-base-relative addressing then
8250 we assume the segment base to be zero, as for the group relocations.
8251 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
8252 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
8253 case R_ARM_MOVW_BREL_NC:
8254 case R_ARM_MOVW_BREL:
8255 case R_ARM_MOVT_BREL:
b6895b4f
PB		 8256 {
8257 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8258
8259 if (globals->use_rel)
8260 {
8261 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 8262 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8263 }
92f5d02b 8264
b6895b4f 8265 value += signed_addend;
b6895b4f
PB		 8266
8267 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
8268 value -= (input_section->output_section->vma
8269 + input_section->output_offset + rel->r_offset);
8270
92f5d02b
MS		 8271 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
8272 return bfd_reloc_overflow;
8273
8274 if (sym_flags == STT_ARM_TFUNC)
8275 value |= 1;
8276
8277 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
8278 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 8279 value >>= 16;
8280
8281 insn &= 0xfff0f000;
8282 insn |= value & 0xfff;
8283 insn |= (value & 0xf000) << 4;
8284 bfd_put_32 (input_bfd, insn, hit_data);
8285 }
8286 return bfd_reloc_ok;
8287
8288 case R_ARM_THM_MOVW_ABS_NC:
8289 case R_ARM_THM_MOVT_ABS:
8290 case R_ARM_THM_MOVW_PREL_NC:
8291 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 8292 /* Until we properly support segment-base-relative addressing then
8293 we assume the segment base to be zero, as for the above relocations.
8294 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
8295 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
8296 as R_ARM_THM_MOVT_ABS. */
8297 case R_ARM_THM_MOVW_BREL_NC:
8298 case R_ARM_THM_MOVW_BREL:
8299 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 8300 {
8301 bfd_vma insn;
906e58ca 8302
b6895b4f
PB		 8303 insn = bfd_get_16 (input_bfd, hit_data) << 16;
8304 insn |= bfd_get_16 (input_bfd, hit_data + 2);
8305
8306 if (globals->use_rel)
8307 {
8308 addend = ((insn >> 4) & 0xf000)
8309 | ((insn >> 15) & 0x0800)
8310 | ((insn >> 4) & 0x0700)
8311 | (insn & 0x00ff);
39623e12 8312 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 8313 }
92f5d02b 8314
b6895b4f 8315 value += signed_addend;
b6895b4f
PB		 8316
8317 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
8318 value -= (input_section->output_section->vma
8319 + input_section->output_offset + rel->r_offset);
8320
92f5d02b
MS		 8321 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
8322 return bfd_reloc_overflow;
8323
8324 if (sym_flags == STT_ARM_TFUNC)
8325 value |= 1;
8326
8327 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
8328 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 8329 value >>= 16;
8330
8331 insn &= 0xfbf08f00;
8332 insn |= (value & 0xf000) << 4;
8333 insn |= (value & 0x0800) << 15;
8334 insn |= (value & 0x0700) << 4;
8335 insn |= (value & 0x00ff);
8336
8337 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8338 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8339 }
8340 return bfd_reloc_ok;
8341
4962c51a
MS		 8342 case R_ARM_ALU_PC_G0_NC:
8343 case R_ARM_ALU_PC_G1_NC:
8344 case R_ARM_ALU_PC_G0:
8345 case R_ARM_ALU_PC_G1:
8346 case R_ARM_ALU_PC_G2:
8347 case R_ARM_ALU_SB_G0_NC:
8348 case R_ARM_ALU_SB_G1_NC:
8349 case R_ARM_ALU_SB_G0:
8350 case R_ARM_ALU_SB_G1:
8351 case R_ARM_ALU_SB_G2:
8352 {
8353 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8354 bfd_vma pc = input_section->output_section->vma
8355 + input_section->output_offset + rel->r_offset;
8356 /* sb should be the origin of the *segment* containing the symbol.
8357 It is not clear how to obtain this OS-dependent value, so we
8358 make an arbitrary choice of zero. */
8359 bfd_vma sb = 0;
8360 bfd_vma residual;
8361 bfd_vma g_n;
8362 bfd_signed_vma signed_value;
8363 int group = 0;
8364
8365 /* Determine which group of bits to select. */
8366 switch (r_type)
8367 {
8368 case R_ARM_ALU_PC_G0_NC:
8369 case R_ARM_ALU_PC_G0:
8370 case R_ARM_ALU_SB_G0_NC:
8371 case R_ARM_ALU_SB_G0:
8372 group = 0;
8373 break;
8374
8375 case R_ARM_ALU_PC_G1_NC:
8376 case R_ARM_ALU_PC_G1:
8377 case R_ARM_ALU_SB_G1_NC:
8378 case R_ARM_ALU_SB_G1:
8379 group = 1;
8380 break;
8381
8382 case R_ARM_ALU_PC_G2:
8383 case R_ARM_ALU_SB_G2:
8384 group = 2;
8385 break;
8386
8387 default:
906e58ca 8388 abort ();
4962c51a
MS		 8389 }
8390
8391 /* If REL, extract the addend from the insn. If RELA, it will
8392 have already been fetched for us. */
8393 if (globals->use_rel)
8394 {
8395 int negative;
8396 bfd_vma constant = insn & 0xff;
8397 bfd_vma rotation = (insn & 0xf00) >> 8;
8398
8399 if (rotation == 0)
8400 signed_addend = constant;
8401 else
8402 {
8403 /* Compensate for the fact that in the instruction, the
8404 rotation is stored in multiples of 2 bits. */
8405 rotation *= 2;
8406
8407 /* Rotate "constant" right by "rotation" bits. */
8408 signed_addend = (constant >> rotation) |
8409 (constant << (8 * sizeof (bfd_vma) - rotation));
8410 }
8411
8412 /* Determine if the instruction is an ADD or a SUB.
8413 (For REL, this determines the sign of the addend.) */
8414 negative = identify_add_or_sub (insn);
8415 if (negative == 0)
8416 {
8417 (*_bfd_error_handler)
8418 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
8419 input_bfd, input_section,
8420 (long) rel->r_offset, howto->name);
906e58ca 8421 return bfd_reloc_overflow;
4962c51a
MS		 8422 }
8423
8424 signed_addend *= negative;
8425 }
8426
8427 /* Compute the value (X) to go in the place. */
8428 if (r_type == R_ARM_ALU_PC_G0_NC
8429 || r_type == R_ARM_ALU_PC_G1_NC
8430 || r_type == R_ARM_ALU_PC_G0
8431 || r_type == R_ARM_ALU_PC_G1
8432 || r_type == R_ARM_ALU_PC_G2)
8433 /* PC relative. */
8434 signed_value = value - pc + signed_addend;
8435 else
8436 /* Section base relative. */
8437 signed_value = value - sb + signed_addend;
8438
8439 /* If the target symbol is a Thumb function, then set the
8440 Thumb bit in the address. */
8441 if (sym_flags == STT_ARM_TFUNC)
8442 signed_value |= 1;
8443
8444 /* Calculate the value of the relevant G_n, in encoded
8445 constant-with-rotation format. */
8446 g_n = calculate_group_reloc_mask (abs (signed_value), group,
8447 &residual);
8448
8449 /* Check for overflow if required. */
8450 if ((r_type == R_ARM_ALU_PC_G0
8451 || r_type == R_ARM_ALU_PC_G1
8452 || r_type == R_ARM_ALU_PC_G2
8453 || r_type == R_ARM_ALU_SB_G0
8454 || r_type == R_ARM_ALU_SB_G1
8455 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
8456 {
8457 (*_bfd_error_handler)
8458 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8459 input_bfd, input_section,
8460 (long) rel->r_offset, abs (signed_value), howto->name);
8461 return bfd_reloc_overflow;
8462 }
8463
8464 /* Mask out the value and the ADD/SUB part of the opcode; take care
8465 not to destroy the S bit. */
8466 insn &= 0xff1ff000;
8467
8468 /* Set the opcode according to whether the value to go in the
8469 place is negative. */
8470 if (signed_value < 0)
8471 insn |= 1 << 22;
8472 else
8473 insn |= 1 << 23;
8474
8475 /* Encode the offset. */
8476 insn |= g_n;
8477
8478 bfd_put_32 (input_bfd, insn, hit_data);
8479 }
8480 return bfd_reloc_ok;
8481
8482 case R_ARM_LDR_PC_G0:
8483 case R_ARM_LDR_PC_G1:
8484 case R_ARM_LDR_PC_G2:
8485 case R_ARM_LDR_SB_G0:
8486 case R_ARM_LDR_SB_G1:
8487 case R_ARM_LDR_SB_G2:
8488 {
8489 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8490 bfd_vma pc = input_section->output_section->vma
8491 + input_section->output_offset + rel->r_offset;
8492 bfd_vma sb = 0; /* See note above. */
8493 bfd_vma residual;
8494 bfd_signed_vma signed_value;
8495 int group = 0;
8496
8497 /* Determine which groups of bits to calculate. */
8498 switch (r_type)
8499 {
8500 case R_ARM_LDR_PC_G0:
8501 case R_ARM_LDR_SB_G0:
8502 group = 0;
8503 break;
8504
8505 case R_ARM_LDR_PC_G1:
8506 case R_ARM_LDR_SB_G1:
8507 group = 1;
8508 break;
8509
8510 case R_ARM_LDR_PC_G2:
8511 case R_ARM_LDR_SB_G2:
8512 group = 2;
8513 break;
8514
8515 default:
906e58ca 8516 abort ();
4962c51a
MS		 8517 }
8518
8519 /* If REL, extract the addend from the insn. If RELA, it will
8520 have already been fetched for us. */
8521 if (globals->use_rel)
8522 {
8523 int negative = (insn & (1 << 23)) ? 1 : -1;
8524 signed_addend = negative * (insn & 0xfff);
8525 }
8526
8527 /* Compute the value (X) to go in the place. */
8528 if (r_type == R_ARM_LDR_PC_G0
8529 || r_type == R_ARM_LDR_PC_G1
8530 || r_type == R_ARM_LDR_PC_G2)
8531 /* PC relative. */
8532 signed_value = value - pc + signed_addend;
8533 else
8534 /* Section base relative. */
8535 signed_value = value - sb + signed_addend;
8536
8537 /* Calculate the value of the relevant G_{n-1} to obtain
8538 the residual at that stage. */
8539 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8540
8541 /* Check for overflow. */
8542 if (residual >= 0x1000)
8543 {
8544 (*_bfd_error_handler)
8545 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8546 input_bfd, input_section,
8547 (long) rel->r_offset, abs (signed_value), howto->name);
8548 return bfd_reloc_overflow;
8549 }
8550
8551 /* Mask out the value and U bit. */
8552 insn &= 0xff7ff000;
8553
8554 /* Set the U bit if the value to go in the place is non-negative. */
8555 if (signed_value >= 0)
8556 insn |= 1 << 23;
8557
8558 /* Encode the offset. */
8559 insn |= residual;
8560
8561 bfd_put_32 (input_bfd, insn, hit_data);
8562 }
8563 return bfd_reloc_ok;
8564
8565 case R_ARM_LDRS_PC_G0:
8566 case R_ARM_LDRS_PC_G1:
8567 case R_ARM_LDRS_PC_G2:
8568 case R_ARM_LDRS_SB_G0:
8569 case R_ARM_LDRS_SB_G1:
8570 case R_ARM_LDRS_SB_G2:
8571 {
8572 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8573 bfd_vma pc = input_section->output_section->vma
8574 + input_section->output_offset + rel->r_offset;
8575 bfd_vma sb = 0; /* See note above. */
8576 bfd_vma residual;
8577 bfd_signed_vma signed_value;
8578 int group = 0;
8579
8580 /* Determine which groups of bits to calculate. */
8581 switch (r_type)
8582 {
8583 case R_ARM_LDRS_PC_G0:
8584 case R_ARM_LDRS_SB_G0:
8585 group = 0;
8586 break;
8587
8588 case R_ARM_LDRS_PC_G1:
8589 case R_ARM_LDRS_SB_G1:
8590 group = 1;
8591 break;
8592
8593 case R_ARM_LDRS_PC_G2:
8594 case R_ARM_LDRS_SB_G2:
8595 group = 2;
8596 break;
8597
8598 default:
906e58ca 8599 abort ();
4962c51a
MS		 8600 }
8601
8602 /* If REL, extract the addend from the insn. If RELA, it will
8603 have already been fetched for us. */
8604 if (globals->use_rel)
8605 {
8606 int negative = (insn & (1 << 23)) ? 1 : -1;
8607 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
8608 }
8609
8610 /* Compute the value (X) to go in the place. */
8611 if (r_type == R_ARM_LDRS_PC_G0
8612 || r_type == R_ARM_LDRS_PC_G1
8613 || r_type == R_ARM_LDRS_PC_G2)
8614 /* PC relative. */
8615 signed_value = value - pc + signed_addend;
8616 else
8617 /* Section base relative. */
8618 signed_value = value - sb + signed_addend;
8619
8620 /* Calculate the value of the relevant G_{n-1} to obtain
8621 the residual at that stage. */
8622 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8623
8624 /* Check for overflow. */
8625 if (residual >= 0x100)
8626 {
8627 (*_bfd_error_handler)
8628 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8629 input_bfd, input_section,
8630 (long) rel->r_offset, abs (signed_value), howto->name);
8631 return bfd_reloc_overflow;
8632 }
8633
8634 /* Mask out the value and U bit. */
8635 insn &= 0xff7ff0f0;
8636
8637 /* Set the U bit if the value to go in the place is non-negative. */
8638 if (signed_value >= 0)
8639 insn |= 1 << 23;
8640
8641 /* Encode the offset. */
8642 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
8643
8644 bfd_put_32 (input_bfd, insn, hit_data);
8645 }
8646 return bfd_reloc_ok;
8647
8648 case R_ARM_LDC_PC_G0:
8649 case R_ARM_LDC_PC_G1:
8650 case R_ARM_LDC_PC_G2:
8651 case R_ARM_LDC_SB_G0:
8652 case R_ARM_LDC_SB_G1:
8653 case R_ARM_LDC_SB_G2:
8654 {
8655 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
8656 bfd_vma pc = input_section->output_section->vma
8657 + input_section->output_offset + rel->r_offset;
8658 bfd_vma sb = 0; /* See note above. */
8659 bfd_vma residual;
8660 bfd_signed_vma signed_value;
8661 int group = 0;
8662
8663 /* Determine which groups of bits to calculate. */
8664 switch (r_type)
8665 {
8666 case R_ARM_LDC_PC_G0:
8667 case R_ARM_LDC_SB_G0:
8668 group = 0;
8669 break;
8670
8671 case R_ARM_LDC_PC_G1:
8672 case R_ARM_LDC_SB_G1:
8673 group = 1;
8674 break;
8675
8676 case R_ARM_LDC_PC_G2:
8677 case R_ARM_LDC_SB_G2:
8678 group = 2;
8679 break;
8680
8681 default:
906e58ca 8682 abort ();
4962c51a
MS		 8683 }
8684
8685 /* If REL, extract the addend from the insn. If RELA, it will
8686 have already been fetched for us. */
8687 if (globals->use_rel)
8688 {
8689 int negative = (insn & (1 << 23)) ? 1 : -1;
8690 signed_addend = negative * ((insn & 0xff) << 2);
8691 }
8692
8693 /* Compute the value (X) to go in the place. */
8694 if (r_type == R_ARM_LDC_PC_G0
8695 || r_type == R_ARM_LDC_PC_G1
8696 || r_type == R_ARM_LDC_PC_G2)
8697 /* PC relative. */
8698 signed_value = value - pc + signed_addend;
8699 else
8700 /* Section base relative. */
8701 signed_value = value - sb + signed_addend;
8702
8703 /* Calculate the value of the relevant G_{n-1} to obtain
8704 the residual at that stage. */
8705 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
8706
8707 /* Check for overflow. (The absolute value to go in the place must be
8708 divisible by four and, after having been divided by four, must
8709 fit in eight bits.) */
8710 if ((residual & 0x3) != 0 || residual >= 0x400)
8711 {
8712 (*_bfd_error_handler)
8713 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
8714 input_bfd, input_section,
8715 (long) rel->r_offset, abs (signed_value), howto->name);
8716 return bfd_reloc_overflow;
8717 }
8718
8719 /* Mask out the value and U bit. */
8720 insn &= 0xff7fff00;
8721
8722 /* Set the U bit if the value to go in the place is non-negative. */
8723 if (signed_value >= 0)
8724 insn |= 1 << 23;
8725
8726 /* Encode the offset. */
8727 insn |= residual >> 2;
8728
8729 bfd_put_32 (input_bfd, insn, hit_data);
8730 }
8731 return bfd_reloc_ok;
8732
252b5132
RH		 8733 default:
8734 return bfd_reloc_notsupported;
8735 }
8736}
8737
98c1d4aa
NC		 8738/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
8739static void
57e8b36a
NC		 8740arm_add_to_rel (bfd * abfd,
8741 bfd_byte * address,
8742 reloc_howto_type * howto,
8743 bfd_signed_vma increment)
98c1d4aa 8744{
98c1d4aa
NC		 8745 bfd_signed_vma addend;
8746
bd97cb95
DJ		 8747 if (howto->type == R_ARM_THM_CALL
8748 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 8749 {
9a5aca8c
AM		 8750 int upper_insn, lower_insn;
8751 int upper, lower;
98c1d4aa 8752
9a5aca8c
AM		 8753 upper_insn = bfd_get_16 (abfd, address);
8754 lower_insn = bfd_get_16 (abfd, address + 2);
8755 upper = upper_insn & 0x7ff;
8756 lower = lower_insn & 0x7ff;
8757
8758 addend = (upper << 12) | (lower << 1);
ddda4409 8759 addend += increment;
9a5aca8c 8760 addend >>= 1;
98c1d4aa 8761
9a5aca8c
AM		 8762 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
8763 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
8764
dc810e39
AM		 8765 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
8766 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 8767 }
8768 else
8769 {
8770 bfd_vma contents;
8771
8772 contents = bfd_get_32 (abfd, address);
8773
8774 /* Get the (signed) value from the instruction. */
8775 addend = contents & howto->src_mask;
8776 if (addend & ((howto->src_mask + 1) >> 1))
8777 {
8778 bfd_signed_vma mask;
8779
8780 mask = -1;
8781 mask &= ~ howto->src_mask;
8782 addend |= mask;
8783 }
8784
8785 /* Add in the increment, (which is a byte value). */
8786 switch (howto->type)
8787 {
8788 default:
8789 addend += increment;
8790 break;
8791
8792 case R_ARM_PC24:
c6596c5e 8793 case R_ARM_PLT32:
5b5bb741
PB		 8794 case R_ARM_CALL:
8795 case R_ARM_JUMP24:
9a5aca8c 8796 addend <<= howto->size;
dc810e39 8797 addend += increment;
9a5aca8c
AM		 8798
8799 /* Should we check for overflow here ? */
8800
8801 /* Drop any undesired bits. */
8802 addend >>= howto->rightshift;
8803 break;
8804 }
8805
8806 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
8807
8808 bfd_put_32 (abfd, contents, address);
ddda4409 8809 }
98c1d4aa 8810}
252b5132 8811
ba93b8ac
DJ		 8812#define IS_ARM_TLS_RELOC(R_TYPE) \
8813 ((R_TYPE) == R_ARM_TLS_GD32 \
8814 || (R_TYPE) == R_ARM_TLS_LDO32 \
8815 || (R_TYPE) == R_ARM_TLS_LDM32 \
8816 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
8817 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
8818 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
8819 || (R_TYPE) == R_ARM_TLS_LE32 \
8820 || (R_TYPE) == R_ARM_TLS_IE32)
8821
252b5132 8822/* Relocate an ARM ELF section. */
906e58ca 8823
b34976b6 8824static bfd_boolean
57e8b36a
NC		 8825elf32_arm_relocate_section (bfd * output_bfd,
8826 struct bfd_link_info * info,
8827 bfd * input_bfd,
8828 asection * input_section,
8829 bfd_byte * contents,
8830 Elf_Internal_Rela * relocs,
8831 Elf_Internal_Sym * local_syms,
8832 asection ** local_sections)
252b5132 8833{
b34976b6
AM		 8834 Elf_Internal_Shdr *symtab_hdr;
8835 struct elf_link_hash_entry **sym_hashes;
8836 Elf_Internal_Rela *rel;
8837 Elf_Internal_Rela *relend;
8838 const char *name;
b32d3aa2 8839 struct elf32_arm_link_hash_table * globals;
252b5132 8840
4e7fd91e 8841 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8842 if (globals == NULL)
8843 return FALSE;
b491616a 8844
0ffa91dd 8845 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 8846 sym_hashes = elf_sym_hashes (input_bfd);
8847
8848 rel = relocs;
8849 relend = relocs + input_section->reloc_count;
8850 for (; rel < relend; rel++)
8851 {
ba96a88f
NC		 8852 int r_type;
8853 reloc_howto_type * howto;
8854 unsigned long r_symndx;
8855 Elf_Internal_Sym * sym;
8856 asection * sec;
252b5132 8857 struct elf_link_hash_entry * h;
ba96a88f
NC		 8858 bfd_vma relocation;
8859 bfd_reloc_status_type r;
8860 arelent bfd_reloc;
ba93b8ac 8861 char sym_type;
0945cdfd 8862 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 8863 char *error_message = NULL;
f21f3fe0 8864
252b5132 8865 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 8866 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 8867 r_type = arm_real_reloc_type (globals, r_type);
252b5132 8868
ba96a88f
NC		 8869 if ( r_type == R_ARM_GNU_VTENTRY
8870 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 8871 continue;
8872
b32d3aa2 8873 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 8874 howto = bfd_reloc.howto;
252b5132 8875
252b5132
RH		 8876 h = NULL;
8877 sym = NULL;
8878 sec = NULL;
9b485d32 8879
252b5132
RH		 8880 if (r_symndx < symtab_hdr->sh_info)
8881 {
8882 sym = local_syms + r_symndx;
ba93b8ac 8883 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 8884 sec = local_sections[r_symndx];
ffcb4889
NS		 8885
8886 /* An object file might have a reference to a local
8887 undefined symbol. This is a daft object file, but we
8888 should at least do something about it. V4BX & NONE
8889 relocations do not use the symbol and are explicitly
8890 allowed to use the undefined symbol, so allow those. */
8891 if (r_type != R_ARM_V4BX
8892 && r_type != R_ARM_NONE
8893 && bfd_is_und_section (sec)
8894 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
8895 {
8896 if (!info->callbacks->undefined_symbol
8897 (info, bfd_elf_string_from_elf_section
8898 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8899 input_bfd, input_section,
8900 rel->r_offset, TRUE))
8901 return FALSE;
8902 }
8903
4e7fd91e 8904 if (globals->use_rel)
f8df10f4 8905 {
4e7fd91e
PB		 8906 relocation = (sec->output_section->vma
8907 + sec->output_offset
8908 + sym->st_value);
ab96bf03
AM		 8909 if (!info->relocatable
8910 && (sec->flags & SEC_MERGE)
8911 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 8912 {
4e7fd91e
PB		 8913 asection *msec;
8914 bfd_vma addend, value;
8915
39623e12 8916 switch (r_type)
4e7fd91e 8917 {
39623e12
PB		 8918 case R_ARM_MOVW_ABS_NC:
8919 case R_ARM_MOVT_ABS:
8920 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8921 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
8922 addend = (addend ^ 0x8000) - 0x8000;
8923 break;
f8df10f4 8924
39623e12
PB		 8925 case R_ARM_THM_MOVW_ABS_NC:
8926 case R_ARM_THM_MOVT_ABS:
8927 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
8928 << 16;
8929 value |= bfd_get_16 (input_bfd,
8930 contents + rel->r_offset + 2);
8931 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
8932 | ((value & 0x04000000) >> 15);
8933 addend = (addend ^ 0x8000) - 0x8000;
8934 break;
f8df10f4 8935
39623e12
PB		 8936 default:
8937 if (howto->rightshift
8938 || (howto->src_mask & (howto->src_mask + 1)))
8939 {
8940 (*_bfd_error_handler)
8941 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
8942 input_bfd, input_section,
8943 (long) rel->r_offset, howto->name);
8944 return FALSE;
8945 }
8946
8947 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
8948
8949 /* Get the (signed) value from the instruction. */
8950 addend = value & howto->src_mask;
8951 if (addend & ((howto->src_mask + 1) >> 1))
8952 {
8953 bfd_signed_vma mask;
8954
8955 mask = -1;
8956 mask &= ~ howto->src_mask;
8957 addend |= mask;
8958 }
8959 break;
4e7fd91e 8960 }
39623e12 8961
4e7fd91e
PB		 8962 msec = sec;
8963 addend =
8964 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
8965 - relocation;
8966 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 8967
8968 /* Cases here must match those in the preceeding
8969 switch statement. */
8970 switch (r_type)
8971 {
8972 case R_ARM_MOVW_ABS_NC:
8973 case R_ARM_MOVT_ABS:
8974 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
8975 | (addend & 0xfff);
8976 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8977 break;
8978
8979 case R_ARM_THM_MOVW_ABS_NC:
8980 case R_ARM_THM_MOVT_ABS:
8981 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
8982 | (addend & 0xff) | ((addend & 0x0800) << 15);
8983 bfd_put_16 (input_bfd, value >> 16,
8984 contents + rel->r_offset);
8985 bfd_put_16 (input_bfd, value,
8986 contents + rel->r_offset + 2);
8987 break;
8988
8989 default:
8990 value = (value & ~ howto->dst_mask)
8991 | (addend & howto->dst_mask);
8992 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
8993 break;
8994 }
f8df10f4 8995 }
f8df10f4 8996 }
4e7fd91e
PB		 8997 else
8998 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 8999 }
9000 else
9001 {
560e09e9 9002 bfd_boolean warned;
560e09e9 9003
b2a8e766
AM		 9004 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
9005 r_symndx, symtab_hdr, sym_hashes,
9006 h, sec, relocation,
9007 unresolved_reloc, warned);
ba93b8ac
DJ		 9008
9009 sym_type = h->type;
252b5132
RH		 9010 }
9011
ab96bf03
AM		 9012 if (sec != NULL && elf_discarded_section (sec))
9013 {
9014 /* For relocs against symbols from removed linkonce sections,
9015 or sections discarded by a linker script, we just want the
9016 section contents zeroed. Avoid any special processing. */
9017 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
9018 rel->r_info = 0;
9019 rel->r_addend = 0;
9020 continue;
9021 }
9022
9023 if (info->relocatable)
9024 {
9025 /* This is a relocatable link. We don't have to change
9026 anything, unless the reloc is against a section symbol,
9027 in which case we have to adjust according to where the
9028 section symbol winds up in the output section. */
9029 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
9030 {
9031 if (globals->use_rel)
9032 arm_add_to_rel (input_bfd, contents + rel->r_offset,
9033 howto, (bfd_signed_vma) sec->output_offset);
9034 else
9035 rel->r_addend += sec->output_offset;
9036 }
9037 continue;
9038 }
9039
252b5132
RH		 9040 if (h != NULL)
9041 name = h->root.root.string;
9042 else
9043 {
9044 name = (bfd_elf_string_from_elf_section
9045 (input_bfd, symtab_hdr->sh_link, sym->st_name));
9046 if (name == NULL || *name == '\0')
9047 name = bfd_section_name (input_bfd, sec);
9048 }
f21f3fe0 9049
ba93b8ac
DJ		 9050 if (r_symndx != 0
9051 && r_type != R_ARM_NONE
9052 && (h == NULL
9053 || h->root.type == bfd_link_hash_defined
9054 || h->root.type == bfd_link_hash_defweak)
9055 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
9056 {
9057 (*_bfd_error_handler)
9058 ((sym_type == STT_TLS
9059 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
9060 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
9061 input_bfd,
9062 input_section,
9063 (long) rel->r_offset,
9064 howto->name,
9065 name);
9066 }
9067
252b5132
RH		 9068 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
9069 input_section, contents, rel,
9070 relocation, info, sec, name,
9071 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 9072 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 9073 &unresolved_reloc, &error_message);
0945cdfd
DJ		 9074
9075 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
9076 because such sections are not SEC_ALLOC and thus ld.so will
9077 not process them. */
9078 if (unresolved_reloc
9079 && !((input_section->flags & SEC_DEBUGGING) != 0
9080 && h->def_dynamic))
9081 {
9082 (*_bfd_error_handler)
843fe662
L		 9083 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
9084 input_bfd,
9085 input_section,
9086 (long) rel->r_offset,
9087 howto->name,
9088 h->root.root.string);
0945cdfd
DJ		 9089 return FALSE;
9090 }
252b5132
RH		 9091
9092 if (r != bfd_reloc_ok)
9093 {
252b5132
RH		 9094 switch (r)
9095 {
9096 case bfd_reloc_overflow:
cf919dfd
PB		 9097 /* If the overflowing reloc was to an undefined symbol,
9098 we have already printed one error message and there
9099 is no point complaining again. */
9100 if ((! h ||
9101 h->root.type != bfd_link_hash_undefined)
9102 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 9103 (info, (h ? &h->root : NULL), name, howto->name,
9104 (bfd_vma) 0, input_bfd, input_section,
9105 rel->r_offset))))
b34976b6 9106 return FALSE;
252b5132
RH		 9107 break;
9108
9109 case bfd_reloc_undefined:
9110 if (!((*info->callbacks->undefined_symbol)
9111 (info, name, input_bfd, input_section,
b34976b6
AM		 9112 rel->r_offset, TRUE)))
9113 return FALSE;
252b5132
RH		 9114 break;
9115
9116 case bfd_reloc_outofrange:
f2a9dd69 9117 error_message = _("out of range");
252b5132
RH		 9118 goto common_error;
9119
9120 case bfd_reloc_notsupported:
f2a9dd69 9121 error_message = _("unsupported relocation");
252b5132
RH		 9122 goto common_error;
9123
9124 case bfd_reloc_dangerous:
f2a9dd69 9125 /* error_message should already be set. */
252b5132
RH		 9126 goto common_error;
9127
9128 default:
f2a9dd69 9129 error_message = _("unknown error");
8029a119 9130 /* Fall through. */
252b5132
RH		 9131
9132 common_error:
f2a9dd69
DJ		 9133 BFD_ASSERT (error_message != NULL);
9134 if (!((*info->callbacks->reloc_dangerous)
9135 (info, error_message, input_bfd, input_section,
252b5132 9136 rel->r_offset)))
b34976b6 9137 return FALSE;
252b5132
RH		 9138 break;
9139 }
9140 }
9141 }
9142
b34976b6 9143 return TRUE;
252b5132
RH		 9144}
9145
91d6fa6a 9146/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 9147 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 9148 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 9149 maintaining that condition). */
9150
9151static void
9152add_unwind_table_edit (arm_unwind_table_edit **head,
9153 arm_unwind_table_edit **tail,
9154 arm_unwind_edit_type type,
9155 asection *linked_section,
91d6fa6a 9156 unsigned int tindex)
2468f9c9 9157{
21d799b5
NC		 9158 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
9159 xmalloc (sizeof (arm_unwind_table_edit));
2468f9c9
PB		 9160
9161 new_edit->type = type;
9162 new_edit->linked_section = linked_section;
91d6fa6a 9163 new_edit->index = tindex;
2468f9c9 9164
91d6fa6a 9165 if (tindex > 0)
2468f9c9
PB		 9166 {
9167 new_edit->next = NULL;
9168
9169 if (*tail)
9170 (*tail)->next = new_edit;
9171
9172 (*tail) = new_edit;
9173
9174 if (!*head)
9175 (*head) = new_edit;
9176 }
9177 else
9178 {
9179 new_edit->next = *head;
9180
9181 if (!*tail)
9182 *tail = new_edit;
9183
9184 *head = new_edit;
9185 }
9186}
9187
9188static _arm_elf_section_data *get_arm_elf_section_data (asection *);
9189
9190/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
9191static void
9192adjust_exidx_size(asection *exidx_sec, int adjust)
9193{
9194 asection *out_sec;
9195
9196 if (!exidx_sec->rawsize)
9197 exidx_sec->rawsize = exidx_sec->size;
9198
9199 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
9200 out_sec = exidx_sec->output_section;
9201 /* Adjust size of output section. */
9202 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
9203}
9204
9205/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
9206static void
9207insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
9208{
9209 struct _arm_elf_section_data *exidx_arm_data;
9210
9211 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9212 add_unwind_table_edit (
9213 &exidx_arm_data->u.exidx.unwind_edit_list,
9214 &exidx_arm_data->u.exidx.unwind_edit_tail,
9215 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
9216
9217 adjust_exidx_size(exidx_sec, 8);
9218}
9219
9220/* Scan .ARM.exidx tables, and create a list describing edits which should be
9221 made to those tables, such that:
9222
9223 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
9224 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
9225 codes which have been inlined into the index).
9226
85fdf906
AH		 9227 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
9228
2468f9c9
PB		 9229 The edits are applied when the tables are written
9230 (in elf32_arm_write_section).
9231*/
9232
9233bfd_boolean
9234elf32_arm_fix_exidx_coverage (asection **text_section_order,
9235 unsigned int num_text_sections,
85fdf906
AH		 9236 struct bfd_link_info *info,
9237 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 9238{
9239 bfd *inp;
9240 unsigned int last_second_word = 0, i;
9241 asection *last_exidx_sec = NULL;
9242 asection *last_text_sec = NULL;
9243 int last_unwind_type = -1;
9244
9245 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
9246 text sections. */
9247 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
9248 {
9249 asection *sec;
9250
9251 for (sec = inp->sections; sec != NULL; sec = sec->next)
9252 {
9253 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
9254 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
9255
dec9d5df 9256 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9
PB		 9257 continue;
9258
9259 if (elf_sec->linked_to)
9260 {
9261 Elf_Internal_Shdr *linked_hdr
9262 = &elf_section_data (elf_sec->linked_to)->this_hdr;
9263 struct _arm_elf_section_data *linked_sec_arm_data
9264 = get_arm_elf_section_data (linked_hdr->bfd_section);
9265
9266 if (linked_sec_arm_data == NULL)
9267 continue;
9268
9269 /* Link this .ARM.exidx section back from the text section it
9270 describes. */
9271 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
9272 }
9273 }
9274 }
9275
9276 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
9277 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 9278 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 9279
9280 for (i = 0; i < num_text_sections; i++)
9281 {
9282 asection *sec = text_section_order[i];
9283 asection *exidx_sec;
9284 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
9285 struct _arm_elf_section_data *exidx_arm_data;
9286 bfd_byte *contents = NULL;
9287 int deleted_exidx_bytes = 0;
9288 bfd_vma j;
9289 arm_unwind_table_edit *unwind_edit_head = NULL;
9290 arm_unwind_table_edit *unwind_edit_tail = NULL;
9291 Elf_Internal_Shdr *hdr;
9292 bfd *ibfd;
9293
9294 if (arm_data == NULL)
9295 continue;
9296
9297 exidx_sec = arm_data->u.text.arm_exidx_sec;
9298 if (exidx_sec == NULL)
9299 {
9300 /* Section has no unwind data. */
9301 if (last_unwind_type == 0 || !last_exidx_sec)
9302 continue;
9303
9304 /* Ignore zero sized sections. */
9305 if (sec->size == 0)
9306 continue;
9307
9308 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9309 last_unwind_type = 0;
9310 continue;
9311 }
9312
22a8f80e
PB		 9313 /* Skip /DISCARD/ sections. */
9314 if (bfd_is_abs_section (exidx_sec->output_section))
9315 continue;
9316
2468f9c9
PB		 9317 hdr = &elf_section_data (exidx_sec)->this_hdr;
9318 if (hdr->sh_type != SHT_ARM_EXIDX)
9319 continue;
9320
9321 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
9322 if (exidx_arm_data == NULL)
9323 continue;
9324
9325 ibfd = exidx_sec->owner;
9326
9327 if (hdr->contents != NULL)
9328 contents = hdr->contents;
9329 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
9330 /* An error? */
9331 continue;
9332
9333 for (j = 0; j < hdr->sh_size; j += 8)
9334 {
9335 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
9336 int unwind_type;
9337 int elide = 0;
9338
9339 /* An EXIDX_CANTUNWIND entry. */
9340 if (second_word == 1)
9341 {
9342 if (last_unwind_type == 0)
9343 elide = 1;
9344 unwind_type = 0;
9345 }
9346 /* Inlined unwinding data. Merge if equal to previous. */
9347 else if ((second_word & 0x80000000) != 0)
9348 {
85fdf906
AH		 9349 if (merge_exidx_entries
9350 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 9351 elide = 1;
9352 unwind_type = 1;
9353 last_second_word = second_word;
9354 }
9355 /* Normal table entry. In theory we could merge these too,
9356 but duplicate entries are likely to be much less common. */
9357 else
9358 unwind_type = 2;
9359
9360 if (elide)
9361 {
9362 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
9363 DELETE_EXIDX_ENTRY, NULL, j / 8);
9364
9365 deleted_exidx_bytes += 8;
9366 }
9367
9368 last_unwind_type = unwind_type;
9369 }
9370
9371 /* Free contents if we allocated it ourselves. */
9372 if (contents != hdr->contents)
9373 free (contents);
9374
9375 /* Record edits to be applied later (in elf32_arm_write_section). */
9376 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
9377 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
9378
9379 if (deleted_exidx_bytes > 0)
9380 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
9381
9382 last_exidx_sec = exidx_sec;
9383 last_text_sec = sec;
9384 }
9385
9386 /* Add terminating CANTUNWIND entry. */
9387 if (last_exidx_sec && last_unwind_type != 0)
9388 insert_cantunwind_after(last_text_sec, last_exidx_sec);
9389
9390 return TRUE;
9391}
9392
3e6b1042
DJ		 9393static bfd_boolean
9394elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
9395 bfd *ibfd, const char *name)
9396{
9397 asection *sec, *osec;
9398
9399 sec = bfd_get_section_by_name (ibfd, name);
9400 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
9401 return TRUE;
9402
9403 osec = sec->output_section;
9404 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
9405 return TRUE;
9406
9407 if (! bfd_set_section_contents (obfd, osec, sec->contents,
9408 sec->output_offset, sec->size))
9409 return FALSE;
9410
9411 return TRUE;
9412}
9413
9414static bfd_boolean
9415elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
9416{
9417 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 9418 asection *sec, *osec;
3e6b1042 9419
4dfe6ac6
NC		 9420 if (globals == NULL)
9421 return FALSE;
9422
3e6b1042
DJ		 9423 /* Invoke the regular ELF backend linker to do all the work. */
9424 if (!bfd_elf_final_link (abfd, info))
9425 return FALSE;
9426
fe33d2fa
CL		 9427 /* Process stub sections (eg BE8 encoding, ...). */
9428 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
9429 int i;
9430 for(i=0; i<htab->top_id; i++) {
9431 sec = htab->stub_group[i].stub_sec;
9432 if (sec) {
9433 osec = sec->output_section;
9434 elf32_arm_write_section (abfd, info, sec, sec->contents);
9435 if (! bfd_set_section_contents (abfd, osec, sec->contents,
9436 sec->output_offset, sec->size))
9437 return FALSE;
9438 }
9439 }
9440
3e6b1042
DJ		 9441 /* Write out any glue sections now that we have created all the
9442 stubs. */
9443 if (globals->bfd_of_glue_owner != NULL)
9444 {
9445 if (! elf32_arm_output_glue_section (info, abfd,
9446 globals->bfd_of_glue_owner,
9447 ARM2THUMB_GLUE_SECTION_NAME))
9448 return FALSE;
9449
9450 if (! elf32_arm_output_glue_section (info, abfd,
9451 globals->bfd_of_glue_owner,
9452 THUMB2ARM_GLUE_SECTION_NAME))
9453 return FALSE;
9454
9455 if (! elf32_arm_output_glue_section (info, abfd,
9456 globals->bfd_of_glue_owner,
9457 VFP11_ERRATUM_VENEER_SECTION_NAME))
9458 return FALSE;
9459
9460 if (! elf32_arm_output_glue_section (info, abfd,
9461 globals->bfd_of_glue_owner,
9462 ARM_BX_GLUE_SECTION_NAME))
9463 return FALSE;
9464 }
9465
9466 return TRUE;
9467}
9468
c178919b
NC		 9469/* Set the right machine number. */
9470
9471static bfd_boolean
57e8b36a 9472elf32_arm_object_p (bfd *abfd)
c178919b 9473{
5a6c6817 9474 unsigned int mach;
57e8b36a 9475
5a6c6817 9476 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 9477
5a6c6817
NC		 9478 if (mach != bfd_mach_arm_unknown)
9479 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
9480
9481 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
9482 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 9483
e16bb312 9484 else
5a6c6817 9485 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 9486
9487 return TRUE;
9488}
9489
fc830a83 9490/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 9491
b34976b6 9492static bfd_boolean
57e8b36a 9493elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 9494{
9495 if (elf_flags_init (abfd)
9496 && elf_elfheader (abfd)->e_flags != flags)
9497 {
fc830a83
NC		 9498 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
9499 {
fd2ec330 9500 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 9501 (*_bfd_error_handler)
9502 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
9503 abfd);
fc830a83 9504 else
d003868e
AM		 9505 _bfd_error_handler
9506 (_("Warning: Clearing the interworking flag of %B due to outside request"),
9507 abfd);
fc830a83 9508 }
252b5132
RH		 9509 }
9510 else
9511 {
9512 elf_elfheader (abfd)->e_flags = flags;
b34976b6 9513 elf_flags_init (abfd) = TRUE;
252b5132
RH		 9514 }
9515
b34976b6 9516 return TRUE;
252b5132
RH		 9517}
9518
fc830a83 9519/* Copy backend specific data from one object module to another. */
9b485d32 9520
b34976b6 9521static bfd_boolean
57e8b36a 9522elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 9523{
9524 flagword in_flags;
9525 flagword out_flags;
9526
0ffa91dd 9527 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 9528 return TRUE;
252b5132 9529
fc830a83 9530 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 9531 out_flags = elf_elfheader (obfd)->e_flags;
9532
fc830a83
NC		 9533 if (elf_flags_init (obfd)
9534 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
9535 && in_flags != out_flags)
252b5132 9536 {
252b5132 9537 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 9538 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 9539 return FALSE;
252b5132
RH		 9540
9541 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 9542 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 9543 return FALSE;
252b5132
RH		 9544
9545 /* If the src and dest have different interworking flags
9546 then turn off the interworking bit. */
fd2ec330 9547 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 9548 {
fd2ec330 9549 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 9550 _bfd_error_handler
9551 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
9552 obfd, ibfd);
252b5132 9553
fd2ec330 9554 in_flags &= ~EF_ARM_INTERWORK;
252b5132 9555 }
1006ba19
PB		 9556
9557 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 9558 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
9559 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 9560 }
9561
9562 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 9563 elf_flags_init (obfd) = TRUE;
252b5132 9564
94a3258f
PB		 9565 /* Also copy the EI_OSABI field. */
9566 elf_elfheader (obfd)->e_ident[EI_OSABI] =
9567 elf_elfheader (ibfd)->e_ident[EI_OSABI];
9568
104d59d1
JM		 9569 /* Copy object attributes. */
9570 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 9571
9572 return TRUE;
9573}
9574
9575/* Values for Tag_ABI_PCS_R9_use. */
9576enum
9577{
9578 AEABI_R9_V6,
9579 AEABI_R9_SB,
9580 AEABI_R9_TLS,
9581 AEABI_R9_unused
9582};
9583
9584/* Values for Tag_ABI_PCS_RW_data. */
9585enum
9586{
9587 AEABI_PCS_RW_data_absolute,
9588 AEABI_PCS_RW_data_PCrel,
9589 AEABI_PCS_RW_data_SBrel,
9590 AEABI_PCS_RW_data_unused
9591};
9592
9593/* Values for Tag_ABI_enum_size. */
9594enum
9595{
9596 AEABI_enum_unused,
9597 AEABI_enum_short,
9598 AEABI_enum_wide,
9599 AEABI_enum_forced_wide
9600};
9601
104d59d1
JM		 9602/* Determine whether an object attribute tag takes an integer, a
9603 string or both. */
906e58ca 9604
104d59d1
JM		 9605static int
9606elf32_arm_obj_attrs_arg_type (int tag)
9607{
9608 if (tag == Tag_compatibility)
3483fe2e 9609 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 9610 else if (tag == Tag_nodefaults)
3483fe2e
AS		 9611 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
9612 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
9613 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 9614 else if (tag < 32)
3483fe2e 9615 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 9616 else
3483fe2e 9617 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 9618}
9619
5aa6ff7c
AS		 9620/* The ABI defines that Tag_conformance should be emitted first, and that
9621 Tag_nodefaults should be second (if either is defined). This sets those
9622 two positions, and bumps up the position of all the remaining tags to
9623 compensate. */
9624static int
9625elf32_arm_obj_attrs_order (int num)
9626{
9627 if (num == 4)
9628 return Tag_conformance;
9629 if (num == 5)
9630 return Tag_nodefaults;
9631 if ((num - 2) < Tag_nodefaults)
9632 return num - 2;
9633 if ((num - 1) < Tag_conformance)
9634 return num - 1;
9635 return num;
9636}
9637
91e22acd
AS		 9638/* Read the architecture from the Tag_also_compatible_with attribute, if any.
9639 Returns -1 if no architecture could be read. */
9640
9641static int
9642get_secondary_compatible_arch (bfd *abfd)
9643{
9644 obj_attribute *attr =
9645 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
9646
9647 /* Note: the tag and its argument below are uleb128 values, though
9648 currently-defined values fit in one byte for each. */
9649 if (attr->s
9650 && attr->s[0] == Tag_CPU_arch
9651 && (attr->s[1] & 128) != 128
9652 && attr->s[2] == 0)
9653 return attr->s[1];
9654
9655 /* This tag is "safely ignorable", so don't complain if it looks funny. */
9656 return -1;
9657}
9658
9659/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9660 The tag is removed if ARCH is -1. */
9661
8e79c3df 9662static void
91e22acd 9663set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 9664{
91e22acd
AS		 9665 obj_attribute *attr =
9666 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 9667
91e22acd
AS		 9668 if (arch == -1)
9669 {
9670 attr->s = NULL;
9671 return;
8e79c3df 9672 }
91e22acd
AS		 9673
9674 /* Note: the tag and its argument below are uleb128 values, though
9675 currently-defined values fit in one byte for each. */
9676 if (!attr->s)
21d799b5 9677 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 9678 attr->s[0] = Tag_CPU_arch;
9679 attr->s[1] = arch;
9680 attr->s[2] = '\0';
8e79c3df
CM		 9681}
9682
91e22acd
AS		 9683/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
9684 into account. */
9685
9686static int
9687tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
9688 int newtag, int secondary_compat)
8e79c3df 9689{
91e22acd
AS		 9690#define T(X) TAG_CPU_ARCH_##X
9691 int tagl, tagh, result;
9692 const int v6t2[] =
9693 {
9694 T(V6T2), /* PRE_V4. */
9695 T(V6T2), /* V4. */
9696 T(V6T2), /* V4T. */
9697 T(V6T2), /* V5T. */
9698 T(V6T2), /* V5TE. */
9699 T(V6T2), /* V5TEJ. */
9700 T(V6T2), /* V6. */
9701 T(V7), /* V6KZ. */
9702 T(V6T2) /* V6T2. */
9703 };
9704 const int v6k[] =
9705 {
9706 T(V6K), /* PRE_V4. */
9707 T(V6K), /* V4. */
9708 T(V6K), /* V4T. */
9709 T(V6K), /* V5T. */
9710 T(V6K), /* V5TE. */
9711 T(V6K), /* V5TEJ. */
9712 T(V6K), /* V6. */
9713 T(V6KZ), /* V6KZ. */
9714 T(V7), /* V6T2. */
9715 T(V6K) /* V6K. */
9716 };
9717 const int v7[] =
9718 {
9719 T(V7), /* PRE_V4. */
9720 T(V7), /* V4. */
9721 T(V7), /* V4T. */
9722 T(V7), /* V5T. */
9723 T(V7), /* V5TE. */
9724 T(V7), /* V5TEJ. */
9725 T(V7), /* V6. */
9726 T(V7), /* V6KZ. */
9727 T(V7), /* V6T2. */
9728 T(V7), /* V6K. */
9729 T(V7) /* V7. */
9730 };
9731 const int v6_m[] =
9732 {
9733 -1, /* PRE_V4. */
9734 -1, /* V4. */
9735 T(V6K), /* V4T. */
9736 T(V6K), /* V5T. */
9737 T(V6K), /* V5TE. */
9738 T(V6K), /* V5TEJ. */
9739 T(V6K), /* V6. */
9740 T(V6KZ), /* V6KZ. */
9741 T(V7), /* V6T2. */
9742 T(V6K), /* V6K. */
9743 T(V7), /* V7. */
9744 T(V6_M) /* V6_M. */
9745 };
9746 const int v6s_m[] =
9747 {
9748 -1, /* PRE_V4. */
9749 -1, /* V4. */
9750 T(V6K), /* V4T. */
9751 T(V6K), /* V5T. */
9752 T(V6K), /* V5TE. */
9753 T(V6K), /* V5TEJ. */
9754 T(V6K), /* V6. */
9755 T(V6KZ), /* V6KZ. */
9756 T(V7), /* V6T2. */
9757 T(V6K), /* V6K. */
9758 T(V7), /* V7. */
9759 T(V6S_M), /* V6_M. */
9760 T(V6S_M) /* V6S_M. */
9761 };
9e3c6df6
PB		 9762 const int v7e_m[] =
9763 {
9764 -1, /* PRE_V4. */
9765 -1, /* V4. */
9766 T(V7E_M), /* V4T. */
9767 T(V7E_M), /* V5T. */
9768 T(V7E_M), /* V5TE. */
9769 T(V7E_M), /* V5TEJ. */
9770 T(V7E_M), /* V6. */
9771 T(V7E_M), /* V6KZ. */
9772 T(V7E_M), /* V6T2. */
9773 T(V7E_M), /* V6K. */
9774 T(V7E_M), /* V7. */
9775 T(V7E_M), /* V6_M. */
9776 T(V7E_M), /* V6S_M. */
9777 T(V7E_M) /* V7E_M. */
9778 };
91e22acd
AS		 9779 const int v4t_plus_v6_m[] =
9780 {
9781 -1, /* PRE_V4. */
9782 -1, /* V4. */
9783 T(V4T), /* V4T. */
9784 T(V5T), /* V5T. */
9785 T(V5TE), /* V5TE. */
9786 T(V5TEJ), /* V5TEJ. */
9787 T(V6), /* V6. */
9788 T(V6KZ), /* V6KZ. */
9789 T(V6T2), /* V6T2. */
9790 T(V6K), /* V6K. */
9791 T(V7), /* V7. */
9792 T(V6_M), /* V6_M. */
9793 T(V6S_M), /* V6S_M. */
9e3c6df6 9794 T(V7E_M), /* V7E_M. */
91e22acd
AS		 9795 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
9796 };
9797 const int *comb[] =
9798 {
9799 v6t2,
9800 v6k,
9801 v7,
9802 v6_m,
9803 v6s_m,
9e3c6df6 9804 v7e_m,
91e22acd
AS		 9805 /* Pseudo-architecture. */
9806 v4t_plus_v6_m
9807 };
9808
9809 /* Check we've not got a higher architecture than we know about. */
9810
9e3c6df6 9811 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 9812 {
3895f852 9813 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 9814 return -1;
9815 }
9816
9817 /* Override old tag if we have a Tag_also_compatible_with on the output. */
9818
9819 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
9820 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
9821 oldtag = T(V4T_PLUS_V6_M);
9822
9823 /* And override the new tag if we have a Tag_also_compatible_with on the
9824 input. */
9825
9826 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
9827 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
9828 newtag = T(V4T_PLUS_V6_M);
9829
9830 tagl = (oldtag < newtag) ? oldtag : newtag;
9831 result = tagh = (oldtag > newtag) ? oldtag : newtag;
9832
9833 /* Architectures before V6KZ add features monotonically. */
9834 if (tagh <= TAG_CPU_ARCH_V6KZ)
9835 return result;
9836
9837 result = comb[tagh - T(V6T2)][tagl];
9838
9839 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
9840 as the canonical version. */
9841 if (result == T(V4T_PLUS_V6_M))
9842 {
9843 result = T(V4T);
9844 *secondary_compat_out = T(V6_M);
9845 }
9846 else
9847 *secondary_compat_out = -1;
9848
9849 if (result == -1)
9850 {
3895f852 9851 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 9852 ibfd, oldtag, newtag);
9853 return -1;
9854 }
9855
9856 return result;
9857#undef T
8e79c3df
CM		 9858}
9859
ee065d83
PB		 9860/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
9861 are conflicting attributes. */
906e58ca 9862
ee065d83
PB		 9863static bfd_boolean
9864elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
9865{
104d59d1
JM		 9866 obj_attribute *in_attr;
9867 obj_attribute *out_attr;
9868 obj_attribute_list *in_list;
8e79c3df 9869 obj_attribute_list *out_list;
91e22acd 9870 obj_attribute_list **out_listp;
ee065d83
PB		 9871 /* Some tags have 0 = don't care, 1 = strong requirement,
9872 2 = weak requirement. */
91e22acd 9873 static const int order_021[3] = {0, 2, 1};
ee065d83 9874 int i;
91e22acd 9875 bfd_boolean result = TRUE;
ee065d83 9876
3e6b1042
DJ		 9877 /* Skip the linker stubs file. This preserves previous behavior
9878 of accepting unknown attributes in the first input file - but
9879 is that a bug? */
9880 if (ibfd->flags & BFD_LINKER_CREATED)
9881 return TRUE;
9882
104d59d1 9883 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 9884 {
9885 /* This is the first object. Copy the attributes. */
104d59d1 9886 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 9887
cd21e546
MGD		 9888 out_attr = elf_known_obj_attributes_proc (obfd);
9889
004ae526
PB		 9890 /* Use the Tag_null value to indicate the attributes have been
9891 initialized. */
cd21e546 9892 out_attr[0].i = 1;
004ae526 9893
cd21e546
MGD		 9894 /* We do not output objects with Tag_MPextension_use_legacy - we move
9895 the attribute's value to Tag_MPextension_use. */
9896 if (out_attr[Tag_MPextension_use_legacy].i != 0)
9897 {
9898 if (out_attr[Tag_MPextension_use].i != 0
9899 && out_attr[Tag_MPextension_use_legacy].i
9900 != out_attr[Tag_MPextension_use].i)
9901 {
9902 _bfd_error_handler
9903 (_("Error: %B has both the current and legacy "
9904 "Tag_MPextension_use attributes"), ibfd);
9905 result = FALSE;
9906 }
9907
9908 out_attr[Tag_MPextension_use] =
9909 out_attr[Tag_MPextension_use_legacy];
9910 out_attr[Tag_MPextension_use_legacy].type = 0;
9911 out_attr[Tag_MPextension_use_legacy].i = 0;
9912 }
9913
9914 return result;
ee065d83
PB		 9915 }
9916
104d59d1
JM		 9917 in_attr = elf_known_obj_attributes_proc (ibfd);
9918 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 9919 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
9920 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
9921 {
8e79c3df 9922 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 9923 if (out_attr[Tag_ABI_FP_number_model].i == 0)
9924 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
9925 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
9926 {
9927 _bfd_error_handler
3895f852 9928 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 9929 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
9930 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 9931 result = FALSE;
ee065d83
PB		 9932 }
9933 }
9934
104d59d1 9935 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 9936 {
9937 /* Merge this attribute with existing attributes. */
9938 switch (i)
9939 {
9940 case Tag_CPU_raw_name:
9941 case Tag_CPU_name:
91e22acd 9942 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 9943 break;
9944
9945 case Tag_ABI_optimization_goals:
9946 case Tag_ABI_FP_optimization_goals:
9947 /* Use the first value seen. */
9948 break;
9949
9950 case Tag_CPU_arch:
91e22acd
AS		 9951 {
9952 int secondary_compat = -1, secondary_compat_out = -1;
9953 unsigned int saved_out_attr = out_attr[i].i;
9954 static const char *name_table[] = {
9955 /* These aren't real CPU names, but we can't guess
9956 that from the architecture version alone. */
9957 "Pre v4",
9958 "ARM v4",
9959 "ARM v4T",
9960 "ARM v5T",
9961 "ARM v5TE",
9962 "ARM v5TEJ",
9963 "ARM v6",
9964 "ARM v6KZ",
9965 "ARM v6T2",
9966 "ARM v6K",
9967 "ARM v7",
9968 "ARM v6-M",
9969 "ARM v6S-M"
9970 };
9971
9972 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
9973 secondary_compat = get_secondary_compatible_arch (ibfd);
9974 secondary_compat_out = get_secondary_compatible_arch (obfd);
9975 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
9976 &secondary_compat_out,
9977 in_attr[i].i,
9978 secondary_compat);
9979 set_secondary_compatible_arch (obfd, secondary_compat_out);
9980
9981 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
9982 if (out_attr[i].i == saved_out_attr)
9983 ; /* Leave the names alone. */
9984 else if (out_attr[i].i == in_attr[i].i)
9985 {
9986 /* The output architecture has been changed to match the
9987 input architecture. Use the input names. */
9988 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
9989 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
9990 : NULL;
9991 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
9992 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
9993 : NULL;
9994 }
9995 else
9996 {
9997 out_attr[Tag_CPU_name].s = NULL;
9998 out_attr[Tag_CPU_raw_name].s = NULL;
9999 }
10000
10001 /* If we still don't have a value for Tag_CPU_name,
10002 make one up now. Tag_CPU_raw_name remains blank. */
10003 if (out_attr[Tag_CPU_name].s == NULL
10004 && out_attr[i].i < ARRAY_SIZE (name_table))
10005 out_attr[Tag_CPU_name].s =
10006 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
10007 }
10008 break;
10009
ee065d83
PB		 10010 case Tag_ARM_ISA_use:
10011 case Tag_THUMB_ISA_use:
ee065d83 10012 case Tag_WMMX_arch:
91e22acd
AS		 10013 case Tag_Advanced_SIMD_arch:
10014 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 10015 case Tag_ABI_FP_rounding:
ee065d83
PB		 10016 case Tag_ABI_FP_exceptions:
10017 case Tag_ABI_FP_user_exceptions:
10018 case Tag_ABI_FP_number_model:
75375b3e 10019 case Tag_FP_HP_extension:
91e22acd
AS		 10020 case Tag_CPU_unaligned_access:
10021 case Tag_T2EE_use:
91e22acd 10022 case Tag_MPextension_use:
ee065d83
PB		 10023 /* Use the largest value specified. */
10024 if (in_attr[i].i > out_attr[i].i)
10025 out_attr[i].i = in_attr[i].i;
10026 break;
10027
75375b3e 10028 case Tag_ABI_align_preserved:
91e22acd
AS		 10029 case Tag_ABI_PCS_RO_data:
10030 /* Use the smallest value specified. */
10031 if (in_attr[i].i < out_attr[i].i)
10032 out_attr[i].i = in_attr[i].i;
10033 break;
10034
75375b3e 10035 case Tag_ABI_align_needed:
91e22acd 10036 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 10037 && (in_attr[Tag_ABI_align_preserved].i == 0
10038 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 10039 {
91e22acd
AS		 10040 /* This error message should be enabled once all non-conformant
10041 binaries in the toolchain have had the attributes set
10042 properly.
ee065d83 10043 _bfd_error_handler
3895f852 10044 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 10045 obfd, ibfd);
10046 result = FALSE; */
ee065d83 10047 }
91e22acd
AS		 10048 /* Fall through. */
10049 case Tag_ABI_FP_denormal:
10050 case Tag_ABI_PCS_GOT_use:
10051 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
10052 value if greater than 2 (for future-proofing). */
10053 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
10054 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
10055 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 10056 out_attr[i].i = in_attr[i].i;
10057 break;
91e22acd 10058
75375b3e
MGD		 10059 case Tag_Virtualization_use:
10060 /* The virtualization tag effectively stores two bits of
10061 information: the intended use of TrustZone (in bit 0), and the
10062 intended use of Virtualization (in bit 1). */
10063 if (out_attr[i].i == 0)
10064 out_attr[i].i = in_attr[i].i;
10065 else if (in_attr[i].i != 0
10066 && in_attr[i].i != out_attr[i].i)
10067 {
10068 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
10069 out_attr[i].i = 3;
10070 else
10071 {
10072 _bfd_error_handler
10073 (_("error: %B: unable to merge virtualization attributes "
10074 "with %B"),
10075 obfd, ibfd);
10076 result = FALSE;
10077 }
10078 }
10079 break;
91e22acd
AS		 10080
10081 case Tag_CPU_arch_profile:
10082 if (out_attr[i].i != in_attr[i].i)
10083 {
10084 /* 0 will merge with anything.
10085 'A' and 'S' merge to 'A'.
10086 'R' and 'S' merge to 'R'.
10087 'M' and 'A|R|S' is an error. */
10088 if (out_attr[i].i == 0
10089 || (out_attr[i].i == 'S'
10090 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
10091 out_attr[i].i = in_attr[i].i;
10092 else if (in_attr[i].i == 0
10093 || (in_attr[i].i == 'S'
10094 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
10095 ; /* Do nothing. */
10096 else
10097 {
10098 _bfd_error_handler
3895f852 10099 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 10100 ibfd,
10101 in_attr[i].i ? in_attr[i].i : '0',
10102 out_attr[i].i ? out_attr[i].i : '0');
10103 result = FALSE;
10104 }
10105 }
10106 break;
75375b3e 10107 case Tag_FP_arch:
62f3b8c8 10108 {
4547cb56
NC		 10109 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
10110 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
10111 when it's 0. It might mean absence of FP hardware if
10112 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
10113
62f3b8c8
PB		 10114 static const struct
10115 {
10116 int ver;
10117 int regs;
10118 } vfp_versions[7] =
10119 {
10120 {0, 0},
10121 {1, 16},
10122 {2, 16},
10123 {3, 32},
10124 {3, 16},
10125 {4, 32},
10126 {4, 16}
10127 };
10128 int ver;
10129 int regs;
10130 int newval;
10131
4547cb56
NC		 10132 /* If the output has no requirement about FP hardware,
10133 follow the requirement of the input. */
10134 if (out_attr[i].i == 0)
10135 {
10136 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
10137 out_attr[i].i = in_attr[i].i;
10138 out_attr[Tag_ABI_HardFP_use].i
10139 = in_attr[Tag_ABI_HardFP_use].i;
10140 break;
10141 }
10142 /* If the input has no requirement about FP hardware, do
10143 nothing. */
10144 else if (in_attr[i].i == 0)
10145 {
10146 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
10147 break;
10148 }
10149
10150 /* Both the input and the output have nonzero Tag_FP_arch.
10151 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
10152
10153 /* If both the input and the output have zero Tag_ABI_HardFP_use,
10154 do nothing. */
10155 if (in_attr[Tag_ABI_HardFP_use].i == 0
10156 && out_attr[Tag_ABI_HardFP_use].i == 0)
10157 ;
10158 /* If the input and the output have different Tag_ABI_HardFP_use,
10159 the combination of them is 3 (SP & DP). */
10160 else if (in_attr[Tag_ABI_HardFP_use].i
10161 != out_attr[Tag_ABI_HardFP_use].i)
10162 out_attr[Tag_ABI_HardFP_use].i = 3;
10163
10164 /* Now we can handle Tag_FP_arch. */
10165
62f3b8c8
PB		 10166 /* Values greater than 6 aren't defined, so just pick the
10167 biggest */
10168 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
10169 {
10170 out_attr[i] = in_attr[i];
10171 break;
10172 }
10173 /* The output uses the superset of input features
10174 (ISA version) and registers. */
10175 ver = vfp_versions[in_attr[i].i].ver;
10176 if (ver < vfp_versions[out_attr[i].i].ver)
10177 ver = vfp_versions[out_attr[i].i].ver;
10178 regs = vfp_versions[in_attr[i].i].regs;
10179 if (regs < vfp_versions[out_attr[i].i].regs)
10180 regs = vfp_versions[out_attr[i].i].regs;
10181 /* This assumes all possible supersets are also a valid
10182 options. */
10183 for (newval = 6; newval > 0; newval--)
10184 {
10185 if (regs == vfp_versions[newval].regs
10186 && ver == vfp_versions[newval].ver)
10187 break;
10188 }
10189 out_attr[i].i = newval;
10190 }
b1cc4aeb 10191 break;
ee065d83
PB		 10192 case Tag_PCS_config:
10193 if (out_attr[i].i == 0)
10194 out_attr[i].i = in_attr[i].i;
10195 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
10196 {
10197 /* It's sometimes ok to mix different configs, so this is only
10198 a warning. */
10199 _bfd_error_handler
10200 (_("Warning: %B: Conflicting platform configuration"), ibfd);
10201 }
10202 break;
10203 case Tag_ABI_PCS_R9_use:
004ae526
PB		 10204 if (in_attr[i].i != out_attr[i].i
10205 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 10206 && in_attr[i].i != AEABI_R9_unused)
10207 {
10208 _bfd_error_handler
3895f852 10209 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 10210 result = FALSE;
ee065d83
PB		 10211 }
10212 if (out_attr[i].i == AEABI_R9_unused)
10213 out_attr[i].i = in_attr[i].i;
10214 break;
10215 case Tag_ABI_PCS_RW_data:
10216 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
10217 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
10218 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
10219 {
10220 _bfd_error_handler
3895f852 10221 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 10222 ibfd);
91e22acd 10223 result = FALSE;
ee065d83
PB		 10224 }
10225 /* Use the smallest value specified. */
10226 if (in_attr[i].i < out_attr[i].i)
10227 out_attr[i].i = in_attr[i].i;
10228 break;
ee065d83 10229 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 10230 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
10231 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 10232 {
10233 _bfd_error_handler
a9dc9481
JM		 10234 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
10235 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 10236 }
a9dc9481 10237 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 10238 out_attr[i].i = in_attr[i].i;
10239 break;
ee065d83
PB		 10240 case Tag_ABI_enum_size:
10241 if (in_attr[i].i != AEABI_enum_unused)
10242 {
10243 if (out_attr[i].i == AEABI_enum_unused
10244 || out_attr[i].i == AEABI_enum_forced_wide)
10245 {
10246 /* The existing object is compatible with anything.
10247 Use whatever requirements the new object has. */
10248 out_attr[i].i = in_attr[i].i;
10249 }
10250 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 10251 && out_attr[i].i != in_attr[i].i
0ffa91dd 10252 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 10253 {
91e22acd 10254 static const char *aeabi_enum_names[] =
bf21ed78 10255 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 10256 const char *in_name =
10257 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10258 ? aeabi_enum_names[in_attr[i].i]
10259 : "<unknown>";
10260 const char *out_name =
10261 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
10262 ? aeabi_enum_names[out_attr[i].i]
10263 : "<unknown>";
ee065d83 10264 _bfd_error_handler
bf21ed78 10265 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 10266 ibfd, in_name, out_name);
ee065d83
PB		 10267 }
10268 }
10269 break;
10270 case Tag_ABI_VFP_args:
10271 /* Aready done. */
10272 break;
10273 case Tag_ABI_WMMX_args:
10274 if (in_attr[i].i != out_attr[i].i)
10275 {
10276 _bfd_error_handler
3895f852 10277 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 10278 ibfd, obfd);
91e22acd 10279 result = FALSE;
ee065d83
PB		 10280 }
10281 break;
7b86a9fa
AS		 10282 case Tag_compatibility:
10283 /* Merged in target-independent code. */
10284 break;
91e22acd 10285 case Tag_ABI_HardFP_use:
4547cb56 10286 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 10287 break;
10288 case Tag_ABI_FP_16bit_format:
10289 if (in_attr[i].i != 0 && out_attr[i].i != 0)
10290 {
10291 if (in_attr[i].i != out_attr[i].i)
10292 {
10293 _bfd_error_handler
3895f852 10294 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 10295 ibfd, obfd);
10296 result = FALSE;
10297 }
10298 }
10299 if (in_attr[i].i != 0)
10300 out_attr[i].i = in_attr[i].i;
10301 break;
7b86a9fa 10302
cd21e546
MGD		 10303 case Tag_DIV_use:
10304 /* This tag is set to zero if we can use UDIV and SDIV in Thumb
10305 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10306 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10307 CPU. We will merge as follows: If the input attribute's value
10308 is one then the output attribute's value remains unchanged. If
10309 the input attribute's value is zero or two then if the output
10310 attribute's value is one the output value is set to the input
10311 value, otherwise the output value must be the same as the
10312 inputs. */
10313 if (in_attr[i].i != 1 && out_attr[i].i != 1)
10314 {
10315 if (in_attr[i].i != out_attr[i].i)
10316 {
10317 _bfd_error_handler
10318 (_("DIV usage mismatch between %B and %B"),
10319 ibfd, obfd);
10320 result = FALSE;
10321 }
10322 }
10323
10324 if (in_attr[i].i != 1)
10325 out_attr[i].i = in_attr[i].i;
10326
10327 break;
10328
10329 case Tag_MPextension_use_legacy:
10330 /* We don't output objects with Tag_MPextension_use_legacy - we
10331 move the value to Tag_MPextension_use. */
10332 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
10333 {
10334 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
10335 {
10336 _bfd_error_handler
10337 (_("%B has has both the current and legacy "
10338 "Tag_MPextension_use attributes"),
10339 ibfd);
10340 result = FALSE;
10341 }
10342 }
10343
10344 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
10345 out_attr[Tag_MPextension_use] = in_attr[i];
10346
10347 break;
10348
91e22acd 10349 case Tag_nodefaults:
2d0bb761
AS		 10350 /* This tag is set if it exists, but the value is unused (and is
10351 typically zero). We don't actually need to do anything here -
10352 the merge happens automatically when the type flags are merged
10353 below. */
91e22acd
AS		 10354 break;
10355 case Tag_also_compatible_with:
10356 /* Already done in Tag_CPU_arch. */
10357 break;
10358 case Tag_conformance:
10359 /* Keep the attribute if it matches. Throw it away otherwise.
10360 No attribute means no claim to conform. */
10361 if (!in_attr[i].s || !out_attr[i].s
10362 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
10363 out_attr[i].s = NULL;
10364 break;
3cfad14c 10365
91e22acd 10366 default:
3cfad14c 10367 {
91e22acd
AS		 10368 bfd *err_bfd = NULL;
10369
10370 /* The "known_obj_attributes" table does contain some undefined
10371 attributes. Ensure that there are unused. */
10372 if (out_attr[i].i != 0 || out_attr[i].s != NULL)
10373 err_bfd = obfd;
10374 else if (in_attr[i].i != 0 || in_attr[i].s != NULL)
10375 err_bfd = ibfd;
10376
10377 if (err_bfd != NULL)
10378 {
10379 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10380 if ((i & 127) < 64)
10381 {
10382 _bfd_error_handler
10383 (_("%B: Unknown mandatory EABI object attribute %d"),
10384 err_bfd, i);
10385 bfd_set_error (bfd_error_bad_value);
10386 result = FALSE;
10387 }
10388 else
10389 {
10390 _bfd_error_handler
10391 (_("Warning: %B: Unknown EABI object attribute %d"),
10392 err_bfd, i);
10393 }
10394 }
10395
10396 /* Only pass on attributes that match in both inputs. */
10397 if (in_attr[i].i != out_attr[i].i
10398 || in_attr[i].s != out_attr[i].s
10399 || (in_attr[i].s != NULL && out_attr[i].s != NULL
10400 && strcmp (in_attr[i].s, out_attr[i].s) != 0))
10401 {
10402 out_attr[i].i = 0;
10403 out_attr[i].s = NULL;
10404 }
3cfad14c 10405 }
91e22acd
AS		 10406 }
10407
10408 /* If out_attr was copied from in_attr then it won't have a type yet. */
10409 if (in_attr[i].type && !out_attr[i].type)
10410 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 10411 }
10412
104d59d1 10413 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 10414 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
10415 return FALSE;
ee065d83 10416
104d59d1
JM		 10417 /* Check for any attributes not known on ARM. */
10418 in_list = elf_other_obj_attributes_proc (ibfd);
91e22acd
AS		 10419 out_listp = &elf_other_obj_attributes_proc (obfd);
10420 out_list = *out_listp;
8e79c3df 10421
91e22acd 10422 for (; in_list || out_list; )
ee065d83 10423 {
91e22acd
AS		 10424 bfd *err_bfd = NULL;
10425 int err_tag = 0;
8e79c3df
CM		 10426
10427 /* The tags for each list are in numerical order. */
10428 /* If the tags are equal, then merge. */
91e22acd 10429 if (out_list && (!in_list || in_list->tag > out_list->tag))
8e79c3df 10430 {
91e22acd
AS		 10431 /* This attribute only exists in obfd. We can't merge, and we don't
10432 know what the tag means, so delete it. */
10433 err_bfd = obfd;
10434 err_tag = out_list->tag;
10435 *out_listp = out_list->next;
10436 out_list = *out_listp;
8e79c3df 10437 }
91e22acd 10438 else if (in_list && (!out_list || in_list->tag < out_list->tag))
8e79c3df 10439 {
91e22acd
AS		 10440 /* This attribute only exists in ibfd. We can't merge, and we don't
10441 know what the tag means, so ignore it. */
10442 err_bfd = ibfd;
10443 err_tag = in_list->tag;
8e79c3df 10444 in_list = in_list->next;
eb111b1f 10445 }
91e22acd
AS		 10446 else /* The tags are equal. */
10447 {
10448 /* As present, all attributes in the list are unknown, and
10449 therefore can't be merged meaningfully. */
10450 err_bfd = obfd;
10451 err_tag = out_list->tag;
10452
10453 /* Only pass on attributes that match in both inputs. */
10454 if (in_list->attr.i != out_list->attr.i
10455 || in_list->attr.s != out_list->attr.s
10456 || (in_list->attr.s && out_list->attr.s
10457 && strcmp (in_list->attr.s, out_list->attr.s) != 0))
10458 {
10459 /* No match. Delete the attribute. */
10460 *out_listp = out_list->next;
10461 out_list = *out_listp;
10462 }
10463 else
10464 {
10465 /* Matched. Keep the attribute and move to the next. */
10466 out_list = out_list->next;
10467 in_list = in_list->next;
10468 }
10469 }
10470
10471 if (err_bfd)
10472 {
10473 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
10474 if ((err_tag & 127) < 64)
10475 {
10476 _bfd_error_handler
10477 (_("%B: Unknown mandatory EABI object attribute %d"),
10478 err_bfd, err_tag);
10479 bfd_set_error (bfd_error_bad_value);
10480 result = FALSE;
10481 }
10482 else
10483 {
10484 _bfd_error_handler
10485 (_("Warning: %B: Unknown EABI object attribute %d"),
10486 err_bfd, err_tag);
10487 }
10488 }
ee065d83 10489 }
91e22acd 10490 return result;
252b5132
RH		 10491}
10492
3a4a14e9
PB		 10493
10494/* Return TRUE if the two EABI versions are incompatible. */
10495
10496static bfd_boolean
10497elf32_arm_versions_compatible (unsigned iver, unsigned over)
10498{
10499 /* v4 and v5 are the same spec before and after it was released,
10500 so allow mixing them. */
10501 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
10502 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
10503 return TRUE;
10504
10505 return (iver == over);
10506}
10507
252b5132
RH		 10508/* Merge backend specific data from an object file to the output
10509 object file when linking. */
9b485d32 10510
b34976b6 10511static bfd_boolean
21d799b5 10512elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 10513
9b485d32
NC		 10514/* Display the flags field. */
10515
b34976b6 10516static bfd_boolean
57e8b36a 10517elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 10518{
fc830a83
NC		 10519 FILE * file = (FILE *) ptr;
10520 unsigned long flags;
252b5132
RH		 10521
10522 BFD_ASSERT (abfd != NULL && ptr != NULL);
10523
10524 /* Print normal ELF private data. */
10525 _bfd_elf_print_private_bfd_data (abfd, ptr);
10526
fc830a83 10527 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 10528 /* Ignore init flag - it may not be set, despite the flags field
10529 containing valid data. */
252b5132
RH		 10530
10531 /* xgettext:c-format */
9b485d32 10532 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 10533
fc830a83
NC		 10534 switch (EF_ARM_EABI_VERSION (flags))
10535 {
10536 case EF_ARM_EABI_UNKNOWN:
4cc11e76 10537 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 10538 official ARM ELF extended ABI. Hence they are only decoded if
10539 the EABI version is not set. */
fd2ec330 10540 if (flags & EF_ARM_INTERWORK)
9b485d32 10541 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 10542
fd2ec330 10543 if (flags & EF_ARM_APCS_26)
6c571f00 10544 fprintf (file, " [APCS-26]");
fc830a83 10545 else
6c571f00 10546 fprintf (file, " [APCS-32]");
9a5aca8c 10547
96a846ea
RE		 10548 if (flags & EF_ARM_VFP_FLOAT)
10549 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 10550 else if (flags & EF_ARM_MAVERICK_FLOAT)
10551 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 10552 else
10553 fprintf (file, _(" [FPA float format]"));
10554
fd2ec330 10555 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 10556 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 10557
fd2ec330 10558 if (flags & EF_ARM_PIC)
9b485d32 10559 fprintf (file, _(" [position independent]"));
fc830a83 10560
fd2ec330 10561 if (flags & EF_ARM_NEW_ABI)
9b485d32 10562 fprintf (file, _(" [new ABI]"));
9a5aca8c 10563
fd2ec330 10564 if (flags & EF_ARM_OLD_ABI)
9b485d32 10565 fprintf (file, _(" [old ABI]"));
9a5aca8c 10566
fd2ec330 10567 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 10568 fprintf (file, _(" [software FP]"));
9a5aca8c 10569
96a846ea
RE		 10570 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
10571 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 10572 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
10573 | EF_ARM_MAVERICK_FLOAT);
fc830a83 10574 break;
9a5aca8c 10575
fc830a83 10576 case EF_ARM_EABI_VER1:
9b485d32 10577 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 10578
fc830a83 10579 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 10580 fprintf (file, _(" [sorted symbol table]"));
fc830a83 10581 else
9b485d32 10582 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 10583
fc830a83
NC		 10584 flags &= ~ EF_ARM_SYMSARESORTED;
10585 break;
9a5aca8c 10586
fd2ec330
PB		 10587 case EF_ARM_EABI_VER2:
10588 fprintf (file, _(" [Version2 EABI]"));
10589
10590 if (flags & EF_ARM_SYMSARESORTED)
10591 fprintf (file, _(" [sorted symbol table]"));
10592 else
10593 fprintf (file, _(" [unsorted symbol table]"));
10594
10595 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
10596 fprintf (file, _(" [dynamic symbols use segment index]"));
10597
10598 if (flags & EF_ARM_MAPSYMSFIRST)
10599 fprintf (file, _(" [mapping symbols precede others]"));
10600
99e4ae17 10601 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 10602 | EF_ARM_MAPSYMSFIRST);
10603 break;
10604
d507cf36
PB		 10605 case EF_ARM_EABI_VER3:
10606 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 10607 break;
10608
10609 case EF_ARM_EABI_VER4:
10610 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 10611 goto eabi;
d507cf36 10612
3a4a14e9
PB		 10613 case EF_ARM_EABI_VER5:
10614 fprintf (file, _(" [Version5 EABI]"));
10615 eabi:
d507cf36
PB		 10616 if (flags & EF_ARM_BE8)
10617 fprintf (file, _(" [BE8]"));
10618
10619 if (flags & EF_ARM_LE8)
10620 fprintf (file, _(" [LE8]"));
10621
10622 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
10623 break;
10624
fc830a83 10625 default:
9b485d32 10626 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 10627 break;
10628 }
252b5132 10629
fc830a83 10630 flags &= ~ EF_ARM_EABIMASK;
252b5132 10631
fc830a83 10632 if (flags & EF_ARM_RELEXEC)
9b485d32 10633 fprintf (file, _(" [relocatable executable]"));
252b5132 10634
fc830a83 10635 if (flags & EF_ARM_HASENTRY)
9b485d32 10636 fprintf (file, _(" [has entry point]"));
252b5132 10637
fc830a83
NC		 10638 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
10639
10640 if (flags)
9b485d32 10641 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 10642
252b5132
RH		 10643 fputc ('\n', file);
10644
b34976b6 10645 return TRUE;
252b5132
RH		 10646}
10647
10648static int
57e8b36a 10649elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 10650{
2f0ca46a
NC		 10651 switch (ELF_ST_TYPE (elf_sym->st_info))
10652 {
10653 case STT_ARM_TFUNC:
10654 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 10655
2f0ca46a
NC		 10656 case STT_ARM_16BIT:
10657 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
10658 This allows us to distinguish between data used by Thumb instructions
10659 and non-data (which is probably code) inside Thumb regions of an
10660 executable. */
1a0eb693 10661 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 10662 return ELF_ST_TYPE (elf_sym->st_info);
10663 break;
9a5aca8c 10664
ce855c42
NC		 10665 default:
10666 break;
2f0ca46a
NC		 10667 }
10668
10669 return type;
252b5132 10670}
f21f3fe0 10671
252b5132 10672static asection *
07adf181
AM		 10673elf32_arm_gc_mark_hook (asection *sec,
10674 struct bfd_link_info *info,
10675 Elf_Internal_Rela *rel,
10676 struct elf_link_hash_entry *h,
10677 Elf_Internal_Sym *sym)
252b5132
RH		 10678{
10679 if (h != NULL)
07adf181 10680 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 10681 {
10682 case R_ARM_GNU_VTINHERIT:
10683 case R_ARM_GNU_VTENTRY:
07adf181
AM		 10684 return NULL;
10685 }
9ad5cbcf 10686
07adf181 10687 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 10688}
10689
780a67af
NC		 10690/* Update the got entry reference counts for the section being removed. */
10691
b34976b6 10692static bfd_boolean
ba93b8ac
DJ		 10693elf32_arm_gc_sweep_hook (bfd * abfd,
10694 struct bfd_link_info * info,
10695 asection * sec,
10696 const Elf_Internal_Rela * relocs)
252b5132 10697{
5e681ec4
PB		 10698 Elf_Internal_Shdr *symtab_hdr;
10699 struct elf_link_hash_entry **sym_hashes;
10700 bfd_signed_vma *local_got_refcounts;
10701 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 10702 struct elf32_arm_link_hash_table * globals;
10703
7dda2462
TG		 10704 if (info->relocatable)
10705 return TRUE;
10706
eb043451 10707 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10708 if (globals == NULL)
10709 return FALSE;
5e681ec4
PB		 10710
10711 elf_section_data (sec)->local_dynrel = NULL;
10712
0ffa91dd 10713 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 10714 sym_hashes = elf_sym_hashes (abfd);
10715 local_got_refcounts = elf_local_got_refcounts (abfd);
10716
906e58ca 10717 check_use_blx (globals);
bd97cb95 10718
5e681ec4
PB		 10719 relend = relocs + sec->reloc_count;
10720 for (rel = relocs; rel < relend; rel++)
eb043451 10721 {
3eb128b2
AM		 10722 unsigned long r_symndx;
10723 struct elf_link_hash_entry *h = NULL;
eb043451 10724 int r_type;
5e681ec4 10725
3eb128b2
AM		 10726 r_symndx = ELF32_R_SYM (rel->r_info);
10727 if (r_symndx >= symtab_hdr->sh_info)
10728 {
10729 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10730 while (h->root.type == bfd_link_hash_indirect
10731 || h->root.type == bfd_link_hash_warning)
10732 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10733 }
10734
eb043451 10735 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10736 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 10737 switch (r_type)
10738 {
10739 case R_ARM_GOT32:
eb043451 10740 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10741 case R_ARM_TLS_GD32:
10742 case R_ARM_TLS_IE32:
3eb128b2 10743 if (h != NULL)
eb043451 10744 {
eb043451
PB		 10745 if (h->got.refcount > 0)
10746 h->got.refcount -= 1;
10747 }
10748 else if (local_got_refcounts != NULL)
10749 {
10750 if (local_got_refcounts[r_symndx] > 0)
10751 local_got_refcounts[r_symndx] -= 1;
10752 }
10753 break;
10754
ba93b8ac 10755 case R_ARM_TLS_LDM32:
4dfe6ac6 10756 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 10757 break;
10758
eb043451 10759 case R_ARM_ABS32:
bb224fc3 10760 case R_ARM_ABS32_NOI:
eb043451 10761 case R_ARM_REL32:
bb224fc3 10762 case R_ARM_REL32_NOI:
eb043451
PB		 10763 case R_ARM_PC24:
10764 case R_ARM_PLT32:
5b5bb741
PB		 10765 case R_ARM_CALL:
10766 case R_ARM_JUMP24:
eb043451 10767 case R_ARM_PREL31:
c19d1205 10768 case R_ARM_THM_CALL:
bd97cb95
DJ		 10769 case R_ARM_THM_JUMP24:
10770 case R_ARM_THM_JUMP19:
b6895b4f
PB		 10771 case R_ARM_MOVW_ABS_NC:
10772 case R_ARM_MOVT_ABS:
10773 case R_ARM_MOVW_PREL_NC:
10774 case R_ARM_MOVT_PREL:
10775 case R_ARM_THM_MOVW_ABS_NC:
10776 case R_ARM_THM_MOVT_ABS:
10777 case R_ARM_THM_MOVW_PREL_NC:
10778 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 10779 /* Should the interworking branches be here also? */
10780
3eb128b2 10781 if (h != NULL)
eb043451
PB		 10782 {
10783 struct elf32_arm_link_hash_entry *eh;
10784 struct elf32_arm_relocs_copied **pp;
10785 struct elf32_arm_relocs_copied *p;
5e681ec4 10786
b7693d02 10787 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 10788
eb043451 10789 if (h->plt.refcount > 0)
b7693d02
DJ		 10790 {
10791 h->plt.refcount -= 1;
bd97cb95
DJ		 10792 if (r_type == R_ARM_THM_CALL)
10793 eh->plt_maybe_thumb_refcount--;
10794
10795 if (r_type == R_ARM_THM_JUMP24
10796 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 10797 eh->plt_thumb_refcount--;
10798 }
5e681ec4 10799
eb043451 10800 if (r_type == R_ARM_ABS32
bb224fc3
MS		 10801 || r_type == R_ARM_REL32
10802 || r_type == R_ARM_ABS32_NOI
10803 || r_type == R_ARM_REL32_NOI)
eb043451 10804 {
eb043451
PB		 10805 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
10806 pp = &p->next)
10807 if (p->section == sec)
10808 {
10809 p->count -= 1;
bb224fc3
MS		 10810 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
10811 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 10812 p->pc_count -= 1;
eb043451
PB		 10813 if (p->count == 0)
10814 *pp = p->next;
10815 break;
10816 }
10817 }
10818 }
10819 break;
5e681ec4 10820
eb043451
PB		 10821 default:
10822 break;
10823 }
10824 }
5e681ec4 10825
b34976b6 10826 return TRUE;
252b5132
RH		 10827}
10828
780a67af
NC		 10829/* Look through the relocs for a section during the first phase. */
10830
b34976b6 10831static bfd_boolean
57e8b36a
NC		 10832elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
10833 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 10834{
b34976b6
AM		 10835 Elf_Internal_Shdr *symtab_hdr;
10836 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 10837 const Elf_Internal_Rela *rel;
10838 const Elf_Internal_Rela *rel_end;
10839 bfd *dynobj;
5e681ec4 10840 asection *sreloc;
b34976b6 10841 bfd_vma *local_got_offsets;
5e681ec4 10842 struct elf32_arm_link_hash_table *htab;
39623e12 10843 bfd_boolean needs_plt;
ce98a316 10844 unsigned long nsyms;
9a5aca8c 10845
1049f94e 10846 if (info->relocatable)
b34976b6 10847 return TRUE;
9a5aca8c 10848
0ffa91dd
NC		 10849 BFD_ASSERT (is_arm_elf (abfd));
10850
5e681ec4 10851 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10852 if (htab == NULL)
10853 return FALSE;
10854
5e681ec4 10855 sreloc = NULL;
9a5aca8c 10856
67687978
PB		 10857 /* Create dynamic sections for relocatable executables so that we can
10858 copy relocations. */
10859 if (htab->root.is_relocatable_executable
10860 && ! htab->root.dynamic_sections_created)
10861 {
10862 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
10863 return FALSE;
10864 }
10865
252b5132
RH		 10866 dynobj = elf_hash_table (info)->dynobj;
10867 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 10868
0ffa91dd 10869 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 10870 sym_hashes = elf_sym_hashes (abfd);
ce98a316
NC		 10871 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
10872
252b5132
RH		 10873 rel_end = relocs + sec->reloc_count;
10874 for (rel = relocs; rel < rel_end; rel++)
10875 {
10876 struct elf_link_hash_entry *h;
b7693d02 10877 struct elf32_arm_link_hash_entry *eh;
252b5132 10878 unsigned long r_symndx;
eb043451 10879 int r_type;
9a5aca8c 10880
252b5132 10881 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 10882 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 10883 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 10884
ce98a316
NC		 10885 if (r_symndx >= nsyms
10886 /* PR 9934: It is possible to have relocations that do not
10887 refer to symbols, thus it is also possible to have an
10888 object file containing relocations but no symbol table. */
10889 && (r_symndx > 0 || nsyms > 0))
ba93b8ac
DJ		 10890 {
10891 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 10892 r_symndx);
ba93b8ac
DJ		 10893 return FALSE;
10894 }
10895
ce98a316 10896 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info)
252b5132
RH		 10897 h = NULL;
10898 else
973a3492
L		 10899 {
10900 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
10901 while (h->root.type == bfd_link_hash_indirect
10902 || h->root.type == bfd_link_hash_warning)
10903 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10904 }
9a5aca8c 10905
b7693d02
DJ		 10906 eh = (struct elf32_arm_link_hash_entry *) h;
10907
eb043451 10908 switch (r_type)
252b5132 10909 {
5e681ec4 10910 case R_ARM_GOT32:
eb043451 10911 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 10912 case R_ARM_TLS_GD32:
10913 case R_ARM_TLS_IE32:
5e681ec4 10914 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 10915 {
10916 int tls_type, old_tls_type;
5e681ec4 10917
ba93b8ac
DJ		 10918 switch (r_type)
10919 {
10920 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
10921 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
10922 default: tls_type = GOT_NORMAL; break;
10923 }
252b5132 10924
ba93b8ac
DJ		 10925 if (h != NULL)
10926 {
10927 h->got.refcount++;
10928 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
10929 }
10930 else
10931 {
10932 bfd_signed_vma *local_got_refcounts;
10933
10934 /* This is a global offset table entry for a local symbol. */
10935 local_got_refcounts = elf_local_got_refcounts (abfd);
10936 if (local_got_refcounts == NULL)
10937 {
10938 bfd_size_type size;
906e58ca 10939
ba93b8ac 10940 size = symtab_hdr->sh_info;
906e58ca 10941 size *= (sizeof (bfd_signed_vma) + sizeof (char));
21d799b5
NC		 10942 local_got_refcounts = (bfd_signed_vma *)
10943 bfd_zalloc (abfd, size);
ba93b8ac
DJ		 10944 if (local_got_refcounts == NULL)
10945 return FALSE;
10946 elf_local_got_refcounts (abfd) = local_got_refcounts;
10947 elf32_arm_local_got_tls_type (abfd)
10948 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
10949 }
10950 local_got_refcounts[r_symndx] += 1;
10951 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
10952 }
10953
10954 /* We will already have issued an error message if there is a
10955 TLS / non-TLS mismatch, based on the symbol type. We don't
10956 support any linker relaxations. So just combine any TLS
10957 types needed. */
10958 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
10959 && tls_type != GOT_NORMAL)
10960 tls_type |= old_tls_type;
10961
10962 if (old_tls_type != tls_type)
10963 {
10964 if (h != NULL)
10965 elf32_arm_hash_entry (h)->tls_type = tls_type;
10966 else
10967 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
10968 }
10969 }
8029a119 10970 /* Fall through. */
ba93b8ac
DJ		 10971
10972 case R_ARM_TLS_LDM32:
10973 if (r_type == R_ARM_TLS_LDM32)
10974 htab->tls_ldm_got.refcount++;
8029a119 10975 /* Fall through. */
252b5132 10976
c19d1205 10977 case R_ARM_GOTOFF32:
5e681ec4
PB		 10978 case R_ARM_GOTPC:
10979 if (htab->sgot == NULL)
10980 {
10981 if (htab->root.dynobj == NULL)
10982 htab->root.dynobj = abfd;
10983 if (!create_got_section (htab->root.dynobj, info))
10984 return FALSE;
10985 }
252b5132
RH		 10986 break;
10987
00a97672
RS		 10988 case R_ARM_ABS12:
10989 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10990 ldr __GOTT_INDEX__ offsets. */
10991 if (!htab->vxworks_p)
10992 break;
8029a119 10993 /* Fall through. */
00a97672 10994
252b5132 10995 case R_ARM_PC24:
7359ea65 10996 case R_ARM_PLT32:
5b5bb741
PB		 10997 case R_ARM_CALL:
10998 case R_ARM_JUMP24:
eb043451 10999 case R_ARM_PREL31:
c19d1205 11000 case R_ARM_THM_CALL:
bd97cb95
DJ		 11001 case R_ARM_THM_JUMP24:
11002 case R_ARM_THM_JUMP19:
39623e12
PB		 11003 needs_plt = 1;
11004 goto normal_reloc;
11005
96c23d59
JM		 11006 case R_ARM_MOVW_ABS_NC:
11007 case R_ARM_MOVT_ABS:
11008 case R_ARM_THM_MOVW_ABS_NC:
11009 case R_ARM_THM_MOVT_ABS:
11010 if (info->shared)
11011 {
11012 (*_bfd_error_handler)
11013 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
11014 abfd, elf32_arm_howto_table_1[r_type].name,
11015 (h) ? h->root.root.string : "a local symbol");
11016 bfd_set_error (bfd_error_bad_value);
11017 return FALSE;
11018 }
11019
11020 /* Fall through. */
39623e12
PB		 11021 case R_ARM_ABS32:
11022 case R_ARM_ABS32_NOI:
11023 case R_ARM_REL32:
11024 case R_ARM_REL32_NOI:
b6895b4f
PB		 11025 case R_ARM_MOVW_PREL_NC:
11026 case R_ARM_MOVT_PREL:
b6895b4f
PB		 11027 case R_ARM_THM_MOVW_PREL_NC:
11028 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 11029 needs_plt = 0;
11030 normal_reloc:
11031
b7693d02 11032 /* Should the interworking branches be listed here? */
7359ea65 11033 if (h != NULL)
5e681ec4
PB		 11034 {
11035 /* If this reloc is in a read-only section, we might
11036 need a copy reloc. We can't check reliably at this
11037 stage whether the section is read-only, as input
11038 sections have not yet been mapped to output sections.
11039 Tentatively set the flag for now, and correct in
11040 adjust_dynamic_symbol. */
7359ea65 11041 if (!info->shared)
f5385ebf 11042 h->non_got_ref = 1;
7359ea65 11043
5e681ec4 11044 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 11045 refers to is in a different object. We can't tell for
11046 sure yet, because something later might force the
11047 symbol local. */
39623e12 11048 if (needs_plt)
f5385ebf 11049 h->needs_plt = 1;
4f199be3
DJ		 11050
11051 /* If we create a PLT entry, this relocation will reference
11052 it, even if it's an ABS32 relocation. */
11053 h->plt.refcount += 1;
b7693d02 11054
bd97cb95
DJ		 11055 /* It's too early to use htab->use_blx here, so we have to
11056 record possible blx references separately from
11057 relocs that definitely need a thumb stub. */
11058
c19d1205 11059 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 11060 eh->plt_maybe_thumb_refcount += 1;
11061
11062 if (r_type == R_ARM_THM_JUMP24
11063 || r_type == R_ARM_THM_JUMP19)
b7693d02 11064 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 11065 }
11066
67687978
PB		 11067 /* If we are creating a shared library or relocatable executable,
11068 and this is a reloc against a global symbol, or a non PC
11069 relative reloc against a local symbol, then we need to copy
11070 the reloc into the shared library. However, if we are linking
11071 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 11072 global symbol which is defined in an object we are
11073 including in the link (i.e., DEF_REGULAR is set). At
11074 this point we have not seen all the input files, so it is
11075 possible that DEF_REGULAR is not set now but will be set
11076 later (it is never cleared). We account for that
11077 possibility below by storing information in the
5e681ec4 11078 relocs_copied field of the hash table entry. */
67687978 11079 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 11080 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 11081 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 11082 || (h != NULL && ! h->needs_plt
11083 && (! info->symbolic || ! h->def_regular))))
252b5132 11084 {
5e681ec4
PB		 11085 struct elf32_arm_relocs_copied *p, **head;
11086
252b5132
RH		 11087 /* When creating a shared object, we must copy these
11088 reloc types into the output file. We create a reloc
11089 section in dynobj and make room for this reloc. */
83bac4b0 11090 if (sreloc == NULL)
252b5132 11091 {
83bac4b0
NC		 11092 sreloc = _bfd_elf_make_dynamic_reloc_section
11093 (sec, dynobj, 2, abfd, ! htab->use_rel);
252b5132 11094
83bac4b0 11095 if (sreloc == NULL)
b34976b6 11096 return FALSE;
252b5132 11097
83bac4b0 11098 /* BPABI objects never have dynamic relocations mapped. */
a89e6478 11099 if (htab->symbian_p)
252b5132 11100 {
83bac4b0 11101 flagword flags;
5e681ec4 11102
83bac4b0 11103 flags = bfd_get_section_flags (dynobj, sreloc);
a89e6478 11104 flags &= ~(SEC_LOAD | SEC_ALLOC);
83bac4b0
NC		 11105 bfd_set_section_flags (dynobj, sreloc, flags);
11106 }
252b5132
RH		 11107 }
11108
5e681ec4
PB		 11109 /* If this is a global symbol, we count the number of
11110 relocations we need for this symbol. */
11111 if (h != NULL)
252b5132 11112 {
5e681ec4
PB		 11113 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
11114 }
11115 else
11116 {
11117 /* Track dynamic relocs needed for local syms too.
11118 We really need local syms available to do this
11119 easily. Oh well. */
5e681ec4 11120 asection *s;
6edfbbad 11121 void *vpp;
87d72d41 11122 Elf_Internal_Sym *isym;
6edfbbad 11123
87d72d41
AM		 11124 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
11125 abfd, r_symndx);
11126 if (isym == NULL)
5e681ec4 11127 return FALSE;
57e8b36a 11128
87d72d41
AM		 11129 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
11130 if (s == NULL)
11131 s = sec;
11132
6edfbbad
DJ		 11133 vpp = &elf_section_data (s)->local_dynrel;
11134 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 11135 }
57e8b36a 11136
5e681ec4
PB		 11137 p = *head;
11138 if (p == NULL || p->section != sec)
11139 {
11140 bfd_size_type amt = sizeof *p;
57e8b36a 11141
21d799b5
NC		 11142 p = (struct elf32_arm_relocs_copied *)
11143 bfd_alloc (htab->root.dynobj, amt);
252b5132 11144 if (p == NULL)
5e681ec4
PB		 11145 return FALSE;
11146 p->next = *head;
11147 *head = p;
11148 p->section = sec;
11149 p->count = 0;
ba93b8ac 11150 p->pc_count = 0;
252b5132 11151 }
57e8b36a 11152
bb224fc3 11153 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 11154 p->pc_count += 1;
71a976dd 11155 p->count += 1;
252b5132
RH		 11156 }
11157 break;
11158
11159 /* This relocation describes the C++ object vtable hierarchy.
11160 Reconstruct it for later use during GC. */
11161 case R_ARM_GNU_VTINHERIT:
c152c796 11162 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 11163 return FALSE;
252b5132 11164 break;
9a5aca8c 11165
252b5132
RH		 11166 /* This relocation describes which C++ vtable entries are actually
11167 used. Record for later use during GC. */
11168 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 11169 BFD_ASSERT (h != NULL);
11170 if (h != NULL
11171 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 11172 return FALSE;
252b5132
RH		 11173 break;
11174 }
11175 }
f21f3fe0 11176
b34976b6 11177 return TRUE;
252b5132
RH		 11178}
11179
6a5bb875
PB		 11180/* Unwinding tables are not referenced directly. This pass marks them as
11181 required if the corresponding code section is marked. */
11182
11183static bfd_boolean
906e58ca
NC		 11184elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
11185 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 11186{
11187 bfd *sub;
11188 Elf_Internal_Shdr **elf_shdrp;
11189 bfd_boolean again;
11190
11191 /* Marking EH data may cause additional code sections to be marked,
11192 requiring multiple passes. */
11193 again = TRUE;
11194 while (again)
11195 {
11196 again = FALSE;
11197 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
11198 {
11199 asection *o;
11200
0ffa91dd 11201 if (! is_arm_elf (sub))
6a5bb875
PB		 11202 continue;
11203
11204 elf_shdrp = elf_elfsections (sub);
11205 for (o = sub->sections; o != NULL; o = o->next)
11206 {
11207 Elf_Internal_Shdr *hdr;
0ffa91dd 11208
6a5bb875 11209 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 11210 if (hdr->sh_type == SHT_ARM_EXIDX
11211 && hdr->sh_link
11212 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 11213 && !o->gc_mark
11214 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
11215 {
11216 again = TRUE;
11217 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
11218 return FALSE;
11219 }
11220 }
11221 }
11222 }
11223
11224 return TRUE;
11225}
11226
3c9458e9
NC		 11227/* Treat mapping symbols as special target symbols. */
11228
11229static bfd_boolean
11230elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
11231{
b0796911
PB		 11232 return bfd_is_arm_special_symbol_name (sym->name,
11233 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 11234}
11235
0367ecfb
NC		 11236/* This is a copy of elf_find_function() from elf.c except that
11237 ARM mapping symbols are ignored when looking for function names
11238 and STT_ARM_TFUNC is considered to a function type. */
252b5132 11239
0367ecfb
NC		 11240static bfd_boolean
11241arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
11242 asection * section,
11243 asymbol ** symbols,
11244 bfd_vma offset,
11245 const char ** filename_ptr,
11246 const char ** functionname_ptr)
11247{
11248 const char * filename = NULL;
11249 asymbol * func = NULL;
11250 bfd_vma low_func = 0;
11251 asymbol ** p;
252b5132
RH		 11252
11253 for (p = symbols; *p != NULL; p++)
11254 {
11255 elf_symbol_type *q;
11256
11257 q = (elf_symbol_type *) *p;
11258
252b5132
RH		 11259 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
11260 {
11261 default:
11262 break;
11263 case STT_FILE:
11264 filename = bfd_asymbol_name (&q->symbol);
11265 break;
252b5132
RH		 11266 case STT_FUNC:
11267 case STT_ARM_TFUNC:
9d2da7ca 11268 case STT_NOTYPE:
b0796911 11269 /* Skip mapping symbols. */
0367ecfb 11270 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 11271 && bfd_is_arm_special_symbol_name (q->symbol.name,
11272 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 11273 continue;
11274 /* Fall through. */
6b40fcba 11275 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 11276 && q->symbol.value >= low_func
11277 && q->symbol.value <= offset)
11278 {
11279 func = (asymbol *) q;
11280 low_func = q->symbol.value;
11281 }
11282 break;
11283 }
11284 }
11285
11286 if (func == NULL)
b34976b6 11287 return FALSE;
252b5132 11288
0367ecfb
NC		 11289 if (filename_ptr)
11290 *filename_ptr = filename;
11291 if (functionname_ptr)
11292 *functionname_ptr = bfd_asymbol_name (func);
11293
11294 return TRUE;
906e58ca 11295}
0367ecfb
NC		 11296
11297
11298/* Find the nearest line to a particular section and offset, for error
11299 reporting. This code is a duplicate of the code in elf.c, except
11300 that it uses arm_elf_find_function. */
11301
11302static bfd_boolean
11303elf32_arm_find_nearest_line (bfd * abfd,
11304 asection * section,
11305 asymbol ** symbols,
11306 bfd_vma offset,
11307 const char ** filename_ptr,
11308 const char ** functionname_ptr,
11309 unsigned int * line_ptr)
11310{
11311 bfd_boolean found = FALSE;
11312
11313 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
11314
11315 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
11316 filename_ptr, functionname_ptr,
11317 line_ptr, 0,
11318 & elf_tdata (abfd)->dwarf2_find_line_info))
11319 {
11320 if (!*functionname_ptr)
11321 arm_elf_find_function (abfd, section, symbols, offset,
11322 *filename_ptr ? NULL : filename_ptr,
11323 functionname_ptr);
f21f3fe0 11324
0367ecfb
NC		 11325 return TRUE;
11326 }
11327
11328 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
11329 & found, filename_ptr,
11330 functionname_ptr, line_ptr,
11331 & elf_tdata (abfd)->line_info))
11332 return FALSE;
11333
11334 if (found && (*functionname_ptr || *line_ptr))
11335 return TRUE;
11336
11337 if (symbols == NULL)
11338 return FALSE;
11339
11340 if (! arm_elf_find_function (abfd, section, symbols, offset,
11341 filename_ptr, functionname_ptr))
11342 return FALSE;
11343
11344 *line_ptr = 0;
b34976b6 11345 return TRUE;
252b5132
RH		 11346}
11347
4ab527b0
FF		 11348static bfd_boolean
11349elf32_arm_find_inliner_info (bfd * abfd,
11350 const char ** filename_ptr,
11351 const char ** functionname_ptr,
11352 unsigned int * line_ptr)
11353{
11354 bfd_boolean found;
11355 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
11356 functionname_ptr, line_ptr,
11357 & elf_tdata (abfd)->dwarf2_find_line_info);
11358 return found;
11359}
11360
252b5132
RH		 11361/* Adjust a symbol defined by a dynamic object and referenced by a
11362 regular object. The current definition is in some section of the
11363 dynamic object, but we're not including those sections. We have to
11364 change the definition to something the rest of the link can
11365 understand. */
11366
b34976b6 11367static bfd_boolean
57e8b36a
NC		 11368elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
11369 struct elf_link_hash_entry * h)
252b5132
RH		 11370{
11371 bfd * dynobj;
11372 asection * s;
b7693d02 11373 struct elf32_arm_link_hash_entry * eh;
67687978 11374 struct elf32_arm_link_hash_table *globals;
252b5132 11375
67687978 11376 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11377 if (globals == NULL)
11378 return FALSE;
11379
252b5132
RH		 11380 dynobj = elf_hash_table (info)->dynobj;
11381
11382 /* Make sure we know what is going on here. */
11383 BFD_ASSERT (dynobj != NULL
f5385ebf 11384 && (h->needs_plt
f6e332e6 11385 || h->u.weakdef != NULL
f5385ebf
AM		 11386 || (h->def_dynamic
11387 && h->ref_regular
11388 && !h->def_regular)));
252b5132 11389
b7693d02
DJ		 11390 eh = (struct elf32_arm_link_hash_entry *) h;
11391
252b5132
RH		 11392 /* If this is a function, put it in the procedure linkage table. We
11393 will fill in the contents of the procedure linkage table later,
11394 when we know the address of the .got section. */
0f88be7a 11395 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 11396 || h->needs_plt)
252b5132 11397 {
5e681ec4
PB		 11398 if (h->plt.refcount <= 0
11399 || SYMBOL_CALLS_LOCAL (info, h)
11400 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
11401 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 11402 {
11403 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 11404 file, but the symbol was never referred to by a dynamic
11405 object, or if all references were garbage collected. In
11406 such a case, we don't actually need to build a procedure
11407 linkage table, and we can just do a PC24 reloc instead. */
11408 h->plt.offset = (bfd_vma) -1;
b7693d02 11409 eh->plt_thumb_refcount = 0;
bd97cb95 11410 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 11411 h->needs_plt = 0;
252b5132
RH		 11412 }
11413
b34976b6 11414 return TRUE;
252b5132 11415 }
5e681ec4 11416 else
b7693d02
DJ		 11417 {
11418 /* It's possible that we incorrectly decided a .plt reloc was
11419 needed for an R_ARM_PC24 or similar reloc to a non-function sym
11420 in check_relocs. We can't decide accurately between function
11421 and non-function syms in check-relocs; Objects loaded later in
11422 the link may change h->type. So fix it now. */
11423 h->plt.offset = (bfd_vma) -1;
11424 eh->plt_thumb_refcount = 0;
bd97cb95 11425 eh->plt_maybe_thumb_refcount = 0;
b7693d02 11426 }
252b5132
RH		 11427
11428 /* If this is a weak symbol, and there is a real definition, the
11429 processor independent code will have arranged for us to see the
11430 real definition first, and we can just use the same value. */
f6e332e6 11431 if (h->u.weakdef != NULL)
252b5132 11432 {
f6e332e6
AM		 11433 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
11434 || h->u.weakdef->root.type == bfd_link_hash_defweak);
11435 h->root.u.def.section = h->u.weakdef->root.u.def.section;
11436 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 11437 return TRUE;
252b5132
RH		 11438 }
11439
ba93b8ac
DJ		 11440 /* If there are no non-GOT references, we do not need a copy
11441 relocation. */
11442 if (!h->non_got_ref)
11443 return TRUE;
11444
252b5132
RH		 11445 /* This is a reference to a symbol defined by a dynamic object which
11446 is not a function. */
11447
11448 /* If we are creating a shared library, we must presume that the
11449 only references to the symbol are via the global offset table.
11450 For such cases we need not do anything here; the relocations will
67687978
PB		 11451 be handled correctly by relocate_section. Relocatable executables
11452 can reference data in shared objects directly, so we don't need to
11453 do anything here. */
11454 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 11455 return TRUE;
252b5132 11456
909272ee
AM		 11457 if (h->size == 0)
11458 {
11459 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
11460 h->root.root.string);
11461 return TRUE;
11462 }
11463
252b5132
RH		 11464 /* We must allocate the symbol in our .dynbss section, which will
11465 become part of the .bss section of the executable. There will be
11466 an entry for this symbol in the .dynsym section. The dynamic
11467 object will contain position independent code, so all references
11468 from the dynamic object to this symbol will go through the global
11469 offset table. The dynamic linker will use the .dynsym entry to
11470 determine the address it must put in the global offset table, so
11471 both the dynamic object and the regular object will refer to the
11472 same memory location for the variable. */
252b5132
RH		 11473 s = bfd_get_section_by_name (dynobj, ".dynbss");
11474 BFD_ASSERT (s != NULL);
11475
11476 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
11477 copy the initial value out of the dynamic object and into the
11478 runtime process image. We need to remember the offset into the
00a97672 11479 .rel(a).bss section we are going to use. */
252b5132
RH		 11480 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
11481 {
11482 asection *srel;
11483
00a97672 11484 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 11485 BFD_ASSERT (srel != NULL);
00a97672 11486 srel->size += RELOC_SIZE (globals);
f5385ebf 11487 h->needs_copy = 1;
252b5132
RH		 11488 }
11489
027297b7 11490 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 11491}
11492
5e681ec4
PB		 11493/* Allocate space in .plt, .got and associated reloc sections for
11494 dynamic relocs. */
11495
11496static bfd_boolean
57e8b36a 11497allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 11498{
11499 struct bfd_link_info *info;
11500 struct elf32_arm_link_hash_table *htab;
11501 struct elf32_arm_link_hash_entry *eh;
11502 struct elf32_arm_relocs_copied *p;
bd97cb95 11503 bfd_signed_vma thumb_refs;
5e681ec4 11504
b7693d02
DJ		 11505 eh = (struct elf32_arm_link_hash_entry *) h;
11506
5e681ec4
PB		 11507 if (h->root.type == bfd_link_hash_indirect)
11508 return TRUE;
11509
11510 if (h->root.type == bfd_link_hash_warning)
11511 /* When warning symbols are created, they **replace** the "real"
11512 entry in the hash table, thus we never get to see the real
11513 symbol in a hash traversal. So look at it now. */
11514 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11515
11516 info = (struct bfd_link_info *) inf;
11517 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11518 if (htab == NULL)
11519 return FALSE;
5e681ec4
PB		 11520
11521 if (htab->root.dynamic_sections_created
11522 && h->plt.refcount > 0)
11523 {
11524 /* Make sure this symbol is output as a dynamic symbol.
11525 Undefined weak syms won't yet be marked as dynamic. */
11526 if (h->dynindx == -1
f5385ebf 11527 && !h->forced_local)
5e681ec4 11528 {
c152c796 11529 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11530 return FALSE;
11531 }
11532
11533 if (info->shared
7359ea65 11534 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 11535 {
11536 asection *s = htab->splt;
11537
11538 /* If this is the first .plt entry, make room for the special
11539 first entry. */
eea6121a 11540 if (s->size == 0)
e5a52504 11541 s->size += htab->plt_header_size;
5e681ec4 11542
eea6121a 11543 h->plt.offset = s->size;
5e681ec4 11544
b7693d02
DJ		 11545 /* If we will insert a Thumb trampoline before this PLT, leave room
11546 for it. */
bd97cb95
DJ		 11547 thumb_refs = eh->plt_thumb_refcount;
11548 if (!htab->use_blx)
11549 thumb_refs += eh->plt_maybe_thumb_refcount;
11550
11551 if (thumb_refs > 0)
b7693d02
DJ		 11552 {
11553 h->plt.offset += PLT_THUMB_STUB_SIZE;
11554 s->size += PLT_THUMB_STUB_SIZE;
11555 }
11556
5e681ec4
PB		 11557 /* If this symbol is not defined in a regular file, and we are
11558 not generating a shared library, then set the symbol to this
11559 location in the .plt. This is required to make function
11560 pointers compare as equal between the normal executable and
11561 the shared library. */
11562 if (! info->shared
f5385ebf 11563 && !h->def_regular)
5e681ec4
PB		 11564 {
11565 h->root.u.def.section = s;
11566 h->root.u.def.value = h->plt.offset;
5e681ec4 11567
67d74e43
DJ		 11568 /* Make sure the function is not marked as Thumb, in case
11569 it is the target of an ABS32 relocation, which will
11570 point to the PLT entry. */
11571 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
11572 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11573 }
022f8312 11574
5e681ec4 11575 /* Make room for this entry. */
e5a52504 11576 s->size += htab->plt_entry_size;
5e681ec4 11577
e5a52504 11578 if (!htab->symbian_p)
b7693d02
DJ		 11579 {
11580 /* We also need to make an entry in the .got.plt section, which
11581 will be placed in the .got section by the linker script. */
11582 eh->plt_got_offset = htab->sgotplt->size;
11583 htab->sgotplt->size += 4;
11584 }
5e681ec4 11585
00a97672
RS		 11586 /* We also need to make an entry in the .rel(a).plt section. */
11587 htab->srelplt->size += RELOC_SIZE (htab);
11588
11589 /* VxWorks executables have a second set of relocations for
11590 each PLT entry. They go in a separate relocation section,
11591 which is processed by the kernel loader. */
11592 if (htab->vxworks_p && !info->shared)
11593 {
11594 /* There is a relocation for the initial PLT entry:
11595 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
11596 if (h->plt.offset == htab->plt_header_size)
11597 htab->srelplt2->size += RELOC_SIZE (htab);
11598
11599 /* There are two extra relocations for each subsequent
11600 PLT entry: an R_ARM_32 relocation for the GOT entry,
11601 and an R_ARM_32 relocation for the PLT entry. */
11602 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
11603 }
5e681ec4
PB		 11604 }
11605 else
11606 {
11607 h->plt.offset = (bfd_vma) -1;
f5385ebf 11608 h->needs_plt = 0;
5e681ec4
PB		 11609 }
11610 }
11611 else
11612 {
11613 h->plt.offset = (bfd_vma) -1;
f5385ebf 11614 h->needs_plt = 0;
5e681ec4
PB		 11615 }
11616
11617 if (h->got.refcount > 0)
11618 {
11619 asection *s;
11620 bfd_boolean dyn;
ba93b8ac
DJ		 11621 int tls_type = elf32_arm_hash_entry (h)->tls_type;
11622 int indx;
5e681ec4
PB		 11623
11624 /* Make sure this symbol is output as a dynamic symbol.
11625 Undefined weak syms won't yet be marked as dynamic. */
11626 if (h->dynindx == -1
f5385ebf 11627 && !h->forced_local)
5e681ec4 11628 {
c152c796 11629 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11630 return FALSE;
11631 }
11632
e5a52504
MM		 11633 if (!htab->symbian_p)
11634 {
11635 s = htab->sgot;
11636 h->got.offset = s->size;
ba93b8ac
DJ		 11637
11638 if (tls_type == GOT_UNKNOWN)
11639 abort ();
11640
11641 if (tls_type == GOT_NORMAL)
11642 /* Non-TLS symbols need one GOT slot. */
11643 s->size += 4;
11644 else
11645 {
11646 if (tls_type & GOT_TLS_GD)
11647 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
11648 s->size += 8;
11649 if (tls_type & GOT_TLS_IE)
11650 /* R_ARM_TLS_IE32 needs one GOT slot. */
11651 s->size += 4;
11652 }
11653
e5a52504 11654 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 11655
11656 indx = 0;
11657 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
11658 && (!info->shared
11659 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11660 indx = h->dynindx;
11661
11662 if (tls_type != GOT_NORMAL
11663 && (info->shared || indx != 0)
11664 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11665 || h->root.type != bfd_link_hash_undefweak))
11666 {
11667 if (tls_type & GOT_TLS_IE)
00a97672 11668 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11669
11670 if (tls_type & GOT_TLS_GD)
00a97672 11671 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11672
11673 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 11674 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11675 }
11676 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11677 || h->root.type != bfd_link_hash_undefweak)
11678 && (info->shared
11679 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 11680 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 11681 }
5e681ec4
PB		 11682 }
11683 else
11684 h->got.offset = (bfd_vma) -1;
11685
a4fd1a8e
PB		 11686 /* Allocate stubs for exported Thumb functions on v4t. */
11687 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 11688 && h->def_regular
a4fd1a8e
PB		 11689 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
11690 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
11691 {
11692 struct elf_link_hash_entry * th;
11693 struct bfd_link_hash_entry * bh;
11694 struct elf_link_hash_entry * myh;
11695 char name[1024];
11696 asection *s;
11697 bh = NULL;
11698 /* Create a new symbol to regist the real location of the function. */
11699 s = h->root.u.def.section;
906e58ca 11700 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 11701 _bfd_generic_link_add_one_symbol (info, s->owner,
11702 name, BSF_GLOBAL, s,
11703 h->root.u.def.value,
11704 NULL, TRUE, FALSE, &bh);
11705
11706 myh = (struct elf_link_hash_entry *) bh;
11707 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
11708 myh->forced_local = 1;
11709 eh->export_glue = myh;
11710 th = record_arm_to_thumb_glue (info, h);
11711 /* Point the symbol at the stub. */
11712 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
11713 h->root.u.def.section = th->root.u.def.section;
11714 h->root.u.def.value = th->root.u.def.value & ~1;
11715 }
11716
5e681ec4
PB		 11717 if (eh->relocs_copied == NULL)
11718 return TRUE;
11719
11720 /* In the shared -Bsymbolic case, discard space allocated for
11721 dynamic pc-relative relocs against symbols which turn out to be
11722 defined in regular objects. For the normal shared case, discard
11723 space for pc-relative relocs that have become local due to symbol
11724 visibility changes. */
11725
67687978 11726 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 11727 {
7bdca076 11728 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 11729 R_ARM_REL32_NOI, which will appear on something like
11730 ".long foo - .". We want calls to protected symbols to resolve
11731 directly to the function rather than going via the plt. If people
11732 want function pointer comparisons to work as expected then they
11733 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 11734 if (SYMBOL_CALLS_LOCAL (info, h))
11735 {
11736 struct elf32_arm_relocs_copied **pp;
11737
11738 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11739 {
11740 p->count -= p->pc_count;
11741 p->pc_count = 0;
11742 if (p->count == 0)
11743 *pp = p->next;
11744 else
11745 pp = &p->next;
11746 }
11747 }
11748
4dfe6ac6 11749 if (htab->vxworks_p)
3348747a
NS		 11750 {
11751 struct elf32_arm_relocs_copied **pp;
11752
11753 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
11754 {
11755 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
11756 *pp = p->next;
11757 else
11758 pp = &p->next;
11759 }
11760 }
11761
ba93b8ac 11762 /* Also discard relocs on undefined weak syms with non-default
7359ea65 11763 visibility. */
22d606e9 11764 if (eh->relocs_copied != NULL
5e681ec4 11765 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 11766 {
11767 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
11768 eh->relocs_copied = NULL;
11769
11770 /* Make sure undefined weak symbols are output as a dynamic
11771 symbol in PIEs. */
11772 else if (h->dynindx == -1
11773 && !h->forced_local)
11774 {
11775 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11776 return FALSE;
11777 }
11778 }
11779
67687978
PB		 11780 else if (htab->root.is_relocatable_executable && h->dynindx == -1
11781 && h->root.type == bfd_link_hash_new)
11782 {
11783 /* Output absolute symbols so that we can create relocations
11784 against them. For normal symbols we output a relocation
11785 against the section that contains them. */
11786 if (! bfd_elf_link_record_dynamic_symbol (info, h))
11787 return FALSE;
11788 }
11789
5e681ec4
PB		 11790 }
11791 else
11792 {
11793 /* For the non-shared case, discard space for relocs against
11794 symbols which turn out to need copy relocs or are not
11795 dynamic. */
11796
f5385ebf
AM		 11797 if (!h->non_got_ref
11798 && ((h->def_dynamic
11799 && !h->def_regular)
5e681ec4
PB		 11800 || (htab->root.dynamic_sections_created
11801 && (h->root.type == bfd_link_hash_undefweak
11802 || h->root.type == bfd_link_hash_undefined))))
11803 {
11804 /* Make sure this symbol is output as a dynamic symbol.
11805 Undefined weak syms won't yet be marked as dynamic. */
11806 if (h->dynindx == -1
f5385ebf 11807 && !h->forced_local)
5e681ec4 11808 {
c152c796 11809 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 11810 return FALSE;
11811 }
11812
11813 /* If that succeeded, we know we'll be keeping all the
11814 relocs. */
11815 if (h->dynindx != -1)
11816 goto keep;
11817 }
11818
11819 eh->relocs_copied = NULL;
11820
11821 keep: ;
11822 }
11823
11824 /* Finally, allocate space. */
11825 for (p = eh->relocs_copied; p != NULL; p = p->next)
11826 {
11827 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 11828 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11829 }
11830
11831 return TRUE;
11832}
11833
08d1f311
DJ		 11834/* Find any dynamic relocs that apply to read-only sections. */
11835
11836static bfd_boolean
8029a119 11837elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 11838{
8029a119
NC		 11839 struct elf32_arm_link_hash_entry * eh;
11840 struct elf32_arm_relocs_copied * p;
08d1f311
DJ		 11841
11842 if (h->root.type == bfd_link_hash_warning)
11843 h = (struct elf_link_hash_entry *) h->root.u.i.link;
11844
11845 eh = (struct elf32_arm_link_hash_entry *) h;
11846 for (p = eh->relocs_copied; p != NULL; p = p->next)
11847 {
11848 asection *s = p->section;
11849
11850 if (s != NULL && (s->flags & SEC_READONLY) != 0)
11851 {
11852 struct bfd_link_info *info = (struct bfd_link_info *) inf;
11853
11854 info->flags |= DF_TEXTREL;
11855
11856 /* Not an error, just cut short the traversal. */
11857 return FALSE;
11858 }
11859 }
11860 return TRUE;
11861}
11862
d504ffc8
DJ		 11863void
11864bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
11865 int byteswap_code)
11866{
11867 struct elf32_arm_link_hash_table *globals;
11868
11869 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11870 if (globals == NULL)
11871 return;
11872
d504ffc8
DJ		 11873 globals->byteswap_code = byteswap_code;
11874}
11875
252b5132
RH		 11876/* Set the sizes of the dynamic sections. */
11877
b34976b6 11878static bfd_boolean
57e8b36a
NC		 11879elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
11880 struct bfd_link_info * info)
252b5132
RH		 11881{
11882 bfd * dynobj;
11883 asection * s;
b34976b6
AM		 11884 bfd_boolean plt;
11885 bfd_boolean relocs;
5e681ec4
PB		 11886 bfd *ibfd;
11887 struct elf32_arm_link_hash_table *htab;
252b5132 11888
5e681ec4 11889 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 11890 if (htab == NULL)
11891 return FALSE;
11892
252b5132
RH		 11893 dynobj = elf_hash_table (info)->dynobj;
11894 BFD_ASSERT (dynobj != NULL);
39b41c9c 11895 check_use_blx (htab);
252b5132
RH		 11896
11897 if (elf_hash_table (info)->dynamic_sections_created)
11898 {
11899 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 11900 if (info->executable)
252b5132
RH		 11901 {
11902 s = bfd_get_section_by_name (dynobj, ".interp");
11903 BFD_ASSERT (s != NULL);
eea6121a 11904 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 11905 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
11906 }
11907 }
5e681ec4
PB		 11908
11909 /* Set up .got offsets for local syms, and space for local dynamic
11910 relocs. */
11911 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 11912 {
5e681ec4
PB		 11913 bfd_signed_vma *local_got;
11914 bfd_signed_vma *end_local_got;
11915 char *local_tls_type;
11916 bfd_size_type locsymcount;
11917 Elf_Internal_Shdr *symtab_hdr;
11918 asection *srel;
4dfe6ac6 11919 bfd_boolean is_vxworks = htab->vxworks_p;
5e681ec4 11920
0ffa91dd 11921 if (! is_arm_elf (ibfd))
5e681ec4
PB		 11922 continue;
11923
11924 for (s = ibfd->sections; s != NULL; s = s->next)
11925 {
11926 struct elf32_arm_relocs_copied *p;
11927
21d799b5
NC		 11928 for (p = (struct elf32_arm_relocs_copied *)
11929 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 11930 {
11931 if (!bfd_is_abs_section (p->section)
11932 && bfd_is_abs_section (p->section->output_section))
11933 {
11934 /* Input section has been discarded, either because
11935 it is a copy of a linkonce section or due to
11936 linker script /DISCARD/, so we'll be discarding
11937 the relocs too. */
11938 }
3348747a
NS		 11939 else if (is_vxworks
11940 && strcmp (p->section->output_section->name,
11941 ".tls_vars") == 0)
11942 {
11943 /* Relocations in vxworks .tls_vars sections are
11944 handled specially by the loader. */
11945 }
5e681ec4
PB		 11946 else if (p->count != 0)
11947 {
11948 srel = elf_section_data (p->section)->sreloc;
00a97672 11949 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 11950 if ((p->section->output_section->flags & SEC_READONLY) != 0)
11951 info->flags |= DF_TEXTREL;
11952 }
11953 }
11954 }
11955
11956 local_got = elf_local_got_refcounts (ibfd);
11957 if (!local_got)
11958 continue;
11959
0ffa91dd 11960 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 11961 locsymcount = symtab_hdr->sh_info;
11962 end_local_got = local_got + locsymcount;
ba93b8ac 11963 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 11964 s = htab->sgot;
11965 srel = htab->srelgot;
11966 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
11967 {
11968 if (*local_got > 0)
11969 {
eea6121a 11970 *local_got = s->size;
ba93b8ac
DJ		 11971 if (*local_tls_type & GOT_TLS_GD)
11972 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11973 s->size += 8;
11974 if (*local_tls_type & GOT_TLS_IE)
11975 s->size += 4;
11976 if (*local_tls_type == GOT_NORMAL)
11977 s->size += 4;
11978
11979 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 11980 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 11981 }
11982 else
11983 *local_got = (bfd_vma) -1;
11984 }
252b5132
RH		 11985 }
11986
ba93b8ac
DJ		 11987 if (htab->tls_ldm_got.refcount > 0)
11988 {
11989 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11990 for R_ARM_TLS_LDM32 relocations. */
11991 htab->tls_ldm_got.offset = htab->sgot->size;
11992 htab->sgot->size += 8;
11993 if (info->shared)
00a97672 11994 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 11995 }
11996 else
11997 htab->tls_ldm_got.offset = -1;
11998
5e681ec4
PB		 11999 /* Allocate global sym .plt and .got entries, and space for global
12000 sym dynamic relocs. */
57e8b36a 12001 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 12002
d504ffc8
DJ		 12003 /* Here we rummage through the found bfds to collect glue information. */
12004 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 12005 {
0ffa91dd 12006 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 12007 continue;
12008
c7b8f16e
JB		 12009 /* Initialise mapping tables for code/data. */
12010 bfd_elf32_arm_init_maps (ibfd);
906e58ca 12011
c7b8f16e
JB		 12012 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
12013 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
12014 /* xgettext:c-format */
12015 _bfd_error_handler (_("Errors encountered processing file %s"),
12016 ibfd->filename);
12017 }
d504ffc8 12018
3e6b1042
DJ		 12019 /* Allocate space for the glue sections now that we've sized them. */
12020 bfd_elf32_arm_allocate_interworking_sections (info);
12021
252b5132
RH		 12022 /* The check_relocs and adjust_dynamic_symbol entry points have
12023 determined the sizes of the various dynamic sections. Allocate
12024 memory for them. */
b34976b6
AM		 12025 plt = FALSE;
12026 relocs = FALSE;
252b5132
RH		 12027 for (s = dynobj->sections; s != NULL; s = s->next)
12028 {
12029 const char * name;
252b5132
RH		 12030
12031 if ((s->flags & SEC_LINKER_CREATED) == 0)
12032 continue;
12033
12034 /* It's OK to base decisions on the section name, because none
12035 of the dynobj section names depend upon the input files. */
12036 name = bfd_get_section_name (dynobj, s);
12037
24a1ba0f 12038 if (strcmp (name, ".plt") == 0)
252b5132 12039 {
c456f082
AM		 12040 /* Remember whether there is a PLT. */
12041 plt = s->size != 0;
252b5132 12042 }
0112cd26 12043 else if (CONST_STRNEQ (name, ".rel"))
252b5132 12044 {
c456f082 12045 if (s->size != 0)
252b5132 12046 {
252b5132 12047 /* Remember whether there are any reloc sections other
00a97672
RS		 12048 than .rel(a).plt and .rela.plt.unloaded. */
12049 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 12050 relocs = TRUE;
252b5132
RH		 12051
12052 /* We use the reloc_count field as a counter if we need
12053 to copy relocs into the output file. */
12054 s->reloc_count = 0;
12055 }
12056 }
0112cd26 12057 else if (! CONST_STRNEQ (name, ".got")
c456f082 12058 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 12059 {
12060 /* It's not one of our sections, so don't allocate space. */
12061 continue;
12062 }
12063
c456f082 12064 if (s->size == 0)
252b5132 12065 {
c456f082 12066 /* If we don't need this section, strip it from the
00a97672
RS		 12067 output file. This is mostly to handle .rel(a).bss and
12068 .rel(a).plt. We must create both sections in
c456f082
AM		 12069 create_dynamic_sections, because they must be created
12070 before the linker maps input sections to output
12071 sections. The linker does that before
12072 adjust_dynamic_symbol is called, and it is that
12073 function which decides whether anything needs to go
12074 into these sections. */
8423293d 12075 s->flags |= SEC_EXCLUDE;
252b5132
RH		 12076 continue;
12077 }
12078
c456f082
AM		 12079 if ((s->flags & SEC_HAS_CONTENTS) == 0)
12080 continue;
12081
252b5132 12082 /* Allocate memory for the section contents. */
21d799b5 12083 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 12084 if (s->contents == NULL)
b34976b6 12085 return FALSE;
252b5132
RH		 12086 }
12087
12088 if (elf_hash_table (info)->dynamic_sections_created)
12089 {
12090 /* Add some entries to the .dynamic section. We fill in the
12091 values later, in elf32_arm_finish_dynamic_sections, but we
12092 must add the entries now so that we get the correct size for
12093 the .dynamic section. The DT_DEBUG entry is filled in by the
12094 dynamic linker and used by the debugger. */
dc810e39 12095#define add_dynamic_entry(TAG, VAL) \
5a580b3a 12096 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 12097
8532796c 12098 if (info->executable)
252b5132 12099 {
dc810e39 12100 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 12101 return FALSE;
252b5132
RH		 12102 }
12103
12104 if (plt)
12105 {
dc810e39
AM		 12106 if ( !add_dynamic_entry (DT_PLTGOT, 0)
12107 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 12108 || !add_dynamic_entry (DT_PLTREL,
12109 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 12110 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 12111 return FALSE;
252b5132
RH		 12112 }
12113
12114 if (relocs)
12115 {
00a97672
RS		 12116 if (htab->use_rel)
12117 {
12118 if (!add_dynamic_entry (DT_REL, 0)
12119 || !add_dynamic_entry (DT_RELSZ, 0)
12120 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
12121 return FALSE;
12122 }
12123 else
12124 {
12125 if (!add_dynamic_entry (DT_RELA, 0)
12126 || !add_dynamic_entry (DT_RELASZ, 0)
12127 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
12128 return FALSE;
12129 }
252b5132
RH		 12130 }
12131
08d1f311
DJ		 12132 /* If any dynamic relocs apply to a read-only section,
12133 then we need a DT_TEXTREL entry. */
12134 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 12135 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
12136 info);
08d1f311 12137
99e4ae17 12138 if ((info->flags & DF_TEXTREL) != 0)
252b5132 12139 {
dc810e39 12140 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 12141 return FALSE;
252b5132 12142 }
7a2b07ff
NS		 12143 if (htab->vxworks_p
12144 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
12145 return FALSE;
252b5132 12146 }
8532796c 12147#undef add_dynamic_entry
252b5132 12148
b34976b6 12149 return TRUE;
252b5132
RH		 12150}
12151
252b5132
RH		 12152/* Finish up dynamic symbol handling. We set the contents of various
12153 dynamic sections here. */
12154
b34976b6 12155static bfd_boolean
906e58ca
NC		 12156elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
12157 struct bfd_link_info * info,
12158 struct elf_link_hash_entry * h,
12159 Elf_Internal_Sym * sym)
252b5132
RH		 12160{
12161 bfd * dynobj;
e5a52504 12162 struct elf32_arm_link_hash_table *htab;
b7693d02 12163 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 12164
12165 dynobj = elf_hash_table (info)->dynobj;
e5a52504 12166 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12167 if (htab == NULL)
12168 return FALSE;
12169
b7693d02 12170 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 12171
12172 if (h->plt.offset != (bfd_vma) -1)
12173 {
12174 asection * splt;
252b5132 12175 asection * srel;
e5a52504 12176 bfd_byte *loc;
24a1ba0f 12177 bfd_vma plt_index;
947216bf 12178 Elf_Internal_Rela rel;
252b5132
RH		 12179
12180 /* This symbol has an entry in the procedure linkage table. Set
12181 it up. */
12182
12183 BFD_ASSERT (h->dynindx != -1);
12184
12185 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 12186 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 12187 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 12188
e5a52504
MM		 12189 /* Fill in the entry in the procedure linkage table. */
12190 if (htab->symbian_p)
12191 {
906e58ca 12192 put_arm_insn (htab, output_bfd,
52ab56c2
PB		 12193 elf32_arm_symbian_plt_entry[0],
12194 splt->contents + h->plt.offset);
906e58ca 12195 bfd_put_32 (output_bfd,
52ab56c2
PB		 12196 elf32_arm_symbian_plt_entry[1],
12197 splt->contents + h->plt.offset + 4);
906e58ca 12198
e5a52504 12199 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 12200 rel.r_offset = (splt->output_section->vma
12201 + splt->output_offset
52ab56c2 12202 + h->plt.offset + 4);
e5a52504 12203 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 12204
12205 /* Get the index in the procedure linkage table which
12206 corresponds to this symbol. This is the index of this symbol
12207 in all the symbols for which we are making plt entries. The
12208 first entry in the procedure linkage table is reserved. */
906e58ca 12209 plt_index = ((h->plt.offset - htab->plt_header_size)
b7693d02 12210 / htab->plt_entry_size);
e5a52504
MM		 12211 }
12212 else
12213 {
00a97672 12214 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 12215 bfd_vma got_displacement;
12216 asection * sgot;
52ab56c2 12217 bfd_byte * ptr;
906e58ca 12218
e5a52504
MM		 12219 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
12220 BFD_ASSERT (sgot != NULL);
12221
b7693d02
DJ		 12222 /* Get the offset into the .got.plt table of the entry that
12223 corresponds to this function. */
12224 got_offset = eh->plt_got_offset;
12225
12226 /* Get the index in the procedure linkage table which
12227 corresponds to this symbol. This is the index of this symbol
12228 in all the symbols for which we are making plt entries. The
12229 first three entries in .got.plt are reserved; after that
12230 symbols appear in the same order as in .plt. */
12231 plt_index = (got_offset - 12) / 4;
e5a52504 12232
00a97672
RS		 12233 /* Calculate the address of the GOT entry. */
12234 got_address = (sgot->output_section->vma
12235 + sgot->output_offset
12236 + got_offset);
5e681ec4 12237
00a97672
RS		 12238 /* ...and the address of the PLT entry. */
12239 plt_address = (splt->output_section->vma
12240 + splt->output_offset
12241 + h->plt.offset);
5e681ec4 12242
52ab56c2 12243 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 12244 if (htab->vxworks_p && info->shared)
12245 {
12246 unsigned int i;
12247 bfd_vma val;
12248
52ab56c2 12249 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12250 {
12251 val = elf32_arm_vxworks_shared_plt_entry[i];
12252 if (i == 2)
12253 val |= got_address - sgot->output_section->vma;
12254 if (i == 5)
12255 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12256 if (i == 2 || i == 5)
12257 bfd_put_32 (output_bfd, val, ptr);
12258 else
12259 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12260 }
12261 }
12262 else if (htab->vxworks_p)
b7693d02 12263 {
00a97672
RS		 12264 unsigned int i;
12265 bfd_vma val;
12266
d3753b85 12267 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 12268 {
12269 val = elf32_arm_vxworks_exec_plt_entry[i];
12270 if (i == 2)
12271 val |= got_address;
12272 if (i == 4)
12273 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
12274 if (i == 5)
12275 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 12276 if (i == 2 || i == 5)
12277 bfd_put_32 (output_bfd, val, ptr);
12278 else
12279 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 12280 }
12281
12282 loc = (htab->srelplt2->contents
12283 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
12284
12285 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
12286 referencing the GOT for this PLT entry. */
12287 rel.r_offset = plt_address + 8;
12288 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12289 rel.r_addend = got_offset;
12290 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
12291 loc += RELOC_SIZE (htab);
12292
12293 /* Create the R_ARM_ABS32 relocation referencing the
12294 beginning of the PLT for this GOT entry. */
12295 rel.r_offset = got_address;
12296 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12297 rel.r_addend = 0;
12298 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 12299 }
00a97672
RS		 12300 else
12301 {
bd97cb95 12302 bfd_signed_vma thumb_refs;
00a97672
RS		 12303 /* Calculate the displacement between the PLT slot and the
12304 entry in the GOT. The eight-byte offset accounts for the
12305 value produced by adding to pc in the first instruction
12306 of the PLT stub. */
12307 got_displacement = got_address - (plt_address + 8);
b7693d02 12308
00a97672
RS		 12309 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
12310
bd97cb95
DJ		 12311 thumb_refs = eh->plt_thumb_refcount;
12312 if (!htab->use_blx)
12313 thumb_refs += eh->plt_maybe_thumb_refcount;
12314
12315 if (thumb_refs > 0)
00a97672 12316 {
52ab56c2
PB		 12317 put_thumb_insn (htab, output_bfd,
12318 elf32_arm_plt_thumb_stub[0], ptr - 4);
12319 put_thumb_insn (htab, output_bfd,
12320 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 12321 }
12322
52ab56c2
PB		 12323 put_arm_insn (htab, output_bfd,
12324 elf32_arm_plt_entry[0]
12325 | ((got_displacement & 0x0ff00000) >> 20),
12326 ptr + 0);
12327 put_arm_insn (htab, output_bfd,
12328 elf32_arm_plt_entry[1]
12329 | ((got_displacement & 0x000ff000) >> 12),
12330 ptr+ 4);
12331 put_arm_insn (htab, output_bfd,
12332 elf32_arm_plt_entry[2]
12333 | (got_displacement & 0x00000fff),
12334 ptr + 8);
5e681ec4 12335#ifdef FOUR_WORD_PLT
52ab56c2 12336 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 12337#endif
00a97672 12338 }
252b5132 12339
e5a52504
MM		 12340 /* Fill in the entry in the global offset table. */
12341 bfd_put_32 (output_bfd,
12342 (splt->output_section->vma
12343 + splt->output_offset),
12344 sgot->contents + got_offset);
906e58ca 12345
00a97672
RS		 12346 /* Fill in the entry in the .rel(a).plt section. */
12347 rel.r_addend = 0;
12348 rel.r_offset = got_address;
e5a52504
MM		 12349 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
12350 }
57e8b36a 12351
00a97672
RS		 12352 loc = srel->contents + plt_index * RELOC_SIZE (htab);
12353 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 12354
f5385ebf 12355 if (!h->def_regular)
252b5132
RH		 12356 {
12357 /* Mark the symbol as undefined, rather than as defined in
12358 the .plt section. Leave the value alone. */
12359 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 12360 /* If the symbol is weak, we do need to clear the value.
12361 Otherwise, the PLT entry would provide a definition for
12362 the symbol even if the symbol wasn't defined anywhere,
12363 and so the symbol would never be NULL. */
f5385ebf 12364 if (!h->ref_regular_nonweak)
d982ba73 12365 sym->st_value = 0;
252b5132
RH		 12366 }
12367 }
12368
ba93b8ac
DJ		 12369 if (h->got.offset != (bfd_vma) -1
12370 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
12371 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 12372 {
12373 asection * sgot;
12374 asection * srel;
947216bf
AM		 12375 Elf_Internal_Rela rel;
12376 bfd_byte *loc;
00a97672 12377 bfd_vma offset;
252b5132
RH		 12378
12379 /* This symbol has an entry in the global offset table. Set it
12380 up. */
252b5132 12381 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 12382 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 12383 BFD_ASSERT (sgot != NULL && srel != NULL);
12384
00a97672
RS		 12385 offset = (h->got.offset & ~(bfd_vma) 1);
12386 rel.r_addend = 0;
252b5132
RH		 12387 rel.r_offset = (sgot->output_section->vma
12388 + sgot->output_offset
00a97672 12389 + offset);
252b5132 12390
5e681ec4
PB		 12391 /* If this is a static link, or it is a -Bsymbolic link and the
12392 symbol is defined locally or was forced to be local because
12393 of a version file, we just want to emit a RELATIVE reloc.
12394 The entry in the global offset table will already have been
12395 initialized in the relocate_section function. */
252b5132 12396 if (info->shared
5e681ec4
PB		 12397 && SYMBOL_REFERENCES_LOCAL (info, h))
12398 {
906e58ca 12399 BFD_ASSERT ((h->got.offset & 1) != 0);
5e681ec4 12400 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 12401 if (!htab->use_rel)
12402 {
12403 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
12404 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
12405 }
5e681ec4 12406 }
252b5132
RH		 12407 else
12408 {
906e58ca 12409 BFD_ASSERT ((h->got.offset & 1) == 0);
00a97672 12410 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 12411 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
12412 }
12413
00a97672
RS		 12414 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
12415 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12416 }
12417
f5385ebf 12418 if (h->needs_copy)
252b5132
RH		 12419 {
12420 asection * s;
947216bf
AM		 12421 Elf_Internal_Rela rel;
12422 bfd_byte *loc;
252b5132
RH		 12423
12424 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 12425 BFD_ASSERT (h->dynindx != -1
12426 && (h->root.type == bfd_link_hash_defined
12427 || h->root.type == bfd_link_hash_defweak));
12428
12429 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 12430 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 12431 BFD_ASSERT (s != NULL);
12432
00a97672 12433 rel.r_addend = 0;
252b5132
RH		 12434 rel.r_offset = (h->root.u.def.value
12435 + h->root.u.def.section->output_section->vma
12436 + h->root.u.def.section->output_offset);
12437 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 12438 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
12439 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 12440 }
12441
00a97672
RS		 12442 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
12443 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
12444 to the ".got" section. */
252b5132 12445 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 12446 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 12447 sym->st_shndx = SHN_ABS;
12448
b34976b6 12449 return TRUE;
252b5132
RH		 12450}
12451
12452/* Finish up the dynamic sections. */
12453
b34976b6 12454static bfd_boolean
57e8b36a 12455elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 12456{
12457 bfd * dynobj;
12458 asection * sgot;
12459 asection * sdyn;
4dfe6ac6
NC		 12460 struct elf32_arm_link_hash_table *htab;
12461
12462 htab = elf32_arm_hash_table (info);
12463 if (htab == NULL)
12464 return FALSE;
252b5132
RH		 12465
12466 dynobj = elf_hash_table (info)->dynobj;
12467
12468 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
4dfe6ac6 12469 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 12470 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
12471
12472 if (elf_hash_table (info)->dynamic_sections_created)
12473 {
12474 asection *splt;
12475 Elf32_External_Dyn *dyncon, *dynconend;
12476
12477 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 12478 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 12479
12480 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 12481 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 12482
252b5132
RH		 12483 for (; dyncon < dynconend; dyncon++)
12484 {
12485 Elf_Internal_Dyn dyn;
12486 const char * name;
12487 asection * s;
12488
12489 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
12490
12491 switch (dyn.d_tag)
12492 {
229fcec5
MM		 12493 unsigned int type;
12494
252b5132 12495 default:
7a2b07ff
NS		 12496 if (htab->vxworks_p
12497 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
12498 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 12499 break;
12500
229fcec5
MM		 12501 case DT_HASH:
12502 name = ".hash";
12503 goto get_vma_if_bpabi;
12504 case DT_STRTAB:
12505 name = ".dynstr";
12506 goto get_vma_if_bpabi;
12507 case DT_SYMTAB:
12508 name = ".dynsym";
12509 goto get_vma_if_bpabi;
c0042f5d
MM		 12510 case DT_VERSYM:
12511 name = ".gnu.version";
12512 goto get_vma_if_bpabi;
12513 case DT_VERDEF:
12514 name = ".gnu.version_d";
12515 goto get_vma_if_bpabi;
12516 case DT_VERNEED:
12517 name = ".gnu.version_r";
12518 goto get_vma_if_bpabi;
12519
252b5132
RH		 12520 case DT_PLTGOT:
12521 name = ".got";
12522 goto get_vma;
12523 case DT_JMPREL:
00a97672 12524 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 12525 get_vma:
12526 s = bfd_get_section_by_name (output_bfd, name);
12527 BFD_ASSERT (s != NULL);
229fcec5
MM		 12528 if (!htab->symbian_p)
12529 dyn.d_un.d_ptr = s->vma;
12530 else
12531 /* In the BPABI, tags in the PT_DYNAMIC section point
12532 at the file offset, not the memory address, for the
12533 convenience of the post linker. */
12534 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 12535 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12536 break;
12537
229fcec5
MM		 12538 get_vma_if_bpabi:
12539 if (htab->symbian_p)
12540 goto get_vma;
12541 break;
12542
252b5132 12543 case DT_PLTRELSZ:
00a97672
RS		 12544 s = bfd_get_section_by_name (output_bfd,
12545 RELOC_SECTION (htab, ".plt"));
252b5132 12546 BFD_ASSERT (s != NULL);
eea6121a 12547 dyn.d_un.d_val = s->size;
252b5132
RH		 12548 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12549 break;
906e58ca 12550
252b5132 12551 case DT_RELSZ:
00a97672 12552 case DT_RELASZ:
229fcec5
MM		 12553 if (!htab->symbian_p)
12554 {
12555 /* My reading of the SVR4 ABI indicates that the
12556 procedure linkage table relocs (DT_JMPREL) should be
12557 included in the overall relocs (DT_REL). This is
12558 what Solaris does. However, UnixWare can not handle
12559 that case. Therefore, we override the DT_RELSZ entry
12560 here to make it not include the JMPREL relocs. Since
00a97672 12561 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 12562 other relocation sections, we don't have to worry
12563 about changing the DT_REL entry. */
00a97672
RS		 12564 s = bfd_get_section_by_name (output_bfd,
12565 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 12566 if (s != NULL)
12567 dyn.d_un.d_val -= s->size;
12568 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12569 break;
12570 }
8029a119 12571 /* Fall through. */
229fcec5
MM		 12572
12573 case DT_REL:
12574 case DT_RELA:
229fcec5
MM		 12575 /* In the BPABI, the DT_REL tag must point at the file
12576 offset, not the VMA, of the first relocation
12577 section. So, we use code similar to that in
12578 elflink.c, but do not check for SHF_ALLOC on the
12579 relcoation section, since relocations sections are
12580 never allocated under the BPABI. The comments above
12581 about Unixware notwithstanding, we include all of the
12582 relocations here. */
12583 if (htab->symbian_p)
12584 {
12585 unsigned int i;
12586 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
12587 ? SHT_REL : SHT_RELA);
12588 dyn.d_un.d_val = 0;
12589 for (i = 1; i < elf_numsections (output_bfd); i++)
12590 {
906e58ca 12591 Elf_Internal_Shdr *hdr
229fcec5
MM		 12592 = elf_elfsections (output_bfd)[i];
12593 if (hdr->sh_type == type)
12594 {
906e58ca 12595 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 12596 || dyn.d_tag == DT_RELASZ)
12597 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 12598 else if ((ufile_ptr) hdr->sh_offset
12599 <= dyn.d_un.d_val - 1)
229fcec5
MM		 12600 dyn.d_un.d_val = hdr->sh_offset;
12601 }
12602 }
12603 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
12604 }
252b5132 12605 break;
88f7bcd5
NC		 12606
12607 /* Set the bottom bit of DT_INIT/FINI if the
12608 corresponding function is Thumb. */
12609 case DT_INIT:
12610 name = info->init_function;
12611 goto get_sym;
12612 case DT_FINI:
12613 name = info->fini_function;
12614 get_sym:
12615 /* If it wasn't set by elf_bfd_final_link
4cc11e76 12616 then there is nothing to adjust. */
88f7bcd5
NC		 12617 if (dyn.d_un.d_val != 0)
12618 {
12619 struct elf_link_hash_entry * eh;
12620
12621 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 12622 FALSE, FALSE, TRUE);
906e58ca 12623 if (eh != NULL
88f7bcd5
NC		 12624 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
12625 {
12626 dyn.d_un.d_val |= 1;
b34976b6 12627 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 12628 }
12629 }
12630 break;
252b5132
RH		 12631 }
12632 }
12633
24a1ba0f 12634 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 12635 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 12636 {
00a97672
RS		 12637 const bfd_vma *plt0_entry;
12638 bfd_vma got_address, plt_address, got_displacement;
12639
12640 /* Calculate the addresses of the GOT and PLT. */
12641 got_address = sgot->output_section->vma + sgot->output_offset;
12642 plt_address = splt->output_section->vma + splt->output_offset;
12643
12644 if (htab->vxworks_p)
12645 {
12646 /* The VxWorks GOT is relocated by the dynamic linker.
12647 Therefore, we must emit relocations rather than simply
12648 computing the values now. */
12649 Elf_Internal_Rela rel;
12650
12651 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 12652 put_arm_insn (htab, output_bfd, plt0_entry[0],
12653 splt->contents + 0);
12654 put_arm_insn (htab, output_bfd, plt0_entry[1],
12655 splt->contents + 4);
12656 put_arm_insn (htab, output_bfd, plt0_entry[2],
12657 splt->contents + 8);
00a97672
RS		 12658 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
12659
8029a119 12660 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 12661 rel.r_offset = plt_address + 12;
12662 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12663 rel.r_addend = 0;
12664 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
12665 htab->srelplt2->contents);
12666 }
12667 else
12668 {
12669 got_displacement = got_address - (plt_address + 16);
12670
12671 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 12672 put_arm_insn (htab, output_bfd, plt0_entry[0],
12673 splt->contents + 0);
12674 put_arm_insn (htab, output_bfd, plt0_entry[1],
12675 splt->contents + 4);
12676 put_arm_insn (htab, output_bfd, plt0_entry[2],
12677 splt->contents + 8);
12678 put_arm_insn (htab, output_bfd, plt0_entry[3],
12679 splt->contents + 12);
5e681ec4 12680
5e681ec4 12681#ifdef FOUR_WORD_PLT
00a97672
RS		 12682 /* The displacement value goes in the otherwise-unused
12683 last word of the second entry. */
12684 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 12685#else
00a97672 12686 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 12687#endif
00a97672 12688 }
f7a74f8c 12689 }
252b5132
RH		 12690
12691 /* UnixWare sets the entsize of .plt to 4, although that doesn't
12692 really seem like the right value. */
74541ad4
AM		 12693 if (splt->output_section->owner == output_bfd)
12694 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 12695
12696 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
12697 {
12698 /* Correct the .rel(a).plt.unloaded relocations. They will have
12699 incorrect symbol indexes. */
12700 int num_plts;
eed62c48 12701 unsigned char *p;
00a97672
RS		 12702
12703 num_plts = ((htab->splt->size - htab->plt_header_size)
12704 / htab->plt_entry_size);
12705 p = htab->srelplt2->contents + RELOC_SIZE (htab);
12706
12707 for (; num_plts; num_plts--)
12708 {
12709 Elf_Internal_Rela rel;
12710
12711 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12712 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
12713 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12714 p += RELOC_SIZE (htab);
12715
12716 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
12717 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
12718 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
12719 p += RELOC_SIZE (htab);
12720 }
12721 }
252b5132
RH		 12722 }
12723
12724 /* Fill in the first three entries in the global offset table. */
229fcec5 12725 if (sgot)
252b5132 12726 {
229fcec5
MM		 12727 if (sgot->size > 0)
12728 {
12729 if (sdyn == NULL)
12730 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
12731 else
12732 bfd_put_32 (output_bfd,
12733 sdyn->output_section->vma + sdyn->output_offset,
12734 sgot->contents);
12735 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
12736 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
12737 }
252b5132 12738
229fcec5
MM		 12739 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
12740 }
252b5132 12741
b34976b6 12742 return TRUE;
252b5132
RH		 12743}
12744
ba96a88f 12745static void
57e8b36a 12746elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 12747{
9b485d32 12748 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 12749 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 12750
12751 i_ehdrp = elf_elfheader (abfd);
12752
94a3258f
PB		 12753 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
12754 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
12755 else
12756 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 12757 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 12758
93204d3a
PB		 12759 if (link_info)
12760 {
12761 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 12762 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 12763 i_ehdrp->e_flags |= EF_ARM_BE8;
12764 }
ba96a88f
NC		 12765}
12766
99e4ae17 12767static enum elf_reloc_type_class
57e8b36a 12768elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 12769{
f51e552e 12770 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 12771 {
12772 case R_ARM_RELATIVE:
12773 return reloc_class_relative;
12774 case R_ARM_JUMP_SLOT:
12775 return reloc_class_plt;
12776 case R_ARM_COPY:
12777 return reloc_class_copy;
12778 default:
12779 return reloc_class_normal;
12780 }
12781}
12782
e16bb312
NC		 12783/* Set the right machine number for an Arm ELF file. */
12784
12785static bfd_boolean
57e8b36a 12786elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 12787{
12788 if (hdr->sh_type == SHT_NOTE)
12789 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
12790
12791 return TRUE;
12792}
12793
e489d0ae 12794static void
57e8b36a 12795elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 12796{
5a6c6817 12797 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 12798}
12799
40a18ebd
NC		 12800/* Return TRUE if this is an unwinding table entry. */
12801
12802static bfd_boolean
12803is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
12804{
0112cd26
NC		 12805 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
12806 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 12807}
12808
12809
12810/* Set the type and flags for an ARM section. We do this by
12811 the section name, which is a hack, but ought to work. */
12812
12813static bfd_boolean
12814elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
12815{
12816 const char * name;
12817
12818 name = bfd_get_section_name (abfd, sec);
12819
12820 if (is_arm_elf_unwind_section_name (abfd, name))
12821 {
12822 hdr->sh_type = SHT_ARM_EXIDX;
12823 hdr->sh_flags |= SHF_LINK_ORDER;
12824 }
12825 return TRUE;
12826}
12827
6dc132d9
L		 12828/* Handle an ARM specific section when reading an object file. This is
12829 called when bfd_section_from_shdr finds a section with an unknown
12830 type. */
40a18ebd
NC		 12831
12832static bfd_boolean
12833elf32_arm_section_from_shdr (bfd *abfd,
12834 Elf_Internal_Shdr * hdr,
6dc132d9
L		 12835 const char *name,
12836 int shindex)
40a18ebd
NC		 12837{
12838 /* There ought to be a place to keep ELF backend specific flags, but
12839 at the moment there isn't one. We just keep track of the
12840 sections by their name, instead. Fortunately, the ABI gives
12841 names for all the ARM specific sections, so we will probably get
12842 away with this. */
12843 switch (hdr->sh_type)
12844 {
12845 case SHT_ARM_EXIDX:
0951f019
RE		 12846 case SHT_ARM_PREEMPTMAP:
12847 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 12848 break;
12849
12850 default:
12851 return FALSE;
12852 }
12853
6dc132d9 12854 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 12855 return FALSE;
12856
12857 return TRUE;
12858}
e489d0ae 12859
44444f50
NC		 12860static _arm_elf_section_data *
12861get_arm_elf_section_data (asection * sec)
12862{
47b2e99c
JZ		 12863 if (sec && sec->owner && is_arm_elf (sec->owner))
12864 return elf32_arm_section_data (sec);
44444f50
NC		 12865 else
12866 return NULL;
8e3de13a
NC		 12867}
12868
4e617b1e
PB		 12869typedef struct
12870{
12871 void *finfo;
12872 struct bfd_link_info *info;
91a5743d
PB		 12873 asection *sec;
12874 int sec_shndx;
6e0b88f1
AM		 12875 int (*func) (void *, const char *, Elf_Internal_Sym *,
12876 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 12877} output_arch_syminfo;
12878
12879enum map_symbol_type
12880{
12881 ARM_MAP_ARM,
12882 ARM_MAP_THUMB,
12883 ARM_MAP_DATA
12884};
12885
12886
7413f23f 12887/* Output a single mapping symbol. */
4e617b1e
PB		 12888
12889static bfd_boolean
7413f23f
DJ		 12890elf32_arm_output_map_sym (output_arch_syminfo *osi,
12891 enum map_symbol_type type,
12892 bfd_vma offset)
4e617b1e
PB		 12893{
12894 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 12895 Elf_Internal_Sym sym;
12896
91a5743d
PB		 12897 sym.st_value = osi->sec->output_section->vma
12898 + osi->sec->output_offset
12899 + offset;
4e617b1e
PB		 12900 sym.st_size = 0;
12901 sym.st_other = 0;
12902 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 12903 sym.st_shndx = osi->sec_shndx;
fe33d2fa 12904 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
6e0b88f1 12905 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 12906}
12907
12908
12909/* Output mapping symbols for PLT entries associated with H. */
12910
12911static bfd_boolean
12912elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
12913{
12914 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
12915 struct elf32_arm_link_hash_table *htab;
12916 struct elf32_arm_link_hash_entry *eh;
12917 bfd_vma addr;
12918
4e617b1e
PB		 12919 if (h->root.type == bfd_link_hash_indirect)
12920 return TRUE;
12921
12922 if (h->root.type == bfd_link_hash_warning)
12923 /* When warning symbols are created, they **replace** the "real"
12924 entry in the hash table, thus we never get to see the real
12925 symbol in a hash traversal. So look at it now. */
12926 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12927
12928 if (h->plt.offset == (bfd_vma) -1)
12929 return TRUE;
12930
4dfe6ac6
NC		 12931 htab = elf32_arm_hash_table (osi->info);
12932 if (htab == NULL)
12933 return FALSE;
12934
4e617b1e
PB		 12935 eh = (struct elf32_arm_link_hash_entry *) h;
12936 addr = h->plt.offset;
12937 if (htab->symbian_p)
12938 {
7413f23f 12939 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12940 return FALSE;
7413f23f 12941 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 12942 return FALSE;
12943 }
12944 else if (htab->vxworks_p)
12945 {
7413f23f 12946 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12947 return FALSE;
7413f23f 12948 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 12949 return FALSE;
7413f23f 12950 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 12951 return FALSE;
7413f23f 12952 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 12953 return FALSE;
12954 }
12955 else
12956 {
bd97cb95
DJ		 12957 bfd_signed_vma thumb_refs;
12958
12959 thumb_refs = eh->plt_thumb_refcount;
12960 if (!htab->use_blx)
12961 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 12962
bd97cb95 12963 if (thumb_refs > 0)
4e617b1e 12964 {
7413f23f 12965 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 12966 return FALSE;
12967 }
12968#ifdef FOUR_WORD_PLT
7413f23f 12969 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 12970 return FALSE;
7413f23f 12971 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 12972 return FALSE;
12973#else
906e58ca 12974 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 12975 so only need to output a mapping symbol for the first PLT entry and
12976 entries with thumb thunks. */
bd97cb95 12977 if (thumb_refs > 0 || addr == 20)
4e617b1e 12978 {
7413f23f 12979 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 12980 return FALSE;
12981 }
12982#endif
12983 }
12984
12985 return TRUE;
12986}
12987
7413f23f
DJ		 12988/* Output a single local symbol for a generated stub. */
12989
12990static bfd_boolean
12991elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
12992 bfd_vma offset, bfd_vma size)
12993{
7413f23f
DJ		 12994 Elf_Internal_Sym sym;
12995
7413f23f
DJ		 12996 sym.st_value = osi->sec->output_section->vma
12997 + osi->sec->output_offset
12998 + offset;
12999 sym.st_size = size;
13000 sym.st_other = 0;
13001 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13002 sym.st_shndx = osi->sec_shndx;
6e0b88f1 13003 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 13004}
4e617b1e 13005
da5938a2 13006static bfd_boolean
8029a119
NC		 13007arm_map_one_stub (struct bfd_hash_entry * gen_entry,
13008 void * in_arg)
da5938a2
NC		 13009{
13010 struct elf32_arm_stub_hash_entry *stub_entry;
13011 struct bfd_link_info *info;
da5938a2
NC		 13012 asection *stub_sec;
13013 bfd_vma addr;
7413f23f 13014 char *stub_name;
9a008db3 13015 output_arch_syminfo *osi;
d3ce72d0 13016 const insn_sequence *template_sequence;
461a49ca
DJ		 13017 enum stub_insn_type prev_type;
13018 int size;
13019 int i;
13020 enum map_symbol_type sym_type;
da5938a2
NC		 13021
13022 /* Massage our args to the form they really have. */
13023 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 13024 osi = (output_arch_syminfo *) in_arg;
da5938a2 13025
da5938a2
NC		 13026 info = osi->info;
13027
da5938a2
NC		 13028 stub_sec = stub_entry->stub_sec;
13029
13030 /* Ensure this stub is attached to the current section being
7413f23f 13031 processed. */
da5938a2
NC		 13032 if (stub_sec != osi->sec)
13033 return TRUE;
13034
7413f23f
DJ		 13035 addr = (bfd_vma) stub_entry->stub_offset;
13036 stub_name = stub_entry->output_name;
da5938a2 13037
d3ce72d0
NC		 13038 template_sequence = stub_entry->stub_template;
13039 switch (template_sequence[0].type)
7413f23f 13040 {
461a49ca
DJ		 13041 case ARM_TYPE:
13042 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 13043 return FALSE;
13044 break;
461a49ca 13045 case THUMB16_TYPE:
48229727 13046 case THUMB32_TYPE:
461a49ca
DJ		 13047 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
13048 stub_entry->stub_size))
da5938a2
NC		 13049 return FALSE;
13050 break;
13051 default:
13052 BFD_FAIL ();
48229727 13053 return 0;
7413f23f 13054 }
da5938a2 13055
461a49ca
DJ		 13056 prev_type = DATA_TYPE;
13057 size = 0;
13058 for (i = 0; i < stub_entry->stub_template_size; i++)
13059 {
d3ce72d0 13060 switch (template_sequence[i].type)
461a49ca
DJ		 13061 {
13062 case ARM_TYPE:
13063 sym_type = ARM_MAP_ARM;
13064 break;
13065
13066 case THUMB16_TYPE:
48229727 13067 case THUMB32_TYPE:
461a49ca
DJ		 13068 sym_type = ARM_MAP_THUMB;
13069 break;
13070
13071 case DATA_TYPE:
13072 sym_type = ARM_MAP_DATA;
13073 break;
13074
13075 default:
13076 BFD_FAIL ();
4e31c731 13077 return FALSE;
461a49ca
DJ		 13078 }
13079
d3ce72d0 13080 if (template_sequence[i].type != prev_type)
461a49ca 13081 {
d3ce72d0 13082 prev_type = template_sequence[i].type;
461a49ca
DJ		 13083 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
13084 return FALSE;
13085 }
13086
d3ce72d0 13087 switch (template_sequence[i].type)
461a49ca
DJ		 13088 {
13089 case ARM_TYPE:
48229727 13090 case THUMB32_TYPE:
461a49ca
DJ		 13091 size += 4;
13092 break;
13093
13094 case THUMB16_TYPE:
13095 size += 2;
13096 break;
13097
13098 case DATA_TYPE:
13099 size += 4;
13100 break;
13101
13102 default:
13103 BFD_FAIL ();
4e31c731 13104 return FALSE;
461a49ca
DJ		 13105 }
13106 }
13107
da5938a2
NC		 13108 return TRUE;
13109}
13110
33811162
DG		 13111/* Output mapping symbols for linker generated sections,
13112 and for those data-only sections that do not have a
13113 $d. */
4e617b1e
PB		 13114
13115static bfd_boolean
13116elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca
NC		 13117 struct bfd_link_info *info,
13118 void *finfo,
6e0b88f1
AM		 13119 int (*func) (void *, const char *,
13120 Elf_Internal_Sym *,
13121 asection *,
13122 struct elf_link_hash_entry *))
4e617b1e
PB		 13123{
13124 output_arch_syminfo osi;
13125 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 13126 bfd_vma offset;
13127 bfd_size_type size;
33811162 13128 bfd *input_bfd;
4e617b1e
PB		 13129
13130 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13131 if (htab == NULL)
13132 return FALSE;
13133
906e58ca 13134 check_use_blx (htab);
91a5743d 13135
4e617b1e
PB		 13136 osi.finfo = finfo;
13137 osi.info = info;
13138 osi.func = func;
906e58ca 13139
33811162
DG		 13140 /* Add a $d mapping symbol to data-only sections that
13141 don't have any mapping symbol. This may result in (harmless) redundant
13142 mapping symbols. */
13143 for (input_bfd = info->input_bfds;
13144 input_bfd != NULL;
13145 input_bfd = input_bfd->link_next)
13146 {
13147 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
13148 for (osi.sec = input_bfd->sections;
13149 osi.sec != NULL;
13150 osi.sec = osi.sec->next)
13151 {
13152 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 13153 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
13154 != 0)
33811162
DG		 13155 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
13156 == SEC_HAS_CONTENTS
13157 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0
DJ		 13158 && get_arm_elf_section_data (osi.sec)->mapcount == 0
13159 && osi.sec->size > 0)
33811162
DG		 13160 {
13161 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13162 (output_bfd, osi.sec->output_section);
13163 if (osi.sec_shndx != (int)SHN_BAD)
13164 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
13165 }
13166 }
13167 }
13168
91a5743d
PB		 13169 /* ARM->Thumb glue. */
13170 if (htab->arm_glue_size > 0)
13171 {
13172 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13173 ARM2THUMB_GLUE_SECTION_NAME);
13174
13175 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13176 (output_bfd, osi.sec->output_section);
13177 if (info->shared || htab->root.is_relocatable_executable
13178 || htab->pic_veneer)
13179 size = ARM2THUMB_PIC_GLUE_SIZE;
13180 else if (htab->use_blx)
13181 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
13182 else
13183 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 13184
91a5743d
PB		 13185 for (offset = 0; offset < htab->arm_glue_size; offset += size)
13186 {
7413f23f
DJ		 13187 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
13188 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 13189 }
13190 }
13191
13192 /* Thumb->ARM glue. */
13193 if (htab->thumb_glue_size > 0)
13194 {
13195 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13196 THUMB2ARM_GLUE_SECTION_NAME);
13197
13198 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13199 (output_bfd, osi.sec->output_section);
13200 size = THUMB2ARM_GLUE_SIZE;
13201
13202 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
13203 {
7413f23f
DJ		 13204 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
13205 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 13206 }
13207 }
13208
845b51d6
PB		 13209 /* ARMv4 BX veneers. */
13210 if (htab->bx_glue_size > 0)
13211 {
13212 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
13213 ARM_BX_GLUE_SECTION_NAME);
13214
13215 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13216 (output_bfd, osi.sec->output_section);
13217
7413f23f 13218 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 13219 }
13220
8029a119
NC		 13221 /* Long calls stubs. */
13222 if (htab->stub_bfd && htab->stub_bfd->sections)
13223 {
da5938a2 13224 asection* stub_sec;
8029a119 13225
da5938a2
NC		 13226 for (stub_sec = htab->stub_bfd->sections;
13227 stub_sec != NULL;
8029a119
NC		 13228 stub_sec = stub_sec->next)
13229 {
13230 /* Ignore non-stub sections. */
13231 if (!strstr (stub_sec->name, STUB_SUFFIX))
13232 continue;
da5938a2 13233
8029a119 13234 osi.sec = stub_sec;
da5938a2 13235
8029a119
NC		 13236 osi.sec_shndx = _bfd_elf_section_from_bfd_section
13237 (output_bfd, osi.sec->output_section);
da5938a2 13238
8029a119
NC		 13239 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
13240 }
13241 }
da5938a2 13242
91a5743d
PB		 13243 /* Finally, output mapping symbols for the PLT. */
13244 if (!htab->splt || htab->splt->size == 0)
13245 return TRUE;
13246
13247 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
8029a119 13248 htab->splt->output_section);
91a5743d 13249 osi.sec = htab->splt;
4e617b1e
PB		 13250 /* Output mapping symbols for the plt header. SymbianOS does not have a
13251 plt header. */
13252 if (htab->vxworks_p)
13253 {
13254 /* VxWorks shared libraries have no PLT header. */
13255 if (!info->shared)
13256 {
7413f23f 13257 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 13258 return FALSE;
7413f23f 13259 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
4e617b1e
PB		 13260 return FALSE;
13261 }
13262 }
13263 else if (!htab->symbian_p)
13264 {
7413f23f 13265 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e
PB		 13266 return FALSE;
13267#ifndef FOUR_WORD_PLT
7413f23f 13268 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e
PB		 13269 return FALSE;
13270#endif
13271 }
13272
13273 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
13274 return TRUE;
13275}
13276
e489d0ae
PB		 13277/* Allocate target specific section data. */
13278
13279static bfd_boolean
13280elf32_arm_new_section_hook (bfd *abfd, asection *sec)
13281{
f592407e
AM		 13282 if (!sec->used_by_bfd)
13283 {
13284 _arm_elf_section_data *sdata;
13285 bfd_size_type amt = sizeof (*sdata);
e489d0ae 13286
21d799b5 13287 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 13288 if (sdata == NULL)
13289 return FALSE;
13290 sec->used_by_bfd = sdata;
13291 }
e489d0ae
PB		 13292
13293 return _bfd_elf_new_section_hook (abfd, sec);
13294}
13295
13296
13297/* Used to order a list of mapping symbols by address. */
13298
13299static int
13300elf32_arm_compare_mapping (const void * a, const void * b)
13301{
7f6a71ff
JM		 13302 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
13303 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
13304
13305 if (amap->vma > bmap->vma)
13306 return 1;
13307 else if (amap->vma < bmap->vma)
13308 return -1;
13309 else if (amap->type > bmap->type)
13310 /* Ensure results do not depend on the host qsort for objects with
13311 multiple mapping symbols at the same address by sorting on type
13312 after vma. */
13313 return 1;
13314 else if (amap->type < bmap->type)
13315 return -1;
13316 else
13317 return 0;
e489d0ae
PB		 13318}
13319
2468f9c9
PB		 13320/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
13321
13322static unsigned long
13323offset_prel31 (unsigned long addr, bfd_vma offset)
13324{
13325 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
13326}
13327
13328/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
13329 relocations. */
13330
13331static void
13332copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
13333{
13334 unsigned long first_word = bfd_get_32 (output_bfd, from);
13335 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
13336
13337 /* High bit of first word is supposed to be zero. */
13338 if ((first_word & 0x80000000ul) == 0)
13339 first_word = offset_prel31 (first_word, offset);
13340
13341 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
13342 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
13343 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
13344 second_word = offset_prel31 (second_word, offset);
13345
13346 bfd_put_32 (output_bfd, first_word, to);
13347 bfd_put_32 (output_bfd, second_word, to + 4);
13348}
e489d0ae 13349
48229727
JB		 13350/* Data for make_branch_to_a8_stub(). */
13351
13352struct a8_branch_to_stub_data {
13353 asection *writing_section;
13354 bfd_byte *contents;
13355};
13356
13357
13358/* Helper to insert branches to Cortex-A8 erratum stubs in the right
13359 places for a particular section. */
13360
13361static bfd_boolean
13362make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
13363 void *in_arg)
13364{
13365 struct elf32_arm_stub_hash_entry *stub_entry;
13366 struct a8_branch_to_stub_data *data;
13367 bfd_byte *contents;
13368 unsigned long branch_insn;
13369 bfd_vma veneered_insn_loc, veneer_entry_loc;
13370 bfd_signed_vma branch_offset;
13371 bfd *abfd;
91d6fa6a 13372 unsigned int target;
48229727
JB		 13373
13374 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
13375 data = (struct a8_branch_to_stub_data *) in_arg;
13376
13377 if (stub_entry->target_section != data->writing_section
13378 || stub_entry->stub_type < arm_stub_a8_veneer_b_cond)
13379 return TRUE;
13380
13381 contents = data->contents;
13382
13383 veneered_insn_loc = stub_entry->target_section->output_section->vma
13384 + stub_entry->target_section->output_offset
13385 + stub_entry->target_value;
13386
13387 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
13388 + stub_entry->stub_sec->output_offset
13389 + stub_entry->stub_offset;
13390
13391 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
13392 veneered_insn_loc &= ~3u;
13393
13394 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
13395
13396 abfd = stub_entry->target_section->owner;
91d6fa6a 13397 target = stub_entry->target_value;
48229727
JB		 13398
13399 /* We attempt to avoid this condition by setting stubs_always_after_branch
13400 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
13401 This check is just to be on the safe side... */
13402 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
13403 {
13404 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
13405 "allocated in unsafe location"), abfd);
13406 return FALSE;
13407 }
13408
13409 switch (stub_entry->stub_type)
13410 {
13411 case arm_stub_a8_veneer_b:
13412 case arm_stub_a8_veneer_b_cond:
13413 branch_insn = 0xf0009000;
13414 goto jump24;
13415
13416 case arm_stub_a8_veneer_blx:
13417 branch_insn = 0xf000e800;
13418 goto jump24;
13419
13420 case arm_stub_a8_veneer_bl:
13421 {
13422 unsigned int i1, j1, i2, j2, s;
13423
13424 branch_insn = 0xf000d000;
13425
13426 jump24:
13427 if (branch_offset < -16777216 || branch_offset > 16777214)
13428 {
13429 /* There's not much we can do apart from complain if this
13430 happens. */
13431 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
13432 "of range (input file too large)"), abfd);
13433 return FALSE;
13434 }
13435
13436 /* i1 = not(j1 eor s), so:
13437 not i1 = j1 eor s
13438 j1 = (not i1) eor s. */
13439
13440 branch_insn |= (branch_offset >> 1) & 0x7ff;
13441 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
13442 i2 = (branch_offset >> 22) & 1;
13443 i1 = (branch_offset >> 23) & 1;
13444 s = (branch_offset >> 24) & 1;
13445 j1 = (!i1) ^ s;
13446 j2 = (!i2) ^ s;
13447 branch_insn |= j2 << 11;
13448 branch_insn |= j1 << 13;
13449 branch_insn |= s << 26;
13450 }
13451 break;
13452
13453 default:
13454 BFD_FAIL ();
13455 return FALSE;
13456 }
13457
91d6fa6a
NC		 13458 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
13459 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 13460
13461 return TRUE;
13462}
13463
e489d0ae
PB		 13464/* Do code byteswapping. Return FALSE afterwards so that the section is
13465 written out as normal. */
13466
13467static bfd_boolean
c7b8f16e 13468elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 13469 struct bfd_link_info *link_info,
13470 asection *sec,
e489d0ae
PB		 13471 bfd_byte *contents)
13472{
48229727 13473 unsigned int mapcount, errcount;
8e3de13a 13474 _arm_elf_section_data *arm_data;
c7b8f16e 13475 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 13476 elf32_arm_section_map *map;
c7b8f16e 13477 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 13478 bfd_vma ptr;
13479 bfd_vma end;
c7b8f16e 13480 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 13481 bfd_byte tmp;
48229727 13482 unsigned int i;
57e8b36a 13483
4dfe6ac6
NC		 13484 if (globals == NULL)
13485 return FALSE;
13486
8e3de13a
NC		 13487 /* If this section has not been allocated an _arm_elf_section_data
13488 structure then we cannot record anything. */
13489 arm_data = get_arm_elf_section_data (sec);
13490 if (arm_data == NULL)
13491 return FALSE;
13492
13493 mapcount = arm_data->mapcount;
13494 map = arm_data->map;
c7b8f16e
JB		 13495 errcount = arm_data->erratumcount;
13496
13497 if (errcount != 0)
13498 {
13499 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
13500
13501 for (errnode = arm_data->erratumlist; errnode != 0;
13502 errnode = errnode->next)
13503 {
91d6fa6a 13504 bfd_vma target = errnode->vma - offset;
c7b8f16e
JB		 13505
13506 switch (errnode->type)
13507 {
13508 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
13509 {
13510 bfd_vma branch_to_veneer;
13511 /* Original condition code of instruction, plus bit mask for
13512 ARM B instruction. */
13513 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
13514 | 0x0a000000;
13515
13516 /* The instruction is before the label. */
91d6fa6a 13517 target -= 4;
c7b8f16e
JB		 13518
13519 /* Above offset included in -4 below. */
13520 branch_to_veneer = errnode->u.b.veneer->vma
13521 - errnode->vma - 4;
13522
13523 if ((signed) branch_to_veneer < -(1 << 25)
13524 || (signed) branch_to_veneer >= (1 << 25))
13525 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13526 "range"), output_bfd);
13527
13528 insn |= (branch_to_veneer >> 2) & 0xffffff;
91d6fa6a
NC		 13529 contents[endianflip ^ target] = insn & 0xff;
13530 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13531 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13532 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13533 }
13534 break;
13535
13536 case VFP11_ERRATUM_ARM_VENEER:
13537 {
13538 bfd_vma branch_from_veneer;
13539 unsigned int insn;
13540
13541 /* Take size of veneer into account. */
13542 branch_from_veneer = errnode->u.v.branch->vma
13543 - errnode->vma - 12;
13544
13545 if ((signed) branch_from_veneer < -(1 << 25)
13546 || (signed) branch_from_veneer >= (1 << 25))
13547 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
13548 "range"), output_bfd);
13549
13550 /* Original instruction. */
13551 insn = errnode->u.v.branch->u.b.vfp_insn;
91d6fa6a
NC		 13552 contents[endianflip ^ target] = insn & 0xff;
13553 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
13554 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
13555 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13556
13557 /* Branch back to insn after original insn. */
13558 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
91d6fa6a
NC		 13559 contents[endianflip ^ (target + 4)] = insn & 0xff;
13560 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
13561 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
13562 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
c7b8f16e
JB		 13563 }
13564 break;
13565
13566 default:
13567 abort ();
13568 }
13569 }
13570 }
e489d0ae 13571
2468f9c9
PB		 13572 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
13573 {
13574 arm_unwind_table_edit *edit_node
13575 = arm_data->u.exidx.unwind_edit_list;
13576 /* Now, sec->size is the size of the section we will write. The original
13577 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
13578 markers) was sec->rawsize. (This isn't the case if we perform no
13579 edits, then rawsize will be zero and we should use size). */
21d799b5 13580 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 13581 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
13582 unsigned int in_index, out_index;
13583 bfd_vma add_to_offsets = 0;
13584
13585 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
13586 {
13587 if (edit_node)
13588 {
13589 unsigned int edit_index = edit_node->index;
13590
13591 if (in_index < edit_index && in_index * 8 < input_size)
13592 {
13593 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13594 contents + in_index * 8, add_to_offsets);
13595 out_index++;
13596 in_index++;
13597 }
13598 else if (in_index == edit_index
13599 || (in_index * 8 >= input_size
13600 && edit_index == UINT_MAX))
13601 {
13602 switch (edit_node->type)
13603 {
13604 case DELETE_EXIDX_ENTRY:
13605 in_index++;
13606 add_to_offsets += 8;
13607 break;
13608
13609 case INSERT_EXIDX_CANTUNWIND_AT_END:
13610 {
13611 asection *text_sec = edit_node->linked_section;
13612 bfd_vma text_offset = text_sec->output_section->vma
13613 + text_sec->output_offset
13614 + text_sec->size;
13615 bfd_vma exidx_offset = offset + out_index * 8;
13616 unsigned long prel31_offset;
13617
13618 /* Note: this is meant to be equivalent to an
13619 R_ARM_PREL31 relocation. These synthetic
13620 EXIDX_CANTUNWIND markers are not relocated by the
13621 usual BFD method. */
13622 prel31_offset = (text_offset - exidx_offset)
13623 & 0x7ffffffful;
13624
13625 /* First address we can't unwind. */
13626 bfd_put_32 (output_bfd, prel31_offset,
13627 &edited_contents[out_index * 8]);
13628
13629 /* Code for EXIDX_CANTUNWIND. */
13630 bfd_put_32 (output_bfd, 0x1,
13631 &edited_contents[out_index * 8 + 4]);
13632
13633 out_index++;
13634 add_to_offsets -= 8;
13635 }
13636 break;
13637 }
13638
13639 edit_node = edit_node->next;
13640 }
13641 }
13642 else
13643 {
13644 /* No more edits, copy remaining entries verbatim. */
13645 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
13646 contents + in_index * 8, add_to_offsets);
13647 out_index++;
13648 in_index++;
13649 }
13650 }
13651
13652 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
13653 bfd_set_section_contents (output_bfd, sec->output_section,
13654 edited_contents,
13655 (file_ptr) sec->output_offset, sec->size);
13656
13657 return TRUE;
13658 }
13659
48229727
JB		 13660 /* Fix code to point to Cortex-A8 erratum stubs. */
13661 if (globals->fix_cortex_a8)
13662 {
13663 struct a8_branch_to_stub_data data;
13664
13665 data.writing_section = sec;
13666 data.contents = contents;
13667
13668 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
13669 &data);
13670 }
13671
e489d0ae
PB		 13672 if (mapcount == 0)
13673 return FALSE;
13674
c7b8f16e 13675 if (globals->byteswap_code)
e489d0ae 13676 {
c7b8f16e 13677 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 13678
c7b8f16e
JB		 13679 ptr = map[0].vma;
13680 for (i = 0; i < mapcount; i++)
13681 {
13682 if (i == mapcount - 1)
13683 end = sec->size;
13684 else
13685 end = map[i + 1].vma;
e489d0ae 13686
c7b8f16e 13687 switch (map[i].type)
e489d0ae 13688 {
c7b8f16e
JB		 13689 case 'a':
13690 /* Byte swap code words. */
13691 while (ptr + 3 < end)
13692 {
13693 tmp = contents[ptr];
13694 contents[ptr] = contents[ptr + 3];
13695 contents[ptr + 3] = tmp;
13696 tmp = contents[ptr + 1];
13697 contents[ptr + 1] = contents[ptr + 2];
13698 contents[ptr + 2] = tmp;
13699 ptr += 4;
13700 }
13701 break;
e489d0ae 13702
c7b8f16e
JB		 13703 case 't':
13704 /* Byte swap code halfwords. */
13705 while (ptr + 1 < end)
13706 {
13707 tmp = contents[ptr];
13708 contents[ptr] = contents[ptr + 1];
13709 contents[ptr + 1] = tmp;
13710 ptr += 2;
13711 }
13712 break;
13713
13714 case 'd':
13715 /* Leave data alone. */
13716 break;
13717 }
13718 ptr = end;
13719 }
e489d0ae 13720 }
8e3de13a 13721
93204d3a 13722 free (map);
47b2e99c 13723 arm_data->mapcount = -1;
c7b8f16e 13724 arm_data->mapsize = 0;
8e3de13a 13725 arm_data->map = NULL;
8e3de13a 13726
e489d0ae
PB		 13727 return FALSE;
13728}
13729
b7693d02
DJ		 13730/* Display STT_ARM_TFUNC symbols as functions. */
13731
13732static void
13733elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
13734 asymbol *asym)
13735{
13736 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
13737
13738 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
13739 elfsym->symbol.flags |= BSF_FUNCTION;
13740}
13741
0beaef2b
PB		 13742
13743/* Mangle thumb function symbols as we read them in. */
13744
8384fb8f 13745static bfd_boolean
0beaef2b
PB		 13746elf32_arm_swap_symbol_in (bfd * abfd,
13747 const void *psrc,
13748 const void *pshn,
13749 Elf_Internal_Sym *dst)
13750{
8384fb8f
AM		 13751 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
13752 return FALSE;
0beaef2b
PB		 13753
13754 /* New EABI objects mark thumb function symbols by setting the low bit of
13755 the address. Turn these into STT_ARM_TFUNC. */
0f88be7a 13756 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC)
0beaef2b
PB		 13757 && (dst->st_value & 1))
13758 {
13759 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
13760 dst->st_value &= ~(bfd_vma) 1;
13761 }
8384fb8f 13762 return TRUE;
0beaef2b
PB		 13763}
13764
13765
13766/* Mangle thumb function symbols as we write them out. */
13767
13768static void
13769elf32_arm_swap_symbol_out (bfd *abfd,
13770 const Elf_Internal_Sym *src,
13771 void *cdst,
13772 void *shndx)
13773{
13774 Elf_Internal_Sym newsym;
13775
13776 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
13777 of the address set, as per the new EABI. We do this unconditionally
13778 because objcopy does not set the elf header flags until after
13779 it writes out the symbol table. */
13780 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
13781 {
13782 newsym = *src;
13783 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 13784 if (newsym.st_shndx != SHN_UNDEF)
13785 {
13786 /* Do this only for defined symbols. At link type, the static
13787 linker will simulate the work of dynamic linker of resolving
13788 symbols and will carry over the thumbness of found symbols to
13789 the output symbol table. It's not clear how it happens, but
b0fead2b 13790 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 13791 runtime, and writing '1' for them will be confusing for users
13792 and possibly for dynamic linker itself.
13793 */
13794 newsym.st_value |= 1;
13795 }
906e58ca 13796
0beaef2b
PB		 13797 src = &newsym;
13798 }
13799 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
13800}
13801
b294bdf8
MM		 13802/* Add the PT_ARM_EXIDX program header. */
13803
13804static bfd_boolean
906e58ca 13805elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 13806 struct bfd_link_info *info ATTRIBUTE_UNUSED)
13807{
13808 struct elf_segment_map *m;
13809 asection *sec;
13810
13811 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13812 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13813 {
13814 /* If there is already a PT_ARM_EXIDX header, then we do not
13815 want to add another one. This situation arises when running
13816 "strip"; the input binary already has the header. */
13817 m = elf_tdata (abfd)->segment_map;
13818 while (m && m->p_type != PT_ARM_EXIDX)
13819 m = m->next;
13820 if (!m)
13821 {
21d799b5
NC		 13822 m = (struct elf_segment_map *)
13823 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 13824 if (m == NULL)
13825 return FALSE;
13826 m->p_type = PT_ARM_EXIDX;
13827 m->count = 1;
13828 m->sections[0] = sec;
13829
13830 m->next = elf_tdata (abfd)->segment_map;
13831 elf_tdata (abfd)->segment_map = m;
13832 }
13833 }
13834
13835 return TRUE;
13836}
13837
13838/* We may add a PT_ARM_EXIDX program header. */
13839
13840static int
a6b96beb
AM		 13841elf32_arm_additional_program_headers (bfd *abfd,
13842 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 13843{
13844 asection *sec;
13845
13846 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
13847 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
13848 return 1;
13849 else
13850 return 0;
13851}
13852
fcb93ecf 13853/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
906e58ca 13854
fcb93ecf
PB		 13855static bfd_boolean
13856elf32_arm_is_function_type (unsigned int type)
13857{
0f88be7a 13858 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
fcb93ecf
PB		 13859}
13860
0beaef2b 13861/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 13862const struct elf_size_info elf32_arm_size_info =
13863{
0beaef2b
PB		 13864 sizeof (Elf32_External_Ehdr),
13865 sizeof (Elf32_External_Phdr),
13866 sizeof (Elf32_External_Shdr),
13867 sizeof (Elf32_External_Rel),
13868 sizeof (Elf32_External_Rela),
13869 sizeof (Elf32_External_Sym),
13870 sizeof (Elf32_External_Dyn),
13871 sizeof (Elf_External_Note),
13872 4,
13873 1,
13874 32, 2,
13875 ELFCLASS32, EV_CURRENT,
13876 bfd_elf32_write_out_phdrs,
13877 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 13878 bfd_elf32_checksum_contents,
0beaef2b
PB		 13879 bfd_elf32_write_relocs,
13880 elf32_arm_swap_symbol_in,
13881 elf32_arm_swap_symbol_out,
13882 bfd_elf32_slurp_reloc_table,
13883 bfd_elf32_slurp_symbol_table,
13884 bfd_elf32_swap_dyn_in,
13885 bfd_elf32_swap_dyn_out,
13886 bfd_elf32_swap_reloc_in,
13887 bfd_elf32_swap_reloc_out,
13888 bfd_elf32_swap_reloca_in,
13889 bfd_elf32_swap_reloca_out
13890};
13891
252b5132
RH		 13892#define ELF_ARCH bfd_arch_arm
13893#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 13894#ifdef __QNXTARGET__
13895#define ELF_MAXPAGESIZE 0x1000
13896#else
f21f3fe0 13897#define ELF_MAXPAGESIZE 0x8000
d0facd1b 13898#endif
b1342370 13899#define ELF_MINPAGESIZE 0x1000
24718e3b 13900#define ELF_COMMONPAGESIZE 0x1000
252b5132 13901
ba93b8ac
DJ		 13902#define bfd_elf32_mkobject elf32_arm_mkobject
13903
99e4ae17
AJ		 13904#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
13905#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 13906#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
13907#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
13908#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
906e58ca 13909#define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
dc810e39 13910#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 13911#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 13912#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 13913#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 13914#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 13915#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 13916#define bfd_elf32_bfd_final_link elf32_arm_final_link
252b5132
RH		 13917
13918#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
13919#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 13920#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 13921#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
13922#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 13923#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 13924#define elf_backend_write_section elf32_arm_write_section
252b5132 13925#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 13926#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 13927#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
13928#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
13929#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 13930#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 13931#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 13932#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 13933#define elf_backend_object_p elf32_arm_object_p
e16bb312 13934#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 13935#define elf_backend_fake_sections elf32_arm_fake_sections
13936#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 13937#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 13938#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 13939#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 13940#define elf_backend_size_info elf32_arm_size_info
b294bdf8 13941#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 13942#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
13943#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
13944#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
13945#define elf_backend_is_function_type elf32_arm_is_function_type
13946
13947#define elf_backend_can_refcount 1
13948#define elf_backend_can_gc_sections 1
13949#define elf_backend_plt_readonly 1
13950#define elf_backend_want_got_plt 1
13951#define elf_backend_want_plt_sym 0
13952#define elf_backend_may_use_rel_p 1
13953#define elf_backend_may_use_rela_p 0
4e7fd91e 13954#define elf_backend_default_use_rela_p 0
252b5132 13955
04f7c78d 13956#define elf_backend_got_header_size 12
04f7c78d 13957
906e58ca
NC		 13958#undef elf_backend_obj_attrs_vendor
13959#define elf_backend_obj_attrs_vendor "aeabi"
13960#undef elf_backend_obj_attrs_section
13961#define elf_backend_obj_attrs_section ".ARM.attributes"
13962#undef elf_backend_obj_attrs_arg_type
13963#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
13964#undef elf_backend_obj_attrs_section_type
104d59d1 13965#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
5aa6ff7c 13966#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
104d59d1 13967
252b5132 13968#include "elf32-target.h"
7f266840 13969
906e58ca 13970/* VxWorks Targets. */
4e7fd91e 13971
906e58ca 13972#undef TARGET_LITTLE_SYM
4e7fd91e 13973#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
906e58ca 13974#undef TARGET_LITTLE_NAME
4e7fd91e 13975#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 13976#undef TARGET_BIG_SYM
4e7fd91e 13977#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
906e58ca 13978#undef TARGET_BIG_NAME
4e7fd91e
PB		 13979#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
13980
13981/* Like elf32_arm_link_hash_table_create -- but overrides
13982 appropriately for VxWorks. */
906e58ca 13983
4e7fd91e
PB		 13984static struct bfd_link_hash_table *
13985elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
13986{
13987 struct bfd_link_hash_table *ret;
13988
13989 ret = elf32_arm_link_hash_table_create (abfd);
13990 if (ret)
13991 {
13992 struct elf32_arm_link_hash_table *htab
00a97672 13993 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 13994 htab->use_rel = 0;
00a97672 13995 htab->vxworks_p = 1;
4e7fd91e
PB		 13996 }
13997 return ret;
906e58ca 13998}
4e7fd91e 13999
00a97672
RS		 14000static void
14001elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
14002{
14003 elf32_arm_final_write_processing (abfd, linker);
14004 elf_vxworks_final_write_processing (abfd, linker);
14005}
14006
906e58ca 14007#undef elf32_bed
4e7fd91e
PB		 14008#define elf32_bed elf32_arm_vxworks_bed
14009
906e58ca
NC		 14010#undef bfd_elf32_bfd_link_hash_table_create
14011#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
14012#undef elf_backend_add_symbol_hook
14013#define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
14014#undef elf_backend_final_write_processing
14015#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
14016#undef elf_backend_emit_relocs
14017#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 14018
906e58ca 14019#undef elf_backend_may_use_rel_p
00a97672 14020#define elf_backend_may_use_rel_p 0
906e58ca 14021#undef elf_backend_may_use_rela_p
00a97672 14022#define elf_backend_may_use_rela_p 1
906e58ca 14023#undef elf_backend_default_use_rela_p
00a97672 14024#define elf_backend_default_use_rela_p 1
906e58ca 14025#undef elf_backend_want_plt_sym
00a97672 14026#define elf_backend_want_plt_sym 1
906e58ca 14027#undef ELF_MAXPAGESIZE
00a97672 14028#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 14029
14030#include "elf32-target.h"
14031
14032
21d799b5
NC		 14033/* Merge backend specific data from an object file to the output
14034 object file when linking. */
14035
14036static bfd_boolean
14037elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
14038{
14039 flagword out_flags;
14040 flagword in_flags;
14041 bfd_boolean flags_compatible = TRUE;
14042 asection *sec;
14043
14044 /* Check if we have the same endianess. */
14045 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
14046 return FALSE;
14047
14048 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
14049 return TRUE;
14050
14051 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
14052 return FALSE;
14053
14054 /* The input BFD must have had its flags initialised. */
14055 /* The following seems bogus to me -- The flags are initialized in
14056 the assembler but I don't think an elf_flags_init field is
14057 written into the object. */
14058 /* BFD_ASSERT (elf_flags_init (ibfd)); */
14059
14060 in_flags = elf_elfheader (ibfd)->e_flags;
14061 out_flags = elf_elfheader (obfd)->e_flags;
14062
14063 /* In theory there is no reason why we couldn't handle this. However
14064 in practice it isn't even close to working and there is no real
14065 reason to want it. */
14066 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
14067 && !(ibfd->flags & DYNAMIC)
14068 && (in_flags & EF_ARM_BE8))
14069 {
14070 _bfd_error_handler (_("error: %B is already in final BE8 format"),
14071 ibfd);
14072 return FALSE;
14073 }
14074
14075 if (!elf_flags_init (obfd))
14076 {
14077 /* If the input is the default architecture and had the default
14078 flags then do not bother setting the flags for the output
14079 architecture, instead allow future merges to do this. If no
14080 future merges ever set these flags then they will retain their
14081 uninitialised values, which surprise surprise, correspond
14082 to the default values. */
14083 if (bfd_get_arch_info (ibfd)->the_default
14084 && elf_elfheader (ibfd)->e_flags == 0)
14085 return TRUE;
14086
14087 elf_flags_init (obfd) = TRUE;
14088 elf_elfheader (obfd)->e_flags = in_flags;
14089
14090 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
14091 && bfd_get_arch_info (obfd)->the_default)
14092 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
14093
14094 return TRUE;
14095 }
14096
14097 /* Determine what should happen if the input ARM architecture
14098 does not match the output ARM architecture. */
14099 if (! bfd_arm_merge_machines (ibfd, obfd))
14100 return FALSE;
14101
14102 /* Identical flags must be compatible. */
14103 if (in_flags == out_flags)
14104 return TRUE;
14105
14106 /* Check to see if the input BFD actually contains any sections. If
14107 not, its flags may not have been initialised either, but it
14108 cannot actually cause any incompatiblity. Do not short-circuit
14109 dynamic objects; their section list may be emptied by
14110 elf_link_add_object_symbols.
14111
14112 Also check to see if there are no code sections in the input.
14113 In this case there is no need to check for code specific flags.
14114 XXX - do we need to worry about floating-point format compatability
14115 in data sections ? */
14116 if (!(ibfd->flags & DYNAMIC))
14117 {
14118 bfd_boolean null_input_bfd = TRUE;
14119 bfd_boolean only_data_sections = TRUE;
14120
14121 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
14122 {
14123 /* Ignore synthetic glue sections. */
14124 if (strcmp (sec->name, ".glue_7")
14125 && strcmp (sec->name, ".glue_7t"))
14126 {
14127 if ((bfd_get_section_flags (ibfd, sec)
14128 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14129 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
14130 only_data_sections = FALSE;
14131
14132 null_input_bfd = FALSE;
14133 break;
14134 }
14135 }
14136
14137 if (null_input_bfd || only_data_sections)
14138 return TRUE;
14139 }
14140
14141 /* Complain about various flag mismatches. */
14142 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
14143 EF_ARM_EABI_VERSION (out_flags)))
14144 {
14145 _bfd_error_handler
14146 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
14147 ibfd, obfd,
14148 (in_flags & EF_ARM_EABIMASK) >> 24,
14149 (out_flags & EF_ARM_EABIMASK) >> 24);
14150 return FALSE;
14151 }
14152
14153 /* Not sure what needs to be checked for EABI versions >= 1. */
14154 /* VxWorks libraries do not use these flags. */
14155 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
14156 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
14157 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
14158 {
14159 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
14160 {
14161 _bfd_error_handler
14162 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
14163 ibfd, obfd,
14164 in_flags & EF_ARM_APCS_26 ? 26 : 32,
14165 out_flags & EF_ARM_APCS_26 ? 26 : 32);
14166 flags_compatible = FALSE;
14167 }
14168
14169 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
14170 {
14171 if (in_flags & EF_ARM_APCS_FLOAT)
14172 _bfd_error_handler
14173 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
14174 ibfd, obfd);
14175 else
14176 _bfd_error_handler
14177 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
14178 ibfd, obfd);
14179
14180 flags_compatible = FALSE;
14181 }
14182
14183 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
14184 {
14185 if (in_flags & EF_ARM_VFP_FLOAT)
14186 _bfd_error_handler
14187 (_("error: %B uses VFP instructions, whereas %B does not"),
14188 ibfd, obfd);
14189 else
14190 _bfd_error_handler
14191 (_("error: %B uses FPA instructions, whereas %B does not"),
14192 ibfd, obfd);
14193
14194 flags_compatible = FALSE;
14195 }
14196
14197 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
14198 {
14199 if (in_flags & EF_ARM_MAVERICK_FLOAT)
14200 _bfd_error_handler
14201 (_("error: %B uses Maverick instructions, whereas %B does not"),
14202 ibfd, obfd);
14203 else
14204 _bfd_error_handler
14205 (_("error: %B does not use Maverick instructions, whereas %B does"),
14206 ibfd, obfd);
14207
14208 flags_compatible = FALSE;
14209 }
14210
14211#ifdef EF_ARM_SOFT_FLOAT
14212 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
14213 {
14214 /* We can allow interworking between code that is VFP format
14215 layout, and uses either soft float or integer regs for
14216 passing floating point arguments and results. We already
14217 know that the APCS_FLOAT flags match; similarly for VFP
14218 flags. */
14219 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
14220 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
14221 {
14222 if (in_flags & EF_ARM_SOFT_FLOAT)
14223 _bfd_error_handler
14224 (_("error: %B uses software FP, whereas %B uses hardware FP"),
14225 ibfd, obfd);
14226 else
14227 _bfd_error_handler
14228 (_("error: %B uses hardware FP, whereas %B uses software FP"),
14229 ibfd, obfd);
14230
14231 flags_compatible = FALSE;
14232 }
14233 }
14234#endif
14235
14236 /* Interworking mismatch is only a warning. */
14237 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
14238 {
14239 if (in_flags & EF_ARM_INTERWORK)
14240 {
14241 _bfd_error_handler
14242 (_("Warning: %B supports interworking, whereas %B does not"),
14243 ibfd, obfd);
14244 }
14245 else
14246 {
14247 _bfd_error_handler
14248 (_("Warning: %B does not support interworking, whereas %B does"),
14249 ibfd, obfd);
14250 }
14251 }
14252 }
14253
14254 return flags_compatible;
14255}
14256
14257
906e58ca 14258/* Symbian OS Targets. */
7f266840 14259
906e58ca 14260#undef TARGET_LITTLE_SYM
7f266840 14261#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
906e58ca 14262#undef TARGET_LITTLE_NAME
7f266840 14263#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 14264#undef TARGET_BIG_SYM
7f266840 14265#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
906e58ca 14266#undef TARGET_BIG_NAME
7f266840
DJ		 14267#define TARGET_BIG_NAME "elf32-bigarm-symbian"
14268
14269/* Like elf32_arm_link_hash_table_create -- but overrides
14270 appropriately for Symbian OS. */
906e58ca 14271
7f266840
DJ		 14272static struct bfd_link_hash_table *
14273elf32_arm_symbian_link_hash_table_create (bfd *abfd)
14274{
14275 struct bfd_link_hash_table *ret;
14276
14277 ret = elf32_arm_link_hash_table_create (abfd);
14278 if (ret)
14279 {
14280 struct elf32_arm_link_hash_table *htab
14281 = (struct elf32_arm_link_hash_table *)ret;
14282 /* There is no PLT header for Symbian OS. */
14283 htab->plt_header_size = 0;
95720a86
DJ		 14284 /* The PLT entries are each one instruction and one word. */
14285 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 14286 htab->symbian_p = 1;
33bfe774
JB		 14287 /* Symbian uses armv5t or above, so use_blx is always true. */
14288 htab->use_blx = 1;
67687978 14289 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 14290 }
14291 return ret;
906e58ca 14292}
7f266840 14293
b35d266b 14294static const struct bfd_elf_special_section
551b43fd 14295elf32_arm_symbian_special_sections[] =
7f266840 14296{
5cd3778d
MM		 14297 /* In a BPABI executable, the dynamic linking sections do not go in
14298 the loadable read-only segment. The post-linker may wish to
14299 refer to these sections, but they are not part of the final
14300 program image. */
0112cd26
NC		 14301 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
14302 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
14303 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
14304 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
14305 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 14306 /* These sections do not need to be writable as the SymbianOS
14307 postlinker will arrange things so that no dynamic relocation is
14308 required. */
0112cd26
NC		 14309 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
14310 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
14311 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
14312 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 14313};
14314
c3c76620 14315static void
906e58ca 14316elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 14317 struct bfd_link_info *link_info)
c3c76620
MM		 14318{
14319 /* BPABI objects are never loaded directly by an OS kernel; they are
14320 processed by a postlinker first, into an OS-specific format. If
14321 the D_PAGED bit is set on the file, BFD will align segments on
14322 page boundaries, so that an OS can directly map the file. With
14323 BPABI objects, that just results in wasted space. In addition,
14324 because we clear the D_PAGED bit, map_sections_to_segments will
14325 recognize that the program headers should not be mapped into any
14326 loadable segment. */
14327 abfd->flags &= ~D_PAGED;
906e58ca 14328 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 14329}
7f266840
DJ		 14330
14331static bfd_boolean
906e58ca 14332elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 14333 struct bfd_link_info *info)
7f266840
DJ		 14334{
14335 struct elf_segment_map *m;
14336 asection *dynsec;
14337
7f266840
DJ		 14338 /* BPABI shared libraries and executables should have a PT_DYNAMIC
14339 segment. However, because the .dynamic section is not marked
14340 with SEC_LOAD, the generic ELF code will not create such a
14341 segment. */
14342 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
14343 if (dynsec)
14344 {
8ded5a0f
AM		 14345 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
14346 if (m->p_type == PT_DYNAMIC)
14347 break;
14348
14349 if (m == NULL)
14350 {
14351 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
14352 m->next = elf_tdata (abfd)->segment_map;
14353 elf_tdata (abfd)->segment_map = m;
14354 }
7f266840
DJ		 14355 }
14356
b294bdf8
MM		 14357 /* Also call the generic arm routine. */
14358 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 14359}
14360
95720a86
DJ		 14361/* Return address for Ith PLT stub in section PLT, for relocation REL
14362 or (bfd_vma) -1 if it should not be included. */
14363
14364static bfd_vma
14365elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
14366 const arelent *rel ATTRIBUTE_UNUSED)
14367{
14368 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
14369}
14370
14371
8029a119 14372#undef elf32_bed
7f266840
DJ		 14373#define elf32_bed elf32_arm_symbian_bed
14374
14375/* The dynamic sections are not allocated on SymbianOS; the postlinker
14376 will process them and then discard them. */
906e58ca 14377#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 14378#define ELF_DYNAMIC_SEC_FLAGS \
14379 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
14380
00a97672 14381#undef elf_backend_add_symbol_hook
00a97672 14382#undef elf_backend_emit_relocs
c3c76620 14383
906e58ca
NC		 14384#undef bfd_elf32_bfd_link_hash_table_create
14385#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
14386#undef elf_backend_special_sections
14387#define elf_backend_special_sections elf32_arm_symbian_special_sections
14388#undef elf_backend_begin_write_processing
14389#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
14390#undef elf_backend_final_write_processing
14391#define elf_backend_final_write_processing elf32_arm_final_write_processing
14392
14393#undef elf_backend_modify_segment_map
7f266840
DJ		 14394#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
14395
14396/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 14397#undef elf_backend_got_header_size
7f266840
DJ		 14398#define elf_backend_got_header_size 0
14399
14400/* Similarly, there is no .got.plt section. */
906e58ca 14401#undef elf_backend_want_got_plt
7f266840
DJ		 14402#define elf_backend_want_got_plt 0
14403
906e58ca 14404#undef elf_backend_plt_sym_val
95720a86
DJ		 14405#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
14406
906e58ca 14407#undef elf_backend_may_use_rel_p
00a97672 14408#define elf_backend_may_use_rel_p 1
906e58ca 14409#undef elf_backend_may_use_rela_p
00a97672 14410#define elf_backend_may_use_rela_p 0
906e58ca 14411#undef elf_backend_default_use_rela_p
00a97672 14412#define elf_backend_default_use_rela_p 0
906e58ca 14413#undef elf_backend_want_plt_sym
00a97672 14414#define elf_backend_want_plt_sym 0
906e58ca 14415#undef ELF_MAXPAGESIZE
00a97672 14416#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 14417
7f266840 14418#include "elf32-target.h"
GDB Binutils - Deliverables
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