Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* 32-bit ELF support for ARM |
e44a2c9c | 2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, |
f6ebfac0 | 3 | 2008, 2009, 2010 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 9 | the Free Software Foundation; either version 3 of the License, or |
252b5132 RH |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
252b5132 | 21 | |
6e6718a3 | 22 | #include "sysdep.h" |
2468f9c9 PB |
23 | #include <limits.h> |
24 | ||
3db64b00 | 25 | #include "bfd.h" |
00a97672 | 26 | #include "libiberty.h" |
7f266840 DJ |
27 | #include "libbfd.h" |
28 | #include "elf-bfd.h" | |
00a97672 | 29 | #include "elf-vxworks.h" |
ee065d83 | 30 | #include "elf/arm.h" |
7f266840 | 31 | |
00a97672 RS |
32 | /* Return the relocation section associated with NAME. HTAB is the |
33 | bfd's elf32_arm_link_hash_entry. */ | |
34 | #define RELOC_SECTION(HTAB, NAME) \ | |
35 | ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) | |
36 | ||
37 | /* Return size of a relocation entry. HTAB is the bfd's | |
38 | elf32_arm_link_hash_entry. */ | |
39 | #define RELOC_SIZE(HTAB) \ | |
40 | ((HTAB)->use_rel \ | |
41 | ? sizeof (Elf32_External_Rel) \ | |
42 | : sizeof (Elf32_External_Rela)) | |
43 | ||
44 | /* Return function to swap relocations in. HTAB is the bfd's | |
45 | elf32_arm_link_hash_entry. */ | |
46 | #define SWAP_RELOC_IN(HTAB) \ | |
47 | ((HTAB)->use_rel \ | |
48 | ? bfd_elf32_swap_reloc_in \ | |
49 | : bfd_elf32_swap_reloca_in) | |
50 | ||
51 | /* Return function to swap relocations out. HTAB is the bfd's | |
52 | elf32_arm_link_hash_entry. */ | |
53 | #define SWAP_RELOC_OUT(HTAB) \ | |
54 | ((HTAB)->use_rel \ | |
55 | ? bfd_elf32_swap_reloc_out \ | |
56 | : bfd_elf32_swap_reloca_out) | |
57 | ||
7f266840 DJ |
58 | #define elf_info_to_howto 0 |
59 | #define elf_info_to_howto_rel elf32_arm_info_to_howto | |
60 | ||
61 | #define ARM_ELF_ABI_VERSION 0 | |
62 | #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM | |
63 | ||
3e6b1042 DJ |
64 | static bfd_boolean elf32_arm_write_section (bfd *output_bfd, |
65 | struct bfd_link_info *link_info, | |
66 | asection *sec, | |
67 | bfd_byte *contents); | |
68 | ||
7f266840 DJ |
69 | /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. |
70 | R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO | |
71 | in that slot. */ | |
72 | ||
c19d1205 | 73 | static reloc_howto_type elf32_arm_howto_table_1[] = |
7f266840 | 74 | { |
8029a119 | 75 | /* No relocation. */ |
7f266840 DJ |
76 | HOWTO (R_ARM_NONE, /* type */ |
77 | 0, /* rightshift */ | |
78 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
79 | 0, /* bitsize */ | |
80 | FALSE, /* pc_relative */ | |
81 | 0, /* bitpos */ | |
82 | complain_overflow_dont,/* complain_on_overflow */ | |
83 | bfd_elf_generic_reloc, /* special_function */ | |
84 | "R_ARM_NONE", /* name */ | |
85 | FALSE, /* partial_inplace */ | |
86 | 0, /* src_mask */ | |
87 | 0, /* dst_mask */ | |
88 | FALSE), /* pcrel_offset */ | |
89 | ||
90 | HOWTO (R_ARM_PC24, /* type */ | |
91 | 2, /* rightshift */ | |
92 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
93 | 24, /* bitsize */ | |
94 | TRUE, /* pc_relative */ | |
95 | 0, /* bitpos */ | |
96 | complain_overflow_signed,/* complain_on_overflow */ | |
97 | bfd_elf_generic_reloc, /* special_function */ | |
98 | "R_ARM_PC24", /* name */ | |
99 | FALSE, /* partial_inplace */ | |
100 | 0x00ffffff, /* src_mask */ | |
101 | 0x00ffffff, /* dst_mask */ | |
102 | TRUE), /* pcrel_offset */ | |
103 | ||
104 | /* 32 bit absolute */ | |
105 | HOWTO (R_ARM_ABS32, /* type */ | |
106 | 0, /* rightshift */ | |
107 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
108 | 32, /* bitsize */ | |
109 | FALSE, /* pc_relative */ | |
110 | 0, /* bitpos */ | |
111 | complain_overflow_bitfield,/* complain_on_overflow */ | |
112 | bfd_elf_generic_reloc, /* special_function */ | |
113 | "R_ARM_ABS32", /* name */ | |
114 | FALSE, /* partial_inplace */ | |
115 | 0xffffffff, /* src_mask */ | |
116 | 0xffffffff, /* dst_mask */ | |
117 | FALSE), /* pcrel_offset */ | |
118 | ||
119 | /* standard 32bit pc-relative reloc */ | |
120 | HOWTO (R_ARM_REL32, /* type */ | |
121 | 0, /* rightshift */ | |
122 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
123 | 32, /* bitsize */ | |
124 | TRUE, /* pc_relative */ | |
125 | 0, /* bitpos */ | |
126 | complain_overflow_bitfield,/* complain_on_overflow */ | |
127 | bfd_elf_generic_reloc, /* special_function */ | |
128 | "R_ARM_REL32", /* name */ | |
129 | FALSE, /* partial_inplace */ | |
130 | 0xffffffff, /* src_mask */ | |
131 | 0xffffffff, /* dst_mask */ | |
132 | TRUE), /* pcrel_offset */ | |
133 | ||
c19d1205 | 134 | /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ |
4962c51a | 135 | HOWTO (R_ARM_LDR_PC_G0, /* type */ |
7f266840 DJ |
136 | 0, /* rightshift */ |
137 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
4962c51a MS |
138 | 32, /* bitsize */ |
139 | TRUE, /* pc_relative */ | |
7f266840 | 140 | 0, /* bitpos */ |
4962c51a | 141 | complain_overflow_dont,/* complain_on_overflow */ |
7f266840 | 142 | bfd_elf_generic_reloc, /* special_function */ |
4962c51a | 143 | "R_ARM_LDR_PC_G0", /* name */ |
7f266840 | 144 | FALSE, /* partial_inplace */ |
4962c51a MS |
145 | 0xffffffff, /* src_mask */ |
146 | 0xffffffff, /* dst_mask */ | |
147 | TRUE), /* pcrel_offset */ | |
7f266840 DJ |
148 | |
149 | /* 16 bit absolute */ | |
150 | HOWTO (R_ARM_ABS16, /* type */ | |
151 | 0, /* rightshift */ | |
152 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
153 | 16, /* bitsize */ | |
154 | FALSE, /* pc_relative */ | |
155 | 0, /* bitpos */ | |
156 | complain_overflow_bitfield,/* complain_on_overflow */ | |
157 | bfd_elf_generic_reloc, /* special_function */ | |
158 | "R_ARM_ABS16", /* name */ | |
159 | FALSE, /* partial_inplace */ | |
160 | 0x0000ffff, /* src_mask */ | |
161 | 0x0000ffff, /* dst_mask */ | |
162 | FALSE), /* pcrel_offset */ | |
163 | ||
164 | /* 12 bit absolute */ | |
165 | HOWTO (R_ARM_ABS12, /* type */ | |
166 | 0, /* rightshift */ | |
167 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
168 | 12, /* bitsize */ | |
169 | FALSE, /* pc_relative */ | |
170 | 0, /* bitpos */ | |
171 | complain_overflow_bitfield,/* complain_on_overflow */ | |
172 | bfd_elf_generic_reloc, /* special_function */ | |
173 | "R_ARM_ABS12", /* name */ | |
174 | FALSE, /* partial_inplace */ | |
00a97672 RS |
175 | 0x00000fff, /* src_mask */ |
176 | 0x00000fff, /* dst_mask */ | |
7f266840 DJ |
177 | FALSE), /* pcrel_offset */ |
178 | ||
179 | HOWTO (R_ARM_THM_ABS5, /* type */ | |
180 | 6, /* rightshift */ | |
181 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
182 | 5, /* bitsize */ | |
183 | FALSE, /* pc_relative */ | |
184 | 0, /* bitpos */ | |
185 | complain_overflow_bitfield,/* complain_on_overflow */ | |
186 | bfd_elf_generic_reloc, /* special_function */ | |
187 | "R_ARM_THM_ABS5", /* name */ | |
188 | FALSE, /* partial_inplace */ | |
189 | 0x000007e0, /* src_mask */ | |
190 | 0x000007e0, /* dst_mask */ | |
191 | FALSE), /* pcrel_offset */ | |
192 | ||
193 | /* 8 bit absolute */ | |
194 | HOWTO (R_ARM_ABS8, /* type */ | |
195 | 0, /* rightshift */ | |
196 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
197 | 8, /* bitsize */ | |
198 | FALSE, /* pc_relative */ | |
199 | 0, /* bitpos */ | |
200 | complain_overflow_bitfield,/* complain_on_overflow */ | |
201 | bfd_elf_generic_reloc, /* special_function */ | |
202 | "R_ARM_ABS8", /* name */ | |
203 | FALSE, /* partial_inplace */ | |
204 | 0x000000ff, /* src_mask */ | |
205 | 0x000000ff, /* dst_mask */ | |
206 | FALSE), /* pcrel_offset */ | |
207 | ||
208 | HOWTO (R_ARM_SBREL32, /* type */ | |
209 | 0, /* rightshift */ | |
210 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
211 | 32, /* bitsize */ | |
212 | FALSE, /* pc_relative */ | |
213 | 0, /* bitpos */ | |
214 | complain_overflow_dont,/* complain_on_overflow */ | |
215 | bfd_elf_generic_reloc, /* special_function */ | |
216 | "R_ARM_SBREL32", /* name */ | |
217 | FALSE, /* partial_inplace */ | |
218 | 0xffffffff, /* src_mask */ | |
219 | 0xffffffff, /* dst_mask */ | |
220 | FALSE), /* pcrel_offset */ | |
221 | ||
c19d1205 | 222 | HOWTO (R_ARM_THM_CALL, /* type */ |
7f266840 DJ |
223 | 1, /* rightshift */ |
224 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
f6ebfac0 | 225 | 24, /* bitsize */ |
7f266840 DJ |
226 | TRUE, /* pc_relative */ |
227 | 0, /* bitpos */ | |
228 | complain_overflow_signed,/* complain_on_overflow */ | |
229 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 230 | "R_ARM_THM_CALL", /* name */ |
7f266840 DJ |
231 | FALSE, /* partial_inplace */ |
232 | 0x07ff07ff, /* src_mask */ | |
233 | 0x07ff07ff, /* dst_mask */ | |
234 | TRUE), /* pcrel_offset */ | |
235 | ||
236 | HOWTO (R_ARM_THM_PC8, /* type */ | |
237 | 1, /* rightshift */ | |
238 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
239 | 8, /* bitsize */ | |
240 | TRUE, /* pc_relative */ | |
241 | 0, /* bitpos */ | |
242 | complain_overflow_signed,/* complain_on_overflow */ | |
243 | bfd_elf_generic_reloc, /* special_function */ | |
244 | "R_ARM_THM_PC8", /* name */ | |
245 | FALSE, /* partial_inplace */ | |
246 | 0x000000ff, /* src_mask */ | |
247 | 0x000000ff, /* dst_mask */ | |
248 | TRUE), /* pcrel_offset */ | |
249 | ||
c19d1205 | 250 | HOWTO (R_ARM_BREL_ADJ, /* type */ |
7f266840 DJ |
251 | 1, /* rightshift */ |
252 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
253 | 32, /* bitsize */ |
254 | FALSE, /* pc_relative */ | |
7f266840 DJ |
255 | 0, /* bitpos */ |
256 | complain_overflow_signed,/* complain_on_overflow */ | |
257 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 258 | "R_ARM_BREL_ADJ", /* name */ |
7f266840 | 259 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
260 | 0xffffffff, /* src_mask */ |
261 | 0xffffffff, /* dst_mask */ | |
262 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
263 | |
264 | HOWTO (R_ARM_SWI24, /* type */ | |
265 | 0, /* rightshift */ | |
266 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
267 | 0, /* bitsize */ | |
268 | FALSE, /* pc_relative */ | |
269 | 0, /* bitpos */ | |
270 | complain_overflow_signed,/* complain_on_overflow */ | |
271 | bfd_elf_generic_reloc, /* special_function */ | |
272 | "R_ARM_SWI24", /* name */ | |
273 | FALSE, /* partial_inplace */ | |
274 | 0x00000000, /* src_mask */ | |
275 | 0x00000000, /* dst_mask */ | |
276 | FALSE), /* pcrel_offset */ | |
277 | ||
278 | HOWTO (R_ARM_THM_SWI8, /* type */ | |
279 | 0, /* rightshift */ | |
280 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
281 | 0, /* bitsize */ | |
282 | FALSE, /* pc_relative */ | |
283 | 0, /* bitpos */ | |
284 | complain_overflow_signed,/* complain_on_overflow */ | |
285 | bfd_elf_generic_reloc, /* special_function */ | |
286 | "R_ARM_SWI8", /* name */ | |
287 | FALSE, /* partial_inplace */ | |
288 | 0x00000000, /* src_mask */ | |
289 | 0x00000000, /* dst_mask */ | |
290 | FALSE), /* pcrel_offset */ | |
291 | ||
292 | /* BLX instruction for the ARM. */ | |
293 | HOWTO (R_ARM_XPC25, /* type */ | |
294 | 2, /* rightshift */ | |
295 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
296 | 25, /* bitsize */ | |
297 | TRUE, /* pc_relative */ | |
298 | 0, /* bitpos */ | |
299 | complain_overflow_signed,/* complain_on_overflow */ | |
300 | bfd_elf_generic_reloc, /* special_function */ | |
301 | "R_ARM_XPC25", /* name */ | |
302 | FALSE, /* partial_inplace */ | |
303 | 0x00ffffff, /* src_mask */ | |
304 | 0x00ffffff, /* dst_mask */ | |
305 | TRUE), /* pcrel_offset */ | |
306 | ||
307 | /* BLX instruction for the Thumb. */ | |
308 | HOWTO (R_ARM_THM_XPC22, /* type */ | |
309 | 2, /* rightshift */ | |
310 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
311 | 22, /* bitsize */ | |
312 | TRUE, /* pc_relative */ | |
313 | 0, /* bitpos */ | |
314 | complain_overflow_signed,/* complain_on_overflow */ | |
315 | bfd_elf_generic_reloc, /* special_function */ | |
316 | "R_ARM_THM_XPC22", /* name */ | |
317 | FALSE, /* partial_inplace */ | |
318 | 0x07ff07ff, /* src_mask */ | |
319 | 0x07ff07ff, /* dst_mask */ | |
320 | TRUE), /* pcrel_offset */ | |
321 | ||
ba93b8ac | 322 | /* Dynamic TLS relocations. */ |
7f266840 | 323 | |
ba93b8ac DJ |
324 | HOWTO (R_ARM_TLS_DTPMOD32, /* type */ |
325 | 0, /* rightshift */ | |
326 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
327 | 32, /* bitsize */ | |
328 | FALSE, /* pc_relative */ | |
329 | 0, /* bitpos */ | |
330 | complain_overflow_bitfield,/* complain_on_overflow */ | |
331 | bfd_elf_generic_reloc, /* special_function */ | |
332 | "R_ARM_TLS_DTPMOD32", /* name */ | |
333 | TRUE, /* partial_inplace */ | |
334 | 0xffffffff, /* src_mask */ | |
335 | 0xffffffff, /* dst_mask */ | |
336 | FALSE), /* pcrel_offset */ | |
7f266840 | 337 | |
ba93b8ac DJ |
338 | HOWTO (R_ARM_TLS_DTPOFF32, /* type */ |
339 | 0, /* rightshift */ | |
340 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
341 | 32, /* bitsize */ | |
342 | FALSE, /* pc_relative */ | |
343 | 0, /* bitpos */ | |
344 | complain_overflow_bitfield,/* complain_on_overflow */ | |
345 | bfd_elf_generic_reloc, /* special_function */ | |
346 | "R_ARM_TLS_DTPOFF32", /* name */ | |
347 | TRUE, /* partial_inplace */ | |
348 | 0xffffffff, /* src_mask */ | |
349 | 0xffffffff, /* dst_mask */ | |
350 | FALSE), /* pcrel_offset */ | |
7f266840 | 351 | |
ba93b8ac DJ |
352 | HOWTO (R_ARM_TLS_TPOFF32, /* type */ |
353 | 0, /* rightshift */ | |
354 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
355 | 32, /* bitsize */ | |
356 | FALSE, /* pc_relative */ | |
357 | 0, /* bitpos */ | |
358 | complain_overflow_bitfield,/* complain_on_overflow */ | |
359 | bfd_elf_generic_reloc, /* special_function */ | |
360 | "R_ARM_TLS_TPOFF32", /* name */ | |
361 | TRUE, /* partial_inplace */ | |
362 | 0xffffffff, /* src_mask */ | |
363 | 0xffffffff, /* dst_mask */ | |
364 | FALSE), /* pcrel_offset */ | |
7f266840 DJ |
365 | |
366 | /* Relocs used in ARM Linux */ | |
367 | ||
368 | HOWTO (R_ARM_COPY, /* type */ | |
369 | 0, /* rightshift */ | |
370 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
371 | 32, /* bitsize */ | |
372 | FALSE, /* pc_relative */ | |
373 | 0, /* bitpos */ | |
374 | complain_overflow_bitfield,/* complain_on_overflow */ | |
375 | bfd_elf_generic_reloc, /* special_function */ | |
376 | "R_ARM_COPY", /* name */ | |
377 | TRUE, /* partial_inplace */ | |
378 | 0xffffffff, /* src_mask */ | |
379 | 0xffffffff, /* dst_mask */ | |
380 | FALSE), /* pcrel_offset */ | |
381 | ||
382 | HOWTO (R_ARM_GLOB_DAT, /* type */ | |
383 | 0, /* rightshift */ | |
384 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
385 | 32, /* bitsize */ | |
386 | FALSE, /* pc_relative */ | |
387 | 0, /* bitpos */ | |
388 | complain_overflow_bitfield,/* complain_on_overflow */ | |
389 | bfd_elf_generic_reloc, /* special_function */ | |
390 | "R_ARM_GLOB_DAT", /* name */ | |
391 | TRUE, /* partial_inplace */ | |
392 | 0xffffffff, /* src_mask */ | |
393 | 0xffffffff, /* dst_mask */ | |
394 | FALSE), /* pcrel_offset */ | |
395 | ||
396 | HOWTO (R_ARM_JUMP_SLOT, /* type */ | |
397 | 0, /* rightshift */ | |
398 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
399 | 32, /* bitsize */ | |
400 | FALSE, /* pc_relative */ | |
401 | 0, /* bitpos */ | |
402 | complain_overflow_bitfield,/* complain_on_overflow */ | |
403 | bfd_elf_generic_reloc, /* special_function */ | |
404 | "R_ARM_JUMP_SLOT", /* name */ | |
405 | TRUE, /* partial_inplace */ | |
406 | 0xffffffff, /* src_mask */ | |
407 | 0xffffffff, /* dst_mask */ | |
408 | FALSE), /* pcrel_offset */ | |
409 | ||
410 | HOWTO (R_ARM_RELATIVE, /* type */ | |
411 | 0, /* rightshift */ | |
412 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
413 | 32, /* bitsize */ | |
414 | FALSE, /* pc_relative */ | |
415 | 0, /* bitpos */ | |
416 | complain_overflow_bitfield,/* complain_on_overflow */ | |
417 | bfd_elf_generic_reloc, /* special_function */ | |
418 | "R_ARM_RELATIVE", /* name */ | |
419 | TRUE, /* partial_inplace */ | |
420 | 0xffffffff, /* src_mask */ | |
421 | 0xffffffff, /* dst_mask */ | |
422 | FALSE), /* pcrel_offset */ | |
423 | ||
c19d1205 | 424 | HOWTO (R_ARM_GOTOFF32, /* type */ |
7f266840 DJ |
425 | 0, /* rightshift */ |
426 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
427 | 32, /* bitsize */ | |
428 | FALSE, /* pc_relative */ | |
429 | 0, /* bitpos */ | |
430 | complain_overflow_bitfield,/* complain_on_overflow */ | |
431 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 432 | "R_ARM_GOTOFF32", /* name */ |
7f266840 DJ |
433 | TRUE, /* partial_inplace */ |
434 | 0xffffffff, /* src_mask */ | |
435 | 0xffffffff, /* dst_mask */ | |
436 | FALSE), /* pcrel_offset */ | |
437 | ||
438 | HOWTO (R_ARM_GOTPC, /* type */ | |
439 | 0, /* rightshift */ | |
440 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
441 | 32, /* bitsize */ | |
442 | TRUE, /* pc_relative */ | |
443 | 0, /* bitpos */ | |
444 | complain_overflow_bitfield,/* complain_on_overflow */ | |
445 | bfd_elf_generic_reloc, /* special_function */ | |
446 | "R_ARM_GOTPC", /* name */ | |
447 | TRUE, /* partial_inplace */ | |
448 | 0xffffffff, /* src_mask */ | |
449 | 0xffffffff, /* dst_mask */ | |
450 | TRUE), /* pcrel_offset */ | |
451 | ||
452 | HOWTO (R_ARM_GOT32, /* type */ | |
453 | 0, /* rightshift */ | |
454 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
455 | 32, /* bitsize */ | |
456 | FALSE, /* pc_relative */ | |
457 | 0, /* bitpos */ | |
458 | complain_overflow_bitfield,/* complain_on_overflow */ | |
459 | bfd_elf_generic_reloc, /* special_function */ | |
460 | "R_ARM_GOT32", /* name */ | |
461 | TRUE, /* partial_inplace */ | |
462 | 0xffffffff, /* src_mask */ | |
463 | 0xffffffff, /* dst_mask */ | |
464 | FALSE), /* pcrel_offset */ | |
465 | ||
466 | HOWTO (R_ARM_PLT32, /* type */ | |
467 | 2, /* rightshift */ | |
468 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
ce490eda | 469 | 24, /* bitsize */ |
7f266840 DJ |
470 | TRUE, /* pc_relative */ |
471 | 0, /* bitpos */ | |
472 | complain_overflow_bitfield,/* complain_on_overflow */ | |
473 | bfd_elf_generic_reloc, /* special_function */ | |
474 | "R_ARM_PLT32", /* name */ | |
ce490eda | 475 | FALSE, /* partial_inplace */ |
7f266840 DJ |
476 | 0x00ffffff, /* src_mask */ |
477 | 0x00ffffff, /* dst_mask */ | |
478 | TRUE), /* pcrel_offset */ | |
479 | ||
480 | HOWTO (R_ARM_CALL, /* type */ | |
481 | 2, /* rightshift */ | |
482 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
483 | 24, /* bitsize */ | |
484 | TRUE, /* pc_relative */ | |
485 | 0, /* bitpos */ | |
486 | complain_overflow_signed,/* complain_on_overflow */ | |
487 | bfd_elf_generic_reloc, /* special_function */ | |
488 | "R_ARM_CALL", /* name */ | |
489 | FALSE, /* partial_inplace */ | |
490 | 0x00ffffff, /* src_mask */ | |
491 | 0x00ffffff, /* dst_mask */ | |
492 | TRUE), /* pcrel_offset */ | |
493 | ||
494 | HOWTO (R_ARM_JUMP24, /* type */ | |
495 | 2, /* rightshift */ | |
496 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
497 | 24, /* bitsize */ | |
498 | TRUE, /* pc_relative */ | |
499 | 0, /* bitpos */ | |
500 | complain_overflow_signed,/* complain_on_overflow */ | |
501 | bfd_elf_generic_reloc, /* special_function */ | |
502 | "R_ARM_JUMP24", /* name */ | |
503 | FALSE, /* partial_inplace */ | |
504 | 0x00ffffff, /* src_mask */ | |
505 | 0x00ffffff, /* dst_mask */ | |
506 | TRUE), /* pcrel_offset */ | |
507 | ||
c19d1205 ZW |
508 | HOWTO (R_ARM_THM_JUMP24, /* type */ |
509 | 1, /* rightshift */ | |
510 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
511 | 24, /* bitsize */ | |
512 | TRUE, /* pc_relative */ | |
7f266840 | 513 | 0, /* bitpos */ |
c19d1205 | 514 | complain_overflow_signed,/* complain_on_overflow */ |
7f266840 | 515 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 516 | "R_ARM_THM_JUMP24", /* name */ |
7f266840 | 517 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
518 | 0x07ff2fff, /* src_mask */ |
519 | 0x07ff2fff, /* dst_mask */ | |
520 | TRUE), /* pcrel_offset */ | |
7f266840 | 521 | |
c19d1205 | 522 | HOWTO (R_ARM_BASE_ABS, /* type */ |
7f266840 | 523 | 0, /* rightshift */ |
c19d1205 ZW |
524 | 2, /* size (0 = byte, 1 = short, 2 = long) */ |
525 | 32, /* bitsize */ | |
7f266840 DJ |
526 | FALSE, /* pc_relative */ |
527 | 0, /* bitpos */ | |
528 | complain_overflow_dont,/* complain_on_overflow */ | |
529 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 530 | "R_ARM_BASE_ABS", /* name */ |
7f266840 | 531 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
532 | 0xffffffff, /* src_mask */ |
533 | 0xffffffff, /* dst_mask */ | |
7f266840 DJ |
534 | FALSE), /* pcrel_offset */ |
535 | ||
536 | HOWTO (R_ARM_ALU_PCREL7_0, /* type */ | |
537 | 0, /* rightshift */ | |
538 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
539 | 12, /* bitsize */ | |
540 | TRUE, /* pc_relative */ | |
541 | 0, /* bitpos */ | |
542 | complain_overflow_dont,/* complain_on_overflow */ | |
543 | bfd_elf_generic_reloc, /* special_function */ | |
544 | "R_ARM_ALU_PCREL_7_0", /* name */ | |
545 | FALSE, /* partial_inplace */ | |
546 | 0x00000fff, /* src_mask */ | |
547 | 0x00000fff, /* dst_mask */ | |
548 | TRUE), /* pcrel_offset */ | |
549 | ||
550 | HOWTO (R_ARM_ALU_PCREL15_8, /* type */ | |
551 | 0, /* rightshift */ | |
552 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
553 | 12, /* bitsize */ | |
554 | TRUE, /* pc_relative */ | |
555 | 8, /* bitpos */ | |
556 | complain_overflow_dont,/* complain_on_overflow */ | |
557 | bfd_elf_generic_reloc, /* special_function */ | |
558 | "R_ARM_ALU_PCREL_15_8",/* name */ | |
559 | FALSE, /* partial_inplace */ | |
560 | 0x00000fff, /* src_mask */ | |
561 | 0x00000fff, /* dst_mask */ | |
562 | TRUE), /* pcrel_offset */ | |
563 | ||
564 | HOWTO (R_ARM_ALU_PCREL23_15, /* type */ | |
565 | 0, /* rightshift */ | |
566 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
567 | 12, /* bitsize */ | |
568 | TRUE, /* pc_relative */ | |
569 | 16, /* bitpos */ | |
570 | complain_overflow_dont,/* complain_on_overflow */ | |
571 | bfd_elf_generic_reloc, /* special_function */ | |
572 | "R_ARM_ALU_PCREL_23_15",/* name */ | |
573 | FALSE, /* partial_inplace */ | |
574 | 0x00000fff, /* src_mask */ | |
575 | 0x00000fff, /* dst_mask */ | |
576 | TRUE), /* pcrel_offset */ | |
577 | ||
578 | HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ | |
579 | 0, /* rightshift */ | |
580 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
581 | 12, /* bitsize */ | |
582 | FALSE, /* pc_relative */ | |
583 | 0, /* bitpos */ | |
584 | complain_overflow_dont,/* complain_on_overflow */ | |
585 | bfd_elf_generic_reloc, /* special_function */ | |
586 | "R_ARM_LDR_SBREL_11_0",/* name */ | |
587 | FALSE, /* partial_inplace */ | |
588 | 0x00000fff, /* src_mask */ | |
589 | 0x00000fff, /* dst_mask */ | |
590 | FALSE), /* pcrel_offset */ | |
591 | ||
592 | HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ | |
593 | 0, /* rightshift */ | |
594 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
595 | 8, /* bitsize */ | |
596 | FALSE, /* pc_relative */ | |
597 | 12, /* bitpos */ | |
598 | complain_overflow_dont,/* complain_on_overflow */ | |
599 | bfd_elf_generic_reloc, /* special_function */ | |
600 | "R_ARM_ALU_SBREL_19_12",/* name */ | |
601 | FALSE, /* partial_inplace */ | |
602 | 0x000ff000, /* src_mask */ | |
603 | 0x000ff000, /* dst_mask */ | |
604 | FALSE), /* pcrel_offset */ | |
605 | ||
606 | HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ | |
607 | 0, /* rightshift */ | |
608 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
609 | 8, /* bitsize */ | |
610 | FALSE, /* pc_relative */ | |
611 | 20, /* bitpos */ | |
612 | complain_overflow_dont,/* complain_on_overflow */ | |
613 | bfd_elf_generic_reloc, /* special_function */ | |
614 | "R_ARM_ALU_SBREL_27_20",/* name */ | |
615 | FALSE, /* partial_inplace */ | |
616 | 0x0ff00000, /* src_mask */ | |
617 | 0x0ff00000, /* dst_mask */ | |
618 | FALSE), /* pcrel_offset */ | |
619 | ||
620 | HOWTO (R_ARM_TARGET1, /* type */ | |
621 | 0, /* rightshift */ | |
622 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
623 | 32, /* bitsize */ | |
624 | FALSE, /* pc_relative */ | |
625 | 0, /* bitpos */ | |
626 | complain_overflow_dont,/* complain_on_overflow */ | |
627 | bfd_elf_generic_reloc, /* special_function */ | |
628 | "R_ARM_TARGET1", /* name */ | |
629 | FALSE, /* partial_inplace */ | |
630 | 0xffffffff, /* src_mask */ | |
631 | 0xffffffff, /* dst_mask */ | |
632 | FALSE), /* pcrel_offset */ | |
633 | ||
634 | HOWTO (R_ARM_ROSEGREL32, /* type */ | |
635 | 0, /* rightshift */ | |
636 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
637 | 32, /* bitsize */ | |
638 | FALSE, /* pc_relative */ | |
639 | 0, /* bitpos */ | |
640 | complain_overflow_dont,/* complain_on_overflow */ | |
641 | bfd_elf_generic_reloc, /* special_function */ | |
642 | "R_ARM_ROSEGREL32", /* name */ | |
643 | FALSE, /* partial_inplace */ | |
644 | 0xffffffff, /* src_mask */ | |
645 | 0xffffffff, /* dst_mask */ | |
646 | FALSE), /* pcrel_offset */ | |
647 | ||
648 | HOWTO (R_ARM_V4BX, /* type */ | |
649 | 0, /* rightshift */ | |
650 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
651 | 32, /* bitsize */ | |
652 | FALSE, /* pc_relative */ | |
653 | 0, /* bitpos */ | |
654 | complain_overflow_dont,/* complain_on_overflow */ | |
655 | bfd_elf_generic_reloc, /* special_function */ | |
656 | "R_ARM_V4BX", /* name */ | |
657 | FALSE, /* partial_inplace */ | |
658 | 0xffffffff, /* src_mask */ | |
659 | 0xffffffff, /* dst_mask */ | |
660 | FALSE), /* pcrel_offset */ | |
661 | ||
662 | HOWTO (R_ARM_TARGET2, /* type */ | |
663 | 0, /* rightshift */ | |
664 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
665 | 32, /* bitsize */ | |
666 | FALSE, /* pc_relative */ | |
667 | 0, /* bitpos */ | |
668 | complain_overflow_signed,/* complain_on_overflow */ | |
669 | bfd_elf_generic_reloc, /* special_function */ | |
670 | "R_ARM_TARGET2", /* name */ | |
671 | FALSE, /* partial_inplace */ | |
672 | 0xffffffff, /* src_mask */ | |
673 | 0xffffffff, /* dst_mask */ | |
674 | TRUE), /* pcrel_offset */ | |
675 | ||
676 | HOWTO (R_ARM_PREL31, /* type */ | |
677 | 0, /* rightshift */ | |
678 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
679 | 31, /* bitsize */ | |
680 | TRUE, /* pc_relative */ | |
681 | 0, /* bitpos */ | |
682 | complain_overflow_signed,/* complain_on_overflow */ | |
683 | bfd_elf_generic_reloc, /* special_function */ | |
684 | "R_ARM_PREL31", /* name */ | |
685 | FALSE, /* partial_inplace */ | |
686 | 0x7fffffff, /* src_mask */ | |
687 | 0x7fffffff, /* dst_mask */ | |
688 | TRUE), /* pcrel_offset */ | |
c19d1205 ZW |
689 | |
690 | HOWTO (R_ARM_MOVW_ABS_NC, /* type */ | |
691 | 0, /* rightshift */ | |
692 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
693 | 16, /* bitsize */ | |
694 | FALSE, /* pc_relative */ | |
695 | 0, /* bitpos */ | |
696 | complain_overflow_dont,/* complain_on_overflow */ | |
697 | bfd_elf_generic_reloc, /* special_function */ | |
698 | "R_ARM_MOVW_ABS_NC", /* name */ | |
699 | FALSE, /* partial_inplace */ | |
39623e12 PB |
700 | 0x000f0fff, /* src_mask */ |
701 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
702 | FALSE), /* pcrel_offset */ |
703 | ||
704 | HOWTO (R_ARM_MOVT_ABS, /* type */ | |
705 | 0, /* rightshift */ | |
706 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
707 | 16, /* bitsize */ | |
708 | FALSE, /* pc_relative */ | |
709 | 0, /* bitpos */ | |
710 | complain_overflow_bitfield,/* complain_on_overflow */ | |
711 | bfd_elf_generic_reloc, /* special_function */ | |
712 | "R_ARM_MOVT_ABS", /* name */ | |
713 | FALSE, /* partial_inplace */ | |
39623e12 PB |
714 | 0x000f0fff, /* src_mask */ |
715 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
716 | FALSE), /* pcrel_offset */ |
717 | ||
718 | HOWTO (R_ARM_MOVW_PREL_NC, /* type */ | |
719 | 0, /* rightshift */ | |
720 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
721 | 16, /* bitsize */ | |
722 | TRUE, /* pc_relative */ | |
723 | 0, /* bitpos */ | |
724 | complain_overflow_dont,/* complain_on_overflow */ | |
725 | bfd_elf_generic_reloc, /* special_function */ | |
726 | "R_ARM_MOVW_PREL_NC", /* name */ | |
727 | FALSE, /* partial_inplace */ | |
39623e12 PB |
728 | 0x000f0fff, /* src_mask */ |
729 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
730 | TRUE), /* pcrel_offset */ |
731 | ||
732 | HOWTO (R_ARM_MOVT_PREL, /* type */ | |
733 | 0, /* rightshift */ | |
734 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
735 | 16, /* bitsize */ | |
736 | TRUE, /* pc_relative */ | |
737 | 0, /* bitpos */ | |
738 | complain_overflow_bitfield,/* complain_on_overflow */ | |
739 | bfd_elf_generic_reloc, /* special_function */ | |
740 | "R_ARM_MOVT_PREL", /* name */ | |
741 | FALSE, /* partial_inplace */ | |
39623e12 PB |
742 | 0x000f0fff, /* src_mask */ |
743 | 0x000f0fff, /* dst_mask */ | |
c19d1205 ZW |
744 | TRUE), /* pcrel_offset */ |
745 | ||
746 | HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ | |
747 | 0, /* rightshift */ | |
748 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
749 | 16, /* bitsize */ | |
750 | FALSE, /* pc_relative */ | |
751 | 0, /* bitpos */ | |
752 | complain_overflow_dont,/* complain_on_overflow */ | |
753 | bfd_elf_generic_reloc, /* special_function */ | |
754 | "R_ARM_THM_MOVW_ABS_NC",/* name */ | |
755 | FALSE, /* partial_inplace */ | |
756 | 0x040f70ff, /* src_mask */ | |
757 | 0x040f70ff, /* dst_mask */ | |
758 | FALSE), /* pcrel_offset */ | |
759 | ||
760 | HOWTO (R_ARM_THM_MOVT_ABS, /* type */ | |
761 | 0, /* rightshift */ | |
762 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
763 | 16, /* bitsize */ | |
764 | FALSE, /* pc_relative */ | |
765 | 0, /* bitpos */ | |
766 | complain_overflow_bitfield,/* complain_on_overflow */ | |
767 | bfd_elf_generic_reloc, /* special_function */ | |
768 | "R_ARM_THM_MOVT_ABS", /* name */ | |
769 | FALSE, /* partial_inplace */ | |
770 | 0x040f70ff, /* src_mask */ | |
771 | 0x040f70ff, /* dst_mask */ | |
772 | FALSE), /* pcrel_offset */ | |
773 | ||
774 | HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ | |
775 | 0, /* rightshift */ | |
776 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
777 | 16, /* bitsize */ | |
778 | TRUE, /* pc_relative */ | |
779 | 0, /* bitpos */ | |
780 | complain_overflow_dont,/* complain_on_overflow */ | |
781 | bfd_elf_generic_reloc, /* special_function */ | |
782 | "R_ARM_THM_MOVW_PREL_NC",/* name */ | |
783 | FALSE, /* partial_inplace */ | |
784 | 0x040f70ff, /* src_mask */ | |
785 | 0x040f70ff, /* dst_mask */ | |
786 | TRUE), /* pcrel_offset */ | |
787 | ||
788 | HOWTO (R_ARM_THM_MOVT_PREL, /* type */ | |
789 | 0, /* rightshift */ | |
790 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
791 | 16, /* bitsize */ | |
792 | TRUE, /* pc_relative */ | |
793 | 0, /* bitpos */ | |
794 | complain_overflow_bitfield,/* complain_on_overflow */ | |
795 | bfd_elf_generic_reloc, /* special_function */ | |
796 | "R_ARM_THM_MOVT_PREL", /* name */ | |
797 | FALSE, /* partial_inplace */ | |
798 | 0x040f70ff, /* src_mask */ | |
799 | 0x040f70ff, /* dst_mask */ | |
800 | TRUE), /* pcrel_offset */ | |
801 | ||
802 | HOWTO (R_ARM_THM_JUMP19, /* type */ | |
803 | 1, /* rightshift */ | |
804 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
805 | 19, /* bitsize */ | |
806 | TRUE, /* pc_relative */ | |
807 | 0, /* bitpos */ | |
808 | complain_overflow_signed,/* complain_on_overflow */ | |
809 | bfd_elf_generic_reloc, /* special_function */ | |
810 | "R_ARM_THM_JUMP19", /* name */ | |
811 | FALSE, /* partial_inplace */ | |
812 | 0x043f2fff, /* src_mask */ | |
813 | 0x043f2fff, /* dst_mask */ | |
814 | TRUE), /* pcrel_offset */ | |
815 | ||
816 | HOWTO (R_ARM_THM_JUMP6, /* type */ | |
817 | 1, /* rightshift */ | |
818 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
819 | 6, /* bitsize */ | |
820 | TRUE, /* pc_relative */ | |
821 | 0, /* bitpos */ | |
822 | complain_overflow_unsigned,/* complain_on_overflow */ | |
823 | bfd_elf_generic_reloc, /* special_function */ | |
824 | "R_ARM_THM_JUMP6", /* name */ | |
825 | FALSE, /* partial_inplace */ | |
826 | 0x02f8, /* src_mask */ | |
827 | 0x02f8, /* dst_mask */ | |
828 | TRUE), /* pcrel_offset */ | |
829 | ||
830 | /* These are declared as 13-bit signed relocations because we can | |
831 | address -4095 .. 4095(base) by altering ADDW to SUBW or vice | |
832 | versa. */ | |
833 | HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ | |
834 | 0, /* rightshift */ | |
835 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
836 | 13, /* bitsize */ | |
837 | TRUE, /* pc_relative */ | |
838 | 0, /* bitpos */ | |
2cab6cc3 | 839 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
840 | bfd_elf_generic_reloc, /* special_function */ |
841 | "R_ARM_THM_ALU_PREL_11_0",/* name */ | |
842 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
843 | 0xffffffff, /* src_mask */ |
844 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
845 | TRUE), /* pcrel_offset */ |
846 | ||
847 | HOWTO (R_ARM_THM_PC12, /* type */ | |
848 | 0, /* rightshift */ | |
849 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
850 | 13, /* bitsize */ | |
851 | TRUE, /* pc_relative */ | |
852 | 0, /* bitpos */ | |
2cab6cc3 | 853 | complain_overflow_dont,/* complain_on_overflow */ |
c19d1205 ZW |
854 | bfd_elf_generic_reloc, /* special_function */ |
855 | "R_ARM_THM_PC12", /* name */ | |
856 | FALSE, /* partial_inplace */ | |
2cab6cc3 MS |
857 | 0xffffffff, /* src_mask */ |
858 | 0xffffffff, /* dst_mask */ | |
c19d1205 ZW |
859 | TRUE), /* pcrel_offset */ |
860 | ||
861 | HOWTO (R_ARM_ABS32_NOI, /* type */ | |
862 | 0, /* rightshift */ | |
863 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
864 | 32, /* bitsize */ | |
865 | FALSE, /* pc_relative */ | |
866 | 0, /* bitpos */ | |
867 | complain_overflow_dont,/* complain_on_overflow */ | |
868 | bfd_elf_generic_reloc, /* special_function */ | |
869 | "R_ARM_ABS32_NOI", /* name */ | |
870 | FALSE, /* partial_inplace */ | |
871 | 0xffffffff, /* src_mask */ | |
872 | 0xffffffff, /* dst_mask */ | |
873 | FALSE), /* pcrel_offset */ | |
874 | ||
875 | HOWTO (R_ARM_REL32_NOI, /* type */ | |
876 | 0, /* rightshift */ | |
877 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
878 | 32, /* bitsize */ | |
879 | TRUE, /* pc_relative */ | |
880 | 0, /* bitpos */ | |
881 | complain_overflow_dont,/* complain_on_overflow */ | |
882 | bfd_elf_generic_reloc, /* special_function */ | |
883 | "R_ARM_REL32_NOI", /* name */ | |
884 | FALSE, /* partial_inplace */ | |
885 | 0xffffffff, /* src_mask */ | |
886 | 0xffffffff, /* dst_mask */ | |
887 | FALSE), /* pcrel_offset */ | |
7f266840 | 888 | |
4962c51a MS |
889 | /* Group relocations. */ |
890 | ||
891 | HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ | |
892 | 0, /* rightshift */ | |
893 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
894 | 32, /* bitsize */ | |
895 | TRUE, /* pc_relative */ | |
896 | 0, /* bitpos */ | |
897 | complain_overflow_dont,/* complain_on_overflow */ | |
898 | bfd_elf_generic_reloc, /* special_function */ | |
899 | "R_ARM_ALU_PC_G0_NC", /* name */ | |
900 | FALSE, /* partial_inplace */ | |
901 | 0xffffffff, /* src_mask */ | |
902 | 0xffffffff, /* dst_mask */ | |
903 | TRUE), /* pcrel_offset */ | |
904 | ||
905 | HOWTO (R_ARM_ALU_PC_G0, /* type */ | |
906 | 0, /* rightshift */ | |
907 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
908 | 32, /* bitsize */ | |
909 | TRUE, /* pc_relative */ | |
910 | 0, /* bitpos */ | |
911 | complain_overflow_dont,/* complain_on_overflow */ | |
912 | bfd_elf_generic_reloc, /* special_function */ | |
913 | "R_ARM_ALU_PC_G0", /* name */ | |
914 | FALSE, /* partial_inplace */ | |
915 | 0xffffffff, /* src_mask */ | |
916 | 0xffffffff, /* dst_mask */ | |
917 | TRUE), /* pcrel_offset */ | |
918 | ||
919 | HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ | |
920 | 0, /* rightshift */ | |
921 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
922 | 32, /* bitsize */ | |
923 | TRUE, /* pc_relative */ | |
924 | 0, /* bitpos */ | |
925 | complain_overflow_dont,/* complain_on_overflow */ | |
926 | bfd_elf_generic_reloc, /* special_function */ | |
927 | "R_ARM_ALU_PC_G1_NC", /* name */ | |
928 | FALSE, /* partial_inplace */ | |
929 | 0xffffffff, /* src_mask */ | |
930 | 0xffffffff, /* dst_mask */ | |
931 | TRUE), /* pcrel_offset */ | |
932 | ||
933 | HOWTO (R_ARM_ALU_PC_G1, /* type */ | |
934 | 0, /* rightshift */ | |
935 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
936 | 32, /* bitsize */ | |
937 | TRUE, /* pc_relative */ | |
938 | 0, /* bitpos */ | |
939 | complain_overflow_dont,/* complain_on_overflow */ | |
940 | bfd_elf_generic_reloc, /* special_function */ | |
941 | "R_ARM_ALU_PC_G1", /* name */ | |
942 | FALSE, /* partial_inplace */ | |
943 | 0xffffffff, /* src_mask */ | |
944 | 0xffffffff, /* dst_mask */ | |
945 | TRUE), /* pcrel_offset */ | |
946 | ||
947 | HOWTO (R_ARM_ALU_PC_G2, /* type */ | |
948 | 0, /* rightshift */ | |
949 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
950 | 32, /* bitsize */ | |
951 | TRUE, /* pc_relative */ | |
952 | 0, /* bitpos */ | |
953 | complain_overflow_dont,/* complain_on_overflow */ | |
954 | bfd_elf_generic_reloc, /* special_function */ | |
955 | "R_ARM_ALU_PC_G2", /* name */ | |
956 | FALSE, /* partial_inplace */ | |
957 | 0xffffffff, /* src_mask */ | |
958 | 0xffffffff, /* dst_mask */ | |
959 | TRUE), /* pcrel_offset */ | |
960 | ||
961 | HOWTO (R_ARM_LDR_PC_G1, /* type */ | |
962 | 0, /* rightshift */ | |
963 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
964 | 32, /* bitsize */ | |
965 | TRUE, /* pc_relative */ | |
966 | 0, /* bitpos */ | |
967 | complain_overflow_dont,/* complain_on_overflow */ | |
968 | bfd_elf_generic_reloc, /* special_function */ | |
969 | "R_ARM_LDR_PC_G1", /* name */ | |
970 | FALSE, /* partial_inplace */ | |
971 | 0xffffffff, /* src_mask */ | |
972 | 0xffffffff, /* dst_mask */ | |
973 | TRUE), /* pcrel_offset */ | |
974 | ||
975 | HOWTO (R_ARM_LDR_PC_G2, /* type */ | |
976 | 0, /* rightshift */ | |
977 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
978 | 32, /* bitsize */ | |
979 | TRUE, /* pc_relative */ | |
980 | 0, /* bitpos */ | |
981 | complain_overflow_dont,/* complain_on_overflow */ | |
982 | bfd_elf_generic_reloc, /* special_function */ | |
983 | "R_ARM_LDR_PC_G2", /* name */ | |
984 | FALSE, /* partial_inplace */ | |
985 | 0xffffffff, /* src_mask */ | |
986 | 0xffffffff, /* dst_mask */ | |
987 | TRUE), /* pcrel_offset */ | |
988 | ||
989 | HOWTO (R_ARM_LDRS_PC_G0, /* type */ | |
990 | 0, /* rightshift */ | |
991 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
992 | 32, /* bitsize */ | |
993 | TRUE, /* pc_relative */ | |
994 | 0, /* bitpos */ | |
995 | complain_overflow_dont,/* complain_on_overflow */ | |
996 | bfd_elf_generic_reloc, /* special_function */ | |
997 | "R_ARM_LDRS_PC_G0", /* name */ | |
998 | FALSE, /* partial_inplace */ | |
999 | 0xffffffff, /* src_mask */ | |
1000 | 0xffffffff, /* dst_mask */ | |
1001 | TRUE), /* pcrel_offset */ | |
1002 | ||
1003 | HOWTO (R_ARM_LDRS_PC_G1, /* type */ | |
1004 | 0, /* rightshift */ | |
1005 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1006 | 32, /* bitsize */ | |
1007 | TRUE, /* pc_relative */ | |
1008 | 0, /* bitpos */ | |
1009 | complain_overflow_dont,/* complain_on_overflow */ | |
1010 | bfd_elf_generic_reloc, /* special_function */ | |
1011 | "R_ARM_LDRS_PC_G1", /* name */ | |
1012 | FALSE, /* partial_inplace */ | |
1013 | 0xffffffff, /* src_mask */ | |
1014 | 0xffffffff, /* dst_mask */ | |
1015 | TRUE), /* pcrel_offset */ | |
1016 | ||
1017 | HOWTO (R_ARM_LDRS_PC_G2, /* type */ | |
1018 | 0, /* rightshift */ | |
1019 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1020 | 32, /* bitsize */ | |
1021 | TRUE, /* pc_relative */ | |
1022 | 0, /* bitpos */ | |
1023 | complain_overflow_dont,/* complain_on_overflow */ | |
1024 | bfd_elf_generic_reloc, /* special_function */ | |
1025 | "R_ARM_LDRS_PC_G2", /* name */ | |
1026 | FALSE, /* partial_inplace */ | |
1027 | 0xffffffff, /* src_mask */ | |
1028 | 0xffffffff, /* dst_mask */ | |
1029 | TRUE), /* pcrel_offset */ | |
1030 | ||
1031 | HOWTO (R_ARM_LDC_PC_G0, /* type */ | |
1032 | 0, /* rightshift */ | |
1033 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1034 | 32, /* bitsize */ | |
1035 | TRUE, /* pc_relative */ | |
1036 | 0, /* bitpos */ | |
1037 | complain_overflow_dont,/* complain_on_overflow */ | |
1038 | bfd_elf_generic_reloc, /* special_function */ | |
1039 | "R_ARM_LDC_PC_G0", /* name */ | |
1040 | FALSE, /* partial_inplace */ | |
1041 | 0xffffffff, /* src_mask */ | |
1042 | 0xffffffff, /* dst_mask */ | |
1043 | TRUE), /* pcrel_offset */ | |
1044 | ||
1045 | HOWTO (R_ARM_LDC_PC_G1, /* type */ | |
1046 | 0, /* rightshift */ | |
1047 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1048 | 32, /* bitsize */ | |
1049 | TRUE, /* pc_relative */ | |
1050 | 0, /* bitpos */ | |
1051 | complain_overflow_dont,/* complain_on_overflow */ | |
1052 | bfd_elf_generic_reloc, /* special_function */ | |
1053 | "R_ARM_LDC_PC_G1", /* name */ | |
1054 | FALSE, /* partial_inplace */ | |
1055 | 0xffffffff, /* src_mask */ | |
1056 | 0xffffffff, /* dst_mask */ | |
1057 | TRUE), /* pcrel_offset */ | |
1058 | ||
1059 | HOWTO (R_ARM_LDC_PC_G2, /* type */ | |
1060 | 0, /* rightshift */ | |
1061 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1062 | 32, /* bitsize */ | |
1063 | TRUE, /* pc_relative */ | |
1064 | 0, /* bitpos */ | |
1065 | complain_overflow_dont,/* complain_on_overflow */ | |
1066 | bfd_elf_generic_reloc, /* special_function */ | |
1067 | "R_ARM_LDC_PC_G2", /* name */ | |
1068 | FALSE, /* partial_inplace */ | |
1069 | 0xffffffff, /* src_mask */ | |
1070 | 0xffffffff, /* dst_mask */ | |
1071 | TRUE), /* pcrel_offset */ | |
1072 | ||
1073 | HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ | |
1074 | 0, /* rightshift */ | |
1075 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1076 | 32, /* bitsize */ | |
1077 | TRUE, /* pc_relative */ | |
1078 | 0, /* bitpos */ | |
1079 | complain_overflow_dont,/* complain_on_overflow */ | |
1080 | bfd_elf_generic_reloc, /* special_function */ | |
1081 | "R_ARM_ALU_SB_G0_NC", /* name */ | |
1082 | FALSE, /* partial_inplace */ | |
1083 | 0xffffffff, /* src_mask */ | |
1084 | 0xffffffff, /* dst_mask */ | |
1085 | TRUE), /* pcrel_offset */ | |
1086 | ||
1087 | HOWTO (R_ARM_ALU_SB_G0, /* type */ | |
1088 | 0, /* rightshift */ | |
1089 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1090 | 32, /* bitsize */ | |
1091 | TRUE, /* pc_relative */ | |
1092 | 0, /* bitpos */ | |
1093 | complain_overflow_dont,/* complain_on_overflow */ | |
1094 | bfd_elf_generic_reloc, /* special_function */ | |
1095 | "R_ARM_ALU_SB_G0", /* name */ | |
1096 | FALSE, /* partial_inplace */ | |
1097 | 0xffffffff, /* src_mask */ | |
1098 | 0xffffffff, /* dst_mask */ | |
1099 | TRUE), /* pcrel_offset */ | |
1100 | ||
1101 | HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ | |
1102 | 0, /* rightshift */ | |
1103 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1104 | 32, /* bitsize */ | |
1105 | TRUE, /* pc_relative */ | |
1106 | 0, /* bitpos */ | |
1107 | complain_overflow_dont,/* complain_on_overflow */ | |
1108 | bfd_elf_generic_reloc, /* special_function */ | |
1109 | "R_ARM_ALU_SB_G1_NC", /* name */ | |
1110 | FALSE, /* partial_inplace */ | |
1111 | 0xffffffff, /* src_mask */ | |
1112 | 0xffffffff, /* dst_mask */ | |
1113 | TRUE), /* pcrel_offset */ | |
1114 | ||
1115 | HOWTO (R_ARM_ALU_SB_G1, /* type */ | |
1116 | 0, /* rightshift */ | |
1117 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1118 | 32, /* bitsize */ | |
1119 | TRUE, /* pc_relative */ | |
1120 | 0, /* bitpos */ | |
1121 | complain_overflow_dont,/* complain_on_overflow */ | |
1122 | bfd_elf_generic_reloc, /* special_function */ | |
1123 | "R_ARM_ALU_SB_G1", /* name */ | |
1124 | FALSE, /* partial_inplace */ | |
1125 | 0xffffffff, /* src_mask */ | |
1126 | 0xffffffff, /* dst_mask */ | |
1127 | TRUE), /* pcrel_offset */ | |
1128 | ||
1129 | HOWTO (R_ARM_ALU_SB_G2, /* type */ | |
1130 | 0, /* rightshift */ | |
1131 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1132 | 32, /* bitsize */ | |
1133 | TRUE, /* pc_relative */ | |
1134 | 0, /* bitpos */ | |
1135 | complain_overflow_dont,/* complain_on_overflow */ | |
1136 | bfd_elf_generic_reloc, /* special_function */ | |
1137 | "R_ARM_ALU_SB_G2", /* name */ | |
1138 | FALSE, /* partial_inplace */ | |
1139 | 0xffffffff, /* src_mask */ | |
1140 | 0xffffffff, /* dst_mask */ | |
1141 | TRUE), /* pcrel_offset */ | |
1142 | ||
1143 | HOWTO (R_ARM_LDR_SB_G0, /* type */ | |
1144 | 0, /* rightshift */ | |
1145 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1146 | 32, /* bitsize */ | |
1147 | TRUE, /* pc_relative */ | |
1148 | 0, /* bitpos */ | |
1149 | complain_overflow_dont,/* complain_on_overflow */ | |
1150 | bfd_elf_generic_reloc, /* special_function */ | |
1151 | "R_ARM_LDR_SB_G0", /* name */ | |
1152 | FALSE, /* partial_inplace */ | |
1153 | 0xffffffff, /* src_mask */ | |
1154 | 0xffffffff, /* dst_mask */ | |
1155 | TRUE), /* pcrel_offset */ | |
1156 | ||
1157 | HOWTO (R_ARM_LDR_SB_G1, /* type */ | |
1158 | 0, /* rightshift */ | |
1159 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1160 | 32, /* bitsize */ | |
1161 | TRUE, /* pc_relative */ | |
1162 | 0, /* bitpos */ | |
1163 | complain_overflow_dont,/* complain_on_overflow */ | |
1164 | bfd_elf_generic_reloc, /* special_function */ | |
1165 | "R_ARM_LDR_SB_G1", /* name */ | |
1166 | FALSE, /* partial_inplace */ | |
1167 | 0xffffffff, /* src_mask */ | |
1168 | 0xffffffff, /* dst_mask */ | |
1169 | TRUE), /* pcrel_offset */ | |
1170 | ||
1171 | HOWTO (R_ARM_LDR_SB_G2, /* type */ | |
1172 | 0, /* rightshift */ | |
1173 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1174 | 32, /* bitsize */ | |
1175 | TRUE, /* pc_relative */ | |
1176 | 0, /* bitpos */ | |
1177 | complain_overflow_dont,/* complain_on_overflow */ | |
1178 | bfd_elf_generic_reloc, /* special_function */ | |
1179 | "R_ARM_LDR_SB_G2", /* name */ | |
1180 | FALSE, /* partial_inplace */ | |
1181 | 0xffffffff, /* src_mask */ | |
1182 | 0xffffffff, /* dst_mask */ | |
1183 | TRUE), /* pcrel_offset */ | |
1184 | ||
1185 | HOWTO (R_ARM_LDRS_SB_G0, /* type */ | |
1186 | 0, /* rightshift */ | |
1187 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1188 | 32, /* bitsize */ | |
1189 | TRUE, /* pc_relative */ | |
1190 | 0, /* bitpos */ | |
1191 | complain_overflow_dont,/* complain_on_overflow */ | |
1192 | bfd_elf_generic_reloc, /* special_function */ | |
1193 | "R_ARM_LDRS_SB_G0", /* name */ | |
1194 | FALSE, /* partial_inplace */ | |
1195 | 0xffffffff, /* src_mask */ | |
1196 | 0xffffffff, /* dst_mask */ | |
1197 | TRUE), /* pcrel_offset */ | |
1198 | ||
1199 | HOWTO (R_ARM_LDRS_SB_G1, /* type */ | |
1200 | 0, /* rightshift */ | |
1201 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1202 | 32, /* bitsize */ | |
1203 | TRUE, /* pc_relative */ | |
1204 | 0, /* bitpos */ | |
1205 | complain_overflow_dont,/* complain_on_overflow */ | |
1206 | bfd_elf_generic_reloc, /* special_function */ | |
1207 | "R_ARM_LDRS_SB_G1", /* name */ | |
1208 | FALSE, /* partial_inplace */ | |
1209 | 0xffffffff, /* src_mask */ | |
1210 | 0xffffffff, /* dst_mask */ | |
1211 | TRUE), /* pcrel_offset */ | |
1212 | ||
1213 | HOWTO (R_ARM_LDRS_SB_G2, /* type */ | |
1214 | 0, /* rightshift */ | |
1215 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1216 | 32, /* bitsize */ | |
1217 | TRUE, /* pc_relative */ | |
1218 | 0, /* bitpos */ | |
1219 | complain_overflow_dont,/* complain_on_overflow */ | |
1220 | bfd_elf_generic_reloc, /* special_function */ | |
1221 | "R_ARM_LDRS_SB_G2", /* name */ | |
1222 | FALSE, /* partial_inplace */ | |
1223 | 0xffffffff, /* src_mask */ | |
1224 | 0xffffffff, /* dst_mask */ | |
1225 | TRUE), /* pcrel_offset */ | |
1226 | ||
1227 | HOWTO (R_ARM_LDC_SB_G0, /* type */ | |
1228 | 0, /* rightshift */ | |
1229 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1230 | 32, /* bitsize */ | |
1231 | TRUE, /* pc_relative */ | |
1232 | 0, /* bitpos */ | |
1233 | complain_overflow_dont,/* complain_on_overflow */ | |
1234 | bfd_elf_generic_reloc, /* special_function */ | |
1235 | "R_ARM_LDC_SB_G0", /* name */ | |
1236 | FALSE, /* partial_inplace */ | |
1237 | 0xffffffff, /* src_mask */ | |
1238 | 0xffffffff, /* dst_mask */ | |
1239 | TRUE), /* pcrel_offset */ | |
1240 | ||
1241 | HOWTO (R_ARM_LDC_SB_G1, /* type */ | |
1242 | 0, /* rightshift */ | |
1243 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1244 | 32, /* bitsize */ | |
1245 | TRUE, /* pc_relative */ | |
1246 | 0, /* bitpos */ | |
1247 | complain_overflow_dont,/* complain_on_overflow */ | |
1248 | bfd_elf_generic_reloc, /* special_function */ | |
1249 | "R_ARM_LDC_SB_G1", /* name */ | |
1250 | FALSE, /* partial_inplace */ | |
1251 | 0xffffffff, /* src_mask */ | |
1252 | 0xffffffff, /* dst_mask */ | |
1253 | TRUE), /* pcrel_offset */ | |
1254 | ||
1255 | HOWTO (R_ARM_LDC_SB_G2, /* type */ | |
1256 | 0, /* rightshift */ | |
1257 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1258 | 32, /* bitsize */ | |
1259 | TRUE, /* pc_relative */ | |
1260 | 0, /* bitpos */ | |
1261 | complain_overflow_dont,/* complain_on_overflow */ | |
1262 | bfd_elf_generic_reloc, /* special_function */ | |
1263 | "R_ARM_LDC_SB_G2", /* name */ | |
1264 | FALSE, /* partial_inplace */ | |
1265 | 0xffffffff, /* src_mask */ | |
1266 | 0xffffffff, /* dst_mask */ | |
1267 | TRUE), /* pcrel_offset */ | |
1268 | ||
1269 | /* End of group relocations. */ | |
c19d1205 | 1270 | |
c19d1205 ZW |
1271 | HOWTO (R_ARM_MOVW_BREL_NC, /* type */ |
1272 | 0, /* rightshift */ | |
1273 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1274 | 16, /* bitsize */ | |
1275 | FALSE, /* pc_relative */ | |
1276 | 0, /* bitpos */ | |
1277 | complain_overflow_dont,/* complain_on_overflow */ | |
1278 | bfd_elf_generic_reloc, /* special_function */ | |
1279 | "R_ARM_MOVW_BREL_NC", /* name */ | |
1280 | FALSE, /* partial_inplace */ | |
1281 | 0x0000ffff, /* src_mask */ | |
1282 | 0x0000ffff, /* dst_mask */ | |
1283 | FALSE), /* pcrel_offset */ | |
1284 | ||
1285 | HOWTO (R_ARM_MOVT_BREL, /* type */ | |
1286 | 0, /* rightshift */ | |
1287 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1288 | 16, /* bitsize */ | |
1289 | FALSE, /* pc_relative */ | |
1290 | 0, /* bitpos */ | |
1291 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1292 | bfd_elf_generic_reloc, /* special_function */ | |
1293 | "R_ARM_MOVT_BREL", /* name */ | |
1294 | FALSE, /* partial_inplace */ | |
1295 | 0x0000ffff, /* src_mask */ | |
1296 | 0x0000ffff, /* dst_mask */ | |
1297 | FALSE), /* pcrel_offset */ | |
1298 | ||
1299 | HOWTO (R_ARM_MOVW_BREL, /* type */ | |
1300 | 0, /* rightshift */ | |
1301 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1302 | 16, /* bitsize */ | |
1303 | FALSE, /* pc_relative */ | |
1304 | 0, /* bitpos */ | |
1305 | complain_overflow_dont,/* complain_on_overflow */ | |
1306 | bfd_elf_generic_reloc, /* special_function */ | |
1307 | "R_ARM_MOVW_BREL", /* name */ | |
1308 | FALSE, /* partial_inplace */ | |
1309 | 0x0000ffff, /* src_mask */ | |
1310 | 0x0000ffff, /* dst_mask */ | |
1311 | FALSE), /* pcrel_offset */ | |
1312 | ||
1313 | HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ | |
1314 | 0, /* rightshift */ | |
1315 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1316 | 16, /* bitsize */ | |
1317 | FALSE, /* pc_relative */ | |
1318 | 0, /* bitpos */ | |
1319 | complain_overflow_dont,/* complain_on_overflow */ | |
1320 | bfd_elf_generic_reloc, /* special_function */ | |
1321 | "R_ARM_THM_MOVW_BREL_NC",/* name */ | |
1322 | FALSE, /* partial_inplace */ | |
1323 | 0x040f70ff, /* src_mask */ | |
1324 | 0x040f70ff, /* dst_mask */ | |
1325 | FALSE), /* pcrel_offset */ | |
1326 | ||
1327 | HOWTO (R_ARM_THM_MOVT_BREL, /* type */ | |
1328 | 0, /* rightshift */ | |
1329 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1330 | 16, /* bitsize */ | |
1331 | FALSE, /* pc_relative */ | |
1332 | 0, /* bitpos */ | |
1333 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1334 | bfd_elf_generic_reloc, /* special_function */ | |
1335 | "R_ARM_THM_MOVT_BREL", /* name */ | |
1336 | FALSE, /* partial_inplace */ | |
1337 | 0x040f70ff, /* src_mask */ | |
1338 | 0x040f70ff, /* dst_mask */ | |
1339 | FALSE), /* pcrel_offset */ | |
1340 | ||
1341 | HOWTO (R_ARM_THM_MOVW_BREL, /* type */ | |
1342 | 0, /* rightshift */ | |
1343 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1344 | 16, /* bitsize */ | |
1345 | FALSE, /* pc_relative */ | |
1346 | 0, /* bitpos */ | |
1347 | complain_overflow_dont,/* complain_on_overflow */ | |
1348 | bfd_elf_generic_reloc, /* special_function */ | |
1349 | "R_ARM_THM_MOVW_BREL", /* name */ | |
1350 | FALSE, /* partial_inplace */ | |
1351 | 0x040f70ff, /* src_mask */ | |
1352 | 0x040f70ff, /* dst_mask */ | |
1353 | FALSE), /* pcrel_offset */ | |
1354 | ||
8029a119 | 1355 | EMPTY_HOWTO (90), /* Unallocated. */ |
c19d1205 ZW |
1356 | EMPTY_HOWTO (91), |
1357 | EMPTY_HOWTO (92), | |
1358 | EMPTY_HOWTO (93), | |
1359 | ||
1360 | HOWTO (R_ARM_PLT32_ABS, /* type */ | |
1361 | 0, /* rightshift */ | |
1362 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1363 | 32, /* bitsize */ | |
1364 | FALSE, /* pc_relative */ | |
1365 | 0, /* bitpos */ | |
1366 | complain_overflow_dont,/* complain_on_overflow */ | |
1367 | bfd_elf_generic_reloc, /* special_function */ | |
1368 | "R_ARM_PLT32_ABS", /* name */ | |
1369 | FALSE, /* partial_inplace */ | |
1370 | 0xffffffff, /* src_mask */ | |
1371 | 0xffffffff, /* dst_mask */ | |
1372 | FALSE), /* pcrel_offset */ | |
1373 | ||
1374 | HOWTO (R_ARM_GOT_ABS, /* type */ | |
1375 | 0, /* rightshift */ | |
1376 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1377 | 32, /* bitsize */ | |
1378 | FALSE, /* pc_relative */ | |
1379 | 0, /* bitpos */ | |
1380 | complain_overflow_dont,/* complain_on_overflow */ | |
1381 | bfd_elf_generic_reloc, /* special_function */ | |
1382 | "R_ARM_GOT_ABS", /* name */ | |
1383 | FALSE, /* partial_inplace */ | |
1384 | 0xffffffff, /* src_mask */ | |
1385 | 0xffffffff, /* dst_mask */ | |
1386 | FALSE), /* pcrel_offset */ | |
1387 | ||
1388 | HOWTO (R_ARM_GOT_PREL, /* type */ | |
1389 | 0, /* rightshift */ | |
1390 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1391 | 32, /* bitsize */ | |
1392 | TRUE, /* pc_relative */ | |
1393 | 0, /* bitpos */ | |
1394 | complain_overflow_dont, /* complain_on_overflow */ | |
1395 | bfd_elf_generic_reloc, /* special_function */ | |
1396 | "R_ARM_GOT_PREL", /* name */ | |
1397 | FALSE, /* partial_inplace */ | |
1398 | 0xffffffff, /* src_mask */ | |
1399 | 0xffffffff, /* dst_mask */ | |
1400 | TRUE), /* pcrel_offset */ | |
1401 | ||
1402 | HOWTO (R_ARM_GOT_BREL12, /* type */ | |
1403 | 0, /* rightshift */ | |
1404 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1405 | 12, /* bitsize */ | |
1406 | FALSE, /* pc_relative */ | |
1407 | 0, /* bitpos */ | |
1408 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1409 | bfd_elf_generic_reloc, /* special_function */ | |
1410 | "R_ARM_GOT_BREL12", /* name */ | |
1411 | FALSE, /* partial_inplace */ | |
1412 | 0x00000fff, /* src_mask */ | |
1413 | 0x00000fff, /* dst_mask */ | |
1414 | FALSE), /* pcrel_offset */ | |
1415 | ||
1416 | HOWTO (R_ARM_GOTOFF12, /* type */ | |
1417 | 0, /* rightshift */ | |
1418 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1419 | 12, /* bitsize */ | |
1420 | FALSE, /* pc_relative */ | |
1421 | 0, /* bitpos */ | |
1422 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1423 | bfd_elf_generic_reloc, /* special_function */ | |
1424 | "R_ARM_GOTOFF12", /* name */ | |
1425 | FALSE, /* partial_inplace */ | |
1426 | 0x00000fff, /* src_mask */ | |
1427 | 0x00000fff, /* dst_mask */ | |
1428 | FALSE), /* pcrel_offset */ | |
1429 | ||
1430 | EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ | |
1431 | ||
1432 | /* GNU extension to record C++ vtable member usage */ | |
1433 | HOWTO (R_ARM_GNU_VTENTRY, /* type */ | |
ba93b8ac DJ |
1434 | 0, /* rightshift */ |
1435 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 | 1436 | 0, /* bitsize */ |
ba93b8ac DJ |
1437 | FALSE, /* pc_relative */ |
1438 | 0, /* bitpos */ | |
c19d1205 ZW |
1439 | complain_overflow_dont, /* complain_on_overflow */ |
1440 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
1441 | "R_ARM_GNU_VTENTRY", /* name */ | |
1442 | FALSE, /* partial_inplace */ | |
1443 | 0, /* src_mask */ | |
1444 | 0, /* dst_mask */ | |
1445 | FALSE), /* pcrel_offset */ | |
1446 | ||
1447 | /* GNU extension to record C++ vtable hierarchy */ | |
1448 | HOWTO (R_ARM_GNU_VTINHERIT, /* type */ | |
1449 | 0, /* rightshift */ | |
1450 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1451 | 0, /* bitsize */ | |
1452 | FALSE, /* pc_relative */ | |
1453 | 0, /* bitpos */ | |
1454 | complain_overflow_dont, /* complain_on_overflow */ | |
1455 | NULL, /* special_function */ | |
1456 | "R_ARM_GNU_VTINHERIT", /* name */ | |
1457 | FALSE, /* partial_inplace */ | |
1458 | 0, /* src_mask */ | |
1459 | 0, /* dst_mask */ | |
1460 | FALSE), /* pcrel_offset */ | |
1461 | ||
1462 | HOWTO (R_ARM_THM_JUMP11, /* type */ | |
1463 | 1, /* rightshift */ | |
1464 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1465 | 11, /* bitsize */ | |
1466 | TRUE, /* pc_relative */ | |
1467 | 0, /* bitpos */ | |
1468 | complain_overflow_signed, /* complain_on_overflow */ | |
1469 | bfd_elf_generic_reloc, /* special_function */ | |
1470 | "R_ARM_THM_JUMP11", /* name */ | |
1471 | FALSE, /* partial_inplace */ | |
1472 | 0x000007ff, /* src_mask */ | |
1473 | 0x000007ff, /* dst_mask */ | |
1474 | TRUE), /* pcrel_offset */ | |
1475 | ||
1476 | HOWTO (R_ARM_THM_JUMP8, /* type */ | |
1477 | 1, /* rightshift */ | |
1478 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
1479 | 8, /* bitsize */ | |
1480 | TRUE, /* pc_relative */ | |
1481 | 0, /* bitpos */ | |
1482 | complain_overflow_signed, /* complain_on_overflow */ | |
1483 | bfd_elf_generic_reloc, /* special_function */ | |
1484 | "R_ARM_THM_JUMP8", /* name */ | |
1485 | FALSE, /* partial_inplace */ | |
1486 | 0x000000ff, /* src_mask */ | |
1487 | 0x000000ff, /* dst_mask */ | |
1488 | TRUE), /* pcrel_offset */ | |
ba93b8ac | 1489 | |
c19d1205 ZW |
1490 | /* TLS relocations */ |
1491 | HOWTO (R_ARM_TLS_GD32, /* type */ | |
ba93b8ac DJ |
1492 | 0, /* rightshift */ |
1493 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1494 | 32, /* bitsize */ | |
1495 | FALSE, /* pc_relative */ | |
1496 | 0, /* bitpos */ | |
1497 | complain_overflow_bitfield,/* complain_on_overflow */ | |
c19d1205 ZW |
1498 | NULL, /* special_function */ |
1499 | "R_ARM_TLS_GD32", /* name */ | |
ba93b8ac DJ |
1500 | TRUE, /* partial_inplace */ |
1501 | 0xffffffff, /* src_mask */ | |
1502 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1503 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1504 | |
ba93b8ac DJ |
1505 | HOWTO (R_ARM_TLS_LDM32, /* type */ |
1506 | 0, /* rightshift */ | |
1507 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1508 | 32, /* bitsize */ | |
1509 | FALSE, /* pc_relative */ | |
1510 | 0, /* bitpos */ | |
1511 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1512 | bfd_elf_generic_reloc, /* special_function */ | |
1513 | "R_ARM_TLS_LDM32", /* name */ | |
1514 | TRUE, /* partial_inplace */ | |
1515 | 0xffffffff, /* src_mask */ | |
1516 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1517 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1518 | |
c19d1205 | 1519 | HOWTO (R_ARM_TLS_LDO32, /* type */ |
ba93b8ac DJ |
1520 | 0, /* rightshift */ |
1521 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1522 | 32, /* bitsize */ | |
1523 | FALSE, /* pc_relative */ | |
1524 | 0, /* bitpos */ | |
1525 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1526 | bfd_elf_generic_reloc, /* special_function */ | |
c19d1205 | 1527 | "R_ARM_TLS_LDO32", /* name */ |
ba93b8ac DJ |
1528 | TRUE, /* partial_inplace */ |
1529 | 0xffffffff, /* src_mask */ | |
1530 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1531 | FALSE), /* pcrel_offset */ |
ba93b8ac | 1532 | |
ba93b8ac DJ |
1533 | HOWTO (R_ARM_TLS_IE32, /* type */ |
1534 | 0, /* rightshift */ | |
1535 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1536 | 32, /* bitsize */ | |
1537 | FALSE, /* pc_relative */ | |
1538 | 0, /* bitpos */ | |
1539 | complain_overflow_bitfield,/* complain_on_overflow */ | |
1540 | NULL, /* special_function */ | |
1541 | "R_ARM_TLS_IE32", /* name */ | |
1542 | TRUE, /* partial_inplace */ | |
1543 | 0xffffffff, /* src_mask */ | |
1544 | 0xffffffff, /* dst_mask */ | |
c19d1205 | 1545 | FALSE), /* pcrel_offset */ |
7f266840 | 1546 | |
c19d1205 | 1547 | HOWTO (R_ARM_TLS_LE32, /* type */ |
7f266840 DJ |
1548 | 0, /* rightshift */ |
1549 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 | 1550 | 32, /* bitsize */ |
7f266840 DJ |
1551 | FALSE, /* pc_relative */ |
1552 | 0, /* bitpos */ | |
c19d1205 ZW |
1553 | complain_overflow_bitfield,/* complain_on_overflow */ |
1554 | bfd_elf_generic_reloc, /* special_function */ | |
1555 | "R_ARM_TLS_LE32", /* name */ | |
1556 | TRUE, /* partial_inplace */ | |
1557 | 0xffffffff, /* src_mask */ | |
1558 | 0xffffffff, /* dst_mask */ | |
1559 | FALSE), /* pcrel_offset */ | |
7f266840 | 1560 | |
c19d1205 ZW |
1561 | HOWTO (R_ARM_TLS_LDO12, /* type */ |
1562 | 0, /* rightshift */ | |
1563 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1564 | 12, /* bitsize */ | |
1565 | FALSE, /* pc_relative */ | |
7f266840 | 1566 | 0, /* bitpos */ |
c19d1205 | 1567 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1568 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1569 | "R_ARM_TLS_LDO12", /* name */ |
7f266840 | 1570 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1571 | 0x00000fff, /* src_mask */ |
1572 | 0x00000fff, /* dst_mask */ | |
1573 | FALSE), /* pcrel_offset */ | |
7f266840 | 1574 | |
c19d1205 ZW |
1575 | HOWTO (R_ARM_TLS_LE12, /* type */ |
1576 | 0, /* rightshift */ | |
1577 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
1578 | 12, /* bitsize */ | |
1579 | FALSE, /* pc_relative */ | |
7f266840 | 1580 | 0, /* bitpos */ |
c19d1205 | 1581 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1582 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1583 | "R_ARM_TLS_LE12", /* name */ |
7f266840 | 1584 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1585 | 0x00000fff, /* src_mask */ |
1586 | 0x00000fff, /* dst_mask */ | |
1587 | FALSE), /* pcrel_offset */ | |
7f266840 | 1588 | |
c19d1205 | 1589 | HOWTO (R_ARM_TLS_IE12GP, /* type */ |
7f266840 DJ |
1590 | 0, /* rightshift */ |
1591 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
c19d1205 ZW |
1592 | 12, /* bitsize */ |
1593 | FALSE, /* pc_relative */ | |
7f266840 | 1594 | 0, /* bitpos */ |
c19d1205 | 1595 | complain_overflow_bitfield,/* complain_on_overflow */ |
7f266840 | 1596 | bfd_elf_generic_reloc, /* special_function */ |
c19d1205 | 1597 | "R_ARM_TLS_IE12GP", /* name */ |
7f266840 | 1598 | FALSE, /* partial_inplace */ |
c19d1205 ZW |
1599 | 0x00000fff, /* src_mask */ |
1600 | 0x00000fff, /* dst_mask */ | |
1601 | FALSE), /* pcrel_offset */ | |
1602 | }; | |
1603 | ||
1604 | /* 112-127 private relocations | |
1605 | 128 R_ARM_ME_TOO, obsolete | |
1606 | 129-255 unallocated in AAELF. | |
7f266840 | 1607 | |
c19d1205 ZW |
1608 | 249-255 extended, currently unused, relocations: */ |
1609 | ||
4962c51a | 1610 | static reloc_howto_type elf32_arm_howto_table_2[4] = |
7f266840 DJ |
1611 | { |
1612 | HOWTO (R_ARM_RREL32, /* type */ | |
1613 | 0, /* rightshift */ | |
1614 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1615 | 0, /* bitsize */ | |
1616 | FALSE, /* pc_relative */ | |
1617 | 0, /* bitpos */ | |
1618 | complain_overflow_dont,/* complain_on_overflow */ | |
1619 | bfd_elf_generic_reloc, /* special_function */ | |
1620 | "R_ARM_RREL32", /* name */ | |
1621 | FALSE, /* partial_inplace */ | |
1622 | 0, /* src_mask */ | |
1623 | 0, /* dst_mask */ | |
1624 | FALSE), /* pcrel_offset */ | |
1625 | ||
1626 | HOWTO (R_ARM_RABS32, /* type */ | |
1627 | 0, /* rightshift */ | |
1628 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1629 | 0, /* bitsize */ | |
1630 | FALSE, /* pc_relative */ | |
1631 | 0, /* bitpos */ | |
1632 | complain_overflow_dont,/* complain_on_overflow */ | |
1633 | bfd_elf_generic_reloc, /* special_function */ | |
1634 | "R_ARM_RABS32", /* name */ | |
1635 | FALSE, /* partial_inplace */ | |
1636 | 0, /* src_mask */ | |
1637 | 0, /* dst_mask */ | |
1638 | FALSE), /* pcrel_offset */ | |
1639 | ||
1640 | HOWTO (R_ARM_RPC24, /* type */ | |
1641 | 0, /* rightshift */ | |
1642 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1643 | 0, /* bitsize */ | |
1644 | FALSE, /* pc_relative */ | |
1645 | 0, /* bitpos */ | |
1646 | complain_overflow_dont,/* complain_on_overflow */ | |
1647 | bfd_elf_generic_reloc, /* special_function */ | |
1648 | "R_ARM_RPC24", /* name */ | |
1649 | FALSE, /* partial_inplace */ | |
1650 | 0, /* src_mask */ | |
1651 | 0, /* dst_mask */ | |
1652 | FALSE), /* pcrel_offset */ | |
1653 | ||
1654 | HOWTO (R_ARM_RBASE, /* type */ | |
1655 | 0, /* rightshift */ | |
1656 | 0, /* size (0 = byte, 1 = short, 2 = long) */ | |
1657 | 0, /* bitsize */ | |
1658 | FALSE, /* pc_relative */ | |
1659 | 0, /* bitpos */ | |
1660 | complain_overflow_dont,/* complain_on_overflow */ | |
1661 | bfd_elf_generic_reloc, /* special_function */ | |
1662 | "R_ARM_RBASE", /* name */ | |
1663 | FALSE, /* partial_inplace */ | |
1664 | 0, /* src_mask */ | |
1665 | 0, /* dst_mask */ | |
1666 | FALSE) /* pcrel_offset */ | |
1667 | }; | |
1668 | ||
1669 | static reloc_howto_type * | |
1670 | elf32_arm_howto_from_type (unsigned int r_type) | |
1671 | { | |
906e58ca | 1672 | if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) |
c19d1205 | 1673 | return &elf32_arm_howto_table_1[r_type]; |
ba93b8ac | 1674 | |
c19d1205 | 1675 | if (r_type >= R_ARM_RREL32 |
906e58ca | 1676 | && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2)) |
4962c51a | 1677 | return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32]; |
7f266840 | 1678 | |
c19d1205 | 1679 | return NULL; |
7f266840 DJ |
1680 | } |
1681 | ||
1682 | static void | |
1683 | elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc, | |
1684 | Elf_Internal_Rela * elf_reloc) | |
1685 | { | |
1686 | unsigned int r_type; | |
1687 | ||
1688 | r_type = ELF32_R_TYPE (elf_reloc->r_info); | |
1689 | bfd_reloc->howto = elf32_arm_howto_from_type (r_type); | |
1690 | } | |
1691 | ||
1692 | struct elf32_arm_reloc_map | |
1693 | { | |
1694 | bfd_reloc_code_real_type bfd_reloc_val; | |
1695 | unsigned char elf_reloc_val; | |
1696 | }; | |
1697 | ||
1698 | /* All entries in this list must also be present in elf32_arm_howto_table. */ | |
1699 | static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = | |
1700 | { | |
1701 | {BFD_RELOC_NONE, R_ARM_NONE}, | |
1702 | {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, | |
39b41c9c PB |
1703 | {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, |
1704 | {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, | |
7f266840 DJ |
1705 | {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, |
1706 | {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, | |
1707 | {BFD_RELOC_32, R_ARM_ABS32}, | |
1708 | {BFD_RELOC_32_PCREL, R_ARM_REL32}, | |
1709 | {BFD_RELOC_8, R_ARM_ABS8}, | |
1710 | {BFD_RELOC_16, R_ARM_ABS16}, | |
1711 | {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, | |
1712 | {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, | |
c19d1205 ZW |
1713 | {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, |
1714 | {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, | |
1715 | {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, | |
1716 | {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, | |
1717 | {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, | |
1718 | {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, | |
7f266840 DJ |
1719 | {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, |
1720 | {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, | |
1721 | {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, | |
c19d1205 | 1722 | {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, |
7f266840 DJ |
1723 | {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, |
1724 | {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, | |
1725 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
1726 | {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, | |
1727 | {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, | |
1728 | {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, | |
1729 | {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, | |
ba93b8ac DJ |
1730 | {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, |
1731 | {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, | |
1732 | {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, | |
1733 | {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, | |
1734 | {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, | |
1735 | {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, | |
1736 | {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, | |
1737 | {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, | |
1738 | {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, | |
1739 | {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, | |
c19d1205 ZW |
1740 | {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, |
1741 | {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, | |
b6895b4f PB |
1742 | {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, |
1743 | {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, | |
1744 | {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, | |
1745 | {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, | |
1746 | {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, | |
1747 | {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, | |
1748 | {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, | |
1749 | {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, | |
4962c51a MS |
1750 | {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, |
1751 | {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, | |
1752 | {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, | |
1753 | {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, | |
1754 | {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, | |
1755 | {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, | |
1756 | {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, | |
1757 | {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, | |
1758 | {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, | |
1759 | {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, | |
1760 | {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, | |
1761 | {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, | |
1762 | {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, | |
1763 | {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, | |
1764 | {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, | |
1765 | {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, | |
1766 | {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, | |
1767 | {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, | |
1768 | {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, | |
1769 | {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, | |
1770 | {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, | |
1771 | {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, | |
1772 | {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, | |
1773 | {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, | |
1774 | {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, | |
1775 | {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, | |
1776 | {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, | |
845b51d6 PB |
1777 | {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, |
1778 | {BFD_RELOC_ARM_V4BX, R_ARM_V4BX} | |
7f266840 DJ |
1779 | }; |
1780 | ||
1781 | static reloc_howto_type * | |
f1c71a59 ZW |
1782 | elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
1783 | bfd_reloc_code_real_type code) | |
7f266840 DJ |
1784 | { |
1785 | unsigned int i; | |
8029a119 | 1786 | |
906e58ca | 1787 | for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) |
c19d1205 ZW |
1788 | if (elf32_arm_reloc_map[i].bfd_reloc_val == code) |
1789 | return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); | |
7f266840 | 1790 | |
c19d1205 | 1791 | return NULL; |
7f266840 DJ |
1792 | } |
1793 | ||
157090f7 AM |
1794 | static reloc_howto_type * |
1795 | elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
1796 | const char *r_name) | |
1797 | { | |
1798 | unsigned int i; | |
1799 | ||
906e58ca | 1800 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) |
157090f7 AM |
1801 | if (elf32_arm_howto_table_1[i].name != NULL |
1802 | && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) | |
1803 | return &elf32_arm_howto_table_1[i]; | |
1804 | ||
906e58ca | 1805 | for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) |
157090f7 AM |
1806 | if (elf32_arm_howto_table_2[i].name != NULL |
1807 | && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) | |
1808 | return &elf32_arm_howto_table_2[i]; | |
1809 | ||
1810 | return NULL; | |
1811 | } | |
1812 | ||
906e58ca NC |
1813 | /* Support for core dump NOTE sections. */ |
1814 | ||
7f266840 | 1815 | static bfd_boolean |
f1c71a59 | 1816 | elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1817 | { |
1818 | int offset; | |
1819 | size_t size; | |
1820 | ||
1821 | switch (note->descsz) | |
1822 | { | |
1823 | default: | |
1824 | return FALSE; | |
1825 | ||
8029a119 | 1826 | case 148: /* Linux/ARM 32-bit. */ |
7f266840 DJ |
1827 | /* pr_cursig */ |
1828 | elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12); | |
1829 | ||
1830 | /* pr_pid */ | |
1831 | elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24); | |
1832 | ||
1833 | /* pr_reg */ | |
1834 | offset = 72; | |
1835 | size = 72; | |
1836 | ||
1837 | break; | |
1838 | } | |
1839 | ||
1840 | /* Make a ".reg/999" section. */ | |
1841 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
1842 | size, note->descpos + offset); | |
1843 | } | |
1844 | ||
1845 | static bfd_boolean | |
f1c71a59 | 1846 | elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) |
7f266840 DJ |
1847 | { |
1848 | switch (note->descsz) | |
1849 | { | |
1850 | default: | |
1851 | return FALSE; | |
1852 | ||
8029a119 | 1853 | case 124: /* Linux/ARM elf_prpsinfo. */ |
7f266840 DJ |
1854 | elf_tdata (abfd)->core_program |
1855 | = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); | |
1856 | elf_tdata (abfd)->core_command | |
1857 | = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); | |
1858 | } | |
1859 | ||
1860 | /* Note that for some reason, a spurious space is tacked | |
1861 | onto the end of the args in some (at least one anyway) | |
1862 | implementations, so strip it off if it exists. */ | |
7f266840 DJ |
1863 | { |
1864 | char *command = elf_tdata (abfd)->core_command; | |
1865 | int n = strlen (command); | |
1866 | ||
1867 | if (0 < n && command[n - 1] == ' ') | |
1868 | command[n - 1] = '\0'; | |
1869 | } | |
1870 | ||
1871 | return TRUE; | |
1872 | } | |
1873 | ||
1874 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec | |
1875 | #define TARGET_LITTLE_NAME "elf32-littlearm" | |
1876 | #define TARGET_BIG_SYM bfd_elf32_bigarm_vec | |
1877 | #define TARGET_BIG_NAME "elf32-bigarm" | |
1878 | ||
1879 | #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus | |
1880 | #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo | |
1881 | ||
252b5132 RH |
1882 | typedef unsigned long int insn32; |
1883 | typedef unsigned short int insn16; | |
1884 | ||
3a4a14e9 PB |
1885 | /* In lieu of proper flags, assume all EABIv4 or later objects are |
1886 | interworkable. */ | |
57e8b36a | 1887 | #define INTERWORK_FLAG(abfd) \ |
3a4a14e9 | 1888 | (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ |
3e6b1042 DJ |
1889 | || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ |
1890 | || ((abfd)->flags & BFD_LINKER_CREATED)) | |
9b485d32 | 1891 | |
252b5132 RH |
1892 | /* The linker script knows the section names for placement. |
1893 | The entry_names are used to do simple name mangling on the stubs. | |
1894 | Given a function name, and its type, the stub can be found. The | |
9b485d32 | 1895 | name can be changed. The only requirement is the %s be present. */ |
252b5132 RH |
1896 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
1897 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
1898 | ||
1899 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
1900 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
1901 | ||
c7b8f16e JB |
1902 | #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" |
1903 | #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" | |
1904 | ||
845b51d6 PB |
1905 | #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" |
1906 | #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" | |
1907 | ||
7413f23f DJ |
1908 | #define STUB_ENTRY_NAME "__%s_veneer" |
1909 | ||
252b5132 RH |
1910 | /* The name of the dynamic interpreter. This is put in the .interp |
1911 | section. */ | |
1912 | #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" | |
1913 | ||
5e681ec4 PB |
1914 | #ifdef FOUR_WORD_PLT |
1915 | ||
252b5132 RH |
1916 | /* The first entry in a procedure linkage table looks like |
1917 | this. It is set up so that any shared library function that is | |
59f2c4e7 | 1918 | called before the relocation has been set up calls the dynamic |
9b485d32 | 1919 | linker first. */ |
e5a52504 | 1920 | static const bfd_vma elf32_arm_plt0_entry [] = |
5e681ec4 PB |
1921 | { |
1922 | 0xe52de004, /* str lr, [sp, #-4]! */ | |
1923 | 0xe59fe010, /* ldr lr, [pc, #16] */ | |
1924 | 0xe08fe00e, /* add lr, pc, lr */ | |
1925 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
1926 | }; | |
1927 | ||
1928 | /* Subsequent entries in a procedure linkage table look like | |
1929 | this. */ | |
e5a52504 | 1930 | static const bfd_vma elf32_arm_plt_entry [] = |
5e681ec4 PB |
1931 | { |
1932 | 0xe28fc600, /* add ip, pc, #NN */ | |
1933 | 0xe28cca00, /* add ip, ip, #NN */ | |
1934 | 0xe5bcf000, /* ldr pc, [ip, #NN]! */ | |
1935 | 0x00000000, /* unused */ | |
1936 | }; | |
1937 | ||
1938 | #else | |
1939 | ||
5e681ec4 PB |
1940 | /* The first entry in a procedure linkage table looks like |
1941 | this. It is set up so that any shared library function that is | |
1942 | called before the relocation has been set up calls the dynamic | |
1943 | linker first. */ | |
e5a52504 | 1944 | static const bfd_vma elf32_arm_plt0_entry [] = |
917583ad | 1945 | { |
5e681ec4 PB |
1946 | 0xe52de004, /* str lr, [sp, #-4]! */ |
1947 | 0xe59fe004, /* ldr lr, [pc, #4] */ | |
1948 | 0xe08fe00e, /* add lr, pc, lr */ | |
1949 | 0xe5bef008, /* ldr pc, [lr, #8]! */ | |
1950 | 0x00000000, /* &GOT[0] - . */ | |
917583ad | 1951 | }; |
252b5132 RH |
1952 | |
1953 | /* Subsequent entries in a procedure linkage table look like | |
1954 | this. */ | |
e5a52504 | 1955 | static const bfd_vma elf32_arm_plt_entry [] = |
5e681ec4 PB |
1956 | { |
1957 | 0xe28fc600, /* add ip, pc, #0xNN00000 */ | |
1958 | 0xe28cca00, /* add ip, ip, #0xNN000 */ | |
1959 | 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ | |
1960 | }; | |
1961 | ||
1962 | #endif | |
252b5132 | 1963 | |
00a97672 RS |
1964 | /* The format of the first entry in the procedure linkage table |
1965 | for a VxWorks executable. */ | |
1966 | static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = | |
1967 | { | |
1968 | 0xe52dc008, /* str ip,[sp,#-8]! */ | |
1969 | 0xe59fc000, /* ldr ip,[pc] */ | |
1970 | 0xe59cf008, /* ldr pc,[ip,#8] */ | |
1971 | 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ | |
1972 | }; | |
1973 | ||
1974 | /* The format of subsequent entries in a VxWorks executable. */ | |
1975 | static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = | |
1976 | { | |
1977 | 0xe59fc000, /* ldr ip,[pc] */ | |
1978 | 0xe59cf000, /* ldr pc,[ip] */ | |
1979 | 0x00000000, /* .long @got */ | |
1980 | 0xe59fc000, /* ldr ip,[pc] */ | |
1981 | 0xea000000, /* b _PLT */ | |
1982 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
1983 | }; | |
1984 | ||
1985 | /* The format of entries in a VxWorks shared library. */ | |
1986 | static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = | |
1987 | { | |
1988 | 0xe59fc000, /* ldr ip,[pc] */ | |
1989 | 0xe79cf009, /* ldr pc,[ip,r9] */ | |
1990 | 0x00000000, /* .long @got */ | |
1991 | 0xe59fc000, /* ldr ip,[pc] */ | |
1992 | 0xe599f008, /* ldr pc,[r9,#8] */ | |
1993 | 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ | |
1994 | }; | |
1995 | ||
b7693d02 DJ |
1996 | /* An initial stub used if the PLT entry is referenced from Thumb code. */ |
1997 | #define PLT_THUMB_STUB_SIZE 4 | |
1998 | static const bfd_vma elf32_arm_plt_thumb_stub [] = | |
1999 | { | |
2000 | 0x4778, /* bx pc */ | |
2001 | 0x46c0 /* nop */ | |
2002 | }; | |
2003 | ||
e5a52504 MM |
2004 | /* The entries in a PLT when using a DLL-based target with multiple |
2005 | address spaces. */ | |
906e58ca | 2006 | static const bfd_vma elf32_arm_symbian_plt_entry [] = |
e5a52504 | 2007 | { |
83a358aa | 2008 | 0xe51ff004, /* ldr pc, [pc, #-4] */ |
e5a52504 MM |
2009 | 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ |
2010 | }; | |
2011 | ||
906e58ca NC |
2012 | #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) |
2013 | #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) | |
2014 | #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) | |
2015 | #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) | |
2016 | #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) | |
2017 | #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) | |
2018 | ||
461a49ca DJ |
2019 | enum stub_insn_type |
2020 | { | |
2021 | THUMB16_TYPE = 1, | |
2022 | THUMB32_TYPE, | |
2023 | ARM_TYPE, | |
2024 | DATA_TYPE | |
2025 | }; | |
2026 | ||
48229727 JB |
2027 | #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} |
2028 | /* A bit of a hack. A Thumb conditional branch, in which the proper condition | |
2029 | is inserted in arm_build_one_stub(). */ | |
2030 | #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} | |
2031 | #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} | |
2032 | #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} | |
2033 | #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} | |
2034 | #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} | |
2035 | #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} | |
461a49ca DJ |
2036 | |
2037 | typedef struct | |
2038 | { | |
2039 | bfd_vma data; | |
2040 | enum stub_insn_type type; | |
ebe24dd4 | 2041 | unsigned int r_type; |
461a49ca DJ |
2042 | int reloc_addend; |
2043 | } insn_sequence; | |
2044 | ||
fea2b4d6 CL |
2045 | /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx |
2046 | to reach the stub if necessary. */ | |
461a49ca | 2047 | static const insn_sequence elf32_arm_stub_long_branch_any_any[] = |
906e58ca | 2048 | { |
461a49ca DJ |
2049 | ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */ |
2050 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2051 | }; |
2052 | ||
fea2b4d6 CL |
2053 | /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not |
2054 | available. */ | |
461a49ca | 2055 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = |
906e58ca | 2056 | { |
461a49ca DJ |
2057 | ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ |
2058 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2059 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2060 | }; |
2061 | ||
d3626fb0 | 2062 | /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ |
461a49ca | 2063 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = |
906e58ca | 2064 | { |
461a49ca DJ |
2065 | THUMB16_INSN(0xb401), /* push {r0} */ |
2066 | THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */ | |
2067 | THUMB16_INSN(0x4684), /* mov ip, r0 */ | |
2068 | THUMB16_INSN(0xbc01), /* pop {r0} */ | |
2069 | THUMB16_INSN(0x4760), /* bx ip */ | |
2070 | THUMB16_INSN(0xbf00), /* nop */ | |
2071 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2072 | }; |
2073 | ||
d3626fb0 CL |
2074 | /* V4T Thumb -> Thumb long branch stub. Using the stack is not |
2075 | allowed. */ | |
2076 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = | |
2077 | { | |
2078 | THUMB16_INSN(0x4778), /* bx pc */ | |
2079 | THUMB16_INSN(0x46c0), /* nop */ | |
2080 | ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ | |
2081 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2082 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
2083 | }; | |
2084 | ||
fea2b4d6 CL |
2085 | /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not |
2086 | available. */ | |
461a49ca | 2087 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = |
906e58ca | 2088 | { |
461a49ca DJ |
2089 | THUMB16_INSN(0x4778), /* bx pc */ |
2090 | THUMB16_INSN(0x46c0), /* nop */ | |
2091 | ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */ | |
2092 | DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ | |
906e58ca NC |
2093 | }; |
2094 | ||
fea2b4d6 CL |
2095 | /* V4T Thumb -> ARM short branch stub. Shorter variant of the above |
2096 | one, when the destination is close enough. */ | |
461a49ca | 2097 | static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = |
c820be07 | 2098 | { |
461a49ca DJ |
2099 | THUMB16_INSN(0x4778), /* bx pc */ |
2100 | THUMB16_INSN(0x46c0), /* nop */ | |
2101 | ARM_REL_INSN(0xea000000, -8), /* b (X-8) */ | |
c820be07 NC |
2102 | }; |
2103 | ||
cf3eccff | 2104 | /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use |
fea2b4d6 | 2105 | blx to reach the stub if necessary. */ |
cf3eccff | 2106 | static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = |
906e58ca | 2107 | { |
461a49ca DJ |
2108 | ARM_INSN(0xe59fc000), /* ldr r12, [pc] */ |
2109 | ARM_INSN(0xe08ff00c), /* add pc, pc, ip */ | |
2110 | DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ | |
906e58ca NC |
2111 | }; |
2112 | ||
cf3eccff DJ |
2113 | /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use |
2114 | blx to reach the stub if necessary. We can not add into pc; | |
2115 | it is not guaranteed to mode switch (different in ARMv6 and | |
2116 | ARMv7). */ | |
2117 | static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = | |
2118 | { | |
2119 | ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */ | |
2120 | ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ | |
2121 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2122 | DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2123 | }; | |
2124 | ||
ebe24dd4 CL |
2125 | /* V4T ARM -> ARM long branch stub, PIC. */ |
2126 | static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = | |
2127 | { | |
2128 | ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ | |
2129 | ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ | |
2130 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2131 | DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2132 | }; | |
2133 | ||
2134 | /* V4T Thumb -> ARM long branch stub, PIC. */ | |
2135 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = | |
2136 | { | |
2137 | THUMB16_INSN(0x4778), /* bx pc */ | |
2138 | THUMB16_INSN(0x46c0), /* nop */ | |
2139 | ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ | |
2140 | ARM_INSN(0xe08cf00f), /* add pc, ip, pc */ | |
2141 | DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ | |
2142 | }; | |
2143 | ||
d3626fb0 CL |
2144 | /* Thumb -> Thumb long branch stub, PIC. Used on M-profile |
2145 | architectures. */ | |
ebe24dd4 CL |
2146 | static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = |
2147 | { | |
2148 | THUMB16_INSN(0xb401), /* push {r0} */ | |
2149 | THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */ | |
2150 | THUMB16_INSN(0x46fc), /* mov ip, pc */ | |
2151 | THUMB16_INSN(0x4484), /* add ip, r0 */ | |
2152 | THUMB16_INSN(0xbc01), /* pop {r0} */ | |
2153 | THUMB16_INSN(0x4760), /* bx ip */ | |
2154 | DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ | |
2155 | }; | |
2156 | ||
d3626fb0 CL |
2157 | /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not |
2158 | allowed. */ | |
2159 | static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = | |
2160 | { | |
2161 | THUMB16_INSN(0x4778), /* bx pc */ | |
2162 | THUMB16_INSN(0x46c0), /* nop */ | |
2163 | ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ | |
2164 | ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ | |
2165 | ARM_INSN(0xe12fff1c), /* bx ip */ | |
2166 | DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ | |
2167 | }; | |
2168 | ||
48229727 JB |
2169 | /* Cortex-A8 erratum-workaround stubs. */ |
2170 | ||
2171 | /* Stub used for conditional branches (which may be beyond +/-1MB away, so we | |
2172 | can't use a conditional branch to reach this stub). */ | |
2173 | ||
2174 | static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = | |
2175 | { | |
2176 | THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */ | |
2177 | THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */ | |
2178 | THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */ | |
2179 | }; | |
2180 | ||
2181 | /* Stub used for b.w and bl.w instructions. */ | |
2182 | ||
2183 | static const insn_sequence elf32_arm_stub_a8_veneer_b[] = | |
2184 | { | |
2185 | THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */ | |
2186 | }; | |
2187 | ||
2188 | static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = | |
2189 | { | |
2190 | THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */ | |
2191 | }; | |
2192 | ||
2193 | /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w | |
2194 | instruction (which switches to ARM mode) to point to this stub. Jump to the | |
2195 | real destination using an ARM-mode branch. */ | |
2196 | ||
2197 | static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = | |
2198 | { | |
2199 | ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */ | |
2200 | }; | |
2201 | ||
906e58ca NC |
2202 | /* Section name for stubs is the associated section name plus this |
2203 | string. */ | |
2204 | #define STUB_SUFFIX ".stub" | |
2205 | ||
738a79f6 CL |
2206 | /* One entry per long/short branch stub defined above. */ |
2207 | #define DEF_STUBS \ | |
2208 | DEF_STUB(long_branch_any_any) \ | |
2209 | DEF_STUB(long_branch_v4t_arm_thumb) \ | |
2210 | DEF_STUB(long_branch_thumb_only) \ | |
2211 | DEF_STUB(long_branch_v4t_thumb_thumb) \ | |
2212 | DEF_STUB(long_branch_v4t_thumb_arm) \ | |
2213 | DEF_STUB(short_branch_v4t_thumb_arm) \ | |
2214 | DEF_STUB(long_branch_any_arm_pic) \ | |
2215 | DEF_STUB(long_branch_any_thumb_pic) \ | |
2216 | DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ | |
2217 | DEF_STUB(long_branch_v4t_arm_thumb_pic) \ | |
2218 | DEF_STUB(long_branch_v4t_thumb_arm_pic) \ | |
48229727 JB |
2219 | DEF_STUB(long_branch_thumb_only_pic) \ |
2220 | DEF_STUB(a8_veneer_b_cond) \ | |
2221 | DEF_STUB(a8_veneer_b) \ | |
2222 | DEF_STUB(a8_veneer_bl) \ | |
2223 | DEF_STUB(a8_veneer_blx) | |
738a79f6 CL |
2224 | |
2225 | #define DEF_STUB(x) arm_stub_##x, | |
2226 | enum elf32_arm_stub_type { | |
906e58ca | 2227 | arm_stub_none, |
738a79f6 | 2228 | DEF_STUBS |
eb7c4339 NS |
2229 | /* Note the first a8_veneer type */ |
2230 | arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond | |
738a79f6 CL |
2231 | }; |
2232 | #undef DEF_STUB | |
2233 | ||
2234 | typedef struct | |
2235 | { | |
d3ce72d0 | 2236 | const insn_sequence* template_sequence; |
738a79f6 CL |
2237 | int template_size; |
2238 | } stub_def; | |
2239 | ||
2240 | #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, | |
2241 | static const stub_def stub_definitions[] = { | |
2242 | {NULL, 0}, | |
2243 | DEF_STUBS | |
906e58ca NC |
2244 | }; |
2245 | ||
2246 | struct elf32_arm_stub_hash_entry | |
2247 | { | |
2248 | /* Base hash table entry structure. */ | |
2249 | struct bfd_hash_entry root; | |
2250 | ||
2251 | /* The stub section. */ | |
2252 | asection *stub_sec; | |
2253 | ||
2254 | /* Offset within stub_sec of the beginning of this stub. */ | |
2255 | bfd_vma stub_offset; | |
2256 | ||
2257 | /* Given the symbol's value and its section we can determine its final | |
2258 | value when building the stubs (so the stub knows where to jump). */ | |
2259 | bfd_vma target_value; | |
2260 | asection *target_section; | |
2261 | ||
48229727 JB |
2262 | /* Offset to apply to relocation referencing target_value. */ |
2263 | bfd_vma target_addend; | |
2264 | ||
2265 | /* The instruction which caused this stub to be generated (only valid for | |
2266 | Cortex-A8 erratum workaround stubs at present). */ | |
2267 | unsigned long orig_insn; | |
2268 | ||
461a49ca | 2269 | /* The stub type. */ |
906e58ca | 2270 | enum elf32_arm_stub_type stub_type; |
461a49ca DJ |
2271 | /* Its encoding size in bytes. */ |
2272 | int stub_size; | |
2273 | /* Its template. */ | |
2274 | const insn_sequence *stub_template; | |
2275 | /* The size of the template (number of entries). */ | |
2276 | int stub_template_size; | |
906e58ca NC |
2277 | |
2278 | /* The symbol table entry, if any, that this was derived from. */ | |
2279 | struct elf32_arm_link_hash_entry *h; | |
2280 | ||
2281 | /* Destination symbol type (STT_ARM_TFUNC, ...) */ | |
2282 | unsigned char st_type; | |
2283 | ||
2284 | /* Where this stub is being called from, or, in the case of combined | |
2285 | stub sections, the first input section in the group. */ | |
2286 | asection *id_sec; | |
7413f23f DJ |
2287 | |
2288 | /* The name for the local symbol at the start of this stub. The | |
2289 | stub name in the hash table has to be unique; this does not, so | |
2290 | it can be friendlier. */ | |
2291 | char *output_name; | |
906e58ca NC |
2292 | }; |
2293 | ||
e489d0ae PB |
2294 | /* Used to build a map of a section. This is required for mixed-endian |
2295 | code/data. */ | |
2296 | ||
2297 | typedef struct elf32_elf_section_map | |
2298 | { | |
2299 | bfd_vma vma; | |
2300 | char type; | |
2301 | } | |
2302 | elf32_arm_section_map; | |
2303 | ||
c7b8f16e JB |
2304 | /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ |
2305 | ||
2306 | typedef enum | |
2307 | { | |
2308 | VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, | |
2309 | VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, | |
2310 | VFP11_ERRATUM_ARM_VENEER, | |
2311 | VFP11_ERRATUM_THUMB_VENEER | |
2312 | } | |
2313 | elf32_vfp11_erratum_type; | |
2314 | ||
2315 | typedef struct elf32_vfp11_erratum_list | |
2316 | { | |
2317 | struct elf32_vfp11_erratum_list *next; | |
2318 | bfd_vma vma; | |
2319 | union | |
2320 | { | |
2321 | struct | |
2322 | { | |
2323 | struct elf32_vfp11_erratum_list *veneer; | |
2324 | unsigned int vfp_insn; | |
2325 | } b; | |
2326 | struct | |
2327 | { | |
2328 | struct elf32_vfp11_erratum_list *branch; | |
2329 | unsigned int id; | |
2330 | } v; | |
2331 | } u; | |
2332 | elf32_vfp11_erratum_type type; | |
2333 | } | |
2334 | elf32_vfp11_erratum_list; | |
2335 | ||
2468f9c9 PB |
2336 | typedef enum |
2337 | { | |
2338 | DELETE_EXIDX_ENTRY, | |
2339 | INSERT_EXIDX_CANTUNWIND_AT_END | |
2340 | } | |
2341 | arm_unwind_edit_type; | |
2342 | ||
2343 | /* A (sorted) list of edits to apply to an unwind table. */ | |
2344 | typedef struct arm_unwind_table_edit | |
2345 | { | |
2346 | arm_unwind_edit_type type; | |
2347 | /* Note: we sometimes want to insert an unwind entry corresponding to a | |
2348 | section different from the one we're currently writing out, so record the | |
2349 | (text) section this edit relates to here. */ | |
2350 | asection *linked_section; | |
2351 | unsigned int index; | |
2352 | struct arm_unwind_table_edit *next; | |
2353 | } | |
2354 | arm_unwind_table_edit; | |
2355 | ||
8e3de13a | 2356 | typedef struct _arm_elf_section_data |
e489d0ae | 2357 | { |
2468f9c9 | 2358 | /* Information about mapping symbols. */ |
e489d0ae | 2359 | struct bfd_elf_section_data elf; |
8e3de13a | 2360 | unsigned int mapcount; |
c7b8f16e | 2361 | unsigned int mapsize; |
e489d0ae | 2362 | elf32_arm_section_map *map; |
2468f9c9 | 2363 | /* Information about CPU errata. */ |
c7b8f16e JB |
2364 | unsigned int erratumcount; |
2365 | elf32_vfp11_erratum_list *erratumlist; | |
2468f9c9 PB |
2366 | /* Information about unwind tables. */ |
2367 | union | |
2368 | { | |
2369 | /* Unwind info attached to a text section. */ | |
2370 | struct | |
2371 | { | |
2372 | asection *arm_exidx_sec; | |
2373 | } text; | |
2374 | ||
2375 | /* Unwind info attached to an .ARM.exidx section. */ | |
2376 | struct | |
2377 | { | |
2378 | arm_unwind_table_edit *unwind_edit_list; | |
2379 | arm_unwind_table_edit *unwind_edit_tail; | |
2380 | } exidx; | |
2381 | } u; | |
8e3de13a NC |
2382 | } |
2383 | _arm_elf_section_data; | |
e489d0ae PB |
2384 | |
2385 | #define elf32_arm_section_data(sec) \ | |
8e3de13a | 2386 | ((_arm_elf_section_data *) elf_section_data (sec)) |
e489d0ae | 2387 | |
48229727 JB |
2388 | /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. |
2389 | These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), | |
2390 | so may be created multiple times: we use an array of these entries whilst | |
2391 | relaxing which we can refresh easily, then create stubs for each potentially | |
2392 | erratum-triggering instruction once we've settled on a solution. */ | |
2393 | ||
2394 | struct a8_erratum_fix { | |
2395 | bfd *input_bfd; | |
2396 | asection *section; | |
2397 | bfd_vma offset; | |
2398 | bfd_vma addend; | |
2399 | unsigned long orig_insn; | |
2400 | char *stub_name; | |
2401 | enum elf32_arm_stub_type stub_type; | |
2402 | }; | |
2403 | ||
2404 | /* A table of relocs applied to branches which might trigger Cortex-A8 | |
2405 | erratum. */ | |
2406 | ||
2407 | struct a8_erratum_reloc { | |
2408 | bfd_vma from; | |
2409 | bfd_vma destination; | |
2410 | unsigned int r_type; | |
2411 | unsigned char st_type; | |
2412 | const char *sym_name; | |
2413 | bfd_boolean non_a8_stub; | |
2414 | }; | |
2415 | ||
ba93b8ac DJ |
2416 | /* The size of the thread control block. */ |
2417 | #define TCB_SIZE 8 | |
2418 | ||
0ffa91dd | 2419 | struct elf_arm_obj_tdata |
ba93b8ac DJ |
2420 | { |
2421 | struct elf_obj_tdata root; | |
2422 | ||
2423 | /* tls_type for each local got entry. */ | |
2424 | char *local_got_tls_type; | |
ee065d83 | 2425 | |
bf21ed78 MS |
2426 | /* Zero to warn when linking objects with incompatible enum sizes. */ |
2427 | int no_enum_size_warning; | |
a9dc9481 JM |
2428 | |
2429 | /* Zero to warn when linking objects with incompatible wchar_t sizes. */ | |
2430 | int no_wchar_size_warning; | |
ba93b8ac DJ |
2431 | }; |
2432 | ||
0ffa91dd NC |
2433 | #define elf_arm_tdata(bfd) \ |
2434 | ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) | |
ba93b8ac | 2435 | |
0ffa91dd NC |
2436 | #define elf32_arm_local_got_tls_type(bfd) \ |
2437 | (elf_arm_tdata (bfd)->local_got_tls_type) | |
2438 | ||
2439 | #define is_arm_elf(bfd) \ | |
2440 | (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ | |
2441 | && elf_tdata (bfd) != NULL \ | |
4dfe6ac6 | 2442 | && elf_object_id (bfd) == ARM_ELF_DATA) |
ba93b8ac DJ |
2443 | |
2444 | static bfd_boolean | |
2445 | elf32_arm_mkobject (bfd *abfd) | |
2446 | { | |
0ffa91dd | 2447 | return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), |
4dfe6ac6 | 2448 | ARM_ELF_DATA); |
ba93b8ac DJ |
2449 | } |
2450 | ||
252b5132 RH |
2451 | /* The ARM linker needs to keep track of the number of relocs that it |
2452 | decides to copy in check_relocs for each symbol. This is so that | |
2453 | it can discard PC relative relocs if it doesn't need them when | |
2454 | linking with -Bsymbolic. We store the information in a field | |
2455 | extending the regular ELF linker hash table. */ | |
2456 | ||
ba93b8ac DJ |
2457 | /* This structure keeps track of the number of relocs we have copied |
2458 | for a given symbol. */ | |
5e681ec4 | 2459 | struct elf32_arm_relocs_copied |
917583ad NC |
2460 | { |
2461 | /* Next section. */ | |
5e681ec4 | 2462 | struct elf32_arm_relocs_copied * next; |
917583ad NC |
2463 | /* A section in dynobj. */ |
2464 | asection * section; | |
2465 | /* Number of relocs copied in this section. */ | |
2466 | bfd_size_type count; | |
ba93b8ac DJ |
2467 | /* Number of PC-relative relocs copied in this section. */ |
2468 | bfd_size_type pc_count; | |
917583ad | 2469 | }; |
252b5132 | 2470 | |
ba93b8ac DJ |
2471 | #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) |
2472 | ||
ba96a88f | 2473 | /* Arm ELF linker hash entry. */ |
252b5132 | 2474 | struct elf32_arm_link_hash_entry |
917583ad NC |
2475 | { |
2476 | struct elf_link_hash_entry root; | |
252b5132 | 2477 | |
917583ad | 2478 | /* Number of PC relative relocs copied for this symbol. */ |
5e681ec4 | 2479 | struct elf32_arm_relocs_copied * relocs_copied; |
b7693d02 DJ |
2480 | |
2481 | /* We reference count Thumb references to a PLT entry separately, | |
2482 | so that we can emit the Thumb trampoline only if needed. */ | |
2483 | bfd_signed_vma plt_thumb_refcount; | |
2484 | ||
bd97cb95 DJ |
2485 | /* Some references from Thumb code may be eliminated by BL->BLX |
2486 | conversion, so record them separately. */ | |
2487 | bfd_signed_vma plt_maybe_thumb_refcount; | |
2488 | ||
b7693d02 DJ |
2489 | /* Since PLT entries have variable size if the Thumb prologue is |
2490 | used, we need to record the index into .got.plt instead of | |
2491 | recomputing it from the PLT offset. */ | |
2492 | bfd_signed_vma plt_got_offset; | |
ba93b8ac DJ |
2493 | |
2494 | #define GOT_UNKNOWN 0 | |
2495 | #define GOT_NORMAL 1 | |
2496 | #define GOT_TLS_GD 2 | |
2497 | #define GOT_TLS_IE 4 | |
2498 | unsigned char tls_type; | |
a4fd1a8e PB |
2499 | |
2500 | /* The symbol marking the real symbol location for exported thumb | |
2501 | symbols with Arm stubs. */ | |
2502 | struct elf_link_hash_entry *export_glue; | |
906e58ca | 2503 | |
da5938a2 | 2504 | /* A pointer to the most recently used stub hash entry against this |
8029a119 | 2505 | symbol. */ |
da5938a2 | 2506 | struct elf32_arm_stub_hash_entry *stub_cache; |
917583ad | 2507 | }; |
252b5132 | 2508 | |
252b5132 | 2509 | /* Traverse an arm ELF linker hash table. */ |
252b5132 RH |
2510 | #define elf32_arm_link_hash_traverse(table, func, info) \ |
2511 | (elf_link_hash_traverse \ | |
2512 | (&(table)->root, \ | |
b7693d02 | 2513 | (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ |
252b5132 RH |
2514 | (info))) |
2515 | ||
2516 | /* Get the ARM elf linker hash table from a link_info structure. */ | |
2517 | #define elf32_arm_hash_table(info) \ | |
4dfe6ac6 NC |
2518 | (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ |
2519 | == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) | |
252b5132 | 2520 | |
906e58ca NC |
2521 | #define arm_stub_hash_lookup(table, string, create, copy) \ |
2522 | ((struct elf32_arm_stub_hash_entry *) \ | |
2523 | bfd_hash_lookup ((table), (string), (create), (copy))) | |
2524 | ||
21d799b5 NC |
2525 | /* Array to keep track of which stub sections have been created, and |
2526 | information on stub grouping. */ | |
2527 | struct map_stub | |
2528 | { | |
2529 | /* This is the section to which stubs in the group will be | |
2530 | attached. */ | |
2531 | asection *link_sec; | |
2532 | /* The stub section. */ | |
2533 | asection *stub_sec; | |
2534 | }; | |
2535 | ||
9b485d32 | 2536 | /* ARM ELF linker hash table. */ |
252b5132 | 2537 | struct elf32_arm_link_hash_table |
906e58ca NC |
2538 | { |
2539 | /* The main hash table. */ | |
2540 | struct elf_link_hash_table root; | |
252b5132 | 2541 | |
906e58ca NC |
2542 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
2543 | bfd_size_type thumb_glue_size; | |
252b5132 | 2544 | |
906e58ca NC |
2545 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
2546 | bfd_size_type arm_glue_size; | |
252b5132 | 2547 | |
906e58ca NC |
2548 | /* The size in bytes of section containing the ARMv4 BX veneers. */ |
2549 | bfd_size_type bx_glue_size; | |
845b51d6 | 2550 | |
906e58ca NC |
2551 | /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when |
2552 | veneer has been populated. */ | |
2553 | bfd_vma bx_glue_offset[15]; | |
845b51d6 | 2554 | |
906e58ca NC |
2555 | /* The size in bytes of the section containing glue for VFP11 erratum |
2556 | veneers. */ | |
2557 | bfd_size_type vfp11_erratum_glue_size; | |
c7b8f16e | 2558 | |
48229727 JB |
2559 | /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This |
2560 | holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and | |
2561 | elf32_arm_write_section(). */ | |
2562 | struct a8_erratum_fix *a8_erratum_fixes; | |
2563 | unsigned int num_a8_erratum_fixes; | |
2564 | ||
906e58ca NC |
2565 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
2566 | bfd * bfd_of_glue_owner; | |
ba96a88f | 2567 | |
906e58ca NC |
2568 | /* Nonzero to output a BE8 image. */ |
2569 | int byteswap_code; | |
e489d0ae | 2570 | |
906e58ca NC |
2571 | /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. |
2572 | Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ | |
2573 | int target1_is_rel; | |
9c504268 | 2574 | |
906e58ca NC |
2575 | /* The relocation to use for R_ARM_TARGET2 relocations. */ |
2576 | int target2_reloc; | |
eb043451 | 2577 | |
906e58ca NC |
2578 | /* 0 = Ignore R_ARM_V4BX. |
2579 | 1 = Convert BX to MOV PC. | |
2580 | 2 = Generate v4 interworing stubs. */ | |
2581 | int fix_v4bx; | |
319850b4 | 2582 | |
48229727 JB |
2583 | /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ |
2584 | int fix_cortex_a8; | |
2585 | ||
906e58ca NC |
2586 | /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ |
2587 | int use_blx; | |
33bfe774 | 2588 | |
906e58ca NC |
2589 | /* What sort of code sequences we should look for which may trigger the |
2590 | VFP11 denorm erratum. */ | |
2591 | bfd_arm_vfp11_fix vfp11_fix; | |
c7b8f16e | 2592 | |
906e58ca NC |
2593 | /* Global counter for the number of fixes we have emitted. */ |
2594 | int num_vfp11_fixes; | |
c7b8f16e | 2595 | |
906e58ca NC |
2596 | /* Nonzero to force PIC branch veneers. */ |
2597 | int pic_veneer; | |
27e55c4d | 2598 | |
906e58ca NC |
2599 | /* The number of bytes in the initial entry in the PLT. */ |
2600 | bfd_size_type plt_header_size; | |
e5a52504 | 2601 | |
906e58ca NC |
2602 | /* The number of bytes in the subsequent PLT etries. */ |
2603 | bfd_size_type plt_entry_size; | |
e5a52504 | 2604 | |
906e58ca NC |
2605 | /* True if the target system is VxWorks. */ |
2606 | int vxworks_p; | |
00a97672 | 2607 | |
906e58ca NC |
2608 | /* True if the target system is Symbian OS. */ |
2609 | int symbian_p; | |
e5a52504 | 2610 | |
906e58ca NC |
2611 | /* True if the target uses REL relocations. */ |
2612 | int use_rel; | |
4e7fd91e | 2613 | |
906e58ca NC |
2614 | /* Short-cuts to get to dynamic linker sections. */ |
2615 | asection *sgot; | |
2616 | asection *sgotplt; | |
2617 | asection *srelgot; | |
2618 | asection *splt; | |
2619 | asection *srelplt; | |
2620 | asection *sdynbss; | |
2621 | asection *srelbss; | |
5e681ec4 | 2622 | |
906e58ca NC |
2623 | /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ |
2624 | asection *srelplt2; | |
00a97672 | 2625 | |
906e58ca NC |
2626 | /* Data for R_ARM_TLS_LDM32 relocations. */ |
2627 | union | |
2628 | { | |
2629 | bfd_signed_vma refcount; | |
2630 | bfd_vma offset; | |
2631 | } tls_ldm_got; | |
b7693d02 | 2632 | |
87d72d41 AM |
2633 | /* Small local sym cache. */ |
2634 | struct sym_cache sym_cache; | |
906e58ca NC |
2635 | |
2636 | /* For convenience in allocate_dynrelocs. */ | |
2637 | bfd * obfd; | |
2638 | ||
2639 | /* The stub hash table. */ | |
2640 | struct bfd_hash_table stub_hash_table; | |
2641 | ||
2642 | /* Linker stub bfd. */ | |
2643 | bfd *stub_bfd; | |
2644 | ||
2645 | /* Linker call-backs. */ | |
2646 | asection * (*add_stub_section) (const char *, asection *); | |
2647 | void (*layout_sections_again) (void); | |
2648 | ||
2649 | /* Array to keep track of which stub sections have been created, and | |
2650 | information on stub grouping. */ | |
21d799b5 | 2651 | struct map_stub *stub_group; |
906e58ca NC |
2652 | |
2653 | /* Assorted information used by elf32_arm_size_stubs. */ | |
2654 | unsigned int bfd_count; | |
2655 | int top_index; | |
2656 | asection **input_list; | |
2657 | }; | |
252b5132 | 2658 | |
780a67af NC |
2659 | /* Create an entry in an ARM ELF linker hash table. */ |
2660 | ||
2661 | static struct bfd_hash_entry * | |
57e8b36a NC |
2662 | elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, |
2663 | struct bfd_hash_table * table, | |
2664 | const char * string) | |
780a67af NC |
2665 | { |
2666 | struct elf32_arm_link_hash_entry * ret = | |
2667 | (struct elf32_arm_link_hash_entry *) entry; | |
2668 | ||
2669 | /* Allocate the structure if it has not already been allocated by a | |
2670 | subclass. */ | |
906e58ca | 2671 | if (ret == NULL) |
21d799b5 NC |
2672 | ret = (struct elf32_arm_link_hash_entry *) |
2673 | bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); | |
57e8b36a | 2674 | if (ret == NULL) |
780a67af NC |
2675 | return (struct bfd_hash_entry *) ret; |
2676 | ||
2677 | /* Call the allocation method of the superclass. */ | |
2678 | ret = ((struct elf32_arm_link_hash_entry *) | |
2679 | _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, | |
2680 | table, string)); | |
57e8b36a | 2681 | if (ret != NULL) |
b7693d02 DJ |
2682 | { |
2683 | ret->relocs_copied = NULL; | |
ba93b8ac | 2684 | ret->tls_type = GOT_UNKNOWN; |
b7693d02 | 2685 | ret->plt_thumb_refcount = 0; |
bd97cb95 | 2686 | ret->plt_maybe_thumb_refcount = 0; |
b7693d02 | 2687 | ret->plt_got_offset = -1; |
a4fd1a8e | 2688 | ret->export_glue = NULL; |
906e58ca NC |
2689 | |
2690 | ret->stub_cache = NULL; | |
b7693d02 | 2691 | } |
780a67af NC |
2692 | |
2693 | return (struct bfd_hash_entry *) ret; | |
2694 | } | |
2695 | ||
906e58ca NC |
2696 | /* Initialize an entry in the stub hash table. */ |
2697 | ||
2698 | static struct bfd_hash_entry * | |
2699 | stub_hash_newfunc (struct bfd_hash_entry *entry, | |
2700 | struct bfd_hash_table *table, | |
2701 | const char *string) | |
2702 | { | |
2703 | /* Allocate the structure if it has not already been allocated by a | |
2704 | subclass. */ | |
2705 | if (entry == NULL) | |
2706 | { | |
21d799b5 NC |
2707 | entry = (struct bfd_hash_entry *) |
2708 | bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); | |
906e58ca NC |
2709 | if (entry == NULL) |
2710 | return entry; | |
2711 | } | |
2712 | ||
2713 | /* Call the allocation method of the superclass. */ | |
2714 | entry = bfd_hash_newfunc (entry, table, string); | |
2715 | if (entry != NULL) | |
2716 | { | |
2717 | struct elf32_arm_stub_hash_entry *eh; | |
2718 | ||
2719 | /* Initialize the local fields. */ | |
2720 | eh = (struct elf32_arm_stub_hash_entry *) entry; | |
2721 | eh->stub_sec = NULL; | |
2722 | eh->stub_offset = 0; | |
2723 | eh->target_value = 0; | |
2724 | eh->target_section = NULL; | |
cedfb179 DK |
2725 | eh->target_addend = 0; |
2726 | eh->orig_insn = 0; | |
906e58ca | 2727 | eh->stub_type = arm_stub_none; |
461a49ca DJ |
2728 | eh->stub_size = 0; |
2729 | eh->stub_template = NULL; | |
2730 | eh->stub_template_size = 0; | |
906e58ca NC |
2731 | eh->h = NULL; |
2732 | eh->id_sec = NULL; | |
d8d2f433 | 2733 | eh->output_name = NULL; |
906e58ca NC |
2734 | } |
2735 | ||
2736 | return entry; | |
2737 | } | |
2738 | ||
00a97672 | 2739 | /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up |
5e681ec4 PB |
2740 | shortcuts to them in our hash table. */ |
2741 | ||
2742 | static bfd_boolean | |
57e8b36a | 2743 | create_got_section (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
2744 | { |
2745 | struct elf32_arm_link_hash_table *htab; | |
2746 | ||
e5a52504 | 2747 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
2748 | if (htab == NULL) |
2749 | return FALSE; | |
2750 | ||
e5a52504 MM |
2751 | /* BPABI objects never have a GOT, or associated sections. */ |
2752 | if (htab->symbian_p) | |
2753 | return TRUE; | |
2754 | ||
5e681ec4 PB |
2755 | if (! _bfd_elf_create_got_section (dynobj, info)) |
2756 | return FALSE; | |
2757 | ||
5e681ec4 PB |
2758 | htab->sgot = bfd_get_section_by_name (dynobj, ".got"); |
2759 | htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt"); | |
2760 | if (!htab->sgot || !htab->sgotplt) | |
2761 | abort (); | |
2762 | ||
64e77c6d L |
2763 | htab->srelgot = bfd_get_section_by_name (dynobj, |
2764 | RELOC_SECTION (htab, ".got")); | |
2765 | if (htab->srelgot == NULL) | |
5e681ec4 PB |
2766 | return FALSE; |
2767 | return TRUE; | |
2768 | } | |
2769 | ||
00a97672 RS |
2770 | /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and |
2771 | .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our | |
5e681ec4 PB |
2772 | hash table. */ |
2773 | ||
2774 | static bfd_boolean | |
57e8b36a | 2775 | elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) |
5e681ec4 PB |
2776 | { |
2777 | struct elf32_arm_link_hash_table *htab; | |
2778 | ||
2779 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
2780 | if (htab == NULL) |
2781 | return FALSE; | |
2782 | ||
5e681ec4 PB |
2783 | if (!htab->sgot && !create_got_section (dynobj, info)) |
2784 | return FALSE; | |
2785 | ||
2786 | if (!_bfd_elf_create_dynamic_sections (dynobj, info)) | |
2787 | return FALSE; | |
2788 | ||
2789 | htab->splt = bfd_get_section_by_name (dynobj, ".plt"); | |
00a97672 RS |
2790 | htab->srelplt = bfd_get_section_by_name (dynobj, |
2791 | RELOC_SECTION (htab, ".plt")); | |
5e681ec4 PB |
2792 | htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss"); |
2793 | if (!info->shared) | |
00a97672 RS |
2794 | htab->srelbss = bfd_get_section_by_name (dynobj, |
2795 | RELOC_SECTION (htab, ".bss")); | |
2796 | ||
2797 | if (htab->vxworks_p) | |
2798 | { | |
2799 | if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) | |
2800 | return FALSE; | |
2801 | ||
2802 | if (info->shared) | |
2803 | { | |
2804 | htab->plt_header_size = 0; | |
2805 | htab->plt_entry_size | |
2806 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); | |
2807 | } | |
2808 | else | |
2809 | { | |
2810 | htab->plt_header_size | |
2811 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); | |
2812 | htab->plt_entry_size | |
2813 | = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); | |
2814 | } | |
2815 | } | |
5e681ec4 | 2816 | |
906e58ca | 2817 | if (!htab->splt |
e5a52504 MM |
2818 | || !htab->srelplt |
2819 | || !htab->sdynbss | |
5e681ec4 PB |
2820 | || (!info->shared && !htab->srelbss)) |
2821 | abort (); | |
2822 | ||
2823 | return TRUE; | |
2824 | } | |
2825 | ||
906e58ca NC |
2826 | /* Copy the extra info we tack onto an elf_link_hash_entry. */ |
2827 | ||
2828 | static void | |
2829 | elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, | |
2830 | struct elf_link_hash_entry *dir, | |
2831 | struct elf_link_hash_entry *ind) | |
2832 | { | |
2833 | struct elf32_arm_link_hash_entry *edir, *eind; | |
2834 | ||
2835 | edir = (struct elf32_arm_link_hash_entry *) dir; | |
2836 | eind = (struct elf32_arm_link_hash_entry *) ind; | |
2837 | ||
2838 | if (eind->relocs_copied != NULL) | |
2839 | { | |
2840 | if (edir->relocs_copied != NULL) | |
2841 | { | |
2842 | struct elf32_arm_relocs_copied **pp; | |
2843 | struct elf32_arm_relocs_copied *p; | |
2844 | ||
2845 | /* Add reloc counts against the indirect sym to the direct sym | |
2846 | list. Merge any entries against the same section. */ | |
2847 | for (pp = &eind->relocs_copied; (p = *pp) != NULL; ) | |
2848 | { | |
2849 | struct elf32_arm_relocs_copied *q; | |
2850 | ||
2851 | for (q = edir->relocs_copied; q != NULL; q = q->next) | |
2852 | if (q->section == p->section) | |
2853 | { | |
2854 | q->pc_count += p->pc_count; | |
2855 | q->count += p->count; | |
2856 | *pp = p->next; | |
2857 | break; | |
2858 | } | |
2859 | if (q == NULL) | |
2860 | pp = &p->next; | |
2861 | } | |
2862 | *pp = edir->relocs_copied; | |
2863 | } | |
2864 | ||
2865 | edir->relocs_copied = eind->relocs_copied; | |
2866 | eind->relocs_copied = NULL; | |
2867 | } | |
2868 | ||
2869 | if (ind->root.type == bfd_link_hash_indirect) | |
2870 | { | |
2871 | /* Copy over PLT info. */ | |
2872 | edir->plt_thumb_refcount += eind->plt_thumb_refcount; | |
2873 | eind->plt_thumb_refcount = 0; | |
2874 | edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount; | |
2875 | eind->plt_maybe_thumb_refcount = 0; | |
2876 | ||
2877 | if (dir->got.refcount <= 0) | |
2878 | { | |
2879 | edir->tls_type = eind->tls_type; | |
2880 | eind->tls_type = GOT_UNKNOWN; | |
2881 | } | |
2882 | } | |
2883 | ||
2884 | _bfd_elf_link_hash_copy_indirect (info, dir, ind); | |
2885 | } | |
2886 | ||
2887 | /* Create an ARM elf linker hash table. */ | |
2888 | ||
2889 | static struct bfd_link_hash_table * | |
2890 | elf32_arm_link_hash_table_create (bfd *abfd) | |
2891 | { | |
2892 | struct elf32_arm_link_hash_table *ret; | |
2893 | bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); | |
2894 | ||
21d799b5 | 2895 | ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt); |
906e58ca NC |
2896 | if (ret == NULL) |
2897 | return NULL; | |
2898 | ||
2899 | if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, | |
2900 | elf32_arm_link_hash_newfunc, | |
4dfe6ac6 NC |
2901 | sizeof (struct elf32_arm_link_hash_entry), |
2902 | ARM_ELF_DATA)) | |
906e58ca NC |
2903 | { |
2904 | free (ret); | |
2905 | return NULL; | |
2906 | } | |
2907 | ||
2908 | ret->sgot = NULL; | |
2909 | ret->sgotplt = NULL; | |
2910 | ret->srelgot = NULL; | |
2911 | ret->splt = NULL; | |
2912 | ret->srelplt = NULL; | |
2913 | ret->sdynbss = NULL; | |
2914 | ret->srelbss = NULL; | |
2915 | ret->srelplt2 = NULL; | |
2916 | ret->thumb_glue_size = 0; | |
2917 | ret->arm_glue_size = 0; | |
2918 | ret->bx_glue_size = 0; | |
2919 | memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset)); | |
2920 | ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
2921 | ret->vfp11_erratum_glue_size = 0; | |
2922 | ret->num_vfp11_fixes = 0; | |
48229727 | 2923 | ret->fix_cortex_a8 = 0; |
906e58ca NC |
2924 | ret->bfd_of_glue_owner = NULL; |
2925 | ret->byteswap_code = 0; | |
2926 | ret->target1_is_rel = 0; | |
2927 | ret->target2_reloc = R_ARM_NONE; | |
2928 | #ifdef FOUR_WORD_PLT | |
2929 | ret->plt_header_size = 16; | |
2930 | ret->plt_entry_size = 16; | |
2931 | #else | |
2932 | ret->plt_header_size = 20; | |
2933 | ret->plt_entry_size = 12; | |
2934 | #endif | |
2935 | ret->fix_v4bx = 0; | |
2936 | ret->use_blx = 0; | |
2937 | ret->vxworks_p = 0; | |
2938 | ret->symbian_p = 0; | |
2939 | ret->use_rel = 1; | |
87d72d41 | 2940 | ret->sym_cache.abfd = NULL; |
906e58ca NC |
2941 | ret->obfd = abfd; |
2942 | ret->tls_ldm_got.refcount = 0; | |
6cee0a6f L |
2943 | ret->stub_bfd = NULL; |
2944 | ret->add_stub_section = NULL; | |
2945 | ret->layout_sections_again = NULL; | |
2946 | ret->stub_group = NULL; | |
2947 | ret->bfd_count = 0; | |
2948 | ret->top_index = 0; | |
2949 | ret->input_list = NULL; | |
906e58ca NC |
2950 | |
2951 | if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, | |
2952 | sizeof (struct elf32_arm_stub_hash_entry))) | |
2953 | { | |
2954 | free (ret); | |
2955 | return NULL; | |
2956 | } | |
2957 | ||
2958 | return &ret->root.root; | |
2959 | } | |
2960 | ||
2961 | /* Free the derived linker hash table. */ | |
2962 | ||
2963 | static void | |
2964 | elf32_arm_hash_table_free (struct bfd_link_hash_table *hash) | |
2965 | { | |
2966 | struct elf32_arm_link_hash_table *ret | |
2967 | = (struct elf32_arm_link_hash_table *) hash; | |
2968 | ||
2969 | bfd_hash_table_free (&ret->stub_hash_table); | |
2970 | _bfd_generic_link_hash_table_free (hash); | |
2971 | } | |
2972 | ||
2973 | /* Determine if we're dealing with a Thumb only architecture. */ | |
2974 | ||
2975 | static bfd_boolean | |
2976 | using_thumb_only (struct elf32_arm_link_hash_table *globals) | |
2977 | { | |
2978 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
2979 | Tag_CPU_arch); | |
2980 | int profile; | |
2981 | ||
9e3c6df6 | 2982 | if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M) |
906e58ca NC |
2983 | return FALSE; |
2984 | ||
2985 | profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
2986 | Tag_CPU_arch_profile); | |
2987 | ||
2988 | return profile == 'M'; | |
2989 | } | |
2990 | ||
2991 | /* Determine if we're dealing with a Thumb-2 object. */ | |
2992 | ||
2993 | static bfd_boolean | |
2994 | using_thumb2 (struct elf32_arm_link_hash_table *globals) | |
2995 | { | |
2996 | int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
2997 | Tag_CPU_arch); | |
2998 | return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7; | |
2999 | } | |
3000 | ||
cd1dac3d DG |
3001 | /* Determine what kind of NOPs are available. */ |
3002 | ||
3003 | static bfd_boolean | |
3004 | arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) | |
3005 | { | |
3006 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3007 | Tag_CPU_arch); | |
3008 | return arch == TAG_CPU_ARCH_V6T2 | |
3009 | || arch == TAG_CPU_ARCH_V6K | |
9e3c6df6 PB |
3010 | || arch == TAG_CPU_ARCH_V7 |
3011 | || arch == TAG_CPU_ARCH_V7E_M; | |
cd1dac3d DG |
3012 | } |
3013 | ||
3014 | static bfd_boolean | |
3015 | arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals) | |
3016 | { | |
3017 | const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, | |
3018 | Tag_CPU_arch); | |
9e3c6df6 PB |
3019 | return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7 |
3020 | || arch == TAG_CPU_ARCH_V7E_M); | |
cd1dac3d DG |
3021 | } |
3022 | ||
f4ac8484 DJ |
3023 | static bfd_boolean |
3024 | arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) | |
3025 | { | |
3026 | switch (stub_type) | |
3027 | { | |
fea2b4d6 CL |
3028 | case arm_stub_long_branch_thumb_only: |
3029 | case arm_stub_long_branch_v4t_thumb_arm: | |
3030 | case arm_stub_short_branch_v4t_thumb_arm: | |
ebe24dd4 CL |
3031 | case arm_stub_long_branch_v4t_thumb_arm_pic: |
3032 | case arm_stub_long_branch_thumb_only_pic: | |
f4ac8484 DJ |
3033 | return TRUE; |
3034 | case arm_stub_none: | |
3035 | BFD_FAIL (); | |
3036 | return FALSE; | |
3037 | break; | |
3038 | default: | |
3039 | return FALSE; | |
3040 | } | |
3041 | } | |
3042 | ||
906e58ca NC |
3043 | /* Determine the type of stub needed, if any, for a call. */ |
3044 | ||
3045 | static enum elf32_arm_stub_type | |
3046 | arm_type_of_stub (struct bfd_link_info *info, | |
3047 | asection *input_sec, | |
3048 | const Elf_Internal_Rela *rel, | |
3049 | unsigned char st_type, | |
3050 | struct elf32_arm_link_hash_entry *hash, | |
c820be07 NC |
3051 | bfd_vma destination, |
3052 | asection *sym_sec, | |
3053 | bfd *input_bfd, | |
3054 | const char *name) | |
906e58ca NC |
3055 | { |
3056 | bfd_vma location; | |
3057 | bfd_signed_vma branch_offset; | |
3058 | unsigned int r_type; | |
3059 | struct elf32_arm_link_hash_table * globals; | |
3060 | int thumb2; | |
3061 | int thumb_only; | |
3062 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
5fa9e92f | 3063 | int use_plt = 0; |
906e58ca | 3064 | |
da5938a2 | 3065 | /* We don't know the actual type of destination in case it is of |
8029a119 | 3066 | type STT_SECTION: give up. */ |
da5938a2 NC |
3067 | if (st_type == STT_SECTION) |
3068 | return stub_type; | |
3069 | ||
906e58ca | 3070 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
3071 | if (globals == NULL) |
3072 | return stub_type; | |
906e58ca NC |
3073 | |
3074 | thumb_only = using_thumb_only (globals); | |
3075 | ||
3076 | thumb2 = using_thumb2 (globals); | |
3077 | ||
3078 | /* Determine where the call point is. */ | |
3079 | location = (input_sec->output_offset | |
3080 | + input_sec->output_section->vma | |
3081 | + rel->r_offset); | |
3082 | ||
3083 | branch_offset = (bfd_signed_vma)(destination - location); | |
3084 | ||
3085 | r_type = ELF32_R_TYPE (rel->r_info); | |
3086 | ||
5fa9e92f | 3087 | /* Keep a simpler condition, for the sake of clarity. */ |
329dcd78 | 3088 | if (globals->splt != NULL && hash != NULL && hash->root.plt.offset != (bfd_vma) -1) |
5fa9e92f CL |
3089 | { |
3090 | use_plt = 1; | |
3091 | /* Note when dealing with PLT entries: the main PLT stub is in | |
3092 | ARM mode, so if the branch is in Thumb mode, another | |
3093 | Thumb->ARM stub will be inserted later just before the ARM | |
3094 | PLT stub. We don't take this extra distance into account | |
3095 | here, because if a long branch stub is needed, we'll add a | |
3096 | Thumb->Arm one and branch directly to the ARM PLT entry | |
3097 | because it avoids spreading offset corrections in several | |
3098 | places. */ | |
3099 | } | |
906e58ca | 3100 | |
155d87d7 | 3101 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca | 3102 | { |
5fa9e92f CL |
3103 | /* Handle cases where: |
3104 | - this call goes too far (different Thumb/Thumb2 max | |
3105 | distance) | |
155d87d7 CL |
3106 | - it's a Thumb->Arm call and blx is not available, or it's a |
3107 | Thumb->Arm branch (not bl). A stub is needed in this case, | |
3108 | but only if this call is not through a PLT entry. Indeed, | |
3109 | PLT stubs handle mode switching already. | |
5fa9e92f | 3110 | */ |
906e58ca NC |
3111 | if ((!thumb2 |
3112 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
3113 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
3114 | || (thumb2 | |
3115 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
3116 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) | |
5fa9e92f | 3117 | || ((st_type != STT_ARM_TFUNC) |
155d87d7 CL |
3118 | && (((r_type == R_ARM_THM_CALL) && !globals->use_blx) |
3119 | || (r_type == R_ARM_THM_JUMP24)) | |
5fa9e92f | 3120 | && !use_plt)) |
906e58ca NC |
3121 | { |
3122 | if (st_type == STT_ARM_TFUNC) | |
3123 | { | |
3124 | /* Thumb to thumb. */ | |
3125 | if (!thumb_only) | |
3126 | { | |
3127 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3128 | /* PIC stubs. */ |
155d87d7 CL |
3129 | ? ((globals->use_blx |
3130 | && (r_type ==R_ARM_THM_CALL)) | |
3131 | /* V5T and above. Stub starts with ARM code, so | |
3132 | we must be able to switch mode before | |
3133 | reaching it, which is only possible for 'bl' | |
3134 | (ie R_ARM_THM_CALL relocation). */ | |
cf3eccff | 3135 | ? arm_stub_long_branch_any_thumb_pic |
ebe24dd4 | 3136 | /* On V4T, use Thumb code only. */ |
d3626fb0 | 3137 | : arm_stub_long_branch_v4t_thumb_thumb_pic) |
c2b4a39d CL |
3138 | |
3139 | /* non-PIC stubs. */ | |
155d87d7 CL |
3140 | : ((globals->use_blx |
3141 | && (r_type ==R_ARM_THM_CALL)) | |
c2b4a39d CL |
3142 | /* V5T and above. */ |
3143 | ? arm_stub_long_branch_any_any | |
3144 | /* V4T. */ | |
d3626fb0 | 3145 | : arm_stub_long_branch_v4t_thumb_thumb); |
906e58ca NC |
3146 | } |
3147 | else | |
3148 | { | |
3149 | stub_type = (info->shared | globals->pic_veneer) | |
ebe24dd4 CL |
3150 | /* PIC stub. */ |
3151 | ? arm_stub_long_branch_thumb_only_pic | |
c2b4a39d CL |
3152 | /* non-PIC stub. */ |
3153 | : arm_stub_long_branch_thumb_only; | |
906e58ca NC |
3154 | } |
3155 | } | |
3156 | else | |
3157 | { | |
3158 | /* Thumb to arm. */ | |
c820be07 NC |
3159 | if (sym_sec != NULL |
3160 | && sym_sec->owner != NULL | |
3161 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3162 | { | |
3163 | (*_bfd_error_handler) | |
3164 | (_("%B(%s): warning: interworking not enabled.\n" | |
3165 | " first occurrence: %B: Thumb call to ARM"), | |
3166 | sym_sec->owner, input_bfd, name); | |
3167 | } | |
3168 | ||
906e58ca | 3169 | stub_type = (info->shared | globals->pic_veneer) |
c2b4a39d | 3170 | /* PIC stubs. */ |
155d87d7 CL |
3171 | ? ((globals->use_blx |
3172 | && (r_type ==R_ARM_THM_CALL)) | |
c2b4a39d | 3173 | /* V5T and above. */ |
cf3eccff | 3174 | ? arm_stub_long_branch_any_arm_pic |
ebe24dd4 CL |
3175 | /* V4T PIC stub. */ |
3176 | : arm_stub_long_branch_v4t_thumb_arm_pic) | |
c2b4a39d CL |
3177 | |
3178 | /* non-PIC stubs. */ | |
155d87d7 CL |
3179 | : ((globals->use_blx |
3180 | && (r_type ==R_ARM_THM_CALL)) | |
c2b4a39d CL |
3181 | /* V5T and above. */ |
3182 | ? arm_stub_long_branch_any_any | |
3183 | /* V4T. */ | |
3184 | : arm_stub_long_branch_v4t_thumb_arm); | |
c820be07 NC |
3185 | |
3186 | /* Handle v4t short branches. */ | |
fea2b4d6 | 3187 | if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) |
c820be07 NC |
3188 | && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) |
3189 | && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) | |
fea2b4d6 | 3190 | stub_type = arm_stub_short_branch_v4t_thumb_arm; |
906e58ca NC |
3191 | } |
3192 | } | |
3193 | } | |
155d87d7 | 3194 | else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32) |
906e58ca NC |
3195 | { |
3196 | if (st_type == STT_ARM_TFUNC) | |
3197 | { | |
3198 | /* Arm to thumb. */ | |
c820be07 NC |
3199 | |
3200 | if (sym_sec != NULL | |
3201 | && sym_sec->owner != NULL | |
3202 | && !INTERWORK_FLAG (sym_sec->owner)) | |
3203 | { | |
3204 | (*_bfd_error_handler) | |
3205 | (_("%B(%s): warning: interworking not enabled.\n" | |
c2b4a39d | 3206 | " first occurrence: %B: ARM call to Thumb"), |
c820be07 NC |
3207 | sym_sec->owner, input_bfd, name); |
3208 | } | |
3209 | ||
3210 | /* We have an extra 2-bytes reach because of | |
3211 | the mode change (bit 24 (H) of BLX encoding). */ | |
4116d8d7 PB |
3212 | if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) |
3213 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) | |
3214 | || ((r_type == R_ARM_CALL) && !globals->use_blx) | |
3215 | || (r_type == R_ARM_JUMP24) | |
3216 | || (r_type == R_ARM_PLT32)) | |
906e58ca NC |
3217 | { |
3218 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3219 | /* PIC stubs. */ |
ebe24dd4 CL |
3220 | ? ((globals->use_blx) |
3221 | /* V5T and above. */ | |
3222 | ? arm_stub_long_branch_any_thumb_pic | |
3223 | /* V4T stub. */ | |
3224 | : arm_stub_long_branch_v4t_arm_thumb_pic) | |
3225 | ||
c2b4a39d CL |
3226 | /* non-PIC stubs. */ |
3227 | : ((globals->use_blx) | |
3228 | /* V5T and above. */ | |
3229 | ? arm_stub_long_branch_any_any | |
3230 | /* V4T. */ | |
3231 | : arm_stub_long_branch_v4t_arm_thumb); | |
906e58ca NC |
3232 | } |
3233 | } | |
3234 | else | |
3235 | { | |
3236 | /* Arm to arm. */ | |
3237 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET | |
3238 | || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) | |
3239 | { | |
3240 | stub_type = (info->shared | globals->pic_veneer) | |
c2b4a39d | 3241 | /* PIC stubs. */ |
cf3eccff | 3242 | ? arm_stub_long_branch_any_arm_pic |
c2b4a39d | 3243 | /* non-PIC stubs. */ |
fea2b4d6 | 3244 | : arm_stub_long_branch_any_any; |
906e58ca NC |
3245 | } |
3246 | } | |
3247 | } | |
3248 | ||
3249 | return stub_type; | |
3250 | } | |
3251 | ||
3252 | /* Build a name for an entry in the stub hash table. */ | |
3253 | ||
3254 | static char * | |
3255 | elf32_arm_stub_name (const asection *input_section, | |
3256 | const asection *sym_sec, | |
3257 | const struct elf32_arm_link_hash_entry *hash, | |
3258 | const Elf_Internal_Rela *rel) | |
3259 | { | |
3260 | char *stub_name; | |
3261 | bfd_size_type len; | |
3262 | ||
3263 | if (hash) | |
3264 | { | |
3265 | len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1; | |
21d799b5 | 3266 | stub_name = (char *) bfd_malloc (len); |
906e58ca NC |
3267 | if (stub_name != NULL) |
3268 | sprintf (stub_name, "%08x_%s+%x", | |
3269 | input_section->id & 0xffffffff, | |
3270 | hash->root.root.root.string, | |
3271 | (int) rel->r_addend & 0xffffffff); | |
3272 | } | |
3273 | else | |
3274 | { | |
3275 | len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1; | |
21d799b5 | 3276 | stub_name = (char *) bfd_malloc (len); |
906e58ca NC |
3277 | if (stub_name != NULL) |
3278 | sprintf (stub_name, "%08x_%x:%x+%x", | |
3279 | input_section->id & 0xffffffff, | |
3280 | sym_sec->id & 0xffffffff, | |
3281 | (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, | |
3282 | (int) rel->r_addend & 0xffffffff); | |
3283 | } | |
3284 | ||
3285 | return stub_name; | |
3286 | } | |
3287 | ||
3288 | /* Look up an entry in the stub hash. Stub entries are cached because | |
3289 | creating the stub name takes a bit of time. */ | |
3290 | ||
3291 | static struct elf32_arm_stub_hash_entry * | |
3292 | elf32_arm_get_stub_entry (const asection *input_section, | |
3293 | const asection *sym_sec, | |
3294 | struct elf_link_hash_entry *hash, | |
3295 | const Elf_Internal_Rela *rel, | |
3296 | struct elf32_arm_link_hash_table *htab) | |
3297 | { | |
3298 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3299 | struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; | |
3300 | const asection *id_sec; | |
3301 | ||
3302 | if ((input_section->flags & SEC_CODE) == 0) | |
3303 | return NULL; | |
3304 | ||
3305 | /* If this input section is part of a group of sections sharing one | |
3306 | stub section, then use the id of the first section in the group. | |
3307 | Stub names need to include a section id, as there may well be | |
3308 | more than one stub used to reach say, printf, and we need to | |
3309 | distinguish between them. */ | |
3310 | id_sec = htab->stub_group[input_section->id].link_sec; | |
3311 | ||
3312 | if (h != NULL && h->stub_cache != NULL | |
3313 | && h->stub_cache->h == h | |
3314 | && h->stub_cache->id_sec == id_sec) | |
3315 | { | |
3316 | stub_entry = h->stub_cache; | |
3317 | } | |
3318 | else | |
3319 | { | |
3320 | char *stub_name; | |
3321 | ||
3322 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel); | |
3323 | if (stub_name == NULL) | |
3324 | return NULL; | |
3325 | ||
3326 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, | |
3327 | stub_name, FALSE, FALSE); | |
3328 | if (h != NULL) | |
3329 | h->stub_cache = stub_entry; | |
3330 | ||
3331 | free (stub_name); | |
3332 | } | |
3333 | ||
3334 | return stub_entry; | |
3335 | } | |
3336 | ||
48229727 JB |
3337 | /* Find or create a stub section. Returns a pointer to the stub section, and |
3338 | the section to which the stub section will be attached (in *LINK_SEC_P). | |
3339 | LINK_SEC_P may be NULL. */ | |
906e58ca | 3340 | |
48229727 JB |
3341 | static asection * |
3342 | elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, | |
3343 | struct elf32_arm_link_hash_table *htab) | |
906e58ca NC |
3344 | { |
3345 | asection *link_sec; | |
3346 | asection *stub_sec; | |
906e58ca NC |
3347 | |
3348 | link_sec = htab->stub_group[section->id].link_sec; | |
3349 | stub_sec = htab->stub_group[section->id].stub_sec; | |
3350 | if (stub_sec == NULL) | |
3351 | { | |
3352 | stub_sec = htab->stub_group[link_sec->id].stub_sec; | |
3353 | if (stub_sec == NULL) | |
3354 | { | |
3355 | size_t namelen; | |
3356 | bfd_size_type len; | |
3357 | char *s_name; | |
3358 | ||
3359 | namelen = strlen (link_sec->name); | |
3360 | len = namelen + sizeof (STUB_SUFFIX); | |
21d799b5 | 3361 | s_name = (char *) bfd_alloc (htab->stub_bfd, len); |
906e58ca NC |
3362 | if (s_name == NULL) |
3363 | return NULL; | |
3364 | ||
3365 | memcpy (s_name, link_sec->name, namelen); | |
3366 | memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); | |
3367 | stub_sec = (*htab->add_stub_section) (s_name, link_sec); | |
3368 | if (stub_sec == NULL) | |
3369 | return NULL; | |
3370 | htab->stub_group[link_sec->id].stub_sec = stub_sec; | |
3371 | } | |
3372 | htab->stub_group[section->id].stub_sec = stub_sec; | |
3373 | } | |
48229727 JB |
3374 | |
3375 | if (link_sec_p) | |
3376 | *link_sec_p = link_sec; | |
3377 | ||
3378 | return stub_sec; | |
3379 | } | |
3380 | ||
3381 | /* Add a new stub entry to the stub hash. Not all fields of the new | |
3382 | stub entry are initialised. */ | |
3383 | ||
3384 | static struct elf32_arm_stub_hash_entry * | |
3385 | elf32_arm_add_stub (const char *stub_name, | |
3386 | asection *section, | |
3387 | struct elf32_arm_link_hash_table *htab) | |
3388 | { | |
3389 | asection *link_sec; | |
3390 | asection *stub_sec; | |
3391 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3392 | ||
3393 | stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab); | |
3394 | if (stub_sec == NULL) | |
3395 | return NULL; | |
906e58ca NC |
3396 | |
3397 | /* Enter this entry into the linker stub hash table. */ | |
3398 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
3399 | TRUE, FALSE); | |
3400 | if (stub_entry == NULL) | |
3401 | { | |
3402 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
3403 | section->owner, | |
3404 | stub_name); | |
3405 | return NULL; | |
3406 | } | |
3407 | ||
3408 | stub_entry->stub_sec = stub_sec; | |
3409 | stub_entry->stub_offset = 0; | |
3410 | stub_entry->id_sec = link_sec; | |
3411 | ||
906e58ca NC |
3412 | return stub_entry; |
3413 | } | |
3414 | ||
3415 | /* Store an Arm insn into an output section not processed by | |
3416 | elf32_arm_write_section. */ | |
3417 | ||
3418 | static void | |
8029a119 NC |
3419 | put_arm_insn (struct elf32_arm_link_hash_table * htab, |
3420 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
3421 | { |
3422 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
3423 | bfd_putl32 (val, ptr); | |
3424 | else | |
3425 | bfd_putb32 (val, ptr); | |
3426 | } | |
3427 | ||
3428 | /* Store a 16-bit Thumb insn into an output section not processed by | |
3429 | elf32_arm_write_section. */ | |
3430 | ||
3431 | static void | |
8029a119 NC |
3432 | put_thumb_insn (struct elf32_arm_link_hash_table * htab, |
3433 | bfd * output_bfd, bfd_vma val, void * ptr) | |
906e58ca NC |
3434 | { |
3435 | if (htab->byteswap_code != bfd_little_endian (output_bfd)) | |
3436 | bfd_putl16 (val, ptr); | |
3437 | else | |
3438 | bfd_putb16 (val, ptr); | |
3439 | } | |
3440 | ||
48229727 JB |
3441 | static bfd_reloc_status_type elf32_arm_final_link_relocate |
3442 | (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, | |
3443 | Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, | |
3444 | const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **); | |
3445 | ||
906e58ca NC |
3446 | static bfd_boolean |
3447 | arm_build_one_stub (struct bfd_hash_entry *gen_entry, | |
3448 | void * in_arg) | |
3449 | { | |
48229727 | 3450 | #define MAXRELOCS 2 |
906e58ca | 3451 | struct elf32_arm_stub_hash_entry *stub_entry; |
4dfe6ac6 | 3452 | struct elf32_arm_link_hash_table *globals; |
906e58ca | 3453 | struct bfd_link_info *info; |
906e58ca NC |
3454 | asection *stub_sec; |
3455 | bfd *stub_bfd; | |
3456 | bfd_vma stub_addr; | |
3457 | bfd_byte *loc; | |
3458 | bfd_vma sym_value; | |
3459 | int template_size; | |
3460 | int size; | |
d3ce72d0 | 3461 | const insn_sequence *template_sequence; |
906e58ca | 3462 | int i; |
48229727 JB |
3463 | int stub_reloc_idx[MAXRELOCS] = {-1, -1}; |
3464 | int stub_reloc_offset[MAXRELOCS] = {0, 0}; | |
3465 | int nrelocs = 0; | |
906e58ca NC |
3466 | |
3467 | /* Massage our args to the form they really have. */ | |
3468 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
3469 | info = (struct bfd_link_info *) in_arg; | |
3470 | ||
3471 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
3472 | if (globals == NULL) |
3473 | return FALSE; | |
906e58ca | 3474 | |
906e58ca NC |
3475 | stub_sec = stub_entry->stub_sec; |
3476 | ||
4dfe6ac6 | 3477 | if ((globals->fix_cortex_a8 < 0) |
eb7c4339 NS |
3478 | != (stub_entry->stub_type >= arm_stub_a8_veneer_lwm)) |
3479 | /* We have to do the a8 fixes last, as they are less aligned than | |
3480 | the other veneers. */ | |
3481 | return TRUE; | |
3482 | ||
906e58ca NC |
3483 | /* Make a note of the offset within the stubs for this entry. */ |
3484 | stub_entry->stub_offset = stub_sec->size; | |
3485 | loc = stub_sec->contents + stub_entry->stub_offset; | |
3486 | ||
3487 | stub_bfd = stub_sec->owner; | |
3488 | ||
3489 | /* This is the address of the start of the stub. */ | |
3490 | stub_addr = stub_sec->output_section->vma + stub_sec->output_offset | |
3491 | + stub_entry->stub_offset; | |
3492 | ||
3493 | /* This is the address of the stub destination. */ | |
3494 | sym_value = (stub_entry->target_value | |
3495 | + stub_entry->target_section->output_offset | |
3496 | + stub_entry->target_section->output_section->vma); | |
3497 | ||
d3ce72d0 | 3498 | template_sequence = stub_entry->stub_template; |
461a49ca | 3499 | template_size = stub_entry->stub_template_size; |
906e58ca NC |
3500 | |
3501 | size = 0; | |
461a49ca | 3502 | for (i = 0; i < template_size; i++) |
906e58ca | 3503 | { |
d3ce72d0 | 3504 | switch (template_sequence[i].type) |
461a49ca DJ |
3505 | { |
3506 | case THUMB16_TYPE: | |
48229727 | 3507 | { |
d3ce72d0 NC |
3508 | bfd_vma data = (bfd_vma) template_sequence[i].data; |
3509 | if (template_sequence[i].reloc_addend != 0) | |
48229727 JB |
3510 | { |
3511 | /* We've borrowed the reloc_addend field to mean we should | |
3512 | insert a condition code into this (Thumb-1 branch) | |
3513 | instruction. See THUMB16_BCOND_INSN. */ | |
3514 | BFD_ASSERT ((data & 0xff00) == 0xd000); | |
3515 | data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; | |
3516 | } | |
3517 | put_thumb_insn (globals, stub_bfd, data, loc + size); | |
3518 | size += 2; | |
3519 | } | |
461a49ca | 3520 | break; |
906e58ca | 3521 | |
48229727 | 3522 | case THUMB32_TYPE: |
d3ce72d0 NC |
3523 | put_thumb_insn (globals, stub_bfd, |
3524 | (template_sequence[i].data >> 16) & 0xffff, | |
48229727 | 3525 | loc + size); |
d3ce72d0 | 3526 | put_thumb_insn (globals, stub_bfd, template_sequence[i].data & 0xffff, |
48229727 | 3527 | loc + size + 2); |
d3ce72d0 | 3528 | if (template_sequence[i].r_type != R_ARM_NONE) |
48229727 JB |
3529 | { |
3530 | stub_reloc_idx[nrelocs] = i; | |
3531 | stub_reloc_offset[nrelocs++] = size; | |
3532 | } | |
3533 | size += 4; | |
3534 | break; | |
3535 | ||
461a49ca | 3536 | case ARM_TYPE: |
d3ce72d0 NC |
3537 | put_arm_insn (globals, stub_bfd, template_sequence[i].data, |
3538 | loc + size); | |
461a49ca DJ |
3539 | /* Handle cases where the target is encoded within the |
3540 | instruction. */ | |
d3ce72d0 | 3541 | if (template_sequence[i].r_type == R_ARM_JUMP24) |
461a49ca | 3542 | { |
48229727 JB |
3543 | stub_reloc_idx[nrelocs] = i; |
3544 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
3545 | } |
3546 | size += 4; | |
3547 | break; | |
3548 | ||
3549 | case DATA_TYPE: | |
d3ce72d0 | 3550 | bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); |
48229727 JB |
3551 | stub_reloc_idx[nrelocs] = i; |
3552 | stub_reloc_offset[nrelocs++] = size; | |
461a49ca DJ |
3553 | size += 4; |
3554 | break; | |
3555 | ||
3556 | default: | |
3557 | BFD_FAIL (); | |
3558 | return FALSE; | |
3559 | } | |
906e58ca | 3560 | } |
461a49ca | 3561 | |
906e58ca NC |
3562 | stub_sec->size += size; |
3563 | ||
461a49ca DJ |
3564 | /* Stub size has already been computed in arm_size_one_stub. Check |
3565 | consistency. */ | |
3566 | BFD_ASSERT (size == stub_entry->stub_size); | |
3567 | ||
906e58ca NC |
3568 | /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ |
3569 | if (stub_entry->st_type == STT_ARM_TFUNC) | |
3570 | sym_value |= 1; | |
3571 | ||
48229727 JB |
3572 | /* Assume there is at least one and at most MAXRELOCS entries to relocate |
3573 | in each stub. */ | |
3574 | BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS); | |
c820be07 | 3575 | |
48229727 | 3576 | for (i = 0; i < nrelocs; i++) |
d3ce72d0 NC |
3577 | if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24 |
3578 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19 | |
3579 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL | |
3580 | || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22) | |
48229727 JB |
3581 | { |
3582 | Elf_Internal_Rela rel; | |
3583 | bfd_boolean unresolved_reloc; | |
3584 | char *error_message; | |
3585 | int sym_flags | |
d3ce72d0 | 3586 | = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22) |
48229727 JB |
3587 | ? STT_ARM_TFUNC : 0; |
3588 | bfd_vma points_to = sym_value + stub_entry->target_addend; | |
3589 | ||
3590 | rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; | |
d3ce72d0 NC |
3591 | rel.r_info = ELF32_R_INFO (0, |
3592 | template_sequence[stub_reloc_idx[i]].r_type); | |
3593 | rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend; | |
48229727 JB |
3594 | |
3595 | if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) | |
3596 | /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] | |
3597 | template should refer back to the instruction after the original | |
3598 | branch. */ | |
3599 | points_to = sym_value; | |
3600 | ||
33c6a8fc JB |
3601 | /* There may be unintended consequences if this is not true. */ |
3602 | BFD_ASSERT (stub_entry->h == NULL); | |
3603 | ||
48229727 JB |
3604 | /* Note: _bfd_final_link_relocate doesn't handle these relocations |
3605 | properly. We should probably use this function unconditionally, | |
3606 | rather than only for certain relocations listed in the enclosing | |
3607 | conditional, for the sake of consistency. */ | |
3608 | elf32_arm_final_link_relocate (elf32_arm_howto_from_type | |
d3ce72d0 | 3609 | (template_sequence[stub_reloc_idx[i]].r_type), |
48229727 JB |
3610 | stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, |
3611 | points_to, info, stub_entry->target_section, "", sym_flags, | |
33c6a8fc | 3612 | (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, |
48229727 JB |
3613 | &error_message); |
3614 | } | |
3615 | else | |
3616 | { | |
3617 | _bfd_final_link_relocate (elf32_arm_howto_from_type | |
d3ce72d0 | 3618 | (template_sequence[stub_reloc_idx[i]].r_type), stub_bfd, stub_sec, |
48229727 JB |
3619 | stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i], |
3620 | sym_value + stub_entry->target_addend, | |
d3ce72d0 | 3621 | template_sequence[stub_reloc_idx[i]].reloc_addend); |
48229727 | 3622 | } |
906e58ca NC |
3623 | |
3624 | return TRUE; | |
48229727 | 3625 | #undef MAXRELOCS |
906e58ca NC |
3626 | } |
3627 | ||
48229727 JB |
3628 | /* Calculate the template, template size and instruction size for a stub. |
3629 | Return value is the instruction size. */ | |
906e58ca | 3630 | |
48229727 JB |
3631 | static unsigned int |
3632 | find_stub_size_and_template (enum elf32_arm_stub_type stub_type, | |
3633 | const insn_sequence **stub_template, | |
3634 | int *stub_template_size) | |
906e58ca | 3635 | { |
d3ce72d0 | 3636 | const insn_sequence *template_sequence = NULL; |
48229727 JB |
3637 | int template_size = 0, i; |
3638 | unsigned int size; | |
906e58ca | 3639 | |
d3ce72d0 | 3640 | template_sequence = stub_definitions[stub_type].template_sequence; |
48229727 | 3641 | template_size = stub_definitions[stub_type].template_size; |
906e58ca NC |
3642 | |
3643 | size = 0; | |
461a49ca DJ |
3644 | for (i = 0; i < template_size; i++) |
3645 | { | |
d3ce72d0 | 3646 | switch (template_sequence[i].type) |
461a49ca DJ |
3647 | { |
3648 | case THUMB16_TYPE: | |
3649 | size += 2; | |
3650 | break; | |
3651 | ||
3652 | case ARM_TYPE: | |
48229727 | 3653 | case THUMB32_TYPE: |
461a49ca DJ |
3654 | case DATA_TYPE: |
3655 | size += 4; | |
3656 | break; | |
3657 | ||
3658 | default: | |
3659 | BFD_FAIL (); | |
3660 | return FALSE; | |
3661 | } | |
3662 | } | |
3663 | ||
48229727 | 3664 | if (stub_template) |
d3ce72d0 | 3665 | *stub_template = template_sequence; |
48229727 JB |
3666 | |
3667 | if (stub_template_size) | |
3668 | *stub_template_size = template_size; | |
3669 | ||
3670 | return size; | |
3671 | } | |
3672 | ||
3673 | /* As above, but don't actually build the stub. Just bump offset so | |
3674 | we know stub section sizes. */ | |
3675 | ||
3676 | static bfd_boolean | |
3677 | arm_size_one_stub (struct bfd_hash_entry *gen_entry, | |
3678 | void * in_arg) | |
3679 | { | |
3680 | struct elf32_arm_stub_hash_entry *stub_entry; | |
3681 | struct elf32_arm_link_hash_table *htab; | |
d3ce72d0 | 3682 | const insn_sequence *template_sequence; |
48229727 JB |
3683 | int template_size, size; |
3684 | ||
3685 | /* Massage our args to the form they really have. */ | |
3686 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
3687 | htab = (struct elf32_arm_link_hash_table *) in_arg; | |
3688 | ||
3689 | BFD_ASSERT((stub_entry->stub_type > arm_stub_none) | |
3690 | && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); | |
3691 | ||
d3ce72d0 | 3692 | size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, |
48229727 JB |
3693 | &template_size); |
3694 | ||
461a49ca | 3695 | stub_entry->stub_size = size; |
d3ce72d0 | 3696 | stub_entry->stub_template = template_sequence; |
461a49ca DJ |
3697 | stub_entry->stub_template_size = template_size; |
3698 | ||
906e58ca NC |
3699 | size = (size + 7) & ~7; |
3700 | stub_entry->stub_sec->size += size; | |
461a49ca | 3701 | |
906e58ca NC |
3702 | return TRUE; |
3703 | } | |
3704 | ||
3705 | /* External entry points for sizing and building linker stubs. */ | |
3706 | ||
3707 | /* Set up various things so that we can make a list of input sections | |
3708 | for each output section included in the link. Returns -1 on error, | |
3709 | 0 when no stubs will be needed, and 1 on success. */ | |
3710 | ||
3711 | int | |
3712 | elf32_arm_setup_section_lists (bfd *output_bfd, | |
3713 | struct bfd_link_info *info) | |
3714 | { | |
3715 | bfd *input_bfd; | |
3716 | unsigned int bfd_count; | |
3717 | int top_id, top_index; | |
3718 | asection *section; | |
3719 | asection **input_list, **list; | |
3720 | bfd_size_type amt; | |
3721 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
3722 | ||
4dfe6ac6 NC |
3723 | if (htab == NULL) |
3724 | return 0; | |
906e58ca NC |
3725 | if (! is_elf_hash_table (htab)) |
3726 | return 0; | |
3727 | ||
3728 | /* Count the number of input BFDs and find the top input section id. */ | |
3729 | for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; | |
3730 | input_bfd != NULL; | |
3731 | input_bfd = input_bfd->link_next) | |
3732 | { | |
3733 | bfd_count += 1; | |
3734 | for (section = input_bfd->sections; | |
3735 | section != NULL; | |
3736 | section = section->next) | |
3737 | { | |
3738 | if (top_id < section->id) | |
3739 | top_id = section->id; | |
3740 | } | |
3741 | } | |
3742 | htab->bfd_count = bfd_count; | |
3743 | ||
3744 | amt = sizeof (struct map_stub) * (top_id + 1); | |
21d799b5 | 3745 | htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); |
906e58ca NC |
3746 | if (htab->stub_group == NULL) |
3747 | return -1; | |
3748 | ||
3749 | /* We can't use output_bfd->section_count here to find the top output | |
3750 | section index as some sections may have been removed, and | |
3751 | _bfd_strip_section_from_output doesn't renumber the indices. */ | |
3752 | for (section = output_bfd->sections, top_index = 0; | |
3753 | section != NULL; | |
3754 | section = section->next) | |
3755 | { | |
3756 | if (top_index < section->index) | |
3757 | top_index = section->index; | |
3758 | } | |
3759 | ||
3760 | htab->top_index = top_index; | |
3761 | amt = sizeof (asection *) * (top_index + 1); | |
21d799b5 | 3762 | input_list = (asection **) bfd_malloc (amt); |
906e58ca NC |
3763 | htab->input_list = input_list; |
3764 | if (input_list == NULL) | |
3765 | return -1; | |
3766 | ||
3767 | /* For sections we aren't interested in, mark their entries with a | |
3768 | value we can check later. */ | |
3769 | list = input_list + top_index; | |
3770 | do | |
3771 | *list = bfd_abs_section_ptr; | |
3772 | while (list-- != input_list); | |
3773 | ||
3774 | for (section = output_bfd->sections; | |
3775 | section != NULL; | |
3776 | section = section->next) | |
3777 | { | |
3778 | if ((section->flags & SEC_CODE) != 0) | |
3779 | input_list[section->index] = NULL; | |
3780 | } | |
3781 | ||
3782 | return 1; | |
3783 | } | |
3784 | ||
3785 | /* The linker repeatedly calls this function for each input section, | |
3786 | in the order that input sections are linked into output sections. | |
3787 | Build lists of input sections to determine groupings between which | |
3788 | we may insert linker stubs. */ | |
3789 | ||
3790 | void | |
3791 | elf32_arm_next_input_section (struct bfd_link_info *info, | |
3792 | asection *isec) | |
3793 | { | |
3794 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
3795 | ||
4dfe6ac6 NC |
3796 | if (htab == NULL) |
3797 | return; | |
3798 | ||
906e58ca NC |
3799 | if (isec->output_section->index <= htab->top_index) |
3800 | { | |
3801 | asection **list = htab->input_list + isec->output_section->index; | |
3802 | ||
a7470592 | 3803 | if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) |
906e58ca NC |
3804 | { |
3805 | /* Steal the link_sec pointer for our list. */ | |
3806 | #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) | |
3807 | /* This happens to make the list in reverse order, | |
07d72278 | 3808 | which we reverse later. */ |
906e58ca NC |
3809 | PREV_SEC (isec) = *list; |
3810 | *list = isec; | |
3811 | } | |
3812 | } | |
3813 | } | |
3814 | ||
3815 | /* See whether we can group stub sections together. Grouping stub | |
3816 | sections may result in fewer stubs. More importantly, we need to | |
07d72278 | 3817 | put all .init* and .fini* stubs at the end of the .init or |
906e58ca NC |
3818 | .fini output sections respectively, because glibc splits the |
3819 | _init and _fini functions into multiple parts. Putting a stub in | |
3820 | the middle of a function is not a good idea. */ | |
3821 | ||
3822 | static void | |
3823 | group_sections (struct elf32_arm_link_hash_table *htab, | |
3824 | bfd_size_type stub_group_size, | |
07d72278 | 3825 | bfd_boolean stubs_always_after_branch) |
906e58ca | 3826 | { |
07d72278 | 3827 | asection **list = htab->input_list; |
906e58ca NC |
3828 | |
3829 | do | |
3830 | { | |
3831 | asection *tail = *list; | |
07d72278 | 3832 | asection *head; |
906e58ca NC |
3833 | |
3834 | if (tail == bfd_abs_section_ptr) | |
3835 | continue; | |
3836 | ||
07d72278 DJ |
3837 | /* Reverse the list: we must avoid placing stubs at the |
3838 | beginning of the section because the beginning of the text | |
3839 | section may be required for an interrupt vector in bare metal | |
3840 | code. */ | |
3841 | #define NEXT_SEC PREV_SEC | |
e780aef2 CL |
3842 | head = NULL; |
3843 | while (tail != NULL) | |
3844 | { | |
3845 | /* Pop from tail. */ | |
3846 | asection *item = tail; | |
3847 | tail = PREV_SEC (item); | |
3848 | ||
3849 | /* Push on head. */ | |
3850 | NEXT_SEC (item) = head; | |
3851 | head = item; | |
3852 | } | |
07d72278 DJ |
3853 | |
3854 | while (head != NULL) | |
906e58ca NC |
3855 | { |
3856 | asection *curr; | |
07d72278 | 3857 | asection *next; |
e780aef2 CL |
3858 | bfd_vma stub_group_start = head->output_offset; |
3859 | bfd_vma end_of_next; | |
906e58ca | 3860 | |
07d72278 | 3861 | curr = head; |
e780aef2 | 3862 | while (NEXT_SEC (curr) != NULL) |
8cd931b7 | 3863 | { |
e780aef2 CL |
3864 | next = NEXT_SEC (curr); |
3865 | end_of_next = next->output_offset + next->size; | |
3866 | if (end_of_next - stub_group_start >= stub_group_size) | |
3867 | /* End of NEXT is too far from start, so stop. */ | |
8cd931b7 | 3868 | break; |
e780aef2 CL |
3869 | /* Add NEXT to the group. */ |
3870 | curr = next; | |
8cd931b7 | 3871 | } |
906e58ca | 3872 | |
07d72278 | 3873 | /* OK, the size from the start to the start of CURR is less |
906e58ca | 3874 | than stub_group_size and thus can be handled by one stub |
07d72278 | 3875 | section. (Or the head section is itself larger than |
906e58ca NC |
3876 | stub_group_size, in which case we may be toast.) |
3877 | We should really be keeping track of the total size of | |
3878 | stubs added here, as stubs contribute to the final output | |
7fb9f789 | 3879 | section size. */ |
906e58ca NC |
3880 | do |
3881 | { | |
07d72278 | 3882 | next = NEXT_SEC (head); |
906e58ca | 3883 | /* Set up this stub group. */ |
07d72278 | 3884 | htab->stub_group[head->id].link_sec = curr; |
906e58ca | 3885 | } |
07d72278 | 3886 | while (head != curr && (head = next) != NULL); |
906e58ca NC |
3887 | |
3888 | /* But wait, there's more! Input sections up to stub_group_size | |
07d72278 DJ |
3889 | bytes after the stub section can be handled by it too. */ |
3890 | if (!stubs_always_after_branch) | |
906e58ca | 3891 | { |
e780aef2 CL |
3892 | stub_group_start = curr->output_offset + curr->size; |
3893 | ||
8cd931b7 | 3894 | while (next != NULL) |
906e58ca | 3895 | { |
e780aef2 CL |
3896 | end_of_next = next->output_offset + next->size; |
3897 | if (end_of_next - stub_group_start >= stub_group_size) | |
3898 | /* End of NEXT is too far from stubs, so stop. */ | |
8cd931b7 | 3899 | break; |
e780aef2 | 3900 | /* Add NEXT to the stub group. */ |
07d72278 DJ |
3901 | head = next; |
3902 | next = NEXT_SEC (head); | |
3903 | htab->stub_group[head->id].link_sec = curr; | |
906e58ca NC |
3904 | } |
3905 | } | |
07d72278 | 3906 | head = next; |
906e58ca NC |
3907 | } |
3908 | } | |
07d72278 | 3909 | while (list++ != htab->input_list + htab->top_index); |
906e58ca NC |
3910 | |
3911 | free (htab->input_list); | |
3912 | #undef PREV_SEC | |
07d72278 | 3913 | #undef NEXT_SEC |
906e58ca NC |
3914 | } |
3915 | ||
48229727 JB |
3916 | /* Comparison function for sorting/searching relocations relating to Cortex-A8 |
3917 | erratum fix. */ | |
3918 | ||
3919 | static int | |
3920 | a8_reloc_compare (const void *a, const void *b) | |
3921 | { | |
21d799b5 NC |
3922 | const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; |
3923 | const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; | |
48229727 JB |
3924 | |
3925 | if (ra->from < rb->from) | |
3926 | return -1; | |
3927 | else if (ra->from > rb->from) | |
3928 | return 1; | |
3929 | else | |
3930 | return 0; | |
3931 | } | |
3932 | ||
3933 | static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, | |
3934 | const char *, char **); | |
3935 | ||
3936 | /* Helper function to scan code for sequences which might trigger the Cortex-A8 | |
3937 | branch/TLB erratum. Fill in the table described by A8_FIXES_P, | |
81694485 | 3938 | NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false |
48229727 JB |
3939 | otherwise. */ |
3940 | ||
81694485 NC |
3941 | static bfd_boolean |
3942 | cortex_a8_erratum_scan (bfd *input_bfd, | |
3943 | struct bfd_link_info *info, | |
48229727 JB |
3944 | struct a8_erratum_fix **a8_fixes_p, |
3945 | unsigned int *num_a8_fixes_p, | |
3946 | unsigned int *a8_fix_table_size_p, | |
3947 | struct a8_erratum_reloc *a8_relocs, | |
eb7c4339 NS |
3948 | unsigned int num_a8_relocs, |
3949 | unsigned prev_num_a8_fixes, | |
3950 | bfd_boolean *stub_changed_p) | |
48229727 JB |
3951 | { |
3952 | asection *section; | |
3953 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); | |
3954 | struct a8_erratum_fix *a8_fixes = *a8_fixes_p; | |
3955 | unsigned int num_a8_fixes = *num_a8_fixes_p; | |
3956 | unsigned int a8_fix_table_size = *a8_fix_table_size_p; | |
3957 | ||
4dfe6ac6 NC |
3958 | if (htab == NULL) |
3959 | return FALSE; | |
3960 | ||
48229727 JB |
3961 | for (section = input_bfd->sections; |
3962 | section != NULL; | |
3963 | section = section->next) | |
3964 | { | |
3965 | bfd_byte *contents = NULL; | |
3966 | struct _arm_elf_section_data *sec_data; | |
3967 | unsigned int span; | |
3968 | bfd_vma base_vma; | |
3969 | ||
3970 | if (elf_section_type (section) != SHT_PROGBITS | |
3971 | || (elf_section_flags (section) & SHF_EXECINSTR) == 0 | |
3972 | || (section->flags & SEC_EXCLUDE) != 0 | |
3973 | || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS) | |
3974 | || (section->output_section == bfd_abs_section_ptr)) | |
3975 | continue; | |
3976 | ||
3977 | base_vma = section->output_section->vma + section->output_offset; | |
3978 | ||
3979 | if (elf_section_data (section)->this_hdr.contents != NULL) | |
3980 | contents = elf_section_data (section)->this_hdr.contents; | |
3981 | else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) | |
81694485 | 3982 | return TRUE; |
48229727 JB |
3983 | |
3984 | sec_data = elf32_arm_section_data (section); | |
3985 | ||
3986 | for (span = 0; span < sec_data->mapcount; span++) | |
3987 | { | |
3988 | unsigned int span_start = sec_data->map[span].vma; | |
3989 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
3990 | ? section->size : sec_data->map[span + 1].vma; | |
3991 | unsigned int i; | |
3992 | char span_type = sec_data->map[span].type; | |
3993 | bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; | |
3994 | ||
3995 | if (span_type != 't') | |
3996 | continue; | |
3997 | ||
3998 | /* Span is entirely within a single 4KB region: skip scanning. */ | |
3999 | if (((base_vma + span_start) & ~0xfff) | |
4000 | == ((base_vma + span_end) & ~0xfff)) | |
4001 | continue; | |
4002 | ||
4003 | /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: | |
4004 | ||
4005 | * The opcode is BLX.W, BL.W, B.W, Bcc.W | |
4006 | * The branch target is in the same 4KB region as the | |
4007 | first half of the branch. | |
4008 | * The instruction before the branch is a 32-bit | |
81694485 | 4009 | length non-branch instruction. */ |
48229727 JB |
4010 | for (i = span_start; i < span_end;) |
4011 | { | |
4012 | unsigned int insn = bfd_getl16 (&contents[i]); | |
4013 | bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; | |
4014 | bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; | |
4015 | ||
4016 | if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) | |
4017 | insn_32bit = TRUE; | |
4018 | ||
4019 | if (insn_32bit) | |
4020 | { | |
4021 | /* Load the rest of the insn (in manual-friendly order). */ | |
4022 | insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); | |
4023 | ||
4024 | /* Encoding T4: B<c>.W. */ | |
4025 | is_b = (insn & 0xf800d000) == 0xf0009000; | |
4026 | /* Encoding T1: BL<c>.W. */ | |
4027 | is_bl = (insn & 0xf800d000) == 0xf000d000; | |
4028 | /* Encoding T2: BLX<c>.W. */ | |
4029 | is_blx = (insn & 0xf800d000) == 0xf000c000; | |
4030 | /* Encoding T3: B<c>.W (not permitted in IT block). */ | |
4031 | is_bcc = (insn & 0xf800d000) == 0xf0008000 | |
4032 | && (insn & 0x07f00000) != 0x03800000; | |
4033 | } | |
4034 | ||
4035 | is_32bit_branch = is_b || is_bl || is_blx || is_bcc; | |
4036 | ||
81694485 NC |
4037 | if (((base_vma + i) & 0xfff) == 0xffe |
4038 | && insn_32bit | |
4039 | && is_32bit_branch | |
4040 | && last_was_32bit | |
4041 | && ! last_was_branch) | |
48229727 | 4042 | { |
81694485 | 4043 | bfd_signed_vma offset; |
48229727 JB |
4044 | bfd_boolean force_target_arm = FALSE; |
4045 | bfd_boolean force_target_thumb = FALSE; | |
4046 | bfd_vma target; | |
4047 | enum elf32_arm_stub_type stub_type = arm_stub_none; | |
4048 | struct a8_erratum_reloc key, *found; | |
4049 | ||
4050 | key.from = base_vma + i; | |
21d799b5 NC |
4051 | found = (struct a8_erratum_reloc *) |
4052 | bsearch (&key, a8_relocs, num_a8_relocs, | |
4053 | sizeof (struct a8_erratum_reloc), | |
4054 | &a8_reloc_compare); | |
48229727 JB |
4055 | |
4056 | if (found) | |
4057 | { | |
4058 | char *error_message = NULL; | |
4059 | struct elf_link_hash_entry *entry; | |
4060 | ||
4061 | /* We don't care about the error returned from this | |
4062 | function, only if there is glue or not. */ | |
4063 | entry = find_thumb_glue (info, found->sym_name, | |
4064 | &error_message); | |
4065 | ||
4066 | if (entry) | |
4067 | found->non_a8_stub = TRUE; | |
4068 | ||
4069 | if (found->r_type == R_ARM_THM_CALL | |
4070 | && found->st_type != STT_ARM_TFUNC) | |
4071 | force_target_arm = TRUE; | |
4072 | else if (found->r_type == R_ARM_THM_CALL | |
4073 | && found->st_type == STT_ARM_TFUNC) | |
4074 | force_target_thumb = TRUE; | |
4075 | } | |
4076 | ||
4077 | /* Check if we have an offending branch instruction. */ | |
4078 | ||
4079 | if (found && found->non_a8_stub) | |
4080 | /* We've already made a stub for this instruction, e.g. | |
4081 | it's a long branch or a Thumb->ARM stub. Assume that | |
4082 | stub will suffice to work around the A8 erratum (see | |
4083 | setting of always_after_branch above). */ | |
4084 | ; | |
4085 | else if (is_bcc) | |
4086 | { | |
4087 | offset = (insn & 0x7ff) << 1; | |
4088 | offset |= (insn & 0x3f0000) >> 4; | |
4089 | offset |= (insn & 0x2000) ? 0x40000 : 0; | |
4090 | offset |= (insn & 0x800) ? 0x80000 : 0; | |
4091 | offset |= (insn & 0x4000000) ? 0x100000 : 0; | |
4092 | if (offset & 0x100000) | |
81694485 | 4093 | offset |= ~ ((bfd_signed_vma) 0xfffff); |
48229727 JB |
4094 | stub_type = arm_stub_a8_veneer_b_cond; |
4095 | } | |
4096 | else if (is_b || is_bl || is_blx) | |
4097 | { | |
4098 | int s = (insn & 0x4000000) != 0; | |
4099 | int j1 = (insn & 0x2000) != 0; | |
4100 | int j2 = (insn & 0x800) != 0; | |
4101 | int i1 = !(j1 ^ s); | |
4102 | int i2 = !(j2 ^ s); | |
4103 | ||
4104 | offset = (insn & 0x7ff) << 1; | |
4105 | offset |= (insn & 0x3ff0000) >> 4; | |
4106 | offset |= i2 << 22; | |
4107 | offset |= i1 << 23; | |
4108 | offset |= s << 24; | |
4109 | if (offset & 0x1000000) | |
81694485 | 4110 | offset |= ~ ((bfd_signed_vma) 0xffffff); |
48229727 JB |
4111 | |
4112 | if (is_blx) | |
81694485 | 4113 | offset &= ~ ((bfd_signed_vma) 3); |
48229727 JB |
4114 | |
4115 | stub_type = is_blx ? arm_stub_a8_veneer_blx : | |
4116 | is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; | |
4117 | } | |
4118 | ||
4119 | if (stub_type != arm_stub_none) | |
4120 | { | |
4121 | bfd_vma pc_for_insn = base_vma + i + 4; | |
4122 | ||
4123 | /* The original instruction is a BL, but the target is | |
4124 | an ARM instruction. If we were not making a stub, | |
4125 | the BL would have been converted to a BLX. Use the | |
4126 | BLX stub instead in that case. */ | |
4127 | if (htab->use_blx && force_target_arm | |
4128 | && stub_type == arm_stub_a8_veneer_bl) | |
4129 | { | |
4130 | stub_type = arm_stub_a8_veneer_blx; | |
4131 | is_blx = TRUE; | |
4132 | is_bl = FALSE; | |
4133 | } | |
4134 | /* Conversely, if the original instruction was | |
4135 | BLX but the target is Thumb mode, use the BL | |
4136 | stub. */ | |
4137 | else if (force_target_thumb | |
4138 | && stub_type == arm_stub_a8_veneer_blx) | |
4139 | { | |
4140 | stub_type = arm_stub_a8_veneer_bl; | |
4141 | is_blx = FALSE; | |
4142 | is_bl = TRUE; | |
4143 | } | |
4144 | ||
4145 | if (is_blx) | |
81694485 | 4146 | pc_for_insn &= ~ ((bfd_vma) 3); |
48229727 JB |
4147 | |
4148 | /* If we found a relocation, use the proper destination, | |
4149 | not the offset in the (unrelocated) instruction. | |
4150 | Note this is always done if we switched the stub type | |
4151 | above. */ | |
4152 | if (found) | |
81694485 NC |
4153 | offset = |
4154 | (bfd_signed_vma) (found->destination - pc_for_insn); | |
48229727 JB |
4155 | |
4156 | target = pc_for_insn + offset; | |
4157 | ||
4158 | /* The BLX stub is ARM-mode code. Adjust the offset to | |
4159 | take the different PC value (+8 instead of +4) into | |
4160 | account. */ | |
4161 | if (stub_type == arm_stub_a8_veneer_blx) | |
4162 | offset += 4; | |
4163 | ||
4164 | if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) | |
4165 | { | |
eb7c4339 | 4166 | char *stub_name = NULL; |
48229727 JB |
4167 | |
4168 | if (num_a8_fixes == a8_fix_table_size) | |
4169 | { | |
4170 | a8_fix_table_size *= 2; | |
21d799b5 NC |
4171 | a8_fixes = (struct a8_erratum_fix *) |
4172 | bfd_realloc (a8_fixes, | |
4173 | sizeof (struct a8_erratum_fix) | |
4174 | * a8_fix_table_size); | |
48229727 JB |
4175 | } |
4176 | ||
eb7c4339 NS |
4177 | if (num_a8_fixes < prev_num_a8_fixes) |
4178 | { | |
4179 | /* If we're doing a subsequent scan, | |
4180 | check if we've found the same fix as | |
4181 | before, and try and reuse the stub | |
4182 | name. */ | |
4183 | stub_name = a8_fixes[num_a8_fixes].stub_name; | |
4184 | if ((a8_fixes[num_a8_fixes].section != section) | |
4185 | || (a8_fixes[num_a8_fixes].offset != i)) | |
4186 | { | |
4187 | free (stub_name); | |
4188 | stub_name = NULL; | |
4189 | *stub_changed_p = TRUE; | |
4190 | } | |
4191 | } | |
4192 | ||
4193 | if (!stub_name) | |
4194 | { | |
21d799b5 | 4195 | stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); |
eb7c4339 NS |
4196 | if (stub_name != NULL) |
4197 | sprintf (stub_name, "%x:%x", section->id, i); | |
4198 | } | |
48229727 JB |
4199 | |
4200 | a8_fixes[num_a8_fixes].input_bfd = input_bfd; | |
4201 | a8_fixes[num_a8_fixes].section = section; | |
4202 | a8_fixes[num_a8_fixes].offset = i; | |
4203 | a8_fixes[num_a8_fixes].addend = offset; | |
4204 | a8_fixes[num_a8_fixes].orig_insn = insn; | |
4205 | a8_fixes[num_a8_fixes].stub_name = stub_name; | |
4206 | a8_fixes[num_a8_fixes].stub_type = stub_type; | |
4207 | ||
4208 | num_a8_fixes++; | |
4209 | } | |
4210 | } | |
4211 | } | |
4212 | ||
4213 | i += insn_32bit ? 4 : 2; | |
4214 | last_was_32bit = insn_32bit; | |
4215 | last_was_branch = is_32bit_branch; | |
4216 | } | |
4217 | } | |
4218 | ||
4219 | if (elf_section_data (section)->this_hdr.contents == NULL) | |
4220 | free (contents); | |
4221 | } | |
4222 | ||
4223 | *a8_fixes_p = a8_fixes; | |
4224 | *num_a8_fixes_p = num_a8_fixes; | |
4225 | *a8_fix_table_size_p = a8_fix_table_size; | |
4226 | ||
81694485 | 4227 | return FALSE; |
48229727 JB |
4228 | } |
4229 | ||
906e58ca NC |
4230 | /* Determine and set the size of the stub section for a final link. |
4231 | ||
4232 | The basic idea here is to examine all the relocations looking for | |
4233 | PC-relative calls to a target that is unreachable with a "bl" | |
4234 | instruction. */ | |
4235 | ||
4236 | bfd_boolean | |
4237 | elf32_arm_size_stubs (bfd *output_bfd, | |
4238 | bfd *stub_bfd, | |
4239 | struct bfd_link_info *info, | |
4240 | bfd_signed_vma group_size, | |
4241 | asection * (*add_stub_section) (const char *, asection *), | |
4242 | void (*layout_sections_again) (void)) | |
4243 | { | |
4244 | bfd_size_type stub_group_size; | |
07d72278 | 4245 | bfd_boolean stubs_always_after_branch; |
906e58ca | 4246 | struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); |
48229727 | 4247 | struct a8_erratum_fix *a8_fixes = NULL; |
eb7c4339 | 4248 | unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; |
48229727 JB |
4249 | struct a8_erratum_reloc *a8_relocs = NULL; |
4250 | unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; | |
4251 | ||
4dfe6ac6 NC |
4252 | if (htab == NULL) |
4253 | return FALSE; | |
4254 | ||
48229727 JB |
4255 | if (htab->fix_cortex_a8) |
4256 | { | |
21d799b5 NC |
4257 | a8_fixes = (struct a8_erratum_fix *) |
4258 | bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); | |
4259 | a8_relocs = (struct a8_erratum_reloc *) | |
4260 | bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); | |
48229727 | 4261 | } |
906e58ca NC |
4262 | |
4263 | /* Propagate mach to stub bfd, because it may not have been | |
4264 | finalized when we created stub_bfd. */ | |
4265 | bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), | |
4266 | bfd_get_mach (output_bfd)); | |
4267 | ||
4268 | /* Stash our params away. */ | |
4269 | htab->stub_bfd = stub_bfd; | |
4270 | htab->add_stub_section = add_stub_section; | |
4271 | htab->layout_sections_again = layout_sections_again; | |
07d72278 | 4272 | stubs_always_after_branch = group_size < 0; |
48229727 JB |
4273 | |
4274 | /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page | |
4275 | as the first half of a 32-bit branch straddling two 4K pages. This is a | |
4276 | crude way of enforcing that. */ | |
4277 | if (htab->fix_cortex_a8) | |
4278 | stubs_always_after_branch = 1; | |
4279 | ||
906e58ca NC |
4280 | if (group_size < 0) |
4281 | stub_group_size = -group_size; | |
4282 | else | |
4283 | stub_group_size = group_size; | |
4284 | ||
4285 | if (stub_group_size == 1) | |
4286 | { | |
4287 | /* Default values. */ | |
4288 | /* Thumb branch range is +-4MB has to be used as the default | |
4289 | maximum size (a given section can contain both ARM and Thumb | |
4290 | code, so the worst case has to be taken into account). | |
4291 | ||
4292 | This value is 24K less than that, which allows for 2025 | |
4293 | 12-byte stubs. If we exceed that, then we will fail to link. | |
4294 | The user will have to relink with an explicit group size | |
4295 | option. */ | |
4296 | stub_group_size = 4170000; | |
4297 | } | |
4298 | ||
07d72278 | 4299 | group_sections (htab, stub_group_size, stubs_always_after_branch); |
906e58ca | 4300 | |
3ae046cc NS |
4301 | /* If we're applying the cortex A8 fix, we need to determine the |
4302 | program header size now, because we cannot change it later -- | |
4303 | that could alter section placements. Notice the A8 erratum fix | |
4304 | ends up requiring the section addresses to remain unchanged | |
4305 | modulo the page size. That's something we cannot represent | |
4306 | inside BFD, and we don't want to force the section alignment to | |
4307 | be the page size. */ | |
4308 | if (htab->fix_cortex_a8) | |
4309 | (*htab->layout_sections_again) (); | |
4310 | ||
906e58ca NC |
4311 | while (1) |
4312 | { | |
4313 | bfd *input_bfd; | |
4314 | unsigned int bfd_indx; | |
4315 | asection *stub_sec; | |
eb7c4339 NS |
4316 | bfd_boolean stub_changed = FALSE; |
4317 | unsigned prev_num_a8_fixes = num_a8_fixes; | |
906e58ca | 4318 | |
48229727 | 4319 | num_a8_fixes = 0; |
906e58ca NC |
4320 | for (input_bfd = info->input_bfds, bfd_indx = 0; |
4321 | input_bfd != NULL; | |
4322 | input_bfd = input_bfd->link_next, bfd_indx++) | |
4323 | { | |
4324 | Elf_Internal_Shdr *symtab_hdr; | |
4325 | asection *section; | |
4326 | Elf_Internal_Sym *local_syms = NULL; | |
4327 | ||
48229727 JB |
4328 | num_a8_relocs = 0; |
4329 | ||
906e58ca NC |
4330 | /* We'll need the symbol table in a second. */ |
4331 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
4332 | if (symtab_hdr->sh_info == 0) | |
4333 | continue; | |
4334 | ||
4335 | /* Walk over each section attached to the input bfd. */ | |
4336 | for (section = input_bfd->sections; | |
4337 | section != NULL; | |
4338 | section = section->next) | |
4339 | { | |
4340 | Elf_Internal_Rela *internal_relocs, *irelaend, *irela; | |
4341 | ||
4342 | /* If there aren't any relocs, then there's nothing more | |
4343 | to do. */ | |
4344 | if ((section->flags & SEC_RELOC) == 0 | |
4345 | || section->reloc_count == 0 | |
4346 | || (section->flags & SEC_CODE) == 0) | |
4347 | continue; | |
4348 | ||
4349 | /* If this section is a link-once section that will be | |
4350 | discarded, then don't create any stubs. */ | |
4351 | if (section->output_section == NULL | |
4352 | || section->output_section->owner != output_bfd) | |
4353 | continue; | |
4354 | ||
4355 | /* Get the relocs. */ | |
4356 | internal_relocs | |
4357 | = _bfd_elf_link_read_relocs (input_bfd, section, NULL, | |
4358 | NULL, info->keep_memory); | |
4359 | if (internal_relocs == NULL) | |
4360 | goto error_ret_free_local; | |
4361 | ||
4362 | /* Now examine each relocation. */ | |
4363 | irela = internal_relocs; | |
4364 | irelaend = irela + section->reloc_count; | |
4365 | for (; irela < irelaend; irela++) | |
4366 | { | |
4367 | unsigned int r_type, r_indx; | |
4368 | enum elf32_arm_stub_type stub_type; | |
4369 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4370 | asection *sym_sec; | |
4371 | bfd_vma sym_value; | |
4372 | bfd_vma destination; | |
4373 | struct elf32_arm_link_hash_entry *hash; | |
7413f23f | 4374 | const char *sym_name; |
906e58ca NC |
4375 | char *stub_name; |
4376 | const asection *id_sec; | |
4377 | unsigned char st_type; | |
48229727 | 4378 | bfd_boolean created_stub = FALSE; |
906e58ca NC |
4379 | |
4380 | r_type = ELF32_R_TYPE (irela->r_info); | |
4381 | r_indx = ELF32_R_SYM (irela->r_info); | |
4382 | ||
4383 | if (r_type >= (unsigned int) R_ARM_max) | |
4384 | { | |
4385 | bfd_set_error (bfd_error_bad_value); | |
4386 | error_ret_free_internal: | |
4387 | if (elf_section_data (section)->relocs == NULL) | |
4388 | free (internal_relocs); | |
4389 | goto error_ret_free_local; | |
4390 | } | |
4391 | ||
155d87d7 | 4392 | /* Only look for stubs on branch instructions. */ |
906e58ca | 4393 | if ((r_type != (unsigned int) R_ARM_CALL) |
155d87d7 CL |
4394 | && (r_type != (unsigned int) R_ARM_THM_CALL) |
4395 | && (r_type != (unsigned int) R_ARM_JUMP24) | |
48229727 JB |
4396 | && (r_type != (unsigned int) R_ARM_THM_JUMP19) |
4397 | && (r_type != (unsigned int) R_ARM_THM_XPC22) | |
155d87d7 CL |
4398 | && (r_type != (unsigned int) R_ARM_THM_JUMP24) |
4399 | && (r_type != (unsigned int) R_ARM_PLT32)) | |
906e58ca NC |
4400 | continue; |
4401 | ||
4402 | /* Now determine the call target, its name, value, | |
4403 | section. */ | |
4404 | sym_sec = NULL; | |
4405 | sym_value = 0; | |
4406 | destination = 0; | |
4407 | hash = NULL; | |
7413f23f | 4408 | sym_name = NULL; |
906e58ca NC |
4409 | if (r_indx < symtab_hdr->sh_info) |
4410 | { | |
4411 | /* It's a local symbol. */ | |
4412 | Elf_Internal_Sym *sym; | |
4413 | Elf_Internal_Shdr *hdr; | |
4414 | ||
4415 | if (local_syms == NULL) | |
4416 | { | |
4417 | local_syms | |
4418 | = (Elf_Internal_Sym *) symtab_hdr->contents; | |
4419 | if (local_syms == NULL) | |
4420 | local_syms | |
4421 | = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
4422 | symtab_hdr->sh_info, 0, | |
4423 | NULL, NULL, NULL); | |
4424 | if (local_syms == NULL) | |
4425 | goto error_ret_free_internal; | |
4426 | } | |
4427 | ||
4428 | sym = local_syms + r_indx; | |
4429 | hdr = elf_elfsections (input_bfd)[sym->st_shndx]; | |
4430 | sym_sec = hdr->bfd_section; | |
ffcb4889 NS |
4431 | if (!sym_sec) |
4432 | /* This is an undefined symbol. It can never | |
4433 | be resolved. */ | |
4434 | continue; | |
4435 | ||
906e58ca NC |
4436 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) |
4437 | sym_value = sym->st_value; | |
4438 | destination = (sym_value + irela->r_addend | |
4439 | + sym_sec->output_offset | |
4440 | + sym_sec->output_section->vma); | |
4441 | st_type = ELF_ST_TYPE (sym->st_info); | |
7413f23f DJ |
4442 | sym_name |
4443 | = bfd_elf_string_from_elf_section (input_bfd, | |
4444 | symtab_hdr->sh_link, | |
4445 | sym->st_name); | |
906e58ca NC |
4446 | } |
4447 | else | |
4448 | { | |
4449 | /* It's an external symbol. */ | |
4450 | int e_indx; | |
4451 | ||
4452 | e_indx = r_indx - symtab_hdr->sh_info; | |
4453 | hash = ((struct elf32_arm_link_hash_entry *) | |
4454 | elf_sym_hashes (input_bfd)[e_indx]); | |
4455 | ||
4456 | while (hash->root.root.type == bfd_link_hash_indirect | |
4457 | || hash->root.root.type == bfd_link_hash_warning) | |
4458 | hash = ((struct elf32_arm_link_hash_entry *) | |
4459 | hash->root.root.u.i.link); | |
4460 | ||
4461 | if (hash->root.root.type == bfd_link_hash_defined | |
4462 | || hash->root.root.type == bfd_link_hash_defweak) | |
4463 | { | |
4464 | sym_sec = hash->root.root.u.def.section; | |
4465 | sym_value = hash->root.root.u.def.value; | |
022f8312 CL |
4466 | |
4467 | struct elf32_arm_link_hash_table *globals = | |
4468 | elf32_arm_hash_table (info); | |
4469 | ||
4470 | /* For a destination in a shared library, | |
4471 | use the PLT stub as target address to | |
4472 | decide whether a branch stub is | |
4473 | needed. */ | |
4dfe6ac6 NC |
4474 | if (globals != NULL |
4475 | && globals->splt != NULL | |
4476 | && hash != NULL | |
022f8312 CL |
4477 | && hash->root.plt.offset != (bfd_vma) -1) |
4478 | { | |
4479 | sym_sec = globals->splt; | |
4480 | sym_value = hash->root.plt.offset; | |
4481 | if (sym_sec->output_section != NULL) | |
4482 | destination = (sym_value | |
4483 | + sym_sec->output_offset | |
4484 | + sym_sec->output_section->vma); | |
4485 | } | |
4486 | else if (sym_sec->output_section != NULL) | |
906e58ca NC |
4487 | destination = (sym_value + irela->r_addend |
4488 | + sym_sec->output_offset | |
4489 | + sym_sec->output_section->vma); | |
4490 | } | |
69c5861e CL |
4491 | else if ((hash->root.root.type == bfd_link_hash_undefined) |
4492 | || (hash->root.root.type == bfd_link_hash_undefweak)) | |
4493 | { | |
4494 | /* For a shared library, use the PLT stub as | |
4495 | target address to decide whether a long | |
4496 | branch stub is needed. | |
4497 | For absolute code, they cannot be handled. */ | |
4498 | struct elf32_arm_link_hash_table *globals = | |
4499 | elf32_arm_hash_table (info); | |
4500 | ||
4dfe6ac6 NC |
4501 | if (globals != NULL |
4502 | && globals->splt != NULL | |
4503 | && hash != NULL | |
69c5861e CL |
4504 | && hash->root.plt.offset != (bfd_vma) -1) |
4505 | { | |
4506 | sym_sec = globals->splt; | |
4507 | sym_value = hash->root.plt.offset; | |
4508 | if (sym_sec->output_section != NULL) | |
4509 | destination = (sym_value | |
4510 | + sym_sec->output_offset | |
4511 | + sym_sec->output_section->vma); | |
4512 | } | |
4513 | else | |
4514 | continue; | |
4515 | } | |
906e58ca NC |
4516 | else |
4517 | { | |
4518 | bfd_set_error (bfd_error_bad_value); | |
4519 | goto error_ret_free_internal; | |
4520 | } | |
4521 | st_type = ELF_ST_TYPE (hash->root.type); | |
7413f23f | 4522 | sym_name = hash->root.root.root.string; |
906e58ca NC |
4523 | } |
4524 | ||
48229727 | 4525 | do |
7413f23f | 4526 | { |
48229727 JB |
4527 | /* Determine what (if any) linker stub is needed. */ |
4528 | stub_type = arm_type_of_stub (info, section, irela, | |
4529 | st_type, hash, | |
4530 | destination, sym_sec, | |
4531 | input_bfd, sym_name); | |
4532 | if (stub_type == arm_stub_none) | |
4533 | break; | |
4534 | ||
4535 | /* Support for grouping stub sections. */ | |
4536 | id_sec = htab->stub_group[section->id].link_sec; | |
4537 | ||
4538 | /* Get the name of this stub. */ | |
4539 | stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, | |
4540 | irela); | |
4541 | if (!stub_name) | |
4542 | goto error_ret_free_internal; | |
4543 | ||
4544 | /* We've either created a stub for this reloc already, | |
4545 | or we are about to. */ | |
4546 | created_stub = TRUE; | |
4547 | ||
4548 | stub_entry = arm_stub_hash_lookup | |
4549 | (&htab->stub_hash_table, stub_name, | |
4550 | FALSE, FALSE); | |
4551 | if (stub_entry != NULL) | |
4552 | { | |
4553 | /* The proper stub has already been created. */ | |
4554 | free (stub_name); | |
eb7c4339 | 4555 | stub_entry->target_value = sym_value; |
48229727 JB |
4556 | break; |
4557 | } | |
7413f23f | 4558 | |
48229727 JB |
4559 | stub_entry = elf32_arm_add_stub (stub_name, section, |
4560 | htab); | |
4561 | if (stub_entry == NULL) | |
4562 | { | |
4563 | free (stub_name); | |
4564 | goto error_ret_free_internal; | |
4565 | } | |
7413f23f | 4566 | |
48229727 JB |
4567 | stub_entry->target_value = sym_value; |
4568 | stub_entry->target_section = sym_sec; | |
4569 | stub_entry->stub_type = stub_type; | |
4570 | stub_entry->h = hash; | |
4571 | stub_entry->st_type = st_type; | |
4572 | ||
4573 | if (sym_name == NULL) | |
4574 | sym_name = "unnamed"; | |
21d799b5 NC |
4575 | stub_entry->output_name = (char *) |
4576 | bfd_alloc (htab->stub_bfd, | |
48229727 JB |
4577 | sizeof (THUMB2ARM_GLUE_ENTRY_NAME) |
4578 | + strlen (sym_name)); | |
4579 | if (stub_entry->output_name == NULL) | |
4580 | { | |
4581 | free (stub_name); | |
4582 | goto error_ret_free_internal; | |
4583 | } | |
4584 | ||
4585 | /* For historical reasons, use the existing names for | |
4586 | ARM-to-Thumb and Thumb-to-ARM stubs. */ | |
4587 | if ( ((r_type == (unsigned int) R_ARM_THM_CALL) | |
4588 | || (r_type == (unsigned int) R_ARM_THM_JUMP24)) | |
4589 | && st_type != STT_ARM_TFUNC) | |
4590 | sprintf (stub_entry->output_name, | |
4591 | THUMB2ARM_GLUE_ENTRY_NAME, sym_name); | |
4592 | else if ( ((r_type == (unsigned int) R_ARM_CALL) | |
4593 | || (r_type == (unsigned int) R_ARM_JUMP24)) | |
4594 | && st_type == STT_ARM_TFUNC) | |
4595 | sprintf (stub_entry->output_name, | |
4596 | ARM2THUMB_GLUE_ENTRY_NAME, sym_name); | |
4597 | else | |
4598 | sprintf (stub_entry->output_name, STUB_ENTRY_NAME, | |
4599 | sym_name); | |
4600 | ||
4601 | stub_changed = TRUE; | |
4602 | } | |
4603 | while (0); | |
4604 | ||
4605 | /* Look for relocations which might trigger Cortex-A8 | |
4606 | erratum. */ | |
4607 | if (htab->fix_cortex_a8 | |
4608 | && (r_type == (unsigned int) R_ARM_THM_JUMP24 | |
4609 | || r_type == (unsigned int) R_ARM_THM_JUMP19 | |
4610 | || r_type == (unsigned int) R_ARM_THM_CALL | |
4611 | || r_type == (unsigned int) R_ARM_THM_XPC22)) | |
4612 | { | |
4613 | bfd_vma from = section->output_section->vma | |
4614 | + section->output_offset | |
4615 | + irela->r_offset; | |
4616 | ||
4617 | if ((from & 0xfff) == 0xffe) | |
4618 | { | |
4619 | /* Found a candidate. Note we haven't checked the | |
4620 | destination is within 4K here: if we do so (and | |
4621 | don't create an entry in a8_relocs) we can't tell | |
4622 | that a branch should have been relocated when | |
4623 | scanning later. */ | |
4624 | if (num_a8_relocs == a8_reloc_table_size) | |
4625 | { | |
4626 | a8_reloc_table_size *= 2; | |
21d799b5 NC |
4627 | a8_relocs = (struct a8_erratum_reloc *) |
4628 | bfd_realloc (a8_relocs, | |
4629 | sizeof (struct a8_erratum_reloc) | |
4630 | * a8_reloc_table_size); | |
48229727 JB |
4631 | } |
4632 | ||
4633 | a8_relocs[num_a8_relocs].from = from; | |
4634 | a8_relocs[num_a8_relocs].destination = destination; | |
4635 | a8_relocs[num_a8_relocs].r_type = r_type; | |
4636 | a8_relocs[num_a8_relocs].st_type = st_type; | |
4637 | a8_relocs[num_a8_relocs].sym_name = sym_name; | |
4638 | a8_relocs[num_a8_relocs].non_a8_stub = created_stub; | |
4639 | ||
4640 | num_a8_relocs++; | |
4641 | } | |
4642 | } | |
906e58ca NC |
4643 | } |
4644 | ||
48229727 JB |
4645 | /* We're done with the internal relocs, free them. */ |
4646 | if (elf_section_data (section)->relocs == NULL) | |
4647 | free (internal_relocs); | |
4648 | } | |
4649 | ||
4650 | if (htab->fix_cortex_a8) | |
4651 | { | |
4652 | /* Sort relocs which might apply to Cortex-A8 erratum. */ | |
eb7c4339 NS |
4653 | qsort (a8_relocs, num_a8_relocs, |
4654 | sizeof (struct a8_erratum_reloc), | |
48229727 JB |
4655 | &a8_reloc_compare); |
4656 | ||
4657 | /* Scan for branches which might trigger Cortex-A8 erratum. */ | |
4658 | if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, | |
4659 | &num_a8_fixes, &a8_fix_table_size, | |
eb7c4339 NS |
4660 | a8_relocs, num_a8_relocs, |
4661 | prev_num_a8_fixes, &stub_changed) | |
4662 | != 0) | |
48229727 | 4663 | goto error_ret_free_local; |
5e681ec4 | 4664 | } |
5e681ec4 PB |
4665 | } |
4666 | ||
eb7c4339 | 4667 | if (prev_num_a8_fixes != num_a8_fixes) |
48229727 JB |
4668 | stub_changed = TRUE; |
4669 | ||
906e58ca NC |
4670 | if (!stub_changed) |
4671 | break; | |
5e681ec4 | 4672 | |
906e58ca NC |
4673 | /* OK, we've added some stubs. Find out the new size of the |
4674 | stub sections. */ | |
4675 | for (stub_sec = htab->stub_bfd->sections; | |
4676 | stub_sec != NULL; | |
4677 | stub_sec = stub_sec->next) | |
3e6b1042 DJ |
4678 | { |
4679 | /* Ignore non-stub sections. */ | |
4680 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
4681 | continue; | |
4682 | ||
4683 | stub_sec->size = 0; | |
4684 | } | |
b34b2d70 | 4685 | |
906e58ca NC |
4686 | bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); |
4687 | ||
48229727 JB |
4688 | /* Add Cortex-A8 erratum veneers to stub section sizes too. */ |
4689 | if (htab->fix_cortex_a8) | |
4690 | for (i = 0; i < num_a8_fixes; i++) | |
4691 | { | |
4692 | stub_sec = elf32_arm_create_or_find_stub_sec (NULL, | |
4693 | a8_fixes[i].section, htab); | |
4694 | ||
4695 | if (stub_sec == NULL) | |
4696 | goto error_ret_free_local; | |
4697 | ||
4698 | stub_sec->size | |
4699 | += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, | |
4700 | NULL); | |
4701 | } | |
4702 | ||
4703 | ||
906e58ca NC |
4704 | /* Ask the linker to do its stuff. */ |
4705 | (*htab->layout_sections_again) (); | |
ba93b8ac DJ |
4706 | } |
4707 | ||
48229727 JB |
4708 | /* Add stubs for Cortex-A8 erratum fixes now. */ |
4709 | if (htab->fix_cortex_a8) | |
4710 | { | |
4711 | for (i = 0; i < num_a8_fixes; i++) | |
4712 | { | |
4713 | struct elf32_arm_stub_hash_entry *stub_entry; | |
4714 | char *stub_name = a8_fixes[i].stub_name; | |
4715 | asection *section = a8_fixes[i].section; | |
4716 | unsigned int section_id = a8_fixes[i].section->id; | |
4717 | asection *link_sec = htab->stub_group[section_id].link_sec; | |
4718 | asection *stub_sec = htab->stub_group[section_id].stub_sec; | |
d3ce72d0 | 4719 | const insn_sequence *template_sequence; |
48229727 JB |
4720 | int template_size, size = 0; |
4721 | ||
4722 | stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, | |
4723 | TRUE, FALSE); | |
4724 | if (stub_entry == NULL) | |
4725 | { | |
4726 | (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), | |
4727 | section->owner, | |
4728 | stub_name); | |
4729 | return FALSE; | |
4730 | } | |
4731 | ||
4732 | stub_entry->stub_sec = stub_sec; | |
4733 | stub_entry->stub_offset = 0; | |
4734 | stub_entry->id_sec = link_sec; | |
4735 | stub_entry->stub_type = a8_fixes[i].stub_type; | |
4736 | stub_entry->target_section = a8_fixes[i].section; | |
4737 | stub_entry->target_value = a8_fixes[i].offset; | |
4738 | stub_entry->target_addend = a8_fixes[i].addend; | |
4739 | stub_entry->orig_insn = a8_fixes[i].orig_insn; | |
4740 | stub_entry->st_type = STT_ARM_TFUNC; | |
4741 | ||
d3ce72d0 NC |
4742 | size = find_stub_size_and_template (a8_fixes[i].stub_type, |
4743 | &template_sequence, | |
48229727 JB |
4744 | &template_size); |
4745 | ||
4746 | stub_entry->stub_size = size; | |
d3ce72d0 | 4747 | stub_entry->stub_template = template_sequence; |
48229727 JB |
4748 | stub_entry->stub_template_size = template_size; |
4749 | } | |
4750 | ||
4751 | /* Stash the Cortex-A8 erratum fix array for use later in | |
4752 | elf32_arm_write_section(). */ | |
4753 | htab->a8_erratum_fixes = a8_fixes; | |
4754 | htab->num_a8_erratum_fixes = num_a8_fixes; | |
4755 | } | |
4756 | else | |
4757 | { | |
4758 | htab->a8_erratum_fixes = NULL; | |
4759 | htab->num_a8_erratum_fixes = 0; | |
4760 | } | |
906e58ca NC |
4761 | return TRUE; |
4762 | ||
4763 | error_ret_free_local: | |
4764 | return FALSE; | |
5e681ec4 PB |
4765 | } |
4766 | ||
906e58ca NC |
4767 | /* Build all the stubs associated with the current output file. The |
4768 | stubs are kept in a hash table attached to the main linker hash | |
4769 | table. We also set up the .plt entries for statically linked PIC | |
4770 | functions here. This function is called via arm_elf_finish in the | |
4771 | linker. */ | |
252b5132 | 4772 | |
906e58ca NC |
4773 | bfd_boolean |
4774 | elf32_arm_build_stubs (struct bfd_link_info *info) | |
252b5132 | 4775 | { |
906e58ca NC |
4776 | asection *stub_sec; |
4777 | struct bfd_hash_table *table; | |
4778 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 4779 | |
906e58ca | 4780 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
4781 | if (htab == NULL) |
4782 | return FALSE; | |
252b5132 | 4783 | |
906e58ca NC |
4784 | for (stub_sec = htab->stub_bfd->sections; |
4785 | stub_sec != NULL; | |
4786 | stub_sec = stub_sec->next) | |
252b5132 | 4787 | { |
906e58ca NC |
4788 | bfd_size_type size; |
4789 | ||
8029a119 | 4790 | /* Ignore non-stub sections. */ |
906e58ca NC |
4791 | if (!strstr (stub_sec->name, STUB_SUFFIX)) |
4792 | continue; | |
4793 | ||
4794 | /* Allocate memory to hold the linker stubs. */ | |
4795 | size = stub_sec->size; | |
21d799b5 | 4796 | stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); |
906e58ca NC |
4797 | if (stub_sec->contents == NULL && size != 0) |
4798 | return FALSE; | |
4799 | stub_sec->size = 0; | |
252b5132 RH |
4800 | } |
4801 | ||
906e58ca NC |
4802 | /* Build the stubs as directed by the stub hash table. */ |
4803 | table = &htab->stub_hash_table; | |
4804 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
eb7c4339 NS |
4805 | if (htab->fix_cortex_a8) |
4806 | { | |
4807 | /* Place the cortex a8 stubs last. */ | |
4808 | htab->fix_cortex_a8 = -1; | |
4809 | bfd_hash_traverse (table, arm_build_one_stub, info); | |
4810 | } | |
252b5132 | 4811 | |
906e58ca | 4812 | return TRUE; |
252b5132 RH |
4813 | } |
4814 | ||
9b485d32 NC |
4815 | /* Locate the Thumb encoded calling stub for NAME. */ |
4816 | ||
252b5132 | 4817 | static struct elf_link_hash_entry * |
57e8b36a NC |
4818 | find_thumb_glue (struct bfd_link_info *link_info, |
4819 | const char *name, | |
f2a9dd69 | 4820 | char **error_message) |
252b5132 RH |
4821 | { |
4822 | char *tmp_name; | |
4823 | struct elf_link_hash_entry *hash; | |
4824 | struct elf32_arm_link_hash_table *hash_table; | |
4825 | ||
4826 | /* We need a pointer to the armelf specific hash table. */ | |
4827 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
4828 | if (hash_table == NULL) |
4829 | return NULL; | |
252b5132 | 4830 | |
21d799b5 NC |
4831 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
4832 | + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
4833 | |
4834 | BFD_ASSERT (tmp_name); | |
4835 | ||
4836 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
4837 | ||
4838 | hash = elf_link_hash_lookup | |
b34976b6 | 4839 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 4840 | |
b1657152 AM |
4841 | if (hash == NULL |
4842 | && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"), | |
4843 | tmp_name, name) == -1) | |
4844 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
4845 | |
4846 | free (tmp_name); | |
4847 | ||
4848 | return hash; | |
4849 | } | |
4850 | ||
9b485d32 NC |
4851 | /* Locate the ARM encoded calling stub for NAME. */ |
4852 | ||
252b5132 | 4853 | static struct elf_link_hash_entry * |
57e8b36a NC |
4854 | find_arm_glue (struct bfd_link_info *link_info, |
4855 | const char *name, | |
f2a9dd69 | 4856 | char **error_message) |
252b5132 RH |
4857 | { |
4858 | char *tmp_name; | |
4859 | struct elf_link_hash_entry *myh; | |
4860 | struct elf32_arm_link_hash_table *hash_table; | |
4861 | ||
4862 | /* We need a pointer to the elfarm specific hash table. */ | |
4863 | hash_table = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
4864 | if (hash_table == NULL) |
4865 | return NULL; | |
252b5132 | 4866 | |
21d799b5 NC |
4867 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
4868 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
4869 | |
4870 | BFD_ASSERT (tmp_name); | |
4871 | ||
4872 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
4873 | ||
4874 | myh = elf_link_hash_lookup | |
b34976b6 | 4875 | (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 | 4876 | |
b1657152 AM |
4877 | if (myh == NULL |
4878 | && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"), | |
4879 | tmp_name, name) == -1) | |
4880 | *error_message = (char *) bfd_errmsg (bfd_error_system_call); | |
252b5132 RH |
4881 | |
4882 | free (tmp_name); | |
4883 | ||
4884 | return myh; | |
4885 | } | |
4886 | ||
8f6277f5 | 4887 | /* ARM->Thumb glue (static images): |
252b5132 RH |
4888 | |
4889 | .arm | |
4890 | __func_from_arm: | |
4891 | ldr r12, __func_addr | |
4892 | bx r12 | |
4893 | __func_addr: | |
906e58ca | 4894 | .word func @ behave as if you saw a ARM_32 reloc. |
252b5132 | 4895 | |
26079076 PB |
4896 | (v5t static images) |
4897 | .arm | |
4898 | __func_from_arm: | |
4899 | ldr pc, __func_addr | |
4900 | __func_addr: | |
906e58ca | 4901 | .word func @ behave as if you saw a ARM_32 reloc. |
26079076 | 4902 | |
8f6277f5 PB |
4903 | (relocatable images) |
4904 | .arm | |
4905 | __func_from_arm: | |
4906 | ldr r12, __func_offset | |
4907 | add r12, r12, pc | |
4908 | bx r12 | |
4909 | __func_offset: | |
8029a119 | 4910 | .word func - . */ |
8f6277f5 PB |
4911 | |
4912 | #define ARM2THUMB_STATIC_GLUE_SIZE 12 | |
252b5132 RH |
4913 | static const insn32 a2t1_ldr_insn = 0xe59fc000; |
4914 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
4915 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
4916 | ||
26079076 PB |
4917 | #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 |
4918 | static const insn32 a2t1v5_ldr_insn = 0xe51ff004; | |
4919 | static const insn32 a2t2v5_func_addr_insn = 0x00000001; | |
4920 | ||
8f6277f5 PB |
4921 | #define ARM2THUMB_PIC_GLUE_SIZE 16 |
4922 | static const insn32 a2t1p_ldr_insn = 0xe59fc004; | |
4923 | static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; | |
4924 | static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; | |
4925 | ||
9b485d32 | 4926 | /* Thumb->ARM: Thumb->(non-interworking aware) ARM |
252b5132 | 4927 | |
8029a119 NC |
4928 | .thumb .thumb |
4929 | .align 2 .align 2 | |
4930 | __func_from_thumb: __func_from_thumb: | |
4931 | bx pc push {r6, lr} | |
4932 | nop ldr r6, __func_addr | |
4933 | .arm mov lr, pc | |
4934 | b func bx r6 | |
fcef9eb7 NC |
4935 | .arm |
4936 | ;; back_to_thumb | |
4937 | ldmia r13! {r6, lr} | |
4938 | bx lr | |
8029a119 NC |
4939 | __func_addr: |
4940 | .word func */ | |
252b5132 RH |
4941 | |
4942 | #define THUMB2ARM_GLUE_SIZE 8 | |
4943 | static const insn16 t2a1_bx_pc_insn = 0x4778; | |
4944 | static const insn16 t2a2_noop_insn = 0x46c0; | |
4945 | static const insn32 t2a3_b_insn = 0xea000000; | |
4946 | ||
c7b8f16e JB |
4947 | #define VFP11_ERRATUM_VENEER_SIZE 8 |
4948 | ||
845b51d6 PB |
4949 | #define ARM_BX_VENEER_SIZE 12 |
4950 | static const insn32 armbx1_tst_insn = 0xe3100001; | |
4951 | static const insn32 armbx2_moveq_insn = 0x01a0f000; | |
4952 | static const insn32 armbx3_bx_insn = 0xe12fff10; | |
4953 | ||
7e392df6 | 4954 | #ifndef ELFARM_NABI_C_INCLUDED |
8029a119 NC |
4955 | static void |
4956 | arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) | |
252b5132 RH |
4957 | { |
4958 | asection * s; | |
8029a119 | 4959 | bfd_byte * contents; |
252b5132 | 4960 | |
8029a119 | 4961 | if (size == 0) |
3e6b1042 DJ |
4962 | { |
4963 | /* Do not include empty glue sections in the output. */ | |
4964 | if (abfd != NULL) | |
4965 | { | |
4966 | s = bfd_get_section_by_name (abfd, name); | |
4967 | if (s != NULL) | |
4968 | s->flags |= SEC_EXCLUDE; | |
4969 | } | |
4970 | return; | |
4971 | } | |
252b5132 | 4972 | |
8029a119 | 4973 | BFD_ASSERT (abfd != NULL); |
252b5132 | 4974 | |
8029a119 NC |
4975 | s = bfd_get_section_by_name (abfd, name); |
4976 | BFD_ASSERT (s != NULL); | |
252b5132 | 4977 | |
21d799b5 | 4978 | contents = (bfd_byte *) bfd_alloc (abfd, size); |
252b5132 | 4979 | |
8029a119 NC |
4980 | BFD_ASSERT (s->size == size); |
4981 | s->contents = contents; | |
4982 | } | |
906e58ca | 4983 | |
8029a119 NC |
4984 | bfd_boolean |
4985 | bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) | |
4986 | { | |
4987 | struct elf32_arm_link_hash_table * globals; | |
906e58ca | 4988 | |
8029a119 NC |
4989 | globals = elf32_arm_hash_table (info); |
4990 | BFD_ASSERT (globals != NULL); | |
906e58ca | 4991 | |
8029a119 NC |
4992 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
4993 | globals->arm_glue_size, | |
4994 | ARM2THUMB_GLUE_SECTION_NAME); | |
906e58ca | 4995 | |
8029a119 NC |
4996 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
4997 | globals->thumb_glue_size, | |
4998 | THUMB2ARM_GLUE_SECTION_NAME); | |
252b5132 | 4999 | |
8029a119 NC |
5000 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5001 | globals->vfp11_erratum_glue_size, | |
5002 | VFP11_ERRATUM_VENEER_SECTION_NAME); | |
845b51d6 | 5003 | |
8029a119 NC |
5004 | arm_allocate_glue_section_space (globals->bfd_of_glue_owner, |
5005 | globals->bx_glue_size, | |
845b51d6 PB |
5006 | ARM_BX_GLUE_SECTION_NAME); |
5007 | ||
b34976b6 | 5008 | return TRUE; |
252b5132 RH |
5009 | } |
5010 | ||
a4fd1a8e | 5011 | /* Allocate space and symbols for calling a Thumb function from Arm mode. |
906e58ca NC |
5012 | returns the symbol identifying the stub. */ |
5013 | ||
a4fd1a8e | 5014 | static struct elf_link_hash_entry * |
57e8b36a NC |
5015 | record_arm_to_thumb_glue (struct bfd_link_info * link_info, |
5016 | struct elf_link_hash_entry * h) | |
252b5132 RH |
5017 | { |
5018 | const char * name = h->root.root.string; | |
63b0f745 | 5019 | asection * s; |
252b5132 RH |
5020 | char * tmp_name; |
5021 | struct elf_link_hash_entry * myh; | |
14a793b2 | 5022 | struct bfd_link_hash_entry * bh; |
252b5132 | 5023 | struct elf32_arm_link_hash_table * globals; |
dc810e39 | 5024 | bfd_vma val; |
2f475487 | 5025 | bfd_size_type size; |
252b5132 RH |
5026 | |
5027 | globals = elf32_arm_hash_table (link_info); | |
252b5132 RH |
5028 | BFD_ASSERT (globals != NULL); |
5029 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
5030 | ||
5031 | s = bfd_get_section_by_name | |
5032 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
5033 | ||
252b5132 RH |
5034 | BFD_ASSERT (s != NULL); |
5035 | ||
21d799b5 NC |
5036 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) |
5037 | + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); | |
252b5132 RH |
5038 | |
5039 | BFD_ASSERT (tmp_name); | |
5040 | ||
5041 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
5042 | ||
5043 | myh = elf_link_hash_lookup | |
b34976b6 | 5044 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
5045 | |
5046 | if (myh != NULL) | |
5047 | { | |
9b485d32 | 5048 | /* We've already seen this guy. */ |
252b5132 | 5049 | free (tmp_name); |
a4fd1a8e | 5050 | return myh; |
252b5132 RH |
5051 | } |
5052 | ||
57e8b36a NC |
5053 | /* The only trick here is using hash_table->arm_glue_size as the value. |
5054 | Even though the section isn't allocated yet, this is where we will be | |
3dccd7b7 DJ |
5055 | putting it. The +1 on the value marks that the stub has not been |
5056 | output yet - not that it is a Thumb function. */ | |
14a793b2 | 5057 | bh = NULL; |
dc810e39 AM |
5058 | val = globals->arm_glue_size + 1; |
5059 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
5060 | tmp_name, BSF_GLOBAL, s, val, | |
b34976b6 | 5061 | NULL, TRUE, FALSE, &bh); |
252b5132 | 5062 | |
b7693d02 DJ |
5063 | myh = (struct elf_link_hash_entry *) bh; |
5064 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5065 | myh->forced_local = 1; | |
5066 | ||
252b5132 RH |
5067 | free (tmp_name); |
5068 | ||
27e55c4d PB |
5069 | if (link_info->shared || globals->root.is_relocatable_executable |
5070 | || globals->pic_veneer) | |
2f475487 | 5071 | size = ARM2THUMB_PIC_GLUE_SIZE; |
26079076 PB |
5072 | else if (globals->use_blx) |
5073 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
8f6277f5 | 5074 | else |
2f475487 AM |
5075 | size = ARM2THUMB_STATIC_GLUE_SIZE; |
5076 | ||
5077 | s->size += size; | |
5078 | globals->arm_glue_size += size; | |
252b5132 | 5079 | |
a4fd1a8e | 5080 | return myh; |
252b5132 RH |
5081 | } |
5082 | ||
845b51d6 PB |
5083 | /* Allocate space for ARMv4 BX veneers. */ |
5084 | ||
5085 | static void | |
5086 | record_arm_bx_glue (struct bfd_link_info * link_info, int reg) | |
5087 | { | |
5088 | asection * s; | |
5089 | struct elf32_arm_link_hash_table *globals; | |
5090 | char *tmp_name; | |
5091 | struct elf_link_hash_entry *myh; | |
5092 | struct bfd_link_hash_entry *bh; | |
5093 | bfd_vma val; | |
5094 | ||
5095 | /* BX PC does not need a veneer. */ | |
5096 | if (reg == 15) | |
5097 | return; | |
5098 | ||
5099 | globals = elf32_arm_hash_table (link_info); | |
845b51d6 PB |
5100 | BFD_ASSERT (globals != NULL); |
5101 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
5102 | ||
5103 | /* Check if this veneer has already been allocated. */ | |
5104 | if (globals->bx_glue_offset[reg]) | |
5105 | return; | |
5106 | ||
5107 | s = bfd_get_section_by_name | |
5108 | (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); | |
5109 | ||
5110 | BFD_ASSERT (s != NULL); | |
5111 | ||
5112 | /* Add symbol for veneer. */ | |
21d799b5 NC |
5113 | tmp_name = (char *) |
5114 | bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); | |
906e58ca | 5115 | |
845b51d6 | 5116 | BFD_ASSERT (tmp_name); |
906e58ca | 5117 | |
845b51d6 | 5118 | sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); |
906e58ca | 5119 | |
845b51d6 PB |
5120 | myh = elf_link_hash_lookup |
5121 | (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5122 | |
845b51d6 | 5123 | BFD_ASSERT (myh == NULL); |
906e58ca | 5124 | |
845b51d6 PB |
5125 | bh = NULL; |
5126 | val = globals->bx_glue_size; | |
5127 | _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, | |
5128 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
5129 | NULL, TRUE, FALSE, &bh); | |
5130 | ||
5131 | myh = (struct elf_link_hash_entry *) bh; | |
5132 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5133 | myh->forced_local = 1; | |
5134 | ||
5135 | s->size += ARM_BX_VENEER_SIZE; | |
5136 | globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; | |
5137 | globals->bx_glue_size += ARM_BX_VENEER_SIZE; | |
5138 | } | |
5139 | ||
5140 | ||
c7b8f16e JB |
5141 | /* Add an entry to the code/data map for section SEC. */ |
5142 | ||
5143 | static void | |
5144 | elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) | |
5145 | { | |
5146 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
5147 | unsigned int newidx; | |
906e58ca | 5148 | |
c7b8f16e JB |
5149 | if (sec_data->map == NULL) |
5150 | { | |
21d799b5 NC |
5151 | sec_data->map = (elf32_arm_section_map *) |
5152 | bfd_malloc (sizeof (elf32_arm_section_map)); | |
c7b8f16e JB |
5153 | sec_data->mapcount = 0; |
5154 | sec_data->mapsize = 1; | |
5155 | } | |
906e58ca | 5156 | |
c7b8f16e | 5157 | newidx = sec_data->mapcount++; |
906e58ca | 5158 | |
c7b8f16e JB |
5159 | if (sec_data->mapcount > sec_data->mapsize) |
5160 | { | |
5161 | sec_data->mapsize *= 2; | |
21d799b5 NC |
5162 | sec_data->map = (elf32_arm_section_map *) |
5163 | bfd_realloc_or_free (sec_data->map, sec_data->mapsize | |
5164 | * sizeof (elf32_arm_section_map)); | |
515ef31d NC |
5165 | } |
5166 | ||
5167 | if (sec_data->map) | |
5168 | { | |
5169 | sec_data->map[newidx].vma = vma; | |
5170 | sec_data->map[newidx].type = type; | |
c7b8f16e | 5171 | } |
c7b8f16e JB |
5172 | } |
5173 | ||
5174 | ||
5175 | /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode | |
5176 | veneers are handled for now. */ | |
5177 | ||
5178 | static bfd_vma | |
5179 | record_vfp11_erratum_veneer (struct bfd_link_info *link_info, | |
5180 | elf32_vfp11_erratum_list *branch, | |
5181 | bfd *branch_bfd, | |
5182 | asection *branch_sec, | |
5183 | unsigned int offset) | |
5184 | { | |
5185 | asection *s; | |
5186 | struct elf32_arm_link_hash_table *hash_table; | |
5187 | char *tmp_name; | |
5188 | struct elf_link_hash_entry *myh; | |
5189 | struct bfd_link_hash_entry *bh; | |
5190 | bfd_vma val; | |
5191 | struct _arm_elf_section_data *sec_data; | |
5192 | int errcount; | |
5193 | elf32_vfp11_erratum_list *newerr; | |
906e58ca | 5194 | |
c7b8f16e | 5195 | hash_table = elf32_arm_hash_table (link_info); |
c7b8f16e JB |
5196 | BFD_ASSERT (hash_table != NULL); |
5197 | BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); | |
906e58ca | 5198 | |
c7b8f16e JB |
5199 | s = bfd_get_section_by_name |
5200 | (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); | |
906e58ca | 5201 | |
c7b8f16e | 5202 | sec_data = elf32_arm_section_data (s); |
906e58ca | 5203 | |
c7b8f16e | 5204 | BFD_ASSERT (s != NULL); |
906e58ca | 5205 | |
21d799b5 NC |
5206 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
5207 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
906e58ca | 5208 | |
c7b8f16e | 5209 | BFD_ASSERT (tmp_name); |
906e58ca | 5210 | |
c7b8f16e JB |
5211 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, |
5212 | hash_table->num_vfp11_fixes); | |
906e58ca | 5213 | |
c7b8f16e JB |
5214 | myh = elf_link_hash_lookup |
5215 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5216 | |
c7b8f16e | 5217 | BFD_ASSERT (myh == NULL); |
906e58ca | 5218 | |
c7b8f16e JB |
5219 | bh = NULL; |
5220 | val = hash_table->vfp11_erratum_glue_size; | |
5221 | _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, | |
5222 | tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, | |
5223 | NULL, TRUE, FALSE, &bh); | |
5224 | ||
5225 | myh = (struct elf_link_hash_entry *) bh; | |
5226 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5227 | myh->forced_local = 1; | |
5228 | ||
5229 | /* Link veneer back to calling location. */ | |
5230 | errcount = ++(sec_data->erratumcount); | |
21d799b5 NC |
5231 | newerr = (elf32_vfp11_erratum_list *) |
5232 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
906e58ca | 5233 | |
c7b8f16e JB |
5234 | newerr->type = VFP11_ERRATUM_ARM_VENEER; |
5235 | newerr->vma = -1; | |
5236 | newerr->u.v.branch = branch; | |
5237 | newerr->u.v.id = hash_table->num_vfp11_fixes; | |
5238 | branch->u.b.veneer = newerr; | |
5239 | ||
5240 | newerr->next = sec_data->erratumlist; | |
5241 | sec_data->erratumlist = newerr; | |
5242 | ||
5243 | /* A symbol for the return from the veneer. */ | |
5244 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
5245 | hash_table->num_vfp11_fixes); | |
5246 | ||
5247 | myh = elf_link_hash_lookup | |
5248 | (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); | |
906e58ca | 5249 | |
c7b8f16e JB |
5250 | if (myh != NULL) |
5251 | abort (); | |
5252 | ||
5253 | bh = NULL; | |
5254 | val = offset + 4; | |
5255 | _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, | |
5256 | branch_sec, val, NULL, TRUE, FALSE, &bh); | |
906e58ca | 5257 | |
c7b8f16e JB |
5258 | myh = (struct elf_link_hash_entry *) bh; |
5259 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
5260 | myh->forced_local = 1; | |
5261 | ||
5262 | free (tmp_name); | |
906e58ca | 5263 | |
c7b8f16e JB |
5264 | /* Generate a mapping symbol for the veneer section, and explicitly add an |
5265 | entry for that symbol to the code/data map for the section. */ | |
5266 | if (hash_table->vfp11_erratum_glue_size == 0) | |
5267 | { | |
5268 | bh = NULL; | |
5269 | /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it | |
5270 | ever requires this erratum fix. */ | |
5271 | _bfd_generic_link_add_one_symbol (link_info, | |
5272 | hash_table->bfd_of_glue_owner, "$a", | |
5273 | BSF_LOCAL, s, 0, NULL, | |
5274 | TRUE, FALSE, &bh); | |
5275 | ||
5276 | myh = (struct elf_link_hash_entry *) bh; | |
5277 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
5278 | myh->forced_local = 1; | |
906e58ca | 5279 | |
c7b8f16e JB |
5280 | /* The elf32_arm_init_maps function only cares about symbols from input |
5281 | BFDs. We must make a note of this generated mapping symbol | |
5282 | ourselves so that code byteswapping works properly in | |
5283 | elf32_arm_write_section. */ | |
5284 | elf32_arm_section_map_add (s, 'a', 0); | |
5285 | } | |
906e58ca | 5286 | |
c7b8f16e JB |
5287 | s->size += VFP11_ERRATUM_VENEER_SIZE; |
5288 | hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; | |
5289 | hash_table->num_vfp11_fixes++; | |
906e58ca | 5290 | |
c7b8f16e JB |
5291 | /* The offset of the veneer. */ |
5292 | return val; | |
5293 | } | |
5294 | ||
8029a119 | 5295 | #define ARM_GLUE_SECTION_FLAGS \ |
3e6b1042 DJ |
5296 | (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ |
5297 | | SEC_READONLY | SEC_LINKER_CREATED) | |
8029a119 NC |
5298 | |
5299 | /* Create a fake section for use by the ARM backend of the linker. */ | |
5300 | ||
5301 | static bfd_boolean | |
5302 | arm_make_glue_section (bfd * abfd, const char * name) | |
5303 | { | |
5304 | asection * sec; | |
5305 | ||
5306 | sec = bfd_get_section_by_name (abfd, name); | |
5307 | if (sec != NULL) | |
5308 | /* Already made. */ | |
5309 | return TRUE; | |
5310 | ||
5311 | sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); | |
5312 | ||
5313 | if (sec == NULL | |
5314 | || !bfd_set_section_alignment (abfd, sec, 2)) | |
5315 | return FALSE; | |
5316 | ||
5317 | /* Set the gc mark to prevent the section from being removed by garbage | |
5318 | collection, despite the fact that no relocs refer to this section. */ | |
5319 | sec->gc_mark = 1; | |
5320 | ||
5321 | return TRUE; | |
5322 | } | |
5323 | ||
8afb0e02 NC |
5324 | /* Add the glue sections to ABFD. This function is called from the |
5325 | linker scripts in ld/emultempl/{armelf}.em. */ | |
9b485d32 | 5326 | |
b34976b6 | 5327 | bfd_boolean |
57e8b36a NC |
5328 | bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, |
5329 | struct bfd_link_info *info) | |
252b5132 | 5330 | { |
8afb0e02 NC |
5331 | /* If we are only performing a partial |
5332 | link do not bother adding the glue. */ | |
1049f94e | 5333 | if (info->relocatable) |
b34976b6 | 5334 | return TRUE; |
252b5132 | 5335 | |
8029a119 NC |
5336 | return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) |
5337 | && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) | |
5338 | && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) | |
5339 | && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); | |
8afb0e02 NC |
5340 | } |
5341 | ||
5342 | /* Select a BFD to be used to hold the sections used by the glue code. | |
5343 | This function is called from the linker scripts in ld/emultempl/ | |
8029a119 | 5344 | {armelf/pe}.em. */ |
8afb0e02 | 5345 | |
b34976b6 | 5346 | bfd_boolean |
57e8b36a | 5347 | bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) |
8afb0e02 NC |
5348 | { |
5349 | struct elf32_arm_link_hash_table *globals; | |
5350 | ||
5351 | /* If we are only performing a partial link | |
5352 | do not bother getting a bfd to hold the glue. */ | |
1049f94e | 5353 | if (info->relocatable) |
b34976b6 | 5354 | return TRUE; |
8afb0e02 | 5355 | |
b7693d02 DJ |
5356 | /* Make sure we don't attach the glue sections to a dynamic object. */ |
5357 | BFD_ASSERT (!(abfd->flags & DYNAMIC)); | |
5358 | ||
8afb0e02 | 5359 | globals = elf32_arm_hash_table (info); |
8afb0e02 NC |
5360 | BFD_ASSERT (globals != NULL); |
5361 | ||
5362 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 5363 | return TRUE; |
8afb0e02 | 5364 | |
252b5132 RH |
5365 | /* Save the bfd for later use. */ |
5366 | globals->bfd_of_glue_owner = abfd; | |
cedb70c5 | 5367 | |
b34976b6 | 5368 | return TRUE; |
252b5132 RH |
5369 | } |
5370 | ||
906e58ca NC |
5371 | static void |
5372 | check_use_blx (struct elf32_arm_link_hash_table *globals) | |
39b41c9c | 5373 | { |
104d59d1 JM |
5374 | if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, |
5375 | Tag_CPU_arch) > 2) | |
39b41c9c PB |
5376 | globals->use_blx = 1; |
5377 | } | |
5378 | ||
b34976b6 | 5379 | bfd_boolean |
57e8b36a | 5380 | bfd_elf32_arm_process_before_allocation (bfd *abfd, |
d504ffc8 | 5381 | struct bfd_link_info *link_info) |
252b5132 RH |
5382 | { |
5383 | Elf_Internal_Shdr *symtab_hdr; | |
6cdc0ccc | 5384 | Elf_Internal_Rela *internal_relocs = NULL; |
252b5132 RH |
5385 | Elf_Internal_Rela *irel, *irelend; |
5386 | bfd_byte *contents = NULL; | |
252b5132 RH |
5387 | |
5388 | asection *sec; | |
5389 | struct elf32_arm_link_hash_table *globals; | |
5390 | ||
5391 | /* If we are only performing a partial link do not bother | |
5392 | to construct any glue. */ | |
1049f94e | 5393 | if (link_info->relocatable) |
b34976b6 | 5394 | return TRUE; |
252b5132 | 5395 | |
39ce1a6a NC |
5396 | /* Here we have a bfd that is to be included on the link. We have a |
5397 | hook to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 | 5398 | globals = elf32_arm_hash_table (link_info); |
252b5132 | 5399 | BFD_ASSERT (globals != NULL); |
39ce1a6a NC |
5400 | |
5401 | check_use_blx (globals); | |
252b5132 | 5402 | |
d504ffc8 | 5403 | if (globals->byteswap_code && !bfd_big_endian (abfd)) |
e489d0ae | 5404 | { |
d003868e AM |
5405 | _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."), |
5406 | abfd); | |
e489d0ae PB |
5407 | return FALSE; |
5408 | } | |
f21f3fe0 | 5409 | |
39ce1a6a NC |
5410 | /* PR 5398: If we have not decided to include any loadable sections in |
5411 | the output then we will not have a glue owner bfd. This is OK, it | |
5412 | just means that there is nothing else for us to do here. */ | |
5413 | if (globals->bfd_of_glue_owner == NULL) | |
5414 | return TRUE; | |
5415 | ||
252b5132 RH |
5416 | /* Rummage around all the relocs and map the glue vectors. */ |
5417 | sec = abfd->sections; | |
5418 | ||
5419 | if (sec == NULL) | |
b34976b6 | 5420 | return TRUE; |
252b5132 RH |
5421 | |
5422 | for (; sec != NULL; sec = sec->next) | |
5423 | { | |
5424 | if (sec->reloc_count == 0) | |
5425 | continue; | |
5426 | ||
2f475487 AM |
5427 | if ((sec->flags & SEC_EXCLUDE) != 0) |
5428 | continue; | |
5429 | ||
0ffa91dd | 5430 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 5431 | |
9b485d32 | 5432 | /* Load the relocs. */ |
6cdc0ccc | 5433 | internal_relocs |
906e58ca | 5434 | = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); |
252b5132 | 5435 | |
6cdc0ccc AM |
5436 | if (internal_relocs == NULL) |
5437 | goto error_return; | |
252b5132 | 5438 | |
6cdc0ccc AM |
5439 | irelend = internal_relocs + sec->reloc_count; |
5440 | for (irel = internal_relocs; irel < irelend; irel++) | |
252b5132 RH |
5441 | { |
5442 | long r_type; | |
5443 | unsigned long r_index; | |
252b5132 RH |
5444 | |
5445 | struct elf_link_hash_entry *h; | |
5446 | ||
5447 | r_type = ELF32_R_TYPE (irel->r_info); | |
5448 | r_index = ELF32_R_SYM (irel->r_info); | |
5449 | ||
9b485d32 | 5450 | /* These are the only relocation types we care about. */ |
ba96a88f | 5451 | if ( r_type != R_ARM_PC24 |
845b51d6 | 5452 | && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) |
252b5132 RH |
5453 | continue; |
5454 | ||
5455 | /* Get the section contents if we haven't done so already. */ | |
5456 | if (contents == NULL) | |
5457 | { | |
5458 | /* Get cached copy if it exists. */ | |
5459 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
5460 | contents = elf_section_data (sec)->this_hdr.contents; | |
5461 | else | |
5462 | { | |
5463 | /* Go get them off disk. */ | |
57e8b36a | 5464 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
5465 | goto error_return; |
5466 | } | |
5467 | } | |
5468 | ||
845b51d6 PB |
5469 | if (r_type == R_ARM_V4BX) |
5470 | { | |
5471 | int reg; | |
5472 | ||
5473 | reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; | |
5474 | record_arm_bx_glue (link_info, reg); | |
5475 | continue; | |
5476 | } | |
5477 | ||
a7c10850 | 5478 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
5479 | h = NULL; |
5480 | ||
9b485d32 | 5481 | /* We don't care about local symbols. */ |
252b5132 RH |
5482 | if (r_index < symtab_hdr->sh_info) |
5483 | continue; | |
5484 | ||
9b485d32 | 5485 | /* This is an external symbol. */ |
252b5132 RH |
5486 | r_index -= symtab_hdr->sh_info; |
5487 | h = (struct elf_link_hash_entry *) | |
5488 | elf_sym_hashes (abfd)[r_index]; | |
5489 | ||
5490 | /* If the relocation is against a static symbol it must be within | |
5491 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
5492 | if (h == NULL) | |
5493 | continue; | |
5494 | ||
d504ffc8 DJ |
5495 | /* If the call will go through a PLT entry then we do not need |
5496 | glue. */ | |
5497 | if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1) | |
b7693d02 DJ |
5498 | continue; |
5499 | ||
252b5132 RH |
5500 | switch (r_type) |
5501 | { | |
5502 | case R_ARM_PC24: | |
5503 | /* This one is a call from arm code. We need to look up | |
2f0ca46a | 5504 | the target of the call. If it is a thumb target, we |
252b5132 | 5505 | insert glue. */ |
ebe24dd4 | 5506 | if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC) |
252b5132 RH |
5507 | record_arm_to_thumb_glue (link_info, h); |
5508 | break; | |
5509 | ||
252b5132 | 5510 | default: |
c6596c5e | 5511 | abort (); |
252b5132 RH |
5512 | } |
5513 | } | |
6cdc0ccc AM |
5514 | |
5515 | if (contents != NULL | |
5516 | && elf_section_data (sec)->this_hdr.contents != contents) | |
5517 | free (contents); | |
5518 | contents = NULL; | |
5519 | ||
5520 | if (internal_relocs != NULL | |
5521 | && elf_section_data (sec)->relocs != internal_relocs) | |
5522 | free (internal_relocs); | |
5523 | internal_relocs = NULL; | |
252b5132 RH |
5524 | } |
5525 | ||
b34976b6 | 5526 | return TRUE; |
9a5aca8c | 5527 | |
252b5132 | 5528 | error_return: |
6cdc0ccc AM |
5529 | if (contents != NULL |
5530 | && elf_section_data (sec)->this_hdr.contents != contents) | |
5531 | free (contents); | |
5532 | if (internal_relocs != NULL | |
5533 | && elf_section_data (sec)->relocs != internal_relocs) | |
5534 | free (internal_relocs); | |
9a5aca8c | 5535 | |
b34976b6 | 5536 | return FALSE; |
252b5132 | 5537 | } |
7e392df6 | 5538 | #endif |
252b5132 | 5539 | |
eb043451 | 5540 | |
c7b8f16e JB |
5541 | /* Initialise maps of ARM/Thumb/data for input BFDs. */ |
5542 | ||
5543 | void | |
5544 | bfd_elf32_arm_init_maps (bfd *abfd) | |
5545 | { | |
5546 | Elf_Internal_Sym *isymbuf; | |
5547 | Elf_Internal_Shdr *hdr; | |
5548 | unsigned int i, localsyms; | |
5549 | ||
af1f4419 NC |
5550 | /* PR 7093: Make sure that we are dealing with an arm elf binary. */ |
5551 | if (! is_arm_elf (abfd)) | |
5552 | return; | |
5553 | ||
c7b8f16e JB |
5554 | if ((abfd->flags & DYNAMIC) != 0) |
5555 | return; | |
5556 | ||
0ffa91dd | 5557 | hdr = & elf_symtab_hdr (abfd); |
c7b8f16e JB |
5558 | localsyms = hdr->sh_info; |
5559 | ||
5560 | /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field | |
5561 | should contain the number of local symbols, which should come before any | |
5562 | global symbols. Mapping symbols are always local. */ | |
5563 | isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, | |
5564 | NULL); | |
5565 | ||
5566 | /* No internal symbols read? Skip this BFD. */ | |
5567 | if (isymbuf == NULL) | |
5568 | return; | |
5569 | ||
5570 | for (i = 0; i < localsyms; i++) | |
5571 | { | |
5572 | Elf_Internal_Sym *isym = &isymbuf[i]; | |
5573 | asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
5574 | const char *name; | |
906e58ca | 5575 | |
c7b8f16e JB |
5576 | if (sec != NULL |
5577 | && ELF_ST_BIND (isym->st_info) == STB_LOCAL) | |
5578 | { | |
5579 | name = bfd_elf_string_from_elf_section (abfd, | |
5580 | hdr->sh_link, isym->st_name); | |
906e58ca | 5581 | |
c7b8f16e JB |
5582 | if (bfd_is_arm_special_symbol_name (name, |
5583 | BFD_ARM_SPECIAL_SYM_TYPE_MAP)) | |
5584 | elf32_arm_section_map_add (sec, name[1], isym->st_value); | |
5585 | } | |
5586 | } | |
5587 | } | |
5588 | ||
5589 | ||
48229727 JB |
5590 | /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly |
5591 | say what they wanted. */ | |
5592 | ||
5593 | void | |
5594 | bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) | |
5595 | { | |
5596 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
5597 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); | |
5598 | ||
4dfe6ac6 NC |
5599 | if (globals == NULL) |
5600 | return; | |
5601 | ||
48229727 JB |
5602 | if (globals->fix_cortex_a8 == -1) |
5603 | { | |
5604 | /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ | |
5605 | if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 | |
5606 | && (out_attr[Tag_CPU_arch_profile].i == 'A' | |
5607 | || out_attr[Tag_CPU_arch_profile].i == 0)) | |
5608 | globals->fix_cortex_a8 = 1; | |
5609 | else | |
5610 | globals->fix_cortex_a8 = 0; | |
5611 | } | |
5612 | } | |
5613 | ||
5614 | ||
c7b8f16e JB |
5615 | void |
5616 | bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) | |
5617 | { | |
5618 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
104d59d1 | 5619 | obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); |
906e58ca | 5620 | |
4dfe6ac6 NC |
5621 | if (globals == NULL) |
5622 | return; | |
c7b8f16e JB |
5623 | /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ |
5624 | if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) | |
5625 | { | |
5626 | switch (globals->vfp11_fix) | |
5627 | { | |
5628 | case BFD_ARM_VFP11_FIX_DEFAULT: | |
5629 | case BFD_ARM_VFP11_FIX_NONE: | |
5630 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
5631 | break; | |
906e58ca | 5632 | |
c7b8f16e JB |
5633 | default: |
5634 | /* Give a warning, but do as the user requests anyway. */ | |
5635 | (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum " | |
5636 | "workaround is not necessary for target architecture"), obfd); | |
5637 | } | |
5638 | } | |
5639 | else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) | |
5640 | /* For earlier architectures, we might need the workaround, but do not | |
5641 | enable it by default. If users is running with broken hardware, they | |
5642 | must enable the erratum fix explicitly. */ | |
5643 | globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; | |
5644 | } | |
5645 | ||
5646 | ||
906e58ca NC |
5647 | enum bfd_arm_vfp11_pipe |
5648 | { | |
c7b8f16e JB |
5649 | VFP11_FMAC, |
5650 | VFP11_LS, | |
5651 | VFP11_DS, | |
5652 | VFP11_BAD | |
5653 | }; | |
5654 | ||
5655 | /* Return a VFP register number. This is encoded as RX:X for single-precision | |
5656 | registers, or X:RX for double-precision registers, where RX is the group of | |
5657 | four bits in the instruction encoding and X is the single extension bit. | |
5658 | RX and X fields are specified using their lowest (starting) bit. The return | |
5659 | value is: | |
5660 | ||
5661 | 0...31: single-precision registers s0...s31 | |
5662 | 32...63: double-precision registers d0...d31. | |
906e58ca | 5663 | |
c7b8f16e JB |
5664 | Although X should be zero for VFP11 (encoding d0...d15 only), we might |
5665 | encounter VFP3 instructions, so we allow the full range for DP registers. */ | |
906e58ca | 5666 | |
c7b8f16e JB |
5667 | static unsigned int |
5668 | bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, | |
5669 | unsigned int x) | |
5670 | { | |
5671 | if (is_double) | |
5672 | return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; | |
5673 | else | |
5674 | return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); | |
5675 | } | |
5676 | ||
5677 | /* Set bits in *WMASK according to a register number REG as encoded by | |
5678 | bfd_arm_vfp11_regno(). Ignore d16-d31. */ | |
5679 | ||
5680 | static void | |
5681 | bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) | |
5682 | { | |
5683 | if (reg < 32) | |
5684 | *wmask |= 1 << reg; | |
5685 | else if (reg < 48) | |
5686 | *wmask |= 3 << ((reg - 32) * 2); | |
5687 | } | |
5688 | ||
5689 | /* Return TRUE if WMASK overwrites anything in REGS. */ | |
5690 | ||
5691 | static bfd_boolean | |
5692 | bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) | |
5693 | { | |
5694 | int i; | |
906e58ca | 5695 | |
c7b8f16e JB |
5696 | for (i = 0; i < numregs; i++) |
5697 | { | |
5698 | unsigned int reg = regs[i]; | |
5699 | ||
5700 | if (reg < 32 && (wmask & (1 << reg)) != 0) | |
5701 | return TRUE; | |
906e58ca | 5702 | |
c7b8f16e JB |
5703 | reg -= 32; |
5704 | ||
5705 | if (reg >= 16) | |
5706 | continue; | |
906e58ca | 5707 | |
c7b8f16e JB |
5708 | if ((wmask & (3 << (reg * 2))) != 0) |
5709 | return TRUE; | |
5710 | } | |
906e58ca | 5711 | |
c7b8f16e JB |
5712 | return FALSE; |
5713 | } | |
5714 | ||
5715 | /* In this function, we're interested in two things: finding input registers | |
5716 | for VFP data-processing instructions, and finding the set of registers which | |
5717 | arbitrary VFP instructions may write to. We use a 32-bit unsigned int to | |
5718 | hold the written set, so FLDM etc. are easy to deal with (we're only | |
5719 | interested in 32 SP registers or 16 dp registers, due to the VFP version | |
5720 | implemented by the chip in question). DP registers are marked by setting | |
5721 | both SP registers in the write mask). */ | |
5722 | ||
5723 | static enum bfd_arm_vfp11_pipe | |
5724 | bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, | |
5725 | int *numregs) | |
5726 | { | |
91d6fa6a | 5727 | enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; |
c7b8f16e JB |
5728 | bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; |
5729 | ||
5730 | if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ | |
5731 | { | |
5732 | unsigned int pqrs; | |
5733 | unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
5734 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
5735 | ||
5736 | pqrs = ((insn & 0x00800000) >> 20) | |
5737 | | ((insn & 0x00300000) >> 19) | |
5738 | | ((insn & 0x00000040) >> 6); | |
5739 | ||
5740 | switch (pqrs) | |
5741 | { | |
5742 | case 0: /* fmac[sd]. */ | |
5743 | case 1: /* fnmac[sd]. */ | |
5744 | case 2: /* fmsc[sd]. */ | |
5745 | case 3: /* fnmsc[sd]. */ | |
91d6fa6a | 5746 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
5747 | bfd_arm_vfp11_write_mask (destmask, fd); |
5748 | regs[0] = fd; | |
5749 | regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
5750 | regs[2] = fm; | |
5751 | *numregs = 3; | |
5752 | break; | |
5753 | ||
5754 | case 4: /* fmul[sd]. */ | |
5755 | case 5: /* fnmul[sd]. */ | |
5756 | case 6: /* fadd[sd]. */ | |
5757 | case 7: /* fsub[sd]. */ | |
91d6fa6a | 5758 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
5759 | goto vfp_binop; |
5760 | ||
5761 | case 8: /* fdiv[sd]. */ | |
91d6fa6a | 5762 | vpipe = VFP11_DS; |
c7b8f16e JB |
5763 | vfp_binop: |
5764 | bfd_arm_vfp11_write_mask (destmask, fd); | |
5765 | regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ | |
5766 | regs[1] = fm; | |
5767 | *numregs = 2; | |
5768 | break; | |
5769 | ||
5770 | case 15: /* extended opcode. */ | |
5771 | { | |
5772 | unsigned int extn = ((insn >> 15) & 0x1e) | |
5773 | | ((insn >> 7) & 1); | |
5774 | ||
5775 | switch (extn) | |
5776 | { | |
5777 | case 0: /* fcpy[sd]. */ | |
5778 | case 1: /* fabs[sd]. */ | |
5779 | case 2: /* fneg[sd]. */ | |
5780 | case 8: /* fcmp[sd]. */ | |
5781 | case 9: /* fcmpe[sd]. */ | |
5782 | case 10: /* fcmpz[sd]. */ | |
5783 | case 11: /* fcmpez[sd]. */ | |
5784 | case 16: /* fuito[sd]. */ | |
5785 | case 17: /* fsito[sd]. */ | |
5786 | case 24: /* ftoui[sd]. */ | |
5787 | case 25: /* ftouiz[sd]. */ | |
5788 | case 26: /* ftosi[sd]. */ | |
5789 | case 27: /* ftosiz[sd]. */ | |
5790 | /* These instructions will not bounce due to underflow. */ | |
5791 | *numregs = 0; | |
91d6fa6a | 5792 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
5793 | break; |
5794 | ||
5795 | case 3: /* fsqrt[sd]. */ | |
5796 | /* fsqrt cannot underflow, but it can (perhaps) overwrite | |
5797 | registers to cause the erratum in previous instructions. */ | |
5798 | bfd_arm_vfp11_write_mask (destmask, fd); | |
91d6fa6a | 5799 | vpipe = VFP11_DS; |
c7b8f16e JB |
5800 | break; |
5801 | ||
5802 | case 15: /* fcvt{ds,sd}. */ | |
5803 | { | |
5804 | int rnum = 0; | |
5805 | ||
5806 | bfd_arm_vfp11_write_mask (destmask, fd); | |
5807 | ||
5808 | /* Only FCVTSD can underflow. */ | |
5809 | if ((insn & 0x100) != 0) | |
5810 | regs[rnum++] = fm; | |
5811 | ||
5812 | *numregs = rnum; | |
5813 | ||
91d6fa6a | 5814 | vpipe = VFP11_FMAC; |
c7b8f16e JB |
5815 | } |
5816 | break; | |
5817 | ||
5818 | default: | |
5819 | return VFP11_BAD; | |
5820 | } | |
5821 | } | |
5822 | break; | |
5823 | ||
5824 | default: | |
5825 | return VFP11_BAD; | |
5826 | } | |
5827 | } | |
5828 | /* Two-register transfer. */ | |
5829 | else if ((insn & 0x0fe00ed0) == 0x0c400a10) | |
5830 | { | |
5831 | unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); | |
906e58ca | 5832 | |
c7b8f16e JB |
5833 | if ((insn & 0x100000) == 0) |
5834 | { | |
5835 | if (is_double) | |
5836 | bfd_arm_vfp11_write_mask (destmask, fm); | |
5837 | else | |
5838 | { | |
5839 | bfd_arm_vfp11_write_mask (destmask, fm); | |
5840 | bfd_arm_vfp11_write_mask (destmask, fm + 1); | |
5841 | } | |
5842 | } | |
5843 | ||
91d6fa6a | 5844 | vpipe = VFP11_LS; |
c7b8f16e JB |
5845 | } |
5846 | else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ | |
5847 | { | |
5848 | int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); | |
5849 | unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); | |
906e58ca | 5850 | |
c7b8f16e JB |
5851 | switch (puw) |
5852 | { | |
5853 | case 0: /* Two-reg transfer. We should catch these above. */ | |
5854 | abort (); | |
906e58ca | 5855 | |
c7b8f16e JB |
5856 | case 2: /* fldm[sdx]. */ |
5857 | case 3: | |
5858 | case 5: | |
5859 | { | |
5860 | unsigned int i, offset = insn & 0xff; | |
5861 | ||
5862 | if (is_double) | |
5863 | offset >>= 1; | |
5864 | ||
5865 | for (i = fd; i < fd + offset; i++) | |
5866 | bfd_arm_vfp11_write_mask (destmask, i); | |
5867 | } | |
5868 | break; | |
906e58ca | 5869 | |
c7b8f16e JB |
5870 | case 4: /* fld[sd]. */ |
5871 | case 6: | |
5872 | bfd_arm_vfp11_write_mask (destmask, fd); | |
5873 | break; | |
906e58ca | 5874 | |
c7b8f16e JB |
5875 | default: |
5876 | return VFP11_BAD; | |
5877 | } | |
5878 | ||
91d6fa6a | 5879 | vpipe = VFP11_LS; |
c7b8f16e JB |
5880 | } |
5881 | /* Single-register transfer. Note L==0. */ | |
5882 | else if ((insn & 0x0f100e10) == 0x0e000a10) | |
5883 | { | |
5884 | unsigned int opcode = (insn >> 21) & 7; | |
5885 | unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); | |
5886 | ||
5887 | switch (opcode) | |
5888 | { | |
5889 | case 0: /* fmsr/fmdlr. */ | |
5890 | case 1: /* fmdhr. */ | |
5891 | /* Mark fmdhr and fmdlr as writing to the whole of the DP | |
5892 | destination register. I don't know if this is exactly right, | |
5893 | but it is the conservative choice. */ | |
5894 | bfd_arm_vfp11_write_mask (destmask, fn); | |
5895 | break; | |
5896 | ||
5897 | case 7: /* fmxr. */ | |
5898 | break; | |
5899 | } | |
5900 | ||
91d6fa6a | 5901 | vpipe = VFP11_LS; |
c7b8f16e JB |
5902 | } |
5903 | ||
91d6fa6a | 5904 | return vpipe; |
c7b8f16e JB |
5905 | } |
5906 | ||
5907 | ||
5908 | static int elf32_arm_compare_mapping (const void * a, const void * b); | |
5909 | ||
5910 | ||
5911 | /* Look for potentially-troublesome code sequences which might trigger the | |
5912 | VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet | |
5913 | (available from ARM) for details of the erratum. A short version is | |
5914 | described in ld.texinfo. */ | |
5915 | ||
5916 | bfd_boolean | |
5917 | bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) | |
5918 | { | |
5919 | asection *sec; | |
5920 | bfd_byte *contents = NULL; | |
5921 | int state = 0; | |
5922 | int regs[3], numregs = 0; | |
5923 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); | |
5924 | int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); | |
906e58ca | 5925 | |
4dfe6ac6 NC |
5926 | if (globals == NULL) |
5927 | return FALSE; | |
5928 | ||
c7b8f16e JB |
5929 | /* We use a simple FSM to match troublesome VFP11 instruction sequences. |
5930 | The states transition as follows: | |
906e58ca | 5931 | |
c7b8f16e JB |
5932 | 0 -> 1 (vector) or 0 -> 2 (scalar) |
5933 | A VFP FMAC-pipeline instruction has been seen. Fill | |
5934 | regs[0]..regs[numregs-1] with its input operands. Remember this | |
5935 | instruction in 'first_fmac'. | |
5936 | ||
5937 | 1 -> 2 | |
5938 | Any instruction, except for a VFP instruction which overwrites | |
5939 | regs[*]. | |
906e58ca | 5940 | |
c7b8f16e JB |
5941 | 1 -> 3 [ -> 0 ] or |
5942 | 2 -> 3 [ -> 0 ] | |
5943 | A VFP instruction has been seen which overwrites any of regs[*]. | |
5944 | We must make a veneer! Reset state to 0 before examining next | |
5945 | instruction. | |
906e58ca | 5946 | |
c7b8f16e JB |
5947 | 2 -> 0 |
5948 | If we fail to match anything in state 2, reset to state 0 and reset | |
5949 | the instruction pointer to the instruction after 'first_fmac'. | |
5950 | ||
5951 | If the VFP11 vector mode is in use, there must be at least two unrelated | |
5952 | instructions between anti-dependent VFP11 instructions to properly avoid | |
906e58ca | 5953 | triggering the erratum, hence the use of the extra state 1. */ |
c7b8f16e JB |
5954 | |
5955 | /* If we are only performing a partial link do not bother | |
5956 | to construct any glue. */ | |
5957 | if (link_info->relocatable) | |
5958 | return TRUE; | |
5959 | ||
0ffa91dd NC |
5960 | /* Skip if this bfd does not correspond to an ELF image. */ |
5961 | if (! is_arm_elf (abfd)) | |
5962 | return TRUE; | |
906e58ca | 5963 | |
c7b8f16e JB |
5964 | /* We should have chosen a fix type by the time we get here. */ |
5965 | BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); | |
5966 | ||
5967 | if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) | |
5968 | return TRUE; | |
2e6030b9 | 5969 | |
33a7ffc2 JM |
5970 | /* Skip this BFD if it corresponds to an executable or dynamic object. */ |
5971 | if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) | |
5972 | return TRUE; | |
5973 | ||
c7b8f16e JB |
5974 | for (sec = abfd->sections; sec != NULL; sec = sec->next) |
5975 | { | |
5976 | unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; | |
5977 | struct _arm_elf_section_data *sec_data; | |
5978 | ||
5979 | /* If we don't have executable progbits, we're not interested in this | |
5980 | section. Also skip if section is to be excluded. */ | |
5981 | if (elf_section_type (sec) != SHT_PROGBITS | |
5982 | || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 | |
5983 | || (sec->flags & SEC_EXCLUDE) != 0 | |
33a7ffc2 JM |
5984 | || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS |
5985 | || sec->output_section == bfd_abs_section_ptr | |
c7b8f16e JB |
5986 | || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) |
5987 | continue; | |
5988 | ||
5989 | sec_data = elf32_arm_section_data (sec); | |
906e58ca | 5990 | |
c7b8f16e JB |
5991 | if (sec_data->mapcount == 0) |
5992 | continue; | |
906e58ca | 5993 | |
c7b8f16e JB |
5994 | if (elf_section_data (sec)->this_hdr.contents != NULL) |
5995 | contents = elf_section_data (sec)->this_hdr.contents; | |
5996 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
5997 | goto error_return; | |
5998 | ||
5999 | qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), | |
6000 | elf32_arm_compare_mapping); | |
6001 | ||
6002 | for (span = 0; span < sec_data->mapcount; span++) | |
6003 | { | |
6004 | unsigned int span_start = sec_data->map[span].vma; | |
6005 | unsigned int span_end = (span == sec_data->mapcount - 1) | |
6006 | ? sec->size : sec_data->map[span + 1].vma; | |
6007 | char span_type = sec_data->map[span].type; | |
906e58ca | 6008 | |
c7b8f16e JB |
6009 | /* FIXME: Only ARM mode is supported at present. We may need to |
6010 | support Thumb-2 mode also at some point. */ | |
6011 | if (span_type != 'a') | |
6012 | continue; | |
6013 | ||
6014 | for (i = span_start; i < span_end;) | |
6015 | { | |
6016 | unsigned int next_i = i + 4; | |
6017 | unsigned int insn = bfd_big_endian (abfd) | |
6018 | ? (contents[i] << 24) | |
6019 | | (contents[i + 1] << 16) | |
6020 | | (contents[i + 2] << 8) | |
6021 | | contents[i + 3] | |
6022 | : (contents[i + 3] << 24) | |
6023 | | (contents[i + 2] << 16) | |
6024 | | (contents[i + 1] << 8) | |
6025 | | contents[i]; | |
6026 | unsigned int writemask = 0; | |
91d6fa6a | 6027 | enum bfd_arm_vfp11_pipe vpipe; |
c7b8f16e JB |
6028 | |
6029 | switch (state) | |
6030 | { | |
6031 | case 0: | |
91d6fa6a | 6032 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, |
c7b8f16e JB |
6033 | &numregs); |
6034 | /* I'm assuming the VFP11 erratum can trigger with denorm | |
6035 | operands on either the FMAC or the DS pipeline. This might | |
6036 | lead to slightly overenthusiastic veneer insertion. */ | |
91d6fa6a | 6037 | if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) |
c7b8f16e JB |
6038 | { |
6039 | state = use_vector ? 1 : 2; | |
6040 | first_fmac = i; | |
6041 | veneer_of_insn = insn; | |
6042 | } | |
6043 | break; | |
6044 | ||
6045 | case 1: | |
6046 | { | |
6047 | int other_regs[3], other_numregs; | |
91d6fa6a | 6048 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
c7b8f16e JB |
6049 | other_regs, |
6050 | &other_numregs); | |
91d6fa6a | 6051 | if (vpipe != VFP11_BAD |
c7b8f16e JB |
6052 | && bfd_arm_vfp11_antidependency (writemask, regs, |
6053 | numregs)) | |
6054 | state = 3; | |
6055 | else | |
6056 | state = 2; | |
6057 | } | |
6058 | break; | |
6059 | ||
6060 | case 2: | |
6061 | { | |
6062 | int other_regs[3], other_numregs; | |
91d6fa6a | 6063 | vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, |
c7b8f16e JB |
6064 | other_regs, |
6065 | &other_numregs); | |
91d6fa6a | 6066 | if (vpipe != VFP11_BAD |
c7b8f16e JB |
6067 | && bfd_arm_vfp11_antidependency (writemask, regs, |
6068 | numregs)) | |
6069 | state = 3; | |
6070 | else | |
6071 | { | |
6072 | state = 0; | |
6073 | next_i = first_fmac + 4; | |
6074 | } | |
6075 | } | |
6076 | break; | |
6077 | ||
6078 | case 3: | |
6079 | abort (); /* Should be unreachable. */ | |
6080 | } | |
6081 | ||
6082 | if (state == 3) | |
6083 | { | |
21d799b5 NC |
6084 | elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) |
6085 | bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); | |
c7b8f16e JB |
6086 | int errcount; |
6087 | ||
6088 | errcount = ++(elf32_arm_section_data (sec)->erratumcount); | |
6089 | ||
6090 | newerr->u.b.vfp_insn = veneer_of_insn; | |
6091 | ||
6092 | switch (span_type) | |
6093 | { | |
6094 | case 'a': | |
6095 | newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; | |
6096 | break; | |
906e58ca | 6097 | |
c7b8f16e JB |
6098 | default: |
6099 | abort (); | |
6100 | } | |
6101 | ||
6102 | record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, | |
6103 | first_fmac); | |
6104 | ||
6105 | newerr->vma = -1; | |
6106 | ||
6107 | newerr->next = sec_data->erratumlist; | |
6108 | sec_data->erratumlist = newerr; | |
6109 | ||
6110 | state = 0; | |
6111 | } | |
6112 | ||
6113 | i = next_i; | |
6114 | } | |
6115 | } | |
906e58ca | 6116 | |
c7b8f16e JB |
6117 | if (contents != NULL |
6118 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6119 | free (contents); | |
6120 | contents = NULL; | |
6121 | } | |
6122 | ||
6123 | return TRUE; | |
6124 | ||
6125 | error_return: | |
6126 | if (contents != NULL | |
6127 | && elf_section_data (sec)->this_hdr.contents != contents) | |
6128 | free (contents); | |
906e58ca | 6129 | |
c7b8f16e JB |
6130 | return FALSE; |
6131 | } | |
6132 | ||
6133 | /* Find virtual-memory addresses for VFP11 erratum veneers and return locations | |
6134 | after sections have been laid out, using specially-named symbols. */ | |
6135 | ||
6136 | void | |
6137 | bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, | |
6138 | struct bfd_link_info *link_info) | |
6139 | { | |
6140 | asection *sec; | |
6141 | struct elf32_arm_link_hash_table *globals; | |
6142 | char *tmp_name; | |
906e58ca | 6143 | |
c7b8f16e JB |
6144 | if (link_info->relocatable) |
6145 | return; | |
2e6030b9 MS |
6146 | |
6147 | /* Skip if this bfd does not correspond to an ELF image. */ | |
0ffa91dd | 6148 | if (! is_arm_elf (abfd)) |
2e6030b9 MS |
6149 | return; |
6150 | ||
c7b8f16e | 6151 | globals = elf32_arm_hash_table (link_info); |
4dfe6ac6 NC |
6152 | if (globals == NULL) |
6153 | return; | |
906e58ca | 6154 | |
21d799b5 NC |
6155 | tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen |
6156 | (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); | |
c7b8f16e JB |
6157 | |
6158 | for (sec = abfd->sections; sec != NULL; sec = sec->next) | |
6159 | { | |
6160 | struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); | |
6161 | elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; | |
906e58ca | 6162 | |
c7b8f16e JB |
6163 | for (; errnode != NULL; errnode = errnode->next) |
6164 | { | |
6165 | struct elf_link_hash_entry *myh; | |
6166 | bfd_vma vma; | |
6167 | ||
6168 | switch (errnode->type) | |
6169 | { | |
6170 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
6171 | case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: | |
6172 | /* Find veneer symbol. */ | |
6173 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, | |
6174 | errnode->u.b.veneer->u.v.id); | |
6175 | ||
6176 | myh = elf_link_hash_lookup | |
6177 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
6178 | ||
6179 | if (myh == NULL) | |
6180 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
6181 | "`%s'"), abfd, tmp_name); | |
6182 | ||
6183 | vma = myh->root.u.def.section->output_section->vma | |
6184 | + myh->root.u.def.section->output_offset | |
6185 | + myh->root.u.def.value; | |
6186 | ||
6187 | errnode->u.b.veneer->vma = vma; | |
6188 | break; | |
6189 | ||
6190 | case VFP11_ERRATUM_ARM_VENEER: | |
6191 | case VFP11_ERRATUM_THUMB_VENEER: | |
6192 | /* Find return location. */ | |
6193 | sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", | |
6194 | errnode->u.v.id); | |
6195 | ||
6196 | myh = elf_link_hash_lookup | |
6197 | (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); | |
6198 | ||
6199 | if (myh == NULL) | |
6200 | (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " | |
6201 | "`%s'"), abfd, tmp_name); | |
6202 | ||
6203 | vma = myh->root.u.def.section->output_section->vma | |
6204 | + myh->root.u.def.section->output_offset | |
6205 | + myh->root.u.def.value; | |
6206 | ||
6207 | errnode->u.v.branch->vma = vma; | |
6208 | break; | |
906e58ca | 6209 | |
c7b8f16e JB |
6210 | default: |
6211 | abort (); | |
6212 | } | |
6213 | } | |
6214 | } | |
906e58ca | 6215 | |
c7b8f16e JB |
6216 | free (tmp_name); |
6217 | } | |
6218 | ||
6219 | ||
eb043451 PB |
6220 | /* Set target relocation values needed during linking. */ |
6221 | ||
6222 | void | |
bf21ed78 MS |
6223 | bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, |
6224 | struct bfd_link_info *link_info, | |
eb043451 | 6225 | int target1_is_rel, |
319850b4 | 6226 | char * target2_type, |
33bfe774 | 6227 | int fix_v4bx, |
c7b8f16e | 6228 | int use_blx, |
bf21ed78 | 6229 | bfd_arm_vfp11_fix vfp11_fix, |
a9dc9481 | 6230 | int no_enum_warn, int no_wchar_warn, |
48229727 | 6231 | int pic_veneer, int fix_cortex_a8) |
eb043451 PB |
6232 | { |
6233 | struct elf32_arm_link_hash_table *globals; | |
6234 | ||
6235 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
6236 | if (globals == NULL) |
6237 | return; | |
eb043451 PB |
6238 | |
6239 | globals->target1_is_rel = target1_is_rel; | |
6240 | if (strcmp (target2_type, "rel") == 0) | |
6241 | globals->target2_reloc = R_ARM_REL32; | |
eeac373a PB |
6242 | else if (strcmp (target2_type, "abs") == 0) |
6243 | globals->target2_reloc = R_ARM_ABS32; | |
eb043451 PB |
6244 | else if (strcmp (target2_type, "got-rel") == 0) |
6245 | globals->target2_reloc = R_ARM_GOT_PREL; | |
6246 | else | |
6247 | { | |
6248 | _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."), | |
6249 | target2_type); | |
6250 | } | |
319850b4 | 6251 | globals->fix_v4bx = fix_v4bx; |
33bfe774 | 6252 | globals->use_blx |= use_blx; |
c7b8f16e | 6253 | globals->vfp11_fix = vfp11_fix; |
27e55c4d | 6254 | globals->pic_veneer = pic_veneer; |
48229727 | 6255 | globals->fix_cortex_a8 = fix_cortex_a8; |
bf21ed78 | 6256 | |
0ffa91dd NC |
6257 | BFD_ASSERT (is_arm_elf (output_bfd)); |
6258 | elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; | |
a9dc9481 | 6259 | elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn; |
eb043451 | 6260 | } |
eb043451 | 6261 | |
12a0a0fd | 6262 | /* Replace the target offset of a Thumb bl or b.w instruction. */ |
252b5132 | 6263 | |
12a0a0fd PB |
6264 | static void |
6265 | insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) | |
6266 | { | |
6267 | bfd_vma upper; | |
6268 | bfd_vma lower; | |
6269 | int reloc_sign; | |
6270 | ||
6271 | BFD_ASSERT ((offset & 1) == 0); | |
6272 | ||
6273 | upper = bfd_get_16 (abfd, insn); | |
6274 | lower = bfd_get_16 (abfd, insn + 2); | |
6275 | reloc_sign = (offset < 0) ? 1 : 0; | |
6276 | upper = (upper & ~(bfd_vma) 0x7ff) | |
6277 | | ((offset >> 12) & 0x3ff) | |
6278 | | (reloc_sign << 10); | |
906e58ca | 6279 | lower = (lower & ~(bfd_vma) 0x2fff) |
12a0a0fd PB |
6280 | | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) |
6281 | | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) | |
6282 | | ((offset >> 1) & 0x7ff); | |
6283 | bfd_put_16 (abfd, upper, insn); | |
6284 | bfd_put_16 (abfd, lower, insn + 2); | |
252b5132 RH |
6285 | } |
6286 | ||
9b485d32 NC |
6287 | /* Thumb code calling an ARM function. */ |
6288 | ||
252b5132 | 6289 | static int |
57e8b36a NC |
6290 | elf32_thumb_to_arm_stub (struct bfd_link_info * info, |
6291 | const char * name, | |
6292 | bfd * input_bfd, | |
6293 | bfd * output_bfd, | |
6294 | asection * input_section, | |
6295 | bfd_byte * hit_data, | |
6296 | asection * sym_sec, | |
6297 | bfd_vma offset, | |
6298 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
6299 | bfd_vma val, |
6300 | char **error_message) | |
252b5132 | 6301 | { |
bcbdc74c | 6302 | asection * s = 0; |
dc810e39 | 6303 | bfd_vma my_offset; |
252b5132 | 6304 | long int ret_offset; |
bcbdc74c NC |
6305 | struct elf_link_hash_entry * myh; |
6306 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 6307 | |
f2a9dd69 | 6308 | myh = find_thumb_glue (info, name, error_message); |
252b5132 | 6309 | if (myh == NULL) |
b34976b6 | 6310 | return FALSE; |
252b5132 RH |
6311 | |
6312 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
6313 | BFD_ASSERT (globals != NULL); |
6314 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6315 | ||
6316 | my_offset = myh->root.u.def.value; | |
6317 | ||
6318 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
6319 | THUMB2ARM_GLUE_SECTION_NAME); | |
6320 | ||
6321 | BFD_ASSERT (s != NULL); | |
6322 | BFD_ASSERT (s->contents != NULL); | |
6323 | BFD_ASSERT (s->output_section != NULL); | |
6324 | ||
6325 | if ((my_offset & 0x01) == 0x01) | |
6326 | { | |
6327 | if (sym_sec != NULL | |
6328 | && sym_sec->owner != NULL | |
6329 | && !INTERWORK_FLAG (sym_sec->owner)) | |
6330 | { | |
8f615d07 | 6331 | (*_bfd_error_handler) |
d003868e AM |
6332 | (_("%B(%s): warning: interworking not enabled.\n" |
6333 | " first occurrence: %B: thumb call to arm"), | |
6334 | sym_sec->owner, input_bfd, name); | |
252b5132 | 6335 | |
b34976b6 | 6336 | return FALSE; |
252b5132 RH |
6337 | } |
6338 | ||
6339 | --my_offset; | |
6340 | myh->root.u.def.value = my_offset; | |
6341 | ||
52ab56c2 PB |
6342 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
6343 | s->contents + my_offset); | |
252b5132 | 6344 | |
52ab56c2 PB |
6345 | put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, |
6346 | s->contents + my_offset + 2); | |
252b5132 RH |
6347 | |
6348 | ret_offset = | |
9b485d32 NC |
6349 | /* Address of destination of the stub. */ |
6350 | ((bfd_signed_vma) val) | |
252b5132 | 6351 | - ((bfd_signed_vma) |
57e8b36a NC |
6352 | /* Offset from the start of the current section |
6353 | to the start of the stubs. */ | |
9b485d32 NC |
6354 | (s->output_offset |
6355 | /* Offset of the start of this stub from the start of the stubs. */ | |
6356 | + my_offset | |
6357 | /* Address of the start of the current section. */ | |
6358 | + s->output_section->vma) | |
6359 | /* The branch instruction is 4 bytes into the stub. */ | |
6360 | + 4 | |
6361 | /* ARM branches work from the pc of the instruction + 8. */ | |
6362 | + 8); | |
252b5132 | 6363 | |
52ab56c2 PB |
6364 | put_arm_insn (globals, output_bfd, |
6365 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), | |
6366 | s->contents + my_offset + 4); | |
252b5132 RH |
6367 | } |
6368 | ||
6369 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
6370 | ||
427bfd90 NC |
6371 | /* Now go back and fix up the original BL insn to point to here. */ |
6372 | ret_offset = | |
6373 | /* Address of where the stub is located. */ | |
6374 | (s->output_section->vma + s->output_offset + my_offset) | |
6375 | /* Address of where the BL is located. */ | |
57e8b36a NC |
6376 | - (input_section->output_section->vma + input_section->output_offset |
6377 | + offset) | |
427bfd90 NC |
6378 | /* Addend in the relocation. */ |
6379 | - addend | |
6380 | /* Biassing for PC-relative addressing. */ | |
6381 | - 8; | |
252b5132 | 6382 | |
12a0a0fd | 6383 | insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); |
252b5132 | 6384 | |
b34976b6 | 6385 | return TRUE; |
252b5132 RH |
6386 | } |
6387 | ||
a4fd1a8e | 6388 | /* Populate an Arm to Thumb stub. Returns the stub symbol. */ |
9b485d32 | 6389 | |
a4fd1a8e PB |
6390 | static struct elf_link_hash_entry * |
6391 | elf32_arm_create_thumb_stub (struct bfd_link_info * info, | |
6392 | const char * name, | |
6393 | bfd * input_bfd, | |
6394 | bfd * output_bfd, | |
6395 | asection * sym_sec, | |
6396 | bfd_vma val, | |
8029a119 NC |
6397 | asection * s, |
6398 | char ** error_message) | |
252b5132 | 6399 | { |
dc810e39 | 6400 | bfd_vma my_offset; |
252b5132 | 6401 | long int ret_offset; |
bcbdc74c NC |
6402 | struct elf_link_hash_entry * myh; |
6403 | struct elf32_arm_link_hash_table * globals; | |
252b5132 | 6404 | |
f2a9dd69 | 6405 | myh = find_arm_glue (info, name, error_message); |
252b5132 | 6406 | if (myh == NULL) |
a4fd1a8e | 6407 | return NULL; |
252b5132 RH |
6408 | |
6409 | globals = elf32_arm_hash_table (info); | |
252b5132 RH |
6410 | BFD_ASSERT (globals != NULL); |
6411 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6412 | ||
6413 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
6414 | |
6415 | if ((my_offset & 0x01) == 0x01) | |
6416 | { | |
6417 | if (sym_sec != NULL | |
6418 | && sym_sec->owner != NULL | |
6419 | && !INTERWORK_FLAG (sym_sec->owner)) | |
6420 | { | |
8f615d07 | 6421 | (*_bfd_error_handler) |
d003868e AM |
6422 | (_("%B(%s): warning: interworking not enabled.\n" |
6423 | " first occurrence: %B: arm call to thumb"), | |
6424 | sym_sec->owner, input_bfd, name); | |
252b5132 | 6425 | } |
9b485d32 | 6426 | |
252b5132 RH |
6427 | --my_offset; |
6428 | myh->root.u.def.value = my_offset; | |
6429 | ||
27e55c4d PB |
6430 | if (info->shared || globals->root.is_relocatable_executable |
6431 | || globals->pic_veneer) | |
8f6277f5 PB |
6432 | { |
6433 | /* For relocatable objects we can't use absolute addresses, | |
6434 | so construct the address from a relative offset. */ | |
6435 | /* TODO: If the offset is small it's probably worth | |
6436 | constructing the address with adds. */ | |
52ab56c2 PB |
6437 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, |
6438 | s->contents + my_offset); | |
6439 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, | |
6440 | s->contents + my_offset + 4); | |
6441 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, | |
6442 | s->contents + my_offset + 8); | |
8f6277f5 PB |
6443 | /* Adjust the offset by 4 for the position of the add, |
6444 | and 8 for the pipeline offset. */ | |
6445 | ret_offset = (val - (s->output_offset | |
6446 | + s->output_section->vma | |
6447 | + my_offset + 12)) | |
6448 | | 1; | |
6449 | bfd_put_32 (output_bfd, ret_offset, | |
6450 | s->contents + my_offset + 12); | |
6451 | } | |
26079076 PB |
6452 | else if (globals->use_blx) |
6453 | { | |
6454 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, | |
6455 | s->contents + my_offset); | |
6456 | ||
6457 | /* It's a thumb address. Add the low order bit. */ | |
6458 | bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, | |
6459 | s->contents + my_offset + 4); | |
6460 | } | |
8f6277f5 PB |
6461 | else |
6462 | { | |
52ab56c2 PB |
6463 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, |
6464 | s->contents + my_offset); | |
252b5132 | 6465 | |
52ab56c2 PB |
6466 | put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
6467 | s->contents + my_offset + 4); | |
252b5132 | 6468 | |
8f6277f5 PB |
6469 | /* It's a thumb address. Add the low order bit. */ |
6470 | bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, | |
6471 | s->contents + my_offset + 8); | |
8029a119 NC |
6472 | |
6473 | my_offset += 12; | |
8f6277f5 | 6474 | } |
252b5132 RH |
6475 | } |
6476 | ||
6477 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
6478 | ||
a4fd1a8e PB |
6479 | return myh; |
6480 | } | |
6481 | ||
6482 | /* Arm code calling a Thumb function. */ | |
6483 | ||
6484 | static int | |
6485 | elf32_arm_to_thumb_stub (struct bfd_link_info * info, | |
6486 | const char * name, | |
6487 | bfd * input_bfd, | |
6488 | bfd * output_bfd, | |
6489 | asection * input_section, | |
6490 | bfd_byte * hit_data, | |
6491 | asection * sym_sec, | |
6492 | bfd_vma offset, | |
6493 | bfd_signed_vma addend, | |
f2a9dd69 DJ |
6494 | bfd_vma val, |
6495 | char **error_message) | |
a4fd1a8e PB |
6496 | { |
6497 | unsigned long int tmp; | |
6498 | bfd_vma my_offset; | |
6499 | asection * s; | |
6500 | long int ret_offset; | |
6501 | struct elf_link_hash_entry * myh; | |
6502 | struct elf32_arm_link_hash_table * globals; | |
6503 | ||
6504 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
6505 | BFD_ASSERT (globals != NULL); |
6506 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6507 | ||
6508 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
6509 | ARM2THUMB_GLUE_SECTION_NAME); | |
6510 | BFD_ASSERT (s != NULL); | |
6511 | BFD_ASSERT (s->contents != NULL); | |
6512 | BFD_ASSERT (s->output_section != NULL); | |
6513 | ||
6514 | myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, | |
f2a9dd69 | 6515 | sym_sec, val, s, error_message); |
a4fd1a8e PB |
6516 | if (!myh) |
6517 | return FALSE; | |
6518 | ||
6519 | my_offset = myh->root.u.def.value; | |
252b5132 RH |
6520 | tmp = bfd_get_32 (input_bfd, hit_data); |
6521 | tmp = tmp & 0xFF000000; | |
6522 | ||
9b485d32 | 6523 | /* Somehow these are both 4 too far, so subtract 8. */ |
dc810e39 AM |
6524 | ret_offset = (s->output_offset |
6525 | + my_offset | |
6526 | + s->output_section->vma | |
6527 | - (input_section->output_offset | |
6528 | + input_section->output_section->vma | |
6529 | + offset + addend) | |
6530 | - 8); | |
9a5aca8c | 6531 | |
252b5132 RH |
6532 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); |
6533 | ||
dc810e39 | 6534 | bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); |
252b5132 | 6535 | |
b34976b6 | 6536 | return TRUE; |
252b5132 RH |
6537 | } |
6538 | ||
a4fd1a8e PB |
6539 | /* Populate Arm stub for an exported Thumb function. */ |
6540 | ||
6541 | static bfd_boolean | |
6542 | elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) | |
6543 | { | |
6544 | struct bfd_link_info * info = (struct bfd_link_info *) inf; | |
6545 | asection * s; | |
6546 | struct elf_link_hash_entry * myh; | |
6547 | struct elf32_arm_link_hash_entry *eh; | |
6548 | struct elf32_arm_link_hash_table * globals; | |
6549 | asection *sec; | |
6550 | bfd_vma val; | |
f2a9dd69 | 6551 | char *error_message; |
a4fd1a8e | 6552 | |
906e58ca | 6553 | eh = elf32_arm_hash_entry (h); |
a4fd1a8e PB |
6554 | /* Allocate stubs for exported Thumb functions on v4t. */ |
6555 | if (eh->export_glue == NULL) | |
6556 | return TRUE; | |
6557 | ||
6558 | globals = elf32_arm_hash_table (info); | |
a4fd1a8e PB |
6559 | BFD_ASSERT (globals != NULL); |
6560 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6561 | ||
6562 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
6563 | ARM2THUMB_GLUE_SECTION_NAME); | |
6564 | BFD_ASSERT (s != NULL); | |
6565 | BFD_ASSERT (s->contents != NULL); | |
6566 | BFD_ASSERT (s->output_section != NULL); | |
6567 | ||
6568 | sec = eh->export_glue->root.u.def.section; | |
0eaedd0e PB |
6569 | |
6570 | BFD_ASSERT (sec->output_section != NULL); | |
6571 | ||
a4fd1a8e PB |
6572 | val = eh->export_glue->root.u.def.value + sec->output_offset |
6573 | + sec->output_section->vma; | |
8029a119 | 6574 | |
a4fd1a8e PB |
6575 | myh = elf32_arm_create_thumb_stub (info, h->root.root.string, |
6576 | h->root.u.def.section->owner, | |
f2a9dd69 DJ |
6577 | globals->obfd, sec, val, s, |
6578 | &error_message); | |
a4fd1a8e PB |
6579 | BFD_ASSERT (myh); |
6580 | return TRUE; | |
6581 | } | |
6582 | ||
845b51d6 PB |
6583 | /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ |
6584 | ||
6585 | static bfd_vma | |
6586 | elf32_arm_bx_glue (struct bfd_link_info * info, int reg) | |
6587 | { | |
6588 | bfd_byte *p; | |
6589 | bfd_vma glue_addr; | |
6590 | asection *s; | |
6591 | struct elf32_arm_link_hash_table *globals; | |
6592 | ||
6593 | globals = elf32_arm_hash_table (info); | |
845b51d6 PB |
6594 | BFD_ASSERT (globals != NULL); |
6595 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
6596 | ||
6597 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
6598 | ARM_BX_GLUE_SECTION_NAME); | |
6599 | BFD_ASSERT (s != NULL); | |
6600 | BFD_ASSERT (s->contents != NULL); | |
6601 | BFD_ASSERT (s->output_section != NULL); | |
6602 | ||
6603 | BFD_ASSERT (globals->bx_glue_offset[reg] & 2); | |
6604 | ||
6605 | glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; | |
6606 | ||
6607 | if ((globals->bx_glue_offset[reg] & 1) == 0) | |
6608 | { | |
6609 | p = s->contents + glue_addr; | |
6610 | bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); | |
6611 | bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); | |
6612 | bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); | |
6613 | globals->bx_glue_offset[reg] |= 1; | |
6614 | } | |
6615 | ||
6616 | return glue_addr + s->output_section->vma + s->output_offset; | |
6617 | } | |
6618 | ||
a4fd1a8e PB |
6619 | /* Generate Arm stubs for exported Thumb symbols. */ |
6620 | static void | |
906e58ca | 6621 | elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, |
a4fd1a8e PB |
6622 | struct bfd_link_info *link_info) |
6623 | { | |
6624 | struct elf32_arm_link_hash_table * globals; | |
6625 | ||
8029a119 NC |
6626 | if (link_info == NULL) |
6627 | /* Ignore this if we are not called by the ELF backend linker. */ | |
a4fd1a8e PB |
6628 | return; |
6629 | ||
6630 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 NC |
6631 | if (globals == NULL) |
6632 | return; | |
6633 | ||
84c08195 PB |
6634 | /* If blx is available then exported Thumb symbols are OK and there is |
6635 | nothing to do. */ | |
a4fd1a8e PB |
6636 | if (globals->use_blx) |
6637 | return; | |
6638 | ||
6639 | elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, | |
6640 | link_info); | |
6641 | } | |
6642 | ||
eb043451 PB |
6643 | /* Some relocations map to different relocations depending on the |
6644 | target. Return the real relocation. */ | |
8029a119 | 6645 | |
eb043451 PB |
6646 | static int |
6647 | arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, | |
6648 | int r_type) | |
6649 | { | |
6650 | switch (r_type) | |
6651 | { | |
6652 | case R_ARM_TARGET1: | |
6653 | if (globals->target1_is_rel) | |
6654 | return R_ARM_REL32; | |
6655 | else | |
6656 | return R_ARM_ABS32; | |
6657 | ||
6658 | case R_ARM_TARGET2: | |
6659 | return globals->target2_reloc; | |
6660 | ||
6661 | default: | |
6662 | return r_type; | |
6663 | } | |
6664 | } | |
eb043451 | 6665 | |
ba93b8ac DJ |
6666 | /* Return the base VMA address which should be subtracted from real addresses |
6667 | when resolving @dtpoff relocation. | |
6668 | This is PT_TLS segment p_vaddr. */ | |
6669 | ||
6670 | static bfd_vma | |
6671 | dtpoff_base (struct bfd_link_info *info) | |
6672 | { | |
6673 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
6674 | if (elf_hash_table (info)->tls_sec == NULL) | |
6675 | return 0; | |
6676 | return elf_hash_table (info)->tls_sec->vma; | |
6677 | } | |
6678 | ||
6679 | /* Return the relocation value for @tpoff relocation | |
6680 | if STT_TLS virtual address is ADDRESS. */ | |
6681 | ||
6682 | static bfd_vma | |
6683 | tpoff (struct bfd_link_info *info, bfd_vma address) | |
6684 | { | |
6685 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
6686 | bfd_vma base; | |
6687 | ||
6688 | /* If tls_sec is NULL, we should have signalled an error already. */ | |
6689 | if (htab->tls_sec == NULL) | |
6690 | return 0; | |
6691 | base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); | |
6692 | return address - htab->tls_sec->vma + base; | |
6693 | } | |
6694 | ||
00a97672 RS |
6695 | /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. |
6696 | VALUE is the relocation value. */ | |
6697 | ||
6698 | static bfd_reloc_status_type | |
6699 | elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) | |
6700 | { | |
6701 | if (value > 0xfff) | |
6702 | return bfd_reloc_overflow; | |
6703 | ||
6704 | value |= bfd_get_32 (abfd, data) & 0xfffff000; | |
6705 | bfd_put_32 (abfd, value, data); | |
6706 | return bfd_reloc_ok; | |
6707 | } | |
6708 | ||
4962c51a MS |
6709 | /* For a given value of n, calculate the value of G_n as required to |
6710 | deal with group relocations. We return it in the form of an | |
6711 | encoded constant-and-rotation, together with the final residual. If n is | |
6712 | specified as less than zero, then final_residual is filled with the | |
6713 | input value and no further action is performed. */ | |
6714 | ||
6715 | static bfd_vma | |
6716 | calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) | |
6717 | { | |
6718 | int current_n; | |
6719 | bfd_vma g_n; | |
6720 | bfd_vma encoded_g_n = 0; | |
6721 | bfd_vma residual = value; /* Also known as Y_n. */ | |
6722 | ||
6723 | for (current_n = 0; current_n <= n; current_n++) | |
6724 | { | |
6725 | int shift; | |
6726 | ||
6727 | /* Calculate which part of the value to mask. */ | |
6728 | if (residual == 0) | |
6729 | shift = 0; | |
6730 | else | |
6731 | { | |
6732 | int msb; | |
6733 | ||
6734 | /* Determine the most significant bit in the residual and | |
6735 | align the resulting value to a 2-bit boundary. */ | |
6736 | for (msb = 30; msb >= 0; msb -= 2) | |
6737 | if (residual & (3 << msb)) | |
6738 | break; | |
6739 | ||
6740 | /* The desired shift is now (msb - 6), or zero, whichever | |
6741 | is the greater. */ | |
6742 | shift = msb - 6; | |
6743 | if (shift < 0) | |
6744 | shift = 0; | |
6745 | } | |
6746 | ||
6747 | /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ | |
6748 | g_n = residual & (0xff << shift); | |
6749 | encoded_g_n = (g_n >> shift) | |
6750 | | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); | |
6751 | ||
6752 | /* Calculate the residual for the next time around. */ | |
6753 | residual &= ~g_n; | |
6754 | } | |
6755 | ||
6756 | *final_residual = residual; | |
6757 | ||
6758 | return encoded_g_n; | |
6759 | } | |
6760 | ||
6761 | /* Given an ARM instruction, determine whether it is an ADD or a SUB. | |
6762 | Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ | |
906e58ca | 6763 | |
4962c51a | 6764 | static int |
906e58ca | 6765 | identify_add_or_sub (bfd_vma insn) |
4962c51a MS |
6766 | { |
6767 | int opcode = insn & 0x1e00000; | |
6768 | ||
6769 | if (opcode == 1 << 23) /* ADD */ | |
6770 | return 1; | |
6771 | ||
6772 | if (opcode == 1 << 22) /* SUB */ | |
6773 | return -1; | |
6774 | ||
6775 | return 0; | |
6776 | } | |
6777 | ||
252b5132 | 6778 | /* Perform a relocation as part of a final link. */ |
9b485d32 | 6779 | |
252b5132 | 6780 | static bfd_reloc_status_type |
57e8b36a NC |
6781 | elf32_arm_final_link_relocate (reloc_howto_type * howto, |
6782 | bfd * input_bfd, | |
6783 | bfd * output_bfd, | |
6784 | asection * input_section, | |
6785 | bfd_byte * contents, | |
6786 | Elf_Internal_Rela * rel, | |
6787 | bfd_vma value, | |
6788 | struct bfd_link_info * info, | |
6789 | asection * sym_sec, | |
6790 | const char * sym_name, | |
6791 | int sym_flags, | |
0945cdfd | 6792 | struct elf_link_hash_entry * h, |
f2a9dd69 | 6793 | bfd_boolean * unresolved_reloc_p, |
8029a119 | 6794 | char ** error_message) |
252b5132 RH |
6795 | { |
6796 | unsigned long r_type = howto->type; | |
6797 | unsigned long r_symndx; | |
6798 | bfd_byte * hit_data = contents + rel->r_offset; | |
6799 | bfd * dynobj = NULL; | |
6800 | Elf_Internal_Shdr * symtab_hdr; | |
6801 | struct elf_link_hash_entry ** sym_hashes; | |
6802 | bfd_vma * local_got_offsets; | |
6803 | asection * sgot = NULL; | |
6804 | asection * splt = NULL; | |
6805 | asection * sreloc = NULL; | |
252b5132 | 6806 | bfd_vma addend; |
ba96a88f NC |
6807 | bfd_signed_vma signed_addend; |
6808 | struct elf32_arm_link_hash_table * globals; | |
f21f3fe0 | 6809 | |
9c504268 | 6810 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
6811 | if (globals == NULL) |
6812 | return bfd_reloc_notsupported; | |
9c504268 | 6813 | |
0ffa91dd NC |
6814 | BFD_ASSERT (is_arm_elf (input_bfd)); |
6815 | ||
6816 | /* Some relocation types map to different relocations depending on the | |
9c504268 | 6817 | target. We pick the right one here. */ |
eb043451 PB |
6818 | r_type = arm_real_reloc_type (globals, r_type); |
6819 | if (r_type != howto->type) | |
6820 | howto = elf32_arm_howto_from_type (r_type); | |
9c504268 | 6821 | |
cac15327 NC |
6822 | /* If the start address has been set, then set the EF_ARM_HASENTRY |
6823 | flag. Setting this more than once is redundant, but the cost is | |
6824 | not too high, and it keeps the code simple. | |
99e4ae17 | 6825 | |
cac15327 NC |
6826 | The test is done here, rather than somewhere else, because the |
6827 | start address is only set just before the final link commences. | |
6828 | ||
6829 | Note - if the user deliberately sets a start address of 0, the | |
6830 | flag will not be set. */ | |
6831 | if (bfd_get_start_address (output_bfd) != 0) | |
6832 | elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY; | |
99e4ae17 | 6833 | |
252b5132 RH |
6834 | dynobj = elf_hash_table (info)->dynobj; |
6835 | if (dynobj) | |
6836 | { | |
6837 | sgot = bfd_get_section_by_name (dynobj, ".got"); | |
6838 | splt = bfd_get_section_by_name (dynobj, ".plt"); | |
6839 | } | |
0ffa91dd | 6840 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
6841 | sym_hashes = elf_sym_hashes (input_bfd); |
6842 | local_got_offsets = elf_local_got_offsets (input_bfd); | |
6843 | r_symndx = ELF32_R_SYM (rel->r_info); | |
6844 | ||
4e7fd91e | 6845 | if (globals->use_rel) |
ba96a88f | 6846 | { |
4e7fd91e PB |
6847 | addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; |
6848 | ||
6849 | if (addend & ((howto->src_mask + 1) >> 1)) | |
6850 | { | |
6851 | signed_addend = -1; | |
6852 | signed_addend &= ~ howto->src_mask; | |
6853 | signed_addend |= addend; | |
6854 | } | |
6855 | else | |
6856 | signed_addend = addend; | |
ba96a88f NC |
6857 | } |
6858 | else | |
4e7fd91e | 6859 | addend = signed_addend = rel->r_addend; |
f21f3fe0 | 6860 | |
252b5132 RH |
6861 | switch (r_type) |
6862 | { | |
6863 | case R_ARM_NONE: | |
28a094c2 DJ |
6864 | /* We don't need to find a value for this symbol. It's just a |
6865 | marker. */ | |
6866 | *unresolved_reloc_p = FALSE; | |
252b5132 RH |
6867 | return bfd_reloc_ok; |
6868 | ||
00a97672 RS |
6869 | case R_ARM_ABS12: |
6870 | if (!globals->vxworks_p) | |
6871 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
6872 | ||
252b5132 RH |
6873 | case R_ARM_PC24: |
6874 | case R_ARM_ABS32: | |
bb224fc3 | 6875 | case R_ARM_ABS32_NOI: |
252b5132 | 6876 | case R_ARM_REL32: |
bb224fc3 | 6877 | case R_ARM_REL32_NOI: |
5b5bb741 PB |
6878 | case R_ARM_CALL: |
6879 | case R_ARM_JUMP24: | |
dfc5f959 | 6880 | case R_ARM_XPC25: |
eb043451 | 6881 | case R_ARM_PREL31: |
7359ea65 | 6882 | case R_ARM_PLT32: |
7359ea65 DJ |
6883 | /* Handle relocations which should use the PLT entry. ABS32/REL32 |
6884 | will use the symbol's value, which may point to a PLT entry, but we | |
6885 | don't need to handle that here. If we created a PLT entry, all | |
5fa9e92f CL |
6886 | branches in this object should go to it, except if the PLT is too |
6887 | far away, in which case a long branch stub should be inserted. */ | |
bb224fc3 | 6888 | if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 |
5fa9e92f | 6889 | && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI |
155d87d7 CL |
6890 | && r_type != R_ARM_CALL |
6891 | && r_type != R_ARM_JUMP24 | |
6892 | && r_type != R_ARM_PLT32) | |
7359ea65 | 6893 | && h != NULL |
c84cd8ee | 6894 | && splt != NULL |
7359ea65 DJ |
6895 | && h->plt.offset != (bfd_vma) -1) |
6896 | { | |
c84cd8ee DJ |
6897 | /* If we've created a .plt section, and assigned a PLT entry to |
6898 | this function, it should not be known to bind locally. If | |
6899 | it were, we would have cleared the PLT entry. */ | |
7359ea65 DJ |
6900 | BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h)); |
6901 | ||
6902 | value = (splt->output_section->vma | |
6903 | + splt->output_offset | |
6904 | + h->plt.offset); | |
0945cdfd | 6905 | *unresolved_reloc_p = FALSE; |
7359ea65 DJ |
6906 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
6907 | contents, rel->r_offset, value, | |
00a97672 | 6908 | rel->r_addend); |
7359ea65 DJ |
6909 | } |
6910 | ||
67687978 PB |
6911 | /* When generating a shared object or relocatable executable, these |
6912 | relocations are copied into the output file to be resolved at | |
6913 | run time. */ | |
6914 | if ((info->shared || globals->root.is_relocatable_executable) | |
7359ea65 | 6915 | && (input_section->flags & SEC_ALLOC) |
4dfe6ac6 | 6916 | && !(globals->vxworks_p |
3348747a NS |
6917 | && strcmp (input_section->output_section->name, |
6918 | ".tls_vars") == 0) | |
bb224fc3 | 6919 | && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) |
ee06dc07 | 6920 | || !SYMBOL_CALLS_LOCAL (info, h)) |
7359ea65 DJ |
6921 | && (h == NULL |
6922 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
6923 | || h->root.type != bfd_link_hash_undefweak) | |
6924 | && r_type != R_ARM_PC24 | |
5b5bb741 PB |
6925 | && r_type != R_ARM_CALL |
6926 | && r_type != R_ARM_JUMP24 | |
ee06dc07 | 6927 | && r_type != R_ARM_PREL31 |
7359ea65 | 6928 | && r_type != R_ARM_PLT32) |
252b5132 | 6929 | { |
947216bf AM |
6930 | Elf_Internal_Rela outrel; |
6931 | bfd_byte *loc; | |
b34976b6 | 6932 | bfd_boolean skip, relocate; |
f21f3fe0 | 6933 | |
0945cdfd DJ |
6934 | *unresolved_reloc_p = FALSE; |
6935 | ||
252b5132 RH |
6936 | if (sreloc == NULL) |
6937 | { | |
83bac4b0 NC |
6938 | sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, |
6939 | ! globals->use_rel); | |
f21f3fe0 | 6940 | |
83bac4b0 | 6941 | if (sreloc == NULL) |
252b5132 | 6942 | return bfd_reloc_notsupported; |
252b5132 | 6943 | } |
f21f3fe0 | 6944 | |
b34976b6 AM |
6945 | skip = FALSE; |
6946 | relocate = FALSE; | |
f21f3fe0 | 6947 | |
00a97672 | 6948 | outrel.r_addend = addend; |
c629eae0 JJ |
6949 | outrel.r_offset = |
6950 | _bfd_elf_section_offset (output_bfd, info, input_section, | |
6951 | rel->r_offset); | |
6952 | if (outrel.r_offset == (bfd_vma) -1) | |
b34976b6 | 6953 | skip = TRUE; |
0bb2d96a | 6954 | else if (outrel.r_offset == (bfd_vma) -2) |
b34976b6 | 6955 | skip = TRUE, relocate = TRUE; |
252b5132 RH |
6956 | outrel.r_offset += (input_section->output_section->vma |
6957 | + input_section->output_offset); | |
f21f3fe0 | 6958 | |
252b5132 | 6959 | if (skip) |
0bb2d96a | 6960 | memset (&outrel, 0, sizeof outrel); |
5e681ec4 PB |
6961 | else if (h != NULL |
6962 | && h->dynindx != -1 | |
7359ea65 | 6963 | && (!info->shared |
5e681ec4 | 6964 | || !info->symbolic |
f5385ebf | 6965 | || !h->def_regular)) |
5e681ec4 | 6966 | outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); |
252b5132 RH |
6967 | else |
6968 | { | |
a16385dc MM |
6969 | int symbol; |
6970 | ||
5e681ec4 | 6971 | /* This symbol is local, or marked to become local. */ |
b7693d02 DJ |
6972 | if (sym_flags == STT_ARM_TFUNC) |
6973 | value |= 1; | |
a16385dc | 6974 | if (globals->symbian_p) |
6366ff1e | 6975 | { |
74541ad4 AM |
6976 | asection *osec; |
6977 | ||
6366ff1e MM |
6978 | /* On Symbian OS, the data segment and text segement |
6979 | can be relocated independently. Therefore, we | |
6980 | must indicate the segment to which this | |
6981 | relocation is relative. The BPABI allows us to | |
6982 | use any symbol in the right segment; we just use | |
6983 | the section symbol as it is convenient. (We | |
6984 | cannot use the symbol given by "h" directly as it | |
74541ad4 AM |
6985 | will not appear in the dynamic symbol table.) |
6986 | ||
6987 | Note that the dynamic linker ignores the section | |
6988 | symbol value, so we don't subtract osec->vma | |
6989 | from the emitted reloc addend. */ | |
10dbd1f3 | 6990 | if (sym_sec) |
74541ad4 | 6991 | osec = sym_sec->output_section; |
10dbd1f3 | 6992 | else |
74541ad4 AM |
6993 | osec = input_section->output_section; |
6994 | symbol = elf_section_data (osec)->dynindx; | |
6995 | if (symbol == 0) | |
6996 | { | |
6997 | struct elf_link_hash_table *htab = elf_hash_table (info); | |
6998 | ||
6999 | if ((osec->flags & SEC_READONLY) == 0 | |
7000 | && htab->data_index_section != NULL) | |
7001 | osec = htab->data_index_section; | |
7002 | else | |
7003 | osec = htab->text_index_section; | |
7004 | symbol = elf_section_data (osec)->dynindx; | |
7005 | } | |
6366ff1e MM |
7006 | BFD_ASSERT (symbol != 0); |
7007 | } | |
a16385dc MM |
7008 | else |
7009 | /* On SVR4-ish systems, the dynamic loader cannot | |
7010 | relocate the text and data segments independently, | |
7011 | so the symbol does not matter. */ | |
7012 | symbol = 0; | |
7013 | outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); | |
00a97672 RS |
7014 | if (globals->use_rel) |
7015 | relocate = TRUE; | |
7016 | else | |
7017 | outrel.r_addend += value; | |
252b5132 | 7018 | } |
f21f3fe0 | 7019 | |
947216bf | 7020 | loc = sreloc->contents; |
00a97672 RS |
7021 | loc += sreloc->reloc_count++ * RELOC_SIZE (globals); |
7022 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
9a5aca8c | 7023 | |
f21f3fe0 | 7024 | /* If this reloc is against an external symbol, we do not want to |
252b5132 | 7025 | fiddle with the addend. Otherwise, we need to include the symbol |
9b485d32 | 7026 | value so that it becomes an addend for the dynamic reloc. */ |
252b5132 RH |
7027 | if (! relocate) |
7028 | return bfd_reloc_ok; | |
9a5aca8c | 7029 | |
f21f3fe0 | 7030 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
252b5132 RH |
7031 | contents, rel->r_offset, value, |
7032 | (bfd_vma) 0); | |
7033 | } | |
7034 | else switch (r_type) | |
7035 | { | |
00a97672 RS |
7036 | case R_ARM_ABS12: |
7037 | return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); | |
7038 | ||
dfc5f959 | 7039 | case R_ARM_XPC25: /* Arm BLX instruction. */ |
5b5bb741 PB |
7040 | case R_ARM_CALL: |
7041 | case R_ARM_JUMP24: | |
8029a119 | 7042 | case R_ARM_PC24: /* Arm B/BL instruction. */ |
7359ea65 | 7043 | case R_ARM_PLT32: |
906e58ca | 7044 | { |
906e58ca NC |
7045 | bfd_signed_vma branch_offset; |
7046 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; | |
7047 | ||
dfc5f959 | 7048 | if (r_type == R_ARM_XPC25) |
252b5132 | 7049 | { |
dfc5f959 NC |
7050 | /* Check for Arm calling Arm function. */ |
7051 | /* FIXME: Should we translate the instruction into a BL | |
7052 | instruction instead ? */ | |
7053 | if (sym_flags != STT_ARM_TFUNC) | |
d003868e AM |
7054 | (*_bfd_error_handler) |
7055 | (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."), | |
7056 | input_bfd, | |
7057 | h ? h->root.root.string : "(local)"); | |
dfc5f959 | 7058 | } |
155d87d7 | 7059 | else if (r_type == R_ARM_PC24) |
dfc5f959 NC |
7060 | { |
7061 | /* Check for Arm calling Thumb function. */ | |
7062 | if (sym_flags == STT_ARM_TFUNC) | |
7063 | { | |
f2a9dd69 DJ |
7064 | if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, |
7065 | output_bfd, input_section, | |
7066 | hit_data, sym_sec, rel->r_offset, | |
7067 | signed_addend, value, | |
7068 | error_message)) | |
7069 | return bfd_reloc_ok; | |
7070 | else | |
7071 | return bfd_reloc_dangerous; | |
dfc5f959 | 7072 | } |
252b5132 | 7073 | } |
ba96a88f | 7074 | |
906e58ca | 7075 | /* Check if a stub has to be inserted because the |
8029a119 | 7076 | destination is too far or we are changing mode. */ |
155d87d7 CL |
7077 | if ( r_type == R_ARM_CALL |
7078 | || r_type == R_ARM_JUMP24 | |
7079 | || r_type == R_ARM_PLT32) | |
906e58ca | 7080 | { |
ffcb4889 NS |
7081 | bfd_vma from; |
7082 | ||
5fa9e92f CL |
7083 | /* If the call goes through a PLT entry, make sure to |
7084 | check distance to the right destination address. */ | |
7085 | if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1) | |
7086 | { | |
7087 | value = (splt->output_section->vma | |
7088 | + splt->output_offset | |
7089 | + h->plt.offset); | |
7090 | *unresolved_reloc_p = FALSE; | |
67d74e43 DJ |
7091 | /* The PLT entry is in ARM mode, regardless of the |
7092 | target function. */ | |
7093 | sym_flags = STT_FUNC; | |
5fa9e92f CL |
7094 | } |
7095 | ||
7096 | from = (input_section->output_section->vma | |
7097 | + input_section->output_offset | |
7098 | + rel->r_offset); | |
7099 | branch_offset = (bfd_signed_vma)(value - from); | |
7100 | ||
906e58ca NC |
7101 | if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET |
7102 | || branch_offset < ARM_MAX_BWD_BRANCH_OFFSET | |
155d87d7 CL |
7103 | || ((sym_flags == STT_ARM_TFUNC) |
7104 | && (((r_type == R_ARM_CALL) && !globals->use_blx) | |
7105 | || (r_type == R_ARM_JUMP24) | |
7106 | || (r_type == R_ARM_PLT32) )) | |
7107 | ) | |
906e58ca NC |
7108 | { |
7109 | /* The target is out of reach, so redirect the | |
7110 | branch to the local stub for this function. */ | |
7111 | ||
7112 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
7113 | sym_sec, h, | |
7114 | rel, globals); | |
7115 | if (stub_entry != NULL) | |
7116 | value = (stub_entry->stub_offset | |
7117 | + stub_entry->stub_sec->output_offset | |
7118 | + stub_entry->stub_sec->output_section->vma); | |
7119 | } | |
7120 | } | |
7121 | ||
dea514f5 PB |
7122 | /* The ARM ELF ABI says that this reloc is computed as: S - P + A |
7123 | where: | |
7124 | S is the address of the symbol in the relocation. | |
7125 | P is address of the instruction being relocated. | |
7126 | A is the addend (extracted from the instruction) in bytes. | |
7127 | ||
7128 | S is held in 'value'. | |
7129 | P is the base address of the section containing the | |
7130 | instruction plus the offset of the reloc into that | |
7131 | section, ie: | |
7132 | (input_section->output_section->vma + | |
7133 | input_section->output_offset + | |
7134 | rel->r_offset). | |
7135 | A is the addend, converted into bytes, ie: | |
7136 | (signed_addend * 4) | |
7137 | ||
7138 | Note: None of these operations have knowledge of the pipeline | |
7139 | size of the processor, thus it is up to the assembler to | |
7140 | encode this information into the addend. */ | |
7141 | value -= (input_section->output_section->vma | |
7142 | + input_section->output_offset); | |
7143 | value -= rel->r_offset; | |
4e7fd91e PB |
7144 | if (globals->use_rel) |
7145 | value += (signed_addend << howto->size); | |
7146 | else | |
7147 | /* RELA addends do not have to be adjusted by howto->size. */ | |
7148 | value += signed_addend; | |
23080146 | 7149 | |
dcb5e6e6 NC |
7150 | signed_addend = value; |
7151 | signed_addend >>= howto->rightshift; | |
9a5aca8c | 7152 | |
5ab79981 | 7153 | /* A branch to an undefined weak symbol is turned into a jump to |
ffcb4889 | 7154 | the next instruction unless a PLT entry will be created. |
cd1dac3d DG |
7155 | Do the same for local undefined symbols. |
7156 | The jump to the next instruction is optimized as a NOP depending | |
7157 | on the architecture. */ | |
ffcb4889 NS |
7158 | if (h ? (h->root.type == bfd_link_hash_undefweak |
7159 | && !(splt != NULL && h->plt.offset != (bfd_vma) -1)) | |
7160 | : bfd_is_und_section (sym_sec)) | |
5ab79981 | 7161 | { |
cd1dac3d DG |
7162 | value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); |
7163 | ||
7164 | if (arch_has_arm_nop (globals)) | |
7165 | value |= 0x0320f000; | |
7166 | else | |
7167 | value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ | |
5ab79981 PB |
7168 | } |
7169 | else | |
59f2c4e7 | 7170 | { |
9b485d32 | 7171 | /* Perform a signed range check. */ |
dcb5e6e6 | 7172 | if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) |
59f2c4e7 NC |
7173 | || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) |
7174 | return bfd_reloc_overflow; | |
9a5aca8c | 7175 | |
5ab79981 | 7176 | addend = (value & 2); |
39b41c9c | 7177 | |
5ab79981 PB |
7178 | value = (signed_addend & howto->dst_mask) |
7179 | | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); | |
39b41c9c | 7180 | |
5ab79981 PB |
7181 | if (r_type == R_ARM_CALL) |
7182 | { | |
155d87d7 CL |
7183 | /* Set the H bit in the BLX instruction. */ |
7184 | if (sym_flags == STT_ARM_TFUNC) | |
7185 | { | |
7186 | if (addend) | |
7187 | value |= (1 << 24); | |
7188 | else | |
7189 | value &= ~(bfd_vma)(1 << 24); | |
7190 | } | |
7191 | ||
5ab79981 | 7192 | /* Select the correct instruction (BL or BLX). */ |
906e58ca | 7193 | /* Only if we are not handling a BL to a stub. In this |
8029a119 | 7194 | case, mode switching is performed by the stub. */ |
906e58ca | 7195 | if (sym_flags == STT_ARM_TFUNC && !stub_entry) |
5ab79981 PB |
7196 | value |= (1 << 28); |
7197 | else | |
7198 | { | |
7199 | value &= ~(bfd_vma)(1 << 28); | |
7200 | value |= (1 << 24); | |
7201 | } | |
39b41c9c PB |
7202 | } |
7203 | } | |
906e58ca | 7204 | } |
252b5132 | 7205 | break; |
f21f3fe0 | 7206 | |
252b5132 RH |
7207 | case R_ARM_ABS32: |
7208 | value += addend; | |
7209 | if (sym_flags == STT_ARM_TFUNC) | |
7210 | value |= 1; | |
7211 | break; | |
f21f3fe0 | 7212 | |
bb224fc3 MS |
7213 | case R_ARM_ABS32_NOI: |
7214 | value += addend; | |
7215 | break; | |
7216 | ||
252b5132 | 7217 | case R_ARM_REL32: |
a8bc6c78 PB |
7218 | value += addend; |
7219 | if (sym_flags == STT_ARM_TFUNC) | |
7220 | value |= 1; | |
252b5132 | 7221 | value -= (input_section->output_section->vma |
62efb346 | 7222 | + input_section->output_offset + rel->r_offset); |
252b5132 | 7223 | break; |
eb043451 | 7224 | |
bb224fc3 MS |
7225 | case R_ARM_REL32_NOI: |
7226 | value += addend; | |
7227 | value -= (input_section->output_section->vma | |
7228 | + input_section->output_offset + rel->r_offset); | |
7229 | break; | |
7230 | ||
eb043451 PB |
7231 | case R_ARM_PREL31: |
7232 | value -= (input_section->output_section->vma | |
7233 | + input_section->output_offset + rel->r_offset); | |
7234 | value += signed_addend; | |
7235 | if (! h || h->root.type != bfd_link_hash_undefweak) | |
7236 | { | |
8029a119 | 7237 | /* Check for overflow. */ |
eb043451 PB |
7238 | if ((value ^ (value >> 1)) & (1 << 30)) |
7239 | return bfd_reloc_overflow; | |
7240 | } | |
7241 | value &= 0x7fffffff; | |
7242 | value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); | |
7243 | if (sym_flags == STT_ARM_TFUNC) | |
7244 | value |= 1; | |
7245 | break; | |
252b5132 | 7246 | } |
f21f3fe0 | 7247 | |
252b5132 RH |
7248 | bfd_put_32 (input_bfd, value, hit_data); |
7249 | return bfd_reloc_ok; | |
7250 | ||
7251 | case R_ARM_ABS8: | |
7252 | value += addend; | |
4e67d4ca DG |
7253 | |
7254 | /* There is no way to tell whether the user intended to use a signed or | |
7255 | unsigned addend. When checking for overflow we accept either, | |
7256 | as specified by the AAELF. */ | |
7257 | if ((long) value > 0xff || (long) value < -0x80) | |
252b5132 RH |
7258 | return bfd_reloc_overflow; |
7259 | ||
7260 | bfd_put_8 (input_bfd, value, hit_data); | |
7261 | return bfd_reloc_ok; | |
7262 | ||
7263 | case R_ARM_ABS16: | |
7264 | value += addend; | |
7265 | ||
4e67d4ca DG |
7266 | /* See comment for R_ARM_ABS8. */ |
7267 | if ((long) value > 0xffff || (long) value < -0x8000) | |
252b5132 RH |
7268 | return bfd_reloc_overflow; |
7269 | ||
7270 | bfd_put_16 (input_bfd, value, hit_data); | |
7271 | return bfd_reloc_ok; | |
7272 | ||
252b5132 | 7273 | case R_ARM_THM_ABS5: |
9b485d32 | 7274 | /* Support ldr and str instructions for the thumb. */ |
4e7fd91e PB |
7275 | if (globals->use_rel) |
7276 | { | |
7277 | /* Need to refetch addend. */ | |
7278 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
7279 | /* ??? Need to determine shift amount from operand size. */ | |
7280 | addend >>= howto->rightshift; | |
7281 | } | |
252b5132 RH |
7282 | value += addend; |
7283 | ||
7284 | /* ??? Isn't value unsigned? */ | |
7285 | if ((long) value > 0x1f || (long) value < -0x10) | |
7286 | return bfd_reloc_overflow; | |
7287 | ||
7288 | /* ??? Value needs to be properly shifted into place first. */ | |
7289 | value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; | |
7290 | bfd_put_16 (input_bfd, value, hit_data); | |
7291 | return bfd_reloc_ok; | |
7292 | ||
2cab6cc3 MS |
7293 | case R_ARM_THM_ALU_PREL_11_0: |
7294 | /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ | |
7295 | { | |
7296 | bfd_vma insn; | |
7297 | bfd_signed_vma relocation; | |
7298 | ||
7299 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
7300 | | bfd_get_16 (input_bfd, hit_data + 2); | |
7301 | ||
7302 | if (globals->use_rel) | |
7303 | { | |
7304 | signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) | |
7305 | | ((insn & (1 << 26)) >> 15); | |
7306 | if (insn & 0xf00000) | |
7307 | signed_addend = -signed_addend; | |
7308 | } | |
7309 | ||
7310 | relocation = value + signed_addend; | |
7311 | relocation -= (input_section->output_section->vma | |
7312 | + input_section->output_offset | |
7313 | + rel->r_offset); | |
7314 | ||
7315 | value = abs (relocation); | |
7316 | ||
7317 | if (value >= 0x1000) | |
7318 | return bfd_reloc_overflow; | |
7319 | ||
7320 | insn = (insn & 0xfb0f8f00) | (value & 0xff) | |
7321 | | ((value & 0x700) << 4) | |
7322 | | ((value & 0x800) << 15); | |
7323 | if (relocation < 0) | |
7324 | insn |= 0xa00000; | |
7325 | ||
7326 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
7327 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
7328 | ||
7329 | return bfd_reloc_ok; | |
7330 | } | |
7331 | ||
e1ec24c6 NC |
7332 | case R_ARM_THM_PC8: |
7333 | /* PR 10073: This reloc is not generated by the GNU toolchain, | |
7334 | but it is supported for compatibility with third party libraries | |
7335 | generated by other compilers, specifically the ARM/IAR. */ | |
7336 | { | |
7337 | bfd_vma insn; | |
7338 | bfd_signed_vma relocation; | |
7339 | ||
7340 | insn = bfd_get_16 (input_bfd, hit_data); | |
7341 | ||
7342 | if (globals->use_rel) | |
7343 | addend = (insn & 0x00ff) << 2; | |
7344 | ||
7345 | relocation = value + addend; | |
7346 | relocation -= (input_section->output_section->vma | |
7347 | + input_section->output_offset | |
7348 | + rel->r_offset); | |
7349 | ||
7350 | value = abs (relocation); | |
7351 | ||
7352 | /* We do not check for overflow of this reloc. Although strictly | |
7353 | speaking this is incorrect, it appears to be necessary in order | |
7354 | to work with IAR generated relocs. Since GCC and GAS do not | |
7355 | generate R_ARM_THM_PC8 relocs, the lack of a check should not be | |
7356 | a problem for them. */ | |
7357 | value &= 0x3fc; | |
7358 | ||
7359 | insn = (insn & 0xff00) | (value >> 2); | |
7360 | ||
7361 | bfd_put_16 (input_bfd, insn, hit_data); | |
7362 | ||
7363 | return bfd_reloc_ok; | |
7364 | } | |
7365 | ||
2cab6cc3 MS |
7366 | case R_ARM_THM_PC12: |
7367 | /* Corresponds to: ldr.w reg, [pc, #offset]. */ | |
7368 | { | |
7369 | bfd_vma insn; | |
7370 | bfd_signed_vma relocation; | |
7371 | ||
7372 | insn = (bfd_get_16 (input_bfd, hit_data) << 16) | |
7373 | | bfd_get_16 (input_bfd, hit_data + 2); | |
7374 | ||
7375 | if (globals->use_rel) | |
7376 | { | |
7377 | signed_addend = insn & 0xfff; | |
7378 | if (!(insn & (1 << 23))) | |
7379 | signed_addend = -signed_addend; | |
7380 | } | |
7381 | ||
7382 | relocation = value + signed_addend; | |
7383 | relocation -= (input_section->output_section->vma | |
7384 | + input_section->output_offset | |
7385 | + rel->r_offset); | |
7386 | ||
7387 | value = abs (relocation); | |
7388 | ||
7389 | if (value >= 0x1000) | |
7390 | return bfd_reloc_overflow; | |
7391 | ||
7392 | insn = (insn & 0xff7ff000) | value; | |
7393 | if (relocation >= 0) | |
7394 | insn |= (1 << 23); | |
7395 | ||
7396 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
7397 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
7398 | ||
7399 | return bfd_reloc_ok; | |
7400 | } | |
7401 | ||
dfc5f959 | 7402 | case R_ARM_THM_XPC22: |
c19d1205 | 7403 | case R_ARM_THM_CALL: |
bd97cb95 | 7404 | case R_ARM_THM_JUMP24: |
dfc5f959 | 7405 | /* Thumb BL (branch long instruction). */ |
252b5132 | 7406 | { |
b34976b6 | 7407 | bfd_vma relocation; |
e95de063 | 7408 | bfd_vma reloc_sign; |
b34976b6 AM |
7409 | bfd_boolean overflow = FALSE; |
7410 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
7411 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
e95de063 MS |
7412 | bfd_signed_vma reloc_signed_max; |
7413 | bfd_signed_vma reloc_signed_min; | |
b34976b6 | 7414 | bfd_vma check; |
252b5132 | 7415 | bfd_signed_vma signed_check; |
e95de063 | 7416 | int bitsize; |
cd1dac3d | 7417 | const int thumb2 = using_thumb2 (globals); |
252b5132 | 7418 | |
5ab79981 | 7419 | /* A branch to an undefined weak symbol is turned into a jump to |
cd1dac3d DG |
7420 | the next instruction unless a PLT entry will be created. |
7421 | The jump to the next instruction is optimized as a NOP.W for | |
7422 | Thumb-2 enabled architectures. */ | |
19540007 JM |
7423 | if (h && h->root.type == bfd_link_hash_undefweak |
7424 | && !(splt != NULL && h->plt.offset != (bfd_vma) -1)) | |
5ab79981 | 7425 | { |
cd1dac3d DG |
7426 | if (arch_has_thumb2_nop (globals)) |
7427 | { | |
7428 | bfd_put_16 (input_bfd, 0xf3af, hit_data); | |
7429 | bfd_put_16 (input_bfd, 0x8000, hit_data + 2); | |
7430 | } | |
7431 | else | |
7432 | { | |
7433 | bfd_put_16 (input_bfd, 0xe000, hit_data); | |
7434 | bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); | |
7435 | } | |
5ab79981 PB |
7436 | return bfd_reloc_ok; |
7437 | } | |
7438 | ||
e95de063 MS |
7439 | /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible |
7440 | with Thumb-1) involving the J1 and J2 bits. */ | |
4e7fd91e PB |
7441 | if (globals->use_rel) |
7442 | { | |
e95de063 MS |
7443 | bfd_vma s = (upper_insn & (1 << 10)) >> 10; |
7444 | bfd_vma upper = upper_insn & 0x3ff; | |
7445 | bfd_vma lower = lower_insn & 0x7ff; | |
7446 | bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; | |
7447 | bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; | |
7448 | bfd_vma i1 = j1 ^ s ? 0 : 1; | |
7449 | bfd_vma i2 = j2 ^ s ? 0 : 1; | |
7450 | ||
7451 | addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); | |
7452 | /* Sign extend. */ | |
7453 | addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); | |
7454 | ||
4e7fd91e PB |
7455 | signed_addend = addend; |
7456 | } | |
cb1afa5c | 7457 | |
dfc5f959 NC |
7458 | if (r_type == R_ARM_THM_XPC22) |
7459 | { | |
7460 | /* Check for Thumb to Thumb call. */ | |
7461 | /* FIXME: Should we translate the instruction into a BL | |
7462 | instruction instead ? */ | |
7463 | if (sym_flags == STT_ARM_TFUNC) | |
d003868e AM |
7464 | (*_bfd_error_handler) |
7465 | (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."), | |
7466 | input_bfd, | |
7467 | h ? h->root.root.string : "(local)"); | |
dfc5f959 NC |
7468 | } |
7469 | else | |
252b5132 | 7470 | { |
dfc5f959 NC |
7471 | /* If it is not a call to Thumb, assume call to Arm. |
7472 | If it is a call relative to a section name, then it is not a | |
b7693d02 DJ |
7473 | function call at all, but rather a long jump. Calls through |
7474 | the PLT do not require stubs. */ | |
7475 | if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION | |
7476 | && (h == NULL || splt == NULL | |
7477 | || h->plt.offset == (bfd_vma) -1)) | |
dfc5f959 | 7478 | { |
bd97cb95 | 7479 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
39b41c9c PB |
7480 | { |
7481 | /* Convert BL to BLX. */ | |
7482 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
7483 | } | |
155d87d7 CL |
7484 | else if (( r_type != R_ARM_THM_CALL) |
7485 | && (r_type != R_ARM_THM_JUMP24)) | |
8029a119 NC |
7486 | { |
7487 | if (elf32_thumb_to_arm_stub | |
7488 | (info, sym_name, input_bfd, output_bfd, input_section, | |
7489 | hit_data, sym_sec, rel->r_offset, signed_addend, value, | |
7490 | error_message)) | |
7491 | return bfd_reloc_ok; | |
7492 | else | |
7493 | return bfd_reloc_dangerous; | |
7494 | } | |
da5938a2 | 7495 | } |
bd97cb95 DJ |
7496 | else if (sym_flags == STT_ARM_TFUNC && globals->use_blx |
7497 | && r_type == R_ARM_THM_CALL) | |
39b41c9c PB |
7498 | { |
7499 | /* Make sure this is a BL. */ | |
7500 | lower_insn |= 0x1800; | |
7501 | } | |
252b5132 | 7502 | } |
f21f3fe0 | 7503 | |
b7693d02 DJ |
7504 | /* Handle calls via the PLT. */ |
7505 | if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1) | |
7506 | { | |
7507 | value = (splt->output_section->vma | |
7508 | + splt->output_offset | |
7509 | + h->plt.offset); | |
bd97cb95 | 7510 | if (globals->use_blx && r_type == R_ARM_THM_CALL) |
33bfe774 JB |
7511 | { |
7512 | /* If the Thumb BLX instruction is available, convert the | |
7513 | BL to a BLX instruction to call the ARM-mode PLT entry. */ | |
39b41c9c | 7514 | lower_insn = (lower_insn & ~0x1000) | 0x0800; |
67d74e43 | 7515 | sym_flags = STT_FUNC; |
33bfe774 JB |
7516 | } |
7517 | else | |
67d74e43 DJ |
7518 | { |
7519 | /* Target the Thumb stub before the ARM PLT entry. */ | |
7520 | value -= PLT_THUMB_STUB_SIZE; | |
7521 | sym_flags = STT_ARM_TFUNC; | |
7522 | } | |
0945cdfd | 7523 | *unresolved_reloc_p = FALSE; |
b7693d02 DJ |
7524 | } |
7525 | ||
155d87d7 | 7526 | if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) |
906e58ca NC |
7527 | { |
7528 | /* Check if a stub has to be inserted because the destination | |
8029a119 | 7529 | is too far. */ |
906e58ca NC |
7530 | bfd_vma from; |
7531 | bfd_signed_vma branch_offset; | |
7532 | struct elf32_arm_stub_hash_entry *stub_entry = NULL; | |
7533 | ||
7534 | from = (input_section->output_section->vma | |
7535 | + input_section->output_offset | |
7536 | + rel->r_offset); | |
7537 | branch_offset = (bfd_signed_vma)(value - from); | |
7538 | ||
7539 | if ((!thumb2 | |
7540 | && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET | |
7541 | || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) | |
7542 | || | |
7543 | (thumb2 | |
7544 | && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET | |
f4ac8484 | 7545 | || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) |
155d87d7 CL |
7546 | || ((sym_flags != STT_ARM_TFUNC) |
7547 | && (((r_type == R_ARM_THM_CALL) && !globals->use_blx) | |
7548 | || r_type == R_ARM_THM_JUMP24))) | |
906e58ca NC |
7549 | { |
7550 | /* The target is out of reach or we are changing modes, so | |
7551 | redirect the branch to the local stub for this | |
7552 | function. */ | |
7553 | stub_entry = elf32_arm_get_stub_entry (input_section, | |
7554 | sym_sec, h, | |
7555 | rel, globals); | |
7556 | if (stub_entry != NULL) | |
7557 | value = (stub_entry->stub_offset | |
7558 | + stub_entry->stub_sec->output_offset | |
7559 | + stub_entry->stub_sec->output_section->vma); | |
7560 | ||
f4ac8484 | 7561 | /* If this call becomes a call to Arm, force BLX. */ |
155d87d7 | 7562 | if (globals->use_blx && (r_type == R_ARM_THM_CALL)) |
f4ac8484 DJ |
7563 | { |
7564 | if ((stub_entry | |
7565 | && !arm_stub_is_thumb (stub_entry->stub_type)) | |
7566 | || (sym_flags != STT_ARM_TFUNC)) | |
7567 | lower_insn = (lower_insn & ~0x1000) | 0x0800; | |
7568 | } | |
906e58ca NC |
7569 | } |
7570 | } | |
7571 | ||
ba96a88f | 7572 | relocation = value + signed_addend; |
f21f3fe0 | 7573 | |
252b5132 | 7574 | relocation -= (input_section->output_section->vma |
ba96a88f NC |
7575 | + input_section->output_offset |
7576 | + rel->r_offset); | |
9a5aca8c | 7577 | |
252b5132 RH |
7578 | check = relocation >> howto->rightshift; |
7579 | ||
7580 | /* If this is a signed value, the rightshift just dropped | |
7581 | leading 1 bits (assuming twos complement). */ | |
7582 | if ((bfd_signed_vma) relocation >= 0) | |
7583 | signed_check = check; | |
7584 | else | |
7585 | signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); | |
7586 | ||
e95de063 MS |
7587 | /* Calculate the permissable maximum and minimum values for |
7588 | this relocation according to whether we're relocating for | |
7589 | Thumb-2 or not. */ | |
7590 | bitsize = howto->bitsize; | |
7591 | if (!thumb2) | |
7592 | bitsize -= 2; | |
f6ebfac0 | 7593 | reloc_signed_max = (1 << (bitsize - 1)) - 1; |
e95de063 MS |
7594 | reloc_signed_min = ~reloc_signed_max; |
7595 | ||
252b5132 | 7596 | /* Assumes two's complement. */ |
ba96a88f | 7597 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
b34976b6 | 7598 | overflow = TRUE; |
252b5132 | 7599 | |
bd97cb95 | 7600 | if ((lower_insn & 0x5000) == 0x4000) |
c62e1cc3 NC |
7601 | /* For a BLX instruction, make sure that the relocation is rounded up |
7602 | to a word boundary. This follows the semantics of the instruction | |
7603 | which specifies that bit 1 of the target address will come from bit | |
7604 | 1 of the base address. */ | |
7605 | relocation = (relocation + 2) & ~ 3; | |
cb1afa5c | 7606 | |
e95de063 MS |
7607 | /* Put RELOCATION back into the insn. Assumes two's complement. |
7608 | We use the Thumb-2 encoding, which is safe even if dealing with | |
7609 | a Thumb-1 instruction by virtue of our overflow check above. */ | |
7610 | reloc_sign = (signed_check < 0) ? 1 : 0; | |
7611 | upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) | |
7612 | | ((relocation >> 12) & 0x3ff) | |
7613 | | (reloc_sign << 10); | |
906e58ca | 7614 | lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) |
e95de063 MS |
7615 | | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) |
7616 | | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) | |
7617 | | ((relocation >> 1) & 0x7ff); | |
c62e1cc3 | 7618 | |
252b5132 RH |
7619 | /* Put the relocated value back in the object file: */ |
7620 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
7621 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
7622 | ||
7623 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
7624 | } | |
7625 | break; | |
7626 | ||
c19d1205 ZW |
7627 | case R_ARM_THM_JUMP19: |
7628 | /* Thumb32 conditional branch instruction. */ | |
7629 | { | |
7630 | bfd_vma relocation; | |
7631 | bfd_boolean overflow = FALSE; | |
7632 | bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); | |
7633 | bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); | |
a00a1f35 MS |
7634 | bfd_signed_vma reloc_signed_max = 0xffffe; |
7635 | bfd_signed_vma reloc_signed_min = -0x100000; | |
c19d1205 ZW |
7636 | bfd_signed_vma signed_check; |
7637 | ||
7638 | /* Need to refetch the addend, reconstruct the top three bits, | |
7639 | and squish the two 11 bit pieces together. */ | |
7640 | if (globals->use_rel) | |
7641 | { | |
7642 | bfd_vma S = (upper_insn & 0x0400) >> 10; | |
a00a1f35 | 7643 | bfd_vma upper = (upper_insn & 0x003f); |
c19d1205 ZW |
7644 | bfd_vma J1 = (lower_insn & 0x2000) >> 13; |
7645 | bfd_vma J2 = (lower_insn & 0x0800) >> 11; | |
7646 | bfd_vma lower = (lower_insn & 0x07ff); | |
7647 | ||
a00a1f35 MS |
7648 | upper |= J1 << 6; |
7649 | upper |= J2 << 7; | |
7650 | upper |= (!S) << 8; | |
c19d1205 ZW |
7651 | upper -= 0x0100; /* Sign extend. */ |
7652 | ||
7653 | addend = (upper << 12) | (lower << 1); | |
7654 | signed_addend = addend; | |
7655 | } | |
7656 | ||
bd97cb95 DJ |
7657 | /* Handle calls via the PLT. */ |
7658 | if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1) | |
7659 | { | |
7660 | value = (splt->output_section->vma | |
7661 | + splt->output_offset | |
7662 | + h->plt.offset); | |
7663 | /* Target the Thumb stub before the ARM PLT entry. */ | |
7664 | value -= PLT_THUMB_STUB_SIZE; | |
7665 | *unresolved_reloc_p = FALSE; | |
7666 | } | |
7667 | ||
c19d1205 ZW |
7668 | /* ??? Should handle interworking? GCC might someday try to |
7669 | use this for tail calls. */ | |
7670 | ||
7671 | relocation = value + signed_addend; | |
7672 | relocation -= (input_section->output_section->vma | |
7673 | + input_section->output_offset | |
7674 | + rel->r_offset); | |
a00a1f35 | 7675 | signed_check = (bfd_signed_vma) relocation; |
c19d1205 | 7676 | |
c19d1205 ZW |
7677 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) |
7678 | overflow = TRUE; | |
7679 | ||
7680 | /* Put RELOCATION back into the insn. */ | |
7681 | { | |
7682 | bfd_vma S = (relocation & 0x00100000) >> 20; | |
7683 | bfd_vma J2 = (relocation & 0x00080000) >> 19; | |
7684 | bfd_vma J1 = (relocation & 0x00040000) >> 18; | |
7685 | bfd_vma hi = (relocation & 0x0003f000) >> 12; | |
7686 | bfd_vma lo = (relocation & 0x00000ffe) >> 1; | |
7687 | ||
a00a1f35 | 7688 | upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; |
c19d1205 ZW |
7689 | lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; |
7690 | } | |
7691 | ||
7692 | /* Put the relocated value back in the object file: */ | |
7693 | bfd_put_16 (input_bfd, upper_insn, hit_data); | |
7694 | bfd_put_16 (input_bfd, lower_insn, hit_data + 2); | |
7695 | ||
7696 | return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); | |
7697 | } | |
7698 | ||
7699 | case R_ARM_THM_JUMP11: | |
7700 | case R_ARM_THM_JUMP8: | |
7701 | case R_ARM_THM_JUMP6: | |
51c5503b NC |
7702 | /* Thumb B (branch) instruction). */ |
7703 | { | |
6cf9e9fe | 7704 | bfd_signed_vma relocation; |
51c5503b NC |
7705 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; |
7706 | bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; | |
51c5503b NC |
7707 | bfd_signed_vma signed_check; |
7708 | ||
c19d1205 ZW |
7709 | /* CZB cannot jump backward. */ |
7710 | if (r_type == R_ARM_THM_JUMP6) | |
7711 | reloc_signed_min = 0; | |
7712 | ||
4e7fd91e | 7713 | if (globals->use_rel) |
6cf9e9fe | 7714 | { |
4e7fd91e PB |
7715 | /* Need to refetch addend. */ |
7716 | addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; | |
7717 | if (addend & ((howto->src_mask + 1) >> 1)) | |
7718 | { | |
7719 | signed_addend = -1; | |
7720 | signed_addend &= ~ howto->src_mask; | |
7721 | signed_addend |= addend; | |
7722 | } | |
7723 | else | |
7724 | signed_addend = addend; | |
7725 | /* The value in the insn has been right shifted. We need to | |
7726 | undo this, so that we can perform the address calculation | |
7727 | in terms of bytes. */ | |
7728 | signed_addend <<= howto->rightshift; | |
6cf9e9fe | 7729 | } |
6cf9e9fe | 7730 | relocation = value + signed_addend; |
51c5503b NC |
7731 | |
7732 | relocation -= (input_section->output_section->vma | |
7733 | + input_section->output_offset | |
7734 | + rel->r_offset); | |
7735 | ||
6cf9e9fe NC |
7736 | relocation >>= howto->rightshift; |
7737 | signed_check = relocation; | |
c19d1205 ZW |
7738 | |
7739 | if (r_type == R_ARM_THM_JUMP6) | |
7740 | relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); | |
7741 | else | |
7742 | relocation &= howto->dst_mask; | |
51c5503b | 7743 | relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); |
cedb70c5 | 7744 | |
51c5503b NC |
7745 | bfd_put_16 (input_bfd, relocation, hit_data); |
7746 | ||
7747 | /* Assumes two's complement. */ | |
7748 | if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) | |
7749 | return bfd_reloc_overflow; | |
7750 | ||
7751 | return bfd_reloc_ok; | |
7752 | } | |
cedb70c5 | 7753 | |
8375c36b PB |
7754 | case R_ARM_ALU_PCREL7_0: |
7755 | case R_ARM_ALU_PCREL15_8: | |
7756 | case R_ARM_ALU_PCREL23_15: | |
7757 | { | |
7758 | bfd_vma insn; | |
7759 | bfd_vma relocation; | |
7760 | ||
7761 | insn = bfd_get_32 (input_bfd, hit_data); | |
4e7fd91e PB |
7762 | if (globals->use_rel) |
7763 | { | |
7764 | /* Extract the addend. */ | |
7765 | addend = (insn & 0xff) << ((insn & 0xf00) >> 7); | |
7766 | signed_addend = addend; | |
7767 | } | |
8375c36b PB |
7768 | relocation = value + signed_addend; |
7769 | ||
7770 | relocation -= (input_section->output_section->vma | |
7771 | + input_section->output_offset | |
7772 | + rel->r_offset); | |
7773 | insn = (insn & ~0xfff) | |
7774 | | ((howto->bitpos << 7) & 0xf00) | |
7775 | | ((relocation >> howto->bitpos) & 0xff); | |
7776 | bfd_put_32 (input_bfd, value, hit_data); | |
7777 | } | |
7778 | return bfd_reloc_ok; | |
7779 | ||
252b5132 RH |
7780 | case R_ARM_GNU_VTINHERIT: |
7781 | case R_ARM_GNU_VTENTRY: | |
7782 | return bfd_reloc_ok; | |
7783 | ||
c19d1205 | 7784 | case R_ARM_GOTOFF32: |
252b5132 RH |
7785 | /* Relocation is relative to the start of the |
7786 | global offset table. */ | |
7787 | ||
7788 | BFD_ASSERT (sgot != NULL); | |
7789 | if (sgot == NULL) | |
7790 | return bfd_reloc_notsupported; | |
9a5aca8c | 7791 | |
cedb70c5 | 7792 | /* If we are addressing a Thumb function, we need to adjust the |
ee29b9fb RE |
7793 | address by one, so that attempts to call the function pointer will |
7794 | correctly interpret it as Thumb code. */ | |
7795 | if (sym_flags == STT_ARM_TFUNC) | |
7796 | value += 1; | |
7797 | ||
252b5132 RH |
7798 | /* Note that sgot->output_offset is not involved in this |
7799 | calculation. We always want the start of .got. If we | |
7800 | define _GLOBAL_OFFSET_TABLE in a different way, as is | |
7801 | permitted by the ABI, we might have to change this | |
9b485d32 | 7802 | calculation. */ |
252b5132 | 7803 | value -= sgot->output_section->vma; |
f21f3fe0 | 7804 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 7805 | contents, rel->r_offset, value, |
00a97672 | 7806 | rel->r_addend); |
252b5132 RH |
7807 | |
7808 | case R_ARM_GOTPC: | |
a7c10850 | 7809 | /* Use global offset table as symbol value. */ |
252b5132 | 7810 | BFD_ASSERT (sgot != NULL); |
f21f3fe0 | 7811 | |
252b5132 RH |
7812 | if (sgot == NULL) |
7813 | return bfd_reloc_notsupported; | |
7814 | ||
0945cdfd | 7815 | *unresolved_reloc_p = FALSE; |
252b5132 | 7816 | value = sgot->output_section->vma; |
f21f3fe0 | 7817 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 7818 | contents, rel->r_offset, value, |
00a97672 | 7819 | rel->r_addend); |
f21f3fe0 | 7820 | |
252b5132 | 7821 | case R_ARM_GOT32: |
eb043451 | 7822 | case R_ARM_GOT_PREL: |
252b5132 | 7823 | /* Relocation is to the entry for this symbol in the |
9b485d32 | 7824 | global offset table. */ |
252b5132 RH |
7825 | if (sgot == NULL) |
7826 | return bfd_reloc_notsupported; | |
f21f3fe0 | 7827 | |
252b5132 RH |
7828 | if (h != NULL) |
7829 | { | |
7830 | bfd_vma off; | |
5e681ec4 | 7831 | bfd_boolean dyn; |
f21f3fe0 | 7832 | |
252b5132 RH |
7833 | off = h->got.offset; |
7834 | BFD_ASSERT (off != (bfd_vma) -1); | |
5e681ec4 | 7835 | dyn = globals->root.dynamic_sections_created; |
f21f3fe0 | 7836 | |
5e681ec4 | 7837 | if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) |
50d6c878 | 7838 | || (info->shared |
5e681ec4 PB |
7839 | && SYMBOL_REFERENCES_LOCAL (info, h)) |
7840 | || (ELF_ST_VISIBILITY (h->other) | |
7841 | && h->root.type == bfd_link_hash_undefweak)) | |
252b5132 RH |
7842 | { |
7843 | /* This is actually a static link, or it is a -Bsymbolic link | |
7844 | and the symbol is defined locally. We must initialize this | |
7845 | entry in the global offset table. Since the offset must | |
7846 | always be a multiple of 4, we use the least significant bit | |
7847 | to record whether we have initialized it already. | |
f21f3fe0 | 7848 | |
00a97672 | 7849 | When doing a dynamic link, we create a .rel(a).got relocation |
f21f3fe0 | 7850 | entry to initialize the value. This is done in the |
9b485d32 | 7851 | finish_dynamic_symbol routine. */ |
252b5132 RH |
7852 | if ((off & 1) != 0) |
7853 | off &= ~1; | |
7854 | else | |
7855 | { | |
ee29b9fb RE |
7856 | /* If we are addressing a Thumb function, we need to |
7857 | adjust the address by one, so that attempts to | |
7858 | call the function pointer will correctly | |
7859 | interpret it as Thumb code. */ | |
7860 | if (sym_flags == STT_ARM_TFUNC) | |
7861 | value |= 1; | |
7862 | ||
252b5132 RH |
7863 | bfd_put_32 (output_bfd, value, sgot->contents + off); |
7864 | h->got.offset |= 1; | |
7865 | } | |
7866 | } | |
0945cdfd DJ |
7867 | else |
7868 | *unresolved_reloc_p = FALSE; | |
f21f3fe0 | 7869 | |
252b5132 RH |
7870 | value = sgot->output_offset + off; |
7871 | } | |
7872 | else | |
7873 | { | |
7874 | bfd_vma off; | |
f21f3fe0 | 7875 | |
252b5132 RH |
7876 | BFD_ASSERT (local_got_offsets != NULL && |
7877 | local_got_offsets[r_symndx] != (bfd_vma) -1); | |
f21f3fe0 | 7878 | |
252b5132 | 7879 | off = local_got_offsets[r_symndx]; |
f21f3fe0 | 7880 | |
252b5132 RH |
7881 | /* The offset must always be a multiple of 4. We use the |
7882 | least significant bit to record whether we have already | |
9b485d32 | 7883 | generated the necessary reloc. */ |
252b5132 RH |
7884 | if ((off & 1) != 0) |
7885 | off &= ~1; | |
7886 | else | |
7887 | { | |
b7693d02 DJ |
7888 | /* If we are addressing a Thumb function, we need to |
7889 | adjust the address by one, so that attempts to | |
7890 | call the function pointer will correctly | |
7891 | interpret it as Thumb code. */ | |
7892 | if (sym_flags == STT_ARM_TFUNC) | |
7893 | value |= 1; | |
7894 | ||
00a97672 RS |
7895 | if (globals->use_rel) |
7896 | bfd_put_32 (output_bfd, value, sgot->contents + off); | |
f21f3fe0 | 7897 | |
252b5132 RH |
7898 | if (info->shared) |
7899 | { | |
7900 | asection * srelgot; | |
947216bf AM |
7901 | Elf_Internal_Rela outrel; |
7902 | bfd_byte *loc; | |
f21f3fe0 | 7903 | |
00a97672 RS |
7904 | srelgot = (bfd_get_section_by_name |
7905 | (dynobj, RELOC_SECTION (globals, ".got"))); | |
252b5132 | 7906 | BFD_ASSERT (srelgot != NULL); |
f21f3fe0 | 7907 | |
00a97672 | 7908 | outrel.r_addend = addend + value; |
252b5132 | 7909 | outrel.r_offset = (sgot->output_section->vma |
f21f3fe0 | 7910 | + sgot->output_offset |
252b5132 RH |
7911 | + off); |
7912 | outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); | |
947216bf | 7913 | loc = srelgot->contents; |
00a97672 RS |
7914 | loc += srelgot->reloc_count++ * RELOC_SIZE (globals); |
7915 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
252b5132 | 7916 | } |
f21f3fe0 | 7917 | |
252b5132 RH |
7918 | local_got_offsets[r_symndx] |= 1; |
7919 | } | |
f21f3fe0 | 7920 | |
252b5132 RH |
7921 | value = sgot->output_offset + off; |
7922 | } | |
eb043451 PB |
7923 | if (r_type != R_ARM_GOT32) |
7924 | value += sgot->output_section->vma; | |
9a5aca8c | 7925 | |
f21f3fe0 | 7926 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
99e4ae17 | 7927 | contents, rel->r_offset, value, |
00a97672 | 7928 | rel->r_addend); |
f21f3fe0 | 7929 | |
ba93b8ac DJ |
7930 | case R_ARM_TLS_LDO32: |
7931 | value = value - dtpoff_base (info); | |
7932 | ||
7933 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
00a97672 RS |
7934 | contents, rel->r_offset, value, |
7935 | rel->r_addend); | |
ba93b8ac DJ |
7936 | |
7937 | case R_ARM_TLS_LDM32: | |
7938 | { | |
7939 | bfd_vma off; | |
7940 | ||
7941 | if (globals->sgot == NULL) | |
7942 | abort (); | |
7943 | ||
7944 | off = globals->tls_ldm_got.offset; | |
7945 | ||
7946 | if ((off & 1) != 0) | |
7947 | off &= ~1; | |
7948 | else | |
7949 | { | |
7950 | /* If we don't know the module number, create a relocation | |
7951 | for it. */ | |
7952 | if (info->shared) | |
7953 | { | |
7954 | Elf_Internal_Rela outrel; | |
7955 | bfd_byte *loc; | |
7956 | ||
7957 | if (globals->srelgot == NULL) | |
7958 | abort (); | |
7959 | ||
00a97672 | 7960 | outrel.r_addend = 0; |
ba93b8ac DJ |
7961 | outrel.r_offset = (globals->sgot->output_section->vma |
7962 | + globals->sgot->output_offset + off); | |
7963 | outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); | |
7964 | ||
00a97672 RS |
7965 | if (globals->use_rel) |
7966 | bfd_put_32 (output_bfd, outrel.r_addend, | |
7967 | globals->sgot->contents + off); | |
ba93b8ac DJ |
7968 | |
7969 | loc = globals->srelgot->contents; | |
00a97672 RS |
7970 | loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals); |
7971 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
ba93b8ac DJ |
7972 | } |
7973 | else | |
7974 | bfd_put_32 (output_bfd, 1, globals->sgot->contents + off); | |
7975 | ||
7976 | globals->tls_ldm_got.offset |= 1; | |
7977 | } | |
7978 | ||
906e58ca | 7979 | value = globals->sgot->output_section->vma + globals->sgot->output_offset + off |
ba93b8ac DJ |
7980 | - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); |
7981 | ||
7982 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
7983 | contents, rel->r_offset, value, | |
00a97672 | 7984 | rel->r_addend); |
ba93b8ac DJ |
7985 | } |
7986 | ||
7987 | case R_ARM_TLS_GD32: | |
7988 | case R_ARM_TLS_IE32: | |
7989 | { | |
7990 | bfd_vma off; | |
7991 | int indx; | |
7992 | char tls_type; | |
7993 | ||
7994 | if (globals->sgot == NULL) | |
7995 | abort (); | |
7996 | ||
7997 | indx = 0; | |
7998 | if (h != NULL) | |
7999 | { | |
8000 | bfd_boolean dyn; | |
8001 | dyn = globals->root.dynamic_sections_created; | |
8002 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) | |
8003 | && (!info->shared | |
8004 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
8005 | { | |
8006 | *unresolved_reloc_p = FALSE; | |
8007 | indx = h->dynindx; | |
8008 | } | |
8009 | off = h->got.offset; | |
8010 | tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; | |
8011 | } | |
8012 | else | |
8013 | { | |
8014 | if (local_got_offsets == NULL) | |
8015 | abort (); | |
8016 | off = local_got_offsets[r_symndx]; | |
8017 | tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; | |
8018 | } | |
8019 | ||
8020 | if (tls_type == GOT_UNKNOWN) | |
8021 | abort (); | |
8022 | ||
8023 | if ((off & 1) != 0) | |
8024 | off &= ~1; | |
8025 | else | |
8026 | { | |
8027 | bfd_boolean need_relocs = FALSE; | |
8028 | Elf_Internal_Rela outrel; | |
8029 | bfd_byte *loc = NULL; | |
8030 | int cur_off = off; | |
8031 | ||
8032 | /* The GOT entries have not been initialized yet. Do it | |
8033 | now, and emit any relocations. If both an IE GOT and a | |
8034 | GD GOT are necessary, we emit the GD first. */ | |
8035 | ||
8036 | if ((info->shared || indx != 0) | |
8037 | && (h == NULL | |
8038 | || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
8039 | || h->root.type != bfd_link_hash_undefweak)) | |
8040 | { | |
8041 | need_relocs = TRUE; | |
8042 | if (globals->srelgot == NULL) | |
8043 | abort (); | |
8044 | loc = globals->srelgot->contents; | |
00a97672 | 8045 | loc += globals->srelgot->reloc_count * RELOC_SIZE (globals); |
ba93b8ac DJ |
8046 | } |
8047 | ||
8048 | if (tls_type & GOT_TLS_GD) | |
8049 | { | |
8050 | if (need_relocs) | |
8051 | { | |
00a97672 | 8052 | outrel.r_addend = 0; |
ba93b8ac | 8053 | outrel.r_offset = (globals->sgot->output_section->vma |
00a97672 RS |
8054 | + globals->sgot->output_offset |
8055 | + cur_off); | |
ba93b8ac | 8056 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); |
ba93b8ac | 8057 | |
00a97672 RS |
8058 | if (globals->use_rel) |
8059 | bfd_put_32 (output_bfd, outrel.r_addend, | |
8060 | globals->sgot->contents + cur_off); | |
8061 | ||
8062 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
ba93b8ac | 8063 | globals->srelgot->reloc_count++; |
00a97672 | 8064 | loc += RELOC_SIZE (globals); |
ba93b8ac DJ |
8065 | |
8066 | if (indx == 0) | |
8067 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
8068 | globals->sgot->contents + cur_off + 4); | |
8069 | else | |
8070 | { | |
00a97672 | 8071 | outrel.r_addend = 0; |
ba93b8ac DJ |
8072 | outrel.r_info = ELF32_R_INFO (indx, |
8073 | R_ARM_TLS_DTPOFF32); | |
8074 | outrel.r_offset += 4; | |
00a97672 RS |
8075 | |
8076 | if (globals->use_rel) | |
8077 | bfd_put_32 (output_bfd, outrel.r_addend, | |
8078 | globals->sgot->contents + cur_off + 4); | |
8079 | ||
8080 | ||
8081 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); | |
ba93b8ac | 8082 | globals->srelgot->reloc_count++; |
00a97672 | 8083 | loc += RELOC_SIZE (globals); |
ba93b8ac DJ |
8084 | } |
8085 | } | |
8086 | else | |
8087 | { | |
8088 | /* If we are not emitting relocations for a | |
8089 | general dynamic reference, then we must be in a | |
8090 | static link or an executable link with the | |
8091 | symbol binding locally. Mark it as belonging | |
8092 | to module 1, the executable. */ | |
8093 | bfd_put_32 (output_bfd, 1, | |
8094 | globals->sgot->contents + cur_off); | |
8095 | bfd_put_32 (output_bfd, value - dtpoff_base (info), | |
8096 | globals->sgot->contents + cur_off + 4); | |
8097 | } | |
8098 | ||
8099 | cur_off += 8; | |
8100 | } | |
8101 | ||
8102 | if (tls_type & GOT_TLS_IE) | |
8103 | { | |
8104 | if (need_relocs) | |
8105 | { | |
00a97672 RS |
8106 | if (indx == 0) |
8107 | outrel.r_addend = value - dtpoff_base (info); | |
8108 | else | |
8109 | outrel.r_addend = 0; | |
ba93b8ac DJ |
8110 | outrel.r_offset = (globals->sgot->output_section->vma |
8111 | + globals->sgot->output_offset | |
8112 | + cur_off); | |
8113 | outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); | |
8114 | ||
00a97672 RS |
8115 | if (globals->use_rel) |
8116 | bfd_put_32 (output_bfd, outrel.r_addend, | |
ba93b8ac DJ |
8117 | globals->sgot->contents + cur_off); |
8118 | ||
00a97672 | 8119 | SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); |
ba93b8ac | 8120 | globals->srelgot->reloc_count++; |
00a97672 | 8121 | loc += RELOC_SIZE (globals); |
ba93b8ac DJ |
8122 | } |
8123 | else | |
8124 | bfd_put_32 (output_bfd, tpoff (info, value), | |
8125 | globals->sgot->contents + cur_off); | |
8126 | cur_off += 4; | |
8127 | } | |
8128 | ||
8129 | if (h != NULL) | |
8130 | h->got.offset |= 1; | |
8131 | else | |
8132 | local_got_offsets[r_symndx] |= 1; | |
8133 | } | |
8134 | ||
8135 | if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32) | |
8136 | off += 8; | |
906e58ca | 8137 | value = globals->sgot->output_section->vma + globals->sgot->output_offset + off |
ba93b8ac DJ |
8138 | - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); |
8139 | ||
8140 | return _bfd_final_link_relocate (howto, input_bfd, input_section, | |
8141 | contents, rel->r_offset, value, | |
00a97672 | 8142 | rel->r_addend); |
ba93b8ac DJ |
8143 | } |
8144 | ||
8145 | case R_ARM_TLS_LE32: | |
8146 | if (info->shared) | |
8147 | { | |
8148 | (*_bfd_error_handler) | |
8149 | (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), | |
8150 | input_bfd, input_section, | |
8151 | (long) rel->r_offset, howto->name); | |
21d799b5 | 8152 | return (bfd_reloc_status_type) FALSE; |
ba93b8ac DJ |
8153 | } |
8154 | else | |
8155 | value = tpoff (info, value); | |
906e58ca | 8156 | |
ba93b8ac | 8157 | return _bfd_final_link_relocate (howto, input_bfd, input_section, |
00a97672 RS |
8158 | contents, rel->r_offset, value, |
8159 | rel->r_addend); | |
ba93b8ac | 8160 | |
319850b4 JB |
8161 | case R_ARM_V4BX: |
8162 | if (globals->fix_v4bx) | |
845b51d6 PB |
8163 | { |
8164 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
319850b4 | 8165 | |
845b51d6 PB |
8166 | /* Ensure that we have a BX instruction. */ |
8167 | BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); | |
319850b4 | 8168 | |
845b51d6 PB |
8169 | if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) |
8170 | { | |
8171 | /* Branch to veneer. */ | |
8172 | bfd_vma glue_addr; | |
8173 | glue_addr = elf32_arm_bx_glue (info, insn & 0xf); | |
8174 | glue_addr -= input_section->output_section->vma | |
8175 | + input_section->output_offset | |
8176 | + rel->r_offset + 8; | |
8177 | insn = (insn & 0xf0000000) | 0x0a000000 | |
8178 | | ((glue_addr >> 2) & 0x00ffffff); | |
8179 | } | |
8180 | else | |
8181 | { | |
8182 | /* Preserve Rm (lowest four bits) and the condition code | |
8183 | (highest four bits). Other bits encode MOV PC,Rm. */ | |
8184 | insn = (insn & 0xf000000f) | 0x01a0f000; | |
8185 | } | |
319850b4 | 8186 | |
845b51d6 PB |
8187 | bfd_put_32 (input_bfd, insn, hit_data); |
8188 | } | |
319850b4 JB |
8189 | return bfd_reloc_ok; |
8190 | ||
b6895b4f PB |
8191 | case R_ARM_MOVW_ABS_NC: |
8192 | case R_ARM_MOVT_ABS: | |
8193 | case R_ARM_MOVW_PREL_NC: | |
8194 | case R_ARM_MOVT_PREL: | |
92f5d02b MS |
8195 | /* Until we properly support segment-base-relative addressing then |
8196 | we assume the segment base to be zero, as for the group relocations. | |
8197 | Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC | |
8198 | and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ | |
8199 | case R_ARM_MOVW_BREL_NC: | |
8200 | case R_ARM_MOVW_BREL: | |
8201 | case R_ARM_MOVT_BREL: | |
b6895b4f PB |
8202 | { |
8203 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
8204 | ||
8205 | if (globals->use_rel) | |
8206 | { | |
8207 | addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); | |
39623e12 | 8208 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 8209 | } |
92f5d02b | 8210 | |
b6895b4f | 8211 | value += signed_addend; |
b6895b4f PB |
8212 | |
8213 | if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) | |
8214 | value -= (input_section->output_section->vma | |
8215 | + input_section->output_offset + rel->r_offset); | |
8216 | ||
92f5d02b MS |
8217 | if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) |
8218 | return bfd_reloc_overflow; | |
8219 | ||
8220 | if (sym_flags == STT_ARM_TFUNC) | |
8221 | value |= 1; | |
8222 | ||
8223 | if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL | |
8224 | || r_type == R_ARM_MOVT_BREL) | |
b6895b4f PB |
8225 | value >>= 16; |
8226 | ||
8227 | insn &= 0xfff0f000; | |
8228 | insn |= value & 0xfff; | |
8229 | insn |= (value & 0xf000) << 4; | |
8230 | bfd_put_32 (input_bfd, insn, hit_data); | |
8231 | } | |
8232 | return bfd_reloc_ok; | |
8233 | ||
8234 | case R_ARM_THM_MOVW_ABS_NC: | |
8235 | case R_ARM_THM_MOVT_ABS: | |
8236 | case R_ARM_THM_MOVW_PREL_NC: | |
8237 | case R_ARM_THM_MOVT_PREL: | |
92f5d02b MS |
8238 | /* Until we properly support segment-base-relative addressing then |
8239 | we assume the segment base to be zero, as for the above relocations. | |
8240 | Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as | |
8241 | R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics | |
8242 | as R_ARM_THM_MOVT_ABS. */ | |
8243 | case R_ARM_THM_MOVW_BREL_NC: | |
8244 | case R_ARM_THM_MOVW_BREL: | |
8245 | case R_ARM_THM_MOVT_BREL: | |
b6895b4f PB |
8246 | { |
8247 | bfd_vma insn; | |
906e58ca | 8248 | |
b6895b4f PB |
8249 | insn = bfd_get_16 (input_bfd, hit_data) << 16; |
8250 | insn |= bfd_get_16 (input_bfd, hit_data + 2); | |
8251 | ||
8252 | if (globals->use_rel) | |
8253 | { | |
8254 | addend = ((insn >> 4) & 0xf000) | |
8255 | | ((insn >> 15) & 0x0800) | |
8256 | | ((insn >> 4) & 0x0700) | |
8257 | | (insn & 0x00ff); | |
39623e12 | 8258 | signed_addend = (addend ^ 0x8000) - 0x8000; |
b6895b4f | 8259 | } |
92f5d02b | 8260 | |
b6895b4f | 8261 | value += signed_addend; |
b6895b4f PB |
8262 | |
8263 | if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) | |
8264 | value -= (input_section->output_section->vma | |
8265 | + input_section->output_offset + rel->r_offset); | |
8266 | ||
92f5d02b MS |
8267 | if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) |
8268 | return bfd_reloc_overflow; | |
8269 | ||
8270 | if (sym_flags == STT_ARM_TFUNC) | |
8271 | value |= 1; | |
8272 | ||
8273 | if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL | |
8274 | || r_type == R_ARM_THM_MOVT_BREL) | |
b6895b4f PB |
8275 | value >>= 16; |
8276 | ||
8277 | insn &= 0xfbf08f00; | |
8278 | insn |= (value & 0xf000) << 4; | |
8279 | insn |= (value & 0x0800) << 15; | |
8280 | insn |= (value & 0x0700) << 4; | |
8281 | insn |= (value & 0x00ff); | |
8282 | ||
8283 | bfd_put_16 (input_bfd, insn >> 16, hit_data); | |
8284 | bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); | |
8285 | } | |
8286 | return bfd_reloc_ok; | |
8287 | ||
4962c51a MS |
8288 | case R_ARM_ALU_PC_G0_NC: |
8289 | case R_ARM_ALU_PC_G1_NC: | |
8290 | case R_ARM_ALU_PC_G0: | |
8291 | case R_ARM_ALU_PC_G1: | |
8292 | case R_ARM_ALU_PC_G2: | |
8293 | case R_ARM_ALU_SB_G0_NC: | |
8294 | case R_ARM_ALU_SB_G1_NC: | |
8295 | case R_ARM_ALU_SB_G0: | |
8296 | case R_ARM_ALU_SB_G1: | |
8297 | case R_ARM_ALU_SB_G2: | |
8298 | { | |
8299 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
8300 | bfd_vma pc = input_section->output_section->vma | |
8301 | + input_section->output_offset + rel->r_offset; | |
8302 | /* sb should be the origin of the *segment* containing the symbol. | |
8303 | It is not clear how to obtain this OS-dependent value, so we | |
8304 | make an arbitrary choice of zero. */ | |
8305 | bfd_vma sb = 0; | |
8306 | bfd_vma residual; | |
8307 | bfd_vma g_n; | |
8308 | bfd_signed_vma signed_value; | |
8309 | int group = 0; | |
8310 | ||
8311 | /* Determine which group of bits to select. */ | |
8312 | switch (r_type) | |
8313 | { | |
8314 | case R_ARM_ALU_PC_G0_NC: | |
8315 | case R_ARM_ALU_PC_G0: | |
8316 | case R_ARM_ALU_SB_G0_NC: | |
8317 | case R_ARM_ALU_SB_G0: | |
8318 | group = 0; | |
8319 | break; | |
8320 | ||
8321 | case R_ARM_ALU_PC_G1_NC: | |
8322 | case R_ARM_ALU_PC_G1: | |
8323 | case R_ARM_ALU_SB_G1_NC: | |
8324 | case R_ARM_ALU_SB_G1: | |
8325 | group = 1; | |
8326 | break; | |
8327 | ||
8328 | case R_ARM_ALU_PC_G2: | |
8329 | case R_ARM_ALU_SB_G2: | |
8330 | group = 2; | |
8331 | break; | |
8332 | ||
8333 | default: | |
906e58ca | 8334 | abort (); |
4962c51a MS |
8335 | } |
8336 | ||
8337 | /* If REL, extract the addend from the insn. If RELA, it will | |
8338 | have already been fetched for us. */ | |
8339 | if (globals->use_rel) | |
8340 | { | |
8341 | int negative; | |
8342 | bfd_vma constant = insn & 0xff; | |
8343 | bfd_vma rotation = (insn & 0xf00) >> 8; | |
8344 | ||
8345 | if (rotation == 0) | |
8346 | signed_addend = constant; | |
8347 | else | |
8348 | { | |
8349 | /* Compensate for the fact that in the instruction, the | |
8350 | rotation is stored in multiples of 2 bits. */ | |
8351 | rotation *= 2; | |
8352 | ||
8353 | /* Rotate "constant" right by "rotation" bits. */ | |
8354 | signed_addend = (constant >> rotation) | | |
8355 | (constant << (8 * sizeof (bfd_vma) - rotation)); | |
8356 | } | |
8357 | ||
8358 | /* Determine if the instruction is an ADD or a SUB. | |
8359 | (For REL, this determines the sign of the addend.) */ | |
8360 | negative = identify_add_or_sub (insn); | |
8361 | if (negative == 0) | |
8362 | { | |
8363 | (*_bfd_error_handler) | |
8364 | (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"), | |
8365 | input_bfd, input_section, | |
8366 | (long) rel->r_offset, howto->name); | |
906e58ca | 8367 | return bfd_reloc_overflow; |
4962c51a MS |
8368 | } |
8369 | ||
8370 | signed_addend *= negative; | |
8371 | } | |
8372 | ||
8373 | /* Compute the value (X) to go in the place. */ | |
8374 | if (r_type == R_ARM_ALU_PC_G0_NC | |
8375 | || r_type == R_ARM_ALU_PC_G1_NC | |
8376 | || r_type == R_ARM_ALU_PC_G0 | |
8377 | || r_type == R_ARM_ALU_PC_G1 | |
8378 | || r_type == R_ARM_ALU_PC_G2) | |
8379 | /* PC relative. */ | |
8380 | signed_value = value - pc + signed_addend; | |
8381 | else | |
8382 | /* Section base relative. */ | |
8383 | signed_value = value - sb + signed_addend; | |
8384 | ||
8385 | /* If the target symbol is a Thumb function, then set the | |
8386 | Thumb bit in the address. */ | |
8387 | if (sym_flags == STT_ARM_TFUNC) | |
8388 | signed_value |= 1; | |
8389 | ||
8390 | /* Calculate the value of the relevant G_n, in encoded | |
8391 | constant-with-rotation format. */ | |
8392 | g_n = calculate_group_reloc_mask (abs (signed_value), group, | |
8393 | &residual); | |
8394 | ||
8395 | /* Check for overflow if required. */ | |
8396 | if ((r_type == R_ARM_ALU_PC_G0 | |
8397 | || r_type == R_ARM_ALU_PC_G1 | |
8398 | || r_type == R_ARM_ALU_PC_G2 | |
8399 | || r_type == R_ARM_ALU_SB_G0 | |
8400 | || r_type == R_ARM_ALU_SB_G1 | |
8401 | || r_type == R_ARM_ALU_SB_G2) && residual != 0) | |
8402 | { | |
8403 | (*_bfd_error_handler) | |
8404 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
8405 | input_bfd, input_section, | |
8406 | (long) rel->r_offset, abs (signed_value), howto->name); | |
8407 | return bfd_reloc_overflow; | |
8408 | } | |
8409 | ||
8410 | /* Mask out the value and the ADD/SUB part of the opcode; take care | |
8411 | not to destroy the S bit. */ | |
8412 | insn &= 0xff1ff000; | |
8413 | ||
8414 | /* Set the opcode according to whether the value to go in the | |
8415 | place is negative. */ | |
8416 | if (signed_value < 0) | |
8417 | insn |= 1 << 22; | |
8418 | else | |
8419 | insn |= 1 << 23; | |
8420 | ||
8421 | /* Encode the offset. */ | |
8422 | insn |= g_n; | |
8423 | ||
8424 | bfd_put_32 (input_bfd, insn, hit_data); | |
8425 | } | |
8426 | return bfd_reloc_ok; | |
8427 | ||
8428 | case R_ARM_LDR_PC_G0: | |
8429 | case R_ARM_LDR_PC_G1: | |
8430 | case R_ARM_LDR_PC_G2: | |
8431 | case R_ARM_LDR_SB_G0: | |
8432 | case R_ARM_LDR_SB_G1: | |
8433 | case R_ARM_LDR_SB_G2: | |
8434 | { | |
8435 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
8436 | bfd_vma pc = input_section->output_section->vma | |
8437 | + input_section->output_offset + rel->r_offset; | |
8438 | bfd_vma sb = 0; /* See note above. */ | |
8439 | bfd_vma residual; | |
8440 | bfd_signed_vma signed_value; | |
8441 | int group = 0; | |
8442 | ||
8443 | /* Determine which groups of bits to calculate. */ | |
8444 | switch (r_type) | |
8445 | { | |
8446 | case R_ARM_LDR_PC_G0: | |
8447 | case R_ARM_LDR_SB_G0: | |
8448 | group = 0; | |
8449 | break; | |
8450 | ||
8451 | case R_ARM_LDR_PC_G1: | |
8452 | case R_ARM_LDR_SB_G1: | |
8453 | group = 1; | |
8454 | break; | |
8455 | ||
8456 | case R_ARM_LDR_PC_G2: | |
8457 | case R_ARM_LDR_SB_G2: | |
8458 | group = 2; | |
8459 | break; | |
8460 | ||
8461 | default: | |
906e58ca | 8462 | abort (); |
4962c51a MS |
8463 | } |
8464 | ||
8465 | /* If REL, extract the addend from the insn. If RELA, it will | |
8466 | have already been fetched for us. */ | |
8467 | if (globals->use_rel) | |
8468 | { | |
8469 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
8470 | signed_addend = negative * (insn & 0xfff); | |
8471 | } | |
8472 | ||
8473 | /* Compute the value (X) to go in the place. */ | |
8474 | if (r_type == R_ARM_LDR_PC_G0 | |
8475 | || r_type == R_ARM_LDR_PC_G1 | |
8476 | || r_type == R_ARM_LDR_PC_G2) | |
8477 | /* PC relative. */ | |
8478 | signed_value = value - pc + signed_addend; | |
8479 | else | |
8480 | /* Section base relative. */ | |
8481 | signed_value = value - sb + signed_addend; | |
8482 | ||
8483 | /* Calculate the value of the relevant G_{n-1} to obtain | |
8484 | the residual at that stage. */ | |
8485 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
8486 | ||
8487 | /* Check for overflow. */ | |
8488 | if (residual >= 0x1000) | |
8489 | { | |
8490 | (*_bfd_error_handler) | |
8491 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
8492 | input_bfd, input_section, | |
8493 | (long) rel->r_offset, abs (signed_value), howto->name); | |
8494 | return bfd_reloc_overflow; | |
8495 | } | |
8496 | ||
8497 | /* Mask out the value and U bit. */ | |
8498 | insn &= 0xff7ff000; | |
8499 | ||
8500 | /* Set the U bit if the value to go in the place is non-negative. */ | |
8501 | if (signed_value >= 0) | |
8502 | insn |= 1 << 23; | |
8503 | ||
8504 | /* Encode the offset. */ | |
8505 | insn |= residual; | |
8506 | ||
8507 | bfd_put_32 (input_bfd, insn, hit_data); | |
8508 | } | |
8509 | return bfd_reloc_ok; | |
8510 | ||
8511 | case R_ARM_LDRS_PC_G0: | |
8512 | case R_ARM_LDRS_PC_G1: | |
8513 | case R_ARM_LDRS_PC_G2: | |
8514 | case R_ARM_LDRS_SB_G0: | |
8515 | case R_ARM_LDRS_SB_G1: | |
8516 | case R_ARM_LDRS_SB_G2: | |
8517 | { | |
8518 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
8519 | bfd_vma pc = input_section->output_section->vma | |
8520 | + input_section->output_offset + rel->r_offset; | |
8521 | bfd_vma sb = 0; /* See note above. */ | |
8522 | bfd_vma residual; | |
8523 | bfd_signed_vma signed_value; | |
8524 | int group = 0; | |
8525 | ||
8526 | /* Determine which groups of bits to calculate. */ | |
8527 | switch (r_type) | |
8528 | { | |
8529 | case R_ARM_LDRS_PC_G0: | |
8530 | case R_ARM_LDRS_SB_G0: | |
8531 | group = 0; | |
8532 | break; | |
8533 | ||
8534 | case R_ARM_LDRS_PC_G1: | |
8535 | case R_ARM_LDRS_SB_G1: | |
8536 | group = 1; | |
8537 | break; | |
8538 | ||
8539 | case R_ARM_LDRS_PC_G2: | |
8540 | case R_ARM_LDRS_SB_G2: | |
8541 | group = 2; | |
8542 | break; | |
8543 | ||
8544 | default: | |
906e58ca | 8545 | abort (); |
4962c51a MS |
8546 | } |
8547 | ||
8548 | /* If REL, extract the addend from the insn. If RELA, it will | |
8549 | have already been fetched for us. */ | |
8550 | if (globals->use_rel) | |
8551 | { | |
8552 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
8553 | signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); | |
8554 | } | |
8555 | ||
8556 | /* Compute the value (X) to go in the place. */ | |
8557 | if (r_type == R_ARM_LDRS_PC_G0 | |
8558 | || r_type == R_ARM_LDRS_PC_G1 | |
8559 | || r_type == R_ARM_LDRS_PC_G2) | |
8560 | /* PC relative. */ | |
8561 | signed_value = value - pc + signed_addend; | |
8562 | else | |
8563 | /* Section base relative. */ | |
8564 | signed_value = value - sb + signed_addend; | |
8565 | ||
8566 | /* Calculate the value of the relevant G_{n-1} to obtain | |
8567 | the residual at that stage. */ | |
8568 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
8569 | ||
8570 | /* Check for overflow. */ | |
8571 | if (residual >= 0x100) | |
8572 | { | |
8573 | (*_bfd_error_handler) | |
8574 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
8575 | input_bfd, input_section, | |
8576 | (long) rel->r_offset, abs (signed_value), howto->name); | |
8577 | return bfd_reloc_overflow; | |
8578 | } | |
8579 | ||
8580 | /* Mask out the value and U bit. */ | |
8581 | insn &= 0xff7ff0f0; | |
8582 | ||
8583 | /* Set the U bit if the value to go in the place is non-negative. */ | |
8584 | if (signed_value >= 0) | |
8585 | insn |= 1 << 23; | |
8586 | ||
8587 | /* Encode the offset. */ | |
8588 | insn |= ((residual & 0xf0) << 4) | (residual & 0xf); | |
8589 | ||
8590 | bfd_put_32 (input_bfd, insn, hit_data); | |
8591 | } | |
8592 | return bfd_reloc_ok; | |
8593 | ||
8594 | case R_ARM_LDC_PC_G0: | |
8595 | case R_ARM_LDC_PC_G1: | |
8596 | case R_ARM_LDC_PC_G2: | |
8597 | case R_ARM_LDC_SB_G0: | |
8598 | case R_ARM_LDC_SB_G1: | |
8599 | case R_ARM_LDC_SB_G2: | |
8600 | { | |
8601 | bfd_vma insn = bfd_get_32 (input_bfd, hit_data); | |
8602 | bfd_vma pc = input_section->output_section->vma | |
8603 | + input_section->output_offset + rel->r_offset; | |
8604 | bfd_vma sb = 0; /* See note above. */ | |
8605 | bfd_vma residual; | |
8606 | bfd_signed_vma signed_value; | |
8607 | int group = 0; | |
8608 | ||
8609 | /* Determine which groups of bits to calculate. */ | |
8610 | switch (r_type) | |
8611 | { | |
8612 | case R_ARM_LDC_PC_G0: | |
8613 | case R_ARM_LDC_SB_G0: | |
8614 | group = 0; | |
8615 | break; | |
8616 | ||
8617 | case R_ARM_LDC_PC_G1: | |
8618 | case R_ARM_LDC_SB_G1: | |
8619 | group = 1; | |
8620 | break; | |
8621 | ||
8622 | case R_ARM_LDC_PC_G2: | |
8623 | case R_ARM_LDC_SB_G2: | |
8624 | group = 2; | |
8625 | break; | |
8626 | ||
8627 | default: | |
906e58ca | 8628 | abort (); |
4962c51a MS |
8629 | } |
8630 | ||
8631 | /* If REL, extract the addend from the insn. If RELA, it will | |
8632 | have already been fetched for us. */ | |
8633 | if (globals->use_rel) | |
8634 | { | |
8635 | int negative = (insn & (1 << 23)) ? 1 : -1; | |
8636 | signed_addend = negative * ((insn & 0xff) << 2); | |
8637 | } | |
8638 | ||
8639 | /* Compute the value (X) to go in the place. */ | |
8640 | if (r_type == R_ARM_LDC_PC_G0 | |
8641 | || r_type == R_ARM_LDC_PC_G1 | |
8642 | || r_type == R_ARM_LDC_PC_G2) | |
8643 | /* PC relative. */ | |
8644 | signed_value = value - pc + signed_addend; | |
8645 | else | |
8646 | /* Section base relative. */ | |
8647 | signed_value = value - sb + signed_addend; | |
8648 | ||
8649 | /* Calculate the value of the relevant G_{n-1} to obtain | |
8650 | the residual at that stage. */ | |
8651 | calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); | |
8652 | ||
8653 | /* Check for overflow. (The absolute value to go in the place must be | |
8654 | divisible by four and, after having been divided by four, must | |
8655 | fit in eight bits.) */ | |
8656 | if ((residual & 0x3) != 0 || residual >= 0x400) | |
8657 | { | |
8658 | (*_bfd_error_handler) | |
8659 | (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), | |
8660 | input_bfd, input_section, | |
8661 | (long) rel->r_offset, abs (signed_value), howto->name); | |
8662 | return bfd_reloc_overflow; | |
8663 | } | |
8664 | ||
8665 | /* Mask out the value and U bit. */ | |
8666 | insn &= 0xff7fff00; | |
8667 | ||
8668 | /* Set the U bit if the value to go in the place is non-negative. */ | |
8669 | if (signed_value >= 0) | |
8670 | insn |= 1 << 23; | |
8671 | ||
8672 | /* Encode the offset. */ | |
8673 | insn |= residual >> 2; | |
8674 | ||
8675 | bfd_put_32 (input_bfd, insn, hit_data); | |
8676 | } | |
8677 | return bfd_reloc_ok; | |
8678 | ||
252b5132 RH |
8679 | default: |
8680 | return bfd_reloc_notsupported; | |
8681 | } | |
8682 | } | |
8683 | ||
98c1d4aa NC |
8684 | /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ |
8685 | static void | |
57e8b36a NC |
8686 | arm_add_to_rel (bfd * abfd, |
8687 | bfd_byte * address, | |
8688 | reloc_howto_type * howto, | |
8689 | bfd_signed_vma increment) | |
98c1d4aa | 8690 | { |
98c1d4aa NC |
8691 | bfd_signed_vma addend; |
8692 | ||
bd97cb95 DJ |
8693 | if (howto->type == R_ARM_THM_CALL |
8694 | || howto->type == R_ARM_THM_JUMP24) | |
98c1d4aa | 8695 | { |
9a5aca8c AM |
8696 | int upper_insn, lower_insn; |
8697 | int upper, lower; | |
98c1d4aa | 8698 | |
9a5aca8c AM |
8699 | upper_insn = bfd_get_16 (abfd, address); |
8700 | lower_insn = bfd_get_16 (abfd, address + 2); | |
8701 | upper = upper_insn & 0x7ff; | |
8702 | lower = lower_insn & 0x7ff; | |
8703 | ||
8704 | addend = (upper << 12) | (lower << 1); | |
ddda4409 | 8705 | addend += increment; |
9a5aca8c | 8706 | addend >>= 1; |
98c1d4aa | 8707 | |
9a5aca8c AM |
8708 | upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); |
8709 | lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); | |
8710 | ||
dc810e39 AM |
8711 | bfd_put_16 (abfd, (bfd_vma) upper_insn, address); |
8712 | bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); | |
9a5aca8c AM |
8713 | } |
8714 | else | |
8715 | { | |
8716 | bfd_vma contents; | |
8717 | ||
8718 | contents = bfd_get_32 (abfd, address); | |
8719 | ||
8720 | /* Get the (signed) value from the instruction. */ | |
8721 | addend = contents & howto->src_mask; | |
8722 | if (addend & ((howto->src_mask + 1) >> 1)) | |
8723 | { | |
8724 | bfd_signed_vma mask; | |
8725 | ||
8726 | mask = -1; | |
8727 | mask &= ~ howto->src_mask; | |
8728 | addend |= mask; | |
8729 | } | |
8730 | ||
8731 | /* Add in the increment, (which is a byte value). */ | |
8732 | switch (howto->type) | |
8733 | { | |
8734 | default: | |
8735 | addend += increment; | |
8736 | break; | |
8737 | ||
8738 | case R_ARM_PC24: | |
c6596c5e | 8739 | case R_ARM_PLT32: |
5b5bb741 PB |
8740 | case R_ARM_CALL: |
8741 | case R_ARM_JUMP24: | |
9a5aca8c | 8742 | addend <<= howto->size; |
dc810e39 | 8743 | addend += increment; |
9a5aca8c AM |
8744 | |
8745 | /* Should we check for overflow here ? */ | |
8746 | ||
8747 | /* Drop any undesired bits. */ | |
8748 | addend >>= howto->rightshift; | |
8749 | break; | |
8750 | } | |
8751 | ||
8752 | contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); | |
8753 | ||
8754 | bfd_put_32 (abfd, contents, address); | |
ddda4409 | 8755 | } |
98c1d4aa | 8756 | } |
252b5132 | 8757 | |
ba93b8ac DJ |
8758 | #define IS_ARM_TLS_RELOC(R_TYPE) \ |
8759 | ((R_TYPE) == R_ARM_TLS_GD32 \ | |
8760 | || (R_TYPE) == R_ARM_TLS_LDO32 \ | |
8761 | || (R_TYPE) == R_ARM_TLS_LDM32 \ | |
8762 | || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ | |
8763 | || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ | |
8764 | || (R_TYPE) == R_ARM_TLS_TPOFF32 \ | |
8765 | || (R_TYPE) == R_ARM_TLS_LE32 \ | |
8766 | || (R_TYPE) == R_ARM_TLS_IE32) | |
8767 | ||
252b5132 | 8768 | /* Relocate an ARM ELF section. */ |
906e58ca | 8769 | |
b34976b6 | 8770 | static bfd_boolean |
57e8b36a NC |
8771 | elf32_arm_relocate_section (bfd * output_bfd, |
8772 | struct bfd_link_info * info, | |
8773 | bfd * input_bfd, | |
8774 | asection * input_section, | |
8775 | bfd_byte * contents, | |
8776 | Elf_Internal_Rela * relocs, | |
8777 | Elf_Internal_Sym * local_syms, | |
8778 | asection ** local_sections) | |
252b5132 | 8779 | { |
b34976b6 AM |
8780 | Elf_Internal_Shdr *symtab_hdr; |
8781 | struct elf_link_hash_entry **sym_hashes; | |
8782 | Elf_Internal_Rela *rel; | |
8783 | Elf_Internal_Rela *relend; | |
8784 | const char *name; | |
b32d3aa2 | 8785 | struct elf32_arm_link_hash_table * globals; |
252b5132 | 8786 | |
4e7fd91e | 8787 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
8788 | if (globals == NULL) |
8789 | return FALSE; | |
b491616a | 8790 | |
0ffa91dd | 8791 | symtab_hdr = & elf_symtab_hdr (input_bfd); |
252b5132 RH |
8792 | sym_hashes = elf_sym_hashes (input_bfd); |
8793 | ||
8794 | rel = relocs; | |
8795 | relend = relocs + input_section->reloc_count; | |
8796 | for (; rel < relend; rel++) | |
8797 | { | |
ba96a88f NC |
8798 | int r_type; |
8799 | reloc_howto_type * howto; | |
8800 | unsigned long r_symndx; | |
8801 | Elf_Internal_Sym * sym; | |
8802 | asection * sec; | |
252b5132 | 8803 | struct elf_link_hash_entry * h; |
ba96a88f NC |
8804 | bfd_vma relocation; |
8805 | bfd_reloc_status_type r; | |
8806 | arelent bfd_reloc; | |
ba93b8ac | 8807 | char sym_type; |
0945cdfd | 8808 | bfd_boolean unresolved_reloc = FALSE; |
f2a9dd69 | 8809 | char *error_message = NULL; |
f21f3fe0 | 8810 | |
252b5132 | 8811 | r_symndx = ELF32_R_SYM (rel->r_info); |
ba96a88f | 8812 | r_type = ELF32_R_TYPE (rel->r_info); |
b32d3aa2 | 8813 | r_type = arm_real_reloc_type (globals, r_type); |
252b5132 | 8814 | |
ba96a88f NC |
8815 | if ( r_type == R_ARM_GNU_VTENTRY |
8816 | || r_type == R_ARM_GNU_VTINHERIT) | |
252b5132 RH |
8817 | continue; |
8818 | ||
b32d3aa2 | 8819 | bfd_reloc.howto = elf32_arm_howto_from_type (r_type); |
ba96a88f | 8820 | howto = bfd_reloc.howto; |
252b5132 | 8821 | |
252b5132 RH |
8822 | h = NULL; |
8823 | sym = NULL; | |
8824 | sec = NULL; | |
9b485d32 | 8825 | |
252b5132 RH |
8826 | if (r_symndx < symtab_hdr->sh_info) |
8827 | { | |
8828 | sym = local_syms + r_symndx; | |
ba93b8ac | 8829 | sym_type = ELF32_ST_TYPE (sym->st_info); |
252b5132 | 8830 | sec = local_sections[r_symndx]; |
ffcb4889 NS |
8831 | |
8832 | /* An object file might have a reference to a local | |
8833 | undefined symbol. This is a daft object file, but we | |
8834 | should at least do something about it. V4BX & NONE | |
8835 | relocations do not use the symbol and are explicitly | |
8836 | allowed to use the undefined symbol, so allow those. */ | |
8837 | if (r_type != R_ARM_V4BX | |
8838 | && r_type != R_ARM_NONE | |
8839 | && bfd_is_und_section (sec) | |
8840 | && ELF_ST_BIND (sym->st_info) != STB_WEAK) | |
8841 | { | |
8842 | if (!info->callbacks->undefined_symbol | |
8843 | (info, bfd_elf_string_from_elf_section | |
8844 | (input_bfd, symtab_hdr->sh_link, sym->st_name), | |
8845 | input_bfd, input_section, | |
8846 | rel->r_offset, TRUE)) | |
8847 | return FALSE; | |
8848 | } | |
8849 | ||
4e7fd91e | 8850 | if (globals->use_rel) |
f8df10f4 | 8851 | { |
4e7fd91e PB |
8852 | relocation = (sec->output_section->vma |
8853 | + sec->output_offset | |
8854 | + sym->st_value); | |
ab96bf03 AM |
8855 | if (!info->relocatable |
8856 | && (sec->flags & SEC_MERGE) | |
8857 | && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
f8df10f4 | 8858 | { |
4e7fd91e PB |
8859 | asection *msec; |
8860 | bfd_vma addend, value; | |
8861 | ||
39623e12 | 8862 | switch (r_type) |
4e7fd91e | 8863 | { |
39623e12 PB |
8864 | case R_ARM_MOVW_ABS_NC: |
8865 | case R_ARM_MOVT_ABS: | |
8866 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
8867 | addend = ((value & 0xf0000) >> 4) | (value & 0xfff); | |
8868 | addend = (addend ^ 0x8000) - 0x8000; | |
8869 | break; | |
f8df10f4 | 8870 | |
39623e12 PB |
8871 | case R_ARM_THM_MOVW_ABS_NC: |
8872 | case R_ARM_THM_MOVT_ABS: | |
8873 | value = bfd_get_16 (input_bfd, contents + rel->r_offset) | |
8874 | << 16; | |
8875 | value |= bfd_get_16 (input_bfd, | |
8876 | contents + rel->r_offset + 2); | |
8877 | addend = ((value & 0xf7000) >> 4) | (value & 0xff) | |
8878 | | ((value & 0x04000000) >> 15); | |
8879 | addend = (addend ^ 0x8000) - 0x8000; | |
8880 | break; | |
f8df10f4 | 8881 | |
39623e12 PB |
8882 | default: |
8883 | if (howto->rightshift | |
8884 | || (howto->src_mask & (howto->src_mask + 1))) | |
8885 | { | |
8886 | (*_bfd_error_handler) | |
8887 | (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"), | |
8888 | input_bfd, input_section, | |
8889 | (long) rel->r_offset, howto->name); | |
8890 | return FALSE; | |
8891 | } | |
8892 | ||
8893 | value = bfd_get_32 (input_bfd, contents + rel->r_offset); | |
8894 | ||
8895 | /* Get the (signed) value from the instruction. */ | |
8896 | addend = value & howto->src_mask; | |
8897 | if (addend & ((howto->src_mask + 1) >> 1)) | |
8898 | { | |
8899 | bfd_signed_vma mask; | |
8900 | ||
8901 | mask = -1; | |
8902 | mask &= ~ howto->src_mask; | |
8903 | addend |= mask; | |
8904 | } | |
8905 | break; | |
4e7fd91e | 8906 | } |
39623e12 | 8907 | |
4e7fd91e PB |
8908 | msec = sec; |
8909 | addend = | |
8910 | _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) | |
8911 | - relocation; | |
8912 | addend += msec->output_section->vma + msec->output_offset; | |
39623e12 PB |
8913 | |
8914 | /* Cases here must match those in the preceeding | |
8915 | switch statement. */ | |
8916 | switch (r_type) | |
8917 | { | |
8918 | case R_ARM_MOVW_ABS_NC: | |
8919 | case R_ARM_MOVT_ABS: | |
8920 | value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) | |
8921 | | (addend & 0xfff); | |
8922 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
8923 | break; | |
8924 | ||
8925 | case R_ARM_THM_MOVW_ABS_NC: | |
8926 | case R_ARM_THM_MOVT_ABS: | |
8927 | value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) | |
8928 | | (addend & 0xff) | ((addend & 0x0800) << 15); | |
8929 | bfd_put_16 (input_bfd, value >> 16, | |
8930 | contents + rel->r_offset); | |
8931 | bfd_put_16 (input_bfd, value, | |
8932 | contents + rel->r_offset + 2); | |
8933 | break; | |
8934 | ||
8935 | default: | |
8936 | value = (value & ~ howto->dst_mask) | |
8937 | | (addend & howto->dst_mask); | |
8938 | bfd_put_32 (input_bfd, value, contents + rel->r_offset); | |
8939 | break; | |
8940 | } | |
f8df10f4 | 8941 | } |
f8df10f4 | 8942 | } |
4e7fd91e PB |
8943 | else |
8944 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); | |
252b5132 RH |
8945 | } |
8946 | else | |
8947 | { | |
560e09e9 | 8948 | bfd_boolean warned; |
560e09e9 | 8949 | |
b2a8e766 AM |
8950 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
8951 | r_symndx, symtab_hdr, sym_hashes, | |
8952 | h, sec, relocation, | |
8953 | unresolved_reloc, warned); | |
ba93b8ac DJ |
8954 | |
8955 | sym_type = h->type; | |
252b5132 RH |
8956 | } |
8957 | ||
ab96bf03 AM |
8958 | if (sec != NULL && elf_discarded_section (sec)) |
8959 | { | |
8960 | /* For relocs against symbols from removed linkonce sections, | |
8961 | or sections discarded by a linker script, we just want the | |
8962 | section contents zeroed. Avoid any special processing. */ | |
8963 | _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset); | |
8964 | rel->r_info = 0; | |
8965 | rel->r_addend = 0; | |
8966 | continue; | |
8967 | } | |
8968 | ||
8969 | if (info->relocatable) | |
8970 | { | |
8971 | /* This is a relocatable link. We don't have to change | |
8972 | anything, unless the reloc is against a section symbol, | |
8973 | in which case we have to adjust according to where the | |
8974 | section symbol winds up in the output section. */ | |
8975 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
8976 | { | |
8977 | if (globals->use_rel) | |
8978 | arm_add_to_rel (input_bfd, contents + rel->r_offset, | |
8979 | howto, (bfd_signed_vma) sec->output_offset); | |
8980 | else | |
8981 | rel->r_addend += sec->output_offset; | |
8982 | } | |
8983 | continue; | |
8984 | } | |
8985 | ||
252b5132 RH |
8986 | if (h != NULL) |
8987 | name = h->root.root.string; | |
8988 | else | |
8989 | { | |
8990 | name = (bfd_elf_string_from_elf_section | |
8991 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
8992 | if (name == NULL || *name == '\0') | |
8993 | name = bfd_section_name (input_bfd, sec); | |
8994 | } | |
f21f3fe0 | 8995 | |
ba93b8ac DJ |
8996 | if (r_symndx != 0 |
8997 | && r_type != R_ARM_NONE | |
8998 | && (h == NULL | |
8999 | || h->root.type == bfd_link_hash_defined | |
9000 | || h->root.type == bfd_link_hash_defweak) | |
9001 | && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) | |
9002 | { | |
9003 | (*_bfd_error_handler) | |
9004 | ((sym_type == STT_TLS | |
9005 | ? _("%B(%A+0x%lx): %s used with TLS symbol %s") | |
9006 | : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")), | |
9007 | input_bfd, | |
9008 | input_section, | |
9009 | (long) rel->r_offset, | |
9010 | howto->name, | |
9011 | name); | |
9012 | } | |
9013 | ||
252b5132 RH |
9014 | r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, |
9015 | input_section, contents, rel, | |
9016 | relocation, info, sec, name, | |
9017 | (h ? ELF_ST_TYPE (h->type) : | |
0945cdfd | 9018 | ELF_ST_TYPE (sym->st_info)), h, |
f2a9dd69 | 9019 | &unresolved_reloc, &error_message); |
0945cdfd DJ |
9020 | |
9021 | /* Dynamic relocs are not propagated for SEC_DEBUGGING sections | |
9022 | because such sections are not SEC_ALLOC and thus ld.so will | |
9023 | not process them. */ | |
9024 | if (unresolved_reloc | |
9025 | && !((input_section->flags & SEC_DEBUGGING) != 0 | |
9026 | && h->def_dynamic)) | |
9027 | { | |
9028 | (*_bfd_error_handler) | |
843fe662 L |
9029 | (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), |
9030 | input_bfd, | |
9031 | input_section, | |
9032 | (long) rel->r_offset, | |
9033 | howto->name, | |
9034 | h->root.root.string); | |
0945cdfd DJ |
9035 | return FALSE; |
9036 | } | |
252b5132 RH |
9037 | |
9038 | if (r != bfd_reloc_ok) | |
9039 | { | |
252b5132 RH |
9040 | switch (r) |
9041 | { | |
9042 | case bfd_reloc_overflow: | |
cf919dfd PB |
9043 | /* If the overflowing reloc was to an undefined symbol, |
9044 | we have already printed one error message and there | |
9045 | is no point complaining again. */ | |
9046 | if ((! h || | |
9047 | h->root.type != bfd_link_hash_undefined) | |
9048 | && (!((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
9049 | (info, (h ? &h->root : NULL), name, howto->name, |
9050 | (bfd_vma) 0, input_bfd, input_section, | |
9051 | rel->r_offset)))) | |
b34976b6 | 9052 | return FALSE; |
252b5132 RH |
9053 | break; |
9054 | ||
9055 | case bfd_reloc_undefined: | |
9056 | if (!((*info->callbacks->undefined_symbol) | |
9057 | (info, name, input_bfd, input_section, | |
b34976b6 AM |
9058 | rel->r_offset, TRUE))) |
9059 | return FALSE; | |
252b5132 RH |
9060 | break; |
9061 | ||
9062 | case bfd_reloc_outofrange: | |
f2a9dd69 | 9063 | error_message = _("out of range"); |
252b5132 RH |
9064 | goto common_error; |
9065 | ||
9066 | case bfd_reloc_notsupported: | |
f2a9dd69 | 9067 | error_message = _("unsupported relocation"); |
252b5132 RH |
9068 | goto common_error; |
9069 | ||
9070 | case bfd_reloc_dangerous: | |
f2a9dd69 | 9071 | /* error_message should already be set. */ |
252b5132 RH |
9072 | goto common_error; |
9073 | ||
9074 | default: | |
f2a9dd69 | 9075 | error_message = _("unknown error"); |
8029a119 | 9076 | /* Fall through. */ |
252b5132 RH |
9077 | |
9078 | common_error: | |
f2a9dd69 DJ |
9079 | BFD_ASSERT (error_message != NULL); |
9080 | if (!((*info->callbacks->reloc_dangerous) | |
9081 | (info, error_message, input_bfd, input_section, | |
252b5132 | 9082 | rel->r_offset))) |
b34976b6 | 9083 | return FALSE; |
252b5132 RH |
9084 | break; |
9085 | } | |
9086 | } | |
9087 | } | |
9088 | ||
b34976b6 | 9089 | return TRUE; |
252b5132 RH |
9090 | } |
9091 | ||
91d6fa6a | 9092 | /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, |
2468f9c9 | 9093 | adds the edit to the start of the list. (The list must be built in order of |
91d6fa6a | 9094 | ascending TINDEX: the function's callers are primarily responsible for |
2468f9c9 PB |
9095 | maintaining that condition). */ |
9096 | ||
9097 | static void | |
9098 | add_unwind_table_edit (arm_unwind_table_edit **head, | |
9099 | arm_unwind_table_edit **tail, | |
9100 | arm_unwind_edit_type type, | |
9101 | asection *linked_section, | |
91d6fa6a | 9102 | unsigned int tindex) |
2468f9c9 | 9103 | { |
21d799b5 NC |
9104 | arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) |
9105 | xmalloc (sizeof (arm_unwind_table_edit)); | |
2468f9c9 PB |
9106 | |
9107 | new_edit->type = type; | |
9108 | new_edit->linked_section = linked_section; | |
91d6fa6a | 9109 | new_edit->index = tindex; |
2468f9c9 | 9110 | |
91d6fa6a | 9111 | if (tindex > 0) |
2468f9c9 PB |
9112 | { |
9113 | new_edit->next = NULL; | |
9114 | ||
9115 | if (*tail) | |
9116 | (*tail)->next = new_edit; | |
9117 | ||
9118 | (*tail) = new_edit; | |
9119 | ||
9120 | if (!*head) | |
9121 | (*head) = new_edit; | |
9122 | } | |
9123 | else | |
9124 | { | |
9125 | new_edit->next = *head; | |
9126 | ||
9127 | if (!*tail) | |
9128 | *tail = new_edit; | |
9129 | ||
9130 | *head = new_edit; | |
9131 | } | |
9132 | } | |
9133 | ||
9134 | static _arm_elf_section_data *get_arm_elf_section_data (asection *); | |
9135 | ||
9136 | /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ | |
9137 | static void | |
9138 | adjust_exidx_size(asection *exidx_sec, int adjust) | |
9139 | { | |
9140 | asection *out_sec; | |
9141 | ||
9142 | if (!exidx_sec->rawsize) | |
9143 | exidx_sec->rawsize = exidx_sec->size; | |
9144 | ||
9145 | bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); | |
9146 | out_sec = exidx_sec->output_section; | |
9147 | /* Adjust size of output section. */ | |
9148 | bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); | |
9149 | } | |
9150 | ||
9151 | /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ | |
9152 | static void | |
9153 | insert_cantunwind_after(asection *text_sec, asection *exidx_sec) | |
9154 | { | |
9155 | struct _arm_elf_section_data *exidx_arm_data; | |
9156 | ||
9157 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
9158 | add_unwind_table_edit ( | |
9159 | &exidx_arm_data->u.exidx.unwind_edit_list, | |
9160 | &exidx_arm_data->u.exidx.unwind_edit_tail, | |
9161 | INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); | |
9162 | ||
9163 | adjust_exidx_size(exidx_sec, 8); | |
9164 | } | |
9165 | ||
9166 | /* Scan .ARM.exidx tables, and create a list describing edits which should be | |
9167 | made to those tables, such that: | |
9168 | ||
9169 | 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. | |
9170 | 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind | |
9171 | codes which have been inlined into the index). | |
9172 | ||
9173 | The edits are applied when the tables are written | |
9174 | (in elf32_arm_write_section). | |
9175 | */ | |
9176 | ||
9177 | bfd_boolean | |
9178 | elf32_arm_fix_exidx_coverage (asection **text_section_order, | |
9179 | unsigned int num_text_sections, | |
9180 | struct bfd_link_info *info) | |
9181 | { | |
9182 | bfd *inp; | |
9183 | unsigned int last_second_word = 0, i; | |
9184 | asection *last_exidx_sec = NULL; | |
9185 | asection *last_text_sec = NULL; | |
9186 | int last_unwind_type = -1; | |
9187 | ||
9188 | /* Walk over all EXIDX sections, and create backlinks from the corrsponding | |
9189 | text sections. */ | |
9190 | for (inp = info->input_bfds; inp != NULL; inp = inp->link_next) | |
9191 | { | |
9192 | asection *sec; | |
9193 | ||
9194 | for (sec = inp->sections; sec != NULL; sec = sec->next) | |
9195 | { | |
9196 | struct bfd_elf_section_data *elf_sec = elf_section_data (sec); | |
9197 | Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; | |
9198 | ||
dec9d5df | 9199 | if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) |
2468f9c9 PB |
9200 | continue; |
9201 | ||
9202 | if (elf_sec->linked_to) | |
9203 | { | |
9204 | Elf_Internal_Shdr *linked_hdr | |
9205 | = &elf_section_data (elf_sec->linked_to)->this_hdr; | |
9206 | struct _arm_elf_section_data *linked_sec_arm_data | |
9207 | = get_arm_elf_section_data (linked_hdr->bfd_section); | |
9208 | ||
9209 | if (linked_sec_arm_data == NULL) | |
9210 | continue; | |
9211 | ||
9212 | /* Link this .ARM.exidx section back from the text section it | |
9213 | describes. */ | |
9214 | linked_sec_arm_data->u.text.arm_exidx_sec = sec; | |
9215 | } | |
9216 | } | |
9217 | } | |
9218 | ||
9219 | /* Walk all text sections in order of increasing VMA. Eilminate duplicate | |
9220 | index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), | |
91d6fa6a | 9221 | and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ |
2468f9c9 PB |
9222 | |
9223 | for (i = 0; i < num_text_sections; i++) | |
9224 | { | |
9225 | asection *sec = text_section_order[i]; | |
9226 | asection *exidx_sec; | |
9227 | struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); | |
9228 | struct _arm_elf_section_data *exidx_arm_data; | |
9229 | bfd_byte *contents = NULL; | |
9230 | int deleted_exidx_bytes = 0; | |
9231 | bfd_vma j; | |
9232 | arm_unwind_table_edit *unwind_edit_head = NULL; | |
9233 | arm_unwind_table_edit *unwind_edit_tail = NULL; | |
9234 | Elf_Internal_Shdr *hdr; | |
9235 | bfd *ibfd; | |
9236 | ||
9237 | if (arm_data == NULL) | |
9238 | continue; | |
9239 | ||
9240 | exidx_sec = arm_data->u.text.arm_exidx_sec; | |
9241 | if (exidx_sec == NULL) | |
9242 | { | |
9243 | /* Section has no unwind data. */ | |
9244 | if (last_unwind_type == 0 || !last_exidx_sec) | |
9245 | continue; | |
9246 | ||
9247 | /* Ignore zero sized sections. */ | |
9248 | if (sec->size == 0) | |
9249 | continue; | |
9250 | ||
9251 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
9252 | last_unwind_type = 0; | |
9253 | continue; | |
9254 | } | |
9255 | ||
22a8f80e PB |
9256 | /* Skip /DISCARD/ sections. */ |
9257 | if (bfd_is_abs_section (exidx_sec->output_section)) | |
9258 | continue; | |
9259 | ||
2468f9c9 PB |
9260 | hdr = &elf_section_data (exidx_sec)->this_hdr; |
9261 | if (hdr->sh_type != SHT_ARM_EXIDX) | |
9262 | continue; | |
9263 | ||
9264 | exidx_arm_data = get_arm_elf_section_data (exidx_sec); | |
9265 | if (exidx_arm_data == NULL) | |
9266 | continue; | |
9267 | ||
9268 | ibfd = exidx_sec->owner; | |
9269 | ||
9270 | if (hdr->contents != NULL) | |
9271 | contents = hdr->contents; | |
9272 | else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) | |
9273 | /* An error? */ | |
9274 | continue; | |
9275 | ||
9276 | for (j = 0; j < hdr->sh_size; j += 8) | |
9277 | { | |
9278 | unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); | |
9279 | int unwind_type; | |
9280 | int elide = 0; | |
9281 | ||
9282 | /* An EXIDX_CANTUNWIND entry. */ | |
9283 | if (second_word == 1) | |
9284 | { | |
9285 | if (last_unwind_type == 0) | |
9286 | elide = 1; | |
9287 | unwind_type = 0; | |
9288 | } | |
9289 | /* Inlined unwinding data. Merge if equal to previous. */ | |
9290 | else if ((second_word & 0x80000000) != 0) | |
9291 | { | |
9292 | if (last_second_word == second_word && last_unwind_type == 1) | |
9293 | elide = 1; | |
9294 | unwind_type = 1; | |
9295 | last_second_word = second_word; | |
9296 | } | |
9297 | /* Normal table entry. In theory we could merge these too, | |
9298 | but duplicate entries are likely to be much less common. */ | |
9299 | else | |
9300 | unwind_type = 2; | |
9301 | ||
9302 | if (elide) | |
9303 | { | |
9304 | add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, | |
9305 | DELETE_EXIDX_ENTRY, NULL, j / 8); | |
9306 | ||
9307 | deleted_exidx_bytes += 8; | |
9308 | } | |
9309 | ||
9310 | last_unwind_type = unwind_type; | |
9311 | } | |
9312 | ||
9313 | /* Free contents if we allocated it ourselves. */ | |
9314 | if (contents != hdr->contents) | |
9315 | free (contents); | |
9316 | ||
9317 | /* Record edits to be applied later (in elf32_arm_write_section). */ | |
9318 | exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; | |
9319 | exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; | |
9320 | ||
9321 | if (deleted_exidx_bytes > 0) | |
9322 | adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); | |
9323 | ||
9324 | last_exidx_sec = exidx_sec; | |
9325 | last_text_sec = sec; | |
9326 | } | |
9327 | ||
9328 | /* Add terminating CANTUNWIND entry. */ | |
9329 | if (last_exidx_sec && last_unwind_type != 0) | |
9330 | insert_cantunwind_after(last_text_sec, last_exidx_sec); | |
9331 | ||
9332 | return TRUE; | |
9333 | } | |
9334 | ||
3e6b1042 DJ |
9335 | static bfd_boolean |
9336 | elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, | |
9337 | bfd *ibfd, const char *name) | |
9338 | { | |
9339 | asection *sec, *osec; | |
9340 | ||
9341 | sec = bfd_get_section_by_name (ibfd, name); | |
9342 | if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) | |
9343 | return TRUE; | |
9344 | ||
9345 | osec = sec->output_section; | |
9346 | if (elf32_arm_write_section (obfd, info, sec, sec->contents)) | |
9347 | return TRUE; | |
9348 | ||
9349 | if (! bfd_set_section_contents (obfd, osec, sec->contents, | |
9350 | sec->output_offset, sec->size)) | |
9351 | return FALSE; | |
9352 | ||
9353 | return TRUE; | |
9354 | } | |
9355 | ||
9356 | static bfd_boolean | |
9357 | elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) | |
9358 | { | |
9359 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); | |
9360 | ||
4dfe6ac6 NC |
9361 | if (globals == NULL) |
9362 | return FALSE; | |
9363 | ||
3e6b1042 DJ |
9364 | /* Invoke the regular ELF backend linker to do all the work. */ |
9365 | if (!bfd_elf_final_link (abfd, info)) | |
9366 | return FALSE; | |
9367 | ||
9368 | /* Write out any glue sections now that we have created all the | |
9369 | stubs. */ | |
9370 | if (globals->bfd_of_glue_owner != NULL) | |
9371 | { | |
9372 | if (! elf32_arm_output_glue_section (info, abfd, | |
9373 | globals->bfd_of_glue_owner, | |
9374 | ARM2THUMB_GLUE_SECTION_NAME)) | |
9375 | return FALSE; | |
9376 | ||
9377 | if (! elf32_arm_output_glue_section (info, abfd, | |
9378 | globals->bfd_of_glue_owner, | |
9379 | THUMB2ARM_GLUE_SECTION_NAME)) | |
9380 | return FALSE; | |
9381 | ||
9382 | if (! elf32_arm_output_glue_section (info, abfd, | |
9383 | globals->bfd_of_glue_owner, | |
9384 | VFP11_ERRATUM_VENEER_SECTION_NAME)) | |
9385 | return FALSE; | |
9386 | ||
9387 | if (! elf32_arm_output_glue_section (info, abfd, | |
9388 | globals->bfd_of_glue_owner, | |
9389 | ARM_BX_GLUE_SECTION_NAME)) | |
9390 | return FALSE; | |
9391 | } | |
9392 | ||
9393 | return TRUE; | |
9394 | } | |
9395 | ||
c178919b NC |
9396 | /* Set the right machine number. */ |
9397 | ||
9398 | static bfd_boolean | |
57e8b36a | 9399 | elf32_arm_object_p (bfd *abfd) |
c178919b | 9400 | { |
5a6c6817 | 9401 | unsigned int mach; |
57e8b36a | 9402 | |
5a6c6817 | 9403 | mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); |
c178919b | 9404 | |
5a6c6817 NC |
9405 | if (mach != bfd_mach_arm_unknown) |
9406 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); | |
9407 | ||
9408 | else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) | |
9409 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312); | |
e16bb312 | 9410 | |
e16bb312 | 9411 | else |
5a6c6817 | 9412 | bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); |
c178919b NC |
9413 | |
9414 | return TRUE; | |
9415 | } | |
9416 | ||
fc830a83 | 9417 | /* Function to keep ARM specific flags in the ELF header. */ |
3c9458e9 | 9418 | |
b34976b6 | 9419 | static bfd_boolean |
57e8b36a | 9420 | elf32_arm_set_private_flags (bfd *abfd, flagword flags) |
252b5132 RH |
9421 | { |
9422 | if (elf_flags_init (abfd) | |
9423 | && elf_elfheader (abfd)->e_flags != flags) | |
9424 | { | |
fc830a83 NC |
9425 | if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) |
9426 | { | |
fd2ec330 | 9427 | if (flags & EF_ARM_INTERWORK) |
d003868e AM |
9428 | (*_bfd_error_handler) |
9429 | (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), | |
9430 | abfd); | |
fc830a83 | 9431 | else |
d003868e AM |
9432 | _bfd_error_handler |
9433 | (_("Warning: Clearing the interworking flag of %B due to outside request"), | |
9434 | abfd); | |
fc830a83 | 9435 | } |
252b5132 RH |
9436 | } |
9437 | else | |
9438 | { | |
9439 | elf_elfheader (abfd)->e_flags = flags; | |
b34976b6 | 9440 | elf_flags_init (abfd) = TRUE; |
252b5132 RH |
9441 | } |
9442 | ||
b34976b6 | 9443 | return TRUE; |
252b5132 RH |
9444 | } |
9445 | ||
fc830a83 | 9446 | /* Copy backend specific data from one object module to another. */ |
9b485d32 | 9447 | |
b34976b6 | 9448 | static bfd_boolean |
57e8b36a | 9449 | elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) |
252b5132 RH |
9450 | { |
9451 | flagword in_flags; | |
9452 | flagword out_flags; | |
9453 | ||
0ffa91dd | 9454 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) |
b34976b6 | 9455 | return TRUE; |
252b5132 | 9456 | |
fc830a83 | 9457 | in_flags = elf_elfheader (ibfd)->e_flags; |
252b5132 RH |
9458 | out_flags = elf_elfheader (obfd)->e_flags; |
9459 | ||
fc830a83 NC |
9460 | if (elf_flags_init (obfd) |
9461 | && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN | |
9462 | && in_flags != out_flags) | |
252b5132 | 9463 | { |
252b5132 | 9464 | /* Cannot mix APCS26 and APCS32 code. */ |
fd2ec330 | 9465 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) |
b34976b6 | 9466 | return FALSE; |
252b5132 RH |
9467 | |
9468 | /* Cannot mix float APCS and non-float APCS code. */ | |
fd2ec330 | 9469 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) |
b34976b6 | 9470 | return FALSE; |
252b5132 RH |
9471 | |
9472 | /* If the src and dest have different interworking flags | |
9473 | then turn off the interworking bit. */ | |
fd2ec330 | 9474 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) |
252b5132 | 9475 | { |
fd2ec330 | 9476 | if (out_flags & EF_ARM_INTERWORK) |
d003868e AM |
9477 | _bfd_error_handler |
9478 | (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), | |
9479 | obfd, ibfd); | |
252b5132 | 9480 | |
fd2ec330 | 9481 | in_flags &= ~EF_ARM_INTERWORK; |
252b5132 | 9482 | } |
1006ba19 PB |
9483 | |
9484 | /* Likewise for PIC, though don't warn for this case. */ | |
fd2ec330 PB |
9485 | if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) |
9486 | in_flags &= ~EF_ARM_PIC; | |
252b5132 RH |
9487 | } |
9488 | ||
9489 | elf_elfheader (obfd)->e_flags = in_flags; | |
b34976b6 | 9490 | elf_flags_init (obfd) = TRUE; |
252b5132 | 9491 | |
94a3258f PB |
9492 | /* Also copy the EI_OSABI field. */ |
9493 | elf_elfheader (obfd)->e_ident[EI_OSABI] = | |
9494 | elf_elfheader (ibfd)->e_ident[EI_OSABI]; | |
9495 | ||
104d59d1 JM |
9496 | /* Copy object attributes. */ |
9497 | _bfd_elf_copy_obj_attributes (ibfd, obfd); | |
ee065d83 PB |
9498 | |
9499 | return TRUE; | |
9500 | } | |
9501 | ||
9502 | /* Values for Tag_ABI_PCS_R9_use. */ | |
9503 | enum | |
9504 | { | |
9505 | AEABI_R9_V6, | |
9506 | AEABI_R9_SB, | |
9507 | AEABI_R9_TLS, | |
9508 | AEABI_R9_unused | |
9509 | }; | |
9510 | ||
9511 | /* Values for Tag_ABI_PCS_RW_data. */ | |
9512 | enum | |
9513 | { | |
9514 | AEABI_PCS_RW_data_absolute, | |
9515 | AEABI_PCS_RW_data_PCrel, | |
9516 | AEABI_PCS_RW_data_SBrel, | |
9517 | AEABI_PCS_RW_data_unused | |
9518 | }; | |
9519 | ||
9520 | /* Values for Tag_ABI_enum_size. */ | |
9521 | enum | |
9522 | { | |
9523 | AEABI_enum_unused, | |
9524 | AEABI_enum_short, | |
9525 | AEABI_enum_wide, | |
9526 | AEABI_enum_forced_wide | |
9527 | }; | |
9528 | ||
104d59d1 JM |
9529 | /* Determine whether an object attribute tag takes an integer, a |
9530 | string or both. */ | |
906e58ca | 9531 | |
104d59d1 JM |
9532 | static int |
9533 | elf32_arm_obj_attrs_arg_type (int tag) | |
9534 | { | |
9535 | if (tag == Tag_compatibility) | |
3483fe2e | 9536 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; |
2d0bb761 | 9537 | else if (tag == Tag_nodefaults) |
3483fe2e AS |
9538 | return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; |
9539 | else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) | |
9540 | return ATTR_TYPE_FLAG_STR_VAL; | |
104d59d1 | 9541 | else if (tag < 32) |
3483fe2e | 9542 | return ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 | 9543 | else |
3483fe2e | 9544 | return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; |
104d59d1 JM |
9545 | } |
9546 | ||
5aa6ff7c AS |
9547 | /* The ABI defines that Tag_conformance should be emitted first, and that |
9548 | Tag_nodefaults should be second (if either is defined). This sets those | |
9549 | two positions, and bumps up the position of all the remaining tags to | |
9550 | compensate. */ | |
9551 | static int | |
9552 | elf32_arm_obj_attrs_order (int num) | |
9553 | { | |
9554 | if (num == 4) | |
9555 | return Tag_conformance; | |
9556 | if (num == 5) | |
9557 | return Tag_nodefaults; | |
9558 | if ((num - 2) < Tag_nodefaults) | |
9559 | return num - 2; | |
9560 | if ((num - 1) < Tag_conformance) | |
9561 | return num - 1; | |
9562 | return num; | |
9563 | } | |
9564 | ||
91e22acd AS |
9565 | /* Read the architecture from the Tag_also_compatible_with attribute, if any. |
9566 | Returns -1 if no architecture could be read. */ | |
9567 | ||
9568 | static int | |
9569 | get_secondary_compatible_arch (bfd *abfd) | |
9570 | { | |
9571 | obj_attribute *attr = | |
9572 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
9573 | ||
9574 | /* Note: the tag and its argument below are uleb128 values, though | |
9575 | currently-defined values fit in one byte for each. */ | |
9576 | if (attr->s | |
9577 | && attr->s[0] == Tag_CPU_arch | |
9578 | && (attr->s[1] & 128) != 128 | |
9579 | && attr->s[2] == 0) | |
9580 | return attr->s[1]; | |
9581 | ||
9582 | /* This tag is "safely ignorable", so don't complain if it looks funny. */ | |
9583 | return -1; | |
9584 | } | |
9585 | ||
9586 | /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. | |
9587 | The tag is removed if ARCH is -1. */ | |
9588 | ||
8e79c3df | 9589 | static void |
91e22acd | 9590 | set_secondary_compatible_arch (bfd *abfd, int arch) |
8e79c3df | 9591 | { |
91e22acd AS |
9592 | obj_attribute *attr = |
9593 | &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; | |
8e79c3df | 9594 | |
91e22acd AS |
9595 | if (arch == -1) |
9596 | { | |
9597 | attr->s = NULL; | |
9598 | return; | |
8e79c3df | 9599 | } |
91e22acd AS |
9600 | |
9601 | /* Note: the tag and its argument below are uleb128 values, though | |
9602 | currently-defined values fit in one byte for each. */ | |
9603 | if (!attr->s) | |
21d799b5 | 9604 | attr->s = (char *) bfd_alloc (abfd, 3); |
91e22acd AS |
9605 | attr->s[0] = Tag_CPU_arch; |
9606 | attr->s[1] = arch; | |
9607 | attr->s[2] = '\0'; | |
8e79c3df CM |
9608 | } |
9609 | ||
91e22acd AS |
9610 | /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags |
9611 | into account. */ | |
9612 | ||
9613 | static int | |
9614 | tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, | |
9615 | int newtag, int secondary_compat) | |
8e79c3df | 9616 | { |
91e22acd AS |
9617 | #define T(X) TAG_CPU_ARCH_##X |
9618 | int tagl, tagh, result; | |
9619 | const int v6t2[] = | |
9620 | { | |
9621 | T(V6T2), /* PRE_V4. */ | |
9622 | T(V6T2), /* V4. */ | |
9623 | T(V6T2), /* V4T. */ | |
9624 | T(V6T2), /* V5T. */ | |
9625 | T(V6T2), /* V5TE. */ | |
9626 | T(V6T2), /* V5TEJ. */ | |
9627 | T(V6T2), /* V6. */ | |
9628 | T(V7), /* V6KZ. */ | |
9629 | T(V6T2) /* V6T2. */ | |
9630 | }; | |
9631 | const int v6k[] = | |
9632 | { | |
9633 | T(V6K), /* PRE_V4. */ | |
9634 | T(V6K), /* V4. */ | |
9635 | T(V6K), /* V4T. */ | |
9636 | T(V6K), /* V5T. */ | |
9637 | T(V6K), /* V5TE. */ | |
9638 | T(V6K), /* V5TEJ. */ | |
9639 | T(V6K), /* V6. */ | |
9640 | T(V6KZ), /* V6KZ. */ | |
9641 | T(V7), /* V6T2. */ | |
9642 | T(V6K) /* V6K. */ | |
9643 | }; | |
9644 | const int v7[] = | |
9645 | { | |
9646 | T(V7), /* PRE_V4. */ | |
9647 | T(V7), /* V4. */ | |
9648 | T(V7), /* V4T. */ | |
9649 | T(V7), /* V5T. */ | |
9650 | T(V7), /* V5TE. */ | |
9651 | T(V7), /* V5TEJ. */ | |
9652 | T(V7), /* V6. */ | |
9653 | T(V7), /* V6KZ. */ | |
9654 | T(V7), /* V6T2. */ | |
9655 | T(V7), /* V6K. */ | |
9656 | T(V7) /* V7. */ | |
9657 | }; | |
9658 | const int v6_m[] = | |
9659 | { | |
9660 | -1, /* PRE_V4. */ | |
9661 | -1, /* V4. */ | |
9662 | T(V6K), /* V4T. */ | |
9663 | T(V6K), /* V5T. */ | |
9664 | T(V6K), /* V5TE. */ | |
9665 | T(V6K), /* V5TEJ. */ | |
9666 | T(V6K), /* V6. */ | |
9667 | T(V6KZ), /* V6KZ. */ | |
9668 | T(V7), /* V6T2. */ | |
9669 | T(V6K), /* V6K. */ | |
9670 | T(V7), /* V7. */ | |
9671 | T(V6_M) /* V6_M. */ | |
9672 | }; | |
9673 | const int v6s_m[] = | |
9674 | { | |
9675 | -1, /* PRE_V4. */ | |
9676 | -1, /* V4. */ | |
9677 | T(V6K), /* V4T. */ | |
9678 | T(V6K), /* V5T. */ | |
9679 | T(V6K), /* V5TE. */ | |
9680 | T(V6K), /* V5TEJ. */ | |
9681 | T(V6K), /* V6. */ | |
9682 | T(V6KZ), /* V6KZ. */ | |
9683 | T(V7), /* V6T2. */ | |
9684 | T(V6K), /* V6K. */ | |
9685 | T(V7), /* V7. */ | |
9686 | T(V6S_M), /* V6_M. */ | |
9687 | T(V6S_M) /* V6S_M. */ | |
9688 | }; | |
9e3c6df6 PB |
9689 | const int v7e_m[] = |
9690 | { | |
9691 | -1, /* PRE_V4. */ | |
9692 | -1, /* V4. */ | |
9693 | T(V7E_M), /* V4T. */ | |
9694 | T(V7E_M), /* V5T. */ | |
9695 | T(V7E_M), /* V5TE. */ | |
9696 | T(V7E_M), /* V5TEJ. */ | |
9697 | T(V7E_M), /* V6. */ | |
9698 | T(V7E_M), /* V6KZ. */ | |
9699 | T(V7E_M), /* V6T2. */ | |
9700 | T(V7E_M), /* V6K. */ | |
9701 | T(V7E_M), /* V7. */ | |
9702 | T(V7E_M), /* V6_M. */ | |
9703 | T(V7E_M), /* V6S_M. */ | |
9704 | T(V7E_M) /* V7E_M. */ | |
9705 | }; | |
91e22acd AS |
9706 | const int v4t_plus_v6_m[] = |
9707 | { | |
9708 | -1, /* PRE_V4. */ | |
9709 | -1, /* V4. */ | |
9710 | T(V4T), /* V4T. */ | |
9711 | T(V5T), /* V5T. */ | |
9712 | T(V5TE), /* V5TE. */ | |
9713 | T(V5TEJ), /* V5TEJ. */ | |
9714 | T(V6), /* V6. */ | |
9715 | T(V6KZ), /* V6KZ. */ | |
9716 | T(V6T2), /* V6T2. */ | |
9717 | T(V6K), /* V6K. */ | |
9718 | T(V7), /* V7. */ | |
9719 | T(V6_M), /* V6_M. */ | |
9720 | T(V6S_M), /* V6S_M. */ | |
9e3c6df6 | 9721 | T(V7E_M), /* V7E_M. */ |
91e22acd AS |
9722 | T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ |
9723 | }; | |
9724 | const int *comb[] = | |
9725 | { | |
9726 | v6t2, | |
9727 | v6k, | |
9728 | v7, | |
9729 | v6_m, | |
9730 | v6s_m, | |
9e3c6df6 | 9731 | v7e_m, |
91e22acd AS |
9732 | /* Pseudo-architecture. */ |
9733 | v4t_plus_v6_m | |
9734 | }; | |
9735 | ||
9736 | /* Check we've not got a higher architecture than we know about. */ | |
9737 | ||
9e3c6df6 | 9738 | if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) |
91e22acd | 9739 | { |
3895f852 | 9740 | _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd); |
91e22acd AS |
9741 | return -1; |
9742 | } | |
9743 | ||
9744 | /* Override old tag if we have a Tag_also_compatible_with on the output. */ | |
9745 | ||
9746 | if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) | |
9747 | || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) | |
9748 | oldtag = T(V4T_PLUS_V6_M); | |
9749 | ||
9750 | /* And override the new tag if we have a Tag_also_compatible_with on the | |
9751 | input. */ | |
9752 | ||
9753 | if ((newtag == T(V6_M) && secondary_compat == T(V4T)) | |
9754 | || (newtag == T(V4T) && secondary_compat == T(V6_M))) | |
9755 | newtag = T(V4T_PLUS_V6_M); | |
9756 | ||
9757 | tagl = (oldtag < newtag) ? oldtag : newtag; | |
9758 | result = tagh = (oldtag > newtag) ? oldtag : newtag; | |
9759 | ||
9760 | /* Architectures before V6KZ add features monotonically. */ | |
9761 | if (tagh <= TAG_CPU_ARCH_V6KZ) | |
9762 | return result; | |
9763 | ||
9764 | result = comb[tagh - T(V6T2)][tagl]; | |
9765 | ||
9766 | /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) | |
9767 | as the canonical version. */ | |
9768 | if (result == T(V4T_PLUS_V6_M)) | |
9769 | { | |
9770 | result = T(V4T); | |
9771 | *secondary_compat_out = T(V6_M); | |
9772 | } | |
9773 | else | |
9774 | *secondary_compat_out = -1; | |
9775 | ||
9776 | if (result == -1) | |
9777 | { | |
3895f852 | 9778 | _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"), |
91e22acd AS |
9779 | ibfd, oldtag, newtag); |
9780 | return -1; | |
9781 | } | |
9782 | ||
9783 | return result; | |
9784 | #undef T | |
8e79c3df CM |
9785 | } |
9786 | ||
ee065d83 PB |
9787 | /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there |
9788 | are conflicting attributes. */ | |
906e58ca | 9789 | |
ee065d83 PB |
9790 | static bfd_boolean |
9791 | elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) | |
9792 | { | |
104d59d1 JM |
9793 | obj_attribute *in_attr; |
9794 | obj_attribute *out_attr; | |
9795 | obj_attribute_list *in_list; | |
8e79c3df | 9796 | obj_attribute_list *out_list; |
91e22acd | 9797 | obj_attribute_list **out_listp; |
ee065d83 PB |
9798 | /* Some tags have 0 = don't care, 1 = strong requirement, |
9799 | 2 = weak requirement. */ | |
91e22acd | 9800 | static const int order_021[3] = {0, 2, 1}; |
ee065d83 | 9801 | int i; |
91e22acd | 9802 | bfd_boolean result = TRUE; |
ee065d83 | 9803 | |
3e6b1042 DJ |
9804 | /* Skip the linker stubs file. This preserves previous behavior |
9805 | of accepting unknown attributes in the first input file - but | |
9806 | is that a bug? */ | |
9807 | if (ibfd->flags & BFD_LINKER_CREATED) | |
9808 | return TRUE; | |
9809 | ||
104d59d1 | 9810 | if (!elf_known_obj_attributes_proc (obfd)[0].i) |
ee065d83 PB |
9811 | { |
9812 | /* This is the first object. Copy the attributes. */ | |
104d59d1 | 9813 | _bfd_elf_copy_obj_attributes (ibfd, obfd); |
004ae526 PB |
9814 | |
9815 | /* Use the Tag_null value to indicate the attributes have been | |
9816 | initialized. */ | |
104d59d1 | 9817 | elf_known_obj_attributes_proc (obfd)[0].i = 1; |
004ae526 | 9818 | |
ee065d83 PB |
9819 | return TRUE; |
9820 | } | |
9821 | ||
104d59d1 JM |
9822 | in_attr = elf_known_obj_attributes_proc (ibfd); |
9823 | out_attr = elf_known_obj_attributes_proc (obfd); | |
ee065d83 PB |
9824 | /* This needs to happen before Tag_ABI_FP_number_model is merged. */ |
9825 | if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) | |
9826 | { | |
8e79c3df | 9827 | /* Ignore mismatches if the object doesn't use floating point. */ |
ee065d83 PB |
9828 | if (out_attr[Tag_ABI_FP_number_model].i == 0) |
9829 | out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; | |
9830 | else if (in_attr[Tag_ABI_FP_number_model].i != 0) | |
9831 | { | |
9832 | _bfd_error_handler | |
3895f852 | 9833 | (_("error: %B uses VFP register arguments, %B does not"), |
deddc40b NS |
9834 | in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, |
9835 | in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); | |
91e22acd | 9836 | result = FALSE; |
ee065d83 PB |
9837 | } |
9838 | } | |
9839 | ||
104d59d1 | 9840 | for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) |
ee065d83 PB |
9841 | { |
9842 | /* Merge this attribute with existing attributes. */ | |
9843 | switch (i) | |
9844 | { | |
9845 | case Tag_CPU_raw_name: | |
9846 | case Tag_CPU_name: | |
91e22acd | 9847 | /* These are merged after Tag_CPU_arch. */ |
ee065d83 PB |
9848 | break; |
9849 | ||
9850 | case Tag_ABI_optimization_goals: | |
9851 | case Tag_ABI_FP_optimization_goals: | |
9852 | /* Use the first value seen. */ | |
9853 | break; | |
9854 | ||
9855 | case Tag_CPU_arch: | |
91e22acd AS |
9856 | { |
9857 | int secondary_compat = -1, secondary_compat_out = -1; | |
9858 | unsigned int saved_out_attr = out_attr[i].i; | |
9859 | static const char *name_table[] = { | |
9860 | /* These aren't real CPU names, but we can't guess | |
9861 | that from the architecture version alone. */ | |
9862 | "Pre v4", | |
9863 | "ARM v4", | |
9864 | "ARM v4T", | |
9865 | "ARM v5T", | |
9866 | "ARM v5TE", | |
9867 | "ARM v5TEJ", | |
9868 | "ARM v6", | |
9869 | "ARM v6KZ", | |
9870 | "ARM v6T2", | |
9871 | "ARM v6K", | |
9872 | "ARM v7", | |
9873 | "ARM v6-M", | |
9874 | "ARM v6S-M" | |
9875 | }; | |
9876 | ||
9877 | /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ | |
9878 | secondary_compat = get_secondary_compatible_arch (ibfd); | |
9879 | secondary_compat_out = get_secondary_compatible_arch (obfd); | |
9880 | out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i, | |
9881 | &secondary_compat_out, | |
9882 | in_attr[i].i, | |
9883 | secondary_compat); | |
9884 | set_secondary_compatible_arch (obfd, secondary_compat_out); | |
9885 | ||
9886 | /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ | |
9887 | if (out_attr[i].i == saved_out_attr) | |
9888 | ; /* Leave the names alone. */ | |
9889 | else if (out_attr[i].i == in_attr[i].i) | |
9890 | { | |
9891 | /* The output architecture has been changed to match the | |
9892 | input architecture. Use the input names. */ | |
9893 | out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s | |
9894 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) | |
9895 | : NULL; | |
9896 | out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s | |
9897 | ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) | |
9898 | : NULL; | |
9899 | } | |
9900 | else | |
9901 | { | |
9902 | out_attr[Tag_CPU_name].s = NULL; | |
9903 | out_attr[Tag_CPU_raw_name].s = NULL; | |
9904 | } | |
9905 | ||
9906 | /* If we still don't have a value for Tag_CPU_name, | |
9907 | make one up now. Tag_CPU_raw_name remains blank. */ | |
9908 | if (out_attr[Tag_CPU_name].s == NULL | |
9909 | && out_attr[i].i < ARRAY_SIZE (name_table)) | |
9910 | out_attr[Tag_CPU_name].s = | |
9911 | _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); | |
9912 | } | |
9913 | break; | |
9914 | ||
ee065d83 PB |
9915 | case Tag_ARM_ISA_use: |
9916 | case Tag_THUMB_ISA_use: | |
ee065d83 | 9917 | case Tag_WMMX_arch: |
91e22acd AS |
9918 | case Tag_Advanced_SIMD_arch: |
9919 | /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ | |
ee065d83 | 9920 | case Tag_ABI_FP_rounding: |
ee065d83 PB |
9921 | case Tag_ABI_FP_exceptions: |
9922 | case Tag_ABI_FP_user_exceptions: | |
9923 | case Tag_ABI_FP_number_model: | |
91e22acd AS |
9924 | case Tag_VFP_HP_extension: |
9925 | case Tag_CPU_unaligned_access: | |
9926 | case Tag_T2EE_use: | |
9927 | case Tag_Virtualization_use: | |
9928 | case Tag_MPextension_use: | |
ee065d83 PB |
9929 | /* Use the largest value specified. */ |
9930 | if (in_attr[i].i > out_attr[i].i) | |
9931 | out_attr[i].i = in_attr[i].i; | |
9932 | break; | |
9933 | ||
91e22acd AS |
9934 | case Tag_ABI_align8_preserved: |
9935 | case Tag_ABI_PCS_RO_data: | |
9936 | /* Use the smallest value specified. */ | |
9937 | if (in_attr[i].i < out_attr[i].i) | |
9938 | out_attr[i].i = in_attr[i].i; | |
9939 | break; | |
9940 | ||
9941 | case Tag_ABI_align8_needed: | |
9942 | if ((in_attr[i].i > 0 || out_attr[i].i > 0) | |
9943 | && (in_attr[Tag_ABI_align8_preserved].i == 0 | |
9944 | || out_attr[Tag_ABI_align8_preserved].i == 0)) | |
ee065d83 | 9945 | { |
91e22acd AS |
9946 | /* This error message should be enabled once all non-conformant |
9947 | binaries in the toolchain have had the attributes set | |
9948 | properly. | |
ee065d83 | 9949 | _bfd_error_handler |
3895f852 | 9950 | (_("error: %B: 8-byte data alignment conflicts with %B"), |
91e22acd AS |
9951 | obfd, ibfd); |
9952 | result = FALSE; */ | |
ee065d83 | 9953 | } |
91e22acd AS |
9954 | /* Fall through. */ |
9955 | case Tag_ABI_FP_denormal: | |
9956 | case Tag_ABI_PCS_GOT_use: | |
9957 | /* Use the "greatest" from the sequence 0, 2, 1, or the largest | |
9958 | value if greater than 2 (for future-proofing). */ | |
9959 | if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) | |
9960 | || (in_attr[i].i <= 2 && out_attr[i].i <= 2 | |
9961 | && order_021[in_attr[i].i] > order_021[out_attr[i].i])) | |
ee065d83 PB |
9962 | out_attr[i].i = in_attr[i].i; |
9963 | break; | |
91e22acd AS |
9964 | |
9965 | ||
9966 | case Tag_CPU_arch_profile: | |
9967 | if (out_attr[i].i != in_attr[i].i) | |
9968 | { | |
9969 | /* 0 will merge with anything. | |
9970 | 'A' and 'S' merge to 'A'. | |
9971 | 'R' and 'S' merge to 'R'. | |
9972 | 'M' and 'A|R|S' is an error. */ | |
9973 | if (out_attr[i].i == 0 | |
9974 | || (out_attr[i].i == 'S' | |
9975 | && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) | |
9976 | out_attr[i].i = in_attr[i].i; | |
9977 | else if (in_attr[i].i == 0 | |
9978 | || (in_attr[i].i == 'S' | |
9979 | && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) | |
9980 | ; /* Do nothing. */ | |
9981 | else | |
9982 | { | |
9983 | _bfd_error_handler | |
3895f852 | 9984 | (_("error: %B: Conflicting architecture profiles %c/%c"), |
91e22acd AS |
9985 | ibfd, |
9986 | in_attr[i].i ? in_attr[i].i : '0', | |
9987 | out_attr[i].i ? out_attr[i].i : '0'); | |
9988 | result = FALSE; | |
9989 | } | |
9990 | } | |
9991 | break; | |
b1cc4aeb | 9992 | case Tag_VFP_arch: |
62f3b8c8 PB |
9993 | { |
9994 | static const struct | |
9995 | { | |
9996 | int ver; | |
9997 | int regs; | |
9998 | } vfp_versions[7] = | |
9999 | { | |
10000 | {0, 0}, | |
10001 | {1, 16}, | |
10002 | {2, 16}, | |
10003 | {3, 32}, | |
10004 | {3, 16}, | |
10005 | {4, 32}, | |
10006 | {4, 16} | |
10007 | }; | |
10008 | int ver; | |
10009 | int regs; | |
10010 | int newval; | |
10011 | ||
10012 | /* Values greater than 6 aren't defined, so just pick the | |
10013 | biggest */ | |
10014 | if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i) | |
10015 | { | |
10016 | out_attr[i] = in_attr[i]; | |
10017 | break; | |
10018 | } | |
10019 | /* The output uses the superset of input features | |
10020 | (ISA version) and registers. */ | |
10021 | ver = vfp_versions[in_attr[i].i].ver; | |
10022 | if (ver < vfp_versions[out_attr[i].i].ver) | |
10023 | ver = vfp_versions[out_attr[i].i].ver; | |
10024 | regs = vfp_versions[in_attr[i].i].regs; | |
10025 | if (regs < vfp_versions[out_attr[i].i].regs) | |
10026 | regs = vfp_versions[out_attr[i].i].regs; | |
10027 | /* This assumes all possible supersets are also a valid | |
10028 | options. */ | |
10029 | for (newval = 6; newval > 0; newval--) | |
10030 | { | |
10031 | if (regs == vfp_versions[newval].regs | |
10032 | && ver == vfp_versions[newval].ver) | |
10033 | break; | |
10034 | } | |
10035 | out_attr[i].i = newval; | |
10036 | } | |
b1cc4aeb | 10037 | break; |
ee065d83 PB |
10038 | case Tag_PCS_config: |
10039 | if (out_attr[i].i == 0) | |
10040 | out_attr[i].i = in_attr[i].i; | |
10041 | else if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
10042 | { | |
10043 | /* It's sometimes ok to mix different configs, so this is only | |
10044 | a warning. */ | |
10045 | _bfd_error_handler | |
10046 | (_("Warning: %B: Conflicting platform configuration"), ibfd); | |
10047 | } | |
10048 | break; | |
10049 | case Tag_ABI_PCS_R9_use: | |
004ae526 PB |
10050 | if (in_attr[i].i != out_attr[i].i |
10051 | && out_attr[i].i != AEABI_R9_unused | |
ee065d83 PB |
10052 | && in_attr[i].i != AEABI_R9_unused) |
10053 | { | |
10054 | _bfd_error_handler | |
3895f852 | 10055 | (_("error: %B: Conflicting use of R9"), ibfd); |
91e22acd | 10056 | result = FALSE; |
ee065d83 PB |
10057 | } |
10058 | if (out_attr[i].i == AEABI_R9_unused) | |
10059 | out_attr[i].i = in_attr[i].i; | |
10060 | break; | |
10061 | case Tag_ABI_PCS_RW_data: | |
10062 | if (in_attr[i].i == AEABI_PCS_RW_data_SBrel | |
10063 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB | |
10064 | && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) | |
10065 | { | |
10066 | _bfd_error_handler | |
3895f852 | 10067 | (_("error: %B: SB relative addressing conflicts with use of R9"), |
ee065d83 | 10068 | ibfd); |
91e22acd | 10069 | result = FALSE; |
ee065d83 PB |
10070 | } |
10071 | /* Use the smallest value specified. */ | |
10072 | if (in_attr[i].i < out_attr[i].i) | |
10073 | out_attr[i].i = in_attr[i].i; | |
10074 | break; | |
ee065d83 | 10075 | case Tag_ABI_PCS_wchar_t: |
a9dc9481 JM |
10076 | if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i |
10077 | && !elf_arm_tdata (obfd)->no_wchar_size_warning) | |
ee065d83 PB |
10078 | { |
10079 | _bfd_error_handler | |
a9dc9481 JM |
10080 | (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), |
10081 | ibfd, in_attr[i].i, out_attr[i].i); | |
ee065d83 | 10082 | } |
a9dc9481 | 10083 | else if (in_attr[i].i && !out_attr[i].i) |
ee065d83 PB |
10084 | out_attr[i].i = in_attr[i].i; |
10085 | break; | |
ee065d83 PB |
10086 | case Tag_ABI_enum_size: |
10087 | if (in_attr[i].i != AEABI_enum_unused) | |
10088 | { | |
10089 | if (out_attr[i].i == AEABI_enum_unused | |
10090 | || out_attr[i].i == AEABI_enum_forced_wide) | |
10091 | { | |
10092 | /* The existing object is compatible with anything. | |
10093 | Use whatever requirements the new object has. */ | |
10094 | out_attr[i].i = in_attr[i].i; | |
10095 | } | |
10096 | else if (in_attr[i].i != AEABI_enum_forced_wide | |
bf21ed78 | 10097 | && out_attr[i].i != in_attr[i].i |
0ffa91dd | 10098 | && !elf_arm_tdata (obfd)->no_enum_size_warning) |
ee065d83 | 10099 | { |
91e22acd | 10100 | static const char *aeabi_enum_names[] = |
bf21ed78 | 10101 | { "", "variable-size", "32-bit", "" }; |
91e22acd AS |
10102 | const char *in_name = |
10103 | in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
10104 | ? aeabi_enum_names[in_attr[i].i] | |
10105 | : "<unknown>"; | |
10106 | const char *out_name = | |
10107 | out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) | |
10108 | ? aeabi_enum_names[out_attr[i].i] | |
10109 | : "<unknown>"; | |
ee065d83 | 10110 | _bfd_error_handler |
bf21ed78 | 10111 | (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), |
91e22acd | 10112 | ibfd, in_name, out_name); |
ee065d83 PB |
10113 | } |
10114 | } | |
10115 | break; | |
10116 | case Tag_ABI_VFP_args: | |
10117 | /* Aready done. */ | |
10118 | break; | |
10119 | case Tag_ABI_WMMX_args: | |
10120 | if (in_attr[i].i != out_attr[i].i) | |
10121 | { | |
10122 | _bfd_error_handler | |
3895f852 | 10123 | (_("error: %B uses iWMMXt register arguments, %B does not"), |
ee065d83 | 10124 | ibfd, obfd); |
91e22acd | 10125 | result = FALSE; |
ee065d83 PB |
10126 | } |
10127 | break; | |
7b86a9fa AS |
10128 | case Tag_compatibility: |
10129 | /* Merged in target-independent code. */ | |
10130 | break; | |
91e22acd AS |
10131 | case Tag_ABI_HardFP_use: |
10132 | /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */ | |
10133 | if ((in_attr[i].i == 1 && out_attr[i].i == 2) | |
10134 | || (in_attr[i].i == 2 && out_attr[i].i == 1)) | |
10135 | out_attr[i].i = 3; | |
10136 | else if (in_attr[i].i > out_attr[i].i) | |
10137 | out_attr[i].i = in_attr[i].i; | |
10138 | break; | |
10139 | case Tag_ABI_FP_16bit_format: | |
10140 | if (in_attr[i].i != 0 && out_attr[i].i != 0) | |
10141 | { | |
10142 | if (in_attr[i].i != out_attr[i].i) | |
10143 | { | |
10144 | _bfd_error_handler | |
3895f852 | 10145 | (_("error: fp16 format mismatch between %B and %B"), |
91e22acd AS |
10146 | ibfd, obfd); |
10147 | result = FALSE; | |
10148 | } | |
10149 | } | |
10150 | if (in_attr[i].i != 0) | |
10151 | out_attr[i].i = in_attr[i].i; | |
10152 | break; | |
7b86a9fa | 10153 | |
91e22acd | 10154 | case Tag_nodefaults: |
2d0bb761 AS |
10155 | /* This tag is set if it exists, but the value is unused (and is |
10156 | typically zero). We don't actually need to do anything here - | |
10157 | the merge happens automatically when the type flags are merged | |
10158 | below. */ | |
91e22acd AS |
10159 | break; |
10160 | case Tag_also_compatible_with: | |
10161 | /* Already done in Tag_CPU_arch. */ | |
10162 | break; | |
10163 | case Tag_conformance: | |
10164 | /* Keep the attribute if it matches. Throw it away otherwise. | |
10165 | No attribute means no claim to conform. */ | |
10166 | if (!in_attr[i].s || !out_attr[i].s | |
10167 | || strcmp (in_attr[i].s, out_attr[i].s) != 0) | |
10168 | out_attr[i].s = NULL; | |
10169 | break; | |
3cfad14c | 10170 | |
91e22acd | 10171 | default: |
3cfad14c | 10172 | { |
91e22acd AS |
10173 | bfd *err_bfd = NULL; |
10174 | ||
10175 | /* The "known_obj_attributes" table does contain some undefined | |
10176 | attributes. Ensure that there are unused. */ | |
10177 | if (out_attr[i].i != 0 || out_attr[i].s != NULL) | |
10178 | err_bfd = obfd; | |
10179 | else if (in_attr[i].i != 0 || in_attr[i].s != NULL) | |
10180 | err_bfd = ibfd; | |
10181 | ||
10182 | if (err_bfd != NULL) | |
10183 | { | |
10184 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ | |
10185 | if ((i & 127) < 64) | |
10186 | { | |
10187 | _bfd_error_handler | |
10188 | (_("%B: Unknown mandatory EABI object attribute %d"), | |
10189 | err_bfd, i); | |
10190 | bfd_set_error (bfd_error_bad_value); | |
10191 | result = FALSE; | |
10192 | } | |
10193 | else | |
10194 | { | |
10195 | _bfd_error_handler | |
10196 | (_("Warning: %B: Unknown EABI object attribute %d"), | |
10197 | err_bfd, i); | |
10198 | } | |
10199 | } | |
10200 | ||
10201 | /* Only pass on attributes that match in both inputs. */ | |
10202 | if (in_attr[i].i != out_attr[i].i | |
10203 | || in_attr[i].s != out_attr[i].s | |
10204 | || (in_attr[i].s != NULL && out_attr[i].s != NULL | |
10205 | && strcmp (in_attr[i].s, out_attr[i].s) != 0)) | |
10206 | { | |
10207 | out_attr[i].i = 0; | |
10208 | out_attr[i].s = NULL; | |
10209 | } | |
3cfad14c | 10210 | } |
91e22acd AS |
10211 | } |
10212 | ||
10213 | /* If out_attr was copied from in_attr then it won't have a type yet. */ | |
10214 | if (in_attr[i].type && !out_attr[i].type) | |
10215 | out_attr[i].type = in_attr[i].type; | |
ee065d83 PB |
10216 | } |
10217 | ||
104d59d1 JM |
10218 | /* Merge Tag_compatibility attributes and any common GNU ones. */ |
10219 | _bfd_elf_merge_object_attributes (ibfd, obfd); | |
ee065d83 | 10220 | |
104d59d1 JM |
10221 | /* Check for any attributes not known on ARM. */ |
10222 | in_list = elf_other_obj_attributes_proc (ibfd); | |
91e22acd AS |
10223 | out_listp = &elf_other_obj_attributes_proc (obfd); |
10224 | out_list = *out_listp; | |
8e79c3df | 10225 | |
91e22acd | 10226 | for (; in_list || out_list; ) |
ee065d83 | 10227 | { |
91e22acd AS |
10228 | bfd *err_bfd = NULL; |
10229 | int err_tag = 0; | |
8e79c3df CM |
10230 | |
10231 | /* The tags for each list are in numerical order. */ | |
10232 | /* If the tags are equal, then merge. */ | |
91e22acd | 10233 | if (out_list && (!in_list || in_list->tag > out_list->tag)) |
8e79c3df | 10234 | { |
91e22acd AS |
10235 | /* This attribute only exists in obfd. We can't merge, and we don't |
10236 | know what the tag means, so delete it. */ | |
10237 | err_bfd = obfd; | |
10238 | err_tag = out_list->tag; | |
10239 | *out_listp = out_list->next; | |
10240 | out_list = *out_listp; | |
8e79c3df | 10241 | } |
91e22acd | 10242 | else if (in_list && (!out_list || in_list->tag < out_list->tag)) |
8e79c3df | 10243 | { |
91e22acd AS |
10244 | /* This attribute only exists in ibfd. We can't merge, and we don't |
10245 | know what the tag means, so ignore it. */ | |
10246 | err_bfd = ibfd; | |
10247 | err_tag = in_list->tag; | |
8e79c3df | 10248 | in_list = in_list->next; |
eb111b1f | 10249 | } |
91e22acd AS |
10250 | else /* The tags are equal. */ |
10251 | { | |
10252 | /* As present, all attributes in the list are unknown, and | |
10253 | therefore can't be merged meaningfully. */ | |
10254 | err_bfd = obfd; | |
10255 | err_tag = out_list->tag; | |
10256 | ||
10257 | /* Only pass on attributes that match in both inputs. */ | |
10258 | if (in_list->attr.i != out_list->attr.i | |
10259 | || in_list->attr.s != out_list->attr.s | |
10260 | || (in_list->attr.s && out_list->attr.s | |
10261 | && strcmp (in_list->attr.s, out_list->attr.s) != 0)) | |
10262 | { | |
10263 | /* No match. Delete the attribute. */ | |
10264 | *out_listp = out_list->next; | |
10265 | out_list = *out_listp; | |
10266 | } | |
10267 | else | |
10268 | { | |
10269 | /* Matched. Keep the attribute and move to the next. */ | |
10270 | out_list = out_list->next; | |
10271 | in_list = in_list->next; | |
10272 | } | |
10273 | } | |
10274 | ||
10275 | if (err_bfd) | |
10276 | { | |
10277 | /* Attribute numbers >=64 (mod 128) can be safely ignored. */ | |
10278 | if ((err_tag & 127) < 64) | |
10279 | { | |
10280 | _bfd_error_handler | |
10281 | (_("%B: Unknown mandatory EABI object attribute %d"), | |
10282 | err_bfd, err_tag); | |
10283 | bfd_set_error (bfd_error_bad_value); | |
10284 | result = FALSE; | |
10285 | } | |
10286 | else | |
10287 | { | |
10288 | _bfd_error_handler | |
10289 | (_("Warning: %B: Unknown EABI object attribute %d"), | |
10290 | err_bfd, err_tag); | |
10291 | } | |
10292 | } | |
ee065d83 | 10293 | } |
91e22acd | 10294 | return result; |
252b5132 RH |
10295 | } |
10296 | ||
3a4a14e9 PB |
10297 | |
10298 | /* Return TRUE if the two EABI versions are incompatible. */ | |
10299 | ||
10300 | static bfd_boolean | |
10301 | elf32_arm_versions_compatible (unsigned iver, unsigned over) | |
10302 | { | |
10303 | /* v4 and v5 are the same spec before and after it was released, | |
10304 | so allow mixing them. */ | |
10305 | if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) | |
10306 | || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) | |
10307 | return TRUE; | |
10308 | ||
10309 | return (iver == over); | |
10310 | } | |
10311 | ||
252b5132 RH |
10312 | /* Merge backend specific data from an object file to the output |
10313 | object file when linking. */ | |
9b485d32 | 10314 | |
b34976b6 | 10315 | static bfd_boolean |
21d799b5 | 10316 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd); |
252b5132 | 10317 | |
9b485d32 NC |
10318 | /* Display the flags field. */ |
10319 | ||
b34976b6 | 10320 | static bfd_boolean |
57e8b36a | 10321 | elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) |
252b5132 | 10322 | { |
fc830a83 NC |
10323 | FILE * file = (FILE *) ptr; |
10324 | unsigned long flags; | |
252b5132 RH |
10325 | |
10326 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
10327 | ||
10328 | /* Print normal ELF private data. */ | |
10329 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
10330 | ||
fc830a83 | 10331 | flags = elf_elfheader (abfd)->e_flags; |
9b485d32 NC |
10332 | /* Ignore init flag - it may not be set, despite the flags field |
10333 | containing valid data. */ | |
252b5132 RH |
10334 | |
10335 | /* xgettext:c-format */ | |
9b485d32 | 10336 | fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); |
252b5132 | 10337 | |
fc830a83 NC |
10338 | switch (EF_ARM_EABI_VERSION (flags)) |
10339 | { | |
10340 | case EF_ARM_EABI_UNKNOWN: | |
4cc11e76 | 10341 | /* The following flag bits are GNU extensions and not part of the |
fc830a83 NC |
10342 | official ARM ELF extended ABI. Hence they are only decoded if |
10343 | the EABI version is not set. */ | |
fd2ec330 | 10344 | if (flags & EF_ARM_INTERWORK) |
9b485d32 | 10345 | fprintf (file, _(" [interworking enabled]")); |
9a5aca8c | 10346 | |
fd2ec330 | 10347 | if (flags & EF_ARM_APCS_26) |
6c571f00 | 10348 | fprintf (file, " [APCS-26]"); |
fc830a83 | 10349 | else |
6c571f00 | 10350 | fprintf (file, " [APCS-32]"); |
9a5aca8c | 10351 | |
96a846ea RE |
10352 | if (flags & EF_ARM_VFP_FLOAT) |
10353 | fprintf (file, _(" [VFP float format]")); | |
fde78edd NC |
10354 | else if (flags & EF_ARM_MAVERICK_FLOAT) |
10355 | fprintf (file, _(" [Maverick float format]")); | |
96a846ea RE |
10356 | else |
10357 | fprintf (file, _(" [FPA float format]")); | |
10358 | ||
fd2ec330 | 10359 | if (flags & EF_ARM_APCS_FLOAT) |
9b485d32 | 10360 | fprintf (file, _(" [floats passed in float registers]")); |
9a5aca8c | 10361 | |
fd2ec330 | 10362 | if (flags & EF_ARM_PIC) |
9b485d32 | 10363 | fprintf (file, _(" [position independent]")); |
fc830a83 | 10364 | |
fd2ec330 | 10365 | if (flags & EF_ARM_NEW_ABI) |
9b485d32 | 10366 | fprintf (file, _(" [new ABI]")); |
9a5aca8c | 10367 | |
fd2ec330 | 10368 | if (flags & EF_ARM_OLD_ABI) |
9b485d32 | 10369 | fprintf (file, _(" [old ABI]")); |
9a5aca8c | 10370 | |
fd2ec330 | 10371 | if (flags & EF_ARM_SOFT_FLOAT) |
9b485d32 | 10372 | fprintf (file, _(" [software FP]")); |
9a5aca8c | 10373 | |
96a846ea RE |
10374 | flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT |
10375 | | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | |
fde78edd NC |
10376 | | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT |
10377 | | EF_ARM_MAVERICK_FLOAT); | |
fc830a83 | 10378 | break; |
9a5aca8c | 10379 | |
fc830a83 | 10380 | case EF_ARM_EABI_VER1: |
9b485d32 | 10381 | fprintf (file, _(" [Version1 EABI]")); |
9a5aca8c | 10382 | |
fc830a83 | 10383 | if (flags & EF_ARM_SYMSARESORTED) |
9b485d32 | 10384 | fprintf (file, _(" [sorted symbol table]")); |
fc830a83 | 10385 | else |
9b485d32 | 10386 | fprintf (file, _(" [unsorted symbol table]")); |
9a5aca8c | 10387 | |
fc830a83 NC |
10388 | flags &= ~ EF_ARM_SYMSARESORTED; |
10389 | break; | |
9a5aca8c | 10390 | |
fd2ec330 PB |
10391 | case EF_ARM_EABI_VER2: |
10392 | fprintf (file, _(" [Version2 EABI]")); | |
10393 | ||
10394 | if (flags & EF_ARM_SYMSARESORTED) | |
10395 | fprintf (file, _(" [sorted symbol table]")); | |
10396 | else | |
10397 | fprintf (file, _(" [unsorted symbol table]")); | |
10398 | ||
10399 | if (flags & EF_ARM_DYNSYMSUSESEGIDX) | |
10400 | fprintf (file, _(" [dynamic symbols use segment index]")); | |
10401 | ||
10402 | if (flags & EF_ARM_MAPSYMSFIRST) | |
10403 | fprintf (file, _(" [mapping symbols precede others]")); | |
10404 | ||
99e4ae17 | 10405 | flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX |
fd2ec330 PB |
10406 | | EF_ARM_MAPSYMSFIRST); |
10407 | break; | |
10408 | ||
d507cf36 PB |
10409 | case EF_ARM_EABI_VER3: |
10410 | fprintf (file, _(" [Version3 EABI]")); | |
8cb51566 PB |
10411 | break; |
10412 | ||
10413 | case EF_ARM_EABI_VER4: | |
10414 | fprintf (file, _(" [Version4 EABI]")); | |
3a4a14e9 | 10415 | goto eabi; |
d507cf36 | 10416 | |
3a4a14e9 PB |
10417 | case EF_ARM_EABI_VER5: |
10418 | fprintf (file, _(" [Version5 EABI]")); | |
10419 | eabi: | |
d507cf36 PB |
10420 | if (flags & EF_ARM_BE8) |
10421 | fprintf (file, _(" [BE8]")); | |
10422 | ||
10423 | if (flags & EF_ARM_LE8) | |
10424 | fprintf (file, _(" [LE8]")); | |
10425 | ||
10426 | flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); | |
10427 | break; | |
10428 | ||
fc830a83 | 10429 | default: |
9b485d32 | 10430 | fprintf (file, _(" <EABI version unrecognised>")); |
fc830a83 NC |
10431 | break; |
10432 | } | |
252b5132 | 10433 | |
fc830a83 | 10434 | flags &= ~ EF_ARM_EABIMASK; |
252b5132 | 10435 | |
fc830a83 | 10436 | if (flags & EF_ARM_RELEXEC) |
9b485d32 | 10437 | fprintf (file, _(" [relocatable executable]")); |
252b5132 | 10438 | |
fc830a83 | 10439 | if (flags & EF_ARM_HASENTRY) |
9b485d32 | 10440 | fprintf (file, _(" [has entry point]")); |
252b5132 | 10441 | |
fc830a83 NC |
10442 | flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY); |
10443 | ||
10444 | if (flags) | |
9b485d32 | 10445 | fprintf (file, _("<Unrecognised flag bits set>")); |
9a5aca8c | 10446 | |
252b5132 RH |
10447 | fputc ('\n', file); |
10448 | ||
b34976b6 | 10449 | return TRUE; |
252b5132 RH |
10450 | } |
10451 | ||
10452 | static int | |
57e8b36a | 10453 | elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) |
252b5132 | 10454 | { |
2f0ca46a NC |
10455 | switch (ELF_ST_TYPE (elf_sym->st_info)) |
10456 | { | |
10457 | case STT_ARM_TFUNC: | |
10458 | return ELF_ST_TYPE (elf_sym->st_info); | |
ce855c42 | 10459 | |
2f0ca46a NC |
10460 | case STT_ARM_16BIT: |
10461 | /* If the symbol is not an object, return the STT_ARM_16BIT flag. | |
10462 | This allows us to distinguish between data used by Thumb instructions | |
10463 | and non-data (which is probably code) inside Thumb regions of an | |
10464 | executable. */ | |
1a0eb693 | 10465 | if (type != STT_OBJECT && type != STT_TLS) |
2f0ca46a NC |
10466 | return ELF_ST_TYPE (elf_sym->st_info); |
10467 | break; | |
9a5aca8c | 10468 | |
ce855c42 NC |
10469 | default: |
10470 | break; | |
2f0ca46a NC |
10471 | } |
10472 | ||
10473 | return type; | |
252b5132 | 10474 | } |
f21f3fe0 | 10475 | |
252b5132 | 10476 | static asection * |
07adf181 AM |
10477 | elf32_arm_gc_mark_hook (asection *sec, |
10478 | struct bfd_link_info *info, | |
10479 | Elf_Internal_Rela *rel, | |
10480 | struct elf_link_hash_entry *h, | |
10481 | Elf_Internal_Sym *sym) | |
252b5132 RH |
10482 | { |
10483 | if (h != NULL) | |
07adf181 | 10484 | switch (ELF32_R_TYPE (rel->r_info)) |
252b5132 RH |
10485 | { |
10486 | case R_ARM_GNU_VTINHERIT: | |
10487 | case R_ARM_GNU_VTENTRY: | |
07adf181 AM |
10488 | return NULL; |
10489 | } | |
9ad5cbcf | 10490 | |
07adf181 | 10491 | return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); |
252b5132 RH |
10492 | } |
10493 | ||
780a67af NC |
10494 | /* Update the got entry reference counts for the section being removed. */ |
10495 | ||
b34976b6 | 10496 | static bfd_boolean |
ba93b8ac DJ |
10497 | elf32_arm_gc_sweep_hook (bfd * abfd, |
10498 | struct bfd_link_info * info, | |
10499 | asection * sec, | |
10500 | const Elf_Internal_Rela * relocs) | |
252b5132 | 10501 | { |
5e681ec4 PB |
10502 | Elf_Internal_Shdr *symtab_hdr; |
10503 | struct elf_link_hash_entry **sym_hashes; | |
10504 | bfd_signed_vma *local_got_refcounts; | |
10505 | const Elf_Internal_Rela *rel, *relend; | |
eb043451 PB |
10506 | struct elf32_arm_link_hash_table * globals; |
10507 | ||
7dda2462 TG |
10508 | if (info->relocatable) |
10509 | return TRUE; | |
10510 | ||
eb043451 | 10511 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
10512 | if (globals == NULL) |
10513 | return FALSE; | |
5e681ec4 PB |
10514 | |
10515 | elf_section_data (sec)->local_dynrel = NULL; | |
10516 | ||
0ffa91dd | 10517 | symtab_hdr = & elf_symtab_hdr (abfd); |
5e681ec4 PB |
10518 | sym_hashes = elf_sym_hashes (abfd); |
10519 | local_got_refcounts = elf_local_got_refcounts (abfd); | |
10520 | ||
906e58ca | 10521 | check_use_blx (globals); |
bd97cb95 | 10522 | |
5e681ec4 PB |
10523 | relend = relocs + sec->reloc_count; |
10524 | for (rel = relocs; rel < relend; rel++) | |
eb043451 | 10525 | { |
3eb128b2 AM |
10526 | unsigned long r_symndx; |
10527 | struct elf_link_hash_entry *h = NULL; | |
eb043451 | 10528 | int r_type; |
5e681ec4 | 10529 | |
3eb128b2 AM |
10530 | r_symndx = ELF32_R_SYM (rel->r_info); |
10531 | if (r_symndx >= symtab_hdr->sh_info) | |
10532 | { | |
10533 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
10534 | while (h->root.type == bfd_link_hash_indirect | |
10535 | || h->root.type == bfd_link_hash_warning) | |
10536 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
10537 | } | |
10538 | ||
eb043451 | 10539 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 10540 | r_type = arm_real_reloc_type (globals, r_type); |
eb043451 PB |
10541 | switch (r_type) |
10542 | { | |
10543 | case R_ARM_GOT32: | |
eb043451 | 10544 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
10545 | case R_ARM_TLS_GD32: |
10546 | case R_ARM_TLS_IE32: | |
3eb128b2 | 10547 | if (h != NULL) |
eb043451 | 10548 | { |
eb043451 PB |
10549 | if (h->got.refcount > 0) |
10550 | h->got.refcount -= 1; | |
10551 | } | |
10552 | else if (local_got_refcounts != NULL) | |
10553 | { | |
10554 | if (local_got_refcounts[r_symndx] > 0) | |
10555 | local_got_refcounts[r_symndx] -= 1; | |
10556 | } | |
10557 | break; | |
10558 | ||
ba93b8ac | 10559 | case R_ARM_TLS_LDM32: |
4dfe6ac6 | 10560 | globals->tls_ldm_got.refcount -= 1; |
ba93b8ac DJ |
10561 | break; |
10562 | ||
eb043451 | 10563 | case R_ARM_ABS32: |
bb224fc3 | 10564 | case R_ARM_ABS32_NOI: |
eb043451 | 10565 | case R_ARM_REL32: |
bb224fc3 | 10566 | case R_ARM_REL32_NOI: |
eb043451 PB |
10567 | case R_ARM_PC24: |
10568 | case R_ARM_PLT32: | |
5b5bb741 PB |
10569 | case R_ARM_CALL: |
10570 | case R_ARM_JUMP24: | |
eb043451 | 10571 | case R_ARM_PREL31: |
c19d1205 | 10572 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
10573 | case R_ARM_THM_JUMP24: |
10574 | case R_ARM_THM_JUMP19: | |
b6895b4f PB |
10575 | case R_ARM_MOVW_ABS_NC: |
10576 | case R_ARM_MOVT_ABS: | |
10577 | case R_ARM_MOVW_PREL_NC: | |
10578 | case R_ARM_MOVT_PREL: | |
10579 | case R_ARM_THM_MOVW_ABS_NC: | |
10580 | case R_ARM_THM_MOVT_ABS: | |
10581 | case R_ARM_THM_MOVW_PREL_NC: | |
10582 | case R_ARM_THM_MOVT_PREL: | |
b7693d02 DJ |
10583 | /* Should the interworking branches be here also? */ |
10584 | ||
3eb128b2 | 10585 | if (h != NULL) |
eb043451 PB |
10586 | { |
10587 | struct elf32_arm_link_hash_entry *eh; | |
10588 | struct elf32_arm_relocs_copied **pp; | |
10589 | struct elf32_arm_relocs_copied *p; | |
5e681ec4 | 10590 | |
b7693d02 | 10591 | eh = (struct elf32_arm_link_hash_entry *) h; |
5e681ec4 | 10592 | |
eb043451 | 10593 | if (h->plt.refcount > 0) |
b7693d02 DJ |
10594 | { |
10595 | h->plt.refcount -= 1; | |
bd97cb95 DJ |
10596 | if (r_type == R_ARM_THM_CALL) |
10597 | eh->plt_maybe_thumb_refcount--; | |
10598 | ||
10599 | if (r_type == R_ARM_THM_JUMP24 | |
10600 | || r_type == R_ARM_THM_JUMP19) | |
b7693d02 DJ |
10601 | eh->plt_thumb_refcount--; |
10602 | } | |
5e681ec4 | 10603 | |
eb043451 | 10604 | if (r_type == R_ARM_ABS32 |
bb224fc3 MS |
10605 | || r_type == R_ARM_REL32 |
10606 | || r_type == R_ARM_ABS32_NOI | |
10607 | || r_type == R_ARM_REL32_NOI) | |
eb043451 | 10608 | { |
eb043451 PB |
10609 | for (pp = &eh->relocs_copied; (p = *pp) != NULL; |
10610 | pp = &p->next) | |
10611 | if (p->section == sec) | |
10612 | { | |
10613 | p->count -= 1; | |
bb224fc3 MS |
10614 | if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32 |
10615 | || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI) | |
ba93b8ac | 10616 | p->pc_count -= 1; |
eb043451 PB |
10617 | if (p->count == 0) |
10618 | *pp = p->next; | |
10619 | break; | |
10620 | } | |
10621 | } | |
10622 | } | |
10623 | break; | |
5e681ec4 | 10624 | |
eb043451 PB |
10625 | default: |
10626 | break; | |
10627 | } | |
10628 | } | |
5e681ec4 | 10629 | |
b34976b6 | 10630 | return TRUE; |
252b5132 RH |
10631 | } |
10632 | ||
780a67af NC |
10633 | /* Look through the relocs for a section during the first phase. */ |
10634 | ||
b34976b6 | 10635 | static bfd_boolean |
57e8b36a NC |
10636 | elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, |
10637 | asection *sec, const Elf_Internal_Rela *relocs) | |
252b5132 | 10638 | { |
b34976b6 AM |
10639 | Elf_Internal_Shdr *symtab_hdr; |
10640 | struct elf_link_hash_entry **sym_hashes; | |
b34976b6 AM |
10641 | const Elf_Internal_Rela *rel; |
10642 | const Elf_Internal_Rela *rel_end; | |
10643 | bfd *dynobj; | |
5e681ec4 | 10644 | asection *sreloc; |
b34976b6 | 10645 | bfd_vma *local_got_offsets; |
5e681ec4 | 10646 | struct elf32_arm_link_hash_table *htab; |
39623e12 | 10647 | bfd_boolean needs_plt; |
ce98a316 | 10648 | unsigned long nsyms; |
9a5aca8c | 10649 | |
1049f94e | 10650 | if (info->relocatable) |
b34976b6 | 10651 | return TRUE; |
9a5aca8c | 10652 | |
0ffa91dd NC |
10653 | BFD_ASSERT (is_arm_elf (abfd)); |
10654 | ||
5e681ec4 | 10655 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
10656 | if (htab == NULL) |
10657 | return FALSE; | |
10658 | ||
5e681ec4 | 10659 | sreloc = NULL; |
9a5aca8c | 10660 | |
67687978 PB |
10661 | /* Create dynamic sections for relocatable executables so that we can |
10662 | copy relocations. */ | |
10663 | if (htab->root.is_relocatable_executable | |
10664 | && ! htab->root.dynamic_sections_created) | |
10665 | { | |
10666 | if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) | |
10667 | return FALSE; | |
10668 | } | |
10669 | ||
252b5132 RH |
10670 | dynobj = elf_hash_table (info)->dynobj; |
10671 | local_got_offsets = elf_local_got_offsets (abfd); | |
f21f3fe0 | 10672 | |
0ffa91dd | 10673 | symtab_hdr = & elf_symtab_hdr (abfd); |
252b5132 | 10674 | sym_hashes = elf_sym_hashes (abfd); |
ce98a316 NC |
10675 | nsyms = NUM_SHDR_ENTRIES (symtab_hdr); |
10676 | ||
252b5132 RH |
10677 | rel_end = relocs + sec->reloc_count; |
10678 | for (rel = relocs; rel < rel_end; rel++) | |
10679 | { | |
10680 | struct elf_link_hash_entry *h; | |
b7693d02 | 10681 | struct elf32_arm_link_hash_entry *eh; |
252b5132 | 10682 | unsigned long r_symndx; |
eb043451 | 10683 | int r_type; |
9a5aca8c | 10684 | |
252b5132 | 10685 | r_symndx = ELF32_R_SYM (rel->r_info); |
eb043451 | 10686 | r_type = ELF32_R_TYPE (rel->r_info); |
eb043451 | 10687 | r_type = arm_real_reloc_type (htab, r_type); |
ba93b8ac | 10688 | |
ce98a316 NC |
10689 | if (r_symndx >= nsyms |
10690 | /* PR 9934: It is possible to have relocations that do not | |
10691 | refer to symbols, thus it is also possible to have an | |
10692 | object file containing relocations but no symbol table. */ | |
10693 | && (r_symndx > 0 || nsyms > 0)) | |
ba93b8ac DJ |
10694 | { |
10695 | (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd, | |
ce98a316 | 10696 | r_symndx); |
ba93b8ac DJ |
10697 | return FALSE; |
10698 | } | |
10699 | ||
ce98a316 | 10700 | if (nsyms == 0 || r_symndx < symtab_hdr->sh_info) |
252b5132 RH |
10701 | h = NULL; |
10702 | else | |
973a3492 L |
10703 | { |
10704 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
10705 | while (h->root.type == bfd_link_hash_indirect | |
10706 | || h->root.type == bfd_link_hash_warning) | |
10707 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
10708 | } | |
9a5aca8c | 10709 | |
b7693d02 DJ |
10710 | eh = (struct elf32_arm_link_hash_entry *) h; |
10711 | ||
eb043451 | 10712 | switch (r_type) |
252b5132 | 10713 | { |
5e681ec4 | 10714 | case R_ARM_GOT32: |
eb043451 | 10715 | case R_ARM_GOT_PREL: |
ba93b8ac DJ |
10716 | case R_ARM_TLS_GD32: |
10717 | case R_ARM_TLS_IE32: | |
5e681ec4 | 10718 | /* This symbol requires a global offset table entry. */ |
ba93b8ac DJ |
10719 | { |
10720 | int tls_type, old_tls_type; | |
5e681ec4 | 10721 | |
ba93b8ac DJ |
10722 | switch (r_type) |
10723 | { | |
10724 | case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; | |
10725 | case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; | |
10726 | default: tls_type = GOT_NORMAL; break; | |
10727 | } | |
252b5132 | 10728 | |
ba93b8ac DJ |
10729 | if (h != NULL) |
10730 | { | |
10731 | h->got.refcount++; | |
10732 | old_tls_type = elf32_arm_hash_entry (h)->tls_type; | |
10733 | } | |
10734 | else | |
10735 | { | |
10736 | bfd_signed_vma *local_got_refcounts; | |
10737 | ||
10738 | /* This is a global offset table entry for a local symbol. */ | |
10739 | local_got_refcounts = elf_local_got_refcounts (abfd); | |
10740 | if (local_got_refcounts == NULL) | |
10741 | { | |
10742 | bfd_size_type size; | |
906e58ca | 10743 | |
ba93b8ac | 10744 | size = symtab_hdr->sh_info; |
906e58ca | 10745 | size *= (sizeof (bfd_signed_vma) + sizeof (char)); |
21d799b5 NC |
10746 | local_got_refcounts = (bfd_signed_vma *) |
10747 | bfd_zalloc (abfd, size); | |
ba93b8ac DJ |
10748 | if (local_got_refcounts == NULL) |
10749 | return FALSE; | |
10750 | elf_local_got_refcounts (abfd) = local_got_refcounts; | |
10751 | elf32_arm_local_got_tls_type (abfd) | |
10752 | = (char *) (local_got_refcounts + symtab_hdr->sh_info); | |
10753 | } | |
10754 | local_got_refcounts[r_symndx] += 1; | |
10755 | old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; | |
10756 | } | |
10757 | ||
10758 | /* We will already have issued an error message if there is a | |
10759 | TLS / non-TLS mismatch, based on the symbol type. We don't | |
10760 | support any linker relaxations. So just combine any TLS | |
10761 | types needed. */ | |
10762 | if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL | |
10763 | && tls_type != GOT_NORMAL) | |
10764 | tls_type |= old_tls_type; | |
10765 | ||
10766 | if (old_tls_type != tls_type) | |
10767 | { | |
10768 | if (h != NULL) | |
10769 | elf32_arm_hash_entry (h)->tls_type = tls_type; | |
10770 | else | |
10771 | elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; | |
10772 | } | |
10773 | } | |
8029a119 | 10774 | /* Fall through. */ |
ba93b8ac DJ |
10775 | |
10776 | case R_ARM_TLS_LDM32: | |
10777 | if (r_type == R_ARM_TLS_LDM32) | |
10778 | htab->tls_ldm_got.refcount++; | |
8029a119 | 10779 | /* Fall through. */ |
252b5132 | 10780 | |
c19d1205 | 10781 | case R_ARM_GOTOFF32: |
5e681ec4 PB |
10782 | case R_ARM_GOTPC: |
10783 | if (htab->sgot == NULL) | |
10784 | { | |
10785 | if (htab->root.dynobj == NULL) | |
10786 | htab->root.dynobj = abfd; | |
10787 | if (!create_got_section (htab->root.dynobj, info)) | |
10788 | return FALSE; | |
10789 | } | |
252b5132 RH |
10790 | break; |
10791 | ||
00a97672 RS |
10792 | case R_ARM_ABS12: |
10793 | /* VxWorks uses dynamic R_ARM_ABS12 relocations for | |
10794 | ldr __GOTT_INDEX__ offsets. */ | |
10795 | if (!htab->vxworks_p) | |
10796 | break; | |
8029a119 | 10797 | /* Fall through. */ |
00a97672 | 10798 | |
252b5132 | 10799 | case R_ARM_PC24: |
7359ea65 | 10800 | case R_ARM_PLT32: |
5b5bb741 PB |
10801 | case R_ARM_CALL: |
10802 | case R_ARM_JUMP24: | |
eb043451 | 10803 | case R_ARM_PREL31: |
c19d1205 | 10804 | case R_ARM_THM_CALL: |
bd97cb95 DJ |
10805 | case R_ARM_THM_JUMP24: |
10806 | case R_ARM_THM_JUMP19: | |
39623e12 PB |
10807 | needs_plt = 1; |
10808 | goto normal_reloc; | |
10809 | ||
96c23d59 JM |
10810 | case R_ARM_MOVW_ABS_NC: |
10811 | case R_ARM_MOVT_ABS: | |
10812 | case R_ARM_THM_MOVW_ABS_NC: | |
10813 | case R_ARM_THM_MOVT_ABS: | |
10814 | if (info->shared) | |
10815 | { | |
10816 | (*_bfd_error_handler) | |
10817 | (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), | |
10818 | abfd, elf32_arm_howto_table_1[r_type].name, | |
10819 | (h) ? h->root.root.string : "a local symbol"); | |
10820 | bfd_set_error (bfd_error_bad_value); | |
10821 | return FALSE; | |
10822 | } | |
10823 | ||
10824 | /* Fall through. */ | |
39623e12 PB |
10825 | case R_ARM_ABS32: |
10826 | case R_ARM_ABS32_NOI: | |
10827 | case R_ARM_REL32: | |
10828 | case R_ARM_REL32_NOI: | |
b6895b4f PB |
10829 | case R_ARM_MOVW_PREL_NC: |
10830 | case R_ARM_MOVT_PREL: | |
b6895b4f PB |
10831 | case R_ARM_THM_MOVW_PREL_NC: |
10832 | case R_ARM_THM_MOVT_PREL: | |
39623e12 PB |
10833 | needs_plt = 0; |
10834 | normal_reloc: | |
10835 | ||
b7693d02 | 10836 | /* Should the interworking branches be listed here? */ |
7359ea65 | 10837 | if (h != NULL) |
5e681ec4 PB |
10838 | { |
10839 | /* If this reloc is in a read-only section, we might | |
10840 | need a copy reloc. We can't check reliably at this | |
10841 | stage whether the section is read-only, as input | |
10842 | sections have not yet been mapped to output sections. | |
10843 | Tentatively set the flag for now, and correct in | |
10844 | adjust_dynamic_symbol. */ | |
7359ea65 | 10845 | if (!info->shared) |
f5385ebf | 10846 | h->non_got_ref = 1; |
7359ea65 | 10847 | |
5e681ec4 | 10848 | /* We may need a .plt entry if the function this reloc |
c84cd8ee DJ |
10849 | refers to is in a different object. We can't tell for |
10850 | sure yet, because something later might force the | |
10851 | symbol local. */ | |
39623e12 | 10852 | if (needs_plt) |
f5385ebf | 10853 | h->needs_plt = 1; |
4f199be3 DJ |
10854 | |
10855 | /* If we create a PLT entry, this relocation will reference | |
10856 | it, even if it's an ABS32 relocation. */ | |
10857 | h->plt.refcount += 1; | |
b7693d02 | 10858 | |
bd97cb95 DJ |
10859 | /* It's too early to use htab->use_blx here, so we have to |
10860 | record possible blx references separately from | |
10861 | relocs that definitely need a thumb stub. */ | |
10862 | ||
c19d1205 | 10863 | if (r_type == R_ARM_THM_CALL) |
bd97cb95 DJ |
10864 | eh->plt_maybe_thumb_refcount += 1; |
10865 | ||
10866 | if (r_type == R_ARM_THM_JUMP24 | |
10867 | || r_type == R_ARM_THM_JUMP19) | |
b7693d02 | 10868 | eh->plt_thumb_refcount += 1; |
5e681ec4 PB |
10869 | } |
10870 | ||
67687978 PB |
10871 | /* If we are creating a shared library or relocatable executable, |
10872 | and this is a reloc against a global symbol, or a non PC | |
10873 | relative reloc against a local symbol, then we need to copy | |
10874 | the reloc into the shared library. However, if we are linking | |
10875 | with -Bsymbolic, we do not need to copy a reloc against a | |
252b5132 RH |
10876 | global symbol which is defined in an object we are |
10877 | including in the link (i.e., DEF_REGULAR is set). At | |
10878 | this point we have not seen all the input files, so it is | |
10879 | possible that DEF_REGULAR is not set now but will be set | |
10880 | later (it is never cleared). We account for that | |
10881 | possibility below by storing information in the | |
5e681ec4 | 10882 | relocs_copied field of the hash table entry. */ |
67687978 | 10883 | if ((info->shared || htab->root.is_relocatable_executable) |
5e681ec4 | 10884 | && (sec->flags & SEC_ALLOC) != 0 |
bb224fc3 | 10885 | && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI) |
71a976dd DJ |
10886 | || (h != NULL && ! h->needs_plt |
10887 | && (! info->symbolic || ! h->def_regular)))) | |
252b5132 | 10888 | { |
5e681ec4 PB |
10889 | struct elf32_arm_relocs_copied *p, **head; |
10890 | ||
252b5132 RH |
10891 | /* When creating a shared object, we must copy these |
10892 | reloc types into the output file. We create a reloc | |
10893 | section in dynobj and make room for this reloc. */ | |
83bac4b0 | 10894 | if (sreloc == NULL) |
252b5132 | 10895 | { |
83bac4b0 NC |
10896 | sreloc = _bfd_elf_make_dynamic_reloc_section |
10897 | (sec, dynobj, 2, abfd, ! htab->use_rel); | |
252b5132 | 10898 | |
83bac4b0 | 10899 | if (sreloc == NULL) |
b34976b6 | 10900 | return FALSE; |
252b5132 | 10901 | |
83bac4b0 | 10902 | /* BPABI objects never have dynamic relocations mapped. */ |
a89e6478 | 10903 | if (htab->symbian_p) |
252b5132 | 10904 | { |
83bac4b0 | 10905 | flagword flags; |
5e681ec4 | 10906 | |
83bac4b0 | 10907 | flags = bfd_get_section_flags (dynobj, sreloc); |
a89e6478 | 10908 | flags &= ~(SEC_LOAD | SEC_ALLOC); |
83bac4b0 NC |
10909 | bfd_set_section_flags (dynobj, sreloc, flags); |
10910 | } | |
252b5132 RH |
10911 | } |
10912 | ||
5e681ec4 PB |
10913 | /* If this is a global symbol, we count the number of |
10914 | relocations we need for this symbol. */ | |
10915 | if (h != NULL) | |
252b5132 | 10916 | { |
5e681ec4 PB |
10917 | head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied; |
10918 | } | |
10919 | else | |
10920 | { | |
10921 | /* Track dynamic relocs needed for local syms too. | |
10922 | We really need local syms available to do this | |
10923 | easily. Oh well. */ | |
5e681ec4 | 10924 | asection *s; |
6edfbbad | 10925 | void *vpp; |
87d72d41 | 10926 | Elf_Internal_Sym *isym; |
6edfbbad | 10927 | |
87d72d41 AM |
10928 | isym = bfd_sym_from_r_symndx (&htab->sym_cache, |
10929 | abfd, r_symndx); | |
10930 | if (isym == NULL) | |
5e681ec4 | 10931 | return FALSE; |
57e8b36a | 10932 | |
87d72d41 AM |
10933 | s = bfd_section_from_elf_index (abfd, isym->st_shndx); |
10934 | if (s == NULL) | |
10935 | s = sec; | |
10936 | ||
6edfbbad DJ |
10937 | vpp = &elf_section_data (s)->local_dynrel; |
10938 | head = (struct elf32_arm_relocs_copied **) vpp; | |
5e681ec4 | 10939 | } |
57e8b36a | 10940 | |
5e681ec4 PB |
10941 | p = *head; |
10942 | if (p == NULL || p->section != sec) | |
10943 | { | |
10944 | bfd_size_type amt = sizeof *p; | |
57e8b36a | 10945 | |
21d799b5 NC |
10946 | p = (struct elf32_arm_relocs_copied *) |
10947 | bfd_alloc (htab->root.dynobj, amt); | |
252b5132 | 10948 | if (p == NULL) |
5e681ec4 PB |
10949 | return FALSE; |
10950 | p->next = *head; | |
10951 | *head = p; | |
10952 | p->section = sec; | |
10953 | p->count = 0; | |
ba93b8ac | 10954 | p->pc_count = 0; |
252b5132 | 10955 | } |
57e8b36a | 10956 | |
bb224fc3 | 10957 | if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) |
ba93b8ac | 10958 | p->pc_count += 1; |
71a976dd | 10959 | p->count += 1; |
252b5132 RH |
10960 | } |
10961 | break; | |
10962 | ||
10963 | /* This relocation describes the C++ object vtable hierarchy. | |
10964 | Reconstruct it for later use during GC. */ | |
10965 | case R_ARM_GNU_VTINHERIT: | |
c152c796 | 10966 | if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) |
b34976b6 | 10967 | return FALSE; |
252b5132 | 10968 | break; |
9a5aca8c | 10969 | |
252b5132 RH |
10970 | /* This relocation describes which C++ vtable entries are actually |
10971 | used. Record for later use during GC. */ | |
10972 | case R_ARM_GNU_VTENTRY: | |
d17e0c6e JB |
10973 | BFD_ASSERT (h != NULL); |
10974 | if (h != NULL | |
10975 | && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
b34976b6 | 10976 | return FALSE; |
252b5132 RH |
10977 | break; |
10978 | } | |
10979 | } | |
f21f3fe0 | 10980 | |
b34976b6 | 10981 | return TRUE; |
252b5132 RH |
10982 | } |
10983 | ||
6a5bb875 PB |
10984 | /* Unwinding tables are not referenced directly. This pass marks them as |
10985 | required if the corresponding code section is marked. */ | |
10986 | ||
10987 | static bfd_boolean | |
906e58ca NC |
10988 | elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, |
10989 | elf_gc_mark_hook_fn gc_mark_hook) | |
6a5bb875 PB |
10990 | { |
10991 | bfd *sub; | |
10992 | Elf_Internal_Shdr **elf_shdrp; | |
10993 | bfd_boolean again; | |
10994 | ||
10995 | /* Marking EH data may cause additional code sections to be marked, | |
10996 | requiring multiple passes. */ | |
10997 | again = TRUE; | |
10998 | while (again) | |
10999 | { | |
11000 | again = FALSE; | |
11001 | for (sub = info->input_bfds; sub != NULL; sub = sub->link_next) | |
11002 | { | |
11003 | asection *o; | |
11004 | ||
0ffa91dd | 11005 | if (! is_arm_elf (sub)) |
6a5bb875 PB |
11006 | continue; |
11007 | ||
11008 | elf_shdrp = elf_elfsections (sub); | |
11009 | for (o = sub->sections; o != NULL; o = o->next) | |
11010 | { | |
11011 | Elf_Internal_Shdr *hdr; | |
0ffa91dd | 11012 | |
6a5bb875 | 11013 | hdr = &elf_section_data (o)->this_hdr; |
4fbb74a6 AM |
11014 | if (hdr->sh_type == SHT_ARM_EXIDX |
11015 | && hdr->sh_link | |
11016 | && hdr->sh_link < elf_numsections (sub) | |
6a5bb875 PB |
11017 | && !o->gc_mark |
11018 | && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) | |
11019 | { | |
11020 | again = TRUE; | |
11021 | if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) | |
11022 | return FALSE; | |
11023 | } | |
11024 | } | |
11025 | } | |
11026 | } | |
11027 | ||
11028 | return TRUE; | |
11029 | } | |
11030 | ||
3c9458e9 NC |
11031 | /* Treat mapping symbols as special target symbols. */ |
11032 | ||
11033 | static bfd_boolean | |
11034 | elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) | |
11035 | { | |
b0796911 PB |
11036 | return bfd_is_arm_special_symbol_name (sym->name, |
11037 | BFD_ARM_SPECIAL_SYM_TYPE_ANY); | |
3c9458e9 NC |
11038 | } |
11039 | ||
0367ecfb NC |
11040 | /* This is a copy of elf_find_function() from elf.c except that |
11041 | ARM mapping symbols are ignored when looking for function names | |
11042 | and STT_ARM_TFUNC is considered to a function type. */ | |
252b5132 | 11043 | |
0367ecfb NC |
11044 | static bfd_boolean |
11045 | arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, | |
11046 | asection * section, | |
11047 | asymbol ** symbols, | |
11048 | bfd_vma offset, | |
11049 | const char ** filename_ptr, | |
11050 | const char ** functionname_ptr) | |
11051 | { | |
11052 | const char * filename = NULL; | |
11053 | asymbol * func = NULL; | |
11054 | bfd_vma low_func = 0; | |
11055 | asymbol ** p; | |
252b5132 RH |
11056 | |
11057 | for (p = symbols; *p != NULL; p++) | |
11058 | { | |
11059 | elf_symbol_type *q; | |
11060 | ||
11061 | q = (elf_symbol_type *) *p; | |
11062 | ||
252b5132 RH |
11063 | switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) |
11064 | { | |
11065 | default: | |
11066 | break; | |
11067 | case STT_FILE: | |
11068 | filename = bfd_asymbol_name (&q->symbol); | |
11069 | break; | |
252b5132 RH |
11070 | case STT_FUNC: |
11071 | case STT_ARM_TFUNC: | |
9d2da7ca | 11072 | case STT_NOTYPE: |
b0796911 | 11073 | /* Skip mapping symbols. */ |
0367ecfb | 11074 | if ((q->symbol.flags & BSF_LOCAL) |
b0796911 PB |
11075 | && bfd_is_arm_special_symbol_name (q->symbol.name, |
11076 | BFD_ARM_SPECIAL_SYM_TYPE_ANY)) | |
0367ecfb NC |
11077 | continue; |
11078 | /* Fall through. */ | |
6b40fcba | 11079 | if (bfd_get_section (&q->symbol) == section |
252b5132 RH |
11080 | && q->symbol.value >= low_func |
11081 | && q->symbol.value <= offset) | |
11082 | { | |
11083 | func = (asymbol *) q; | |
11084 | low_func = q->symbol.value; | |
11085 | } | |
11086 | break; | |
11087 | } | |
11088 | } | |
11089 | ||
11090 | if (func == NULL) | |
b34976b6 | 11091 | return FALSE; |
252b5132 | 11092 | |
0367ecfb NC |
11093 | if (filename_ptr) |
11094 | *filename_ptr = filename; | |
11095 | if (functionname_ptr) | |
11096 | *functionname_ptr = bfd_asymbol_name (func); | |
11097 | ||
11098 | return TRUE; | |
906e58ca | 11099 | } |
0367ecfb NC |
11100 | |
11101 | ||
11102 | /* Find the nearest line to a particular section and offset, for error | |
11103 | reporting. This code is a duplicate of the code in elf.c, except | |
11104 | that it uses arm_elf_find_function. */ | |
11105 | ||
11106 | static bfd_boolean | |
11107 | elf32_arm_find_nearest_line (bfd * abfd, | |
11108 | asection * section, | |
11109 | asymbol ** symbols, | |
11110 | bfd_vma offset, | |
11111 | const char ** filename_ptr, | |
11112 | const char ** functionname_ptr, | |
11113 | unsigned int * line_ptr) | |
11114 | { | |
11115 | bfd_boolean found = FALSE; | |
11116 | ||
11117 | /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */ | |
11118 | ||
11119 | if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset, | |
11120 | filename_ptr, functionname_ptr, | |
11121 | line_ptr, 0, | |
11122 | & elf_tdata (abfd)->dwarf2_find_line_info)) | |
11123 | { | |
11124 | if (!*functionname_ptr) | |
11125 | arm_elf_find_function (abfd, section, symbols, offset, | |
11126 | *filename_ptr ? NULL : filename_ptr, | |
11127 | functionname_ptr); | |
f21f3fe0 | 11128 | |
0367ecfb NC |
11129 | return TRUE; |
11130 | } | |
11131 | ||
11132 | if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, | |
11133 | & found, filename_ptr, | |
11134 | functionname_ptr, line_ptr, | |
11135 | & elf_tdata (abfd)->line_info)) | |
11136 | return FALSE; | |
11137 | ||
11138 | if (found && (*functionname_ptr || *line_ptr)) | |
11139 | return TRUE; | |
11140 | ||
11141 | if (symbols == NULL) | |
11142 | return FALSE; | |
11143 | ||
11144 | if (! arm_elf_find_function (abfd, section, symbols, offset, | |
11145 | filename_ptr, functionname_ptr)) | |
11146 | return FALSE; | |
11147 | ||
11148 | *line_ptr = 0; | |
b34976b6 | 11149 | return TRUE; |
252b5132 RH |
11150 | } |
11151 | ||
4ab527b0 FF |
11152 | static bfd_boolean |
11153 | elf32_arm_find_inliner_info (bfd * abfd, | |
11154 | const char ** filename_ptr, | |
11155 | const char ** functionname_ptr, | |
11156 | unsigned int * line_ptr) | |
11157 | { | |
11158 | bfd_boolean found; | |
11159 | found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, | |
11160 | functionname_ptr, line_ptr, | |
11161 | & elf_tdata (abfd)->dwarf2_find_line_info); | |
11162 | return found; | |
11163 | } | |
11164 | ||
252b5132 RH |
11165 | /* Adjust a symbol defined by a dynamic object and referenced by a |
11166 | regular object. The current definition is in some section of the | |
11167 | dynamic object, but we're not including those sections. We have to | |
11168 | change the definition to something the rest of the link can | |
11169 | understand. */ | |
11170 | ||
b34976b6 | 11171 | static bfd_boolean |
57e8b36a NC |
11172 | elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, |
11173 | struct elf_link_hash_entry * h) | |
252b5132 RH |
11174 | { |
11175 | bfd * dynobj; | |
11176 | asection * s; | |
b7693d02 | 11177 | struct elf32_arm_link_hash_entry * eh; |
67687978 | 11178 | struct elf32_arm_link_hash_table *globals; |
252b5132 | 11179 | |
67687978 | 11180 | globals = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
11181 | if (globals == NULL) |
11182 | return FALSE; | |
11183 | ||
252b5132 RH |
11184 | dynobj = elf_hash_table (info)->dynobj; |
11185 | ||
11186 | /* Make sure we know what is going on here. */ | |
11187 | BFD_ASSERT (dynobj != NULL | |
f5385ebf | 11188 | && (h->needs_plt |
f6e332e6 | 11189 | || h->u.weakdef != NULL |
f5385ebf AM |
11190 | || (h->def_dynamic |
11191 | && h->ref_regular | |
11192 | && !h->def_regular))); | |
252b5132 | 11193 | |
b7693d02 DJ |
11194 | eh = (struct elf32_arm_link_hash_entry *) h; |
11195 | ||
252b5132 RH |
11196 | /* If this is a function, put it in the procedure linkage table. We |
11197 | will fill in the contents of the procedure linkage table later, | |
11198 | when we know the address of the .got section. */ | |
0f88be7a | 11199 | if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC |
f5385ebf | 11200 | || h->needs_plt) |
252b5132 | 11201 | { |
5e681ec4 PB |
11202 | if (h->plt.refcount <= 0 |
11203 | || SYMBOL_CALLS_LOCAL (info, h) | |
11204 | || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT | |
11205 | && h->root.type == bfd_link_hash_undefweak)) | |
252b5132 RH |
11206 | { |
11207 | /* This case can occur if we saw a PLT32 reloc in an input | |
5e681ec4 PB |
11208 | file, but the symbol was never referred to by a dynamic |
11209 | object, or if all references were garbage collected. In | |
11210 | such a case, we don't actually need to build a procedure | |
11211 | linkage table, and we can just do a PC24 reloc instead. */ | |
11212 | h->plt.offset = (bfd_vma) -1; | |
b7693d02 | 11213 | eh->plt_thumb_refcount = 0; |
bd97cb95 | 11214 | eh->plt_maybe_thumb_refcount = 0; |
f5385ebf | 11215 | h->needs_plt = 0; |
252b5132 RH |
11216 | } |
11217 | ||
b34976b6 | 11218 | return TRUE; |
252b5132 | 11219 | } |
5e681ec4 | 11220 | else |
b7693d02 DJ |
11221 | { |
11222 | /* It's possible that we incorrectly decided a .plt reloc was | |
11223 | needed for an R_ARM_PC24 or similar reloc to a non-function sym | |
11224 | in check_relocs. We can't decide accurately between function | |
11225 | and non-function syms in check-relocs; Objects loaded later in | |
11226 | the link may change h->type. So fix it now. */ | |
11227 | h->plt.offset = (bfd_vma) -1; | |
11228 | eh->plt_thumb_refcount = 0; | |
bd97cb95 | 11229 | eh->plt_maybe_thumb_refcount = 0; |
b7693d02 | 11230 | } |
252b5132 RH |
11231 | |
11232 | /* If this is a weak symbol, and there is a real definition, the | |
11233 | processor independent code will have arranged for us to see the | |
11234 | real definition first, and we can just use the same value. */ | |
f6e332e6 | 11235 | if (h->u.weakdef != NULL) |
252b5132 | 11236 | { |
f6e332e6 AM |
11237 | BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined |
11238 | || h->u.weakdef->root.type == bfd_link_hash_defweak); | |
11239 | h->root.u.def.section = h->u.weakdef->root.u.def.section; | |
11240 | h->root.u.def.value = h->u.weakdef->root.u.def.value; | |
b34976b6 | 11241 | return TRUE; |
252b5132 RH |
11242 | } |
11243 | ||
ba93b8ac DJ |
11244 | /* If there are no non-GOT references, we do not need a copy |
11245 | relocation. */ | |
11246 | if (!h->non_got_ref) | |
11247 | return TRUE; | |
11248 | ||
252b5132 RH |
11249 | /* This is a reference to a symbol defined by a dynamic object which |
11250 | is not a function. */ | |
11251 | ||
11252 | /* If we are creating a shared library, we must presume that the | |
11253 | only references to the symbol are via the global offset table. | |
11254 | For such cases we need not do anything here; the relocations will | |
67687978 PB |
11255 | be handled correctly by relocate_section. Relocatable executables |
11256 | can reference data in shared objects directly, so we don't need to | |
11257 | do anything here. */ | |
11258 | if (info->shared || globals->root.is_relocatable_executable) | |
b34976b6 | 11259 | return TRUE; |
252b5132 | 11260 | |
909272ee AM |
11261 | if (h->size == 0) |
11262 | { | |
11263 | (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), | |
11264 | h->root.root.string); | |
11265 | return TRUE; | |
11266 | } | |
11267 | ||
252b5132 RH |
11268 | /* We must allocate the symbol in our .dynbss section, which will |
11269 | become part of the .bss section of the executable. There will be | |
11270 | an entry for this symbol in the .dynsym section. The dynamic | |
11271 | object will contain position independent code, so all references | |
11272 | from the dynamic object to this symbol will go through the global | |
11273 | offset table. The dynamic linker will use the .dynsym entry to | |
11274 | determine the address it must put in the global offset table, so | |
11275 | both the dynamic object and the regular object will refer to the | |
11276 | same memory location for the variable. */ | |
252b5132 RH |
11277 | s = bfd_get_section_by_name (dynobj, ".dynbss"); |
11278 | BFD_ASSERT (s != NULL); | |
11279 | ||
11280 | /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to | |
11281 | copy the initial value out of the dynamic object and into the | |
11282 | runtime process image. We need to remember the offset into the | |
00a97672 | 11283 | .rel(a).bss section we are going to use. */ |
252b5132 RH |
11284 | if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) |
11285 | { | |
11286 | asection *srel; | |
11287 | ||
00a97672 | 11288 | srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss")); |
252b5132 | 11289 | BFD_ASSERT (srel != NULL); |
00a97672 | 11290 | srel->size += RELOC_SIZE (globals); |
f5385ebf | 11291 | h->needs_copy = 1; |
252b5132 RH |
11292 | } |
11293 | ||
027297b7 | 11294 | return _bfd_elf_adjust_dynamic_copy (h, s); |
252b5132 RH |
11295 | } |
11296 | ||
5e681ec4 PB |
11297 | /* Allocate space in .plt, .got and associated reloc sections for |
11298 | dynamic relocs. */ | |
11299 | ||
11300 | static bfd_boolean | |
57e8b36a | 11301 | allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) |
5e681ec4 PB |
11302 | { |
11303 | struct bfd_link_info *info; | |
11304 | struct elf32_arm_link_hash_table *htab; | |
11305 | struct elf32_arm_link_hash_entry *eh; | |
11306 | struct elf32_arm_relocs_copied *p; | |
bd97cb95 | 11307 | bfd_signed_vma thumb_refs; |
5e681ec4 | 11308 | |
b7693d02 DJ |
11309 | eh = (struct elf32_arm_link_hash_entry *) h; |
11310 | ||
5e681ec4 PB |
11311 | if (h->root.type == bfd_link_hash_indirect) |
11312 | return TRUE; | |
11313 | ||
11314 | if (h->root.type == bfd_link_hash_warning) | |
11315 | /* When warning symbols are created, they **replace** the "real" | |
11316 | entry in the hash table, thus we never get to see the real | |
11317 | symbol in a hash traversal. So look at it now. */ | |
11318 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
11319 | ||
11320 | info = (struct bfd_link_info *) inf; | |
11321 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
11322 | if (htab == NULL) |
11323 | return FALSE; | |
5e681ec4 PB |
11324 | |
11325 | if (htab->root.dynamic_sections_created | |
11326 | && h->plt.refcount > 0) | |
11327 | { | |
11328 | /* Make sure this symbol is output as a dynamic symbol. | |
11329 | Undefined weak syms won't yet be marked as dynamic. */ | |
11330 | if (h->dynindx == -1 | |
f5385ebf | 11331 | && !h->forced_local) |
5e681ec4 | 11332 | { |
c152c796 | 11333 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
11334 | return FALSE; |
11335 | } | |
11336 | ||
11337 | if (info->shared | |
7359ea65 | 11338 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) |
5e681ec4 PB |
11339 | { |
11340 | asection *s = htab->splt; | |
11341 | ||
11342 | /* If this is the first .plt entry, make room for the special | |
11343 | first entry. */ | |
eea6121a | 11344 | if (s->size == 0) |
e5a52504 | 11345 | s->size += htab->plt_header_size; |
5e681ec4 | 11346 | |
eea6121a | 11347 | h->plt.offset = s->size; |
5e681ec4 | 11348 | |
b7693d02 DJ |
11349 | /* If we will insert a Thumb trampoline before this PLT, leave room |
11350 | for it. */ | |
bd97cb95 DJ |
11351 | thumb_refs = eh->plt_thumb_refcount; |
11352 | if (!htab->use_blx) | |
11353 | thumb_refs += eh->plt_maybe_thumb_refcount; | |
11354 | ||
11355 | if (thumb_refs > 0) | |
b7693d02 DJ |
11356 | { |
11357 | h->plt.offset += PLT_THUMB_STUB_SIZE; | |
11358 | s->size += PLT_THUMB_STUB_SIZE; | |
11359 | } | |
11360 | ||
5e681ec4 PB |
11361 | /* If this symbol is not defined in a regular file, and we are |
11362 | not generating a shared library, then set the symbol to this | |
11363 | location in the .plt. This is required to make function | |
11364 | pointers compare as equal between the normal executable and | |
11365 | the shared library. */ | |
11366 | if (! info->shared | |
f5385ebf | 11367 | && !h->def_regular) |
5e681ec4 PB |
11368 | { |
11369 | h->root.u.def.section = s; | |
11370 | h->root.u.def.value = h->plt.offset; | |
5e681ec4 | 11371 | |
67d74e43 DJ |
11372 | /* Make sure the function is not marked as Thumb, in case |
11373 | it is the target of an ABS32 relocation, which will | |
11374 | point to the PLT entry. */ | |
11375 | if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC) | |
11376 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
11377 | } | |
022f8312 | 11378 | |
5e681ec4 | 11379 | /* Make room for this entry. */ |
e5a52504 | 11380 | s->size += htab->plt_entry_size; |
5e681ec4 | 11381 | |
e5a52504 | 11382 | if (!htab->symbian_p) |
b7693d02 DJ |
11383 | { |
11384 | /* We also need to make an entry in the .got.plt section, which | |
11385 | will be placed in the .got section by the linker script. */ | |
11386 | eh->plt_got_offset = htab->sgotplt->size; | |
11387 | htab->sgotplt->size += 4; | |
11388 | } | |
5e681ec4 | 11389 | |
00a97672 RS |
11390 | /* We also need to make an entry in the .rel(a).plt section. */ |
11391 | htab->srelplt->size += RELOC_SIZE (htab); | |
11392 | ||
11393 | /* VxWorks executables have a second set of relocations for | |
11394 | each PLT entry. They go in a separate relocation section, | |
11395 | which is processed by the kernel loader. */ | |
11396 | if (htab->vxworks_p && !info->shared) | |
11397 | { | |
11398 | /* There is a relocation for the initial PLT entry: | |
11399 | an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ | |
11400 | if (h->plt.offset == htab->plt_header_size) | |
11401 | htab->srelplt2->size += RELOC_SIZE (htab); | |
11402 | ||
11403 | /* There are two extra relocations for each subsequent | |
11404 | PLT entry: an R_ARM_32 relocation for the GOT entry, | |
11405 | and an R_ARM_32 relocation for the PLT entry. */ | |
11406 | htab->srelplt2->size += RELOC_SIZE (htab) * 2; | |
11407 | } | |
5e681ec4 PB |
11408 | } |
11409 | else | |
11410 | { | |
11411 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 11412 | h->needs_plt = 0; |
5e681ec4 PB |
11413 | } |
11414 | } | |
11415 | else | |
11416 | { | |
11417 | h->plt.offset = (bfd_vma) -1; | |
f5385ebf | 11418 | h->needs_plt = 0; |
5e681ec4 PB |
11419 | } |
11420 | ||
11421 | if (h->got.refcount > 0) | |
11422 | { | |
11423 | asection *s; | |
11424 | bfd_boolean dyn; | |
ba93b8ac DJ |
11425 | int tls_type = elf32_arm_hash_entry (h)->tls_type; |
11426 | int indx; | |
5e681ec4 PB |
11427 | |
11428 | /* Make sure this symbol is output as a dynamic symbol. | |
11429 | Undefined weak syms won't yet be marked as dynamic. */ | |
11430 | if (h->dynindx == -1 | |
f5385ebf | 11431 | && !h->forced_local) |
5e681ec4 | 11432 | { |
c152c796 | 11433 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
11434 | return FALSE; |
11435 | } | |
11436 | ||
e5a52504 MM |
11437 | if (!htab->symbian_p) |
11438 | { | |
11439 | s = htab->sgot; | |
11440 | h->got.offset = s->size; | |
ba93b8ac DJ |
11441 | |
11442 | if (tls_type == GOT_UNKNOWN) | |
11443 | abort (); | |
11444 | ||
11445 | if (tls_type == GOT_NORMAL) | |
11446 | /* Non-TLS symbols need one GOT slot. */ | |
11447 | s->size += 4; | |
11448 | else | |
11449 | { | |
11450 | if (tls_type & GOT_TLS_GD) | |
11451 | /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */ | |
11452 | s->size += 8; | |
11453 | if (tls_type & GOT_TLS_IE) | |
11454 | /* R_ARM_TLS_IE32 needs one GOT slot. */ | |
11455 | s->size += 4; | |
11456 | } | |
11457 | ||
e5a52504 | 11458 | dyn = htab->root.dynamic_sections_created; |
ba93b8ac DJ |
11459 | |
11460 | indx = 0; | |
11461 | if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) | |
11462 | && (!info->shared | |
11463 | || !SYMBOL_REFERENCES_LOCAL (info, h))) | |
11464 | indx = h->dynindx; | |
11465 | ||
11466 | if (tls_type != GOT_NORMAL | |
11467 | && (info->shared || indx != 0) | |
11468 | && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
11469 | || h->root.type != bfd_link_hash_undefweak)) | |
11470 | { | |
11471 | if (tls_type & GOT_TLS_IE) | |
00a97672 | 11472 | htab->srelgot->size += RELOC_SIZE (htab); |
ba93b8ac DJ |
11473 | |
11474 | if (tls_type & GOT_TLS_GD) | |
00a97672 | 11475 | htab->srelgot->size += RELOC_SIZE (htab); |
ba93b8ac DJ |
11476 | |
11477 | if ((tls_type & GOT_TLS_GD) && indx != 0) | |
00a97672 | 11478 | htab->srelgot->size += RELOC_SIZE (htab); |
ba93b8ac DJ |
11479 | } |
11480 | else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT | |
11481 | || h->root.type != bfd_link_hash_undefweak) | |
11482 | && (info->shared | |
11483 | || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))) | |
00a97672 | 11484 | htab->srelgot->size += RELOC_SIZE (htab); |
e5a52504 | 11485 | } |
5e681ec4 PB |
11486 | } |
11487 | else | |
11488 | h->got.offset = (bfd_vma) -1; | |
11489 | ||
a4fd1a8e PB |
11490 | /* Allocate stubs for exported Thumb functions on v4t. */ |
11491 | if (!htab->use_blx && h->dynindx != -1 | |
0eaedd0e | 11492 | && h->def_regular |
a4fd1a8e PB |
11493 | && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC |
11494 | && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) | |
11495 | { | |
11496 | struct elf_link_hash_entry * th; | |
11497 | struct bfd_link_hash_entry * bh; | |
11498 | struct elf_link_hash_entry * myh; | |
11499 | char name[1024]; | |
11500 | asection *s; | |
11501 | bh = NULL; | |
11502 | /* Create a new symbol to regist the real location of the function. */ | |
11503 | s = h->root.u.def.section; | |
906e58ca | 11504 | sprintf (name, "__real_%s", h->root.root.string); |
a4fd1a8e PB |
11505 | _bfd_generic_link_add_one_symbol (info, s->owner, |
11506 | name, BSF_GLOBAL, s, | |
11507 | h->root.u.def.value, | |
11508 | NULL, TRUE, FALSE, &bh); | |
11509 | ||
11510 | myh = (struct elf_link_hash_entry *) bh; | |
11511 | myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC); | |
11512 | myh->forced_local = 1; | |
11513 | eh->export_glue = myh; | |
11514 | th = record_arm_to_thumb_glue (info, h); | |
11515 | /* Point the symbol at the stub. */ | |
11516 | h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); | |
11517 | h->root.u.def.section = th->root.u.def.section; | |
11518 | h->root.u.def.value = th->root.u.def.value & ~1; | |
11519 | } | |
11520 | ||
5e681ec4 PB |
11521 | if (eh->relocs_copied == NULL) |
11522 | return TRUE; | |
11523 | ||
11524 | /* In the shared -Bsymbolic case, discard space allocated for | |
11525 | dynamic pc-relative relocs against symbols which turn out to be | |
11526 | defined in regular objects. For the normal shared case, discard | |
11527 | space for pc-relative relocs that have become local due to symbol | |
11528 | visibility changes. */ | |
11529 | ||
67687978 | 11530 | if (info->shared || htab->root.is_relocatable_executable) |
5e681ec4 | 11531 | { |
7bdca076 | 11532 | /* The only relocs that use pc_count are R_ARM_REL32 and |
bb224fc3 MS |
11533 | R_ARM_REL32_NOI, which will appear on something like |
11534 | ".long foo - .". We want calls to protected symbols to resolve | |
11535 | directly to the function rather than going via the plt. If people | |
11536 | want function pointer comparisons to work as expected then they | |
11537 | should avoid writing assembly like ".long foo - .". */ | |
ba93b8ac DJ |
11538 | if (SYMBOL_CALLS_LOCAL (info, h)) |
11539 | { | |
11540 | struct elf32_arm_relocs_copied **pp; | |
11541 | ||
11542 | for (pp = &eh->relocs_copied; (p = *pp) != NULL; ) | |
11543 | { | |
11544 | p->count -= p->pc_count; | |
11545 | p->pc_count = 0; | |
11546 | if (p->count == 0) | |
11547 | *pp = p->next; | |
11548 | else | |
11549 | pp = &p->next; | |
11550 | } | |
11551 | } | |
11552 | ||
4dfe6ac6 | 11553 | if (htab->vxworks_p) |
3348747a NS |
11554 | { |
11555 | struct elf32_arm_relocs_copied **pp; | |
11556 | ||
11557 | for (pp = &eh->relocs_copied; (p = *pp) != NULL; ) | |
11558 | { | |
11559 | if (strcmp (p->section->output_section->name, ".tls_vars") == 0) | |
11560 | *pp = p->next; | |
11561 | else | |
11562 | pp = &p->next; | |
11563 | } | |
11564 | } | |
11565 | ||
ba93b8ac | 11566 | /* Also discard relocs on undefined weak syms with non-default |
7359ea65 | 11567 | visibility. */ |
22d606e9 | 11568 | if (eh->relocs_copied != NULL |
5e681ec4 | 11569 | && h->root.type == bfd_link_hash_undefweak) |
22d606e9 AM |
11570 | { |
11571 | if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) | |
11572 | eh->relocs_copied = NULL; | |
11573 | ||
11574 | /* Make sure undefined weak symbols are output as a dynamic | |
11575 | symbol in PIEs. */ | |
11576 | else if (h->dynindx == -1 | |
11577 | && !h->forced_local) | |
11578 | { | |
11579 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
11580 | return FALSE; | |
11581 | } | |
11582 | } | |
11583 | ||
67687978 PB |
11584 | else if (htab->root.is_relocatable_executable && h->dynindx == -1 |
11585 | && h->root.type == bfd_link_hash_new) | |
11586 | { | |
11587 | /* Output absolute symbols so that we can create relocations | |
11588 | against them. For normal symbols we output a relocation | |
11589 | against the section that contains them. */ | |
11590 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) | |
11591 | return FALSE; | |
11592 | } | |
11593 | ||
5e681ec4 PB |
11594 | } |
11595 | else | |
11596 | { | |
11597 | /* For the non-shared case, discard space for relocs against | |
11598 | symbols which turn out to need copy relocs or are not | |
11599 | dynamic. */ | |
11600 | ||
f5385ebf AM |
11601 | if (!h->non_got_ref |
11602 | && ((h->def_dynamic | |
11603 | && !h->def_regular) | |
5e681ec4 PB |
11604 | || (htab->root.dynamic_sections_created |
11605 | && (h->root.type == bfd_link_hash_undefweak | |
11606 | || h->root.type == bfd_link_hash_undefined)))) | |
11607 | { | |
11608 | /* Make sure this symbol is output as a dynamic symbol. | |
11609 | Undefined weak syms won't yet be marked as dynamic. */ | |
11610 | if (h->dynindx == -1 | |
f5385ebf | 11611 | && !h->forced_local) |
5e681ec4 | 11612 | { |
c152c796 | 11613 | if (! bfd_elf_link_record_dynamic_symbol (info, h)) |
5e681ec4 PB |
11614 | return FALSE; |
11615 | } | |
11616 | ||
11617 | /* If that succeeded, we know we'll be keeping all the | |
11618 | relocs. */ | |
11619 | if (h->dynindx != -1) | |
11620 | goto keep; | |
11621 | } | |
11622 | ||
11623 | eh->relocs_copied = NULL; | |
11624 | ||
11625 | keep: ; | |
11626 | } | |
11627 | ||
11628 | /* Finally, allocate space. */ | |
11629 | for (p = eh->relocs_copied; p != NULL; p = p->next) | |
11630 | { | |
11631 | asection *sreloc = elf_section_data (p->section)->sreloc; | |
00a97672 | 11632 | sreloc->size += p->count * RELOC_SIZE (htab); |
5e681ec4 PB |
11633 | } |
11634 | ||
11635 | return TRUE; | |
11636 | } | |
11637 | ||
08d1f311 DJ |
11638 | /* Find any dynamic relocs that apply to read-only sections. */ |
11639 | ||
11640 | static bfd_boolean | |
8029a119 | 11641 | elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) |
08d1f311 | 11642 | { |
8029a119 NC |
11643 | struct elf32_arm_link_hash_entry * eh; |
11644 | struct elf32_arm_relocs_copied * p; | |
08d1f311 DJ |
11645 | |
11646 | if (h->root.type == bfd_link_hash_warning) | |
11647 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
11648 | ||
11649 | eh = (struct elf32_arm_link_hash_entry *) h; | |
11650 | for (p = eh->relocs_copied; p != NULL; p = p->next) | |
11651 | { | |
11652 | asection *s = p->section; | |
11653 | ||
11654 | if (s != NULL && (s->flags & SEC_READONLY) != 0) | |
11655 | { | |
11656 | struct bfd_link_info *info = (struct bfd_link_info *) inf; | |
11657 | ||
11658 | info->flags |= DF_TEXTREL; | |
11659 | ||
11660 | /* Not an error, just cut short the traversal. */ | |
11661 | return FALSE; | |
11662 | } | |
11663 | } | |
11664 | return TRUE; | |
11665 | } | |
11666 | ||
d504ffc8 DJ |
11667 | void |
11668 | bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, | |
11669 | int byteswap_code) | |
11670 | { | |
11671 | struct elf32_arm_link_hash_table *globals; | |
11672 | ||
11673 | globals = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
11674 | if (globals == NULL) |
11675 | return; | |
11676 | ||
d504ffc8 DJ |
11677 | globals->byteswap_code = byteswap_code; |
11678 | } | |
11679 | ||
252b5132 RH |
11680 | /* Set the sizes of the dynamic sections. */ |
11681 | ||
b34976b6 | 11682 | static bfd_boolean |
57e8b36a NC |
11683 | elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, |
11684 | struct bfd_link_info * info) | |
252b5132 RH |
11685 | { |
11686 | bfd * dynobj; | |
11687 | asection * s; | |
b34976b6 AM |
11688 | bfd_boolean plt; |
11689 | bfd_boolean relocs; | |
5e681ec4 PB |
11690 | bfd *ibfd; |
11691 | struct elf32_arm_link_hash_table *htab; | |
252b5132 | 11692 | |
5e681ec4 | 11693 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
11694 | if (htab == NULL) |
11695 | return FALSE; | |
11696 | ||
252b5132 RH |
11697 | dynobj = elf_hash_table (info)->dynobj; |
11698 | BFD_ASSERT (dynobj != NULL); | |
39b41c9c | 11699 | check_use_blx (htab); |
252b5132 RH |
11700 | |
11701 | if (elf_hash_table (info)->dynamic_sections_created) | |
11702 | { | |
11703 | /* Set the contents of the .interp section to the interpreter. */ | |
893c4fe2 | 11704 | if (info->executable) |
252b5132 RH |
11705 | { |
11706 | s = bfd_get_section_by_name (dynobj, ".interp"); | |
11707 | BFD_ASSERT (s != NULL); | |
eea6121a | 11708 | s->size = sizeof ELF_DYNAMIC_INTERPRETER; |
252b5132 RH |
11709 | s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; |
11710 | } | |
11711 | } | |
5e681ec4 PB |
11712 | |
11713 | /* Set up .got offsets for local syms, and space for local dynamic | |
11714 | relocs. */ | |
11715 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) | |
252b5132 | 11716 | { |
5e681ec4 PB |
11717 | bfd_signed_vma *local_got; |
11718 | bfd_signed_vma *end_local_got; | |
11719 | char *local_tls_type; | |
11720 | bfd_size_type locsymcount; | |
11721 | Elf_Internal_Shdr *symtab_hdr; | |
11722 | asection *srel; | |
4dfe6ac6 | 11723 | bfd_boolean is_vxworks = htab->vxworks_p; |
5e681ec4 | 11724 | |
0ffa91dd | 11725 | if (! is_arm_elf (ibfd)) |
5e681ec4 PB |
11726 | continue; |
11727 | ||
11728 | for (s = ibfd->sections; s != NULL; s = s->next) | |
11729 | { | |
11730 | struct elf32_arm_relocs_copied *p; | |
11731 | ||
21d799b5 NC |
11732 | for (p = (struct elf32_arm_relocs_copied *) |
11733 | elf_section_data (s)->local_dynrel; p != NULL; p = p->next) | |
5e681ec4 PB |
11734 | { |
11735 | if (!bfd_is_abs_section (p->section) | |
11736 | && bfd_is_abs_section (p->section->output_section)) | |
11737 | { | |
11738 | /* Input section has been discarded, either because | |
11739 | it is a copy of a linkonce section or due to | |
11740 | linker script /DISCARD/, so we'll be discarding | |
11741 | the relocs too. */ | |
11742 | } | |
3348747a NS |
11743 | else if (is_vxworks |
11744 | && strcmp (p->section->output_section->name, | |
11745 | ".tls_vars") == 0) | |
11746 | { | |
11747 | /* Relocations in vxworks .tls_vars sections are | |
11748 | handled specially by the loader. */ | |
11749 | } | |
5e681ec4 PB |
11750 | else if (p->count != 0) |
11751 | { | |
11752 | srel = elf_section_data (p->section)->sreloc; | |
00a97672 | 11753 | srel->size += p->count * RELOC_SIZE (htab); |
5e681ec4 PB |
11754 | if ((p->section->output_section->flags & SEC_READONLY) != 0) |
11755 | info->flags |= DF_TEXTREL; | |
11756 | } | |
11757 | } | |
11758 | } | |
11759 | ||
11760 | local_got = elf_local_got_refcounts (ibfd); | |
11761 | if (!local_got) | |
11762 | continue; | |
11763 | ||
0ffa91dd | 11764 | symtab_hdr = & elf_symtab_hdr (ibfd); |
5e681ec4 PB |
11765 | locsymcount = symtab_hdr->sh_info; |
11766 | end_local_got = local_got + locsymcount; | |
ba93b8ac | 11767 | local_tls_type = elf32_arm_local_got_tls_type (ibfd); |
5e681ec4 PB |
11768 | s = htab->sgot; |
11769 | srel = htab->srelgot; | |
11770 | for (; local_got < end_local_got; ++local_got, ++local_tls_type) | |
11771 | { | |
11772 | if (*local_got > 0) | |
11773 | { | |
eea6121a | 11774 | *local_got = s->size; |
ba93b8ac DJ |
11775 | if (*local_tls_type & GOT_TLS_GD) |
11776 | /* TLS_GD relocs need an 8-byte structure in the GOT. */ | |
11777 | s->size += 8; | |
11778 | if (*local_tls_type & GOT_TLS_IE) | |
11779 | s->size += 4; | |
11780 | if (*local_tls_type == GOT_NORMAL) | |
11781 | s->size += 4; | |
11782 | ||
11783 | if (info->shared || *local_tls_type == GOT_TLS_GD) | |
00a97672 | 11784 | srel->size += RELOC_SIZE (htab); |
5e681ec4 PB |
11785 | } |
11786 | else | |
11787 | *local_got = (bfd_vma) -1; | |
11788 | } | |
252b5132 RH |
11789 | } |
11790 | ||
ba93b8ac DJ |
11791 | if (htab->tls_ldm_got.refcount > 0) |
11792 | { | |
11793 | /* Allocate two GOT entries and one dynamic relocation (if necessary) | |
11794 | for R_ARM_TLS_LDM32 relocations. */ | |
11795 | htab->tls_ldm_got.offset = htab->sgot->size; | |
11796 | htab->sgot->size += 8; | |
11797 | if (info->shared) | |
00a97672 | 11798 | htab->srelgot->size += RELOC_SIZE (htab); |
ba93b8ac DJ |
11799 | } |
11800 | else | |
11801 | htab->tls_ldm_got.offset = -1; | |
11802 | ||
5e681ec4 PB |
11803 | /* Allocate global sym .plt and .got entries, and space for global |
11804 | sym dynamic relocs. */ | |
57e8b36a | 11805 | elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info); |
252b5132 | 11806 | |
d504ffc8 DJ |
11807 | /* Here we rummage through the found bfds to collect glue information. */ |
11808 | for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) | |
c7b8f16e | 11809 | { |
0ffa91dd | 11810 | if (! is_arm_elf (ibfd)) |
e44a2c9c AM |
11811 | continue; |
11812 | ||
c7b8f16e JB |
11813 | /* Initialise mapping tables for code/data. */ |
11814 | bfd_elf32_arm_init_maps (ibfd); | |
906e58ca | 11815 | |
c7b8f16e JB |
11816 | if (!bfd_elf32_arm_process_before_allocation (ibfd, info) |
11817 | || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)) | |
11818 | /* xgettext:c-format */ | |
11819 | _bfd_error_handler (_("Errors encountered processing file %s"), | |
11820 | ibfd->filename); | |
11821 | } | |
d504ffc8 | 11822 | |
3e6b1042 DJ |
11823 | /* Allocate space for the glue sections now that we've sized them. */ |
11824 | bfd_elf32_arm_allocate_interworking_sections (info); | |
11825 | ||
252b5132 RH |
11826 | /* The check_relocs and adjust_dynamic_symbol entry points have |
11827 | determined the sizes of the various dynamic sections. Allocate | |
11828 | memory for them. */ | |
b34976b6 AM |
11829 | plt = FALSE; |
11830 | relocs = FALSE; | |
252b5132 RH |
11831 | for (s = dynobj->sections; s != NULL; s = s->next) |
11832 | { | |
11833 | const char * name; | |
252b5132 RH |
11834 | |
11835 | if ((s->flags & SEC_LINKER_CREATED) == 0) | |
11836 | continue; | |
11837 | ||
11838 | /* It's OK to base decisions on the section name, because none | |
11839 | of the dynobj section names depend upon the input files. */ | |
11840 | name = bfd_get_section_name (dynobj, s); | |
11841 | ||
24a1ba0f | 11842 | if (strcmp (name, ".plt") == 0) |
252b5132 | 11843 | { |
c456f082 AM |
11844 | /* Remember whether there is a PLT. */ |
11845 | plt = s->size != 0; | |
252b5132 | 11846 | } |
0112cd26 | 11847 | else if (CONST_STRNEQ (name, ".rel")) |
252b5132 | 11848 | { |
c456f082 | 11849 | if (s->size != 0) |
252b5132 | 11850 | { |
252b5132 | 11851 | /* Remember whether there are any reloc sections other |
00a97672 RS |
11852 | than .rel(a).plt and .rela.plt.unloaded. */ |
11853 | if (s != htab->srelplt && s != htab->srelplt2) | |
b34976b6 | 11854 | relocs = TRUE; |
252b5132 RH |
11855 | |
11856 | /* We use the reloc_count field as a counter if we need | |
11857 | to copy relocs into the output file. */ | |
11858 | s->reloc_count = 0; | |
11859 | } | |
11860 | } | |
0112cd26 | 11861 | else if (! CONST_STRNEQ (name, ".got") |
c456f082 | 11862 | && strcmp (name, ".dynbss") != 0) |
252b5132 RH |
11863 | { |
11864 | /* It's not one of our sections, so don't allocate space. */ | |
11865 | continue; | |
11866 | } | |
11867 | ||
c456f082 | 11868 | if (s->size == 0) |
252b5132 | 11869 | { |
c456f082 | 11870 | /* If we don't need this section, strip it from the |
00a97672 RS |
11871 | output file. This is mostly to handle .rel(a).bss and |
11872 | .rel(a).plt. We must create both sections in | |
c456f082 AM |
11873 | create_dynamic_sections, because they must be created |
11874 | before the linker maps input sections to output | |
11875 | sections. The linker does that before | |
11876 | adjust_dynamic_symbol is called, and it is that | |
11877 | function which decides whether anything needs to go | |
11878 | into these sections. */ | |
8423293d | 11879 | s->flags |= SEC_EXCLUDE; |
252b5132 RH |
11880 | continue; |
11881 | } | |
11882 | ||
c456f082 AM |
11883 | if ((s->flags & SEC_HAS_CONTENTS) == 0) |
11884 | continue; | |
11885 | ||
252b5132 | 11886 | /* Allocate memory for the section contents. */ |
21d799b5 | 11887 | s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); |
c456f082 | 11888 | if (s->contents == NULL) |
b34976b6 | 11889 | return FALSE; |
252b5132 RH |
11890 | } |
11891 | ||
11892 | if (elf_hash_table (info)->dynamic_sections_created) | |
11893 | { | |
11894 | /* Add some entries to the .dynamic section. We fill in the | |
11895 | values later, in elf32_arm_finish_dynamic_sections, but we | |
11896 | must add the entries now so that we get the correct size for | |
11897 | the .dynamic section. The DT_DEBUG entry is filled in by the | |
11898 | dynamic linker and used by the debugger. */ | |
dc810e39 | 11899 | #define add_dynamic_entry(TAG, VAL) \ |
5a580b3a | 11900 | _bfd_elf_add_dynamic_entry (info, TAG, VAL) |
dc810e39 | 11901 | |
8532796c | 11902 | if (info->executable) |
252b5132 | 11903 | { |
dc810e39 | 11904 | if (!add_dynamic_entry (DT_DEBUG, 0)) |
b34976b6 | 11905 | return FALSE; |
252b5132 RH |
11906 | } |
11907 | ||
11908 | if (plt) | |
11909 | { | |
dc810e39 AM |
11910 | if ( !add_dynamic_entry (DT_PLTGOT, 0) |
11911 | || !add_dynamic_entry (DT_PLTRELSZ, 0) | |
00a97672 RS |
11912 | || !add_dynamic_entry (DT_PLTREL, |
11913 | htab->use_rel ? DT_REL : DT_RELA) | |
dc810e39 | 11914 | || !add_dynamic_entry (DT_JMPREL, 0)) |
b34976b6 | 11915 | return FALSE; |
252b5132 RH |
11916 | } |
11917 | ||
11918 | if (relocs) | |
11919 | { | |
00a97672 RS |
11920 | if (htab->use_rel) |
11921 | { | |
11922 | if (!add_dynamic_entry (DT_REL, 0) | |
11923 | || !add_dynamic_entry (DT_RELSZ, 0) | |
11924 | || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) | |
11925 | return FALSE; | |
11926 | } | |
11927 | else | |
11928 | { | |
11929 | if (!add_dynamic_entry (DT_RELA, 0) | |
11930 | || !add_dynamic_entry (DT_RELASZ, 0) | |
11931 | || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) | |
11932 | return FALSE; | |
11933 | } | |
252b5132 RH |
11934 | } |
11935 | ||
08d1f311 DJ |
11936 | /* If any dynamic relocs apply to a read-only section, |
11937 | then we need a DT_TEXTREL entry. */ | |
11938 | if ((info->flags & DF_TEXTREL) == 0) | |
8029a119 NC |
11939 | elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs, |
11940 | info); | |
08d1f311 | 11941 | |
99e4ae17 | 11942 | if ((info->flags & DF_TEXTREL) != 0) |
252b5132 | 11943 | { |
dc810e39 | 11944 | if (!add_dynamic_entry (DT_TEXTREL, 0)) |
b34976b6 | 11945 | return FALSE; |
252b5132 | 11946 | } |
7a2b07ff NS |
11947 | if (htab->vxworks_p |
11948 | && !elf_vxworks_add_dynamic_entries (output_bfd, info)) | |
11949 | return FALSE; | |
252b5132 | 11950 | } |
8532796c | 11951 | #undef add_dynamic_entry |
252b5132 | 11952 | |
b34976b6 | 11953 | return TRUE; |
252b5132 RH |
11954 | } |
11955 | ||
252b5132 RH |
11956 | /* Finish up dynamic symbol handling. We set the contents of various |
11957 | dynamic sections here. */ | |
11958 | ||
b34976b6 | 11959 | static bfd_boolean |
906e58ca NC |
11960 | elf32_arm_finish_dynamic_symbol (bfd * output_bfd, |
11961 | struct bfd_link_info * info, | |
11962 | struct elf_link_hash_entry * h, | |
11963 | Elf_Internal_Sym * sym) | |
252b5132 RH |
11964 | { |
11965 | bfd * dynobj; | |
e5a52504 | 11966 | struct elf32_arm_link_hash_table *htab; |
b7693d02 | 11967 | struct elf32_arm_link_hash_entry *eh; |
252b5132 RH |
11968 | |
11969 | dynobj = elf_hash_table (info)->dynobj; | |
e5a52504 | 11970 | htab = elf32_arm_hash_table (info); |
4dfe6ac6 NC |
11971 | if (htab == NULL) |
11972 | return FALSE; | |
11973 | ||
b7693d02 | 11974 | eh = (struct elf32_arm_link_hash_entry *) h; |
252b5132 RH |
11975 | |
11976 | if (h->plt.offset != (bfd_vma) -1) | |
11977 | { | |
11978 | asection * splt; | |
252b5132 | 11979 | asection * srel; |
e5a52504 | 11980 | bfd_byte *loc; |
24a1ba0f | 11981 | bfd_vma plt_index; |
947216bf | 11982 | Elf_Internal_Rela rel; |
252b5132 RH |
11983 | |
11984 | /* This symbol has an entry in the procedure linkage table. Set | |
11985 | it up. */ | |
11986 | ||
11987 | BFD_ASSERT (h->dynindx != -1); | |
11988 | ||
11989 | splt = bfd_get_section_by_name (dynobj, ".plt"); | |
00a97672 | 11990 | srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt")); |
e5a52504 | 11991 | BFD_ASSERT (splt != NULL && srel != NULL); |
252b5132 | 11992 | |
e5a52504 MM |
11993 | /* Fill in the entry in the procedure linkage table. */ |
11994 | if (htab->symbian_p) | |
11995 | { | |
906e58ca | 11996 | put_arm_insn (htab, output_bfd, |
52ab56c2 PB |
11997 | elf32_arm_symbian_plt_entry[0], |
11998 | splt->contents + h->plt.offset); | |
906e58ca | 11999 | bfd_put_32 (output_bfd, |
52ab56c2 PB |
12000 | elf32_arm_symbian_plt_entry[1], |
12001 | splt->contents + h->plt.offset + 4); | |
906e58ca | 12002 | |
e5a52504 | 12003 | /* Fill in the entry in the .rel.plt section. */ |
2a1b9a48 MM |
12004 | rel.r_offset = (splt->output_section->vma |
12005 | + splt->output_offset | |
52ab56c2 | 12006 | + h->plt.offset + 4); |
e5a52504 | 12007 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); |
b7693d02 DJ |
12008 | |
12009 | /* Get the index in the procedure linkage table which | |
12010 | corresponds to this symbol. This is the index of this symbol | |
12011 | in all the symbols for which we are making plt entries. The | |
12012 | first entry in the procedure linkage table is reserved. */ | |
906e58ca | 12013 | plt_index = ((h->plt.offset - htab->plt_header_size) |
b7693d02 | 12014 | / htab->plt_entry_size); |
e5a52504 MM |
12015 | } |
12016 | else | |
12017 | { | |
00a97672 | 12018 | bfd_vma got_offset, got_address, plt_address; |
e5a52504 MM |
12019 | bfd_vma got_displacement; |
12020 | asection * sgot; | |
52ab56c2 | 12021 | bfd_byte * ptr; |
906e58ca | 12022 | |
e5a52504 MM |
12023 | sgot = bfd_get_section_by_name (dynobj, ".got.plt"); |
12024 | BFD_ASSERT (sgot != NULL); | |
12025 | ||
b7693d02 DJ |
12026 | /* Get the offset into the .got.plt table of the entry that |
12027 | corresponds to this function. */ | |
12028 | got_offset = eh->plt_got_offset; | |
12029 | ||
12030 | /* Get the index in the procedure linkage table which | |
12031 | corresponds to this symbol. This is the index of this symbol | |
12032 | in all the symbols for which we are making plt entries. The | |
12033 | first three entries in .got.plt are reserved; after that | |
12034 | symbols appear in the same order as in .plt. */ | |
12035 | plt_index = (got_offset - 12) / 4; | |
e5a52504 | 12036 | |
00a97672 RS |
12037 | /* Calculate the address of the GOT entry. */ |
12038 | got_address = (sgot->output_section->vma | |
12039 | + sgot->output_offset | |
12040 | + got_offset); | |
5e681ec4 | 12041 | |
00a97672 RS |
12042 | /* ...and the address of the PLT entry. */ |
12043 | plt_address = (splt->output_section->vma | |
12044 | + splt->output_offset | |
12045 | + h->plt.offset); | |
5e681ec4 | 12046 | |
52ab56c2 | 12047 | ptr = htab->splt->contents + h->plt.offset; |
00a97672 RS |
12048 | if (htab->vxworks_p && info->shared) |
12049 | { | |
12050 | unsigned int i; | |
12051 | bfd_vma val; | |
12052 | ||
52ab56c2 | 12053 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) |
00a97672 RS |
12054 | { |
12055 | val = elf32_arm_vxworks_shared_plt_entry[i]; | |
12056 | if (i == 2) | |
12057 | val |= got_address - sgot->output_section->vma; | |
12058 | if (i == 5) | |
12059 | val |= plt_index * RELOC_SIZE (htab); | |
52ab56c2 PB |
12060 | if (i == 2 || i == 5) |
12061 | bfd_put_32 (output_bfd, val, ptr); | |
12062 | else | |
12063 | put_arm_insn (htab, output_bfd, val, ptr); | |
00a97672 RS |
12064 | } |
12065 | } | |
12066 | else if (htab->vxworks_p) | |
b7693d02 | 12067 | { |
00a97672 RS |
12068 | unsigned int i; |
12069 | bfd_vma val; | |
12070 | ||
d3753b85 | 12071 | for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) |
00a97672 RS |
12072 | { |
12073 | val = elf32_arm_vxworks_exec_plt_entry[i]; | |
12074 | if (i == 2) | |
12075 | val |= got_address; | |
12076 | if (i == 4) | |
12077 | val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2); | |
12078 | if (i == 5) | |
12079 | val |= plt_index * RELOC_SIZE (htab); | |
52ab56c2 PB |
12080 | if (i == 2 || i == 5) |
12081 | bfd_put_32 (output_bfd, val, ptr); | |
12082 | else | |
12083 | put_arm_insn (htab, output_bfd, val, ptr); | |
00a97672 RS |
12084 | } |
12085 | ||
12086 | loc = (htab->srelplt2->contents | |
12087 | + (plt_index * 2 + 1) * RELOC_SIZE (htab)); | |
12088 | ||
12089 | /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation | |
12090 | referencing the GOT for this PLT entry. */ | |
12091 | rel.r_offset = plt_address + 8; | |
12092 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
12093 | rel.r_addend = got_offset; | |
12094 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
12095 | loc += RELOC_SIZE (htab); | |
12096 | ||
12097 | /* Create the R_ARM_ABS32 relocation referencing the | |
12098 | beginning of the PLT for this GOT entry. */ | |
12099 | rel.r_offset = got_address; | |
12100 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
12101 | rel.r_addend = 0; | |
12102 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
b7693d02 | 12103 | } |
00a97672 RS |
12104 | else |
12105 | { | |
bd97cb95 | 12106 | bfd_signed_vma thumb_refs; |
00a97672 RS |
12107 | /* Calculate the displacement between the PLT slot and the |
12108 | entry in the GOT. The eight-byte offset accounts for the | |
12109 | value produced by adding to pc in the first instruction | |
12110 | of the PLT stub. */ | |
12111 | got_displacement = got_address - (plt_address + 8); | |
b7693d02 | 12112 | |
00a97672 RS |
12113 | BFD_ASSERT ((got_displacement & 0xf0000000) == 0); |
12114 | ||
bd97cb95 DJ |
12115 | thumb_refs = eh->plt_thumb_refcount; |
12116 | if (!htab->use_blx) | |
12117 | thumb_refs += eh->plt_maybe_thumb_refcount; | |
12118 | ||
12119 | if (thumb_refs > 0) | |
00a97672 | 12120 | { |
52ab56c2 PB |
12121 | put_thumb_insn (htab, output_bfd, |
12122 | elf32_arm_plt_thumb_stub[0], ptr - 4); | |
12123 | put_thumb_insn (htab, output_bfd, | |
12124 | elf32_arm_plt_thumb_stub[1], ptr - 2); | |
00a97672 RS |
12125 | } |
12126 | ||
52ab56c2 PB |
12127 | put_arm_insn (htab, output_bfd, |
12128 | elf32_arm_plt_entry[0] | |
12129 | | ((got_displacement & 0x0ff00000) >> 20), | |
12130 | ptr + 0); | |
12131 | put_arm_insn (htab, output_bfd, | |
12132 | elf32_arm_plt_entry[1] | |
12133 | | ((got_displacement & 0x000ff000) >> 12), | |
12134 | ptr+ 4); | |
12135 | put_arm_insn (htab, output_bfd, | |
12136 | elf32_arm_plt_entry[2] | |
12137 | | (got_displacement & 0x00000fff), | |
12138 | ptr + 8); | |
5e681ec4 | 12139 | #ifdef FOUR_WORD_PLT |
52ab56c2 | 12140 | bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12); |
5e681ec4 | 12141 | #endif |
00a97672 | 12142 | } |
252b5132 | 12143 | |
e5a52504 MM |
12144 | /* Fill in the entry in the global offset table. */ |
12145 | bfd_put_32 (output_bfd, | |
12146 | (splt->output_section->vma | |
12147 | + splt->output_offset), | |
12148 | sgot->contents + got_offset); | |
906e58ca | 12149 | |
00a97672 RS |
12150 | /* Fill in the entry in the .rel(a).plt section. */ |
12151 | rel.r_addend = 0; | |
12152 | rel.r_offset = got_address; | |
e5a52504 MM |
12153 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT); |
12154 | } | |
57e8b36a | 12155 | |
00a97672 RS |
12156 | loc = srel->contents + plt_index * RELOC_SIZE (htab); |
12157 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
252b5132 | 12158 | |
f5385ebf | 12159 | if (!h->def_regular) |
252b5132 RH |
12160 | { |
12161 | /* Mark the symbol as undefined, rather than as defined in | |
12162 | the .plt section. Leave the value alone. */ | |
12163 | sym->st_shndx = SHN_UNDEF; | |
d982ba73 PB |
12164 | /* If the symbol is weak, we do need to clear the value. |
12165 | Otherwise, the PLT entry would provide a definition for | |
12166 | the symbol even if the symbol wasn't defined anywhere, | |
12167 | and so the symbol would never be NULL. */ | |
f5385ebf | 12168 | if (!h->ref_regular_nonweak) |
d982ba73 | 12169 | sym->st_value = 0; |
252b5132 RH |
12170 | } |
12171 | } | |
12172 | ||
ba93b8ac DJ |
12173 | if (h->got.offset != (bfd_vma) -1 |
12174 | && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0 | |
12175 | && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0) | |
252b5132 RH |
12176 | { |
12177 | asection * sgot; | |
12178 | asection * srel; | |
947216bf AM |
12179 | Elf_Internal_Rela rel; |
12180 | bfd_byte *loc; | |
00a97672 | 12181 | bfd_vma offset; |
252b5132 RH |
12182 | |
12183 | /* This symbol has an entry in the global offset table. Set it | |
12184 | up. */ | |
252b5132 | 12185 | sgot = bfd_get_section_by_name (dynobj, ".got"); |
00a97672 | 12186 | srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got")); |
252b5132 RH |
12187 | BFD_ASSERT (sgot != NULL && srel != NULL); |
12188 | ||
00a97672 RS |
12189 | offset = (h->got.offset & ~(bfd_vma) 1); |
12190 | rel.r_addend = 0; | |
252b5132 RH |
12191 | rel.r_offset = (sgot->output_section->vma |
12192 | + sgot->output_offset | |
00a97672 | 12193 | + offset); |
252b5132 | 12194 | |
5e681ec4 PB |
12195 | /* If this is a static link, or it is a -Bsymbolic link and the |
12196 | symbol is defined locally or was forced to be local because | |
12197 | of a version file, we just want to emit a RELATIVE reloc. | |
12198 | The entry in the global offset table will already have been | |
12199 | initialized in the relocate_section function. */ | |
252b5132 | 12200 | if (info->shared |
5e681ec4 PB |
12201 | && SYMBOL_REFERENCES_LOCAL (info, h)) |
12202 | { | |
906e58ca | 12203 | BFD_ASSERT ((h->got.offset & 1) != 0); |
5e681ec4 | 12204 | rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); |
00a97672 RS |
12205 | if (!htab->use_rel) |
12206 | { | |
12207 | rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset); | |
12208 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset); | |
12209 | } | |
5e681ec4 | 12210 | } |
252b5132 RH |
12211 | else |
12212 | { | |
906e58ca | 12213 | BFD_ASSERT ((h->got.offset & 1) == 0); |
00a97672 | 12214 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset); |
252b5132 RH |
12215 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); |
12216 | } | |
12217 | ||
00a97672 RS |
12218 | loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab); |
12219 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
252b5132 RH |
12220 | } |
12221 | ||
f5385ebf | 12222 | if (h->needs_copy) |
252b5132 RH |
12223 | { |
12224 | asection * s; | |
947216bf AM |
12225 | Elf_Internal_Rela rel; |
12226 | bfd_byte *loc; | |
252b5132 RH |
12227 | |
12228 | /* This symbol needs a copy reloc. Set it up. */ | |
252b5132 RH |
12229 | BFD_ASSERT (h->dynindx != -1 |
12230 | && (h->root.type == bfd_link_hash_defined | |
12231 | || h->root.type == bfd_link_hash_defweak)); | |
12232 | ||
12233 | s = bfd_get_section_by_name (h->root.u.def.section->owner, | |
00a97672 | 12234 | RELOC_SECTION (htab, ".bss")); |
252b5132 RH |
12235 | BFD_ASSERT (s != NULL); |
12236 | ||
00a97672 | 12237 | rel.r_addend = 0; |
252b5132 RH |
12238 | rel.r_offset = (h->root.u.def.value |
12239 | + h->root.u.def.section->output_section->vma | |
12240 | + h->root.u.def.section->output_offset); | |
12241 | rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); | |
00a97672 RS |
12242 | loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab); |
12243 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); | |
252b5132 RH |
12244 | } |
12245 | ||
00a97672 RS |
12246 | /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, |
12247 | the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative | |
12248 | to the ".got" section. */ | |
252b5132 | 12249 | if (strcmp (h->root.root.string, "_DYNAMIC") == 0 |
00a97672 | 12250 | || (!htab->vxworks_p && h == htab->root.hgot)) |
252b5132 RH |
12251 | sym->st_shndx = SHN_ABS; |
12252 | ||
b34976b6 | 12253 | return TRUE; |
252b5132 RH |
12254 | } |
12255 | ||
12256 | /* Finish up the dynamic sections. */ | |
12257 | ||
b34976b6 | 12258 | static bfd_boolean |
57e8b36a | 12259 | elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) |
252b5132 RH |
12260 | { |
12261 | bfd * dynobj; | |
12262 | asection * sgot; | |
12263 | asection * sdyn; | |
4dfe6ac6 NC |
12264 | struct elf32_arm_link_hash_table *htab; |
12265 | ||
12266 | htab = elf32_arm_hash_table (info); | |
12267 | if (htab == NULL) | |
12268 | return FALSE; | |
252b5132 RH |
12269 | |
12270 | dynobj = elf_hash_table (info)->dynobj; | |
12271 | ||
12272 | sgot = bfd_get_section_by_name (dynobj, ".got.plt"); | |
4dfe6ac6 | 12273 | BFD_ASSERT (htab->symbian_p || sgot != NULL); |
252b5132 RH |
12274 | sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); |
12275 | ||
12276 | if (elf_hash_table (info)->dynamic_sections_created) | |
12277 | { | |
12278 | asection *splt; | |
12279 | Elf32_External_Dyn *dyncon, *dynconend; | |
12280 | ||
12281 | splt = bfd_get_section_by_name (dynobj, ".plt"); | |
24a1ba0f | 12282 | BFD_ASSERT (splt != NULL && sdyn != NULL); |
252b5132 RH |
12283 | |
12284 | dyncon = (Elf32_External_Dyn *) sdyn->contents; | |
eea6121a | 12285 | dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); |
9b485d32 | 12286 | |
252b5132 RH |
12287 | for (; dyncon < dynconend; dyncon++) |
12288 | { | |
12289 | Elf_Internal_Dyn dyn; | |
12290 | const char * name; | |
12291 | asection * s; | |
12292 | ||
12293 | bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); | |
12294 | ||
12295 | switch (dyn.d_tag) | |
12296 | { | |
229fcec5 MM |
12297 | unsigned int type; |
12298 | ||
252b5132 | 12299 | default: |
7a2b07ff NS |
12300 | if (htab->vxworks_p |
12301 | && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) | |
12302 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
252b5132 RH |
12303 | break; |
12304 | ||
229fcec5 MM |
12305 | case DT_HASH: |
12306 | name = ".hash"; | |
12307 | goto get_vma_if_bpabi; | |
12308 | case DT_STRTAB: | |
12309 | name = ".dynstr"; | |
12310 | goto get_vma_if_bpabi; | |
12311 | case DT_SYMTAB: | |
12312 | name = ".dynsym"; | |
12313 | goto get_vma_if_bpabi; | |
c0042f5d MM |
12314 | case DT_VERSYM: |
12315 | name = ".gnu.version"; | |
12316 | goto get_vma_if_bpabi; | |
12317 | case DT_VERDEF: | |
12318 | name = ".gnu.version_d"; | |
12319 | goto get_vma_if_bpabi; | |
12320 | case DT_VERNEED: | |
12321 | name = ".gnu.version_r"; | |
12322 | goto get_vma_if_bpabi; | |
12323 | ||
252b5132 RH |
12324 | case DT_PLTGOT: |
12325 | name = ".got"; | |
12326 | goto get_vma; | |
12327 | case DT_JMPREL: | |
00a97672 | 12328 | name = RELOC_SECTION (htab, ".plt"); |
252b5132 RH |
12329 | get_vma: |
12330 | s = bfd_get_section_by_name (output_bfd, name); | |
12331 | BFD_ASSERT (s != NULL); | |
229fcec5 MM |
12332 | if (!htab->symbian_p) |
12333 | dyn.d_un.d_ptr = s->vma; | |
12334 | else | |
12335 | /* In the BPABI, tags in the PT_DYNAMIC section point | |
12336 | at the file offset, not the memory address, for the | |
12337 | convenience of the post linker. */ | |
12338 | dyn.d_un.d_ptr = s->filepos; | |
252b5132 RH |
12339 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
12340 | break; | |
12341 | ||
229fcec5 MM |
12342 | get_vma_if_bpabi: |
12343 | if (htab->symbian_p) | |
12344 | goto get_vma; | |
12345 | break; | |
12346 | ||
252b5132 | 12347 | case DT_PLTRELSZ: |
00a97672 RS |
12348 | s = bfd_get_section_by_name (output_bfd, |
12349 | RELOC_SECTION (htab, ".plt")); | |
252b5132 | 12350 | BFD_ASSERT (s != NULL); |
eea6121a | 12351 | dyn.d_un.d_val = s->size; |
252b5132 RH |
12352 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
12353 | break; | |
906e58ca | 12354 | |
252b5132 | 12355 | case DT_RELSZ: |
00a97672 | 12356 | case DT_RELASZ: |
229fcec5 MM |
12357 | if (!htab->symbian_p) |
12358 | { | |
12359 | /* My reading of the SVR4 ABI indicates that the | |
12360 | procedure linkage table relocs (DT_JMPREL) should be | |
12361 | included in the overall relocs (DT_REL). This is | |
12362 | what Solaris does. However, UnixWare can not handle | |
12363 | that case. Therefore, we override the DT_RELSZ entry | |
12364 | here to make it not include the JMPREL relocs. Since | |
00a97672 | 12365 | the linker script arranges for .rel(a).plt to follow all |
229fcec5 MM |
12366 | other relocation sections, we don't have to worry |
12367 | about changing the DT_REL entry. */ | |
00a97672 RS |
12368 | s = bfd_get_section_by_name (output_bfd, |
12369 | RELOC_SECTION (htab, ".plt")); | |
229fcec5 MM |
12370 | if (s != NULL) |
12371 | dyn.d_un.d_val -= s->size; | |
12372 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
12373 | break; | |
12374 | } | |
8029a119 | 12375 | /* Fall through. */ |
229fcec5 MM |
12376 | |
12377 | case DT_REL: | |
12378 | case DT_RELA: | |
229fcec5 MM |
12379 | /* In the BPABI, the DT_REL tag must point at the file |
12380 | offset, not the VMA, of the first relocation | |
12381 | section. So, we use code similar to that in | |
12382 | elflink.c, but do not check for SHF_ALLOC on the | |
12383 | relcoation section, since relocations sections are | |
12384 | never allocated under the BPABI. The comments above | |
12385 | about Unixware notwithstanding, we include all of the | |
12386 | relocations here. */ | |
12387 | if (htab->symbian_p) | |
12388 | { | |
12389 | unsigned int i; | |
12390 | type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) | |
12391 | ? SHT_REL : SHT_RELA); | |
12392 | dyn.d_un.d_val = 0; | |
12393 | for (i = 1; i < elf_numsections (output_bfd); i++) | |
12394 | { | |
906e58ca | 12395 | Elf_Internal_Shdr *hdr |
229fcec5 MM |
12396 | = elf_elfsections (output_bfd)[i]; |
12397 | if (hdr->sh_type == type) | |
12398 | { | |
906e58ca | 12399 | if (dyn.d_tag == DT_RELSZ |
229fcec5 MM |
12400 | || dyn.d_tag == DT_RELASZ) |
12401 | dyn.d_un.d_val += hdr->sh_size; | |
de52dba4 AM |
12402 | else if ((ufile_ptr) hdr->sh_offset |
12403 | <= dyn.d_un.d_val - 1) | |
229fcec5 MM |
12404 | dyn.d_un.d_val = hdr->sh_offset; |
12405 | } | |
12406 | } | |
12407 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); | |
12408 | } | |
252b5132 | 12409 | break; |
88f7bcd5 NC |
12410 | |
12411 | /* Set the bottom bit of DT_INIT/FINI if the | |
12412 | corresponding function is Thumb. */ | |
12413 | case DT_INIT: | |
12414 | name = info->init_function; | |
12415 | goto get_sym; | |
12416 | case DT_FINI: | |
12417 | name = info->fini_function; | |
12418 | get_sym: | |
12419 | /* If it wasn't set by elf_bfd_final_link | |
4cc11e76 | 12420 | then there is nothing to adjust. */ |
88f7bcd5 NC |
12421 | if (dyn.d_un.d_val != 0) |
12422 | { | |
12423 | struct elf_link_hash_entry * eh; | |
12424 | ||
12425 | eh = elf_link_hash_lookup (elf_hash_table (info), name, | |
b34976b6 | 12426 | FALSE, FALSE, TRUE); |
906e58ca | 12427 | if (eh != NULL |
88f7bcd5 NC |
12428 | && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC) |
12429 | { | |
12430 | dyn.d_un.d_val |= 1; | |
b34976b6 | 12431 | bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); |
88f7bcd5 NC |
12432 | } |
12433 | } | |
12434 | break; | |
252b5132 RH |
12435 | } |
12436 | } | |
12437 | ||
24a1ba0f | 12438 | /* Fill in the first entry in the procedure linkage table. */ |
4dfe6ac6 | 12439 | if (splt->size > 0 && htab->plt_header_size) |
f7a74f8c | 12440 | { |
00a97672 RS |
12441 | const bfd_vma *plt0_entry; |
12442 | bfd_vma got_address, plt_address, got_displacement; | |
12443 | ||
12444 | /* Calculate the addresses of the GOT and PLT. */ | |
12445 | got_address = sgot->output_section->vma + sgot->output_offset; | |
12446 | plt_address = splt->output_section->vma + splt->output_offset; | |
12447 | ||
12448 | if (htab->vxworks_p) | |
12449 | { | |
12450 | /* The VxWorks GOT is relocated by the dynamic linker. | |
12451 | Therefore, we must emit relocations rather than simply | |
12452 | computing the values now. */ | |
12453 | Elf_Internal_Rela rel; | |
12454 | ||
12455 | plt0_entry = elf32_arm_vxworks_exec_plt0_entry; | |
52ab56c2 PB |
12456 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
12457 | splt->contents + 0); | |
12458 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
12459 | splt->contents + 4); | |
12460 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
12461 | splt->contents + 8); | |
00a97672 RS |
12462 | bfd_put_32 (output_bfd, got_address, splt->contents + 12); |
12463 | ||
8029a119 | 12464 | /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ |
00a97672 RS |
12465 | rel.r_offset = plt_address + 12; |
12466 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
12467 | rel.r_addend = 0; | |
12468 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, | |
12469 | htab->srelplt2->contents); | |
12470 | } | |
12471 | else | |
12472 | { | |
12473 | got_displacement = got_address - (plt_address + 16); | |
12474 | ||
12475 | plt0_entry = elf32_arm_plt0_entry; | |
52ab56c2 PB |
12476 | put_arm_insn (htab, output_bfd, plt0_entry[0], |
12477 | splt->contents + 0); | |
12478 | put_arm_insn (htab, output_bfd, plt0_entry[1], | |
12479 | splt->contents + 4); | |
12480 | put_arm_insn (htab, output_bfd, plt0_entry[2], | |
12481 | splt->contents + 8); | |
12482 | put_arm_insn (htab, output_bfd, plt0_entry[3], | |
12483 | splt->contents + 12); | |
5e681ec4 | 12484 | |
5e681ec4 | 12485 | #ifdef FOUR_WORD_PLT |
00a97672 RS |
12486 | /* The displacement value goes in the otherwise-unused |
12487 | last word of the second entry. */ | |
12488 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); | |
5e681ec4 | 12489 | #else |
00a97672 | 12490 | bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); |
5e681ec4 | 12491 | #endif |
00a97672 | 12492 | } |
f7a74f8c | 12493 | } |
252b5132 RH |
12494 | |
12495 | /* UnixWare sets the entsize of .plt to 4, although that doesn't | |
12496 | really seem like the right value. */ | |
74541ad4 AM |
12497 | if (splt->output_section->owner == output_bfd) |
12498 | elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; | |
00a97672 RS |
12499 | |
12500 | if (htab->vxworks_p && !info->shared && htab->splt->size > 0) | |
12501 | { | |
12502 | /* Correct the .rel(a).plt.unloaded relocations. They will have | |
12503 | incorrect symbol indexes. */ | |
12504 | int num_plts; | |
eed62c48 | 12505 | unsigned char *p; |
00a97672 RS |
12506 | |
12507 | num_plts = ((htab->splt->size - htab->plt_header_size) | |
12508 | / htab->plt_entry_size); | |
12509 | p = htab->srelplt2->contents + RELOC_SIZE (htab); | |
12510 | ||
12511 | for (; num_plts; num_plts--) | |
12512 | { | |
12513 | Elf_Internal_Rela rel; | |
12514 | ||
12515 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
12516 | rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); | |
12517 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
12518 | p += RELOC_SIZE (htab); | |
12519 | ||
12520 | SWAP_RELOC_IN (htab) (output_bfd, p, &rel); | |
12521 | rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); | |
12522 | SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); | |
12523 | p += RELOC_SIZE (htab); | |
12524 | } | |
12525 | } | |
252b5132 RH |
12526 | } |
12527 | ||
12528 | /* Fill in the first three entries in the global offset table. */ | |
229fcec5 | 12529 | if (sgot) |
252b5132 | 12530 | { |
229fcec5 MM |
12531 | if (sgot->size > 0) |
12532 | { | |
12533 | if (sdyn == NULL) | |
12534 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); | |
12535 | else | |
12536 | bfd_put_32 (output_bfd, | |
12537 | sdyn->output_section->vma + sdyn->output_offset, | |
12538 | sgot->contents); | |
12539 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); | |
12540 | bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); | |
12541 | } | |
252b5132 | 12542 | |
229fcec5 MM |
12543 | elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; |
12544 | } | |
252b5132 | 12545 | |
b34976b6 | 12546 | return TRUE; |
252b5132 RH |
12547 | } |
12548 | ||
ba96a88f | 12549 | static void |
57e8b36a | 12550 | elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) |
ba96a88f | 12551 | { |
9b485d32 | 12552 | Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ |
e489d0ae | 12553 | struct elf32_arm_link_hash_table *globals; |
ba96a88f NC |
12554 | |
12555 | i_ehdrp = elf_elfheader (abfd); | |
12556 | ||
94a3258f PB |
12557 | if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) |
12558 | i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; | |
12559 | else | |
12560 | i_ehdrp->e_ident[EI_OSABI] = 0; | |
ba96a88f | 12561 | i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; |
e489d0ae | 12562 | |
93204d3a PB |
12563 | if (link_info) |
12564 | { | |
12565 | globals = elf32_arm_hash_table (link_info); | |
4dfe6ac6 | 12566 | if (globals != NULL && globals->byteswap_code) |
93204d3a PB |
12567 | i_ehdrp->e_flags |= EF_ARM_BE8; |
12568 | } | |
ba96a88f NC |
12569 | } |
12570 | ||
99e4ae17 | 12571 | static enum elf_reloc_type_class |
57e8b36a | 12572 | elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela) |
99e4ae17 | 12573 | { |
f51e552e | 12574 | switch ((int) ELF32_R_TYPE (rela->r_info)) |
99e4ae17 AJ |
12575 | { |
12576 | case R_ARM_RELATIVE: | |
12577 | return reloc_class_relative; | |
12578 | case R_ARM_JUMP_SLOT: | |
12579 | return reloc_class_plt; | |
12580 | case R_ARM_COPY: | |
12581 | return reloc_class_copy; | |
12582 | default: | |
12583 | return reloc_class_normal; | |
12584 | } | |
12585 | } | |
12586 | ||
e16bb312 NC |
12587 | /* Set the right machine number for an Arm ELF file. */ |
12588 | ||
12589 | static bfd_boolean | |
57e8b36a | 12590 | elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr) |
e16bb312 NC |
12591 | { |
12592 | if (hdr->sh_type == SHT_NOTE) | |
12593 | *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS; | |
12594 | ||
12595 | return TRUE; | |
12596 | } | |
12597 | ||
e489d0ae | 12598 | static void |
57e8b36a | 12599 | elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) |
e16bb312 | 12600 | { |
5a6c6817 | 12601 | bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
e16bb312 NC |
12602 | } |
12603 | ||
40a18ebd NC |
12604 | /* Return TRUE if this is an unwinding table entry. */ |
12605 | ||
12606 | static bfd_boolean | |
12607 | is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) | |
12608 | { | |
0112cd26 NC |
12609 | return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) |
12610 | || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); | |
40a18ebd NC |
12611 | } |
12612 | ||
12613 | ||
12614 | /* Set the type and flags for an ARM section. We do this by | |
12615 | the section name, which is a hack, but ought to work. */ | |
12616 | ||
12617 | static bfd_boolean | |
12618 | elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) | |
12619 | { | |
12620 | const char * name; | |
12621 | ||
12622 | name = bfd_get_section_name (abfd, sec); | |
12623 | ||
12624 | if (is_arm_elf_unwind_section_name (abfd, name)) | |
12625 | { | |
12626 | hdr->sh_type = SHT_ARM_EXIDX; | |
12627 | hdr->sh_flags |= SHF_LINK_ORDER; | |
12628 | } | |
12629 | return TRUE; | |
12630 | } | |
12631 | ||
6dc132d9 L |
12632 | /* Handle an ARM specific section when reading an object file. This is |
12633 | called when bfd_section_from_shdr finds a section with an unknown | |
12634 | type. */ | |
40a18ebd NC |
12635 | |
12636 | static bfd_boolean | |
12637 | elf32_arm_section_from_shdr (bfd *abfd, | |
12638 | Elf_Internal_Shdr * hdr, | |
6dc132d9 L |
12639 | const char *name, |
12640 | int shindex) | |
40a18ebd NC |
12641 | { |
12642 | /* There ought to be a place to keep ELF backend specific flags, but | |
12643 | at the moment there isn't one. We just keep track of the | |
12644 | sections by their name, instead. Fortunately, the ABI gives | |
12645 | names for all the ARM specific sections, so we will probably get | |
12646 | away with this. */ | |
12647 | switch (hdr->sh_type) | |
12648 | { | |
12649 | case SHT_ARM_EXIDX: | |
0951f019 RE |
12650 | case SHT_ARM_PREEMPTMAP: |
12651 | case SHT_ARM_ATTRIBUTES: | |
40a18ebd NC |
12652 | break; |
12653 | ||
12654 | default: | |
12655 | return FALSE; | |
12656 | } | |
12657 | ||
6dc132d9 | 12658 | if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) |
40a18ebd NC |
12659 | return FALSE; |
12660 | ||
12661 | return TRUE; | |
12662 | } | |
e489d0ae | 12663 | |
8e3de13a NC |
12664 | /* A structure used to record a list of sections, independently |
12665 | of the next and prev fields in the asection structure. */ | |
12666 | typedef struct section_list | |
12667 | { | |
12668 | asection * sec; | |
12669 | struct section_list * next; | |
12670 | struct section_list * prev; | |
12671 | } | |
12672 | section_list; | |
12673 | ||
12674 | /* Unfortunately we need to keep a list of sections for which | |
12675 | an _arm_elf_section_data structure has been allocated. This | |
12676 | is because it is possible for functions like elf32_arm_write_section | |
12677 | to be called on a section which has had an elf_data_structure | |
12678 | allocated for it (and so the used_by_bfd field is valid) but | |
12679 | for which the ARM extended version of this structure - the | |
12680 | _arm_elf_section_data structure - has not been allocated. */ | |
12681 | static section_list * sections_with_arm_elf_section_data = NULL; | |
12682 | ||
12683 | static void | |
957c6e41 | 12684 | record_section_with_arm_elf_section_data (asection * sec) |
8e3de13a NC |
12685 | { |
12686 | struct section_list * entry; | |
12687 | ||
21d799b5 | 12688 | entry = (struct section_list *) bfd_malloc (sizeof (* entry)); |
8e3de13a NC |
12689 | if (entry == NULL) |
12690 | return; | |
12691 | entry->sec = sec; | |
12692 | entry->next = sections_with_arm_elf_section_data; | |
12693 | entry->prev = NULL; | |
12694 | if (entry->next != NULL) | |
12695 | entry->next->prev = entry; | |
12696 | sections_with_arm_elf_section_data = entry; | |
12697 | } | |
12698 | ||
44444f50 NC |
12699 | static struct section_list * |
12700 | find_arm_elf_section_entry (asection * sec) | |
8e3de13a NC |
12701 | { |
12702 | struct section_list * entry; | |
bd4aae00 | 12703 | static struct section_list * last_entry = NULL; |
8e3de13a | 12704 | |
bd4aae00 NC |
12705 | /* This is a short cut for the typical case where the sections are added |
12706 | to the sections_with_arm_elf_section_data list in forward order and | |
12707 | then looked up here in backwards order. This makes a real difference | |
12708 | to the ld-srec/sec64k.exp linker test. */ | |
44444f50 | 12709 | entry = sections_with_arm_elf_section_data; |
bd4aae00 NC |
12710 | if (last_entry != NULL) |
12711 | { | |
12712 | if (last_entry->sec == sec) | |
44444f50 NC |
12713 | entry = last_entry; |
12714 | else if (last_entry->next != NULL | |
12715 | && last_entry->next->sec == sec) | |
12716 | entry = last_entry->next; | |
bd4aae00 | 12717 | } |
44444f50 NC |
12718 | |
12719 | for (; entry; entry = entry->next) | |
8e3de13a | 12720 | if (entry->sec == sec) |
44444f50 | 12721 | break; |
bd4aae00 | 12722 | |
44444f50 NC |
12723 | if (entry) |
12724 | /* Record the entry prior to this one - it is the entry we are most | |
12725 | likely to want to locate next time. Also this way if we have been | |
12726 | called from unrecord_section_with_arm_elf_section_data() we will not | |
12727 | be caching a pointer that is about to be freed. */ | |
12728 | last_entry = entry->prev; | |
12729 | ||
12730 | return entry; | |
12731 | } | |
12732 | ||
12733 | static _arm_elf_section_data * | |
12734 | get_arm_elf_section_data (asection * sec) | |
12735 | { | |
12736 | struct section_list * entry; | |
12737 | ||
12738 | entry = find_arm_elf_section_entry (sec); | |
12739 | ||
12740 | if (entry) | |
12741 | return elf32_arm_section_data (entry->sec); | |
12742 | else | |
12743 | return NULL; | |
8e3de13a NC |
12744 | } |
12745 | ||
12746 | static void | |
12747 | unrecord_section_with_arm_elf_section_data (asection * sec) | |
12748 | { | |
12749 | struct section_list * entry; | |
12750 | ||
44444f50 NC |
12751 | entry = find_arm_elf_section_entry (sec); |
12752 | ||
12753 | if (entry) | |
12754 | { | |
12755 | if (entry->prev != NULL) | |
12756 | entry->prev->next = entry->next; | |
12757 | if (entry->next != NULL) | |
12758 | entry->next->prev = entry->prev; | |
12759 | if (entry == sections_with_arm_elf_section_data) | |
12760 | sections_with_arm_elf_section_data = entry->next; | |
12761 | free (entry); | |
12762 | } | |
8e3de13a NC |
12763 | } |
12764 | ||
e489d0ae | 12765 | |
4e617b1e PB |
12766 | typedef struct |
12767 | { | |
12768 | void *finfo; | |
12769 | struct bfd_link_info *info; | |
91a5743d PB |
12770 | asection *sec; |
12771 | int sec_shndx; | |
6e0b88f1 AM |
12772 | int (*func) (void *, const char *, Elf_Internal_Sym *, |
12773 | asection *, struct elf_link_hash_entry *); | |
4e617b1e PB |
12774 | } output_arch_syminfo; |
12775 | ||
12776 | enum map_symbol_type | |
12777 | { | |
12778 | ARM_MAP_ARM, | |
12779 | ARM_MAP_THUMB, | |
12780 | ARM_MAP_DATA | |
12781 | }; | |
12782 | ||
12783 | ||
7413f23f | 12784 | /* Output a single mapping symbol. */ |
4e617b1e PB |
12785 | |
12786 | static bfd_boolean | |
7413f23f DJ |
12787 | elf32_arm_output_map_sym (output_arch_syminfo *osi, |
12788 | enum map_symbol_type type, | |
12789 | bfd_vma offset) | |
4e617b1e PB |
12790 | { |
12791 | static const char *names[3] = {"$a", "$t", "$d"}; | |
4e617b1e PB |
12792 | Elf_Internal_Sym sym; |
12793 | ||
91a5743d PB |
12794 | sym.st_value = osi->sec->output_section->vma |
12795 | + osi->sec->output_offset | |
12796 | + offset; | |
4e617b1e PB |
12797 | sym.st_size = 0; |
12798 | sym.st_other = 0; | |
12799 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); | |
91a5743d | 12800 | sym.st_shndx = osi->sec_shndx; |
6e0b88f1 | 12801 | return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1; |
4e617b1e PB |
12802 | } |
12803 | ||
12804 | ||
12805 | /* Output mapping symbols for PLT entries associated with H. */ | |
12806 | ||
12807 | static bfd_boolean | |
12808 | elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) | |
12809 | { | |
12810 | output_arch_syminfo *osi = (output_arch_syminfo *) inf; | |
12811 | struct elf32_arm_link_hash_table *htab; | |
12812 | struct elf32_arm_link_hash_entry *eh; | |
12813 | bfd_vma addr; | |
12814 | ||
4e617b1e PB |
12815 | if (h->root.type == bfd_link_hash_indirect) |
12816 | return TRUE; | |
12817 | ||
12818 | if (h->root.type == bfd_link_hash_warning) | |
12819 | /* When warning symbols are created, they **replace** the "real" | |
12820 | entry in the hash table, thus we never get to see the real | |
12821 | symbol in a hash traversal. So look at it now. */ | |
12822 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
12823 | ||
12824 | if (h->plt.offset == (bfd_vma) -1) | |
12825 | return TRUE; | |
12826 | ||
4dfe6ac6 NC |
12827 | htab = elf32_arm_hash_table (osi->info); |
12828 | if (htab == NULL) | |
12829 | return FALSE; | |
12830 | ||
4e617b1e PB |
12831 | eh = (struct elf32_arm_link_hash_entry *) h; |
12832 | addr = h->plt.offset; | |
12833 | if (htab->symbian_p) | |
12834 | { | |
7413f23f | 12835 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 12836 | return FALSE; |
7413f23f | 12837 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) |
4e617b1e PB |
12838 | return FALSE; |
12839 | } | |
12840 | else if (htab->vxworks_p) | |
12841 | { | |
7413f23f | 12842 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 12843 | return FALSE; |
7413f23f | 12844 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) |
4e617b1e | 12845 | return FALSE; |
7413f23f | 12846 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) |
4e617b1e | 12847 | return FALSE; |
7413f23f | 12848 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) |
4e617b1e PB |
12849 | return FALSE; |
12850 | } | |
12851 | else | |
12852 | { | |
bd97cb95 DJ |
12853 | bfd_signed_vma thumb_refs; |
12854 | ||
12855 | thumb_refs = eh->plt_thumb_refcount; | |
12856 | if (!htab->use_blx) | |
12857 | thumb_refs += eh->plt_maybe_thumb_refcount; | |
4e617b1e | 12858 | |
bd97cb95 | 12859 | if (thumb_refs > 0) |
4e617b1e | 12860 | { |
7413f23f | 12861 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) |
4e617b1e PB |
12862 | return FALSE; |
12863 | } | |
12864 | #ifdef FOUR_WORD_PLT | |
7413f23f | 12865 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e | 12866 | return FALSE; |
7413f23f | 12867 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) |
4e617b1e PB |
12868 | return FALSE; |
12869 | #else | |
906e58ca | 12870 | /* A three-word PLT with no Thumb thunk contains only Arm code, |
4e617b1e PB |
12871 | so only need to output a mapping symbol for the first PLT entry and |
12872 | entries with thumb thunks. */ | |
bd97cb95 | 12873 | if (thumb_refs > 0 || addr == 20) |
4e617b1e | 12874 | { |
7413f23f | 12875 | if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) |
4e617b1e PB |
12876 | return FALSE; |
12877 | } | |
12878 | #endif | |
12879 | } | |
12880 | ||
12881 | return TRUE; | |
12882 | } | |
12883 | ||
7413f23f DJ |
12884 | /* Output a single local symbol for a generated stub. */ |
12885 | ||
12886 | static bfd_boolean | |
12887 | elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, | |
12888 | bfd_vma offset, bfd_vma size) | |
12889 | { | |
7413f23f DJ |
12890 | Elf_Internal_Sym sym; |
12891 | ||
7413f23f DJ |
12892 | sym.st_value = osi->sec->output_section->vma |
12893 | + osi->sec->output_offset | |
12894 | + offset; | |
12895 | sym.st_size = size; | |
12896 | sym.st_other = 0; | |
12897 | sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); | |
12898 | sym.st_shndx = osi->sec_shndx; | |
6e0b88f1 | 12899 | return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1; |
7413f23f | 12900 | } |
4e617b1e | 12901 | |
da5938a2 | 12902 | static bfd_boolean |
8029a119 NC |
12903 | arm_map_one_stub (struct bfd_hash_entry * gen_entry, |
12904 | void * in_arg) | |
da5938a2 NC |
12905 | { |
12906 | struct elf32_arm_stub_hash_entry *stub_entry; | |
12907 | struct bfd_link_info *info; | |
da5938a2 NC |
12908 | asection *stub_sec; |
12909 | bfd_vma addr; | |
7413f23f | 12910 | char *stub_name; |
9a008db3 | 12911 | output_arch_syminfo *osi; |
d3ce72d0 | 12912 | const insn_sequence *template_sequence; |
461a49ca DJ |
12913 | enum stub_insn_type prev_type; |
12914 | int size; | |
12915 | int i; | |
12916 | enum map_symbol_type sym_type; | |
da5938a2 NC |
12917 | |
12918 | /* Massage our args to the form they really have. */ | |
12919 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
9a008db3 | 12920 | osi = (output_arch_syminfo *) in_arg; |
da5938a2 | 12921 | |
da5938a2 NC |
12922 | info = osi->info; |
12923 | ||
da5938a2 NC |
12924 | stub_sec = stub_entry->stub_sec; |
12925 | ||
12926 | /* Ensure this stub is attached to the current section being | |
7413f23f | 12927 | processed. */ |
da5938a2 NC |
12928 | if (stub_sec != osi->sec) |
12929 | return TRUE; | |
12930 | ||
7413f23f DJ |
12931 | addr = (bfd_vma) stub_entry->stub_offset; |
12932 | stub_name = stub_entry->output_name; | |
da5938a2 | 12933 | |
d3ce72d0 NC |
12934 | template_sequence = stub_entry->stub_template; |
12935 | switch (template_sequence[0].type) | |
7413f23f | 12936 | { |
461a49ca DJ |
12937 | case ARM_TYPE: |
12938 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size)) | |
da5938a2 NC |
12939 | return FALSE; |
12940 | break; | |
461a49ca | 12941 | case THUMB16_TYPE: |
48229727 | 12942 | case THUMB32_TYPE: |
461a49ca DJ |
12943 | if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, |
12944 | stub_entry->stub_size)) | |
da5938a2 NC |
12945 | return FALSE; |
12946 | break; | |
12947 | default: | |
12948 | BFD_FAIL (); | |
48229727 | 12949 | return 0; |
7413f23f | 12950 | } |
da5938a2 | 12951 | |
461a49ca DJ |
12952 | prev_type = DATA_TYPE; |
12953 | size = 0; | |
12954 | for (i = 0; i < stub_entry->stub_template_size; i++) | |
12955 | { | |
d3ce72d0 | 12956 | switch (template_sequence[i].type) |
461a49ca DJ |
12957 | { |
12958 | case ARM_TYPE: | |
12959 | sym_type = ARM_MAP_ARM; | |
12960 | break; | |
12961 | ||
12962 | case THUMB16_TYPE: | |
48229727 | 12963 | case THUMB32_TYPE: |
461a49ca DJ |
12964 | sym_type = ARM_MAP_THUMB; |
12965 | break; | |
12966 | ||
12967 | case DATA_TYPE: | |
12968 | sym_type = ARM_MAP_DATA; | |
12969 | break; | |
12970 | ||
12971 | default: | |
12972 | BFD_FAIL (); | |
4e31c731 | 12973 | return FALSE; |
461a49ca DJ |
12974 | } |
12975 | ||
d3ce72d0 | 12976 | if (template_sequence[i].type != prev_type) |
461a49ca | 12977 | { |
d3ce72d0 | 12978 | prev_type = template_sequence[i].type; |
461a49ca DJ |
12979 | if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) |
12980 | return FALSE; | |
12981 | } | |
12982 | ||
d3ce72d0 | 12983 | switch (template_sequence[i].type) |
461a49ca DJ |
12984 | { |
12985 | case ARM_TYPE: | |
48229727 | 12986 | case THUMB32_TYPE: |
461a49ca DJ |
12987 | size += 4; |
12988 | break; | |
12989 | ||
12990 | case THUMB16_TYPE: | |
12991 | size += 2; | |
12992 | break; | |
12993 | ||
12994 | case DATA_TYPE: | |
12995 | size += 4; | |
12996 | break; | |
12997 | ||
12998 | default: | |
12999 | BFD_FAIL (); | |
4e31c731 | 13000 | return FALSE; |
461a49ca DJ |
13001 | } |
13002 | } | |
13003 | ||
da5938a2 NC |
13004 | return TRUE; |
13005 | } | |
13006 | ||
33811162 DG |
13007 | /* Output mapping symbols for linker generated sections, |
13008 | and for those data-only sections that do not have a | |
13009 | $d. */ | |
4e617b1e PB |
13010 | |
13011 | static bfd_boolean | |
13012 | elf32_arm_output_arch_local_syms (bfd *output_bfd, | |
906e58ca NC |
13013 | struct bfd_link_info *info, |
13014 | void *finfo, | |
6e0b88f1 AM |
13015 | int (*func) (void *, const char *, |
13016 | Elf_Internal_Sym *, | |
13017 | asection *, | |
13018 | struct elf_link_hash_entry *)) | |
4e617b1e PB |
13019 | { |
13020 | output_arch_syminfo osi; | |
13021 | struct elf32_arm_link_hash_table *htab; | |
91a5743d PB |
13022 | bfd_vma offset; |
13023 | bfd_size_type size; | |
33811162 | 13024 | bfd *input_bfd; |
4e617b1e PB |
13025 | |
13026 | htab = elf32_arm_hash_table (info); | |
4dfe6ac6 NC |
13027 | if (htab == NULL) |
13028 | return FALSE; | |
13029 | ||
906e58ca | 13030 | check_use_blx (htab); |
91a5743d | 13031 | |
4e617b1e PB |
13032 | osi.finfo = finfo; |
13033 | osi.info = info; | |
13034 | osi.func = func; | |
906e58ca | 13035 | |
33811162 DG |
13036 | /* Add a $d mapping symbol to data-only sections that |
13037 | don't have any mapping symbol. This may result in (harmless) redundant | |
13038 | mapping symbols. */ | |
13039 | for (input_bfd = info->input_bfds; | |
13040 | input_bfd != NULL; | |
13041 | input_bfd = input_bfd->link_next) | |
13042 | { | |
13043 | if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) | |
13044 | for (osi.sec = input_bfd->sections; | |
13045 | osi.sec != NULL; | |
13046 | osi.sec = osi.sec->next) | |
13047 | { | |
13048 | if (osi.sec->output_section != NULL | |
13049 | && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) | |
13050 | == SEC_HAS_CONTENTS | |
13051 | && get_arm_elf_section_data (osi.sec) != NULL | |
13052 | && get_arm_elf_section_data (osi.sec)->mapcount == 0) | |
13053 | { | |
13054 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
13055 | (output_bfd, osi.sec->output_section); | |
13056 | if (osi.sec_shndx != (int)SHN_BAD) | |
13057 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); | |
13058 | } | |
13059 | } | |
13060 | } | |
13061 | ||
91a5743d PB |
13062 | /* ARM->Thumb glue. */ |
13063 | if (htab->arm_glue_size > 0) | |
13064 | { | |
13065 | osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, | |
13066 | ARM2THUMB_GLUE_SECTION_NAME); | |
13067 | ||
13068 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
13069 | (output_bfd, osi.sec->output_section); | |
13070 | if (info->shared || htab->root.is_relocatable_executable | |
13071 | || htab->pic_veneer) | |
13072 | size = ARM2THUMB_PIC_GLUE_SIZE; | |
13073 | else if (htab->use_blx) | |
13074 | size = ARM2THUMB_V5_STATIC_GLUE_SIZE; | |
13075 | else | |
13076 | size = ARM2THUMB_STATIC_GLUE_SIZE; | |
4e617b1e | 13077 | |
91a5743d PB |
13078 | for (offset = 0; offset < htab->arm_glue_size; offset += size) |
13079 | { | |
7413f23f DJ |
13080 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); |
13081 | elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); | |
91a5743d PB |
13082 | } |
13083 | } | |
13084 | ||
13085 | /* Thumb->ARM glue. */ | |
13086 | if (htab->thumb_glue_size > 0) | |
13087 | { | |
13088 | osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, | |
13089 | THUMB2ARM_GLUE_SECTION_NAME); | |
13090 | ||
13091 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
13092 | (output_bfd, osi.sec->output_section); | |
13093 | size = THUMB2ARM_GLUE_SIZE; | |
13094 | ||
13095 | for (offset = 0; offset < htab->thumb_glue_size; offset += size) | |
13096 | { | |
7413f23f DJ |
13097 | elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); |
13098 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); | |
91a5743d PB |
13099 | } |
13100 | } | |
13101 | ||
845b51d6 PB |
13102 | /* ARMv4 BX veneers. */ |
13103 | if (htab->bx_glue_size > 0) | |
13104 | { | |
13105 | osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, | |
13106 | ARM_BX_GLUE_SECTION_NAME); | |
13107 | ||
13108 | osi.sec_shndx = _bfd_elf_section_from_bfd_section | |
13109 | (output_bfd, osi.sec->output_section); | |
13110 | ||
7413f23f | 13111 | elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); |
845b51d6 PB |
13112 | } |
13113 | ||
8029a119 NC |
13114 | /* Long calls stubs. */ |
13115 | if (htab->stub_bfd && htab->stub_bfd->sections) | |
13116 | { | |
da5938a2 | 13117 | asection* stub_sec; |
8029a119 | 13118 | |
da5938a2 NC |
13119 | for (stub_sec = htab->stub_bfd->sections; |
13120 | stub_sec != NULL; | |
8029a119 NC |
13121 | stub_sec = stub_sec->next) |
13122 | { | |
13123 | /* Ignore non-stub sections. */ | |
13124 | if (!strstr (stub_sec->name, STUB_SUFFIX)) | |
13125 | continue; | |
da5938a2 | 13126 | |
8029a119 | 13127 | osi.sec = stub_sec; |
da5938a2 | 13128 | |
8029a119 NC |
13129 | osi.sec_shndx = _bfd_elf_section_from_bfd_section |
13130 | (output_bfd, osi.sec->output_section); | |
da5938a2 | 13131 | |
8029a119 NC |
13132 | bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); |
13133 | } | |
13134 | } | |
da5938a2 | 13135 | |
91a5743d PB |
13136 | /* Finally, output mapping symbols for the PLT. */ |
13137 | if (!htab->splt || htab->splt->size == 0) | |
13138 | return TRUE; | |
13139 | ||
13140 | osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd, | |
8029a119 | 13141 | htab->splt->output_section); |
91a5743d | 13142 | osi.sec = htab->splt; |
4e617b1e PB |
13143 | /* Output mapping symbols for the plt header. SymbianOS does not have a |
13144 | plt header. */ | |
13145 | if (htab->vxworks_p) | |
13146 | { | |
13147 | /* VxWorks shared libraries have no PLT header. */ | |
13148 | if (!info->shared) | |
13149 | { | |
7413f23f | 13150 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e | 13151 | return FALSE; |
7413f23f | 13152 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) |
4e617b1e PB |
13153 | return FALSE; |
13154 | } | |
13155 | } | |
13156 | else if (!htab->symbian_p) | |
13157 | { | |
7413f23f | 13158 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) |
4e617b1e PB |
13159 | return FALSE; |
13160 | #ifndef FOUR_WORD_PLT | |
7413f23f | 13161 | if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) |
4e617b1e PB |
13162 | return FALSE; |
13163 | #endif | |
13164 | } | |
13165 | ||
13166 | elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi); | |
13167 | return TRUE; | |
13168 | } | |
13169 | ||
e489d0ae PB |
13170 | /* Allocate target specific section data. */ |
13171 | ||
13172 | static bfd_boolean | |
13173 | elf32_arm_new_section_hook (bfd *abfd, asection *sec) | |
13174 | { | |
f592407e AM |
13175 | if (!sec->used_by_bfd) |
13176 | { | |
13177 | _arm_elf_section_data *sdata; | |
13178 | bfd_size_type amt = sizeof (*sdata); | |
e489d0ae | 13179 | |
21d799b5 | 13180 | sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); |
f592407e AM |
13181 | if (sdata == NULL) |
13182 | return FALSE; | |
13183 | sec->used_by_bfd = sdata; | |
13184 | } | |
e489d0ae | 13185 | |
957c6e41 | 13186 | record_section_with_arm_elf_section_data (sec); |
8e3de13a | 13187 | |
e489d0ae PB |
13188 | return _bfd_elf_new_section_hook (abfd, sec); |
13189 | } | |
13190 | ||
13191 | ||
13192 | /* Used to order a list of mapping symbols by address. */ | |
13193 | ||
13194 | static int | |
13195 | elf32_arm_compare_mapping (const void * a, const void * b) | |
13196 | { | |
7f6a71ff JM |
13197 | const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; |
13198 | const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; | |
13199 | ||
13200 | if (amap->vma > bmap->vma) | |
13201 | return 1; | |
13202 | else if (amap->vma < bmap->vma) | |
13203 | return -1; | |
13204 | else if (amap->type > bmap->type) | |
13205 | /* Ensure results do not depend on the host qsort for objects with | |
13206 | multiple mapping symbols at the same address by sorting on type | |
13207 | after vma. */ | |
13208 | return 1; | |
13209 | else if (amap->type < bmap->type) | |
13210 | return -1; | |
13211 | else | |
13212 | return 0; | |
e489d0ae PB |
13213 | } |
13214 | ||
2468f9c9 PB |
13215 | /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ |
13216 | ||
13217 | static unsigned long | |
13218 | offset_prel31 (unsigned long addr, bfd_vma offset) | |
13219 | { | |
13220 | return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); | |
13221 | } | |
13222 | ||
13223 | /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 | |
13224 | relocations. */ | |
13225 | ||
13226 | static void | |
13227 | copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) | |
13228 | { | |
13229 | unsigned long first_word = bfd_get_32 (output_bfd, from); | |
13230 | unsigned long second_word = bfd_get_32 (output_bfd, from + 4); | |
13231 | ||
13232 | /* High bit of first word is supposed to be zero. */ | |
13233 | if ((first_word & 0x80000000ul) == 0) | |
13234 | first_word = offset_prel31 (first_word, offset); | |
13235 | ||
13236 | /* If the high bit of the first word is clear, and the bit pattern is not 0x1 | |
13237 | (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ | |
13238 | if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) | |
13239 | second_word = offset_prel31 (second_word, offset); | |
13240 | ||
13241 | bfd_put_32 (output_bfd, first_word, to); | |
13242 | bfd_put_32 (output_bfd, second_word, to + 4); | |
13243 | } | |
e489d0ae | 13244 | |
48229727 JB |
13245 | /* Data for make_branch_to_a8_stub(). */ |
13246 | ||
13247 | struct a8_branch_to_stub_data { | |
13248 | asection *writing_section; | |
13249 | bfd_byte *contents; | |
13250 | }; | |
13251 | ||
13252 | ||
13253 | /* Helper to insert branches to Cortex-A8 erratum stubs in the right | |
13254 | places for a particular section. */ | |
13255 | ||
13256 | static bfd_boolean | |
13257 | make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, | |
13258 | void *in_arg) | |
13259 | { | |
13260 | struct elf32_arm_stub_hash_entry *stub_entry; | |
13261 | struct a8_branch_to_stub_data *data; | |
13262 | bfd_byte *contents; | |
13263 | unsigned long branch_insn; | |
13264 | bfd_vma veneered_insn_loc, veneer_entry_loc; | |
13265 | bfd_signed_vma branch_offset; | |
13266 | bfd *abfd; | |
91d6fa6a | 13267 | unsigned int target; |
48229727 JB |
13268 | |
13269 | stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; | |
13270 | data = (struct a8_branch_to_stub_data *) in_arg; | |
13271 | ||
13272 | if (stub_entry->target_section != data->writing_section | |
13273 | || stub_entry->stub_type < arm_stub_a8_veneer_b_cond) | |
13274 | return TRUE; | |
13275 | ||
13276 | contents = data->contents; | |
13277 | ||
13278 | veneered_insn_loc = stub_entry->target_section->output_section->vma | |
13279 | + stub_entry->target_section->output_offset | |
13280 | + stub_entry->target_value; | |
13281 | ||
13282 | veneer_entry_loc = stub_entry->stub_sec->output_section->vma | |
13283 | + stub_entry->stub_sec->output_offset | |
13284 | + stub_entry->stub_offset; | |
13285 | ||
13286 | if (stub_entry->stub_type == arm_stub_a8_veneer_blx) | |
13287 | veneered_insn_loc &= ~3u; | |
13288 | ||
13289 | branch_offset = veneer_entry_loc - veneered_insn_loc - 4; | |
13290 | ||
13291 | abfd = stub_entry->target_section->owner; | |
91d6fa6a | 13292 | target = stub_entry->target_value; |
48229727 JB |
13293 | |
13294 | /* We attempt to avoid this condition by setting stubs_always_after_branch | |
13295 | in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. | |
13296 | This check is just to be on the safe side... */ | |
13297 | if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) | |
13298 | { | |
13299 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is " | |
13300 | "allocated in unsafe location"), abfd); | |
13301 | return FALSE; | |
13302 | } | |
13303 | ||
13304 | switch (stub_entry->stub_type) | |
13305 | { | |
13306 | case arm_stub_a8_veneer_b: | |
13307 | case arm_stub_a8_veneer_b_cond: | |
13308 | branch_insn = 0xf0009000; | |
13309 | goto jump24; | |
13310 | ||
13311 | case arm_stub_a8_veneer_blx: | |
13312 | branch_insn = 0xf000e800; | |
13313 | goto jump24; | |
13314 | ||
13315 | case arm_stub_a8_veneer_bl: | |
13316 | { | |
13317 | unsigned int i1, j1, i2, j2, s; | |
13318 | ||
13319 | branch_insn = 0xf000d000; | |
13320 | ||
13321 | jump24: | |
13322 | if (branch_offset < -16777216 || branch_offset > 16777214) | |
13323 | { | |
13324 | /* There's not much we can do apart from complain if this | |
13325 | happens. */ | |
13326 | (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out " | |
13327 | "of range (input file too large)"), abfd); | |
13328 | return FALSE; | |
13329 | } | |
13330 | ||
13331 | /* i1 = not(j1 eor s), so: | |
13332 | not i1 = j1 eor s | |
13333 | j1 = (not i1) eor s. */ | |
13334 | ||
13335 | branch_insn |= (branch_offset >> 1) & 0x7ff; | |
13336 | branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; | |
13337 | i2 = (branch_offset >> 22) & 1; | |
13338 | i1 = (branch_offset >> 23) & 1; | |
13339 | s = (branch_offset >> 24) & 1; | |
13340 | j1 = (!i1) ^ s; | |
13341 | j2 = (!i2) ^ s; | |
13342 | branch_insn |= j2 << 11; | |
13343 | branch_insn |= j1 << 13; | |
13344 | branch_insn |= s << 26; | |
13345 | } | |
13346 | break; | |
13347 | ||
13348 | default: | |
13349 | BFD_FAIL (); | |
13350 | return FALSE; | |
13351 | } | |
13352 | ||
91d6fa6a NC |
13353 | bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]); |
13354 | bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]); | |
48229727 JB |
13355 | |
13356 | return TRUE; | |
13357 | } | |
13358 | ||
e489d0ae PB |
13359 | /* Do code byteswapping. Return FALSE afterwards so that the section is |
13360 | written out as normal. */ | |
13361 | ||
13362 | static bfd_boolean | |
c7b8f16e | 13363 | elf32_arm_write_section (bfd *output_bfd, |
8029a119 NC |
13364 | struct bfd_link_info *link_info, |
13365 | asection *sec, | |
e489d0ae PB |
13366 | bfd_byte *contents) |
13367 | { | |
48229727 | 13368 | unsigned int mapcount, errcount; |
8e3de13a | 13369 | _arm_elf_section_data *arm_data; |
c7b8f16e | 13370 | struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); |
e489d0ae | 13371 | elf32_arm_section_map *map; |
c7b8f16e | 13372 | elf32_vfp11_erratum_list *errnode; |
e489d0ae PB |
13373 | bfd_vma ptr; |
13374 | bfd_vma end; | |
c7b8f16e | 13375 | bfd_vma offset = sec->output_section->vma + sec->output_offset; |
e489d0ae | 13376 | bfd_byte tmp; |
48229727 | 13377 | unsigned int i; |
57e8b36a | 13378 | |
4dfe6ac6 NC |
13379 | if (globals == NULL) |
13380 | return FALSE; | |
13381 | ||
8e3de13a NC |
13382 | /* If this section has not been allocated an _arm_elf_section_data |
13383 | structure then we cannot record anything. */ | |
13384 | arm_data = get_arm_elf_section_data (sec); | |
13385 | if (arm_data == NULL) | |
13386 | return FALSE; | |
13387 | ||
13388 | mapcount = arm_data->mapcount; | |
13389 | map = arm_data->map; | |
c7b8f16e JB |
13390 | errcount = arm_data->erratumcount; |
13391 | ||
13392 | if (errcount != 0) | |
13393 | { | |
13394 | unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; | |
13395 | ||
13396 | for (errnode = arm_data->erratumlist; errnode != 0; | |
13397 | errnode = errnode->next) | |
13398 | { | |
91d6fa6a | 13399 | bfd_vma target = errnode->vma - offset; |
c7b8f16e JB |
13400 | |
13401 | switch (errnode->type) | |
13402 | { | |
13403 | case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: | |
13404 | { | |
13405 | bfd_vma branch_to_veneer; | |
13406 | /* Original condition code of instruction, plus bit mask for | |
13407 | ARM B instruction. */ | |
13408 | unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) | |
13409 | | 0x0a000000; | |
13410 | ||
13411 | /* The instruction is before the label. */ | |
91d6fa6a | 13412 | target -= 4; |
c7b8f16e JB |
13413 | |
13414 | /* Above offset included in -4 below. */ | |
13415 | branch_to_veneer = errnode->u.b.veneer->vma | |
13416 | - errnode->vma - 4; | |
13417 | ||
13418 | if ((signed) branch_to_veneer < -(1 << 25) | |
13419 | || (signed) branch_to_veneer >= (1 << 25)) | |
13420 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
13421 | "range"), output_bfd); | |
13422 | ||
13423 | insn |= (branch_to_veneer >> 2) & 0xffffff; | |
91d6fa6a NC |
13424 | contents[endianflip ^ target] = insn & 0xff; |
13425 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
13426 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
13427 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
13428 | } |
13429 | break; | |
13430 | ||
13431 | case VFP11_ERRATUM_ARM_VENEER: | |
13432 | { | |
13433 | bfd_vma branch_from_veneer; | |
13434 | unsigned int insn; | |
13435 | ||
13436 | /* Take size of veneer into account. */ | |
13437 | branch_from_veneer = errnode->u.v.branch->vma | |
13438 | - errnode->vma - 12; | |
13439 | ||
13440 | if ((signed) branch_from_veneer < -(1 << 25) | |
13441 | || (signed) branch_from_veneer >= (1 << 25)) | |
13442 | (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " | |
13443 | "range"), output_bfd); | |
13444 | ||
13445 | /* Original instruction. */ | |
13446 | insn = errnode->u.v.branch->u.b.vfp_insn; | |
91d6fa6a NC |
13447 | contents[endianflip ^ target] = insn & 0xff; |
13448 | contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; | |
13449 | contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; | |
13450 | contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
13451 | |
13452 | /* Branch back to insn after original insn. */ | |
13453 | insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); | |
91d6fa6a NC |
13454 | contents[endianflip ^ (target + 4)] = insn & 0xff; |
13455 | contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; | |
13456 | contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; | |
13457 | contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; | |
c7b8f16e JB |
13458 | } |
13459 | break; | |
13460 | ||
13461 | default: | |
13462 | abort (); | |
13463 | } | |
13464 | } | |
13465 | } | |
e489d0ae | 13466 | |
2468f9c9 PB |
13467 | if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) |
13468 | { | |
13469 | arm_unwind_table_edit *edit_node | |
13470 | = arm_data->u.exidx.unwind_edit_list; | |
13471 | /* Now, sec->size is the size of the section we will write. The original | |
13472 | size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND | |
13473 | markers) was sec->rawsize. (This isn't the case if we perform no | |
13474 | edits, then rawsize will be zero and we should use size). */ | |
21d799b5 | 13475 | bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); |
2468f9c9 PB |
13476 | unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; |
13477 | unsigned int in_index, out_index; | |
13478 | bfd_vma add_to_offsets = 0; | |
13479 | ||
13480 | for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) | |
13481 | { | |
13482 | if (edit_node) | |
13483 | { | |
13484 | unsigned int edit_index = edit_node->index; | |
13485 | ||
13486 | if (in_index < edit_index && in_index * 8 < input_size) | |
13487 | { | |
13488 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
13489 | contents + in_index * 8, add_to_offsets); | |
13490 | out_index++; | |
13491 | in_index++; | |
13492 | } | |
13493 | else if (in_index == edit_index | |
13494 | || (in_index * 8 >= input_size | |
13495 | && edit_index == UINT_MAX)) | |
13496 | { | |
13497 | switch (edit_node->type) | |
13498 | { | |
13499 | case DELETE_EXIDX_ENTRY: | |
13500 | in_index++; | |
13501 | add_to_offsets += 8; | |
13502 | break; | |
13503 | ||
13504 | case INSERT_EXIDX_CANTUNWIND_AT_END: | |
13505 | { | |
13506 | asection *text_sec = edit_node->linked_section; | |
13507 | bfd_vma text_offset = text_sec->output_section->vma | |
13508 | + text_sec->output_offset | |
13509 | + text_sec->size; | |
13510 | bfd_vma exidx_offset = offset + out_index * 8; | |
13511 | unsigned long prel31_offset; | |
13512 | ||
13513 | /* Note: this is meant to be equivalent to an | |
13514 | R_ARM_PREL31 relocation. These synthetic | |
13515 | EXIDX_CANTUNWIND markers are not relocated by the | |
13516 | usual BFD method. */ | |
13517 | prel31_offset = (text_offset - exidx_offset) | |
13518 | & 0x7ffffffful; | |
13519 | ||
13520 | /* First address we can't unwind. */ | |
13521 | bfd_put_32 (output_bfd, prel31_offset, | |
13522 | &edited_contents[out_index * 8]); | |
13523 | ||
13524 | /* Code for EXIDX_CANTUNWIND. */ | |
13525 | bfd_put_32 (output_bfd, 0x1, | |
13526 | &edited_contents[out_index * 8 + 4]); | |
13527 | ||
13528 | out_index++; | |
13529 | add_to_offsets -= 8; | |
13530 | } | |
13531 | break; | |
13532 | } | |
13533 | ||
13534 | edit_node = edit_node->next; | |
13535 | } | |
13536 | } | |
13537 | else | |
13538 | { | |
13539 | /* No more edits, copy remaining entries verbatim. */ | |
13540 | copy_exidx_entry (output_bfd, edited_contents + out_index * 8, | |
13541 | contents + in_index * 8, add_to_offsets); | |
13542 | out_index++; | |
13543 | in_index++; | |
13544 | } | |
13545 | } | |
13546 | ||
13547 | if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) | |
13548 | bfd_set_section_contents (output_bfd, sec->output_section, | |
13549 | edited_contents, | |
13550 | (file_ptr) sec->output_offset, sec->size); | |
13551 | ||
13552 | return TRUE; | |
13553 | } | |
13554 | ||
48229727 JB |
13555 | /* Fix code to point to Cortex-A8 erratum stubs. */ |
13556 | if (globals->fix_cortex_a8) | |
13557 | { | |
13558 | struct a8_branch_to_stub_data data; | |
13559 | ||
13560 | data.writing_section = sec; | |
13561 | data.contents = contents; | |
13562 | ||
13563 | bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub, | |
13564 | &data); | |
13565 | } | |
13566 | ||
e489d0ae PB |
13567 | if (mapcount == 0) |
13568 | return FALSE; | |
13569 | ||
c7b8f16e | 13570 | if (globals->byteswap_code) |
e489d0ae | 13571 | { |
c7b8f16e | 13572 | qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); |
57e8b36a | 13573 | |
c7b8f16e JB |
13574 | ptr = map[0].vma; |
13575 | for (i = 0; i < mapcount; i++) | |
13576 | { | |
13577 | if (i == mapcount - 1) | |
13578 | end = sec->size; | |
13579 | else | |
13580 | end = map[i + 1].vma; | |
e489d0ae | 13581 | |
c7b8f16e | 13582 | switch (map[i].type) |
e489d0ae | 13583 | { |
c7b8f16e JB |
13584 | case 'a': |
13585 | /* Byte swap code words. */ | |
13586 | while (ptr + 3 < end) | |
13587 | { | |
13588 | tmp = contents[ptr]; | |
13589 | contents[ptr] = contents[ptr + 3]; | |
13590 | contents[ptr + 3] = tmp; | |
13591 | tmp = contents[ptr + 1]; | |
13592 | contents[ptr + 1] = contents[ptr + 2]; | |
13593 | contents[ptr + 2] = tmp; | |
13594 | ptr += 4; | |
13595 | } | |
13596 | break; | |
e489d0ae | 13597 | |
c7b8f16e JB |
13598 | case 't': |
13599 | /* Byte swap code halfwords. */ | |
13600 | while (ptr + 1 < end) | |
13601 | { | |
13602 | tmp = contents[ptr]; | |
13603 | contents[ptr] = contents[ptr + 1]; | |
13604 | contents[ptr + 1] = tmp; | |
13605 | ptr += 2; | |
13606 | } | |
13607 | break; | |
13608 | ||
13609 | case 'd': | |
13610 | /* Leave data alone. */ | |
13611 | break; | |
13612 | } | |
13613 | ptr = end; | |
13614 | } | |
e489d0ae | 13615 | } |
8e3de13a | 13616 | |
93204d3a | 13617 | free (map); |
8e3de13a | 13618 | arm_data->mapcount = 0; |
c7b8f16e | 13619 | arm_data->mapsize = 0; |
8e3de13a NC |
13620 | arm_data->map = NULL; |
13621 | unrecord_section_with_arm_elf_section_data (sec); | |
13622 | ||
e489d0ae PB |
13623 | return FALSE; |
13624 | } | |
13625 | ||
957c6e41 NC |
13626 | static void |
13627 | unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED, | |
13628 | asection * sec, | |
13629 | void * ignore ATTRIBUTE_UNUSED) | |
13630 | { | |
13631 | unrecord_section_with_arm_elf_section_data (sec); | |
13632 | } | |
13633 | ||
13634 | static bfd_boolean | |
13635 | elf32_arm_close_and_cleanup (bfd * abfd) | |
13636 | { | |
b25e3d87 L |
13637 | if (abfd->sections) |
13638 | bfd_map_over_sections (abfd, | |
13639 | unrecord_section_via_map_over_sections, | |
13640 | NULL); | |
957c6e41 NC |
13641 | |
13642 | return _bfd_elf_close_and_cleanup (abfd); | |
13643 | } | |
13644 | ||
b25e3d87 L |
13645 | static bfd_boolean |
13646 | elf32_arm_bfd_free_cached_info (bfd * abfd) | |
13647 | { | |
13648 | if (abfd->sections) | |
13649 | bfd_map_over_sections (abfd, | |
13650 | unrecord_section_via_map_over_sections, | |
13651 | NULL); | |
13652 | ||
13653 | return _bfd_free_cached_info (abfd); | |
13654 | } | |
13655 | ||
b7693d02 DJ |
13656 | /* Display STT_ARM_TFUNC symbols as functions. */ |
13657 | ||
13658 | static void | |
13659 | elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, | |
13660 | asymbol *asym) | |
13661 | { | |
13662 | elf_symbol_type *elfsym = (elf_symbol_type *) asym; | |
13663 | ||
13664 | if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC) | |
13665 | elfsym->symbol.flags |= BSF_FUNCTION; | |
13666 | } | |
13667 | ||
0beaef2b PB |
13668 | |
13669 | /* Mangle thumb function symbols as we read them in. */ | |
13670 | ||
8384fb8f | 13671 | static bfd_boolean |
0beaef2b PB |
13672 | elf32_arm_swap_symbol_in (bfd * abfd, |
13673 | const void *psrc, | |
13674 | const void *pshn, | |
13675 | Elf_Internal_Sym *dst) | |
13676 | { | |
8384fb8f AM |
13677 | if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) |
13678 | return FALSE; | |
0beaef2b PB |
13679 | |
13680 | /* New EABI objects mark thumb function symbols by setting the low bit of | |
13681 | the address. Turn these into STT_ARM_TFUNC. */ | |
0f88be7a | 13682 | if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC) |
0beaef2b PB |
13683 | && (dst->st_value & 1)) |
13684 | { | |
13685 | dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC); | |
13686 | dst->st_value &= ~(bfd_vma) 1; | |
13687 | } | |
8384fb8f | 13688 | return TRUE; |
0beaef2b PB |
13689 | } |
13690 | ||
13691 | ||
13692 | /* Mangle thumb function symbols as we write them out. */ | |
13693 | ||
13694 | static void | |
13695 | elf32_arm_swap_symbol_out (bfd *abfd, | |
13696 | const Elf_Internal_Sym *src, | |
13697 | void *cdst, | |
13698 | void *shndx) | |
13699 | { | |
13700 | Elf_Internal_Sym newsym; | |
13701 | ||
13702 | /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit | |
13703 | of the address set, as per the new EABI. We do this unconditionally | |
13704 | because objcopy does not set the elf header flags until after | |
13705 | it writes out the symbol table. */ | |
13706 | if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC) | |
13707 | { | |
13708 | newsym = *src; | |
13709 | newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); | |
0fa3dcad PB |
13710 | if (newsym.st_shndx != SHN_UNDEF) |
13711 | { | |
13712 | /* Do this only for defined symbols. At link type, the static | |
13713 | linker will simulate the work of dynamic linker of resolving | |
13714 | symbols and will carry over the thumbness of found symbols to | |
13715 | the output symbol table. It's not clear how it happens, but | |
b0fead2b | 13716 | the thumbness of undefined symbols can well be different at |
0fa3dcad PB |
13717 | runtime, and writing '1' for them will be confusing for users |
13718 | and possibly for dynamic linker itself. | |
13719 | */ | |
13720 | newsym.st_value |= 1; | |
13721 | } | |
906e58ca | 13722 | |
0beaef2b PB |
13723 | src = &newsym; |
13724 | } | |
13725 | bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); | |
13726 | } | |
13727 | ||
b294bdf8 MM |
13728 | /* Add the PT_ARM_EXIDX program header. */ |
13729 | ||
13730 | static bfd_boolean | |
906e58ca | 13731 | elf32_arm_modify_segment_map (bfd *abfd, |
b294bdf8 MM |
13732 | struct bfd_link_info *info ATTRIBUTE_UNUSED) |
13733 | { | |
13734 | struct elf_segment_map *m; | |
13735 | asection *sec; | |
13736 | ||
13737 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
13738 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
13739 | { | |
13740 | /* If there is already a PT_ARM_EXIDX header, then we do not | |
13741 | want to add another one. This situation arises when running | |
13742 | "strip"; the input binary already has the header. */ | |
13743 | m = elf_tdata (abfd)->segment_map; | |
13744 | while (m && m->p_type != PT_ARM_EXIDX) | |
13745 | m = m->next; | |
13746 | if (!m) | |
13747 | { | |
21d799b5 NC |
13748 | m = (struct elf_segment_map *) |
13749 | bfd_zalloc (abfd, sizeof (struct elf_segment_map)); | |
b294bdf8 MM |
13750 | if (m == NULL) |
13751 | return FALSE; | |
13752 | m->p_type = PT_ARM_EXIDX; | |
13753 | m->count = 1; | |
13754 | m->sections[0] = sec; | |
13755 | ||
13756 | m->next = elf_tdata (abfd)->segment_map; | |
13757 | elf_tdata (abfd)->segment_map = m; | |
13758 | } | |
13759 | } | |
13760 | ||
13761 | return TRUE; | |
13762 | } | |
13763 | ||
13764 | /* We may add a PT_ARM_EXIDX program header. */ | |
13765 | ||
13766 | static int | |
a6b96beb AM |
13767 | elf32_arm_additional_program_headers (bfd *abfd, |
13768 | struct bfd_link_info *info ATTRIBUTE_UNUSED) | |
b294bdf8 MM |
13769 | { |
13770 | asection *sec; | |
13771 | ||
13772 | sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); | |
13773 | if (sec != NULL && (sec->flags & SEC_LOAD) != 0) | |
13774 | return 1; | |
13775 | else | |
13776 | return 0; | |
13777 | } | |
13778 | ||
fcb93ecf | 13779 | /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */ |
906e58ca | 13780 | |
fcb93ecf PB |
13781 | static bfd_boolean |
13782 | elf32_arm_is_function_type (unsigned int type) | |
13783 | { | |
0f88be7a | 13784 | return (type == STT_FUNC) || (type == STT_ARM_TFUNC); |
fcb93ecf PB |
13785 | } |
13786 | ||
0beaef2b | 13787 | /* We use this to override swap_symbol_in and swap_symbol_out. */ |
906e58ca NC |
13788 | const struct elf_size_info elf32_arm_size_info = |
13789 | { | |
0beaef2b PB |
13790 | sizeof (Elf32_External_Ehdr), |
13791 | sizeof (Elf32_External_Phdr), | |
13792 | sizeof (Elf32_External_Shdr), | |
13793 | sizeof (Elf32_External_Rel), | |
13794 | sizeof (Elf32_External_Rela), | |
13795 | sizeof (Elf32_External_Sym), | |
13796 | sizeof (Elf32_External_Dyn), | |
13797 | sizeof (Elf_External_Note), | |
13798 | 4, | |
13799 | 1, | |
13800 | 32, 2, | |
13801 | ELFCLASS32, EV_CURRENT, | |
13802 | bfd_elf32_write_out_phdrs, | |
13803 | bfd_elf32_write_shdrs_and_ehdr, | |
1489a3a0 | 13804 | bfd_elf32_checksum_contents, |
0beaef2b PB |
13805 | bfd_elf32_write_relocs, |
13806 | elf32_arm_swap_symbol_in, | |
13807 | elf32_arm_swap_symbol_out, | |
13808 | bfd_elf32_slurp_reloc_table, | |
13809 | bfd_elf32_slurp_symbol_table, | |
13810 | bfd_elf32_swap_dyn_in, | |
13811 | bfd_elf32_swap_dyn_out, | |
13812 | bfd_elf32_swap_reloc_in, | |
13813 | bfd_elf32_swap_reloc_out, | |
13814 | bfd_elf32_swap_reloca_in, | |
13815 | bfd_elf32_swap_reloca_out | |
13816 | }; | |
13817 | ||
252b5132 RH |
13818 | #define ELF_ARCH bfd_arch_arm |
13819 | #define ELF_MACHINE_CODE EM_ARM | |
d0facd1b NC |
13820 | #ifdef __QNXTARGET__ |
13821 | #define ELF_MAXPAGESIZE 0x1000 | |
13822 | #else | |
f21f3fe0 | 13823 | #define ELF_MAXPAGESIZE 0x8000 |
d0facd1b | 13824 | #endif |
b1342370 | 13825 | #define ELF_MINPAGESIZE 0x1000 |
24718e3b | 13826 | #define ELF_COMMONPAGESIZE 0x1000 |
252b5132 | 13827 | |
ba93b8ac DJ |
13828 | #define bfd_elf32_mkobject elf32_arm_mkobject |
13829 | ||
99e4ae17 AJ |
13830 | #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data |
13831 | #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data | |
252b5132 RH |
13832 | #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags |
13833 | #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data | |
13834 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create | |
906e58ca | 13835 | #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free |
dc810e39 | 13836 | #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup |
157090f7 | 13837 | #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup |
252b5132 | 13838 | #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line |
4ab527b0 | 13839 | #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info |
e489d0ae | 13840 | #define bfd_elf32_new_section_hook elf32_arm_new_section_hook |
3c9458e9 | 13841 | #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol |
957c6e41 | 13842 | #define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup |
b25e3d87 | 13843 | #define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info |
3e6b1042 | 13844 | #define bfd_elf32_bfd_final_link elf32_arm_final_link |
252b5132 RH |
13845 | |
13846 | #define elf_backend_get_symbol_type elf32_arm_get_symbol_type | |
13847 | #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook | |
6a5bb875 | 13848 | #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections |
252b5132 RH |
13849 | #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook |
13850 | #define elf_backend_check_relocs elf32_arm_check_relocs | |
dc810e39 | 13851 | #define elf_backend_relocate_section elf32_arm_relocate_section |
e489d0ae | 13852 | #define elf_backend_write_section elf32_arm_write_section |
252b5132 | 13853 | #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol |
5e681ec4 | 13854 | #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections |
252b5132 RH |
13855 | #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol |
13856 | #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections | |
13857 | #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections | |
74541ad4 | 13858 | #define elf_backend_init_index_section _bfd_elf_init_2_index_sections |
ba96a88f | 13859 | #define elf_backend_post_process_headers elf32_arm_post_process_headers |
99e4ae17 | 13860 | #define elf_backend_reloc_type_class elf32_arm_reloc_type_class |
c178919b | 13861 | #define elf_backend_object_p elf32_arm_object_p |
e16bb312 | 13862 | #define elf_backend_section_flags elf32_arm_section_flags |
40a18ebd NC |
13863 | #define elf_backend_fake_sections elf32_arm_fake_sections |
13864 | #define elf_backend_section_from_shdr elf32_arm_section_from_shdr | |
e16bb312 | 13865 | #define elf_backend_final_write_processing elf32_arm_final_write_processing |
5e681ec4 | 13866 | #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol |
b7693d02 | 13867 | #define elf_backend_symbol_processing elf32_arm_symbol_processing |
0beaef2b | 13868 | #define elf_backend_size_info elf32_arm_size_info |
b294bdf8 | 13869 | #define elf_backend_modify_segment_map elf32_arm_modify_segment_map |
906e58ca NC |
13870 | #define elf_backend_additional_program_headers elf32_arm_additional_program_headers |
13871 | #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms | |
13872 | #define elf_backend_begin_write_processing elf32_arm_begin_write_processing | |
13873 | #define elf_backend_is_function_type elf32_arm_is_function_type | |
13874 | ||
13875 | #define elf_backend_can_refcount 1 | |
13876 | #define elf_backend_can_gc_sections 1 | |
13877 | #define elf_backend_plt_readonly 1 | |
13878 | #define elf_backend_want_got_plt 1 | |
13879 | #define elf_backend_want_plt_sym 0 | |
13880 | #define elf_backend_may_use_rel_p 1 | |
13881 | #define elf_backend_may_use_rela_p 0 | |
4e7fd91e | 13882 | #define elf_backend_default_use_rela_p 0 |
252b5132 | 13883 | |
04f7c78d | 13884 | #define elf_backend_got_header_size 12 |
04f7c78d | 13885 | |
906e58ca NC |
13886 | #undef elf_backend_obj_attrs_vendor |
13887 | #define elf_backend_obj_attrs_vendor "aeabi" | |
13888 | #undef elf_backend_obj_attrs_section | |
13889 | #define elf_backend_obj_attrs_section ".ARM.attributes" | |
13890 | #undef elf_backend_obj_attrs_arg_type | |
13891 | #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type | |
13892 | #undef elf_backend_obj_attrs_section_type | |
104d59d1 | 13893 | #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES |
5aa6ff7c | 13894 | #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order |
104d59d1 | 13895 | |
252b5132 | 13896 | #include "elf32-target.h" |
7f266840 | 13897 | |
906e58ca | 13898 | /* VxWorks Targets. */ |
4e7fd91e | 13899 | |
906e58ca | 13900 | #undef TARGET_LITTLE_SYM |
4e7fd91e | 13901 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec |
906e58ca | 13902 | #undef TARGET_LITTLE_NAME |
4e7fd91e | 13903 | #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" |
906e58ca | 13904 | #undef TARGET_BIG_SYM |
4e7fd91e | 13905 | #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec |
906e58ca | 13906 | #undef TARGET_BIG_NAME |
4e7fd91e PB |
13907 | #define TARGET_BIG_NAME "elf32-bigarm-vxworks" |
13908 | ||
13909 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
13910 | appropriately for VxWorks. */ | |
906e58ca | 13911 | |
4e7fd91e PB |
13912 | static struct bfd_link_hash_table * |
13913 | elf32_arm_vxworks_link_hash_table_create (bfd *abfd) | |
13914 | { | |
13915 | struct bfd_link_hash_table *ret; | |
13916 | ||
13917 | ret = elf32_arm_link_hash_table_create (abfd); | |
13918 | if (ret) | |
13919 | { | |
13920 | struct elf32_arm_link_hash_table *htab | |
00a97672 | 13921 | = (struct elf32_arm_link_hash_table *) ret; |
4e7fd91e | 13922 | htab->use_rel = 0; |
00a97672 | 13923 | htab->vxworks_p = 1; |
4e7fd91e PB |
13924 | } |
13925 | return ret; | |
906e58ca | 13926 | } |
4e7fd91e | 13927 | |
00a97672 RS |
13928 | static void |
13929 | elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) | |
13930 | { | |
13931 | elf32_arm_final_write_processing (abfd, linker); | |
13932 | elf_vxworks_final_write_processing (abfd, linker); | |
13933 | } | |
13934 | ||
906e58ca | 13935 | #undef elf32_bed |
4e7fd91e PB |
13936 | #define elf32_bed elf32_arm_vxworks_bed |
13937 | ||
906e58ca NC |
13938 | #undef bfd_elf32_bfd_link_hash_table_create |
13939 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create | |
13940 | #undef elf_backend_add_symbol_hook | |
13941 | #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook | |
13942 | #undef elf_backend_final_write_processing | |
13943 | #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing | |
13944 | #undef elf_backend_emit_relocs | |
13945 | #define elf_backend_emit_relocs elf_vxworks_emit_relocs | |
4e7fd91e | 13946 | |
906e58ca | 13947 | #undef elf_backend_may_use_rel_p |
00a97672 | 13948 | #define elf_backend_may_use_rel_p 0 |
906e58ca | 13949 | #undef elf_backend_may_use_rela_p |
00a97672 | 13950 | #define elf_backend_may_use_rela_p 1 |
906e58ca | 13951 | #undef elf_backend_default_use_rela_p |
00a97672 | 13952 | #define elf_backend_default_use_rela_p 1 |
906e58ca | 13953 | #undef elf_backend_want_plt_sym |
00a97672 | 13954 | #define elf_backend_want_plt_sym 1 |
906e58ca | 13955 | #undef ELF_MAXPAGESIZE |
00a97672 | 13956 | #define ELF_MAXPAGESIZE 0x1000 |
4e7fd91e PB |
13957 | |
13958 | #include "elf32-target.h" | |
13959 | ||
13960 | ||
21d799b5 NC |
13961 | /* Merge backend specific data from an object file to the output |
13962 | object file when linking. */ | |
13963 | ||
13964 | static bfd_boolean | |
13965 | elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
13966 | { | |
13967 | flagword out_flags; | |
13968 | flagword in_flags; | |
13969 | bfd_boolean flags_compatible = TRUE; | |
13970 | asection *sec; | |
13971 | ||
13972 | /* Check if we have the same endianess. */ | |
13973 | if (! _bfd_generic_verify_endian_match (ibfd, obfd)) | |
13974 | return FALSE; | |
13975 | ||
13976 | if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) | |
13977 | return TRUE; | |
13978 | ||
13979 | if (!elf32_arm_merge_eabi_attributes (ibfd, obfd)) | |
13980 | return FALSE; | |
13981 | ||
13982 | /* The input BFD must have had its flags initialised. */ | |
13983 | /* The following seems bogus to me -- The flags are initialized in | |
13984 | the assembler but I don't think an elf_flags_init field is | |
13985 | written into the object. */ | |
13986 | /* BFD_ASSERT (elf_flags_init (ibfd)); */ | |
13987 | ||
13988 | in_flags = elf_elfheader (ibfd)->e_flags; | |
13989 | out_flags = elf_elfheader (obfd)->e_flags; | |
13990 | ||
13991 | /* In theory there is no reason why we couldn't handle this. However | |
13992 | in practice it isn't even close to working and there is no real | |
13993 | reason to want it. */ | |
13994 | if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 | |
13995 | && !(ibfd->flags & DYNAMIC) | |
13996 | && (in_flags & EF_ARM_BE8)) | |
13997 | { | |
13998 | _bfd_error_handler (_("error: %B is already in final BE8 format"), | |
13999 | ibfd); | |
14000 | return FALSE; | |
14001 | } | |
14002 | ||
14003 | if (!elf_flags_init (obfd)) | |
14004 | { | |
14005 | /* If the input is the default architecture and had the default | |
14006 | flags then do not bother setting the flags for the output | |
14007 | architecture, instead allow future merges to do this. If no | |
14008 | future merges ever set these flags then they will retain their | |
14009 | uninitialised values, which surprise surprise, correspond | |
14010 | to the default values. */ | |
14011 | if (bfd_get_arch_info (ibfd)->the_default | |
14012 | && elf_elfheader (ibfd)->e_flags == 0) | |
14013 | return TRUE; | |
14014 | ||
14015 | elf_flags_init (obfd) = TRUE; | |
14016 | elf_elfheader (obfd)->e_flags = in_flags; | |
14017 | ||
14018 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
14019 | && bfd_get_arch_info (obfd)->the_default) | |
14020 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
14021 | ||
14022 | return TRUE; | |
14023 | } | |
14024 | ||
14025 | /* Determine what should happen if the input ARM architecture | |
14026 | does not match the output ARM architecture. */ | |
14027 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
14028 | return FALSE; | |
14029 | ||
14030 | /* Identical flags must be compatible. */ | |
14031 | if (in_flags == out_flags) | |
14032 | return TRUE; | |
14033 | ||
14034 | /* Check to see if the input BFD actually contains any sections. If | |
14035 | not, its flags may not have been initialised either, but it | |
14036 | cannot actually cause any incompatiblity. Do not short-circuit | |
14037 | dynamic objects; their section list may be emptied by | |
14038 | elf_link_add_object_symbols. | |
14039 | ||
14040 | Also check to see if there are no code sections in the input. | |
14041 | In this case there is no need to check for code specific flags. | |
14042 | XXX - do we need to worry about floating-point format compatability | |
14043 | in data sections ? */ | |
14044 | if (!(ibfd->flags & DYNAMIC)) | |
14045 | { | |
14046 | bfd_boolean null_input_bfd = TRUE; | |
14047 | bfd_boolean only_data_sections = TRUE; | |
14048 | ||
14049 | for (sec = ibfd->sections; sec != NULL; sec = sec->next) | |
14050 | { | |
14051 | /* Ignore synthetic glue sections. */ | |
14052 | if (strcmp (sec->name, ".glue_7") | |
14053 | && strcmp (sec->name, ".glue_7t")) | |
14054 | { | |
14055 | if ((bfd_get_section_flags (ibfd, sec) | |
14056 | & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
14057 | == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) | |
14058 | only_data_sections = FALSE; | |
14059 | ||
14060 | null_input_bfd = FALSE; | |
14061 | break; | |
14062 | } | |
14063 | } | |
14064 | ||
14065 | if (null_input_bfd || only_data_sections) | |
14066 | return TRUE; | |
14067 | } | |
14068 | ||
14069 | /* Complain about various flag mismatches. */ | |
14070 | if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), | |
14071 | EF_ARM_EABI_VERSION (out_flags))) | |
14072 | { | |
14073 | _bfd_error_handler | |
14074 | (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"), | |
14075 | ibfd, obfd, | |
14076 | (in_flags & EF_ARM_EABIMASK) >> 24, | |
14077 | (out_flags & EF_ARM_EABIMASK) >> 24); | |
14078 | return FALSE; | |
14079 | } | |
14080 | ||
14081 | /* Not sure what needs to be checked for EABI versions >= 1. */ | |
14082 | /* VxWorks libraries do not use these flags. */ | |
14083 | if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed | |
14084 | && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed | |
14085 | && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) | |
14086 | { | |
14087 | if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) | |
14088 | { | |
14089 | _bfd_error_handler | |
14090 | (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"), | |
14091 | ibfd, obfd, | |
14092 | in_flags & EF_ARM_APCS_26 ? 26 : 32, | |
14093 | out_flags & EF_ARM_APCS_26 ? 26 : 32); | |
14094 | flags_compatible = FALSE; | |
14095 | } | |
14096 | ||
14097 | if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) | |
14098 | { | |
14099 | if (in_flags & EF_ARM_APCS_FLOAT) | |
14100 | _bfd_error_handler | |
14101 | (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"), | |
14102 | ibfd, obfd); | |
14103 | else | |
14104 | _bfd_error_handler | |
14105 | (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"), | |
14106 | ibfd, obfd); | |
14107 | ||
14108 | flags_compatible = FALSE; | |
14109 | } | |
14110 | ||
14111 | if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) | |
14112 | { | |
14113 | if (in_flags & EF_ARM_VFP_FLOAT) | |
14114 | _bfd_error_handler | |
14115 | (_("error: %B uses VFP instructions, whereas %B does not"), | |
14116 | ibfd, obfd); | |
14117 | else | |
14118 | _bfd_error_handler | |
14119 | (_("error: %B uses FPA instructions, whereas %B does not"), | |
14120 | ibfd, obfd); | |
14121 | ||
14122 | flags_compatible = FALSE; | |
14123 | } | |
14124 | ||
14125 | if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) | |
14126 | { | |
14127 | if (in_flags & EF_ARM_MAVERICK_FLOAT) | |
14128 | _bfd_error_handler | |
14129 | (_("error: %B uses Maverick instructions, whereas %B does not"), | |
14130 | ibfd, obfd); | |
14131 | else | |
14132 | _bfd_error_handler | |
14133 | (_("error: %B does not use Maverick instructions, whereas %B does"), | |
14134 | ibfd, obfd); | |
14135 | ||
14136 | flags_compatible = FALSE; | |
14137 | } | |
14138 | ||
14139 | #ifdef EF_ARM_SOFT_FLOAT | |
14140 | if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) | |
14141 | { | |
14142 | /* We can allow interworking between code that is VFP format | |
14143 | layout, and uses either soft float or integer regs for | |
14144 | passing floating point arguments and results. We already | |
14145 | know that the APCS_FLOAT flags match; similarly for VFP | |
14146 | flags. */ | |
14147 | if ((in_flags & EF_ARM_APCS_FLOAT) != 0 | |
14148 | || (in_flags & EF_ARM_VFP_FLOAT) == 0) | |
14149 | { | |
14150 | if (in_flags & EF_ARM_SOFT_FLOAT) | |
14151 | _bfd_error_handler | |
14152 | (_("error: %B uses software FP, whereas %B uses hardware FP"), | |
14153 | ibfd, obfd); | |
14154 | else | |
14155 | _bfd_error_handler | |
14156 | (_("error: %B uses hardware FP, whereas %B uses software FP"), | |
14157 | ibfd, obfd); | |
14158 | ||
14159 | flags_compatible = FALSE; | |
14160 | } | |
14161 | } | |
14162 | #endif | |
14163 | ||
14164 | /* Interworking mismatch is only a warning. */ | |
14165 | if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) | |
14166 | { | |
14167 | if (in_flags & EF_ARM_INTERWORK) | |
14168 | { | |
14169 | _bfd_error_handler | |
14170 | (_("Warning: %B supports interworking, whereas %B does not"), | |
14171 | ibfd, obfd); | |
14172 | } | |
14173 | else | |
14174 | { | |
14175 | _bfd_error_handler | |
14176 | (_("Warning: %B does not support interworking, whereas %B does"), | |
14177 | ibfd, obfd); | |
14178 | } | |
14179 | } | |
14180 | } | |
14181 | ||
14182 | return flags_compatible; | |
14183 | } | |
14184 | ||
14185 | ||
906e58ca | 14186 | /* Symbian OS Targets. */ |
7f266840 | 14187 | |
906e58ca | 14188 | #undef TARGET_LITTLE_SYM |
7f266840 | 14189 | #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec |
906e58ca | 14190 | #undef TARGET_LITTLE_NAME |
7f266840 | 14191 | #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" |
906e58ca | 14192 | #undef TARGET_BIG_SYM |
7f266840 | 14193 | #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec |
906e58ca | 14194 | #undef TARGET_BIG_NAME |
7f266840 DJ |
14195 | #define TARGET_BIG_NAME "elf32-bigarm-symbian" |
14196 | ||
14197 | /* Like elf32_arm_link_hash_table_create -- but overrides | |
14198 | appropriately for Symbian OS. */ | |
906e58ca | 14199 | |
7f266840 DJ |
14200 | static struct bfd_link_hash_table * |
14201 | elf32_arm_symbian_link_hash_table_create (bfd *abfd) | |
14202 | { | |
14203 | struct bfd_link_hash_table *ret; | |
14204 | ||
14205 | ret = elf32_arm_link_hash_table_create (abfd); | |
14206 | if (ret) | |
14207 | { | |
14208 | struct elf32_arm_link_hash_table *htab | |
14209 | = (struct elf32_arm_link_hash_table *)ret; | |
14210 | /* There is no PLT header for Symbian OS. */ | |
14211 | htab->plt_header_size = 0; | |
95720a86 DJ |
14212 | /* The PLT entries are each one instruction and one word. */ |
14213 | htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); | |
7f266840 | 14214 | htab->symbian_p = 1; |
33bfe774 JB |
14215 | /* Symbian uses armv5t or above, so use_blx is always true. */ |
14216 | htab->use_blx = 1; | |
67687978 | 14217 | htab->root.is_relocatable_executable = 1; |
7f266840 DJ |
14218 | } |
14219 | return ret; | |
906e58ca | 14220 | } |
7f266840 | 14221 | |
b35d266b | 14222 | static const struct bfd_elf_special_section |
551b43fd | 14223 | elf32_arm_symbian_special_sections[] = |
7f266840 | 14224 | { |
5cd3778d MM |
14225 | /* In a BPABI executable, the dynamic linking sections do not go in |
14226 | the loadable read-only segment. The post-linker may wish to | |
14227 | refer to these sections, but they are not part of the final | |
14228 | program image. */ | |
0112cd26 NC |
14229 | { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, |
14230 | { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, | |
14231 | { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, | |
14232 | { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, | |
14233 | { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, | |
5cd3778d MM |
14234 | /* These sections do not need to be writable as the SymbianOS |
14235 | postlinker will arrange things so that no dynamic relocation is | |
14236 | required. */ | |
0112cd26 NC |
14237 | { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, |
14238 | { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, | |
14239 | { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, | |
14240 | { NULL, 0, 0, 0, 0 } | |
7f266840 DJ |
14241 | }; |
14242 | ||
c3c76620 | 14243 | static void |
906e58ca | 14244 | elf32_arm_symbian_begin_write_processing (bfd *abfd, |
a4fd1a8e | 14245 | struct bfd_link_info *link_info) |
c3c76620 MM |
14246 | { |
14247 | /* BPABI objects are never loaded directly by an OS kernel; they are | |
14248 | processed by a postlinker first, into an OS-specific format. If | |
14249 | the D_PAGED bit is set on the file, BFD will align segments on | |
14250 | page boundaries, so that an OS can directly map the file. With | |
14251 | BPABI objects, that just results in wasted space. In addition, | |
14252 | because we clear the D_PAGED bit, map_sections_to_segments will | |
14253 | recognize that the program headers should not be mapped into any | |
14254 | loadable segment. */ | |
14255 | abfd->flags &= ~D_PAGED; | |
906e58ca | 14256 | elf32_arm_begin_write_processing (abfd, link_info); |
c3c76620 | 14257 | } |
7f266840 DJ |
14258 | |
14259 | static bfd_boolean | |
906e58ca | 14260 | elf32_arm_symbian_modify_segment_map (bfd *abfd, |
b294bdf8 | 14261 | struct bfd_link_info *info) |
7f266840 DJ |
14262 | { |
14263 | struct elf_segment_map *m; | |
14264 | asection *dynsec; | |
14265 | ||
7f266840 DJ |
14266 | /* BPABI shared libraries and executables should have a PT_DYNAMIC |
14267 | segment. However, because the .dynamic section is not marked | |
14268 | with SEC_LOAD, the generic ELF code will not create such a | |
14269 | segment. */ | |
14270 | dynsec = bfd_get_section_by_name (abfd, ".dynamic"); | |
14271 | if (dynsec) | |
14272 | { | |
8ded5a0f AM |
14273 | for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) |
14274 | if (m->p_type == PT_DYNAMIC) | |
14275 | break; | |
14276 | ||
14277 | if (m == NULL) | |
14278 | { | |
14279 | m = _bfd_elf_make_dynamic_segment (abfd, dynsec); | |
14280 | m->next = elf_tdata (abfd)->segment_map; | |
14281 | elf_tdata (abfd)->segment_map = m; | |
14282 | } | |
7f266840 DJ |
14283 | } |
14284 | ||
b294bdf8 MM |
14285 | /* Also call the generic arm routine. */ |
14286 | return elf32_arm_modify_segment_map (abfd, info); | |
7f266840 DJ |
14287 | } |
14288 | ||
95720a86 DJ |
14289 | /* Return address for Ith PLT stub in section PLT, for relocation REL |
14290 | or (bfd_vma) -1 if it should not be included. */ | |
14291 | ||
14292 | static bfd_vma | |
14293 | elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, | |
14294 | const arelent *rel ATTRIBUTE_UNUSED) | |
14295 | { | |
14296 | return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; | |
14297 | } | |
14298 | ||
14299 | ||
8029a119 | 14300 | #undef elf32_bed |
7f266840 DJ |
14301 | #define elf32_bed elf32_arm_symbian_bed |
14302 | ||
14303 | /* The dynamic sections are not allocated on SymbianOS; the postlinker | |
14304 | will process them and then discard them. */ | |
906e58ca | 14305 | #undef ELF_DYNAMIC_SEC_FLAGS |
7f266840 DJ |
14306 | #define ELF_DYNAMIC_SEC_FLAGS \ |
14307 | (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) | |
14308 | ||
00a97672 | 14309 | #undef elf_backend_add_symbol_hook |
00a97672 | 14310 | #undef elf_backend_emit_relocs |
c3c76620 | 14311 | |
906e58ca NC |
14312 | #undef bfd_elf32_bfd_link_hash_table_create |
14313 | #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create | |
14314 | #undef elf_backend_special_sections | |
14315 | #define elf_backend_special_sections elf32_arm_symbian_special_sections | |
14316 | #undef elf_backend_begin_write_processing | |
14317 | #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing | |
14318 | #undef elf_backend_final_write_processing | |
14319 | #define elf_backend_final_write_processing elf32_arm_final_write_processing | |
14320 | ||
14321 | #undef elf_backend_modify_segment_map | |
7f266840 DJ |
14322 | #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map |
14323 | ||
14324 | /* There is no .got section for BPABI objects, and hence no header. */ | |
906e58ca | 14325 | #undef elf_backend_got_header_size |
7f266840 DJ |
14326 | #define elf_backend_got_header_size 0 |
14327 | ||
14328 | /* Similarly, there is no .got.plt section. */ | |
906e58ca | 14329 | #undef elf_backend_want_got_plt |
7f266840 DJ |
14330 | #define elf_backend_want_got_plt 0 |
14331 | ||
906e58ca | 14332 | #undef elf_backend_plt_sym_val |
95720a86 DJ |
14333 | #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val |
14334 | ||
906e58ca | 14335 | #undef elf_backend_may_use_rel_p |
00a97672 | 14336 | #define elf_backend_may_use_rel_p 1 |
906e58ca | 14337 | #undef elf_backend_may_use_rela_p |
00a97672 | 14338 | #define elf_backend_may_use_rela_p 0 |
906e58ca | 14339 | #undef elf_backend_default_use_rela_p |
00a97672 | 14340 | #define elf_backend_default_use_rela_p 0 |
906e58ca | 14341 | #undef elf_backend_want_plt_sym |
00a97672 | 14342 | #define elf_backend_want_plt_sym 0 |
906e58ca | 14343 | #undef ELF_MAXPAGESIZE |
00a97672 | 14344 | #define ELF_MAXPAGESIZE 0x8000 |
4e7fd91e | 14345 | |
7f266840 | 14346 | #include "elf32-target.h" |