Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* M32R-specific support for 32-bit ELF. |
7898deda NC |
2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "bfd.h" | |
22 | #include "sysdep.h" | |
23 | #include "libbfd.h" | |
24 | #include "elf-bfd.h" | |
25 | #include "elf/m32r.h" | |
26 | ||
27 | static bfd_reloc_status_type m32r_elf_10_pcrel_reloc | |
28 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
29 | static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc | |
30 | PARAMS ((bfd *, reloc_howto_type *, asection *, | |
31 | bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma)); | |
32 | static bfd_reloc_status_type m32r_elf_hi16_reloc | |
33 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
34 | static void m32r_elf_relocate_hi16 | |
35 | PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, | |
36 | bfd_byte *, bfd_vma)); | |
37 | bfd_reloc_status_type m32r_elf_lo16_reloc | |
38 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
8b125cde DE |
39 | bfd_reloc_status_type m32r_elf_generic_reloc |
40 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
252b5132 RH |
41 | static bfd_reloc_status_type m32r_elf_sda16_reloc |
42 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
43 | static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup | |
44 | PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); | |
45 | static void m32r_info_to_howto_rel | |
46 | PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *)); | |
47 | boolean _bfd_m32r_elf_section_from_bfd_section | |
48 | PARAMS ((bfd *, Elf32_Internal_Shdr *, asection *, int *)); | |
49 | void _bfd_m32r_elf_symbol_processing | |
50 | PARAMS ((bfd *, asymbol *)); | |
51 | static boolean m32r_elf_add_symbol_hook | |
52 | PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *, | |
53 | const char **, flagword *, asection **, bfd_vma *)); | |
54 | static boolean m32r_elf_relocate_section | |
55 | PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, | |
56 | Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); | |
57 | #if 0 /* not yet */ | |
58 | static boolean m32r_elf_relax_delete_bytes | |
59 | PARAMS ((bfd *, asection *, bfd_vma, int)); | |
60 | #endif | |
61 | ||
62 | static bfd_reloc_status_type m32r_elf_final_sda_base | |
63 | PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *)); | |
64 | static boolean m32r_elf_object_p | |
65 | PARAMS ((bfd *)); | |
66 | static void m32r_elf_final_write_processing | |
67 | PARAMS ((bfd *, boolean)); | |
68 | static boolean m32r_elf_set_private_flags | |
69 | PARAMS ((bfd *, flagword)); | |
70 | static boolean m32r_elf_copy_private_bfd_data | |
71 | PARAMS ((bfd *, bfd *)); | |
72 | static boolean m32r_elf_merge_private_bfd_data | |
73 | PARAMS ((bfd *, bfd *)); | |
74 | static boolean m32r_elf_print_private_bfd_data | |
75 | PARAMS ((bfd *, PTR)); | |
76 | ||
77 | #define NOP_INSN 0x7000 | |
78 | #define MAKE_PARALLEL(insn) ((insn) | 0x8000) | |
79 | ||
80 | /* Use REL instead of RELA to save space. | |
81 | This only saves space in libraries and object files, but perhaps | |
82 | relocs will be put in ROM? All in all though, REL relocs are a pain | |
83 | to work with. */ | |
84 | #define USE_REL | |
85 | ||
86 | static reloc_howto_type m32r_elf_howto_table[] = | |
87 | { | |
88 | /* This reloc does nothing. */ | |
89 | HOWTO (R_M32R_NONE, /* type */ | |
90 | 0, /* rightshift */ | |
91 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
92 | 32, /* bitsize */ | |
93 | false, /* pc_relative */ | |
94 | 0, /* bitpos */ | |
95 | complain_overflow_bitfield, /* complain_on_overflow */ | |
96 | bfd_elf_generic_reloc, /* special_function */ | |
97 | "R_M32R_NONE", /* name */ | |
98 | false, /* partial_inplace */ | |
99 | 0, /* src_mask */ | |
100 | 0, /* dst_mask */ | |
101 | false), /* pcrel_offset */ | |
102 | ||
103 | /* A 16 bit absolute relocation. */ | |
104 | HOWTO (R_M32R_16, /* type */ | |
105 | 0, /* rightshift */ | |
106 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
107 | 16, /* bitsize */ | |
108 | false, /* pc_relative */ | |
109 | 0, /* bitpos */ | |
110 | complain_overflow_bitfield, /* complain_on_overflow */ | |
8b125cde | 111 | m32r_elf_generic_reloc,/* special_function */ |
252b5132 RH |
112 | "R_M32R_16", /* name */ |
113 | true, /* partial_inplace */ | |
114 | 0xffff, /* src_mask */ | |
115 | 0xffff, /* dst_mask */ | |
116 | false), /* pcrel_offset */ | |
117 | ||
118 | /* A 32 bit absolute relocation. */ | |
119 | HOWTO (R_M32R_32, /* type */ | |
120 | 0, /* rightshift */ | |
121 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
122 | 32, /* bitsize */ | |
123 | false, /* pc_relative */ | |
124 | 0, /* bitpos */ | |
125 | complain_overflow_bitfield, /* complain_on_overflow */ | |
8b125cde | 126 | m32r_elf_generic_reloc,/* special_function */ |
252b5132 RH |
127 | "R_M32R_32", /* name */ |
128 | true, /* partial_inplace */ | |
129 | 0xffffffff, /* src_mask */ | |
130 | 0xffffffff, /* dst_mask */ | |
131 | false), /* pcrel_offset */ | |
132 | ||
133 | /* A 24 bit address. */ | |
134 | HOWTO (R_M32R_24, /* type */ | |
135 | 0, /* rightshift */ | |
136 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
137 | 24, /* bitsize */ | |
138 | false, /* pc_relative */ | |
139 | 0, /* bitpos */ | |
140 | complain_overflow_unsigned, /* complain_on_overflow */ | |
8b125cde | 141 | m32r_elf_generic_reloc,/* special_function */ |
252b5132 RH |
142 | "R_M32R_24", /* name */ |
143 | true, /* partial_inplace */ | |
144 | 0xffffff, /* src_mask */ | |
145 | 0xffffff, /* dst_mask */ | |
146 | false), /* pcrel_offset */ | |
147 | ||
148 | /* An PC Relative 10-bit relocation, shifted by 2. | |
149 | This reloc is complicated because relocations are relative to pc & -4. | |
150 | i.e. branches in the right insn slot use the address of the left insn | |
151 | slot for pc. */ | |
152 | /* ??? It's not clear whether this should have partial_inplace set or not. | |
153 | Branch relaxing in the assembler can store the addend in the insn, | |
154 | and if bfd_install_relocation gets called the addend may get added | |
155 | again. */ | |
156 | HOWTO (R_M32R_10_PCREL, /* type */ | |
157 | 2, /* rightshift */ | |
158 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
159 | 10, /* bitsize */ | |
160 | true, /* pc_relative */ | |
161 | 0, /* bitpos */ | |
162 | complain_overflow_signed, /* complain_on_overflow */ | |
163 | m32r_elf_10_pcrel_reloc, /* special_function */ | |
164 | "R_M32R_10_PCREL", /* name */ | |
165 | false, /* partial_inplace */ | |
166 | 0xff, /* src_mask */ | |
167 | 0xff, /* dst_mask */ | |
168 | true), /* pcrel_offset */ | |
169 | ||
170 | /* A relative 18 bit relocation, right shifted by 2. */ | |
171 | HOWTO (R_M32R_18_PCREL, /* type */ | |
172 | 2, /* rightshift */ | |
173 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
174 | 16, /* bitsize */ | |
175 | true, /* pc_relative */ | |
176 | 0, /* bitpos */ | |
177 | complain_overflow_signed, /* complain_on_overflow */ | |
178 | bfd_elf_generic_reloc, /* special_function */ | |
179 | "R_M32R_18_PCREL", /* name */ | |
180 | false, /* partial_inplace */ | |
181 | 0xffff, /* src_mask */ | |
182 | 0xffff, /* dst_mask */ | |
183 | true), /* pcrel_offset */ | |
184 | ||
185 | /* A relative 26 bit relocation, right shifted by 2. */ | |
186 | /* ??? It's not clear whether this should have partial_inplace set or not. | |
187 | Branch relaxing in the assembler can store the addend in the insn, | |
188 | and if bfd_install_relocation gets called the addend may get added | |
189 | again. */ | |
190 | HOWTO (R_M32R_26_PCREL, /* type */ | |
191 | 2, /* rightshift */ | |
192 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
193 | 26, /* bitsize */ | |
194 | true, /* pc_relative */ | |
195 | 0, /* bitpos */ | |
196 | complain_overflow_signed, /* complain_on_overflow */ | |
197 | bfd_elf_generic_reloc, /* special_function */ | |
198 | "R_M32R_26_PCREL", /* name */ | |
199 | false, /* partial_inplace */ | |
200 | 0xffffff, /* src_mask */ | |
201 | 0xffffff, /* dst_mask */ | |
202 | true), /* pcrel_offset */ | |
203 | ||
204 | /* High 16 bits of address when lower 16 is or'd in. */ | |
205 | HOWTO (R_M32R_HI16_ULO, /* type */ | |
206 | 16, /* rightshift */ | |
207 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
208 | 16, /* bitsize */ | |
209 | false, /* pc_relative */ | |
210 | 0, /* bitpos */ | |
211 | complain_overflow_dont, /* complain_on_overflow */ | |
212 | m32r_elf_hi16_reloc, /* special_function */ | |
213 | "R_M32R_HI16_ULO", /* name */ | |
214 | true, /* partial_inplace */ | |
215 | 0x0000ffff, /* src_mask */ | |
216 | 0x0000ffff, /* dst_mask */ | |
217 | false), /* pcrel_offset */ | |
218 | ||
219 | /* High 16 bits of address when lower 16 is added in. */ | |
220 | HOWTO (R_M32R_HI16_SLO, /* type */ | |
221 | 16, /* rightshift */ | |
222 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
223 | 16, /* bitsize */ | |
224 | false, /* pc_relative */ | |
225 | 0, /* bitpos */ | |
226 | complain_overflow_dont, /* complain_on_overflow */ | |
227 | m32r_elf_hi16_reloc, /* special_function */ | |
228 | "R_M32R_HI16_SLO", /* name */ | |
229 | true, /* partial_inplace */ | |
230 | 0x0000ffff, /* src_mask */ | |
231 | 0x0000ffff, /* dst_mask */ | |
232 | false), /* pcrel_offset */ | |
233 | ||
234 | /* Lower 16 bits of address. */ | |
235 | HOWTO (R_M32R_LO16, /* type */ | |
236 | 0, /* rightshift */ | |
237 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
238 | 16, /* bitsize */ | |
239 | false, /* pc_relative */ | |
240 | 0, /* bitpos */ | |
241 | complain_overflow_dont, /* complain_on_overflow */ | |
242 | m32r_elf_lo16_reloc, /* special_function */ | |
243 | "R_M32R_LO16", /* name */ | |
244 | true, /* partial_inplace */ | |
245 | 0x0000ffff, /* src_mask */ | |
246 | 0x0000ffff, /* dst_mask */ | |
247 | false), /* pcrel_offset */ | |
248 | ||
249 | /* Small data area 16 bits offset. */ | |
250 | HOWTO (R_M32R_SDA16, /* type */ | |
251 | 0, /* rightshift */ | |
252 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
253 | 16, /* bitsize */ | |
254 | false, /* pc_relative */ | |
255 | 0, /* bitpos */ | |
256 | complain_overflow_signed, /* complain_on_overflow */ | |
257 | m32r_elf_sda16_reloc, /* special_function */ | |
258 | "R_M32R_SDA16", /* name */ | |
259 | true, /* partial_inplace */ /* FIXME: correct? */ | |
260 | 0x0000ffff, /* src_mask */ | |
261 | 0x0000ffff, /* dst_mask */ | |
262 | false), /* pcrel_offset */ | |
263 | ||
264 | /* GNU extension to record C++ vtable hierarchy */ | |
265 | HOWTO (R_M32R_GNU_VTINHERIT, /* type */ | |
266 | 0, /* rightshift */ | |
267 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
268 | 0, /* bitsize */ | |
269 | false, /* pc_relative */ | |
270 | 0, /* bitpos */ | |
271 | complain_overflow_dont, /* complain_on_overflow */ | |
272 | NULL, /* special_function */ | |
273 | "R_M32R_GNU_VTINHERIT", /* name */ | |
274 | false, /* partial_inplace */ | |
275 | 0, /* src_mask */ | |
276 | 0, /* dst_mask */ | |
277 | false), /* pcrel_offset */ | |
278 | ||
279 | /* GNU extension to record C++ vtable member usage */ | |
280 | HOWTO (R_M32R_GNU_VTENTRY, /* type */ | |
281 | 0, /* rightshift */ | |
282 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
283 | 0, /* bitsize */ | |
284 | false, /* pc_relative */ | |
285 | 0, /* bitpos */ | |
286 | complain_overflow_dont, /* complain_on_overflow */ | |
287 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
288 | "R_M32R_GNU_VTENTRY", /* name */ | |
289 | false, /* partial_inplace */ | |
290 | 0, /* src_mask */ | |
291 | 0, /* dst_mask */ | |
292 | false), /* pcrel_offset */ | |
293 | ||
294 | }; | |
295 | \f | |
296 | /* Handle the R_M32R_10_PCREL reloc. */ | |
297 | ||
298 | static bfd_reloc_status_type | |
299 | m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data, | |
300 | input_section, output_bfd, error_message) | |
301 | bfd * abfd; | |
302 | arelent * reloc_entry; | |
303 | asymbol * symbol; | |
304 | PTR data; | |
305 | asection * input_section; | |
306 | bfd * output_bfd; | |
5f771d47 | 307 | char ** error_message ATTRIBUTE_UNUSED; |
252b5132 RH |
308 | { |
309 | /* This part is from bfd_elf_generic_reloc. */ | |
310 | if (output_bfd != (bfd *) NULL | |
311 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
312 | && (! reloc_entry->howto->partial_inplace | |
313 | || reloc_entry->addend == 0)) | |
314 | { | |
315 | reloc_entry->address += input_section->output_offset; | |
316 | return bfd_reloc_ok; | |
317 | } | |
318 | ||
319 | if (output_bfd != NULL) | |
320 | { | |
321 | /* FIXME: See bfd_perform_relocation. Is this right? */ | |
322 | return bfd_reloc_continue; | |
323 | } | |
324 | ||
325 | return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto, | |
326 | input_section, | |
327 | data, reloc_entry->address, | |
328 | symbol->section, | |
329 | (symbol->value | |
330 | + symbol->section->output_section->vma | |
331 | + symbol->section->output_offset), | |
332 | reloc_entry->addend); | |
333 | } | |
334 | ||
335 | /* Utility to actually perform an R_M32R_10_PCREL reloc. */ | |
336 | ||
337 | static bfd_reloc_status_type | |
338 | m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset, | |
339 | symbol_section, symbol_value, addend) | |
340 | bfd *abfd; | |
341 | reloc_howto_type *howto; | |
342 | asection *input_section; | |
343 | bfd_byte *data; | |
344 | bfd_vma offset; | |
5f771d47 | 345 | asection *symbol_section ATTRIBUTE_UNUSED; |
252b5132 RH |
346 | bfd_vma symbol_value; |
347 | bfd_vma addend; | |
348 | { | |
349 | bfd_signed_vma relocation; | |
350 | unsigned long x; | |
351 | bfd_reloc_status_type status; | |
352 | ||
353 | /* Sanity check the address (offset in section). */ | |
354 | if (offset > input_section->_cooked_size) | |
355 | return bfd_reloc_outofrange; | |
356 | ||
357 | relocation = symbol_value + addend; | |
358 | /* Make it pc relative. */ | |
359 | relocation -= (input_section->output_section->vma | |
360 | + input_section->output_offset); | |
361 | /* These jumps mask off the lower two bits of the current address | |
362 | before doing pcrel calculations. */ | |
363 | relocation -= (offset & -4L); | |
364 | ||
365 | if (relocation < -0x200 || relocation > 0x1ff) | |
366 | status = bfd_reloc_overflow; | |
367 | else | |
368 | status = bfd_reloc_ok; | |
369 | ||
370 | x = bfd_get_16 (abfd, data + offset); | |
371 | relocation >>= howto->rightshift; | |
372 | relocation <<= howto->bitpos; | |
373 | x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask); | |
374 | bfd_put_16 (abfd, x, data + offset); | |
375 | ||
376 | return status; | |
377 | } | |
378 | ||
379 | /* Handle the R_M32R_HI16_[SU]LO relocs. | |
380 | HI16_SLO is for the add3 and load/store with displacement instructions. | |
381 | HI16_ULO is for the or3 instruction. | |
382 | For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to | |
383 | the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then | |
384 | we must add one to the high 16 bytes (which will get subtracted off when | |
385 | the low 16 bits are added). | |
386 | These relocs have to be done in combination with an R_M32R_LO16 reloc | |
387 | because there is a carry from the LO16 to the HI16. Here we just save | |
388 | the information we need; we do the actual relocation when we see the LO16. | |
389 | This code is copied from the elf32-mips.c. We also support an arbitrary | |
390 | number of HI16 relocs to be associated with a single LO16 reloc. The | |
391 | assembler sorts the relocs to ensure each HI16 immediately precedes its | |
392 | LO16. However if there are multiple copies, the assembler may not find | |
393 | the real LO16 so it picks the first one it finds. */ | |
394 | ||
395 | struct m32r_hi16 | |
396 | { | |
397 | struct m32r_hi16 *next; | |
398 | bfd_byte *addr; | |
399 | bfd_vma addend; | |
400 | }; | |
401 | ||
402 | /* FIXME: This should not be a static variable. */ | |
403 | ||
404 | static struct m32r_hi16 *m32r_hi16_list; | |
405 | ||
406 | static bfd_reloc_status_type | |
407 | m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data, | |
408 | input_section, output_bfd, error_message) | |
5f771d47 | 409 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
410 | arelent *reloc_entry; |
411 | asymbol *symbol; | |
412 | PTR data; | |
413 | asection *input_section; | |
414 | bfd *output_bfd; | |
5f771d47 | 415 | char **error_message ATTRIBUTE_UNUSED; |
252b5132 RH |
416 | { |
417 | bfd_reloc_status_type ret; | |
418 | bfd_vma relocation; | |
419 | struct m32r_hi16 *n; | |
420 | ||
421 | /* This part is from bfd_elf_generic_reloc. | |
422 | If we're relocating, and this an external symbol, we don't want | |
423 | to change anything. */ | |
424 | if (output_bfd != (bfd *) NULL | |
425 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
426 | && reloc_entry->addend == 0) | |
427 | { | |
428 | reloc_entry->address += input_section->output_offset; | |
429 | return bfd_reloc_ok; | |
430 | } | |
431 | ||
432 | /* Sanity check the address (offset in section). */ | |
433 | if (reloc_entry->address > input_section->_cooked_size) | |
434 | return bfd_reloc_outofrange; | |
435 | ||
436 | ret = bfd_reloc_ok; | |
437 | if (bfd_is_und_section (symbol->section) | |
438 | && output_bfd == (bfd *) NULL) | |
439 | ret = bfd_reloc_undefined; | |
440 | ||
441 | if (bfd_is_com_section (symbol->section)) | |
442 | relocation = 0; | |
443 | else | |
444 | relocation = symbol->value; | |
445 | ||
446 | relocation += symbol->section->output_section->vma; | |
447 | relocation += symbol->section->output_offset; | |
448 | relocation += reloc_entry->addend; | |
449 | ||
450 | /* Save the information, and let LO16 do the actual relocation. */ | |
451 | n = (struct m32r_hi16 *) bfd_malloc (sizeof *n); | |
452 | if (n == NULL) | |
453 | return bfd_reloc_outofrange; | |
454 | n->addr = (bfd_byte *) data + reloc_entry->address; | |
455 | n->addend = relocation; | |
456 | n->next = m32r_hi16_list; | |
457 | m32r_hi16_list = n; | |
458 | ||
459 | if (output_bfd != (bfd *) NULL) | |
460 | reloc_entry->address += input_section->output_offset; | |
461 | ||
462 | return ret; | |
463 | } | |
464 | ||
465 | /* Handle an M32R ELF HI16 reloc. */ | |
466 | ||
467 | static void | |
468 | m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend) | |
469 | bfd *input_bfd; | |
470 | int type; | |
471 | Elf_Internal_Rela *relhi; | |
472 | Elf_Internal_Rela *rello; | |
473 | bfd_byte *contents; | |
474 | bfd_vma addend; | |
475 | { | |
476 | unsigned long insn; | |
477 | bfd_vma addlo; | |
478 | ||
479 | insn = bfd_get_32 (input_bfd, contents + relhi->r_offset); | |
480 | ||
481 | addlo = bfd_get_32 (input_bfd, contents + rello->r_offset); | |
482 | if (type == R_M32R_HI16_SLO) | |
483 | addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000; | |
484 | else | |
485 | addlo &= 0xffff; | |
486 | ||
487 | addend += ((insn & 0xffff) << 16) + addlo; | |
488 | ||
489 | /* Reaccount for sign extension of low part. */ | |
490 | if (type == R_M32R_HI16_SLO | |
491 | && (addend & 0x8000) != 0) | |
492 | addend += 0x10000; | |
493 | ||
494 | bfd_put_32 (input_bfd, | |
495 | (insn & 0xffff0000) | ((addend >> 16) & 0xffff), | |
496 | contents + relhi->r_offset); | |
497 | } | |
498 | ||
499 | /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit | |
500 | inplace relocation; this function exists in order to do the | |
501 | R_M32R_HI16_[SU]LO relocation described above. */ | |
502 | ||
503 | bfd_reloc_status_type | |
4c72e23a | 504 | m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data, |
252b5132 | 505 | input_section, output_bfd, error_message) |
4c72e23a | 506 | bfd *input_bfd; |
252b5132 RH |
507 | arelent *reloc_entry; |
508 | asymbol *symbol; | |
509 | PTR data; | |
510 | asection *input_section; | |
511 | bfd *output_bfd; | |
512 | char **error_message; | |
513 | { | |
4c72e23a CM |
514 | /* This part is from bfd_elf_generic_reloc. |
515 | If we're relocating, and this an external symbol, we don't want | |
516 | to change anything. */ | |
517 | if (output_bfd != (bfd *) NULL | |
518 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
519 | && reloc_entry->addend == 0) | |
520 | { | |
521 | reloc_entry->address += input_section->output_offset; | |
522 | return bfd_reloc_ok; | |
523 | } | |
524 | ||
252b5132 RH |
525 | if (m32r_hi16_list != NULL) |
526 | { | |
527 | struct m32r_hi16 *l; | |
528 | ||
529 | l = m32r_hi16_list; | |
530 | while (l != NULL) | |
531 | { | |
532 | unsigned long insn; | |
533 | unsigned long val; | |
534 | unsigned long vallo; | |
535 | struct m32r_hi16 *next; | |
536 | ||
537 | /* Do the HI16 relocation. Note that we actually don't need | |
538 | to know anything about the LO16 itself, except where to | |
539 | find the low 16 bits of the addend needed by the LO16. */ | |
4c72e23a CM |
540 | insn = bfd_get_32 (input_bfd, l->addr); |
541 | vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address) | |
252b5132 RH |
542 | & 0xffff) ^ 0x8000) - 0x8000; |
543 | val = ((insn & 0xffff) << 16) + vallo; | |
544 | val += l->addend; | |
545 | ||
546 | /* Reaccount for sign extension of low part. */ | |
547 | if ((val & 0x8000) != 0) | |
548 | val += 0x10000; | |
549 | ||
550 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); | |
4c72e23a | 551 | bfd_put_32 (input_bfd, insn, l->addr); |
252b5132 RH |
552 | |
553 | next = l->next; | |
554 | free (l); | |
555 | l = next; | |
556 | } | |
557 | ||
558 | m32r_hi16_list = NULL; | |
559 | } | |
560 | ||
4c72e23a CM |
561 | /* Now do the LO16 reloc in the usual way. |
562 | ??? It would be nice to call bfd_elf_generic_reloc here, | |
563 | but we have partial_inplace == TRUE. bfd_elf_generic_reloc will | |
564 | pass the handling back to bfd_install_relocation which will install | |
565 | a section relative addend which is wrong. */ | |
8b125cde DE |
566 | return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data, |
567 | input_section, output_bfd, error_message); | |
568 | } | |
569 | ||
c3668558 KH |
570 | /* Do generic partial_inplace relocation. |
571 | This is a local replacement for bfd_elf_generic_reloc. */ | |
8b125cde DE |
572 | |
573 | bfd_reloc_status_type | |
574 | m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data, | |
575 | input_section, output_bfd, error_message) | |
576 | bfd *input_bfd; | |
577 | arelent *reloc_entry; | |
578 | asymbol *symbol; | |
579 | PTR data; | |
580 | asection *input_section; | |
581 | bfd *output_bfd; | |
23ccc829 | 582 | char **error_message ATTRIBUTE_UNUSED; |
8b125cde DE |
583 | { |
584 | bfd_reloc_status_type ret; | |
585 | bfd_vma relocation; | |
586 | bfd_byte *inplace_address; | |
587 | ||
588 | /* This part is from bfd_elf_generic_reloc. | |
589 | If we're relocating, and this an external symbol, we don't want | |
590 | to change anything. */ | |
591 | if (output_bfd != (bfd *) NULL | |
592 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
593 | && reloc_entry->addend == 0) | |
594 | { | |
595 | reloc_entry->address += input_section->output_offset; | |
596 | return bfd_reloc_ok; | |
597 | } | |
598 | ||
599 | /* Now do the the reloc in the usual way. | |
600 | ??? It would be nice to call bfd_elf_generic_reloc here, | |
601 | but we have partial_inplace == TRUE. bfd_elf_generic_reloc will | |
602 | pass the handling back to bfd_install_relocation which will install | |
603 | a section relative addend which is wrong. */ | |
4c72e23a CM |
604 | |
605 | /* Sanity check the address (offset in section). */ | |
606 | if (reloc_entry->address > input_section->_cooked_size) | |
607 | return bfd_reloc_outofrange; | |
608 | ||
609 | ret = bfd_reloc_ok; | |
610 | if (bfd_is_und_section (symbol->section) | |
611 | && output_bfd == (bfd *) NULL) | |
612 | ret = bfd_reloc_undefined; | |
613 | ||
614 | if (bfd_is_com_section (symbol->section) | |
615 | || output_bfd != (bfd *) NULL) | |
616 | relocation = 0; | |
617 | else | |
618 | relocation = symbol->value; | |
619 | ||
620 | /* Only do this for a final link. */ | |
621 | if (output_bfd == (bfd *) NULL) | |
622 | { | |
623 | relocation += symbol->section->output_section->vma; | |
624 | relocation += symbol->section->output_offset; | |
625 | } | |
626 | ||
627 | relocation += reloc_entry->addend; | |
23ccc829 | 628 | inplace_address = (bfd_byte *) data + reloc_entry->address; |
8b125cde DE |
629 | |
630 | #define DOIT(x) \ | |
631 | x = ( (x & ~reloc_entry->howto->dst_mask) | \ | |
632 | (((x & reloc_entry->howto->src_mask) + relocation) & \ | |
633 | reloc_entry->howto->dst_mask)) | |
4c72e23a | 634 | |
8b125cde DE |
635 | switch (reloc_entry->howto->size) |
636 | { | |
637 | case 1: | |
638 | { | |
639 | short x = bfd_get_16 (input_bfd, inplace_address); | |
640 | DOIT (x); | |
641 | bfd_put_16 (input_bfd, x, inplace_address); | |
642 | } | |
643 | break; | |
644 | case 2: | |
645 | { | |
646 | unsigned long x = bfd_get_32 (input_bfd, inplace_address); | |
647 | DOIT (x); | |
648 | bfd_put_32 (input_bfd, x, inplace_address); | |
649 | } | |
650 | break; | |
651 | default: | |
652 | BFD_ASSERT (0); | |
653 | } | |
4c72e23a CM |
654 | |
655 | if (output_bfd != (bfd *) NULL) | |
656 | reloc_entry->address += input_section->output_offset; | |
657 | ||
658 | return ret; | |
252b5132 RH |
659 | } |
660 | ||
661 | /* Handle the R_M32R_SDA16 reloc. | |
662 | This reloc is used to compute the address of objects in the small data area | |
663 | and to perform loads and stores from that area. | |
664 | The lower 16 bits are sign extended and added to the register specified | |
665 | in the instruction, which is assumed to point to _SDA_BASE_. */ | |
666 | ||
667 | static bfd_reloc_status_type | |
668 | m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data, | |
669 | input_section, output_bfd, error_message) | |
5f771d47 | 670 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
671 | arelent *reloc_entry; |
672 | asymbol *symbol; | |
5f771d47 | 673 | PTR data ATTRIBUTE_UNUSED; |
252b5132 RH |
674 | asection *input_section; |
675 | bfd *output_bfd; | |
5f771d47 | 676 | char **error_message ATTRIBUTE_UNUSED; |
252b5132 RH |
677 | { |
678 | /* This part is from bfd_elf_generic_reloc. */ | |
679 | if (output_bfd != (bfd *) NULL | |
680 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
681 | && (! reloc_entry->howto->partial_inplace | |
682 | || reloc_entry->addend == 0)) | |
683 | { | |
684 | reloc_entry->address += input_section->output_offset; | |
685 | return bfd_reloc_ok; | |
686 | } | |
687 | ||
688 | if (output_bfd != NULL) | |
689 | { | |
690 | /* FIXME: See bfd_perform_relocation. Is this right? */ | |
691 | return bfd_reloc_continue; | |
692 | } | |
693 | ||
694 | /* FIXME: not sure what to do here yet. But then again, the linker | |
695 | may never call us. */ | |
696 | abort (); | |
697 | } | |
698 | \f | |
699 | /* Map BFD reloc types to M32R ELF reloc types. */ | |
700 | ||
701 | struct m32r_reloc_map | |
702 | { | |
703 | bfd_reloc_code_real_type bfd_reloc_val; | |
704 | unsigned char elf_reloc_val; | |
705 | }; | |
706 | ||
707 | static const struct m32r_reloc_map m32r_reloc_map[] = | |
708 | { | |
709 | { BFD_RELOC_NONE, R_M32R_NONE }, | |
710 | { BFD_RELOC_16, R_M32R_16 }, | |
711 | { BFD_RELOC_32, R_M32R_32 }, | |
712 | { BFD_RELOC_M32R_24, R_M32R_24 }, | |
713 | { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL }, | |
714 | { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL }, | |
715 | { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL }, | |
716 | { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO }, | |
717 | { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO }, | |
718 | { BFD_RELOC_M32R_LO16, R_M32R_LO16 }, | |
719 | { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 }, | |
720 | { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT }, | |
721 | { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY }, | |
722 | }; | |
723 | ||
724 | static reloc_howto_type * | |
725 | bfd_elf32_bfd_reloc_type_lookup (abfd, code) | |
5f771d47 | 726 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
727 | bfd_reloc_code_real_type code; |
728 | { | |
729 | unsigned int i; | |
730 | ||
731 | for (i = 0; | |
732 | i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map); | |
733 | i++) | |
734 | { | |
735 | if (m32r_reloc_map[i].bfd_reloc_val == code) | |
736 | return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val]; | |
737 | } | |
738 | ||
739 | return NULL; | |
740 | } | |
741 | ||
742 | /* Set the howto pointer for an M32R ELF reloc. */ | |
743 | ||
744 | static void | |
745 | m32r_info_to_howto_rel (abfd, cache_ptr, dst) | |
5f771d47 | 746 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
747 | arelent *cache_ptr; |
748 | Elf32_Internal_Rel *dst; | |
749 | { | |
750 | unsigned int r_type; | |
751 | ||
752 | r_type = ELF32_R_TYPE (dst->r_info); | |
753 | BFD_ASSERT (r_type < (unsigned int) R_M32R_max); | |
754 | cache_ptr->howto = &m32r_elf_howto_table[r_type]; | |
755 | } | |
756 | \f | |
757 | /* Given a BFD section, try to locate the corresponding ELF section | |
758 | index. */ | |
759 | ||
760 | boolean | |
761 | _bfd_m32r_elf_section_from_bfd_section (abfd, hdr, sec, retval) | |
5f771d47 ILT |
762 | bfd *abfd ATTRIBUTE_UNUSED; |
763 | Elf32_Internal_Shdr *hdr ATTRIBUTE_UNUSED; | |
252b5132 RH |
764 | asection *sec; |
765 | int *retval; | |
766 | { | |
767 | if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0) | |
768 | { | |
769 | *retval = SHN_M32R_SCOMMON; | |
770 | return true; | |
771 | } | |
772 | return false; | |
773 | } | |
774 | ||
775 | /* M32R ELF uses two common sections. One is the usual one, and the other | |
776 | is for small objects. All the small objects are kept together, and then | |
777 | referenced via one register, which yields faster assembler code. It is | |
778 | up to the compiler to emit an instruction to load the register with | |
779 | _SDA_BASE. This is what we use for the small common section. This | |
780 | approach is copied from elf32-mips.c. */ | |
781 | static asection m32r_elf_scom_section; | |
782 | static asymbol m32r_elf_scom_symbol; | |
783 | static asymbol *m32r_elf_scom_symbol_ptr; | |
784 | ||
785 | /* Handle the special M32R section numbers that a symbol may use. */ | |
786 | ||
787 | void | |
788 | _bfd_m32r_elf_symbol_processing (abfd, asym) | |
5f771d47 | 789 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
790 | asymbol *asym; |
791 | { | |
792 | elf_symbol_type *elfsym; | |
793 | ||
794 | elfsym = (elf_symbol_type *) asym; | |
795 | ||
796 | switch (elfsym->internal_elf_sym.st_shndx) | |
797 | { | |
798 | case SHN_M32R_SCOMMON: | |
799 | if (m32r_elf_scom_section.name == NULL) | |
800 | { | |
801 | /* Initialize the small common section. */ | |
802 | m32r_elf_scom_section.name = ".scommon"; | |
803 | m32r_elf_scom_section.flags = SEC_IS_COMMON; | |
804 | m32r_elf_scom_section.output_section = &m32r_elf_scom_section; | |
805 | m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol; | |
806 | m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr; | |
807 | m32r_elf_scom_symbol.name = ".scommon"; | |
808 | m32r_elf_scom_symbol.flags = BSF_SECTION_SYM; | |
809 | m32r_elf_scom_symbol.section = &m32r_elf_scom_section; | |
810 | m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol; | |
811 | } | |
812 | asym->section = &m32r_elf_scom_section; | |
813 | asym->value = elfsym->internal_elf_sym.st_size; | |
814 | break; | |
815 | } | |
816 | } | |
817 | ||
818 | /* Hook called by the linker routine which adds symbols from an object | |
819 | file. We must handle the special M32R section numbers here. | |
820 | We also keep watching for whether we need to create the sdata special | |
821 | linker sections. */ | |
822 | ||
823 | static boolean | |
824 | m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp) | |
825 | bfd *abfd; | |
826 | struct bfd_link_info *info; | |
827 | const Elf_Internal_Sym *sym; | |
828 | const char **namep; | |
5f771d47 | 829 | flagword *flagsp ATTRIBUTE_UNUSED; |
252b5132 RH |
830 | asection **secp; |
831 | bfd_vma *valp; | |
832 | { | |
833 | if (! info->relocateable | |
834 | && (*namep)[0] == '_' && (*namep)[1] == 'S' | |
835 | && strcmp (*namep, "_SDA_BASE_") == 0) | |
836 | { | |
837 | /* This is simpler than using _bfd_elf_create_linker_section | |
838 | (our needs are simpler than ppc's needs). Also | |
839 | _bfd_elf_create_linker_section currently has a bug where if a .sdata | |
840 | section already exists a new one is created that follows it which | |
841 | screws of _SDA_BASE_ address calcs because output_offset != 0. */ | |
842 | struct elf_link_hash_entry *h; | |
843 | asection *s = bfd_get_section_by_name (abfd, ".sdata"); | |
844 | ||
845 | /* The following code was cobbled from elf32-ppc.c and elflink.c. */ | |
846 | ||
847 | if (s == NULL) | |
848 | { | |
849 | int flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | |
850 | | SEC_IN_MEMORY | SEC_LINKER_CREATED); | |
851 | ||
852 | s = bfd_make_section_anyway (abfd, ".sdata"); | |
853 | if (s == NULL) | |
854 | return false; | |
855 | bfd_set_section_flags (abfd, s, flags); | |
856 | bfd_set_section_alignment (abfd, s, 2); | |
857 | } | |
858 | ||
859 | h = (struct elf_link_hash_entry *) | |
860 | bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false); | |
861 | ||
862 | if ((h == NULL || h->root.type == bfd_link_hash_undefined) | |
863 | && !(_bfd_generic_link_add_one_symbol (info, | |
864 | abfd, | |
865 | "_SDA_BASE_", | |
866 | BSF_GLOBAL, | |
867 | s, | |
868 | 32768, | |
869 | (const char *) NULL, | |
870 | false, | |
871 | get_elf_backend_data (abfd)->collect, | |
872 | (struct bfd_link_hash_entry **) &h))) | |
873 | return false; | |
874 | h->type = STT_OBJECT; | |
875 | } | |
876 | ||
877 | switch (sym->st_shndx) | |
878 | { | |
879 | case SHN_M32R_SCOMMON: | |
880 | *secp = bfd_make_section_old_way (abfd, ".scommon"); | |
881 | (*secp)->flags |= SEC_IS_COMMON; | |
882 | *valp = sym->st_size; | |
883 | break; | |
884 | } | |
885 | ||
886 | return true; | |
887 | } | |
888 | ||
889 | /* We have to figure out the SDA_BASE value, so that we can adjust the | |
890 | symbol value correctly. We look up the symbol _SDA_BASE_ in the output | |
891 | BFD. If we can't find it, we're stuck. We cache it in the ELF | |
892 | target data. We don't need to adjust the symbol value for an | |
893 | external symbol if we are producing relocateable output. */ | |
894 | ||
895 | static bfd_reloc_status_type | |
896 | m32r_elf_final_sda_base (output_bfd, info, error_message, psb) | |
897 | bfd *output_bfd; | |
898 | struct bfd_link_info *info; | |
899 | const char **error_message; | |
900 | bfd_vma *psb; | |
901 | { | |
902 | if (elf_gp (output_bfd) == 0) | |
903 | { | |
904 | struct bfd_link_hash_entry *h; | |
905 | ||
906 | h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true); | |
907 | if (h != (struct bfd_link_hash_entry *) NULL | |
908 | && h->type == bfd_link_hash_defined) | |
909 | elf_gp (output_bfd) = (h->u.def.value | |
910 | + h->u.def.section->output_section->vma | |
911 | + h->u.def.section->output_offset); | |
912 | else | |
913 | { | |
914 | /* Only get the error once. */ | |
915 | *psb = elf_gp (output_bfd) = 4; | |
916 | *error_message = | |
917 | (const char *) _("SDA relocation when _SDA_BASE_ not defined"); | |
918 | return bfd_reloc_dangerous; | |
919 | } | |
920 | } | |
921 | *psb = elf_gp (output_bfd); | |
922 | return bfd_reloc_ok; | |
923 | } | |
924 | \f | |
925 | /* Relocate an M32R/D ELF section. | |
926 | There is some attempt to make this function usable for many architectures, | |
927 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], | |
928 | if only to serve as a learning tool. | |
929 | ||
930 | The RELOCATE_SECTION function is called by the new ELF backend linker | |
931 | to handle the relocations for a section. | |
932 | ||
933 | The relocs are always passed as Rela structures; if the section | |
934 | actually uses Rel structures, the r_addend field will always be | |
935 | zero. | |
936 | ||
937 | This function is responsible for adjust the section contents as | |
938 | necessary, and (if using Rela relocs and generating a | |
939 | relocateable output file) adjusting the reloc addend as | |
940 | necessary. | |
941 | ||
942 | This function does not have to worry about setting the reloc | |
943 | address or the reloc symbol index. | |
944 | ||
945 | LOCAL_SYMS is a pointer to the swapped in local symbols. | |
946 | ||
947 | LOCAL_SECTIONS is an array giving the section in the input file | |
948 | corresponding to the st_shndx field of each local symbol. | |
949 | ||
950 | The global hash table entry for the global symbols can be found | |
951 | via elf_sym_hashes (input_bfd). | |
952 | ||
953 | When generating relocateable output, this function must handle | |
954 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is | |
955 | going to be the section symbol corresponding to the output | |
956 | section, which means that the addend must be adjusted | |
957 | accordingly. */ | |
958 | ||
959 | static boolean | |
960 | m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, | |
961 | contents, relocs, local_syms, local_sections) | |
5f771d47 | 962 | bfd *output_bfd ATTRIBUTE_UNUSED; |
252b5132 RH |
963 | struct bfd_link_info *info; |
964 | bfd *input_bfd; | |
965 | asection *input_section; | |
966 | bfd_byte *contents; | |
967 | Elf_Internal_Rela *relocs; | |
968 | Elf_Internal_Sym *local_syms; | |
969 | asection **local_sections; | |
970 | { | |
971 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
972 | struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); | |
973 | Elf_Internal_Rela *rel, *relend; | |
974 | /* Assume success. */ | |
975 | boolean ret = true; | |
976 | ||
977 | rel = relocs; | |
978 | relend = relocs + input_section->reloc_count; | |
979 | for (; rel < relend; rel++) | |
980 | { | |
981 | int r_type; | |
982 | reloc_howto_type *howto; | |
983 | unsigned long r_symndx; | |
984 | /* We can't modify r_addend here as elf_link_input_bfd has an assert to | |
985 | ensure it's zero (we use REL relocs, not RELA). Therefore this | |
986 | should be assigning zero to `addend', but for clarity we use | |
987 | `r_addend'. */ | |
988 | bfd_vma addend = rel->r_addend; | |
989 | bfd_vma offset = rel->r_offset; | |
990 | struct elf_link_hash_entry *h; | |
991 | Elf_Internal_Sym *sym; | |
992 | asection *sec; | |
993 | const char *sym_name; | |
994 | bfd_reloc_status_type r; | |
995 | const char *errmsg = NULL; | |
996 | ||
997 | h = NULL; | |
998 | r_type = ELF32_R_TYPE (rel->r_info); | |
999 | if (r_type < 0 || r_type >= (int) R_M32R_max) | |
1000 | { | |
1001 | (*_bfd_error_handler) (_("%s: unknown relocation type %d"), | |
1002 | bfd_get_filename (input_bfd), | |
1003 | (int) r_type); | |
1004 | bfd_set_error (bfd_error_bad_value); | |
1005 | ret = false; | |
1006 | continue; | |
1007 | } | |
1008 | ||
1009 | if (r_type == R_M32R_GNU_VTENTRY | |
1010 | || r_type == R_M32R_GNU_VTINHERIT) | |
1011 | continue; | |
1012 | ||
1013 | howto = m32r_elf_howto_table + r_type; | |
1014 | r_symndx = ELF32_R_SYM (rel->r_info); | |
1015 | ||
1016 | if (info->relocateable) | |
1017 | { | |
1018 | /* This is a relocateable link. We don't have to change | |
1019 | anything, unless the reloc is against a section symbol, | |
1020 | in which case we have to adjust according to where the | |
1021 | section symbol winds up in the output section. */ | |
1022 | sec = NULL; | |
1023 | if (r_symndx >= symtab_hdr->sh_info) | |
1024 | { | |
1025 | /* External symbol. */ | |
1026 | continue; | |
1027 | } | |
1028 | ||
1029 | /* Local symbol. */ | |
1030 | sym = local_syms + r_symndx; | |
1031 | sym_name = "<local symbol>"; | |
1032 | /* STT_SECTION: symbol is associated with a section. */ | |
1033 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) | |
1034 | { | |
1035 | /* Symbol isn't associated with a section. Nothing to do. */ | |
1036 | continue; | |
1037 | } | |
1038 | ||
1039 | sec = local_sections[r_symndx]; | |
1040 | addend += sec->output_offset + sym->st_value; | |
1041 | #ifndef USE_REL | |
1042 | /* This can't be done for USE_REL because it doesn't mean anything | |
1043 | and elf_link_input_bfd asserts this stays zero. */ | |
1044 | rel->r_addend = addend; | |
1045 | #endif | |
1046 | ||
1047 | #ifndef USE_REL | |
1048 | /* Addends are stored with relocs. We're done. */ | |
1049 | continue; | |
1050 | #else /* USE_REL */ | |
1051 | /* If partial_inplace, we need to store any additional addend | |
1052 | back in the section. */ | |
1053 | if (! howto->partial_inplace) | |
1054 | continue; | |
1055 | /* ??? Here is a nice place to call a special_function | |
1056 | like handler. */ | |
1057 | if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO) | |
1058 | r = _bfd_relocate_contents (howto, input_bfd, | |
1059 | addend, contents + offset); | |
1060 | else | |
1061 | { | |
1062 | Elf_Internal_Rela *lorel; | |
1063 | ||
1064 | /* We allow an arbitrary number of HI16 relocs before the | |
1065 | LO16 reloc. This permits gcc to emit the HI and LO relocs | |
1066 | itself. */ | |
1067 | for (lorel = rel + 1; | |
1068 | (lorel < relend | |
1069 | && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO | |
1070 | || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); | |
1071 | lorel++) | |
1072 | continue; | |
1073 | if (lorel < relend | |
1074 | && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) | |
1075 | { | |
1076 | m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, | |
1077 | contents, addend); | |
1078 | r = bfd_reloc_ok; | |
1079 | } | |
1080 | else | |
1081 | r = _bfd_relocate_contents (howto, input_bfd, | |
1082 | addend, contents + offset); | |
1083 | } | |
1084 | #endif /* USE_REL */ | |
1085 | } | |
1086 | else | |
1087 | { | |
1088 | bfd_vma relocation; | |
1089 | ||
1090 | /* This is a final link. */ | |
1091 | sym = NULL; | |
1092 | sec = NULL; | |
1093 | ||
1094 | if (r_symndx < symtab_hdr->sh_info) | |
1095 | { | |
1096 | /* Local symbol. */ | |
1097 | sym = local_syms + r_symndx; | |
1098 | sec = local_sections[r_symndx]; | |
1099 | sym_name = "<local symbol>"; | |
1100 | relocation = (sec->output_section->vma | |
1101 | + sec->output_offset | |
1102 | + sym->st_value); | |
1103 | } | |
1104 | else | |
1105 | { | |
1106 | /* External symbol. */ | |
1107 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
1108 | while (h->root.type == bfd_link_hash_indirect | |
1109 | || h->root.type == bfd_link_hash_warning) | |
1110 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
1111 | sym_name = h->root.root.string; | |
1112 | ||
1113 | if (h->root.type == bfd_link_hash_defined | |
1114 | || h->root.type == bfd_link_hash_defweak) | |
1115 | { | |
1116 | sec = h->root.u.def.section; | |
1117 | if (sec->output_section == NULL) | |
1118 | relocation = 0; | |
1119 | else | |
1120 | relocation = (h->root.u.def.value | |
1121 | + sec->output_section->vma | |
1122 | + sec->output_offset); | |
1123 | } | |
1124 | else if (h->root.type == bfd_link_hash_undefweak) | |
1125 | relocation = 0; | |
1126 | else | |
1127 | { | |
1128 | if (! ((*info->callbacks->undefined_symbol) | |
1129 | (info, h->root.root.string, input_bfd, | |
5cc7c785 | 1130 | input_section, offset, true))) |
252b5132 RH |
1131 | return false; |
1132 | relocation = 0; | |
1133 | } | |
1134 | } | |
1135 | ||
1136 | /* Sanity check the address. */ | |
1137 | if (offset > input_section->_raw_size) | |
1138 | { | |
1139 | r = bfd_reloc_outofrange; | |
1140 | goto check_reloc; | |
1141 | } | |
1142 | ||
1143 | switch ((int) r_type) | |
1144 | { | |
1145 | case (int) R_M32R_10_PCREL : | |
1146 | r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section, | |
1147 | contents, offset, | |
1148 | sec, relocation, addend); | |
1149 | break; | |
1150 | ||
1151 | case (int) R_M32R_HI16_SLO : | |
1152 | case (int) R_M32R_HI16_ULO : | |
1153 | { | |
1154 | Elf_Internal_Rela *lorel; | |
1155 | ||
1156 | /* We allow an arbitrary number of HI16 relocs before the | |
1157 | LO16 reloc. This permits gcc to emit the HI and LO relocs | |
1158 | itself. */ | |
1159 | for (lorel = rel + 1; | |
1160 | (lorel < relend | |
1161 | && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO | |
1162 | || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); | |
1163 | lorel++) | |
1164 | continue; | |
1165 | if (lorel < relend | |
1166 | && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) | |
1167 | { | |
1168 | m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, | |
1169 | contents, relocation + addend); | |
1170 | r = bfd_reloc_ok; | |
1171 | } | |
1172 | else | |
1173 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1174 | contents, offset, | |
1175 | relocation, addend); | |
1176 | } | |
1177 | break; | |
1178 | ||
1179 | case (int) R_M32R_SDA16 : | |
1180 | { | |
1181 | const char *name; | |
1182 | ||
1183 | BFD_ASSERT (sec != NULL); | |
1184 | name = bfd_get_section_name (abfd, sec); | |
1185 | ||
1186 | if (strcmp (name, ".sdata") == 0 | |
1187 | || strcmp (name, ".sbss") == 0 | |
1188 | || strcmp (name, ".scommon") == 0) | |
1189 | { | |
1190 | bfd_vma sda_base; | |
1191 | bfd *out_bfd = sec->output_section->owner; | |
1192 | ||
1193 | r = m32r_elf_final_sda_base (out_bfd, info, | |
1194 | &errmsg, | |
1195 | &sda_base); | |
1196 | if (r != bfd_reloc_ok) | |
1197 | { | |
1198 | ret = false; | |
1199 | goto check_reloc; | |
1200 | } | |
1201 | ||
1202 | /* At this point `relocation' contains the object's | |
1203 | address. */ | |
1204 | relocation -= sda_base; | |
1205 | /* Now it contains the offset from _SDA_BASE_. */ | |
1206 | } | |
1207 | else | |
1208 | { | |
1209 | (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"), | |
1210 | bfd_get_filename (input_bfd), | |
1211 | sym_name, | |
1212 | m32r_elf_howto_table[(int) r_type].name, | |
1213 | bfd_get_section_name (abfd, sec)); | |
1214 | /*bfd_set_error (bfd_error_bad_value); ??? why? */ | |
1215 | ret = false; | |
1216 | continue; | |
1217 | } | |
1218 | } | |
1219 | /* fall through */ | |
1220 | ||
1221 | default : | |
1222 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1223 | contents, offset, | |
1224 | relocation, addend); | |
1225 | break; | |
1226 | } | |
1227 | } | |
1228 | ||
1229 | check_reloc: | |
1230 | ||
1231 | if (r != bfd_reloc_ok) | |
1232 | { | |
1233 | /* FIXME: This should be generic enough to go in a utility. */ | |
1234 | const char *name; | |
1235 | ||
1236 | if (h != NULL) | |
1237 | name = h->root.root.string; | |
1238 | else | |
1239 | { | |
1240 | name = (bfd_elf_string_from_elf_section | |
1241 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
1242 | if (name == NULL || *name == '\0') | |
1243 | name = bfd_section_name (input_bfd, sec); | |
1244 | } | |
1245 | ||
1246 | if (errmsg != NULL) | |
1247 | goto common_error; | |
1248 | ||
1249 | switch (r) | |
1250 | { | |
1251 | case bfd_reloc_overflow: | |
1252 | if (! ((*info->callbacks->reloc_overflow) | |
1253 | (info, name, howto->name, (bfd_vma) 0, | |
1254 | input_bfd, input_section, offset))) | |
1255 | return false; | |
1256 | break; | |
1257 | ||
1258 | case bfd_reloc_undefined: | |
1259 | if (! ((*info->callbacks->undefined_symbol) | |
1260 | (info, name, input_bfd, input_section, | |
5cc7c785 | 1261 | offset, true))) |
252b5132 RH |
1262 | return false; |
1263 | break; | |
1264 | ||
1265 | case bfd_reloc_outofrange: | |
1266 | errmsg = _("internal error: out of range error"); | |
1267 | goto common_error; | |
1268 | ||
1269 | case bfd_reloc_notsupported: | |
1270 | errmsg = _("internal error: unsupported relocation error"); | |
1271 | goto common_error; | |
1272 | ||
1273 | case bfd_reloc_dangerous: | |
1274 | errmsg = _("internal error: dangerous error"); | |
1275 | goto common_error; | |
1276 | ||
1277 | default: | |
1278 | errmsg = _("internal error: unknown error"); | |
1279 | /* fall through */ | |
1280 | ||
1281 | common_error: | |
1282 | if (!((*info->callbacks->warning) | |
1283 | (info, errmsg, name, input_bfd, input_section, | |
1284 | offset))) | |
1285 | return false; | |
1286 | break; | |
1287 | } | |
1288 | } | |
1289 | } | |
1290 | ||
1291 | return ret; | |
1292 | } | |
1293 | \f | |
1294 | #if 0 /* relaxing not supported yet */ | |
1295 | ||
1296 | /* This function handles relaxing for the m32r. | |
1297 | Relaxing on the m32r is tricky because of instruction alignment | |
1298 | requirements (4 byte instructions must be aligned on 4 byte boundaries). | |
1299 | ||
1300 | The following relaxing opportunities are handled: | |
1301 | ||
1302 | seth/add3/jl -> bl24 or bl8 | |
1303 | seth/add3 -> ld24 | |
1304 | ||
1305 | It would be nice to handle bl24 -> bl8 but given: | |
1306 | ||
1307 | - 4 byte insns must be on 4 byte boundaries | |
1308 | - branch instructions only branch to insns on 4 byte boundaries | |
1309 | ||
1310 | this isn't much of a win because the insn in the 2 "deleted" bytes | |
1311 | must become a nop. With some complexity some real relaxation could be | |
1312 | done but the frequency just wouldn't make it worth it; it's better to | |
1313 | try to do all the code compaction one can elsewhere. | |
1314 | When the chip supports parallel 16 bit insns, things may change. | |
1315 | */ | |
1316 | ||
c3668558 | 1317 | static boolean |
252b5132 RH |
1318 | m32r_elf_relax_section (abfd, sec, link_info, again) |
1319 | bfd *abfd; | |
1320 | asection *sec; | |
1321 | struct bfd_link_info *link_info; | |
1322 | boolean *again; | |
1323 | { | |
1324 | Elf_Internal_Shdr *symtab_hdr; | |
1325 | /* The Rela structures are used here because that's what | |
1326 | _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend | |
1327 | field to 0]. */ | |
1328 | Elf_Internal_Rela *internal_relocs; | |
1329 | Elf_Internal_Rela *free_relocs = NULL; | |
1330 | Elf_Internal_Rela *irel, *irelend; | |
1331 | bfd_byte *contents = NULL; | |
1332 | bfd_byte *free_contents = NULL; | |
1333 | Elf32_External_Sym *extsyms = NULL; | |
1334 | Elf32_External_Sym *free_extsyms = NULL; | |
1335 | ||
1336 | /* Assume nothing changes. */ | |
1337 | *again = false; | |
1338 | ||
1339 | /* We don't have to do anything for a relocateable link, if | |
1340 | this section does not have relocs, or if this is not a | |
1341 | code section. */ | |
1342 | if (link_info->relocateable | |
1343 | || (sec->flags & SEC_RELOC) == 0 | |
1344 | || sec->reloc_count == 0 | |
1345 | || (sec->flags & SEC_CODE) == 0 | |
1346 | || 0 /* FIXME: check SHF_M32R_CAN_RELAX */) | |
1347 | return true; | |
1348 | ||
1349 | /* If this is the first time we have been called for this section, | |
1350 | initialize the cooked size. */ | |
1351 | if (sec->_cooked_size == 0) | |
1352 | sec->_cooked_size = sec->_raw_size; | |
1353 | ||
1354 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1355 | ||
1356 | /* Get a copy of the native relocations. */ | |
1357 | internal_relocs = (_bfd_elf32_link_read_relocs | |
1358 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, | |
1359 | link_info->keep_memory)); | |
1360 | if (internal_relocs == NULL) | |
1361 | goto error_return; | |
1362 | if (! link_info->keep_memory) | |
1363 | free_relocs = internal_relocs; | |
1364 | ||
1365 | /* Walk through them looking for relaxing opportunities. */ | |
1366 | irelend = internal_relocs + sec->reloc_count; | |
1367 | for (irel = internal_relocs; irel < irelend; irel++) | |
1368 | { | |
1369 | bfd_vma symval; | |
1370 | ||
1371 | /* If this isn't something that can be relaxed, then ignore | |
1372 | this reloc. */ | |
1373 | if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO) | |
1374 | continue; | |
1375 | ||
1376 | /* Get the section contents if we haven't done so already. */ | |
1377 | if (contents == NULL) | |
1378 | { | |
1379 | /* Get cached copy if it exists. */ | |
1380 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
1381 | contents = elf_section_data (sec)->this_hdr.contents; | |
1382 | else | |
1383 | { | |
1384 | /* Go get them off disk. */ | |
1385 | contents = (bfd_byte *) bfd_malloc (sec->_raw_size); | |
1386 | if (contents == NULL) | |
1387 | goto error_return; | |
1388 | free_contents = contents; | |
1389 | ||
1390 | if (! bfd_get_section_contents (abfd, sec, contents, | |
1391 | (file_ptr) 0, sec->_raw_size)) | |
1392 | goto error_return; | |
1393 | } | |
1394 | } | |
1395 | ||
1396 | /* Read this BFD's symbols if we haven't done so already. */ | |
1397 | if (extsyms == NULL) | |
1398 | { | |
1399 | /* Get cached copy if it exists. */ | |
1400 | if (symtab_hdr->contents != NULL) | |
1401 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1402 | else | |
1403 | { | |
1404 | /* Go get them off disk. */ | |
1405 | extsyms = ((Elf32_External_Sym *) | |
1406 | bfd_malloc (symtab_hdr->sh_size)); | |
1407 | if (extsyms == NULL) | |
1408 | goto error_return; | |
1409 | free_extsyms = extsyms; | |
1410 | if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0 | |
1411 | || (bfd_read (extsyms, 1, symtab_hdr->sh_size, abfd) | |
1412 | != symtab_hdr->sh_size)) | |
1413 | goto error_return; | |
1414 | } | |
1415 | } | |
1416 | ||
1417 | /* Get the value of the symbol referred to by the reloc. */ | |
1418 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
1419 | { | |
1420 | Elf_Internal_Sym isym; | |
1421 | asection *sym_sec; | |
1422 | ||
1423 | /* A local symbol. */ | |
1424 | bfd_elf32_swap_symbol_in (abfd, | |
1425 | extsyms + ELF32_R_SYM (irel->r_info), | |
1426 | &isym); | |
1427 | ||
1428 | sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx); | |
1429 | symval = (isym.st_value | |
1430 | + sym_sec->output_section->vma | |
1431 | + sym_sec->output_offset); | |
1432 | } | |
1433 | else | |
1434 | { | |
1435 | unsigned long indx; | |
1436 | struct elf_link_hash_entry *h; | |
1437 | ||
1438 | /* An external symbol. */ | |
1439 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
1440 | h = elf_sym_hashes (abfd)[indx]; | |
1441 | BFD_ASSERT (h != NULL); | |
1442 | if (h->root.type != bfd_link_hash_defined | |
1443 | && h->root.type != bfd_link_hash_defweak) | |
1444 | { | |
1445 | /* This appears to be a reference to an undefined | |
1446 | symbol. Just ignore it--it will be caught by the | |
1447 | regular reloc processing. */ | |
1448 | continue; | |
1449 | } | |
1450 | ||
1451 | symval = (h->root.u.def.value | |
1452 | + h->root.u.def.section->output_section->vma | |
1453 | + h->root.u.def.section->output_offset); | |
1454 | } | |
1455 | ||
1456 | /* For simplicity of coding, we are going to modify the section | |
1457 | contents, the section relocs, and the BFD symbol table. We | |
1458 | must tell the rest of the code not to free up this | |
1459 | information. It would be possible to instead create a table | |
1460 | of changes which have to be made, as is done in coff-mips.c; | |
1461 | that would be more work, but would require less memory when | |
1462 | the linker is run. */ | |
1463 | ||
1464 | /* Try to change a seth/add3/jl subroutine call to bl24 or bl8. | |
1465 | This sequence is generated by the compiler when compiling in | |
1466 | 32 bit mode. Also look for seth/add3 -> ld24. */ | |
1467 | ||
1468 | if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO) | |
1469 | { | |
1470 | Elf_Internal_Rela *nrel; | |
1471 | bfd_vma pc = (sec->output_section->vma + sec->output_offset | |
1472 | + irel->r_offset); | |
1473 | bfd_signed_vma pcrel_value = symval - pc; | |
1474 | unsigned int code,reg; | |
1475 | int addend,nop_p,bl8_p,to_delete; | |
1476 | ||
1477 | /* The tests are ordered so that we get out as quickly as possible | |
1478 | if this isn't something we can relax, taking into account that | |
1479 | we are looking for two separate possibilities (jl/ld24). */ | |
1480 | ||
1481 | /* Do nothing if no room in the section for this to be what we're | |
1482 | looking for. */ | |
1483 | if (irel->r_offset > sec->_cooked_size - 8) | |
1484 | continue; | |
1485 | ||
1486 | /* Make sure the next relocation applies to the next | |
1487 | instruction and that it's the add3's reloc. */ | |
1488 | nrel = irel + 1; | |
1489 | if (nrel == irelend | |
1490 | || irel->r_offset + 4 != nrel->r_offset | |
1491 | || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16) | |
1492 | continue; | |
1493 | ||
1494 | /* See if the instructions are seth/add3. */ | |
1495 | /* FIXME: This is where macros from cgen can come in. */ | |
1496 | code = bfd_get_16 (abfd, contents + irel->r_offset + 0); | |
1497 | if ((code & 0xf0ff) != 0xd0c0) | |
1498 | continue; /* not seth rN,foo */ | |
1499 | reg = (code & 0x0f00) >> 8; | |
1500 | code = bfd_get_16 (abfd, contents + irel->r_offset + 4); | |
1501 | if (code != (0x80a0 | reg | (reg << 8))) | |
1502 | continue; /* not add3 rN,rN,foo */ | |
1503 | ||
1504 | /* At this point we've confirmed we have seth/add3. Now check | |
1505 | whether the next insn is a jl, in which case try to change this | |
1506 | to bl24 or bl8. */ | |
1507 | ||
1508 | /* Ensure the branch target is in range. | |
1509 | The bl24 instruction has a 24 bit operand which is the target | |
1510 | address right shifted by 2, giving a signed range of 26 bits. | |
1511 | Note that 4 bytes are added to the high value because the target | |
1512 | will be at least 4 bytes closer if we can relax. It'll actually | |
1513 | be 4 or 8 bytes closer, but we don't know which just yet and | |
1514 | the difference isn't significant enough to worry about. */ | |
1515 | #ifndef USE_REL /* put in for learning purposes */ | |
1516 | pcrel_value += irel->r_addend; | |
1517 | #else | |
1518 | addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2); | |
1519 | pcrel_value += addend; | |
1520 | #endif | |
1521 | ||
1522 | if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4 | |
1523 | /* Do nothing if no room in the section for this to be what we're | |
1524 | looking for. */ | |
1525 | && (irel->r_offset <= sec->_cooked_size - 12) | |
1526 | /* Ensure the next insn is "jl rN". */ | |
1527 | && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)), | |
1528 | code != (0x1ec0 | reg))) | |
1529 | { | |
1530 | /* We can relax to bl24/bl8. */ | |
1531 | ||
1532 | /* See if there's a nop following the jl. | |
1533 | Also see if we can use a bl8 insn. */ | |
1534 | code = bfd_get_16 (abfd, contents + irel->r_offset + 10); | |
1535 | nop_p = (code & 0x7fff) == NOP_INSN; | |
1536 | bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200; | |
1537 | ||
1538 | if (bl8_p) | |
1539 | { | |
1540 | /* Change "seth rN,foo" to "bl8 foo || nop". | |
1541 | We OR in CODE just in case it's not a nop (technically, | |
1542 | CODE currently must be a nop, but for cleanness we | |
1543 | allow it to be anything). */ | |
1544 | #ifndef USE_REL /* put in for learning purposes */ | |
1545 | code = 0x7e000000 | MAKE_PARALLEL (code); | |
1546 | #else | |
1547 | code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code); | |
1548 | #endif | |
1549 | to_delete = 8; | |
1550 | } | |
1551 | else | |
1552 | { | |
1553 | /* Change the seth rN,foo to a bl24 foo. */ | |
1554 | #ifndef USE_REL /* put in for learning purposes */ | |
1555 | code = 0xfe000000; | |
1556 | #else | |
1557 | code = 0xfe000000 + ((addend >> 2) & 0xffffff); | |
1558 | #endif | |
1559 | to_delete = nop_p ? 8 : 4; | |
1560 | } | |
1561 | ||
1562 | bfd_put_32 (abfd, code, contents + irel->r_offset); | |
1563 | ||
1564 | /* Set the new reloc type. */ | |
1565 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
1566 | bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL); | |
1567 | ||
1568 | /* Delete the add3 reloc by making it a null reloc. */ | |
1569 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
1570 | R_M32R_NONE); | |
1571 | } | |
1572 | else if (addend >= 0 | |
1573 | && symval + addend <= 0xffffff) | |
1574 | { | |
1575 | /* We can relax to ld24. */ | |
1576 | ||
1577 | code = 0xe0000000 | (reg << 24) | (addend & 0xffffff); | |
1578 | bfd_put_32 (abfd, code, contents + irel->r_offset); | |
1579 | to_delete = 4; | |
1580 | /* Tell the following code a nop filler isn't needed. */ | |
1581 | nop_p = 1; | |
1582 | } | |
1583 | else | |
1584 | { | |
1585 | /* Can't do anything here. */ | |
1586 | continue; | |
1587 | } | |
1588 | ||
1589 | /* Note that we've changed the relocs, section contents, etc. */ | |
1590 | elf_section_data (sec)->relocs = internal_relocs; | |
1591 | free_relocs = NULL; | |
1592 | ||
1593 | elf_section_data (sec)->this_hdr.contents = contents; | |
1594 | free_contents = NULL; | |
1595 | ||
1596 | symtab_hdr->contents = (bfd_byte *) extsyms; | |
1597 | free_extsyms = NULL; | |
1598 | ||
1599 | /* Delete TO_DELETE bytes of data. */ | |
1600 | if (!m32r_elf_relax_delete_bytes (abfd, sec, | |
1601 | irel->r_offset + 4, to_delete)) | |
1602 | goto error_return; | |
1603 | ||
1604 | /* Now that the following bytes have been moved into place, see if | |
1605 | we need to replace the jl with a nop. This happens when we had | |
1606 | to use a bl24 insn and the insn following the jl isn't a nop. | |
1607 | Technically, this situation can't happen (since the insn can | |
1608 | never be executed) but to be clean we do this. When the chip | |
1609 | supports parallel 16 bit insns things may change. | |
1610 | We don't need to do this in the case of relaxing to ld24, | |
1611 | and the above code sets nop_p so this isn't done. */ | |
1612 | if (! nop_p && to_delete == 4) | |
1613 | bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4); | |
1614 | ||
1615 | /* That will change things, so we should relax again. | |
1616 | Note that this is not required, and it may be slow. */ | |
1617 | *again = true; | |
1618 | ||
1619 | continue; | |
1620 | } | |
1621 | ||
1622 | /* loop to try the next reloc */ | |
1623 | } | |
1624 | ||
1625 | if (free_relocs != NULL) | |
1626 | { | |
1627 | free (free_relocs); | |
1628 | free_relocs = NULL; | |
1629 | } | |
1630 | ||
1631 | if (free_contents != NULL) | |
1632 | { | |
1633 | if (! link_info->keep_memory) | |
1634 | free (free_contents); | |
1635 | else | |
1636 | { | |
1637 | /* Cache the section contents for elf_link_input_bfd. */ | |
1638 | elf_section_data (sec)->this_hdr.contents = contents; | |
1639 | } | |
1640 | free_contents = NULL; | |
1641 | } | |
1642 | ||
1643 | if (free_extsyms != NULL) | |
1644 | { | |
1645 | if (! link_info->keep_memory) | |
1646 | free (free_extsyms); | |
1647 | else | |
1648 | { | |
1649 | /* Cache the symbols for elf_link_input_bfd. */ | |
1650 | symtab_hdr->contents = extsyms; | |
1651 | } | |
1652 | free_extsyms = NULL; | |
1653 | } | |
1654 | ||
1655 | return true; | |
1656 | ||
1657 | error_return: | |
1658 | if (free_relocs != NULL) | |
1659 | free (free_relocs); | |
1660 | if (free_contents != NULL) | |
1661 | free (free_contents); | |
1662 | if (free_extsyms != NULL) | |
1663 | free (free_extsyms); | |
1664 | return false; | |
1665 | } | |
1666 | ||
1667 | /* Delete some bytes from a section while relaxing. */ | |
1668 | ||
1669 | static boolean | |
1670 | m32r_elf_relax_delete_bytes (abfd, sec, addr, count) | |
1671 | bfd *abfd; | |
1672 | asection *sec; | |
1673 | bfd_vma addr; | |
1674 | int count; | |
1675 | { | |
1676 | Elf_Internal_Shdr *symtab_hdr; | |
1677 | Elf32_External_Sym *extsyms; | |
1678 | int shndx, index; | |
1679 | bfd_byte *contents; | |
1680 | Elf_Internal_Rela *irel, *irelend; | |
1681 | Elf_Internal_Rela *irelalign; | |
1682 | bfd_vma toaddr; | |
1683 | Elf32_External_Sym *esym, *esymend; | |
1684 | struct elf_link_hash_entry *sym_hash; | |
1685 | ||
1686 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1687 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1688 | ||
1689 | shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
1690 | ||
1691 | contents = elf_section_data (sec)->this_hdr.contents; | |
1692 | ||
1693 | /* The deletion must stop at the next ALIGN reloc for an aligment | |
1694 | power larger than the number of bytes we are deleting. */ | |
1695 | ||
1696 | irelalign = NULL; | |
1697 | toaddr = sec->_cooked_size; | |
1698 | ||
1699 | irel = elf_section_data (sec)->relocs; | |
1700 | irelend = irel + sec->reloc_count; | |
1701 | ||
1702 | /* Actually delete the bytes. */ | |
1703 | memmove (contents + addr, contents + addr + count, toaddr - addr - count); | |
1704 | sec->_cooked_size -= count; | |
1705 | ||
1706 | /* Adjust all the relocs. */ | |
1707 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1708 | { | |
1709 | /* Get the new reloc address. */ | |
1710 | if ((irel->r_offset > addr | |
1711 | && irel->r_offset < toaddr)) | |
1712 | irel->r_offset -= count; | |
1713 | } | |
1714 | ||
1715 | /* Adjust the local symbols defined in this section. */ | |
1716 | esym = extsyms; | |
1717 | esymend = esym + symtab_hdr->sh_info; | |
1718 | for (; esym < esymend; esym++) | |
1719 | { | |
1720 | Elf_Internal_Sym isym; | |
1721 | ||
1722 | bfd_elf32_swap_symbol_in (abfd, esym, &isym); | |
1723 | ||
1724 | if (isym.st_shndx == shndx | |
1725 | && isym.st_value > addr | |
1726 | && isym.st_value < toaddr) | |
1727 | { | |
1728 | isym.st_value -= count; | |
1729 | bfd_elf32_swap_symbol_out (abfd, &isym, esym); | |
1730 | } | |
1731 | } | |
1732 | ||
1733 | /* Now adjust the global symbols defined in this section. */ | |
1734 | esym = extsyms + symtab_hdr->sh_info; | |
1735 | esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)); | |
1736 | for (index = 0; esym < esymend; esym++, index++) | |
1737 | { | |
1738 | Elf_Internal_Sym isym; | |
1739 | ||
1740 | bfd_elf32_swap_symbol_in (abfd, esym, &isym); | |
1741 | sym_hash = elf_sym_hashes (abfd)[index]; | |
1742 | if (isym.st_shndx == shndx | |
1743 | && ((sym_hash)->root.type == bfd_link_hash_defined | |
1744 | || (sym_hash)->root.type == bfd_link_hash_defweak) | |
1745 | && (sym_hash)->root.u.def.section == sec | |
1746 | && (sym_hash)->root.u.def.value > addr | |
1747 | && (sym_hash)->root.u.def.value < toaddr) | |
1748 | { | |
1749 | (sym_hash)->root.u.def.value -= count; | |
1750 | } | |
1751 | } | |
1752 | ||
1753 | return true; | |
1754 | } | |
1755 | ||
1756 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1757 | which uses m32r_elf_relocate_section. */ | |
1758 | ||
1759 | static bfd_byte * | |
1760 | m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order, | |
1761 | data, relocateable, symbols) | |
1762 | bfd *output_bfd; | |
1763 | struct bfd_link_info *link_info; | |
1764 | struct bfd_link_order *link_order; | |
1765 | bfd_byte *data; | |
1766 | boolean relocateable; | |
1767 | asymbol **symbols; | |
1768 | { | |
1769 | Elf_Internal_Shdr *symtab_hdr; | |
1770 | asection *input_section = link_order->u.indirect.section; | |
1771 | bfd *input_bfd = input_section->owner; | |
1772 | asection **sections = NULL; | |
1773 | Elf_Internal_Rela *internal_relocs = NULL; | |
1774 | Elf32_External_Sym *external_syms = NULL; | |
1775 | Elf_Internal_Sym *internal_syms = NULL; | |
1776 | ||
1777 | /* We only need to handle the case of relaxing, or of having a | |
1778 | particular set of section contents, specially. */ | |
1779 | if (relocateable | |
1780 | || elf_section_data (input_section)->this_hdr.contents == NULL) | |
1781 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1782 | link_order, data, | |
1783 | relocateable, | |
1784 | symbols); | |
1785 | ||
1786 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1787 | ||
1788 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
1789 | input_section->_raw_size); | |
1790 | ||
1791 | if ((input_section->flags & SEC_RELOC) != 0 | |
1792 | && input_section->reloc_count > 0) | |
1793 | { | |
1794 | Elf_Internal_Sym *isymp; | |
1795 | asection **secpp; | |
1796 | Elf32_External_Sym *esym, *esymend; | |
1797 | ||
1798 | if (symtab_hdr->contents != NULL) | |
1799 | external_syms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1800 | else | |
1801 | { | |
1802 | external_syms = ((Elf32_External_Sym *) | |
1803 | bfd_malloc (symtab_hdr->sh_info | |
1804 | * sizeof (Elf32_External_Sym))); | |
1805 | if (external_syms == NULL && symtab_hdr->sh_info > 0) | |
1806 | goto error_return; | |
1807 | if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0 | |
1808 | || (bfd_read (external_syms, sizeof (Elf32_External_Sym), | |
1809 | symtab_hdr->sh_info, input_bfd) | |
1810 | != (symtab_hdr->sh_info * sizeof (Elf32_External_Sym)))) | |
1811 | goto error_return; | |
1812 | } | |
1813 | ||
1814 | internal_relocs = (_bfd_elf32_link_read_relocs | |
1815 | (input_bfd, input_section, (PTR) NULL, | |
1816 | (Elf_Internal_Rela *) NULL, false)); | |
1817 | if (internal_relocs == NULL) | |
1818 | goto error_return; | |
1819 | ||
1820 | internal_syms = ((Elf_Internal_Sym *) | |
1821 | bfd_malloc (symtab_hdr->sh_info | |
1822 | * sizeof (Elf_Internal_Sym))); | |
1823 | if (internal_syms == NULL && symtab_hdr->sh_info > 0) | |
1824 | goto error_return; | |
1825 | ||
1826 | sections = (asection **) bfd_malloc (symtab_hdr->sh_info | |
1827 | * sizeof (asection *)); | |
1828 | if (sections == NULL && symtab_hdr->sh_info > 0) | |
1829 | goto error_return; | |
1830 | ||
1831 | isymp = internal_syms; | |
1832 | secpp = sections; | |
1833 | esym = external_syms; | |
1834 | esymend = esym + symtab_hdr->sh_info; | |
1835 | for (; esym < esymend; ++esym, ++isymp, ++secpp) | |
1836 | { | |
1837 | asection *isec; | |
1838 | ||
1839 | bfd_elf32_swap_symbol_in (input_bfd, esym, isymp); | |
1840 | ||
1841 | if (isymp->st_shndx == SHN_UNDEF) | |
1842 | isec = bfd_und_section_ptr; | |
1843 | else if (isymp->st_shndx > 0 && isymp->st_shndx < SHN_LORESERVE) | |
1844 | isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx); | |
1845 | else if (isymp->st_shndx == SHN_ABS) | |
1846 | isec = bfd_abs_section_ptr; | |
1847 | else if (isymp->st_shndx == SHN_COMMON) | |
1848 | isec = bfd_com_section_ptr; | |
1849 | else if (isymp->st_shndx == SHN_M32R_SCOMMON) | |
1850 | isec = &m32r_elf_scom_section; | |
1851 | else | |
1852 | { | |
1853 | /* Who knows? */ | |
1854 | isec = NULL; | |
1855 | } | |
1856 | ||
1857 | *secpp = isec; | |
1858 | } | |
1859 | ||
1860 | if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1861 | input_section, data, internal_relocs, | |
1862 | internal_syms, sections)) | |
1863 | goto error_return; | |
1864 | ||
1865 | if (sections != NULL) | |
1866 | free (sections); | |
1867 | sections = NULL; | |
1868 | if (internal_syms != NULL) | |
1869 | free (internal_syms); | |
1870 | internal_syms = NULL; | |
1871 | if (external_syms != NULL && symtab_hdr->contents == NULL) | |
1872 | free (external_syms); | |
1873 | external_syms = NULL; | |
1874 | if (internal_relocs != elf_section_data (input_section)->relocs) | |
1875 | free (internal_relocs); | |
1876 | internal_relocs = NULL; | |
1877 | } | |
1878 | ||
1879 | return data; | |
1880 | ||
1881 | error_return: | |
1882 | if (internal_relocs != NULL | |
1883 | && internal_relocs != elf_section_data (input_section)->relocs) | |
1884 | free (internal_relocs); | |
1885 | if (external_syms != NULL && symtab_hdr->contents == NULL) | |
1886 | free (external_syms); | |
1887 | if (internal_syms != NULL) | |
1888 | free (internal_syms); | |
1889 | if (sections != NULL) | |
1890 | free (sections); | |
1891 | return NULL; | |
1892 | } | |
1893 | ||
1894 | #endif /* #if 0 */ | |
1895 | \f | |
1896 | /* Set the right machine number. */ | |
1897 | static boolean | |
1898 | m32r_elf_object_p (abfd) | |
1899 | bfd *abfd; | |
1900 | { | |
1901 | switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH) | |
1902 | { | |
1903 | default: | |
1904 | case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break; | |
e916b64e | 1905 | case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break; |
252b5132 RH |
1906 | } |
1907 | return true; | |
1908 | } | |
1909 | ||
1910 | /* Store the machine number in the flags field. */ | |
1911 | static void | |
1912 | m32r_elf_final_write_processing (abfd, linker) | |
1913 | bfd * abfd; | |
5f771d47 | 1914 | boolean linker ATTRIBUTE_UNUSED; |
252b5132 RH |
1915 | { |
1916 | unsigned long val; | |
1917 | ||
1918 | switch (bfd_get_mach (abfd)) | |
1919 | { | |
1920 | default: | |
1921 | case bfd_mach_m32r: val = E_M32R_ARCH; break; | |
e916b64e | 1922 | case bfd_mach_m32rx: val = E_M32RX_ARCH; break; |
252b5132 RH |
1923 | } |
1924 | ||
1925 | elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH; | |
1926 | elf_elfheader (abfd)->e_flags |= val; | |
1927 | } | |
1928 | ||
c3668558 | 1929 | /* Function to keep M32R specific file flags. */ |
252b5132 RH |
1930 | static boolean |
1931 | m32r_elf_set_private_flags (abfd, flags) | |
1932 | bfd * abfd; | |
1933 | flagword flags; | |
1934 | { | |
1935 | BFD_ASSERT (!elf_flags_init (abfd) | |
1936 | || elf_elfheader (abfd)->e_flags == flags); | |
1937 | ||
1938 | elf_elfheader (abfd)->e_flags = flags; | |
1939 | elf_flags_init (abfd) = true; | |
1940 | return true; | |
1941 | } | |
1942 | ||
1943 | /* Copy backend specific data from one object module to another */ | |
1944 | static boolean | |
1945 | m32r_elf_copy_private_bfd_data (ibfd, obfd) | |
1946 | bfd * ibfd; | |
1947 | bfd * obfd; | |
1948 | { | |
1949 | if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
1950 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
1951 | return true; | |
1952 | ||
1953 | BFD_ASSERT (!elf_flags_init (obfd) | |
1954 | || (elf_elfheader (obfd)->e_flags | |
1955 | == elf_elfheader (ibfd)->e_flags)); | |
1956 | ||
1957 | elf_gp (obfd) = elf_gp (ibfd); | |
1958 | elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags; | |
1959 | elf_flags_init (obfd) = true; | |
1960 | return true; | |
1961 | } | |
1962 | ||
1963 | /* Merge backend specific data from an object file to the output | |
1964 | object file when linking. */ | |
1965 | static boolean | |
1966 | m32r_elf_merge_private_bfd_data (ibfd, obfd) | |
1967 | bfd * ibfd; | |
1968 | bfd * obfd; | |
1969 | { | |
1970 | flagword out_flags; | |
1971 | flagword in_flags; | |
1972 | ||
1973 | if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
1974 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
1975 | return true; | |
1976 | ||
1977 | in_flags = elf_elfheader (ibfd)->e_flags; | |
1978 | out_flags = elf_elfheader (obfd)->e_flags; | |
1979 | ||
1980 | if (! elf_flags_init (obfd)) | |
1981 | { | |
1982 | /* If the input is the default architecture then do not | |
1983 | bother setting the flags for the output architecture, | |
1984 | instead allow future merges to do this. If no future | |
1985 | merges ever set these flags then they will retain their | |
1986 | unitialised values, which surprise surprise, correspond | |
1987 | to the default values. */ | |
1988 | if (bfd_get_arch_info (ibfd)->the_default) | |
1989 | return true; | |
c3668558 | 1990 | |
252b5132 RH |
1991 | elf_flags_init (obfd) = true; |
1992 | elf_elfheader (obfd)->e_flags = in_flags; | |
1993 | ||
1994 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
1995 | && bfd_get_arch_info (obfd)->the_default) | |
1996 | { | |
1997 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
1998 | } | |
1999 | ||
2000 | return true; | |
2001 | } | |
2002 | ||
2003 | /* Check flag compatibility. */ | |
2004 | if (in_flags == out_flags) | |
2005 | return true; | |
2006 | ||
2007 | if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH)) | |
2008 | { | |
2009 | if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH) | |
2010 | { | |
2011 | _bfd_error_handler (_("%s: Instruction set mismatch with previous modules"), | |
2012 | bfd_get_filename (ibfd)); | |
2013 | ||
2014 | bfd_set_error (bfd_error_bad_value); | |
2015 | return false; | |
2016 | } | |
2017 | } | |
2018 | ||
2019 | return true; | |
2020 | } | |
2021 | ||
2022 | /* Display the flags field */ | |
2023 | static boolean | |
2024 | m32r_elf_print_private_bfd_data (abfd, ptr) | |
2025 | bfd * abfd; | |
2026 | PTR ptr; | |
2027 | { | |
2028 | FILE * file = (FILE *) ptr; | |
c3668558 | 2029 | |
252b5132 | 2030 | BFD_ASSERT (abfd != NULL && ptr != NULL) |
c3668558 | 2031 | |
252b5132 | 2032 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
c3668558 | 2033 | |
252b5132 | 2034 | fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags); |
c3668558 | 2035 | |
252b5132 RH |
2036 | switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH) |
2037 | { | |
2038 | default: | |
2039 | case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break; | |
e916b64e | 2040 | case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break; |
252b5132 | 2041 | } |
c3668558 | 2042 | |
252b5132 | 2043 | fputc ('\n', file); |
c3668558 | 2044 | |
252b5132 RH |
2045 | return true; |
2046 | } | |
2047 | ||
2048 | asection * | |
2049 | m32r_elf_gc_mark_hook (abfd, info, rel, h, sym) | |
2050 | bfd *abfd; | |
5f771d47 | 2051 | struct bfd_link_info *info ATTRIBUTE_UNUSED; |
252b5132 RH |
2052 | Elf_Internal_Rela *rel; |
2053 | struct elf_link_hash_entry *h; | |
2054 | Elf_Internal_Sym *sym; | |
2055 | { | |
2056 | if (h != NULL) | |
2057 | { | |
2058 | switch (ELF32_R_TYPE (rel->r_info)) | |
2059 | { | |
2060 | case R_M32R_GNU_VTINHERIT: | |
2061 | case R_M32R_GNU_VTENTRY: | |
2062 | break; | |
c3668558 | 2063 | |
252b5132 RH |
2064 | default: |
2065 | switch (h->root.type) | |
2066 | { | |
2067 | case bfd_link_hash_defined: | |
2068 | case bfd_link_hash_defweak: | |
2069 | return h->root.u.def.section; | |
c3668558 | 2070 | |
252b5132 RH |
2071 | case bfd_link_hash_common: |
2072 | return h->root.u.c.p->section; | |
e049a0de ILT |
2073 | |
2074 | default: | |
2075 | break; | |
252b5132 RH |
2076 | } |
2077 | } | |
2078 | } | |
2079 | else | |
2080 | { | |
2081 | if (!(elf_bad_symtab (abfd) | |
2082 | && ELF_ST_BIND (sym->st_info) != STB_LOCAL) | |
2083 | && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE) | |
2084 | && sym->st_shndx != SHN_COMMON)) | |
2085 | { | |
2086 | return bfd_section_from_elf_index (abfd, sym->st_shndx); | |
2087 | } | |
2088 | } | |
2089 | return NULL; | |
2090 | } | |
2091 | ||
2092 | static boolean | |
2093 | m32r_elf_gc_sweep_hook (abfd, info, sec, relocs) | |
5f771d47 ILT |
2094 | bfd *abfd ATTRIBUTE_UNUSED; |
2095 | struct bfd_link_info *info ATTRIBUTE_UNUSED; | |
2096 | asection *sec ATTRIBUTE_UNUSED; | |
2097 | const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED; | |
252b5132 RH |
2098 | { |
2099 | /* we don't use got and plt entries for m32r */ | |
2100 | return true; | |
2101 | } | |
2102 | ||
252b5132 RH |
2103 | /* Look through the relocs for a section during the first phase. |
2104 | Since we don't do .gots or .plts, we just need to consider the | |
2105 | virtual table relocs for gc. */ | |
c3668558 | 2106 | |
252b5132 RH |
2107 | static boolean |
2108 | m32r_elf_check_relocs (abfd, info, sec, relocs) | |
2109 | bfd *abfd; | |
2110 | struct bfd_link_info *info; | |
2111 | asection *sec; | |
2112 | const Elf_Internal_Rela *relocs; | |
2113 | { | |
2114 | Elf_Internal_Shdr *symtab_hdr; | |
2115 | struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; | |
2116 | const Elf_Internal_Rela *rel; | |
2117 | const Elf_Internal_Rela *rel_end; | |
c3668558 | 2118 | |
252b5132 RH |
2119 | if (info->relocateable) |
2120 | return true; | |
c3668558 | 2121 | |
252b5132 RH |
2122 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
2123 | sym_hashes = elf_sym_hashes (abfd); | |
c3668558 | 2124 | sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym); |
252b5132 RH |
2125 | if (!elf_bad_symtab (abfd)) |
2126 | sym_hashes_end -= symtab_hdr->sh_info; | |
c3668558 | 2127 | |
252b5132 RH |
2128 | rel_end = relocs + sec->reloc_count; |
2129 | for (rel = relocs; rel < rel_end; rel++) | |
2130 | { | |
2131 | struct elf_link_hash_entry *h; | |
2132 | unsigned long r_symndx; | |
c3668558 | 2133 | |
252b5132 RH |
2134 | r_symndx = ELF32_R_SYM (rel->r_info); |
2135 | if (r_symndx < symtab_hdr->sh_info) | |
2136 | h = NULL; | |
2137 | else | |
2138 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
c3668558 | 2139 | |
252b5132 RH |
2140 | switch (ELF32_R_TYPE (rel->r_info)) |
2141 | { | |
2142 | /* This relocation describes the C++ object vtable hierarchy. | |
2143 | Reconstruct it for later use during GC. */ | |
2144 | case R_M32R_GNU_VTINHERIT: | |
2145 | if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
2146 | return false; | |
2147 | break; | |
c3668558 | 2148 | |
252b5132 RH |
2149 | /* This relocation describes which C++ vtable entries are actually |
2150 | used. Record for later use during GC. */ | |
2151 | case R_M32R_GNU_VTENTRY: | |
2152 | if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
2153 | return false; | |
2154 | break; | |
2155 | } | |
2156 | } | |
c3668558 | 2157 | |
252b5132 RH |
2158 | return true; |
2159 | } | |
252b5132 | 2160 | \f |
252b5132 RH |
2161 | #define ELF_ARCH bfd_arch_m32r |
2162 | #define ELF_MACHINE_CODE EM_CYGNUS_M32R | |
e916b64e | 2163 | #define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */ |
252b5132 RH |
2164 | |
2165 | #define TARGET_BIG_SYM bfd_elf32_m32r_vec | |
2166 | #define TARGET_BIG_NAME "elf32-m32r" | |
2167 | ||
2168 | #define elf_info_to_howto 0 | |
2169 | #define elf_info_to_howto_rel m32r_info_to_howto_rel | |
2170 | #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section | |
2171 | #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing | |
2172 | #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook | |
2173 | #define elf_backend_relocate_section m32r_elf_relocate_section | |
2174 | #define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook | |
2175 | #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook | |
2176 | #define elf_backend_check_relocs m32r_elf_check_relocs | |
2177 | ||
2178 | #define elf_backend_can_gc_sections 1 | |
2179 | #if 0 /* not yet */ | |
2180 | /* relax support */ | |
2181 | #define bfd_elf32_bfd_relax_section m32r_elf_relax_section | |
2182 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
2183 | m32r_elf_get_relocated_section_contents | |
2184 | #endif | |
2185 | ||
2186 | #define elf_backend_object_p m32r_elf_object_p | |
2187 | #define elf_backend_final_write_processing m32r_elf_final_write_processing | |
2188 | #define bfd_elf32_bfd_copy_private_bfd_data m32r_elf_copy_private_bfd_data | |
2189 | #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data | |
2190 | #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags | |
2191 | #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data | |
c3668558 | 2192 | |
252b5132 | 2193 | #include "elf32-target.h" |