Commit | Line | Data |
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1d5c6cfd | 1 | /* M32R-specific support for 32-bit ELF. |
5872728a | 2 | Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
1d5c6cfd DE |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #include "bfd.h" | |
21 | #include "sysdep.h" | |
22 | #include "libbfd.h" | |
23 | #include "elf-bfd.h" | |
24 | #include "elf/m32r.h" | |
25 | ||
26 | static bfd_reloc_status_type m32r_elf_10_pcrel_reloc | |
27 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
a5fdb816 NC |
28 | static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc |
29 | PARAMS ((bfd *, reloc_howto_type *, asection *, | |
30 | bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma)); | |
31 | static bfd_reloc_status_type m32r_elf_hi16_reloc | |
32 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
33 | static void m32r_elf_relocate_hi16 | |
34 | PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, | |
35 | bfd_byte *, bfd_vma)); | |
36 | bfd_reloc_status_type m32r_elf_lo16_reloc | |
37 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
38 | static bfd_reloc_status_type m32r_elf_sda16_reloc | |
1d5c6cfd DE |
39 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); |
40 | static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup | |
41 | PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); | |
42 | static void m32r_info_to_howto_rel | |
43 | PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *)); | |
a5fdb816 NC |
44 | boolean _bfd_m32r_elf_section_from_bfd_section |
45 | PARAMS ((bfd *, Elf32_Internal_Shdr *, asection *, int *)); | |
46 | void _bfd_m32r_elf_symbol_processing | |
47 | PARAMS ((bfd *, asymbol *)); | |
48 | static boolean m32r_elf_add_symbol_hook | |
49 | PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *, | |
50 | const char **, flagword *, asection **, bfd_vma *)); | |
51 | static boolean m32r_elf_relocate_section | |
52 | PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, | |
53 | Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); | |
54 | #if 0 /* not yet */ | |
55 | static boolean m32r_elf_relax_delete_bytes | |
56 | PARAMS ((bfd *, asection *, bfd_vma, int)); | |
57 | #endif | |
1d5c6cfd | 58 | |
5872728a NC |
59 | #define NOP_INSN 0x7000 |
60 | #define MAKE_PARALLEL(insn) ((insn) | 0x8000) | |
61 | ||
a5fdb816 NC |
62 | /* Use REL instead of RELA to save space. |
63 | This only saves space in libraries and object files, but perhaps | |
64 | relocs will be put in ROM? All in all though, REL relocs are a pain | |
65 | to work with. */ | |
1d5c6cfd DE |
66 | #define USE_REL |
67 | ||
a5fdb816 | 68 | static reloc_howto_type m32r_elf_howto_table[] = |
1d5c6cfd DE |
69 | { |
70 | /* This reloc does nothing. */ | |
71 | HOWTO (R_M32R_NONE, /* type */ | |
72 | 0, /* rightshift */ | |
73 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
74 | 32, /* bitsize */ | |
75 | false, /* pc_relative */ | |
76 | 0, /* bitpos */ | |
77 | complain_overflow_bitfield, /* complain_on_overflow */ | |
78 | bfd_elf_generic_reloc, /* special_function */ | |
79 | "R_M32R_NONE", /* name */ | |
80 | false, /* partial_inplace */ | |
81 | 0, /* src_mask */ | |
82 | 0, /* dst_mask */ | |
83 | false), /* pcrel_offset */ | |
84 | ||
85 | /* A 16 bit absolute relocation. */ | |
86 | HOWTO (R_M32R_16, /* type */ | |
87 | 0, /* rightshift */ | |
88 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
89 | 16, /* bitsize */ | |
90 | false, /* pc_relative */ | |
91 | 0, /* bitpos */ | |
92 | complain_overflow_bitfield, /* complain_on_overflow */ | |
93 | bfd_elf_generic_reloc, /* special_function */ | |
94 | "R_M32R_16", /* name */ | |
b9c5ee68 | 95 | true, /* partial_inplace */ |
1d5c6cfd DE |
96 | 0xffff, /* src_mask */ |
97 | 0xffff, /* dst_mask */ | |
98 | false), /* pcrel_offset */ | |
99 | ||
100 | /* A 32 bit absolute relocation. */ | |
101 | HOWTO (R_M32R_32, /* type */ | |
102 | 0, /* rightshift */ | |
103 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
104 | 32, /* bitsize */ | |
105 | false, /* pc_relative */ | |
106 | 0, /* bitpos */ | |
107 | complain_overflow_bitfield, /* complain_on_overflow */ | |
108 | bfd_elf_generic_reloc, /* special_function */ | |
109 | "R_M32R_32", /* name */ | |
b9c5ee68 | 110 | true, /* partial_inplace */ |
1d5c6cfd DE |
111 | 0xffffffff, /* src_mask */ |
112 | 0xffffffff, /* dst_mask */ | |
113 | false), /* pcrel_offset */ | |
114 | ||
115 | /* A 24 bit address. */ | |
116 | HOWTO (R_M32R_24, /* type */ | |
117 | 0, /* rightshift */ | |
118 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
119 | 24, /* bitsize */ | |
120 | false, /* pc_relative */ | |
121 | 0, /* bitpos */ | |
122 | complain_overflow_unsigned, /* complain_on_overflow */ | |
123 | bfd_elf_generic_reloc, /* special_function */ | |
124 | "R_M32R_24", /* name */ | |
b9c5ee68 | 125 | true, /* partial_inplace */ |
1d5c6cfd DE |
126 | 0xffffff, /* src_mask */ |
127 | 0xffffff, /* dst_mask */ | |
128 | false), /* pcrel_offset */ | |
129 | ||
130 | /* An PC Relative 10-bit relocation, shifted by 2. | |
131 | This reloc is complicated because relocations are relative to pc & -4. | |
132 | i.e. branches in the right insn slot use the address of the left insn | |
133 | slot for pc. */ | |
a5fdb816 NC |
134 | /* ??? It's not clear whether this should have partial_inplace set or not. |
135 | Branch relaxing in the assembler can store the addend in the insn, | |
136 | and if bfd_install_relocation gets called the addend may get added | |
137 | again. */ | |
1d5c6cfd DE |
138 | HOWTO (R_M32R_10_PCREL, /* type */ |
139 | 2, /* rightshift */ | |
140 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
141 | 10, /* bitsize */ | |
142 | true, /* pc_relative */ | |
143 | 0, /* bitpos */ | |
144 | complain_overflow_signed, /* complain_on_overflow */ | |
145 | m32r_elf_10_pcrel_reloc, /* special_function */ | |
146 | "R_M32R_10_PCREL", /* name */ | |
147 | false, /* partial_inplace */ | |
148 | 0xff, /* src_mask */ | |
149 | 0xff, /* dst_mask */ | |
150 | true), /* pcrel_offset */ | |
151 | ||
152 | /* A relative 18 bit relocation, right shifted by 2. */ | |
153 | HOWTO (R_M32R_18_PCREL, /* type */ | |
154 | 2, /* rightshift */ | |
155 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
156 | 18, /* bitsize */ | |
157 | true, /* pc_relative */ | |
158 | 0, /* bitpos */ | |
159 | complain_overflow_signed, /* complain_on_overflow */ | |
160 | bfd_elf_generic_reloc, /* special_function */ | |
161 | "R_M32R_18_PCREL", /* name */ | |
162 | false, /* partial_inplace */ | |
163 | 0xffff, /* src_mask */ | |
164 | 0xffff, /* dst_mask */ | |
165 | true), /* pcrel_offset */ | |
166 | ||
167 | /* A relative 26 bit relocation, right shifted by 2. */ | |
a5fdb816 NC |
168 | /* ??? It's not clear whether this should have partial_inplace set or not. |
169 | Branch relaxing in the assembler can store the addend in the insn, | |
170 | and if bfd_install_relocation gets called the addend may get added | |
171 | again. */ | |
1d5c6cfd DE |
172 | HOWTO (R_M32R_26_PCREL, /* type */ |
173 | 2, /* rightshift */ | |
174 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
175 | 26, /* bitsize */ | |
176 | true, /* pc_relative */ | |
177 | 0, /* bitpos */ | |
178 | complain_overflow_signed, /* complain_on_overflow */ | |
179 | bfd_elf_generic_reloc, /* special_function */ | |
180 | "R_M32R_26_PCREL", /* name */ | |
181 | false, /* partial_inplace */ | |
182 | 0xffffff, /* src_mask */ | |
183 | 0xffffff, /* dst_mask */ | |
184 | true), /* pcrel_offset */ | |
185 | ||
186 | /* High 16 bits of address when lower 16 is or'd in. */ | |
187 | HOWTO (R_M32R_HI16_ULO, /* type */ | |
188 | 16, /* rightshift */ | |
189 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
190 | 16, /* bitsize */ | |
191 | false, /* pc_relative */ | |
192 | 0, /* bitpos */ | |
193 | complain_overflow_dont, /* complain_on_overflow */ | |
a5fdb816 | 194 | m32r_elf_hi16_reloc, /* special_function */ |
1d5c6cfd | 195 | "R_M32R_HI16_ULO", /* name */ |
b9c5ee68 | 196 | true, /* partial_inplace */ |
1d5c6cfd DE |
197 | 0x0000ffff, /* src_mask */ |
198 | 0x0000ffff, /* dst_mask */ | |
199 | false), /* pcrel_offset */ | |
200 | ||
201 | /* High 16 bits of address when lower 16 is added in. */ | |
202 | HOWTO (R_M32R_HI16_SLO, /* type */ | |
203 | 16, /* rightshift */ | |
204 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
205 | 16, /* bitsize */ | |
206 | false, /* pc_relative */ | |
207 | 0, /* bitpos */ | |
208 | complain_overflow_dont, /* complain_on_overflow */ | |
a5fdb816 | 209 | m32r_elf_hi16_reloc, /* special_function */ |
1d5c6cfd | 210 | "R_M32R_HI16_SLO", /* name */ |
b9c5ee68 | 211 | true, /* partial_inplace */ |
1d5c6cfd DE |
212 | 0x0000ffff, /* src_mask */ |
213 | 0x0000ffff, /* dst_mask */ | |
214 | false), /* pcrel_offset */ | |
215 | ||
216 | /* Lower 16 bits of address. */ | |
217 | HOWTO (R_M32R_LO16, /* type */ | |
218 | 0, /* rightshift */ | |
219 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
220 | 16, /* bitsize */ | |
221 | false, /* pc_relative */ | |
222 | 0, /* bitpos */ | |
223 | complain_overflow_dont, /* complain_on_overflow */ | |
a5fdb816 | 224 | m32r_elf_lo16_reloc, /* special_function */ |
1d5c6cfd | 225 | "R_M32R_LO16", /* name */ |
b9c5ee68 | 226 | true, /* partial_inplace */ |
1d5c6cfd DE |
227 | 0x0000ffff, /* src_mask */ |
228 | 0x0000ffff, /* dst_mask */ | |
229 | false), /* pcrel_offset */ | |
1d5c6cfd | 230 | |
a5fdb816 NC |
231 | /* Small data area 16 bits offset. */ |
232 | HOWTO (R_M32R_SDA16, /* type */ | |
233 | 0, /* rightshift */ | |
234 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
235 | 16, /* bitsize */ | |
236 | false, /* pc_relative */ | |
237 | 0, /* bitpos */ | |
238 | complain_overflow_signed, /* complain_on_overflow */ | |
239 | m32r_elf_sda16_reloc, /* special_function */ | |
240 | "R_M32R_SDA16", /* name */ | |
241 | true, /* partial_inplace */ /* FIXME: correct? */ | |
242 | 0x0000ffff, /* src_mask */ | |
243 | 0x0000ffff, /* dst_mask */ | |
244 | false), /* pcrel_offset */ | |
245 | }; | |
246 | \f | |
1d5c6cfd DE |
247 | /* Handle the R_M32R_10_PCREL reloc. */ |
248 | ||
249 | static bfd_reloc_status_type | |
250 | m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data, | |
251 | input_section, output_bfd, error_message) | |
5872728a NC |
252 | bfd * abfd; |
253 | arelent * reloc_entry; | |
254 | asymbol * symbol; | |
1d5c6cfd | 255 | PTR data; |
5872728a NC |
256 | asection * input_section; |
257 | bfd * output_bfd; | |
258 | char ** error_message; | |
1d5c6cfd | 259 | { |
a5fdb816 | 260 | /* This part is from bfd_elf_generic_reloc. */ |
1d5c6cfd DE |
261 | if (output_bfd != (bfd *) NULL |
262 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
263 | && (! reloc_entry->howto->partial_inplace | |
264 | || reloc_entry->addend == 0)) | |
265 | { | |
266 | reloc_entry->address += input_section->output_offset; | |
267 | return bfd_reloc_ok; | |
268 | } | |
269 | ||
270 | if (output_bfd != NULL) | |
271 | { | |
272 | /* FIXME: See bfd_perform_relocation. Is this right? */ | |
273 | return bfd_reloc_continue; | |
274 | } | |
275 | ||
a5fdb816 NC |
276 | return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto, |
277 | input_section, | |
278 | data, reloc_entry->address, | |
279 | symbol->section, | |
280 | (symbol->value | |
281 | + symbol->section->output_section->vma | |
282 | + symbol->section->output_offset), | |
283 | reloc_entry->addend); | |
284 | } | |
1d5c6cfd | 285 | |
a5fdb816 NC |
286 | /* Utility to actually perform an R_M32R_10_PCREL reloc. */ |
287 | ||
288 | static bfd_reloc_status_type | |
289 | m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset, | |
290 | symbol_section, symbol_value, addend) | |
291 | bfd *abfd; | |
292 | reloc_howto_type *howto; | |
293 | asection *input_section; | |
294 | bfd_byte *data; | |
295 | bfd_vma offset; | |
296 | asection *symbol_section; | |
297 | bfd_vma symbol_value; | |
298 | bfd_vma addend; | |
299 | { | |
300 | bfd_signed_vma relocation; | |
301 | unsigned long x; | |
302 | bfd_reloc_status_type status; | |
303 | ||
304 | /* Sanity check the address (offset in section). */ | |
305 | if (offset > input_section->_cooked_size) | |
1d5c6cfd DE |
306 | return bfd_reloc_outofrange; |
307 | ||
a5fdb816 NC |
308 | relocation = symbol_value + addend; |
309 | /* Make it pc relative. */ | |
1d5c6cfd DE |
310 | relocation -= (input_section->output_section->vma |
311 | + input_section->output_offset); | |
a5fdb816 NC |
312 | /* These jumps mask off the lower two bits of the current address |
313 | before doing pcrel calculations. */ | |
314 | relocation -= (offset & -4L); | |
1d5c6cfd | 315 | |
a5fdb816 NC |
316 | if (relocation < -0x200 || relocation > 0x1ff) |
317 | status = bfd_reloc_overflow; | |
318 | else | |
319 | status = bfd_reloc_ok; | |
320 | ||
321 | x = bfd_get_16 (abfd, data + offset); | |
1d5c6cfd DE |
322 | relocation >>= howto->rightshift; |
323 | relocation <<= howto->bitpos; | |
324 | x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask); | |
a5fdb816 | 325 | bfd_put_16 (abfd, x, data + offset); |
1d5c6cfd | 326 | |
a5fdb816 | 327 | return status; |
1d5c6cfd DE |
328 | } |
329 | ||
a5fdb816 NC |
330 | /* Handle the R_M32R_HI16_[SU]LO relocs. |
331 | HI16_SLO is for the add3 and load/store with displacement instructions. | |
332 | HI16_ULO is for the or3 instruction. | |
333 | For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to | |
334 | the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then | |
335 | we must add one to the high 16 bytes (which will get subtracted off when | |
336 | the low 16 bits are added). | |
337 | These relocs have to be done in combination with an R_M32R_LO16 reloc | |
338 | because there is a carry from the LO16 to the HI16. Here we just save | |
339 | the information we need; we do the actual relocation when we see the LO16. | |
340 | This code is copied from the elf32-mips.c. We also support an arbitrary | |
341 | number of HI16 relocs to be associated with a single LO16 reloc. The | |
342 | assembler sorts the relocs to ensure each HI16 immediately precedes its | |
343 | LO16. However if there are multiple copies, the assembler may not find | |
344 | the real LO16 so it picks the first one it finds. */ | |
345 | ||
346 | struct m32r_hi16 | |
347 | { | |
348 | struct m32r_hi16 *next; | |
349 | bfd_byte *addr; | |
350 | bfd_vma addend; | |
351 | }; | |
352 | ||
353 | /* FIXME: This should not be a static variable. */ | |
354 | ||
355 | static struct m32r_hi16 *m32r_hi16_list; | |
1d5c6cfd DE |
356 | |
357 | static bfd_reloc_status_type | |
a5fdb816 NC |
358 | m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data, |
359 | input_section, output_bfd, error_message) | |
1d5c6cfd DE |
360 | bfd *abfd; |
361 | arelent *reloc_entry; | |
362 | asymbol *symbol; | |
363 | PTR data; | |
364 | asection *input_section; | |
365 | bfd *output_bfd; | |
366 | char **error_message; | |
367 | { | |
a5fdb816 | 368 | bfd_reloc_status_type ret; |
1d5c6cfd | 369 | bfd_vma relocation; |
a5fdb816 NC |
370 | struct m32r_hi16 *n; |
371 | ||
372 | /* This part is from bfd_elf_generic_reloc. | |
373 | If we're relocating, and this an external symbol, we don't want | |
374 | to change anything. */ | |
375 | if (output_bfd != (bfd *) NULL | |
376 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
377 | && reloc_entry->addend == 0) | |
378 | { | |
379 | reloc_entry->address += input_section->output_offset; | |
380 | return bfd_reloc_ok; | |
381 | } | |
382 | ||
383 | /* Sanity check the address (offset in section). */ | |
384 | if (reloc_entry->address > input_section->_cooked_size) | |
385 | return bfd_reloc_outofrange; | |
386 | ||
387 | ret = bfd_reloc_ok; | |
388 | if (bfd_is_und_section (symbol->section) | |
389 | && output_bfd == (bfd *) NULL) | |
390 | ret = bfd_reloc_undefined; | |
391 | ||
392 | if (bfd_is_com_section (symbol->section)) | |
393 | relocation = 0; | |
394 | else | |
395 | relocation = symbol->value; | |
396 | ||
397 | relocation += symbol->section->output_section->vma; | |
398 | relocation += symbol->section->output_offset; | |
399 | relocation += reloc_entry->addend; | |
400 | ||
401 | /* Save the information, and let LO16 do the actual relocation. */ | |
402 | n = (struct m32r_hi16 *) bfd_malloc (sizeof *n); | |
403 | if (n == NULL) | |
404 | return bfd_reloc_outofrange; | |
405 | n->addr = (bfd_byte *) data + reloc_entry->address; | |
406 | n->addend = relocation; | |
407 | n->next = m32r_hi16_list; | |
408 | m32r_hi16_list = n; | |
409 | ||
410 | if (output_bfd != (bfd *) NULL) | |
411 | reloc_entry->address += input_section->output_offset; | |
412 | ||
413 | return ret; | |
414 | } | |
415 | ||
416 | /* Handle an M32R ELF HI16 reloc. */ | |
417 | ||
418 | static void | |
419 | m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend) | |
420 | bfd *input_bfd; | |
421 | int type; | |
422 | Elf_Internal_Rela *relhi; | |
423 | Elf_Internal_Rela *rello; | |
424 | bfd_byte *contents; | |
425 | bfd_vma addend; | |
426 | { | |
427 | unsigned long insn; | |
428 | bfd_vma addlo; | |
429 | ||
430 | insn = bfd_get_32 (input_bfd, contents + relhi->r_offset); | |
431 | ||
432 | addlo = bfd_get_32 (input_bfd, contents + rello->r_offset); | |
433 | if (type == R_M32R_HI16_SLO) | |
434 | addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000; | |
435 | else | |
436 | addlo &= 0xffff; | |
437 | ||
438 | addend += ((insn & 0xffff) << 16) + addlo; | |
439 | ||
440 | /* Reaccount for sign extension of low part. */ | |
441 | if (type == R_M32R_HI16_SLO | |
442 | && (addend & 0x8000) != 0) | |
443 | addend += 0x10000; | |
444 | ||
445 | bfd_put_32 (input_bfd, | |
446 | (insn & 0xffff0000) | ((addend >> 16) & 0xffff), | |
447 | contents + relhi->r_offset); | |
448 | } | |
449 | ||
450 | /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit | |
451 | inplace relocation; this function exists in order to do the | |
452 | R_M32R_HI16_[SU]LO relocation described above. */ | |
453 | ||
454 | bfd_reloc_status_type | |
455 | m32r_elf_lo16_reloc (abfd, reloc_entry, symbol, data, | |
456 | input_section, output_bfd, error_message) | |
457 | bfd *abfd; | |
458 | arelent *reloc_entry; | |
459 | asymbol *symbol; | |
460 | PTR data; | |
461 | asection *input_section; | |
462 | bfd *output_bfd; | |
463 | char **error_message; | |
464 | { | |
465 | if (m32r_hi16_list != NULL) | |
466 | { | |
467 | struct m32r_hi16 *l; | |
468 | ||
469 | l = m32r_hi16_list; | |
470 | while (l != NULL) | |
471 | { | |
472 | unsigned long insn; | |
473 | unsigned long val; | |
474 | unsigned long vallo; | |
475 | struct m32r_hi16 *next; | |
476 | ||
477 | /* Do the HI16 relocation. Note that we actually don't need | |
478 | to know anything about the LO16 itself, except where to | |
479 | find the low 16 bits of the addend needed by the LO16. */ | |
480 | insn = bfd_get_32 (abfd, l->addr); | |
481 | vallo = ((bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address) | |
482 | & 0xffff) ^ 0x8000) - 0x8000; | |
483 | val = ((insn & 0xffff) << 16) + vallo; | |
484 | val += l->addend; | |
485 | ||
486 | /* Reaccount for sign extension of low part. */ | |
487 | if ((val & 0x8000) != 0) | |
488 | val += 0x10000; | |
489 | ||
490 | insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); | |
491 | bfd_put_32 (abfd, insn, l->addr); | |
492 | ||
493 | next = l->next; | |
494 | free (l); | |
495 | l = next; | |
496 | } | |
497 | ||
498 | m32r_hi16_list = NULL; | |
499 | } | |
500 | ||
501 | /* Now do the LO16 reloc in the usual way. */ | |
502 | return bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data, | |
503 | input_section, output_bfd, error_message); | |
504 | } | |
505 | ||
506 | /* Handle the R_M32R_SDA16 reloc. | |
507 | This reloc is used to compute the address of objects in the small data area | |
508 | and to perform loads and stores from that area. | |
509 | The lower 16 bits are sign extended and added to the register specified | |
510 | in the instruction, which is assumed to point to _SDA_BASE_. */ | |
511 | ||
512 | static bfd_reloc_status_type | |
513 | m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data, | |
514 | input_section, output_bfd, error_message) | |
515 | bfd *abfd; | |
516 | arelent *reloc_entry; | |
517 | asymbol *symbol; | |
518 | PTR data; | |
519 | asection *input_section; | |
520 | bfd *output_bfd; | |
521 | char **error_message; | |
522 | { | |
a5fdb816 | 523 | /* This part is from bfd_elf_generic_reloc. */ |
1d5c6cfd DE |
524 | if (output_bfd != (bfd *) NULL |
525 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
526 | && (! reloc_entry->howto->partial_inplace | |
527 | || reloc_entry->addend == 0)) | |
528 | { | |
529 | reloc_entry->address += input_section->output_offset; | |
530 | return bfd_reloc_ok; | |
531 | } | |
532 | ||
533 | if (output_bfd != NULL) | |
534 | { | |
535 | /* FIXME: See bfd_perform_relocation. Is this right? */ | |
536 | return bfd_reloc_continue; | |
537 | } | |
538 | ||
a5fdb816 NC |
539 | /* FIXME: not sure what to do here yet. But then again, the linker |
540 | may never call us. */ | |
541 | abort (); | |
1d5c6cfd | 542 | } |
a5fdb816 | 543 | \f |
1d5c6cfd DE |
544 | /* Map BFD reloc types to M32R ELF reloc types. */ |
545 | ||
546 | struct m32r_reloc_map | |
547 | { | |
548 | unsigned char bfd_reloc_val; | |
549 | unsigned char elf_reloc_val; | |
550 | }; | |
551 | ||
552 | static const struct m32r_reloc_map m32r_reloc_map[] = | |
553 | { | |
554 | { BFD_RELOC_NONE, R_M32R_NONE }, | |
555 | { BFD_RELOC_16, R_M32R_16 }, | |
556 | { BFD_RELOC_32, R_M32R_32 }, | |
557 | { BFD_RELOC_M32R_24, R_M32R_24 }, | |
558 | { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL }, | |
559 | { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL }, | |
560 | { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL }, | |
561 | { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO }, | |
562 | { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO }, | |
563 | { BFD_RELOC_M32R_LO16, R_M32R_LO16 }, | |
a5fdb816 | 564 | { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 }, |
1d5c6cfd DE |
565 | }; |
566 | ||
567 | static reloc_howto_type * | |
568 | bfd_elf32_bfd_reloc_type_lookup (abfd, code) | |
569 | bfd *abfd; | |
570 | bfd_reloc_code_real_type code; | |
571 | { | |
572 | unsigned int i; | |
573 | ||
574 | for (i = 0; | |
575 | i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map); | |
576 | i++) | |
577 | { | |
578 | if (m32r_reloc_map[i].bfd_reloc_val == code) | |
a5fdb816 | 579 | return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val]; |
1d5c6cfd DE |
580 | } |
581 | ||
582 | return NULL; | |
583 | } | |
584 | ||
585 | /* Set the howto pointer for an M32R ELF reloc. */ | |
586 | ||
587 | static void | |
588 | m32r_info_to_howto_rel (abfd, cache_ptr, dst) | |
589 | bfd *abfd; | |
590 | arelent *cache_ptr; | |
591 | Elf32_Internal_Rel *dst; | |
592 | { | |
593 | unsigned int r_type; | |
594 | ||
595 | r_type = ELF32_R_TYPE (dst->r_info); | |
596 | BFD_ASSERT (r_type < (unsigned int) R_M32R_max); | |
a5fdb816 NC |
597 | cache_ptr->howto = &m32r_elf_howto_table[r_type]; |
598 | } | |
599 | \f | |
600 | /* Given a BFD section, try to locate the corresponding ELF section | |
601 | index. */ | |
602 | ||
603 | boolean | |
604 | _bfd_m32r_elf_section_from_bfd_section (abfd, hdr, sec, retval) | |
605 | bfd *abfd; | |
606 | Elf32_Internal_Shdr *hdr; | |
607 | asection *sec; | |
608 | int *retval; | |
609 | { | |
610 | if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0) | |
611 | { | |
612 | *retval = SHN_M32R_SCOMMON; | |
613 | return true; | |
614 | } | |
615 | return false; | |
616 | } | |
617 | ||
618 | /* M32R ELF uses two common sections. One is the usual one, and the other | |
619 | is for small objects. All the small objects are kept together, and then | |
620 | referenced via one register, which yields faster assembler code. It is | |
621 | up to the compiler to emit an instruction to load the register with | |
622 | _SDA_BASE. This is what we use for the small common section. This | |
623 | approach is copied from elf32-mips.c. */ | |
624 | static asection m32r_elf_scom_section; | |
625 | static asymbol m32r_elf_scom_symbol; | |
626 | static asymbol *m32r_elf_scom_symbol_ptr; | |
627 | ||
628 | /* Handle the special M32R section numbers that a symbol may use. */ | |
629 | ||
630 | void | |
631 | _bfd_m32r_elf_symbol_processing (abfd, asym) | |
632 | bfd *abfd; | |
633 | asymbol *asym; | |
634 | { | |
635 | elf_symbol_type *elfsym; | |
636 | ||
637 | elfsym = (elf_symbol_type *) asym; | |
638 | ||
639 | switch (elfsym->internal_elf_sym.st_shndx) | |
640 | { | |
641 | case SHN_M32R_SCOMMON: | |
642 | if (m32r_elf_scom_section.name == NULL) | |
643 | { | |
644 | /* Initialize the small common section. */ | |
645 | m32r_elf_scom_section.name = ".scommon"; | |
646 | m32r_elf_scom_section.flags = SEC_IS_COMMON; | |
647 | m32r_elf_scom_section.output_section = &m32r_elf_scom_section; | |
648 | m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol; | |
649 | m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr; | |
650 | m32r_elf_scom_symbol.name = ".scommon"; | |
651 | m32r_elf_scom_symbol.flags = BSF_SECTION_SYM; | |
652 | m32r_elf_scom_symbol.section = &m32r_elf_scom_section; | |
653 | m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol; | |
654 | } | |
655 | asym->section = &m32r_elf_scom_section; | |
656 | asym->value = elfsym->internal_elf_sym.st_size; | |
657 | break; | |
658 | } | |
659 | } | |
660 | ||
661 | /* Hook called by the linker routine which adds symbols from an object | |
662 | file. We must handle the special M32R section numbers here. | |
663 | We also keep watching for whether we need to create the sdata special | |
664 | linker sections. */ | |
665 | ||
666 | static boolean | |
667 | m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp) | |
668 | bfd *abfd; | |
669 | struct bfd_link_info *info; | |
670 | const Elf_Internal_Sym *sym; | |
671 | const char **namep; | |
672 | flagword *flagsp; | |
673 | asection **secp; | |
674 | bfd_vma *valp; | |
675 | { | |
676 | if (! info->relocateable | |
677 | && (*namep)[0] == '_' && (*namep)[1] == 'S' | |
678 | && strcmp (*namep, "_SDA_BASE_") == 0) | |
679 | { | |
680 | /* This is simpler than using _bfd_elf_create_linker_section | |
681 | (our needs are simpler than ppc's needs). Also | |
682 | _bfd_elf_create_linker_section currently has a bug where if a .sdata | |
683 | section already exists a new one is created that follows it which | |
684 | screws of _SDA_BASE_ address calcs because output_offset != 0. */ | |
685 | struct elf_link_hash_entry *h; | |
686 | asection *s = bfd_get_section_by_name (abfd, ".sdata"); | |
687 | ||
688 | /* The following code was cobbled from elf32-ppc.c and elflink.c. */ | |
689 | ||
690 | if (s == NULL) | |
691 | { | |
692 | int flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | |
693 | | SEC_IN_MEMORY | SEC_LINKER_CREATED); | |
694 | ||
695 | s = bfd_make_section_anyway (abfd, ".sdata"); | |
696 | if (s == NULL) | |
697 | return false; | |
698 | bfd_set_section_flags (abfd, s, flags); | |
699 | bfd_set_section_alignment (abfd, s, 2); | |
700 | } | |
701 | ||
702 | h = (struct elf_link_hash_entry *) | |
703 | bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false); | |
704 | ||
705 | if ((h == NULL || h->root.type == bfd_link_hash_undefined) | |
706 | && !(_bfd_generic_link_add_one_symbol (info, | |
707 | abfd, | |
708 | "_SDA_BASE_", | |
709 | BSF_GLOBAL, | |
710 | s, | |
711 | 32768, | |
712 | (const char *) NULL, | |
713 | false, | |
714 | get_elf_backend_data (abfd)->collect, | |
715 | (struct bfd_link_hash_entry **) &h))) | |
716 | return false; | |
717 | h->type = STT_OBJECT; | |
718 | } | |
719 | ||
720 | switch (sym->st_shndx) | |
721 | { | |
722 | case SHN_M32R_SCOMMON: | |
723 | *secp = bfd_make_section_old_way (abfd, ".scommon"); | |
724 | (*secp)->flags |= SEC_IS_COMMON; | |
725 | *valp = sym->st_size; | |
726 | break; | |
727 | } | |
728 | ||
729 | return true; | |
730 | } | |
731 | ||
732 | /* We have to figure out the SDA_BASE value, so that we can adjust the | |
733 | symbol value correctly. We look up the symbol _SDA_BASE_ in the output | |
734 | BFD. If we can't find it, we're stuck. We cache it in the ELF | |
735 | target data. We don't need to adjust the symbol value for an | |
736 | external symbol if we are producing relocateable output. */ | |
737 | ||
738 | static bfd_reloc_status_type | |
739 | m32r_elf_final_sda_base (output_bfd, info, error_message, psb) | |
740 | bfd *output_bfd; | |
741 | struct bfd_link_info *info; | |
742 | const char **error_message; | |
743 | bfd_vma *psb; | |
744 | { | |
745 | if (elf_gp (output_bfd) == 0) | |
746 | { | |
747 | struct bfd_link_hash_entry *h; | |
748 | ||
749 | h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true); | |
750 | if (h != (struct bfd_link_hash_entry *) NULL | |
751 | && h->type == bfd_link_hash_defined) | |
752 | elf_gp (output_bfd) = (h->u.def.value | |
753 | + h->u.def.section->output_section->vma | |
754 | + h->u.def.section->output_offset); | |
755 | else | |
756 | { | |
757 | /* Only get the error once. */ | |
758 | *psb = elf_gp (output_bfd) = 4; | |
759 | *error_message = | |
5872728a | 760 | (const char *) _("SDA relocation when _SDA_BASE_ not defined"); |
a5fdb816 NC |
761 | return bfd_reloc_dangerous; |
762 | } | |
763 | } | |
764 | *psb = elf_gp (output_bfd); | |
765 | return bfd_reloc_ok; | |
766 | } | |
767 | \f | |
768 | /* Relocate an M32R/D ELF section. | |
769 | There is some attempt to make this function usable for many architectures, | |
770 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], | |
771 | if only to serve as a learning tool. | |
772 | ||
773 | The RELOCATE_SECTION function is called by the new ELF backend linker | |
774 | to handle the relocations for a section. | |
775 | ||
776 | The relocs are always passed as Rela structures; if the section | |
777 | actually uses Rel structures, the r_addend field will always be | |
778 | zero. | |
779 | ||
780 | This function is responsible for adjust the section contents as | |
781 | necessary, and (if using Rela relocs and generating a | |
782 | relocateable output file) adjusting the reloc addend as | |
783 | necessary. | |
784 | ||
785 | This function does not have to worry about setting the reloc | |
786 | address or the reloc symbol index. | |
787 | ||
788 | LOCAL_SYMS is a pointer to the swapped in local symbols. | |
789 | ||
790 | LOCAL_SECTIONS is an array giving the section in the input file | |
791 | corresponding to the st_shndx field of each local symbol. | |
792 | ||
793 | The global hash table entry for the global symbols can be found | |
794 | via elf_sym_hashes (input_bfd). | |
795 | ||
796 | When generating relocateable output, this function must handle | |
797 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is | |
798 | going to be the section symbol corresponding to the output | |
799 | section, which means that the addend must be adjusted | |
800 | accordingly. */ | |
801 | ||
802 | static boolean | |
803 | m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, | |
804 | contents, relocs, local_syms, local_sections) | |
805 | bfd *output_bfd; | |
806 | struct bfd_link_info *info; | |
807 | bfd *input_bfd; | |
808 | asection *input_section; | |
809 | bfd_byte *contents; | |
810 | Elf_Internal_Rela *relocs; | |
811 | Elf_Internal_Sym *local_syms; | |
812 | asection **local_sections; | |
813 | { | |
814 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
815 | struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); | |
816 | Elf_Internal_Rela *rel, *relend; | |
a5fdb816 NC |
817 | /* Assume success. */ |
818 | boolean ret = true; | |
819 | ||
820 | rel = relocs; | |
821 | relend = relocs + input_section->reloc_count; | |
822 | for (; rel < relend; rel++) | |
823 | { | |
824 | int r_type; | |
825 | reloc_howto_type *howto; | |
826 | unsigned long r_symndx; | |
827 | /* We can't modify r_addend here as elf_link_input_bfd has an assert to | |
828 | ensure it's zero (we use REL relocs, not RELA). Therefore this | |
829 | should be assigning zero to `addend', but for clarity we use | |
830 | `r_addend'. */ | |
831 | bfd_vma addend = rel->r_addend; | |
832 | bfd_vma offset = rel->r_offset; | |
833 | struct elf_link_hash_entry *h; | |
834 | Elf_Internal_Sym *sym; | |
835 | asection *sec; | |
836 | const char *sym_name; | |
837 | bfd_reloc_status_type r; | |
838 | const char *errmsg = NULL; | |
839 | ||
5872728a | 840 | h = NULL; |
a5fdb816 NC |
841 | r_type = ELF32_R_TYPE (rel->r_info); |
842 | if (r_type < 0 || r_type >= (int) R_M32R_max) | |
843 | { | |
5872728a | 844 | (*_bfd_error_handler) (_("%s: unknown relocation type %d"), |
a5fdb816 NC |
845 | bfd_get_filename (input_bfd), |
846 | (int) r_type); | |
847 | bfd_set_error (bfd_error_bad_value); | |
848 | ret = false; | |
849 | continue; | |
850 | } | |
851 | ||
852 | howto = m32r_elf_howto_table + r_type; | |
853 | r_symndx = ELF32_R_SYM (rel->r_info); | |
854 | ||
855 | if (info->relocateable) | |
856 | { | |
857 | /* This is a relocateable link. We don't have to change | |
858 | anything, unless the reloc is against a section symbol, | |
859 | in which case we have to adjust according to where the | |
860 | section symbol winds up in the output section. */ | |
861 | sec = NULL; | |
862 | if (r_symndx >= symtab_hdr->sh_info) | |
863 | { | |
864 | /* External symbol. */ | |
865 | continue; | |
866 | } | |
867 | ||
868 | /* Local symbol. */ | |
869 | sym = local_syms + r_symndx; | |
870 | sym_name = "<local symbol>"; | |
871 | /* STT_SECTION: symbol is associated with a section. */ | |
872 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) | |
873 | { | |
874 | /* Symbol isn't associated with a section. Nothing to do. */ | |
875 | continue; | |
876 | } | |
877 | ||
878 | sec = local_sections[r_symndx]; | |
879 | addend += sec->output_offset + sym->st_value; | |
880 | #ifndef USE_REL | |
881 | /* This can't be done for USE_REL because it doesn't mean anything | |
882 | and elf_link_input_bfd asserts this stays zero. */ | |
883 | rel->r_addend = addend; | |
884 | #endif | |
885 | ||
886 | #ifndef USE_REL | |
887 | /* Addends are stored with relocs. We're done. */ | |
888 | continue; | |
889 | #else /* USE_REL */ | |
890 | /* If partial_inplace, we need to store any additional addend | |
891 | back in the section. */ | |
892 | if (! howto->partial_inplace) | |
893 | continue; | |
894 | /* ??? Here is a nice place to call a special_function | |
895 | like handler. */ | |
896 | if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO) | |
897 | r = _bfd_relocate_contents (howto, input_bfd, | |
898 | addend, contents + offset); | |
899 | else | |
900 | { | |
901 | Elf_Internal_Rela *lorel; | |
902 | ||
903 | /* We allow an arbitrary number of HI16 relocs before the | |
904 | LO16 reloc. This permits gcc to emit the HI and LO relocs | |
905 | itself. */ | |
906 | for (lorel = rel + 1; | |
907 | (lorel < relend | |
908 | && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO | |
909 | || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); | |
910 | lorel++) | |
911 | continue; | |
912 | if (lorel < relend | |
913 | && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) | |
914 | { | |
915 | m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, | |
916 | contents, addend); | |
917 | r = bfd_reloc_ok; | |
918 | } | |
919 | else | |
920 | r = _bfd_relocate_contents (howto, input_bfd, | |
921 | addend, contents + offset); | |
922 | } | |
923 | #endif /* USE_REL */ | |
924 | } | |
925 | else | |
926 | { | |
927 | bfd_vma relocation; | |
928 | ||
929 | /* This is a final link. */ | |
a5fdb816 NC |
930 | sym = NULL; |
931 | sec = NULL; | |
932 | ||
933 | if (r_symndx < symtab_hdr->sh_info) | |
934 | { | |
935 | /* Local symbol. */ | |
936 | sym = local_syms + r_symndx; | |
937 | sec = local_sections[r_symndx]; | |
938 | sym_name = "<local symbol>"; | |
939 | relocation = (sec->output_section->vma | |
940 | + sec->output_offset | |
941 | + sym->st_value); | |
942 | } | |
943 | else | |
944 | { | |
945 | /* External symbol. */ | |
946 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
947 | while (h->root.type == bfd_link_hash_indirect | |
948 | || h->root.type == bfd_link_hash_warning) | |
949 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
950 | sym_name = h->root.root.string; | |
951 | ||
952 | if (h->root.type == bfd_link_hash_defined | |
953 | || h->root.type == bfd_link_hash_defweak) | |
954 | { | |
955 | sec = h->root.u.def.section; | |
956 | if (sec->output_section == NULL) | |
957 | relocation = 0; | |
958 | else | |
959 | relocation = (h->root.u.def.value | |
960 | + sec->output_section->vma | |
961 | + sec->output_offset); | |
962 | } | |
963 | else if (h->root.type == bfd_link_hash_undefweak) | |
964 | relocation = 0; | |
965 | else | |
966 | { | |
967 | if (! ((*info->callbacks->undefined_symbol) | |
968 | (info, h->root.root.string, input_bfd, | |
969 | input_section, offset))) | |
970 | return false; | |
971 | relocation = 0; | |
972 | } | |
973 | } | |
974 | ||
975 | /* Sanity check the address. */ | |
976 | if (offset > input_section->_raw_size) | |
977 | { | |
978 | r = bfd_reloc_outofrange; | |
979 | goto check_reloc; | |
980 | } | |
981 | ||
982 | switch ((int) r_type) | |
983 | { | |
984 | case (int) R_M32R_10_PCREL : | |
985 | r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section, | |
986 | contents, offset, | |
987 | sec, relocation, addend); | |
988 | break; | |
989 | ||
990 | case (int) R_M32R_HI16_SLO : | |
991 | case (int) R_M32R_HI16_ULO : | |
992 | { | |
993 | Elf_Internal_Rela *lorel; | |
994 | ||
995 | /* We allow an arbitrary number of HI16 relocs before the | |
996 | LO16 reloc. This permits gcc to emit the HI and LO relocs | |
997 | itself. */ | |
998 | for (lorel = rel + 1; | |
999 | (lorel < relend | |
1000 | && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO | |
1001 | || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); | |
1002 | lorel++) | |
1003 | continue; | |
1004 | if (lorel < relend | |
1005 | && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) | |
1006 | { | |
1007 | m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, | |
1008 | contents, relocation + addend); | |
1009 | r = bfd_reloc_ok; | |
1010 | } | |
1011 | else | |
1012 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1013 | contents, offset, | |
1014 | relocation, addend); | |
1015 | } | |
1016 | break; | |
1017 | ||
1018 | case (int) R_M32R_SDA16 : | |
1019 | { | |
1020 | const char *name; | |
1021 | ||
1022 | BFD_ASSERT (sec != NULL); | |
1023 | name = bfd_get_section_name (abfd, sec); | |
1024 | ||
1025 | if (strcmp (name, ".sdata") == 0 | |
1026 | || strcmp (name, ".sbss") == 0 | |
1027 | || strcmp (name, ".scommon") == 0) | |
1028 | { | |
1029 | bfd_vma sda_base; | |
1030 | bfd *out_bfd = sec->output_section->owner; | |
1031 | ||
1032 | r = m32r_elf_final_sda_base (out_bfd, info, | |
1033 | &errmsg, | |
1034 | &sda_base); | |
1035 | if (r != bfd_reloc_ok) | |
1036 | { | |
1037 | ret = false; | |
1038 | goto check_reloc; | |
1039 | } | |
1040 | ||
1041 | /* At this point `relocation' contains the object's | |
1042 | address. */ | |
1043 | relocation -= sda_base; | |
1044 | /* Now it contains the offset from _SDA_BASE_. */ | |
1045 | } | |
1046 | else | |
1047 | { | |
5872728a | 1048 | (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"), |
a5fdb816 NC |
1049 | bfd_get_filename (input_bfd), |
1050 | sym_name, | |
1051 | m32r_elf_howto_table[(int) r_type].name, | |
1052 | bfd_get_section_name (abfd, sec)); | |
1053 | /*bfd_set_error (bfd_error_bad_value); ??? why? */ | |
1054 | ret = false; | |
1055 | continue; | |
1056 | } | |
1057 | } | |
1058 | /* fall through */ | |
1059 | ||
1060 | default : | |
1061 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1062 | contents, offset, | |
1063 | relocation, addend); | |
1064 | break; | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | check_reloc: | |
1069 | ||
1070 | if (r != bfd_reloc_ok) | |
1071 | { | |
1072 | /* FIXME: This should be generic enough to go in a utility. */ | |
1073 | const char *name; | |
1074 | ||
1075 | if (h != NULL) | |
1076 | name = h->root.root.string; | |
1077 | else | |
1078 | { | |
1079 | name = (bfd_elf_string_from_elf_section | |
1080 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
1081 | if (name == NULL || *name == '\0') | |
1082 | name = bfd_section_name (input_bfd, sec); | |
1083 | } | |
1084 | ||
1085 | if (errmsg != NULL) | |
1086 | goto common_error; | |
1087 | ||
1088 | switch (r) | |
1089 | { | |
1090 | case bfd_reloc_overflow: | |
1091 | if (! ((*info->callbacks->reloc_overflow) | |
1092 | (info, name, howto->name, (bfd_vma) 0, | |
1093 | input_bfd, input_section, offset))) | |
1094 | return false; | |
1095 | break; | |
1096 | ||
1097 | case bfd_reloc_undefined: | |
1098 | if (! ((*info->callbacks->undefined_symbol) | |
1099 | (info, name, input_bfd, input_section, | |
1100 | offset))) | |
1101 | return false; | |
1102 | break; | |
1103 | ||
1104 | case bfd_reloc_outofrange: | |
5872728a | 1105 | errmsg = _("internal error: out of range error"); |
a5fdb816 NC |
1106 | goto common_error; |
1107 | ||
1108 | case bfd_reloc_notsupported: | |
5872728a | 1109 | errmsg = _("internal error: unsupported relocation error"); |
a5fdb816 NC |
1110 | goto common_error; |
1111 | ||
1112 | case bfd_reloc_dangerous: | |
5872728a | 1113 | errmsg = _("internal error: dangerous error"); |
a5fdb816 NC |
1114 | goto common_error; |
1115 | ||
1116 | default: | |
5872728a | 1117 | errmsg = _("internal error: unknown error"); |
a5fdb816 NC |
1118 | /* fall through */ |
1119 | ||
1120 | common_error: | |
1121 | if (!((*info->callbacks->warning) | |
1122 | (info, errmsg, name, input_bfd, input_section, | |
1123 | offset))) | |
1124 | return false; | |
1125 | break; | |
1126 | } | |
1127 | } | |
1128 | } | |
1129 | ||
1130 | return ret; | |
1131 | } | |
1132 | \f | |
1133 | #if 0 /* relaxing not supported yet */ | |
1134 | ||
1135 | /* This function handles relaxing for the m32r. | |
1136 | Relaxing on the m32r is tricky because of instruction alignment | |
1137 | requirements (4 byte instructions must be aligned on 4 byte boundaries). | |
1138 | ||
1139 | The following relaxing opportunities are handled: | |
1140 | ||
1141 | seth/add3/jl -> bl24 or bl8 | |
1142 | seth/add3 -> ld24 | |
1143 | ||
1144 | It would be nice to handle bl24 -> bl8 but given: | |
1145 | ||
1146 | - 4 byte insns must be on 4 byte boundaries | |
1147 | - branch instructions only branch to insns on 4 byte boundaries | |
1148 | ||
1149 | this isn't much of a win because the insn in the 2 "deleted" bytes | |
1150 | must become a nop. With some complexity some real relaxation could be | |
1151 | done but the frequency just wouldn't make it worth it; it's better to | |
1152 | try to do all the code compaction one can elsewhere. | |
1153 | When the chip supports parallel 16 bit insns, things may change. | |
1154 | */ | |
1155 | ||
1156 | static boolean | |
1157 | m32r_elf_relax_section (abfd, sec, link_info, again) | |
1158 | bfd *abfd; | |
1159 | asection *sec; | |
1160 | struct bfd_link_info *link_info; | |
1161 | boolean *again; | |
1162 | { | |
1163 | Elf_Internal_Shdr *symtab_hdr; | |
1164 | /* The Rela structures are used here because that's what | |
1165 | _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend | |
1166 | field to 0]. */ | |
1167 | Elf_Internal_Rela *internal_relocs; | |
1168 | Elf_Internal_Rela *free_relocs = NULL; | |
1169 | Elf_Internal_Rela *irel, *irelend; | |
1170 | bfd_byte *contents = NULL; | |
1171 | bfd_byte *free_contents = NULL; | |
1172 | Elf32_External_Sym *extsyms = NULL; | |
1173 | Elf32_External_Sym *free_extsyms = NULL; | |
1174 | ||
1175 | /* Assume nothing changes. */ | |
1176 | *again = false; | |
1177 | ||
1178 | /* We don't have to do anything for a relocateable link, if | |
1179 | this section does not have relocs, or if this is not a | |
1180 | code section. */ | |
1181 | if (link_info->relocateable | |
1182 | || (sec->flags & SEC_RELOC) == 0 | |
1183 | || sec->reloc_count == 0 | |
1184 | || (sec->flags & SEC_CODE) == 0 | |
1185 | || 0 /* FIXME: check SHF_M32R_CAN_RELAX */) | |
1186 | return true; | |
1187 | ||
1188 | /* If this is the first time we have been called for this section, | |
1189 | initialize the cooked size. */ | |
1190 | if (sec->_cooked_size == 0) | |
1191 | sec->_cooked_size = sec->_raw_size; | |
1192 | ||
1193 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1194 | ||
1195 | /* Get a copy of the native relocations. */ | |
1196 | internal_relocs = (_bfd_elf32_link_read_relocs | |
1197 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, | |
1198 | link_info->keep_memory)); | |
1199 | if (internal_relocs == NULL) | |
1200 | goto error_return; | |
1201 | if (! link_info->keep_memory) | |
1202 | free_relocs = internal_relocs; | |
1203 | ||
1204 | /* Walk through them looking for relaxing opportunities. */ | |
1205 | irelend = internal_relocs + sec->reloc_count; | |
1206 | for (irel = internal_relocs; irel < irelend; irel++) | |
1207 | { | |
1208 | bfd_vma symval; | |
1209 | ||
1210 | /* If this isn't something that can be relaxed, then ignore | |
1211 | this reloc. */ | |
1212 | if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO) | |
1213 | continue; | |
1214 | ||
1215 | /* Get the section contents if we haven't done so already. */ | |
1216 | if (contents == NULL) | |
1217 | { | |
1218 | /* Get cached copy if it exists. */ | |
1219 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
1220 | contents = elf_section_data (sec)->this_hdr.contents; | |
1221 | else | |
1222 | { | |
1223 | /* Go get them off disk. */ | |
1224 | contents = (bfd_byte *) bfd_malloc (sec->_raw_size); | |
1225 | if (contents == NULL) | |
1226 | goto error_return; | |
1227 | free_contents = contents; | |
1228 | ||
1229 | if (! bfd_get_section_contents (abfd, sec, contents, | |
1230 | (file_ptr) 0, sec->_raw_size)) | |
1231 | goto error_return; | |
1232 | } | |
1233 | } | |
1234 | ||
1235 | /* Read this BFD's symbols if we haven't done so already. */ | |
1236 | if (extsyms == NULL) | |
1237 | { | |
1238 | /* Get cached copy if it exists. */ | |
1239 | if (symtab_hdr->contents != NULL) | |
1240 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1241 | else | |
1242 | { | |
1243 | /* Go get them off disk. */ | |
1244 | extsyms = ((Elf32_External_Sym *) | |
1245 | bfd_malloc (symtab_hdr->sh_size)); | |
1246 | if (extsyms == NULL) | |
1247 | goto error_return; | |
1248 | free_extsyms = extsyms; | |
1249 | if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0 | |
1250 | || (bfd_read (extsyms, 1, symtab_hdr->sh_size, abfd) | |
1251 | != symtab_hdr->sh_size)) | |
1252 | goto error_return; | |
1253 | } | |
1254 | } | |
1255 | ||
1256 | /* Get the value of the symbol referred to by the reloc. */ | |
1257 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
1258 | { | |
1259 | Elf_Internal_Sym isym; | |
1260 | asection *sym_sec; | |
1261 | ||
1262 | /* A local symbol. */ | |
1263 | bfd_elf32_swap_symbol_in (abfd, | |
1264 | extsyms + ELF32_R_SYM (irel->r_info), | |
1265 | &isym); | |
1266 | ||
1267 | sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx); | |
1268 | symval = (isym.st_value | |
1269 | + sym_sec->output_section->vma | |
1270 | + sym_sec->output_offset); | |
1271 | } | |
1272 | else | |
1273 | { | |
1274 | unsigned long indx; | |
1275 | struct elf_link_hash_entry *h; | |
1276 | ||
1277 | /* An external symbol. */ | |
1278 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
1279 | h = elf_sym_hashes (abfd)[indx]; | |
1280 | BFD_ASSERT (h != NULL); | |
1281 | if (h->root.type != bfd_link_hash_defined | |
1282 | && h->root.type != bfd_link_hash_defweak) | |
1283 | { | |
1284 | /* This appears to be a reference to an undefined | |
1285 | symbol. Just ignore it--it will be caught by the | |
1286 | regular reloc processing. */ | |
1287 | continue; | |
1288 | } | |
1289 | ||
1290 | symval = (h->root.u.def.value | |
1291 | + h->root.u.def.section->output_section->vma | |
1292 | + h->root.u.def.section->output_offset); | |
1293 | } | |
1294 | ||
1295 | /* For simplicity of coding, we are going to modify the section | |
1296 | contents, the section relocs, and the BFD symbol table. We | |
1297 | must tell the rest of the code not to free up this | |
1298 | information. It would be possible to instead create a table | |
1299 | of changes which have to be made, as is done in coff-mips.c; | |
1300 | that would be more work, but would require less memory when | |
1301 | the linker is run. */ | |
1302 | ||
1303 | /* Try to change a seth/add3/jl subroutine call to bl24 or bl8. | |
1304 | This sequence is generated by the compiler when compiling in | |
1305 | 32 bit mode. Also look for seth/add3 -> ld24. */ | |
1306 | ||
1307 | if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO) | |
1308 | { | |
1309 | Elf_Internal_Rela *nrel; | |
1310 | bfd_vma pc = (sec->output_section->vma + sec->output_offset | |
1311 | + irel->r_offset); | |
1312 | bfd_signed_vma pcrel_value = symval - pc; | |
1313 | unsigned int code,reg; | |
1314 | int addend,nop_p,bl8_p,to_delete; | |
1315 | ||
1316 | /* The tests are ordered so that we get out as quickly as possible | |
1317 | if this isn't something we can relax, taking into account that | |
1318 | we are looking for two separate possibilities (jl/ld24). */ | |
1319 | ||
1320 | /* Do nothing if no room in the section for this to be what we're | |
1321 | looking for. */ | |
1322 | if (irel->r_offset > sec->_cooked_size - 8) | |
1323 | continue; | |
1324 | ||
1325 | /* Make sure the next relocation applies to the next | |
1326 | instruction and that it's the add3's reloc. */ | |
1327 | nrel = irel + 1; | |
1328 | if (nrel == irelend | |
1329 | || irel->r_offset + 4 != nrel->r_offset | |
1330 | || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16) | |
1331 | continue; | |
1332 | ||
1333 | /* See if the instructions are seth/add3. */ | |
1334 | /* FIXME: This is where macros from cgen can come in. */ | |
1335 | code = bfd_get_16 (abfd, contents + irel->r_offset + 0); | |
1336 | if ((code & 0xf0ff) != 0xd0c0) | |
1337 | continue; /* not seth rN,foo */ | |
1338 | reg = (code & 0x0f00) >> 8; | |
1339 | code = bfd_get_16 (abfd, contents + irel->r_offset + 4); | |
1340 | if (code != (0x80a0 | reg | (reg << 8))) | |
1341 | continue; /* not add3 rN,rN,foo */ | |
1342 | ||
1343 | /* At this point we've confirmed we have seth/add3. Now check | |
1344 | whether the next insn is a jl, in which case try to change this | |
1345 | to bl24 or bl8. */ | |
1346 | ||
1347 | /* Ensure the branch target is in range. | |
1348 | The bl24 instruction has a 24 bit operand which is the target | |
1349 | address right shifted by 2, giving a signed range of 26 bits. | |
1350 | Note that 4 bytes are added to the high value because the target | |
1351 | will be at least 4 bytes closer if we can relax. It'll actually | |
1352 | be 4 or 8 bytes closer, but we don't know which just yet and | |
1353 | the difference isn't significant enough to worry about. */ | |
1354 | #ifndef USE_REL /* put in for learning purposes */ | |
1355 | pcrel_value += irel->r_addend; | |
1356 | #else | |
1357 | addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2); | |
1358 | pcrel_value += addend; | |
1359 | #endif | |
1360 | ||
1361 | if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4 | |
1362 | /* Do nothing if no room in the section for this to be what we're | |
1363 | looking for. */ | |
1364 | && (irel->r_offset <= sec->_cooked_size - 12) | |
1365 | /* Ensure the next insn is "jl rN". */ | |
1366 | && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)), | |
1367 | code != (0x1ec0 | reg))) | |
1368 | { | |
1369 | /* We can relax to bl24/bl8. */ | |
1370 | ||
1371 | /* See if there's a nop following the jl. | |
1372 | Also see if we can use a bl8 insn. */ | |
1373 | code = bfd_get_16 (abfd, contents + irel->r_offset + 10); | |
5872728a | 1374 | nop_p = (code & 0x7fff) == NOP_INSN; |
a5fdb816 NC |
1375 | bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200; |
1376 | ||
1377 | if (bl8_p) | |
1378 | { | |
1379 | /* Change "seth rN,foo" to "bl8 foo || nop". | |
1380 | We OR in CODE just in case it's not a nop (technically, | |
1381 | CODE currently must be a nop, but for cleanness we | |
1382 | allow it to be anything). */ | |
1383 | #ifndef USE_REL /* put in for learning purposes */ | |
5872728a | 1384 | code = 0x7e000000 | MAKE_PARALLEL (code); |
a5fdb816 | 1385 | #else |
5872728a | 1386 | code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code); |
a5fdb816 NC |
1387 | #endif |
1388 | to_delete = 8; | |
1389 | } | |
1390 | else | |
1391 | { | |
1392 | /* Change the seth rN,foo to a bl24 foo. */ | |
1393 | #ifndef USE_REL /* put in for learning purposes */ | |
1394 | code = 0xfe000000; | |
1395 | #else | |
1396 | code = 0xfe000000 + ((addend >> 2) & 0xffffff); | |
1397 | #endif | |
1398 | to_delete = nop_p ? 8 : 4; | |
1399 | } | |
1400 | ||
1401 | bfd_put_32 (abfd, code, contents + irel->r_offset); | |
1402 | ||
1403 | /* Set the new reloc type. */ | |
1404 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
1405 | bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL); | |
1406 | ||
1407 | /* Delete the add3 reloc by making it a null reloc. */ | |
1408 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
1409 | R_M32R_NONE); | |
1410 | } | |
1411 | else if (addend >= 0 | |
1412 | && symval + addend <= 0xffffff) | |
1413 | { | |
1414 | /* We can relax to ld24. */ | |
1415 | ||
1416 | code = 0xe0000000 | (reg << 24) | (addend & 0xffffff); | |
1417 | bfd_put_32 (abfd, code, contents + irel->r_offset); | |
1418 | to_delete = 4; | |
1419 | /* Tell the following code a nop filler isn't needed. */ | |
1420 | nop_p = 1; | |
1421 | } | |
1422 | else | |
1423 | { | |
1424 | /* Can't do anything here. */ | |
1425 | continue; | |
1426 | } | |
1427 | ||
1428 | /* Note that we've changed the relocs, section contents, etc. */ | |
1429 | elf_section_data (sec)->relocs = internal_relocs; | |
1430 | free_relocs = NULL; | |
1431 | ||
1432 | elf_section_data (sec)->this_hdr.contents = contents; | |
1433 | free_contents = NULL; | |
1434 | ||
1435 | symtab_hdr->contents = (bfd_byte *) extsyms; | |
1436 | free_extsyms = NULL; | |
1437 | ||
1438 | /* Delete TO_DELETE bytes of data. */ | |
1439 | if (!m32r_elf_relax_delete_bytes (abfd, sec, | |
1440 | irel->r_offset + 4, to_delete)) | |
1441 | goto error_return; | |
1442 | ||
1443 | /* Now that the following bytes have been moved into place, see if | |
1444 | we need to replace the jl with a nop. This happens when we had | |
1445 | to use a bl24 insn and the insn following the jl isn't a nop. | |
1446 | Technically, this situation can't happen (since the insn can | |
1447 | never be executed) but to be clean we do this. When the chip | |
1448 | supports parallel 16 bit insns things may change. | |
1449 | We don't need to do this in the case of relaxing to ld24, | |
1450 | and the above code sets nop_p so this isn't done. */ | |
1451 | if (! nop_p && to_delete == 4) | |
5872728a | 1452 | bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4); |
a5fdb816 NC |
1453 | |
1454 | /* That will change things, so we should relax again. | |
1455 | Note that this is not required, and it may be slow. */ | |
1456 | *again = true; | |
1457 | ||
1458 | continue; | |
1459 | } | |
1460 | ||
1461 | /* loop to try the next reloc */ | |
1462 | } | |
1463 | ||
1464 | if (free_relocs != NULL) | |
1465 | { | |
1466 | free (free_relocs); | |
1467 | free_relocs = NULL; | |
1468 | } | |
1469 | ||
1470 | if (free_contents != NULL) | |
1471 | { | |
1472 | if (! link_info->keep_memory) | |
1473 | free (free_contents); | |
1474 | else | |
1475 | { | |
1476 | /* Cache the section contents for elf_link_input_bfd. */ | |
1477 | elf_section_data (sec)->this_hdr.contents = contents; | |
1478 | } | |
1479 | free_contents = NULL; | |
1480 | } | |
1481 | ||
1482 | if (free_extsyms != NULL) | |
1483 | { | |
1484 | if (! link_info->keep_memory) | |
1485 | free (free_extsyms); | |
1486 | else | |
1487 | { | |
1488 | /* Cache the symbols for elf_link_input_bfd. */ | |
1489 | symtab_hdr->contents = extsyms; | |
1490 | } | |
1491 | free_extsyms = NULL; | |
1492 | } | |
1493 | ||
1494 | return true; | |
1495 | ||
1496 | error_return: | |
1497 | if (free_relocs != NULL) | |
1498 | free (free_relocs); | |
1499 | if (free_contents != NULL) | |
1500 | free (free_contents); | |
1501 | if (free_extsyms != NULL) | |
1502 | free (free_extsyms); | |
1503 | return false; | |
1504 | } | |
1505 | ||
1506 | /* Delete some bytes from a section while relaxing. */ | |
1507 | ||
1508 | static boolean | |
1509 | m32r_elf_relax_delete_bytes (abfd, sec, addr, count) | |
1510 | bfd *abfd; | |
1511 | asection *sec; | |
1512 | bfd_vma addr; | |
1513 | int count; | |
1514 | { | |
1515 | Elf_Internal_Shdr *symtab_hdr; | |
1516 | Elf32_External_Sym *extsyms; | |
1517 | int shndx, index; | |
1518 | bfd_byte *contents; | |
1519 | Elf_Internal_Rela *irel, *irelend; | |
1520 | Elf_Internal_Rela *irelalign; | |
1521 | bfd_vma toaddr; | |
1522 | Elf32_External_Sym *esym, *esymend; | |
1523 | struct elf_link_hash_entry *sym_hash; | |
1524 | ||
1525 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1526 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1527 | ||
1528 | shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
1529 | ||
1530 | contents = elf_section_data (sec)->this_hdr.contents; | |
1531 | ||
1532 | /* The deletion must stop at the next ALIGN reloc for an aligment | |
1533 | power larger than the number of bytes we are deleting. */ | |
1534 | ||
1535 | irelalign = NULL; | |
1536 | toaddr = sec->_cooked_size; | |
1537 | ||
1538 | irel = elf_section_data (sec)->relocs; | |
1539 | irelend = irel + sec->reloc_count; | |
1540 | ||
1541 | /* Actually delete the bytes. */ | |
1542 | memmove (contents + addr, contents + addr + count, toaddr - addr - count); | |
1543 | sec->_cooked_size -= count; | |
1544 | ||
1545 | /* Adjust all the relocs. */ | |
1546 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1547 | { | |
1548 | /* Get the new reloc address. */ | |
1549 | if ((irel->r_offset > addr | |
1550 | && irel->r_offset < toaddr)) | |
1551 | irel->r_offset -= count; | |
1552 | } | |
1553 | ||
1554 | /* Adjust the local symbols defined in this section. */ | |
1555 | esym = extsyms; | |
1556 | esymend = esym + symtab_hdr->sh_info; | |
1557 | for (; esym < esymend; esym++) | |
1558 | { | |
1559 | Elf_Internal_Sym isym; | |
1560 | ||
1561 | bfd_elf32_swap_symbol_in (abfd, esym, &isym); | |
1562 | ||
1563 | if (isym.st_shndx == shndx | |
1564 | && isym.st_value > addr | |
1565 | && isym.st_value < toaddr) | |
1566 | { | |
1567 | isym.st_value -= count; | |
1568 | bfd_elf32_swap_symbol_out (abfd, &isym, esym); | |
1569 | } | |
1570 | } | |
1571 | ||
1572 | /* Now adjust the global symbols defined in this section. */ | |
1573 | esym = extsyms + symtab_hdr->sh_info; | |
1574 | esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)); | |
1575 | for (index = 0; esym < esymend; esym++, index++) | |
1576 | { | |
1577 | Elf_Internal_Sym isym; | |
1578 | ||
1579 | bfd_elf32_swap_symbol_in (abfd, esym, &isym); | |
1580 | sym_hash = elf_sym_hashes (abfd)[index]; | |
1581 | if (isym.st_shndx == shndx | |
1582 | && ((sym_hash)->root.type == bfd_link_hash_defined | |
1583 | || (sym_hash)->root.type == bfd_link_hash_defweak) | |
1584 | && (sym_hash)->root.u.def.section == sec | |
1585 | && (sym_hash)->root.u.def.value > addr | |
1586 | && (sym_hash)->root.u.def.value < toaddr) | |
1587 | { | |
1588 | (sym_hash)->root.u.def.value -= count; | |
1589 | } | |
1590 | } | |
1591 | ||
1592 | return true; | |
1593 | } | |
1594 | ||
1595 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1596 | which uses m32r_elf_relocate_section. */ | |
1597 | ||
1598 | static bfd_byte * | |
1599 | m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order, | |
1600 | data, relocateable, symbols) | |
1601 | bfd *output_bfd; | |
1602 | struct bfd_link_info *link_info; | |
1603 | struct bfd_link_order *link_order; | |
1604 | bfd_byte *data; | |
1605 | boolean relocateable; | |
1606 | asymbol **symbols; | |
1607 | { | |
1608 | Elf_Internal_Shdr *symtab_hdr; | |
1609 | asection *input_section = link_order->u.indirect.section; | |
1610 | bfd *input_bfd = input_section->owner; | |
1611 | asection **sections = NULL; | |
1612 | Elf_Internal_Rela *internal_relocs = NULL; | |
1613 | Elf32_External_Sym *external_syms = NULL; | |
1614 | Elf_Internal_Sym *internal_syms = NULL; | |
1615 | ||
1616 | /* We only need to handle the case of relaxing, or of having a | |
1617 | particular set of section contents, specially. */ | |
1618 | if (relocateable | |
1619 | || elf_section_data (input_section)->this_hdr.contents == NULL) | |
1620 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1621 | link_order, data, | |
1622 | relocateable, | |
1623 | symbols); | |
1624 | ||
1625 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1626 | ||
1627 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
1628 | input_section->_raw_size); | |
1629 | ||
1630 | if ((input_section->flags & SEC_RELOC) != 0 | |
1631 | && input_section->reloc_count > 0) | |
1632 | { | |
1633 | Elf_Internal_Sym *isymp; | |
1634 | asection **secpp; | |
1635 | Elf32_External_Sym *esym, *esymend; | |
1636 | ||
1637 | if (symtab_hdr->contents != NULL) | |
1638 | external_syms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1639 | else | |
1640 | { | |
1641 | external_syms = ((Elf32_External_Sym *) | |
1642 | bfd_malloc (symtab_hdr->sh_info | |
1643 | * sizeof (Elf32_External_Sym))); | |
1644 | if (external_syms == NULL && symtab_hdr->sh_info > 0) | |
1645 | goto error_return; | |
1646 | if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0 | |
1647 | || (bfd_read (external_syms, sizeof (Elf32_External_Sym), | |
1648 | symtab_hdr->sh_info, input_bfd) | |
1649 | != (symtab_hdr->sh_info * sizeof (Elf32_External_Sym)))) | |
1650 | goto error_return; | |
1651 | } | |
1652 | ||
1653 | internal_relocs = (_bfd_elf32_link_read_relocs | |
1654 | (input_bfd, input_section, (PTR) NULL, | |
1655 | (Elf_Internal_Rela *) NULL, false)); | |
1656 | if (internal_relocs == NULL) | |
1657 | goto error_return; | |
1658 | ||
1659 | internal_syms = ((Elf_Internal_Sym *) | |
1660 | bfd_malloc (symtab_hdr->sh_info | |
1661 | * sizeof (Elf_Internal_Sym))); | |
1662 | if (internal_syms == NULL && symtab_hdr->sh_info > 0) | |
1663 | goto error_return; | |
1664 | ||
1665 | sections = (asection **) bfd_malloc (symtab_hdr->sh_info | |
1666 | * sizeof (asection *)); | |
1667 | if (sections == NULL && symtab_hdr->sh_info > 0) | |
1668 | goto error_return; | |
1669 | ||
1670 | isymp = internal_syms; | |
1671 | secpp = sections; | |
1672 | esym = external_syms; | |
1673 | esymend = esym + symtab_hdr->sh_info; | |
1674 | for (; esym < esymend; ++esym, ++isymp, ++secpp) | |
1675 | { | |
1676 | asection *isec; | |
1677 | ||
1678 | bfd_elf32_swap_symbol_in (input_bfd, esym, isymp); | |
1679 | ||
1680 | if (isymp->st_shndx == SHN_UNDEF) | |
1681 | isec = bfd_und_section_ptr; | |
1682 | else if (isymp->st_shndx > 0 && isymp->st_shndx < SHN_LORESERVE) | |
1683 | isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx); | |
1684 | else if (isymp->st_shndx == SHN_ABS) | |
1685 | isec = bfd_abs_section_ptr; | |
1686 | else if (isymp->st_shndx == SHN_COMMON) | |
1687 | isec = bfd_com_section_ptr; | |
1688 | else if (isymp->st_shndx == SHN_M32R_SCOMMON) | |
1689 | isec = &m32r_elf_scom_section; | |
1690 | else | |
1691 | { | |
1692 | /* Who knows? */ | |
1693 | isec = NULL; | |
1694 | } | |
1695 | ||
1696 | *secpp = isec; | |
1697 | } | |
1698 | ||
1699 | if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1700 | input_section, data, internal_relocs, | |
1701 | internal_syms, sections)) | |
1702 | goto error_return; | |
1703 | ||
1704 | if (sections != NULL) | |
1705 | free (sections); | |
1706 | sections = NULL; | |
1707 | if (internal_syms != NULL) | |
1708 | free (internal_syms); | |
1709 | internal_syms = NULL; | |
1710 | if (external_syms != NULL && symtab_hdr->contents == NULL) | |
1711 | free (external_syms); | |
1712 | external_syms = NULL; | |
1713 | if (internal_relocs != elf_section_data (input_section)->relocs) | |
1714 | free (internal_relocs); | |
1715 | internal_relocs = NULL; | |
1716 | } | |
1717 | ||
1718 | return data; | |
1719 | ||
1720 | error_return: | |
1721 | if (internal_relocs != NULL | |
1722 | && internal_relocs != elf_section_data (input_section)->relocs) | |
1723 | free (internal_relocs); | |
1724 | if (external_syms != NULL && symtab_hdr->contents == NULL) | |
1725 | free (external_syms); | |
1726 | if (internal_syms != NULL) | |
1727 | free (internal_syms); | |
1728 | if (sections != NULL) | |
1729 | free (sections); | |
1730 | return NULL; | |
1d5c6cfd DE |
1731 | } |
1732 | ||
a5fdb816 NC |
1733 | #endif /* #if 0 */ |
1734 | \f | |
1735 | /* Set the right machine number. */ | |
1736 | static boolean | |
1737 | m32r_elf_object_p (abfd) | |
1738 | bfd *abfd; | |
1739 | { | |
1740 | switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH) | |
1741 | { | |
1742 | default: | |
1743 | case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break; | |
5872728a | 1744 | /* start-sanitize-m32rx */ |
a5fdb816 | 1745 | case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break; |
5872728a | 1746 | /* end-sanitize-m32rx */ |
a5fdb816 | 1747 | } |
5872728a | 1748 | return true; |
a5fdb816 NC |
1749 | } |
1750 | ||
1751 | /* Store the machine number in the flags field. */ | |
1752 | void | |
1753 | m32r_elf_final_write_processing (abfd, linker) | |
1754 | bfd * abfd; | |
1755 | boolean linker; | |
1756 | { | |
1757 | unsigned long val; | |
1758 | ||
1759 | switch (bfd_get_mach (abfd)) | |
1760 | { | |
1761 | default: | |
1762 | case bfd_mach_m32r: val = E_M32R_ARCH; break; | |
5872728a | 1763 | /* start-sanitize-m32rx */ |
a5fdb816 | 1764 | case bfd_mach_m32rx: val = E_M32RX_ARCH; break; |
5872728a | 1765 | /* end-sanitize-m32rx */ |
a5fdb816 NC |
1766 | } |
1767 | ||
1768 | elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH; | |
1769 | elf_elfheader (abfd)->e_flags |= val; | |
1770 | } | |
1771 | ||
1772 | /* Function to keep M32R specific file flags. */ | |
1773 | boolean | |
1774 | m32r_elf_set_private_flags (abfd, flags) | |
1775 | bfd * abfd; | |
1776 | flagword flags; | |
1777 | { | |
1778 | BFD_ASSERT (!elf_flags_init (abfd) | |
1779 | || elf_elfheader (abfd)->e_flags == flags); | |
1780 | ||
1781 | elf_elfheader (abfd)->e_flags = flags; | |
1782 | elf_flags_init (abfd) = true; | |
1783 | return true; | |
1784 | } | |
1785 | ||
1786 | /* Copy backend specific data from one object module to another */ | |
1787 | boolean | |
1788 | m32r_elf_copy_private_bfd_data (ibfd, obfd) | |
1789 | bfd * ibfd; | |
1790 | bfd * obfd; | |
1791 | { | |
1792 | if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
1793 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
1794 | return true; | |
1795 | ||
1796 | BFD_ASSERT (!elf_flags_init (obfd) | |
1797 | || (elf_elfheader (obfd)->e_flags | |
1798 | == elf_elfheader (ibfd)->e_flags)); | |
1799 | ||
1800 | elf_gp (obfd) = elf_gp (ibfd); | |
1801 | elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags; | |
1802 | elf_flags_init (obfd) = true; | |
1803 | return true; | |
1804 | } | |
1805 | ||
1806 | /* Merge backend specific data from an object file to the output | |
1807 | object file when linking. */ | |
1808 | boolean | |
1809 | m32r_elf_merge_private_bfd_data (ibfd, obfd) | |
1810 | bfd * ibfd; | |
1811 | bfd * obfd; | |
1812 | { | |
5872728a NC |
1813 | flagword out_flags; |
1814 | flagword in_flags; | |
a5fdb816 NC |
1815 | |
1816 | if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
1817 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
1818 | return true; | |
1819 | ||
5872728a NC |
1820 | in_flags = elf_elfheader (ibfd)->e_flags; |
1821 | out_flags = elf_elfheader (obfd)->e_flags; | |
a5fdb816 NC |
1822 | |
1823 | if (! elf_flags_init (obfd)) | |
1824 | { | |
5872728a NC |
1825 | /* If the input is the default architecture then do not |
1826 | bother setting the flags for the output architecture, | |
1827 | instead allow future merges to do this. If no future | |
1828 | merges ever set these flags then they will retain their | |
1829 | unitialised values, which surprise surprise, correspond | |
1830 | to the default values. */ | |
1831 | if (bfd_get_arch_info (ibfd)->the_default) | |
1832 | return true; | |
1833 | ||
a5fdb816 | 1834 | elf_flags_init (obfd) = true; |
5872728a | 1835 | elf_elfheader (obfd)->e_flags = in_flags; |
a5fdb816 NC |
1836 | |
1837 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
1838 | && bfd_get_arch_info (obfd)->the_default) | |
1839 | { | |
1840 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
1841 | } | |
1842 | ||
1843 | return true; | |
1844 | } | |
1845 | ||
1846 | /* Check flag compatibility. */ | |
5872728a | 1847 | if (in_flags == out_flags) |
a5fdb816 NC |
1848 | return true; |
1849 | ||
5872728a | 1850 | if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH)) |
a5fdb816 | 1851 | { |
5872728a | 1852 | if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH) |
2e0a5c10 | 1853 | { |
5872728a | 1854 | _bfd_error_handler (_("%s: Instruction set mismatch with previous modules"), |
2e0a5c10 | 1855 | bfd_get_filename (ibfd)); |
5872728a | 1856 | |
2e0a5c10 NC |
1857 | bfd_set_error (bfd_error_bad_value); |
1858 | return false; | |
2e0a5c10 | 1859 | } |
a5fdb816 NC |
1860 | } |
1861 | ||
1862 | return true; | |
1863 | } | |
1864 | ||
1865 | /* Display the flags field */ | |
1866 | static boolean | |
1867 | m32r_elf_print_private_bfd_data (abfd, ptr) | |
1868 | bfd * abfd; | |
1869 | PTR ptr; | |
1870 | { | |
1871 | FILE * file = (FILE *) ptr; | |
1872 | ||
1873 | BFD_ASSERT (abfd != NULL && ptr != NULL) | |
1874 | ||
5872728a NC |
1875 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
1876 | ||
1877 | fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags); | |
a5fdb816 NC |
1878 | |
1879 | switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH) | |
1880 | { | |
1881 | default: | |
5872728a NC |
1882 | case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break; |
1883 | /* start-sanitize-m32rx */ | |
1884 | case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break; | |
1885 | /* end-sanitize-m32rx */ | |
a5fdb816 NC |
1886 | } |
1887 | ||
1888 | fputc ('\n', file); | |
1889 | ||
1890 | return true; | |
1891 | } | |
1892 | ||
1893 | \f | |
1894 | ||
1d5c6cfd DE |
1895 | #define ELF_ARCH bfd_arch_m32r |
1896 | #define ELF_MACHINE_CODE EM_CYGNUS_M32R | |
1897 | #define ELF_MAXPAGESIZE 0x1000 | |
1898 | ||
1899 | #define TARGET_BIG_SYM bfd_elf32_m32r_vec | |
1900 | #define TARGET_BIG_NAME "elf32-m32r" | |
1901 | ||
a5fdb816 NC |
1902 | #define elf_info_to_howto 0 |
1903 | #define elf_info_to_howto_rel m32r_info_to_howto_rel | |
1904 | #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section | |
1905 | #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing | |
1906 | #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook | |
1907 | #define elf_backend_relocate_section m32r_elf_relocate_section | |
1908 | ||
1909 | #if 0 /* not yet */ | |
1910 | /* relax support */ | |
1911 | #define bfd_elf32_bfd_relax_section m32r_elf_relax_section | |
1912 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
1913 | m32r_elf_get_relocated_section_contents | |
1914 | #endif | |
1d5c6cfd | 1915 | |
a5fdb816 NC |
1916 | #define elf_backend_object_p m32r_elf_object_p |
1917 | #define elf_backend_final_write_processing m32r_elf_final_write_processing | |
1918 | #define bfd_elf32_bfd_copy_private_bfd_data m32r_elf_copy_private_bfd_data | |
1919 | #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data | |
1920 | #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags | |
1921 | #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data | |
1922 | ||
1d5c6cfd | 1923 | #include "elf32-target.h" |