Commit | Line | Data |
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252b5132 | 1 | /* M32R-specific support for 32-bit ELF. |
7898deda NC |
2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "bfd.h" | |
22 | #include "sysdep.h" | |
23 | #include "libbfd.h" | |
24 | #include "elf-bfd.h" | |
25 | #include "elf/m32r.h" | |
26 | ||
27 | static bfd_reloc_status_type m32r_elf_10_pcrel_reloc | |
28 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
29 | static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc | |
30 | PARAMS ((bfd *, reloc_howto_type *, asection *, | |
31 | bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma)); | |
32 | static bfd_reloc_status_type m32r_elf_hi16_reloc | |
33 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
34 | static void m32r_elf_relocate_hi16 | |
35 | PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, | |
36 | bfd_byte *, bfd_vma)); | |
37 | bfd_reloc_status_type m32r_elf_lo16_reloc | |
38 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
8b125cde DE |
39 | bfd_reloc_status_type m32r_elf_generic_reloc |
40 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
252b5132 RH |
41 | static bfd_reloc_status_type m32r_elf_sda16_reloc |
42 | PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); | |
43 | static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup | |
44 | PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); | |
45 | static void m32r_info_to_howto_rel | |
46 | PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *)); | |
47 | boolean _bfd_m32r_elf_section_from_bfd_section | |
af746e92 | 48 | PARAMS ((bfd *, asection *, int *)); |
252b5132 RH |
49 | void _bfd_m32r_elf_symbol_processing |
50 | PARAMS ((bfd *, asymbol *)); | |
51 | static boolean m32r_elf_add_symbol_hook | |
52 | PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *, | |
53 | const char **, flagword *, asection **, bfd_vma *)); | |
54 | static boolean m32r_elf_relocate_section | |
55 | PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, | |
56 | Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); | |
57 | #if 0 /* not yet */ | |
58 | static boolean m32r_elf_relax_delete_bytes | |
59 | PARAMS ((bfd *, asection *, bfd_vma, int)); | |
60 | #endif | |
252b5132 RH |
61 | static bfd_reloc_status_type m32r_elf_final_sda_base |
62 | PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *)); | |
63 | static boolean m32r_elf_object_p | |
64 | PARAMS ((bfd *)); | |
65 | static void m32r_elf_final_write_processing | |
66 | PARAMS ((bfd *, boolean)); | |
67 | static boolean m32r_elf_set_private_flags | |
68 | PARAMS ((bfd *, flagword)); | |
252b5132 RH |
69 | static boolean m32r_elf_merge_private_bfd_data |
70 | PARAMS ((bfd *, bfd *)); | |
71 | static boolean m32r_elf_print_private_bfd_data | |
72 | PARAMS ((bfd *, PTR)); | |
917583ad NC |
73 | static boolean m32r_elf_gc_sweep_hook |
74 | PARAMS ((bfd *, struct bfd_link_info *, asection *, | |
75 | const Elf_Internal_Rela *)); | |
76 | static boolean m32r_elf_check_relocs | |
77 | PARAMS ((bfd *, struct bfd_link_info *, asection *, | |
78 | const Elf_Internal_Rela *)); | |
79 | ||
80 | asection * m32r_elf_gc_mark_hook | |
81 | PARAMS ((bfd *, struct bfd_link_info *, Elf_Internal_Rela *, | |
82 | struct elf_link_hash_entry *, Elf_Internal_Sym *)); | |
252b5132 RH |
83 | |
84 | #define NOP_INSN 0x7000 | |
85 | #define MAKE_PARALLEL(insn) ((insn) | 0x8000) | |
86 | ||
87 | /* Use REL instead of RELA to save space. | |
88 | This only saves space in libraries and object files, but perhaps | |
89 | relocs will be put in ROM? All in all though, REL relocs are a pain | |
90 | to work with. */ | |
91 | #define USE_REL | |
92 | ||
93 | static reloc_howto_type m32r_elf_howto_table[] = | |
94 | { | |
95 | /* This reloc does nothing. */ | |
96 | HOWTO (R_M32R_NONE, /* type */ | |
97 | 0, /* rightshift */ | |
98 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
99 | 32, /* bitsize */ | |
100 | false, /* pc_relative */ | |
101 | 0, /* bitpos */ | |
102 | complain_overflow_bitfield, /* complain_on_overflow */ | |
103 | bfd_elf_generic_reloc, /* special_function */ | |
104 | "R_M32R_NONE", /* name */ | |
105 | false, /* partial_inplace */ | |
106 | 0, /* src_mask */ | |
107 | 0, /* dst_mask */ | |
108 | false), /* pcrel_offset */ | |
109 | ||
110 | /* A 16 bit absolute relocation. */ | |
111 | HOWTO (R_M32R_16, /* type */ | |
112 | 0, /* rightshift */ | |
113 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
114 | 16, /* bitsize */ | |
115 | false, /* pc_relative */ | |
116 | 0, /* bitpos */ | |
117 | complain_overflow_bitfield, /* complain_on_overflow */ | |
8b125cde | 118 | m32r_elf_generic_reloc,/* special_function */ |
252b5132 RH |
119 | "R_M32R_16", /* name */ |
120 | true, /* partial_inplace */ | |
121 | 0xffff, /* src_mask */ | |
122 | 0xffff, /* dst_mask */ | |
123 | false), /* pcrel_offset */ | |
124 | ||
125 | /* A 32 bit absolute relocation. */ | |
126 | HOWTO (R_M32R_32, /* type */ | |
127 | 0, /* rightshift */ | |
128 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
129 | 32, /* bitsize */ | |
130 | false, /* pc_relative */ | |
131 | 0, /* bitpos */ | |
132 | complain_overflow_bitfield, /* complain_on_overflow */ | |
8b125cde | 133 | m32r_elf_generic_reloc,/* special_function */ |
252b5132 RH |
134 | "R_M32R_32", /* name */ |
135 | true, /* partial_inplace */ | |
136 | 0xffffffff, /* src_mask */ | |
137 | 0xffffffff, /* dst_mask */ | |
138 | false), /* pcrel_offset */ | |
139 | ||
140 | /* A 24 bit address. */ | |
141 | HOWTO (R_M32R_24, /* type */ | |
142 | 0, /* rightshift */ | |
143 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
144 | 24, /* bitsize */ | |
145 | false, /* pc_relative */ | |
146 | 0, /* bitpos */ | |
147 | complain_overflow_unsigned, /* complain_on_overflow */ | |
8b125cde | 148 | m32r_elf_generic_reloc,/* special_function */ |
252b5132 RH |
149 | "R_M32R_24", /* name */ |
150 | true, /* partial_inplace */ | |
151 | 0xffffff, /* src_mask */ | |
152 | 0xffffff, /* dst_mask */ | |
153 | false), /* pcrel_offset */ | |
154 | ||
155 | /* An PC Relative 10-bit relocation, shifted by 2. | |
156 | This reloc is complicated because relocations are relative to pc & -4. | |
157 | i.e. branches in the right insn slot use the address of the left insn | |
158 | slot for pc. */ | |
159 | /* ??? It's not clear whether this should have partial_inplace set or not. | |
160 | Branch relaxing in the assembler can store the addend in the insn, | |
161 | and if bfd_install_relocation gets called the addend may get added | |
162 | again. */ | |
163 | HOWTO (R_M32R_10_PCREL, /* type */ | |
164 | 2, /* rightshift */ | |
165 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
166 | 10, /* bitsize */ | |
167 | true, /* pc_relative */ | |
168 | 0, /* bitpos */ | |
169 | complain_overflow_signed, /* complain_on_overflow */ | |
170 | m32r_elf_10_pcrel_reloc, /* special_function */ | |
171 | "R_M32R_10_PCREL", /* name */ | |
172 | false, /* partial_inplace */ | |
173 | 0xff, /* src_mask */ | |
174 | 0xff, /* dst_mask */ | |
175 | true), /* pcrel_offset */ | |
176 | ||
177 | /* A relative 18 bit relocation, right shifted by 2. */ | |
178 | HOWTO (R_M32R_18_PCREL, /* type */ | |
179 | 2, /* rightshift */ | |
180 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
181 | 16, /* bitsize */ | |
182 | true, /* pc_relative */ | |
183 | 0, /* bitpos */ | |
184 | complain_overflow_signed, /* complain_on_overflow */ | |
185 | bfd_elf_generic_reloc, /* special_function */ | |
186 | "R_M32R_18_PCREL", /* name */ | |
187 | false, /* partial_inplace */ | |
188 | 0xffff, /* src_mask */ | |
189 | 0xffff, /* dst_mask */ | |
190 | true), /* pcrel_offset */ | |
191 | ||
192 | /* A relative 26 bit relocation, right shifted by 2. */ | |
193 | /* ??? It's not clear whether this should have partial_inplace set or not. | |
194 | Branch relaxing in the assembler can store the addend in the insn, | |
195 | and if bfd_install_relocation gets called the addend may get added | |
196 | again. */ | |
197 | HOWTO (R_M32R_26_PCREL, /* type */ | |
198 | 2, /* rightshift */ | |
199 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
200 | 26, /* bitsize */ | |
201 | true, /* pc_relative */ | |
202 | 0, /* bitpos */ | |
203 | complain_overflow_signed, /* complain_on_overflow */ | |
204 | bfd_elf_generic_reloc, /* special_function */ | |
205 | "R_M32R_26_PCREL", /* name */ | |
206 | false, /* partial_inplace */ | |
207 | 0xffffff, /* src_mask */ | |
208 | 0xffffff, /* dst_mask */ | |
209 | true), /* pcrel_offset */ | |
210 | ||
211 | /* High 16 bits of address when lower 16 is or'd in. */ | |
212 | HOWTO (R_M32R_HI16_ULO, /* type */ | |
213 | 16, /* rightshift */ | |
214 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
215 | 16, /* bitsize */ | |
216 | false, /* pc_relative */ | |
217 | 0, /* bitpos */ | |
218 | complain_overflow_dont, /* complain_on_overflow */ | |
219 | m32r_elf_hi16_reloc, /* special_function */ | |
220 | "R_M32R_HI16_ULO", /* name */ | |
221 | true, /* partial_inplace */ | |
222 | 0x0000ffff, /* src_mask */ | |
223 | 0x0000ffff, /* dst_mask */ | |
224 | false), /* pcrel_offset */ | |
225 | ||
226 | /* High 16 bits of address when lower 16 is added in. */ | |
227 | HOWTO (R_M32R_HI16_SLO, /* type */ | |
228 | 16, /* rightshift */ | |
229 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
230 | 16, /* bitsize */ | |
231 | false, /* pc_relative */ | |
232 | 0, /* bitpos */ | |
233 | complain_overflow_dont, /* complain_on_overflow */ | |
234 | m32r_elf_hi16_reloc, /* special_function */ | |
235 | "R_M32R_HI16_SLO", /* name */ | |
236 | true, /* partial_inplace */ | |
237 | 0x0000ffff, /* src_mask */ | |
238 | 0x0000ffff, /* dst_mask */ | |
239 | false), /* pcrel_offset */ | |
240 | ||
241 | /* Lower 16 bits of address. */ | |
242 | HOWTO (R_M32R_LO16, /* type */ | |
243 | 0, /* rightshift */ | |
244 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
245 | 16, /* bitsize */ | |
246 | false, /* pc_relative */ | |
247 | 0, /* bitpos */ | |
248 | complain_overflow_dont, /* complain_on_overflow */ | |
249 | m32r_elf_lo16_reloc, /* special_function */ | |
250 | "R_M32R_LO16", /* name */ | |
251 | true, /* partial_inplace */ | |
252 | 0x0000ffff, /* src_mask */ | |
253 | 0x0000ffff, /* dst_mask */ | |
254 | false), /* pcrel_offset */ | |
255 | ||
256 | /* Small data area 16 bits offset. */ | |
257 | HOWTO (R_M32R_SDA16, /* type */ | |
258 | 0, /* rightshift */ | |
259 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
260 | 16, /* bitsize */ | |
261 | false, /* pc_relative */ | |
262 | 0, /* bitpos */ | |
263 | complain_overflow_signed, /* complain_on_overflow */ | |
264 | m32r_elf_sda16_reloc, /* special_function */ | |
265 | "R_M32R_SDA16", /* name */ | |
266 | true, /* partial_inplace */ /* FIXME: correct? */ | |
267 | 0x0000ffff, /* src_mask */ | |
268 | 0x0000ffff, /* dst_mask */ | |
269 | false), /* pcrel_offset */ | |
270 | ||
271 | /* GNU extension to record C++ vtable hierarchy */ | |
272 | HOWTO (R_M32R_GNU_VTINHERIT, /* type */ | |
273 | 0, /* rightshift */ | |
274 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
275 | 0, /* bitsize */ | |
276 | false, /* pc_relative */ | |
277 | 0, /* bitpos */ | |
278 | complain_overflow_dont, /* complain_on_overflow */ | |
279 | NULL, /* special_function */ | |
280 | "R_M32R_GNU_VTINHERIT", /* name */ | |
281 | false, /* partial_inplace */ | |
282 | 0, /* src_mask */ | |
283 | 0, /* dst_mask */ | |
284 | false), /* pcrel_offset */ | |
285 | ||
286 | /* GNU extension to record C++ vtable member usage */ | |
287 | HOWTO (R_M32R_GNU_VTENTRY, /* type */ | |
288 | 0, /* rightshift */ | |
289 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
290 | 0, /* bitsize */ | |
291 | false, /* pc_relative */ | |
292 | 0, /* bitpos */ | |
293 | complain_overflow_dont, /* complain_on_overflow */ | |
294 | _bfd_elf_rel_vtable_reloc_fn, /* special_function */ | |
295 | "R_M32R_GNU_VTENTRY", /* name */ | |
296 | false, /* partial_inplace */ | |
297 | 0, /* src_mask */ | |
298 | 0, /* dst_mask */ | |
299 | false), /* pcrel_offset */ | |
300 | ||
301 | }; | |
302 | \f | |
303 | /* Handle the R_M32R_10_PCREL reloc. */ | |
304 | ||
305 | static bfd_reloc_status_type | |
306 | m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data, | |
307 | input_section, output_bfd, error_message) | |
308 | bfd * abfd; | |
309 | arelent * reloc_entry; | |
310 | asymbol * symbol; | |
311 | PTR data; | |
312 | asection * input_section; | |
313 | bfd * output_bfd; | |
5f771d47 | 314 | char ** error_message ATTRIBUTE_UNUSED; |
252b5132 RH |
315 | { |
316 | /* This part is from bfd_elf_generic_reloc. */ | |
317 | if (output_bfd != (bfd *) NULL | |
318 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
319 | && (! reloc_entry->howto->partial_inplace | |
320 | || reloc_entry->addend == 0)) | |
321 | { | |
322 | reloc_entry->address += input_section->output_offset; | |
323 | return bfd_reloc_ok; | |
324 | } | |
325 | ||
326 | if (output_bfd != NULL) | |
327 | { | |
328 | /* FIXME: See bfd_perform_relocation. Is this right? */ | |
329 | return bfd_reloc_continue; | |
330 | } | |
331 | ||
332 | return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto, | |
333 | input_section, | |
334 | data, reloc_entry->address, | |
335 | symbol->section, | |
336 | (symbol->value | |
337 | + symbol->section->output_section->vma | |
338 | + symbol->section->output_offset), | |
339 | reloc_entry->addend); | |
340 | } | |
341 | ||
342 | /* Utility to actually perform an R_M32R_10_PCREL reloc. */ | |
343 | ||
344 | static bfd_reloc_status_type | |
345 | m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset, | |
346 | symbol_section, symbol_value, addend) | |
347 | bfd *abfd; | |
348 | reloc_howto_type *howto; | |
349 | asection *input_section; | |
350 | bfd_byte *data; | |
351 | bfd_vma offset; | |
5f771d47 | 352 | asection *symbol_section ATTRIBUTE_UNUSED; |
252b5132 RH |
353 | bfd_vma symbol_value; |
354 | bfd_vma addend; | |
355 | { | |
356 | bfd_signed_vma relocation; | |
357 | unsigned long x; | |
358 | bfd_reloc_status_type status; | |
359 | ||
360 | /* Sanity check the address (offset in section). */ | |
361 | if (offset > input_section->_cooked_size) | |
362 | return bfd_reloc_outofrange; | |
363 | ||
364 | relocation = symbol_value + addend; | |
365 | /* Make it pc relative. */ | |
366 | relocation -= (input_section->output_section->vma | |
367 | + input_section->output_offset); | |
368 | /* These jumps mask off the lower two bits of the current address | |
369 | before doing pcrel calculations. */ | |
dc810e39 | 370 | relocation -= (offset & -(bfd_vma) 4); |
252b5132 RH |
371 | |
372 | if (relocation < -0x200 || relocation > 0x1ff) | |
373 | status = bfd_reloc_overflow; | |
374 | else | |
375 | status = bfd_reloc_ok; | |
376 | ||
377 | x = bfd_get_16 (abfd, data + offset); | |
378 | relocation >>= howto->rightshift; | |
379 | relocation <<= howto->bitpos; | |
380 | x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask); | |
dc810e39 | 381 | bfd_put_16 (abfd, (bfd_vma) x, data + offset); |
252b5132 RH |
382 | |
383 | return status; | |
384 | } | |
385 | ||
386 | /* Handle the R_M32R_HI16_[SU]LO relocs. | |
387 | HI16_SLO is for the add3 and load/store with displacement instructions. | |
388 | HI16_ULO is for the or3 instruction. | |
389 | For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to | |
390 | the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then | |
391 | we must add one to the high 16 bytes (which will get subtracted off when | |
392 | the low 16 bits are added). | |
393 | These relocs have to be done in combination with an R_M32R_LO16 reloc | |
394 | because there is a carry from the LO16 to the HI16. Here we just save | |
395 | the information we need; we do the actual relocation when we see the LO16. | |
396 | This code is copied from the elf32-mips.c. We also support an arbitrary | |
397 | number of HI16 relocs to be associated with a single LO16 reloc. The | |
398 | assembler sorts the relocs to ensure each HI16 immediately precedes its | |
399 | LO16. However if there are multiple copies, the assembler may not find | |
400 | the real LO16 so it picks the first one it finds. */ | |
401 | ||
402 | struct m32r_hi16 | |
403 | { | |
404 | struct m32r_hi16 *next; | |
405 | bfd_byte *addr; | |
406 | bfd_vma addend; | |
407 | }; | |
408 | ||
409 | /* FIXME: This should not be a static variable. */ | |
410 | ||
411 | static struct m32r_hi16 *m32r_hi16_list; | |
412 | ||
413 | static bfd_reloc_status_type | |
414 | m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data, | |
415 | input_section, output_bfd, error_message) | |
5f771d47 | 416 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
417 | arelent *reloc_entry; |
418 | asymbol *symbol; | |
419 | PTR data; | |
420 | asection *input_section; | |
421 | bfd *output_bfd; | |
5f771d47 | 422 | char **error_message ATTRIBUTE_UNUSED; |
252b5132 RH |
423 | { |
424 | bfd_reloc_status_type ret; | |
425 | bfd_vma relocation; | |
426 | struct m32r_hi16 *n; | |
427 | ||
428 | /* This part is from bfd_elf_generic_reloc. | |
429 | If we're relocating, and this an external symbol, we don't want | |
430 | to change anything. */ | |
431 | if (output_bfd != (bfd *) NULL | |
432 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
433 | && reloc_entry->addend == 0) | |
434 | { | |
435 | reloc_entry->address += input_section->output_offset; | |
436 | return bfd_reloc_ok; | |
437 | } | |
438 | ||
439 | /* Sanity check the address (offset in section). */ | |
440 | if (reloc_entry->address > input_section->_cooked_size) | |
441 | return bfd_reloc_outofrange; | |
442 | ||
443 | ret = bfd_reloc_ok; | |
444 | if (bfd_is_und_section (symbol->section) | |
445 | && output_bfd == (bfd *) NULL) | |
446 | ret = bfd_reloc_undefined; | |
447 | ||
448 | if (bfd_is_com_section (symbol->section)) | |
449 | relocation = 0; | |
450 | else | |
451 | relocation = symbol->value; | |
452 | ||
453 | relocation += symbol->section->output_section->vma; | |
454 | relocation += symbol->section->output_offset; | |
455 | relocation += reloc_entry->addend; | |
456 | ||
457 | /* Save the information, and let LO16 do the actual relocation. */ | |
dc810e39 | 458 | n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n); |
252b5132 RH |
459 | if (n == NULL) |
460 | return bfd_reloc_outofrange; | |
461 | n->addr = (bfd_byte *) data + reloc_entry->address; | |
462 | n->addend = relocation; | |
463 | n->next = m32r_hi16_list; | |
464 | m32r_hi16_list = n; | |
465 | ||
466 | if (output_bfd != (bfd *) NULL) | |
467 | reloc_entry->address += input_section->output_offset; | |
468 | ||
469 | return ret; | |
470 | } | |
471 | ||
472 | /* Handle an M32R ELF HI16 reloc. */ | |
473 | ||
474 | static void | |
475 | m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend) | |
476 | bfd *input_bfd; | |
477 | int type; | |
478 | Elf_Internal_Rela *relhi; | |
479 | Elf_Internal_Rela *rello; | |
480 | bfd_byte *contents; | |
481 | bfd_vma addend; | |
482 | { | |
483 | unsigned long insn; | |
484 | bfd_vma addlo; | |
485 | ||
486 | insn = bfd_get_32 (input_bfd, contents + relhi->r_offset); | |
487 | ||
488 | addlo = bfd_get_32 (input_bfd, contents + rello->r_offset); | |
489 | if (type == R_M32R_HI16_SLO) | |
490 | addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000; | |
491 | else | |
492 | addlo &= 0xffff; | |
493 | ||
494 | addend += ((insn & 0xffff) << 16) + addlo; | |
495 | ||
496 | /* Reaccount for sign extension of low part. */ | |
497 | if (type == R_M32R_HI16_SLO | |
498 | && (addend & 0x8000) != 0) | |
499 | addend += 0x10000; | |
500 | ||
501 | bfd_put_32 (input_bfd, | |
502 | (insn & 0xffff0000) | ((addend >> 16) & 0xffff), | |
503 | contents + relhi->r_offset); | |
504 | } | |
505 | ||
506 | /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit | |
507 | inplace relocation; this function exists in order to do the | |
508 | R_M32R_HI16_[SU]LO relocation described above. */ | |
509 | ||
510 | bfd_reloc_status_type | |
4c72e23a | 511 | m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data, |
252b5132 | 512 | input_section, output_bfd, error_message) |
4c72e23a | 513 | bfd *input_bfd; |
252b5132 RH |
514 | arelent *reloc_entry; |
515 | asymbol *symbol; | |
516 | PTR data; | |
517 | asection *input_section; | |
518 | bfd *output_bfd; | |
519 | char **error_message; | |
520 | { | |
4c72e23a CM |
521 | /* This part is from bfd_elf_generic_reloc. |
522 | If we're relocating, and this an external symbol, we don't want | |
523 | to change anything. */ | |
524 | if (output_bfd != (bfd *) NULL | |
525 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
526 | && reloc_entry->addend == 0) | |
527 | { | |
528 | reloc_entry->address += input_section->output_offset; | |
529 | return bfd_reloc_ok; | |
530 | } | |
531 | ||
252b5132 RH |
532 | if (m32r_hi16_list != NULL) |
533 | { | |
534 | struct m32r_hi16 *l; | |
535 | ||
536 | l = m32r_hi16_list; | |
537 | while (l != NULL) | |
538 | { | |
539 | unsigned long insn; | |
540 | unsigned long val; | |
541 | unsigned long vallo; | |
542 | struct m32r_hi16 *next; | |
543 | ||
544 | /* Do the HI16 relocation. Note that we actually don't need | |
545 | to know anything about the LO16 itself, except where to | |
546 | find the low 16 bits of the addend needed by the LO16. */ | |
4c72e23a CM |
547 | insn = bfd_get_32 (input_bfd, l->addr); |
548 | vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address) | |
252b5132 RH |
549 | & 0xffff) ^ 0x8000) - 0x8000; |
550 | val = ((insn & 0xffff) << 16) + vallo; | |
551 | val += l->addend; | |
552 | ||
553 | /* Reaccount for sign extension of low part. */ | |
554 | if ((val & 0x8000) != 0) | |
555 | val += 0x10000; | |
556 | ||
dc810e39 AM |
557 | insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff); |
558 | bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr); | |
252b5132 RH |
559 | |
560 | next = l->next; | |
561 | free (l); | |
562 | l = next; | |
563 | } | |
564 | ||
565 | m32r_hi16_list = NULL; | |
566 | } | |
567 | ||
4c72e23a CM |
568 | /* Now do the LO16 reloc in the usual way. |
569 | ??? It would be nice to call bfd_elf_generic_reloc here, | |
570 | but we have partial_inplace == TRUE. bfd_elf_generic_reloc will | |
571 | pass the handling back to bfd_install_relocation which will install | |
572 | a section relative addend which is wrong. */ | |
8b125cde DE |
573 | return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data, |
574 | input_section, output_bfd, error_message); | |
575 | } | |
576 | ||
c3668558 KH |
577 | /* Do generic partial_inplace relocation. |
578 | This is a local replacement for bfd_elf_generic_reloc. */ | |
8b125cde DE |
579 | |
580 | bfd_reloc_status_type | |
581 | m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data, | |
582 | input_section, output_bfd, error_message) | |
583 | bfd *input_bfd; | |
584 | arelent *reloc_entry; | |
585 | asymbol *symbol; | |
586 | PTR data; | |
587 | asection *input_section; | |
588 | bfd *output_bfd; | |
23ccc829 | 589 | char **error_message ATTRIBUTE_UNUSED; |
8b125cde DE |
590 | { |
591 | bfd_reloc_status_type ret; | |
592 | bfd_vma relocation; | |
593 | bfd_byte *inplace_address; | |
594 | ||
595 | /* This part is from bfd_elf_generic_reloc. | |
596 | If we're relocating, and this an external symbol, we don't want | |
597 | to change anything. */ | |
598 | if (output_bfd != (bfd *) NULL | |
599 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
600 | && reloc_entry->addend == 0) | |
601 | { | |
602 | reloc_entry->address += input_section->output_offset; | |
603 | return bfd_reloc_ok; | |
604 | } | |
605 | ||
08da05b0 | 606 | /* Now do the reloc in the usual way. |
8b125cde DE |
607 | ??? It would be nice to call bfd_elf_generic_reloc here, |
608 | but we have partial_inplace == TRUE. bfd_elf_generic_reloc will | |
609 | pass the handling back to bfd_install_relocation which will install | |
610 | a section relative addend which is wrong. */ | |
4c72e23a CM |
611 | |
612 | /* Sanity check the address (offset in section). */ | |
613 | if (reloc_entry->address > input_section->_cooked_size) | |
614 | return bfd_reloc_outofrange; | |
615 | ||
616 | ret = bfd_reloc_ok; | |
617 | if (bfd_is_und_section (symbol->section) | |
618 | && output_bfd == (bfd *) NULL) | |
619 | ret = bfd_reloc_undefined; | |
620 | ||
621 | if (bfd_is_com_section (symbol->section) | |
622 | || output_bfd != (bfd *) NULL) | |
623 | relocation = 0; | |
624 | else | |
625 | relocation = symbol->value; | |
626 | ||
627 | /* Only do this for a final link. */ | |
628 | if (output_bfd == (bfd *) NULL) | |
629 | { | |
630 | relocation += symbol->section->output_section->vma; | |
631 | relocation += symbol->section->output_offset; | |
632 | } | |
633 | ||
634 | relocation += reloc_entry->addend; | |
23ccc829 | 635 | inplace_address = (bfd_byte *) data + reloc_entry->address; |
8b125cde DE |
636 | |
637 | #define DOIT(x) \ | |
638 | x = ( (x & ~reloc_entry->howto->dst_mask) | \ | |
639 | (((x & reloc_entry->howto->src_mask) + relocation) & \ | |
640 | reloc_entry->howto->dst_mask)) | |
4c72e23a | 641 | |
8b125cde DE |
642 | switch (reloc_entry->howto->size) |
643 | { | |
644 | case 1: | |
645 | { | |
646 | short x = bfd_get_16 (input_bfd, inplace_address); | |
647 | DOIT (x); | |
dc810e39 | 648 | bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address); |
8b125cde DE |
649 | } |
650 | break; | |
651 | case 2: | |
652 | { | |
653 | unsigned long x = bfd_get_32 (input_bfd, inplace_address); | |
654 | DOIT (x); | |
dc810e39 | 655 | bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address); |
8b125cde DE |
656 | } |
657 | break; | |
658 | default: | |
659 | BFD_ASSERT (0); | |
660 | } | |
4c72e23a CM |
661 | |
662 | if (output_bfd != (bfd *) NULL) | |
663 | reloc_entry->address += input_section->output_offset; | |
664 | ||
665 | return ret; | |
252b5132 RH |
666 | } |
667 | ||
668 | /* Handle the R_M32R_SDA16 reloc. | |
669 | This reloc is used to compute the address of objects in the small data area | |
670 | and to perform loads and stores from that area. | |
671 | The lower 16 bits are sign extended and added to the register specified | |
672 | in the instruction, which is assumed to point to _SDA_BASE_. */ | |
673 | ||
674 | static bfd_reloc_status_type | |
675 | m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data, | |
676 | input_section, output_bfd, error_message) | |
5f771d47 | 677 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
678 | arelent *reloc_entry; |
679 | asymbol *symbol; | |
5f771d47 | 680 | PTR data ATTRIBUTE_UNUSED; |
252b5132 RH |
681 | asection *input_section; |
682 | bfd *output_bfd; | |
5f771d47 | 683 | char **error_message ATTRIBUTE_UNUSED; |
252b5132 RH |
684 | { |
685 | /* This part is from bfd_elf_generic_reloc. */ | |
686 | if (output_bfd != (bfd *) NULL | |
687 | && (symbol->flags & BSF_SECTION_SYM) == 0 | |
688 | && (! reloc_entry->howto->partial_inplace | |
689 | || reloc_entry->addend == 0)) | |
690 | { | |
691 | reloc_entry->address += input_section->output_offset; | |
692 | return bfd_reloc_ok; | |
693 | } | |
694 | ||
695 | if (output_bfd != NULL) | |
696 | { | |
697 | /* FIXME: See bfd_perform_relocation. Is this right? */ | |
698 | return bfd_reloc_continue; | |
699 | } | |
700 | ||
701 | /* FIXME: not sure what to do here yet. But then again, the linker | |
702 | may never call us. */ | |
703 | abort (); | |
704 | } | |
705 | \f | |
706 | /* Map BFD reloc types to M32R ELF reloc types. */ | |
707 | ||
708 | struct m32r_reloc_map | |
709 | { | |
710 | bfd_reloc_code_real_type bfd_reloc_val; | |
711 | unsigned char elf_reloc_val; | |
712 | }; | |
713 | ||
714 | static const struct m32r_reloc_map m32r_reloc_map[] = | |
715 | { | |
716 | { BFD_RELOC_NONE, R_M32R_NONE }, | |
717 | { BFD_RELOC_16, R_M32R_16 }, | |
718 | { BFD_RELOC_32, R_M32R_32 }, | |
719 | { BFD_RELOC_M32R_24, R_M32R_24 }, | |
720 | { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL }, | |
721 | { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL }, | |
722 | { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL }, | |
723 | { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO }, | |
724 | { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO }, | |
725 | { BFD_RELOC_M32R_LO16, R_M32R_LO16 }, | |
726 | { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 }, | |
727 | { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT }, | |
728 | { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY }, | |
729 | }; | |
730 | ||
731 | static reloc_howto_type * | |
732 | bfd_elf32_bfd_reloc_type_lookup (abfd, code) | |
5f771d47 | 733 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
734 | bfd_reloc_code_real_type code; |
735 | { | |
736 | unsigned int i; | |
737 | ||
738 | for (i = 0; | |
739 | i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map); | |
740 | i++) | |
741 | { | |
742 | if (m32r_reloc_map[i].bfd_reloc_val == code) | |
743 | return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val]; | |
744 | } | |
745 | ||
746 | return NULL; | |
747 | } | |
748 | ||
749 | /* Set the howto pointer for an M32R ELF reloc. */ | |
750 | ||
751 | static void | |
752 | m32r_info_to_howto_rel (abfd, cache_ptr, dst) | |
5f771d47 | 753 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
754 | arelent *cache_ptr; |
755 | Elf32_Internal_Rel *dst; | |
756 | { | |
757 | unsigned int r_type; | |
758 | ||
759 | r_type = ELF32_R_TYPE (dst->r_info); | |
760 | BFD_ASSERT (r_type < (unsigned int) R_M32R_max); | |
761 | cache_ptr->howto = &m32r_elf_howto_table[r_type]; | |
762 | } | |
763 | \f | |
764 | /* Given a BFD section, try to locate the corresponding ELF section | |
765 | index. */ | |
766 | ||
767 | boolean | |
af746e92 | 768 | _bfd_m32r_elf_section_from_bfd_section (abfd, sec, retval) |
5f771d47 | 769 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
770 | asection *sec; |
771 | int *retval; | |
772 | { | |
773 | if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0) | |
774 | { | |
775 | *retval = SHN_M32R_SCOMMON; | |
776 | return true; | |
777 | } | |
778 | return false; | |
779 | } | |
780 | ||
781 | /* M32R ELF uses two common sections. One is the usual one, and the other | |
782 | is for small objects. All the small objects are kept together, and then | |
783 | referenced via one register, which yields faster assembler code. It is | |
784 | up to the compiler to emit an instruction to load the register with | |
785 | _SDA_BASE. This is what we use for the small common section. This | |
786 | approach is copied from elf32-mips.c. */ | |
787 | static asection m32r_elf_scom_section; | |
788 | static asymbol m32r_elf_scom_symbol; | |
789 | static asymbol *m32r_elf_scom_symbol_ptr; | |
790 | ||
791 | /* Handle the special M32R section numbers that a symbol may use. */ | |
792 | ||
793 | void | |
794 | _bfd_m32r_elf_symbol_processing (abfd, asym) | |
5f771d47 | 795 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
796 | asymbol *asym; |
797 | { | |
798 | elf_symbol_type *elfsym; | |
799 | ||
800 | elfsym = (elf_symbol_type *) asym; | |
801 | ||
802 | switch (elfsym->internal_elf_sym.st_shndx) | |
803 | { | |
804 | case SHN_M32R_SCOMMON: | |
805 | if (m32r_elf_scom_section.name == NULL) | |
806 | { | |
807 | /* Initialize the small common section. */ | |
808 | m32r_elf_scom_section.name = ".scommon"; | |
809 | m32r_elf_scom_section.flags = SEC_IS_COMMON; | |
810 | m32r_elf_scom_section.output_section = &m32r_elf_scom_section; | |
811 | m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol; | |
812 | m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr; | |
813 | m32r_elf_scom_symbol.name = ".scommon"; | |
814 | m32r_elf_scom_symbol.flags = BSF_SECTION_SYM; | |
815 | m32r_elf_scom_symbol.section = &m32r_elf_scom_section; | |
816 | m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol; | |
817 | } | |
818 | asym->section = &m32r_elf_scom_section; | |
819 | asym->value = elfsym->internal_elf_sym.st_size; | |
820 | break; | |
821 | } | |
822 | } | |
823 | ||
824 | /* Hook called by the linker routine which adds symbols from an object | |
825 | file. We must handle the special M32R section numbers here. | |
826 | We also keep watching for whether we need to create the sdata special | |
827 | linker sections. */ | |
828 | ||
829 | static boolean | |
830 | m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp) | |
831 | bfd *abfd; | |
832 | struct bfd_link_info *info; | |
833 | const Elf_Internal_Sym *sym; | |
834 | const char **namep; | |
5f771d47 | 835 | flagword *flagsp ATTRIBUTE_UNUSED; |
252b5132 RH |
836 | asection **secp; |
837 | bfd_vma *valp; | |
838 | { | |
839 | if (! info->relocateable | |
840 | && (*namep)[0] == '_' && (*namep)[1] == 'S' | |
4ab82700 AM |
841 | && strcmp (*namep, "_SDA_BASE_") == 0 |
842 | && info->hash->creator->flavour == bfd_target_elf_flavour) | |
252b5132 RH |
843 | { |
844 | /* This is simpler than using _bfd_elf_create_linker_section | |
845 | (our needs are simpler than ppc's needs). Also | |
846 | _bfd_elf_create_linker_section currently has a bug where if a .sdata | |
847 | section already exists a new one is created that follows it which | |
848 | screws of _SDA_BASE_ address calcs because output_offset != 0. */ | |
849 | struct elf_link_hash_entry *h; | |
850 | asection *s = bfd_get_section_by_name (abfd, ".sdata"); | |
851 | ||
852 | /* The following code was cobbled from elf32-ppc.c and elflink.c. */ | |
853 | ||
854 | if (s == NULL) | |
855 | { | |
dc810e39 AM |
856 | flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS |
857 | | SEC_IN_MEMORY | SEC_LINKER_CREATED); | |
252b5132 RH |
858 | |
859 | s = bfd_make_section_anyway (abfd, ".sdata"); | |
860 | if (s == NULL) | |
861 | return false; | |
862 | bfd_set_section_flags (abfd, s, flags); | |
863 | bfd_set_section_alignment (abfd, s, 2); | |
864 | } | |
865 | ||
866 | h = (struct elf_link_hash_entry *) | |
867 | bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false); | |
868 | ||
869 | if ((h == NULL || h->root.type == bfd_link_hash_undefined) | |
870 | && !(_bfd_generic_link_add_one_symbol (info, | |
871 | abfd, | |
872 | "_SDA_BASE_", | |
873 | BSF_GLOBAL, | |
874 | s, | |
dc810e39 | 875 | (bfd_vma) 32768, |
252b5132 RH |
876 | (const char *) NULL, |
877 | false, | |
878 | get_elf_backend_data (abfd)->collect, | |
879 | (struct bfd_link_hash_entry **) &h))) | |
880 | return false; | |
881 | h->type = STT_OBJECT; | |
882 | } | |
883 | ||
884 | switch (sym->st_shndx) | |
885 | { | |
886 | case SHN_M32R_SCOMMON: | |
887 | *secp = bfd_make_section_old_way (abfd, ".scommon"); | |
888 | (*secp)->flags |= SEC_IS_COMMON; | |
889 | *valp = sym->st_size; | |
890 | break; | |
891 | } | |
892 | ||
893 | return true; | |
894 | } | |
895 | ||
896 | /* We have to figure out the SDA_BASE value, so that we can adjust the | |
897 | symbol value correctly. We look up the symbol _SDA_BASE_ in the output | |
898 | BFD. If we can't find it, we're stuck. We cache it in the ELF | |
899 | target data. We don't need to adjust the symbol value for an | |
900 | external symbol if we are producing relocateable output. */ | |
901 | ||
902 | static bfd_reloc_status_type | |
903 | m32r_elf_final_sda_base (output_bfd, info, error_message, psb) | |
904 | bfd *output_bfd; | |
905 | struct bfd_link_info *info; | |
906 | const char **error_message; | |
907 | bfd_vma *psb; | |
908 | { | |
909 | if (elf_gp (output_bfd) == 0) | |
910 | { | |
911 | struct bfd_link_hash_entry *h; | |
912 | ||
913 | h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true); | |
914 | if (h != (struct bfd_link_hash_entry *) NULL | |
915 | && h->type == bfd_link_hash_defined) | |
916 | elf_gp (output_bfd) = (h->u.def.value | |
917 | + h->u.def.section->output_section->vma | |
918 | + h->u.def.section->output_offset); | |
919 | else | |
920 | { | |
921 | /* Only get the error once. */ | |
922 | *psb = elf_gp (output_bfd) = 4; | |
923 | *error_message = | |
924 | (const char *) _("SDA relocation when _SDA_BASE_ not defined"); | |
925 | return bfd_reloc_dangerous; | |
926 | } | |
927 | } | |
928 | *psb = elf_gp (output_bfd); | |
929 | return bfd_reloc_ok; | |
930 | } | |
931 | \f | |
932 | /* Relocate an M32R/D ELF section. | |
933 | There is some attempt to make this function usable for many architectures, | |
934 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], | |
935 | if only to serve as a learning tool. | |
936 | ||
937 | The RELOCATE_SECTION function is called by the new ELF backend linker | |
938 | to handle the relocations for a section. | |
939 | ||
940 | The relocs are always passed as Rela structures; if the section | |
941 | actually uses Rel structures, the r_addend field will always be | |
942 | zero. | |
943 | ||
944 | This function is responsible for adjust the section contents as | |
945 | necessary, and (if using Rela relocs and generating a | |
946 | relocateable output file) adjusting the reloc addend as | |
947 | necessary. | |
948 | ||
949 | This function does not have to worry about setting the reloc | |
950 | address or the reloc symbol index. | |
951 | ||
952 | LOCAL_SYMS is a pointer to the swapped in local symbols. | |
953 | ||
954 | LOCAL_SECTIONS is an array giving the section in the input file | |
955 | corresponding to the st_shndx field of each local symbol. | |
956 | ||
957 | The global hash table entry for the global symbols can be found | |
958 | via elf_sym_hashes (input_bfd). | |
959 | ||
960 | When generating relocateable output, this function must handle | |
961 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is | |
962 | going to be the section symbol corresponding to the output | |
963 | section, which means that the addend must be adjusted | |
964 | accordingly. */ | |
965 | ||
966 | static boolean | |
967 | m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, | |
968 | contents, relocs, local_syms, local_sections) | |
5f771d47 | 969 | bfd *output_bfd ATTRIBUTE_UNUSED; |
252b5132 RH |
970 | struct bfd_link_info *info; |
971 | bfd *input_bfd; | |
972 | asection *input_section; | |
973 | bfd_byte *contents; | |
974 | Elf_Internal_Rela *relocs; | |
975 | Elf_Internal_Sym *local_syms; | |
976 | asection **local_sections; | |
977 | { | |
978 | Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
979 | struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); | |
980 | Elf_Internal_Rela *rel, *relend; | |
981 | /* Assume success. */ | |
982 | boolean ret = true; | |
983 | ||
b491616a AM |
984 | #ifndef USE_REL |
985 | if (info->relocateable) | |
986 | return true; | |
987 | #endif | |
988 | ||
252b5132 RH |
989 | rel = relocs; |
990 | relend = relocs + input_section->reloc_count; | |
991 | for (; rel < relend; rel++) | |
992 | { | |
993 | int r_type; | |
994 | reloc_howto_type *howto; | |
995 | unsigned long r_symndx; | |
996 | /* We can't modify r_addend here as elf_link_input_bfd has an assert to | |
997 | ensure it's zero (we use REL relocs, not RELA). Therefore this | |
998 | should be assigning zero to `addend', but for clarity we use | |
999 | `r_addend'. */ | |
1000 | bfd_vma addend = rel->r_addend; | |
1001 | bfd_vma offset = rel->r_offset; | |
1002 | struct elf_link_hash_entry *h; | |
1003 | Elf_Internal_Sym *sym; | |
1004 | asection *sec; | |
1005 | const char *sym_name; | |
1006 | bfd_reloc_status_type r; | |
1007 | const char *errmsg = NULL; | |
1008 | ||
1009 | h = NULL; | |
1010 | r_type = ELF32_R_TYPE (rel->r_info); | |
1011 | if (r_type < 0 || r_type >= (int) R_M32R_max) | |
1012 | { | |
1013 | (*_bfd_error_handler) (_("%s: unknown relocation type %d"), | |
8f615d07 | 1014 | bfd_archive_filename (input_bfd), |
252b5132 RH |
1015 | (int) r_type); |
1016 | bfd_set_error (bfd_error_bad_value); | |
1017 | ret = false; | |
1018 | continue; | |
1019 | } | |
1020 | ||
1021 | if (r_type == R_M32R_GNU_VTENTRY | |
1022 | || r_type == R_M32R_GNU_VTINHERIT) | |
1023 | continue; | |
1024 | ||
1025 | howto = m32r_elf_howto_table + r_type; | |
1026 | r_symndx = ELF32_R_SYM (rel->r_info); | |
1027 | ||
b491616a | 1028 | #ifdef USE_REL |
252b5132 RH |
1029 | if (info->relocateable) |
1030 | { | |
1031 | /* This is a relocateable link. We don't have to change | |
1032 | anything, unless the reloc is against a section symbol, | |
1033 | in which case we have to adjust according to where the | |
1034 | section symbol winds up in the output section. */ | |
1035 | sec = NULL; | |
1036 | if (r_symndx >= symtab_hdr->sh_info) | |
1037 | { | |
1038 | /* External symbol. */ | |
1039 | continue; | |
1040 | } | |
1041 | ||
1042 | /* Local symbol. */ | |
1043 | sym = local_syms + r_symndx; | |
1044 | sym_name = "<local symbol>"; | |
1045 | /* STT_SECTION: symbol is associated with a section. */ | |
1046 | if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) | |
1047 | { | |
1048 | /* Symbol isn't associated with a section. Nothing to do. */ | |
1049 | continue; | |
1050 | } | |
1051 | ||
1052 | sec = local_sections[r_symndx]; | |
1053 | addend += sec->output_offset + sym->st_value; | |
252b5132 | 1054 | |
252b5132 RH |
1055 | /* If partial_inplace, we need to store any additional addend |
1056 | back in the section. */ | |
1057 | if (! howto->partial_inplace) | |
1058 | continue; | |
1059 | /* ??? Here is a nice place to call a special_function | |
1060 | like handler. */ | |
1061 | if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO) | |
1062 | r = _bfd_relocate_contents (howto, input_bfd, | |
1063 | addend, contents + offset); | |
1064 | else | |
1065 | { | |
1066 | Elf_Internal_Rela *lorel; | |
1067 | ||
1068 | /* We allow an arbitrary number of HI16 relocs before the | |
1069 | LO16 reloc. This permits gcc to emit the HI and LO relocs | |
1070 | itself. */ | |
1071 | for (lorel = rel + 1; | |
1072 | (lorel < relend | |
1073 | && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO | |
1074 | || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); | |
1075 | lorel++) | |
1076 | continue; | |
1077 | if (lorel < relend | |
1078 | && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) | |
1079 | { | |
1080 | m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, | |
1081 | contents, addend); | |
1082 | r = bfd_reloc_ok; | |
1083 | } | |
1084 | else | |
1085 | r = _bfd_relocate_contents (howto, input_bfd, | |
1086 | addend, contents + offset); | |
1087 | } | |
252b5132 RH |
1088 | } |
1089 | else | |
b491616a | 1090 | #endif /* USE_REL */ |
252b5132 RH |
1091 | { |
1092 | bfd_vma relocation; | |
1093 | ||
1094 | /* This is a final link. */ | |
1095 | sym = NULL; | |
1096 | sec = NULL; | |
1097 | ||
1098 | if (r_symndx < symtab_hdr->sh_info) | |
1099 | { | |
1100 | /* Local symbol. */ | |
1101 | sym = local_syms + r_symndx; | |
1102 | sec = local_sections[r_symndx]; | |
1103 | sym_name = "<local symbol>"; | |
f8df10f4 JJ |
1104 | #ifndef USE_REL |
1105 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, sec, rel); | |
1106 | addend = rel->r_addend; | |
1107 | #else | |
1108 | /* FIXME: This won't handle local relocations against SEC_MERGE | |
1109 | symbols. See elf32-i386.c for how to do this. */ | |
252b5132 RH |
1110 | relocation = (sec->output_section->vma |
1111 | + sec->output_offset | |
1112 | + sym->st_value); | |
f8df10f4 | 1113 | #endif |
252b5132 RH |
1114 | } |
1115 | else | |
1116 | { | |
1117 | /* External symbol. */ | |
1118 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
1119 | while (h->root.type == bfd_link_hash_indirect | |
1120 | || h->root.type == bfd_link_hash_warning) | |
1121 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
1122 | sym_name = h->root.root.string; | |
1123 | ||
1124 | if (h->root.type == bfd_link_hash_defined | |
1125 | || h->root.type == bfd_link_hash_defweak) | |
1126 | { | |
1127 | sec = h->root.u.def.section; | |
1128 | if (sec->output_section == NULL) | |
1129 | relocation = 0; | |
1130 | else | |
1131 | relocation = (h->root.u.def.value | |
1132 | + sec->output_section->vma | |
1133 | + sec->output_offset); | |
1134 | } | |
1135 | else if (h->root.type == bfd_link_hash_undefweak) | |
1136 | relocation = 0; | |
1137 | else | |
1138 | { | |
1139 | if (! ((*info->callbacks->undefined_symbol) | |
1140 | (info, h->root.root.string, input_bfd, | |
5cc7c785 | 1141 | input_section, offset, true))) |
252b5132 RH |
1142 | return false; |
1143 | relocation = 0; | |
1144 | } | |
1145 | } | |
1146 | ||
1147 | /* Sanity check the address. */ | |
1148 | if (offset > input_section->_raw_size) | |
1149 | { | |
1150 | r = bfd_reloc_outofrange; | |
1151 | goto check_reloc; | |
1152 | } | |
1153 | ||
1154 | switch ((int) r_type) | |
1155 | { | |
1156 | case (int) R_M32R_10_PCREL : | |
1157 | r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section, | |
1158 | contents, offset, | |
1159 | sec, relocation, addend); | |
1160 | break; | |
1161 | ||
1162 | case (int) R_M32R_HI16_SLO : | |
1163 | case (int) R_M32R_HI16_ULO : | |
1164 | { | |
1165 | Elf_Internal_Rela *lorel; | |
1166 | ||
1167 | /* We allow an arbitrary number of HI16 relocs before the | |
1168 | LO16 reloc. This permits gcc to emit the HI and LO relocs | |
1169 | itself. */ | |
1170 | for (lorel = rel + 1; | |
1171 | (lorel < relend | |
1172 | && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO | |
1173 | || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); | |
1174 | lorel++) | |
1175 | continue; | |
1176 | if (lorel < relend | |
1177 | && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) | |
1178 | { | |
1179 | m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, | |
1180 | contents, relocation + addend); | |
1181 | r = bfd_reloc_ok; | |
1182 | } | |
1183 | else | |
1184 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1185 | contents, offset, | |
1186 | relocation, addend); | |
1187 | } | |
1188 | break; | |
1189 | ||
1190 | case (int) R_M32R_SDA16 : | |
1191 | { | |
1192 | const char *name; | |
1193 | ||
1194 | BFD_ASSERT (sec != NULL); | |
1195 | name = bfd_get_section_name (abfd, sec); | |
1196 | ||
1197 | if (strcmp (name, ".sdata") == 0 | |
1198 | || strcmp (name, ".sbss") == 0 | |
1199 | || strcmp (name, ".scommon") == 0) | |
1200 | { | |
1201 | bfd_vma sda_base; | |
1202 | bfd *out_bfd = sec->output_section->owner; | |
1203 | ||
1204 | r = m32r_elf_final_sda_base (out_bfd, info, | |
1205 | &errmsg, | |
1206 | &sda_base); | |
1207 | if (r != bfd_reloc_ok) | |
1208 | { | |
1209 | ret = false; | |
1210 | goto check_reloc; | |
1211 | } | |
1212 | ||
1213 | /* At this point `relocation' contains the object's | |
1214 | address. */ | |
1215 | relocation -= sda_base; | |
1216 | /* Now it contains the offset from _SDA_BASE_. */ | |
1217 | } | |
1218 | else | |
1219 | { | |
8f615d07 AM |
1220 | (*_bfd_error_handler) |
1221 | (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"), | |
1222 | bfd_archive_filename (input_bfd), | |
1223 | sym_name, | |
1224 | m32r_elf_howto_table[(int) r_type].name, | |
1225 | bfd_get_section_name (abfd, sec)); | |
252b5132 RH |
1226 | /*bfd_set_error (bfd_error_bad_value); ??? why? */ |
1227 | ret = false; | |
1228 | continue; | |
1229 | } | |
1230 | } | |
1231 | /* fall through */ | |
1232 | ||
1233 | default : | |
1234 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1235 | contents, offset, | |
1236 | relocation, addend); | |
1237 | break; | |
1238 | } | |
1239 | } | |
1240 | ||
1241 | check_reloc: | |
1242 | ||
1243 | if (r != bfd_reloc_ok) | |
1244 | { | |
1245 | /* FIXME: This should be generic enough to go in a utility. */ | |
1246 | const char *name; | |
1247 | ||
1248 | if (h != NULL) | |
1249 | name = h->root.root.string; | |
1250 | else | |
1251 | { | |
1252 | name = (bfd_elf_string_from_elf_section | |
1253 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
1254 | if (name == NULL || *name == '\0') | |
1255 | name = bfd_section_name (input_bfd, sec); | |
1256 | } | |
1257 | ||
1258 | if (errmsg != NULL) | |
1259 | goto common_error; | |
1260 | ||
1261 | switch (r) | |
1262 | { | |
1263 | case bfd_reloc_overflow: | |
1264 | if (! ((*info->callbacks->reloc_overflow) | |
1265 | (info, name, howto->name, (bfd_vma) 0, | |
1266 | input_bfd, input_section, offset))) | |
1267 | return false; | |
1268 | break; | |
1269 | ||
1270 | case bfd_reloc_undefined: | |
1271 | if (! ((*info->callbacks->undefined_symbol) | |
1272 | (info, name, input_bfd, input_section, | |
5cc7c785 | 1273 | offset, true))) |
252b5132 RH |
1274 | return false; |
1275 | break; | |
1276 | ||
1277 | case bfd_reloc_outofrange: | |
1278 | errmsg = _("internal error: out of range error"); | |
1279 | goto common_error; | |
1280 | ||
1281 | case bfd_reloc_notsupported: | |
1282 | errmsg = _("internal error: unsupported relocation error"); | |
1283 | goto common_error; | |
1284 | ||
1285 | case bfd_reloc_dangerous: | |
1286 | errmsg = _("internal error: dangerous error"); | |
1287 | goto common_error; | |
1288 | ||
1289 | default: | |
1290 | errmsg = _("internal error: unknown error"); | |
1291 | /* fall through */ | |
1292 | ||
1293 | common_error: | |
1294 | if (!((*info->callbacks->warning) | |
1295 | (info, errmsg, name, input_bfd, input_section, | |
1296 | offset))) | |
1297 | return false; | |
1298 | break; | |
1299 | } | |
1300 | } | |
1301 | } | |
1302 | ||
1303 | return ret; | |
1304 | } | |
1305 | \f | |
1306 | #if 0 /* relaxing not supported yet */ | |
1307 | ||
1308 | /* This function handles relaxing for the m32r. | |
1309 | Relaxing on the m32r is tricky because of instruction alignment | |
1310 | requirements (4 byte instructions must be aligned on 4 byte boundaries). | |
1311 | ||
1312 | The following relaxing opportunities are handled: | |
1313 | ||
1314 | seth/add3/jl -> bl24 or bl8 | |
1315 | seth/add3 -> ld24 | |
1316 | ||
1317 | It would be nice to handle bl24 -> bl8 but given: | |
1318 | ||
1319 | - 4 byte insns must be on 4 byte boundaries | |
1320 | - branch instructions only branch to insns on 4 byte boundaries | |
1321 | ||
1322 | this isn't much of a win because the insn in the 2 "deleted" bytes | |
1323 | must become a nop. With some complexity some real relaxation could be | |
1324 | done but the frequency just wouldn't make it worth it; it's better to | |
1325 | try to do all the code compaction one can elsewhere. | |
1326 | When the chip supports parallel 16 bit insns, things may change. | |
1327 | */ | |
1328 | ||
c3668558 | 1329 | static boolean |
252b5132 RH |
1330 | m32r_elf_relax_section (abfd, sec, link_info, again) |
1331 | bfd *abfd; | |
1332 | asection *sec; | |
1333 | struct bfd_link_info *link_info; | |
1334 | boolean *again; | |
1335 | { | |
1336 | Elf_Internal_Shdr *symtab_hdr; | |
1337 | /* The Rela structures are used here because that's what | |
1338 | _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend | |
1339 | field to 0]. */ | |
1340 | Elf_Internal_Rela *internal_relocs; | |
1341 | Elf_Internal_Rela *free_relocs = NULL; | |
1342 | Elf_Internal_Rela *irel, *irelend; | |
1343 | bfd_byte *contents = NULL; | |
1344 | bfd_byte *free_contents = NULL; | |
1345 | Elf32_External_Sym *extsyms = NULL; | |
1346 | Elf32_External_Sym *free_extsyms = NULL; | |
1347 | ||
1348 | /* Assume nothing changes. */ | |
1349 | *again = false; | |
1350 | ||
1351 | /* We don't have to do anything for a relocateable link, if | |
1352 | this section does not have relocs, or if this is not a | |
1353 | code section. */ | |
1354 | if (link_info->relocateable | |
1355 | || (sec->flags & SEC_RELOC) == 0 | |
1356 | || sec->reloc_count == 0 | |
1357 | || (sec->flags & SEC_CODE) == 0 | |
1358 | || 0 /* FIXME: check SHF_M32R_CAN_RELAX */) | |
1359 | return true; | |
1360 | ||
1361 | /* If this is the first time we have been called for this section, | |
1362 | initialize the cooked size. */ | |
1363 | if (sec->_cooked_size == 0) | |
1364 | sec->_cooked_size = sec->_raw_size; | |
1365 | ||
1366 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1367 | ||
1368 | /* Get a copy of the native relocations. */ | |
1369 | internal_relocs = (_bfd_elf32_link_read_relocs | |
1370 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, | |
1371 | link_info->keep_memory)); | |
1372 | if (internal_relocs == NULL) | |
1373 | goto error_return; | |
1374 | if (! link_info->keep_memory) | |
1375 | free_relocs = internal_relocs; | |
1376 | ||
1377 | /* Walk through them looking for relaxing opportunities. */ | |
1378 | irelend = internal_relocs + sec->reloc_count; | |
1379 | for (irel = internal_relocs; irel < irelend; irel++) | |
1380 | { | |
1381 | bfd_vma symval; | |
1382 | ||
1383 | /* If this isn't something that can be relaxed, then ignore | |
1384 | this reloc. */ | |
1385 | if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO) | |
1386 | continue; | |
1387 | ||
1388 | /* Get the section contents if we haven't done so already. */ | |
1389 | if (contents == NULL) | |
1390 | { | |
1391 | /* Get cached copy if it exists. */ | |
1392 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
1393 | contents = elf_section_data (sec)->this_hdr.contents; | |
1394 | else | |
1395 | { | |
1396 | /* Go get them off disk. */ | |
1397 | contents = (bfd_byte *) bfd_malloc (sec->_raw_size); | |
1398 | if (contents == NULL) | |
1399 | goto error_return; | |
1400 | free_contents = contents; | |
1401 | ||
1402 | if (! bfd_get_section_contents (abfd, sec, contents, | |
1403 | (file_ptr) 0, sec->_raw_size)) | |
1404 | goto error_return; | |
1405 | } | |
1406 | } | |
1407 | ||
1408 | /* Read this BFD's symbols if we haven't done so already. */ | |
1409 | if (extsyms == NULL) | |
1410 | { | |
1411 | /* Get cached copy if it exists. */ | |
1412 | if (symtab_hdr->contents != NULL) | |
1413 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1414 | else | |
1415 | { | |
dc810e39 | 1416 | bfd_size_type amt = symtab_hdr->sh_size; |
252b5132 | 1417 | /* Go get them off disk. */ |
dc810e39 | 1418 | extsyms = (Elf32_External_Sym *) bfd_malloc (amt); |
252b5132 RH |
1419 | if (extsyms == NULL) |
1420 | goto error_return; | |
1421 | free_extsyms = extsyms; | |
1422 | if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0 | |
dc810e39 | 1423 | || bfd_bread (extsyms, amt, abfd) != amt) |
252b5132 RH |
1424 | goto error_return; |
1425 | } | |
1426 | } | |
1427 | ||
1428 | /* Get the value of the symbol referred to by the reloc. */ | |
1429 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
1430 | { | |
1431 | Elf_Internal_Sym isym; | |
1432 | asection *sym_sec; | |
1433 | ||
1434 | /* A local symbol. */ | |
1435 | bfd_elf32_swap_symbol_in (abfd, | |
1436 | extsyms + ELF32_R_SYM (irel->r_info), | |
1437 | &isym); | |
1438 | ||
1439 | sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx); | |
1440 | symval = (isym.st_value | |
1441 | + sym_sec->output_section->vma | |
1442 | + sym_sec->output_offset); | |
1443 | } | |
1444 | else | |
1445 | { | |
1446 | unsigned long indx; | |
1447 | struct elf_link_hash_entry *h; | |
1448 | ||
1449 | /* An external symbol. */ | |
1450 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
1451 | h = elf_sym_hashes (abfd)[indx]; | |
1452 | BFD_ASSERT (h != NULL); | |
1453 | if (h->root.type != bfd_link_hash_defined | |
1454 | && h->root.type != bfd_link_hash_defweak) | |
1455 | { | |
1456 | /* This appears to be a reference to an undefined | |
1457 | symbol. Just ignore it--it will be caught by the | |
1458 | regular reloc processing. */ | |
1459 | continue; | |
1460 | } | |
1461 | ||
1462 | symval = (h->root.u.def.value | |
1463 | + h->root.u.def.section->output_section->vma | |
1464 | + h->root.u.def.section->output_offset); | |
1465 | } | |
1466 | ||
1467 | /* For simplicity of coding, we are going to modify the section | |
1468 | contents, the section relocs, and the BFD symbol table. We | |
1469 | must tell the rest of the code not to free up this | |
1470 | information. It would be possible to instead create a table | |
1471 | of changes which have to be made, as is done in coff-mips.c; | |
1472 | that would be more work, but would require less memory when | |
1473 | the linker is run. */ | |
1474 | ||
1475 | /* Try to change a seth/add3/jl subroutine call to bl24 or bl8. | |
1476 | This sequence is generated by the compiler when compiling in | |
1477 | 32 bit mode. Also look for seth/add3 -> ld24. */ | |
1478 | ||
1479 | if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO) | |
1480 | { | |
1481 | Elf_Internal_Rela *nrel; | |
1482 | bfd_vma pc = (sec->output_section->vma + sec->output_offset | |
1483 | + irel->r_offset); | |
1484 | bfd_signed_vma pcrel_value = symval - pc; | |
1485 | unsigned int code,reg; | |
1486 | int addend,nop_p,bl8_p,to_delete; | |
1487 | ||
1488 | /* The tests are ordered so that we get out as quickly as possible | |
1489 | if this isn't something we can relax, taking into account that | |
1490 | we are looking for two separate possibilities (jl/ld24). */ | |
1491 | ||
1492 | /* Do nothing if no room in the section for this to be what we're | |
1493 | looking for. */ | |
1494 | if (irel->r_offset > sec->_cooked_size - 8) | |
1495 | continue; | |
1496 | ||
1497 | /* Make sure the next relocation applies to the next | |
1498 | instruction and that it's the add3's reloc. */ | |
1499 | nrel = irel + 1; | |
1500 | if (nrel == irelend | |
1501 | || irel->r_offset + 4 != nrel->r_offset | |
1502 | || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16) | |
1503 | continue; | |
1504 | ||
1505 | /* See if the instructions are seth/add3. */ | |
1506 | /* FIXME: This is where macros from cgen can come in. */ | |
1507 | code = bfd_get_16 (abfd, contents + irel->r_offset + 0); | |
1508 | if ((code & 0xf0ff) != 0xd0c0) | |
1509 | continue; /* not seth rN,foo */ | |
1510 | reg = (code & 0x0f00) >> 8; | |
1511 | code = bfd_get_16 (abfd, contents + irel->r_offset + 4); | |
1512 | if (code != (0x80a0 | reg | (reg << 8))) | |
1513 | continue; /* not add3 rN,rN,foo */ | |
1514 | ||
1515 | /* At this point we've confirmed we have seth/add3. Now check | |
1516 | whether the next insn is a jl, in which case try to change this | |
1517 | to bl24 or bl8. */ | |
1518 | ||
1519 | /* Ensure the branch target is in range. | |
1520 | The bl24 instruction has a 24 bit operand which is the target | |
1521 | address right shifted by 2, giving a signed range of 26 bits. | |
1522 | Note that 4 bytes are added to the high value because the target | |
1523 | will be at least 4 bytes closer if we can relax. It'll actually | |
1524 | be 4 or 8 bytes closer, but we don't know which just yet and | |
1525 | the difference isn't significant enough to worry about. */ | |
1526 | #ifndef USE_REL /* put in for learning purposes */ | |
1527 | pcrel_value += irel->r_addend; | |
1528 | #else | |
1529 | addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2); | |
1530 | pcrel_value += addend; | |
1531 | #endif | |
1532 | ||
1533 | if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4 | |
1534 | /* Do nothing if no room in the section for this to be what we're | |
1535 | looking for. */ | |
1536 | && (irel->r_offset <= sec->_cooked_size - 12) | |
1537 | /* Ensure the next insn is "jl rN". */ | |
1538 | && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)), | |
1539 | code != (0x1ec0 | reg))) | |
1540 | { | |
1541 | /* We can relax to bl24/bl8. */ | |
1542 | ||
1543 | /* See if there's a nop following the jl. | |
1544 | Also see if we can use a bl8 insn. */ | |
1545 | code = bfd_get_16 (abfd, contents + irel->r_offset + 10); | |
1546 | nop_p = (code & 0x7fff) == NOP_INSN; | |
1547 | bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200; | |
1548 | ||
1549 | if (bl8_p) | |
1550 | { | |
1551 | /* Change "seth rN,foo" to "bl8 foo || nop". | |
1552 | We OR in CODE just in case it's not a nop (technically, | |
1553 | CODE currently must be a nop, but for cleanness we | |
1554 | allow it to be anything). */ | |
1555 | #ifndef USE_REL /* put in for learning purposes */ | |
1556 | code = 0x7e000000 | MAKE_PARALLEL (code); | |
1557 | #else | |
1558 | code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code); | |
1559 | #endif | |
1560 | to_delete = 8; | |
1561 | } | |
1562 | else | |
1563 | { | |
1564 | /* Change the seth rN,foo to a bl24 foo. */ | |
1565 | #ifndef USE_REL /* put in for learning purposes */ | |
1566 | code = 0xfe000000; | |
1567 | #else | |
1568 | code = 0xfe000000 + ((addend >> 2) & 0xffffff); | |
1569 | #endif | |
1570 | to_delete = nop_p ? 8 : 4; | |
1571 | } | |
1572 | ||
1573 | bfd_put_32 (abfd, code, contents + irel->r_offset); | |
1574 | ||
1575 | /* Set the new reloc type. */ | |
1576 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
1577 | bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL); | |
1578 | ||
1579 | /* Delete the add3 reloc by making it a null reloc. */ | |
1580 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
1581 | R_M32R_NONE); | |
1582 | } | |
1583 | else if (addend >= 0 | |
1584 | && symval + addend <= 0xffffff) | |
1585 | { | |
1586 | /* We can relax to ld24. */ | |
1587 | ||
1588 | code = 0xe0000000 | (reg << 24) | (addend & 0xffffff); | |
1589 | bfd_put_32 (abfd, code, contents + irel->r_offset); | |
1590 | to_delete = 4; | |
1591 | /* Tell the following code a nop filler isn't needed. */ | |
1592 | nop_p = 1; | |
1593 | } | |
1594 | else | |
1595 | { | |
1596 | /* Can't do anything here. */ | |
1597 | continue; | |
1598 | } | |
1599 | ||
1600 | /* Note that we've changed the relocs, section contents, etc. */ | |
1601 | elf_section_data (sec)->relocs = internal_relocs; | |
1602 | free_relocs = NULL; | |
1603 | ||
1604 | elf_section_data (sec)->this_hdr.contents = contents; | |
1605 | free_contents = NULL; | |
1606 | ||
1607 | symtab_hdr->contents = (bfd_byte *) extsyms; | |
1608 | free_extsyms = NULL; | |
1609 | ||
1610 | /* Delete TO_DELETE bytes of data. */ | |
1611 | if (!m32r_elf_relax_delete_bytes (abfd, sec, | |
1612 | irel->r_offset + 4, to_delete)) | |
1613 | goto error_return; | |
1614 | ||
1615 | /* Now that the following bytes have been moved into place, see if | |
1616 | we need to replace the jl with a nop. This happens when we had | |
1617 | to use a bl24 insn and the insn following the jl isn't a nop. | |
1618 | Technically, this situation can't happen (since the insn can | |
1619 | never be executed) but to be clean we do this. When the chip | |
1620 | supports parallel 16 bit insns things may change. | |
1621 | We don't need to do this in the case of relaxing to ld24, | |
1622 | and the above code sets nop_p so this isn't done. */ | |
1623 | if (! nop_p && to_delete == 4) | |
1624 | bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4); | |
1625 | ||
1626 | /* That will change things, so we should relax again. | |
1627 | Note that this is not required, and it may be slow. */ | |
1628 | *again = true; | |
1629 | ||
1630 | continue; | |
1631 | } | |
1632 | ||
1633 | /* loop to try the next reloc */ | |
1634 | } | |
1635 | ||
1636 | if (free_relocs != NULL) | |
1637 | { | |
1638 | free (free_relocs); | |
1639 | free_relocs = NULL; | |
1640 | } | |
1641 | ||
1642 | if (free_contents != NULL) | |
1643 | { | |
1644 | if (! link_info->keep_memory) | |
1645 | free (free_contents); | |
1646 | else | |
1647 | { | |
1648 | /* Cache the section contents for elf_link_input_bfd. */ | |
1649 | elf_section_data (sec)->this_hdr.contents = contents; | |
1650 | } | |
1651 | free_contents = NULL; | |
1652 | } | |
1653 | ||
1654 | if (free_extsyms != NULL) | |
1655 | { | |
1656 | if (! link_info->keep_memory) | |
1657 | free (free_extsyms); | |
1658 | else | |
1659 | { | |
1660 | /* Cache the symbols for elf_link_input_bfd. */ | |
1661 | symtab_hdr->contents = extsyms; | |
1662 | } | |
1663 | free_extsyms = NULL; | |
1664 | } | |
1665 | ||
1666 | return true; | |
1667 | ||
1668 | error_return: | |
1669 | if (free_relocs != NULL) | |
1670 | free (free_relocs); | |
1671 | if (free_contents != NULL) | |
1672 | free (free_contents); | |
1673 | if (free_extsyms != NULL) | |
1674 | free (free_extsyms); | |
1675 | return false; | |
1676 | } | |
1677 | ||
1678 | /* Delete some bytes from a section while relaxing. */ | |
1679 | ||
1680 | static boolean | |
1681 | m32r_elf_relax_delete_bytes (abfd, sec, addr, count) | |
1682 | bfd *abfd; | |
1683 | asection *sec; | |
1684 | bfd_vma addr; | |
1685 | int count; | |
1686 | { | |
1687 | Elf_Internal_Shdr *symtab_hdr; | |
1688 | Elf32_External_Sym *extsyms; | |
1689 | int shndx, index; | |
1690 | bfd_byte *contents; | |
1691 | Elf_Internal_Rela *irel, *irelend; | |
1692 | Elf_Internal_Rela *irelalign; | |
1693 | bfd_vma toaddr; | |
1694 | Elf32_External_Sym *esym, *esymend; | |
1695 | struct elf_link_hash_entry *sym_hash; | |
1696 | ||
1697 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1698 | extsyms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1699 | ||
1700 | shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
1701 | ||
1702 | contents = elf_section_data (sec)->this_hdr.contents; | |
1703 | ||
1704 | /* The deletion must stop at the next ALIGN reloc for an aligment | |
1705 | power larger than the number of bytes we are deleting. */ | |
1706 | ||
1707 | irelalign = NULL; | |
1708 | toaddr = sec->_cooked_size; | |
1709 | ||
1710 | irel = elf_section_data (sec)->relocs; | |
1711 | irelend = irel + sec->reloc_count; | |
1712 | ||
1713 | /* Actually delete the bytes. */ | |
1714 | memmove (contents + addr, contents + addr + count, toaddr - addr - count); | |
1715 | sec->_cooked_size -= count; | |
1716 | ||
1717 | /* Adjust all the relocs. */ | |
1718 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1719 | { | |
1720 | /* Get the new reloc address. */ | |
1721 | if ((irel->r_offset > addr | |
1722 | && irel->r_offset < toaddr)) | |
1723 | irel->r_offset -= count; | |
1724 | } | |
1725 | ||
1726 | /* Adjust the local symbols defined in this section. */ | |
1727 | esym = extsyms; | |
1728 | esymend = esym + symtab_hdr->sh_info; | |
1729 | for (; esym < esymend; esym++) | |
1730 | { | |
1731 | Elf_Internal_Sym isym; | |
1732 | ||
1733 | bfd_elf32_swap_symbol_in (abfd, esym, &isym); | |
1734 | ||
1735 | if (isym.st_shndx == shndx | |
1736 | && isym.st_value > addr | |
1737 | && isym.st_value < toaddr) | |
1738 | { | |
1739 | isym.st_value -= count; | |
1740 | bfd_elf32_swap_symbol_out (abfd, &isym, esym); | |
1741 | } | |
1742 | } | |
1743 | ||
1744 | /* Now adjust the global symbols defined in this section. */ | |
1745 | esym = extsyms + symtab_hdr->sh_info; | |
1746 | esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)); | |
1747 | for (index = 0; esym < esymend; esym++, index++) | |
1748 | { | |
1749 | Elf_Internal_Sym isym; | |
1750 | ||
1751 | bfd_elf32_swap_symbol_in (abfd, esym, &isym); | |
1752 | sym_hash = elf_sym_hashes (abfd)[index]; | |
1753 | if (isym.st_shndx == shndx | |
1754 | && ((sym_hash)->root.type == bfd_link_hash_defined | |
1755 | || (sym_hash)->root.type == bfd_link_hash_defweak) | |
1756 | && (sym_hash)->root.u.def.section == sec | |
1757 | && (sym_hash)->root.u.def.value > addr | |
1758 | && (sym_hash)->root.u.def.value < toaddr) | |
1759 | { | |
1760 | (sym_hash)->root.u.def.value -= count; | |
1761 | } | |
1762 | } | |
1763 | ||
1764 | return true; | |
1765 | } | |
1766 | ||
1767 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1768 | which uses m32r_elf_relocate_section. */ | |
1769 | ||
1770 | static bfd_byte * | |
1771 | m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order, | |
1772 | data, relocateable, symbols) | |
1773 | bfd *output_bfd; | |
1774 | struct bfd_link_info *link_info; | |
1775 | struct bfd_link_order *link_order; | |
1776 | bfd_byte *data; | |
1777 | boolean relocateable; | |
1778 | asymbol **symbols; | |
1779 | { | |
1780 | Elf_Internal_Shdr *symtab_hdr; | |
1781 | asection *input_section = link_order->u.indirect.section; | |
1782 | bfd *input_bfd = input_section->owner; | |
1783 | asection **sections = NULL; | |
1784 | Elf_Internal_Rela *internal_relocs = NULL; | |
1785 | Elf32_External_Sym *external_syms = NULL; | |
1786 | Elf_Internal_Sym *internal_syms = NULL; | |
dc810e39 | 1787 | bfd_size_type amt; |
252b5132 RH |
1788 | |
1789 | /* We only need to handle the case of relaxing, or of having a | |
1790 | particular set of section contents, specially. */ | |
1791 | if (relocateable | |
1792 | || elf_section_data (input_section)->this_hdr.contents == NULL) | |
1793 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1794 | link_order, data, | |
1795 | relocateable, | |
1796 | symbols); | |
1797 | ||
1798 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1799 | ||
1800 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
1801 | input_section->_raw_size); | |
1802 | ||
1803 | if ((input_section->flags & SEC_RELOC) != 0 | |
1804 | && input_section->reloc_count > 0) | |
1805 | { | |
1806 | Elf_Internal_Sym *isymp; | |
1807 | asection **secpp; | |
1808 | Elf32_External_Sym *esym, *esymend; | |
1809 | ||
1810 | if (symtab_hdr->contents != NULL) | |
1811 | external_syms = (Elf32_External_Sym *) symtab_hdr->contents; | |
1812 | else | |
1813 | { | |
dc810e39 AM |
1814 | amt = symtab_hdr->sh_info; |
1815 | amt *= sizeof (Elf32_External_Sym); | |
1816 | external_syms = (Elf32_External_Sym *) bfd_malloc (amt); | |
252b5132 RH |
1817 | if (external_syms == NULL && symtab_hdr->sh_info > 0) |
1818 | goto error_return; | |
1819 | if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0 | |
dc810e39 | 1820 | || bfd_bread (external_syms, amt, input_bfd) != amt) |
252b5132 RH |
1821 | goto error_return; |
1822 | } | |
1823 | ||
1824 | internal_relocs = (_bfd_elf32_link_read_relocs | |
1825 | (input_bfd, input_section, (PTR) NULL, | |
1826 | (Elf_Internal_Rela *) NULL, false)); | |
1827 | if (internal_relocs == NULL) | |
1828 | goto error_return; | |
1829 | ||
dc810e39 AM |
1830 | amt = symtab_hdr->sh_info; |
1831 | amt *= sizeof (Elf_Internal_Sym); | |
1832 | internal_syms = (Elf_Internal_Sym *) bfd_malloc (amt); | |
252b5132 RH |
1833 | if (internal_syms == NULL && symtab_hdr->sh_info > 0) |
1834 | goto error_return; | |
1835 | ||
dc810e39 AM |
1836 | amt = symtab_hdr->sh_info; |
1837 | amt *= sizeof (asection *); | |
1838 | sections = (asection **) bfd_malloc (amt); | |
252b5132 RH |
1839 | if (sections == NULL && symtab_hdr->sh_info > 0) |
1840 | goto error_return; | |
1841 | ||
1842 | isymp = internal_syms; | |
1843 | secpp = sections; | |
1844 | esym = external_syms; | |
1845 | esymend = esym + symtab_hdr->sh_info; | |
1846 | for (; esym < esymend; ++esym, ++isymp, ++secpp) | |
1847 | { | |
1848 | asection *isec; | |
1849 | ||
1850 | bfd_elf32_swap_symbol_in (input_bfd, esym, isymp); | |
1851 | ||
1852 | if (isymp->st_shndx == SHN_UNDEF) | |
1853 | isec = bfd_und_section_ptr; | |
252b5132 RH |
1854 | else if (isymp->st_shndx == SHN_ABS) |
1855 | isec = bfd_abs_section_ptr; | |
1856 | else if (isymp->st_shndx == SHN_COMMON) | |
1857 | isec = bfd_com_section_ptr; | |
1858 | else if (isymp->st_shndx == SHN_M32R_SCOMMON) | |
1859 | isec = &m32r_elf_scom_section; | |
1860 | else | |
9ad5cbcf | 1861 | isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx); |
252b5132 RH |
1862 | |
1863 | *secpp = isec; | |
1864 | } | |
1865 | ||
1866 | if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1867 | input_section, data, internal_relocs, | |
1868 | internal_syms, sections)) | |
1869 | goto error_return; | |
1870 | ||
1871 | if (sections != NULL) | |
1872 | free (sections); | |
1873 | sections = NULL; | |
1874 | if (internal_syms != NULL) | |
1875 | free (internal_syms); | |
1876 | internal_syms = NULL; | |
1877 | if (external_syms != NULL && symtab_hdr->contents == NULL) | |
1878 | free (external_syms); | |
1879 | external_syms = NULL; | |
1880 | if (internal_relocs != elf_section_data (input_section)->relocs) | |
1881 | free (internal_relocs); | |
1882 | internal_relocs = NULL; | |
1883 | } | |
1884 | ||
1885 | return data; | |
1886 | ||
1887 | error_return: | |
1888 | if (internal_relocs != NULL | |
1889 | && internal_relocs != elf_section_data (input_section)->relocs) | |
1890 | free (internal_relocs); | |
1891 | if (external_syms != NULL && symtab_hdr->contents == NULL) | |
1892 | free (external_syms); | |
1893 | if (internal_syms != NULL) | |
1894 | free (internal_syms); | |
1895 | if (sections != NULL) | |
1896 | free (sections); | |
1897 | return NULL; | |
1898 | } | |
1899 | ||
1900 | #endif /* #if 0 */ | |
1901 | \f | |
1902 | /* Set the right machine number. */ | |
1903 | static boolean | |
1904 | m32r_elf_object_p (abfd) | |
1905 | bfd *abfd; | |
1906 | { | |
1907 | switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH) | |
1908 | { | |
1909 | default: | |
1910 | case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break; | |
e916b64e | 1911 | case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break; |
252b5132 RH |
1912 | } |
1913 | return true; | |
1914 | } | |
1915 | ||
1916 | /* Store the machine number in the flags field. */ | |
1917 | static void | |
1918 | m32r_elf_final_write_processing (abfd, linker) | |
1919 | bfd * abfd; | |
5f771d47 | 1920 | boolean linker ATTRIBUTE_UNUSED; |
252b5132 RH |
1921 | { |
1922 | unsigned long val; | |
1923 | ||
1924 | switch (bfd_get_mach (abfd)) | |
1925 | { | |
1926 | default: | |
1927 | case bfd_mach_m32r: val = E_M32R_ARCH; break; | |
e916b64e | 1928 | case bfd_mach_m32rx: val = E_M32RX_ARCH; break; |
252b5132 RH |
1929 | } |
1930 | ||
1931 | elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH; | |
1932 | elf_elfheader (abfd)->e_flags |= val; | |
1933 | } | |
1934 | ||
c3668558 | 1935 | /* Function to keep M32R specific file flags. */ |
252b5132 RH |
1936 | static boolean |
1937 | m32r_elf_set_private_flags (abfd, flags) | |
1938 | bfd * abfd; | |
1939 | flagword flags; | |
1940 | { | |
1941 | BFD_ASSERT (!elf_flags_init (abfd) | |
1942 | || elf_elfheader (abfd)->e_flags == flags); | |
1943 | ||
1944 | elf_elfheader (abfd)->e_flags = flags; | |
1945 | elf_flags_init (abfd) = true; | |
1946 | return true; | |
1947 | } | |
1948 | ||
252b5132 RH |
1949 | /* Merge backend specific data from an object file to the output |
1950 | object file when linking. */ | |
1951 | static boolean | |
1952 | m32r_elf_merge_private_bfd_data (ibfd, obfd) | |
1953 | bfd * ibfd; | |
1954 | bfd * obfd; | |
1955 | { | |
1956 | flagword out_flags; | |
1957 | flagword in_flags; | |
1958 | ||
1959 | if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour | |
1960 | || bfd_get_flavour (obfd) != bfd_target_elf_flavour) | |
1961 | return true; | |
1962 | ||
1963 | in_flags = elf_elfheader (ibfd)->e_flags; | |
1964 | out_flags = elf_elfheader (obfd)->e_flags; | |
1965 | ||
1966 | if (! elf_flags_init (obfd)) | |
1967 | { | |
1968 | /* If the input is the default architecture then do not | |
1969 | bother setting the flags for the output architecture, | |
1970 | instead allow future merges to do this. If no future | |
1971 | merges ever set these flags then they will retain their | |
1972 | unitialised values, which surprise surprise, correspond | |
1973 | to the default values. */ | |
1974 | if (bfd_get_arch_info (ibfd)->the_default) | |
1975 | return true; | |
c3668558 | 1976 | |
252b5132 RH |
1977 | elf_flags_init (obfd) = true; |
1978 | elf_elfheader (obfd)->e_flags = in_flags; | |
1979 | ||
1980 | if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) | |
1981 | && bfd_get_arch_info (obfd)->the_default) | |
1982 | { | |
1983 | return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
1984 | } | |
1985 | ||
1986 | return true; | |
1987 | } | |
1988 | ||
1989 | /* Check flag compatibility. */ | |
1990 | if (in_flags == out_flags) | |
1991 | return true; | |
1992 | ||
1993 | if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH)) | |
1994 | { | |
1995 | if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH) | |
1996 | { | |
8f615d07 AM |
1997 | (*_bfd_error_handler) |
1998 | (_("%s: Instruction set mismatch with previous modules"), | |
1999 | bfd_archive_filename (ibfd)); | |
252b5132 RH |
2000 | |
2001 | bfd_set_error (bfd_error_bad_value); | |
2002 | return false; | |
2003 | } | |
2004 | } | |
2005 | ||
2006 | return true; | |
2007 | } | |
2008 | ||
2009 | /* Display the flags field */ | |
2010 | static boolean | |
2011 | m32r_elf_print_private_bfd_data (abfd, ptr) | |
2012 | bfd * abfd; | |
2013 | PTR ptr; | |
2014 | { | |
2015 | FILE * file = (FILE *) ptr; | |
c3668558 | 2016 | |
252b5132 | 2017 | BFD_ASSERT (abfd != NULL && ptr != NULL) |
c3668558 | 2018 | |
252b5132 | 2019 | _bfd_elf_print_private_bfd_data (abfd, ptr); |
c3668558 | 2020 | |
252b5132 | 2021 | fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags); |
c3668558 | 2022 | |
252b5132 RH |
2023 | switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH) |
2024 | { | |
2025 | default: | |
2026 | case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break; | |
e916b64e | 2027 | case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break; |
252b5132 | 2028 | } |
c3668558 | 2029 | |
252b5132 | 2030 | fputc ('\n', file); |
c3668558 | 2031 | |
252b5132 RH |
2032 | return true; |
2033 | } | |
2034 | ||
2035 | asection * | |
2036 | m32r_elf_gc_mark_hook (abfd, info, rel, h, sym) | |
2037 | bfd *abfd; | |
5f771d47 | 2038 | struct bfd_link_info *info ATTRIBUTE_UNUSED; |
252b5132 RH |
2039 | Elf_Internal_Rela *rel; |
2040 | struct elf_link_hash_entry *h; | |
2041 | Elf_Internal_Sym *sym; | |
2042 | { | |
2043 | if (h != NULL) | |
2044 | { | |
2045 | switch (ELF32_R_TYPE (rel->r_info)) | |
2046 | { | |
2047 | case R_M32R_GNU_VTINHERIT: | |
2048 | case R_M32R_GNU_VTENTRY: | |
2049 | break; | |
c3668558 | 2050 | |
252b5132 RH |
2051 | default: |
2052 | switch (h->root.type) | |
2053 | { | |
2054 | case bfd_link_hash_defined: | |
2055 | case bfd_link_hash_defweak: | |
2056 | return h->root.u.def.section; | |
c3668558 | 2057 | |
252b5132 RH |
2058 | case bfd_link_hash_common: |
2059 | return h->root.u.c.p->section; | |
e049a0de ILT |
2060 | |
2061 | default: | |
2062 | break; | |
252b5132 RH |
2063 | } |
2064 | } | |
2065 | } | |
2066 | else | |
2067 | { | |
9ad5cbcf AM |
2068 | return bfd_section_from_elf_index (abfd, sym->st_shndx); |
2069 | } | |
252b5132 RH |
2070 | return NULL; |
2071 | } | |
2072 | ||
2073 | static boolean | |
2074 | m32r_elf_gc_sweep_hook (abfd, info, sec, relocs) | |
5f771d47 ILT |
2075 | bfd *abfd ATTRIBUTE_UNUSED; |
2076 | struct bfd_link_info *info ATTRIBUTE_UNUSED; | |
2077 | asection *sec ATTRIBUTE_UNUSED; | |
2078 | const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED; | |
252b5132 RH |
2079 | { |
2080 | /* we don't use got and plt entries for m32r */ | |
2081 | return true; | |
2082 | } | |
2083 | ||
252b5132 RH |
2084 | /* Look through the relocs for a section during the first phase. |
2085 | Since we don't do .gots or .plts, we just need to consider the | |
2086 | virtual table relocs for gc. */ | |
c3668558 | 2087 | |
252b5132 RH |
2088 | static boolean |
2089 | m32r_elf_check_relocs (abfd, info, sec, relocs) | |
2090 | bfd *abfd; | |
2091 | struct bfd_link_info *info; | |
2092 | asection *sec; | |
2093 | const Elf_Internal_Rela *relocs; | |
2094 | { | |
2095 | Elf_Internal_Shdr *symtab_hdr; | |
2096 | struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; | |
2097 | const Elf_Internal_Rela *rel; | |
2098 | const Elf_Internal_Rela *rel_end; | |
c3668558 | 2099 | |
252b5132 RH |
2100 | if (info->relocateable) |
2101 | return true; | |
c3668558 | 2102 | |
252b5132 RH |
2103 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
2104 | sym_hashes = elf_sym_hashes (abfd); | |
c3668558 | 2105 | sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym); |
252b5132 RH |
2106 | if (!elf_bad_symtab (abfd)) |
2107 | sym_hashes_end -= symtab_hdr->sh_info; | |
c3668558 | 2108 | |
252b5132 RH |
2109 | rel_end = relocs + sec->reloc_count; |
2110 | for (rel = relocs; rel < rel_end; rel++) | |
2111 | { | |
2112 | struct elf_link_hash_entry *h; | |
2113 | unsigned long r_symndx; | |
c3668558 | 2114 | |
252b5132 RH |
2115 | r_symndx = ELF32_R_SYM (rel->r_info); |
2116 | if (r_symndx < symtab_hdr->sh_info) | |
2117 | h = NULL; | |
2118 | else | |
2119 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
c3668558 | 2120 | |
252b5132 RH |
2121 | switch (ELF32_R_TYPE (rel->r_info)) |
2122 | { | |
2123 | /* This relocation describes the C++ object vtable hierarchy. | |
2124 | Reconstruct it for later use during GC. */ | |
2125 | case R_M32R_GNU_VTINHERIT: | |
2126 | if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) | |
2127 | return false; | |
2128 | break; | |
c3668558 | 2129 | |
252b5132 RH |
2130 | /* This relocation describes which C++ vtable entries are actually |
2131 | used. Record for later use during GC. */ | |
2132 | case R_M32R_GNU_VTENTRY: | |
2133 | if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset)) | |
2134 | return false; | |
2135 | break; | |
2136 | } | |
2137 | } | |
c3668558 | 2138 | |
252b5132 RH |
2139 | return true; |
2140 | } | |
252b5132 | 2141 | \f |
252b5132 | 2142 | #define ELF_ARCH bfd_arch_m32r |
aa4f99bb AO |
2143 | #define ELF_MACHINE_CODE EM_M32R |
2144 | #define ELF_MACHINE_ALT1 EM_CYGNUS_M32R | |
e916b64e | 2145 | #define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */ |
252b5132 RH |
2146 | |
2147 | #define TARGET_BIG_SYM bfd_elf32_m32r_vec | |
2148 | #define TARGET_BIG_NAME "elf32-m32r" | |
2149 | ||
2150 | #define elf_info_to_howto 0 | |
2151 | #define elf_info_to_howto_rel m32r_info_to_howto_rel | |
2152 | #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section | |
2153 | #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing | |
2154 | #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook | |
2155 | #define elf_backend_relocate_section m32r_elf_relocate_section | |
2156 | #define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook | |
2157 | #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook | |
2158 | #define elf_backend_check_relocs m32r_elf_check_relocs | |
2159 | ||
2160 | #define elf_backend_can_gc_sections 1 | |
b491616a AM |
2161 | #ifndef USE_REL |
2162 | #define elf_backend_rela_normal 1 | |
2163 | #endif | |
252b5132 RH |
2164 | #if 0 /* not yet */ |
2165 | /* relax support */ | |
2166 | #define bfd_elf32_bfd_relax_section m32r_elf_relax_section | |
2167 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
2168 | m32r_elf_get_relocated_section_contents | |
2169 | #endif | |
2170 | ||
2171 | #define elf_backend_object_p m32r_elf_object_p | |
2172 | #define elf_backend_final_write_processing m32r_elf_final_write_processing | |
252b5132 RH |
2173 | #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data |
2174 | #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags | |
2175 | #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data | |
c3668558 | 2176 | |
252b5132 | 2177 | #include "elf32-target.h" |