Commit | Line | Data |
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2469cfa2 | 1 | /* MSP430-specific support for 32-bit ELF |
ab96bf03 | 2 | Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007 |
07adf181 | 3 | Free Software Foundation, Inc. |
2469cfa2 NC |
4 | Contributed by Dmitry Diky <diwil@mail.ru> |
5 | ||
6 | This file is part of BFD, the Binary File Descriptor library. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
3e110533 | 20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
2469cfa2 NC |
21 | |
22 | #include "bfd.h" | |
23 | #include "sysdep.h" | |
24 | #include "libiberty.h" | |
25 | #include "libbfd.h" | |
26 | #include "elf-bfd.h" | |
27 | #include "elf/msp430.h" | |
28 | ||
2469cfa2 NC |
29 | /* Use RELA instead of REL. */ |
30 | #undef USE_REL | |
31 | ||
32 | static reloc_howto_type elf_msp430_howto_table[] = | |
33 | { | |
34 | HOWTO (R_MSP430_NONE, /* type */ | |
35 | 0, /* rightshift */ | |
36 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
37 | 32, /* bitsize */ | |
38 | FALSE, /* pc_relative */ | |
39 | 0, /* bitpos */ | |
b18c562e | 40 | complain_overflow_bitfield,/* complain_on_overflow */ |
2469cfa2 NC |
41 | bfd_elf_generic_reloc, /* special_function */ |
42 | "R_MSP430_NONE", /* name */ | |
43 | FALSE, /* partial_inplace */ | |
44 | 0, /* src_mask */ | |
45 | 0, /* dst_mask */ | |
46 | FALSE), /* pcrel_offset */ | |
47 | ||
48 | HOWTO (R_MSP430_32, /* type */ | |
49 | 0, /* rightshift */ | |
50 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
51 | 32, /* bitsize */ | |
52 | FALSE, /* pc_relative */ | |
53 | 0, /* bitpos */ | |
b18c562e | 54 | complain_overflow_bitfield,/* complain_on_overflow */ |
2469cfa2 NC |
55 | bfd_elf_generic_reloc, /* special_function */ |
56 | "R_MSP430_32", /* name */ | |
57 | FALSE, /* partial_inplace */ | |
58 | 0xffffffff, /* src_mask */ | |
59 | 0xffffffff, /* dst_mask */ | |
60 | FALSE), /* pcrel_offset */ | |
61 | ||
62 | /* A 13 bit PC relative relocation. */ | |
63 | HOWTO (R_MSP430_10_PCREL, /* type */ | |
64 | 1, /* rightshift */ | |
65 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
66 | 10, /* bitsize */ | |
67 | TRUE, /* pc_relative */ | |
68 | 0, /* bitpos */ | |
b18c562e | 69 | complain_overflow_bitfield,/* complain_on_overflow */ |
2469cfa2 NC |
70 | bfd_elf_generic_reloc, /* special_function */ |
71 | "R_MSP430_13_PCREL", /* name */ | |
72 | FALSE, /* partial_inplace */ | |
73 | 0xfff, /* src_mask */ | |
74 | 0xfff, /* dst_mask */ | |
75 | TRUE), /* pcrel_offset */ | |
76 | ||
77 | /* A 16 bit absolute relocation. */ | |
78 | HOWTO (R_MSP430_16, /* type */ | |
79 | 0, /* rightshift */ | |
80 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
81 | 16, /* bitsize */ | |
82 | FALSE, /* pc_relative */ | |
83 | 0, /* bitpos */ | |
84 | complain_overflow_dont,/* complain_on_overflow */ | |
85 | bfd_elf_generic_reloc, /* special_function */ | |
86 | "R_MSP430_16", /* name */ | |
87 | FALSE, /* partial_inplace */ | |
b18c562e | 88 | 0, /* src_mask */ |
2469cfa2 NC |
89 | 0xffff, /* dst_mask */ |
90 | FALSE), /* pcrel_offset */ | |
91 | ||
92 | /* A 16 bit absolute relocation for command address. */ | |
93 | HOWTO (R_MSP430_16_PCREL, /* type */ | |
94 | 1, /* rightshift */ | |
95 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
96 | 16, /* bitsize */ | |
97 | TRUE, /* pc_relative */ | |
98 | 0, /* bitpos */ | |
99 | complain_overflow_dont,/* complain_on_overflow */ | |
100 | bfd_elf_generic_reloc, /* special_function */ | |
101 | "R_MSP430_16_PCREL", /* name */ | |
102 | FALSE, /* partial_inplace */ | |
b18c562e | 103 | 0, /* src_mask */ |
2469cfa2 NC |
104 | 0xffff, /* dst_mask */ |
105 | TRUE), /* pcrel_offset */ | |
106 | ||
107 | /* A 16 bit absolute relocation, byte operations. */ | |
108 | HOWTO (R_MSP430_16_BYTE, /* type */ | |
109 | 0, /* rightshift */ | |
110 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
111 | 16, /* bitsize */ | |
112 | FALSE, /* pc_relative */ | |
113 | 0, /* bitpos */ | |
114 | complain_overflow_dont,/* complain_on_overflow */ | |
115 | bfd_elf_generic_reloc, /* special_function */ | |
116 | "R_MSP430_16_BYTE", /* name */ | |
117 | FALSE, /* partial_inplace */ | |
118 | 0xffff, /* src_mask */ | |
119 | 0xffff, /* dst_mask */ | |
120 | FALSE), /* pcrel_offset */ | |
121 | ||
122 | /* A 16 bit absolute relocation for command address. */ | |
123 | HOWTO (R_MSP430_16_PCREL_BYTE,/* type */ | |
124 | 1, /* rightshift */ | |
125 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
126 | 16, /* bitsize */ | |
127 | TRUE, /* pc_relative */ | |
128 | 0, /* bitpos */ | |
129 | complain_overflow_dont,/* complain_on_overflow */ | |
130 | bfd_elf_generic_reloc, /* special_function */ | |
b18c562e | 131 | "R_MSP430_16_PCREL_BYTE",/* name */ |
2469cfa2 NC |
132 | FALSE, /* partial_inplace */ |
133 | 0xffff, /* src_mask */ | |
134 | 0xffff, /* dst_mask */ | |
b18c562e NC |
135 | TRUE), /* pcrel_offset */ |
136 | ||
137 | /* A 13 bit PC relative relocation for complicated polymorphs. */ | |
138 | HOWTO (R_MSP430_2X_PCREL, /* type */ | |
139 | 1, /* rightshift */ | |
140 | 2, /* size (0 = byte, 1 = short, 2 = long) */ | |
141 | 10, /* bitsize */ | |
142 | TRUE, /* pc_relative */ | |
143 | 0, /* bitpos */ | |
144 | complain_overflow_bitfield,/* complain_on_overflow */ | |
145 | bfd_elf_generic_reloc, /* special_function */ | |
146 | "R_MSP430_2X_PCREL", /* name */ | |
147 | FALSE, /* partial_inplace */ | |
148 | 0xfff, /* src_mask */ | |
149 | 0xfff, /* dst_mask */ | |
150 | TRUE), /* pcrel_offset */ | |
151 | ||
152 | /* A 16 bit relaxable relocation for command address. */ | |
153 | HOWTO (R_MSP430_RL_PCREL, /* type */ | |
154 | 1, /* rightshift */ | |
155 | 1, /* size (0 = byte, 1 = short, 2 = long) */ | |
156 | 16, /* bitsize */ | |
157 | TRUE, /* pc_relative */ | |
158 | 0, /* bitpos */ | |
159 | complain_overflow_dont,/* complain_on_overflow */ | |
160 | bfd_elf_generic_reloc, /* special_function */ | |
161 | "R_MSP430_RL_PCREL", /* name */ | |
162 | FALSE, /* partial_inplace */ | |
163 | 0, /* src_mask */ | |
164 | 0xffff, /* dst_mask */ | |
2469cfa2 NC |
165 | TRUE) /* pcrel_offset */ |
166 | }; | |
167 | ||
168 | /* Map BFD reloc types to MSP430 ELF reloc types. */ | |
169 | ||
170 | struct msp430_reloc_map | |
171 | { | |
172 | bfd_reloc_code_real_type bfd_reloc_val; | |
173 | unsigned int elf_reloc_val; | |
174 | }; | |
175 | ||
176 | static const struct msp430_reloc_map msp430_reloc_map[] = | |
177 | { | |
b18c562e NC |
178 | {BFD_RELOC_NONE, R_MSP430_NONE}, |
179 | {BFD_RELOC_32, R_MSP430_32}, | |
180 | {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL}, | |
181 | {BFD_RELOC_16, R_MSP430_16_BYTE}, | |
182 | {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL}, | |
183 | {BFD_RELOC_MSP430_16, R_MSP430_16}, | |
2469cfa2 | 184 | {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE}, |
b18c562e NC |
185 | {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE}, |
186 | {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL}, | |
187 | {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL} | |
2469cfa2 NC |
188 | }; |
189 | ||
190 | static reloc_howto_type * | |
b18c562e NC |
191 | bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, |
192 | bfd_reloc_code_real_type code) | |
2469cfa2 NC |
193 | { |
194 | unsigned int i; | |
195 | ||
196 | for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++) | |
197 | if (msp430_reloc_map[i].bfd_reloc_val == code) | |
198 | return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val]; | |
199 | ||
200 | return NULL; | |
201 | } | |
202 | ||
203 | /* Set the howto pointer for an MSP430 ELF reloc. */ | |
204 | ||
205 | static void | |
b18c562e NC |
206 | msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, |
207 | arelent * cache_ptr, | |
208 | Elf_Internal_Rela * dst) | |
2469cfa2 NC |
209 | { |
210 | unsigned int r_type; | |
211 | ||
212 | r_type = ELF32_R_TYPE (dst->r_info); | |
213 | BFD_ASSERT (r_type < (unsigned int) R_MSP430_max); | |
214 | cache_ptr->howto = &elf_msp430_howto_table[r_type]; | |
215 | } | |
216 | ||
2469cfa2 NC |
217 | /* Look through the relocs for a section during the first phase. |
218 | Since we don't do .gots or .plts, we just need to consider the | |
219 | virtual table relocs for gc. */ | |
220 | ||
221 | static bfd_boolean | |
b18c562e NC |
222 | elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info, |
223 | asection * sec, const Elf_Internal_Rela * relocs) | |
2469cfa2 NC |
224 | { |
225 | Elf_Internal_Shdr *symtab_hdr; | |
226 | struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; | |
227 | const Elf_Internal_Rela *rel; | |
228 | const Elf_Internal_Rela *rel_end; | |
229 | ||
1049f94e | 230 | if (info->relocatable) |
2469cfa2 NC |
231 | return TRUE; |
232 | ||
233 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
234 | sym_hashes = elf_sym_hashes (abfd); | |
235 | sym_hashes_end = | |
236 | sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym); | |
237 | if (!elf_bad_symtab (abfd)) | |
238 | sym_hashes_end -= symtab_hdr->sh_info; | |
239 | ||
240 | rel_end = relocs + sec->reloc_count; | |
241 | for (rel = relocs; rel < rel_end; rel++) | |
242 | { | |
243 | struct elf_link_hash_entry *h; | |
244 | unsigned long r_symndx; | |
245 | ||
246 | r_symndx = ELF32_R_SYM (rel->r_info); | |
247 | if (r_symndx < symtab_hdr->sh_info) | |
248 | h = NULL; | |
249 | else | |
973a3492 L |
250 | { |
251 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
252 | while (h->root.type == bfd_link_hash_indirect | |
253 | || h->root.type == bfd_link_hash_warning) | |
254 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
255 | } | |
2469cfa2 NC |
256 | } |
257 | ||
258 | return TRUE; | |
259 | } | |
260 | ||
261 | /* Perform a single relocation. By default we use the standard BFD | |
262 | routines, but a few relocs, we have to do them ourselves. */ | |
263 | ||
264 | static bfd_reloc_status_type | |
b18c562e NC |
265 | msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd, |
266 | asection * input_section, bfd_byte * contents, | |
267 | Elf_Internal_Rela * rel, bfd_vma relocation) | |
2469cfa2 NC |
268 | { |
269 | bfd_reloc_status_type r = bfd_reloc_ok; | |
270 | bfd_vma x; | |
271 | bfd_signed_vma srel; | |
272 | ||
273 | switch (howto->type) | |
274 | { | |
275 | case R_MSP430_10_PCREL: | |
276 | contents += rel->r_offset; | |
277 | srel = (bfd_signed_vma) relocation; | |
278 | srel += rel->r_addend; | |
279 | srel -= rel->r_offset; | |
280 | srel -= 2; /* Branch instructions add 2 to the PC... */ | |
281 | srel -= (input_section->output_section->vma + | |
282 | input_section->output_offset); | |
283 | ||
284 | if (srel & 1) | |
285 | return bfd_reloc_outofrange; | |
286 | ||
287 | /* MSP430 addresses commands as words. */ | |
288 | srel >>= 1; | |
289 | ||
290 | /* Check for an overflow. */ | |
291 | if (srel < -512 || srel > 511) | |
292 | return bfd_reloc_overflow; | |
293 | ||
294 | x = bfd_get_16 (input_bfd, contents); | |
295 | x = (x & 0xfc00) | (srel & 0x3ff); | |
296 | bfd_put_16 (input_bfd, x, contents); | |
297 | break; | |
298 | ||
b18c562e NC |
299 | case R_MSP430_2X_PCREL: |
300 | contents += rel->r_offset; | |
301 | srel = (bfd_signed_vma) relocation; | |
302 | srel += rel->r_addend; | |
303 | srel -= rel->r_offset; | |
304 | srel -= 2; /* Branch instructions add 2 to the PC... */ | |
305 | srel -= (input_section->output_section->vma + | |
306 | input_section->output_offset); | |
307 | ||
308 | if (srel & 1) | |
309 | return bfd_reloc_outofrange; | |
310 | ||
311 | /* MSP430 addresses commands as words. */ | |
312 | srel >>= 1; | |
313 | ||
314 | /* Check for an overflow. */ | |
315 | if (srel < -512 || srel > 511) | |
316 | return bfd_reloc_overflow; | |
317 | ||
318 | x = bfd_get_16 (input_bfd, contents); | |
319 | x = (x & 0xfc00) | (srel & 0x3ff); | |
320 | bfd_put_16 (input_bfd, x, contents); | |
321 | /* Handle second jump instruction. */ | |
322 | x = bfd_get_16 (input_bfd, contents - 2); | |
323 | srel += 1; | |
324 | x = (x & 0xfc00) | (srel & 0x3ff); | |
325 | bfd_put_16 (input_bfd, x, contents - 2); | |
326 | break; | |
327 | ||
2469cfa2 | 328 | case R_MSP430_16_PCREL: |
b18c562e | 329 | case R_MSP430_RL_PCREL: |
2469cfa2 NC |
330 | contents += rel->r_offset; |
331 | srel = (bfd_signed_vma) relocation; | |
332 | srel += rel->r_addend; | |
333 | srel -= rel->r_offset; | |
334 | /* Only branch instructions add 2 to the PC... */ | |
335 | srel -= (input_section->output_section->vma + | |
336 | input_section->output_offset); | |
337 | ||
338 | if (srel & 1) | |
339 | return bfd_reloc_outofrange; | |
340 | ||
341 | bfd_put_16 (input_bfd, srel & 0xffff, contents); | |
342 | break; | |
343 | ||
344 | case R_MSP430_16_PCREL_BYTE: | |
345 | contents += rel->r_offset; | |
346 | srel = (bfd_signed_vma) relocation; | |
347 | srel += rel->r_addend; | |
348 | srel -= rel->r_offset; | |
349 | /* Only branch instructions add 2 to the PC... */ | |
350 | srel -= (input_section->output_section->vma + | |
351 | input_section->output_offset); | |
352 | ||
353 | bfd_put_16 (input_bfd, srel & 0xffff, contents); | |
354 | break; | |
355 | ||
356 | case R_MSP430_16_BYTE: | |
357 | contents += rel->r_offset; | |
358 | srel = (bfd_signed_vma) relocation; | |
359 | srel += rel->r_addend; | |
360 | bfd_put_16 (input_bfd, srel & 0xffff, contents); | |
361 | break; | |
362 | ||
363 | case R_MSP430_16: | |
364 | contents += rel->r_offset; | |
365 | srel = (bfd_signed_vma) relocation; | |
366 | srel += rel->r_addend; | |
367 | ||
368 | if (srel & 1) | |
369 | return bfd_reloc_notsupported; | |
370 | ||
371 | bfd_put_16 (input_bfd, srel & 0xffff, contents); | |
372 | break; | |
373 | ||
374 | default: | |
375 | r = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
376 | contents, rel->r_offset, | |
377 | relocation, rel->r_addend); | |
378 | } | |
379 | ||
380 | return r; | |
381 | } | |
382 | ||
383 | /* Relocate an MSP430 ELF section. */ | |
384 | ||
385 | static bfd_boolean | |
b18c562e NC |
386 | elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED, |
387 | struct bfd_link_info * info, | |
388 | bfd * input_bfd, | |
389 | asection * input_section, | |
390 | bfd_byte * contents, | |
391 | Elf_Internal_Rela * relocs, | |
392 | Elf_Internal_Sym * local_syms, | |
393 | asection ** local_sections) | |
2469cfa2 NC |
394 | { |
395 | Elf_Internal_Shdr *symtab_hdr; | |
396 | struct elf_link_hash_entry **sym_hashes; | |
397 | Elf_Internal_Rela *rel; | |
398 | Elf_Internal_Rela *relend; | |
399 | ||
400 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
401 | sym_hashes = elf_sym_hashes (input_bfd); | |
402 | relend = relocs + input_section->reloc_count; | |
403 | ||
404 | for (rel = relocs; rel < relend; rel++) | |
405 | { | |
406 | reloc_howto_type *howto; | |
407 | unsigned long r_symndx; | |
408 | Elf_Internal_Sym *sym; | |
409 | asection *sec; | |
410 | struct elf_link_hash_entry *h; | |
411 | bfd_vma relocation; | |
412 | bfd_reloc_status_type r; | |
413 | const char *name = NULL; | |
414 | int r_type; | |
415 | ||
2469cfa2 NC |
416 | r_type = ELF32_R_TYPE (rel->r_info); |
417 | r_symndx = ELF32_R_SYM (rel->r_info); | |
418 | howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info); | |
419 | h = NULL; | |
420 | sym = NULL; | |
421 | sec = NULL; | |
422 | ||
423 | if (r_symndx < symtab_hdr->sh_info) | |
424 | { | |
425 | sym = local_syms + r_symndx; | |
426 | sec = local_sections[r_symndx]; | |
8517fae7 | 427 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
2469cfa2 NC |
428 | |
429 | name = bfd_elf_string_from_elf_section | |
430 | (input_bfd, symtab_hdr->sh_link, sym->st_name); | |
431 | name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name; | |
432 | } | |
433 | else | |
434 | { | |
59c2e50f | 435 | bfd_boolean unresolved_reloc, warned; |
2469cfa2 | 436 | |
b2a8e766 AM |
437 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
438 | r_symndx, symtab_hdr, sym_hashes, | |
439 | h, sec, relocation, | |
440 | unresolved_reloc, warned); | |
2469cfa2 NC |
441 | } |
442 | ||
ab96bf03 AM |
443 | if (sec != NULL && elf_discarded_section (sec)) |
444 | { | |
445 | /* For relocs against symbols from removed linkonce sections, | |
446 | or sections discarded by a linker script, we just want the | |
447 | section contents zeroed. Avoid any special processing. */ | |
448 | _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset); | |
449 | rel->r_info = 0; | |
450 | rel->r_addend = 0; | |
451 | continue; | |
452 | } | |
453 | ||
454 | if (info->relocatable) | |
455 | continue; | |
456 | ||
2469cfa2 NC |
457 | r = msp430_final_link_relocate (howto, input_bfd, input_section, |
458 | contents, rel, relocation); | |
459 | ||
460 | if (r != bfd_reloc_ok) | |
461 | { | |
462 | const char *msg = (const char *) NULL; | |
463 | ||
464 | switch (r) | |
465 | { | |
466 | case bfd_reloc_overflow: | |
467 | r = info->callbacks->reloc_overflow | |
dfeffb9f L |
468 | (info, (h ? &h->root : NULL), name, howto->name, |
469 | (bfd_vma) 0, input_bfd, input_section, | |
470 | rel->r_offset); | |
2469cfa2 NC |
471 | break; |
472 | ||
473 | case bfd_reloc_undefined: | |
474 | r = info->callbacks->undefined_symbol | |
475 | (info, name, input_bfd, input_section, rel->r_offset, TRUE); | |
476 | break; | |
477 | ||
478 | case bfd_reloc_outofrange: | |
479 | msg = _("internal error: out of range error"); | |
480 | break; | |
481 | ||
482 | case bfd_reloc_notsupported: | |
483 | msg = _("internal error: unsupported relocation error"); | |
484 | break; | |
485 | ||
486 | case bfd_reloc_dangerous: | |
487 | msg = _("internal error: dangerous relocation"); | |
488 | break; | |
489 | ||
490 | default: | |
491 | msg = _("internal error: unknown error"); | |
492 | break; | |
493 | } | |
494 | ||
495 | if (msg) | |
496 | r = info->callbacks->warning | |
497 | (info, msg, name, input_bfd, input_section, rel->r_offset); | |
498 | ||
499 | if (!r) | |
500 | return FALSE; | |
501 | } | |
502 | ||
503 | } | |
504 | ||
505 | return TRUE; | |
506 | } | |
507 | ||
508 | /* The final processing done just before writing out a MSP430 ELF object | |
509 | file. This gets the MSP430 architecture right based on the machine | |
510 | number. */ | |
511 | ||
512 | static void | |
b18c562e NC |
513 | bfd_elf_msp430_final_write_processing (bfd * abfd, |
514 | bfd_boolean linker ATTRIBUTE_UNUSED) | |
2469cfa2 NC |
515 | { |
516 | unsigned long val; | |
517 | ||
518 | switch (bfd_get_mach (abfd)) | |
519 | { | |
520 | default: | |
2469cfa2 NC |
521 | case bfd_mach_msp110: |
522 | val = E_MSP430_MACH_MSP430x11x1; | |
523 | break; | |
524 | ||
525 | case bfd_mach_msp11: | |
526 | val = E_MSP430_MACH_MSP430x11; | |
527 | break; | |
528 | ||
3b260895 NC |
529 | case bfd_mach_msp12: |
530 | val = E_MSP430_MACH_MSP430x12; | |
531 | break; | |
532 | ||
2469cfa2 NC |
533 | case bfd_mach_msp13: |
534 | val = E_MSP430_MACH_MSP430x13; | |
535 | break; | |
536 | ||
537 | case bfd_mach_msp14: | |
538 | val = E_MSP430_MACH_MSP430x14; | |
539 | break; | |
540 | ||
3b260895 NC |
541 | case bfd_mach_msp15: |
542 | val = E_MSP430_MACH_MSP430x15; | |
2469cfa2 NC |
543 | break; |
544 | ||
3b260895 NC |
545 | case bfd_mach_msp16: |
546 | val = E_MSP430_MACH_MSP430x16; | |
2469cfa2 NC |
547 | break; |
548 | ||
549 | case bfd_mach_msp31: | |
550 | val = E_MSP430_MACH_MSP430x31; | |
551 | break; | |
552 | ||
553 | case bfd_mach_msp32: | |
554 | val = E_MSP430_MACH_MSP430x32; | |
555 | break; | |
556 | ||
557 | case bfd_mach_msp33: | |
558 | val = E_MSP430_MACH_MSP430x33; | |
559 | break; | |
560 | ||
3b260895 NC |
561 | case bfd_mach_msp41: |
562 | val = E_MSP430_MACH_MSP430x41; | |
2469cfa2 NC |
563 | break; |
564 | ||
3b260895 NC |
565 | case bfd_mach_msp42: |
566 | val = E_MSP430_MACH_MSP430x42; | |
567 | break; | |
568 | ||
569 | case bfd_mach_msp43: | |
570 | val = E_MSP430_MACH_MSP430x43; | |
571 | break; | |
572 | ||
573 | case bfd_mach_msp44: | |
574 | val = E_MSP430_MACH_MSP430x44; | |
2469cfa2 NC |
575 | break; |
576 | } | |
577 | ||
578 | elf_elfheader (abfd)->e_machine = EM_MSP430; | |
579 | elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH; | |
580 | elf_elfheader (abfd)->e_flags |= val; | |
581 | } | |
582 | ||
583 | /* Set the right machine number. */ | |
584 | ||
585 | static bfd_boolean | |
b18c562e | 586 | elf32_msp430_object_p (bfd * abfd) |
2469cfa2 NC |
587 | { |
588 | int e_set = bfd_mach_msp14; | |
589 | ||
590 | if (elf_elfheader (abfd)->e_machine == EM_MSP430 | |
591 | || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD) | |
592 | { | |
593 | int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH; | |
594 | ||
595 | switch (e_mach) | |
596 | { | |
597 | default: | |
2469cfa2 NC |
598 | case E_MSP430_MACH_MSP430x11: |
599 | e_set = bfd_mach_msp11; | |
600 | break; | |
601 | ||
602 | case E_MSP430_MACH_MSP430x11x1: | |
603 | e_set = bfd_mach_msp110; | |
604 | break; | |
605 | ||
3b260895 NC |
606 | case E_MSP430_MACH_MSP430x12: |
607 | e_set = bfd_mach_msp12; | |
608 | break; | |
609 | ||
2469cfa2 NC |
610 | case E_MSP430_MACH_MSP430x13: |
611 | e_set = bfd_mach_msp13; | |
612 | break; | |
613 | ||
614 | case E_MSP430_MACH_MSP430x14: | |
615 | e_set = bfd_mach_msp14; | |
616 | break; | |
617 | ||
3b260895 NC |
618 | case E_MSP430_MACH_MSP430x15: |
619 | e_set = bfd_mach_msp15; | |
620 | break; | |
621 | ||
622 | case E_MSP430_MACH_MSP430x16: | |
623 | e_set = bfd_mach_msp16; | |
2469cfa2 NC |
624 | break; |
625 | ||
626 | case E_MSP430_MACH_MSP430x31: | |
627 | e_set = bfd_mach_msp31; | |
628 | break; | |
629 | ||
630 | case E_MSP430_MACH_MSP430x32: | |
631 | e_set = bfd_mach_msp32; | |
632 | break; | |
633 | ||
634 | case E_MSP430_MACH_MSP430x33: | |
635 | e_set = bfd_mach_msp33; | |
636 | break; | |
637 | ||
3b260895 NC |
638 | case E_MSP430_MACH_MSP430x41: |
639 | e_set = bfd_mach_msp41; | |
2469cfa2 NC |
640 | break; |
641 | ||
3b260895 NC |
642 | case E_MSP430_MACH_MSP430x42: |
643 | e_set = bfd_mach_msp42; | |
2469cfa2 NC |
644 | break; |
645 | ||
3b260895 NC |
646 | case E_MSP430_MACH_MSP430x43: |
647 | e_set = bfd_mach_msp43; | |
2469cfa2 NC |
648 | break; |
649 | ||
3b260895 NC |
650 | case E_MSP430_MACH_MSP430x44: |
651 | e_set = bfd_mach_msp44; | |
2469cfa2 NC |
652 | break; |
653 | } | |
654 | } | |
655 | ||
656 | return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set); | |
657 | } | |
658 | ||
b18c562e NC |
659 | /* These functions handle relaxing for the msp430. |
660 | Relaxation required only in two cases: | |
661 | - Bad hand coding like jumps from one section to another or | |
662 | from file to file. | |
663 | - Sibling calls. This will affect onlu 'jump label' polymorph. Without | |
664 | relaxing this enlarges code by 2 bytes. Sibcalls implemented but | |
665 | do not work in gcc's port by the reason I do not know. | |
666 | Anyway, if a relaxation required, user should pass -relax option to the | |
667 | linker. | |
668 | ||
669 | There are quite a few relaxing opportunities available on the msp430: | |
670 | ||
671 | ================================================================ | |
672 | ||
673 | 1. 3 words -> 1 word | |
674 | ||
675 | eq == jeq label jne +4; br lab | |
676 | ne != jne label jeq +4; br lab | |
677 | lt < jl label jge +4; br lab | |
678 | ltu < jlo label lhs +4; br lab | |
679 | ge >= jge label jl +4; br lab | |
680 | geu >= jhs label jlo +4; br lab | |
681 | ||
682 | 2. 4 words -> 1 word | |
683 | ||
684 | ltn < jn jn +2; jmp +4; br lab | |
685 | ||
686 | 3. 4 words -> 2 words | |
687 | ||
688 | gt > jeq +2; jge label jeq +6; jl +4; br label | |
689 | gtu > jeq +2; jhs label jeq +6; jlo +4; br label | |
690 | ||
691 | 4. 4 words -> 2 words and 2 labels | |
692 | ||
693 | leu <= jeq label; jlo label jeq +2; jhs +4; br label | |
694 | le <= jeq label; jl label jeq +2; jge +4; br label | |
695 | ================================================================= | |
696 | ||
697 | codemap for first cases is (labels masked ): | |
698 | eq: 0x2002,0x4010,0x0000 -> 0x2400 | |
699 | ne: 0x2402,0x4010,0x0000 -> 0x2000 | |
700 | lt: 0x3402,0x4010,0x0000 -> 0x3800 | |
701 | ltu: 0x2c02,0x4010,0x0000 -> 0x2800 | |
702 | ge: 0x3802,0x4010,0x0000 -> 0x3400 | |
703 | geu: 0x2802,0x4010,0x0000 -> 0x2c00 | |
704 | ||
705 | second case: | |
706 | ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000 | |
707 | ||
708 | third case: | |
709 | gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400 | |
710 | gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00 | |
711 | ||
712 | fourth case: | |
713 | leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800 | |
714 | le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800 | |
715 | ||
716 | Unspecified case :) | |
717 | jump: 0x4010,0x0000 -> 0x3c00. */ | |
718 | ||
719 | #define NUMB_RELAX_CODES 12 | |
720 | static struct rcodes_s | |
721 | { | |
722 | int f0, f1; /* From code. */ | |
723 | int t0, t1; /* To code. */ | |
724 | int labels; /* Position of labels: 1 - one label at first | |
725 | word, 2 - one at second word, 3 - two | |
726 | labels at both. */ | |
727 | int cdx; /* Words to match. */ | |
728 | int bs; /* Shrink bytes. */ | |
729 | int off; /* Offset from old label for new code. */ | |
730 | int ncl; /* New code length. */ | |
731 | } rcode[] = | |
732 | {/* lab,cdx,bs,off,ncl */ | |
733 | { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */ | |
734 | { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */ | |
735 | { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */ | |
736 | { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */ | |
737 | { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */ | |
738 | { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */ | |
739 | { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */ | |
740 | { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */ | |
741 | { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */ | |
742 | { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */ | |
743 | { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */ | |
744 | { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */ | |
745 | { 0, 0, 0, 0, 0, 0, 0, 0, 0} | |
746 | }; | |
747 | ||
748 | /* Return TRUE if a symbol exists at the given address. */ | |
749 | ||
750 | static bfd_boolean | |
751 | msp430_elf_symbol_address_p (bfd * abfd, | |
752 | asection * sec, | |
753 | Elf_Internal_Sym * isym, | |
754 | bfd_vma addr) | |
755 | { | |
756 | Elf_Internal_Shdr *symtab_hdr; | |
757 | unsigned int sec_shndx; | |
758 | Elf_Internal_Sym *isymend; | |
759 | struct elf_link_hash_entry **sym_hashes; | |
760 | struct elf_link_hash_entry **end_hashes; | |
761 | unsigned int symcount; | |
762 | ||
763 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
764 | ||
765 | /* Examine all the local symbols. */ | |
766 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
767 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
768 | if (isym->st_shndx == sec_shndx && isym->st_value == addr) | |
769 | return TRUE; | |
770 | ||
771 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
772 | - symtab_hdr->sh_info); | |
773 | sym_hashes = elf_sym_hashes (abfd); | |
774 | end_hashes = sym_hashes + symcount; | |
775 | for (; sym_hashes < end_hashes; sym_hashes++) | |
776 | { | |
777 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
778 | ||
779 | if ((sym_hash->root.type == bfd_link_hash_defined | |
780 | || sym_hash->root.type == bfd_link_hash_defweak) | |
781 | && sym_hash->root.u.def.section == sec | |
782 | && sym_hash->root.u.def.value == addr) | |
783 | return TRUE; | |
784 | } | |
785 | ||
786 | return FALSE; | |
787 | } | |
788 | ||
046aeb74 DD |
789 | /* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx) |
790 | referenced from current and other sections */ | |
791 | static bfd_boolean | |
792 | msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr, | |
793 | int count, unsigned int sec_shndx, bfd_vma toaddr) | |
794 | { | |
795 | Elf_Internal_Shdr *symtab_hdr; | |
796 | Elf_Internal_Rela *irel; | |
797 | Elf_Internal_Rela *irelend; | |
798 | Elf_Internal_Sym *isym; | |
799 | ||
800 | irel = elf_section_data (sec)->relocs; | |
801 | irelend = irel + sec->reloc_count; | |
802 | symtab_hdr = & elf_tdata (abfd)->symtab_hdr; | |
803 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
804 | ||
805 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
806 | { | |
807 | int sidx = ELF32_R_SYM(irel->r_info); | |
808 | Elf_Internal_Sym *lsym = isym + sidx; | |
809 | ||
810 | /* Adjust symbols referenced by .sec+0xXX */ | |
811 | if (irel->r_addend > addr && irel->r_addend < toaddr | |
812 | && lsym->st_shndx == sec_shndx) | |
813 | irel->r_addend -= count; | |
814 | } | |
815 | ||
816 | return TRUE; | |
817 | } | |
818 | ||
b18c562e NC |
819 | /* Delete some bytes from a section while relaxing. */ |
820 | ||
821 | static bfd_boolean | |
822 | msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr, | |
823 | int count) | |
824 | { | |
825 | Elf_Internal_Shdr *symtab_hdr; | |
826 | unsigned int sec_shndx; | |
827 | bfd_byte *contents; | |
828 | Elf_Internal_Rela *irel; | |
829 | Elf_Internal_Rela *irelend; | |
830 | Elf_Internal_Rela *irelalign; | |
831 | bfd_vma toaddr; | |
832 | Elf_Internal_Sym *isym; | |
833 | Elf_Internal_Sym *isymend; | |
834 | struct elf_link_hash_entry **sym_hashes; | |
835 | struct elf_link_hash_entry **end_hashes; | |
836 | unsigned int symcount; | |
046aeb74 | 837 | asection *p; |
b18c562e NC |
838 | |
839 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
840 | ||
841 | contents = elf_section_data (sec)->this_hdr.contents; | |
842 | ||
843 | /* The deletion must stop at the next ALIGN reloc for an aligment | |
844 | power larger than the number of bytes we are deleting. */ | |
845 | ||
846 | irelalign = NULL; | |
847 | toaddr = sec->size; | |
848 | ||
849 | irel = elf_section_data (sec)->relocs; | |
850 | irelend = irel + sec->reloc_count; | |
851 | ||
852 | /* Actually delete the bytes. */ | |
853 | memmove (contents + addr, contents + addr + count, | |
854 | (size_t) (toaddr - addr - count)); | |
855 | sec->size -= count; | |
856 | ||
857 | /* Adjust all the relocs. */ | |
fa9ee72b DD |
858 | symtab_hdr = & elf_tdata (abfd)->symtab_hdr; |
859 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
b18c562e | 860 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) |
fa9ee72b | 861 | { |
fa9ee72b DD |
862 | /* Get the new reloc address. */ |
863 | if ((irel->r_offset > addr && irel->r_offset < toaddr)) | |
864 | irel->r_offset -= count; | |
fa9ee72b | 865 | } |
b18c562e | 866 | |
046aeb74 DD |
867 | for (p = abfd->sections; p != NULL; p = p->next) |
868 | msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr); | |
869 | ||
b18c562e NC |
870 | /* Adjust the local symbols defined in this section. */ |
871 | symtab_hdr = & elf_tdata (abfd)->symtab_hdr; | |
872 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
873 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
874 | if (isym->st_shndx == sec_shndx | |
875 | && isym->st_value > addr && isym->st_value < toaddr) | |
876 | isym->st_value -= count; | |
877 | ||
878 | /* Now adjust the global symbols defined in this section. */ | |
879 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
880 | - symtab_hdr->sh_info); | |
881 | sym_hashes = elf_sym_hashes (abfd); | |
882 | end_hashes = sym_hashes + symcount; | |
883 | for (; sym_hashes < end_hashes; sym_hashes++) | |
884 | { | |
885 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
886 | ||
887 | if ((sym_hash->root.type == bfd_link_hash_defined | |
888 | || sym_hash->root.type == bfd_link_hash_defweak) | |
889 | && sym_hash->root.u.def.section == sec | |
890 | && sym_hash->root.u.def.value > addr | |
891 | && sym_hash->root.u.def.value < toaddr) | |
892 | sym_hash->root.u.def.value -= count; | |
893 | } | |
894 | ||
895 | return TRUE; | |
896 | } | |
897 | ||
898 | ||
899 | static bfd_boolean | |
900 | msp430_elf_relax_section (bfd * abfd, asection * sec, | |
901 | struct bfd_link_info * link_info, | |
902 | bfd_boolean * again) | |
903 | { | |
904 | Elf_Internal_Shdr * symtab_hdr; | |
905 | Elf_Internal_Rela * internal_relocs; | |
906 | Elf_Internal_Rela * irel; | |
907 | Elf_Internal_Rela * irelend; | |
908 | bfd_byte * contents = NULL; | |
909 | Elf_Internal_Sym * isymbuf = NULL; | |
910 | ||
911 | /* Assume nothing changes. */ | |
912 | *again = FALSE; | |
913 | ||
914 | /* We don't have to do anything for a relocatable link, if | |
915 | this section does not have relocs, or if this is not a | |
916 | code section. */ | |
917 | if (link_info->relocatable | |
918 | || (sec->flags & SEC_RELOC) == 0 | |
919 | || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0) | |
920 | return TRUE; | |
921 | ||
922 | symtab_hdr = & elf_tdata (abfd)->symtab_hdr; | |
923 | ||
924 | /* Get a copy of the native relocations. */ | |
925 | internal_relocs = | |
926 | _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory); | |
927 | if (internal_relocs == NULL) | |
928 | goto error_return; | |
929 | ||
930 | /* Walk through them looking for relaxing opportunities. */ | |
931 | irelend = internal_relocs + sec->reloc_count; | |
932 | for (irel = internal_relocs; irel < irelend; irel++) | |
933 | { | |
934 | bfd_vma symval; | |
935 | ||
936 | /* If this isn't something that can be relaxed, then ignore | |
937 | this reloc. */ | |
938 | if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL) | |
939 | continue; | |
940 | ||
941 | /* Get the section contents if we haven't done so already. */ | |
942 | if (contents == NULL) | |
943 | { | |
944 | /* Get cached copy if it exists. */ | |
945 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
946 | contents = elf_section_data (sec)->this_hdr.contents; | |
947 | else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
948 | goto error_return; | |
949 | } | |
950 | ||
951 | /* Read this BFD's local symbols if we haven't done so already. */ | |
952 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
953 | { | |
954 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
955 | if (isymbuf == NULL) | |
956 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
957 | symtab_hdr->sh_info, 0, | |
958 | NULL, NULL, NULL); | |
959 | if (isymbuf == NULL) | |
960 | goto error_return; | |
961 | } | |
962 | ||
963 | /* Get the value of the symbol referred to by the reloc. */ | |
964 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
965 | { | |
966 | /* A local symbol. */ | |
967 | Elf_Internal_Sym *isym; | |
968 | asection *sym_sec; | |
969 | ||
970 | isym = isymbuf + ELF32_R_SYM (irel->r_info); | |
971 | if (isym->st_shndx == SHN_UNDEF) | |
972 | sym_sec = bfd_und_section_ptr; | |
973 | else if (isym->st_shndx == SHN_ABS) | |
974 | sym_sec = bfd_abs_section_ptr; | |
975 | else if (isym->st_shndx == SHN_COMMON) | |
976 | sym_sec = bfd_com_section_ptr; | |
977 | else | |
978 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); | |
979 | symval = (isym->st_value | |
980 | + sym_sec->output_section->vma + sym_sec->output_offset); | |
981 | } | |
982 | else | |
983 | { | |
984 | unsigned long indx; | |
985 | struct elf_link_hash_entry *h; | |
986 | ||
987 | /* An external symbol. */ | |
988 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
989 | h = elf_sym_hashes (abfd)[indx]; | |
990 | BFD_ASSERT (h != NULL); | |
991 | ||
992 | if (h->root.type != bfd_link_hash_defined | |
993 | && h->root.type != bfd_link_hash_defweak) | |
994 | /* This appears to be a reference to an undefined | |
995 | symbol. Just ignore it--it will be caught by the | |
996 | regular reloc processing. */ | |
997 | continue; | |
998 | ||
999 | symval = (h->root.u.def.value | |
1000 | + h->root.u.def.section->output_section->vma | |
1001 | + h->root.u.def.section->output_offset); | |
1002 | } | |
1003 | ||
1004 | /* For simplicity of coding, we are going to modify the section | |
1005 | contents, the section relocs, and the BFD symbol table. We | |
1006 | must tell the rest of the code not to free up this | |
1007 | information. It would be possible to instead create a table | |
1008 | of changes which have to be made, as is done in coff-mips.c; | |
1009 | that would be more work, but would require less memory when | |
1010 | the linker is run. */ | |
1011 | ||
1012 | /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative | |
1013 | branch. */ | |
1014 | /* Paranoia? paranoia... */ | |
1015 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL) | |
1016 | { | |
1017 | bfd_vma value = symval; | |
1018 | ||
1019 | /* Deal with pc-relative gunk. */ | |
1020 | value -= (sec->output_section->vma + sec->output_offset); | |
1021 | value -= irel->r_offset; | |
1022 | value += irel->r_addend; | |
1023 | ||
1024 | /* See if the value will fit in 10 bits, note the high value is | |
1025 | 1016 as the target will be two bytes closer if we are | |
1026 | able to relax. */ | |
1027 | if ((long) value < 1016 && (long) value > -1016) | |
1028 | { | |
1029 | int code0 = 0, code1 = 0, code2 = 0; | |
1030 | int i; | |
1031 | struct rcodes_s *rx; | |
1032 | ||
1033 | /* Get the opcode. */ | |
1034 | if (irel->r_offset >= 6) | |
1035 | code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6); | |
1036 | ||
1037 | if (irel->r_offset >= 4) | |
1038 | code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4); | |
1039 | ||
1040 | code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2); | |
1041 | ||
1042 | if (code2 != 0x4010) | |
1043 | continue; | |
1044 | ||
1045 | /* Check r4 and r3. */ | |
1046 | for (i = NUMB_RELAX_CODES - 1; i >= 0; i--) | |
1047 | { | |
1048 | rx = &rcode[i]; | |
1049 | if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1) | |
1050 | break; | |
1051 | else if (rx->cdx == 1 && rx->f1 == code1) | |
1052 | break; | |
1053 | else if (rx->cdx == 0) /* This is an unconditional jump. */ | |
1054 | break; | |
1055 | } | |
1056 | ||
1057 | /* Check labels: | |
1058 | .Label0: ; we do not care about this label | |
1059 | jeq +6 | |
1060 | .Label1: ; make sure there is no label here | |
1061 | jl +4 | |
1062 | .Label2: ; make sure there is no label here | |
1063 | br .Label_dst | |
1064 | ||
1065 | So, if there is .Label1 or .Label2 we cannot relax this code. | |
1066 | This actually should not happen, cause for relaxable | |
1067 | instructions we use RL_PCREL reloc instead of 16_PCREL. | |
1068 | Will change this in the future. */ | |
1069 | ||
1070 | if (rx->cdx > 0 | |
1071 | && msp430_elf_symbol_address_p (abfd, sec, isymbuf, | |
1072 | irel->r_offset - 2)) | |
1073 | continue; | |
1074 | if (rx->cdx > 1 | |
1075 | && msp430_elf_symbol_address_p (abfd, sec, isymbuf, | |
1076 | irel->r_offset - 4)) | |
1077 | continue; | |
1078 | ||
1079 | /* Note that we've changed the relocs, section contents, etc. */ | |
1080 | elf_section_data (sec)->relocs = internal_relocs; | |
1081 | elf_section_data (sec)->this_hdr.contents = contents; | |
1082 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
1083 | ||
1084 | /* Fix the relocation's type. */ | |
1085 | if (rx->labels == 3) /* Handle special cases. */ | |
1086 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1087 | R_MSP430_2X_PCREL); | |
1088 | else | |
1089 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1090 | R_MSP430_10_PCREL); | |
1091 | ||
1092 | /* Fix the opcode right way. */ | |
1093 | bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off); | |
1094 | if (rx->t1) | |
1095 | bfd_put_16 (abfd, rx->t1, | |
1096 | contents + irel->r_offset - rx->off + 2); | |
1097 | ||
1098 | /* Delete bytes. */ | |
1099 | if (!msp430_elf_relax_delete_bytes (abfd, sec, | |
1100 | irel->r_offset - rx->off + | |
1101 | rx->ncl, rx->bs)) | |
1102 | goto error_return; | |
1103 | ||
1104 | /* Handle unconditional jumps. */ | |
1105 | if (rx->cdx == 0) | |
1106 | irel->r_offset -= 2; | |
1107 | ||
1108 | /* That will change things, so, we should relax again. | |
1109 | Note that this is not required, and it may be slow. */ | |
1110 | *again = TRUE; | |
1111 | } | |
1112 | } | |
1113 | } | |
1114 | ||
1115 | if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1116 | { | |
1117 | if (!link_info->keep_memory) | |
1118 | free (isymbuf); | |
1119 | else | |
1120 | { | |
1121 | /* Cache the symbols for elf_link_input_bfd. */ | |
1122 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
1123 | } | |
1124 | } | |
1125 | ||
1126 | if (contents != NULL | |
1127 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1128 | { | |
1129 | if (!link_info->keep_memory) | |
1130 | free (contents); | |
1131 | else | |
1132 | { | |
1133 | /* Cache the section contents for elf_link_input_bfd. */ | |
1134 | elf_section_data (sec)->this_hdr.contents = contents; | |
1135 | } | |
1136 | } | |
1137 | ||
1138 | if (internal_relocs != NULL | |
1139 | && elf_section_data (sec)->relocs != internal_relocs) | |
1140 | free (internal_relocs); | |
1141 | ||
1142 | return TRUE; | |
1143 | ||
1144 | error_return: | |
1145 | if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1146 | free (isymbuf); | |
1147 | if (contents != NULL | |
1148 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1149 | free (contents); | |
1150 | if (internal_relocs != NULL | |
1151 | && elf_section_data (sec)->relocs != internal_relocs) | |
1152 | free (internal_relocs); | |
1153 | ||
1154 | return FALSE; | |
1155 | } | |
1156 | ||
2469cfa2 NC |
1157 | |
1158 | #define ELF_ARCH bfd_arch_msp430 | |
1159 | #define ELF_MACHINE_CODE EM_MSP430 | |
1160 | #define ELF_MACHINE_ALT1 EM_MSP430_OLD | |
1161 | #define ELF_MAXPAGESIZE 1 | |
d1036acb | 1162 | #define ELF_OSABI ELFOSABI_STANDALONE |
2469cfa2 NC |
1163 | |
1164 | #define TARGET_LITTLE_SYM bfd_elf32_msp430_vec | |
1165 | #define TARGET_LITTLE_NAME "elf32-msp430" | |
1166 | ||
1167 | #define elf_info_to_howto msp430_info_to_howto_rela | |
1168 | #define elf_info_to_howto_rel NULL | |
1169 | #define elf_backend_relocate_section elf32_msp430_relocate_section | |
2469cfa2 NC |
1170 | #define elf_backend_check_relocs elf32_msp430_check_relocs |
1171 | #define elf_backend_can_gc_sections 1 | |
1172 | #define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing | |
1173 | #define elf_backend_object_p elf32_msp430_object_p | |
d1036acb | 1174 | #define elf_backend_post_process_headers _bfd_elf_set_osabi |
b18c562e | 1175 | #define bfd_elf32_bfd_relax_section msp430_elf_relax_section |
2469cfa2 NC |
1176 | |
1177 | #include "elf32-target.h" |