projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Automatic date update in version.in
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
CommitLineData
35c08157 1/* NDS32-specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 59
60/* Nds32 helper functions. */
35c08157 61static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 62(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
35c08157
KLC		 65static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
66 Elf_Internal_Sym **);
35c08157
KLC		 67static bfd_boolean nds32_relax_fp_as_gp
68 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
69 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
70 Elf_Internal_Sym *isymbuf);
71static bfd_boolean nds32_fag_remove_unused_fpbase
72 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
73 Elf_Internal_Rela *irelend);
74
75enum
76{
77 MACH_V1 = bfd_mach_n1h,
78 MACH_V2 = bfd_mach_n1h_v2,
79 MACH_V3 = bfd_mach_n1h_v3,
80 MACH_V3M = bfd_mach_n1h_v3m
81};
82
83#define MIN(a, b) ((a) > (b) ? (b) : (a))
84#define MAX(a, b) ((a) > (b) ? (a) : (b))
85
86/* The name of the dynamic interpreter. This is put in the .interp
87 section. */
88#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
89
90/* The nop opcode we use. */
91#define NDS32_NOP32 0x40000009
92#define NDS32_NOP16 0x9200
93
94/* The size in bytes of an entry in the procedure linkage table. */
95#define PLT_ENTRY_SIZE 24
96#define PLT_HEADER_SIZE 24
97
98/* The first entry in a procedure linkage table are reserved,
99 and the initial contents are unimportant (we zero them out).
100 Subsequent entries look like this. */
07d6d2b8
AM		 101#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
102#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
103#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
104#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
105#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 106
107/* $ta is change to $r15 (from $r25). */
108#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 109#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
110#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
111#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
112#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
113#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
114
115#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
116#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
117#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
118#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
119#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 120
121#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 122#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
123#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
124#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
125#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
126#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 127
1c8f6a4d
KLC		 128/* These are macros used to get the relocation accurate value. */
129#define ACCURATE_8BIT_S1 (0x100)
130#define ACCURATE_U9BIT_S1 (0x400)
131#define ACCURATE_12BIT_S1 (0x2000)
132#define ACCURATE_14BIT_S1 (0x4000)
133#define ACCURATE_19BIT (0x40000)
134
135/* These are macros used to get the relocation conservative value. */
136#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
137#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
138#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
139#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
140/* These must be more conservative because the address may be in
141 different segment. */
142#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
143#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
144#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
145#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
146#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
147
35c08157
KLC		 148/* Size of small data/bss sections, used to calculate SDA_BASE. */
149static long got_size = 0;
150static int is_SDA_BASE_set = 0;
35c08157 151
35c08157
KLC		 152/* Convert ELF-VER in eflags to string for debugging purpose. */
153static const char *const nds32_elfver_strtab[] =
154{
155 "ELF-1.2",
156 "ELF-1.3",
157 "ELF-1.4",
158};
159
160/* The nds32 linker needs to keep track of the number of relocs that it
161 decides to copy in check_relocs for each symbol. This is so that
162 it can discard PC relative relocs if it doesn't need them when
163 linking with -Bsymbolic. We store the information in a field
164 extending the regular ELF linker hash table. */
165
166/* This structure keeps track of the number of PC relative relocs we
167 have copied for a given symbol. */
168
169struct elf_nds32_pcrel_relocs_copied
170{
171 /* Next section. */
172 struct elf_nds32_pcrel_relocs_copied *next;
173 /* A section in dynobj. */
174 asection *section;
175 /* Number of relocs copied in this section. */
176 bfd_size_type count;
177};
178
35c08157
KLC		 179/* Nds32 ELF linker hash entry. */
180
181struct elf_nds32_link_hash_entry
182{
183 struct elf_link_hash_entry root;
184
185 /* Track dynamic relocs copied for this symbol. */
3bf083ed 186 struct elf_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 187
188 /* For checking relocation type. */
189#define GOT_UNKNOWN 0
190#define GOT_NORMAL 1
191#define GOT_TLS_IE 2
192 unsigned int tls_type;
35c08157
KLC		 193};
194
195/* Get the nds32 ELF linker hash table from a link_info structure. */
196
197#define FP_BASE_NAME "_FP_BASE_"
198static int check_start_export_sym = 0;
35c08157 199
1c8f6a4d
KLC		 200/* The offset for executable tls relaxation. */
201#define TP_OFFSET 0x0
202
203struct elf_nds32_obj_tdata
204{
205 struct elf_obj_tdata root;
206
207 /* tls_type for each local got entry. */
208 char *local_got_tls_type;
209};
210
211#define elf_nds32_tdata(bfd) \
212 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
213
214#define elf32_nds32_local_got_tls_type(bfd) \
215 (elf_nds32_tdata (bfd)->local_got_tls_type)
216
217#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
218
219static bfd_boolean
220nds32_elf_mkobject (bfd *abfd)
221{
222 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
223 NDS32_ELF_DATA);
224}
225
35c08157
KLC		 226/* Relocations used for relocation. */
227static reloc_howto_type nds32_elf_howto_table[] =
228{
229 /* This reloc does nothing. */
230 HOWTO (R_NDS32_NONE, /* type */
231 0, /* rightshift */
6346d5ca
AM		 232 3, /* size (0 = byte, 1 = short, 2 = long) */
233 0, /* bitsize */
35c08157
KLC		 234 FALSE, /* pc_relative */
235 0, /* bitpos */
6346d5ca 236 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 237 bfd_elf_generic_reloc, /* special_function */
238 "R_NDS32_NONE", /* name */
239 FALSE, /* partial_inplace */
240 0, /* src_mask */
241 0, /* dst_mask */
242 FALSE), /* pcrel_offset */
243
244 /* A 16 bit absolute relocation. */
245 HOWTO (R_NDS32_16, /* type */
246 0, /* rightshift */
247 1, /* size (0 = byte, 1 = short, 2 = long) */
248 16, /* bitsize */
249 FALSE, /* pc_relative */
250 0, /* bitpos */
251 complain_overflow_bitfield, /* complain_on_overflow */
252 nds32_elf_generic_reloc, /* special_function */
253 "R_NDS32_16", /* name */
254 FALSE, /* partial_inplace */
255 0xffff, /* src_mask */
256 0xffff, /* dst_mask */
257 FALSE), /* pcrel_offset */
258
259 /* A 32 bit absolute relocation. */
260 HOWTO (R_NDS32_32, /* type */
261 0, /* rightshift */
262 2, /* size (0 = byte, 1 = short, 2 = long) */
263 32, /* bitsize */
264 FALSE, /* pc_relative */
265 0, /* bitpos */
266 complain_overflow_bitfield, /* complain_on_overflow */
267 nds32_elf_generic_reloc, /* special_function */
268 "R_NDS32_32", /* name */
269 FALSE, /* partial_inplace */
270 0xffffffff, /* src_mask */
271 0xffffffff, /* dst_mask */
272 FALSE), /* pcrel_offset */
273
274 /* A 20 bit address. */
275 HOWTO (R_NDS32_20, /* type */
276 0, /* rightshift */
277 2, /* size (0 = byte, 1 = short, 2 = long) */
278 20, /* bitsize */
279 FALSE, /* pc_relative */
280 0, /* bitpos */
281 complain_overflow_unsigned, /* complain_on_overflow */
282 nds32_elf_generic_reloc, /* special_function */
283 "R_NDS32_20", /* name */
284 FALSE, /* partial_inplace */
285 0xfffff, /* src_mask */
286 0xfffff, /* dst_mask */
287 FALSE), /* pcrel_offset */
288
289 /* An PC Relative 9-bit relocation, shifted by 2.
290 This reloc is complicated because relocations are relative to pc & -4.
291 i.e. branches in the right insn slot use the address of the left insn
292 slot for pc. */
293 /* ??? It's not clear whether this should have partial_inplace set or not.
294 Branch relaxing in the assembler can store the addend in the insn,
295 and if bfd_install_relocation gets called the addend may get added
296 again. */
297 HOWTO (R_NDS32_9_PCREL, /* type */
298 1, /* rightshift */
299 1, /* size (0 = byte, 1 = short, 2 = long) */
300 8, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed, /* complain_on_overflow */
304 nds32_elf_9_pcrel_reloc, /* special_function */
305 "R_NDS32_9_PCREL", /* name */
306 FALSE, /* partial_inplace */
307 0xff, /* src_mask */
308 0xff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* A relative 15 bit relocation, right shifted by 1. */
312 HOWTO (R_NDS32_15_PCREL, /* type */
313 1, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 14, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed, /* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_NDS32_15_PCREL", /* name */
321 FALSE, /* partial_inplace */
322 0x3fff, /* src_mask */
323 0x3fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* A relative 17 bit relocation, right shifted by 1. */
327 HOWTO (R_NDS32_17_PCREL, /* type */
328 1, /* rightshift */
329 2, /* size (0 = byte, 1 = short, 2 = long) */
330 16, /* bitsize */
331 TRUE, /* pc_relative */
332 0, /* bitpos */
333 complain_overflow_signed, /* complain_on_overflow */
334 bfd_elf_generic_reloc, /* special_function */
335 "R_NDS32_17_PCREL", /* name */
336 FALSE, /* partial_inplace */
337 0xffff, /* src_mask */
338 0xffff, /* dst_mask */
339 TRUE), /* pcrel_offset */
340
341 /* A relative 25 bit relocation, right shifted by 1. */
342 /* ??? It's not clear whether this should have partial_inplace set or not.
343 Branch relaxing in the assembler can store the addend in the insn,
344 and if bfd_install_relocation gets called the addend may get added
345 again. */
346 HOWTO (R_NDS32_25_PCREL, /* type */
347 1, /* rightshift */
348 2, /* size (0 = byte, 1 = short, 2 = long) */
349 24, /* bitsize */
350 TRUE, /* pc_relative */
351 0, /* bitpos */
352 complain_overflow_signed, /* complain_on_overflow */
353 bfd_elf_generic_reloc, /* special_function */
354 "R_NDS32_25_PCREL", /* name */
355 FALSE, /* partial_inplace */
356 0xffffff, /* src_mask */
357 0xffffff, /* dst_mask */
358 TRUE), /* pcrel_offset */
359
360 /* High 20 bits of address when lower 12 is or'd in. */
361 HOWTO (R_NDS32_HI20, /* type */
362 12, /* rightshift */
363 2, /* size (0 = byte, 1 = short, 2 = long) */
364 20, /* bitsize */
365 FALSE, /* pc_relative */
366 0, /* bitpos */
367 complain_overflow_dont,/* complain_on_overflow */
368 nds32_elf_hi20_reloc, /* special_function */
369 "R_NDS32_HI20", /* name */
370 FALSE, /* partial_inplace */
371 0x000fffff, /* src_mask */
372 0x000fffff, /* dst_mask */
373 FALSE), /* pcrel_offset */
374
375 /* Lower 12 bits of address. */
376 HOWTO (R_NDS32_LO12S3, /* type */
377 3, /* rightshift */
378 2, /* size (0 = byte, 1 = short, 2 = long) */
379 9, /* bitsize */
380 FALSE, /* pc_relative */
381 0, /* bitpos */
382 complain_overflow_dont,/* complain_on_overflow */
383 nds32_elf_lo12_reloc, /* special_function */
384 "R_NDS32_LO12S3", /* name */
385 FALSE, /* partial_inplace */
386 0x000001ff, /* src_mask */
387 0x000001ff, /* dst_mask */
388 FALSE), /* pcrel_offset */
389
390 /* Lower 12 bits of address. */
391 HOWTO (R_NDS32_LO12S2, /* type */
392 2, /* rightshift */
393 2, /* size (0 = byte, 1 = short, 2 = long) */
394 10, /* bitsize */
395 FALSE, /* pc_relative */
396 0, /* bitpos */
397 complain_overflow_dont,/* complain_on_overflow */
398 nds32_elf_lo12_reloc, /* special_function */
399 "R_NDS32_LO12S2", /* name */
400 FALSE, /* partial_inplace */
401 0x000003ff, /* src_mask */
402 0x000003ff, /* dst_mask */
403 FALSE), /* pcrel_offset */
404
405 /* Lower 12 bits of address. */
406 HOWTO (R_NDS32_LO12S1, /* type */
407 1, /* rightshift */
408 2, /* size (0 = byte, 1 = short, 2 = long) */
409 11, /* bitsize */
410 FALSE, /* pc_relative */
411 0, /* bitpos */
412 complain_overflow_dont,/* complain_on_overflow */
413 nds32_elf_lo12_reloc, /* special_function */
414 "R_NDS32_LO12S1", /* name */
415 FALSE, /* partial_inplace */
416 0x000007ff, /* src_mask */
417 0x000007ff, /* dst_mask */
418 FALSE), /* pcrel_offset */
419
420 /* Lower 12 bits of address. */
421 HOWTO (R_NDS32_LO12S0, /* type */
422 0, /* rightshift */
423 2, /* size (0 = byte, 1 = short, 2 = long) */
424 12, /* bitsize */
425 FALSE, /* pc_relative */
426 0, /* bitpos */
427 complain_overflow_dont,/* complain_on_overflow */
428 nds32_elf_lo12_reloc, /* special_function */
429 "R_NDS32_LO12S0", /* name */
430 FALSE, /* partial_inplace */
431 0x00000fff, /* src_mask */
432 0x00000fff, /* dst_mask */
433 FALSE), /* pcrel_offset */
434
435 /* Small data area 15 bits offset. */
436 HOWTO (R_NDS32_SDA15S3, /* type */
437 3, /* rightshift */
438 2, /* size (0 = byte, 1 = short, 2 = long) */
439 15, /* bitsize */
440 FALSE, /* pc_relative */
441 0, /* bitpos */
442 complain_overflow_signed, /* complain_on_overflow */
443 nds32_elf_sda15_reloc, /* special_function */
444 "R_NDS32_SDA15S3", /* name */
445 FALSE, /* partial_inplace */
446 0x00007fff, /* src_mask */
447 0x00007fff, /* dst_mask */
448 FALSE), /* pcrel_offset */
449
450 /* Small data area 15 bits offset. */
451 HOWTO (R_NDS32_SDA15S2, /* type */
452 2, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 15, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_signed, /* complain_on_overflow */
458 nds32_elf_sda15_reloc, /* special_function */
459 "R_NDS32_SDA15S2", /* name */
460 FALSE, /* partial_inplace */
461 0x00007fff, /* src_mask */
462 0x00007fff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 /* Small data area 15 bits offset. */
466 HOWTO (R_NDS32_SDA15S1, /* type */
467 1, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
469 15, /* bitsize */
470 FALSE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_signed, /* complain_on_overflow */
473 nds32_elf_sda15_reloc, /* special_function */
474 "R_NDS32_SDA15S1", /* name */
475 FALSE, /* partial_inplace */
476 0x00007fff, /* src_mask */
477 0x00007fff, /* dst_mask */
478 FALSE), /* pcrel_offset */
479
480 /* Small data area 15 bits offset. */
481 HOWTO (R_NDS32_SDA15S0, /* type */
482 0, /* rightshift */
483 2, /* size (0 = byte, 1 = short, 2 = long) */
484 15, /* bitsize */
485 FALSE, /* pc_relative */
486 0, /* bitpos */
487 complain_overflow_signed, /* complain_on_overflow */
488 nds32_elf_sda15_reloc, /* special_function */
489 "R_NDS32_SDA15S0", /* name */
490 FALSE, /* partial_inplace */
491 0x00007fff, /* src_mask */
492 0x00007fff, /* dst_mask */
493 FALSE), /* pcrel_offset */
494
495 /* GNU extension to record C++ vtable hierarchy */
496 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
497 0, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 0, /* bitsize */
500 FALSE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_dont,/* complain_on_overflow */
503 NULL, /* special_function */
504 "R_NDS32_GNU_VTINHERIT", /* name */
505 FALSE, /* partial_inplace */
506 0, /* src_mask */
507 0, /* dst_mask */
508 FALSE), /* pcrel_offset */
509
510 /* GNU extension to record C++ vtable member usage */
511 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
512 0, /* rightshift */
513 2, /* size (0 = byte, 1 = short, 2 = long) */
514 0, /* bitsize */
515 FALSE, /* pc_relative */
516 0, /* bitpos */
517 complain_overflow_dont,/* complain_on_overflow */
518 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
519 "R_NDS32_GNU_VTENTRY", /* name */
520 FALSE, /* partial_inplace */
521 0, /* src_mask */
522 0, /* dst_mask */
523 FALSE), /* pcrel_offset */
524
525 /* A 16 bit absolute relocation. */
526 HOWTO (R_NDS32_16_RELA, /* type */
527 0, /* rightshift */
528 1, /* size (0 = byte, 1 = short, 2 = long) */
529 16, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_bitfield, /* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_NDS32_16_RELA", /* name */
535 FALSE, /* partial_inplace */
536 0xffff, /* src_mask */
537 0xffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 /* A 32 bit absolute relocation. */
541 HOWTO (R_NDS32_32_RELA, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 32, /* bitsize */
545 FALSE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_bitfield, /* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_NDS32_32_RELA", /* name */
550 FALSE, /* partial_inplace */
551 0xffffffff, /* src_mask */
552 0xffffffff, /* dst_mask */
553 FALSE), /* pcrel_offset */
554
555 /* A 20 bit address. */
556 HOWTO (R_NDS32_20_RELA, /* type */
557 0, /* rightshift */
558 2, /* size (0 = byte, 1 = short, 2 = long) */
559 20, /* bitsize */
560 FALSE, /* pc_relative */
561 0, /* bitpos */
562 complain_overflow_signed, /* complain_on_overflow */
563 bfd_elf_generic_reloc, /* special_function */
564 "R_NDS32_20_RELA", /* name */
565 FALSE, /* partial_inplace */
566 0xfffff, /* src_mask */
567 0xfffff, /* dst_mask */
568 FALSE), /* pcrel_offset */
569
570 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
571 1, /* rightshift */
572 1, /* size (0 = byte, 1 = short, 2 = long) */
573 8, /* bitsize */
574 TRUE, /* pc_relative */
575 0, /* bitpos */
576 complain_overflow_signed, /* complain_on_overflow */
577 bfd_elf_generic_reloc, /* special_function */
578 "R_NDS32_9_PCREL_RELA",/* name */
579 FALSE, /* partial_inplace */
580 0xff, /* src_mask */
581 0xff, /* dst_mask */
582 TRUE), /* pcrel_offset */
583
584 /* A relative 15 bit relocation, right shifted by 1. */
585 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
586 1, /* rightshift */
587 2, /* size (0 = byte, 1 = short, 2 = long) */
588 14, /* bitsize */
589 TRUE, /* pc_relative */
590 0, /* bitpos */
591 complain_overflow_signed, /* complain_on_overflow */
592 bfd_elf_generic_reloc, /* special_function */
593 "R_NDS32_15_PCREL_RELA", /* name */
594 FALSE, /* partial_inplace */
595 0x3fff, /* src_mask */
596 0x3fff, /* dst_mask */
597 TRUE), /* pcrel_offset */
598
599 /* A relative 17 bit relocation, right shifted by 1. */
600 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
601 1, /* rightshift */
602 2, /* size (0 = byte, 1 = short, 2 = long) */
603 16, /* bitsize */
604 TRUE, /* pc_relative */
605 0, /* bitpos */
606 complain_overflow_signed, /* complain_on_overflow */
607 bfd_elf_generic_reloc, /* special_function */
608 "R_NDS32_17_PCREL_RELA", /* name */
609 FALSE, /* partial_inplace */
610 0xffff, /* src_mask */
611 0xffff, /* dst_mask */
612 TRUE), /* pcrel_offset */
613
614 /* A relative 25 bit relocation, right shifted by 2. */
615 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
616 1, /* rightshift */
617 2, /* size (0 = byte, 1 = short, 2 = long) */
618 24, /* bitsize */
619 TRUE, /* pc_relative */
620 0, /* bitpos */
621 complain_overflow_signed, /* complain_on_overflow */
622 bfd_elf_generic_reloc, /* special_function */
623 "R_NDS32_25_PCREL_RELA", /* name */
624 FALSE, /* partial_inplace */
625 0xffffff, /* src_mask */
626 0xffffff, /* dst_mask */
627 TRUE), /* pcrel_offset */
628
629 /* High 20 bits of address when lower 16 is or'd in. */
630 HOWTO (R_NDS32_HI20_RELA, /* type */
631 12, /* rightshift */
632 2, /* size (0 = byte, 1 = short, 2 = long) */
633 20, /* bitsize */
634 FALSE, /* pc_relative */
635 0, /* bitpos */
636 complain_overflow_dont,/* complain_on_overflow */
637 bfd_elf_generic_reloc, /* special_function */
638 "R_NDS32_HI20_RELA", /* name */
639 FALSE, /* partial_inplace */
640 0x000fffff, /* src_mask */
641 0x000fffff, /* dst_mask */
642 FALSE), /* pcrel_offset */
643
644 /* Lower 12 bits of address. */
645 HOWTO (R_NDS32_LO12S3_RELA, /* type */
646 3, /* rightshift */
647 2, /* size (0 = byte, 1 = short, 2 = long) */
648 9, /* bitsize */
649 FALSE, /* pc_relative */
650 0, /* bitpos */
651 complain_overflow_dont,/* complain_on_overflow */
652 bfd_elf_generic_reloc, /* special_function */
653 "R_NDS32_LO12S3_RELA", /* name */
654 FALSE, /* partial_inplace */
655 0x000001ff, /* src_mask */
656 0x000001ff, /* dst_mask */
657 FALSE), /* pcrel_offset */
658
659 /* Lower 12 bits of address. */
660 HOWTO (R_NDS32_LO12S2_RELA, /* type */
661 2, /* rightshift */
662 2, /* size (0 = byte, 1 = short, 2 = long) */
663 10, /* bitsize */
664 FALSE, /* pc_relative */
665 0, /* bitpos */
666 complain_overflow_dont,/* complain_on_overflow */
667 bfd_elf_generic_reloc, /* special_function */
668 "R_NDS32_LO12S2_RELA", /* name */
669 FALSE, /* partial_inplace */
670 0x000003ff, /* src_mask */
671 0x000003ff, /* dst_mask */
672 FALSE), /* pcrel_offset */
673
674 /* Lower 12 bits of address. */
675 HOWTO (R_NDS32_LO12S1_RELA, /* type */
676 1, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 11, /* bitsize */
679 FALSE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_dont,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_NDS32_LO12S1_RELA", /* name */
684 FALSE, /* partial_inplace */
685 0x000007ff, /* src_mask */
686 0x000007ff, /* dst_mask */
687 FALSE), /* pcrel_offset */
688
689 /* Lower 12 bits of address. */
690 HOWTO (R_NDS32_LO12S0_RELA, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 12, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_NDS32_LO12S0_RELA", /* name */
699 FALSE, /* partial_inplace */
700 0x00000fff, /* src_mask */
701 0x00000fff, /* dst_mask */
702 FALSE), /* pcrel_offset */
703
704 /* Small data area 15 bits offset. */
705 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
706 3, /* rightshift */
707 2, /* size (0 = byte, 1 = short, 2 = long) */
708 15, /* bitsize */
709 FALSE, /* pc_relative */
710 0, /* bitpos */
711 complain_overflow_signed, /* complain_on_overflow */
712 bfd_elf_generic_reloc, /* special_function */
713 "R_NDS32_SDA15S3_RELA",/* name */
714 FALSE, /* partial_inplace */
715 0x00007fff, /* src_mask */
716 0x00007fff, /* dst_mask */
717 FALSE), /* pcrel_offset */
718
719 /* Small data area 15 bits offset. */
720 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
721 2, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 15, /* bitsize */
724 FALSE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_signed, /* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_NDS32_SDA15S2_RELA",/* name */
729 FALSE, /* partial_inplace */
730 0x00007fff, /* src_mask */
731 0x00007fff, /* dst_mask */
732 FALSE), /* pcrel_offset */
733
734 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
735 1, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 15, /* bitsize */
738 FALSE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_signed, /* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_NDS32_SDA15S1_RELA",/* name */
743 FALSE, /* partial_inplace */
744 0x00007fff, /* src_mask */
745 0x00007fff, /* dst_mask */
746 FALSE), /* pcrel_offset */
747
748 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 15, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_signed, /* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_NDS32_SDA15S0_RELA",/* name */
757 FALSE, /* partial_inplace */
758 0x00007fff, /* src_mask */
759 0x00007fff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 /* GNU extension to record C++ vtable hierarchy */
763 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
764 0, /* rightshift */
765 2, /* size (0 = byte, 1 = short, 2 = long) */
766 0, /* bitsize */
767 FALSE, /* pc_relative */
768 0, /* bitpos */
769 complain_overflow_dont,/* complain_on_overflow */
770 NULL, /* special_function */
771 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
772 FALSE, /* partial_inplace */
773 0, /* src_mask */
774 0, /* dst_mask */
775 FALSE), /* pcrel_offset */
776
777 /* GNU extension to record C++ vtable member usage */
778 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 0, /* bitsize */
782 FALSE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
786 "R_NDS32_RELA_GNU_VTENTRY", /* name */
787 FALSE, /* partial_inplace */
788 0, /* src_mask */
789 0, /* dst_mask */
790 FALSE), /* pcrel_offset */
791
792 /* Like R_NDS32_20, but referring to the GOT table entry for
793 the symbol. */
794 HOWTO (R_NDS32_GOT20, /* type */
795 0, /* rightshift */
796 2, /* size (0 = byte, 1 = short, 2 = long) */
797 20, /* bitsize */
798 FALSE, /* pc_relative */
799 0, /* bitpos */
800 complain_overflow_signed, /* complain_on_overflow */
801 bfd_elf_generic_reloc, /* special_function */
802 "R_NDS32_GOT20", /* name */
803 FALSE, /* partial_inplace */
804 0xfffff, /* src_mask */
805 0xfffff, /* dst_mask */
806 FALSE), /* pcrel_offset */
807
808 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
809 entry for the symbol. */
810 HOWTO (R_NDS32_25_PLTREL, /* type */
811 1, /* rightshift */
812 2, /* size (0 = byte, 1 = short, 2 = long) */
813 24, /* bitsize */
814 TRUE, /* pc_relative */
815 0, /* bitpos */
816 complain_overflow_signed, /* complain_on_overflow */
817 bfd_elf_generic_reloc, /* special_function */
818 "R_NDS32_25_PLTREL", /* name */
819 FALSE, /* partial_inplace */
820 0xffffff, /* src_mask */
821 0xffffff, /* dst_mask */
822 TRUE), /* pcrel_offset */
823
824 /* This is used only by the dynamic linker. The symbol should exist
825 both in the object being run and in some shared library. The
826 dynamic linker copies the data addressed by the symbol from the
827 shared library into the object, because the object being
828 run has to have the data at some particular address. */
829 HOWTO (R_NDS32_COPY, /* type */
830 0, /* rightshift */
831 2, /* size (0 = byte, 1 = short, 2 = long) */
832 32, /* bitsize */
833 FALSE, /* pc_relative */
834 0, /* bitpos */
835 complain_overflow_bitfield, /* complain_on_overflow */
836 bfd_elf_generic_reloc, /* special_function */
837 "R_NDS32_COPY", /* name */
838 FALSE, /* partial_inplace */
839 0xffffffff, /* src_mask */
840 0xffffffff, /* dst_mask */
841 FALSE), /* pcrel_offset */
842
843 /* Like R_NDS32_20, but used when setting global offset table
844 entries. */
845 HOWTO (R_NDS32_GLOB_DAT, /* type */
846 0, /* rightshift */
847 2, /* size (0 = byte, 1 = short, 2 = long) */
848 32, /* bitsize */
849 FALSE, /* pc_relative */
850 0, /* bitpos */
851 complain_overflow_bitfield, /* complain_on_overflow */
852 bfd_elf_generic_reloc, /* special_function */
853 "R_NDS32_GLOB_DAT", /* name */
854 FALSE, /* partial_inplace */
855 0xffffffff, /* src_mask */
856 0xffffffff, /* dst_mask */
857 FALSE), /* pcrel_offset */
858
859 /* Marks a procedure linkage table entry for a symbol. */
860 HOWTO (R_NDS32_JMP_SLOT, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_bitfield, /* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_NDS32_JMP_SLOT", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 /* Used only by the dynamic linker. When the object is run, this
875 longword is set to the load address of the object, plus the
876 addend. */
877 HOWTO (R_NDS32_RELATIVE, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_RELATIVE", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 HOWTO (R_NDS32_GOTOFF, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 20, /* bitsize */
895 FALSE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_signed, /* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_NDS32_GOTOFF", /* name */
900 FALSE, /* partial_inplace */
901 0xfffff, /* src_mask */
902 0xfffff, /* dst_mask */
903 FALSE), /* pcrel_offset */
904
905 /* An PC Relative 20-bit relocation used when setting PIC offset
906 table register. */
907 HOWTO (R_NDS32_GOTPC20, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 20, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_signed, /* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_NDS32_GOTPC20", /* name */
916 FALSE, /* partial_inplace */
917 0xfffff, /* src_mask */
918 0xfffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 /* Like R_NDS32_HI20, but referring to the GOT table entry for
922 the symbol. */
923 HOWTO (R_NDS32_GOT_HI20, /* type */
924 12, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 20, /* bitsize */
927 FALSE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_NDS32_GOT_HI20", /* name */
932 FALSE, /* partial_inplace */
933 0x000fffff, /* src_mask */
934 0x000fffff, /* dst_mask */
935 FALSE), /* pcrel_offset */
936 HOWTO (R_NDS32_GOT_LO12, /* type */
937 0, /* rightshift */
938 2, /* size (0 = byte, 1 = short, 2 = long) */
939 12, /* bitsize */
940 FALSE, /* pc_relative */
941 0, /* bitpos */
942 complain_overflow_dont,/* complain_on_overflow */
943 bfd_elf_generic_reloc, /* special_function */
944 "R_NDS32_GOT_LO12", /* name */
945 FALSE, /* partial_inplace */
946 0x00000fff, /* src_mask */
947 0x00000fff, /* dst_mask */
948 FALSE), /* pcrel_offset */
949
950 /* An PC Relative relocation used when setting PIC offset table register.
951 Like R_NDS32_HI20, but referring to the GOT table entry for
952 the symbol. */
953 HOWTO (R_NDS32_GOTPC_HI20, /* type */
954 12, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 20, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOTPC_HI20", /* name */
962 FALSE, /* partial_inplace */
963 0x000fffff, /* src_mask */
964 0x000fffff, /* dst_mask */
965 TRUE), /* pcrel_offset */
966 HOWTO (R_NDS32_GOTPC_LO12, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 12, /* bitsize */
970 FALSE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont, /* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_NDS32_GOTPC_LO12", /* name */
975 FALSE, /* partial_inplace */
976 0x00000fff, /* src_mask */
977 0x00000fff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
981 12, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 20, /* bitsize */
984 FALSE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_NDS32_GOTOFF_HI20", /* name */
989 FALSE, /* partial_inplace */
990 0x000fffff, /* src_mask */
991 0x000fffff, /* dst_mask */
992 FALSE), /* pcrel_offset */
993 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 12, /* bitsize */
997 FALSE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_NDS32_GOTOFF_LO12", /* name */
1002 FALSE, /* partial_inplace */
1003 0x00000fff, /* src_mask */
1004 0x00000fff, /* dst_mask */
1005 FALSE), /* pcrel_offset */
1006
1007 /* Alignment hint for relaxable instruction. This is used with
1008 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1009 in order to make next label aligned on word boundary. */
1010 HOWTO (R_NDS32_INSN16, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 32, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 nds32_elf_ignore_reloc,/* special_function */
1018 "R_NDS32_INSN16", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for label. */
1025 HOWTO (R_NDS32_LABEL, /* type */
1026 0, /* rightshift */
1027 2, /* size (0 = byte, 1 = short, 2 = long) */
1028 32, /* bitsize */
1029 FALSE, /* pc_relative */
1030 0, /* bitpos */
1031 complain_overflow_dont,/* complain_on_overflow */
1032 nds32_elf_ignore_reloc,/* special_function */
1033 "R_NDS32_LABEL", /* name */
1034 FALSE, /* partial_inplace */
1035 0xffffffff, /* src_mask */
1036 0xffffffff, /* dst_mask */
1037 FALSE), /* pcrel_offset */
1038
1039 /* Relax hint for unconditional call sequence */
1040 HOWTO (R_NDS32_LONGCALL1, /* type */
1041 0, /* rightshift */
1042 2, /* size (0 = byte, 1 = short, 2 = long) */
1043 32, /* bitsize */
1044 FALSE, /* pc_relative */
1045 0, /* bitpos */
1046 complain_overflow_dont,/* complain_on_overflow */
1047 nds32_elf_ignore_reloc,/* special_function */
1048 "R_NDS32_LONGCALL1", /* name */
1049 FALSE, /* partial_inplace */
1050 0xffffffff, /* src_mask */
1051 0xffffffff, /* dst_mask */
1052 FALSE), /* pcrel_offset */
1053
1054 /* Relax hint for conditional call sequence. */
1055 HOWTO (R_NDS32_LONGCALL2, /* type */
1056 0, /* rightshift */
1057 2, /* size (0 = byte, 1 = short, 2 = long) */
1058 32, /* bitsize */
1059 FALSE, /* pc_relative */
1060 0, /* bitpos */
1061 complain_overflow_dont,/* complain_on_overflow */
1062 nds32_elf_ignore_reloc,/* special_function */
1063 "R_NDS32_LONGCALL2", /* name */
1064 FALSE, /* partial_inplace */
1065 0xffffffff, /* src_mask */
1066 0xffffffff, /* dst_mask */
1067 FALSE), /* pcrel_offset */
1068
1069 /* Relax hint for conditional call sequence. */
1070 HOWTO (R_NDS32_LONGCALL3, /* type */
1071 0, /* rightshift */
1072 2, /* size (0 = byte, 1 = short, 2 = long) */
1073 32, /* bitsize */
1074 FALSE, /* pc_relative */
1075 0, /* bitpos */
1076 complain_overflow_dont,/* complain_on_overflow */
1077 nds32_elf_ignore_reloc,/* special_function */
1078 "R_NDS32_LONGCALL3", /* name */
1079 FALSE, /* partial_inplace */
1080 0xffffffff, /* src_mask */
1081 0xffffffff, /* dst_mask */
1082 FALSE), /* pcrel_offset */
1083
1084 /* Relax hint for unconditional branch sequence. */
1085 HOWTO (R_NDS32_LONGJUMP1, /* type */
1086 0, /* rightshift */
1087 2, /* size (0 = byte, 1 = short, 2 = long) */
1088 32, /* bitsize */
1089 FALSE, /* pc_relative */
1090 0, /* bitpos */
1091 complain_overflow_dont,/* complain_on_overflow */
1092 nds32_elf_ignore_reloc,/* special_function */
1093 "R_NDS32_LONGJUMP1", /* name */
1094 FALSE, /* partial_inplace */
1095 0xffffffff, /* src_mask */
1096 0xffffffff, /* dst_mask */
1097 FALSE), /* pcrel_offset */
1098
1099 /* Relax hint for conditional branch sequence. */
1100 HOWTO (R_NDS32_LONGJUMP2, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 FALSE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 nds32_elf_ignore_reloc,/* special_function */
1108 "R_NDS32_LONGJUMP2", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 FALSE), /* pcrel_offset */
1113
1114 /* Relax hint for conditional branch sequence. */
1115 HOWTO (R_NDS32_LONGJUMP3, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 FALSE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 nds32_elf_ignore_reloc,/* special_function */
1123 "R_NDS32_LONGJUMP3", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 FALSE), /* pcrel_offset */
1128
1129 /* Relax hint for load/store sequence. */
1130 HOWTO (R_NDS32_LOADSTORE, /* type */
1131 0, /* rightshift */
1132 2, /* size (0 = byte, 1 = short, 2 = long) */
1133 32, /* bitsize */
1134 FALSE, /* pc_relative */
1135 0, /* bitpos */
1136 complain_overflow_dont,/* complain_on_overflow */
1137 nds32_elf_ignore_reloc,/* special_function */
1138 "R_NDS32_LOADSTORE", /* name */
1139 FALSE, /* partial_inplace */
1140 0xffffffff, /* src_mask */
1141 0xffffffff, /* dst_mask */
1142 FALSE), /* pcrel_offset */
1143
1144 /* Relax hint for load/store sequence. */
1145 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1146 0, /* rightshift */
1147 1, /* size (0 = byte, 1 = short, 2 = long) */
1148 16, /* bitsize */
1149 FALSE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 nds32_elf_ignore_reloc,/* special_function */
1153 "R_NDS32_9_FIXED_RELA",/* name */
1154 FALSE, /* partial_inplace */
1155 0x000000ff, /* src_mask */
1156 0x000000ff, /* dst_mask */
1157 FALSE), /* pcrel_offset */
1158
1159 /* Relax hint for load/store sequence. */
1160 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1161 0, /* rightshift */
1162 2, /* size (0 = byte, 1 = short, 2 = long) */
1163 32, /* bitsize */
1164 FALSE, /* pc_relative */
1165 0, /* bitpos */
1166 complain_overflow_dont,/* complain_on_overflow */
1167 nds32_elf_ignore_reloc,/* special_function */
1168 "R_NDS32_15_FIXED_RELA", /* name */
1169 FALSE, /* partial_inplace */
1170 0x00003fff, /* src_mask */
1171 0x00003fff, /* dst_mask */
1172 FALSE), /* pcrel_offset */
1173
1174 /* Relax hint for load/store sequence. */
1175 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 FALSE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 nds32_elf_ignore_reloc,/* special_function */
1183 "R_NDS32_17_FIXED_RELA", /* name */
1184 FALSE, /* partial_inplace */
1185 0x0000ffff, /* src_mask */
1186 0x0000ffff, /* dst_mask */
1187 FALSE), /* pcrel_offset */
1188
1189 /* Relax hint for load/store sequence. */
1190 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 FALSE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 nds32_elf_ignore_reloc,/* special_function */
1198 "R_NDS32_25_FIXED_RELA", /* name */
1199 FALSE, /* partial_inplace */
1200 0x00ffffff, /* src_mask */
1201 0x00ffffff, /* dst_mask */
1202 FALSE), /* pcrel_offset */
1203
1204 /* High 20 bits of PLT symbol offset relative to PC. */
1205 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1206 12, /* rightshift */
1207 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 20, /* bitsize */
1209 FALSE, /* pc_relative */
1210 0, /* bitpos */
1211 complain_overflow_dont,/* complain_on_overflow */
1212 bfd_elf_generic_reloc, /* special_function */
1213 "R_NDS32_PLTREL_HI20", /* name */
1214 FALSE, /* partial_inplace */
1215 0x000fffff, /* src_mask */
1216 0x000fffff, /* dst_mask */
1217 FALSE), /* pcrel_offset */
1218
1219 /* Low 12 bits of PLT symbol offset relative to PC. */
1220 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1221 0, /* rightshift */
1222 2, /* size (0 = byte, 1 = short, 2 = long) */
1223 12, /* bitsize */
1224 FALSE, /* pc_relative */
1225 0, /* bitpos */
1226 complain_overflow_dont,/* complain_on_overflow */
1227 bfd_elf_generic_reloc, /* special_function */
1228 "R_NDS32_PLTREL_LO12", /* name */
1229 FALSE, /* partial_inplace */
1230 0x00000fff, /* src_mask */
1231 0x00000fff, /* dst_mask */
1232 FALSE), /* pcrel_offset */
1233
1234 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1235 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1236 12, /* rightshift */
1237 2, /* size (0 = byte, 1 = short, 2 = long) */
1238 20, /* bitsize */
1239 FALSE, /* pc_relative */
1240 0, /* bitpos */
1241 complain_overflow_dont,/* complain_on_overflow */
1242 bfd_elf_generic_reloc, /* special_function */
1243 "R_NDS32_PLT_GOTREL_HI20", /* name */
1244 FALSE, /* partial_inplace */
1245 0x000fffff, /* src_mask */
1246 0x000fffff, /* dst_mask */
1247 FALSE), /* pcrel_offset */
1248
1249 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1250 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1251 0, /* rightshift */
1252 2, /* size (0 = byte, 1 = short, 2 = long) */
1253 12, /* bitsize */
1254 FALSE, /* pc_relative */
1255 0, /* bitpos */
1256 complain_overflow_dont,/* complain_on_overflow */
1257 bfd_elf_generic_reloc, /* special_function */
1258 "R_NDS32_PLT_GOTREL_LO12", /* name */
1259 FALSE, /* partial_inplace */
1260 0x00000fff, /* src_mask */
1261 0x00000fff, /* dst_mask */
1262 FALSE), /* pcrel_offset */
1263
1264 /* Small data area 12 bits offset. */
1265 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1266 2, /* rightshift */
1267 2, /* size (0 = byte, 1 = short, 2 = long) */
1268 12, /* bitsize */
1269 FALSE, /* pc_relative */
1270 0, /* bitpos */
1271 complain_overflow_signed, /* complain_on_overflow */
1272 bfd_elf_generic_reloc, /* special_function */
1273 "R_NDS32_SDA12S2_DP_RELA", /* name */
1274 FALSE, /* partial_inplace */
1275 0x00000fff, /* src_mask */
1276 0x00000fff, /* dst_mask */
1277 FALSE), /* pcrel_offset */
1278
1279 /* Small data area 12 bits offset. */
1280 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1281 2, /* rightshift */
1282 2, /* size (0 = byte, 1 = short, 2 = long) */
1283 12, /* bitsize */
1284 FALSE, /* pc_relative */
1285 0, /* bitpos */
1286 complain_overflow_signed, /* complain_on_overflow */
1287 bfd_elf_generic_reloc, /* special_function */
1288 "R_NDS32_SDA12S2_SP_RELA", /* name */
1289 FALSE, /* partial_inplace */
1290 0x00000fff, /* src_mask */
1291 0x00000fff, /* dst_mask */
1292 FALSE), /* pcrel_offset */
1293 /* Lower 12 bits of address. */
1294
1295 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1296 2, /* rightshift */
1297 2, /* size (0 = byte, 1 = short, 2 = long) */
1298 10, /* bitsize */
1299 FALSE, /* pc_relative */
1300 0, /* bitpos */
1301 complain_overflow_dont,/* complain_on_overflow */
1302 bfd_elf_generic_reloc, /* special_function */
1303 "R_NDS32_LO12S2_DP_RELA", /* name */
1304 FALSE, /* partial_inplace */
1305 0x000003ff, /* src_mask */
1306 0x000003ff, /* dst_mask */
1307 FALSE), /* pcrel_offset */
1308
1309 /* Lower 12 bits of address. */
1310 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1311 2, /* rightshift */
1312 2, /* size (0 = byte, 1 = short, 2 = long) */
1313 10, /* bitsize */
1314 FALSE, /* pc_relative */
1315 0, /* bitpos */
1316 complain_overflow_dont,/* complain_on_overflow */
1317 bfd_elf_generic_reloc, /* special_function */
1318 "R_NDS32_LO12S2_SP_RELA", /* name */
1319 FALSE, /* partial_inplace */
1320 0x000003ff, /* src_mask */
1321 0x000003ff, /* dst_mask */
1322 FALSE), /* pcrel_offset */
1323 /* Lower 12 bits of address. Special identity for or case. */
1324 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1325 0, /* rightshift */
1326 2, /* size (0 = byte, 1 = short, 2 = long) */
1327 12, /* bitsize */
1328 FALSE, /* pc_relative */
1329 0, /* bitpos */
1330 complain_overflow_dont,/* complain_on_overflow */
1331 bfd_elf_generic_reloc, /* special_function */
1332 "R_NDS32_LO12S0_ORI_RELA", /* name */
1333 FALSE, /* partial_inplace */
1334 0x00000fff, /* src_mask */
1335 0x00000fff, /* dst_mask */
1336 FALSE), /* pcrel_offset */
1337 /* Small data area 19 bits offset. */
1338 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1339 3, /* rightshift */
1340 2, /* size (0 = byte, 1 = short, 2 = long) */
1341 16, /* bitsize */
1342 FALSE, /* pc_relative */
1343 0, /* bitpos */
1344 complain_overflow_signed, /* complain_on_overflow */
1345 bfd_elf_generic_reloc, /* special_function */
1346 "R_NDS32_SDA16S3_RELA",/* name */
1347 FALSE, /* partial_inplace */
1348 0x0000ffff, /* src_mask */
1349 0x0000ffff, /* dst_mask */
1350 FALSE), /* pcrel_offset */
1351
1352 /* Small data area 15 bits offset. */
1353 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1354 2, /* rightshift */
1355 2, /* size (0 = byte, 1 = short, 2 = long) */
1356 17, /* bitsize */
1357 FALSE, /* pc_relative */
1358 0, /* bitpos */
1359 complain_overflow_signed, /* complain_on_overflow */
1360 bfd_elf_generic_reloc, /* special_function */
1361 "R_NDS32_SDA17S2_RELA",/* name */
1362 FALSE, /* partial_inplace */
1363 0x0001ffff, /* src_mask */
1364 0x0001ffff, /* dst_mask */
1365 FALSE), /* pcrel_offset */
1366
1367 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1368 1, /* rightshift */
1369 2, /* size (0 = byte, 1 = short, 2 = long) */
1370 18, /* bitsize */
1371 FALSE, /* pc_relative */
1372 0, /* bitpos */
1373 complain_overflow_signed, /* complain_on_overflow */
1374 bfd_elf_generic_reloc, /* special_function */
1375 "R_NDS32_SDA18S1_RELA",/* name */
1376 FALSE, /* partial_inplace */
1377 0x0003ffff, /* src_mask */
1378 0x0003ffff, /* dst_mask */
1379 FALSE), /* pcrel_offset */
1380
1381 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1382 0, /* rightshift */
1383 2, /* size (0 = byte, 1 = short, 2 = long) */
1384 19, /* bitsize */
1385 FALSE, /* pc_relative */
1386 0, /* bitpos */
1387 complain_overflow_signed, /* complain_on_overflow */
1388 bfd_elf_generic_reloc, /* special_function */
1389 "R_NDS32_SDA19S0_RELA",/* name */
1390 FALSE, /* partial_inplace */
1391 0x0007ffff, /* src_mask */
1392 0x0007ffff, /* dst_mask */
1393 FALSE), /* pcrel_offset */
1394 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1395 0, /* rightshift */
1396 0, /* size (0 = byte, 1 = short, 2 = long) */
1397 8, /* bitsize */
1398 FALSE, /* pc_relative */
1399 0, /* bitpos */
1400 complain_overflow_dont,/* complain_on_overflow */
1401 nds32_elf_ignore_reloc,/* special_function */
1402 "R_NDS32_DWARF2_OP1_RELA", /* name */
1403 FALSE, /* partial_inplace */
1404 0xff, /* src_mask */
1405 0xff, /* dst_mask */
1406 FALSE), /* pcrel_offset */
1407 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1408 0, /* rightshift */
1409 1, /* size (0 = byte, 1 = short, 2 = long) */
1410 16, /* bitsize */
1411 FALSE, /* pc_relative */
1412 0, /* bitpos */
1413 complain_overflow_dont,/* complain_on_overflow */
1414 nds32_elf_ignore_reloc,/* special_function */
1415 "R_NDS32_DWARF2_OP2_RELA", /* name */
1416 FALSE, /* partial_inplace */
1417 0xffff, /* src_mask */
1418 0xffff, /* dst_mask */
1419 FALSE), /* pcrel_offset */
1420 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1421 0, /* rightshift */
1422 2, /* size (0 = byte, 1 = short, 2 = long) */
1423 32, /* bitsize */
1424 FALSE, /* pc_relative */
1425 0, /* bitpos */
1426 complain_overflow_dont,/* complain_on_overflow */
1427 nds32_elf_ignore_reloc,/* special_function */
1428 "R_NDS32_DWARF2_LEB_RELA", /* name */
1429 FALSE, /* partial_inplace */
1430 0xffffffff, /* src_mask */
1431 0xffffffff, /* dst_mask */
1432 FALSE), /* pcrel_offset */
1433 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1434 0, /* rightshift */
1435 1, /* size (0 = byte, 1 = short, 2 = long) */
1436 16, /* bitsize */
1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
1439 complain_overflow_dont,/* complain_on_overflow */
1440 nds32_elf_ignore_reloc,/* special_function */
1441 "R_NDS32_UPDATE_TA_RELA", /* name */
1442 FALSE, /* partial_inplace */
1443 0xffff, /* src_mask */
1444 0xffff, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1447 entry for the symbol. */
1448 HOWTO (R_NDS32_9_PLTREL, /* type */
1449 1, /* rightshift */
1450 1, /* size (0 = byte, 1 = short, 2 = long) */
1451 8, /* bitsize */
1452 TRUE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_signed, /* complain_on_overflow */
1455 bfd_elf_generic_reloc, /* special_function */
1456 "R_NDS32_9_PLTREL", /* name */
1457 FALSE, /* partial_inplace */
1458 0xff, /* src_mask */
1459 0xff, /* dst_mask */
1460 TRUE), /* pcrel_offset */
1461 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1462 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1463 0, /* rightshift */
1464 2, /* size (0 = byte, 1 = short, 2 = long) */
1465 20, /* bitsize */
1466 FALSE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_dont,/* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_NDS32_PLT_GOTREL_LO20", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000fffff, /* src_mask */
1473 0x000fffff, /* dst_mask */
1474 FALSE), /* pcrel_offset */
1475 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1476 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1477 0, /* rightshift */
1478 2, /* size (0 = byte, 1 = short, 2 = long) */
1479 15, /* bitsize */
1480 FALSE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_dont,/* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_NDS32_PLT_GOTREL_LO15", /* name */
1485 FALSE, /* partial_inplace */
1486 0x00007fff, /* src_mask */
1487 0x00007fff, /* dst_mask */
1488 FALSE), /* pcrel_offset */
1489 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1490 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 19, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_dont,/* complain_on_overflow */
1497 bfd_elf_generic_reloc, /* special_function */
1498 "R_NDS32_PLT_GOTREL_LO19", /* name */
1499 FALSE, /* partial_inplace */
1500 0x0007ffff, /* src_mask */
1501 0x0007ffff, /* dst_mask */
1502 FALSE), /* pcrel_offset */
1503 HOWTO (R_NDS32_GOT_LO15, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 15, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont,/* complain_on_overflow */
1510 bfd_elf_generic_reloc, /* special_function */
1511 "R_NDS32_GOT_LO15", /* name */
1512 FALSE, /* partial_inplace */
1513 0x00007fff, /* src_mask */
1514 0x00007fff, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516 HOWTO (R_NDS32_GOT_LO19, /* type */
1517 0, /* rightshift */
1518 2, /* size (0 = byte, 1 = short, 2 = long) */
1519 19, /* bitsize */
1520 FALSE, /* pc_relative */
1521 0, /* bitpos */
1522 complain_overflow_dont,/* complain_on_overflow */
1523 bfd_elf_generic_reloc, /* special_function */
1524 "R_NDS32_GOT_LO19", /* name */
1525 FALSE, /* partial_inplace */
1526 0x0007ffff, /* src_mask */
1527 0x0007ffff, /* dst_mask */
1528 FALSE), /* pcrel_offset */
1529 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1530 0, /* rightshift */
1531 2, /* size (0 = byte, 1 = short, 2 = long) */
1532 15, /* bitsize */
1533 FALSE, /* pc_relative */
1534 0, /* bitpos */
1535 complain_overflow_dont,/* complain_on_overflow */
1536 bfd_elf_generic_reloc, /* special_function */
1537 "R_NDS32_GOTOFF_LO15", /* name */
1538 FALSE, /* partial_inplace */
1539 0x00007fff, /* src_mask */
1540 0x00007fff, /* dst_mask */
1541 FALSE), /* pcrel_offset */
1542 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 19, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_dont,/* complain_on_overflow */
1549 bfd_elf_generic_reloc, /* special_function */
1550 "R_NDS32_GOTOFF_LO19", /* name */
1551 FALSE, /* partial_inplace */
1552 0x0007ffff, /* src_mask */
1553 0x0007ffff, /* dst_mask */
1554 FALSE), /* pcrel_offset */
1555 /* GOT 15 bits offset. */
1556 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1557 2, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 15, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_signed, /* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_NDS32_GOT15S2_RELA",/* name */
1565 FALSE, /* partial_inplace */
1566 0x00007fff, /* src_mask */
1567 0x00007fff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569 /* GOT 17 bits offset. */
1570 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1571 2, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 17, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_signed, /* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_NDS32_GOT17S2_RELA",/* name */
1579 FALSE, /* partial_inplace */
1580 0x0001ffff, /* src_mask */
1581 0x0001ffff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583 /* A 5 bit address. */
1584 HOWTO (R_NDS32_5_RELA, /* type */
1585 0, /* rightshift */
1586 1, /* size (0 = byte, 1 = short, 2 = long) */
1587 5, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_signed, /* complain_on_overflow */
1591 bfd_elf_generic_reloc, /* special_function */
1592 "R_NDS32_5_RELA", /* name */
1593 FALSE, /* partial_inplace */
1594 0x1f, /* src_mask */
1595 0x1f, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1598 1, /* rightshift */
1599 1, /* size (0 = byte, 1 = short, 2 = long) */
1600 9, /* bitsize */
1601 TRUE, /* pc_relative */
1602 0, /* bitpos */
1603 complain_overflow_unsigned, /* complain_on_overflow */
1604 bfd_elf_generic_reloc, /* special_function */
1605 "R_NDS32_10_UPCREL_RELA", /* name */
1606 FALSE, /* partial_inplace */
1607 0x1ff, /* src_mask */
1608 0x1ff, /* dst_mask */
1609 TRUE), /* pcrel_offset */
1610 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1611 2, /* rightshift */
1612 1, /* size (0 = byte, 1 = short, 2 = long) */
1613 7, /* bitsize */
1614 FALSE, /* pc_relative */
1615 0, /* bitpos */
1616 complain_overflow_unsigned, /* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 "R_NDS32_SDA_FP7U2_RELA", /* name */
1619 FALSE, /* partial_inplace */
1620 0x0000007f, /* src_mask */
1621 0x0000007f, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1624 1, /* rightshift */
1625 2, /* size (0 = byte, 1 = short, 2 = long) */
1626 8, /* bitsize */
1627 TRUE, /* pc_relative */
1628 0, /* bitpos */
1629 complain_overflow_signed, /* complain_on_overflow */
1630 bfd_elf_generic_reloc, /* special_function */
1631 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1632 FALSE, /* partial_inplace */
1633 0xff, /* src_mask */
1634 0xff, /* dst_mask */
1635 TRUE), /* pcrel_offset */
1636 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1637 1, /* rightshift */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 24, /* bitsize */
1640 FALSE, /* pc_relative */
1641 0, /* bitpos */
1642 complain_overflow_dont,/* complain_on_overflow */
1643 bfd_elf_generic_reloc, /* special_function */
1644 "R_NDS32_25_ABS_RELA", /* name */
1645 FALSE, /* partial_inplace */
1646 0xffffff, /* src_mask */
1647 0xffffff, /* dst_mask */
1648 FALSE), /* pcrel_offset */
1649
1650 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1651 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1652 1, /* rightshift */
1653 2, /* size (0 = byte, 1 = short, 2 = long) */
1654 16, /* bitsize */
1655 TRUE, /* pc_relative */
1656 0, /* bitpos */
1657 complain_overflow_signed, /* complain_on_overflow */
1658 bfd_elf_generic_reloc, /* special_function */
1659 "R_NDS32_17IFC_PCREL_RELA", /* name */
1660 FALSE, /* partial_inplace */
1661 0xffff, /* src_mask */
1662 0xffff, /* dst_mask */
1663 TRUE), /* pcrel_offset */
1664
1665 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1666 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1667 1, /* rightshift */
1668 1, /* size (0 = byte, 1 = short, 2 = long) */
1669 9, /* bitsize */
1670 TRUE, /* pc_relative */
1671 0, /* bitpos */
1672 complain_overflow_unsigned, /* complain_on_overflow */
1673 bfd_elf_generic_reloc, /* special_function */
1674 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1675 FALSE, /* partial_inplace */
1676 0x1ff, /* src_mask */
1677 0x1ff, /* dst_mask */
1678 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1679
1680 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1681 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1682 12, /* rightshift */
1683 2, /* size (0 = byte, 1 = short, 2 = long) */
1684 20, /* bitsize */
1685 FALSE, /* pc_relative */
1686 0, /* bitpos */
1687 complain_overflow_dont, /* complain_on_overflow */
1688 bfd_elf_generic_reloc, /* special_function */
1689 "R_NDS32_TLS_LE_HI20", /* name */
1690 FALSE, /* partial_inplace */
1691 0x000fffff, /* src_mask */
1692 0x000fffff, /* dst_mask */
1693 FALSE), /* pcrel_offset */
1694 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1695 0, /* rightshift */
1696 2, /* size (0 = byte, 1 = short, 2 = long) */
1697 12, /* bitsize */
1698 FALSE, /* pc_relative */
1699 0, /* bitpos */
1700 complain_overflow_dont, /* complain_on_overflow */
1701 bfd_elf_generic_reloc, /* special_function */
1702 "R_NDS32_TLS_LE_LO12", /* name */
1703 FALSE, /* partial_inplace */
1704 0x00000fff, /* src_mask */
1705 0x00000fff, /* dst_mask */
1706 FALSE), /* pcrel_offset */
1707
1708 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1709 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1710 12, /* rightshift */
1711 2, /* size (0 = byte, 1 = short, 2 = long) */
1712 20, /* bitsize */
1713 FALSE, /* pc_relative */
1714 0, /* bitpos */
1715 complain_overflow_dont, /* complain_on_overflow */
1716 bfd_elf_generic_reloc, /* special_function */
1717 "R_NDS32_TLS_IE_HI20", /* name */
1718 FALSE, /* partial_inplace */
1719 0x000fffff, /* src_mask */
1720 0x000fffff, /* dst_mask */
1721 FALSE), /* pcrel_offset */
1722 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1723 2, /* rightshift */
1724 2, /* size (0 = byte, 1 = short, 2 = long) */
1725 10, /* bitsize */
1726 FALSE, /* pc_relative */
1727 0, /* bitpos */
1728 complain_overflow_dont, /* complain_on_overflow */
1729 bfd_elf_generic_reloc, /* special_function */
1730 "R_NDS32_TLS_IE_LO12S2", /* name */
1731 FALSE, /* partial_inplace */
1732 0x000003ff, /* src_mask */
1733 0x000003ff, /* dst_mask */
1734 FALSE), /* pcrel_offset */
1735 /* Mark a TLS IE entry in GOT. */
1736 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1737 0, /* rightshift */
1738 2, /* size (0 = byte, 1 = short, 2 = long) */
1739 32, /* bitsize */
1740 FALSE, /* pc_relative */
1741 0, /* bitpos */
1742 complain_overflow_bitfield, /* complain_on_overflow */
1743 bfd_elf_generic_reloc, /* special_function */
1744 "R_NDS32_TLS_TPOFF", /* name */
1745 FALSE, /* partial_inplace */
1746 0xffffffff, /* src_mask */
1747 0xffffffff, /* dst_mask */
1748 FALSE), /* pcrel_offset */
1749 /* A 20 bit address. */
1750 HOWTO (R_NDS32_TLS_LE_20, /* type */
1751 0, /* rightshift */
1752 2, /* size (0 = byte, 1 = short, 2 = long) */
1753 20, /* bitsize */
1754 FALSE, /* pc_relative */
1755 0, /* bitpos */
1756 complain_overflow_signed, /* complain_on_overflow */
1757 bfd_elf_generic_reloc, /* special_function */
1758 "R_NDS32_TLS_LE_20", /* name */
1759 FALSE, /* partial_inplace */
1760 0xfffff, /* src_mask */
1761 0xfffff, /* dst_mask */
1762 FALSE), /* pcrel_offset */
1763 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1764 0, /* rightshift */
1765 2, /* size (0 = byte, 1 = short, 2 = long) */
1766 15, /* bitsize */
1767 FALSE, /* pc_relative */
1768 0, /* bitpos */
1769 complain_overflow_signed, /* complain_on_overflow */
1770 bfd_elf_generic_reloc, /* special_function */
1771 "R_NDS32_TLS_LE_15S0", /* name */
1772 FALSE, /* partial_inplace */
1773 0x7fff, /* src_mask */
1774 0x7fff, /* dst_mask */
1775 FALSE), /* pcrel_offset */
1776 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1777 1, /* rightshift */
1778 2, /* size (0 = byte, 1 = short, 2 = long) */
1779 15, /* bitsize */
1780 FALSE, /* pc_relative */
1781 0, /* bitpos */
1782 complain_overflow_signed, /* complain_on_overflow */
1783 bfd_elf_generic_reloc, /* special_function */
1784 "R_NDS32_TLS_LE_15S1", /* name */
1785 FALSE, /* partial_inplace */
1786 0x7fff, /* src_mask */
1787 0x7fff, /* dst_mask */
1788 FALSE), /* pcrel_offset */
1789 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1790 2, /* rightshift */
1791 2, /* size (0 = byte, 1 = short, 2 = long) */
1792 15, /* bitsize */
1793 FALSE, /* pc_relative */
1794 0, /* bitpos */
1795 complain_overflow_signed, /* complain_on_overflow */
1796 bfd_elf_generic_reloc, /* special_function */
1797 "R_NDS32_TLS_LE_15S2", /* name */
1798 FALSE, /* partial_inplace */
1799 0x7fff, /* src_mask */
1800 0x7fff, /* dst_mask */
1801 FALSE), /* pcrel_offset */
1802
1803 /* Relax hint for unconditional call sequence */
1804 HOWTO (R_NDS32_LONGCALL4, /* type */
1805 0, /* rightshift */
1806 2, /* size (0 = byte, 1 = short, 2 = long) */
1807 32, /* bitsize */
1808 FALSE, /* pc_relative */
1809 0, /* bitpos */
1810 complain_overflow_dont, /* complain_on_overflow */
1811 nds32_elf_ignore_reloc, /* special_function */
1812 "R_NDS32_LONGCALL4", /* name */
1813 FALSE, /* partial_inplace */
1814 0xffffffff, /* src_mask */
1815 0xffffffff, /* dst_mask */
1816 FALSE), /* pcrel_offset */
1817
1818 /* Relax hint for conditional call sequence. */
1819 HOWTO (R_NDS32_LONGCALL5, /* type */
1820 0, /* rightshift */
1821 2, /* size (0 = byte, 1 = short, 2 = long) */
1822 32, /* bitsize */
1823 FALSE, /* pc_relative */
1824 0, /* bitpos */
1825 complain_overflow_dont, /* complain_on_overflow */
1826 nds32_elf_ignore_reloc, /* special_function */
1827 "R_NDS32_LONGCALL5", /* name */
1828 FALSE, /* partial_inplace */
1829 0xffffffff, /* src_mask */
1830 0xffffffff, /* dst_mask */
1831 FALSE), /* pcrel_offset */
1832
1833 /* Relax hint for conditional call sequence. */
1834 HOWTO (R_NDS32_LONGCALL6, /* type */
1835 0, /* rightshift */
1836 2, /* size (0 = byte, 1 = short, 2 = long) */
1837 32, /* bitsize */
1838 FALSE, /* pc_relative */
1839 0, /* bitpos */
1840 complain_overflow_dont, /* complain_on_overflow */
1841 nds32_elf_ignore_reloc, /* special_function */
1842 "R_NDS32_LONGCALL6", /* name */
1843 FALSE, /* partial_inplace */
1844 0xffffffff, /* src_mask */
1845 0xffffffff, /* dst_mask */
1846 FALSE), /* pcrel_offset */
1847
1848 /* Relax hint for unconditional branch sequence. */
1849 HOWTO (R_NDS32_LONGJUMP4, /* type */
1850 0, /* rightshift */
1851 2, /* size (0 = byte, 1 = short, 2 = long) */
1852 32, /* bitsize */
1853 FALSE, /* pc_relative */
1854 0, /* bitpos */
1855 complain_overflow_dont, /* complain_on_overflow */
1856 nds32_elf_ignore_reloc, /* special_function */
1857 "R_NDS32_LONGJUMP4", /* name */
1858 FALSE, /* partial_inplace */
1859 0xffffffff, /* src_mask */
1860 0xffffffff, /* dst_mask */
1861 FALSE), /* pcrel_offset */
1862
1863 /* Relax hint for conditional branch sequence. */
1864 HOWTO (R_NDS32_LONGJUMP5, /* type */
1865 0, /* rightshift */
1866 2, /* size (0 = byte, 1 = short, 2 = long) */
1867 32, /* bitsize */
1868 FALSE, /* pc_relative */
1869 0, /* bitpos */
1870 complain_overflow_dont, /* complain_on_overflow */
1871 nds32_elf_ignore_reloc, /* special_function */
1872 "R_NDS32_LONGJUMP5", /* name */
1873 FALSE, /* partial_inplace */
1874 0xffffffff, /* src_mask */
1875 0xffffffff, /* dst_mask */
1876 FALSE), /* pcrel_offset */
1877
1878 /* Relax hint for conditional branch sequence. */
1879 HOWTO (R_NDS32_LONGJUMP6, /* type */
1880 0, /* rightshift */
1881 2, /* size (0 = byte, 1 = short, 2 = long) */
1882 32, /* bitsize */
1883 FALSE, /* pc_relative */
1884 0, /* bitpos */
1885 complain_overflow_dont, /* complain_on_overflow */
1886 nds32_elf_ignore_reloc, /* special_function */
1887 "R_NDS32_LONGJUMP6", /* name */
1888 FALSE, /* partial_inplace */
1889 0xffffffff, /* src_mask */
1890 0xffffffff, /* dst_mask */
1891 FALSE), /* pcrel_offset */
1892
1893 /* Relax hint for conditional branch sequence. */
1894 HOWTO (R_NDS32_LONGJUMP7, /* type */
1895 0, /* rightshift */
1896 2, /* size (0 = byte, 1 = short, 2 = long) */
1897 32, /* bitsize */
1898 FALSE, /* pc_relative */
1899 0, /* bitpos */
1900 complain_overflow_dont, /* complain_on_overflow */
1901 nds32_elf_ignore_reloc, /* special_function */
1902 "R_NDS32_LONGJUMP7", /* name */
1903 FALSE, /* partial_inplace */
1904 0xffffffff, /* src_mask */
1905 0xffffffff, /* dst_mask */
1906 FALSE), /* pcrel_offset */
35c08157
KLC		 1907};
1908
1909/* Relocations used for relaxation. */
1910static reloc_howto_type nds32_elf_relax_howto_table[] =
1911{
1912 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont,/* complain_on_overflow */
1919 nds32_elf_ignore_reloc,/* special_function */
1920 "R_NDS32_RELAX_ENTRY", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925 HOWTO (R_NDS32_GOT_SUFF, /* type */
1926 0, /* rightshift */
1927 2, /* size (0 = byte, 1 = short, 2 = long) */
1928 32, /* bitsize */
1929 FALSE, /* pc_relative */
1930 0, /* bitpos */
1931 complain_overflow_dont,/* complain_on_overflow */
1932 nds32_elf_ignore_reloc,/* special_function */
1933 "R_NDS32_GOT_SUFF", /* name */
1934 FALSE, /* partial_inplace */
1935 0xffffffff, /* src_mask */
1936 0xffffffff, /* dst_mask */
1937 FALSE), /* pcrel_offset */
1938 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1939 0, /* rightshift */
1940 2, /* size (0 = byte, 1 = short, 2 = long) */
1941 32, /* bitsize */
1942 FALSE, /* pc_relative */
1943 0, /* bitpos */
1944 complain_overflow_bitfield, /* complain_on_overflow */
1945 nds32_elf_ignore_reloc,/* special_function */
1946 "R_NDS32_GOTOFF_SUFF", /* name */
1947 FALSE, /* partial_inplace */
1948 0xffffffff, /* src_mask */
1949 0xffffffff, /* dst_mask */
1950 FALSE), /* pcrel_offset */
1951 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1952 0, /* rightshift */
1953 2, /* size (0 = byte, 1 = short, 2 = long) */
1954 32, /* bitsize */
1955 FALSE, /* pc_relative */
1956 0, /* bitpos */
1957 complain_overflow_dont,/* complain_on_overflow */
1958 nds32_elf_ignore_reloc,/* special_function */
1959 "R_NDS32_PLT_GOT_SUFF",/* name */
1960 FALSE, /* partial_inplace */
1961 0xffffffff, /* src_mask */
1962 0xffffffff, /* dst_mask */
1963 FALSE), /* pcrel_offset */
1964 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1965 0, /* rightshift */
1966 2, /* size (0 = byte, 1 = short, 2 = long) */
1967 32, /* bitsize */
1968 FALSE, /* pc_relative */
1969 0, /* bitpos */
1970 complain_overflow_dont,/* complain_on_overflow */
1971 nds32_elf_ignore_reloc,/* special_function */
1972 "R_NDS32_MULCALL_SUFF",/* name */
1973 FALSE, /* partial_inplace */
1974 0xffffffff, /* src_mask */
1975 0xffffffff, /* dst_mask */
1976 FALSE), /* pcrel_offset */
1977 HOWTO (R_NDS32_PTR, /* type */
1978 0, /* rightshift */
1979 2, /* size (0 = byte, 1 = short, 2 = long) */
1980 32, /* bitsize */
1981 FALSE, /* pc_relative */
1982 0, /* bitpos */
1983 complain_overflow_dont,/* complain_on_overflow */
1984 nds32_elf_ignore_reloc,/* special_function */
1985 "R_NDS32_PTR", /* name */
1986 FALSE, /* partial_inplace */
1987 0xffffffff, /* src_mask */
1988 0xffffffff, /* dst_mask */
1989 FALSE), /* pcrel_offset */
1990 HOWTO (R_NDS32_PTR_COUNT, /* type */
1991 0, /* rightshift */
1992 2, /* size (0 = byte, 1 = short, 2 = long) */
1993 32, /* bitsize */
1994 FALSE, /* pc_relative */
1995 0, /* bitpos */
1996 complain_overflow_dont,/* complain_on_overflow */
1997 nds32_elf_ignore_reloc,/* special_function */
1998 "R_NDS32_PTR_COUNT", /* name */
1999 FALSE, /* partial_inplace */
2000 0xffffffff, /* src_mask */
2001 0xffffffff, /* dst_mask */
2002 FALSE), /* pcrel_offset */
2003 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2004 0, /* rightshift */
2005 2, /* size (0 = byte, 1 = short, 2 = long) */
2006 32, /* bitsize */
2007 FALSE, /* pc_relative */
2008 0, /* bitpos */
2009 complain_overflow_dont,/* complain_on_overflow */
2010 nds32_elf_ignore_reloc,/* special_function */
2011 "R_NDS32_PTR_RESOLVED",/* name */
2012 FALSE, /* partial_inplace */
2013 0xffffffff, /* src_mask */
2014 0xffffffff, /* dst_mask */
2015 FALSE), /* pcrel_offset */
2016 HOWTO (R_NDS32_PLTBLOCK, /* type */
2017 0, /* rightshift */
2018 2, /* size (0 = byte, 1 = short, 2 = long) */
2019 32, /* bitsize */
2020 FALSE, /* pc_relative */
2021 0, /* bitpos */
2022 complain_overflow_dont,/* complain_on_overflow */
2023 nds32_elf_ignore_reloc,/* special_function */
2024 "R_NDS32_PLTBLOCK", /* name */
2025 FALSE, /* partial_inplace */
2026 0xffffffff, /* src_mask */
2027 0xffffffff, /* dst_mask */
2028 FALSE), /* pcrel_offset */
2029 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2030 0, /* rightshift */
2031 2, /* size (0 = byte, 1 = short, 2 = long) */
2032 32, /* bitsize */
2033 FALSE, /* pc_relative */
2034 0, /* bitpos */
2035 complain_overflow_dont,/* complain_on_overflow */
2036 nds32_elf_ignore_reloc,/* special_function */
2037 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2038 FALSE, /* partial_inplace */
2039 0xffffffff, /* src_mask */
2040 0xffffffff, /* dst_mask */
2041 FALSE), /* pcrel_offset */
2042 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2043 0, /* rightshift */
2044 2, /* size (0 = byte, 1 = short, 2 = long) */
2045 32, /* bitsize */
2046 FALSE, /* pc_relative */
2047 0, /* bitpos */
2048 complain_overflow_dont,/* complain_on_overflow */
2049 nds32_elf_ignore_reloc,/* special_function */
2050 "R_NDS32_RELAX_REGION_END", /* name */
2051 FALSE, /* partial_inplace */
2052 0xffffffff, /* src_mask */
2053 0xffffffff, /* dst_mask */
2054 FALSE), /* pcrel_offset */
2055 HOWTO (R_NDS32_MINUEND, /* type */
2056 0, /* rightshift */
2057 2, /* size (0 = byte, 1 = short, 2 = long) */
2058 32, /* bitsize */
2059 FALSE, /* pc_relative */
2060 0, /* bitpos */
2061 complain_overflow_dont,/* complain_on_overflow */
2062 nds32_elf_ignore_reloc,/* special_function */
2063 "R_NDS32_MINUEND", /* name */
2064 FALSE, /* partial_inplace */
2065 0xffffffff, /* src_mask */
2066 0xffffffff, /* dst_mask */
2067 FALSE), /* pcrel_offset */
2068 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2069 0, /* rightshift */
2070 2, /* size (0 = byte, 1 = short, 2 = long) */
2071 32, /* bitsize */
2072 FALSE, /* pc_relative */
2073 0, /* bitpos */
2074 complain_overflow_dont,/* complain_on_overflow */
2075 nds32_elf_ignore_reloc,/* special_function */
2076 "R_NDS32_SUBTRAHEND", /* name */
2077 FALSE, /* partial_inplace */
2078 0xffffffff, /* src_mask */
2079 0xffffffff, /* dst_mask */
2080 FALSE), /* pcrel_offset */
2081 HOWTO (R_NDS32_DIFF8, /* type */
2082 0, /* rightshift */
2083 0, /* size (0 = byte, 1 = short, 2 = long) */
2084 8, /* bitsize */
2085 FALSE, /* pc_relative */
2086 0, /* bitpos */
2087 complain_overflow_dont,/* complain_on_overflow */
2088 nds32_elf_ignore_reloc,/* special_function */
2089 "R_NDS32_DIFF8", /* name */
2090 FALSE, /* partial_inplace */
2091 0x000000ff, /* src_mask */
2092 0x000000ff, /* dst_mask */
2093 FALSE), /* pcrel_offset */
2094 HOWTO (R_NDS32_DIFF16, /* type */
2095 0, /* rightshift */
2096 1, /* size (0 = byte, 1 = short, 2 = long) */
2097 16, /* bitsize */
2098 FALSE, /* pc_relative */
2099 0, /* bitpos */
2100 complain_overflow_dont,/* complain_on_overflow */
2101 nds32_elf_ignore_reloc,/* special_function */
2102 "R_NDS32_DIFF16", /* name */
2103 FALSE, /* partial_inplace */
2104 0x0000ffff, /* src_mask */
2105 0x0000ffff, /* dst_mask */
2106 FALSE), /* pcrel_offset */
2107 HOWTO (R_NDS32_DIFF32, /* type */
2108 0, /* rightshift */
2109 2, /* size (0 = byte, 1 = short, 2 = long) */
2110 32, /* bitsize */
2111 FALSE, /* pc_relative */
2112 0, /* bitpos */
2113 complain_overflow_dont,/* complain_on_overflow */
2114 nds32_elf_ignore_reloc,/* special_function */
2115 "R_NDS32_DIFF32", /* name */
2116 FALSE, /* partial_inplace */
2117 0xffffffff, /* src_mask */
2118 0xffffffff, /* dst_mask */
2119 FALSE), /* pcrel_offset */
2120 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2121 0, /* rightshift */
2122 0, /* size (0 = byte, 1 = short, 2 = long) */
2123 0, /* bitsize */
2124 FALSE, /* pc_relative */
2125 0, /* bitpos */
2126 complain_overflow_dont,/* complain_on_overflow */
2127 nds32_elf_ignore_reloc,/* special_function */
2128 "R_NDS32_DIFF_ULEB128",/* name */
2129 FALSE, /* partial_inplace */
2130 0xffffffff, /* src_mask */
2131 0xffffffff, /* dst_mask */
2132 FALSE), /* pcrel_offset */
2133 HOWTO (R_NDS32_DATA, /* type */
2134 0, /* rightshift */
2135 2, /* size (0 = byte, 1 = short, 2 = long) */
2136 32, /* bitsize */
2137 FALSE, /* pc_relative */
2138 0, /* bitpos */
2139 complain_overflow_dont,/* complain_on_overflow */
2140 nds32_elf_ignore_reloc,/* special_function */
2141 "R_NDS32_DATA", /* name */
2142 FALSE, /* partial_inplace */
2143 0xffffffff, /* src_mask */
2144 0xffffffff, /* dst_mask */
2145 FALSE), /* pcrel_offset */
2146 HOWTO (R_NDS32_TRAN, /* type */
2147 0, /* rightshift */
2148 2, /* size (0 = byte, 1 = short, 2 = long) */
2149 32, /* bitsize */
2150 FALSE, /* pc_relative */
2151 0, /* bitpos */
2152 complain_overflow_dont,/* complain_on_overflow */
2153 nds32_elf_ignore_reloc,/* special_function */
2154 "R_NDS32_TRAN", /* name */
2155 FALSE, /* partial_inplace */
2156 0xffffffff, /* src_mask */
2157 0xffffffff, /* dst_mask */
2158 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2159 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2160 0, /* rightshift */
2161 2, /* size (0 = byte, 1 = short, 2 = long) */
2162 32, /* bitsize */
2163 FALSE, /* pc_relative */
2164 0, /* bitpos */
2165 complain_overflow_dont, /* complain_on_overflow */
2166 nds32_elf_ignore_reloc, /* special_function */
2167 "R_NDS32_TLS_LE_ADD", /* name */
2168 FALSE, /* partial_inplace */
2169 0xffffffff, /* src_mask */
2170 0xffffffff, /* dst_mask */
2171 FALSE), /* pcrel_offset */
2172 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2173 0, /* rightshift */
2174 2, /* size (0 = byte, 1 = short, 2 = long) */
2175 32, /* bitsize */
2176 FALSE, /* pc_relative */
2177 0, /* bitpos */
2178 complain_overflow_dont, /* complain_on_overflow */
2179 nds32_elf_ignore_reloc, /* special_function */
2180 "R_NDS32_TLS_LE_LS", /* name */
2181 FALSE, /* partial_inplace */
2182 0xffffffff, /* src_mask */
2183 0xffffffff, /* dst_mask */
2184 FALSE), /* pcrel_offset */
2185 HOWTO (R_NDS32_EMPTY, /* type */
2186 0, /* rightshift */
2187 2, /* size (0 = byte, 1 = short, 2 = long) */
2188 32, /* bitsize */
2189 FALSE, /* pc_relative */
2190 0, /* bitpos */
2191 complain_overflow_dont, /* complain_on_overflow */
2192 nds32_elf_ignore_reloc, /* special_function */
2193 "R_NDS32_EMPTY", /* name */
2194 FALSE, /* partial_inplace */
2195 0xffffffff, /* src_mask */
2196 0xffffffff, /* dst_mask */
2197 FALSE), /* pcrel_offset */
35c08157
KLC		 2198};
2199
2200\f
2201/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2202 This prototype is the same as qsort (). */
2203
2204void
2205nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2206 int (*compar) (const void *lhs, const void *rhs))
2207{
2208 char *ptr = (char *) base;
1c8f6a4d 2209 int i, j;
e1fa0163 2210 char *tmp = xmalloc (size);
35c08157
KLC		 2211
2212 /* If i is less than j, i is inserted before j.
2213
2214 |---- j ----- i --------------|
2215 \ / \ /
2216 sorted unsorted
2217 */
2218
1c8f6a4d 2219 for (i = 1; i < (int) nmemb; i++)
35c08157 2220 {
1c8f6a4d
KLC		 2221 for (j = (i - 1); j >= 0; j--)
2222 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2223 break;
2224
1c8f6a4d
KLC		 2225 j++;
2226
35c08157 2227 if (i == j)
1c8f6a4d 2228 continue; /* i is in order. */
35c08157
KLC		 2229
2230 memcpy (tmp, ptr + i * size, size);
2231 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2232 memcpy (ptr + j * size, tmp, size);
2233 }
e1fa0163 2234 free (tmp);
35c08157
KLC		 2235}
2236
2237/* Sort relocation by r_offset.
2238
2239 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2240 algorithm. Relocations at the same r_offset must keep their order.
2241 For example, RELAX_ENTRY must be the very first relocation entry.
2242
2243 Currently, this function implements insertion-sort.
2244
2245 FIXME: If we already sort them in assembler, why bother sort them
2246 here again? */
2247
2248static int
2249compar_reloc (const void *lhs, const void *rhs)
2250{
2251 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2252 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2253
2254 if (l->r_offset > r->r_offset)
2255 return 1;
2256 else if (l->r_offset == r->r_offset)
2257 return 0;
2258 else
2259 return -1;
2260}
2261
2262/* Functions listed below are only used for old relocs.
2263 * nds32_elf_9_pcrel_reloc
2264 * nds32_elf_do_9_pcrel_reloc
2265 * nds32_elf_hi20_reloc
2266 * nds32_elf_relocate_hi20
2267 * nds32_elf_lo12_reloc
2268 * nds32_elf_sda15_reloc
2269 * nds32_elf_generic_reloc
2270 */
2271
2272/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2273
2274static bfd_reloc_status_type
2275nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2276 void *data, asection *input_section, bfd *output_bfd,
2277 char **error_message ATTRIBUTE_UNUSED)
2278{
2279 /* This part is from bfd_elf_generic_reloc. */
2280 if (output_bfd != (bfd *) NULL
2281 && (symbol->flags & BSF_SECTION_SYM) == 0
2282 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2283 {
2284 reloc_entry->address += input_section->output_offset;
2285 return bfd_reloc_ok;
2286 }
2287
2288 if (output_bfd != NULL)
2289 {
2290 /* FIXME: See bfd_perform_relocation. Is this right? */
2291 return bfd_reloc_continue;
2292 }
2293
2294 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2295 input_section,
2296 data, reloc_entry->address,
2297 symbol->section,
2298 (symbol->value
2299 + symbol->section->output_section->vma
2300 + symbol->section->output_offset),
2301 reloc_entry->addend);
2302}
2303
2304/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2305#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2306
2307static bfd_reloc_status_type
2308nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2309 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2310 bfd_vma offset,
2311 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2312 bfd_vma symbol_value, bfd_vma addend)
2313{
2314 bfd_signed_vma relocation;
2315 unsigned short x;
2316 bfd_reloc_status_type status;
2317
2318 /* Sanity check the address (offset in section). */
2319 if (offset > bfd_get_section_limit (abfd, input_section))
2320 return bfd_reloc_outofrange;
2321
2322 relocation = symbol_value + addend;
2323 /* Make it pc relative. */
2324 relocation -= (input_section->output_section->vma
2325 + input_section->output_offset);
2326 /* These jumps mask off the lower two bits of the current address
2327 before doing pcrel calculations. */
2328 relocation -= (offset & -(bfd_vma) 2);
2329
1c8f6a4d 2330 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2331 status = bfd_reloc_overflow;
2332 else
2333 status = bfd_reloc_ok;
2334
2335 x = bfd_getb16 (data + offset);
2336
2337 relocation >>= howto->rightshift;
2338 relocation <<= howto->bitpos;
2339 x = (x & ~howto->dst_mask)
2340 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2341
2342 bfd_putb16 ((bfd_vma) x, data + offset);
2343
2344 return status;
2345}
2346
2347/* Handle the R_NDS32_HI20_[SU]LO relocs.
2348 HI20_SLO is for the add3 and load/store with displacement instructions.
2349 HI20 is for the or3 instruction.
2350 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2351 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2352 we must add one to the high 16 bytes (which will get subtracted off when
2353 the low 16 bits are added).
2354 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2355 because there is a carry from the LO12 to the HI20. Here we just save
2356 the information we need; we do the actual relocation when we see the LO12.
2357 This code is copied from the elf32-mips.c. We also support an arbitrary
2358 number of HI20 relocs to be associated with a single LO12 reloc. The
2359 assembler sorts the relocs to ensure each HI20 immediately precedes its
2360 LO12. However if there are multiple copies, the assembler may not find
2361 the real LO12 so it picks the first one it finds. */
2362
2363struct nds32_hi20
2364{
2365 struct nds32_hi20 *next;
2366 bfd_byte *addr;
2367 bfd_vma addend;
2368};
2369
2370static struct nds32_hi20 *nds32_hi20_list;
2371
2372static bfd_reloc_status_type
2373nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2374 asymbol *symbol, void *data, asection *input_section,
2375 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2376{
2377 bfd_reloc_status_type ret;
2378 bfd_vma relocation;
2379 struct nds32_hi20 *n;
2380
2381 /* This part is from bfd_elf_generic_reloc.
2382 If we're relocating, and this an external symbol, we don't want
2383 to change anything. */
2384 if (output_bfd != (bfd *) NULL
2385 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2386 {
2387 reloc_entry->address += input_section->output_offset;
2388 return bfd_reloc_ok;
2389 }
2390
2391 /* Sanity check the address (offset in section). */
2392 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2393 return bfd_reloc_outofrange;
2394
2395 ret = bfd_reloc_ok;
2396 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2397 ret = bfd_reloc_undefined;
2398
2399 if (bfd_is_com_section (symbol->section))
2400 relocation = 0;
2401 else
2402 relocation = symbol->value;
2403
2404 relocation += symbol->section->output_section->vma;
2405 relocation += symbol->section->output_offset;
2406 relocation += reloc_entry->addend;
2407
2408 /* Save the information, and let LO12 do the actual relocation. */
2409 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2410 if (n == NULL)
2411 return bfd_reloc_outofrange;
2412
2413 n->addr = (bfd_byte *) data + reloc_entry->address;
2414 n->addend = relocation;
2415 n->next = nds32_hi20_list;
2416 nds32_hi20_list = n;
2417
2418 if (output_bfd != (bfd *) NULL)
2419 reloc_entry->address += input_section->output_offset;
2420
2421 return ret;
2422}
2423
2424/* Handle an NDS32 ELF HI20 reloc. */
2425
2426static void
2427nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2428 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2429 Elf_Internal_Rela *rello, bfd_byte *contents,
2430 bfd_vma addend)
2431{
2432 unsigned long insn;
2433 bfd_vma addlo;
2434
2435 insn = bfd_getb32 (contents + relhi->r_offset);
2436
2437 addlo = bfd_getb32 (contents + rello->r_offset);
2438 addlo &= 0xfff;
2439
2440 addend += ((insn & 0xfffff) << 20) + addlo;
2441
2442 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2443 bfd_putb32 (insn, contents + relhi->r_offset);
2444}
2445
2446/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2447 inplace relocation; this function exists in order to do the
2448 R_NDS32_HI20_[SU]LO relocation described above. */
2449
2450static bfd_reloc_status_type
2451nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2452 void *data, asection *input_section, bfd *output_bfd,
2453 char **error_message)
2454{
2455 /* This part is from bfd_elf_generic_reloc.
2456 If we're relocating, and this an external symbol, we don't want
2457 to change anything. */
2458 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2459 && reloc_entry->addend == 0)
2460 {
2461 reloc_entry->address += input_section->output_offset;
2462 return bfd_reloc_ok;
2463 }
2464
2465 if (nds32_hi20_list != NULL)
2466 {
2467 struct nds32_hi20 *l;
2468
2469 l = nds32_hi20_list;
2470 while (l != NULL)
2471 {
2472 unsigned long insn;
2473 unsigned long val;
2474 unsigned long vallo;
2475 struct nds32_hi20 *next;
2476
2477 /* Do the HI20 relocation. Note that we actually don't need
2478 to know anything about the LO12 itself, except where to
2479 find the low 12 bits of the addend needed by the LO12. */
2480 insn = bfd_getb32 (l->addr);
2481 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2482 vallo &= 0xfff;
2483 switch (reloc_entry->howto->type)
2484 {
2485 case R_NDS32_LO12S3:
2486 vallo <<= 3;
2487 break;
2488
2489 case R_NDS32_LO12S2:
2490 vallo <<= 2;
2491 break;
2492
2493 case R_NDS32_LO12S1:
2494 vallo <<= 1;
2495 break;
2496
2497 case R_NDS32_LO12S0:
2498 vallo <<= 0;
2499 break;
2500 }
2501
2502 val = ((insn & 0xfffff) << 12) + vallo;
2503 val += l->addend;
2504
2505 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2506 bfd_putb32 ((bfd_vma) insn, l->addr);
2507
2508 next = l->next;
2509 free (l);
2510 l = next;
2511 }
2512
2513 nds32_hi20_list = NULL;
2514 }
2515
2516 /* Now do the LO12 reloc in the usual way.
2517 ??? It would be nice to call bfd_elf_generic_reloc here,
2518 but we have partial_inplace set. bfd_elf_generic_reloc will
2519 pass the handling back to bfd_install_relocation which will install
2520 a section relative addend which is wrong. */
2521 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2522 input_section, output_bfd, error_message);
2523}
2524
2525/* Do generic partial_inplace relocation.
2526 This is a local replacement for bfd_elf_generic_reloc. */
2527
2528static bfd_reloc_status_type
2529nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2530 asymbol *symbol, void *data, asection *input_section,
2531 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2532{
2533 bfd_reloc_status_type ret;
2534 bfd_vma relocation;
2535 bfd_byte *inplace_address;
2536
2537 /* This part is from bfd_elf_generic_reloc.
2538 If we're relocating, and this an external symbol, we don't want
2539 to change anything. */
2540 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2541 && reloc_entry->addend == 0)
2542 {
2543 reloc_entry->address += input_section->output_offset;
2544 return bfd_reloc_ok;
2545 }
2546
2547 /* Now do the reloc in the usual way.
2548 ??? It would be nice to call bfd_elf_generic_reloc here,
2549 but we have partial_inplace set. bfd_elf_generic_reloc will
2550 pass the handling back to bfd_install_relocation which will install
2551 a section relative addend which is wrong. */
2552
2553 /* Sanity check the address (offset in section). */
2554 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2555 return bfd_reloc_outofrange;
2556
2557 ret = bfd_reloc_ok;
2558 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2559 ret = bfd_reloc_undefined;
2560
2561 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2562 relocation = 0;
2563 else
2564 relocation = symbol->value;
2565
2566 /* Only do this for a final link. */
2567 if (output_bfd == (bfd *) NULL)
2568 {
2569 relocation += symbol->section->output_section->vma;
2570 relocation += symbol->section->output_offset;
2571 }
2572
2573 relocation += reloc_entry->addend;
2574 switch (reloc_entry->howto->type)
2575 {
2576 case R_NDS32_LO12S3:
2577 relocation >>= 3;
2578 break;
2579
2580 case R_NDS32_LO12S2:
2581 relocation >>= 2;
2582 break;
2583
2584 case R_NDS32_LO12S1:
2585 relocation >>= 1;
2586 break;
2587
2588 case R_NDS32_LO12S0:
2589 default:
2590 relocation >>= 0;
2591 break;
2592 }
2593
2594 inplace_address = (bfd_byte *) data + reloc_entry->address;
2595
2596#define DOIT(x) \
2597 x = ((x & ~reloc_entry->howto->dst_mask) | \
2598 (((x & reloc_entry->howto->src_mask) + relocation) & \
2599 reloc_entry->howto->dst_mask))
2600
2601 switch (reloc_entry->howto->size)
2602 {
2603 case 1:
2604 {
2605 short x = bfd_getb16 (inplace_address);
2606
2607 DOIT (x);
2608 bfd_putb16 ((bfd_vma) x, inplace_address);
2609 }
2610 break;
2611 case 2:
2612 {
2613 unsigned long x = bfd_getb32 (inplace_address);
2614
2615 DOIT (x);
2616 bfd_putb32 ((bfd_vma) x, inplace_address);
2617 }
2618 break;
2619 default:
2620 BFD_ASSERT (0);
2621 }
2622
2623 if (output_bfd != (bfd *) NULL)
2624 reloc_entry->address += input_section->output_offset;
2625
2626 return ret;
2627}
2628
2629/* Handle the R_NDS32_SDA15 reloc.
2630 This reloc is used to compute the address of objects in the small data area
2631 and to perform loads and stores from that area.
2632 The lower 15 bits are sign extended and added to the register specified
2633 in the instruction, which is assumed to point to _SDA_BASE_.
2634
2635 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2636 the access size, this must be taken care of. */
2637
2638static bfd_reloc_status_type
2639nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2640 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2641 asection *input_section, bfd *output_bfd,
2642 char **error_message ATTRIBUTE_UNUSED)
2643{
2644 /* This part is from bfd_elf_generic_reloc. */
2645 if (output_bfd != (bfd *) NULL
2646 && (symbol->flags & BSF_SECTION_SYM) == 0
2647 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2648 {
2649 reloc_entry->address += input_section->output_offset;
2650 return bfd_reloc_ok;
2651 }
2652
2653 if (output_bfd != NULL)
2654 {
2655 /* FIXME: See bfd_perform_relocation. Is this right? */
2656 return bfd_reloc_continue;
2657 }
2658
2659 /* FIXME: not sure what to do here yet. But then again, the linker
2660 may never call us. */
2661 abort ();
2662}
2663
2664/* nds32_elf_ignore_reloc is the special function for
2665 relocation types which don't need to be relocated
2666 like relaxation relocation types.
2667 This function simply return bfd_reloc_ok when it is
2668 invoked. */
2669
2670static bfd_reloc_status_type
2671nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2672 asymbol *symbol ATTRIBUTE_UNUSED,
2673 void *data ATTRIBUTE_UNUSED, asection *input_section,
2674 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2675{
2676 if (output_bfd != NULL)
2677 reloc_entry->address += input_section->output_offset;
2678
2679 return bfd_reloc_ok;
2680}
2681\f
2682
2683/* Map BFD reloc types to NDS32 ELF reloc types. */
2684
2685struct nds32_reloc_map_entry
2686{
2687 bfd_reloc_code_real_type bfd_reloc_val;
2688 unsigned char elf_reloc_val;
2689};
2690
2691static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2692{
2693 {BFD_RELOC_NONE, R_NDS32_NONE},
2694 {BFD_RELOC_16, R_NDS32_16_RELA},
2695 {BFD_RELOC_32, R_NDS32_32_RELA},
2696 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2697 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2698 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2699 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2700 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2701 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2702 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2703 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2704 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2705 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2706 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2707 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2708 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2709 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2710 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2711 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2712 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2713 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2714 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2715 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2716
2717 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2718 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2719 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2720 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2721 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2722 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2723 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2724 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2725 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2726 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2727 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2728 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2729 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2730 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2731 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2732 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2733 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2734 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2735 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2736 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2737 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2738 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2739 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2740 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2741 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2742 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2743 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2744 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2745 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2746 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2747 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2748 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2749 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2750 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2751 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2752 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2753 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2754 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2755 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2756 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2757 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2758 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2759 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2760 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2761 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2762 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2763 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2764 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2765 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2766 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2767 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2768 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2769 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2770 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2771 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2772 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2773 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2774 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2775 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2776 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2777 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2778 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2779 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2780 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2781 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2782 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2783 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2784 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2785 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2786 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2787 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2788 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2789 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2790 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2791 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2792
2793 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2794 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2795 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2796 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2797 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2798 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2799 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2800 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2801 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2802 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2803 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2804 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2805 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2806 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2807 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2808 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2809 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2810 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2811 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2812 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2813};
2814
2815/* Patch tag. */
2816
2817static reloc_howto_type *
2818bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2819 const char *r_name)
2820{
2821 unsigned int i;
2822
2823 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2824 if (nds32_elf_howto_table[i].name != NULL
2825 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2826 return &nds32_elf_howto_table[i];
2827
2828 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2829 if (nds32_elf_relax_howto_table[i].name != NULL
2830 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2831 return &nds32_elf_relax_howto_table[i];
2832
2833 return NULL;
2834}
2835
2836static reloc_howto_type *
2837bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2838{
2839 if (code < R_NDS32_RELAX_ENTRY)
2840 {
2841 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2842 return &nds32_elf_howto_table[code];
2843 }
2844 else
2845 {
2846 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2847 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2848 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2849 }
2850}
2851
2852static reloc_howto_type *
2853bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2854 bfd_reloc_code_real_type code)
2855{
2856 unsigned int i;
2857
2858 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2859 {
2860 if (nds32_reloc_map[i].bfd_reloc_val == code)
2861 return bfd_elf32_bfd_reloc_type_table_lookup
2862 (nds32_reloc_map[i].elf_reloc_val);
2863 }
2864
2865 return NULL;
2866}
2867
2868/* Set the howto pointer for an NDS32 ELF reloc. */
2869
f3185997
NC		 2870static bfd_boolean
2871nds32_info_to_howto_rel (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 2872 Elf_Internal_Rela *dst)
2873{
2874 enum elf_nds32_reloc_type r_type;
2875
2876 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2877 if (r_type > R_NDS32_GNU_VTENTRY)
2878 {
695344c0 2879 /* xgettext:c-format */
0aa13fee
AM		 2880 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2881 abfd, r_type);
f3185997
NC		 2882 bfd_set_error (bfd_error_bad_value);
2883 return FALSE;
5860e3f8 2884 }
35c08157 2885 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
f3185997 2886 return TRUE;
35c08157
KLC		 2887}
2888
f3185997 2889static bfd_boolean
35c08157
KLC		 2890nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2891 Elf_Internal_Rela *dst)
2892{
f3185997
NC		 2893 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
2894
2895 if ((r_type == R_NDS32_NONE)
2896 || ((r_type > R_NDS32_GNU_VTENTRY)
2897 && (r_type < R_NDS32_max)))
2898 {
2899 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2900 return TRUE;
2901 }
2902
2903 /* xgettext:c-format */
2904 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2905 bfd_set_error (bfd_error_bad_value);
2906 return FALSE;
35c08157
KLC		 2907}
2908
2909/* Support for core dump NOTE sections.
2910 Reference to include/linux/elfcore.h in Linux. */
2911
2912static bfd_boolean
2913nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2914{
2915 int offset;
2916 size_t size;
2917
2918 switch (note->descsz)
2919 {
2920 case 0x114:
2921 /* Linux/NDS32 32-bit, ABI1 */
2922
2923 /* pr_cursig */
2924 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2925
2926 /* pr_pid */
2927 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2928
2929 /* pr_reg */
2930 offset = 72;
2931 size = 200;
2932 break;
2933
2934 case 0xfc:
2935 /* Linux/NDS32 32-bit */
2936
2937 /* pr_cursig */
2938 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2939
2940 /* pr_pid */
2941 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2942
2943 /* pr_reg */
2944 offset = 72;
2945 size = 176;
2946 break;
2947
2948 default:
2949 return FALSE;
2950 }
2951
2952 /* Make a ".reg" section. */
2953 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2954 size, note->descpos + offset);
2955}
2956
2957static bfd_boolean
2958nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2959{
2960 switch (note->descsz)
2961 {
2962 case 124:
2963 /* Linux/NDS32 */
2964
2965 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2966 elf_tdata (abfd)->core->program =
2967 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2968 elf_tdata (abfd)->core->command =
2969 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 2970 break;
35c08157
KLC		 2971
2972 default:
2973 return FALSE;
2974 }
2975
2976 /* Note that for some reason, a spurious space is tacked
2977 onto the end of the args in some (at least one anyway)
2978 implementations, so strip it off if it exists. */
2979 {
2980 char *command = elf_tdata (abfd)->core->command;
2981 int n = strlen (command);
2982
2983 if (0 < n && command[n - 1] == ' ')
2984 command[n - 1] = '\0';
2985 }
2986
2987 return TRUE;
2988}
2989
2990/* Hook called by the linker routine which adds symbols from an object
2991 file. We must handle the special NDS32 section numbers here.
2992 We also keep watching for whether we need to create the sdata special
2993 linker sections. */
2994
2995static bfd_boolean
2996nds32_elf_add_symbol_hook (bfd *abfd,
2997 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2998 Elf_Internal_Sym *sym,
2999 const char **namep ATTRIBUTE_UNUSED,
3000 flagword *flagsp ATTRIBUTE_UNUSED,
3001 asection **secp, bfd_vma *valp)
3002{
3003 switch (sym->st_shndx)
3004 {
3005 case SHN_COMMON:
3006 /* Common symbols less than the GP size are automatically
3007 treated as SHN_MIPS_SCOMMON symbols. */
3008 if (sym->st_size > elf_gp_size (abfd)
3009 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3010 break;
3011
3012 /* st_value is the alignemnt constraint.
3013 That might be its actual size if it is an array or structure. */
3014 switch (sym->st_value)
3015 {
3016 case 1:
3017 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3018 break;
3019 case 2:
3020 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3021 break;
3022 case 4:
3023 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3024 break;
3025 case 8:
3026 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3027 break;
3028 default:
3029 return TRUE;
3030 }
3031
3032 (*secp)->flags |= SEC_IS_COMMON;
3033 *valp = sym->st_size;
3034 break;
3035 }
3036
3037 return TRUE;
3038}
3039
3040
3041/* This function can figure out the best location for a base register to access
3042 data relative to this base register
3043 INPUT:
3044 sda_d0: size of first DOUBLE WORD data section
3045 sda_w0: size of first WORD data section
3046 sda_h0: size of first HALF WORD data section
3047 sda_b : size of BYTE data section
3048 sda_hi: size of second HALF WORD data section
3049 sda_w1: size of second WORD data section
3050 sda_d1: size of second DOUBLE WORD data section
3051 OUTPUT:
3052 offset (always positive) from the beginning of sda_d0 if OK
3053 a negative error value if fail
3054 NOTE:
3055 these 7 sections have to be located back to back if exist
3056 a pass in 0 value for non-existing section */
3057
3058/* Due to the interpretation of simm15 field of load/store depending on
3059 data accessing size, the organization of base register relative data shall
3060 like the following figure
3061 -------------------------------------------
3062 | DOUBLE WORD sized data (range +/- 128K)
3063 -------------------------------------------
3064 | WORD sized data (range +/- 64K)
3065 -------------------------------------------
3066 | HALF WORD sized data (range +/- 32K)
3067 -------------------------------------------
3068 | BYTE sized data (range +/- 16K)
3069 -------------------------------------------
3070 | HALF WORD sized data (range +/- 32K)
3071 -------------------------------------------
3072 | WORD sized data (range +/- 64K)
3073 -------------------------------------------
3074 | DOUBLE WORD sized data (range +/- 128K)
3075 -------------------------------------------
3076 Its base register shall be set to access these data freely. */
3077
3078/* We have to figure out the SDA_BASE value, so that we can adjust the
3079 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3080 BFD. If we can't find it, we're stuck. We cache it in the ELF
3081 target data. We don't need to adjust the symbol value for an
3082 external symbol if we are producing relocatable output. */
3083
3084static asection *sda_rela_sec = NULL;
3085
1c8f6a4d 3086#define SDA_SECTION_NUM 10
35c08157
KLC		 3087
3088static bfd_reloc_status_type
3089nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3090 bfd_vma *psb, bfd_boolean add_symbol)
3091{
3092 int relax_fp_as_gp;
3093 struct elf_nds32_link_hash_table *table;
3094 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3095 long unsigned int total = 0;
35c08157
KLC		 3096
3097 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3098 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3099 {
3100 asection *first = NULL, *final = NULL, *temp;
3101 bfd_vma sda_base;
3102 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3103 4 byte-aligned. Therefore, it has to set the first section ".data"
3104 4 byte-aligned. */
3105 static const char sec_name[SDA_SECTION_NUM][10] =
3106 {
3107 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3108 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3109 };
3110 size_t i = 0;
3111
3112 if (output_bfd->sections == NULL)
3113 {
3114 *psb = elf_gp (output_bfd);
3115 return bfd_reloc_ok;
3116 }
3117
3118 /* Get the first and final section. */
1c8f6a4d 3119 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3120 {
3121 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3122 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3123 first = temp;
3124 if (temp && (temp->size != 0 || temp->rawsize != 0))
3125 final = temp;
1c8f6a4d
KLC		 3126
3127 /* Summarize the sections in order to check if joining .bss. */
3128 if (temp && temp->size != 0)
3129 total += temp->size;
3130 else if (temp && temp->rawsize != 0)
3131 total += temp->rawsize;
3132
35c08157
KLC		 3133 i++;
3134 }
3135
1c8f6a4d
KLC		 3136 /* Check .bss size. */
3137 temp = bfd_get_section_by_name (output_bfd, ".bss");
3138 if (temp)
3139 {
3140 if (temp->size != 0)
3141 total += temp->size;
3142 else if (temp->rawsize != 0)
3143 total += temp->rawsize;
3144
3145 if (total < 0x80000)
3146 {
3147 if (!first && (temp->size != 0 || temp->rawsize != 0))
3148 first = temp;
3149 if ((temp->size != 0 || temp->rawsize != 0))
3150 final = temp;
3151 }
3152 }
3153
35c08157
KLC		 3154 if (first && final)
3155 {
3156 /* The middle of data region. */
1c8f6a4d 3157 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3158
3159 /* Find the section sda_base located. */
3160 i = 0;
1c8f6a4d 3161 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3162 {
3163 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3164 if (final && (final->size != 0 || final->rawsize != 0)
3165 && sda_base >= final->vma)
3166 {
3167 first = final;
3168 i++;
3169 }
3170 else
3171 break;
3172 }
3173 }
3174 else
3175 {
3176 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3177 first output section. */
3178 first = output_bfd->sections;
3179 while (first && first->size == 0 && first->rawsize == 0)
3180 first = first->next;
3181 if (!first)
3182 {
3183 *psb = elf_gp (output_bfd);
3184 return bfd_reloc_ok;
3185 }
1c8f6a4d 3186 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3187 }
3188
3189 sda_base -= first->vma;
3190 sda_base = sda_base & (~7);
3191
3192 if (!_bfd_generic_link_add_one_symbol
3193 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3194 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3195 get_elf_backend_data (output_bfd)->collect, &h))
3196 return FALSE;
3197
3198 sda_rela_sec = first;
3199
3200 table = nds32_elf_hash_table (info);
3201 relax_fp_as_gp = table->relax_fp_as_gp;
3202 if (relax_fp_as_gp)
3203 {
3204 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3205 FALSE, FALSE, FALSE);
3206 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3207 And set FP equal to SDA_BASE to do relaxation for
3208 la $fp, _FP_BASE_. */
3209 if (!_bfd_generic_link_add_one_symbol
3210 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3211 first, (bfd_vma) sda_base, (const char *) NULL,
3212 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3213 return FALSE;
3214 }
3215 }
3216
535b785f 3217 if (add_symbol)
35c08157
KLC		 3218 {
3219 if (h)
3220 {
3221 /* Now set gp. */
3222 elf_gp (output_bfd) = (h->u.def.value
3223 + h->u.def.section->output_section->vma
3224 + h->u.def.section->output_offset);
3225 }
3226 else
3227 {
38f14ab8 3228 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC		 3229 return bfd_reloc_dangerous;
3230 }
3231 }
3232
3233 *psb = h->u.def.value + h->u.def.section->output_section->vma
3234 + h->u.def.section->output_offset;
3235 return bfd_reloc_ok;
3236}
3237\f
3238
3239/* Return size of a PLT entry. */
3240#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3241
3242
3243/* Create an entry in an nds32 ELF linker hash table. */
3244
3245static struct bfd_hash_entry *
3246nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3247 struct bfd_hash_table *table,
3248 const char *string)
3249{
3250 struct elf_nds32_link_hash_entry *ret;
3251
3252 ret = (struct elf_nds32_link_hash_entry *) entry;
3253
3254 /* Allocate the structure if it has not already been allocated by a
3255 subclass. */
3256 if (ret == NULL)
3257 ret = (struct elf_nds32_link_hash_entry *)
3258 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3259
3260 if (ret == NULL)
3261 return (struct bfd_hash_entry *) ret;
3262
3263 /* Call the allocation method of the superclass. */
3264 ret = (struct elf_nds32_link_hash_entry *)
3265 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3266
3267 if (ret != NULL)
3268 {
3269 struct elf_nds32_link_hash_entry *eh;
3270
3271 eh = (struct elf_nds32_link_hash_entry *) ret;
3272 eh->dyn_relocs = NULL;
1c8f6a4d 3273 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3274 }
3275
3276 return (struct bfd_hash_entry *) ret;
3277}
3278
3279/* Create an nds32 ELF linker hash table. */
3280
3281static struct bfd_link_hash_table *
3282nds32_elf_link_hash_table_create (bfd *abfd)
3283{
3284 struct elf_nds32_link_hash_table *ret;
3285
3286 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3287
3288 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3289 if (ret == NULL)
3290 return NULL;
3291
3292 /* patch tag. */
3293 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3294 nds32_elf_link_hash_newfunc,
3295 sizeof (struct elf_nds32_link_hash_entry),
3296 NDS32_ELF_DATA))
3297 {
3298 free (ret);
3299 return NULL;
3300 }
3301
35c08157
KLC		 3302 return &ret->root.root;
3303}
3304
35c08157
KLC		 3305/* Create dynamic sections when linking against a dynamic object. */
3306
3307static bfd_boolean
3308nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3309{
3310 struct elf_nds32_link_hash_table *htab;
3311 flagword flags, pltflags;
3312 register asection *s;
3313 const struct elf_backend_data *bed;
3314 int ptralign = 2; /* 32-bit */
3315
3316 bed = get_elf_backend_data (abfd);
3317
3318 htab = nds32_elf_hash_table (info);
3319
3320 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3321 .rel[a].bss sections. */
3322
3323 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3324 | SEC_LINKER_CREATED);
3325
3326 pltflags = flags;
3327 pltflags |= SEC_CODE;
3328 if (bed->plt_not_loaded)
3329 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3330 if (bed->plt_readonly)
3331 pltflags |= SEC_READONLY;
3332
3333 s = bfd_make_section (abfd, ".plt");
ce558b89 3334 htab->root.splt = s;
35c08157
KLC		 3335 if (s == NULL
3336 || !bfd_set_section_flags (abfd, s, pltflags)
3337 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3338 return FALSE;
3339
3340 if (bed->want_plt_sym)
3341 {
3342 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3343 .plt section. */
3344 struct bfd_link_hash_entry *bh = NULL;
3345 struct elf_link_hash_entry *h;
3346
3347 if (!(_bfd_generic_link_add_one_symbol
3348 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3349 (bfd_vma) 0, (const char *) NULL, FALSE,
3350 get_elf_backend_data (abfd)->collect, &bh)))
3351 return FALSE;
3352
3353 h = (struct elf_link_hash_entry *) bh;
3354 h->def_regular = 1;
3355 h->type = STT_OBJECT;
3356
0e1862bb 3357 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC		 3358 return FALSE;
3359 }
3360
3361 s = bfd_make_section (abfd,
3362 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
ce558b89 3363 htab->root.srelplt = s;
35c08157
KLC		 3364 if (s == NULL
3365 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3366 || !bfd_set_section_alignment (abfd, s, ptralign))
3367 return FALSE;
3368
ce558b89 3369 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
35c08157
KLC		 3370 return FALSE;
3371
3372 {
3373 const char *secname;
3374 char *relname;
3375 flagword secflags;
3376 asection *sec;
3377
3378 for (sec = abfd->sections; sec; sec = sec->next)
3379 {
3380 secflags = bfd_get_section_flags (abfd, sec);
3381 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3382 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3383 continue;
3384 secname = bfd_get_section_name (abfd, sec);
3385 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3386 strcpy (relname, ".rela");
3387 strcat (relname, secname);
3388 if (bfd_get_section_by_name (abfd, secname))
3389 continue;
3390 s = bfd_make_section (abfd, relname);
3391 if (s == NULL
3392 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3393 || !bfd_set_section_alignment (abfd, s, ptralign))
3394 return FALSE;
3395 }
3396 }
3397
3398 if (bed->want_dynbss)
3399 {
3400 /* The .dynbss section is a place to put symbols which are defined
3401 by dynamic objects, are referenced by regular objects, and are
3402 not functions. We must allocate space for them in the process
3403 image and use a R_*_COPY reloc to tell the dynamic linker to
3404 initialize them at run time. The linker script puts the .dynbss
3405 section into the .bss section of the final image. */
3406 s = bfd_make_section (abfd, ".dynbss");
3407 htab->sdynbss = s;
3408 if (s == NULL
3409 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3410 return FALSE;
3411 /* The .rel[a].bss section holds copy relocs. This section is not
3412 normally needed. We need to create it here, though, so that the
3413 linker will map it to an output section. We can't just create it
3414 only if we need it, because we will not know whether we need it
3415 until we have seen all the input files, and the first time the
3416 main linker code calls BFD after examining all the input files
3417 (size_dynamic_sections) the input sections have already been
3418 mapped to the output sections. If the section turns out not to
3419 be needed, we can discard it later. We will never need this
3420 section when generating a shared object, since they do not use
3421 copy relocs. */
0e1862bb 3422 if (!bfd_link_pic (info))
35c08157
KLC		 3423 {
3424 s = bfd_make_section (abfd, (bed->default_use_rela_p
3425 ? ".rela.bss" : ".rel.bss"));
3426 htab->srelbss = s;
3427 if (s == NULL
3428 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3429 || !bfd_set_section_alignment (abfd, s, ptralign))
3430 return FALSE;
3431 }
3432 }
3433
3434 return TRUE;
3435}
3436
3437/* Copy the extra info we tack onto an elf_link_hash_entry. */
3438static void
3439nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3440 struct elf_link_hash_entry *dir,
3441 struct elf_link_hash_entry *ind)
3442{
3443 struct elf_nds32_link_hash_entry *edir, *eind;
3444
3445 edir = (struct elf_nds32_link_hash_entry *) dir;
3446 eind = (struct elf_nds32_link_hash_entry *) ind;
3447
3448 if (eind->dyn_relocs != NULL)
3449 {
3450 if (edir->dyn_relocs != NULL)
3451 {
3bf083ed
AM		 3452 struct elf_dyn_relocs **pp;
3453 struct elf_dyn_relocs *p;
35c08157
KLC		 3454
3455 if (ind->root.type == bfd_link_hash_indirect)
3456 abort ();
3457
3458 /* Add reloc counts against the weak sym to the strong sym
3459 list. Merge any entries against the same section. */
3460 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3461 {
3bf083ed 3462 struct elf_dyn_relocs *q;
35c08157
KLC		 3463
3464 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3465 if (q->sec == p->sec)
3466 {
3467 q->pc_count += p->pc_count;
3468 q->count += p->count;
3469 *pp = p->next;
3470 break;
3471 }
3472 if (q == NULL)
3473 pp = &p->next;
3474 }
3475 *pp = edir->dyn_relocs;
3476 }
3477
3478 edir->dyn_relocs = eind->dyn_relocs;
3479 eind->dyn_relocs = NULL;
3480 }
3481
3482 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3483}
3484\f
63c1f59d
AM		 3485/* Find dynamic relocs for H that apply to read-only sections. */
3486
3487static asection *
3488readonly_dynrelocs (struct elf_link_hash_entry *h)
3489{
3bf083ed 3490 struct elf_dyn_relocs *p;
63c1f59d
AM		 3491
3492 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3493 {
3494 asection *s = p->sec->output_section;
3495
3496 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3497 return p->sec;
3498 }
3499 return NULL;
3500}
35c08157
KLC		 3501
3502/* Adjust a symbol defined by a dynamic object and referenced by a
3503 regular object. The current definition is in some section of the
3504 dynamic object, but we're not including those sections. We have to
3505 change the definition to something the rest of the link can
3506 understand. */
3507
3508static bfd_boolean
3509nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3510 struct elf_link_hash_entry *h)
3511{
3512 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3513 bfd *dynobj;
3514 asection *s;
3515 unsigned int power_of_two;
3516
3517 dynobj = elf_hash_table (info)->dynobj;
3518
3519 /* Make sure we know what is going on here. */
3520 BFD_ASSERT (dynobj != NULL
3521 && (h->needs_plt
60d67dc8 3522 || h->is_weakalias
35c08157
KLC		 3523 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3524
3525
3526 /* If this is a function, put it in the procedure linkage table. We
3527 will fill in the contents of the procedure linkage table later,
3528 when we know the address of the .got section. */
3529 if (h->type == STT_FUNC || h->needs_plt)
3530 {
0e1862bb 3531 if (!bfd_link_pic (info)
35c08157
KLC		 3532 && !h->def_dynamic
3533 && !h->ref_dynamic
3534 && h->root.type != bfd_link_hash_undefweak
3535 && h->root.type != bfd_link_hash_undefined)
3536 {
3537 /* This case can occur if we saw a PLT reloc in an input
3538 file, but the symbol was never referred to by a dynamic
3539 object. In such a case, we don't actually need to build
3540 a procedure linkage table, and we can just do a PCREL
3541 reloc instead. */
3542 h->plt.offset = (bfd_vma) - 1;
3543 h->needs_plt = 0;
3544 }
3545
3546 return TRUE;
3547 }
3548 else
3549 h->plt.offset = (bfd_vma) - 1;
3550
3551 /* If this is a weak symbol, and there is a real definition, the
3552 processor independent code will have arranged for us to see the
3553 real definition first, and we can just use the same value. */
60d67dc8 3554 if (h->is_weakalias)
35c08157 3555 {
60d67dc8
AM		 3556 struct elf_link_hash_entry *def = weakdef (h);
3557 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3558 h->root.u.def.section = def->root.u.def.section;
3559 h->root.u.def.value = def->root.u.def.value;
35c08157
KLC		 3560 return TRUE;
3561 }
3562
3563 /* This is a reference to a symbol defined by a dynamic object which
3564 is not a function. */
3565
3566 /* If we are creating a shared library, we must presume that the
3567 only references to the symbol are via the global offset table.
3568 For such cases we need not do anything here; the relocations will
3569 be handled correctly by relocate_section. */
0e1862bb 3570 if (bfd_link_pic (info))
35c08157
KLC		 3571 return TRUE;
3572
3573 /* If there are no references to this symbol that do not use the
3574 GOT, we don't need to generate a copy reloc. */
3575 if (!h->non_got_ref)
3576 return TRUE;
3577
3578 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 3579 if (0 && info->nocopyreloc)
35c08157
KLC		 3580 {
3581 h->non_got_ref = 0;
3582 return TRUE;
3583 }
3584
3bf083ed
AM		 3585 /* If we don't find any dynamic relocs in read-only sections, then
3586 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3587 if (0 && !readonly_dynrelocs (h))
35c08157
KLC		 3588 {
3589 h->non_got_ref = 0;
3590 return TRUE;
3591 }
3592
3593 /* We must allocate the symbol in our .dynbss section, which will
3594 become part of the .bss section of the executable. There will be
3595 an entry for this symbol in the .dynsym section. The dynamic
3596 object will contain position independent code, so all references
3597 from the dynamic object to this symbol will go through the global
3598 offset table. The dynamic linker will use the .dynsym entry to
3599 determine the address it must put in the global offset table, so
3600 both the dynamic object and the regular object will refer to the
3601 same memory location for the variable. */
3602
3603 htab = nds32_elf_hash_table (info);
3604 s = htab->sdynbss;
3605 BFD_ASSERT (s != NULL);
3606
3607 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3608 to copy the initial value out of the dynamic object and into the
3609 runtime process image. We need to remember the offset into the
3610 .rela.bss section we are going to use. */
3611 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3612 {
3613 asection *srel;
3614
3615 srel = htab->srelbss;
3616 BFD_ASSERT (srel != NULL);
3617 srel->size += sizeof (Elf32_External_Rela);
3618 h->needs_copy = 1;
3619 }
3620
3621 /* We need to figure out the alignment required for this symbol. I
3622 have no idea how ELF linkers handle this. */
3623 power_of_two = bfd_log2 (h->size);
3624 if (power_of_two > 3)
3625 power_of_two = 3;
3626
3627 /* Apply the required alignment. */
3628 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3629 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3630 {
3631 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3632 return FALSE;
3633 }
3634
3635 /* Define the symbol as being at this point in the section. */
3636 h->root.u.def.section = s;
3637 h->root.u.def.value = s->size;
3638
3639 /* Increment the section size to make room for the symbol. */
3640 s->size += h->size;
3641
3642 return TRUE;
3643}
3644
3645/* Allocate space in .plt, .got and associated reloc sections for
3646 dynamic relocs. */
3647
3648static bfd_boolean
3649allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3650{
3651 struct bfd_link_info *info;
3652 struct elf_nds32_link_hash_table *htab;
3653 struct elf_nds32_link_hash_entry *eh;
3bf083ed 3654 struct elf_dyn_relocs *p;
35c08157
KLC		 3655
3656 if (h->root.type == bfd_link_hash_indirect)
3657 return TRUE;
3658
3659 if (h->root.type == bfd_link_hash_warning)
3660 /* When warning symbols are created, they **replace** the "real"
3661 entry in the hash table, thus we never get to see the real
3662 symbol in a hash traversal. So look at it now. */
3663 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3664
3665 info = (struct bfd_link_info *) inf;
3666 htab = nds32_elf_hash_table (info);
3667
3668 eh = (struct elf_nds32_link_hash_entry *) h;
3669
3670 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3671 {
3672 /* Make sure this symbol is output as a dynamic symbol.
3673 Undefined weak syms won't yet be marked as dynamic. */
3674 if (h->dynindx == -1 && !h->forced_local)
3675 {
3676 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3677 return FALSE;
3678 }
3679
0e1862bb 3680 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 3681 {
ce558b89 3682 asection *s = htab->root.splt;
35c08157
KLC		 3683
3684 /* If this is the first .plt entry, make room for the special
3685 first entry. */
3686 if (s->size == 0)
3687 s->size += PLT_ENTRY_SIZE;
3688
3689 h->plt.offset = s->size;
3690
3691 /* If this symbol is not defined in a regular file, and we are
3692 not generating a shared library, then set the symbol to this
3693 location in the .plt. This is required to make function
3694 pointers compare as equal between the normal executable and
3695 the shared library. */
0e1862bb 3696 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 3697 {
3698 h->root.u.def.section = s;
3699 h->root.u.def.value = h->plt.offset;
3700 }
3701
3702 /* Make room for this entry. */
3703 s->size += PLT_ENTRY_SIZE;
3704
3705 /* We also need to make an entry in the .got.plt section, which
3706 will be placed in the .got section by the linker script. */
ce558b89 3707 htab->root.sgotplt->size += 4;
35c08157
KLC		 3708
3709 /* We also need to make an entry in the .rel.plt section. */
ce558b89 3710 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3711 }
3712 else
3713 {
3714 h->plt.offset = (bfd_vma) - 1;
3715 h->needs_plt = 0;
3716 }
3717 }
3718 else
3719 {
3720 h->plt.offset = (bfd_vma) - 1;
3721 h->needs_plt = 0;
3722 }
3723
3724 if (h->got.refcount > 0)
3725 {
3726 asection *s;
3727 bfd_boolean dyn;
1c8f6a4d 3728 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3729
3730 /* Make sure this symbol is output as a dynamic symbol.
3731 Undefined weak syms won't yet be marked as dynamic. */
3732 if (h->dynindx == -1 && !h->forced_local)
3733 {
3734 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3735 return FALSE;
3736 }
3737
ce558b89 3738 s = htab->root.sgot;
35c08157 3739 h->got.offset = s->size;
1c8f6a4d
KLC		 3740
3741 if (tls_type == GOT_UNKNOWN)
3742 abort ();
3743 else if (tls_type == GOT_NORMAL
3744 || tls_type == GOT_TLS_IE)
3745 /* Need a GOT slot. */
3746 s->size += 4;
3747
35c08157 3748 dyn = htab->root.dynamic_sections_created;
0e1862bb 3749 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
ce558b89 3750 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3751 }
3752 else
3753 h->got.offset = (bfd_vma) - 1;
3754
3755 if (eh->dyn_relocs == NULL)
3756 return TRUE;
3757
3758 /* In the shared -Bsymbolic case, discard space allocated for
3759 dynamic pc-relative relocs against symbols which turn out to be
3760 defined in regular objects. For the normal shared case, discard
3761 space for pc-relative relocs that have become local due to symbol
3762 visibility changes. */
3763
0e1862bb 3764 if (bfd_link_pic (info))
35c08157
KLC		 3765 {
3766 if (h->def_regular && (h->forced_local || info->symbolic))
3767 {
3bf083ed 3768 struct elf_dyn_relocs **pp;
35c08157
KLC		 3769
3770 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3771 {
3772 p->count -= p->pc_count;
3773 p->pc_count = 0;
3774 if (p->count == 0)
3775 *pp = p->next;
3776 else
3777 pp = &p->next;
3778 }
3779 }
3780 }
3781 else
3782 {
3783 /* For the non-shared case, discard space for relocs against
3784 symbols which turn out to need copy relocs or are not dynamic. */
3785
3786 if (!h->non_got_ref
3787 && ((h->def_dynamic
3788 && !h->def_regular)
3789 || (htab->root.dynamic_sections_created
3790 && (h->root.type == bfd_link_hash_undefweak
3791 || h->root.type == bfd_link_hash_undefined))))
3792 {
3793 /* Make sure this symbol is output as a dynamic symbol.
3794 Undefined weak syms won't yet be marked as dynamic. */
3795 if (h->dynindx == -1 && !h->forced_local)
3796 {
3797 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3798 return FALSE;
3799 }
3800
3801 /* If that succeeded, we know we'll be keeping all the
3802 relocs. */
3803 if (h->dynindx != -1)
3804 goto keep;
3805 }
3806
3807 eh->dyn_relocs = NULL;
3808
3809 keep:;
3810 }
3811
3812 /* Finally, allocate space. */
3813 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3814 {
3815 asection *sreloc = elf_section_data (p->sec)->sreloc;
3816 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3817 }
3818
3819 return TRUE;
3820}
3821
63c1f59d
AM		 3822/* Set DF_TEXTREL if we find any dynamic relocs that apply to
3823 read-only sections. */
35c08157
KLC		 3824
3825static bfd_boolean
63c1f59d 3826maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
35c08157 3827{
63c1f59d 3828 asection *sec;
35c08157 3829
63c1f59d
AM		 3830 if (h->root.type == bfd_link_hash_indirect)
3831 return TRUE;
35c08157 3832
63c1f59d
AM		 3833 sec = readonly_dynrelocs (h);
3834 if (sec != NULL)
35c08157 3835 {
63c1f59d 3836 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
35c08157 3837
63c1f59d
AM		 3838 info->flags |= DF_TEXTREL;
3839 info->callbacks->minfo
c1c8c1ef 3840 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
63c1f59d 3841 sec->owner, h->root.root.string, sec);
35c08157 3842
63c1f59d
AM		 3843 /* Not an error, just cut short the traversal. */
3844 return FALSE;
35c08157
KLC		 3845 }
3846 return TRUE;
3847}
3848
3849/* Set the sizes of the dynamic sections. */
3850
3851static bfd_boolean
3852nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3853 struct bfd_link_info *info)
3854{
3855 struct elf_nds32_link_hash_table *htab;
3856 bfd *dynobj;
3857 asection *s;
3858 bfd_boolean relocs;
3859 bfd *ibfd;
3860
3861 htab = nds32_elf_hash_table (info);
3862 dynobj = htab->root.dynobj;
3863 BFD_ASSERT (dynobj != NULL);
3864
3865 if (htab->root.dynamic_sections_created)
3866 {
3867 /* Set the contents of the .interp section to the interpreter. */
f5233a16 3868 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 3869 {
3870 s = bfd_get_section_by_name (dynobj, ".interp");
3871 BFD_ASSERT (s != NULL);
3872 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3873 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3874 }
3875 }
3876
3877 /* Set up .got offsets for local syms, and space for local dynamic
3878 relocs. */
c72f2fb2 3879 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3880 {
3881 bfd_signed_vma *local_got;
3882 bfd_signed_vma *end_local_got;
3883 bfd_size_type locsymcount;
3884 Elf_Internal_Shdr *symtab_hdr;
3885 asection *srel;
3886
3887 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3888 continue;
3889
3890 for (s = ibfd->sections; s != NULL; s = s->next)
3891 {
3bf083ed 3892 struct elf_dyn_relocs *p;
35c08157 3893
3bf083ed 3894 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 3895 elf_section_data (s)->local_dynrel);
3896 p != NULL; p = p->next)
3897 {
3898 if (!bfd_is_abs_section (p->sec)
3899 && bfd_is_abs_section (p->sec->output_section))
3900 {
3901 /* Input section has been discarded, either because
3902 it is a copy of a linkonce section or due to
3903 linker script /DISCARD/, so we'll be discarding
3904 the relocs too. */
3905 }
3906 else if (p->count != 0)
3907 {
3908 srel = elf_section_data (p->sec)->sreloc;
3909 srel->size += p->count * sizeof (Elf32_External_Rela);
3910 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3911 info->flags |= DF_TEXTREL;
3912 }
3913 }
3914 }
3915
3916 local_got = elf_local_got_refcounts (ibfd);
3917 if (!local_got)
3918 continue;
3919
3920 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3921 locsymcount = symtab_hdr->sh_info;
3922 end_local_got = local_got + locsymcount;
ce558b89
AM		 3923 s = htab->root.sgot;
3924 srel = htab->root.srelgot;
35c08157
KLC		 3925 for (; local_got < end_local_got; ++local_got)
3926 {
3927 if (*local_got > 0)
3928 {
3929 *local_got = s->size;
3930 s->size += 4;
0e1862bb 3931 if (bfd_link_pic (info))
35c08157
KLC		 3932 srel->size += sizeof (Elf32_External_Rela);
3933 }
3934 else
3935 *local_got = (bfd_vma) - 1;
3936 }
3937 }
3938
3939 /* Allocate global sym .plt and .got entries, and space for global
3940 sym dynamic relocs. */
3941 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3942
3943 /* We now have determined the sizes of the various dynamic sections.
3944 Allocate memory for them. */
3945 relocs = FALSE;
3946 for (s = dynobj->sections; s != NULL; s = s->next)
3947 {
3948 if ((s->flags & SEC_LINKER_CREATED) == 0)
3949 continue;
3950
ce558b89 3951 if (s == htab->root.splt)
35c08157
KLC		 3952 {
3953 /* Strip this section if we don't need it; see the
3954 comment below. */
3955 }
ce558b89 3956 else if (s == htab->root.sgot)
35c08157
KLC		 3957 {
3958 got_size += s->size;
3959 }
ce558b89 3960 else if (s == htab->root.sgotplt)
35c08157
KLC		 3961 {
3962 got_size += s->size;
3963 }
3964 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3965 {
ce558b89 3966 if (s->size != 0 && s != htab->root.srelplt)
35c08157
KLC		 3967 relocs = TRUE;
3968
3969 /* We use the reloc_count field as a counter if we need
3970 to copy relocs into the output file. */
3971 s->reloc_count = 0;
3972 }
3973 else
3974 {
3975 /* It's not one of our sections, so don't allocate space. */
3976 continue;
3977 }
3978
3979 if (s->size == 0)
3980 {
3981 /* If we don't need this section, strip it from the
3982 output file. This is mostly to handle .rela.bss and
3983 .rela.plt. We must create both sections in
3984 create_dynamic_sections, because they must be created
3985 before the linker maps input sections to output
3986 sections. The linker does that before
3987 adjust_dynamic_symbol is called, and it is that
3988 function which decides whether anything needs to go
3989 into these sections. */
3990 s->flags |= SEC_EXCLUDE;
3991 continue;
3992 }
3993
3994 /* Allocate memory for the section contents. We use bfd_zalloc
3995 here in case unused entries are not reclaimed before the
3996 section's contents are written out. This should not happen,
3997 but this way if it does, we get a R_NDS32_NONE reloc instead
3998 of garbage. */
3999 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4000 if (s->contents == NULL)
4001 return FALSE;
4002 }
4003
4004
4005 if (htab->root.dynamic_sections_created)
4006 {
4007 /* Add some entries to the .dynamic section. We fill in the
4008 values later, in nds32_elf_finish_dynamic_sections, but we
4009 must add the entries now so that we get the correct size for
4010 the .dynamic section. The DT_DEBUG entry is filled in by the
4011 dynamic linker and used by the debugger. */
4012#define add_dynamic_entry(TAG, VAL) \
4013 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4014
0e1862bb 4015 if (!bfd_link_pic (info))
35c08157
KLC		 4016 {
4017 if (!add_dynamic_entry (DT_DEBUG, 0))
4018 return FALSE;
4019 }
4020
ce558b89 4021 if (htab->root.splt->size != 0)
35c08157
KLC		 4022 {
4023 if (!add_dynamic_entry (DT_PLTGOT, 0)
4024 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4025 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4026 || !add_dynamic_entry (DT_JMPREL, 0))
4027 return FALSE;
4028 }
4029
4030 if (relocs)
4031 {
4032 if (!add_dynamic_entry (DT_RELA, 0)
4033 || !add_dynamic_entry (DT_RELASZ, 0)
4034 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4035 return FALSE;
4036
4037 /* If any dynamic relocs apply to a read-only section,
4038 then we need a DT_TEXTREL entry. */
4039 if ((info->flags & DF_TEXTREL) == 0)
63c1f59d 4040 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
35c08157
KLC		 4041 (void *) info);
4042
4043 if ((info->flags & DF_TEXTREL) != 0)
4044 {
4045 if (!add_dynamic_entry (DT_TEXTREL, 0))
4046 return FALSE;
4047 }
4048 }
4049 }
4050#undef add_dynamic_entry
4051
4052 return TRUE;
4053}
4054
4055static bfd_reloc_status_type
4056nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4057 bfd_vma relocation, bfd_byte *location)
4058{
4059 int size;
4060 bfd_vma x = 0;
4061 bfd_reloc_status_type flag;
4062 unsigned int rightshift = howto->rightshift;
4063 unsigned int bitpos = howto->bitpos;
4064
4065 /* If the size is negative, negate RELOCATION. This isn't very
4066 general. */
4067 if (howto->size < 0)
4068 relocation = -relocation;
4069
4070 /* Get the value we are going to relocate. */
4071 size = bfd_get_reloc_size (howto);
4072 switch (size)
4073 {
4074 default:
35c08157
KLC		 4075 abort ();
4076 break;
6346d5ca
AM		 4077 case 0:
4078 return bfd_reloc_ok;
35c08157
KLC		 4079 case 2:
4080 x = bfd_getb16 (location);
4081 break;
4082 case 4:
4083 x = bfd_getb32 (location);
4084 break;
4085 }
4086
4087 /* Check for overflow. FIXME: We may drop bits during the addition
4088 which we don't check for. We must either check at every single
4089 operation, which would be tedious, or we must do the computations
4090 in a type larger than bfd_vma, which would be inefficient. */
4091 flag = bfd_reloc_ok;
4092 if (howto->complain_on_overflow != complain_overflow_dont)
4093 {
4094 bfd_vma addrmask, fieldmask, signmask, ss;
4095 bfd_vma a, b, sum;
4096
4097 /* Get the values to be added together. For signed and unsigned
4098 relocations, we assume that all values should be truncated to
4099 the size of an address. For bitfields, all the bits matter.
4100 See also bfd_check_overflow. */
4101 fieldmask = N_ONES (howto->bitsize);
4102 signmask = ~fieldmask;
4103 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4104 a = (relocation & addrmask) >> rightshift;
4105 b = (x & howto->src_mask & addrmask) >> bitpos;
4106
4107 switch (howto->complain_on_overflow)
4108 {
4109 case complain_overflow_signed:
4110 /* If any sign bits are set, all sign bits must be set.
4111 That is, A must be a valid negative address after
4112 shifting. */
4113 signmask = ~(fieldmask >> 1);
4114 /* Fall through. */
4115
4116 case complain_overflow_bitfield:
4117 /* Much like the signed check, but for a field one bit
4118 wider. We allow a bitfield to represent numbers in the
4119 range -2**n to 2**n-1, where n is the number of bits in the
4120 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4121 can't overflow, which is exactly what we want. */
4122 ss = a & signmask;
4123 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4124 flag = bfd_reloc_overflow;
4125
4126 /* We only need this next bit of code if the sign bit of B
4127 is below the sign bit of A. This would only happen if
4128 SRC_MASK had fewer bits than BITSIZE. Note that if
4129 SRC_MASK has more bits than BITSIZE, we can get into
4130 trouble; we would need to verify that B is in range, as
4131 we do for A above. */
4132 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4133 ss >>= bitpos;
4134
4135 /* Set all the bits above the sign bit. */
4136 b = (b ^ ss) - ss;
4137
4138 /* Now we can do the addition. */
4139 sum = a + b;
4140
4141 /* See if the result has the correct sign. Bits above the
4142 sign bit are junk now; ignore them. If the sum is
4143 positive, make sure we did not have all negative inputs;
4144 if the sum is negative, make sure we did not have all
4145 positive inputs. The test below looks only at the sign
4146 bits, and it really just
4147 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4148
4149 We mask with addrmask here to explicitly allow an address
4150 wrap-around. The Linux kernel relies on it, and it is
4151 the only way to write assembler code which can run when
4152 loaded at a location 0x80000000 away from the location at
4153 which it is linked. */
4154 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4155 flag = bfd_reloc_overflow;
4156
4157 break;
4158
4159 case complain_overflow_unsigned:
4160 /* Checking for an unsigned overflow is relatively easy:
4161 trim the addresses and add, and trim the result as well.
4162 Overflow is normally indicated when the result does not
4163 fit in the field. However, we also need to consider the
4164 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4165 input is 0x80000000, and bfd_vma is only 32 bits; then we
4166 will get sum == 0, but there is an overflow, since the
4167 inputs did not fit in the field. Instead of doing a
4168 separate test, we can check for this by or-ing in the
4169 operands when testing for the sum overflowing its final
4170 field. */
4171 sum = (a + b) & addrmask;
4172 if ((a | b | sum) & signmask)
4173 flag = bfd_reloc_overflow;
4174 break;
4175
4176 default:
4177 abort ();
4178 }
4179 }
4180
4181 /* Put RELOCATION in the right bits. */
4182 relocation >>= (bfd_vma) rightshift;
4183 relocation <<= (bfd_vma) bitpos;
4184
4185 /* Add RELOCATION to the right bits of X. */
4186 /* FIXME : 090616
4187 Because the relaxation may generate duplicate relocation at one address,
4188 an addition to immediate in the instruction may cause the relocation added
4189 several times.
4190 This bug should be fixed in assembler, but a check is also needed here. */
4191 if (howto->partial_inplace)
4192 x = ((x & ~howto->dst_mask)
4193 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4194 else
4195 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4196
4197
4198 /* Put the relocated value back in the object file. */
4199 switch (size)
4200 {
4201 default:
4202 case 0:
4203 case 1:
4204 case 8:
4205 abort ();
4206 break;
4207 case 2:
4208 bfd_putb16 (x, location);
4209 break;
4210 case 4:
4211 bfd_putb32 (x, location);
4212 break;
4213 }
4214
4215 return flag;
4216}
4217
4218static bfd_reloc_status_type
4219nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4220 asection *input_section, bfd_byte *contents,
4221 bfd_vma address, bfd_vma value, bfd_vma addend)
4222{
4223 bfd_vma relocation;
4224
4225 /* Sanity check the address. */
4226 if (address > bfd_get_section_limit (input_bfd, input_section))
4227 return bfd_reloc_outofrange;
4228
4229 /* This function assumes that we are dealing with a basic relocation
4230 against a symbol. We want to compute the value of the symbol to
4231 relocate to. This is just VALUE, the value of the symbol, plus
4232 ADDEND, any addend associated with the reloc. */
4233 relocation = value + addend;
4234
4235 /* If the relocation is PC relative, we want to set RELOCATION to
4236 the distance between the symbol (currently in RELOCATION) and the
4237 location we are relocating. Some targets (e.g., i386-aout)
4238 arrange for the contents of the section to be the negative of the
4239 offset of the location within the section; for such targets
4240 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4241 simply leave the contents of the section as zero; for such
4242 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4243 need to subtract out the offset of the location within the
4244 section (which is just ADDRESS). */
4245 if (howto->pc_relative)
4246 {
4247 relocation -= (input_section->output_section->vma
4248 + input_section->output_offset);
4249 if (howto->pcrel_offset)
4250 relocation -= address;
4251 }
4252
4253 return nds32_relocate_contents (howto, input_bfd, relocation,
4254 contents + address);
4255}
4256
4257static bfd_boolean
4258nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4259 const char *name,
4260 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4261 asection *input_sec,
4262 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4263{
4264 const char *source;
4265 FILE *sym_ld_script = NULL;
4266 struct elf_nds32_link_hash_table *table;
4267
4268 table = nds32_elf_hash_table (info);
4269 sym_ld_script = table->sym_ld_script;
4270 if (!sym_ld_script)
4271 return TRUE;
4272
4273 if (!h || !name || *name == '\0')
4274 return TRUE;
4275
4276 if (input_sec->flags & SEC_EXCLUDE)
4277 return TRUE;
4278
4279 if (!check_start_export_sym)
4280 {
4281 fprintf (sym_ld_script, "SECTIONS\n{\n");
4282 check_start_export_sym = 1;
4283 }
4284
4285 if (h->root.type == bfd_link_hash_defined
4286 || h->root.type == bfd_link_hash_defweak)
4287 {
4288 if (!h->root.u.def.section->output_section)
4289 return TRUE;
4290
4291 if (bfd_is_const_section (input_sec))
4292 source = input_sec->name;
4293 else
4294 source = input_sec->owner->filename;
4295
4296 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4297 h->root.root.string,
4298 (long) (h->root.u.def.value
4299 + h->root.u.def.section->output_section->vma
4300 + h->root.u.def.section->output_offset), source);
4301 }
4302
4303 return TRUE;
4304}
4305
4306/* Relocate an NDS32/D ELF section.
4307 There is some attempt to make this function usable for many architectures,
4308 both for RELA and REL type relocs, if only to serve as a learning tool.
4309
4310 The RELOCATE_SECTION function is called by the new ELF backend linker
4311 to handle the relocations for a section.
4312
4313 The relocs are always passed as Rela structures; if the section
4314 actually uses Rel structures, the r_addend field will always be
4315 zero.
4316
4317 This function is responsible for adjust the section contents as
4318 necessary, and (if using Rela relocs and generating a
4319 relocatable output file) adjusting the reloc addend as
4320 necessary.
4321
4322 This function does not have to worry about setting the reloc
4323 address or the reloc symbol index.
4324
4325 LOCAL_SYMS is a pointer to the swapped in local symbols.
4326
4327 LOCAL_SECTIONS is an array giving the section in the input file
4328 corresponding to the st_shndx field of each local symbol.
4329
4330 The global hash table entry for the global symbols can be found
4331 via elf_sym_hashes (input_bfd).
4332
4333 When generating relocatable output, this function must handle
4334 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4335 going to be the section symbol corresponding to the output
4336 section, which means that the addend must be adjusted
4337 accordingly. */
4338
1c8f6a4d
KLC		 4339static bfd_vma
4340dtpoff_base (struct bfd_link_info *info)
4341{
4342 /* If tls_sec is NULL, we should have signalled an error already. */
4343 if (elf_hash_table (info)->tls_sec == NULL)
4344 return 0;
4345 return elf_hash_table (info)->tls_sec->vma;
4346}
4347
35c08157 4348static bfd_boolean
07d6d2b8 4349nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
35c08157 4350 struct bfd_link_info * info,
07d6d2b8
AM		 4351 bfd * input_bfd,
4352 asection * input_section,
4353 bfd_byte * contents,
4354 Elf_Internal_Rela * relocs,
4355 Elf_Internal_Sym * local_syms,
4356 asection ** local_sections)
35c08157
KLC		 4357{
4358 Elf_Internal_Shdr *symtab_hdr;
4359 struct elf_link_hash_entry **sym_hashes;
4360 Elf_Internal_Rela *rel, *relend;
4361 bfd_boolean ret = TRUE; /* Assume success. */
4362 int align = 0;
4363 bfd_reloc_status_type r;
4364 const char *errmsg = NULL;
4365 bfd_vma gp;
4366 struct elf_nds32_link_hash_table *htab;
4367 bfd *dynobj;
4368 bfd_vma *local_got_offsets;
4369 asection *sgot, *splt, *sreloc;
4370 bfd_vma high_address;
4371 struct elf_nds32_link_hash_table *table;
4372 int eliminate_gc_relocs;
4373 bfd_vma fpbase_addr;
4374
4375 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4376 sym_hashes = elf_sym_hashes (input_bfd);
4377 htab = nds32_elf_hash_table (info);
4378 high_address = bfd_get_section_limit (input_bfd, input_section);
4379
4380 dynobj = htab->root.dynobj;
4381 local_got_offsets = elf_local_got_offsets (input_bfd);
4382
ce558b89
AM		 4383 sgot = htab->root.sgot;
4384 splt = htab->root.splt;
35c08157
KLC		 4385 sreloc = NULL;
4386
4387 rel = relocs;
4388 relend = relocs + input_section->reloc_count;
4389
4390 table = nds32_elf_hash_table (info);
4391 eliminate_gc_relocs = table->eliminate_gc_relocs;
4392 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4393 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4394 {
4395 is_SDA_BASE_set = 1;
4396 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4397 if (r != bfd_reloc_ok)
4398 return FALSE;
4399 }
4400
4401 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4402 the fp value is set as gp, and it has be reverted for instruction
4403 setting fp. */
4404 fpbase_addr = elf_gp (output_bfd);
4405
4406 for (rel = relocs; rel < relend; rel++)
4407 {
4408 enum elf_nds32_reloc_type r_type;
4409 reloc_howto_type *howto = NULL;
4410 unsigned long r_symndx;
4411 struct elf_link_hash_entry *h = NULL;
4412 Elf_Internal_Sym *sym = NULL;
4413 asection *sec;
4414 bfd_vma relocation;
4415
4416 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4417 ensure it's zero (we use REL relocs, not RELA). Therefore this
4418 should be assigning zero to `addend', but for clarity we use
4419 `r_addend'. */
4420
4421 bfd_vma addend = rel->r_addend;
4422 bfd_vma offset = rel->r_offset;
4423
4424 r_type = ELF32_R_TYPE (rel->r_info);
4425 if (r_type >= R_NDS32_max)
4426 {
695344c0 4427 /* xgettext:c-format */
0aa13fee 4428 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 4429 input_bfd, r_type);
35c08157
KLC		 4430 bfd_set_error (bfd_error_bad_value);
4431 ret = FALSE;
4432 continue;
4433 }
4434
4435 if (r_type == R_NDS32_GNU_VTENTRY
4436 || r_type == R_NDS32_GNU_VTINHERIT
4437 || r_type == R_NDS32_NONE
4438 || r_type == R_NDS32_RELA_GNU_VTENTRY
4439 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4440 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4441 || r_type == R_NDS32_DATA
1c8f6a4d 4442 || r_type == R_NDS32_TRAN
0c4bd9d9 4443 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4444 continue;
4445
0c4bd9d9
KLC		 4446 /* If we enter the fp-as-gp region. Resolve the address
4447 of best fp-base. */
35c08157
KLC		 4448 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4449 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4450 {
4451 int dist;
4452
4453 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4454 dist = rel->r_addend >> 16;
4455 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4456 local_syms, symtab_hdr);
4457 }
4458 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4459 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4460 {
4461 fpbase_addr = elf_gp (output_bfd);
4462 }
4463
4464 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4465 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4466 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC		 4467 continue;
4468
4469 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4470 r_symndx = ELF32_R_SYM (rel->r_info);
4471
4472 /* This is a final link. */
4473 sym = NULL;
4474 sec = NULL;
4475 h = NULL;
4476
4477 if (r_symndx < symtab_hdr->sh_info)
4478 {
4479 /* Local symbol. */
4480 sym = local_syms + r_symndx;
4481 sec = local_sections[r_symndx];
4482
4483 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4484 addend = rel->r_addend;
4485 }
4486 else
4487 {
4488 /* External symbol. */
4489 bfd_boolean warned, ignored, unresolved_reloc;
4490 int symndx = r_symndx - symtab_hdr->sh_info;
4491
4492 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4493 r_symndx, symtab_hdr, sym_hashes, h, sec,
4494 relocation, unresolved_reloc, warned,
4495 ignored);
4496
4497 /* la $fp, _FP_BASE_ is per-function (region).
4498 Handle it specially. */
4499 switch ((int) r_type)
4500 {
4501 case R_NDS32_SDA19S0_RELA:
4502 case R_NDS32_SDA15S0_RELA:
4503 case R_NDS32_20_RELA:
4504 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4505 FP_BASE_NAME) == 0)
4506 {
4507 relocation = fpbase_addr;
4508 break;
4509 }
4510 }
4511
4512 }
4513
0e1862bb 4514 if (bfd_link_relocatable (info))
35c08157
KLC		 4515 {
4516 /* This is a relocatable link. We don't have to change
4517 anything, unless the reloc is against a section symbol,
4518 in which case we have to adjust according to where the
4519 section symbol winds up in the output section. */
4520 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4521 rel->r_addend += sec->output_offset + sym->st_value;
4522
4523 continue;
4524 }
4525
4526 /* Sanity check the address. */
4527 if (offset > high_address)
4528 {
4529 r = bfd_reloc_outofrange;
4530 goto check_reloc;
4531 }
4532
4533 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4534 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4535 || r_type >= R_NDS32_RELAX_ENTRY)
4536 continue;
4537
4538 switch ((int) r_type)
4539 {
4540 case R_NDS32_GOTOFF:
4541 /* Relocation is relative to the start of the global offset
4542 table (for ld24 rx, #uimm24), e.g. access at label+addend
4543
4544 ld24 rx. #label@GOTOFF + addend
4545 sub rx, r12. */
4546 case R_NDS32_GOTOFF_HI20:
4547 case R_NDS32_GOTOFF_LO12:
4548 case R_NDS32_GOTOFF_LO15:
4549 case R_NDS32_GOTOFF_LO19:
4550 BFD_ASSERT (sgot != NULL);
4551
4552 relocation -= elf_gp (output_bfd);
4553 break;
4554
4555 case R_NDS32_9_PLTREL:
4556 case R_NDS32_25_PLTREL:
4557 /* Relocation is to the entry for this symbol in the
4558 procedure linkage table. */
4559
4560 /* The native assembler will generate a 25_PLTREL reloc
4561 for a local symbol if you assemble a call from one
4562 section to another when using -K pic. */
4563 if (h == NULL)
4564 break;
4565
4566 if (h->forced_local)
4567 break;
4568
4569 /* We didn't make a PLT entry for this symbol. This
4570 happens when statically linking PIC code, or when
4571 using -Bsymbolic. */
4572 if (h->plt.offset == (bfd_vma) - 1)
4573 break;
4574
4575 relocation = (splt->output_section->vma
4576 + splt->output_offset + h->plt.offset);
4577 break;
4578
4579 case R_NDS32_PLT_GOTREL_HI20:
4580 case R_NDS32_PLT_GOTREL_LO12:
4581 case R_NDS32_PLT_GOTREL_LO15:
4582 case R_NDS32_PLT_GOTREL_LO19:
4583 case R_NDS32_PLT_GOTREL_LO20:
4584 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4585 {
4586 /* We didn't make a PLT entry for this symbol. This
4587 happens when statically linking PIC code, or when
4588 using -Bsymbolic. */
4589 relocation -= elf_gp (output_bfd);
4590 break;
4591 }
4592
4593 relocation = (splt->output_section->vma
4594 + splt->output_offset + h->plt.offset);
4595
4596 relocation -= elf_gp (output_bfd);
4597 break;
4598
4599 case R_NDS32_PLTREL_HI20:
4600 case R_NDS32_PLTREL_LO12:
4601
4602 /* Relocation is to the entry for this symbol in the
4603 procedure linkage table. */
4604
4605 /* The native assembler will generate a 25_PLTREL reloc
4606 for a local symbol if you assemble a call from one
4607 section to another when using -K pic. */
4608 if (h == NULL)
4609 break;
4610
4611 if (h->forced_local)
4612 break;
4613
4614 if (h->plt.offset == (bfd_vma) - 1)
4615 /* We didn't make a PLT entry for this symbol. This
4616 happens when statically linking PIC code, or when
4617 using -Bsymbolic. */
4618 break;
4619
4620 if (splt == NULL)
4621 break;
4622
4623 relocation = (splt->output_section->vma
4624 + splt->output_offset
4625 + h->plt.offset + 4)
4626 - (input_section->output_section->vma
4627 + input_section->output_offset
4628 + rel->r_offset);
4629
4630 break;
4631
4632 case R_NDS32_GOTPC20:
4633 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4634 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4635 relocation = elf_gp (output_bfd);
4636 break;
4637
4638 case R_NDS32_GOTPC_HI20:
4639 case R_NDS32_GOTPC_LO12:
4640 {
4641 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4642 bl .+4
4643 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4644 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4645 or
4646 bl .+4
4647 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4648 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4649 */
4650 relocation = elf_gp (output_bfd);
4651 relocation -= (input_section->output_section->vma
4652 + input_section->output_offset + rel->r_offset);
4653 break;
4654 }
4655
4656 case R_NDS32_GOT20:
4657 /* Fall through. */
4658 case R_NDS32_GOT_HI20:
4659 case R_NDS32_GOT_LO12:
4660 case R_NDS32_GOT_LO15:
4661 case R_NDS32_GOT_LO19:
4662 /* Relocation is to the entry for this symbol in the global
4663 offset table. */
4664 BFD_ASSERT (sgot != NULL);
4665
4666 if (h != NULL)
4667 {
4668 bfd_boolean dyn;
4669 bfd_vma off;
4670
4671 off = h->got.offset;
4672 BFD_ASSERT (off != (bfd_vma) - 1);
4673 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 4674 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4675 bfd_link_pic (info),
4676 h)
4677 || (bfd_link_pic (info)
35c08157
KLC		 4678 && (info->symbolic
4679 || h->dynindx == -1
4680 || h->forced_local) && h->def_regular))
4681 {
4682 /* This is actually a static link, or it is a
4683 -Bsymbolic link and the symbol is defined
4684 locally, or the symbol was forced to be local
4685 because of a version file. We must initialize
4686 this entry in the global offset table. Since the
4687 offset must always be a multiple of 4, we use the
4688 least significant bit to record whether we have
4689 initialized it already.
4690
4691 When doing a dynamic link, we create a .rela.got
4692 relocation entry to initialize the value. This
4693 is done in the finish_dynamic_symbol routine. */
4694 if ((off & 1) != 0)
4695 off &= ~1;
4696 else
4697 {
4698 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4699 h->got.offset |= 1;
4700 }
4701 }
4702 relocation = sgot->output_section->vma + sgot->output_offset + off
4703 - elf_gp (output_bfd);
4704 }
4705 else
4706 {
4707 bfd_vma off;
4708 bfd_byte *loc;
4709
4710 BFD_ASSERT (local_got_offsets != NULL
4711 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4712
4713 off = local_got_offsets[r_symndx];
4714
4715 /* The offset must always be a multiple of 4. We use
4716 the least significant bit to record whether we have
4717 already processed this entry. */
4718 if ((off & 1) != 0)
4719 off &= ~1;
4720 else
4721 {
4722 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4723
0e1862bb 4724 if (bfd_link_pic (info))
35c08157
KLC		 4725 {
4726 asection *srelgot;
4727 Elf_Internal_Rela outrel;
4728
4729 /* We need to generate a R_NDS32_RELATIVE reloc
4730 for the dynamic linker. */
ce558b89 4731 srelgot = htab->root.srelgot;
35c08157
KLC		 4732 BFD_ASSERT (srelgot != NULL);
4733
4734 outrel.r_offset = (elf_gp (output_bfd)
4735 + sgot->output_offset + off);
4736 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4737 outrel.r_addend = relocation;
4738 loc = srelgot->contents;
4739 loc +=
4740 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4741 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4742 ++srelgot->reloc_count;
4743 }
4744 local_got_offsets[r_symndx] |= 1;
4745 }
4746 relocation = sgot->output_section->vma + sgot->output_offset + off
4747 - elf_gp (output_bfd);
4748 }
4749
4750 break;
4751
4752 case R_NDS32_16_RELA:
4753 case R_NDS32_20_RELA:
4754 case R_NDS32_5_RELA:
4755 case R_NDS32_32_RELA:
4756 case R_NDS32_9_PCREL_RELA:
4757 case R_NDS32_WORD_9_PCREL_RELA:
4758 case R_NDS32_10_UPCREL_RELA:
4759 case R_NDS32_15_PCREL_RELA:
4760 case R_NDS32_17_PCREL_RELA:
4761 case R_NDS32_25_PCREL_RELA:
4762 case R_NDS32_HI20_RELA:
4763 case R_NDS32_LO12S3_RELA:
4764 case R_NDS32_LO12S2_RELA:
4765 case R_NDS32_LO12S2_DP_RELA:
4766 case R_NDS32_LO12S2_SP_RELA:
4767 case R_NDS32_LO12S1_RELA:
4768 case R_NDS32_LO12S0_RELA:
4769 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4770 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 4771 && (input_section->flags & SEC_ALLOC) != 0
4772 && (eliminate_gc_relocs == 0
4773 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4774 && ((r_type != R_NDS32_9_PCREL_RELA
4775 && r_type != R_NDS32_WORD_9_PCREL_RELA
4776 && r_type != R_NDS32_10_UPCREL_RELA
4777 && r_type != R_NDS32_15_PCREL_RELA
4778 && r_type != R_NDS32_17_PCREL_RELA
4779 && r_type != R_NDS32_25_PCREL_RELA
4780 && !(r_type == R_NDS32_32_RELA
4781 && strcmp (input_section->name, ".eh_frame") == 0))
4782 || (h != NULL && h->dynindx != -1
4783 && (!info->symbolic || !h->def_regular))))
4784 {
4785 Elf_Internal_Rela outrel;
4786 bfd_boolean skip, relocate;
4787 bfd_byte *loc;
4788
4789 /* When generating a shared object, these relocations
4790 are copied into the output file to be resolved at run
4791 time. */
4792
4793 if (sreloc == NULL)
4794 {
4795 const char *name;
4796
4797 name = bfd_elf_string_from_elf_section
4798 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4799 elf_section_data (input_section)->rela.hdr->sh_name);
4800 if (name == NULL)
4801 return FALSE;
4802
4803 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4804 && strcmp (bfd_get_section_name (input_bfd,
4805 input_section),
4806 name + 5) == 0);
4807
4808 sreloc = bfd_get_section_by_name (dynobj, name);
4809 BFD_ASSERT (sreloc != NULL);
4810 }
4811
4812 skip = FALSE;
4813 relocate = FALSE;
4814
4815 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4816 info,
4817 input_section,
4818 rel->r_offset);
4819 if (outrel.r_offset == (bfd_vma) - 1)
4820 skip = TRUE;
4821 else if (outrel.r_offset == (bfd_vma) - 2)
4822 skip = TRUE, relocate = TRUE;
4823 outrel.r_offset += (input_section->output_section->vma
4824 + input_section->output_offset);
4825
4826 if (skip)
4827 memset (&outrel, 0, sizeof outrel);
4828 else if (r_type == R_NDS32_17_PCREL_RELA
4829 || r_type == R_NDS32_15_PCREL_RELA
4830 || r_type == R_NDS32_25_PCREL_RELA)
4831 {
4832 BFD_ASSERT (h != NULL && h->dynindx != -1);
4833 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4834 outrel.r_addend = rel->r_addend;
4835 }
4836 else
4837 {
4838 /* h->dynindx may be -1 if this symbol was marked to
4839 become local. */
4840 if (h == NULL
4841 || ((info->symbolic || h->dynindx == -1)
4842 && h->def_regular))
4843 {
4844 relocate = TRUE;
4845 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4846 outrel.r_addend = relocation + rel->r_addend;
4847 }
4848 else
4849 {
4850 BFD_ASSERT (h->dynindx != -1);
4851 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4852 outrel.r_addend = rel->r_addend;
4853 }
4854 }
4855
4856 loc = sreloc->contents;
4857 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4858 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4859 ++sreloc->reloc_count;
4860
4861 /* If this reloc is against an external symbol, we do
4862 not want to fiddle with the addend. Otherwise, we
4863 need to include the symbol value so that it becomes
4864 an addend for the dynamic reloc. */
4865 if (!relocate)
4866 continue;
4867 }
4868 break;
4869
4870 case R_NDS32_25_ABS_RELA:
0e1862bb 4871 if (bfd_link_pic (info))
35c08157 4872 {
4eca0228 4873 _bfd_error_handler
38f14ab8
AM		 4874 (_("%pB: warning: %s unsupported in shared mode"),
4875 input_bfd, "R_NDS32_25_ABS_RELA");
35c08157
KLC		 4876 return FALSE;
4877 }
4878 break;
4879
4880 case R_NDS32_9_PCREL:
4881 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4882 contents, offset,
4883 sec, relocation, addend);
4884 goto check_reloc;
4885
4886 case R_NDS32_HI20:
4887 {
4888 Elf_Internal_Rela *lorel;
4889
4890 /* We allow an arbitrary number of HI20 relocs before the
4891 LO12 reloc. This permits gcc to emit the HI and LO relocs
4892 itself. */
4893 for (lorel = rel + 1;
4894 (lorel < relend
4895 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4896 continue;
4897 if (lorel < relend
4898 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4899 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4900 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4901 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4902 {
4903 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4904 contents, relocation + addend);
4905 r = bfd_reloc_ok;
4906 }
4907 else
4908 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 4909 contents, offset, relocation,
4910 addend);
35c08157
KLC		 4911 }
4912
4913 goto check_reloc;
4914
4915 case R_NDS32_GOT17S2_RELA:
4916 case R_NDS32_GOT15S2_RELA:
4917 {
4918 bfd_vma off;
4919
4920 BFD_ASSERT (sgot != NULL);
4921
4922 if (h != NULL)
4923 {
4924 bfd_boolean dyn;
4925
4926 off = h->got.offset;
4927 BFD_ASSERT (off != (bfd_vma) - 1);
4928
4929 dyn = htab->root.dynamic_sections_created;
4930 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L		 4931 (dyn, bfd_link_pic (info), h)
4932 || (bfd_link_pic (info)
4933 && (info->symbolic
4934 || h->dynindx == -1
4935 || h->forced_local)
4936 && h->def_regular))
35c08157
KLC		 4937 {
4938 /* This is actually a static link, or it is a
4939 -Bsymbolic link and the symbol is defined
4940 locally, or the symbol was forced to be local
4941 because of a version file. We must initialize
4942 this entry in the global offset table. Since the
4943 offset must always be a multiple of 4, we use the
4944 least significant bit to record whether we have
4945 initialized it already.
4946
4947 When doing a dynamic link, we create a .rela.got
4948 relocation entry to initialize the value. This
4949 is done in the finish_dynamic_symbol routine. */
4950 if ((off & 1) != 0)
4951 off &= ~1;
4952 else
4953 {
4954 bfd_put_32 (output_bfd, relocation,
4955 sgot->contents + off);
4956 h->got.offset |= 1;
4957 }
4958 }
4959 }
4960 else
4961 {
4962 bfd_byte *loc;
4963
4964 BFD_ASSERT (local_got_offsets != NULL
4965 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4966
4967 off = local_got_offsets[r_symndx];
4968
4969 /* The offset must always be a multiple of 4. We use
4970 the least significant bit to record whether we have
4971 already processed this entry. */
4972 if ((off & 1) != 0)
4973 off &= ~1;
4974 else
4975 {
4976 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4977
0e1862bb 4978 if (bfd_link_pic (info))
35c08157
KLC		 4979 {
4980 asection *srelgot;
4981 Elf_Internal_Rela outrel;
4982
4983 /* We need to generate a R_NDS32_RELATIVE reloc
4984 for the dynamic linker. */
ce558b89 4985 srelgot = htab->root.srelgot;
35c08157
KLC		 4986 BFD_ASSERT (srelgot != NULL);
4987
4988 outrel.r_offset = (elf_gp (output_bfd)
4989 + sgot->output_offset + off);
4990 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4991 outrel.r_addend = relocation;
4992 loc = srelgot->contents;
4993 loc +=
4994 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4995 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4996 ++srelgot->reloc_count;
4997 }
4998 local_got_offsets[r_symndx] |= 1;
4999 }
5000 }
5001 relocation = sgot->output_section->vma + sgot->output_offset + off
5002 - elf_gp (output_bfd);
5003 }
5004 if (relocation & align)
5005 {
5006 /* Incorrect alignment. */
4eca0228 5007 _bfd_error_handler
38f14ab8 5008 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
35c08157
KLC		 5009 ret = FALSE;
5010 r = bfd_reloc_dangerous;
5011 goto check_reloc;
5012 }
5013 break;
5014
5015 case R_NDS32_SDA16S3_RELA:
5016 case R_NDS32_SDA15S3_RELA:
5017 case R_NDS32_SDA15S3:
5018 align = 0x7;
5019 goto handle_sda;
5020
5021 case R_NDS32_SDA17S2_RELA:
5022 case R_NDS32_SDA15S2_RELA:
5023 case R_NDS32_SDA12S2_SP_RELA:
5024 case R_NDS32_SDA12S2_DP_RELA:
5025 case R_NDS32_SDA15S2:
5026 case R_NDS32_SDA_FP7U2_RELA:
5027 align = 0x3;
5028 goto handle_sda;
5029
5030 case R_NDS32_SDA18S1_RELA:
5031 case R_NDS32_SDA15S1_RELA:
5032 case R_NDS32_SDA15S1:
5033 align = 0x1;
5034 goto handle_sda;
5035
5036 case R_NDS32_SDA19S0_RELA:
5037 case R_NDS32_SDA15S0_RELA:
5038 case R_NDS32_SDA15S0:
5039 {
5040 align = 0x0;
5041handle_sda:
5042 BFD_ASSERT (sec != NULL);
5043
5044 /* If the symbol is in the abs section, the out_bfd will be null.
5045 This happens when the relocation has a symbol@GOTOFF. */
5046 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5047 if (r != bfd_reloc_ok)
5048 {
4eca0228 5049 _bfd_error_handler
38f14ab8 5050 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
35c08157
KLC		 5051 ret = FALSE;
5052 goto check_reloc;
5053 }
5054
5055 /* At this point `relocation' contains the object's
5056 address. */
5057 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5058 {
5059 relocation -= fpbase_addr;
5060 }
5061 else
5062 relocation -= gp;
5063 /* Now it contains the offset from _SDA_BASE_. */
5064
5065 /* Make sure alignment is correct. */
5066
5067 if (relocation & align)
5068 {
5069 /* Incorrect alignment. */
4eca0228 5070 _bfd_error_handler
695344c0 5071 /* xgettext:c-format */
38f14ab8
AM		 5072 (_("%pB(%pA): warning: unaligned small data access"
5073 " of type %d"),
35c08157
KLC		 5074 input_bfd, input_section, r_type);
5075 ret = FALSE;
5076 goto check_reloc;
5077 }
5078 }
5079
5080 break;
5081 case R_NDS32_17IFC_PCREL_RELA:
5082 case R_NDS32_10IFCU_PCREL_RELA:
5083 /* do nothing */
5084 break;
5085
1c8f6a4d
KLC		 5086 case R_NDS32_TLS_LE_HI20:
5087 case R_NDS32_TLS_LE_LO12:
5088 case R_NDS32_TLS_LE_20:
5089 case R_NDS32_TLS_LE_15S0:
5090 case R_NDS32_TLS_LE_15S1:
5091 case R_NDS32_TLS_LE_15S2:
5092 if (elf_hash_table (info)->tls_sec != NULL)
5093 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5094 break;
5095 case R_NDS32_TLS_IE_HI20:
5096 case R_NDS32_TLS_IE_LO12S2:
5097 {
5098 /* Relocation is to the entry for this symbol in the global
5099 offset table. */
5100 unsigned int tls_type;
5101 asection *srelgot;
5102 Elf_Internal_Rela outrel;
5103 bfd_vma off;
5104 bfd_byte *loc;
5105 int indx = 0;
5106
5107 BFD_ASSERT (sgot != NULL);
5108 if (h != NULL)
5109 {
5110 bfd_boolean dyn;
5111
5112 off = h->got.offset;
5113 BFD_ASSERT (off != (bfd_vma) - 1);
5114 dyn = htab->root.dynamic_sections_created;
5115 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5116 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5117 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5118 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5119 indx = h->dynindx;
5120 }
5121 else
5122 {
5123 /* Never happen currently. */
5124 BFD_ASSERT (local_got_offsets != NULL
5125 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5126
5127 off = local_got_offsets[r_symndx];
5128
5129 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5130 }
5131 relocation = sgot->output_section->vma + sgot->output_offset + off;
5132
5133 if (r_type == R_NDS32_TLS_IE_LO12S2)
5134 break;
5135
5136 /* The offset must always be a multiple of 4. We use
5137 the least significant bit to record whether we have
5138 already processed this entry. */
5139 if ((off & 1) != 0)
5140 off &= ~1;
5141 else
5142 {
5143 bfd_boolean need_relocs = FALSE;
ce558b89 5144 srelgot = htab->root.srelgot;
0e1862bb 5145 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC		 5146 && (h == NULL
5147 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5148 || h->root.type != bfd_link_hash_undefweak))
5149 {
5150 need_relocs = TRUE;
5151 BFD_ASSERT (srelgot != NULL);
5152 }
5153 if (tls_type & GOT_TLS_IE)
5154 {
5155 if (need_relocs)
5156 {
5157 if (h->dynindx == 0)
5158 outrel.r_addend = relocation - dtpoff_base (info);
5159 else
5160 outrel.r_addend = 0;
5161 outrel.r_offset = (sgot->output_section->vma
5162 + sgot->output_offset
5163 + off);
5164 outrel.r_info =
5165 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5166
5167 loc = srelgot->contents;
5168 loc +=
5169 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5170 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5171 ++srelgot->reloc_count;
5172 }
5173 else
5174 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5175 sgot->contents + off);
5176 }
5177 }
5178 }
5179 break;
5180
35c08157
KLC		 5181 /* DON'T fall through. */
5182
5183 default:
5184 /* OLD_NDS32_RELOC. */
5185
5186 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5187 contents, offset, relocation, addend);
5188 goto check_reloc;
5189 }
5190
5191 switch ((int) r_type)
5192 {
5193 case R_NDS32_20_RELA:
5194 case R_NDS32_5_RELA:
5195 case R_NDS32_9_PCREL_RELA:
5196 case R_NDS32_WORD_9_PCREL_RELA:
5197 case R_NDS32_10_UPCREL_RELA:
5198 case R_NDS32_15_PCREL_RELA:
5199 case R_NDS32_17_PCREL_RELA:
5200 case R_NDS32_25_PCREL_RELA:
5201 case R_NDS32_25_ABS_RELA:
5202 case R_NDS32_HI20_RELA:
5203 case R_NDS32_LO12S3_RELA:
5204 case R_NDS32_LO12S2_RELA:
5205 case R_NDS32_LO12S2_DP_RELA:
5206 case R_NDS32_LO12S2_SP_RELA:
5207 case R_NDS32_LO12S1_RELA:
5208 case R_NDS32_LO12S0_RELA:
5209 case R_NDS32_LO12S0_ORI_RELA:
5210 case R_NDS32_SDA16S3_RELA:
5211 case R_NDS32_SDA17S2_RELA:
5212 case R_NDS32_SDA18S1_RELA:
5213 case R_NDS32_SDA19S0_RELA:
5214 case R_NDS32_SDA15S3_RELA:
5215 case R_NDS32_SDA15S2_RELA:
5216 case R_NDS32_SDA12S2_DP_RELA:
5217 case R_NDS32_SDA12S2_SP_RELA:
5218 case R_NDS32_SDA15S1_RELA:
5219 case R_NDS32_SDA15S0_RELA:
5220 case R_NDS32_SDA_FP7U2_RELA:
5221 case R_NDS32_9_PLTREL:
5222 case R_NDS32_25_PLTREL:
5223 case R_NDS32_GOT20:
5224 case R_NDS32_GOT_HI20:
5225 case R_NDS32_GOT_LO12:
5226 case R_NDS32_GOT_LO15:
5227 case R_NDS32_GOT_LO19:
5228 case R_NDS32_GOT15S2_RELA:
5229 case R_NDS32_GOT17S2_RELA:
5230 case R_NDS32_GOTPC20:
5231 case R_NDS32_GOTPC_HI20:
5232 case R_NDS32_GOTPC_LO12:
5233 case R_NDS32_GOTOFF:
5234 case R_NDS32_GOTOFF_HI20:
5235 case R_NDS32_GOTOFF_LO12:
5236 case R_NDS32_GOTOFF_LO15:
5237 case R_NDS32_GOTOFF_LO19:
5238 case R_NDS32_PLTREL_HI20:
5239 case R_NDS32_PLTREL_LO12:
5240 case R_NDS32_PLT_GOTREL_HI20:
5241 case R_NDS32_PLT_GOTREL_LO12:
5242 case R_NDS32_PLT_GOTREL_LO15:
5243 case R_NDS32_PLT_GOTREL_LO19:
5244 case R_NDS32_PLT_GOTREL_LO20:
5245 case R_NDS32_17IFC_PCREL_RELA:
5246 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5247 case R_NDS32_TLS_LE_HI20:
5248 case R_NDS32_TLS_LE_LO12:
5249 case R_NDS32_TLS_IE_HI20:
5250 case R_NDS32_TLS_IE_LO12S2:
5251 case R_NDS32_TLS_LE_20:
5252 case R_NDS32_TLS_LE_15S0:
5253 case R_NDS32_TLS_LE_15S1:
5254 case R_NDS32_TLS_LE_15S2:
35c08157 5255 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5256 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5257 r = nds32_elf_final_link_relocate (howto, input_bfd,
5258 input_section, contents,
5259 rel->r_offset, relocation,
5260 rel->r_addend);
5261 break;
5262
5263 default:
5264 /* All other relocs can use default handler. */
5265 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5266 contents, rel->r_offset,
5267 relocation, rel->r_addend);
5268 break;
5269 }
5270
5271check_reloc:
5272
5273 if (r != bfd_reloc_ok)
5274 {
5275 /* FIXME: This should be generic enough to go in a utility. */
5276 const char *name;
5277
5278 if (h != NULL)
5279 name = h->root.root.string;
5280 else
5281 {
5282 name = bfd_elf_string_from_elf_section
5283 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5284 if (name == NULL || *name == '\0')
5285 name = bfd_section_name (input_bfd, sec);
5286 }
5287
5288 if (errmsg != NULL)
5289 goto common_error;
5290
5291 switch (r)
5292 {
5293 case bfd_reloc_overflow:
1a72702b
AM		 5294 (*info->callbacks->reloc_overflow)
5295 (info, (h ? &h->root : NULL), name, howto->name,
5296 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 5297 break;
5298
5299 case bfd_reloc_undefined:
1a72702b
AM		 5300 (*info->callbacks->undefined_symbol)
5301 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC		 5302 break;
5303
5304 case bfd_reloc_outofrange:
5305 errmsg = _("internal error: out of range error");
5306 goto common_error;
5307
5308 case bfd_reloc_notsupported:
5309 errmsg = _("internal error: unsupported relocation error");
5310 goto common_error;
5311
5312 case bfd_reloc_dangerous:
5313 errmsg = _("internal error: dangerous error");
5314 goto common_error;
5315
5316 default:
5317 errmsg = _("internal error: unknown error");
5318 /* Fall through. */
5319
1a72702b
AM		 5320 common_error:
5321 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5322 input_section, offset);
35c08157
KLC		 5323 break;
5324 }
5325 }
5326 }
5327
5328 return ret;
5329}
5330
5331/* Finish up dynamic symbol handling. We set the contents of various
5332 dynamic sections here. */
5333
5334static bfd_boolean
5335nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5336 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5337{
5338 struct elf_nds32_link_hash_table *htab;
5339 bfd_byte *loc;
5340
5341 htab = nds32_elf_hash_table (info);
5342
5343 if (h->plt.offset != (bfd_vma) - 1)
5344 {
5345 asection *splt;
5346 asection *sgot;
5347 asection *srela;
5348
5349 bfd_vma plt_index;
5350 bfd_vma got_offset;
5351 bfd_vma local_plt_offset;
5352 Elf_Internal_Rela rela;
5353
5354 /* This symbol has an entry in the procedure linkage table. Set
5355 it up. */
5356
5357 BFD_ASSERT (h->dynindx != -1);
5358
ce558b89
AM		 5359 splt = htab->root.splt;
5360 sgot = htab->root.sgotplt;
5361 srela = htab->root.srelplt;
35c08157
KLC		 5362 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5363
5364 /* Get the index in the procedure linkage table which
5365 corresponds to this symbol. This is the index of this symbol
5366 in all the symbols for which we are making plt entries. The
5367 first entry in the procedure linkage table is reserved. */
5368 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5369
5370 /* Get the offset into the .got table of the entry that
5371 corresponds to this function. Each .got entry is 4 bytes.
5372 The first three are reserved. */
5373 got_offset = (plt_index + 3) * 4;
5374
5375 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5376 if (!bfd_link_pic (info))
35c08157
KLC		 5377 {
5378 unsigned long insn;
5379
5380 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5381 + sgot->output_offset + got_offset) >> 12)
5382 & 0xfffff);
5383 bfd_putb32 (insn, splt->contents + h->plt.offset);
5384
5385 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5386 + sgot->output_offset + got_offset) & 0x0fff)
5387 >> 2);
5388 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5389
5390 insn = PLT_ENTRY_WORD2;
5391 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5392
5393 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5394 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5395
5396 insn = PLT_ENTRY_WORD4
5397 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5398 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5399 local_plt_offset = 12;
5400 }
5401 else
5402 {
5403 /* sda_base must be set at this time. */
5404 unsigned long insn;
5405 long offset;
5406
5407 /* FIXME, sda_base is 65536, it will damage opcode. */
5408 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5409 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5410 - elf_gp (output_bfd);
5411 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5412 bfd_putb32 (insn, splt->contents + h->plt.offset);
5413
5414 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5415 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5416
5417 insn = PLT_PIC_ENTRY_WORD2;
5418 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5419
5420 insn = PLT_PIC_ENTRY_WORD3;
5421 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5422
5423 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5424 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5425
5426 insn = PLT_PIC_ENTRY_WORD5
5427 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5428 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5429
5430 local_plt_offset = 16;
5431 }
5432
5433 /* Fill in the entry in the global offset table,
5434 so it will fall through to the next instruction for the first time. */
5435 bfd_put_32 (output_bfd,
5436 (splt->output_section->vma + splt->output_offset
5437 + h->plt.offset + local_plt_offset),
5438 sgot->contents + got_offset);
5439
5440 /* Fill in the entry in the .rela.plt section. */
5441 rela.r_offset = (sgot->output_section->vma
5442 + sgot->output_offset + got_offset);
5443 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5444 rela.r_addend = 0;
5445 loc = srela->contents;
5446 loc += plt_index * sizeof (Elf32_External_Rela);
5447 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5448
5449 if (!h->def_regular)
5450 {
5451 /* Mark the symbol as undefined, rather than as defined in
5452 the .plt section. Leave the value alone. */
5453 sym->st_shndx = SHN_UNDEF;
5454 if (!h->ref_regular_nonweak)
5455 sym->st_value = 0;
5456 }
5457 }
5458
5459 if (h->got.offset != (bfd_vma) - 1)
5460 {
5461 asection *sgot;
5462 asection *srela;
5463 Elf_Internal_Rela rela;
5464
5465 /* This symbol has an entry in the global offset table.
5466 Set it up. */
5467
ce558b89
AM		 5468 sgot = htab->root.sgot;
5469 srela = htab->root.srelgot;
35c08157
KLC		 5470 BFD_ASSERT (sgot != NULL && srela != NULL);
5471
5472 rela.r_offset = (sgot->output_section->vma
5473 + sgot->output_offset + (h->got.offset & ~1));
5474
5475 /* If this is a -Bsymbolic link, and the symbol is defined
5476 locally, we just want to emit a RELATIVE reloc. Likewise if
5477 the symbol was forced to be local because of a version file.
5478 The entry in the global offset table will already have been
5479 initialized in the relocate_section function. */
0e1862bb 5480 if (bfd_link_pic (info)
35c08157
KLC		 5481 && (info->symbolic
5482 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5483 {
5484 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5485 rela.r_addend = (h->root.u.def.value
5486 + h->root.u.def.section->output_section->vma
5487 + h->root.u.def.section->output_offset);
5488 }
5489 else
5490 {
5491 BFD_ASSERT ((h->got.offset & 1) == 0);
5492 bfd_put_32 (output_bfd, (bfd_vma) 0,
5493 sgot->contents + h->got.offset);
5494 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5495 rela.r_addend = 0;
5496 }
5497
5498 loc = srela->contents;
5499 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5500 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5501 ++srela->reloc_count;
5502 }
5503
5504 if (h->needs_copy)
5505 {
5506 asection *s;
5507 Elf_Internal_Rela rela;
5508
5509 /* This symbols needs a copy reloc. Set it up. */
5510
5511 BFD_ASSERT (h->dynindx != -1
5512 && (h->root.type == bfd_link_hash_defined
5513 || h->root.type == bfd_link_hash_defweak));
5514
5515 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5516 BFD_ASSERT (s != NULL);
5517
5518 rela.r_offset = (h->root.u.def.value
5519 + h->root.u.def.section->output_section->vma
5520 + h->root.u.def.section->output_offset);
5521 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5522 rela.r_addend = 0;
5523 loc = s->contents;
5524 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5525 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5526 ++s->reloc_count;
5527 }
5528
5529 /* Mark some specially defined symbols as absolute. */
5530 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5531 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5532 sym->st_shndx = SHN_ABS;
5533
5534 return TRUE;
5535}
5536
5537
5538/* Finish up the dynamic sections. */
5539
5540static bfd_boolean
5541nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5542{
5543 struct elf_nds32_link_hash_table *htab;
5544 bfd *dynobj;
5545 asection *sdyn;
5546 asection *sgot;
5547
5548 htab = nds32_elf_hash_table (info);
5549 dynobj = htab->root.dynobj;
5550
ce558b89 5551 sgot = htab->root.sgotplt;
35c08157
KLC		 5552 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5553
5554 if (htab->root.dynamic_sections_created)
5555 {
5556 asection *splt;
5557 Elf32_External_Dyn *dyncon, *dynconend;
5558
5559 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5560
5561 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5562 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5563
5564 for (; dyncon < dynconend; dyncon++)
5565 {
5566 Elf_Internal_Dyn dyn;
5567 asection *s;
5568
5569 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5570
5571 switch (dyn.d_tag)
5572 {
5573 default:
5574 break;
5575
5576 case DT_PLTGOT:
ce558b89 5577 s = htab->root.sgotplt;
35c08157
KLC		 5578 goto get_vma;
5579 case DT_JMPREL:
ce558b89 5580 s = htab->root.srelplt;
35c08157 5581 get_vma:
4ade44b7 5582 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 5583 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5584 break;
5585
5586 case DT_PLTRELSZ:
ce558b89 5587 s = htab->root.srelplt;
35c08157
KLC		 5588 dyn.d_un.d_val = s->size;
5589 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5590 break;
35c08157
KLC		 5591 }
5592 }
5593
5594 /* Fill in the first entry in the procedure linkage table. */
ce558b89 5595 splt = htab->root.splt;
35c08157
KLC		 5596 if (splt && splt->size > 0)
5597 {
0e1862bb 5598 if (bfd_link_pic (info))
35c08157
KLC		 5599 {
5600 unsigned long insn;
5601 long offset;
5602
5603 /* FIXME, sda_base is 65536, it will damage opcode. */
5604 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5605 offset = sgot->output_section->vma + sgot->output_offset + 4
5606 - elf_gp (output_bfd);
5607 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5608 bfd_putb32 (insn, splt->contents);
5609
5610 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5611 /* here has a typo? */
5612 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5613 bfd_putb32 (insn, splt->contents + 4);
5614
5615 insn = PLT0_PIC_ENTRY_WORD2;
5616 bfd_putb32 (insn, splt->contents + 8);
5617
5618 insn = PLT0_PIC_ENTRY_WORD3;
5619 bfd_putb32 (insn, splt->contents + 12);
5620
5621 insn = PLT0_PIC_ENTRY_WORD4;
5622 bfd_putb32 (insn, splt->contents + 16);
5623
5624 insn = PLT0_PIC_ENTRY_WORD5;
5625 bfd_putb32 (insn, splt->contents + 20);
5626 }
5627 else
5628 {
5629 unsigned long insn;
5630 unsigned long addr;
5631
5632 /* addr = .got + 4 */
5633 addr = sgot->output_section->vma + sgot->output_offset + 4;
5634 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5635 bfd_putb32 (insn, splt->contents);
5636
5637 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5638 bfd_putb32 (insn, splt->contents + 4);
5639
5640 insn = PLT0_ENTRY_WORD2;
5641 bfd_putb32 (insn, splt->contents + 8);
5642
5643 insn = PLT0_ENTRY_WORD3;
5644 bfd_putb32 (insn, splt->contents + 12);
5645
5646 insn = PLT0_ENTRY_WORD4;
5647 bfd_putb32 (insn, splt->contents + 16);
5648 }
5649
5650 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5651 PLT_ENTRY_SIZE;
5652 }
5653 }
5654
5655 /* Fill in the first three entries in the global offset table. */
5656 if (sgot && sgot->size > 0)
5657 {
5658 if (sdyn == NULL)
5659 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5660 else
5661 bfd_put_32 (output_bfd,
5662 sdyn->output_section->vma + sdyn->output_offset,
5663 sgot->contents);
5664 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5665 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5666
5667 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5668 }
5669
5670 return TRUE;
5671}
5672\f
5673
5674/* Set the right machine number. */
5675
5676static bfd_boolean
5677nds32_elf_object_p (bfd *abfd)
5678{
5679 static unsigned int cur_arch = 0;
5680
5681 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5682 {
5683 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5684 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5685 }
5686
5687 switch (cur_arch)
5688 {
5689 default:
5690 case E_N1_ARCH:
5691 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5692 break;
5693 case E_N1H_ARCH:
5694 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5695 break;
5696 case E_NDS_ARCH_STAR_V2_0:
5697 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5698 break;
5699 case E_NDS_ARCH_STAR_V3_0:
5700 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5701 break;
5702 case E_NDS_ARCH_STAR_V3_M:
5703 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5704 break;
5705 }
5706
5707 return TRUE;
5708}
5709
5710/* Store the machine number in the flags field. */
5711
5712static void
5713nds32_elf_final_write_processing (bfd *abfd,
5714 bfd_boolean linker ATTRIBUTE_UNUSED)
5715{
5716 unsigned long val;
5717 static unsigned int cur_mach = 0;
5718
5719 if (bfd_mach_n1 != bfd_get_mach (abfd))
5720 {
5721 cur_mach = bfd_get_mach (abfd);
5722 }
5723
5724 switch (cur_mach)
5725 {
5726 case bfd_mach_n1:
5727 /* Only happen when object is empty, since the case is abandon. */
5728 val = E_N1_ARCH;
5729 val |= E_NDS_ABI_AABI;
5730 val |= E_NDS32_ELF_VER_1_4;
5731 break;
5732 case bfd_mach_n1h:
5733 val = E_N1H_ARCH;
5734 break;
5735 case bfd_mach_n1h_v2:
5736 val = E_NDS_ARCH_STAR_V2_0;
5737 break;
5738 case bfd_mach_n1h_v3:
5739 val = E_NDS_ARCH_STAR_V3_0;
5740 break;
5741 case bfd_mach_n1h_v3m:
5742 val = E_NDS_ARCH_STAR_V3_M;
5743 break;
5744 default:
5745 val = 0;
5746 break;
5747 }
5748
5749 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5750 elf_elfheader (abfd)->e_flags |= val;
5751}
5752
5753/* Function to keep NDS32 specific file flags. */
5754
5755static bfd_boolean
5756nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5757{
5758 BFD_ASSERT (!elf_flags_init (abfd)
5759 || elf_elfheader (abfd)->e_flags == flags);
5760
5761 elf_elfheader (abfd)->e_flags = flags;
5762 elf_flags_init (abfd) = TRUE;
5763 return TRUE;
5764}
5765
5766static unsigned int
5767convert_e_flags (unsigned int e_flags, unsigned int arch)
5768{
5769 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5770 {
5771 /* From 0.9 to 1.0. */
5772 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5773
5774 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5775 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5776 if (arch == E_NDS_ARCH_STAR_V1_0)
5777 {
5778 /* Done. */
5779 return e_flags;
5780 }
5781 }
5782
5783 /* From 1.0 to 2.0. */
5784 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5785
5786 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5787 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5788
5789 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5790 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5791 return e_flags;
5792}
5793
5794static bfd_boolean
5795nds32_check_vec_size (bfd *ibfd)
5796{
5797 static unsigned int nds32_vec_size = 0;
5798
5799 asection *sec_t = NULL;
5800 bfd_byte *contents = NULL;
5801
5802 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5803
5804 if (sec_t && sec_t->size >= 4)
5805 {
5806 /* Get vec_size in file. */
5807 unsigned int flag_t;
5808
0c4bd9d9 5809 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5810 flag_t = bfd_get_32 (ibfd, contents);
5811
5812 /* The value could only be 4 or 16. */
5813
5814 if (!nds32_vec_size)
5815 /* Set if not set yet. */
5816 nds32_vec_size = (flag_t & 0x3);
5817 else if (nds32_vec_size != (flag_t & 0x3))
5818 {
4eca0228 5819 _bfd_error_handler
695344c0 5820 /* xgettext:c-format */
871b3ab2 5821 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 5822 " with previous modules, previous %u-byte, current %u-byte"),
5823 ibfd,
5824 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5825 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC		 5826 return FALSE;
5827 }
5828 else
5829 /* Only keep the first vec_size section. */
5830 sec_t->flags |= SEC_EXCLUDE;
5831 }
5832
5833 return TRUE;
5834}
5835
5836/* Merge backend specific data from an object file to the output
5837 object file when linking. */
5838
5839static bfd_boolean
50e03d47 5840nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5841{
50e03d47 5842 bfd *obfd = info->output_bfd;
35c08157
KLC		 5843 flagword out_flags;
5844 flagword in_flags;
5845 flagword out_16regs;
5846 flagword in_no_mac;
5847 flagword out_no_mac;
5848 flagword in_16regs;
5849 flagword out_version;
5850 flagword in_version;
5851 flagword out_fpu_config;
5852 flagword in_fpu_config;
5853
5854 /* TODO: Revise to use object-attributes instead. */
5855 if (!nds32_check_vec_size (ibfd))
5856 return FALSE;
5857
5858 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5859 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5860 return TRUE;
5861
5862 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5863 {
4eca0228 5864 _bfd_error_handler
38f14ab8 5865 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC		 5866
5867 bfd_set_error (bfd_error_bad_value);
5868 return FALSE;
5869 }
5870
5871 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5872 if (in_version == E_NDS32_ELF_VER_1_2)
5873 {
4eca0228 5874 _bfd_error_handler
38f14ab8
AM		 5875 (_("%pB: warning: older version of object file encountered, "
5876 "please recompile with current tool chain"), ibfd);
35c08157
KLC		 5877 }
5878
5879 /* We may need to merge V1 and V2 arch object files to V2. */
5880 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5881 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5882 {
5883 /* Need to convert version. */
5884 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5885 == E_NDS_ARCH_STAR_RESERVED)
5886 {
5887 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5888 }
5889 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5890 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5891 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5892 {
5893 elf_elfheader (obfd)->e_flags =
5894 convert_e_flags (elf_elfheader (obfd)->e_flags,
5895 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5896 }
5897 else
5898 {
5899 elf_elfheader (ibfd)->e_flags =
5900 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5901 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5902 }
5903 }
5904
5905 /* Extract some flags. */
5906 in_flags = elf_elfheader (ibfd)->e_flags
5907 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5908 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5909
5910 /* The following flags need special treatment. */
5911 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5912 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5913 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5914
5915 /* Extract some flags. */
5916 out_flags = elf_elfheader (obfd)->e_flags
5917 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5918 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5919
5920 /* The following flags need special treatment. */
5921 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5922 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5923 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5924 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5925 if (!elf_flags_init (obfd))
5926 {
5927 /* If the input is the default architecture then do not
5928 bother setting the flags for the output architecture,
5929 instead allow future merges to do this. If no future
5930 merges ever set these flags then they will retain their
5931 unitialised values, which surprise surprise, correspond
5932 to the default values. */
5933 if (bfd_get_arch_info (ibfd)->the_default)
5934 return TRUE;
5935
5936 elf_flags_init (obfd) = TRUE;
5937 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5938
5939 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5940 && bfd_get_arch_info (obfd)->the_default)
5941 {
5942 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5943 bfd_get_mach (ibfd));
5944 }
5945
5946 return TRUE;
5947 }
5948
5949 /* Check flag compatibility. */
5950 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5951 {
4eca0228 5952 _bfd_error_handler
38f14ab8 5953 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157
KLC		 5954
5955 bfd_set_error (bfd_error_bad_value);
5956 return FALSE;
5957 }
5958
5959 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5960 {
5961 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5962 {
4eca0228 5963 _bfd_error_handler
38f14ab8
AM		 5964 (_("%pB: error: instruction set mismatch with previous modules"),
5965 ibfd);
35c08157
KLC		 5966
5967 bfd_set_error (bfd_error_bad_value);
5968 return FALSE;
5969 }
5970 }
5971
5972 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5973 and perf ext1 and DIV are mergerd to perf ext1. */
5974 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
5975 {
5976 elf_elfheader (obfd)->e_flags =
5977 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5978 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5979 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5980 ? E_NDS32_HAS_EXT_INST : 0)
5981 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5982 ? E_NDS32_HAS_EXT_INST : 0)
5983 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
5984 | ((in_version > out_version) ? out_version : in_version);
5985 }
5986 else
5987 {
5988 if (in_version != out_version)
4eca0228 5989 _bfd_error_handler
695344c0 5990 /* xgettext:c-format */
38f14ab8 5991 (_("%pB: warning: incompatible elf-versions %s and %s"),
4eca0228
AM		 5992 ibfd, nds32_elfver_strtab[out_version],
5993 nds32_elfver_strtab[in_version]);
35c08157
KLC		 5994
5995 elf_elfheader (obfd)->e_flags = in_flags | out_flags
5996 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
5997 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
5998 | (in_version > out_version ? out_version : in_version);
5999 }
6000
6001 return TRUE;
6002}
6003
6004/* Display the flags field. */
6005
6006static bfd_boolean
6007nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6008{
6009 FILE *file = (FILE *) ptr;
6010
6011 BFD_ASSERT (abfd != NULL && ptr != NULL);
6012
6013 _bfd_elf_print_private_bfd_data (abfd, ptr);
6014
6015 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6016
6017 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6018 {
6019 default:
6020 case E_N1_ARCH:
6021 fprintf (file, _(": n1 instructions"));
6022 break;
6023 case E_N1H_ARCH:
6024 fprintf (file, _(": n1h instructions"));
6025 break;
6026 }
6027
6028 fputc ('\n', file);
6029
6030 return TRUE;
6031}
6032
6033static unsigned int
6034nds32_elf_action_discarded (asection *sec)
6035{
6036
6037 if (strncmp
6038 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6039 return 0;
6040
6041 return _bfd_elf_default_action_discarded (sec);
6042}
6043
6044static asection *
6045nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6046 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6047 Elf_Internal_Sym *sym)
6048{
6049 if (h != NULL)
6050 switch (ELF32_R_TYPE (rel->r_info))
6051 {
6052 case R_NDS32_GNU_VTINHERIT:
6053 case R_NDS32_GNU_VTENTRY:
6054 case R_NDS32_RELA_GNU_VTINHERIT:
6055 case R_NDS32_RELA_GNU_VTENTRY:
6056 return NULL;
6057 }
6058
6059 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6060}
6061
35c08157
KLC		 6062/* Look through the relocs for a section during the first phase.
6063 Since we don't do .gots or .plts, we just need to consider the
6064 virtual table relocs for gc. */
6065
6066static bfd_boolean
6067nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6068 asection *sec, const Elf_Internal_Rela *relocs)
6069{
6070 Elf_Internal_Shdr *symtab_hdr;
6071 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6072 const Elf_Internal_Rela *rel;
6073 const Elf_Internal_Rela *rel_end;
6074 struct elf_nds32_link_hash_table *htab;
6075 bfd *dynobj;
6076 asection *sreloc = NULL;
6077
0e1862bb 6078 if (bfd_link_relocatable (info))
35c08157
KLC		 6079 return TRUE;
6080
65281396
AM		 6081 /* Don't do anything special with non-loaded, non-alloced sections.
6082 In particular, any relocs in such sections should not affect GOT
6083 and PLT reference counting (ie. we don't allow them to create GOT
6084 or PLT entries), there's no possibility or desire to optimize TLS
6085 relocs, and there's not much point in propagating relocs to shared
6086 libs that the dynamic linker won't relocate. */
6087 if ((sec->flags & SEC_ALLOC) == 0)
6088 return TRUE;
6089
35c08157
KLC		 6090 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6091 sym_hashes = elf_sym_hashes (abfd);
6092 sym_hashes_end =
6093 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6094 if (!elf_bad_symtab (abfd))
6095 sym_hashes_end -= symtab_hdr->sh_info;
6096
6097 htab = nds32_elf_hash_table (info);
6098 dynobj = htab->root.dynobj;
6099
6100 rel_end = relocs + sec->reloc_count;
6101 for (rel = relocs; rel < rel_end; rel++)
6102 {
6103 enum elf_nds32_reloc_type r_type;
6104 struct elf_link_hash_entry *h;
6105 unsigned long r_symndx;
1c8f6a4d 6106 int tls_type, old_tls_type;
35c08157
KLC		 6107
6108 r_symndx = ELF32_R_SYM (rel->r_info);
6109 r_type = ELF32_R_TYPE (rel->r_info);
6110 if (r_symndx < symtab_hdr->sh_info)
6111 h = NULL;
6112 else
6113 {
6114 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6115 while (h->root.type == bfd_link_hash_indirect
6116 || h->root.type == bfd_link_hash_warning)
6117 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6118 }
6119
1c8f6a4d
KLC		 6120 /* Some relocs require a global offset table. We create
6121 got section here, since these relocation need got section
6122 and it is not created yet. */
ce558b89 6123 if (htab->root.sgot == NULL)
35c08157
KLC		 6124 {
6125 switch (r_type)
6126 {
6127 case R_NDS32_GOT_HI20:
6128 case R_NDS32_GOT_LO12:
6129 case R_NDS32_GOT_LO15:
6130 case R_NDS32_GOT_LO19:
6131 case R_NDS32_GOT17S2_RELA:
6132 case R_NDS32_GOT15S2_RELA:
6133 case R_NDS32_GOTOFF:
6134 case R_NDS32_GOTOFF_HI20:
6135 case R_NDS32_GOTOFF_LO12:
6136 case R_NDS32_GOTOFF_LO15:
6137 case R_NDS32_GOTOFF_LO19:
6138 case R_NDS32_GOTPC20:
6139 case R_NDS32_GOTPC_HI20:
6140 case R_NDS32_GOTPC_LO12:
6141 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6142 case R_NDS32_TLS_IE_HI20:
6143 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6144 if (dynobj == NULL)
6145 htab->root.dynobj = dynobj = abfd;
ce558b89 6146 if (!_bfd_elf_create_got_section (dynobj, info))
35c08157
KLC		 6147 return FALSE;
6148 break;
6149
6150 default:
6151 break;
6152 }
6153 }
6154
6155 switch ((int) r_type)
6156 {
6157 case R_NDS32_GOT_HI20:
6158 case R_NDS32_GOT_LO12:
6159 case R_NDS32_GOT_LO15:
6160 case R_NDS32_GOT_LO19:
6161 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6162 case R_NDS32_TLS_IE_HI20:
6163 case R_NDS32_TLS_IE_LO12S2:
6164 switch (r_type)
6165 {
6166 case R_NDS32_TLS_IE_HI20:
6167 case R_NDS32_TLS_IE_LO12S2:
6168 tls_type = GOT_TLS_IE;
6169 break;
6170 default:
6171 tls_type = GOT_NORMAL;
6172 break;
6173 }
35c08157 6174 if (h != NULL)
1c8f6a4d
KLC		 6175 {
6176 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6177 h->got.refcount += 1;
6178 }
35c08157
KLC		 6179 else
6180 {
6181 bfd_signed_vma *local_got_refcounts;
6182
6183 /* This is a global offset table entry for a local
6184 symbol. */
6185 local_got_refcounts = elf_local_got_refcounts (abfd);
6186 if (local_got_refcounts == NULL)
6187 {
6188 bfd_size_type size;
6189
6190 size = symtab_hdr->sh_info;
6191 size *= sizeof (bfd_signed_vma);
6192 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6193 if (local_got_refcounts == NULL)
6194 return FALSE;
6195 elf_local_got_refcounts (abfd) = local_got_refcounts;
6196 }
6197 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6198 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6199 }
35c08157 6200
1c8f6a4d
KLC		 6201 /* We will already have issued an error message if there
6202 is a TLS/non-TLS mismatch, based on the symbol
6203 type. So just combine any TLS types needed. */
6204 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6205 && tls_type != GOT_NORMAL)
6206 tls_type |= old_tls_type;
6207
6208 if (old_tls_type != tls_type)
6209 {
6210 if (h != NULL)
6211 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6212 else
6213 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6214 }
6215 break;
6216 case R_NDS32_9_PLTREL:
35c08157
KLC		 6217 case R_NDS32_25_PLTREL:
6218 case R_NDS32_PLTREL_HI20:
6219 case R_NDS32_PLTREL_LO12:
6220 case R_NDS32_PLT_GOTREL_HI20:
6221 case R_NDS32_PLT_GOTREL_LO12:
6222 case R_NDS32_PLT_GOTREL_LO15:
6223 case R_NDS32_PLT_GOTREL_LO19:
6224 case R_NDS32_PLT_GOTREL_LO20:
6225
6226 /* This symbol requires a procedure linkage table entry. We
6227 actually build the entry in adjust_dynamic_symbol,
6228 because this might be a case of linking PIC code without
6229 linking in any dynamic objects, in which case we don't
6230 need to generate a procedure linkage table after all. */
6231
6232 /* If this is a local symbol, we resolve it directly without
6233 creating a procedure linkage table entry. */
6234 if (h == NULL)
6235 continue;
6236
6237 if (h->forced_local)
6238 break;
6239
1c8f6a4d 6240 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6241 h->needs_plt = 1;
6242 h->plt.refcount += 1;
6243 break;
6244
6245 case R_NDS32_16_RELA:
6246 case R_NDS32_20_RELA:
6247 case R_NDS32_5_RELA:
6248 case R_NDS32_32_RELA:
6249 case R_NDS32_HI20_RELA:
6250 case R_NDS32_LO12S3_RELA:
6251 case R_NDS32_LO12S2_RELA:
6252 case R_NDS32_LO12S2_DP_RELA:
6253 case R_NDS32_LO12S2_SP_RELA:
6254 case R_NDS32_LO12S1_RELA:
6255 case R_NDS32_LO12S0_RELA:
6256 case R_NDS32_LO12S0_ORI_RELA:
6257 case R_NDS32_SDA16S3_RELA:
6258 case R_NDS32_SDA17S2_RELA:
6259 case R_NDS32_SDA18S1_RELA:
6260 case R_NDS32_SDA19S0_RELA:
6261 case R_NDS32_SDA15S3_RELA:
6262 case R_NDS32_SDA15S2_RELA:
6263 case R_NDS32_SDA12S2_DP_RELA:
6264 case R_NDS32_SDA12S2_SP_RELA:
6265 case R_NDS32_SDA15S1_RELA:
6266 case R_NDS32_SDA15S0_RELA:
6267 case R_NDS32_SDA_FP7U2_RELA:
6268 case R_NDS32_15_PCREL_RELA:
6269 case R_NDS32_17_PCREL_RELA:
6270 case R_NDS32_25_PCREL_RELA:
6271
0e1862bb 6272 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 6273 {
6274 h->non_got_ref = 1;
6275 h->plt.refcount += 1;
6276 }
6277
6278 /* If we are creating a shared library, and this is a reloc against
6279 a global symbol, or a non PC relative reloc against a local
6280 symbol, then we need to copy the reloc into the shared library.
6281 However, if we are linking with -Bsymbolic, we do not need to
6282 copy a reloc against a global symbol which is defined in an
6283 object we are including in the link (i.e., DEF_REGULAR is set).
6284 At this point we have not seen all the input files, so it is
6285 possible that DEF_REGULAR is not set now but will be set later
6286 (it is never cleared). We account for that possibility below by
6287 storing information in the dyn_relocs field of the hash table
6288 entry. A similar situation occurs when creating shared libraries
6289 and symbol visibility changes render the symbol local.
6290
6291 If on the other hand, we are creating an executable, we may need
6292 to keep relocations for symbols satisfied by a dynamic library
6293 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6294 if ((bfd_link_pic (info)
35c08157
KLC		 6295 && (sec->flags & SEC_ALLOC) != 0
6296 && ((r_type != R_NDS32_25_PCREL_RELA
6297 && r_type != R_NDS32_15_PCREL_RELA
6298 && r_type != R_NDS32_17_PCREL_RELA
6299 && !(r_type == R_NDS32_32_RELA
6300 && strcmp (sec->name, ".eh_frame") == 0))
6301 || (h != NULL
6302 && (!info->symbolic
6303 || h->root.type == bfd_link_hash_defweak
6304 || !h->def_regular))))
0e1862bb 6305 || (!bfd_link_pic (info)
35c08157
KLC		 6306 && (sec->flags & SEC_ALLOC) != 0
6307 && h != NULL
6308 && (h->root.type == bfd_link_hash_defweak
6309 || !h->def_regular)))
6310 {
3bf083ed
AM		 6311 struct elf_dyn_relocs *p;
6312 struct elf_dyn_relocs **head;
35c08157
KLC		 6313
6314 if (dynobj == NULL)
6315 htab->root.dynobj = dynobj = abfd;
6316
6317 /* When creating a shared object, we must copy these
6318 relocs into the output file. We create a reloc
6319 section in dynobj and make room for the reloc. */
6320 if (sreloc == NULL)
6321 {
6322 const char *name;
6323
6324 name = bfd_elf_string_from_elf_section
6325 (abfd, elf_elfheader (abfd)->e_shstrndx,
6326 elf_section_data (sec)->rela.hdr->sh_name);
6327 if (name == NULL)
6328 return FALSE;
6329
6330 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6331 && strcmp (bfd_get_section_name (abfd, sec),
6332 name + 5) == 0);
6333
6334 sreloc = bfd_get_section_by_name (dynobj, name);
6335 if (sreloc == NULL)
6336 {
6337 flagword flags;
6338
6339 sreloc = bfd_make_section (dynobj, name);
6340 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6341 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6342 if ((sec->flags & SEC_ALLOC) != 0)
6343 flags |= SEC_ALLOC | SEC_LOAD;
6344 if (sreloc == NULL
6345 || !bfd_set_section_flags (dynobj, sreloc, flags)
6346 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6347 return FALSE;
6348
6349 elf_section_type (sreloc) = SHT_RELA;
6350 }
6351 elf_section_data (sec)->sreloc = sreloc;
6352 }
6353
6354 /* If this is a global symbol, we count the number of
6355 relocations we need for this symbol. */
6356 if (h != NULL)
6357 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6358 else
6359 {
6360 asection *s;
61034b0b 6361 void *vpp;
35c08157
KLC		 6362
6363 Elf_Internal_Sym *isym;
6364 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6365 if (isym == NULL)
6366 return FALSE;
6367
6368 /* Track dynamic relocs needed for local syms too. */
6369 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6370 if (s == NULL)
6371 return FALSE;
6372
61034b0b 6373 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 6374 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 6375 }
6376
6377 p = *head;
6378 if (p == NULL || p->sec != sec)
6379 {
6380 bfd_size_type amt = sizeof (*p);
3bf083ed 6381 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157
KLC		 6382 if (p == NULL)
6383 return FALSE;
6384 p->next = *head;
6385 *head = p;
6386 p->sec = sec;
6387 p->count = 0;
6388 p->pc_count = 0;
6389 }
6390
6391 p->count += 1;
6392 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6393 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6394 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6395 p->pc_count += 1;
6396 }
6397 break;
6398
6399 /* This relocation describes the C++ object vtable hierarchy.
6400 Reconstruct it for later use during GC. */
6401 case R_NDS32_RELA_GNU_VTINHERIT:
6402 case R_NDS32_GNU_VTINHERIT:
6403 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6404 return FALSE;
6405 break;
6406
6407 /* This relocation describes which C++ vtable entries are actually
6408 used. Record for later use during GC. */
6409 case R_NDS32_GNU_VTENTRY:
6410 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6411 return FALSE;
6412 break;
6413 case R_NDS32_RELA_GNU_VTENTRY:
6414 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6415 return FALSE;
6416 break;
6417 }
6418 }
6419
6420 return TRUE;
6421}
6422
6423/* Write VAL in uleb128 format to P, returning a pointer to the
6424 following byte.
6425 This code is copied from elf-attr.c. */
6426
6427static bfd_byte *
6428write_uleb128 (bfd_byte *p, unsigned int val)
6429{
6430 bfd_byte c;
6431 do
6432 {
6433 c = val & 0x7f;
6434 val >>= 7;
6435 if (val)
6436 c |= 0x80;
6437 *(p++) = c;
6438 }
6439 while (val);
6440 return p;
6441}
6442
6443static bfd_signed_vma
6444calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6445 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6446 int *pic_ext_target)
6447{
6448 bfd_signed_vma foff;
6449 bfd_vma symval, addend;
6450 asection *sym_sec;
6451
6452 /* Get the value of the symbol referred to by the reloc. */
6453 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6454 {
6455 Elf_Internal_Sym *isym;
6456
6457 /* A local symbol. */
6458 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6459
6460 if (isym->st_shndx == SHN_UNDEF)
6461 sym_sec = bfd_und_section_ptr;
6462 else if (isym->st_shndx == SHN_ABS)
6463 sym_sec = bfd_abs_section_ptr;
6464 else if (isym->st_shndx == SHN_COMMON)
6465 sym_sec = bfd_com_section_ptr;
6466 else
6467 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6468 symval = isym->st_value + sym_sec->output_section->vma
6469 + sym_sec->output_offset;
6470 }
6471 else
6472 {
6473 unsigned long indx;
6474 struct elf_link_hash_entry *h;
6475 bfd *owner;
6476
6477 /* An external symbol. */
6478 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6479 h = elf_sym_hashes (abfd)[indx];
6480 BFD_ASSERT (h != NULL);
6481
6482 if (h->root.type != bfd_link_hash_defined
6483 && h->root.type != bfd_link_hash_defweak)
6484 /* This appears to be a reference to an undefined
6485 symbol. Just ignore it--it will be caught by the
6486 regular reloc processing. */
6487 return 0;
6488 owner = h->root.u.def.section->owner;
6489 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6490 *pic_ext_target = 1;
6491
6492 if (h->root.u.def.section->flags & SEC_MERGE)
6493 {
6494 sym_sec = h->root.u.def.section;
6495 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6496 elf_section_data (sym_sec)->sec_info,
6497 h->root.u.def.value);
6498 symval = symval + sym_sec->output_section->vma
6499 + sym_sec->output_offset;
6500 }
6501 else
6502 symval = (h->root.u.def.value
6503 + h->root.u.def.section->output_section->vma
6504 + h->root.u.def.section->output_offset);
6505 }
6506
6507 addend = irel->r_addend;
6508
6509 foff = (symval + addend
6510 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6511 return foff;
6512}
6513
6514static bfd_vma
6515calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6516 Elf_Internal_Sym *isymbuf,
6517 Elf_Internal_Rela *irel,
6518 Elf_Internal_Shdr *symtab_hdr)
6519{
6520 bfd_vma symval;
6521
6522 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6523 {
6524 Elf_Internal_Sym *isym;
6525 asection *sym_sec;
6526 /* A local symbol. */
6527 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6528
6529 if (isym->st_shndx == SHN_UNDEF)
6530 sym_sec = bfd_und_section_ptr;
6531 else if (isym->st_shndx == SHN_ABS)
6532 sym_sec = bfd_abs_section_ptr;
6533 else if (isym->st_shndx == SHN_COMMON)
6534 sym_sec = bfd_com_section_ptr;
6535 else
6536 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6537 symval = isym->st_value + sym_sec->output_section->vma
6538 + sym_sec->output_offset;
6539 }
6540 else
6541 {
6542 unsigned long indx;
6543 struct elf_link_hash_entry *h;
6544 struct elf_nds32_link_hash_table *htab;
6545 asection *splt;
6546
6547 /* An external symbol. */
6548 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6549 h = elf_sym_hashes (abfd)[indx];
6550 BFD_ASSERT (h != NULL);
6551 htab = nds32_elf_hash_table (link_info);
ce558b89 6552 splt = htab->root.splt;
35c08157
KLC		 6553
6554 while (h->root.type == bfd_link_hash_indirect
6555 || h->root.type == bfd_link_hash_warning)
6556 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6557
6558 if (h->plt.offset == (bfd_vma) - 1)
6559 {
6560 if (h->root.type != bfd_link_hash_defined
6561 && h->root.type != bfd_link_hash_defweak)
6562 /* This appears to be a reference to an undefined
6563 * symbol. Just ignore it--it will be caught by the
6564 * regular reloc processing. */
6565 return 0;
6566 symval = (h->root.u.def.value
6567 + h->root.u.def.section->output_section->vma
6568 + h->root.u.def.section->output_offset);
6569 }
6570 else
6571 symval = splt->output_section->vma + h->plt.offset;
6572 }
6573
6574 return symval;
6575}
6576
6577static bfd_signed_vma
6578calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6579 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6580 Elf_Internal_Shdr *symtab_hdr)
6581{
6582 bfd_vma foff;
6583 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6584 symtab_hdr)) == 0)
6585 return 0;
6586 else
6587 return foff - (irel->r_offset
6588 + sec->output_section->vma + sec->output_offset);
6589}
6590\f
6591/* Convert a 32-bit instruction to 16-bit one.
6592 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6593 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6594 type of INSN16. Return 1 if successful. */
6595
6596static int
6597nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6598 int *pinsn_type)
6599{
6600 uint16_t insn16 = 0;
6cae483a 6601 int insn_type = 0;
35c08157
KLC		 6602 unsigned long mach = bfd_get_mach (abfd);
6603
6604 if (N32_SH5 (insn) != 0)
6605 return 0;
6606
6607 switch (N32_SUB5 (insn))
6608 {
6609 case N32_ALU1_ADD_SLLI:
6610 case N32_ALU1_ADD_SRLI:
6611 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6612 {
6613 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6614 N32_RB5 (insn));
6615 insn_type = NDS32_INSN_ADD333;
6616 }
6617 else if (N32_IS_RT4 (insn))
6618 {
6619 if (N32_RT5 (insn) == N32_RA5 (insn))
6620 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6621 else if (N32_RT5 (insn) == N32_RB5 (insn))
6622 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6623 insn_type = NDS32_INSN_ADD45;
6624 }
6625 break;
6626
6627 case N32_ALU1_SUB_SLLI:
6628 case N32_ALU1_SUB_SRLI:
6629 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6630 {
6631 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6632 N32_RB5 (insn));
6633 insn_type = NDS32_INSN_SUB333;
6634 }
6635 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6636 {
6637 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6638 insn_type = NDS32_INSN_SUB45;
6639 }
6640 break;
6641
6642 case N32_ALU1_AND_SLLI:
6643 case N32_ALU1_AND_SRLI:
6644 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6645 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6646 && N32_IS_RB3 (insn))
6647 {
6648 if (N32_RT5 (insn) == N32_RA5 (insn))
6649 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6650 else if (N32_RT5 (insn) == N32_RB5 (insn))
6651 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6652 if (insn16)
6653 insn_type = NDS32_INSN_AND33;
6654 }
6655 break;
6656
6657 case N32_ALU1_XOR_SLLI:
6658 case N32_ALU1_XOR_SRLI:
6659 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6660 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6661 && N32_IS_RB3 (insn))
6662 {
6663 if (N32_RT5 (insn) == N32_RA5 (insn))
6664 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6665 else if (N32_RT5 (insn) == N32_RB5 (insn))
6666 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6667 if (insn16)
6668 insn_type = NDS32_INSN_XOR33;
6669 }
6670 break;
6671
6672 case N32_ALU1_OR_SLLI:
6673 case N32_ALU1_OR_SRLI:
6674 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6675 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6676 && N32_IS_RB3 (insn))
6677 {
6678 if (N32_RT5 (insn) == N32_RA5 (insn))
6679 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6680 else if (N32_RT5 (insn) == N32_RB5 (insn))
6681 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6682 if (insn16)
6683 insn_type = NDS32_INSN_OR33;
6684 }
6685 break;
6686 case N32_ALU1_NOR:
6687 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6688 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6689 && N32_RA5 (insn) == N32_RB5 (insn))
6690 {
6691 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6692 insn_type = NDS32_INSN_NOT33;
6693 }
6694 break;
6695 case N32_ALU1_SRAI:
6696 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6697 {
6698 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6699 insn_type = NDS32_INSN_SRAI45;
6700 }
6701 break;
6702
6703 case N32_ALU1_SRLI:
6704 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6705 {
6706 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6707 insn_type = NDS32_INSN_SRLI45;
6708 }
6709 break;
6710
6711 case N32_ALU1_SLLI:
6712 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6713 {
6714 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6715 N32_UB5 (insn));
6716 insn_type = NDS32_INSN_SLLI333;
6717 }
6718 break;
6719
6720 case N32_ALU1_ZEH:
6721 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6722 {
6723 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6724 insn_type = NDS32_INSN_ZEH33;
6725 }
6726 break;
6727
6728 case N32_ALU1_SEB:
6729 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6730 {
6731 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6732 insn_type = NDS32_INSN_SEB33;
6733 }
6734 break;
6735
6736 case N32_ALU1_SEH:
6737 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6738 {
6739 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6740 insn_type = NDS32_INSN_SEH33;
6741 }
6742 break;
6743
6744 case N32_ALU1_SLT:
6745 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6746 {
6747 /* Implicit r15. */
6748 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6749 insn_type = NDS32_INSN_SLT45;
6750 }
6751 break;
6752
6753 case N32_ALU1_SLTS:
6754 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6755 {
6756 /* Implicit r15. */
6757 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6758 insn_type = NDS32_INSN_SLTS45;
6759 }
6760 break;
6761 }
6762
6763 if ((insn16 & 0x8000) == 0)
6764 return 0;
6765
6766 if (pinsn16)
6767 *pinsn16 = insn16;
6768 if (pinsn_type)
6769 *pinsn_type = insn_type;
6770 return 1;
6771}
6772
6773static int
6774nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6775 int *pinsn_type)
6776{
6777 uint16_t insn16 = 0;
6778 int insn_type;
6779 unsigned long mach = bfd_get_mach (abfd);
6780
6781 /* TODO: bset, bclr, btgl, btst. */
6782 if (__GF (insn, 6, 4) != 0)
6783 return 0;
6784
6785 switch (N32_IMMU (insn, 6))
6786 {
6787 case N32_ALU2_MUL:
6788 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6789 && N32_IS_RB3 (insn))
6790 {
6791 if (N32_RT5 (insn) == N32_RA5 (insn))
6792 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6793 else if (N32_RT5 (insn) == N32_RB5 (insn))
6794 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6795 if (insn16)
6796 insn_type = NDS32_INSN_MUL33;
6797 }
6798 }
6799
6800 if ((insn16 & 0x8000) == 0)
6801 return 0;
6802
6803 if (pinsn16)
6804 *pinsn16 = insn16;
6805 if (pinsn_type)
6806 *pinsn_type = insn_type;
6807 return 1;
6808}
6809
6810int
6811nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6812 int *pinsn_type)
6813{
6814 int op6;
6815 uint16_t insn16 = 0;
6816 int insn_type;
6817 unsigned long mach = bfd_get_mach (abfd);
6818
6819 /* Decode 32-bit instruction. */
6820 if (insn & 0x80000000)
6821 {
6822 /* Not 32-bit insn. */
6823 return 0;
6824 }
6825
6826 op6 = N32_OP6 (insn);
6827
6828 /* Convert it to 16-bit instruction. */
6829 switch (op6)
6830 {
6831 case N32_OP6_MOVI:
6832 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6833 {
6834 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6835 insn_type = NDS32_INSN_MOVI55;
6836 }
6837 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6838 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6839 {
6840 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6841 N32_IMM20S (insn) - 16);
6842 insn_type = NDS32_INSN_MOVPI45;
6843 }
6844 break;
6845
6846 case N32_OP6_ADDI:
6847 if (N32_IMM15S (insn) == 0)
6848 {
6849 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6850 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6851 if (mach <= MACH_V2
6852 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6853 {
6854 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6855 insn_type = NDS32_INSN_MOV55;
6856 }
6857 }
6858 else if (N32_IMM15S (insn) > 0)
6859 {
6860 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6861 {
6862 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6863 N32_IMM15S (insn));
6864 insn_type = NDS32_INSN_ADDI333;
6865 }
6866 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6867 && N32_IMM15S (insn) < 32)
6868 {
6869 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6870 insn_type = NDS32_INSN_ADDI45;
6871 }
6872 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6873 && N32_RT5 (insn) == N32_RA5 (insn)
6874 && N32_IMM15S (insn) < 512)
6875 {
6876 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6877 insn_type = NDS32_INSN_ADDI10_SP;
6878 }
6879 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6880 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6881 && (N32_IMM15S (insn) % 4 == 0))
6882 {
6883 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6884 N32_IMM15S (insn) >> 2);
6885 insn_type = NDS32_INSN_ADDRI36_SP;
6886 }
6887 }
6888 else
6889 {
6890 /* Less than 0. */
6891 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6892 {
6893 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6894 0 - N32_IMM15S (insn));
6895 insn_type = NDS32_INSN_SUBI333;
6896 }
6897 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6898 && N32_IMM15S (insn) > -32)
6899 {
1c8f6a4d
KLC		 6900 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6901 0 - N32_IMM15S (insn));
35c08157
KLC		 6902 insn_type = NDS32_INSN_SUBI45;
6903 }
6904 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6905 && N32_RT5 (insn) == N32_RA5 (insn)
6906 && N32_IMM15S (insn) >= -512)
6907 {
6908 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6909 insn_type = NDS32_INSN_ADDI10_SP;
6910 }
6911 }
6912 break;
6913
6914 case N32_OP6_ORI:
6915 if (N32_IMM15S (insn) == 0)
6916 {
6917 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6918 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6919 if (mach <= MACH_V2
6920 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6921 {
6922 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6923 insn_type = NDS32_INSN_MOV55;
6924 }
6925 }
6926 break;
6927
6928 case N32_OP6_SUBRI:
6929 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6930 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6931 {
6932 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6933 insn_type = NDS32_INSN_NEG33;
6934 }
6935 break;
6936
6937 case N32_OP6_ANDI:
6938 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6939 {
6940 if (N32_IMM15U (insn) == 1)
6941 {
6942 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6943 insn_type = NDS32_INSN_XLSB33;
6944 }
6945 else if (N32_IMM15U (insn) == 0x7ff)
6946 {
6947 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6948 insn_type = NDS32_INSN_X11B33;
6949 }
6950 else if (N32_IMM15U (insn) == 0xff)
6951 {
6952 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6953 insn_type = NDS32_INSN_ZEB33;
6954 }
6955 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6956 && N32_IMM15U (insn) < 256)
6957 {
6958 int imm15u = N32_IMM15U (insn);
6959
6960 if (__builtin_popcount (imm15u) == 1)
6961 {
6962 /* BMSKI33 */
6963 int imm3u = __builtin_ctz (imm15u);
6964
6965 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6966 insn_type = NDS32_INSN_BMSKI33;
6967 }
6968 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6969 {
6970 /* FEXTI33 */
6971 int imm3u = __builtin_ctz (imm15u + 1) - 1;
6972
6973 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6974 insn_type = NDS32_INSN_FEXTI33;
6975 }
6976 }
6977 }
6978 break;
6979
6980 case N32_OP6_SLTI:
6981 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6982 && IS_WITHIN_U (N32_IMM15S (insn), 5))
6983 {
6984 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
6985 insn_type = NDS32_INSN_SLTI45;
6986 }
6987 break;
6988
6989 case N32_OP6_SLTSI:
6990 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6991 && IS_WITHIN_U (N32_IMM15S (insn), 5))
6992 {
6993 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
6994 insn_type = NDS32_INSN_SLTSI45;
6995 }
6996 break;
6997
6998 case N32_OP6_LWI:
6999 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7000 {
7001 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7002 insn_type = NDS32_INSN_LWI450;
7003 }
7004 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7005 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7006 {
7007 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7008 N32_IMM15S (insn));
7009 insn_type = NDS32_INSN_LWI333;
7010 }
7011 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7012 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7013 {
7014 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7015 insn_type = NDS32_INSN_LWI37;
7016 }
7017 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7018 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7019 {
7020 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7021 insn_type = NDS32_INSN_LWI37_SP;
7022 }
7023 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7024 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7025 {
1c8f6a4d
KLC		 7026 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7027 N32_IMM15S (insn) + 32);
35c08157
KLC		 7028 insn_type = NDS32_INSN_LWI45_FE;
7029 }
7030 break;
7031
7032 case N32_OP6_SWI:
7033 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7034 {
7035 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7036 insn_type = NDS32_INSN_SWI450;
7037 }
7038 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7039 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7040 {
1c8f6a4d
KLC		 7041 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7042 N32_IMM15S (insn));
35c08157
KLC		 7043 insn_type = NDS32_INSN_SWI333;
7044 }
7045 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7046 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7047 {
7048 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7049 insn_type = NDS32_INSN_SWI37;
7050 }
7051 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7052 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7053 {
7054 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7055 insn_type = NDS32_INSN_SWI37_SP;
7056 }
7057 break;
7058
7059 case N32_OP6_LWI_BI:
7060 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7061 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7062 {
7063 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7064 N32_IMM15S (insn));
7065 insn_type = NDS32_INSN_LWI333_BI;
7066 }
7067 break;
7068
7069 case N32_OP6_SWI_BI:
7070 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7071 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7072 {
7073 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7074 N32_IMM15S (insn));
7075 insn_type = NDS32_INSN_SWI333_BI;
7076 }
7077 break;
7078
7079 case N32_OP6_LHI:
7080 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7081 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7082 {
7083 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7084 N32_IMM15S (insn));
7085 insn_type = NDS32_INSN_LHI333;
7086 }
7087 break;
7088
7089 case N32_OP6_SHI:
7090 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7091 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7092 {
7093 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7094 N32_IMM15S (insn));
7095 insn_type = NDS32_INSN_SHI333;
7096 }
7097 break;
7098
7099 case N32_OP6_LBI:
7100 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7101 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7102 {
7103 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7104 N32_IMM15S (insn));
7105 insn_type = NDS32_INSN_LBI333;
7106 }
7107 break;
7108
7109 case N32_OP6_SBI:
7110 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7111 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7112 {
7113 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7114 N32_IMM15S (insn));
7115 insn_type = NDS32_INSN_SBI333;
7116 }
7117 break;
7118
7119 case N32_OP6_ALU1:
7120 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7121
7122 case N32_OP6_ALU2:
7123 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7124
7125 case N32_OP6_BR1:
7126 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7127 goto done;
7128
4ec521f2 7129 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 7130 {
7131 /* N32_BR1_BEQ */
7132 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7133 && N32_RT5 (insn) != REG_R5)
7134 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7135 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7136 && N32_RA5 (insn) != REG_R5)
7137 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7138 insn_type = NDS32_INSN_BEQS38;
7139 break;
7140 }
7141 else
7142 {
7143 /* N32_BR1_BNE */
7144 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7145 && N32_RT5 (insn) != REG_R5)
7146 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7147 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7148 && N32_RA5 (insn) != REG_R5)
7149 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7150 insn_type = NDS32_INSN_BNES38;
7151 break;
7152 }
7153 break;
7154
7155 case N32_OP6_BR2:
7156 switch (N32_BR2_SUB (insn))
7157 {
7158 case N32_BR2_BEQZ:
7159 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7160 {
7161 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7162 insn_type = NDS32_INSN_BEQZ38;
7163 }
1c8f6a4d
KLC		 7164 else if (N32_RT5 (insn) == REG_R15
7165 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7166 {
7167 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7168 insn_type = NDS32_INSN_BEQZS8;
7169 }
7170 break;
7171
7172 case N32_BR2_BNEZ:
7173 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7174 {
7175 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7176 insn_type = NDS32_INSN_BNEZ38;
7177 }
1c8f6a4d
KLC		 7178 else if (N32_RT5 (insn) == REG_R15
7179 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7180 {
7181 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7182 insn_type = NDS32_INSN_BNEZS8;
7183 }
7184 break;
7185
7186 case N32_BR2_IFCALL:
7187 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7188 {
7189 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7190 insn_type = NDS32_INSN_IFCALL9;
7191 }
7192 break;
7193 }
7194 break;
7195
7196 case N32_OP6_JI:
4ec521f2 7197 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 7198 {
7199 /* N32_JI_J */
7200 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7201 {
7202 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7203 insn_type = NDS32_INSN_J8;
7204 }
7205 }
7206 break;
7207
7208 case N32_OP6_JREG:
7209 if (__GF (insn, 8, 2) != 0)
7210 goto done;
7211
7212 switch (N32_IMMU (insn, 5))
7213 {
7214 case N32_JREG_JR:
7215 if (N32_JREG_HINT (insn) == 0)
7216 {
7217 /* jr */
7218 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7219 insn_type = NDS32_INSN_JR5;
7220 }
7221 else if (N32_JREG_HINT (insn) == 1)
7222 {
7223 /* ret */
7224 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7225 insn_type = NDS32_INSN_RET5;
7226 }
7227 else if (N32_JREG_HINT (insn) == 3)
7228 {
7229 /* ifret = mov55 $sp, $sp */
7230 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7231 insn_type = NDS32_INSN_IFRET;
7232 }
7233 break;
7234
7235 case N32_JREG_JRAL:
7236 /* It's convertible when return rt5 is $lp and address
7237 translation is kept. */
7238 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7239 {
7240 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7241 insn_type = NDS32_INSN_JRAL5;
7242 }
7243 break;
7244 }
7245 break;
7246
7247 case N32_OP6_MISC:
7248 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7249 {
7250 /* For v3, swid above 31 are used for ex9.it. */
7251 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7252 insn_type = NDS32_INSN_BREAK16;
7253 }
7254 break;
7255
7256 default:
7257 /* This instruction has no 16-bit variant. */
7258 goto done;
7259 }
7260
7261done:
7262 /* Bit-15 of insn16 should be set for a valid instruction. */
7263 if ((insn16 & 0x8000) == 0)
7264 return 0;
7265
7266 if (pinsn16)
7267 *pinsn16 = insn16;
7268 if (pinsn_type)
7269 *pinsn_type = insn_type;
7270 return 1;
7271}
7272
7273static int
7274special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7275 Elf_Internal_Rela *reloc)
7276{
7277 uint16_t insn16 = 0;
7278
7279 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7280 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7281 return 0;
7282
7283 if (!N32_IS_RT3 (insn))
7284 return 0;
7285
7286 switch (N32_OP6 (insn))
7287 {
7288 case N32_OP6_LWI:
7289 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7290 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7291 break;
7292 case N32_OP6_SWI:
7293 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7294 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7295 break;
7296 case N32_OP6_HWGP:
7297 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7298 break;
7299
7300 if (__GF (insn, 17, 3) == 6)
7301 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7302 else if (__GF (insn, 17, 3) == 7)
7303 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7304 break;
7305 }
7306
7307 if ((insn16 & 0x8000) == 0)
7308 return 0;
7309
7310 *pinsn16 = insn16;
7311 return 1;
7312}
7313
7314/* Convert a 16-bit instruction to 32-bit one.
7315 INSN16 it the input and PINSN it the point to output.
7316 Return non-zero on successful. Otherwise 0 is returned. */
7317
7318int
7319nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7320{
7321 uint32_t insn = 0xffffffff;
7322 unsigned long mach = bfd_get_mach (abfd);
7323
7324 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7325
7326 switch (__GF (insn16, 9, 6))
7327 {
7328 case 0x4: /* add45 */
1c8f6a4d
KLC		 7329 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7330 N16_RA5 (insn16));
35c08157
KLC		 7331 goto done;
7332 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7333 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7334 N16_RA5 (insn16));
35c08157
KLC		 7335 goto done;
7336 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7337 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7338 N16_IMM5U (insn16));
35c08157
KLC		 7339 goto done;
7340 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7341 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7342 -N16_IMM5U (insn16));
35c08157
KLC		 7343 goto done;
7344 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7345 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7346 N16_IMM5U (insn16));
35c08157
KLC		 7347 goto done;
7348 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7349 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7350 N16_IMM5U (insn16));
35c08157 7351 goto done;
35c08157 7352 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7353 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7354 N16_IMM3U (insn16));
35c08157
KLC		 7355 goto done;
7356 case 0xc: /* add333 */
1c8f6a4d
KLC		 7357 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7358 N16_RB3 (insn16));
35c08157
KLC		 7359 goto done;
7360 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7361 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7362 N16_RB3 (insn16));
35c08157
KLC		 7363 goto done;
7364 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7365 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7366 N16_IMM3U (insn16));
35c08157
KLC		 7367 goto done;
7368 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7369 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7370 -N16_IMM3U (insn16));
35c08157 7371 goto done;
35c08157 7372 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7373 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7374 N16_IMM3U (insn16));
35c08157
KLC		 7375 goto done;
7376 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7377 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7378 N16_IMM3U (insn16));
35c08157
KLC		 7379 goto done;
7380 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7381 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7382 N16_IMM3U (insn16));
35c08157
KLC		 7383 goto done;
7384 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7385 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7386 N16_IMM3U (insn16));
35c08157
KLC		 7387 goto done;
7388 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7389 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7390 N16_IMM3U (insn16));
35c08157
KLC		 7391 goto done;
7392 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7393 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7394 N16_IMM3U (insn16));
35c08157
KLC		 7395 goto done;
7396 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7397 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7398 N16_IMM3U (insn16));
35c08157
KLC		 7399 goto done;
7400 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7401 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7402 N16_IMM3U (insn16));
35c08157 7403 goto done;
35c08157 7404 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7405 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7406 N16_IMM6U (insn16) << 2);
35c08157 7407 goto done;
35c08157 7408 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7409 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7410 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7411 goto done;
7412 case 0x1a: /* lwi450 */
7413 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7414 goto done;
7415 case 0x1b: /* swi450 */
7416 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7417 goto done;
7418
1c8f6a4d 7419 /* These are r15 implied instructions. */
35c08157
KLC		 7420 case 0x30: /* slts45 */
7421 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7422 goto done;
7423 case 0x31: /* slt45 */
7424 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7425 goto done;
7426 case 0x32: /* sltsi45 */
7427 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7428 goto done;
7429 case 0x33: /* slti45 */
7430 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7431 goto done;
7432 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 7433 if (insn16 & N32_BIT (8))
35c08157
KLC		 7434 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7435 else
7436 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7437 goto done;
7438
7439 case 0x35: /* break16, ex9.it */
7440 /* Only consider range of v3 break16. */
7441 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7442 goto done;
7443
7444 case 0x3c: /* ifcall9 */
7445 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7446 goto done;
7447 case 0x3d: /* movpi45 */
7448 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7449 goto done;
7450
7451 case 0x3f: /* MISC33 */
1c8f6a4d 7452 switch (insn16 & 0x7)
35c08157
KLC		 7453 {
7454 case 2: /* neg33 */
7455 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7456 break;
7457 case 3: /* not33 */
1c8f6a4d
KLC		 7458 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7459 N16_RA3 (insn16));
35c08157
KLC		 7460 break;
7461 case 4: /* mul33 */
1c8f6a4d
KLC		 7462 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7463 N16_RA3 (insn16));
35c08157
KLC		 7464 break;
7465 case 5: /* xor33 */
1c8f6a4d
KLC		 7466 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7467 N16_RA3 (insn16));
35c08157
KLC		 7468 break;
7469 case 6: /* and33 */
1c8f6a4d
KLC		 7470 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7471 N16_RA3 (insn16));
35c08157
KLC		 7472 break;
7473 case 7: /* or33 */
1c8f6a4d
KLC		 7474 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7475 N16_RA3 (insn16));
35c08157
KLC		 7476 break;
7477 }
7478 goto done;
7479
1c8f6a4d 7480 case 0xb:
35c08157
KLC		 7481 switch (insn16 & 0x7)
7482 {
7483 case 0: /* zeb33 */
7484 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7485 break;
7486 case 1: /* zeh33 */
7487 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7488 break;
7489 case 2: /* seb33 */
7490 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7491 break;
7492 case 3: /* seh33 */
7493 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7494 break;
7495 case 4: /* xlsb33 */
7496 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7497 break;
7498 case 5: /* x11b33 */
7499 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7500 break;
7501 case 6: /* bmski33 */
7502 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7503 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7504 break;
7505 case 7: /* fexti33 */
7506 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7507 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7508 break;
7509 }
7510 goto done;
7511 }
7512
7513 switch (__GF (insn16, 10, 5))
7514 {
7515 case 0x0: /* mov55 or ifret16 */
7516 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7517 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7518 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7519 else
1c8f6a4d 7520 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7521 goto done;
7522 case 0x1: /* movi55 */
7523 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7524 goto done;
7525 case 0x1b: /* addi10s (V2) */
7526 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7527 goto done;
7528 }
7529
7530 switch (__GF (insn16, 11, 4))
7531 {
7532 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 7533 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 7534 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7535 else /* lwi37.fp */
7536 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7537 goto done;
7538 case 0x8: /* beqz38 */
7539 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7540 goto done;
7541 case 0x9: /* bnez38 */
7542 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7543 goto done;
7544 case 0xa: /* beqs38/j8, implied r5 */
7545 if (N16_RT38 (insn16) == 5)
7546 insn = N32_JI (J, N16_IMM8S (insn16));
7547 else
7548 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7549 goto done;
7550 case 0xb: /* bnes38 and others */
7551 if (N16_RT38 (insn16) == 5)
7552 {
7553 switch (__GF (insn16, 5, 3))
7554 {
7555 case 0: /* jr5 */
7556 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7557 break;
7558 case 4: /* ret5 */
7559 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7560 break;
7561 case 1: /* jral5 */
7562 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7563 break;
7564 case 2: /* ex9.it imm5 */
7565 /* ex9.it had no 32-bit variantl. */
7566 break;
7567 case 5: /* add5.pc */
7568 /* add5.pc had no 32-bit variantl. */
7569 break;
7570 }
7571 }
7572 else /* bnes38 */
7573 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7574 goto done;
7575 case 0xe: /* lwi37/swi37 */
7576 if (insn16 & (1 << 7)) /* swi37.sp */
7577 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7578 else /* lwi37.sp */
7579 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7580 goto done;
7581 }
7582
7583done:
7584 if (insn & 0x80000000)
7585 return 0;
7586
7587 if (pinsn)
7588 *pinsn = insn;
7589 return 1;
7590}
7591\f
7592static bfd_boolean
7593is_sda_access_insn (unsigned long insn)
7594{
7595 switch (N32_OP6 (insn))
7596 {
7597 case N32_OP6_LWI:
7598 case N32_OP6_LHI:
7599 case N32_OP6_LHSI:
7600 case N32_OP6_LBI:
7601 case N32_OP6_LBSI:
7602 case N32_OP6_SWI:
7603 case N32_OP6_SHI:
7604 case N32_OP6_SBI:
7605 case N32_OP6_LWC:
7606 case N32_OP6_LDC:
7607 case N32_OP6_SWC:
7608 case N32_OP6_SDC:
7609 return TRUE;
7610 default:
7611 ;
7612 }
7613 return FALSE;
7614}
7615
7616static unsigned long
7617turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7618{
7619 uint32_t oinsn = 0;
7620
7621 switch (type)
7622 {
7623 case R_NDS32_GOT_LO12:
7624 case R_NDS32_GOTOFF_LO12:
7625 case R_NDS32_PLTREL_LO12:
7626 case R_NDS32_PLT_GOTREL_LO12:
7627 case R_NDS32_LO12S0_RELA:
7628 switch (N32_OP6 (insn))
7629 {
7630 case N32_OP6_LBI:
7631 /* lbi.gp */
7632 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7633 break;
7634 case N32_OP6_LBSI:
7635 /* lbsi.gp */
4ec521f2 7636 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7637 break;
7638 case N32_OP6_SBI:
7639 /* sbi.gp */
7640 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7641 break;
7642 case N32_OP6_ORI:
7643 /* addi.gp */
4ec521f2 7644 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7645 break;
7646 }
7647 break;
7648
7649 case R_NDS32_LO12S1_RELA:
7650 switch (N32_OP6 (insn))
7651 {
7652 case N32_OP6_LHI:
7653 /* lhi.gp */
7654 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7655 break;
7656 case N32_OP6_LHSI:
7657 /* lhsi.gp */
4ec521f2 7658 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 7659 break;
7660 case N32_OP6_SHI:
7661 /* shi.gp */
4ec521f2 7662 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7663 break;
7664 }
7665 break;
7666
7667 case R_NDS32_LO12S2_RELA:
7668 switch (N32_OP6 (insn))
7669 {
7670 case N32_OP6_LWI:
7671 /* lwi.gp */
7672 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7673 break;
7674 case N32_OP6_SWI:
7675 /* swi.gp */
7676 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7677 break;
7678 }
7679 break;
7680
7681 case R_NDS32_LO12S2_DP_RELA:
7682 case R_NDS32_LO12S2_SP_RELA:
7683 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7684 break;
7685 }
7686
7687 if (oinsn)
7688 *pinsn = oinsn;
7689
7690 return oinsn != 0;
7691}
7692
7693/* Linker hasn't found the correct merge section for non-section symbol
7694 in relax time, this work is left to the function elf_link_input_bfd().
7695 So for non-section symbol, _bfd_merged_section_offset is also needed
7696 to find the correct symbol address. */
7697
7698static bfd_vma
7699nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7700 asection **psec, Elf_Internal_Rela *rel)
7701{
7702 asection *sec = *psec;
7703 bfd_vma relocation;
7704
7705 relocation = (sec->output_section->vma
7706 + sec->output_offset + sym->st_value);
7707 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7708 {
7709 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7710 rel->r_addend =
7711 _bfd_merged_section_offset (abfd, psec,
7712 elf_section_data (sec)->sec_info,
7713 sym->st_value + rel->r_addend);
7714 else
7715 rel->r_addend =
7716 _bfd_merged_section_offset (abfd, psec,
7717 elf_section_data (sec)->sec_info,
7718 sym->st_value) + rel->r_addend;
7719
7720 if (sec != *psec)
7721 {
7722 /* If we have changed the section, and our original section is
7723 marked with SEC_EXCLUDE, it means that the original
7724 SEC_MERGE section has been completely subsumed in some
7725 other SEC_MERGE section. In this case, we need to leave
7726 some info around for --emit-relocs. */
7727 if ((sec->flags & SEC_EXCLUDE) != 0)
7728 sec->kept_section = *psec;
7729 sec = *psec;
7730 }
7731 rel->r_addend -= relocation;
7732 rel->r_addend += sec->output_section->vma + sec->output_offset;
7733 }
7734 return relocation;
7735}
7736
7737static bfd_vma
7738calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7739 Elf_Internal_Sym *isymbuf,
7740 Elf_Internal_Shdr *symtab_hdr)
7741{
7742 bfd_signed_vma foff;
7743 bfd_vma symval, addend;
7744 Elf_Internal_Rela irel_fn;
7745 Elf_Internal_Sym *isym;
7746 asection *sym_sec;
7747
7748 /* Get the value of the symbol referred to by the reloc. */
7749 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7750 {
7751 /* A local symbol. */
7752 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7753
7754 if (isym->st_shndx == SHN_UNDEF)
7755 sym_sec = bfd_und_section_ptr;
7756 else if (isym->st_shndx == SHN_ABS)
7757 sym_sec = bfd_abs_section_ptr;
7758 else if (isym->st_shndx == SHN_COMMON)
7759 sym_sec = bfd_com_section_ptr;
7760 else
7761 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7762 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7763 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7764 addend = irel_fn.r_addend;
7765 }
7766 else
7767 {
7768 unsigned long indx;
7769 struct elf_link_hash_entry *h;
7770
7771 /* An external symbol. */
7772 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7773 h = elf_sym_hashes (abfd)[indx];
7774 BFD_ASSERT (h != NULL);
7775
7776 while (h->root.type == bfd_link_hash_indirect
7777 || h->root.type == bfd_link_hash_warning)
7778 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7779
7780 if (h->root.type != bfd_link_hash_defined
7781 && h->root.type != bfd_link_hash_defweak)
7782 /* This appears to be a reference to an undefined
7783 symbol. Just ignore it--it will be caught by the
7784 regular reloc processing. */
7785 return 0;
7786
7787 if (h->root.u.def.section->flags & SEC_MERGE)
7788 {
7789 sym_sec = h->root.u.def.section;
7790 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7791 (sym_sec)->sec_info, h->root.u.def.value);
7792 symval = symval + sym_sec->output_section->vma
7793 + sym_sec->output_offset;
7794 }
7795 else
7796 symval = (h->root.u.def.value
7797 + h->root.u.def.section->output_section->vma
7798 + h->root.u.def.section->output_offset);
7799 addend = irel->r_addend;
7800 }
7801
7802 foff = symval + addend;
7803
7804 return foff;
7805}
7806
7807static bfd_vma
7808calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7809 Elf_Internal_Rela *irel,
7810 Elf_Internal_Shdr *symtab_hdr)
7811{
7812 int symndx;
7813 bfd_vma *local_got_offsets;
7814 /* Get the value of the symbol referred to by the reloc. */
7815 struct elf_link_hash_entry *h;
7816 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7817
7818 /* An external symbol. */
7819 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7820 h = elf_sym_hashes (abfd)[symndx];
7821 while (h->root.type == bfd_link_hash_indirect
7822 || h->root.type == bfd_link_hash_warning)
7823 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7824
7825 if (symndx >= 0)
7826 {
7827 BFD_ASSERT (h != NULL);
ce558b89
AM		 7828 return (htab->root.sgot->output_section->vma
7829 + htab->root.sgot->output_offset
7830 + h->got.offset);
35c08157
KLC		 7831 }
7832 else
7833 {
7834 local_got_offsets = elf_local_got_offsets (abfd);
7835 BFD_ASSERT (local_got_offsets != NULL);
ce558b89
AM		 7836 return (htab->root.sgot->output_section->vma
7837 + htab->root.sgot->output_offset
7838 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
35c08157
KLC		 7839 }
7840
7841 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7842 /* The check of h->root.type is passed. */
7843}
7844
7845static int
7846is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7847 asection *sec, Elf_Internal_Rela *rel)
7848{
7849 bfd_byte *contents;
7850 unsigned short insn16;
7851
7852 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7853 return FALSE;
7854 contents = elf_section_data (sec)->this_hdr.contents;
7855 insn16 = bfd_getb16 (contents + rel->r_offset);
7856 if (insn16 == NDS32_NOP16)
7857 return TRUE;
7858 return FALSE;
7859}
7860
7861/* It checks whether the instruction could be converted to
7862 16-bit form and returns the converted one.
7863
7864 `internal_relocs' is supposed to be sorted. */
7865
7866static int
7867is_convert_32_to_16 (bfd *abfd, asection *sec,
7868 Elf_Internal_Rela *reloc,
7869 Elf_Internal_Rela *internal_relocs,
7870 Elf_Internal_Rela *irelend,
7871 uint16_t *insn16)
7872{
7873#define NORMAL_32_TO_16 (1 << 0)
7874#define SPECIAL_32_TO_16 (1 << 1)
7875 bfd_byte *contents = NULL;
7876 bfd_signed_vma off;
7877 bfd_vma mem_addr;
7878 uint32_t insn = 0;
7879 Elf_Internal_Rela *pc_rel;
7880 int pic_ext_target = 0;
7881 Elf_Internal_Shdr *symtab_hdr;
7882 Elf_Internal_Sym *isymbuf = NULL;
7883 int convert_type;
7884 bfd_vma offset;
7885
7886 if (reloc->r_offset + 4 > sec->size)
7887 return FALSE;
7888
7889 offset = reloc->r_offset;
7890
0c4bd9d9 7891 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 7892 return FALSE;
7893 insn = bfd_getb32 (contents + offset);
7894
7895 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7896 convert_type = NORMAL_32_TO_16;
7897 else if (special_convert_32_to_16 (insn, insn16, reloc))
7898 convert_type = SPECIAL_32_TO_16;
7899 else
7900 return FALSE;
7901
7902 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7903 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7904 return FALSE;
7905
7906 /* Find the first relocation of the same relocation-type,
7907 so we iteratie them forward. */
7908 pc_rel = reloc;
1c8f6a4d 7909 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 7910 pc_rel--;
7911
7912 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7913 {
7914 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7915 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7916 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7917 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7918 {
7919 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7920 &pic_ext_target);
1c8f6a4d
KLC		 7921 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7922 || off == 0)
35c08157
KLC		 7923 return FALSE;
7924 break;
7925 }
7926 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7927 {
7928 /* movi => movi55 */
1c8f6a4d
KLC		 7929 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7930 symtab_hdr);
7931 /* mem_addr is unsigned, but the value should
7932 be between [-16, 15]. */
35c08157
KLC		 7933 if ((mem_addr + 0x10) >> 5)
7934 return FALSE;
7935 break;
7936 }
1c8f6a4d
KLC		 7937 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7938 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7939 {
7940 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7941 because it can be relaxed to addi for TLS_LE_ADD. */
7942 return FALSE;
7943 }
35c08157
KLC		 7944 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7945 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7946 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7947 && convert_type == SPECIAL_32_TO_16)
7948 {
7949 /* fp-as-gp
7950 We've selected a best fp-base for this access, so we can
7951 always resolve it anyway. Do nothing. */
7952 break;
7953 }
7954 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7955 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7956 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7957 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7958 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7959 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7960 {
1c8f6a4d
KLC		 7961 /* Prevent unresolved addi instruction translate
7962 to addi45 or addi333. */
35c08157
KLC		 7963 return FALSE;
7964 }
1c8f6a4d
KLC		 7965 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
7966 {
7967 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7968 &pic_ext_target);
7969 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
7970 return FALSE;
7971 break;
7972 }
35c08157
KLC		 7973 }
7974
7975 return TRUE;
7976}
7977
7978static void
7979nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
7980 Elf_Internal_Rela *reloc,
7981 Elf_Internal_Rela *internal_relocs,
7982 Elf_Internal_Rela *irelend,
7983 unsigned short insn16)
7984{
7985 Elf_Internal_Rela *pc_rel;
7986 bfd_vma offset;
7987
7988 offset = reloc->r_offset;
7989 bfd_putb16 (insn16, contents + offset);
7990 /* Find the first relocation of the same relocation-type,
7991 so we iteratie them forward. */
7992 pc_rel = reloc;
7993 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
7994 pc_rel--;
7995
7996 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7997 {
7998 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7999 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8000 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8001 {
8002 pc_rel->r_info =
8003 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8004 }
8005 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8006 pc_rel->r_info =
8007 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8008 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8009 pc_rel->r_info =
8010 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8011 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8012 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8013 pc_rel->r_info =
8014 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8015 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8016 pc_rel->r_info =
8017 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8018 }
8019}
8020
8021/* Find a relocation of type specified by `reloc_type'
8022 of the same r_offset with reloc.
8023 If not found, return irelend.
8024
8025 Assuming relocations are sorted by r_offset,
8026 we find the relocation from `reloc' backward untill relocs,
8027 or find it from `reloc' forward untill irelend. */
8028
8029static Elf_Internal_Rela *
8030find_relocs_at_address (Elf_Internal_Rela *reloc,
8031 Elf_Internal_Rela *relocs,
8032 Elf_Internal_Rela *irelend,
8033 enum elf_nds32_reloc_type reloc_type)
8034{
8035 Elf_Internal_Rela *rel_t;
8036
8037 /* Find backward. */
8038 for (rel_t = reloc;
8039 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8040 rel_t--)
8041 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8042 return rel_t;
8043
1c8f6a4d 8044 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8045 for (rel_t = reloc;
8046 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8047 rel_t++)
8048 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8049 return rel_t;
8050
8051 return irelend;
8052}
8053
8054/* Find a relocation of specified type and offset.
8055 `reloc' is just a refence point to find a relocation at specified offset.
8056 If not found, return irelend.
8057
8058 Assuming relocations are sorted by r_offset,
8059 we find the relocation from `reloc' backward untill relocs,
8060 or find it from `reloc' forward untill irelend. */
8061
8062static Elf_Internal_Rela *
8063find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8064 Elf_Internal_Rela *relocs,
8065 Elf_Internal_Rela *irelend,
6cae483a 8066 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8067 bfd_vma offset_p)
8068{
8069 Elf_Internal_Rela *rel_t = NULL;
8070
8071 /* First, we try to find a relocation of offset `offset_p',
8072 and then we use find_relocs_at_address to find specific type. */
8073
8074 if (reloc->r_offset > offset_p)
8075 {
8076 /* Find backward. */
8077 for (rel_t = reloc;
8078 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8079 /* Do nothing. */;
8080 }
8081 else if (reloc->r_offset < offset_p)
8082 {
8083 /* Find forward. */
8084 for (rel_t = reloc;
8085 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8086 /* Do nothing. */;
8087 }
8088 else
8089 rel_t = reloc;
8090
8091 /* Not found? */
8092 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8093 return irelend;
8094
8095 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8096}
8097
8098static bfd_boolean
8099nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8100 Elf_Internal_Rela *internal_relocs,
8101 Elf_Internal_Rela *irelend,
8102 unsigned char reloc_type)
8103{
8104 Elf_Internal_Rela *rel_t;
8105
8106 for (rel_t = reloc;
8107 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8108 rel_t--)
8109 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8110 {
8111 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8112 && rel_t->r_addend == reloc->r_addend)
8113 continue;
8114 return TRUE;
8115 }
8116
8117 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8118 rel_t++)
8119 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8120 {
8121 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8122 && rel_t->r_addend == reloc->r_addend)
8123 continue;
8124 return TRUE;
8125 }
8126
8127 return FALSE;
8128}
8129
8130typedef struct nds32_elf_blank nds32_elf_blank_t;
8131struct nds32_elf_blank
8132{
8133 /* Where the blank begins. */
8134 bfd_vma offset;
8135 /* The size of the blank. */
8136 bfd_vma size;
8137 /* The accumulative size before this blank. */
8138 bfd_vma total_size;
8139 nds32_elf_blank_t *next;
8140 nds32_elf_blank_t *prev;
8141};
8142
8143static nds32_elf_blank_t *blank_free_list = NULL;
8144
8145static nds32_elf_blank_t *
8146create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8147{
8148 nds32_elf_blank_t *blank_t;
8149
8150 if (blank_free_list)
8151 {
8152 blank_t = blank_free_list;
8153 blank_free_list = blank_free_list->next;
8154 }
8155 else
8156 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8157
8158 if (blank_t == NULL)
8159 return NULL;
8160
8161 blank_t->offset = offset_p;
8162 blank_t->size = size_p;
8163 blank_t->total_size = 0;
8164 blank_t->next = NULL;
8165 blank_t->prev = NULL;
8166
8167 return blank_t;
8168}
8169
8170static void
8171remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8172{
8173 if (blank_free_list)
8174 {
8175 blank_free_list->prev = blank_p;
8176 blank_p->next = blank_free_list;
8177 }
8178 else
8179 blank_p->next = NULL;
8180
8181 blank_p->prev = NULL;
8182 blank_free_list = blank_p;
8183}
8184
8185static void
8186clean_nds32_elf_blank (void)
8187{
8188 nds32_elf_blank_t *blank_t;
8189
8190 while (blank_free_list)
8191 {
8192 blank_t = blank_free_list;
8193 blank_free_list = blank_free_list->next;
8194 free (blank_t);
8195 }
8196}
8197
8198static nds32_elf_blank_t *
8199search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8200{
8201 nds32_elf_blank_t *blank_t;
8202
8203 if (!blank_p)
8204 return NULL;
8205 blank_t = blank_p;
8206
8207 while (blank_t && addr < blank_t->offset)
8208 blank_t = blank_t->prev;
8209 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8210 blank_t = blank_t->next;
8211
8212 return blank_t;
8213}
8214
8215static bfd_vma
8216get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8217 int overwrite)
8218{
8219 nds32_elf_blank_t *blank_t;
8220
8221 blank_t = search_nds32_elf_blank (*blank_p, addr);
8222 if (!blank_t)
8223 return 0;
8224
8225 if (overwrite)
8226 *blank_p = blank_t;
8227
8228 if (addr < blank_t->offset + blank_t->size)
8229 return blank_t->total_size + (addr - blank_t->offset);
8230 else
8231 return blank_t->total_size + blank_t->size;
8232}
8233
8234static bfd_boolean
8235insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8236{
8237 nds32_elf_blank_t *blank_t, *blank_t2;
8238
8239 if (!*blank_p)
8240 {
8241 *blank_p = create_nds32_elf_blank (addr, len);
8242 return *blank_p ? TRUE : FALSE;
8243 }
8244
8245 blank_t = search_nds32_elf_blank (*blank_p, addr);
8246
8247 if (blank_t == NULL)
8248 {
8249 blank_t = create_nds32_elf_blank (addr, len);
8250 if (!blank_t)
8251 return FALSE;
8252 while ((*blank_p)->prev != NULL)
8253 *blank_p = (*blank_p)->prev;
8254 blank_t->next = *blank_p;
8255 (*blank_p)->prev = blank_t;
8256 (*blank_p) = blank_t;
8257 return TRUE;
8258 }
8259
8260 if (addr < blank_t->offset + blank_t->size)
8261 {
8262 if (addr > blank_t->offset + blank_t->size)
8263 blank_t->size = addr - blank_t->offset;
8264 }
8265 else
8266 {
8267 blank_t2 = create_nds32_elf_blank (addr, len);
8268 if (!blank_t2)
8269 return FALSE;
8270 if (blank_t->next)
8271 {
8272 blank_t->next->prev = blank_t2;
8273 blank_t2->next = blank_t->next;
8274 }
8275 blank_t2->prev = blank_t;
8276 blank_t->next = blank_t2;
8277 *blank_p = blank_t2;
8278 }
8279
8280 return TRUE;
8281}
8282
8283static bfd_boolean
8284insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8285 bfd_vma len)
8286{
8287 nds32_elf_blank_t *blank_t;
8288
8289 if (!insert_nds32_elf_blank (blank_p, addr, len))
8290 return FALSE;
8291
8292 blank_t = *blank_p;
8293
8294 if (!blank_t->prev)
8295 {
8296 blank_t->total_size = 0;
8297 blank_t = blank_t->next;
8298 }
8299
8300 while (blank_t)
8301 {
8302 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8303 blank_t = blank_t->next;
8304 }
8305
8306 return TRUE;
8307}
8308
8309static void
8310calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8311{
8312 nds32_elf_blank_t *blank_t;
8313 bfd_vma total_size = 0;
8314
8315 if (!blank_p)
8316 return;
8317
8318 blank_t = blank_p;
8319 while (blank_t->prev)
8320 blank_t = blank_t->prev;
8321 while (blank_t)
8322 {
8323 blank_t->total_size = total_size;
8324 total_size += blank_t->size;
8325 blank_t = blank_t->next;
8326 }
8327}
8328
8329static bfd_boolean
8330nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8331 nds32_elf_blank_t *blank_p)
8332{
8333 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8334 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8335 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8336 unsigned int sec_shndx; /* The section the be relaxed. */
8337 bfd_byte *contents; /* Contents data of iterating section. */
8338 Elf_Internal_Rela *internal_relocs;
8339 Elf_Internal_Rela *irel;
8340 Elf_Internal_Rela *irelend;
8341 struct elf_link_hash_entry **sym_hashes;
8342 struct elf_link_hash_entry **end_hashes;
8343 unsigned int symcount;
8344 asection *sect;
8345 nds32_elf_blank_t *blank_t;
8346 nds32_elf_blank_t *blank_t2;
8347 nds32_elf_blank_t *blank_head;
8348
8349 blank_head = blank_t = blank_p;
8350 while (blank_head->prev != NULL)
8351 blank_head = blank_head->prev;
8352 while (blank_t->next != NULL)
8353 blank_t = blank_t->next;
8354
8355 if (blank_t->offset + blank_t->size <= sec->size)
8356 {
8357 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8358 blank_t->next->prev = blank_t;
8359 }
8360 if (blank_head->offset > 0)
8361 {
8362 blank_head->prev = create_nds32_elf_blank (0, 0);
8363 blank_head->prev->next = blank_head;
8364 blank_head = blank_head->prev;
8365 }
8366
8367 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8368
8369 /* The deletion must stop at the next ALIGN reloc for an alignment
8370 power larger than the number of bytes we are deleting. */
8371
8372 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8373 if (!nds32_get_local_syms (abfd, sec, &isym))
8374 return FALSE;
8375
8376 if (isym == NULL)
8377 {
8378 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8379 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8380 symtab_hdr->contents = (bfd_byte *) isym;
8381 }
8382
8383 if (isym == NULL || symtab_hdr->sh_info == 0)
8384 return FALSE;
8385
8386 blank_t = blank_head;
8387 calc_nds32_blank_total (blank_head);
8388
8389 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8390 {
8391 /* Adjust all the relocs. */
8392
8393 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8394 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8395 TRUE /* keep_memory */);
8396 irelend = internal_relocs + sect->reloc_count;
8397
8398 blank_t = blank_head;
8399 blank_t2 = blank_head;
8400
8401 if (!(sect->flags & SEC_RELOC))
8402 continue;
8403
0c4bd9d9 8404 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8405
8406 for (irel = internal_relocs; irel < irelend; irel++)
8407 {
8408 bfd_vma raddr;
8409
8410 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8411 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8412 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8413 {
8414 unsigned long val = 0;
1c8f6a4d
KLC		 8415 unsigned long mask;
8416 long before, between;
6cae483a 8417 long offset = 0;
35c08157
KLC		 8418
8419 switch (ELF32_R_TYPE (irel->r_info))
8420 {
8421 case R_NDS32_DIFF8:
1c8f6a4d 8422 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8423 break;
8424 case R_NDS32_DIFF16:
1c8f6a4d 8425 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8426 break;
8427 case R_NDS32_DIFF32:
8428 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8429 /* Get the signed bit and mask for the high part. The
8430 gcc will alarm when right shift 32-bit since the
8431 type size of long may be 32-bit. */
8432 mask = 0 - (val >> 31);
8433 if (mask)
8434 offset = (val | (mask - 0xffffffff));
8435 else
8436 offset = val;
35c08157
KLC		 8437 break;
8438 default:
8439 BFD_ASSERT (0);
8440 }
8441
8442 /* DIFF value
8443 0 |encoded in location|
8444 |------------|-------------------|---------
8445 sym+off(addend)
8446 -- before ---| *****************
8447 --------------------- between ---|
8448
1c8f6a4d
KLC		 8449 We only care how much data are relax between DIFF,
8450 marked as ***. */
35c08157
KLC		 8451
8452 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8453 between = get_nds32_elf_blank_total (&blank_t,
8454 irel->r_addend + offset, 0);
35c08157
KLC		 8455 if (between == before)
8456 goto done_adjust_diff;
8457
8458 switch (ELF32_R_TYPE (irel->r_info))
8459 {
8460 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8461 bfd_put_8 (abfd, offset - (between - before),
8462 contents + irel->r_offset);
35c08157
KLC		 8463 break;
8464 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8465 bfd_put_16 (abfd, offset - (between - before),
8466 contents + irel->r_offset);
35c08157
KLC		 8467 break;
8468 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8469 bfd_put_32 (abfd, offset - (between - before),
8470 contents + irel->r_offset);
35c08157
KLC		 8471 break;
8472 }
8473 }
8474 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8475 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8476 {
8477 bfd_vma val = 0;
8478 unsigned int len = 0;
8479 unsigned long before, between;
8480 bfd_byte *endp, *p;
8481
4265548c
PA		 8482 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8483 &len);
35c08157
KLC		 8484
8485 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8486 between = get_nds32_elf_blank_total (&blank_t,
8487 irel->r_addend + val, 0);
35c08157
KLC		 8488 if (between == before)
8489 goto done_adjust_diff;
8490
8491 p = contents + irel->r_offset;
8492 endp = p + len -1;
8493 memset (p, 0x80, len);
8494 *(endp) = 0;
8495 p = write_uleb128 (p, val - (between - before)) - 1;
8496 if (p < endp)
8497 *p |= 0x80;
8498 }
8499done_adjust_diff:
8500
8501 if (sec == sect)
8502 {
8503 raddr = irel->r_offset;
1c8f6a4d
KLC		 8504 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8505 irel->r_offset, 1);
35c08157
KLC		 8506
8507 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8508 continue;
8509 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8510 && (blank_t2->offset > raddr
8511 || blank_t2->next->offset <= raddr))
4eca0228 8512 _bfd_error_handler
38f14ab8
AM		 8513 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
8514 abfd);
35c08157
KLC		 8515
8516 /* Mark reloc in deleted portion as NONE.
8517 For some relocs like R_NDS32_LABEL that doesn't modify the
8518 content in the section. R_NDS32_LABEL doesn't belong to the
8519 instruction in the section, so we should preserve it. */
8520 if (raddr >= blank_t2->offset
8521 && raddr < blank_t2->offset + blank_t2->size
8522 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8523 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8524 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8525 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8526 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8527 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8528 {
8529 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8530 R_NDS32_NONE);
8531 continue;
8532 }
8533 }
8534
8535 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8536 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8537 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8538 continue;
8539
8540 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8541 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8542 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8543 {
8544 if (irel->r_addend <= sec->size)
8545 irel->r_addend -=
8546 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8547 }
8548 }
8549 }
8550
8551 /* Adjust the local symbols defined in this section. */
8552 blank_t = blank_head;
8553 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8554 {
8555 if (isym->st_shndx == sec_shndx)
8556 {
8557 if (isym->st_value <= sec->size)
8558 {
8559 bfd_vma ahead;
8560 bfd_vma orig_addr = isym->st_value;
8561
8562 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8563 isym->st_value -= ahead;
8564
8565 /* Adjust function size. */
1c8f6a4d
KLC		 8566 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8567 && isym->st_size > 0)
8568 isym->st_size -=
8569 get_nds32_elf_blank_total
8570 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8571 }
8572 }
8573 }
8574
8575 /* Now adjust the global symbols defined in this section. */
8576 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8577 - symtab_hdr->sh_info);
8578 sym_hashes = elf_sym_hashes (abfd);
8579 end_hashes = sym_hashes + symcount;
8580 blank_t = blank_head;
8581 for (; sym_hashes < end_hashes; sym_hashes++)
8582 {
8583 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8584
8585 if ((sym_hash->root.type == bfd_link_hash_defined
8586 || sym_hash->root.type == bfd_link_hash_defweak)
8587 && sym_hash->root.u.def.section == sec)
8588 {
8589 if (sym_hash->root.u.def.value <= sec->size)
8590 {
8591 bfd_vma ahead;
8592 bfd_vma orig_addr = sym_hash->root.u.def.value;
8593
8594 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8595 sym_hash->root.u.def.value -= ahead;
8596
8597 /* Adjust function size. */
8598 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8599 sym_hash->size -=
8600 get_nds32_elf_blank_total
8601 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8602
8603 }
8604 }
8605 }
8606
8607 contents = elf_section_data (sec)->this_hdr.contents;
8608 blank_t = blank_head;
8609 while (blank_t->next)
8610 {
8611 /* Actually delete the bytes. */
8612
8613 /* If current blank is the last blank overlap with current section,
8614 go to finish process. */
8615 if (sec->size <= (blank_t->next->offset))
8616 break;
8617
8618 memmove (contents + blank_t->offset - blank_t->total_size,
8619 contents + blank_t->offset + blank_t->size,
8620 blank_t->next->offset - (blank_t->offset + blank_t->size));
8621
8622 blank_t = blank_t->next;
8623 }
8624
8625 if (sec->size > (blank_t->offset + blank_t->size))
8626 {
8627 /* There are remaining code between blank and section boundary.
8628 Move the remaining code to appropriate location. */
8629 memmove (contents + blank_t->offset - blank_t->total_size,
8630 contents + blank_t->offset + blank_t->size,
8631 sec->size - (blank_t->offset + blank_t->size));
8632 sec->size -= blank_t->total_size + blank_t->size;
8633 }
8634 else
8635 /* This blank is not entirely included in the section,
8636 reduce the section size by only part of the blank size. */
8637 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8638
8639 while (blank_head)
8640 {
8641 blank_t = blank_head;
8642 blank_head = blank_head->next;
8643 remove_nds32_elf_blank (blank_t);
8644 }
8645
8646 return TRUE;
8647}
8648
8649/* Get the contents of a section. */
8650
8651static int
0c4bd9d9
KLC		 8652nds32_get_section_contents (bfd *abfd, asection *sec,
8653 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8654{
8655 /* Get the section contents. */
8656 if (elf_section_data (sec)->this_hdr.contents != NULL)
8657 *contents_p = elf_section_data (sec)->this_hdr.contents;
8658 else
8659 {
8660 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8661 return FALSE;
0c4bd9d9
KLC		 8662 if (cache)
8663 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8664 }
8665
8666 return TRUE;
8667}
8668
8669/* Get the contents of the internal symbol of abfd. */
8670
8671static int
8672nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8673 Elf_Internal_Sym **isymbuf_p)
8674{
8675 Elf_Internal_Shdr *symtab_hdr;
8676 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8677
8678 /* Read this BFD's local symbols if we haven't done so already. */
8679 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8680 {
8681 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8682 if (*isymbuf_p == NULL)
8683 {
8684 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8685 symtab_hdr->sh_info, 0,
8686 NULL, NULL, NULL);
8687 if (*isymbuf_p == NULL)
8688 return FALSE;
8689 }
8690 }
8691 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8692
8693 return TRUE;
8694}
8695
8696/* Range of small data. */
1c8f6a4d
KLC		 8697static bfd_vma sdata_range[2][2];
8698static bfd_vma const sdata_init_range[2] =
8699{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8700
8701static int
8702nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8703 bfd_byte *contents, bfd_vma addr)
8704{
8705 unsigned long insn = bfd_getb32 (contents + addr);
8706
8707 if (insn & 0x80000000)
8708 return 2;
8709
8710 return 4;
8711}
8712
8713/* Set the gp relax range. We have to measure the safe range
8714 to do gp relaxation. */
8715
8716static void
8717relax_range_measurement (bfd *abfd)
8718{
8719 asection *sec_f, *sec_b;
8720 /* For upper bound. */
8721 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8722 bfd_vma align;
35c08157
KLC		 8723 static int decide_relax_range = 0;
8724 int i;
1c8f6a4d 8725 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8726
8727 if (decide_relax_range)
8728 return;
8729 decide_relax_range = 1;
8730
8731 if (sda_rela_sec == NULL)
8732 {
8733 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8734 for (i = 0; i < range_number; i++)
35c08157
KLC		 8735 {
8736 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8737 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8738 }
8739 return;
8740 }
8741
8742 /* Get the biggest alignment power after the gp located section. */
8743 sec_f = sda_rela_sec->output_section;
8744 sec_b = sec_f->next;
8745 align = 0;
8746 while (sec_b != NULL)
8747 {
8748 if ((unsigned)(1 << sec_b->alignment_power) > align)
8749 align = (1 << sec_b->alignment_power);
8750 sec_b = sec_b->next;
8751 }
8752
8753 /* I guess we can not determine the section before
8754 gp located section, so we assume the align is max page size. */
1c8f6a4d 8755 for (i = 0; i < range_number; i++)
35c08157 8756 {
1c8f6a4d 8757 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 8758 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 8759 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 8760 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8761 }
8762}
8763
8764/* These are macros used to check flags encoded in r_addend.
8765 They are only used by nds32_elf_relax_section (). */
8766#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8767#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8768#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8769#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8770
695344c0
NC		 8771static const char * unrecognized_reloc_msg =
8772 /* xgettext:c-format */
2dcf00ce 8773 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 8774
1c8f6a4d
KLC		 8775/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8776
35c08157 8777static bfd_boolean
1c8f6a4d
KLC		 8778nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8779 Elf_Internal_Rela *internal_relocs, int *insn_len,
8780 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8781 Elf_Internal_Shdr *symtab_hdr)
8782{
8783 /* There are 3 variations for LONGCALL1
8784 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 8785 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8786 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8787 jral5 ta ;
1c8f6a4d
KLC		 8788
8789 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 8790 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8791 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8792 jral ta ;
1c8f6a4d
KLC		 8793
8794 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 8795 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8796 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8797 jral ta ;
1c8f6a4d
KLC		 8798 Check code for -mlong-calls output. */
8799
8800 /* Get the reloc for the address from which the register is
8801 being loaded. This reloc will tell us which function is
8802 actually being called. */
8803
8804 bfd_vma laddr;
8805 int seq_len; /* Original length of instruction sequence. */
35c08157 8806 uint32_t insn;
1c8f6a4d
KLC		 8807 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8808 int pic_ext_target = 0;
8809 bfd_signed_vma foff;
35c08157 8810 uint16_t insn16;
35c08157 8811
1c8f6a4d
KLC		 8812 irelend = internal_relocs + sec->reloc_count;
8813 seq_len = GET_SEQ_LEN (irel->r_addend);
8814 laddr = irel->r_offset;
8815 *insn_len = seq_len;
35c08157 8816
1c8f6a4d
KLC		 8817 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8818 R_NDS32_HI20_RELA, laddr);
8819 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8820 R_NDS32_LO12S0_ORI_RELA,
8821 laddr + 4);
35c08157 8822
1c8f6a4d 8823 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 8824 {
695344c0 8825 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 8826 (uint64_t) irel->r_offset);
1c8f6a4d 8827 return FALSE;
35c08157
KLC		 8828 }
8829
1c8f6a4d
KLC		 8830 /* Get the value of the symbol referred to by the reloc. */
8831 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8832 &pic_ext_target);
35c08157 8833
1c8f6a4d
KLC		 8834 /* This condition only happened when symbol is undefined. */
8835 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8836 || foff >= CONSERVATIVE_24BIT_S1)
8837 return FALSE;
35c08157 8838
1c8f6a4d
KLC		 8839 /* Relax to: jal symbol; 25_PCREL */
8840 /* For simplicity of coding, we are going to modify the section
8841 contents, the section relocs, and the BFD symbol table. We
8842 must tell the rest of the code not to free up this
8843 information. It would be possible to instead create a table
8844 of changes which have to be made, as is done in coff-mips.c;
8845 that would be more work, but would require less memory when
8846 the linker is run. */
8847
8848 /* Replace the long call with a jal. */
8849 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8850 R_NDS32_25_PCREL_RELA);
8851 irel->r_addend = hi_irelfn->r_addend;
8852
8853 /* We don't resolve this here but resolve it in relocate_section. */
8854 insn = INSN_JAL;
8855 bfd_putb32 (insn, contents + irel->r_offset);
8856
8857 hi_irelfn->r_info =
8858 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8859 lo_irelfn->r_info =
8860 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8861 *insn_len = 4;
8862
8863 if (seq_len & 0x2)
8864 {
8865 insn16 = NDS32_NOP16;
8866 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8867 lo_irelfn->r_info =
8868 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8869 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8870 *insn_len += 2;
8871 }
8872 return TRUE;
8873}
35c08157 8874
1c8f6a4d
KLC		 8875#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8876/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 8877
1c8f6a4d
KLC		 8878static bfd_boolean
8879nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8880 Elf_Internal_Rela *internal_relocs, int *insn_len,
8881 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8882 Elf_Internal_Shdr *symtab_hdr)
8883{
8884 /* bltz rt, .L1 ; LONGCALL2
8885 jal symbol ; 25_PCREL
8886 .L1: */
35c08157 8887
1c8f6a4d
KLC		 8888 /* Get the reloc for the address from which the register is
8889 being loaded. This reloc will tell us which function is
8890 actually being called. */
35c08157 8891
1c8f6a4d
KLC		 8892 bfd_vma laddr;
8893 uint32_t insn;
8894 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8895 int pic_ext_target = 0;
8896 bfd_signed_vma foff;
35c08157 8897
1c8f6a4d
KLC		 8898 irelend = internal_relocs + sec->reloc_count;
8899 laddr = irel->r_offset;
8900 i1_irelfn =
8901 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8902 R_NDS32_25_PCREL_RELA, laddr + 4);
8903
8904 if (i1_irelfn == irelend)
35c08157 8905 {
695344c0 8906 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 8907 (uint64_t) irel->r_offset);
1c8f6a4d 8908 return FALSE;
35c08157
KLC		 8909 }
8910
1c8f6a4d 8911 insn = bfd_getb32 (contents + laddr);
35c08157 8912
1c8f6a4d
KLC		 8913 /* Get the value of the symbol referred to by the reloc. */
8914 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8915 &pic_ext_target);
35c08157 8916
1c8f6a4d
KLC		 8917 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8918 || foff >= CONSERVATIVE_16BIT_S1)
8919 return FALSE;
35c08157 8920
1c8f6a4d
KLC		 8921 /* Relax to bgezal rt, label ; 17_PCREL
8922 or bltzal rt, label ; 17_PCREL */
8923
8924 /* Convert to complimentary conditional call. */
8925 insn = CONVERT_CONDITION_CALL (insn);
8926
8927 /* For simplicity of coding, we are going to modify the section
8928 contents, the section relocs, and the BFD symbol table. We
8929 must tell the rest of the code not to free up this
8930 information. It would be possible to instead create a table
8931 of changes which have to be made, as is done in coff-mips.c;
8932 that would be more work, but would require less memory when
8933 the linker is run. */
8934
8935 /* Clean unnessary relocations. */
8936 i1_irelfn->r_info =
8937 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8938 cond_irelfn =
8939 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8940 R_NDS32_17_PCREL_RELA, laddr);
8941 if (cond_irelfn != irelend)
8942 cond_irelfn->r_info =
8943 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8944
8945 /* Replace the long call with a bgezal. */
8946 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8947 R_NDS32_17_PCREL_RELA);
8948 irel->r_addend = i1_irelfn->r_addend;
8949
8950 bfd_putb32 (insn, contents + irel->r_offset);
8951
8952 *insn_len = 4;
8953 return TRUE;
8954}
35c08157 8955
1c8f6a4d
KLC		 8956/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8957
8958static bfd_boolean
8959nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8960 Elf_Internal_Rela *internal_relocs, int *insn_len,
8961 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8962 Elf_Internal_Shdr *symtab_hdr)
8963{
8964 /* There are 3 variations for LONGCALL3
8965 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 8966 bltz rt, $1 ; LONGCALL3
8967 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8968 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8969 jral5 ta ;
1c8f6a4d
KLC		 8970 $1
8971
8972 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 8973 bltz rt, $1 ; LONGCALL3
8974 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8975 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8976 jral ta ;
1c8f6a4d
KLC		 8977 $1
8978
8979 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 8980 bltz rt, $1 ; LONGCALL3
8981 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8982 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8983 jral ta ;
1c8f6a4d
KLC		 8984 $1 */
8985
8986 /* Get the reloc for the address from which the register is
8987 being loaded. This reloc will tell us which function is
8988 actually being called. */
8989
8990 bfd_vma laddr;
8991 int seq_len; /* Original length of instruction sequence. */
8992 uint32_t insn;
8993 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
8994 int pic_ext_target = 0;
8995 bfd_signed_vma foff;
8996 uint16_t insn16;
8997
8998 irelend = internal_relocs + sec->reloc_count;
8999 seq_len = GET_SEQ_LEN (irel->r_addend);
9000 laddr = irel->r_offset;
9001 *insn_len = seq_len;
9002
9003 hi_irelfn =
9004 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9005 R_NDS32_HI20_RELA, laddr + 4);
9006 lo_irelfn =
9007 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9008 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9009
9010 if (hi_irelfn == irelend || lo_irelfn == irelend)
9011 {
695344c0 9012 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9013 (uint64_t) irel->r_offset);
1c8f6a4d 9014 return FALSE;
35c08157
KLC		 9015 }
9016
1c8f6a4d
KLC		 9017 /* Get the value of the symbol referred to by the reloc. */
9018 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9019 &pic_ext_target);
35c08157 9020
1c8f6a4d
KLC		 9021 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9022 || foff >= CONSERVATIVE_24BIT_S1)
9023 return FALSE;
35c08157 9024
1c8f6a4d
KLC		 9025 insn = bfd_getb32 (contents + laddr);
9026 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9027 {
1c8f6a4d
KLC		 9028 /* Relax to bgezal rt, label ; 17_PCREL
9029 or bltzal rt, label ; 17_PCREL */
35c08157 9030
1c8f6a4d
KLC		 9031 /* Convert to complimentary conditional call. */
9032 insn = CONVERT_CONDITION_CALL (insn);
9033 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9034
1c8f6a4d
KLC		 9035 *insn_len = 4;
9036 irel->r_info =
9037 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9038 hi_irelfn->r_info =
9039 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9040 lo_irelfn->r_info =
9041 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9042
9043 cond_irelfn =
9044 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9045 R_NDS32_17_PCREL_RELA, laddr);
9046 if (cond_irelfn != irelend)
35c08157 9047 {
1c8f6a4d
KLC		 9048 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9049 R_NDS32_17_PCREL_RELA);
9050 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9051 }
1c8f6a4d
KLC		 9052
9053 if (seq_len & 0x2)
35c08157 9054 {
1c8f6a4d
KLC		 9055 insn16 = NDS32_NOP16;
9056 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9057 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9058 R_NDS32_INSN16);
9059 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9060 insn_len += 2;
35c08157 9061 }
1c8f6a4d
KLC		 9062 }
9063 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9064 {
9065 /* Relax to the following instruction sequence
9066 bltz rt, $1 ; LONGCALL2
9067 jal symbol ; 25_PCREL
9068 $1 */
9069 *insn_len = 8;
9070 insn = INSN_JAL;
9071 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9072
1c8f6a4d
KLC		 9073 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9074 R_NDS32_25_PCREL_RELA);
9075 irel->r_info =
9076 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9077
9078 lo_irelfn->r_info =
9079 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9080
1c8f6a4d 9081 if (seq_len & 0x2)
35c08157 9082 {
1c8f6a4d
KLC		 9083 insn16 = NDS32_NOP16;
9084 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9085 lo_irelfn->r_info =
9086 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9087 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9088 insn_len += 2;
9089 }
9090 }
9091 return TRUE;
9092}
35c08157 9093
1c8f6a4d 9094/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9095
1c8f6a4d
KLC		 9096static bfd_boolean
9097nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9098 Elf_Internal_Rela *internal_relocs, int *insn_len,
9099 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9100 Elf_Internal_Shdr *symtab_hdr)
9101{
9102 /* There are 3 variations for LONGJUMP1
9103 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9104 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9105 ori ta, ta, lo12(symbol) ; LO12S0
9106 jr5 ta ;
1c8f6a4d
KLC		 9107
9108 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9109 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9110 ori ta, ta, lo12(symbol) ; LO12S0
9111 jr ta ;
1c8f6a4d
KLC		 9112
9113 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9114 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9115 ori ta, ta, lo12(symbol) ; LO12S0
9116 jr ta ; */
1c8f6a4d
KLC		 9117
9118 /* Get the reloc for the address from which the register is
9119 being loaded. This reloc will tell us which function is
9120 actually being called. */
9121
9122 bfd_vma laddr;
9123 int seq_len; /* Original length of instruction sequence. */
9124 int insn16_on; /* 16-bit on/off. */
9125 uint32_t insn;
9126 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9127 int pic_ext_target = 0;
9128 bfd_signed_vma foff;
9129 uint16_t insn16;
9130 unsigned long reloc;
35c08157 9131
1c8f6a4d
KLC		 9132 irelend = internal_relocs + sec->reloc_count;
9133 seq_len = GET_SEQ_LEN (irel->r_addend);
9134 laddr = irel->r_offset;
9135 *insn_len = seq_len;
9136 insn16_on = IS_16BIT_ON (irel->r_addend);
9137
9138 hi_irelfn =
9139 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9140 R_NDS32_HI20_RELA, laddr);
9141 lo_irelfn =
9142 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9143 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9144 if (hi_irelfn == irelend || lo_irelfn == irelend)
9145 {
695344c0 9146 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9147 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9148 return FALSE;
9149 }
35c08157 9150
1c8f6a4d
KLC		 9151 /* Get the value of the symbol referred to by the reloc. */
9152 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9153 &pic_ext_target);
35c08157 9154
1c8f6a4d
KLC		 9155 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9156 || foff < -CONSERVATIVE_24BIT_S1)
9157 return FALSE;
35c08157 9158
1c8f6a4d
KLC		 9159 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9160 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9161 {
9162 /* j8 label */
9163 /* 16-bit on, but not optimized for speed. */
9164 reloc = R_NDS32_9_PCREL_RELA;
9165 insn16 = INSN_J8;
9166 bfd_putb16 (insn16, contents + irel->r_offset);
9167 *insn_len = 2;
9168 irel->r_info =
9169 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9170 }
9171 else
9172 {
9173 /* j label */
9174 reloc = R_NDS32_25_PCREL_RELA;
9175 insn = INSN_J;
9176 bfd_putb32 (insn, contents + irel->r_offset);
9177 *insn_len = 4;
9178 irel->r_info =
9179 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9180 irel->r_addend = 0;
9181 }
35c08157 9182
1c8f6a4d
KLC		 9183 hi_irelfn->r_info =
9184 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9185 lo_irelfn->r_info =
9186 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9187
1c8f6a4d
KLC		 9188 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9189 {
9190 insn16 = NDS32_NOP16;
9191 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9192 lo_irelfn->r_info =
9193 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9194 R_NDS32_INSN16);
9195 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9196 *insn_len += 2;
9197 }
9198 return TRUE;
9199}
9200
9201/* Revert condition branch. This function does not check if the input
9202 instruction is condition branch or not. */
9203
9204static void
9205nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9206 uint16_t *re_insn16, uint32_t *re_insn)
9207{
9208 uint32_t comp_insn = 0;
9209 uint16_t comp_insn16 = 0;
9210
9211 if (insn)
9212 {
9213 if (N32_OP6 (insn) == N32_OP6_BR1)
9214 {
9215 /* beqs label. */
9216 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9217 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9218 {
1c8f6a4d
KLC		 9219 /* Insn can be contracted to 16-bit implied r5. */
9220 comp_insn16 =
9221 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9222 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9223 }
1c8f6a4d
KLC		 9224 }
9225 else if (N32_OP6 (insn) == N32_OP6_BR3)
9226 {
9227 /* bnec $ta, imm11, label. */
9228 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9229 }
9230 else
9231 {
9232 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9233 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9234 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9235 {
1c8f6a4d 9236 if (N32_IS_RT3 (insn))
35c08157 9237 {
1c8f6a4d
KLC		 9238 /* Insn can be contracted to 16-bit. */
9239 comp_insn16 =
9240 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9241 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9242 }
9243 else if (N32_RT5 (insn) == REG_R15)
9244 {
9245 /* Insn can be contracted to 16-bit. */
9246 comp_insn16 =
9247 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9248 }
35c08157
KLC		 9249 }
9250 }
1c8f6a4d
KLC		 9251 }
9252 else
9253 {
9254 switch ((insn16 & 0xf000) >> 12)
35c08157 9255 {
1c8f6a4d
KLC		 9256 case 0xc:
9257 /* beqz38 or bnez38 */
9258 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9259 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9260 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9261 break;
35c08157 9262
1c8f6a4d
KLC		 9263 case 0xd:
9264 /* beqs38 or bnes38 */
9265 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9266 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9267 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9268 | (REG_R5 << 15);
9269 break;
35c08157 9270
1c8f6a4d
KLC		 9271 case 0xe:
9272 /* beqzS8 or bnezS8 */
9273 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9274 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9275 comp_insn |= REG_R15 << 20;
9276 break;
35c08157 9277
1c8f6a4d
KLC		 9278 default:
9279 break;
9280 }
9281 }
9282 if (comp_insn && re_insn)
9283 *re_insn = comp_insn;
9284 if (comp_insn16 && re_insn16)
9285 *re_insn16 = comp_insn16;
9286}
35c08157 9287
1c8f6a4d 9288/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9289
1c8f6a4d
KLC		 9290static bfd_boolean
9291nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9292 Elf_Internal_Rela *internal_relocs, int *insn_len,
9293 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9294 Elf_Internal_Shdr *symtab_hdr)
9295{
9296 /* There are 3 variations for LONGJUMP2
9297 case 2-4; 1st insn convertible, 16-bit on,
9298 optimize off or optimize for space
9299 bnes38 rt, ra, $1 ; LONGJUMP2
9300 j label ; 25_PCREL
9301 $1:
9302
9303 case 4-4; 1st insn not convertible
9304 bne rt, ra, $1 ; LONGJUMP2
9305 j label ; 25_PCREL
9306 $1:
9307
9308 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9309 bne rt, ra, $1 ; LONGJUMP2
9310 j label ; 25_PCREL
9311 $1: */
9312
9313 /* Get the reloc for the address from which the register is
9314 being loaded. This reloc will tell us which function is
9315 actually being called. */
9316
9317 bfd_vma laddr;
9318 int seq_len; /* Original length of instruction sequence. */
9319 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9320 int pic_ext_target = 0, first_size;
9321 unsigned int i;
9322 bfd_signed_vma foff;
9323 uint32_t insn, re_insn = 0;
9324 uint16_t insn16, re_insn16 = 0;
9325 unsigned long reloc, cond_reloc;
35c08157 9326
1c8f6a4d
KLC		 9327 enum elf_nds32_reloc_type checked_types[] =
9328 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9329
1c8f6a4d
KLC		 9330 irelend = internal_relocs + sec->reloc_count;
9331 seq_len = GET_SEQ_LEN (irel->r_addend);
9332 laddr = irel->r_offset;
9333 *insn_len = seq_len;
9334 first_size = (seq_len == 6) ? 2 : 4;
9335
9336 i2_irelfn =
9337 find_relocs_at_address_addr (irel, internal_relocs,
9338 irelend, R_NDS32_25_PCREL_RELA,
9339 laddr + first_size);
9340
9341 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9342 {
9343 cond_irelfn =
9344 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9345 checked_types[i], laddr);
9346 if (cond_irelfn != irelend)
9347 break;
9348 }
35c08157 9349
1c8f6a4d
KLC		 9350 if (i2_irelfn == irelend || cond_irelfn == irelend)
9351 {
695344c0 9352 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 9353 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9354 return FALSE;
9355 }
35c08157 9356
1c8f6a4d
KLC		 9357 /* Get the value of the symbol referred to by the reloc. */
9358 foff =
9359 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9360 &pic_ext_target);
9361 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9362 || foff >= CONSERVATIVE_16BIT_S1)
9363 return FALSE;
35c08157 9364
1c8f6a4d
KLC		 9365 /* Get the all corresponding instructions. */
9366 if (first_size == 4)
9367 {
9368 insn = bfd_getb32 (contents + laddr);
9369 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9370 }
9371 else
9372 {
9373 insn16 = bfd_getb16 (contents + laddr);
9374 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9375 }
35c08157 9376
1c8f6a4d
KLC		 9377 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9378 && foff < ACCURATE_8BIT_S1 - first_size)
9379 {
9380 if (first_size == 4)
9381 {
9382 /* Don't convert it to 16-bit now, keep this as relaxable for
9383 ``label reloc; INSN16''. */
35c08157 9384
1c8f6a4d
KLC		 9385 /* Save comp_insn32 to buffer. */
9386 bfd_putb32 (re_insn, contents + irel->r_offset);
9387 *insn_len = 4;
9388 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9389 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9390 cond_reloc = R_NDS32_INSN16;
9391 }
9392 else
9393 {
9394 bfd_putb16 (re_insn16, contents + irel->r_offset);
9395 *insn_len = 2;
9396 reloc = R_NDS32_9_PCREL_RELA;
9397 cond_reloc = R_NDS32_NONE;
9398 }
9399 }
9400 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9401 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9402 && foff < ACCURATE_14BIT_S1 - first_size))
9403 {
9404 /* beqs label ; 15_PCREL */
9405 bfd_putb32 (re_insn, contents + irel->r_offset);
9406 *insn_len = 4;
9407 reloc = R_NDS32_15_PCREL_RELA;
9408 cond_reloc = R_NDS32_NONE;
9409 }
9410 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9411 && foff >= -CONSERVATIVE_16BIT_S1
9412 && foff < CONSERVATIVE_16BIT_S1)
9413 {
9414 /* beqz label ; 17_PCREL */
9415 bfd_putb32 (re_insn, contents + irel->r_offset);
9416 *insn_len = 4;
9417 reloc = R_NDS32_17_PCREL_RELA;
9418 cond_reloc = R_NDS32_NONE;
9419 }
9420 else
9421 return FALSE;
35c08157 9422
1c8f6a4d
KLC		 9423 /* Set all relocations. */
9424 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9425 irel->r_addend = i2_irelfn->r_addend;
35c08157 9426
1c8f6a4d
KLC		 9427 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9428 cond_reloc);
9429 cond_irelfn->r_addend = 0;
35c08157 9430
1c8f6a4d
KLC		 9431 if ((seq_len ^ *insn_len ) & 0x2)
9432 {
9433 insn16 = NDS32_NOP16;
9434 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9435 i2_irelfn->r_offset = 4;
9436 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9437 R_NDS32_INSN16);
9438 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9439 *insn_len += 2;
9440 }
9441 else
9442 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9443 R_NDS32_NONE);
9444 return TRUE;
9445}
35c08157 9446
1c8f6a4d 9447/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9448
1c8f6a4d
KLC		 9449static bfd_boolean
9450nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9451 Elf_Internal_Rela *internal_relocs, int *insn_len,
9452 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9453 Elf_Internal_Shdr *symtab_hdr)
9454{
9455 /* There are 5 variations for LONGJUMP3
9456 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9457 optimize off or optimize for space
07d6d2b8
AM		 9458 bnes38 rt, ra, $1 ; LONGJUMP3
9459 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9460 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9461 jr5 ta ;
9462 $1: ;
1c8f6a4d
KLC		 9463
9464 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 9465 bnes38 rt, ra, $1 ; LONGJUMP3
9466 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9467 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9468 jr5 ta ;
9469 $1: ; LABEL
1c8f6a4d
KLC		 9470
9471 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9472 optimize off or optimize for space
07d6d2b8
AM		 9473 bne rt, ra, $1 ; LONGJUMP3
9474 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9475 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9476 jr5 ta ;
9477 $1: ;
1c8f6a4d
KLC		 9478
9479 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9480 16-bit off if no INSN16
07d6d2b8
AM		 9481 bne rt, ra, $1 ; LONGJUMP3
9482 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9483 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9484 jr ta ;
9485 $1: ;
1c8f6a4d
KLC		 9486
9487 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9488 16-bit off if no INSN16
07d6d2b8
AM		 9489 bne rt, ra, $1 ; LONGJUMP3
9490 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9491 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9492 jr ta ;
9493 $1: ; LABEL */
1c8f6a4d
KLC		 9494
9495 /* Get the reloc for the address from which the register is
9496 being loaded. This reloc will tell us which function is
9497 actually being called. */
9498 enum elf_nds32_reloc_type checked_types[] =
9499 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9500
9501 int reloc_off = 0, cond_removed = 0, convertible;
9502 bfd_vma laddr;
9503 int seq_len; /* Original length of instruction sequence. */
9504 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9505 int pic_ext_target = 0, first_size;
9506 unsigned int i;
9507 bfd_signed_vma foff;
9508 uint32_t insn, re_insn = 0;
9509 uint16_t insn16, re_insn16 = 0;
9510 unsigned long reloc, cond_reloc;
35c08157 9511
1c8f6a4d
KLC		 9512 irelend = internal_relocs + sec->reloc_count;
9513 seq_len = GET_SEQ_LEN (irel->r_addend);
9514 laddr = irel->r_offset;
9515 *insn_len = seq_len;
35c08157 9516
1c8f6a4d 9517 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9518
1c8f6a4d
KLC		 9519 if (convertible)
9520 first_size = 2;
9521 else
9522 first_size = 4;
9523
9524 /* Get all needed relocations. */
9525 hi_irelfn =
9526 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9527 R_NDS32_HI20_RELA, laddr + first_size);
9528 lo_irelfn =
9529 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9530 R_NDS32_LO12S0_ORI_RELA,
9531 laddr + first_size + 4);
9532
9533 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9534 {
9535 cond_irelfn =
9536 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9537 checked_types[i], laddr);
9538 if (cond_irelfn != irelend)
9539 break;
9540 }
35c08157 9541
1c8f6a4d
KLC		 9542 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9543 {
695344c0 9544 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 9545 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9546 return FALSE;
9547 }
35c08157 9548
1c8f6a4d
KLC		 9549 /* Get the value of the symbol referred to by the reloc. */
9550 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9551 &pic_ext_target);
35c08157 9552
1c8f6a4d
KLC		 9553 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9554 || foff >= CONSERVATIVE_24BIT_S1)
9555 return FALSE;
35c08157 9556
1c8f6a4d
KLC		 9557 /* Get the all corresponding instructions. */
9558 if (first_size == 4)
9559 {
9560 insn = bfd_getb32 (contents + laddr);
9561 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9562 }
9563 else
9564 {
9565 insn16 = bfd_getb16 (contents + laddr);
9566 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9567 }
35c08157 9568
1c8f6a4d
KLC		 9569 /* For simplicity of coding, we are going to modify the section
9570 contents, the section relocs, and the BFD symbol table. We
9571 must tell the rest of the code not to free up this
9572 information. It would be possible to instead create a table
9573 of changes which have to be made, as is done in coff-mips.c;
9574 that would be more work, but would require less memory when
9575 the linker is run. */
35c08157 9576
1c8f6a4d
KLC		 9577 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9578 && foff < ACCURATE_8BIT_S1 - first_size)
9579 {
9580 if (!(seq_len & 0x2))
9581 {
9582 /* Don't convert it to 16-bit now, keep this as relaxable
9583 for ``label reloc; INSN1a''6. */
9584 /* Save comp_insn32 to buffer. */
9585 bfd_putb32 (re_insn, contents + irel->r_offset);
9586 *insn_len = 4;
9587 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9588 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9589 cond_reloc = R_NDS32_INSN16;
9590 }
9591 else
9592 {
9593 /* Not optimize for speed; convert sequence to 16-bit. */
9594 /* Save comp_insn16 to buffer. */
9595 bfd_putb16 (re_insn16, contents + irel->r_offset);
9596 *insn_len = 2;
9597 reloc = R_NDS32_9_PCREL_RELA;
9598 cond_reloc = R_NDS32_NONE;
9599 }
9600 cond_removed = 1;
9601 }
9602 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9603 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9604 && foff < ACCURATE_14BIT_S1 - first_size))
9605 {
9606 /* beqs label ; 15_PCREL */
9607 bfd_putb32 (re_insn, contents + irel->r_offset);
9608 *insn_len = 4;
9609 reloc = R_NDS32_15_PCREL_RELA;
9610 cond_reloc = R_NDS32_NONE;
9611 cond_removed = 1;
9612 }
9613 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9614 && foff >= -CONSERVATIVE_16BIT_S1
9615 && foff < CONSERVATIVE_16BIT_S1)
9616 {
9617 /* beqz label ; 17_PCREL */
9618 bfd_putb32 (re_insn, contents + irel->r_offset);
9619 *insn_len = 4;
9620 reloc = R_NDS32_17_PCREL_RELA;
9621 cond_reloc = R_NDS32_NONE;
9622 cond_removed = 1;
9623 }
9624 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9625 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9626 {
9627 /* Relax to one of the following 3 variations
9628
9629 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9630 for space
9631 bnes38 rt, $1 ; LONGJUMP2
9632 j label ; 25_PCREL
9633 $1
9634
9635 case 4-4; 1st insn not convertible, others don't care
9636 bne rt, ra, $1 ; LONGJUMP2
9637 j label ; 25_PCREL
9638 $1
9639
9640 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9641 bne rt, ra, $1 ; LONGJUMP2
9642 j label ; 25_PCREL
9643 $1 */
9644
9645 /* Offset for first instruction. */
9646
9647 /* Use j label as second instruction. */
9648 *insn_len = 4 + first_size;
9649 insn = INSN_J;
9650 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9651 reloc = R_NDS32_LONGJUMP2;
9652 cond_reloc = R_NDS32_25_PLTREL;
9653 }
9654 else
9655 return FALSE;
35c08157 9656
1c8f6a4d
KLC		 9657 if (cond_removed == 1)
9658 {
9659 /* Set all relocations. */
9660 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9661 irel->r_addend = hi_irelfn->r_addend;
9662
9663 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9664 cond_reloc);
9665 cond_irelfn->r_addend = 0;
9666 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9667 R_NDS32_NONE);
9668 }
9669 else
9670 {
9671 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
1c8f6a4d
KLC		 9672 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9673 cond_reloc);
9674 }
35c08157 9675
1c8f6a4d
KLC		 9676 if ((seq_len ^ *insn_len ) & 0x2)
9677 {
9678 insn16 = NDS32_NOP16;
9679 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9680 lo_irelfn->r_offset = *insn_len;
9681 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9682 R_NDS32_INSN16);
9683 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9684 *insn_len += 2;
9685 }
9686 else
9687 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9688 R_NDS32_NONE);
9689 return TRUE;
9690}
35c08157 9691
1c8f6a4d 9692/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9693
1c8f6a4d
KLC		 9694static bfd_boolean
9695nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9696 Elf_Internal_Rela *internal_relocs, int *insn_len,
9697 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9698 Elf_Internal_Shdr *symtab_hdr)
9699{
9700 /* The pattern for LONGCALL4. Support for function cse.
9701 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9702 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9703 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9704
1c8f6a4d
KLC		 9705 bfd_vma laddr;
9706 uint32_t insn;
9707 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9708 Elf_Internal_Rela *irelend;
9709 int pic_ext_target = 0;
9710 bfd_signed_vma foff;
35c08157 9711
1c8f6a4d
KLC		 9712 irelend = internal_relocs + sec->reloc_count;
9713 laddr = irel->r_offset;
35c08157 9714
1c8f6a4d
KLC		 9715 /* Get the reloc for the address from which the register is
9716 being loaded. This reloc will tell us which function is
9717 actually being called. */
9718 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9719 R_NDS32_HI20_RELA, laddr);
35c08157 9720
1c8f6a4d
KLC		 9721 if (hi_irel == irelend)
9722 {
695344c0 9723 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9724 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9725 return FALSE;
9726 }
35c08157 9727
1c8f6a4d
KLC		 9728 /* Get the value of the symbol referred to by the reloc. */
9729 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9730 &pic_ext_target);
35c08157 9731
1c8f6a4d
KLC		 9732 /* This condition only happened when symbol is undefined. */
9733 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9734 || foff >= CONSERVATIVE_24BIT_S1)
9735 return FALSE;
35c08157 9736
1c8f6a4d
KLC		 9737 /* Relax to: jal symbol; 25_PCREL */
9738 /* For simplicity of coding, we are going to modify the section
9739 contents, the section relocs, and the BFD symbol table. We
9740 must tell the rest of the code not to free up this
9741 information. It would be possible to instead create a table
9742 of changes which have to be made, as is done in coff-mips.c;
9743 that would be more work, but would require less memory when
9744 the linker is run. */
35c08157 9745
1c8f6a4d
KLC		 9746 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9747 R_NDS32_PTR_RESOLVED, irel->r_addend);
9748 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9749 R_NDS32_EMPTY, irel->r_addend);
35c08157 9750
1c8f6a4d
KLC		 9751 if (ptr_irel == irelend || em_irel == irelend)
9752 {
695344c0 9753 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9754 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9755 return FALSE;
9756 }
9757 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9758 insn = bfd_getb32 (contents + irel->r_addend);
9759 if (insn & 0x80000000)
9760 return FALSE;
35c08157 9761
1c8f6a4d
KLC		 9762 /* Replace the long call with a jal. */
9763 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9764 R_NDS32_25_PCREL_RELA);
9765 ptr_irel->r_addend = 1;
35c08157 9766
1c8f6a4d
KLC		 9767 /* We don't resolve this here but resolve it in relocate_section. */
9768 insn = INSN_JAL;
9769 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9770
1c8f6a4d
KLC		 9771 irel->r_info =
9772 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9773
1c8f6a4d
KLC		 9774 /* If there is function cse, HI20 can not remove now. */
9775 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9776 R_NDS32_LONGCALL4, laddr);
9777 if (call_irel == irelend)
9778 {
9779 *insn_len = 0;
9780 hi_irel->r_info =
9781 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9782 }
35c08157 9783
1c8f6a4d
KLC		 9784 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9785 R_NDS32_INSN16, irel->r_addend);
9786 if (insn_irel != irelend)
9787 insn_irel->r_info =
9788 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9789
1c8f6a4d
KLC		 9790 return TRUE;
9791}
35c08157 9792
1c8f6a4d 9793/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 9794
1c8f6a4d
KLC		 9795static bfd_boolean
9796nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9797 Elf_Internal_Rela *internal_relocs, int *insn_len,
9798 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9799 Elf_Internal_Shdr *symtab_hdr)
9800{
9801 /* The pattern for LONGCALL5.
9802 bltz rt, .L1 ; LONGCALL5/17_PCREL
9803 jal symbol ; 25_PCREL
9804 .L1: */
35c08157 9805
1c8f6a4d
KLC		 9806 bfd_vma laddr;
9807 uint32_t insn;
9808 Elf_Internal_Rela *cond_irel, *irelend;
9809 int pic_ext_target = 0;
9810 bfd_signed_vma foff;
35c08157 9811
1c8f6a4d
KLC		 9812 irelend = internal_relocs + sec->reloc_count;
9813 laddr = irel->r_offset;
9814 insn = bfd_getb32 (contents + laddr);
35c08157 9815
1c8f6a4d
KLC		 9816 /* Get the reloc for the address from which the register is
9817 being loaded. This reloc will tell us which function is
9818 actually being called. */
9819 cond_irel =
9820 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9821 R_NDS32_25_PCREL_RELA, irel->r_addend);
9822 if (cond_irel == irelend)
9823 {
695344c0 9824 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 9825 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9826 return FALSE;
9827 }
35c08157 9828
1c8f6a4d
KLC		 9829 /* Get the value of the symbol referred to by the reloc. */
9830 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9831 &pic_ext_target);
35c08157 9832
1c8f6a4d
KLC		 9833 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9834 || foff >= CONSERVATIVE_16BIT_S1)
9835 return FALSE;
35c08157 9836
1c8f6a4d
KLC		 9837 /* Relax to bgezal rt, label ; 17_PCREL
9838 or bltzal rt, label ; 17_PCREL */
35c08157 9839
1c8f6a4d
KLC		 9840 /* Convert to complimentary conditional call. */
9841 insn = CONVERT_CONDITION_CALL (insn);
35c08157 9842
1c8f6a4d
KLC		 9843 /* For simplicity of coding, we are going to modify the section
9844 contents, the section relocs, and the BFD symbol table. We
9845 must tell the rest of the code not to free up this
9846 information. It would be possible to instead create a table
9847 of changes which have to be made, as is done in coff-mips.c;
9848 that would be more work, but would require less memory when
9849 the linker is run. */
35c08157 9850
1c8f6a4d
KLC		 9851 /* Modify relocation and contents. */
9852 cond_irel->r_info =
9853 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 9854
1c8f6a4d
KLC		 9855 /* Replace the long call with a bgezal. */
9856 bfd_putb32 (insn, contents + cond_irel->r_offset);
9857 *insn_len = 0;
35c08157 9858
1c8f6a4d
KLC		 9859 /* Clean unnessary relocations. */
9860 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9861
1c8f6a4d
KLC		 9862 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9863 R_NDS32_17_PCREL_RELA, laddr);
9864 cond_irel->r_info =
9865 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9866
1c8f6a4d
KLC		 9867 return TRUE;
9868}
35c08157 9869
1c8f6a4d 9870/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 9871
1c8f6a4d
KLC		 9872static bfd_boolean
9873nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9874 Elf_Internal_Rela *internal_relocs, int *insn_len,
9875 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9876 Elf_Internal_Shdr *symtab_hdr)
9877{
9878 /* The pattern for LONGCALL6.
9879 bltz rt, .L1 ; LONGCALL6/17_PCREL
9880 sethi ta, hi20(symbol) ; HI20/PTR
9881 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9882 jral ta ; PTR_RES/EMPTY/INSN16
9883 .L1 */
9884
9885 bfd_vma laddr;
9886 uint32_t insn;
9887 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9888 int pic_ext_target = 0;
9889 bfd_signed_vma foff;
35c08157 9890
1c8f6a4d
KLC		 9891 irelend = internal_relocs + sec->reloc_count;
9892 laddr = irel->r_offset;
35c08157 9893
1c8f6a4d
KLC		 9894 /* Get the reloc for the address from which the register is
9895 being loaded. This reloc will tell us which function is
9896 actually being called. */
9897 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9898 R_NDS32_EMPTY, irel->r_addend);
35c08157 9899
1c8f6a4d
KLC		 9900 if (em_irel == irelend)
9901 {
695344c0 9902 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 9903 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9904 return FALSE;
9905 }
35c08157 9906
1c8f6a4d
KLC		 9907 /* Get the value of the symbol referred to by the reloc. */
9908 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9909 &pic_ext_target);
35c08157 9910
1c8f6a4d
KLC		 9911 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9912 || foff >= CONSERVATIVE_24BIT_S1)
9913 return FALSE;
35c08157 9914
1c8f6a4d
KLC		 9915 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9916 insn = bfd_getb32 (contents + irel->r_addend);
9917 if (insn & 0x80000000)
9918 return FALSE;
35c08157 9919
1c8f6a4d
KLC		 9920 insn = bfd_getb32 (contents + laddr);
9921 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9922 {
9923 /* Relax to bgezal rt, label ; 17_PCREL
9924 or bltzal rt, label ; 17_PCREL */
35c08157 9925
1c8f6a4d
KLC		 9926 /* Convert to complimentary conditional call. */
9927 *insn_len = 0;
9928 insn = CONVERT_CONDITION_CALL (insn);
9929 bfd_putb32 (insn, contents + em_irel->r_offset);
9930
9931 em_irel->r_info =
9932 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9933
9934 /* Set resolved relocation. */
9935 cond_irel =
9936 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9937 R_NDS32_PTR_RESOLVED, irel->r_addend);
9938 if (cond_irel == irelend)
35c08157 9939 {
695344c0 9940 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9941 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9942 return FALSE;
9943 }
9944 cond_irel->r_addend = 1;
35c08157 9945
1c8f6a4d 9946 /* Clear relocations. */
35c08157 9947
1c8f6a4d
KLC		 9948 irel->r_info =
9949 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9950
1c8f6a4d
KLC		 9951 cond_irel =
9952 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9953 R_NDS32_17_PCREL_RELA, laddr);
9954 if (cond_irel != irelend)
9955 cond_irel->r_info =
9956 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9957
1c8f6a4d
KLC		 9958 cond_irel =
9959 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9960 R_NDS32_INSN16, irel->r_addend);
9961 if (cond_irel != irelend)
9962 cond_irel->r_info =
9963 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9964
1c8f6a4d
KLC		 9965 }
9966 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9967 {
9968 /* Relax to the following instruction sequence
9969 bltz rt, .L1 ; LONGCALL2/17_PCREL
9970 jal symbol ; 25_PCREL/PTR_RES
9971 .L1 */
9972 *insn_len = 4;
9973 /* Convert instruction. */
9974 insn = INSN_JAL;
9975 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9976
1c8f6a4d
KLC		 9977 /* Convert relocations. */
9978 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9979 R_NDS32_25_PCREL_RELA);
9980 irel->r_info =
9981 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 9982
1c8f6a4d
KLC		 9983 /* Set resolved relocation. */
9984 cond_irel =
9985 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9986 R_NDS32_PTR_RESOLVED, irel->r_addend);
9987 if (cond_irel == irelend)
9988 {
695344c0 9989 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9990 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9991 return FALSE;
9992 }
9993 cond_irel->r_addend = 1;
35c08157 9994
1c8f6a4d
KLC		 9995 cond_irel =
9996 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9997 R_NDS32_INSN16, irel->r_addend);
9998 if (cond_irel != irelend)
9999 cond_irel->r_info =
10000 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10001 }
10002 return TRUE;
10003}
35c08157 10004
1c8f6a4d 10005/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10006
1c8f6a4d
KLC		 10007static bfd_boolean
10008nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10009 Elf_Internal_Rela *internal_relocs, int *insn_len,
10010 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10011 Elf_Internal_Shdr *symtab_hdr)
10012{
10013 /* The pattern for LONGJUMP4.
10014 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10015 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10016 jr ta ; PTR_RES/INSN16/EMPTY */
10017
10018 bfd_vma laddr;
10019 int seq_len; /* Original length of instruction sequence. */
10020 uint32_t insn;
10021 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10022 int pic_ext_target = 0;
10023 bfd_signed_vma foff;
35c08157 10024
1c8f6a4d
KLC		 10025 irelend = internal_relocs + sec->reloc_count;
10026 seq_len = GET_SEQ_LEN (irel->r_addend);
10027 laddr = irel->r_offset;
10028 *insn_len = seq_len;
35c08157 10029
1c8f6a4d
KLC		 10030 /* Get the reloc for the address from which the register is
10031 being loaded. This reloc will tell us which function is
10032 actually being called. */
35c08157 10033
1c8f6a4d
KLC		 10034 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10035 R_NDS32_HI20_RELA, laddr);
35c08157 10036
1c8f6a4d
KLC		 10037 if (hi_irel == irelend)
10038 {
695344c0 10039 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10040 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10041 return FALSE;
10042 }
35c08157 10043
1c8f6a4d
KLC		 10044 /* Get the value of the symbol referred to by the reloc. */
10045 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10046 &pic_ext_target);
35c08157 10047
1c8f6a4d
KLC		 10048 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10049 || foff < -CONSERVATIVE_24BIT_S1)
10050 return FALSE;
35c08157 10051
1c8f6a4d
KLC		 10052 /* Convert it to "j label", it may be converted to j8 in the final
10053 pass of relaxation. Therefore, we do not consider this currently. */
10054 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10055 R_NDS32_PTR_RESOLVED, irel->r_addend);
10056 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10057 R_NDS32_EMPTY, irel->r_addend);
35c08157 10058
1c8f6a4d
KLC		 10059 if (ptr_irel == irelend || em_irel == irelend)
10060 {
695344c0 10061 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10062 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10063 return FALSE;
10064 }
35c08157 10065
1c8f6a4d
KLC		 10066 em_irel->r_info =
10067 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10068 ptr_irel->r_addend = 1;
35c08157 10069
1c8f6a4d
KLC		 10070 /* Write instruction. */
10071 insn = INSN_J;
10072 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10073
1c8f6a4d
KLC		 10074 /* Clear relocations. */
10075 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10076
1c8f6a4d
KLC		 10077 /* If there is function cse, HI20 can not remove now. */
10078 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10079 R_NDS32_LONGJUMP4, laddr);
10080 if (call_irel == irelend)
10081 {
10082 *insn_len = 0;
10083 hi_irel->r_info =
10084 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10085 }
35c08157 10086
1c8f6a4d
KLC		 10087 return TRUE;
10088}
35c08157 10089
1c8f6a4d 10090/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10091
1c8f6a4d
KLC		 10092static bfd_boolean
10093nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10094 Elf_Internal_Rela *internal_relocs, int *insn_len,
10095 int *seq_len, bfd_byte *contents,
10096 Elf_Internal_Sym *isymbuf,
10097 Elf_Internal_Shdr *symtab_hdr)
10098{
10099 /* There are 2 variations for LONGJUMP5
10100 case 2-4; 1st insn convertible, 16-bit on.
10101 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10102 j label ; 25_PCREL/INSN16
10103 $1:
10104
10105 case 4-4; 1st insn not convertible
10106 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10107 j label ; 25_PCREL/INSN16
10108 .L1: */
10109
10110 bfd_vma laddr;
10111 Elf_Internal_Rela *cond_irel, *irelend;
10112 int pic_ext_target = 0;
10113 unsigned int i;
10114 bfd_signed_vma foff;
10115 uint32_t insn, re_insn = 0;
10116 uint16_t insn16, re_insn16 = 0;
10117 unsigned long reloc;
35c08157 10118
1c8f6a4d
KLC		 10119 enum elf_nds32_reloc_type checked_types[] =
10120 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10121 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10122
1c8f6a4d
KLC		 10123 irelend = internal_relocs + sec->reloc_count;
10124 laddr = irel->r_offset;
35c08157 10125
1c8f6a4d
KLC		 10126 /* Get the reloc for the address from which the register is
10127 being loaded. This reloc will tell us which function is
10128 actually being called. */
35c08157 10129
1c8f6a4d
KLC		 10130 cond_irel =
10131 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10132 R_NDS32_25_PCREL_RELA, irel->r_addend);
10133 if (cond_irel == irelend)
10134 {
695344c0 10135 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10136 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10137 return FALSE;
10138 }
35c08157 10139
1c8f6a4d
KLC		 10140 /* Get the value of the symbol referred to by the reloc. */
10141 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10142 &pic_ext_target);
35c08157 10143
1c8f6a4d
KLC		 10144 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10145 || foff >= CONSERVATIVE_16BIT_S1)
10146 return FALSE;
35c08157 10147
1c8f6a4d
KLC		 10148 /* Get the all corresponding instructions. */
10149 insn = bfd_getb32 (contents + laddr);
10150 /* Check instruction size. */
10151 if (insn & 0x80000000)
10152 {
10153 *seq_len = 0;
10154 insn16 = insn >> 16;
10155 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10156 }
10157 else
10158 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10159
1c8f6a4d
KLC		 10160 if (N32_OP6 (re_insn) == N32_OP6_BR1
10161 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10162 {
10163 /* beqs label ; 15_PCREL. */
10164 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10165 reloc = R_NDS32_15_PCREL_RELA;
10166 }
10167 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10168 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10169 {
10170 /* beqz label ; 17_PCREL. */
10171 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10172 reloc = R_NDS32_17_PCREL_RELA;
10173 }
10174 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10175 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10176 {
10177 /* beqc label ; 9_PCREL. */
10178 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10179 reloc = R_NDS32_WORD_9_PCREL_RELA;
10180 }
10181 else
10182 return FALSE;
35c08157 10183
1c8f6a4d
KLC		 10184 /* Set all relocations. */
10185 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10186
1c8f6a4d
KLC		 10187 /* Clean relocations. */
10188 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10189 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10190 {
10191 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10192 checked_types[i], laddr);
10193 if (cond_irel != irelend)
10194 {
10195 if (*seq_len == 0
10196 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10197 {
1c8f6a4d
KLC		 10198 /* If the branch instruction is 2 byte, it cannot remove
10199 directly. Only convert it to nop16 and remove it after
10200 checking alignment issue. */
10201 insn16 = NDS32_NOP16;
10202 bfd_putb16 (insn16, contents + laddr);
10203 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10204 }
10205 else
1c8f6a4d
KLC		 10206 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10207 R_NDS32_NONE);
35c08157 10208 }
1c8f6a4d
KLC		 10209 }
10210 *insn_len = 0;
35c08157 10211
1c8f6a4d
KLC		 10212 return TRUE;
10213}
35c08157 10214
1c8f6a4d 10215/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10216
1c8f6a4d
KLC		 10217static bfd_boolean
10218nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10219 Elf_Internal_Rela *internal_relocs, int *insn_len,
10220 int *seq_len, bfd_byte *contents,
10221 Elf_Internal_Sym *isymbuf,
10222 Elf_Internal_Shdr *symtab_hdr)
10223{
10224 /* There are 5 variations for LONGJUMP6
10225 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10226 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10227 sethi ta, hi20(symbol) ; HI20/PTR
10228 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10229 jr ta ; PTR_RES/INSN16/EMPTY
10230 .L1:
10231
10232 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10233 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10234 sethi ta, hi20(symbol) ; HI20/PTR
10235 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10236 jr ta ; PTR_RES/INSN16/EMPTY
10237 .L1: */
10238
10239 enum elf_nds32_reloc_type checked_types[] =
10240 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10241 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10242
10243 int reloc_off = 0, cond_removed = 0;
10244 bfd_vma laddr;
10245 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10246 int pic_ext_target = 0;
10247 unsigned int i;
10248 bfd_signed_vma foff;
10249 uint32_t insn, re_insn = 0;
10250 uint16_t insn16, re_insn16 = 0;
10251 unsigned long reloc;
35c08157 10252
1c8f6a4d
KLC		 10253 irelend = internal_relocs + sec->reloc_count;
10254 laddr = irel->r_offset;
35c08157 10255
1c8f6a4d
KLC		 10256 /* Get the reloc for the address from which the register is
10257 being loaded. This reloc will tell us which function is
10258 actually being called. */
10259 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10260 R_NDS32_EMPTY, irel->r_addend);
35c08157 10261
1c8f6a4d
KLC		 10262 if (em_irel == irelend)
10263 {
695344c0 10264 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 10265 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10266 return FALSE;
10267 }
35c08157 10268
1c8f6a4d
KLC		 10269 /* Get the value of the symbol referred to by the reloc. */
10270 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10271 &pic_ext_target);
35c08157 10272
1c8f6a4d
KLC		 10273 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10274 || foff >= CONSERVATIVE_24BIT_S1)
10275 return FALSE;
35c08157 10276
1c8f6a4d
KLC		 10277 insn = bfd_getb32 (contents + laddr);
10278 /* Check instruction size. */
10279 if (insn & 0x80000000)
10280 {
10281 *seq_len = 0;
10282 insn16 = insn >> 16;
10283 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10284 }
10285 else
10286 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10287
1c8f6a4d
KLC		 10288 /* For simplicity of coding, we are going to modify the section
10289 contents, the section relocs, and the BFD symbol table. We
10290 must tell the rest of the code not to free up this
10291 information. It would be possible to instead create a table
10292 of changes which have to be made, as is done in coff-mips.c;
10293 that would be more work, but would require less memory when
10294 the linker is run. */
35c08157 10295
1c8f6a4d
KLC		 10296 if (N32_OP6 (re_insn) == N32_OP6_BR1
10297 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10298 {
10299 /* beqs label ; 15_PCREL */
10300 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10301 reloc = R_NDS32_15_PCREL_RELA;
10302 cond_removed = 1;
10303 }
10304 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10305 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10306 {
10307 /* beqz label ; 17_PCREL */
10308 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10309 reloc = R_NDS32_17_PCREL_RELA;
10310 cond_removed = 1;
10311 }
10312 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10313 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10314 {
10315 /* Relax to one of the following 2 variations
35c08157 10316
1c8f6a4d
KLC		 10317 case 2-4; 1st insn convertible, 16-bit on.
10318 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10319 j label ; 25_PCREL/INSN16
10320 $1:
35c08157 10321
1c8f6a4d
KLC		 10322 case 4-4; 1st insn not convertible
10323 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10324 j label ; 25_PCREL/INSN16
10325 .L1: */
35c08157 10326
1c8f6a4d
KLC		 10327 /* Use j label as second instruction. */
10328 insn = INSN_J;
10329 reloc = R_NDS32_25_PCREL_RELA;
10330 bfd_putb32 (insn, contents + em_irel->r_offset);
10331 }
10332 else
10333 return FALSE;
35c08157 10334
1c8f6a4d
KLC		 10335 /* Set all relocations. */
10336 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10337
1c8f6a4d
KLC		 10338 cond_irel =
10339 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10340 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10341 cond_irel->r_addend = 1;
35c08157 10342
1c8f6a4d
KLC		 10343 /* Use INSN16 of first branch instruction to distinguish if keeping
10344 INSN16 of final instruction or not. */
10345 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10346 R_NDS32_INSN16, irel->r_offset);
10347 if (insn_irel == irelend)
10348 {
10349 /* Clean the final INSN16. */
10350 insn_irel =
10351 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10352 R_NDS32_INSN16, em_irel->r_offset);
10353 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10354 R_NDS32_NONE);
10355 }
10356
10357 if (cond_removed == 1)
10358 {
10359 *insn_len = 0;
10360
10361 /* Clear relocations. */
10362 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10363
1c8f6a4d
KLC		 10364 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10365 {
10366 cond_irel =
10367 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10368 checked_types[i], laddr);
10369 if (cond_irel != irelend)
35c08157 10370 {
1c8f6a4d
KLC		 10371 if (*seq_len == 0
10372 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10373 {
10374 /* If the branch instruction is 2 byte, it cannot remove
10375 directly. Only convert it to nop16 and remove it after
10376 checking alignment issue. */
10377 insn16 = NDS32_NOP16;
10378 bfd_putb16 (insn16, contents + laddr);
10379 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10380 }
10381 else
10382 cond_irel->r_info =
10383 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10384 }
35c08157 10385 }
1c8f6a4d
KLC		 10386 }
10387 else
10388 {
10389 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10390 R_NDS32_LONGJUMP5);
10391 }
35c08157 10392
1c8f6a4d
KLC		 10393 return TRUE;
10394}
35c08157 10395
1c8f6a4d 10396/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10397
1c8f6a4d
KLC		 10398static bfd_boolean
10399nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10400 Elf_Internal_Rela *internal_relocs, int *insn_len,
10401 int *seq_len, bfd_byte *contents,
10402 Elf_Internal_Sym *isymbuf,
10403 Elf_Internal_Shdr *symtab_hdr)
10404{
10405 /* There are 2 variations for LONGJUMP5
10406 case 2-4; 1st insn convertible, 16-bit on.
10407 movi55 ta, imm11 ; LONGJUMP7/INSN16
10408 beq rt, ta, label ; 15_PCREL
10409
10410 case 4-4; 1st insn not convertible
10411 movi55 ta, imm11 ; LONGJUMP7/INSN16
10412 beq rt, ta, label ; 15_PCREL */
10413
10414 bfd_vma laddr;
10415 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10416 int pic_ext_target = 0;
10417 bfd_signed_vma foff;
10418 uint32_t insn, re_insn = 0;
10419 uint16_t insn16;
10420 uint32_t imm11;
35c08157 10421
1c8f6a4d
KLC		 10422 irelend = internal_relocs + sec->reloc_count;
10423 laddr = irel->r_offset;
35c08157 10424
1c8f6a4d
KLC		 10425 /* Get the reloc for the address from which the register is
10426 being loaded. This reloc will tell us which function is
10427 actually being called. */
35c08157 10428
1c8f6a4d
KLC		 10429 cond_irel =
10430 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10431 R_NDS32_15_PCREL_RELA, irel->r_addend);
10432 if (cond_irel == irelend)
10433 {
695344c0 10434 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 10435 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10436 return FALSE;
10437 }
35c08157 10438
1c8f6a4d
KLC		 10439 /* Get the value of the symbol referred to by the reloc. */
10440 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10441 &pic_ext_target);
35c08157 10442
1c8f6a4d
KLC		 10443 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10444 || foff >= CONSERVATIVE_8BIT_S1)
10445 return FALSE;
35c08157 10446
1c8f6a4d
KLC		 10447 /* Get the first instruction for its size. */
10448 insn = bfd_getb32 (contents + laddr);
10449 if (insn & 0x80000000)
10450 {
10451 *seq_len = 0;
10452 /* Get the immediate from movi55. */
10453 imm11 = N16_IMM5S (insn >> 16);
10454 }
10455 else
10456 {
10457 /* Get the immediate from movi. */
10458 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10459 }
10460
1c8f6a4d
KLC		 10461 /* Get the branch instruction. */
10462 insn = bfd_getb32 (contents + irel->r_addend);
10463 /* Convert instruction to BR3. */
10464 if ((insn >> 14) & 0x1)
10465 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10466 else
10467 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10468
1c8f6a4d 10469 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10470
1c8f6a4d
KLC		 10471 /* Set all relocations. */
10472 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10473 R_NDS32_WORD_9_PCREL_RELA);
10474
10475 /* Clean relocations. */
10476 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10477 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10478 R_NDS32_INSN16, irel->r_offset);
10479 if (insn_irel != irelend)
10480 {
10481 if (*seq_len == 0)
35c08157 10482 {
1c8f6a4d
KLC		 10483 /* If the first insntruction is 16bit, convert it to nop16. */
10484 insn16 = NDS32_NOP16;
10485 bfd_putb16 (insn16, contents + laddr);
10486 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10487 }
1c8f6a4d
KLC		 10488 else
10489 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10490 R_NDS32_NONE);
35c08157 10491 }
1c8f6a4d 10492 *insn_len = 0;
35c08157 10493
1c8f6a4d
KLC		 10494 return TRUE;
10495}
35c08157 10496
1c8f6a4d 10497#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10498
1c8f6a4d 10499/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10500
1c8f6a4d
KLC		 10501static bfd_boolean
10502nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10503 asection *sec, Elf_Internal_Rela *irel,
10504 Elf_Internal_Rela *internal_relocs, int *insn_len,
10505 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10506 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10507{
6cae483a
AM		 10508 int eliminate_sethi = 0, range_type;
10509 unsigned int i;
1c8f6a4d
KLC		 10510 bfd_vma local_sda, laddr;
10511 int seq_len; /* Original length of instruction sequence. */
10512 uint32_t insn;
10513 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10514 bfd_vma access_addr = 0;
10515 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10516 enum elf_nds32_reloc_type checked_types[] =
10517 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10518 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10519 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10520 R_NDS32_TLS_LE_HI20
10521 };
35c08157 10522
1c8f6a4d
KLC		 10523 irelend = internal_relocs + sec->reloc_count;
10524 seq_len = GET_SEQ_LEN (irel->r_addend);
10525 laddr = irel->r_offset;
10526 *insn_len = seq_len;
35c08157 10527
1c8f6a4d 10528 /* Get the high part relocation. */
6cae483a 10529 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10530 {
10531 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10532 checked_types[i], laddr);
10533 if (hi_irelfn != irelend)
10534 break;
10535 }
35c08157 10536
1c8f6a4d
KLC		 10537 if (hi_irelfn == irelend)
10538 {
695344c0 10539 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
2dcf00ce 10540 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10541 return FALSE;
10542 }
35c08157 10543
1c8f6a4d
KLC		 10544 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10545 nds32_elf_final_sda_base (sec->output_section->owner,
10546 link_info, &local_sda, FALSE);
35c08157 10547
1c8f6a4d
KLC		 10548 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10549 {
10550 case R_NDS32_HI20_RELA:
10551 insn = bfd_getb32 (contents + laddr);
10552 access_addr =
10553 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10554
10555 if (range_type == NDS32_LOADSTORE_IMM)
10556 {
10557 struct elf_link_hash_entry *h = NULL;
10558 int indx;
35c08157 10559
1c8f6a4d 10560 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10561 {
1c8f6a4d
KLC		 10562 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10563 h = elf_sym_hashes (abfd)[indx];
35c08157 10564 }
35c08157 10565
1c8f6a4d
KLC		 10566 if ((access_addr < CONSERVATIVE_20BIT)
10567 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10568 {
1c8f6a4d
KLC		 10569 eliminate_sethi = 1;
10570 break;
35c08157 10571 }
1c8f6a4d
KLC		 10572
10573 /* This is avoid to relax symbol address which is fixed
10574 relocations. Ex: _stack. */
10575 if (h && bfd_is_abs_section (h->root.u.def.section))
10576 return FALSE;
10577 }
10578
10579 if (!load_store_relax)
10580 return FALSE;
10581
10582 /* Case for set gp register. */
10583 if (N32_RT5 (insn) == REG_GP)
10584 break;
10585
10586 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 10587 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 10588 {
10589 range_l = sdata_range[0][0];
10590 range_h = sdata_range[0][1];
10591 }
10592 else
10593 {
10594 range_l = sdata_range[1][0];
10595 range_h = sdata_range[1][1];
10596 }
10597 break;
10598
10599 case R_NDS32_GOT_HI20:
10600 access_addr =
10601 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10602
10603 /* If this symbol is not in .got, the return value will be -1.
10604 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10605 a negative offset is allowed. */
10606 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10607 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10608 eliminate_sethi = 1;
10609 break;
10610
10611 case R_NDS32_PLT_GOTREL_HI20:
10612 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10613 hi_irelfn, symtab_hdr);
10614
10615 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10616 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10617 eliminate_sethi = 1;
10618 break;
10619
10620 case R_NDS32_GOTOFF_HI20:
10621 access_addr =
10622 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10623
10624 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10625 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10626 eliminate_sethi = 1;
10627 break;
10628
10629 case R_NDS32_GOTPC_HI20:
10630 /* The access_addr must consider r_addend of hi_irel. */
10631 access_addr = sec->output_section->vma + sec->output_offset
10632 + irel->r_offset + hi_irelfn->r_addend;
10633
10634 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10635 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10636 eliminate_sethi = 1;
10637 break;
10638
10639 case R_NDS32_TLS_LE_HI20:
10640 access_addr =
10641 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10642 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10643 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10644 if ((range_type == NDS32_LOADSTORE_IMM)
10645 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10646 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10647 eliminate_sethi = 1;
10648 break;
10649
10650 default:
10651 return FALSE;
10652 }
10653
10654 /* Delete sethi instruction. */
10655 if (eliminate_sethi == 1
10656 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10657 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10658 {
10659 hi_irelfn->r_info =
10660 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10661 irel->r_info =
10662 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10663 *insn_len = 0;
10664 }
10665 return TRUE;
10666}
10667
10668/* Relax LO12 relocation for nds32_elf_relax_section. */
10669
10670static void
10671nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10672 asection *sec, Elf_Internal_Rela *irel,
10673 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10674 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10675{
10676 uint32_t insn;
10677 bfd_vma local_sda, laddr;
10678 unsigned long reloc;
10679 bfd_vma access_addr;
10680 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10681 Elf_Internal_Rela *irelfn = NULL, *irelend;
10682 struct elf_link_hash_entry *h = NULL;
10683 int indx;
10684
10685 /* For SDA base relative relaxation. */
10686 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10687 &local_sda, FALSE);
10688
10689 irelend = internal_relocs + sec->reloc_count;
10690 laddr = irel->r_offset;
10691 insn = bfd_getb32 (contents + laddr);
10692
10693 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10694 return;
10695
10696 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10697
10698 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10699 {
10700 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10701 h = elf_sym_hashes (abfd)[indx];
10702 }
10703
10704 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10705 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10706 {
10707 reloc = R_NDS32_20_RELA;
10708 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10709 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10710 bfd_putb32 (insn, contents + laddr);
10711 }
10712 /* This is avoid to relax symbol address which is fixed
10713 relocations. Ex: _stack. */
10714 else if (N32_OP6 (insn) == N32_OP6_ORI
10715 && h && bfd_is_abs_section (h->root.u.def.section))
10716 return;
10717 else
10718 {
10719 range_l = sdata_range[1][0];
10720 range_h = sdata_range[1][1];
10721 switch (ELF32_R_TYPE (irel->r_info))
10722 {
10723 case R_NDS32_LO12S0_RELA:
10724 reloc = R_NDS32_SDA19S0_RELA;
10725 break;
10726 case R_NDS32_LO12S1_RELA:
10727 reloc = R_NDS32_SDA18S1_RELA;
10728 break;
10729 case R_NDS32_LO12S2_RELA:
10730 reloc = R_NDS32_SDA17S2_RELA;
10731 break;
10732 case R_NDS32_LO12S2_DP_RELA:
10733 range_l = sdata_range[0][0];
10734 range_h = sdata_range[0][1];
10735 reloc = R_NDS32_SDA12S2_DP_RELA;
10736 break;
10737 case R_NDS32_LO12S2_SP_RELA:
10738 range_l = sdata_range[0][0];
10739 range_h = sdata_range[0][1];
10740 reloc = R_NDS32_SDA12S2_SP_RELA;
10741 break;
10742 default:
10743 return;
10744 }
10745
10746 /* There are range_h and range_l because linker has to promise
10747 all sections move cross one page together. */
10748 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10749 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10750 {
10751 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 10752 {
1c8f6a4d
KLC		 10753 /* Maybe we should add R_NDS32_INSN16 reloc type here
10754 or manually do some optimization. sethi can't be
10755 eliminated when updating $gp so the relative ori
10756 needs to be preserved. */
10757 return;
35c08157 10758 }
1c8f6a4d
KLC		 10759 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10760 &insn))
10761 return;
10762 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10763 bfd_putb32 (insn, contents + laddr);
10764
10765 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10766 R_NDS32_INSN16);
10767 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10768 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10769 irelfn->r_info =
10770 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10771
35c08157 10772 }
1c8f6a4d
KLC		 10773 }
10774 return;
10775}
35c08157 10776
1c8f6a4d
KLC		 10777/* Relax low part of PIC instruction pattern. */
10778
10779static void
10780nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10781 asection *sec, Elf_Internal_Rela *irel,
10782 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10783 Elf_Internal_Shdr *symtab_hdr)
10784{
10785 uint32_t insn;
10786 bfd_vma local_sda, laddr;
10787 bfd_signed_vma foff;
10788 unsigned long reloc;
10789
10790 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10791 &local_sda, FALSE);
10792 laddr = irel->r_offset;
10793 insn = bfd_getb32 (contents + laddr);
10794
10795 if (N32_OP6 (insn) != N32_OP6_ORI)
10796 return;
10797
10798 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10799 {
10800 foff = calculate_got_memory_address (abfd, link_info, irel,
10801 symtab_hdr) - local_sda;
10802 reloc = R_NDS32_GOT20;
10803 }
10804 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10805 {
10806 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10807 symtab_hdr) - local_sda;
10808 reloc = R_NDS32_PLT_GOTREL_LO20;
10809 }
10810 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10811 {
10812 foff = calculate_memory_address (abfd, irel, isymbuf,
10813 symtab_hdr) - local_sda;
10814 reloc = R_NDS32_GOTOFF;
10815 }
10816 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10817 {
10818 foff = local_sda - sec->output_section->vma + sec->output_offset
10819 + irel->r_offset + irel->r_addend;
10820 reloc = R_NDS32_GOTPC20;
10821 }
10822 else
10823 return;
10824
10825 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10826 {
10827 /* Turn into MOVI. */
10828 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10829 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10830 bfd_putb32 (insn, contents + laddr);
10831 }
10832}
10833
10834/* Relax low part of LE TLS instruction pattern. */
10835
10836static void
10837nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10838 Elf_Internal_Rela *irel,
10839 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10840 Elf_Internal_Shdr *symtab_hdr)
10841{
10842 uint32_t insn;
10843 bfd_vma laddr;
10844 bfd_signed_vma foff;
10845 unsigned long reloc;
10846
10847 laddr = irel->r_offset;
10848 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10849 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10850 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10851 insn = bfd_getb32 (contents + laddr);
10852
10853 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10854 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10855 {
10856 /* Pattern sethi-ori transform to movi. */
10857 reloc = R_NDS32_TLS_LE_20;
10858 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10859 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10860 bfd_putb32 (insn, contents + laddr);
10861 }
10862}
10863
10864/* Relax LE TLS calculate address instruction pattern. */
10865
10866static void
10867nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10868 asection *sec, Elf_Internal_Rela *irel,
10869 Elf_Internal_Rela *internal_relocs,
10870 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10871 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10872{
10873 /* Local TLS non-pic
07d6d2b8 10874 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
1c8f6a4d 10875 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
07d6d2b8 10876 add ra, ta, tp ; TLS_LE_ADD */
1c8f6a4d
KLC		 10877
10878 uint32_t insn;
10879 bfd_vma laddr;
10880 bfd_signed_vma foff;
10881 Elf_Internal_Rela *i1_irelfn, *irelend;
10882
10883 irelend = internal_relocs + sec->reloc_count;
10884 laddr = irel->r_offset;
10885 insn = bfd_getb32 (contents + laddr);
10886 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10887 R_NDS32_PTR_RESOLVED);
10888 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10889 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10890 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10891
10892 /* The range is +/-16k. */
10893 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10894 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10895 {
10896 /* Transform add to addi. */
10897 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10898 irel->r_info =
10899 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10900
10901 bfd_putb32 (insn, contents + laddr);
10902 if (i1_irelfn != irelend)
10903 {
10904 i1_irelfn->r_addend |= 1;
10905 *again = TRUE;
10906 }
10907 }
10908}
10909
10910/* Relax LE TLS load store instruction pattern. */
10911
10912static void
10913nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10914 asection *sec, Elf_Internal_Rela *irel,
10915 Elf_Internal_Rela *internal_relocs,
10916 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10917 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10918{
10919
10920 uint32_t insn;
10921 bfd_vma laddr;
10922 bfd_signed_vma foff;
10923 Elf_Internal_Rela *i1_irelfn, *irelend;
10924 int success = 0;
10925
10926 irelend = internal_relocs + sec->reloc_count;
10927 laddr = irel->r_offset;
10928 insn = bfd_getb32 (contents + laddr);
10929 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10930 R_NDS32_PTR_RESOLVED);
10931 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10932 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10933 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10934
10935 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10936 {
10937 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10938 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10939 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10940 /* The range is +/-16k. */
10941 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10942 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10943 {
10944 insn =
10945 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10946 irel->r_info =
10947 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10948 success = 1;
10949 break;
10950 }
1a0670f3 10951 /* Fall through. */
1c8f6a4d
KLC		 10952 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10953 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10954 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10955 /* The range is +/-32k. */
10956 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10957 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 10958 {
1c8f6a4d
KLC		 10959 insn =
10960 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10961 irel->r_info =
10962 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
10963 success = 1;
10964 break;
10965 }
1a0670f3 10966 /* Fall through. */
1c8f6a4d
KLC		 10967 case (N32_OP6_MEM << 8) | N32_MEM_LW:
10968 case (N32_OP6_MEM << 8) | N32_MEM_SW:
10969 /* The range is +/-64k. */
10970 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
10971 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
10972 {
10973 insn =
10974 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10975 irel->r_info =
10976 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
10977 success = 1;
10978 break;
10979 }
1a0670f3 10980 /* Fall through. */
1c8f6a4d
KLC		 10981 default:
10982 break;
10983 }
35c08157 10984
1c8f6a4d
KLC		 10985 if (success)
10986 {
10987 bfd_putb32 (insn, contents + laddr);
10988 if (i1_irelfn != irelend)
10989 {
10990 i1_irelfn->r_addend |= 1;
10991 *again = TRUE;
10992 }
10993 }
10994}
35c08157 10995
1c8f6a4d 10996/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 10997
1c8f6a4d
KLC		 10998static bfd_boolean
10999nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11000 Elf_Internal_Rela *internal_relocs, int *insn_len,
11001 int *seq_len, bfd_byte *contents)
11002{
11003 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11004
1c8f6a4d 11005 irelend = internal_relocs + sec->reloc_count;
35c08157 11006
1c8f6a4d
KLC		 11007 re_irel =
11008 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11009 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11010
1c8f6a4d
KLC		 11011 if (re_irel == irelend)
11012 {
695344c0 11013 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11014 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 11015 return FALSE;
11016 }
35c08157 11017
1c8f6a4d
KLC		 11018 if (re_irel->r_addend != 1)
11019 return FALSE;
35c08157 11020
1c8f6a4d
KLC		 11021 /* Pointed target is relaxed and no longer needs this void *,
11022 change the type to NONE. */
11023 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11024
1c8f6a4d
KLC		 11025 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11026 not exist, it means only count 1 and remove it directly. */
11027 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11028 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11029 R_NDS32_PTR_COUNT);
11030 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11031 R_NDS32_PTR);
11032 if (count_irel != irelend)
11033 {
11034 if (--count_irel->r_addend > 0)
11035 return FALSE;
11036 }
11037
11038 if (ptr_irel != irelend)
11039 return FALSE;
11040
11041 /* If the PTR_COUNT is already 0, remove current instruction. */
11042 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11043 *insn_len = 0;
11044 return TRUE;
11045}
11046
11047/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11048
11049static void
11050nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11051 asection *sec, Elf_Internal_Rela *irel,
11052 Elf_Internal_Rela *internal_relocs,
11053 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11054 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11055{
11056 uint32_t insn;
11057 bfd_signed_vma foff;
11058 Elf_Internal_Rela *i1_irelfn, *irelend;
11059 bfd_vma local_sda, laddr;
11060
11061 irelend = internal_relocs + sec->reloc_count;
11062 laddr = irel->r_offset;
11063 insn = bfd_getb32 (contents + laddr);
11064
11065 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11066 we need additional space. It might be help if we could
11067 borrow some space from instructions to be eliminated
11068 such as sethi, ori, add. */
11069 if (insn & 0x80000000)
11070 return;
11071
11072 if (nds32_elf_check_dup_relocs
11073 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11074 return;
11075
11076 i1_irelfn =
11077 find_relocs_at_address (irel, internal_relocs, irelend,
11078 R_NDS32_PTR_RESOLVED);
11079
11080 /* FIXIT 090606
11081 The boundary should be reduced since the .plt section hasn't
11082 been created and the address of specific entry is still unknown
11083 Maybe the range between the function call and the begin of the
11084 .text section can be used to decide if the .plt is in the range
11085 of function call. */
11086
11087 if (N32_OP6 (insn) == N32_OP6_ALU1
11088 && N32_SUB5 (insn) == N32_ALU1_ADD)
11089 {
11090 /* Get the value of the symbol referred to by the reloc. */
11091 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11092 &local_sda, FALSE);
11093 foff = (bfd_signed_vma) (calculate_plt_memory_address
11094 (abfd, link_info, isymbuf, irel,
11095 symtab_hdr) - local_sda);
11096 /* This condition only happened when symbol is undefined. */
11097 if (foff == 0)
11098 return;
11099
11100 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11101 return;
11102 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11103 R_NDS32_PLT_GOTREL_LO19);
11104 /* addi.gp */
4ec521f2 11105 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11106 }
11107 else if (N32_OP6 (insn) == N32_OP6_JREG
11108 && N32_SUB5 (insn) == N32_JREG_JRAL)
11109 {
11110 /* Get the value of the symbol referred to by the reloc. */
11111 foff =
11112 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11113 /* This condition only happened when symbol is undefined. */
11114 if (foff == 0)
11115 return;
11116 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11117 return;
11118 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11119 insn = INSN_JAL;
11120 }
11121 else
11122 return;
11123
11124 bfd_putb32 (insn, contents + laddr);
11125 if (i1_irelfn != irelend)
11126 {
11127 i1_irelfn->r_addend |= 1;
11128 *again = TRUE;
11129 }
11130}
11131
11132/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11133
11134static void
11135nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11136 asection *sec, Elf_Internal_Rela *irel,
11137 Elf_Internal_Rela *internal_relocs,
11138 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11139 bfd_boolean *again)
11140{
11141 uint32_t insn;
11142 bfd_signed_vma foff;
11143 Elf_Internal_Rela *i1_irelfn, *irelend;
11144 bfd_vma local_sda, laddr;
11145
11146 irelend = internal_relocs + sec->reloc_count;
11147 laddr = irel->r_offset;
11148 insn = bfd_getb32 (contents + laddr);
11149 if (insn & 0x80000000)
11150 return;
11151
11152 if (nds32_elf_check_dup_relocs
11153 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11154 return;
11155
11156 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11157 R_NDS32_PTR_RESOLVED);
11158
11159 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11160 &local_sda, FALSE);
11161 foff = calculate_got_memory_address (abfd, link_info, irel,
11162 symtab_hdr) - local_sda;
11163
11164 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11165 {
11166 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11167 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11168 irel->r_info =
11169 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11170 bfd_putb32 (insn, contents + laddr);
11171 if (i1_irelfn != irelend)
11172 {
11173 i1_irelfn->r_addend |= 1;
11174 *again = TRUE;
11175 }
11176 }
11177}
11178
11179/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11180
11181static void
11182nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11183 asection *sec, Elf_Internal_Rela *irel,
11184 Elf_Internal_Rela *internal_relocs,
11185 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11186 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11187{
11188 int opc_insn_gotoff;
11189 uint32_t insn;
11190 bfd_signed_vma foff;
11191 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11192 bfd_vma local_sda, laddr;
11193
11194 irelend = internal_relocs + sec->reloc_count;
11195 laddr = irel->r_offset;
11196 insn = bfd_getb32 (contents + laddr);
11197
11198 if (insn & 0x80000000)
11199 return;
11200
11201 if (nds32_elf_check_dup_relocs
11202 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11203 return;
11204
11205 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11206 R_NDS32_PTR_RESOLVED);
11207 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11208 &local_sda, FALSE);
11209 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11210 foff = foff - local_sda;
11211
11212 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11213 return;
11214
11215 /* Concatenate opcode and sub-opcode for switch case.
11216 It may be MEM or ALU1. */
11217 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11218 switch (opc_insn_gotoff)
11219 {
11220 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11221 /* 4-byte aligned. */
11222 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11223 irel->r_info =
11224 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11225 break;
11226 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11227 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11228 irel->r_info =
11229 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11230 break;
11231 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11232 /* 2-byte aligned. */
11233 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11234 irel->r_info =
11235 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11236 break;
11237 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
4ec521f2 11238 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
1c8f6a4d
KLC		 11239 irel->r_info =
11240 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11241 break;
11242 case (N32_OP6_MEM << 8) | N32_MEM_SH:
4ec521f2 11243 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11244 irel->r_info =
11245 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11246 break;
11247 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11248 /* 1-byte aligned. */
11249 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11250 irel->r_info =
11251 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11252 break;
11253 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
4ec521f2 11254 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11255 irel->r_info =
11256 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11257 break;
11258 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11259 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11260 irel->r_info =
11261 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11262 break;
11263 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
4ec521f2 11264 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11265 irel->r_info =
11266 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11267 break;
11268 default:
11269 return;
11270 }
11271
11272 bfd_putb32 (insn, contents + laddr);
11273 if (i1_irelfn != irelend)
11274 {
11275 i1_irelfn->r_addend |= 1;
11276 *again = TRUE;
11277 }
11278 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11279 R_NDS32_INSN16)) != irelend)
11280 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11281
11282}
11283
11284static bfd_boolean
11285nds32_relax_adjust_label (bfd *abfd, asection *sec,
11286 Elf_Internal_Rela *internal_relocs,
11287 bfd_byte *contents,
11288 nds32_elf_blank_t **relax_blank_list,
11289 int optimize, int opt_size)
11290{
11291 /* This code block is used to adjust 4-byte alignment by relax a pair
11292 of instruction a time.
11293
11294 It recognizes three types of relocations.
de194d85 11295 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11296 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11297 3. is_16bit_NOP () - remove a 16-bit instruction. */
11298
de194d85
YC		 11299 /* TODO: It seems currently implementation only support 4-byte alignment.
11300 We should handle any-alignment. */
1c8f6a4d
KLC		 11301
11302 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11303 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11304 Elf_Internal_Rela rel_temp;
11305 Elf_Internal_Rela *irelend;
11306 bfd_vma address;
11307 uint16_t insn16;
11308
11309 /* Checking for branch relaxation relies on the relocations to
11310 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11311 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11312 sizeof (Elf_Internal_Rela), compar_reloc);
11313
11314 irelend = internal_relocs + sec->reloc_count;
11315
11316 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11317 /* FIXME: Can we generate the right order in assembler?
11318 So we don't have to swapping them here. */
11319
11320 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11321 label_rel < irelend; label_rel++)
11322 {
11323 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11324 continue;
11325
11326 /* Find the first reloc has the same offset with label_rel. */
11327 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11328 insn_rel++;
11329
11330 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11331 insn_rel++)
11332 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11333 address. */
11334 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11335 break;
11336
11337 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11338 && insn_rel < label_rel)
11339 {
11340 /* Swap the two reloc if the R_NDS32_INSN16 is
11341 before R_NDS32_LABEL. */
11342 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11343 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11344 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11345 }
11346 }
11347
11348 label_rel = NULL;
11349 insn_rel = NULL;
11350 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11351 or higher, remove other R_NDS32_LABEL with lower alignment.
11352 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11353 then the R_NDS32_LABEL sequence is broke. */
11354 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11355 {
11356 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11357 {
11358 if (label_rel == NULL)
11359 {
11360 if (tmp_rel->r_addend < 2)
11361 label_rel = tmp_rel;
11362 continue;
11363 }
11364 else if (tmp_rel->r_addend > 1)
11365 {
11366 /* Remove all LABEL relocation from label_rel to tmp_rel
11367 including relocations with same offset as tmp_rel. */
11368 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11369 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11370 {
11371 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11372 && tmp2_rel->r_addend < 2)
11373 tmp2_rel->r_info =
11374 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11375 R_NDS32_NONE);
11376 }
11377 label_rel = NULL;
11378 }
11379 }
11380 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11381 {
11382 /* A new INSN16 which can be converted, so clear label_rel. */
11383 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11384 irelend, &insn16)
11385 || is_16bit_NOP (abfd, sec, tmp_rel))
11386 label_rel = NULL;
11387 }
11388 }
11389
11390 label_rel = NULL;
11391 insn_rel = NULL;
11392 /* Optimized for speed and nothing has not been relaxed.
11393 It's time to align labels.
11394 We may convert a 16-bit instruction right before a label to
11395 32-bit, in order to align the label if necessary
11396 all reloc entries has been sorted by r_offset. */
11397 for (irel = internal_relocs; irel < irelend; irel++)
11398 {
11399 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11400 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11401 continue;
11402
11403 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11404 {
11405 /* A new INSN16 found, resize the old one. */
11406 if (is_convert_32_to_16
11407 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11408 || is_16bit_NOP (abfd, sec, irel))
11409 {
11410 if (insn_rel)
11411 {
11412 /* Previous INSN16 reloc exists, reduce its
11413 size to 16-bit. */
11414 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11415 irelend, &insn16))
35c08157 11416 {
1c8f6a4d
KLC		 11417 nds32_elf_write_16 (abfd, contents, insn_rel,
11418 internal_relocs, irelend, insn16);
11419
11420 if (!insert_nds32_elf_blank_recalc_total
11421 (relax_blank_list, insn_rel->r_offset + 2, 2))
11422 return FALSE;
11423 }
11424 else if (is_16bit_NOP (abfd, sec, insn_rel))
11425 {
11426 if (!insert_nds32_elf_blank_recalc_total
11427 (relax_blank_list, insn_rel->r_offset, 2))
11428 return FALSE;
11429 }
11430 insn_rel->r_info =
11431 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11432 }
11433 /* Save the new one for later use. */
11434 insn_rel = irel;
11435 }
11436 else
11437 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11438 R_NDS32_NONE);
11439 }
11440 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11441 {
11442 /* Search for label. */
11443 int force_relax = 0;
11444
11445 /* Label on 16-bit instruction or optimization
11446 needless, just reset this reloc. */
11447 insn16 = bfd_getb16 (contents + irel->r_offset);
11448 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11449 {
11450 irel->r_info =
11451 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11452 continue;
11453 }
11454
11455 address =
11456 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11457 irel->r_offset, 1);
11458
11459 if (!insn_rel)
11460 {
11461 /* Check if there is case which can not be aligned. */
11462 if (irel->r_addend == 2 && address & 0x2)
11463 return FALSE;
11464 continue;
11465 }
11466
11467 /* Try to align this label. */
11468
11469 if ((irel->r_addend & 0x1f) < 2)
11470 {
11471 /* Check if there is a INSN16 at the same address.
11472 Label_rel always seats before insn_rel after
11473 our sort. */
11474
11475 /* Search for INSN16 at LABEL location. If INSN16 is at
11476 same location and this LABEL alignment is lower than 2,
11477 the INSN16 can be converted to 2-byte. */
11478 for (tmp_rel = irel;
11479 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11480 tmp_rel++)
11481 {
11482 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11483 && (is_convert_32_to_16
11484 (abfd, sec, tmp_rel, internal_relocs,
11485 irelend, &insn16)
11486 || is_16bit_NOP (abfd, sec, tmp_rel)))
11487 {
11488 force_relax = 1;
11489 break;
11490 }
11491 }
11492 }
11493
11494 if (force_relax || irel->r_addend == 1 || address & 0x2)
11495 {
11496 /* Label not aligned. */
11497 /* Previous reloc exists, reduce its size to 16-bit. */
11498 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11499 internal_relocs, irelend, &insn16))
11500 {
11501 nds32_elf_write_16 (abfd, contents, insn_rel,
11502 internal_relocs, irelend, insn16);
11503
11504 if (!insert_nds32_elf_blank_recalc_total
11505 (relax_blank_list, insn_rel->r_offset + 2, 2))
11506 return FALSE;
11507 }
11508 else if (is_16bit_NOP (abfd, sec, insn_rel))
11509 {
11510 if (!insert_nds32_elf_blank_recalc_total
11511 (relax_blank_list, insn_rel->r_offset, 2))
11512 return FALSE;
11513 }
11514
11515 }
11516 /* INSN16 reloc is used. */
11517 insn_rel = NULL;
11518 }
11519 }
11520
11521 address =
11522 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11523 if (insn_rel && (address & 0x2 || opt_size))
11524 {
11525 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11526 irelend, &insn16))
11527 {
11528 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11529 irelend, insn16);
11530 if (!insert_nds32_elf_blank_recalc_total
11531 (relax_blank_list, insn_rel->r_offset + 2, 2))
11532 return FALSE;
11533 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11534 R_NDS32_NONE);
11535 }
11536 else if (is_16bit_NOP (abfd, sec, insn_rel))
11537 {
11538 if (!insert_nds32_elf_blank_recalc_total
11539 (relax_blank_list, insn_rel->r_offset, 2))
11540 return FALSE;
11541 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11542 R_NDS32_NONE);
11543 }
11544 }
11545 insn_rel = NULL;
11546 return TRUE;
11547}
11548
1c8f6a4d
KLC		 11549static bfd_boolean
11550nds32_elf_relax_section (bfd *abfd, asection *sec,
11551 struct bfd_link_info *link_info, bfd_boolean *again)
11552{
11553 nds32_elf_blank_t *relax_blank_list = NULL;
11554 Elf_Internal_Shdr *symtab_hdr;
11555 Elf_Internal_Rela *internal_relocs;
11556 Elf_Internal_Rela *irel;
11557 Elf_Internal_Rela *irelend;
11558 Elf_Internal_Sym *isymbuf = NULL;
11559 bfd_byte *contents = NULL;
11560 bfd_boolean result = TRUE;
11561 int optimize = 0;
11562 int opt_size = 0;
11563 uint32_t insn;
11564 uint16_t insn16;
11565
11566 /* Target dependnet option. */
11567 struct elf_nds32_link_hash_table *table;
11568 int load_store_relax;
1c8f6a4d
KLC		 11569
11570 relax_blank_list = NULL;
11571
11572 *again = FALSE;
11573
11574 /* Nothing to do for
11575 * relocatable link or
11576 * non-relocatable section or
11577 * non-code section or
11578 * empty content or
11579 * no reloc entry. */
0e1862bb 11580 if (bfd_link_relocatable (link_info)
1c8f6a4d 11581 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 11582 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d
KLC		 11583 || (sec->flags & SEC_CODE) == 0
11584 || sec->size == 0)
11585 return TRUE;
11586
11587 /* 09.12.11 Workaround. */
11588 /* We have to adjust align for R_NDS32_LABEL if needed.
11589 The adjust approach only can fix 2-byte align once. */
11590 if (sec->alignment_power > 2)
11591 return TRUE;
11592
11593 /* The optimization type to do. */
11594
11595 table = nds32_elf_hash_table (link_info);
1c8f6a4d
KLC		 11596
11597 /* The begining of general relaxation. */
11598
11599 if (is_SDA_BASE_set == 0)
11600 {
11601 bfd_vma gp;
11602 is_SDA_BASE_set = 1;
11603 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11604 &gp, FALSE);
11605 relax_range_measurement (abfd);
11606 }
11607
1c8f6a4d
KLC		 11608 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11609 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11610 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11611 TRUE /* keep_memory */);
11612 if (internal_relocs == NULL)
11613 goto error_return;
11614
11615 irelend = internal_relocs + sec->reloc_count;
11616 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11617 irelend, R_NDS32_RELAX_ENTRY);
11618
11619 if (irel == irelend)
11620 return TRUE;
11621
11622 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11623 {
11624 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
f9671640 11625 return TRUE;
1c8f6a4d
KLC		 11626
11627 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11628 optimize = 1;
11629
11630 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11631 opt_size = 1;
11632 }
11633
11634 load_store_relax = table->load_store_relax;
11635
11636 /* Get symbol table and section content. */
0c4bd9d9 11637 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 11638 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11639 goto error_return;
11640
11641 /* Do relax loop only when finalize is not done.
11642 Take care of relaxable relocs except INSN16. */
11643 for (irel = internal_relocs; irel < irelend; irel++)
11644 {
11645 int seq_len; /* Original length of instruction sequence. */
11646 int insn_len = 0; /* Final length of instruction sequence. */
11647 bfd_boolean removed;
11648
11649 insn = 0;
11650 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11651 && (irel->r_addend & 0x1f) >= 2)
11652 optimize = 1;
11653
11654 /* Relocation Types
11655 R_NDS32_LONGCALL1 53
11656 R_NDS32_LONGCALL2 54
11657 R_NDS32_LONGCALL3 55
11658 R_NDS32_LONGJUMP1 56
11659 R_NDS32_LONGJUMP2 57
11660 R_NDS32_LONGJUMP3 58
11661 R_NDS32_LOADSTORE 59 */
11662 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11663 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11664 seq_len = GET_SEQ_LEN (irel->r_addend);
11665
11666 /* Relocation Types
11667 R_NDS32_LONGCALL4 107
11668 R_NDS32_LONGCALL5 108
11669 R_NDS32_LONGCALL6 109
11670 R_NDS32_LONGJUMP4 110
11671 R_NDS32_LONGJUMP5 111
11672 R_NDS32_LONGJUMP6 112
11673 R_NDS32_LONGJUMP7 113 */
11674 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11675 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11676 seq_len = 4;
11677
11678 /* Relocation Types
11679 R_NDS32_LO12S0_RELA 30
11680 R_NDS32_LO12S1_RELA 29
11681 R_NDS32_LO12S2_RELA 28
11682 R_NDS32_LO12S2_SP_RELA 71
11683 R_NDS32_LO12S2_DP_RELA 70
11684 R_NDS32_GOT_LO12 46
11685 R_NDS32_GOTOFF_LO12 50
11686 R_NDS32_PLTREL_LO12 65
11687 R_NDS32_PLT_GOTREL_LO12 67
11688 R_NDS32_17IFC_PCREL_RELA 96
11689 R_NDS32_GOT_SUFF 193
11690 R_NDS32_GOTOFF_SUFF 194
11691 R_NDS32_PLT_GOT_SUFF 195
11692 R_NDS32_MULCALL_SUFF 196
11693 R_NDS32_PTR 197 */
11694 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11695 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11696 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11697 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11698 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11699 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11700 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11701 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11702 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11703 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11704 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11705 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11706 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11707 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11708 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11709 seq_len = 0;
11710 else
11711 continue;
11712
11713 insn_len = seq_len;
11714 removed = FALSE;
11715
11716 switch (ELF32_R_TYPE (irel->r_info))
11717 {
11718 case R_NDS32_LONGCALL1:
11719 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11720 &insn_len, contents, isymbuf,
11721 symtab_hdr);
11722 break;
11723 case R_NDS32_LONGCALL2:
11724 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11725 &insn_len, contents, isymbuf,
11726 symtab_hdr);
11727 break;
11728 case R_NDS32_LONGCALL3:
11729 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11730 &insn_len, contents, isymbuf,
11731 symtab_hdr);
11732 break;
11733 case R_NDS32_LONGJUMP1:
11734 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11735 &insn_len, contents, isymbuf,
11736 symtab_hdr);
11737 break;
11738 case R_NDS32_LONGJUMP2:
11739 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11740 &insn_len, contents, isymbuf,
11741 symtab_hdr);
11742 break;
11743 case R_NDS32_LONGJUMP3:
11744 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11745 &insn_len, contents, isymbuf,
11746 symtab_hdr);
11747 break;
11748 case R_NDS32_LONGCALL4:
11749 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11750 &insn_len, contents, isymbuf,
11751 symtab_hdr);
11752 break;
11753 case R_NDS32_LONGCALL5:
11754 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11755 &insn_len, contents, isymbuf,
11756 symtab_hdr);
11757 break;
11758 case R_NDS32_LONGCALL6:
11759 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11760 &insn_len, contents, isymbuf,
11761 symtab_hdr);
11762 break;
11763 case R_NDS32_LONGJUMP4:
11764 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11765 &insn_len, contents, isymbuf,
11766 symtab_hdr);
11767 break;
11768 case R_NDS32_LONGJUMP5:
11769 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11770 &insn_len, &seq_len, contents,
11771 isymbuf, symtab_hdr);
11772 break;
11773 case R_NDS32_LONGJUMP6:
11774 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11775 &insn_len, &seq_len, contents,
11776 isymbuf, symtab_hdr);
11777 break;
11778 case R_NDS32_LONGJUMP7:
11779 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11780 &insn_len, &seq_len, contents,
11781 isymbuf, symtab_hdr);
11782 break;
11783 case R_NDS32_LOADSTORE:
11784 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11785 internal_relocs, &insn_len,
11786 contents, isymbuf, symtab_hdr,
11787 load_store_relax);
11788 break;
11789 case R_NDS32_LO12S0_RELA:
11790 case R_NDS32_LO12S1_RELA:
11791 case R_NDS32_LO12S2_DP_RELA:
11792 case R_NDS32_LO12S2_SP_RELA:
11793 case R_NDS32_LO12S2_RELA:
11794 /* Relax for low part. */
11795 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11796 contents, isymbuf, symtab_hdr);
11797
11798 /* It is impossible to delete blank, so just continue. */
11799 continue;
11800 case R_NDS32_GOT_LO12:
11801 case R_NDS32_GOTOFF_LO12:
11802 case R_NDS32_PLTREL_LO12:
11803 case R_NDS32_PLT_GOTREL_LO12:
11804 case R_NDS32_GOTPC_LO12:
11805 /* Relax for PIC gp-relative low part. */
11806 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
11807 isymbuf, symtab_hdr);
35c08157 11808
1c8f6a4d
KLC		 11809 /* It is impossible to delete blank, so just continue. */
11810 continue;
11811 case R_NDS32_TLS_LE_LO12:
11812 /* Relax for LE TLS low part. */
11813 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
11814 isymbuf, symtab_hdr);
35c08157 11815
1c8f6a4d
KLC		 11816 /* It is impossible to delete blank, so just continue. */
11817 continue;
11818 case R_NDS32_TLS_LE_ADD:
11819 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
11820 contents, isymbuf, symtab_hdr, again);
11821 /* It is impossible to delete blank, so just continue. */
11822 continue;
11823 case R_NDS32_TLS_LE_LS:
11824 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
11825 contents, isymbuf, symtab_hdr, again);
11826 continue;
11827 case R_NDS32_PTR:
11828 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
11829 &insn_len, &seq_len, contents);
11830 break;
11831 case R_NDS32_PLT_GOT_SUFF:
11832 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
11833 internal_relocs, contents,
11834 isymbuf, symtab_hdr, again);
11835 /* It is impossible to delete blank, so just continue. */
11836 continue;
11837 case R_NDS32_GOT_SUFF:
11838 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
11839 internal_relocs, contents,
11840 symtab_hdr, again);
11841 /* It is impossible to delete blank, so just continue. */
11842 continue;
11843 case R_NDS32_GOTOFF_SUFF:
11844 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
11845 internal_relocs, contents,
11846 isymbuf, symtab_hdr, again);
11847 /* It is impossible to delete blank, so just continue. */
11848 continue;
11849 default:
11850 continue;
11851
11852 }
11853 if (removed && seq_len - insn_len > 0)
11854 {
11855 if (!insert_nds32_elf_blank
11856 (&relax_blank_list, irel->r_offset + insn_len,
11857 seq_len - insn_len))
11858 goto error_return;
11859 *again = TRUE;
35c08157 11860 }
1c8f6a4d
KLC		 11861 }
11862
11863 calc_nds32_blank_total (relax_blank_list);
11864
11865 if (table->relax_fp_as_gp)
11866 {
11867 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
11868 irelend, isymbuf))
11869 goto error_return;
35c08157 11870
535b785f 11871 if (!*again)
35c08157 11872 {
1c8f6a4d
KLC		 11873 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
11874 irelend))
11875 goto error_return;
35c08157
KLC		 11876 }
11877 }
1c8f6a4d 11878
535b785f 11879 if (!*again)
1c8f6a4d
KLC		 11880 {
11881 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
11882 &relax_blank_list, optimize, opt_size))
11883 goto error_return;
11884 }
11885
11886 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 11887 If object file is assembled with flag '-Os',
11888 the we don't adjust jump-destination on 4-byte boundary. */
11889
11890 if (relax_blank_list)
11891 {
11892 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
11893 relax_blank_list = NULL;
11894 }
11895
535b785f 11896 if (!*again)
35c08157
KLC		 11897 {
11898 /* Closing the section, so we don't relax it anymore. */
11899 bfd_vma sec_size_align;
11900 Elf_Internal_Rela *tmp_rel;
11901
11902 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 11903 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
11904 & ((-1U) << sec->alignment_power);
35c08157
KLC		 11905 if ((sec_size_align - sec->size) & 0x2)
11906 {
11907 insn16 = NDS32_NOP16;
11908 bfd_putb16 (insn16, contents + sec->size);
11909 sec->size += 2;
11910 }
11911
11912 while (sec_size_align != sec->size)
11913 {
11914 insn = NDS32_NOP32;
11915 bfd_putb32 (insn, contents + sec->size);
11916 sec->size += 4;
11917 }
11918
1c8f6a4d
KLC		 11919 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
11920 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 11921 if (tmp_rel != irelend)
11922 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
11923
11924 clean_nds32_elf_blank ();
11925 }
11926
11927finish:
11928 if (internal_relocs != NULL
11929 && elf_section_data (sec)->relocs != internal_relocs)
11930 free (internal_relocs);
11931
11932 if (contents != NULL
11933 && elf_section_data (sec)->this_hdr.contents != contents)
11934 free (contents);
11935
11936 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
11937 free (isymbuf);
11938
11939 return result;
11940
11941error_return:
11942 result = FALSE;
11943 goto finish;
11944}
11945
11946static struct bfd_elf_special_section const nds32_elf_special_sections[] =
11947{
11948 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
11949 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
11950 {NULL, 0, 0, 0, 0}
11951};
11952
11953static bfd_boolean
11954nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
11955 struct bfd_link_info *info,
11956 void *finfo ATTRIBUTE_UNUSED,
11957 bfd_boolean (*func) (void *, const char *,
11958 Elf_Internal_Sym *,
11959 asection *,
11960 struct elf_link_hash_entry *)
11961 ATTRIBUTE_UNUSED)
11962{
11963 FILE *sym_ld_script = NULL;
11964 struct elf_nds32_link_hash_table *table;
11965
11966 table = nds32_elf_hash_table (info);
11967 sym_ld_script = table->sym_ld_script;
11968
11969 if (check_start_export_sym)
11970 fprintf (sym_ld_script, "}\n");
11971
11972 return TRUE;
11973}
11974
11975static enum elf_reloc_type_class
11976nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
11977 const asection *rel_sec ATTRIBUTE_UNUSED,
11978 const Elf_Internal_Rela *rela)
11979{
11980 switch ((int) ELF32_R_TYPE (rela->r_info))
11981 {
11982 case R_NDS32_RELATIVE:
11983 return reloc_class_relative;
11984 case R_NDS32_JMP_SLOT:
11985 return reloc_class_plt;
11986 case R_NDS32_COPY:
11987 return reloc_class_copy;
11988 default:
11989 return reloc_class_normal;
11990 }
11991}
11992
11993/* Put target dependent option into info hash table. */
11994void
11995bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
11996 int relax_fp_as_gp,
11997 int eliminate_gc_relocs,
11998 FILE * sym_ld_script, int load_store_relax,
11999 int target_optimize, int relax_status,
12000 int relax_round, FILE * ex9_export_file,
12001 FILE * ex9_import_file,
12002 int update_ex9_table, int ex9_limit,
12003 bfd_boolean ex9_loop_aware,
12004 bfd_boolean ifc_loop_aware)
12005{
12006 struct elf_nds32_link_hash_table *table;
12007
12008 table = nds32_elf_hash_table (link_info);
12009 if (table == NULL)
12010 return;
12011
12012 table->relax_fp_as_gp = relax_fp_as_gp;
12013 table->eliminate_gc_relocs = eliminate_gc_relocs;
12014 table->sym_ld_script = sym_ld_script;
12015 table ->load_store_relax = load_store_relax;
12016 table->target_optimize = target_optimize;
12017 table->relax_status = relax_status;
12018 table->relax_round = relax_round;
12019 table->ex9_export_file = ex9_export_file;
12020 table->ex9_import_file = ex9_import_file;
12021 table->update_ex9_table = update_ex9_table;
12022 table->ex9_limit = ex9_limit;
12023 table->ex9_loop_aware = ex9_loop_aware;
12024 table->ifc_loop_aware = ifc_loop_aware;
12025}
12026\f
12027/* These functions and data-structures are used for fp-as-gp
12028 optimization. */
12029
12030#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12031/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12032 the read-only section and read-write section. */
12033#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12034
12035/* An nds32_fag represent a gp-relative access.
12036 We find best fp-base by using a sliding window
12037 to find a base address which can cover most gp-access. */
12038struct nds32_fag
12039{
12040 struct nds32_fag *next; /* NULL-teminated linked list. */
12041 bfd_vma addr; /* The address of this fag. */
12042 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12043 It is used for applying FP7U2_FLAG. */
12044 int count; /* How many times this address is referred.
12045 There should be exactly `count' relocations
12046 in relas. */
12047 int relas_capcity; /* The buffer size of relas.
12048 We use an array instead of linked-list,
12049 and realloc is used to adjust buffer size. */
12050};
12051
12052static void
12053nds32_fag_init (struct nds32_fag *head)
12054{
12055 memset (head, 0, sizeof (struct nds32_fag));
12056}
12057
12058static void
12059nds32_fag_verify (struct nds32_fag *head)
12060{
12061 struct nds32_fag *iter;
12062 struct nds32_fag *prev;
12063
12064 prev = NULL;
12065 iter = head->next;
12066 while (iter)
12067 {
12068 if (prev && prev->addr >= iter->addr)
12069 puts ("Bug in fp-as-gp insertion.");
12070 prev = iter;
12071 iter = iter->next;
12072 }
12073}
12074
12075/* Insert a fag in ascending order.
12076 If a fag of the same address already exists,
12077 they are chained by relas array. */
12078
12079static void
12080nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12081 Elf_Internal_Rela * rel)
12082{
12083 struct nds32_fag *iter;
12084 struct nds32_fag *new_fag;
12085 const int INIT_RELAS_CAP = 4;
12086
12087 for (iter = head;
12088 iter->next && iter->next->addr <= addr;
12089 iter = iter->next)
12090 /* Find somewhere to insert. */ ;
12091
12092 /* `iter' will be equal to `head' if the list is empty. */
12093 if (iter != head && iter->addr == addr)
12094 {
12095 /* The address exists in the list.
12096 Insert `rel' into relocation list, relas. */
12097
12098 /* Check whether relas is big enough. */
12099 if (iter->count >= iter->relas_capcity)
12100 {
12101 iter->relas_capcity *= 2;
12102 iter->relas = bfd_realloc
12103 (iter->relas, iter->relas_capcity * sizeof (void *));
12104 }
12105 iter->relas[iter->count++] = rel;
12106 return;
12107 }
12108
12109 /* This is a new address. Create a fag node for it. */
12110 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12111 memset (new_fag, 0, sizeof (*new_fag));
12112 new_fag->addr = addr;
12113 new_fag->count = 1;
12114 new_fag->next = iter->next;
12115 new_fag->relas_capcity = INIT_RELAS_CAP;
12116 new_fag->relas = (Elf_Internal_Rela **)
12117 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12118 new_fag->relas[0] = rel;
12119 iter->next = new_fag;
12120
12121 nds32_fag_verify (head);
12122}
12123
12124static void
12125nds32_fag_free_list (struct nds32_fag *head)
12126{
12127 struct nds32_fag *iter;
12128
12129 iter = head->next;
12130 while (iter)
12131 {
12132 struct nds32_fag *tmp = iter;
12133 iter = iter->next;
12134 free (tmp->relas);
12135 tmp->relas = NULL;
12136 free (tmp);
12137 }
12138}
12139
35c08157
KLC		 12140/* Find the best fp-base address.
12141 The relocation associated with that address is returned,
12142 so we can track the symbol instead of a fixed address.
12143
12144 When relaxation, the address of an datum may change,
12145 because a text section is shrinked, so the data section
1c8f6a4d 12146 moves forward. If the aligments of text and data section
35c08157
KLC		 12147 are different, their distance may change too.
12148 Therefore, tracking a fixed address is not appriate. */
12149
12150static int
12151nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12152{
12153 struct nds32_fag *base; /* First fag in the window. */
12154 struct nds32_fag *last; /* First fag outside the window. */
12155 int accu = 0; /* Usage accumulation. */
12156 struct nds32_fag *best; /* Best fag. */
12157 int baccu = 0; /* Best accumulation. */
12158
12159 /* Use first fag for initial, and find the last fag in the window.
12160
12161 In each iteration, we could simply subtract previous fag
12162 and accumulate following fags which are inside the window,
12163 untill we each the end. */
12164
1c8f6a4d
KLC		 12165 if (head->next == NULL)
12166 {
12167 *bestpp = NULL;
12168 return 0;
12169 }
35c08157
KLC		 12170
12171 /* Initialize base. */
12172 base = head->next;
12173 best = base;
12174 for (last = base;
12175 last && last->addr < base->addr + FAG_WINDOW;
12176 last = last->next)
12177 accu += last->count;
12178
12179 baccu = accu;
12180
12181 /* Record the best base in each iteration. */
12182 while (base->next)
1c8f6a4d
KLC		 12183 {
12184 accu -= base->count;
12185 base = base->next;
12186 /* Account fags in window. */
12187 for (/* Nothing. */;
12188 last && last->addr < base->addr + FAG_WINDOW;
12189 last = last->next)
12190 accu += last->count;
12191
12192 /* A better fp-base? */
12193 if (accu > baccu)
12194 {
12195 best = base;
12196 baccu = accu;
12197 }
12198 }
35c08157
KLC		 12199
12200 if (bestpp)
12201 *bestpp = best;
12202 return baccu;
12203}
12204
12205/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12206 so we can convert it fo fp-relative access later.
12207 `best_fag' is the best fp-base. Only those inside the window
12208 of best_fag is applied the flag. */
12209
12210static bfd_boolean
12211nds32_fag_mark_relax (struct bfd_link_info *link_info,
12212 bfd *abfd, struct nds32_fag *best_fag,
12213 Elf_Internal_Rela *internal_relocs,
12214 Elf_Internal_Rela *irelend)
12215{
12216 struct nds32_fag *ifag;
12217 bfd_vma best_fpbase, gp;
12218 bfd *output_bfd;
12219
12220 output_bfd = abfd->sections->output_section->owner;
12221 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12222 best_fpbase = best_fag->addr;
12223
1c8f6a4d
KLC		 12224 if (best_fpbase > gp + sdata_range[1][1]
12225 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12226 return FALSE;
12227
12228 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12229 so we know they can be converted to lwi37.fp. */
12230 for (ifag = best_fag;
12231 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12232 {
12233 int i;
12234
12235 for (i = 0; i < ifag->count; i++)
12236 {
12237 Elf_Internal_Rela *insn16_rel;
12238 Elf_Internal_Rela *fag_rel;
12239
12240 fag_rel = ifag->relas[i];
12241
12242 /* Only if this is within the WINDOWS, FP7U2_FLAG
12243 is applied. */
12244
12245 insn16_rel = find_relocs_at_address
12246 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12247
12248 if (insn16_rel != irelend)
12249 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12250 }
12251 }
12252 return TRUE;
12253}
12254
1c8f6a4d
KLC		 12255/* Reset INSN16 to clean fp as gp. */
12256
12257static void
12258nds32_fag_unmark_relax (struct nds32_fag *fag,
12259 Elf_Internal_Rela *internal_relocs,
12260 Elf_Internal_Rela *irelend)
12261{
12262 struct nds32_fag *ifag;
12263 int i;
12264 Elf_Internal_Rela *insn16_rel;
12265 Elf_Internal_Rela *fag_rel;
12266
12267 for (ifag = fag; ifag; ifag = ifag->next)
12268 {
12269 for (i = 0; i < ifag->count; i++)
12270 {
12271 fag_rel = ifag->relas[i];
12272
12273 /* Restore the INSN16 relocation. */
12274 insn16_rel = find_relocs_at_address
12275 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12276
12277 if (insn16_rel != irelend)
12278 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12279 }
12280 }
12281}
12282
35c08157
KLC		 12283/* This is the main function of fp-as-gp optimization.
12284 It should be called by relax_section. */
12285
12286static bfd_boolean
12287nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12288 bfd *abfd, asection *sec,
12289 Elf_Internal_Rela *internal_relocs,
12290 Elf_Internal_Rela *irelend,
12291 Elf_Internal_Sym *isymbuf)
12292{
12293 Elf_Internal_Rela *begin_rel = NULL;
12294 Elf_Internal_Rela *irel;
12295 struct nds32_fag fag_head;
12296 Elf_Internal_Shdr *symtab_hdr;
12297 bfd_byte *contents;
1c8f6a4d 12298 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12299
12300 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12301
12302 /* Per-function fp-base selection.
12303 1. Create a list for all the gp-relative access.
12304 2. Base on those gp-relative address,
12305 find a fp-base which can cover most access.
12306 3. Use the fp-base for fp-as-gp relaxation.
12307
12308 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12309 we should
12310 1. delete the `la $fp, _FP_BASE_' instruction and
12311 2. not convert lwi.gp to lwi37.fp.
12312
12313 To delete the _FP_BASE_ instruction, we simply apply
12314 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12315
12316 To suppress the conversion, we simply NOT to apply
12317 R_NDS32_INSN16_FP7U2_FLAG flag. */
12318
12319 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12320
0c4bd9d9 12321 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12322 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12323 return FALSE;
12324
12325 /* Check whether it is worth for fp-as-gp optimization,
12326 i.e., at least 3 gp-load.
12327
12328 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12329 apply this optimization. */
12330
12331 for (irel = internal_relocs; irel < irelend; irel++)
12332 {
12333 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12334 One we enter the begin of the region, we track all the LW/ST
12335 instructions, so when we leave the region, we try to find
12336 the best fp-base address for those LW/ST instructions. */
12337
12338 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12339 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12340 {
12341 /* Begin of the region. */
12342 if (begin_rel)
695344c0 12343 /* xgettext:c-format */
38f14ab8 12344 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC		 12345
12346 begin_rel = irel;
12347 nds32_fag_init (&fag_head);
1c8f6a4d 12348 ifc_inside = FALSE;
35c08157
KLC		 12349 }
12350 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12351 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12352 {
12353 int accu;
1c8f6a4d 12354 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12355 int dist;
12356
12357 /* End of the region.
12358 Check whether it is worth to do fp-as-gp. */
12359
12360 if (begin_rel == NULL)
12361 {
695344c0 12362 /* xgettext:c-format */
38f14ab8
AM		 12363 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12364 abfd, sec);
35c08157
KLC		 12365 continue;
12366 }
12367
12368 accu = nds32_fag_find_base (&fag_head, &best_fag);
12369
1c8f6a4d
KLC		 12370 /* Clean FP7U2_FLAG because they may set ever. */
12371 tmp_fag = fag_head.next;
12372 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12373
35c08157
KLC		 12374 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12375 if (accu < FAG_THRESHOLD
12376 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12377 internal_relocs, irelend))
12378 {
12379 /* Not worth to do fp-as-gp. */
12380 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12381 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12382 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12383 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12384 nds32_fag_free_list (&fag_head);
12385 begin_rel = NULL;
12386 continue;
12387 }
12388
12389 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12390 so we use it to record the distance to the reloction of best
12391 fp-base. */
12392 dist = best_fag->relas[0] - begin_rel;
12393 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12394 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12395 relocation. And get the base value when relocating. */
1c8f6a4d 12396 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12397 begin_rel->r_addend |= dist << 16;
12398
12399 nds32_fag_free_list (&fag_head);
12400 begin_rel = NULL;
12401 }
12402
1c8f6a4d 12403 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12404 /* Skip if we are not in the region of fp-as-gp. */
12405 continue;
12406
12407 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12408 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12409 {
12410 bfd_vma addr;
12411 uint32_t insn;
12412
12413 /* A gp-relative access is found. Insert it to the fag-list. */
12414
12415 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12416 insn = bfd_getb32 (contents + irel->r_offset);
12417 if (!N32_IS_RT3 (insn))
12418 continue;
12419
12420 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12421 nds32_fag_insert (&fag_head, addr, irel);
12422 }
12423 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12424 {
12425 begin_rel = NULL;
12426 }
1c8f6a4d
KLC		 12427 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12428 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12429 {
12430 /* Suppress fp as gp when encounter ifc. */
12431 ifc_inside = TRUE;
12432 }
35c08157
KLC		 12433 }
12434
12435 return TRUE;
12436}
12437
12438/* Remove unused `la $fp, _FD_BASE_' instruction. */
12439
12440static bfd_boolean
12441nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12442 Elf_Internal_Rela *internal_relocs,
12443 Elf_Internal_Rela *irelend)
12444{
12445 Elf_Internal_Rela *irel;
12446 Elf_Internal_Shdr *symtab_hdr;
12447 bfd_byte *contents = NULL;
12448 nds32_elf_blank_t *relax_blank_list = NULL;
12449 bfd_boolean result = TRUE;
12450 bfd_boolean unused_region = FALSE;
12451
12452 /*
12453 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12454 * R_NDS32_17IFC_PCREL_RELA
12455 * R_NDS32_10IFCU_PCREL_RELA
12456
12457 CASE??????????????
12458 */
12459
12460 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12461 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12462
12463 for (irel = internal_relocs; irel < irelend; irel++)
12464 {
12465 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12466 we marked to in previous pass.
12467 DO NOT scan relocations again, since we've alreadly decided it
12468 and set the flag. */
12469 const char *syname;
12470 int syndx;
12471 uint32_t insn;
12472
12473 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12474 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12475 unused_region = TRUE;
12476 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12477 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12478 unused_region = FALSE;
12479
12480 /* We're not in the region. */
12481 if (!unused_region)
12482 continue;
12483
12484 /* _FP_BASE_ must be a GLOBAL symbol. */
12485 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12486 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12487 continue;
12488
12489 /* The symbol name must be _FP_BASE_. */
12490 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12491 if (strcmp (syname, FP_BASE_NAME) != 0)
12492 continue;
12493
12494 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12495 {
12496 /* addi.gp $fp, -256 */
12497 insn = bfd_getb32 (contents + irel->r_offset);
12498 if (insn != INSN_ADDIGP_TO_FP)
12499 continue;
12500 }
12501 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12502 {
12503 /* addi $fp, $gp, -256 */
12504 insn = bfd_getb32 (contents + irel->r_offset);
12505 if (insn != INSN_ADDI_GP_TO_FP)
12506 continue;
12507 }
12508 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12509 {
12510 /* movi $fp, FP_BASE */
12511 insn = bfd_getb32 (contents + irel->r_offset);
12512 if (insn != INSN_MOVI_TO_FP)
12513 continue;
12514 }
12515 else
12516 continue;
12517
12518 /* We got here because a FP_BASE instruction is found. */
12519 if (!insert_nds32_elf_blank_recalc_total
12520 (&relax_blank_list, irel->r_offset, 4))
12521 goto error_return;
12522 }
12523
12524finish:
12525 if (relax_blank_list)
12526 {
12527 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12528 relax_blank_list = NULL;
12529 }
12530 return result;
12531
12532error_return:
12533 result = FALSE;
12534 goto finish;
12535}
1c8f6a4d
KLC		 12536
12537/* This is a version of bfd_generic_get_relocated_section_contents.
12538 We need this variety because relaxation will modify the dwarf
12539 infomation. When there is undefined symbol reference error mesage,
12540 linker need to dump line number where the symbol be used. However
12541 the address is be relaxed, it can not get the original dwarf contents.
12542 The variety only modify function call for reading in the section. */
12543
12544static bfd_byte *
12545nds32_elf_get_relocated_section_contents (bfd *abfd,
12546 struct bfd_link_info *link_info,
12547 struct bfd_link_order *link_order,
12548 bfd_byte *data,
12549 bfd_boolean relocatable,
12550 asymbol **symbols)
12551{
12552 bfd *input_bfd = link_order->u.indirect.section->owner;
12553 asection *input_section = link_order->u.indirect.section;
12554 long reloc_size;
12555 arelent **reloc_vector;
12556 long reloc_count;
12557
12558 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12559 if (reloc_size < 0)
12560 return NULL;
12561
12562 /* Read in the section. */
0c4bd9d9 12563 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 12564 return NULL;
12565
12566 if (reloc_size == 0)
12567 return data;
12568
12569 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12570 if (reloc_vector == NULL)
12571 return NULL;
12572
12573 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12574 reloc_vector, symbols);
12575 if (reloc_count < 0)
12576 goto error_return;
12577
12578 if (reloc_count > 0)
12579 {
12580 arelent **parent;
12581 for (parent = reloc_vector; *parent != NULL; parent++)
12582 {
12583 char *error_message = NULL;
12584 asymbol *symbol;
12585 bfd_reloc_status_type r;
12586
12587 symbol = *(*parent)->sym_ptr_ptr;
12588 if (symbol->section && discarded_section (symbol->section))
12589 {
12590 bfd_byte *p;
12591 static reloc_howto_type none_howto
12592 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12593 "unused", FALSE, 0, 0, FALSE);
12594
12595 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12596 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12597 p);
12598 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12599 (*parent)->addend = 0;
12600 (*parent)->howto = &none_howto;
12601 r = bfd_reloc_ok;
12602 }
12603 else
12604 r = bfd_perform_relocation (input_bfd, *parent, data,
12605 input_section,
12606 relocatable ? abfd : NULL,
12607 &error_message);
12608
12609 if (relocatable)
12610 {
12611 asection *os = input_section->output_section;
12612
12613 /* A partial link, so keep the relocs. */
12614 os->orelocation[os->reloc_count] = *parent;
12615 os->reloc_count++;
12616 }
12617
12618 if (r != bfd_reloc_ok)
12619 {
12620 switch (r)
12621 {
12622 case bfd_reloc_undefined:
1a72702b
AM		 12623 (*link_info->callbacks->undefined_symbol)
12624 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12625 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC		 12626 break;
12627 case bfd_reloc_dangerous:
12628 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 12629 (*link_info->callbacks->reloc_dangerous)
12630 (link_info, error_message,
12631 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12632 break;
12633 case bfd_reloc_overflow:
1a72702b
AM		 12634 (*link_info->callbacks->reloc_overflow)
12635 (link_info, NULL,
12636 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12637 (*parent)->howto->name, (*parent)->addend,
12638 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12639 break;
12640 case bfd_reloc_outofrange:
12641 /* PR ld/13730:
12642 This error can result when processing some partially
12643 complete binaries. Do not abort, but issue an error
12644 message instead. */
12645 link_info->callbacks->einfo
695344c0 12646 /* xgettext:c-format */
c1c8c1ef 12647 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 12648 abfd, input_section, * parent);
12649 goto error_return;
12650
12651 default:
12652 abort ();
12653 break;
12654 }
12655 }
12656 }
12657 }
12658
12659 free (reloc_vector);
12660 return data;
12661
12662error_return:
12663 free (reloc_vector);
12664 return NULL;
12665}
35c08157 12666\f
35c08157
KLC		 12667
12668#define ELF_ARCH bfd_arch_nds32
12669#define ELF_MACHINE_CODE EM_NDS32
12670#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 12671#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 12672
6d00b590 12673#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 12674#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 12675#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 12676#define TARGET_LITTLE_NAME "elf32-nds32le"
12677
12678#define elf_info_to_howto nds32_info_to_howto
12679#define elf_info_to_howto_rel nds32_info_to_howto_rel
12680
12681#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
12682#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
12683#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
12684#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
12685#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
12686
07d6d2b8 12687#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 12688#define elf_backend_action_discarded nds32_elf_action_discarded
12689#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
12690#define elf_backend_check_relocs nds32_elf_check_relocs
12691#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
12692#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
12693#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
12694#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
12695#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
12696#define elf_backend_relocate_section nds32_elf_relocate_section
12697#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 12698#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
12699#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
12700#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
12701#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
12702#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
12703#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
12704#define elf_backend_object_p nds32_elf_object_p
12705#define elf_backend_final_write_processing nds32_elf_final_write_processing
12706#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d 12707#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 12708 nds32_elf_get_relocated_section_contents
35c08157
KLC		 12709
12710#define elf_backend_can_gc_sections 1
12711#define elf_backend_can_refcount 1
12712#define elf_backend_want_got_plt 1
12713#define elf_backend_plt_readonly 1
12714#define elf_backend_want_plt_sym 0
12715#define elf_backend_got_header_size 12
12716#define elf_backend_may_use_rel_p 1
12717#define elf_backend_default_use_rela_p 1
12718#define elf_backend_may_use_rela_p 1
64f52338 12719#define elf_backend_dtrel_excludes_plt 1
35c08157
KLC		 12720
12721#include "elf32-target.h"
12722
12723#undef ELF_MAXPAGESIZE
12724#define ELF_MAXPAGESIZE 0x2000
12725
12726#undef TARGET_BIG_SYM
6d00b590 12727#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 12728#undef TARGET_BIG_NAME
12729#define TARGET_BIG_NAME "elf32-nds32be-linux"
12730#undef TARGET_LITTLE_SYM
6d00b590 12731#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 12732#undef TARGET_LITTLE_NAME
12733#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
12734#undef elf32_bed
12735#define elf32_bed elf32_nds32_lin_bed
12736
12737#include "elf32-target.h"
GDB Binutils - Deliverables
This page took 0.890604 seconds and 4 git commands to generate.