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Fix illegal memory accesses when parsing a corrupt SOM format file.
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
CommitLineData
35c08157 1/* NDS32-specific support for 32-bit ELF.
250d07de 2 Copyright (C) 2012-2021 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
35c08157
KLC		 25#include "bfdlink.h"
26#include "libbfd.h"
27#include "elf-bfd.h"
28#include "libiberty.h"
35c08157
KLC		 29#include "elf/nds32.h"
30#include "opcode/nds32.h"
31#include "elf32-nds32.h"
32#include "opcode/cgen.h"
33#include "../opcodes/nds32-opc.h"
34
bb294208
AM		 35/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
36#define OCTETS_PER_BYTE(ABFD, SEC) 1
37
35c08157
KLC		 38/* Relocation HOWTO functions. */
39static bfd_reloc_status_type nds32_elf_ignore_reloc
40 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
41static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
42 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
43static bfd_reloc_status_type nds32_elf_hi20_reloc
44 (bfd *, arelent *, asymbol *, void *,
45 asection *, bfd *, char **);
46static bfd_reloc_status_type nds32_elf_lo12_reloc
47 (bfd *, arelent *, asymbol *, void *,
48 asection *, bfd *, char **);
49static bfd_reloc_status_type nds32_elf_generic_reloc
50 (bfd *, arelent *, asymbol *, void *,
51 asection *, bfd *, char **);
52static bfd_reloc_status_type nds32_elf_sda15_reloc
53 (bfd *, arelent *, asymbol *, void *,
54 asection *, bfd *, char **);
55
56/* Helper functions for HOWTO. */
57static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
58 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
59 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 60
61/* Nds32 helper functions. */
35c08157 62static bfd_vma calculate_memory_address
fbaf61ad 63 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
0c4bd9d9 64static int nds32_get_section_contents (bfd *, asection *,
0a1b45a2 65 bfd_byte **, bool);
35c08157
KLC		 66static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
67 Elf_Internal_Sym **);
0a1b45a2 68static bool nds32_relax_fp_as_gp
35c08157
KLC		 69 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
70 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
71 Elf_Internal_Sym *isymbuf);
0a1b45a2 72static bool nds32_fag_remove_unused_fpbase
35c08157
KLC		 73 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
74 Elf_Internal_Rela *irelend);
75
76enum
77{
78 MACH_V1 = bfd_mach_n1h,
79 MACH_V2 = bfd_mach_n1h_v2,
80 MACH_V3 = bfd_mach_n1h_v3,
81 MACH_V3M = bfd_mach_n1h_v3m
82};
83
84#define MIN(a, b) ((a) > (b) ? (b) : (a))
85#define MAX(a, b) ((a) > (b) ? (a) : (b))
86
87/* The name of the dynamic interpreter. This is put in the .interp
88 section. */
89#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
90
fbaf61ad
NC		 91#define NDS32_GUARD_SEC_P(flags) ((flags) & SEC_ALLOC \
92 && (flags) & SEC_LOAD \
93 && (flags) & SEC_READONLY)
94
35c08157
KLC		 95/* The nop opcode we use. */
96#define NDS32_NOP32 0x40000009
97#define NDS32_NOP16 0x9200
98
99/* The size in bytes of an entry in the procedure linkage table. */
100#define PLT_ENTRY_SIZE 24
101#define PLT_HEADER_SIZE 24
102
103/* The first entry in a procedure linkage table are reserved,
104 and the initial contents are unimportant (we zero them out).
105 Subsequent entries look like this. */
07d6d2b8
AM		 106#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
107#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
108#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
109#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
110#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 111
112/* $ta is change to $r15 (from $r25). */
113#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 114#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
115#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
116#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
117#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
118#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
119
120#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
121#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
122#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
123#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
124#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 125
126#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 127#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
128#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
129#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
130#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
131#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 132
1c8f6a4d
KLC		 133/* These are macros used to get the relocation accurate value. */
134#define ACCURATE_8BIT_S1 (0x100)
135#define ACCURATE_U9BIT_S1 (0x400)
136#define ACCURATE_12BIT_S1 (0x2000)
137#define ACCURATE_14BIT_S1 (0x4000)
138#define ACCURATE_19BIT (0x40000)
139
140/* These are macros used to get the relocation conservative value. */
141#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
142#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
143#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
144#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
145/* These must be more conservative because the address may be in
146 different segment. */
147#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
148#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
149#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
150#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
151#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
152
35c08157
KLC		 153/* Size of small data/bss sections, used to calculate SDA_BASE. */
154static long got_size = 0;
155static int is_SDA_BASE_set = 0;
35c08157 156
35c08157
KLC		 157/* Convert ELF-VER in eflags to string for debugging purpose. */
158static const char *const nds32_elfver_strtab[] =
159{
160 "ELF-1.2",
161 "ELF-1.3",
162 "ELF-1.4",
163};
164
165/* The nds32 linker needs to keep track of the number of relocs that it
166 decides to copy in check_relocs for each symbol. This is so that
167 it can discard PC relative relocs if it doesn't need them when
168 linking with -Bsymbolic. We store the information in a field
169 extending the regular ELF linker hash table. */
170
171/* This structure keeps track of the number of PC relative relocs we
172 have copied for a given symbol. */
173
174struct elf_nds32_pcrel_relocs_copied
175{
176 /* Next section. */
177 struct elf_nds32_pcrel_relocs_copied *next;
178 /* A section in dynobj. */
179 asection *section;
180 /* Number of relocs copied in this section. */
181 bfd_size_type count;
182};
183
fbaf61ad
NC		 184enum elf_nds32_tls_type
185{
186 GOT_UNKNOWN = (0),
187 GOT_NORMAL = (1 << 0),
188 GOT_TLS_LE = (1 << 1),
189 GOT_TLS_IE = (1 << 2),
190 GOT_TLS_IEGP = (1 << 3),
191 GOT_TLS_LD = (1 << 4),
192 GOT_TLS_GD = (1 << 5),
193 GOT_TLS_DESC = (1 << 6),
194};
195
35c08157
KLC		 196/* Nds32 ELF linker hash entry. */
197
198struct elf_nds32_link_hash_entry
199{
200 struct elf_link_hash_entry root;
201
1c8f6a4d 202 /* For checking relocation type. */
fbaf61ad
NC		 203 enum elf_nds32_tls_type tls_type;
204
205 int offset_to_gp;
35c08157
KLC		 206};
207
208/* Get the nds32 ELF linker hash table from a link_info structure. */
209
210#define FP_BASE_NAME "_FP_BASE_"
211static int check_start_export_sym = 0;
35c08157 212
1c8f6a4d
KLC		 213/* The offset for executable tls relaxation. */
214#define TP_OFFSET 0x0
215
fbaf61ad
NC		 216typedef struct
217{
218 int min_id;
219 int max_id;
220 int count;
221 int bias;
222 int init;
223} elf32_nds32_relax_group_t;
224
1c8f6a4d
KLC		 225struct elf_nds32_obj_tdata
226{
227 struct elf_obj_tdata root;
228
229 /* tls_type for each local got entry. */
230 char *local_got_tls_type;
fbaf61ad
NC		 231
232 /* GOTPLT entries for TLS descriptors. */
233 bfd_vma *local_tlsdesc_gotent;
234
235 /* for R_NDS32_RELAX_GROUP handling. */
236 elf32_nds32_relax_group_t relax_group;
237
238 unsigned int hdr_size;
239 int* offset_to_gp;
1c8f6a4d
KLC		 240};
241
242#define elf_nds32_tdata(bfd) \
243 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
244
245#define elf32_nds32_local_got_tls_type(bfd) \
246 (elf_nds32_tdata (bfd)->local_got_tls_type)
247
fbaf61ad
NC		 248#define elf32_nds32_local_gp_offset(bfd) \
249 (elf_nds32_tdata (bfd)->offset_to_gp)
250
1c8f6a4d
KLC		 251#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
252
fbaf61ad
NC		 253#define elf32_nds32_relax_group_ptr(bfd) \
254 &(elf_nds32_tdata (bfd)->relax_group)
255
0a1b45a2 256static bool
1c8f6a4d
KLC		 257nds32_elf_mkobject (bfd *abfd)
258{
259 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
260 NDS32_ELF_DATA);
261}
262
35c08157 263/* Relocations used for relocation. */
fbaf61ad
NC		 264/* Define HOWTO2 (for relocation) and HOWTO3 (for relaxation) to
265 initialize array nds32_elf_howto_table in any order. The benefit
266 is that we can add any new relocations with any numbers and don't
267 need to fill the gap by lots of EMPTY_HOWTO. */
268#define HOWTO2(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
269 [C] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
270
35c08157
KLC		 271static reloc_howto_type nds32_elf_howto_table[] =
272{
273 /* This reloc does nothing. */
fbaf61ad
NC		 274 HOWTO2 (R_NDS32_NONE, /* type */
275 0, /* rightshift */
276 2, /* size (0 = byte, 1 = short, 2 = long) */
277 32, /* bitsize */
0a1b45a2 278 false, /* pc_relative */
fbaf61ad
NC		 279 0, /* bitpos */
280 complain_overflow_bitfield,/* complain_on_overflow */
281 bfd_elf_generic_reloc, /* special_function */
282 "R_NDS32_NONE", /* name */
0a1b45a2 283 false, /* partial_inplace */
fbaf61ad
NC		 284 0, /* src_mask */
285 0, /* dst_mask */
0a1b45a2 286 false), /* pcrel_offset */
35c08157
KLC		 287
288 /* A 16 bit absolute relocation. */
fbaf61ad
NC		 289 HOWTO2 (R_NDS32_16, /* type */
290 0, /* rightshift */
291 1, /* size (0 = byte, 1 = short, 2 = long) */
292 16, /* bitsize */
0a1b45a2 293 false, /* pc_relative */
fbaf61ad
NC		 294 0, /* bitpos */
295 complain_overflow_bitfield,/* complain_on_overflow */
296 nds32_elf_generic_reloc,/* special_function */
297 "R_NDS32_16", /* name */
0a1b45a2 298 false, /* partial_inplace */
fbaf61ad
NC		 299 0xffff, /* src_mask */
300 0xffff, /* dst_mask */
0a1b45a2 301 false), /* pcrel_offset */
35c08157
KLC		 302
303 /* A 32 bit absolute relocation. */
fbaf61ad
NC		 304 HOWTO2 (R_NDS32_32, /* type */
305 0, /* rightshift */
306 2, /* size (0 = byte, 1 = short, 2 = long) */
307 32, /* bitsize */
0a1b45a2 308 false, /* pc_relative */
fbaf61ad
NC		 309 0, /* bitpos */
310 complain_overflow_bitfield,/* complain_on_overflow */
311 nds32_elf_generic_reloc,/* special_function */
312 "R_NDS32_32", /* name */
0a1b45a2 313 false, /* partial_inplace */
fbaf61ad
NC		 314 0xffffffff, /* src_mask */
315 0xffffffff, /* dst_mask */
0a1b45a2 316 false), /* pcrel_offset */
35c08157
KLC		 317
318 /* A 20 bit address. */
fbaf61ad
NC		 319 HOWTO2 (R_NDS32_20, /* type */
320 0, /* rightshift */
321 2, /* size (0 = byte, 1 = short, 2 = long) */
322 20, /* bitsize */
0a1b45a2 323 false, /* pc_relative */
fbaf61ad
NC		 324 0, /* bitpos */
325 complain_overflow_unsigned,/* complain_on_overflow */
326 nds32_elf_generic_reloc,/* special_function */
327 "R_NDS32_20", /* name */
0a1b45a2 328 false, /* partial_inplace */
fbaf61ad
NC		 329 0xfffff, /* src_mask */
330 0xfffff, /* dst_mask */
0a1b45a2 331 false), /* pcrel_offset */
35c08157
KLC		 332
333 /* An PC Relative 9-bit relocation, shifted by 2.
334 This reloc is complicated because relocations are relative to pc & -4.
335 i.e. branches in the right insn slot use the address of the left insn
336 slot for pc. */
fbaf61ad 337 /* It's not clear whether this should have partial_inplace set or not.
35c08157
KLC		 338 Branch relaxing in the assembler can store the addend in the insn,
339 and if bfd_install_relocation gets called the addend may get added
340 again. */
fbaf61ad
NC		 341 HOWTO2 (R_NDS32_9_PCREL, /* type */
342 1, /* rightshift */
343 1, /* size (0 = byte, 1 = short, 2 = long) */
344 8, /* bitsize */
0a1b45a2 345 true, /* pc_relative */
fbaf61ad
NC		 346 0, /* bitpos */
347 complain_overflow_signed,/* complain_on_overflow */
348 nds32_elf_9_pcrel_reloc,/* special_function */
349 "R_NDS32_9_PCREL", /* name */
0a1b45a2 350 false, /* partial_inplace */
fbaf61ad
NC		 351 0xff, /* src_mask */
352 0xff, /* dst_mask */
0a1b45a2 353 true), /* pcrel_offset */
35c08157
KLC		 354
355 /* A relative 15 bit relocation, right shifted by 1. */
fbaf61ad
NC		 356 HOWTO2 (R_NDS32_15_PCREL, /* type */
357 1, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 14, /* bitsize */
0a1b45a2 360 true, /* pc_relative */
fbaf61ad
NC		 361 0, /* bitpos */
362 complain_overflow_signed,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_NDS32_15_PCREL", /* name */
0a1b45a2 365 false, /* partial_inplace */
fbaf61ad
NC		 366 0x3fff, /* src_mask */
367 0x3fff, /* dst_mask */
0a1b45a2 368 true), /* pcrel_offset */
35c08157
KLC		 369
370 /* A relative 17 bit relocation, right shifted by 1. */
fbaf61ad
NC		 371 HOWTO2 (R_NDS32_17_PCREL, /* type */
372 1, /* rightshift */
373 2, /* size (0 = byte, 1 = short, 2 = long) */
374 16, /* bitsize */
0a1b45a2 375 true, /* pc_relative */
fbaf61ad
NC		 376 0, /* bitpos */
377 complain_overflow_signed,/* complain_on_overflow */
378 bfd_elf_generic_reloc, /* special_function */
379 "R_NDS32_17_PCREL", /* name */
0a1b45a2 380 false, /* partial_inplace */
fbaf61ad
NC		 381 0xffff, /* src_mask */
382 0xffff, /* dst_mask */
0a1b45a2 383 true), /* pcrel_offset */
35c08157
KLC		 384
385 /* A relative 25 bit relocation, right shifted by 1. */
fbaf61ad 386 /* It's not clear whether this should have partial_inplace set or not.
35c08157
KLC		 387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
fbaf61ad
NC		 390 HOWTO2 (R_NDS32_25_PCREL, /* type */
391 1, /* rightshift */
392 2, /* size (0 = byte, 1 = short, 2 = long) */
393 24, /* bitsize */
0a1b45a2 394 true, /* pc_relative */
fbaf61ad
NC		 395 0, /* bitpos */
396 complain_overflow_signed,/* complain_on_overflow */
397 bfd_elf_generic_reloc, /* special_function */
398 "R_NDS32_25_PCREL", /* name */
0a1b45a2 399 false, /* partial_inplace */
fbaf61ad
NC		 400 0xffffff, /* src_mask */
401 0xffffff, /* dst_mask */
0a1b45a2 402 true), /* pcrel_offset */
35c08157
KLC		 403
404 /* High 20 bits of address when lower 12 is or'd in. */
fbaf61ad
NC		 405 HOWTO2 (R_NDS32_HI20, /* type */
406 12, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 20, /* bitsize */
0a1b45a2 409 false, /* pc_relative */
fbaf61ad
NC		 410 0, /* bitpos */
411 complain_overflow_dont,/* complain_on_overflow */
412 nds32_elf_hi20_reloc, /* special_function */
413 "R_NDS32_HI20", /* name */
0a1b45a2 414 false, /* partial_inplace */
fbaf61ad
NC		 415 0x000fffff, /* src_mask */
416 0x000fffff, /* dst_mask */
0a1b45a2 417 false), /* pcrel_offset */
35c08157
KLC		 418
419 /* Lower 12 bits of address. */
fbaf61ad
NC		 420 HOWTO2 (R_NDS32_LO12S3, /* type */
421 3, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 9, /* bitsize */
0a1b45a2 424 false, /* pc_relative */
fbaf61ad
NC		 425 0, /* bitpos */
426 complain_overflow_dont,/* complain_on_overflow */
427 nds32_elf_lo12_reloc, /* special_function */
428 "R_NDS32_LO12S3", /* name */
0a1b45a2 429 false, /* partial_inplace */
fbaf61ad
NC		 430 0x000001ff, /* src_mask */
431 0x000001ff, /* dst_mask */
0a1b45a2 432 false), /* pcrel_offset */
35c08157
KLC		 433
434 /* Lower 12 bits of address. */
fbaf61ad
NC		 435 HOWTO2 (R_NDS32_LO12S2, /* type */
436 2, /* rightshift */
437 2, /* size (0 = byte, 1 = short, 2 = long) */
438 10, /* bitsize */
0a1b45a2 439 false, /* pc_relative */
fbaf61ad
NC		 440 0, /* bitpos */
441 complain_overflow_dont,/* complain_on_overflow */
442 nds32_elf_lo12_reloc, /* special_function */
443 "R_NDS32_LO12S2", /* name */
0a1b45a2 444 false, /* partial_inplace */
fbaf61ad
NC		 445 0x000003ff, /* src_mask */
446 0x000003ff, /* dst_mask */
0a1b45a2 447 false), /* pcrel_offset */
35c08157
KLC		 448
449 /* Lower 12 bits of address. */
fbaf61ad
NC		 450 HOWTO2 (R_NDS32_LO12S1, /* type */
451 1, /* rightshift */
452 2, /* size (0 = byte, 1 = short, 2 = long) */
453 11, /* bitsize */
0a1b45a2 454 false, /* pc_relative */
fbaf61ad
NC		 455 0, /* bitpos */
456 complain_overflow_dont,/* complain_on_overflow */
457 nds32_elf_lo12_reloc, /* special_function */
458 "R_NDS32_LO12S1", /* name */
0a1b45a2 459 false, /* partial_inplace */
fbaf61ad
NC		 460 0x000007ff, /* src_mask */
461 0x000007ff, /* dst_mask */
0a1b45a2 462 false), /* pcrel_offset */
35c08157
KLC		 463
464 /* Lower 12 bits of address. */
fbaf61ad
NC		 465 HOWTO2 (R_NDS32_LO12S0, /* type */
466 0, /* rightshift */
467 2, /* size (0 = byte, 1 = short, 2 = long) */
468 12, /* bitsize */
0a1b45a2 469 false, /* pc_relative */
fbaf61ad
NC		 470 0, /* bitpos */
471 complain_overflow_dont,/* complain_on_overflow */
472 nds32_elf_lo12_reloc, /* special_function */
473 "R_NDS32_LO12S0", /* name */
0a1b45a2 474 false, /* partial_inplace */
fbaf61ad
NC		 475 0x00000fff, /* src_mask */
476 0x00000fff, /* dst_mask */
0a1b45a2 477 false), /* pcrel_offset */
35c08157
KLC		 478
479 /* Small data area 15 bits offset. */
fbaf61ad
NC		 480 HOWTO2 (R_NDS32_SDA15S3, /* type */
481 3, /* rightshift */
482 2, /* size (0 = byte, 1 = short, 2 = long) */
483 15, /* bitsize */
0a1b45a2 484 false, /* pc_relative */
fbaf61ad
NC		 485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 nds32_elf_sda15_reloc, /* special_function */
488 "R_NDS32_SDA15S3", /* name */
0a1b45a2 489 false, /* partial_inplace */
fbaf61ad
NC		 490 0x00007fff, /* src_mask */
491 0x00007fff, /* dst_mask */
0a1b45a2 492 false), /* pcrel_offset */
35c08157
KLC		 493
494 /* Small data area 15 bits offset. */
fbaf61ad
NC		 495 HOWTO2 (R_NDS32_SDA15S2, /* type */
496 2, /* rightshift */
497 2, /* size (0 = byte, 1 = short, 2 = long) */
498 15, /* bitsize */
0a1b45a2 499 false, /* pc_relative */
fbaf61ad
NC		 500 0, /* bitpos */
501 complain_overflow_signed,/* complain_on_overflow */
502 nds32_elf_sda15_reloc, /* special_function */
503 "R_NDS32_SDA15S2", /* name */
0a1b45a2 504 false, /* partial_inplace */
fbaf61ad
NC		 505 0x00007fff, /* src_mask */
506 0x00007fff, /* dst_mask */
0a1b45a2 507 false), /* pcrel_offset */
35c08157
KLC		 508
509 /* Small data area 15 bits offset. */
fbaf61ad
NC		 510 HOWTO2 (R_NDS32_SDA15S1, /* type */
511 1, /* rightshift */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
513 15, /* bitsize */
0a1b45a2 514 false, /* pc_relative */
fbaf61ad
NC		 515 0, /* bitpos */
516 complain_overflow_signed,/* complain_on_overflow */
517 nds32_elf_sda15_reloc, /* special_function */
518 "R_NDS32_SDA15S1", /* name */
0a1b45a2 519 false, /* partial_inplace */
fbaf61ad
NC		 520 0x00007fff, /* src_mask */
521 0x00007fff, /* dst_mask */
0a1b45a2 522 false), /* pcrel_offset */
35c08157
KLC		 523
524 /* Small data area 15 bits offset. */
fbaf61ad
NC		 525 HOWTO2 (R_NDS32_SDA15S0, /* type */
526 0, /* rightshift */
527 2, /* size (0 = byte, 1 = short, 2 = long) */
528 15, /* bitsize */
0a1b45a2 529 false, /* pc_relative */
fbaf61ad
NC		 530 0, /* bitpos */
531 complain_overflow_signed,/* complain_on_overflow */
532 nds32_elf_sda15_reloc, /* special_function */
533 "R_NDS32_SDA15S0", /* name */
0a1b45a2 534 false, /* partial_inplace */
fbaf61ad
NC		 535 0x00007fff, /* src_mask */
536 0x00007fff, /* dst_mask */
0a1b45a2 537 false), /* pcrel_offset */
fbaf61ad
NC		 538
539 /* GNU extension to record C++ vtable hierarchy */
540 HOWTO2 (R_NDS32_GNU_VTINHERIT,/* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 0, /* bitsize */
0a1b45a2 544 false, /* pc_relative */
fbaf61ad
NC		 545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 NULL, /* special_function */
548 "R_NDS32_GNU_VTINHERIT",/* name */
0a1b45a2 549 false, /* partial_inplace */
fbaf61ad
NC		 550 0, /* src_mask */
551 0, /* dst_mask */
0a1b45a2 552 false), /* pcrel_offset */
fbaf61ad
NC		 553
554 /* GNU extension to record C++ vtable member usage */
555 HOWTO2 (R_NDS32_GNU_VTENTRY, /* type */
556 0, /* rightshift */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
558 0, /* bitsize */
0a1b45a2 559 false, /* pc_relative */
fbaf61ad
NC		 560 0, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 _bfd_elf_rel_vtable_reloc_fn,/* special_function */
563 "R_NDS32_GNU_VTENTRY", /* name */
0a1b45a2 564 false, /* partial_inplace */
fbaf61ad
NC		 565 0, /* src_mask */
566 0, /* dst_mask */
0a1b45a2 567 false), /* pcrel_offset */
35c08157
KLC		 568
569 /* A 16 bit absolute relocation. */
fbaf61ad
NC		 570 HOWTO2 (R_NDS32_16_RELA, /* type */
571 0, /* rightshift */
572 1, /* size (0 = byte, 1 = short, 2 = long) */
573 16, /* bitsize */
0a1b45a2 574 false, /* pc_relative */
fbaf61ad
NC		 575 0, /* bitpos */
576 complain_overflow_bitfield,/* complain_on_overflow */
577 bfd_elf_generic_reloc, /* special_function */
578 "R_NDS32_16_RELA", /* name */
0a1b45a2 579 false, /* partial_inplace */
fbaf61ad
NC		 580 0xffff, /* src_mask */
581 0xffff, /* dst_mask */
0a1b45a2 582 false), /* pcrel_offset */
35c08157
KLC		 583
584 /* A 32 bit absolute relocation. */
fbaf61ad
NC		 585 HOWTO2 (R_NDS32_32_RELA, /* type */
586 0, /* rightshift */
587 2, /* size (0 = byte, 1 = short, 2 = long) */
588 32, /* bitsize */
0a1b45a2 589 false, /* pc_relative */
fbaf61ad
NC		 590 0, /* bitpos */
591 complain_overflow_bitfield,/* complain_on_overflow */
592 bfd_elf_generic_reloc, /* special_function */
593 "R_NDS32_32_RELA", /* name */
0a1b45a2 594 false, /* partial_inplace */
fbaf61ad
NC		 595 0xffffffff, /* src_mask */
596 0xffffffff, /* dst_mask */
0a1b45a2 597 false), /* pcrel_offset */
35c08157
KLC		 598
599 /* A 20 bit address. */
fbaf61ad
NC		 600 HOWTO2 (R_NDS32_20_RELA, /* type */
601 0, /* rightshift */
602 2, /* size (0 = byte, 1 = short, 2 = long) */
603 20, /* bitsize */
0a1b45a2 604 false, /* pc_relative */
fbaf61ad
NC		 605 0, /* bitpos */
606 complain_overflow_signed,/* complain_on_overflow */
607 bfd_elf_generic_reloc, /* special_function */
608 "R_NDS32_20_RELA", /* name */
0a1b45a2 609 false, /* partial_inplace */
fbaf61ad
NC		 610 0xfffff, /* src_mask */
611 0xfffff, /* dst_mask */
0a1b45a2 612 false), /* pcrel_offset */
fbaf61ad
NC		 613
614 HOWTO2 (R_NDS32_9_PCREL_RELA, /* type */
615 1, /* rightshift */
616 1, /* size (0 = byte, 1 = short, 2 = long) */
617 8, /* bitsize */
0a1b45a2 618 true, /* pc_relative */
fbaf61ad
NC		 619 0, /* bitpos */
620 complain_overflow_signed,/* complain_on_overflow */
621 bfd_elf_generic_reloc, /* special_function */
622 "R_NDS32_9_PCREL_RELA",/* name */
0a1b45a2 623 false, /* partial_inplace */
fbaf61ad
NC		 624 0xff, /* src_mask */
625 0xff, /* dst_mask */
0a1b45a2 626 true), /* pcrel_offset */
35c08157
KLC		 627
628 /* A relative 15 bit relocation, right shifted by 1. */
fbaf61ad
NC		 629 HOWTO2 (R_NDS32_15_PCREL_RELA,/* type */
630 1, /* rightshift */
631 2, /* size (0 = byte, 1 = short, 2 = long) */
632 14, /* bitsize */
0a1b45a2 633 true, /* pc_relative */
fbaf61ad
NC		 634 0, /* bitpos */
635 complain_overflow_signed,/* complain_on_overflow */
636 bfd_elf_generic_reloc, /* special_function */
637 "R_NDS32_15_PCREL_RELA",/* name */
0a1b45a2 638 false, /* partial_inplace */
fbaf61ad
NC		 639 0x3fff, /* src_mask */
640 0x3fff, /* dst_mask */
0a1b45a2 641 true), /* pcrel_offset */
35c08157
KLC		 642
643 /* A relative 17 bit relocation, right shifted by 1. */
fbaf61ad
NC		 644 HOWTO2 (R_NDS32_17_PCREL_RELA,/* type */
645 1, /* rightshift */
646 2, /* size (0 = byte, 1 = short, 2 = long) */
647 16, /* bitsize */
0a1b45a2 648 true, /* pc_relative */
fbaf61ad
NC		 649 0, /* bitpos */
650 complain_overflow_signed,/* complain_on_overflow */
651 bfd_elf_generic_reloc, /* special_function */
652 "R_NDS32_17_PCREL_RELA",/* name */
0a1b45a2 653 false, /* partial_inplace */
fbaf61ad
NC		 654 0xffff, /* src_mask */
655 0xffff, /* dst_mask */
0a1b45a2 656 true), /* pcrel_offset */
35c08157
KLC		 657
658 /* A relative 25 bit relocation, right shifted by 2. */
fbaf61ad
NC		 659 HOWTO2 (R_NDS32_25_PCREL_RELA,/* type */
660 1, /* rightshift */
661 2, /* size (0 = byte, 1 = short, 2 = long) */
662 24, /* bitsize */
0a1b45a2 663 true, /* pc_relative */
fbaf61ad
NC		 664 0, /* bitpos */
665 complain_overflow_signed,/* complain_on_overflow */
666 bfd_elf_generic_reloc, /* special_function */
667 "R_NDS32_25_PCREL_RELA",/* name */
0a1b45a2 668 false, /* partial_inplace */
fbaf61ad
NC		 669 0xffffff, /* src_mask */
670 0xffffff, /* dst_mask */
0a1b45a2 671 true), /* pcrel_offset */
35c08157
KLC		 672
673 /* High 20 bits of address when lower 16 is or'd in. */
fbaf61ad
NC		 674 HOWTO2 (R_NDS32_HI20_RELA, /* type */
675 12, /* rightshift */
676 2, /* size (0 = byte, 1 = short, 2 = long) */
677 20, /* bitsize */
0a1b45a2 678 false, /* pc_relative */
fbaf61ad
NC		 679 0, /* bitpos */
680 complain_overflow_dont,/* complain_on_overflow */
681 bfd_elf_generic_reloc, /* special_function */
682 "R_NDS32_HI20_RELA", /* name */
0a1b45a2 683 false, /* partial_inplace */
fbaf61ad
NC		 684 0x000fffff, /* src_mask */
685 0x000fffff, /* dst_mask */
0a1b45a2 686 false), /* pcrel_offset */
35c08157
KLC		 687
688 /* Lower 12 bits of address. */
fbaf61ad
NC		 689 HOWTO2 (R_NDS32_LO12S3_RELA, /* type */
690 3, /* rightshift */
691 2, /* size (0 = byte, 1 = short, 2 = long) */
692 9, /* bitsize */
0a1b45a2 693 false, /* pc_relative */
fbaf61ad
NC		 694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_NDS32_LO12S3_RELA", /* name */
0a1b45a2 698 false, /* partial_inplace */
fbaf61ad
NC		 699 0x000001ff, /* src_mask */
700 0x000001ff, /* dst_mask */
0a1b45a2 701 false), /* pcrel_offset */
35c08157
KLC		 702
703 /* Lower 12 bits of address. */
fbaf61ad
NC		 704 HOWTO2 (R_NDS32_LO12S2_RELA, /* type */
705 2, /* rightshift */
706 2, /* size (0 = byte, 1 = short, 2 = long) */
707 10, /* bitsize */
0a1b45a2 708 false, /* pc_relative */
fbaf61ad
NC		 709 0, /* bitpos */
710 complain_overflow_dont,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_NDS32_LO12S2_RELA", /* name */
0a1b45a2 713 false, /* partial_inplace */
fbaf61ad
NC		 714 0x000003ff, /* src_mask */
715 0x000003ff, /* dst_mask */
0a1b45a2 716 false), /* pcrel_offset */
35c08157
KLC		 717
718 /* Lower 12 bits of address. */
fbaf61ad
NC		 719 HOWTO2 (R_NDS32_LO12S1_RELA, /* type */
720 1, /* rightshift */
721 2, /* size (0 = byte, 1 = short, 2 = long) */
722 11, /* bitsize */
0a1b45a2 723 false, /* pc_relative */
fbaf61ad
NC		 724 0, /* bitpos */
725 complain_overflow_dont,/* complain_on_overflow */
726 bfd_elf_generic_reloc, /* special_function */
727 "R_NDS32_LO12S1_RELA", /* name */
0a1b45a2 728 false, /* partial_inplace */
fbaf61ad
NC		 729 0x000007ff, /* src_mask */
730 0x000007ff, /* dst_mask */
0a1b45a2 731 false), /* pcrel_offset */
35c08157
KLC		 732
733 /* Lower 12 bits of address. */
fbaf61ad
NC		 734 HOWTO2 (R_NDS32_LO12S0_RELA, /* type */
735 0, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 12, /* bitsize */
0a1b45a2 738 false, /* pc_relative */
fbaf61ad
NC		 739 0, /* bitpos */
740 complain_overflow_dont,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_NDS32_LO12S0_RELA", /* name */
0a1b45a2 743 false, /* partial_inplace */
fbaf61ad
NC		 744 0x00000fff, /* src_mask */
745 0x00000fff, /* dst_mask */
0a1b45a2 746 false), /* pcrel_offset */
35c08157
KLC		 747
748 /* Small data area 15 bits offset. */
fbaf61ad
NC		 749 HOWTO2 (R_NDS32_SDA15S3_RELA, /* type */
750 3, /* rightshift */
751 2, /* size (0 = byte, 1 = short, 2 = long) */
752 15, /* bitsize */
0a1b45a2 753 false, /* pc_relative */
fbaf61ad
NC		 754 0, /* bitpos */
755 complain_overflow_signed,/* complain_on_overflow */
756 bfd_elf_generic_reloc, /* special_function */
757 "R_NDS32_SDA15S3_RELA",/* name */
0a1b45a2 758 false, /* partial_inplace */
fbaf61ad
NC		 759 0x00007fff, /* src_mask */
760 0x00007fff, /* dst_mask */
0a1b45a2 761 false), /* pcrel_offset */
35c08157
KLC		 762
763 /* Small data area 15 bits offset. */
fbaf61ad
NC		 764 HOWTO2 (R_NDS32_SDA15S2_RELA, /* type */
765 2, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 15, /* bitsize */
0a1b45a2 768 false, /* pc_relative */
fbaf61ad
NC		 769 0, /* bitpos */
770 complain_overflow_signed,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_NDS32_SDA15S2_RELA",/* name */
0a1b45a2 773 false, /* partial_inplace */
fbaf61ad
NC		 774 0x00007fff, /* src_mask */
775 0x00007fff, /* dst_mask */
0a1b45a2 776 false), /* pcrel_offset */
fbaf61ad
NC		 777
778 HOWTO2 (R_NDS32_SDA15S1_RELA, /* type */
779 1, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 15, /* bitsize */
0a1b45a2 782 false, /* pc_relative */
fbaf61ad
NC		 783 0, /* bitpos */
784 complain_overflow_signed,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_NDS32_SDA15S1_RELA",/* name */
0a1b45a2 787 false, /* partial_inplace */
fbaf61ad
NC		 788 0x00007fff, /* src_mask */
789 0x00007fff, /* dst_mask */
0a1b45a2 790 false), /* pcrel_offset */
fbaf61ad
NC		 791
792 HOWTO2 (R_NDS32_SDA15S0_RELA, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 15, /* bitsize */
0a1b45a2 796 false, /* pc_relative */
fbaf61ad
NC		 797 0, /* bitpos */
798 complain_overflow_signed,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_NDS32_SDA15S0_RELA",/* name */
0a1b45a2 801 false, /* partial_inplace */
fbaf61ad
NC		 802 0x00007fff, /* src_mask */
803 0x00007fff, /* dst_mask */
0a1b45a2 804 false), /* pcrel_offset */
fbaf61ad
NC		 805
806 /* GNU extension to record C++ vtable hierarchy */
807 HOWTO2 (R_NDS32_RELA_GNU_VTINHERIT,/* type */
808 0, /* rightshift */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
810 0, /* bitsize */
0a1b45a2 811 false, /* pc_relative */
fbaf61ad
NC		 812 0, /* bitpos */
813 complain_overflow_dont,/* complain_on_overflow */
814 NULL, /* special_function */
815 "R_NDS32_RELA_GNU_VTINHERIT",/* name */
0a1b45a2 816 false, /* partial_inplace */
fbaf61ad
NC		 817 0, /* src_mask */
818 0, /* dst_mask */
0a1b45a2 819 false), /* pcrel_offset */
fbaf61ad
NC		 820
821 /* GNU extension to record C++ vtable member usage */
822 HOWTO2 (R_NDS32_RELA_GNU_VTENTRY,/* type */
823 0, /* rightshift */
824 2, /* size (0 = byte, 1 = short, 2 = long) */
825 0, /* bitsize */
0a1b45a2 826 false, /* pc_relative */
fbaf61ad
NC		 827 0, /* bitpos */
828 complain_overflow_dont,/* complain_on_overflow */
829 _bfd_elf_rel_vtable_reloc_fn,/* special_function */
830 "R_NDS32_RELA_GNU_VTENTRY",/* name */
0a1b45a2 831 false, /* partial_inplace */
fbaf61ad
NC		 832 0, /* src_mask */
833 0, /* dst_mask */
0a1b45a2 834 false), /* pcrel_offset */
35c08157
KLC		 835
836 /* Like R_NDS32_20, but referring to the GOT table entry for
837 the symbol. */
fbaf61ad
NC		 838 HOWTO2 (R_NDS32_GOT20, /* type */
839 0, /* rightshift */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
841 20, /* bitsize */
0a1b45a2 842 false, /* pc_relative */
fbaf61ad
NC		 843 0, /* bitpos */
844 complain_overflow_signed,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_NDS32_GOT20", /* name */
0a1b45a2 847 false, /* partial_inplace */
fbaf61ad
NC		 848 0xfffff, /* src_mask */
849 0xfffff, /* dst_mask */
0a1b45a2 850 false), /* pcrel_offset */
35c08157
KLC		 851
852 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
853 entry for the symbol. */
fbaf61ad
NC		 854 HOWTO2 (R_NDS32_25_PLTREL, /* type */
855 1, /* rightshift */
856 2, /* size (0 = byte, 1 = short, 2 = long) */
857 24, /* bitsize */
0a1b45a2 858 true, /* pc_relative */
fbaf61ad
NC		 859 0, /* bitpos */
860 complain_overflow_signed,/* complain_on_overflow */
861 bfd_elf_generic_reloc, /* special_function */
862 "R_NDS32_25_PLTREL", /* name */
0a1b45a2 863 false, /* partial_inplace */
fbaf61ad
NC		 864 0xffffff, /* src_mask */
865 0xffffff, /* dst_mask */
0a1b45a2 866 true), /* pcrel_offset */
35c08157
KLC		 867
868 /* This is used only by the dynamic linker. The symbol should exist
869 both in the object being run and in some shared library. The
870 dynamic linker copies the data addressed by the symbol from the
871 shared library into the object, because the object being
872 run has to have the data at some particular address. */
fbaf61ad
NC		 873 HOWTO2 (R_NDS32_COPY, /* type */
874 0, /* rightshift */
875 2, /* size (0 = byte, 1 = short, 2 = long) */
876 32, /* bitsize */
0a1b45a2 877 false, /* pc_relative */
fbaf61ad
NC		 878 0, /* bitpos */
879 complain_overflow_bitfield,/* complain_on_overflow */
880 bfd_elf_generic_reloc, /* special_function */
881 "R_NDS32_COPY", /* name */
0a1b45a2 882 false, /* partial_inplace */
fbaf61ad
NC		 883 0xffffffff, /* src_mask */
884 0xffffffff, /* dst_mask */
0a1b45a2 885 false), /* pcrel_offset */
35c08157
KLC		 886
887 /* Like R_NDS32_20, but used when setting global offset table
888 entries. */
fbaf61ad
NC		 889 HOWTO2 (R_NDS32_GLOB_DAT, /* type */
890 0, /* rightshift */
891 2, /* size (0 = byte, 1 = short, 2 = long) */
892 32, /* bitsize */
0a1b45a2 893 false, /* pc_relative */
fbaf61ad
NC		 894 0, /* bitpos */
895 complain_overflow_bitfield,/* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
897 "R_NDS32_GLOB_DAT", /* name */
0a1b45a2 898 false, /* partial_inplace */
fbaf61ad
NC		 899 0xffffffff, /* src_mask */
900 0xffffffff, /* dst_mask */
0a1b45a2 901 false), /* pcrel_offset */
35c08157
KLC		 902
903 /* Marks a procedure linkage table entry for a symbol. */
fbaf61ad
NC		 904 HOWTO2 (R_NDS32_JMP_SLOT, /* type */
905 0, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 32, /* bitsize */
0a1b45a2 908 false, /* pc_relative */
fbaf61ad
NC		 909 0, /* bitpos */
910 complain_overflow_bitfield,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_NDS32_JMP_SLOT", /* name */
0a1b45a2 913 false, /* partial_inplace */
fbaf61ad
NC		 914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
0a1b45a2 916 false), /* pcrel_offset */
35c08157
KLC		 917
918 /* Used only by the dynamic linker. When the object is run, this
919 longword is set to the load address of the object, plus the
920 addend. */
fbaf61ad
NC		 921 HOWTO2 (R_NDS32_RELATIVE, /* type */
922 0, /* rightshift */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
924 32, /* bitsize */
0a1b45a2 925 false, /* pc_relative */
fbaf61ad
NC		 926 0, /* bitpos */
927 complain_overflow_bitfield,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_NDS32_RELATIVE", /* name */
0a1b45a2 930 false, /* partial_inplace */
fbaf61ad
NC		 931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
0a1b45a2 933 false), /* pcrel_offset */
fbaf61ad
NC		 934
935 HOWTO2 (R_NDS32_GOTOFF, /* type */
936 0, /* rightshift */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
938 20, /* bitsize */
0a1b45a2 939 false, /* pc_relative */
fbaf61ad
NC		 940 0, /* bitpos */
941 complain_overflow_signed,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_NDS32_GOTOFF", /* name */
0a1b45a2 944 false, /* partial_inplace */
fbaf61ad
NC		 945 0xfffff, /* src_mask */
946 0xfffff, /* dst_mask */
0a1b45a2 947 false), /* pcrel_offset */
35c08157
KLC		 948
949 /* An PC Relative 20-bit relocation used when setting PIC offset
950 table register. */
fbaf61ad
NC		 951 HOWTO2 (R_NDS32_GOTPC20, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 20, /* bitsize */
0a1b45a2 955 true, /* pc_relative */
fbaf61ad
NC		 956 0, /* bitpos */
957 complain_overflow_signed,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_NDS32_GOTPC20", /* name */
0a1b45a2 960 false, /* partial_inplace */
fbaf61ad
NC		 961 0xfffff, /* src_mask */
962 0xfffff, /* dst_mask */
0a1b45a2 963 true), /* pcrel_offset */
35c08157
KLC		 964
965 /* Like R_NDS32_HI20, but referring to the GOT table entry for
966 the symbol. */
fbaf61ad
NC		 967 HOWTO2 (R_NDS32_GOT_HI20, /* type */
968 12, /* rightshift */
969 2, /* size (0 = byte, 1 = short, 2 = long) */
970 20, /* bitsize */
0a1b45a2 971 false, /* pc_relative */
fbaf61ad
NC		 972 0, /* bitpos */
973 complain_overflow_dont,/* complain_on_overflow */
974 bfd_elf_generic_reloc, /* special_function */
975 "R_NDS32_GOT_HI20", /* name */
0a1b45a2 976 false, /* partial_inplace */
fbaf61ad
NC		 977 0x000fffff, /* src_mask */
978 0x000fffff, /* dst_mask */
0a1b45a2 979 false), /* pcrel_offset */
fbaf61ad
NC		 980 HOWTO2 (R_NDS32_GOT_LO12, /* type */
981 0, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 12, /* bitsize */
0a1b45a2 984 false, /* pc_relative */
fbaf61ad
NC		 985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_NDS32_GOT_LO12", /* name */
0a1b45a2 989 false, /* partial_inplace */
fbaf61ad
NC		 990 0x00000fff, /* src_mask */
991 0x00000fff, /* dst_mask */
0a1b45a2 992 false), /* pcrel_offset */
35c08157
KLC		 993
994 /* An PC Relative relocation used when setting PIC offset table register.
995 Like R_NDS32_HI20, but referring to the GOT table entry for
996 the symbol. */
fbaf61ad
NC		 997 HOWTO2 (R_NDS32_GOTPC_HI20, /* type */
998 12, /* rightshift */
999 2, /* size (0 = byte, 1 = short, 2 = long) */
1000 20, /* bitsize */
0a1b45a2 1001 false, /* pc_relative */
fbaf61ad
NC		 1002 0, /* bitpos */
1003 complain_overflow_dont,/* complain_on_overflow */
1004 bfd_elf_generic_reloc, /* special_function */
1005 "R_NDS32_GOTPC_HI20", /* name */
0a1b45a2 1006 false, /* partial_inplace */
fbaf61ad
NC		 1007 0x000fffff, /* src_mask */
1008 0x000fffff, /* dst_mask */
0a1b45a2 1009 true), /* pcrel_offset */
fbaf61ad
NC		 1010 HOWTO2 (R_NDS32_GOTPC_LO12, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 12, /* bitsize */
0a1b45a2 1014 false, /* pc_relative */
fbaf61ad
NC		 1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 bfd_elf_generic_reloc, /* special_function */
1018 "R_NDS32_GOTPC_LO12", /* name */
0a1b45a2 1019 false, /* partial_inplace */
fbaf61ad
NC		 1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
0a1b45a2 1022 true), /* pcrel_offset */
fbaf61ad
NC		 1023
1024 HOWTO2 (R_NDS32_GOTOFF_HI20, /* type */
1025 12, /* rightshift */
1026 2, /* size (0 = byte, 1 = short, 2 = long) */
1027 20, /* bitsize */
0a1b45a2 1028 false, /* pc_relative */
fbaf61ad
NC		 1029 0, /* bitpos */
1030 complain_overflow_dont,/* complain_on_overflow */
1031 bfd_elf_generic_reloc, /* special_function */
1032 "R_NDS32_GOTOFF_HI20", /* name */
0a1b45a2 1033 false, /* partial_inplace */
fbaf61ad
NC		 1034 0x000fffff, /* src_mask */
1035 0x000fffff, /* dst_mask */
0a1b45a2 1036 false), /* pcrel_offset */
fbaf61ad
NC		 1037 HOWTO2 (R_NDS32_GOTOFF_LO12, /* type */
1038 0, /* rightshift */
1039 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 12, /* bitsize */
0a1b45a2 1041 false, /* pc_relative */
fbaf61ad
NC		 1042 0, /* bitpos */
1043 complain_overflow_dont,/* complain_on_overflow */
1044 bfd_elf_generic_reloc, /* special_function */
1045 "R_NDS32_GOTOFF_LO12", /* name */
0a1b45a2 1046 false, /* partial_inplace */
fbaf61ad
NC		 1047 0x00000fff, /* src_mask */
1048 0x00000fff, /* dst_mask */
0a1b45a2 1049 false), /* pcrel_offset */
35c08157
KLC		 1050
1051 /* Alignment hint for relaxable instruction. This is used with
1052 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1053 in order to make next label aligned on word boundary. */
fbaf61ad
NC		 1054 HOWTO2 (R_NDS32_INSN16, /* type */
1055 0, /* rightshift */
1056 2, /* size (0 = byte, 1 = short, 2 = long) */
1057 32, /* bitsize */
0a1b45a2 1058 false, /* pc_relative */
fbaf61ad
NC		 1059 0, /* bitpos */
1060 complain_overflow_dont,/* complain_on_overflow */
1061 nds32_elf_ignore_reloc,/* special_function */
1062 "R_NDS32_INSN16", /* name */
0a1b45a2 1063 false, /* partial_inplace */
fbaf61ad
NC		 1064 0x00000fff, /* src_mask */
1065 0x00000fff, /* dst_mask */
0a1b45a2 1066 false), /* pcrel_offset */
35c08157
KLC		 1067
1068 /* Alignment hint for label. */
fbaf61ad
NC		 1069 HOWTO2 (R_NDS32_LABEL, /* type */
1070 0, /* rightshift */
1071 2, /* size (0 = byte, 1 = short, 2 = long) */
1072 32, /* bitsize */
0a1b45a2 1073 false, /* pc_relative */
fbaf61ad
NC		 1074 0, /* bitpos */
1075 complain_overflow_dont,/* complain_on_overflow */
1076 nds32_elf_ignore_reloc,/* special_function */
1077 "R_NDS32_LABEL", /* name */
0a1b45a2 1078 false, /* partial_inplace */
fbaf61ad
NC		 1079 0xffffffff, /* src_mask */
1080 0xffffffff, /* dst_mask */
0a1b45a2 1081 false), /* pcrel_offset */
35c08157
KLC		 1082
1083 /* Relax hint for unconditional call sequence */
fbaf61ad
NC		 1084 HOWTO2 (R_NDS32_LONGCALL1, /* type */
1085 0, /* rightshift */
1086 2, /* size (0 = byte, 1 = short, 2 = long) */
1087 32, /* bitsize */
0a1b45a2 1088 false, /* pc_relative */
fbaf61ad
NC		 1089 0, /* bitpos */
1090 complain_overflow_dont,/* complain_on_overflow */
1091 nds32_elf_ignore_reloc,/* special_function */
1092 "R_NDS32_LONGCALL1", /* name */
0a1b45a2 1093 false, /* partial_inplace */
fbaf61ad
NC		 1094 0xffffffff, /* src_mask */
1095 0xffffffff, /* dst_mask */
0a1b45a2 1096 false), /* pcrel_offset */
35c08157
KLC		 1097
1098 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1099 HOWTO2 (R_NDS32_LONGCALL2, /* type */
1100 0, /* rightshift */
1101 2, /* size (0 = byte, 1 = short, 2 = long) */
1102 32, /* bitsize */
0a1b45a2 1103 false, /* pc_relative */
fbaf61ad
NC		 1104 0, /* bitpos */
1105 complain_overflow_dont,/* complain_on_overflow */
1106 nds32_elf_ignore_reloc,/* special_function */
1107 "R_NDS32_LONGCALL2", /* name */
0a1b45a2 1108 false, /* partial_inplace */
fbaf61ad
NC		 1109 0xffffffff, /* src_mask */
1110 0xffffffff, /* dst_mask */
0a1b45a2 1111 false), /* pcrel_offset */
35c08157
KLC		 1112
1113 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1114 HOWTO2 (R_NDS32_LONGCALL3, /* type */
1115 0, /* rightshift */
1116 2, /* size (0 = byte, 1 = short, 2 = long) */
1117 32, /* bitsize */
0a1b45a2 1118 false, /* pc_relative */
fbaf61ad
NC		 1119 0, /* bitpos */
1120 complain_overflow_dont,/* complain_on_overflow */
1121 nds32_elf_ignore_reloc,/* special_function */
1122 "R_NDS32_LONGCALL3", /* name */
0a1b45a2 1123 false, /* partial_inplace */
fbaf61ad
NC		 1124 0xffffffff, /* src_mask */
1125 0xffffffff, /* dst_mask */
0a1b45a2 1126 false), /* pcrel_offset */
35c08157
KLC		 1127
1128 /* Relax hint for unconditional branch sequence. */
fbaf61ad
NC		 1129 HOWTO2 (R_NDS32_LONGJUMP1, /* type */
1130 0, /* rightshift */
1131 2, /* size (0 = byte, 1 = short, 2 = long) */
1132 32, /* bitsize */
0a1b45a2 1133 false, /* pc_relative */
fbaf61ad
NC		 1134 0, /* bitpos */
1135 complain_overflow_dont,/* complain_on_overflow */
1136 nds32_elf_ignore_reloc,/* special_function */
1137 "R_NDS32_LONGJUMP1", /* name */
0a1b45a2 1138 false, /* partial_inplace */
fbaf61ad
NC		 1139 0xffffffff, /* src_mask */
1140 0xffffffff, /* dst_mask */
0a1b45a2 1141 false), /* pcrel_offset */
35c08157
KLC		 1142
1143 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1144 HOWTO2 (R_NDS32_LONGJUMP2, /* type */
1145 0, /* rightshift */
1146 2, /* size (0 = byte, 1 = short, 2 = long) */
1147 32, /* bitsize */
0a1b45a2 1148 false, /* pc_relative */
fbaf61ad
NC		 1149 0, /* bitpos */
1150 complain_overflow_dont,/* complain_on_overflow */
1151 nds32_elf_ignore_reloc,/* special_function */
1152 "R_NDS32_LONGJUMP2", /* name */
0a1b45a2 1153 false, /* partial_inplace */
fbaf61ad
NC		 1154 0xffffffff, /* src_mask */
1155 0xffffffff, /* dst_mask */
0a1b45a2 1156 false), /* pcrel_offset */
35c08157
KLC		 1157
1158 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1159 HOWTO2 (R_NDS32_LONGJUMP3, /* type */
1160 0, /* rightshift */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1162 32, /* bitsize */
0a1b45a2 1163 false, /* pc_relative */
fbaf61ad
NC		 1164 0, /* bitpos */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 nds32_elf_ignore_reloc,/* special_function */
1167 "R_NDS32_LONGJUMP3", /* name */
0a1b45a2 1168 false, /* partial_inplace */
fbaf61ad
NC		 1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
0a1b45a2 1171 false), /* pcrel_offset */
35c08157
KLC		 1172
1173 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1174 HOWTO2 (R_NDS32_LOADSTORE, /* type */
1175 0, /* rightshift */
1176 2, /* size (0 = byte, 1 = short, 2 = long) */
1177 32, /* bitsize */
0a1b45a2 1178 false, /* pc_relative */
fbaf61ad
NC		 1179 0, /* bitpos */
1180 complain_overflow_dont,/* complain_on_overflow */
1181 nds32_elf_ignore_reloc,/* special_function */
1182 "R_NDS32_LOADSTORE", /* name */
0a1b45a2 1183 false, /* partial_inplace */
fbaf61ad
NC		 1184 0xffffffff, /* src_mask */
1185 0xffffffff, /* dst_mask */
0a1b45a2 1186 false), /* pcrel_offset */
35c08157
KLC		 1187
1188 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1189 HOWTO2 (R_NDS32_9_FIXED_RELA, /* type */
1190 0, /* rightshift */
1191 1, /* size (0 = byte, 1 = short, 2 = long) */
1192 16, /* bitsize */
0a1b45a2 1193 false, /* pc_relative */
fbaf61ad
NC		 1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 nds32_elf_ignore_reloc,/* special_function */
1197 "R_NDS32_9_FIXED_RELA",/* name */
0a1b45a2 1198 false, /* partial_inplace */
fbaf61ad
NC		 1199 0x000000ff, /* src_mask */
1200 0x000000ff, /* dst_mask */
0a1b45a2 1201 false), /* pcrel_offset */
35c08157
KLC		 1202
1203 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1204 HOWTO2 (R_NDS32_15_FIXED_RELA,/* type */
1205 0, /* rightshift */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 32, /* bitsize */
0a1b45a2 1208 false, /* pc_relative */
fbaf61ad
NC		 1209 0, /* bitpos */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 nds32_elf_ignore_reloc,/* special_function */
1212 "R_NDS32_15_FIXED_RELA",/* name */
0a1b45a2 1213 false, /* partial_inplace */
fbaf61ad
NC		 1214 0x00003fff, /* src_mask */
1215 0x00003fff, /* dst_mask */
0a1b45a2 1216 false), /* pcrel_offset */
35c08157
KLC		 1217
1218 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1219 HOWTO2 (R_NDS32_17_FIXED_RELA,/* type */
1220 0, /* rightshift */
1221 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 32, /* bitsize */
0a1b45a2 1223 false, /* pc_relative */
fbaf61ad
NC		 1224 0, /* bitpos */
1225 complain_overflow_dont,/* complain_on_overflow */
1226 nds32_elf_ignore_reloc,/* special_function */
1227 "R_NDS32_17_FIXED_RELA",/* name */
0a1b45a2 1228 false, /* partial_inplace */
fbaf61ad
NC		 1229 0x0000ffff, /* src_mask */
1230 0x0000ffff, /* dst_mask */
0a1b45a2 1231 false), /* pcrel_offset */
35c08157
KLC		 1232
1233 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1234 HOWTO2 (R_NDS32_25_FIXED_RELA,/* type */
1235 0, /* rightshift */
1236 2, /* size (0 = byte, 1 = short, 2 = long) */
1237 32, /* bitsize */
0a1b45a2 1238 false, /* pc_relative */
fbaf61ad
NC		 1239 0, /* bitpos */
1240 complain_overflow_dont,/* complain_on_overflow */
1241 nds32_elf_ignore_reloc,/* special_function */
1242 "R_NDS32_25_FIXED_RELA",/* name */
0a1b45a2 1243 false, /* partial_inplace */
fbaf61ad
NC		 1244 0x00ffffff, /* src_mask */
1245 0x00ffffff, /* dst_mask */
0a1b45a2 1246 false), /* pcrel_offset */
35c08157
KLC		 1247
1248 /* High 20 bits of PLT symbol offset relative to PC. */
fbaf61ad
NC		 1249 HOWTO2 (R_NDS32_PLTREL_HI20, /* type */
1250 12, /* rightshift */
1251 2, /* size (0 = byte, 1 = short, 2 = long) */
1252 20, /* bitsize */
0a1b45a2 1253 false, /* pc_relative */
fbaf61ad
NC		 1254 0, /* bitpos */
1255 complain_overflow_dont,/* complain_on_overflow */
1256 bfd_elf_generic_reloc, /* special_function */
1257 "R_NDS32_PLTREL_HI20", /* name */
0a1b45a2 1258 false, /* partial_inplace */
fbaf61ad
NC		 1259 0x000fffff, /* src_mask */
1260 0x000fffff, /* dst_mask */
0a1b45a2 1261 false), /* pcrel_offset */
35c08157
KLC		 1262
1263 /* Low 12 bits of PLT symbol offset relative to PC. */
fbaf61ad
NC		 1264 HOWTO2 (R_NDS32_PLTREL_LO12, /* type */
1265 0, /* rightshift */
1266 2, /* size (0 = byte, 1 = short, 2 = long) */
1267 12, /* bitsize */
0a1b45a2 1268 false, /* pc_relative */
fbaf61ad
NC		 1269 0, /* bitpos */
1270 complain_overflow_dont,/* complain_on_overflow */
1271 bfd_elf_generic_reloc, /* special_function */
1272 "R_NDS32_PLTREL_LO12", /* name */
0a1b45a2 1273 false, /* partial_inplace */
fbaf61ad
NC		 1274 0x00000fff, /* src_mask */
1275 0x00000fff, /* dst_mask */
0a1b45a2 1276 false), /* pcrel_offset */
35c08157
KLC		 1277
1278 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1279 HOWTO2 (R_NDS32_PLT_GOTREL_HI20, /* type */
1280 12, /* rightshift */
1281 2, /* size (0 = byte, 1 = short, 2 = long) */
1282 20, /* bitsize */
0a1b45a2 1283 false, /* pc_relative */
fbaf61ad
NC		 1284 0, /* bitpos */
1285 complain_overflow_dont,/* complain_on_overflow */
1286 bfd_elf_generic_reloc, /* special_function */
1287 "R_NDS32_PLT_GOTREL_HI20",/* name */
0a1b45a2 1288 false, /* partial_inplace */
fbaf61ad
NC		 1289 0x000fffff, /* src_mask */
1290 0x000fffff, /* dst_mask */
0a1b45a2 1291 false), /* pcrel_offset */
35c08157
KLC		 1292
1293 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1294 HOWTO2 (R_NDS32_PLT_GOTREL_LO12,/* type */
1295 0, /* rightshift */
1296 2, /* size (0 = byte, 1 = short, 2 = long) */
1297 12, /* bitsize */
0a1b45a2 1298 false, /* pc_relative */
fbaf61ad
NC		 1299 0, /* bitpos */
1300 complain_overflow_dont,/* complain_on_overflow */
1301 bfd_elf_generic_reloc, /* special_function */
1302 "R_NDS32_PLT_GOTREL_LO12",/* name */
0a1b45a2 1303 false, /* partial_inplace */
fbaf61ad
NC		 1304 0x00000fff, /* src_mask */
1305 0x00000fff, /* dst_mask */
0a1b45a2 1306 false), /* pcrel_offset */
35c08157
KLC		 1307
1308 /* Small data area 12 bits offset. */
fbaf61ad
NC		 1309 HOWTO2 (R_NDS32_SDA12S2_DP_RELA,/* type */
1310 2, /* rightshift */
1311 2, /* size (0 = byte, 1 = short, 2 = long) */
1312 12, /* bitsize */
0a1b45a2 1313 false, /* pc_relative */
fbaf61ad
NC		 1314 0, /* bitpos */
1315 complain_overflow_signed,/* complain_on_overflow */
1316 bfd_elf_generic_reloc, /* special_function */
1317 "R_NDS32_SDA12S2_DP_RELA",/* name */
0a1b45a2 1318 false, /* partial_inplace */
fbaf61ad
NC		 1319 0x00000fff, /* src_mask */
1320 0x00000fff, /* dst_mask */
0a1b45a2 1321 false), /* pcrel_offset */
35c08157
KLC		 1322
1323 /* Small data area 12 bits offset. */
fbaf61ad
NC		 1324 HOWTO2 (R_NDS32_SDA12S2_SP_RELA,/* type */
1325 2, /* rightshift */
1326 2, /* size (0 = byte, 1 = short, 2 = long) */
1327 12, /* bitsize */
0a1b45a2 1328 false, /* pc_relative */
fbaf61ad
NC		 1329 0, /* bitpos */
1330 complain_overflow_signed,/* complain_on_overflow */
1331 bfd_elf_generic_reloc, /* special_function */
1332 "R_NDS32_SDA12S2_SP_RELA",/* name */
0a1b45a2 1333 false, /* partial_inplace */
fbaf61ad
NC		 1334 0x00000fff, /* src_mask */
1335 0x00000fff, /* dst_mask */
0a1b45a2 1336 false), /* pcrel_offset */
35c08157
KLC		 1337 /* Lower 12 bits of address. */
1338
fbaf61ad
NC		 1339 HOWTO2 (R_NDS32_LO12S2_DP_RELA, /* type */
1340 2, /* rightshift */
1341 2, /* size (0 = byte, 1 = short, 2 = long) */
1342 10, /* bitsize */
0a1b45a2 1343 false, /* pc_relative */
fbaf61ad
NC		 1344 0, /* bitpos */
1345 complain_overflow_dont,/* complain_on_overflow */
1346 bfd_elf_generic_reloc, /* special_function */
1347 "R_NDS32_LO12S2_DP_RELA",/* name */
0a1b45a2 1348 false, /* partial_inplace */
fbaf61ad
NC		 1349 0x000003ff, /* src_mask */
1350 0x000003ff, /* dst_mask */
0a1b45a2 1351 false), /* pcrel_offset */
35c08157
KLC		 1352
1353 /* Lower 12 bits of address. */
fbaf61ad
NC		 1354 HOWTO2 (R_NDS32_LO12S2_SP_RELA,/* type */
1355 2, /* rightshift */
1356 2, /* size (0 = byte, 1 = short, 2 = long) */
1357 10, /* bitsize */
0a1b45a2 1358 false, /* pc_relative */
fbaf61ad
NC		 1359 0, /* bitpos */
1360 complain_overflow_dont,/* complain_on_overflow */
1361 bfd_elf_generic_reloc, /* special_function */
1362 "R_NDS32_LO12S2_SP_RELA",/* name */
0a1b45a2 1363 false, /* partial_inplace */
fbaf61ad
NC		 1364 0x000003ff, /* src_mask */
1365 0x000003ff, /* dst_mask */
0a1b45a2 1366 false), /* pcrel_offset */
35c08157 1367 /* Lower 12 bits of address. Special identity for or case. */
fbaf61ad
NC		 1368 HOWTO2 (R_NDS32_LO12S0_ORI_RELA,/* type */
1369 0, /* rightshift */
1370 2, /* size (0 = byte, 1 = short, 2 = long) */
1371 12, /* bitsize */
0a1b45a2 1372 false, /* pc_relative */
fbaf61ad
NC		 1373 0, /* bitpos */
1374 complain_overflow_dont,/* complain_on_overflow */
1375 bfd_elf_generic_reloc, /* special_function */
1376 "R_NDS32_LO12S0_ORI_RELA",/* name */
0a1b45a2 1377 false, /* partial_inplace */
fbaf61ad
NC		 1378 0x00000fff, /* src_mask */
1379 0x00000fff, /* dst_mask */
0a1b45a2 1380 false), /* pcrel_offset */
35c08157 1381 /* Small data area 19 bits offset. */
fbaf61ad
NC		 1382 HOWTO2 (R_NDS32_SDA16S3_RELA, /* type */
1383 3, /* rightshift */
1384 2, /* size (0 = byte, 1 = short, 2 = long) */
1385 16, /* bitsize */
0a1b45a2 1386 false, /* pc_relative */
fbaf61ad
NC		 1387 0, /* bitpos */
1388 complain_overflow_signed,/* complain_on_overflow */
1389 bfd_elf_generic_reloc, /* special_function */
1390 "R_NDS32_SDA16S3_RELA",/* name */
0a1b45a2 1391 false, /* partial_inplace */
fbaf61ad
NC		 1392 0x0000ffff, /* src_mask */
1393 0x0000ffff, /* dst_mask */
0a1b45a2 1394 false), /* pcrel_offset */
35c08157
KLC		 1395
1396 /* Small data area 15 bits offset. */
fbaf61ad
NC		 1397 HOWTO2 (R_NDS32_SDA17S2_RELA, /* type */
1398 2, /* rightshift */
1399 2, /* size (0 = byte, 1 = short, 2 = long) */
1400 17, /* bitsize */
0a1b45a2 1401 false, /* pc_relative */
fbaf61ad
NC		 1402 0, /* bitpos */
1403 complain_overflow_signed,/* complain_on_overflow */
1404 bfd_elf_generic_reloc, /* special_function */
1405 "R_NDS32_SDA17S2_RELA",/* name */
0a1b45a2 1406 false, /* partial_inplace */
fbaf61ad
NC		 1407 0x0001ffff, /* src_mask */
1408 0x0001ffff, /* dst_mask */
0a1b45a2 1409 false), /* pcrel_offset */
fbaf61ad
NC		 1410
1411 HOWTO2 (R_NDS32_SDA18S1_RELA, /* type */
1412 1, /* rightshift */
1413 2, /* size (0 = byte, 1 = short, 2 = long) */
1414 18, /* bitsize */
0a1b45a2 1415 false, /* pc_relative */
fbaf61ad
NC		 1416 0, /* bitpos */
1417 complain_overflow_signed,/* complain_on_overflow */
1418 bfd_elf_generic_reloc, /* special_function */
1419 "R_NDS32_SDA18S1_RELA",/* name */
0a1b45a2 1420 false, /* partial_inplace */
fbaf61ad
NC		 1421 0x0003ffff, /* src_mask */
1422 0x0003ffff, /* dst_mask */
0a1b45a2 1423 false), /* pcrel_offset */
fbaf61ad
NC		 1424
1425 HOWTO2 (R_NDS32_SDA19S0_RELA, /* type */
1426 0, /* rightshift */
1427 2, /* size (0 = byte, 1 = short, 2 = long) */
1428 19, /* bitsize */
0a1b45a2 1429 false, /* pc_relative */
fbaf61ad
NC		 1430 0, /* bitpos */
1431 complain_overflow_signed,/* complain_on_overflow */
1432 bfd_elf_generic_reloc, /* special_function */
1433 "R_NDS32_SDA19S0_RELA",/* name */
0a1b45a2 1434 false, /* partial_inplace */
fbaf61ad
NC		 1435 0x0007ffff, /* src_mask */
1436 0x0007ffff, /* dst_mask */
0a1b45a2 1437 false), /* pcrel_offset */
fbaf61ad
NC		 1438 HOWTO2 (R_NDS32_DWARF2_OP1_RELA,/* type */
1439 0, /* rightshift */
1440 0, /* size (0 = byte, 1 = short, 2 = long) */
1441 8, /* bitsize */
0a1b45a2 1442 false, /* pc_relative */
fbaf61ad
NC		 1443 0, /* bitpos */
1444 complain_overflow_dont,/* complain_on_overflow */
1445 nds32_elf_ignore_reloc,/* special_function */
1446 "R_NDS32_DWARF2_OP1_RELA",/* name */
0a1b45a2 1447 false, /* partial_inplace */
fbaf61ad
NC		 1448 0xff, /* src_mask */
1449 0xff, /* dst_mask */
0a1b45a2 1450 false), /* pcrel_offset */
fbaf61ad
NC		 1451 HOWTO2 (R_NDS32_DWARF2_OP2_RELA,/* type */
1452 0, /* rightshift */
1453 1, /* size (0 = byte, 1 = short, 2 = long) */
1454 16, /* bitsize */
0a1b45a2 1455 false, /* pc_relative */
fbaf61ad
NC		 1456 0, /* bitpos */
1457 complain_overflow_dont,/* complain_on_overflow */
1458 nds32_elf_ignore_reloc,/* special_function */
1459 "R_NDS32_DWARF2_OP2_RELA",/* name */
0a1b45a2 1460 false, /* partial_inplace */
fbaf61ad
NC		 1461 0xffff, /* src_mask */
1462 0xffff, /* dst_mask */
0a1b45a2 1463 false), /* pcrel_offset */
fbaf61ad
NC		 1464 HOWTO2 (R_NDS32_DWARF2_LEB_RELA,/* type */
1465 0, /* rightshift */
1466 2, /* size (0 = byte, 1 = short, 2 = long) */
1467 32, /* bitsize */
0a1b45a2 1468 false, /* pc_relative */
fbaf61ad
NC		 1469 0, /* bitpos */
1470 complain_overflow_dont,/* complain_on_overflow */
1471 nds32_elf_ignore_reloc,/* special_function */
1472 "R_NDS32_DWARF2_LEB_RELA",/* name */
0a1b45a2 1473 false, /* partial_inplace */
fbaf61ad
NC		 1474 0xffffffff, /* src_mask */
1475 0xffffffff, /* dst_mask */
0a1b45a2 1476 false), /* pcrel_offset */
fbaf61ad
NC		 1477 HOWTO2 (R_NDS32_UPDATE_TA_RELA,/* type */
1478 0, /* rightshift */
1479 1, /* size (0 = byte, 1 = short, 2 = long) */
1480 16, /* bitsize */
0a1b45a2 1481 false, /* pc_relative */
fbaf61ad
NC		 1482 0, /* bitpos */
1483 complain_overflow_dont,/* complain_on_overflow */
1484 nds32_elf_ignore_reloc,/* special_function */
1485 "R_NDS32_UPDATE_TA_RELA",/* name */
0a1b45a2 1486 false, /* partial_inplace */
fbaf61ad
NC		 1487 0xffff, /* src_mask */
1488 0xffff, /* dst_mask */
0a1b45a2 1489 false), /* pcrel_offset */
35c08157
KLC		 1490 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1491 entry for the symbol. */
fbaf61ad
NC		 1492 HOWTO2 (R_NDS32_9_PLTREL, /* type */
1493 1, /* rightshift */
1494 1, /* size (0 = byte, 1 = short, 2 = long) */
1495 8, /* bitsize */
0a1b45a2 1496 true, /* pc_relative */
fbaf61ad
NC		 1497 0, /* bitpos */
1498 complain_overflow_signed,/* complain_on_overflow */
1499 bfd_elf_generic_reloc, /* special_function */
1500 "R_NDS32_9_PLTREL", /* name */
0a1b45a2 1501 false, /* partial_inplace */
fbaf61ad
NC		 1502 0xff, /* src_mask */
1503 0xff, /* dst_mask */
0a1b45a2 1504 true), /* pcrel_offset */
35c08157 1505 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1506 HOWTO2 (R_NDS32_PLT_GOTREL_LO20,/* type */
1507 0, /* rightshift */
1508 2, /* size (0 = byte, 1 = short, 2 = long) */
1509 20, /* bitsize */
0a1b45a2 1510 false, /* pc_relative */
fbaf61ad
NC		 1511 0, /* bitpos */
1512 complain_overflow_dont,/* complain_on_overflow */
1513 bfd_elf_generic_reloc, /* special_function */
1514 "R_NDS32_PLT_GOTREL_LO20",/* name */
0a1b45a2 1515 false, /* partial_inplace */
fbaf61ad
NC		 1516 0x000fffff, /* src_mask */
1517 0x000fffff, /* dst_mask */
0a1b45a2 1518 false), /* pcrel_offset */
fbaf61ad
NC		 1519 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1520 HOWTO2 (R_NDS32_PLT_GOTREL_LO15,/* type */
1521 0, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 15, /* bitsize */
0a1b45a2 1524 false, /* pc_relative */
fbaf61ad
NC		 1525 0, /* bitpos */
1526 complain_overflow_dont,/* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 "R_NDS32_PLT_GOTREL_LO15",/* name */
0a1b45a2 1529 false, /* partial_inplace */
fbaf61ad
NC		 1530 0x00007fff, /* src_mask */
1531 0x00007fff, /* dst_mask */
0a1b45a2 1532 false), /* pcrel_offset */
35c08157 1533 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1534 HOWTO2 (R_NDS32_PLT_GOTREL_LO19,/* type */
1535 0, /* rightshift */
1536 2, /* size (0 = byte, 1 = short, 2 = long) */
1537 19, /* bitsize */
0a1b45a2 1538 false, /* pc_relative */
fbaf61ad
NC		 1539 0, /* bitpos */
1540 complain_overflow_dont,/* complain_on_overflow */
1541 bfd_elf_generic_reloc, /* special_function */
1542 "R_NDS32_PLT_GOTREL_LO19",/* name */
0a1b45a2 1543 false, /* partial_inplace */
fbaf61ad
NC		 1544 0x0007ffff, /* src_mask */
1545 0x0007ffff, /* dst_mask */
0a1b45a2 1546 false), /* pcrel_offset */
fbaf61ad
NC		 1547 HOWTO2 (R_NDS32_GOT_LO15, /* type */
1548 0, /* rightshift */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 15, /* bitsize */
0a1b45a2 1551 false, /* pc_relative */
fbaf61ad
NC		 1552 0, /* bitpos */
1553 complain_overflow_dont,/* complain_on_overflow */
1554 bfd_elf_generic_reloc, /* special_function */
1555 "R_NDS32_GOT_LO15", /* name */
0a1b45a2 1556 false, /* partial_inplace */
fbaf61ad
NC		 1557 0x00007fff, /* src_mask */
1558 0x00007fff, /* dst_mask */
0a1b45a2 1559 false), /* pcrel_offset */
fbaf61ad
NC		 1560 HOWTO2 (R_NDS32_GOT_LO19, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 19, /* bitsize */
0a1b45a2 1564 false, /* pc_relative */
fbaf61ad
NC		 1565 0, /* bitpos */
1566 complain_overflow_dont,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_NDS32_GOT_LO19", /* name */
0a1b45a2 1569 false, /* partial_inplace */
fbaf61ad
NC		 1570 0x0007ffff, /* src_mask */
1571 0x0007ffff, /* dst_mask */
0a1b45a2 1572 false), /* pcrel_offset */
fbaf61ad
NC		 1573 HOWTO2 (R_NDS32_GOTOFF_LO15, /* type */
1574 0, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 15, /* bitsize */
0a1b45a2 1577 false, /* pc_relative */
fbaf61ad
NC		 1578 0, /* bitpos */
1579 complain_overflow_dont,/* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_NDS32_GOTOFF_LO15", /* name */
0a1b45a2 1582 false, /* partial_inplace */
fbaf61ad
NC		 1583 0x00007fff, /* src_mask */
1584 0x00007fff, /* dst_mask */
0a1b45a2 1585 false), /* pcrel_offset */
fbaf61ad
NC		 1586 HOWTO2 (R_NDS32_GOTOFF_LO19, /* type */
1587 0, /* rightshift */
1588 2, /* size (0 = byte, 1 = short, 2 = long) */
1589 19, /* bitsize */
0a1b45a2 1590 false, /* pc_relative */
fbaf61ad
NC		 1591 0, /* bitpos */
1592 complain_overflow_dont,/* complain_on_overflow */
1593 bfd_elf_generic_reloc, /* special_function */
1594 "R_NDS32_GOTOFF_LO19", /* name */
0a1b45a2 1595 false, /* partial_inplace */
fbaf61ad
NC		 1596 0x0007ffff, /* src_mask */
1597 0x0007ffff, /* dst_mask */
0a1b45a2 1598 false), /* pcrel_offset */
35c08157 1599 /* GOT 15 bits offset. */
fbaf61ad
NC		 1600 HOWTO2 (R_NDS32_GOT15S2_RELA, /* type */
1601 2, /* rightshift */
1602 2, /* size (0 = byte, 1 = short, 2 = long) */
1603 15, /* bitsize */
0a1b45a2 1604 false, /* pc_relative */
fbaf61ad
NC		 1605 0, /* bitpos */
1606 complain_overflow_signed,/* complain_on_overflow */
1607 bfd_elf_generic_reloc, /* special_function */
1608 "R_NDS32_GOT15S2_RELA",/* name */
0a1b45a2 1609 false, /* partial_inplace */
fbaf61ad
NC		 1610 0x00007fff, /* src_mask */
1611 0x00007fff, /* dst_mask */
0a1b45a2 1612 false), /* pcrel_offset */
35c08157 1613 /* GOT 17 bits offset. */
fbaf61ad
NC		 1614 HOWTO2 (R_NDS32_GOT17S2_RELA, /* type */
1615 2, /* rightshift */
1616 2, /* size (0 = byte, 1 = short, 2 = long) */
1617 17, /* bitsize */
0a1b45a2 1618 false, /* pc_relative */
fbaf61ad
NC		 1619 0, /* bitpos */
1620 complain_overflow_signed,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_NDS32_GOT17S2_RELA",/* name */
0a1b45a2 1623 false, /* partial_inplace */
fbaf61ad
NC		 1624 0x0001ffff, /* src_mask */
1625 0x0001ffff, /* dst_mask */
0a1b45a2 1626 false), /* pcrel_offset */
35c08157 1627 /* A 5 bit address. */
fbaf61ad
NC		 1628 HOWTO2 (R_NDS32_5_RELA, /* type */
1629 0, /* rightshift */
1630 1, /* size (0 = byte, 1 = short, 2 = long) */
1631 5, /* bitsize */
0a1b45a2 1632 false, /* pc_relative */
fbaf61ad
NC		 1633 0, /* bitpos */
1634 complain_overflow_signed,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_NDS32_5_RELA", /* name */
0a1b45a2 1637 false, /* partial_inplace */
fbaf61ad
NC		 1638 0x1f, /* src_mask */
1639 0x1f, /* dst_mask */
0a1b45a2 1640 false), /* pcrel_offset */
fbaf61ad
NC		 1641 HOWTO2 (R_NDS32_10_UPCREL_RELA,/* type */
1642 1, /* rightshift */
1643 1, /* size (0 = byte, 1 = short, 2 = long) */
1644 9, /* bitsize */
0a1b45a2 1645 true, /* pc_relative */
fbaf61ad
NC		 1646 0, /* bitpos */
1647 complain_overflow_unsigned,/* complain_on_overflow */
1648 bfd_elf_generic_reloc, /* special_function */
1649 "R_NDS32_10_UPCREL_RELA",/* name */
0a1b45a2 1650 false, /* partial_inplace */
fbaf61ad
NC		 1651 0x1ff, /* src_mask */
1652 0x1ff, /* dst_mask */
0a1b45a2 1653 true), /* pcrel_offset */
fbaf61ad
NC		 1654 HOWTO2 (R_NDS32_SDA_FP7U2_RELA,/* type */
1655 2, /* rightshift */
1656 1, /* size (0 = byte, 1 = short, 2 = long) */
1657 7, /* bitsize */
0a1b45a2 1658 false, /* pc_relative */
fbaf61ad
NC		 1659 0, /* bitpos */
1660 complain_overflow_unsigned,/* complain_on_overflow */
1661 bfd_elf_generic_reloc, /* special_function */
1662 "R_NDS32_SDA_FP7U2_RELA",/* name */
0a1b45a2 1663 false, /* partial_inplace */
fbaf61ad
NC		 1664 0x0000007f, /* src_mask */
1665 0x0000007f, /* dst_mask */
0a1b45a2 1666 false), /* pcrel_offset */
fbaf61ad
NC		 1667 HOWTO2 (R_NDS32_WORD_9_PCREL_RELA,/* type */
1668 1, /* rightshift */
1669 2, /* size (0 = byte, 1 = short, 2 = long) */
1670 8, /* bitsize */
0a1b45a2 1671 true, /* pc_relative */
fbaf61ad
NC		 1672 0, /* bitpos */
1673 complain_overflow_signed,/* complain_on_overflow */
1674 bfd_elf_generic_reloc, /* special_function */
1675 "R_NDS32_WORD_9_PCREL_RELA",/* name */
0a1b45a2 1676 false, /* partial_inplace */
fbaf61ad
NC		 1677 0xff, /* src_mask */
1678 0xff, /* dst_mask */
0a1b45a2 1679 true), /* pcrel_offset */
fbaf61ad
NC		 1680 HOWTO2 (R_NDS32_25_ABS_RELA, /* type */
1681 1, /* rightshift */
1682 2, /* size (0 = byte, 1 = short, 2 = long) */
1683 24, /* bitsize */
0a1b45a2 1684 false, /* pc_relative */
fbaf61ad
NC		 1685 0, /* bitpos */
1686 complain_overflow_dont,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_NDS32_25_ABS_RELA", /* name */
0a1b45a2 1689 false, /* partial_inplace */
fbaf61ad
NC		 1690 0xffffff, /* src_mask */
1691 0xffffff, /* dst_mask */
0a1b45a2 1692 false), /* pcrel_offset */
35c08157
KLC		 1693
1694 /* A relative 17 bit relocation for ifc, right shifted by 1. */
fbaf61ad
NC		 1695 HOWTO2 (R_NDS32_17IFC_PCREL_RELA,/* type */
1696 1, /* rightshift */
1697 2, /* size (0 = byte, 1 = short, 2 = long) */
1698 16, /* bitsize */
0a1b45a2 1699 true, /* pc_relative */
fbaf61ad
NC		 1700 0, /* bitpos */
1701 complain_overflow_signed,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_NDS32_17IFC_PCREL_RELA",/* name */
0a1b45a2 1704 false, /* partial_inplace */
fbaf61ad
NC		 1705 0xffff, /* src_mask */
1706 0xffff, /* dst_mask */
0a1b45a2 1707 true), /* pcrel_offset */
35c08157
KLC		 1708
1709 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
fbaf61ad
NC		 1710 HOWTO2 (R_NDS32_10IFCU_PCREL_RELA,/* type */
1711 1, /* rightshift */
1712 1, /* size (0 = byte, 1 = short, 2 = long) */
1713 9, /* bitsize */
0a1b45a2 1714 true, /* pc_relative */
fbaf61ad
NC		 1715 0, /* bitpos */
1716 complain_overflow_unsigned,/* complain_on_overflow */
1717 bfd_elf_generic_reloc, /* special_function */
1718 "R_NDS32_10IFCU_PCREL_RELA",/* name */
0a1b45a2 1719 false, /* partial_inplace */
fbaf61ad
NC		 1720 0x1ff, /* src_mask */
1721 0x1ff, /* dst_mask */
0a1b45a2 1722 true), /* pcrel_offset */
fbaf61ad
NC		 1723
1724 /* Like R_NDS32_HI20, but referring to the TLS LE entry for the symbol. */
1725 HOWTO2 (R_NDS32_TLS_LE_HI20, /* type */
1726 12, /* rightshift */
1727 2, /* size (0 = byte, 1 = short, 2 = long) */
1728 20, /* bitsize */
0a1b45a2 1729 false, /* pc_relative */
fbaf61ad
NC		 1730 0, /* bitpos */
1731 complain_overflow_dont,/* complain_on_overflow */
1732 bfd_elf_generic_reloc, /* special_function */
1733 "R_NDS32_TLS_LE_HI20", /* name */
0a1b45a2 1734 false, /* partial_inplace */
fbaf61ad
NC		 1735 0x000fffff, /* src_mask */
1736 0x000fffff, /* dst_mask */
0a1b45a2 1737 false), /* pcrel_offset */
fbaf61ad
NC		 1738
1739 HOWTO2 (R_NDS32_TLS_LE_LO12, /* type */
1740 0, /* rightshift */
1741 2, /* size (0 = byte, 1 = short, 2 = long) */
1742 12, /* bitsize */
0a1b45a2 1743 false, /* pc_relative */
fbaf61ad
NC		 1744 0, /* bitpos */
1745 complain_overflow_dont,/* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_NDS32_TLS_LE_LO12", /* name */
0a1b45a2 1748 false, /* partial_inplace */
fbaf61ad
NC		 1749 0x00000fff, /* src_mask */
1750 0x00000fff, /* dst_mask */
0a1b45a2 1751 false), /* pcrel_offset */
fbaf61ad
NC		 1752
1753 /* Like R_NDS32_HI20, but referring to the TLS IE entry for the symbol. */
1754 HOWTO2 (R_NDS32_TLS_IE_HI20, /* type */
1755 12, /* rightshift */
1756 2, /* size (0 = byte, 1 = short, 2 = long) */
1757 20, /* bitsize */
0a1b45a2 1758 false, /* pc_relative */
fbaf61ad
NC		 1759 0, /* bitpos */
1760 complain_overflow_dont,/* complain_on_overflow */
1761 bfd_elf_generic_reloc, /* special_function */
1762 "R_NDS32_TLS_IE_HI20", /* name */
0a1b45a2 1763 false, /* partial_inplace */
fbaf61ad
NC		 1764 0x000fffff, /* src_mask */
1765 0x000fffff, /* dst_mask */
0a1b45a2 1766 false), /* pcrel_offset */
fbaf61ad
NC		 1767
1768 HOWTO2 (R_NDS32_TLS_IE_LO12S2,/* type */
1769 2, /* rightshift */
1770 2, /* size (0 = byte, 1 = short, 2 = long) */
1771 10, /* bitsize */
0a1b45a2 1772 false, /* pc_relative */
fbaf61ad
NC		 1773 0, /* bitpos */
1774 complain_overflow_dont,/* complain_on_overflow */
1775 bfd_elf_generic_reloc, /* special_function */
1776 "R_NDS32_TLS_IE_LO12S2",/* name */
0a1b45a2 1777 false, /* partial_inplace */
fbaf61ad
NC		 1778 0x000003ff, /* src_mask */
1779 0x000003ff, /* dst_mask */
0a1b45a2 1780 false), /* pcrel_offset */
fbaf61ad
NC		 1781
1782 /* TLS LE TP offset relocation */
1783 HOWTO2 (R_NDS32_TLS_TPOFF, /* type */
1784 0, /* rightshift */
1785 2, /* size (0 = byte, 1 = short, 2 = long) */
1786 32, /* bitsize */
0a1b45a2 1787 false, /* pc_relative */
fbaf61ad
NC		 1788 0, /* bitpos */
1789 complain_overflow_bitfield,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_NDS32_TLS_TPOFF", /* name */
0a1b45a2 1792 false, /* partial_inplace */
fbaf61ad
NC		 1793 0xffffffff, /* src_mask */
1794 0xffffffff, /* dst_mask */
0a1b45a2 1795 false), /* pcrel_offset */
fbaf61ad 1796
1c8f6a4d 1797 /* A 20 bit address. */
fbaf61ad
NC		 1798 HOWTO2 (R_NDS32_TLS_LE_20, /* type */
1799 0, /* rightshift */
1800 2, /* size (0 = byte, 1 = short, 2 = long) */
1801 20, /* bitsize */
0a1b45a2 1802 false, /* pc_relative */
fbaf61ad
NC		 1803 0, /* bitpos */
1804 complain_overflow_signed,/* complain_on_overflow */
1805 bfd_elf_generic_reloc, /* special_function */
1806 "R_NDS32_TLS_LE_20", /* name */
0a1b45a2 1807 false, /* partial_inplace */
fbaf61ad
NC		 1808 0xfffff, /* src_mask */
1809 0xfffff, /* dst_mask */
0a1b45a2 1810 false), /* pcrel_offset */
fbaf61ad
NC		 1811
1812 HOWTO2 (R_NDS32_TLS_LE_15S0, /* type */
1813 0, /* rightshift */
1814 2, /* size (0 = byte, 1 = short, 2 = long) */
1815 15, /* bitsize */
0a1b45a2 1816 false, /* pc_relative */
fbaf61ad
NC		 1817 0, /* bitpos */
1818 complain_overflow_signed,/* complain_on_overflow */
1819 bfd_elf_generic_reloc, /* special_function */
1820 "R_NDS32_TLS_LE_15S0", /* name */
0a1b45a2 1821 false, /* partial_inplace */
fbaf61ad
NC		 1822 0x7fff, /* src_mask */
1823 0x7fff, /* dst_mask */
0a1b45a2 1824 false), /* pcrel_offset */
fbaf61ad
NC		 1825 HOWTO2 (R_NDS32_TLS_LE_15S1, /* type */
1826 1, /* rightshift */
1827 2, /* size (0 = byte, 1 = short, 2 = long) */
1828 15, /* bitsize */
0a1b45a2 1829 false, /* pc_relative */
fbaf61ad
NC		 1830 0, /* bitpos */
1831 complain_overflow_signed,/* complain_on_overflow */
1832 bfd_elf_generic_reloc, /* special_function */
1833 "R_NDS32_TLS_LE_15S1", /* name */
0a1b45a2 1834 false, /* partial_inplace */
fbaf61ad
NC		 1835 0x7fff, /* src_mask */
1836 0x7fff, /* dst_mask */
0a1b45a2 1837 false), /* pcrel_offset */
fbaf61ad
NC		 1838 HOWTO2 (R_NDS32_TLS_LE_15S2, /* type */
1839 2, /* rightshift */
1840 2, /* size (0 = byte, 1 = short, 2 = long) */
1841 15, /* bitsize */
0a1b45a2 1842 false, /* pc_relative */
fbaf61ad
NC		 1843 0, /* bitpos */
1844 complain_overflow_signed,/* complain_on_overflow */
1845 bfd_elf_generic_reloc, /* special_function */
1846 "R_NDS32_TLS_LE_15S2", /* name */
0a1b45a2 1847 false, /* partial_inplace */
fbaf61ad
NC		 1848 0x7fff, /* src_mask */
1849 0x7fff, /* dst_mask */
0a1b45a2 1850 false), /* pcrel_offset */
1c8f6a4d
KLC		 1851
1852 /* Relax hint for unconditional call sequence */
fbaf61ad
NC		 1853 HOWTO2 (R_NDS32_LONGCALL4, /* type */
1854 0, /* rightshift */
1855 2, /* size (0 = byte, 1 = short, 2 = long) */
1856 32, /* bitsize */
0a1b45a2 1857 false, /* pc_relative */
fbaf61ad
NC		 1858 0, /* bitpos */
1859 complain_overflow_dont,/* complain_on_overflow */
1860 nds32_elf_ignore_reloc,/* special_function */
1861 "R_NDS32_LONGCALL4", /* name */
0a1b45a2 1862 false, /* partial_inplace */
fbaf61ad
NC		 1863 0xffffffff, /* src_mask */
1864 0xffffffff, /* dst_mask */
0a1b45a2 1865 false), /* pcrel_offset */
1c8f6a4d
KLC		 1866
1867 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1868 HOWTO2 (R_NDS32_LONGCALL5, /* type */
1869 0, /* rightshift */
1870 2, /* size (0 = byte, 1 = short, 2 = long) */
1871 32, /* bitsize */
0a1b45a2 1872 false, /* pc_relative */
fbaf61ad
NC		 1873 0, /* bitpos */
1874 complain_overflow_dont,/* complain_on_overflow */
1875 nds32_elf_ignore_reloc,/* special_function */
1876 "R_NDS32_LONGCALL5", /* name */
0a1b45a2 1877 false, /* partial_inplace */
fbaf61ad
NC		 1878 0xffffffff, /* src_mask */
1879 0xffffffff, /* dst_mask */
0a1b45a2 1880 false), /* pcrel_offset */
1c8f6a4d
KLC		 1881
1882 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1883 HOWTO2 (R_NDS32_LONGCALL6, /* type */
1884 0, /* rightshift */
1885 2, /* size (0 = byte, 1 = short, 2 = long) */
1886 32, /* bitsize */
0a1b45a2 1887 false, /* pc_relative */
fbaf61ad
NC		 1888 0, /* bitpos */
1889 complain_overflow_dont,/* complain_on_overflow */
1890 nds32_elf_ignore_reloc,/* special_function */
1891 "R_NDS32_LONGCALL6", /* name */
0a1b45a2 1892 false, /* partial_inplace */
fbaf61ad
NC		 1893 0xffffffff, /* src_mask */
1894 0xffffffff, /* dst_mask */
0a1b45a2 1895 false), /* pcrel_offset */
1c8f6a4d
KLC		 1896
1897 /* Relax hint for unconditional branch sequence. */
fbaf61ad
NC		 1898 HOWTO2 (R_NDS32_LONGJUMP4, /* type */
1899 0, /* rightshift */
1900 2, /* size (0 = byte, 1 = short, 2 = long) */
1901 32, /* bitsize */
0a1b45a2 1902 false, /* pc_relative */
fbaf61ad
NC		 1903 0, /* bitpos */
1904 complain_overflow_dont,/* complain_on_overflow */
1905 nds32_elf_ignore_reloc,/* special_function */
1906 "R_NDS32_LONGJUMP4", /* name */
0a1b45a2 1907 false, /* partial_inplace */
fbaf61ad
NC		 1908 0xffffffff, /* src_mask */
1909 0xffffffff, /* dst_mask */
0a1b45a2 1910 false), /* pcrel_offset */
1c8f6a4d
KLC		 1911
1912 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1913 HOWTO2 (R_NDS32_LONGJUMP5, /* type */
1914 0, /* rightshift */
1915 2, /* size (0 = byte, 1 = short, 2 = long) */
1916 32, /* bitsize */
0a1b45a2 1917 false, /* pc_relative */
fbaf61ad
NC		 1918 0, /* bitpos */
1919 complain_overflow_dont,/* complain_on_overflow */
1920 nds32_elf_ignore_reloc,/* special_function */
1921 "R_NDS32_LONGJUMP5", /* name */
0a1b45a2 1922 false, /* partial_inplace */
fbaf61ad
NC		 1923 0xffffffff, /* src_mask */
1924 0xffffffff, /* dst_mask */
0a1b45a2 1925 false), /* pcrel_offset */
1c8f6a4d
KLC		 1926
1927 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1928 HOWTO2 (R_NDS32_LONGJUMP6, /* type */
1929 0, /* rightshift */
1930 2, /* size (0 = byte, 1 = short, 2 = long) */
1931 32, /* bitsize */
0a1b45a2 1932 false, /* pc_relative */
fbaf61ad
NC		 1933 0, /* bitpos */
1934 complain_overflow_dont,/* complain_on_overflow */
1935 nds32_elf_ignore_reloc,/* special_function */
1936 "R_NDS32_LONGJUMP6", /* name */
0a1b45a2 1937 false, /* partial_inplace */
fbaf61ad
NC		 1938 0xffffffff, /* src_mask */
1939 0xffffffff, /* dst_mask */
0a1b45a2 1940 false), /* pcrel_offset */
1c8f6a4d
KLC		 1941
1942 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1943 HOWTO2 (R_NDS32_LONGJUMP7, /* type */
1944 0, /* rightshift */
1945 2, /* size (0 = byte, 1 = short, 2 = long) */
1946 32, /* bitsize */
0a1b45a2 1947 false, /* pc_relative */
fbaf61ad
NC		 1948 0, /* bitpos */
1949 complain_overflow_dont,/* complain_on_overflow */
1950 nds32_elf_ignore_reloc,/* special_function */
1951 "R_NDS32_LONGJUMP7", /* name */
0a1b45a2 1952 false, /* partial_inplace */
fbaf61ad
NC		 1953 0xffffffff, /* src_mask */
1954 0xffffffff, /* dst_mask */
0a1b45a2 1955 false), /* pcrel_offset */
fbaf61ad
NC		 1956
1957 HOWTO2 (R_NDS32_TLS_IE_LO12, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 12, /* bitsize */
0a1b45a2 1961 false, /* pc_relative */
fbaf61ad
NC		 1962 0, /* bitpos */
1963 complain_overflow_dont,/* complain_on_overflow */
1964 bfd_elf_generic_reloc, /* special_function */
1965 "R_NDS32_TLS_IE_LO12", /* name */
0a1b45a2 1966 false, /* partial_inplace */
fbaf61ad
NC		 1967 0x00000fff, /* src_mask */
1968 0x00000fff, /* dst_mask */
0a1b45a2 1969 false), /* pcrel_offset */
fbaf61ad
NC		 1970
1971 /* Like R_NDS32_HI20, but referring to the TLS IE (PIE)
1972 entry for the symbol. */
1973 HOWTO2 (R_NDS32_TLS_IEGP_HI20,/* type */
1974 12, /* rightshift */
1975 2, /* size (0 = byte, 1 = short, 2 = long) */
1976 20, /* bitsize */
0a1b45a2 1977 false, /* pc_relative */
fbaf61ad
NC		 1978 0, /* bitpos */
1979 complain_overflow_dont,/* complain_on_overflow */
1980 bfd_elf_generic_reloc, /* special_function */
1981 "R_NDS32_TLS_IEGP_HI20",/* name */
0a1b45a2 1982 false, /* partial_inplace */
fbaf61ad
NC		 1983 0x000fffff, /* src_mask */
1984 0x000fffff, /* dst_mask */
0a1b45a2 1985 false), /* pcrel_offset */
fbaf61ad
NC		 1986
1987 HOWTO2 (R_NDS32_TLS_IEGP_LO12,/* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 12, /* bitsize */
0a1b45a2 1991 false, /* pc_relative */
fbaf61ad
NC		 1992 0, /* bitpos */
1993 complain_overflow_dont,/* complain_on_overflow */
1994 bfd_elf_generic_reloc, /* special_function */
1995 "R_NDS32_TLS_IEGP_LO12",/* name */
0a1b45a2 1996 false, /* partial_inplace */
fbaf61ad
NC		 1997 0x00000fff, /* src_mask */
1998 0x00000fff, /* dst_mask */
0a1b45a2 1999 false), /* pcrel_offset */
fbaf61ad
NC		 2000
2001 HOWTO2 (R_NDS32_TLS_IEGP_LO12S2,/* type */
2002 2, /* rightshift */
2003 2, /* size (0 = byte, 1 = short, 2 = long) */
2004 10, /* bitsize */
0a1b45a2 2005 false, /* pc_relative */
fbaf61ad
NC		 2006 0, /* bitpos */
2007 complain_overflow_dont,/* complain_on_overflow */
2008 bfd_elf_generic_reloc, /* special_function */
2009 "R_NDS32_TLS_IEGP_LO12S2",/* name */
0a1b45a2 2010 false, /* partial_inplace */
fbaf61ad
NC		 2011 0x000003ff, /* src_mask */
2012 0x000003ff, /* dst_mask */
0a1b45a2 2013 false), /* pcrel_offset */
fbaf61ad
NC		 2014
2015 /* TLS description relocation */
2016 HOWTO2 (R_NDS32_TLS_DESC, /* type */
2017 12, /* rightshift */
2018 2, /* size (0 = byte, 1 = short, 2 = long) */
2019 20, /* bitsize */
0a1b45a2 2020 false, /* pc_relative */
fbaf61ad
NC		 2021 0, /* bitpos */
2022 complain_overflow_dont,/* complain_on_overflow */
2023 nds32_elf_hi20_reloc, /* special_function */
2024 "R_NDS32_TLS_DESC_HI20",/* name */
0a1b45a2 2025 false, /* partial_inplace */
fbaf61ad
NC		 2026 0x000fffff, /* src_mask */
2027 0x000fffff, /* dst_mask */
0a1b45a2 2028 false), /* pcrel_offset */
fbaf61ad
NC		 2029
2030 /* TLS GD/LD description offset high part. */
2031 HOWTO2 (R_NDS32_TLS_DESC_HI20,/* type */
2032 12, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 20, /* bitsize */
0a1b45a2 2035 false, /* pc_relative */
fbaf61ad
NC		 2036 0, /* bitpos */
2037 complain_overflow_dont,/* complain_on_overflow */
2038 nds32_elf_hi20_reloc, /* special_function */
2039 "R_NDS32_TLS_DESC_HI20",/* name */
0a1b45a2 2040 false, /* partial_inplace */
fbaf61ad
NC		 2041 0x000fffff, /* src_mask */
2042 0x000fffff, /* dst_mask */
0a1b45a2 2043 false), /* pcrel_offset */
fbaf61ad
NC		 2044
2045 /* TLS GD/LD description offset low part. */
2046 HOWTO2 (R_NDS32_TLS_DESC_LO12,/* type */
2047 0, /* rightshift */
2048 2, /* size (0 = byte, 1 = short, 2 = long) */
2049 12, /* bitsize */
0a1b45a2 2050 false, /* pc_relative */
fbaf61ad
NC		 2051 0, /* bitpos */
2052 complain_overflow_dont,/* complain_on_overflow */
2053 nds32_elf_lo12_reloc, /* special_function */
2054 "R_NDS32_TLS_DESC_LO12",/* name */
0a1b45a2 2055 false, /* partial_inplace */
fbaf61ad
NC		 2056 0x00000fff, /* src_mask */
2057 0x00000fff, /* dst_mask */
0a1b45a2 2058 false), /* pcrel_offset */
fbaf61ad
NC		 2059
2060 /* TLS GD/LD description offset set (movi). */
2061 HOWTO2 (R_NDS32_TLS_DESC_20, /* type */
2062 0, /* rightshift */
2063 2, /* size (0 = byte, 1 = short, 2 = long) */
2064 20, /* bitsize */
0a1b45a2 2065 false, /* pc_relative */
fbaf61ad
NC		 2066 0, /* bitpos */
2067 complain_overflow_signed,/* complain_on_overflow */
2068 bfd_elf_generic_reloc, /* special_function */
2069 "R_NDS32_TLS_DESC_20", /* name */
0a1b45a2 2070 false, /* partial_inplace */
fbaf61ad
NC		 2071 0x000fffff, /* src_mask */
2072 0x000fffff, /* dst_mask */
0a1b45a2 2073 false), /* pcrel_offset */
fbaf61ad
NC		 2074
2075 /* TLS GD/LD description offset set (lwi.gp). */
2076 HOWTO2 (R_NDS32_TLS_DESC_SDA17S2,/* type */
2077 2, /* rightshift */
2078 2, /* size (0 = byte, 1 = short, 2 = long) */
2079 17, /* bitsize */
0a1b45a2 2080 false, /* pc_relative */
fbaf61ad
NC		 2081 0, /* bitpos */
2082 complain_overflow_signed,/* complain_on_overflow */
2083 bfd_elf_generic_reloc, /* special_function */
2084 "R_NDS32_TLS_DESC_SDA17S2",/* name */
0a1b45a2 2085 false, /* partial_inplace */
fbaf61ad
NC		 2086 0x0001ffff, /* src_mask */
2087 0x0001ffff, /* dst_mask */
0a1b45a2 2088 false), /* pcrel_offset */
35c08157
KLC		 2089};
2090
2091/* Relocations used for relaxation. */
fbaf61ad
NC		 2092#define HOWTO3(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
2093 [C-R_NDS32_RELAX_ENTRY] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
2094
2095static reloc_howto_type nds32_elf_relax_howto_table[] = {
2096 HOWTO3 (R_NDS32_RELAX_ENTRY, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
0a1b45a2 2100 false, /* pc_relative */
fbaf61ad
NC		 2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_RELAX_ENTRY", /* name */
0a1b45a2 2105 false, /* partial_inplace */
fbaf61ad
NC		 2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
0a1b45a2 2108 false), /* pcrel_offset */
fbaf61ad
NC		 2109 HOWTO3 (R_NDS32_GOT_SUFF, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
0a1b45a2 2113 false, /* pc_relative */
fbaf61ad
NC		 2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_GOT_SUFF", /* name */
0a1b45a2 2118 false, /* partial_inplace */
fbaf61ad
NC		 2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
0a1b45a2 2121 false), /* pcrel_offset */
fbaf61ad
NC		 2122 HOWTO3 (R_NDS32_GOTOFF_SUFF, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
0a1b45a2 2126 false, /* pc_relative */
fbaf61ad
NC		 2127 0, /* bitpos */
2128 complain_overflow_bitfield,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_GOTOFF_SUFF", /* name */
0a1b45a2 2131 false, /* partial_inplace */
fbaf61ad
NC		 2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
0a1b45a2 2134 false), /* pcrel_offset */
fbaf61ad
NC		 2135 HOWTO3 (R_NDS32_PLT_GOT_SUFF, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
0a1b45a2 2139 false, /* pc_relative */
fbaf61ad
NC		 2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_PLT_GOT_SUFF",/* name */
0a1b45a2 2144 false, /* partial_inplace */
fbaf61ad
NC		 2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
0a1b45a2 2147 false), /* pcrel_offset */
fbaf61ad
NC		 2148 HOWTO3 (R_NDS32_MULCALL_SUFF, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
0a1b45a2 2152 false, /* pc_relative */
fbaf61ad
NC		 2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MULCALL_SUFF",/* name */
0a1b45a2 2157 false, /* partial_inplace */
fbaf61ad
NC		 2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
0a1b45a2 2160 false), /* pcrel_offset */
fbaf61ad
NC		 2161 HOWTO3 (R_NDS32_PTR, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
0a1b45a2 2165 false, /* pc_relative */
fbaf61ad
NC		 2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_PTR", /* name */
0a1b45a2 2170 false, /* partial_inplace */
fbaf61ad
NC		 2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
0a1b45a2 2173 false), /* pcrel_offset */
fbaf61ad
NC		 2174 HOWTO3 (R_NDS32_PTR_COUNT, /* type */
2175 0, /* rightshift */
2176 2, /* size (0 = byte, 1 = short, 2 = long) */
2177 32, /* bitsize */
0a1b45a2 2178 false, /* pc_relative */
fbaf61ad
NC		 2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_PTR_COUNT", /* name */
0a1b45a2 2183 false, /* partial_inplace */
fbaf61ad
NC		 2184 0xffffffff, /* src_mask */
2185 0xffffffff, /* dst_mask */
0a1b45a2 2186 false), /* pcrel_offset */
fbaf61ad
NC		 2187 HOWTO3 (R_NDS32_PTR_RESOLVED, /* type */
2188 0, /* rightshift */
2189 2, /* size (0 = byte, 1 = short, 2 = long) */
2190 32, /* bitsize */
0a1b45a2 2191 false, /* pc_relative */
fbaf61ad
NC		 2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_PTR_RESOLVED",/* name */
0a1b45a2 2196 false, /* partial_inplace */
fbaf61ad
NC		 2197 0xffffffff, /* src_mask */
2198 0xffffffff, /* dst_mask */
0a1b45a2 2199 false), /* pcrel_offset */
fbaf61ad
NC		 2200 HOWTO3 (R_NDS32_PLTBLOCK, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
0a1b45a2 2204 false, /* pc_relative */
fbaf61ad
NC		 2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_PLTBLOCK", /* name */
0a1b45a2 2209 false, /* partial_inplace */
fbaf61ad
NC		 2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
0a1b45a2 2212 false), /* pcrel_offset */
fbaf61ad
NC		 2213 HOWTO3 (R_NDS32_RELAX_REGION_BEGIN,/* type */
2214 0, /* rightshift */
2215 2, /* size (0 = byte, 1 = short, 2 = long) */
2216 32, /* bitsize */
0a1b45a2 2217 false, /* pc_relative */
fbaf61ad
NC		 2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_RELAX_REGION_BEGIN",/* name */
0a1b45a2 2222 false, /* partial_inplace */
fbaf61ad
NC		 2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
0a1b45a2 2225 false), /* pcrel_offset */
fbaf61ad
NC		 2226 HOWTO3 (R_NDS32_RELAX_REGION_END,/* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
0a1b45a2 2230 false, /* pc_relative */
fbaf61ad
NC		 2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_RELAX_REGION_END",/* name */
0a1b45a2 2235 false, /* partial_inplace */
fbaf61ad
NC		 2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
0a1b45a2 2238 false), /* pcrel_offset */
fbaf61ad
NC		 2239 HOWTO3 (R_NDS32_MINUEND, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
0a1b45a2 2243 false, /* pc_relative */
fbaf61ad
NC		 2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_MINUEND", /* name */
0a1b45a2 2248 false, /* partial_inplace */
fbaf61ad
NC		 2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
0a1b45a2 2251 false), /* pcrel_offset */
fbaf61ad
NC		 2252 HOWTO3 (R_NDS32_SUBTRAHEND, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
0a1b45a2 2256 false, /* pc_relative */
fbaf61ad
NC		 2257 0, /* bitpos */
2258 complain_overflow_dont,/* complain_on_overflow */
2259 nds32_elf_ignore_reloc,/* special_function */
2260 "R_NDS32_SUBTRAHEND", /* name */
0a1b45a2 2261 false, /* partial_inplace */
fbaf61ad
NC		 2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
0a1b45a2 2264 false), /* pcrel_offset */
fbaf61ad
NC		 2265 HOWTO3 (R_NDS32_DIFF8, /* type */
2266 0, /* rightshift */
2267 0, /* size (0 = byte, 1 = short, 2 = long) */
2268 8, /* bitsize */
0a1b45a2 2269 false, /* pc_relative */
fbaf61ad
NC		 2270 0, /* bitpos */
2271 complain_overflow_dont,/* complain_on_overflow */
2272 nds32_elf_ignore_reloc,/* special_function */
2273 "R_NDS32_DIFF8", /* name */
0a1b45a2 2274 false, /* partial_inplace */
fbaf61ad
NC		 2275 0x000000ff, /* src_mask */
2276 0x000000ff, /* dst_mask */
0a1b45a2 2277 false), /* pcrel_offset */
fbaf61ad
NC		 2278 HOWTO3 (R_NDS32_DIFF16, /* type */
2279 0, /* rightshift */
2280 1, /* size (0 = byte, 1 = short, 2 = long) */
2281 16, /* bitsize */
0a1b45a2 2282 false, /* pc_relative */
fbaf61ad
NC		 2283 0, /* bitpos */
2284 complain_overflow_dont,/* complain_on_overflow */
2285 nds32_elf_ignore_reloc,/* special_function */
2286 "R_NDS32_DIFF16", /* name */
0a1b45a2 2287 false, /* partial_inplace */
fbaf61ad
NC		 2288 0x0000ffff, /* src_mask */
2289 0x0000ffff, /* dst_mask */
0a1b45a2 2290 false), /* pcrel_offset */
fbaf61ad
NC		 2291 HOWTO3 (R_NDS32_DIFF32, /* type */
2292 0, /* rightshift */
2293 2, /* size (0 = byte, 1 = short, 2 = long) */
2294 32, /* bitsize */
0a1b45a2 2295 false, /* pc_relative */
fbaf61ad
NC		 2296 0, /* bitpos */
2297 complain_overflow_dont,/* complain_on_overflow */
2298 nds32_elf_ignore_reloc,/* special_function */
2299 "R_NDS32_DIFF32", /* name */
0a1b45a2 2300 false, /* partial_inplace */
fbaf61ad
NC		 2301 0xffffffff, /* src_mask */
2302 0xffffffff, /* dst_mask */
0a1b45a2 2303 false), /* pcrel_offset */
fbaf61ad
NC		 2304 HOWTO3 (R_NDS32_DIFF_ULEB128, /* type */
2305 0, /* rightshift */
2306 0, /* size (0 = byte, 1 = short, 2 = long) */
2307 0, /* bitsize */
0a1b45a2 2308 false, /* pc_relative */
fbaf61ad
NC		 2309 0, /* bitpos */
2310 complain_overflow_dont,/* complain_on_overflow */
2311 nds32_elf_ignore_reloc,/* special_function */
2312 "R_NDS32_DIFF_ULEB128",/* name */
0a1b45a2 2313 false, /* partial_inplace */
fbaf61ad
NC		 2314 0xffffffff, /* src_mask */
2315 0xffffffff, /* dst_mask */
0a1b45a2 2316 false), /* pcrel_offset */
fbaf61ad
NC		 2317 HOWTO3 (R_NDS32_DATA, /* type */
2318 0, /* rightshift */
2319 2, /* size (0 = byte, 1 = short, 2 = long) */
2320 32, /* bitsize */
0a1b45a2 2321 false, /* pc_relative */
fbaf61ad
NC		 2322 0, /* bitpos */
2323 complain_overflow_dont,/* complain_on_overflow */
2324 nds32_elf_ignore_reloc,/* special_function */
2325 "R_NDS32_DATA", /* name */
0a1b45a2 2326 false, /* partial_inplace */
fbaf61ad
NC		 2327 0xffffffff, /* src_mask */
2328 0xffffffff, /* dst_mask */
0a1b45a2 2329 false), /* pcrel_offset */
fbaf61ad
NC		 2330 HOWTO3 (R_NDS32_TRAN, /* type */
2331 0, /* rightshift */
2332 2, /* size (0 = byte, 1 = short, 2 = long) */
2333 32, /* bitsize */
0a1b45a2 2334 false, /* pc_relative */
fbaf61ad
NC		 2335 0, /* bitpos */
2336 complain_overflow_dont,/* complain_on_overflow */
2337 nds32_elf_ignore_reloc,/* special_function */
2338 "R_NDS32_TRAN", /* name */
0a1b45a2 2339 false, /* partial_inplace */
fbaf61ad
NC		 2340 0xffffffff, /* src_mask */
2341 0xffffffff, /* dst_mask */
0a1b45a2 2342 false), /* pcrel_offset */
fbaf61ad
NC		 2343 HOWTO3 (R_NDS32_TLS_LE_ADD, /* type */
2344 0, /* rightshift */
2345 2, /* size (0 = byte, 1 = short, 2 = long) */
2346 32, /* bitsize */
0a1b45a2 2347 false, /* pc_relative */
fbaf61ad
NC		 2348 0, /* bitpos */
2349 complain_overflow_dont,/* complain_on_overflow */
2350 nds32_elf_ignore_reloc,/* special_function */
2351 "R_NDS32_TLS_LE_ADD", /* name */
0a1b45a2 2352 false, /* partial_inplace */
fbaf61ad
NC		 2353 0xffffffff, /* src_mask */
2354 0xffffffff, /* dst_mask */
0a1b45a2 2355 false), /* pcrel_offset */
fbaf61ad
NC		 2356 HOWTO3 (R_NDS32_TLS_LE_LS, /* type */
2357 0, /* rightshift */
2358 2, /* size (0 = byte, 1 = short, 2 = long) */
2359 32, /* bitsize */
0a1b45a2 2360 false, /* pc_relative */
fbaf61ad
NC		 2361 0, /* bitpos */
2362 complain_overflow_dont,/* complain_on_overflow */
2363 nds32_elf_ignore_reloc,/* special_function */
2364 "R_NDS32_TLS_LE_LS", /* name */
0a1b45a2 2365 false, /* partial_inplace */
fbaf61ad
NC		 2366 0xffffffff, /* src_mask */
2367 0xffffffff, /* dst_mask */
0a1b45a2 2368 false), /* pcrel_offset */
fbaf61ad
NC		 2369 HOWTO3 (R_NDS32_EMPTY, /* type */
2370 0, /* rightshift */
2371 2, /* size (0 = byte, 1 = short, 2 = long) */
2372 32, /* bitsize */
0a1b45a2 2373 false, /* pc_relative */
fbaf61ad
NC		 2374 0, /* bitpos */
2375 complain_overflow_dont,/* complain_on_overflow */
2376 nds32_elf_ignore_reloc,/* special_function */
2377 "R_NDS32_EMPTY", /* name */
0a1b45a2 2378 false, /* partial_inplace */
fbaf61ad
NC		 2379 0xffffffff, /* src_mask */
2380 0xffffffff, /* dst_mask */
0a1b45a2 2381 false), /* pcrel_offset */
fbaf61ad
NC		 2382 /* TLS GD/LD description address base addition. */
2383 HOWTO3 (R_NDS32_TLS_DESC_ADD, /* type */
2384 0, /* rightshift */
2385 2, /* size (0 = byte, 1 = short, 2 = long) */
2386 32, /* bitsize */
0a1b45a2 2387 false, /* pc_relative */
fbaf61ad
NC		 2388 0, /* bitpos */
2389 complain_overflow_dont,/* complain_on_overflow */
2390 nds32_elf_ignore_reloc,/* special_function */
2391 "R_NDS32_TLS_DESC_ADD",/* name */
0a1b45a2 2392 false, /* partial_inplace */
fbaf61ad
NC		 2393 0xffffffff, /* src_mask */
2394 0xffffffff, /* dst_mask */
0a1b45a2 2395 false), /* pcrel_offset */
fbaf61ad
NC		 2396 /* TLS GD/LD description function load. */
2397 HOWTO3 (R_NDS32_TLS_DESC_FUNC,/* type */
2398 0, /* rightshift */
2399 2, /* size (0 = byte, 1 = short, 2 = long) */
2400 32, /* bitsize */
0a1b45a2 2401 false, /* pc_relative */
fbaf61ad
NC		 2402 0, /* bitpos */
2403 complain_overflow_dont,/* complain_on_overflow */
2404 nds32_elf_ignore_reloc,/* special_function */
2405 "R_NDS32_TLS_DESC_FUNC",/* name */
0a1b45a2 2406 false, /* partial_inplace */
fbaf61ad
NC		 2407 0xffffffff, /* src_mask */
2408 0xffffffff, /* dst_mask */
0a1b45a2 2409 false), /* pcrel_offset */
fbaf61ad
NC		 2410 /* TLS DESC resolve function call. */
2411 HOWTO3 (R_NDS32_TLS_DESC_CALL,/* type */
2412 0, /* rightshift */
2413 2, /* size (0 = byte, 1 = short, 2 = long) */
2414 32, /* bitsize */
0a1b45a2 2415 false, /* pc_relative */
fbaf61ad
NC		 2416 0, /* bitpos */
2417 complain_overflow_dont,/* complain_on_overflow */
2418 nds32_elf_ignore_reloc,/* special_function */
2419 "R_NDS32_TLS_DESC_CALL",/* name */
0a1b45a2 2420 false, /* partial_inplace */
fbaf61ad
NC		 2421 0xffffffff, /* src_mask */
2422 0xffffffff, /* dst_mask */
0a1b45a2 2423 false), /* pcrel_offset */
fbaf61ad
NC		 2424 /* TLS DESC variable access. */
2425 HOWTO3 (R_NDS32_TLS_DESC_MEM, /* type */
2426 0, /* rightshift */
2427 2, /* size (0 = byte, 1 = short, 2 = long) */
2428 32, /* bitsize */
0a1b45a2 2429 false, /* pc_relative */
fbaf61ad
NC		 2430 0, /* bitpos */
2431 complain_overflow_dont,/* complain_on_overflow */
2432 nds32_elf_ignore_reloc,/* special_function */
2433 "R_NDS32_TLS_DESC_MEM",/* name */
0a1b45a2 2434 false, /* partial_inplace */
fbaf61ad
NC		 2435 0xffffffff, /* src_mask */
2436 0xffffffff, /* dst_mask */
0a1b45a2 2437 false), /* pcrel_offset */
fbaf61ad
NC		 2438 /* TLS GD/LD description mark (@tlsdec). */
2439 HOWTO3 (R_NDS32_RELAX_REMOVE, /* type */
2440 0, /* rightshift */
2441 2, /* size (0 = byte, 1 = short, 2 = long) */
2442 32, /* bitsize */
0a1b45a2 2443 false, /* pc_relative */
fbaf61ad
NC		 2444 0, /* bitpos */
2445 complain_overflow_dont,/* complain_on_overflow */
2446 nds32_elf_ignore_reloc,/* special_function */
2447 "R_NDS32_REMOVE", /* name */
0a1b45a2 2448 false, /* partial_inplace */
fbaf61ad
NC		 2449 0xffffffff, /* src_mask */
2450 0xffffffff, /* dst_mask */
0a1b45a2 2451 false), /* pcrel_offset */
fbaf61ad
NC		 2452 /* TLS GD/LD description mark (@tlsdec). */
2453 HOWTO3 (R_NDS32_RELAX_GROUP, /* type */
2454 0, /* rightshift */
2455 2, /* size (0 = byte, 1 = short, 2 = long) */
2456 32, /* bitsize */
0a1b45a2 2457 false, /* pc_relative */
fbaf61ad
NC		 2458 0, /* bitpos */
2459 complain_overflow_dont,/* complain_on_overflow */
2460 nds32_elf_ignore_reloc,/* special_function */
2461 "R_NDS32_GROUP", /* name */
0a1b45a2 2462 false, /* partial_inplace */
fbaf61ad
NC		 2463 0xffffffff, /* src_mask */
2464 0xffffffff, /* dst_mask */
0a1b45a2 2465 false), /* pcrel_offset */
fbaf61ad
NC		 2466 HOWTO3 (R_NDS32_TLS_IEGP_LW, /* type */
2467 0, /* rightshift */
2468 2, /* size (0 = byte, 1 = short, 2 = long) */
2469 32, /* bitsize */
0a1b45a2 2470 false, /* pc_relative */
fbaf61ad
NC		 2471 0, /* bitpos */
2472 complain_overflow_dont,/* complain_on_overflow */
2473 nds32_elf_ignore_reloc,/* special_function */
2474 "R_NDS32_TLS_IEGP_LW", /* name */
0a1b45a2 2475 false, /* partial_inplace */
fbaf61ad
NC		 2476 0xffffffff, /* src_mask */
2477 0xffffffff, /* dst_mask */
0a1b45a2 2478 false), /* pcrel_offset */
fbaf61ad
NC		 2479 /* LA and FLSI relaxation. */
2480 HOWTO3 (R_NDS32_LSI, /* type */
2481 0, /* rightshift */
2482 2, /* size (0 = byte, 1 = short, 2 = long) */
2483 32, /* bitsize */
0a1b45a2 2484 false, /* pc_relative */
fbaf61ad
NC		 2485 0, /* bitpos */
2486 complain_overflow_dont,/* complain_on_overflow */
2487 nds32_elf_ignore_reloc,/* special_function */
2488 "R_NDS32_LSI", /* name */
0a1b45a2 2489 false, /* partial_inplace */
fbaf61ad
NC		 2490 0xffffffff, /* src_mask */
2491 0xffffffff, /* dst_mask */
0a1b45a2 2492 false),
35c08157
KLC		 2493};
2494
fbaf61ad
NC		 2495static unsigned long dl_tlsdesc_lazy_trampoline[] =
2496{
2497 0x46200000, /* sethi $r2,#0x0 */
2498 0x58210000, /* ori $r2,$r2,#0x0 */
2499 0x40217400, /* add $r2,$r2,$gp */
2500 0x04210000, /* lwi $r2,[$r2+#0x0] */
2501 0x46300000, /* sethi $r3,#0x0 */
2502 0x58318000, /* ori $r3,$r3,#0x0 */
2503 0x4031f400, /* add $r3,$r3,$gp */
2504 0x4a000800, /* jr $r2 */
2505};
2506
2507static void
2508nds32_put_trampoline (void *contents, const unsigned long *template,
2509 unsigned count)
2510{
2511 unsigned ix;
2512
2513 for (ix = 0; ix != count; ix++)
2514 {
2515 unsigned long insn = template[ix];
2516 bfd_putb32 (insn, (char *) contents + ix * 4);
2517 }
2518}
2519
35c08157
KLC		 2520/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2521 This prototype is the same as qsort (). */
2522
2523void
2524nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2525 int (*compar) (const void *lhs, const void *rhs))
2526{
2527 char *ptr = (char *) base;
1c8f6a4d 2528 int i, j;
9a733151
AM		 2529 char tmp[sizeof (Elf_Internal_Rela)];
2530
2531 BFD_ASSERT (size <= sizeof (tmp));
35c08157
KLC		 2532
2533 /* If i is less than j, i is inserted before j.
2534
2535 |---- j ----- i --------------|
2536 \ / \ /
2537 sorted unsorted
2538 */
2539
1c8f6a4d 2540 for (i = 1; i < (int) nmemb; i++)
35c08157 2541 {
1c8f6a4d
KLC		 2542 for (j = (i - 1); j >= 0; j--)
2543 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2544 break;
2545
1c8f6a4d
KLC		 2546 j++;
2547
35c08157 2548 if (i == j)
1c8f6a4d 2549 continue; /* i is in order. */
35c08157
KLC		 2550
2551 memcpy (tmp, ptr + i * size, size);
2552 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2553 memcpy (ptr + j * size, tmp, size);
2554 }
2555}
2556
2557/* Sort relocation by r_offset.
2558
2559 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2560 algorithm. Relocations at the same r_offset must keep their order.
2561 For example, RELAX_ENTRY must be the very first relocation entry.
2562
2563 Currently, this function implements insertion-sort.
2564
2565 FIXME: If we already sort them in assembler, why bother sort them
2566 here again? */
2567
2568static int
2569compar_reloc (const void *lhs, const void *rhs)
2570{
2571 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2572 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2573
2574 if (l->r_offset > r->r_offset)
2575 return 1;
2576 else if (l->r_offset == r->r_offset)
2577 return 0;
2578 else
2579 return -1;
2580}
2581
2582/* Functions listed below are only used for old relocs.
fbaf61ad
NC		 2583 nds32_elf_9_pcrel_reloc
2584 nds32_elf_do_9_pcrel_reloc
2585 nds32_elf_hi20_reloc
2586 nds32_elf_relocate_hi20
2587 nds32_elf_lo12_reloc
2588 nds32_elf_sda15_reloc
2589 nds32_elf_generic_reloc. */
35c08157
KLC		 2590
2591/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2592
2593static bfd_reloc_status_type
fbaf61ad
NC		 2594nds32_elf_9_pcrel_reloc (bfd * abfd,
2595 arelent * reloc_entry,
2596 asymbol * symbol,
2597 void * data,
2598 asection * input_section,
2599 bfd * output_bfd,
2600 char ** error_message ATTRIBUTE_UNUSED)
35c08157
KLC		 2601{
2602 /* This part is from bfd_elf_generic_reloc. */
2603 if (output_bfd != (bfd *) NULL
2604 && (symbol->flags & BSF_SECTION_SYM) == 0
2605 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2606 {
2607 reloc_entry->address += input_section->output_offset;
2608 return bfd_reloc_ok;
2609 }
2610
2611 if (output_bfd != NULL)
2612 {
2613 /* FIXME: See bfd_perform_relocation. Is this right? */
2614 return bfd_reloc_continue;
2615 }
2616
2617 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2618 input_section,
2619 data, reloc_entry->address,
2620 symbol->section,
2621 (symbol->value
2622 + symbol->section->output_section->vma
2623 + symbol->section->output_offset),
2624 reloc_entry->addend);
2625}
2626
2627/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2628#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2629
2630static bfd_reloc_status_type
fbaf61ad
NC		 2631nds32_elf_do_9_pcrel_reloc (bfd * abfd,
2632 reloc_howto_type * howto,
2633 asection * input_section,
2634 bfd_byte * data,
2635 bfd_vma offset,
2636 asection * symbol_section ATTRIBUTE_UNUSED,
2637 bfd_vma symbol_value,
2638 bfd_vma addend)
35c08157
KLC		 2639{
2640 bfd_signed_vma relocation;
2641 unsigned short x;
2642 bfd_reloc_status_type status;
2643
2644 /* Sanity check the address (offset in section). */
2645 if (offset > bfd_get_section_limit (abfd, input_section))
2646 return bfd_reloc_outofrange;
2647
2648 relocation = symbol_value + addend;
2649 /* Make it pc relative. */
2650 relocation -= (input_section->output_section->vma
2651 + input_section->output_offset);
2652 /* These jumps mask off the lower two bits of the current address
2653 before doing pcrel calculations. */
2654 relocation -= (offset & -(bfd_vma) 2);
2655
1c8f6a4d 2656 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2657 status = bfd_reloc_overflow;
2658 else
2659 status = bfd_reloc_ok;
2660
2661 x = bfd_getb16 (data + offset);
2662
2663 relocation >>= howto->rightshift;
2664 relocation <<= howto->bitpos;
2665 x = (x & ~howto->dst_mask)
2666 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2667
2668 bfd_putb16 ((bfd_vma) x, data + offset);
2669
2670 return status;
2671}
2672
2673/* Handle the R_NDS32_HI20_[SU]LO relocs.
2674 HI20_SLO is for the add3 and load/store with displacement instructions.
2675 HI20 is for the or3 instruction.
2676 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2677 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2678 we must add one to the high 16 bytes (which will get subtracted off when
2679 the low 16 bits are added).
2680 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2681 because there is a carry from the LO12 to the HI20. Here we just save
2682 the information we need; we do the actual relocation when we see the LO12.
2683 This code is copied from the elf32-mips.c. We also support an arbitrary
2684 number of HI20 relocs to be associated with a single LO12 reloc. The
2685 assembler sorts the relocs to ensure each HI20 immediately precedes its
2686 LO12. However if there are multiple copies, the assembler may not find
2687 the real LO12 so it picks the first one it finds. */
2688
2689struct nds32_hi20
2690{
2691 struct nds32_hi20 *next;
2692 bfd_byte *addr;
2693 bfd_vma addend;
2694};
2695
2696static struct nds32_hi20 *nds32_hi20_list;
2697
2698static bfd_reloc_status_type
fbaf61ad
NC		 2699nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED,
2700 arelent *reloc_entry,
2701 asymbol *symbol,
2702 void *data,
2703 asection *input_section,
2704 bfd *output_bfd,
2705 char **error_message ATTRIBUTE_UNUSED)
35c08157
KLC		 2706{
2707 bfd_reloc_status_type ret;
2708 bfd_vma relocation;
2709 struct nds32_hi20 *n;
2710
2711 /* This part is from bfd_elf_generic_reloc.
2712 If we're relocating, and this an external symbol, we don't want
2713 to change anything. */
2714 if (output_bfd != (bfd *) NULL
2715 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2716 {
2717 reloc_entry->address += input_section->output_offset;
2718 return bfd_reloc_ok;
2719 }
2720
2721 /* Sanity check the address (offset in section). */
2722 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2723 return bfd_reloc_outofrange;
2724
2725 ret = bfd_reloc_ok;
2726 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2727 ret = bfd_reloc_undefined;
2728
2729 if (bfd_is_com_section (symbol->section))
2730 relocation = 0;
2731 else
2732 relocation = symbol->value;
2733
2734 relocation += symbol->section->output_section->vma;
2735 relocation += symbol->section->output_offset;
2736 relocation += reloc_entry->addend;
2737
2738 /* Save the information, and let LO12 do the actual relocation. */
2739 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2740 if (n == NULL)
2741 return bfd_reloc_outofrange;
2742
2743 n->addr = (bfd_byte *) data + reloc_entry->address;
2744 n->addend = relocation;
2745 n->next = nds32_hi20_list;
2746 nds32_hi20_list = n;
2747
2748 if (output_bfd != (bfd *) NULL)
2749 reloc_entry->address += input_section->output_offset;
2750
2751 return ret;
2752}
2753
2754/* Handle an NDS32 ELF HI20 reloc. */
2755
2756static void
2757nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
fbaf61ad
NC		 2758 int type ATTRIBUTE_UNUSED,
2759 Elf_Internal_Rela *relhi,
2760 Elf_Internal_Rela *rello,
2761 bfd_byte *contents,
35c08157
KLC		 2762 bfd_vma addend)
2763{
2764 unsigned long insn;
2765 bfd_vma addlo;
2766
2767 insn = bfd_getb32 (contents + relhi->r_offset);
2768
2769 addlo = bfd_getb32 (contents + rello->r_offset);
2770 addlo &= 0xfff;
2771
2772 addend += ((insn & 0xfffff) << 20) + addlo;
2773
2774 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2775 bfd_putb32 (insn, contents + relhi->r_offset);
2776}
2777
2778/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2779 inplace relocation; this function exists in order to do the
2780 R_NDS32_HI20_[SU]LO relocation described above. */
2781
2782static bfd_reloc_status_type
2783nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2784 void *data, asection *input_section, bfd *output_bfd,
2785 char **error_message)
2786{
2787 /* This part is from bfd_elf_generic_reloc.
2788 If we're relocating, and this an external symbol, we don't want
2789 to change anything. */
2790 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2791 && reloc_entry->addend == 0)
2792 {
2793 reloc_entry->address += input_section->output_offset;
2794 return bfd_reloc_ok;
2795 }
2796
2797 if (nds32_hi20_list != NULL)
2798 {
2799 struct nds32_hi20 *l;
2800
2801 l = nds32_hi20_list;
2802 while (l != NULL)
2803 {
2804 unsigned long insn;
2805 unsigned long val;
2806 unsigned long vallo;
2807 struct nds32_hi20 *next;
2808
2809 /* Do the HI20 relocation. Note that we actually don't need
2810 to know anything about the LO12 itself, except where to
2811 find the low 12 bits of the addend needed by the LO12. */
2812 insn = bfd_getb32 (l->addr);
2813 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2814 vallo &= 0xfff;
2815 switch (reloc_entry->howto->type)
2816 {
2817 case R_NDS32_LO12S3:
2818 vallo <<= 3;
2819 break;
2820
2821 case R_NDS32_LO12S2:
2822 vallo <<= 2;
2823 break;
2824
2825 case R_NDS32_LO12S1:
2826 vallo <<= 1;
2827 break;
2828
2829 case R_NDS32_LO12S0:
2830 vallo <<= 0;
2831 break;
2832 }
2833
2834 val = ((insn & 0xfffff) << 12) + vallo;
2835 val += l->addend;
2836
2837 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2838 bfd_putb32 ((bfd_vma) insn, l->addr);
2839
2840 next = l->next;
2841 free (l);
2842 l = next;
2843 }
2844
2845 nds32_hi20_list = NULL;
2846 }
2847
2848 /* Now do the LO12 reloc in the usual way.
2849 ??? It would be nice to call bfd_elf_generic_reloc here,
2850 but we have partial_inplace set. bfd_elf_generic_reloc will
2851 pass the handling back to bfd_install_relocation which will install
2852 a section relative addend which is wrong. */
2853 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2854 input_section, output_bfd, error_message);
2855}
2856
2857/* Do generic partial_inplace relocation.
2858 This is a local replacement for bfd_elf_generic_reloc. */
2859
2860static bfd_reloc_status_type
2861nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2862 asymbol *symbol, void *data, asection *input_section,
2863 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2864{
2865 bfd_reloc_status_type ret;
2866 bfd_vma relocation;
2867 bfd_byte *inplace_address;
2868
2869 /* This part is from bfd_elf_generic_reloc.
2870 If we're relocating, and this an external symbol, we don't want
2871 to change anything. */
2872 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2873 && reloc_entry->addend == 0)
2874 {
2875 reloc_entry->address += input_section->output_offset;
2876 return bfd_reloc_ok;
2877 }
2878
2879 /* Now do the reloc in the usual way.
2880 ??? It would be nice to call bfd_elf_generic_reloc here,
2881 but we have partial_inplace set. bfd_elf_generic_reloc will
2882 pass the handling back to bfd_install_relocation which will install
2883 a section relative addend which is wrong. */
2884
2885 /* Sanity check the address (offset in section). */
2886 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2887 return bfd_reloc_outofrange;
2888
2889 ret = bfd_reloc_ok;
2890 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2891 ret = bfd_reloc_undefined;
2892
2893 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2894 relocation = 0;
2895 else
2896 relocation = symbol->value;
2897
2898 /* Only do this for a final link. */
2899 if (output_bfd == (bfd *) NULL)
2900 {
2901 relocation += symbol->section->output_section->vma;
2902 relocation += symbol->section->output_offset;
2903 }
2904
2905 relocation += reloc_entry->addend;
2906 switch (reloc_entry->howto->type)
2907 {
2908 case R_NDS32_LO12S3:
2909 relocation >>= 3;
2910 break;
2911
2912 case R_NDS32_LO12S2:
2913 relocation >>= 2;
2914 break;
2915
2916 case R_NDS32_LO12S1:
2917 relocation >>= 1;
2918 break;
2919
2920 case R_NDS32_LO12S0:
2921 default:
2922 relocation >>= 0;
2923 break;
2924 }
2925
2926 inplace_address = (bfd_byte *) data + reloc_entry->address;
2927
2928#define DOIT(x) \
2929 x = ((x & ~reloc_entry->howto->dst_mask) | \
2930 (((x & reloc_entry->howto->src_mask) + relocation) & \
2931 reloc_entry->howto->dst_mask))
2932
2933 switch (reloc_entry->howto->size)
2934 {
2935 case 1:
2936 {
2937 short x = bfd_getb16 (inplace_address);
2938
2939 DOIT (x);
2940 bfd_putb16 ((bfd_vma) x, inplace_address);
2941 }
2942 break;
2943 case 2:
2944 {
2945 unsigned long x = bfd_getb32 (inplace_address);
2946
2947 DOIT (x);
2948 bfd_putb32 ((bfd_vma) x, inplace_address);
2949 }
2950 break;
2951 default:
2952 BFD_ASSERT (0);
2953 }
2954
2955 if (output_bfd != (bfd *) NULL)
2956 reloc_entry->address += input_section->output_offset;
2957
2958 return ret;
2959}
2960
2961/* Handle the R_NDS32_SDA15 reloc.
2962 This reloc is used to compute the address of objects in the small data area
2963 and to perform loads and stores from that area.
2964 The lower 15 bits are sign extended and added to the register specified
2965 in the instruction, which is assumed to point to _SDA_BASE_.
2966
2967 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2968 the access size, this must be taken care of. */
2969
2970static bfd_reloc_status_type
2971nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2972 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2973 asection *input_section, bfd *output_bfd,
2974 char **error_message ATTRIBUTE_UNUSED)
2975{
2976 /* This part is from bfd_elf_generic_reloc. */
2977 if (output_bfd != (bfd *) NULL
2978 && (symbol->flags & BSF_SECTION_SYM) == 0
2979 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2980 {
2981 reloc_entry->address += input_section->output_offset;
2982 return bfd_reloc_ok;
2983 }
2984
2985 if (output_bfd != NULL)
2986 {
2987 /* FIXME: See bfd_perform_relocation. Is this right? */
2988 return bfd_reloc_continue;
2989 }
2990
2991 /* FIXME: not sure what to do here yet. But then again, the linker
2992 may never call us. */
2993 abort ();
2994}
2995
2996/* nds32_elf_ignore_reloc is the special function for
2997 relocation types which don't need to be relocated
2998 like relaxation relocation types.
2999 This function simply return bfd_reloc_ok when it is
3000 invoked. */
3001
3002static bfd_reloc_status_type
3003nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
3004 asymbol *symbol ATTRIBUTE_UNUSED,
3005 void *data ATTRIBUTE_UNUSED, asection *input_section,
3006 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
3007{
3008 if (output_bfd != NULL)
3009 reloc_entry->address += input_section->output_offset;
3010
3011 return bfd_reloc_ok;
3012}
3013\f
3014
3015/* Map BFD reloc types to NDS32 ELF reloc types. */
3016
3017struct nds32_reloc_map_entry
3018{
3019 bfd_reloc_code_real_type bfd_reloc_val;
3020 unsigned char elf_reloc_val;
3021};
3022
3023static const struct nds32_reloc_map_entry nds32_reloc_map[] =
3024{
3025 {BFD_RELOC_NONE, R_NDS32_NONE},
3026 {BFD_RELOC_16, R_NDS32_16_RELA},
3027 {BFD_RELOC_32, R_NDS32_32_RELA},
fbaf61ad
NC		 3028 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
3029 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
3030
35c08157 3031 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
35c08157
KLC		 3032 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
3033 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
3034 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
3035 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
3036 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
35c08157
KLC		 3037 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
3038 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
3039 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
3040 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
3041 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
3042 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
3043 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
3044 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
3045 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
3046 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
fbaf61ad
NC		 3047 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
3048 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
3049 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
3050 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
35c08157
KLC		 3051 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
3052 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
3053 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
3054 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
3055 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
3056 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
3057 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
3058 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
fbaf61ad
NC		 3059 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
3060 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
35c08157
KLC		 3061 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
3062 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
3063 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
35c08157
KLC		 3064 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
3065 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
35c08157
KLC		 3066 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
3067 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
3068 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
3069 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
3070 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
3071 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
3072 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
3073 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
3074 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
3075 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
3076 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
3077 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
3078 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
fbaf61ad
NC		 3079 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
3080 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
3081 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
3082 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
3083 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
3084 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
3085 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 3086 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
3087 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
3088 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
3089 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
35c08157
KLC		 3090 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
3091 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
3092 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
3093 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
35c08157
KLC		 3094 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
3095 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
3096 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
3097 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
fbaf61ad
NC		 3098 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
3099 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
3100 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
3101 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
3102 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
3103 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
3104 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
35c08157
KLC		 3105 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
3106 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
fbaf61ad
NC		 3107 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
3108 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
3109 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
3110 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
3111 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
3112 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
3113 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
3114 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
35c08157
KLC		 3115 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
3116 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
35c08157 3117 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
35c08157
KLC		 3118 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
3119 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
3120 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
3121 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
3122 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
35c08157
KLC		 3123 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
3124 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
3125 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
3126 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
fbaf61ad 3127 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 3128 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
3129 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
3130 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
3131 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
3132 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
fbaf61ad
NC		 3133 /* Not sure. */
3134 {BFD_RELOC_NDS32_TPOFF, R_NDS32_TLS_TPOFF},
3135 /* Missing: BFD_RELOC_NDS32_GOTTPOFF. */
1c8f6a4d
KLC		 3136 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
3137 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
1c8f6a4d
KLC		 3138 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
3139 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
3140 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
3141 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
fbaf61ad
NC		 3142 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
3143 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
3144 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
3145 {BFD_RELOC_NDS32_TLS_IE_LO12, R_NDS32_TLS_IE_LO12},
3146 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
3147 {BFD_RELOC_NDS32_TLS_IEGP_HI20, R_NDS32_TLS_IEGP_HI20},
3148 {BFD_RELOC_NDS32_TLS_IEGP_LO12, R_NDS32_TLS_IEGP_LO12},
3149 {BFD_RELOC_NDS32_TLS_IEGP_LO12S2, R_NDS32_TLS_IEGP_LO12S2},
3150 {BFD_RELOC_NDS32_TLS_IEGP_LW, R_NDS32_TLS_IEGP_LW},
3151 {BFD_RELOC_NDS32_TLS_DESC, R_NDS32_TLS_DESC},
3152 {BFD_RELOC_NDS32_TLS_DESC_HI20, R_NDS32_TLS_DESC_HI20},
3153 {BFD_RELOC_NDS32_TLS_DESC_LO12, R_NDS32_TLS_DESC_LO12},
3154 {BFD_RELOC_NDS32_TLS_DESC_20, R_NDS32_TLS_DESC_20},
3155 {BFD_RELOC_NDS32_TLS_DESC_SDA17S2, R_NDS32_TLS_DESC_SDA17S2},
3156 {BFD_RELOC_NDS32_TLS_DESC_ADD, R_NDS32_TLS_DESC_ADD},
3157 {BFD_RELOC_NDS32_TLS_DESC_FUNC, R_NDS32_TLS_DESC_FUNC},
3158 {BFD_RELOC_NDS32_TLS_DESC_CALL, R_NDS32_TLS_DESC_CALL},
3159 {BFD_RELOC_NDS32_TLS_DESC_MEM, R_NDS32_TLS_DESC_MEM},
3160 {BFD_RELOC_NDS32_REMOVE, R_NDS32_RELAX_REMOVE},
3161 {BFD_RELOC_NDS32_GROUP, R_NDS32_RELAX_GROUP},
3162 {BFD_RELOC_NDS32_LSI, R_NDS32_LSI},
35c08157
KLC		 3163};
3164
3165/* Patch tag. */
3166
3167static reloc_howto_type *
3168bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
3169 const char *r_name)
3170{
3171 unsigned int i;
3172
3173 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
3174 if (nds32_elf_howto_table[i].name != NULL
3175 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
3176 return &nds32_elf_howto_table[i];
3177
3178 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
3179 if (nds32_elf_relax_howto_table[i].name != NULL
3180 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
3181 return &nds32_elf_relax_howto_table[i];
3182
3183 return NULL;
3184}
3185
3186static reloc_howto_type *
3187bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
3188{
3189 if (code < R_NDS32_RELAX_ENTRY)
3190 {
3191 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
3192 return &nds32_elf_howto_table[code];
3193 }
3194 else
3195 {
fbaf61ad
NC		 3196 if ((size_t) (code - R_NDS32_RELAX_ENTRY)
3197 >= ARRAY_SIZE (nds32_elf_relax_howto_table))
3198 {
3199 int i = code;
3200 i += 1;
3201 }
3202
35c08157
KLC		 3203 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
3204 < ARRAY_SIZE (nds32_elf_relax_howto_table));
3205 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
3206 }
3207}
3208
3209static reloc_howto_type *
3210bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
3211 bfd_reloc_code_real_type code)
3212{
3213 unsigned int i;
3214
3215 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
3216 {
3217 if (nds32_reloc_map[i].bfd_reloc_val == code)
3218 return bfd_elf32_bfd_reloc_type_table_lookup
fbaf61ad 3219 (nds32_reloc_map[i].elf_reloc_val);
35c08157
KLC		 3220 }
3221
3222 return NULL;
3223}
3224
3225/* Set the howto pointer for an NDS32 ELF reloc. */
3226
0a1b45a2 3227static bool
f3185997 3228nds32_info_to_howto_rel (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 3229 Elf_Internal_Rela *dst)
3230{
3231 enum elf_nds32_reloc_type r_type;
3232
3233 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 3234 if (r_type > R_NDS32_GNU_VTENTRY)
3235 {
695344c0 3236 /* xgettext:c-format */
0aa13fee
AM		 3237 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
3238 abfd, r_type);
f3185997 3239 bfd_set_error (bfd_error_bad_value);
0a1b45a2 3240 return false;
5860e3f8 3241 }
fbaf61ad
NC		 3242
3243 BFD_ASSERT (ELF32_R_TYPE (dst->r_info) <= R_NDS32_GNU_VTENTRY);
35c08157 3244 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
0a1b45a2 3245 return true;
35c08157
KLC		 3246}
3247
0a1b45a2 3248static bool
35c08157
KLC		 3249nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
3250 Elf_Internal_Rela *dst)
3251{
f3185997
NC		 3252 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
3253
3254 if ((r_type == R_NDS32_NONE)
3255 || ((r_type > R_NDS32_GNU_VTENTRY)
3256 && (r_type < R_NDS32_max)))
3257 {
3258 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
0a1b45a2 3259 return true;
f3185997
NC		 3260 }
3261
3262 /* xgettext:c-format */
3263 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
3264 bfd_set_error (bfd_error_bad_value);
0a1b45a2 3265 return false;
35c08157
KLC		 3266}
3267
3268/* Support for core dump NOTE sections.
3269 Reference to include/linux/elfcore.h in Linux. */
3270
0a1b45a2 3271static bool
35c08157
KLC		 3272nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
3273{
3274 int offset;
3275 size_t size;
3276
3277 switch (note->descsz)
3278 {
3279 case 0x114:
fbaf61ad 3280 /* Linux/NDS32 32-bit, ABI1. */
35c08157
KLC		 3281
3282 /* pr_cursig */
3283 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3284
3285 /* pr_pid */
3286 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3287
3288 /* pr_reg */
3289 offset = 72;
3290 size = 200;
3291 break;
3292
3293 case 0xfc:
fbaf61ad 3294 /* Linux/NDS32 32-bit. */
35c08157
KLC		 3295
3296 /* pr_cursig */
3297 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3298
3299 /* pr_pid */
3300 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3301
3302 /* pr_reg */
3303 offset = 72;
3304 size = 176;
3305 break;
3306
3307 default:
0a1b45a2 3308 return false;
35c08157
KLC		 3309 }
3310
3311 /* Make a ".reg" section. */
3312 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3313 size, note->descpos + offset);
3314}
3315
0a1b45a2 3316static bool
35c08157
KLC		 3317nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3318{
3319 switch (note->descsz)
3320 {
3321 case 124:
fbaf61ad 3322 /* Linux/NDS32. */
35c08157
KLC		 3323
3324 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3325 elf_tdata (abfd)->core->program =
3326 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3327 elf_tdata (abfd)->core->command =
3328 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 3329 break;
35c08157
KLC		 3330
3331 default:
0a1b45a2 3332 return false;
35c08157
KLC		 3333 }
3334
3335 /* Note that for some reason, a spurious space is tacked
3336 onto the end of the args in some (at least one anyway)
3337 implementations, so strip it off if it exists. */
3338 {
3339 char *command = elf_tdata (abfd)->core->command;
3340 int n = strlen (command);
3341
3342 if (0 < n && command[n - 1] == ' ')
3343 command[n - 1] = '\0';
3344 }
3345
0a1b45a2 3346 return true;
35c08157
KLC		 3347}
3348
3349/* Hook called by the linker routine which adds symbols from an object
3350 file. We must handle the special NDS32 section numbers here.
3351 We also keep watching for whether we need to create the sdata special
3352 linker sections. */
3353
0a1b45a2 3354static bool
35c08157
KLC		 3355nds32_elf_add_symbol_hook (bfd *abfd,
3356 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3357 Elf_Internal_Sym *sym,
3358 const char **namep ATTRIBUTE_UNUSED,
3359 flagword *flagsp ATTRIBUTE_UNUSED,
3360 asection **secp, bfd_vma *valp)
3361{
3362 switch (sym->st_shndx)
3363 {
3364 case SHN_COMMON:
3365 /* Common symbols less than the GP size are automatically
3366 treated as SHN_MIPS_SCOMMON symbols. */
3367 if (sym->st_size > elf_gp_size (abfd)
3368 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3369 break;
3370
10885e24 3371 /* st_value is the alignment constraint.
35c08157
KLC		 3372 That might be its actual size if it is an array or structure. */
3373 switch (sym->st_value)
3374 {
3375 case 1:
3376 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3377 break;
3378 case 2:
3379 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3380 break;
3381 case 4:
3382 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3383 break;
3384 case 8:
3385 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3386 break;
3387 default:
0a1b45a2 3388 return true;
35c08157
KLC		 3389 }
3390
10885e24 3391 (*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA;
35c08157
KLC		 3392 *valp = sym->st_size;
3393 break;
3394 }
3395
0a1b45a2 3396 return true;
35c08157
KLC		 3397}
3398
35c08157
KLC		 3399/* This function can figure out the best location for a base register to access
3400 data relative to this base register
3401 INPUT:
3402 sda_d0: size of first DOUBLE WORD data section
3403 sda_w0: size of first WORD data section
3404 sda_h0: size of first HALF WORD data section
3405 sda_b : size of BYTE data section
3406 sda_hi: size of second HALF WORD data section
3407 sda_w1: size of second WORD data section
3408 sda_d1: size of second DOUBLE WORD data section
3409 OUTPUT:
3410 offset (always positive) from the beginning of sda_d0 if OK
3411 a negative error value if fail
3412 NOTE:
3413 these 7 sections have to be located back to back if exist
3414 a pass in 0 value for non-existing section */
3415
3416/* Due to the interpretation of simm15 field of load/store depending on
3417 data accessing size, the organization of base register relative data shall
3418 like the following figure
3419 -------------------------------------------
3420 | DOUBLE WORD sized data (range +/- 128K)
3421 -------------------------------------------
3422 | WORD sized data (range +/- 64K)
3423 -------------------------------------------
3424 | HALF WORD sized data (range +/- 32K)
3425 -------------------------------------------
3426 | BYTE sized data (range +/- 16K)
3427 -------------------------------------------
3428 | HALF WORD sized data (range +/- 32K)
3429 -------------------------------------------
3430 | WORD sized data (range +/- 64K)
3431 -------------------------------------------
3432 | DOUBLE WORD sized data (range +/- 128K)
3433 -------------------------------------------
3434 Its base register shall be set to access these data freely. */
3435
3436/* We have to figure out the SDA_BASE value, so that we can adjust the
3437 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3438 BFD. If we can't find it, we're stuck. We cache it in the ELF
3439 target data. We don't need to adjust the symbol value for an
3440 external symbol if we are producing relocatable output. */
3441
3442static asection *sda_rela_sec = NULL;
3443
1c8f6a4d 3444#define SDA_SECTION_NUM 10
35c08157
KLC		 3445
3446static bfd_reloc_status_type
0a1b45a2
AM		 3447nds32_elf_final_sda_base (bfd *output_bfd,
3448 struct bfd_link_info *info,
3449 bfd_vma *psb,
3450 bool add_symbol)
35c08157
KLC		 3451{
3452 int relax_fp_as_gp;
3453 struct elf_nds32_link_hash_table *table;
3454 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3455 long unsigned int total = 0;
fbaf61ad
NC		 3456 asection *first = NULL, *final = NULL, *temp;
3457 bfd_vma sda_base = 0;
35c08157 3458
0a1b45a2 3459 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
fbaf61ad
NC		 3460 if (!h || (h->type != bfd_link_hash_defined
3461 && h->type != bfd_link_hash_defweak))
35c08157 3462 {
35c08157
KLC		 3463 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3464 4 byte-aligned. Therefore, it has to set the first section ".data"
3465 4 byte-aligned. */
3466 static const char sec_name[SDA_SECTION_NUM][10] =
3467 {
3468 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3469 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3470 };
3471 size_t i = 0;
3472
3473 if (output_bfd->sections == NULL)
3474 {
3475 *psb = elf_gp (output_bfd);
3476 return bfd_reloc_ok;
3477 }
3478
3479 /* Get the first and final section. */
fbaf61ad 3480 while (i < ARRAY_SIZE (sec_name))
35c08157
KLC		 3481 {
3482 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3483 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3484 first = temp;
3485 if (temp && (temp->size != 0 || temp->rawsize != 0))
3486 final = temp;
1c8f6a4d
KLC		 3487
3488 /* Summarize the sections in order to check if joining .bss. */
3489 if (temp && temp->size != 0)
3490 total += temp->size;
3491 else if (temp && temp->rawsize != 0)
3492 total += temp->rawsize;
3493
35c08157
KLC		 3494 i++;
3495 }
3496
1c8f6a4d
KLC		 3497 /* Check .bss size. */
3498 temp = bfd_get_section_by_name (output_bfd, ".bss");
3499 if (temp)
3500 {
3501 if (temp->size != 0)
3502 total += temp->size;
3503 else if (temp->rawsize != 0)
3504 total += temp->rawsize;
3505
3506 if (total < 0x80000)
3507 {
3508 if (!first && (temp->size != 0 || temp->rawsize != 0))
3509 first = temp;
3510 if ((temp->size != 0 || temp->rawsize != 0))
3511 final = temp;
3512 }
3513 }
3514
35c08157
KLC		 3515 if (first && final)
3516 {
3517 /* The middle of data region. */
1c8f6a4d 3518 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3519
3520 /* Find the section sda_base located. */
3521 i = 0;
fbaf61ad 3522 while (i < ARRAY_SIZE (sec_name))
35c08157
KLC		 3523 {
3524 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3525 if (final && (final->size != 0 || final->rawsize != 0)
3526 && sda_base >= final->vma)
3527 {
3528 first = final;
3529 i++;
3530 }
3531 else
3532 break;
3533 }
3534 }
3535 else
3536 {
fbaf61ad
NC		 3537 /* If there is not any default data section in output bfd, try to find
3538 the first data section. If no data section be found, just simplily
3539 choose the first output section. */
3540 temp = output_bfd->sections;
3541 while (temp)
3542 {
3543 if (temp->flags & SEC_ALLOC
3544 && (((temp->flags & SEC_DATA)
3545 && ((temp->flags & SEC_READONLY) == 0))
3546 || (temp->flags & SEC_LOAD) == 0)
3547 && (temp->size != 0 || temp->rawsize != 0))
3548 {
3549 if (!first)
3550 first = temp;
3551 final = temp;
3552 }
3553 temp = temp->next;
3554 }
3555
3556 /* There is no data or bss section. */
3557 if (!first || (first->size == 0 && first->rawsize == 0))
3558 {
3559 first = output_bfd->sections;
3560 while (first && first->size == 0 && first->rawsize == 0)
3561 first = first->next;
3562 }
3563
3564 /* There is no concrete section. */
35c08157
KLC		 3565 if (!first)
3566 {
3567 *psb = elf_gp (output_bfd);
3568 return bfd_reloc_ok;
3569 }
fbaf61ad
NC		 3570
3571 if (final && (final->vma + final->rawsize - first->vma) <= 0x4000)
3572 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3573 else
3574 sda_base = first->vma + 0x2000;
35c08157
KLC		 3575 }
3576
3577 sda_base -= first->vma;
3578 sda_base = sda_base & (~7);
3579
3580 if (!_bfd_generic_link_add_one_symbol
fbaf61ad 3581 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
0a1b45a2 3582 (bfd_vma) sda_base, (const char *) NULL, false,
fbaf61ad 3583 get_elf_backend_data (output_bfd)->collect, &h))
0a1b45a2 3584 return false;
35c08157
KLC		 3585
3586 sda_rela_sec = first;
fbaf61ad 3587 }
35c08157 3588
fbaf61ad
NC		 3589 /* Set _FP_BASE_ to _SDA_BASE_. */
3590 table = nds32_elf_hash_table (info);
3591 relax_fp_as_gp = table->relax_fp_as_gp;
0a1b45a2 3592 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME, false, false, false);
fbaf61ad
NC		 3593 /* _SDA_BASE_ is difined in linker script. */
3594 if (!first)
3595 {
3596 first = h->u.def.section;
3597 sda_base = h->u.def.value;
3598 }
3599
3600 if (relax_fp_as_gp && h2
3601 && (h2->type == bfd_link_hash_undefweak
3602 || h2->type == bfd_link_hash_undefined))
3603 {
3604 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3605 And set FP equal to SDA_BASE to do relaxation for
3606 la $fp, _FP_BASE_. */
3607 if (!_bfd_generic_link_add_one_symbol
3608 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3609 first, sda_base, (const char *) NULL,
0a1b45a2
AM		 3610 false, get_elf_backend_data (output_bfd)->collect, &h2))
3611 return false;
35c08157
KLC		 3612 }
3613
535b785f 3614 if (add_symbol)
35c08157
KLC		 3615 {
3616 if (h)
3617 {
3618 /* Now set gp. */
3619 elf_gp (output_bfd) = (h->u.def.value
3620 + h->u.def.section->output_section->vma
3621 + h->u.def.section->output_offset);
3622 }
3623 else
3624 {
38f14ab8 3625 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC		 3626 return bfd_reloc_dangerous;
3627 }
3628 }
3629
fbaf61ad
NC		 3630 *psb = h->u.def.value
3631 + h->u.def.section->output_section->vma
3632 + h->u.def.section->output_offset;
35c08157
KLC		 3633 return bfd_reloc_ok;
3634}
3635\f
3636
3637/* Return size of a PLT entry. */
3638#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3639
35c08157
KLC		 3640/* Create an entry in an nds32 ELF linker hash table. */
3641
3642static struct bfd_hash_entry *
3643nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3644 struct bfd_hash_table *table,
3645 const char *string)
3646{
3647 struct elf_nds32_link_hash_entry *ret;
3648
3649 ret = (struct elf_nds32_link_hash_entry *) entry;
3650
3651 /* Allocate the structure if it has not already been allocated by a
3652 subclass. */
3653 if (ret == NULL)
3654 ret = (struct elf_nds32_link_hash_entry *)
3655 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3656
3657 if (ret == NULL)
3658 return (struct bfd_hash_entry *) ret;
3659
3660 /* Call the allocation method of the superclass. */
3661 ret = (struct elf_nds32_link_hash_entry *)
3662 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3663
3664 if (ret != NULL)
3665 {
3666 struct elf_nds32_link_hash_entry *eh;
3667
3668 eh = (struct elf_nds32_link_hash_entry *) ret;
1c8f6a4d 3669 eh->tls_type = GOT_UNKNOWN;
fbaf61ad 3670 eh->offset_to_gp = 0;
35c08157
KLC		 3671 }
3672
3673 return (struct bfd_hash_entry *) ret;
3674}
3675
3676/* Create an nds32 ELF linker hash table. */
3677
3678static struct bfd_link_hash_table *
3679nds32_elf_link_hash_table_create (bfd *abfd)
3680{
3681 struct elf_nds32_link_hash_table *ret;
3682
986f0783 3683 size_t amt = sizeof (struct elf_nds32_link_hash_table);
35c08157
KLC		 3684
3685 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3686 if (ret == NULL)
3687 return NULL;
3688
fbaf61ad 3689 /* Patch tag. */
35c08157
KLC		 3690 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3691 nds32_elf_link_hash_newfunc,
3692 sizeof (struct elf_nds32_link_hash_entry),
3693 NDS32_ELF_DATA))
3694 {
3695 free (ret);
3696 return NULL;
3697 }
3698
fbaf61ad
NC		 3699 ret->sym_ld_script = NULL;
3700
35c08157
KLC		 3701 return &ret->root.root;
3702}
3703
fbaf61ad
NC		 3704/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3705 shortcuts to them in our hash table. */
3706
0a1b45a2 3707static bool
fbaf61ad
NC		 3708create_got_section (bfd *dynobj, struct bfd_link_info *info)
3709{
3710 struct elf_link_hash_table *ehtab;
3711
3712 if (!_bfd_elf_create_got_section (dynobj, info))
0a1b45a2 3713 return false;
fbaf61ad
NC		 3714
3715 ehtab = elf_hash_table (info);
3716 ehtab->sgot = bfd_get_section_by_name (dynobj, ".got");
3717 ehtab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3718 if (!ehtab->sgot || !ehtab->sgotplt)
3719 abort ();
3720
3721 /* _bfd_elf_create_got_section will create it for us. */
3722 ehtab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3723 if (ehtab->srelgot == NULL
fd361982 3724 || !bfd_set_section_flags (ehtab->srelgot,
fbaf61ad
NC		 3725 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3726 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3727 | SEC_READONLY))
fd361982 3728 || !bfd_set_section_alignment (ehtab->srelgot, 2))
0a1b45a2 3729 return false;
fbaf61ad 3730
0a1b45a2 3731 return true;
fbaf61ad
NC		 3732}
3733
35c08157
KLC		 3734/* Create dynamic sections when linking against a dynamic object. */
3735
0a1b45a2 3736static bool
35c08157
KLC		 3737nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3738{
fbaf61ad 3739 struct elf_link_hash_table *ehtab;
35c08157
KLC		 3740 struct elf_nds32_link_hash_table *htab;
3741 flagword flags, pltflags;
3742 register asection *s;
3743 const struct elf_backend_data *bed;
3744 int ptralign = 2; /* 32-bit */
fbaf61ad
NC		 3745 const char *secname;
3746 char *relname;
3747 flagword secflags;
3748 asection *sec;
35c08157
KLC		 3749
3750 bed = get_elf_backend_data (abfd);
fbaf61ad 3751 ehtab = elf_hash_table (info);
35c08157
KLC		 3752 htab = nds32_elf_hash_table (info);
3753
3754 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3755 .rel[a].bss sections. */
3756
3757 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3758 | SEC_LINKER_CREATED);
3759
3760 pltflags = flags;
3761 pltflags |= SEC_CODE;
3762 if (bed->plt_not_loaded)
3763 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3764 if (bed->plt_readonly)
3765 pltflags |= SEC_READONLY;
3766
3767 s = bfd_make_section (abfd, ".plt");
fbaf61ad 3768 ehtab->splt = s;
35c08157 3769 if (s == NULL
fd361982
AM		 3770 || !bfd_set_section_flags (s, pltflags)
3771 || !bfd_set_section_alignment (s, bed->plt_alignment))
0a1b45a2 3772 return false;
35c08157
KLC		 3773
3774 if (bed->want_plt_sym)
3775 {
3776 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3777 .plt section. */
3778 struct bfd_link_hash_entry *bh = NULL;
3779 struct elf_link_hash_entry *h;
3780
3781 if (!(_bfd_generic_link_add_one_symbol
3782 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
0a1b45a2 3783 (bfd_vma) 0, (const char *) NULL, false,
35c08157 3784 get_elf_backend_data (abfd)->collect, &bh)))
0a1b45a2 3785 return false;
35c08157
KLC		 3786
3787 h = (struct elf_link_hash_entry *) bh;
3788 h->def_regular = 1;
3789 h->type = STT_OBJECT;
3790
0e1862bb 3791 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 3792 return false;
35c08157
KLC		 3793 }
3794
3795 s = bfd_make_section (abfd,
3796 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
fbaf61ad 3797 ehtab->srelplt = s;
35c08157 3798 if (s == NULL
fd361982
AM		 3799 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3800 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3801 return false;
35c08157 3802
fbaf61ad 3803 if (ehtab->sgot == NULL && !create_got_section (abfd, info))
0a1b45a2 3804 return false;
35c08157 3805
fbaf61ad
NC		 3806 for (sec = abfd->sections; sec; sec = sec->next)
3807 {
fd361982 3808 secflags = bfd_section_flags (sec);
fbaf61ad
NC		 3809 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3810 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3811 continue;
fd361982 3812 secname = bfd_section_name (sec);
fbaf61ad
NC		 3813 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3814 strcpy (relname, ".rela");
3815 strcat (relname, secname);
3816 if (bfd_get_section_by_name (abfd, secname))
3817 continue;
3818 s = bfd_make_section (abfd, relname);
3819 if (s == NULL
fd361982
AM		 3820 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3821 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3822 return false;
fbaf61ad 3823 }
35c08157
KLC		 3824
3825 if (bed->want_dynbss)
3826 {
3827 /* The .dynbss section is a place to put symbols which are defined
3828 by dynamic objects, are referenced by regular objects, and are
3829 not functions. We must allocate space for them in the process
3830 image and use a R_*_COPY reloc to tell the dynamic linker to
3831 initialize them at run time. The linker script puts the .dynbss
3832 section into the .bss section of the final image. */
3833 s = bfd_make_section (abfd, ".dynbss");
f1dfbfdb 3834 htab->root.sdynbss = s;
35c08157 3835 if (s == NULL
fd361982 3836 || !bfd_set_section_flags (s, SEC_ALLOC | SEC_LINKER_CREATED))
0a1b45a2 3837 return false;
35c08157
KLC		 3838 /* The .rel[a].bss section holds copy relocs. This section is not
3839 normally needed. We need to create it here, though, so that the
3840 linker will map it to an output section. We can't just create it
3841 only if we need it, because we will not know whether we need it
3842 until we have seen all the input files, and the first time the
3843 main linker code calls BFD after examining all the input files
3844 (size_dynamic_sections) the input sections have already been
3845 mapped to the output sections. If the section turns out not to
3846 be needed, we can discard it later. We will never need this
3847 section when generating a shared object, since they do not use
3848 copy relocs. */
0e1862bb 3849 if (!bfd_link_pic (info))
35c08157
KLC		 3850 {
3851 s = bfd_make_section (abfd, (bed->default_use_rela_p
3852 ? ".rela.bss" : ".rel.bss"));
f1dfbfdb 3853 htab->root.srelbss = s;
35c08157 3854 if (s == NULL
fd361982
AM		 3855 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3856 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3857 return false;
35c08157
KLC		 3858 }
3859 }
3860
0a1b45a2 3861 return true;
35c08157
KLC		 3862}
3863
3864/* Copy the extra info we tack onto an elf_link_hash_entry. */
3865static void
3866nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3867 struct elf_link_hash_entry *dir,
3868 struct elf_link_hash_entry *ind)
3869{
3870 struct elf_nds32_link_hash_entry *edir, *eind;
3871
3872 edir = (struct elf_nds32_link_hash_entry *) dir;
3873 eind = (struct elf_nds32_link_hash_entry *) ind;
3874
fbaf61ad
NC		 3875 if (ind->root.type == bfd_link_hash_indirect)
3876 {
3877 if (dir->got.refcount <= 0)
3878 {
3879 edir->tls_type = eind->tls_type;
3880 eind->tls_type = GOT_UNKNOWN;
3881 }
3882 }
3883
35c08157
KLC		 3884 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3885}
3886\f
35c08157
KLC		 3887/* Adjust a symbol defined by a dynamic object and referenced by a
3888 regular object. The current definition is in some section of the
3889 dynamic object, but we're not including those sections. We have to
3890 change the definition to something the rest of the link can
3891 understand. */
3892
0a1b45a2 3893static bool
35c08157
KLC		 3894nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3895 struct elf_link_hash_entry *h)
3896{
3897 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3898 bfd *dynobj;
3899 asection *s;
3900 unsigned int power_of_two;
3901
3902 dynobj = elf_hash_table (info)->dynobj;
3903
3904 /* Make sure we know what is going on here. */
3905 BFD_ASSERT (dynobj != NULL
3906 && (h->needs_plt
60d67dc8 3907 || h->is_weakalias
35c08157
KLC		 3908 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3909
3910
3911 /* If this is a function, put it in the procedure linkage table. We
3912 will fill in the contents of the procedure linkage table later,
3913 when we know the address of the .got section. */
3914 if (h->type == STT_FUNC || h->needs_plt)
3915 {
0e1862bb 3916 if (!bfd_link_pic (info)
35c08157
KLC		 3917 && !h->def_dynamic
3918 && !h->ref_dynamic
3919 && h->root.type != bfd_link_hash_undefweak
3920 && h->root.type != bfd_link_hash_undefined)
3921 {
3922 /* This case can occur if we saw a PLT reloc in an input
3923 file, but the symbol was never referred to by a dynamic
3924 object. In such a case, we don't actually need to build
3925 a procedure linkage table, and we can just do a PCREL
3926 reloc instead. */
3927 h->plt.offset = (bfd_vma) - 1;
3928 h->needs_plt = 0;
3929 }
3930
0a1b45a2 3931 return true;
35c08157
KLC		 3932 }
3933 else
3934 h->plt.offset = (bfd_vma) - 1;
3935
3936 /* If this is a weak symbol, and there is a real definition, the
3937 processor independent code will have arranged for us to see the
3938 real definition first, and we can just use the same value. */
60d67dc8 3939 if (h->is_weakalias)
35c08157 3940 {
60d67dc8
AM		 3941 struct elf_link_hash_entry *def = weakdef (h);
3942 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3943 h->root.u.def.section = def->root.u.def.section;
3944 h->root.u.def.value = def->root.u.def.value;
0a1b45a2 3945 return true;
35c08157
KLC		 3946 }
3947
3948 /* This is a reference to a symbol defined by a dynamic object which
3949 is not a function. */
3950
3951 /* If we are creating a shared library, we must presume that the
3952 only references to the symbol are via the global offset table.
3953 For such cases we need not do anything here; the relocations will
3954 be handled correctly by relocate_section. */
0e1862bb 3955 if (bfd_link_pic (info))
0a1b45a2 3956 return true;
35c08157
KLC		 3957
3958 /* If there are no references to this symbol that do not use the
3959 GOT, we don't need to generate a copy reloc. */
3960 if (!h->non_got_ref)
0a1b45a2 3961 return true;
35c08157
KLC		 3962
3963 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 3964 if (0 && info->nocopyreloc)
35c08157
KLC		 3965 {
3966 h->non_got_ref = 0;
0a1b45a2 3967 return true;
35c08157
KLC		 3968 }
3969
3bf083ed
AM		 3970 /* If we don't find any dynamic relocs in read-only sections, then
3971 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
5dbc8b37 3972 if (!_bfd_elf_readonly_dynrelocs (h))
35c08157
KLC		 3973 {
3974 h->non_got_ref = 0;
0a1b45a2 3975 return true;
35c08157
KLC		 3976 }
3977
3978 /* We must allocate the symbol in our .dynbss section, which will
3979 become part of the .bss section of the executable. There will be
3980 an entry for this symbol in the .dynsym section. The dynamic
3981 object will contain position independent code, so all references
3982 from the dynamic object to this symbol will go through the global
3983 offset table. The dynamic linker will use the .dynsym entry to
3984 determine the address it must put in the global offset table, so
3985 both the dynamic object and the regular object will refer to the
3986 same memory location for the variable. */
3987
3988 htab = nds32_elf_hash_table (info);
f1dfbfdb 3989 s = htab->root.sdynbss;
35c08157
KLC		 3990 BFD_ASSERT (s != NULL);
3991
3992 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3993 to copy the initial value out of the dynamic object and into the
3994 runtime process image. We need to remember the offset into the
3995 .rela.bss section we are going to use. */
3996 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3997 {
3998 asection *srel;
3999
f1dfbfdb 4000 srel = htab->root.srelbss;
35c08157
KLC		 4001 BFD_ASSERT (srel != NULL);
4002 srel->size += sizeof (Elf32_External_Rela);
4003 h->needs_copy = 1;
4004 }
4005
4006 /* We need to figure out the alignment required for this symbol. I
4007 have no idea how ELF linkers handle this. */
4008 power_of_two = bfd_log2 (h->size);
4009 if (power_of_two > 3)
4010 power_of_two = 3;
4011
4012 /* Apply the required alignment. */
4013 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
fd361982 4014 if (power_of_two > bfd_section_alignment (s))
35c08157 4015 {
fd361982 4016 if (!bfd_set_section_alignment (s, power_of_two))
0a1b45a2 4017 return false;
35c08157
KLC		 4018 }
4019
4020 /* Define the symbol as being at this point in the section. */
4021 h->root.u.def.section = s;
4022 h->root.u.def.value = s->size;
4023
4024 /* Increment the section size to make room for the symbol. */
4025 s->size += h->size;
4026
0a1b45a2 4027 return true;
35c08157
KLC		 4028}
4029
4030/* Allocate space in .plt, .got and associated reloc sections for
4031 dynamic relocs. */
4032
0a1b45a2 4033static bool
35c08157
KLC		 4034allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
4035{
4036 struct bfd_link_info *info;
fbaf61ad 4037 struct elf_link_hash_table *ehtab;
35c08157 4038 struct elf_nds32_link_hash_table *htab;
3bf083ed 4039 struct elf_dyn_relocs *p;
35c08157
KLC		 4040
4041 if (h->root.type == bfd_link_hash_indirect)
0a1b45a2 4042 return true;
35c08157 4043
fbaf61ad
NC		 4044 /* When warning symbols are created, they **replace** the "real"
4045 entry in the hash table, thus we never get to see the real
4046 symbol in a hash traversal. So look at it now. */
35c08157 4047 if (h->root.type == bfd_link_hash_warning)
35c08157
KLC		 4048 h = (struct elf_link_hash_entry *) h->root.u.i.link;
4049
4050 info = (struct bfd_link_info *) inf;
fbaf61ad 4051 ehtab = elf_hash_table (info);
35c08157 4052 htab = nds32_elf_hash_table (info);
fbaf61ad 4053 if (htab == NULL)
0a1b45a2 4054 return false;
35c08157 4055
fbaf61ad
NC		 4056 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
4057 && h->plt.refcount > 0
4058 && !(bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 4059 {
4060 /* Make sure this symbol is output as a dynamic symbol.
4061 Undefined weak syms won't yet be marked as dynamic. */
4062 if (h->dynindx == -1 && !h->forced_local)
4063 {
4064 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4065 return false;
35c08157
KLC		 4066 }
4067
0e1862bb 4068 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 4069 {
fbaf61ad 4070 asection *s = ehtab->splt;
35c08157
KLC		 4071
4072 /* If this is the first .plt entry, make room for the special
4073 first entry. */
4074 if (s->size == 0)
4075 s->size += PLT_ENTRY_SIZE;
4076
4077 h->plt.offset = s->size;
4078
4079 /* If this symbol is not defined in a regular file, and we are
4080 not generating a shared library, then set the symbol to this
4081 location in the .plt. This is required to make function
4082 pointers compare as equal between the normal executable and
4083 the shared library. */
0e1862bb 4084 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 4085 {
4086 h->root.u.def.section = s;
4087 h->root.u.def.value = h->plt.offset;
4088 }
4089
4090 /* Make room for this entry. */
4091 s->size += PLT_ENTRY_SIZE;
4092
4093 /* We also need to make an entry in the .got.plt section, which
4094 will be placed in the .got section by the linker script. */
fbaf61ad 4095 ehtab->sgotplt->size += 4;
35c08157
KLC		 4096
4097 /* We also need to make an entry in the .rel.plt section. */
fbaf61ad
NC		 4098 ehtab->srelplt->size += sizeof (Elf32_External_Rela);
4099 if (htab->tls_desc_trampoline)
4100 htab->next_tls_desc_index++;
35c08157
KLC		 4101 }
4102 else
4103 {
4104 h->plt.offset = (bfd_vma) - 1;
4105 h->needs_plt = 0;
4106 }
4107 }
4108 else
4109 {
4110 h->plt.offset = (bfd_vma) - 1;
4111 h->needs_plt = 0;
4112 }
4113
4114 if (h->got.refcount > 0)
4115 {
fbaf61ad 4116 asection *sgot;
0a1b45a2 4117 bool dyn;
1c8f6a4d 4118 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 4119
4120 /* Make sure this symbol is output as a dynamic symbol.
4121 Undefined weak syms won't yet be marked as dynamic. */
4122 if (h->dynindx == -1 && !h->forced_local)
4123 {
4124 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4125 return false;
35c08157
KLC		 4126 }
4127
fbaf61ad
NC		 4128 sgot = elf_hash_table (info)->sgot;
4129 h->got.offset = sgot->size;
1c8f6a4d
KLC		 4130
4131 if (tls_type == GOT_UNKNOWN)
4132 abort ();
fbaf61ad
NC		 4133
4134 /* Non-TLS symbols, and TLS_IE need one GOT slot. */
4135 if (tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
4136 sgot->size += 4;
4137 else
4138 {
4139 /* TLS_DESC, TLS_GD, and TLS_LD need 2 consecutive GOT slots. */
4140 if (tls_type & GOT_TLS_DESC)
4141 sgot->size += 8;
4142 }
1c8f6a4d 4143
35c08157 4144 dyn = htab->root.dynamic_sections_created;
fbaf61ad 4145
0e1862bb 4146 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
fbaf61ad
NC		 4147 {
4148 if (tls_type == GOT_TLS_DESC && htab->tls_desc_trampoline)
4149 {
4150 /* TLS_DESC with trampoline needs a relocation slot
4151 within .rela.plt. */
4152 htab->num_tls_desc++;
4153 ehtab->srelplt->size += sizeof (Elf32_External_Rela);
4154 htab->tls_trampoline = -1;
4155 }
4156 else
4157 {
4158 /* other relocations, including TLS_DESC without trampoline, need
4159 a relocation slot within .rela.got. */
4160 ehtab->srelgot->size += sizeof (Elf32_External_Rela);
4161 }
4162 }
35c08157
KLC		 4163 }
4164 else
fbaf61ad 4165 h->got.offset = (bfd_vma)-1;
35c08157 4166
190eb1dd 4167 if (h->dyn_relocs == NULL)
0a1b45a2 4168 return true;
35c08157
KLC		 4169
4170 /* In the shared -Bsymbolic case, discard space allocated for
4171 dynamic pc-relative relocs against symbols which turn out to be
4172 defined in regular objects. For the normal shared case, discard
4173 space for pc-relative relocs that have become local due to symbol
4174 visibility changes. */
4175
0e1862bb 4176 if (bfd_link_pic (info))
35c08157
KLC		 4177 {
4178 if (h->def_regular && (h->forced_local || info->symbolic))
4179 {
3bf083ed 4180 struct elf_dyn_relocs **pp;
35c08157 4181
190eb1dd 4182 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
35c08157
KLC		 4183 {
4184 p->count -= p->pc_count;
4185 p->pc_count = 0;
4186 if (p->count == 0)
4187 *pp = p->next;
4188 else
4189 pp = &p->next;
4190 }
4191 }
4192 }
4193 else
4194 {
4195 /* For the non-shared case, discard space for relocs against
4196 symbols which turn out to need copy relocs or are not dynamic. */
4197
4198 if (!h->non_got_ref
4199 && ((h->def_dynamic
4200 && !h->def_regular)
4201 || (htab->root.dynamic_sections_created
4202 && (h->root.type == bfd_link_hash_undefweak
4203 || h->root.type == bfd_link_hash_undefined))))
4204 {
4205 /* Make sure this symbol is output as a dynamic symbol.
4206 Undefined weak syms won't yet be marked as dynamic. */
4207 if (h->dynindx == -1 && !h->forced_local)
4208 {
4209 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4210 return false;
35c08157
KLC		 4211 }
4212
4213 /* If that succeeded, we know we'll be keeping all the
4214 relocs. */
4215 if (h->dynindx != -1)
4216 goto keep;
4217 }
4218
190eb1dd 4219 h->dyn_relocs = NULL;
35c08157 4220
dc1e8a47 4221 keep:;
35c08157
KLC		 4222 }
4223
4224 /* Finally, allocate space. */
190eb1dd 4225 for (p = h->dyn_relocs; p != NULL; p = p->next)
35c08157
KLC		 4226 {
4227 asection *sreloc = elf_section_data (p->sec)->sreloc;
4228 sreloc->size += p->count * sizeof (Elf32_External_Rela);
4229 }
4230
0a1b45a2 4231 return true;
35c08157
KLC		 4232}
4233
fbaf61ad
NC		 4234/* Add relocation REL to the end of relocation section SRELOC. */
4235
4236static void
4237elf32_nds32_add_dynreloc (bfd *output_bfd,
4238 struct bfd_link_info *info ATTRIBUTE_UNUSED,
4239 asection *sreloc, Elf_Internal_Rela *rel)
4240{
4241 bfd_byte *loc;
4242 if (sreloc == NULL)
4243 abort ();
4244
4245 loc = sreloc->contents;
4246 loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rela);
4247 if (sreloc->reloc_count * sizeof (Elf32_External_Rela) > sreloc->size)
4248 abort ();
4249
4250 bfd_elf32_swap_reloca_out (output_bfd, rel, loc);
4251}
4252
35c08157
KLC		 4253/* Set the sizes of the dynamic sections. */
4254
0a1b45a2 4255static bool
35c08157
KLC		 4256nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
4257 struct bfd_link_info *info)
4258{
4259 struct elf_nds32_link_hash_table *htab;
4260 bfd *dynobj;
4261 asection *s;
0a1b45a2 4262 bool relocs;
35c08157
KLC		 4263 bfd *ibfd;
4264
4265 htab = nds32_elf_hash_table (info);
fbaf61ad 4266 if (htab == NULL)
0a1b45a2 4267 return false;
fbaf61ad
NC		 4268
4269 dynobj = elf_hash_table (info)->dynobj;
35c08157
KLC		 4270 BFD_ASSERT (dynobj != NULL);
4271
fbaf61ad 4272 if (elf_hash_table (info)->dynamic_sections_created)
35c08157
KLC		 4273 {
4274 /* Set the contents of the .interp section to the interpreter. */
f5233a16 4275 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 4276 {
4277 s = bfd_get_section_by_name (dynobj, ".interp");
4278 BFD_ASSERT (s != NULL);
4279 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
4280 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
4281 }
4282 }
4283
4284 /* Set up .got offsets for local syms, and space for local dynamic
4285 relocs. */
c72f2fb2 4286 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 4287 {
4288 bfd_signed_vma *local_got;
4289 bfd_signed_vma *end_local_got;
4290 bfd_size_type locsymcount;
4291 Elf_Internal_Shdr *symtab_hdr;
fbaf61ad
NC		 4292 asection *sgot;
4293 char *local_tls_type;
4294 unsigned long symndx;
4295 bfd_vma *local_tlsdesc_gotent;
35c08157
KLC		 4296
4297 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4298 continue;
4299
4300 for (s = ibfd->sections; s != NULL; s = s->next)
4301 {
3bf083ed 4302 struct elf_dyn_relocs *p;
35c08157 4303
3bf083ed 4304 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 4305 elf_section_data (s)->local_dynrel);
4306 p != NULL; p = p->next)
4307 {
4308 if (!bfd_is_abs_section (p->sec)
4309 && bfd_is_abs_section (p->sec->output_section))
4310 {
4311 /* Input section has been discarded, either because
4312 it is a copy of a linkonce section or due to
4313 linker script /DISCARD/, so we'll be discarding
4314 the relocs too. */
4315 }
4316 else if (p->count != 0)
4317 {
fbaf61ad
NC		 4318 asection *sreloc = elf_section_data (p->sec)->sreloc;
4319 sreloc->size += p->count * sizeof (Elf32_External_Rela);
35c08157
KLC		 4320 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4321 info->flags |= DF_TEXTREL;
4322 }
4323 }
4324 }
4325
4326 local_got = elf_local_got_refcounts (ibfd);
4327 if (!local_got)
4328 continue;
4329
4330 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4331 locsymcount = symtab_hdr->sh_info;
4332 end_local_got = local_got + locsymcount;
fbaf61ad
NC		 4333 sgot = elf_hash_table (info)->sgot;
4334 local_tls_type = elf32_nds32_local_got_tls_type (ibfd);
4335 local_tlsdesc_gotent = elf32_nds32_local_tlsdesc_gotent (ibfd);
4336 for (symndx = 0; local_got < end_local_got;
4337 ++local_got, ++local_tls_type, ++local_tlsdesc_gotent, ++symndx)
35c08157
KLC		 4338 {
4339 if (*local_got > 0)
4340 {
fbaf61ad
NC		 4341 int num_of_got_entry_needed = 0;
4342 *local_got = sgot->size;
4343 *local_tlsdesc_gotent = sgot->size;
4344
4345 /* TLS_NORMAL, and TLS_IE need one slot in .got. */
4346 if (*local_tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
4347 num_of_got_entry_needed = 1;
4348 /* TLS_GD, TLS_LD, and TLS_DESC need an 8-byte structure in the GOT. */
4349 else if (*local_tls_type & GOT_TLS_DESC)
4350 num_of_got_entry_needed = 2;
4351
4352 sgot->size += (num_of_got_entry_needed << 2);
4353
4354 /* non-relax-able TLS_DESCs need a slot in .rela.plt.
4355 others need a slot in .rela.got. */
4356 if (*local_tls_type == GOT_TLS_DESC)
4357 {
4358 if (bfd_link_pic (info))
4359 {
4360 if (htab->tls_desc_trampoline)
4361 {
4362 htab->num_tls_desc++;
4363 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
4364 htab->tls_trampoline = -1;
4365 }
4366 else
4367 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
4368 }
4369 else
4370 {
4371 /* TLS_DESC -> TLS_LE */
4372 }
4373 }
4374 else
4375 {
4376 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
4377 }
35c08157
KLC		 4378 }
4379 else
fbaf61ad
NC		 4380 {
4381 *local_got = (bfd_vma) -1;
4382 *local_tlsdesc_gotent = (bfd_vma) -1;
4383 }
35c08157
KLC		 4384 }
4385 }
4386
4387 /* Allocate global sym .plt and .got entries, and space for global
4388 sym dynamic relocs. */
4389 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4390
fbaf61ad
NC		 4391 /* For every jump slot reserved in the sgotplt, reloc_count is
4392 incremented. However, when we reserve space for TLS descriptors,
4393 it's not incremented, so in order to compute the space reserved
4394 for them, it suffices to multiply the reloc count by the jump
4395 slot size. */
4396 if (htab->tls_desc_trampoline && htab->root.srelplt)
4397 htab->sgotplt_jump_table_size = elf32_nds32_compute_jump_table_size (htab);
4398
4399 if (htab->tls_trampoline)
4400 {
4401 htab->tls_trampoline = htab->root.splt->size;
4402
4403 /* If we're not using lazy TLS relocations, don't generate the
4404 PLT and GOT entries they require. */
9bcc30e4
L		 4405 if ((info->flags & DF_BIND_NOW))
4406 htab->root.tlsdesc_plt = 0;
4407 else
fbaf61ad 4408 {
9bcc30e4 4409 htab->root.tlsdesc_got = htab->root.sgot->size;
fbaf61ad
NC		 4410 htab->root.sgot->size += 4;
4411
9bcc30e4 4412 htab->root.tlsdesc_plt = htab->root.splt->size;
fbaf61ad
NC		 4413 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
4414 }
4415 }
4416
35c08157
KLC		 4417 /* We now have determined the sizes of the various dynamic sections.
4418 Allocate memory for them. */
fbaf61ad
NC		 4419 /* The check_relocs and adjust_dynamic_symbol entry points have
4420 determined the sizes of the various dynamic sections. Allocate
4421 memory for them. */
0a1b45a2 4422 relocs = false;
35c08157
KLC		 4423 for (s = dynobj->sections; s != NULL; s = s->next)
4424 {
4425 if ((s->flags & SEC_LINKER_CREATED) == 0)
4426 continue;
4427
ce558b89 4428 if (s == htab->root.splt)
35c08157
KLC		 4429 {
4430 /* Strip this section if we don't need it; see the
4431 comment below. */
3084d7a2 4432 ;
35c08157 4433 }
fbaf61ad 4434 else if (s == elf_hash_table (info)->sgot)
35c08157
KLC		 4435 {
4436 got_size += s->size;
4437 }
fbaf61ad 4438 else if (s == elf_hash_table (info)->sgotplt)
35c08157
KLC		 4439 {
4440 got_size += s->size;
4441 }
3f3328b8 4442 else if (startswith (bfd_section_name (s), ".rela"))
35c08157 4443 {
fbaf61ad 4444 if (s->size != 0 && s != elf_hash_table (info)->srelplt)
0a1b45a2 4445 relocs = true;
35c08157
KLC		 4446
4447 /* We use the reloc_count field as a counter if we need
4448 to copy relocs into the output file. */
4449 s->reloc_count = 0;
4450 }
4451 else
4452 {
4453 /* It's not one of our sections, so don't allocate space. */
4454 continue;
4455 }
4456
4457 if (s->size == 0)
4458 {
4459 /* If we don't need this section, strip it from the
4460 output file. This is mostly to handle .rela.bss and
4461 .rela.plt. We must create both sections in
4462 create_dynamic_sections, because they must be created
4463 before the linker maps input sections to output
4464 sections. The linker does that before
4465 adjust_dynamic_symbol is called, and it is that
4466 function which decides whether anything needs to go
4467 into these sections. */
4468 s->flags |= SEC_EXCLUDE;
4469 continue;
4470 }
4471
4472 /* Allocate memory for the section contents. We use bfd_zalloc
4473 here in case unused entries are not reclaimed before the
4474 section's contents are written out. This should not happen,
4475 but this way if it does, we get a R_NDS32_NONE reloc instead
4476 of garbage. */
4477 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4478 if (s->contents == NULL)
0a1b45a2 4479 return false;
35c08157
KLC		 4480 }
4481
3084d7a2 4482 return _bfd_elf_add_dynamic_tags (output_bfd, info, relocs);
35c08157
KLC		 4483}
4484
4485static bfd_reloc_status_type
4486nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4487 bfd_vma relocation, bfd_byte *location)
4488{
4489 int size;
4490 bfd_vma x = 0;
4491 bfd_reloc_status_type flag;
4492 unsigned int rightshift = howto->rightshift;
4493 unsigned int bitpos = howto->bitpos;
4494
fde0214a 4495 if (howto->negate)
35c08157
KLC		 4496 relocation = -relocation;
4497
4498 /* Get the value we are going to relocate. */
4499 size = bfd_get_reloc_size (howto);
4500 switch (size)
4501 {
4502 default:
35c08157
KLC		 4503 abort ();
4504 break;
6346d5ca
AM		 4505 case 0:
4506 return bfd_reloc_ok;
35c08157
KLC		 4507 case 2:
4508 x = bfd_getb16 (location);
4509 break;
4510 case 4:
4511 x = bfd_getb32 (location);
4512 break;
4513 }
4514
4515 /* Check for overflow. FIXME: We may drop bits during the addition
4516 which we don't check for. We must either check at every single
4517 operation, which would be tedious, or we must do the computations
4518 in a type larger than bfd_vma, which would be inefficient. */
4519 flag = bfd_reloc_ok;
4520 if (howto->complain_on_overflow != complain_overflow_dont)
4521 {
4522 bfd_vma addrmask, fieldmask, signmask, ss;
4523 bfd_vma a, b, sum;
4524
4525 /* Get the values to be added together. For signed and unsigned
4526 relocations, we assume that all values should be truncated to
4527 the size of an address. For bitfields, all the bits matter.
4528 See also bfd_check_overflow. */
4529 fieldmask = N_ONES (howto->bitsize);
4530 signmask = ~fieldmask;
4531 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4532 a = (relocation & addrmask) >> rightshift;
4533 b = (x & howto->src_mask & addrmask) >> bitpos;
4534
4535 switch (howto->complain_on_overflow)
4536 {
4537 case complain_overflow_signed:
4538 /* If any sign bits are set, all sign bits must be set.
4539 That is, A must be a valid negative address after
4540 shifting. */
4541 signmask = ~(fieldmask >> 1);
4542 /* Fall through. */
4543
4544 case complain_overflow_bitfield:
4545 /* Much like the signed check, but for a field one bit
4546 wider. We allow a bitfield to represent numbers in the
4547 range -2**n to 2**n-1, where n is the number of bits in the
4548 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4549 can't overflow, which is exactly what we want. */
4550 ss = a & signmask;
4551 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4552 flag = bfd_reloc_overflow;
4553
4554 /* We only need this next bit of code if the sign bit of B
4555 is below the sign bit of A. This would only happen if
4556 SRC_MASK had fewer bits than BITSIZE. Note that if
4557 SRC_MASK has more bits than BITSIZE, we can get into
4558 trouble; we would need to verify that B is in range, as
4559 we do for A above. */
4560 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4561 ss >>= bitpos;
4562
4563 /* Set all the bits above the sign bit. */
4564 b = (b ^ ss) - ss;
4565
4566 /* Now we can do the addition. */
4567 sum = a + b;
4568
4569 /* See if the result has the correct sign. Bits above the
4570 sign bit are junk now; ignore them. If the sum is
4571 positive, make sure we did not have all negative inputs;
4572 if the sum is negative, make sure we did not have all
4573 positive inputs. The test below looks only at the sign
4574 bits, and it really just
4575 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4576
4577 We mask with addrmask here to explicitly allow an address
4578 wrap-around. The Linux kernel relies on it, and it is
4579 the only way to write assembler code which can run when
4580 loaded at a location 0x80000000 away from the location at
4581 which it is linked. */
4582 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4583 flag = bfd_reloc_overflow;
4584
4585 break;
4586
4587 case complain_overflow_unsigned:
4588 /* Checking for an unsigned overflow is relatively easy:
4589 trim the addresses and add, and trim the result as well.
4590 Overflow is normally indicated when the result does not
4591 fit in the field. However, we also need to consider the
4592 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4593 input is 0x80000000, and bfd_vma is only 32 bits; then we
4594 will get sum == 0, but there is an overflow, since the
4595 inputs did not fit in the field. Instead of doing a
4596 separate test, we can check for this by or-ing in the
4597 operands when testing for the sum overflowing its final
4598 field. */
4599 sum = (a + b) & addrmask;
4600 if ((a | b | sum) & signmask)
4601 flag = bfd_reloc_overflow;
4602 break;
4603
4604 default:
4605 abort ();
4606 }
4607 }
4608
4609 /* Put RELOCATION in the right bits. */
4610 relocation >>= (bfd_vma) rightshift;
4611 relocation <<= (bfd_vma) bitpos;
4612
4613 /* Add RELOCATION to the right bits of X. */
4614 /* FIXME : 090616
4615 Because the relaxation may generate duplicate relocation at one address,
4616 an addition to immediate in the instruction may cause the relocation added
4617 several times.
4618 This bug should be fixed in assembler, but a check is also needed here. */
4619 if (howto->partial_inplace)
4620 x = ((x & ~howto->dst_mask)
4621 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4622 else
4623 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4624
4625
4626 /* Put the relocated value back in the object file. */
4627 switch (size)
4628 {
4629 default:
4630 case 0:
4631 case 1:
4632 case 8:
4633 abort ();
4634 break;
4635 case 2:
4636 bfd_putb16 (x, location);
4637 break;
4638 case 4:
4639 bfd_putb32 (x, location);
4640 break;
4641 }
4642
4643 return flag;
4644}
4645
4646static bfd_reloc_status_type
4647nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4648 asection *input_section, bfd_byte *contents,
4649 bfd_vma address, bfd_vma value, bfd_vma addend)
4650{
4651 bfd_vma relocation;
4652
4653 /* Sanity check the address. */
4654 if (address > bfd_get_section_limit (input_bfd, input_section))
4655 return bfd_reloc_outofrange;
4656
4657 /* This function assumes that we are dealing with a basic relocation
4658 against a symbol. We want to compute the value of the symbol to
4659 relocate to. This is just VALUE, the value of the symbol, plus
4660 ADDEND, any addend associated with the reloc. */
4661 relocation = value + addend;
4662
4663 /* If the relocation is PC relative, we want to set RELOCATION to
4664 the distance between the symbol (currently in RELOCATION) and the
c2bf1eec 4665 location we are relocating. If pcrel_offset is FALSE we do not
35c08157
KLC		 4666 need to subtract out the offset of the location within the
4667 section (which is just ADDRESS). */
4668 if (howto->pc_relative)
4669 {
4670 relocation -= (input_section->output_section->vma
4671 + input_section->output_offset);
4672 if (howto->pcrel_offset)
4673 relocation -= address;
4674 }
4675
4676 return nds32_relocate_contents (howto, input_bfd, relocation,
4677 contents + address);
4678}
4679
37bb890f 4680static int
35c08157
KLC		 4681nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4682 const char *name,
4683 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4684 asection *input_sec,
4685 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4686{
4687 const char *source;
4688 FILE *sym_ld_script = NULL;
4689 struct elf_nds32_link_hash_table *table;
4690
4691 table = nds32_elf_hash_table (info);
4692 sym_ld_script = table->sym_ld_script;
4693 if (!sym_ld_script)
0a1b45a2 4694 return true;
35c08157
KLC		 4695
4696 if (!h || !name || *name == '\0')
0a1b45a2 4697 return true;
35c08157
KLC		 4698
4699 if (input_sec->flags & SEC_EXCLUDE)
0a1b45a2 4700 return true;
35c08157
KLC		 4701
4702 if (!check_start_export_sym)
4703 {
4704 fprintf (sym_ld_script, "SECTIONS\n{\n");
4705 check_start_export_sym = 1;
4706 }
4707
4708 if (h->root.type == bfd_link_hash_defined
4709 || h->root.type == bfd_link_hash_defweak)
4710 {
4711 if (!h->root.u.def.section->output_section)
0a1b45a2 4712 return true;
35c08157
KLC		 4713
4714 if (bfd_is_const_section (input_sec))
4715 source = input_sec->name;
4716 else
765cf5f6 4717 source = bfd_get_filename (input_sec->owner);
35c08157
KLC		 4718
4719 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4720 h->root.root.string,
4721 (long) (h->root.u.def.value
4722 + h->root.u.def.section->output_section->vma
4723 + h->root.u.def.section->output_offset), source);
4724 }
4725
0a1b45a2 4726 return true;
35c08157
KLC		 4727}
4728
4729/* Relocate an NDS32/D ELF section.
4730 There is some attempt to make this function usable for many architectures,
4731 both for RELA and REL type relocs, if only to serve as a learning tool.
4732
4733 The RELOCATE_SECTION function is called by the new ELF backend linker
4734 to handle the relocations for a section.
4735
4736 The relocs are always passed as Rela structures; if the section
4737 actually uses Rel structures, the r_addend field will always be
4738 zero.
4739
4740 This function is responsible for adjust the section contents as
4741 necessary, and (if using Rela relocs and generating a
4742 relocatable output file) adjusting the reloc addend as
4743 necessary.
4744
4745 This function does not have to worry about setting the reloc
4746 address or the reloc symbol index.
4747
4748 LOCAL_SYMS is a pointer to the swapped in local symbols.
4749
4750 LOCAL_SECTIONS is an array giving the section in the input file
4751 corresponding to the st_shndx field of each local symbol.
4752
4753 The global hash table entry for the global symbols can be found
4754 via elf_sym_hashes (input_bfd).
4755
4756 When generating relocatable output, this function must handle
4757 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4758 going to be the section symbol corresponding to the output
4759 section, which means that the addend must be adjusted
4760 accordingly. */
4761
fbaf61ad
NC		 4762/* Return the base VMA address which should be subtracted from real addresses
4763 when resolving @dtpoff relocation.
4764 This is PT_TLS segment p_vaddr. */
4765
4766/* Return the relocation value for @tpoff relocation
4767 if STT_TLS virtual address is ADDRESS. */
4768
4769/* Return the relocation value for @gottpoff relocation
4770 if STT_TLS virtual address is ADDRESS. */
4771
1c8f6a4d 4772static bfd_vma
fbaf61ad 4773gottpoff (struct bfd_link_info *info, bfd_vma address)
1c8f6a4d 4774{
fbaf61ad
NC		 4775 bfd_vma tp_base;
4776 bfd_vma tp_offset;
4777
1c8f6a4d
KLC		 4778 /* If tls_sec is NULL, we should have signalled an error already. */
4779 if (elf_hash_table (info)->tls_sec == NULL)
4780 return 0;
fbaf61ad
NC		 4781
4782 tp_base = elf_hash_table (info)->tls_sec->vma;
4783 tp_offset = address - tp_base;
4784
4785 return tp_offset;
1c8f6a4d
KLC		 4786}
4787
0a1b45a2 4788static bool
fbaf61ad
NC		 4789patch_tls_desc_to_ie (bfd_byte *contents, Elf_Internal_Rela *rel, bfd *ibfd)
4790{
4791 /* TLS_GD/TLS_LD model #1
4792 46 00 00 00 sethi $r0,#0x0
4793 58 00 00 00 ori $r0,$r0,#0x0
4794 40 00 74 00 add $r0,$r0,$gp
4795 04 10 00 00 lwi $r1,[$r0+#0x0]
4796 4b e0 04 01 jral $lp,$r1 */
4797
4798 /* TLS_GD/TLS_LD model #2
4799 46 00 00 00 sethi $r0,#0x0
4800 58 00 00 00 ori $r0,$r0,#0x0
4801 38 10 74 02 lw $r1,[$r0+($gp<<#0x0)]
4802 40 00 74 00 add $r0,$r0,$gp
4803 4b e0 04 01 jral $lp,$r1 */
4804
4805 /* TLS_IE model (non-PIC)
4806 46 00 00 00 sethi $r0,#0x0
4807 04 00 00 00 lwi $r0,[$r0+#0x0]
4808 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
4809
4810 /* TLS_IE model (PIC)
4811 46 00 00 00 sethi $r0,#0x0
4812 58 00 00 00 ori $r0,$r0,#0x0
4813 38 00 74 02 lw $r0,[$r0+($gp<<#0x0)]
4814 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
4815
4816 /* TLS_GD_TO_IE model
4817 46 00 00 00 sethi $r0,#0x0
4818 58 00 00 00 ori $r0,$r0,#0x0
4819 40 00 74 00 add $r0,$rM,$gp
4820 04 00 00 01 lwi $r0,[$r0+#0x4]
4821 40 00 64 00 add $r0,$r0,$r25 */
4822
0a1b45a2 4823 bool rz = false;
fbaf61ad
NC		 4824
4825 typedef struct
4826 {
4827 uint32_t opcode;
4828 uint32_t mask;
4829 } pat_t;
4830
4831 uint32_t patch[3] =
4832 {
4833 0x40007400, /* add $r0,$rM,$gp */
4834 0x04000001, /* lwi $r0,[$r0+#0x4] */
4835 0x40006400, /* add $r0,$r0,$r25 */
4836 };
4837
4838 pat_t mode0[3] =
4839 {
4840 { 0x40000000, 0xfe0003ff },
4841 { 0x04000000, 0xfe000000 },
4842 { 0x4be00001, 0xffff83ff },
4843 };
4844
4845 pat_t mode1[3] =
4846 {
4847 { 0x38007402, 0xfe007fff },
4848 { 0x40007400, 0xfe007fff },
4849 { 0x4be00001, 0xffff83ff },
4850 };
4851
4852 unsigned char *p = contents + rel->r_offset;
4853
4854 uint32_t insn;
4855 uint32_t regidx = 0;
4856 insn = bfd_getb32 (p);
4857 if (INSN_SETHI == (0xfe0fffffu & insn))
4858 {
4859 regidx = 0x1f & (insn >> 20);
4860 p += 4;
4861 }
4862
4863 insn = bfd_getb32 (p);
4864 if (INSN_ORI == (0xfe007fffu & insn))
4865 {
4866 regidx = 0x1f & (insn >> 20);
4867 p += 4;
4868 }
4869
4870 if (patch[2] == bfd_getb32 (p + 8)) /* Character instruction. */
4871 {
4872 /* already patched? */
4873 if ((patch[0] == (0xfff07fffu & bfd_getb32 (p + 0))) &&
4874 (patch[1] == bfd_getb32 (p + 4)))
0a1b45a2 4875 rz = true;
fbaf61ad
NC		 4876 }
4877 else if (mode0[0].opcode == (mode0[0].mask & bfd_getb32 (p + 0)))
4878 {
4879 if ((mode0[1].opcode == (mode0[1].mask & bfd_getb32 (p + 4))) &&
4880 (mode0[2].opcode == (mode0[2].mask & bfd_getb32 (p + 8))))
4881 {
4882 bfd_putb32 (patch[0] | (regidx << 15), p + 0);
4883 bfd_putb32 (patch[1], p + 4);
4884 bfd_putb32 (patch[2], p + 8);
0a1b45a2 4885 rz = true;
fbaf61ad
NC		 4886 }
4887 }
4888 else if (mode1[0].opcode == (mode1[0].mask & bfd_getb32 (p + 0)))
4889 {
4890 if ((mode1[1].opcode == (mode1[1].mask & bfd_getb32 (p + 4))) &&
4891 (mode1[2].opcode == (mode1[2].mask & bfd_getb32 (p + 8))))
4892 {
4893 bfd_putb32 (patch[0] | (regidx << 15), p + 0);
4894 bfd_putb32 (patch[1], p + 4);
4895 bfd_putb32 (patch[2], p + 8);
0a1b45a2 4896 rz = true;
fbaf61ad
NC		 4897 }
4898 }
4899
4900 if (!rz)
4901 {
765cf5f6 4902 printf ("%s: %s @ 0x%08x\n", __func__, bfd_get_filename (ibfd),
fbaf61ad
NC		 4903 (int) rel->r_offset);
4904 BFD_ASSERT(0); /* Unsupported pattern. */
4905 }
4906
4907 return rz;
4908}
4909
4910static enum elf_nds32_tls_type
4911get_tls_type (enum elf_nds32_reloc_type r_type, struct elf_link_hash_entry *h);
4912
4913static unsigned int
4914ones32 (register unsigned int x)
4915{
4916 /* 32-bit recursive reduction using SWAR...
4917 but first step is mapping 2-bit values
4918 into sum of 2 1-bit values in sneaky way. */
4919 x -= ((x >> 1) & 0x55555555);
4920 x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
4921 x = (((x >> 4) + x) & 0x0f0f0f0f);
4922 x += (x >> 8);
4923 x += (x >> 16);
4924 return (x & 0x0000003f);
4925}
4926
a767a1c4 4927#if !HAVE_FLS
fbaf61ad
NC		 4928static unsigned int
4929fls (register unsigned int x)
4930{
4931 return ffs (x & (-x));
4932}
a767a1c4 4933#endif /* !HAVE_FLS */
fbaf61ad
NC		 4934
4935#define nds32_elf_local_tlsdesc_gotent(bfd) \
4936 (elf_nds32_tdata (bfd)->local_tlsdesc_gotent)
4937
0f684201 4938static int
fbaf61ad
NC		 4939nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4940 struct bfd_link_info * info,
4941 bfd * input_bfd,
4942 asection * input_section,
4943 bfd_byte * contents,
4944 Elf_Internal_Rela * relocs,
4945 Elf_Internal_Sym * local_syms,
4946 asection ** local_sections)
4947{
4948 Elf_Internal_Shdr *symtab_hdr;
4949 struct elf_link_hash_entry **sym_hashes;
4950 Elf_Internal_Rela *rel, *relend;
0a1b45a2 4951 bool ret = true; /* Assume success. */
fbaf61ad
NC		 4952 int align = 0;
4953 bfd_reloc_status_type r;
4954 const char *errmsg = NULL;
4955 bfd_vma gp;
4956 struct elf_link_hash_table *ehtab;
4957 struct elf_nds32_link_hash_table *htab;
4958 bfd *dynobj;
4959 bfd_vma *local_got_offsets;
4960 asection *sgot, *splt, *sreloc;
4961 bfd_vma high_address;
4962 struct elf_nds32_link_hash_table *table;
4963 int eliminate_gc_relocs;
35c08157
KLC		 4964 bfd_vma fpbase_addr;
4965
4966 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4967 sym_hashes = elf_sym_hashes (input_bfd);
fbaf61ad 4968 ehtab = elf_hash_table (info);
35c08157
KLC		 4969 htab = nds32_elf_hash_table (info);
4970 high_address = bfd_get_section_limit (input_bfd, input_section);
4971
4972 dynobj = htab->root.dynobj;
4973 local_got_offsets = elf_local_got_offsets (input_bfd);
4974
fbaf61ad
NC		 4975 sgot = ehtab->sgot;
4976 splt = ehtab->splt;
35c08157
KLC		 4977 sreloc = NULL;
4978
4979 rel = relocs;
4980 relend = relocs + input_section->reloc_count;
4981
4982 table = nds32_elf_hash_table (info);
4983 eliminate_gc_relocs = table->eliminate_gc_relocs;
fbaf61ad 4984
35c08157 4985 /* By this time, we can adjust the value of _SDA_BASE_. */
fbaf61ad 4986 /* Explain _SDA_BASE_ */
0e1862bb 4987 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4988 {
4989 is_SDA_BASE_set = 1;
0a1b45a2 4990 r = nds32_elf_final_sda_base (output_bfd, info, &gp, true);
35c08157 4991 if (r != bfd_reloc_ok)
0a1b45a2 4992 return false;
35c08157
KLC		 4993 }
4994
fbaf61ad
NC		 4995 /* Do TLS model conversion once at first. */
4996 nds32_elf_unify_tls_model (input_bfd, input_section, contents, info);
4997
35c08157
KLC		 4998 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4999 the fp value is set as gp, and it has be reverted for instruction
5000 setting fp. */
5001 fpbase_addr = elf_gp (output_bfd);
5002
fbaf61ad 5003 /* Deal with (dynamic) relocations. */
35c08157
KLC		 5004 for (rel = relocs; rel < relend; rel++)
5005 {
5006 enum elf_nds32_reloc_type r_type;
5007 reloc_howto_type *howto = NULL;
5008 unsigned long r_symndx;
5009 struct elf_link_hash_entry *h = NULL;
5010 Elf_Internal_Sym *sym = NULL;
5011 asection *sec;
5012 bfd_vma relocation;
fbaf61ad
NC		 5013 bfd_vma relocation_sym = 0xdeadbeef;
5014 Elf_Internal_Rela *lorel;
5015 bfd_vma off;
35c08157
KLC		 5016
5017 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
5018 ensure it's zero (we use REL relocs, not RELA). Therefore this
5019 should be assigning zero to `addend', but for clarity we use
5020 `r_addend'. */
5021
5022 bfd_vma addend = rel->r_addend;
5023 bfd_vma offset = rel->r_offset;
5024
5025 r_type = ELF32_R_TYPE (rel->r_info);
5026 if (r_type >= R_NDS32_max)
5027 {
695344c0 5028 /* xgettext:c-format */
0aa13fee 5029 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 5030 input_bfd, r_type);
35c08157 5031 bfd_set_error (bfd_error_bad_value);
0a1b45a2 5032 ret = false;
35c08157
KLC		 5033 continue;
5034 }
5035
5036 if (r_type == R_NDS32_GNU_VTENTRY
5037 || r_type == R_NDS32_GNU_VTINHERIT
5038 || r_type == R_NDS32_NONE
5039 || r_type == R_NDS32_RELA_GNU_VTENTRY
5040 || r_type == R_NDS32_RELA_GNU_VTINHERIT
5041 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
5042 || r_type == R_NDS32_DATA
fbaf61ad 5043 || r_type == R_NDS32_TRAN)
35c08157
KLC		 5044 continue;
5045
0c4bd9d9
KLC		 5046 /* If we enter the fp-as-gp region. Resolve the address
5047 of best fp-base. */
35c08157
KLC		 5048 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
5049 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
5050 {
5051 int dist;
5052
5053 /* Distance to relocation of best fp-base is encoded in R_SYM. */
5054 dist = rel->r_addend >> 16;
5055 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
5056 local_syms, symtab_hdr);
5057 }
5058 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
5059 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
5060 {
5061 fpbase_addr = elf_gp (output_bfd);
5062 }
5063
fbaf61ad
NC		 5064 /* Skip the relocations used for relaxation. */
5065 /* We have to update LONGCALL and LONGJUMP
5066 relocations when generating the relocatable files. */
5067 if (!bfd_link_relocatable (info)
5068 && (r_type >= R_NDS32_RELAX_ENTRY
5069 || (r_type >= R_NDS32_LONGCALL4
5070 && r_type <= R_NDS32_LONGJUMP7)))
35c08157
KLC		 5071 continue;
5072
5073 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
5074 r_symndx = ELF32_R_SYM (rel->r_info);
5075
5076 /* This is a final link. */
5077 sym = NULL;
5078 sec = NULL;
5079 h = NULL;
5080
5081 if (r_symndx < symtab_hdr->sh_info)
5082 {
5083 /* Local symbol. */
5084 sym = local_syms + r_symndx;
5085 sec = local_sections[r_symndx];
5086
5087 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5088 addend = rel->r_addend;
fbaf61ad
NC		 5089
5090 /* keep symbol location for static TLS_IE GOT entry */
5091 relocation_sym = relocation;
5092 if (bfd_link_relocatable (info))
5093 {
5094 /* This is a relocatable link. We don't have to change
5095 anything, unless the reloc is against a section symbol,
5096 in which case we have to adjust according to where the
5097 section symbol winds up in the output section. */
5098 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
5099 rel->r_addend += sec->output_offset + sym->st_value;
5100
5101 continue;
5102 }
35c08157
KLC		 5103 }
5104 else
5105 {
5106 /* External symbol. */
fbaf61ad
NC		 5107 if (bfd_link_relocatable (info))
5108 continue;
0a1b45a2 5109 bool warned, ignored, unresolved_reloc;
35c08157
KLC		 5110 int symndx = r_symndx - symtab_hdr->sh_info;
5111
5112 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
5113 r_symndx, symtab_hdr, sym_hashes, h, sec,
5114 relocation, unresolved_reloc, warned,
5115 ignored);
5116
fbaf61ad
NC		 5117 /* keep symbol location for static TLS_IE GOT entry */
5118 relocation_sym = relocation;
5119
35c08157
KLC		 5120 /* la $fp, _FP_BASE_ is per-function (region).
5121 Handle it specially. */
5122 switch ((int) r_type)
5123 {
fbaf61ad
NC		 5124 case R_NDS32_HI20_RELA:
5125 case R_NDS32_LO12S0_RELA:
5126 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
5127 FP_BASE_NAME) == 0)
5128 {
5129 if (!bfd_link_pie (info))
5130 {
5131 _bfd_error_handler
5132 ("%pB: warning: _FP_BASE_ setting insns relaxation failed.",
5133 input_bfd);
5134 }
5135 relocation = fpbase_addr;
5136 }
5137 break;
35c08157
KLC		 5138 case R_NDS32_SDA19S0_RELA:
5139 case R_NDS32_SDA15S0_RELA:
5140 case R_NDS32_20_RELA:
5141 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
5142 FP_BASE_NAME) == 0)
5143 {
5144 relocation = fpbase_addr;
5145 break;
5146 }
5147 }
35c08157
KLC		 5148 }
5149
5150 /* Sanity check the address. */
5151 if (offset > high_address)
5152 {
5153 r = bfd_reloc_outofrange;
5154 goto check_reloc;
5155 }
5156
fbaf61ad 5157 if (r_type >= R_NDS32_RELAX_ENTRY)
35c08157
KLC		 5158 continue;
5159
5160 switch ((int) r_type)
5161 {
5162 case R_NDS32_GOTOFF:
5163 /* Relocation is relative to the start of the global offset
5164 table (for ld24 rx, #uimm24), e.g. access at label+addend
5165
5166 ld24 rx. #label@GOTOFF + addend
5167 sub rx, r12. */
5168 case R_NDS32_GOTOFF_HI20:
5169 case R_NDS32_GOTOFF_LO12:
5170 case R_NDS32_GOTOFF_LO15:
5171 case R_NDS32_GOTOFF_LO19:
5172 BFD_ASSERT (sgot != NULL);
5173
5174 relocation -= elf_gp (output_bfd);
5175 break;
5176
5177 case R_NDS32_9_PLTREL:
5178 case R_NDS32_25_PLTREL:
5179 /* Relocation is to the entry for this symbol in the
5180 procedure linkage table. */
5181
5182 /* The native assembler will generate a 25_PLTREL reloc
5183 for a local symbol if you assemble a call from one
5184 section to another when using -K pic. */
5185 if (h == NULL)
5186 break;
5187
5188 if (h->forced_local)
5189 break;
5190
5191 /* We didn't make a PLT entry for this symbol. This
5192 happens when statically linking PIC code, or when
5193 using -Bsymbolic. */
5194 if (h->plt.offset == (bfd_vma) - 1)
5195 break;
5196
5197 relocation = (splt->output_section->vma
5198 + splt->output_offset + h->plt.offset);
5199 break;
5200
5201 case R_NDS32_PLT_GOTREL_HI20:
5202 case R_NDS32_PLT_GOTREL_LO12:
5203 case R_NDS32_PLT_GOTREL_LO15:
5204 case R_NDS32_PLT_GOTREL_LO19:
5205 case R_NDS32_PLT_GOTREL_LO20:
fbaf61ad
NC		 5206 if (h == NULL
5207 || h->forced_local
5208 || h->plt.offset == (bfd_vma) -1
5209 || (bfd_link_pie (info) && h->def_regular))
35c08157 5210 {
fbaf61ad
NC		 5211 /* Maybe we should find better checking to optimize
5212 PIE PLT relocations. */
35c08157
KLC		 5213 /* We didn't make a PLT entry for this symbol. This
5214 happens when statically linking PIC code, or when
5215 using -Bsymbolic. */
fbaf61ad
NC		 5216 if (h)
5217 h->plt.offset = (bfd_vma) -1; /* Cancel PLT trampoline. */
35c08157
KLC		 5218 relocation -= elf_gp (output_bfd);
5219 break;
5220 }
5221
5222 relocation = (splt->output_section->vma
5223 + splt->output_offset + h->plt.offset);
5224
5225 relocation -= elf_gp (output_bfd);
5226 break;
5227
5228 case R_NDS32_PLTREL_HI20:
5229 case R_NDS32_PLTREL_LO12:
5230
5231 /* Relocation is to the entry for this symbol in the
5232 procedure linkage table. */
5233
5234 /* The native assembler will generate a 25_PLTREL reloc
5235 for a local symbol if you assemble a call from one
5236 section to another when using -K pic. */
5237 if (h == NULL)
5238 break;
5239
5240 if (h->forced_local)
5241 break;
5242
5243 if (h->plt.offset == (bfd_vma) - 1)
5244 /* We didn't make a PLT entry for this symbol. This
5245 happens when statically linking PIC code, or when
5246 using -Bsymbolic. */
5247 break;
5248
5249 if (splt == NULL)
5250 break;
5251
5252 relocation = (splt->output_section->vma
5253 + splt->output_offset
5254 + h->plt.offset + 4)
5255 - (input_section->output_section->vma
5256 + input_section->output_offset
5257 + rel->r_offset);
5258
5259 break;
5260
5261 case R_NDS32_GOTPC20:
5262 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
5263 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
5264 relocation = elf_gp (output_bfd);
5265 break;
5266
5267 case R_NDS32_GOTPC_HI20:
5268 case R_NDS32_GOTPC_LO12:
fbaf61ad
NC		 5269 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
5270 bl .+4
5271 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
5272 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
5273 or
5274 bl .+4
5275 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
5276 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) */
5277 relocation = elf_gp (output_bfd);
5278 relocation -= (input_section->output_section->vma
5279 + input_section->output_offset + rel->r_offset);
5280 break;
35c08157
KLC		 5281
5282 case R_NDS32_GOT20:
5283 /* Fall through. */
5284 case R_NDS32_GOT_HI20:
5285 case R_NDS32_GOT_LO12:
5286 case R_NDS32_GOT_LO15:
5287 case R_NDS32_GOT_LO19:
5288 /* Relocation is to the entry for this symbol in the global
5289 offset table. */
5290 BFD_ASSERT (sgot != NULL);
5291
5292 if (h != NULL)
5293 {
fbaf61ad 5294 /* External symbol */
0a1b45a2 5295 bool dyn;
35c08157
KLC		 5296
5297 off = h->got.offset;
5298 BFD_ASSERT (off != (bfd_vma) - 1);
5299 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 5300 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
5301 bfd_link_pic (info),
5302 h)
5303 || (bfd_link_pic (info)
35c08157
KLC		 5304 && (info->symbolic
5305 || h->dynindx == -1
5306 || h->forced_local) && h->def_regular))
5307 {
5308 /* This is actually a static link, or it is a
5309 -Bsymbolic link and the symbol is defined
5310 locally, or the symbol was forced to be local
5311 because of a version file. We must initialize
5312 this entry in the global offset table. Since the
5313 offset must always be a multiple of 4, we use the
5314 least significant bit to record whether we have
5315 initialized it already.
5316
5317 When doing a dynamic link, we create a .rela.got
5318 relocation entry to initialize the value. This
5319 is done in the finish_dynamic_symbol routine. */
fbaf61ad 5320 if ((off & 1) != 0) /* clear LSB */
35c08157
KLC		 5321 off &= ~1;
5322 else
5323 {
5324 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5325 h->got.offset |= 1;
5326 }
5327 }
5328 relocation = sgot->output_section->vma + sgot->output_offset + off
5329 - elf_gp (output_bfd);
5330 }
5331 else
5332 {
fbaf61ad 5333 /* Local symbol */
35c08157
KLC		 5334 bfd_byte *loc;
5335
5336 BFD_ASSERT (local_got_offsets != NULL
5337 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5338
5339 off = local_got_offsets[r_symndx];
5340
5341 /* The offset must always be a multiple of 4. We use
5342 the least significant bit to record whether we have
5343 already processed this entry. */
fbaf61ad 5344 if ((off & 1) != 0) /* clear LSB */
35c08157
KLC		 5345 off &= ~1;
5346 else
5347 {
5348 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5349
0e1862bb 5350 if (bfd_link_pic (info))
35c08157
KLC		 5351 {
5352 asection *srelgot;
5353 Elf_Internal_Rela outrel;
5354
5355 /* We need to generate a R_NDS32_RELATIVE reloc
5356 for the dynamic linker. */
fbaf61ad 5357 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
35c08157
KLC		 5358 BFD_ASSERT (srelgot != NULL);
5359
5360 outrel.r_offset = (elf_gp (output_bfd)
5361 + sgot->output_offset + off);
5362 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5363 outrel.r_addend = relocation;
5364 loc = srelgot->contents;
5365 loc +=
5366 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5367 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5368 ++srelgot->reloc_count;
5369 }
5370 local_got_offsets[r_symndx] |= 1;
5371 }
5372 relocation = sgot->output_section->vma + sgot->output_offset + off
5373 - elf_gp (output_bfd);
5374 }
5375
5376 break;
5377
5378 case R_NDS32_16_RELA:
5379 case R_NDS32_20_RELA:
5380 case R_NDS32_5_RELA:
5381 case R_NDS32_32_RELA:
5382 case R_NDS32_9_PCREL_RELA:
5383 case R_NDS32_WORD_9_PCREL_RELA:
5384 case R_NDS32_10_UPCREL_RELA:
5385 case R_NDS32_15_PCREL_RELA:
5386 case R_NDS32_17_PCREL_RELA:
5387 case R_NDS32_25_PCREL_RELA:
5388 case R_NDS32_HI20_RELA:
5389 case R_NDS32_LO12S3_RELA:
5390 case R_NDS32_LO12S2_RELA:
5391 case R_NDS32_LO12S2_DP_RELA:
5392 case R_NDS32_LO12S2_SP_RELA:
5393 case R_NDS32_LO12S1_RELA:
5394 case R_NDS32_LO12S0_RELA:
5395 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 5396 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 5397 && (input_section->flags & SEC_ALLOC) != 0
5398 && (eliminate_gc_relocs == 0
5399 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
5400 && ((r_type != R_NDS32_9_PCREL_RELA
5401 && r_type != R_NDS32_WORD_9_PCREL_RELA
5402 && r_type != R_NDS32_10_UPCREL_RELA
5403 && r_type != R_NDS32_15_PCREL_RELA
5404 && r_type != R_NDS32_17_PCREL_RELA
5405 && r_type != R_NDS32_25_PCREL_RELA
5406 && !(r_type == R_NDS32_32_RELA
5407 && strcmp (input_section->name, ".eh_frame") == 0))
5408 || (h != NULL && h->dynindx != -1
5409 && (!info->symbolic || !h->def_regular))))
5410 {
5411 Elf_Internal_Rela outrel;
0a1b45a2 5412 bool skip, relocate;
35c08157
KLC		 5413 bfd_byte *loc;
5414
5415 /* When generating a shared object, these relocations
5416 are copied into the output file to be resolved at run
5417 time. */
5418
5419 if (sreloc == NULL)
5420 {
5421 const char *name;
5422
5423 name = bfd_elf_string_from_elf_section
5424 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
5425 elf_section_data (input_section)->rela.hdr->sh_name);
5426 if (name == NULL)
0a1b45a2 5427 return false;
35c08157 5428
3f3328b8 5429 BFD_ASSERT (startswith (name, ".rela")
fd361982 5430 && strcmp (bfd_section_name (input_section),
35c08157
KLC		 5431 name + 5) == 0);
5432
5433 sreloc = bfd_get_section_by_name (dynobj, name);
5434 BFD_ASSERT (sreloc != NULL);
5435 }
5436
0a1b45a2
AM		 5437 skip = false;
5438 relocate = false;
35c08157
KLC		 5439
5440 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
5441 info,
5442 input_section,
5443 rel->r_offset);
5444 if (outrel.r_offset == (bfd_vma) - 1)
0a1b45a2 5445 skip = true;
35c08157 5446 else if (outrel.r_offset == (bfd_vma) - 2)
0a1b45a2 5447 skip = true, relocate = true;
35c08157
KLC		 5448 outrel.r_offset += (input_section->output_section->vma
5449 + input_section->output_offset);
5450
5451 if (skip)
5452 memset (&outrel, 0, sizeof outrel);
5453 else if (r_type == R_NDS32_17_PCREL_RELA
5454 || r_type == R_NDS32_15_PCREL_RELA
5455 || r_type == R_NDS32_25_PCREL_RELA)
5456 {
5457 BFD_ASSERT (h != NULL && h->dynindx != -1);
5458 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
5459 outrel.r_addend = rel->r_addend;
5460 }
5461 else
5462 {
5463 /* h->dynindx may be -1 if this symbol was marked to
5464 become local. */
5465 if (h == NULL
5466 || ((info->symbolic || h->dynindx == -1)
fbaf61ad
NC		 5467 && h->def_regular)
5468 || (bfd_link_pie (info) && h->def_regular))
35c08157 5469 {
0a1b45a2 5470 relocate = true;
35c08157
KLC		 5471 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5472 outrel.r_addend = relocation + rel->r_addend;
fbaf61ad
NC		 5473
5474 if (h)
5475 {
5476 h->plt.offset = (bfd_vma) -1; /* cancel PLT trampoline. */
5477
5478 BFD_ASSERT (sgot != NULL);
5479 /* If we did not allocate got entry for the symbol,
5480 we can not fill the nonexistent got entry. */
5481 if (h->got.offset != (bfd_vma) -1
5482 && (h->got.offset & 1) == 0)
5483 {
5484 bfd_put_32 (output_bfd, outrel.r_addend,
5485 sgot->contents + h->got.offset);
5486 }
5487 }
35c08157
KLC		 5488 }
5489 else
5490 {
fbaf61ad
NC		 5491 if (h->dynindx == -1)
5492 {
5493 _bfd_error_handler
acef8081 5494 (_("%pB: relocation %s against `%s' can not be used when "
fbaf61ad
NC		 5495 "making a shared object; recompile with -fPIC"),
5496 input_bfd, nds32_elf_howto_table[r_type].name, h->root.root.string);
5497 bfd_set_error (bfd_error_bad_value);
0a1b45a2 5498 return false;
fbaf61ad
NC		 5499 }
5500
35c08157
KLC		 5501 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
5502 outrel.r_addend = rel->r_addend;
5503 }
5504 }
5505
5506 loc = sreloc->contents;
5507 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
5508 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5509 ++sreloc->reloc_count;
5510
5511 /* If this reloc is against an external symbol, we do
5512 not want to fiddle with the addend. Otherwise, we
5513 need to include the symbol value so that it becomes
5514 an addend for the dynamic reloc. */
5515 if (!relocate)
5516 continue;
5517 }
5518 break;
5519
5520 case R_NDS32_25_ABS_RELA:
0e1862bb 5521 if (bfd_link_pic (info))
35c08157 5522 {
4eca0228 5523 _bfd_error_handler
38f14ab8
AM		 5524 (_("%pB: warning: %s unsupported in shared mode"),
5525 input_bfd, "R_NDS32_25_ABS_RELA");
0a1b45a2 5526 return false;
35c08157
KLC		 5527 }
5528 break;
5529
5530 case R_NDS32_9_PCREL:
5531 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5532 contents, offset,
5533 sec, relocation, addend);
5534 goto check_reloc;
5535
5536 case R_NDS32_HI20:
fbaf61ad
NC		 5537 /* We allow an arbitrary number of HI20 relocs before the
5538 LO12 reloc. This permits gcc to emit the HI and LO relocs
5539 itself. */
5540 for (lorel = rel + 1;
5541 (lorel < relend
5542 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5543 continue;
5544 if (lorel < relend
5545 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5546 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5547 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5548 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
35c08157 5549 {
fbaf61ad
NC		 5550 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5551 contents, relocation + addend);
5552 r = bfd_reloc_ok;
35c08157 5553 }
fbaf61ad
NC		 5554 else
5555 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5556 contents, offset, relocation,
5557 addend);
35c08157
KLC		 5558 goto check_reloc;
5559
5560 case R_NDS32_GOT17S2_RELA:
5561 case R_NDS32_GOT15S2_RELA:
fbaf61ad
NC		 5562 BFD_ASSERT (sgot != NULL);
5563
5564 if (h != NULL)
35c08157 5565 {
0a1b45a2 5566 bool dyn;
35c08157 5567
fbaf61ad
NC		 5568 off = h->got.offset;
5569 BFD_ASSERT (off != (bfd_vma) - 1);
35c08157 5570
fbaf61ad
NC		 5571 dyn = htab->root.dynamic_sections_created;
5572 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5573 (dyn, bfd_link_pic (info), h)
5574 || (bfd_link_pic (info)
5575 && (info->symbolic
5576 || h->dynindx == -1
5577 || h->forced_local)
5578 && h->def_regular))
35c08157 5579 {
fbaf61ad
NC		 5580 /* This is actually a static link, or it is a
5581 -Bsymbolic link and the symbol is defined
5582 locally, or the symbol was forced to be local
5583 because of a version file. We must initialize
5584 this entry in the global offset table. Since the
5585 offset must always be a multiple of 4, we use the
5586 least significant bit to record whether we have
5587 initialized it already.
5588
5589 When doing a dynamic link, we create a .rela.got
5590 relocation entry to initialize the value. This
5591 is done in the finish_dynamic_symbol routine. */
5592 if ((off & 1) != 0)
5593 off &= ~1;
5594 else
35c08157 5595 {
fbaf61ad
NC		 5596 bfd_put_32 (output_bfd, relocation,
5597 sgot->contents + off);
5598 h->got.offset |= 1;
35c08157
KLC		 5599 }
5600 }
fbaf61ad
NC		 5601 }
5602 else
5603 {
5604 bfd_byte *loc;
35c08157 5605
fbaf61ad
NC		 5606 BFD_ASSERT (local_got_offsets != NULL
5607 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
35c08157 5608
fbaf61ad 5609 off = local_got_offsets[r_symndx];
35c08157 5610
fbaf61ad
NC		 5611 /* The offset must always be a multiple of 4. We use
5612 the least significant bit to record whether we have
5613 already processed this entry. */
5614 if ((off & 1) != 0)
5615 off &= ~1;
5616 else
5617 {
5618 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5619
5620 if (bfd_link_pic (info))
35c08157 5621 {
fbaf61ad
NC		 5622 asection *srelgot;
5623 Elf_Internal_Rela outrel;
35c08157 5624
fbaf61ad
NC		 5625 /* We need to generate a R_NDS32_RELATIVE reloc
5626 for the dynamic linker. */
5627 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5628 BFD_ASSERT (srelgot != NULL);
5629
5630 outrel.r_offset = (elf_gp (output_bfd)
5631 + sgot->output_offset + off);
5632 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5633 outrel.r_addend = relocation;
5634 loc = srelgot->contents;
5635 loc +=
5636 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5637 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5638 ++srelgot->reloc_count;
35c08157 5639 }
fbaf61ad 5640 local_got_offsets[r_symndx] |= 1;
35c08157 5641 }
35c08157 5642 }
fbaf61ad
NC		 5643 relocation = sgot->output_section->vma + sgot->output_offset + off
5644 - elf_gp (output_bfd);
5645
35c08157
KLC		 5646 if (relocation & align)
5647 {
5648 /* Incorrect alignment. */
4eca0228 5649 _bfd_error_handler
38f14ab8 5650 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
0a1b45a2 5651 ret = false;
35c08157
KLC		 5652 r = bfd_reloc_dangerous;
5653 goto check_reloc;
5654 }
5655 break;
5656
5657 case R_NDS32_SDA16S3_RELA:
5658 case R_NDS32_SDA15S3_RELA:
5659 case R_NDS32_SDA15S3:
5660 align = 0x7;
5661 goto handle_sda;
5662
5663 case R_NDS32_SDA17S2_RELA:
5664 case R_NDS32_SDA15S2_RELA:
5665 case R_NDS32_SDA12S2_SP_RELA:
5666 case R_NDS32_SDA12S2_DP_RELA:
5667 case R_NDS32_SDA15S2:
5668 case R_NDS32_SDA_FP7U2_RELA:
5669 align = 0x3;
5670 goto handle_sda;
5671
5672 case R_NDS32_SDA18S1_RELA:
5673 case R_NDS32_SDA15S1_RELA:
5674 case R_NDS32_SDA15S1:
5675 align = 0x1;
5676 goto handle_sda;
5677
5678 case R_NDS32_SDA19S0_RELA:
5679 case R_NDS32_SDA15S0_RELA:
5680 case R_NDS32_SDA15S0:
fbaf61ad 5681 align = 0x0;
dc1e8a47 5682 handle_sda:
fbaf61ad 5683 BFD_ASSERT (sec != NULL);
35c08157 5684
fbaf61ad
NC		 5685 /* If the symbol is in the abs section, the out_bfd will be null.
5686 This happens when the relocation has a symbol@GOTOFF. */
0a1b45a2 5687 r = nds32_elf_final_sda_base (output_bfd, info, &gp, false);
fbaf61ad
NC		 5688 if (r != bfd_reloc_ok)
5689 {
5690 _bfd_error_handler
5691 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
0a1b45a2 5692 ret = false;
fbaf61ad
NC		 5693 goto check_reloc;
5694 }
35c08157 5695
fbaf61ad
NC		 5696 /* At this point `relocation' contains the object's
5697 address. */
5698 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5699 {
5700 relocation -= fpbase_addr;
5701 }
5702 else
5703 relocation -= gp;
5704 /* Now it contains the offset from _SDA_BASE_. */
35c08157 5705
fbaf61ad 5706 /* Make sure alignment is correct. */
35c08157 5707
fbaf61ad
NC		 5708 if (relocation & align)
5709 {
5710 /* Incorrect alignment. */
5711 _bfd_error_handler
5712 /* xgettext:c-format */
5713 (_("%pB(%pA): warning: unaligned small data access"
5714 " of type %d"),
5715 input_bfd, input_section, r_type);
0a1b45a2 5716 ret = false;
fbaf61ad 5717 goto check_reloc;
35c08157 5718 }
35c08157 5719 break;
fbaf61ad 5720
35c08157
KLC		 5721 case R_NDS32_17IFC_PCREL_RELA:
5722 case R_NDS32_10IFCU_PCREL_RELA:
fbaf61ad 5723 /* Do nothing. */
35c08157
KLC		 5724 break;
5725
1c8f6a4d
KLC		 5726 case R_NDS32_TLS_LE_HI20:
5727 case R_NDS32_TLS_LE_LO12:
5728 case R_NDS32_TLS_LE_20:
5729 case R_NDS32_TLS_LE_15S0:
5730 case R_NDS32_TLS_LE_15S1:
5731 case R_NDS32_TLS_LE_15S2:
fbaf61ad
NC		 5732 /* We do not have garbage collection for got entries.
5733 Therefore, IE to LE may have one empty entry, and DESC to
5734 LE may have two. */
1c8f6a4d
KLC		 5735 if (elf_hash_table (info)->tls_sec != NULL)
5736 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5737 break;
fbaf61ad 5738
1c8f6a4d
KLC		 5739 case R_NDS32_TLS_IE_HI20:
5740 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 5741 case R_NDS32_TLS_DESC_HI20:
5742 case R_NDS32_TLS_DESC_LO12:
5743 case R_NDS32_TLS_IE_LO12:
5744 case R_NDS32_TLS_IEGP_HI20:
5745 case R_NDS32_TLS_IEGP_LO12:
5746 case R_NDS32_TLS_IEGP_LO12S2:
1c8f6a4d
KLC		 5747 {
5748 /* Relocation is to the entry for this symbol in the global
5749 offset table. */
fbaf61ad 5750 enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
1c8f6a4d
KLC		 5751 asection *srelgot;
5752 Elf_Internal_Rela outrel;
1c8f6a4d
KLC		 5753 bfd_byte *loc;
5754 int indx = 0;
5755
fbaf61ad
NC		 5756 eff_tls_type = org_tls_type = get_tls_type (r_type, h);
5757
1c8f6a4d
KLC		 5758 BFD_ASSERT (sgot != NULL);
5759 if (h != NULL)
5760 {
0a1b45a2 5761 bool dyn;
1c8f6a4d
KLC		 5762
5763 off = h->got.offset;
fbaf61ad 5764 BFD_ASSERT (off != (bfd_vma) -1);
1c8f6a4d
KLC		 5765 dyn = htab->root.dynamic_sections_created;
5766 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5767 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5768 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5769 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5770 indx = h->dynindx;
5771 }
5772 else
5773 {
1c8f6a4d
KLC		 5774 BFD_ASSERT (local_got_offsets != NULL
5775 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
1c8f6a4d 5776 off = local_got_offsets[r_symndx];
1c8f6a4d
KLC		 5777 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5778 }
fbaf61ad 5779
1c8f6a4d
KLC		 5780 relocation = sgot->output_section->vma + sgot->output_offset + off;
5781
fbaf61ad
NC		 5782 if (1 < ones32 (tls_type))
5783 {
5784 eff_tls_type = 1 << (fls (tls_type) - 1);
5785 /* TLS model shall be handled in nds32_elf_unify_tls_model (). */
5786
5787 /* TLS model X -> LE is not implement yet!
5788 workaround here! */
5789 if (eff_tls_type == GOT_TLS_LE)
5790 {
5791 eff_tls_type = 1 << (fls (tls_type ^ eff_tls_type) - 1);
5792 }
5793 }
1c8f6a4d
KLC		 5794
5795 /* The offset must always be a multiple of 4. We use
5796 the least significant bit to record whether we have
5797 already processed this entry. */
0a1b45a2 5798 bool need_relocs = false;
fbaf61ad
NC		 5799 srelgot = ehtab->srelgot;
5800 if ((bfd_link_pic (info) || indx != 0)
5801 && (h == NULL || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5802 || h->root.type != bfd_link_hash_undefweak))
5803 {
0a1b45a2 5804 need_relocs = true;
fbaf61ad
NC		 5805 BFD_ASSERT (srelgot != NULL);
5806 }
5807
5808 if (off & 1)
5809 {
5810 off &= ~1;
5811 relocation &= ~1;
5812
5813 if (eff_tls_type & GOT_TLS_DESC)
5814 {
5815 relocation -= elf_gp (output_bfd);
5816 if ((R_NDS32_TLS_DESC_HI20 == r_type) && (!need_relocs))
5817 {
5818 /* TLS model shall be converted. */
5819 BFD_ASSERT(0);
5820 }
5821 }
5822 else if (eff_tls_type & GOT_TLS_IEGP)
5823 {
5824 relocation -= elf_gp (output_bfd);
5825 }
5826 }
1c8f6a4d
KLC		 5827 else
5828 {
fbaf61ad 5829 if ((eff_tls_type & GOT_TLS_LE) && (tls_type ^ eff_tls_type))
1c8f6a4d 5830 {
fbaf61ad
NC		 5831 /* TLS model workaround shall be applied. */
5832 BFD_ASSERT(0);
1c8f6a4d 5833 }
fbaf61ad 5834 else if (eff_tls_type & (GOT_TLS_IE | GOT_TLS_IEGP))
1c8f6a4d 5835 {
fbaf61ad
NC		 5836 if (eff_tls_type & GOT_TLS_IEGP)
5837 relocation -= elf_gp(output_bfd);
5838
1c8f6a4d
KLC		 5839 if (need_relocs)
5840 {
fbaf61ad
NC		 5841 if (indx == 0)
5842 outrel.r_addend = gottpoff (info, relocation_sym);
1c8f6a4d
KLC		 5843 else
5844 outrel.r_addend = 0;
5845 outrel.r_offset = (sgot->output_section->vma
fbaf61ad
NC		 5846 + sgot->output_offset + off);
5847 outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_TPOFF);
5848
5849 elf32_nds32_add_dynreloc (output_bfd, info, srelgot,
5850 &outrel);
1c8f6a4d
KLC		 5851 }
5852 else
fbaf61ad
NC		 5853 {
5854 bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
5855 sgot->contents + off);
5856 }
1c8f6a4d 5857 }
fbaf61ad
NC		 5858 else if (eff_tls_type & GOT_TLS_DESC)
5859 {
5860 relocation -= elf_gp (output_bfd);
5861 if (need_relocs)
5862 {
5863 if (indx == 0)
5864 outrel.r_addend = gottpoff (info, relocation_sym);
5865 else
5866 outrel.r_addend = 0;
5867 outrel.r_offset = (sgot->output_section->vma
5868 + sgot->output_offset + off);
5869 outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_DESC);
5870
5871 if (htab->tls_desc_trampoline)
5872 {
5873 asection *srelplt;
5874 srelplt = ehtab->srelplt;
5875 loc = srelplt->contents;
5876 loc += htab->next_tls_desc_index++ * sizeof (Elf32_External_Rela);
5877 BFD_ASSERT (loc + sizeof (Elf32_External_Rela)
5878 <= srelplt->contents + srelplt->size);
5879
5880 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5881 }
5882 else
5883 {
5884 loc = srelgot->contents;
5885 loc += srelgot->reloc_count * sizeof (Elf32_External_Rela);
5886 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5887 ++srelgot->reloc_count;
5888 }
5889 }
5890 else
5891 {
5892 /* feed me! */
5893 bfd_put_32 (output_bfd, 0xdeadbeef,
5894 sgot->contents + off);
5895 bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
5896 sgot->contents + off + 4);
5897 patch_tls_desc_to_ie (contents, rel, input_bfd);
5898 BFD_ASSERT(0);
5899 }
5900 }
5901 else
5902 {
5903 /* TLS model workaround shall be applied. */
5904 BFD_ASSERT(0);
5905 }
5906
5907 if (h != NULL)
5908 h->got.offset |= 1;
5909 else
5910 local_got_offsets[r_symndx] |= 1;
5911 }
5912 }
5913 break;
5914 /* DON'T fall through. */
5915
5916 default:
5917 /* OLD_NDS32_RELOC. */
5918
5919 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5920 contents, offset, relocation, addend);
5921 goto check_reloc;
5922 }
5923
5924 switch ((int) r_type)
5925 {
35c08157
KLC		 5926 case R_NDS32_20_RELA:
5927 case R_NDS32_5_RELA:
5928 case R_NDS32_9_PCREL_RELA:
5929 case R_NDS32_WORD_9_PCREL_RELA:
5930 case R_NDS32_10_UPCREL_RELA:
5931 case R_NDS32_15_PCREL_RELA:
5932 case R_NDS32_17_PCREL_RELA:
5933 case R_NDS32_25_PCREL_RELA:
5934 case R_NDS32_25_ABS_RELA:
5935 case R_NDS32_HI20_RELA:
5936 case R_NDS32_LO12S3_RELA:
5937 case R_NDS32_LO12S2_RELA:
5938 case R_NDS32_LO12S2_DP_RELA:
5939 case R_NDS32_LO12S2_SP_RELA:
5940 case R_NDS32_LO12S1_RELA:
5941 case R_NDS32_LO12S0_RELA:
5942 case R_NDS32_LO12S0_ORI_RELA:
5943 case R_NDS32_SDA16S3_RELA:
5944 case R_NDS32_SDA17S2_RELA:
5945 case R_NDS32_SDA18S1_RELA:
5946 case R_NDS32_SDA19S0_RELA:
5947 case R_NDS32_SDA15S3_RELA:
5948 case R_NDS32_SDA15S2_RELA:
5949 case R_NDS32_SDA12S2_DP_RELA:
5950 case R_NDS32_SDA12S2_SP_RELA:
5951 case R_NDS32_SDA15S1_RELA:
5952 case R_NDS32_SDA15S0_RELA:
5953 case R_NDS32_SDA_FP7U2_RELA:
5954 case R_NDS32_9_PLTREL:
5955 case R_NDS32_25_PLTREL:
5956 case R_NDS32_GOT20:
5957 case R_NDS32_GOT_HI20:
5958 case R_NDS32_GOT_LO12:
5959 case R_NDS32_GOT_LO15:
5960 case R_NDS32_GOT_LO19:
5961 case R_NDS32_GOT15S2_RELA:
5962 case R_NDS32_GOT17S2_RELA:
5963 case R_NDS32_GOTPC20:
5964 case R_NDS32_GOTPC_HI20:
5965 case R_NDS32_GOTPC_LO12:
5966 case R_NDS32_GOTOFF:
5967 case R_NDS32_GOTOFF_HI20:
5968 case R_NDS32_GOTOFF_LO12:
5969 case R_NDS32_GOTOFF_LO15:
5970 case R_NDS32_GOTOFF_LO19:
5971 case R_NDS32_PLTREL_HI20:
5972 case R_NDS32_PLTREL_LO12:
5973 case R_NDS32_PLT_GOTREL_HI20:
5974 case R_NDS32_PLT_GOTREL_LO12:
5975 case R_NDS32_PLT_GOTREL_LO15:
5976 case R_NDS32_PLT_GOTREL_LO19:
5977 case R_NDS32_PLT_GOTREL_LO20:
5978 case R_NDS32_17IFC_PCREL_RELA:
5979 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5980 case R_NDS32_TLS_LE_HI20:
5981 case R_NDS32_TLS_LE_LO12:
5982 case R_NDS32_TLS_IE_HI20:
5983 case R_NDS32_TLS_IE_LO12S2:
5984 case R_NDS32_TLS_LE_20:
5985 case R_NDS32_TLS_LE_15S0:
5986 case R_NDS32_TLS_LE_15S1:
5987 case R_NDS32_TLS_LE_15S2:
fbaf61ad
NC		 5988 case R_NDS32_TLS_DESC_HI20:
5989 case R_NDS32_TLS_DESC_LO12:
5990 case R_NDS32_TLS_IE_LO12:
5991 case R_NDS32_TLS_IEGP_HI20:
5992 case R_NDS32_TLS_IEGP_LO12:
5993 case R_NDS32_TLS_IEGP_LO12S2:
35c08157 5994 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5995 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5996 r = nds32_elf_final_link_relocate (howto, input_bfd,
5997 input_section, contents,
5998 rel->r_offset, relocation,
5999 rel->r_addend);
6000 break;
6001
6002 default:
6003 /* All other relocs can use default handler. */
6004 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
6005 contents, rel->r_offset,
6006 relocation, rel->r_addend);
6007 break;
6008 }
6009
dc1e8a47 6010 check_reloc:
35c08157
KLC		 6011
6012 if (r != bfd_reloc_ok)
6013 {
6014 /* FIXME: This should be generic enough to go in a utility. */
6015 const char *name;
6016
6017 if (h != NULL)
6018 name = h->root.root.string;
6019 else
6020 {
6021 name = bfd_elf_string_from_elf_section
6022 (input_bfd, symtab_hdr->sh_link, sym->st_name);
6023 if (name == NULL || *name == '\0')
fd361982 6024 name = bfd_section_name (sec);
35c08157
KLC		 6025 }
6026
6027 if (errmsg != NULL)
6028 goto common_error;
6029
6030 switch (r)
6031 {
6032 case bfd_reloc_overflow:
1a72702b
AM		 6033 (*info->callbacks->reloc_overflow)
6034 (info, (h ? &h->root : NULL), name, howto->name,
6035 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 6036 break;
6037
6038 case bfd_reloc_undefined:
1a72702b 6039 (*info->callbacks->undefined_symbol)
0a1b45a2 6040 (info, name, input_bfd, input_section, offset, true);
35c08157
KLC		 6041 break;
6042
6043 case bfd_reloc_outofrange:
6044 errmsg = _("internal error: out of range error");
6045 goto common_error;
6046
6047 case bfd_reloc_notsupported:
6048 errmsg = _("internal error: unsupported relocation error");
6049 goto common_error;
6050
6051 case bfd_reloc_dangerous:
6052 errmsg = _("internal error: dangerous error");
6053 goto common_error;
6054
6055 default:
6056 errmsg = _("internal error: unknown error");
6057 /* Fall through. */
6058
dc1e8a47 6059 common_error:
1a72702b
AM		 6060 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
6061 input_section, offset);
35c08157
KLC		 6062 break;
6063 }
6064 }
6065 }
6066
fbaf61ad
NC		 6067 /* Resotre header size to avoid overflow load. */
6068 if (elf_nds32_tdata (input_bfd)->hdr_size != 0)
6069 symtab_hdr->sh_size = elf_nds32_tdata (input_bfd)->hdr_size;
6070
35c08157
KLC		 6071 return ret;
6072}
6073
6074/* Finish up dynamic symbol handling. We set the contents of various
6075 dynamic sections here. */
6076
0a1b45a2 6077static bool
35c08157
KLC		 6078nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
6079 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
6080{
fbaf61ad
NC		 6081 struct elf_link_hash_table *ehtab;
6082 struct elf_nds32_link_hash_entry *hent;
35c08157
KLC		 6083 bfd_byte *loc;
6084
fbaf61ad
NC		 6085 ehtab = elf_hash_table (info);
6086 hent = (struct elf_nds32_link_hash_entry *) h;
35c08157
KLC		 6087
6088 if (h->plt.offset != (bfd_vma) - 1)
6089 {
6090 asection *splt;
6091 asection *sgot;
6092 asection *srela;
6093
6094 bfd_vma plt_index;
6095 bfd_vma got_offset;
6096 bfd_vma local_plt_offset;
6097 Elf_Internal_Rela rela;
6098
6099 /* This symbol has an entry in the procedure linkage table. Set
6100 it up. */
6101
6102 BFD_ASSERT (h->dynindx != -1);
6103
fbaf61ad
NC		 6104 splt = ehtab->splt;
6105 sgot = ehtab->sgotplt;
6106 srela = ehtab->srelplt;
35c08157
KLC		 6107 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
6108
6109 /* Get the index in the procedure linkage table which
6110 corresponds to this symbol. This is the index of this symbol
6111 in all the symbols for which we are making plt entries. The
6112 first entry in the procedure linkage table is reserved. */
6113 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
6114
6115 /* Get the offset into the .got table of the entry that
6116 corresponds to this function. Each .got entry is 4 bytes.
6117 The first three are reserved. */
6118 got_offset = (plt_index + 3) * 4;
6119
6120 /* Fill in the entry in the procedure linkage table. */
0e1862bb 6121 if (!bfd_link_pic (info))
35c08157
KLC		 6122 {
6123 unsigned long insn;
6124
6125 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
6126 + sgot->output_offset + got_offset) >> 12)
6127 & 0xfffff);
6128 bfd_putb32 (insn, splt->contents + h->plt.offset);
6129
6130 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
6131 + sgot->output_offset + got_offset) & 0x0fff)
6132 >> 2);
6133 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
6134
6135 insn = PLT_ENTRY_WORD2;
6136 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
6137
6138 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
6139 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
6140
6141 insn = PLT_ENTRY_WORD4
6142 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
6143 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
6144 local_plt_offset = 12;
6145 }
6146 else
6147 {
6148 /* sda_base must be set at this time. */
6149 unsigned long insn;
6150 long offset;
6151
35c08157
KLC		 6152 offset = sgot->output_section->vma + sgot->output_offset + got_offset
6153 - elf_gp (output_bfd);
6154 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
6155 bfd_putb32 (insn, splt->contents + h->plt.offset);
6156
6157 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
6158 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
6159
6160 insn = PLT_PIC_ENTRY_WORD2;
6161 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
6162
6163 insn = PLT_PIC_ENTRY_WORD3;
6164 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
6165
6166 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
6167 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
6168
6169 insn = PLT_PIC_ENTRY_WORD5
6170 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
6171 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
6172
6173 local_plt_offset = 16;
6174 }
6175
6176 /* Fill in the entry in the global offset table,
6177 so it will fall through to the next instruction for the first time. */
6178 bfd_put_32 (output_bfd,
6179 (splt->output_section->vma + splt->output_offset
6180 + h->plt.offset + local_plt_offset),
6181 sgot->contents + got_offset);
6182
6183 /* Fill in the entry in the .rela.plt section. */
6184 rela.r_offset = (sgot->output_section->vma
6185 + sgot->output_offset + got_offset);
6186 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
6187 rela.r_addend = 0;
6188 loc = srela->contents;
6189 loc += plt_index * sizeof (Elf32_External_Rela);
6190 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
6191
6192 if (!h->def_regular)
6193 {
6194 /* Mark the symbol as undefined, rather than as defined in
6195 the .plt section. Leave the value alone. */
6196 sym->st_shndx = SHN_UNDEF;
6197 if (!h->ref_regular_nonweak)
6198 sym->st_value = 0;
6199 }
6200 }
6201
fbaf61ad
NC		 6202 if (h->got.offset != (bfd_vma) - 1
6203 && hent->tls_type == GOT_NORMAL)
35c08157
KLC		 6204 {
6205 asection *sgot;
fbaf61ad 6206 asection *srelagot;
35c08157
KLC		 6207 Elf_Internal_Rela rela;
6208
6209 /* This symbol has an entry in the global offset table.
6210 Set it up. */
6211
fbaf61ad
NC		 6212 sgot = ehtab->sgot;
6213 srelagot = ehtab->srelgot;
6214 BFD_ASSERT (sgot != NULL && srelagot != NULL);
35c08157
KLC		 6215
6216 rela.r_offset = (sgot->output_section->vma
6217 + sgot->output_offset + (h->got.offset & ~1));
6218
6219 /* If this is a -Bsymbolic link, and the symbol is defined
6220 locally, we just want to emit a RELATIVE reloc. Likewise if
6221 the symbol was forced to be local because of a version file.
6222 The entry in the global offset table will already have been
6223 initialized in the relocate_section function. */
fbaf61ad
NC		 6224 if ((bfd_link_pic (info)
6225 && (info->symbolic || h->dynindx == -1 || h->forced_local)
6226 && h->def_regular)
6227 || (bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 6228 {
6229 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
6230 rela.r_addend = (h->root.u.def.value
6231 + h->root.u.def.section->output_section->vma
6232 + h->root.u.def.section->output_offset);
fbaf61ad
NC		 6233
6234 if ((h->got.offset & 1) == 0)
6235 {
6236 bfd_put_32 (output_bfd, rela.r_addend,
6237 sgot->contents + h->got.offset);
6238 }
35c08157
KLC		 6239 }
6240 else
6241 {
6242 BFD_ASSERT ((h->got.offset & 1) == 0);
6243 bfd_put_32 (output_bfd, (bfd_vma) 0,
6244 sgot->contents + h->got.offset);
6245 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
6246 rela.r_addend = 0;
6247 }
6248
fbaf61ad
NC		 6249 loc = srelagot->contents;
6250 loc += srelagot->reloc_count * sizeof (Elf32_External_Rela);
35c08157 6251 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
fbaf61ad
NC		 6252 ++srelagot->reloc_count;
6253 BFD_ASSERT (loc < (srelagot->contents + srelagot->size));
35c08157
KLC		 6254 }
6255
6256 if (h->needs_copy)
6257 {
6258 asection *s;
6259 Elf_Internal_Rela rela;
6260
6261 /* This symbols needs a copy reloc. Set it up. */
6262
6263 BFD_ASSERT (h->dynindx != -1
6264 && (h->root.type == bfd_link_hash_defined
6265 || h->root.type == bfd_link_hash_defweak));
6266
6267 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
6268 BFD_ASSERT (s != NULL);
6269
6270 rela.r_offset = (h->root.u.def.value
6271 + h->root.u.def.section->output_section->vma
6272 + h->root.u.def.section->output_offset);
6273 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
6274 rela.r_addend = 0;
6275 loc = s->contents;
6276 loc += s->reloc_count * sizeof (Elf32_External_Rela);
6277 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
6278 ++s->reloc_count;
6279 }
6280
6281 /* Mark some specially defined symbols as absolute. */
6282 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
6283 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
6284 sym->st_shndx = SHN_ABS;
6285
0a1b45a2 6286 return true;
35c08157
KLC		 6287}
6288
6289
6290/* Finish up the dynamic sections. */
6291
0a1b45a2 6292static bool
35c08157
KLC		 6293nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
6294{
35c08157
KLC		 6295 bfd *dynobj;
6296 asection *sdyn;
fbaf61ad
NC		 6297 asection *sgotplt;
6298 struct elf_link_hash_table *ehtab;
6299 struct elf_nds32_link_hash_table *htab;
35c08157 6300
fbaf61ad 6301 ehtab = elf_hash_table (info);
35c08157 6302 htab = nds32_elf_hash_table (info);
fbaf61ad 6303 if (htab == NULL)
0a1b45a2 6304 return false;
fbaf61ad
NC		 6305
6306 dynobj = elf_hash_table (info)->dynobj;
35c08157 6307
fbaf61ad
NC		 6308 sgotplt = ehtab->sgotplt;
6309 /* A broken linker script might have discarded the dynamic sections.
6310 Catch this here so that we do not seg-fault later on. */
6311 if (sgotplt != NULL && bfd_is_abs_section (sgotplt->output_section))
0a1b45a2 6312 return false;
35c08157
KLC		 6313 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
6314
fbaf61ad 6315 if (elf_hash_table (info)->dynamic_sections_created)
35c08157
KLC		 6316 {
6317 asection *splt;
6318 Elf32_External_Dyn *dyncon, *dynconend;
6319
fbaf61ad 6320 BFD_ASSERT (sgotplt != NULL && sdyn != NULL);
35c08157
KLC		 6321
6322 dyncon = (Elf32_External_Dyn *) sdyn->contents;
6323 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
6324
6325 for (; dyncon < dynconend; dyncon++)
6326 {
6327 Elf_Internal_Dyn dyn;
6328 asection *s;
6329
6330 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
6331
6332 switch (dyn.d_tag)
6333 {
6334 default:
6335 break;
6336
6337 case DT_PLTGOT:
fbaf61ad
NC		 6338 /* name = ".got"; */
6339 s = ehtab->sgot->output_section;
35c08157
KLC		 6340 goto get_vma;
6341 case DT_JMPREL:
fbaf61ad 6342 s = ehtab->srelplt->output_section;
dc1e8a47 6343 get_vma:
fbaf61ad
NC		 6344 BFD_ASSERT (s != NULL);
6345 dyn.d_un.d_ptr = s->vma;
35c08157
KLC		 6346 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6347 break;
6348
6349 case DT_PLTRELSZ:
fbaf61ad
NC		 6350 s = ehtab->srelplt->output_section;
6351 BFD_ASSERT (s != NULL);
35c08157
KLC		 6352 dyn.d_un.d_val = s->size;
6353 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6354 break;
fbaf61ad
NC		 6355
6356 case DT_RELASZ:
6357 /* My reading of the SVR4 ABI indicates that the
6358 procedure linkage table relocs (DT_JMPREL) should be
6359 included in the overall relocs (DT_RELA). This is
6360 what Solaris does. However, UnixWare can not handle
6361 that case. Therefore, we override the DT_RELASZ entry
6362 here to make it not include the JMPREL relocs. Since
6363 the linker script arranges for .rela.plt to follow all
6364 other relocation sections, we don't have to worry
6365 about changing the DT_RELA entry. */
6366 if (ehtab->srelplt != NULL)
6367 {
6368 s = ehtab->srelplt->output_section;
6369 dyn.d_un.d_val -= s->size;
6370 }
6371 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6372 break;
6373
6374 case DT_TLSDESC_PLT:
6375 s = htab->root.splt;
6376 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
9bcc30e4 6377 + htab->root.tlsdesc_plt);
fbaf61ad
NC		 6378 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6379 break;
6380
6381 case DT_TLSDESC_GOT:
6382 s = htab->root.sgot;
6383 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
9bcc30e4 6384 + htab->root.tlsdesc_got);
fbaf61ad
NC		 6385 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6386 break;
35c08157
KLC		 6387 }
6388 }
6389
6390 /* Fill in the first entry in the procedure linkage table. */
fbaf61ad 6391 splt = ehtab->splt;
35c08157
KLC		 6392 if (splt && splt->size > 0)
6393 {
0e1862bb 6394 if (bfd_link_pic (info))
35c08157
KLC		 6395 {
6396 unsigned long insn;
6397 long offset;
6398
fbaf61ad
NC		 6399 offset = sgotplt->output_section->vma + sgotplt->output_offset + 4
6400 - elf_gp (output_bfd);
35c08157
KLC		 6401 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
6402 bfd_putb32 (insn, splt->contents);
6403
35c08157
KLC		 6404 /* here has a typo? */
6405 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
6406 bfd_putb32 (insn, splt->contents + 4);
6407
6408 insn = PLT0_PIC_ENTRY_WORD2;
6409 bfd_putb32 (insn, splt->contents + 8);
6410
6411 insn = PLT0_PIC_ENTRY_WORD3;
6412 bfd_putb32 (insn, splt->contents + 12);
6413
6414 insn = PLT0_PIC_ENTRY_WORD4;
6415 bfd_putb32 (insn, splt->contents + 16);
6416
6417 insn = PLT0_PIC_ENTRY_WORD5;
6418 bfd_putb32 (insn, splt->contents + 20);
6419 }
6420 else
6421 {
6422 unsigned long insn;
6423 unsigned long addr;
6424
6425 /* addr = .got + 4 */
fbaf61ad 6426 addr = sgotplt->output_section->vma + sgotplt->output_offset + 4;
35c08157
KLC		 6427 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
6428 bfd_putb32 (insn, splt->contents);
6429
6430 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
6431 bfd_putb32 (insn, splt->contents + 4);
6432
6433 insn = PLT0_ENTRY_WORD2;
6434 bfd_putb32 (insn, splt->contents + 8);
6435
6436 insn = PLT0_ENTRY_WORD3;
6437 bfd_putb32 (insn, splt->contents + 12);
6438
6439 insn = PLT0_ENTRY_WORD4;
6440 bfd_putb32 (insn, splt->contents + 16);
6441 }
6442
6443 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
6444 PLT_ENTRY_SIZE;
6445 }
fbaf61ad 6446
9bcc30e4 6447 if (htab->root.tlsdesc_plt)
fbaf61ad
NC		 6448 {
6449 /* Calculate addresses. */
6450 asection *sgot = sgot = ehtab->sgot;
6451 bfd_vma pltgot = sgotplt->output_section->vma
6452 + sgotplt->output_offset;
6453 bfd_vma tlsdesc_got = sgot->output_section->vma + sgot->output_offset
9bcc30e4 6454 + htab->root.tlsdesc_got;
fbaf61ad
NC		 6455
6456 /* Get GP offset. */
6457 pltgot -= elf_gp (output_bfd) - 4; /* PLTGOT[1] */
6458 tlsdesc_got -= elf_gp (output_bfd);
6459
6460 /* Do relocation. */
6461 dl_tlsdesc_lazy_trampoline[0] += ((1 << 20) - 1) & (tlsdesc_got >> 12);
6462 dl_tlsdesc_lazy_trampoline[1] += 0xfff & tlsdesc_got;
6463 dl_tlsdesc_lazy_trampoline[4] += ((1 << 20) - 1) & (pltgot >> 12);
6464 dl_tlsdesc_lazy_trampoline[5] += 0xfff & pltgot;
6465
6466 /* Insert .plt. */
9bcc30e4 6467 nds32_put_trampoline (splt->contents + htab->root.tlsdesc_plt,
fbaf61ad
NC		 6468 dl_tlsdesc_lazy_trampoline,
6469 ARRAY_SIZE (dl_tlsdesc_lazy_trampoline));
6470 }
35c08157
KLC		 6471 }
6472
6473 /* Fill in the first three entries in the global offset table. */
fbaf61ad 6474 if (sgotplt && sgotplt->size > 0)
35c08157
KLC		 6475 {
6476 if (sdyn == NULL)
fbaf61ad 6477 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents);
35c08157
KLC		 6478 else
6479 bfd_put_32 (output_bfd,
6480 sdyn->output_section->vma + sdyn->output_offset,
fbaf61ad
NC		 6481 sgotplt->contents);
6482 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 4);
6483 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 8);
35c08157 6484
fbaf61ad 6485 elf_section_data (sgotplt->output_section)->this_hdr.sh_entsize = 4;
35c08157
KLC		 6486 }
6487
0a1b45a2 6488 return true;
35c08157
KLC		 6489}
6490\f
6491
6492/* Set the right machine number. */
6493
0a1b45a2 6494static bool
35c08157
KLC		 6495nds32_elf_object_p (bfd *abfd)
6496{
6497 static unsigned int cur_arch = 0;
6498
6499 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
6500 {
6501 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
6502 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
6503 }
6504
6505 switch (cur_arch)
6506 {
6507 default:
6508 case E_N1_ARCH:
6509 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
6510 break;
6511 case E_N1H_ARCH:
6512 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
6513 break;
6514 case E_NDS_ARCH_STAR_V2_0:
6515 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
6516 break;
6517 case E_NDS_ARCH_STAR_V3_0:
6518 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
6519 break;
6520 case E_NDS_ARCH_STAR_V3_M:
6521 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
6522 break;
6523 }
6524
0a1b45a2 6525 return true;
35c08157
KLC		 6526}
6527
6528/* Store the machine number in the flags field. */
6529
0a1b45a2 6530static bool
cc364be6 6531nds32_elf_final_write_processing (bfd *abfd)
35c08157
KLC		 6532{
6533 unsigned long val;
6534 static unsigned int cur_mach = 0;
6535
6536 if (bfd_mach_n1 != bfd_get_mach (abfd))
6537 {
6538 cur_mach = bfd_get_mach (abfd);
6539 }
6540
6541 switch (cur_mach)
6542 {
6543 case bfd_mach_n1:
6544 /* Only happen when object is empty, since the case is abandon. */
6545 val = E_N1_ARCH;
6546 val |= E_NDS_ABI_AABI;
6547 val |= E_NDS32_ELF_VER_1_4;
6548 break;
6549 case bfd_mach_n1h:
6550 val = E_N1H_ARCH;
6551 break;
6552 case bfd_mach_n1h_v2:
6553 val = E_NDS_ARCH_STAR_V2_0;
6554 break;
6555 case bfd_mach_n1h_v3:
6556 val = E_NDS_ARCH_STAR_V3_0;
6557 break;
6558 case bfd_mach_n1h_v3m:
6559 val = E_NDS_ARCH_STAR_V3_M;
6560 break;
6561 default:
6562 val = 0;
6563 break;
6564 }
6565
6566 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
6567 elf_elfheader (abfd)->e_flags |= val;
cc364be6 6568 return _bfd_elf_final_write_processing (abfd);
35c08157
KLC		 6569}
6570
6571/* Function to keep NDS32 specific file flags. */
6572
0a1b45a2 6573static bool
35c08157
KLC		 6574nds32_elf_set_private_flags (bfd *abfd, flagword flags)
6575{
6576 BFD_ASSERT (!elf_flags_init (abfd)
6577 || elf_elfheader (abfd)->e_flags == flags);
6578
6579 elf_elfheader (abfd)->e_flags = flags;
0a1b45a2
AM		 6580 elf_flags_init (abfd) = true;
6581 return true;
35c08157
KLC		 6582}
6583
6584static unsigned int
6585convert_e_flags (unsigned int e_flags, unsigned int arch)
6586{
6587 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
6588 {
6589 /* From 0.9 to 1.0. */
6590 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
6591
6592 /* Invert E_NDS32_HAS_NO_MAC_INST. */
6593 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
6594 if (arch == E_NDS_ARCH_STAR_V1_0)
6595 {
6596 /* Done. */
6597 return e_flags;
6598 }
6599 }
6600
6601 /* From 1.0 to 2.0. */
6602 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
6603
6604 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
6605 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
6606
6607 /* Invert E_NDS32_HAS_NO_MAC_INST. */
6608 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
6609 return e_flags;
6610}
6611
0a1b45a2 6612static bool
35c08157
KLC		 6613nds32_check_vec_size (bfd *ibfd)
6614{
6615 static unsigned int nds32_vec_size = 0;
6616
6617 asection *sec_t = NULL;
6618 bfd_byte *contents = NULL;
6619
6620 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
6621
6622 if (sec_t && sec_t->size >= 4)
6623 {
6624 /* Get vec_size in file. */
6625 unsigned int flag_t;
6626
0a1b45a2 6627 nds32_get_section_contents (ibfd, sec_t, &contents, true);
35c08157
KLC		 6628 flag_t = bfd_get_32 (ibfd, contents);
6629
6630 /* The value could only be 4 or 16. */
6631
6632 if (!nds32_vec_size)
6633 /* Set if not set yet. */
6634 nds32_vec_size = (flag_t & 0x3);
6635 else if (nds32_vec_size != (flag_t & 0x3))
6636 {
4eca0228 6637 _bfd_error_handler
695344c0 6638 /* xgettext:c-format */
871b3ab2 6639 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 6640 " with previous modules, previous %u-byte, current %u-byte"),
6641 ibfd,
6642 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
6643 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
0a1b45a2 6644 return false;
35c08157
KLC		 6645 }
6646 else
6647 /* Only keep the first vec_size section. */
6648 sec_t->flags |= SEC_EXCLUDE;
6649 }
6650
0a1b45a2 6651 return true;
35c08157
KLC		 6652}
6653
6654/* Merge backend specific data from an object file to the output
6655 object file when linking. */
6656
0a1b45a2 6657static bool
50e03d47 6658nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 6659{
50e03d47 6660 bfd *obfd = info->output_bfd;
35c08157
KLC		 6661 flagword out_flags;
6662 flagword in_flags;
6663 flagword out_16regs;
6664 flagword in_no_mac;
6665 flagword out_no_mac;
6666 flagword in_16regs;
6667 flagword out_version;
6668 flagword in_version;
6669 flagword out_fpu_config;
6670 flagword in_fpu_config;
6671
6b728d32
AM		 6672 /* FIXME: What should be checked when linking shared libraries? */
6673 if ((ibfd->flags & DYNAMIC) != 0)
0a1b45a2 6674 return true;
6b728d32 6675
35c08157
KLC		 6676 /* TODO: Revise to use object-attributes instead. */
6677 if (!nds32_check_vec_size (ibfd))
0a1b45a2 6678 return false;
35c08157
KLC		 6679
6680 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6681 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
0a1b45a2 6682 return true;
35c08157
KLC		 6683
6684 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6685 {
4eca0228 6686 _bfd_error_handler
38f14ab8 6687 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC		 6688
6689 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6690 return false;
35c08157
KLC		 6691 }
6692
fbaf61ad
NC		 6693 /* -B option in objcopy cannot work as expected. e_flags = 0 shall be
6694 treat as generic one without checking and merging. */
6695 if (elf_elfheader (ibfd)->e_flags)
35c08157 6696 {
fbaf61ad
NC		 6697 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6698 if (in_version == E_NDS32_ELF_VER_1_2)
35c08157 6699 {
fbaf61ad
NC		 6700 _bfd_error_handler
6701 (_("%pB: warning: older version of object file encountered, "
6702 "please recompile with current tool chain"), ibfd);
35c08157 6703 }
35c08157 6704
fbaf61ad
NC		 6705 /* We may need to merge V1 and V2 arch object files to V2. */
6706 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6707 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
35c08157 6708 {
fbaf61ad
NC		 6709 /* Need to convert version. */
6710 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6711 == E_NDS_ARCH_STAR_RESERVED)
6712 {
6713 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6714 }
6715 else if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6716 == E_NDS_ARCH_STAR_V3_M
6717 && (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
6718 == E_NDS_ARCH_STAR_V3_0)
6719 {
6720 elf_elfheader (ibfd)->e_flags =
6721 (elf_elfheader (ibfd)->e_flags & (~EF_NDS_ARCH))
6722 | E_NDS_ARCH_STAR_V3_0;
6723 }
6724 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
6725 == E_NDS_ARCH_STAR_V0_9
6726 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6727 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6728 {
6729 elf_elfheader (obfd)->e_flags =
6730 convert_e_flags (elf_elfheader (obfd)->e_flags,
6731 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6732 }
6733 else
6734 {
6735 elf_elfheader (ibfd)->e_flags =
6736 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6737 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6738 }
35c08157
KLC		 6739 }
6740
fbaf61ad
NC		 6741 /* Extract some flags. */
6742 in_flags = elf_elfheader (ibfd)->e_flags
6743 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6744 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6745
6746 /* The following flags need special treatment. */
6747 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6748 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6749 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6750
6751 /* Extract some flags. */
6752 out_flags = elf_elfheader (obfd)->e_flags
6753 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6754 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6755
6756 /* The following flags need special treatment. */
6757 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6758 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6759 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6760 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6761 if (!elf_flags_init (obfd))
6762 {
6763 /* If the input is the default architecture then do not
6764 bother setting the flags for the output architecture,
6765 instead allow future merges to do this. If no future
6766 merges ever set these flags then they will retain their
6767 unitialised values, which surprise surprise, correspond
6768 to the default values. */
6769 if (bfd_get_arch_info (ibfd)->the_default)
0a1b45a2 6770 return true;
fbaf61ad 6771
0a1b45a2 6772 elf_flags_init (obfd) = true;
fbaf61ad 6773 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
35c08157 6774
fbaf61ad
NC		 6775 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6776 && bfd_get_arch_info (obfd)->the_default)
6777 {
6778 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6779 bfd_get_mach (ibfd));
6780 }
35c08157 6781
0a1b45a2 6782 return true;
fbaf61ad 6783 }
35c08157 6784
fbaf61ad
NC		 6785 /* Check flag compatibility. */
6786 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
35c08157 6787 {
4eca0228 6788 _bfd_error_handler
fbaf61ad 6789 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157 6790 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6791 return false;
35c08157 6792 }
35c08157 6793
fbaf61ad
NC		 6794 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6795 {
6796 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6797 {
6798 _bfd_error_handler
6799 (_("%pB: error: instruction set mismatch with previous modules"),
6800 ibfd);
6801
6802 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6803 return false;
fbaf61ad
NC		 6804 }
6805 }
6806
6807 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6808 and perf ext1 and DIV are mergerd to perf ext1. */
6809 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6810 {
6811 elf_elfheader (obfd)->e_flags =
6812 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6813 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6814 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6815 ? E_NDS32_HAS_EXT_INST : 0)
6816 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6817 ? E_NDS32_HAS_EXT_INST : 0)
6818 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6819 | ((in_version > out_version) ? out_version : in_version);
6820 }
6821 else
6822 {
6823 if (in_version != out_version)
6824 _bfd_error_handler
6825 /* xgettext:c-format */
6826 (_("%pB: warning: incompatible elf-versions %s and %s"),
6827 ibfd, nds32_elfver_strtab[out_version],
6828 nds32_elfver_strtab[in_version]);
35c08157 6829
fbaf61ad
NC		 6830 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6831 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6832 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6833 | (in_version > out_version ? out_version : in_version);
6834 }
35c08157
KLC		 6835 }
6836
0a1b45a2 6837 return true;
35c08157
KLC		 6838}
6839
6840/* Display the flags field. */
6841
0a1b45a2 6842static bool
35c08157
KLC		 6843nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6844{
6845 FILE *file = (FILE *) ptr;
6846
6847 BFD_ASSERT (abfd != NULL && ptr != NULL);
6848
6849 _bfd_elf_print_private_bfd_data (abfd, ptr);
6850
6851 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6852
6853 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6854 {
6855 default:
6856 case E_N1_ARCH:
6857 fprintf (file, _(": n1 instructions"));
6858 break;
6859 case E_N1H_ARCH:
6860 fprintf (file, _(": n1h instructions"));
6861 break;
6862 }
6863
6864 fputc ('\n', file);
6865
0a1b45a2 6866 return true;
35c08157
KLC		 6867}
6868
6869static unsigned int
6870nds32_elf_action_discarded (asection *sec)
6871{
6872
3f3328b8 6873 if (startswith (sec->name, ".gcc_except_table"))
35c08157
KLC		 6874 return 0;
6875
6876 return _bfd_elf_default_action_discarded (sec);
6877}
6878
6879static asection *
6880nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6881 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6882 Elf_Internal_Sym *sym)
6883{
6884 if (h != NULL)
6885 switch (ELF32_R_TYPE (rel->r_info))
6886 {
6887 case R_NDS32_GNU_VTINHERIT:
6888 case R_NDS32_GNU_VTENTRY:
6889 case R_NDS32_RELA_GNU_VTINHERIT:
6890 case R_NDS32_RELA_GNU_VTENTRY:
6891 return NULL;
6892 }
6893
6894 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6895}
6896
fbaf61ad
NC		 6897static enum elf_nds32_tls_type
6898get_tls_type (enum elf_nds32_reloc_type r_type,
6899 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
6900{
6901 enum elf_nds32_tls_type tls_type;
6902
6903 switch (r_type)
6904 {
6905 case R_NDS32_TLS_LE_HI20:
6906 case R_NDS32_TLS_LE_LO12:
6907 tls_type = GOT_TLS_LE;
6908 break;
6909 case R_NDS32_TLS_IE_HI20:
6910 case R_NDS32_TLS_IE_LO12S2:
6911 case R_NDS32_TLS_IE_LO12:
6912 tls_type = GOT_TLS_IE;
6913 break;
6914 case R_NDS32_TLS_IEGP_HI20:
6915 case R_NDS32_TLS_IEGP_LO12:
6916 case R_NDS32_TLS_IEGP_LO12S2:
6917 tls_type = GOT_TLS_IEGP;
6918 break;
6919 case R_NDS32_TLS_DESC_HI20:
6920 case R_NDS32_TLS_DESC_LO12:
6921 case R_NDS32_TLS_DESC_ADD:
6922 case R_NDS32_TLS_DESC_FUNC:
6923 case R_NDS32_TLS_DESC_CALL:
6924 tls_type = GOT_TLS_DESC;
6925 break;
6926 default:
6927 tls_type = GOT_NORMAL;
6928 break;
6929 }
6930
6931 return tls_type;
6932}
6933
6934/* Ensure that we have allocated bookkeeping structures for ABFD's local
6935 symbols. */
6936
0a1b45a2 6937static bool
fbaf61ad
NC		 6938elf32_nds32_allocate_local_sym_info (bfd *abfd)
6939{
6940 if (elf_local_got_refcounts (abfd) == NULL)
6941 {
6942 bfd_size_type num_syms;
6943 bfd_size_type size;
6944 char *data;
6945
6946 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
6947 /* This space is for got_refcounts, got_tls_type, tlsdesc_gotent, and
6948 gp_offset. The details can refer to struct elf_nds32_obj_tdata. */
6949 size = num_syms * (sizeof (bfd_signed_vma) + sizeof (char)
6950 + sizeof (bfd_vma) + sizeof (int)
0a1b45a2 6951 + sizeof (bool) + sizeof (bfd_vma));
fbaf61ad
NC		 6952 data = bfd_zalloc (abfd, size);
6953 if (data == NULL)
0a1b45a2 6954 return false;
fbaf61ad
NC		 6955
6956 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
6957 data += num_syms * sizeof (bfd_signed_vma);
6958
6959 elf32_nds32_local_got_tls_type (abfd) = (char *) data;
6960 data += num_syms * sizeof (char);
6961
6962 elf32_nds32_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
6963 data += num_syms * sizeof (bfd_vma);
6964
6965 elf32_nds32_local_gp_offset (abfd) = (int *) data;
6966 data += num_syms * sizeof (int);
6967 }
6968
0a1b45a2 6969 return true;
fbaf61ad
NC		 6970}
6971
35c08157
KLC		 6972/* Look through the relocs for a section during the first phase.
6973 Since we don't do .gots or .plts, we just need to consider the
6974 virtual table relocs for gc. */
6975
0a1b45a2 6976static bool
35c08157
KLC		 6977nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6978 asection *sec, const Elf_Internal_Rela *relocs)
6979{
6980 Elf_Internal_Shdr *symtab_hdr;
6981 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6982 const Elf_Internal_Rela *rel;
6983 const Elf_Internal_Rela *rel_end;
fbaf61ad 6984 struct elf_link_hash_table *ehtab;
35c08157
KLC		 6985 struct elf_nds32_link_hash_table *htab;
6986 bfd *dynobj;
6987 asection *sreloc = NULL;
6988
fbaf61ad 6989 /* No need for relocation if relocatable already. */
0e1862bb 6990 if (bfd_link_relocatable (info))
fbaf61ad
NC		 6991 {
6992 elf32_nds32_check_relax_group (abfd, sec);
0a1b45a2 6993 return true;
fbaf61ad 6994 }
35c08157
KLC		 6995
6996 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6997 sym_hashes = elf_sym_hashes (abfd);
6998 sym_hashes_end =
6999 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
7000 if (!elf_bad_symtab (abfd))
7001 sym_hashes_end -= symtab_hdr->sh_info;
7002
fbaf61ad 7003 ehtab = elf_hash_table (info);
35c08157
KLC		 7004 htab = nds32_elf_hash_table (info);
7005 dynobj = htab->root.dynobj;
7006
7007 rel_end = relocs + sec->reloc_count;
7008 for (rel = relocs; rel < rel_end; rel++)
7009 {
7010 enum elf_nds32_reloc_type r_type;
7011 struct elf_link_hash_entry *h;
7012 unsigned long r_symndx;
fbaf61ad 7013 enum elf_nds32_tls_type tls_type, old_tls_type;
35c08157
KLC		 7014
7015 r_symndx = ELF32_R_SYM (rel->r_info);
7016 r_type = ELF32_R_TYPE (rel->r_info);
7017 if (r_symndx < symtab_hdr->sh_info)
7018 h = NULL;
7019 else
7020 {
7021 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7022 while (h->root.type == bfd_link_hash_indirect
7023 || h->root.type == bfd_link_hash_warning)
7024 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7025 }
7026
fbaf61ad
NC		 7027 /* Create .got section if necessary.
7028 Some relocs require a global offset table. We create
7029 got section here, since these relocation need a got section
7030 and if it is not created yet. */
7031 if (ehtab->sgot == NULL)
35c08157
KLC		 7032 {
7033 switch (r_type)
7034 {
7035 case R_NDS32_GOT_HI20:
7036 case R_NDS32_GOT_LO12:
7037 case R_NDS32_GOT_LO15:
7038 case R_NDS32_GOT_LO19:
7039 case R_NDS32_GOT17S2_RELA:
7040 case R_NDS32_GOT15S2_RELA:
7041 case R_NDS32_GOTOFF:
7042 case R_NDS32_GOTOFF_HI20:
7043 case R_NDS32_GOTOFF_LO12:
7044 case R_NDS32_GOTOFF_LO15:
7045 case R_NDS32_GOTOFF_LO19:
7046 case R_NDS32_GOTPC20:
7047 case R_NDS32_GOTPC_HI20:
7048 case R_NDS32_GOTPC_LO12:
7049 case R_NDS32_GOT20:
1c8f6a4d 7050 case R_NDS32_TLS_IE_HI20:
fbaf61ad 7051 case R_NDS32_TLS_IE_LO12:
1c8f6a4d 7052 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 7053 case R_NDS32_TLS_IEGP_HI20:
7054 case R_NDS32_TLS_IEGP_LO12:
7055 case R_NDS32_TLS_IEGP_LO12S2:
7056 case R_NDS32_TLS_DESC_HI20:
7057 case R_NDS32_TLS_DESC_LO12:
35c08157
KLC		 7058 if (dynobj == NULL)
7059 htab->root.dynobj = dynobj = abfd;
fbaf61ad 7060 if (!create_got_section (dynobj, info))
0a1b45a2 7061 return false;
35c08157
KLC		 7062 break;
7063
7064 default:
7065 break;
7066 }
7067 }
7068
fbaf61ad 7069 /* Check relocation type. */
35c08157
KLC		 7070 switch ((int) r_type)
7071 {
7072 case R_NDS32_GOT_HI20:
7073 case R_NDS32_GOT_LO12:
7074 case R_NDS32_GOT_LO15:
7075 case R_NDS32_GOT_LO19:
7076 case R_NDS32_GOT20:
fbaf61ad
NC		 7077 case R_NDS32_TLS_LE_HI20:
7078 case R_NDS32_TLS_LE_LO12:
1c8f6a4d 7079 case R_NDS32_TLS_IE_HI20:
fbaf61ad 7080 case R_NDS32_TLS_IE_LO12:
1c8f6a4d 7081 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 7082 case R_NDS32_TLS_IEGP_HI20:
7083 case R_NDS32_TLS_IEGP_LO12:
7084 case R_NDS32_TLS_IEGP_LO12S2:
7085 case R_NDS32_TLS_DESC_HI20:
7086 case R_NDS32_TLS_DESC_LO12:
7087 tls_type = get_tls_type (r_type, h);
7088 if (h)
1c8f6a4d 7089 {
fbaf61ad
NC		 7090 if (tls_type != GOT_TLS_LE)
7091 h->got.refcount += 1;
1c8f6a4d 7092 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
1c8f6a4d 7093 }
35c08157
KLC		 7094 else
7095 {
fbaf61ad
NC		 7096 /* This is a global offset table entry for a local symbol. */
7097 if (!elf32_nds32_allocate_local_sym_info (abfd))
0a1b45a2 7098 return false;
35c08157 7099
fbaf61ad
NC		 7100 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
7101 if (tls_type != GOT_TLS_LE)
7102 elf_local_got_refcounts (abfd)[r_symndx] += 1;
1c8f6a4d 7103 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 7104 }
35c08157 7105
fbaf61ad 7106 /* We would already have issued an error message if there
1c8f6a4d
KLC		 7107 is a TLS/non-TLS mismatch, based on the symbol
7108 type. So just combine any TLS types needed. */
7109 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7110 && tls_type != GOT_NORMAL)
7111 tls_type |= old_tls_type;
7112
fbaf61ad
NC		 7113 /* DESC to IE/IEGP if link to executable. */
7114 if ((tls_type & (GOT_TLS_DESC | GOT_TLS_IEGP))
7115 && (bfd_link_executable (info)))
7116 tls_type |= (bfd_link_pie (info) ? GOT_TLS_IEGP : GOT_TLS_IE);
7117
1c8f6a4d
KLC		 7118 if (old_tls_type != tls_type)
7119 {
7120 if (h != NULL)
7121 elf32_nds32_hash_entry (h)->tls_type = tls_type;
7122 else
7123 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
7124 }
7125 break;
7126 case R_NDS32_9_PLTREL:
35c08157
KLC		 7127 case R_NDS32_25_PLTREL:
7128 case R_NDS32_PLTREL_HI20:
7129 case R_NDS32_PLTREL_LO12:
7130 case R_NDS32_PLT_GOTREL_HI20:
7131 case R_NDS32_PLT_GOTREL_LO12:
7132 case R_NDS32_PLT_GOTREL_LO15:
7133 case R_NDS32_PLT_GOTREL_LO19:
7134 case R_NDS32_PLT_GOTREL_LO20:
7135
7136 /* This symbol requires a procedure linkage table entry. We
7137 actually build the entry in adjust_dynamic_symbol,
7138 because this might be a case of linking PIC code without
7139 linking in any dynamic objects, in which case we don't
7140 need to generate a procedure linkage table after all. */
7141
7142 /* If this is a local symbol, we resolve it directly without
7143 creating a procedure linkage table entry. */
7144 if (h == NULL)
7145 continue;
7146
fbaf61ad
NC		 7147 if (h->forced_local
7148 || (bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 7149 break;
7150
1c8f6a4d 7151 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 7152 h->needs_plt = 1;
7153 h->plt.refcount += 1;
7154 break;
7155
7156 case R_NDS32_16_RELA:
7157 case R_NDS32_20_RELA:
7158 case R_NDS32_5_RELA:
7159 case R_NDS32_32_RELA:
7160 case R_NDS32_HI20_RELA:
7161 case R_NDS32_LO12S3_RELA:
7162 case R_NDS32_LO12S2_RELA:
7163 case R_NDS32_LO12S2_DP_RELA:
7164 case R_NDS32_LO12S2_SP_RELA:
7165 case R_NDS32_LO12S1_RELA:
7166 case R_NDS32_LO12S0_RELA:
7167 case R_NDS32_LO12S0_ORI_RELA:
7168 case R_NDS32_SDA16S3_RELA:
7169 case R_NDS32_SDA17S2_RELA:
7170 case R_NDS32_SDA18S1_RELA:
7171 case R_NDS32_SDA19S0_RELA:
7172 case R_NDS32_SDA15S3_RELA:
7173 case R_NDS32_SDA15S2_RELA:
7174 case R_NDS32_SDA12S2_DP_RELA:
7175 case R_NDS32_SDA12S2_SP_RELA:
7176 case R_NDS32_SDA15S1_RELA:
7177 case R_NDS32_SDA15S0_RELA:
7178 case R_NDS32_SDA_FP7U2_RELA:
7179 case R_NDS32_15_PCREL_RELA:
7180 case R_NDS32_17_PCREL_RELA:
7181 case R_NDS32_25_PCREL_RELA:
7182
0e1862bb 7183 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 7184 {
7185 h->non_got_ref = 1;
7186 h->plt.refcount += 1;
7187 }
7188
7189 /* If we are creating a shared library, and this is a reloc against
7190 a global symbol, or a non PC relative reloc against a local
7191 symbol, then we need to copy the reloc into the shared library.
7192 However, if we are linking with -Bsymbolic, we do not need to
7193 copy a reloc against a global symbol which is defined in an
7194 object we are including in the link (i.e., DEF_REGULAR is set).
7195 At this point we have not seen all the input files, so it is
7196 possible that DEF_REGULAR is not set now but will be set later
7197 (it is never cleared). We account for that possibility below by
7198 storing information in the dyn_relocs field of the hash table
7199 entry. A similar situation occurs when creating shared libraries
7200 and symbol visibility changes render the symbol local.
7201
7202 If on the other hand, we are creating an executable, we may need
7203 to keep relocations for symbols satisfied by a dynamic library
7204 if we manage to avoid copy relocs for the symbol. */
0e1862bb 7205 if ((bfd_link_pic (info)
35c08157
KLC		 7206 && (sec->flags & SEC_ALLOC) != 0
7207 && ((r_type != R_NDS32_25_PCREL_RELA
7208 && r_type != R_NDS32_15_PCREL_RELA
7209 && r_type != R_NDS32_17_PCREL_RELA
7210 && !(r_type == R_NDS32_32_RELA
7211 && strcmp (sec->name, ".eh_frame") == 0))
7212 || (h != NULL
7213 && (!info->symbolic
7214 || h->root.type == bfd_link_hash_defweak
7215 || !h->def_regular))))
0e1862bb 7216 || (!bfd_link_pic (info)
35c08157
KLC		 7217 && (sec->flags & SEC_ALLOC) != 0
7218 && h != NULL
7219 && (h->root.type == bfd_link_hash_defweak
7220 || !h->def_regular)))
7221 {
3bf083ed
AM		 7222 struct elf_dyn_relocs *p;
7223 struct elf_dyn_relocs **head;
35c08157
KLC		 7224
7225 if (dynobj == NULL)
7226 htab->root.dynobj = dynobj = abfd;
7227
7228 /* When creating a shared object, we must copy these
7229 relocs into the output file. We create a reloc
7230 section in dynobj and make room for the reloc. */
7231 if (sreloc == NULL)
7232 {
7233 const char *name;
7234
7235 name = bfd_elf_string_from_elf_section
7236 (abfd, elf_elfheader (abfd)->e_shstrndx,
7237 elf_section_data (sec)->rela.hdr->sh_name);
7238 if (name == NULL)
0a1b45a2 7239 return false;
35c08157 7240
3f3328b8 7241 BFD_ASSERT (startswith (name, ".rela")
fd361982 7242 && strcmp (bfd_section_name (sec),
35c08157
KLC		 7243 name + 5) == 0);
7244
7245 sreloc = bfd_get_section_by_name (dynobj, name);
7246 if (sreloc == NULL)
7247 {
7248 flagword flags;
7249
7250 sreloc = bfd_make_section (dynobj, name);
7251 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7252 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
7253 if ((sec->flags & SEC_ALLOC) != 0)
7254 flags |= SEC_ALLOC | SEC_LOAD;
7255 if (sreloc == NULL
fd361982
AM		 7256 || !bfd_set_section_flags (sreloc, flags)
7257 || !bfd_set_section_alignment (sreloc, 2))
0a1b45a2 7258 return false;
35c08157
KLC		 7259
7260 elf_section_type (sreloc) = SHT_RELA;
7261 }
7262 elf_section_data (sec)->sreloc = sreloc;
7263 }
7264
7265 /* If this is a global symbol, we count the number of
7266 relocations we need for this symbol. */
7267 if (h != NULL)
190eb1dd 7268 head = &h->dyn_relocs;
35c08157
KLC		 7269 else
7270 {
7271 asection *s;
61034b0b 7272 void *vpp;
35c08157
KLC		 7273
7274 Elf_Internal_Sym *isym;
f1dfbfdb
L		 7275 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
7276 abfd, r_symndx);
35c08157 7277 if (isym == NULL)
0a1b45a2 7278 return false;
35c08157
KLC		 7279
7280 /* Track dynamic relocs needed for local syms too. */
7281 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
7282 if (s == NULL)
0a1b45a2 7283 return false;
35c08157 7284
61034b0b 7285 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 7286 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 7287 }
7288
7289 p = *head;
7290 if (p == NULL || p->sec != sec)
7291 {
986f0783 7292 size_t amt = sizeof (*p);
3bf083ed 7293 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157 7294 if (p == NULL)
0a1b45a2 7295 return false;
35c08157
KLC		 7296 p->next = *head;
7297 *head = p;
7298 p->sec = sec;
7299 p->count = 0;
7300 p->pc_count = 0;
7301 }
7302
7303 p->count += 1;
fbaf61ad
NC		 7304
7305 /* Since eh_frame is readonly, R_NDS32_32_RELA
7306 reloc for eh_frame will cause shared library has
7307 TEXTREL entry in the dynamic section. This lead glibc
7308 testsuites to failure (bug-13092) and cause kernel fail
7309 (bug-11819). I think the best solution is to replace
7310 absolute reloc with pc relative reloc in the eh_frame.
7311 To do that, we need to support the following issues:
7312
7313 === For GCC ===
7314 * gcc/config/nds32/nds32.h: Define
7315 ASM_PREFERRED_EH_DATA_FORMAT to encode DW_EH_PE_pcrel
7316 and DW_EH_PE_sdata4 into DWARF exception header when
7317 option have '-fpic'.
7318
7319 === For binutils ===
7320 * bfd/: Define new reloc R_NDS32_32_PCREL_RELA.
7321 * gas/config/tc-nds32.h: Define DIFF_EXPR_OK. This
7322 may break our nds DIFF mechanism, therefore, we
7323 must disable all linker relaxations to ensure
7324 correctness.
7325 * gas/config/tc-nds32.c (nds32_apply_fix): Replace
7326 R_NDS32_32_RELA with R_NDS32_32_PCREL_RELA, and
7327 do the necessary modification.
7328
7329 Unfortunately, it still have some problems for nds32
7330 to support pc relative reloc in the eh_frame. So I use
7331 another solution to fix this issue.
7332
7333 However, I find that ld always emit TEXTREL marker for
7334 R_NDS32_NONE relocs in rel.dyn. These none relocs are
7335 correspond to R_NDS32_32_RELA for .eh_frame section.
7336 It means that we always reserve redundant entries of rel.dyn
7337 for these relocs which actually do nothing in dynamic linker.
7338
7339 Therefore, we regard these relocs as pc relative relocs
7340 here and increase the pc_count. */
35c08157
KLC		 7341 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
7342 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
fbaf61ad
NC		 7343 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
7344 || (r_type == R_NDS32_32_RELA
7345 && strcmp (sec->name, ".eh_frame") == 0))
35c08157
KLC		 7346 p->pc_count += 1;
7347 }
7348 break;
7349
7350 /* This relocation describes the C++ object vtable hierarchy.
7351 Reconstruct it for later use during GC. */
7352 case R_NDS32_RELA_GNU_VTINHERIT:
7353 case R_NDS32_GNU_VTINHERIT:
7354 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
0a1b45a2 7355 return false;
35c08157
KLC		 7356 break;
7357
7358 /* This relocation describes which C++ vtable entries are actually
7359 used. Record for later use during GC. */
7360 case R_NDS32_GNU_VTENTRY:
7361 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
0a1b45a2 7362 return false;
35c08157
KLC		 7363 break;
7364 case R_NDS32_RELA_GNU_VTENTRY:
7365 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
0a1b45a2 7366 return false;
35c08157
KLC		 7367 break;
7368 }
7369 }
7370
0a1b45a2 7371 return true;
35c08157
KLC		 7372}
7373
7374/* Write VAL in uleb128 format to P, returning a pointer to the
7375 following byte.
7376 This code is copied from elf-attr.c. */
7377
7378static bfd_byte *
7379write_uleb128 (bfd_byte *p, unsigned int val)
7380{
7381 bfd_byte c;
7382 do
7383 {
7384 c = val & 0x7f;
7385 val >>= 7;
7386 if (val)
7387 c |= 0x80;
7388 *(p++) = c;
7389 }
7390 while (val);
7391 return p;
7392}
7393
7394static bfd_signed_vma
7395calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
fbaf61ad 7396 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
35c08157
KLC		 7397{
7398 bfd_signed_vma foff;
7399 bfd_vma symval, addend;
7400 asection *sym_sec;
7401
7402 /* Get the value of the symbol referred to by the reloc. */
7403 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7404 {
7405 Elf_Internal_Sym *isym;
7406
7407 /* A local symbol. */
7408 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7409
7410 if (isym->st_shndx == SHN_UNDEF)
7411 sym_sec = bfd_und_section_ptr;
7412 else if (isym->st_shndx == SHN_ABS)
7413 sym_sec = bfd_abs_section_ptr;
7414 else if (isym->st_shndx == SHN_COMMON)
7415 sym_sec = bfd_com_section_ptr;
7416 else
7417 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7418 symval = isym->st_value + sym_sec->output_section->vma
7419 + sym_sec->output_offset;
7420 }
7421 else
7422 {
7423 unsigned long indx;
7424 struct elf_link_hash_entry *h;
35c08157
KLC		 7425
7426 /* An external symbol. */
7427 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7428 h = elf_sym_hashes (abfd)[indx];
7429 BFD_ASSERT (h != NULL);
7430
7431 if (h->root.type != bfd_link_hash_defined
7432 && h->root.type != bfd_link_hash_defweak)
7433 /* This appears to be a reference to an undefined
7434 symbol. Just ignore it--it will be caught by the
7435 regular reloc processing. */
7436 return 0;
35c08157
KLC		 7437
7438 if (h->root.u.def.section->flags & SEC_MERGE)
7439 {
7440 sym_sec = h->root.u.def.section;
7441 symval = _bfd_merged_section_offset (abfd, &sym_sec,
7442 elf_section_data (sym_sec)->sec_info,
7443 h->root.u.def.value);
7444 symval = symval + sym_sec->output_section->vma
7445 + sym_sec->output_offset;
7446 }
7447 else
7448 symval = (h->root.u.def.value
7449 + h->root.u.def.section->output_section->vma
7450 + h->root.u.def.section->output_offset);
7451 }
7452
7453 addend = irel->r_addend;
7454
7455 foff = (symval + addend
7456 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
7457 return foff;
7458}
35c08157 7459\f
fbaf61ad 7460
35c08157
KLC		 7461/* Convert a 32-bit instruction to 16-bit one.
7462 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
7463 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
7464 type of INSN16. Return 1 if successful. */
7465
7466static int
7467nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7468 int *pinsn_type)
7469{
7470 uint16_t insn16 = 0;
6cae483a 7471 int insn_type = 0;
35c08157
KLC		 7472 unsigned long mach = bfd_get_mach (abfd);
7473
7474 if (N32_SH5 (insn) != 0)
7475 return 0;
7476
7477 switch (N32_SUB5 (insn))
7478 {
7479 case N32_ALU1_ADD_SLLI:
7480 case N32_ALU1_ADD_SRLI:
7481 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
7482 {
7483 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
7484 N32_RB5 (insn));
7485 insn_type = NDS32_INSN_ADD333;
7486 }
7487 else if (N32_IS_RT4 (insn))
7488 {
7489 if (N32_RT5 (insn) == N32_RA5 (insn))
7490 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
7491 else if (N32_RT5 (insn) == N32_RB5 (insn))
7492 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
7493 insn_type = NDS32_INSN_ADD45;
7494 }
7495 break;
7496
7497 case N32_ALU1_SUB_SLLI:
7498 case N32_ALU1_SUB_SRLI:
7499 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
7500 {
7501 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
7502 N32_RB5 (insn));
7503 insn_type = NDS32_INSN_SUB333;
7504 }
7505 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7506 {
7507 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
7508 insn_type = NDS32_INSN_SUB45;
7509 }
7510 break;
7511
7512 case N32_ALU1_AND_SLLI:
7513 case N32_ALU1_AND_SRLI:
7514 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
7515 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7516 && N32_IS_RB3 (insn))
7517 {
7518 if (N32_RT5 (insn) == N32_RA5 (insn))
7519 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
7520 else if (N32_RT5 (insn) == N32_RB5 (insn))
7521 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
7522 if (insn16)
7523 insn_type = NDS32_INSN_AND33;
7524 }
7525 break;
7526
7527 case N32_ALU1_XOR_SLLI:
7528 case N32_ALU1_XOR_SRLI:
7529 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
7530 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7531 && N32_IS_RB3 (insn))
7532 {
7533 if (N32_RT5 (insn) == N32_RA5 (insn))
7534 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
7535 else if (N32_RT5 (insn) == N32_RB5 (insn))
7536 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
7537 if (insn16)
7538 insn_type = NDS32_INSN_XOR33;
7539 }
7540 break;
7541
7542 case N32_ALU1_OR_SLLI:
7543 case N32_ALU1_OR_SRLI:
7544 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
7545 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7546 && N32_IS_RB3 (insn))
7547 {
7548 if (N32_RT5 (insn) == N32_RA5 (insn))
7549 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
7550 else if (N32_RT5 (insn) == N32_RB5 (insn))
7551 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
7552 if (insn16)
7553 insn_type = NDS32_INSN_OR33;
7554 }
7555 break;
7556 case N32_ALU1_NOR:
7557 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
7558 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
7559 && N32_RA5 (insn) == N32_RB5 (insn))
7560 {
7561 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
7562 insn_type = NDS32_INSN_NOT33;
7563 }
7564 break;
7565 case N32_ALU1_SRAI:
7566 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7567 {
7568 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
7569 insn_type = NDS32_INSN_SRAI45;
7570 }
7571 break;
7572
7573 case N32_ALU1_SRLI:
7574 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7575 {
7576 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
7577 insn_type = NDS32_INSN_SRLI45;
7578 }
7579 break;
7580
7581 case N32_ALU1_SLLI:
7582 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
7583 {
7584 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
7585 N32_UB5 (insn));
7586 insn_type = NDS32_INSN_SLLI333;
7587 }
7588 break;
7589
7590 case N32_ALU1_ZEH:
7591 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7592 {
7593 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
7594 insn_type = NDS32_INSN_ZEH33;
7595 }
7596 break;
7597
7598 case N32_ALU1_SEB:
7599 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7600 {
7601 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7602 insn_type = NDS32_INSN_SEB33;
7603 }
7604 break;
7605
7606 case N32_ALU1_SEH:
7607 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7608 {
7609 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7610 insn_type = NDS32_INSN_SEH33;
7611 }
7612 break;
7613
7614 case N32_ALU1_SLT:
7615 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7616 {
7617 /* Implicit r15. */
7618 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7619 insn_type = NDS32_INSN_SLT45;
7620 }
7621 break;
7622
7623 case N32_ALU1_SLTS:
7624 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7625 {
7626 /* Implicit r15. */
7627 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7628 insn_type = NDS32_INSN_SLTS45;
7629 }
7630 break;
7631 }
7632
7633 if ((insn16 & 0x8000) == 0)
7634 return 0;
7635
7636 if (pinsn16)
7637 *pinsn16 = insn16;
7638 if (pinsn_type)
7639 *pinsn_type = insn_type;
7640 return 1;
7641}
7642
7643static int
7644nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7645 int *pinsn_type)
7646{
7647 uint16_t insn16 = 0;
7648 int insn_type;
7649 unsigned long mach = bfd_get_mach (abfd);
7650
7651 /* TODO: bset, bclr, btgl, btst. */
7652 if (__GF (insn, 6, 4) != 0)
7653 return 0;
7654
7655 switch (N32_IMMU (insn, 6))
7656 {
7657 case N32_ALU2_MUL:
7658 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7659 && N32_IS_RB3 (insn))
7660 {
7661 if (N32_RT5 (insn) == N32_RA5 (insn))
7662 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7663 else if (N32_RT5 (insn) == N32_RB5 (insn))
7664 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7665 if (insn16)
7666 insn_type = NDS32_INSN_MUL33;
7667 }
7668 }
7669
7670 if ((insn16 & 0x8000) == 0)
7671 return 0;
7672
7673 if (pinsn16)
7674 *pinsn16 = insn16;
7675 if (pinsn_type)
7676 *pinsn_type = insn_type;
7677 return 1;
7678}
7679
7680int
7681nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7682 int *pinsn_type)
7683{
7684 int op6;
7685 uint16_t insn16 = 0;
1624c9ca 7686 int insn_type = 0;
35c08157
KLC		 7687 unsigned long mach = bfd_get_mach (abfd);
7688
7689 /* Decode 32-bit instruction. */
7690 if (insn & 0x80000000)
7691 {
7692 /* Not 32-bit insn. */
7693 return 0;
7694 }
7695
7696 op6 = N32_OP6 (insn);
7697
7698 /* Convert it to 16-bit instruction. */
7699 switch (op6)
7700 {
7701 case N32_OP6_MOVI:
7702 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7703 {
7704 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7705 insn_type = NDS32_INSN_MOVI55;
7706 }
7707 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7708 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7709 {
7710 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7711 N32_IMM20S (insn) - 16);
7712 insn_type = NDS32_INSN_MOVPI45;
7713 }
7714 break;
7715
7716 case N32_OP6_ADDI:
7717 if (N32_IMM15S (insn) == 0)
7718 {
7719 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7720 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7721 if (mach <= MACH_V2
7722 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7723 {
7724 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7725 insn_type = NDS32_INSN_MOV55;
7726 }
7727 }
7728 else if (N32_IMM15S (insn) > 0)
7729 {
7730 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7731 {
7732 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7733 N32_IMM15S (insn));
7734 insn_type = NDS32_INSN_ADDI333;
7735 }
7736 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7737 && N32_IMM15S (insn) < 32)
7738 {
7739 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7740 insn_type = NDS32_INSN_ADDI45;
7741 }
7742 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7743 && N32_RT5 (insn) == N32_RA5 (insn)
7744 && N32_IMM15S (insn) < 512)
7745 {
7746 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7747 insn_type = NDS32_INSN_ADDI10_SP;
7748 }
7749 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7750 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7751 && (N32_IMM15S (insn) % 4 == 0))
7752 {
7753 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7754 N32_IMM15S (insn) >> 2);
7755 insn_type = NDS32_INSN_ADDRI36_SP;
7756 }
7757 }
7758 else
7759 {
7760 /* Less than 0. */
7761 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7762 {
7763 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7764 0 - N32_IMM15S (insn));
7765 insn_type = NDS32_INSN_SUBI333;
7766 }
7767 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7768 && N32_IMM15S (insn) > -32)
7769 {
1c8f6a4d
KLC		 7770 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7771 0 - N32_IMM15S (insn));
35c08157
KLC		 7772 insn_type = NDS32_INSN_SUBI45;
7773 }
7774 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7775 && N32_RT5 (insn) == N32_RA5 (insn)
7776 && N32_IMM15S (insn) >= -512)
7777 {
7778 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7779 insn_type = NDS32_INSN_ADDI10_SP;
7780 }
7781 }
7782 break;
7783
7784 case N32_OP6_ORI:
7785 if (N32_IMM15S (insn) == 0)
7786 {
7787 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7788 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7789 if (mach <= MACH_V2
7790 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7791 {
7792 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7793 insn_type = NDS32_INSN_MOV55;
7794 }
7795 }
7796 break;
7797
7798 case N32_OP6_SUBRI:
7799 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7800 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7801 {
7802 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7803 insn_type = NDS32_INSN_NEG33;
7804 }
7805 break;
7806
7807 case N32_OP6_ANDI:
7808 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7809 {
7810 if (N32_IMM15U (insn) == 1)
7811 {
7812 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7813 insn_type = NDS32_INSN_XLSB33;
7814 }
7815 else if (N32_IMM15U (insn) == 0x7ff)
7816 {
7817 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7818 insn_type = NDS32_INSN_X11B33;
7819 }
7820 else if (N32_IMM15U (insn) == 0xff)
7821 {
7822 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7823 insn_type = NDS32_INSN_ZEB33;
7824 }
7825 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7826 && N32_IMM15U (insn) < 256)
7827 {
7828 int imm15u = N32_IMM15U (insn);
7829
7830 if (__builtin_popcount (imm15u) == 1)
7831 {
7832 /* BMSKI33 */
7833 int imm3u = __builtin_ctz (imm15u);
7834
7835 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7836 insn_type = NDS32_INSN_BMSKI33;
7837 }
7838 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7839 {
7840 /* FEXTI33 */
7841 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7842
7843 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7844 insn_type = NDS32_INSN_FEXTI33;
7845 }
7846 }
7847 }
7848 break;
7849
7850 case N32_OP6_SLTI:
7851 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7852 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7853 {
7854 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7855 insn_type = NDS32_INSN_SLTI45;
7856 }
7857 break;
7858
7859 case N32_OP6_SLTSI:
7860 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7861 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7862 {
7863 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7864 insn_type = NDS32_INSN_SLTSI45;
7865 }
7866 break;
7867
7868 case N32_OP6_LWI:
7869 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7870 {
7871 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7872 insn_type = NDS32_INSN_LWI450;
7873 }
7874 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7875 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7876 {
7877 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7878 N32_IMM15S (insn));
7879 insn_type = NDS32_INSN_LWI333;
7880 }
7881 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7882 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7883 {
7884 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7885 insn_type = NDS32_INSN_LWI37;
7886 }
7887 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7888 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7889 {
7890 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7891 insn_type = NDS32_INSN_LWI37_SP;
7892 }
7893 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7894 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7895 {
1c8f6a4d
KLC		 7896 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7897 N32_IMM15S (insn) + 32);
35c08157
KLC		 7898 insn_type = NDS32_INSN_LWI45_FE;
7899 }
7900 break;
7901
7902 case N32_OP6_SWI:
7903 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7904 {
7905 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7906 insn_type = NDS32_INSN_SWI450;
7907 }
7908 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7909 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7910 {
1c8f6a4d
KLC		 7911 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7912 N32_IMM15S (insn));
35c08157
KLC		 7913 insn_type = NDS32_INSN_SWI333;
7914 }
7915 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7916 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7917 {
7918 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7919 insn_type = NDS32_INSN_SWI37;
7920 }
7921 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7922 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7923 {
7924 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7925 insn_type = NDS32_INSN_SWI37_SP;
7926 }
7927 break;
7928
7929 case N32_OP6_LWI_BI:
7930 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7931 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7932 {
7933 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7934 N32_IMM15S (insn));
7935 insn_type = NDS32_INSN_LWI333_BI;
7936 }
7937 break;
7938
7939 case N32_OP6_SWI_BI:
7940 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7941 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7942 {
7943 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7944 N32_IMM15S (insn));
7945 insn_type = NDS32_INSN_SWI333_BI;
7946 }
7947 break;
7948
7949 case N32_OP6_LHI:
7950 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7951 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7952 {
7953 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7954 N32_IMM15S (insn));
7955 insn_type = NDS32_INSN_LHI333;
7956 }
7957 break;
7958
7959 case N32_OP6_SHI:
7960 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7961 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7962 {
7963 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7964 N32_IMM15S (insn));
7965 insn_type = NDS32_INSN_SHI333;
7966 }
7967 break;
7968
7969 case N32_OP6_LBI:
7970 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7971 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7972 {
7973 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7974 N32_IMM15S (insn));
7975 insn_type = NDS32_INSN_LBI333;
7976 }
7977 break;
7978
7979 case N32_OP6_SBI:
7980 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7981 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7982 {
7983 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7984 N32_IMM15S (insn));
7985 insn_type = NDS32_INSN_SBI333;
7986 }
7987 break;
7988
7989 case N32_OP6_ALU1:
7990 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7991
7992 case N32_OP6_ALU2:
7993 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7994
7995 case N32_OP6_BR1:
7996 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7997 goto done;
7998
4ec521f2 7999 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 8000 {
8001 /* N32_BR1_BEQ */
8002 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
8003 && N32_RT5 (insn) != REG_R5)
8004 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
8005 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
8006 && N32_RA5 (insn) != REG_R5)
8007 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
8008 insn_type = NDS32_INSN_BEQS38;
8009 break;
8010 }
8011 else
8012 {
8013 /* N32_BR1_BNE */
8014 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
8015 && N32_RT5 (insn) != REG_R5)
8016 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
8017 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
8018 && N32_RA5 (insn) != REG_R5)
8019 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
8020 insn_type = NDS32_INSN_BNES38;
8021 break;
8022 }
8023 break;
8024
8025 case N32_OP6_BR2:
8026 switch (N32_BR2_SUB (insn))
8027 {
8028 case N32_BR2_BEQZ:
8029 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
8030 {
8031 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
8032 insn_type = NDS32_INSN_BEQZ38;
8033 }
1c8f6a4d
KLC		 8034 else if (N32_RT5 (insn) == REG_R15
8035 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 8036 {
8037 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
8038 insn_type = NDS32_INSN_BEQZS8;
8039 }
8040 break;
8041
8042 case N32_BR2_BNEZ:
8043 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
8044 {
8045 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
8046 insn_type = NDS32_INSN_BNEZ38;
8047 }
1c8f6a4d
KLC		 8048 else if (N32_RT5 (insn) == REG_R15
8049 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 8050 {
8051 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
8052 insn_type = NDS32_INSN_BNEZS8;
8053 }
8054 break;
8055
fbaf61ad
NC		 8056 case N32_BR2_SOP0:
8057 if (__GF (insn, 20, 5) == 0 && IS_WITHIN_U (N32_IMM16S (insn), 9))
35c08157
KLC		 8058 {
8059 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
8060 insn_type = NDS32_INSN_IFCALL9;
8061 }
8062 break;
8063 }
8064 break;
8065
8066 case N32_OP6_JI:
4ec521f2 8067 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 8068 {
8069 /* N32_JI_J */
8070 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
8071 {
8072 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
8073 insn_type = NDS32_INSN_J8;
8074 }
8075 }
8076 break;
8077
8078 case N32_OP6_JREG:
8079 if (__GF (insn, 8, 2) != 0)
8080 goto done;
8081
8082 switch (N32_IMMU (insn, 5))
8083 {
8084 case N32_JREG_JR:
8085 if (N32_JREG_HINT (insn) == 0)
8086 {
8087 /* jr */
8088 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
8089 insn_type = NDS32_INSN_JR5;
8090 }
8091 else if (N32_JREG_HINT (insn) == 1)
8092 {
8093 /* ret */
8094 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
8095 insn_type = NDS32_INSN_RET5;
8096 }
8097 else if (N32_JREG_HINT (insn) == 3)
8098 {
8099 /* ifret = mov55 $sp, $sp */
8100 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
8101 insn_type = NDS32_INSN_IFRET;
8102 }
8103 break;
8104
8105 case N32_JREG_JRAL:
8106 /* It's convertible when return rt5 is $lp and address
8107 translation is kept. */
8108 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
8109 {
8110 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
8111 insn_type = NDS32_INSN_JRAL5;
8112 }
8113 break;
8114 }
8115 break;
8116
8117 case N32_OP6_MISC:
8118 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
8119 {
8120 /* For v3, swid above 31 are used for ex9.it. */
8121 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
8122 insn_type = NDS32_INSN_BREAK16;
8123 }
8124 break;
8125
8126 default:
8127 /* This instruction has no 16-bit variant. */
8128 goto done;
8129 }
8130
dc1e8a47 8131 done:
35c08157
KLC		 8132 /* Bit-15 of insn16 should be set for a valid instruction. */
8133 if ((insn16 & 0x8000) == 0)
8134 return 0;
8135
8136 if (pinsn16)
8137 *pinsn16 = insn16;
8138 if (pinsn_type)
8139 *pinsn_type = insn_type;
8140 return 1;
8141}
8142
8143static int
8144special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
8145 Elf_Internal_Rela *reloc)
8146{
8147 uint16_t insn16 = 0;
8148
8149 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
8150 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
8151 return 0;
8152
8153 if (!N32_IS_RT3 (insn))
8154 return 0;
8155
8156 switch (N32_OP6 (insn))
8157 {
8158 case N32_OP6_LWI:
8159 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
8160 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
8161 break;
8162 case N32_OP6_SWI:
8163 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
8164 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
8165 break;
8166 case N32_OP6_HWGP:
8167 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
8168 break;
8169
8170 if (__GF (insn, 17, 3) == 6)
8171 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
8172 else if (__GF (insn, 17, 3) == 7)
8173 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
8174 break;
8175 }
8176
8177 if ((insn16 & 0x8000) == 0)
8178 return 0;
8179
8180 *pinsn16 = insn16;
8181 return 1;
8182}
8183
8184/* Convert a 16-bit instruction to 32-bit one.
8185 INSN16 it the input and PINSN it the point to output.
8186 Return non-zero on successful. Otherwise 0 is returned. */
8187
8188int
8189nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
8190{
8191 uint32_t insn = 0xffffffff;
8192 unsigned long mach = bfd_get_mach (abfd);
8193
8194 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
8195
8196 switch (__GF (insn16, 9, 6))
8197 {
8198 case 0x4: /* add45 */
1c8f6a4d
KLC		 8199 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
8200 N16_RA5 (insn16));
35c08157
KLC		 8201 goto done;
8202 case 0x5: /* sub45 */
1c8f6a4d
KLC		 8203 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
8204 N16_RA5 (insn16));
35c08157
KLC		 8205 goto done;
8206 case 0x6: /* addi45 */
1c8f6a4d
KLC		 8207 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
8208 N16_IMM5U (insn16));
35c08157
KLC		 8209 goto done;
8210 case 0x7: /* subi45 */
1c8f6a4d
KLC		 8211 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
8212 -N16_IMM5U (insn16));
35c08157
KLC		 8213 goto done;
8214 case 0x8: /* srai45 */
1c8f6a4d
KLC		 8215 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
8216 N16_IMM5U (insn16));
35c08157
KLC		 8217 goto done;
8218 case 0x9: /* srli45 */
1c8f6a4d
KLC		 8219 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
8220 N16_IMM5U (insn16));
35c08157 8221 goto done;
35c08157 8222 case 0xa: /* slli333 */
1c8f6a4d
KLC		 8223 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
8224 N16_IMM3U (insn16));
35c08157
KLC		 8225 goto done;
8226 case 0xc: /* add333 */
1c8f6a4d
KLC		 8227 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
8228 N16_RB3 (insn16));
35c08157
KLC		 8229 goto done;
8230 case 0xd: /* sub333 */
1c8f6a4d
KLC		 8231 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
8232 N16_RB3 (insn16));
35c08157
KLC		 8233 goto done;
8234 case 0xe: /* addi333 */
1c8f6a4d
KLC		 8235 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
8236 N16_IMM3U (insn16));
35c08157
KLC		 8237 goto done;
8238 case 0xf: /* subi333 */
1c8f6a4d
KLC		 8239 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
8240 -N16_IMM3U (insn16));
35c08157 8241 goto done;
35c08157 8242 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 8243 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
8244 N16_IMM3U (insn16));
35c08157
KLC		 8245 goto done;
8246 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 8247 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
8248 N16_IMM3U (insn16));
35c08157
KLC		 8249 goto done;
8250 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 8251 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
8252 N16_IMM3U (insn16));
35c08157
KLC		 8253 goto done;
8254 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 8255 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
8256 N16_IMM3U (insn16));
35c08157
KLC		 8257 goto done;
8258 case 0x14: /* swi333 */
1c8f6a4d
KLC		 8259 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
8260 N16_IMM3U (insn16));
35c08157
KLC		 8261 goto done;
8262 case 0x16: /* shi333 */
1c8f6a4d
KLC		 8263 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
8264 N16_IMM3U (insn16));
35c08157
KLC		 8265 goto done;
8266 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 8267 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
8268 N16_IMM3U (insn16));
35c08157
KLC		 8269 goto done;
8270 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 8271 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
8272 N16_IMM3U (insn16));
35c08157 8273 goto done;
35c08157 8274 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 8275 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
8276 N16_IMM6U (insn16) << 2);
35c08157 8277 goto done;
35c08157 8278 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 8279 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
8280 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 8281 goto done;
8282 case 0x1a: /* lwi450 */
8283 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
8284 goto done;
8285 case 0x1b: /* swi450 */
8286 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
8287 goto done;
8288
1c8f6a4d 8289 /* These are r15 implied instructions. */
35c08157
KLC		 8290 case 0x30: /* slts45 */
8291 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
8292 goto done;
8293 case 0x31: /* slt45 */
8294 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
8295 goto done;
8296 case 0x32: /* sltsi45 */
8297 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
8298 goto done;
8299 case 0x33: /* slti45 */
8300 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
8301 goto done;
8302 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 8303 if (insn16 & N32_BIT (8))
35c08157
KLC		 8304 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
8305 else
8306 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
8307 goto done;
8308
8309 case 0x35: /* break16, ex9.it */
8310 /* Only consider range of v3 break16. */
8311 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
8312 goto done;
8313
8314 case 0x3c: /* ifcall9 */
fbaf61ad 8315 insn = N32_BR2 (SOP0, 0, N16_IMM9U (insn16));
35c08157
KLC		 8316 goto done;
8317 case 0x3d: /* movpi45 */
8318 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
8319 goto done;
8320
8321 case 0x3f: /* MISC33 */
1c8f6a4d 8322 switch (insn16 & 0x7)
35c08157
KLC		 8323 {
8324 case 2: /* neg33 */
8325 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8326 break;
8327 case 3: /* not33 */
1c8f6a4d
KLC		 8328 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
8329 N16_RA3 (insn16));
35c08157
KLC		 8330 break;
8331 case 4: /* mul33 */
1c8f6a4d
KLC		 8332 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
8333 N16_RA3 (insn16));
35c08157
KLC		 8334 break;
8335 case 5: /* xor33 */
1c8f6a4d
KLC		 8336 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
8337 N16_RA3 (insn16));
35c08157
KLC		 8338 break;
8339 case 6: /* and33 */
1c8f6a4d
KLC		 8340 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
8341 N16_RA3 (insn16));
35c08157
KLC		 8342 break;
8343 case 7: /* or33 */
1c8f6a4d
KLC		 8344 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
8345 N16_RA3 (insn16));
35c08157
KLC		 8346 break;
8347 }
8348 goto done;
8349
1c8f6a4d 8350 case 0xb:
35c08157
KLC		 8351 switch (insn16 & 0x7)
8352 {
8353 case 0: /* zeb33 */
8354 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
8355 break;
8356 case 1: /* zeh33 */
8357 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8358 break;
8359 case 2: /* seb33 */
8360 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8361 break;
8362 case 3: /* seh33 */
8363 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8364 break;
8365 case 4: /* xlsb33 */
8366 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
8367 break;
8368 case 5: /* x11b33 */
8369 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
8370 break;
8371 case 6: /* bmski33 */
8372 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 8373 1 << __GF (insn16, 3, 3));
35c08157
KLC		 8374 break;
8375 case 7: /* fexti33 */
8376 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 8377 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 8378 break;
8379 }
8380 goto done;
8381 }
8382
8383 switch (__GF (insn16, 10, 5))
8384 {
8385 case 0x0: /* mov55 or ifret16 */
8386 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
8387 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 8388 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 8389 else
1c8f6a4d 8390 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 8391 goto done;
8392 case 0x1: /* movi55 */
8393 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
8394 goto done;
8395 case 0x1b: /* addi10s (V2) */
8396 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
8397 goto done;
8398 }
8399
8400 switch (__GF (insn16, 11, 4))
8401 {
8402 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 8403 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 8404 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
8405 else /* lwi37.fp */
8406 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
8407 goto done;
8408 case 0x8: /* beqz38 */
8409 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
8410 goto done;
8411 case 0x9: /* bnez38 */
8412 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
8413 goto done;
8414 case 0xa: /* beqs38/j8, implied r5 */
8415 if (N16_RT38 (insn16) == 5)
8416 insn = N32_JI (J, N16_IMM8S (insn16));
8417 else
8418 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
8419 goto done;
fbaf61ad 8420 case 0xb: /* bnes38 and others. */
35c08157
KLC		 8421 if (N16_RT38 (insn16) == 5)
8422 {
8423 switch (__GF (insn16, 5, 3))
8424 {
8425 case 0: /* jr5 */
8426 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
8427 break;
8428 case 4: /* ret5 */
8429 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
8430 break;
8431 case 1: /* jral5 */
8432 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
8433 break;
8434 case 2: /* ex9.it imm5 */
8435 /* ex9.it had no 32-bit variantl. */
8436 break;
8437 case 5: /* add5.pc */
8438 /* add5.pc had no 32-bit variantl. */
8439 break;
8440 }
8441 }
8442 else /* bnes38 */
8443 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
8444 goto done;
8445 case 0xe: /* lwi37/swi37 */
8446 if (insn16 & (1 << 7)) /* swi37.sp */
8447 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
8448 else /* lwi37.sp */
8449 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
8450 goto done;
8451 }
8452
dc1e8a47 8453 done:
35c08157
KLC		 8454 if (insn & 0x80000000)
8455 return 0;
8456
8457 if (pinsn)
8458 *pinsn = insn;
8459 return 1;
8460}
8461\f
fbaf61ad 8462
0a1b45a2 8463static bool
35c08157
KLC		 8464is_sda_access_insn (unsigned long insn)
8465{
8466 switch (N32_OP6 (insn))
8467 {
8468 case N32_OP6_LWI:
8469 case N32_OP6_LHI:
8470 case N32_OP6_LHSI:
8471 case N32_OP6_LBI:
8472 case N32_OP6_LBSI:
8473 case N32_OP6_SWI:
8474 case N32_OP6_SHI:
8475 case N32_OP6_SBI:
8476 case N32_OP6_LWC:
8477 case N32_OP6_LDC:
8478 case N32_OP6_SWC:
8479 case N32_OP6_SDC:
0a1b45a2 8480 return true;
35c08157
KLC		 8481 default:
8482 ;
8483 }
0a1b45a2 8484 return false;
35c08157
KLC		 8485}
8486
8487static unsigned long
8488turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
8489{
8490 uint32_t oinsn = 0;
8491
8492 switch (type)
8493 {
8494 case R_NDS32_GOT_LO12:
8495 case R_NDS32_GOTOFF_LO12:
8496 case R_NDS32_PLTREL_LO12:
8497 case R_NDS32_PLT_GOTREL_LO12:
8498 case R_NDS32_LO12S0_RELA:
8499 switch (N32_OP6 (insn))
8500 {
8501 case N32_OP6_LBI:
8502 /* lbi.gp */
8503 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
8504 break;
8505 case N32_OP6_LBSI:
8506 /* lbsi.gp */
4ec521f2 8507 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8508 break;
8509 case N32_OP6_SBI:
8510 /* sbi.gp */
8511 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
8512 break;
8513 case N32_OP6_ORI:
8514 /* addi.gp */
4ec521f2 8515 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8516 break;
8517 }
8518 break;
8519
8520 case R_NDS32_LO12S1_RELA:
8521 switch (N32_OP6 (insn))
8522 {
8523 case N32_OP6_LHI:
8524 /* lhi.gp */
8525 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
8526 break;
8527 case N32_OP6_LHSI:
8528 /* lhsi.gp */
4ec521f2 8529 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 8530 break;
8531 case N32_OP6_SHI:
8532 /* shi.gp */
4ec521f2 8533 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8534 break;
8535 }
8536 break;
8537
8538 case R_NDS32_LO12S2_RELA:
8539 switch (N32_OP6 (insn))
8540 {
8541 case N32_OP6_LWI:
8542 /* lwi.gp */
8543 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
8544 break;
8545 case N32_OP6_SWI:
8546 /* swi.gp */
8547 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
8548 break;
8549 }
8550 break;
8551
8552 case R_NDS32_LO12S2_DP_RELA:
8553 case R_NDS32_LO12S2_SP_RELA:
8554 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
8555 break;
8556 }
8557
8558 if (oinsn)
8559 *pinsn = oinsn;
8560
8561 return oinsn != 0;
8562}
8563
8564/* Linker hasn't found the correct merge section for non-section symbol
8565 in relax time, this work is left to the function elf_link_input_bfd().
8566 So for non-section symbol, _bfd_merged_section_offset is also needed
8567 to find the correct symbol address. */
8568
8569static bfd_vma
8570nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
8571 asection **psec, Elf_Internal_Rela *rel)
8572{
8573 asection *sec = *psec;
8574 bfd_vma relocation;
8575
8576 relocation = (sec->output_section->vma
8577 + sec->output_offset + sym->st_value);
8578 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
8579 {
8580 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8581 rel->r_addend =
8582 _bfd_merged_section_offset (abfd, psec,
8583 elf_section_data (sec)->sec_info,
8584 sym->st_value + rel->r_addend);
8585 else
8586 rel->r_addend =
8587 _bfd_merged_section_offset (abfd, psec,
8588 elf_section_data (sec)->sec_info,
8589 sym->st_value) + rel->r_addend;
8590
8591 if (sec != *psec)
8592 {
8593 /* If we have changed the section, and our original section is
8594 marked with SEC_EXCLUDE, it means that the original
8595 SEC_MERGE section has been completely subsumed in some
8596 other SEC_MERGE section. In this case, we need to leave
8597 some info around for --emit-relocs. */
8598 if ((sec->flags & SEC_EXCLUDE) != 0)
8599 sec->kept_section = *psec;
8600 sec = *psec;
8601 }
8602 rel->r_addend -= relocation;
8603 rel->r_addend += sec->output_section->vma + sec->output_offset;
8604 }
8605 return relocation;
8606}
8607
8608static bfd_vma
8609calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8610 Elf_Internal_Sym *isymbuf,
8611 Elf_Internal_Shdr *symtab_hdr)
8612{
8613 bfd_signed_vma foff;
8614 bfd_vma symval, addend;
8615 Elf_Internal_Rela irel_fn;
8616 Elf_Internal_Sym *isym;
8617 asection *sym_sec;
8618
8619 /* Get the value of the symbol referred to by the reloc. */
8620 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8621 {
8622 /* A local symbol. */
8623 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8624
8625 if (isym->st_shndx == SHN_UNDEF)
8626 sym_sec = bfd_und_section_ptr;
8627 else if (isym->st_shndx == SHN_ABS)
8628 sym_sec = bfd_abs_section_ptr;
8629 else if (isym->st_shndx == SHN_COMMON)
8630 sym_sec = bfd_com_section_ptr;
8631 else
8632 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8633 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8634 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8635 addend = irel_fn.r_addend;
8636 }
8637 else
8638 {
8639 unsigned long indx;
8640 struct elf_link_hash_entry *h;
8641
8642 /* An external symbol. */
8643 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8644 h = elf_sym_hashes (abfd)[indx];
8645 BFD_ASSERT (h != NULL);
8646
8647 while (h->root.type == bfd_link_hash_indirect
8648 || h->root.type == bfd_link_hash_warning)
8649 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8650
8651 if (h->root.type != bfd_link_hash_defined
8652 && h->root.type != bfd_link_hash_defweak)
8653 /* This appears to be a reference to an undefined
8654 symbol. Just ignore it--it will be caught by the
8655 regular reloc processing. */
8656 return 0;
8657
8658 if (h->root.u.def.section->flags & SEC_MERGE)
8659 {
8660 sym_sec = h->root.u.def.section;
8661 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8662 (sym_sec)->sec_info, h->root.u.def.value);
8663 symval = symval + sym_sec->output_section->vma
8664 + sym_sec->output_offset;
8665 }
8666 else
8667 symval = (h->root.u.def.value
8668 + h->root.u.def.section->output_section->vma
8669 + h->root.u.def.section->output_offset);
8670 addend = irel->r_addend;
8671 }
8672
8673 foff = symval + addend;
8674
8675 return foff;
8676}
8677
35c08157
KLC		 8678static int
8679is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8680 asection *sec, Elf_Internal_Rela *rel)
8681{
8682 bfd_byte *contents;
8683 unsigned short insn16;
8684
8685 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
0a1b45a2 8686 return false;
35c08157
KLC		 8687 contents = elf_section_data (sec)->this_hdr.contents;
8688 insn16 = bfd_getb16 (contents + rel->r_offset);
8689 if (insn16 == NDS32_NOP16)
0a1b45a2
AM		 8690 return true;
8691 return false;
35c08157
KLC		 8692}
8693
8694/* It checks whether the instruction could be converted to
8695 16-bit form and returns the converted one.
8696
8697 `internal_relocs' is supposed to be sorted. */
8698
8699static int
8700is_convert_32_to_16 (bfd *abfd, asection *sec,
8701 Elf_Internal_Rela *reloc,
8702 Elf_Internal_Rela *internal_relocs,
8703 Elf_Internal_Rela *irelend,
8704 uint16_t *insn16)
8705{
8706#define NORMAL_32_TO_16 (1 << 0)
8707#define SPECIAL_32_TO_16 (1 << 1)
8708 bfd_byte *contents = NULL;
8709 bfd_signed_vma off;
8710 bfd_vma mem_addr;
8711 uint32_t insn = 0;
8712 Elf_Internal_Rela *pc_rel;
35c08157
KLC		 8713 Elf_Internal_Shdr *symtab_hdr;
8714 Elf_Internal_Sym *isymbuf = NULL;
8715 int convert_type;
8716 bfd_vma offset;
8717
8718 if (reloc->r_offset + 4 > sec->size)
0a1b45a2 8719 return false;
35c08157
KLC		 8720
8721 offset = reloc->r_offset;
8722
0a1b45a2
AM		 8723 if (!nds32_get_section_contents (abfd, sec, &contents, true))
8724 return false;
35c08157
KLC		 8725 insn = bfd_getb32 (contents + offset);
8726
8727 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8728 convert_type = NORMAL_32_TO_16;
8729 else if (special_convert_32_to_16 (insn, insn16, reloc))
8730 convert_type = SPECIAL_32_TO_16;
8731 else
0a1b45a2 8732 return false;
35c08157
KLC		 8733
8734 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8735 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
0a1b45a2 8736 return false;
35c08157
KLC		 8737
8738 /* Find the first relocation of the same relocation-type,
8739 so we iteratie them forward. */
8740 pc_rel = reloc;
1c8f6a4d 8741 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8742 pc_rel--;
8743
8744 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8745 {
8746 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8747 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8748 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8749 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8750 {
fbaf61ad 8751 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
1c8f6a4d
KLC		 8752 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8753 || off == 0)
0a1b45a2 8754 return false;
35c08157
KLC		 8755 break;
8756 }
8757 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8758 {
8759 /* movi => movi55 */
1c8f6a4d
KLC		 8760 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8761 symtab_hdr);
8762 /* mem_addr is unsigned, but the value should
8763 be between [-16, 15]. */
35c08157 8764 if ((mem_addr + 0x10) >> 5)
0a1b45a2 8765 return false;
35c08157
KLC		 8766 break;
8767 }
1c8f6a4d
KLC		 8768 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8769 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8770 {
8771 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8772 because it can be relaxed to addi for TLS_LE_ADD. */
0a1b45a2 8773 return false;
1c8f6a4d 8774 }
35c08157
KLC		 8775 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8776 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8777 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8778 && convert_type == SPECIAL_32_TO_16)
8779 {
8780 /* fp-as-gp
8781 We've selected a best fp-base for this access, so we can
8782 always resolve it anyway. Do nothing. */
8783 break;
8784 }
8785 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8786 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8787 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8788 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8789 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8790 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8791 {
1c8f6a4d
KLC		 8792 /* Prevent unresolved addi instruction translate
8793 to addi45 or addi333. */
0a1b45a2 8794 return false;
35c08157 8795 }
1c8f6a4d
KLC		 8796 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8797 {
fbaf61ad 8798 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
1c8f6a4d 8799 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
0a1b45a2 8800 return false;
1c8f6a4d
KLC		 8801 break;
8802 }
35c08157
KLC		 8803 }
8804
0a1b45a2 8805 return true;
35c08157
KLC		 8806}
8807
8808static void
8809nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8810 Elf_Internal_Rela *reloc,
8811 Elf_Internal_Rela *internal_relocs,
8812 Elf_Internal_Rela *irelend,
8813 unsigned short insn16)
8814{
8815 Elf_Internal_Rela *pc_rel;
8816 bfd_vma offset;
8817
8818 offset = reloc->r_offset;
8819 bfd_putb16 (insn16, contents + offset);
8820 /* Find the first relocation of the same relocation-type,
8821 so we iteratie them forward. */
8822 pc_rel = reloc;
8823 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8824 pc_rel--;
8825
8826 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8827 {
8828 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8829 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8830 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8831 {
8832 pc_rel->r_info =
8833 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8834 }
8835 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8836 pc_rel->r_info =
8837 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8838 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8839 pc_rel->r_info =
8840 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8841 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8842 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8843 pc_rel->r_info =
8844 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8845 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8846 pc_rel->r_info =
8847 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8848 }
8849}
8850
8851/* Find a relocation of type specified by `reloc_type'
8852 of the same r_offset with reloc.
8853 If not found, return irelend.
8854
8855 Assuming relocations are sorted by r_offset,
8856 we find the relocation from `reloc' backward untill relocs,
8857 or find it from `reloc' forward untill irelend. */
8858
8859static Elf_Internal_Rela *
8860find_relocs_at_address (Elf_Internal_Rela *reloc,
8861 Elf_Internal_Rela *relocs,
8862 Elf_Internal_Rela *irelend,
8863 enum elf_nds32_reloc_type reloc_type)
8864{
8865 Elf_Internal_Rela *rel_t;
8866
8867 /* Find backward. */
8868 for (rel_t = reloc;
8869 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8870 rel_t--)
8871 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8872 return rel_t;
8873
1c8f6a4d 8874 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8875 for (rel_t = reloc;
8876 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8877 rel_t++)
8878 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8879 return rel_t;
8880
8881 return irelend;
8882}
8883
8884/* Find a relocation of specified type and offset.
8885 `reloc' is just a refence point to find a relocation at specified offset.
8886 If not found, return irelend.
8887
8888 Assuming relocations are sorted by r_offset,
8889 we find the relocation from `reloc' backward untill relocs,
8890 or find it from `reloc' forward untill irelend. */
8891
8892static Elf_Internal_Rela *
8893find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8894 Elf_Internal_Rela *relocs,
8895 Elf_Internal_Rela *irelend,
6cae483a 8896 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8897 bfd_vma offset_p)
8898{
8899 Elf_Internal_Rela *rel_t = NULL;
8900
8901 /* First, we try to find a relocation of offset `offset_p',
8902 and then we use find_relocs_at_address to find specific type. */
8903
8904 if (reloc->r_offset > offset_p)
8905 {
8906 /* Find backward. */
8907 for (rel_t = reloc;
8908 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8909 /* Do nothing. */;
8910 }
8911 else if (reloc->r_offset < offset_p)
8912 {
8913 /* Find forward. */
8914 for (rel_t = reloc;
8915 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8916 /* Do nothing. */;
8917 }
8918 else
8919 rel_t = reloc;
8920
8921 /* Not found? */
8922 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8923 return irelend;
8924
8925 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8926}
8927
fbaf61ad
NC		 8928typedef struct nds32_elf_blank nds32_elf_blank_t;
8929struct nds32_elf_blank
35c08157 8930{
fbaf61ad
NC		 8931 /* Where the blank begins. */
8932 bfd_vma offset;
8933 /* The size of the blank. */
8934 bfd_vma size;
8935 /* The accumulative size before this blank. */
8936 bfd_vma total_size;
8937 nds32_elf_blank_t *next;
8938 nds32_elf_blank_t *prev;
8939};
35c08157
KLC		 8940
8941static nds32_elf_blank_t *blank_free_list = NULL;
8942
8943static nds32_elf_blank_t *
8944create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8945{
8946 nds32_elf_blank_t *blank_t;
8947
8948 if (blank_free_list)
8949 {
8950 blank_t = blank_free_list;
8951 blank_free_list = blank_free_list->next;
8952 }
8953 else
8954 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8955
8956 if (blank_t == NULL)
8957 return NULL;
8958
8959 blank_t->offset = offset_p;
8960 blank_t->size = size_p;
8961 blank_t->total_size = 0;
8962 blank_t->next = NULL;
8963 blank_t->prev = NULL;
8964
8965 return blank_t;
8966}
8967
8968static void
8969remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8970{
8971 if (blank_free_list)
8972 {
8973 blank_free_list->prev = blank_p;
8974 blank_p->next = blank_free_list;
8975 }
8976 else
8977 blank_p->next = NULL;
8978
8979 blank_p->prev = NULL;
8980 blank_free_list = blank_p;
8981}
8982
8983static void
8984clean_nds32_elf_blank (void)
8985{
8986 nds32_elf_blank_t *blank_t;
8987
8988 while (blank_free_list)
8989 {
8990 blank_t = blank_free_list;
8991 blank_free_list = blank_free_list->next;
8992 free (blank_t);
8993 }
8994}
8995
8996static nds32_elf_blank_t *
8997search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8998{
8999 nds32_elf_blank_t *blank_t;
9000
9001 if (!blank_p)
9002 return NULL;
9003 blank_t = blank_p;
9004
9005 while (blank_t && addr < blank_t->offset)
9006 blank_t = blank_t->prev;
9007 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
9008 blank_t = blank_t->next;
9009
9010 return blank_t;
9011}
9012
9013static bfd_vma
9014get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
9015 int overwrite)
9016{
9017 nds32_elf_blank_t *blank_t;
9018
9019 blank_t = search_nds32_elf_blank (*blank_p, addr);
9020 if (!blank_t)
9021 return 0;
9022
9023 if (overwrite)
9024 *blank_p = blank_t;
9025
9026 if (addr < blank_t->offset + blank_t->size)
9027 return blank_t->total_size + (addr - blank_t->offset);
9028 else
9029 return blank_t->total_size + blank_t->size;
9030}
9031
0a1b45a2 9032static bool
35c08157
KLC		 9033insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
9034{
9035 nds32_elf_blank_t *blank_t, *blank_t2;
9036
9037 if (!*blank_p)
9038 {
9039 *blank_p = create_nds32_elf_blank (addr, len);
63b4cc53 9040 return *blank_p != NULL;
35c08157
KLC		 9041 }
9042
9043 blank_t = search_nds32_elf_blank (*blank_p, addr);
9044
9045 if (blank_t == NULL)
9046 {
9047 blank_t = create_nds32_elf_blank (addr, len);
9048 if (!blank_t)
0a1b45a2 9049 return false;
35c08157
KLC		 9050 while ((*blank_p)->prev != NULL)
9051 *blank_p = (*blank_p)->prev;
9052 blank_t->next = *blank_p;
9053 (*blank_p)->prev = blank_t;
9054 (*blank_p) = blank_t;
0a1b45a2 9055 return true;
35c08157
KLC		 9056 }
9057
9058 if (addr < blank_t->offset + blank_t->size)
9059 {
fbaf61ad
NC		 9060 /* Extend the origin blank. */
9061 if (addr + len > blank_t->offset + blank_t->size)
9062 blank_t->size = addr + len - blank_t->offset;
35c08157
KLC		 9063 }
9064 else
9065 {
9066 blank_t2 = create_nds32_elf_blank (addr, len);
9067 if (!blank_t2)
0a1b45a2 9068 return false;
35c08157
KLC		 9069 if (blank_t->next)
9070 {
9071 blank_t->next->prev = blank_t2;
9072 blank_t2->next = blank_t->next;
9073 }
9074 blank_t2->prev = blank_t;
9075 blank_t->next = blank_t2;
9076 *blank_p = blank_t2;
9077 }
9078
0a1b45a2 9079 return true;
35c08157
KLC		 9080}
9081
0a1b45a2 9082static bool
35c08157
KLC		 9083insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
9084 bfd_vma len)
9085{
9086 nds32_elf_blank_t *blank_t;
9087
9088 if (!insert_nds32_elf_blank (blank_p, addr, len))
0a1b45a2 9089 return false;
35c08157
KLC		 9090
9091 blank_t = *blank_p;
9092
9093 if (!blank_t->prev)
9094 {
9095 blank_t->total_size = 0;
9096 blank_t = blank_t->next;
9097 }
9098
9099 while (blank_t)
9100 {
9101 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
9102 blank_t = blank_t->next;
9103 }
9104
0a1b45a2 9105 return true;
35c08157
KLC		 9106}
9107
9108static void
9109calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
9110{
9111 nds32_elf_blank_t *blank_t;
9112 bfd_vma total_size = 0;
9113
9114 if (!blank_p)
9115 return;
9116
9117 blank_t = blank_p;
9118 while (blank_t->prev)
9119 blank_t = blank_t->prev;
9120 while (blank_t)
9121 {
9122 blank_t->total_size = total_size;
9123 total_size += blank_t->size;
9124 blank_t = blank_t->next;
9125 }
9126}
9127
0a1b45a2 9128static bool
35c08157
KLC		 9129nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
9130 nds32_elf_blank_t *blank_p)
9131{
9132 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 9133 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 9134 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
9135 unsigned int sec_shndx; /* The section the be relaxed. */
9136 bfd_byte *contents; /* Contents data of iterating section. */
9137 Elf_Internal_Rela *internal_relocs;
9138 Elf_Internal_Rela *irel;
9139 Elf_Internal_Rela *irelend;
9140 struct elf_link_hash_entry **sym_hashes;
9141 struct elf_link_hash_entry **end_hashes;
9142 unsigned int symcount;
9143 asection *sect;
9144 nds32_elf_blank_t *blank_t;
9145 nds32_elf_blank_t *blank_t2;
9146 nds32_elf_blank_t *blank_head;
9147
9148 blank_head = blank_t = blank_p;
9149 while (blank_head->prev != NULL)
9150 blank_head = blank_head->prev;
9151 while (blank_t->next != NULL)
9152 blank_t = blank_t->next;
9153
9154 if (blank_t->offset + blank_t->size <= sec->size)
9155 {
9156 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
9157 blank_t->next->prev = blank_t;
9158 }
9159 if (blank_head->offset > 0)
9160 {
9161 blank_head->prev = create_nds32_elf_blank (0, 0);
9162 blank_head->prev->next = blank_head;
9163 blank_head = blank_head->prev;
9164 }
9165
9166 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
9167
9168 /* The deletion must stop at the next ALIGN reloc for an alignment
9169 power larger than the number of bytes we are deleting. */
9170
9171 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
9172 if (!nds32_get_local_syms (abfd, sec, &isym))
0a1b45a2 9173 return false;
35c08157
KLC		 9174
9175 if (isym == NULL)
9176 {
9177 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
9178 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
9179 symtab_hdr->contents = (bfd_byte *) isym;
9180 }
9181
9182 if (isym == NULL || symtab_hdr->sh_info == 0)
0a1b45a2 9183 return false;
35c08157
KLC		 9184
9185 blank_t = blank_head;
9186 calc_nds32_blank_total (blank_head);
9187
9188 for (sect = abfd->sections; sect != NULL; sect = sect->next)
9189 {
9190 /* Adjust all the relocs. */
9191
9192 /* Relocations MUST be kept in memory, because relaxation adjust them. */
9193 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
0a1b45a2 9194 true /* keep_memory */);
35c08157
KLC		 9195 irelend = internal_relocs + sect->reloc_count;
9196
9197 blank_t = blank_head;
9198 blank_t2 = blank_head;
9199
9200 if (!(sect->flags & SEC_RELOC))
9201 continue;
9202
1781a9d0 9203 contents = NULL;
0a1b45a2 9204 nds32_get_section_contents (abfd, sect, &contents, true);
35c08157
KLC		 9205
9206 for (irel = internal_relocs; irel < irelend; irel++)
9207 {
9208 bfd_vma raddr;
9209
9210 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
9211 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
9212 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
9213 {
9214 unsigned long val = 0;
1c8f6a4d
KLC		 9215 unsigned long mask;
9216 long before, between;
6cae483a 9217 long offset = 0;
35c08157
KLC		 9218
9219 switch (ELF32_R_TYPE (irel->r_info))
9220 {
9221 case R_NDS32_DIFF8:
1c8f6a4d 9222 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 9223 break;
9224 case R_NDS32_DIFF16:
1c8f6a4d 9225 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 9226 break;
9227 case R_NDS32_DIFF32:
9228 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 9229 /* Get the signed bit and mask for the high part. The
9230 gcc will alarm when right shift 32-bit since the
9231 type size of long may be 32-bit. */
9232 mask = 0 - (val >> 31);
9233 if (mask)
9234 offset = (val | (mask - 0xffffffff));
9235 else
9236 offset = val;
35c08157
KLC		 9237 break;
9238 default:
9239 BFD_ASSERT (0);
9240 }
9241
9242 /* DIFF value
9243 0 |encoded in location|
9244 |------------|-------------------|---------
9245 sym+off(addend)
9246 -- before ---| *****************
9247 --------------------- between ---|
9248
1c8f6a4d
KLC		 9249 We only care how much data are relax between DIFF,
9250 marked as ***. */
35c08157
KLC		 9251
9252 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 9253 between = get_nds32_elf_blank_total (&blank_t,
9254 irel->r_addend + offset, 0);
35c08157
KLC		 9255 if (between == before)
9256 goto done_adjust_diff;
9257
9258 switch (ELF32_R_TYPE (irel->r_info))
9259 {
9260 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 9261 bfd_put_8 (abfd, offset - (between - before),
9262 contents + irel->r_offset);
35c08157
KLC		 9263 break;
9264 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 9265 bfd_put_16 (abfd, offset - (between - before),
9266 contents + irel->r_offset);
35c08157
KLC		 9267 break;
9268 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 9269 bfd_put_32 (abfd, offset - (between - before),
9270 contents + irel->r_offset);
35c08157
KLC		 9271 break;
9272 }
9273 }
9274 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
9275 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
9276 {
9277 bfd_vma val = 0;
9278 unsigned int len = 0;
9279 unsigned long before, between;
9280 bfd_byte *endp, *p;
9281
4265548c
PA		 9282 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
9283 &len);
35c08157
KLC		 9284
9285 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 9286 between = get_nds32_elf_blank_total (&blank_t,
9287 irel->r_addend + val, 0);
35c08157
KLC		 9288 if (between == before)
9289 goto done_adjust_diff;
9290
9291 p = contents + irel->r_offset;
9292 endp = p + len -1;
9293 memset (p, 0x80, len);
9294 *(endp) = 0;
9295 p = write_uleb128 (p, val - (between - before)) - 1;
9296 if (p < endp)
9297 *p |= 0x80;
9298 }
dc1e8a47 9299 done_adjust_diff:
35c08157
KLC		 9300
9301 if (sec == sect)
9302 {
9303 raddr = irel->r_offset;
1c8f6a4d
KLC		 9304 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
9305 irel->r_offset, 1);
35c08157
KLC		 9306
9307 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
9308 continue;
9309 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 9310 && (blank_t2->offset > raddr
9311 || blank_t2->next->offset <= raddr))
4eca0228 9312 _bfd_error_handler
38f14ab8
AM		 9313 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
9314 abfd);
35c08157
KLC		 9315
9316 /* Mark reloc in deleted portion as NONE.
9317 For some relocs like R_NDS32_LABEL that doesn't modify the
9318 content in the section. R_NDS32_LABEL doesn't belong to the
9319 instruction in the section, so we should preserve it. */
9320 if (raddr >= blank_t2->offset
9321 && raddr < blank_t2->offset + blank_t2->size
9322 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
9323 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
9324 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
9325 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
9326 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
9327 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
9328 {
9329 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
9330 R_NDS32_NONE);
9331 continue;
9332 }
9333 }
9334
9335 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
9336 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
9337 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
9338 continue;
9339
9340 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
9341 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
9342 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
9343 {
9344 if (irel->r_addend <= sec->size)
9345 irel->r_addend -=
9346 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
9347 }
9348 }
9349 }
9350
9351 /* Adjust the local symbols defined in this section. */
9352 blank_t = blank_head;
9353 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
9354 {
9355 if (isym->st_shndx == sec_shndx)
9356 {
9357 if (isym->st_value <= sec->size)
9358 {
9359 bfd_vma ahead;
9360 bfd_vma orig_addr = isym->st_value;
9361
9362 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
9363 isym->st_value -= ahead;
9364
9365 /* Adjust function size. */
1c8f6a4d
KLC		 9366 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
9367 && isym->st_size > 0)
9368 isym->st_size -=
9369 get_nds32_elf_blank_total
9370 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 9371 }
9372 }
9373 }
9374
9375 /* Now adjust the global symbols defined in this section. */
9376 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
9377 - symtab_hdr->sh_info);
9378 sym_hashes = elf_sym_hashes (abfd);
9379 end_hashes = sym_hashes + symcount;
9380 blank_t = blank_head;
9381 for (; sym_hashes < end_hashes; sym_hashes++)
9382 {
9383 struct elf_link_hash_entry *sym_hash = *sym_hashes;
9384
9385 if ((sym_hash->root.type == bfd_link_hash_defined
9386 || sym_hash->root.type == bfd_link_hash_defweak)
9387 && sym_hash->root.u.def.section == sec)
9388 {
9389 if (sym_hash->root.u.def.value <= sec->size)
9390 {
9391 bfd_vma ahead;
9392 bfd_vma orig_addr = sym_hash->root.u.def.value;
9393
9394 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
9395 sym_hash->root.u.def.value -= ahead;
9396
9397 /* Adjust function size. */
9398 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 9399 sym_hash->size -=
9400 get_nds32_elf_blank_total
9401 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 9402
9403 }
9404 }
9405 }
9406
9407 contents = elf_section_data (sec)->this_hdr.contents;
9408 blank_t = blank_head;
9409 while (blank_t->next)
9410 {
9411 /* Actually delete the bytes. */
9412
9413 /* If current blank is the last blank overlap with current section,
9414 go to finish process. */
9415 if (sec->size <= (blank_t->next->offset))
9416 break;
9417
9418 memmove (contents + blank_t->offset - blank_t->total_size,
9419 contents + blank_t->offset + blank_t->size,
9420 blank_t->next->offset - (blank_t->offset + blank_t->size));
9421
9422 blank_t = blank_t->next;
9423 }
9424
9425 if (sec->size > (blank_t->offset + blank_t->size))
9426 {
9427 /* There are remaining code between blank and section boundary.
9428 Move the remaining code to appropriate location. */
9429 memmove (contents + blank_t->offset - blank_t->total_size,
9430 contents + blank_t->offset + blank_t->size,
9431 sec->size - (blank_t->offset + blank_t->size));
9432 sec->size -= blank_t->total_size + blank_t->size;
9433 }
9434 else
9435 /* This blank is not entirely included in the section,
9436 reduce the section size by only part of the blank size. */
9437 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
9438
9439 while (blank_head)
9440 {
9441 blank_t = blank_head;
9442 blank_head = blank_head->next;
9443 remove_nds32_elf_blank (blank_t);
9444 }
9445
0a1b45a2 9446 return true;
35c08157
KLC		 9447}
9448
9449/* Get the contents of a section. */
9450
9451static int
0c4bd9d9 9452nds32_get_section_contents (bfd *abfd, asection *sec,
0a1b45a2 9453 bfd_byte **contents_p, bool cache)
35c08157
KLC		 9454{
9455 /* Get the section contents. */
9456 if (elf_section_data (sec)->this_hdr.contents != NULL)
9457 *contents_p = elf_section_data (sec)->this_hdr.contents;
9458 else
9459 {
1781a9d0 9460 if (!bfd_get_full_section_contents (abfd, sec, contents_p))
0a1b45a2 9461 return false;
0c4bd9d9
KLC		 9462 if (cache)
9463 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 9464 }
9465
0a1b45a2 9466 return true;
35c08157
KLC		 9467}
9468
9469/* Get the contents of the internal symbol of abfd. */
9470
9471static int
9472nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
9473 Elf_Internal_Sym **isymbuf_p)
9474{
9475 Elf_Internal_Shdr *symtab_hdr;
9476 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
9477
9478 /* Read this BFD's local symbols if we haven't done so already. */
9479 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
9480 {
9481 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
9482 if (*isymbuf_p == NULL)
9483 {
9484 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
9485 symtab_hdr->sh_info, 0,
9486 NULL, NULL, NULL);
9487 if (*isymbuf_p == NULL)
0a1b45a2 9488 return false;
35c08157
KLC		 9489 }
9490 }
9491 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
9492
0a1b45a2 9493 return true;
35c08157
KLC		 9494}
9495
9496/* Range of small data. */
1c8f6a4d
KLC		 9497static bfd_vma sdata_range[2][2];
9498static bfd_vma const sdata_init_range[2] =
9499{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 9500
9501static int
9502nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
9503 bfd_byte *contents, bfd_vma addr)
9504{
9505 unsigned long insn = bfd_getb32 (contents + addr);
9506
9507 if (insn & 0x80000000)
9508 return 2;
9509
9510 return 4;
9511}
9512
9513/* Set the gp relax range. We have to measure the safe range
9514 to do gp relaxation. */
9515
9516static void
c410035d 9517relax_range_measurement (bfd *abfd, struct bfd_link_info *link_info)
35c08157
KLC		 9518{
9519 asection *sec_f, *sec_b;
9520 /* For upper bound. */
c410035d 9521 bfd_vma maxpgsz;
35c08157 9522 bfd_vma align;
35c08157
KLC		 9523 static int decide_relax_range = 0;
9524 int i;
fbaf61ad 9525 int range_number = ARRAY_SIZE (sdata_init_range);
35c08157
KLC		 9526
9527 if (decide_relax_range)
9528 return;
9529 decide_relax_range = 1;
9530
9531 if (sda_rela_sec == NULL)
9532 {
9533 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 9534 for (i = 0; i < range_number; i++)
35c08157
KLC		 9535 {
9536 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9537 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9538 }
9539 return;
9540 }
9541
9542 /* Get the biggest alignment power after the gp located section. */
9543 sec_f = sda_rela_sec->output_section;
9544 sec_b = sec_f->next;
9545 align = 0;
9546 while (sec_b != NULL)
9547 {
9548 if ((unsigned)(1 << sec_b->alignment_power) > align)
9549 align = (1 << sec_b->alignment_power);
9550 sec_b = sec_b->next;
9551 }
9552
c410035d
AM		 9553 if (link_info != NULL)
9554 maxpgsz = link_info->maxpagesize;
9555 else
9556 maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
35c08157
KLC		 9557 /* I guess we can not determine the section before
9558 gp located section, so we assume the align is max page size. */
1c8f6a4d 9559 for (i = 0; i < range_number; i++)
35c08157 9560 {
1c8f6a4d 9561 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9562 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9563 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9564 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9565 }
9566}
9567
9568/* These are macros used to check flags encoded in r_addend.
9569 They are only used by nds32_elf_relax_section (). */
9570#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9571#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9572#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9573#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9574
695344c0
NC		 9575static const char * unrecognized_reloc_msg =
9576 /* xgettext:c-format */
2dcf00ce 9577 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 9578
1c8f6a4d
KLC		 9579/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9580
0a1b45a2 9581static bool
1c8f6a4d
KLC		 9582nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9583 Elf_Internal_Rela *internal_relocs, int *insn_len,
9584 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9585 Elf_Internal_Shdr *symtab_hdr)
9586{
9587 /* There are 3 variations for LONGCALL1
9588 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 9589 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9590 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9591 jral5 ta ;
1c8f6a4d
KLC		 9592
9593 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 9594 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9595 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9596 jral ta ;
1c8f6a4d
KLC		 9597
9598 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 9599 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9600 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9601 jral ta ;
1c8f6a4d
KLC		 9602 Check code for -mlong-calls output. */
9603
9604 /* Get the reloc for the address from which the register is
9605 being loaded. This reloc will tell us which function is
9606 actually being called. */
9607
9608 bfd_vma laddr;
9609 int seq_len; /* Original length of instruction sequence. */
35c08157 9610 uint32_t insn;
1c8f6a4d 9611 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
1c8f6a4d 9612 bfd_signed_vma foff;
35c08157 9613 uint16_t insn16;
35c08157 9614
1c8f6a4d
KLC		 9615 irelend = internal_relocs + sec->reloc_count;
9616 seq_len = GET_SEQ_LEN (irel->r_addend);
9617 laddr = irel->r_offset;
9618 *insn_len = seq_len;
35c08157 9619
1c8f6a4d
KLC		 9620 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9621 R_NDS32_HI20_RELA, laddr);
9622 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9623 R_NDS32_LO12S0_ORI_RELA,
9624 laddr + 4);
35c08157 9625
1c8f6a4d 9626 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 9627 {
695344c0 9628 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 9629 (uint64_t) irel->r_offset);
0a1b45a2 9630 return false;
35c08157
KLC		 9631 }
9632
1c8f6a4d 9633 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9634 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9635
1c8f6a4d 9636 /* This condition only happened when symbol is undefined. */
fbaf61ad
NC		 9637 if (foff == 0
9638 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 9639 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 9640 return false;
35c08157 9641
fbaf61ad 9642 /* Relax to: jal symbol; 25_PCREL. */
1c8f6a4d
KLC		 9643 /* For simplicity of coding, we are going to modify the section
9644 contents, the section relocs, and the BFD symbol table. We
9645 must tell the rest of the code not to free up this
9646 information. It would be possible to instead create a table
9647 of changes which have to be made, as is done in coff-mips.c;
9648 that would be more work, but would require less memory when
9649 the linker is run. */
9650
9651 /* Replace the long call with a jal. */
9652 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9653 R_NDS32_25_PCREL_RELA);
9654 irel->r_addend = hi_irelfn->r_addend;
9655
9656 /* We don't resolve this here but resolve it in relocate_section. */
9657 insn = INSN_JAL;
9658 bfd_putb32 (insn, contents + irel->r_offset);
9659
9660 hi_irelfn->r_info =
9661 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9662 lo_irelfn->r_info =
9663 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9664 *insn_len = 4;
9665
9666 if (seq_len & 0x2)
9667 {
9668 insn16 = NDS32_NOP16;
9669 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9670 lo_irelfn->r_info =
9671 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9672 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9673 *insn_len += 2;
9674 }
0a1b45a2 9675 return true;
1c8f6a4d 9676}
35c08157 9677
1c8f6a4d
KLC		 9678#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9679/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9680
0a1b45a2 9681static bool
1c8f6a4d
KLC		 9682nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9683 Elf_Internal_Rela *internal_relocs, int *insn_len,
9684 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9685 Elf_Internal_Shdr *symtab_hdr)
9686{
9687 /* bltz rt, .L1 ; LONGCALL2
9688 jal symbol ; 25_PCREL
9689 .L1: */
35c08157 9690
1c8f6a4d
KLC		 9691 /* Get the reloc for the address from which the register is
9692 being loaded. This reloc will tell us which function is
9693 actually being called. */
35c08157 9694
1c8f6a4d
KLC		 9695 bfd_vma laddr;
9696 uint32_t insn;
9697 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
1c8f6a4d 9698 bfd_signed_vma foff;
35c08157 9699
1c8f6a4d
KLC		 9700 irelend = internal_relocs + sec->reloc_count;
9701 laddr = irel->r_offset;
9702 i1_irelfn =
9703 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9704 R_NDS32_25_PCREL_RELA, laddr + 4);
9705
9706 if (i1_irelfn == irelend)
35c08157 9707 {
695344c0 9708 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 9709 (uint64_t) irel->r_offset);
0a1b45a2 9710 return false;
35c08157
KLC		 9711 }
9712
1c8f6a4d 9713 insn = bfd_getb32 (contents + laddr);
35c08157 9714
1c8f6a4d 9715 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9716 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr);
35c08157 9717
fbaf61ad
NC		 9718 if (foff == 0
9719 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 9720 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 9721 return false;
35c08157 9722
1c8f6a4d
KLC		 9723 /* Relax to bgezal rt, label ; 17_PCREL
9724 or bltzal rt, label ; 17_PCREL */
9725
9726 /* Convert to complimentary conditional call. */
9727 insn = CONVERT_CONDITION_CALL (insn);
9728
9729 /* For simplicity of coding, we are going to modify the section
9730 contents, the section relocs, and the BFD symbol table. We
9731 must tell the rest of the code not to free up this
9732 information. It would be possible to instead create a table
9733 of changes which have to be made, as is done in coff-mips.c;
9734 that would be more work, but would require less memory when
9735 the linker is run. */
9736
9737 /* Clean unnessary relocations. */
9738 i1_irelfn->r_info =
9739 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9740 cond_irelfn =
9741 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9742 R_NDS32_17_PCREL_RELA, laddr);
9743 if (cond_irelfn != irelend)
9744 cond_irelfn->r_info =
9745 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9746
9747 /* Replace the long call with a bgezal. */
9748 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9749 R_NDS32_17_PCREL_RELA);
9750 irel->r_addend = i1_irelfn->r_addend;
9751
9752 bfd_putb32 (insn, contents + irel->r_offset);
9753
9754 *insn_len = 4;
0a1b45a2 9755 return true;
1c8f6a4d 9756}
35c08157 9757
1c8f6a4d
KLC		 9758/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9759
0a1b45a2 9760static bool
1c8f6a4d
KLC		 9761nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9762 Elf_Internal_Rela *internal_relocs, int *insn_len,
9763 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9764 Elf_Internal_Shdr *symtab_hdr)
9765{
9766 /* There are 3 variations for LONGCALL3
9767 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 9768 bltz rt, $1 ; LONGCALL3
9769 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9770 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9771 jral5 ta ;
1c8f6a4d
KLC		 9772 $1
9773
9774 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9775 bltz rt, $1 ; LONGCALL3
9776 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9777 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9778 jral ta ;
1c8f6a4d
KLC		 9779 $1
9780
9781 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9782 bltz rt, $1 ; LONGCALL3
9783 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9784 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9785 jral ta ;
1c8f6a4d
KLC		 9786 $1 */
9787
9788 /* Get the reloc for the address from which the register is
9789 being loaded. This reloc will tell us which function is
9790 actually being called. */
9791
9792 bfd_vma laddr;
9793 int seq_len; /* Original length of instruction sequence. */
9794 uint32_t insn;
9795 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
1c8f6a4d
KLC		 9796 bfd_signed_vma foff;
9797 uint16_t insn16;
9798
9799 irelend = internal_relocs + sec->reloc_count;
9800 seq_len = GET_SEQ_LEN (irel->r_addend);
9801 laddr = irel->r_offset;
9802 *insn_len = seq_len;
9803
9804 hi_irelfn =
9805 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9806 R_NDS32_HI20_RELA, laddr + 4);
9807 lo_irelfn =
9808 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9809 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9810
9811 if (hi_irelfn == irelend || lo_irelfn == irelend)
9812 {
695344c0 9813 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9814 (uint64_t) irel->r_offset);
0a1b45a2 9815 return false;
35c08157
KLC		 9816 }
9817
1c8f6a4d 9818 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9819 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9820
fbaf61ad
NC		 9821 if (foff == 0
9822 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 9823 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 9824 return false;
35c08157 9825
1c8f6a4d
KLC		 9826 insn = bfd_getb32 (contents + laddr);
9827 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9828 {
1c8f6a4d
KLC		 9829 /* Relax to bgezal rt, label ; 17_PCREL
9830 or bltzal rt, label ; 17_PCREL */
35c08157 9831
1c8f6a4d
KLC		 9832 /* Convert to complimentary conditional call. */
9833 insn = CONVERT_CONDITION_CALL (insn);
9834 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9835
1c8f6a4d
KLC		 9836 *insn_len = 4;
9837 irel->r_info =
9838 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9839 hi_irelfn->r_info =
9840 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9841 lo_irelfn->r_info =
9842 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9843
9844 cond_irelfn =
9845 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9846 R_NDS32_17_PCREL_RELA, laddr);
9847 if (cond_irelfn != irelend)
35c08157 9848 {
1c8f6a4d
KLC		 9849 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9850 R_NDS32_17_PCREL_RELA);
9851 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9852 }
1c8f6a4d
KLC		 9853
9854 if (seq_len & 0x2)
35c08157 9855 {
1c8f6a4d
KLC		 9856 insn16 = NDS32_NOP16;
9857 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9858 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9859 R_NDS32_INSN16);
9860 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9861 insn_len += 2;
35c08157 9862 }
1c8f6a4d
KLC		 9863 }
9864 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9865 {
9866 /* Relax to the following instruction sequence
9867 bltz rt, $1 ; LONGCALL2
9868 jal symbol ; 25_PCREL
9869 $1 */
9870 *insn_len = 8;
9871 insn = INSN_JAL;
9872 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9873
1c8f6a4d
KLC		 9874 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9875 R_NDS32_25_PCREL_RELA);
9876 irel->r_info =
9877 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9878
9879 lo_irelfn->r_info =
9880 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9881
1c8f6a4d 9882 if (seq_len & 0x2)
35c08157 9883 {
1c8f6a4d
KLC		 9884 insn16 = NDS32_NOP16;
9885 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9886 lo_irelfn->r_info =
9887 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9888 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9889 insn_len += 2;
9890 }
9891 }
0a1b45a2 9892 return true;
1c8f6a4d 9893}
35c08157 9894
1c8f6a4d 9895/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9896
0a1b45a2 9897static bool
1c8f6a4d
KLC		 9898nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9899 Elf_Internal_Rela *internal_relocs, int *insn_len,
9900 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9901 Elf_Internal_Shdr *symtab_hdr)
9902{
9903 /* There are 3 variations for LONGJUMP1
9904 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9905 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9906 ori ta, ta, lo12(symbol) ; LO12S0
9907 jr5 ta ;
1c8f6a4d
KLC		 9908
9909 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9910 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9911 ori ta, ta, lo12(symbol) ; LO12S0
9912 jr ta ;
1c8f6a4d
KLC		 9913
9914 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9915 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9916 ori ta, ta, lo12(symbol) ; LO12S0
9917 jr ta ; */
1c8f6a4d
KLC		 9918
9919 /* Get the reloc for the address from which the register is
9920 being loaded. This reloc will tell us which function is
9921 actually being called. */
9922
9923 bfd_vma laddr;
9924 int seq_len; /* Original length of instruction sequence. */
9925 int insn16_on; /* 16-bit on/off. */
9926 uint32_t insn;
9927 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
1c8f6a4d
KLC		 9928 bfd_signed_vma foff;
9929 uint16_t insn16;
9930 unsigned long reloc;
35c08157 9931
1c8f6a4d
KLC		 9932 irelend = internal_relocs + sec->reloc_count;
9933 seq_len = GET_SEQ_LEN (irel->r_addend);
9934 laddr = irel->r_offset;
9935 *insn_len = seq_len;
9936 insn16_on = IS_16BIT_ON (irel->r_addend);
9937
9938 hi_irelfn =
9939 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9940 R_NDS32_HI20_RELA, laddr);
9941 lo_irelfn =
9942 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9943 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9944 if (hi_irelfn == irelend || lo_irelfn == irelend)
9945 {
695344c0 9946 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9947 (uint64_t) irel->r_offset);
0a1b45a2 9948 return false;
1c8f6a4d 9949 }
35c08157 9950
1c8f6a4d 9951 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9952 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9953
fbaf61ad
NC		 9954 if (foff == 0
9955 || foff >= CONSERVATIVE_24BIT_S1
1c8f6a4d 9956 || foff < -CONSERVATIVE_24BIT_S1)
0a1b45a2 9957 return false;
35c08157 9958
fbaf61ad
NC		 9959 if (insn16_on
9960 && foff >= -ACCURATE_8BIT_S1
9961 && foff < ACCURATE_8BIT_S1
9962 && (seq_len & 0x2))
1c8f6a4d
KLC		 9963 {
9964 /* j8 label */
9965 /* 16-bit on, but not optimized for speed. */
9966 reloc = R_NDS32_9_PCREL_RELA;
9967 insn16 = INSN_J8;
9968 bfd_putb16 (insn16, contents + irel->r_offset);
9969 *insn_len = 2;
9970 irel->r_info =
9971 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9972 }
9973 else
9974 {
9975 /* j label */
9976 reloc = R_NDS32_25_PCREL_RELA;
9977 insn = INSN_J;
9978 bfd_putb32 (insn, contents + irel->r_offset);
9979 *insn_len = 4;
9980 irel->r_info =
9981 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9982 irel->r_addend = 0;
9983 }
35c08157 9984
1c8f6a4d
KLC		 9985 hi_irelfn->r_info =
9986 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9987 lo_irelfn->r_info =
9988 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9989
1c8f6a4d
KLC		 9990 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9991 {
9992 insn16 = NDS32_NOP16;
9993 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9994 lo_irelfn->r_info =
9995 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9996 R_NDS32_INSN16);
9997 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9998 *insn_len += 2;
9999 }
0a1b45a2 10000 return true;
1c8f6a4d
KLC		 10001}
10002
10003/* Revert condition branch. This function does not check if the input
10004 instruction is condition branch or not. */
10005
10006static void
10007nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
10008 uint16_t *re_insn16, uint32_t *re_insn)
10009{
10010 uint32_t comp_insn = 0;
10011 uint16_t comp_insn16 = 0;
10012
10013 if (insn)
10014 {
10015 if (N32_OP6 (insn) == N32_OP6_BR1)
10016 {
10017 /* beqs label. */
10018 comp_insn = (insn ^ 0x4000) & 0xffffc000;
10019 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 10020 {
1c8f6a4d
KLC		 10021 /* Insn can be contracted to 16-bit implied r5. */
10022 comp_insn16 =
10023 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
10024 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 10025 }
1c8f6a4d
KLC		 10026 }
10027 else if (N32_OP6 (insn) == N32_OP6_BR3)
10028 {
10029 /* bnec $ta, imm11, label. */
10030 comp_insn = (insn ^ 0x80000) & 0xffffff00;
10031 }
10032 else
10033 {
10034 comp_insn = (insn ^ 0x10000) & 0xffffc000;
10035 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
10036 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 10037 {
1c8f6a4d 10038 if (N32_IS_RT3 (insn))
35c08157 10039 {
1c8f6a4d
KLC		 10040 /* Insn can be contracted to 16-bit. */
10041 comp_insn16 =
10042 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
10043 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
10044 }
10045 else if (N32_RT5 (insn) == REG_R15)
10046 {
10047 /* Insn can be contracted to 16-bit. */
10048 comp_insn16 =
10049 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 10050 }
35c08157
KLC		 10051 }
10052 }
1c8f6a4d
KLC		 10053 }
10054 else
10055 {
10056 switch ((insn16 & 0xf000) >> 12)
35c08157 10057 {
1c8f6a4d
KLC		 10058 case 0xc:
10059 /* beqz38 or bnez38 */
10060 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
10061 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
10062 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
10063 break;
35c08157 10064
1c8f6a4d
KLC		 10065 case 0xd:
10066 /* beqs38 or bnes38 */
10067 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
10068 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
10069 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
10070 | (REG_R5 << 15);
10071 break;
35c08157 10072
1c8f6a4d
KLC		 10073 case 0xe:
10074 /* beqzS8 or bnezS8 */
10075 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
10076 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
10077 comp_insn |= REG_R15 << 20;
10078 break;
35c08157 10079
1c8f6a4d
KLC		 10080 default:
10081 break;
10082 }
10083 }
10084 if (comp_insn && re_insn)
10085 *re_insn = comp_insn;
10086 if (comp_insn16 && re_insn16)
10087 *re_insn16 = comp_insn16;
10088}
35c08157 10089
1c8f6a4d 10090/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 10091
0a1b45a2 10092static bool
1c8f6a4d
KLC		 10093nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10094 Elf_Internal_Rela *internal_relocs, int *insn_len,
10095 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10096 Elf_Internal_Shdr *symtab_hdr)
10097{
10098 /* There are 3 variations for LONGJUMP2
10099 case 2-4; 1st insn convertible, 16-bit on,
10100 optimize off or optimize for space
10101 bnes38 rt, ra, $1 ; LONGJUMP2
10102 j label ; 25_PCREL
10103 $1:
10104
10105 case 4-4; 1st insn not convertible
10106 bne rt, ra, $1 ; LONGJUMP2
10107 j label ; 25_PCREL
10108 $1:
10109
10110 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
10111 bne rt, ra, $1 ; LONGJUMP2
10112 j label ; 25_PCREL
10113 $1: */
10114
10115 /* Get the reloc for the address from which the register is
10116 being loaded. This reloc will tell us which function is
10117 actually being called. */
10118
10119 bfd_vma laddr;
10120 int seq_len; /* Original length of instruction sequence. */
10121 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
fbaf61ad 10122 int first_size;
1c8f6a4d
KLC		 10123 unsigned int i;
10124 bfd_signed_vma foff;
10125 uint32_t insn, re_insn = 0;
10126 uint16_t insn16, re_insn16 = 0;
10127 unsigned long reloc, cond_reloc;
35c08157 10128
1c8f6a4d
KLC		 10129 enum elf_nds32_reloc_type checked_types[] =
10130 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 10131
1c8f6a4d
KLC		 10132 irelend = internal_relocs + sec->reloc_count;
10133 seq_len = GET_SEQ_LEN (irel->r_addend);
10134 laddr = irel->r_offset;
10135 *insn_len = seq_len;
10136 first_size = (seq_len == 6) ? 2 : 4;
10137
10138 i2_irelfn =
10139 find_relocs_at_address_addr (irel, internal_relocs,
10140 irelend, R_NDS32_25_PCREL_RELA,
10141 laddr + first_size);
10142
fbaf61ad 10143 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10144 {
10145 cond_irelfn =
10146 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10147 checked_types[i], laddr);
10148 if (cond_irelfn != irelend)
10149 break;
10150 }
35c08157 10151
1c8f6a4d
KLC		 10152 if (i2_irelfn == irelend || cond_irelfn == irelend)
10153 {
695344c0 10154 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 10155 (uint64_t) irel->r_offset);
0a1b45a2 10156 return false;
1c8f6a4d 10157 }
35c08157 10158
1c8f6a4d 10159 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad
NC		 10160 foff = calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr);
10161 if (foff == 0
10162 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10163 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10164 return false;
35c08157 10165
1c8f6a4d
KLC		 10166 /* Get the all corresponding instructions. */
10167 if (first_size == 4)
10168 {
10169 insn = bfd_getb32 (contents + laddr);
10170 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10171 }
10172 else
10173 {
10174 insn16 = bfd_getb16 (contents + laddr);
10175 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10176 }
35c08157 10177
1c8f6a4d
KLC		 10178 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
10179 && foff < ACCURATE_8BIT_S1 - first_size)
10180 {
10181 if (first_size == 4)
10182 {
10183 /* Don't convert it to 16-bit now, keep this as relaxable for
10184 ``label reloc; INSN16''. */
35c08157 10185
1c8f6a4d
KLC		 10186 /* Save comp_insn32 to buffer. */
10187 bfd_putb32 (re_insn, contents + irel->r_offset);
10188 *insn_len = 4;
10189 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
10190 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
10191 cond_reloc = R_NDS32_INSN16;
10192 }
10193 else
10194 {
10195 bfd_putb16 (re_insn16, contents + irel->r_offset);
10196 *insn_len = 2;
10197 reloc = R_NDS32_9_PCREL_RELA;
10198 cond_reloc = R_NDS32_NONE;
10199 }
10200 }
10201 else if (N32_OP6 (re_insn) == N32_OP6_BR1
10202 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
10203 && foff < ACCURATE_14BIT_S1 - first_size))
10204 {
10205 /* beqs label ; 15_PCREL */
10206 bfd_putb32 (re_insn, contents + irel->r_offset);
10207 *insn_len = 4;
10208 reloc = R_NDS32_15_PCREL_RELA;
10209 cond_reloc = R_NDS32_NONE;
10210 }
10211 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10212 && foff >= -CONSERVATIVE_16BIT_S1
10213 && foff < CONSERVATIVE_16BIT_S1)
10214 {
10215 /* beqz label ; 17_PCREL */
10216 bfd_putb32 (re_insn, contents + irel->r_offset);
10217 *insn_len = 4;
10218 reloc = R_NDS32_17_PCREL_RELA;
10219 cond_reloc = R_NDS32_NONE;
10220 }
10221 else
0a1b45a2 10222 return false;
35c08157 10223
1c8f6a4d
KLC		 10224 /* Set all relocations. */
10225 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
10226 irel->r_addend = i2_irelfn->r_addend;
35c08157 10227
1c8f6a4d
KLC		 10228 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
10229 cond_reloc);
10230 cond_irelfn->r_addend = 0;
35c08157 10231
1c8f6a4d
KLC		 10232 if ((seq_len ^ *insn_len ) & 0x2)
10233 {
10234 insn16 = NDS32_NOP16;
10235 bfd_putb16 (insn16, contents + irel->r_offset + 4);
10236 i2_irelfn->r_offset = 4;
10237 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10238 R_NDS32_INSN16);
10239 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10240 *insn_len += 2;
10241 }
10242 else
10243 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10244 R_NDS32_NONE);
0a1b45a2 10245 return true;
1c8f6a4d 10246}
35c08157 10247
1c8f6a4d 10248/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 10249
0a1b45a2 10250static bool
1c8f6a4d
KLC		 10251nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10252 Elf_Internal_Rela *internal_relocs, int *insn_len,
10253 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10254 Elf_Internal_Shdr *symtab_hdr)
10255{
10256 /* There are 5 variations for LONGJUMP3
10257 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
10258 optimize off or optimize for space
07d6d2b8
AM		 10259 bnes38 rt, ra, $1 ; LONGJUMP3
10260 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10261 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10262 jr5 ta ;
10263 $1: ;
1c8f6a4d
KLC		 10264
10265 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 10266 bnes38 rt, ra, $1 ; LONGJUMP3
10267 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10268 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10269 jr5 ta ;
10270 $1: ; LABEL
1c8f6a4d
KLC		 10271
10272 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
10273 optimize off or optimize for space
07d6d2b8
AM		 10274 bne rt, ra, $1 ; LONGJUMP3
10275 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10276 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10277 jr5 ta ;
10278 $1: ;
1c8f6a4d
KLC		 10279
10280 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
10281 16-bit off if no INSN16
07d6d2b8
AM		 10282 bne rt, ra, $1 ; LONGJUMP3
10283 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10284 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10285 jr ta ;
10286 $1: ;
1c8f6a4d
KLC		 10287
10288 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
10289 16-bit off if no INSN16
07d6d2b8
AM		 10290 bne rt, ra, $1 ; LONGJUMP3
10291 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10292 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10293 jr ta ;
10294 $1: ; LABEL */
1c8f6a4d
KLC		 10295
10296 /* Get the reloc for the address from which the register is
10297 being loaded. This reloc will tell us which function is
10298 actually being called. */
10299 enum elf_nds32_reloc_type checked_types[] =
10300 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
10301
10302 int reloc_off = 0, cond_removed = 0, convertible;
10303 bfd_vma laddr;
10304 int seq_len; /* Original length of instruction sequence. */
10305 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
fbaf61ad 10306 int first_size;
1c8f6a4d
KLC		 10307 unsigned int i;
10308 bfd_signed_vma foff;
10309 uint32_t insn, re_insn = 0;
10310 uint16_t insn16, re_insn16 = 0;
10311 unsigned long reloc, cond_reloc;
35c08157 10312
1c8f6a4d
KLC		 10313 irelend = internal_relocs + sec->reloc_count;
10314 seq_len = GET_SEQ_LEN (irel->r_addend);
10315 laddr = irel->r_offset;
10316 *insn_len = seq_len;
35c08157 10317
1c8f6a4d 10318 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 10319
1c8f6a4d
KLC		 10320 if (convertible)
10321 first_size = 2;
10322 else
10323 first_size = 4;
10324
10325 /* Get all needed relocations. */
10326 hi_irelfn =
10327 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10328 R_NDS32_HI20_RELA, laddr + first_size);
10329 lo_irelfn =
10330 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10331 R_NDS32_LO12S0_ORI_RELA,
10332 laddr + first_size + 4);
10333
fbaf61ad 10334 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10335 {
10336 cond_irelfn =
10337 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10338 checked_types[i], laddr);
10339 if (cond_irelfn != irelend)
10340 break;
10341 }
35c08157 10342
fbaf61ad
NC		 10343 if (hi_irelfn == irelend
10344 || lo_irelfn == irelend
10345 || cond_irelfn == irelend)
1c8f6a4d 10346 {
695344c0 10347 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 10348 (uint64_t) irel->r_offset);
0a1b45a2 10349 return false;
1c8f6a4d 10350 }
35c08157 10351
1c8f6a4d 10352 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10353 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 10354
fbaf61ad
NC		 10355 if (foff == 0
10356 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10357 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10358 return false;
35c08157 10359
1c8f6a4d
KLC		 10360 /* Get the all corresponding instructions. */
10361 if (first_size == 4)
10362 {
10363 insn = bfd_getb32 (contents + laddr);
10364 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10365 }
10366 else
10367 {
10368 insn16 = bfd_getb16 (contents + laddr);
10369 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10370 }
35c08157 10371
1c8f6a4d
KLC		 10372 /* For simplicity of coding, we are going to modify the section
10373 contents, the section relocs, and the BFD symbol table. We
10374 must tell the rest of the code not to free up this
10375 information. It would be possible to instead create a table
10376 of changes which have to be made, as is done in coff-mips.c;
10377 that would be more work, but would require less memory when
10378 the linker is run. */
35c08157 10379
fbaf61ad
NC		 10380 if (re_insn16
10381 && foff >= -ACCURATE_8BIT_S1 - first_size
1c8f6a4d
KLC		 10382 && foff < ACCURATE_8BIT_S1 - first_size)
10383 {
10384 if (!(seq_len & 0x2))
10385 {
10386 /* Don't convert it to 16-bit now, keep this as relaxable
10387 for ``label reloc; INSN1a''6. */
10388 /* Save comp_insn32 to buffer. */
10389 bfd_putb32 (re_insn, contents + irel->r_offset);
10390 *insn_len = 4;
10391 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
10392 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
10393 cond_reloc = R_NDS32_INSN16;
10394 }
10395 else
10396 {
10397 /* Not optimize for speed; convert sequence to 16-bit. */
10398 /* Save comp_insn16 to buffer. */
10399 bfd_putb16 (re_insn16, contents + irel->r_offset);
10400 *insn_len = 2;
10401 reloc = R_NDS32_9_PCREL_RELA;
10402 cond_reloc = R_NDS32_NONE;
10403 }
10404 cond_removed = 1;
10405 }
10406 else if (N32_OP6 (re_insn) == N32_OP6_BR1
10407 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
10408 && foff < ACCURATE_14BIT_S1 - first_size))
10409 {
10410 /* beqs label ; 15_PCREL */
10411 bfd_putb32 (re_insn, contents + irel->r_offset);
10412 *insn_len = 4;
10413 reloc = R_NDS32_15_PCREL_RELA;
10414 cond_reloc = R_NDS32_NONE;
10415 cond_removed = 1;
10416 }
10417 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10418 && foff >= -CONSERVATIVE_16BIT_S1
10419 && foff < CONSERVATIVE_16BIT_S1)
10420 {
10421 /* beqz label ; 17_PCREL */
10422 bfd_putb32 (re_insn, contents + irel->r_offset);
10423 *insn_len = 4;
10424 reloc = R_NDS32_17_PCREL_RELA;
10425 cond_reloc = R_NDS32_NONE;
10426 cond_removed = 1;
10427 }
10428 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10429 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10430 {
10431 /* Relax to one of the following 3 variations
10432
10433 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
10434 for space
10435 bnes38 rt, $1 ; LONGJUMP2
10436 j label ; 25_PCREL
10437 $1
10438
10439 case 4-4; 1st insn not convertible, others don't care
10440 bne rt, ra, $1 ; LONGJUMP2
10441 j label ; 25_PCREL
10442 $1
10443
10444 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
10445 bne rt, ra, $1 ; LONGJUMP2
10446 j label ; 25_PCREL
10447 $1 */
10448
10449 /* Offset for first instruction. */
10450
10451 /* Use j label as second instruction. */
10452 *insn_len = 4 + first_size;
10453 insn = INSN_J;
10454 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
10455 reloc = R_NDS32_LONGJUMP2;
10456 cond_reloc = R_NDS32_25_PLTREL;
10457 }
10458 else
0a1b45a2 10459 return false;
35c08157 10460
1c8f6a4d
KLC		 10461 if (cond_removed == 1)
10462 {
10463 /* Set all relocations. */
10464 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
10465 irel->r_addend = hi_irelfn->r_addend;
10466
10467 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
10468 cond_reloc);
10469 cond_irelfn->r_addend = 0;
10470 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10471 R_NDS32_NONE);
10472 }
10473 else
10474 {
10475 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
fbaf61ad 10476 irel->r_addend = irel->r_addend;
1c8f6a4d
KLC		 10477 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10478 cond_reloc);
10479 }
35c08157 10480
1c8f6a4d
KLC		 10481 if ((seq_len ^ *insn_len ) & 0x2)
10482 {
10483 insn16 = NDS32_NOP16;
10484 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
10485 lo_irelfn->r_offset = *insn_len;
10486 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10487 R_NDS32_INSN16);
10488 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10489 *insn_len += 2;
10490 }
10491 else
10492 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10493 R_NDS32_NONE);
0a1b45a2 10494 return true;
1c8f6a4d 10495}
35c08157 10496
1c8f6a4d 10497/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 10498
0a1b45a2 10499static bool
1c8f6a4d
KLC		 10500nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10501 Elf_Internal_Rela *internal_relocs, int *insn_len,
10502 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10503 Elf_Internal_Shdr *symtab_hdr)
10504{
10505 /* The pattern for LONGCALL4. Support for function cse.
10506 sethi ta, hi20(symbol) ; LONGCALL4/HI20
10507 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10508 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 10509
1c8f6a4d
KLC		 10510 bfd_vma laddr;
10511 uint32_t insn;
10512 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
10513 Elf_Internal_Rela *irelend;
1c8f6a4d 10514 bfd_signed_vma foff;
35c08157 10515
1c8f6a4d
KLC		 10516 irelend = internal_relocs + sec->reloc_count;
10517 laddr = irel->r_offset;
35c08157 10518
1c8f6a4d
KLC		 10519 /* Get the reloc for the address from which the register is
10520 being loaded. This reloc will tell us which function is
10521 actually being called. */
10522 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10523 R_NDS32_HI20_RELA, laddr);
35c08157 10524
1c8f6a4d
KLC		 10525 if (hi_irel == irelend)
10526 {
695344c0 10527 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 10528 (uint64_t) irel->r_offset);
0a1b45a2 10529 return false;
1c8f6a4d 10530 }
35c08157 10531
1c8f6a4d 10532 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10533 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
35c08157 10534
1c8f6a4d 10535 /* This condition only happened when symbol is undefined. */
fbaf61ad
NC		 10536 if (foff == 0
10537 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10538 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10539 return false;
35c08157 10540
fbaf61ad 10541 /* Relax to: jal symbol; 25_PCREL. */
1c8f6a4d
KLC		 10542 /* For simplicity of coding, we are going to modify the section
10543 contents, the section relocs, and the BFD symbol table. We
10544 must tell the rest of the code not to free up this
10545 information. It would be possible to instead create a table
10546 of changes which have to be made, as is done in coff-mips.c;
10547 that would be more work, but would require less memory when
10548 the linker is run. */
35c08157 10549
1c8f6a4d
KLC		 10550 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10551 R_NDS32_PTR_RESOLVED, irel->r_addend);
10552 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10553 R_NDS32_EMPTY, irel->r_addend);
35c08157 10554
1c8f6a4d
KLC		 10555 if (ptr_irel == irelend || em_irel == irelend)
10556 {
695344c0 10557 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 10558 (uint64_t) irel->r_offset);
0a1b45a2 10559 return false;
1c8f6a4d
KLC		 10560 }
10561 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10562 insn = bfd_getb32 (contents + irel->r_addend);
10563 if (insn & 0x80000000)
0a1b45a2 10564 return false;
35c08157 10565
1c8f6a4d
KLC		 10566 /* Replace the long call with a jal. */
10567 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10568 R_NDS32_25_PCREL_RELA);
10569 ptr_irel->r_addend = 1;
35c08157 10570
1c8f6a4d
KLC		 10571 /* We don't resolve this here but resolve it in relocate_section. */
10572 insn = INSN_JAL;
10573 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10574
1c8f6a4d
KLC		 10575 irel->r_info =
10576 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10577
1c8f6a4d
KLC		 10578 /* If there is function cse, HI20 can not remove now. */
10579 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10580 R_NDS32_LONGCALL4, laddr);
10581 if (call_irel == irelend)
10582 {
10583 *insn_len = 0;
10584 hi_irel->r_info =
10585 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10586 }
35c08157 10587
1c8f6a4d
KLC		 10588 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10589 R_NDS32_INSN16, irel->r_addend);
10590 if (insn_irel != irelend)
10591 insn_irel->r_info =
10592 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10593
0a1b45a2 10594 return true;
1c8f6a4d 10595}
35c08157 10596
1c8f6a4d 10597/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10598
0a1b45a2 10599static bool
1c8f6a4d
KLC		 10600nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10601 Elf_Internal_Rela *internal_relocs, int *insn_len,
10602 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10603 Elf_Internal_Shdr *symtab_hdr)
10604{
10605 /* The pattern for LONGCALL5.
10606 bltz rt, .L1 ; LONGCALL5/17_PCREL
10607 jal symbol ; 25_PCREL
10608 .L1: */
35c08157 10609
1c8f6a4d
KLC		 10610 bfd_vma laddr;
10611 uint32_t insn;
10612 Elf_Internal_Rela *cond_irel, *irelend;
1c8f6a4d 10613 bfd_signed_vma foff;
35c08157 10614
1c8f6a4d
KLC		 10615 irelend = internal_relocs + sec->reloc_count;
10616 laddr = irel->r_offset;
10617 insn = bfd_getb32 (contents + laddr);
35c08157 10618
1c8f6a4d
KLC		 10619 /* Get the reloc for the address from which the register is
10620 being loaded. This reloc will tell us which function is
10621 actually being called. */
10622 cond_irel =
10623 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10624 R_NDS32_25_PCREL_RELA, irel->r_addend);
10625 if (cond_irel == irelend)
10626 {
695344c0 10627 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 10628 (uint64_t) irel->r_offset);
0a1b45a2 10629 return false;
1c8f6a4d 10630 }
35c08157 10631
1c8f6a4d 10632 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10633 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 10634
fbaf61ad
NC		 10635 if (foff == 0
10636 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10637 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10638 return false;
35c08157 10639
1c8f6a4d 10640 /* Relax to bgezal rt, label ; 17_PCREL
fbaf61ad 10641 or bltzal rt, label ; 17_PCREL. */
35c08157 10642
1c8f6a4d
KLC		 10643 /* Convert to complimentary conditional call. */
10644 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10645
1c8f6a4d
KLC		 10646 /* For simplicity of coding, we are going to modify the section
10647 contents, the section relocs, and the BFD symbol table. We
10648 must tell the rest of the code not to free up this
10649 information. It would be possible to instead create a table
10650 of changes which have to be made, as is done in coff-mips.c;
10651 that would be more work, but would require less memory when
10652 the linker is run. */
35c08157 10653
1c8f6a4d
KLC		 10654 /* Modify relocation and contents. */
10655 cond_irel->r_info =
10656 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10657
1c8f6a4d
KLC		 10658 /* Replace the long call with a bgezal. */
10659 bfd_putb32 (insn, contents + cond_irel->r_offset);
10660 *insn_len = 0;
35c08157 10661
1c8f6a4d
KLC		 10662 /* Clean unnessary relocations. */
10663 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10664
1c8f6a4d
KLC		 10665 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10666 R_NDS32_17_PCREL_RELA, laddr);
10667 cond_irel->r_info =
10668 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10669
0a1b45a2 10670 return true;
1c8f6a4d 10671}
35c08157 10672
1c8f6a4d 10673/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10674
0a1b45a2 10675static bool
1c8f6a4d
KLC		 10676nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10677 Elf_Internal_Rela *internal_relocs, int *insn_len,
10678 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10679 Elf_Internal_Shdr *symtab_hdr)
10680{
10681 /* The pattern for LONGCALL6.
10682 bltz rt, .L1 ; LONGCALL6/17_PCREL
10683 sethi ta, hi20(symbol) ; HI20/PTR
10684 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10685 jral ta ; PTR_RES/EMPTY/INSN16
10686 .L1 */
10687
10688 bfd_vma laddr;
10689 uint32_t insn;
10690 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
1c8f6a4d 10691 bfd_signed_vma foff;
35c08157 10692
1c8f6a4d
KLC		 10693 irelend = internal_relocs + sec->reloc_count;
10694 laddr = irel->r_offset;
35c08157 10695
1c8f6a4d
KLC		 10696 /* Get the reloc for the address from which the register is
10697 being loaded. This reloc will tell us which function is
10698 actually being called. */
10699 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10700 R_NDS32_EMPTY, irel->r_addend);
35c08157 10701
1c8f6a4d
KLC		 10702 if (em_irel == irelend)
10703 {
695344c0 10704 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 10705 (uint64_t) irel->r_offset);
0a1b45a2 10706 return false;
1c8f6a4d 10707 }
35c08157 10708
1c8f6a4d 10709 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10710 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
35c08157 10711
fbaf61ad
NC		 10712 if (foff == 0
10713 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10714 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10715 return false;
35c08157 10716
1c8f6a4d
KLC		 10717 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10718 insn = bfd_getb32 (contents + irel->r_addend);
10719 if (insn & 0x80000000)
0a1b45a2 10720 return false;
35c08157 10721
1c8f6a4d
KLC		 10722 insn = bfd_getb32 (contents + laddr);
10723 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10724 {
10725 /* Relax to bgezal rt, label ; 17_PCREL
fbaf61ad 10726 or bltzal rt, label ; 17_PCREL. */
35c08157 10727
1c8f6a4d
KLC		 10728 /* Convert to complimentary conditional call. */
10729 *insn_len = 0;
10730 insn = CONVERT_CONDITION_CALL (insn);
10731 bfd_putb32 (insn, contents + em_irel->r_offset);
10732
10733 em_irel->r_info =
10734 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10735
10736 /* Set resolved relocation. */
10737 cond_irel =
10738 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10739 R_NDS32_PTR_RESOLVED, irel->r_addend);
10740 if (cond_irel == irelend)
35c08157 10741 {
695344c0 10742 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10743 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
0a1b45a2 10744 return false;
1c8f6a4d
KLC		 10745 }
10746 cond_irel->r_addend = 1;
35c08157 10747
1c8f6a4d 10748 /* Clear relocations. */
35c08157 10749
1c8f6a4d
KLC		 10750 irel->r_info =
10751 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10752
1c8f6a4d
KLC		 10753 cond_irel =
10754 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10755 R_NDS32_17_PCREL_RELA, laddr);
10756 if (cond_irel != irelend)
10757 cond_irel->r_info =
10758 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10759
1c8f6a4d
KLC		 10760 cond_irel =
10761 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10762 R_NDS32_INSN16, irel->r_addend);
10763 if (cond_irel != irelend)
10764 cond_irel->r_info =
10765 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10766
1c8f6a4d
KLC		 10767 }
10768 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10769 {
10770 /* Relax to the following instruction sequence
10771 bltz rt, .L1 ; LONGCALL2/17_PCREL
10772 jal symbol ; 25_PCREL/PTR_RES
10773 .L1 */
10774 *insn_len = 4;
10775 /* Convert instruction. */
10776 insn = INSN_JAL;
10777 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10778
1c8f6a4d
KLC		 10779 /* Convert relocations. */
10780 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10781 R_NDS32_25_PCREL_RELA);
10782 irel->r_info =
10783 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10784
1c8f6a4d
KLC		 10785 /* Set resolved relocation. */
10786 cond_irel =
10787 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10788 R_NDS32_PTR_RESOLVED, irel->r_addend);
10789 if (cond_irel == irelend)
10790 {
695344c0 10791 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10792 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
0a1b45a2 10793 return false;
1c8f6a4d
KLC		 10794 }
10795 cond_irel->r_addend = 1;
35c08157 10796
1c8f6a4d
KLC		 10797 cond_irel =
10798 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10799 R_NDS32_INSN16, irel->r_addend);
10800 if (cond_irel != irelend)
10801 cond_irel->r_info =
10802 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10803 }
0a1b45a2 10804 return true;
1c8f6a4d 10805}
35c08157 10806
1c8f6a4d 10807/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10808
0a1b45a2 10809static bool
1c8f6a4d
KLC		 10810nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10811 Elf_Internal_Rela *internal_relocs, int *insn_len,
10812 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10813 Elf_Internal_Shdr *symtab_hdr)
10814{
10815 /* The pattern for LONGJUMP4.
10816 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10817 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10818 jr ta ; PTR_RES/INSN16/EMPTY */
10819
10820 bfd_vma laddr;
10821 int seq_len; /* Original length of instruction sequence. */
10822 uint32_t insn;
10823 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
1c8f6a4d 10824 bfd_signed_vma foff;
35c08157 10825
1c8f6a4d
KLC		 10826 irelend = internal_relocs + sec->reloc_count;
10827 seq_len = GET_SEQ_LEN (irel->r_addend);
10828 laddr = irel->r_offset;
10829 *insn_len = seq_len;
35c08157 10830
1c8f6a4d
KLC		 10831 /* Get the reloc for the address from which the register is
10832 being loaded. This reloc will tell us which function is
10833 actually being called. */
35c08157 10834
1c8f6a4d
KLC		 10835 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10836 R_NDS32_HI20_RELA, laddr);
35c08157 10837
1c8f6a4d
KLC		 10838 if (hi_irel == irelend)
10839 {
695344c0 10840 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10841 (uint64_t) irel->r_offset);
0a1b45a2 10842 return false;
1c8f6a4d 10843 }
35c08157 10844
1c8f6a4d 10845 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10846 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
35c08157 10847
fbaf61ad
NC		 10848 if (foff == 0
10849 || foff >= CONSERVATIVE_24BIT_S1
1c8f6a4d 10850 || foff < -CONSERVATIVE_24BIT_S1)
0a1b45a2 10851 return false;
35c08157 10852
1c8f6a4d
KLC		 10853 /* Convert it to "j label", it may be converted to j8 in the final
10854 pass of relaxation. Therefore, we do not consider this currently. */
10855 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10856 R_NDS32_PTR_RESOLVED, irel->r_addend);
10857 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10858 R_NDS32_EMPTY, irel->r_addend);
35c08157 10859
1c8f6a4d
KLC		 10860 if (ptr_irel == irelend || em_irel == irelend)
10861 {
695344c0 10862 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10863 (uint64_t) irel->r_offset);
0a1b45a2 10864 return false;
1c8f6a4d 10865 }
35c08157 10866
1c8f6a4d
KLC		 10867 em_irel->r_info =
10868 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10869 ptr_irel->r_addend = 1;
35c08157 10870
1c8f6a4d
KLC		 10871 /* Write instruction. */
10872 insn = INSN_J;
10873 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10874
1c8f6a4d
KLC		 10875 /* Clear relocations. */
10876 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10877
1c8f6a4d
KLC		 10878 /* If there is function cse, HI20 can not remove now. */
10879 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10880 R_NDS32_LONGJUMP4, laddr);
10881 if (call_irel == irelend)
10882 {
10883 *insn_len = 0;
10884 hi_irel->r_info =
10885 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10886 }
35c08157 10887
0a1b45a2 10888 return true;
1c8f6a4d 10889}
35c08157 10890
1c8f6a4d 10891/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10892
0a1b45a2 10893static bool
1c8f6a4d
KLC		 10894nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10895 Elf_Internal_Rela *internal_relocs, int *insn_len,
10896 int *seq_len, bfd_byte *contents,
10897 Elf_Internal_Sym *isymbuf,
10898 Elf_Internal_Shdr *symtab_hdr)
10899{
10900 /* There are 2 variations for LONGJUMP5
10901 case 2-4; 1st insn convertible, 16-bit on.
10902 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10903 j label ; 25_PCREL/INSN16
10904 $1:
10905
10906 case 4-4; 1st insn not convertible
10907 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10908 j label ; 25_PCREL/INSN16
10909 .L1: */
10910
10911 bfd_vma laddr;
10912 Elf_Internal_Rela *cond_irel, *irelend;
1c8f6a4d
KLC		 10913 unsigned int i;
10914 bfd_signed_vma foff;
10915 uint32_t insn, re_insn = 0;
10916 uint16_t insn16, re_insn16 = 0;
10917 unsigned long reloc;
35c08157 10918
1c8f6a4d
KLC		 10919 enum elf_nds32_reloc_type checked_types[] =
10920 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10921 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10922
1c8f6a4d
KLC		 10923 irelend = internal_relocs + sec->reloc_count;
10924 laddr = irel->r_offset;
35c08157 10925
1c8f6a4d
KLC		 10926 /* Get the reloc for the address from which the register is
10927 being loaded. This reloc will tell us which function is
10928 actually being called. */
35c08157 10929
1c8f6a4d
KLC		 10930 cond_irel =
10931 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10932 R_NDS32_25_PCREL_RELA, irel->r_addend);
10933 if (cond_irel == irelend)
10934 {
695344c0 10935 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10936 (uint64_t) irel->r_offset);
0a1b45a2 10937 return false;
1c8f6a4d 10938 }
35c08157 10939
1c8f6a4d 10940 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10941 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 10942
fbaf61ad
NC		 10943 if (foff == 0
10944 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10945 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10946 return false;
35c08157 10947
1c8f6a4d
KLC		 10948 /* Get the all corresponding instructions. */
10949 insn = bfd_getb32 (contents + laddr);
10950 /* Check instruction size. */
10951 if (insn & 0x80000000)
10952 {
10953 *seq_len = 0;
10954 insn16 = insn >> 16;
10955 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10956 }
10957 else
10958 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10959
1c8f6a4d
KLC		 10960 if (N32_OP6 (re_insn) == N32_OP6_BR1
10961 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10962 {
10963 /* beqs label ; 15_PCREL. */
10964 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10965 reloc = R_NDS32_15_PCREL_RELA;
10966 }
10967 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10968 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10969 {
10970 /* beqz label ; 17_PCREL. */
10971 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10972 reloc = R_NDS32_17_PCREL_RELA;
10973 }
10974 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10975 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10976 {
10977 /* beqc label ; 9_PCREL. */
10978 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10979 reloc = R_NDS32_WORD_9_PCREL_RELA;
10980 }
10981 else
0a1b45a2 10982 return false;
35c08157 10983
1c8f6a4d
KLC		 10984 /* Set all relocations. */
10985 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10986
1c8f6a4d
KLC		 10987 /* Clean relocations. */
10988 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
fbaf61ad 10989 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10990 {
10991 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10992 checked_types[i], laddr);
10993 if (cond_irel != irelend)
10994 {
10995 if (*seq_len == 0
10996 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10997 {
1c8f6a4d
KLC		 10998 /* If the branch instruction is 2 byte, it cannot remove
10999 directly. Only convert it to nop16 and remove it after
11000 checking alignment issue. */
11001 insn16 = NDS32_NOP16;
11002 bfd_putb16 (insn16, contents + laddr);
11003 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 11004 }
11005 else
1c8f6a4d
KLC		 11006 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11007 R_NDS32_NONE);
35c08157 11008 }
1c8f6a4d
KLC		 11009 }
11010 *insn_len = 0;
35c08157 11011
0a1b45a2 11012 return true;
1c8f6a4d 11013}
35c08157 11014
1c8f6a4d 11015/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 11016
0a1b45a2 11017static bool
1c8f6a4d
KLC		 11018nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11019 Elf_Internal_Rela *internal_relocs, int *insn_len,
11020 int *seq_len, bfd_byte *contents,
11021 Elf_Internal_Sym *isymbuf,
11022 Elf_Internal_Shdr *symtab_hdr)
11023{
11024 /* There are 5 variations for LONGJUMP6
11025 case : 2-4-4-4; 1st insn convertible, 16-bit on.
11026 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
11027 sethi ta, hi20(symbol) ; HI20/PTR
11028 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
11029 jr ta ; PTR_RES/INSN16/EMPTY
11030 .L1:
11031
11032 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
11033 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
11034 sethi ta, hi20(symbol) ; HI20/PTR
11035 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
11036 jr ta ; PTR_RES/INSN16/EMPTY
11037 .L1: */
11038
11039 enum elf_nds32_reloc_type checked_types[] =
11040 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
11041 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
11042
11043 int reloc_off = 0, cond_removed = 0;
11044 bfd_vma laddr;
11045 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
1c8f6a4d
KLC		 11046 unsigned int i;
11047 bfd_signed_vma foff;
11048 uint32_t insn, re_insn = 0;
11049 uint16_t insn16, re_insn16 = 0;
11050 unsigned long reloc;
35c08157 11051
1c8f6a4d
KLC		 11052 irelend = internal_relocs + sec->reloc_count;
11053 laddr = irel->r_offset;
35c08157 11054
1c8f6a4d
KLC		 11055 /* Get the reloc for the address from which the register is
11056 being loaded. This reloc will tell us which function is
11057 actually being called. */
11058 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11059 R_NDS32_EMPTY, irel->r_addend);
35c08157 11060
1c8f6a4d
KLC		 11061 if (em_irel == irelend)
11062 {
695344c0 11063 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 11064 (uint64_t) irel->r_offset);
0a1b45a2 11065 return false;
1c8f6a4d 11066 }
35c08157 11067
1c8f6a4d 11068 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 11069 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
35c08157 11070
fbaf61ad
NC		 11071 if (foff == 0
11072 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 11073 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 11074 return false;
35c08157 11075
1c8f6a4d
KLC		 11076 insn = bfd_getb32 (contents + laddr);
11077 /* Check instruction size. */
11078 if (insn & 0x80000000)
11079 {
11080 *seq_len = 0;
11081 insn16 = insn >> 16;
11082 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
11083 }
11084 else
11085 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 11086
1c8f6a4d
KLC		 11087 /* For simplicity of coding, we are going to modify the section
11088 contents, the section relocs, and the BFD symbol table. We
11089 must tell the rest of the code not to free up this
11090 information. It would be possible to instead create a table
11091 of changes which have to be made, as is done in coff-mips.c;
11092 that would be more work, but would require less memory when
11093 the linker is run. */
35c08157 11094
1c8f6a4d
KLC		 11095 if (N32_OP6 (re_insn) == N32_OP6_BR1
11096 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
11097 {
fbaf61ad 11098 /* beqs label ; 15_PCREL. */
1c8f6a4d
KLC		 11099 bfd_putb32 (re_insn, contents + em_irel->r_offset);
11100 reloc = R_NDS32_15_PCREL_RELA;
11101 cond_removed = 1;
11102 }
11103 else if (N32_OP6 (re_insn) == N32_OP6_BR2
11104 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
11105 {
fbaf61ad 11106 /* beqz label ; 17_PCREL. */
1c8f6a4d
KLC		 11107 bfd_putb32 (re_insn, contents + em_irel->r_offset);
11108 reloc = R_NDS32_17_PCREL_RELA;
11109 cond_removed = 1;
11110 }
11111 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
11112 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
11113 {
11114 /* Relax to one of the following 2 variations
35c08157 11115
1c8f6a4d
KLC		 11116 case 2-4; 1st insn convertible, 16-bit on.
11117 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
11118 j label ; 25_PCREL/INSN16
11119 $1:
35c08157 11120
1c8f6a4d
KLC		 11121 case 4-4; 1st insn not convertible
11122 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
11123 j label ; 25_PCREL/INSN16
11124 .L1: */
35c08157 11125
1c8f6a4d
KLC		 11126 /* Use j label as second instruction. */
11127 insn = INSN_J;
11128 reloc = R_NDS32_25_PCREL_RELA;
11129 bfd_putb32 (insn, contents + em_irel->r_offset);
11130 }
11131 else
0a1b45a2 11132 return false;
35c08157 11133
1c8f6a4d
KLC		 11134 /* Set all relocations. */
11135 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 11136
1c8f6a4d
KLC		 11137 cond_irel =
11138 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11139 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
11140 cond_irel->r_addend = 1;
35c08157 11141
1c8f6a4d
KLC		 11142 /* Use INSN16 of first branch instruction to distinguish if keeping
11143 INSN16 of final instruction or not. */
11144 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11145 R_NDS32_INSN16, irel->r_offset);
11146 if (insn_irel == irelend)
11147 {
11148 /* Clean the final INSN16. */
11149 insn_irel =
11150 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11151 R_NDS32_INSN16, em_irel->r_offset);
11152 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11153 R_NDS32_NONE);
11154 }
11155
11156 if (cond_removed == 1)
11157 {
11158 *insn_len = 0;
11159
11160 /* Clear relocations. */
11161 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11162
fbaf61ad 11163 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11164 {
11165 cond_irel =
11166 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11167 checked_types[i], laddr);
11168 if (cond_irel != irelend)
35c08157 11169 {
1c8f6a4d
KLC		 11170 if (*seq_len == 0
11171 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
11172 {
11173 /* If the branch instruction is 2 byte, it cannot remove
11174 directly. Only convert it to nop16 and remove it after
11175 checking alignment issue. */
11176 insn16 = NDS32_NOP16;
11177 bfd_putb16 (insn16, contents + laddr);
11178 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
11179 }
11180 else
11181 cond_irel->r_info =
11182 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 11183 }
35c08157 11184 }
1c8f6a4d
KLC		 11185 }
11186 else
11187 {
11188 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11189 R_NDS32_LONGJUMP5);
11190 }
35c08157 11191
0a1b45a2 11192 return true;
1c8f6a4d 11193}
35c08157 11194
1c8f6a4d 11195/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 11196
0a1b45a2 11197static bool
1c8f6a4d
KLC		 11198nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11199 Elf_Internal_Rela *internal_relocs, int *insn_len,
11200 int *seq_len, bfd_byte *contents,
11201 Elf_Internal_Sym *isymbuf,
11202 Elf_Internal_Shdr *symtab_hdr)
11203{
11204 /* There are 2 variations for LONGJUMP5
11205 case 2-4; 1st insn convertible, 16-bit on.
11206 movi55 ta, imm11 ; LONGJUMP7/INSN16
11207 beq rt, ta, label ; 15_PCREL
11208
11209 case 4-4; 1st insn not convertible
11210 movi55 ta, imm11 ; LONGJUMP7/INSN16
11211 beq rt, ta, label ; 15_PCREL */
11212
11213 bfd_vma laddr;
11214 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
1c8f6a4d
KLC		 11215 bfd_signed_vma foff;
11216 uint32_t insn, re_insn = 0;
11217 uint16_t insn16;
11218 uint32_t imm11;
35c08157 11219
1c8f6a4d
KLC		 11220 irelend = internal_relocs + sec->reloc_count;
11221 laddr = irel->r_offset;
35c08157 11222
1c8f6a4d
KLC		 11223 /* Get the reloc for the address from which the register is
11224 being loaded. This reloc will tell us which function is
11225 actually being called. */
35c08157 11226
1c8f6a4d
KLC		 11227 cond_irel =
11228 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11229 R_NDS32_15_PCREL_RELA, irel->r_addend);
11230 if (cond_irel == irelend)
11231 {
695344c0 11232 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 11233 (uint64_t) irel->r_offset);
0a1b45a2 11234 return false;
1c8f6a4d 11235 }
35c08157 11236
1c8f6a4d 11237 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 11238 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 11239
fbaf61ad
NC		 11240 if (foff == 0
11241 || foff < -CONSERVATIVE_8BIT_S1
1c8f6a4d 11242 || foff >= CONSERVATIVE_8BIT_S1)
0a1b45a2 11243 return false;
35c08157 11244
1c8f6a4d
KLC		 11245 /* Get the first instruction for its size. */
11246 insn = bfd_getb32 (contents + laddr);
11247 if (insn & 0x80000000)
11248 {
11249 *seq_len = 0;
11250 /* Get the immediate from movi55. */
11251 imm11 = N16_IMM5S (insn >> 16);
11252 }
11253 else
11254 {
11255 /* Get the immediate from movi. */
11256 imm11 = N32_IMM20S (insn);
35c08157
KLC		 11257 }
11258
1c8f6a4d
KLC		 11259 /* Get the branch instruction. */
11260 insn = bfd_getb32 (contents + irel->r_addend);
11261 /* Convert instruction to BR3. */
11262 if ((insn >> 14) & 0x1)
11263 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
11264 else
11265 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 11266
1c8f6a4d 11267 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 11268
1c8f6a4d
KLC		 11269 /* Set all relocations. */
11270 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11271 R_NDS32_WORD_9_PCREL_RELA);
11272
11273 /* Clean relocations. */
11274 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11275 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11276 R_NDS32_INSN16, irel->r_offset);
11277 if (insn_irel != irelend)
11278 {
11279 if (*seq_len == 0)
35c08157 11280 {
1c8f6a4d
KLC		 11281 /* If the first insntruction is 16bit, convert it to nop16. */
11282 insn16 = NDS32_NOP16;
11283 bfd_putb16 (insn16, contents + laddr);
11284 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 11285 }
1c8f6a4d
KLC		 11286 else
11287 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11288 R_NDS32_NONE);
35c08157 11289 }
1c8f6a4d 11290 *insn_len = 0;
35c08157 11291
0a1b45a2 11292 return true;
1c8f6a4d 11293}
35c08157 11294
fbaf61ad
NC		 11295/* We figure out and reassign the best gp value in nds32_elf_final_sda_base
11296 for each relax round. But the gp may changed dramatically and then cause
11297 the truncated to fit errors for the the converted gp instructions.
11298 Therefore, we must reserve the minimum but safe enough size to prevent it. */
11299
0a1b45a2 11300static bool
fbaf61ad 11301nds32_elf_relax_guard (bfd_vma *access_addr, bfd_vma local_sda, asection *sec,
0a1b45a2
AM		 11302 Elf_Internal_Rela *irel, bool *again,
11303 bool init,
fbaf61ad
NC		 11304 struct elf_nds32_link_hash_table *table,
11305 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
11306
11307{
11308 int offset_to_gp;
0a1b45a2 11309 static bool sec_pass = false;
fbaf61ad
NC		 11310 static asection *first_sec = NULL, *sym_sec;
11311 /* Record the number of instructions which may be removed. */
11312 static int count = 0, record_count;
11313 Elf_Internal_Sym *isym;
11314 struct elf_link_hash_entry *h = NULL;
11315 int indx;
11316 unsigned long r_symndx;
11317 bfd *abfd = sec->owner;
11318 static bfd_vma record_sda = 0;
11319 int sda_offset = 0;
11320
11321 /* Force doing relaxation when hyper-relax is high. */
11322 if (table->hyper_relax == 2)
0a1b45a2 11323 return true;
fbaf61ad
NC		 11324
11325 /* Do not relax the load/store patterns for the first
11326 relax round. */
11327 if (init)
11328 {
11329 if (!first_sec)
11330 first_sec = sec;
11331 else if (first_sec == sec)
11332 {
11333 record_count = count;
11334 count = 0;
0a1b45a2 11335 sec_pass = true;
fbaf61ad
NC		 11336 }
11337
11338 if (!sec_pass)
0a1b45a2 11339 *again = true;
fbaf61ad 11340
0a1b45a2 11341 return true;
fbaf61ad
NC		 11342 }
11343
11344 /* Generally, _SDA_BASE_ is fixed or smaller. But the large
11345 DATA_SEGMENT_ALIGN size in the linker script may make it
11346 get even bigger. */
11347 if (record_sda == 0)
11348 record_sda = local_sda;
11349 else if (local_sda > record_sda)
11350 sda_offset = local_sda - record_sda;
11351
11352 /* Assume the instruction will be removed in the best case. */
11353 count++;
11354
11355 /* We record the offset to gp for each symbol, and then check
11356 if it is changed dramatically after relaxing.
11357 (global symbol): elf32_nds32_hash_entry (h)->offset_to_gp
11358 (local symbol) : elf32_nds32_local_gp_offset (abfd)[r_symndx]. */
11359 r_symndx = ELF32_R_SYM (irel->r_info);
11360 if (r_symndx >= symtab_hdr->sh_info)
11361 {
11362 /* Global symbols. */
11363 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11364 h = elf_sym_hashes (abfd)[indx];
11365 sym_sec = h->root.u.def.section;
11366 if (NDS32_GUARD_SEC_P (sym_sec->flags)
11367 || bfd_is_abs_section (sym_sec))
11368 {
11369 /* Forbid doing relaxation when hyper-relax is low. */
11370 if (table->hyper_relax == 0)
0a1b45a2 11371 return false;
fbaf61ad
NC		 11372
11373 offset_to_gp = *access_addr - local_sda;
11374 if (elf32_nds32_hash_entry (h)->offset_to_gp == 0)
11375 elf32_nds32_hash_entry (h)->offset_to_gp = offset_to_gp;
11376 else if (abs (elf32_nds32_hash_entry (h)->offset_to_gp)
11377 < abs (offset_to_gp) - sda_offset)
11378 {
11379 /* This may cause the error, so we reserve the
11380 safe enough size for relaxing. */
11381 if (*access_addr >= local_sda)
11382 *access_addr += (record_count * 4);
11383 else
11384 *access_addr -= (record_count * 4);
11385 }
11386 return sec_pass;
11387 }
11388 }
11389 else
11390 {
11391 /* Local symbols. */
11392 if (!elf32_nds32_allocate_local_sym_info (abfd))
0a1b45a2 11393 return false;
fbaf61ad
NC		 11394 isym = isymbuf + r_symndx;
11395
11396 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
11397 if (NDS32_GUARD_SEC_P (sym_sec->flags))
11398 {
11399 /* Forbid doing relaxation when hyper-relax is low. */
11400 if (table->hyper_relax == 0)
0a1b45a2 11401 return false;
fbaf61ad
NC		 11402
11403 offset_to_gp = *access_addr - local_sda;
11404 if (elf32_nds32_local_gp_offset (abfd)[r_symndx] == 0)
11405 elf32_nds32_local_gp_offset (abfd)[r_symndx] = offset_to_gp;
11406 else if (abs (elf32_nds32_local_gp_offset (abfd)[r_symndx])
11407 < abs (offset_to_gp) - sda_offset)
11408 {
11409 /* This may cause the error, so we reserve the
11410 safe enough size for relaxing. */
11411 if (*access_addr >= local_sda)
11412 *access_addr += (record_count * 4);
11413 else
11414 *access_addr -= (record_count * 4);
11415 }
11416 return sec_pass;
11417 }
11418 }
11419
0a1b45a2 11420 return true;
fbaf61ad
NC		 11421}
11422
1c8f6a4d 11423#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 11424
1c8f6a4d 11425/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 11426
0a1b45a2 11427static bool
1c8f6a4d
KLC		 11428nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
11429 asection *sec, Elf_Internal_Rela *irel,
11430 Elf_Internal_Rela *internal_relocs, int *insn_len,
11431 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
fbaf61ad
NC		 11432 Elf_Internal_Shdr *symtab_hdr, int load_store_relax,
11433 struct elf_nds32_link_hash_table *table)
1c8f6a4d 11434{
6cae483a
AM		 11435 int eliminate_sethi = 0, range_type;
11436 unsigned int i;
1c8f6a4d
KLC		 11437 bfd_vma local_sda, laddr;
11438 int seq_len; /* Original length of instruction sequence. */
11439 uint32_t insn;
11440 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
11441 bfd_vma access_addr = 0;
11442 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
fbaf61ad
NC		 11443 struct elf_link_hash_entry *h = NULL;
11444 int indx;
1c8f6a4d
KLC		 11445 enum elf_nds32_reloc_type checked_types[] =
11446 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
11447 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
11448 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
11449 R_NDS32_TLS_LE_HI20
11450 };
35c08157 11451
1c8f6a4d
KLC		 11452 irelend = internal_relocs + sec->reloc_count;
11453 seq_len = GET_SEQ_LEN (irel->r_addend);
11454 laddr = irel->r_offset;
11455 *insn_len = seq_len;
35c08157 11456
1c8f6a4d 11457 /* Get the high part relocation. */
6cae483a 11458 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11459 {
11460 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11461 checked_types[i], laddr);
11462 if (hi_irelfn != irelend)
11463 break;
11464 }
35c08157 11465
1c8f6a4d
KLC		 11466 if (hi_irelfn == irelend)
11467 {
fbaf61ad
NC		 11468 /* Not R_NDS32_HI20_RELA. */
11469 if (i != 0)
11470 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
11471 (uint64_t) irel->r_offset);
0a1b45a2 11472 return false;
1c8f6a4d 11473 }
35c08157 11474
1c8f6a4d
KLC		 11475 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
11476 nds32_elf_final_sda_base (sec->output_section->owner,
0a1b45a2 11477 link_info, &local_sda, false);
35c08157 11478
1c8f6a4d
KLC		 11479 switch (ELF32_R_TYPE (hi_irelfn->r_info))
11480 {
11481 case R_NDS32_HI20_RELA:
11482 insn = bfd_getb32 (contents + laddr);
11483 access_addr =
11484 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
11485
fbaf61ad 11486 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
1c8f6a4d 11487 {
fbaf61ad
NC		 11488 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
11489 h = elf_sym_hashes (abfd)[indx];
11490 }
35c08157 11491
fbaf61ad
NC		 11492 /* Try movi. */
11493 if (range_type == NDS32_LOADSTORE_IMM
11494 && access_addr < CONSERVATIVE_20BIT
11495 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
11496 {
11497 eliminate_sethi = 1;
11498 break;
11499 }
1c8f6a4d 11500
fbaf61ad
NC		 11501 if (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0)
11502 {
11503 eliminate_sethi = 1;
11504 break;
1c8f6a4d 11505 }
fbaf61ad 11506 else if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, hi_irelfn,
0a1b45a2
AM		 11507 NULL, false, table, isymbuf, symtab_hdr))
11508 return false;
1c8f6a4d
KLC		 11509
11510 if (!load_store_relax)
0a1b45a2 11511 return false;
1c8f6a4d
KLC		 11512
11513 /* Case for set gp register. */
11514 if (N32_RT5 (insn) == REG_GP)
0a1b45a2 11515 return false;
1c8f6a4d
KLC		 11516
11517 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 11518 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 11519 {
11520 range_l = sdata_range[0][0];
11521 range_h = sdata_range[0][1];
11522 }
11523 else
11524 {
11525 range_l = sdata_range[1][0];
11526 range_h = sdata_range[1][1];
11527 }
11528 break;
11529
1c8f6a4d 11530 default:
0a1b45a2 11531 return false;
1c8f6a4d
KLC		 11532 }
11533
11534 /* Delete sethi instruction. */
11535 if (eliminate_sethi == 1
11536 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
11537 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11538 {
11539 hi_irelfn->r_info =
11540 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
11541 irel->r_info =
11542 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11543 *insn_len = 0;
0a1b45a2 11544 return true;
1c8f6a4d 11545 }
fbaf61ad 11546
0a1b45a2 11547 return false;
1c8f6a4d
KLC		 11548}
11549
11550/* Relax LO12 relocation for nds32_elf_relax_section. */
11551
11552static void
11553nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
11554 asection *sec, Elf_Internal_Rela *irel,
11555 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
fbaf61ad
NC		 11556 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
11557 struct elf_nds32_link_hash_table *table)
1c8f6a4d
KLC		 11558{
11559 uint32_t insn;
11560 bfd_vma local_sda, laddr;
11561 unsigned long reloc;
11562 bfd_vma access_addr;
11563 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
11564 Elf_Internal_Rela *irelfn = NULL, *irelend;
11565 struct elf_link_hash_entry *h = NULL;
11566 int indx;
11567
11568 /* For SDA base relative relaxation. */
11569 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 11570 &local_sda, false);
1c8f6a4d
KLC		 11571
11572 irelend = internal_relocs + sec->reloc_count;
11573 laddr = irel->r_offset;
11574 insn = bfd_getb32 (contents + laddr);
11575
11576 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
11577 return;
11578
11579 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11580
11581 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
11582 {
11583 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11584 h = elf_sym_hashes (abfd)[indx];
11585 }
11586
fbaf61ad 11587 /* Try movi. */
1c8f6a4d
KLC		 11588 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
11589 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
11590 {
11591 reloc = R_NDS32_20_RELA;
11592 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11593 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11594 bfd_putb32 (insn, contents + laddr);
11595 }
1c8f6a4d
KLC		 11596 else
11597 {
fbaf61ad
NC		 11598 if (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0)
11599 {
11600 /* Fall through. */
11601 }
11602 else if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, irel, NULL,
0a1b45a2 11603 false, table, isymbuf, symtab_hdr))
fbaf61ad
NC		 11604 return;
11605
1c8f6a4d
KLC		 11606 range_l = sdata_range[1][0];
11607 range_h = sdata_range[1][1];
11608 switch (ELF32_R_TYPE (irel->r_info))
11609 {
11610 case R_NDS32_LO12S0_RELA:
11611 reloc = R_NDS32_SDA19S0_RELA;
11612 break;
11613 case R_NDS32_LO12S1_RELA:
11614 reloc = R_NDS32_SDA18S1_RELA;
11615 break;
11616 case R_NDS32_LO12S2_RELA:
11617 reloc = R_NDS32_SDA17S2_RELA;
11618 break;
11619 case R_NDS32_LO12S2_DP_RELA:
11620 range_l = sdata_range[0][0];
11621 range_h = sdata_range[0][1];
11622 reloc = R_NDS32_SDA12S2_DP_RELA;
11623 break;
11624 case R_NDS32_LO12S2_SP_RELA:
11625 range_l = sdata_range[0][0];
11626 range_h = sdata_range[0][1];
11627 reloc = R_NDS32_SDA12S2_SP_RELA;
11628 break;
11629 default:
11630 return;
11631 }
11632
11633 /* There are range_h and range_l because linker has to promise
11634 all sections move cross one page together. */
11635 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
fbaf61ad
NC		 11636 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)
11637 || (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0))
1c8f6a4d
KLC		 11638 {
11639 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11640 {
1c8f6a4d
KLC		 11641 /* Maybe we should add R_NDS32_INSN16 reloc type here
11642 or manually do some optimization. sethi can't be
11643 eliminated when updating $gp so the relative ori
11644 needs to be preserved. */
11645 return;
35c08157 11646 }
1c8f6a4d
KLC		 11647 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11648 &insn))
11649 return;
11650 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11651 bfd_putb32 (insn, contents + laddr);
11652
11653 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11654 R_NDS32_INSN16);
11655 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11656 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11657 irelfn->r_info =
11658 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11659
35c08157 11660 }
1c8f6a4d
KLC		 11661 }
11662 return;
11663}
35c08157 11664
1c8f6a4d 11665/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11666
0a1b45a2 11667static bool
1c8f6a4d
KLC		 11668nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11669 Elf_Internal_Rela *internal_relocs, int *insn_len,
11670 int *seq_len, bfd_byte *contents)
11671{
11672 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11673
1c8f6a4d 11674 irelend = internal_relocs + sec->reloc_count;
35c08157 11675
1c8f6a4d
KLC		 11676 re_irel =
11677 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11678 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11679
1c8f6a4d
KLC		 11680 if (re_irel == irelend)
11681 {
695344c0 11682 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11683 (uint64_t) irel->r_offset);
0a1b45a2 11684 return false;
1c8f6a4d 11685 }
35c08157 11686
1c8f6a4d 11687 if (re_irel->r_addend != 1)
0a1b45a2 11688 return false;
35c08157 11689
1c8f6a4d
KLC		 11690 /* Pointed target is relaxed and no longer needs this void *,
11691 change the type to NONE. */
11692 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11693
1c8f6a4d
KLC		 11694 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11695 not exist, it means only count 1 and remove it directly. */
11696 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11697 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11698 R_NDS32_PTR_COUNT);
11699 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11700 R_NDS32_PTR);
11701 if (count_irel != irelend)
11702 {
11703 if (--count_irel->r_addend > 0)
0a1b45a2 11704 return false;
1c8f6a4d
KLC		 11705 }
11706
11707 if (ptr_irel != irelend)
0a1b45a2 11708 return false;
1c8f6a4d
KLC		 11709
11710 /* If the PTR_COUNT is already 0, remove current instruction. */
11711 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11712 *insn_len = 0;
0a1b45a2 11713 return true;
1c8f6a4d
KLC		 11714}
11715
fbaf61ad 11716/* Relax LWC relocation for nds32_elf_relax_section. */
1c8f6a4d
KLC		 11717
11718static void
fbaf61ad
NC		 11719nds32_elf_relax_flsi (struct bfd_link_info *link_info, bfd *abfd,
11720 asection *sec, Elf_Internal_Rela *irel,
11721 Elf_Internal_Rela *internal_relocs,
11722 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
0a1b45a2 11723 Elf_Internal_Shdr *symtab_hdr, bool *again)
1c8f6a4d 11724{
fbaf61ad
NC		 11725 /* Pattern:
11726 sethi ra, hi20(symbol) ; HI20/LOADSTORE
11727 ori ra, ra, lo12(symbol) ; LO12S0/PTR/PTR/.../INSN16
11728 flsi fsa, [ra + offset1] ; LSI/PTR_RESOLVED/INSN16
11729 flsi fsb, [ra + offset2] ; LSI/PTR_RESOLVED/INSN16
11730 ... */
11731
1c8f6a4d 11732 uint32_t insn;
1c8f6a4d 11733 bfd_vma local_sda, laddr;
fbaf61ad
NC		 11734 unsigned long reloc;
11735 bfd_vma access_addr, flsi_offset;
11736 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
11737 Elf_Internal_Rela *irelend, *re_irel;
11738 unsigned int opcode;
1c8f6a4d
KLC		 11739
11740 irelend = internal_relocs + sec->reloc_count;
11741 laddr = irel->r_offset;
11742 insn = bfd_getb32 (contents + laddr);
11743
fbaf61ad 11744 if ((insn & 0x80000000) || !is_sda_access_insn (insn))
1c8f6a4d
KLC		 11745 return;
11746
fbaf61ad
NC		 11747 /* Can not do relaxation for bi format. */
11748 if ((insn & 0x1000))
1c8f6a4d
KLC		 11749 return;
11750
fbaf61ad
NC		 11751 /* Only deal with flsi, fssi, fldi, fsdi, so far. */
11752 opcode = N32_OP6 (insn);
11753 if ((opcode == N32_OP6_LWC) || (opcode == N32_OP6_SWC))
11754 reloc = R_NDS32_SDA12S2_SP_RELA;
11755 else if ((opcode == N32_OP6_LDC) || (opcode == N32_OP6_SDC))
11756 reloc = R_NDS32_SDA12S2_DP_RELA;
1c8f6a4d
KLC		 11757 else
11758 return;
11759
fbaf61ad
NC		 11760 re_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11761 R_NDS32_PTR_RESOLVED);
11762 if (re_irel == irelend)
1c8f6a4d 11763 {
fbaf61ad
NC		 11764 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LSI",
11765 (uint64_t) irel->r_offset);
11766 return;
1c8f6a4d 11767 }
1c8f6a4d 11768
fbaf61ad 11769 /* For SDA base relative relaxation. */
1c8f6a4d 11770 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 11771 &local_sda, false);
fbaf61ad
NC		 11772 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11773 flsi_offset = (insn & 0xfff) << 2;
11774 access_addr += flsi_offset;
11775 range_l = sdata_range[0][0];
11776 range_h = sdata_range[0][1];
1c8f6a4d 11777
fbaf61ad
NC		 11778 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11779 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
1c8f6a4d 11780 {
fbaf61ad
NC		 11781 /* Turn flsi instruction into sda access format. */
11782 insn = (insn & 0x7ff07000) | (REG_GP << 15);
1c8f6a4d 11783
fbaf61ad
NC		 11784 /* Add relocation type to flsi. */
11785 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11786 irel->r_addend += flsi_offset;
11787 bfd_putb32 (insn, contents + re_irel->r_offset);
1c8f6a4d 11788
fbaf61ad 11789 re_irel->r_addend |= 1;
0a1b45a2 11790 *again = true;
1c8f6a4d 11791 }
1c8f6a4d
KLC		 11792}
11793
0a1b45a2 11794static bool
1c8f6a4d
KLC		 11795nds32_relax_adjust_label (bfd *abfd, asection *sec,
11796 Elf_Internal_Rela *internal_relocs,
11797 bfd_byte *contents,
11798 nds32_elf_blank_t **relax_blank_list,
11799 int optimize, int opt_size)
11800{
11801 /* This code block is used to adjust 4-byte alignment by relax a pair
11802 of instruction a time.
11803
11804 It recognizes three types of relocations.
de194d85 11805 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11806 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11807 3. is_16bit_NOP () - remove a 16-bit instruction. */
11808
de194d85
YC		 11809 /* TODO: It seems currently implementation only support 4-byte alignment.
11810 We should handle any-alignment. */
1c8f6a4d
KLC		 11811
11812 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11813 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11814 Elf_Internal_Rela rel_temp;
11815 Elf_Internal_Rela *irelend;
11816 bfd_vma address;
11817 uint16_t insn16;
11818
11819 /* Checking for branch relaxation relies on the relocations to
11820 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11821 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11822 sizeof (Elf_Internal_Rela), compar_reloc);
11823
11824 irelend = internal_relocs + sec->reloc_count;
11825
11826 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11827 /* FIXME: Can we generate the right order in assembler?
11828 So we don't have to swapping them here. */
11829
11830 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11831 label_rel < irelend; label_rel++)
11832 {
11833 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11834 continue;
11835
11836 /* Find the first reloc has the same offset with label_rel. */
11837 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11838 insn_rel++;
11839
11840 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11841 insn_rel++)
11842 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11843 address. */
11844 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11845 break;
11846
11847 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11848 && insn_rel < label_rel)
11849 {
11850 /* Swap the two reloc if the R_NDS32_INSN16 is
11851 before R_NDS32_LABEL. */
11852 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11853 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11854 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11855 }
11856 }
11857
11858 label_rel = NULL;
11859 insn_rel = NULL;
11860 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11861 or higher, remove other R_NDS32_LABEL with lower alignment.
11862 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11863 then the R_NDS32_LABEL sequence is broke. */
11864 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11865 {
11866 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11867 {
11868 if (label_rel == NULL)
11869 {
11870 if (tmp_rel->r_addend < 2)
11871 label_rel = tmp_rel;
11872 continue;
11873 }
11874 else if (tmp_rel->r_addend > 1)
11875 {
11876 /* Remove all LABEL relocation from label_rel to tmp_rel
11877 including relocations with same offset as tmp_rel. */
fbaf61ad 11878 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel; tmp2_rel++)
1c8f6a4d 11879 {
fbaf61ad
NC		 11880 if (tmp2_rel->r_offset == tmp_rel->r_offset)
11881 break;
11882
1c8f6a4d
KLC		 11883 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11884 && tmp2_rel->r_addend < 2)
11885 tmp2_rel->r_info =
11886 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11887 R_NDS32_NONE);
11888 }
11889 label_rel = NULL;
11890 }
11891 }
11892 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11893 {
11894 /* A new INSN16 which can be converted, so clear label_rel. */
11895 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11896 irelend, &insn16)
11897 || is_16bit_NOP (abfd, sec, tmp_rel))
11898 label_rel = NULL;
11899 }
11900 }
11901
11902 label_rel = NULL;
11903 insn_rel = NULL;
11904 /* Optimized for speed and nothing has not been relaxed.
11905 It's time to align labels.
11906 We may convert a 16-bit instruction right before a label to
11907 32-bit, in order to align the label if necessary
11908 all reloc entries has been sorted by r_offset. */
fbaf61ad
NC		 11909 for (irel = internal_relocs;
11910 irel < irelend && irel->r_offset < sec->size; irel++)
1c8f6a4d
KLC		 11911 {
11912 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11913 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11914 continue;
11915
11916 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11917 {
11918 /* A new INSN16 found, resize the old one. */
11919 if (is_convert_32_to_16
11920 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11921 || is_16bit_NOP (abfd, sec, irel))
11922 {
11923 if (insn_rel)
11924 {
11925 /* Previous INSN16 reloc exists, reduce its
11926 size to 16-bit. */
11927 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11928 irelend, &insn16))
35c08157 11929 {
1c8f6a4d
KLC		 11930 nds32_elf_write_16 (abfd, contents, insn_rel,
11931 internal_relocs, irelend, insn16);
11932
11933 if (!insert_nds32_elf_blank_recalc_total
11934 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 11935 return false;
1c8f6a4d
KLC		 11936 }
11937 else if (is_16bit_NOP (abfd, sec, insn_rel))
11938 {
11939 if (!insert_nds32_elf_blank_recalc_total
11940 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 11941 return false;
1c8f6a4d
KLC		 11942 }
11943 insn_rel->r_info =
11944 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11945 }
11946 /* Save the new one for later use. */
11947 insn_rel = irel;
11948 }
11949 else
11950 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11951 R_NDS32_NONE);
11952 }
11953 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11954 {
11955 /* Search for label. */
11956 int force_relax = 0;
11957
11958 /* Label on 16-bit instruction or optimization
11959 needless, just reset this reloc. */
11960 insn16 = bfd_getb16 (contents + irel->r_offset);
11961 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11962 {
11963 irel->r_info =
11964 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11965 continue;
11966 }
11967
11968 address =
11969 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11970 irel->r_offset, 1);
11971
11972 if (!insn_rel)
11973 {
11974 /* Check if there is case which can not be aligned. */
11975 if (irel->r_addend == 2 && address & 0x2)
0a1b45a2 11976 return false;
1c8f6a4d
KLC		 11977 continue;
11978 }
11979
11980 /* Try to align this label. */
11981
11982 if ((irel->r_addend & 0x1f) < 2)
11983 {
11984 /* Check if there is a INSN16 at the same address.
11985 Label_rel always seats before insn_rel after
11986 our sort. */
11987
11988 /* Search for INSN16 at LABEL location. If INSN16 is at
11989 same location and this LABEL alignment is lower than 2,
11990 the INSN16 can be converted to 2-byte. */
11991 for (tmp_rel = irel;
11992 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11993 tmp_rel++)
11994 {
11995 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11996 && (is_convert_32_to_16
11997 (abfd, sec, tmp_rel, internal_relocs,
11998 irelend, &insn16)
11999 || is_16bit_NOP (abfd, sec, tmp_rel)))
12000 {
12001 force_relax = 1;
12002 break;
12003 }
12004 }
12005 }
12006
12007 if (force_relax || irel->r_addend == 1 || address & 0x2)
12008 {
12009 /* Label not aligned. */
12010 /* Previous reloc exists, reduce its size to 16-bit. */
12011 if (is_convert_32_to_16 (abfd, sec, insn_rel,
12012 internal_relocs, irelend, &insn16))
12013 {
12014 nds32_elf_write_16 (abfd, contents, insn_rel,
12015 internal_relocs, irelend, insn16);
12016
12017 if (!insert_nds32_elf_blank_recalc_total
12018 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 12019 return false;
1c8f6a4d
KLC		 12020 }
12021 else if (is_16bit_NOP (abfd, sec, insn_rel))
12022 {
12023 if (!insert_nds32_elf_blank_recalc_total
12024 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 12025 return false;
1c8f6a4d
KLC		 12026 }
12027
12028 }
12029 /* INSN16 reloc is used. */
12030 insn_rel = NULL;
12031 }
12032 }
12033
12034 address =
12035 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
12036 if (insn_rel && (address & 0x2 || opt_size))
12037 {
12038 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
12039 irelend, &insn16))
12040 {
12041 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
12042 irelend, insn16);
12043 if (!insert_nds32_elf_blank_recalc_total
12044 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 12045 return false;
1c8f6a4d
KLC		 12046 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
12047 R_NDS32_NONE);
12048 }
12049 else if (is_16bit_NOP (abfd, sec, insn_rel))
12050 {
12051 if (!insert_nds32_elf_blank_recalc_total
12052 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 12053 return false;
1c8f6a4d
KLC		 12054 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
12055 R_NDS32_NONE);
12056 }
12057 }
12058 insn_rel = NULL;
0a1b45a2 12059 return true;
1c8f6a4d
KLC		 12060}
12061
0a1b45a2 12062static bool
1c8f6a4d 12063nds32_elf_relax_section (bfd *abfd, asection *sec,
0a1b45a2 12064 struct bfd_link_info *link_info, bool *again)
1c8f6a4d
KLC		 12065{
12066 nds32_elf_blank_t *relax_blank_list = NULL;
12067 Elf_Internal_Shdr *symtab_hdr;
12068 Elf_Internal_Rela *internal_relocs;
12069 Elf_Internal_Rela *irel;
12070 Elf_Internal_Rela *irelend;
12071 Elf_Internal_Sym *isymbuf = NULL;
12072 bfd_byte *contents = NULL;
0a1b45a2 12073 bool result = true;
1c8f6a4d
KLC		 12074 int optimize = 0;
12075 int opt_size = 0;
12076 uint32_t insn;
12077 uint16_t insn16;
12078
12079 /* Target dependnet option. */
12080 struct elf_nds32_link_hash_table *table;
12081 int load_store_relax;
1c8f6a4d
KLC		 12082
12083 relax_blank_list = NULL;
12084
0a1b45a2 12085 *again = false;
1c8f6a4d
KLC		 12086
12087 /* Nothing to do for
12088 * relocatable link or
12089 * non-relocatable section or
12090 * non-code section or
12091 * empty content or
12092 * no reloc entry. */
0e1862bb 12093 if (bfd_link_relocatable (link_info)
1c8f6a4d 12094 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 12095 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d 12096 || (sec->flags & SEC_CODE) == 0
fbaf61ad
NC		 12097 || sec->size == 0
12098 || sec->reloc_count == 0)
0a1b45a2 12099 return true;
1c8f6a4d
KLC		 12100
12101 /* 09.12.11 Workaround. */
12102 /* We have to adjust align for R_NDS32_LABEL if needed.
12103 The adjust approach only can fix 2-byte align once. */
12104 if (sec->alignment_power > 2)
0a1b45a2 12105 return true;
1c8f6a4d 12106
fbaf61ad
NC		 12107 /* Do TLS model conversion once at first. */
12108 nds32_elf_unify_tls_model (abfd, sec, contents, link_info);
12109
1c8f6a4d
KLC		 12110 /* The optimization type to do. */
12111
12112 table = nds32_elf_hash_table (link_info);
1c8f6a4d 12113
fbaf61ad
NC		 12114 /* Save the first section for abs symbol relaxation.
12115 This is used for checking gp relaxation in the
12116 nds32_elf_relax_loadstore and nds32_elf_relax_lo12. */
0a1b45a2 12117 nds32_elf_relax_guard (NULL, 0, sec, NULL, again, true,
fbaf61ad
NC		 12118 table, NULL, NULL);
12119
1c8f6a4d
KLC		 12120 /* The begining of general relaxation. */
12121
12122 if (is_SDA_BASE_set == 0)
12123 {
12124 bfd_vma gp;
12125 is_SDA_BASE_set = 1;
12126 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 12127 &gp, false);
c410035d 12128 relax_range_measurement (abfd, link_info);
1c8f6a4d
KLC		 12129 }
12130
1c8f6a4d
KLC		 12131 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12132 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12133 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
0a1b45a2 12134 true /* keep_memory */);
1c8f6a4d
KLC		 12135 if (internal_relocs == NULL)
12136 goto error_return;
12137
12138 irelend = internal_relocs + sec->reloc_count;
12139 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12140 irelend, R_NDS32_RELAX_ENTRY);
12141
12142 if (irel == irelend)
0a1b45a2 12143 return true;
1c8f6a4d
KLC		 12144
12145 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12146 {
12147 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
0a1b45a2 12148 return true;
1c8f6a4d
KLC		 12149
12150 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12151 optimize = 1;
12152
12153 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12154 opt_size = 1;
12155 }
12156
12157 load_store_relax = table->load_store_relax;
12158
12159 /* Get symbol table and section content. */
1781a9d0 12160 contents = NULL;
0a1b45a2 12161 if (!nds32_get_section_contents (abfd, sec, &contents, true)
1c8f6a4d
KLC		 12162 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12163 goto error_return;
12164
12165 /* Do relax loop only when finalize is not done.
12166 Take care of relaxable relocs except INSN16. */
12167 for (irel = internal_relocs; irel < irelend; irel++)
12168 {
12169 int seq_len; /* Original length of instruction sequence. */
12170 int insn_len = 0; /* Final length of instruction sequence. */
0a1b45a2 12171 bool removed;
1c8f6a4d
KLC		 12172
12173 insn = 0;
12174 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12175 && (irel->r_addend & 0x1f) >= 2)
12176 optimize = 1;
12177
12178 /* Relocation Types
12179 R_NDS32_LONGCALL1 53
12180 R_NDS32_LONGCALL2 54
12181 R_NDS32_LONGCALL3 55
12182 R_NDS32_LONGJUMP1 56
12183 R_NDS32_LONGJUMP2 57
12184 R_NDS32_LONGJUMP3 58
12185 R_NDS32_LOADSTORE 59 */
12186 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12187 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12188 seq_len = GET_SEQ_LEN (irel->r_addend);
12189
12190 /* Relocation Types
12191 R_NDS32_LONGCALL4 107
12192 R_NDS32_LONGCALL5 108
12193 R_NDS32_LONGCALL6 109
12194 R_NDS32_LONGJUMP4 110
12195 R_NDS32_LONGJUMP5 111
12196 R_NDS32_LONGJUMP6 112
12197 R_NDS32_LONGJUMP7 113 */
12198 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12199 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12200 seq_len = 4;
12201
12202 /* Relocation Types
12203 R_NDS32_LO12S0_RELA 30
12204 R_NDS32_LO12S1_RELA 29
12205 R_NDS32_LO12S2_RELA 28
12206 R_NDS32_LO12S2_SP_RELA 71
12207 R_NDS32_LO12S2_DP_RELA 70
12208 R_NDS32_GOT_LO12 46
12209 R_NDS32_GOTOFF_LO12 50
12210 R_NDS32_PLTREL_LO12 65
12211 R_NDS32_PLT_GOTREL_LO12 67
12212 R_NDS32_17IFC_PCREL_RELA 96
12213 R_NDS32_GOT_SUFF 193
12214 R_NDS32_GOTOFF_SUFF 194
12215 R_NDS32_PLT_GOT_SUFF 195
12216 R_NDS32_MULCALL_SUFF 196
12217 R_NDS32_PTR 197 */
12218 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12219 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12220 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12221 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12222 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12223 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12224 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12225 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12226 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12227 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12228 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12229 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12230 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12231 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
fbaf61ad
NC		 12232 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS
12233 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LSI)
1c8f6a4d
KLC		 12234 seq_len = 0;
12235 else
12236 continue;
12237
12238 insn_len = seq_len;
0a1b45a2 12239 removed = false;
1c8f6a4d
KLC		 12240
12241 switch (ELF32_R_TYPE (irel->r_info))
12242 {
12243 case R_NDS32_LONGCALL1:
12244 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12245 &insn_len, contents, isymbuf,
12246 symtab_hdr);
12247 break;
12248 case R_NDS32_LONGCALL2:
12249 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12250 &insn_len, contents, isymbuf,
12251 symtab_hdr);
12252 break;
12253 case R_NDS32_LONGCALL3:
12254 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12255 &insn_len, contents, isymbuf,
12256 symtab_hdr);
12257 break;
12258 case R_NDS32_LONGJUMP1:
12259 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12260 &insn_len, contents, isymbuf,
12261 symtab_hdr);
12262 break;
12263 case R_NDS32_LONGJUMP2:
12264 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12265 &insn_len, contents, isymbuf,
12266 symtab_hdr);
12267 break;
12268 case R_NDS32_LONGJUMP3:
12269 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12270 &insn_len, contents, isymbuf,
12271 symtab_hdr);
12272 break;
12273 case R_NDS32_LONGCALL4:
12274 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12275 &insn_len, contents, isymbuf,
12276 symtab_hdr);
12277 break;
12278 case R_NDS32_LONGCALL5:
12279 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12280 &insn_len, contents, isymbuf,
12281 symtab_hdr);
12282 break;
12283 case R_NDS32_LONGCALL6:
12284 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12285 &insn_len, contents, isymbuf,
12286 symtab_hdr);
12287 break;
12288 case R_NDS32_LONGJUMP4:
12289 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12290 &insn_len, contents, isymbuf,
12291 symtab_hdr);
12292 break;
12293 case R_NDS32_LONGJUMP5:
12294 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12295 &insn_len, &seq_len, contents,
12296 isymbuf, symtab_hdr);
12297 break;
12298 case R_NDS32_LONGJUMP6:
12299 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12300 &insn_len, &seq_len, contents,
12301 isymbuf, symtab_hdr);
12302 break;
12303 case R_NDS32_LONGJUMP7:
12304 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12305 &insn_len, &seq_len, contents,
12306 isymbuf, symtab_hdr);
12307 break;
12308 case R_NDS32_LOADSTORE:
12309 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12310 internal_relocs, &insn_len,
12311 contents, isymbuf, symtab_hdr,
fbaf61ad 12312 load_store_relax, table);
1c8f6a4d
KLC		 12313 break;
12314 case R_NDS32_LO12S0_RELA:
12315 case R_NDS32_LO12S1_RELA:
fbaf61ad 12316 case R_NDS32_LO12S2_RELA:
1c8f6a4d
KLC		 12317 case R_NDS32_LO12S2_DP_RELA:
12318 case R_NDS32_LO12S2_SP_RELA:
1c8f6a4d
KLC		 12319 /* Relax for low part. */
12320 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
fbaf61ad 12321 contents, isymbuf, symtab_hdr, table);
1c8f6a4d
KLC		 12322
12323 /* It is impossible to delete blank, so just continue. */
12324 continue;
fbaf61ad
NC		 12325 case R_NDS32_PTR:
12326 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12327 &insn_len, &seq_len, contents);
12328 break;
12329 case R_NDS32_LSI:
12330 nds32_elf_relax_flsi (link_info, abfd, sec, irel, internal_relocs,
12331 contents, isymbuf, symtab_hdr, again);
12332 continue;
1c8f6a4d
KLC		 12333 case R_NDS32_GOT_LO12:
12334 case R_NDS32_GOTOFF_LO12:
12335 case R_NDS32_PLTREL_LO12:
12336 case R_NDS32_PLT_GOTREL_LO12:
12337 case R_NDS32_GOTPC_LO12:
1c8f6a4d 12338 case R_NDS32_TLS_LE_LO12:
1c8f6a4d 12339 case R_NDS32_TLS_LE_ADD:
1c8f6a4d 12340 case R_NDS32_TLS_LE_LS:
1c8f6a4d 12341 case R_NDS32_PLT_GOT_SUFF:
1c8f6a4d 12342 case R_NDS32_GOT_SUFF:
1c8f6a4d 12343 case R_NDS32_GOTOFF_SUFF:
1c8f6a4d
KLC		 12344 continue;
12345 default:
12346 continue;
1c8f6a4d 12347 }
fbaf61ad 12348
1c8f6a4d
KLC		 12349 if (removed && seq_len - insn_len > 0)
12350 {
12351 if (!insert_nds32_elf_blank
12352 (&relax_blank_list, irel->r_offset + insn_len,
12353 seq_len - insn_len))
12354 goto error_return;
0a1b45a2 12355 *again = true;
35c08157 12356 }
1c8f6a4d
KLC		 12357 }
12358
12359 calc_nds32_blank_total (relax_blank_list);
12360
12361 if (table->relax_fp_as_gp)
12362 {
12363 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12364 irelend, isymbuf))
12365 goto error_return;
35c08157 12366
535b785f 12367 if (!*again)
35c08157 12368 {
1c8f6a4d
KLC		 12369 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12370 irelend))
12371 goto error_return;
35c08157
KLC		 12372 }
12373 }
1c8f6a4d 12374
535b785f 12375 if (!*again)
1c8f6a4d
KLC		 12376 {
12377 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12378 &relax_blank_list, optimize, opt_size))
12379 goto error_return;
12380 }
12381
12382 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12383 If object file is assembled with flag '-Os',
12384 the we don't adjust jump-destination on 4-byte boundary. */
12385
12386 if (relax_blank_list)
12387 {
12388 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12389 relax_blank_list = NULL;
12390 }
12391
535b785f 12392 if (!*again)
35c08157
KLC		 12393 {
12394 /* Closing the section, so we don't relax it anymore. */
12395 bfd_vma sec_size_align;
12396 Elf_Internal_Rela *tmp_rel;
12397
12398 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12399 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12400 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12401 if ((sec_size_align - sec->size) & 0x2)
12402 {
12403 insn16 = NDS32_NOP16;
12404 bfd_putb16 (insn16, contents + sec->size);
12405 sec->size += 2;
12406 }
12407
12408 while (sec_size_align != sec->size)
12409 {
12410 insn = NDS32_NOP32;
12411 bfd_putb32 (insn, contents + sec->size);
12412 sec->size += 4;
12413 }
12414
1c8f6a4d
KLC		 12415 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12416 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12417 if (tmp_rel != irelend)
12418 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12419
12420 clean_nds32_elf_blank ();
12421 }
12422
dc1e8a47 12423 finish:
c9594989 12424 if (elf_section_data (sec)->relocs != internal_relocs)
35c08157
KLC		 12425 free (internal_relocs);
12426
c9594989 12427 if (elf_section_data (sec)->this_hdr.contents != contents)
35c08157
KLC		 12428 free (contents);
12429
c9594989 12430 if (symtab_hdr->contents != (bfd_byte *) isymbuf)
35c08157
KLC		 12431 free (isymbuf);
12432
12433 return result;
12434
dc1e8a47 12435 error_return:
0a1b45a2 12436 result = false;
35c08157
KLC		 12437 goto finish;
12438}
12439
12440static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12441{
12442 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12443 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12444 {NULL, 0, 0, 0, 0}
12445};
12446
0a1b45a2 12447static bool
bf577467
AM		 12448nds32_elf_section_flags (const Elf_Internal_Shdr *hdr)
12449{
12450 const char *name = hdr->bfd_section->name;
12451
3f3328b8
ML		 12452 if (startswith (name, ".sbss")
12453 || startswith (name, ".sdata"))
bf577467
AM		 12454 hdr->bfd_section->flags |= SEC_SMALL_DATA;
12455
0a1b45a2 12456 return true;
bf577467
AM		 12457}
12458
0a1b45a2 12459static bool
35c08157
KLC		 12460nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12461 struct bfd_link_info *info,
12462 void *finfo ATTRIBUTE_UNUSED,
37bb890f
AM		 12463 int (*func) (void *, const char *,
12464 Elf_Internal_Sym *,
12465 asection *,
12466 struct elf_link_hash_entry *)
35c08157
KLC		 12467 ATTRIBUTE_UNUSED)
12468{
12469 FILE *sym_ld_script = NULL;
12470 struct elf_nds32_link_hash_table *table;
12471
12472 table = nds32_elf_hash_table (info);
12473 sym_ld_script = table->sym_ld_script;
12474
12475 if (check_start_export_sym)
12476 fprintf (sym_ld_script, "}\n");
12477
0a1b45a2 12478 return true;
35c08157
KLC		 12479}
12480
12481static enum elf_reloc_type_class
12482nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12483 const asection *rel_sec ATTRIBUTE_UNUSED,
12484 const Elf_Internal_Rela *rela)
12485{
12486 switch ((int) ELF32_R_TYPE (rela->r_info))
12487 {
12488 case R_NDS32_RELATIVE:
12489 return reloc_class_relative;
12490 case R_NDS32_JMP_SLOT:
12491 return reloc_class_plt;
12492 case R_NDS32_COPY:
12493 return reloc_class_copy;
12494 default:
12495 return reloc_class_normal;
12496 }
12497}
12498
12499/* Put target dependent option into info hash table. */
12500void
12501bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12502 int relax_fp_as_gp,
12503 int eliminate_gc_relocs,
fbaf61ad
NC		 12504 FILE * sym_ld_script,
12505 int hyper_relax,
12506 int tls_desc_trampoline,
12507 int load_store_relax)
35c08157
KLC		 12508{
12509 struct elf_nds32_link_hash_table *table;
12510
12511 table = nds32_elf_hash_table (link_info);
12512 if (table == NULL)
12513 return;
12514
12515 table->relax_fp_as_gp = relax_fp_as_gp;
12516 table->eliminate_gc_relocs = eliminate_gc_relocs;
12517 table->sym_ld_script = sym_ld_script;
fbaf61ad
NC		 12518 table->hyper_relax = hyper_relax;
12519 table->tls_desc_trampoline = tls_desc_trampoline;
35c08157 12520 table ->load_store_relax = load_store_relax;
35c08157
KLC		 12521}
12522\f
fbaf61ad 12523
35c08157
KLC		 12524/* These functions and data-structures are used for fp-as-gp
12525 optimization. */
12526
12527#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12528/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12529 the read-only section and read-write section. */
12530#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12531
12532/* An nds32_fag represent a gp-relative access.
12533 We find best fp-base by using a sliding window
12534 to find a base address which can cover most gp-access. */
12535struct nds32_fag
12536{
12537 struct nds32_fag *next; /* NULL-teminated linked list. */
12538 bfd_vma addr; /* The address of this fag. */
12539 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12540 It is used for applying FP7U2_FLAG. */
12541 int count; /* How many times this address is referred.
12542 There should be exactly `count' relocations
12543 in relas. */
12544 int relas_capcity; /* The buffer size of relas.
12545 We use an array instead of linked-list,
12546 and realloc is used to adjust buffer size. */
12547};
12548
12549static void
12550nds32_fag_init (struct nds32_fag *head)
12551{
12552 memset (head, 0, sizeof (struct nds32_fag));
12553}
12554
12555static void
12556nds32_fag_verify (struct nds32_fag *head)
12557{
12558 struct nds32_fag *iter;
12559 struct nds32_fag *prev;
12560
12561 prev = NULL;
12562 iter = head->next;
12563 while (iter)
12564 {
12565 if (prev && prev->addr >= iter->addr)
12566 puts ("Bug in fp-as-gp insertion.");
12567 prev = iter;
12568 iter = iter->next;
12569 }
12570}
12571
12572/* Insert a fag in ascending order.
12573 If a fag of the same address already exists,
12574 they are chained by relas array. */
12575
12576static void
12577nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12578 Elf_Internal_Rela * rel)
12579{
12580 struct nds32_fag *iter;
12581 struct nds32_fag *new_fag;
12582 const int INIT_RELAS_CAP = 4;
12583
12584 for (iter = head;
12585 iter->next && iter->next->addr <= addr;
12586 iter = iter->next)
12587 /* Find somewhere to insert. */ ;
12588
12589 /* `iter' will be equal to `head' if the list is empty. */
12590 if (iter != head && iter->addr == addr)
12591 {
12592 /* The address exists in the list.
12593 Insert `rel' into relocation list, relas. */
12594
12595 /* Check whether relas is big enough. */
12596 if (iter->count >= iter->relas_capcity)
12597 {
12598 iter->relas_capcity *= 2;
12599 iter->relas = bfd_realloc
12600 (iter->relas, iter->relas_capcity * sizeof (void *));
12601 }
12602 iter->relas[iter->count++] = rel;
12603 return;
12604 }
12605
12606 /* This is a new address. Create a fag node for it. */
12607 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12608 memset (new_fag, 0, sizeof (*new_fag));
12609 new_fag->addr = addr;
12610 new_fag->count = 1;
12611 new_fag->next = iter->next;
12612 new_fag->relas_capcity = INIT_RELAS_CAP;
12613 new_fag->relas = (Elf_Internal_Rela **)
12614 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12615 new_fag->relas[0] = rel;
12616 iter->next = new_fag;
12617
12618 nds32_fag_verify (head);
12619}
12620
12621static void
12622nds32_fag_free_list (struct nds32_fag *head)
12623{
12624 struct nds32_fag *iter;
12625
12626 iter = head->next;
12627 while (iter)
12628 {
12629 struct nds32_fag *tmp = iter;
12630 iter = iter->next;
12631 free (tmp->relas);
12632 tmp->relas = NULL;
12633 free (tmp);
12634 }
12635}
12636
35c08157
KLC		 12637/* Find the best fp-base address.
12638 The relocation associated with that address is returned,
12639 so we can track the symbol instead of a fixed address.
12640
12641 When relaxation, the address of an datum may change,
12642 because a text section is shrinked, so the data section
1c8f6a4d 12643 moves forward. If the aligments of text and data section
35c08157
KLC		 12644 are different, their distance may change too.
12645 Therefore, tracking a fixed address is not appriate. */
12646
12647static int
12648nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12649{
12650 struct nds32_fag *base; /* First fag in the window. */
12651 struct nds32_fag *last; /* First fag outside the window. */
12652 int accu = 0; /* Usage accumulation. */
12653 struct nds32_fag *best; /* Best fag. */
12654 int baccu = 0; /* Best accumulation. */
12655
12656 /* Use first fag for initial, and find the last fag in the window.
12657
12658 In each iteration, we could simply subtract previous fag
12659 and accumulate following fags which are inside the window,
12660 untill we each the end. */
12661
1c8f6a4d
KLC		 12662 if (head->next == NULL)
12663 {
12664 *bestpp = NULL;
12665 return 0;
12666 }
35c08157
KLC		 12667
12668 /* Initialize base. */
12669 base = head->next;
12670 best = base;
12671 for (last = base;
12672 last && last->addr < base->addr + FAG_WINDOW;
12673 last = last->next)
12674 accu += last->count;
12675
12676 baccu = accu;
12677
12678 /* Record the best base in each iteration. */
12679 while (base->next)
1c8f6a4d
KLC		 12680 {
12681 accu -= base->count;
12682 base = base->next;
12683 /* Account fags in window. */
12684 for (/* Nothing. */;
12685 last && last->addr < base->addr + FAG_WINDOW;
12686 last = last->next)
12687 accu += last->count;
12688
12689 /* A better fp-base? */
12690 if (accu > baccu)
12691 {
12692 best = base;
12693 baccu = accu;
12694 }
12695 }
35c08157
KLC		 12696
12697 if (bestpp)
12698 *bestpp = best;
12699 return baccu;
12700}
12701
12702/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12703 so we can convert it fo fp-relative access later.
12704 `best_fag' is the best fp-base. Only those inside the window
12705 of best_fag is applied the flag. */
12706
0a1b45a2 12707static bool
35c08157 12708nds32_fag_mark_relax (struct bfd_link_info *link_info,
fbaf61ad 12709 asection *sec, struct nds32_fag *best_fag,
35c08157
KLC		 12710 Elf_Internal_Rela *internal_relocs,
12711 Elf_Internal_Rela *irelend)
12712{
12713 struct nds32_fag *ifag;
12714 bfd_vma best_fpbase, gp;
12715 bfd *output_bfd;
12716
fbaf61ad 12717 output_bfd = sec->output_section->owner;
0a1b45a2 12718 nds32_elf_final_sda_base (output_bfd, link_info, &gp, false);
35c08157
KLC		 12719 best_fpbase = best_fag->addr;
12720
1c8f6a4d
KLC		 12721 if (best_fpbase > gp + sdata_range[1][1]
12722 || best_fpbase < gp - sdata_range[1][0])
0a1b45a2 12723 return false;
35c08157
KLC		 12724
12725 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12726 so we know they can be converted to lwi37.fp. */
12727 for (ifag = best_fag;
12728 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12729 {
12730 int i;
12731
12732 for (i = 0; i < ifag->count; i++)
12733 {
12734 Elf_Internal_Rela *insn16_rel;
12735 Elf_Internal_Rela *fag_rel;
12736
12737 fag_rel = ifag->relas[i];
12738
12739 /* Only if this is within the WINDOWS, FP7U2_FLAG
12740 is applied. */
12741
12742 insn16_rel = find_relocs_at_address
12743 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12744
12745 if (insn16_rel != irelend)
12746 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12747 }
12748 }
0a1b45a2 12749 return true;
35c08157
KLC		 12750}
12751
1c8f6a4d
KLC		 12752/* Reset INSN16 to clean fp as gp. */
12753
12754static void
12755nds32_fag_unmark_relax (struct nds32_fag *fag,
12756 Elf_Internal_Rela *internal_relocs,
12757 Elf_Internal_Rela *irelend)
12758{
12759 struct nds32_fag *ifag;
12760 int i;
12761 Elf_Internal_Rela *insn16_rel;
12762 Elf_Internal_Rela *fag_rel;
12763
12764 for (ifag = fag; ifag; ifag = ifag->next)
12765 {
12766 for (i = 0; i < ifag->count; i++)
12767 {
12768 fag_rel = ifag->relas[i];
12769
12770 /* Restore the INSN16 relocation. */
12771 insn16_rel = find_relocs_at_address
12772 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12773
12774 if (insn16_rel != irelend)
12775 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12776 }
12777 }
12778}
12779
35c08157
KLC		 12780/* This is the main function of fp-as-gp optimization.
12781 It should be called by relax_section. */
12782
0a1b45a2 12783static bool
35c08157
KLC		 12784nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12785 bfd *abfd, asection *sec,
12786 Elf_Internal_Rela *internal_relocs,
12787 Elf_Internal_Rela *irelend,
12788 Elf_Internal_Sym *isymbuf)
12789{
12790 Elf_Internal_Rela *begin_rel = NULL;
12791 Elf_Internal_Rela *irel;
12792 struct nds32_fag fag_head;
12793 Elf_Internal_Shdr *symtab_hdr;
12794 bfd_byte *contents;
0a1b45a2 12795 bool ifc_inside = false;
35c08157
KLC		 12796
12797 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12798
12799 /* Per-function fp-base selection.
12800 1. Create a list for all the gp-relative access.
12801 2. Base on those gp-relative address,
12802 find a fp-base which can cover most access.
12803 3. Use the fp-base for fp-as-gp relaxation.
12804
12805 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12806 we should
12807 1. delete the `la $fp, _FP_BASE_' instruction and
12808 2. not convert lwi.gp to lwi37.fp.
12809
12810 To delete the _FP_BASE_ instruction, we simply apply
12811 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12812
12813 To suppress the conversion, we simply NOT to apply
12814 R_NDS32_INSN16_FP7U2_FLAG flag. */
12815
12816 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12817
1781a9d0 12818 contents = NULL;
0a1b45a2 12819 if (!nds32_get_section_contents (abfd, sec, &contents, true)
35c08157 12820 || !nds32_get_local_syms (abfd, sec, &isymbuf))
0a1b45a2 12821 return false;
35c08157
KLC		 12822
12823 /* Check whether it is worth for fp-as-gp optimization,
12824 i.e., at least 3 gp-load.
12825
12826 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12827 apply this optimization. */
12828
12829 for (irel = internal_relocs; irel < irelend; irel++)
12830 {
12831 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12832 One we enter the begin of the region, we track all the LW/ST
12833 instructions, so when we leave the region, we try to find
12834 the best fp-base address for those LW/ST instructions. */
12835
12836 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12837 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12838 {
12839 /* Begin of the region. */
12840 if (begin_rel)
695344c0 12841 /* xgettext:c-format */
38f14ab8 12842 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC		 12843
12844 begin_rel = irel;
12845 nds32_fag_init (&fag_head);
0a1b45a2 12846 ifc_inside = false;
35c08157
KLC		 12847 }
12848 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12849 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12850 {
12851 int accu;
1c8f6a4d 12852 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12853 int dist;
12854
12855 /* End of the region.
12856 Check whether it is worth to do fp-as-gp. */
12857
12858 if (begin_rel == NULL)
12859 {
695344c0 12860 /* xgettext:c-format */
38f14ab8
AM		 12861 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12862 abfd, sec);
35c08157
KLC		 12863 continue;
12864 }
12865
12866 accu = nds32_fag_find_base (&fag_head, &best_fag);
12867
1c8f6a4d
KLC		 12868 /* Clean FP7U2_FLAG because they may set ever. */
12869 tmp_fag = fag_head.next;
12870 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12871
35c08157
KLC		 12872 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12873 if (accu < FAG_THRESHOLD
fbaf61ad 12874 || !nds32_fag_mark_relax (link_info, sec, best_fag,
35c08157
KLC		 12875 internal_relocs, irelend))
12876 {
12877 /* Not worth to do fp-as-gp. */
12878 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12879 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12880 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12881 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12882 nds32_fag_free_list (&fag_head);
12883 begin_rel = NULL;
12884 continue;
12885 }
12886
12887 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12888 so we use it to record the distance to the reloction of best
12889 fp-base. */
12890 dist = best_fag->relas[0] - begin_rel;
12891 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12892 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12893 relocation. And get the base value when relocating. */
1c8f6a4d 12894 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12895 begin_rel->r_addend |= dist << 16;
12896
12897 nds32_fag_free_list (&fag_head);
12898 begin_rel = NULL;
12899 }
12900
1c8f6a4d 12901 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12902 /* Skip if we are not in the region of fp-as-gp. */
12903 continue;
12904
12905 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12906 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12907 {
12908 bfd_vma addr;
12909 uint32_t insn;
12910
12911 /* A gp-relative access is found. Insert it to the fag-list. */
12912
12913 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12914 insn = bfd_getb32 (contents + irel->r_offset);
12915 if (!N32_IS_RT3 (insn))
12916 continue;
12917
12918 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12919 nds32_fag_insert (&fag_head, addr, irel);
12920 }
12921 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12922 {
12923 begin_rel = NULL;
12924 }
1c8f6a4d
KLC		 12925 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12926 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12927 {
12928 /* Suppress fp as gp when encounter ifc. */
0a1b45a2 12929 ifc_inside = true;
1c8f6a4d 12930 }
35c08157
KLC		 12931 }
12932
0a1b45a2 12933 return true;
35c08157
KLC		 12934}
12935
12936/* Remove unused `la $fp, _FD_BASE_' instruction. */
12937
0a1b45a2 12938static bool
35c08157
KLC		 12939nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12940 Elf_Internal_Rela *internal_relocs,
12941 Elf_Internal_Rela *irelend)
12942{
12943 Elf_Internal_Rela *irel;
12944 Elf_Internal_Shdr *symtab_hdr;
12945 bfd_byte *contents = NULL;
12946 nds32_elf_blank_t *relax_blank_list = NULL;
0a1b45a2
AM		 12947 bool result = true;
12948 bool unused_region = false;
35c08157
KLC		 12949
12950 /*
fbaf61ad
NC		 12951 NOTE: Disable fp-as-gp if we encounter ifcall relocations:
12952 R_NDS32_17IFC_PCREL_RELA
12953 R_NDS32_10IFCU_PCREL_RELA. */
35c08157
KLC		 12954
12955 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0a1b45a2 12956 nds32_get_section_contents (abfd, sec, &contents, true);
35c08157
KLC		 12957
12958 for (irel = internal_relocs; irel < irelend; irel++)
12959 {
12960 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12961 we marked to in previous pass.
12962 DO NOT scan relocations again, since we've alreadly decided it
12963 and set the flag. */
12964 const char *syname;
12965 int syndx;
12966 uint32_t insn;
12967
12968 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12969 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
0a1b45a2 12970 unused_region = true;
35c08157
KLC		 12971 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12972 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
0a1b45a2 12973 unused_region = false;
35c08157
KLC		 12974
12975 /* We're not in the region. */
12976 if (!unused_region)
12977 continue;
12978
12979 /* _FP_BASE_ must be a GLOBAL symbol. */
12980 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12981 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12982 continue;
12983
12984 /* The symbol name must be _FP_BASE_. */
12985 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12986 if (strcmp (syname, FP_BASE_NAME) != 0)
12987 continue;
12988
12989 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12990 {
12991 /* addi.gp $fp, -256 */
12992 insn = bfd_getb32 (contents + irel->r_offset);
12993 if (insn != INSN_ADDIGP_TO_FP)
12994 continue;
12995 }
12996 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12997 {
12998 /* addi $fp, $gp, -256 */
12999 insn = bfd_getb32 (contents + irel->r_offset);
13000 if (insn != INSN_ADDI_GP_TO_FP)
13001 continue;
13002 }
13003 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
13004 {
13005 /* movi $fp, FP_BASE */
13006 insn = bfd_getb32 (contents + irel->r_offset);
13007 if (insn != INSN_MOVI_TO_FP)
13008 continue;
13009 }
13010 else
13011 continue;
13012
13013 /* We got here because a FP_BASE instruction is found. */
13014 if (!insert_nds32_elf_blank_recalc_total
13015 (&relax_blank_list, irel->r_offset, 4))
13016 goto error_return;
13017 }
13018
dc1e8a47 13019 finish:
35c08157
KLC		 13020 if (relax_blank_list)
13021 {
13022 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
13023 relax_blank_list = NULL;
13024 }
13025 return result;
13026
dc1e8a47 13027 error_return:
0a1b45a2 13028 result = false;
35c08157
KLC		 13029 goto finish;
13030}
1c8f6a4d
KLC		 13031
13032/* This is a version of bfd_generic_get_relocated_section_contents.
13033 We need this variety because relaxation will modify the dwarf
13034 infomation. When there is undefined symbol reference error mesage,
13035 linker need to dump line number where the symbol be used. However
13036 the address is be relaxed, it can not get the original dwarf contents.
13037 The variety only modify function call for reading in the section. */
13038
13039static bfd_byte *
13040nds32_elf_get_relocated_section_contents (bfd *abfd,
13041 struct bfd_link_info *link_info,
13042 struct bfd_link_order *link_order,
13043 bfd_byte *data,
0a1b45a2 13044 bool relocatable,
1c8f6a4d
KLC		 13045 asymbol **symbols)
13046{
13047 bfd *input_bfd = link_order->u.indirect.section->owner;
13048 asection *input_section = link_order->u.indirect.section;
13049 long reloc_size;
13050 arelent **reloc_vector;
13051 long reloc_count;
13052
13053 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
13054 if (reloc_size < 0)
13055 return NULL;
13056
13057 /* Read in the section. */
0a1b45a2 13058 if (!nds32_get_section_contents (input_bfd, input_section, &data, false))
1c8f6a4d
KLC		 13059 return NULL;
13060
13061 if (reloc_size == 0)
13062 return data;
13063
13064 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13065 if (reloc_vector == NULL)
13066 return NULL;
13067
13068 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13069 reloc_vector, symbols);
13070 if (reloc_count < 0)
13071 goto error_return;
13072
13073 if (reloc_count > 0)
13074 {
13075 arelent **parent;
13076 for (parent = reloc_vector; *parent != NULL; parent++)
13077 {
13078 char *error_message = NULL;
13079 asymbol *symbol;
13080 bfd_reloc_status_type r;
13081
13082 symbol = *(*parent)->sym_ptr_ptr;
13083 if (symbol->section && discarded_section (symbol->section))
13084 {
0930cb30 13085 bfd_vma off;
1c8f6a4d 13086 static reloc_howto_type none_howto
0a1b45a2
AM		 13087 = HOWTO (0, 0, 0, 0, false, 0, complain_overflow_dont, NULL,
13088 "unused", false, 0, 0, false);
1c8f6a4d 13089
bb294208
AM		 13090 off = (*parent)->address * OCTETS_PER_BYTE (input_bfd,
13091 input_section);
0930cb30
AM		 13092 _bfd_clear_contents ((*parent)->howto, input_bfd,
13093 input_section, data, off);
1c8f6a4d
KLC		 13094 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13095 (*parent)->addend = 0;
13096 (*parent)->howto = &none_howto;
13097 r = bfd_reloc_ok;
13098 }
13099 else
13100 r = bfd_perform_relocation (input_bfd, *parent, data,
13101 input_section,
13102 relocatable ? abfd : NULL,
13103 &error_message);
13104
13105 if (relocatable)
13106 {
13107 asection *os = input_section->output_section;
13108
13109 /* A partial link, so keep the relocs. */
13110 os->orelocation[os->reloc_count] = *parent;
13111 os->reloc_count++;
13112 }
13113
13114 if (r != bfd_reloc_ok)
13115 {
13116 switch (r)
13117 {
13118 case bfd_reloc_undefined:
1a72702b
AM		 13119 (*link_info->callbacks->undefined_symbol)
13120 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
0a1b45a2 13121 input_bfd, input_section, (*parent)->address, true);
1c8f6a4d
KLC		 13122 break;
13123 case bfd_reloc_dangerous:
13124 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 13125 (*link_info->callbacks->reloc_dangerous)
13126 (link_info, error_message,
13127 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13128 break;
13129 case bfd_reloc_overflow:
1a72702b
AM		 13130 (*link_info->callbacks->reloc_overflow)
13131 (link_info, NULL,
13132 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13133 (*parent)->howto->name, (*parent)->addend,
13134 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13135 break;
13136 case bfd_reloc_outofrange:
13137 /* PR ld/13730:
13138 This error can result when processing some partially
13139 complete binaries. Do not abort, but issue an error
13140 message instead. */
13141 link_info->callbacks->einfo
695344c0 13142 /* xgettext:c-format */
c1c8c1ef 13143 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 13144 abfd, input_section, * parent);
13145 goto error_return;
13146
13147 default:
13148 abort ();
13149 break;
13150 }
13151 }
13152 }
13153 }
13154
13155 free (reloc_vector);
13156 return data;
13157
dc1e8a47 13158 error_return:
1c8f6a4d
KLC		 13159 free (reloc_vector);
13160 return NULL;
13161}
fbaf61ad
NC		 13162
13163/* Check target symbol. */
13164
0a1b45a2 13165static bool
fbaf61ad
NC		 13166nds32_elf_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED, asymbol *sym)
13167{
13168 if (!sym || !sym->name || sym->name[0] != '$')
0a1b45a2
AM		 13169 return false;
13170 return true;
fbaf61ad
NC		 13171}
13172
13173/* nds32 find maybe function sym. Ignore target special symbol
13174 first, and then go the general function. */
13175
13176static bfd_size_type
13177nds32_elf_maybe_function_sym (const asymbol *sym, asection *sec,
13178 bfd_vma *code_off)
13179{
13180 if (nds32_elf_is_target_special_symbol (NULL, (asymbol *) sym))
13181 return 0;
13182
13183 return _bfd_elf_maybe_function_sym (sym, sec, code_off);
13184}
35c08157 13185\f
35c08157 13186
fbaf61ad
NC		 13187/* Do TLS model conversion. */
13188
13189typedef struct relax_group_list_t
13190{
13191 Elf_Internal_Rela *relo;
13192 struct relax_group_list_t *next;
13193 struct relax_group_list_t *next_sibling;
13194 int id;
13195} relax_group_list_t;
13196
13197int
13198list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem);
13199
13200int
13201list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem);
13202
13203void
13204dump_chain (relax_group_list_t *pHead);
13205
13206int
13207list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem)
13208{
13209 relax_group_list_t *pNext = pHead;
13210
13211 /* Find place. */
13212 while (pNext->next)
13213 {
13214 if (pNext->next->id > (int) pElem->r_addend)
13215 break;
13216
13217 pNext = pNext->next;
13218 }
13219
13220 /* Insert node. */
13221 relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
13222 if (!pNew)
0a1b45a2 13223 return false;
fbaf61ad
NC		 13224
13225 relax_group_list_t *tmp = pNext->next;
13226 pNext->next = pNew;
13227
13228 pNew->id = pElem->r_addend;
13229 pNew->relo = pElem;
13230 pNew->next = tmp;
13231 pNew->next_sibling = NULL;
13232
0a1b45a2 13233 return true;
fbaf61ad
NC		 13234}
13235
13236int
13237list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem)
13238{
13239 relax_group_list_t *pNext = pNode;
13240
13241 /* Find place. */
13242 while (pNext->next_sibling)
13243 {
13244 pNext = pNext->next_sibling;
13245 }
13246
13247 /* Insert node. */
13248 relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
13249 if (!pNew)
0a1b45a2 13250 return false;
fbaf61ad
NC		 13251
13252 relax_group_list_t *tmp = pNext->next_sibling;
13253 pNext->next_sibling = pNew;
13254
13255 pNew->id = -1;
13256 pNew->relo = pElem;
13257 pNew->next = NULL;
13258 pNew->next_sibling = tmp;
13259
0a1b45a2 13260 return true;
fbaf61ad
NC		 13261}
13262
13263void
13264dump_chain (relax_group_list_t *pHead)
13265{
13266 relax_group_list_t *pNext = pHead->next;
13267 while (pNext)
13268 {
13269 printf("group %d @ 0x%08x", pNext->id, (unsigned)pNext->relo->r_offset);
13270 relax_group_list_t *pNextSib = pNext->next_sibling;
13271 while (pNextSib)
13272 {
13273 printf(", %d", (unsigned) ELF32_R_TYPE (pNextSib->relo->r_info));
13274 pNextSib = pNextSib->next_sibling;
13275 }
13276 pNext = pNext->next;
13277 printf("\n");
13278 }
13279}
13280
13281/* Check R_NDS32_RELAX_GROUP of each section.
13282 There might be multiple sections in one object file. */
13283
13284int
13285elf32_nds32_check_relax_group (bfd *abfd, asection *asec)
13286{
13287 elf32_nds32_relax_group_t *relax_group_ptr =
13288 elf32_nds32_relax_group_ptr (abfd);
13289
13290 int min_id = relax_group_ptr->min_id;
13291 int max_id = relax_group_ptr->max_id;
13292
13293 Elf_Internal_Rela *rel;
13294 Elf_Internal_Rela *relend;
13295 Elf_Internal_Rela *relocs;
13296 enum elf_nds32_reloc_type rtype;
13297
13298 do
13299 {
13300 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13301 relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
0a1b45a2 13302 true /* keep_memory */);
fbaf61ad
NC		 13303 if (relocs == NULL)
13304 break;
13305
13306 /* Check R_NDS32_RELAX_GROUP. */
13307 relend = relocs + asec->reloc_count;
13308 for (rel = relocs; rel < relend; rel++)
13309 {
13310 int id;
13311 rtype = ELF32_R_TYPE (rel->r_info);
13312 if (rtype != R_NDS32_RELAX_GROUP)
13313 continue;
13314
13315 id = rel->r_addend;
13316 if (id < min_id)
13317 min_id = id;
13318 else if (id > max_id)
13319 max_id = id;
13320 }
13321 }
0a1b45a2 13322 while (false);
fbaf61ad 13323
c9594989 13324 if (elf_section_data (asec)->relocs != relocs)
fbaf61ad
NC		 13325 free (relocs);
13326
13327 if ((min_id != relax_group_ptr->min_id)
13328 || (max_id != relax_group_ptr->max_id))
13329 {
13330 relax_group_ptr->count = max_id - min_id + 1;
13331 BFD_ASSERT(min_id <= relax_group_ptr->min_id);
13332 relax_group_ptr->min_id = min_id;
13333 BFD_ASSERT(max_id >= relax_group_ptr->max_id);
13334 relax_group_ptr->max_id = max_id;
13335 }
13336
13337 return relax_group_ptr->count;
13338}
13339
13340/* Reorder RELAX_GROUP ID when command line option '-r' is applied. */
3fafa2e2 13341static struct section_id_list_t *relax_group_section_id_list = NULL;
fbaf61ad
NC		 13342
13343struct section_id_list_t *
13344elf32_nds32_lookup_section_id (int id, struct section_id_list_t **lst_ptr)
13345{
13346 struct section_id_list_t *result = NULL;
13347 struct section_id_list_t *lst = *lst_ptr;
13348
13349 if (NULL == lst)
13350 {
13351 result = (struct section_id_list_t *) calloc
13352 (1, sizeof (struct section_id_list_t));
13353 BFD_ASSERT (result); /* Feed me. */
13354 result->id = id;
13355 *lst_ptr = result;
13356 }
13357 else
13358 {
13359 struct section_id_list_t *cur = lst;
13360 struct section_id_list_t *prv = NULL;
13361 struct section_id_list_t *sec = NULL;
13362
13363 while (cur)
13364 {
13365 if (cur->id < id)
13366 {
13367 prv = cur;
13368 cur = cur->next;
13369 continue;
13370 }
13371
13372 if (cur->id > id)
13373 {
13374 cur = NULL; /* To insert after prv. */
13375 sec = cur; /* In case prv == NULL. */
13376 }
13377
13378 break;
13379 }
13380
13381 if (NULL == cur)
13382 {
13383 /* Insert after prv. */
13384 result = (struct section_id_list_t *) calloc
13385 (1, sizeof (struct section_id_list_t));
13386 BFD_ASSERT (result); /* Feed me. */
13387 result->id = id;
13388 if (NULL != prv)
13389 {
13390 result->next = prv->next;
13391 prv->next = result;
13392 }
13393 else
13394 {
13395 *lst_ptr = result;
13396 result->next = sec;
13397 }
13398 }
13399 }
13400
13401 return result;
13402}
13403
13404int
13405elf32_nds32_unify_relax_group (bfd *abfd, asection *asec)
13406{
13407 static int next_relax_group_bias = 0;
13408
13409 elf32_nds32_relax_group_t *relax_group_ptr =
13410 elf32_nds32_relax_group_ptr (abfd);
13411
0a1b45a2 13412 bool result = true;
fbaf61ad
NC		 13413 Elf_Internal_Rela *rel;
13414 Elf_Internal_Rela *relend;
13415 Elf_Internal_Rela *relocs = NULL;
13416 enum elf_nds32_reloc_type rtype;
13417 struct section_id_list_t *node = NULL;
13418 int count = 0;
13419
13420 do
13421 {
13422 if (0 == relax_group_ptr->count)
13423 break;
13424
13425 /* Check if this section has been handled. */
13426 node = elf32_nds32_lookup_section_id (asec->id, &relax_group_section_id_list);
13427 if (NULL == node)
13428 break; /* Hit, the section id has handled. */
13429
13430 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13431 relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
0a1b45a2 13432 true /* keep_memory */);
fbaf61ad
NC		 13433 if (relocs == NULL)
13434 {
13435 BFD_ASSERT (0); /* feed me */
13436 break;
13437 }
13438
13439 /* Allocate group id bias for this bfd! */
13440 if (0 == relax_group_ptr->init)
13441 {
13442 relax_group_ptr->bias = next_relax_group_bias;
13443 next_relax_group_bias += relax_group_ptr->count;
13444 relax_group_ptr->init = 1;
13445 }
13446
13447 /* Reorder relax group groups. */
13448 relend = relocs + asec->reloc_count;
13449 for (rel = relocs; rel < relend; rel++)
13450 {
13451 rtype = ELF32_R_TYPE(rel->r_info);
13452 if (rtype != R_NDS32_RELAX_GROUP)
13453 continue;
13454
13455 /* Change it. */
13456 rel->r_addend += relax_group_ptr->bias;
13457 /* Debugging count. */
13458 count++;
13459 }
13460 }
0a1b45a2 13461 while (false);
fbaf61ad 13462
c9594989 13463 if (elf_section_data (asec)->relocs != relocs)
fbaf61ad
NC		 13464 free (relocs);
13465
13466 return result;
13467}
13468
13469int
13470nds32_elf_unify_tls_model (bfd *inbfd, asection *insec, bfd_byte *incontents,
13471 struct bfd_link_info *lnkinfo)
13472{
0a1b45a2 13473 bool result = true;
fbaf61ad
NC		 13474 Elf_Internal_Rela *irel;
13475 Elf_Internal_Rela *irelend;
13476 Elf_Internal_Rela *internal_relocs;
13477 unsigned long r_symndx;
13478 enum elf_nds32_reloc_type r_type;
13479
13480 Elf_Internal_Sym *local_syms = NULL;
13481 bfd_byte *contents = NULL;
13482
13483 relax_group_list_t chain = { .id = -1, .next = NULL, .next_sibling = NULL };
13484
13485 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (inbfd)->symtab_hdr;
13486 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
13487 sym_hashes = elf_sym_hashes (inbfd);
13488 sym_hashes_end =
13489 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
13490 if (!elf_bad_symtab (inbfd))
13491 sym_hashes_end -= symtab_hdr->sh_info;
13492
13493 /* Reorder RELAX_GROUP when command line option '-r' is applied. */
13494 if (bfd_link_relocatable (lnkinfo))
13495 {
13496 elf32_nds32_unify_relax_group (inbfd, insec);
13497 return result;
13498 }
13499
13500 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13501 internal_relocs = _bfd_elf_link_read_relocs (inbfd, insec, NULL, NULL,
0a1b45a2 13502 true /* keep_memory */);
fbaf61ad
NC		 13503 if (internal_relocs == NULL)
13504 goto error_return;
13505
13506 irelend = internal_relocs + insec->reloc_count;
13507 irel = find_relocs_at_address (internal_relocs, internal_relocs,
13508 irelend, R_NDS32_RELAX_ENTRY);
13509 if (irel == irelend)
13510 goto finish;
13511
13512 /* Chain/remove groups. */
13513 for (irel = internal_relocs; irel < irelend; irel++)
13514 {
13515 r_symndx = ELF32_R_SYM (irel->r_info);
13516 r_type = ELF32_R_TYPE (irel->r_info);
13517 if (r_type != R_NDS32_RELAX_GROUP)
13518 continue;
13519
13520 /* Remove it. */
13521 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_NONE);
13522 /* Chain it now. */
13523 if (!list_insert (&chain, irel))
13524 goto error_return;
13525 }
13526
13527 /* Collect group relocations. */
13528 /* Presume relocations are sorted. */
13529 relax_group_list_t *pNext = chain.next;
13530 while (pNext)
13531 {
13532 for (irel = internal_relocs; irel < irelend; irel++)
13533 {
13534 if (irel->r_offset == pNext->relo->r_offset)
13535 {
13536 /* Ignore Non-TLS relocation types. */
13537 r_type = ELF32_R_TYPE (irel->r_info);
13538 if ((R_NDS32_TLS_LE_HI20 > r_type)
13539 || (R_NDS32_RELAX_ENTRY == r_type))
13540 continue;
13541
13542 if (!list_insert_sibling (pNext, irel))
13543 goto error_return;
13544 }
13545 else if (irel->r_offset > pNext->relo->r_offset)
13546 {
13547 pNext = pNext->next;
13548 if (!pNext)
13549 break;
13550
13551 bfd_vma current_offset = pNext->relo->r_offset;
13552 if (irel->r_offset > current_offset)
13553 irel = internal_relocs; /* restart from head */
13554 else
13555 --irel; /* Check current irel again. */
13556 continue;
13557 }
13558 else
13559 {
13560 /* This shouldn't be reached. */
13561 }
13562 }
13563 if (pNext)
13564 pNext = pNext->next;
13565 }
13566
13567#ifdef DUBUG_VERBOSE
13568 dump_chain(&chain);
13569#endif
13570
13571 /* Get symbol table and section content. */
13572 if (incontents)
13573 contents = incontents;
0a1b45a2 13574 else if (!nds32_get_section_contents (inbfd, insec, &contents, true)
fbaf61ad
NC		 13575 || !nds32_get_local_syms (inbfd, insec, &local_syms))
13576 goto error_return;
13577
13578 char *local_got_tls_type = elf32_nds32_local_got_tls_type (inbfd);
13579
13580 /* Convert TLS model each group if necessary. */
13581 pNext = chain.next;
13582
13583 int cur_grp_id = -1;
13584 int sethi_rt = -1;
13585 int add_rt = -1;
13586 enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
13587
13588 tls_type = org_tls_type = eff_tls_type = 0;
13589
13590 while (pNext)
13591 {
13592 relax_group_list_t *pNextSig = pNext->next_sibling;
13593 while (pNextSig)
13594 {
13595 struct elf_link_hash_entry *h = NULL;
13596
13597 irel = pNextSig->relo;
13598 r_symndx = ELF32_R_SYM(irel->r_info);
13599 r_type = ELF32_R_TYPE(irel->r_info);
13600
13601 if (pNext->id != cur_grp_id)
13602 {
13603 cur_grp_id = pNext->id;
13604 org_tls_type = get_tls_type (r_type, NULL);
13605 if (r_symndx >= symtab_hdr->sh_info)
13606 {
13607 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13608 while (h->root.type == bfd_link_hash_indirect
13609 || h->root.type == bfd_link_hash_warning)
13610 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13611 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
13612 }
13613 else
13614 {
13615 tls_type = local_got_tls_type
13616 ? local_got_tls_type[r_symndx]
13617 : GOT_NORMAL;
13618 }
13619
13620 eff_tls_type = 1 << (fls (tls_type) - 1);
13621 sethi_rt = N32_RT5(bfd_getb32 (contents + irel->r_offset));
13622 }
13623
13624 if (eff_tls_type != org_tls_type)
13625 {
13626 switch (org_tls_type)
13627 {
13628 /* DESC to IEGP/IE/LE. */
13629 case GOT_TLS_DESC:
13630 switch (eff_tls_type)
13631 {
13632 case GOT_TLS_IE:
13633 switch (r_type)
13634 {
13635 case R_NDS32_TLS_DESC_HI20:
13636 irel->r_info = ELF32_R_INFO(r_symndx,
13637 R_NDS32_TLS_IE_HI20);
13638 break;
13639 case R_NDS32_TLS_DESC_LO12:
13640 irel->r_info = ELF32_R_INFO(r_symndx,
13641 R_NDS32_TLS_IE_LO12);
13642 break;
13643 case R_NDS32_TLS_DESC_ADD:
13644 {
13645 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13646 add_rt = N32_RT5 (insn);
13647 insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
13648 bfd_putb32 (insn, contents + irel->r_offset);
13649
13650 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13651 }
13652 break;
13653 case R_NDS32_TLS_DESC_FUNC:
13654 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13655 irel->r_info = ELF32_R_INFO(r_symndx,
13656 R_NDS32_RELAX_REMOVE);
13657 break;
13658 case R_NDS32_TLS_DESC_CALL:
13659 {
13660 uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
13661 REG_TP);
13662 bfd_putb32 (insn, contents + irel->r_offset);
13663
13664 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13665 }
13666 break;
13667 case R_NDS32_LOADSTORE:
13668 case R_NDS32_PTR:
13669 case R_NDS32_PTR_RESOLVED:
13670 case R_NDS32_NONE:
13671 case R_NDS32_LABEL:
13672 break;
13673 default:
13674 BFD_ASSERT(0);
13675 break;
13676 }
13677 break;
13678 case GOT_TLS_IEGP:
13679 switch (r_type)
13680 {
13681 case R_NDS32_TLS_DESC_HI20:
13682 irel->r_info = ELF32_R_INFO(r_symndx,
13683 R_NDS32_TLS_IEGP_HI20);
13684 break;
13685 case R_NDS32_TLS_DESC_LO12:
13686 irel->r_info = ELF32_R_INFO(r_symndx,
13687 R_NDS32_TLS_IEGP_LO12);
13688 break;
13689 case R_NDS32_TLS_DESC_ADD:
13690 {
13691 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13692 add_rt = N32_RT5 (insn);
13693 insn = N32_MEM(LW, add_rt, sethi_rt, REG_GP, 0);
13694 bfd_putb32 (insn, contents + irel->r_offset);
13695
13696 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13697 }
13698 break;
13699 case R_NDS32_TLS_DESC_FUNC:
13700 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13701 irel->r_info = ELF32_R_INFO(r_symndx,
13702 R_NDS32_RELAX_REMOVE);
13703 break;
13704 case R_NDS32_TLS_DESC_CALL:
13705 {
13706 uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
13707 REG_TP);
13708 bfd_putb32 (insn, contents + irel->r_offset);
13709
13710 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13711 }
13712 break;
13713 case R_NDS32_LOADSTORE:
13714 case R_NDS32_PTR:
13715 case R_NDS32_PTR_RESOLVED:
13716 case R_NDS32_NONE:
13717 case R_NDS32_LABEL:
13718 break;
13719 default:
13720 BFD_ASSERT(0);
13721 break;
13722 }
13723 break;
13724 case GOT_TLS_LE:
13725 switch (r_type)
13726 {
13727 case R_NDS32_TLS_DESC_HI20:
13728 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13729 break;
13730 case R_NDS32_TLS_DESC_LO12:
13731 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13732 break;
13733 case R_NDS32_TLS_DESC_ADD:
13734 {
13735 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13736
13737 add_rt = N32_RT5 (insn);
13738 insn = N32_ALU1 (ADD, REG_R0, sethi_rt, REG_TP);
13739 bfd_putb32 (insn, contents + irel->r_offset);
13740
13741 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_ADD);
13742 }
13743 break;
13744 case R_NDS32_TLS_DESC_FUNC:
13745 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13746 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13747 break;
13748 case R_NDS32_TLS_DESC_CALL:
13749 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13750 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13751 break;
13752 case R_NDS32_LOADSTORE:
13753 case R_NDS32_PTR:
13754 case R_NDS32_PTR_RESOLVED:
13755 case R_NDS32_NONE:
13756 case R_NDS32_LABEL:
13757 break;
13758 default:
13759 BFD_ASSERT(0);
13760 break;
13761 }
13762 break;
13763 default:
13764 break;
13765 }
13766 break;
13767 /* IEGP to IE/LE. */
13768 case GOT_TLS_IEGP:
13769 switch (eff_tls_type)
13770 {
13771 case GOT_TLS_IE:
13772 switch (r_type)
13773 {
13774 case R_NDS32_TLS_IEGP_HI20:
13775 irel->r_info = ELF32_R_INFO(r_symndx,
13776 R_NDS32_TLS_IE_HI20);
13777 break;
13778 case R_NDS32_TLS_IEGP_LO12:
13779 irel->r_info = ELF32_R_INFO(r_symndx,
13780 R_NDS32_TLS_IE_LO12);
13781 break;
13782 case R_NDS32_PTR_RESOLVED:
13783 {
13784 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13785
13786 add_rt = N32_RT5 (insn);
13787 insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
13788 bfd_putb32 (insn, contents + irel->r_offset);
13789 }
13790 break;
13791 case R_NDS32_TLS_IEGP_LW:
13792 break;
13793 case R_NDS32_LOADSTORE:
13794 case R_NDS32_PTR:
13795 case R_NDS32_NONE:
13796 case R_NDS32_LABEL:
13797 break;
13798 default:
13799 BFD_ASSERT(0);
13800 break;
13801 }
13802 break;
13803 case GOT_TLS_LE:
13804 switch (r_type)
13805 {
13806 case R_NDS32_TLS_IEGP_HI20:
13807 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13808 break;
13809 case R_NDS32_TLS_IEGP_LO12:
13810 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13811 break;
13812 case R_NDS32_TLS_IEGP_LW:
13813 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13814 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13815 break;
13816 case R_NDS32_LOADSTORE:
13817 case R_NDS32_PTR:
13818 case R_NDS32_NONE:
13819 case R_NDS32_LABEL:
13820 case R_NDS32_PTR_RESOLVED:
13821 break;
13822 default:
13823 BFD_ASSERT(0);
13824 break;
13825 }
13826 break;
13827 default:
13828 break;
13829 }
13830 break;
13831 /* IE to LE. */
13832 case GOT_TLS_IE:
13833 switch (eff_tls_type)
13834 {
13835 case GOT_TLS_LE:
13836 switch (r_type)
13837 {
13838 case R_NDS32_TLS_IE_HI20:
13839 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13840 break;
13841 case R_NDS32_TLS_IE_LO12S2:
13842 {
13843 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13844
13845 add_rt = N32_RT5 (insn);
13846 insn = N32_TYPE2 (ORI, add_rt, sethi_rt, 0);
13847 bfd_putb32 (insn, contents + irel->r_offset);
13848
13849 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13850 }
13851 break;
13852 case R_NDS32_LOADSTORE:
13853 case R_NDS32_PTR:
13854 case R_NDS32_NONE:
13855 case R_NDS32_LABEL:
13856 break;
13857 default:
13858 BFD_ASSERT(0);
13859 break;
13860 }
13861 break;
13862 default:
13863 break;
13864 }
13865 break;
13866 default:
13867 break;
13868 }
13869 }
13870 pNextSig = pNextSig->next_sibling;
13871 }
13872
13873#if 1
13874 pNext = pNext->next;
13875#else
13876 while (pNext)
13877 {
13878 if (pNext->id != cur_grp_id)
13879 break;
13880 pNext = pNext->next;
13881 }
13882#endif
13883 }
13884
dc1e8a47 13885 finish:
fbaf61ad
NC		 13886 if (incontents)
13887 contents = NULL;
13888
c9594989 13889 if (elf_section_data (insec)->relocs != internal_relocs)
fbaf61ad
NC		 13890 free (internal_relocs);
13891
c9594989 13892 if (elf_section_data (insec)->this_hdr.contents != contents)
fbaf61ad
NC		 13893 free (contents);
13894
c9594989 13895 if (symtab_hdr->contents != (bfd_byte *) local_syms)
fbaf61ad
NC		 13896 free (local_syms);
13897
13898 if (chain.next)
13899 {
13900 pNext = chain.next;
13901 relax_group_list_t *pDel;
13902 while (pNext)
13903 {
13904 pDel = pNext;
13905 pNext = pNext->next;
13906 free (pDel);
13907 }
13908 }
13909
13910 return result;
13911
dc1e8a47 13912 error_return:
0a1b45a2 13913 result = false;
fbaf61ad
NC		 13914 goto finish;
13915}
13916
13917/* End TLS model conversion. */
13918
35c08157
KLC		 13919#define ELF_ARCH bfd_arch_nds32
13920#define ELF_MACHINE_CODE EM_NDS32
13921#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 13922#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 13923
6d00b590 13924#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 13925#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 13926#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 13927#define TARGET_LITTLE_NAME "elf32-nds32le"
13928
13929#define elf_info_to_howto nds32_info_to_howto
13930#define elf_info_to_howto_rel nds32_info_to_howto_rel
13931
13932#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
13933#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
13934#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
13935#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
13936#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
13937
07d6d2b8 13938#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 13939#define elf_backend_action_discarded nds32_elf_action_discarded
13940#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
13941#define elf_backend_check_relocs nds32_elf_check_relocs
13942#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
13943#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
13944#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
13945#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
13946#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
13947#define elf_backend_relocate_section nds32_elf_relocate_section
13948#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 13949#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
13950#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
13951#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
13952#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
13953#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
13954#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
13955#define elf_backend_object_p nds32_elf_object_p
13956#define elf_backend_final_write_processing nds32_elf_final_write_processing
13957#define elf_backend_special_sections nds32_elf_special_sections
bf577467 13958#define elf_backend_section_flags nds32_elf_section_flags
1c8f6a4d 13959#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 13960 nds32_elf_get_relocated_section_contents
fbaf61ad
NC		 13961#define bfd_elf32_bfd_is_target_special_symbol nds32_elf_is_target_special_symbol
13962#define elf_backend_maybe_function_sym nds32_elf_maybe_function_sym
35c08157
KLC		 13963
13964#define elf_backend_can_gc_sections 1
13965#define elf_backend_can_refcount 1
13966#define elf_backend_want_got_plt 1
13967#define elf_backend_plt_readonly 1
13968#define elf_backend_want_plt_sym 0
13969#define elf_backend_got_header_size 12
13970#define elf_backend_may_use_rel_p 1
13971#define elf_backend_default_use_rela_p 1
13972#define elf_backend_may_use_rela_p 1
fbaf61ad 13973#define elf_backend_dtrel_excludes_plt 0
35c08157
KLC		 13974
13975#include "elf32-target.h"
13976
13977#undef ELF_MAXPAGESIZE
13978#define ELF_MAXPAGESIZE 0x2000
13979
fbaf61ad 13980#undef TARGET_BIG_SYM
6d00b590 13981#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
fbaf61ad 13982#undef TARGET_BIG_NAME
35c08157 13983#define TARGET_BIG_NAME "elf32-nds32be-linux"
fbaf61ad 13984#undef TARGET_LITTLE_SYM
6d00b590 13985#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
fbaf61ad 13986#undef TARGET_LITTLE_NAME
35c08157 13987#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
fbaf61ad 13988#undef elf32_bed
35c08157
KLC		 13989#define elf32_bed elf32_nds32_lin_bed
13990
13991#include "elf32-target.h"
GDB Binutils - Deliverables
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