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correct ft32 reloc range test
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
CommitLineData
35c08157 1/* NDS32-specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 59
60/* Nds32 helper functions. */
35c08157 61static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 62(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
35c08157 65static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 66(bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 67static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
68static void nds32_elf_ex9_import_table (struct bfd_link_info *);
69static void nds32_elf_ex9_finish (struct bfd_link_info *);
70static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 71static void nds32_elf_get_insn_with_reg
1c8f6a4d 72 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 73static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
74 Elf_Internal_Sym **);
75static bfd_boolean nds32_elf_ex9_replace_instruction
76 (struct bfd_link_info *, bfd *, asection *);
77static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
78 asection *);
1c8f6a4d 79static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 80static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 81static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 82static bfd_boolean nds32_relax_fp_as_gp
83 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
84 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
85 Elf_Internal_Sym *isymbuf);
86static bfd_boolean nds32_fag_remove_unused_fpbase
87 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
88 Elf_Internal_Rela *irelend);
89
90enum
91{
92 MACH_V1 = bfd_mach_n1h,
93 MACH_V2 = bfd_mach_n1h_v2,
94 MACH_V3 = bfd_mach_n1h_v3,
95 MACH_V3M = bfd_mach_n1h_v3m
96};
97
98#define MIN(a, b) ((a) > (b) ? (b) : (a))
99#define MAX(a, b) ((a) > (b) ? (a) : (b))
100
101/* The name of the dynamic interpreter. This is put in the .interp
102 section. */
103#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
104
105/* The nop opcode we use. */
106#define NDS32_NOP32 0x40000009
107#define NDS32_NOP16 0x9200
108
109/* The size in bytes of an entry in the procedure linkage table. */
110#define PLT_ENTRY_SIZE 24
111#define PLT_HEADER_SIZE 24
112
113/* The first entry in a procedure linkage table are reserved,
114 and the initial contents are unimportant (we zero them out).
115 Subsequent entries look like this. */
07d6d2b8
AM		 116#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
117#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
118#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
119#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
120#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 121
122/* $ta is change to $r15 (from $r25). */
123#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 124#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
125#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
126#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
127#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
128#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
129
130#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
131#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
132#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
133#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
134#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 135
136#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 137#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
138#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
139#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
140#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
141#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 142
1c8f6a4d
KLC		 143/* These are macros used to get the relocation accurate value. */
144#define ACCURATE_8BIT_S1 (0x100)
145#define ACCURATE_U9BIT_S1 (0x400)
146#define ACCURATE_12BIT_S1 (0x2000)
147#define ACCURATE_14BIT_S1 (0x4000)
148#define ACCURATE_19BIT (0x40000)
149
150/* These are macros used to get the relocation conservative value. */
151#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
152#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
153#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
154#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
155/* These must be more conservative because the address may be in
156 different segment. */
157#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
158#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
159#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
160#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
161#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
162
35c08157
KLC		 163/* Size of small data/bss sections, used to calculate SDA_BASE. */
164static long got_size = 0;
165static int is_SDA_BASE_set = 0;
166static int is_ITB_BASE_set = 0;
167
35c08157
KLC		 168/* Convert ELF-VER in eflags to string for debugging purpose. */
169static const char *const nds32_elfver_strtab[] =
170{
171 "ELF-1.2",
172 "ELF-1.3",
173 "ELF-1.4",
174};
175
176/* The nds32 linker needs to keep track of the number of relocs that it
177 decides to copy in check_relocs for each symbol. This is so that
178 it can discard PC relative relocs if it doesn't need them when
179 linking with -Bsymbolic. We store the information in a field
180 extending the regular ELF linker hash table. */
181
182/* This structure keeps track of the number of PC relative relocs we
183 have copied for a given symbol. */
184
185struct elf_nds32_pcrel_relocs_copied
186{
187 /* Next section. */
188 struct elf_nds32_pcrel_relocs_copied *next;
189 /* A section in dynobj. */
190 asection *section;
191 /* Number of relocs copied in this section. */
192 bfd_size_type count;
193};
194
35c08157
KLC		 195/* Nds32 ELF linker hash entry. */
196
197struct elf_nds32_link_hash_entry
198{
199 struct elf_link_hash_entry root;
200
201 /* Track dynamic relocs copied for this symbol. */
3bf083ed 202 struct elf_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 203
204 /* For checking relocation type. */
205#define GOT_UNKNOWN 0
206#define GOT_NORMAL 1
207#define GOT_TLS_IE 2
208 unsigned int tls_type;
35c08157
KLC		 209};
210
211/* Get the nds32 ELF linker hash table from a link_info structure. */
212
213#define FP_BASE_NAME "_FP_BASE_"
214static int check_start_export_sym = 0;
215static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
216
1c8f6a4d
KLC		 217/* The offset for executable tls relaxation. */
218#define TP_OFFSET 0x0
219
220struct elf_nds32_obj_tdata
221{
222 struct elf_obj_tdata root;
223
224 /* tls_type for each local got entry. */
225 char *local_got_tls_type;
226};
227
228#define elf_nds32_tdata(bfd) \
229 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
230
231#define elf32_nds32_local_got_tls_type(bfd) \
232 (elf_nds32_tdata (bfd)->local_got_tls_type)
233
234#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
235
236static bfd_boolean
237nds32_elf_mkobject (bfd *abfd)
238{
239 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
240 NDS32_ELF_DATA);
241}
242
35c08157
KLC		 243/* Relocations used for relocation. */
244static reloc_howto_type nds32_elf_howto_table[] =
245{
246 /* This reloc does nothing. */
247 HOWTO (R_NDS32_NONE, /* type */
248 0, /* rightshift */
6346d5ca
AM		 249 3, /* size (0 = byte, 1 = short, 2 = long) */
250 0, /* bitsize */
35c08157
KLC		 251 FALSE, /* pc_relative */
252 0, /* bitpos */
6346d5ca 253 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 254 bfd_elf_generic_reloc, /* special_function */
255 "R_NDS32_NONE", /* name */
256 FALSE, /* partial_inplace */
257 0, /* src_mask */
258 0, /* dst_mask */
259 FALSE), /* pcrel_offset */
260
261 /* A 16 bit absolute relocation. */
262 HOWTO (R_NDS32_16, /* type */
263 0, /* rightshift */
264 1, /* size (0 = byte, 1 = short, 2 = long) */
265 16, /* bitsize */
266 FALSE, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_bitfield, /* complain_on_overflow */
269 nds32_elf_generic_reloc, /* special_function */
270 "R_NDS32_16", /* name */
271 FALSE, /* partial_inplace */
272 0xffff, /* src_mask */
273 0xffff, /* dst_mask */
274 FALSE), /* pcrel_offset */
275
276 /* A 32 bit absolute relocation. */
277 HOWTO (R_NDS32_32, /* type */
278 0, /* rightshift */
279 2, /* size (0 = byte, 1 = short, 2 = long) */
280 32, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_bitfield, /* complain_on_overflow */
284 nds32_elf_generic_reloc, /* special_function */
285 "R_NDS32_32", /* name */
286 FALSE, /* partial_inplace */
287 0xffffffff, /* src_mask */
288 0xffffffff, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* A 20 bit address. */
292 HOWTO (R_NDS32_20, /* type */
293 0, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 20, /* bitsize */
296 FALSE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_unsigned, /* complain_on_overflow */
299 nds32_elf_generic_reloc, /* special_function */
300 "R_NDS32_20", /* name */
301 FALSE, /* partial_inplace */
302 0xfffff, /* src_mask */
303 0xfffff, /* dst_mask */
304 FALSE), /* pcrel_offset */
305
306 /* An PC Relative 9-bit relocation, shifted by 2.
307 This reloc is complicated because relocations are relative to pc & -4.
308 i.e. branches in the right insn slot use the address of the left insn
309 slot for pc. */
310 /* ??? It's not clear whether this should have partial_inplace set or not.
311 Branch relaxing in the assembler can store the addend in the insn,
312 and if bfd_install_relocation gets called the addend may get added
313 again. */
314 HOWTO (R_NDS32_9_PCREL, /* type */
315 1, /* rightshift */
316 1, /* size (0 = byte, 1 = short, 2 = long) */
317 8, /* bitsize */
318 TRUE, /* pc_relative */
319 0, /* bitpos */
320 complain_overflow_signed, /* complain_on_overflow */
321 nds32_elf_9_pcrel_reloc, /* special_function */
322 "R_NDS32_9_PCREL", /* name */
323 FALSE, /* partial_inplace */
324 0xff, /* src_mask */
325 0xff, /* dst_mask */
326 TRUE), /* pcrel_offset */
327
328 /* A relative 15 bit relocation, right shifted by 1. */
329 HOWTO (R_NDS32_15_PCREL, /* type */
330 1, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 14, /* bitsize */
333 TRUE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_signed, /* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_NDS32_15_PCREL", /* name */
338 FALSE, /* partial_inplace */
339 0x3fff, /* src_mask */
340 0x3fff, /* dst_mask */
341 TRUE), /* pcrel_offset */
342
343 /* A relative 17 bit relocation, right shifted by 1. */
344 HOWTO (R_NDS32_17_PCREL, /* type */
345 1, /* rightshift */
346 2, /* size (0 = byte, 1 = short, 2 = long) */
347 16, /* bitsize */
348 TRUE, /* pc_relative */
349 0, /* bitpos */
350 complain_overflow_signed, /* complain_on_overflow */
351 bfd_elf_generic_reloc, /* special_function */
352 "R_NDS32_17_PCREL", /* name */
353 FALSE, /* partial_inplace */
354 0xffff, /* src_mask */
355 0xffff, /* dst_mask */
356 TRUE), /* pcrel_offset */
357
358 /* A relative 25 bit relocation, right shifted by 1. */
359 /* ??? It's not clear whether this should have partial_inplace set or not.
360 Branch relaxing in the assembler can store the addend in the insn,
361 and if bfd_install_relocation gets called the addend may get added
362 again. */
363 HOWTO (R_NDS32_25_PCREL, /* type */
364 1, /* rightshift */
365 2, /* size (0 = byte, 1 = short, 2 = long) */
366 24, /* bitsize */
367 TRUE, /* pc_relative */
368 0, /* bitpos */
369 complain_overflow_signed, /* complain_on_overflow */
370 bfd_elf_generic_reloc, /* special_function */
371 "R_NDS32_25_PCREL", /* name */
372 FALSE, /* partial_inplace */
373 0xffffff, /* src_mask */
374 0xffffff, /* dst_mask */
375 TRUE), /* pcrel_offset */
376
377 /* High 20 bits of address when lower 12 is or'd in. */
378 HOWTO (R_NDS32_HI20, /* type */
379 12, /* rightshift */
380 2, /* size (0 = byte, 1 = short, 2 = long) */
381 20, /* bitsize */
382 FALSE, /* pc_relative */
383 0, /* bitpos */
384 complain_overflow_dont,/* complain_on_overflow */
385 nds32_elf_hi20_reloc, /* special_function */
386 "R_NDS32_HI20", /* name */
387 FALSE, /* partial_inplace */
388 0x000fffff, /* src_mask */
389 0x000fffff, /* dst_mask */
390 FALSE), /* pcrel_offset */
391
392 /* Lower 12 bits of address. */
393 HOWTO (R_NDS32_LO12S3, /* type */
394 3, /* rightshift */
395 2, /* size (0 = byte, 1 = short, 2 = long) */
396 9, /* bitsize */
397 FALSE, /* pc_relative */
398 0, /* bitpos */
399 complain_overflow_dont,/* complain_on_overflow */
400 nds32_elf_lo12_reloc, /* special_function */
401 "R_NDS32_LO12S3", /* name */
402 FALSE, /* partial_inplace */
403 0x000001ff, /* src_mask */
404 0x000001ff, /* dst_mask */
405 FALSE), /* pcrel_offset */
406
407 /* Lower 12 bits of address. */
408 HOWTO (R_NDS32_LO12S2, /* type */
409 2, /* rightshift */
410 2, /* size (0 = byte, 1 = short, 2 = long) */
411 10, /* bitsize */
412 FALSE, /* pc_relative */
413 0, /* bitpos */
414 complain_overflow_dont,/* complain_on_overflow */
415 nds32_elf_lo12_reloc, /* special_function */
416 "R_NDS32_LO12S2", /* name */
417 FALSE, /* partial_inplace */
418 0x000003ff, /* src_mask */
419 0x000003ff, /* dst_mask */
420 FALSE), /* pcrel_offset */
421
422 /* Lower 12 bits of address. */
423 HOWTO (R_NDS32_LO12S1, /* type */
424 1, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 11, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_dont,/* complain_on_overflow */
430 nds32_elf_lo12_reloc, /* special_function */
431 "R_NDS32_LO12S1", /* name */
432 FALSE, /* partial_inplace */
433 0x000007ff, /* src_mask */
434 0x000007ff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 /* Lower 12 bits of address. */
438 HOWTO (R_NDS32_LO12S0, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 12, /* bitsize */
442 FALSE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_dont,/* complain_on_overflow */
445 nds32_elf_lo12_reloc, /* special_function */
446 "R_NDS32_LO12S0", /* name */
447 FALSE, /* partial_inplace */
448 0x00000fff, /* src_mask */
449 0x00000fff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451
452 /* Small data area 15 bits offset. */
453 HOWTO (R_NDS32_SDA15S3, /* type */
454 3, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 15, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_signed, /* complain_on_overflow */
460 nds32_elf_sda15_reloc, /* special_function */
461 "R_NDS32_SDA15S3", /* name */
462 FALSE, /* partial_inplace */
463 0x00007fff, /* src_mask */
464 0x00007fff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Small data area 15 bits offset. */
468 HOWTO (R_NDS32_SDA15S2, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 15, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_signed, /* complain_on_overflow */
475 nds32_elf_sda15_reloc, /* special_function */
476 "R_NDS32_SDA15S2", /* name */
477 FALSE, /* partial_inplace */
478 0x00007fff, /* src_mask */
479 0x00007fff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Small data area 15 bits offset. */
483 HOWTO (R_NDS32_SDA15S1, /* type */
484 1, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 15, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_signed, /* complain_on_overflow */
490 nds32_elf_sda15_reloc, /* special_function */
491 "R_NDS32_SDA15S1", /* name */
492 FALSE, /* partial_inplace */
493 0x00007fff, /* src_mask */
494 0x00007fff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Small data area 15 bits offset. */
498 HOWTO (R_NDS32_SDA15S0, /* type */
499 0, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 15, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed, /* complain_on_overflow */
505 nds32_elf_sda15_reloc, /* special_function */
506 "R_NDS32_SDA15S0", /* name */
507 FALSE, /* partial_inplace */
508 0x00007fff, /* src_mask */
509 0x00007fff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* GNU extension to record C++ vtable hierarchy */
513 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 0, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 NULL, /* special_function */
521 "R_NDS32_GNU_VTINHERIT", /* name */
522 FALSE, /* partial_inplace */
523 0, /* src_mask */
524 0, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* GNU extension to record C++ vtable member usage */
528 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
529 0, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 0, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_dont,/* complain_on_overflow */
535 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
536 "R_NDS32_GNU_VTENTRY", /* name */
537 FALSE, /* partial_inplace */
538 0, /* src_mask */
539 0, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* A 16 bit absolute relocation. */
543 HOWTO (R_NDS32_16_RELA, /* type */
544 0, /* rightshift */
545 1, /* size (0 = byte, 1 = short, 2 = long) */
546 16, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_bitfield, /* complain_on_overflow */
550 bfd_elf_generic_reloc, /* special_function */
551 "R_NDS32_16_RELA", /* name */
552 FALSE, /* partial_inplace */
553 0xffff, /* src_mask */
554 0xffff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* A 32 bit absolute relocation. */
558 HOWTO (R_NDS32_32_RELA, /* type */
559 0, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 32, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_bitfield, /* complain_on_overflow */
565 bfd_elf_generic_reloc, /* special_function */
566 "R_NDS32_32_RELA", /* name */
567 FALSE, /* partial_inplace */
568 0xffffffff, /* src_mask */
569 0xffffffff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* A 20 bit address. */
573 HOWTO (R_NDS32_20_RELA, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 20, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 bfd_elf_generic_reloc, /* special_function */
581 "R_NDS32_20_RELA", /* name */
582 FALSE, /* partial_inplace */
583 0xfffff, /* src_mask */
584 0xfffff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
588 1, /* rightshift */
589 1, /* size (0 = byte, 1 = short, 2 = long) */
590 8, /* bitsize */
591 TRUE, /* pc_relative */
592 0, /* bitpos */
593 complain_overflow_signed, /* complain_on_overflow */
594 bfd_elf_generic_reloc, /* special_function */
595 "R_NDS32_9_PCREL_RELA",/* name */
596 FALSE, /* partial_inplace */
597 0xff, /* src_mask */
598 0xff, /* dst_mask */
599 TRUE), /* pcrel_offset */
600
601 /* A relative 15 bit relocation, right shifted by 1. */
602 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
603 1, /* rightshift */
604 2, /* size (0 = byte, 1 = short, 2 = long) */
605 14, /* bitsize */
606 TRUE, /* pc_relative */
607 0, /* bitpos */
608 complain_overflow_signed, /* complain_on_overflow */
609 bfd_elf_generic_reloc, /* special_function */
610 "R_NDS32_15_PCREL_RELA", /* name */
611 FALSE, /* partial_inplace */
612 0x3fff, /* src_mask */
613 0x3fff, /* dst_mask */
614 TRUE), /* pcrel_offset */
615
616 /* A relative 17 bit relocation, right shifted by 1. */
617 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
618 1, /* rightshift */
619 2, /* size (0 = byte, 1 = short, 2 = long) */
620 16, /* bitsize */
621 TRUE, /* pc_relative */
622 0, /* bitpos */
623 complain_overflow_signed, /* complain_on_overflow */
624 bfd_elf_generic_reloc, /* special_function */
625 "R_NDS32_17_PCREL_RELA", /* name */
626 FALSE, /* partial_inplace */
627 0xffff, /* src_mask */
628 0xffff, /* dst_mask */
629 TRUE), /* pcrel_offset */
630
631 /* A relative 25 bit relocation, right shifted by 2. */
632 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
633 1, /* rightshift */
634 2, /* size (0 = byte, 1 = short, 2 = long) */
635 24, /* bitsize */
636 TRUE, /* pc_relative */
637 0, /* bitpos */
638 complain_overflow_signed, /* complain_on_overflow */
639 bfd_elf_generic_reloc, /* special_function */
640 "R_NDS32_25_PCREL_RELA", /* name */
641 FALSE, /* partial_inplace */
642 0xffffff, /* src_mask */
643 0xffffff, /* dst_mask */
644 TRUE), /* pcrel_offset */
645
646 /* High 20 bits of address when lower 16 is or'd in. */
647 HOWTO (R_NDS32_HI20_RELA, /* type */
648 12, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 20, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_NDS32_HI20_RELA", /* name */
656 FALSE, /* partial_inplace */
657 0x000fffff, /* src_mask */
658 0x000fffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 /* Lower 12 bits of address. */
662 HOWTO (R_NDS32_LO12S3_RELA, /* type */
663 3, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 9, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_dont,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_LO12S3_RELA", /* name */
671 FALSE, /* partial_inplace */
672 0x000001ff, /* src_mask */
673 0x000001ff, /* dst_mask */
674 FALSE), /* pcrel_offset */
675
676 /* Lower 12 bits of address. */
677 HOWTO (R_NDS32_LO12S2_RELA, /* type */
678 2, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 10, /* bitsize */
681 FALSE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_dont,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_LO12S2_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x000003ff, /* src_mask */
688 0x000003ff, /* dst_mask */
689 FALSE), /* pcrel_offset */
690
691 /* Lower 12 bits of address. */
692 HOWTO (R_NDS32_LO12S1_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 11, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_LO12S1_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0x000007ff, /* src_mask */
703 0x000007ff, /* dst_mask */
704 FALSE), /* pcrel_offset */
705
706 /* Lower 12 bits of address. */
707 HOWTO (R_NDS32_LO12S0_RELA, /* type */
708 0, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 12, /* bitsize */
711 FALSE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_dont,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_LO12S0_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0x00000fff, /* src_mask */
718 0x00000fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
720
721 /* Small data area 15 bits offset. */
722 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
723 3, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 15, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_signed, /* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_SDA15S3_RELA",/* name */
731 FALSE, /* partial_inplace */
732 0x00007fff, /* src_mask */
733 0x00007fff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Small data area 15 bits offset. */
737 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
738 2, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 15, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_signed, /* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_SDA15S2_RELA",/* name */
746 FALSE, /* partial_inplace */
747 0x00007fff, /* src_mask */
748 0x00007fff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
752 1, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 15, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_signed, /* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_NDS32_SDA15S1_RELA",/* name */
760 FALSE, /* partial_inplace */
761 0x00007fff, /* src_mask */
762 0x00007fff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 15, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_signed, /* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_NDS32_SDA15S0_RELA",/* name */
774 FALSE, /* partial_inplace */
775 0x00007fff, /* src_mask */
776 0x00007fff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 /* GNU extension to record C++ vtable hierarchy */
780 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
781 0, /* rightshift */
782 2, /* size (0 = byte, 1 = short, 2 = long) */
783 0, /* bitsize */
784 FALSE, /* pc_relative */
785 0, /* bitpos */
786 complain_overflow_dont,/* complain_on_overflow */
787 NULL, /* special_function */
788 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
789 FALSE, /* partial_inplace */
790 0, /* src_mask */
791 0, /* dst_mask */
792 FALSE), /* pcrel_offset */
793
794 /* GNU extension to record C++ vtable member usage */
795 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
796 0, /* rightshift */
797 2, /* size (0 = byte, 1 = short, 2 = long) */
798 0, /* bitsize */
799 FALSE, /* pc_relative */
800 0, /* bitpos */
801 complain_overflow_dont,/* complain_on_overflow */
802 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
803 "R_NDS32_RELA_GNU_VTENTRY", /* name */
804 FALSE, /* partial_inplace */
805 0, /* src_mask */
806 0, /* dst_mask */
807 FALSE), /* pcrel_offset */
808
809 /* Like R_NDS32_20, but referring to the GOT table entry for
810 the symbol. */
811 HOWTO (R_NDS32_GOT20, /* type */
812 0, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 20, /* bitsize */
815 FALSE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_signed, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 "R_NDS32_GOT20", /* name */
820 FALSE, /* partial_inplace */
821 0xfffff, /* src_mask */
822 0xfffff, /* dst_mask */
823 FALSE), /* pcrel_offset */
824
825 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
826 entry for the symbol. */
827 HOWTO (R_NDS32_25_PLTREL, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 24, /* bitsize */
831 TRUE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_25_PLTREL", /* name */
836 FALSE, /* partial_inplace */
837 0xffffff, /* src_mask */
838 0xffffff, /* dst_mask */
839 TRUE), /* pcrel_offset */
840
841 /* This is used only by the dynamic linker. The symbol should exist
842 both in the object being run and in some shared library. The
843 dynamic linker copies the data addressed by the symbol from the
844 shared library into the object, because the object being
845 run has to have the data at some particular address. */
846 HOWTO (R_NDS32_COPY, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 32, /* bitsize */
850 FALSE, /* pc_relative */
851 0, /* bitpos */
852 complain_overflow_bitfield, /* complain_on_overflow */
853 bfd_elf_generic_reloc, /* special_function */
854 "R_NDS32_COPY", /* name */
855 FALSE, /* partial_inplace */
856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
858 FALSE), /* pcrel_offset */
859
860 /* Like R_NDS32_20, but used when setting global offset table
861 entries. */
862 HOWTO (R_NDS32_GLOB_DAT, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_bitfield, /* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_NDS32_GLOB_DAT", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 /* Marks a procedure linkage table entry for a symbol. */
877 HOWTO (R_NDS32_JMP_SLOT, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_JMP_SLOT", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 /* Used only by the dynamic linker. When the object is run, this
892 longword is set to the load address of the object, plus the
893 addend. */
894 HOWTO (R_NDS32_RELATIVE, /* type */
895 0, /* rightshift */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
897 32, /* bitsize */
898 FALSE, /* pc_relative */
899 0, /* bitpos */
900 complain_overflow_bitfield, /* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_NDS32_RELATIVE", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 FALSE), /* pcrel_offset */
907
908 HOWTO (R_NDS32_GOTOFF, /* type */
909 0, /* rightshift */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
911 20, /* bitsize */
912 FALSE, /* pc_relative */
913 0, /* bitpos */
914 complain_overflow_signed, /* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_NDS32_GOTOFF", /* name */
917 FALSE, /* partial_inplace */
918 0xfffff, /* src_mask */
919 0xfffff, /* dst_mask */
920 FALSE), /* pcrel_offset */
921
922 /* An PC Relative 20-bit relocation used when setting PIC offset
923 table register. */
924 HOWTO (R_NDS32_GOTPC20, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 20, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_signed, /* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_NDS32_GOTPC20", /* name */
933 FALSE, /* partial_inplace */
934 0xfffff, /* src_mask */
935 0xfffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 /* Like R_NDS32_HI20, but referring to the GOT table entry for
939 the symbol. */
940 HOWTO (R_NDS32_GOT_HI20, /* type */
941 12, /* rightshift */
942 2, /* size (0 = byte, 1 = short, 2 = long) */
943 20, /* bitsize */
944 FALSE, /* pc_relative */
945 0, /* bitpos */
946 complain_overflow_dont,/* complain_on_overflow */
947 bfd_elf_generic_reloc, /* special_function */
948 "R_NDS32_GOT_HI20", /* name */
949 FALSE, /* partial_inplace */
950 0x000fffff, /* src_mask */
951 0x000fffff, /* dst_mask */
952 FALSE), /* pcrel_offset */
953 HOWTO (R_NDS32_GOT_LO12, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 12, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOT_LO12", /* name */
962 FALSE, /* partial_inplace */
963 0x00000fff, /* src_mask */
964 0x00000fff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* An PC Relative relocation used when setting PIC offset table register.
968 Like R_NDS32_HI20, but referring to the GOT table entry for
969 the symbol. */
970 HOWTO (R_NDS32_GOTPC_HI20, /* type */
971 12, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 20, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_dont,/* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_GOTPC_HI20", /* name */
979 FALSE, /* partial_inplace */
980 0x000fffff, /* src_mask */
981 0x000fffff, /* dst_mask */
982 TRUE), /* pcrel_offset */
983 HOWTO (R_NDS32_GOTPC_LO12, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 12, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_dont, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTPC_LO12", /* name */
992 FALSE, /* partial_inplace */
993 0x00000fff, /* src_mask */
994 0x00000fff, /* dst_mask */
995 TRUE), /* pcrel_offset */
996
997 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
998 12, /* rightshift */
999 2, /* size (0 = byte, 1 = short, 2 = long) */
1000 20, /* bitsize */
1001 FALSE, /* pc_relative */
1002 0, /* bitpos */
1003 complain_overflow_dont,/* complain_on_overflow */
1004 bfd_elf_generic_reloc, /* special_function */
1005 "R_NDS32_GOTOFF_HI20", /* name */
1006 FALSE, /* partial_inplace */
1007 0x000fffff, /* src_mask */
1008 0x000fffff, /* dst_mask */
1009 FALSE), /* pcrel_offset */
1010 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 12, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 bfd_elf_generic_reloc, /* special_function */
1018 "R_NDS32_GOTOFF_LO12", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for relaxable instruction. This is used with
1025 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1026 in order to make next label aligned on word boundary. */
1027 HOWTO (R_NDS32_INSN16, /* type */
1028 0, /* rightshift */
1029 2, /* size (0 = byte, 1 = short, 2 = long) */
1030 32, /* bitsize */
1031 FALSE, /* pc_relative */
1032 0, /* bitpos */
1033 complain_overflow_dont,/* complain_on_overflow */
1034 nds32_elf_ignore_reloc,/* special_function */
1035 "R_NDS32_INSN16", /* name */
1036 FALSE, /* partial_inplace */
1037 0x00000fff, /* src_mask */
1038 0x00000fff, /* dst_mask */
1039 FALSE), /* pcrel_offset */
1040
1041 /* Alignment hint for label. */
1042 HOWTO (R_NDS32_LABEL, /* type */
1043 0, /* rightshift */
1044 2, /* size (0 = byte, 1 = short, 2 = long) */
1045 32, /* bitsize */
1046 FALSE, /* pc_relative */
1047 0, /* bitpos */
1048 complain_overflow_dont,/* complain_on_overflow */
1049 nds32_elf_ignore_reloc,/* special_function */
1050 "R_NDS32_LABEL", /* name */
1051 FALSE, /* partial_inplace */
1052 0xffffffff, /* src_mask */
1053 0xffffffff, /* dst_mask */
1054 FALSE), /* pcrel_offset */
1055
1056 /* Relax hint for unconditional call sequence */
1057 HOWTO (R_NDS32_LONGCALL1, /* type */
1058 0, /* rightshift */
1059 2, /* size (0 = byte, 1 = short, 2 = long) */
1060 32, /* bitsize */
1061 FALSE, /* pc_relative */
1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_LONGCALL1", /* name */
1066 FALSE, /* partial_inplace */
1067 0xffffffff, /* src_mask */
1068 0xffffffff, /* dst_mask */
1069 FALSE), /* pcrel_offset */
1070
1071 /* Relax hint for conditional call sequence. */
1072 HOWTO (R_NDS32_LONGCALL2, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LONGCALL2", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085
1086 /* Relax hint for conditional call sequence. */
1087 HOWTO (R_NDS32_LONGCALL3, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL3", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Relax hint for unconditional branch sequence. */
1102 HOWTO (R_NDS32_LONGJUMP1, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGJUMP1", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Relax hint for conditional branch sequence. */
1117 HOWTO (R_NDS32_LONGJUMP2, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGJUMP2", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for conditional branch sequence. */
1132 HOWTO (R_NDS32_LONGJUMP3, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP3", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for load/store sequence. */
1147 HOWTO (R_NDS32_LOADSTORE, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LOADSTORE", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for load/store sequence. */
1162 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1163 0, /* rightshift */
1164 1, /* size (0 = byte, 1 = short, 2 = long) */
1165 16, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_9_FIXED_RELA",/* name */
1171 FALSE, /* partial_inplace */
1172 0x000000ff, /* src_mask */
1173 0x000000ff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for load/store sequence. */
1177 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_15_FIXED_RELA", /* name */
1186 FALSE, /* partial_inplace */
1187 0x00003fff, /* src_mask */
1188 0x00003fff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for load/store sequence. */
1192 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_17_FIXED_RELA", /* name */
1201 FALSE, /* partial_inplace */
1202 0x0000ffff, /* src_mask */
1203 0x0000ffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for load/store sequence. */
1207 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_25_FIXED_RELA", /* name */
1216 FALSE, /* partial_inplace */
1217 0x00ffffff, /* src_mask */
1218 0x00ffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* High 20 bits of PLT symbol offset relative to PC. */
1222 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1223 12, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 20, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 bfd_elf_generic_reloc, /* special_function */
1230 "R_NDS32_PLTREL_HI20", /* name */
1231 FALSE, /* partial_inplace */
1232 0x000fffff, /* src_mask */
1233 0x000fffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Low 12 bits of PLT symbol offset relative to PC. */
1237 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1238 0, /* rightshift */
1239 2, /* size (0 = byte, 1 = short, 2 = long) */
1240 12, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 bfd_elf_generic_reloc, /* special_function */
1245 "R_NDS32_PLTREL_LO12", /* name */
1246 FALSE, /* partial_inplace */
1247 0x00000fff, /* src_mask */
1248 0x00000fff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1252 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1253 12, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 20, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLT_GOTREL_HI20", /* name */
1261 FALSE, /* partial_inplace */
1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1267 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 12, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLT_GOTREL_LO12", /* name */
1276 FALSE, /* partial_inplace */
1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Small data area 12 bits offset. */
1282 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1283 2, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 12, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_signed, /* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_SDA12S2_DP_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00000fff, /* src_mask */
1293 0x00000fff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* Small data area 12 bits offset. */
1297 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1298 2, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 12, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_signed, /* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_SDA12S2_SP_RELA", /* name */
1306 FALSE, /* partial_inplace */
1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310 /* Lower 12 bits of address. */
1311
1312 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1313 2, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 10, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_LO12S2_DP_RELA", /* name */
1321 FALSE, /* partial_inplace */
1322 0x000003ff, /* src_mask */
1323 0x000003ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* Lower 12 bits of address. */
1327 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1328 2, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 10, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_LO12S2_SP_RELA", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000003ff, /* src_mask */
1338 0x000003ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340 /* Lower 12 bits of address. Special identity for or case. */
1341 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 12, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_NDS32_LO12S0_ORI_RELA", /* name */
1350 FALSE, /* partial_inplace */
1351 0x00000fff, /* src_mask */
1352 0x00000fff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354 /* Small data area 19 bits offset. */
1355 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1356 3, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 16, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_signed, /* complain_on_overflow */
1362 bfd_elf_generic_reloc, /* special_function */
1363 "R_NDS32_SDA16S3_RELA",/* name */
1364 FALSE, /* partial_inplace */
1365 0x0000ffff, /* src_mask */
1366 0x0000ffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 /* Small data area 15 bits offset. */
1370 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1371 2, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 17, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_signed, /* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_NDS32_SDA17S2_RELA",/* name */
1379 FALSE, /* partial_inplace */
1380 0x0001ffff, /* src_mask */
1381 0x0001ffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1385 1, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 18, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_signed, /* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_NDS32_SDA18S1_RELA",/* name */
1393 FALSE, /* partial_inplace */
1394 0x0003ffff, /* src_mask */
1395 0x0003ffff, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 19, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_signed, /* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_NDS32_SDA19S0_RELA",/* name */
1407 FALSE, /* partial_inplace */
1408 0x0007ffff, /* src_mask */
1409 0x0007ffff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
1411 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1412 0, /* rightshift */
1413 0, /* size (0 = byte, 1 = short, 2 = long) */
1414 8, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 nds32_elf_ignore_reloc,/* special_function */
1419 "R_NDS32_DWARF2_OP1_RELA", /* name */
1420 FALSE, /* partial_inplace */
1421 0xff, /* src_mask */
1422 0xff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1425 0, /* rightshift */
1426 1, /* size (0 = byte, 1 = short, 2 = long) */
1427 16, /* bitsize */
1428 FALSE, /* pc_relative */
1429 0, /* bitpos */
1430 complain_overflow_dont,/* complain_on_overflow */
1431 nds32_elf_ignore_reloc,/* special_function */
1432 "R_NDS32_DWARF2_OP2_RELA", /* name */
1433 FALSE, /* partial_inplace */
1434 0xffff, /* src_mask */
1435 0xffff, /* dst_mask */
1436 FALSE), /* pcrel_offset */
1437 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1438 0, /* rightshift */
1439 2, /* size (0 = byte, 1 = short, 2 = long) */
1440 32, /* bitsize */
1441 FALSE, /* pc_relative */
1442 0, /* bitpos */
1443 complain_overflow_dont,/* complain_on_overflow */
1444 nds32_elf_ignore_reloc,/* special_function */
1445 "R_NDS32_DWARF2_LEB_RELA", /* name */
1446 FALSE, /* partial_inplace */
1447 0xffffffff, /* src_mask */
1448 0xffffffff, /* dst_mask */
1449 FALSE), /* pcrel_offset */
1450 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1451 0, /* rightshift */
1452 1, /* size (0 = byte, 1 = short, 2 = long) */
1453 16, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont,/* complain_on_overflow */
1457 nds32_elf_ignore_reloc,/* special_function */
1458 "R_NDS32_UPDATE_TA_RELA", /* name */
1459 FALSE, /* partial_inplace */
1460 0xffff, /* src_mask */
1461 0xffff, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1464 entry for the symbol. */
1465 HOWTO (R_NDS32_9_PLTREL, /* type */
1466 1, /* rightshift */
1467 1, /* size (0 = byte, 1 = short, 2 = long) */
1468 8, /* bitsize */
1469 TRUE, /* pc_relative */
1470 0, /* bitpos */
1471 complain_overflow_signed, /* complain_on_overflow */
1472 bfd_elf_generic_reloc, /* special_function */
1473 "R_NDS32_9_PLTREL", /* name */
1474 FALSE, /* partial_inplace */
1475 0xff, /* src_mask */
1476 0xff, /* dst_mask */
1477 TRUE), /* pcrel_offset */
1478 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1479 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1480 0, /* rightshift */
1481 2, /* size (0 = byte, 1 = short, 2 = long) */
1482 20, /* bitsize */
1483 FALSE, /* pc_relative */
1484 0, /* bitpos */
1485 complain_overflow_dont,/* complain_on_overflow */
1486 bfd_elf_generic_reloc, /* special_function */
1487 "R_NDS32_PLT_GOTREL_LO20", /* name */
1488 FALSE, /* partial_inplace */
1489 0x000fffff, /* src_mask */
1490 0x000fffff, /* dst_mask */
1491 FALSE), /* pcrel_offset */
1492 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1493 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 15, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_dont,/* complain_on_overflow */
1500 bfd_elf_generic_reloc, /* special_function */
1501 "R_NDS32_PLT_GOTREL_LO15", /* name */
1502 FALSE, /* partial_inplace */
1503 0x00007fff, /* src_mask */
1504 0x00007fff, /* dst_mask */
1505 FALSE), /* pcrel_offset */
1506 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1507 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 19, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_dont,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_NDS32_PLT_GOTREL_LO19", /* name */
1516 FALSE, /* partial_inplace */
1517 0x0007ffff, /* src_mask */
1518 0x0007ffff, /* dst_mask */
1519 FALSE), /* pcrel_offset */
1520 HOWTO (R_NDS32_GOT_LO15, /* type */
1521 0, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 15, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_dont,/* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 "R_NDS32_GOT_LO15", /* name */
1529 FALSE, /* partial_inplace */
1530 0x00007fff, /* src_mask */
1531 0x00007fff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533 HOWTO (R_NDS32_GOT_LO19, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 19, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_dont,/* complain_on_overflow */
1540 bfd_elf_generic_reloc, /* special_function */
1541 "R_NDS32_GOT_LO19", /* name */
1542 FALSE, /* partial_inplace */
1543 0x0007ffff, /* src_mask */
1544 0x0007ffff, /* dst_mask */
1545 FALSE), /* pcrel_offset */
1546 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 15, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_GOTOFF_LO15", /* name */
1555 FALSE, /* partial_inplace */
1556 0x00007fff, /* src_mask */
1557 0x00007fff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 19, /* bitsize */
1563 FALSE, /* pc_relative */
1564 0, /* bitpos */
1565 complain_overflow_dont,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_NDS32_GOTOFF_LO19", /* name */
1568 FALSE, /* partial_inplace */
1569 0x0007ffff, /* src_mask */
1570 0x0007ffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1572 /* GOT 15 bits offset. */
1573 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1574 2, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 15, /* bitsize */
1577 FALSE, /* pc_relative */
1578 0, /* bitpos */
1579 complain_overflow_signed, /* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_NDS32_GOT15S2_RELA",/* name */
1582 FALSE, /* partial_inplace */
1583 0x00007fff, /* src_mask */
1584 0x00007fff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1586 /* GOT 17 bits offset. */
1587 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1588 2, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 17, /* bitsize */
1591 FALSE, /* pc_relative */
1592 0, /* bitpos */
1593 complain_overflow_signed, /* complain_on_overflow */
1594 bfd_elf_generic_reloc, /* special_function */
1595 "R_NDS32_GOT17S2_RELA",/* name */
1596 FALSE, /* partial_inplace */
1597 0x0001ffff, /* src_mask */
1598 0x0001ffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600 /* A 5 bit address. */
1601 HOWTO (R_NDS32_5_RELA, /* type */
1602 0, /* rightshift */
1603 1, /* size (0 = byte, 1 = short, 2 = long) */
1604 5, /* bitsize */
1605 FALSE, /* pc_relative */
1606 0, /* bitpos */
1607 complain_overflow_signed, /* complain_on_overflow */
1608 bfd_elf_generic_reloc, /* special_function */
1609 "R_NDS32_5_RELA", /* name */
1610 FALSE, /* partial_inplace */
1611 0x1f, /* src_mask */
1612 0x1f, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1614 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1615 1, /* rightshift */
1616 1, /* size (0 = byte, 1 = short, 2 = long) */
1617 9, /* bitsize */
1618 TRUE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_unsigned, /* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_NDS32_10_UPCREL_RELA", /* name */
1623 FALSE, /* partial_inplace */
1624 0x1ff, /* src_mask */
1625 0x1ff, /* dst_mask */
1626 TRUE), /* pcrel_offset */
1627 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1628 2, /* rightshift */
1629 1, /* size (0 = byte, 1 = short, 2 = long) */
1630 7, /* bitsize */
1631 FALSE, /* pc_relative */
1632 0, /* bitpos */
1633 complain_overflow_unsigned, /* complain_on_overflow */
1634 bfd_elf_generic_reloc, /* special_function */
1635 "R_NDS32_SDA_FP7U2_RELA", /* name */
1636 FALSE, /* partial_inplace */
1637 0x0000007f, /* src_mask */
1638 0x0000007f, /* dst_mask */
1639 FALSE), /* pcrel_offset */
1640 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1641 1, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 8, /* bitsize */
1644 TRUE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_signed, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1649 FALSE, /* partial_inplace */
1650 0xff, /* src_mask */
1651 0xff, /* dst_mask */
1652 TRUE), /* pcrel_offset */
1653 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1654 1, /* rightshift */
1655 2, /* size (0 = byte, 1 = short, 2 = long) */
1656 24, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_NDS32_25_ABS_RELA", /* name */
1662 FALSE, /* partial_inplace */
1663 0xffffff, /* src_mask */
1664 0xffffff, /* dst_mask */
1665 FALSE), /* pcrel_offset */
1666
1667 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1668 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1669 1, /* rightshift */
1670 2, /* size (0 = byte, 1 = short, 2 = long) */
1671 16, /* bitsize */
1672 TRUE, /* pc_relative */
1673 0, /* bitpos */
1674 complain_overflow_signed, /* complain_on_overflow */
1675 bfd_elf_generic_reloc, /* special_function */
1676 "R_NDS32_17IFC_PCREL_RELA", /* name */
1677 FALSE, /* partial_inplace */
1678 0xffff, /* src_mask */
1679 0xffff, /* dst_mask */
1680 TRUE), /* pcrel_offset */
1681
1682 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1683 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1684 1, /* rightshift */
1685 1, /* size (0 = byte, 1 = short, 2 = long) */
1686 9, /* bitsize */
1687 TRUE, /* pc_relative */
1688 0, /* bitpos */
1689 complain_overflow_unsigned, /* complain_on_overflow */
1690 bfd_elf_generic_reloc, /* special_function */
1691 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1692 FALSE, /* partial_inplace */
1693 0x1ff, /* src_mask */
1694 0x1ff, /* dst_mask */
1695 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1696
1697 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1698 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1699 12, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 20, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_dont, /* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_NDS32_TLS_LE_HI20", /* name */
1707 FALSE, /* partial_inplace */
1708 0x000fffff, /* src_mask */
1709 0x000fffff, /* dst_mask */
1710 FALSE), /* pcrel_offset */
1711 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1712 0, /* rightshift */
1713 2, /* size (0 = byte, 1 = short, 2 = long) */
1714 12, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont, /* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_NDS32_TLS_LE_LO12", /* name */
1720 FALSE, /* partial_inplace */
1721 0x00000fff, /* src_mask */
1722 0x00000fff, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1726 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1727 12, /* rightshift */
1728 2, /* size (0 = byte, 1 = short, 2 = long) */
1729 20, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont, /* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_NDS32_TLS_IE_HI20", /* name */
1735 FALSE, /* partial_inplace */
1736 0x000fffff, /* src_mask */
1737 0x000fffff, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1740 2, /* rightshift */
1741 2, /* size (0 = byte, 1 = short, 2 = long) */
1742 10, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont, /* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_NDS32_TLS_IE_LO12S2", /* name */
1748 FALSE, /* partial_inplace */
1749 0x000003ff, /* src_mask */
1750 0x000003ff, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752 /* Mark a TLS IE entry in GOT. */
1753 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1754 0, /* rightshift */
1755 2, /* size (0 = byte, 1 = short, 2 = long) */
1756 32, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_bitfield, /* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_NDS32_TLS_TPOFF", /* name */
1762 FALSE, /* partial_inplace */
1763 0xffffffff, /* src_mask */
1764 0xffffffff, /* dst_mask */
1765 FALSE), /* pcrel_offset */
1766 /* A 20 bit address. */
1767 HOWTO (R_NDS32_TLS_LE_20, /* type */
1768 0, /* rightshift */
1769 2, /* size (0 = byte, 1 = short, 2 = long) */
1770 20, /* bitsize */
1771 FALSE, /* pc_relative */
1772 0, /* bitpos */
1773 complain_overflow_signed, /* complain_on_overflow */
1774 bfd_elf_generic_reloc, /* special_function */
1775 "R_NDS32_TLS_LE_20", /* name */
1776 FALSE, /* partial_inplace */
1777 0xfffff, /* src_mask */
1778 0xfffff, /* dst_mask */
1779 FALSE), /* pcrel_offset */
1780 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1781 0, /* rightshift */
1782 2, /* size (0 = byte, 1 = short, 2 = long) */
1783 15, /* bitsize */
1784 FALSE, /* pc_relative */
1785 0, /* bitpos */
1786 complain_overflow_signed, /* complain_on_overflow */
1787 bfd_elf_generic_reloc, /* special_function */
1788 "R_NDS32_TLS_LE_15S0", /* name */
1789 FALSE, /* partial_inplace */
1790 0x7fff, /* src_mask */
1791 0x7fff, /* dst_mask */
1792 FALSE), /* pcrel_offset */
1793 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1794 1, /* rightshift */
1795 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 15, /* bitsize */
1797 FALSE, /* pc_relative */
1798 0, /* bitpos */
1799 complain_overflow_signed, /* complain_on_overflow */
1800 bfd_elf_generic_reloc, /* special_function */
1801 "R_NDS32_TLS_LE_15S1", /* name */
1802 FALSE, /* partial_inplace */
1803 0x7fff, /* src_mask */
1804 0x7fff, /* dst_mask */
1805 FALSE), /* pcrel_offset */
1806 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1807 2, /* rightshift */
1808 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 15, /* bitsize */
1810 FALSE, /* pc_relative */
1811 0, /* bitpos */
1812 complain_overflow_signed, /* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_LE_15S2", /* name */
1815 FALSE, /* partial_inplace */
1816 0x7fff, /* src_mask */
1817 0x7fff, /* dst_mask */
1818 FALSE), /* pcrel_offset */
1819
1820 /* Relax hint for unconditional call sequence */
1821 HOWTO (R_NDS32_LONGCALL4, /* type */
1822 0, /* rightshift */
1823 2, /* size (0 = byte, 1 = short, 2 = long) */
1824 32, /* bitsize */
1825 FALSE, /* pc_relative */
1826 0, /* bitpos */
1827 complain_overflow_dont, /* complain_on_overflow */
1828 nds32_elf_ignore_reloc, /* special_function */
1829 "R_NDS32_LONGCALL4", /* name */
1830 FALSE, /* partial_inplace */
1831 0xffffffff, /* src_mask */
1832 0xffffffff, /* dst_mask */
1833 FALSE), /* pcrel_offset */
1834
1835 /* Relax hint for conditional call sequence. */
1836 HOWTO (R_NDS32_LONGCALL5, /* type */
1837 0, /* rightshift */
1838 2, /* size (0 = byte, 1 = short, 2 = long) */
1839 32, /* bitsize */
1840 FALSE, /* pc_relative */
1841 0, /* bitpos */
1842 complain_overflow_dont, /* complain_on_overflow */
1843 nds32_elf_ignore_reloc, /* special_function */
1844 "R_NDS32_LONGCALL5", /* name */
1845 FALSE, /* partial_inplace */
1846 0xffffffff, /* src_mask */
1847 0xffffffff, /* dst_mask */
1848 FALSE), /* pcrel_offset */
1849
1850 /* Relax hint for conditional call sequence. */
1851 HOWTO (R_NDS32_LONGCALL6, /* type */
1852 0, /* rightshift */
1853 2, /* size (0 = byte, 1 = short, 2 = long) */
1854 32, /* bitsize */
1855 FALSE, /* pc_relative */
1856 0, /* bitpos */
1857 complain_overflow_dont, /* complain_on_overflow */
1858 nds32_elf_ignore_reloc, /* special_function */
1859 "R_NDS32_LONGCALL6", /* name */
1860 FALSE, /* partial_inplace */
1861 0xffffffff, /* src_mask */
1862 0xffffffff, /* dst_mask */
1863 FALSE), /* pcrel_offset */
1864
1865 /* Relax hint for unconditional branch sequence. */
1866 HOWTO (R_NDS32_LONGJUMP4, /* type */
1867 0, /* rightshift */
1868 2, /* size (0 = byte, 1 = short, 2 = long) */
1869 32, /* bitsize */
1870 FALSE, /* pc_relative */
1871 0, /* bitpos */
1872 complain_overflow_dont, /* complain_on_overflow */
1873 nds32_elf_ignore_reloc, /* special_function */
1874 "R_NDS32_LONGJUMP4", /* name */
1875 FALSE, /* partial_inplace */
1876 0xffffffff, /* src_mask */
1877 0xffffffff, /* dst_mask */
1878 FALSE), /* pcrel_offset */
1879
1880 /* Relax hint for conditional branch sequence. */
1881 HOWTO (R_NDS32_LONGJUMP5, /* type */
1882 0, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 32, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_dont, /* complain_on_overflow */
1888 nds32_elf_ignore_reloc, /* special_function */
1889 "R_NDS32_LONGJUMP5", /* name */
1890 FALSE, /* partial_inplace */
1891 0xffffffff, /* src_mask */
1892 0xffffffff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for conditional branch sequence. */
1896 HOWTO (R_NDS32_LONGJUMP6, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGJUMP6", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional branch sequence. */
1911 HOWTO (R_NDS32_LONGJUMP7, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGJUMP7", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
35c08157
KLC		 1924};
1925
1926/* Relocations used for relaxation. */
1927static reloc_howto_type nds32_elf_relax_howto_table[] =
1928{
1929 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1930 0, /* rightshift */
1931 2, /* size (0 = byte, 1 = short, 2 = long) */
1932 32, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 nds32_elf_ignore_reloc,/* special_function */
1937 "R_NDS32_RELAX_ENTRY", /* name */
1938 FALSE, /* partial_inplace */
1939 0xffffffff, /* src_mask */
1940 0xffffffff, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942 HOWTO (R_NDS32_GOT_SUFF, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont,/* complain_on_overflow */
1949 nds32_elf_ignore_reloc,/* special_function */
1950 "R_NDS32_GOT_SUFF", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1956 0, /* rightshift */
1957 2, /* size (0 = byte, 1 = short, 2 = long) */
1958 32, /* bitsize */
1959 FALSE, /* pc_relative */
1960 0, /* bitpos */
1961 complain_overflow_bitfield, /* complain_on_overflow */
1962 nds32_elf_ignore_reloc,/* special_function */
1963 "R_NDS32_GOTOFF_SUFF", /* name */
1964 FALSE, /* partial_inplace */
1965 0xffffffff, /* src_mask */
1966 0xffffffff, /* dst_mask */
1967 FALSE), /* pcrel_offset */
1968 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1969 0, /* rightshift */
1970 2, /* size (0 = byte, 1 = short, 2 = long) */
1971 32, /* bitsize */
1972 FALSE, /* pc_relative */
1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_PLT_GOT_SUFF",/* name */
1977 FALSE, /* partial_inplace */
1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
1980 FALSE), /* pcrel_offset */
1981 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1982 0, /* rightshift */
1983 2, /* size (0 = byte, 1 = short, 2 = long) */
1984 32, /* bitsize */
1985 FALSE, /* pc_relative */
1986 0, /* bitpos */
1987 complain_overflow_dont,/* complain_on_overflow */
1988 nds32_elf_ignore_reloc,/* special_function */
1989 "R_NDS32_MULCALL_SUFF",/* name */
1990 FALSE, /* partial_inplace */
1991 0xffffffff, /* src_mask */
1992 0xffffffff, /* dst_mask */
1993 FALSE), /* pcrel_offset */
1994 HOWTO (R_NDS32_PTR, /* type */
1995 0, /* rightshift */
1996 2, /* size (0 = byte, 1 = short, 2 = long) */
1997 32, /* bitsize */
1998 FALSE, /* pc_relative */
1999 0, /* bitpos */
2000 complain_overflow_dont,/* complain_on_overflow */
2001 nds32_elf_ignore_reloc,/* special_function */
2002 "R_NDS32_PTR", /* name */
2003 FALSE, /* partial_inplace */
2004 0xffffffff, /* src_mask */
2005 0xffffffff, /* dst_mask */
2006 FALSE), /* pcrel_offset */
2007 HOWTO (R_NDS32_PTR_COUNT, /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 32, /* bitsize */
2011 FALSE, /* pc_relative */
2012 0, /* bitpos */
2013 complain_overflow_dont,/* complain_on_overflow */
2014 nds32_elf_ignore_reloc,/* special_function */
2015 "R_NDS32_PTR_COUNT", /* name */
2016 FALSE, /* partial_inplace */
2017 0xffffffff, /* src_mask */
2018 0xffffffff, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2021 0, /* rightshift */
2022 2, /* size (0 = byte, 1 = short, 2 = long) */
2023 32, /* bitsize */
2024 FALSE, /* pc_relative */
2025 0, /* bitpos */
2026 complain_overflow_dont,/* complain_on_overflow */
2027 nds32_elf_ignore_reloc,/* special_function */
2028 "R_NDS32_PTR_RESOLVED",/* name */
2029 FALSE, /* partial_inplace */
2030 0xffffffff, /* src_mask */
2031 0xffffffff, /* dst_mask */
2032 FALSE), /* pcrel_offset */
2033 HOWTO (R_NDS32_PLTBLOCK, /* type */
2034 0, /* rightshift */
2035 2, /* size (0 = byte, 1 = short, 2 = long) */
2036 32, /* bitsize */
2037 FALSE, /* pc_relative */
2038 0, /* bitpos */
2039 complain_overflow_dont,/* complain_on_overflow */
2040 nds32_elf_ignore_reloc,/* special_function */
2041 "R_NDS32_PLTBLOCK", /* name */
2042 FALSE, /* partial_inplace */
2043 0xffffffff, /* src_mask */
2044 0xffffffff, /* dst_mask */
2045 FALSE), /* pcrel_offset */
2046 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2047 0, /* rightshift */
2048 2, /* size (0 = byte, 1 = short, 2 = long) */
2049 32, /* bitsize */
2050 FALSE, /* pc_relative */
2051 0, /* bitpos */
2052 complain_overflow_dont,/* complain_on_overflow */
2053 nds32_elf_ignore_reloc,/* special_function */
2054 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2055 FALSE, /* partial_inplace */
2056 0xffffffff, /* src_mask */
2057 0xffffffff, /* dst_mask */
2058 FALSE), /* pcrel_offset */
2059 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2060 0, /* rightshift */
2061 2, /* size (0 = byte, 1 = short, 2 = long) */
2062 32, /* bitsize */
2063 FALSE, /* pc_relative */
2064 0, /* bitpos */
2065 complain_overflow_dont,/* complain_on_overflow */
2066 nds32_elf_ignore_reloc,/* special_function */
2067 "R_NDS32_RELAX_REGION_END", /* name */
2068 FALSE, /* partial_inplace */
2069 0xffffffff, /* src_mask */
2070 0xffffffff, /* dst_mask */
2071 FALSE), /* pcrel_offset */
2072 HOWTO (R_NDS32_MINUEND, /* type */
2073 0, /* rightshift */
2074 2, /* size (0 = byte, 1 = short, 2 = long) */
2075 32, /* bitsize */
2076 FALSE, /* pc_relative */
2077 0, /* bitpos */
2078 complain_overflow_dont,/* complain_on_overflow */
2079 nds32_elf_ignore_reloc,/* special_function */
2080 "R_NDS32_MINUEND", /* name */
2081 FALSE, /* partial_inplace */
2082 0xffffffff, /* src_mask */
2083 0xffffffff, /* dst_mask */
2084 FALSE), /* pcrel_offset */
2085 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2086 0, /* rightshift */
2087 2, /* size (0 = byte, 1 = short, 2 = long) */
2088 32, /* bitsize */
2089 FALSE, /* pc_relative */
2090 0, /* bitpos */
2091 complain_overflow_dont,/* complain_on_overflow */
2092 nds32_elf_ignore_reloc,/* special_function */
2093 "R_NDS32_SUBTRAHEND", /* name */
2094 FALSE, /* partial_inplace */
2095 0xffffffff, /* src_mask */
2096 0xffffffff, /* dst_mask */
2097 FALSE), /* pcrel_offset */
2098 HOWTO (R_NDS32_DIFF8, /* type */
2099 0, /* rightshift */
2100 0, /* size (0 = byte, 1 = short, 2 = long) */
2101 8, /* bitsize */
2102 FALSE, /* pc_relative */
2103 0, /* bitpos */
2104 complain_overflow_dont,/* complain_on_overflow */
2105 nds32_elf_ignore_reloc,/* special_function */
2106 "R_NDS32_DIFF8", /* name */
2107 FALSE, /* partial_inplace */
2108 0x000000ff, /* src_mask */
2109 0x000000ff, /* dst_mask */
2110 FALSE), /* pcrel_offset */
2111 HOWTO (R_NDS32_DIFF16, /* type */
2112 0, /* rightshift */
2113 1, /* size (0 = byte, 1 = short, 2 = long) */
2114 16, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
2117 complain_overflow_dont,/* complain_on_overflow */
2118 nds32_elf_ignore_reloc,/* special_function */
2119 "R_NDS32_DIFF16", /* name */
2120 FALSE, /* partial_inplace */
2121 0x0000ffff, /* src_mask */
2122 0x0000ffff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124 HOWTO (R_NDS32_DIFF32, /* type */
2125 0, /* rightshift */
2126 2, /* size (0 = byte, 1 = short, 2 = long) */
2127 32, /* bitsize */
2128 FALSE, /* pc_relative */
2129 0, /* bitpos */
2130 complain_overflow_dont,/* complain_on_overflow */
2131 nds32_elf_ignore_reloc,/* special_function */
2132 "R_NDS32_DIFF32", /* name */
2133 FALSE, /* partial_inplace */
2134 0xffffffff, /* src_mask */
2135 0xffffffff, /* dst_mask */
2136 FALSE), /* pcrel_offset */
2137 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2138 0, /* rightshift */
2139 0, /* size (0 = byte, 1 = short, 2 = long) */
2140 0, /* bitsize */
2141 FALSE, /* pc_relative */
2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_DIFF_ULEB128",/* name */
2146 FALSE, /* partial_inplace */
2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
2149 FALSE), /* pcrel_offset */
2150 HOWTO (R_NDS32_DATA, /* type */
2151 0, /* rightshift */
2152 2, /* size (0 = byte, 1 = short, 2 = long) */
2153 32, /* bitsize */
2154 FALSE, /* pc_relative */
2155 0, /* bitpos */
2156 complain_overflow_dont,/* complain_on_overflow */
2157 nds32_elf_ignore_reloc,/* special_function */
2158 "R_NDS32_DATA", /* name */
2159 FALSE, /* partial_inplace */
2160 0xffffffff, /* src_mask */
2161 0xffffffff, /* dst_mask */
2162 FALSE), /* pcrel_offset */
2163 HOWTO (R_NDS32_TRAN, /* type */
2164 0, /* rightshift */
2165 2, /* size (0 = byte, 1 = short, 2 = long) */
2166 32, /* bitsize */
2167 FALSE, /* pc_relative */
2168 0, /* bitpos */
2169 complain_overflow_dont,/* complain_on_overflow */
2170 nds32_elf_ignore_reloc,/* special_function */
2171 "R_NDS32_TRAN", /* name */
2172 FALSE, /* partial_inplace */
2173 0xffffffff, /* src_mask */
2174 0xffffffff, /* dst_mask */
2175 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2176 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2177 0, /* rightshift */
2178 2, /* size (0 = byte, 1 = short, 2 = long) */
2179 32, /* bitsize */
2180 FALSE, /* pc_relative */
2181 0, /* bitpos */
2182 complain_overflow_dont, /* complain_on_overflow */
2183 nds32_elf_ignore_reloc, /* special_function */
2184 "R_NDS32_TLS_LE_ADD", /* name */
2185 FALSE, /* partial_inplace */
2186 0xffffffff, /* src_mask */
2187 0xffffffff, /* dst_mask */
2188 FALSE), /* pcrel_offset */
2189 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2190 0, /* rightshift */
2191 2, /* size (0 = byte, 1 = short, 2 = long) */
2192 32, /* bitsize */
2193 FALSE, /* pc_relative */
2194 0, /* bitpos */
2195 complain_overflow_dont, /* complain_on_overflow */
2196 nds32_elf_ignore_reloc, /* special_function */
2197 "R_NDS32_TLS_LE_LS", /* name */
2198 FALSE, /* partial_inplace */
2199 0xffffffff, /* src_mask */
2200 0xffffffff, /* dst_mask */
2201 FALSE), /* pcrel_offset */
2202 HOWTO (R_NDS32_EMPTY, /* type */
2203 0, /* rightshift */
2204 2, /* size (0 = byte, 1 = short, 2 = long) */
2205 32, /* bitsize */
2206 FALSE, /* pc_relative */
2207 0, /* bitpos */
2208 complain_overflow_dont, /* complain_on_overflow */
2209 nds32_elf_ignore_reloc, /* special_function */
2210 "R_NDS32_EMPTY", /* name */
2211 FALSE, /* partial_inplace */
2212 0xffffffff, /* src_mask */
2213 0xffffffff, /* dst_mask */
2214 FALSE), /* pcrel_offset */
35c08157
KLC		 2215};
2216
2217\f
2218/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2219 This prototype is the same as qsort (). */
2220
2221void
2222nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2223 int (*compar) (const void *lhs, const void *rhs))
2224{
2225 char *ptr = (char *) base;
1c8f6a4d 2226 int i, j;
e1fa0163 2227 char *tmp = xmalloc (size);
35c08157
KLC		 2228
2229 /* If i is less than j, i is inserted before j.
2230
2231 |---- j ----- i --------------|
2232 \ / \ /
2233 sorted unsorted
2234 */
2235
1c8f6a4d 2236 for (i = 1; i < (int) nmemb; i++)
35c08157 2237 {
1c8f6a4d
KLC		 2238 for (j = (i - 1); j >= 0; j--)
2239 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2240 break;
2241
1c8f6a4d
KLC		 2242 j++;
2243
35c08157 2244 if (i == j)
1c8f6a4d 2245 continue; /* i is in order. */
35c08157
KLC		 2246
2247 memcpy (tmp, ptr + i * size, size);
2248 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2249 memcpy (ptr + j * size, tmp, size);
2250 }
e1fa0163 2251 free (tmp);
35c08157
KLC		 2252}
2253
2254/* Sort relocation by r_offset.
2255
2256 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2257 algorithm. Relocations at the same r_offset must keep their order.
2258 For example, RELAX_ENTRY must be the very first relocation entry.
2259
2260 Currently, this function implements insertion-sort.
2261
2262 FIXME: If we already sort them in assembler, why bother sort them
2263 here again? */
2264
2265static int
2266compar_reloc (const void *lhs, const void *rhs)
2267{
2268 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2269 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2270
2271 if (l->r_offset > r->r_offset)
2272 return 1;
2273 else if (l->r_offset == r->r_offset)
2274 return 0;
2275 else
2276 return -1;
2277}
2278
2279/* Functions listed below are only used for old relocs.
2280 * nds32_elf_9_pcrel_reloc
2281 * nds32_elf_do_9_pcrel_reloc
2282 * nds32_elf_hi20_reloc
2283 * nds32_elf_relocate_hi20
2284 * nds32_elf_lo12_reloc
2285 * nds32_elf_sda15_reloc
2286 * nds32_elf_generic_reloc
2287 */
2288
2289/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2290
2291static bfd_reloc_status_type
2292nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2293 void *data, asection *input_section, bfd *output_bfd,
2294 char **error_message ATTRIBUTE_UNUSED)
2295{
2296 /* This part is from bfd_elf_generic_reloc. */
2297 if (output_bfd != (bfd *) NULL
2298 && (symbol->flags & BSF_SECTION_SYM) == 0
2299 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2300 {
2301 reloc_entry->address += input_section->output_offset;
2302 return bfd_reloc_ok;
2303 }
2304
2305 if (output_bfd != NULL)
2306 {
2307 /* FIXME: See bfd_perform_relocation. Is this right? */
2308 return bfd_reloc_continue;
2309 }
2310
2311 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2312 input_section,
2313 data, reloc_entry->address,
2314 symbol->section,
2315 (symbol->value
2316 + symbol->section->output_section->vma
2317 + symbol->section->output_offset),
2318 reloc_entry->addend);
2319}
2320
2321/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2322#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2323
2324static bfd_reloc_status_type
2325nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2326 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2327 bfd_vma offset,
2328 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2329 bfd_vma symbol_value, bfd_vma addend)
2330{
2331 bfd_signed_vma relocation;
2332 unsigned short x;
2333 bfd_reloc_status_type status;
2334
2335 /* Sanity check the address (offset in section). */
2336 if (offset > bfd_get_section_limit (abfd, input_section))
2337 return bfd_reloc_outofrange;
2338
2339 relocation = symbol_value + addend;
2340 /* Make it pc relative. */
2341 relocation -= (input_section->output_section->vma
2342 + input_section->output_offset);
2343 /* These jumps mask off the lower two bits of the current address
2344 before doing pcrel calculations. */
2345 relocation -= (offset & -(bfd_vma) 2);
2346
1c8f6a4d 2347 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2348 status = bfd_reloc_overflow;
2349 else
2350 status = bfd_reloc_ok;
2351
2352 x = bfd_getb16 (data + offset);
2353
2354 relocation >>= howto->rightshift;
2355 relocation <<= howto->bitpos;
2356 x = (x & ~howto->dst_mask)
2357 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2358
2359 bfd_putb16 ((bfd_vma) x, data + offset);
2360
2361 return status;
2362}
2363
2364/* Handle the R_NDS32_HI20_[SU]LO relocs.
2365 HI20_SLO is for the add3 and load/store with displacement instructions.
2366 HI20 is for the or3 instruction.
2367 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2368 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2369 we must add one to the high 16 bytes (which will get subtracted off when
2370 the low 16 bits are added).
2371 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2372 because there is a carry from the LO12 to the HI20. Here we just save
2373 the information we need; we do the actual relocation when we see the LO12.
2374 This code is copied from the elf32-mips.c. We also support an arbitrary
2375 number of HI20 relocs to be associated with a single LO12 reloc. The
2376 assembler sorts the relocs to ensure each HI20 immediately precedes its
2377 LO12. However if there are multiple copies, the assembler may not find
2378 the real LO12 so it picks the first one it finds. */
2379
2380struct nds32_hi20
2381{
2382 struct nds32_hi20 *next;
2383 bfd_byte *addr;
2384 bfd_vma addend;
2385};
2386
2387static struct nds32_hi20 *nds32_hi20_list;
2388
2389static bfd_reloc_status_type
2390nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2391 asymbol *symbol, void *data, asection *input_section,
2392 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2393{
2394 bfd_reloc_status_type ret;
2395 bfd_vma relocation;
2396 struct nds32_hi20 *n;
2397
2398 /* This part is from bfd_elf_generic_reloc.
2399 If we're relocating, and this an external symbol, we don't want
2400 to change anything. */
2401 if (output_bfd != (bfd *) NULL
2402 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2403 {
2404 reloc_entry->address += input_section->output_offset;
2405 return bfd_reloc_ok;
2406 }
2407
2408 /* Sanity check the address (offset in section). */
2409 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2410 return bfd_reloc_outofrange;
2411
2412 ret = bfd_reloc_ok;
2413 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2414 ret = bfd_reloc_undefined;
2415
2416 if (bfd_is_com_section (symbol->section))
2417 relocation = 0;
2418 else
2419 relocation = symbol->value;
2420
2421 relocation += symbol->section->output_section->vma;
2422 relocation += symbol->section->output_offset;
2423 relocation += reloc_entry->addend;
2424
2425 /* Save the information, and let LO12 do the actual relocation. */
2426 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2427 if (n == NULL)
2428 return bfd_reloc_outofrange;
2429
2430 n->addr = (bfd_byte *) data + reloc_entry->address;
2431 n->addend = relocation;
2432 n->next = nds32_hi20_list;
2433 nds32_hi20_list = n;
2434
2435 if (output_bfd != (bfd *) NULL)
2436 reloc_entry->address += input_section->output_offset;
2437
2438 return ret;
2439}
2440
2441/* Handle an NDS32 ELF HI20 reloc. */
2442
2443static void
2444nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2445 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2446 Elf_Internal_Rela *rello, bfd_byte *contents,
2447 bfd_vma addend)
2448{
2449 unsigned long insn;
2450 bfd_vma addlo;
2451
2452 insn = bfd_getb32 (contents + relhi->r_offset);
2453
2454 addlo = bfd_getb32 (contents + rello->r_offset);
2455 addlo &= 0xfff;
2456
2457 addend += ((insn & 0xfffff) << 20) + addlo;
2458
2459 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2460 bfd_putb32 (insn, contents + relhi->r_offset);
2461}
2462
2463/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2464 inplace relocation; this function exists in order to do the
2465 R_NDS32_HI20_[SU]LO relocation described above. */
2466
2467static bfd_reloc_status_type
2468nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2469 void *data, asection *input_section, bfd *output_bfd,
2470 char **error_message)
2471{
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2476 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 if (nds32_hi20_list != NULL)
2483 {
2484 struct nds32_hi20 *l;
2485
2486 l = nds32_hi20_list;
2487 while (l != NULL)
2488 {
2489 unsigned long insn;
2490 unsigned long val;
2491 unsigned long vallo;
2492 struct nds32_hi20 *next;
2493
2494 /* Do the HI20 relocation. Note that we actually don't need
2495 to know anything about the LO12 itself, except where to
2496 find the low 12 bits of the addend needed by the LO12. */
2497 insn = bfd_getb32 (l->addr);
2498 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2499 vallo &= 0xfff;
2500 switch (reloc_entry->howto->type)
2501 {
2502 case R_NDS32_LO12S3:
2503 vallo <<= 3;
2504 break;
2505
2506 case R_NDS32_LO12S2:
2507 vallo <<= 2;
2508 break;
2509
2510 case R_NDS32_LO12S1:
2511 vallo <<= 1;
2512 break;
2513
2514 case R_NDS32_LO12S0:
2515 vallo <<= 0;
2516 break;
2517 }
2518
2519 val = ((insn & 0xfffff) << 12) + vallo;
2520 val += l->addend;
2521
2522 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2523 bfd_putb32 ((bfd_vma) insn, l->addr);
2524
2525 next = l->next;
2526 free (l);
2527 l = next;
2528 }
2529
2530 nds32_hi20_list = NULL;
2531 }
2532
2533 /* Now do the LO12 reloc in the usual way.
2534 ??? It would be nice to call bfd_elf_generic_reloc here,
2535 but we have partial_inplace set. bfd_elf_generic_reloc will
2536 pass the handling back to bfd_install_relocation which will install
2537 a section relative addend which is wrong. */
2538 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2539 input_section, output_bfd, error_message);
2540}
2541
2542/* Do generic partial_inplace relocation.
2543 This is a local replacement for bfd_elf_generic_reloc. */
2544
2545static bfd_reloc_status_type
2546nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2547 asymbol *symbol, void *data, asection *input_section,
2548 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2549{
2550 bfd_reloc_status_type ret;
2551 bfd_vma relocation;
2552 bfd_byte *inplace_address;
2553
2554 /* This part is from bfd_elf_generic_reloc.
2555 If we're relocating, and this an external symbol, we don't want
2556 to change anything. */
2557 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2558 && reloc_entry->addend == 0)
2559 {
2560 reloc_entry->address += input_section->output_offset;
2561 return bfd_reloc_ok;
2562 }
2563
2564 /* Now do the reloc in the usual way.
2565 ??? It would be nice to call bfd_elf_generic_reloc here,
2566 but we have partial_inplace set. bfd_elf_generic_reloc will
2567 pass the handling back to bfd_install_relocation which will install
2568 a section relative addend which is wrong. */
2569
2570 /* Sanity check the address (offset in section). */
2571 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2572 return bfd_reloc_outofrange;
2573
2574 ret = bfd_reloc_ok;
2575 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2576 ret = bfd_reloc_undefined;
2577
2578 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2579 relocation = 0;
2580 else
2581 relocation = symbol->value;
2582
2583 /* Only do this for a final link. */
2584 if (output_bfd == (bfd *) NULL)
2585 {
2586 relocation += symbol->section->output_section->vma;
2587 relocation += symbol->section->output_offset;
2588 }
2589
2590 relocation += reloc_entry->addend;
2591 switch (reloc_entry->howto->type)
2592 {
2593 case R_NDS32_LO12S3:
2594 relocation >>= 3;
2595 break;
2596
2597 case R_NDS32_LO12S2:
2598 relocation >>= 2;
2599 break;
2600
2601 case R_NDS32_LO12S1:
2602 relocation >>= 1;
2603 break;
2604
2605 case R_NDS32_LO12S0:
2606 default:
2607 relocation >>= 0;
2608 break;
2609 }
2610
2611 inplace_address = (bfd_byte *) data + reloc_entry->address;
2612
2613#define DOIT(x) \
2614 x = ((x & ~reloc_entry->howto->dst_mask) | \
2615 (((x & reloc_entry->howto->src_mask) + relocation) & \
2616 reloc_entry->howto->dst_mask))
2617
2618 switch (reloc_entry->howto->size)
2619 {
2620 case 1:
2621 {
2622 short x = bfd_getb16 (inplace_address);
2623
2624 DOIT (x);
2625 bfd_putb16 ((bfd_vma) x, inplace_address);
2626 }
2627 break;
2628 case 2:
2629 {
2630 unsigned long x = bfd_getb32 (inplace_address);
2631
2632 DOIT (x);
2633 bfd_putb32 ((bfd_vma) x, inplace_address);
2634 }
2635 break;
2636 default:
2637 BFD_ASSERT (0);
2638 }
2639
2640 if (output_bfd != (bfd *) NULL)
2641 reloc_entry->address += input_section->output_offset;
2642
2643 return ret;
2644}
2645
2646/* Handle the R_NDS32_SDA15 reloc.
2647 This reloc is used to compute the address of objects in the small data area
2648 and to perform loads and stores from that area.
2649 The lower 15 bits are sign extended and added to the register specified
2650 in the instruction, which is assumed to point to _SDA_BASE_.
2651
2652 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2653 the access size, this must be taken care of. */
2654
2655static bfd_reloc_status_type
2656nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2657 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2658 asection *input_section, bfd *output_bfd,
2659 char **error_message ATTRIBUTE_UNUSED)
2660{
2661 /* This part is from bfd_elf_generic_reloc. */
2662 if (output_bfd != (bfd *) NULL
2663 && (symbol->flags & BSF_SECTION_SYM) == 0
2664 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2665 {
2666 reloc_entry->address += input_section->output_offset;
2667 return bfd_reloc_ok;
2668 }
2669
2670 if (output_bfd != NULL)
2671 {
2672 /* FIXME: See bfd_perform_relocation. Is this right? */
2673 return bfd_reloc_continue;
2674 }
2675
2676 /* FIXME: not sure what to do here yet. But then again, the linker
2677 may never call us. */
2678 abort ();
2679}
2680
2681/* nds32_elf_ignore_reloc is the special function for
2682 relocation types which don't need to be relocated
2683 like relaxation relocation types.
2684 This function simply return bfd_reloc_ok when it is
2685 invoked. */
2686
2687static bfd_reloc_status_type
2688nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2689 asymbol *symbol ATTRIBUTE_UNUSED,
2690 void *data ATTRIBUTE_UNUSED, asection *input_section,
2691 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2692{
2693 if (output_bfd != NULL)
2694 reloc_entry->address += input_section->output_offset;
2695
2696 return bfd_reloc_ok;
2697}
2698\f
2699
2700/* Map BFD reloc types to NDS32 ELF reloc types. */
2701
2702struct nds32_reloc_map_entry
2703{
2704 bfd_reloc_code_real_type bfd_reloc_val;
2705 unsigned char elf_reloc_val;
2706};
2707
2708static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2709{
2710 {BFD_RELOC_NONE, R_NDS32_NONE},
2711 {BFD_RELOC_16, R_NDS32_16_RELA},
2712 {BFD_RELOC_32, R_NDS32_32_RELA},
2713 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2714 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2715 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2716 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2717 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2718 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2719 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2720 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2721 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2722 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2723 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2724 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2725 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2726 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2727 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2728 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2729 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2730 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2731 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2732 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2733
2734 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2735 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2736 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2737 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2738 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2739 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2740 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2741 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2742 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2743 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2744 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2745 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2746 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2747 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2748 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2749 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2750 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2751 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2752 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2753 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2754 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2755 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2756 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2757 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2758 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2759 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2760 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2761 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2762 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2763 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2764 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2765 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2766 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2767 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2768 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2769 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2770 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2771 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2772 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2773 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2774 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2775 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2776 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2777 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2778 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2779 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2780 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2781 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2782 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2783 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2784 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2785 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2786 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2787 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2788 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2789 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2790 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2791 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2792 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2793 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2794 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2795 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2796 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2797 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2798 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2799 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2800 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2801 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2802 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2803 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2804 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2805 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2806 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2807 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2808 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2809
2810 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2811 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2812 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2813 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2814 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2815 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2816 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2817 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2818 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2819 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2820 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2821 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2822 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2823 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2824 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2825 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2826 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2827 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2828 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2829 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2830};
2831
2832/* Patch tag. */
2833
2834static reloc_howto_type *
2835bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2836 const char *r_name)
2837{
2838 unsigned int i;
2839
2840 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2841 if (nds32_elf_howto_table[i].name != NULL
2842 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2843 return &nds32_elf_howto_table[i];
2844
2845 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2846 if (nds32_elf_relax_howto_table[i].name != NULL
2847 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2848 return &nds32_elf_relax_howto_table[i];
2849
2850 return NULL;
2851}
2852
2853static reloc_howto_type *
2854bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2855{
2856 if (code < R_NDS32_RELAX_ENTRY)
2857 {
2858 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2859 return &nds32_elf_howto_table[code];
2860 }
2861 else
2862 {
2863 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2864 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2865 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2866 }
2867}
2868
2869static reloc_howto_type *
2870bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2871 bfd_reloc_code_real_type code)
2872{
2873 unsigned int i;
2874
2875 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2876 {
2877 if (nds32_reloc_map[i].bfd_reloc_val == code)
2878 return bfd_elf32_bfd_reloc_type_table_lookup
2879 (nds32_reloc_map[i].elf_reloc_val);
2880 }
2881
2882 return NULL;
2883}
2884
2885/* Set the howto pointer for an NDS32 ELF reloc. */
2886
f3185997
NC		 2887static bfd_boolean
2888nds32_info_to_howto_rel (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 2889 Elf_Internal_Rela *dst)
2890{
2891 enum elf_nds32_reloc_type r_type;
2892
2893 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2894 if (r_type > R_NDS32_GNU_VTENTRY)
2895 {
695344c0 2896 /* xgettext:c-format */
0aa13fee
AM		 2897 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2898 abfd, r_type);
f3185997
NC		 2899 bfd_set_error (bfd_error_bad_value);
2900 return FALSE;
5860e3f8 2901 }
35c08157 2902 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
f3185997 2903 return TRUE;
35c08157
KLC		 2904}
2905
f3185997 2906static bfd_boolean
35c08157
KLC		 2907nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2908 Elf_Internal_Rela *dst)
2909{
f3185997
NC		 2910 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
2911
2912 if ((r_type == R_NDS32_NONE)
2913 || ((r_type > R_NDS32_GNU_VTENTRY)
2914 && (r_type < R_NDS32_max)))
2915 {
2916 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2917 return TRUE;
2918 }
2919
2920 /* xgettext:c-format */
2921 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2922 bfd_set_error (bfd_error_bad_value);
2923 return FALSE;
35c08157
KLC		 2924}
2925
2926/* Support for core dump NOTE sections.
2927 Reference to include/linux/elfcore.h in Linux. */
2928
2929static bfd_boolean
2930nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2931{
2932 int offset;
2933 size_t size;
2934
2935 switch (note->descsz)
2936 {
2937 case 0x114:
2938 /* Linux/NDS32 32-bit, ABI1 */
2939
2940 /* pr_cursig */
2941 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2942
2943 /* pr_pid */
2944 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2945
2946 /* pr_reg */
2947 offset = 72;
2948 size = 200;
2949 break;
2950
2951 case 0xfc:
2952 /* Linux/NDS32 32-bit */
2953
2954 /* pr_cursig */
2955 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2956
2957 /* pr_pid */
2958 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2959
2960 /* pr_reg */
2961 offset = 72;
2962 size = 176;
2963 break;
2964
2965 default:
2966 return FALSE;
2967 }
2968
2969 /* Make a ".reg" section. */
2970 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2971 size, note->descpos + offset);
2972}
2973
2974static bfd_boolean
2975nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2976{
2977 switch (note->descsz)
2978 {
2979 case 124:
2980 /* Linux/NDS32 */
2981
2982 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2983 elf_tdata (abfd)->core->program =
2984 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2985 elf_tdata (abfd)->core->command =
2986 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 2987 break;
35c08157
KLC		 2988
2989 default:
2990 return FALSE;
2991 }
2992
2993 /* Note that for some reason, a spurious space is tacked
2994 onto the end of the args in some (at least one anyway)
2995 implementations, so strip it off if it exists. */
2996 {
2997 char *command = elf_tdata (abfd)->core->command;
2998 int n = strlen (command);
2999
3000 if (0 < n && command[n - 1] == ' ')
3001 command[n - 1] = '\0';
3002 }
3003
3004 return TRUE;
3005}
3006
3007/* Hook called by the linker routine which adds symbols from an object
3008 file. We must handle the special NDS32 section numbers here.
3009 We also keep watching for whether we need to create the sdata special
3010 linker sections. */
3011
3012static bfd_boolean
3013nds32_elf_add_symbol_hook (bfd *abfd,
3014 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3015 Elf_Internal_Sym *sym,
3016 const char **namep ATTRIBUTE_UNUSED,
3017 flagword *flagsp ATTRIBUTE_UNUSED,
3018 asection **secp, bfd_vma *valp)
3019{
3020 switch (sym->st_shndx)
3021 {
3022 case SHN_COMMON:
3023 /* Common symbols less than the GP size are automatically
3024 treated as SHN_MIPS_SCOMMON symbols. */
3025 if (sym->st_size > elf_gp_size (abfd)
3026 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3027 break;
3028
3029 /* st_value is the alignemnt constraint.
3030 That might be its actual size if it is an array or structure. */
3031 switch (sym->st_value)
3032 {
3033 case 1:
3034 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3035 break;
3036 case 2:
3037 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3038 break;
3039 case 4:
3040 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3041 break;
3042 case 8:
3043 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3044 break;
3045 default:
3046 return TRUE;
3047 }
3048
3049 (*secp)->flags |= SEC_IS_COMMON;
3050 *valp = sym->st_size;
3051 break;
3052 }
3053
3054 return TRUE;
3055}
3056
3057
3058/* This function can figure out the best location for a base register to access
3059 data relative to this base register
3060 INPUT:
3061 sda_d0: size of first DOUBLE WORD data section
3062 sda_w0: size of first WORD data section
3063 sda_h0: size of first HALF WORD data section
3064 sda_b : size of BYTE data section
3065 sda_hi: size of second HALF WORD data section
3066 sda_w1: size of second WORD data section
3067 sda_d1: size of second DOUBLE WORD data section
3068 OUTPUT:
3069 offset (always positive) from the beginning of sda_d0 if OK
3070 a negative error value if fail
3071 NOTE:
3072 these 7 sections have to be located back to back if exist
3073 a pass in 0 value for non-existing section */
3074
3075/* Due to the interpretation of simm15 field of load/store depending on
3076 data accessing size, the organization of base register relative data shall
3077 like the following figure
3078 -------------------------------------------
3079 | DOUBLE WORD sized data (range +/- 128K)
3080 -------------------------------------------
3081 | WORD sized data (range +/- 64K)
3082 -------------------------------------------
3083 | HALF WORD sized data (range +/- 32K)
3084 -------------------------------------------
3085 | BYTE sized data (range +/- 16K)
3086 -------------------------------------------
3087 | HALF WORD sized data (range +/- 32K)
3088 -------------------------------------------
3089 | WORD sized data (range +/- 64K)
3090 -------------------------------------------
3091 | DOUBLE WORD sized data (range +/- 128K)
3092 -------------------------------------------
3093 Its base register shall be set to access these data freely. */
3094
3095/* We have to figure out the SDA_BASE value, so that we can adjust the
3096 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3097 BFD. If we can't find it, we're stuck. We cache it in the ELF
3098 target data. We don't need to adjust the symbol value for an
3099 external symbol if we are producing relocatable output. */
3100
3101static asection *sda_rela_sec = NULL;
3102
1c8f6a4d 3103#define SDA_SECTION_NUM 10
35c08157
KLC		 3104
3105static bfd_reloc_status_type
3106nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3107 bfd_vma *psb, bfd_boolean add_symbol)
3108{
3109 int relax_fp_as_gp;
3110 struct elf_nds32_link_hash_table *table;
3111 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3112 long unsigned int total = 0;
35c08157
KLC		 3113
3114 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3115 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3116 {
3117 asection *first = NULL, *final = NULL, *temp;
3118 bfd_vma sda_base;
3119 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3120 4 byte-aligned. Therefore, it has to set the first section ".data"
3121 4 byte-aligned. */
3122 static const char sec_name[SDA_SECTION_NUM][10] =
3123 {
3124 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3125 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3126 };
3127 size_t i = 0;
3128
3129 if (output_bfd->sections == NULL)
3130 {
3131 *psb = elf_gp (output_bfd);
3132 return bfd_reloc_ok;
3133 }
3134
3135 /* Get the first and final section. */
1c8f6a4d 3136 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3137 {
3138 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3139 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3140 first = temp;
3141 if (temp && (temp->size != 0 || temp->rawsize != 0))
3142 final = temp;
1c8f6a4d
KLC		 3143
3144 /* Summarize the sections in order to check if joining .bss. */
3145 if (temp && temp->size != 0)
3146 total += temp->size;
3147 else if (temp && temp->rawsize != 0)
3148 total += temp->rawsize;
3149
35c08157
KLC		 3150 i++;
3151 }
3152
1c8f6a4d
KLC		 3153 /* Check .bss size. */
3154 temp = bfd_get_section_by_name (output_bfd, ".bss");
3155 if (temp)
3156 {
3157 if (temp->size != 0)
3158 total += temp->size;
3159 else if (temp->rawsize != 0)
3160 total += temp->rawsize;
3161
3162 if (total < 0x80000)
3163 {
3164 if (!first && (temp->size != 0 || temp->rawsize != 0))
3165 first = temp;
3166 if ((temp->size != 0 || temp->rawsize != 0))
3167 final = temp;
3168 }
3169 }
3170
35c08157
KLC		 3171 if (first && final)
3172 {
3173 /* The middle of data region. */
1c8f6a4d 3174 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3175
3176 /* Find the section sda_base located. */
3177 i = 0;
1c8f6a4d 3178 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3179 {
3180 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3181 if (final && (final->size != 0 || final->rawsize != 0)
3182 && sda_base >= final->vma)
3183 {
3184 first = final;
3185 i++;
3186 }
3187 else
3188 break;
3189 }
3190 }
3191 else
3192 {
3193 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3194 first output section. */
3195 first = output_bfd->sections;
3196 while (first && first->size == 0 && first->rawsize == 0)
3197 first = first->next;
3198 if (!first)
3199 {
3200 *psb = elf_gp (output_bfd);
3201 return bfd_reloc_ok;
3202 }
1c8f6a4d 3203 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3204 }
3205
3206 sda_base -= first->vma;
3207 sda_base = sda_base & (~7);
3208
3209 if (!_bfd_generic_link_add_one_symbol
3210 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3211 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3212 get_elf_backend_data (output_bfd)->collect, &h))
3213 return FALSE;
3214
3215 sda_rela_sec = first;
3216
3217 table = nds32_elf_hash_table (info);
3218 relax_fp_as_gp = table->relax_fp_as_gp;
3219 if (relax_fp_as_gp)
3220 {
3221 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3222 FALSE, FALSE, FALSE);
3223 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3224 And set FP equal to SDA_BASE to do relaxation for
3225 la $fp, _FP_BASE_. */
3226 if (!_bfd_generic_link_add_one_symbol
3227 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3228 first, (bfd_vma) sda_base, (const char *) NULL,
3229 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3230 return FALSE;
3231 }
3232 }
3233
535b785f 3234 if (add_symbol)
35c08157
KLC		 3235 {
3236 if (h)
3237 {
3238 /* Now set gp. */
3239 elf_gp (output_bfd) = (h->u.def.value
3240 + h->u.def.section->output_section->vma
3241 + h->u.def.section->output_offset);
3242 }
3243 else
3244 {
38f14ab8 3245 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC		 3246 return bfd_reloc_dangerous;
3247 }
3248 }
3249
3250 *psb = h->u.def.value + h->u.def.section->output_section->vma
3251 + h->u.def.section->output_offset;
3252 return bfd_reloc_ok;
3253}
3254\f
3255
3256/* Return size of a PLT entry. */
3257#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3258
3259
3260/* Create an entry in an nds32 ELF linker hash table. */
3261
3262static struct bfd_hash_entry *
3263nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3264 struct bfd_hash_table *table,
3265 const char *string)
3266{
3267 struct elf_nds32_link_hash_entry *ret;
3268
3269 ret = (struct elf_nds32_link_hash_entry *) entry;
3270
3271 /* Allocate the structure if it has not already been allocated by a
3272 subclass. */
3273 if (ret == NULL)
3274 ret = (struct elf_nds32_link_hash_entry *)
3275 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3276
3277 if (ret == NULL)
3278 return (struct bfd_hash_entry *) ret;
3279
3280 /* Call the allocation method of the superclass. */
3281 ret = (struct elf_nds32_link_hash_entry *)
3282 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3283
3284 if (ret != NULL)
3285 {
3286 struct elf_nds32_link_hash_entry *eh;
3287
3288 eh = (struct elf_nds32_link_hash_entry *) ret;
3289 eh->dyn_relocs = NULL;
1c8f6a4d 3290 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3291 }
3292
3293 return (struct bfd_hash_entry *) ret;
3294}
3295
3296/* Create an nds32 ELF linker hash table. */
3297
3298static struct bfd_link_hash_table *
3299nds32_elf_link_hash_table_create (bfd *abfd)
3300{
3301 struct elf_nds32_link_hash_table *ret;
3302
3303 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3304
3305 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3306 if (ret == NULL)
3307 return NULL;
3308
3309 /* patch tag. */
3310 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3311 nds32_elf_link_hash_newfunc,
3312 sizeof (struct elf_nds32_link_hash_entry),
3313 NDS32_ELF_DATA))
3314 {
3315 free (ret);
3316 return NULL;
3317 }
3318
35c08157
KLC		 3319 return &ret->root.root;
3320}
3321
35c08157
KLC		 3322/* Create dynamic sections when linking against a dynamic object. */
3323
3324static bfd_boolean
3325nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3326{
3327 struct elf_nds32_link_hash_table *htab;
3328 flagword flags, pltflags;
3329 register asection *s;
3330 const struct elf_backend_data *bed;
3331 int ptralign = 2; /* 32-bit */
3332
3333 bed = get_elf_backend_data (abfd);
3334
3335 htab = nds32_elf_hash_table (info);
3336
3337 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3338 .rel[a].bss sections. */
3339
3340 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3341 | SEC_LINKER_CREATED);
3342
3343 pltflags = flags;
3344 pltflags |= SEC_CODE;
3345 if (bed->plt_not_loaded)
3346 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3347 if (bed->plt_readonly)
3348 pltflags |= SEC_READONLY;
3349
3350 s = bfd_make_section (abfd, ".plt");
ce558b89 3351 htab->root.splt = s;
35c08157
KLC		 3352 if (s == NULL
3353 || !bfd_set_section_flags (abfd, s, pltflags)
3354 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3355 return FALSE;
3356
3357 if (bed->want_plt_sym)
3358 {
3359 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3360 .plt section. */
3361 struct bfd_link_hash_entry *bh = NULL;
3362 struct elf_link_hash_entry *h;
3363
3364 if (!(_bfd_generic_link_add_one_symbol
3365 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3366 (bfd_vma) 0, (const char *) NULL, FALSE,
3367 get_elf_backend_data (abfd)->collect, &bh)))
3368 return FALSE;
3369
3370 h = (struct elf_link_hash_entry *) bh;
3371 h->def_regular = 1;
3372 h->type = STT_OBJECT;
3373
0e1862bb 3374 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC		 3375 return FALSE;
3376 }
3377
3378 s = bfd_make_section (abfd,
3379 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
ce558b89 3380 htab->root.srelplt = s;
35c08157
KLC		 3381 if (s == NULL
3382 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3383 || !bfd_set_section_alignment (abfd, s, ptralign))
3384 return FALSE;
3385
ce558b89 3386 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
35c08157
KLC		 3387 return FALSE;
3388
3389 {
3390 const char *secname;
3391 char *relname;
3392 flagword secflags;
3393 asection *sec;
3394
3395 for (sec = abfd->sections; sec; sec = sec->next)
3396 {
3397 secflags = bfd_get_section_flags (abfd, sec);
3398 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3399 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3400 continue;
3401 secname = bfd_get_section_name (abfd, sec);
3402 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3403 strcpy (relname, ".rela");
3404 strcat (relname, secname);
3405 if (bfd_get_section_by_name (abfd, secname))
3406 continue;
3407 s = bfd_make_section (abfd, relname);
3408 if (s == NULL
3409 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3410 || !bfd_set_section_alignment (abfd, s, ptralign))
3411 return FALSE;
3412 }
3413 }
3414
3415 if (bed->want_dynbss)
3416 {
3417 /* The .dynbss section is a place to put symbols which are defined
3418 by dynamic objects, are referenced by regular objects, and are
3419 not functions. We must allocate space for them in the process
3420 image and use a R_*_COPY reloc to tell the dynamic linker to
3421 initialize them at run time. The linker script puts the .dynbss
3422 section into the .bss section of the final image. */
3423 s = bfd_make_section (abfd, ".dynbss");
3424 htab->sdynbss = s;
3425 if (s == NULL
3426 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3427 return FALSE;
3428 /* The .rel[a].bss section holds copy relocs. This section is not
3429 normally needed. We need to create it here, though, so that the
3430 linker will map it to an output section. We can't just create it
3431 only if we need it, because we will not know whether we need it
3432 until we have seen all the input files, and the first time the
3433 main linker code calls BFD after examining all the input files
3434 (size_dynamic_sections) the input sections have already been
3435 mapped to the output sections. If the section turns out not to
3436 be needed, we can discard it later. We will never need this
3437 section when generating a shared object, since they do not use
3438 copy relocs. */
0e1862bb 3439 if (!bfd_link_pic (info))
35c08157
KLC		 3440 {
3441 s = bfd_make_section (abfd, (bed->default_use_rela_p
3442 ? ".rela.bss" : ".rel.bss"));
3443 htab->srelbss = s;
3444 if (s == NULL
3445 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3446 || !bfd_set_section_alignment (abfd, s, ptralign))
3447 return FALSE;
3448 }
3449 }
3450
3451 return TRUE;
3452}
3453
3454/* Copy the extra info we tack onto an elf_link_hash_entry. */
3455static void
3456nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3457 struct elf_link_hash_entry *dir,
3458 struct elf_link_hash_entry *ind)
3459{
3460 struct elf_nds32_link_hash_entry *edir, *eind;
3461
3462 edir = (struct elf_nds32_link_hash_entry *) dir;
3463 eind = (struct elf_nds32_link_hash_entry *) ind;
3464
3465 if (eind->dyn_relocs != NULL)
3466 {
3467 if (edir->dyn_relocs != NULL)
3468 {
3bf083ed
AM		 3469 struct elf_dyn_relocs **pp;
3470 struct elf_dyn_relocs *p;
35c08157
KLC		 3471
3472 if (ind->root.type == bfd_link_hash_indirect)
3473 abort ();
3474
3475 /* Add reloc counts against the weak sym to the strong sym
3476 list. Merge any entries against the same section. */
3477 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3478 {
3bf083ed 3479 struct elf_dyn_relocs *q;
35c08157
KLC		 3480
3481 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3482 if (q->sec == p->sec)
3483 {
3484 q->pc_count += p->pc_count;
3485 q->count += p->count;
3486 *pp = p->next;
3487 break;
3488 }
3489 if (q == NULL)
3490 pp = &p->next;
3491 }
3492 *pp = edir->dyn_relocs;
3493 }
3494
3495 edir->dyn_relocs = eind->dyn_relocs;
3496 eind->dyn_relocs = NULL;
3497 }
3498
3499 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3500}
3501\f
63c1f59d
AM		 3502/* Find dynamic relocs for H that apply to read-only sections. */
3503
3504static asection *
3505readonly_dynrelocs (struct elf_link_hash_entry *h)
3506{
3bf083ed 3507 struct elf_dyn_relocs *p;
63c1f59d
AM		 3508
3509 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3510 {
3511 asection *s = p->sec->output_section;
3512
3513 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3514 return p->sec;
3515 }
3516 return NULL;
3517}
35c08157
KLC		 3518
3519/* Adjust a symbol defined by a dynamic object and referenced by a
3520 regular object. The current definition is in some section of the
3521 dynamic object, but we're not including those sections. We have to
3522 change the definition to something the rest of the link can
3523 understand. */
3524
3525static bfd_boolean
3526nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3527 struct elf_link_hash_entry *h)
3528{
3529 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3530 bfd *dynobj;
3531 asection *s;
3532 unsigned int power_of_two;
3533
3534 dynobj = elf_hash_table (info)->dynobj;
3535
3536 /* Make sure we know what is going on here. */
3537 BFD_ASSERT (dynobj != NULL
3538 && (h->needs_plt
60d67dc8 3539 || h->is_weakalias
35c08157
KLC		 3540 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3541
3542
3543 /* If this is a function, put it in the procedure linkage table. We
3544 will fill in the contents of the procedure linkage table later,
3545 when we know the address of the .got section. */
3546 if (h->type == STT_FUNC || h->needs_plt)
3547 {
0e1862bb 3548 if (!bfd_link_pic (info)
35c08157
KLC		 3549 && !h->def_dynamic
3550 && !h->ref_dynamic
3551 && h->root.type != bfd_link_hash_undefweak
3552 && h->root.type != bfd_link_hash_undefined)
3553 {
3554 /* This case can occur if we saw a PLT reloc in an input
3555 file, but the symbol was never referred to by a dynamic
3556 object. In such a case, we don't actually need to build
3557 a procedure linkage table, and we can just do a PCREL
3558 reloc instead. */
3559 h->plt.offset = (bfd_vma) - 1;
3560 h->needs_plt = 0;
3561 }
3562
3563 return TRUE;
3564 }
3565 else
3566 h->plt.offset = (bfd_vma) - 1;
3567
3568 /* If this is a weak symbol, and there is a real definition, the
3569 processor independent code will have arranged for us to see the
3570 real definition first, and we can just use the same value. */
60d67dc8 3571 if (h->is_weakalias)
35c08157 3572 {
60d67dc8
AM		 3573 struct elf_link_hash_entry *def = weakdef (h);
3574 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3575 h->root.u.def.section = def->root.u.def.section;
3576 h->root.u.def.value = def->root.u.def.value;
35c08157
KLC		 3577 return TRUE;
3578 }
3579
3580 /* This is a reference to a symbol defined by a dynamic object which
3581 is not a function. */
3582
3583 /* If we are creating a shared library, we must presume that the
3584 only references to the symbol are via the global offset table.
3585 For such cases we need not do anything here; the relocations will
3586 be handled correctly by relocate_section. */
0e1862bb 3587 if (bfd_link_pic (info))
35c08157
KLC		 3588 return TRUE;
3589
3590 /* If there are no references to this symbol that do not use the
3591 GOT, we don't need to generate a copy reloc. */
3592 if (!h->non_got_ref)
3593 return TRUE;
3594
3595 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 3596 if (0 && info->nocopyreloc)
35c08157
KLC		 3597 {
3598 h->non_got_ref = 0;
3599 return TRUE;
3600 }
3601
3bf083ed
AM		 3602 /* If we don't find any dynamic relocs in read-only sections, then
3603 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3604 if (0 && !readonly_dynrelocs (h))
35c08157
KLC		 3605 {
3606 h->non_got_ref = 0;
3607 return TRUE;
3608 }
3609
3610 /* We must allocate the symbol in our .dynbss section, which will
3611 become part of the .bss section of the executable. There will be
3612 an entry for this symbol in the .dynsym section. The dynamic
3613 object will contain position independent code, so all references
3614 from the dynamic object to this symbol will go through the global
3615 offset table. The dynamic linker will use the .dynsym entry to
3616 determine the address it must put in the global offset table, so
3617 both the dynamic object and the regular object will refer to the
3618 same memory location for the variable. */
3619
3620 htab = nds32_elf_hash_table (info);
3621 s = htab->sdynbss;
3622 BFD_ASSERT (s != NULL);
3623
3624 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3625 to copy the initial value out of the dynamic object and into the
3626 runtime process image. We need to remember the offset into the
3627 .rela.bss section we are going to use. */
3628 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3629 {
3630 asection *srel;
3631
3632 srel = htab->srelbss;
3633 BFD_ASSERT (srel != NULL);
3634 srel->size += sizeof (Elf32_External_Rela);
3635 h->needs_copy = 1;
3636 }
3637
3638 /* We need to figure out the alignment required for this symbol. I
3639 have no idea how ELF linkers handle this. */
3640 power_of_two = bfd_log2 (h->size);
3641 if (power_of_two > 3)
3642 power_of_two = 3;
3643
3644 /* Apply the required alignment. */
3645 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3646 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3647 {
3648 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3649 return FALSE;
3650 }
3651
3652 /* Define the symbol as being at this point in the section. */
3653 h->root.u.def.section = s;
3654 h->root.u.def.value = s->size;
3655
3656 /* Increment the section size to make room for the symbol. */
3657 s->size += h->size;
3658
3659 return TRUE;
3660}
3661
3662/* Allocate space in .plt, .got and associated reloc sections for
3663 dynamic relocs. */
3664
3665static bfd_boolean
3666allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3667{
3668 struct bfd_link_info *info;
3669 struct elf_nds32_link_hash_table *htab;
3670 struct elf_nds32_link_hash_entry *eh;
3bf083ed 3671 struct elf_dyn_relocs *p;
35c08157
KLC		 3672
3673 if (h->root.type == bfd_link_hash_indirect)
3674 return TRUE;
3675
3676 if (h->root.type == bfd_link_hash_warning)
3677 /* When warning symbols are created, they **replace** the "real"
3678 entry in the hash table, thus we never get to see the real
3679 symbol in a hash traversal. So look at it now. */
3680 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3681
3682 info = (struct bfd_link_info *) inf;
3683 htab = nds32_elf_hash_table (info);
3684
3685 eh = (struct elf_nds32_link_hash_entry *) h;
3686
3687 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3688 {
3689 /* Make sure this symbol is output as a dynamic symbol.
3690 Undefined weak syms won't yet be marked as dynamic. */
3691 if (h->dynindx == -1 && !h->forced_local)
3692 {
3693 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3694 return FALSE;
3695 }
3696
0e1862bb 3697 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 3698 {
ce558b89 3699 asection *s = htab->root.splt;
35c08157
KLC		 3700
3701 /* If this is the first .plt entry, make room for the special
3702 first entry. */
3703 if (s->size == 0)
3704 s->size += PLT_ENTRY_SIZE;
3705
3706 h->plt.offset = s->size;
3707
3708 /* If this symbol is not defined in a regular file, and we are
3709 not generating a shared library, then set the symbol to this
3710 location in the .plt. This is required to make function
3711 pointers compare as equal between the normal executable and
3712 the shared library. */
0e1862bb 3713 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 3714 {
3715 h->root.u.def.section = s;
3716 h->root.u.def.value = h->plt.offset;
3717 }
3718
3719 /* Make room for this entry. */
3720 s->size += PLT_ENTRY_SIZE;
3721
3722 /* We also need to make an entry in the .got.plt section, which
3723 will be placed in the .got section by the linker script. */
ce558b89 3724 htab->root.sgotplt->size += 4;
35c08157
KLC		 3725
3726 /* We also need to make an entry in the .rel.plt section. */
ce558b89 3727 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3728 }
3729 else
3730 {
3731 h->plt.offset = (bfd_vma) - 1;
3732 h->needs_plt = 0;
3733 }
3734 }
3735 else
3736 {
3737 h->plt.offset = (bfd_vma) - 1;
3738 h->needs_plt = 0;
3739 }
3740
3741 if (h->got.refcount > 0)
3742 {
3743 asection *s;
3744 bfd_boolean dyn;
1c8f6a4d 3745 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3746
3747 /* Make sure this symbol is output as a dynamic symbol.
3748 Undefined weak syms won't yet be marked as dynamic. */
3749 if (h->dynindx == -1 && !h->forced_local)
3750 {
3751 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3752 return FALSE;
3753 }
3754
ce558b89 3755 s = htab->root.sgot;
35c08157 3756 h->got.offset = s->size;
1c8f6a4d
KLC		 3757
3758 if (tls_type == GOT_UNKNOWN)
3759 abort ();
3760 else if (tls_type == GOT_NORMAL
3761 || tls_type == GOT_TLS_IE)
3762 /* Need a GOT slot. */
3763 s->size += 4;
3764
35c08157 3765 dyn = htab->root.dynamic_sections_created;
0e1862bb 3766 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
ce558b89 3767 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3768 }
3769 else
3770 h->got.offset = (bfd_vma) - 1;
3771
3772 if (eh->dyn_relocs == NULL)
3773 return TRUE;
3774
3775 /* In the shared -Bsymbolic case, discard space allocated for
3776 dynamic pc-relative relocs against symbols which turn out to be
3777 defined in regular objects. For the normal shared case, discard
3778 space for pc-relative relocs that have become local due to symbol
3779 visibility changes. */
3780
0e1862bb 3781 if (bfd_link_pic (info))
35c08157
KLC		 3782 {
3783 if (h->def_regular && (h->forced_local || info->symbolic))
3784 {
3bf083ed 3785 struct elf_dyn_relocs **pp;
35c08157
KLC		 3786
3787 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3788 {
3789 p->count -= p->pc_count;
3790 p->pc_count = 0;
3791 if (p->count == 0)
3792 *pp = p->next;
3793 else
3794 pp = &p->next;
3795 }
3796 }
3797 }
3798 else
3799 {
3800 /* For the non-shared case, discard space for relocs against
3801 symbols which turn out to need copy relocs or are not dynamic. */
3802
3803 if (!h->non_got_ref
3804 && ((h->def_dynamic
3805 && !h->def_regular)
3806 || (htab->root.dynamic_sections_created
3807 && (h->root.type == bfd_link_hash_undefweak
3808 || h->root.type == bfd_link_hash_undefined))))
3809 {
3810 /* Make sure this symbol is output as a dynamic symbol.
3811 Undefined weak syms won't yet be marked as dynamic. */
3812 if (h->dynindx == -1 && !h->forced_local)
3813 {
3814 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3815 return FALSE;
3816 }
3817
3818 /* If that succeeded, we know we'll be keeping all the
3819 relocs. */
3820 if (h->dynindx != -1)
3821 goto keep;
3822 }
3823
3824 eh->dyn_relocs = NULL;
3825
3826 keep:;
3827 }
3828
3829 /* Finally, allocate space. */
3830 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3831 {
3832 asection *sreloc = elf_section_data (p->sec)->sreloc;
3833 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3834 }
3835
3836 return TRUE;
3837}
3838
63c1f59d
AM		 3839/* Set DF_TEXTREL if we find any dynamic relocs that apply to
3840 read-only sections. */
35c08157
KLC		 3841
3842static bfd_boolean
63c1f59d 3843maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
35c08157 3844{
63c1f59d 3845 asection *sec;
35c08157 3846
63c1f59d
AM		 3847 if (h->root.type == bfd_link_hash_indirect)
3848 return TRUE;
35c08157 3849
63c1f59d
AM		 3850 sec = readonly_dynrelocs (h);
3851 if (sec != NULL)
35c08157 3852 {
63c1f59d 3853 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
35c08157 3854
63c1f59d
AM		 3855 info->flags |= DF_TEXTREL;
3856 info->callbacks->minfo
c1c8c1ef 3857 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
63c1f59d 3858 sec->owner, h->root.root.string, sec);
35c08157 3859
63c1f59d
AM		 3860 /* Not an error, just cut short the traversal. */
3861 return FALSE;
35c08157
KLC		 3862 }
3863 return TRUE;
3864}
3865
3866/* Set the sizes of the dynamic sections. */
3867
3868static bfd_boolean
3869nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3870 struct bfd_link_info *info)
3871{
3872 struct elf_nds32_link_hash_table *htab;
3873 bfd *dynobj;
3874 asection *s;
3875 bfd_boolean relocs;
3876 bfd *ibfd;
3877
3878 htab = nds32_elf_hash_table (info);
3879 dynobj = htab->root.dynobj;
3880 BFD_ASSERT (dynobj != NULL);
3881
3882 if (htab->root.dynamic_sections_created)
3883 {
3884 /* Set the contents of the .interp section to the interpreter. */
f5233a16 3885 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 3886 {
3887 s = bfd_get_section_by_name (dynobj, ".interp");
3888 BFD_ASSERT (s != NULL);
3889 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3890 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3891 }
3892 }
3893
3894 /* Set up .got offsets for local syms, and space for local dynamic
3895 relocs. */
c72f2fb2 3896 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3897 {
3898 bfd_signed_vma *local_got;
3899 bfd_signed_vma *end_local_got;
3900 bfd_size_type locsymcount;
3901 Elf_Internal_Shdr *symtab_hdr;
3902 asection *srel;
3903
3904 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3905 continue;
3906
3907 for (s = ibfd->sections; s != NULL; s = s->next)
3908 {
3bf083ed 3909 struct elf_dyn_relocs *p;
35c08157 3910
3bf083ed 3911 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 3912 elf_section_data (s)->local_dynrel);
3913 p != NULL; p = p->next)
3914 {
3915 if (!bfd_is_abs_section (p->sec)
3916 && bfd_is_abs_section (p->sec->output_section))
3917 {
3918 /* Input section has been discarded, either because
3919 it is a copy of a linkonce section or due to
3920 linker script /DISCARD/, so we'll be discarding
3921 the relocs too. */
3922 }
3923 else if (p->count != 0)
3924 {
3925 srel = elf_section_data (p->sec)->sreloc;
3926 srel->size += p->count * sizeof (Elf32_External_Rela);
3927 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3928 info->flags |= DF_TEXTREL;
3929 }
3930 }
3931 }
3932
3933 local_got = elf_local_got_refcounts (ibfd);
3934 if (!local_got)
3935 continue;
3936
3937 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3938 locsymcount = symtab_hdr->sh_info;
3939 end_local_got = local_got + locsymcount;
ce558b89
AM		 3940 s = htab->root.sgot;
3941 srel = htab->root.srelgot;
35c08157
KLC		 3942 for (; local_got < end_local_got; ++local_got)
3943 {
3944 if (*local_got > 0)
3945 {
3946 *local_got = s->size;
3947 s->size += 4;
0e1862bb 3948 if (bfd_link_pic (info))
35c08157
KLC		 3949 srel->size += sizeof (Elf32_External_Rela);
3950 }
3951 else
3952 *local_got = (bfd_vma) - 1;
3953 }
3954 }
3955
3956 /* Allocate global sym .plt and .got entries, and space for global
3957 sym dynamic relocs. */
3958 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3959
3960 /* We now have determined the sizes of the various dynamic sections.
3961 Allocate memory for them. */
3962 relocs = FALSE;
3963 for (s = dynobj->sections; s != NULL; s = s->next)
3964 {
3965 if ((s->flags & SEC_LINKER_CREATED) == 0)
3966 continue;
3967
ce558b89 3968 if (s == htab->root.splt)
35c08157
KLC		 3969 {
3970 /* Strip this section if we don't need it; see the
3971 comment below. */
3972 }
ce558b89 3973 else if (s == htab->root.sgot)
35c08157
KLC		 3974 {
3975 got_size += s->size;
3976 }
ce558b89 3977 else if (s == htab->root.sgotplt)
35c08157
KLC		 3978 {
3979 got_size += s->size;
3980 }
3981 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3982 {
ce558b89 3983 if (s->size != 0 && s != htab->root.srelplt)
35c08157
KLC		 3984 relocs = TRUE;
3985
3986 /* We use the reloc_count field as a counter if we need
3987 to copy relocs into the output file. */
3988 s->reloc_count = 0;
3989 }
3990 else
3991 {
3992 /* It's not one of our sections, so don't allocate space. */
3993 continue;
3994 }
3995
3996 if (s->size == 0)
3997 {
3998 /* If we don't need this section, strip it from the
3999 output file. This is mostly to handle .rela.bss and
4000 .rela.plt. We must create both sections in
4001 create_dynamic_sections, because they must be created
4002 before the linker maps input sections to output
4003 sections. The linker does that before
4004 adjust_dynamic_symbol is called, and it is that
4005 function which decides whether anything needs to go
4006 into these sections. */
4007 s->flags |= SEC_EXCLUDE;
4008 continue;
4009 }
4010
4011 /* Allocate memory for the section contents. We use bfd_zalloc
4012 here in case unused entries are not reclaimed before the
4013 section's contents are written out. This should not happen,
4014 but this way if it does, we get a R_NDS32_NONE reloc instead
4015 of garbage. */
4016 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4017 if (s->contents == NULL)
4018 return FALSE;
4019 }
4020
4021
4022 if (htab->root.dynamic_sections_created)
4023 {
4024 /* Add some entries to the .dynamic section. We fill in the
4025 values later, in nds32_elf_finish_dynamic_sections, but we
4026 must add the entries now so that we get the correct size for
4027 the .dynamic section. The DT_DEBUG entry is filled in by the
4028 dynamic linker and used by the debugger. */
4029#define add_dynamic_entry(TAG, VAL) \
4030 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4031
0e1862bb 4032 if (!bfd_link_pic (info))
35c08157
KLC		 4033 {
4034 if (!add_dynamic_entry (DT_DEBUG, 0))
4035 return FALSE;
4036 }
4037
ce558b89 4038 if (htab->root.splt->size != 0)
35c08157
KLC		 4039 {
4040 if (!add_dynamic_entry (DT_PLTGOT, 0)
4041 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4042 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4043 || !add_dynamic_entry (DT_JMPREL, 0))
4044 return FALSE;
4045 }
4046
4047 if (relocs)
4048 {
4049 if (!add_dynamic_entry (DT_RELA, 0)
4050 || !add_dynamic_entry (DT_RELASZ, 0)
4051 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4052 return FALSE;
4053
4054 /* If any dynamic relocs apply to a read-only section,
4055 then we need a DT_TEXTREL entry. */
4056 if ((info->flags & DF_TEXTREL) == 0)
63c1f59d 4057 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
35c08157
KLC		 4058 (void *) info);
4059
4060 if ((info->flags & DF_TEXTREL) != 0)
4061 {
4062 if (!add_dynamic_entry (DT_TEXTREL, 0))
4063 return FALSE;
4064 }
4065 }
4066 }
4067#undef add_dynamic_entry
4068
4069 return TRUE;
4070}
4071
4072static bfd_reloc_status_type
4073nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4074 bfd_vma relocation, bfd_byte *location)
4075{
4076 int size;
4077 bfd_vma x = 0;
4078 bfd_reloc_status_type flag;
4079 unsigned int rightshift = howto->rightshift;
4080 unsigned int bitpos = howto->bitpos;
4081
4082 /* If the size is negative, negate RELOCATION. This isn't very
4083 general. */
4084 if (howto->size < 0)
4085 relocation = -relocation;
4086
4087 /* Get the value we are going to relocate. */
4088 size = bfd_get_reloc_size (howto);
4089 switch (size)
4090 {
4091 default:
35c08157
KLC		 4092 abort ();
4093 break;
6346d5ca
AM		 4094 case 0:
4095 return bfd_reloc_ok;
35c08157
KLC		 4096 case 2:
4097 x = bfd_getb16 (location);
4098 break;
4099 case 4:
4100 x = bfd_getb32 (location);
4101 break;
4102 }
4103
4104 /* Check for overflow. FIXME: We may drop bits during the addition
4105 which we don't check for. We must either check at every single
4106 operation, which would be tedious, or we must do the computations
4107 in a type larger than bfd_vma, which would be inefficient. */
4108 flag = bfd_reloc_ok;
4109 if (howto->complain_on_overflow != complain_overflow_dont)
4110 {
4111 bfd_vma addrmask, fieldmask, signmask, ss;
4112 bfd_vma a, b, sum;
4113
4114 /* Get the values to be added together. For signed and unsigned
4115 relocations, we assume that all values should be truncated to
4116 the size of an address. For bitfields, all the bits matter.
4117 See also bfd_check_overflow. */
4118 fieldmask = N_ONES (howto->bitsize);
4119 signmask = ~fieldmask;
4120 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4121 a = (relocation & addrmask) >> rightshift;
4122 b = (x & howto->src_mask & addrmask) >> bitpos;
4123
4124 switch (howto->complain_on_overflow)
4125 {
4126 case complain_overflow_signed:
4127 /* If any sign bits are set, all sign bits must be set.
4128 That is, A must be a valid negative address after
4129 shifting. */
4130 signmask = ~(fieldmask >> 1);
4131 /* Fall through. */
4132
4133 case complain_overflow_bitfield:
4134 /* Much like the signed check, but for a field one bit
4135 wider. We allow a bitfield to represent numbers in the
4136 range -2**n to 2**n-1, where n is the number of bits in the
4137 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4138 can't overflow, which is exactly what we want. */
4139 ss = a & signmask;
4140 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4141 flag = bfd_reloc_overflow;
4142
4143 /* We only need this next bit of code if the sign bit of B
4144 is below the sign bit of A. This would only happen if
4145 SRC_MASK had fewer bits than BITSIZE. Note that if
4146 SRC_MASK has more bits than BITSIZE, we can get into
4147 trouble; we would need to verify that B is in range, as
4148 we do for A above. */
4149 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4150 ss >>= bitpos;
4151
4152 /* Set all the bits above the sign bit. */
4153 b = (b ^ ss) - ss;
4154
4155 /* Now we can do the addition. */
4156 sum = a + b;
4157
4158 /* See if the result has the correct sign. Bits above the
4159 sign bit are junk now; ignore them. If the sum is
4160 positive, make sure we did not have all negative inputs;
4161 if the sum is negative, make sure we did not have all
4162 positive inputs. The test below looks only at the sign
4163 bits, and it really just
4164 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4165
4166 We mask with addrmask here to explicitly allow an address
4167 wrap-around. The Linux kernel relies on it, and it is
4168 the only way to write assembler code which can run when
4169 loaded at a location 0x80000000 away from the location at
4170 which it is linked. */
4171 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4172 flag = bfd_reloc_overflow;
4173
4174 break;
4175
4176 case complain_overflow_unsigned:
4177 /* Checking for an unsigned overflow is relatively easy:
4178 trim the addresses and add, and trim the result as well.
4179 Overflow is normally indicated when the result does not
4180 fit in the field. However, we also need to consider the
4181 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4182 input is 0x80000000, and bfd_vma is only 32 bits; then we
4183 will get sum == 0, but there is an overflow, since the
4184 inputs did not fit in the field. Instead of doing a
4185 separate test, we can check for this by or-ing in the
4186 operands when testing for the sum overflowing its final
4187 field. */
4188 sum = (a + b) & addrmask;
4189 if ((a | b | sum) & signmask)
4190 flag = bfd_reloc_overflow;
4191 break;
4192
4193 default:
4194 abort ();
4195 }
4196 }
4197
4198 /* Put RELOCATION in the right bits. */
4199 relocation >>= (bfd_vma) rightshift;
4200 relocation <<= (bfd_vma) bitpos;
4201
4202 /* Add RELOCATION to the right bits of X. */
4203 /* FIXME : 090616
4204 Because the relaxation may generate duplicate relocation at one address,
4205 an addition to immediate in the instruction may cause the relocation added
4206 several times.
4207 This bug should be fixed in assembler, but a check is also needed here. */
4208 if (howto->partial_inplace)
4209 x = ((x & ~howto->dst_mask)
4210 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4211 else
4212 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4213
4214
4215 /* Put the relocated value back in the object file. */
4216 switch (size)
4217 {
4218 default:
4219 case 0:
4220 case 1:
4221 case 8:
4222 abort ();
4223 break;
4224 case 2:
4225 bfd_putb16 (x, location);
4226 break;
4227 case 4:
4228 bfd_putb32 (x, location);
4229 break;
4230 }
4231
4232 return flag;
4233}
4234
4235static bfd_reloc_status_type
4236nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4237 asection *input_section, bfd_byte *contents,
4238 bfd_vma address, bfd_vma value, bfd_vma addend)
4239{
4240 bfd_vma relocation;
4241
4242 /* Sanity check the address. */
4243 if (address > bfd_get_section_limit (input_bfd, input_section))
4244 return bfd_reloc_outofrange;
4245
4246 /* This function assumes that we are dealing with a basic relocation
4247 against a symbol. We want to compute the value of the symbol to
4248 relocate to. This is just VALUE, the value of the symbol, plus
4249 ADDEND, any addend associated with the reloc. */
4250 relocation = value + addend;
4251
4252 /* If the relocation is PC relative, we want to set RELOCATION to
4253 the distance between the symbol (currently in RELOCATION) and the
4254 location we are relocating. Some targets (e.g., i386-aout)
4255 arrange for the contents of the section to be the negative of the
4256 offset of the location within the section; for such targets
4257 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4258 simply leave the contents of the section as zero; for such
4259 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4260 need to subtract out the offset of the location within the
4261 section (which is just ADDRESS). */
4262 if (howto->pc_relative)
4263 {
4264 relocation -= (input_section->output_section->vma
4265 + input_section->output_offset);
4266 if (howto->pcrel_offset)
4267 relocation -= address;
4268 }
4269
4270 return nds32_relocate_contents (howto, input_bfd, relocation,
4271 contents + address);
4272}
4273
4274static bfd_boolean
4275nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4276 const char *name,
4277 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4278 asection *input_sec,
4279 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4280{
4281 const char *source;
4282 FILE *sym_ld_script = NULL;
4283 struct elf_nds32_link_hash_table *table;
4284
4285 table = nds32_elf_hash_table (info);
4286 sym_ld_script = table->sym_ld_script;
4287 if (!sym_ld_script)
4288 return TRUE;
4289
4290 if (!h || !name || *name == '\0')
4291 return TRUE;
4292
4293 if (input_sec->flags & SEC_EXCLUDE)
4294 return TRUE;
4295
4296 if (!check_start_export_sym)
4297 {
4298 fprintf (sym_ld_script, "SECTIONS\n{\n");
4299 check_start_export_sym = 1;
4300 }
4301
4302 if (h->root.type == bfd_link_hash_defined
4303 || h->root.type == bfd_link_hash_defweak)
4304 {
4305 if (!h->root.u.def.section->output_section)
4306 return TRUE;
4307
4308 if (bfd_is_const_section (input_sec))
4309 source = input_sec->name;
4310 else
4311 source = input_sec->owner->filename;
4312
4313 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4314 h->root.root.string,
4315 (long) (h->root.u.def.value
4316 + h->root.u.def.section->output_section->vma
4317 + h->root.u.def.section->output_offset), source);
4318 }
4319
4320 return TRUE;
4321}
4322
4323/* Relocate an NDS32/D ELF section.
4324 There is some attempt to make this function usable for many architectures,
4325 both for RELA and REL type relocs, if only to serve as a learning tool.
4326
4327 The RELOCATE_SECTION function is called by the new ELF backend linker
4328 to handle the relocations for a section.
4329
4330 The relocs are always passed as Rela structures; if the section
4331 actually uses Rel structures, the r_addend field will always be
4332 zero.
4333
4334 This function is responsible for adjust the section contents as
4335 necessary, and (if using Rela relocs and generating a
4336 relocatable output file) adjusting the reloc addend as
4337 necessary.
4338
4339 This function does not have to worry about setting the reloc
4340 address or the reloc symbol index.
4341
4342 LOCAL_SYMS is a pointer to the swapped in local symbols.
4343
4344 LOCAL_SECTIONS is an array giving the section in the input file
4345 corresponding to the st_shndx field of each local symbol.
4346
4347 The global hash table entry for the global symbols can be found
4348 via elf_sym_hashes (input_bfd).
4349
4350 When generating relocatable output, this function must handle
4351 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4352 going to be the section symbol corresponding to the output
4353 section, which means that the addend must be adjusted
4354 accordingly. */
4355
1c8f6a4d
KLC		 4356static bfd_vma
4357dtpoff_base (struct bfd_link_info *info)
4358{
4359 /* If tls_sec is NULL, we should have signalled an error already. */
4360 if (elf_hash_table (info)->tls_sec == NULL)
4361 return 0;
4362 return elf_hash_table (info)->tls_sec->vma;
4363}
4364
35c08157 4365static bfd_boolean
07d6d2b8 4366nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
35c08157 4367 struct bfd_link_info * info,
07d6d2b8
AM		 4368 bfd * input_bfd,
4369 asection * input_section,
4370 bfd_byte * contents,
4371 Elf_Internal_Rela * relocs,
4372 Elf_Internal_Sym * local_syms,
4373 asection ** local_sections)
35c08157
KLC		 4374{
4375 Elf_Internal_Shdr *symtab_hdr;
4376 struct elf_link_hash_entry **sym_hashes;
4377 Elf_Internal_Rela *rel, *relend;
4378 bfd_boolean ret = TRUE; /* Assume success. */
4379 int align = 0;
4380 bfd_reloc_status_type r;
4381 const char *errmsg = NULL;
4382 bfd_vma gp;
4383 struct elf_nds32_link_hash_table *htab;
4384 bfd *dynobj;
4385 bfd_vma *local_got_offsets;
4386 asection *sgot, *splt, *sreloc;
4387 bfd_vma high_address;
4388 struct elf_nds32_link_hash_table *table;
4389 int eliminate_gc_relocs;
4390 bfd_vma fpbase_addr;
4391
4392 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4393 sym_hashes = elf_sym_hashes (input_bfd);
4394 htab = nds32_elf_hash_table (info);
4395 high_address = bfd_get_section_limit (input_bfd, input_section);
4396
4397 dynobj = htab->root.dynobj;
4398 local_got_offsets = elf_local_got_offsets (input_bfd);
4399
ce558b89
AM		 4400 sgot = htab->root.sgot;
4401 splt = htab->root.splt;
35c08157
KLC		 4402 sreloc = NULL;
4403
4404 rel = relocs;
4405 relend = relocs + input_section->reloc_count;
4406
4407 table = nds32_elf_hash_table (info);
4408 eliminate_gc_relocs = table->eliminate_gc_relocs;
4409 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4410 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4411 {
4412 is_SDA_BASE_set = 1;
4413 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4414 if (r != bfd_reloc_ok)
4415 return FALSE;
4416 }
4417
0c4bd9d9
KLC		 4418 if (is_ITB_BASE_set == 0)
4419 {
4420 /* Set the _ITB_BASE_. */
4421 if (!nds32_elf_ex9_itb_base (info))
4422 {
38f14ab8
AM		 4423 _bfd_error_handler (_("%pB: error: cannot set %s"),
4424 output_bfd, "_ITB_BASE_");
0c4bd9d9
KLC		 4425 bfd_set_error (bfd_error_bad_value);
4426 }
4427 }
4428
1c8f6a4d
KLC		 4429 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4430 if (!nds32_elf_ifc_reloc ())
38f14ab8 4431 _bfd_error_handler (_("error: IFC relocation error"));
1c8f6a4d
KLC		 4432
4433 /* Relocation for .ex9.itable. */
4434 if (table->target_optimize & NDS32_RELAX_EX9_ON
4435 || (table->ex9_import_file && table->update_ex9_table))
4436 nds32_elf_ex9_reloc_jmp (info);
4437
35c08157
KLC		 4438 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4439 the fp value is set as gp, and it has be reverted for instruction
4440 setting fp. */
4441 fpbase_addr = elf_gp (output_bfd);
4442
4443 for (rel = relocs; rel < relend; rel++)
4444 {
4445 enum elf_nds32_reloc_type r_type;
4446 reloc_howto_type *howto = NULL;
4447 unsigned long r_symndx;
4448 struct elf_link_hash_entry *h = NULL;
4449 Elf_Internal_Sym *sym = NULL;
4450 asection *sec;
4451 bfd_vma relocation;
4452
4453 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4454 ensure it's zero (we use REL relocs, not RELA). Therefore this
4455 should be assigning zero to `addend', but for clarity we use
4456 `r_addend'. */
4457
4458 bfd_vma addend = rel->r_addend;
4459 bfd_vma offset = rel->r_offset;
4460
4461 r_type = ELF32_R_TYPE (rel->r_info);
4462 if (r_type >= R_NDS32_max)
4463 {
695344c0 4464 /* xgettext:c-format */
0aa13fee 4465 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 4466 input_bfd, r_type);
35c08157
KLC		 4467 bfd_set_error (bfd_error_bad_value);
4468 ret = FALSE;
4469 continue;
4470 }
4471
4472 if (r_type == R_NDS32_GNU_VTENTRY
4473 || r_type == R_NDS32_GNU_VTINHERIT
4474 || r_type == R_NDS32_NONE
4475 || r_type == R_NDS32_RELA_GNU_VTENTRY
4476 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4477 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4478 || r_type == R_NDS32_DATA
1c8f6a4d 4479 || r_type == R_NDS32_TRAN
0c4bd9d9 4480 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4481 continue;
4482
0c4bd9d9
KLC		 4483 /* If we enter the fp-as-gp region. Resolve the address
4484 of best fp-base. */
35c08157
KLC		 4485 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4486 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4487 {
4488 int dist;
4489
4490 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4491 dist = rel->r_addend >> 16;
4492 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4493 local_syms, symtab_hdr);
4494 }
4495 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4496 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4497 {
4498 fpbase_addr = elf_gp (output_bfd);
4499 }
4500
4501 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4502 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4503 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC		 4504 continue;
4505
4506 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4507 r_symndx = ELF32_R_SYM (rel->r_info);
4508
4509 /* This is a final link. */
4510 sym = NULL;
4511 sec = NULL;
4512 h = NULL;
4513
4514 if (r_symndx < symtab_hdr->sh_info)
4515 {
4516 /* Local symbol. */
4517 sym = local_syms + r_symndx;
4518 sec = local_sections[r_symndx];
4519
4520 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4521 addend = rel->r_addend;
4522 }
4523 else
4524 {
4525 /* External symbol. */
4526 bfd_boolean warned, ignored, unresolved_reloc;
4527 int symndx = r_symndx - symtab_hdr->sh_info;
4528
4529 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4530 r_symndx, symtab_hdr, sym_hashes, h, sec,
4531 relocation, unresolved_reloc, warned,
4532 ignored);
4533
4534 /* la $fp, _FP_BASE_ is per-function (region).
4535 Handle it specially. */
4536 switch ((int) r_type)
4537 {
4538 case R_NDS32_SDA19S0_RELA:
4539 case R_NDS32_SDA15S0_RELA:
4540 case R_NDS32_20_RELA:
4541 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4542 FP_BASE_NAME) == 0)
4543 {
4544 relocation = fpbase_addr;
4545 break;
4546 }
4547 }
4548
4549 }
4550
0e1862bb 4551 if (bfd_link_relocatable (info))
35c08157
KLC		 4552 {
4553 /* This is a relocatable link. We don't have to change
4554 anything, unless the reloc is against a section symbol,
4555 in which case we have to adjust according to where the
4556 section symbol winds up in the output section. */
4557 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4558 rel->r_addend += sec->output_offset + sym->st_value;
4559
4560 continue;
4561 }
4562
4563 /* Sanity check the address. */
4564 if (offset > high_address)
4565 {
4566 r = bfd_reloc_outofrange;
4567 goto check_reloc;
4568 }
4569
4570 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4571 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4572 || r_type >= R_NDS32_RELAX_ENTRY)
4573 continue;
4574
4575 switch ((int) r_type)
4576 {
4577 case R_NDS32_GOTOFF:
4578 /* Relocation is relative to the start of the global offset
4579 table (for ld24 rx, #uimm24), e.g. access at label+addend
4580
4581 ld24 rx. #label@GOTOFF + addend
4582 sub rx, r12. */
4583 case R_NDS32_GOTOFF_HI20:
4584 case R_NDS32_GOTOFF_LO12:
4585 case R_NDS32_GOTOFF_LO15:
4586 case R_NDS32_GOTOFF_LO19:
4587 BFD_ASSERT (sgot != NULL);
4588
4589 relocation -= elf_gp (output_bfd);
4590 break;
4591
4592 case R_NDS32_9_PLTREL:
4593 case R_NDS32_25_PLTREL:
4594 /* Relocation is to the entry for this symbol in the
4595 procedure linkage table. */
4596
4597 /* The native assembler will generate a 25_PLTREL reloc
4598 for a local symbol if you assemble a call from one
4599 section to another when using -K pic. */
4600 if (h == NULL)
4601 break;
4602
4603 if (h->forced_local)
4604 break;
4605
4606 /* We didn't make a PLT entry for this symbol. This
4607 happens when statically linking PIC code, or when
4608 using -Bsymbolic. */
4609 if (h->plt.offset == (bfd_vma) - 1)
4610 break;
4611
4612 relocation = (splt->output_section->vma
4613 + splt->output_offset + h->plt.offset);
4614 break;
4615
4616 case R_NDS32_PLT_GOTREL_HI20:
4617 case R_NDS32_PLT_GOTREL_LO12:
4618 case R_NDS32_PLT_GOTREL_LO15:
4619 case R_NDS32_PLT_GOTREL_LO19:
4620 case R_NDS32_PLT_GOTREL_LO20:
4621 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4622 {
4623 /* We didn't make a PLT entry for this symbol. This
4624 happens when statically linking PIC code, or when
4625 using -Bsymbolic. */
4626 relocation -= elf_gp (output_bfd);
4627 break;
4628 }
4629
4630 relocation = (splt->output_section->vma
4631 + splt->output_offset + h->plt.offset);
4632
4633 relocation -= elf_gp (output_bfd);
4634 break;
4635
4636 case R_NDS32_PLTREL_HI20:
4637 case R_NDS32_PLTREL_LO12:
4638
4639 /* Relocation is to the entry for this symbol in the
4640 procedure linkage table. */
4641
4642 /* The native assembler will generate a 25_PLTREL reloc
4643 for a local symbol if you assemble a call from one
4644 section to another when using -K pic. */
4645 if (h == NULL)
4646 break;
4647
4648 if (h->forced_local)
4649 break;
4650
4651 if (h->plt.offset == (bfd_vma) - 1)
4652 /* We didn't make a PLT entry for this symbol. This
4653 happens when statically linking PIC code, or when
4654 using -Bsymbolic. */
4655 break;
4656
4657 if (splt == NULL)
4658 break;
4659
4660 relocation = (splt->output_section->vma
4661 + splt->output_offset
4662 + h->plt.offset + 4)
4663 - (input_section->output_section->vma
4664 + input_section->output_offset
4665 + rel->r_offset);
4666
4667 break;
4668
4669 case R_NDS32_GOTPC20:
4670 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4671 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4672 relocation = elf_gp (output_bfd);
4673 break;
4674
4675 case R_NDS32_GOTPC_HI20:
4676 case R_NDS32_GOTPC_LO12:
4677 {
4678 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4679 bl .+4
4680 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4681 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4682 or
4683 bl .+4
4684 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4685 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4686 */
4687 relocation = elf_gp (output_bfd);
4688 relocation -= (input_section->output_section->vma
4689 + input_section->output_offset + rel->r_offset);
4690 break;
4691 }
4692
4693 case R_NDS32_GOT20:
4694 /* Fall through. */
4695 case R_NDS32_GOT_HI20:
4696 case R_NDS32_GOT_LO12:
4697 case R_NDS32_GOT_LO15:
4698 case R_NDS32_GOT_LO19:
4699 /* Relocation is to the entry for this symbol in the global
4700 offset table. */
4701 BFD_ASSERT (sgot != NULL);
4702
4703 if (h != NULL)
4704 {
4705 bfd_boolean dyn;
4706 bfd_vma off;
4707
4708 off = h->got.offset;
4709 BFD_ASSERT (off != (bfd_vma) - 1);
4710 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 4711 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4712 bfd_link_pic (info),
4713 h)
4714 || (bfd_link_pic (info)
35c08157
KLC		 4715 && (info->symbolic
4716 || h->dynindx == -1
4717 || h->forced_local) && h->def_regular))
4718 {
4719 /* This is actually a static link, or it is a
4720 -Bsymbolic link and the symbol is defined
4721 locally, or the symbol was forced to be local
4722 because of a version file. We must initialize
4723 this entry in the global offset table. Since the
4724 offset must always be a multiple of 4, we use the
4725 least significant bit to record whether we have
4726 initialized it already.
4727
4728 When doing a dynamic link, we create a .rela.got
4729 relocation entry to initialize the value. This
4730 is done in the finish_dynamic_symbol routine. */
4731 if ((off & 1) != 0)
4732 off &= ~1;
4733 else
4734 {
4735 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4736 h->got.offset |= 1;
4737 }
4738 }
4739 relocation = sgot->output_section->vma + sgot->output_offset + off
4740 - elf_gp (output_bfd);
4741 }
4742 else
4743 {
4744 bfd_vma off;
4745 bfd_byte *loc;
4746
4747 BFD_ASSERT (local_got_offsets != NULL
4748 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4749
4750 off = local_got_offsets[r_symndx];
4751
4752 /* The offset must always be a multiple of 4. We use
4753 the least significant bit to record whether we have
4754 already processed this entry. */
4755 if ((off & 1) != 0)
4756 off &= ~1;
4757 else
4758 {
4759 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4760
0e1862bb 4761 if (bfd_link_pic (info))
35c08157
KLC		 4762 {
4763 asection *srelgot;
4764 Elf_Internal_Rela outrel;
4765
4766 /* We need to generate a R_NDS32_RELATIVE reloc
4767 for the dynamic linker. */
ce558b89 4768 srelgot = htab->root.srelgot;
35c08157
KLC		 4769 BFD_ASSERT (srelgot != NULL);
4770
4771 outrel.r_offset = (elf_gp (output_bfd)
4772 + sgot->output_offset + off);
4773 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4774 outrel.r_addend = relocation;
4775 loc = srelgot->contents;
4776 loc +=
4777 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4778 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4779 ++srelgot->reloc_count;
4780 }
4781 local_got_offsets[r_symndx] |= 1;
4782 }
4783 relocation = sgot->output_section->vma + sgot->output_offset + off
4784 - elf_gp (output_bfd);
4785 }
4786
4787 break;
4788
4789 case R_NDS32_16_RELA:
4790 case R_NDS32_20_RELA:
4791 case R_NDS32_5_RELA:
4792 case R_NDS32_32_RELA:
4793 case R_NDS32_9_PCREL_RELA:
4794 case R_NDS32_WORD_9_PCREL_RELA:
4795 case R_NDS32_10_UPCREL_RELA:
4796 case R_NDS32_15_PCREL_RELA:
4797 case R_NDS32_17_PCREL_RELA:
4798 case R_NDS32_25_PCREL_RELA:
4799 case R_NDS32_HI20_RELA:
4800 case R_NDS32_LO12S3_RELA:
4801 case R_NDS32_LO12S2_RELA:
4802 case R_NDS32_LO12S2_DP_RELA:
4803 case R_NDS32_LO12S2_SP_RELA:
4804 case R_NDS32_LO12S1_RELA:
4805 case R_NDS32_LO12S0_RELA:
4806 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4807 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 4808 && (input_section->flags & SEC_ALLOC) != 0
4809 && (eliminate_gc_relocs == 0
4810 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4811 && ((r_type != R_NDS32_9_PCREL_RELA
4812 && r_type != R_NDS32_WORD_9_PCREL_RELA
4813 && r_type != R_NDS32_10_UPCREL_RELA
4814 && r_type != R_NDS32_15_PCREL_RELA
4815 && r_type != R_NDS32_17_PCREL_RELA
4816 && r_type != R_NDS32_25_PCREL_RELA
4817 && !(r_type == R_NDS32_32_RELA
4818 && strcmp (input_section->name, ".eh_frame") == 0))
4819 || (h != NULL && h->dynindx != -1
4820 && (!info->symbolic || !h->def_regular))))
4821 {
4822 Elf_Internal_Rela outrel;
4823 bfd_boolean skip, relocate;
4824 bfd_byte *loc;
4825
4826 /* When generating a shared object, these relocations
4827 are copied into the output file to be resolved at run
4828 time. */
4829
4830 if (sreloc == NULL)
4831 {
4832 const char *name;
4833
4834 name = bfd_elf_string_from_elf_section
4835 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4836 elf_section_data (input_section)->rela.hdr->sh_name);
4837 if (name == NULL)
4838 return FALSE;
4839
4840 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4841 && strcmp (bfd_get_section_name (input_bfd,
4842 input_section),
4843 name + 5) == 0);
4844
4845 sreloc = bfd_get_section_by_name (dynobj, name);
4846 BFD_ASSERT (sreloc != NULL);
4847 }
4848
4849 skip = FALSE;
4850 relocate = FALSE;
4851
4852 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4853 info,
4854 input_section,
4855 rel->r_offset);
4856 if (outrel.r_offset == (bfd_vma) - 1)
4857 skip = TRUE;
4858 else if (outrel.r_offset == (bfd_vma) - 2)
4859 skip = TRUE, relocate = TRUE;
4860 outrel.r_offset += (input_section->output_section->vma
4861 + input_section->output_offset);
4862
4863 if (skip)
4864 memset (&outrel, 0, sizeof outrel);
4865 else if (r_type == R_NDS32_17_PCREL_RELA
4866 || r_type == R_NDS32_15_PCREL_RELA
4867 || r_type == R_NDS32_25_PCREL_RELA)
4868 {
4869 BFD_ASSERT (h != NULL && h->dynindx != -1);
4870 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4871 outrel.r_addend = rel->r_addend;
4872 }
4873 else
4874 {
4875 /* h->dynindx may be -1 if this symbol was marked to
4876 become local. */
4877 if (h == NULL
4878 || ((info->symbolic || h->dynindx == -1)
4879 && h->def_regular))
4880 {
4881 relocate = TRUE;
4882 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4883 outrel.r_addend = relocation + rel->r_addend;
4884 }
4885 else
4886 {
4887 BFD_ASSERT (h->dynindx != -1);
4888 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4889 outrel.r_addend = rel->r_addend;
4890 }
4891 }
4892
4893 loc = sreloc->contents;
4894 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4895 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4896 ++sreloc->reloc_count;
4897
4898 /* If this reloc is against an external symbol, we do
4899 not want to fiddle with the addend. Otherwise, we
4900 need to include the symbol value so that it becomes
4901 an addend for the dynamic reloc. */
4902 if (!relocate)
4903 continue;
4904 }
4905 break;
4906
4907 case R_NDS32_25_ABS_RELA:
0e1862bb 4908 if (bfd_link_pic (info))
35c08157 4909 {
4eca0228 4910 _bfd_error_handler
38f14ab8
AM		 4911 (_("%pB: warning: %s unsupported in shared mode"),
4912 input_bfd, "R_NDS32_25_ABS_RELA");
35c08157
KLC		 4913 return FALSE;
4914 }
4915 break;
4916
4917 case R_NDS32_9_PCREL:
4918 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4919 contents, offset,
4920 sec, relocation, addend);
4921 goto check_reloc;
4922
4923 case R_NDS32_HI20:
4924 {
4925 Elf_Internal_Rela *lorel;
4926
4927 /* We allow an arbitrary number of HI20 relocs before the
4928 LO12 reloc. This permits gcc to emit the HI and LO relocs
4929 itself. */
4930 for (lorel = rel + 1;
4931 (lorel < relend
4932 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4933 continue;
4934 if (lorel < relend
4935 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4936 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4937 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4938 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4939 {
4940 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4941 contents, relocation + addend);
4942 r = bfd_reloc_ok;
4943 }
4944 else
4945 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 4946 contents, offset, relocation,
4947 addend);
35c08157
KLC		 4948 }
4949
4950 goto check_reloc;
4951
4952 case R_NDS32_GOT17S2_RELA:
4953 case R_NDS32_GOT15S2_RELA:
4954 {
4955 bfd_vma off;
4956
4957 BFD_ASSERT (sgot != NULL);
4958
4959 if (h != NULL)
4960 {
4961 bfd_boolean dyn;
4962
4963 off = h->got.offset;
4964 BFD_ASSERT (off != (bfd_vma) - 1);
4965
4966 dyn = htab->root.dynamic_sections_created;
4967 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L		 4968 (dyn, bfd_link_pic (info), h)
4969 || (bfd_link_pic (info)
4970 && (info->symbolic
4971 || h->dynindx == -1
4972 || h->forced_local)
4973 && h->def_regular))
35c08157
KLC		 4974 {
4975 /* This is actually a static link, or it is a
4976 -Bsymbolic link and the symbol is defined
4977 locally, or the symbol was forced to be local
4978 because of a version file. We must initialize
4979 this entry in the global offset table. Since the
4980 offset must always be a multiple of 4, we use the
4981 least significant bit to record whether we have
4982 initialized it already.
4983
4984 When doing a dynamic link, we create a .rela.got
4985 relocation entry to initialize the value. This
4986 is done in the finish_dynamic_symbol routine. */
4987 if ((off & 1) != 0)
4988 off &= ~1;
4989 else
4990 {
4991 bfd_put_32 (output_bfd, relocation,
4992 sgot->contents + off);
4993 h->got.offset |= 1;
4994 }
4995 }
4996 }
4997 else
4998 {
4999 bfd_byte *loc;
5000
5001 BFD_ASSERT (local_got_offsets != NULL
5002 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5003
5004 off = local_got_offsets[r_symndx];
5005
5006 /* The offset must always be a multiple of 4. We use
5007 the least significant bit to record whether we have
5008 already processed this entry. */
5009 if ((off & 1) != 0)
5010 off &= ~1;
5011 else
5012 {
5013 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5014
0e1862bb 5015 if (bfd_link_pic (info))
35c08157
KLC		 5016 {
5017 asection *srelgot;
5018 Elf_Internal_Rela outrel;
5019
5020 /* We need to generate a R_NDS32_RELATIVE reloc
5021 for the dynamic linker. */
ce558b89 5022 srelgot = htab->root.srelgot;
35c08157
KLC		 5023 BFD_ASSERT (srelgot != NULL);
5024
5025 outrel.r_offset = (elf_gp (output_bfd)
5026 + sgot->output_offset + off);
5027 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5028 outrel.r_addend = relocation;
5029 loc = srelgot->contents;
5030 loc +=
5031 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5032 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5033 ++srelgot->reloc_count;
5034 }
5035 local_got_offsets[r_symndx] |= 1;
5036 }
5037 }
5038 relocation = sgot->output_section->vma + sgot->output_offset + off
5039 - elf_gp (output_bfd);
5040 }
5041 if (relocation & align)
5042 {
5043 /* Incorrect alignment. */
4eca0228 5044 _bfd_error_handler
38f14ab8 5045 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
35c08157
KLC		 5046 ret = FALSE;
5047 r = bfd_reloc_dangerous;
5048 goto check_reloc;
5049 }
5050 break;
5051
5052 case R_NDS32_SDA16S3_RELA:
5053 case R_NDS32_SDA15S3_RELA:
5054 case R_NDS32_SDA15S3:
5055 align = 0x7;
5056 goto handle_sda;
5057
5058 case R_NDS32_SDA17S2_RELA:
5059 case R_NDS32_SDA15S2_RELA:
5060 case R_NDS32_SDA12S2_SP_RELA:
5061 case R_NDS32_SDA12S2_DP_RELA:
5062 case R_NDS32_SDA15S2:
5063 case R_NDS32_SDA_FP7U2_RELA:
5064 align = 0x3;
5065 goto handle_sda;
5066
5067 case R_NDS32_SDA18S1_RELA:
5068 case R_NDS32_SDA15S1_RELA:
5069 case R_NDS32_SDA15S1:
5070 align = 0x1;
5071 goto handle_sda;
5072
5073 case R_NDS32_SDA19S0_RELA:
5074 case R_NDS32_SDA15S0_RELA:
5075 case R_NDS32_SDA15S0:
5076 {
5077 align = 0x0;
5078handle_sda:
5079 BFD_ASSERT (sec != NULL);
5080
5081 /* If the symbol is in the abs section, the out_bfd will be null.
5082 This happens when the relocation has a symbol@GOTOFF. */
5083 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5084 if (r != bfd_reloc_ok)
5085 {
4eca0228 5086 _bfd_error_handler
38f14ab8 5087 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
35c08157
KLC		 5088 ret = FALSE;
5089 goto check_reloc;
5090 }
5091
5092 /* At this point `relocation' contains the object's
5093 address. */
5094 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5095 {
5096 relocation -= fpbase_addr;
5097 }
5098 else
5099 relocation -= gp;
5100 /* Now it contains the offset from _SDA_BASE_. */
5101
5102 /* Make sure alignment is correct. */
5103
5104 if (relocation & align)
5105 {
5106 /* Incorrect alignment. */
4eca0228 5107 _bfd_error_handler
695344c0 5108 /* xgettext:c-format */
38f14ab8
AM		 5109 (_("%pB(%pA): warning: unaligned small data access"
5110 " of type %d"),
35c08157
KLC		 5111 input_bfd, input_section, r_type);
5112 ret = FALSE;
5113 goto check_reloc;
5114 }
5115 }
5116
5117 break;
5118 case R_NDS32_17IFC_PCREL_RELA:
5119 case R_NDS32_10IFCU_PCREL_RELA:
5120 /* do nothing */
5121 break;
5122
1c8f6a4d
KLC		 5123 case R_NDS32_TLS_LE_HI20:
5124 case R_NDS32_TLS_LE_LO12:
5125 case R_NDS32_TLS_LE_20:
5126 case R_NDS32_TLS_LE_15S0:
5127 case R_NDS32_TLS_LE_15S1:
5128 case R_NDS32_TLS_LE_15S2:
5129 if (elf_hash_table (info)->tls_sec != NULL)
5130 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5131 break;
5132 case R_NDS32_TLS_IE_HI20:
5133 case R_NDS32_TLS_IE_LO12S2:
5134 {
5135 /* Relocation is to the entry for this symbol in the global
5136 offset table. */
5137 unsigned int tls_type;
5138 asection *srelgot;
5139 Elf_Internal_Rela outrel;
5140 bfd_vma off;
5141 bfd_byte *loc;
5142 int indx = 0;
5143
5144 BFD_ASSERT (sgot != NULL);
5145 if (h != NULL)
5146 {
5147 bfd_boolean dyn;
5148
5149 off = h->got.offset;
5150 BFD_ASSERT (off != (bfd_vma) - 1);
5151 dyn = htab->root.dynamic_sections_created;
5152 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5153 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5154 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5155 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5156 indx = h->dynindx;
5157 }
5158 else
5159 {
5160 /* Never happen currently. */
5161 BFD_ASSERT (local_got_offsets != NULL
5162 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5163
5164 off = local_got_offsets[r_symndx];
5165
5166 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5167 }
5168 relocation = sgot->output_section->vma + sgot->output_offset + off;
5169
5170 if (r_type == R_NDS32_TLS_IE_LO12S2)
5171 break;
5172
5173 /* The offset must always be a multiple of 4. We use
5174 the least significant bit to record whether we have
5175 already processed this entry. */
5176 if ((off & 1) != 0)
5177 off &= ~1;
5178 else
5179 {
5180 bfd_boolean need_relocs = FALSE;
ce558b89 5181 srelgot = htab->root.srelgot;
0e1862bb 5182 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC		 5183 && (h == NULL
5184 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5185 || h->root.type != bfd_link_hash_undefweak))
5186 {
5187 need_relocs = TRUE;
5188 BFD_ASSERT (srelgot != NULL);
5189 }
5190 if (tls_type & GOT_TLS_IE)
5191 {
5192 if (need_relocs)
5193 {
5194 if (h->dynindx == 0)
5195 outrel.r_addend = relocation - dtpoff_base (info);
5196 else
5197 outrel.r_addend = 0;
5198 outrel.r_offset = (sgot->output_section->vma
5199 + sgot->output_offset
5200 + off);
5201 outrel.r_info =
5202 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5203
5204 loc = srelgot->contents;
5205 loc +=
5206 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5207 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5208 ++srelgot->reloc_count;
5209 }
5210 else
5211 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5212 sgot->contents + off);
5213 }
5214 }
5215 }
5216 break;
5217
35c08157
KLC		 5218 /* DON'T fall through. */
5219
5220 default:
5221 /* OLD_NDS32_RELOC. */
5222
5223 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5224 contents, offset, relocation, addend);
5225 goto check_reloc;
5226 }
5227
5228 switch ((int) r_type)
5229 {
5230 case R_NDS32_20_RELA:
5231 case R_NDS32_5_RELA:
5232 case R_NDS32_9_PCREL_RELA:
5233 case R_NDS32_WORD_9_PCREL_RELA:
5234 case R_NDS32_10_UPCREL_RELA:
5235 case R_NDS32_15_PCREL_RELA:
5236 case R_NDS32_17_PCREL_RELA:
5237 case R_NDS32_25_PCREL_RELA:
5238 case R_NDS32_25_ABS_RELA:
5239 case R_NDS32_HI20_RELA:
5240 case R_NDS32_LO12S3_RELA:
5241 case R_NDS32_LO12S2_RELA:
5242 case R_NDS32_LO12S2_DP_RELA:
5243 case R_NDS32_LO12S2_SP_RELA:
5244 case R_NDS32_LO12S1_RELA:
5245 case R_NDS32_LO12S0_RELA:
5246 case R_NDS32_LO12S0_ORI_RELA:
5247 case R_NDS32_SDA16S3_RELA:
5248 case R_NDS32_SDA17S2_RELA:
5249 case R_NDS32_SDA18S1_RELA:
5250 case R_NDS32_SDA19S0_RELA:
5251 case R_NDS32_SDA15S3_RELA:
5252 case R_NDS32_SDA15S2_RELA:
5253 case R_NDS32_SDA12S2_DP_RELA:
5254 case R_NDS32_SDA12S2_SP_RELA:
5255 case R_NDS32_SDA15S1_RELA:
5256 case R_NDS32_SDA15S0_RELA:
5257 case R_NDS32_SDA_FP7U2_RELA:
5258 case R_NDS32_9_PLTREL:
5259 case R_NDS32_25_PLTREL:
5260 case R_NDS32_GOT20:
5261 case R_NDS32_GOT_HI20:
5262 case R_NDS32_GOT_LO12:
5263 case R_NDS32_GOT_LO15:
5264 case R_NDS32_GOT_LO19:
5265 case R_NDS32_GOT15S2_RELA:
5266 case R_NDS32_GOT17S2_RELA:
5267 case R_NDS32_GOTPC20:
5268 case R_NDS32_GOTPC_HI20:
5269 case R_NDS32_GOTPC_LO12:
5270 case R_NDS32_GOTOFF:
5271 case R_NDS32_GOTOFF_HI20:
5272 case R_NDS32_GOTOFF_LO12:
5273 case R_NDS32_GOTOFF_LO15:
5274 case R_NDS32_GOTOFF_LO19:
5275 case R_NDS32_PLTREL_HI20:
5276 case R_NDS32_PLTREL_LO12:
5277 case R_NDS32_PLT_GOTREL_HI20:
5278 case R_NDS32_PLT_GOTREL_LO12:
5279 case R_NDS32_PLT_GOTREL_LO15:
5280 case R_NDS32_PLT_GOTREL_LO19:
5281 case R_NDS32_PLT_GOTREL_LO20:
5282 case R_NDS32_17IFC_PCREL_RELA:
5283 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5284 case R_NDS32_TLS_LE_HI20:
5285 case R_NDS32_TLS_LE_LO12:
5286 case R_NDS32_TLS_IE_HI20:
5287 case R_NDS32_TLS_IE_LO12S2:
5288 case R_NDS32_TLS_LE_20:
5289 case R_NDS32_TLS_LE_15S0:
5290 case R_NDS32_TLS_LE_15S1:
5291 case R_NDS32_TLS_LE_15S2:
35c08157 5292 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5293 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5294 r = nds32_elf_final_link_relocate (howto, input_bfd,
5295 input_section, contents,
5296 rel->r_offset, relocation,
5297 rel->r_addend);
5298 break;
5299
5300 default:
5301 /* All other relocs can use default handler. */
5302 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5303 contents, rel->r_offset,
5304 relocation, rel->r_addend);
5305 break;
5306 }
5307
5308check_reloc:
5309
5310 if (r != bfd_reloc_ok)
5311 {
5312 /* FIXME: This should be generic enough to go in a utility. */
5313 const char *name;
5314
5315 if (h != NULL)
5316 name = h->root.root.string;
5317 else
5318 {
5319 name = bfd_elf_string_from_elf_section
5320 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5321 if (name == NULL || *name == '\0')
5322 name = bfd_section_name (input_bfd, sec);
5323 }
5324
5325 if (errmsg != NULL)
5326 goto common_error;
5327
5328 switch (r)
5329 {
5330 case bfd_reloc_overflow:
1a72702b
AM		 5331 (*info->callbacks->reloc_overflow)
5332 (info, (h ? &h->root : NULL), name, howto->name,
5333 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 5334 break;
5335
5336 case bfd_reloc_undefined:
1a72702b
AM		 5337 (*info->callbacks->undefined_symbol)
5338 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC		 5339 break;
5340
5341 case bfd_reloc_outofrange:
5342 errmsg = _("internal error: out of range error");
5343 goto common_error;
5344
5345 case bfd_reloc_notsupported:
5346 errmsg = _("internal error: unsupported relocation error");
5347 goto common_error;
5348
5349 case bfd_reloc_dangerous:
5350 errmsg = _("internal error: dangerous error");
5351 goto common_error;
5352
5353 default:
5354 errmsg = _("internal error: unknown error");
5355 /* Fall through. */
5356
1a72702b
AM		 5357 common_error:
5358 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5359 input_section, offset);
35c08157
KLC		 5360 break;
5361 }
5362 }
5363 }
5364
5365 return ret;
5366}
5367
5368/* Finish up dynamic symbol handling. We set the contents of various
5369 dynamic sections here. */
5370
5371static bfd_boolean
5372nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5373 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5374{
5375 struct elf_nds32_link_hash_table *htab;
5376 bfd_byte *loc;
5377
5378 htab = nds32_elf_hash_table (info);
5379
5380 if (h->plt.offset != (bfd_vma) - 1)
5381 {
5382 asection *splt;
5383 asection *sgot;
5384 asection *srela;
5385
5386 bfd_vma plt_index;
5387 bfd_vma got_offset;
5388 bfd_vma local_plt_offset;
5389 Elf_Internal_Rela rela;
5390
5391 /* This symbol has an entry in the procedure linkage table. Set
5392 it up. */
5393
5394 BFD_ASSERT (h->dynindx != -1);
5395
ce558b89
AM		 5396 splt = htab->root.splt;
5397 sgot = htab->root.sgotplt;
5398 srela = htab->root.srelplt;
35c08157
KLC		 5399 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5400
5401 /* Get the index in the procedure linkage table which
5402 corresponds to this symbol. This is the index of this symbol
5403 in all the symbols for which we are making plt entries. The
5404 first entry in the procedure linkage table is reserved. */
5405 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5406
5407 /* Get the offset into the .got table of the entry that
5408 corresponds to this function. Each .got entry is 4 bytes.
5409 The first three are reserved. */
5410 got_offset = (plt_index + 3) * 4;
5411
5412 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5413 if (!bfd_link_pic (info))
35c08157
KLC		 5414 {
5415 unsigned long insn;
5416
5417 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5418 + sgot->output_offset + got_offset) >> 12)
5419 & 0xfffff);
5420 bfd_putb32 (insn, splt->contents + h->plt.offset);
5421
5422 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5423 + sgot->output_offset + got_offset) & 0x0fff)
5424 >> 2);
5425 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5426
5427 insn = PLT_ENTRY_WORD2;
5428 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5429
5430 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5431 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5432
5433 insn = PLT_ENTRY_WORD4
5434 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5435 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5436 local_plt_offset = 12;
5437 }
5438 else
5439 {
5440 /* sda_base must be set at this time. */
5441 unsigned long insn;
5442 long offset;
5443
5444 /* FIXME, sda_base is 65536, it will damage opcode. */
5445 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5446 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5447 - elf_gp (output_bfd);
5448 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5449 bfd_putb32 (insn, splt->contents + h->plt.offset);
5450
5451 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5452 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5453
5454 insn = PLT_PIC_ENTRY_WORD2;
5455 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5456
5457 insn = PLT_PIC_ENTRY_WORD3;
5458 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5459
5460 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5461 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5462
5463 insn = PLT_PIC_ENTRY_WORD5
5464 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5465 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5466
5467 local_plt_offset = 16;
5468 }
5469
5470 /* Fill in the entry in the global offset table,
5471 so it will fall through to the next instruction for the first time. */
5472 bfd_put_32 (output_bfd,
5473 (splt->output_section->vma + splt->output_offset
5474 + h->plt.offset + local_plt_offset),
5475 sgot->contents + got_offset);
5476
5477 /* Fill in the entry in the .rela.plt section. */
5478 rela.r_offset = (sgot->output_section->vma
5479 + sgot->output_offset + got_offset);
5480 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5481 rela.r_addend = 0;
5482 loc = srela->contents;
5483 loc += plt_index * sizeof (Elf32_External_Rela);
5484 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5485
5486 if (!h->def_regular)
5487 {
5488 /* Mark the symbol as undefined, rather than as defined in
5489 the .plt section. Leave the value alone. */
5490 sym->st_shndx = SHN_UNDEF;
5491 if (!h->ref_regular_nonweak)
5492 sym->st_value = 0;
5493 }
5494 }
5495
5496 if (h->got.offset != (bfd_vma) - 1)
5497 {
5498 asection *sgot;
5499 asection *srela;
5500 Elf_Internal_Rela rela;
5501
5502 /* This symbol has an entry in the global offset table.
5503 Set it up. */
5504
ce558b89
AM		 5505 sgot = htab->root.sgot;
5506 srela = htab->root.srelgot;
35c08157
KLC		 5507 BFD_ASSERT (sgot != NULL && srela != NULL);
5508
5509 rela.r_offset = (sgot->output_section->vma
5510 + sgot->output_offset + (h->got.offset & ~1));
5511
5512 /* If this is a -Bsymbolic link, and the symbol is defined
5513 locally, we just want to emit a RELATIVE reloc. Likewise if
5514 the symbol was forced to be local because of a version file.
5515 The entry in the global offset table will already have been
5516 initialized in the relocate_section function. */
0e1862bb 5517 if (bfd_link_pic (info)
35c08157
KLC		 5518 && (info->symbolic
5519 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5520 {
5521 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5522 rela.r_addend = (h->root.u.def.value
5523 + h->root.u.def.section->output_section->vma
5524 + h->root.u.def.section->output_offset);
5525 }
5526 else
5527 {
5528 BFD_ASSERT ((h->got.offset & 1) == 0);
5529 bfd_put_32 (output_bfd, (bfd_vma) 0,
5530 sgot->contents + h->got.offset);
5531 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5532 rela.r_addend = 0;
5533 }
5534
5535 loc = srela->contents;
5536 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5537 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5538 ++srela->reloc_count;
5539 }
5540
5541 if (h->needs_copy)
5542 {
5543 asection *s;
5544 Elf_Internal_Rela rela;
5545
5546 /* This symbols needs a copy reloc. Set it up. */
5547
5548 BFD_ASSERT (h->dynindx != -1
5549 && (h->root.type == bfd_link_hash_defined
5550 || h->root.type == bfd_link_hash_defweak));
5551
5552 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5553 BFD_ASSERT (s != NULL);
5554
5555 rela.r_offset = (h->root.u.def.value
5556 + h->root.u.def.section->output_section->vma
5557 + h->root.u.def.section->output_offset);
5558 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5559 rela.r_addend = 0;
5560 loc = s->contents;
5561 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5562 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5563 ++s->reloc_count;
5564 }
5565
5566 /* Mark some specially defined symbols as absolute. */
5567 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5568 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5569 sym->st_shndx = SHN_ABS;
5570
5571 return TRUE;
5572}
5573
5574
5575/* Finish up the dynamic sections. */
5576
5577static bfd_boolean
5578nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5579{
5580 struct elf_nds32_link_hash_table *htab;
5581 bfd *dynobj;
5582 asection *sdyn;
5583 asection *sgot;
5584
5585 htab = nds32_elf_hash_table (info);
5586 dynobj = htab->root.dynobj;
5587
ce558b89 5588 sgot = htab->root.sgotplt;
35c08157
KLC		 5589 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5590
5591 if (htab->root.dynamic_sections_created)
5592 {
5593 asection *splt;
5594 Elf32_External_Dyn *dyncon, *dynconend;
5595
5596 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5597
5598 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5599 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5600
5601 for (; dyncon < dynconend; dyncon++)
5602 {
5603 Elf_Internal_Dyn dyn;
5604 asection *s;
5605
5606 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5607
5608 switch (dyn.d_tag)
5609 {
5610 default:
5611 break;
5612
5613 case DT_PLTGOT:
ce558b89 5614 s = htab->root.sgotplt;
35c08157
KLC		 5615 goto get_vma;
5616 case DT_JMPREL:
ce558b89 5617 s = htab->root.srelplt;
35c08157 5618 get_vma:
4ade44b7 5619 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 5620 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5621 break;
5622
5623 case DT_PLTRELSZ:
ce558b89 5624 s = htab->root.srelplt;
35c08157
KLC		 5625 dyn.d_un.d_val = s->size;
5626 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5627 break;
35c08157
KLC		 5628 }
5629 }
5630
5631 /* Fill in the first entry in the procedure linkage table. */
ce558b89 5632 splt = htab->root.splt;
35c08157
KLC		 5633 if (splt && splt->size > 0)
5634 {
0e1862bb 5635 if (bfd_link_pic (info))
35c08157
KLC		 5636 {
5637 unsigned long insn;
5638 long offset;
5639
5640 /* FIXME, sda_base is 65536, it will damage opcode. */
5641 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5642 offset = sgot->output_section->vma + sgot->output_offset + 4
5643 - elf_gp (output_bfd);
5644 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5645 bfd_putb32 (insn, splt->contents);
5646
5647 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5648 /* here has a typo? */
5649 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5650 bfd_putb32 (insn, splt->contents + 4);
5651
5652 insn = PLT0_PIC_ENTRY_WORD2;
5653 bfd_putb32 (insn, splt->contents + 8);
5654
5655 insn = PLT0_PIC_ENTRY_WORD3;
5656 bfd_putb32 (insn, splt->contents + 12);
5657
5658 insn = PLT0_PIC_ENTRY_WORD4;
5659 bfd_putb32 (insn, splt->contents + 16);
5660
5661 insn = PLT0_PIC_ENTRY_WORD5;
5662 bfd_putb32 (insn, splt->contents + 20);
5663 }
5664 else
5665 {
5666 unsigned long insn;
5667 unsigned long addr;
5668
5669 /* addr = .got + 4 */
5670 addr = sgot->output_section->vma + sgot->output_offset + 4;
5671 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5672 bfd_putb32 (insn, splt->contents);
5673
5674 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5675 bfd_putb32 (insn, splt->contents + 4);
5676
5677 insn = PLT0_ENTRY_WORD2;
5678 bfd_putb32 (insn, splt->contents + 8);
5679
5680 insn = PLT0_ENTRY_WORD3;
5681 bfd_putb32 (insn, splt->contents + 12);
5682
5683 insn = PLT0_ENTRY_WORD4;
5684 bfd_putb32 (insn, splt->contents + 16);
5685 }
5686
5687 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5688 PLT_ENTRY_SIZE;
5689 }
5690 }
5691
5692 /* Fill in the first three entries in the global offset table. */
5693 if (sgot && sgot->size > 0)
5694 {
5695 if (sdyn == NULL)
5696 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5697 else
5698 bfd_put_32 (output_bfd,
5699 sdyn->output_section->vma + sdyn->output_offset,
5700 sgot->contents);
5701 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5702 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5703
5704 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5705 }
5706
5707 return TRUE;
5708}
5709\f
5710
5711/* Set the right machine number. */
5712
5713static bfd_boolean
5714nds32_elf_object_p (bfd *abfd)
5715{
5716 static unsigned int cur_arch = 0;
5717
5718 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5719 {
5720 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5721 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5722 }
5723
5724 switch (cur_arch)
5725 {
5726 default:
5727 case E_N1_ARCH:
5728 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5729 break;
5730 case E_N1H_ARCH:
5731 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5732 break;
5733 case E_NDS_ARCH_STAR_V2_0:
5734 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5735 break;
5736 case E_NDS_ARCH_STAR_V3_0:
5737 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5738 break;
5739 case E_NDS_ARCH_STAR_V3_M:
5740 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5741 break;
5742 }
5743
5744 return TRUE;
5745}
5746
5747/* Store the machine number in the flags field. */
5748
5749static void
5750nds32_elf_final_write_processing (bfd *abfd,
5751 bfd_boolean linker ATTRIBUTE_UNUSED)
5752{
5753 unsigned long val;
5754 static unsigned int cur_mach = 0;
5755
5756 if (bfd_mach_n1 != bfd_get_mach (abfd))
5757 {
5758 cur_mach = bfd_get_mach (abfd);
5759 }
5760
5761 switch (cur_mach)
5762 {
5763 case bfd_mach_n1:
5764 /* Only happen when object is empty, since the case is abandon. */
5765 val = E_N1_ARCH;
5766 val |= E_NDS_ABI_AABI;
5767 val |= E_NDS32_ELF_VER_1_4;
5768 break;
5769 case bfd_mach_n1h:
5770 val = E_N1H_ARCH;
5771 break;
5772 case bfd_mach_n1h_v2:
5773 val = E_NDS_ARCH_STAR_V2_0;
5774 break;
5775 case bfd_mach_n1h_v3:
5776 val = E_NDS_ARCH_STAR_V3_0;
5777 break;
5778 case bfd_mach_n1h_v3m:
5779 val = E_NDS_ARCH_STAR_V3_M;
5780 break;
5781 default:
5782 val = 0;
5783 break;
5784 }
5785
5786 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5787 elf_elfheader (abfd)->e_flags |= val;
5788}
5789
5790/* Function to keep NDS32 specific file flags. */
5791
5792static bfd_boolean
5793nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5794{
5795 BFD_ASSERT (!elf_flags_init (abfd)
5796 || elf_elfheader (abfd)->e_flags == flags);
5797
5798 elf_elfheader (abfd)->e_flags = flags;
5799 elf_flags_init (abfd) = TRUE;
5800 return TRUE;
5801}
5802
5803static unsigned int
5804convert_e_flags (unsigned int e_flags, unsigned int arch)
5805{
5806 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5807 {
5808 /* From 0.9 to 1.0. */
5809 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5810
5811 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5812 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5813 if (arch == E_NDS_ARCH_STAR_V1_0)
5814 {
5815 /* Done. */
5816 return e_flags;
5817 }
5818 }
5819
5820 /* From 1.0 to 2.0. */
5821 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5822
5823 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5824 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5825
5826 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5827 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5828 return e_flags;
5829}
5830
5831static bfd_boolean
5832nds32_check_vec_size (bfd *ibfd)
5833{
5834 static unsigned int nds32_vec_size = 0;
5835
5836 asection *sec_t = NULL;
5837 bfd_byte *contents = NULL;
5838
5839 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5840
5841 if (sec_t && sec_t->size >= 4)
5842 {
5843 /* Get vec_size in file. */
5844 unsigned int flag_t;
5845
0c4bd9d9 5846 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5847 flag_t = bfd_get_32 (ibfd, contents);
5848
5849 /* The value could only be 4 or 16. */
5850
5851 if (!nds32_vec_size)
5852 /* Set if not set yet. */
5853 nds32_vec_size = (flag_t & 0x3);
5854 else if (nds32_vec_size != (flag_t & 0x3))
5855 {
4eca0228 5856 _bfd_error_handler
695344c0 5857 /* xgettext:c-format */
871b3ab2 5858 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 5859 " with previous modules, previous %u-byte, current %u-byte"),
5860 ibfd,
5861 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5862 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC		 5863 return FALSE;
5864 }
5865 else
5866 /* Only keep the first vec_size section. */
5867 sec_t->flags |= SEC_EXCLUDE;
5868 }
5869
5870 return TRUE;
5871}
5872
5873/* Merge backend specific data from an object file to the output
5874 object file when linking. */
5875
5876static bfd_boolean
50e03d47 5877nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5878{
50e03d47 5879 bfd *obfd = info->output_bfd;
35c08157
KLC		 5880 flagword out_flags;
5881 flagword in_flags;
5882 flagword out_16regs;
5883 flagword in_no_mac;
5884 flagword out_no_mac;
5885 flagword in_16regs;
5886 flagword out_version;
5887 flagword in_version;
5888 flagword out_fpu_config;
5889 flagword in_fpu_config;
5890
5891 /* TODO: Revise to use object-attributes instead. */
5892 if (!nds32_check_vec_size (ibfd))
5893 return FALSE;
5894
5895 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5896 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5897 return TRUE;
5898
5899 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5900 {
4eca0228 5901 _bfd_error_handler
38f14ab8 5902 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC		 5903
5904 bfd_set_error (bfd_error_bad_value);
5905 return FALSE;
5906 }
5907
5908 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5909 if (in_version == E_NDS32_ELF_VER_1_2)
5910 {
4eca0228 5911 _bfd_error_handler
38f14ab8
AM		 5912 (_("%pB: warning: older version of object file encountered, "
5913 "please recompile with current tool chain"), ibfd);
35c08157
KLC		 5914 }
5915
5916 /* We may need to merge V1 and V2 arch object files to V2. */
5917 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5918 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5919 {
5920 /* Need to convert version. */
5921 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5922 == E_NDS_ARCH_STAR_RESERVED)
5923 {
5924 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5925 }
5926 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5927 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5928 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5929 {
5930 elf_elfheader (obfd)->e_flags =
5931 convert_e_flags (elf_elfheader (obfd)->e_flags,
5932 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5933 }
5934 else
5935 {
5936 elf_elfheader (ibfd)->e_flags =
5937 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5938 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5939 }
5940 }
5941
5942 /* Extract some flags. */
5943 in_flags = elf_elfheader (ibfd)->e_flags
5944 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5945 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5946
5947 /* The following flags need special treatment. */
5948 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5949 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5950 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5951
5952 /* Extract some flags. */
5953 out_flags = elf_elfheader (obfd)->e_flags
5954 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5955 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5956
5957 /* The following flags need special treatment. */
5958 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5959 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5960 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5961 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5962 if (!elf_flags_init (obfd))
5963 {
5964 /* If the input is the default architecture then do not
5965 bother setting the flags for the output architecture,
5966 instead allow future merges to do this. If no future
5967 merges ever set these flags then they will retain their
5968 unitialised values, which surprise surprise, correspond
5969 to the default values. */
5970 if (bfd_get_arch_info (ibfd)->the_default)
5971 return TRUE;
5972
5973 elf_flags_init (obfd) = TRUE;
5974 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5975
5976 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5977 && bfd_get_arch_info (obfd)->the_default)
5978 {
5979 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5980 bfd_get_mach (ibfd));
5981 }
5982
5983 return TRUE;
5984 }
5985
5986 /* Check flag compatibility. */
5987 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5988 {
4eca0228 5989 _bfd_error_handler
38f14ab8 5990 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157
KLC		 5991
5992 bfd_set_error (bfd_error_bad_value);
5993 return FALSE;
5994 }
5995
5996 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5997 {
5998 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5999 {
4eca0228 6000 _bfd_error_handler
38f14ab8
AM		 6001 (_("%pB: error: instruction set mismatch with previous modules"),
6002 ibfd);
35c08157
KLC		 6003
6004 bfd_set_error (bfd_error_bad_value);
6005 return FALSE;
6006 }
6007 }
6008
6009 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6010 and perf ext1 and DIV are mergerd to perf ext1. */
6011 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6012 {
6013 elf_elfheader (obfd)->e_flags =
6014 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6015 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6016 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6017 ? E_NDS32_HAS_EXT_INST : 0)
6018 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6019 ? E_NDS32_HAS_EXT_INST : 0)
6020 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6021 | ((in_version > out_version) ? out_version : in_version);
6022 }
6023 else
6024 {
6025 if (in_version != out_version)
4eca0228 6026 _bfd_error_handler
695344c0 6027 /* xgettext:c-format */
38f14ab8 6028 (_("%pB: warning: incompatible elf-versions %s and %s"),
4eca0228
AM		 6029 ibfd, nds32_elfver_strtab[out_version],
6030 nds32_elfver_strtab[in_version]);
35c08157
KLC		 6031
6032 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6033 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6034 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6035 | (in_version > out_version ? out_version : in_version);
6036 }
6037
6038 return TRUE;
6039}
6040
6041/* Display the flags field. */
6042
6043static bfd_boolean
6044nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6045{
6046 FILE *file = (FILE *) ptr;
6047
6048 BFD_ASSERT (abfd != NULL && ptr != NULL);
6049
6050 _bfd_elf_print_private_bfd_data (abfd, ptr);
6051
6052 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6053
6054 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6055 {
6056 default:
6057 case E_N1_ARCH:
6058 fprintf (file, _(": n1 instructions"));
6059 break;
6060 case E_N1H_ARCH:
6061 fprintf (file, _(": n1h instructions"));
6062 break;
6063 }
6064
6065 fputc ('\n', file);
6066
6067 return TRUE;
6068}
6069
6070static unsigned int
6071nds32_elf_action_discarded (asection *sec)
6072{
6073
6074 if (strncmp
6075 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6076 return 0;
6077
6078 return _bfd_elf_default_action_discarded (sec);
6079}
6080
6081static asection *
6082nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6083 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6084 Elf_Internal_Sym *sym)
6085{
6086 if (h != NULL)
6087 switch (ELF32_R_TYPE (rel->r_info))
6088 {
6089 case R_NDS32_GNU_VTINHERIT:
6090 case R_NDS32_GNU_VTENTRY:
6091 case R_NDS32_RELA_GNU_VTINHERIT:
6092 case R_NDS32_RELA_GNU_VTENTRY:
6093 return NULL;
6094 }
6095
6096 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6097}
6098
35c08157
KLC		 6099/* Look through the relocs for a section during the first phase.
6100 Since we don't do .gots or .plts, we just need to consider the
6101 virtual table relocs for gc. */
6102
6103static bfd_boolean
6104nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6105 asection *sec, const Elf_Internal_Rela *relocs)
6106{
6107 Elf_Internal_Shdr *symtab_hdr;
6108 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6109 const Elf_Internal_Rela *rel;
6110 const Elf_Internal_Rela *rel_end;
6111 struct elf_nds32_link_hash_table *htab;
6112 bfd *dynobj;
6113 asection *sreloc = NULL;
6114
0e1862bb 6115 if (bfd_link_relocatable (info))
35c08157
KLC		 6116 return TRUE;
6117
65281396
AM		 6118 /* Don't do anything special with non-loaded, non-alloced sections.
6119 In particular, any relocs in such sections should not affect GOT
6120 and PLT reference counting (ie. we don't allow them to create GOT
6121 or PLT entries), there's no possibility or desire to optimize TLS
6122 relocs, and there's not much point in propagating relocs to shared
6123 libs that the dynamic linker won't relocate. */
6124 if ((sec->flags & SEC_ALLOC) == 0)
6125 return TRUE;
6126
35c08157
KLC		 6127 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6128 sym_hashes = elf_sym_hashes (abfd);
6129 sym_hashes_end =
6130 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6131 if (!elf_bad_symtab (abfd))
6132 sym_hashes_end -= symtab_hdr->sh_info;
6133
6134 htab = nds32_elf_hash_table (info);
6135 dynobj = htab->root.dynobj;
6136
6137 rel_end = relocs + sec->reloc_count;
6138 for (rel = relocs; rel < rel_end; rel++)
6139 {
6140 enum elf_nds32_reloc_type r_type;
6141 struct elf_link_hash_entry *h;
6142 unsigned long r_symndx;
1c8f6a4d 6143 int tls_type, old_tls_type;
35c08157
KLC		 6144
6145 r_symndx = ELF32_R_SYM (rel->r_info);
6146 r_type = ELF32_R_TYPE (rel->r_info);
6147 if (r_symndx < symtab_hdr->sh_info)
6148 h = NULL;
6149 else
6150 {
6151 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6152 while (h->root.type == bfd_link_hash_indirect
6153 || h->root.type == bfd_link_hash_warning)
6154 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6155 }
6156
1c8f6a4d
KLC		 6157 /* Some relocs require a global offset table. We create
6158 got section here, since these relocation need got section
6159 and it is not created yet. */
ce558b89 6160 if (htab->root.sgot == NULL)
35c08157
KLC		 6161 {
6162 switch (r_type)
6163 {
6164 case R_NDS32_GOT_HI20:
6165 case R_NDS32_GOT_LO12:
6166 case R_NDS32_GOT_LO15:
6167 case R_NDS32_GOT_LO19:
6168 case R_NDS32_GOT17S2_RELA:
6169 case R_NDS32_GOT15S2_RELA:
6170 case R_NDS32_GOTOFF:
6171 case R_NDS32_GOTOFF_HI20:
6172 case R_NDS32_GOTOFF_LO12:
6173 case R_NDS32_GOTOFF_LO15:
6174 case R_NDS32_GOTOFF_LO19:
6175 case R_NDS32_GOTPC20:
6176 case R_NDS32_GOTPC_HI20:
6177 case R_NDS32_GOTPC_LO12:
6178 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6179 case R_NDS32_TLS_IE_HI20:
6180 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6181 if (dynobj == NULL)
6182 htab->root.dynobj = dynobj = abfd;
ce558b89 6183 if (!_bfd_elf_create_got_section (dynobj, info))
35c08157
KLC		 6184 return FALSE;
6185 break;
6186
6187 default:
6188 break;
6189 }
6190 }
6191
6192 switch ((int) r_type)
6193 {
6194 case R_NDS32_GOT_HI20:
6195 case R_NDS32_GOT_LO12:
6196 case R_NDS32_GOT_LO15:
6197 case R_NDS32_GOT_LO19:
6198 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6199 case R_NDS32_TLS_IE_HI20:
6200 case R_NDS32_TLS_IE_LO12S2:
6201 switch (r_type)
6202 {
6203 case R_NDS32_TLS_IE_HI20:
6204 case R_NDS32_TLS_IE_LO12S2:
6205 tls_type = GOT_TLS_IE;
6206 break;
6207 default:
6208 tls_type = GOT_NORMAL;
6209 break;
6210 }
35c08157 6211 if (h != NULL)
1c8f6a4d
KLC		 6212 {
6213 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6214 h->got.refcount += 1;
6215 }
35c08157
KLC		 6216 else
6217 {
6218 bfd_signed_vma *local_got_refcounts;
6219
6220 /* This is a global offset table entry for a local
6221 symbol. */
6222 local_got_refcounts = elf_local_got_refcounts (abfd);
6223 if (local_got_refcounts == NULL)
6224 {
6225 bfd_size_type size;
6226
6227 size = symtab_hdr->sh_info;
6228 size *= sizeof (bfd_signed_vma);
6229 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6230 if (local_got_refcounts == NULL)
6231 return FALSE;
6232 elf_local_got_refcounts (abfd) = local_got_refcounts;
6233 }
6234 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6235 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6236 }
35c08157 6237
1c8f6a4d
KLC		 6238 /* We will already have issued an error message if there
6239 is a TLS/non-TLS mismatch, based on the symbol
6240 type. So just combine any TLS types needed. */
6241 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6242 && tls_type != GOT_NORMAL)
6243 tls_type |= old_tls_type;
6244
6245 if (old_tls_type != tls_type)
6246 {
6247 if (h != NULL)
6248 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6249 else
6250 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6251 }
6252 break;
6253 case R_NDS32_9_PLTREL:
35c08157
KLC		 6254 case R_NDS32_25_PLTREL:
6255 case R_NDS32_PLTREL_HI20:
6256 case R_NDS32_PLTREL_LO12:
6257 case R_NDS32_PLT_GOTREL_HI20:
6258 case R_NDS32_PLT_GOTREL_LO12:
6259 case R_NDS32_PLT_GOTREL_LO15:
6260 case R_NDS32_PLT_GOTREL_LO19:
6261 case R_NDS32_PLT_GOTREL_LO20:
6262
6263 /* This symbol requires a procedure linkage table entry. We
6264 actually build the entry in adjust_dynamic_symbol,
6265 because this might be a case of linking PIC code without
6266 linking in any dynamic objects, in which case we don't
6267 need to generate a procedure linkage table after all. */
6268
6269 /* If this is a local symbol, we resolve it directly without
6270 creating a procedure linkage table entry. */
6271 if (h == NULL)
6272 continue;
6273
6274 if (h->forced_local)
6275 break;
6276
1c8f6a4d 6277 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6278 h->needs_plt = 1;
6279 h->plt.refcount += 1;
6280 break;
6281
6282 case R_NDS32_16_RELA:
6283 case R_NDS32_20_RELA:
6284 case R_NDS32_5_RELA:
6285 case R_NDS32_32_RELA:
6286 case R_NDS32_HI20_RELA:
6287 case R_NDS32_LO12S3_RELA:
6288 case R_NDS32_LO12S2_RELA:
6289 case R_NDS32_LO12S2_DP_RELA:
6290 case R_NDS32_LO12S2_SP_RELA:
6291 case R_NDS32_LO12S1_RELA:
6292 case R_NDS32_LO12S0_RELA:
6293 case R_NDS32_LO12S0_ORI_RELA:
6294 case R_NDS32_SDA16S3_RELA:
6295 case R_NDS32_SDA17S2_RELA:
6296 case R_NDS32_SDA18S1_RELA:
6297 case R_NDS32_SDA19S0_RELA:
6298 case R_NDS32_SDA15S3_RELA:
6299 case R_NDS32_SDA15S2_RELA:
6300 case R_NDS32_SDA12S2_DP_RELA:
6301 case R_NDS32_SDA12S2_SP_RELA:
6302 case R_NDS32_SDA15S1_RELA:
6303 case R_NDS32_SDA15S0_RELA:
6304 case R_NDS32_SDA_FP7U2_RELA:
6305 case R_NDS32_15_PCREL_RELA:
6306 case R_NDS32_17_PCREL_RELA:
6307 case R_NDS32_25_PCREL_RELA:
6308
0e1862bb 6309 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 6310 {
6311 h->non_got_ref = 1;
6312 h->plt.refcount += 1;
6313 }
6314
6315 /* If we are creating a shared library, and this is a reloc against
6316 a global symbol, or a non PC relative reloc against a local
6317 symbol, then we need to copy the reloc into the shared library.
6318 However, if we are linking with -Bsymbolic, we do not need to
6319 copy a reloc against a global symbol which is defined in an
6320 object we are including in the link (i.e., DEF_REGULAR is set).
6321 At this point we have not seen all the input files, so it is
6322 possible that DEF_REGULAR is not set now but will be set later
6323 (it is never cleared). We account for that possibility below by
6324 storing information in the dyn_relocs field of the hash table
6325 entry. A similar situation occurs when creating shared libraries
6326 and symbol visibility changes render the symbol local.
6327
6328 If on the other hand, we are creating an executable, we may need
6329 to keep relocations for symbols satisfied by a dynamic library
6330 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6331 if ((bfd_link_pic (info)
35c08157
KLC		 6332 && (sec->flags & SEC_ALLOC) != 0
6333 && ((r_type != R_NDS32_25_PCREL_RELA
6334 && r_type != R_NDS32_15_PCREL_RELA
6335 && r_type != R_NDS32_17_PCREL_RELA
6336 && !(r_type == R_NDS32_32_RELA
6337 && strcmp (sec->name, ".eh_frame") == 0))
6338 || (h != NULL
6339 && (!info->symbolic
6340 || h->root.type == bfd_link_hash_defweak
6341 || !h->def_regular))))
0e1862bb 6342 || (!bfd_link_pic (info)
35c08157
KLC		 6343 && (sec->flags & SEC_ALLOC) != 0
6344 && h != NULL
6345 && (h->root.type == bfd_link_hash_defweak
6346 || !h->def_regular)))
6347 {
3bf083ed
AM		 6348 struct elf_dyn_relocs *p;
6349 struct elf_dyn_relocs **head;
35c08157
KLC		 6350
6351 if (dynobj == NULL)
6352 htab->root.dynobj = dynobj = abfd;
6353
6354 /* When creating a shared object, we must copy these
6355 relocs into the output file. We create a reloc
6356 section in dynobj and make room for the reloc. */
6357 if (sreloc == NULL)
6358 {
6359 const char *name;
6360
6361 name = bfd_elf_string_from_elf_section
6362 (abfd, elf_elfheader (abfd)->e_shstrndx,
6363 elf_section_data (sec)->rela.hdr->sh_name);
6364 if (name == NULL)
6365 return FALSE;
6366
6367 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6368 && strcmp (bfd_get_section_name (abfd, sec),
6369 name + 5) == 0);
6370
6371 sreloc = bfd_get_section_by_name (dynobj, name);
6372 if (sreloc == NULL)
6373 {
6374 flagword flags;
6375
6376 sreloc = bfd_make_section (dynobj, name);
6377 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6378 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6379 if ((sec->flags & SEC_ALLOC) != 0)
6380 flags |= SEC_ALLOC | SEC_LOAD;
6381 if (sreloc == NULL
6382 || !bfd_set_section_flags (dynobj, sreloc, flags)
6383 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6384 return FALSE;
6385
6386 elf_section_type (sreloc) = SHT_RELA;
6387 }
6388 elf_section_data (sec)->sreloc = sreloc;
6389 }
6390
6391 /* If this is a global symbol, we count the number of
6392 relocations we need for this symbol. */
6393 if (h != NULL)
6394 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6395 else
6396 {
6397 asection *s;
61034b0b 6398 void *vpp;
35c08157
KLC		 6399
6400 Elf_Internal_Sym *isym;
6401 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6402 if (isym == NULL)
6403 return FALSE;
6404
6405 /* Track dynamic relocs needed for local syms too. */
6406 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6407 if (s == NULL)
6408 return FALSE;
6409
61034b0b 6410 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 6411 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 6412 }
6413
6414 p = *head;
6415 if (p == NULL || p->sec != sec)
6416 {
6417 bfd_size_type amt = sizeof (*p);
3bf083ed 6418 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157
KLC		 6419 if (p == NULL)
6420 return FALSE;
6421 p->next = *head;
6422 *head = p;
6423 p->sec = sec;
6424 p->count = 0;
6425 p->pc_count = 0;
6426 }
6427
6428 p->count += 1;
6429 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6430 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6431 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6432 p->pc_count += 1;
6433 }
6434 break;
6435
6436 /* This relocation describes the C++ object vtable hierarchy.
6437 Reconstruct it for later use during GC. */
6438 case R_NDS32_RELA_GNU_VTINHERIT:
6439 case R_NDS32_GNU_VTINHERIT:
6440 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6441 return FALSE;
6442 break;
6443
6444 /* This relocation describes which C++ vtable entries are actually
6445 used. Record for later use during GC. */
6446 case R_NDS32_GNU_VTENTRY:
6447 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6448 return FALSE;
6449 break;
6450 case R_NDS32_RELA_GNU_VTENTRY:
6451 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6452 return FALSE;
6453 break;
6454 }
6455 }
6456
6457 return TRUE;
6458}
6459
6460/* Write VAL in uleb128 format to P, returning a pointer to the
6461 following byte.
6462 This code is copied from elf-attr.c. */
6463
6464static bfd_byte *
6465write_uleb128 (bfd_byte *p, unsigned int val)
6466{
6467 bfd_byte c;
6468 do
6469 {
6470 c = val & 0x7f;
6471 val >>= 7;
6472 if (val)
6473 c |= 0x80;
6474 *(p++) = c;
6475 }
6476 while (val);
6477 return p;
6478}
6479
6480static bfd_signed_vma
6481calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6482 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6483 int *pic_ext_target)
6484{
6485 bfd_signed_vma foff;
6486 bfd_vma symval, addend;
6487 asection *sym_sec;
6488
6489 /* Get the value of the symbol referred to by the reloc. */
6490 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6491 {
6492 Elf_Internal_Sym *isym;
6493
6494 /* A local symbol. */
6495 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6496
6497 if (isym->st_shndx == SHN_UNDEF)
6498 sym_sec = bfd_und_section_ptr;
6499 else if (isym->st_shndx == SHN_ABS)
6500 sym_sec = bfd_abs_section_ptr;
6501 else if (isym->st_shndx == SHN_COMMON)
6502 sym_sec = bfd_com_section_ptr;
6503 else
6504 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6505 symval = isym->st_value + sym_sec->output_section->vma
6506 + sym_sec->output_offset;
6507 }
6508 else
6509 {
6510 unsigned long indx;
6511 struct elf_link_hash_entry *h;
6512 bfd *owner;
6513
6514 /* An external symbol. */
6515 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6516 h = elf_sym_hashes (abfd)[indx];
6517 BFD_ASSERT (h != NULL);
6518
6519 if (h->root.type != bfd_link_hash_defined
6520 && h->root.type != bfd_link_hash_defweak)
6521 /* This appears to be a reference to an undefined
6522 symbol. Just ignore it--it will be caught by the
6523 regular reloc processing. */
6524 return 0;
6525 owner = h->root.u.def.section->owner;
6526 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6527 *pic_ext_target = 1;
6528
6529 if (h->root.u.def.section->flags & SEC_MERGE)
6530 {
6531 sym_sec = h->root.u.def.section;
6532 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6533 elf_section_data (sym_sec)->sec_info,
6534 h->root.u.def.value);
6535 symval = symval + sym_sec->output_section->vma
6536 + sym_sec->output_offset;
6537 }
6538 else
6539 symval = (h->root.u.def.value
6540 + h->root.u.def.section->output_section->vma
6541 + h->root.u.def.section->output_offset);
6542 }
6543
6544 addend = irel->r_addend;
6545
6546 foff = (symval + addend
6547 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6548 return foff;
6549}
6550
6551static bfd_vma
6552calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6553 Elf_Internal_Sym *isymbuf,
6554 Elf_Internal_Rela *irel,
6555 Elf_Internal_Shdr *symtab_hdr)
6556{
6557 bfd_vma symval;
6558
6559 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6560 {
6561 Elf_Internal_Sym *isym;
6562 asection *sym_sec;
6563 /* A local symbol. */
6564 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6565
6566 if (isym->st_shndx == SHN_UNDEF)
6567 sym_sec = bfd_und_section_ptr;
6568 else if (isym->st_shndx == SHN_ABS)
6569 sym_sec = bfd_abs_section_ptr;
6570 else if (isym->st_shndx == SHN_COMMON)
6571 sym_sec = bfd_com_section_ptr;
6572 else
6573 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6574 symval = isym->st_value + sym_sec->output_section->vma
6575 + sym_sec->output_offset;
6576 }
6577 else
6578 {
6579 unsigned long indx;
6580 struct elf_link_hash_entry *h;
6581 struct elf_nds32_link_hash_table *htab;
6582 asection *splt;
6583
6584 /* An external symbol. */
6585 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6586 h = elf_sym_hashes (abfd)[indx];
6587 BFD_ASSERT (h != NULL);
6588 htab = nds32_elf_hash_table (link_info);
ce558b89 6589 splt = htab->root.splt;
35c08157
KLC		 6590
6591 while (h->root.type == bfd_link_hash_indirect
6592 || h->root.type == bfd_link_hash_warning)
6593 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6594
6595 if (h->plt.offset == (bfd_vma) - 1)
6596 {
6597 if (h->root.type != bfd_link_hash_defined
6598 && h->root.type != bfd_link_hash_defweak)
6599 /* This appears to be a reference to an undefined
6600 * symbol. Just ignore it--it will be caught by the
6601 * regular reloc processing. */
6602 return 0;
6603 symval = (h->root.u.def.value
6604 + h->root.u.def.section->output_section->vma
6605 + h->root.u.def.section->output_offset);
6606 }
6607 else
6608 symval = splt->output_section->vma + h->plt.offset;
6609 }
6610
6611 return symval;
6612}
6613
6614static bfd_signed_vma
6615calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6616 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6617 Elf_Internal_Shdr *symtab_hdr)
6618{
6619 bfd_vma foff;
6620 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6621 symtab_hdr)) == 0)
6622 return 0;
6623 else
6624 return foff - (irel->r_offset
6625 + sec->output_section->vma + sec->output_offset);
6626}
6627\f
6628/* Convert a 32-bit instruction to 16-bit one.
6629 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6630 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6631 type of INSN16. Return 1 if successful. */
6632
6633static int
6634nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6635 int *pinsn_type)
6636{
6637 uint16_t insn16 = 0;
6cae483a 6638 int insn_type = 0;
35c08157
KLC		 6639 unsigned long mach = bfd_get_mach (abfd);
6640
6641 if (N32_SH5 (insn) != 0)
6642 return 0;
6643
6644 switch (N32_SUB5 (insn))
6645 {
6646 case N32_ALU1_ADD_SLLI:
6647 case N32_ALU1_ADD_SRLI:
6648 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6649 {
6650 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6651 N32_RB5 (insn));
6652 insn_type = NDS32_INSN_ADD333;
6653 }
6654 else if (N32_IS_RT4 (insn))
6655 {
6656 if (N32_RT5 (insn) == N32_RA5 (insn))
6657 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6658 else if (N32_RT5 (insn) == N32_RB5 (insn))
6659 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6660 insn_type = NDS32_INSN_ADD45;
6661 }
6662 break;
6663
6664 case N32_ALU1_SUB_SLLI:
6665 case N32_ALU1_SUB_SRLI:
6666 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6667 {
6668 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6669 N32_RB5 (insn));
6670 insn_type = NDS32_INSN_SUB333;
6671 }
6672 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6673 {
6674 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6675 insn_type = NDS32_INSN_SUB45;
6676 }
6677 break;
6678
6679 case N32_ALU1_AND_SLLI:
6680 case N32_ALU1_AND_SRLI:
6681 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6682 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6683 && N32_IS_RB3 (insn))
6684 {
6685 if (N32_RT5 (insn) == N32_RA5 (insn))
6686 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6687 else if (N32_RT5 (insn) == N32_RB5 (insn))
6688 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6689 if (insn16)
6690 insn_type = NDS32_INSN_AND33;
6691 }
6692 break;
6693
6694 case N32_ALU1_XOR_SLLI:
6695 case N32_ALU1_XOR_SRLI:
6696 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6697 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6698 && N32_IS_RB3 (insn))
6699 {
6700 if (N32_RT5 (insn) == N32_RA5 (insn))
6701 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6702 else if (N32_RT5 (insn) == N32_RB5 (insn))
6703 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6704 if (insn16)
6705 insn_type = NDS32_INSN_XOR33;
6706 }
6707 break;
6708
6709 case N32_ALU1_OR_SLLI:
6710 case N32_ALU1_OR_SRLI:
6711 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6712 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6713 && N32_IS_RB3 (insn))
6714 {
6715 if (N32_RT5 (insn) == N32_RA5 (insn))
6716 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6717 else if (N32_RT5 (insn) == N32_RB5 (insn))
6718 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6719 if (insn16)
6720 insn_type = NDS32_INSN_OR33;
6721 }
6722 break;
6723 case N32_ALU1_NOR:
6724 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6725 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6726 && N32_RA5 (insn) == N32_RB5 (insn))
6727 {
6728 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6729 insn_type = NDS32_INSN_NOT33;
6730 }
6731 break;
6732 case N32_ALU1_SRAI:
6733 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6734 {
6735 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6736 insn_type = NDS32_INSN_SRAI45;
6737 }
6738 break;
6739
6740 case N32_ALU1_SRLI:
6741 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6742 {
6743 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6744 insn_type = NDS32_INSN_SRLI45;
6745 }
6746 break;
6747
6748 case N32_ALU1_SLLI:
6749 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6750 {
6751 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6752 N32_UB5 (insn));
6753 insn_type = NDS32_INSN_SLLI333;
6754 }
6755 break;
6756
6757 case N32_ALU1_ZEH:
6758 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6759 {
6760 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6761 insn_type = NDS32_INSN_ZEH33;
6762 }
6763 break;
6764
6765 case N32_ALU1_SEB:
6766 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6767 {
6768 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6769 insn_type = NDS32_INSN_SEB33;
6770 }
6771 break;
6772
6773 case N32_ALU1_SEH:
6774 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6775 {
6776 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6777 insn_type = NDS32_INSN_SEH33;
6778 }
6779 break;
6780
6781 case N32_ALU1_SLT:
6782 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6783 {
6784 /* Implicit r15. */
6785 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6786 insn_type = NDS32_INSN_SLT45;
6787 }
6788 break;
6789
6790 case N32_ALU1_SLTS:
6791 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6792 {
6793 /* Implicit r15. */
6794 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6795 insn_type = NDS32_INSN_SLTS45;
6796 }
6797 break;
6798 }
6799
6800 if ((insn16 & 0x8000) == 0)
6801 return 0;
6802
6803 if (pinsn16)
6804 *pinsn16 = insn16;
6805 if (pinsn_type)
6806 *pinsn_type = insn_type;
6807 return 1;
6808}
6809
6810static int
6811nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6812 int *pinsn_type)
6813{
6814 uint16_t insn16 = 0;
6815 int insn_type;
6816 unsigned long mach = bfd_get_mach (abfd);
6817
6818 /* TODO: bset, bclr, btgl, btst. */
6819 if (__GF (insn, 6, 4) != 0)
6820 return 0;
6821
6822 switch (N32_IMMU (insn, 6))
6823 {
6824 case N32_ALU2_MUL:
6825 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6826 && N32_IS_RB3 (insn))
6827 {
6828 if (N32_RT5 (insn) == N32_RA5 (insn))
6829 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6830 else if (N32_RT5 (insn) == N32_RB5 (insn))
6831 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6832 if (insn16)
6833 insn_type = NDS32_INSN_MUL33;
6834 }
6835 }
6836
6837 if ((insn16 & 0x8000) == 0)
6838 return 0;
6839
6840 if (pinsn16)
6841 *pinsn16 = insn16;
6842 if (pinsn_type)
6843 *pinsn_type = insn_type;
6844 return 1;
6845}
6846
6847int
6848nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6849 int *pinsn_type)
6850{
6851 int op6;
6852 uint16_t insn16 = 0;
6853 int insn_type;
6854 unsigned long mach = bfd_get_mach (abfd);
6855
6856 /* Decode 32-bit instruction. */
6857 if (insn & 0x80000000)
6858 {
6859 /* Not 32-bit insn. */
6860 return 0;
6861 }
6862
6863 op6 = N32_OP6 (insn);
6864
6865 /* Convert it to 16-bit instruction. */
6866 switch (op6)
6867 {
6868 case N32_OP6_MOVI:
6869 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6870 {
6871 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6872 insn_type = NDS32_INSN_MOVI55;
6873 }
6874 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6875 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6876 {
6877 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6878 N32_IMM20S (insn) - 16);
6879 insn_type = NDS32_INSN_MOVPI45;
6880 }
6881 break;
6882
6883 case N32_OP6_ADDI:
6884 if (N32_IMM15S (insn) == 0)
6885 {
6886 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6887 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6888 if (mach <= MACH_V2
6889 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6890 {
6891 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6892 insn_type = NDS32_INSN_MOV55;
6893 }
6894 }
6895 else if (N32_IMM15S (insn) > 0)
6896 {
6897 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6898 {
6899 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6900 N32_IMM15S (insn));
6901 insn_type = NDS32_INSN_ADDI333;
6902 }
6903 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6904 && N32_IMM15S (insn) < 32)
6905 {
6906 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6907 insn_type = NDS32_INSN_ADDI45;
6908 }
6909 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6910 && N32_RT5 (insn) == N32_RA5 (insn)
6911 && N32_IMM15S (insn) < 512)
6912 {
6913 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6914 insn_type = NDS32_INSN_ADDI10_SP;
6915 }
6916 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6917 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6918 && (N32_IMM15S (insn) % 4 == 0))
6919 {
6920 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6921 N32_IMM15S (insn) >> 2);
6922 insn_type = NDS32_INSN_ADDRI36_SP;
6923 }
6924 }
6925 else
6926 {
6927 /* Less than 0. */
6928 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6929 {
6930 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6931 0 - N32_IMM15S (insn));
6932 insn_type = NDS32_INSN_SUBI333;
6933 }
6934 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6935 && N32_IMM15S (insn) > -32)
6936 {
1c8f6a4d
KLC		 6937 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6938 0 - N32_IMM15S (insn));
35c08157
KLC		 6939 insn_type = NDS32_INSN_SUBI45;
6940 }
6941 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6942 && N32_RT5 (insn) == N32_RA5 (insn)
6943 && N32_IMM15S (insn) >= -512)
6944 {
6945 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6946 insn_type = NDS32_INSN_ADDI10_SP;
6947 }
6948 }
6949 break;
6950
6951 case N32_OP6_ORI:
6952 if (N32_IMM15S (insn) == 0)
6953 {
6954 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6955 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6956 if (mach <= MACH_V2
6957 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6958 {
6959 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6960 insn_type = NDS32_INSN_MOV55;
6961 }
6962 }
6963 break;
6964
6965 case N32_OP6_SUBRI:
6966 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6967 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6968 {
6969 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6970 insn_type = NDS32_INSN_NEG33;
6971 }
6972 break;
6973
6974 case N32_OP6_ANDI:
6975 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6976 {
6977 if (N32_IMM15U (insn) == 1)
6978 {
6979 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6980 insn_type = NDS32_INSN_XLSB33;
6981 }
6982 else if (N32_IMM15U (insn) == 0x7ff)
6983 {
6984 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6985 insn_type = NDS32_INSN_X11B33;
6986 }
6987 else if (N32_IMM15U (insn) == 0xff)
6988 {
6989 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6990 insn_type = NDS32_INSN_ZEB33;
6991 }
6992 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6993 && N32_IMM15U (insn) < 256)
6994 {
6995 int imm15u = N32_IMM15U (insn);
6996
6997 if (__builtin_popcount (imm15u) == 1)
6998 {
6999 /* BMSKI33 */
7000 int imm3u = __builtin_ctz (imm15u);
7001
7002 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7003 insn_type = NDS32_INSN_BMSKI33;
7004 }
7005 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7006 {
7007 /* FEXTI33 */
7008 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7009
7010 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7011 insn_type = NDS32_INSN_FEXTI33;
7012 }
7013 }
7014 }
7015 break;
7016
7017 case N32_OP6_SLTI:
7018 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7019 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7020 {
7021 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7022 insn_type = NDS32_INSN_SLTI45;
7023 }
7024 break;
7025
7026 case N32_OP6_SLTSI:
7027 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7028 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7029 {
7030 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7031 insn_type = NDS32_INSN_SLTSI45;
7032 }
7033 break;
7034
7035 case N32_OP6_LWI:
7036 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7037 {
7038 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7039 insn_type = NDS32_INSN_LWI450;
7040 }
7041 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7042 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7043 {
7044 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7045 N32_IMM15S (insn));
7046 insn_type = NDS32_INSN_LWI333;
7047 }
7048 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7049 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7050 {
7051 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7052 insn_type = NDS32_INSN_LWI37;
7053 }
7054 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7055 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7056 {
7057 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7058 insn_type = NDS32_INSN_LWI37_SP;
7059 }
7060 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7061 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7062 {
1c8f6a4d
KLC		 7063 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7064 N32_IMM15S (insn) + 32);
35c08157
KLC		 7065 insn_type = NDS32_INSN_LWI45_FE;
7066 }
7067 break;
7068
7069 case N32_OP6_SWI:
7070 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7071 {
7072 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7073 insn_type = NDS32_INSN_SWI450;
7074 }
7075 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7076 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7077 {
1c8f6a4d
KLC		 7078 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7079 N32_IMM15S (insn));
35c08157
KLC		 7080 insn_type = NDS32_INSN_SWI333;
7081 }
7082 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7083 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7084 {
7085 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7086 insn_type = NDS32_INSN_SWI37;
7087 }
7088 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7089 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7090 {
7091 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7092 insn_type = NDS32_INSN_SWI37_SP;
7093 }
7094 break;
7095
7096 case N32_OP6_LWI_BI:
7097 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7098 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7099 {
7100 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7101 N32_IMM15S (insn));
7102 insn_type = NDS32_INSN_LWI333_BI;
7103 }
7104 break;
7105
7106 case N32_OP6_SWI_BI:
7107 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7108 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7109 {
7110 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7111 N32_IMM15S (insn));
7112 insn_type = NDS32_INSN_SWI333_BI;
7113 }
7114 break;
7115
7116 case N32_OP6_LHI:
7117 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7118 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7119 {
7120 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7121 N32_IMM15S (insn));
7122 insn_type = NDS32_INSN_LHI333;
7123 }
7124 break;
7125
7126 case N32_OP6_SHI:
7127 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7128 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7129 {
7130 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7131 N32_IMM15S (insn));
7132 insn_type = NDS32_INSN_SHI333;
7133 }
7134 break;
7135
7136 case N32_OP6_LBI:
7137 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7138 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7139 {
7140 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7141 N32_IMM15S (insn));
7142 insn_type = NDS32_INSN_LBI333;
7143 }
7144 break;
7145
7146 case N32_OP6_SBI:
7147 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7148 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7149 {
7150 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7151 N32_IMM15S (insn));
7152 insn_type = NDS32_INSN_SBI333;
7153 }
7154 break;
7155
7156 case N32_OP6_ALU1:
7157 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7158
7159 case N32_OP6_ALU2:
7160 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7161
7162 case N32_OP6_BR1:
7163 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7164 goto done;
7165
4ec521f2 7166 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 7167 {
7168 /* N32_BR1_BEQ */
7169 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7170 && N32_RT5 (insn) != REG_R5)
7171 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7172 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7173 && N32_RA5 (insn) != REG_R5)
7174 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7175 insn_type = NDS32_INSN_BEQS38;
7176 break;
7177 }
7178 else
7179 {
7180 /* N32_BR1_BNE */
7181 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7182 && N32_RT5 (insn) != REG_R5)
7183 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7184 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7185 && N32_RA5 (insn) != REG_R5)
7186 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7187 insn_type = NDS32_INSN_BNES38;
7188 break;
7189 }
7190 break;
7191
7192 case N32_OP6_BR2:
7193 switch (N32_BR2_SUB (insn))
7194 {
7195 case N32_BR2_BEQZ:
7196 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7197 {
7198 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7199 insn_type = NDS32_INSN_BEQZ38;
7200 }
1c8f6a4d
KLC		 7201 else if (N32_RT5 (insn) == REG_R15
7202 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7203 {
7204 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7205 insn_type = NDS32_INSN_BEQZS8;
7206 }
7207 break;
7208
7209 case N32_BR2_BNEZ:
7210 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7211 {
7212 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7213 insn_type = NDS32_INSN_BNEZ38;
7214 }
1c8f6a4d
KLC		 7215 else if (N32_RT5 (insn) == REG_R15
7216 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7217 {
7218 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7219 insn_type = NDS32_INSN_BNEZS8;
7220 }
7221 break;
7222
7223 case N32_BR2_IFCALL:
7224 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7225 {
7226 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7227 insn_type = NDS32_INSN_IFCALL9;
7228 }
7229 break;
7230 }
7231 break;
7232
7233 case N32_OP6_JI:
4ec521f2 7234 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 7235 {
7236 /* N32_JI_J */
7237 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7238 {
7239 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7240 insn_type = NDS32_INSN_J8;
7241 }
7242 }
7243 break;
7244
7245 case N32_OP6_JREG:
7246 if (__GF (insn, 8, 2) != 0)
7247 goto done;
7248
7249 switch (N32_IMMU (insn, 5))
7250 {
7251 case N32_JREG_JR:
7252 if (N32_JREG_HINT (insn) == 0)
7253 {
7254 /* jr */
7255 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7256 insn_type = NDS32_INSN_JR5;
7257 }
7258 else if (N32_JREG_HINT (insn) == 1)
7259 {
7260 /* ret */
7261 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7262 insn_type = NDS32_INSN_RET5;
7263 }
7264 else if (N32_JREG_HINT (insn) == 3)
7265 {
7266 /* ifret = mov55 $sp, $sp */
7267 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7268 insn_type = NDS32_INSN_IFRET;
7269 }
7270 break;
7271
7272 case N32_JREG_JRAL:
7273 /* It's convertible when return rt5 is $lp and address
7274 translation is kept. */
7275 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7276 {
7277 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7278 insn_type = NDS32_INSN_JRAL5;
7279 }
7280 break;
7281 }
7282 break;
7283
7284 case N32_OP6_MISC:
7285 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7286 {
7287 /* For v3, swid above 31 are used for ex9.it. */
7288 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7289 insn_type = NDS32_INSN_BREAK16;
7290 }
7291 break;
7292
7293 default:
7294 /* This instruction has no 16-bit variant. */
7295 goto done;
7296 }
7297
7298done:
7299 /* Bit-15 of insn16 should be set for a valid instruction. */
7300 if ((insn16 & 0x8000) == 0)
7301 return 0;
7302
7303 if (pinsn16)
7304 *pinsn16 = insn16;
7305 if (pinsn_type)
7306 *pinsn_type = insn_type;
7307 return 1;
7308}
7309
7310static int
7311special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7312 Elf_Internal_Rela *reloc)
7313{
7314 uint16_t insn16 = 0;
7315
7316 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7317 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7318 return 0;
7319
7320 if (!N32_IS_RT3 (insn))
7321 return 0;
7322
7323 switch (N32_OP6 (insn))
7324 {
7325 case N32_OP6_LWI:
7326 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7327 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7328 break;
7329 case N32_OP6_SWI:
7330 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7331 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7332 break;
7333 case N32_OP6_HWGP:
7334 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7335 break;
7336
7337 if (__GF (insn, 17, 3) == 6)
7338 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7339 else if (__GF (insn, 17, 3) == 7)
7340 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7341 break;
7342 }
7343
7344 if ((insn16 & 0x8000) == 0)
7345 return 0;
7346
7347 *pinsn16 = insn16;
7348 return 1;
7349}
7350
7351/* Convert a 16-bit instruction to 32-bit one.
7352 INSN16 it the input and PINSN it the point to output.
7353 Return non-zero on successful. Otherwise 0 is returned. */
7354
7355int
7356nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7357{
7358 uint32_t insn = 0xffffffff;
7359 unsigned long mach = bfd_get_mach (abfd);
7360
7361 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7362
7363 switch (__GF (insn16, 9, 6))
7364 {
7365 case 0x4: /* add45 */
1c8f6a4d
KLC		 7366 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7367 N16_RA5 (insn16));
35c08157
KLC		 7368 goto done;
7369 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7370 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7371 N16_RA5 (insn16));
35c08157
KLC		 7372 goto done;
7373 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7374 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7375 N16_IMM5U (insn16));
35c08157
KLC		 7376 goto done;
7377 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7378 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7379 -N16_IMM5U (insn16));
35c08157
KLC		 7380 goto done;
7381 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7382 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7383 N16_IMM5U (insn16));
35c08157
KLC		 7384 goto done;
7385 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7386 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7387 N16_IMM5U (insn16));
35c08157 7388 goto done;
35c08157 7389 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7390 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7391 N16_IMM3U (insn16));
35c08157
KLC		 7392 goto done;
7393 case 0xc: /* add333 */
1c8f6a4d
KLC		 7394 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7395 N16_RB3 (insn16));
35c08157
KLC		 7396 goto done;
7397 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7398 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7399 N16_RB3 (insn16));
35c08157
KLC		 7400 goto done;
7401 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7402 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7403 N16_IMM3U (insn16));
35c08157
KLC		 7404 goto done;
7405 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7406 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7407 -N16_IMM3U (insn16));
35c08157 7408 goto done;
35c08157 7409 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7410 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7411 N16_IMM3U (insn16));
35c08157
KLC		 7412 goto done;
7413 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7414 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7415 N16_IMM3U (insn16));
35c08157
KLC		 7416 goto done;
7417 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7418 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7419 N16_IMM3U (insn16));
35c08157
KLC		 7420 goto done;
7421 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7422 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7423 N16_IMM3U (insn16));
35c08157
KLC		 7424 goto done;
7425 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7426 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7427 N16_IMM3U (insn16));
35c08157
KLC		 7428 goto done;
7429 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7430 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7431 N16_IMM3U (insn16));
35c08157
KLC		 7432 goto done;
7433 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7434 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7435 N16_IMM3U (insn16));
35c08157
KLC		 7436 goto done;
7437 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7438 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7439 N16_IMM3U (insn16));
35c08157 7440 goto done;
35c08157 7441 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7442 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7443 N16_IMM6U (insn16) << 2);
35c08157 7444 goto done;
35c08157 7445 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7446 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7447 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7448 goto done;
7449 case 0x1a: /* lwi450 */
7450 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7451 goto done;
7452 case 0x1b: /* swi450 */
7453 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7454 goto done;
7455
1c8f6a4d 7456 /* These are r15 implied instructions. */
35c08157
KLC		 7457 case 0x30: /* slts45 */
7458 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7459 goto done;
7460 case 0x31: /* slt45 */
7461 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7462 goto done;
7463 case 0x32: /* sltsi45 */
7464 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7465 goto done;
7466 case 0x33: /* slti45 */
7467 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7468 goto done;
7469 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 7470 if (insn16 & N32_BIT (8))
35c08157
KLC		 7471 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7472 else
7473 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7474 goto done;
7475
7476 case 0x35: /* break16, ex9.it */
7477 /* Only consider range of v3 break16. */
7478 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7479 goto done;
7480
7481 case 0x3c: /* ifcall9 */
7482 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7483 goto done;
7484 case 0x3d: /* movpi45 */
7485 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7486 goto done;
7487
7488 case 0x3f: /* MISC33 */
1c8f6a4d 7489 switch (insn16 & 0x7)
35c08157
KLC		 7490 {
7491 case 2: /* neg33 */
7492 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7493 break;
7494 case 3: /* not33 */
1c8f6a4d
KLC		 7495 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7496 N16_RA3 (insn16));
35c08157
KLC		 7497 break;
7498 case 4: /* mul33 */
1c8f6a4d
KLC		 7499 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7500 N16_RA3 (insn16));
35c08157
KLC		 7501 break;
7502 case 5: /* xor33 */
1c8f6a4d
KLC		 7503 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7504 N16_RA3 (insn16));
35c08157
KLC		 7505 break;
7506 case 6: /* and33 */
1c8f6a4d
KLC		 7507 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7508 N16_RA3 (insn16));
35c08157
KLC		 7509 break;
7510 case 7: /* or33 */
1c8f6a4d
KLC		 7511 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7512 N16_RA3 (insn16));
35c08157
KLC		 7513 break;
7514 }
7515 goto done;
7516
1c8f6a4d 7517 case 0xb:
35c08157
KLC		 7518 switch (insn16 & 0x7)
7519 {
7520 case 0: /* zeb33 */
7521 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7522 break;
7523 case 1: /* zeh33 */
7524 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7525 break;
7526 case 2: /* seb33 */
7527 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7528 break;
7529 case 3: /* seh33 */
7530 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7531 break;
7532 case 4: /* xlsb33 */
7533 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7534 break;
7535 case 5: /* x11b33 */
7536 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7537 break;
7538 case 6: /* bmski33 */
7539 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7540 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7541 break;
7542 case 7: /* fexti33 */
7543 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7544 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7545 break;
7546 }
7547 goto done;
7548 }
7549
7550 switch (__GF (insn16, 10, 5))
7551 {
7552 case 0x0: /* mov55 or ifret16 */
7553 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7554 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7555 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7556 else
1c8f6a4d 7557 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7558 goto done;
7559 case 0x1: /* movi55 */
7560 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7561 goto done;
7562 case 0x1b: /* addi10s (V2) */
7563 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7564 goto done;
7565 }
7566
7567 switch (__GF (insn16, 11, 4))
7568 {
7569 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 7570 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 7571 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7572 else /* lwi37.fp */
7573 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7574 goto done;
7575 case 0x8: /* beqz38 */
7576 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7577 goto done;
7578 case 0x9: /* bnez38 */
7579 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7580 goto done;
7581 case 0xa: /* beqs38/j8, implied r5 */
7582 if (N16_RT38 (insn16) == 5)
7583 insn = N32_JI (J, N16_IMM8S (insn16));
7584 else
7585 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7586 goto done;
7587 case 0xb: /* bnes38 and others */
7588 if (N16_RT38 (insn16) == 5)
7589 {
7590 switch (__GF (insn16, 5, 3))
7591 {
7592 case 0: /* jr5 */
7593 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7594 break;
7595 case 4: /* ret5 */
7596 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7597 break;
7598 case 1: /* jral5 */
7599 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7600 break;
7601 case 2: /* ex9.it imm5 */
7602 /* ex9.it had no 32-bit variantl. */
7603 break;
7604 case 5: /* add5.pc */
7605 /* add5.pc had no 32-bit variantl. */
7606 break;
7607 }
7608 }
7609 else /* bnes38 */
7610 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7611 goto done;
7612 case 0xe: /* lwi37/swi37 */
7613 if (insn16 & (1 << 7)) /* swi37.sp */
7614 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7615 else /* lwi37.sp */
7616 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7617 goto done;
7618 }
7619
7620done:
7621 if (insn & 0x80000000)
7622 return 0;
7623
7624 if (pinsn)
7625 *pinsn = insn;
7626 return 1;
7627}
7628\f
7629static bfd_boolean
7630is_sda_access_insn (unsigned long insn)
7631{
7632 switch (N32_OP6 (insn))
7633 {
7634 case N32_OP6_LWI:
7635 case N32_OP6_LHI:
7636 case N32_OP6_LHSI:
7637 case N32_OP6_LBI:
7638 case N32_OP6_LBSI:
7639 case N32_OP6_SWI:
7640 case N32_OP6_SHI:
7641 case N32_OP6_SBI:
7642 case N32_OP6_LWC:
7643 case N32_OP6_LDC:
7644 case N32_OP6_SWC:
7645 case N32_OP6_SDC:
7646 return TRUE;
7647 default:
7648 ;
7649 }
7650 return FALSE;
7651}
7652
7653static unsigned long
7654turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7655{
7656 uint32_t oinsn = 0;
7657
7658 switch (type)
7659 {
7660 case R_NDS32_GOT_LO12:
7661 case R_NDS32_GOTOFF_LO12:
7662 case R_NDS32_PLTREL_LO12:
7663 case R_NDS32_PLT_GOTREL_LO12:
7664 case R_NDS32_LO12S0_RELA:
7665 switch (N32_OP6 (insn))
7666 {
7667 case N32_OP6_LBI:
7668 /* lbi.gp */
7669 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7670 break;
7671 case N32_OP6_LBSI:
7672 /* lbsi.gp */
4ec521f2 7673 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7674 break;
7675 case N32_OP6_SBI:
7676 /* sbi.gp */
7677 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7678 break;
7679 case N32_OP6_ORI:
7680 /* addi.gp */
4ec521f2 7681 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7682 break;
7683 }
7684 break;
7685
7686 case R_NDS32_LO12S1_RELA:
7687 switch (N32_OP6 (insn))
7688 {
7689 case N32_OP6_LHI:
7690 /* lhi.gp */
7691 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7692 break;
7693 case N32_OP6_LHSI:
7694 /* lhsi.gp */
4ec521f2 7695 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 7696 break;
7697 case N32_OP6_SHI:
7698 /* shi.gp */
4ec521f2 7699 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7700 break;
7701 }
7702 break;
7703
7704 case R_NDS32_LO12S2_RELA:
7705 switch (N32_OP6 (insn))
7706 {
7707 case N32_OP6_LWI:
7708 /* lwi.gp */
7709 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7710 break;
7711 case N32_OP6_SWI:
7712 /* swi.gp */
7713 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7714 break;
7715 }
7716 break;
7717
7718 case R_NDS32_LO12S2_DP_RELA:
7719 case R_NDS32_LO12S2_SP_RELA:
7720 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7721 break;
7722 }
7723
7724 if (oinsn)
7725 *pinsn = oinsn;
7726
7727 return oinsn != 0;
7728}
7729
7730/* Linker hasn't found the correct merge section for non-section symbol
7731 in relax time, this work is left to the function elf_link_input_bfd().
7732 So for non-section symbol, _bfd_merged_section_offset is also needed
7733 to find the correct symbol address. */
7734
7735static bfd_vma
7736nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7737 asection **psec, Elf_Internal_Rela *rel)
7738{
7739 asection *sec = *psec;
7740 bfd_vma relocation;
7741
7742 relocation = (sec->output_section->vma
7743 + sec->output_offset + sym->st_value);
7744 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7745 {
7746 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7747 rel->r_addend =
7748 _bfd_merged_section_offset (abfd, psec,
7749 elf_section_data (sec)->sec_info,
7750 sym->st_value + rel->r_addend);
7751 else
7752 rel->r_addend =
7753 _bfd_merged_section_offset (abfd, psec,
7754 elf_section_data (sec)->sec_info,
7755 sym->st_value) + rel->r_addend;
7756
7757 if (sec != *psec)
7758 {
7759 /* If we have changed the section, and our original section is
7760 marked with SEC_EXCLUDE, it means that the original
7761 SEC_MERGE section has been completely subsumed in some
7762 other SEC_MERGE section. In this case, we need to leave
7763 some info around for --emit-relocs. */
7764 if ((sec->flags & SEC_EXCLUDE) != 0)
7765 sec->kept_section = *psec;
7766 sec = *psec;
7767 }
7768 rel->r_addend -= relocation;
7769 rel->r_addend += sec->output_section->vma + sec->output_offset;
7770 }
7771 return relocation;
7772}
7773
7774static bfd_vma
7775calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7776 Elf_Internal_Sym *isymbuf,
7777 Elf_Internal_Shdr *symtab_hdr)
7778{
7779 bfd_signed_vma foff;
7780 bfd_vma symval, addend;
7781 Elf_Internal_Rela irel_fn;
7782 Elf_Internal_Sym *isym;
7783 asection *sym_sec;
7784
7785 /* Get the value of the symbol referred to by the reloc. */
7786 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7787 {
7788 /* A local symbol. */
7789 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7790
7791 if (isym->st_shndx == SHN_UNDEF)
7792 sym_sec = bfd_und_section_ptr;
7793 else if (isym->st_shndx == SHN_ABS)
7794 sym_sec = bfd_abs_section_ptr;
7795 else if (isym->st_shndx == SHN_COMMON)
7796 sym_sec = bfd_com_section_ptr;
7797 else
7798 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7799 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7800 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7801 addend = irel_fn.r_addend;
7802 }
7803 else
7804 {
7805 unsigned long indx;
7806 struct elf_link_hash_entry *h;
7807
7808 /* An external symbol. */
7809 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7810 h = elf_sym_hashes (abfd)[indx];
7811 BFD_ASSERT (h != NULL);
7812
7813 while (h->root.type == bfd_link_hash_indirect
7814 || h->root.type == bfd_link_hash_warning)
7815 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7816
7817 if (h->root.type != bfd_link_hash_defined
7818 && h->root.type != bfd_link_hash_defweak)
7819 /* This appears to be a reference to an undefined
7820 symbol. Just ignore it--it will be caught by the
7821 regular reloc processing. */
7822 return 0;
7823
7824 if (h->root.u.def.section->flags & SEC_MERGE)
7825 {
7826 sym_sec = h->root.u.def.section;
7827 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7828 (sym_sec)->sec_info, h->root.u.def.value);
7829 symval = symval + sym_sec->output_section->vma
7830 + sym_sec->output_offset;
7831 }
7832 else
7833 symval = (h->root.u.def.value
7834 + h->root.u.def.section->output_section->vma
7835 + h->root.u.def.section->output_offset);
7836 addend = irel->r_addend;
7837 }
7838
7839 foff = symval + addend;
7840
7841 return foff;
7842}
7843
7844static bfd_vma
7845calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7846 Elf_Internal_Rela *irel,
7847 Elf_Internal_Shdr *symtab_hdr)
7848{
7849 int symndx;
7850 bfd_vma *local_got_offsets;
7851 /* Get the value of the symbol referred to by the reloc. */
7852 struct elf_link_hash_entry *h;
7853 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7854
7855 /* An external symbol. */
7856 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7857 h = elf_sym_hashes (abfd)[symndx];
7858 while (h->root.type == bfd_link_hash_indirect
7859 || h->root.type == bfd_link_hash_warning)
7860 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7861
7862 if (symndx >= 0)
7863 {
7864 BFD_ASSERT (h != NULL);
ce558b89
AM		 7865 return (htab->root.sgot->output_section->vma
7866 + htab->root.sgot->output_offset
7867 + h->got.offset);
35c08157
KLC		 7868 }
7869 else
7870 {
7871 local_got_offsets = elf_local_got_offsets (abfd);
7872 BFD_ASSERT (local_got_offsets != NULL);
ce558b89
AM		 7873 return (htab->root.sgot->output_section->vma
7874 + htab->root.sgot->output_offset
7875 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
35c08157
KLC		 7876 }
7877
7878 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7879 /* The check of h->root.type is passed. */
7880}
7881
7882static int
7883is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7884 asection *sec, Elf_Internal_Rela *rel)
7885{
7886 bfd_byte *contents;
7887 unsigned short insn16;
7888
7889 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7890 return FALSE;
7891 contents = elf_section_data (sec)->this_hdr.contents;
7892 insn16 = bfd_getb16 (contents + rel->r_offset);
7893 if (insn16 == NDS32_NOP16)
7894 return TRUE;
7895 return FALSE;
7896}
7897
7898/* It checks whether the instruction could be converted to
7899 16-bit form and returns the converted one.
7900
7901 `internal_relocs' is supposed to be sorted. */
7902
7903static int
7904is_convert_32_to_16 (bfd *abfd, asection *sec,
7905 Elf_Internal_Rela *reloc,
7906 Elf_Internal_Rela *internal_relocs,
7907 Elf_Internal_Rela *irelend,
7908 uint16_t *insn16)
7909{
7910#define NORMAL_32_TO_16 (1 << 0)
7911#define SPECIAL_32_TO_16 (1 << 1)
7912 bfd_byte *contents = NULL;
7913 bfd_signed_vma off;
7914 bfd_vma mem_addr;
7915 uint32_t insn = 0;
7916 Elf_Internal_Rela *pc_rel;
7917 int pic_ext_target = 0;
7918 Elf_Internal_Shdr *symtab_hdr;
7919 Elf_Internal_Sym *isymbuf = NULL;
7920 int convert_type;
7921 bfd_vma offset;
7922
7923 if (reloc->r_offset + 4 > sec->size)
7924 return FALSE;
7925
7926 offset = reloc->r_offset;
7927
0c4bd9d9 7928 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 7929 return FALSE;
7930 insn = bfd_getb32 (contents + offset);
7931
7932 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7933 convert_type = NORMAL_32_TO_16;
7934 else if (special_convert_32_to_16 (insn, insn16, reloc))
7935 convert_type = SPECIAL_32_TO_16;
7936 else
7937 return FALSE;
7938
7939 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7940 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7941 return FALSE;
7942
7943 /* Find the first relocation of the same relocation-type,
7944 so we iteratie them forward. */
7945 pc_rel = reloc;
1c8f6a4d 7946 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 7947 pc_rel--;
7948
7949 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7950 {
7951 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7952 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7953 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7954 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7955 {
7956 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7957 &pic_ext_target);
1c8f6a4d
KLC		 7958 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7959 || off == 0)
35c08157
KLC		 7960 return FALSE;
7961 break;
7962 }
7963 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7964 {
7965 /* movi => movi55 */
1c8f6a4d
KLC		 7966 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7967 symtab_hdr);
7968 /* mem_addr is unsigned, but the value should
7969 be between [-16, 15]. */
35c08157
KLC		 7970 if ((mem_addr + 0x10) >> 5)
7971 return FALSE;
7972 break;
7973 }
1c8f6a4d
KLC		 7974 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7975 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7976 {
7977 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7978 because it can be relaxed to addi for TLS_LE_ADD. */
7979 return FALSE;
7980 }
35c08157
KLC		 7981 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7982 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7983 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7984 && convert_type == SPECIAL_32_TO_16)
7985 {
7986 /* fp-as-gp
7987 We've selected a best fp-base for this access, so we can
7988 always resolve it anyway. Do nothing. */
7989 break;
7990 }
7991 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7992 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7993 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7994 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7995 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7996 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7997 {
1c8f6a4d
KLC		 7998 /* Prevent unresolved addi instruction translate
7999 to addi45 or addi333. */
35c08157
KLC		 8000 return FALSE;
8001 }
1c8f6a4d
KLC		 8002 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8003 {
8004 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8005 &pic_ext_target);
8006 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8007 return FALSE;
8008 break;
8009 }
35c08157
KLC		 8010 }
8011
8012 return TRUE;
8013}
8014
8015static void
8016nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8017 Elf_Internal_Rela *reloc,
8018 Elf_Internal_Rela *internal_relocs,
8019 Elf_Internal_Rela *irelend,
8020 unsigned short insn16)
8021{
8022 Elf_Internal_Rela *pc_rel;
8023 bfd_vma offset;
8024
8025 offset = reloc->r_offset;
8026 bfd_putb16 (insn16, contents + offset);
8027 /* Find the first relocation of the same relocation-type,
8028 so we iteratie them forward. */
8029 pc_rel = reloc;
8030 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8031 pc_rel--;
8032
8033 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8034 {
8035 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8036 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8037 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8038 {
8039 pc_rel->r_info =
8040 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8041 }
8042 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8043 pc_rel->r_info =
8044 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8045 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8046 pc_rel->r_info =
8047 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8048 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8049 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8050 pc_rel->r_info =
8051 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8052 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8053 pc_rel->r_info =
8054 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8055 }
8056}
8057
8058/* Find a relocation of type specified by `reloc_type'
8059 of the same r_offset with reloc.
8060 If not found, return irelend.
8061
8062 Assuming relocations are sorted by r_offset,
8063 we find the relocation from `reloc' backward untill relocs,
8064 or find it from `reloc' forward untill irelend. */
8065
8066static Elf_Internal_Rela *
8067find_relocs_at_address (Elf_Internal_Rela *reloc,
8068 Elf_Internal_Rela *relocs,
8069 Elf_Internal_Rela *irelend,
8070 enum elf_nds32_reloc_type reloc_type)
8071{
8072 Elf_Internal_Rela *rel_t;
8073
8074 /* Find backward. */
8075 for (rel_t = reloc;
8076 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8077 rel_t--)
8078 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8079 return rel_t;
8080
1c8f6a4d 8081 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8082 for (rel_t = reloc;
8083 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8084 rel_t++)
8085 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8086 return rel_t;
8087
8088 return irelend;
8089}
8090
8091/* Find a relocation of specified type and offset.
8092 `reloc' is just a refence point to find a relocation at specified offset.
8093 If not found, return irelend.
8094
8095 Assuming relocations are sorted by r_offset,
8096 we find the relocation from `reloc' backward untill relocs,
8097 or find it from `reloc' forward untill irelend. */
8098
8099static Elf_Internal_Rela *
8100find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8101 Elf_Internal_Rela *relocs,
8102 Elf_Internal_Rela *irelend,
6cae483a 8103 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8104 bfd_vma offset_p)
8105{
8106 Elf_Internal_Rela *rel_t = NULL;
8107
8108 /* First, we try to find a relocation of offset `offset_p',
8109 and then we use find_relocs_at_address to find specific type. */
8110
8111 if (reloc->r_offset > offset_p)
8112 {
8113 /* Find backward. */
8114 for (rel_t = reloc;
8115 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8116 /* Do nothing. */;
8117 }
8118 else if (reloc->r_offset < offset_p)
8119 {
8120 /* Find forward. */
8121 for (rel_t = reloc;
8122 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8123 /* Do nothing. */;
8124 }
8125 else
8126 rel_t = reloc;
8127
8128 /* Not found? */
8129 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8130 return irelend;
8131
8132 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8133}
8134
8135static bfd_boolean
8136nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8137 Elf_Internal_Rela *internal_relocs,
8138 Elf_Internal_Rela *irelend,
8139 unsigned char reloc_type)
8140{
8141 Elf_Internal_Rela *rel_t;
8142
8143 for (rel_t = reloc;
8144 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8145 rel_t--)
8146 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8147 {
8148 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8149 && rel_t->r_addend == reloc->r_addend)
8150 continue;
8151 return TRUE;
8152 }
8153
8154 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8155 rel_t++)
8156 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8157 {
8158 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8159 && rel_t->r_addend == reloc->r_addend)
8160 continue;
8161 return TRUE;
8162 }
8163
8164 return FALSE;
8165}
8166
8167typedef struct nds32_elf_blank nds32_elf_blank_t;
8168struct nds32_elf_blank
8169{
8170 /* Where the blank begins. */
8171 bfd_vma offset;
8172 /* The size of the blank. */
8173 bfd_vma size;
8174 /* The accumulative size before this blank. */
8175 bfd_vma total_size;
8176 nds32_elf_blank_t *next;
8177 nds32_elf_blank_t *prev;
8178};
8179
8180static nds32_elf_blank_t *blank_free_list = NULL;
8181
8182static nds32_elf_blank_t *
8183create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8184{
8185 nds32_elf_blank_t *blank_t;
8186
8187 if (blank_free_list)
8188 {
8189 blank_t = blank_free_list;
8190 blank_free_list = blank_free_list->next;
8191 }
8192 else
8193 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8194
8195 if (blank_t == NULL)
8196 return NULL;
8197
8198 blank_t->offset = offset_p;
8199 blank_t->size = size_p;
8200 blank_t->total_size = 0;
8201 blank_t->next = NULL;
8202 blank_t->prev = NULL;
8203
8204 return blank_t;
8205}
8206
8207static void
8208remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8209{
8210 if (blank_free_list)
8211 {
8212 blank_free_list->prev = blank_p;
8213 blank_p->next = blank_free_list;
8214 }
8215 else
8216 blank_p->next = NULL;
8217
8218 blank_p->prev = NULL;
8219 blank_free_list = blank_p;
8220}
8221
8222static void
8223clean_nds32_elf_blank (void)
8224{
8225 nds32_elf_blank_t *blank_t;
8226
8227 while (blank_free_list)
8228 {
8229 blank_t = blank_free_list;
8230 blank_free_list = blank_free_list->next;
8231 free (blank_t);
8232 }
8233}
8234
8235static nds32_elf_blank_t *
8236search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8237{
8238 nds32_elf_blank_t *blank_t;
8239
8240 if (!blank_p)
8241 return NULL;
8242 blank_t = blank_p;
8243
8244 while (blank_t && addr < blank_t->offset)
8245 blank_t = blank_t->prev;
8246 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8247 blank_t = blank_t->next;
8248
8249 return blank_t;
8250}
8251
8252static bfd_vma
8253get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8254 int overwrite)
8255{
8256 nds32_elf_blank_t *blank_t;
8257
8258 blank_t = search_nds32_elf_blank (*blank_p, addr);
8259 if (!blank_t)
8260 return 0;
8261
8262 if (overwrite)
8263 *blank_p = blank_t;
8264
8265 if (addr < blank_t->offset + blank_t->size)
8266 return blank_t->total_size + (addr - blank_t->offset);
8267 else
8268 return blank_t->total_size + blank_t->size;
8269}
8270
8271static bfd_boolean
8272insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8273{
8274 nds32_elf_blank_t *blank_t, *blank_t2;
8275
8276 if (!*blank_p)
8277 {
8278 *blank_p = create_nds32_elf_blank (addr, len);
8279 return *blank_p ? TRUE : FALSE;
8280 }
8281
8282 blank_t = search_nds32_elf_blank (*blank_p, addr);
8283
8284 if (blank_t == NULL)
8285 {
8286 blank_t = create_nds32_elf_blank (addr, len);
8287 if (!blank_t)
8288 return FALSE;
8289 while ((*blank_p)->prev != NULL)
8290 *blank_p = (*blank_p)->prev;
8291 blank_t->next = *blank_p;
8292 (*blank_p)->prev = blank_t;
8293 (*blank_p) = blank_t;
8294 return TRUE;
8295 }
8296
8297 if (addr < blank_t->offset + blank_t->size)
8298 {
8299 if (addr > blank_t->offset + blank_t->size)
8300 blank_t->size = addr - blank_t->offset;
8301 }
8302 else
8303 {
8304 blank_t2 = create_nds32_elf_blank (addr, len);
8305 if (!blank_t2)
8306 return FALSE;
8307 if (blank_t->next)
8308 {
8309 blank_t->next->prev = blank_t2;
8310 blank_t2->next = blank_t->next;
8311 }
8312 blank_t2->prev = blank_t;
8313 blank_t->next = blank_t2;
8314 *blank_p = blank_t2;
8315 }
8316
8317 return TRUE;
8318}
8319
8320static bfd_boolean
8321insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8322 bfd_vma len)
8323{
8324 nds32_elf_blank_t *blank_t;
8325
8326 if (!insert_nds32_elf_blank (blank_p, addr, len))
8327 return FALSE;
8328
8329 blank_t = *blank_p;
8330
8331 if (!blank_t->prev)
8332 {
8333 blank_t->total_size = 0;
8334 blank_t = blank_t->next;
8335 }
8336
8337 while (blank_t)
8338 {
8339 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8340 blank_t = blank_t->next;
8341 }
8342
8343 return TRUE;
8344}
8345
8346static void
8347calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8348{
8349 nds32_elf_blank_t *blank_t;
8350 bfd_vma total_size = 0;
8351
8352 if (!blank_p)
8353 return;
8354
8355 blank_t = blank_p;
8356 while (blank_t->prev)
8357 blank_t = blank_t->prev;
8358 while (blank_t)
8359 {
8360 blank_t->total_size = total_size;
8361 total_size += blank_t->size;
8362 blank_t = blank_t->next;
8363 }
8364}
8365
8366static bfd_boolean
8367nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8368 nds32_elf_blank_t *blank_p)
8369{
8370 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8371 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8372 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8373 unsigned int sec_shndx; /* The section the be relaxed. */
8374 bfd_byte *contents; /* Contents data of iterating section. */
8375 Elf_Internal_Rela *internal_relocs;
8376 Elf_Internal_Rela *irel;
8377 Elf_Internal_Rela *irelend;
8378 struct elf_link_hash_entry **sym_hashes;
8379 struct elf_link_hash_entry **end_hashes;
8380 unsigned int symcount;
8381 asection *sect;
8382 nds32_elf_blank_t *blank_t;
8383 nds32_elf_blank_t *blank_t2;
8384 nds32_elf_blank_t *blank_head;
8385
8386 blank_head = blank_t = blank_p;
8387 while (blank_head->prev != NULL)
8388 blank_head = blank_head->prev;
8389 while (blank_t->next != NULL)
8390 blank_t = blank_t->next;
8391
8392 if (blank_t->offset + blank_t->size <= sec->size)
8393 {
8394 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8395 blank_t->next->prev = blank_t;
8396 }
8397 if (blank_head->offset > 0)
8398 {
8399 blank_head->prev = create_nds32_elf_blank (0, 0);
8400 blank_head->prev->next = blank_head;
8401 blank_head = blank_head->prev;
8402 }
8403
8404 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8405
8406 /* The deletion must stop at the next ALIGN reloc for an alignment
8407 power larger than the number of bytes we are deleting. */
8408
8409 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8410 if (!nds32_get_local_syms (abfd, sec, &isym))
8411 return FALSE;
8412
8413 if (isym == NULL)
8414 {
8415 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8416 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8417 symtab_hdr->contents = (bfd_byte *) isym;
8418 }
8419
8420 if (isym == NULL || symtab_hdr->sh_info == 0)
8421 return FALSE;
8422
8423 blank_t = blank_head;
8424 calc_nds32_blank_total (blank_head);
8425
8426 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8427 {
8428 /* Adjust all the relocs. */
8429
8430 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8431 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8432 TRUE /* keep_memory */);
8433 irelend = internal_relocs + sect->reloc_count;
8434
8435 blank_t = blank_head;
8436 blank_t2 = blank_head;
8437
8438 if (!(sect->flags & SEC_RELOC))
8439 continue;
8440
0c4bd9d9 8441 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8442
8443 for (irel = internal_relocs; irel < irelend; irel++)
8444 {
8445 bfd_vma raddr;
8446
8447 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8448 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8449 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8450 {
8451 unsigned long val = 0;
1c8f6a4d
KLC		 8452 unsigned long mask;
8453 long before, between;
6cae483a 8454 long offset = 0;
35c08157
KLC		 8455
8456 switch (ELF32_R_TYPE (irel->r_info))
8457 {
8458 case R_NDS32_DIFF8:
1c8f6a4d 8459 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8460 break;
8461 case R_NDS32_DIFF16:
1c8f6a4d 8462 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8463 break;
8464 case R_NDS32_DIFF32:
8465 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8466 /* Get the signed bit and mask for the high part. The
8467 gcc will alarm when right shift 32-bit since the
8468 type size of long may be 32-bit. */
8469 mask = 0 - (val >> 31);
8470 if (mask)
8471 offset = (val | (mask - 0xffffffff));
8472 else
8473 offset = val;
35c08157
KLC		 8474 break;
8475 default:
8476 BFD_ASSERT (0);
8477 }
8478
8479 /* DIFF value
8480 0 |encoded in location|
8481 |------------|-------------------|---------
8482 sym+off(addend)
8483 -- before ---| *****************
8484 --------------------- between ---|
8485
1c8f6a4d
KLC		 8486 We only care how much data are relax between DIFF,
8487 marked as ***. */
35c08157
KLC		 8488
8489 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8490 between = get_nds32_elf_blank_total (&blank_t,
8491 irel->r_addend + offset, 0);
35c08157
KLC		 8492 if (between == before)
8493 goto done_adjust_diff;
8494
8495 switch (ELF32_R_TYPE (irel->r_info))
8496 {
8497 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8498 bfd_put_8 (abfd, offset - (between - before),
8499 contents + irel->r_offset);
35c08157
KLC		 8500 break;
8501 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8502 bfd_put_16 (abfd, offset - (between - before),
8503 contents + irel->r_offset);
35c08157
KLC		 8504 break;
8505 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8506 bfd_put_32 (abfd, offset - (between - before),
8507 contents + irel->r_offset);
35c08157
KLC		 8508 break;
8509 }
8510 }
8511 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8512 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8513 {
8514 bfd_vma val = 0;
8515 unsigned int len = 0;
8516 unsigned long before, between;
8517 bfd_byte *endp, *p;
8518
4265548c
PA		 8519 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8520 &len);
35c08157
KLC		 8521
8522 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8523 between = get_nds32_elf_blank_total (&blank_t,
8524 irel->r_addend + val, 0);
35c08157
KLC		 8525 if (between == before)
8526 goto done_adjust_diff;
8527
8528 p = contents + irel->r_offset;
8529 endp = p + len -1;
8530 memset (p, 0x80, len);
8531 *(endp) = 0;
8532 p = write_uleb128 (p, val - (between - before)) - 1;
8533 if (p < endp)
8534 *p |= 0x80;
8535 }
8536done_adjust_diff:
8537
8538 if (sec == sect)
8539 {
8540 raddr = irel->r_offset;
1c8f6a4d
KLC		 8541 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8542 irel->r_offset, 1);
35c08157
KLC		 8543
8544 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8545 continue;
8546 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8547 && (blank_t2->offset > raddr
8548 || blank_t2->next->offset <= raddr))
4eca0228 8549 _bfd_error_handler
38f14ab8
AM		 8550 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
8551 abfd);
35c08157
KLC		 8552
8553 /* Mark reloc in deleted portion as NONE.
8554 For some relocs like R_NDS32_LABEL that doesn't modify the
8555 content in the section. R_NDS32_LABEL doesn't belong to the
8556 instruction in the section, so we should preserve it. */
8557 if (raddr >= blank_t2->offset
8558 && raddr < blank_t2->offset + blank_t2->size
8559 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8560 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8561 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8562 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8563 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8564 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8565 {
8566 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8567 R_NDS32_NONE);
8568 continue;
8569 }
8570 }
8571
8572 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8573 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8574 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8575 continue;
8576
8577 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8578 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8579 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8580 {
8581 if (irel->r_addend <= sec->size)
8582 irel->r_addend -=
8583 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8584 }
8585 }
8586 }
8587
8588 /* Adjust the local symbols defined in this section. */
8589 blank_t = blank_head;
8590 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8591 {
8592 if (isym->st_shndx == sec_shndx)
8593 {
8594 if (isym->st_value <= sec->size)
8595 {
8596 bfd_vma ahead;
8597 bfd_vma orig_addr = isym->st_value;
8598
8599 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8600 isym->st_value -= ahead;
8601
8602 /* Adjust function size. */
1c8f6a4d
KLC		 8603 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8604 && isym->st_size > 0)
8605 isym->st_size -=
8606 get_nds32_elf_blank_total
8607 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8608 }
8609 }
8610 }
8611
8612 /* Now adjust the global symbols defined in this section. */
8613 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8614 - symtab_hdr->sh_info);
8615 sym_hashes = elf_sym_hashes (abfd);
8616 end_hashes = sym_hashes + symcount;
8617 blank_t = blank_head;
8618 for (; sym_hashes < end_hashes; sym_hashes++)
8619 {
8620 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8621
8622 if ((sym_hash->root.type == bfd_link_hash_defined
8623 || sym_hash->root.type == bfd_link_hash_defweak)
8624 && sym_hash->root.u.def.section == sec)
8625 {
8626 if (sym_hash->root.u.def.value <= sec->size)
8627 {
8628 bfd_vma ahead;
8629 bfd_vma orig_addr = sym_hash->root.u.def.value;
8630
8631 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8632 sym_hash->root.u.def.value -= ahead;
8633
8634 /* Adjust function size. */
8635 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8636 sym_hash->size -=
8637 get_nds32_elf_blank_total
8638 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8639
8640 }
8641 }
8642 }
8643
8644 contents = elf_section_data (sec)->this_hdr.contents;
8645 blank_t = blank_head;
8646 while (blank_t->next)
8647 {
8648 /* Actually delete the bytes. */
8649
8650 /* If current blank is the last blank overlap with current section,
8651 go to finish process. */
8652 if (sec->size <= (blank_t->next->offset))
8653 break;
8654
8655 memmove (contents + blank_t->offset - blank_t->total_size,
8656 contents + blank_t->offset + blank_t->size,
8657 blank_t->next->offset - (blank_t->offset + blank_t->size));
8658
8659 blank_t = blank_t->next;
8660 }
8661
8662 if (sec->size > (blank_t->offset + blank_t->size))
8663 {
8664 /* There are remaining code between blank and section boundary.
8665 Move the remaining code to appropriate location. */
8666 memmove (contents + blank_t->offset - blank_t->total_size,
8667 contents + blank_t->offset + blank_t->size,
8668 sec->size - (blank_t->offset + blank_t->size));
8669 sec->size -= blank_t->total_size + blank_t->size;
8670 }
8671 else
8672 /* This blank is not entirely included in the section,
8673 reduce the section size by only part of the blank size. */
8674 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8675
8676 while (blank_head)
8677 {
8678 blank_t = blank_head;
8679 blank_head = blank_head->next;
8680 remove_nds32_elf_blank (blank_t);
8681 }
8682
8683 return TRUE;
8684}
8685
8686/* Get the contents of a section. */
8687
8688static int
0c4bd9d9
KLC		 8689nds32_get_section_contents (bfd *abfd, asection *sec,
8690 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8691{
8692 /* Get the section contents. */
8693 if (elf_section_data (sec)->this_hdr.contents != NULL)
8694 *contents_p = elf_section_data (sec)->this_hdr.contents;
8695 else
8696 {
8697 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8698 return FALSE;
0c4bd9d9
KLC		 8699 if (cache)
8700 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8701 }
8702
8703 return TRUE;
8704}
8705
8706/* Get the contents of the internal symbol of abfd. */
8707
8708static int
8709nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8710 Elf_Internal_Sym **isymbuf_p)
8711{
8712 Elf_Internal_Shdr *symtab_hdr;
8713 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8714
8715 /* Read this BFD's local symbols if we haven't done so already. */
8716 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8717 {
8718 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8719 if (*isymbuf_p == NULL)
8720 {
8721 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8722 symtab_hdr->sh_info, 0,
8723 NULL, NULL, NULL);
8724 if (*isymbuf_p == NULL)
8725 return FALSE;
8726 }
8727 }
8728 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8729
8730 return TRUE;
8731}
8732
8733/* Range of small data. */
1c8f6a4d
KLC		 8734static bfd_vma sdata_range[2][2];
8735static bfd_vma const sdata_init_range[2] =
8736{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8737
8738static int
8739nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8740 bfd_byte *contents, bfd_vma addr)
8741{
8742 unsigned long insn = bfd_getb32 (contents + addr);
8743
8744 if (insn & 0x80000000)
8745 return 2;
8746
8747 return 4;
8748}
8749
8750/* Set the gp relax range. We have to measure the safe range
8751 to do gp relaxation. */
8752
8753static void
8754relax_range_measurement (bfd *abfd)
8755{
8756 asection *sec_f, *sec_b;
8757 /* For upper bound. */
8758 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8759 bfd_vma align;
35c08157
KLC		 8760 static int decide_relax_range = 0;
8761 int i;
1c8f6a4d 8762 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8763
8764 if (decide_relax_range)
8765 return;
8766 decide_relax_range = 1;
8767
8768 if (sda_rela_sec == NULL)
8769 {
8770 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8771 for (i = 0; i < range_number; i++)
35c08157
KLC		 8772 {
8773 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8774 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8775 }
8776 return;
8777 }
8778
8779 /* Get the biggest alignment power after the gp located section. */
8780 sec_f = sda_rela_sec->output_section;
8781 sec_b = sec_f->next;
8782 align = 0;
8783 while (sec_b != NULL)
8784 {
8785 if ((unsigned)(1 << sec_b->alignment_power) > align)
8786 align = (1 << sec_b->alignment_power);
8787 sec_b = sec_b->next;
8788 }
8789
8790 /* I guess we can not determine the section before
8791 gp located section, so we assume the align is max page size. */
1c8f6a4d 8792 for (i = 0; i < range_number; i++)
35c08157 8793 {
1c8f6a4d 8794 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 8795 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 8796 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 8797 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8798 }
8799}
8800
8801/* These are macros used to check flags encoded in r_addend.
8802 They are only used by nds32_elf_relax_section (). */
8803#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8804#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8805#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8806#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8807
695344c0
NC		 8808static const char * unrecognized_reloc_msg =
8809 /* xgettext:c-format */
2dcf00ce 8810 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 8811
1c8f6a4d
KLC		 8812/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8813
35c08157 8814static bfd_boolean
1c8f6a4d
KLC		 8815nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8816 Elf_Internal_Rela *internal_relocs, int *insn_len,
8817 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8818 Elf_Internal_Shdr *symtab_hdr)
8819{
8820 /* There are 3 variations for LONGCALL1
8821 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 8822 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8823 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8824 jral5 ta ;
1c8f6a4d
KLC		 8825
8826 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 8827 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8828 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8829 jral ta ;
1c8f6a4d
KLC		 8830
8831 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 8832 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8833 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8834 jral ta ;
1c8f6a4d
KLC		 8835 Check code for -mlong-calls output. */
8836
8837 /* Get the reloc for the address from which the register is
8838 being loaded. This reloc will tell us which function is
8839 actually being called. */
8840
8841 bfd_vma laddr;
8842 int seq_len; /* Original length of instruction sequence. */
35c08157 8843 uint32_t insn;
1c8f6a4d
KLC		 8844 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8845 int pic_ext_target = 0;
8846 bfd_signed_vma foff;
35c08157 8847 uint16_t insn16;
35c08157 8848
1c8f6a4d
KLC		 8849 irelend = internal_relocs + sec->reloc_count;
8850 seq_len = GET_SEQ_LEN (irel->r_addend);
8851 laddr = irel->r_offset;
8852 *insn_len = seq_len;
35c08157 8853
1c8f6a4d
KLC		 8854 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8855 R_NDS32_HI20_RELA, laddr);
8856 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8857 R_NDS32_LO12S0_ORI_RELA,
8858 laddr + 4);
35c08157 8859
1c8f6a4d 8860 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 8861 {
695344c0 8862 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 8863 (uint64_t) irel->r_offset);
1c8f6a4d 8864 return FALSE;
35c08157
KLC		 8865 }
8866
1c8f6a4d
KLC		 8867 /* Get the value of the symbol referred to by the reloc. */
8868 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8869 &pic_ext_target);
35c08157 8870
1c8f6a4d
KLC		 8871 /* This condition only happened when symbol is undefined. */
8872 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8873 || foff >= CONSERVATIVE_24BIT_S1)
8874 return FALSE;
35c08157 8875
1c8f6a4d
KLC		 8876 /* Relax to: jal symbol; 25_PCREL */
8877 /* For simplicity of coding, we are going to modify the section
8878 contents, the section relocs, and the BFD symbol table. We
8879 must tell the rest of the code not to free up this
8880 information. It would be possible to instead create a table
8881 of changes which have to be made, as is done in coff-mips.c;
8882 that would be more work, but would require less memory when
8883 the linker is run. */
8884
8885 /* Replace the long call with a jal. */
8886 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8887 R_NDS32_25_PCREL_RELA);
8888 irel->r_addend = hi_irelfn->r_addend;
8889
8890 /* We don't resolve this here but resolve it in relocate_section. */
8891 insn = INSN_JAL;
8892 bfd_putb32 (insn, contents + irel->r_offset);
8893
8894 hi_irelfn->r_info =
8895 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8896 lo_irelfn->r_info =
8897 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8898 *insn_len = 4;
8899
8900 if (seq_len & 0x2)
8901 {
8902 insn16 = NDS32_NOP16;
8903 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8904 lo_irelfn->r_info =
8905 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8906 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8907 *insn_len += 2;
8908 }
8909 return TRUE;
8910}
35c08157 8911
1c8f6a4d
KLC		 8912#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8913/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 8914
1c8f6a4d
KLC		 8915static bfd_boolean
8916nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8917 Elf_Internal_Rela *internal_relocs, int *insn_len,
8918 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8919 Elf_Internal_Shdr *symtab_hdr)
8920{
8921 /* bltz rt, .L1 ; LONGCALL2
8922 jal symbol ; 25_PCREL
8923 .L1: */
35c08157 8924
1c8f6a4d
KLC		 8925 /* Get the reloc for the address from which the register is
8926 being loaded. This reloc will tell us which function is
8927 actually being called. */
35c08157 8928
1c8f6a4d
KLC		 8929 bfd_vma laddr;
8930 uint32_t insn;
8931 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8932 int pic_ext_target = 0;
8933 bfd_signed_vma foff;
35c08157 8934
1c8f6a4d
KLC		 8935 irelend = internal_relocs + sec->reloc_count;
8936 laddr = irel->r_offset;
8937 i1_irelfn =
8938 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8939 R_NDS32_25_PCREL_RELA, laddr + 4);
8940
8941 if (i1_irelfn == irelend)
35c08157 8942 {
695344c0 8943 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 8944 (uint64_t) irel->r_offset);
1c8f6a4d 8945 return FALSE;
35c08157
KLC		 8946 }
8947
1c8f6a4d 8948 insn = bfd_getb32 (contents + laddr);
35c08157 8949
1c8f6a4d
KLC		 8950 /* Get the value of the symbol referred to by the reloc. */
8951 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8952 &pic_ext_target);
35c08157 8953
1c8f6a4d
KLC		 8954 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8955 || foff >= CONSERVATIVE_16BIT_S1)
8956 return FALSE;
35c08157 8957
1c8f6a4d
KLC		 8958 /* Relax to bgezal rt, label ; 17_PCREL
8959 or bltzal rt, label ; 17_PCREL */
8960
8961 /* Convert to complimentary conditional call. */
8962 insn = CONVERT_CONDITION_CALL (insn);
8963
8964 /* For simplicity of coding, we are going to modify the section
8965 contents, the section relocs, and the BFD symbol table. We
8966 must tell the rest of the code not to free up this
8967 information. It would be possible to instead create a table
8968 of changes which have to be made, as is done in coff-mips.c;
8969 that would be more work, but would require less memory when
8970 the linker is run. */
8971
8972 /* Clean unnessary relocations. */
8973 i1_irelfn->r_info =
8974 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8975 cond_irelfn =
8976 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8977 R_NDS32_17_PCREL_RELA, laddr);
8978 if (cond_irelfn != irelend)
8979 cond_irelfn->r_info =
8980 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8981
8982 /* Replace the long call with a bgezal. */
8983 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8984 R_NDS32_17_PCREL_RELA);
8985 irel->r_addend = i1_irelfn->r_addend;
8986
8987 bfd_putb32 (insn, contents + irel->r_offset);
8988
8989 *insn_len = 4;
8990 return TRUE;
8991}
35c08157 8992
1c8f6a4d
KLC		 8993/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8994
8995static bfd_boolean
8996nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8997 Elf_Internal_Rela *internal_relocs, int *insn_len,
8998 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8999 Elf_Internal_Shdr *symtab_hdr)
9000{
9001 /* There are 3 variations for LONGCALL3
9002 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 9003 bltz rt, $1 ; LONGCALL3
9004 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9005 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9006 jral5 ta ;
1c8f6a4d
KLC		 9007 $1
9008
9009 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9010 bltz rt, $1 ; LONGCALL3
9011 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9012 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9013 jral ta ;
1c8f6a4d
KLC		 9014 $1
9015
9016 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9017 bltz rt, $1 ; LONGCALL3
9018 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9019 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9020 jral ta ;
1c8f6a4d
KLC		 9021 $1 */
9022
9023 /* Get the reloc for the address from which the register is
9024 being loaded. This reloc will tell us which function is
9025 actually being called. */
9026
9027 bfd_vma laddr;
9028 int seq_len; /* Original length of instruction sequence. */
9029 uint32_t insn;
9030 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9031 int pic_ext_target = 0;
9032 bfd_signed_vma foff;
9033 uint16_t insn16;
9034
9035 irelend = internal_relocs + sec->reloc_count;
9036 seq_len = GET_SEQ_LEN (irel->r_addend);
9037 laddr = irel->r_offset;
9038 *insn_len = seq_len;
9039
9040 hi_irelfn =
9041 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9042 R_NDS32_HI20_RELA, laddr + 4);
9043 lo_irelfn =
9044 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9045 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9046
9047 if (hi_irelfn == irelend || lo_irelfn == irelend)
9048 {
695344c0 9049 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9050 (uint64_t) irel->r_offset);
1c8f6a4d 9051 return FALSE;
35c08157
KLC		 9052 }
9053
1c8f6a4d
KLC		 9054 /* Get the value of the symbol referred to by the reloc. */
9055 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9056 &pic_ext_target);
35c08157 9057
1c8f6a4d
KLC		 9058 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9059 || foff >= CONSERVATIVE_24BIT_S1)
9060 return FALSE;
35c08157 9061
1c8f6a4d
KLC		 9062 insn = bfd_getb32 (contents + laddr);
9063 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9064 {
1c8f6a4d
KLC		 9065 /* Relax to bgezal rt, label ; 17_PCREL
9066 or bltzal rt, label ; 17_PCREL */
35c08157 9067
1c8f6a4d
KLC		 9068 /* Convert to complimentary conditional call. */
9069 insn = CONVERT_CONDITION_CALL (insn);
9070 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9071
1c8f6a4d
KLC		 9072 *insn_len = 4;
9073 irel->r_info =
9074 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9075 hi_irelfn->r_info =
9076 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9077 lo_irelfn->r_info =
9078 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9079
9080 cond_irelfn =
9081 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9082 R_NDS32_17_PCREL_RELA, laddr);
9083 if (cond_irelfn != irelend)
35c08157 9084 {
1c8f6a4d
KLC		 9085 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9086 R_NDS32_17_PCREL_RELA);
9087 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9088 }
1c8f6a4d
KLC		 9089
9090 if (seq_len & 0x2)
35c08157 9091 {
1c8f6a4d
KLC		 9092 insn16 = NDS32_NOP16;
9093 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9094 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9095 R_NDS32_INSN16);
9096 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9097 insn_len += 2;
35c08157 9098 }
1c8f6a4d
KLC		 9099 }
9100 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9101 {
9102 /* Relax to the following instruction sequence
9103 bltz rt, $1 ; LONGCALL2
9104 jal symbol ; 25_PCREL
9105 $1 */
9106 *insn_len = 8;
9107 insn = INSN_JAL;
9108 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9109
1c8f6a4d
KLC		 9110 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9111 R_NDS32_25_PCREL_RELA);
9112 irel->r_info =
9113 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9114
9115 lo_irelfn->r_info =
9116 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9117
1c8f6a4d 9118 if (seq_len & 0x2)
35c08157 9119 {
1c8f6a4d
KLC		 9120 insn16 = NDS32_NOP16;
9121 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9122 lo_irelfn->r_info =
9123 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9124 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9125 insn_len += 2;
9126 }
9127 }
9128 return TRUE;
9129}
35c08157 9130
1c8f6a4d 9131/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9132
1c8f6a4d
KLC		 9133static bfd_boolean
9134nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9135 Elf_Internal_Rela *internal_relocs, int *insn_len,
9136 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9137 Elf_Internal_Shdr *symtab_hdr)
9138{
9139 /* There are 3 variations for LONGJUMP1
9140 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9141 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9142 ori ta, ta, lo12(symbol) ; LO12S0
9143 jr5 ta ;
1c8f6a4d
KLC		 9144
9145 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9146 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9147 ori ta, ta, lo12(symbol) ; LO12S0
9148 jr ta ;
1c8f6a4d
KLC		 9149
9150 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9151 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9152 ori ta, ta, lo12(symbol) ; LO12S0
9153 jr ta ; */
1c8f6a4d
KLC		 9154
9155 /* Get the reloc for the address from which the register is
9156 being loaded. This reloc will tell us which function is
9157 actually being called. */
9158
9159 bfd_vma laddr;
9160 int seq_len; /* Original length of instruction sequence. */
9161 int insn16_on; /* 16-bit on/off. */
9162 uint32_t insn;
9163 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9164 int pic_ext_target = 0;
9165 bfd_signed_vma foff;
9166 uint16_t insn16;
9167 unsigned long reloc;
35c08157 9168
1c8f6a4d
KLC		 9169 irelend = internal_relocs + sec->reloc_count;
9170 seq_len = GET_SEQ_LEN (irel->r_addend);
9171 laddr = irel->r_offset;
9172 *insn_len = seq_len;
9173 insn16_on = IS_16BIT_ON (irel->r_addend);
9174
9175 hi_irelfn =
9176 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9177 R_NDS32_HI20_RELA, laddr);
9178 lo_irelfn =
9179 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9180 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9181 if (hi_irelfn == irelend || lo_irelfn == irelend)
9182 {
695344c0 9183 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9184 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9185 return FALSE;
9186 }
35c08157 9187
1c8f6a4d
KLC		 9188 /* Get the value of the symbol referred to by the reloc. */
9189 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9190 &pic_ext_target);
35c08157 9191
1c8f6a4d
KLC		 9192 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9193 || foff < -CONSERVATIVE_24BIT_S1)
9194 return FALSE;
35c08157 9195
1c8f6a4d
KLC		 9196 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9197 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9198 {
9199 /* j8 label */
9200 /* 16-bit on, but not optimized for speed. */
9201 reloc = R_NDS32_9_PCREL_RELA;
9202 insn16 = INSN_J8;
9203 bfd_putb16 (insn16, contents + irel->r_offset);
9204 *insn_len = 2;
9205 irel->r_info =
9206 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9207 }
9208 else
9209 {
9210 /* j label */
9211 reloc = R_NDS32_25_PCREL_RELA;
9212 insn = INSN_J;
9213 bfd_putb32 (insn, contents + irel->r_offset);
9214 *insn_len = 4;
9215 irel->r_info =
9216 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9217 irel->r_addend = 0;
9218 }
35c08157 9219
1c8f6a4d
KLC		 9220 hi_irelfn->r_info =
9221 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9222 lo_irelfn->r_info =
9223 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9224
1c8f6a4d
KLC		 9225 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9226 {
9227 insn16 = NDS32_NOP16;
9228 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9229 lo_irelfn->r_info =
9230 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9231 R_NDS32_INSN16);
9232 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9233 *insn_len += 2;
9234 }
9235 return TRUE;
9236}
9237
9238/* Revert condition branch. This function does not check if the input
9239 instruction is condition branch or not. */
9240
9241static void
9242nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9243 uint16_t *re_insn16, uint32_t *re_insn)
9244{
9245 uint32_t comp_insn = 0;
9246 uint16_t comp_insn16 = 0;
9247
9248 if (insn)
9249 {
9250 if (N32_OP6 (insn) == N32_OP6_BR1)
9251 {
9252 /* beqs label. */
9253 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9254 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9255 {
1c8f6a4d
KLC		 9256 /* Insn can be contracted to 16-bit implied r5. */
9257 comp_insn16 =
9258 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9259 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9260 }
1c8f6a4d
KLC		 9261 }
9262 else if (N32_OP6 (insn) == N32_OP6_BR3)
9263 {
9264 /* bnec $ta, imm11, label. */
9265 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9266 }
9267 else
9268 {
9269 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9270 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9271 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9272 {
1c8f6a4d 9273 if (N32_IS_RT3 (insn))
35c08157 9274 {
1c8f6a4d
KLC		 9275 /* Insn can be contracted to 16-bit. */
9276 comp_insn16 =
9277 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9278 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9279 }
9280 else if (N32_RT5 (insn) == REG_R15)
9281 {
9282 /* Insn can be contracted to 16-bit. */
9283 comp_insn16 =
9284 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9285 }
35c08157
KLC		 9286 }
9287 }
1c8f6a4d
KLC		 9288 }
9289 else
9290 {
9291 switch ((insn16 & 0xf000) >> 12)
35c08157 9292 {
1c8f6a4d
KLC		 9293 case 0xc:
9294 /* beqz38 or bnez38 */
9295 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9296 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9297 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9298 break;
35c08157 9299
1c8f6a4d
KLC		 9300 case 0xd:
9301 /* beqs38 or bnes38 */
9302 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9303 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9304 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9305 | (REG_R5 << 15);
9306 break;
35c08157 9307
1c8f6a4d
KLC		 9308 case 0xe:
9309 /* beqzS8 or bnezS8 */
9310 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9311 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9312 comp_insn |= REG_R15 << 20;
9313 break;
35c08157 9314
1c8f6a4d
KLC		 9315 default:
9316 break;
9317 }
9318 }
9319 if (comp_insn && re_insn)
9320 *re_insn = comp_insn;
9321 if (comp_insn16 && re_insn16)
9322 *re_insn16 = comp_insn16;
9323}
35c08157 9324
1c8f6a4d 9325/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9326
1c8f6a4d
KLC		 9327static bfd_boolean
9328nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9329 Elf_Internal_Rela *internal_relocs, int *insn_len,
9330 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9331 Elf_Internal_Shdr *symtab_hdr)
9332{
9333 /* There are 3 variations for LONGJUMP2
9334 case 2-4; 1st insn convertible, 16-bit on,
9335 optimize off or optimize for space
9336 bnes38 rt, ra, $1 ; LONGJUMP2
9337 j label ; 25_PCREL
9338 $1:
9339
9340 case 4-4; 1st insn not convertible
9341 bne rt, ra, $1 ; LONGJUMP2
9342 j label ; 25_PCREL
9343 $1:
9344
9345 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9346 bne rt, ra, $1 ; LONGJUMP2
9347 j label ; 25_PCREL
9348 $1: */
9349
9350 /* Get the reloc for the address from which the register is
9351 being loaded. This reloc will tell us which function is
9352 actually being called. */
9353
9354 bfd_vma laddr;
9355 int seq_len; /* Original length of instruction sequence. */
9356 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9357 int pic_ext_target = 0, first_size;
9358 unsigned int i;
9359 bfd_signed_vma foff;
9360 uint32_t insn, re_insn = 0;
9361 uint16_t insn16, re_insn16 = 0;
9362 unsigned long reloc, cond_reloc;
35c08157 9363
1c8f6a4d
KLC		 9364 enum elf_nds32_reloc_type checked_types[] =
9365 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9366
1c8f6a4d
KLC		 9367 irelend = internal_relocs + sec->reloc_count;
9368 seq_len = GET_SEQ_LEN (irel->r_addend);
9369 laddr = irel->r_offset;
9370 *insn_len = seq_len;
9371 first_size = (seq_len == 6) ? 2 : 4;
9372
9373 i2_irelfn =
9374 find_relocs_at_address_addr (irel, internal_relocs,
9375 irelend, R_NDS32_25_PCREL_RELA,
9376 laddr + first_size);
9377
9378 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9379 {
9380 cond_irelfn =
9381 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9382 checked_types[i], laddr);
9383 if (cond_irelfn != irelend)
9384 break;
9385 }
35c08157 9386
1c8f6a4d
KLC		 9387 if (i2_irelfn == irelend || cond_irelfn == irelend)
9388 {
695344c0 9389 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 9390 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9391 return FALSE;
9392 }
35c08157 9393
1c8f6a4d
KLC		 9394 /* Get the value of the symbol referred to by the reloc. */
9395 foff =
9396 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9397 &pic_ext_target);
9398 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9399 || foff >= CONSERVATIVE_16BIT_S1)
9400 return FALSE;
35c08157 9401
1c8f6a4d
KLC		 9402 /* Get the all corresponding instructions. */
9403 if (first_size == 4)
9404 {
9405 insn = bfd_getb32 (contents + laddr);
9406 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9407 }
9408 else
9409 {
9410 insn16 = bfd_getb16 (contents + laddr);
9411 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9412 }
35c08157 9413
1c8f6a4d
KLC		 9414 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9415 && foff < ACCURATE_8BIT_S1 - first_size)
9416 {
9417 if (first_size == 4)
9418 {
9419 /* Don't convert it to 16-bit now, keep this as relaxable for
9420 ``label reloc; INSN16''. */
35c08157 9421
1c8f6a4d
KLC		 9422 /* Save comp_insn32 to buffer. */
9423 bfd_putb32 (re_insn, contents + irel->r_offset);
9424 *insn_len = 4;
9425 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9426 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9427 cond_reloc = R_NDS32_INSN16;
9428 }
9429 else
9430 {
9431 bfd_putb16 (re_insn16, contents + irel->r_offset);
9432 *insn_len = 2;
9433 reloc = R_NDS32_9_PCREL_RELA;
9434 cond_reloc = R_NDS32_NONE;
9435 }
9436 }
9437 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9438 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9439 && foff < ACCURATE_14BIT_S1 - first_size))
9440 {
9441 /* beqs label ; 15_PCREL */
9442 bfd_putb32 (re_insn, contents + irel->r_offset);
9443 *insn_len = 4;
9444 reloc = R_NDS32_15_PCREL_RELA;
9445 cond_reloc = R_NDS32_NONE;
9446 }
9447 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9448 && foff >= -CONSERVATIVE_16BIT_S1
9449 && foff < CONSERVATIVE_16BIT_S1)
9450 {
9451 /* beqz label ; 17_PCREL */
9452 bfd_putb32 (re_insn, contents + irel->r_offset);
9453 *insn_len = 4;
9454 reloc = R_NDS32_17_PCREL_RELA;
9455 cond_reloc = R_NDS32_NONE;
9456 }
9457 else
9458 return FALSE;
35c08157 9459
1c8f6a4d
KLC		 9460 /* Set all relocations. */
9461 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9462 irel->r_addend = i2_irelfn->r_addend;
35c08157 9463
1c8f6a4d
KLC		 9464 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9465 cond_reloc);
9466 cond_irelfn->r_addend = 0;
35c08157 9467
1c8f6a4d
KLC		 9468 if ((seq_len ^ *insn_len ) & 0x2)
9469 {
9470 insn16 = NDS32_NOP16;
9471 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9472 i2_irelfn->r_offset = 4;
9473 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9474 R_NDS32_INSN16);
9475 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9476 *insn_len += 2;
9477 }
9478 else
9479 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9480 R_NDS32_NONE);
9481 return TRUE;
9482}
35c08157 9483
1c8f6a4d 9484/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9485
1c8f6a4d
KLC		 9486static bfd_boolean
9487nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9488 Elf_Internal_Rela *internal_relocs, int *insn_len,
9489 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9490 Elf_Internal_Shdr *symtab_hdr)
9491{
9492 /* There are 5 variations for LONGJUMP3
9493 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9494 optimize off or optimize for space
07d6d2b8
AM		 9495 bnes38 rt, ra, $1 ; LONGJUMP3
9496 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9497 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9498 jr5 ta ;
9499 $1: ;
1c8f6a4d
KLC		 9500
9501 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 9502 bnes38 rt, ra, $1 ; LONGJUMP3
9503 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9504 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9505 jr5 ta ;
9506 $1: ; LABEL
1c8f6a4d
KLC		 9507
9508 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9509 optimize off or optimize for space
07d6d2b8
AM		 9510 bne rt, ra, $1 ; LONGJUMP3
9511 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9512 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9513 jr5 ta ;
9514 $1: ;
1c8f6a4d
KLC		 9515
9516 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9517 16-bit off if no INSN16
07d6d2b8
AM		 9518 bne rt, ra, $1 ; LONGJUMP3
9519 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9520 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9521 jr ta ;
9522 $1: ;
1c8f6a4d
KLC		 9523
9524 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9525 16-bit off if no INSN16
07d6d2b8
AM		 9526 bne rt, ra, $1 ; LONGJUMP3
9527 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9528 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9529 jr ta ;
9530 $1: ; LABEL */
1c8f6a4d
KLC		 9531
9532 /* Get the reloc for the address from which the register is
9533 being loaded. This reloc will tell us which function is
9534 actually being called. */
9535 enum elf_nds32_reloc_type checked_types[] =
9536 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9537
9538 int reloc_off = 0, cond_removed = 0, convertible;
9539 bfd_vma laddr;
9540 int seq_len; /* Original length of instruction sequence. */
9541 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9542 int pic_ext_target = 0, first_size;
9543 unsigned int i;
9544 bfd_signed_vma foff;
9545 uint32_t insn, re_insn = 0;
9546 uint16_t insn16, re_insn16 = 0;
9547 unsigned long reloc, cond_reloc;
35c08157 9548
1c8f6a4d
KLC		 9549 irelend = internal_relocs + sec->reloc_count;
9550 seq_len = GET_SEQ_LEN (irel->r_addend);
9551 laddr = irel->r_offset;
9552 *insn_len = seq_len;
35c08157 9553
1c8f6a4d 9554 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9555
1c8f6a4d
KLC		 9556 if (convertible)
9557 first_size = 2;
9558 else
9559 first_size = 4;
9560
9561 /* Get all needed relocations. */
9562 hi_irelfn =
9563 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9564 R_NDS32_HI20_RELA, laddr + first_size);
9565 lo_irelfn =
9566 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9567 R_NDS32_LO12S0_ORI_RELA,
9568 laddr + first_size + 4);
9569
9570 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9571 {
9572 cond_irelfn =
9573 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9574 checked_types[i], laddr);
9575 if (cond_irelfn != irelend)
9576 break;
9577 }
35c08157 9578
1c8f6a4d
KLC		 9579 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9580 {
695344c0 9581 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 9582 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9583 return FALSE;
9584 }
35c08157 9585
1c8f6a4d
KLC		 9586 /* Get the value of the symbol referred to by the reloc. */
9587 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9588 &pic_ext_target);
35c08157 9589
1c8f6a4d
KLC		 9590 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9591 || foff >= CONSERVATIVE_24BIT_S1)
9592 return FALSE;
35c08157 9593
1c8f6a4d
KLC		 9594 /* Get the all corresponding instructions. */
9595 if (first_size == 4)
9596 {
9597 insn = bfd_getb32 (contents + laddr);
9598 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9599 }
9600 else
9601 {
9602 insn16 = bfd_getb16 (contents + laddr);
9603 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9604 }
35c08157 9605
1c8f6a4d
KLC		 9606 /* For simplicity of coding, we are going to modify the section
9607 contents, the section relocs, and the BFD symbol table. We
9608 must tell the rest of the code not to free up this
9609 information. It would be possible to instead create a table
9610 of changes which have to be made, as is done in coff-mips.c;
9611 that would be more work, but would require less memory when
9612 the linker is run. */
35c08157 9613
1c8f6a4d
KLC		 9614 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9615 && foff < ACCURATE_8BIT_S1 - first_size)
9616 {
9617 if (!(seq_len & 0x2))
9618 {
9619 /* Don't convert it to 16-bit now, keep this as relaxable
9620 for ``label reloc; INSN1a''6. */
9621 /* Save comp_insn32 to buffer. */
9622 bfd_putb32 (re_insn, contents + irel->r_offset);
9623 *insn_len = 4;
9624 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9625 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9626 cond_reloc = R_NDS32_INSN16;
9627 }
9628 else
9629 {
9630 /* Not optimize for speed; convert sequence to 16-bit. */
9631 /* Save comp_insn16 to buffer. */
9632 bfd_putb16 (re_insn16, contents + irel->r_offset);
9633 *insn_len = 2;
9634 reloc = R_NDS32_9_PCREL_RELA;
9635 cond_reloc = R_NDS32_NONE;
9636 }
9637 cond_removed = 1;
9638 }
9639 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9640 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9641 && foff < ACCURATE_14BIT_S1 - first_size))
9642 {
9643 /* beqs label ; 15_PCREL */
9644 bfd_putb32 (re_insn, contents + irel->r_offset);
9645 *insn_len = 4;
9646 reloc = R_NDS32_15_PCREL_RELA;
9647 cond_reloc = R_NDS32_NONE;
9648 cond_removed = 1;
9649 }
9650 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9651 && foff >= -CONSERVATIVE_16BIT_S1
9652 && foff < CONSERVATIVE_16BIT_S1)
9653 {
9654 /* beqz label ; 17_PCREL */
9655 bfd_putb32 (re_insn, contents + irel->r_offset);
9656 *insn_len = 4;
9657 reloc = R_NDS32_17_PCREL_RELA;
9658 cond_reloc = R_NDS32_NONE;
9659 cond_removed = 1;
9660 }
9661 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9662 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9663 {
9664 /* Relax to one of the following 3 variations
9665
9666 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9667 for space
9668 bnes38 rt, $1 ; LONGJUMP2
9669 j label ; 25_PCREL
9670 $1
9671
9672 case 4-4; 1st insn not convertible, others don't care
9673 bne rt, ra, $1 ; LONGJUMP2
9674 j label ; 25_PCREL
9675 $1
9676
9677 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9678 bne rt, ra, $1 ; LONGJUMP2
9679 j label ; 25_PCREL
9680 $1 */
9681
9682 /* Offset for first instruction. */
9683
9684 /* Use j label as second instruction. */
9685 *insn_len = 4 + first_size;
9686 insn = INSN_J;
9687 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9688 reloc = R_NDS32_LONGJUMP2;
9689 cond_reloc = R_NDS32_25_PLTREL;
9690 }
9691 else
9692 return FALSE;
35c08157 9693
1c8f6a4d
KLC		 9694 if (cond_removed == 1)
9695 {
9696 /* Set all relocations. */
9697 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9698 irel->r_addend = hi_irelfn->r_addend;
9699
9700 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9701 cond_reloc);
9702 cond_irelfn->r_addend = 0;
9703 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9704 R_NDS32_NONE);
9705 }
9706 else
9707 {
9708 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
1c8f6a4d
KLC		 9709 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9710 cond_reloc);
9711 }
35c08157 9712
1c8f6a4d
KLC		 9713 if ((seq_len ^ *insn_len ) & 0x2)
9714 {
9715 insn16 = NDS32_NOP16;
9716 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9717 lo_irelfn->r_offset = *insn_len;
9718 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9719 R_NDS32_INSN16);
9720 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9721 *insn_len += 2;
9722 }
9723 else
9724 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9725 R_NDS32_NONE);
9726 return TRUE;
9727}
35c08157 9728
1c8f6a4d 9729/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9730
1c8f6a4d
KLC		 9731static bfd_boolean
9732nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9733 Elf_Internal_Rela *internal_relocs, int *insn_len,
9734 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9735 Elf_Internal_Shdr *symtab_hdr)
9736{
9737 /* The pattern for LONGCALL4. Support for function cse.
9738 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9739 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9740 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9741
1c8f6a4d
KLC		 9742 bfd_vma laddr;
9743 uint32_t insn;
9744 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9745 Elf_Internal_Rela *irelend;
9746 int pic_ext_target = 0;
9747 bfd_signed_vma foff;
35c08157 9748
1c8f6a4d
KLC		 9749 irelend = internal_relocs + sec->reloc_count;
9750 laddr = irel->r_offset;
35c08157 9751
1c8f6a4d
KLC		 9752 /* Get the reloc for the address from which the register is
9753 being loaded. This reloc will tell us which function is
9754 actually being called. */
9755 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9756 R_NDS32_HI20_RELA, laddr);
35c08157 9757
1c8f6a4d
KLC		 9758 if (hi_irel == irelend)
9759 {
695344c0 9760 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9761 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9762 return FALSE;
9763 }
35c08157 9764
1c8f6a4d
KLC		 9765 /* Get the value of the symbol referred to by the reloc. */
9766 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9767 &pic_ext_target);
35c08157 9768
1c8f6a4d
KLC		 9769 /* This condition only happened when symbol is undefined. */
9770 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9771 || foff >= CONSERVATIVE_24BIT_S1)
9772 return FALSE;
35c08157 9773
1c8f6a4d
KLC		 9774 /* Relax to: jal symbol; 25_PCREL */
9775 /* For simplicity of coding, we are going to modify the section
9776 contents, the section relocs, and the BFD symbol table. We
9777 must tell the rest of the code not to free up this
9778 information. It would be possible to instead create a table
9779 of changes which have to be made, as is done in coff-mips.c;
9780 that would be more work, but would require less memory when
9781 the linker is run. */
35c08157 9782
1c8f6a4d
KLC		 9783 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9784 R_NDS32_PTR_RESOLVED, irel->r_addend);
9785 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9786 R_NDS32_EMPTY, irel->r_addend);
35c08157 9787
1c8f6a4d
KLC		 9788 if (ptr_irel == irelend || em_irel == irelend)
9789 {
695344c0 9790 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9791 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9792 return FALSE;
9793 }
9794 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9795 insn = bfd_getb32 (contents + irel->r_addend);
9796 if (insn & 0x80000000)
9797 return FALSE;
35c08157 9798
1c8f6a4d
KLC		 9799 /* Replace the long call with a jal. */
9800 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9801 R_NDS32_25_PCREL_RELA);
9802 ptr_irel->r_addend = 1;
35c08157 9803
1c8f6a4d
KLC		 9804 /* We don't resolve this here but resolve it in relocate_section. */
9805 insn = INSN_JAL;
9806 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9807
1c8f6a4d
KLC		 9808 irel->r_info =
9809 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9810
1c8f6a4d
KLC		 9811 /* If there is function cse, HI20 can not remove now. */
9812 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9813 R_NDS32_LONGCALL4, laddr);
9814 if (call_irel == irelend)
9815 {
9816 *insn_len = 0;
9817 hi_irel->r_info =
9818 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9819 }
35c08157 9820
1c8f6a4d
KLC		 9821 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9822 R_NDS32_INSN16, irel->r_addend);
9823 if (insn_irel != irelend)
9824 insn_irel->r_info =
9825 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9826
1c8f6a4d
KLC		 9827 return TRUE;
9828}
35c08157 9829
1c8f6a4d 9830/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 9831
1c8f6a4d
KLC		 9832static bfd_boolean
9833nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9834 Elf_Internal_Rela *internal_relocs, int *insn_len,
9835 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9836 Elf_Internal_Shdr *symtab_hdr)
9837{
9838 /* The pattern for LONGCALL5.
9839 bltz rt, .L1 ; LONGCALL5/17_PCREL
9840 jal symbol ; 25_PCREL
9841 .L1: */
35c08157 9842
1c8f6a4d
KLC		 9843 bfd_vma laddr;
9844 uint32_t insn;
9845 Elf_Internal_Rela *cond_irel, *irelend;
9846 int pic_ext_target = 0;
9847 bfd_signed_vma foff;
35c08157 9848
1c8f6a4d
KLC		 9849 irelend = internal_relocs + sec->reloc_count;
9850 laddr = irel->r_offset;
9851 insn = bfd_getb32 (contents + laddr);
35c08157 9852
1c8f6a4d
KLC		 9853 /* Get the reloc for the address from which the register is
9854 being loaded. This reloc will tell us which function is
9855 actually being called. */
9856 cond_irel =
9857 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9858 R_NDS32_25_PCREL_RELA, irel->r_addend);
9859 if (cond_irel == irelend)
9860 {
695344c0 9861 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 9862 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9863 return FALSE;
9864 }
35c08157 9865
1c8f6a4d
KLC		 9866 /* Get the value of the symbol referred to by the reloc. */
9867 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9868 &pic_ext_target);
35c08157 9869
1c8f6a4d
KLC		 9870 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9871 || foff >= CONSERVATIVE_16BIT_S1)
9872 return FALSE;
35c08157 9873
1c8f6a4d
KLC		 9874 /* Relax to bgezal rt, label ; 17_PCREL
9875 or bltzal rt, label ; 17_PCREL */
35c08157 9876
1c8f6a4d
KLC		 9877 /* Convert to complimentary conditional call. */
9878 insn = CONVERT_CONDITION_CALL (insn);
35c08157 9879
1c8f6a4d
KLC		 9880 /* For simplicity of coding, we are going to modify the section
9881 contents, the section relocs, and the BFD symbol table. We
9882 must tell the rest of the code not to free up this
9883 information. It would be possible to instead create a table
9884 of changes which have to be made, as is done in coff-mips.c;
9885 that would be more work, but would require less memory when
9886 the linker is run. */
35c08157 9887
1c8f6a4d
KLC		 9888 /* Modify relocation and contents. */
9889 cond_irel->r_info =
9890 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 9891
1c8f6a4d
KLC		 9892 /* Replace the long call with a bgezal. */
9893 bfd_putb32 (insn, contents + cond_irel->r_offset);
9894 *insn_len = 0;
35c08157 9895
1c8f6a4d
KLC		 9896 /* Clean unnessary relocations. */
9897 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9898
1c8f6a4d
KLC		 9899 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9900 R_NDS32_17_PCREL_RELA, laddr);
9901 cond_irel->r_info =
9902 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9903
1c8f6a4d
KLC		 9904 return TRUE;
9905}
35c08157 9906
1c8f6a4d 9907/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 9908
1c8f6a4d
KLC		 9909static bfd_boolean
9910nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9911 Elf_Internal_Rela *internal_relocs, int *insn_len,
9912 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9913 Elf_Internal_Shdr *symtab_hdr)
9914{
9915 /* The pattern for LONGCALL6.
9916 bltz rt, .L1 ; LONGCALL6/17_PCREL
9917 sethi ta, hi20(symbol) ; HI20/PTR
9918 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9919 jral ta ; PTR_RES/EMPTY/INSN16
9920 .L1 */
9921
9922 bfd_vma laddr;
9923 uint32_t insn;
9924 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9925 int pic_ext_target = 0;
9926 bfd_signed_vma foff;
35c08157 9927
1c8f6a4d
KLC		 9928 irelend = internal_relocs + sec->reloc_count;
9929 laddr = irel->r_offset;
35c08157 9930
1c8f6a4d
KLC		 9931 /* Get the reloc for the address from which the register is
9932 being loaded. This reloc will tell us which function is
9933 actually being called. */
9934 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9935 R_NDS32_EMPTY, irel->r_addend);
35c08157 9936
1c8f6a4d
KLC		 9937 if (em_irel == irelend)
9938 {
695344c0 9939 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 9940 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9941 return FALSE;
9942 }
35c08157 9943
1c8f6a4d
KLC		 9944 /* Get the value of the symbol referred to by the reloc. */
9945 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9946 &pic_ext_target);
35c08157 9947
1c8f6a4d
KLC		 9948 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9949 || foff >= CONSERVATIVE_24BIT_S1)
9950 return FALSE;
35c08157 9951
1c8f6a4d
KLC		 9952 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9953 insn = bfd_getb32 (contents + irel->r_addend);
9954 if (insn & 0x80000000)
9955 return FALSE;
35c08157 9956
1c8f6a4d
KLC		 9957 insn = bfd_getb32 (contents + laddr);
9958 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9959 {
9960 /* Relax to bgezal rt, label ; 17_PCREL
9961 or bltzal rt, label ; 17_PCREL */
35c08157 9962
1c8f6a4d
KLC		 9963 /* Convert to complimentary conditional call. */
9964 *insn_len = 0;
9965 insn = CONVERT_CONDITION_CALL (insn);
9966 bfd_putb32 (insn, contents + em_irel->r_offset);
9967
9968 em_irel->r_info =
9969 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9970
9971 /* Set resolved relocation. */
9972 cond_irel =
9973 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9974 R_NDS32_PTR_RESOLVED, irel->r_addend);
9975 if (cond_irel == irelend)
35c08157 9976 {
695344c0 9977 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9978 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9979 return FALSE;
9980 }
9981 cond_irel->r_addend = 1;
35c08157 9982
1c8f6a4d 9983 /* Clear relocations. */
35c08157 9984
1c8f6a4d
KLC		 9985 irel->r_info =
9986 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9987
1c8f6a4d
KLC		 9988 cond_irel =
9989 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9990 R_NDS32_17_PCREL_RELA, laddr);
9991 if (cond_irel != irelend)
9992 cond_irel->r_info =
9993 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9994
1c8f6a4d
KLC		 9995 cond_irel =
9996 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9997 R_NDS32_INSN16, irel->r_addend);
9998 if (cond_irel != irelend)
9999 cond_irel->r_info =
10000 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10001
1c8f6a4d
KLC		 10002 }
10003 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10004 {
10005 /* Relax to the following instruction sequence
10006 bltz rt, .L1 ; LONGCALL2/17_PCREL
10007 jal symbol ; 25_PCREL/PTR_RES
10008 .L1 */
10009 *insn_len = 4;
10010 /* Convert instruction. */
10011 insn = INSN_JAL;
10012 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10013
1c8f6a4d
KLC		 10014 /* Convert relocations. */
10015 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10016 R_NDS32_25_PCREL_RELA);
10017 irel->r_info =
10018 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10019
1c8f6a4d
KLC		 10020 /* Set resolved relocation. */
10021 cond_irel =
10022 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10023 R_NDS32_PTR_RESOLVED, irel->r_addend);
10024 if (cond_irel == irelend)
10025 {
695344c0 10026 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10027 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10028 return FALSE;
10029 }
10030 cond_irel->r_addend = 1;
35c08157 10031
1c8f6a4d
KLC		 10032 cond_irel =
10033 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10034 R_NDS32_INSN16, irel->r_addend);
10035 if (cond_irel != irelend)
10036 cond_irel->r_info =
10037 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10038 }
10039 return TRUE;
10040}
35c08157 10041
1c8f6a4d 10042/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10043
1c8f6a4d
KLC		 10044static bfd_boolean
10045nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10046 Elf_Internal_Rela *internal_relocs, int *insn_len,
10047 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10048 Elf_Internal_Shdr *symtab_hdr)
10049{
10050 /* The pattern for LONGJUMP4.
10051 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10052 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10053 jr ta ; PTR_RES/INSN16/EMPTY */
10054
10055 bfd_vma laddr;
10056 int seq_len; /* Original length of instruction sequence. */
10057 uint32_t insn;
10058 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10059 int pic_ext_target = 0;
10060 bfd_signed_vma foff;
35c08157 10061
1c8f6a4d
KLC		 10062 irelend = internal_relocs + sec->reloc_count;
10063 seq_len = GET_SEQ_LEN (irel->r_addend);
10064 laddr = irel->r_offset;
10065 *insn_len = seq_len;
35c08157 10066
1c8f6a4d
KLC		 10067 /* Get the reloc for the address from which the register is
10068 being loaded. This reloc will tell us which function is
10069 actually being called. */
35c08157 10070
1c8f6a4d
KLC		 10071 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10072 R_NDS32_HI20_RELA, laddr);
35c08157 10073
1c8f6a4d
KLC		 10074 if (hi_irel == irelend)
10075 {
695344c0 10076 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10077 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10078 return FALSE;
10079 }
35c08157 10080
1c8f6a4d
KLC		 10081 /* Get the value of the symbol referred to by the reloc. */
10082 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10083 &pic_ext_target);
35c08157 10084
1c8f6a4d
KLC		 10085 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10086 || foff < -CONSERVATIVE_24BIT_S1)
10087 return FALSE;
35c08157 10088
1c8f6a4d
KLC		 10089 /* Convert it to "j label", it may be converted to j8 in the final
10090 pass of relaxation. Therefore, we do not consider this currently. */
10091 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10092 R_NDS32_PTR_RESOLVED, irel->r_addend);
10093 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10094 R_NDS32_EMPTY, irel->r_addend);
35c08157 10095
1c8f6a4d
KLC		 10096 if (ptr_irel == irelend || em_irel == irelend)
10097 {
695344c0 10098 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10099 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10100 return FALSE;
10101 }
35c08157 10102
1c8f6a4d
KLC		 10103 em_irel->r_info =
10104 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10105 ptr_irel->r_addend = 1;
35c08157 10106
1c8f6a4d
KLC		 10107 /* Write instruction. */
10108 insn = INSN_J;
10109 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10110
1c8f6a4d
KLC		 10111 /* Clear relocations. */
10112 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10113
1c8f6a4d
KLC		 10114 /* If there is function cse, HI20 can not remove now. */
10115 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10116 R_NDS32_LONGJUMP4, laddr);
10117 if (call_irel == irelend)
10118 {
10119 *insn_len = 0;
10120 hi_irel->r_info =
10121 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10122 }
35c08157 10123
1c8f6a4d
KLC		 10124 return TRUE;
10125}
35c08157 10126
1c8f6a4d 10127/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10128
1c8f6a4d
KLC		 10129static bfd_boolean
10130nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10131 Elf_Internal_Rela *internal_relocs, int *insn_len,
10132 int *seq_len, bfd_byte *contents,
10133 Elf_Internal_Sym *isymbuf,
10134 Elf_Internal_Shdr *symtab_hdr)
10135{
10136 /* There are 2 variations for LONGJUMP5
10137 case 2-4; 1st insn convertible, 16-bit on.
10138 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10139 j label ; 25_PCREL/INSN16
10140 $1:
10141
10142 case 4-4; 1st insn not convertible
10143 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10144 j label ; 25_PCREL/INSN16
10145 .L1: */
10146
10147 bfd_vma laddr;
10148 Elf_Internal_Rela *cond_irel, *irelend;
10149 int pic_ext_target = 0;
10150 unsigned int i;
10151 bfd_signed_vma foff;
10152 uint32_t insn, re_insn = 0;
10153 uint16_t insn16, re_insn16 = 0;
10154 unsigned long reloc;
35c08157 10155
1c8f6a4d
KLC		 10156 enum elf_nds32_reloc_type checked_types[] =
10157 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10158 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10159
1c8f6a4d
KLC		 10160 irelend = internal_relocs + sec->reloc_count;
10161 laddr = irel->r_offset;
35c08157 10162
1c8f6a4d
KLC		 10163 /* Get the reloc for the address from which the register is
10164 being loaded. This reloc will tell us which function is
10165 actually being called. */
35c08157 10166
1c8f6a4d
KLC		 10167 cond_irel =
10168 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10169 R_NDS32_25_PCREL_RELA, irel->r_addend);
10170 if (cond_irel == irelend)
10171 {
695344c0 10172 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10173 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10174 return FALSE;
10175 }
35c08157 10176
1c8f6a4d
KLC		 10177 /* Get the value of the symbol referred to by the reloc. */
10178 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10179 &pic_ext_target);
35c08157 10180
1c8f6a4d
KLC		 10181 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10182 || foff >= CONSERVATIVE_16BIT_S1)
10183 return FALSE;
35c08157 10184
1c8f6a4d
KLC		 10185 /* Get the all corresponding instructions. */
10186 insn = bfd_getb32 (contents + laddr);
10187 /* Check instruction size. */
10188 if (insn & 0x80000000)
10189 {
10190 *seq_len = 0;
10191 insn16 = insn >> 16;
10192 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10193 }
10194 else
10195 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10196
1c8f6a4d
KLC		 10197 if (N32_OP6 (re_insn) == N32_OP6_BR1
10198 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10199 {
10200 /* beqs label ; 15_PCREL. */
10201 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10202 reloc = R_NDS32_15_PCREL_RELA;
10203 }
10204 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10205 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10206 {
10207 /* beqz label ; 17_PCREL. */
10208 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10209 reloc = R_NDS32_17_PCREL_RELA;
10210 }
10211 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10212 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10213 {
10214 /* beqc label ; 9_PCREL. */
10215 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10216 reloc = R_NDS32_WORD_9_PCREL_RELA;
10217 }
10218 else
10219 return FALSE;
35c08157 10220
1c8f6a4d
KLC		 10221 /* Set all relocations. */
10222 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10223
1c8f6a4d
KLC		 10224 /* Clean relocations. */
10225 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10226 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10227 {
10228 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10229 checked_types[i], laddr);
10230 if (cond_irel != irelend)
10231 {
10232 if (*seq_len == 0
10233 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10234 {
1c8f6a4d
KLC		 10235 /* If the branch instruction is 2 byte, it cannot remove
10236 directly. Only convert it to nop16 and remove it after
10237 checking alignment issue. */
10238 insn16 = NDS32_NOP16;
10239 bfd_putb16 (insn16, contents + laddr);
10240 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10241 }
10242 else
1c8f6a4d
KLC		 10243 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10244 R_NDS32_NONE);
35c08157 10245 }
1c8f6a4d
KLC		 10246 }
10247 *insn_len = 0;
35c08157 10248
1c8f6a4d
KLC		 10249 return TRUE;
10250}
35c08157 10251
1c8f6a4d 10252/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10253
1c8f6a4d
KLC		 10254static bfd_boolean
10255nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10256 Elf_Internal_Rela *internal_relocs, int *insn_len,
10257 int *seq_len, bfd_byte *contents,
10258 Elf_Internal_Sym *isymbuf,
10259 Elf_Internal_Shdr *symtab_hdr)
10260{
10261 /* There are 5 variations for LONGJUMP6
10262 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10263 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10264 sethi ta, hi20(symbol) ; HI20/PTR
10265 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10266 jr ta ; PTR_RES/INSN16/EMPTY
10267 .L1:
10268
10269 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10270 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10271 sethi ta, hi20(symbol) ; HI20/PTR
10272 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10273 jr ta ; PTR_RES/INSN16/EMPTY
10274 .L1: */
10275
10276 enum elf_nds32_reloc_type checked_types[] =
10277 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10278 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10279
10280 int reloc_off = 0, cond_removed = 0;
10281 bfd_vma laddr;
10282 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10283 int pic_ext_target = 0;
10284 unsigned int i;
10285 bfd_signed_vma foff;
10286 uint32_t insn, re_insn = 0;
10287 uint16_t insn16, re_insn16 = 0;
10288 unsigned long reloc;
35c08157 10289
1c8f6a4d
KLC		 10290 irelend = internal_relocs + sec->reloc_count;
10291 laddr = irel->r_offset;
35c08157 10292
1c8f6a4d
KLC		 10293 /* Get the reloc for the address from which the register is
10294 being loaded. This reloc will tell us which function is
10295 actually being called. */
10296 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10297 R_NDS32_EMPTY, irel->r_addend);
35c08157 10298
1c8f6a4d
KLC		 10299 if (em_irel == irelend)
10300 {
695344c0 10301 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 10302 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10303 return FALSE;
10304 }
35c08157 10305
1c8f6a4d
KLC		 10306 /* Get the value of the symbol referred to by the reloc. */
10307 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10308 &pic_ext_target);
35c08157 10309
1c8f6a4d
KLC		 10310 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10311 || foff >= CONSERVATIVE_24BIT_S1)
10312 return FALSE;
35c08157 10313
1c8f6a4d
KLC		 10314 insn = bfd_getb32 (contents + laddr);
10315 /* Check instruction size. */
10316 if (insn & 0x80000000)
10317 {
10318 *seq_len = 0;
10319 insn16 = insn >> 16;
10320 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10321 }
10322 else
10323 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10324
1c8f6a4d
KLC		 10325 /* For simplicity of coding, we are going to modify the section
10326 contents, the section relocs, and the BFD symbol table. We
10327 must tell the rest of the code not to free up this
10328 information. It would be possible to instead create a table
10329 of changes which have to be made, as is done in coff-mips.c;
10330 that would be more work, but would require less memory when
10331 the linker is run. */
35c08157 10332
1c8f6a4d
KLC		 10333 if (N32_OP6 (re_insn) == N32_OP6_BR1
10334 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10335 {
10336 /* beqs label ; 15_PCREL */
10337 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10338 reloc = R_NDS32_15_PCREL_RELA;
10339 cond_removed = 1;
10340 }
10341 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10342 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10343 {
10344 /* beqz label ; 17_PCREL */
10345 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10346 reloc = R_NDS32_17_PCREL_RELA;
10347 cond_removed = 1;
10348 }
10349 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10350 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10351 {
10352 /* Relax to one of the following 2 variations
35c08157 10353
1c8f6a4d
KLC		 10354 case 2-4; 1st insn convertible, 16-bit on.
10355 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10356 j label ; 25_PCREL/INSN16
10357 $1:
35c08157 10358
1c8f6a4d
KLC		 10359 case 4-4; 1st insn not convertible
10360 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10361 j label ; 25_PCREL/INSN16
10362 .L1: */
35c08157 10363
1c8f6a4d
KLC		 10364 /* Use j label as second instruction. */
10365 insn = INSN_J;
10366 reloc = R_NDS32_25_PCREL_RELA;
10367 bfd_putb32 (insn, contents + em_irel->r_offset);
10368 }
10369 else
10370 return FALSE;
35c08157 10371
1c8f6a4d
KLC		 10372 /* Set all relocations. */
10373 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10374
1c8f6a4d
KLC		 10375 cond_irel =
10376 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10377 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10378 cond_irel->r_addend = 1;
35c08157 10379
1c8f6a4d
KLC		 10380 /* Use INSN16 of first branch instruction to distinguish if keeping
10381 INSN16 of final instruction or not. */
10382 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10383 R_NDS32_INSN16, irel->r_offset);
10384 if (insn_irel == irelend)
10385 {
10386 /* Clean the final INSN16. */
10387 insn_irel =
10388 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10389 R_NDS32_INSN16, em_irel->r_offset);
10390 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10391 R_NDS32_NONE);
10392 }
10393
10394 if (cond_removed == 1)
10395 {
10396 *insn_len = 0;
10397
10398 /* Clear relocations. */
10399 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10400
1c8f6a4d
KLC		 10401 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10402 {
10403 cond_irel =
10404 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10405 checked_types[i], laddr);
10406 if (cond_irel != irelend)
35c08157 10407 {
1c8f6a4d
KLC		 10408 if (*seq_len == 0
10409 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10410 {
10411 /* If the branch instruction is 2 byte, it cannot remove
10412 directly. Only convert it to nop16 and remove it after
10413 checking alignment issue. */
10414 insn16 = NDS32_NOP16;
10415 bfd_putb16 (insn16, contents + laddr);
10416 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10417 }
10418 else
10419 cond_irel->r_info =
10420 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10421 }
35c08157 10422 }
1c8f6a4d
KLC		 10423 }
10424 else
10425 {
10426 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10427 R_NDS32_LONGJUMP5);
10428 }
35c08157 10429
1c8f6a4d
KLC		 10430 return TRUE;
10431}
35c08157 10432
1c8f6a4d 10433/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10434
1c8f6a4d
KLC		 10435static bfd_boolean
10436nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10437 Elf_Internal_Rela *internal_relocs, int *insn_len,
10438 int *seq_len, bfd_byte *contents,
10439 Elf_Internal_Sym *isymbuf,
10440 Elf_Internal_Shdr *symtab_hdr)
10441{
10442 /* There are 2 variations for LONGJUMP5
10443 case 2-4; 1st insn convertible, 16-bit on.
10444 movi55 ta, imm11 ; LONGJUMP7/INSN16
10445 beq rt, ta, label ; 15_PCREL
10446
10447 case 4-4; 1st insn not convertible
10448 movi55 ta, imm11 ; LONGJUMP7/INSN16
10449 beq rt, ta, label ; 15_PCREL */
10450
10451 bfd_vma laddr;
10452 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10453 int pic_ext_target = 0;
10454 bfd_signed_vma foff;
10455 uint32_t insn, re_insn = 0;
10456 uint16_t insn16;
10457 uint32_t imm11;
35c08157 10458
1c8f6a4d
KLC		 10459 irelend = internal_relocs + sec->reloc_count;
10460 laddr = irel->r_offset;
35c08157 10461
1c8f6a4d
KLC		 10462 /* Get the reloc for the address from which the register is
10463 being loaded. This reloc will tell us which function is
10464 actually being called. */
35c08157 10465
1c8f6a4d
KLC		 10466 cond_irel =
10467 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10468 R_NDS32_15_PCREL_RELA, irel->r_addend);
10469 if (cond_irel == irelend)
10470 {
695344c0 10471 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 10472 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10473 return FALSE;
10474 }
35c08157 10475
1c8f6a4d
KLC		 10476 /* Get the value of the symbol referred to by the reloc. */
10477 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10478 &pic_ext_target);
35c08157 10479
1c8f6a4d
KLC		 10480 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10481 || foff >= CONSERVATIVE_8BIT_S1)
10482 return FALSE;
35c08157 10483
1c8f6a4d
KLC		 10484 /* Get the first instruction for its size. */
10485 insn = bfd_getb32 (contents + laddr);
10486 if (insn & 0x80000000)
10487 {
10488 *seq_len = 0;
10489 /* Get the immediate from movi55. */
10490 imm11 = N16_IMM5S (insn >> 16);
10491 }
10492 else
10493 {
10494 /* Get the immediate from movi. */
10495 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10496 }
10497
1c8f6a4d
KLC		 10498 /* Get the branch instruction. */
10499 insn = bfd_getb32 (contents + irel->r_addend);
10500 /* Convert instruction to BR3. */
10501 if ((insn >> 14) & 0x1)
10502 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10503 else
10504 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10505
1c8f6a4d 10506 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10507
1c8f6a4d
KLC		 10508 /* Set all relocations. */
10509 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10510 R_NDS32_WORD_9_PCREL_RELA);
10511
10512 /* Clean relocations. */
10513 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10514 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10515 R_NDS32_INSN16, irel->r_offset);
10516 if (insn_irel != irelend)
10517 {
10518 if (*seq_len == 0)
35c08157 10519 {
1c8f6a4d
KLC		 10520 /* If the first insntruction is 16bit, convert it to nop16. */
10521 insn16 = NDS32_NOP16;
10522 bfd_putb16 (insn16, contents + laddr);
10523 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10524 }
1c8f6a4d
KLC		 10525 else
10526 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10527 R_NDS32_NONE);
35c08157 10528 }
1c8f6a4d 10529 *insn_len = 0;
35c08157 10530
1c8f6a4d
KLC		 10531 return TRUE;
10532}
35c08157 10533
1c8f6a4d 10534#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10535
1c8f6a4d 10536/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10537
1c8f6a4d
KLC		 10538static bfd_boolean
10539nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10540 asection *sec, Elf_Internal_Rela *irel,
10541 Elf_Internal_Rela *internal_relocs, int *insn_len,
10542 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10543 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10544{
6cae483a
AM		 10545 int eliminate_sethi = 0, range_type;
10546 unsigned int i;
1c8f6a4d
KLC		 10547 bfd_vma local_sda, laddr;
10548 int seq_len; /* Original length of instruction sequence. */
10549 uint32_t insn;
10550 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10551 bfd_vma access_addr = 0;
10552 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10553 enum elf_nds32_reloc_type checked_types[] =
10554 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10555 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10556 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10557 R_NDS32_TLS_LE_HI20
10558 };
35c08157 10559
1c8f6a4d
KLC		 10560 irelend = internal_relocs + sec->reloc_count;
10561 seq_len = GET_SEQ_LEN (irel->r_addend);
10562 laddr = irel->r_offset;
10563 *insn_len = seq_len;
35c08157 10564
1c8f6a4d 10565 /* Get the high part relocation. */
6cae483a 10566 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10567 {
10568 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10569 checked_types[i], laddr);
10570 if (hi_irelfn != irelend)
10571 break;
10572 }
35c08157 10573
1c8f6a4d
KLC		 10574 if (hi_irelfn == irelend)
10575 {
695344c0 10576 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
2dcf00ce 10577 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10578 return FALSE;
10579 }
35c08157 10580
1c8f6a4d
KLC		 10581 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10582 nds32_elf_final_sda_base (sec->output_section->owner,
10583 link_info, &local_sda, FALSE);
35c08157 10584
1c8f6a4d
KLC		 10585 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10586 {
10587 case R_NDS32_HI20_RELA:
10588 insn = bfd_getb32 (contents + laddr);
10589 access_addr =
10590 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10591
10592 if (range_type == NDS32_LOADSTORE_IMM)
10593 {
10594 struct elf_link_hash_entry *h = NULL;
10595 int indx;
35c08157 10596
1c8f6a4d 10597 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10598 {
1c8f6a4d
KLC		 10599 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10600 h = elf_sym_hashes (abfd)[indx];
35c08157 10601 }
35c08157 10602
1c8f6a4d
KLC		 10603 if ((access_addr < CONSERVATIVE_20BIT)
10604 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10605 {
1c8f6a4d
KLC		 10606 eliminate_sethi = 1;
10607 break;
35c08157 10608 }
1c8f6a4d
KLC		 10609
10610 /* This is avoid to relax symbol address which is fixed
10611 relocations. Ex: _stack. */
10612 if (h && bfd_is_abs_section (h->root.u.def.section))
10613 return FALSE;
10614 }
10615
10616 if (!load_store_relax)
10617 return FALSE;
10618
10619 /* Case for set gp register. */
10620 if (N32_RT5 (insn) == REG_GP)
10621 break;
10622
10623 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 10624 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 10625 {
10626 range_l = sdata_range[0][0];
10627 range_h = sdata_range[0][1];
10628 }
10629 else
10630 {
10631 range_l = sdata_range[1][0];
10632 range_h = sdata_range[1][1];
10633 }
10634 break;
10635
10636 case R_NDS32_GOT_HI20:
10637 access_addr =
10638 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10639
10640 /* If this symbol is not in .got, the return value will be -1.
10641 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10642 a negative offset is allowed. */
10643 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10644 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10645 eliminate_sethi = 1;
10646 break;
10647
10648 case R_NDS32_PLT_GOTREL_HI20:
10649 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10650 hi_irelfn, symtab_hdr);
10651
10652 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10653 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10654 eliminate_sethi = 1;
10655 break;
10656
10657 case R_NDS32_GOTOFF_HI20:
10658 access_addr =
10659 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10660
10661 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10662 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10663 eliminate_sethi = 1;
10664 break;
10665
10666 case R_NDS32_GOTPC_HI20:
10667 /* The access_addr must consider r_addend of hi_irel. */
10668 access_addr = sec->output_section->vma + sec->output_offset
10669 + irel->r_offset + hi_irelfn->r_addend;
10670
10671 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10672 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10673 eliminate_sethi = 1;
10674 break;
10675
10676 case R_NDS32_TLS_LE_HI20:
10677 access_addr =
10678 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10679 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10680 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10681 if ((range_type == NDS32_LOADSTORE_IMM)
10682 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10683 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10684 eliminate_sethi = 1;
10685 break;
10686
10687 default:
10688 return FALSE;
10689 }
10690
10691 /* Delete sethi instruction. */
10692 if (eliminate_sethi == 1
10693 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10694 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10695 {
10696 hi_irelfn->r_info =
10697 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10698 irel->r_info =
10699 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10700 *insn_len = 0;
10701 }
10702 return TRUE;
10703}
10704
10705/* Relax LO12 relocation for nds32_elf_relax_section. */
10706
10707static void
10708nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10709 asection *sec, Elf_Internal_Rela *irel,
10710 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10711 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10712{
10713 uint32_t insn;
10714 bfd_vma local_sda, laddr;
10715 unsigned long reloc;
10716 bfd_vma access_addr;
10717 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10718 Elf_Internal_Rela *irelfn = NULL, *irelend;
10719 struct elf_link_hash_entry *h = NULL;
10720 int indx;
10721
10722 /* For SDA base relative relaxation. */
10723 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10724 &local_sda, FALSE);
10725
10726 irelend = internal_relocs + sec->reloc_count;
10727 laddr = irel->r_offset;
10728 insn = bfd_getb32 (contents + laddr);
10729
10730 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10731 return;
10732
10733 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10734
10735 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10736 {
10737 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10738 h = elf_sym_hashes (abfd)[indx];
10739 }
10740
10741 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10742 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10743 {
10744 reloc = R_NDS32_20_RELA;
10745 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10746 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10747 bfd_putb32 (insn, contents + laddr);
10748 }
10749 /* This is avoid to relax symbol address which is fixed
10750 relocations. Ex: _stack. */
10751 else if (N32_OP6 (insn) == N32_OP6_ORI
10752 && h && bfd_is_abs_section (h->root.u.def.section))
10753 return;
10754 else
10755 {
10756 range_l = sdata_range[1][0];
10757 range_h = sdata_range[1][1];
10758 switch (ELF32_R_TYPE (irel->r_info))
10759 {
10760 case R_NDS32_LO12S0_RELA:
10761 reloc = R_NDS32_SDA19S0_RELA;
10762 break;
10763 case R_NDS32_LO12S1_RELA:
10764 reloc = R_NDS32_SDA18S1_RELA;
10765 break;
10766 case R_NDS32_LO12S2_RELA:
10767 reloc = R_NDS32_SDA17S2_RELA;
10768 break;
10769 case R_NDS32_LO12S2_DP_RELA:
10770 range_l = sdata_range[0][0];
10771 range_h = sdata_range[0][1];
10772 reloc = R_NDS32_SDA12S2_DP_RELA;
10773 break;
10774 case R_NDS32_LO12S2_SP_RELA:
10775 range_l = sdata_range[0][0];
10776 range_h = sdata_range[0][1];
10777 reloc = R_NDS32_SDA12S2_SP_RELA;
10778 break;
10779 default:
10780 return;
10781 }
10782
10783 /* There are range_h and range_l because linker has to promise
10784 all sections move cross one page together. */
10785 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10786 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10787 {
10788 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 10789 {
1c8f6a4d
KLC		 10790 /* Maybe we should add R_NDS32_INSN16 reloc type here
10791 or manually do some optimization. sethi can't be
10792 eliminated when updating $gp so the relative ori
10793 needs to be preserved. */
10794 return;
35c08157 10795 }
1c8f6a4d
KLC		 10796 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10797 &insn))
10798 return;
10799 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10800 bfd_putb32 (insn, contents + laddr);
10801
10802 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10803 R_NDS32_INSN16);
10804 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10805 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10806 irelfn->r_info =
10807 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10808
35c08157 10809 }
1c8f6a4d
KLC		 10810 }
10811 return;
10812}
35c08157 10813
1c8f6a4d
KLC		 10814/* Relax low part of PIC instruction pattern. */
10815
10816static void
10817nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10818 asection *sec, Elf_Internal_Rela *irel,
10819 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10820 Elf_Internal_Shdr *symtab_hdr)
10821{
10822 uint32_t insn;
10823 bfd_vma local_sda, laddr;
10824 bfd_signed_vma foff;
10825 unsigned long reloc;
10826
10827 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10828 &local_sda, FALSE);
10829 laddr = irel->r_offset;
10830 insn = bfd_getb32 (contents + laddr);
10831
10832 if (N32_OP6 (insn) != N32_OP6_ORI)
10833 return;
10834
10835 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10836 {
10837 foff = calculate_got_memory_address (abfd, link_info, irel,
10838 symtab_hdr) - local_sda;
10839 reloc = R_NDS32_GOT20;
10840 }
10841 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10842 {
10843 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10844 symtab_hdr) - local_sda;
10845 reloc = R_NDS32_PLT_GOTREL_LO20;
10846 }
10847 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10848 {
10849 foff = calculate_memory_address (abfd, irel, isymbuf,
10850 symtab_hdr) - local_sda;
10851 reloc = R_NDS32_GOTOFF;
10852 }
10853 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10854 {
10855 foff = local_sda - sec->output_section->vma + sec->output_offset
10856 + irel->r_offset + irel->r_addend;
10857 reloc = R_NDS32_GOTPC20;
10858 }
10859 else
10860 return;
10861
10862 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10863 {
10864 /* Turn into MOVI. */
10865 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10866 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10867 bfd_putb32 (insn, contents + laddr);
10868 }
10869}
10870
10871/* Relax low part of LE TLS instruction pattern. */
10872
10873static void
10874nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10875 Elf_Internal_Rela *irel,
10876 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10877 Elf_Internal_Shdr *symtab_hdr)
10878{
10879 uint32_t insn;
10880 bfd_vma laddr;
10881 bfd_signed_vma foff;
10882 unsigned long reloc;
10883
10884 laddr = irel->r_offset;
10885 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10886 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10887 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10888 insn = bfd_getb32 (contents + laddr);
10889
10890 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10891 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10892 {
10893 /* Pattern sethi-ori transform to movi. */
10894 reloc = R_NDS32_TLS_LE_20;
10895 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10896 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10897 bfd_putb32 (insn, contents + laddr);
10898 }
10899}
10900
10901/* Relax LE TLS calculate address instruction pattern. */
10902
10903static void
10904nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10905 asection *sec, Elf_Internal_Rela *irel,
10906 Elf_Internal_Rela *internal_relocs,
10907 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10908 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10909{
10910 /* Local TLS non-pic
07d6d2b8 10911 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
1c8f6a4d 10912 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
07d6d2b8 10913 add ra, ta, tp ; TLS_LE_ADD */
1c8f6a4d
KLC		 10914
10915 uint32_t insn;
10916 bfd_vma laddr;
10917 bfd_signed_vma foff;
10918 Elf_Internal_Rela *i1_irelfn, *irelend;
10919
10920 irelend = internal_relocs + sec->reloc_count;
10921 laddr = irel->r_offset;
10922 insn = bfd_getb32 (contents + laddr);
10923 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10924 R_NDS32_PTR_RESOLVED);
10925 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10926 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10927 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10928
10929 /* The range is +/-16k. */
10930 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10931 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10932 {
10933 /* Transform add to addi. */
10934 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10935 irel->r_info =
10936 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10937
10938 bfd_putb32 (insn, contents + laddr);
10939 if (i1_irelfn != irelend)
10940 {
10941 i1_irelfn->r_addend |= 1;
10942 *again = TRUE;
10943 }
10944 }
10945}
10946
10947/* Relax LE TLS load store instruction pattern. */
10948
10949static void
10950nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10951 asection *sec, Elf_Internal_Rela *irel,
10952 Elf_Internal_Rela *internal_relocs,
10953 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10954 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10955{
10956
10957 uint32_t insn;
10958 bfd_vma laddr;
10959 bfd_signed_vma foff;
10960 Elf_Internal_Rela *i1_irelfn, *irelend;
10961 int success = 0;
10962
10963 irelend = internal_relocs + sec->reloc_count;
10964 laddr = irel->r_offset;
10965 insn = bfd_getb32 (contents + laddr);
10966 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10967 R_NDS32_PTR_RESOLVED);
10968 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10969 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10970 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10971
10972 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10973 {
10974 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10975 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10976 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10977 /* The range is +/-16k. */
10978 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10979 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10980 {
10981 insn =
10982 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10983 irel->r_info =
10984 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10985 success = 1;
10986 break;
10987 }
1a0670f3 10988 /* Fall through. */
1c8f6a4d
KLC		 10989 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10990 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10991 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10992 /* The range is +/-32k. */
10993 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10994 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 10995 {
1c8f6a4d
KLC		 10996 insn =
10997 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10998 irel->r_info =
10999 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11000 success = 1;
11001 break;
11002 }
1a0670f3 11003 /* Fall through. */
1c8f6a4d
KLC		 11004 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11005 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11006 /* The range is +/-64k. */
11007 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11008 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11009 {
11010 insn =
11011 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11012 irel->r_info =
11013 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11014 success = 1;
11015 break;
11016 }
1a0670f3 11017 /* Fall through. */
1c8f6a4d
KLC		 11018 default:
11019 break;
11020 }
35c08157 11021
1c8f6a4d
KLC		 11022 if (success)
11023 {
11024 bfd_putb32 (insn, contents + laddr);
11025 if (i1_irelfn != irelend)
11026 {
11027 i1_irelfn->r_addend |= 1;
11028 *again = TRUE;
11029 }
11030 }
11031}
35c08157 11032
1c8f6a4d 11033/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11034
1c8f6a4d
KLC		 11035static bfd_boolean
11036nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11037 Elf_Internal_Rela *internal_relocs, int *insn_len,
11038 int *seq_len, bfd_byte *contents)
11039{
11040 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11041
1c8f6a4d 11042 irelend = internal_relocs + sec->reloc_count;
35c08157 11043
1c8f6a4d
KLC		 11044 re_irel =
11045 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11046 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11047
1c8f6a4d
KLC		 11048 if (re_irel == irelend)
11049 {
695344c0 11050 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11051 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 11052 return FALSE;
11053 }
35c08157 11054
1c8f6a4d
KLC		 11055 if (re_irel->r_addend != 1)
11056 return FALSE;
35c08157 11057
1c8f6a4d
KLC		 11058 /* Pointed target is relaxed and no longer needs this void *,
11059 change the type to NONE. */
11060 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11061
1c8f6a4d
KLC		 11062 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11063 not exist, it means only count 1 and remove it directly. */
11064 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11065 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11066 R_NDS32_PTR_COUNT);
11067 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11068 R_NDS32_PTR);
11069 if (count_irel != irelend)
11070 {
11071 if (--count_irel->r_addend > 0)
11072 return FALSE;
11073 }
11074
11075 if (ptr_irel != irelend)
11076 return FALSE;
11077
11078 /* If the PTR_COUNT is already 0, remove current instruction. */
11079 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11080 *insn_len = 0;
11081 return TRUE;
11082}
11083
11084/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11085
11086static void
11087nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11088 asection *sec, Elf_Internal_Rela *irel,
11089 Elf_Internal_Rela *internal_relocs,
11090 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11091 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11092{
11093 uint32_t insn;
11094 bfd_signed_vma foff;
11095 Elf_Internal_Rela *i1_irelfn, *irelend;
11096 bfd_vma local_sda, laddr;
11097
11098 irelend = internal_relocs + sec->reloc_count;
11099 laddr = irel->r_offset;
11100 insn = bfd_getb32 (contents + laddr);
11101
11102 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11103 we need additional space. It might be help if we could
11104 borrow some space from instructions to be eliminated
11105 such as sethi, ori, add. */
11106 if (insn & 0x80000000)
11107 return;
11108
11109 if (nds32_elf_check_dup_relocs
11110 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11111 return;
11112
11113 i1_irelfn =
11114 find_relocs_at_address (irel, internal_relocs, irelend,
11115 R_NDS32_PTR_RESOLVED);
11116
11117 /* FIXIT 090606
11118 The boundary should be reduced since the .plt section hasn't
11119 been created and the address of specific entry is still unknown
11120 Maybe the range between the function call and the begin of the
11121 .text section can be used to decide if the .plt is in the range
11122 of function call. */
11123
11124 if (N32_OP6 (insn) == N32_OP6_ALU1
11125 && N32_SUB5 (insn) == N32_ALU1_ADD)
11126 {
11127 /* Get the value of the symbol referred to by the reloc. */
11128 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11129 &local_sda, FALSE);
11130 foff = (bfd_signed_vma) (calculate_plt_memory_address
11131 (abfd, link_info, isymbuf, irel,
11132 symtab_hdr) - local_sda);
11133 /* This condition only happened when symbol is undefined. */
11134 if (foff == 0)
11135 return;
11136
11137 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11138 return;
11139 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11140 R_NDS32_PLT_GOTREL_LO19);
11141 /* addi.gp */
4ec521f2 11142 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11143 }
11144 else if (N32_OP6 (insn) == N32_OP6_JREG
11145 && N32_SUB5 (insn) == N32_JREG_JRAL)
11146 {
11147 /* Get the value of the symbol referred to by the reloc. */
11148 foff =
11149 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11150 /* This condition only happened when symbol is undefined. */
11151 if (foff == 0)
11152 return;
11153 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11154 return;
11155 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11156 insn = INSN_JAL;
11157 }
11158 else
11159 return;
11160
11161 bfd_putb32 (insn, contents + laddr);
11162 if (i1_irelfn != irelend)
11163 {
11164 i1_irelfn->r_addend |= 1;
11165 *again = TRUE;
11166 }
11167}
11168
11169/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11170
11171static void
11172nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11173 asection *sec, Elf_Internal_Rela *irel,
11174 Elf_Internal_Rela *internal_relocs,
11175 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11176 bfd_boolean *again)
11177{
11178 uint32_t insn;
11179 bfd_signed_vma foff;
11180 Elf_Internal_Rela *i1_irelfn, *irelend;
11181 bfd_vma local_sda, laddr;
11182
11183 irelend = internal_relocs + sec->reloc_count;
11184 laddr = irel->r_offset;
11185 insn = bfd_getb32 (contents + laddr);
11186 if (insn & 0x80000000)
11187 return;
11188
11189 if (nds32_elf_check_dup_relocs
11190 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11191 return;
11192
11193 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11194 R_NDS32_PTR_RESOLVED);
11195
11196 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11197 &local_sda, FALSE);
11198 foff = calculate_got_memory_address (abfd, link_info, irel,
11199 symtab_hdr) - local_sda;
11200
11201 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11202 {
11203 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11204 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11205 irel->r_info =
11206 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11207 bfd_putb32 (insn, contents + laddr);
11208 if (i1_irelfn != irelend)
11209 {
11210 i1_irelfn->r_addend |= 1;
11211 *again = TRUE;
11212 }
11213 }
11214}
11215
11216/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11217
11218static void
11219nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11220 asection *sec, Elf_Internal_Rela *irel,
11221 Elf_Internal_Rela *internal_relocs,
11222 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11223 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11224{
11225 int opc_insn_gotoff;
11226 uint32_t insn;
11227 bfd_signed_vma foff;
11228 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11229 bfd_vma local_sda, laddr;
11230
11231 irelend = internal_relocs + sec->reloc_count;
11232 laddr = irel->r_offset;
11233 insn = bfd_getb32 (contents + laddr);
11234
11235 if (insn & 0x80000000)
11236 return;
11237
11238 if (nds32_elf_check_dup_relocs
11239 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11240 return;
11241
11242 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11243 R_NDS32_PTR_RESOLVED);
11244 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11245 &local_sda, FALSE);
11246 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11247 foff = foff - local_sda;
11248
11249 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11250 return;
11251
11252 /* Concatenate opcode and sub-opcode for switch case.
11253 It may be MEM or ALU1. */
11254 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11255 switch (opc_insn_gotoff)
11256 {
11257 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11258 /* 4-byte aligned. */
11259 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11260 irel->r_info =
11261 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11262 break;
11263 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11264 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11265 irel->r_info =
11266 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11267 break;
11268 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11269 /* 2-byte aligned. */
11270 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11271 irel->r_info =
11272 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11273 break;
11274 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
4ec521f2 11275 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
1c8f6a4d
KLC		 11276 irel->r_info =
11277 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11278 break;
11279 case (N32_OP6_MEM << 8) | N32_MEM_SH:
4ec521f2 11280 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11281 irel->r_info =
11282 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11283 break;
11284 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11285 /* 1-byte aligned. */
11286 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11287 irel->r_info =
11288 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11289 break;
11290 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
4ec521f2 11291 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11292 irel->r_info =
11293 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11294 break;
11295 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11296 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11297 irel->r_info =
11298 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11299 break;
11300 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
4ec521f2 11301 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11302 irel->r_info =
11303 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11304 break;
11305 default:
11306 return;
11307 }
11308
11309 bfd_putb32 (insn, contents + laddr);
11310 if (i1_irelfn != irelend)
11311 {
11312 i1_irelfn->r_addend |= 1;
11313 *again = TRUE;
11314 }
11315 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11316 R_NDS32_INSN16)) != irelend)
11317 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11318
11319}
11320
11321static bfd_boolean
11322nds32_relax_adjust_label (bfd *abfd, asection *sec,
11323 Elf_Internal_Rela *internal_relocs,
11324 bfd_byte *contents,
11325 nds32_elf_blank_t **relax_blank_list,
11326 int optimize, int opt_size)
11327{
11328 /* This code block is used to adjust 4-byte alignment by relax a pair
11329 of instruction a time.
11330
11331 It recognizes three types of relocations.
de194d85 11332 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11333 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11334 3. is_16bit_NOP () - remove a 16-bit instruction. */
11335
de194d85
YC		 11336 /* TODO: It seems currently implementation only support 4-byte alignment.
11337 We should handle any-alignment. */
1c8f6a4d
KLC		 11338
11339 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11340 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11341 Elf_Internal_Rela rel_temp;
11342 Elf_Internal_Rela *irelend;
11343 bfd_vma address;
11344 uint16_t insn16;
11345
11346 /* Checking for branch relaxation relies on the relocations to
11347 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11348 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11349 sizeof (Elf_Internal_Rela), compar_reloc);
11350
11351 irelend = internal_relocs + sec->reloc_count;
11352
11353 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11354 /* FIXME: Can we generate the right order in assembler?
11355 So we don't have to swapping them here. */
11356
11357 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11358 label_rel < irelend; label_rel++)
11359 {
11360 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11361 continue;
11362
11363 /* Find the first reloc has the same offset with label_rel. */
11364 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11365 insn_rel++;
11366
11367 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11368 insn_rel++)
11369 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11370 address. */
11371 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11372 break;
11373
11374 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11375 && insn_rel < label_rel)
11376 {
11377 /* Swap the two reloc if the R_NDS32_INSN16 is
11378 before R_NDS32_LABEL. */
11379 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11380 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11381 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11382 }
11383 }
11384
11385 label_rel = NULL;
11386 insn_rel = NULL;
11387 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11388 or higher, remove other R_NDS32_LABEL with lower alignment.
11389 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11390 then the R_NDS32_LABEL sequence is broke. */
11391 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11392 {
11393 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11394 {
11395 if (label_rel == NULL)
11396 {
11397 if (tmp_rel->r_addend < 2)
11398 label_rel = tmp_rel;
11399 continue;
11400 }
11401 else if (tmp_rel->r_addend > 1)
11402 {
11403 /* Remove all LABEL relocation from label_rel to tmp_rel
11404 including relocations with same offset as tmp_rel. */
11405 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11406 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11407 {
11408 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11409 && tmp2_rel->r_addend < 2)
11410 tmp2_rel->r_info =
11411 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11412 R_NDS32_NONE);
11413 }
11414 label_rel = NULL;
11415 }
11416 }
11417 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11418 {
11419 /* A new INSN16 which can be converted, so clear label_rel. */
11420 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11421 irelend, &insn16)
11422 || is_16bit_NOP (abfd, sec, tmp_rel))
11423 label_rel = NULL;
11424 }
11425 }
11426
11427 label_rel = NULL;
11428 insn_rel = NULL;
11429 /* Optimized for speed and nothing has not been relaxed.
11430 It's time to align labels.
11431 We may convert a 16-bit instruction right before a label to
11432 32-bit, in order to align the label if necessary
11433 all reloc entries has been sorted by r_offset. */
11434 for (irel = internal_relocs; irel < irelend; irel++)
11435 {
11436 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11437 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11438 continue;
11439
11440 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11441 {
11442 /* A new INSN16 found, resize the old one. */
11443 if (is_convert_32_to_16
11444 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11445 || is_16bit_NOP (abfd, sec, irel))
11446 {
11447 if (insn_rel)
11448 {
11449 /* Previous INSN16 reloc exists, reduce its
11450 size to 16-bit. */
11451 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11452 irelend, &insn16))
35c08157 11453 {
1c8f6a4d
KLC		 11454 nds32_elf_write_16 (abfd, contents, insn_rel,
11455 internal_relocs, irelend, insn16);
11456
11457 if (!insert_nds32_elf_blank_recalc_total
11458 (relax_blank_list, insn_rel->r_offset + 2, 2))
11459 return FALSE;
11460 }
11461 else if (is_16bit_NOP (abfd, sec, insn_rel))
11462 {
11463 if (!insert_nds32_elf_blank_recalc_total
11464 (relax_blank_list, insn_rel->r_offset, 2))
11465 return FALSE;
11466 }
11467 insn_rel->r_info =
11468 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11469 }
11470 /* Save the new one for later use. */
11471 insn_rel = irel;
11472 }
11473 else
11474 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11475 R_NDS32_NONE);
11476 }
11477 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11478 {
11479 /* Search for label. */
11480 int force_relax = 0;
11481
11482 /* Label on 16-bit instruction or optimization
11483 needless, just reset this reloc. */
11484 insn16 = bfd_getb16 (contents + irel->r_offset);
11485 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11486 {
11487 irel->r_info =
11488 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11489 continue;
11490 }
11491
11492 address =
11493 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11494 irel->r_offset, 1);
11495
11496 if (!insn_rel)
11497 {
11498 /* Check if there is case which can not be aligned. */
11499 if (irel->r_addend == 2 && address & 0x2)
11500 return FALSE;
11501 continue;
11502 }
11503
11504 /* Try to align this label. */
11505
11506 if ((irel->r_addend & 0x1f) < 2)
11507 {
11508 /* Check if there is a INSN16 at the same address.
11509 Label_rel always seats before insn_rel after
11510 our sort. */
11511
11512 /* Search for INSN16 at LABEL location. If INSN16 is at
11513 same location and this LABEL alignment is lower than 2,
11514 the INSN16 can be converted to 2-byte. */
11515 for (tmp_rel = irel;
11516 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11517 tmp_rel++)
11518 {
11519 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11520 && (is_convert_32_to_16
11521 (abfd, sec, tmp_rel, internal_relocs,
11522 irelend, &insn16)
11523 || is_16bit_NOP (abfd, sec, tmp_rel)))
11524 {
11525 force_relax = 1;
11526 break;
11527 }
11528 }
11529 }
11530
11531 if (force_relax || irel->r_addend == 1 || address & 0x2)
11532 {
11533 /* Label not aligned. */
11534 /* Previous reloc exists, reduce its size to 16-bit. */
11535 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11536 internal_relocs, irelend, &insn16))
11537 {
11538 nds32_elf_write_16 (abfd, contents, insn_rel,
11539 internal_relocs, irelend, insn16);
11540
11541 if (!insert_nds32_elf_blank_recalc_total
11542 (relax_blank_list, insn_rel->r_offset + 2, 2))
11543 return FALSE;
11544 }
11545 else if (is_16bit_NOP (abfd, sec, insn_rel))
11546 {
11547 if (!insert_nds32_elf_blank_recalc_total
11548 (relax_blank_list, insn_rel->r_offset, 2))
11549 return FALSE;
11550 }
11551
11552 }
11553 /* INSN16 reloc is used. */
11554 insn_rel = NULL;
11555 }
11556 }
11557
11558 address =
11559 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11560 if (insn_rel && (address & 0x2 || opt_size))
11561 {
11562 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11563 irelend, &insn16))
11564 {
11565 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11566 irelend, insn16);
11567 if (!insert_nds32_elf_blank_recalc_total
11568 (relax_blank_list, insn_rel->r_offset + 2, 2))
11569 return FALSE;
11570 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11571 R_NDS32_NONE);
11572 }
11573 else if (is_16bit_NOP (abfd, sec, insn_rel))
11574 {
11575 if (!insert_nds32_elf_blank_recalc_total
11576 (relax_blank_list, insn_rel->r_offset, 2))
11577 return FALSE;
11578 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11579 R_NDS32_NONE);
11580 }
11581 }
11582 insn_rel = NULL;
11583 return TRUE;
11584}
11585
11586/* Pick relaxation round. */
11587
11588static int
11589nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11590 struct elf_nds32_link_hash_table *table,
11591 struct bfd_link_info *link_info)
11592{
18393a2e
KLC		 11593 static asection *final_sec, *first_sec = NULL;
11594 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11595 static bfd_boolean set = FALSE;
11596 static bfd_boolean first = TRUE;
11597 int round_table[] = {
11598 NDS32_RELAX_NORMAL_ROUND,
11599 NDS32_RELAX_JUMP_IFC_ROUND,
11600 NDS32_RELAX_EX9_BUILD_ROUND,
11601 NDS32_RELAX_EX9_REPLACE_ROUND,
11602 };
11603 static int pass = 0;
11604 static int relax_round;
11605
18393a2e
KLC		 11606 /* The new round. */
11607 if (init && first_sec == sec)
11608 {
11609 set = TRUE;
11610 normal_again = FALSE;
11611 }
11612
1c8f6a4d
KLC		 11613 if (first)
11614 {
11615 /* Run an empty run to get the final section. */
11616 relax_round = NDS32_RELAX_EMPTY_ROUND;
11617
11618 /* It has to enter relax again because we can
11619 not make sure what the final turn is. */
11620 *again = TRUE;
18393a2e 11621
1c8f6a4d 11622 first = FALSE;
18393a2e 11623 first_sec = sec;
1c8f6a4d
KLC		 11624 }
11625
18393a2e 11626 if (!set)
1c8f6a4d 11627 {
18393a2e 11628 /* Not reenter yet. */
1c8f6a4d
KLC		 11629 final_sec = sec;
11630 return relax_round;
11631 }
11632
1c8f6a4d
KLC		 11633 relax_round = round_table[pass];
11634
18393a2e
KLC		 11635 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11636 normal_again = TRUE;
11637
1c8f6a4d
KLC		 11638 if (!init && final_sec == sec)
11639 {
11640 switch (relax_round)
11641 {
11642 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11643 if (!normal_again)
1c8f6a4d
KLC		 11644 {
11645 /* Normal relaxation done. */
11646 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11647 {
11648 pass++;
11649 *again = TRUE;
11650 }
11651 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11652 {
11653 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11654 *again = TRUE;
11655 }
11656 else if (table->ex9_import_file)
11657 {
11658 /* Import ex9 table. */
11659 if (table->update_ex9_table)
11660 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11661 else
11662 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11663 nds32_elf_ex9_import_table (link_info);
11664 *again = TRUE;
11665 }
11666 }
11667 break;
11668 case NDS32_RELAX_JUMP_IFC_ROUND:
11669 if (!nds32_elf_ifc_finish (link_info))
38f14ab8 11670 _bfd_error_handler (_("error: jump IFC fail"));
1c8f6a4d
KLC		 11671 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11672 {
11673 pass++;
11674 *again = TRUE;
11675 }
11676 break;
11677 case NDS32_RELAX_EX9_BUILD_ROUND:
11678 nds32_elf_ex9_finish (link_info);
11679 pass++;
11680 *again = TRUE;
11681 break;
11682 case NDS32_RELAX_EX9_REPLACE_ROUND:
11683 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11684 {
11685 /* Do jump IFC optimization again. */
11686 if (!nds32_elf_ifc_finish (link_info))
38f14ab8 11687 _bfd_error_handler (_("error: jump IFC fail"));
1c8f6a4d
KLC		 11688 }
11689 break;
11690 default:
11691 break;
11692 }
11693 }
11694
11695 return relax_round;
11696}
11697
11698static bfd_boolean
11699nds32_elf_relax_section (bfd *abfd, asection *sec,
11700 struct bfd_link_info *link_info, bfd_boolean *again)
11701{
11702 nds32_elf_blank_t *relax_blank_list = NULL;
11703 Elf_Internal_Shdr *symtab_hdr;
11704 Elf_Internal_Rela *internal_relocs;
11705 Elf_Internal_Rela *irel;
11706 Elf_Internal_Rela *irelend;
11707 Elf_Internal_Sym *isymbuf = NULL;
11708 bfd_byte *contents = NULL;
11709 bfd_boolean result = TRUE;
11710 int optimize = 0;
11711 int opt_size = 0;
11712 uint32_t insn;
11713 uint16_t insn16;
11714
11715 /* Target dependnet option. */
11716 struct elf_nds32_link_hash_table *table;
11717 int load_store_relax;
11718 int relax_round;
11719
11720 relax_blank_list = NULL;
11721
11722 *again = FALSE;
11723
11724 /* Nothing to do for
11725 * relocatable link or
11726 * non-relocatable section or
11727 * non-code section or
11728 * empty content or
11729 * no reloc entry. */
0e1862bb 11730 if (bfd_link_relocatable (link_info)
1c8f6a4d 11731 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 11732 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d
KLC		 11733 || (sec->flags & SEC_CODE) == 0
11734 || sec->size == 0)
11735 return TRUE;
11736
11737 /* 09.12.11 Workaround. */
11738 /* We have to adjust align for R_NDS32_LABEL if needed.
11739 The adjust approach only can fix 2-byte align once. */
11740 if (sec->alignment_power > 2)
11741 return TRUE;
11742
11743 /* The optimization type to do. */
11744
11745 table = nds32_elf_hash_table (link_info);
11746 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11747 switch (relax_round)
11748 {
11749 case NDS32_RELAX_JUMP_IFC_ROUND:
11750 /* Here is the entrance of ifc jump relaxation. */
11751 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11752 return FALSE;
11753 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11754 return TRUE;
11755
11756 case NDS32_RELAX_EX9_BUILD_ROUND:
11757 /* Here is the entrance of ex9 relaxation. There are two pass of
11758 ex9 relaxation. The one is to traverse all instructions and build
11759 the hash table. The other one is to compare instructions and replace
11760 it by ex9.it. */
11761 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11762 return FALSE;
11763 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11764 return TRUE;
11765
11766 case NDS32_RELAX_EX9_REPLACE_ROUND:
11767 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11768 return FALSE;
11769 return TRUE;
11770
11771 case NDS32_RELAX_EMPTY_ROUND:
11772 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11773 return TRUE;
11774
11775 case NDS32_RELAX_NORMAL_ROUND:
11776 default:
11777 if (sec->reloc_count == 0)
11778 return TRUE;
11779 break;
11780 }
11781
11782 /* The begining of general relaxation. */
11783
11784 if (is_SDA_BASE_set == 0)
11785 {
11786 bfd_vma gp;
11787 is_SDA_BASE_set = 1;
11788 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11789 &gp, FALSE);
11790 relax_range_measurement (abfd);
11791 }
11792
11793 if (is_ITB_BASE_set == 0)
11794 {
11795 /* Set the _ITB_BASE_. */
11796 if (!nds32_elf_ex9_itb_base (link_info))
11797 {
38f14ab8
AM		 11798 _bfd_error_handler (_("%pB: error: cannot set %s"),
11799 abfd, "_ITB_BASE_");
1c8f6a4d
KLC		 11800 bfd_set_error (bfd_error_bad_value);
11801 }
11802 }
11803
11804 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11805 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11806 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11807 TRUE /* keep_memory */);
11808 if (internal_relocs == NULL)
11809 goto error_return;
11810
11811 irelend = internal_relocs + sec->reloc_count;
11812 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11813 irelend, R_NDS32_RELAX_ENTRY);
11814
11815 if (irel == irelend)
11816 return TRUE;
11817
11818 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11819 {
11820 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 11821 {
11822 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11823 return TRUE;
11824 }
1c8f6a4d
KLC		 11825
11826 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11827 optimize = 1;
11828
11829 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11830 opt_size = 1;
11831 }
11832
11833 load_store_relax = table->load_store_relax;
11834
11835 /* Get symbol table and section content. */
0c4bd9d9 11836 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 11837 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11838 goto error_return;
11839
11840 /* Do relax loop only when finalize is not done.
11841 Take care of relaxable relocs except INSN16. */
11842 for (irel = internal_relocs; irel < irelend; irel++)
11843 {
11844 int seq_len; /* Original length of instruction sequence. */
11845 int insn_len = 0; /* Final length of instruction sequence. */
11846 bfd_boolean removed;
11847
11848 insn = 0;
11849 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11850 && (irel->r_addend & 0x1f) >= 2)
11851 optimize = 1;
11852
11853 /* Relocation Types
11854 R_NDS32_LONGCALL1 53
11855 R_NDS32_LONGCALL2 54
11856 R_NDS32_LONGCALL3 55
11857 R_NDS32_LONGJUMP1 56
11858 R_NDS32_LONGJUMP2 57
11859 R_NDS32_LONGJUMP3 58
11860 R_NDS32_LOADSTORE 59 */
11861 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11862 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11863 seq_len = GET_SEQ_LEN (irel->r_addend);
11864
11865 /* Relocation Types
11866 R_NDS32_LONGCALL4 107
11867 R_NDS32_LONGCALL5 108
11868 R_NDS32_LONGCALL6 109
11869 R_NDS32_LONGJUMP4 110
11870 R_NDS32_LONGJUMP5 111
11871 R_NDS32_LONGJUMP6 112
11872 R_NDS32_LONGJUMP7 113 */
11873 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11874 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11875 seq_len = 4;
11876
11877 /* Relocation Types
11878 R_NDS32_LO12S0_RELA 30
11879 R_NDS32_LO12S1_RELA 29
11880 R_NDS32_LO12S2_RELA 28
11881 R_NDS32_LO12S2_SP_RELA 71
11882 R_NDS32_LO12S2_DP_RELA 70
11883 R_NDS32_GOT_LO12 46
11884 R_NDS32_GOTOFF_LO12 50
11885 R_NDS32_PLTREL_LO12 65
11886 R_NDS32_PLT_GOTREL_LO12 67
11887 R_NDS32_17IFC_PCREL_RELA 96
11888 R_NDS32_GOT_SUFF 193
11889 R_NDS32_GOTOFF_SUFF 194
11890 R_NDS32_PLT_GOT_SUFF 195
11891 R_NDS32_MULCALL_SUFF 196
11892 R_NDS32_PTR 197 */
11893 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11894 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11895 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11896 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11897 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11898 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11899 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11900 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11901 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11902 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11903 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11904 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11905 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11906 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11907 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11908 seq_len = 0;
11909 else
11910 continue;
11911
11912 insn_len = seq_len;
11913 removed = FALSE;
11914
11915 switch (ELF32_R_TYPE (irel->r_info))
11916 {
11917 case R_NDS32_LONGCALL1:
11918 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11919 &insn_len, contents, isymbuf,
11920 symtab_hdr);
11921 break;
11922 case R_NDS32_LONGCALL2:
11923 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11924 &insn_len, contents, isymbuf,
11925 symtab_hdr);
11926 break;
11927 case R_NDS32_LONGCALL3:
11928 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11929 &insn_len, contents, isymbuf,
11930 symtab_hdr);
11931 break;
11932 case R_NDS32_LONGJUMP1:
11933 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11934 &insn_len, contents, isymbuf,
11935 symtab_hdr);
11936 break;
11937 case R_NDS32_LONGJUMP2:
11938 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11939 &insn_len, contents, isymbuf,
11940 symtab_hdr);
11941 break;
11942 case R_NDS32_LONGJUMP3:
11943 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11944 &insn_len, contents, isymbuf,
11945 symtab_hdr);
11946 break;
11947 case R_NDS32_LONGCALL4:
11948 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11949 &insn_len, contents, isymbuf,
11950 symtab_hdr);
11951 break;
11952 case R_NDS32_LONGCALL5:
11953 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11954 &insn_len, contents, isymbuf,
11955 symtab_hdr);
11956 break;
11957 case R_NDS32_LONGCALL6:
11958 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11959 &insn_len, contents, isymbuf,
11960 symtab_hdr);
11961 break;
11962 case R_NDS32_LONGJUMP4:
11963 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11964 &insn_len, contents, isymbuf,
11965 symtab_hdr);
11966 break;
11967 case R_NDS32_LONGJUMP5:
11968 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11969 &insn_len, &seq_len, contents,
11970 isymbuf, symtab_hdr);
11971 break;
11972 case R_NDS32_LONGJUMP6:
11973 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11974 &insn_len, &seq_len, contents,
11975 isymbuf, symtab_hdr);
11976 break;
11977 case R_NDS32_LONGJUMP7:
11978 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11979 &insn_len, &seq_len, contents,
11980 isymbuf, symtab_hdr);
11981 break;
11982 case R_NDS32_LOADSTORE:
11983 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11984 internal_relocs, &insn_len,
11985 contents, isymbuf, symtab_hdr,
11986 load_store_relax);
11987 break;
11988 case R_NDS32_LO12S0_RELA:
11989 case R_NDS32_LO12S1_RELA:
11990 case R_NDS32_LO12S2_DP_RELA:
11991 case R_NDS32_LO12S2_SP_RELA:
11992 case R_NDS32_LO12S2_RELA:
11993 /* Relax for low part. */
11994 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11995 contents, isymbuf, symtab_hdr);
11996
11997 /* It is impossible to delete blank, so just continue. */
11998 continue;
11999 case R_NDS32_GOT_LO12:
12000 case R_NDS32_GOTOFF_LO12:
12001 case R_NDS32_PLTREL_LO12:
12002 case R_NDS32_PLT_GOTREL_LO12:
12003 case R_NDS32_GOTPC_LO12:
12004 /* Relax for PIC gp-relative low part. */
12005 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12006 isymbuf, symtab_hdr);
35c08157 12007
1c8f6a4d
KLC		 12008 /* It is impossible to delete blank, so just continue. */
12009 continue;
12010 case R_NDS32_TLS_LE_LO12:
12011 /* Relax for LE TLS low part. */
12012 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12013 isymbuf, symtab_hdr);
35c08157 12014
1c8f6a4d
KLC		 12015 /* It is impossible to delete blank, so just continue. */
12016 continue;
12017 case R_NDS32_TLS_LE_ADD:
12018 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12019 contents, isymbuf, symtab_hdr, again);
12020 /* It is impossible to delete blank, so just continue. */
12021 continue;
12022 case R_NDS32_TLS_LE_LS:
12023 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12024 contents, isymbuf, symtab_hdr, again);
12025 continue;
12026 case R_NDS32_PTR:
12027 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12028 &insn_len, &seq_len, contents);
12029 break;
12030 case R_NDS32_PLT_GOT_SUFF:
12031 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12032 internal_relocs, contents,
12033 isymbuf, symtab_hdr, again);
12034 /* It is impossible to delete blank, so just continue. */
12035 continue;
12036 case R_NDS32_GOT_SUFF:
12037 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12038 internal_relocs, contents,
12039 symtab_hdr, again);
12040 /* It is impossible to delete blank, so just continue. */
12041 continue;
12042 case R_NDS32_GOTOFF_SUFF:
12043 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12044 internal_relocs, contents,
12045 isymbuf, symtab_hdr, again);
12046 /* It is impossible to delete blank, so just continue. */
12047 continue;
12048 default:
12049 continue;
12050
12051 }
12052 if (removed && seq_len - insn_len > 0)
12053 {
12054 if (!insert_nds32_elf_blank
12055 (&relax_blank_list, irel->r_offset + insn_len,
12056 seq_len - insn_len))
12057 goto error_return;
12058 *again = TRUE;
35c08157 12059 }
1c8f6a4d
KLC		 12060 }
12061
12062 calc_nds32_blank_total (relax_blank_list);
12063
12064 if (table->relax_fp_as_gp)
12065 {
12066 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12067 irelend, isymbuf))
12068 goto error_return;
35c08157 12069
535b785f 12070 if (!*again)
35c08157 12071 {
1c8f6a4d
KLC		 12072 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12073 irelend))
12074 goto error_return;
35c08157
KLC		 12075 }
12076 }
1c8f6a4d
KLC		 12077
12078 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12079
535b785f 12080 if (!*again)
1c8f6a4d
KLC		 12081 {
12082 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12083 &relax_blank_list, optimize, opt_size))
12084 goto error_return;
12085 }
12086
12087 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12088 If object file is assembled with flag '-Os',
12089 the we don't adjust jump-destination on 4-byte boundary. */
12090
12091 if (relax_blank_list)
12092 {
12093 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12094 relax_blank_list = NULL;
12095 }
12096
535b785f 12097 if (!*again)
35c08157
KLC		 12098 {
12099 /* Closing the section, so we don't relax it anymore. */
12100 bfd_vma sec_size_align;
12101 Elf_Internal_Rela *tmp_rel;
12102
12103 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12104 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12105 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12106 if ((sec_size_align - sec->size) & 0x2)
12107 {
12108 insn16 = NDS32_NOP16;
12109 bfd_putb16 (insn16, contents + sec->size);
12110 sec->size += 2;
12111 }
12112
12113 while (sec_size_align != sec->size)
12114 {
12115 insn = NDS32_NOP32;
12116 bfd_putb32 (insn, contents + sec->size);
12117 sec->size += 4;
12118 }
12119
1c8f6a4d
KLC		 12120 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12121 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12122 if (tmp_rel != irelend)
12123 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12124
12125 clean_nds32_elf_blank ();
12126 }
12127
12128finish:
12129 if (internal_relocs != NULL
12130 && elf_section_data (sec)->relocs != internal_relocs)
12131 free (internal_relocs);
12132
12133 if (contents != NULL
12134 && elf_section_data (sec)->this_hdr.contents != contents)
12135 free (contents);
12136
12137 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12138 free (isymbuf);
12139
12140 return result;
12141
12142error_return:
12143 result = FALSE;
12144 goto finish;
12145}
12146
12147static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12148{
12149 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12150 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12151 {NULL, 0, 0, 0, 0}
12152};
12153
12154static bfd_boolean
12155nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12156 struct bfd_link_info *info,
12157 void *finfo ATTRIBUTE_UNUSED,
12158 bfd_boolean (*func) (void *, const char *,
12159 Elf_Internal_Sym *,
12160 asection *,
12161 struct elf_link_hash_entry *)
12162 ATTRIBUTE_UNUSED)
12163{
12164 FILE *sym_ld_script = NULL;
12165 struct elf_nds32_link_hash_table *table;
12166
12167 table = nds32_elf_hash_table (info);
12168 sym_ld_script = table->sym_ld_script;
12169
12170 if (check_start_export_sym)
12171 fprintf (sym_ld_script, "}\n");
12172
12173 return TRUE;
12174}
12175
12176static enum elf_reloc_type_class
12177nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12178 const asection *rel_sec ATTRIBUTE_UNUSED,
12179 const Elf_Internal_Rela *rela)
12180{
12181 switch ((int) ELF32_R_TYPE (rela->r_info))
12182 {
12183 case R_NDS32_RELATIVE:
12184 return reloc_class_relative;
12185 case R_NDS32_JMP_SLOT:
12186 return reloc_class_plt;
12187 case R_NDS32_COPY:
12188 return reloc_class_copy;
12189 default:
12190 return reloc_class_normal;
12191 }
12192}
12193
12194/* Put target dependent option into info hash table. */
12195void
12196bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12197 int relax_fp_as_gp,
12198 int eliminate_gc_relocs,
12199 FILE * sym_ld_script, int load_store_relax,
12200 int target_optimize, int relax_status,
12201 int relax_round, FILE * ex9_export_file,
12202 FILE * ex9_import_file,
12203 int update_ex9_table, int ex9_limit,
12204 bfd_boolean ex9_loop_aware,
12205 bfd_boolean ifc_loop_aware)
12206{
12207 struct elf_nds32_link_hash_table *table;
12208
12209 table = nds32_elf_hash_table (link_info);
12210 if (table == NULL)
12211 return;
12212
12213 table->relax_fp_as_gp = relax_fp_as_gp;
12214 table->eliminate_gc_relocs = eliminate_gc_relocs;
12215 table->sym_ld_script = sym_ld_script;
12216 table ->load_store_relax = load_store_relax;
12217 table->target_optimize = target_optimize;
12218 table->relax_status = relax_status;
12219 table->relax_round = relax_round;
12220 table->ex9_export_file = ex9_export_file;
12221 table->ex9_import_file = ex9_import_file;
12222 table->update_ex9_table = update_ex9_table;
12223 table->ex9_limit = ex9_limit;
12224 table->ex9_loop_aware = ex9_loop_aware;
12225 table->ifc_loop_aware = ifc_loop_aware;
12226}
12227\f
12228/* These functions and data-structures are used for fp-as-gp
12229 optimization. */
12230
12231#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12232/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12233 the read-only section and read-write section. */
12234#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12235
12236/* An nds32_fag represent a gp-relative access.
12237 We find best fp-base by using a sliding window
12238 to find a base address which can cover most gp-access. */
12239struct nds32_fag
12240{
12241 struct nds32_fag *next; /* NULL-teminated linked list. */
12242 bfd_vma addr; /* The address of this fag. */
12243 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12244 It is used for applying FP7U2_FLAG. */
12245 int count; /* How many times this address is referred.
12246 There should be exactly `count' relocations
12247 in relas. */
12248 int relas_capcity; /* The buffer size of relas.
12249 We use an array instead of linked-list,
12250 and realloc is used to adjust buffer size. */
12251};
12252
12253static void
12254nds32_fag_init (struct nds32_fag *head)
12255{
12256 memset (head, 0, sizeof (struct nds32_fag));
12257}
12258
12259static void
12260nds32_fag_verify (struct nds32_fag *head)
12261{
12262 struct nds32_fag *iter;
12263 struct nds32_fag *prev;
12264
12265 prev = NULL;
12266 iter = head->next;
12267 while (iter)
12268 {
12269 if (prev && prev->addr >= iter->addr)
12270 puts ("Bug in fp-as-gp insertion.");
12271 prev = iter;
12272 iter = iter->next;
12273 }
12274}
12275
12276/* Insert a fag in ascending order.
12277 If a fag of the same address already exists,
12278 they are chained by relas array. */
12279
12280static void
12281nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12282 Elf_Internal_Rela * rel)
12283{
12284 struct nds32_fag *iter;
12285 struct nds32_fag *new_fag;
12286 const int INIT_RELAS_CAP = 4;
12287
12288 for (iter = head;
12289 iter->next && iter->next->addr <= addr;
12290 iter = iter->next)
12291 /* Find somewhere to insert. */ ;
12292
12293 /* `iter' will be equal to `head' if the list is empty. */
12294 if (iter != head && iter->addr == addr)
12295 {
12296 /* The address exists in the list.
12297 Insert `rel' into relocation list, relas. */
12298
12299 /* Check whether relas is big enough. */
12300 if (iter->count >= iter->relas_capcity)
12301 {
12302 iter->relas_capcity *= 2;
12303 iter->relas = bfd_realloc
12304 (iter->relas, iter->relas_capcity * sizeof (void *));
12305 }
12306 iter->relas[iter->count++] = rel;
12307 return;
12308 }
12309
12310 /* This is a new address. Create a fag node for it. */
12311 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12312 memset (new_fag, 0, sizeof (*new_fag));
12313 new_fag->addr = addr;
12314 new_fag->count = 1;
12315 new_fag->next = iter->next;
12316 new_fag->relas_capcity = INIT_RELAS_CAP;
12317 new_fag->relas = (Elf_Internal_Rela **)
12318 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12319 new_fag->relas[0] = rel;
12320 iter->next = new_fag;
12321
12322 nds32_fag_verify (head);
12323}
12324
12325static void
12326nds32_fag_free_list (struct nds32_fag *head)
12327{
12328 struct nds32_fag *iter;
12329
12330 iter = head->next;
12331 while (iter)
12332 {
12333 struct nds32_fag *tmp = iter;
12334 iter = iter->next;
12335 free (tmp->relas);
12336 tmp->relas = NULL;
12337 free (tmp);
12338 }
12339}
12340
35c08157
KLC		 12341/* Find the best fp-base address.
12342 The relocation associated with that address is returned,
12343 so we can track the symbol instead of a fixed address.
12344
12345 When relaxation, the address of an datum may change,
12346 because a text section is shrinked, so the data section
1c8f6a4d 12347 moves forward. If the aligments of text and data section
35c08157
KLC		 12348 are different, their distance may change too.
12349 Therefore, tracking a fixed address is not appriate. */
12350
12351static int
12352nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12353{
12354 struct nds32_fag *base; /* First fag in the window. */
12355 struct nds32_fag *last; /* First fag outside the window. */
12356 int accu = 0; /* Usage accumulation. */
12357 struct nds32_fag *best; /* Best fag. */
12358 int baccu = 0; /* Best accumulation. */
12359
12360 /* Use first fag for initial, and find the last fag in the window.
12361
12362 In each iteration, we could simply subtract previous fag
12363 and accumulate following fags which are inside the window,
12364 untill we each the end. */
12365
1c8f6a4d
KLC		 12366 if (head->next == NULL)
12367 {
12368 *bestpp = NULL;
12369 return 0;
12370 }
35c08157
KLC		 12371
12372 /* Initialize base. */
12373 base = head->next;
12374 best = base;
12375 for (last = base;
12376 last && last->addr < base->addr + FAG_WINDOW;
12377 last = last->next)
12378 accu += last->count;
12379
12380 baccu = accu;
12381
12382 /* Record the best base in each iteration. */
12383 while (base->next)
1c8f6a4d
KLC		 12384 {
12385 accu -= base->count;
12386 base = base->next;
12387 /* Account fags in window. */
12388 for (/* Nothing. */;
12389 last && last->addr < base->addr + FAG_WINDOW;
12390 last = last->next)
12391 accu += last->count;
12392
12393 /* A better fp-base? */
12394 if (accu > baccu)
12395 {
12396 best = base;
12397 baccu = accu;
12398 }
12399 }
35c08157
KLC		 12400
12401 if (bestpp)
12402 *bestpp = best;
12403 return baccu;
12404}
12405
12406/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12407 so we can convert it fo fp-relative access later.
12408 `best_fag' is the best fp-base. Only those inside the window
12409 of best_fag is applied the flag. */
12410
12411static bfd_boolean
12412nds32_fag_mark_relax (struct bfd_link_info *link_info,
12413 bfd *abfd, struct nds32_fag *best_fag,
12414 Elf_Internal_Rela *internal_relocs,
12415 Elf_Internal_Rela *irelend)
12416{
12417 struct nds32_fag *ifag;
12418 bfd_vma best_fpbase, gp;
12419 bfd *output_bfd;
12420
12421 output_bfd = abfd->sections->output_section->owner;
12422 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12423 best_fpbase = best_fag->addr;
12424
1c8f6a4d
KLC		 12425 if (best_fpbase > gp + sdata_range[1][1]
12426 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12427 return FALSE;
12428
12429 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12430 so we know they can be converted to lwi37.fp. */
12431 for (ifag = best_fag;
12432 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12433 {
12434 int i;
12435
12436 for (i = 0; i < ifag->count; i++)
12437 {
12438 Elf_Internal_Rela *insn16_rel;
12439 Elf_Internal_Rela *fag_rel;
12440
12441 fag_rel = ifag->relas[i];
12442
12443 /* Only if this is within the WINDOWS, FP7U2_FLAG
12444 is applied. */
12445
12446 insn16_rel = find_relocs_at_address
12447 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12448
12449 if (insn16_rel != irelend)
12450 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12451 }
12452 }
12453 return TRUE;
12454}
12455
1c8f6a4d
KLC		 12456/* Reset INSN16 to clean fp as gp. */
12457
12458static void
12459nds32_fag_unmark_relax (struct nds32_fag *fag,
12460 Elf_Internal_Rela *internal_relocs,
12461 Elf_Internal_Rela *irelend)
12462{
12463 struct nds32_fag *ifag;
12464 int i;
12465 Elf_Internal_Rela *insn16_rel;
12466 Elf_Internal_Rela *fag_rel;
12467
12468 for (ifag = fag; ifag; ifag = ifag->next)
12469 {
12470 for (i = 0; i < ifag->count; i++)
12471 {
12472 fag_rel = ifag->relas[i];
12473
12474 /* Restore the INSN16 relocation. */
12475 insn16_rel = find_relocs_at_address
12476 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12477
12478 if (insn16_rel != irelend)
12479 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12480 }
12481 }
12482}
12483
35c08157
KLC		 12484/* This is the main function of fp-as-gp optimization.
12485 It should be called by relax_section. */
12486
12487static bfd_boolean
12488nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12489 bfd *abfd, asection *sec,
12490 Elf_Internal_Rela *internal_relocs,
12491 Elf_Internal_Rela *irelend,
12492 Elf_Internal_Sym *isymbuf)
12493{
12494 Elf_Internal_Rela *begin_rel = NULL;
12495 Elf_Internal_Rela *irel;
12496 struct nds32_fag fag_head;
12497 Elf_Internal_Shdr *symtab_hdr;
12498 bfd_byte *contents;
1c8f6a4d 12499 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12500
12501 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12502
12503 /* Per-function fp-base selection.
12504 1. Create a list for all the gp-relative access.
12505 2. Base on those gp-relative address,
12506 find a fp-base which can cover most access.
12507 3. Use the fp-base for fp-as-gp relaxation.
12508
12509 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12510 we should
12511 1. delete the `la $fp, _FP_BASE_' instruction and
12512 2. not convert lwi.gp to lwi37.fp.
12513
12514 To delete the _FP_BASE_ instruction, we simply apply
12515 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12516
12517 To suppress the conversion, we simply NOT to apply
12518 R_NDS32_INSN16_FP7U2_FLAG flag. */
12519
12520 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12521
0c4bd9d9 12522 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12523 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12524 return FALSE;
12525
12526 /* Check whether it is worth for fp-as-gp optimization,
12527 i.e., at least 3 gp-load.
12528
12529 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12530 apply this optimization. */
12531
12532 for (irel = internal_relocs; irel < irelend; irel++)
12533 {
12534 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12535 One we enter the begin of the region, we track all the LW/ST
12536 instructions, so when we leave the region, we try to find
12537 the best fp-base address for those LW/ST instructions. */
12538
12539 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12540 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12541 {
12542 /* Begin of the region. */
12543 if (begin_rel)
695344c0 12544 /* xgettext:c-format */
38f14ab8 12545 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC		 12546
12547 begin_rel = irel;
12548 nds32_fag_init (&fag_head);
1c8f6a4d 12549 ifc_inside = FALSE;
35c08157
KLC		 12550 }
12551 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12552 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12553 {
12554 int accu;
1c8f6a4d 12555 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12556 int dist;
12557
12558 /* End of the region.
12559 Check whether it is worth to do fp-as-gp. */
12560
12561 if (begin_rel == NULL)
12562 {
695344c0 12563 /* xgettext:c-format */
38f14ab8
AM		 12564 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12565 abfd, sec);
35c08157
KLC		 12566 continue;
12567 }
12568
12569 accu = nds32_fag_find_base (&fag_head, &best_fag);
12570
1c8f6a4d
KLC		 12571 /* Clean FP7U2_FLAG because they may set ever. */
12572 tmp_fag = fag_head.next;
12573 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12574
35c08157
KLC		 12575 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12576 if (accu < FAG_THRESHOLD
12577 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12578 internal_relocs, irelend))
12579 {
12580 /* Not worth to do fp-as-gp. */
12581 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12582 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12583 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12584 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12585 nds32_fag_free_list (&fag_head);
12586 begin_rel = NULL;
12587 continue;
12588 }
12589
12590 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12591 so we use it to record the distance to the reloction of best
12592 fp-base. */
12593 dist = best_fag->relas[0] - begin_rel;
12594 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12595 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12596 relocation. And get the base value when relocating. */
1c8f6a4d 12597 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12598 begin_rel->r_addend |= dist << 16;
12599
12600 nds32_fag_free_list (&fag_head);
12601 begin_rel = NULL;
12602 }
12603
1c8f6a4d 12604 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12605 /* Skip if we are not in the region of fp-as-gp. */
12606 continue;
12607
12608 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12609 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12610 {
12611 bfd_vma addr;
12612 uint32_t insn;
12613
12614 /* A gp-relative access is found. Insert it to the fag-list. */
12615
12616 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12617 insn = bfd_getb32 (contents + irel->r_offset);
12618 if (!N32_IS_RT3 (insn))
12619 continue;
12620
12621 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12622 nds32_fag_insert (&fag_head, addr, irel);
12623 }
12624 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12625 {
12626 begin_rel = NULL;
12627 }
1c8f6a4d
KLC		 12628 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12629 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12630 {
12631 /* Suppress fp as gp when encounter ifc. */
12632 ifc_inside = TRUE;
12633 }
35c08157
KLC		 12634 }
12635
12636 return TRUE;
12637}
12638
12639/* Remove unused `la $fp, _FD_BASE_' instruction. */
12640
12641static bfd_boolean
12642nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12643 Elf_Internal_Rela *internal_relocs,
12644 Elf_Internal_Rela *irelend)
12645{
12646 Elf_Internal_Rela *irel;
12647 Elf_Internal_Shdr *symtab_hdr;
12648 bfd_byte *contents = NULL;
12649 nds32_elf_blank_t *relax_blank_list = NULL;
12650 bfd_boolean result = TRUE;
12651 bfd_boolean unused_region = FALSE;
12652
12653 /*
12654 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12655 * R_NDS32_17IFC_PCREL_RELA
12656 * R_NDS32_10IFCU_PCREL_RELA
12657
12658 CASE??????????????
12659 */
12660
12661 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12662 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12663
12664 for (irel = internal_relocs; irel < irelend; irel++)
12665 {
12666 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12667 we marked to in previous pass.
12668 DO NOT scan relocations again, since we've alreadly decided it
12669 and set the flag. */
12670 const char *syname;
12671 int syndx;
12672 uint32_t insn;
12673
12674 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12675 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12676 unused_region = TRUE;
12677 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12678 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12679 unused_region = FALSE;
12680
12681 /* We're not in the region. */
12682 if (!unused_region)
12683 continue;
12684
12685 /* _FP_BASE_ must be a GLOBAL symbol. */
12686 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12687 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12688 continue;
12689
12690 /* The symbol name must be _FP_BASE_. */
12691 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12692 if (strcmp (syname, FP_BASE_NAME) != 0)
12693 continue;
12694
12695 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12696 {
12697 /* addi.gp $fp, -256 */
12698 insn = bfd_getb32 (contents + irel->r_offset);
12699 if (insn != INSN_ADDIGP_TO_FP)
12700 continue;
12701 }
12702 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12703 {
12704 /* addi $fp, $gp, -256 */
12705 insn = bfd_getb32 (contents + irel->r_offset);
12706 if (insn != INSN_ADDI_GP_TO_FP)
12707 continue;
12708 }
12709 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12710 {
12711 /* movi $fp, FP_BASE */
12712 insn = bfd_getb32 (contents + irel->r_offset);
12713 if (insn != INSN_MOVI_TO_FP)
12714 continue;
12715 }
12716 else
12717 continue;
12718
12719 /* We got here because a FP_BASE instruction is found. */
12720 if (!insert_nds32_elf_blank_recalc_total
12721 (&relax_blank_list, irel->r_offset, 4))
12722 goto error_return;
12723 }
12724
12725finish:
12726 if (relax_blank_list)
12727 {
12728 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12729 relax_blank_list = NULL;
12730 }
12731 return result;
12732
12733error_return:
12734 result = FALSE;
12735 goto finish;
12736}
1c8f6a4d
KLC		 12737
12738/* This is a version of bfd_generic_get_relocated_section_contents.
12739 We need this variety because relaxation will modify the dwarf
12740 infomation. When there is undefined symbol reference error mesage,
12741 linker need to dump line number where the symbol be used. However
12742 the address is be relaxed, it can not get the original dwarf contents.
12743 The variety only modify function call for reading in the section. */
12744
12745static bfd_byte *
12746nds32_elf_get_relocated_section_contents (bfd *abfd,
12747 struct bfd_link_info *link_info,
12748 struct bfd_link_order *link_order,
12749 bfd_byte *data,
12750 bfd_boolean relocatable,
12751 asymbol **symbols)
12752{
12753 bfd *input_bfd = link_order->u.indirect.section->owner;
12754 asection *input_section = link_order->u.indirect.section;
12755 long reloc_size;
12756 arelent **reloc_vector;
12757 long reloc_count;
12758
12759 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12760 if (reloc_size < 0)
12761 return NULL;
12762
12763 /* Read in the section. */
0c4bd9d9 12764 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 12765 return NULL;
12766
12767 if (reloc_size == 0)
12768 return data;
12769
12770 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12771 if (reloc_vector == NULL)
12772 return NULL;
12773
12774 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12775 reloc_vector, symbols);
12776 if (reloc_count < 0)
12777 goto error_return;
12778
12779 if (reloc_count > 0)
12780 {
12781 arelent **parent;
12782 for (parent = reloc_vector; *parent != NULL; parent++)
12783 {
12784 char *error_message = NULL;
12785 asymbol *symbol;
12786 bfd_reloc_status_type r;
12787
12788 symbol = *(*parent)->sym_ptr_ptr;
12789 if (symbol->section && discarded_section (symbol->section))
12790 {
12791 bfd_byte *p;
12792 static reloc_howto_type none_howto
12793 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12794 "unused", FALSE, 0, 0, FALSE);
12795
12796 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12797 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12798 p);
12799 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12800 (*parent)->addend = 0;
12801 (*parent)->howto = &none_howto;
12802 r = bfd_reloc_ok;
12803 }
12804 else
12805 r = bfd_perform_relocation (input_bfd, *parent, data,
12806 input_section,
12807 relocatable ? abfd : NULL,
12808 &error_message);
12809
12810 if (relocatable)
12811 {
12812 asection *os = input_section->output_section;
12813
12814 /* A partial link, so keep the relocs. */
12815 os->orelocation[os->reloc_count] = *parent;
12816 os->reloc_count++;
12817 }
12818
12819 if (r != bfd_reloc_ok)
12820 {
12821 switch (r)
12822 {
12823 case bfd_reloc_undefined:
1a72702b
AM		 12824 (*link_info->callbacks->undefined_symbol)
12825 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12826 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC		 12827 break;
12828 case bfd_reloc_dangerous:
12829 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 12830 (*link_info->callbacks->reloc_dangerous)
12831 (link_info, error_message,
12832 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12833 break;
12834 case bfd_reloc_overflow:
1a72702b
AM		 12835 (*link_info->callbacks->reloc_overflow)
12836 (link_info, NULL,
12837 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12838 (*parent)->howto->name, (*parent)->addend,
12839 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12840 break;
12841 case bfd_reloc_outofrange:
12842 /* PR ld/13730:
12843 This error can result when processing some partially
12844 complete binaries. Do not abort, but issue an error
12845 message instead. */
12846 link_info->callbacks->einfo
695344c0 12847 /* xgettext:c-format */
c1c8c1ef 12848 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 12849 abfd, input_section, * parent);
12850 goto error_return;
12851
12852 default:
12853 abort ();
12854 break;
12855 }
12856 }
12857 }
12858 }
12859
12860 free (reloc_vector);
12861 return data;
12862
12863error_return:
12864 free (reloc_vector);
12865 return NULL;
12866}
35c08157
KLC		 12867\f
12868/* Link-time IFC relaxation.
12869 In this optimization, we chains jump instructions
12870 of the same destination with ifcall. */
12871
12872
12873/* List to save jal and j relocation. */
12874struct elf_nds32_ifc_symbol_entry
12875{
12876 asection *sec;
12877 struct elf_link_hash_entry *h;
12878 struct elf_nds32_ifc_irel_list *irel_head;
12879 unsigned long insn;
12880 int times;
12881 int enable; /* Apply ifc. */
12882 int ex9_enable; /* Apply ifc after ex9. */
12883 struct elf_nds32_ifc_symbol_entry *next;
12884};
12885
12886struct elf_nds32_ifc_irel_list
12887{
12888 Elf_Internal_Rela *irel;
12889 asection *sec;
12890 bfd_vma addr;
12891 /* If this is set, then it is the last instruction for
12892 ifc-chain, so it must be keep for the actual branching. */
12893 int keep;
12894 struct elf_nds32_ifc_irel_list *next;
12895};
12896
12897static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
12898
12899/* Insert symbol of jal and j for ifc. */
12900
12901static void
12902nds32_elf_ifc_insert_symbol (asection *sec,
12903 struct elf_link_hash_entry *h,
12904 Elf_Internal_Rela *irel,
12905 unsigned long insn)
12906{
12907 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12908
12909 /* Check there is target of existing entry the same as the new one. */
12910 while (ptr != NULL)
12911 {
12912 if (((h == NULL && ptr->sec == sec
12913 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
12914 && ptr->irel_head->irel->r_addend == irel->r_addend)
12915 || h != NULL)
12916 && ptr->h == h
12917 && ptr->insn == insn)
12918 {
12919 /* The same target exist, so insert into list. */
12920 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
12921
12922 while (irel_list->next != NULL)
12923 irel_list = irel_list->next;
12924 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12925 irel_list = irel_list->next;
12926 irel_list->irel = irel;
12927 irel_list->keep = 1;
12928
12929 if (h == NULL)
12930 irel_list->sec = NULL;
12931 else
12932 irel_list->sec = sec;
12933 irel_list->next = NULL;
12934 return;
12935 }
12936 if (ptr->next == NULL)
12937 break;
12938 ptr = ptr->next;
12939 }
12940
12941 /* There is no same target entry, so build a new one. */
12942 if (ifc_symbol_head == NULL)
12943 {
12944 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12945 ptr = ifc_symbol_head;
12946 }
12947 else
12948 {
12949 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12950 ptr = ptr->next;
12951 }
12952
12953 ptr->h = h;
12954 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12955 ptr->irel_head->irel = irel;
12956 ptr->insn = insn;
12957 ptr->irel_head->keep = 1;
12958
12959 if (h == NULL)
12960 {
12961 /* Local symbols. */
12962 ptr->sec = sec;
12963 ptr->irel_head->sec = NULL;
12964 }
12965 else
12966 {
12967 /* Global symbol. */
12968 ptr->sec = NULL;
12969 ptr->irel_head->sec = sec;
12970 }
12971
12972 ptr->irel_head->next = NULL;
12973 ptr->times = 0;
12974 ptr->enable = 0;
12975 ptr->ex9_enable = 0;
12976 ptr->next = NULL;
12977}
12978
12979/* Gather all jal and j instructions. */
12980
12981static bfd_boolean
12982nds32_elf_ifc_calc (struct bfd_link_info *info,
12983 bfd *abfd, asection *sec)
12984{
12985 Elf_Internal_Rela *internal_relocs;
12986 Elf_Internal_Rela *irelend;
12987 Elf_Internal_Rela *irel;
12988 Elf_Internal_Shdr *symtab_hdr;
12989 bfd_byte *contents = NULL;
1c8f6a4d 12990 uint32_t insn, insn_with_reg;
35c08157
KLC		 12991 unsigned long r_symndx;
12992 struct elf_link_hash_entry *h;
12993 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
12994 struct elf_nds32_link_hash_table *table;
12995 bfd_boolean ifc_loop_aware;
12996
12997 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12998 TRUE /* keep_memory */);
12999 irelend = internal_relocs + sec->reloc_count;
13000 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13001
13002 /* Check if the object enable ifc. */
13003 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13004 R_NDS32_RELAX_ENTRY);
13005
13006 if (irel == NULL
13007 || irel >= irelend
13008 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13009 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13010 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13011 return TRUE;
13012
0c4bd9d9 13013 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 13014 return FALSE;
13015
13016 table = nds32_elf_hash_table (info);
13017 ifc_loop_aware = table->ifc_loop_aware;
13018 while (irel != NULL && irel < irelend)
13019 {
13020 /* Traverse all relocation and gather all of them to build the list. */
13021
13022 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13023 {
13024 if (ifc_loop_aware == 1
13025 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13026 {
13027 /* Check the region if loop or not. If it is true and
13028 ifc-loop-aware is true, ignore the region till region end. */
13029 while (irel != NULL
13030 && irel < irelend
13031 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13032 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13033 irel++;
13034 }
13035 }
13036
13037 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13038 {
13039 insn = bfd_getb32 (contents + irel->r_offset);
13040 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13041 r_symndx = ELF32_R_SYM (irel->r_info);
13042 if (r_symndx < symtab_hdr->sh_info)
13043 {
13044 /* Local symbol. */
13045 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13046 }
13047 else
13048 {
13049 /* External symbol. */
13050 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13051 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13052 }
13053 }
13054 irel++;
13055 }
13056 return TRUE;
13057}
13058
13059/* Determine whether j and jal should be substituted. */
13060
13061static void
13062nds32_elf_ifc_filter (struct bfd_link_info *info)
13063{
13064 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13065 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13066 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13067 struct elf_nds32_link_hash_table *table;
13068 int target_optimize;
13069 bfd_vma address;
13070
13071 table = nds32_elf_hash_table (info);
13072 target_optimize = table->target_optimize;
13073 while (ptr)
13074 {
13075 irel_ptr = ptr->irel_head;
13076 if (ptr->h == NULL)
13077 {
13078 /* Local symbol. */
13079 irel_keeper = irel_ptr;
13080 while (irel_ptr && irel_ptr->next)
13081 {
13082 /* Check there is jump target can be used. */
13083 if ((irel_ptr->next->irel->r_offset
13084 - irel_keeper->irel->r_offset) > 1022)
13085 irel_keeper = irel_ptr->next;
13086 else
13087 {
13088 ptr->enable = 1;
13089 irel_ptr->keep = 0;
13090 }
13091 irel_ptr = irel_ptr->next;
13092 }
13093 }
13094 else
13095 {
1c8f6a4d
KLC		 13096 /* Global symbol. */
13097 /* We have to get the absolute address and decide
13098 whether to keep it or not. */
35c08157
KLC		 13099 while (irel_ptr)
13100 {
13101 address = (irel_ptr->irel->r_offset
13102 + irel_ptr->sec->output_section->vma
13103 + irel_ptr->sec->output_offset);
13104 irel_ptr->addr = address;
13105 irel_ptr = irel_ptr->next;
13106 }
13107
13108 irel_ptr = ptr->irel_head;
13109 while (irel_ptr)
13110 {
1c8f6a4d 13111 /* Sort by address. */
35c08157
KLC		 13112 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13113 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13114 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13115 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13116
1c8f6a4d 13117 /* Get the smallest one. */
35c08157
KLC		 13118 while (irel_temp->next)
13119 {
13120 if (irel_temp->next->addr < irel_dest->addr)
13121 {
13122 irel_dest_prev = irel_temp;
13123 irel_dest = irel_temp->next;
13124 }
13125 irel_temp = irel_temp->next;
13126 }
1c8f6a4d 13127
35c08157
KLC		 13128 if (irel_dest != irel_ptr)
13129 {
13130 if (irel_ptr_prev)
13131 irel_ptr_prev->next = irel_dest;
13132 if (irel_dest_prev)
13133 irel_dest_prev->next = irel_ptr;
13134 irel_temp = irel_ptr->next;
13135 irel_ptr->next = irel_dest->next;
13136 irel_dest->next = irel_temp;
13137 }
13138 irel_ptr_prev = irel_ptr;
13139 irel_ptr = irel_ptr->next;
13140 }
13141
13142 irel_ptr = ptr->irel_head;
13143 irel_keeper = irel_ptr;
13144 while (irel_ptr && irel_ptr->next)
13145 {
13146 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13147 irel_keeper = irel_ptr->next;
13148 else
13149 {
13150 ptr->enable = 1;
13151 irel_ptr->keep = 0;
13152 }
13153 irel_ptr = irel_ptr->next;
13154 }
13155 }
13156
1c8f6a4d 13157 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13158 if ((target_optimize & NDS32_RELAX_EX9_ON)
13159 && ptr->irel_head != irel_keeper)
13160 ptr->enable = 0;
13161 ptr = ptr->next;
13162 }
13163}
13164
13165/* Determine whether j and jal should be substituted after ex9 done. */
13166
13167static void
13168nds32_elf_ifc_filter_after_ex9 (void)
13169{
13170 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13171 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13172
13173 while (ptr)
13174 {
13175 if (ptr->enable == 0)
13176 {
13177 /* Check whether ifc is applied or not. */
13178 irel_ptr = ptr->irel_head;
13179 ptr->ex9_enable = 1;
13180 while (irel_ptr)
13181 {
13182 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13183 {
13184 /* Ex9 already. */
13185 ptr->ex9_enable = 0;
13186 break;
13187 }
13188 irel_ptr = irel_ptr->next;
13189 }
13190 }
13191 ptr = ptr->next;
13192 }
13193}
13194
13195/* Wrapper to do ifc relaxation. */
13196
13197bfd_boolean
13198nds32_elf_ifc_finish (struct bfd_link_info *info)
13199{
13200 int relax_status;
13201 struct elf_nds32_link_hash_table *table;
13202
13203 table = nds32_elf_hash_table (info);
13204 relax_status = table->relax_status;
13205
13206 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13207 nds32_elf_ifc_filter (info);
13208 else
13209 nds32_elf_ifc_filter_after_ex9 ();
13210
13211 if (!nds32_elf_ifc_replace (info))
13212 return FALSE;
13213
13214 if (table)
13215 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13216 return TRUE;
13217}
13218
13219/* Traverse the result of ifc filter and replace it with ifcall9. */
13220
13221static bfd_boolean
13222nds32_elf_ifc_replace (struct bfd_link_info *info)
13223{
13224 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13225 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13226 nds32_elf_blank_t *relax_blank_list = NULL;
13227 bfd_byte *contents = NULL;
13228 Elf_Internal_Rela *internal_relocs;
13229 Elf_Internal_Rela *irel;
13230 Elf_Internal_Rela *irelend;
13231 unsigned short insn16 = INSN_IFCALL9;
13232 struct elf_nds32_link_hash_table *table;
13233 int relax_status;
13234
13235 table = nds32_elf_hash_table (info);
13236 relax_status = table->relax_status;
13237
13238 while (ptr)
13239 {
13240 /* Traverse the ifc gather list, and replace the
13241 filter entries by ifcall9. */
13242 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13243 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13244 && ptr->ex9_enable == 1))
35c08157
KLC		 13245 {
13246 irel_ptr = ptr->irel_head;
13247 if (ptr->h == NULL)
13248 {
13249 /* Local symbol. */
13250 internal_relocs = _bfd_elf_link_read_relocs
13251 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13252 irelend = internal_relocs + ptr->sec->reloc_count;
13253
1c8f6a4d 13254 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13255 &contents, TRUE))
35c08157
KLC		 13256 return FALSE;
13257
13258 while (irel_ptr)
13259 {
13260 if (irel_ptr->keep == 0 && irel_ptr->next)
13261 {
1c8f6a4d 13262 /* The one can be replaced. We have to check whether
35c08157
KLC		 13263 there is any alignment point in the region. */
13264 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13265 while (((irel_ptr->next->keep == 0
13266 && irel < irel_ptr->next->irel)
35c08157
KLC		 13267 || (irel_ptr->next->keep == 1 && irel < irelend))
13268 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13269 && (irel->r_addend & 0x1f) == 2))
13270 irel++;
13271 if (irel >= irelend
13272 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13273 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13274 && ((irel->r_offset - get_nds32_elf_blank_total
13275 (&relax_blank_list, irel->r_offset, 1))
13276 & 0x02) == 0))
35c08157
KLC		 13277 {
13278 /* Replace by ifcall9. */
13279 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13280 if (!insert_nds32_elf_blank_recalc_total
13281 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13282 return FALSE;
13283 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13284 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13285 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13286 }
13287 }
13288 irel_ptr = irel_ptr->next;
13289 }
13290
13291 /* Delete the redundant code. */
13292 if (relax_blank_list)
13293 {
13294 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13295 relax_blank_list);
13296 relax_blank_list = NULL;
13297 }
13298 }
13299 else
13300 {
13301 /* Global symbol. */
13302 while (irel_ptr)
13303 {
13304 if (irel_ptr->keep == 0 && irel_ptr->next)
13305 {
13306 /* The one can be replaced, and we have to check
13307 whether there is any alignment point in the region. */
13308 internal_relocs = _bfd_elf_link_read_relocs
13309 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13310 TRUE /* keep_memory */);
13311 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC		 13312 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13313 irel_ptr->sec, &contents,
13314 TRUE))
35c08157
KLC		 13315 return FALSE;
13316
13317 irel = irel_ptr->irel;
13318 while (((irel_ptr->sec == irel_ptr->next->sec
13319 && irel_ptr->next->keep == 0
13320 && irel < irel_ptr->next->irel)
13321 || ((irel_ptr->sec != irel_ptr->next->sec
13322 || irel_ptr->next->keep == 1)
13323 && irel < irelend))
13324 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13325 && (irel->r_addend & 0x1f) == 2))
13326 irel++;
13327 if (irel >= irelend
13328 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13329 && (irel->r_addend & 0x1f) == 2
13330 && ((irel->r_offset
13331 - get_nds32_elf_blank_total (&relax_blank_list,
13332 irel->r_offset, 1)) & 0x02) == 0))
13333 {
13334 /* Replace by ifcall9. */
13335 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13336 if (!insert_nds32_elf_blank_recalc_total
13337 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13338 return FALSE;
13339
13340 /* Delete the redundant code, and clear the relocation. */
13341 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13342 irel_ptr->sec,
13343 relax_blank_list);
13344 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13345 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13346 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13347 relax_blank_list = NULL;
13348 }
13349 }
13350
13351 irel_ptr = irel_ptr->next;
13352 }
13353 }
13354 }
13355 ptr = ptr->next;
13356 }
13357
13358 return TRUE;
13359}
13360
13361/* Relocate ifcall. */
13362
1c8f6a4d 13363static bfd_boolean
35c08157
KLC		 13364nds32_elf_ifc_reloc (void)
13365{
13366 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13367 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13368 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13369 bfd_vma relocation, address;
13370 unsigned short insn16;
35c08157 13371 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13372 static bfd_boolean done = FALSE;
13373
13374 if (done)
13375 return TRUE;
13376
13377 done = TRUE;
35c08157
KLC		 13378
13379 while (ptr)
13380 {
1c8f6a4d 13381 /* Check the entry is enable ifcall. */
35c08157
KLC		 13382 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13383 {
1c8f6a4d 13384 /* Get the reserve jump. */
35c08157
KLC		 13385 irel_ptr = ptr->irel_head;
13386 while (irel_ptr)
13387 {
13388 if (irel_ptr->keep == 1)
13389 {
13390 irel_keeper = irel_ptr;
13391 break;
13392 }
13393 irel_ptr = irel_ptr->next;
13394 }
13395
13396 irel_ptr = ptr->irel_head;
13397 if (ptr->h == NULL)
13398 {
13399 /* Local symbol. */
0c4bd9d9
KLC		 13400 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13401 &contents, TRUE))
35c08157
KLC		 13402 return FALSE;
13403
13404 while (irel_ptr)
13405 {
13406 if (irel_ptr->keep == 0
1c8f6a4d 13407 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13408 {
13409 relocation = irel_keeper->irel->r_offset;
13410 relocation = relocation - irel_ptr->irel->r_offset;
13411 while (irel_keeper && relocation > 1022)
13412 {
13413 irel_keeper = irel_keeper->next;
13414 if (irel_keeper && irel_keeper->keep == 1)
13415 {
13416 relocation = irel_keeper->irel->r_offset;
13417 relocation = relocation - irel_ptr->irel->r_offset;
13418 }
13419 }
13420 if (relocation > 1022)
13421 {
13422 /* Double check. */
13423 irel_keeper = ptr->irel_head;
13424 while (irel_keeper)
13425 {
13426 if (irel_keeper->keep == 1)
13427 {
13428 relocation = irel_keeper->irel->r_offset;
13429 relocation = relocation - irel_ptr->irel->r_offset;
13430 }
13431 if (relocation <= 1022)
13432 break;
13433 irel_keeper = irel_keeper->next;
13434 }
13435 if (!irel_keeper)
13436 return FALSE;
13437 }
1c8f6a4d
KLC		 13438 irel_ptr->irel->r_info =
13439 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13440 R_NDS32_NONE);
35c08157
KLC		 13441 insn16 = INSN_IFCALL9 | (relocation >> 1);
13442 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13443 }
13444 irel_ptr = irel_ptr->next;
13445 }
13446 }
13447 else
13448 {
13449 /* Global symbol. */
13450 while (irel_ptr)
13451 {
13452 if (irel_ptr->keep == 0
1c8f6a4d 13453 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13454 {
1c8f6a4d 13455 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13456 relocation = (irel_keeper->irel->r_offset
13457 + irel_keeper->sec->output_section->vma
13458 + irel_keeper->sec->output_offset);
13459 address = (irel_ptr->irel->r_offset
13460 + irel_ptr->sec->output_section->vma
13461 + irel_ptr->sec->output_offset);
13462 relocation = relocation - address;
1c8f6a4d
KLC		 13463
13464 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13465 while (irel_keeper && relocation > 1022)
13466 {
13467 irel_keeper = irel_keeper->next;
13468 if (irel_keeper && irel_keeper->keep ==1)
13469 {
13470 relocation = (irel_keeper->irel->r_offset
13471 + irel_keeper->sec->output_section->vma
13472 + irel_keeper->sec->output_offset);
13473 relocation = relocation - address;
13474 }
13475 }
13476
13477 if (relocation > 1022)
13478 {
13479 /* Double check. */
13480 irel_keeper = ptr->irel_head;
13481 while (irel_keeper)
13482 {
13483 if (irel_keeper->keep == 1)
13484 {
13485
13486 relocation = (irel_keeper->irel->r_offset
13487 + irel_keeper->sec->output_section->vma
13488 + irel_keeper->sec->output_offset);
13489 relocation = relocation - address;
13490 }
13491 if (relocation <= 1022)
13492 break;
13493 irel_keeper = irel_keeper->next;
13494 }
13495 if (!irel_keeper)
13496 return FALSE;
13497 }
13498 if (!nds32_get_section_contents
0c4bd9d9 13499 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC		 13500 return FALSE;
13501 insn16 = INSN_IFCALL9 | (relocation >> 1);
13502 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13503 irel_ptr->irel->r_info =
13504 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13505 R_NDS32_NONE);
35c08157
KLC		 13506 }
13507 irel_ptr =irel_ptr->next;
13508 }
13509 }
13510 }
13511 ptr = ptr->next;
13512 }
13513
13514 return TRUE;
13515}
13516
13517/* End of IFC relaxation. */
13518\f
13519/* EX9 Instruction Table Relaxation. */
13520
13521/* Global hash list. */
13522struct elf_link_hash_entry_list
13523{
13524 struct elf_link_hash_entry *h;
13525 struct elf_link_hash_entry_list *next;
13526};
13527
13528/* Save different destination but same insn. */
13529struct elf_link_hash_entry_mul_list
13530{
13531 /* Global symbol times. */
13532 int times;
13533 /* Save relocation for each global symbol but useful?? */
13534 Elf_Internal_Rela *irel;
13535 /* For sethi, two sethi may have the same high-part but different low-parts. */
13536 Elf_Internal_Rela rel_backup;
13537 struct elf_link_hash_entry_list *h_list;
13538 struct elf_link_hash_entry_mul_list *next;
13539};
13540
13541/* Instruction hash table. */
13542struct elf_nds32_code_hash_entry
13543{
13544 struct bfd_hash_entry root;
13545 int times;
13546 /* For insn that can use relocation or constant ex: sethi. */
13547 int const_insn;
13548 asection *sec;
13549 struct elf_link_hash_entry_mul_list *m_list;
13550 /* Using r_addend. */
13551 Elf_Internal_Rela *irel;
13552 /* Using r_info. */
13553 Elf_Internal_Rela rel_backup;
13554};
13555
13556/* Instruction count list. */
13557struct elf_nds32_insn_times_entry
13558{
13559 const char *string;
13560 int times;
13561 int order;
13562 asection *sec;
13563 struct elf_link_hash_entry_mul_list *m_list;
13564 Elf_Internal_Rela *irel;
13565 Elf_Internal_Rela rel_backup;
13566 struct elf_nds32_insn_times_entry *next;
13567};
13568
13569/* J and JAL symbol list. */
13570struct elf_nds32_symbol_entry
13571{
13572 char *string;
13573 unsigned long insn;
13574 struct elf_nds32_symbol_entry *next;
13575};
13576
13577/* Relocation list. */
13578struct elf_nds32_irel_entry
13579{
13580 Elf_Internal_Rela *irel;
13581 struct elf_nds32_irel_entry *next;
13582};
13583
13584/* ex9.it insn need to be fixed. */
13585struct elf_nds32_ex9_refix
13586{
13587 Elf_Internal_Rela *irel;
13588 asection *sec;
13589 struct elf_link_hash_entry *h;
13590 int order;
13591 struct elf_nds32_ex9_refix *next;
13592};
13593
13594static struct bfd_hash_table ex9_code_table;
13595static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13596static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13597
13598/* EX9 hash function. */
13599
13600static struct bfd_hash_entry *
13601nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13602 struct bfd_hash_table *table,
13603 const char *string)
13604{
13605 struct elf_nds32_code_hash_entry *ret;
13606
13607 /* Allocate the structure if it has not already been allocated by a
13608 subclass. */
13609 if (entry == NULL)
13610 {
13611 entry = (struct bfd_hash_entry *)
13612 bfd_hash_allocate (table, sizeof (*ret));
13613 if (entry == NULL)
13614 return entry;
13615 }
13616
13617 /* Call the allocation method of the superclass. */
13618 entry = bfd_hash_newfunc (entry, table, string);
13619 if (entry == NULL)
13620 return entry;
13621
13622 ret = (struct elf_nds32_code_hash_entry*) entry;
13623 ret->times = 0;
13624 ret->const_insn = 0;
13625 ret->m_list = NULL;
13626 ret->sec = NULL;
13627 ret->irel = NULL;
13628 return &ret->root;
13629}
13630
13631/* Insert ex9 entry
13632 this insert must be stable sorted by times. */
13633
13634static void
13635nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13636{
13637 struct elf_nds32_insn_times_entry *temp;
13638 struct elf_nds32_insn_times_entry *temp2;
13639
13640 if (ex9_insn_head == NULL)
13641 {
13642 ex9_insn_head = ptr;
13643 ptr->next = NULL;
13644 }
13645 else
13646 {
13647 temp = ex9_insn_head;
13648 temp2 = ex9_insn_head;
13649 while (temp->next &&
13650 (temp->next->times >= ptr->times
13651 || temp->times == -1))
13652 {
13653 if (temp->times == -1)
13654 temp2 = temp;
13655 temp = temp->next;
13656 }
13657 if (ptr->times > temp->times && temp->times != -1)
13658 {
13659 ptr->next = temp;
13660 if (temp2->times == -1)
13661 temp2->next = ptr;
13662 else
13663 ex9_insn_head = ptr;
13664 }
13665 else if (temp->next == NULL)
13666 {
13667 temp->next = ptr;
13668 ptr->next = NULL;
13669 }
13670 else
13671 {
13672 ptr->next = temp->next;
13673 temp->next = ptr;
13674 }
13675 }
13676}
13677
13678/* Examine each insn times in hash table.
13679 Handle multi-link hash entry.
13680
13681 TODO: This function doesn't assign so much info since it is fake. */
13682
13683static int
13684nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13685{
13686 struct elf_nds32_insn_times_entry *ptr;
13687 int times;
13688
13689 if (h->m_list == NULL)
13690 {
13691 /* Local symbol insn or insn without relocation. */
13692 if (h->times < 3)
13693 return TRUE;
13694
13695 ptr = (struct elf_nds32_insn_times_entry *)
13696 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13697 ptr->times = h->times;
13698 ptr->string = h->root.string;
13699 ptr->m_list = NULL;
13700 ptr->sec = h->sec;
13701 ptr->irel = h->irel;
13702 ptr->rel_backup = h->rel_backup;
13703 nds32_elf_ex9_insert_entry (ptr);
13704 }
13705 else
13706 {
13707 /* Global symbol insn. */
13708 /* Only sethi insn has multiple m_list. */
13709 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13710
13711 times = 0;
13712 while (m_list)
13713 {
13714 times += m_list->times;
13715 m_list = m_list->next;
13716 }
13717 if (times >= 3)
13718 {
13719 m_list = h->m_list;
13720 ptr = (struct elf_nds32_insn_times_entry *)
13721 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13722 ptr->times = times; /* Use the total times. */
13723 ptr->string = h->root.string;
13724 ptr->m_list = m_list;
13725 ptr->sec = h->sec;
13726 ptr->irel = m_list->irel;
13727 ptr->rel_backup = m_list->rel_backup;
13728 nds32_elf_ex9_insert_entry (ptr);
13729 }
13730 if (h->const_insn == 1)
13731 {
13732 /* sethi with constant value. */
13733 if (h->times < 3)
13734 return TRUE;
13735
13736 ptr = (struct elf_nds32_insn_times_entry *)
13737 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13738 ptr->times = h->times;
13739 ptr->string = h->root.string;
13740 ptr->m_list = NULL;
13741 ptr->sec = NULL;
13742 ptr->irel = NULL;
13743 ptr->rel_backup = h->rel_backup;
13744 nds32_elf_ex9_insert_entry (ptr);
13745 }
13746 }
13747 return TRUE;
13748}
13749
13750/* Count each insn times in hash table.
13751 Handle multi-link hash entry. */
13752
13753static int
13754nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13755{
13756 int reservation, times;
13757 unsigned long relocation, min_relocation;
13758 struct elf_nds32_insn_times_entry *ptr;
13759
13760 if (h->m_list == NULL)
13761 {
13762 /* Local symbol insn or insn without relocation. */
13763 if (h->times < 3)
13764 return TRUE;
13765 ptr = (struct elf_nds32_insn_times_entry *)
13766 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13767 ptr->times = h->times;
13768 ptr->string = h->root.string;
13769 ptr->m_list = NULL;
13770 ptr->sec = h->sec;
13771 ptr->irel = h->irel;
13772 ptr->rel_backup = h->rel_backup;
13773 nds32_elf_ex9_insert_entry (ptr);
13774 }
13775 else
13776 {
13777 /* Global symbol insn. */
13778 /* Only sethi insn has multiple m_list. */
13779 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13780
13781 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13782 && m_list->next != NULL)
13783 {
13784 /* Sethi insn has different symbol or addend but has same hi20. */
13785 times = 0;
13786 reservation = 1;
13787 relocation = 0;
13788 min_relocation = 0xffffffff;
13789 while (m_list)
13790 {
13791 /* Get the minimum sethi address
13792 and calculate how many entry the sethi-list have to use. */
13793 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13794 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
13795 && (m_list->h_list->h->root.u.def.section != NULL
13796 && m_list->h_list->h->root.u.def.section->output_section != NULL))
13797 {
13798 relocation = (m_list->h_list->h->root.u.def.value +
13799 m_list->h_list->h->root.u.def.section->output_section->vma +
13800 m_list->h_list->h->root.u.def.section->output_offset);
13801 relocation += m_list->irel->r_addend;
13802 }
13803 else
13804 relocation = 0;
13805 if (relocation < min_relocation)
13806 min_relocation = relocation;
13807 times += m_list->times;
13808 m_list = m_list->next;
13809 }
13810 if (min_relocation < ex9_relax_size)
13811 reservation = (min_relocation >> 12) + 1;
13812 else
13813 reservation = (min_relocation >> 12)
13814 - ((min_relocation - ex9_relax_size) >> 12) + 1;
13815 if (reservation < (times / 3))
13816 {
13817 /* Efficient enough to use ex9. */
13818 int i;
13819
13820 for (i = reservation ; i > 0; i--)
13821 {
13822 /* Allocate number of reservation ex9 entry. */
13823 ptr = (struct elf_nds32_insn_times_entry *)
13824 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13825 ptr->times = h->m_list->times / reservation;
13826 ptr->string = h->root.string;
13827 ptr->m_list = h->m_list;
13828 ptr->sec = h->sec;
13829 ptr->irel = h->m_list->irel;
13830 ptr->rel_backup = h->m_list->rel_backup;
13831 nds32_elf_ex9_insert_entry (ptr);
13832 }
13833 }
13834 }
13835 else
13836 {
13837 /* Normal global symbol that means no different address symbol
13838 using same ex9 entry. */
13839 if (m_list->times >= 3)
13840 {
13841 ptr = (struct elf_nds32_insn_times_entry *)
13842 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13843 ptr->times = m_list->times;
13844 ptr->string = h->root.string;
13845 ptr->m_list = h->m_list;
13846 ptr->sec = h->sec;
13847 ptr->irel = h->m_list->irel;
13848 ptr->rel_backup = h->m_list->rel_backup;
13849 nds32_elf_ex9_insert_entry (ptr);
13850 }
13851 }
13852
13853 if (h->const_insn == 1)
13854 {
13855 /* sethi with constant value. */
13856 if (h->times < 3)
13857 return TRUE;
13858
13859 ptr = (struct elf_nds32_insn_times_entry *)
13860 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13861 ptr->times = h->times;
13862 ptr->string = h->root.string;
13863 ptr->m_list = NULL;
13864 ptr->sec = NULL;
13865 ptr->irel = NULL;
13866 ptr->rel_backup = h->rel_backup;
13867 nds32_elf_ex9_insert_entry (ptr);
13868 }
13869 }
13870
13871 return TRUE;
13872}
13873
13874/* Hash table traverse function. */
13875
13876static void
13877nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
13878{
13879 unsigned int i;
13880
13881 ex9_code_table.frozen = 1;
13882 for (i = 0; i < ex9_code_table.size; i++)
13883 {
13884 struct bfd_hash_entry *p;
13885
13886 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
13887 if (!func ((struct elf_nds32_code_hash_entry *) p))
13888 goto out;
13889 }
13890out:
13891 ex9_code_table.frozen = 0;
13892}
13893
13894
13895/* Give order number to insn list. */
13896
13897static void
13898nds32_elf_order_insn_times (struct bfd_link_info *info)
13899{
13900 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 13901 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 13902 struct elf_nds32_link_hash_table *table;
35c08157 13903 int ex9_limit;
1c8f6a4d
KLC		 13904 int number = 0;
13905
13906 if (ex9_insn_head == NULL)
13907 return;
35c08157
KLC		 13908
13909/* The max number of entries is 512. */
13910 ex9_insn = ex9_insn_head;
13911 table = nds32_elf_hash_table (info);
13912 ex9_limit = table->ex9_limit;
13913
35c08157
KLC		 13914 ex9_insn = ex9_insn_head;
13915
1c8f6a4d 13916 while (ex9_insn != NULL && number < ex9_limit)
35c08157 13917 {
1c8f6a4d 13918 ex9_insn->order = number;
35c08157 13919 number++;
1c8f6a4d 13920 temp = ex9_insn;
35c08157
KLC		 13921 ex9_insn = ex9_insn->next;
13922 }
13923
1c8f6a4d
KLC		 13924 if (ex9_insn && temp)
13925 temp->next = NULL;
35c08157
KLC		 13926
13927 while (ex9_insn != NULL)
13928 {
13929 /* Free useless entry. */
13930 temp = ex9_insn;
13931 ex9_insn = ex9_insn->next;
13932 free (temp);
13933 }
13934}
13935
13936/* Build .ex9.itable section. */
13937
13938static void
13939nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
13940{
13941 asection *table_sec;
13942 struct elf_nds32_insn_times_entry *ptr;
13943 bfd *it_abfd;
13944 int number = 0;
13945 bfd_byte *contents = NULL;
13946
13947 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 13948 it_abfd = it_abfd->link.next)
35c08157
KLC		 13949 {
13950 /* Find the section .ex9.itable, and put all entries into it. */
13951 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13952 if (table_sec != NULL)
13953 {
0c4bd9d9 13954 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC		 13955 return;
13956
13957 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13958 number++;
13959
13960 table_sec->size = number * 4;
13961
13962 if (number == 0)
1c8f6a4d 13963 return;
35c08157
KLC		 13964
13965 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
13966 number = 0;
13967 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13968 {
13969 long val;
13970
13971 val = strtol (ptr->string, NULL, 16);
13972 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
13973 number++;
13974 }
13975 break;
13976 }
13977 }
13978}
13979
13980/* Get insn with regs according to relocation type. */
13981
13982static void
13983nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 13984 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 13985{
13986 reloc_howto_type *howto = NULL;
13987
13988 if (irel == NULL
13989 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13990 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13991 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13992 {
13993 *insn_with_reg = insn;
13994 return;
13995 }
13996
13997 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13998 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
13999}
14000
14001/* Mask number of address bits according to relocation. */
14002
14003static unsigned long
14004nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14005{
14006 reloc_howto_type *howto = NULL;
14007
14008 if (irel == NULL
14009 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14010 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14011 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14012 return 0;
14013
14014 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14015 return howto->dst_mask;
14016}
14017
14018static void
14019nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14020 struct elf_nds32_irel_entry *irel_ptr)
14021{
14022 if (*irel_list == NULL)
14023 {
14024 *irel_list = irel_ptr;
14025 irel_ptr->next = NULL;
14026 }
14027 else
14028 {
14029 irel_ptr->next = *irel_list;
14030 *irel_list = irel_ptr;
14031 }
14032}
14033
14034static void
14035nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14036 struct elf_link_hash_entry *h, int order)
14037{
14038 struct elf_nds32_ex9_refix *ptr;
14039
14040 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14041 ptr->sec = sec;
14042 ptr->irel = irel;
14043 ptr->h = h;
14044 ptr->order = order;
14045 ptr->next = NULL;
14046
14047 if (ex9_refix_head == NULL)
14048 ex9_refix_head = ptr;
14049 else
14050 {
14051 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14052
14053 while (temp->next != NULL)
14054 temp = temp->next;
14055 temp->next = ptr;
14056 }
14057}
14058
14059enum
14060{
14061 DATA_EXIST = 1,
14062 CLEAN_PRE = 1 << 1,
14063 PUSH_PRE = 1 << 2
14064};
14065
14066/* Check relocation type if supporting for ex9. */
14067
14068static int
14069nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14070 Elf_Internal_Rela **irel,
14071 Elf_Internal_Rela *irelend,
14072 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14073 asection *sec,bfd_vma *off,
35c08157
KLC		 14074 bfd_byte *contents)
14075{
14076 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14077 bfd_boolean nested_ex9, nested_loop;
14078 bfd_boolean ex9_loop_aware;
14079 /* We use the highest 1 byte of result to record
14080 how many bytes location counter has to move. */
14081 int result = 0;
14082 Elf_Internal_Rela *irel_save = NULL;
14083 struct elf_nds32_link_hash_table *table;
14084
14085 table = nds32_elf_hash_table (info);
14086 ex9_loop_aware = table->ex9_loop_aware;
14087
14088 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14089 {
14090 switch (ELF32_R_TYPE ((*irel)->r_info))
14091 {
14092 case R_NDS32_RELAX_REGION_BEGIN:
14093 /* Ignore code block. */
14094 nested_ex9 = FALSE;
14095 nested_loop = FALSE;
14096 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14097 || (ex9_loop_aware
14098 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14099 {
14100 /* Check the region if loop or not. If it is true and
14101 ex9-loop-aware is true, ignore the region till region end. */
14102 /* To save the status for in .no_relax ex9 region and
14103 loop region to conform the block can do ex9 relaxation. */
14104 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14105 nested_loop = (ex9_loop_aware
14106 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14107 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14108 {
14109 (*irel)++;
14110 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14111 {
14112 /* There may be nested region. */
14113 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14114 nested_ex9 = TRUE;
14115 else if (ex9_loop_aware
14116 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14117 nested_loop = TRUE;
14118 }
14119 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14120 {
14121 /* The end of region. */
14122 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14123 nested_ex9 = FALSE;
14124 else if (ex9_loop_aware
14125 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14126 nested_loop = FALSE;
14127 }
1c8f6a4d 14128 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14129 && ((*irel)->r_addend & 0x1f) == 2)
14130 {
14131 /* Alignment exist in the region. */
14132 result |= CLEAN_PRE;
14133 if (((*irel)->r_offset -
14134 get_nds32_elf_blank_total (&relax_blank_list,
14135 (*irel)->r_offset, 0)) & 0x02)
14136 result |= PUSH_PRE;
14137 }
14138 }
14139 if ((*irel) >= irelend)
14140 *off = sec->size;
14141 else
14142 *off = (*irel)->r_offset;
14143
14144 /* The final instruction in the region, regard this one as data to ignore it. */
14145 result |= DATA_EXIST;
14146 return result;
14147 }
14148 break;
14149
14150 case R_NDS32_LABEL:
1c8f6a4d 14151 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14152 {
14153 /* Check this point is align and decide to do ex9 or not. */
14154 result |= CLEAN_PRE;
14155 if (((*irel)->r_offset -
14156 get_nds32_elf_blank_total (&relax_blank_list,
14157 (*irel)->r_offset, 0)) & 0x02)
14158 result |= PUSH_PRE;
14159 }
14160 break;
14161 case R_NDS32_32_RELA:
14162 /* Data. */
14163 result |= (4 << 24);
14164 result |= DATA_EXIST;
14165 break;
14166 case R_NDS32_16_RELA:
14167 /* Data. */
14168 result |= (2 << 24);
14169 result |= DATA_EXIST;
14170 break;
14171 case R_NDS32_DATA:
14172 /* Data. */
14173 /* The least code alignment is 2. If the data is only one byte,
14174 we have to shift one more byte. */
14175 if ((*irel)->r_addend == 1)
14176 result |= ((*irel)->r_addend << 25) ;
14177 else
14178 result |= ((*irel)->r_addend << 24) ;
14179
14180 result |= DATA_EXIST;
14181 break;
14182
14183 case R_NDS32_25_PCREL_RELA:
14184 case R_NDS32_SDA16S3_RELA:
14185 case R_NDS32_SDA15S3_RELA:
14186 case R_NDS32_SDA15S3:
14187 case R_NDS32_SDA17S2_RELA:
14188 case R_NDS32_SDA15S2_RELA:
14189 case R_NDS32_SDA12S2_SP_RELA:
14190 case R_NDS32_SDA12S2_DP_RELA:
14191 case R_NDS32_SDA15S2:
14192 case R_NDS32_SDA18S1_RELA:
14193 case R_NDS32_SDA15S1_RELA:
14194 case R_NDS32_SDA15S1:
14195 case R_NDS32_SDA19S0_RELA:
14196 case R_NDS32_SDA15S0_RELA:
14197 case R_NDS32_SDA15S0:
14198 case R_NDS32_HI20_RELA:
14199 case R_NDS32_LO12S0_ORI_RELA:
14200 case R_NDS32_LO12S0_RELA:
14201 case R_NDS32_LO12S1_RELA:
14202 case R_NDS32_LO12S2_RELA:
14203 /* These relocation is supported ex9 relaxation currently. */
14204 /* We have to save the relocation for using later, since we have
14205 to check there is any alignment in the same address. */
14206 irel_save = *irel;
14207 break;
14208 default:
14209 /* Not support relocations. */
14210 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14211 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14212 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14213 {
14214 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14215 But we have to consider if there is any side-effect. */
14216 if (!(result & DATA_EXIST))
14217 {
14218 /* We have to confirm there is no data relocation in the
14219 same address. In general case, this won't happen. */
14220 /* We have to do ex9 conservative, for those relocation not
14221 considerd we ignore instruction. */
14222 result |= DATA_EXIST;
14223 if (*(contents + *off) & 0x80)
14224 result |= (2 << 24);
14225 else
14226 result |= (4 << 24);
14227 break;
14228 }
14229 }
14230 }
14231 if ((*irel) < irelend
14232 && ((*irel) + 1) < irelend
14233 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14234 /* There are relocations pointing to the same address, we have to
14235 check all of them. */
14236 (*irel)++;
14237 else
14238 {
14239 if (irel_save)
14240 *irel = irel_save;
14241 return result;
14242 }
14243 }
14244 return result;
14245}
14246
1c8f6a4d
KLC		 14247/* Replace with ex9 instruction. */
14248
14249static bfd_boolean
14250nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14251 nds32_elf_blank_t **relax_blank_list,
14252 struct elf_nds32_irel_entry *pre_irel_ptr,
14253 struct elf_nds32_irel_entry **irel_list)
14254{
14255 if (insn16 != 0)
14256 {
14257 /* Implement the ex9 relaxation. */
14258 bfd_putb16 (insn16, contents + pre_off);
14259 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14260 pre_off + 2, 2))
14261 return FALSE;
14262 if (pre_irel_ptr != NULL)
14263 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14264 }
14265 return TRUE;
14266}
14267
35c08157
KLC		 14268/* Replace input file instruction which is in ex9 itable. */
14269
14270static bfd_boolean
14271nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14272{
14273 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14274 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14275 bfd_vma off;
14276 uint16_t insn16, insn_ex9;
35c08157 14277 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14278 bfd_vma pre_off = -1;
14279 uint16_t pre_insn16 = 0;
35c08157
KLC		 14280 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14281 Elf_Internal_Rela *internal_relocs;
14282 Elf_Internal_Rela *irel;
14283 Elf_Internal_Rela *irelend;
14284 Elf_Internal_Shdr *symtab_hdr;
14285 Elf_Internal_Sym *isym = NULL;
14286 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14287 uint32_t insn = 0;
14288 uint32_t insn_with_reg = 0;
14289 uint32_t it_insn;
14290 uint32_t it_insn_with_reg;
35c08157
KLC		 14291 unsigned long r_symndx;
14292 asection *isec;
14293 struct elf_nds32_irel_entry *irel_list = NULL;
14294 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14295 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14296 struct elf_link_hash_entry_list *h_list;
14297
35c08157
KLC		 14298
14299 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14300 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 14301 || !nds32_get_local_syms (abfd, sec, &isym))
14302 return FALSE;
1c8f6a4d
KLC		 14303 internal_relocs =
14304 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14305 irelend = internal_relocs + sec->reloc_count;
14306 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14307
14308 off = 0;
14309
14310 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14311 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14312 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14313
14314 /* Check this section trigger ex9 relaxation. */
14315 if (irel == NULL
14316 || irel >= irelend
14317 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14318 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14319 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14320 return TRUE;
14321
14322 irel = internal_relocs;
14323
14324 /* Check alignment and fetch proper relocation. */
14325 while (off < sec->size)
14326 {
14327 struct elf_link_hash_entry *h = NULL;
14328 struct elf_nds32_irel_entry *irel_ptr = NULL;
14329
14330 /* Syn the instruction and the relocation. */
14331 while (irel != NULL && irel < irelend && irel->r_offset < off)
14332 irel++;
14333
14334 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14335 relax_blank_list, sec,
14336 &off, contents);
14337 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14338 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14339 &relax_blank_list, pre_irel_ptr,
14340 &irel_list))
14341 return FALSE;
35c08157
KLC		 14342
14343 if (data_flag & CLEAN_PRE)
14344 {
14345 pre_off = 0;
14346 pre_insn16 = 0;
14347 pre_irel_ptr = NULL;
14348 }
14349 if (data_flag & DATA_EXIST)
14350 {
14351 /* We save the move offset in the highest byte. */
14352 off += (data_flag >> 24);
14353 continue;
14354 }
14355
14356 if (*(contents + off) & 0x80)
14357 {
14358 /* 2-byte instruction. */
14359 off += 2;
14360 continue;
14361 }
14362
14363 /* Load the instruction and its opcode with register for comparing. */
14364 ex9_insn = ex9_insn_head;
14365 insn = bfd_getb32 (contents + off);
14366 insn_with_reg = 0;
14367 while (ex9_insn)
14368 {
14369 it_insn = strtol (ex9_insn->string, NULL, 16);
14370 it_insn_with_reg = 0;
14371 do_replace = 0;
14372 save_irel = 0;
14373
14374 if (irel != NULL && irel < irelend && irel->r_offset == off)
14375 {
14376 /* Insn with relocation. */
14377 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14378
14379 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14380 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14381 &it_insn_with_reg);
35c08157
KLC		 14382
14383 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14384 && (ELF32_R_TYPE (irel->r_info) ==
14385 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14386 && (insn_with_reg == it_insn_with_reg))
14387 {
14388 /* Insn relocation and format is the same as table entry. */
14389
14390 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14391 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14392 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14393 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14394 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14395 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14396 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14397 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14398 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14399 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14400 && ELF32_R_TYPE (irel->r_info) <=
14401 R_NDS32_SDA12S2_SP_RELA)
14402 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14403 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14404 {
14405 r_symndx = ELF32_R_SYM (irel->r_info);
14406 if (r_symndx < symtab_hdr->sh_info)
14407 {
14408 /* Local symbol. */
14409 int shndx = isym[r_symndx].st_shndx;
14410
14411 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14412 if (ex9_insn->sec == isec
14413 && ex9_insn->irel->r_addend == irel->r_addend
14414 && ex9_insn->irel->r_info == irel->r_info)
14415 {
14416 do_replace = 1;
14417 save_irel = 1;
14418 }
14419 }
14420 else
14421 {
14422 /* External symbol. */
14423 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14424 if (ex9_insn->m_list)
14425 {
35c08157
KLC		 14426 h_list = ex9_insn->m_list->h_list;
14427 while (h_list)
14428 {
14429 if (h == h_list->h
1c8f6a4d
KLC		 14430 && (ex9_insn->m_list->irel->r_addend ==
14431 irel->r_addend))
35c08157
KLC		 14432 {
14433 do_replace = 1;
14434 save_irel = 1;
14435 break;
14436 }
14437 h_list = h_list->next;
14438 }
14439 }
14440 }
14441 }
14442 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14443 {
14444 r_symndx = ELF32_R_SYM (irel->r_info);
14445 if (r_symndx < symtab_hdr->sh_info)
14446 {
14447 /* Local symbols. Compare its base symbol and offset. */
14448 int shndx = isym[r_symndx].st_shndx;
14449
14450 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14451 if (ex9_insn->sec == isec
14452 && ex9_insn->irel->r_addend == irel->r_addend
14453 && ex9_insn->irel->r_info == irel->r_info)
14454 {
14455 do_replace = 1;
14456 save_irel = 1;
14457 }
14458 }
14459 else
14460 {
14461 /* External symbol. */
14462 struct elf_link_hash_entry_mul_list *m_list;
14463
14464 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14465 m_list = ex9_insn->m_list;
14466
14467 while (m_list)
14468 {
1c8f6a4d 14469 h_list = m_list->h_list;
35c08157
KLC		 14470
14471 while (h_list)
14472 {
14473 if (h == h_list->h
1c8f6a4d
KLC		 14474 && (m_list->irel->r_addend
14475 == irel->r_addend))
35c08157
KLC		 14476 {
14477 do_replace = 1;
14478 save_irel = 1;
14479 if (ex9_insn->next
14480 && ex9_insn->m_list
14481 && ex9_insn->m_list == ex9_insn->next->m_list)
14482 {
14483 /* sethi multiple entry must be fixed */
14484 nds32_elf_ex9_insert_fix (sec, irel,
14485 h, ex9_insn->order);
14486 }
14487 break;
14488 }
14489 h_list = h_list->next;
14490 }
14491 m_list = m_list->next;
14492 }
14493 }
14494 }
14495 }
14496
14497 /* Import table: Check the symbol hash table and the
14498 jump target. Only R_NDS32_25_PCREL_RELA now. */
14499 else if (ex9_insn->times == -1
14500 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14501 {
14502 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14503 if (insn_with_reg == it_insn_with_reg)
14504 {
14505 char code[10];
14506 bfd_vma relocation;
14507
14508 r_symndx = ELF32_R_SYM (irel->r_info);
14509 if (r_symndx >= symtab_hdr->sh_info)
14510 {
14511 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14512 if ((h->root.type == bfd_link_hash_defined
14513 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14514 && h->root.u.def.section != NULL
14515 && h->root.u.def.section->output_section != NULL
35c08157 14516 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14517 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14518 && h->root.u.def.value > sec->size)
14519 {
1c8f6a4d
KLC		 14520 relocation = h->root.u.def.value +
14521 h->root.u.def.section->output_section->vma +
14522 h->root.u.def.section->output_offset;
35c08157 14523 relocation += irel->r_addend;
1c8f6a4d
KLC		 14524 insn = insn_with_reg
14525 | ((relocation >> 1) & 0xffffff);
14526 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14527 if (strcmp (code, ex9_insn->string) == 0)
14528 {
14529 do_replace = 1;
14530 save_irel = 1;
14531 }
14532 }
14533 }
14534 }
14535 }
14536 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14537 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14538 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14539 {
14540 /* These relocations do not have to relocate contens, so it can
14541 be regard as instruction without relocation. */
14542 if (insn == it_insn && ex9_insn->irel == NULL)
14543 do_replace = 1;
14544 }
14545 }
14546 else
14547 {
14548 /* Instruction without relocation, we only
14549 have to compare their byte code. */
14550 if (insn == it_insn && ex9_insn->irel == NULL)
14551 do_replace = 1;
14552 }
14553
14554 /* Insntruction match so replacing the code here. */
14555 if (do_replace == 1)
14556 {
14557 /* There are two formats of ex9 instruction. */
14558 if (ex9_insn->order < 32)
14559 insn_ex9 = INSN_EX9_IT_2;
14560 else
14561 insn_ex9 = INSN_EX9_IT_1;
14562 insn16 = insn_ex9 | ex9_insn->order;
14563
1c8f6a4d
KLC		 14564 /* Insert ex9 instruction. */
14565 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14566 &relax_blank_list, pre_irel_ptr,
14567 &irel_list);
35c08157
KLC		 14568 pre_off = off;
14569 pre_insn16 = insn16;
14570
14571 if (save_irel)
14572 {
14573 /* For instuction with relocation do relax. */
14574 irel_ptr = (struct elf_nds32_irel_entry *)
14575 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14576 irel_ptr->irel = irel;
14577 irel_ptr->next = NULL;
14578 pre_irel_ptr = irel_ptr;
14579 }
14580 else
14581 pre_irel_ptr = NULL;
14582 break;
14583 }
14584 ex9_insn = ex9_insn->next;
14585 }
14586 off += 4;
14587 }
14588
1c8f6a4d
KLC		 14589 /* Insert ex9 instruction. */
14590 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14591 &relax_blank_list, pre_irel_ptr,
14592 &irel_list);
35c08157
KLC		 14593
14594 /* Delete the redundant code. */
14595 if (relax_blank_list)
14596 {
14597 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14598 relax_blank_list = NULL;
14599 }
14600
14601 /* Clear the relocation that is replaced by ex9. */
14602 while (irel_list)
14603 {
14604 struct elf_nds32_irel_entry *irel_ptr;
14605
14606 irel_ptr = irel_list;
14607 irel_list = irel_ptr->next;
14608 irel_ptr->irel->r_info =
14609 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14610 free (irel_ptr);
14611 }
14612 return TRUE;
14613}
14614
14615/* Initialize ex9 hash table. */
14616
14617int
14618nds32_elf_ex9_init (void)
14619{
14620 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14621 sizeof (struct elf_nds32_code_hash_entry),
14622 1023))
14623 {
38f14ab8 14624 _bfd_error_handler (_("cannot init ex9 hash table error"));
35c08157
KLC		 14625 return FALSE;
14626 }
14627 return TRUE;
14628}
14629
14630/* Predict how many bytes will be relaxed with ex9 and ifc. */
14631
14632static void
14633nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14634{
14635 struct elf_nds32_insn_times_entry *ex9_insn;
14636 struct elf_nds32_insn_times_entry *temp;
14637 int target_optimize;
14638 struct elf_nds32_link_hash_table *table;
14639
14640 if (ex9_insn_head == NULL)
14641 return;
14642
14643 table = nds32_elf_hash_table (info);
14644 target_optimize = table->target_optimize;
14645 ex9_insn = ex9_insn_head;
14646 while (ex9_insn)
14647 {
14648 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14649 temp = ex9_insn;
14650 ex9_insn = ex9_insn->next;
14651 free (temp);
14652 }
14653 ex9_insn_head = NULL;
14654
14655 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14656 {
14657 /* Examine ifc reduce size. */
14658 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14659 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14660 int size = 0;
14661
14662 while (ifc_ent)
14663 {
14664 if (ifc_ent->enable == 0)
14665 {
14666 /* Not ifc yet. */
14667 irel_ptr = ifc_ent->irel_head;
14668 while (irel_ptr)
14669 {
14670 size += 2;
14671 irel_ptr = irel_ptr->next;
14672 }
14673 }
14674 size -= 2;
14675 ifc_ent = ifc_ent->next;
14676 }
14677 ex9_relax_size += size;
14678 }
14679}
14680
14681/* Finish ex9 table. */
14682
14683void
14684nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14685{
35c08157
KLC		 14686 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14687 nds32_elf_order_insn_times (link_info);
14688 nds32_elf_ex9_total_relax (link_info);
14689 /* Traverse the hash table and count its times. */
14690 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14691 nds32_elf_order_insn_times (link_info);
14692 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14693}
14694
14695/* Relocate the entries in ex9 table. */
14696
14697static bfd_vma
14698nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14699 struct bfd_link_info *link_info)
14700{
14701 Elf_Internal_Sym *isym = NULL;
14702 bfd_vma relocation = -1;
1c8f6a4d 14703 struct elf_link_hash_entry *h;
35c08157
KLC		 14704
14705 if (ptr->m_list != NULL)
14706 {
14707 /* Global symbol. */
1c8f6a4d
KLC		 14708 h = ptr->m_list->h_list->h;
14709 if ((h->root.type == bfd_link_hash_defined
14710 || h->root.type == bfd_link_hash_defweak)
14711 && h->root.u.def.section != NULL
14712 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14713 {
14714
1c8f6a4d
KLC		 14715 relocation = h->root.u.def.value +
14716 h->root.u.def.section->output_section->vma +
14717 h->root.u.def.section->output_offset;
35c08157
KLC		 14718 relocation += ptr->m_list->irel->r_addend;
14719 }
14720 else
14721 relocation = 0;
14722 }
14723 else if (ptr->sec !=NULL)
14724 {
14725 /* Local symbol. */
14726 Elf_Internal_Sym sym;
14727 asection *sec = NULL;
14728 asection isec;
14729 asection *isec_ptr = &isec;
14730 Elf_Internal_Rela irel_backup = *(ptr->irel);
14731 asection *sec_backup = ptr->sec;
14732 bfd *abfd = ptr->sec->owner;
14733
14734 if (!nds32_get_local_syms (abfd, sec, &isym))
14735 return FALSE;
14736 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14737
14738 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14739 if (sec != NULL)
14740 *isec_ptr = *sec;
14741 sym = *isym;
14742
14743 /* The purpose is same as elf_link_input_bfd. */
14744 if (isec_ptr != NULL
14745 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14746 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14747 {
14748 sym.st_value =
14749 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14750 elf_section_data (isec_ptr)->sec_info,
14751 isym->st_value);
14752 }
14753 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14754 &ptr->sec, ptr->irel);
14755 if (ptr->irel != NULL)
14756 relocation += ptr->irel->r_addend;
14757
14758 /* Restore origin value since there may be some insntructions that
14759 could not be replaced with ex9.it. */
14760 *(ptr->irel) = irel_backup;
14761 ptr->sec = sec_backup;
14762 }
14763
14764 return relocation;
14765}
14766
14767/* Import ex9 table and build list. */
14768
14769void
14770nds32_elf_ex9_import_table (struct bfd_link_info *info)
14771{
1c8f6a4d 14772 int num = 0;
35c08157 14773 bfd_byte *contents;
35c08157
KLC		 14774 FILE *ex9_import_file;
14775 int update_ex9_table;
14776 struct elf_nds32_link_hash_table *table;
14777
14778 table = nds32_elf_hash_table (info);
14779 ex9_import_file = table->ex9_import_file;
1c8f6a4d 14780 rewind (table->ex9_import_file);
35c08157
KLC		 14781
14782 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14783
35c08157 14784 /* Read instructions from the input file and build the list. */
1c8f6a4d 14785 while (!feof (ex9_import_file))
35c08157 14786 {
1b7e3d2f 14787 unsigned long insn;
35c08157
KLC		 14788 char *code;
14789 struct elf_nds32_insn_times_entry *ptr;
14790 size_t nread;
14791
14792 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 14793 /* Ignore the final byte 0x0a. */
14794 if (nread < 1)
14795 break;
35c08157
KLC		 14796 insn = bfd_getb32 (contents);
14797 code = bfd_malloc (sizeof (char) * 9);
1b7e3d2f 14798 snprintf (code, 9, "%08lx", (insn & 0xffffffff));
35c08157
KLC		 14799 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14800 ptr->string = code;
14801 ptr->order = num;
14802 ptr->times = -1;
14803 ptr->sec = NULL;
14804 ptr->m_list = NULL;
14805 ptr->rel_backup.r_offset = 0;
14806 ptr->rel_backup.r_info = 0;
14807 ptr->rel_backup.r_addend = 0;
14808 ptr->irel = NULL;
14809 ptr->next = NULL;
14810 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 14811 num++;
14812 }
14813
14814 update_ex9_table = table->update_ex9_table;
14815 if (update_ex9_table == 1)
14816 {
14817 /* It has to consider of sethi need to use multiple page
14818 but it not be done yet. */
14819 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14820 nds32_elf_order_insn_times (info);
14821 }
14822}
14823
14824/* Export ex9 table. */
14825
14826static void
14827nds32_elf_ex9_export (struct bfd_link_info *info,
14828 bfd_byte *contents, int size)
14829{
14830 FILE *ex9_export_file;
14831 struct elf_nds32_link_hash_table *table;
14832
14833 table = nds32_elf_hash_table (info);
14834 ex9_export_file = table->ex9_export_file;
14835 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
14836 fclose (ex9_export_file);
14837}
14838
14839/* Adjust relocations of J and JAL in ex9.itable.
14840 Export ex9 table. */
14841
1c8f6a4d 14842static void
35c08157
KLC		 14843nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
14844{
14845 asection *table_sec = NULL;
14846 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14847 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
14848 bfd *it_abfd;
1c8f6a4d 14849 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 14850 bfd_byte *contents = NULL, *source_contents = NULL;
14851 int size = 0;
14852 bfd_vma gp;
14853 int shift, update_ex9_table, offset = 0;
14854 reloc_howto_type *howto = NULL;
14855 Elf_Internal_Rela rel_backup;
14856 unsigned short insn_ex9;
14857 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 14858 FILE *ex9_export_file;
14859 static bfd_boolean done = FALSE;
14860
14861 if (done)
14862 return;
14863
14864 done = TRUE;
35c08157
KLC		 14865
14866 table = nds32_elf_hash_table (link_info);
14867 if (table)
14868 table->relax_status |= NDS32_RELAX_EX9_DONE;
14869
14870
14871 update_ex9_table = table->update_ex9_table;
14872 /* Generated ex9.itable exactly. */
14873 if (update_ex9_table == 0)
14874 {
14875 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14876 it_abfd = it_abfd->link.next)
35c08157
KLC		 14877 {
14878 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14879 if (table_sec != NULL)
14880 break;
14881 }
14882
14883 if (table_sec != NULL)
14884 {
14885 bfd *output_bfd;
35c08157
KLC		 14886
14887 output_bfd = table_sec->output_section->owner;
14888 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14889 if (table_sec->size == 0)
14890 return;
14891
0c4bd9d9 14892 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 14893 return;
35c08157
KLC		 14894 }
14895 }
14896 else
14897 {
14898 /* Set gp. */
14899 bfd *output_bfd;
14900
14901 output_bfd = link_info->input_bfds->sections->output_section->owner;
14902 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14903 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
14904 }
14905
14906 /* Relocate instruction. */
14907 while (ex9_insn)
14908 {
14909 bfd_vma relocation, min_relocation = 0xffffffff;
14910
14911 insn = strtol (ex9_insn->string, NULL, 16);
14912 insn_with_reg = 0;
14913 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
14914 {
14915 if (ex9_insn->m_list)
14916 rel_backup = ex9_insn->m_list->rel_backup;
14917 else
14918 rel_backup = ex9_insn->rel_backup;
14919
14920 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
14921 howto =
14922 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
14923 (rel_backup.r_info));
14924 shift = howto->rightshift;
14925 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
14926 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
14927 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
14928 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
14929 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
14930 {
14931 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14932 insn =
14933 insn_with_reg | ((relocation >> shift) &
14934 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14935 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14936 }
14937 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
14938 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
14939 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
14940 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
14941 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
14942 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
14943 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
14944 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
14945 {
14946 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14947 insn =
14948 insn_with_reg | (((relocation - gp) >> shift) &
14949 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14950 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14951 }
14952 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
14953 {
14954 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 14955 if (ex9_insn->next && ex9_insn->m_list
14956 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 14957 {
14958 struct elf_link_hash_entry_mul_list *m_list;
14959 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 14960 struct elf_link_hash_entry *h;
35c08157
KLC		 14961
14962 temp_ptr = ex9_insn;
14963 temp_ptr2 = ex9_insn;
14964 m_list = ex9_insn->m_list;
14965 while (m_list)
14966 {
1c8f6a4d
KLC		 14967 h = m_list->h_list->h;
14968 relocation = h->root.u.def.value +
14969 h->root.u.def.section->output_section->vma +
14970 h->root.u.def.section->output_offset;
35c08157
KLC		 14971 relocation += m_list->irel->r_addend;
14972
14973 if (relocation < min_relocation)
14974 min_relocation = relocation;
14975 m_list = m_list->next;
14976 }
14977 relocation = min_relocation;
14978
14979 /* Put insntruction into ex9 table. */
14980 insn = insn_with_reg
14981 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14982 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14983 relocation = relocation + 0x1000; /* hi20 */
14984
1c8f6a4d
KLC		 14985 while (ex9_insn->next && ex9_insn->m_list
14986 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 14987 {
14988 /* Multiple sethi. */
14989 ex9_insn = ex9_insn->next;
14990 size += 4;
35c08157
KLC		 14991 insn =
14992 insn_with_reg | ((relocation >> shift) &
14993 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14994 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14995 relocation = relocation + 0x1000; /* hi20 */
14996 }
14997
14998 fix_ptr = ex9_refix_head;
14999 while (fix_ptr)
15000 {
15001 /* Fix ex9 insn. */
15002 /* temp_ptr2 points to the head of multiple sethi. */
15003 temp_ptr = temp_ptr2;
15004 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15005 {
15006 fix_ptr = fix_ptr->next;
15007 }
15008 if (fix_ptr->order != temp_ptr->order)
15009 break;
15010
15011 /* Set source insn. */
1c8f6a4d
KLC		 15012 relocation =
15013 fix_ptr->h->root.u.def.value +
15014 fix_ptr->h->root.u.def.section->output_section->vma +
15015 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 15016 relocation += fix_ptr->irel->r_addend;
15017 /* sethi imm is imm20s. */
15018 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15019
15020 while (temp_ptr)
15021 {
35c08157
KLC		 15022 /* Match entry and source code. */
15023 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15024 if (insn == source_insn)
15025 {
15026 /* Fix the ex9 insn. */
15027 if (temp_ptr->order != fix_ptr->order)
15028 {
15029 if (!nds32_get_section_contents
15030 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15031 &source_contents, TRUE))
4eca0228 15032 _bfd_error_handler
38f14ab8 15033 (_("error: cannot fix ex9 relocation"));
35c08157
KLC		 15034 if (temp_ptr->order < 32)
15035 insn_ex9 = INSN_EX9_IT_2;
15036 else
15037 insn_ex9 = INSN_EX9_IT_1;
15038 insn_ex9 = insn_ex9 | temp_ptr->order;
15039 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15040 }
15041 break;
15042 }
15043 else
15044 {
15045 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
4eca0228 15046 _bfd_error_handler
35c08157
KLC		 15047 (_("Linker: error cannot fixed ex9 relocation \n"));
15048 else
15049 temp_ptr = temp_ptr->next;
15050 }
15051 }
15052 fix_ptr = fix_ptr->next;
15053 }
15054 }
15055 else
15056 {
15057 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15058 insn = insn_with_reg
15059 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15060 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15061 }
15062 }
15063 }
15064 else
15065 {
15066 /* Insn without relocation does not have to be fixed
15067 if need to update export table. */
15068 if (update_ex9_table == 1)
15069 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15070 }
15071 ex9_insn = ex9_insn->next;
15072 size += 4;
15073 }
15074
15075 ex9_export_file = table->ex9_export_file;
15076 if (ex9_export_file != NULL)
1c8f6a4d 15077 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15078 else if (update_ex9_table == 1)
15079 {
1c8f6a4d
KLC		 15080 table->ex9_export_file = table->ex9_import_file;
15081 rewind (table->ex9_export_file);
15082 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15083 }
15084}
15085
15086/* Generate ex9 hash table. */
15087
15088static bfd_boolean
f4cb41f4 15089nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15090 struct bfd_link_info *link_info)
15091{
15092 Elf_Internal_Rela *internal_relocs;
15093 Elf_Internal_Rela *irelend;
15094 Elf_Internal_Rela *irel;
15095 Elf_Internal_Rela *jrel;
15096 Elf_Internal_Rela rel_backup;
15097 Elf_Internal_Shdr *symtab_hdr;
15098 Elf_Internal_Sym *isym = NULL;
15099 asection *isec;
15100 struct elf_link_hash_entry **sym_hashes;
15101 bfd_byte *contents = NULL;
f4cb41f4 15102 bfd_vma off = 0;
35c08157 15103 unsigned long r_symndx;
1c8f6a4d 15104 uint32_t insn, insn_with_reg;
35c08157
KLC		 15105 struct elf_link_hash_entry *h;
15106 int data_flag, shift, align;
15107 bfd_vma relocation;
15108 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15109 reloc_howto_type *howto = NULL;
15110
15111 sym_hashes = elf_sym_hashes (abfd);
15112 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15113 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 15114 return FALSE;
15115
15116 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15117 TRUE /* keep_memory */);
15118 irelend = internal_relocs + sec->reloc_count;
15119 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15120 if (!nds32_get_local_syms (abfd, sec, &isym))
15121 return FALSE;
15122
15123 /* Check the object if enable ex9. */
15124 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15125 R_NDS32_RELAX_ENTRY);
15126
15127 /* Check this section trigger ex9 relaxation. */
15128 if (irel == NULL
15129 || irel >= irelend
15130 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15131 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15132 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15133 return TRUE;
15134
15135 irel = internal_relocs;
15136
15137 /* Push each insn into hash table. */
15138 while (off < sec->size)
15139 {
15140 char code[10];
15141 struct elf_nds32_code_hash_entry *entry;
15142
15143 while (irel != NULL && irel < irelend && irel->r_offset < off)
15144 irel++;
15145
1c8f6a4d
KLC		 15146 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15147 NULL, sec, &off, contents);
35c08157
KLC		 15148 if (data_flag & DATA_EXIST)
15149 {
15150 /* We save the move offset in the highest byte. */
15151 off += (data_flag >> 24);
15152 continue;
15153 }
15154
15155 if (*(contents + off) & 0x80)
15156 {
15157 off += 2;
15158 }
15159 else
15160 {
15161 h = NULL;
15162 isec = NULL;
15163 jrel = NULL;
15164 rel_backup.r_info = 0;
15165 rel_backup.r_offset = 0;
15166 rel_backup.r_addend = 0;
15167 /* Load the instruction and its opcode with register for comparing. */
15168 insn = bfd_getb32 (contents + off);
15169 insn_with_reg = 0;
15170 if (irel != NULL && irel < irelend && irel->r_offset == off)
15171 {
15172 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15173 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15174 shift = howto->rightshift;
15175 align = (1 << shift) - 1;
15176 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15177 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15178 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15179 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15180 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15181 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15182 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15183 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15184 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15185 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15186 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15187 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15188 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15189 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15190 {
15191 r_symndx = ELF32_R_SYM (irel->r_info);
15192 jrel = irel;
15193 rel_backup = *irel;
15194 if (r_symndx < symtab_hdr->sh_info)
15195 {
15196 /* Local symbol. */
15197 int shndx = isym[r_symndx].st_shndx;
15198
15199 bfd_vma st_value = (isym + r_symndx)->st_value;
15200 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15201 relocation = (isec->output_section->vma + isec->output_offset
15202 + st_value + irel->r_addend);
15203 }
15204 else
15205 {
15206 /* External symbol. */
15207 bfd_boolean warned ATTRIBUTE_UNUSED;
15208 bfd_boolean ignored ATTRIBUTE_UNUSED;
15209 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15210 asection *sym_sec;
15211
15212 /* Maybe there is a better way to get h and relocation */
15213 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15214 r_symndx, symtab_hdr, sym_hashes,
15215 h, sym_sec, relocation,
15216 unresolved_reloc, warned, ignored);
15217 relocation += irel->r_addend;
1c8f6a4d
KLC		 15218 if ((h->root.type != bfd_link_hash_defined
15219 && h->root.type != bfd_link_hash_defweak)
15220 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15221 {
15222 off += 4;
15223 continue;
15224 }
15225 }
15226
15227 /* Check for gp relative instruction alignment. */
15228 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15229 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15230 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15231 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15232 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15233 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15234 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15235 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15236 {
15237 bfd_vma gp;
15238 bfd *output_bfd = sec->output_section->owner;
15239 bfd_reloc_status_type r;
15240
15241 /* If the symbol is in the abs section, the out_bfd will be null.
15242 This happens when the relocation has a symbol@GOTOFF. */
15243 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15244 if (r != bfd_reloc_ok)
15245 {
15246 off += 4;
15247 continue;
15248 }
15249
15250 relocation -= gp;
15251
15252 /* Make sure alignment is correct. */
15253 if (relocation & align)
15254 {
15255 /* Incorrect alignment. */
4eca0228 15256 _bfd_error_handler
695344c0 15257 /* xgettext:c-format */
871b3ab2 15258 (_("%pB: warning: unaligned small data access "
2dcf00ce
AM		 15259 "for entry: {%" PRId64 ", %" PRId64 ", %" PRId64
15260 "}, addr = %#" PRIx64 ", align = %#x"),
15261 abfd, (int64_t) irel->r_offset,
15262 (int64_t) irel->r_info, (int64_t) irel->r_addend,
15263 (uint64_t) relocation, align);
35c08157
KLC		 15264 off += 4;
15265 continue;
15266 }
15267 }
15268
15269 insn = insn_with_reg
15270 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15271 }
15272 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15273 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15274 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15275 {
15276 /* These relocations do not have to relocate contens, so it can
15277 be regard as instruction without relocation. */
15278 }
15279 else
15280 {
15281 off += 4;
15282 continue;
15283 }
15284 }
15285
1c8f6a4d 15286 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15287 /* Copy "code". */
15288 entry = (struct elf_nds32_code_hash_entry*)
15289 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15290 if (entry == NULL)
15291 {
4eca0228 15292 _bfd_error_handler
d42c267e 15293 (_("failed creating ex9.it %s hash table entry"), code);
35c08157
KLC		 15294 return FALSE;
15295 }
15296 if (h)
15297 {
15298 if (h->root.type == bfd_link_hash_undefined)
15299 return TRUE;
15300 /* Global symbol. */
15301 /* In order to do sethi with different symbol but same value. */
15302 if (entry->m_list == NULL)
15303 {
15304 struct elf_link_hash_entry_mul_list *m_list_new;
15305 struct elf_link_hash_entry_list *h_list_new;
15306
15307 m_list_new = (struct elf_link_hash_entry_mul_list *)
15308 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15309 h_list_new = (struct elf_link_hash_entry_list *)
15310 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15311 entry->m_list = m_list_new;
15312 m_list_new->h_list = h_list_new;
15313 m_list_new->rel_backup = rel_backup;
15314 m_list_new->times = 1;
15315 m_list_new->irel = jrel;
15316 m_list_new->next = NULL;
15317 h_list_new->h = h;
15318 h_list_new->next = NULL;
15319 }
15320 else
15321 {
15322 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15323 struct elf_link_hash_entry_list *h_list;
15324
15325 while (m_list)
15326 {
15327 /* Build the different symbols that point to the same address. */
15328 h_list = m_list->h_list;
15329 if (h_list->h->root.u.def.value == h->root.u.def.value
15330 && h_list->h->root.u.def.section->output_section->vma
15331 == h->root.u.def.section->output_section->vma
15332 && h_list->h->root.u.def.section->output_offset
15333 == h->root.u.def.section->output_offset
15334 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15335 {
15336 m_list->times++;
15337 m_list->irel = jrel;
15338 while (h_list->h != h && h_list->next)
15339 h_list = h_list->next;
15340 if (h_list->h != h)
15341 {
15342 struct elf_link_hash_entry_list *h_list_new;
15343
15344 h_list_new = (struct elf_link_hash_entry_list *)
15345 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15346 h_list->next = h_list_new;
15347 h_list_new->h = h;
15348 h_list_new->next = NULL;
15349 }
15350 break;
15351 }
15352 /* The sethi case may have different address but the
15353 hi20 is the same. */
15354 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15355 && m_list->next == NULL)
15356 {
15357 struct elf_link_hash_entry_mul_list *m_list_new;
15358 struct elf_link_hash_entry_list *h_list_new;
15359
15360 m_list_new = (struct elf_link_hash_entry_mul_list *)
15361 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15362 h_list_new = (struct elf_link_hash_entry_list *)
15363 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15364 m_list->next = m_list_new;
15365 m_list_new->h_list = h_list_new;
15366 m_list_new->rel_backup = rel_backup;
15367 m_list_new->times = 1;
15368 m_list_new->irel = jrel;
15369 m_list_new->next = NULL;
15370 h_list_new->h = h;
15371 h_list_new->next = NULL;
15372 break;
15373 }
15374 m_list = m_list->next;
15375 }
15376 if (!m_list)
15377 {
15378 off += 4;
15379 continue;
15380 }
15381 }
15382 }
15383 else
15384 {
15385 /* Local symbol and insn without relocation*/
15386 entry->times++;
15387 entry->rel_backup = rel_backup;
15388 }
15389
15390 /* Use in sethi insn with constant and global symbol in same format. */
15391 if (!jrel)
15392 entry->const_insn = 1;
15393 else
15394 entry->irel = jrel;
15395 entry->sec = isec;
15396 off += 4;
15397 }
15398 }
15399 return TRUE;
15400}
15401
15402/* Set the _ITB_BASE, and point it to ex9 table. */
15403
15404bfd_boolean
15405nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15406{
15407 bfd *abfd;
15408 asection *sec;
15409 bfd *output_bfd = NULL;
15410 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15411
15412 if (is_ITB_BASE_set == 1)
15413 return TRUE;
15414
15415 is_ITB_BASE_set = 1;
15416
1c8f6a4d
KLC		 15417 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15418
15419 if (bh && (bh->type == bfd_link_hash_defined
15420 || bh->type == bfd_link_hash_defweak))
15421 return TRUE;
35c08157
KLC		 15422
15423 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15424 abfd = abfd->link.next)
35c08157
KLC		 15425 {
15426 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15427 if (sec != NULL)
15428 {
15429 output_bfd = sec->output_section->owner;
15430 break;
15431 }
15432 }
15433 if (output_bfd == NULL)
15434 {
15435 output_bfd = link_info->output_bfd;
15436 if (output_bfd->sections == NULL)
15437 return TRUE;
15438 else
15439 sec = bfd_abs_section_ptr;
15440 }
15441 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15442 FALSE, FALSE, TRUE);
15443 return (_bfd_generic_link_add_one_symbol
15444 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15445 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15446 (const char *) NULL, FALSE, get_elf_backend_data
15447 (output_bfd)->collect, &bh));
15448} /* End EX9.IT */
15449\f
15450
15451#define ELF_ARCH bfd_arch_nds32
15452#define ELF_MACHINE_CODE EM_NDS32
15453#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 15454#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15455
6d00b590 15456#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15457#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15458#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15459#define TARGET_LITTLE_NAME "elf32-nds32le"
15460
15461#define elf_info_to_howto nds32_info_to_howto
15462#define elf_info_to_howto_rel nds32_info_to_howto_rel
15463
15464#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15465#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15466#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15467#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15468#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15469
07d6d2b8 15470#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15471#define elf_backend_action_discarded nds32_elf_action_discarded
15472#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15473#define elf_backend_check_relocs nds32_elf_check_relocs
15474#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15475#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15476#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15477#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15478#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15479#define elf_backend_relocate_section nds32_elf_relocate_section
15480#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 15481#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15482#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15483#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15484#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15485#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15486#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15487#define elf_backend_object_p nds32_elf_object_p
15488#define elf_backend_final_write_processing nds32_elf_final_write_processing
15489#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d 15490#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 15491 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15492
15493#define elf_backend_can_gc_sections 1
15494#define elf_backend_can_refcount 1
15495#define elf_backend_want_got_plt 1
15496#define elf_backend_plt_readonly 1
15497#define elf_backend_want_plt_sym 0
15498#define elf_backend_got_header_size 12
15499#define elf_backend_may_use_rel_p 1
15500#define elf_backend_default_use_rela_p 1
15501#define elf_backend_may_use_rela_p 1
64f52338 15502#define elf_backend_dtrel_excludes_plt 1
35c08157
KLC		 15503
15504#include "elf32-target.h"
15505
15506#undef ELF_MAXPAGESIZE
15507#define ELF_MAXPAGESIZE 0x2000
15508
15509#undef TARGET_BIG_SYM
6d00b590 15510#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15511#undef TARGET_BIG_NAME
15512#define TARGET_BIG_NAME "elf32-nds32be-linux"
15513#undef TARGET_LITTLE_SYM
6d00b590 15514#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15515#undef TARGET_LITTLE_NAME
15516#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15517#undef elf32_bed
15518#define elf32_bed elf32_nds32_lin_bed
15519
15520#include "elf32-target.h"
GDB Binutils - Deliverables
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