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99c513f6 | 1 | /* Renesas RL78 specific support for 32-bit ELF. |
b90efa5b | 2 | Copyright (C) 2011-2015 Free Software Foundation, Inc. |
99c513f6 DD |
3 | |
4 | This file is part of BFD, the Binary File Descriptor library. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #include "sysdep.h" | |
21 | #include "bfd.h" | |
22 | #include "bfd_stdint.h" | |
23 | #include "libbfd.h" | |
24 | #include "elf-bfd.h" | |
25 | #include "elf/rl78.h" | |
26 | #include "libiberty.h" | |
27 | ||
28 | #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) | |
29 | ||
30 | #define RL78REL(n,sz,bit,shift,complain,pcrel) \ | |
31 | HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ | |
32 | bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) | |
33 | ||
6ff71e76 NC |
34 | static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, |
35 | asection *, bfd *, char **); | |
36 | ||
37 | /* FIXME: We could omit the SHIFT parameter, it is always zero. */ | |
38 | #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \ | |
39 | HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ | |
40 | rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) | |
41 | ||
99c513f6 DD |
42 | /* Note that the relocations around 0x7f are internal to this file; |
43 | feel free to move them as needed to avoid conflicts with published | |
44 | relocation numbers. */ | |
45 | ||
46 | static reloc_howto_type rl78_elf_howto_table [] = | |
47 | { | |
6346d5ca | 48 | RL78REL (NONE, 3, 0, 0, dont, FALSE), |
99c513f6 DD |
49 | RL78REL (DIR32, 2, 32, 0, signed, FALSE), |
50 | RL78REL (DIR24S, 2, 24, 0, signed, FALSE), | |
51 | RL78REL (DIR16, 1, 16, 0, dont, FALSE), | |
52 | RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), | |
53 | RL78REL (DIR16S, 1, 16, 0, signed, FALSE), | |
54 | RL78REL (DIR8, 0, 8, 0, dont, FALSE), | |
55 | RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), | |
56 | RL78REL (DIR8S, 0, 8, 0, signed, FALSE), | |
57 | RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), | |
58 | RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), | |
59 | RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), | |
60 | RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), | |
61 | RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), | |
62 | RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), | |
63 | RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), | |
64 | RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), | |
65 | RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), | |
66 | RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), | |
67 | ||
68 | EMPTY_HOWTO (0x13), | |
69 | EMPTY_HOWTO (0x14), | |
70 | EMPTY_HOWTO (0x15), | |
71 | EMPTY_HOWTO (0x16), | |
72 | EMPTY_HOWTO (0x17), | |
73 | EMPTY_HOWTO (0x18), | |
74 | EMPTY_HOWTO (0x19), | |
75 | EMPTY_HOWTO (0x1a), | |
76 | EMPTY_HOWTO (0x1b), | |
77 | EMPTY_HOWTO (0x1c), | |
78 | EMPTY_HOWTO (0x1d), | |
79 | EMPTY_HOWTO (0x1e), | |
80 | EMPTY_HOWTO (0x1f), | |
81 | ||
82 | EMPTY_HOWTO (0x20), | |
83 | EMPTY_HOWTO (0x21), | |
84 | EMPTY_HOWTO (0x22), | |
85 | EMPTY_HOWTO (0x23), | |
86 | EMPTY_HOWTO (0x24), | |
87 | EMPTY_HOWTO (0x25), | |
88 | EMPTY_HOWTO (0x26), | |
89 | EMPTY_HOWTO (0x27), | |
90 | EMPTY_HOWTO (0x28), | |
91 | EMPTY_HOWTO (0x29), | |
92 | EMPTY_HOWTO (0x2a), | |
93 | EMPTY_HOWTO (0x2b), | |
94 | EMPTY_HOWTO (0x2c), | |
9cea966c | 95 | RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), |
99c513f6 DD |
96 | |
97 | EMPTY_HOWTO (0x2e), | |
98 | EMPTY_HOWTO (0x2f), | |
99 | EMPTY_HOWTO (0x30), | |
100 | EMPTY_HOWTO (0x31), | |
101 | EMPTY_HOWTO (0x32), | |
102 | EMPTY_HOWTO (0x33), | |
103 | EMPTY_HOWTO (0x34), | |
104 | EMPTY_HOWTO (0x35), | |
105 | EMPTY_HOWTO (0x36), | |
106 | EMPTY_HOWTO (0x37), | |
107 | EMPTY_HOWTO (0x38), | |
108 | EMPTY_HOWTO (0x39), | |
109 | EMPTY_HOWTO (0x3a), | |
110 | EMPTY_HOWTO (0x3b), | |
111 | EMPTY_HOWTO (0x3c), | |
112 | EMPTY_HOWTO (0x3d), | |
113 | EMPTY_HOWTO (0x3e), | |
114 | EMPTY_HOWTO (0x3f), | |
115 | EMPTY_HOWTO (0x40), | |
116 | ||
6ff71e76 NC |
117 | RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE), |
118 | RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE), | |
119 | RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE), | |
120 | RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE), | |
121 | RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE), | |
122 | RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE), | |
123 | RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE), | |
124 | RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE), | |
125 | RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), | |
126 | RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), | |
127 | RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), | |
128 | RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE), | |
129 | RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE), | |
130 | RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE), | |
131 | RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE), | |
132 | RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE), | |
133 | RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE), | |
99c513f6 DD |
134 | |
135 | #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) | |
136 | ||
137 | EMPTY_HOWTO (0x52), | |
138 | EMPTY_HOWTO (0x53), | |
139 | EMPTY_HOWTO (0x54), | |
140 | EMPTY_HOWTO (0x55), | |
141 | EMPTY_HOWTO (0x56), | |
142 | EMPTY_HOWTO (0x57), | |
143 | EMPTY_HOWTO (0x58), | |
144 | EMPTY_HOWTO (0x59), | |
145 | EMPTY_HOWTO (0x5a), | |
146 | EMPTY_HOWTO (0x5b), | |
147 | EMPTY_HOWTO (0x5c), | |
148 | EMPTY_HOWTO (0x5d), | |
149 | EMPTY_HOWTO (0x5e), | |
150 | EMPTY_HOWTO (0x5f), | |
151 | EMPTY_HOWTO (0x60), | |
152 | EMPTY_HOWTO (0x61), | |
153 | EMPTY_HOWTO (0x62), | |
154 | EMPTY_HOWTO (0x63), | |
155 | EMPTY_HOWTO (0x64), | |
156 | EMPTY_HOWTO (0x65), | |
157 | EMPTY_HOWTO (0x66), | |
158 | EMPTY_HOWTO (0x67), | |
159 | EMPTY_HOWTO (0x68), | |
160 | EMPTY_HOWTO (0x69), | |
161 | EMPTY_HOWTO (0x6a), | |
162 | EMPTY_HOWTO (0x6b), | |
163 | EMPTY_HOWTO (0x6c), | |
164 | EMPTY_HOWTO (0x6d), | |
165 | EMPTY_HOWTO (0x6e), | |
166 | EMPTY_HOWTO (0x6f), | |
167 | EMPTY_HOWTO (0x70), | |
168 | EMPTY_HOWTO (0x71), | |
169 | EMPTY_HOWTO (0x72), | |
170 | EMPTY_HOWTO (0x73), | |
171 | EMPTY_HOWTO (0x74), | |
172 | EMPTY_HOWTO (0x75), | |
173 | EMPTY_HOWTO (0x76), | |
174 | EMPTY_HOWTO (0x77), | |
175 | ||
176 | EMPTY_HOWTO (0x78), | |
177 | EMPTY_HOWTO (0x79), | |
178 | EMPTY_HOWTO (0x7a), | |
179 | EMPTY_HOWTO (0x7b), | |
180 | EMPTY_HOWTO (0x7c), | |
181 | EMPTY_HOWTO (0x7d), | |
182 | EMPTY_HOWTO (0x7e), | |
183 | EMPTY_HOWTO (0x7f), | |
184 | ||
6ff71e76 NC |
185 | RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE), |
186 | RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE), | |
187 | RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE), | |
188 | RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE), | |
189 | RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE), | |
190 | RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE), | |
191 | RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE), | |
192 | RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE), | |
193 | RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE), | |
99c513f6 DD |
194 | EMPTY_HOWTO (0x89), |
195 | EMPTY_HOWTO (0x8a), | |
196 | EMPTY_HOWTO (0x8b), | |
197 | EMPTY_HOWTO (0x8c), | |
6ff71e76 | 198 | RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE), |
99c513f6 DD |
199 | EMPTY_HOWTO (0x8e), |
200 | EMPTY_HOWTO (0x8f), | |
6ff71e76 NC |
201 | RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE), |
202 | RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE), | |
203 | RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE), | |
204 | RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE), | |
205 | RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE), | |
206 | RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE), | |
207 | RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE) | |
99c513f6 DD |
208 | }; |
209 | \f | |
210 | /* Map BFD reloc types to RL78 ELF reloc types. */ | |
211 | ||
212 | struct rl78_reloc_map | |
213 | { | |
214 | bfd_reloc_code_real_type bfd_reloc_val; | |
215 | unsigned int rl78_reloc_val; | |
216 | }; | |
217 | ||
218 | static const struct rl78_reloc_map rl78_reloc_map [] = | |
219 | { | |
220 | { BFD_RELOC_NONE, R_RL78_NONE }, | |
221 | { BFD_RELOC_8, R_RL78_DIR8S }, | |
222 | { BFD_RELOC_16, R_RL78_DIR16S }, | |
223 | { BFD_RELOC_24, R_RL78_DIR24S }, | |
224 | { BFD_RELOC_32, R_RL78_DIR32 }, | |
225 | { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, | |
226 | { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, | |
227 | { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, | |
228 | { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, | |
229 | { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, | |
230 | { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, | |
231 | { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, | |
232 | { BFD_RELOC_RL78_SYM, R_RL78_SYM }, | |
233 | { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, | |
234 | { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, | |
235 | { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, | |
236 | { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, | |
237 | { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, | |
238 | { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, | |
239 | { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, | |
240 | { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, | |
241 | { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, | |
242 | { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, | |
243 | { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, | |
9cea966c DD |
244 | { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, |
245 | { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } | |
99c513f6 DD |
246 | }; |
247 | ||
248 | static reloc_howto_type * | |
249 | rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, | |
250 | bfd_reloc_code_real_type code) | |
251 | { | |
252 | unsigned int i; | |
253 | ||
254 | if (code == BFD_RELOC_RL78_32_OP) | |
255 | return rl78_elf_howto_table + R_RL78_DIR32; | |
256 | ||
0ba38529 | 257 | for (i = ARRAY_SIZE (rl78_reloc_map); i--;) |
99c513f6 DD |
258 | if (rl78_reloc_map [i].bfd_reloc_val == code) |
259 | return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; | |
260 | ||
261 | return NULL; | |
262 | } | |
263 | ||
264 | static reloc_howto_type * | |
265 | rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) | |
266 | { | |
267 | unsigned int i; | |
268 | ||
269 | for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) | |
270 | if (rl78_elf_howto_table[i].name != NULL | |
271 | && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) | |
272 | return rl78_elf_howto_table + i; | |
273 | ||
274 | return NULL; | |
275 | } | |
276 | ||
277 | /* Set the howto pointer for an RL78 ELF reloc. */ | |
278 | ||
279 | static void | |
280 | rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, | |
281 | arelent * cache_ptr, | |
282 | Elf_Internal_Rela * dst) | |
283 | { | |
284 | unsigned int r_type; | |
285 | ||
286 | r_type = ELF32_R_TYPE (dst->r_info); | |
5860e3f8 NC |
287 | if (r_type >= (unsigned int) R_RL78_max) |
288 | { | |
64d29018 | 289 | _bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type); |
5860e3f8 NC |
290 | r_type = 0; |
291 | } | |
99c513f6 DD |
292 | cache_ptr->howto = rl78_elf_howto_table + r_type; |
293 | } | |
294 | \f | |
295 | static bfd_vma | |
296 | get_symbol_value (const char * name, | |
297 | bfd_reloc_status_type * status, | |
298 | struct bfd_link_info * info, | |
299 | bfd * input_bfd, | |
300 | asection * input_section, | |
301 | int offset) | |
302 | { | |
99c513f6 DD |
303 | struct bfd_link_hash_entry * h; |
304 | ||
6ff71e76 NC |
305 | if (info == NULL) |
306 | return 0; | |
307 | ||
99c513f6 DD |
308 | h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); |
309 | ||
310 | if (h == NULL | |
311 | || (h->type != bfd_link_hash_defined | |
312 | && h->type != bfd_link_hash_defweak)) | |
6ff71e76 NC |
313 | { |
314 | bfd_reloc_status_type res; | |
315 | ||
316 | res = info->callbacks->undefined_symbol | |
317 | (info, name, input_bfd, input_section, offset, TRUE); | |
318 | if (status) | |
319 | * status = res; | |
320 | return 0; | |
321 | } | |
99c513f6 | 322 | |
6ff71e76 NC |
323 | return (h->u.def.value |
324 | + h->u.def.section->output_section->vma | |
325 | + h->u.def.section->output_offset); | |
99c513f6 DD |
326 | } |
327 | ||
328 | static bfd_vma | |
329 | get_romstart (bfd_reloc_status_type * status, | |
330 | struct bfd_link_info * info, | |
331 | bfd * abfd, | |
332 | asection * sec, | |
333 | int offset) | |
334 | { | |
335 | static bfd_boolean cached = FALSE; | |
336 | static bfd_vma cached_value = 0; | |
6ff71e76 | 337 | static bfd_reloc_status_type cached_status; |
99c513f6 DD |
338 | |
339 | if (!cached) | |
340 | { | |
6ff71e76 | 341 | cached_value = get_symbol_value ("_start", & cached_status, info, abfd, sec, offset); |
99c513f6 DD |
342 | cached = TRUE; |
343 | } | |
6ff71e76 NC |
344 | if (status) |
345 | * status = cached_status; | |
99c513f6 DD |
346 | return cached_value; |
347 | } | |
348 | ||
349 | static bfd_vma | |
350 | get_ramstart (bfd_reloc_status_type * status, | |
351 | struct bfd_link_info * info, | |
352 | bfd * abfd, | |
353 | asection * sec, | |
354 | int offset) | |
355 | { | |
356 | static bfd_boolean cached = FALSE; | |
357 | static bfd_vma cached_value = 0; | |
6ff71e76 | 358 | static bfd_reloc_status_type cached_status; |
99c513f6 DD |
359 | |
360 | if (!cached) | |
361 | { | |
6ff71e76 | 362 | cached_value = get_symbol_value ("__datastart", & cached_status, info, abfd, sec, offset); |
99c513f6 DD |
363 | cached = TRUE; |
364 | } | |
6ff71e76 NC |
365 | if (status) |
366 | * status = cached_status; | |
99c513f6 DD |
367 | return cached_value; |
368 | } | |
369 | ||
370 | #define NUM_STACK_ENTRIES 16 | |
371 | static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; | |
372 | static unsigned int rl78_stack_top; | |
373 | ||
374 | #define RL78_STACK_PUSH(val) \ | |
375 | do \ | |
376 | { \ | |
377 | if (rl78_stack_top < NUM_STACK_ENTRIES) \ | |
378 | rl78_stack [rl78_stack_top ++] = (val); \ | |
379 | else \ | |
6ff71e76 | 380 | _bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \ |
99c513f6 DD |
381 | } \ |
382 | while (0) | |
383 | ||
384 | #define RL78_STACK_POP(dest) \ | |
385 | do \ | |
386 | { \ | |
387 | if (rl78_stack_top > 0) \ | |
6ff71e76 | 388 | (dest) = rl78_stack [-- rl78_stack_top];\ |
99c513f6 | 389 | else \ |
6ff71e76 NC |
390 | { \ |
391 | _bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \ | |
392 | (dest) = 0; \ | |
393 | } \ | |
99c513f6 DD |
394 | } \ |
395 | while (0) | |
396 | ||
6ff71e76 NC |
397 | /* Special handling for RL78 complex relocs. Returns the |
398 | value of the reloc, or 0 for relocs which do not generate | |
399 | a result. SYMVAL is the value of the symbol for relocs | |
400 | which use a symbolic argument. */ | |
401 | ||
402 | static bfd_vma | |
403 | rl78_compute_complex_reloc (unsigned long r_type, | |
404 | bfd_vma symval, | |
405 | asection * input_section) | |
406 | { | |
407 | int32_t tmp1, tmp2; | |
408 | bfd_vma relocation; | |
409 | ||
410 | switch (r_type) | |
411 | { | |
412 | default: | |
413 | return 0; | |
414 | ||
415 | case R_RL78_ABS24S_PCREL: | |
416 | case R_RL78_ABS16S_PCREL: | |
417 | case R_RL78_ABS8S_PCREL: | |
418 | RL78_STACK_POP (relocation); | |
419 | relocation -= input_section->output_section->vma + input_section->output_offset; | |
420 | return relocation; | |
421 | ||
422 | case R_RL78_ABS32: | |
423 | case R_RL78_ABS32_REV: | |
424 | case R_RL78_ABS16: | |
425 | case R_RL78_ABS16_REV: | |
426 | case R_RL78_ABS16S: | |
427 | case R_RL78_ABS16U: | |
428 | case R_RL78_ABS8: | |
429 | case R_RL78_ABS8U: | |
430 | case R_RL78_ABS8S: | |
431 | RL78_STACK_POP (relocation); | |
432 | return relocation; | |
433 | ||
434 | case R_RL78_ABS16UL: | |
435 | case R_RL78_ABS8UL: | |
436 | RL78_STACK_POP (relocation); | |
437 | return relocation >> 2; | |
438 | ||
439 | case R_RL78_ABS16UW: | |
440 | case R_RL78_ABS8UW: | |
441 | RL78_STACK_POP (relocation); | |
442 | return relocation >> 1; | |
443 | ||
444 | /* The rest of the relocs compute values and then push them onto the stack. */ | |
445 | case R_RL78_OPramtop: | |
446 | case R_RL78_OPromtop: | |
447 | case R_RL78_SYM: | |
448 | RL78_STACK_PUSH (symval); | |
449 | return 0; | |
450 | ||
451 | case R_RL78_OPneg: | |
452 | RL78_STACK_POP (tmp1); | |
453 | tmp1 = - tmp1; | |
454 | RL78_STACK_PUSH (tmp1); | |
455 | return 0; | |
456 | ||
457 | case R_RL78_OPadd: | |
458 | RL78_STACK_POP (tmp2); | |
459 | RL78_STACK_POP (tmp1); | |
460 | tmp1 += tmp2; | |
461 | RL78_STACK_PUSH (tmp1); | |
462 | return 0; | |
463 | ||
464 | case R_RL78_OPsub: | |
465 | /* For the expression "A - B", the assembler pushes A, | |
466 | then B, then OPSUB. So the first op we pop is B, not A. */ | |
467 | RL78_STACK_POP (tmp2); /* B */ | |
468 | RL78_STACK_POP (tmp1); /* A */ | |
469 | tmp1 -= tmp2; /* A - B */ | |
470 | RL78_STACK_PUSH (tmp1); | |
471 | return 0; | |
472 | ||
473 | case R_RL78_OPmul: | |
474 | RL78_STACK_POP (tmp2); | |
475 | RL78_STACK_POP (tmp1); | |
476 | tmp1 *= tmp2; | |
477 | RL78_STACK_PUSH (tmp1); | |
478 | return 0; | |
479 | ||
480 | case R_RL78_OPdiv: | |
481 | RL78_STACK_POP (tmp2); | |
482 | RL78_STACK_POP (tmp1); | |
483 | tmp1 /= tmp2; | |
484 | RL78_STACK_PUSH (tmp1); | |
485 | return 0; | |
486 | ||
487 | case R_RL78_OPshla: | |
488 | RL78_STACK_POP (tmp2); | |
489 | RL78_STACK_POP (tmp1); | |
490 | tmp1 <<= tmp2; | |
491 | RL78_STACK_PUSH (tmp1); | |
492 | return 0; | |
493 | ||
494 | case R_RL78_OPshra: | |
495 | RL78_STACK_POP (tmp2); | |
496 | RL78_STACK_POP (tmp1); | |
497 | tmp1 >>= tmp2; | |
498 | RL78_STACK_PUSH (tmp1); | |
499 | return 0; | |
500 | ||
501 | case R_RL78_OPsctsize: | |
502 | RL78_STACK_PUSH (input_section->size); | |
503 | return 0; | |
504 | ||
505 | case R_RL78_OPscttop: | |
506 | RL78_STACK_PUSH (input_section->output_section->vma); | |
507 | return 0; | |
508 | ||
509 | case R_RL78_OPand: | |
510 | RL78_STACK_POP (tmp2); | |
511 | RL78_STACK_POP (tmp1); | |
512 | tmp1 &= tmp2; | |
513 | RL78_STACK_PUSH (tmp1); | |
514 | return 0; | |
515 | ||
516 | case R_RL78_OPor: | |
517 | RL78_STACK_POP (tmp2); | |
518 | RL78_STACK_POP (tmp1); | |
519 | tmp1 |= tmp2; | |
520 | RL78_STACK_PUSH (tmp1); | |
521 | return 0; | |
522 | ||
523 | case R_RL78_OPxor: | |
524 | RL78_STACK_POP (tmp2); | |
525 | RL78_STACK_POP (tmp1); | |
526 | tmp1 ^= tmp2; | |
527 | RL78_STACK_PUSH (tmp1); | |
528 | return 0; | |
529 | ||
530 | case R_RL78_OPnot: | |
531 | RL78_STACK_POP (tmp1); | |
532 | tmp1 = ~ tmp1; | |
533 | RL78_STACK_PUSH (tmp1); | |
534 | return 0; | |
535 | ||
536 | case R_RL78_OPmod: | |
537 | RL78_STACK_POP (tmp2); | |
538 | RL78_STACK_POP (tmp1); | |
539 | tmp1 %= tmp2; | |
540 | RL78_STACK_PUSH (tmp1); | |
541 | return 0; | |
542 | } | |
543 | } | |
544 | ||
545 | #undef RL78_STACK_PUSH | |
546 | #undef RL78_STACK_POP | |
547 | ||
548 | #define OP(i) (contents[reloc->address + (i)]) | |
549 | ||
550 | static bfd_reloc_status_type | |
551 | rl78_special_reloc (bfd * input_bfd, | |
552 | arelent * reloc, | |
553 | asymbol * symbol, | |
554 | void * data, | |
555 | asection * input_section, | |
556 | bfd * output_bfd ATTRIBUTE_UNUSED, | |
557 | char ** error_message ATTRIBUTE_UNUSED) | |
558 | { | |
559 | bfd_reloc_status_type r = bfd_reloc_ok; | |
560 | bfd_vma relocation = 0; | |
561 | unsigned long r_type = reloc->howto->type; | |
562 | bfd_byte * contents = data; | |
563 | ||
564 | /* If necessary, compute the symbolic value of the relocation. */ | |
565 | switch (r_type) | |
566 | { | |
567 | case R_RL78_SYM: | |
568 | relocation = (symbol->value | |
569 | + symbol->section->output_section->vma | |
570 | + symbol->section->output_offset | |
571 | + reloc->addend); | |
572 | break; | |
573 | ||
574 | case R_RL78_OPromtop: | |
575 | relocation = get_romstart (&r, NULL, input_bfd, input_section, | |
576 | reloc->address); | |
577 | break; | |
578 | ||
579 | case R_RL78_OPramtop: | |
580 | relocation = get_ramstart (&r, NULL, input_bfd, input_section, | |
581 | reloc->address); | |
582 | break; | |
583 | } | |
584 | ||
585 | /* Get the value of the relocation. */ | |
586 | relocation = rl78_compute_complex_reloc (r_type, relocation, input_section); | |
587 | ||
588 | /* If the relocation alters the contents of the section then apply it now. | |
589 | Note - since this function is called from | |
590 | bfd_generic_get_relocated_section_contents via bfd_perform_relocation, | |
591 | and not from the linker, we do not perform any range checking. The | |
592 | clients who are calling us are only interested in some relocated section | |
593 | contents, and not any linkage problems that might occur later. */ | |
594 | switch (r_type) | |
595 | { | |
596 | case R_RL78_ABS32: | |
597 | OP (0) = relocation; | |
598 | OP (1) = relocation >> 8; | |
599 | OP (2) = relocation >> 16; | |
600 | OP (3) = relocation >> 24; | |
601 | break; | |
602 | ||
603 | case R_RL78_ABS32_REV: | |
604 | OP (3) = relocation; | |
605 | OP (2) = relocation >> 8; | |
606 | OP (1) = relocation >> 16; | |
607 | OP (0) = relocation >> 24; | |
608 | break; | |
609 | ||
610 | case R_RL78_ABS24S_PCREL: | |
611 | case R_RL78_ABS24S: | |
612 | OP (0) = relocation; | |
613 | OP (1) = relocation >> 8; | |
614 | OP (2) = relocation >> 16; | |
615 | break; | |
616 | ||
617 | case R_RL78_ABS16_REV: | |
618 | OP (1) = relocation; | |
619 | OP (0) = relocation >> 8; | |
620 | break; | |
621 | ||
622 | case R_RL78_ABS16S_PCREL: | |
623 | case R_RL78_ABS16: | |
624 | case R_RL78_ABS16S: | |
625 | case R_RL78_ABS16U: | |
626 | case R_RL78_ABS16UL: | |
627 | case R_RL78_ABS16UW: | |
628 | OP (0) = relocation; | |
629 | OP (1) = relocation >> 8; | |
630 | break; | |
631 | ||
632 | case R_RL78_ABS8S_PCREL: | |
633 | case R_RL78_ABS8: | |
634 | case R_RL78_ABS8U: | |
635 | case R_RL78_ABS8UL: | |
636 | case R_RL78_ABS8UW: | |
637 | case R_RL78_ABS8S: | |
638 | OP (0) = relocation; | |
639 | break; | |
640 | ||
641 | default: | |
642 | break; | |
643 | } | |
644 | ||
645 | return r; | |
646 | } | |
647 | ||
648 | #undef OP | |
649 | #define OP(i) (contents[rel->r_offset + (i)]) | |
650 | ||
99c513f6 DD |
651 | /* Relocate an RL78 ELF section. |
652 | There is some attempt to make this function usable for many architectures, | |
653 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], | |
654 | if only to serve as a learning tool. | |
655 | ||
656 | The RELOCATE_SECTION function is called by the new ELF backend linker | |
657 | to handle the relocations for a section. | |
658 | ||
659 | The relocs are always passed as Rela structures; if the section | |
660 | actually uses Rel structures, the r_addend field will always be | |
661 | zero. | |
662 | ||
663 | This function is responsible for adjusting the section contents as | |
664 | necessary, and (if using Rela relocs and generating a relocatable | |
665 | output file) adjusting the reloc addend as necessary. | |
666 | ||
667 | This function does not have to worry about setting the reloc | |
668 | address or the reloc symbol index. | |
669 | ||
670 | LOCAL_SYMS is a pointer to the swapped in local symbols. | |
671 | ||
672 | LOCAL_SECTIONS is an array giving the section in the input file | |
673 | corresponding to the st_shndx field of each local symbol. | |
674 | ||
675 | The global hash table entry for the global symbols can be found | |
676 | via elf_sym_hashes (input_bfd). | |
677 | ||
678 | When generating relocatable output, this function must handle | |
679 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is | |
680 | going to be the section symbol corresponding to the output | |
681 | section, which means that the addend must be adjusted | |
682 | accordingly. */ | |
683 | ||
684 | static bfd_boolean | |
685 | rl78_elf_relocate_section | |
686 | (bfd * output_bfd, | |
687 | struct bfd_link_info * info, | |
688 | bfd * input_bfd, | |
689 | asection * input_section, | |
690 | bfd_byte * contents, | |
691 | Elf_Internal_Rela * relocs, | |
692 | Elf_Internal_Sym * local_syms, | |
693 | asection ** local_sections) | |
694 | { | |
695 | Elf_Internal_Shdr * symtab_hdr; | |
696 | struct elf_link_hash_entry ** sym_hashes; | |
697 | Elf_Internal_Rela * rel; | |
698 | Elf_Internal_Rela * relend; | |
699 | bfd *dynobj; | |
700 | asection *splt; | |
701 | ||
702 | symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; | |
703 | sym_hashes = elf_sym_hashes (input_bfd); | |
704 | relend = relocs + input_section->reloc_count; | |
705 | ||
706 | dynobj = elf_hash_table (info)->dynobj; | |
707 | splt = NULL; | |
708 | if (dynobj != NULL) | |
3d4d4302 | 709 | splt = bfd_get_linker_section (dynobj, ".plt"); |
99c513f6 DD |
710 | |
711 | for (rel = relocs; rel < relend; rel ++) | |
712 | { | |
713 | reloc_howto_type * howto; | |
714 | unsigned long r_symndx; | |
715 | Elf_Internal_Sym * sym; | |
716 | asection * sec; | |
717 | struct elf_link_hash_entry * h; | |
718 | bfd_vma relocation; | |
719 | bfd_reloc_status_type r; | |
720 | const char * name = NULL; | |
721 | bfd_boolean unresolved_reloc = TRUE; | |
722 | int r_type; | |
723 | ||
724 | r_type = ELF32_R_TYPE (rel->r_info); | |
725 | r_symndx = ELF32_R_SYM (rel->r_info); | |
726 | ||
727 | howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); | |
728 | h = NULL; | |
729 | sym = NULL; | |
730 | sec = NULL; | |
731 | relocation = 0; | |
732 | ||
733 | if (r_symndx < symtab_hdr->sh_info) | |
734 | { | |
735 | sym = local_syms + r_symndx; | |
736 | sec = local_sections [r_symndx]; | |
737 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); | |
738 | ||
739 | name = bfd_elf_string_from_elf_section | |
740 | (input_bfd, symtab_hdr->sh_link, sym->st_name); | |
741 | name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; | |
742 | } | |
743 | else | |
744 | { | |
62d887d4 L |
745 | bfd_boolean warned ATTRIBUTE_UNUSED; |
746 | bfd_boolean ignored ATTRIBUTE_UNUSED; | |
99c513f6 DD |
747 | |
748 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, | |
749 | r_symndx, symtab_hdr, sym_hashes, h, | |
750 | sec, relocation, unresolved_reloc, | |
62d887d4 | 751 | warned, ignored); |
99c513f6 DD |
752 | |
753 | name = h->root.root.string; | |
754 | } | |
755 | ||
95b57ade | 756 | if (sec != NULL && discarded_section (sec)) |
99c513f6 | 757 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 758 | rel, 1, relend, howto, 0, contents); |
99c513f6 DD |
759 | |
760 | if (info->relocatable) | |
761 | { | |
762 | /* This is a relocatable link. We don't have to change | |
763 | anything, unless the reloc is against a section symbol, | |
764 | in which case we have to adjust according to where the | |
765 | section symbol winds up in the output section. */ | |
766 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
767 | rel->r_addend += sec->output_offset; | |
768 | continue; | |
769 | } | |
770 | ||
771 | switch (ELF32_R_TYPE (rel->r_info)) | |
772 | { | |
773 | case R_RL78_DIR16S: | |
774 | { | |
775 | bfd_vma *plt_offset; | |
776 | ||
777 | if (h != NULL) | |
778 | plt_offset = &h->plt.offset; | |
779 | else | |
780 | plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; | |
781 | ||
9cea966c | 782 | if (! valid_16bit_address (relocation)) |
99c513f6 | 783 | { |
99c513f6 DD |
784 | /* If this is the first time we've processed this symbol, |
785 | fill in the plt entry with the correct symbol address. */ | |
786 | if ((*plt_offset & 1) == 0) | |
787 | { | |
788 | unsigned int x; | |
789 | ||
790 | x = 0x000000ec; /* br !!abs24 */ | |
791 | x |= (relocation << 8) & 0xffffff00; | |
792 | bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); | |
793 | *plt_offset |= 1; | |
794 | } | |
795 | ||
796 | relocation = (splt->output_section->vma | |
797 | + splt->output_offset | |
798 | + (*plt_offset & -2)); | |
799 | if (name) | |
800 | { | |
801 | char *newname = bfd_malloc (strlen(name)+5); | |
802 | strcpy (newname, name); | |
803 | strcat(newname, ".plt"); | |
804 | _bfd_generic_link_add_one_symbol (info, | |
805 | input_bfd, | |
806 | newname, | |
807 | BSF_FUNCTION | BSF_WEAK, | |
808 | splt, | |
809 | (*plt_offset & -2), | |
810 | 0, | |
811 | 1, | |
812 | 0, | |
813 | 0); | |
814 | } | |
815 | } | |
816 | } | |
817 | break; | |
818 | } | |
819 | ||
820 | if (h != NULL && h->root.type == bfd_link_hash_undefweak) | |
821 | /* If the symbol is undefined and weak | |
822 | then the relocation resolves to zero. */ | |
823 | relocation = 0; | |
824 | else | |
825 | { | |
826 | if (howto->pc_relative) | |
827 | { | |
828 | relocation -= (input_section->output_section->vma | |
829 | + input_section->output_offset | |
830 | + rel->r_offset); | |
831 | relocation -= bfd_get_reloc_size (howto); | |
832 | } | |
833 | ||
834 | relocation += rel->r_addend; | |
835 | } | |
836 | ||
837 | r = bfd_reloc_ok; | |
838 | ||
839 | #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow | |
99c513f6 DD |
840 | |
841 | /* Opcode relocs are always big endian. Data relocs are bi-endian. */ | |
842 | switch (r_type) | |
843 | { | |
844 | case R_RL78_NONE: | |
845 | break; | |
846 | ||
9cea966c DD |
847 | case R_RL78_RH_RELAX: |
848 | break; | |
849 | ||
99c513f6 DD |
850 | case R_RL78_DIR8S_PCREL: |
851 | RANGE (-128, 127); | |
852 | OP (0) = relocation; | |
853 | break; | |
854 | ||
855 | case R_RL78_DIR8S: | |
856 | RANGE (-128, 255); | |
857 | OP (0) = relocation; | |
858 | break; | |
859 | ||
860 | case R_RL78_DIR8U: | |
861 | RANGE (0, 255); | |
862 | OP (0) = relocation; | |
863 | break; | |
864 | ||
865 | case R_RL78_DIR16S_PCREL: | |
866 | RANGE (-32768, 32767); | |
867 | OP (0) = relocation; | |
868 | OP (1) = relocation >> 8; | |
869 | break; | |
870 | ||
871 | case R_RL78_DIR16S: | |
872 | if ((relocation & 0xf0000) == 0xf0000) | |
873 | relocation &= 0xffff; | |
874 | RANGE (-32768, 65535); | |
875 | OP (0) = relocation; | |
876 | OP (1) = relocation >> 8; | |
877 | break; | |
878 | ||
879 | case R_RL78_DIR16U: | |
880 | RANGE (0, 65536); | |
881 | OP (0) = relocation; | |
882 | OP (1) = relocation >> 8; | |
883 | break; | |
884 | ||
885 | case R_RL78_DIR16: | |
886 | RANGE (-32768, 65536); | |
887 | OP (0) = relocation; | |
888 | OP (1) = relocation >> 8; | |
889 | break; | |
890 | ||
891 | case R_RL78_DIR16_REV: | |
892 | RANGE (-32768, 65536); | |
893 | OP (1) = relocation; | |
894 | OP (0) = relocation >> 8; | |
895 | break; | |
896 | ||
897 | case R_RL78_DIR3U_PCREL: | |
898 | RANGE (3, 10); | |
899 | OP (0) &= 0xf8; | |
900 | OP (0) |= relocation & 0x07; | |
901 | break; | |
902 | ||
903 | case R_RL78_DIR24S_PCREL: | |
904 | RANGE (-0x800000, 0x7fffff); | |
905 | OP (0) = relocation; | |
906 | OP (1) = relocation >> 8; | |
907 | OP (2) = relocation >> 16; | |
908 | break; | |
909 | ||
910 | case R_RL78_DIR24S: | |
911 | RANGE (-0x800000, 0x7fffff); | |
912 | OP (0) = relocation; | |
913 | OP (1) = relocation >> 8; | |
914 | OP (2) = relocation >> 16; | |
915 | break; | |
916 | ||
917 | case R_RL78_DIR32: | |
918 | OP (0) = relocation; | |
919 | OP (1) = relocation >> 8; | |
920 | OP (2) = relocation >> 16; | |
921 | OP (3) = relocation >> 24; | |
922 | break; | |
923 | ||
924 | case R_RL78_DIR32_REV: | |
925 | OP (3) = relocation; | |
926 | OP (2) = relocation >> 8; | |
927 | OP (1) = relocation >> 16; | |
928 | OP (0) = relocation >> 24; | |
929 | break; | |
930 | ||
9cea966c | 931 | case R_RL78_RH_SFR: |
9cea966c DD |
932 | RANGE (0xfff00, 0xfffff); |
933 | OP (0) = relocation & 0xff; | |
934 | break; | |
935 | ||
936 | case R_RL78_RH_SADDR: | |
9cea966c DD |
937 | RANGE (0xffe20, 0xfff1f); |
938 | OP (0) = relocation & 0xff; | |
9cea966c DD |
939 | break; |
940 | ||
99c513f6 | 941 | /* Complex reloc handling: */ |
99c513f6 | 942 | case R_RL78_ABS32: |
99c513f6 | 943 | case R_RL78_ABS32_REV: |
99c513f6 DD |
944 | case R_RL78_ABS24S_PCREL: |
945 | case R_RL78_ABS24S: | |
99c513f6 | 946 | case R_RL78_ABS16: |
99c513f6 | 947 | case R_RL78_ABS16_REV: |
99c513f6 DD |
948 | case R_RL78_ABS16S_PCREL: |
949 | case R_RL78_ABS16S: | |
99c513f6 | 950 | case R_RL78_ABS16U: |
99c513f6 | 951 | case R_RL78_ABS16UL: |
99c513f6 | 952 | case R_RL78_ABS16UW: |
99c513f6 | 953 | case R_RL78_ABS8: |
99c513f6 | 954 | case R_RL78_ABS8U: |
99c513f6 | 955 | case R_RL78_ABS8UL: |
99c513f6 | 956 | case R_RL78_ABS8UW: |
99c513f6 DD |
957 | case R_RL78_ABS8S_PCREL: |
958 | case R_RL78_ABS8S: | |
99c513f6 | 959 | case R_RL78_OPneg: |
99c513f6 | 960 | case R_RL78_OPadd: |
99c513f6 | 961 | case R_RL78_OPsub: |
99c513f6 | 962 | case R_RL78_OPmul: |
99c513f6 | 963 | case R_RL78_OPdiv: |
99c513f6 | 964 | case R_RL78_OPshla: |
99c513f6 | 965 | case R_RL78_OPshra: |
99c513f6 | 966 | case R_RL78_OPsctsize: |
99c513f6 | 967 | case R_RL78_OPscttop: |
99c513f6 | 968 | case R_RL78_OPand: |
6ff71e76 NC |
969 | case R_RL78_OPor: |
970 | case R_RL78_OPxor: | |
971 | case R_RL78_OPnot: | |
972 | case R_RL78_OPmod: | |
973 | relocation = rl78_compute_complex_reloc (r_type, 0, input_section); | |
99c513f6 | 974 | |
6ff71e76 NC |
975 | switch (r_type) |
976 | { | |
977 | case R_RL78_ABS32: | |
978 | OP (0) = relocation; | |
979 | OP (1) = relocation >> 8; | |
980 | OP (2) = relocation >> 16; | |
981 | OP (3) = relocation >> 24; | |
982 | break; | |
99c513f6 | 983 | |
6ff71e76 NC |
984 | case R_RL78_ABS32_REV: |
985 | OP (3) = relocation; | |
986 | OP (2) = relocation >> 8; | |
987 | OP (1) = relocation >> 16; | |
988 | OP (0) = relocation >> 24; | |
989 | break; | |
99c513f6 | 990 | |
6ff71e76 NC |
991 | case R_RL78_ABS24S_PCREL: |
992 | case R_RL78_ABS24S: | |
993 | RANGE (-0x800000, 0x7fffff); | |
994 | OP (0) = relocation; | |
995 | OP (1) = relocation >> 8; | |
996 | OP (2) = relocation >> 16; | |
997 | break; | |
99c513f6 | 998 | |
6ff71e76 NC |
999 | case R_RL78_ABS16: |
1000 | RANGE (-32768, 65535); | |
1001 | OP (0) = relocation; | |
1002 | OP (1) = relocation >> 8; | |
1003 | break; | |
99c513f6 | 1004 | |
6ff71e76 NC |
1005 | case R_RL78_ABS16_REV: |
1006 | RANGE (-32768, 65535); | |
1007 | OP (1) = relocation; | |
1008 | OP (0) = relocation >> 8; | |
1009 | break; | |
99c513f6 | 1010 | |
6ff71e76 NC |
1011 | case R_RL78_ABS16S_PCREL: |
1012 | case R_RL78_ABS16S: | |
1013 | RANGE (-32768, 32767); | |
1014 | OP (0) = relocation; | |
1015 | OP (1) = relocation >> 8; | |
1016 | break; | |
99c513f6 | 1017 | |
6ff71e76 NC |
1018 | case R_RL78_ABS16U: |
1019 | case R_RL78_ABS16UL: | |
1020 | case R_RL78_ABS16UW: | |
1021 | RANGE (0, 65536); | |
1022 | OP (0) = relocation; | |
1023 | OP (1) = relocation >> 8; | |
1024 | break; | |
99c513f6 | 1025 | |
6ff71e76 NC |
1026 | case R_RL78_ABS8: |
1027 | RANGE (-128, 255); | |
1028 | OP (0) = relocation; | |
1029 | break; | |
99c513f6 | 1030 | |
6ff71e76 NC |
1031 | case R_RL78_ABS8U: |
1032 | case R_RL78_ABS8UL: | |
1033 | case R_RL78_ABS8UW: | |
1034 | RANGE (0, 255); | |
1035 | OP (0) = relocation; | |
1036 | break; | |
1037 | ||
1038 | case R_RL78_ABS8S_PCREL: | |
1039 | case R_RL78_ABS8S: | |
1040 | RANGE (-128, 127); | |
1041 | OP (0) = relocation; | |
1042 | break; | |
1043 | ||
1044 | default: | |
1045 | break; | |
1046 | } | |
1047 | break; | |
1048 | ||
1049 | case R_RL78_SYM: | |
1050 | if (r_symndx < symtab_hdr->sh_info) | |
1051 | relocation = sec->output_section->vma + sec->output_offset | |
1052 | + sym->st_value + rel->r_addend; | |
1053 | else if (h != NULL | |
1054 | && (h->root.type == bfd_link_hash_defined | |
1055 | || h->root.type == bfd_link_hash_defweak)) | |
1056 | relocation = h->root.u.def.value | |
1057 | + sec->output_section->vma | |
1058 | + sec->output_offset | |
1059 | + rel->r_addend; | |
1060 | else | |
1061 | { | |
1062 | relocation = 0; | |
1063 | if (h->root.type != bfd_link_hash_undefweak) | |
1064 | _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol")); | |
1065 | } | |
1066 | (void) rl78_compute_complex_reloc (r_type, relocation, input_section); | |
99c513f6 DD |
1067 | break; |
1068 | ||
1069 | case R_RL78_OPromtop: | |
6ff71e76 NC |
1070 | relocation = get_romstart (&r, info, input_bfd, input_section, rel->r_offset); |
1071 | (void) rl78_compute_complex_reloc (r_type, relocation, input_section); | |
99c513f6 DD |
1072 | break; |
1073 | ||
1074 | case R_RL78_OPramtop: | |
6ff71e76 NC |
1075 | relocation = get_ramstart (&r, info, input_bfd, input_section, rel->r_offset); |
1076 | (void) rl78_compute_complex_reloc (r_type, relocation, input_section); | |
99c513f6 DD |
1077 | break; |
1078 | ||
1079 | default: | |
1080 | r = bfd_reloc_notsupported; | |
1081 | break; | |
1082 | } | |
1083 | ||
1084 | if (r != bfd_reloc_ok) | |
1085 | { | |
1086 | const char * msg = NULL; | |
1087 | ||
1088 | switch (r) | |
1089 | { | |
1090 | case bfd_reloc_overflow: | |
1091 | /* Catch the case of a missing function declaration | |
1092 | and emit a more helpful error message. */ | |
1093 | if (r_type == R_RL78_DIR24S_PCREL) | |
1094 | msg = _("%B(%A): error: call to undefined function '%s'"); | |
1095 | else | |
1096 | r = info->callbacks->reloc_overflow | |
1097 | (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, | |
1098 | input_bfd, input_section, rel->r_offset); | |
1099 | break; | |
1100 | ||
1101 | case bfd_reloc_undefined: | |
1102 | r = info->callbacks->undefined_symbol | |
1103 | (info, name, input_bfd, input_section, rel->r_offset, | |
1104 | TRUE); | |
1105 | break; | |
1106 | ||
1107 | case bfd_reloc_other: | |
1108 | msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area"); | |
1109 | break; | |
1110 | ||
1111 | case bfd_reloc_outofrange: | |
1112 | msg = _("%B(%A): internal error: out of range error"); | |
1113 | break; | |
1114 | ||
1115 | case bfd_reloc_notsupported: | |
1116 | msg = _("%B(%A): internal error: unsupported relocation error"); | |
1117 | break; | |
1118 | ||
1119 | case bfd_reloc_dangerous: | |
1120 | msg = _("%B(%A): internal error: dangerous relocation"); | |
1121 | break; | |
1122 | ||
1123 | default: | |
1124 | msg = _("%B(%A): internal error: unknown error"); | |
1125 | break; | |
1126 | } | |
1127 | ||
1128 | if (msg) | |
1129 | _bfd_error_handler (msg, input_bfd, input_section, name); | |
1130 | ||
1131 | if (! r) | |
1132 | return FALSE; | |
1133 | } | |
1134 | } | |
1135 | ||
1136 | return TRUE; | |
1137 | } | |
1138 | \f | |
1139 | /* Function to set the ELF flag bits. */ | |
1140 | ||
1141 | static bfd_boolean | |
1142 | rl78_elf_set_private_flags (bfd * abfd, flagword flags) | |
1143 | { | |
1144 | elf_elfheader (abfd)->e_flags = flags; | |
1145 | elf_flags_init (abfd) = TRUE; | |
1146 | return TRUE; | |
1147 | } | |
1148 | ||
1149 | static bfd_boolean no_warn_mismatch = FALSE; | |
1150 | ||
1151 | void bfd_elf32_rl78_set_target_flags (bfd_boolean); | |
1152 | ||
1153 | void | |
1154 | bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) | |
1155 | { | |
1156 | no_warn_mismatch = user_no_warn_mismatch; | |
1157 | } | |
1158 | ||
1740ba0c NC |
1159 | static const char * |
1160 | rl78_cpu_name (flagword flags) | |
1161 | { | |
1162 | switch (flags & E_FLAG_RL78_CPU_MASK) | |
1163 | { | |
1164 | default: return ""; | |
1165 | case E_FLAG_RL78_G10: return "G10"; | |
1166 | case E_FLAG_RL78_G13: return "G13"; | |
1167 | case E_FLAG_RL78_G14: return "G14"; | |
1168 | } | |
1169 | } | |
1170 | ||
99c513f6 DD |
1171 | /* Merge backend specific data from an object file to the output |
1172 | object file when linking. */ | |
1173 | ||
1174 | static bfd_boolean | |
1175 | rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
1176 | { | |
99c513f6 | 1177 | flagword new_flags; |
4046d87a | 1178 | flagword old_flags; |
99c513f6 DD |
1179 | bfd_boolean error = FALSE; |
1180 | ||
1181 | new_flags = elf_elfheader (ibfd)->e_flags; | |
4046d87a | 1182 | old_flags = elf_elfheader (obfd)->e_flags; |
99c513f6 DD |
1183 | |
1184 | if (!elf_flags_init (obfd)) | |
1185 | { | |
1186 | /* First call, no flags set. */ | |
1187 | elf_flags_init (obfd) = TRUE; | |
1188 | elf_elfheader (obfd)->e_flags = new_flags; | |
1189 | } | |
4046d87a NC |
1190 | else if (old_flags != new_flags) |
1191 | { | |
1192 | flagword changed_flags = old_flags ^ new_flags; | |
1193 | ||
1740ba0c | 1194 | if (changed_flags & E_FLAG_RL78_CPU_MASK) |
4046d87a | 1195 | { |
1740ba0c NC |
1196 | flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; |
1197 | flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; | |
4046d87a | 1198 | |
1740ba0c NC |
1199 | if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) |
1200 | /* It does not matter what new_cpu may have. */; | |
1201 | else if (out_cpu == E_FLAG_RL78_ANY_CPU) | |
1202 | { | |
1203 | if (in_cpu == E_FLAG_RL78_G10) | |
1204 | { | |
1205 | /* G10 files can only be linked with other G10 files. | |
1206 | If the output is set to "any" this means that it is | |
1207 | a G14 file that does not use hardware multiply/divide, | |
1208 | but that is still incompatible with the G10 ABI. */ | |
1209 | error = TRUE; | |
1210 | ||
1211 | (*_bfd_error_handler) | |
1212 | (_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"), | |
1213 | bfd_get_filename (ibfd), | |
1214 | rl78_cpu_name (out_cpu), bfd_get_filename (obfd)); | |
1215 | } | |
1216 | else | |
1217 | { | |
1218 | old_flags &= ~ E_FLAG_RL78_CPU_MASK; | |
1219 | old_flags |= in_cpu; | |
1220 | elf_elfheader (obfd)->e_flags = old_flags; | |
1221 | } | |
1222 | } | |
4046d87a | 1223 | else |
1740ba0c NC |
1224 | { |
1225 | error = TRUE; | |
1226 | ||
1227 | (*_bfd_error_handler) | |
1228 | (_("RL78 ABI conflict: cannot link %s file %s with %s file %s"), | |
1229 | rl78_cpu_name (in_cpu), bfd_get_filename (ibfd), | |
1230 | rl78_cpu_name (out_cpu), bfd_get_filename (obfd)); | |
1231 | } | |
4046d87a | 1232 | } |
856ea05c KP |
1233 | |
1234 | if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) | |
1235 | { | |
1236 | (*_bfd_error_handler) | |
1237 | (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); | |
1238 | ||
1239 | if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) | |
1240 | (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"), | |
1241 | bfd_get_filename (obfd), bfd_get_filename (ibfd)); | |
1242 | else | |
1243 | (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"), | |
1244 | bfd_get_filename (ibfd), bfd_get_filename (obfd)); | |
1740ba0c | 1245 | error = TRUE; |
856ea05c | 1246 | } |
4046d87a | 1247 | } |
99c513f6 DD |
1248 | |
1249 | return !error; | |
1250 | } | |
1251 | \f | |
1252 | static bfd_boolean | |
1253 | rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) | |
1254 | { | |
1255 | FILE * file = (FILE *) ptr; | |
1256 | flagword flags; | |
1257 | ||
1258 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
1259 | ||
1260 | /* Print normal ELF private data. */ | |
1261 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
1262 | ||
1263 | flags = elf_elfheader (abfd)->e_flags; | |
1264 | fprintf (file, _("private flags = 0x%lx:"), (long) flags); | |
1265 | ||
1740ba0c NC |
1266 | if (flags & E_FLAG_RL78_CPU_MASK) |
1267 | fprintf (file, " [%s]", rl78_cpu_name (flags)); | |
4046d87a | 1268 | |
856ea05c KP |
1269 | if (flags & E_FLAG_RL78_64BIT_DOUBLES) |
1270 | fprintf (file, _(" [64-bit doubles]")); | |
1271 | ||
99c513f6 DD |
1272 | fputc ('\n', file); |
1273 | return TRUE; | |
1274 | } | |
1275 | ||
1276 | /* Return the MACH for an e_flags value. */ | |
1277 | ||
1278 | static int | |
1740ba0c | 1279 | elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) |
99c513f6 | 1280 | { |
1740ba0c | 1281 | return bfd_mach_rl78; |
99c513f6 DD |
1282 | } |
1283 | ||
1284 | static bfd_boolean | |
1285 | rl78_elf_object_p (bfd * abfd) | |
1286 | { | |
1287 | bfd_default_set_arch_mach (abfd, bfd_arch_rl78, | |
1288 | elf32_rl78_machine (abfd)); | |
1289 | return TRUE; | |
1290 | } | |
99c513f6 DD |
1291 | \f |
1292 | /* support PLT for 16-bit references to 24-bit functions. */ | |
1293 | ||
1294 | /* We support 16-bit pointers to code above 64k by generating a thunk | |
1295 | below 64k containing a JMP instruction to the final address. */ | |
68ffbac6 | 1296 | |
99c513f6 DD |
1297 | static bfd_boolean |
1298 | rl78_elf_check_relocs | |
1299 | (bfd * abfd, | |
1300 | struct bfd_link_info * info, | |
1301 | asection * sec, | |
1302 | const Elf_Internal_Rela * relocs) | |
1303 | { | |
1304 | Elf_Internal_Shdr * symtab_hdr; | |
1305 | struct elf_link_hash_entry ** sym_hashes; | |
1306 | const Elf_Internal_Rela * rel; | |
1307 | const Elf_Internal_Rela * rel_end; | |
1308 | bfd_vma *local_plt_offsets; | |
1309 | asection *splt; | |
1310 | bfd *dynobj; | |
1311 | ||
1312 | if (info->relocatable) | |
1313 | return TRUE; | |
68ffbac6 | 1314 | |
99c513f6 DD |
1315 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
1316 | sym_hashes = elf_sym_hashes (abfd); | |
1317 | local_plt_offsets = elf_local_got_offsets (abfd); | |
1318 | splt = NULL; | |
1319 | dynobj = elf_hash_table(info)->dynobj; | |
1320 | ||
1321 | rel_end = relocs + sec->reloc_count; | |
1322 | for (rel = relocs; rel < rel_end; rel++) | |
1323 | { | |
1324 | struct elf_link_hash_entry *h; | |
1325 | unsigned long r_symndx; | |
1326 | bfd_vma *offset; | |
68ffbac6 | 1327 | |
99c513f6 DD |
1328 | r_symndx = ELF32_R_SYM (rel->r_info); |
1329 | if (r_symndx < symtab_hdr->sh_info) | |
1330 | h = NULL; | |
1331 | else | |
1332 | { | |
1333 | h = sym_hashes[r_symndx - symtab_hdr->sh_info]; | |
1334 | while (h->root.type == bfd_link_hash_indirect | |
1335 | || h->root.type == bfd_link_hash_warning) | |
1336 | h = (struct elf_link_hash_entry *) h->root.u.i.link; | |
81fbe831 AM |
1337 | |
1338 | /* PR15323, ref flags aren't set for references in the same | |
1339 | object. */ | |
1340 | h->root.non_ir_ref = 1; | |
99c513f6 | 1341 | } |
68ffbac6 | 1342 | |
99c513f6 DD |
1343 | switch (ELF32_R_TYPE (rel->r_info)) |
1344 | { | |
1345 | /* This relocation describes a 16-bit pointer to a function. | |
1346 | We may need to allocate a thunk in low memory; reserve memory | |
1347 | for it now. */ | |
1348 | case R_RL78_DIR16S: | |
1349 | if (dynobj == NULL) | |
1350 | elf_hash_table (info)->dynobj = dynobj = abfd; | |
1351 | if (splt == NULL) | |
1352 | { | |
3d4d4302 | 1353 | splt = bfd_get_linker_section (dynobj, ".plt"); |
99c513f6 DD |
1354 | if (splt == NULL) |
1355 | { | |
1356 | flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | |
1357 | | SEC_IN_MEMORY | SEC_LINKER_CREATED | |
1358 | | SEC_READONLY | SEC_CODE); | |
3d4d4302 AM |
1359 | splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", |
1360 | flags); | |
99c513f6 DD |
1361 | if (splt == NULL |
1362 | || ! bfd_set_section_alignment (dynobj, splt, 1)) | |
1363 | return FALSE; | |
1364 | } | |
1365 | } | |
1366 | ||
1367 | if (h != NULL) | |
1368 | offset = &h->plt.offset; | |
1369 | else | |
1370 | { | |
1371 | if (local_plt_offsets == NULL) | |
1372 | { | |
1373 | size_t size; | |
1374 | unsigned int i; | |
1375 | ||
1376 | size = symtab_hdr->sh_info * sizeof (bfd_vma); | |
1377 | local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); | |
1378 | if (local_plt_offsets == NULL) | |
1379 | return FALSE; | |
1380 | elf_local_got_offsets (abfd) = local_plt_offsets; | |
1381 | ||
1382 | for (i = 0; i < symtab_hdr->sh_info; i++) | |
1383 | local_plt_offsets[i] = (bfd_vma) -1; | |
1384 | } | |
1385 | offset = &local_plt_offsets[r_symndx]; | |
1386 | } | |
1387 | ||
1388 | if (*offset == (bfd_vma) -1) | |
1389 | { | |
1390 | *offset = splt->size; | |
1391 | splt->size += 4; | |
1392 | } | |
1393 | break; | |
1394 | } | |
1395 | } | |
68ffbac6 | 1396 | |
99c513f6 DD |
1397 | return TRUE; |
1398 | } | |
1399 | ||
1400 | /* This must exist if dynobj is ever set. */ | |
1401 | ||
1402 | static bfd_boolean | |
1403 | rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, | |
1404 | struct bfd_link_info *info) | |
1405 | { | |
1406 | bfd *dynobj; | |
1407 | asection *splt; | |
1408 | ||
47fc0f1f NC |
1409 | if (!elf_hash_table (info)->dynamic_sections_created) |
1410 | return TRUE; | |
1411 | ||
9cea966c DD |
1412 | /* As an extra sanity check, verify that all plt entries have been |
1413 | filled in. However, relaxing might have changed the relocs so | |
1414 | that some plt entries don't get filled in, so we have to skip | |
1415 | this check if we're relaxing. Unfortunately, check_relocs is | |
1416 | called before relaxation. */ | |
99c513f6 | 1417 | |
1740ba0c | 1418 | if (info->relax_trip > 0) |
47fc0f1f NC |
1419 | return TRUE; |
1420 | ||
1421 | if ((dynobj = elf_hash_table (info)->dynobj) != NULL | |
1422 | && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL) | |
99c513f6 | 1423 | { |
47fc0f1f NC |
1424 | bfd_byte *contents = splt->contents; |
1425 | unsigned int i, size = splt->size; | |
1426 | ||
1427 | for (i = 0; i < size; i += 4) | |
99c513f6 | 1428 | { |
47fc0f1f NC |
1429 | unsigned int x = bfd_get_32 (dynobj, contents + i); |
1430 | BFD_ASSERT (x != 0); | |
99c513f6 DD |
1431 | } |
1432 | } | |
1433 | ||
1434 | return TRUE; | |
1435 | } | |
1436 | ||
1437 | static bfd_boolean | |
1438 | rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, | |
1439 | struct bfd_link_info *info) | |
1440 | { | |
1441 | bfd *dynobj; | |
1442 | asection *splt; | |
1443 | ||
1444 | if (info->relocatable) | |
1445 | return TRUE; | |
1446 | ||
1447 | dynobj = elf_hash_table (info)->dynobj; | |
1448 | if (dynobj == NULL) | |
1449 | return TRUE; | |
1450 | ||
3d4d4302 | 1451 | splt = bfd_get_linker_section (dynobj, ".plt"); |
99c513f6 DD |
1452 | BFD_ASSERT (splt != NULL); |
1453 | ||
1454 | splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); | |
1455 | if (splt->contents == NULL) | |
1456 | return FALSE; | |
1457 | ||
1458 | return TRUE; | |
1459 | } | |
1460 | ||
1461 | \f | |
1462 | ||
1463 | /* Handle relaxing. */ | |
1464 | ||
1465 | /* A subroutine of rl78_elf_relax_section. If the global symbol H | |
1466 | is within the low 64k, remove any entry for it in the plt. */ | |
1467 | ||
1468 | struct relax_plt_data | |
1469 | { | |
1470 | asection *splt; | |
1471 | bfd_boolean *again; | |
1472 | }; | |
1473 | ||
1474 | static bfd_boolean | |
2c3fc389 | 1475 | rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) |
99c513f6 DD |
1476 | { |
1477 | struct relax_plt_data *data = (struct relax_plt_data *) xdata; | |
1478 | ||
1479 | if (h->plt.offset != (bfd_vma) -1) | |
1480 | { | |
1481 | bfd_vma address; | |
1482 | ||
1483 | if (h->root.type == bfd_link_hash_undefined | |
1484 | || h->root.type == bfd_link_hash_undefweak) | |
1485 | address = 0; | |
1486 | else | |
1487 | address = (h->root.u.def.section->output_section->vma | |
1488 | + h->root.u.def.section->output_offset | |
1489 | + h->root.u.def.value); | |
1490 | ||
1491 | if (valid_16bit_address (address)) | |
1492 | { | |
1493 | h->plt.offset = -1; | |
1494 | data->splt->size -= 4; | |
1495 | *data->again = TRUE; | |
1496 | } | |
1497 | } | |
1498 | ||
1499 | return TRUE; | |
1500 | } | |
1501 | ||
1502 | /* A subroutine of rl78_elf_relax_section. If the global symbol H | |
1503 | previously had a plt entry, give it a new entry offset. */ | |
1504 | ||
1505 | static bfd_boolean | |
2c3fc389 | 1506 | rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) |
99c513f6 DD |
1507 | { |
1508 | bfd_vma *entry = (bfd_vma *) xdata; | |
1509 | ||
1510 | if (h->plt.offset != (bfd_vma) -1) | |
1511 | { | |
1512 | h->plt.offset = *entry; | |
1513 | *entry += 4; | |
1514 | } | |
1515 | ||
1516 | return TRUE; | |
1517 | } | |
1518 | ||
1519 | static bfd_boolean | |
1520 | rl78_elf_relax_plt_section (bfd *dynobj, | |
1521 | asection *splt, | |
1522 | struct bfd_link_info *info, | |
1523 | bfd_boolean *again) | |
1524 | { | |
1525 | struct relax_plt_data relax_plt_data; | |
1526 | bfd *ibfd; | |
1527 | ||
1528 | /* Assume nothing changes. */ | |
1529 | *again = FALSE; | |
1530 | ||
1531 | if (info->relocatable) | |
1532 | return TRUE; | |
1533 | ||
1534 | /* We only relax the .plt section at the moment. */ | |
1535 | if (dynobj != elf_hash_table (info)->dynobj | |
1536 | || strcmp (splt->name, ".plt") != 0) | |
1537 | return TRUE; | |
1538 | ||
1539 | /* Quick check for an empty plt. */ | |
1540 | if (splt->size == 0) | |
1541 | return TRUE; | |
1542 | ||
1543 | /* Map across all global symbols; see which ones happen to | |
1544 | fall in the low 64k. */ | |
1545 | relax_plt_data.splt = splt; | |
1546 | relax_plt_data.again = again; | |
1547 | elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, | |
1548 | &relax_plt_data); | |
1549 | ||
1550 | /* Likewise for local symbols, though that's somewhat less convenient | |
1551 | as we have to walk the list of input bfds and swap in symbol data. */ | |
c72f2fb2 | 1552 | for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) |
99c513f6 DD |
1553 | { |
1554 | bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); | |
1555 | Elf_Internal_Shdr *symtab_hdr; | |
1556 | Elf_Internal_Sym *isymbuf = NULL; | |
1557 | unsigned int idx; | |
1558 | ||
1559 | if (! local_plt_offsets) | |
1560 | continue; | |
1561 | ||
1562 | symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; | |
1563 | if (symtab_hdr->sh_info != 0) | |
1564 | { | |
1565 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1566 | if (isymbuf == NULL) | |
1567 | isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, | |
1568 | symtab_hdr->sh_info, 0, | |
1569 | NULL, NULL, NULL); | |
1570 | if (isymbuf == NULL) | |
1571 | return FALSE; | |
1572 | } | |
1573 | ||
1574 | for (idx = 0; idx < symtab_hdr->sh_info; ++idx) | |
1575 | { | |
1576 | Elf_Internal_Sym *isym; | |
1577 | asection *tsec; | |
1578 | bfd_vma address; | |
1579 | ||
1580 | if (local_plt_offsets[idx] == (bfd_vma) -1) | |
1581 | continue; | |
1582 | ||
1583 | isym = &isymbuf[idx]; | |
1584 | if (isym->st_shndx == SHN_UNDEF) | |
1585 | continue; | |
1586 | else if (isym->st_shndx == SHN_ABS) | |
1587 | tsec = bfd_abs_section_ptr; | |
1588 | else if (isym->st_shndx == SHN_COMMON) | |
1589 | tsec = bfd_com_section_ptr; | |
1590 | else | |
1591 | tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); | |
1592 | ||
1593 | address = (tsec->output_section->vma | |
1594 | + tsec->output_offset | |
1595 | + isym->st_value); | |
1596 | if (valid_16bit_address (address)) | |
1597 | { | |
1598 | local_plt_offsets[idx] = -1; | |
1599 | splt->size -= 4; | |
1600 | *again = TRUE; | |
1601 | } | |
1602 | } | |
1603 | ||
1604 | if (isymbuf != NULL | |
1605 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1606 | { | |
1607 | if (! info->keep_memory) | |
1608 | free (isymbuf); | |
1609 | else | |
1610 | { | |
1611 | /* Cache the symbols for elf_link_input_bfd. */ | |
1612 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
1613 | } | |
1614 | } | |
1615 | } | |
1616 | ||
1617 | /* If we changed anything, walk the symbols again to reallocate | |
1618 | .plt entry addresses. */ | |
1619 | if (*again && splt->size > 0) | |
1620 | { | |
1621 | bfd_vma entry = 0; | |
1622 | ||
1623 | elf_link_hash_traverse (elf_hash_table (info), | |
1624 | rl78_relax_plt_realloc, &entry); | |
1625 | ||
c72f2fb2 | 1626 | for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) |
99c513f6 DD |
1627 | { |
1628 | bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); | |
1629 | unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; | |
1630 | unsigned int idx; | |
1631 | ||
1632 | if (! local_plt_offsets) | |
1633 | continue; | |
1634 | ||
1635 | for (idx = 0; idx < nlocals; ++idx) | |
1636 | if (local_plt_offsets[idx] != (bfd_vma) -1) | |
1637 | { | |
1638 | local_plt_offsets[idx] = entry; | |
1639 | entry += 4; | |
1640 | } | |
1641 | } | |
1642 | } | |
1643 | ||
1644 | return TRUE; | |
1645 | } | |
1646 | ||
9cea966c DD |
1647 | /* Delete some bytes from a section while relaxing. */ |
1648 | ||
1649 | static bfd_boolean | |
1650 | elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, | |
1740ba0c | 1651 | Elf_Internal_Rela *alignment_rel, int force_snip) |
9cea966c DD |
1652 | { |
1653 | Elf_Internal_Shdr * symtab_hdr; | |
1654 | unsigned int sec_shndx; | |
1655 | bfd_byte * contents; | |
1656 | Elf_Internal_Rela * irel; | |
1657 | Elf_Internal_Rela * irelend; | |
1658 | Elf_Internal_Sym * isym; | |
1659 | Elf_Internal_Sym * isymend; | |
1660 | bfd_vma toaddr; | |
1661 | unsigned int symcount; | |
1662 | struct elf_link_hash_entry ** sym_hashes; | |
1663 | struct elf_link_hash_entry ** end_hashes; | |
1664 | ||
1665 | if (!alignment_rel) | |
1666 | force_snip = 1; | |
1667 | ||
1668 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
1669 | ||
1670 | contents = elf_section_data (sec)->this_hdr.contents; | |
1671 | ||
1672 | /* The deletion must stop at the next alignment boundary, if | |
1673 | ALIGNMENT_REL is non-NULL. */ | |
1674 | toaddr = sec->size; | |
1675 | if (alignment_rel) | |
1676 | toaddr = alignment_rel->r_offset; | |
1677 | ||
1678 | irel = elf_section_data (sec)->relocs; | |
2bc56d66 DD |
1679 | if (irel == NULL) |
1680 | { | |
1681 | _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); | |
1682 | irel = elf_section_data (sec)->relocs; | |
1683 | } | |
1684 | ||
9cea966c DD |
1685 | irelend = irel + sec->reloc_count; |
1686 | ||
1687 | /* Actually delete the bytes. */ | |
1688 | memmove (contents + addr, contents + addr + count, | |
1689 | (size_t) (toaddr - addr - count)); | |
1690 | ||
1691 | /* If we don't have an alignment marker to worry about, we can just | |
1692 | shrink the section. Otherwise, we have to fill in the newly | |
1693 | created gap with NOP insns (0x03). */ | |
1694 | if (force_snip) | |
1695 | sec->size -= count; | |
1696 | else | |
1697 | memset (contents + toaddr - count, 0x03, count); | |
1698 | ||
1699 | /* Adjust all the relocs. */ | |
2bc56d66 | 1700 | for (; irel && irel < irelend; irel++) |
9cea966c DD |
1701 | { |
1702 | /* Get the new reloc address. */ | |
1703 | if (irel->r_offset > addr | |
1704 | && (irel->r_offset < toaddr | |
1705 | || (force_snip && irel->r_offset == toaddr))) | |
1706 | irel->r_offset -= count; | |
1707 | ||
1708 | /* If we see an ALIGN marker at the end of the gap, we move it | |
1709 | to the beginning of the gap, since marking these gaps is what | |
1710 | they're for. */ | |
1711 | if (irel->r_offset == toaddr | |
1712 | && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX | |
1713 | && irel->r_addend & RL78_RELAXA_ALIGN) | |
1714 | irel->r_offset -= count; | |
1715 | } | |
1716 | ||
1717 | /* Adjust the local symbols defined in this section. */ | |
1718 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1719 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1720 | isymend = isym + symtab_hdr->sh_info; | |
1721 | ||
1722 | for (; isym < isymend; isym++) | |
1723 | { | |
1724 | /* If the symbol is in the range of memory we just moved, we | |
1725 | have to adjust its value. */ | |
1726 | if (isym->st_shndx == sec_shndx | |
1727 | && isym->st_value > addr | |
1728 | && isym->st_value < toaddr) | |
1729 | isym->st_value -= count; | |
1730 | ||
1731 | /* If the symbol *spans* the bytes we just deleted (i.e. it's | |
1732 | *end* is in the moved bytes but it's *start* isn't), then we | |
1733 | must adjust its size. */ | |
1734 | if (isym->st_shndx == sec_shndx | |
1735 | && isym->st_value < addr | |
1736 | && isym->st_value + isym->st_size > addr | |
1737 | && isym->st_value + isym->st_size < toaddr) | |
1738 | isym->st_size -= count; | |
1739 | } | |
1740 | ||
1741 | /* Now adjust the global symbols defined in this section. */ | |
1742 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
1743 | - symtab_hdr->sh_info); | |
1744 | sym_hashes = elf_sym_hashes (abfd); | |
1745 | end_hashes = sym_hashes + symcount; | |
1746 | ||
1747 | for (; sym_hashes < end_hashes; sym_hashes++) | |
1748 | { | |
1749 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
1750 | ||
1751 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1752 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1753 | && sym_hash->root.u.def.section == sec) | |
1754 | { | |
1755 | /* As above, adjust the value if needed. */ | |
1756 | if (sym_hash->root.u.def.value > addr | |
1757 | && sym_hash->root.u.def.value < toaddr) | |
1758 | sym_hash->root.u.def.value -= count; | |
1759 | ||
1760 | /* As above, adjust the size if needed. */ | |
1761 | if (sym_hash->root.u.def.value < addr | |
1762 | && sym_hash->root.u.def.value + sym_hash->size > addr | |
1763 | && sym_hash->root.u.def.value + sym_hash->size < toaddr) | |
1764 | sym_hash->size -= count; | |
1765 | } | |
1766 | } | |
1767 | ||
1768 | return TRUE; | |
1769 | } | |
1770 | ||
1771 | /* Used to sort relocs by address. If relocs have the same address, | |
1772 | we maintain their relative order, except that R_RL78_RH_RELAX | |
1773 | alignment relocs must be the first reloc for any given address. */ | |
1774 | ||
1775 | static void | |
1776 | reloc_bubblesort (Elf_Internal_Rela * r, int count) | |
1777 | { | |
1778 | int i; | |
1779 | bfd_boolean again; | |
1780 | bfd_boolean swappit; | |
1781 | ||
1782 | /* This is almost a classic bubblesort. It's the slowest sort, but | |
1783 | we're taking advantage of the fact that the relocations are | |
1784 | mostly in order already (the assembler emits them that way) and | |
1785 | we need relocs with the same address to remain in the same | |
1786 | relative order. */ | |
1787 | again = TRUE; | |
1788 | while (again) | |
1789 | { | |
1790 | again = FALSE; | |
1791 | for (i = 0; i < count - 1; i ++) | |
1792 | { | |
1793 | if (r[i].r_offset > r[i + 1].r_offset) | |
1794 | swappit = TRUE; | |
1795 | else if (r[i].r_offset < r[i + 1].r_offset) | |
1796 | swappit = FALSE; | |
1797 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX | |
1798 | && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) | |
1799 | swappit = TRUE; | |
1800 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX | |
1801 | && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) | |
1802 | && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX | |
1803 | && (r[i].r_addend & RL78_RELAXA_ALIGN))) | |
1804 | swappit = TRUE; | |
1805 | else | |
1806 | swappit = FALSE; | |
1807 | ||
1808 | if (swappit) | |
1809 | { | |
1810 | Elf_Internal_Rela tmp; | |
1811 | ||
1812 | tmp = r[i]; | |
1813 | r[i] = r[i + 1]; | |
1814 | r[i + 1] = tmp; | |
1815 | /* If we do move a reloc back, re-scan to see if it | |
1816 | needs to be moved even further back. This avoids | |
1817 | most of the O(n^2) behavior for our cases. */ | |
1818 | if (i > 0) | |
1819 | i -= 2; | |
1820 | again = TRUE; | |
1821 | } | |
1822 | } | |
1823 | } | |
1824 | } | |
1825 | ||
1826 | ||
1827 | #define OFFSET_FOR_RELOC(rel, lrel, scale) \ | |
1828 | rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ | |
6ff71e76 | 1829 | lrel, abfd, sec, link_info, scale) |
9cea966c DD |
1830 | |
1831 | static bfd_vma | |
1832 | rl78_offset_for_reloc (bfd * abfd, | |
6ff71e76 NC |
1833 | Elf_Internal_Rela * rel, |
1834 | Elf_Internal_Shdr * symtab_hdr, | |
1835 | Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, | |
1836 | Elf_Internal_Sym * intsyms, | |
1837 | Elf_Internal_Rela ** lrel, | |
1838 | bfd * input_bfd, | |
1839 | asection * input_section, | |
1840 | struct bfd_link_info * info, | |
1841 | int * scale) | |
9cea966c DD |
1842 | { |
1843 | bfd_vma symval; | |
9cea966c DD |
1844 | |
1845 | *scale = 1; | |
1846 | ||
1847 | /* REL is the first of 1..N relocations. We compute the symbol | |
1848 | value for each relocation, then combine them if needed. LREL | |
1849 | gets a pointer to the last relocation used. */ | |
1850 | while (1) | |
1851 | { | |
6ff71e76 | 1852 | unsigned long r_type; |
9cea966c DD |
1853 | |
1854 | /* Get the value of the symbol referred to by the reloc. */ | |
1855 | if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) | |
1856 | { | |
1857 | /* A local symbol. */ | |
1858 | Elf_Internal_Sym *isym; | |
1859 | asection *ssec; | |
1860 | ||
1861 | isym = intsyms + ELF32_R_SYM (rel->r_info); | |
1862 | ||
1863 | if (isym->st_shndx == SHN_UNDEF) | |
1864 | ssec = bfd_und_section_ptr; | |
1865 | else if (isym->st_shndx == SHN_ABS) | |
1866 | ssec = bfd_abs_section_ptr; | |
1867 | else if (isym->st_shndx == SHN_COMMON) | |
1868 | ssec = bfd_com_section_ptr; | |
1869 | else | |
1870 | ssec = bfd_section_from_elf_index (abfd, | |
1871 | isym->st_shndx); | |
1872 | ||
1873 | /* Initial symbol value. */ | |
1874 | symval = isym->st_value; | |
1875 | ||
1876 | /* GAS may have made this symbol relative to a section, in | |
1877 | which case, we have to add the addend to find the | |
1878 | symbol. */ | |
1879 | if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) | |
1880 | symval += rel->r_addend; | |
1881 | ||
1882 | if (ssec) | |
1883 | { | |
1884 | if ((ssec->flags & SEC_MERGE) | |
dbaa2011 | 1885 | && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) |
9cea966c DD |
1886 | symval = _bfd_merged_section_offset (abfd, & ssec, |
1887 | elf_section_data (ssec)->sec_info, | |
1888 | symval); | |
1889 | } | |
1890 | ||
1891 | /* Now make the offset relative to where the linker is putting it. */ | |
1892 | if (ssec) | |
1893 | symval += | |
1894 | ssec->output_section->vma + ssec->output_offset; | |
1895 | ||
1896 | symval += rel->r_addend; | |
1897 | } | |
1898 | else | |
1899 | { | |
1900 | unsigned long indx; | |
1901 | struct elf_link_hash_entry * h; | |
1902 | ||
1903 | /* An external symbol. */ | |
1904 | indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; | |
1905 | h = elf_sym_hashes (abfd)[indx]; | |
1906 | BFD_ASSERT (h != NULL); | |
1907 | ||
1908 | if (h->root.type != bfd_link_hash_defined | |
1909 | && h->root.type != bfd_link_hash_defweak) | |
1910 | { | |
1911 | /* This appears to be a reference to an undefined | |
1912 | symbol. Just ignore it--it will be caught by the | |
1913 | regular reloc processing. */ | |
1914 | if (lrel) | |
1915 | *lrel = rel; | |
1916 | return 0; | |
1917 | } | |
1918 | ||
1919 | symval = (h->root.u.def.value | |
1920 | + h->root.u.def.section->output_section->vma | |
1921 | + h->root.u.def.section->output_offset); | |
1922 | ||
1923 | symval += rel->r_addend; | |
1924 | } | |
1925 | ||
6ff71e76 NC |
1926 | r_type = ELF32_R_TYPE (rel->r_info); |
1927 | switch (r_type) | |
9cea966c DD |
1928 | { |
1929 | case R_RL78_SYM: | |
6ff71e76 | 1930 | (void) rl78_compute_complex_reloc (r_type, symval, input_section); |
9cea966c DD |
1931 | break; |
1932 | ||
6ff71e76 NC |
1933 | case R_RL78_OPromtop: |
1934 | symval = get_romstart (NULL, info, input_bfd, input_section, rel->r_offset); | |
1935 | (void) rl78_compute_complex_reloc (r_type, symval, input_section); | |
9cea966c DD |
1936 | break; |
1937 | ||
6ff71e76 NC |
1938 | case R_RL78_OPramtop: |
1939 | symval = get_ramstart (NULL, info, input_bfd, input_section, rel->r_offset); | |
1940 | (void) rl78_compute_complex_reloc (r_type, symval, input_section); | |
9cea966c DD |
1941 | break; |
1942 | ||
6ff71e76 NC |
1943 | case R_RL78_OPneg: |
1944 | case R_RL78_OPadd: | |
9cea966c | 1945 | case R_RL78_OPsub: |
9cea966c | 1946 | case R_RL78_OPmul: |
9cea966c | 1947 | case R_RL78_OPdiv: |
9cea966c | 1948 | case R_RL78_OPshla: |
9cea966c | 1949 | case R_RL78_OPshra: |
9cea966c | 1950 | case R_RL78_OPsctsize: |
9cea966c | 1951 | case R_RL78_OPscttop: |
9cea966c | 1952 | case R_RL78_OPand: |
9cea966c | 1953 | case R_RL78_OPor: |
9cea966c | 1954 | case R_RL78_OPxor: |
9cea966c | 1955 | case R_RL78_OPnot: |
9cea966c | 1956 | case R_RL78_OPmod: |
6ff71e76 | 1957 | (void) rl78_compute_complex_reloc (r_type, 0, input_section); |
9cea966c DD |
1958 | break; |
1959 | ||
1960 | case R_RL78_DIR16UL: | |
1961 | case R_RL78_DIR8UL: | |
1962 | case R_RL78_ABS16UL: | |
1963 | case R_RL78_ABS8UL: | |
9cea966c | 1964 | *scale = 4; |
6ff71e76 | 1965 | goto reloc_computes_value; |
9cea966c DD |
1966 | |
1967 | case R_RL78_DIR16UW: | |
1968 | case R_RL78_DIR8UW: | |
1969 | case R_RL78_ABS16UW: | |
1970 | case R_RL78_ABS8UW: | |
9cea966c | 1971 | *scale = 2; |
6ff71e76 NC |
1972 | goto reloc_computes_value; |
1973 | ||
9cea966c | 1974 | default: |
6ff71e76 NC |
1975 | reloc_computes_value: |
1976 | symval = rl78_compute_complex_reloc (r_type, 0, input_section); | |
9cea966c DD |
1977 | if (lrel) |
1978 | *lrel = rel; | |
1979 | return symval; | |
1980 | } | |
1981 | ||
1982 | rel ++; | |
1983 | } | |
1984 | } | |
1985 | ||
1986 | struct { | |
1987 | int prefix; /* or -1 for "no prefix" */ | |
1988 | int insn; /* or -1 for "end of list" */ | |
1989 | int insn_for_saddr; /* or -1 for "no alternative" */ | |
1990 | int insn_for_sfr; /* or -1 for "no alternative" */ | |
1991 | } relax_addr16[] = { | |
1992 | { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ | |
1993 | { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ | |
1994 | { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ | |
1995 | { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ | |
1996 | ||
1997 | { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ | |
1998 | { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ | |
1999 | { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ | |
2000 | { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ | |
2001 | { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ | |
2002 | { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ | |
2003 | { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ | |
2004 | { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ | |
2005 | ||
2006 | { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ | |
2007 | { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ | |
2008 | { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ | |
2009 | { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ | |
2010 | { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ | |
2011 | ||
2012 | { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ | |
2013 | { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ | |
2014 | { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ | |
2015 | { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ | |
2016 | ||
2017 | { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ | |
2018 | { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ | |
2019 | { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ | |
2020 | ||
2021 | { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ | |
2022 | { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ | |
2023 | { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ | |
2024 | { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ | |
2025 | { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ | |
2026 | { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ | |
2027 | ||
2028 | { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ | |
2029 | ||
2030 | { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ | |
2031 | { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ | |
2032 | { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ | |
2033 | { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ | |
2034 | { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ | |
2035 | { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ | |
2036 | { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ | |
2037 | { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ | |
2038 | ||
2039 | { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ | |
2040 | { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ | |
2041 | { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ | |
2042 | { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ | |
2043 | { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ | |
2044 | { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ | |
2045 | { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ | |
2046 | { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ | |
68ffbac6 | 2047 | |
9cea966c DD |
2048 | { -1, -1, -1, -1 } |
2049 | }; | |
2050 | ||
2051 | /* Relax one section. */ | |
2052 | ||
99c513f6 DD |
2053 | static bfd_boolean |
2054 | rl78_elf_relax_section | |
2055 | (bfd * abfd, | |
2056 | asection * sec, | |
2057 | struct bfd_link_info * link_info, | |
2058 | bfd_boolean * again) | |
2059 | { | |
9cea966c DD |
2060 | Elf_Internal_Shdr * symtab_hdr; |
2061 | Elf_Internal_Shdr * shndx_hdr; | |
2062 | Elf_Internal_Rela * internal_relocs; | |
2063 | Elf_Internal_Rela * free_relocs = NULL; | |
2064 | Elf_Internal_Rela * irel; | |
2065 | Elf_Internal_Rela * srel; | |
2066 | Elf_Internal_Rela * irelend; | |
2067 | Elf_Internal_Rela * next_alignment; | |
9cea966c DD |
2068 | bfd_byte * contents = NULL; |
2069 | bfd_byte * free_contents = NULL; | |
2070 | Elf_Internal_Sym * intsyms = NULL; | |
2071 | Elf_Internal_Sym * free_intsyms = NULL; | |
2072 | Elf_External_Sym_Shndx * shndx_buf = NULL; | |
2073 | bfd_vma pc; | |
9cea966c DD |
2074 | bfd_vma symval ATTRIBUTE_UNUSED = 0; |
2075 | int pcrel ATTRIBUTE_UNUSED = 0; | |
2076 | int code ATTRIBUTE_UNUSED = 0; | |
2077 | int section_alignment_glue; | |
2078 | int scale; | |
2079 | ||
99c513f6 DD |
2080 | if (abfd == elf_hash_table (link_info)->dynobj |
2081 | && strcmp (sec->name, ".plt") == 0) | |
2082 | return rl78_elf_relax_plt_section (abfd, sec, link_info, again); | |
2083 | ||
2084 | /* Assume nothing changes. */ | |
2085 | *again = FALSE; | |
9cea966c DD |
2086 | |
2087 | /* We don't have to do anything for a relocatable link, if | |
2088 | this section does not have relocs, or if this is not a | |
2089 | code section. */ | |
2090 | if (link_info->relocatable | |
2091 | || (sec->flags & SEC_RELOC) == 0 | |
2092 | || sec->reloc_count == 0 | |
2093 | || (sec->flags & SEC_CODE) == 0) | |
2094 | return TRUE; | |
2095 | ||
2096 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
2097 | shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; | |
2098 | ||
9cea966c DD |
2099 | /* Get the section contents. */ |
2100 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
2101 | contents = elf_section_data (sec)->this_hdr.contents; | |
2102 | /* Go get them off disk. */ | |
2103 | else | |
2104 | { | |
2105 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
2106 | goto error_return; | |
2107 | elf_section_data (sec)->this_hdr.contents = contents; | |
2108 | } | |
2109 | ||
2110 | /* Read this BFD's symbols. */ | |
2111 | /* Get cached copy if it exists. */ | |
2112 | if (symtab_hdr->contents != NULL) | |
2113 | intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; | |
2114 | else | |
2115 | { | |
2116 | intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); | |
2117 | symtab_hdr->contents = (bfd_byte *) intsyms; | |
2118 | } | |
2119 | ||
2120 | if (shndx_hdr->sh_size != 0) | |
2121 | { | |
2122 | bfd_size_type amt; | |
2123 | ||
2124 | amt = symtab_hdr->sh_info; | |
2125 | amt *= sizeof (Elf_External_Sym_Shndx); | |
2126 | shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); | |
2127 | if (shndx_buf == NULL) | |
2128 | goto error_return; | |
2129 | if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 | |
2c3fc389 | 2130 | || bfd_bread (shndx_buf, amt, abfd) != amt) |
9cea966c DD |
2131 | goto error_return; |
2132 | shndx_hdr->contents = (bfd_byte *) shndx_buf; | |
2133 | } | |
2134 | ||
2135 | /* Get a copy of the native relocations. */ | |
2136 | internal_relocs = (_bfd_elf_link_read_relocs | |
2c3fc389 | 2137 | (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, |
9cea966c DD |
2138 | link_info->keep_memory)); |
2139 | if (internal_relocs == NULL) | |
2140 | goto error_return; | |
2141 | if (! link_info->keep_memory) | |
2142 | free_relocs = internal_relocs; | |
2143 | ||
2144 | /* The RL_ relocs must be just before the operand relocs they go | |
2145 | with, so we must sort them to guarantee this. We use bubblesort | |
2146 | instead of qsort so we can guarantee that relocs with the same | |
2147 | address remain in the same relative order. */ | |
2148 | reloc_bubblesort (internal_relocs, sec->reloc_count); | |
2149 | ||
2150 | /* Walk through them looking for relaxing opportunities. */ | |
2151 | irelend = internal_relocs + sec->reloc_count; | |
2152 | ||
2153 | ||
2154 | /* This will either be NULL or a pointer to the next alignment | |
2155 | relocation. */ | |
2156 | next_alignment = internal_relocs; | |
9cea966c DD |
2157 | |
2158 | /* We calculate worst case shrinkage caused by alignment directives. | |
2159 | No fool-proof, but better than either ignoring the problem or | |
2160 | doing heavy duty analysis of all the alignment markers in all | |
2161 | input sections. */ | |
2162 | section_alignment_glue = 0; | |
2163 | for (irel = internal_relocs; irel < irelend; irel++) | |
2164 | if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX | |
2165 | && irel->r_addend & RL78_RELAXA_ALIGN) | |
2166 | { | |
2167 | int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); | |
2168 | ||
2169 | if (section_alignment_glue < this_glue) | |
2170 | section_alignment_glue = this_glue; | |
2171 | } | |
2172 | /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte | |
2173 | shrinkage. */ | |
2174 | section_alignment_glue *= 2; | |
2175 | ||
2176 | for (irel = internal_relocs; irel < irelend; irel++) | |
2177 | { | |
2178 | unsigned char *insn; | |
2179 | int nrelocs; | |
2180 | ||
2181 | /* The insns we care about are all marked with one of these. */ | |
2182 | if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) | |
2183 | continue; | |
2184 | ||
2185 | if (irel->r_addend & RL78_RELAXA_ALIGN | |
2186 | || next_alignment == internal_relocs) | |
2187 | { | |
2188 | /* When we delete bytes, we need to maintain all the alignments | |
2189 | indicated. In addition, we need to be careful about relaxing | |
2190 | jumps across alignment boundaries - these displacements | |
2191 | *grow* when we delete bytes. For now, don't shrink | |
2192 | displacements across an alignment boundary, just in case. | |
2193 | Note that this only affects relocations to the same | |
2194 | section. */ | |
9cea966c DD |
2195 | next_alignment += 2; |
2196 | while (next_alignment < irelend | |
2197 | && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX | |
2198 | || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) | |
2199 | next_alignment ++; | |
2200 | if (next_alignment >= irelend || next_alignment->r_offset == 0) | |
2201 | next_alignment = NULL; | |
2202 | } | |
2203 | ||
2204 | /* When we hit alignment markers, see if we've shrunk enough | |
2205 | before them to reduce the gap without violating the alignment | |
2206 | requirements. */ | |
2207 | if (irel->r_addend & RL78_RELAXA_ALIGN) | |
2208 | { | |
2209 | /* At this point, the next relocation *should* be the ELIGN | |
2210 | end marker. */ | |
2211 | Elf_Internal_Rela *erel = irel + 1; | |
2212 | unsigned int alignment, nbytes; | |
2213 | ||
2214 | if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) | |
2215 | continue; | |
2216 | if (!(erel->r_addend & RL78_RELAXA_ELIGN)) | |
2217 | continue; | |
2218 | ||
2219 | alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); | |
2220 | ||
2221 | if (erel->r_offset - irel->r_offset < alignment) | |
2222 | continue; | |
2223 | ||
2224 | nbytes = erel->r_offset - irel->r_offset; | |
2225 | nbytes /= alignment; | |
2226 | nbytes *= alignment; | |
2227 | ||
1740ba0c NC |
2228 | elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, |
2229 | next_alignment, erel->r_offset == sec->size); | |
9cea966c DD |
2230 | *again = TRUE; |
2231 | ||
2232 | continue; | |
2233 | } | |
2234 | ||
2235 | if (irel->r_addend & RL78_RELAXA_ELIGN) | |
2236 | continue; | |
2237 | ||
2238 | insn = contents + irel->r_offset; | |
2239 | ||
2240 | nrelocs = irel->r_addend & RL78_RELAXA_RNUM; | |
2241 | ||
2242 | /* At this point, we have an insn that is a candidate for linker | |
2243 | relaxation. There are NRELOCS relocs following that may be | |
2244 | relaxed, although each reloc may be made of more than one | |
2245 | reloc entry (such as gp-rel symbols). */ | |
2246 | ||
2247 | /* Get the value of the symbol referred to by the reloc. Just | |
2248 | in case this is the last reloc in the list, use the RL's | |
2249 | addend to choose between this reloc (no addend) or the next | |
2250 | (yes addend, which means at least one following reloc). */ | |
2251 | ||
2252 | /* srel points to the "current" reloction for this insn - | |
2253 | actually the last reloc for a given operand, which is the one | |
2254 | we need to update. We check the relaxations in the same | |
2255 | order that the relocations happen, so we'll just push it | |
2256 | along as we go. */ | |
2257 | srel = irel; | |
2258 | ||
2259 | pc = sec->output_section->vma + sec->output_offset | |
2260 | + srel->r_offset; | |
2261 | ||
1740ba0c NC |
2262 | #define GET_RELOC \ |
2263 | BFD_ASSERT (nrelocs > 0); \ | |
2264 | symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ | |
2265 | pcrel = symval - pc + srel->r_addend; \ | |
9cea966c DD |
2266 | nrelocs --; |
2267 | ||
2268 | #define SNIPNR(offset, nbytes) \ | |
2269 | elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); | |
1740ba0c NC |
2270 | |
2271 | #define SNIP(offset, nbytes, newtype) \ | |
2272 | SNIPNR (offset, nbytes); \ | |
9cea966c DD |
2273 | srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) |
2274 | ||
2275 | /* The order of these bit tests must match the order that the | |
2276 | relocs appear in. Since we sorted those by offset, we can | |
2277 | predict them. */ | |
2278 | ||
2279 | /*----------------------------------------------------------------------*/ | |
2280 | /* EF ad BR $rel8 pcrel | |
2281 | ED al ah BR !abs16 abs | |
2282 | EE al ah BR $!rel16 pcrel | |
2283 | EC al ah as BR !!abs20 abs | |
2284 | ||
2285 | FD al ah CALL !abs16 abs | |
2286 | FE al ah CALL $!rel16 pcrel | |
2287 | FC al ah as CALL !!abs20 abs | |
2288 | ||
2289 | DC ad BC $rel8 | |
2290 | DE ad BNC $rel8 | |
2291 | DD ad BZ $rel8 | |
2292 | DF ad BNZ $rel8 | |
2293 | 61 C3 ad BH $rel8 | |
2294 | 61 D3 ad BNH $rel8 | |
2295 | 61 C8 EF ad SKC ; BR $rel8 | |
2296 | 61 D8 EF ad SKNC ; BR $rel8 | |
2297 | 61 E8 EF ad SKZ ; BR $rel8 | |
2298 | 61 F8 EF ad SKNZ ; BR $rel8 | |
2299 | 61 E3 EF ad SKH ; BR $rel8 | |
2300 | 61 F3 EF ad SKNH ; BR $rel8 | |
2301 | */ | |
2302 | ||
32e79d39 | 2303 | if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) |
9cea966c | 2304 | { |
1122dc88 DD |
2305 | /* SKIP opcodes that skip non-branches will have a relax tag |
2306 | but no corresponding symbol to relax against; we just | |
2307 | skip those. */ | |
2308 | if (irel->r_addend & RL78_RELAXA_RNUM) | |
2309 | { | |
2310 | GET_RELOC; | |
2311 | } | |
9cea966c DD |
2312 | |
2313 | switch (insn[0]) | |
2314 | { | |
2315 | case 0xec: /* BR !!abs20 */ | |
2316 | ||
2317 | if (pcrel < 127 | |
2318 | && pcrel > -127) | |
2319 | { | |
2320 | insn[0] = 0xef; | |
2321 | insn[1] = pcrel; | |
2322 | SNIP (2, 2, R_RL78_DIR8S_PCREL); | |
2323 | *again = TRUE; | |
2324 | } | |
2325 | else if (symval < 65536) | |
2326 | { | |
2327 | insn[0] = 0xed; | |
2328 | insn[1] = symval & 0xff; | |
2329 | insn[2] = symval >> 8; | |
2330 | SNIP (2, 1, R_RL78_DIR16S); | |
2331 | *again = TRUE; | |
2332 | } | |
2333 | else if (pcrel < 32767 | |
2334 | && pcrel > -32767) | |
2335 | { | |
2336 | insn[0] = 0xee; | |
2337 | insn[1] = pcrel & 0xff; | |
2338 | insn[2] = pcrel >> 8; | |
2339 | SNIP (2, 1, R_RL78_DIR16S_PCREL); | |
2340 | *again = TRUE; | |
2341 | } | |
2342 | break; | |
2343 | ||
2344 | case 0xee: /* BR $!pcrel16 */ | |
2345 | case 0xed: /* BR $!abs16 */ | |
2346 | if (pcrel < 127 | |
2347 | && pcrel > -127) | |
2348 | { | |
2349 | insn[0] = 0xef; | |
2350 | insn[1] = pcrel; | |
2351 | SNIP (2, 1, R_RL78_DIR8S_PCREL); | |
2352 | *again = TRUE; | |
2353 | } | |
2354 | break; | |
2355 | ||
2356 | case 0xfc: /* CALL !!abs20 */ | |
2357 | if (symval < 65536) | |
2358 | { | |
2359 | insn[0] = 0xfd; | |
2360 | insn[1] = symval & 0xff; | |
2361 | insn[2] = symval >> 8; | |
2362 | SNIP (2, 1, R_RL78_DIR16S); | |
2363 | *again = TRUE; | |
2364 | } | |
2365 | else if (pcrel < 32767 | |
2366 | && pcrel > -32767) | |
2367 | { | |
2368 | insn[0] = 0xfe; | |
2369 | insn[1] = pcrel & 0xff; | |
2370 | insn[2] = pcrel >> 8; | |
2371 | SNIP (2, 1, R_RL78_DIR16S_PCREL); | |
2372 | *again = TRUE; | |
2373 | } | |
2374 | break; | |
2375 | ||
2376 | case 0x61: /* PREFIX */ | |
2377 | /* For SKIP/BR, we change the BR opcode and delete the | |
2378 | SKIP. That way, we don't have to find and change the | |
2379 | relocation for the BR. */ | |
1122dc88 DD |
2380 | /* Note that, for the case where we're skipping some |
2381 | other insn, we have no "other" reloc but that's safe | |
2382 | here anyway. */ | |
9cea966c DD |
2383 | switch (insn[1]) |
2384 | { | |
2385 | case 0xc8: /* SKC */ | |
2386 | if (insn[2] == 0xef) | |
2387 | { | |
2388 | insn[2] = 0xde; /* BNC */ | |
2389 | SNIPNR (0, 2); | |
2390 | } | |
2391 | break; | |
2392 | ||
2393 | case 0xd8: /* SKNC */ | |
2394 | if (insn[2] == 0xef) | |
2395 | { | |
2396 | insn[2] = 0xdc; /* BC */ | |
2397 | SNIPNR (0, 2); | |
2398 | } | |
2399 | break; | |
2400 | ||
2401 | case 0xe8: /* SKZ */ | |
2402 | if (insn[2] == 0xef) | |
2403 | { | |
2404 | insn[2] = 0xdf; /* BNZ */ | |
2405 | SNIPNR (0, 2); | |
2406 | } | |
2407 | break; | |
2408 | ||
2409 | case 0xf8: /* SKNZ */ | |
2410 | if (insn[2] == 0xef) | |
2411 | { | |
2412 | insn[2] = 0xdd; /* BZ */ | |
2413 | SNIPNR (0, 2); | |
2414 | } | |
2415 | break; | |
2416 | ||
2417 | case 0xe3: /* SKH */ | |
2418 | if (insn[2] == 0xef) | |
2419 | { | |
2420 | insn[2] = 0xd3; /* BNH */ | |
2421 | SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ | |
2422 | } | |
2423 | break; | |
2424 | ||
2425 | case 0xf3: /* SKNH */ | |
2426 | if (insn[2] == 0xef) | |
2427 | { | |
2428 | insn[2] = 0xc3; /* BH */ | |
2429 | SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ | |
2430 | } | |
2431 | break; | |
2432 | } | |
2433 | break; | |
2434 | } | |
9cea966c DD |
2435 | } |
2436 | ||
71eef2bd DD |
2437 | if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 |
2438 | && nrelocs > 0) | |
9cea966c DD |
2439 | { |
2440 | /*----------------------------------------------------------------------*/ | |
2441 | /* Some insns have both a 16-bit address operand and an 8-bit | |
2442 | variant if the address is within a special range: | |
2443 | ||
2444 | Address 16-bit operand SADDR range SFR range | |
2445 | FFF00-FFFFF 0xff00-0xffff 0x00-0xff | |
2446 | FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff | |
2447 | ||
2448 | The RELAX_ADDR16[] array has the insn encodings for the | |
2449 | 16-bit operand version, as well as the SFR and SADDR | |
2450 | variants. We only need to replace the encodings and | |
2451 | adjust the operand. | |
2452 | ||
2453 | Note: we intentionally do not attempt to decode and skip | |
2454 | any ES: prefix, as adding ES: means the addr16 (likely) | |
2455 | no longer points to saddr/sfr space. | |
2456 | */ | |
2457 | ||
2458 | int is_sfr; | |
2459 | int is_saddr; | |
2460 | int idx; | |
2461 | int poff; | |
2462 | ||
2463 | GET_RELOC; | |
2464 | ||
9cea966c DD |
2465 | if (0xffe20 <= symval && symval <= 0xfffff) |
2466 | { | |
2467 | ||
2468 | is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); | |
2469 | is_sfr = (0xfff00 <= symval && symval <= 0xfffff); | |
2470 | ||
2471 | for (idx = 0; relax_addr16[idx].insn != -1; idx ++) | |
2472 | { | |
2473 | if (relax_addr16[idx].prefix != -1 | |
2474 | && insn[0] == relax_addr16[idx].prefix | |
2475 | && insn[1] == relax_addr16[idx].insn) | |
2476 | { | |
2477 | poff = 1; | |
2478 | } | |
2479 | else if (relax_addr16[idx].prefix == -1 | |
2480 | && insn[0] == relax_addr16[idx].insn) | |
2481 | { | |
2482 | poff = 0; | |
2483 | } | |
2484 | else | |
2485 | continue; | |
2486 | ||
2487 | /* We have a matched insn, and poff is 0 or 1 depending | |
2488 | on the base pattern size. */ | |
2489 | ||
2490 | if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) | |
2491 | { | |
2492 | insn[poff] = relax_addr16[idx].insn_for_sfr; | |
2493 | SNIP (poff+2, 1, R_RL78_RH_SFR); | |
9cea966c DD |
2494 | } |
2495 | ||
2496 | else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) | |
2497 | { | |
2498 | insn[poff] = relax_addr16[idx].insn_for_saddr; | |
2499 | SNIP (poff+2, 1, R_RL78_RH_SADDR); | |
9cea966c | 2500 | } |
9cea966c DD |
2501 | } |
2502 | } | |
2503 | } | |
9cea966c | 2504 | /*----------------------------------------------------------------------*/ |
9cea966c DD |
2505 | } |
2506 | ||
2507 | return TRUE; | |
2508 | ||
2509 | error_return: | |
2510 | if (free_relocs != NULL) | |
2511 | free (free_relocs); | |
2512 | ||
2513 | if (free_contents != NULL) | |
2514 | free (free_contents); | |
2515 | ||
2516 | if (shndx_buf != NULL) | |
2517 | { | |
2518 | shndx_hdr->contents = NULL; | |
2519 | free (shndx_buf); | |
2520 | } | |
2521 | ||
2522 | if (free_intsyms != NULL) | |
2523 | free (free_intsyms); | |
2524 | ||
99c513f6 DD |
2525 | return TRUE; |
2526 | } | |
2527 | ||
2528 | \f | |
2529 | ||
2530 | #define ELF_ARCH bfd_arch_rl78 | |
2531 | #define ELF_MACHINE_CODE EM_RL78 | |
2532 | #define ELF_MAXPAGESIZE 0x1000 | |
2533 | ||
6d00b590 | 2534 | #define TARGET_LITTLE_SYM rl78_elf32_vec |
99c513f6 DD |
2535 | #define TARGET_LITTLE_NAME "elf32-rl78" |
2536 | ||
2537 | #define elf_info_to_howto_rel NULL | |
2538 | #define elf_info_to_howto rl78_info_to_howto_rela | |
2539 | #define elf_backend_object_p rl78_elf_object_p | |
2540 | #define elf_backend_relocate_section rl78_elf_relocate_section | |
2541 | #define elf_symbol_leading_char ('_') | |
2542 | #define elf_backend_can_gc_sections 1 | |
2543 | ||
2544 | #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup | |
2545 | #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup | |
2546 | #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags | |
2547 | #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data | |
2548 | #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data | |
2549 | ||
2550 | #define bfd_elf32_bfd_relax_section rl78_elf_relax_section | |
2551 | #define elf_backend_check_relocs rl78_elf_check_relocs | |
2552 | #define elf_backend_always_size_sections \ | |
2553 | rl78_elf_always_size_sections | |
2554 | #define elf_backend_finish_dynamic_sections \ | |
2555 | rl78_elf_finish_dynamic_sections | |
2556 | ||
2557 | #include "elf32-target.h" |