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c7927a3c | 1 | /* Renesas RX specific support for 32-bit ELF. |
e57278ef | 2 | Copyright (C) 2008, 2009, 2010, 2011 |
c7927a3c NC |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "sysdep.h" | |
22 | #include "bfd.h" | |
d68cd58c | 23 | #include "bfd_stdint.h" |
c7927a3c NC |
24 | #include "libbfd.h" |
25 | #include "elf-bfd.h" | |
26 | #include "elf/rx.h" | |
27 | #include "libiberty.h" | |
28 | ||
29 | #define RX_OPCODE_BIG_ENDIAN 0 | |
30 | ||
4c422395 DD |
31 | /* This is a meta-target that's used only with objcopy, to avoid the |
32 | endian-swap we would otherwise get. We check for this in | |
33 | rx_elf_object_p(). */ | |
34 | const bfd_target bfd_elf32_rx_be_ns_vec; | |
35 | ||
c7927a3c NC |
36 | #ifdef DEBUG |
37 | char * rx_get_reloc (long); | |
9ccb8af9 | 38 | void rx_dump_symtab (bfd *, void *, void *); |
c7927a3c NC |
39 | #endif |
40 | ||
41 | #define RXREL(n,sz,bit,shift,complain,pcrel) \ | |
42 | HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ | |
43 | bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE) | |
44 | ||
45 | /* Note that the relocations around 0x7f are internal to this file; | |
46 | feel free to move them as needed to avoid conflicts with published | |
47 | relocation numbers. */ | |
48 | ||
49 | static reloc_howto_type rx_elf_howto_table [] = | |
50 | { | |
51 | RXREL (NONE, 0, 0, 0, dont, FALSE), | |
52 | RXREL (DIR32, 2, 32, 0, signed, FALSE), | |
53 | RXREL (DIR24S, 2, 24, 0, signed, FALSE), | |
54 | RXREL (DIR16, 1, 16, 0, dont, FALSE), | |
55 | RXREL (DIR16U, 1, 16, 0, unsigned, FALSE), | |
56 | RXREL (DIR16S, 1, 16, 0, signed, FALSE), | |
57 | RXREL (DIR8, 0, 8, 0, dont, FALSE), | |
58 | RXREL (DIR8U, 0, 8, 0, unsigned, FALSE), | |
59 | RXREL (DIR8S, 0, 8, 0, signed, FALSE), | |
60 | RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), | |
61 | RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), | |
62 | RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), | |
63 | RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE), | |
64 | RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE), | |
65 | RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE), | |
66 | RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE), | |
67 | RXREL (DIR32_REV, 1, 16, 0, dont, FALSE), | |
68 | RXREL (DIR16_REV, 1, 16, 0, dont, FALSE), | |
69 | RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), | |
70 | ||
71 | EMPTY_HOWTO (0x13), | |
72 | EMPTY_HOWTO (0x14), | |
73 | EMPTY_HOWTO (0x15), | |
74 | EMPTY_HOWTO (0x16), | |
75 | EMPTY_HOWTO (0x17), | |
76 | EMPTY_HOWTO (0x18), | |
77 | EMPTY_HOWTO (0x19), | |
78 | EMPTY_HOWTO (0x1a), | |
79 | EMPTY_HOWTO (0x1b), | |
80 | EMPTY_HOWTO (0x1c), | |
81 | EMPTY_HOWTO (0x1d), | |
82 | EMPTY_HOWTO (0x1e), | |
83 | EMPTY_HOWTO (0x1f), | |
84 | ||
85 | RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE), | |
86 | RXREL (RH_16_OP, 1, 16, 0, signed, FALSE), | |
87 | RXREL (RH_24_OP, 2, 24, 0, signed, FALSE), | |
88 | RXREL (RH_32_OP, 2, 32, 0, signed, FALSE), | |
89 | RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE), | |
90 | RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE), | |
91 | RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE), | |
92 | RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE), | |
93 | RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE), | |
94 | RXREL (RH_DIFF, 2, 32, 0, signed, FALSE), | |
95 | RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE), | |
96 | RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE), | |
97 | RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE), | |
98 | RXREL (RH_RELAX, 0, 0, 0, dont, FALSE), | |
99 | ||
100 | EMPTY_HOWTO (0x2e), | |
101 | EMPTY_HOWTO (0x2f), | |
102 | EMPTY_HOWTO (0x30), | |
103 | EMPTY_HOWTO (0x31), | |
104 | EMPTY_HOWTO (0x32), | |
105 | EMPTY_HOWTO (0x33), | |
106 | EMPTY_HOWTO (0x34), | |
107 | EMPTY_HOWTO (0x35), | |
108 | EMPTY_HOWTO (0x36), | |
109 | EMPTY_HOWTO (0x37), | |
110 | EMPTY_HOWTO (0x38), | |
111 | EMPTY_HOWTO (0x39), | |
112 | EMPTY_HOWTO (0x3a), | |
113 | EMPTY_HOWTO (0x3b), | |
114 | EMPTY_HOWTO (0x3c), | |
115 | EMPTY_HOWTO (0x3d), | |
116 | EMPTY_HOWTO (0x3e), | |
117 | EMPTY_HOWTO (0x3f), | |
118 | EMPTY_HOWTO (0x40), | |
119 | ||
120 | RXREL (ABS32, 2, 32, 0, dont, FALSE), | |
121 | RXREL (ABS24S, 2, 24, 0, signed, FALSE), | |
122 | RXREL (ABS16, 1, 16, 0, dont, FALSE), | |
123 | RXREL (ABS16U, 1, 16, 0, unsigned, FALSE), | |
124 | RXREL (ABS16S, 1, 16, 0, signed, FALSE), | |
125 | RXREL (ABS8, 0, 8, 0, dont, FALSE), | |
126 | RXREL (ABS8U, 0, 8, 0, unsigned, FALSE), | |
127 | RXREL (ABS8S, 0, 8, 0, signed, FALSE), | |
128 | RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), | |
129 | RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), | |
130 | RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), | |
131 | RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE), | |
132 | RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE), | |
133 | RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE), | |
134 | RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE), | |
135 | RXREL (ABS32_REV, 2, 32, 0, dont, FALSE), | |
136 | RXREL (ABS16_REV, 1, 16, 0, dont, FALSE), | |
137 | ||
138 | #define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32) | |
139 | ||
140 | EMPTY_HOWTO (0x52), | |
141 | EMPTY_HOWTO (0x53), | |
142 | EMPTY_HOWTO (0x54), | |
143 | EMPTY_HOWTO (0x55), | |
144 | EMPTY_HOWTO (0x56), | |
145 | EMPTY_HOWTO (0x57), | |
146 | EMPTY_HOWTO (0x58), | |
147 | EMPTY_HOWTO (0x59), | |
148 | EMPTY_HOWTO (0x5a), | |
149 | EMPTY_HOWTO (0x5b), | |
150 | EMPTY_HOWTO (0x5c), | |
151 | EMPTY_HOWTO (0x5d), | |
152 | EMPTY_HOWTO (0x5e), | |
153 | EMPTY_HOWTO (0x5f), | |
154 | EMPTY_HOWTO (0x60), | |
155 | EMPTY_HOWTO (0x61), | |
156 | EMPTY_HOWTO (0x62), | |
157 | EMPTY_HOWTO (0x63), | |
158 | EMPTY_HOWTO (0x64), | |
159 | EMPTY_HOWTO (0x65), | |
160 | EMPTY_HOWTO (0x66), | |
161 | EMPTY_HOWTO (0x67), | |
162 | EMPTY_HOWTO (0x68), | |
163 | EMPTY_HOWTO (0x69), | |
164 | EMPTY_HOWTO (0x6a), | |
165 | EMPTY_HOWTO (0x6b), | |
166 | EMPTY_HOWTO (0x6c), | |
167 | EMPTY_HOWTO (0x6d), | |
168 | EMPTY_HOWTO (0x6e), | |
169 | EMPTY_HOWTO (0x6f), | |
170 | EMPTY_HOWTO (0x70), | |
171 | EMPTY_HOWTO (0x71), | |
172 | EMPTY_HOWTO (0x72), | |
173 | EMPTY_HOWTO (0x73), | |
174 | EMPTY_HOWTO (0x74), | |
175 | EMPTY_HOWTO (0x75), | |
176 | EMPTY_HOWTO (0x76), | |
177 | EMPTY_HOWTO (0x77), | |
178 | ||
179 | /* These are internal. */ | |
180 | /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */ | |
181 | /* ---- ---- 4--- 3210. */ | |
182 | #define R_RX_RH_ABS5p8B 0x78 | |
183 | RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE), | |
184 | #define R_RX_RH_ABS5p8W 0x79 | |
185 | RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE), | |
186 | #define R_RX_RH_ABS5p8L 0x7a | |
187 | RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE), | |
188 | /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */ | |
189 | /* ---- -432 1--- 0---. */ | |
190 | #define R_RX_RH_ABS5p5B 0x7b | |
191 | RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE), | |
192 | #define R_RX_RH_ABS5p5W 0x7c | |
193 | RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE), | |
194 | #define R_RX_RH_ABS5p5L 0x7d | |
195 | RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE), | |
196 | /* A 4-bit unsigned immediate at bit position 8. */ | |
197 | #define R_RX_RH_UIMM4p8 0x7e | |
198 | RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE), | |
199 | /* A 4-bit negative unsigned immediate at bit position 8. */ | |
200 | #define R_RX_RH_UNEG4p8 0x7f | |
201 | RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE), | |
202 | /* End of internal relocs. */ | |
203 | ||
204 | RXREL (SYM, 2, 32, 0, dont, FALSE), | |
205 | RXREL (OPneg, 2, 32, 0, dont, FALSE), | |
206 | RXREL (OPadd, 2, 32, 0, dont, FALSE), | |
207 | RXREL (OPsub, 2, 32, 0, dont, FALSE), | |
208 | RXREL (OPmul, 2, 32, 0, dont, FALSE), | |
209 | RXREL (OPdiv, 2, 32, 0, dont, FALSE), | |
210 | RXREL (OPshla, 2, 32, 0, dont, FALSE), | |
211 | RXREL (OPshra, 2, 32, 0, dont, FALSE), | |
212 | RXREL (OPsctsize, 2, 32, 0, dont, FALSE), | |
213 | RXREL (OPscttop, 2, 32, 0, dont, FALSE), | |
214 | RXREL (OPand, 2, 32, 0, dont, FALSE), | |
215 | RXREL (OPor, 2, 32, 0, dont, FALSE), | |
216 | RXREL (OPxor, 2, 32, 0, dont, FALSE), | |
217 | RXREL (OPnot, 2, 32, 0, dont, FALSE), | |
218 | RXREL (OPmod, 2, 32, 0, dont, FALSE), | |
219 | RXREL (OPromtop, 2, 32, 0, dont, FALSE), | |
220 | RXREL (OPramtop, 2, 32, 0, dont, FALSE) | |
221 | }; | |
222 | \f | |
223 | /* Map BFD reloc types to RX ELF reloc types. */ | |
224 | ||
225 | struct rx_reloc_map | |
226 | { | |
227 | bfd_reloc_code_real_type bfd_reloc_val; | |
228 | unsigned int rx_reloc_val; | |
229 | }; | |
230 | ||
231 | static const struct rx_reloc_map rx_reloc_map [] = | |
232 | { | |
233 | { BFD_RELOC_NONE, R_RX_NONE }, | |
234 | { BFD_RELOC_8, R_RX_DIR8S }, | |
235 | { BFD_RELOC_16, R_RX_DIR16S }, | |
236 | { BFD_RELOC_24, R_RX_DIR24S }, | |
237 | { BFD_RELOC_32, R_RX_DIR32 }, | |
238 | { BFD_RELOC_RX_16_OP, R_RX_DIR16 }, | |
239 | { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL }, | |
240 | { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL }, | |
241 | { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL }, | |
242 | { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL }, | |
243 | { BFD_RELOC_RX_8U, R_RX_DIR8U }, | |
244 | { BFD_RELOC_RX_16U, R_RX_DIR16U }, | |
245 | { BFD_RELOC_RX_24U, R_RX_RH_24_UNS }, | |
246 | { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG }, | |
247 | { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG }, | |
248 | { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG }, | |
249 | { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG }, | |
250 | { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF }, | |
251 | { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB }, | |
252 | { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW }, | |
253 | { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL }, | |
254 | { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX }, | |
255 | { BFD_RELOC_RX_SYM, R_RX_SYM }, | |
256 | { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub }, | |
9689e3a3 | 257 | { BFD_RELOC_RX_OP_NEG, R_RX_OPneg }, |
c7927a3c NC |
258 | { BFD_RELOC_RX_ABS8, R_RX_ABS8 }, |
259 | { BFD_RELOC_RX_ABS16, R_RX_ABS16 }, | |
e8ef21bf | 260 | { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV }, |
c7927a3c | 261 | { BFD_RELOC_RX_ABS32, R_RX_ABS32 }, |
e8ef21bf | 262 | { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV }, |
c7927a3c NC |
263 | { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL }, |
264 | { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW }, | |
265 | { BFD_RELOC_RX_ABS16U, R_RX_ABS16U } | |
266 | }; | |
267 | ||
268 | #define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG) | |
269 | ||
270 | static reloc_howto_type * | |
271 | rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, | |
272 | bfd_reloc_code_real_type code) | |
273 | { | |
274 | unsigned int i; | |
275 | ||
276 | if (code == BFD_RELOC_RX_32_OP) | |
277 | return rx_elf_howto_table + R_RX_DIR32; | |
278 | ||
279 | for (i = ARRAY_SIZE (rx_reloc_map); --i;) | |
280 | if (rx_reloc_map [i].bfd_reloc_val == code) | |
281 | return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val; | |
282 | ||
283 | return NULL; | |
284 | } | |
285 | ||
286 | static reloc_howto_type * | |
287 | rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) | |
288 | { | |
289 | unsigned int i; | |
290 | ||
291 | for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++) | |
292 | if (rx_elf_howto_table[i].name != NULL | |
293 | && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0) | |
294 | return rx_elf_howto_table + i; | |
295 | ||
296 | return NULL; | |
297 | } | |
298 | ||
299 | /* Set the howto pointer for an RX ELF reloc. */ | |
300 | ||
301 | static void | |
302 | rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, | |
303 | arelent * cache_ptr, | |
304 | Elf_Internal_Rela * dst) | |
305 | { | |
306 | unsigned int r_type; | |
307 | ||
308 | r_type = ELF32_R_TYPE (dst->r_info); | |
309 | BFD_ASSERT (r_type < (unsigned int) R_RX_max); | |
310 | cache_ptr->howto = rx_elf_howto_table + r_type; | |
311 | } | |
312 | \f | |
313 | static bfd_vma | |
314 | get_symbol_value (const char * name, | |
91d6fa6a | 315 | bfd_reloc_status_type * status, |
c7927a3c NC |
316 | struct bfd_link_info * info, |
317 | bfd * input_bfd, | |
318 | asection * input_section, | |
319 | int offset) | |
320 | { | |
321 | bfd_vma value = 0; | |
322 | struct bfd_link_hash_entry * h; | |
323 | ||
324 | h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); | |
325 | ||
326 | if (h == NULL | |
327 | || (h->type != bfd_link_hash_defined | |
328 | && h->type != bfd_link_hash_defweak)) | |
91d6fa6a | 329 | * status = info->callbacks->undefined_symbol |
c7927a3c NC |
330 | (info, name, input_bfd, input_section, offset, TRUE); |
331 | else | |
332 | value = (h->u.def.value | |
333 | + h->u.def.section->output_section->vma | |
334 | + h->u.def.section->output_offset); | |
335 | ||
336 | return value; | |
337 | } | |
338 | ||
339 | static bfd_vma | |
91d6fa6a | 340 | get_gp (bfd_reloc_status_type * status, |
c7927a3c NC |
341 | struct bfd_link_info * info, |
342 | bfd * abfd, | |
343 | asection * sec, | |
344 | int offset) | |
345 | { | |
346 | static bfd_boolean cached = FALSE; | |
347 | static bfd_vma cached_value = 0; | |
348 | ||
349 | if (!cached) | |
350 | { | |
91d6fa6a | 351 | cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset); |
c7927a3c NC |
352 | cached = TRUE; |
353 | } | |
354 | return cached_value; | |
355 | } | |
356 | ||
357 | static bfd_vma | |
91d6fa6a | 358 | get_romstart (bfd_reloc_status_type * status, |
c7927a3c NC |
359 | struct bfd_link_info * info, |
360 | bfd * abfd, | |
361 | asection * sec, | |
362 | int offset) | |
363 | { | |
364 | static bfd_boolean cached = FALSE; | |
365 | static bfd_vma cached_value = 0; | |
366 | ||
367 | if (!cached) | |
368 | { | |
91d6fa6a | 369 | cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset); |
c7927a3c NC |
370 | cached = TRUE; |
371 | } | |
372 | return cached_value; | |
373 | } | |
374 | ||
375 | static bfd_vma | |
91d6fa6a | 376 | get_ramstart (bfd_reloc_status_type * status, |
c7927a3c NC |
377 | struct bfd_link_info * info, |
378 | bfd * abfd, | |
379 | asection * sec, | |
380 | int offset) | |
381 | { | |
382 | static bfd_boolean cached = FALSE; | |
383 | static bfd_vma cached_value = 0; | |
384 | ||
385 | if (!cached) | |
386 | { | |
91d6fa6a | 387 | cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset); |
c7927a3c NC |
388 | cached = TRUE; |
389 | } | |
390 | return cached_value; | |
391 | } | |
392 | ||
393 | #define NUM_STACK_ENTRIES 16 | |
394 | static int32_t rx_stack [ NUM_STACK_ENTRIES ]; | |
395 | static unsigned int rx_stack_top; | |
396 | ||
397 | #define RX_STACK_PUSH(val) \ | |
398 | do \ | |
399 | { \ | |
400 | if (rx_stack_top < NUM_STACK_ENTRIES) \ | |
401 | rx_stack [rx_stack_top ++] = (val); \ | |
402 | else \ | |
403 | r = bfd_reloc_dangerous; \ | |
404 | } \ | |
405 | while (0) | |
406 | ||
407 | #define RX_STACK_POP(dest) \ | |
408 | do \ | |
409 | { \ | |
410 | if (rx_stack_top > 0) \ | |
411 | (dest) = rx_stack [-- rx_stack_top]; \ | |
412 | else \ | |
413 | (dest) = 0, r = bfd_reloc_dangerous; \ | |
414 | } \ | |
415 | while (0) | |
416 | ||
417 | /* Relocate an RX ELF section. | |
418 | There is some attempt to make this function usable for many architectures, | |
419 | both USE_REL and USE_RELA ['twould be nice if such a critter existed], | |
420 | if only to serve as a learning tool. | |
421 | ||
422 | The RELOCATE_SECTION function is called by the new ELF backend linker | |
423 | to handle the relocations for a section. | |
424 | ||
425 | The relocs are always passed as Rela structures; if the section | |
426 | actually uses Rel structures, the r_addend field will always be | |
427 | zero. | |
428 | ||
429 | This function is responsible for adjusting the section contents as | |
430 | necessary, and (if using Rela relocs and generating a relocatable | |
431 | output file) adjusting the reloc addend as necessary. | |
432 | ||
433 | This function does not have to worry about setting the reloc | |
434 | address or the reloc symbol index. | |
435 | ||
436 | LOCAL_SYMS is a pointer to the swapped in local symbols. | |
437 | ||
438 | LOCAL_SECTIONS is an array giving the section in the input file | |
439 | corresponding to the st_shndx field of each local symbol. | |
440 | ||
441 | The global hash table entry for the global symbols can be found | |
442 | via elf_sym_hashes (input_bfd). | |
443 | ||
444 | When generating relocatable output, this function must handle | |
445 | STB_LOCAL/STT_SECTION symbols specially. The output symbol is | |
446 | going to be the section symbol corresponding to the output | |
447 | section, which means that the addend must be adjusted | |
448 | accordingly. */ | |
449 | ||
450 | static bfd_boolean | |
451 | rx_elf_relocate_section | |
452 | (bfd * output_bfd, | |
453 | struct bfd_link_info * info, | |
454 | bfd * input_bfd, | |
455 | asection * input_section, | |
456 | bfd_byte * contents, | |
457 | Elf_Internal_Rela * relocs, | |
458 | Elf_Internal_Sym * local_syms, | |
459 | asection ** local_sections) | |
460 | { | |
461 | Elf_Internal_Shdr * symtab_hdr; | |
462 | struct elf_link_hash_entry ** sym_hashes; | |
463 | Elf_Internal_Rela * rel; | |
464 | Elf_Internal_Rela * relend; | |
c7927a3c NC |
465 | |
466 | symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; | |
467 | sym_hashes = elf_sym_hashes (input_bfd); | |
468 | relend = relocs + input_section->reloc_count; | |
c7927a3c NC |
469 | for (rel = relocs; rel < relend; rel ++) |
470 | { | |
471 | reloc_howto_type * howto; | |
472 | unsigned long r_symndx; | |
473 | Elf_Internal_Sym * sym; | |
474 | asection * sec; | |
475 | struct elf_link_hash_entry * h; | |
476 | bfd_vma relocation; | |
477 | bfd_reloc_status_type r; | |
478 | const char * name = NULL; | |
479 | bfd_boolean unresolved_reloc = TRUE; | |
480 | int r_type; | |
481 | ||
482 | r_type = ELF32_R_TYPE (rel->r_info); | |
483 | r_symndx = ELF32_R_SYM (rel->r_info); | |
484 | ||
485 | howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info); | |
486 | h = NULL; | |
487 | sym = NULL; | |
488 | sec = NULL; | |
489 | relocation = 0; | |
490 | ||
491 | if (r_symndx < symtab_hdr->sh_info) | |
492 | { | |
493 | sym = local_syms + r_symndx; | |
494 | sec = local_sections [r_symndx]; | |
495 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); | |
496 | ||
497 | name = bfd_elf_string_from_elf_section | |
498 | (input_bfd, symtab_hdr->sh_link, sym->st_name); | |
499 | name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; | |
500 | } | |
501 | else | |
502 | { | |
503 | bfd_boolean warned; | |
504 | ||
505 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, | |
506 | r_symndx, symtab_hdr, sym_hashes, h, | |
507 | sec, relocation, unresolved_reloc, | |
508 | warned); | |
509 | ||
510 | name = h->root.root.string; | |
511 | } | |
512 | ||
513 | if (sec != NULL && elf_discarded_section (sec)) | |
e4067dbb DJ |
514 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
515 | rel, relend, howto, contents); | |
c7927a3c NC |
516 | |
517 | if (info->relocatable) | |
518 | { | |
519 | /* This is a relocatable link. We don't have to change | |
520 | anything, unless the reloc is against a section symbol, | |
521 | in which case we have to adjust according to where the | |
522 | section symbol winds up in the output section. */ | |
523 | if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) | |
524 | rel->r_addend += sec->output_offset; | |
525 | continue; | |
526 | } | |
527 | ||
528 | if (h != NULL && h->root.type == bfd_link_hash_undefweak) | |
529 | /* If the symbol is undefined and weak | |
530 | then the relocation resolves to zero. */ | |
531 | relocation = 0; | |
532 | else | |
533 | { | |
534 | if (howto->pc_relative) | |
535 | { | |
536 | relocation -= (input_section->output_section->vma | |
537 | + input_section->output_offset | |
538 | + rel->r_offset); | |
539 | if (r_type != R_RX_RH_3_PCREL | |
540 | && r_type != R_RX_DIR3U_PCREL) | |
541 | relocation ++; | |
542 | } | |
543 | ||
544 | relocation += rel->r_addend; | |
545 | } | |
546 | ||
547 | r = bfd_reloc_ok; | |
548 | ||
549 | #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow | |
550 | #define ALIGN(m) if (relocation & m) r = bfd_reloc_other; | |
551 | #define OP(i) (contents[rel->r_offset + (i)]) | |
552 | #define WARN_REDHAT(type) \ | |
553 | _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \ | |
554 | input_bfd, input_section, name) | |
555 | ||
556 | /* Opcode relocs are always big endian. Data relocs are bi-endian. */ | |
557 | switch (r_type) | |
558 | { | |
559 | case R_RX_NONE: | |
560 | break; | |
561 | ||
562 | case R_RX_RH_RELAX: | |
563 | break; | |
564 | ||
565 | case R_RX_RH_3_PCREL: | |
566 | WARN_REDHAT ("RX_RH_3_PCREL"); | |
567 | RANGE (3, 10); | |
568 | OP (0) &= 0xf8; | |
569 | OP (0) |= relocation & 0x07; | |
570 | break; | |
571 | ||
572 | case R_RX_RH_8_NEG: | |
573 | WARN_REDHAT ("RX_RH_8_NEG"); | |
574 | relocation = - relocation; | |
575 | case R_RX_DIR8S_PCREL: | |
576 | RANGE (-128, 127); | |
577 | OP (0) = relocation; | |
578 | break; | |
579 | ||
580 | case R_RX_DIR8S: | |
581 | RANGE (-128, 255); | |
582 | OP (0) = relocation; | |
583 | break; | |
584 | ||
585 | case R_RX_DIR8U: | |
586 | RANGE (0, 255); | |
587 | OP (0) = relocation; | |
588 | break; | |
589 | ||
590 | case R_RX_RH_16_NEG: | |
591 | WARN_REDHAT ("RX_RH_16_NEG"); | |
592 | relocation = - relocation; | |
593 | case R_RX_DIR16S_PCREL: | |
594 | RANGE (-32768, 32767); | |
595 | #if RX_OPCODE_BIG_ENDIAN | |
596 | #else | |
597 | OP (0) = relocation; | |
598 | OP (1) = relocation >> 8; | |
599 | #endif | |
600 | break; | |
601 | ||
602 | case R_RX_RH_16_OP: | |
603 | WARN_REDHAT ("RX_RH_16_OP"); | |
604 | RANGE (-32768, 32767); | |
605 | #if RX_OPCODE_BIG_ENDIAN | |
606 | OP (1) = relocation; | |
607 | OP (0) = relocation >> 8; | |
608 | #else | |
609 | OP (0) = relocation; | |
610 | OP (1) = relocation >> 8; | |
611 | #endif | |
612 | break; | |
613 | ||
614 | case R_RX_DIR16S: | |
615 | RANGE (-32768, 65535); | |
616 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) | |
617 | { | |
618 | OP (1) = relocation; | |
619 | OP (0) = relocation >> 8; | |
620 | } | |
621 | else | |
622 | { | |
623 | OP (0) = relocation; | |
624 | OP (1) = relocation >> 8; | |
625 | } | |
626 | break; | |
627 | ||
628 | case R_RX_DIR16U: | |
629 | RANGE (0, 65536); | |
630 | #if RX_OPCODE_BIG_ENDIAN | |
631 | OP (1) = relocation; | |
632 | OP (0) = relocation >> 8; | |
633 | #else | |
634 | OP (0) = relocation; | |
635 | OP (1) = relocation >> 8; | |
636 | #endif | |
637 | break; | |
638 | ||
639 | case R_RX_DIR16: | |
640 | RANGE (-32768, 65536); | |
641 | #if RX_OPCODE_BIG_ENDIAN | |
642 | OP (1) = relocation; | |
643 | OP (0) = relocation >> 8; | |
644 | #else | |
645 | OP (0) = relocation; | |
646 | OP (1) = relocation >> 8; | |
647 | #endif | |
648 | break; | |
649 | ||
650 | case R_RX_DIR16_REV: | |
651 | RANGE (-32768, 65536); | |
652 | #if RX_OPCODE_BIG_ENDIAN | |
653 | OP (0) = relocation; | |
654 | OP (1) = relocation >> 8; | |
655 | #else | |
656 | OP (1) = relocation; | |
657 | OP (0) = relocation >> 8; | |
658 | #endif | |
659 | break; | |
660 | ||
661 | case R_RX_DIR3U_PCREL: | |
662 | RANGE (3, 10); | |
663 | OP (0) &= 0xf8; | |
664 | OP (0) |= relocation & 0x07; | |
665 | break; | |
666 | ||
667 | case R_RX_RH_24_NEG: | |
668 | WARN_REDHAT ("RX_RH_24_NEG"); | |
669 | relocation = - relocation; | |
670 | case R_RX_DIR24S_PCREL: | |
671 | RANGE (-0x800000, 0x7fffff); | |
672 | #if RX_OPCODE_BIG_ENDIAN | |
673 | OP (2) = relocation; | |
674 | OP (1) = relocation >> 8; | |
675 | OP (0) = relocation >> 16; | |
676 | #else | |
677 | OP (0) = relocation; | |
678 | OP (1) = relocation >> 8; | |
679 | OP (2) = relocation >> 16; | |
680 | #endif | |
681 | break; | |
682 | ||
683 | case R_RX_RH_24_OP: | |
684 | WARN_REDHAT ("RX_RH_24_OP"); | |
685 | RANGE (-0x800000, 0x7fffff); | |
686 | #if RX_OPCODE_BIG_ENDIAN | |
687 | OP (2) = relocation; | |
688 | OP (1) = relocation >> 8; | |
689 | OP (0) = relocation >> 16; | |
690 | #else | |
691 | OP (0) = relocation; | |
692 | OP (1) = relocation >> 8; | |
693 | OP (2) = relocation >> 16; | |
694 | #endif | |
695 | break; | |
696 | ||
697 | case R_RX_DIR24S: | |
698 | RANGE (-0x800000, 0x7fffff); | |
699 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) | |
700 | { | |
701 | OP (2) = relocation; | |
702 | OP (1) = relocation >> 8; | |
703 | OP (0) = relocation >> 16; | |
704 | } | |
705 | else | |
706 | { | |
707 | OP (0) = relocation; | |
708 | OP (1) = relocation >> 8; | |
709 | OP (2) = relocation >> 16; | |
710 | } | |
711 | break; | |
712 | ||
713 | case R_RX_RH_24_UNS: | |
714 | WARN_REDHAT ("RX_RH_24_UNS"); | |
715 | RANGE (0, 0xffffff); | |
716 | #if RX_OPCODE_BIG_ENDIAN | |
717 | OP (2) = relocation; | |
718 | OP (1) = relocation >> 8; | |
719 | OP (0) = relocation >> 16; | |
720 | #else | |
721 | OP (0) = relocation; | |
722 | OP (1) = relocation >> 8; | |
723 | OP (2) = relocation >> 16; | |
724 | #endif | |
725 | break; | |
726 | ||
727 | case R_RX_RH_32_NEG: | |
728 | WARN_REDHAT ("RX_RH_32_NEG"); | |
729 | relocation = - relocation; | |
730 | #if RX_OPCODE_BIG_ENDIAN | |
731 | OP (3) = relocation; | |
732 | OP (2) = relocation >> 8; | |
733 | OP (1) = relocation >> 16; | |
734 | OP (0) = relocation >> 24; | |
735 | #else | |
736 | OP (0) = relocation; | |
737 | OP (1) = relocation >> 8; | |
738 | OP (2) = relocation >> 16; | |
739 | OP (3) = relocation >> 24; | |
740 | #endif | |
741 | break; | |
742 | ||
743 | case R_RX_RH_32_OP: | |
744 | WARN_REDHAT ("RX_RH_32_OP"); | |
745 | #if RX_OPCODE_BIG_ENDIAN | |
746 | OP (3) = relocation; | |
747 | OP (2) = relocation >> 8; | |
748 | OP (1) = relocation >> 16; | |
749 | OP (0) = relocation >> 24; | |
750 | #else | |
751 | OP (0) = relocation; | |
752 | OP (1) = relocation >> 8; | |
753 | OP (2) = relocation >> 16; | |
754 | OP (3) = relocation >> 24; | |
755 | #endif | |
756 | break; | |
757 | ||
758 | case R_RX_DIR32: | |
759 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) | |
760 | { | |
761 | OP (3) = relocation; | |
762 | OP (2) = relocation >> 8; | |
763 | OP (1) = relocation >> 16; | |
764 | OP (0) = relocation >> 24; | |
765 | } | |
766 | else | |
767 | { | |
768 | OP (0) = relocation; | |
769 | OP (1) = relocation >> 8; | |
770 | OP (2) = relocation >> 16; | |
771 | OP (3) = relocation >> 24; | |
772 | } | |
773 | break; | |
774 | ||
775 | case R_RX_DIR32_REV: | |
776 | if (BIGE (output_bfd)) | |
777 | { | |
778 | OP (0) = relocation; | |
779 | OP (1) = relocation >> 8; | |
780 | OP (2) = relocation >> 16; | |
781 | OP (3) = relocation >> 24; | |
782 | } | |
783 | else | |
784 | { | |
785 | OP (3) = relocation; | |
786 | OP (2) = relocation >> 8; | |
787 | OP (1) = relocation >> 16; | |
788 | OP (0) = relocation >> 24; | |
789 | } | |
790 | break; | |
791 | ||
792 | case R_RX_RH_DIFF: | |
793 | { | |
794 | bfd_vma val; | |
795 | WARN_REDHAT ("RX_RH_DIFF"); | |
796 | val = bfd_get_32 (output_bfd, & OP (0)); | |
797 | val -= relocation; | |
798 | bfd_put_32 (output_bfd, val, & OP (0)); | |
799 | } | |
800 | break; | |
801 | ||
802 | case R_RX_RH_GPRELB: | |
803 | WARN_REDHAT ("RX_RH_GPRELB"); | |
804 | relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset); | |
805 | RANGE (0, 65535); | |
806 | #if RX_OPCODE_BIG_ENDIAN | |
807 | OP (1) = relocation; | |
808 | OP (0) = relocation >> 8; | |
809 | #else | |
810 | OP (0) = relocation; | |
811 | OP (1) = relocation >> 8; | |
812 | #endif | |
813 | break; | |
814 | ||
815 | case R_RX_RH_GPRELW: | |
816 | WARN_REDHAT ("RX_RH_GPRELW"); | |
817 | relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset); | |
818 | ALIGN (1); | |
819 | relocation >>= 1; | |
820 | RANGE (0, 65535); | |
821 | #if RX_OPCODE_BIG_ENDIAN | |
822 | OP (1) = relocation; | |
823 | OP (0) = relocation >> 8; | |
824 | #else | |
825 | OP (0) = relocation; | |
826 | OP (1) = relocation >> 8; | |
827 | #endif | |
828 | break; | |
829 | ||
830 | case R_RX_RH_GPRELL: | |
831 | WARN_REDHAT ("RX_RH_GPRELL"); | |
832 | relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset); | |
833 | ALIGN (3); | |
834 | relocation >>= 2; | |
835 | RANGE (0, 65535); | |
836 | #if RX_OPCODE_BIG_ENDIAN | |
837 | OP (1) = relocation; | |
838 | OP (0) = relocation >> 8; | |
839 | #else | |
840 | OP (0) = relocation; | |
841 | OP (1) = relocation >> 8; | |
842 | #endif | |
843 | break; | |
844 | ||
845 | /* Internal relocations just for relaxation: */ | |
846 | case R_RX_RH_ABS5p5B: | |
847 | RX_STACK_POP (relocation); | |
848 | RANGE (0, 31); | |
849 | OP (0) &= 0xf8; | |
850 | OP (0) |= relocation >> 2; | |
851 | OP (1) &= 0x77; | |
852 | OP (1) |= (relocation << 6) & 0x80; | |
853 | OP (1) |= (relocation << 3) & 0x08; | |
854 | break; | |
855 | ||
856 | case R_RX_RH_ABS5p5W: | |
857 | RX_STACK_POP (relocation); | |
858 | RANGE (0, 62); | |
859 | ALIGN (1); | |
860 | relocation >>= 1; | |
861 | OP (0) &= 0xf8; | |
862 | OP (0) |= relocation >> 2; | |
863 | OP (1) &= 0x77; | |
864 | OP (1) |= (relocation << 6) & 0x80; | |
865 | OP (1) |= (relocation << 3) & 0x08; | |
866 | break; | |
867 | ||
868 | case R_RX_RH_ABS5p5L: | |
869 | RX_STACK_POP (relocation); | |
870 | RANGE (0, 124); | |
871 | ALIGN (3); | |
872 | relocation >>= 2; | |
873 | OP (0) &= 0xf8; | |
874 | OP (0) |= relocation >> 2; | |
875 | OP (1) &= 0x77; | |
876 | OP (1) |= (relocation << 6) & 0x80; | |
877 | OP (1) |= (relocation << 3) & 0x08; | |
878 | break; | |
879 | ||
880 | case R_RX_RH_ABS5p8B: | |
881 | RX_STACK_POP (relocation); | |
882 | RANGE (0, 31); | |
883 | OP (0) &= 0x70; | |
884 | OP (0) |= (relocation << 3) & 0x80; | |
885 | OP (0) |= relocation & 0x0f; | |
886 | break; | |
887 | ||
888 | case R_RX_RH_ABS5p8W: | |
889 | RX_STACK_POP (relocation); | |
890 | RANGE (0, 62); | |
891 | ALIGN (1); | |
892 | relocation >>= 1; | |
893 | OP (0) &= 0x70; | |
894 | OP (0) |= (relocation << 3) & 0x80; | |
895 | OP (0) |= relocation & 0x0f; | |
896 | break; | |
897 | ||
898 | case R_RX_RH_ABS5p8L: | |
899 | RX_STACK_POP (relocation); | |
900 | RANGE (0, 124); | |
901 | ALIGN (3); | |
902 | relocation >>= 2; | |
903 | OP (0) &= 0x70; | |
904 | OP (0) |= (relocation << 3) & 0x80; | |
905 | OP (0) |= relocation & 0x0f; | |
906 | break; | |
907 | ||
908 | case R_RX_RH_UIMM4p8: | |
909 | RANGE (0, 15); | |
910 | OP (0) &= 0x0f; | |
911 | OP (0) |= relocation << 4; | |
912 | break; | |
913 | ||
914 | case R_RX_RH_UNEG4p8: | |
915 | RANGE (-15, 0); | |
916 | OP (0) &= 0x0f; | |
917 | OP (0) |= (-relocation) << 4; | |
918 | break; | |
919 | ||
920 | /* Complex reloc handling: */ | |
921 | ||
922 | case R_RX_ABS32: | |
923 | RX_STACK_POP (relocation); | |
924 | #if RX_OPCODE_BIG_ENDIAN | |
925 | OP (3) = relocation; | |
926 | OP (2) = relocation >> 8; | |
927 | OP (1) = relocation >> 16; | |
928 | OP (0) = relocation >> 24; | |
929 | #else | |
930 | OP (0) = relocation; | |
931 | OP (1) = relocation >> 8; | |
932 | OP (2) = relocation >> 16; | |
933 | OP (3) = relocation >> 24; | |
934 | #endif | |
935 | break; | |
936 | ||
937 | case R_RX_ABS32_REV: | |
938 | RX_STACK_POP (relocation); | |
939 | #if RX_OPCODE_BIG_ENDIAN | |
940 | OP (0) = relocation; | |
941 | OP (1) = relocation >> 8; | |
942 | OP (2) = relocation >> 16; | |
943 | OP (3) = relocation >> 24; | |
944 | #else | |
945 | OP (3) = relocation; | |
946 | OP (2) = relocation >> 8; | |
947 | OP (1) = relocation >> 16; | |
948 | OP (0) = relocation >> 24; | |
949 | #endif | |
950 | break; | |
951 | ||
952 | case R_RX_ABS24S_PCREL: | |
953 | case R_RX_ABS24S: | |
954 | RX_STACK_POP (relocation); | |
955 | RANGE (-0x800000, 0x7fffff); | |
956 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) | |
957 | { | |
958 | OP (2) = relocation; | |
959 | OP (1) = relocation >> 8; | |
960 | OP (0) = relocation >> 16; | |
961 | } | |
962 | else | |
963 | { | |
964 | OP (0) = relocation; | |
965 | OP (1) = relocation >> 8; | |
966 | OP (2) = relocation >> 16; | |
967 | } | |
968 | break; | |
969 | ||
970 | case R_RX_ABS16: | |
971 | RX_STACK_POP (relocation); | |
972 | RANGE (-32768, 65535); | |
973 | #if RX_OPCODE_BIG_ENDIAN | |
974 | OP (1) = relocation; | |
975 | OP (0) = relocation >> 8; | |
976 | #else | |
977 | OP (0) = relocation; | |
978 | OP (1) = relocation >> 8; | |
979 | #endif | |
980 | break; | |
981 | ||
982 | case R_RX_ABS16_REV: | |
983 | RX_STACK_POP (relocation); | |
984 | RANGE (-32768, 65535); | |
985 | #if RX_OPCODE_BIG_ENDIAN | |
986 | OP (0) = relocation; | |
987 | OP (1) = relocation >> 8; | |
988 | #else | |
989 | OP (1) = relocation; | |
990 | OP (0) = relocation >> 8; | |
991 | #endif | |
992 | break; | |
993 | ||
994 | case R_RX_ABS16S_PCREL: | |
995 | case R_RX_ABS16S: | |
996 | RX_STACK_POP (relocation); | |
997 | RANGE (-32768, 32767); | |
998 | if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE)) | |
999 | { | |
1000 | OP (1) = relocation; | |
1001 | OP (0) = relocation >> 8; | |
1002 | } | |
1003 | else | |
1004 | { | |
1005 | OP (0) = relocation; | |
1006 | OP (1) = relocation >> 8; | |
1007 | } | |
1008 | break; | |
1009 | ||
1010 | case R_RX_ABS16U: | |
1011 | RX_STACK_POP (relocation); | |
1012 | RANGE (0, 65536); | |
1013 | #if RX_OPCODE_BIG_ENDIAN | |
1014 | OP (1) = relocation; | |
1015 | OP (0) = relocation >> 8; | |
1016 | #else | |
1017 | OP (0) = relocation; | |
1018 | OP (1) = relocation >> 8; | |
1019 | #endif | |
1020 | break; | |
1021 | ||
1022 | case R_RX_ABS16UL: | |
1023 | RX_STACK_POP (relocation); | |
1024 | relocation >>= 2; | |
1025 | RANGE (0, 65536); | |
1026 | #if RX_OPCODE_BIG_ENDIAN | |
1027 | OP (1) = relocation; | |
1028 | OP (0) = relocation >> 8; | |
1029 | #else | |
1030 | OP (0) = relocation; | |
1031 | OP (1) = relocation >> 8; | |
1032 | #endif | |
1033 | break; | |
1034 | ||
1035 | case R_RX_ABS16UW: | |
1036 | RX_STACK_POP (relocation); | |
1037 | relocation >>= 1; | |
1038 | RANGE (0, 65536); | |
1039 | #if RX_OPCODE_BIG_ENDIAN | |
1040 | OP (1) = relocation; | |
1041 | OP (0) = relocation >> 8; | |
1042 | #else | |
1043 | OP (0) = relocation; | |
1044 | OP (1) = relocation >> 8; | |
1045 | #endif | |
1046 | break; | |
1047 | ||
1048 | case R_RX_ABS8: | |
1049 | RX_STACK_POP (relocation); | |
1050 | RANGE (-128, 255); | |
1051 | OP (0) = relocation; | |
1052 | break; | |
1053 | ||
1054 | case R_RX_ABS8U: | |
1055 | RX_STACK_POP (relocation); | |
1056 | RANGE (0, 255); | |
1057 | OP (0) = relocation; | |
1058 | break; | |
1059 | ||
1060 | case R_RX_ABS8UL: | |
1061 | RX_STACK_POP (relocation); | |
1062 | relocation >>= 2; | |
1063 | RANGE (0, 255); | |
1064 | OP (0) = relocation; | |
1065 | break; | |
1066 | ||
1067 | case R_RX_ABS8UW: | |
1068 | RX_STACK_POP (relocation); | |
1069 | relocation >>= 1; | |
1070 | RANGE (0, 255); | |
1071 | OP (0) = relocation; | |
1072 | break; | |
1073 | ||
1074 | case R_RX_ABS8S_PCREL: | |
1075 | case R_RX_ABS8S: | |
1076 | RX_STACK_POP (relocation); | |
1077 | RANGE (-128, 127); | |
1078 | OP (0) = relocation; | |
1079 | break; | |
1080 | ||
1081 | case R_RX_SYM: | |
1082 | if (r_symndx < symtab_hdr->sh_info) | |
1083 | RX_STACK_PUSH (sec->output_section->vma | |
1084 | + sec->output_offset | |
1085 | + sym->st_value); | |
1086 | else | |
1087 | { | |
1088 | if (h != NULL | |
1089 | && (h->root.type == bfd_link_hash_defined | |
1090 | || h->root.type == bfd_link_hash_defweak)) | |
1091 | RX_STACK_PUSH (h->root.u.def.value | |
1092 | + sec->output_section->vma | |
1093 | + sec->output_offset); | |
1094 | else | |
1095 | _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol")); | |
1096 | } | |
1097 | break; | |
1098 | ||
1099 | case R_RX_OPneg: | |
1100 | { | |
1101 | int32_t tmp; | |
1102 | ||
1103 | RX_STACK_POP (tmp); | |
1104 | tmp = - tmp; | |
1105 | RX_STACK_PUSH (tmp); | |
1106 | } | |
1107 | break; | |
1108 | ||
1109 | case R_RX_OPadd: | |
1110 | { | |
1111 | int32_t tmp1, tmp2; | |
1112 | ||
1113 | RX_STACK_POP (tmp1); | |
1114 | RX_STACK_POP (tmp2); | |
1115 | tmp1 += tmp2; | |
1116 | RX_STACK_PUSH (tmp1); | |
1117 | } | |
1118 | break; | |
1119 | ||
1120 | case R_RX_OPsub: | |
1121 | { | |
1122 | int32_t tmp1, tmp2; | |
1123 | ||
1124 | RX_STACK_POP (tmp1); | |
1125 | RX_STACK_POP (tmp2); | |
1126 | tmp2 -= tmp1; | |
1127 | RX_STACK_PUSH (tmp2); | |
1128 | } | |
1129 | break; | |
1130 | ||
1131 | case R_RX_OPmul: | |
1132 | { | |
1133 | int32_t tmp1, tmp2; | |
1134 | ||
1135 | RX_STACK_POP (tmp1); | |
1136 | RX_STACK_POP (tmp2); | |
1137 | tmp1 *= tmp2; | |
1138 | RX_STACK_PUSH (tmp1); | |
1139 | } | |
1140 | break; | |
1141 | ||
1142 | case R_RX_OPdiv: | |
1143 | { | |
1144 | int32_t tmp1, tmp2; | |
1145 | ||
1146 | RX_STACK_POP (tmp1); | |
1147 | RX_STACK_POP (tmp2); | |
1148 | tmp1 /= tmp2; | |
1149 | RX_STACK_PUSH (tmp1); | |
1150 | } | |
1151 | break; | |
1152 | ||
1153 | case R_RX_OPshla: | |
1154 | { | |
1155 | int32_t tmp1, tmp2; | |
1156 | ||
1157 | RX_STACK_POP (tmp1); | |
1158 | RX_STACK_POP (tmp2); | |
1159 | tmp1 <<= tmp2; | |
1160 | RX_STACK_PUSH (tmp1); | |
1161 | } | |
1162 | break; | |
1163 | ||
1164 | case R_RX_OPshra: | |
1165 | { | |
1166 | int32_t tmp1, tmp2; | |
1167 | ||
1168 | RX_STACK_POP (tmp1); | |
1169 | RX_STACK_POP (tmp2); | |
1170 | tmp1 >>= tmp2; | |
1171 | RX_STACK_PUSH (tmp1); | |
1172 | } | |
1173 | break; | |
1174 | ||
1175 | case R_RX_OPsctsize: | |
1176 | RX_STACK_PUSH (input_section->size); | |
1177 | break; | |
1178 | ||
1179 | case R_RX_OPscttop: | |
1180 | RX_STACK_PUSH (input_section->output_section->vma); | |
1181 | break; | |
1182 | ||
1183 | case R_RX_OPand: | |
1184 | { | |
1185 | int32_t tmp1, tmp2; | |
1186 | ||
1187 | RX_STACK_POP (tmp1); | |
1188 | RX_STACK_POP (tmp2); | |
1189 | tmp1 &= tmp2; | |
1190 | RX_STACK_PUSH (tmp1); | |
1191 | } | |
1192 | break; | |
1193 | ||
1194 | case R_RX_OPor: | |
1195 | { | |
1196 | int32_t tmp1, tmp2; | |
1197 | ||
1198 | RX_STACK_POP (tmp1); | |
1199 | RX_STACK_POP (tmp2); | |
1200 | tmp1 |= tmp2; | |
1201 | RX_STACK_PUSH (tmp1); | |
1202 | } | |
1203 | break; | |
1204 | ||
1205 | case R_RX_OPxor: | |
1206 | { | |
1207 | int32_t tmp1, tmp2; | |
1208 | ||
1209 | RX_STACK_POP (tmp1); | |
1210 | RX_STACK_POP (tmp2); | |
1211 | tmp1 ^= tmp2; | |
1212 | RX_STACK_PUSH (tmp1); | |
1213 | } | |
1214 | break; | |
1215 | ||
1216 | case R_RX_OPnot: | |
1217 | { | |
1218 | int32_t tmp; | |
1219 | ||
1220 | RX_STACK_POP (tmp); | |
1221 | tmp = ~ tmp; | |
1222 | RX_STACK_PUSH (tmp); | |
1223 | } | |
1224 | break; | |
1225 | ||
1226 | case R_RX_OPmod: | |
1227 | { | |
1228 | int32_t tmp1, tmp2; | |
1229 | ||
1230 | RX_STACK_POP (tmp1); | |
1231 | RX_STACK_POP (tmp2); | |
1232 | tmp1 %= tmp2; | |
1233 | RX_STACK_PUSH (tmp1); | |
1234 | } | |
1235 | break; | |
1236 | ||
1237 | case R_RX_OPromtop: | |
1238 | RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); | |
1239 | break; | |
1240 | ||
1241 | case R_RX_OPramtop: | |
1242 | RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); | |
1243 | break; | |
1244 | ||
1245 | default: | |
1246 | r = bfd_reloc_notsupported; | |
1247 | break; | |
1248 | } | |
1249 | ||
1250 | if (r != bfd_reloc_ok) | |
1251 | { | |
1252 | const char * msg = NULL; | |
1253 | ||
1254 | switch (r) | |
1255 | { | |
1256 | case bfd_reloc_overflow: | |
1257 | /* Catch the case of a missing function declaration | |
1258 | and emit a more helpful error message. */ | |
1259 | if (r_type == R_RX_DIR24S_PCREL) | |
1260 | msg = _("%B(%A): error: call to undefined function '%s'"); | |
1261 | else | |
1262 | r = info->callbacks->reloc_overflow | |
1263 | (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, | |
1264 | input_bfd, input_section, rel->r_offset); | |
1265 | break; | |
1266 | ||
1267 | case bfd_reloc_undefined: | |
1268 | r = info->callbacks->undefined_symbol | |
1269 | (info, name, input_bfd, input_section, rel->r_offset, | |
1270 | TRUE); | |
1271 | break; | |
1272 | ||
1273 | case bfd_reloc_other: | |
1274 | msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area"); | |
1275 | break; | |
1276 | ||
1277 | case bfd_reloc_outofrange: | |
1278 | msg = _("%B(%A): internal error: out of range error"); | |
1279 | break; | |
1280 | ||
1281 | case bfd_reloc_notsupported: | |
1282 | msg = _("%B(%A): internal error: unsupported relocation error"); | |
1283 | break; | |
1284 | ||
1285 | case bfd_reloc_dangerous: | |
1286 | msg = _("%B(%A): internal error: dangerous relocation"); | |
1287 | break; | |
1288 | ||
1289 | default: | |
1290 | msg = _("%B(%A): internal error: unknown error"); | |
1291 | break; | |
1292 | } | |
1293 | ||
1294 | if (msg) | |
1295 | _bfd_error_handler (msg, input_bfd, input_section, name); | |
1296 | ||
1297 | if (! r) | |
1298 | return FALSE; | |
1299 | } | |
1300 | } | |
1301 | ||
1302 | return TRUE; | |
1303 | } | |
1304 | \f | |
1305 | /* Relaxation Support. */ | |
1306 | ||
1307 | /* Progression of relocations from largest operand size to smallest | |
1308 | operand size. */ | |
1309 | ||
1310 | static int | |
1311 | next_smaller_reloc (int r) | |
1312 | { | |
1313 | switch (r) | |
1314 | { | |
1315 | case R_RX_DIR32: return R_RX_DIR24S; | |
1316 | case R_RX_DIR24S: return R_RX_DIR16S; | |
1317 | case R_RX_DIR16S: return R_RX_DIR8S; | |
1318 | case R_RX_DIR8S: return R_RX_NONE; | |
1319 | ||
1320 | case R_RX_DIR16: return R_RX_DIR8; | |
1321 | case R_RX_DIR8: return R_RX_NONE; | |
1322 | ||
1323 | case R_RX_DIR16U: return R_RX_DIR8U; | |
1324 | case R_RX_DIR8U: return R_RX_NONE; | |
1325 | ||
1326 | case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL; | |
1327 | case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL; | |
1328 | case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL; | |
1329 | ||
1330 | case R_RX_DIR16UL: return R_RX_DIR8UL; | |
1331 | case R_RX_DIR8UL: return R_RX_NONE; | |
1332 | case R_RX_DIR16UW: return R_RX_DIR8UW; | |
1333 | case R_RX_DIR8UW: return R_RX_NONE; | |
1334 | ||
1335 | case R_RX_RH_32_OP: return R_RX_RH_24_OP; | |
1336 | case R_RX_RH_24_OP: return R_RX_RH_16_OP; | |
1337 | case R_RX_RH_16_OP: return R_RX_DIR8; | |
1338 | ||
1339 | case R_RX_ABS32: return R_RX_ABS24S; | |
1340 | case R_RX_ABS24S: return R_RX_ABS16S; | |
1341 | case R_RX_ABS16: return R_RX_ABS8; | |
1342 | case R_RX_ABS16U: return R_RX_ABS8U; | |
1343 | case R_RX_ABS16S: return R_RX_ABS8S; | |
1344 | case R_RX_ABS8: return R_RX_NONE; | |
1345 | case R_RX_ABS8U: return R_RX_NONE; | |
1346 | case R_RX_ABS8S: return R_RX_NONE; | |
1347 | case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL; | |
1348 | case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL; | |
1349 | case R_RX_ABS8S_PCREL: return R_RX_NONE; | |
1350 | case R_RX_ABS16UL: return R_RX_ABS8UL; | |
1351 | case R_RX_ABS16UW: return R_RX_ABS8UW; | |
1352 | case R_RX_ABS8UL: return R_RX_NONE; | |
1353 | case R_RX_ABS8UW: return R_RX_NONE; | |
1354 | } | |
1355 | return r; | |
1356 | }; | |
1357 | ||
1358 | /* Delete some bytes from a section while relaxing. */ | |
1359 | ||
1360 | static bfd_boolean | |
1361 | elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, | |
1362 | Elf_Internal_Rela *alignment_rel, int force_snip) | |
1363 | { | |
1364 | Elf_Internal_Shdr * symtab_hdr; | |
1365 | unsigned int sec_shndx; | |
1366 | bfd_byte * contents; | |
1367 | Elf_Internal_Rela * irel; | |
1368 | Elf_Internal_Rela * irelend; | |
c7927a3c NC |
1369 | Elf_Internal_Sym * isym; |
1370 | Elf_Internal_Sym * isymend; | |
1371 | bfd_vma toaddr; | |
1372 | unsigned int symcount; | |
1373 | struct elf_link_hash_entry ** sym_hashes; | |
1374 | struct elf_link_hash_entry ** end_hashes; | |
1375 | ||
1376 | if (!alignment_rel) | |
1377 | force_snip = 1; | |
1378 | ||
1379 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
1380 | ||
1381 | contents = elf_section_data (sec)->this_hdr.contents; | |
1382 | ||
1383 | /* The deletion must stop at the next alignment boundary, if | |
1384 | ALIGNMENT_REL is non-NULL. */ | |
c7927a3c NC |
1385 | toaddr = sec->size; |
1386 | if (alignment_rel) | |
1387 | toaddr = alignment_rel->r_offset; | |
1388 | ||
1389 | irel = elf_section_data (sec)->relocs; | |
1390 | irelend = irel + sec->reloc_count; | |
1391 | ||
1392 | /* Actually delete the bytes. */ | |
1393 | memmove (contents + addr, contents + addr + count, | |
1394 | (size_t) (toaddr - addr - count)); | |
1395 | ||
1396 | /* If we don't have an alignment marker to worry about, we can just | |
1397 | shrink the section. Otherwise, we have to fill in the newly | |
1398 | created gap with NOP insns (0x03). */ | |
1399 | if (force_snip) | |
1400 | sec->size -= count; | |
1401 | else | |
1402 | memset (contents + toaddr - count, 0x03, count); | |
1403 | ||
1404 | /* Adjust all the relocs. */ | |
1405 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1406 | { | |
1407 | /* Get the new reloc address. */ | |
1408 | if (irel->r_offset > addr | |
1409 | && (irel->r_offset < toaddr | |
1410 | || (force_snip && irel->r_offset == toaddr))) | |
1411 | irel->r_offset -= count; | |
1412 | ||
1413 | /* If we see an ALIGN marker at the end of the gap, we move it | |
1414 | to the beginning of the gap, since marking these gaps is what | |
1415 | they're for. */ | |
1416 | if (irel->r_offset == toaddr | |
1417 | && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX | |
1418 | && irel->r_addend & RX_RELAXA_ALIGN) | |
1419 | irel->r_offset -= count; | |
1420 | } | |
1421 | ||
1422 | /* Adjust the local symbols defined in this section. */ | |
1423 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1424 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1425 | isymend = isym + symtab_hdr->sh_info; | |
1426 | ||
1427 | for (; isym < isymend; isym++) | |
1428 | { | |
1429 | /* If the symbol is in the range of memory we just moved, we | |
1430 | have to adjust its value. */ | |
1431 | if (isym->st_shndx == sec_shndx | |
1432 | && isym->st_value > addr | |
1433 | && isym->st_value < toaddr) | |
1434 | isym->st_value -= count; | |
1435 | ||
1436 | /* If the symbol *spans* the bytes we just deleted (i.e. it's | |
1437 | *end* is in the moved bytes but it's *start* isn't), then we | |
1438 | must adjust its size. */ | |
1439 | if (isym->st_shndx == sec_shndx | |
1440 | && isym->st_value < addr | |
1441 | && isym->st_value + isym->st_size > addr | |
1442 | && isym->st_value + isym->st_size < toaddr) | |
1443 | isym->st_size -= count; | |
1444 | } | |
1445 | ||
1446 | /* Now adjust the global symbols defined in this section. */ | |
1447 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
1448 | - symtab_hdr->sh_info); | |
1449 | sym_hashes = elf_sym_hashes (abfd); | |
1450 | end_hashes = sym_hashes + symcount; | |
1451 | ||
1452 | for (; sym_hashes < end_hashes; sym_hashes++) | |
1453 | { | |
1454 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
1455 | ||
1456 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1457 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1458 | && sym_hash->root.u.def.section == sec) | |
1459 | { | |
1460 | /* As above, adjust the value if needed. */ | |
1461 | if (sym_hash->root.u.def.value > addr | |
1462 | && sym_hash->root.u.def.value < toaddr) | |
1463 | sym_hash->root.u.def.value -= count; | |
1464 | ||
1465 | /* As above, adjust the size if needed. */ | |
1466 | if (sym_hash->root.u.def.value < addr | |
1467 | && sym_hash->root.u.def.value + sym_hash->size > addr | |
1468 | && sym_hash->root.u.def.value + sym_hash->size < toaddr) | |
1469 | sym_hash->size -= count; | |
1470 | } | |
1471 | } | |
1472 | ||
1473 | return TRUE; | |
1474 | } | |
1475 | ||
1476 | /* Used to sort relocs by address. If relocs have the same address, | |
1477 | we maintain their relative order, except that R_RX_RH_RELAX | |
1478 | alignment relocs must be the first reloc for any given address. */ | |
1479 | ||
1480 | static void | |
1481 | reloc_bubblesort (Elf_Internal_Rela * r, int count) | |
1482 | { | |
1483 | int i; | |
1484 | bfd_boolean again; | |
1485 | bfd_boolean swappit; | |
1486 | ||
1487 | /* This is almost a classic bubblesort. It's the slowest sort, but | |
1488 | we're taking advantage of the fact that the relocations are | |
1489 | mostly in order already (the assembler emits them that way) and | |
1490 | we need relocs with the same address to remain in the same | |
1491 | relative order. */ | |
1492 | again = TRUE; | |
1493 | while (again) | |
1494 | { | |
1495 | again = FALSE; | |
1496 | for (i = 0; i < count - 1; i ++) | |
1497 | { | |
1498 | if (r[i].r_offset > r[i + 1].r_offset) | |
1499 | swappit = TRUE; | |
1500 | else if (r[i].r_offset < r[i + 1].r_offset) | |
1501 | swappit = FALSE; | |
1502 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX | |
1503 | && (r[i + 1].r_addend & RX_RELAXA_ALIGN)) | |
1504 | swappit = TRUE; | |
1505 | else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX | |
1506 | && (r[i + 1].r_addend & RX_RELAXA_ELIGN) | |
1507 | && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX | |
1508 | && (r[i].r_addend & RX_RELAXA_ALIGN))) | |
1509 | swappit = TRUE; | |
1510 | else | |
1511 | swappit = FALSE; | |
1512 | ||
1513 | if (swappit) | |
1514 | { | |
1515 | Elf_Internal_Rela tmp; | |
1516 | ||
1517 | tmp = r[i]; | |
1518 | r[i] = r[i + 1]; | |
1519 | r[i + 1] = tmp; | |
1520 | /* If we do move a reloc back, re-scan to see if it | |
1521 | needs to be moved even further back. This avoids | |
1522 | most of the O(n^2) behavior for our cases. */ | |
1523 | if (i > 0) | |
1524 | i -= 2; | |
1525 | again = TRUE; | |
1526 | } | |
1527 | } | |
1528 | } | |
1529 | } | |
1530 | ||
1531 | ||
1532 | #define OFFSET_FOR_RELOC(rel, lrel, scale) \ | |
1533 | rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ | |
1534 | lrel, abfd, sec, link_info, scale) | |
1535 | ||
1536 | static bfd_vma | |
1537 | rx_offset_for_reloc (bfd * abfd, | |
1538 | Elf_Internal_Rela * rel, | |
1539 | Elf_Internal_Shdr * symtab_hdr, | |
c7e2358a | 1540 | Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, |
c7927a3c NC |
1541 | Elf_Internal_Sym * intsyms, |
1542 | Elf_Internal_Rela ** lrel, | |
1543 | bfd * input_bfd, | |
1544 | asection * input_section, | |
1545 | struct bfd_link_info * info, | |
1546 | int * scale) | |
1547 | { | |
1548 | bfd_vma symval; | |
1549 | bfd_reloc_status_type r; | |
1550 | ||
1551 | *scale = 1; | |
1552 | ||
1553 | /* REL is the first of 1..N relocations. We compute the symbol | |
1554 | value for each relocation, then combine them if needed. LREL | |
1555 | gets a pointer to the last relocation used. */ | |
1556 | while (1) | |
1557 | { | |
1558 | int32_t tmp1, tmp2; | |
1559 | ||
1560 | /* Get the value of the symbol referred to by the reloc. */ | |
1561 | if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) | |
1562 | { | |
1563 | /* A local symbol. */ | |
1564 | Elf_Internal_Sym *isym; | |
c7927a3c NC |
1565 | asection *ssec; |
1566 | ||
1567 | isym = intsyms + ELF32_R_SYM (rel->r_info); | |
1568 | ||
1569 | if (isym->st_shndx == SHN_UNDEF) | |
1570 | ssec = bfd_und_section_ptr; | |
1571 | else if (isym->st_shndx == SHN_ABS) | |
1572 | ssec = bfd_abs_section_ptr; | |
1573 | else if (isym->st_shndx == SHN_COMMON) | |
1574 | ssec = bfd_com_section_ptr; | |
1575 | else | |
1576 | ssec = bfd_section_from_elf_index (abfd, | |
1577 | isym->st_shndx); | |
1578 | ||
c7927a3c NC |
1579 | /* Initial symbol value. */ |
1580 | symval = isym->st_value; | |
1581 | ||
1582 | /* GAS may have made this symbol relative to a section, in | |
1583 | which case, we have to add the addend to find the | |
1584 | symbol. */ | |
1585 | if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) | |
1586 | symval += rel->r_addend; | |
1587 | ||
1588 | if (ssec) | |
1589 | { | |
1590 | if ((ssec->flags & SEC_MERGE) | |
1591 | && ssec->sec_info_type == ELF_INFO_TYPE_MERGE) | |
1592 | symval = _bfd_merged_section_offset (abfd, & ssec, | |
1593 | elf_section_data (ssec)->sec_info, | |
1594 | symval); | |
1595 | } | |
1596 | ||
1597 | /* Now make the offset relative to where the linker is putting it. */ | |
1598 | if (ssec) | |
1599 | symval += | |
1600 | ssec->output_section->vma + ssec->output_offset; | |
1601 | ||
1602 | symval += rel->r_addend; | |
1603 | } | |
1604 | else | |
1605 | { | |
1606 | unsigned long indx; | |
1607 | struct elf_link_hash_entry * h; | |
1608 | ||
1609 | /* An external symbol. */ | |
1610 | indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; | |
1611 | h = elf_sym_hashes (abfd)[indx]; | |
1612 | BFD_ASSERT (h != NULL); | |
1613 | ||
1614 | if (h->root.type != bfd_link_hash_defined | |
1615 | && h->root.type != bfd_link_hash_defweak) | |
1616 | { | |
1617 | /* This appears to be a reference to an undefined | |
1618 | symbol. Just ignore it--it will be caught by the | |
1619 | regular reloc processing. */ | |
1620 | if (lrel) | |
1621 | *lrel = rel; | |
1622 | return 0; | |
1623 | } | |
1624 | ||
1625 | symval = (h->root.u.def.value | |
1626 | + h->root.u.def.section->output_section->vma | |
1627 | + h->root.u.def.section->output_offset); | |
1628 | ||
1629 | symval += rel->r_addend; | |
1630 | } | |
1631 | ||
1632 | switch (ELF32_R_TYPE (rel->r_info)) | |
1633 | { | |
1634 | case R_RX_SYM: | |
1635 | RX_STACK_PUSH (symval); | |
1636 | break; | |
1637 | ||
1638 | case R_RX_OPneg: | |
1639 | RX_STACK_POP (tmp1); | |
1640 | tmp1 = - tmp1; | |
1641 | RX_STACK_PUSH (tmp1); | |
1642 | break; | |
1643 | ||
1644 | case R_RX_OPadd: | |
1645 | RX_STACK_POP (tmp1); | |
1646 | RX_STACK_POP (tmp2); | |
1647 | tmp1 += tmp2; | |
1648 | RX_STACK_PUSH (tmp1); | |
1649 | break; | |
1650 | ||
1651 | case R_RX_OPsub: | |
1652 | RX_STACK_POP (tmp1); | |
1653 | RX_STACK_POP (tmp2); | |
1654 | tmp2 -= tmp1; | |
1655 | RX_STACK_PUSH (tmp2); | |
1656 | break; | |
1657 | ||
1658 | case R_RX_OPmul: | |
1659 | RX_STACK_POP (tmp1); | |
1660 | RX_STACK_POP (tmp2); | |
1661 | tmp1 *= tmp2; | |
1662 | RX_STACK_PUSH (tmp1); | |
1663 | break; | |
1664 | ||
1665 | case R_RX_OPdiv: | |
1666 | RX_STACK_POP (tmp1); | |
1667 | RX_STACK_POP (tmp2); | |
1668 | tmp1 /= tmp2; | |
1669 | RX_STACK_PUSH (tmp1); | |
1670 | break; | |
1671 | ||
1672 | case R_RX_OPshla: | |
1673 | RX_STACK_POP (tmp1); | |
1674 | RX_STACK_POP (tmp2); | |
1675 | tmp1 <<= tmp2; | |
1676 | RX_STACK_PUSH (tmp1); | |
1677 | break; | |
1678 | ||
1679 | case R_RX_OPshra: | |
1680 | RX_STACK_POP (tmp1); | |
1681 | RX_STACK_POP (tmp2); | |
1682 | tmp1 >>= tmp2; | |
1683 | RX_STACK_PUSH (tmp1); | |
1684 | break; | |
1685 | ||
1686 | case R_RX_OPsctsize: | |
1687 | RX_STACK_PUSH (input_section->size); | |
1688 | break; | |
1689 | ||
1690 | case R_RX_OPscttop: | |
1691 | RX_STACK_PUSH (input_section->output_section->vma); | |
1692 | break; | |
1693 | ||
1694 | case R_RX_OPand: | |
1695 | RX_STACK_POP (tmp1); | |
1696 | RX_STACK_POP (tmp2); | |
1697 | tmp1 &= tmp2; | |
1698 | RX_STACK_PUSH (tmp1); | |
1699 | break; | |
1700 | ||
1701 | case R_RX_OPor: | |
1702 | RX_STACK_POP (tmp1); | |
1703 | RX_STACK_POP (tmp2); | |
1704 | tmp1 |= tmp2; | |
1705 | RX_STACK_PUSH (tmp1); | |
1706 | break; | |
1707 | ||
1708 | case R_RX_OPxor: | |
1709 | RX_STACK_POP (tmp1); | |
1710 | RX_STACK_POP (tmp2); | |
1711 | tmp1 ^= tmp2; | |
1712 | RX_STACK_PUSH (tmp1); | |
1713 | break; | |
1714 | ||
1715 | case R_RX_OPnot: | |
1716 | RX_STACK_POP (tmp1); | |
1717 | tmp1 = ~ tmp1; | |
1718 | RX_STACK_PUSH (tmp1); | |
1719 | break; | |
1720 | ||
1721 | case R_RX_OPmod: | |
1722 | RX_STACK_POP (tmp1); | |
1723 | RX_STACK_POP (tmp2); | |
1724 | tmp1 %= tmp2; | |
1725 | RX_STACK_PUSH (tmp1); | |
1726 | break; | |
1727 | ||
1728 | case R_RX_OPromtop: | |
1729 | RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); | |
1730 | break; | |
1731 | ||
1732 | case R_RX_OPramtop: | |
1733 | RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); | |
1734 | break; | |
1735 | ||
1736 | case R_RX_DIR16UL: | |
1737 | case R_RX_DIR8UL: | |
1738 | case R_RX_ABS16UL: | |
1739 | case R_RX_ABS8UL: | |
1740 | if (rx_stack_top) | |
1741 | RX_STACK_POP (symval); | |
1742 | if (lrel) | |
1743 | *lrel = rel; | |
1744 | *scale = 4; | |
1745 | return symval; | |
1746 | ||
1747 | case R_RX_DIR16UW: | |
1748 | case R_RX_DIR8UW: | |
1749 | case R_RX_ABS16UW: | |
1750 | case R_RX_ABS8UW: | |
1751 | if (rx_stack_top) | |
1752 | RX_STACK_POP (symval); | |
1753 | if (lrel) | |
1754 | *lrel = rel; | |
1755 | *scale = 2; | |
1756 | return symval; | |
1757 | ||
1758 | default: | |
1759 | if (rx_stack_top) | |
1760 | RX_STACK_POP (symval); | |
1761 | if (lrel) | |
1762 | *lrel = rel; | |
1763 | return symval; | |
1764 | } | |
1765 | ||
1766 | rel ++; | |
1767 | } | |
1768 | } | |
1769 | ||
1770 | static void | |
1771 | move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta) | |
1772 | { | |
1773 | bfd_vma old_offset = srel->r_offset; | |
1774 | ||
1775 | irel ++; | |
1776 | while (irel <= srel) | |
1777 | { | |
1778 | if (irel->r_offset == old_offset) | |
1779 | irel->r_offset += delta; | |
1780 | irel ++; | |
1781 | } | |
1782 | } | |
1783 | ||
1784 | /* Relax one section. */ | |
1785 | ||
1786 | static bfd_boolean | |
1787 | elf32_rx_relax_section (bfd * abfd, | |
1788 | asection * sec, | |
1789 | struct bfd_link_info * link_info, | |
1790 | bfd_boolean * again, | |
1791 | bfd_boolean allow_pcrel3) | |
1792 | { | |
1793 | Elf_Internal_Shdr * symtab_hdr; | |
1794 | Elf_Internal_Shdr * shndx_hdr; | |
1795 | Elf_Internal_Rela * internal_relocs; | |
1796 | Elf_Internal_Rela * free_relocs = NULL; | |
1797 | Elf_Internal_Rela * irel; | |
1798 | Elf_Internal_Rela * srel; | |
1799 | Elf_Internal_Rela * irelend; | |
1800 | Elf_Internal_Rela * next_alignment; | |
1801 | Elf_Internal_Rela * prev_alignment; | |
1802 | bfd_byte * contents = NULL; | |
1803 | bfd_byte * free_contents = NULL; | |
1804 | Elf_Internal_Sym * intsyms = NULL; | |
1805 | Elf_Internal_Sym * free_intsyms = NULL; | |
1806 | Elf_External_Sym_Shndx * shndx_buf = NULL; | |
1807 | bfd_vma pc; | |
1808 | bfd_vma sec_start; | |
c7927a3c NC |
1809 | bfd_vma symval = 0; |
1810 | int pcrel = 0; | |
1811 | int code = 0; | |
1812 | int section_alignment_glue; | |
1813 | /* how much to scale the relocation by - 1, 2, or 4. */ | |
1814 | int scale; | |
1815 | ||
1816 | /* Assume nothing changes. */ | |
1817 | *again = FALSE; | |
1818 | ||
1819 | /* We don't have to do anything for a relocatable link, if | |
1820 | this section does not have relocs, or if this is not a | |
1821 | code section. */ | |
1822 | if (link_info->relocatable | |
1823 | || (sec->flags & SEC_RELOC) == 0 | |
1824 | || sec->reloc_count == 0 | |
1825 | || (sec->flags & SEC_CODE) == 0) | |
1826 | return TRUE; | |
1827 | ||
1828 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
1829 | shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; | |
1830 | ||
1831 | sec_start = sec->output_section->vma + sec->output_offset; | |
c7927a3c NC |
1832 | |
1833 | /* Get the section contents. */ | |
1834 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
1835 | contents = elf_section_data (sec)->this_hdr.contents; | |
1836 | /* Go get them off disk. */ | |
1837 | else | |
1838 | { | |
1839 | if (! bfd_malloc_and_get_section (abfd, sec, &contents)) | |
1840 | goto error_return; | |
1841 | elf_section_data (sec)->this_hdr.contents = contents; | |
1842 | } | |
1843 | ||
1844 | /* Read this BFD's symbols. */ | |
1845 | /* Get cached copy if it exists. */ | |
1846 | if (symtab_hdr->contents != NULL) | |
1847 | intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1848 | else | |
1849 | { | |
1850 | intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); | |
1851 | symtab_hdr->contents = (bfd_byte *) intsyms; | |
1852 | } | |
1853 | ||
1854 | if (shndx_hdr->sh_size != 0) | |
1855 | { | |
1856 | bfd_size_type amt; | |
1857 | ||
1858 | amt = symtab_hdr->sh_info; | |
1859 | amt *= sizeof (Elf_External_Sym_Shndx); | |
1860 | shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); | |
1861 | if (shndx_buf == NULL) | |
1862 | goto error_return; | |
1863 | if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 | |
1864 | || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt) | |
1865 | goto error_return; | |
1866 | shndx_hdr->contents = (bfd_byte *) shndx_buf; | |
1867 | } | |
1868 | ||
1869 | /* Get a copy of the native relocations. */ | |
1870 | internal_relocs = (_bfd_elf_link_read_relocs | |
1871 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, | |
1872 | link_info->keep_memory)); | |
1873 | if (internal_relocs == NULL) | |
1874 | goto error_return; | |
1875 | if (! link_info->keep_memory) | |
1876 | free_relocs = internal_relocs; | |
1877 | ||
1878 | /* The RL_ relocs must be just before the operand relocs they go | |
1879 | with, so we must sort them to guarantee this. We use bubblesort | |
1880 | instead of qsort so we can guarantee that relocs with the same | |
1881 | address remain in the same relative order. */ | |
1882 | reloc_bubblesort (internal_relocs, sec->reloc_count); | |
1883 | ||
1884 | /* Walk through them looking for relaxing opportunities. */ | |
1885 | irelend = internal_relocs + sec->reloc_count; | |
1886 | ||
1887 | /* This will either be NULL or a pointer to the next alignment | |
1888 | relocation. */ | |
1889 | next_alignment = internal_relocs; | |
1890 | /* This will be the previous alignment, although at first it points | |
1891 | to the first real relocation. */ | |
1892 | prev_alignment = internal_relocs; | |
1893 | ||
1894 | /* We calculate worst case shrinkage caused by alignment directives. | |
1895 | No fool-proof, but better than either ignoring the problem or | |
1896 | doing heavy duty analysis of all the alignment markers in all | |
1897 | input sections. */ | |
1898 | section_alignment_glue = 0; | |
1899 | for (irel = internal_relocs; irel < irelend; irel++) | |
1900 | if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX | |
1901 | && irel->r_addend & RX_RELAXA_ALIGN) | |
1902 | { | |
1903 | int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM); | |
1904 | ||
1905 | if (section_alignment_glue < this_glue) | |
1906 | section_alignment_glue = this_glue; | |
1907 | } | |
1908 | /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte | |
1909 | shrinkage. */ | |
1910 | section_alignment_glue *= 2; | |
1911 | ||
1912 | for (irel = internal_relocs; irel < irelend; irel++) | |
1913 | { | |
1914 | unsigned char *insn; | |
1915 | int nrelocs; | |
1916 | ||
1917 | /* The insns we care about are all marked with one of these. */ | |
1918 | if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX) | |
1919 | continue; | |
1920 | ||
1921 | if (irel->r_addend & RX_RELAXA_ALIGN | |
1922 | || next_alignment == internal_relocs) | |
1923 | { | |
1924 | /* When we delete bytes, we need to maintain all the alignments | |
1925 | indicated. In addition, we need to be careful about relaxing | |
1926 | jumps across alignment boundaries - these displacements | |
1927 | *grow* when we delete bytes. For now, don't shrink | |
1928 | displacements across an alignment boundary, just in case. | |
1929 | Note that this only affects relocations to the same | |
1930 | section. */ | |
1931 | prev_alignment = next_alignment; | |
1932 | next_alignment += 2; | |
1933 | while (next_alignment < irelend | |
1934 | && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX | |
1935 | || !(next_alignment->r_addend & RX_RELAXA_ELIGN))) | |
1936 | next_alignment ++; | |
1937 | if (next_alignment >= irelend || next_alignment->r_offset == 0) | |
1938 | next_alignment = NULL; | |
1939 | } | |
1940 | ||
1941 | /* When we hit alignment markers, see if we've shrunk enough | |
1942 | before them to reduce the gap without violating the alignment | |
1943 | requirements. */ | |
1944 | if (irel->r_addend & RX_RELAXA_ALIGN) | |
1945 | { | |
1946 | /* At this point, the next relocation *should* be the ELIGN | |
1947 | end marker. */ | |
1948 | Elf_Internal_Rela *erel = irel + 1; | |
1949 | unsigned int alignment, nbytes; | |
1950 | ||
1951 | if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX) | |
1952 | continue; | |
1953 | if (!(erel->r_addend & RX_RELAXA_ELIGN)) | |
1954 | continue; | |
1955 | ||
1956 | alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM); | |
1957 | ||
1958 | if (erel->r_offset - irel->r_offset < alignment) | |
1959 | continue; | |
1960 | ||
1961 | nbytes = erel->r_offset - irel->r_offset; | |
1962 | nbytes /= alignment; | |
1963 | nbytes *= alignment; | |
1964 | ||
1965 | elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment, | |
1966 | erel->r_offset == sec->size); | |
1967 | *again = TRUE; | |
1968 | ||
1969 | continue; | |
1970 | } | |
1971 | ||
1972 | if (irel->r_addend & RX_RELAXA_ELIGN) | |
1973 | continue; | |
1974 | ||
1975 | insn = contents + irel->r_offset; | |
1976 | ||
1977 | nrelocs = irel->r_addend & RX_RELAXA_RNUM; | |
1978 | ||
1979 | /* At this point, we have an insn that is a candidate for linker | |
1980 | relaxation. There are NRELOCS relocs following that may be | |
1981 | relaxed, although each reloc may be made of more than one | |
1982 | reloc entry (such as gp-rel symbols). */ | |
1983 | ||
1984 | /* Get the value of the symbol referred to by the reloc. Just | |
1985 | in case this is the last reloc in the list, use the RL's | |
1986 | addend to choose between this reloc (no addend) or the next | |
1987 | (yes addend, which means at least one following reloc). */ | |
1988 | ||
1989 | /* srel points to the "current" reloction for this insn - | |
1990 | actually the last reloc for a given operand, which is the one | |
1991 | we need to update. We check the relaxations in the same | |
1992 | order that the relocations happen, so we'll just push it | |
1993 | along as we go. */ | |
1994 | srel = irel; | |
1995 | ||
1996 | pc = sec->output_section->vma + sec->output_offset | |
1997 | + srel->r_offset; | |
1998 | ||
1999 | #define GET_RELOC \ | |
2000 | symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ | |
2001 | pcrel = symval - pc + srel->r_addend; \ | |
2002 | nrelocs --; | |
2003 | ||
2004 | #define SNIPNR(offset, nbytes) \ | |
2005 | elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); | |
2006 | #define SNIP(offset, nbytes, newtype) \ | |
2007 | SNIPNR (offset, nbytes); \ | |
2008 | srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) | |
2009 | ||
2010 | /* The order of these bit tests must match the order that the | |
2011 | relocs appear in. Since we sorted those by offset, we can | |
2012 | predict them. */ | |
2013 | ||
2014 | /* Note that the numbers in, say, DSP6 are the bit offsets of | |
2015 | the code fields that describe the operand. Bits number 0 for | |
2016 | the MSB of insn[0]. */ | |
2017 | ||
2018 | /* DSP* codes: | |
2019 | 0 00 [reg] | |
2020 | 1 01 dsp:8[reg] | |
2021 | 2 10 dsp:16[reg] | |
2022 | 3 11 reg */ | |
2023 | if (irel->r_addend & RX_RELAXA_DSP6) | |
2024 | { | |
2025 | GET_RELOC; | |
2026 | ||
2027 | code = insn[0] & 3; | |
2028 | if (code == 2 && symval/scale <= 255) | |
2029 | { | |
2030 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2031 | insn[0] &= 0xfc; | |
2032 | insn[0] |= 0x01; | |
2033 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2034 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2035 | { | |
2036 | SNIP (3, 1, newrel); | |
2037 | *again = TRUE; | |
2038 | } | |
2039 | } | |
2040 | ||
2041 | else if (code == 1 && symval == 0) | |
2042 | { | |
2043 | insn[0] &= 0xfc; | |
2044 | SNIP (2, 1, R_RX_NONE); | |
2045 | *again = TRUE; | |
2046 | } | |
2047 | ||
2048 | /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */ | |
2049 | else if (code == 1 && symval/scale <= 31 | |
2050 | /* Decodable bits. */ | |
2051 | && (insn[0] & 0xcc) == 0xcc | |
91d6fa6a | 2052 | /* Width. */ |
c7927a3c | 2053 | && (insn[0] & 0x30) != 3 |
91d6fa6a | 2054 | /* Register MSBs. */ |
c7927a3c NC |
2055 | && (insn[1] & 0x88) == 0x00) |
2056 | { | |
2057 | int newrel = 0; | |
2058 | ||
2059 | insn[0] = 0x88 | (insn[0] & 0x30); | |
2060 | /* The register fields are in the right place already. */ | |
2061 | ||
2062 | /* We can't relax this new opcode. */ | |
2063 | irel->r_addend = 0; | |
2064 | ||
2065 | switch ((insn[0] & 0x30) >> 4) | |
2066 | { | |
2067 | case 0: | |
2068 | newrel = R_RX_RH_ABS5p5B; | |
2069 | break; | |
2070 | case 1: | |
2071 | newrel = R_RX_RH_ABS5p5W; | |
2072 | break; | |
2073 | case 2: | |
2074 | newrel = R_RX_RH_ABS5p5L; | |
2075 | break; | |
2076 | } | |
2077 | ||
2078 | move_reloc (irel, srel, -2); | |
2079 | SNIP (2, 1, newrel); | |
2080 | } | |
2081 | ||
2082 | /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */ | |
2083 | else if (code == 1 && symval/scale <= 31 | |
2084 | /* Decodable bits. */ | |
2085 | && (insn[0] & 0xf8) == 0x58 | |
2086 | /* Register MSBs. */ | |
2087 | && (insn[1] & 0x88) == 0x00) | |
2088 | { | |
2089 | int newrel = 0; | |
2090 | ||
2091 | insn[0] = 0xb0 | ((insn[0] & 0x04) << 1); | |
2092 | /* The register fields are in the right place already. */ | |
2093 | ||
2094 | /* We can't relax this new opcode. */ | |
2095 | irel->r_addend = 0; | |
2096 | ||
2097 | switch ((insn[0] & 0x08) >> 3) | |
2098 | { | |
2099 | case 0: | |
2100 | newrel = R_RX_RH_ABS5p5B; | |
2101 | break; | |
2102 | case 1: | |
2103 | newrel = R_RX_RH_ABS5p5W; | |
2104 | break; | |
2105 | } | |
2106 | ||
2107 | move_reloc (irel, srel, -2); | |
2108 | SNIP (2, 1, newrel); | |
2109 | } | |
2110 | } | |
2111 | ||
2112 | /* A DSP4 operand always follows a DSP6 operand, even if there's | |
2113 | no relocation for it. We have to read the code out of the | |
2114 | opcode to calculate the offset of the operand. */ | |
2115 | if (irel->r_addend & RX_RELAXA_DSP4) | |
2116 | { | |
2117 | int code6, offset = 0; | |
2118 | ||
2119 | GET_RELOC; | |
2120 | ||
2121 | code6 = insn[0] & 0x03; | |
2122 | switch (code6) | |
2123 | { | |
2124 | case 0: offset = 2; break; | |
2125 | case 1: offset = 3; break; | |
2126 | case 2: offset = 4; break; | |
2127 | case 3: offset = 2; break; | |
2128 | } | |
2129 | ||
2130 | code = (insn[0] & 0x0c) >> 2; | |
2131 | ||
2132 | if (code == 2 && symval / scale <= 255) | |
2133 | { | |
2134 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2135 | ||
2136 | insn[0] &= 0xf3; | |
2137 | insn[0] |= 0x04; | |
2138 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2139 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2140 | { | |
2141 | SNIP (offset+1, 1, newrel); | |
2142 | *again = TRUE; | |
2143 | } | |
2144 | } | |
2145 | ||
2146 | else if (code == 1 && symval == 0) | |
2147 | { | |
2148 | insn[0] &= 0xf3; | |
2149 | SNIP (offset, 1, R_RX_NONE); | |
2150 | *again = TRUE; | |
2151 | } | |
2152 | /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */ | |
2153 | else if (code == 1 && symval/scale <= 31 | |
2154 | /* Decodable bits. */ | |
2155 | && (insn[0] & 0xc3) == 0xc3 | |
2156 | /* Width. */ | |
2157 | && (insn[0] & 0x30) != 3 | |
2158 | /* Register MSBs. */ | |
2159 | && (insn[1] & 0x88) == 0x00) | |
2160 | { | |
2161 | int newrel = 0; | |
2162 | ||
2163 | insn[0] = 0x80 | (insn[0] & 0x30); | |
2164 | /* The register fields are in the right place already. */ | |
2165 | ||
2166 | /* We can't relax this new opcode. */ | |
2167 | irel->r_addend = 0; | |
2168 | ||
2169 | switch ((insn[0] & 0x30) >> 4) | |
2170 | { | |
2171 | case 0: | |
2172 | newrel = R_RX_RH_ABS5p5B; | |
2173 | break; | |
2174 | case 1: | |
2175 | newrel = R_RX_RH_ABS5p5W; | |
2176 | break; | |
2177 | case 2: | |
2178 | newrel = R_RX_RH_ABS5p5L; | |
2179 | break; | |
2180 | } | |
2181 | ||
2182 | move_reloc (irel, srel, -2); | |
2183 | SNIP (2, 1, newrel); | |
2184 | } | |
2185 | } | |
2186 | ||
2187 | /* These always occur alone, but the offset depends on whether | |
2188 | it's a MEMEX opcode (0x06) or not. */ | |
2189 | if (irel->r_addend & RX_RELAXA_DSP14) | |
2190 | { | |
2191 | int offset; | |
2192 | GET_RELOC; | |
2193 | ||
2194 | if (insn[0] == 0x06) | |
2195 | offset = 3; | |
2196 | else | |
2197 | offset = 4; | |
2198 | ||
2199 | code = insn[1] & 3; | |
2200 | ||
2201 | if (code == 2 && symval / scale <= 255) | |
2202 | { | |
2203 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2204 | ||
2205 | insn[1] &= 0xfc; | |
2206 | insn[1] |= 0x01; | |
2207 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2208 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2209 | { | |
2210 | SNIP (offset, 1, newrel); | |
2211 | *again = TRUE; | |
2212 | } | |
2213 | } | |
2214 | else if (code == 1 && symval == 0) | |
2215 | { | |
2216 | insn[1] &= 0xfc; | |
2217 | SNIP (offset, 1, R_RX_NONE); | |
2218 | *again = TRUE; | |
2219 | } | |
2220 | } | |
2221 | ||
2222 | /* IMM* codes: | |
2223 | 0 00 imm:32 | |
2224 | 1 01 simm:8 | |
2225 | 2 10 simm:16 | |
2226 | 3 11 simm:24. */ | |
2227 | ||
2228 | /* These always occur alone. */ | |
2229 | if (irel->r_addend & RX_RELAXA_IMM6) | |
2230 | { | |
2231 | long ssymval; | |
2232 | ||
2233 | GET_RELOC; | |
2234 | ||
2235 | /* These relocations sign-extend, so we must do signed compares. */ | |
2236 | ssymval = (long) symval; | |
2237 | ||
2238 | code = insn[0] & 0x03; | |
2239 | ||
2240 | if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) | |
2241 | { | |
2242 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2243 | ||
2244 | insn[0] &= 0xfc; | |
2245 | insn[0] |= 0x03; | |
2246 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2247 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2248 | { | |
2249 | SNIP (2, 1, newrel); | |
2250 | *again = TRUE; | |
2251 | } | |
2252 | } | |
2253 | ||
2254 | else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) | |
2255 | { | |
2256 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2257 | ||
2258 | insn[0] &= 0xfc; | |
2259 | insn[0] |= 0x02; | |
2260 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2261 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2262 | { | |
2263 | SNIP (2, 1, newrel); | |
2264 | *again = TRUE; | |
2265 | } | |
2266 | } | |
2267 | ||
2268 | /* Special case UIMM8 format: CMP #uimm8,Rdst. */ | |
2269 | else if (code == 2 && ssymval <= 255 && ssymval >= 16 | |
2270 | /* Decodable bits. */ | |
2271 | && (insn[0] & 0xfc) == 0x74 | |
2272 | /* Decodable bits. */ | |
2273 | && ((insn[1] & 0xf0) == 0x00)) | |
2274 | { | |
2275 | int newrel; | |
2276 | ||
2277 | insn[0] = 0x75; | |
2278 | insn[1] = 0x50 | (insn[1] & 0x0f); | |
2279 | ||
2280 | /* We can't relax this new opcode. */ | |
2281 | irel->r_addend = 0; | |
2282 | ||
2283 | if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) | |
2284 | newrel = R_RX_ABS8U; | |
2285 | else | |
2286 | newrel = R_RX_DIR8U; | |
2287 | ||
2288 | SNIP (2, 1, newrel); | |
2289 | *again = TRUE; | |
2290 | } | |
2291 | ||
2292 | else if (code == 2 && ssymval <= 127 && ssymval >= -128) | |
2293 | { | |
2294 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2295 | ||
2296 | insn[0] &= 0xfc; | |
2297 | insn[0] |= 0x01; | |
2298 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2299 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2300 | { | |
2301 | SNIP (2, 1, newrel); | |
2302 | *again = TRUE; | |
2303 | } | |
2304 | } | |
2305 | ||
2306 | /* Special case UIMM4 format: CMP, MUL, AND, OR. */ | |
2307 | else if (code == 1 && ssymval <= 15 && ssymval >= 0 | |
2308 | /* Decodable bits and immediate type. */ | |
2309 | && insn[0] == 0x75 | |
2310 | /* Decodable bits. */ | |
2311 | && (insn[1] & 0xc0) == 0x00) | |
2312 | { | |
2313 | static const int newop[4] = { 1, 3, 4, 5 }; | |
2314 | ||
2315 | insn[0] = 0x60 | newop[insn[1] >> 4]; | |
2316 | /* The register number doesn't move. */ | |
2317 | ||
2318 | /* We can't relax this new opcode. */ | |
2319 | irel->r_addend = 0; | |
2320 | ||
2321 | move_reloc (irel, srel, -1); | |
2322 | ||
2323 | SNIP (2, 1, R_RX_RH_UIMM4p8); | |
2324 | *again = TRUE; | |
2325 | } | |
2326 | ||
2327 | /* Special case UIMM4 format: ADD -> ADD/SUB. */ | |
2328 | else if (code == 1 && ssymval <= 15 && ssymval >= -15 | |
2329 | /* Decodable bits and immediate type. */ | |
2330 | && insn[0] == 0x71 | |
2331 | /* Same register for source and destination. */ | |
2332 | && ((insn[1] >> 4) == (insn[1] & 0x0f))) | |
2333 | { | |
2334 | int newrel; | |
2335 | ||
2336 | /* Note that we can't turn "add $0,Rs" into a NOP | |
2337 | because the flags need to be set right. */ | |
2338 | ||
2339 | if (ssymval < 0) | |
2340 | { | |
2341 | insn[0] = 0x60; /* Subtract. */ | |
2342 | newrel = R_RX_RH_UNEG4p8; | |
2343 | } | |
2344 | else | |
2345 | { | |
2346 | insn[0] = 0x62; /* Add. */ | |
2347 | newrel = R_RX_RH_UIMM4p8; | |
2348 | } | |
2349 | ||
2350 | /* The register number is in the right place. */ | |
2351 | ||
2352 | /* We can't relax this new opcode. */ | |
2353 | irel->r_addend = 0; | |
2354 | ||
2355 | move_reloc (irel, srel, -1); | |
2356 | ||
2357 | SNIP (2, 1, newrel); | |
2358 | *again = TRUE; | |
2359 | } | |
2360 | } | |
2361 | ||
2362 | /* These are either matched with a DSP6 (2-byte base) or an id24 | |
2363 | (3-byte base). */ | |
2364 | if (irel->r_addend & RX_RELAXA_IMM12) | |
2365 | { | |
2366 | int dspcode, offset = 0; | |
2367 | long ssymval; | |
2368 | ||
2369 | GET_RELOC; | |
2370 | ||
2371 | if ((insn[0] & 0xfc) == 0xfc) | |
2372 | dspcode = 1; /* Just something with one byte operand. */ | |
2373 | else | |
2374 | dspcode = insn[0] & 3; | |
2375 | switch (dspcode) | |
2376 | { | |
2377 | case 0: offset = 2; break; | |
2378 | case 1: offset = 3; break; | |
2379 | case 2: offset = 4; break; | |
2380 | case 3: offset = 2; break; | |
2381 | } | |
2382 | ||
2383 | /* These relocations sign-extend, so we must do signed compares. */ | |
2384 | ssymval = (long) symval; | |
2385 | ||
2386 | code = (insn[1] >> 2) & 3; | |
2387 | if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608) | |
2388 | { | |
2389 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2390 | ||
2391 | insn[1] &= 0xf3; | |
2392 | insn[1] |= 0x0c; | |
2393 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2394 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2395 | { | |
2396 | SNIP (offset, 1, newrel); | |
2397 | *again = TRUE; | |
2398 | } | |
2399 | } | |
2400 | ||
2401 | else if (code == 3 && ssymval <= 32767 && ssymval >= -32768) | |
2402 | { | |
2403 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2404 | ||
2405 | insn[1] &= 0xf3; | |
2406 | insn[1] |= 0x08; | |
2407 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2408 | if (newrel != ELF32_R_TYPE (srel->r_info)) | |
2409 | { | |
2410 | SNIP (offset, 1, newrel); | |
2411 | *again = TRUE; | |
2412 | } | |
2413 | } | |
2414 | ||
2415 | /* Special case UIMM8 format: MOV #uimm8,Rdst. */ | |
2416 | else if (code == 2 && ssymval <= 255 && ssymval >= 16 | |
2417 | /* Decodable bits. */ | |
2418 | && insn[0] == 0xfb | |
2419 | /* Decodable bits. */ | |
2420 | && ((insn[1] & 0x03) == 0x02)) | |
2421 | { | |
2422 | int newrel; | |
2423 | ||
2424 | insn[0] = 0x75; | |
2425 | insn[1] = 0x40 | (insn[1] >> 4); | |
2426 | ||
2427 | /* We can't relax this new opcode. */ | |
2428 | irel->r_addend = 0; | |
2429 | ||
2430 | if (STACK_REL_P (ELF32_R_TYPE (srel->r_info))) | |
2431 | newrel = R_RX_ABS8U; | |
2432 | else | |
2433 | newrel = R_RX_DIR8U; | |
2434 | ||
2435 | SNIP (2, 1, newrel); | |
2436 | *again = TRUE; | |
2437 | } | |
2438 | ||
2439 | else if (code == 2 && ssymval <= 127 && ssymval >= -128) | |
2440 | { | |
2441 | unsigned int newrel = ELF32_R_TYPE(srel->r_info); | |
2442 | ||
2443 | insn[1] &= 0xf3; | |
2444 | insn[1] |= 0x04; | |
2445 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2446 | if (newrel != ELF32_R_TYPE(srel->r_info)) | |
2447 | { | |
2448 | SNIP (offset, 1, newrel); | |
2449 | *again = TRUE; | |
2450 | } | |
2451 | } | |
2452 | ||
2453 | /* Special case UIMM4 format: MOV #uimm4,Rdst. */ | |
2454 | else if (code == 1 && ssymval <= 15 && ssymval >= 0 | |
2455 | /* Decodable bits. */ | |
2456 | && insn[0] == 0xfb | |
2457 | /* Decodable bits. */ | |
2458 | && ((insn[1] & 0x03) == 0x02)) | |
2459 | { | |
2460 | insn[0] = 0x66; | |
2461 | insn[1] = insn[1] >> 4; | |
2462 | ||
2463 | /* We can't relax this new opcode. */ | |
2464 | irel->r_addend = 0; | |
2465 | ||
2466 | move_reloc (irel, srel, -1); | |
2467 | ||
2468 | SNIP (2, 1, R_RX_RH_UIMM4p8); | |
2469 | *again = TRUE; | |
2470 | } | |
2471 | } | |
2472 | ||
2473 | if (irel->r_addend & RX_RELAXA_BRA) | |
2474 | { | |
2475 | unsigned int newrel = ELF32_R_TYPE (srel->r_info); | |
2476 | int max_pcrel3 = 4; | |
2477 | int alignment_glue = 0; | |
2478 | ||
2479 | GET_RELOC; | |
2480 | ||
2481 | /* Branches over alignment chunks are problematic, as | |
2482 | deleting bytes here makes the branch *further* away. We | |
2483 | can be agressive with branches within this alignment | |
2484 | block, but not branches outside it. */ | |
2485 | if ((prev_alignment == NULL | |
2486 | || symval < (bfd_vma)(sec_start + prev_alignment->r_offset)) | |
2487 | && (next_alignment == NULL | |
2488 | || symval > (bfd_vma)(sec_start + next_alignment->r_offset))) | |
2489 | alignment_glue = section_alignment_glue; | |
2490 | ||
2491 | if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX | |
2492 | && srel[1].r_addend & RX_RELAXA_BRA | |
2493 | && srel[1].r_offset < irel->r_offset + pcrel) | |
2494 | max_pcrel3 ++; | |
2495 | ||
2496 | newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info)); | |
2497 | ||
2498 | /* The values we compare PCREL with are not what you'd | |
2499 | expect; they're off by a little to compensate for (1) | |
2500 | where the reloc is relative to the insn, and (2) how much | |
2501 | the insn is going to change when we relax it. */ | |
2502 | ||
2503 | /* These we have to decode. */ | |
2504 | switch (insn[0]) | |
2505 | { | |
2506 | case 0x04: /* BRA pcdsp:24 */ | |
2507 | if (-32768 + alignment_glue <= pcrel | |
2508 | && pcrel <= 32765 - alignment_glue) | |
2509 | { | |
2510 | insn[0] = 0x38; | |
2511 | SNIP (3, 1, newrel); | |
2512 | *again = TRUE; | |
2513 | } | |
2514 | break; | |
2515 | ||
2516 | case 0x38: /* BRA pcdsp:16 */ | |
2517 | if (-128 + alignment_glue <= pcrel | |
2518 | && pcrel <= 127 - alignment_glue) | |
2519 | { | |
2520 | insn[0] = 0x2e; | |
2521 | SNIP (2, 1, newrel); | |
2522 | *again = TRUE; | |
2523 | } | |
2524 | break; | |
2525 | ||
2526 | case 0x2e: /* BRA pcdsp:8 */ | |
2527 | /* Note that there's a risk here of shortening things so | |
2528 | much that we no longer fit this reloc; it *should* | |
2529 | only happen when you branch across a branch, and that | |
2530 | branch also devolves into BRA.S. "Real" code should | |
2531 | be OK. */ | |
2532 | if (max_pcrel3 + alignment_glue <= pcrel | |
2533 | && pcrel <= 10 - alignment_glue | |
2534 | && allow_pcrel3) | |
2535 | { | |
2536 | insn[0] = 0x08; | |
2537 | SNIP (1, 1, newrel); | |
2538 | move_reloc (irel, srel, -1); | |
2539 | *again = TRUE; | |
2540 | } | |
2541 | break; | |
2542 | ||
2543 | case 0x05: /* BSR pcdsp:24 */ | |
2544 | if (-32768 + alignment_glue <= pcrel | |
2545 | && pcrel <= 32765 - alignment_glue) | |
2546 | { | |
2547 | insn[0] = 0x39; | |
2548 | SNIP (1, 1, newrel); | |
2549 | *again = TRUE; | |
2550 | } | |
2551 | break; | |
2552 | ||
2553 | case 0x3a: /* BEQ.W pcdsp:16 */ | |
2554 | case 0x3b: /* BNE.W pcdsp:16 */ | |
2555 | if (-128 + alignment_glue <= pcrel | |
2556 | && pcrel <= 127 - alignment_glue) | |
2557 | { | |
2558 | insn[0] = 0x20 | (insn[0] & 1); | |
2559 | SNIP (1, 1, newrel); | |
2560 | *again = TRUE; | |
2561 | } | |
2562 | break; | |
2563 | ||
2564 | case 0x20: /* BEQ.B pcdsp:8 */ | |
2565 | case 0x21: /* BNE.B pcdsp:8 */ | |
2566 | if (max_pcrel3 + alignment_glue <= pcrel | |
2567 | && pcrel - alignment_glue <= 10 | |
2568 | && allow_pcrel3) | |
2569 | { | |
2570 | insn[0] = 0x10 | ((insn[0] & 1) << 3); | |
2571 | SNIP (1, 1, newrel); | |
2572 | move_reloc (irel, srel, -1); | |
2573 | *again = TRUE; | |
2574 | } | |
2575 | break; | |
2576 | ||
2577 | case 0x16: /* synthetic BNE dsp24 */ | |
2578 | case 0x1e: /* synthetic BEQ dsp24 */ | |
2579 | if (-32767 + alignment_glue <= pcrel | |
2580 | && pcrel <= 32766 - alignment_glue | |
2581 | && insn[1] == 0x04) | |
2582 | { | |
2583 | if (insn[0] == 0x16) | |
2584 | insn[0] = 0x3b; | |
2585 | else | |
2586 | insn[0] = 0x3a; | |
2587 | /* We snip out the bytes at the end else the reloc | |
2588 | will get moved too, and too much. */ | |
2589 | SNIP (3, 2, newrel); | |
2590 | move_reloc (irel, srel, -1); | |
2591 | *again = TRUE; | |
2592 | } | |
2593 | break; | |
2594 | } | |
2595 | ||
2596 | /* Special case - synthetic conditional branches, pcrel24. | |
2597 | Note that EQ and NE have been handled above. */ | |
2598 | if ((insn[0] & 0xf0) == 0x20 | |
2599 | && insn[1] == 0x06 | |
2600 | && insn[2] == 0x04 | |
2601 | && srel->r_offset != irel->r_offset + 1 | |
2602 | && -32767 + alignment_glue <= pcrel | |
2603 | && pcrel <= 32766 - alignment_glue) | |
2604 | { | |
2605 | insn[1] = 0x05; | |
2606 | insn[2] = 0x38; | |
2607 | SNIP (5, 1, newrel); | |
2608 | *again = TRUE; | |
2609 | } | |
2610 | ||
2611 | /* Special case - synthetic conditional branches, pcrel16 */ | |
2612 | if ((insn[0] & 0xf0) == 0x20 | |
2613 | && insn[1] == 0x05 | |
2614 | && insn[2] == 0x38 | |
2615 | && srel->r_offset != irel->r_offset + 1 | |
2616 | && -127 + alignment_glue <= pcrel | |
2617 | && pcrel <= 126 - alignment_glue) | |
2618 | { | |
2619 | int cond = (insn[0] & 0x0f) ^ 0x01; | |
2620 | ||
2621 | insn[0] = 0x20 | cond; | |
2622 | /* By moving the reloc first, we avoid having | |
2623 | delete_bytes move it also. */ | |
2624 | move_reloc (irel, srel, -2); | |
2625 | SNIP (2, 3, newrel); | |
2626 | *again = TRUE; | |
2627 | } | |
2628 | } | |
2629 | ||
2630 | BFD_ASSERT (nrelocs == 0); | |
2631 | ||
2632 | /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can | |
2633 | use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky | |
2634 | because it may have one or two relocations. */ | |
2635 | if ((insn[0] & 0xfc) == 0xf8 | |
2636 | && (insn[1] & 0x80) == 0x00 | |
2637 | && (insn[0] & 0x03) != 0x03) | |
2638 | { | |
2639 | int dcode, icode, reg, ioff, dscale, ilen; | |
2640 | bfd_vma disp_val = 0; | |
2641 | long imm_val = 0; | |
2642 | Elf_Internal_Rela * disp_rel = 0; | |
2643 | Elf_Internal_Rela * imm_rel = 0; | |
2644 | ||
2645 | /* Reset this. */ | |
2646 | srel = irel; | |
2647 | ||
2648 | dcode = insn[0] & 0x03; | |
2649 | icode = (insn[1] >> 2) & 0x03; | |
2650 | reg = (insn[1] >> 4) & 0x0f; | |
2651 | ||
2652 | ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2; | |
2653 | ||
2654 | /* Figure out what the dispacement is. */ | |
2655 | if (dcode == 1 || dcode == 2) | |
2656 | { | |
2657 | /* There's a displacement. See if there's a reloc for it. */ | |
2658 | if (srel[1].r_offset == irel->r_offset + 2) | |
2659 | { | |
2660 | GET_RELOC; | |
2661 | disp_val = symval; | |
2662 | disp_rel = srel; | |
2663 | } | |
2664 | else | |
2665 | { | |
2666 | if (dcode == 1) | |
2667 | disp_val = insn[2]; | |
2668 | else | |
2669 | { | |
2670 | #if RX_OPCODE_BIG_ENDIAN | |
2671 | disp_val = insn[2] * 256 + insn[3]; | |
2672 | #else | |
2673 | disp_val = insn[2] + insn[3] * 256; | |
2674 | #endif | |
2675 | } | |
2676 | switch (insn[1] & 3) | |
2677 | { | |
2678 | case 1: | |
2679 | disp_val *= 2; | |
2680 | scale = 2; | |
2681 | break; | |
2682 | case 2: | |
2683 | disp_val *= 4; | |
2684 | scale = 4; | |
2685 | break; | |
2686 | } | |
2687 | } | |
2688 | } | |
2689 | ||
2690 | dscale = scale; | |
2691 | ||
2692 | /* Figure out what the immediate is. */ | |
2693 | if (srel[1].r_offset == irel->r_offset + ioff) | |
2694 | { | |
2695 | GET_RELOC; | |
2696 | imm_val = (long) symval; | |
2697 | imm_rel = srel; | |
2698 | } | |
2699 | else | |
2700 | { | |
2701 | unsigned char * ip = insn + ioff; | |
2702 | ||
2703 | switch (icode) | |
2704 | { | |
2705 | case 1: | |
2706 | /* For byte writes, we don't sign extend. Makes the math easier later. */ | |
2707 | if (scale == 1) | |
2708 | imm_val = ip[0]; | |
2709 | else | |
2710 | imm_val = (char) ip[0]; | |
2711 | break; | |
2712 | case 2: | |
2713 | #if RX_OPCODE_BIG_ENDIAN | |
2714 | imm_val = ((char) ip[0] << 8) | ip[1]; | |
2715 | #else | |
2716 | imm_val = ((char) ip[1] << 8) | ip[0]; | |
2717 | #endif | |
2718 | break; | |
2719 | case 3: | |
2720 | #if RX_OPCODE_BIG_ENDIAN | |
2721 | imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2]; | |
2722 | #else | |
2723 | imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0]; | |
2724 | #endif | |
2725 | break; | |
2726 | case 0: | |
2727 | #if RX_OPCODE_BIG_ENDIAN | |
2728 | imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3]; | |
2729 | #else | |
2730 | imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0]; | |
2731 | #endif | |
2732 | break; | |
2733 | } | |
2734 | } | |
2735 | ||
2736 | ilen = 2; | |
2737 | ||
2738 | switch (dcode) | |
2739 | { | |
2740 | case 1: | |
2741 | ilen += 1; | |
2742 | break; | |
2743 | case 2: | |
2744 | ilen += 2; | |
2745 | break; | |
2746 | } | |
2747 | ||
2748 | switch (icode) | |
2749 | { | |
2750 | case 1: | |
2751 | ilen += 1; | |
2752 | break; | |
2753 | case 2: | |
2754 | ilen += 2; | |
2755 | break; | |
2756 | case 3: | |
2757 | ilen += 3; | |
2758 | break; | |
2759 | case 4: | |
2760 | ilen += 4; | |
2761 | break; | |
2762 | } | |
2763 | ||
2764 | /* The shortcut happens when the immediate is 0..255, | |
2765 | register r0 to r7, and displacement (scaled) 0..31. */ | |
2766 | ||
2767 | if (0 <= imm_val && imm_val <= 255 | |
2768 | && 0 <= reg && reg <= 7 | |
2769 | && disp_val / dscale <= 31) | |
2770 | { | |
2771 | insn[0] = 0x3c | (insn[1] & 0x03); | |
2772 | insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f); | |
2773 | insn[2] = imm_val; | |
2774 | ||
2775 | if (disp_rel) | |
2776 | { | |
2777 | int newrel = R_RX_NONE; | |
2778 | ||
2779 | switch (dscale) | |
2780 | { | |
2781 | case 1: | |
2782 | newrel = R_RX_RH_ABS5p8B; | |
2783 | break; | |
2784 | case 2: | |
2785 | newrel = R_RX_RH_ABS5p8W; | |
2786 | break; | |
2787 | case 4: | |
2788 | newrel = R_RX_RH_ABS5p8L; | |
2789 | break; | |
2790 | } | |
2791 | disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel); | |
2792 | move_reloc (irel, disp_rel, -1); | |
2793 | } | |
2794 | if (imm_rel) | |
2795 | { | |
2796 | imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U); | |
2797 | move_reloc (disp_rel ? disp_rel : irel, | |
2798 | imm_rel, | |
2799 | irel->r_offset - imm_rel->r_offset + 2); | |
2800 | } | |
2801 | ||
2802 | SNIPNR (3, ilen - 3); | |
2803 | *again = TRUE; | |
2804 | ||
2805 | /* We can't relax this new opcode. */ | |
2806 | irel->r_addend = 0; | |
2807 | } | |
2808 | } | |
2809 | } | |
2810 | ||
2811 | /* We can't reliably relax branches to DIR3U_PCREL unless we know | |
2812 | whatever they're branching over won't shrink any more. If we're | |
2813 | basically done here, do one more pass just for branches - but | |
2814 | don't request a pass after that one! */ | |
2815 | if (!*again && !allow_pcrel3) | |
2816 | { | |
2817 | bfd_boolean ignored; | |
2818 | ||
2819 | elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE); | |
2820 | } | |
2821 | ||
2822 | return TRUE; | |
2823 | ||
2824 | error_return: | |
2825 | if (free_relocs != NULL) | |
2826 | free (free_relocs); | |
2827 | ||
2828 | if (free_contents != NULL) | |
2829 | free (free_contents); | |
2830 | ||
2831 | if (shndx_buf != NULL) | |
2832 | { | |
2833 | shndx_hdr->contents = NULL; | |
2834 | free (shndx_buf); | |
2835 | } | |
2836 | ||
2837 | if (free_intsyms != NULL) | |
2838 | free (free_intsyms); | |
2839 | ||
2840 | return FALSE; | |
2841 | } | |
2842 | ||
2843 | static bfd_boolean | |
2844 | elf32_rx_relax_section_wrapper (bfd * abfd, | |
2845 | asection * sec, | |
2846 | struct bfd_link_info * link_info, | |
2847 | bfd_boolean * again) | |
2848 | { | |
2849 | return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE); | |
2850 | } | |
2851 | \f | |
2852 | /* Function to set the ELF flag bits. */ | |
2853 | ||
2854 | static bfd_boolean | |
2855 | rx_elf_set_private_flags (bfd * abfd, flagword flags) | |
2856 | { | |
2857 | elf_elfheader (abfd)->e_flags = flags; | |
2858 | elf_flags_init (abfd) = TRUE; | |
2859 | return TRUE; | |
2860 | } | |
2861 | ||
2862 | static bfd_boolean no_warn_mismatch = FALSE; | |
84bff83f | 2863 | static bfd_boolean ignore_lma = TRUE; |
c7927a3c | 2864 | |
84bff83f | 2865 | void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean); |
c7927a3c NC |
2866 | |
2867 | void | |
84bff83f NC |
2868 | bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch, |
2869 | bfd_boolean user_ignore_lma) | |
c7927a3c NC |
2870 | { |
2871 | no_warn_mismatch = user_no_warn_mismatch; | |
84bff83f | 2872 | ignore_lma = user_ignore_lma; |
c7927a3c NC |
2873 | } |
2874 | ||
2875 | /* Merge backend specific data from an object file to the output | |
2876 | object file when linking. */ | |
2877 | ||
2878 | static bfd_boolean | |
2879 | rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) | |
2880 | { | |
2881 | flagword old_flags; | |
2882 | flagword new_flags; | |
2883 | bfd_boolean error = FALSE; | |
2884 | ||
2885 | new_flags = elf_elfheader (ibfd)->e_flags; | |
2886 | old_flags = elf_elfheader (obfd)->e_flags; | |
2887 | ||
2888 | if (!elf_flags_init (obfd)) | |
2889 | { | |
2890 | /* First call, no flags set. */ | |
2891 | elf_flags_init (obfd) = TRUE; | |
2892 | elf_elfheader (obfd)->e_flags = new_flags; | |
2893 | } | |
2894 | else if (old_flags != new_flags) | |
2895 | { | |
2896 | flagword known_flags = E_FLAG_RX_64BIT_DOUBLES | E_FLAG_RX_DSP; | |
2897 | ||
2898 | if ((old_flags ^ new_flags) & known_flags) | |
2899 | { | |
2900 | /* Only complain if flag bits we care about do not match. | |
2901 | Other bits may be set, since older binaries did use some | |
2902 | deprecated flags. */ | |
2903 | if (no_warn_mismatch) | |
2904 | { | |
2905 | elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags; | |
2906 | } | |
2907 | else | |
2908 | { | |
2909 | (*_bfd_error_handler) | |
2910 | ("ELF header flags mismatch: old_flags = 0x%.8lx, new_flags = 0x%.8lx, filename = %s", | |
2911 | old_flags, new_flags, bfd_get_filename (ibfd)); | |
2912 | error = TRUE; | |
2913 | } | |
2914 | } | |
2915 | else | |
2916 | elf_elfheader (obfd)->e_flags = new_flags & known_flags; | |
2917 | } | |
2918 | ||
2919 | if (error) | |
2920 | bfd_set_error (bfd_error_bad_value); | |
2921 | ||
2922 | return !error; | |
2923 | } | |
2924 | \f | |
2925 | static bfd_boolean | |
2926 | rx_elf_print_private_bfd_data (bfd * abfd, void * ptr) | |
2927 | { | |
2928 | FILE * file = (FILE *) ptr; | |
2929 | flagword flags; | |
2930 | ||
2931 | BFD_ASSERT (abfd != NULL && ptr != NULL); | |
2932 | ||
2933 | /* Print normal ELF private data. */ | |
2934 | _bfd_elf_print_private_bfd_data (abfd, ptr); | |
2935 | ||
2936 | flags = elf_elfheader (abfd)->e_flags; | |
2937 | fprintf (file, _("private flags = 0x%lx:"), (long) flags); | |
2938 | ||
2939 | if (flags & E_FLAG_RX_64BIT_DOUBLES) | |
2940 | fprintf (file, _(" [64-bit doubles]")); | |
2941 | if (flags & E_FLAG_RX_DSP) | |
2942 | fprintf (file, _(" [dsp]")); | |
2943 | ||
2944 | fputc ('\n', file); | |
2945 | return TRUE; | |
2946 | } | |
2947 | ||
2948 | /* Return the MACH for an e_flags value. */ | |
2949 | ||
2950 | static int | |
2951 | elf32_rx_machine (bfd * abfd) | |
2952 | { | |
2953 | if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX) | |
2954 | return bfd_mach_rx; | |
2955 | ||
2956 | return 0; | |
2957 | } | |
2958 | ||
2959 | static bfd_boolean | |
2960 | rx_elf_object_p (bfd * abfd) | |
2961 | { | |
1ce74905 DD |
2962 | int i; |
2963 | unsigned int u; | |
2964 | Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr; | |
2965 | int nphdrs = elf_elfheader (abfd)->e_phnum; | |
2966 | sec_ptr bsec; | |
2967 | ||
4c422395 DD |
2968 | /* We never want to automatically choose the non-swapping big-endian |
2969 | target. The user can only get that explicitly, such as with -I | |
2970 | and objcopy. */ | |
2971 | if (abfd->xvec == &bfd_elf32_rx_be_ns_vec | |
2972 | && abfd->target_defaulted) | |
2973 | return FALSE; | |
2974 | ||
c7927a3c NC |
2975 | bfd_default_set_arch_mach (abfd, bfd_arch_rx, |
2976 | elf32_rx_machine (abfd)); | |
1ce74905 DD |
2977 | |
2978 | /* For each PHDR in the object, we must find some section that | |
2979 | corresponds (based on matching file offsets) and use its VMA | |
2980 | information to reconstruct the p_vaddr field we clobbered when we | |
2981 | wrote it out. */ | |
2982 | for (i=0; i<nphdrs; i++) | |
2983 | { | |
2984 | for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++) | |
2985 | { | |
2986 | Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u]; | |
2987 | ||
2988 | if (phdr[i].p_offset <= (bfd_vma) sec->sh_offset | |
2989 | && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1)) | |
2990 | { | |
2991 | /* Found one! The difference between the two addresses, | |
2992 | plus the difference between the two file offsets, is | |
2993 | enough information to reconstruct the lma. */ | |
2994 | ||
2995 | /* Example where they aren't: | |
2996 | PHDR[1] = lma fffc0100 offset 00002010 size 00000100 | |
2997 | SEC[6] = vma 00000050 offset 00002050 size 00000040 | |
2998 | ||
2999 | The correct LMA for the section is fffc0140 + (2050-2010). | |
3000 | */ | |
3001 | ||
3002 | phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset); | |
3003 | break; | |
3004 | } | |
3005 | } | |
3006 | ||
3007 | /* We must update the bfd sections as well, so we don't stop | |
3008 | with one match. */ | |
3009 | bsec = abfd->sections; | |
3010 | while (bsec) | |
3011 | { | |
3012 | if (phdr[i].p_vaddr <= bsec->lma | |
3013 | && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1)) | |
3014 | { | |
3015 | bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr); | |
3016 | } | |
3017 | bsec = bsec->next; | |
3018 | } | |
3019 | } | |
3020 | ||
c7927a3c NC |
3021 | return TRUE; |
3022 | } | |
3023 | \f | |
3024 | ||
3025 | #ifdef DEBUG | |
3026 | void | |
9ccb8af9 | 3027 | rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms) |
c7927a3c NC |
3028 | { |
3029 | size_t locsymcount; | |
3030 | Elf_Internal_Sym * isymbuf; | |
3031 | Elf_Internal_Sym * isymend; | |
3032 | Elf_Internal_Sym * isym; | |
3033 | Elf_Internal_Shdr * symtab_hdr; | |
3034 | bfd_boolean free_internal = FALSE, free_external = FALSE; | |
3035 | char * st_info_str; | |
3036 | char * st_info_stb_str; | |
3037 | char * st_other_str; | |
3038 | char * st_shndx_str; | |
3039 | ||
3040 | if (! internal_syms) | |
3041 | { | |
3042 | internal_syms = bfd_malloc (1000); | |
3043 | free_internal = 1; | |
3044 | } | |
3045 | if (! external_syms) | |
3046 | { | |
3047 | external_syms = bfd_malloc (1000); | |
3048 | free_external = 1; | |
3049 | } | |
3050 | ||
3051 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
3052 | locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym; | |
3053 | if (free_internal) | |
3054 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
3055 | symtab_hdr->sh_info, 0, | |
3056 | internal_syms, external_syms, NULL); | |
3057 | else | |
3058 | isymbuf = internal_syms; | |
3059 | isymend = isymbuf + locsymcount; | |
3060 | ||
3061 | for (isym = isymbuf ; isym < isymend ; isym++) | |
3062 | { | |
3063 | switch (ELF_ST_TYPE (isym->st_info)) | |
3064 | { | |
3065 | case STT_FUNC: st_info_str = "STT_FUNC"; | |
3066 | case STT_SECTION: st_info_str = "STT_SECTION"; | |
3067 | case STT_FILE: st_info_str = "STT_FILE"; | |
3068 | case STT_OBJECT: st_info_str = "STT_OBJECT"; | |
3069 | case STT_TLS: st_info_str = "STT_TLS"; | |
3070 | default: st_info_str = ""; | |
3071 | } | |
3072 | switch (ELF_ST_BIND (isym->st_info)) | |
3073 | { | |
3074 | case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; | |
3075 | case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; | |
3076 | default: st_info_stb_str = ""; | |
3077 | } | |
3078 | switch (ELF_ST_VISIBILITY (isym->st_other)) | |
3079 | { | |
3080 | case STV_DEFAULT: st_other_str = "STV_DEFAULT"; | |
3081 | case STV_INTERNAL: st_other_str = "STV_INTERNAL"; | |
3082 | case STV_PROTECTED: st_other_str = "STV_PROTECTED"; | |
3083 | default: st_other_str = ""; | |
3084 | } | |
3085 | switch (isym->st_shndx) | |
3086 | { | |
3087 | case SHN_ABS: st_shndx_str = "SHN_ABS"; | |
3088 | case SHN_COMMON: st_shndx_str = "SHN_COMMON"; | |
3089 | case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; | |
3090 | default: st_shndx_str = ""; | |
3091 | } | |
3092 | ||
3093 | printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s " | |
3094 | "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n", | |
3095 | isym, | |
3096 | (unsigned long) isym->st_value, | |
3097 | (unsigned long) isym->st_size, | |
3098 | isym->st_name, | |
3099 | bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link, | |
3100 | isym->st_name), | |
3101 | isym->st_info, st_info_str, st_info_stb_str, | |
3102 | isym->st_other, st_other_str, | |
3103 | isym->st_shndx, st_shndx_str); | |
3104 | } | |
3105 | if (free_internal) | |
3106 | free (internal_syms); | |
3107 | if (free_external) | |
3108 | free (external_syms); | |
3109 | } | |
3110 | ||
3111 | char * | |
3112 | rx_get_reloc (long reloc) | |
3113 | { | |
3114 | if (0 <= reloc && reloc < R_RX_max) | |
3115 | return rx_elf_howto_table[reloc].name; | |
3116 | return ""; | |
3117 | } | |
3118 | #endif /* DEBUG */ | |
3119 | ||
3120 | \f | |
3121 | /* We must take care to keep the on-disk copy of any code sections | |
3122 | that are fully linked swapped if the target is big endian, to match | |
3123 | the Renesas tools. */ | |
3124 | ||
3125 | /* The rule is: big endian object that are final-link executables, | |
3126 | have code sections stored with 32-bit words swapped relative to | |
3127 | what you'd get by default. */ | |
3128 | ||
3129 | static bfd_boolean | |
3130 | rx_get_section_contents (bfd * abfd, | |
3131 | sec_ptr section, | |
3132 | void * location, | |
3133 | file_ptr offset, | |
3134 | bfd_size_type count) | |
3135 | { | |
3136 | int exec = (abfd->flags & EXEC_P) ? 1 : 0; | |
3137 | int s_code = (section->flags & SEC_CODE) ? 1 : 0; | |
3138 | bfd_boolean rv; | |
3139 | ||
3140 | #ifdef DJDEBUG | |
3141 | fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n", | |
3142 | (long) offset, (long) count, section->name, | |
3143 | bfd_big_endian(abfd) ? "be" : "le", | |
3144 | exec, s_code, (long unsigned) section->filepos, | |
3145 | (long unsigned) offset); | |
3146 | #endif | |
3147 | ||
3148 | if (exec && s_code && bfd_big_endian (abfd)) | |
3149 | { | |
3150 | char * cloc = (char *) location; | |
3151 | bfd_size_type cnt, end_cnt; | |
3152 | ||
3153 | rv = TRUE; | |
3154 | ||
3155 | /* Fetch and swap unaligned bytes at the beginning. */ | |
3156 | if (offset % 4) | |
3157 | { | |
3158 | char buf[4]; | |
3159 | ||
3160 | rv = _bfd_generic_get_section_contents (abfd, section, buf, | |
3161 | (offset & -4), 4); | |
3162 | if (!rv) | |
3163 | return FALSE; | |
3164 | ||
3165 | bfd_putb32 (bfd_getl32 (buf), buf); | |
3166 | ||
3167 | cnt = 4 - (offset % 4); | |
3168 | if (cnt > count) | |
3169 | cnt = count; | |
3170 | ||
3171 | memcpy (location, buf + (offset % 4), cnt); | |
3172 | ||
3173 | count -= cnt; | |
3174 | offset += cnt; | |
3175 | cloc += count; | |
3176 | } | |
3177 | ||
3178 | end_cnt = count % 4; | |
3179 | ||
3180 | /* Fetch and swap the middle bytes. */ | |
3181 | if (count >= 4) | |
3182 | { | |
3183 | rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset, | |
3184 | count - end_cnt); | |
3185 | if (!rv) | |
3186 | return FALSE; | |
3187 | ||
3188 | for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4) | |
3189 | bfd_putb32 (bfd_getl32 (cloc), cloc); | |
3190 | } | |
3191 | ||
3192 | /* Fetch and swap the end bytes. */ | |
3193 | if (end_cnt > 0) | |
3194 | { | |
3195 | char buf[4]; | |
3196 | ||
3197 | /* Fetch the end bytes. */ | |
3198 | rv = _bfd_generic_get_section_contents (abfd, section, buf, | |
3199 | offset + count - end_cnt, 4); | |
3200 | if (!rv) | |
3201 | return FALSE; | |
3202 | ||
3203 | bfd_putb32 (bfd_getl32 (buf), buf); | |
3204 | memcpy (cloc, buf, end_cnt); | |
3205 | } | |
3206 | } | |
3207 | else | |
3208 | rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count); | |
3209 | ||
3210 | return rv; | |
3211 | } | |
3212 | ||
3213 | #ifdef DJDEBUG | |
3214 | static bfd_boolean | |
3215 | rx2_set_section_contents (bfd * abfd, | |
3216 | sec_ptr section, | |
3217 | const void * location, | |
3218 | file_ptr offset, | |
3219 | bfd_size_type count) | |
3220 | { | |
3221 | bfd_size_type i; | |
3222 | ||
3223 | fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n", | |
3224 | section->name, (unsigned) section->vma, location, (int) offset, (int) count); | |
3225 | for (i = 0; i < count; i++) | |
3226 | { | |
3227 | if (i % 16 == 0 && i > 0) | |
3228 | fprintf (stderr, "\n"); | |
3229 | ||
3230 | if (i % 16 && i % 4 == 0) | |
3231 | fprintf (stderr, " "); | |
3232 | ||
3233 | if (i % 16 == 0) | |
3234 | fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); | |
3235 | ||
3236 | fprintf (stderr, " %02x", ((unsigned char *) location)[i]); | |
3237 | } | |
3238 | fprintf (stderr, "\n"); | |
3239 | ||
3240 | return _bfd_elf_set_section_contents (abfd, section, location, offset, count); | |
3241 | } | |
3242 | #define _bfd_elf_set_section_contents rx2_set_section_contents | |
3243 | #endif | |
3244 | ||
3245 | static bfd_boolean | |
3246 | rx_set_section_contents (bfd * abfd, | |
3247 | sec_ptr section, | |
3248 | const void * location, | |
3249 | file_ptr offset, | |
3250 | bfd_size_type count) | |
3251 | { | |
3252 | bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE; | |
3253 | bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE; | |
3254 | bfd_boolean rv; | |
3255 | char * swapped_data = NULL; | |
3256 | bfd_size_type i; | |
3257 | bfd_vma caddr = section->vma + offset; | |
3258 | file_ptr faddr = 0; | |
3259 | bfd_size_type scount; | |
3260 | ||
3261 | #ifdef DJDEBUG | |
3262 | bfd_size_type i; | |
3263 | ||
3264 | fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n", | |
3265 | (long) offset, (long) count, section->name, | |
3266 | bfd_big_endian (abfd) ? "be" : "le", | |
3267 | exec, s_code); | |
3268 | ||
3269 | for (i = 0; i < count; i++) | |
3270 | { | |
3271 | int a = section->vma + offset + i; | |
3272 | ||
3273 | if (a % 16 == 0 && a > 0) | |
3274 | fprintf (stderr, "\n"); | |
3275 | ||
3276 | if (a % 16 && a % 4 == 0) | |
3277 | fprintf (stderr, " "); | |
3278 | ||
3279 | if (a % 16 == 0 || i == 0) | |
3280 | fprintf (stderr, " %08x:", (int) (section->vma + offset + i)); | |
3281 | ||
3282 | fprintf (stderr, " %02x", ((unsigned char *) location)[i]); | |
3283 | } | |
3284 | ||
3285 | fprintf (stderr, "\n"); | |
3286 | #endif | |
3287 | ||
3288 | if (! exec || ! s_code || ! bfd_big_endian (abfd)) | |
3289 | return _bfd_elf_set_section_contents (abfd, section, location, offset, count); | |
3290 | ||
3291 | while (count > 0 && caddr > 0 && caddr % 4) | |
3292 | { | |
3293 | switch (caddr % 4) | |
3294 | { | |
3295 | case 0: faddr = offset + 3; break; | |
3296 | case 1: faddr = offset + 1; break; | |
3297 | case 2: faddr = offset - 1; break; | |
3298 | case 3: faddr = offset - 3; break; | |
3299 | } | |
3300 | ||
3301 | rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); | |
3302 | if (! rv) | |
3303 | return rv; | |
3304 | ||
3305 | location ++; | |
3306 | offset ++; | |
3307 | count --; | |
3308 | caddr ++; | |
3309 | } | |
3310 | ||
3311 | scount = (int)(count / 4) * 4; | |
3312 | if (scount > 0) | |
3313 | { | |
3314 | char * cloc = (char *) location; | |
3315 | ||
3316 | swapped_data = (char *) bfd_alloc (abfd, count); | |
3317 | ||
3318 | for (i = 0; i < count; i += 4) | |
3319 | { | |
3320 | bfd_vma v = bfd_getl32 (cloc + i); | |
3321 | bfd_putb32 (v, swapped_data + i); | |
3322 | } | |
3323 | ||
3324 | rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount); | |
3325 | ||
3326 | if (!rv) | |
3327 | return rv; | |
3328 | } | |
3329 | ||
3330 | count -= scount; | |
3331 | location += scount; | |
3332 | offset += scount; | |
3333 | ||
3334 | if (count > 0) | |
3335 | { | |
3336 | caddr = section->vma + offset; | |
3337 | while (count > 0) | |
3338 | { | |
3339 | switch (caddr % 4) | |
3340 | { | |
3341 | case 0: faddr = offset + 3; break; | |
3342 | case 1: faddr = offset + 1; break; | |
3343 | case 2: faddr = offset - 1; break; | |
3344 | case 3: faddr = offset - 3; break; | |
3345 | } | |
3346 | rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1); | |
3347 | if (! rv) | |
3348 | return rv; | |
3349 | ||
3350 | location ++; | |
3351 | offset ++; | |
3352 | count --; | |
3353 | caddr ++; | |
3354 | } | |
3355 | } | |
3356 | ||
3357 | return TRUE; | |
3358 | } | |
3359 | ||
3360 | static bfd_boolean | |
3361 | rx_final_link (bfd * abfd, struct bfd_link_info * info) | |
3362 | { | |
3363 | asection * o; | |
3364 | ||
3365 | for (o = abfd->sections; o != NULL; o = o->next) | |
3366 | { | |
3367 | #ifdef DJDEBUG | |
3368 | fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n", | |
3369 | o->name, o->flags, o->vma, o->lma, o->size, o->rawsize); | |
3370 | #endif | |
3371 | if (o->flags & SEC_CODE | |
3372 | && bfd_big_endian (abfd) | |
e57278ef | 3373 | && o->size % 4) |
c7927a3c NC |
3374 | { |
3375 | #ifdef DJDEBUG | |
3376 | fprintf (stderr, "adjusting...\n"); | |
3377 | #endif | |
3378 | o->size += 4 - (o->size % 4); | |
c7927a3c NC |
3379 | } |
3380 | } | |
3381 | ||
3382 | return bfd_elf_final_link (abfd, info); | |
3383 | } | |
3384 | ||
3385 | static bfd_boolean | |
3386 | elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED, | |
3387 | struct bfd_link_info * info ATTRIBUTE_UNUSED) | |
3388 | { | |
3389 | const struct elf_backend_data * bed; | |
3390 | struct elf_obj_tdata * tdata; | |
3391 | Elf_Internal_Phdr * phdr; | |
3392 | unsigned int count; | |
3393 | unsigned int i; | |
3394 | ||
3395 | bed = get_elf_backend_data (abfd); | |
3396 | tdata = elf_tdata (abfd); | |
3397 | phdr = tdata->phdr; | |
3398 | count = tdata->program_header_size / bed->s->sizeof_phdr; | |
3399 | ||
84bff83f NC |
3400 | if (ignore_lma) |
3401 | for (i = count; i-- != 0;) | |
3402 | if (phdr[i].p_type == PT_LOAD) | |
3403 | { | |
3404 | /* The Renesas tools expect p_paddr to be zero. However, | |
3405 | there is no other way to store the writable data in ROM for | |
3406 | startup initialization. So, we let the linker *think* | |
3407 | we're using paddr and vaddr the "usual" way, but at the | |
3408 | last minute we move the paddr into the vaddr (which is what | |
3409 | the simulator uses) and zero out paddr. Note that this | |
3410 | does not affect the section headers, just the program | |
3411 | headers. We hope. */ | |
c7927a3c | 3412 | phdr[i].p_vaddr = phdr[i].p_paddr; |
84bff83f | 3413 | #if 0 /* If we zero out p_paddr, then the LMA in the section table |
c7927a3c | 3414 | becomes wrong. */ |
84bff83f NC |
3415 | phdr[i].p_paddr = 0; |
3416 | #endif | |
3417 | } | |
c7927a3c NC |
3418 | |
3419 | return TRUE; | |
3420 | } | |
3421 | \f | |
3422 | #define ELF_ARCH bfd_arch_rx | |
3423 | #define ELF_MACHINE_CODE EM_RX | |
3424 | #define ELF_MAXPAGESIZE 0x1000 | |
3425 | ||
3426 | #define TARGET_BIG_SYM bfd_elf32_rx_be_vec | |
3427 | #define TARGET_BIG_NAME "elf32-rx-be" | |
3428 | ||
3429 | #define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec | |
3430 | #define TARGET_LITTLE_NAME "elf32-rx-le" | |
3431 | ||
3432 | #define elf_info_to_howto_rel NULL | |
3433 | #define elf_info_to_howto rx_info_to_howto_rela | |
3434 | #define elf_backend_object_p rx_elf_object_p | |
3435 | #define elf_backend_relocate_section rx_elf_relocate_section | |
3436 | #define elf_symbol_leading_char ('_') | |
3437 | #define elf_backend_can_gc_sections 1 | |
3438 | #define elf_backend_modify_program_headers elf32_rx_modify_program_headers | |
3439 | ||
3440 | #define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup | |
3441 | #define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup | |
3442 | #define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags | |
3443 | #define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data | |
3444 | #define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data | |
3445 | #define bfd_elf32_get_section_contents rx_get_section_contents | |
3446 | #define bfd_elf32_set_section_contents rx_set_section_contents | |
3447 | #define bfd_elf32_bfd_final_link rx_final_link | |
3448 | #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper | |
3449 | ||
3450 | #include "elf32-target.h" | |
4c422395 DD |
3451 | |
3452 | /* We define a second big-endian target that doesn't have the custom | |
3453 | section get/set hooks, for times when we want to preserve the | |
3454 | pre-swapped .text sections (like objcopy). */ | |
3455 | ||
3456 | #undef TARGET_BIG_SYM | |
3457 | #define TARGET_BIG_SYM bfd_elf32_rx_be_ns_vec | |
3458 | #undef TARGET_BIG_NAME | |
3459 | #define TARGET_BIG_NAME "elf32-rx-be-ns" | |
3460 | #undef TARGET_LITTLE_SYM | |
3461 | ||
3462 | #undef bfd_elf32_get_section_contents | |
3463 | #undef bfd_elf32_set_section_contents | |
3464 | ||
3465 | #undef elf32_bed | |
3466 | #define elf32_bed elf32_rx_be_ns_bed | |
3467 | ||
3468 | #include "elf32-target.h" |