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* config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible
[deliverable/binutils-gdb.git] / bfd / elf32-rx.c
CommitLineData
c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
c7e2358a 2 Copyright (C) 2008, 2009, 2010
c7927a3c
NC		 3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
27
28#define RX_OPCODE_BIG_ENDIAN 0
29
30#ifdef DEBUG
31char * rx_get_reloc (long);
9ccb8af9 32void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 33#endif
34
35#define RXREL(n,sz,bit,shift,complain,pcrel) \
36 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
37 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
38
39/* Note that the relocations around 0x7f are internal to this file;
40 feel free to move them as needed to avoid conflicts with published
41 relocation numbers. */
42
43static reloc_howto_type rx_elf_howto_table [] =
44{
45 RXREL (NONE, 0, 0, 0, dont, FALSE),
46 RXREL (DIR32, 2, 32, 0, signed, FALSE),
47 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
48 RXREL (DIR16, 1, 16, 0, dont, FALSE),
49 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
50 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
51 RXREL (DIR8, 0, 8, 0, dont, FALSE),
52 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
53 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
54 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
55 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
56 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
57 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
58 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
59 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
60 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
61 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
62 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
63 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
64
65 EMPTY_HOWTO (0x13),
66 EMPTY_HOWTO (0x14),
67 EMPTY_HOWTO (0x15),
68 EMPTY_HOWTO (0x16),
69 EMPTY_HOWTO (0x17),
70 EMPTY_HOWTO (0x18),
71 EMPTY_HOWTO (0x19),
72 EMPTY_HOWTO (0x1a),
73 EMPTY_HOWTO (0x1b),
74 EMPTY_HOWTO (0x1c),
75 EMPTY_HOWTO (0x1d),
76 EMPTY_HOWTO (0x1e),
77 EMPTY_HOWTO (0x1f),
78
79 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
80 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
81 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
82 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
83 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
84 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
85 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
86 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
87 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
88 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
89 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
90 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
91 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
92 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
93
94 EMPTY_HOWTO (0x2e),
95 EMPTY_HOWTO (0x2f),
96 EMPTY_HOWTO (0x30),
97 EMPTY_HOWTO (0x31),
98 EMPTY_HOWTO (0x32),
99 EMPTY_HOWTO (0x33),
100 EMPTY_HOWTO (0x34),
101 EMPTY_HOWTO (0x35),
102 EMPTY_HOWTO (0x36),
103 EMPTY_HOWTO (0x37),
104 EMPTY_HOWTO (0x38),
105 EMPTY_HOWTO (0x39),
106 EMPTY_HOWTO (0x3a),
107 EMPTY_HOWTO (0x3b),
108 EMPTY_HOWTO (0x3c),
109 EMPTY_HOWTO (0x3d),
110 EMPTY_HOWTO (0x3e),
111 EMPTY_HOWTO (0x3f),
112 EMPTY_HOWTO (0x40),
113
114 RXREL (ABS32, 2, 32, 0, dont, FALSE),
115 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
116 RXREL (ABS16, 1, 16, 0, dont, FALSE),
117 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
118 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
119 RXREL (ABS8, 0, 8, 0, dont, FALSE),
120 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
121 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
122 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
123 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
124 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
125 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
126 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
127 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
129 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
130 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
131
132#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
133
134 EMPTY_HOWTO (0x52),
135 EMPTY_HOWTO (0x53),
136 EMPTY_HOWTO (0x54),
137 EMPTY_HOWTO (0x55),
138 EMPTY_HOWTO (0x56),
139 EMPTY_HOWTO (0x57),
140 EMPTY_HOWTO (0x58),
141 EMPTY_HOWTO (0x59),
142 EMPTY_HOWTO (0x5a),
143 EMPTY_HOWTO (0x5b),
144 EMPTY_HOWTO (0x5c),
145 EMPTY_HOWTO (0x5d),
146 EMPTY_HOWTO (0x5e),
147 EMPTY_HOWTO (0x5f),
148 EMPTY_HOWTO (0x60),
149 EMPTY_HOWTO (0x61),
150 EMPTY_HOWTO (0x62),
151 EMPTY_HOWTO (0x63),
152 EMPTY_HOWTO (0x64),
153 EMPTY_HOWTO (0x65),
154 EMPTY_HOWTO (0x66),
155 EMPTY_HOWTO (0x67),
156 EMPTY_HOWTO (0x68),
157 EMPTY_HOWTO (0x69),
158 EMPTY_HOWTO (0x6a),
159 EMPTY_HOWTO (0x6b),
160 EMPTY_HOWTO (0x6c),
161 EMPTY_HOWTO (0x6d),
162 EMPTY_HOWTO (0x6e),
163 EMPTY_HOWTO (0x6f),
164 EMPTY_HOWTO (0x70),
165 EMPTY_HOWTO (0x71),
166 EMPTY_HOWTO (0x72),
167 EMPTY_HOWTO (0x73),
168 EMPTY_HOWTO (0x74),
169 EMPTY_HOWTO (0x75),
170 EMPTY_HOWTO (0x76),
171 EMPTY_HOWTO (0x77),
172
173 /* These are internal. */
174 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
175 /* ---- ---- 4--- 3210. */
176#define R_RX_RH_ABS5p8B 0x78
177 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
178#define R_RX_RH_ABS5p8W 0x79
179 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
180#define R_RX_RH_ABS5p8L 0x7a
181 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
182 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
183 /* ---- -432 1--- 0---. */
184#define R_RX_RH_ABS5p5B 0x7b
185 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
186#define R_RX_RH_ABS5p5W 0x7c
187 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
188#define R_RX_RH_ABS5p5L 0x7d
189 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
190 /* A 4-bit unsigned immediate at bit position 8. */
191#define R_RX_RH_UIMM4p8 0x7e
192 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
193 /* A 4-bit negative unsigned immediate at bit position 8. */
194#define R_RX_RH_UNEG4p8 0x7f
195 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
196 /* End of internal relocs. */
197
198 RXREL (SYM, 2, 32, 0, dont, FALSE),
199 RXREL (OPneg, 2, 32, 0, dont, FALSE),
200 RXREL (OPadd, 2, 32, 0, dont, FALSE),
201 RXREL (OPsub, 2, 32, 0, dont, FALSE),
202 RXREL (OPmul, 2, 32, 0, dont, FALSE),
203 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
204 RXREL (OPshla, 2, 32, 0, dont, FALSE),
205 RXREL (OPshra, 2, 32, 0, dont, FALSE),
206 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
207 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
208 RXREL (OPand, 2, 32, 0, dont, FALSE),
209 RXREL (OPor, 2, 32, 0, dont, FALSE),
210 RXREL (OPxor, 2, 32, 0, dont, FALSE),
211 RXREL (OPnot, 2, 32, 0, dont, FALSE),
212 RXREL (OPmod, 2, 32, 0, dont, FALSE),
213 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
214 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
215};
216\f
217/* Map BFD reloc types to RX ELF reloc types. */
218
219struct rx_reloc_map
220{
221 bfd_reloc_code_real_type bfd_reloc_val;
222 unsigned int rx_reloc_val;
223};
224
225static const struct rx_reloc_map rx_reloc_map [] =
226{
227 { BFD_RELOC_NONE, R_RX_NONE },
228 { BFD_RELOC_8, R_RX_DIR8S },
229 { BFD_RELOC_16, R_RX_DIR16S },
230 { BFD_RELOC_24, R_RX_DIR24S },
231 { BFD_RELOC_32, R_RX_DIR32 },
232 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
233 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
234 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
235 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
236 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
237 { BFD_RELOC_RX_8U, R_RX_DIR8U },
238 { BFD_RELOC_RX_16U, R_RX_DIR16U },
239 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
240 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
241 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
242 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
243 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
244 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
245 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
246 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
247 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
248 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
249 { BFD_RELOC_RX_SYM, R_RX_SYM },
250 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 251 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 252 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
253 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 254 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 255 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 256 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 257 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
258 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
259 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
260};
261
262#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
263
264static reloc_howto_type *
265rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
266 bfd_reloc_code_real_type code)
267{
268 unsigned int i;
269
270 if (code == BFD_RELOC_RX_32_OP)
271 return rx_elf_howto_table + R_RX_DIR32;
272
273 for (i = ARRAY_SIZE (rx_reloc_map); --i;)
274 if (rx_reloc_map [i].bfd_reloc_val == code)
275 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
276
277 return NULL;
278}
279
280static reloc_howto_type *
281rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
282{
283 unsigned int i;
284
285 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
286 if (rx_elf_howto_table[i].name != NULL
287 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
288 return rx_elf_howto_table + i;
289
290 return NULL;
291}
292
293/* Set the howto pointer for an RX ELF reloc. */
294
295static void
296rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
297 arelent * cache_ptr,
298 Elf_Internal_Rela * dst)
299{
300 unsigned int r_type;
301
302 r_type = ELF32_R_TYPE (dst->r_info);
303 BFD_ASSERT (r_type < (unsigned int) R_RX_max);
304 cache_ptr->howto = rx_elf_howto_table + r_type;
305}
306\f
307static bfd_vma
308get_symbol_value (const char * name,
91d6fa6a 309 bfd_reloc_status_type * status,
c7927a3c
NC		 310 struct bfd_link_info * info,
311 bfd * input_bfd,
312 asection * input_section,
313 int offset)
314{
315 bfd_vma value = 0;
316 struct bfd_link_hash_entry * h;
317
318 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
319
320 if (h == NULL
321 || (h->type != bfd_link_hash_defined
322 && h->type != bfd_link_hash_defweak))
91d6fa6a 323 * status = info->callbacks->undefined_symbol
c7927a3c
NC		 324 (info, name, input_bfd, input_section, offset, TRUE);
325 else
326 value = (h->u.def.value
327 + h->u.def.section->output_section->vma
328 + h->u.def.section->output_offset);
329
330 return value;
331}
332
333static bfd_vma
91d6fa6a 334get_gp (bfd_reloc_status_type * status,
c7927a3c
NC		 335 struct bfd_link_info * info,
336 bfd * abfd,
337 asection * sec,
338 int offset)
339{
340 static bfd_boolean cached = FALSE;
341 static bfd_vma cached_value = 0;
342
343 if (!cached)
344 {
91d6fa6a 345 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
c7927a3c
NC		 346 cached = TRUE;
347 }
348 return cached_value;
349}
350
351static bfd_vma
91d6fa6a 352get_romstart (bfd_reloc_status_type * status,
c7927a3c
NC		 353 struct bfd_link_info * info,
354 bfd * abfd,
355 asection * sec,
356 int offset)
357{
358 static bfd_boolean cached = FALSE;
359 static bfd_vma cached_value = 0;
360
361 if (!cached)
362 {
91d6fa6a 363 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
c7927a3c
NC		 364 cached = TRUE;
365 }
366 return cached_value;
367}
368
369static bfd_vma
91d6fa6a 370get_ramstart (bfd_reloc_status_type * status,
c7927a3c
NC		 371 struct bfd_link_info * info,
372 bfd * abfd,
373 asection * sec,
374 int offset)
375{
376 static bfd_boolean cached = FALSE;
377 static bfd_vma cached_value = 0;
378
379 if (!cached)
380 {
91d6fa6a 381 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
c7927a3c
NC		 382 cached = TRUE;
383 }
384 return cached_value;
385}
386
387#define NUM_STACK_ENTRIES 16
388static int32_t rx_stack [ NUM_STACK_ENTRIES ];
389static unsigned int rx_stack_top;
390
391#define RX_STACK_PUSH(val) \
392 do \
393 { \
394 if (rx_stack_top < NUM_STACK_ENTRIES) \
395 rx_stack [rx_stack_top ++] = (val); \
396 else \
397 r = bfd_reloc_dangerous; \
398 } \
399 while (0)
400
401#define RX_STACK_POP(dest) \
402 do \
403 { \
404 if (rx_stack_top > 0) \
405 (dest) = rx_stack [-- rx_stack_top]; \
406 else \
407 (dest) = 0, r = bfd_reloc_dangerous; \
408 } \
409 while (0)
410
411/* Relocate an RX ELF section.
412 There is some attempt to make this function usable for many architectures,
413 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
414 if only to serve as a learning tool.
415
416 The RELOCATE_SECTION function is called by the new ELF backend linker
417 to handle the relocations for a section.
418
419 The relocs are always passed as Rela structures; if the section
420 actually uses Rel structures, the r_addend field will always be
421 zero.
422
423 This function is responsible for adjusting the section contents as
424 necessary, and (if using Rela relocs and generating a relocatable
425 output file) adjusting the reloc addend as necessary.
426
427 This function does not have to worry about setting the reloc
428 address or the reloc symbol index.
429
430 LOCAL_SYMS is a pointer to the swapped in local symbols.
431
432 LOCAL_SECTIONS is an array giving the section in the input file
433 corresponding to the st_shndx field of each local symbol.
434
435 The global hash table entry for the global symbols can be found
436 via elf_sym_hashes (input_bfd).
437
438 When generating relocatable output, this function must handle
439 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
440 going to be the section symbol corresponding to the output
441 section, which means that the addend must be adjusted
442 accordingly. */
443
444static bfd_boolean
445rx_elf_relocate_section
446 (bfd * output_bfd,
447 struct bfd_link_info * info,
448 bfd * input_bfd,
449 asection * input_section,
450 bfd_byte * contents,
451 Elf_Internal_Rela * relocs,
452 Elf_Internal_Sym * local_syms,
453 asection ** local_sections)
454{
455 Elf_Internal_Shdr * symtab_hdr;
456 struct elf_link_hash_entry ** sym_hashes;
457 Elf_Internal_Rela * rel;
458 Elf_Internal_Rela * relend;
c7927a3c
NC		 459
460 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
461 sym_hashes = elf_sym_hashes (input_bfd);
462 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 463 for (rel = relocs; rel < relend; rel ++)
464 {
465 reloc_howto_type * howto;
466 unsigned long r_symndx;
467 Elf_Internal_Sym * sym;
468 asection * sec;
469 struct elf_link_hash_entry * h;
470 bfd_vma relocation;
471 bfd_reloc_status_type r;
472 const char * name = NULL;
473 bfd_boolean unresolved_reloc = TRUE;
474 int r_type;
475
476 r_type = ELF32_R_TYPE (rel->r_info);
477 r_symndx = ELF32_R_SYM (rel->r_info);
478
479 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
480 h = NULL;
481 sym = NULL;
482 sec = NULL;
483 relocation = 0;
484
485 if (r_symndx < symtab_hdr->sh_info)
486 {
487 sym = local_syms + r_symndx;
488 sec = local_sections [r_symndx];
489 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
490
491 name = bfd_elf_string_from_elf_section
492 (input_bfd, symtab_hdr->sh_link, sym->st_name);
493 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
494 }
495 else
496 {
497 bfd_boolean warned;
498
499 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
500 r_symndx, symtab_hdr, sym_hashes, h,
501 sec, relocation, unresolved_reloc,
502 warned);
503
504 name = h->root.root.string;
505 }
506
507 if (sec != NULL && elf_discarded_section (sec))
e4067dbb
DJ		 508 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
509 rel, relend, howto, contents);
c7927a3c
NC		 510
511 if (info->relocatable)
512 {
513 /* This is a relocatable link. We don't have to change
514 anything, unless the reloc is against a section symbol,
515 in which case we have to adjust according to where the
516 section symbol winds up in the output section. */
517 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
518 rel->r_addend += sec->output_offset;
519 continue;
520 }
521
522 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
523 /* If the symbol is undefined and weak
524 then the relocation resolves to zero. */
525 relocation = 0;
526 else
527 {
528 if (howto->pc_relative)
529 {
530 relocation -= (input_section->output_section->vma
531 + input_section->output_offset
532 + rel->r_offset);
533 if (r_type != R_RX_RH_3_PCREL
534 && r_type != R_RX_DIR3U_PCREL)
535 relocation ++;
536 }
537
538 relocation += rel->r_addend;
539 }
540
541 r = bfd_reloc_ok;
542
543#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
544#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
545#define OP(i) (contents[rel->r_offset + (i)])
546#define WARN_REDHAT(type) \
547 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
548 input_bfd, input_section, name)
549
550 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
551 switch (r_type)
552 {
553 case R_RX_NONE:
554 break;
555
556 case R_RX_RH_RELAX:
557 break;
558
559 case R_RX_RH_3_PCREL:
560 WARN_REDHAT ("RX_RH_3_PCREL");
561 RANGE (3, 10);
562 OP (0) &= 0xf8;
563 OP (0) |= relocation & 0x07;
564 break;
565
566 case R_RX_RH_8_NEG:
567 WARN_REDHAT ("RX_RH_8_NEG");
568 relocation = - relocation;
569 case R_RX_DIR8S_PCREL:
570 RANGE (-128, 127);
571 OP (0) = relocation;
572 break;
573
574 case R_RX_DIR8S:
575 RANGE (-128, 255);
576 OP (0) = relocation;
577 break;
578
579 case R_RX_DIR8U:
580 RANGE (0, 255);
581 OP (0) = relocation;
582 break;
583
584 case R_RX_RH_16_NEG:
585 WARN_REDHAT ("RX_RH_16_NEG");
586 relocation = - relocation;
587 case R_RX_DIR16S_PCREL:
588 RANGE (-32768, 32767);
589#if RX_OPCODE_BIG_ENDIAN
590#else
591 OP (0) = relocation;
592 OP (1) = relocation >> 8;
593#endif
594 break;
595
596 case R_RX_RH_16_OP:
597 WARN_REDHAT ("RX_RH_16_OP");
598 RANGE (-32768, 32767);
599#if RX_OPCODE_BIG_ENDIAN
600 OP (1) = relocation;
601 OP (0) = relocation >> 8;
602#else
603 OP (0) = relocation;
604 OP (1) = relocation >> 8;
605#endif
606 break;
607
608 case R_RX_DIR16S:
609 RANGE (-32768, 65535);
610 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
611 {
612 OP (1) = relocation;
613 OP (0) = relocation >> 8;
614 }
615 else
616 {
617 OP (0) = relocation;
618 OP (1) = relocation >> 8;
619 }
620 break;
621
622 case R_RX_DIR16U:
623 RANGE (0, 65536);
624#if RX_OPCODE_BIG_ENDIAN
625 OP (1) = relocation;
626 OP (0) = relocation >> 8;
627#else
628 OP (0) = relocation;
629 OP (1) = relocation >> 8;
630#endif
631 break;
632
633 case R_RX_DIR16:
634 RANGE (-32768, 65536);
635#if RX_OPCODE_BIG_ENDIAN
636 OP (1) = relocation;
637 OP (0) = relocation >> 8;
638#else
639 OP (0) = relocation;
640 OP (1) = relocation >> 8;
641#endif
642 break;
643
644 case R_RX_DIR16_REV:
645 RANGE (-32768, 65536);
646#if RX_OPCODE_BIG_ENDIAN
647 OP (0) = relocation;
648 OP (1) = relocation >> 8;
649#else
650 OP (1) = relocation;
651 OP (0) = relocation >> 8;
652#endif
653 break;
654
655 case R_RX_DIR3U_PCREL:
656 RANGE (3, 10);
657 OP (0) &= 0xf8;
658 OP (0) |= relocation & 0x07;
659 break;
660
661 case R_RX_RH_24_NEG:
662 WARN_REDHAT ("RX_RH_24_NEG");
663 relocation = - relocation;
664 case R_RX_DIR24S_PCREL:
665 RANGE (-0x800000, 0x7fffff);
666#if RX_OPCODE_BIG_ENDIAN
667 OP (2) = relocation;
668 OP (1) = relocation >> 8;
669 OP (0) = relocation >> 16;
670#else
671 OP (0) = relocation;
672 OP (1) = relocation >> 8;
673 OP (2) = relocation >> 16;
674#endif
675 break;
676
677 case R_RX_RH_24_OP:
678 WARN_REDHAT ("RX_RH_24_OP");
679 RANGE (-0x800000, 0x7fffff);
680#if RX_OPCODE_BIG_ENDIAN
681 OP (2) = relocation;
682 OP (1) = relocation >> 8;
683 OP (0) = relocation >> 16;
684#else
685 OP (0) = relocation;
686 OP (1) = relocation >> 8;
687 OP (2) = relocation >> 16;
688#endif
689 break;
690
691 case R_RX_DIR24S:
692 RANGE (-0x800000, 0x7fffff);
693 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
694 {
695 OP (2) = relocation;
696 OP (1) = relocation >> 8;
697 OP (0) = relocation >> 16;
698 }
699 else
700 {
701 OP (0) = relocation;
702 OP (1) = relocation >> 8;
703 OP (2) = relocation >> 16;
704 }
705 break;
706
707 case R_RX_RH_24_UNS:
708 WARN_REDHAT ("RX_RH_24_UNS");
709 RANGE (0, 0xffffff);
710#if RX_OPCODE_BIG_ENDIAN
711 OP (2) = relocation;
712 OP (1) = relocation >> 8;
713 OP (0) = relocation >> 16;
714#else
715 OP (0) = relocation;
716 OP (1) = relocation >> 8;
717 OP (2) = relocation >> 16;
718#endif
719 break;
720
721 case R_RX_RH_32_NEG:
722 WARN_REDHAT ("RX_RH_32_NEG");
723 relocation = - relocation;
724#if RX_OPCODE_BIG_ENDIAN
725 OP (3) = relocation;
726 OP (2) = relocation >> 8;
727 OP (1) = relocation >> 16;
728 OP (0) = relocation >> 24;
729#else
730 OP (0) = relocation;
731 OP (1) = relocation >> 8;
732 OP (2) = relocation >> 16;
733 OP (3) = relocation >> 24;
734#endif
735 break;
736
737 case R_RX_RH_32_OP:
738 WARN_REDHAT ("RX_RH_32_OP");
739#if RX_OPCODE_BIG_ENDIAN
740 OP (3) = relocation;
741 OP (2) = relocation >> 8;
742 OP (1) = relocation >> 16;
743 OP (0) = relocation >> 24;
744#else
745 OP (0) = relocation;
746 OP (1) = relocation >> 8;
747 OP (2) = relocation >> 16;
748 OP (3) = relocation >> 24;
749#endif
750 break;
751
752 case R_RX_DIR32:
753 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
754 {
755 OP (3) = relocation;
756 OP (2) = relocation >> 8;
757 OP (1) = relocation >> 16;
758 OP (0) = relocation >> 24;
759 }
760 else
761 {
762 OP (0) = relocation;
763 OP (1) = relocation >> 8;
764 OP (2) = relocation >> 16;
765 OP (3) = relocation >> 24;
766 }
767 break;
768
769 case R_RX_DIR32_REV:
770 if (BIGE (output_bfd))
771 {
772 OP (0) = relocation;
773 OP (1) = relocation >> 8;
774 OP (2) = relocation >> 16;
775 OP (3) = relocation >> 24;
776 }
777 else
778 {
779 OP (3) = relocation;
780 OP (2) = relocation >> 8;
781 OP (1) = relocation >> 16;
782 OP (0) = relocation >> 24;
783 }
784 break;
785
786 case R_RX_RH_DIFF:
787 {
788 bfd_vma val;
789 WARN_REDHAT ("RX_RH_DIFF");
790 val = bfd_get_32 (output_bfd, & OP (0));
791 val -= relocation;
792 bfd_put_32 (output_bfd, val, & OP (0));
793 }
794 break;
795
796 case R_RX_RH_GPRELB:
797 WARN_REDHAT ("RX_RH_GPRELB");
798 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
799 RANGE (0, 65535);
800#if RX_OPCODE_BIG_ENDIAN
801 OP (1) = relocation;
802 OP (0) = relocation >> 8;
803#else
804 OP (0) = relocation;
805 OP (1) = relocation >> 8;
806#endif
807 break;
808
809 case R_RX_RH_GPRELW:
810 WARN_REDHAT ("RX_RH_GPRELW");
811 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
812 ALIGN (1);
813 relocation >>= 1;
814 RANGE (0, 65535);
815#if RX_OPCODE_BIG_ENDIAN
816 OP (1) = relocation;
817 OP (0) = relocation >> 8;
818#else
819 OP (0) = relocation;
820 OP (1) = relocation >> 8;
821#endif
822 break;
823
824 case R_RX_RH_GPRELL:
825 WARN_REDHAT ("RX_RH_GPRELL");
826 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
827 ALIGN (3);
828 relocation >>= 2;
829 RANGE (0, 65535);
830#if RX_OPCODE_BIG_ENDIAN
831 OP (1) = relocation;
832 OP (0) = relocation >> 8;
833#else
834 OP (0) = relocation;
835 OP (1) = relocation >> 8;
836#endif
837 break;
838
839 /* Internal relocations just for relaxation: */
840 case R_RX_RH_ABS5p5B:
841 RX_STACK_POP (relocation);
842 RANGE (0, 31);
843 OP (0) &= 0xf8;
844 OP (0) |= relocation >> 2;
845 OP (1) &= 0x77;
846 OP (1) |= (relocation << 6) & 0x80;
847 OP (1) |= (relocation << 3) & 0x08;
848 break;
849
850 case R_RX_RH_ABS5p5W:
851 RX_STACK_POP (relocation);
852 RANGE (0, 62);
853 ALIGN (1);
854 relocation >>= 1;
855 OP (0) &= 0xf8;
856 OP (0) |= relocation >> 2;
857 OP (1) &= 0x77;
858 OP (1) |= (relocation << 6) & 0x80;
859 OP (1) |= (relocation << 3) & 0x08;
860 break;
861
862 case R_RX_RH_ABS5p5L:
863 RX_STACK_POP (relocation);
864 RANGE (0, 124);
865 ALIGN (3);
866 relocation >>= 2;
867 OP (0) &= 0xf8;
868 OP (0) |= relocation >> 2;
869 OP (1) &= 0x77;
870 OP (1) |= (relocation << 6) & 0x80;
871 OP (1) |= (relocation << 3) & 0x08;
872 break;
873
874 case R_RX_RH_ABS5p8B:
875 RX_STACK_POP (relocation);
876 RANGE (0, 31);
877 OP (0) &= 0x70;
878 OP (0) |= (relocation << 3) & 0x80;
879 OP (0) |= relocation & 0x0f;
880 break;
881
882 case R_RX_RH_ABS5p8W:
883 RX_STACK_POP (relocation);
884 RANGE (0, 62);
885 ALIGN (1);
886 relocation >>= 1;
887 OP (0) &= 0x70;
888 OP (0) |= (relocation << 3) & 0x80;
889 OP (0) |= relocation & 0x0f;
890 break;
891
892 case R_RX_RH_ABS5p8L:
893 RX_STACK_POP (relocation);
894 RANGE (0, 124);
895 ALIGN (3);
896 relocation >>= 2;
897 OP (0) &= 0x70;
898 OP (0) |= (relocation << 3) & 0x80;
899 OP (0) |= relocation & 0x0f;
900 break;
901
902 case R_RX_RH_UIMM4p8:
903 RANGE (0, 15);
904 OP (0) &= 0x0f;
905 OP (0) |= relocation << 4;
906 break;
907
908 case R_RX_RH_UNEG4p8:
909 RANGE (-15, 0);
910 OP (0) &= 0x0f;
911 OP (0) |= (-relocation) << 4;
912 break;
913
914 /* Complex reloc handling: */
915
916 case R_RX_ABS32:
917 RX_STACK_POP (relocation);
918#if RX_OPCODE_BIG_ENDIAN
919 OP (3) = relocation;
920 OP (2) = relocation >> 8;
921 OP (1) = relocation >> 16;
922 OP (0) = relocation >> 24;
923#else
924 OP (0) = relocation;
925 OP (1) = relocation >> 8;
926 OP (2) = relocation >> 16;
927 OP (3) = relocation >> 24;
928#endif
929 break;
930
931 case R_RX_ABS32_REV:
932 RX_STACK_POP (relocation);
933#if RX_OPCODE_BIG_ENDIAN
934 OP (0) = relocation;
935 OP (1) = relocation >> 8;
936 OP (2) = relocation >> 16;
937 OP (3) = relocation >> 24;
938#else
939 OP (3) = relocation;
940 OP (2) = relocation >> 8;
941 OP (1) = relocation >> 16;
942 OP (0) = relocation >> 24;
943#endif
944 break;
945
946 case R_RX_ABS24S_PCREL:
947 case R_RX_ABS24S:
948 RX_STACK_POP (relocation);
949 RANGE (-0x800000, 0x7fffff);
950 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
951 {
952 OP (2) = relocation;
953 OP (1) = relocation >> 8;
954 OP (0) = relocation >> 16;
955 }
956 else
957 {
958 OP (0) = relocation;
959 OP (1) = relocation >> 8;
960 OP (2) = relocation >> 16;
961 }
962 break;
963
964 case R_RX_ABS16:
965 RX_STACK_POP (relocation);
966 RANGE (-32768, 65535);
967#if RX_OPCODE_BIG_ENDIAN
968 OP (1) = relocation;
969 OP (0) = relocation >> 8;
970#else
971 OP (0) = relocation;
972 OP (1) = relocation >> 8;
973#endif
974 break;
975
976 case R_RX_ABS16_REV:
977 RX_STACK_POP (relocation);
978 RANGE (-32768, 65535);
979#if RX_OPCODE_BIG_ENDIAN
980 OP (0) = relocation;
981 OP (1) = relocation >> 8;
982#else
983 OP (1) = relocation;
984 OP (0) = relocation >> 8;
985#endif
986 break;
987
988 case R_RX_ABS16S_PCREL:
989 case R_RX_ABS16S:
990 RX_STACK_POP (relocation);
991 RANGE (-32768, 32767);
992 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
993 {
994 OP (1) = relocation;
995 OP (0) = relocation >> 8;
996 }
997 else
998 {
999 OP (0) = relocation;
1000 OP (1) = relocation >> 8;
1001 }
1002 break;
1003
1004 case R_RX_ABS16U:
1005 RX_STACK_POP (relocation);
1006 RANGE (0, 65536);
1007#if RX_OPCODE_BIG_ENDIAN
1008 OP (1) = relocation;
1009 OP (0) = relocation >> 8;
1010#else
1011 OP (0) = relocation;
1012 OP (1) = relocation >> 8;
1013#endif
1014 break;
1015
1016 case R_RX_ABS16UL:
1017 RX_STACK_POP (relocation);
1018 relocation >>= 2;
1019 RANGE (0, 65536);
1020#if RX_OPCODE_BIG_ENDIAN
1021 OP (1) = relocation;
1022 OP (0) = relocation >> 8;
1023#else
1024 OP (0) = relocation;
1025 OP (1) = relocation >> 8;
1026#endif
1027 break;
1028
1029 case R_RX_ABS16UW:
1030 RX_STACK_POP (relocation);
1031 relocation >>= 1;
1032 RANGE (0, 65536);
1033#if RX_OPCODE_BIG_ENDIAN
1034 OP (1) = relocation;
1035 OP (0) = relocation >> 8;
1036#else
1037 OP (0) = relocation;
1038 OP (1) = relocation >> 8;
1039#endif
1040 break;
1041
1042 case R_RX_ABS8:
1043 RX_STACK_POP (relocation);
1044 RANGE (-128, 255);
1045 OP (0) = relocation;
1046 break;
1047
1048 case R_RX_ABS8U:
1049 RX_STACK_POP (relocation);
1050 RANGE (0, 255);
1051 OP (0) = relocation;
1052 break;
1053
1054 case R_RX_ABS8UL:
1055 RX_STACK_POP (relocation);
1056 relocation >>= 2;
1057 RANGE (0, 255);
1058 OP (0) = relocation;
1059 break;
1060
1061 case R_RX_ABS8UW:
1062 RX_STACK_POP (relocation);
1063 relocation >>= 1;
1064 RANGE (0, 255);
1065 OP (0) = relocation;
1066 break;
1067
1068 case R_RX_ABS8S_PCREL:
1069 case R_RX_ABS8S:
1070 RX_STACK_POP (relocation);
1071 RANGE (-128, 127);
1072 OP (0) = relocation;
1073 break;
1074
1075 case R_RX_SYM:
1076 if (r_symndx < symtab_hdr->sh_info)
1077 RX_STACK_PUSH (sec->output_section->vma
1078 + sec->output_offset
1079 + sym->st_value);
1080 else
1081 {
1082 if (h != NULL
1083 && (h->root.type == bfd_link_hash_defined
1084 || h->root.type == bfd_link_hash_defweak))
1085 RX_STACK_PUSH (h->root.u.def.value
1086 + sec->output_section->vma
1087 + sec->output_offset);
1088 else
1089 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1090 }
1091 break;
1092
1093 case R_RX_OPneg:
1094 {
1095 int32_t tmp;
1096
1097 RX_STACK_POP (tmp);
1098 tmp = - tmp;
1099 RX_STACK_PUSH (tmp);
1100 }
1101 break;
1102
1103 case R_RX_OPadd:
1104 {
1105 int32_t tmp1, tmp2;
1106
1107 RX_STACK_POP (tmp1);
1108 RX_STACK_POP (tmp2);
1109 tmp1 += tmp2;
1110 RX_STACK_PUSH (tmp1);
1111 }
1112 break;
1113
1114 case R_RX_OPsub:
1115 {
1116 int32_t tmp1, tmp2;
1117
1118 RX_STACK_POP (tmp1);
1119 RX_STACK_POP (tmp2);
1120 tmp2 -= tmp1;
1121 RX_STACK_PUSH (tmp2);
1122 }
1123 break;
1124
1125 case R_RX_OPmul:
1126 {
1127 int32_t tmp1, tmp2;
1128
1129 RX_STACK_POP (tmp1);
1130 RX_STACK_POP (tmp2);
1131 tmp1 *= tmp2;
1132 RX_STACK_PUSH (tmp1);
1133 }
1134 break;
1135
1136 case R_RX_OPdiv:
1137 {
1138 int32_t tmp1, tmp2;
1139
1140 RX_STACK_POP (tmp1);
1141 RX_STACK_POP (tmp2);
1142 tmp1 /= tmp2;
1143 RX_STACK_PUSH (tmp1);
1144 }
1145 break;
1146
1147 case R_RX_OPshla:
1148 {
1149 int32_t tmp1, tmp2;
1150
1151 RX_STACK_POP (tmp1);
1152 RX_STACK_POP (tmp2);
1153 tmp1 <<= tmp2;
1154 RX_STACK_PUSH (tmp1);
1155 }
1156 break;
1157
1158 case R_RX_OPshra:
1159 {
1160 int32_t tmp1, tmp2;
1161
1162 RX_STACK_POP (tmp1);
1163 RX_STACK_POP (tmp2);
1164 tmp1 >>= tmp2;
1165 RX_STACK_PUSH (tmp1);
1166 }
1167 break;
1168
1169 case R_RX_OPsctsize:
1170 RX_STACK_PUSH (input_section->size);
1171 break;
1172
1173 case R_RX_OPscttop:
1174 RX_STACK_PUSH (input_section->output_section->vma);
1175 break;
1176
1177 case R_RX_OPand:
1178 {
1179 int32_t tmp1, tmp2;
1180
1181 RX_STACK_POP (tmp1);
1182 RX_STACK_POP (tmp2);
1183 tmp1 &= tmp2;
1184 RX_STACK_PUSH (tmp1);
1185 }
1186 break;
1187
1188 case R_RX_OPor:
1189 {
1190 int32_t tmp1, tmp2;
1191
1192 RX_STACK_POP (tmp1);
1193 RX_STACK_POP (tmp2);
1194 tmp1 |= tmp2;
1195 RX_STACK_PUSH (tmp1);
1196 }
1197 break;
1198
1199 case R_RX_OPxor:
1200 {
1201 int32_t tmp1, tmp2;
1202
1203 RX_STACK_POP (tmp1);
1204 RX_STACK_POP (tmp2);
1205 tmp1 ^= tmp2;
1206 RX_STACK_PUSH (tmp1);
1207 }
1208 break;
1209
1210 case R_RX_OPnot:
1211 {
1212 int32_t tmp;
1213
1214 RX_STACK_POP (tmp);
1215 tmp = ~ tmp;
1216 RX_STACK_PUSH (tmp);
1217 }
1218 break;
1219
1220 case R_RX_OPmod:
1221 {
1222 int32_t tmp1, tmp2;
1223
1224 RX_STACK_POP (tmp1);
1225 RX_STACK_POP (tmp2);
1226 tmp1 %= tmp2;
1227 RX_STACK_PUSH (tmp1);
1228 }
1229 break;
1230
1231 case R_RX_OPromtop:
1232 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1233 break;
1234
1235 case R_RX_OPramtop:
1236 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1237 break;
1238
1239 default:
1240 r = bfd_reloc_notsupported;
1241 break;
1242 }
1243
1244 if (r != bfd_reloc_ok)
1245 {
1246 const char * msg = NULL;
1247
1248 switch (r)
1249 {
1250 case bfd_reloc_overflow:
1251 /* Catch the case of a missing function declaration
1252 and emit a more helpful error message. */
1253 if (r_type == R_RX_DIR24S_PCREL)
1254 msg = _("%B(%A): error: call to undefined function '%s'");
1255 else
1256 r = info->callbacks->reloc_overflow
1257 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1258 input_bfd, input_section, rel->r_offset);
1259 break;
1260
1261 case bfd_reloc_undefined:
1262 r = info->callbacks->undefined_symbol
1263 (info, name, input_bfd, input_section, rel->r_offset,
1264 TRUE);
1265 break;
1266
1267 case bfd_reloc_other:
1268 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1269 break;
1270
1271 case bfd_reloc_outofrange:
1272 msg = _("%B(%A): internal error: out of range error");
1273 break;
1274
1275 case bfd_reloc_notsupported:
1276 msg = _("%B(%A): internal error: unsupported relocation error");
1277 break;
1278
1279 case bfd_reloc_dangerous:
1280 msg = _("%B(%A): internal error: dangerous relocation");
1281 break;
1282
1283 default:
1284 msg = _("%B(%A): internal error: unknown error");
1285 break;
1286 }
1287
1288 if (msg)
1289 _bfd_error_handler (msg, input_bfd, input_section, name);
1290
1291 if (! r)
1292 return FALSE;
1293 }
1294 }
1295
1296 return TRUE;
1297}
1298\f
1299/* Relaxation Support. */
1300
1301/* Progression of relocations from largest operand size to smallest
1302 operand size. */
1303
1304static int
1305next_smaller_reloc (int r)
1306{
1307 switch (r)
1308 {
1309 case R_RX_DIR32: return R_RX_DIR24S;
1310 case R_RX_DIR24S: return R_RX_DIR16S;
1311 case R_RX_DIR16S: return R_RX_DIR8S;
1312 case R_RX_DIR8S: return R_RX_NONE;
1313
1314 case R_RX_DIR16: return R_RX_DIR8;
1315 case R_RX_DIR8: return R_RX_NONE;
1316
1317 case R_RX_DIR16U: return R_RX_DIR8U;
1318 case R_RX_DIR8U: return R_RX_NONE;
1319
1320 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1321 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1322 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1323
1324 case R_RX_DIR16UL: return R_RX_DIR8UL;
1325 case R_RX_DIR8UL: return R_RX_NONE;
1326 case R_RX_DIR16UW: return R_RX_DIR8UW;
1327 case R_RX_DIR8UW: return R_RX_NONE;
1328
1329 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1330 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1331 case R_RX_RH_16_OP: return R_RX_DIR8;
1332
1333 case R_RX_ABS32: return R_RX_ABS24S;
1334 case R_RX_ABS24S: return R_RX_ABS16S;
1335 case R_RX_ABS16: return R_RX_ABS8;
1336 case R_RX_ABS16U: return R_RX_ABS8U;
1337 case R_RX_ABS16S: return R_RX_ABS8S;
1338 case R_RX_ABS8: return R_RX_NONE;
1339 case R_RX_ABS8U: return R_RX_NONE;
1340 case R_RX_ABS8S: return R_RX_NONE;
1341 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1342 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1343 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1344 case R_RX_ABS16UL: return R_RX_ABS8UL;
1345 case R_RX_ABS16UW: return R_RX_ABS8UW;
1346 case R_RX_ABS8UL: return R_RX_NONE;
1347 case R_RX_ABS8UW: return R_RX_NONE;
1348 }
1349 return r;
1350};
1351
1352/* Delete some bytes from a section while relaxing. */
1353
1354static bfd_boolean
1355elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1356 Elf_Internal_Rela *alignment_rel, int force_snip)
1357{
1358 Elf_Internal_Shdr * symtab_hdr;
1359 unsigned int sec_shndx;
1360 bfd_byte * contents;
1361 Elf_Internal_Rela * irel;
1362 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1363 Elf_Internal_Sym * isym;
1364 Elf_Internal_Sym * isymend;
1365 bfd_vma toaddr;
1366 unsigned int symcount;
1367 struct elf_link_hash_entry ** sym_hashes;
1368 struct elf_link_hash_entry ** end_hashes;
1369
1370 if (!alignment_rel)
1371 force_snip = 1;
1372
1373 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1374
1375 contents = elf_section_data (sec)->this_hdr.contents;
1376
1377 /* The deletion must stop at the next alignment boundary, if
1378 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1379 toaddr = sec->size;
1380 if (alignment_rel)
1381 toaddr = alignment_rel->r_offset;
1382
1383 irel = elf_section_data (sec)->relocs;
1384 irelend = irel + sec->reloc_count;
1385
1386 /* Actually delete the bytes. */
1387 memmove (contents + addr, contents + addr + count,
1388 (size_t) (toaddr - addr - count));
1389
1390 /* If we don't have an alignment marker to worry about, we can just
1391 shrink the section. Otherwise, we have to fill in the newly
1392 created gap with NOP insns (0x03). */
1393 if (force_snip)
1394 sec->size -= count;
1395 else
1396 memset (contents + toaddr - count, 0x03, count);
1397
1398 /* Adjust all the relocs. */
1399 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1400 {
1401 /* Get the new reloc address. */
1402 if (irel->r_offset > addr
1403 && (irel->r_offset < toaddr
1404 || (force_snip && irel->r_offset == toaddr)))
1405 irel->r_offset -= count;
1406
1407 /* If we see an ALIGN marker at the end of the gap, we move it
1408 to the beginning of the gap, since marking these gaps is what
1409 they're for. */
1410 if (irel->r_offset == toaddr
1411 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1412 && irel->r_addend & RX_RELAXA_ALIGN)
1413 irel->r_offset -= count;
1414 }
1415
1416 /* Adjust the local symbols defined in this section. */
1417 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1418 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1419 isymend = isym + symtab_hdr->sh_info;
1420
1421 for (; isym < isymend; isym++)
1422 {
1423 /* If the symbol is in the range of memory we just moved, we
1424 have to adjust its value. */
1425 if (isym->st_shndx == sec_shndx
1426 && isym->st_value > addr
1427 && isym->st_value < toaddr)
1428 isym->st_value -= count;
1429
1430 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1431 *end* is in the moved bytes but it's *start* isn't), then we
1432 must adjust its size. */
1433 if (isym->st_shndx == sec_shndx
1434 && isym->st_value < addr
1435 && isym->st_value + isym->st_size > addr
1436 && isym->st_value + isym->st_size < toaddr)
1437 isym->st_size -= count;
1438 }
1439
1440 /* Now adjust the global symbols defined in this section. */
1441 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1442 - symtab_hdr->sh_info);
1443 sym_hashes = elf_sym_hashes (abfd);
1444 end_hashes = sym_hashes + symcount;
1445
1446 for (; sym_hashes < end_hashes; sym_hashes++)
1447 {
1448 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1449
1450 if ((sym_hash->root.type == bfd_link_hash_defined
1451 || sym_hash->root.type == bfd_link_hash_defweak)
1452 && sym_hash->root.u.def.section == sec)
1453 {
1454 /* As above, adjust the value if needed. */
1455 if (sym_hash->root.u.def.value > addr
1456 && sym_hash->root.u.def.value < toaddr)
1457 sym_hash->root.u.def.value -= count;
1458
1459 /* As above, adjust the size if needed. */
1460 if (sym_hash->root.u.def.value < addr
1461 && sym_hash->root.u.def.value + sym_hash->size > addr
1462 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1463 sym_hash->size -= count;
1464 }
1465 }
1466
1467 return TRUE;
1468}
1469
1470/* Used to sort relocs by address. If relocs have the same address,
1471 we maintain their relative order, except that R_RX_RH_RELAX
1472 alignment relocs must be the first reloc for any given address. */
1473
1474static void
1475reloc_bubblesort (Elf_Internal_Rela * r, int count)
1476{
1477 int i;
1478 bfd_boolean again;
1479 bfd_boolean swappit;
1480
1481 /* This is almost a classic bubblesort. It's the slowest sort, but
1482 we're taking advantage of the fact that the relocations are
1483 mostly in order already (the assembler emits them that way) and
1484 we need relocs with the same address to remain in the same
1485 relative order. */
1486 again = TRUE;
1487 while (again)
1488 {
1489 again = FALSE;
1490 for (i = 0; i < count - 1; i ++)
1491 {
1492 if (r[i].r_offset > r[i + 1].r_offset)
1493 swappit = TRUE;
1494 else if (r[i].r_offset < r[i + 1].r_offset)
1495 swappit = FALSE;
1496 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1497 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1498 swappit = TRUE;
1499 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1500 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1501 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1502 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1503 swappit = TRUE;
1504 else
1505 swappit = FALSE;
1506
1507 if (swappit)
1508 {
1509 Elf_Internal_Rela tmp;
1510
1511 tmp = r[i];
1512 r[i] = r[i + 1];
1513 r[i + 1] = tmp;
1514 /* If we do move a reloc back, re-scan to see if it
1515 needs to be moved even further back. This avoids
1516 most of the O(n^2) behavior for our cases. */
1517 if (i > 0)
1518 i -= 2;
1519 again = TRUE;
1520 }
1521 }
1522 }
1523}
1524
1525
1526#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1527 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1528 lrel, abfd, sec, link_info, scale)
1529
1530static bfd_vma
1531rx_offset_for_reloc (bfd * abfd,
1532 Elf_Internal_Rela * rel,
1533 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1534 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
c7927a3c
NC		 1535 Elf_Internal_Sym * intsyms,
1536 Elf_Internal_Rela ** lrel,
1537 bfd * input_bfd,
1538 asection * input_section,
1539 struct bfd_link_info * info,
1540 int * scale)
1541{
1542 bfd_vma symval;
1543 bfd_reloc_status_type r;
1544
1545 *scale = 1;
1546
1547 /* REL is the first of 1..N relocations. We compute the symbol
1548 value for each relocation, then combine them if needed. LREL
1549 gets a pointer to the last relocation used. */
1550 while (1)
1551 {
1552 int32_t tmp1, tmp2;
1553
1554 /* Get the value of the symbol referred to by the reloc. */
1555 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1556 {
1557 /* A local symbol. */
1558 Elf_Internal_Sym *isym;
c7927a3c
NC		 1559 asection *ssec;
1560
1561 isym = intsyms + ELF32_R_SYM (rel->r_info);
1562
1563 if (isym->st_shndx == SHN_UNDEF)
1564 ssec = bfd_und_section_ptr;
1565 else if (isym->st_shndx == SHN_ABS)
1566 ssec = bfd_abs_section_ptr;
1567 else if (isym->st_shndx == SHN_COMMON)
1568 ssec = bfd_com_section_ptr;
1569 else
1570 ssec = bfd_section_from_elf_index (abfd,
1571 isym->st_shndx);
1572
c7927a3c
NC		 1573 /* Initial symbol value. */
1574 symval = isym->st_value;
1575
1576 /* GAS may have made this symbol relative to a section, in
1577 which case, we have to add the addend to find the
1578 symbol. */
1579 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1580 symval += rel->r_addend;
1581
1582 if (ssec)
1583 {
1584 if ((ssec->flags & SEC_MERGE)
1585 && ssec->sec_info_type == ELF_INFO_TYPE_MERGE)
1586 symval = _bfd_merged_section_offset (abfd, & ssec,
1587 elf_section_data (ssec)->sec_info,
1588 symval);
1589 }
1590
1591 /* Now make the offset relative to where the linker is putting it. */
1592 if (ssec)
1593 symval +=
1594 ssec->output_section->vma + ssec->output_offset;
1595
1596 symval += rel->r_addend;
1597 }
1598 else
1599 {
1600 unsigned long indx;
1601 struct elf_link_hash_entry * h;
1602
1603 /* An external symbol. */
1604 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1605 h = elf_sym_hashes (abfd)[indx];
1606 BFD_ASSERT (h != NULL);
1607
1608 if (h->root.type != bfd_link_hash_defined
1609 && h->root.type != bfd_link_hash_defweak)
1610 {
1611 /* This appears to be a reference to an undefined
1612 symbol. Just ignore it--it will be caught by the
1613 regular reloc processing. */
1614 if (lrel)
1615 *lrel = rel;
1616 return 0;
1617 }
1618
1619 symval = (h->root.u.def.value
1620 + h->root.u.def.section->output_section->vma
1621 + h->root.u.def.section->output_offset);
1622
1623 symval += rel->r_addend;
1624 }
1625
1626 switch (ELF32_R_TYPE (rel->r_info))
1627 {
1628 case R_RX_SYM:
1629 RX_STACK_PUSH (symval);
1630 break;
1631
1632 case R_RX_OPneg:
1633 RX_STACK_POP (tmp1);
1634 tmp1 = - tmp1;
1635 RX_STACK_PUSH (tmp1);
1636 break;
1637
1638 case R_RX_OPadd:
1639 RX_STACK_POP (tmp1);
1640 RX_STACK_POP (tmp2);
1641 tmp1 += tmp2;
1642 RX_STACK_PUSH (tmp1);
1643 break;
1644
1645 case R_RX_OPsub:
1646 RX_STACK_POP (tmp1);
1647 RX_STACK_POP (tmp2);
1648 tmp2 -= tmp1;
1649 RX_STACK_PUSH (tmp2);
1650 break;
1651
1652 case R_RX_OPmul:
1653 RX_STACK_POP (tmp1);
1654 RX_STACK_POP (tmp2);
1655 tmp1 *= tmp2;
1656 RX_STACK_PUSH (tmp1);
1657 break;
1658
1659 case R_RX_OPdiv:
1660 RX_STACK_POP (tmp1);
1661 RX_STACK_POP (tmp2);
1662 tmp1 /= tmp2;
1663 RX_STACK_PUSH (tmp1);
1664 break;
1665
1666 case R_RX_OPshla:
1667 RX_STACK_POP (tmp1);
1668 RX_STACK_POP (tmp2);
1669 tmp1 <<= tmp2;
1670 RX_STACK_PUSH (tmp1);
1671 break;
1672
1673 case R_RX_OPshra:
1674 RX_STACK_POP (tmp1);
1675 RX_STACK_POP (tmp2);
1676 tmp1 >>= tmp2;
1677 RX_STACK_PUSH (tmp1);
1678 break;
1679
1680 case R_RX_OPsctsize:
1681 RX_STACK_PUSH (input_section->size);
1682 break;
1683
1684 case R_RX_OPscttop:
1685 RX_STACK_PUSH (input_section->output_section->vma);
1686 break;
1687
1688 case R_RX_OPand:
1689 RX_STACK_POP (tmp1);
1690 RX_STACK_POP (tmp2);
1691 tmp1 &= tmp2;
1692 RX_STACK_PUSH (tmp1);
1693 break;
1694
1695 case R_RX_OPor:
1696 RX_STACK_POP (tmp1);
1697 RX_STACK_POP (tmp2);
1698 tmp1 |= tmp2;
1699 RX_STACK_PUSH (tmp1);
1700 break;
1701
1702 case R_RX_OPxor:
1703 RX_STACK_POP (tmp1);
1704 RX_STACK_POP (tmp2);
1705 tmp1 ^= tmp2;
1706 RX_STACK_PUSH (tmp1);
1707 break;
1708
1709 case R_RX_OPnot:
1710 RX_STACK_POP (tmp1);
1711 tmp1 = ~ tmp1;
1712 RX_STACK_PUSH (tmp1);
1713 break;
1714
1715 case R_RX_OPmod:
1716 RX_STACK_POP (tmp1);
1717 RX_STACK_POP (tmp2);
1718 tmp1 %= tmp2;
1719 RX_STACK_PUSH (tmp1);
1720 break;
1721
1722 case R_RX_OPromtop:
1723 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1724 break;
1725
1726 case R_RX_OPramtop:
1727 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1728 break;
1729
1730 case R_RX_DIR16UL:
1731 case R_RX_DIR8UL:
1732 case R_RX_ABS16UL:
1733 case R_RX_ABS8UL:
1734 if (rx_stack_top)
1735 RX_STACK_POP (symval);
1736 if (lrel)
1737 *lrel = rel;
1738 *scale = 4;
1739 return symval;
1740
1741 case R_RX_DIR16UW:
1742 case R_RX_DIR8UW:
1743 case R_RX_ABS16UW:
1744 case R_RX_ABS8UW:
1745 if (rx_stack_top)
1746 RX_STACK_POP (symval);
1747 if (lrel)
1748 *lrel = rel;
1749 *scale = 2;
1750 return symval;
1751
1752 default:
1753 if (rx_stack_top)
1754 RX_STACK_POP (symval);
1755 if (lrel)
1756 *lrel = rel;
1757 return symval;
1758 }
1759
1760 rel ++;
1761 }
1762}
1763
1764static void
1765move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1766{
1767 bfd_vma old_offset = srel->r_offset;
1768
1769 irel ++;
1770 while (irel <= srel)
1771 {
1772 if (irel->r_offset == old_offset)
1773 irel->r_offset += delta;
1774 irel ++;
1775 }
1776}
1777
1778/* Relax one section. */
1779
1780static bfd_boolean
1781elf32_rx_relax_section (bfd * abfd,
1782 asection * sec,
1783 struct bfd_link_info * link_info,
1784 bfd_boolean * again,
1785 bfd_boolean allow_pcrel3)
1786{
1787 Elf_Internal_Shdr * symtab_hdr;
1788 Elf_Internal_Shdr * shndx_hdr;
1789 Elf_Internal_Rela * internal_relocs;
1790 Elf_Internal_Rela * free_relocs = NULL;
1791 Elf_Internal_Rela * irel;
1792 Elf_Internal_Rela * srel;
1793 Elf_Internal_Rela * irelend;
1794 Elf_Internal_Rela * next_alignment;
1795 Elf_Internal_Rela * prev_alignment;
1796 bfd_byte * contents = NULL;
1797 bfd_byte * free_contents = NULL;
1798 Elf_Internal_Sym * intsyms = NULL;
1799 Elf_Internal_Sym * free_intsyms = NULL;
1800 Elf_External_Sym_Shndx * shndx_buf = NULL;
1801 bfd_vma pc;
1802 bfd_vma sec_start;
c7927a3c
NC		 1803 bfd_vma symval = 0;
1804 int pcrel = 0;
1805 int code = 0;
1806 int section_alignment_glue;
1807 /* how much to scale the relocation by - 1, 2, or 4. */
1808 int scale;
1809
1810 /* Assume nothing changes. */
1811 *again = FALSE;
1812
1813 /* We don't have to do anything for a relocatable link, if
1814 this section does not have relocs, or if this is not a
1815 code section. */
1816 if (link_info->relocatable
1817 || (sec->flags & SEC_RELOC) == 0
1818 || sec->reloc_count == 0
1819 || (sec->flags & SEC_CODE) == 0)
1820 return TRUE;
1821
1822 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1823 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1824
1825 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 1826
1827 /* Get the section contents. */
1828 if (elf_section_data (sec)->this_hdr.contents != NULL)
1829 contents = elf_section_data (sec)->this_hdr.contents;
1830 /* Go get them off disk. */
1831 else
1832 {
1833 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
1834 goto error_return;
1835 elf_section_data (sec)->this_hdr.contents = contents;
1836 }
1837
1838 /* Read this BFD's symbols. */
1839 /* Get cached copy if it exists. */
1840 if (symtab_hdr->contents != NULL)
1841 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
1842 else
1843 {
1844 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
1845 symtab_hdr->contents = (bfd_byte *) intsyms;
1846 }
1847
1848 if (shndx_hdr->sh_size != 0)
1849 {
1850 bfd_size_type amt;
1851
1852 amt = symtab_hdr->sh_info;
1853 amt *= sizeof (Elf_External_Sym_Shndx);
1854 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
1855 if (shndx_buf == NULL)
1856 goto error_return;
1857 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
1858 || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
1859 goto error_return;
1860 shndx_hdr->contents = (bfd_byte *) shndx_buf;
1861 }
1862
1863 /* Get a copy of the native relocations. */
1864 internal_relocs = (_bfd_elf_link_read_relocs
1865 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1866 link_info->keep_memory));
1867 if (internal_relocs == NULL)
1868 goto error_return;
1869 if (! link_info->keep_memory)
1870 free_relocs = internal_relocs;
1871
1872 /* The RL_ relocs must be just before the operand relocs they go
1873 with, so we must sort them to guarantee this. We use bubblesort
1874 instead of qsort so we can guarantee that relocs with the same
1875 address remain in the same relative order. */
1876 reloc_bubblesort (internal_relocs, sec->reloc_count);
1877
1878 /* Walk through them looking for relaxing opportunities. */
1879 irelend = internal_relocs + sec->reloc_count;
1880
1881 /* This will either be NULL or a pointer to the next alignment
1882 relocation. */
1883 next_alignment = internal_relocs;
1884 /* This will be the previous alignment, although at first it points
1885 to the first real relocation. */
1886 prev_alignment = internal_relocs;
1887
1888 /* We calculate worst case shrinkage caused by alignment directives.
1889 No fool-proof, but better than either ignoring the problem or
1890 doing heavy duty analysis of all the alignment markers in all
1891 input sections. */
1892 section_alignment_glue = 0;
1893 for (irel = internal_relocs; irel < irelend; irel++)
1894 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1895 && irel->r_addend & RX_RELAXA_ALIGN)
1896 {
1897 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1898
1899 if (section_alignment_glue < this_glue)
1900 section_alignment_glue = this_glue;
1901 }
1902 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
1903 shrinkage. */
1904 section_alignment_glue *= 2;
1905
1906 for (irel = internal_relocs; irel < irelend; irel++)
1907 {
1908 unsigned char *insn;
1909 int nrelocs;
1910
1911 /* The insns we care about are all marked with one of these. */
1912 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
1913 continue;
1914
1915 if (irel->r_addend & RX_RELAXA_ALIGN
1916 || next_alignment == internal_relocs)
1917 {
1918 /* When we delete bytes, we need to maintain all the alignments
1919 indicated. In addition, we need to be careful about relaxing
1920 jumps across alignment boundaries - these displacements
1921 *grow* when we delete bytes. For now, don't shrink
1922 displacements across an alignment boundary, just in case.
1923 Note that this only affects relocations to the same
1924 section. */
1925 prev_alignment = next_alignment;
1926 next_alignment += 2;
1927 while (next_alignment < irelend
1928 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
1929 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
1930 next_alignment ++;
1931 if (next_alignment >= irelend || next_alignment->r_offset == 0)
1932 next_alignment = NULL;
1933 }
1934
1935 /* When we hit alignment markers, see if we've shrunk enough
1936 before them to reduce the gap without violating the alignment
1937 requirements. */
1938 if (irel->r_addend & RX_RELAXA_ALIGN)
1939 {
1940 /* At this point, the next relocation *should* be the ELIGN
1941 end marker. */
1942 Elf_Internal_Rela *erel = irel + 1;
1943 unsigned int alignment, nbytes;
1944
1945 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
1946 continue;
1947 if (!(erel->r_addend & RX_RELAXA_ELIGN))
1948 continue;
1949
1950 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1951
1952 if (erel->r_offset - irel->r_offset < alignment)
1953 continue;
1954
1955 nbytes = erel->r_offset - irel->r_offset;
1956 nbytes /= alignment;
1957 nbytes *= alignment;
1958
1959 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
1960 erel->r_offset == sec->size);
1961 *again = TRUE;
1962
1963 continue;
1964 }
1965
1966 if (irel->r_addend & RX_RELAXA_ELIGN)
1967 continue;
1968
1969 insn = contents + irel->r_offset;
1970
1971 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
1972
1973 /* At this point, we have an insn that is a candidate for linker
1974 relaxation. There are NRELOCS relocs following that may be
1975 relaxed, although each reloc may be made of more than one
1976 reloc entry (such as gp-rel symbols). */
1977
1978 /* Get the value of the symbol referred to by the reloc. Just
1979 in case this is the last reloc in the list, use the RL's
1980 addend to choose between this reloc (no addend) or the next
1981 (yes addend, which means at least one following reloc). */
1982
1983 /* srel points to the "current" reloction for this insn -
1984 actually the last reloc for a given operand, which is the one
1985 we need to update. We check the relaxations in the same
1986 order that the relocations happen, so we'll just push it
1987 along as we go. */
1988 srel = irel;
1989
1990 pc = sec->output_section->vma + sec->output_offset
1991 + srel->r_offset;
1992
1993#define GET_RELOC \
1994 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
1995 pcrel = symval - pc + srel->r_addend; \
1996 nrelocs --;
1997
1998#define SNIPNR(offset, nbytes) \
1999 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2000#define SNIP(offset, nbytes, newtype) \
2001 SNIPNR (offset, nbytes); \
2002 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2003
2004 /* The order of these bit tests must match the order that the
2005 relocs appear in. Since we sorted those by offset, we can
2006 predict them. */
2007
2008 /* Note that the numbers in, say, DSP6 are the bit offsets of
2009 the code fields that describe the operand. Bits number 0 for
2010 the MSB of insn[0]. */
2011
2012 /* DSP* codes:
2013 0 00 [reg]
2014 1 01 dsp:8[reg]
2015 2 10 dsp:16[reg]
2016 3 11 reg */
2017 if (irel->r_addend & RX_RELAXA_DSP6)
2018 {
2019 GET_RELOC;
2020
2021 code = insn[0] & 3;
2022 if (code == 2 && symval/scale <= 255)
2023 {
2024 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2025 insn[0] &= 0xfc;
2026 insn[0] |= 0x01;
2027 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2028 if (newrel != ELF32_R_TYPE (srel->r_info))
2029 {
2030 SNIP (3, 1, newrel);
2031 *again = TRUE;
2032 }
2033 }
2034
2035 else if (code == 1 && symval == 0)
2036 {
2037 insn[0] &= 0xfc;
2038 SNIP (2, 1, R_RX_NONE);
2039 *again = TRUE;
2040 }
2041
2042 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2043 else if (code == 1 && symval/scale <= 31
2044 /* Decodable bits. */
2045 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2046 /* Width. */
c7927a3c 2047 && (insn[0] & 0x30) != 3
91d6fa6a 2048 /* Register MSBs. */
c7927a3c
NC		 2049 && (insn[1] & 0x88) == 0x00)
2050 {
2051 int newrel = 0;
2052
2053 insn[0] = 0x88 | (insn[0] & 0x30);
2054 /* The register fields are in the right place already. */
2055
2056 /* We can't relax this new opcode. */
2057 irel->r_addend = 0;
2058
2059 switch ((insn[0] & 0x30) >> 4)
2060 {
2061 case 0:
2062 newrel = R_RX_RH_ABS5p5B;
2063 break;
2064 case 1:
2065 newrel = R_RX_RH_ABS5p5W;
2066 break;
2067 case 2:
2068 newrel = R_RX_RH_ABS5p5L;
2069 break;
2070 }
2071
2072 move_reloc (irel, srel, -2);
2073 SNIP (2, 1, newrel);
2074 }
2075
2076 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2077 else if (code == 1 && symval/scale <= 31
2078 /* Decodable bits. */
2079 && (insn[0] & 0xf8) == 0x58
2080 /* Register MSBs. */
2081 && (insn[1] & 0x88) == 0x00)
2082 {
2083 int newrel = 0;
2084
2085 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2086 /* The register fields are in the right place already. */
2087
2088 /* We can't relax this new opcode. */
2089 irel->r_addend = 0;
2090
2091 switch ((insn[0] & 0x08) >> 3)
2092 {
2093 case 0:
2094 newrel = R_RX_RH_ABS5p5B;
2095 break;
2096 case 1:
2097 newrel = R_RX_RH_ABS5p5W;
2098 break;
2099 }
2100
2101 move_reloc (irel, srel, -2);
2102 SNIP (2, 1, newrel);
2103 }
2104 }
2105
2106 /* A DSP4 operand always follows a DSP6 operand, even if there's
2107 no relocation for it. We have to read the code out of the
2108 opcode to calculate the offset of the operand. */
2109 if (irel->r_addend & RX_RELAXA_DSP4)
2110 {
2111 int code6, offset = 0;
2112
2113 GET_RELOC;
2114
2115 code6 = insn[0] & 0x03;
2116 switch (code6)
2117 {
2118 case 0: offset = 2; break;
2119 case 1: offset = 3; break;
2120 case 2: offset = 4; break;
2121 case 3: offset = 2; break;
2122 }
2123
2124 code = (insn[0] & 0x0c) >> 2;
2125
2126 if (code == 2 && symval / scale <= 255)
2127 {
2128 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2129
2130 insn[0] &= 0xf3;
2131 insn[0] |= 0x04;
2132 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2133 if (newrel != ELF32_R_TYPE (srel->r_info))
2134 {
2135 SNIP (offset+1, 1, newrel);
2136 *again = TRUE;
2137 }
2138 }
2139
2140 else if (code == 1 && symval == 0)
2141 {
2142 insn[0] &= 0xf3;
2143 SNIP (offset, 1, R_RX_NONE);
2144 *again = TRUE;
2145 }
2146 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2147 else if (code == 1 && symval/scale <= 31
2148 /* Decodable bits. */
2149 && (insn[0] & 0xc3) == 0xc3
2150 /* Width. */
2151 && (insn[0] & 0x30) != 3
2152 /* Register MSBs. */
2153 && (insn[1] & 0x88) == 0x00)
2154 {
2155 int newrel = 0;
2156
2157 insn[0] = 0x80 | (insn[0] & 0x30);
2158 /* The register fields are in the right place already. */
2159
2160 /* We can't relax this new opcode. */
2161 irel->r_addend = 0;
2162
2163 switch ((insn[0] & 0x30) >> 4)
2164 {
2165 case 0:
2166 newrel = R_RX_RH_ABS5p5B;
2167 break;
2168 case 1:
2169 newrel = R_RX_RH_ABS5p5W;
2170 break;
2171 case 2:
2172 newrel = R_RX_RH_ABS5p5L;
2173 break;
2174 }
2175
2176 move_reloc (irel, srel, -2);
2177 SNIP (2, 1, newrel);
2178 }
2179 }
2180
2181 /* These always occur alone, but the offset depends on whether
2182 it's a MEMEX opcode (0x06) or not. */
2183 if (irel->r_addend & RX_RELAXA_DSP14)
2184 {
2185 int offset;
2186 GET_RELOC;
2187
2188 if (insn[0] == 0x06)
2189 offset = 3;
2190 else
2191 offset = 4;
2192
2193 code = insn[1] & 3;
2194
2195 if (code == 2 && symval / scale <= 255)
2196 {
2197 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2198
2199 insn[1] &= 0xfc;
2200 insn[1] |= 0x01;
2201 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2202 if (newrel != ELF32_R_TYPE (srel->r_info))
2203 {
2204 SNIP (offset, 1, newrel);
2205 *again = TRUE;
2206 }
2207 }
2208 else if (code == 1 && symval == 0)
2209 {
2210 insn[1] &= 0xfc;
2211 SNIP (offset, 1, R_RX_NONE);
2212 *again = TRUE;
2213 }
2214 }
2215
2216 /* IMM* codes:
2217 0 00 imm:32
2218 1 01 simm:8
2219 2 10 simm:16
2220 3 11 simm:24. */
2221
2222 /* These always occur alone. */
2223 if (irel->r_addend & RX_RELAXA_IMM6)
2224 {
2225 long ssymval;
2226
2227 GET_RELOC;
2228
2229 /* These relocations sign-extend, so we must do signed compares. */
2230 ssymval = (long) symval;
2231
2232 code = insn[0] & 0x03;
2233
2234 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2235 {
2236 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2237
2238 insn[0] &= 0xfc;
2239 insn[0] |= 0x03;
2240 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2241 if (newrel != ELF32_R_TYPE (srel->r_info))
2242 {
2243 SNIP (2, 1, newrel);
2244 *again = TRUE;
2245 }
2246 }
2247
2248 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2249 {
2250 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2251
2252 insn[0] &= 0xfc;
2253 insn[0] |= 0x02;
2254 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2255 if (newrel != ELF32_R_TYPE (srel->r_info))
2256 {
2257 SNIP (2, 1, newrel);
2258 *again = TRUE;
2259 }
2260 }
2261
2262 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2263 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2264 /* Decodable bits. */
2265 && (insn[0] & 0xfc) == 0x74
2266 /* Decodable bits. */
2267 && ((insn[1] & 0xf0) == 0x00))
2268 {
2269 int newrel;
2270
2271 insn[0] = 0x75;
2272 insn[1] = 0x50 | (insn[1] & 0x0f);
2273
2274 /* We can't relax this new opcode. */
2275 irel->r_addend = 0;
2276
2277 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2278 newrel = R_RX_ABS8U;
2279 else
2280 newrel = R_RX_DIR8U;
2281
2282 SNIP (2, 1, newrel);
2283 *again = TRUE;
2284 }
2285
2286 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2287 {
2288 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2289
2290 insn[0] &= 0xfc;
2291 insn[0] |= 0x01;
2292 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2293 if (newrel != ELF32_R_TYPE (srel->r_info))
2294 {
2295 SNIP (2, 1, newrel);
2296 *again = TRUE;
2297 }
2298 }
2299
2300 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2301 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2302 /* Decodable bits and immediate type. */
2303 && insn[0] == 0x75
2304 /* Decodable bits. */
2305 && (insn[1] & 0xc0) == 0x00)
2306 {
2307 static const int newop[4] = { 1, 3, 4, 5 };
2308
2309 insn[0] = 0x60 | newop[insn[1] >> 4];
2310 /* The register number doesn't move. */
2311
2312 /* We can't relax this new opcode. */
2313 irel->r_addend = 0;
2314
2315 move_reloc (irel, srel, -1);
2316
2317 SNIP (2, 1, R_RX_RH_UIMM4p8);
2318 *again = TRUE;
2319 }
2320
2321 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2322 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2323 /* Decodable bits and immediate type. */
2324 && insn[0] == 0x71
2325 /* Same register for source and destination. */
2326 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2327 {
2328 int newrel;
2329
2330 /* Note that we can't turn "add $0,Rs" into a NOP
2331 because the flags need to be set right. */
2332
2333 if (ssymval < 0)
2334 {
2335 insn[0] = 0x60; /* Subtract. */
2336 newrel = R_RX_RH_UNEG4p8;
2337 }
2338 else
2339 {
2340 insn[0] = 0x62; /* Add. */
2341 newrel = R_RX_RH_UIMM4p8;
2342 }
2343
2344 /* The register number is in the right place. */
2345
2346 /* We can't relax this new opcode. */
2347 irel->r_addend = 0;
2348
2349 move_reloc (irel, srel, -1);
2350
2351 SNIP (2, 1, newrel);
2352 *again = TRUE;
2353 }
2354 }
2355
2356 /* These are either matched with a DSP6 (2-byte base) or an id24
2357 (3-byte base). */
2358 if (irel->r_addend & RX_RELAXA_IMM12)
2359 {
2360 int dspcode, offset = 0;
2361 long ssymval;
2362
2363 GET_RELOC;
2364
2365 if ((insn[0] & 0xfc) == 0xfc)
2366 dspcode = 1; /* Just something with one byte operand. */
2367 else
2368 dspcode = insn[0] & 3;
2369 switch (dspcode)
2370 {
2371 case 0: offset = 2; break;
2372 case 1: offset = 3; break;
2373 case 2: offset = 4; break;
2374 case 3: offset = 2; break;
2375 }
2376
2377 /* These relocations sign-extend, so we must do signed compares. */
2378 ssymval = (long) symval;
2379
2380 code = (insn[1] >> 2) & 3;
2381 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2382 {
2383 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2384
2385 insn[1] &= 0xf3;
2386 insn[1] |= 0x0c;
2387 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2388 if (newrel != ELF32_R_TYPE (srel->r_info))
2389 {
2390 SNIP (offset, 1, newrel);
2391 *again = TRUE;
2392 }
2393 }
2394
2395 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2396 {
2397 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2398
2399 insn[1] &= 0xf3;
2400 insn[1] |= 0x08;
2401 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2402 if (newrel != ELF32_R_TYPE (srel->r_info))
2403 {
2404 SNIP (offset, 1, newrel);
2405 *again = TRUE;
2406 }
2407 }
2408
2409 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2410 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2411 /* Decodable bits. */
2412 && insn[0] == 0xfb
2413 /* Decodable bits. */
2414 && ((insn[1] & 0x03) == 0x02))
2415 {
2416 int newrel;
2417
2418 insn[0] = 0x75;
2419 insn[1] = 0x40 | (insn[1] >> 4);
2420
2421 /* We can't relax this new opcode. */
2422 irel->r_addend = 0;
2423
2424 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2425 newrel = R_RX_ABS8U;
2426 else
2427 newrel = R_RX_DIR8U;
2428
2429 SNIP (2, 1, newrel);
2430 *again = TRUE;
2431 }
2432
2433 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2434 {
2435 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2436
2437 insn[1] &= 0xf3;
2438 insn[1] |= 0x04;
2439 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2440 if (newrel != ELF32_R_TYPE(srel->r_info))
2441 {
2442 SNIP (offset, 1, newrel);
2443 *again = TRUE;
2444 }
2445 }
2446
2447 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2448 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2449 /* Decodable bits. */
2450 && insn[0] == 0xfb
2451 /* Decodable bits. */
2452 && ((insn[1] & 0x03) == 0x02))
2453 {
2454 insn[0] = 0x66;
2455 insn[1] = insn[1] >> 4;
2456
2457 /* We can't relax this new opcode. */
2458 irel->r_addend = 0;
2459
2460 move_reloc (irel, srel, -1);
2461
2462 SNIP (2, 1, R_RX_RH_UIMM4p8);
2463 *again = TRUE;
2464 }
2465 }
2466
2467 if (irel->r_addend & RX_RELAXA_BRA)
2468 {
2469 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2470 int max_pcrel3 = 4;
2471 int alignment_glue = 0;
2472
2473 GET_RELOC;
2474
2475 /* Branches over alignment chunks are problematic, as
2476 deleting bytes here makes the branch *further* away. We
2477 can be agressive with branches within this alignment
2478 block, but not branches outside it. */
2479 if ((prev_alignment == NULL
2480 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2481 && (next_alignment == NULL
2482 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2483 alignment_glue = section_alignment_glue;
2484
2485 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2486 && srel[1].r_addend & RX_RELAXA_BRA
2487 && srel[1].r_offset < irel->r_offset + pcrel)
2488 max_pcrel3 ++;
2489
2490 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2491
2492 /* The values we compare PCREL with are not what you'd
2493 expect; they're off by a little to compensate for (1)
2494 where the reloc is relative to the insn, and (2) how much
2495 the insn is going to change when we relax it. */
2496
2497 /* These we have to decode. */
2498 switch (insn[0])
2499 {
2500 case 0x04: /* BRA pcdsp:24 */
2501 if (-32768 + alignment_glue <= pcrel
2502 && pcrel <= 32765 - alignment_glue)
2503 {
2504 insn[0] = 0x38;
2505 SNIP (3, 1, newrel);
2506 *again = TRUE;
2507 }
2508 break;
2509
2510 case 0x38: /* BRA pcdsp:16 */
2511 if (-128 + alignment_glue <= pcrel
2512 && pcrel <= 127 - alignment_glue)
2513 {
2514 insn[0] = 0x2e;
2515 SNIP (2, 1, newrel);
2516 *again = TRUE;
2517 }
2518 break;
2519
2520 case 0x2e: /* BRA pcdsp:8 */
2521 /* Note that there's a risk here of shortening things so
2522 much that we no longer fit this reloc; it *should*
2523 only happen when you branch across a branch, and that
2524 branch also devolves into BRA.S. "Real" code should
2525 be OK. */
2526 if (max_pcrel3 + alignment_glue <= pcrel
2527 && pcrel <= 10 - alignment_glue
2528 && allow_pcrel3)
2529 {
2530 insn[0] = 0x08;
2531 SNIP (1, 1, newrel);
2532 move_reloc (irel, srel, -1);
2533 *again = TRUE;
2534 }
2535 break;
2536
2537 case 0x05: /* BSR pcdsp:24 */
2538 if (-32768 + alignment_glue <= pcrel
2539 && pcrel <= 32765 - alignment_glue)
2540 {
2541 insn[0] = 0x39;
2542 SNIP (1, 1, newrel);
2543 *again = TRUE;
2544 }
2545 break;
2546
2547 case 0x3a: /* BEQ.W pcdsp:16 */
2548 case 0x3b: /* BNE.W pcdsp:16 */
2549 if (-128 + alignment_glue <= pcrel
2550 && pcrel <= 127 - alignment_glue)
2551 {
2552 insn[0] = 0x20 | (insn[0] & 1);
2553 SNIP (1, 1, newrel);
2554 *again = TRUE;
2555 }
2556 break;
2557
2558 case 0x20: /* BEQ.B pcdsp:8 */
2559 case 0x21: /* BNE.B pcdsp:8 */
2560 if (max_pcrel3 + alignment_glue <= pcrel
2561 && pcrel - alignment_glue <= 10
2562 && allow_pcrel3)
2563 {
2564 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2565 SNIP (1, 1, newrel);
2566 move_reloc (irel, srel, -1);
2567 *again = TRUE;
2568 }
2569 break;
2570
2571 case 0x16: /* synthetic BNE dsp24 */
2572 case 0x1e: /* synthetic BEQ dsp24 */
2573 if (-32767 + alignment_glue <= pcrel
2574 && pcrel <= 32766 - alignment_glue
2575 && insn[1] == 0x04)
2576 {
2577 if (insn[0] == 0x16)
2578 insn[0] = 0x3b;
2579 else
2580 insn[0] = 0x3a;
2581 /* We snip out the bytes at the end else the reloc
2582 will get moved too, and too much. */
2583 SNIP (3, 2, newrel);
2584 move_reloc (irel, srel, -1);
2585 *again = TRUE;
2586 }
2587 break;
2588 }
2589
2590 /* Special case - synthetic conditional branches, pcrel24.
2591 Note that EQ and NE have been handled above. */
2592 if ((insn[0] & 0xf0) == 0x20
2593 && insn[1] == 0x06
2594 && insn[2] == 0x04
2595 && srel->r_offset != irel->r_offset + 1
2596 && -32767 + alignment_glue <= pcrel
2597 && pcrel <= 32766 - alignment_glue)
2598 {
2599 insn[1] = 0x05;
2600 insn[2] = 0x38;
2601 SNIP (5, 1, newrel);
2602 *again = TRUE;
2603 }
2604
2605 /* Special case - synthetic conditional branches, pcrel16 */
2606 if ((insn[0] & 0xf0) == 0x20
2607 && insn[1] == 0x05
2608 && insn[2] == 0x38
2609 && srel->r_offset != irel->r_offset + 1
2610 && -127 + alignment_glue <= pcrel
2611 && pcrel <= 126 - alignment_glue)
2612 {
2613 int cond = (insn[0] & 0x0f) ^ 0x01;
2614
2615 insn[0] = 0x20 | cond;
2616 /* By moving the reloc first, we avoid having
2617 delete_bytes move it also. */
2618 move_reloc (irel, srel, -2);
2619 SNIP (2, 3, newrel);
2620 *again = TRUE;
2621 }
2622 }
2623
2624 BFD_ASSERT (nrelocs == 0);
2625
2626 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2627 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2628 because it may have one or two relocations. */
2629 if ((insn[0] & 0xfc) == 0xf8
2630 && (insn[1] & 0x80) == 0x00
2631 && (insn[0] & 0x03) != 0x03)
2632 {
2633 int dcode, icode, reg, ioff, dscale, ilen;
2634 bfd_vma disp_val = 0;
2635 long imm_val = 0;
2636 Elf_Internal_Rela * disp_rel = 0;
2637 Elf_Internal_Rela * imm_rel = 0;
2638
2639 /* Reset this. */
2640 srel = irel;
2641
2642 dcode = insn[0] & 0x03;
2643 icode = (insn[1] >> 2) & 0x03;
2644 reg = (insn[1] >> 4) & 0x0f;
2645
2646 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2647
2648 /* Figure out what the dispacement is. */
2649 if (dcode == 1 || dcode == 2)
2650 {
2651 /* There's a displacement. See if there's a reloc for it. */
2652 if (srel[1].r_offset == irel->r_offset + 2)
2653 {
2654 GET_RELOC;
2655 disp_val = symval;
2656 disp_rel = srel;
2657 }
2658 else
2659 {
2660 if (dcode == 1)
2661 disp_val = insn[2];
2662 else
2663 {
2664#if RX_OPCODE_BIG_ENDIAN
2665 disp_val = insn[2] * 256 + insn[3];
2666#else
2667 disp_val = insn[2] + insn[3] * 256;
2668#endif
2669 }
2670 switch (insn[1] & 3)
2671 {
2672 case 1:
2673 disp_val *= 2;
2674 scale = 2;
2675 break;
2676 case 2:
2677 disp_val *= 4;
2678 scale = 4;
2679 break;
2680 }
2681 }
2682 }
2683
2684 dscale = scale;
2685
2686 /* Figure out what the immediate is. */
2687 if (srel[1].r_offset == irel->r_offset + ioff)
2688 {
2689 GET_RELOC;
2690 imm_val = (long) symval;
2691 imm_rel = srel;
2692 }
2693 else
2694 {
2695 unsigned char * ip = insn + ioff;
2696
2697 switch (icode)
2698 {
2699 case 1:
2700 /* For byte writes, we don't sign extend. Makes the math easier later. */
2701 if (scale == 1)
2702 imm_val = ip[0];
2703 else
2704 imm_val = (char) ip[0];
2705 break;
2706 case 2:
2707#if RX_OPCODE_BIG_ENDIAN
2708 imm_val = ((char) ip[0] << 8) | ip[1];
2709#else
2710 imm_val = ((char) ip[1] << 8) | ip[0];
2711#endif
2712 break;
2713 case 3:
2714#if RX_OPCODE_BIG_ENDIAN
2715 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2716#else
2717 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2718#endif
2719 break;
2720 case 0:
2721#if RX_OPCODE_BIG_ENDIAN
2722 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2723#else
2724 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2725#endif
2726 break;
2727 }
2728 }
2729
2730 ilen = 2;
2731
2732 switch (dcode)
2733 {
2734 case 1:
2735 ilen += 1;
2736 break;
2737 case 2:
2738 ilen += 2;
2739 break;
2740 }
2741
2742 switch (icode)
2743 {
2744 case 1:
2745 ilen += 1;
2746 break;
2747 case 2:
2748 ilen += 2;
2749 break;
2750 case 3:
2751 ilen += 3;
2752 break;
2753 case 4:
2754 ilen += 4;
2755 break;
2756 }
2757
2758 /* The shortcut happens when the immediate is 0..255,
2759 register r0 to r7, and displacement (scaled) 0..31. */
2760
2761 if (0 <= imm_val && imm_val <= 255
2762 && 0 <= reg && reg <= 7
2763 && disp_val / dscale <= 31)
2764 {
2765 insn[0] = 0x3c | (insn[1] & 0x03);
2766 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2767 insn[2] = imm_val;
2768
2769 if (disp_rel)
2770 {
2771 int newrel = R_RX_NONE;
2772
2773 switch (dscale)
2774 {
2775 case 1:
2776 newrel = R_RX_RH_ABS5p8B;
2777 break;
2778 case 2:
2779 newrel = R_RX_RH_ABS5p8W;
2780 break;
2781 case 4:
2782 newrel = R_RX_RH_ABS5p8L;
2783 break;
2784 }
2785 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2786 move_reloc (irel, disp_rel, -1);
2787 }
2788 if (imm_rel)
2789 {
2790 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2791 move_reloc (disp_rel ? disp_rel : irel,
2792 imm_rel,
2793 irel->r_offset - imm_rel->r_offset + 2);
2794 }
2795
2796 SNIPNR (3, ilen - 3);
2797 *again = TRUE;
2798
2799 /* We can't relax this new opcode. */
2800 irel->r_addend = 0;
2801 }
2802 }
2803 }
2804
2805 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2806 whatever they're branching over won't shrink any more. If we're
2807 basically done here, do one more pass just for branches - but
2808 don't request a pass after that one! */
2809 if (!*again && !allow_pcrel3)
2810 {
2811 bfd_boolean ignored;
2812
2813 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
2814 }
2815
2816 return TRUE;
2817
2818 error_return:
2819 if (free_relocs != NULL)
2820 free (free_relocs);
2821
2822 if (free_contents != NULL)
2823 free (free_contents);
2824
2825 if (shndx_buf != NULL)
2826 {
2827 shndx_hdr->contents = NULL;
2828 free (shndx_buf);
2829 }
2830
2831 if (free_intsyms != NULL)
2832 free (free_intsyms);
2833
2834 return FALSE;
2835}
2836
2837static bfd_boolean
2838elf32_rx_relax_section_wrapper (bfd * abfd,
2839 asection * sec,
2840 struct bfd_link_info * link_info,
2841 bfd_boolean * again)
2842{
2843 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
2844}
2845\f
2846/* Function to set the ELF flag bits. */
2847
2848static bfd_boolean
2849rx_elf_set_private_flags (bfd * abfd, flagword flags)
2850{
2851 elf_elfheader (abfd)->e_flags = flags;
2852 elf_flags_init (abfd) = TRUE;
2853 return TRUE;
2854}
2855
2856static bfd_boolean no_warn_mismatch = FALSE;
2857
2858void bfd_elf32_rx_set_target_flags (bfd_boolean);
2859
2860void
2861bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch)
2862{
2863 no_warn_mismatch = user_no_warn_mismatch;
2864}
2865
2866/* Merge backend specific data from an object file to the output
2867 object file when linking. */
2868
2869static bfd_boolean
2870rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2871{
2872 flagword old_flags;
2873 flagword new_flags;
2874 bfd_boolean error = FALSE;
2875
2876 new_flags = elf_elfheader (ibfd)->e_flags;
2877 old_flags = elf_elfheader (obfd)->e_flags;
2878
2879 if (!elf_flags_init (obfd))
2880 {
2881 /* First call, no flags set. */
2882 elf_flags_init (obfd) = TRUE;
2883 elf_elfheader (obfd)->e_flags = new_flags;
2884 }
2885 else if (old_flags != new_flags)
2886 {
2887 flagword known_flags = E_FLAG_RX_64BIT_DOUBLES | E_FLAG_RX_DSP;
2888
2889 if ((old_flags ^ new_flags) & known_flags)
2890 {
2891 /* Only complain if flag bits we care about do not match.
2892 Other bits may be set, since older binaries did use some
2893 deprecated flags. */
2894 if (no_warn_mismatch)
2895 {
2896 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
2897 }
2898 else
2899 {
2900 (*_bfd_error_handler)
2901 ("ELF header flags mismatch: old_flags = 0x%.8lx, new_flags = 0x%.8lx, filename = %s",
2902 old_flags, new_flags, bfd_get_filename (ibfd));
2903 error = TRUE;
2904 }
2905 }
2906 else
2907 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
2908 }
2909
2910 if (error)
2911 bfd_set_error (bfd_error_bad_value);
2912
2913 return !error;
2914}
2915\f
2916static bfd_boolean
2917rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
2918{
2919 FILE * file = (FILE *) ptr;
2920 flagword flags;
2921
2922 BFD_ASSERT (abfd != NULL && ptr != NULL);
2923
2924 /* Print normal ELF private data. */
2925 _bfd_elf_print_private_bfd_data (abfd, ptr);
2926
2927 flags = elf_elfheader (abfd)->e_flags;
2928 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
2929
2930 if (flags & E_FLAG_RX_64BIT_DOUBLES)
2931 fprintf (file, _(" [64-bit doubles]"));
2932 if (flags & E_FLAG_RX_DSP)
2933 fprintf (file, _(" [dsp]"));
2934
2935 fputc ('\n', file);
2936 return TRUE;
2937}
2938
2939/* Return the MACH for an e_flags value. */
2940
2941static int
2942elf32_rx_machine (bfd * abfd)
2943{
2944 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
2945 return bfd_mach_rx;
2946
2947 return 0;
2948}
2949
2950static bfd_boolean
2951rx_elf_object_p (bfd * abfd)
2952{
2953 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
2954 elf32_rx_machine (abfd));
2955 return TRUE;
2956}
2957 \f
2958
2959#ifdef DEBUG
2960void
9ccb8af9 2961rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 2962{
2963 size_t locsymcount;
2964 Elf_Internal_Sym * isymbuf;
2965 Elf_Internal_Sym * isymend;
2966 Elf_Internal_Sym * isym;
2967 Elf_Internal_Shdr * symtab_hdr;
2968 bfd_boolean free_internal = FALSE, free_external = FALSE;
2969 char * st_info_str;
2970 char * st_info_stb_str;
2971 char * st_other_str;
2972 char * st_shndx_str;
2973
2974 if (! internal_syms)
2975 {
2976 internal_syms = bfd_malloc (1000);
2977 free_internal = 1;
2978 }
2979 if (! external_syms)
2980 {
2981 external_syms = bfd_malloc (1000);
2982 free_external = 1;
2983 }
2984
2985 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2986 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
2987 if (free_internal)
2988 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2989 symtab_hdr->sh_info, 0,
2990 internal_syms, external_syms, NULL);
2991 else
2992 isymbuf = internal_syms;
2993 isymend = isymbuf + locsymcount;
2994
2995 for (isym = isymbuf ; isym < isymend ; isym++)
2996 {
2997 switch (ELF_ST_TYPE (isym->st_info))
2998 {
2999 case STT_FUNC: st_info_str = "STT_FUNC";
3000 case STT_SECTION: st_info_str = "STT_SECTION";
3001 case STT_FILE: st_info_str = "STT_FILE";
3002 case STT_OBJECT: st_info_str = "STT_OBJECT";
3003 case STT_TLS: st_info_str = "STT_TLS";
3004 default: st_info_str = "";
3005 }
3006 switch (ELF_ST_BIND (isym->st_info))
3007 {
3008 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
3009 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
3010 default: st_info_stb_str = "";
3011 }
3012 switch (ELF_ST_VISIBILITY (isym->st_other))
3013 {
3014 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
3015 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
3016 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
3017 default: st_other_str = "";
3018 }
3019 switch (isym->st_shndx)
3020 {
3021 case SHN_ABS: st_shndx_str = "SHN_ABS";
3022 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
3023 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
3024 default: st_shndx_str = "";
3025 }
3026
3027 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3028 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3029 isym,
3030 (unsigned long) isym->st_value,
3031 (unsigned long) isym->st_size,
3032 isym->st_name,
3033 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3034 isym->st_name),
3035 isym->st_info, st_info_str, st_info_stb_str,
3036 isym->st_other, st_other_str,
3037 isym->st_shndx, st_shndx_str);
3038 }
3039 if (free_internal)
3040 free (internal_syms);
3041 if (free_external)
3042 free (external_syms);
3043}
3044
3045char *
3046rx_get_reloc (long reloc)
3047{
3048 if (0 <= reloc && reloc < R_RX_max)
3049 return rx_elf_howto_table[reloc].name;
3050 return "";
3051}
3052#endif /* DEBUG */
3053
3054\f
3055/* We must take care to keep the on-disk copy of any code sections
3056 that are fully linked swapped if the target is big endian, to match
3057 the Renesas tools. */
3058
3059/* The rule is: big endian object that are final-link executables,
3060 have code sections stored with 32-bit words swapped relative to
3061 what you'd get by default. */
3062
3063static bfd_boolean
3064rx_get_section_contents (bfd * abfd,
3065 sec_ptr section,
3066 void * location,
3067 file_ptr offset,
3068 bfd_size_type count)
3069{
3070 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3071 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3072 bfd_boolean rv;
3073
3074#ifdef DJDEBUG
3075 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3076 (long) offset, (long) count, section->name,
3077 bfd_big_endian(abfd) ? "be" : "le",
3078 exec, s_code, (long unsigned) section->filepos,
3079 (long unsigned) offset);
3080#endif
3081
3082 if (exec && s_code && bfd_big_endian (abfd))
3083 {
3084 char * cloc = (char *) location;
3085 bfd_size_type cnt, end_cnt;
3086
3087 rv = TRUE;
3088
3089 /* Fetch and swap unaligned bytes at the beginning. */
3090 if (offset % 4)
3091 {
3092 char buf[4];
3093
3094 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3095 (offset & -4), 4);
3096 if (!rv)
3097 return FALSE;
3098
3099 bfd_putb32 (bfd_getl32 (buf), buf);
3100
3101 cnt = 4 - (offset % 4);
3102 if (cnt > count)
3103 cnt = count;
3104
3105 memcpy (location, buf + (offset % 4), cnt);
3106
3107 count -= cnt;
3108 offset += cnt;
3109 cloc += count;
3110 }
3111
3112 end_cnt = count % 4;
3113
3114 /* Fetch and swap the middle bytes. */
3115 if (count >= 4)
3116 {
3117 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3118 count - end_cnt);
3119 if (!rv)
3120 return FALSE;
3121
3122 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3123 bfd_putb32 (bfd_getl32 (cloc), cloc);
3124 }
3125
3126 /* Fetch and swap the end bytes. */
3127 if (end_cnt > 0)
3128 {
3129 char buf[4];
3130
3131 /* Fetch the end bytes. */
3132 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3133 offset + count - end_cnt, 4);
3134 if (!rv)
3135 return FALSE;
3136
3137 bfd_putb32 (bfd_getl32 (buf), buf);
3138 memcpy (cloc, buf, end_cnt);
3139 }
3140 }
3141 else
3142 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3143
3144 return rv;
3145}
3146
3147#ifdef DJDEBUG
3148static bfd_boolean
3149rx2_set_section_contents (bfd * abfd,
3150 sec_ptr section,
3151 const void * location,
3152 file_ptr offset,
3153 bfd_size_type count)
3154{
3155 bfd_size_type i;
3156
3157 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3158 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3159 for (i = 0; i < count; i++)
3160 {
3161 if (i % 16 == 0 && i > 0)
3162 fprintf (stderr, "\n");
3163
3164 if (i % 16 && i % 4 == 0)
3165 fprintf (stderr, " ");
3166
3167 if (i % 16 == 0)
3168 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3169
3170 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3171 }
3172 fprintf (stderr, "\n");
3173
3174 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3175}
3176#define _bfd_elf_set_section_contents rx2_set_section_contents
3177#endif
3178
3179static bfd_boolean
3180rx_set_section_contents (bfd * abfd,
3181 sec_ptr section,
3182 const void * location,
3183 file_ptr offset,
3184 bfd_size_type count)
3185{
3186 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3187 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3188 bfd_boolean rv;
3189 char * swapped_data = NULL;
3190 bfd_size_type i;
3191 bfd_vma caddr = section->vma + offset;
3192 file_ptr faddr = 0;
3193 bfd_size_type scount;
3194
3195#ifdef DJDEBUG
3196 bfd_size_type i;
3197
3198 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3199 (long) offset, (long) count, section->name,
3200 bfd_big_endian (abfd) ? "be" : "le",
3201 exec, s_code);
3202
3203 for (i = 0; i < count; i++)
3204 {
3205 int a = section->vma + offset + i;
3206
3207 if (a % 16 == 0 && a > 0)
3208 fprintf (stderr, "\n");
3209
3210 if (a % 16 && a % 4 == 0)
3211 fprintf (stderr, " ");
3212
3213 if (a % 16 == 0 || i == 0)
3214 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3215
3216 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3217 }
3218
3219 fprintf (stderr, "\n");
3220#endif
3221
3222 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3223 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3224
3225 while (count > 0 && caddr > 0 && caddr % 4)
3226 {
3227 switch (caddr % 4)
3228 {
3229 case 0: faddr = offset + 3; break;
3230 case 1: faddr = offset + 1; break;
3231 case 2: faddr = offset - 1; break;
3232 case 3: faddr = offset - 3; break;
3233 }
3234
3235 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3236 if (! rv)
3237 return rv;
3238
3239 location ++;
3240 offset ++;
3241 count --;
3242 caddr ++;
3243 }
3244
3245 scount = (int)(count / 4) * 4;
3246 if (scount > 0)
3247 {
3248 char * cloc = (char *) location;
3249
3250 swapped_data = (char *) bfd_alloc (abfd, count);
3251
3252 for (i = 0; i < count; i += 4)
3253 {
3254 bfd_vma v = bfd_getl32 (cloc + i);
3255 bfd_putb32 (v, swapped_data + i);
3256 }
3257
3258 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3259
3260 if (!rv)
3261 return rv;
3262 }
3263
3264 count -= scount;
3265 location += scount;
3266 offset += scount;
3267
3268 if (count > 0)
3269 {
3270 caddr = section->vma + offset;
3271 while (count > 0)
3272 {
3273 switch (caddr % 4)
3274 {
3275 case 0: faddr = offset + 3; break;
3276 case 1: faddr = offset + 1; break;
3277 case 2: faddr = offset - 1; break;
3278 case 3: faddr = offset - 3; break;
3279 }
3280 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3281 if (! rv)
3282 return rv;
3283
3284 location ++;
3285 offset ++;
3286 count --;
3287 caddr ++;
3288 }
3289 }
3290
3291 return TRUE;
3292}
3293
3294static bfd_boolean
3295rx_final_link (bfd * abfd, struct bfd_link_info * info)
3296{
3297 asection * o;
3298
3299 for (o = abfd->sections; o != NULL; o = o->next)
3300 {
3301#ifdef DJDEBUG
3302 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3303 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3304#endif
3305 if (o->flags & SEC_CODE
3306 && bfd_big_endian (abfd)
3307 && (o->size % 4 || o->rawsize % 4))
3308 {
3309#ifdef DJDEBUG
3310 fprintf (stderr, "adjusting...\n");
3311#endif
3312 o->size += 4 - (o->size % 4);
3313 o->rawsize += 4 - (o->rawsize % 4);
3314 }
3315 }
3316
3317 return bfd_elf_final_link (abfd, info);
3318}
3319
3320static bfd_boolean
3321elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3322 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3323{
3324 const struct elf_backend_data * bed;
3325 struct elf_obj_tdata * tdata;
3326 Elf_Internal_Phdr * phdr;
3327 unsigned int count;
3328 unsigned int i;
3329
3330 bed = get_elf_backend_data (abfd);
3331 tdata = elf_tdata (abfd);
3332 phdr = tdata->phdr;
3333 count = tdata->program_header_size / bed->s->sizeof_phdr;
3334
3335 for (i = count; i-- != 0; )
3336 if (phdr[i].p_type == PT_LOAD)
3337 {
3338 /* The Renesas tools expect p_paddr to be zero. However,
3339 there is no other way to store the writable data in ROM for
3340 startup initialization. So, we let the linker *think*
3341 we're using paddr and vaddr the "usual" way, but at the
3342 last minute we move the paddr into the vaddr (which is what
3343 the simulator uses) and zero out paddr. Note that this
3344 does not affect the section headers, just the program
3345 headers. We hope. */
3346 phdr[i].p_vaddr = phdr[i].p_paddr;
3347 /* If we zero out p_paddr, then the LMA in the section table
3348 becomes wrong. */
3349 /*phdr[i].p_paddr = 0;*/
3350 }
3351
3352 return TRUE;
3353}
3354\f
3355#define ELF_ARCH bfd_arch_rx
3356#define ELF_MACHINE_CODE EM_RX
3357#define ELF_MAXPAGESIZE 0x1000
3358
3359#define TARGET_BIG_SYM bfd_elf32_rx_be_vec
3360#define TARGET_BIG_NAME "elf32-rx-be"
3361
3362#define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec
3363#define TARGET_LITTLE_NAME "elf32-rx-le"
3364
3365#define elf_info_to_howto_rel NULL
3366#define elf_info_to_howto rx_info_to_howto_rela
3367#define elf_backend_object_p rx_elf_object_p
3368#define elf_backend_relocate_section rx_elf_relocate_section
3369#define elf_symbol_leading_char ('_')
3370#define elf_backend_can_gc_sections 1
3371#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3372
3373#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3374#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3375#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3376#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3377#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3378#define bfd_elf32_get_section_contents rx_get_section_contents
3379#define bfd_elf32_set_section_contents rx_set_section_contents
3380#define bfd_elf32_bfd_final_link rx_final_link
3381#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
3382
3383#include "elf32-target.h"
GDB Binutils - Deliverables
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