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caed7120 | 1 | /* AArch64-specific support for ELF. |
b90efa5b | 2 | Copyright (C) 2009-2015 Free Software Foundation, Inc. |
caed7120 YZ |
3 | Contributed by ARM Ltd. |
4 | ||
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; see the file COPYING3. If not, | |
19 | see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "sysdep.h" | |
22 | #include "elfxx-aarch64.h" | |
d0ae9fbd OJ |
23 | #include <stdarg.h> |
24 | #include <string.h> | |
caed7120 YZ |
25 | |
26 | #define MASK(n) ((1u << (n)) - 1) | |
27 | ||
caed7120 YZ |
28 | /* Reencode the imm field of add immediate. */ |
29 | static inline uint32_t | |
30 | reencode_add_imm (uint32_t insn, uint32_t imm) | |
31 | { | |
32 | return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10); | |
33 | } | |
34 | ||
35 | /* Reencode the imm field of adr. */ | |
36 | static inline uint32_t | |
37 | reencode_adr_imm (uint32_t insn, uint32_t imm) | |
38 | { | |
39 | return (insn & ~((MASK (2) << 29) | (MASK (19) << 5))) | |
40 | | ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3); | |
41 | } | |
42 | ||
43 | /* Reencode the imm field of ld/st pos immediate. */ | |
44 | static inline uint32_t | |
45 | reencode_ldst_pos_imm (uint32_t insn, uint32_t imm) | |
46 | { | |
47 | return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10); | |
48 | } | |
49 | ||
50 | /* Encode the 26-bit offset of unconditional branch. */ | |
51 | static inline uint32_t | |
52 | reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs) | |
53 | { | |
54 | return (insn & ~MASK (26)) | (ofs & MASK (26)); | |
55 | } | |
56 | ||
57 | /* Encode the 19-bit offset of conditional branch and compare & branch. */ | |
58 | static inline uint32_t | |
59 | reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs) | |
60 | { | |
61 | return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5); | |
62 | } | |
63 | ||
64 | /* Decode the 19-bit offset of load literal. */ | |
65 | static inline uint32_t | |
66 | reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs) | |
67 | { | |
68 | return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5); | |
69 | } | |
70 | ||
71 | /* Encode the 14-bit offset of test & branch. */ | |
72 | static inline uint32_t | |
73 | reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs) | |
74 | { | |
75 | return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5); | |
76 | } | |
77 | ||
78 | /* Reencode the imm field of move wide. */ | |
79 | static inline uint32_t | |
80 | reencode_movw_imm (uint32_t insn, uint32_t imm) | |
81 | { | |
82 | return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5); | |
83 | } | |
84 | ||
85 | /* Reencode mov[zn] to movz. */ | |
86 | static inline uint32_t | |
87 | reencode_movzn_to_movz (uint32_t opcode) | |
88 | { | |
89 | return opcode | (1 << 30); | |
90 | } | |
91 | ||
92 | /* Reencode mov[zn] to movn. */ | |
93 | static inline uint32_t | |
94 | reencode_movzn_to_movn (uint32_t opcode) | |
95 | { | |
96 | return opcode & ~(1 << 30); | |
97 | } | |
98 | ||
99 | /* Return non-zero if the indicated VALUE has overflowed the maximum | |
100 | range expressible by a unsigned number with the indicated number of | |
101 | BITS. */ | |
102 | ||
103 | static bfd_reloc_status_type | |
104 | aarch64_unsigned_overflow (bfd_vma value, unsigned int bits) | |
105 | { | |
106 | bfd_vma lim; | |
107 | if (bits >= sizeof (bfd_vma) * 8) | |
108 | return bfd_reloc_ok; | |
109 | lim = (bfd_vma) 1 << bits; | |
110 | if (value >= lim) | |
111 | return bfd_reloc_overflow; | |
112 | return bfd_reloc_ok; | |
113 | } | |
114 | ||
115 | /* Return non-zero if the indicated VALUE has overflowed the maximum | |
116 | range expressible by an signed number with the indicated number of | |
117 | BITS. */ | |
118 | ||
119 | static bfd_reloc_status_type | |
120 | aarch64_signed_overflow (bfd_vma value, unsigned int bits) | |
121 | { | |
122 | bfd_signed_vma svalue = (bfd_signed_vma) value; | |
123 | bfd_signed_vma lim; | |
124 | ||
125 | if (bits >= sizeof (bfd_vma) * 8) | |
126 | return bfd_reloc_ok; | |
127 | lim = (bfd_signed_vma) 1 << (bits - 1); | |
128 | if (svalue < -lim || svalue >= lim) | |
129 | return bfd_reloc_overflow; | |
130 | return bfd_reloc_ok; | |
131 | } | |
132 | ||
133 | /* Insert the addend/value into the instruction or data object being | |
134 | relocated. */ | |
135 | bfd_reloc_status_type | |
136 | _bfd_aarch64_elf_put_addend (bfd *abfd, | |
137 | bfd_byte *address, bfd_reloc_code_real_type r_type, | |
138 | reloc_howto_type *howto, bfd_signed_vma addend) | |
139 | { | |
140 | bfd_reloc_status_type status = bfd_reloc_ok; | |
141 | bfd_signed_vma old_addend = addend; | |
142 | bfd_vma contents; | |
143 | int size; | |
144 | ||
145 | size = bfd_get_reloc_size (howto); | |
146 | switch (size) | |
147 | { | |
6346d5ca AM |
148 | case 0: |
149 | return status; | |
caed7120 YZ |
150 | case 2: |
151 | contents = bfd_get_16 (abfd, address); | |
152 | break; | |
153 | case 4: | |
154 | if (howto->src_mask != 0xffffffff) | |
155 | /* Must be 32-bit instruction, always little-endian. */ | |
156 | contents = bfd_getl32 (address); | |
157 | else | |
158 | /* Must be 32-bit data (endianness dependent). */ | |
159 | contents = bfd_get_32 (abfd, address); | |
160 | break; | |
161 | case 8: | |
162 | contents = bfd_get_64 (abfd, address); | |
163 | break; | |
164 | default: | |
165 | abort (); | |
166 | } | |
167 | ||
168 | switch (howto->complain_on_overflow) | |
169 | { | |
170 | case complain_overflow_dont: | |
171 | break; | |
172 | case complain_overflow_signed: | |
173 | status = aarch64_signed_overflow (addend, | |
174 | howto->bitsize + howto->rightshift); | |
175 | break; | |
176 | case complain_overflow_unsigned: | |
177 | status = aarch64_unsigned_overflow (addend, | |
178 | howto->bitsize + howto->rightshift); | |
179 | break; | |
180 | case complain_overflow_bitfield: | |
181 | default: | |
182 | abort (); | |
183 | } | |
184 | ||
185 | addend >>= howto->rightshift; | |
186 | ||
187 | switch (r_type) | |
188 | { | |
189 | case BFD_RELOC_AARCH64_JUMP26: | |
190 | case BFD_RELOC_AARCH64_CALL26: | |
191 | contents = reencode_branch_ofs_26 (contents, addend); | |
192 | break; | |
193 | ||
194 | case BFD_RELOC_AARCH64_BRANCH19: | |
195 | contents = reencode_cond_branch_ofs_19 (contents, addend); | |
196 | break; | |
197 | ||
198 | case BFD_RELOC_AARCH64_TSTBR14: | |
199 | contents = reencode_tst_branch_ofs_14 (contents, addend); | |
200 | break; | |
201 | ||
1ada945d | 202 | case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19: |
caed7120 YZ |
203 | case BFD_RELOC_AARCH64_LD_LO19_PCREL: |
204 | case BFD_RELOC_AARCH64_GOT_LD_PREL19: | |
043bf05a | 205 | case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: |
caed7120 YZ |
206 | if (old_addend & ((1 << howto->rightshift) - 1)) |
207 | return bfd_reloc_overflow; | |
208 | contents = reencode_ld_lit_ofs_19 (contents, addend); | |
209 | break; | |
210 | ||
211 | case BFD_RELOC_AARCH64_TLSDESC_CALL: | |
212 | break; | |
213 | ||
389b8029 | 214 | case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21: |
3c12b054 | 215 | case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21: |
caed7120 YZ |
216 | case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21: |
217 | case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: | |
218 | case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21: | |
219 | case BFD_RELOC_AARCH64_ADR_GOT_PAGE: | |
220 | case BFD_RELOC_AARCH64_ADR_LO21_PCREL: | |
221 | case BFD_RELOC_AARCH64_ADR_HI21_PCREL: | |
222 | case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL: | |
223 | contents = reencode_adr_imm (contents, addend); | |
224 | break; | |
225 | ||
226 | case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC: | |
227 | case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: | |
228 | case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: | |
229 | case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC: | |
230 | case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC: | |
231 | case BFD_RELOC_AARCH64_ADD_LO12: | |
232 | /* Corresponds to: add rd, rn, #uimm12 to provide the low order | |
233 | 12 bits of the page offset following | |
234 | BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the | |
235 | (pc-relative) page base. */ | |
236 | contents = reencode_add_imm (contents, addend); | |
237 | break; | |
238 | ||
239 | case BFD_RELOC_AARCH64_LDST8_LO12: | |
240 | case BFD_RELOC_AARCH64_LDST16_LO12: | |
241 | case BFD_RELOC_AARCH64_LDST32_LO12: | |
242 | case BFD_RELOC_AARCH64_LDST64_LO12: | |
243 | case BFD_RELOC_AARCH64_LDST128_LO12: | |
244 | case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC: | |
245 | case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC: | |
246 | case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: | |
247 | case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: | |
248 | case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC: | |
249 | case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC: | |
250 | if (old_addend & ((1 << howto->rightshift) - 1)) | |
251 | return bfd_reloc_overflow; | |
252 | /* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order | |
253 | 12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL | |
254 | which computes the (pc-relative) page base. */ | |
255 | contents = reencode_ldst_pos_imm (contents, addend); | |
256 | break; | |
257 | ||
258 | /* Group relocations to create high bits of a 16, 32, 48 or 64 | |
259 | bit signed data or abs address inline. Will change | |
260 | instruction to MOVN or MOVZ depending on sign of calculated | |
261 | value. */ | |
262 | ||
263 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2: | |
264 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1: | |
caed7120 | 265 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0: |
caed7120 YZ |
266 | case BFD_RELOC_AARCH64_MOVW_G0_S: |
267 | case BFD_RELOC_AARCH64_MOVW_G1_S: | |
268 | case BFD_RELOC_AARCH64_MOVW_G2_S: | |
269 | /* NOTE: We can only come here with movz or movn. */ | |
270 | if (addend < 0) | |
271 | { | |
272 | /* Force use of MOVN. */ | |
273 | addend = ~addend; | |
274 | contents = reencode_movzn_to_movn (contents); | |
275 | } | |
276 | else | |
277 | { | |
278 | /* Force use of MOVZ. */ | |
279 | contents = reencode_movzn_to_movz (contents); | |
280 | } | |
281 | /* fall through */ | |
282 | ||
283 | /* Group relocations to create a 16, 32, 48 or 64 bit unsigned | |
284 | data or abs address inline. */ | |
285 | ||
e09ab7ac RS |
286 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC: |
287 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC: | |
caed7120 YZ |
288 | case BFD_RELOC_AARCH64_MOVW_G0: |
289 | case BFD_RELOC_AARCH64_MOVW_G0_NC: | |
290 | case BFD_RELOC_AARCH64_MOVW_G1: | |
291 | case BFD_RELOC_AARCH64_MOVW_G1_NC: | |
292 | case BFD_RELOC_AARCH64_MOVW_G2: | |
293 | case BFD_RELOC_AARCH64_MOVW_G2_NC: | |
294 | case BFD_RELOC_AARCH64_MOVW_G3: | |
295 | contents = reencode_movw_imm (contents, addend); | |
296 | break; | |
297 | ||
298 | default: | |
299 | /* Repack simple data */ | |
300 | if (howto->dst_mask & (howto->dst_mask + 1)) | |
301 | return bfd_reloc_notsupported; | |
302 | ||
303 | contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask)); | |
304 | break; | |
305 | } | |
306 | ||
307 | switch (size) | |
308 | { | |
309 | case 2: | |
310 | bfd_put_16 (abfd, contents, address); | |
311 | break; | |
312 | case 4: | |
313 | if (howto->dst_mask != 0xffffffff) | |
314 | /* must be 32-bit instruction, always little-endian */ | |
315 | bfd_putl32 (contents, address); | |
316 | else | |
317 | /* must be 32-bit data (endianness dependent) */ | |
318 | bfd_put_32 (abfd, contents, address); | |
319 | break; | |
320 | case 8: | |
321 | bfd_put_64 (abfd, contents, address); | |
322 | break; | |
323 | default: | |
324 | abort (); | |
325 | } | |
326 | ||
327 | return status; | |
328 | } | |
329 | ||
330 | bfd_vma | |
331 | _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type, | |
332 | bfd_vma place, bfd_vma value, | |
333 | bfd_vma addend, bfd_boolean weak_undef_p) | |
334 | { | |
335 | switch (r_type) | |
336 | { | |
337 | case BFD_RELOC_AARCH64_TLSDESC_CALL: | |
338 | case BFD_RELOC_AARCH64_NONE: | |
339 | break; | |
340 | ||
389b8029 | 341 | case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21: |
1ada945d | 342 | case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19: |
3c12b054 | 343 | case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21: |
043bf05a | 344 | case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: |
caed7120 YZ |
345 | case BFD_RELOC_AARCH64_ADR_LO21_PCREL: |
346 | case BFD_RELOC_AARCH64_BRANCH19: | |
347 | case BFD_RELOC_AARCH64_LD_LO19_PCREL: | |
348 | case BFD_RELOC_AARCH64_16_PCREL: | |
349 | case BFD_RELOC_AARCH64_32_PCREL: | |
350 | case BFD_RELOC_AARCH64_64_PCREL: | |
351 | case BFD_RELOC_AARCH64_TSTBR14: | |
352 | if (weak_undef_p) | |
353 | value = place; | |
354 | value = value + addend - place; | |
355 | break; | |
356 | ||
357 | case BFD_RELOC_AARCH64_CALL26: | |
358 | case BFD_RELOC_AARCH64_JUMP26: | |
359 | value = value + addend - place; | |
360 | break; | |
361 | ||
362 | case BFD_RELOC_AARCH64_16: | |
363 | case BFD_RELOC_AARCH64_32: | |
364 | case BFD_RELOC_AARCH64_MOVW_G0_S: | |
365 | case BFD_RELOC_AARCH64_MOVW_G1_S: | |
366 | case BFD_RELOC_AARCH64_MOVW_G2_S: | |
367 | case BFD_RELOC_AARCH64_MOVW_G0: | |
368 | case BFD_RELOC_AARCH64_MOVW_G0_NC: | |
369 | case BFD_RELOC_AARCH64_MOVW_G1: | |
370 | case BFD_RELOC_AARCH64_MOVW_G1_NC: | |
371 | case BFD_RELOC_AARCH64_MOVW_G2: | |
372 | case BFD_RELOC_AARCH64_MOVW_G2_NC: | |
373 | case BFD_RELOC_AARCH64_MOVW_G3: | |
374 | value = value + addend; | |
375 | break; | |
376 | ||
377 | case BFD_RELOC_AARCH64_ADR_HI21_PCREL: | |
378 | case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL: | |
379 | if (weak_undef_p) | |
380 | value = PG (place); | |
381 | value = PG (value + addend) - PG (place); | |
382 | break; | |
383 | ||
384 | case BFD_RELOC_AARCH64_GOT_LD_PREL19: | |
385 | value = value + addend - place; | |
386 | break; | |
387 | ||
388 | case BFD_RELOC_AARCH64_ADR_GOT_PAGE: | |
389 | case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21: | |
390 | case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21: | |
391 | case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: | |
392 | value = PG (value + addend) - PG (place); | |
393 | break; | |
394 | ||
395 | case BFD_RELOC_AARCH64_ADD_LO12: | |
396 | case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC: | |
397 | case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC: | |
398 | case BFD_RELOC_AARCH64_LDST8_LO12: | |
399 | case BFD_RELOC_AARCH64_LDST16_LO12: | |
400 | case BFD_RELOC_AARCH64_LDST32_LO12: | |
401 | case BFD_RELOC_AARCH64_LDST64_LO12: | |
402 | case BFD_RELOC_AARCH64_LDST128_LO12: | |
403 | case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC: | |
404 | case BFD_RELOC_AARCH64_TLSDESC_ADD: | |
405 | case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC: | |
406 | case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC: | |
407 | case BFD_RELOC_AARCH64_TLSDESC_LDR: | |
408 | case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC: | |
409 | case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: | |
410 | case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: | |
411 | case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: | |
412 | case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC: | |
413 | value = PG_OFFSET (value + addend); | |
414 | break; | |
415 | ||
416 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1: | |
417 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC: | |
418 | value = (value + addend) & (bfd_vma) 0xffff0000; | |
419 | break; | |
420 | case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: | |
bab91cce JW |
421 | /* Mask off low 12bits, keep all other high bits, so that the later |
422 | generic code could check whehter there is overflow. */ | |
423 | value = (value + addend) & ~(bfd_vma) 0xfff; | |
caed7120 YZ |
424 | break; |
425 | ||
426 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0: | |
427 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC: | |
428 | value = (value + addend) & (bfd_vma) 0xffff; | |
429 | break; | |
430 | ||
431 | case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2: | |
432 | value = (value + addend) & ~(bfd_vma) 0xffffffff; | |
433 | value -= place & ~(bfd_vma) 0xffffffff; | |
434 | break; | |
435 | ||
436 | default: | |
437 | break; | |
438 | } | |
439 | ||
440 | return value; | |
441 | } | |
442 | ||
443 | /* Hook called by the linker routine which adds symbols from an object | |
444 | file. */ | |
445 | ||
446 | bfd_boolean | |
447 | _bfd_aarch64_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info, | |
448 | Elf_Internal_Sym *sym, | |
449 | const char **namep ATTRIBUTE_UNUSED, | |
450 | flagword *flagsp ATTRIBUTE_UNUSED, | |
451 | asection **secp ATTRIBUTE_UNUSED, | |
452 | bfd_vma *valp ATTRIBUTE_UNUSED) | |
453 | { | |
f1885d1e AM |
454 | if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC |
455 | || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE) | |
456 | && (abfd->flags & DYNAMIC) == 0 | |
457 | && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour) | |
caed7120 YZ |
458 | elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE; |
459 | ||
460 | return TRUE; | |
461 | } | |
462 | ||
463 | /* Support for core dump NOTE sections. */ | |
464 | ||
465 | bfd_boolean | |
466 | _bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) | |
467 | { | |
468 | int offset; | |
469 | size_t size; | |
470 | ||
471 | switch (note->descsz) | |
472 | { | |
473 | default: | |
474 | return FALSE; | |
475 | ||
3b570dee | 476 | case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */ |
caed7120 YZ |
477 | /* pr_cursig */ |
478 | elf_tdata (abfd)->core->signal | |
479 | = bfd_get_16 (abfd, note->descdata + 12); | |
480 | ||
481 | /* pr_pid */ | |
482 | elf_tdata (abfd)->core->lwpid | |
483 | = bfd_get_32 (abfd, note->descdata + 32); | |
484 | ||
485 | /* pr_reg */ | |
486 | offset = 112; | |
487 | size = 272; | |
488 | ||
489 | break; | |
490 | } | |
491 | ||
492 | /* Make a ".reg/999" section. */ | |
493 | return _bfd_elfcore_make_pseudosection (abfd, ".reg", | |
494 | size, note->descpos + offset); | |
495 | } | |
d0ae9fbd OJ |
496 | |
497 | bfd_boolean | |
498 | _bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) | |
499 | { | |
500 | switch (note->descsz) | |
501 | { | |
502 | default: | |
503 | return FALSE; | |
504 | ||
505 | case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */ | |
506 | elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); | |
507 | elf_tdata (abfd)->core->program | |
508 | = _bfd_elfcore_strndup (abfd, note->descdata + 40, 16); | |
509 | elf_tdata (abfd)->core->command | |
510 | = _bfd_elfcore_strndup (abfd, note->descdata + 56, 80); | |
511 | } | |
512 | ||
513 | /* Note that for some reason, a spurious space is tacked | |
514 | onto the end of the args in some (at least one anyway) | |
515 | implementations, so strip it off if it exists. */ | |
516 | ||
517 | { | |
518 | char *command = elf_tdata (abfd)->core->command; | |
519 | int n = strlen (command); | |
520 | ||
521 | if (0 < n && command[n - 1] == ' ') | |
522 | command[n - 1] = '\0'; | |
523 | } | |
524 | ||
525 | return TRUE; | |
526 | } | |
527 | ||
528 | char * | |
529 | _bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type, | |
530 | ...) | |
531 | { | |
532 | switch (note_type) | |
533 | { | |
534 | default: | |
535 | return NULL; | |
536 | ||
537 | case NT_PRPSINFO: | |
538 | { | |
539 | char data[136]; | |
540 | va_list ap; | |
541 | ||
542 | va_start (ap, note_type); | |
543 | memset (data, 0, sizeof (data)); | |
544 | strncpy (data + 40, va_arg (ap, const char *), 16); | |
545 | strncpy (data + 56, va_arg (ap, const char *), 80); | |
546 | va_end (ap); | |
547 | ||
548 | return elfcore_write_note (abfd, buf, bufsiz, "CORE", | |
549 | note_type, data, sizeof (data)); | |
550 | } | |
551 | ||
552 | case NT_PRSTATUS: | |
553 | { | |
554 | char data[392]; | |
555 | va_list ap; | |
556 | long pid; | |
557 | int cursig; | |
558 | const void *greg; | |
559 | ||
560 | va_start (ap, note_type); | |
561 | memset (data, 0, sizeof (data)); | |
562 | pid = va_arg (ap, long); | |
563 | bfd_put_32 (abfd, pid, data + 32); | |
564 | cursig = va_arg (ap, int); | |
565 | bfd_put_16 (abfd, cursig, data + 12); | |
566 | greg = va_arg (ap, const void *); | |
567 | memcpy (data + 112, greg, 272); | |
568 | va_end (ap); | |
569 | ||
570 | return elfcore_write_note (abfd, buf, bufsiz, "CORE", | |
571 | note_type, data, sizeof (data)); | |
572 | } | |
573 | } | |
574 | } |