* Makefile.in: Set VERSION to 2.1.
[deliverable/binutils-gdb.git] / binutils / m68k-pinsn.c
CommitLineData
2fa0b342 1/* Print m68k instructions for objdump
d8474a9b 2 Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
2fa0b342
DHW
3
4
5This file is part of the binutils.
6
7The binutils are free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
d8474a9b 9the Free Software Foundation; either version 2, or (at your option)
2fa0b342
DHW
10any later version.
11
12The binutils are distributed in the hope that they will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with the binutils; see the file COPYING. If not, write to
19the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20
3bdb6bf8 21
2a5f387b 22#include "bfd.h"
2fa0b342 23#include "sysdep.h"
17e6f61f 24#include <stdio.h>
4aa58a0a 25#include "opcode/m68k.h"
2fa0b342 26
6ba70f64
DZ
27#ifndef GDB
28#define fprintf_filtered fprintf
29#define fputs_filtered fputs
30#endif
31
6f34472d
PB
32/* Sign-extend an (unsigned char). */
33#if __STDC__ == 1
34#define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
35#else
36#define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
37#endif
38
2fa0b342
DHW
39extern void print_address();
40
41/* 68k instructions are never longer than this many bytes. */
42#define MAXLEN 22
43
44/* Number of elements in the opcode table. */
45#define NOPCODES (sizeof m68k_opcodes / sizeof m68k_opcodes[0])
46
47extern char *reg_names[];
48char *fpcr_names[] = { "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
d6b38bfb 49 "fpiar/fpcr", "fpsr/fpcr", "fpiar/fpsr/fpcr"};
2fa0b342
DHW
50
51char *reg_names[] = {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
52static unsigned char *print_insn_arg ();
53static unsigned char *print_indexed ();
54static void print_base ();
55static int fetch_arg ();
56
6f34472d 57#define NEXTBYTE(p) (p += 2, COERCE_SIGNED_CHAR(p[-1]))
2fa0b342
DHW
58
59#define NEXTWORD(p) \
60 (p += 2, ((((char *)p)[-2]) << 8) + p[-1])
61
62#define NEXTLONG(p) \
63 (p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
64
6ba70f64
DZ
65/* NEXTSINGLE and NEXTDOUBLE handle alignment problems, but not
66 * byte-swapping or other float format differences. FIXME! */
67
68union number {
69 double d;
70 float f;
71 char c[10];
72};
2fa0b342 73
6ba70f64
DZ
74#define NEXTSINGLE(val, p) \
75 { int i; union number u;\
76 for (i = 0; i < sizeof(float); i++) u.c[i] = *p++; \
77 val = u.f; }
78
79#define NEXTDOUBLE(val, p) \
80 { int i; union number u;\
81 for (i = 0; i < sizeof(double); i++) u.c[i] = *p++; \
82 val = u.d; }
2fa0b342
DHW
83
84#define NEXTEXTEND(p) \
85 (p += 12, 0.0) /* Need a function to convert from extended to double
86 precision... */
87
88#define NEXTPACKED(p) \
89 (p += 12, 0.0) /* Need a function to convert from packed to double
90 precision. Actually, it's easier to print a
91 packed number than a double anyway, so maybe
92 there should be a special case to handle this... */
93\f
94/* Print the m68k instruction at address MEMADDR in debugged memory,
95 on STREAM. Returns length of the instruction, in bytes. */
96
97int
98print_insn_m68k(addr, buffer, stream)
99 bfd_vma addr;
100unsigned char *buffer;
101 FILE *stream;
102{
103 register unsigned int i;
104 register unsigned char *p;
105 register char *d;
106 register unsigned int bestmask;
107 int best;
108
109
110
111 bestmask = 0;
112 best = -1;
113 for (i = 0; i < NOPCODES; i++)
114 {
115 register unsigned int opcode = m68k_opcodes[i].opcode;
116 register unsigned int match = m68k_opcodes[i].match;
117 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
118 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
119 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
120 && ((0xff & buffer[3] & match) == (0xff & opcode)))
121 {
122 /* Don't use for printout the variants of divul and divsl
123 that have the same register number in two places.
124 The more general variants will match instead. */
125 for (d = m68k_opcodes[i].args; *d; d += 2)
126 if (d[1] == 'D')
127 break;
128
129 /* Don't use for printout the variants of most floating
130 point coprocessor instructions which use the same
131 register number in two places, as above. */
132 if (*d == 0)
133 for (d = m68k_opcodes[i].args; *d; d += 2)
134 if (d[1] == 't')
135 break;
136
137 if (*d == 0 && match > bestmask)
138 {
139 best = i;
140 bestmask = match;
141 }
142 }
143 }
144
145 /* Handle undefined instructions. */
146 if (best < 0)
147 {
6ba70f64 148 fprintf_filtered (stream, "0%o", (unsigned) (buffer[0] << 8) + buffer[1]);
2fa0b342
DHW
149 return 2;
150 }
151
6ba70f64 152 fprintf_filtered (stream, "%s", m68k_opcodes[best].name);
2fa0b342
DHW
153
154 /* Point at first word of argument data,
155 and at descriptor for first argument. */
156 p = buffer + 2;
157
158 /* Why do this this way? -MelloN */
159 for (d = m68k_opcodes[best].args; *d; d += 2)
160 {
161 if (d[0] == '#')
162 {
163 if (d[1] == 'l' && p - buffer < 6)
164 p = buffer + 6;
165 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
166 p = buffer + 4;
167 }
168 if (d[1] >= '1' && d[1] <= '3' && p - buffer < 4)
169 p = buffer + 4;
170 if (d[1] >= '4' && d[1] <= '6' && p - buffer < 6)
171 p = buffer + 6;
172 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
173 p = buffer + 4;
174 }
175
176 d = m68k_opcodes[best].args;
177
178 if (*d)
6ba70f64 179 fputs_filtered (" ", stream);
2fa0b342
DHW
180
181 while (*d)
182 {
183 p = print_insn_arg (d, buffer, p, addr + p - buffer, stream);
184 d += 2;
185 if (*d && *(d - 2) != 'I' && *d != 'k')
6ba70f64 186 fputs_filtered (",", stream);
2fa0b342
DHW
187 }
188 return p - buffer;
189}
190
191static unsigned char *
192print_insn_arg (d, buffer, p, addr, stream)
193 char *d;
194 unsigned char *buffer;
195 register unsigned char *p;
196 bfd_vma addr; /* PC for this arg to be relative to */
197 FILE *stream;
198{
5a77e916 199 register int val = 0;
2fa0b342
DHW
200 register int place = d[1];
201 int regno;
202 register char *regname;
203 register unsigned char *p1;
5a77e916 204 register double flval = 0;
2fa0b342
DHW
205 int flt_p;
206
207 switch (*d)
208 {
e69e7dd6
ILT
209 case 'c': /* cache identifier */
210 {
211 static char *cacheFieldName[] = { "NOP", "dc", "ic", "bc" };
212 val = fetch_arg (buffer, place, 2);
213 fprintf_filtered (stream, cacheFieldName[val]);
214 break;
215 }
216
217 case 'a': /* address register indirect only. Cf. case '+'. */
218 {
219 fprintf_filtered (stream,
220 "%s@",
221 reg_names [fetch_arg (buffer, place, 3) + 8]);
222 break;
223 }
224
225 case '_': /* 32-bit absolute address for move16. */
226 {
227 val = NEXTLONG (p);
228 fprintf_filtered (stream, "@#");
229 print_address (val, stream);
230 break;
231 }
232
2fa0b342 233 case 'C':
6ba70f64 234 fprintf_filtered (stream, "ccr");
2fa0b342
DHW
235 break;
236
237 case 'S':
6ba70f64 238 fprintf_filtered (stream, "sr");
2fa0b342
DHW
239 break;
240
241 case 'U':
6ba70f64 242 fprintf_filtered (stream, "usp");
2fa0b342
DHW
243 break;
244
245 case 'J':
246 {
247 static struct { char *name; int value; } names[]
248 = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
e69e7dd6
ILT
249 {"tc", 0x003}, {"itt0",0x004}, {"itt1", 0x005},
250 {"dtt0",0x006}, {"dtt1",0x007},
2fa0b342 251 {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
e69e7dd6
ILT
252 {"msp", 0x803}, {"isp", 0x804}, {"mmusr",0x805},
253 {"urp", 0x806}, {"srp", 0x807}};
2fa0b342
DHW
254
255 val = fetch_arg (buffer, place, 12);
256 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
257 if (names[regno].value == val)
258 {
6ba70f64 259 fprintf_filtered (stream, names[regno].name);
2fa0b342
DHW
260 break;
261 }
262 if (regno < 0)
6ba70f64 263 fprintf_filtered (stream, "%d", val);
2fa0b342
DHW
264 }
265 break;
266
267 case 'Q':
268 val = fetch_arg (buffer, place, 3);
6ba70f64
DZ
269 /* 0 means 8, except for the bkpt instruction... */
270 if (val == 0 && d[1] != 's')
271 val = 8;
272 fprintf_filtered (stream, "#%d", val);
2fa0b342
DHW
273 break;
274
275 case 'M':
276 val = fetch_arg (buffer, place, 8);
277 if (val & 0x80)
278 val = val - 0x100;
6ba70f64 279 fprintf_filtered (stream, "#%d", val);
2fa0b342
DHW
280 break;
281
282 case 'T':
283 val = fetch_arg (buffer, place, 4);
6ba70f64 284 fprintf_filtered (stream, "#%d", val);
2fa0b342
DHW
285 break;
286
287 case 'D':
6ba70f64 288 fprintf_filtered (stream, "%s", reg_names[fetch_arg (buffer, place, 3)]);
2fa0b342
DHW
289 break;
290
291 case 'A':
6ba70f64 292 fprintf_filtered (stream, "%s",
2fa0b342
DHW
293 reg_names[fetch_arg (buffer, place, 3) + 010]);
294 break;
295
296 case 'R':
6ba70f64 297 fprintf_filtered (stream, "%s", reg_names[fetch_arg (buffer, place, 4)]);
2fa0b342
DHW
298 break;
299
1090c41e
ILT
300 case 'r':
301 fprintf_filtered (stream, "%s@", reg_names[fetch_arg (buffer, place, 4)]);
302 break;
303
2fa0b342 304 case 'F':
6ba70f64 305 fprintf_filtered (stream, "fp%d", fetch_arg (buffer, place, 3));
2fa0b342
DHW
306 break;
307
308 case 'O':
309 val = fetch_arg (buffer, place, 6);
310 if (val & 0x20)
6ba70f64 311 fprintf_filtered (stream, "%s", reg_names [val & 7]);
2fa0b342 312 else
6ba70f64 313 fprintf_filtered (stream, "%d", val);
2fa0b342
DHW
314 break;
315
316 case '+':
6ba70f64 317 fprintf_filtered (stream, "%s@+",
2fa0b342
DHW
318 reg_names[fetch_arg (buffer, place, 3) + 8]);
319 break;
320
321 case '-':
6ba70f64 322 fprintf_filtered (stream, "%s@-",
2fa0b342
DHW
323 reg_names[fetch_arg (buffer, place, 3) + 8]);
324 break;
325
326 case 'k':
327 if (place == 'k')
6ba70f64 328 fprintf_filtered (stream, "{%s}", reg_names[fetch_arg (buffer, place, 3)]);
2fa0b342
DHW
329 else if (place == 'C')
330 {
331 val = fetch_arg (buffer, place, 7);
332 if ( val > 63 ) /* This is a signed constant. */
333 val -= 128;
6ba70f64 334 fprintf_filtered (stream, "{#%d}", val);
2fa0b342
DHW
335 }
336 else
6ba70f64 337 fprintf_filtered(stderr, "Invalid arg format in opcode table: \"%c%c\".",
2fa0b342
DHW
338 *d, place);
339 break;
340
341 case '#':
342 case '^':
343 p1 = buffer + (*d == '#' ? 2 : 4);
344 if (place == 's')
345 val = fetch_arg (buffer, place, 4);
346 else if (place == 'C')
347 val = fetch_arg (buffer, place, 7);
348 else if (place == '8')
349 val = fetch_arg (buffer, place, 3);
350 else if (place == '3')
351 val = fetch_arg (buffer, place, 8);
352 else if (place == 'b')
353 val = NEXTBYTE (p1);
354 else if (place == 'w')
355 val = NEXTWORD (p1);
356 else if (place == 'l')
357 val = NEXTLONG (p1);
358 else
6ba70f64 359 fprintf_filtered(stderr, "Invalid arg format in opcode table: \"%c%c\".",
2fa0b342 360 *d, place);
6ba70f64 361 fprintf_filtered (stream, "#%d", val);
2fa0b342
DHW
362 break;
363
364 case 'B':
365 if (place == 'b')
366 val = NEXTBYTE (p);
b27d2046 367 else if (place == 'B')
6f34472d 368 val = COERCE_SIGNED_CHAR(buffer[1]);
b27d2046 369 else if (place == 'w' || place == 'W')
2fa0b342 370 val = NEXTWORD (p);
b27d2046 371 else if (place == 'l' || place == 'L')
2fa0b342
DHW
372 val = NEXTLONG (p);
373 else if (place == 'g')
374 {
375 val = ((char *)buffer)[1];
376 if (val == 0)
377 val = NEXTWORD (p);
378 else if (val == -1)
379 val = NEXTLONG (p);
380 }
381 else if (place == 'c')
382 {
383 if (buffer[1] & 0x40) /* If bit six is one, long offset */
384 val = NEXTLONG (p);
385 else
386 val = NEXTWORD (p);
387 }
388 else
6ba70f64 389 fprintf_filtered(stderr, "Invalid arg format in opcode table: \"%c%c\".",
2fa0b342
DHW
390 *d, place);
391 print_address (addr + val, stream);
392 break;
393
394 case 'd':
395 val = NEXTWORD (p);
6ba70f64 396 fprintf_filtered (stream, "%s@(%d)",
2fa0b342
DHW
397 reg_names[fetch_arg (buffer, place, 3)], val);
398 break;
399
400 case 's':
6ba70f64 401 fprintf_filtered (stream, "%s",
2fa0b342
DHW
402 fpcr_names[fetch_arg (buffer, place, 3)]);
403 break;
404
405 case 'I':
406 val = fetch_arg (buffer, 'd', 3); /* Get coprocessor ID... */
407 if (val != 1) /* Unusual coprocessor ID? */
6ba70f64 408 fprintf_filtered (stream, "(cpid=%d) ", val);
2fa0b342
DHW
409 if (place == 'i')
410 p += 2; /* Skip coprocessor extended operands */
411 break;
412
413 case '*':
414 case '~':
415 case '%':
416 case ';':
417 case '@':
418 case '!':
419 case '$':
420 case '?':
421 case '/':
422 case '&':
7c926404 423 case '`':
2fa0b342
DHW
424
425 if (place == 'd')
426 {
427 val = fetch_arg (buffer, 'x', 6);
428 val = ((val & 7) << 3) + ((val >> 3) & 7);
429 }
430 else
431 val = fetch_arg (buffer, 's', 6);
432
433 /* Get register number assuming address register. */
434 regno = (val & 7) + 8;
435 regname = reg_names[regno];
436 switch (val >> 3)
437 {
438 case 0:
6ba70f64 439 fprintf_filtered (stream, "%s", reg_names[val]);
2fa0b342
DHW
440 break;
441
442 case 1:
6ba70f64 443 fprintf_filtered (stream, "%s", regname);
2fa0b342
DHW
444 break;
445
446 case 2:
6ba70f64 447 fprintf_filtered (stream, "%s@", regname);
2fa0b342
DHW
448 break;
449
450 case 3:
6ba70f64 451 fprintf_filtered (stream, "%s@+", regname);
2fa0b342
DHW
452 break;
453
454 case 4:
6ba70f64 455 fprintf_filtered (stream, "%s@-", regname);
2fa0b342
DHW
456 break;
457
458 case 5:
459 val = NEXTWORD (p);
6ba70f64 460 fprintf_filtered (stream, "%s@(%d)", regname, val);
2fa0b342
DHW
461 break;
462
463 case 6:
464 p = print_indexed (regno, p, addr, stream);
465 break;
466
467 case 7:
468 switch (val & 7)
469 {
470 case 0:
471 val = NEXTWORD (p);
6ba70f64 472 fprintf_filtered (stream, "@#");
2fa0b342
DHW
473 print_address (val, stream);
474 break;
475
476 case 1:
477 val = NEXTLONG (p);
6ba70f64 478 fprintf_filtered (stream, "@#");
2fa0b342
DHW
479 print_address (val, stream);
480 break;
481
482 case 2:
483 val = NEXTWORD (p);
484 print_address (addr + val, stream);
485 break;
486
487 case 3:
488 p = print_indexed (-1, p, addr, stream);
489 break;
490
491 case 4:
492 flt_p = 1; /* Assume it's a float... */
493 switch( place )
494 {
495 case 'b':
496 val = NEXTBYTE (p);
497 flt_p = 0;
498 break;
499
500 case 'w':
501 val = NEXTWORD (p);
502 flt_p = 0;
503 break;
504
505 case 'l':
506 val = NEXTLONG (p);
507 flt_p = 0;
508 break;
509
510 case 'f':
6ba70f64 511 NEXTSINGLE(flval, p);
2fa0b342
DHW
512 break;
513
514 case 'F':
6ba70f64 515 NEXTDOUBLE(flval, p);
2fa0b342
DHW
516 break;
517
518 case 'x':
519 flval = NEXTEXTEND(p);
520 break;
521
522 case 'p':
523 flval = NEXTPACKED(p);
524 break;
525
526 default:
6ba70f64 527 fprintf_filtered(stderr, "Invalid arg format in opcode table: \"%c%c\".",
2fa0b342
DHW
528 *d, place);
529 }
530 if ( flt_p ) /* Print a float? */
6ba70f64 531 fprintf_filtered (stream, "#%g", flval);
2fa0b342 532 else
6ba70f64 533 fprintf_filtered (stream, "#%d", val);
2fa0b342
DHW
534 break;
535
536 default:
6ba70f64 537 fprintf_filtered (stream, "<invalid address mode 0%o>", (unsigned) val);
2fa0b342
DHW
538 }
539 }
540 break;
541
542 case 'L':
543 case 'l':
544 if (place == 'w')
545 {
546 char doneany;
547 p1 = buffer + 2;
548 val = NEXTWORD (p1);
549 /* Move the pointer ahead if this point is farther ahead
550 than the last. */
551 p = p1 > p ? p1 : p;
552 if (val == 0)
553 {
6ba70f64 554 fputs_filtered ("#0", stream);
2fa0b342
DHW
555 break;
556 }
557 if (*d == 'l')
558 {
559 register int newval = 0;
560 for (regno = 0; regno < 16; ++regno)
561 if (val & (0x8000 >> regno))
562 newval |= 1 << regno;
563 val = newval;
564 }
565 val &= 0xffff;
566 doneany = 0;
567 for (regno = 0; regno < 16; ++regno)
568 if (val & (1 << regno))
569 {
570 int first_regno;
571 if (doneany)
6ba70f64 572 fputs_filtered ("/", stream);
2fa0b342 573 doneany = 1;
6ba70f64 574 fprintf_filtered (stream, "%s", reg_names[regno]);
2fa0b342
DHW
575 first_regno = regno;
576 while (val & (1 << (regno + 1)))
577 ++regno;
578 if (regno > first_regno)
6ba70f64 579 fprintf_filtered (stream, "-%s", reg_names[regno]);
2fa0b342
DHW
580 }
581 }
582 else if (place == '3')
583 {
584 /* `fmovem' insn. */
585 char doneany;
586 val = fetch_arg (buffer, place, 8);
587 if (val == 0)
588 {
6ba70f64 589 fputs_filtered ("#0", stream);
2fa0b342
DHW
590 break;
591 }
592 if (*d == 'l')
593 {
594 register int newval = 0;
595 for (regno = 0; regno < 8; ++regno)
596 if (val & (0x80 >> regno))
597 newval |= 1 << regno;
598 val = newval;
599 }
600 val &= 0xff;
601 doneany = 0;
602 for (regno = 0; regno < 8; ++regno)
603 if (val & (1 << regno))
604 {
605 int first_regno;
606 if (doneany)
6ba70f64 607 fputs_filtered ("/", stream);
2fa0b342 608 doneany = 1;
6ba70f64 609 fprintf_filtered (stream, "fp%d", regno);
2fa0b342
DHW
610 first_regno = regno;
611 while (val & (1 << (regno + 1)))
612 ++regno;
613 if (regno > first_regno)
6ba70f64 614 fprintf_filtered (stream, "-fp%d", regno);
2fa0b342
DHW
615 }
616 }
617 else
6ba70f64 618 goto de_fault;
2fa0b342
DHW
619 break;
620
6ba70f64
DZ
621 default: de_fault:
622 fprintf_filtered(stderr, "Invalid arg format in opcode table: \"%c\".", *d);
2fa0b342
DHW
623 }
624
625 return (unsigned char *) p;
626}
627
628/* Fetch BITS bits from a position in the instruction specified by CODE.
629 CODE is a "place to put an argument", or 'x' for a destination
630 that is a general address (mode and register).
631 BUFFER contains the instruction. */
632
633static int
634fetch_arg (buffer, code, bits)
635 unsigned char *buffer;
636 char code;
637 int bits;
638{
5a77e916 639 register int val = 0;
2fa0b342
DHW
640 switch (code)
641 {
642 case 's':
643 val = buffer[1];
644 break;
645
646 case 'd': /* Destination, for register or quick. */
647 val = (buffer[0] << 8) + buffer[1];
648 val >>= 9;
649 break;
650
651 case 'x': /* Destination, for general arg */
652 val = (buffer[0] << 8) + buffer[1];
653 val >>= 6;
654 break;
655
656 case 'k':
657 val = (buffer[3] >> 4);
658 break;
659
660 case 'C':
661 val = buffer[3];
662 break;
663
664 case '1':
665 val = (buffer[2] << 8) + buffer[3];
666 val >>= 12;
667 break;
668
669 case '2':
670 val = (buffer[2] << 8) + buffer[3];
671 val >>= 6;
672 break;
673
674 case '3':
675 case 'j':
676 val = (buffer[2] << 8) + buffer[3];
677 break;
678
679 case '4':
680 val = (buffer[4] << 8) + buffer[5];
681 val >>= 12;
682 break;
683
684 case '5':
685 val = (buffer[4] << 8) + buffer[5];
686 val >>= 6;
687 break;
688
689 case '6':
690 val = (buffer[4] << 8) + buffer[5];
691 break;
692
693 case '7':
694 val = (buffer[2] << 8) + buffer[3];
695 val >>= 7;
696 break;
697
698 case '8':
699 val = (buffer[2] << 8) + buffer[3];
700 val >>= 10;
701 break;
702
e69e7dd6
ILT
703 case 'e':
704 val = (buffer[1] >> 6);
705 break;
706
2fa0b342
DHW
707 default:
708 abort ();
709 }
710
711 switch (bits)
712 {
e69e7dd6
ILT
713 case 2:
714 return val & 3;
2fa0b342
DHW
715 case 3:
716 return val & 7;
717 case 4:
718 return val & 017;
719 case 5:
720 return val & 037;
721 case 6:
722 return val & 077;
723 case 7:
724 return val & 0177;
725 case 8:
726 return val & 0377;
727 case 12:
728 return val & 07777;
729 default:
730 abort ();
731 return(0);
732 }
733} /* fetch_arg() */
734
735/* Print an indexed argument. The base register is BASEREG (-1 for pc).
736 P points to extension word, in buffer.
737 ADDR is the nominal core address of that extension word. */
738
739static unsigned char *
740print_indexed (basereg, p, addr, stream)
741 int basereg;
742 unsigned char *p;
743 FILE *stream;
744bfd_vma addr;
745{
746 register int word;
747 static char *scales[] = {"", "*2", "*4", "*8"};
748 register int base_disp;
749 register int outer_disp;
750 char buf[40];
751
752 word = NEXTWORD (p);
753
754 /* Generate the text for the index register.
755 Where this will be output is not yet determined. */
756 sprintf (buf, "[%s.%c%s]",
757 reg_names[(word >> 12) & 0xf],
758 (word & 0x800) ? 'l' : 'w',
759 scales[(word >> 9) & 3]);
760
761 /* Handle the 68000 style of indexing. */
762
763 if ((word & 0x100) == 0)
764 {
765 print_base (basereg,
766 ((word & 0x80) ? word | 0xff00 : word & 0xff)
767 + ((basereg == -1) ? addr : 0),
768 stream);
6ba70f64 769 fputs_filtered (buf, stream);
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DHW
770 return p;
771 }
772
773 /* Handle the generalized kind. */
774 /* First, compute the displacement to add to the base register. */
775
776 if (word & 0200)
777 basereg = -2;
778 if (word & 0100)
779 buf[0] = 0;
780 base_disp = 0;
781 switch ((word >> 4) & 3)
782 {
783 case 2:
784 base_disp = NEXTWORD (p);
785 break;
786 case 3:
787 base_disp = NEXTLONG (p);
788 }
789 if (basereg == -1)
790 base_disp += addr;
791
792 /* Handle single-level case (not indirect) */
793
794 if ((word & 7) == 0)
795 {
796 print_base (basereg, base_disp, stream);
6ba70f64 797 fputs_filtered (buf, stream);
2fa0b342
DHW
798 return p;
799 }
800
801 /* Two level. Compute displacement to add after indirection. */
802
803 outer_disp = 0;
804 switch (word & 3)
805 {
806 case 2:
807 outer_disp = NEXTWORD (p);
808 break;
809 case 3:
810 outer_disp = NEXTLONG (p);
811 }
812
6ba70f64 813 fprintf_filtered (stream, "%d(", outer_disp);
2fa0b342
DHW
814 print_base (basereg, base_disp, stream);
815
816 /* If postindexed, print the closeparen before the index. */
817 if (word & 4)
6ba70f64 818 fprintf_filtered (stream, ")%s", buf);
2fa0b342
DHW
819 /* If preindexed, print the closeparen after the index. */
820 else
6ba70f64 821 fprintf_filtered (stream, "%s)", buf);
2fa0b342
DHW
822
823 return p;
824}
825
826/* Print a base register REGNO and displacement DISP, on STREAM.
827 REGNO = -1 for pc, -2 for none (suppressed). */
828
829static void
830print_base (regno, disp, stream)
831 int regno;
832 int disp;
833 FILE *stream;
834{
835 if (regno == -2)
6ba70f64 836 fprintf_filtered (stream, "%d", disp);
2fa0b342 837 else if (regno == -1)
6ba70f64 838 fprintf_filtered (stream, "0x%x", (unsigned) disp);
2fa0b342 839 else
6ba70f64 840 fprintf_filtered (stream, "%d(%s)", disp, reg_names[regno]);
2fa0b342 841}
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