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84e94c90 | 1 | ; Lattice Mico32 CPU description. -*- Scheme -*- |
87a8d6cb | 2 | ; Copyright 2008-2013 Free Software Foundation, Inc. |
84e94c90 NC |
3 | ; Contributed by Jon Beniston <jon@beniston.com> |
4 | ; | |
5 | ; This file is part of the GNU Binutils. | |
6 | ; | |
7 | ; This program is free software; you can redistribute it and/or modify | |
8 | ; it under the terms of the GNU General Public License as published by | |
9 | ; the Free Software Foundation; either version 3 of the License, or | |
10 | ; (at your option) any later version. | |
11 | ; | |
12 | ; This program is distributed in the hope that it will be useful, | |
13 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | ; GNU General Public License for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
18 | ; along with this program; if not, write to the Free Software | |
19 | ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
20 | ; MA 02110-1301, USA. | |
21 | ||
22 | (include "simplify.inc") | |
23 | ||
24 | (define-arch | |
25 | (name lm32) ; name of cpu family | |
26 | (comment "Lattice Mico32") | |
27 | (default-alignment aligned) | |
28 | (insn-lsb0? #t) | |
29 | (machs lm32) | |
30 | (isas lm32) | |
31 | ) | |
32 | ||
33 | \f | |
34 | ; Instruction sets. | |
35 | ||
36 | (define-isa | |
37 | (name lm32) | |
38 | (comment "Lattice Mico32 ISA") | |
39 | (default-insn-word-bitsize 32) | |
40 | (default-insn-bitsize 32) | |
41 | (base-insn-bitsize 32) | |
42 | (decode-assist (31 30 29 28 27 26)) | |
43 | ) | |
44 | ||
45 | \f | |
46 | ; Cpu family definitions. | |
47 | ||
48 | (define-cpu | |
49 | ; cpu names must be distinct from the architecture name and machine name | |
50 | (name lm32bf) | |
51 | (comment "Lattice Mico32 CPU") | |
52 | (endian big) | |
53 | (word-bitsize 32) | |
54 | ) | |
55 | ||
56 | (define-mach | |
57 | (name lm32) | |
58 | (comment "Lattice Mico32 MACH") | |
59 | (cpu lm32bf) | |
60 | ) | |
61 | ||
62 | (define-model | |
63 | (name lm32) | |
64 | (comment "Lattice Mico32 reference implementation") | |
65 | (mach lm32) | |
66 | (unit u-exec "Execution unit" () | |
67 | 1 1 () () () ()) | |
68 | ) | |
69 | ||
70 | \f | |
71 | ; Hardware elements. | |
72 | ||
73 | (dnh h-pc "Program counter" (PC) (pc) () () ()) | |
74 | ||
75 | (dnh h-gr "General purpose registers" | |
76 | () | |
77 | (register SI (32)) | |
78 | (keyword "" ( | |
79 | (gp 26) (fp 27) (sp 28) (ra 29) (ea 30) (ba 31) | |
80 | (r0 0) (r1 1) (r2 2) (r3 3) | |
81 | (r4 4) (r5 5) (r6 6) (r7 7) | |
82 | (r8 8) (r9 9) (r10 10) (r11 11) | |
83 | (r12 12) (r13 13) (r14 14) (r15 15) | |
84 | (r16 16) (r17 17) (r18 18) (r19 19) | |
85 | (r20 20) (r21 21) (r22 22) (r23 23) | |
86 | (r24 24) (r25 25) (r26 26) (r27 27) | |
87 | (r28 28) (r29 29) (r30 30) (r31 31) | |
88 | ) | |
89 | ) | |
90 | () () | |
91 | ) | |
92 | ||
93 | (dnh h-csr "Control and status registers" | |
94 | () | |
95 | (register SI (32)) | |
96 | (keyword "" ( | |
97 | (IE 0) (IM 1) (IP 2) | |
98 | (ICC 3) (DCC 4) | |
99 | (CC 5) | |
100 | (CFG 6) | |
101 | (EBA 7) | |
102 | (DC 8) | |
103 | (DEBA 9) | |
87a8d6cb | 104 | (CFG2 10) |
84e94c90 NC |
105 | (JTX 14) (JRX 15) |
106 | (BP0 16) (BP1 17) (BP2 18) (BP3 19) | |
107 | (WP0 24) (WP1 25) (WP2 26) (WP3 27) | |
87a8d6cb | 108 | (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31) |
84e94c90 NC |
109 | ) |
110 | ) | |
111 | () () | |
112 | ) | |
113 | ||
114 | \f | |
115 | ; Instruction fields. | |
116 | ||
117 | (dnf f-opcode "opcode field" () 31 6) | |
118 | (dnf f-r0 "register index 0 field" () 25 5) | |
119 | (dnf f-r1 "register index 1 field" () 20 5) | |
120 | (dnf f-r2 "register index 2 field" () 15 5) | |
121 | (dnf f-resv0 "reserved" (RESERVED) 10 11) | |
122 | (dnf f-shift "shift amount field" () 4 5) | |
123 | (df f-imm "signed immediate field" () 15 16 INT #f #f) | |
124 | (dnf f-uimm "unsigned immediate field" () 15 16) | |
125 | (dnf f-csr "csr field" () 25 5) | |
126 | (dnf f-user "user defined field" () 10 11) | |
127 | (dnf f-exception "exception field" () 25 26) | |
128 | ||
129 | (df f-branch "branch offset field" (PCREL-ADDR) 15 16 INT | |
130 | ((value pc) (sra SI (sub SI value pc) 2)) | |
131 | ((value pc) (add SI pc (sra SI (sll SI value 16) 14))) | |
132 | ) | |
133 | (df f-call "call offset field" (PCREL-ADDR) 25 26 INT | |
134 | ((value pc) (sra SI (sub SI value pc) 2)) | |
135 | ((value pc) (add SI pc (sra SI (sll SI value 6) 4))) | |
136 | ) | |
137 | ||
138 | \f | |
139 | ; Operands. | |
140 | ||
141 | (dnop r0 "register 0" () h-gr f-r0) | |
142 | (dnop r1 "register 1" () h-gr f-r1) | |
143 | (dnop r2 "register 2" () h-gr f-r2) | |
144 | (dnop shift "shift amout" () h-uint f-shift) | |
145 | (dnop imm "signed immediate" () h-sint f-imm) | |
146 | (dnop uimm "unsigned immediate" () h-uint f-uimm) | |
147 | (dnop branch "branch offset" () h-iaddr f-branch) | |
148 | (dnop call "call offset" () h-iaddr f-call) | |
149 | (dnop csr "csr" () h-csr f-csr) | |
150 | (dnop user "user" () h-uint f-user) | |
151 | (dnop exception "exception" () h-uint f-exception) | |
152 | ||
153 | (define-operand | |
154 | (name hi16) | |
155 | (comment "high 16-bit immediate") | |
156 | (attrs) | |
157 | (type h-uint) | |
158 | (index f-uimm) | |
159 | (handlers (parse "hi16")) | |
160 | ) | |
161 | ||
162 | (define-operand | |
163 | (name lo16) | |
164 | (comment "low 16-bit immediate") | |
165 | (attrs) | |
166 | (type h-uint) | |
167 | (index f-uimm) | |
168 | (handlers (parse "lo16")) | |
169 | ) | |
170 | ||
171 | (define-operand | |
172 | (name gp16) | |
173 | (comment "gp relative 16-bit immediate") | |
174 | (attrs) | |
175 | (type h-sint) | |
176 | (index f-imm) | |
177 | (handlers (parse "gp16")) | |
178 | ) | |
179 | ||
180 | (define-operand | |
181 | (name got16) | |
182 | (comment "got 16-bit immediate") | |
183 | (attrs) | |
184 | (type h-sint) | |
185 | (index f-imm) | |
186 | (handlers (parse "got16")) | |
187 | ) | |
188 | ||
189 | (define-operand | |
190 | (name gotoffhi16) | |
191 | (comment "got offset high 16-bit immediate") | |
192 | (attrs) | |
193 | (type h-sint) | |
194 | (index f-imm) | |
195 | (handlers (parse "gotoff_hi16")) | |
196 | ) | |
197 | ||
198 | (define-operand | |
199 | (name gotofflo16) | |
200 | (comment "got offset low 16-bit immediate") | |
201 | (attrs) | |
202 | (type h-sint) | |
203 | (index f-imm) | |
204 | (handlers (parse "gotoff_lo16")) | |
205 | ) | |
206 | ||
207 | \f | |
208 | ; Enumerations. | |
209 | ||
210 | (define-normal-insn-enum | |
211 | opcodes "opcodes" () OP_ f-opcode | |
212 | (("ADD" 45) | |
213 | ("ADDI" 13) | |
214 | ("AND" 40) | |
215 | ("ANDI" 8) | |
216 | ("ANDHI" 24) | |
217 | ("B" 48) | |
218 | ("BI" 56) | |
219 | ("BE" 17) | |
220 | ("BG" 18) | |
221 | ("BGE" 19) | |
222 | ("BGEU" 20) | |
223 | ("BGU" 21) | |
224 | ("BNE" 23) | |
225 | ("CALL" 54) | |
226 | ("CALLI" 62) | |
227 | ("CMPE" 57) | |
228 | ("CMPEI" 25) | |
229 | ("CMPG" 58) | |
230 | ("CMPGI" 26) | |
231 | ("CMPGE" 59) | |
232 | ("CMPGEI" 27) | |
233 | ("CMPGEU" 60) | |
234 | ("CMPGEUI" 28) | |
235 | ("CMPGU" 61) | |
236 | ("CMPGUI" 29) | |
237 | ("CMPNE" 63) | |
238 | ("CMPNEI" 31) | |
239 | ("DIVU" 35) | |
240 | ("LB" 4) | |
241 | ("LBU" 16) | |
242 | ("LH" 7) | |
243 | ("LHU" 11) | |
244 | ("LW" 10) | |
245 | ("MODU" 49) | |
246 | ("MUL" 34) | |
247 | ("MULI" 2) | |
248 | ("NOR" 33) | |
249 | ("NORI" 1) | |
250 | ("OR" 46) | |
251 | ("ORI" 14) | |
252 | ("ORHI" 30) | |
253 | ("RAISE" 43) | |
254 | ("RCSR" 36) | |
255 | ("SB" 12) | |
256 | ("SEXTB" 44) | |
257 | ("SEXTH" 55) | |
258 | ("SH" 3) | |
259 | ("SL" 47) | |
260 | ("SLI" 15) | |
261 | ("SR" 37) | |
262 | ("SRI" 5) | |
263 | ("SRU" 32) | |
264 | ("SRUI" 0) | |
265 | ("SUB" 50) | |
266 | ("SW" 22) | |
267 | ("USER" 51) | |
268 | ("WCSR" 52) | |
269 | ("XNOR" 41) | |
270 | ("XNORI" 9) | |
271 | ("XOR" 38) | |
272 | ("XORI" 6) | |
273 | ) | |
274 | ) | |
275 | ||
276 | \f | |
277 | ; Instructions. Note: Reg-reg must come before reg-imm. | |
278 | ||
279 | (dni add "add" () | |
280 | "add $r2,$r0,$r1" | |
281 | (+ OP_ADD r0 r1 r2 (f-resv0 0)) | |
282 | (set r2 (add r0 r1)) | |
283 | () | |
284 | ) | |
285 | ||
286 | (dni addi "add immediate" () | |
287 | "addi $r1,$r0,$imm" | |
288 | (+ OP_ADDI r0 r1 imm) | |
289 | (set r1 (add r0 (ext SI (trunc HI imm)))) | |
290 | () | |
291 | ) | |
292 | ||
293 | (dni and "and" () | |
294 | "and $r2,$r0,$r1" | |
295 | (+ OP_AND r0 r1 r2 (f-resv0 0)) | |
296 | (set r2 (and r0 r1)) | |
297 | () | |
298 | ) | |
299 | ||
300 | (dni andi "and immediate" () | |
301 | "andi $r1,$r0,$uimm" | |
302 | (+ OP_ANDI r0 r1 uimm) | |
303 | (set r1 (and r0 (zext SI uimm))) | |
304 | () | |
305 | ) | |
306 | ||
307 | (dni andhii "and high immediate" () | |
308 | "andhi $r1,$r0,$hi16" | |
309 | (+ OP_ANDHI r0 r1 hi16) | |
310 | (set r1 (and r0 (sll SI hi16 16))) | |
311 | () | |
312 | ) | |
313 | ||
314 | (dni b "branch" () | |
315 | "b $r0" | |
316 | (+ OP_B r0 (f-r1 0) (f-r2 0) (f-resv0 0)) | |
317 | (set pc (c-call USI "@cpu@_b_insn" r0 f-r0)) | |
318 | () | |
319 | ) | |
320 | ||
321 | (dni bi "branch immediate" () | |
322 | "bi $call" | |
323 | (+ OP_BI call) | |
324 | (set pc (ext SI call)) | |
325 | () | |
326 | ) | |
327 | ||
328 | (dni be "branch equal" () | |
329 | "be $r0,$r1,$branch" | |
330 | (+ OP_BE r0 r1 branch) | |
331 | (if (eq r0 r1) | |
332 | (set pc branch) | |
333 | ) | |
334 | () | |
335 | ) | |
336 | ||
337 | (dni bg "branch greater" () | |
338 | "bg $r0,$r1,$branch" | |
339 | (+ OP_BG r0 r1 branch) | |
340 | (if (gt r0 r1) | |
341 | (set pc branch) | |
342 | ) | |
343 | () | |
344 | ) | |
345 | ||
346 | (dni bge "branch greater or equal" () | |
347 | "bge $r0,$r1,$branch" | |
348 | (+ OP_BGE r0 r1 branch) | |
349 | (if (ge r0 r1) | |
350 | (set pc branch) | |
351 | ) | |
352 | () | |
353 | ) | |
354 | ||
355 | (dni bgeu "branch greater or equal unsigned" () | |
356 | "bgeu $r0,$r1,$branch" | |
357 | (+ OP_BGEU r0 r1 branch) | |
358 | (if (geu r0 r1) | |
359 | (set pc branch) | |
360 | ) | |
361 | () | |
362 | ) | |
363 | ||
364 | (dni bgu "branch greater unsigned" () | |
365 | "bgu $r0,$r1,$branch" | |
366 | (+ OP_BGU r0 r1 branch) | |
367 | (if (gtu r0 r1) | |
368 | (set pc branch) | |
369 | ) | |
370 | () | |
371 | ) | |
372 | ||
373 | (dni bne "branch not equal" () | |
374 | "bne $r0,$r1,$branch" | |
375 | (+ OP_BNE r0 r1 branch) | |
376 | (if (ne r0 r1) | |
377 | (set pc branch) | |
378 | ) | |
379 | () | |
380 | ) | |
381 | ||
382 | (dni call "call" () | |
383 | "call $r0" | |
384 | (+ OP_CALL r0 (f-r1 0) (f-r2 0) (f-resv0 0)) | |
385 | (sequence () | |
386 | (set (reg h-gr 29) (add pc 4)) | |
387 | (set pc r0) | |
388 | ) | |
389 | () | |
390 | ) | |
391 | ||
392 | (dni calli "call immediate" () | |
393 | "calli $call" | |
394 | (+ OP_CALLI call) | |
395 | (sequence () | |
396 | (set (reg h-gr 29) (add pc 4)) | |
397 | (set pc (ext SI call)) | |
398 | ) | |
399 | () | |
400 | ) | |
401 | ||
402 | (dni cmpe "compare equal" () | |
403 | "cmpe $r2,$r0,$r1" | |
404 | (+ OP_CMPE r0 r1 r2 (f-resv0 0)) | |
405 | (set r2 (eq SI r0 r1)) | |
406 | () | |
407 | ) | |
408 | ||
409 | (dni cmpei "compare equal immediate" () | |
410 | "cmpei $r1,$r0,$imm" | |
411 | (+ OP_CMPEI r0 r1 imm) | |
412 | (set r1 (eq SI r0 (ext SI (trunc HI imm)))) | |
413 | () | |
414 | ) | |
415 | ||
416 | (dni cmpg "compare greater than" () | |
417 | "cmpg $r2,$r0,$r1" | |
418 | (+ OP_CMPG r0 r1 r2 (f-resv0 0)) | |
419 | (set r2 (gt SI r0 r1)) | |
420 | () | |
421 | ) | |
422 | ||
423 | (dni cmpgi "compare greater than immediate" () | |
424 | "cmpgi $r1,$r0,$imm" | |
425 | (+ OP_CMPGI r0 r1 imm) | |
426 | (set r1 (gt SI r0 (ext SI (trunc HI imm)))) | |
427 | () | |
428 | ) | |
429 | ||
430 | (dni cmpge "compare greater or equal" () | |
431 | "cmpge $r2,$r0,$r1" | |
432 | (+ OP_CMPGE r0 r1 r2 (f-resv0 0)) | |
433 | (set r2 (ge SI r0 r1)) | |
434 | () | |
435 | ) | |
436 | ||
437 | (dni cmpgei "compare greater or equal immediate" () | |
438 | "cmpgei $r1,$r0,$imm" | |
439 | (+ OP_CMPGEI r0 r1 imm) | |
440 | (set r1 (ge SI r0 (ext SI (trunc HI imm)))) | |
441 | () | |
442 | ) | |
443 | ||
444 | (dni cmpgeu "compare greater or equal unsigned" () | |
445 | "cmpgeu $r2,$r0,$r1" | |
446 | (+ OP_CMPGEU r0 r1 r2 (f-resv0 0)) | |
447 | (set r2 (geu SI r0 r1)) | |
448 | () | |
449 | ) | |
450 | ||
451 | (dni cmpgeui "compare greater or equal unsigned immediate" () | |
452 | "cmpgeui $r1,$r0,$uimm" | |
453 | (+ OP_CMPGEUI r0 r1 uimm) | |
454 | (set r1 (geu SI r0 (zext SI uimm))) | |
455 | () | |
456 | ) | |
457 | ||
458 | (dni cmpgu "compare greater than unsigned" () | |
459 | "cmpgu $r2,$r0,$r1" | |
460 | (+ OP_CMPGU r0 r1 r2 (f-resv0 0)) | |
461 | (set r2 (gtu SI r0 r1)) | |
462 | () | |
463 | ) | |
464 | ||
465 | (dni cmpgui "compare greater than unsigned immediate" () | |
466 | "cmpgui $r1,$r0,$uimm" | |
467 | (+ OP_CMPGUI r0 r1 uimm) | |
468 | (set r1 (gtu SI r0 (zext SI uimm))) | |
469 | () | |
470 | ) | |
471 | ||
472 | (dni cmpne "compare not equal" () | |
473 | "cmpne $r2,$r0,$r1" | |
474 | (+ OP_CMPNE r0 r1 r2 (f-resv0 0)) | |
475 | (set r2 (ne SI r0 r1)) | |
476 | () | |
477 | ) | |
478 | ||
479 | (dni cmpnei "compare not equal immediate" () | |
480 | "cmpnei $r1,$r0,$imm" | |
481 | (+ OP_CMPNEI r0 r1 imm) | |
482 | (set r1 (ne SI r0 (ext SI (trunc HI imm)))) | |
483 | () | |
484 | ) | |
485 | ||
486 | (dni divu "unsigned divide" () | |
487 | "divu $r2,$r0,$r1" | |
488 | (+ OP_DIVU r0 r1 r2 (f-resv0 0)) | |
489 | (set pc (c-call USI "@cpu@_divu_insn" pc f-r0 f-r1 f-r2)) | |
490 | () | |
491 | ) | |
492 | ||
493 | (dni lb "load byte" () | |
494 | "lb $r1,($r0+$imm)" | |
495 | (+ OP_LB r0 r1 imm) | |
496 | (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) | |
497 | () | |
498 | ) | |
499 | ||
500 | (dni lbu "load byte unsigned" () | |
501 | "lbu $r1,($r0+$imm)" | |
502 | (+ OP_LBU r0 r1 imm) | |
503 | (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) | |
504 | () | |
505 | ) | |
506 | ||
507 | (dni lh "load halfword" () | |
508 | "lh $r1,($r0+$imm)" | |
509 | (+ OP_LH r0 r1 imm) | |
510 | (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) | |
511 | () | |
512 | ) | |
513 | ||
514 | (dni lhu "load halfword unsigned" () | |
515 | "lhu $r1,($r0+$imm)" | |
516 | (+ OP_LHU r0 r1 imm) | |
517 | (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) | |
518 | () | |
519 | ) | |
520 | ||
521 | (dni lw "load word" () | |
522 | "lw $r1,($r0+$imm)" | |
523 | (+ OP_LW r0 r1 imm) | |
524 | (set r1 (mem SI (add r0 (ext SI (trunc HI imm))))) | |
525 | () | |
526 | ) | |
527 | ||
528 | (dni modu "unsigned modulus" () | |
529 | "modu $r2,$r0,$r1" | |
530 | (+ OP_MODU r0 r1 r2 (f-resv0 0)) | |
531 | (set pc (c-call USI "@cpu@_modu_insn" pc f-r0 f-r1 f-r2)) | |
532 | () | |
533 | ) | |
534 | ||
535 | (dni mul "mulitply" () | |
536 | "mul $r2,$r0,$r1" | |
537 | (+ OP_MUL r0 r1 r2 (f-resv0 0)) | |
538 | (set r2 (mul r0 r1)) | |
539 | () | |
540 | ) | |
541 | ||
542 | (dni muli "multiply immediate" () | |
543 | "muli $r1,$r0,$imm" | |
544 | (+ OP_MULI r0 r1 imm) | |
545 | (set r1 (mul r0 (ext SI (trunc HI imm)))) | |
546 | () | |
547 | ) | |
548 | ||
549 | (dni nor "nor" () | |
550 | "nor $r2,$r0,$r1" | |
551 | (+ OP_NOR r0 r1 r2 (f-resv0 0)) | |
552 | (set r2 (inv (or r0 r1))) | |
553 | () | |
554 | ) | |
555 | ||
556 | (dni nori "nor immediate" () | |
557 | "nori $r1,$r0,$uimm" | |
558 | (+ OP_NORI r0 r1 uimm) | |
559 | (set r1 (inv (or r0 (zext SI uimm)))) | |
560 | () | |
561 | ) | |
562 | ||
563 | (dni or "or" () | |
564 | "or $r2,$r0,$r1" | |
565 | (+ OP_OR r0 r1 r2 (f-resv0 0)) | |
566 | (set r2 (or r0 r1)) | |
567 | () | |
568 | ) | |
569 | ||
570 | (dni ori "or immediate" () | |
571 | "ori $r1,$r0,$lo16" | |
572 | (+ OP_ORI r0 r1 lo16) | |
573 | (set r1 (or r0 (zext SI lo16))) | |
574 | () | |
575 | ) | |
576 | ||
577 | (dni orhii "or high immediate" () | |
578 | "orhi $r1,$r0,$hi16" | |
579 | (+ OP_ORHI r0 r1 hi16) | |
580 | (set r1 (or r0 (sll SI hi16 16))) | |
581 | () | |
582 | ) | |
583 | ||
584 | (dni rcsr "read control or status register" () | |
585 | "rcsr $r2,$csr" | |
586 | (+ OP_RCSR csr (f-r1 0) r2 (f-resv0 0)) | |
587 | (set r2 csr) | |
588 | () | |
589 | ) | |
590 | ||
591 | (dni sb "store byte" () | |
592 | "sb ($r0+$imm),$r1" | |
593 | (+ OP_SB r0 r1 imm) | |
594 | (set (mem QI (add r0 (ext SI (trunc HI imm)))) r1) | |
595 | () | |
596 | ) | |
597 | ||
598 | (dni sextb "sign extend byte" () | |
599 | "sextb $r2,$r0" | |
600 | (+ OP_SEXTB r0 (f-r1 0) r2 (f-resv0 0)) | |
601 | (set r2 (ext SI (trunc QI r0))) | |
602 | () | |
603 | ) | |
604 | ||
605 | (dni sexth "sign extend half-word" () | |
606 | "sexth $r2,$r0" | |
607 | (+ OP_SEXTH r0 (f-r1 0) r2 (f-resv0 0)) | |
608 | (set r2 (ext SI (trunc HI r0))) | |
609 | () | |
610 | ) | |
611 | ||
612 | (dni sh "store halfword" () | |
613 | "sh ($r0+$imm),$r1" | |
614 | (+ OP_SH r0 r1 imm) | |
615 | (set (mem HI (add r0 (ext SI (trunc HI imm)))) r1) | |
616 | () | |
617 | ) | |
618 | ||
619 | (dni sl "shift left" () | |
620 | "sl $r2,$r0,$r1" | |
621 | (+ OP_SL r0 r1 r2 (f-resv0 0)) | |
622 | (set r2 (sll SI r0 r1)) | |
623 | () | |
624 | ) | |
625 | ||
626 | (dni sli "shift left immediate" () | |
627 | "sli $r1,$r0,$imm" | |
628 | (+ OP_SLI r0 r1 imm) | |
629 | (set r1 (sll SI r0 imm)) | |
630 | () | |
631 | ) | |
632 | ||
633 | (dni sr "shift right" () | |
634 | "sr $r2,$r0,$r1" | |
635 | (+ OP_SR r0 r1 r2 (f-resv0 0)) | |
636 | (set r2 (sra SI r0 r1)) | |
637 | () | |
638 | ) | |
639 | ||
640 | (dni sri "shift right immediate" () | |
641 | "sri $r1,$r0,$imm" | |
642 | (+ OP_SRI r0 r1 imm) | |
643 | (set r1 (sra SI r0 imm)) | |
644 | () | |
645 | ) | |
646 | ||
647 | (dni sru "shift right unsigned" () | |
648 | "sru $r2,$r0,$r1" | |
649 | (+ OP_SRU r0 r1 r2 (f-resv0 0)) | |
650 | (set r2 (srl SI r0 r1)) | |
651 | () | |
652 | ) | |
653 | ||
654 | (dni srui "shift right unsigned immediate" () | |
655 | "srui $r1,$r0,$imm" | |
656 | (+ OP_SRUI r0 r1 imm) | |
657 | (set r1 (srl SI r0 imm)) | |
658 | () | |
659 | ) | |
660 | ||
661 | (dni sub "subtract" () | |
662 | "sub $r2,$r0,$r1" | |
663 | (+ OP_SUB r0 r1 r2 (f-resv0 0)) | |
664 | (set r2 (sub r0 r1)) | |
665 | () | |
666 | ) | |
667 | ||
668 | (dni sw "store word" () | |
669 | "sw ($r0+$imm),$r1" | |
670 | (+ OP_SW r0 r1 imm) | |
671 | (set (mem SI (add r0 (ext SI (trunc HI imm)))) r1) | |
672 | () | |
673 | ) | |
674 | ||
675 | (dni user "user defined instruction" () | |
676 | "user $r2,$r0,$r1,$user" | |
677 | (+ OP_USER r0 r1 r2 user) | |
678 | (set r2 (c-call SI "@cpu@_user_insn" r0 r1 user)) | |
679 | () | |
680 | ) | |
681 | ||
682 | (dni wcsr "write control or status register" () | |
683 | "wcsr $csr,$r1" | |
684 | (+ OP_WCSR csr r1 (f-r2 0) (f-resv0 0)) | |
685 | (c-call VOID "@cpu@_wcsr_insn" f-csr r1) | |
686 | () | |
687 | ) | |
688 | ||
689 | (dni xor "xor" () | |
690 | "xor $r2,$r0,$r1" | |
691 | (+ OP_XOR r0 r1 r2 (f-resv0 0)) | |
692 | (set r2 (xor r0 r1)) | |
693 | () | |
694 | ) | |
695 | ||
696 | (dni xori "xor immediate" () | |
697 | "xori $r1,$r0,$uimm" | |
698 | (+ OP_XORI r0 r1 uimm) | |
699 | (set r1 (xor r0 (zext SI uimm))) | |
700 | () | |
701 | ) | |
702 | ||
703 | (dni xnor "xnor" () | |
704 | "xnor $r2,$r0,$r1" | |
705 | (+ OP_XNOR r0 r1 r2 (f-resv0 0)) | |
706 | (set r2 (inv (xor r0 r1))) | |
707 | () | |
708 | ) | |
709 | ||
710 | (dni xnori "xnor immediate" () | |
711 | "xnori $r1,$r0,$uimm" | |
712 | (+ OP_XNORI r0 r1 uimm) | |
713 | (set r1 (inv (xor r0 (zext SI uimm)))) | |
714 | () | |
715 | ) | |
716 | ||
717 | ; Pseudo instructions | |
718 | ||
719 | (dni break "breakpoint" () | |
720 | "break" | |
721 | (+ OP_RAISE (f-exception 2)) | |
722 | (set pc (c-call USI "@cpu@_break_insn" pc)) | |
723 | () | |
724 | ) | |
725 | ||
726 | (dni scall "system call" () | |
727 | "scall" | |
728 | (+ OP_RAISE (f-exception 7)) | |
729 | (set pc (c-call USI "@cpu@_scall_insn" pc)) | |
730 | () | |
731 | ) | |
732 | ||
733 | (dni bret "return from breakpoint" (ALIAS) | |
734 | "bret" | |
735 | (+ OP_B (f-r0 31) (f-r1 0) (f-r2 0) (f-resv0 0)) | |
736 | (set pc (c-call USI "@cpu@_bret_insn" r0)) | |
737 | () | |
738 | ) | |
739 | ||
740 | (dni eret "return from exception" (ALIAS) | |
741 | "eret" | |
742 | (+ OP_B (f-r0 30) (f-r1 0) (f-r2 0) (f-resv0 0)) | |
743 | (set pc (c-call USI "@cpu@_eret_insn" r0)) | |
744 | () | |
745 | ) | |
746 | ||
747 | (dni ret "return" (ALIAS) | |
748 | "ret" | |
749 | (+ OP_B (f-r0 29) (f-r1 0) (f-r2 0) (f-resv0 0)) | |
750 | (set pc r0) | |
751 | () | |
752 | ) | |
753 | ||
754 | (dni mv "move" (ALIAS) | |
755 | "mv $r2,$r0" | |
756 | (+ OP_OR r0 (f-r1 0) r2 (f-resv0 0)) | |
757 | (set r2 r0) | |
758 | () | |
759 | ) | |
760 | ||
761 | (dni mvi "move immediate" (ALIAS) | |
762 | "mvi $r1,$imm" | |
763 | (+ OP_ADDI (f-r0 0) r1 imm) | |
764 | (set r1 (add r0 (ext SI (trunc HI imm)))) | |
765 | () | |
766 | ) | |
767 | ||
768 | (dni mvui "move unsigned immediate" (ALIAS) | |
769 | "mvu $r1,$lo16" | |
770 | (+ OP_ORI (f-r0 0) r1 lo16) | |
771 | (set r1 (zext SI lo16)) | |
772 | () | |
773 | ) | |
774 | ||
775 | (dni mvhi "move high immediate" (ALIAS) | |
776 | "mvhi $r1,$hi16" | |
777 | (+ OP_ORHI (f-r0 0) r1 hi16) | |
778 | (set r1 (or r0 (sll SI hi16 16))) | |
779 | () | |
780 | ) | |
781 | ||
782 | (dni mva "move address" (ALIAS) | |
783 | "mva $r1,$gp16" | |
784 | (+ OP_ADDI (f-r0 26) r1 gp16) | |
785 | (set r1 (add r0 (ext SI (trunc HI gp16)))) | |
786 | () | |
787 | ) | |
788 | ||
789 | (dni not "not" (ALIAS) | |
790 | "not $r2,$r0" | |
791 | (+ OP_XNOR r0 (f-r1 0) r2 (f-resv0 0)) | |
792 | (set r2 (inv r0)) | |
793 | () | |
794 | ) | |
795 | ||
796 | (dni nop "nop" (ALIAS) | |
797 | "nop" | |
798 | (+ OP_ADDI (f-r0 0) (f-r1 0) (f-imm 0)) | |
799 | (set r0 r0) | |
800 | () | |
801 | ) | |
802 | ||
803 | (dni lbgprel "load byte gp relative" (ALIAS) | |
804 | "lb $r1,$gp16" | |
805 | (+ OP_LB (f-r0 26) r1 gp16) | |
806 | (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) | |
807 | () | |
808 | ) | |
809 | ||
810 | (dni lbugprel "load byte unsigned gp relative" (ALIAS) | |
811 | "lbu $r1,$gp16" | |
812 | (+ OP_LBU (f-r0 26) r1 gp16) | |
813 | (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) | |
814 | () | |
815 | ) | |
816 | ||
817 | (dni lhgprel "load halfword gp relative" (ALIAS) | |
818 | "lh $r1,$gp16" | |
819 | (+ OP_LH (f-r0 26) r1 gp16) | |
820 | (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) | |
821 | () | |
822 | ) | |
823 | ||
824 | (dni lhugprel "load halfword unsigned gp relative" (ALIAS) | |
825 | "lhu $r1,$gp16" | |
826 | (+ OP_LHU (f-r0 26) r1 gp16) | |
827 | (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) | |
828 | () | |
829 | ) | |
830 | ||
831 | (dni lwgprel "load word gp relative" (ALIAS) | |
832 | "lw $r1,$gp16" | |
833 | (+ OP_LW (f-r0 26) r1 gp16) | |
834 | (set r1 (mem SI (add r0 (ext SI (trunc HI gp16))))) | |
835 | () | |
836 | ) | |
837 | ||
838 | (dni sbgprel "store byte gp relative" (ALIAS) | |
839 | "sb $gp16,$r1" | |
840 | (+ OP_SB (f-r0 26) r1 gp16) | |
841 | (set (mem QI (add r0 (ext SI (trunc HI gp16)))) r1) | |
842 | () | |
843 | ) | |
844 | ||
845 | (dni shgprel "store halfword gp relative" (ALIAS) | |
846 | "sh $gp16,$r1" | |
847 | (+ OP_SH (f-r0 26) r1 gp16) | |
848 | (set (mem HI (add r0 (ext SI (trunc HI gp16)))) r1) | |
849 | () | |
850 | ) | |
851 | ||
852 | (dni swgprel "store word gp relative" (ALIAS) | |
853 | "sw $gp16,$r1" | |
854 | (+ OP_SW (f-r0 26) r1 gp16) | |
855 | (set (mem SI (add r0 (ext SI (trunc HI gp16)))) r1) | |
856 | () | |
857 | ) | |
858 | ||
859 | (dni lwgotrel "load word got relative" (ALIAS) | |
860 | "lw $r1,(gp+$got16)" | |
861 | (+ OP_LW (f-r0 26) r1 got16) | |
862 | (set r1 (mem SI (add r0 (ext SI (trunc HI got16))))) | |
863 | () | |
864 | ) | |
865 | ||
866 | (dni orhigotoffi "or high got offset immediate" (ALIAS) | |
867 | "orhi $r1,$r0,$gotoffhi16" | |
868 | (+ OP_ORHI r0 r1 gotoffhi16) | |
869 | (set r1 (or r0 (sll SI gotoffhi16 16))) | |
870 | () | |
871 | ) | |
872 | ||
873 | (dni addgotoff "add got offset" (ALIAS) | |
874 | "addi $r1,$r0,$gotofflo16" | |
875 | (+ OP_ADDI r0 r1 gotofflo16) | |
876 | (set r1 (add r0 (ext SI (trunc HI gotofflo16)))) | |
877 | () | |
878 | ) | |
879 | ||
880 | (dni swgotoff "store word got offset" (ALIAS) | |
881 | "sw ($r0+$gotofflo16),$r1" | |
882 | (+ OP_SW r0 r1 gotofflo16) | |
883 | (set (mem SI (add r0 (ext SI (trunc HI gotofflo16)))) r1) | |
884 | () | |
885 | ) | |
886 | ||
887 | (dni lwgotoff "load word got offset" (ALIAS) | |
888 | "lw $r1,($r0+$gotofflo16)" | |
889 | (+ OP_LW r0 r1 gotofflo16) | |
890 | (set r1 (mem SI (add r0 (ext SI (trunc HI gotofflo16))))) | |
891 | () | |
892 | ) | |
893 | ||
894 | (dni shgotoff "store half word got offset" (ALIAS) | |
895 | "sh ($r0+$gotofflo16),$r1" | |
896 | (+ OP_SH r0 r1 gotofflo16) | |
897 | (set (mem HI (add r0 (ext SI (trunc HI gotofflo16)))) r1) | |
898 | () | |
899 | ) | |
900 | ||
901 | (dni lhgotoff "load half word got offset" (ALIAS) | |
902 | "lh $r1,($r0+$gotofflo16)" | |
903 | (+ OP_LH r0 r1 gotofflo16) | |
904 | (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) | |
905 | () | |
906 | ) | |
907 | ||
908 | (dni lhugotoff "load half word got offset unsigned" (ALIAS) | |
909 | "lhu $r1,($r0+$gotofflo16)" | |
910 | (+ OP_LHU r0 r1 gotofflo16) | |
911 | (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) | |
912 | () | |
913 | ) | |
914 | ||
915 | (dni sbgotoff "store byte got offset" (ALIAS) | |
916 | "sb ($r0+$gotofflo16),$r1" | |
917 | (+ OP_SB r0 r1 gotofflo16) | |
918 | (set (mem QI (add r0 (ext SI (trunc HI gotofflo16)))) r1) | |
919 | () | |
920 | ) | |
921 | ||
922 | (dni lbgotoff "load byte got offset" (ALIAS) | |
923 | "lb $r1,($r0+$gotofflo16)" | |
924 | (+ OP_LB r0 r1 gotofflo16) | |
925 | (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) | |
926 | () | |
927 | ) | |
928 | ||
929 | (dni lbugotoff "load byte got offset unsigned" (ALIAS) | |
930 | "lbu $r1,($r0+$gotofflo16)" | |
931 | (+ OP_LBU r0 r1 gotofflo16) | |
932 | (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) | |
933 | () | |
934 | ) |